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6806d8485f2d8d802f96712cf06c7cdc1fd837b3
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
Andrea Gonelli 6806d8485f wip
2025-08-25 21:07:59 +02:00

23443 lines
850 KiB
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AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 00009768 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000000b0 08009874 08009874 0000a874 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 08009924 08009924 0000b1cc 2**0
CONTENTS, READONLY
4 .ARM 00000000 08009924 08009924 0000b1cc 2**0
CONTENTS, READONLY
5 .preinit_array 00000000 08009924 08009924 0000b1cc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 08009924 08009924 0000a924 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 08009928 08009928 0000a928 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001cc 20000000 0800992c 0000b000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 00001584 200001cc 08009af8 0000b1cc 2**2
ALLOC
10 ._user_heap_stack 00000600 20001750 08009af8 0000b750 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 0000b1cc 2**0
CONTENTS, READONLY
12 .debug_info 000120e1 00000000 00000000 0000b1f5 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00003385 00000000 00000000 0001d2d6 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 00001128 00000000 00000000 00020660 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00000d02 00000000 00000000 00021788 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001ac13 00000000 00000000 0002248a 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 000154ad 00000000 00000000 0003d09d 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 0009207d 00000000 00000000 0005254a 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 000e45c7 2**0
CONTENTS, READONLY
20 .debug_frame 00004b6c 00000000 00000000 000e460c 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000053 00000000 00000000 000e9178 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001cc .word 0x200001cc
8000128: 00000000 .word 0x00000000
800012c: 0800985c .word 0x0800985c
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001d0 .word 0x200001d0
8000148: 0800985c .word 0x0800985c
0800014c <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void){
800014c: b580 push {r7, lr}
800014e: af00 add r7, sp, #0
static unsigned char c10ms = 0;
static uint8_t c100ms = 0;
static uint8_t c1s = 0;
if (++c10ms >= 10) { // 10 ms
8000150: 4b16 ldr r3, [pc, #88] @ (80001ac <HAL_SYSTICK_Callback+0x60>)
8000152: 781b ldrb r3, [r3, #0]
8000154: 3301 adds r3, #1
8000156: b2da uxtb r2, r3
8000158: 4b14 ldr r3, [pc, #80] @ (80001ac <HAL_SYSTICK_Callback+0x60>)
800015a: 701a strb r2, [r3, #0]
800015c: 4b13 ldr r3, [pc, #76] @ (80001ac <HAL_SYSTICK_Callback+0x60>)
800015e: 781b ldrb r3, [r3, #0]
8000160: 2b09 cmp r3, #9
8000162: d921 bls.n 80001a8 <HAL_SYSTICK_Callback+0x5c>
c10ms = 0;
8000164: 4b11 ldr r3, [pc, #68] @ (80001ac <HAL_SYSTICK_Callback+0x60>)
8000166: 2200 movs r2, #0
8000168: 701a strb r2, [r3, #0]
if (++c100ms >= 10) { // 10 ms
800016a: 4b11 ldr r3, [pc, #68] @ (80001b0 <HAL_SYSTICK_Callback+0x64>)
800016c: 781b ldrb r3, [r3, #0]
800016e: 3301 adds r3, #1
8000170: b2da uxtb r2, r3
8000172: 4b0f ldr r3, [pc, #60] @ (80001b0 <HAL_SYSTICK_Callback+0x64>)
8000174: 701a strb r2, [r3, #0]
8000176: 4b0e ldr r3, [pc, #56] @ (80001b0 <HAL_SYSTICK_Callback+0x64>)
8000178: 781b ldrb r3, [r3, #0]
800017a: 2b09 cmp r3, #9
800017c: d914 bls.n 80001a8 <HAL_SYSTICK_Callback+0x5c>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
800017e: 4b0c ldr r3, [pc, #48] @ (80001b0 <HAL_SYSTICK_Callback+0x64>)
8000180: 2200 movs r2, #0
8000182: 701a strb r2, [r3, #0]
if (++c1s >= 10) { // 10 ms
8000184: 4b0b ldr r3, [pc, #44] @ (80001b4 <HAL_SYSTICK_Callback+0x68>)
8000186: 781b ldrb r3, [r3, #0]
8000188: 3301 adds r3, #1
800018a: b2da uxtb r2, r3
800018c: 4b09 ldr r3, [pc, #36] @ (80001b4 <HAL_SYSTICK_Callback+0x68>)
800018e: 701a strb r2, [r3, #0]
8000190: 4b08 ldr r3, [pc, #32] @ (80001b4 <HAL_SYSTICK_Callback+0x68>)
8000192: 781b ldrb r3, [r3, #0]
8000194: 2b09 cmp r3, #9
8000196: d907 bls.n 80001a8 <HAL_SYSTICK_Callback+0x5c>
c1s = 0;
8000198: 4b06 ldr r3, [pc, #24] @ (80001b4 <HAL_SYSTICK_Callback+0x68>)
800019a: 2200 movs r2, #0
800019c: 701a strb r2, [r3, #0]
HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_13);
800019e: f44f 5100 mov.w r1, #8192 @ 0x2000
80001a2: 4805 ldr r0, [pc, #20] @ (80001b8 <HAL_SYSTICK_Callback+0x6c>)
80001a4: f001 fb12 bl 80017cc <HAL_GPIO_TogglePin>
}
}
}
}
80001a8: bf00 nop
80001aa: bd80 pop {r7, pc}
80001ac: 20000338 .word 0x20000338
80001b0: 20000339 .word 0x20000339
80001b4: 2000033a .word 0x2000033a
80001b8: 40011000 .word 0x40011000
080001bc <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
80001bc: b580 push {r7, lr}
80001be: b09a sub sp, #104 @ 0x68
80001c0: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
80001c2: f000 fddf bl 8000d84 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
80001c6: f000 f82f bl 8000228 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
80001ca: f000 fb71 bl 80008b0 <MX_GPIO_Init>
MX_USB_DEVICE_Init();
80001ce: f008 f97b bl 80084c8 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
80001d2: f000 f985 bl 80004e0 <MX_TIM2_Init>
MX_TIM4_Init();
80001d6: f000 fac9 bl 800076c <MX_TIM4_Init>
MX_TIM3_Init();
80001da: f000 fa25 bl 8000628 <MX_TIM3_Init>
MX_ADC1_Init();
80001de: f000 f881 bl 80002e4 <MX_ADC1_Init>
MX_TIM1_Init();
80001e2: f000 f8bd bl 8000360 <MX_TIM1_Init>
/* USER CODE BEGIN 2 */
CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
80001e6: 2107 movs r1, #7
80001e8: 480d ldr r0, [pc, #52] @ (8000220 <main+0x64>)
80001ea: f008 faa9 bl 8008740 <CDC_Transmit_FS>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
while (CDC_Available()) {
80001ee: e011 b.n 8000214 <main+0x58>
int c = CDC_ReadByte();
80001f0: f008 f9e4 bl 80085bc <CDC_ReadByte>
80001f4: 6678 str r0, [r7, #100] @ 0x64
// uint8_t out = (uint8_t)c;
// if (out >= 'a' && out <= 'z') out -= 32; // to upper
unsigned char s[100];
sprintf((char*)s,"\nc=%03d",c);
80001f6: 463b mov r3, r7
80001f8: 6e7a ldr r2, [r7, #100] @ 0x64
80001fa: 490a ldr r1, [pc, #40] @ (8000224 <main+0x68>)
80001fc: 4618 mov r0, r3
80001fe: f008 fe7d bl 8008efc <siprintf>
while (CDC_Transmit_FS(s, 6) == USBD_BUSY) {
8000202: bf00 nop
8000204: 463b mov r3, r7
8000206: 2106 movs r1, #6
8000208: 4618 mov r0, r3
800020a: f008 fa99 bl 8008740 <CDC_Transmit_FS>
800020e: 4603 mov r3, r0
8000210: 2b01 cmp r3, #1
8000212: d0f7 beq.n 8000204 <main+0x48>
while (CDC_Available()) {
8000214: f008 f9be bl 8008594 <CDC_Available>
8000218: 4603 mov r3, r0
800021a: 2b00 cmp r3, #0
800021c: d1e8 bne.n 80001f0 <main+0x34>
800021e: e7f9 b.n 8000214 <main+0x58>
8000220: 08009874 .word 0x08009874
8000224: 0800987c .word 0x0800987c
08000228 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8000228: b580 push {r7, lr}
800022a: b094 sub sp, #80 @ 0x50
800022c: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
800022e: f107 0328 add.w r3, r7, #40 @ 0x28
8000232: 2228 movs r2, #40 @ 0x28
8000234: 2100 movs r1, #0
8000236: 4618 mov r0, r3
8000238: f008 fe82 bl 8008f40 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
800023c: f107 0314 add.w r3, r7, #20
8000240: 2200 movs r2, #0
8000242: 601a str r2, [r3, #0]
8000244: 605a str r2, [r3, #4]
8000246: 609a str r2, [r3, #8]
8000248: 60da str r2, [r3, #12]
800024a: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
800024c: 1d3b adds r3, r7, #4
800024e: 2200 movs r2, #0
8000250: 601a str r2, [r3, #0]
8000252: 605a str r2, [r3, #4]
8000254: 609a str r2, [r3, #8]
8000256: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8000258: 2301 movs r3, #1
800025a: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
800025c: f44f 3380 mov.w r3, #65536 @ 0x10000
8000260: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
8000262: 2300 movs r3, #0
8000264: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
8000266: 2301 movs r3, #1
8000268: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
800026a: 2302 movs r3, #2
800026c: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
800026e: f44f 3380 mov.w r3, #65536 @ 0x10000
8000272: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
8000274: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000
8000278: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
800027a: f107 0328 add.w r3, r7, #40 @ 0x28
800027e: 4618 mov r0, r3
8000280: f003 f81e bl 80032c0 <HAL_RCC_OscConfig>
8000284: 4603 mov r3, r0
8000286: 2b00 cmp r3, #0
8000288: d001 beq.n 800028e <SystemClock_Config+0x66>
{
Error_Handler();
800028a: f000 fb69 bl 8000960 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
800028e: 230f movs r3, #15
8000290: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8000292: 2302 movs r3, #2
8000294: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8000296: 2300 movs r3, #0
8000298: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
800029a: f44f 6380 mov.w r3, #1024 @ 0x400
800029e: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
80002a0: 2300 movs r3, #0
80002a2: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
80002a4: f107 0314 add.w r3, r7, #20
80002a8: 2102 movs r1, #2
80002aa: 4618 mov r0, r3
80002ac: f003 fa8a bl 80037c4 <HAL_RCC_ClockConfig>
80002b0: 4603 mov r3, r0
80002b2: 2b00 cmp r3, #0
80002b4: d001 beq.n 80002ba <SystemClock_Config+0x92>
{
Error_Handler();
80002b6: f000 fb53 bl 8000960 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
80002ba: 2312 movs r3, #18
80002bc: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
80002be: f44f 4300 mov.w r3, #32768 @ 0x8000
80002c2: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
80002c4: 2300 movs r3, #0
80002c6: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
80002c8: 1d3b adds r3, r7, #4
80002ca: 4618 mov r0, r3
80002cc: f003 fbd6 bl 8003a7c <HAL_RCCEx_PeriphCLKConfig>
80002d0: 4603 mov r3, r0
80002d2: 2b00 cmp r3, #0
80002d4: d001 beq.n 80002da <SystemClock_Config+0xb2>
{
Error_Handler();
80002d6: f000 fb43 bl 8000960 <Error_Handler>
}
}
80002da: bf00 nop
80002dc: 3750 adds r7, #80 @ 0x50
80002de: 46bd mov sp, r7
80002e0: bd80 pop {r7, pc}
...
080002e4 <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
80002e4: b580 push {r7, lr}
80002e6: b084 sub sp, #16
80002e8: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
80002ea: 1d3b adds r3, r7, #4
80002ec: 2200 movs r2, #0
80002ee: 601a str r2, [r3, #0]
80002f0: 605a str r2, [r3, #4]
80002f2: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
80002f4: 4b18 ldr r3, [pc, #96] @ (8000358 <MX_ADC1_Init+0x74>)
80002f6: 4a19 ldr r2, [pc, #100] @ (800035c <MX_ADC1_Init+0x78>)
80002f8: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
80002fa: 4b17 ldr r3, [pc, #92] @ (8000358 <MX_ADC1_Init+0x74>)
80002fc: 2200 movs r2, #0
80002fe: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = DISABLE;
8000300: 4b15 ldr r3, [pc, #84] @ (8000358 <MX_ADC1_Init+0x74>)
8000302: 2200 movs r2, #0
8000304: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
8000306: 4b14 ldr r3, [pc, #80] @ (8000358 <MX_ADC1_Init+0x74>)
8000308: 2200 movs r2, #0
800030a: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
800030c: 4b12 ldr r3, [pc, #72] @ (8000358 <MX_ADC1_Init+0x74>)
800030e: f44f 2260 mov.w r2, #917504 @ 0xe0000
8000312: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
8000314: 4b10 ldr r3, [pc, #64] @ (8000358 <MX_ADC1_Init+0x74>)
8000316: 2200 movs r2, #0
8000318: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 1;
800031a: 4b0f ldr r3, [pc, #60] @ (8000358 <MX_ADC1_Init+0x74>)
800031c: 2201 movs r2, #1
800031e: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8000320: 480d ldr r0, [pc, #52] @ (8000358 <MX_ADC1_Init+0x74>)
8000322: f000 fd91 bl 8000e48 <HAL_ADC_Init>
8000326: 4603 mov r3, r0
8000328: 2b00 cmp r3, #0
800032a: d001 beq.n 8000330 <MX_ADC1_Init+0x4c>
{
Error_Handler();
800032c: f000 fb18 bl 8000960 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
8000330: 2304 movs r3, #4
8000332: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
8000334: 2301 movs r3, #1
8000336: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
8000338: 2300 movs r3, #0
800033a: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
800033c: 1d3b adds r3, r7, #4
800033e: 4619 mov r1, r3
8000340: 4805 ldr r0, [pc, #20] @ (8000358 <MX_ADC1_Init+0x74>)
8000342: f000 fe59 bl 8000ff8 <HAL_ADC_ConfigChannel>
8000346: 4603 mov r3, r0
8000348: 2b00 cmp r3, #0
800034a: d001 beq.n 8000350 <MX_ADC1_Init+0x6c>
{
Error_Handler();
800034c: f000 fb08 bl 8000960 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
8000350: bf00 nop
8000352: 3710 adds r7, #16
8000354: 46bd mov sp, r7
8000356: bd80 pop {r7, pc}
8000358: 200001e8 .word 0x200001e8
800035c: 40012400 .word 0x40012400
08000360 <MX_TIM1_Init>:
* @brief TIM1 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM1_Init(void)
{
8000360: b580 push {r7, lr}
8000362: b096 sub sp, #88 @ 0x58
8000364: af00 add r7, sp, #0
/* USER CODE BEGIN TIM1_Init 0 */
/* USER CODE END TIM1_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8000366: f107 0348 add.w r3, r7, #72 @ 0x48
800036a: 2200 movs r2, #0
800036c: 601a str r2, [r3, #0]
800036e: 605a str r2, [r3, #4]
8000370: 609a str r2, [r3, #8]
8000372: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8000374: f107 0340 add.w r3, r7, #64 @ 0x40
8000378: 2200 movs r2, #0
800037a: 601a str r2, [r3, #0]
800037c: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
800037e: f107 0324 add.w r3, r7, #36 @ 0x24
8000382: 2200 movs r2, #0
8000384: 601a str r2, [r3, #0]
8000386: 605a str r2, [r3, #4]
8000388: 609a str r2, [r3, #8]
800038a: 60da str r2, [r3, #12]
800038c: 611a str r2, [r3, #16]
800038e: 615a str r2, [r3, #20]
8000390: 619a str r2, [r3, #24]
TIM_BreakDeadTimeConfigTypeDef sBreakDeadTimeConfig = {0};
8000392: 1d3b adds r3, r7, #4
8000394: 2220 movs r2, #32
8000396: 2100 movs r1, #0
8000398: 4618 mov r0, r3
800039a: f008 fdd1 bl 8008f40 <memset>
/* USER CODE BEGIN TIM1_Init 1 */
/* USER CODE END TIM1_Init 1 */
htim1.Instance = TIM1;
800039e: 4b4e ldr r3, [pc, #312] @ (80004d8 <MX_TIM1_Init+0x178>)
80003a0: 4a4e ldr r2, [pc, #312] @ (80004dc <MX_TIM1_Init+0x17c>)
80003a2: 601a str r2, [r3, #0]
htim1.Init.Prescaler = 0;
80003a4: 4b4c ldr r3, [pc, #304] @ (80004d8 <MX_TIM1_Init+0x178>)
80003a6: 2200 movs r2, #0
80003a8: 605a str r2, [r3, #4]
htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
80003aa: 4b4b ldr r3, [pc, #300] @ (80004d8 <MX_TIM1_Init+0x178>)
80003ac: 2200 movs r2, #0
80003ae: 609a str r2, [r3, #8]
htim1.Init.Period = 17999;
80003b0: 4b49 ldr r3, [pc, #292] @ (80004d8 <MX_TIM1_Init+0x178>)
80003b2: f244 624f movw r2, #17999 @ 0x464f
80003b6: 60da str r2, [r3, #12]
htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80003b8: 4b47 ldr r3, [pc, #284] @ (80004d8 <MX_TIM1_Init+0x178>)
80003ba: 2200 movs r2, #0
80003bc: 611a str r2, [r3, #16]
htim1.Init.RepetitionCounter = 0;
80003be: 4b46 ldr r3, [pc, #280] @ (80004d8 <MX_TIM1_Init+0x178>)
80003c0: 2200 movs r2, #0
80003c2: 615a str r2, [r3, #20]
htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80003c4: 4b44 ldr r3, [pc, #272] @ (80004d8 <MX_TIM1_Init+0x178>)
80003c6: 2200 movs r2, #0
80003c8: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim1) != HAL_OK)
80003ca: 4843 ldr r0, [pc, #268] @ (80004d8 <MX_TIM1_Init+0x178>)
80003cc: f003 fc0c bl 8003be8 <HAL_TIM_Base_Init>
80003d0: 4603 mov r3, r0
80003d2: 2b00 cmp r3, #0
80003d4: d001 beq.n 80003da <MX_TIM1_Init+0x7a>
{
Error_Handler();
80003d6: f000 fac3 bl 8000960 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
80003da: f44f 5380 mov.w r3, #4096 @ 0x1000
80003de: 64bb str r3, [r7, #72] @ 0x48
if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK)
80003e0: f107 0348 add.w r3, r7, #72 @ 0x48
80003e4: 4619 mov r1, r3
80003e6: 483c ldr r0, [pc, #240] @ (80004d8 <MX_TIM1_Init+0x178>)
80003e8: f003 fd68 bl 8003ebc <HAL_TIM_ConfigClockSource>
80003ec: 4603 mov r3, r0
80003ee: 2b00 cmp r3, #0
80003f0: d001 beq.n 80003f6 <MX_TIM1_Init+0x96>
{
Error_Handler();
80003f2: f000 fab5 bl 8000960 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim1) != HAL_OK)
80003f6: 4838 ldr r0, [pc, #224] @ (80004d8 <MX_TIM1_Init+0x178>)
80003f8: f003 fc45 bl 8003c86 <HAL_TIM_PWM_Init>
80003fc: 4603 mov r3, r0
80003fe: 2b00 cmp r3, #0
8000400: d001 beq.n 8000406 <MX_TIM1_Init+0xa6>
{
Error_Handler();
8000402: f000 faad bl 8000960 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8000406: 2300 movs r3, #0
8000408: 643b str r3, [r7, #64] @ 0x40
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
800040a: 2300 movs r3, #0
800040c: 647b str r3, [r7, #68] @ 0x44
if (HAL_TIMEx_MasterConfigSynchronization(&htim1, &sMasterConfig) != HAL_OK)
800040e: f107 0340 add.w r3, r7, #64 @ 0x40
8000412: 4619 mov r1, r3
8000414: 4830 ldr r0, [pc, #192] @ (80004d8 <MX_TIM1_Init+0x178>)
8000416: f004 f8a5 bl 8004564 <HAL_TIMEx_MasterConfigSynchronization>
800041a: 4603 mov r3, r0
800041c: 2b00 cmp r3, #0
800041e: d001 beq.n 8000424 <MX_TIM1_Init+0xc4>
{
Error_Handler();
8000420: f000 fa9e bl 8000960 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8000424: 2360 movs r3, #96 @ 0x60
8000426: 627b str r3, [r7, #36] @ 0x24
sConfigOC.Pulse = 2400;
8000428: f44f 6316 mov.w r3, #2400 @ 0x960
800042c: 62bb str r3, [r7, #40] @ 0x28
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
800042e: 2300 movs r3, #0
8000430: 62fb str r3, [r7, #44] @ 0x2c
sConfigOC.OCNPolarity = TIM_OCNPOLARITY_HIGH;
8000432: 2300 movs r3, #0
8000434: 633b str r3, [r7, #48] @ 0x30
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8000436: 2304 movs r3, #4
8000438: 637b str r3, [r7, #52] @ 0x34
sConfigOC.OCIdleState = TIM_OCIDLESTATE_RESET;
800043a: 2300 movs r3, #0
800043c: 63bb str r3, [r7, #56] @ 0x38
sConfigOC.OCNIdleState = TIM_OCNIDLESTATE_RESET;
800043e: 2300 movs r3, #0
8000440: 63fb str r3, [r7, #60] @ 0x3c
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8000442: f107 0324 add.w r3, r7, #36 @ 0x24
8000446: 2200 movs r2, #0
8000448: 4619 mov r1, r3
800044a: 4823 ldr r0, [pc, #140] @ (80004d8 <MX_TIM1_Init+0x178>)
800044c: f003 fc74 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
8000450: 4603 mov r3, r0
8000452: 2b00 cmp r3, #0
8000454: d001 beq.n 800045a <MX_TIM1_Init+0xfa>
{
Error_Handler();
8000456: f000 fa83 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 5500;
800045a: f241 537c movw r3, #5500 @ 0x157c
800045e: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8000460: f107 0324 add.w r3, r7, #36 @ 0x24
8000464: 2204 movs r2, #4
8000466: 4619 mov r1, r3
8000468: 481b ldr r0, [pc, #108] @ (80004d8 <MX_TIM1_Init+0x178>)
800046a: f003 fc65 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
800046e: 4603 mov r3, r0
8000470: 2b00 cmp r3, #0
8000472: d001 beq.n 8000478 <MX_TIM1_Init+0x118>
{
Error_Handler();
8000474: f000 fa74 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 6500;
8000478: f641 1364 movw r3, #6500 @ 0x1964
800047c: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_PWM_ConfigChannel(&htim1, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
800047e: f107 0324 add.w r3, r7, #36 @ 0x24
8000482: 2208 movs r2, #8
8000484: 4619 mov r1, r3
8000486: 4814 ldr r0, [pc, #80] @ (80004d8 <MX_TIM1_Init+0x178>)
8000488: f003 fc56 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
800048c: 4603 mov r3, r0
800048e: 2b00 cmp r3, #0
8000490: d001 beq.n 8000496 <MX_TIM1_Init+0x136>
{
Error_Handler();
8000492: f000 fa65 bl 8000960 <Error_Handler>
}
sBreakDeadTimeConfig.OffStateRunMode = TIM_OSSR_DISABLE;
8000496: 2300 movs r3, #0
8000498: 607b str r3, [r7, #4]
sBreakDeadTimeConfig.OffStateIDLEMode = TIM_OSSI_DISABLE;
800049a: 2300 movs r3, #0
800049c: 60bb str r3, [r7, #8]
sBreakDeadTimeConfig.LockLevel = TIM_LOCKLEVEL_OFF;
800049e: 2300 movs r3, #0
80004a0: 60fb str r3, [r7, #12]
sBreakDeadTimeConfig.DeadTime = 0;
80004a2: 2300 movs r3, #0
80004a4: 613b str r3, [r7, #16]
sBreakDeadTimeConfig.BreakState = TIM_BREAK_DISABLE;
80004a6: 2300 movs r3, #0
80004a8: 617b str r3, [r7, #20]
sBreakDeadTimeConfig.BreakPolarity = TIM_BREAKPOLARITY_HIGH;
80004aa: f44f 5300 mov.w r3, #8192 @ 0x2000
80004ae: 61bb str r3, [r7, #24]
sBreakDeadTimeConfig.AutomaticOutput = TIM_AUTOMATICOUTPUT_DISABLE;
80004b0: 2300 movs r3, #0
80004b2: 623b str r3, [r7, #32]
if (HAL_TIMEx_ConfigBreakDeadTime(&htim1, &sBreakDeadTimeConfig) != HAL_OK)
80004b4: 1d3b adds r3, r7, #4
80004b6: 4619 mov r1, r3
80004b8: 4807 ldr r0, [pc, #28] @ (80004d8 <MX_TIM1_Init+0x178>)
80004ba: f004 f8b1 bl 8004620 <HAL_TIMEx_ConfigBreakDeadTime>
80004be: 4603 mov r3, r0
80004c0: 2b00 cmp r3, #0
80004c2: d001 beq.n 80004c8 <MX_TIM1_Init+0x168>
{
Error_Handler();
80004c4: f000 fa4c bl 8000960 <Error_Handler>
}
/* USER CODE BEGIN TIM1_Init 2 */
/* USER CODE END TIM1_Init 2 */
HAL_TIM_MspPostInit(&htim1);
80004c8: 4803 ldr r0, [pc, #12] @ (80004d8 <MX_TIM1_Init+0x178>)
80004ca: f000 fb15 bl 8000af8 <HAL_TIM_MspPostInit>
}
80004ce: bf00 nop
80004d0: 3758 adds r7, #88 @ 0x58
80004d2: 46bd mov sp, r7
80004d4: bd80 pop {r7, pc}
80004d6: bf00 nop
80004d8: 20000218 .word 0x20000218
80004dc: 40012c00 .word 0x40012c00
080004e0 <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
80004e0: b580 push {r7, lr}
80004e2: b08e sub sp, #56 @ 0x38
80004e4: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
80004e6: f107 0328 add.w r3, r7, #40 @ 0x28
80004ea: 2200 movs r2, #0
80004ec: 601a str r2, [r3, #0]
80004ee: 605a str r2, [r3, #4]
80004f0: 609a str r2, [r3, #8]
80004f2: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
80004f4: f107 0320 add.w r3, r7, #32
80004f8: 2200 movs r2, #0
80004fa: 601a str r2, [r3, #0]
80004fc: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
80004fe: 1d3b adds r3, r7, #4
8000500: 2200 movs r2, #0
8000502: 601a str r2, [r3, #0]
8000504: 605a str r2, [r3, #4]
8000506: 609a str r2, [r3, #8]
8000508: 60da str r2, [r3, #12]
800050a: 611a str r2, [r3, #16]
800050c: 615a str r2, [r3, #20]
800050e: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8000510: 4b44 ldr r3, [pc, #272] @ (8000624 <MX_TIM2_Init+0x144>)
8000512: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8000516: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8000518: 4b42 ldr r3, [pc, #264] @ (8000624 <MX_TIM2_Init+0x144>)
800051a: 2200 movs r2, #0
800051c: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
800051e: 4b41 ldr r3, [pc, #260] @ (8000624 <MX_TIM2_Init+0x144>)
8000520: 2200 movs r2, #0
8000522: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
8000524: 4b3f ldr r3, [pc, #252] @ (8000624 <MX_TIM2_Init+0x144>)
8000526: f244 624f movw r2, #17999 @ 0x464f
800052a: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
800052c: 4b3d ldr r3, [pc, #244] @ (8000624 <MX_TIM2_Init+0x144>)
800052e: 2200 movs r2, #0
8000530: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8000532: 4b3c ldr r3, [pc, #240] @ (8000624 <MX_TIM2_Init+0x144>)
8000534: 2200 movs r2, #0
8000536: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
8000538: 483a ldr r0, [pc, #232] @ (8000624 <MX_TIM2_Init+0x144>)
800053a: f003 fb55 bl 8003be8 <HAL_TIM_Base_Init>
800053e: 4603 mov r3, r0
8000540: 2b00 cmp r3, #0
8000542: d001 beq.n 8000548 <MX_TIM2_Init+0x68>
{
Error_Handler();
8000544: f000 fa0c bl 8000960 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8000548: f44f 5380 mov.w r3, #4096 @ 0x1000
800054c: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
800054e: f107 0328 add.w r3, r7, #40 @ 0x28
8000552: 4619 mov r1, r3
8000554: 4833 ldr r0, [pc, #204] @ (8000624 <MX_TIM2_Init+0x144>)
8000556: f003 fcb1 bl 8003ebc <HAL_TIM_ConfigClockSource>
800055a: 4603 mov r3, r0
800055c: 2b00 cmp r3, #0
800055e: d001 beq.n 8000564 <MX_TIM2_Init+0x84>
{
Error_Handler();
8000560: f000 f9fe bl 8000960 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
8000564: 482f ldr r0, [pc, #188] @ (8000624 <MX_TIM2_Init+0x144>)
8000566: f003 fb8e bl 8003c86 <HAL_TIM_PWM_Init>
800056a: 4603 mov r3, r0
800056c: 2b00 cmp r3, #0
800056e: d001 beq.n 8000574 <MX_TIM2_Init+0x94>
{
Error_Handler();
8000570: f000 f9f6 bl 8000960 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8000574: 2300 movs r3, #0
8000576: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8000578: 2300 movs r3, #0
800057a: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
800057c: f107 0320 add.w r3, r7, #32
8000580: 4619 mov r1, r3
8000582: 4828 ldr r0, [pc, #160] @ (8000624 <MX_TIM2_Init+0x144>)
8000584: f003 ffee bl 8004564 <HAL_TIMEx_MasterConfigSynchronization>
8000588: 4603 mov r3, r0
800058a: 2b00 cmp r3, #0
800058c: d001 beq.n 8000592 <MX_TIM2_Init+0xb2>
{
Error_Handler();
800058e: f000 f9e7 bl 8000960 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8000592: 2360 movs r3, #96 @ 0x60
8000594: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
8000596: f44f 737a mov.w r3, #1000 @ 0x3e8
800059a: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
800059c: 2300 movs r3, #0
800059e: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80005a0: 2304 movs r3, #4
80005a2: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
80005a4: 1d3b adds r3, r7, #4
80005a6: 2200 movs r2, #0
80005a8: 4619 mov r1, r3
80005aa: 481e ldr r0, [pc, #120] @ (8000624 <MX_TIM2_Init+0x144>)
80005ac: f003 fbc4 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
80005b0: 4603 mov r3, r0
80005b2: 2b00 cmp r3, #0
80005b4: d001 beq.n 80005ba <MX_TIM2_Init+0xda>
{
Error_Handler();
80005b6: f000 f9d3 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 2000;
80005ba: f44f 63fa mov.w r3, #2000 @ 0x7d0
80005be: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
80005c0: 1d3b adds r3, r7, #4
80005c2: 2204 movs r2, #4
80005c4: 4619 mov r1, r3
80005c6: 4817 ldr r0, [pc, #92] @ (8000624 <MX_TIM2_Init+0x144>)
80005c8: f003 fbb6 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
80005cc: 4603 mov r3, r0
80005ce: 2b00 cmp r3, #0
80005d0: d001 beq.n 80005d6 <MX_TIM2_Init+0xf6>
{
Error_Handler();
80005d2: f000 f9c5 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 3000;
80005d6: f640 33b8 movw r3, #3000 @ 0xbb8
80005da: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
80005dc: 2300 movs r3, #0
80005de: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
80005e0: 1d3b adds r3, r7, #4
80005e2: 2208 movs r2, #8
80005e4: 4619 mov r1, r3
80005e6: 480f ldr r0, [pc, #60] @ (8000624 <MX_TIM2_Init+0x144>)
80005e8: f003 fba6 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
80005ec: 4603 mov r3, r0
80005ee: 2b00 cmp r3, #0
80005f0: d001 beq.n 80005f6 <MX_TIM2_Init+0x116>
{
Error_Handler();
80005f2: f000 f9b5 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 4000;
80005f6: f44f 637a mov.w r3, #4000 @ 0xfa0
80005fa: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80005fc: 2304 movs r3, #4
80005fe: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8000600: 1d3b adds r3, r7, #4
8000602: 220c movs r2, #12
8000604: 4619 mov r1, r3
8000606: 4807 ldr r0, [pc, #28] @ (8000624 <MX_TIM2_Init+0x144>)
8000608: f003 fb96 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
800060c: 4603 mov r3, r0
800060e: 2b00 cmp r3, #0
8000610: d001 beq.n 8000616 <MX_TIM2_Init+0x136>
{
Error_Handler();
8000612: f000 f9a5 bl 8000960 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
8000616: 4803 ldr r0, [pc, #12] @ (8000624 <MX_TIM2_Init+0x144>)
8000618: f000 fa6e bl 8000af8 <HAL_TIM_MspPostInit>
}
800061c: bf00 nop
800061e: 3738 adds r7, #56 @ 0x38
8000620: 46bd mov sp, r7
8000622: bd80 pop {r7, pc}
8000624: 20000260 .word 0x20000260
08000628 <MX_TIM3_Init>:
* @brief TIM3 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM3_Init(void)
{
8000628: b580 push {r7, lr}
800062a: b08e sub sp, #56 @ 0x38
800062c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM3_Init 0 */
/* USER CODE END TIM3_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
800062e: f107 0328 add.w r3, r7, #40 @ 0x28
8000632: 2200 movs r2, #0
8000634: 601a str r2, [r3, #0]
8000636: 605a str r2, [r3, #4]
8000638: 609a str r2, [r3, #8]
800063a: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
800063c: f107 0320 add.w r3, r7, #32
8000640: 2200 movs r2, #0
8000642: 601a str r2, [r3, #0]
8000644: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
8000646: 1d3b adds r3, r7, #4
8000648: 2200 movs r2, #0
800064a: 601a str r2, [r3, #0]
800064c: 605a str r2, [r3, #4]
800064e: 609a str r2, [r3, #8]
8000650: 60da str r2, [r3, #12]
8000652: 611a str r2, [r3, #16]
8000654: 615a str r2, [r3, #20]
8000656: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM3_Init 1 */
/* USER CODE END TIM3_Init 1 */
htim3.Instance = TIM3;
8000658: 4b42 ldr r3, [pc, #264] @ (8000764 <MX_TIM3_Init+0x13c>)
800065a: 4a43 ldr r2, [pc, #268] @ (8000768 <MX_TIM3_Init+0x140>)
800065c: 601a str r2, [r3, #0]
htim3.Init.Prescaler = 0;
800065e: 4b41 ldr r3, [pc, #260] @ (8000764 <MX_TIM3_Init+0x13c>)
8000660: 2200 movs r2, #0
8000662: 605a str r2, [r3, #4]
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
8000664: 4b3f ldr r3, [pc, #252] @ (8000764 <MX_TIM3_Init+0x13c>)
8000666: 2200 movs r2, #0
8000668: 609a str r2, [r3, #8]
htim3.Init.Period = 17999;
800066a: 4b3e ldr r3, [pc, #248] @ (8000764 <MX_TIM3_Init+0x13c>)
800066c: f244 624f movw r2, #17999 @ 0x464f
8000670: 60da str r2, [r3, #12]
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8000672: 4b3c ldr r3, [pc, #240] @ (8000764 <MX_TIM3_Init+0x13c>)
8000674: 2200 movs r2, #0
8000676: 611a str r2, [r3, #16]
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8000678: 4b3a ldr r3, [pc, #232] @ (8000764 <MX_TIM3_Init+0x13c>)
800067a: 2200 movs r2, #0
800067c: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
800067e: 4839 ldr r0, [pc, #228] @ (8000764 <MX_TIM3_Init+0x13c>)
8000680: f003 fab2 bl 8003be8 <HAL_TIM_Base_Init>
8000684: 4603 mov r3, r0
8000686: 2b00 cmp r3, #0
8000688: d001 beq.n 800068e <MX_TIM3_Init+0x66>
{
Error_Handler();
800068a: f000 f969 bl 8000960 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
800068e: f44f 5380 mov.w r3, #4096 @ 0x1000
8000692: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
8000694: f107 0328 add.w r3, r7, #40 @ 0x28
8000698: 4619 mov r1, r3
800069a: 4832 ldr r0, [pc, #200] @ (8000764 <MX_TIM3_Init+0x13c>)
800069c: f003 fc0e bl 8003ebc <HAL_TIM_ConfigClockSource>
80006a0: 4603 mov r3, r0
80006a2: 2b00 cmp r3, #0
80006a4: d001 beq.n 80006aa <MX_TIM3_Init+0x82>
{
Error_Handler();
80006a6: f000 f95b bl 8000960 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
80006aa: 482e ldr r0, [pc, #184] @ (8000764 <MX_TIM3_Init+0x13c>)
80006ac: f003 faeb bl 8003c86 <HAL_TIM_PWM_Init>
80006b0: 4603 mov r3, r0
80006b2: 2b00 cmp r3, #0
80006b4: d001 beq.n 80006ba <MX_TIM3_Init+0x92>
{
Error_Handler();
80006b6: f000 f953 bl 8000960 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80006ba: 2300 movs r3, #0
80006bc: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80006be: 2300 movs r3, #0
80006c0: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
80006c2: f107 0320 add.w r3, r7, #32
80006c6: 4619 mov r1, r3
80006c8: 4826 ldr r0, [pc, #152] @ (8000764 <MX_TIM3_Init+0x13c>)
80006ca: f003 ff4b bl 8004564 <HAL_TIMEx_MasterConfigSynchronization>
80006ce: 4603 mov r3, r0
80006d0: 2b00 cmp r3, #0
80006d2: d001 beq.n 80006d8 <MX_TIM3_Init+0xb0>
{
Error_Handler();
80006d4: f000 f944 bl 8000960 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
80006d8: 2360 movs r3, #96 @ 0x60
80006da: 607b str r3, [r7, #4]
sConfigOC.Pulse = 9000;
80006dc: f242 3328 movw r3, #9000 @ 0x2328
80006e0: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
80006e2: 2300 movs r3, #0
80006e4: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80006e6: 2304 movs r3, #4
80006e8: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
80006ea: 1d3b adds r3, r7, #4
80006ec: 2200 movs r2, #0
80006ee: 4619 mov r1, r3
80006f0: 481c ldr r0, [pc, #112] @ (8000764 <MX_TIM3_Init+0x13c>)
80006f2: f003 fb21 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
80006f6: 4603 mov r3, r0
80006f8: 2b00 cmp r3, #0
80006fa: d001 beq.n 8000700 <MX_TIM3_Init+0xd8>
{
Error_Handler();
80006fc: f000 f930 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 10000;
8000700: f242 7310 movw r3, #10000 @ 0x2710
8000704: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8000706: 1d3b adds r3, r7, #4
8000708: 2204 movs r2, #4
800070a: 4619 mov r1, r3
800070c: 4815 ldr r0, [pc, #84] @ (8000764 <MX_TIM3_Init+0x13c>)
800070e: f003 fb13 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
8000712: 4603 mov r3, r0
8000714: 2b00 cmp r3, #0
8000716: d001 beq.n 800071c <MX_TIM3_Init+0xf4>
{
Error_Handler();
8000718: f000 f922 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 11000;
800071c: f642 23f8 movw r3, #11000 @ 0x2af8
8000720: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8000722: 1d3b adds r3, r7, #4
8000724: 2208 movs r2, #8
8000726: 4619 mov r1, r3
8000728: 480e ldr r0, [pc, #56] @ (8000764 <MX_TIM3_Init+0x13c>)
800072a: f003 fb05 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
800072e: 4603 mov r3, r0
8000730: 2b00 cmp r3, #0
8000732: d001 beq.n 8000738 <MX_TIM3_Init+0x110>
{
Error_Handler();
8000734: f000 f914 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 12000;
8000738: f642 63e0 movw r3, #12000 @ 0x2ee0
800073c: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
800073e: 1d3b adds r3, r7, #4
8000740: 220c movs r2, #12
8000742: 4619 mov r1, r3
8000744: 4807 ldr r0, [pc, #28] @ (8000764 <MX_TIM3_Init+0x13c>)
8000746: f003 faf7 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
800074a: 4603 mov r3, r0
800074c: 2b00 cmp r3, #0
800074e: d001 beq.n 8000754 <MX_TIM3_Init+0x12c>
{
Error_Handler();
8000750: f000 f906 bl 8000960 <Error_Handler>
}
/* USER CODE BEGIN TIM3_Init 2 */
/* USER CODE END TIM3_Init 2 */
HAL_TIM_MspPostInit(&htim3);
8000754: 4803 ldr r0, [pc, #12] @ (8000764 <MX_TIM3_Init+0x13c>)
8000756: f000 f9cf bl 8000af8 <HAL_TIM_MspPostInit>
}
800075a: bf00 nop
800075c: 3738 adds r7, #56 @ 0x38
800075e: 46bd mov sp, r7
8000760: bd80 pop {r7, pc}
8000762: bf00 nop
8000764: 200002a8 .word 0x200002a8
8000768: 40000400 .word 0x40000400
0800076c <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
800076c: b580 push {r7, lr}
800076e: b08e sub sp, #56 @ 0x38
8000770: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8000772: f107 0328 add.w r3, r7, #40 @ 0x28
8000776: 2200 movs r2, #0
8000778: 601a str r2, [r3, #0]
800077a: 605a str r2, [r3, #4]
800077c: 609a str r2, [r3, #8]
800077e: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8000780: f107 0320 add.w r3, r7, #32
8000784: 2200 movs r2, #0
8000786: 601a str r2, [r3, #0]
8000788: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
800078a: 1d3b adds r3, r7, #4
800078c: 2200 movs r2, #0
800078e: 601a str r2, [r3, #0]
8000790: 605a str r2, [r3, #4]
8000792: 609a str r2, [r3, #8]
8000794: 60da str r2, [r3, #12]
8000796: 611a str r2, [r3, #16]
8000798: 615a str r2, [r3, #20]
800079a: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
800079c: 4b42 ldr r3, [pc, #264] @ (80008a8 <MX_TIM4_Init+0x13c>)
800079e: 4a43 ldr r2, [pc, #268] @ (80008ac <MX_TIM4_Init+0x140>)
80007a0: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
80007a2: 4b41 ldr r3, [pc, #260] @ (80008a8 <MX_TIM4_Init+0x13c>)
80007a4: 2200 movs r2, #0
80007a6: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
80007a8: 4b3f ldr r3, [pc, #252] @ (80008a8 <MX_TIM4_Init+0x13c>)
80007aa: 2200 movs r2, #0
80007ac: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
80007ae: 4b3e ldr r3, [pc, #248] @ (80008a8 <MX_TIM4_Init+0x13c>)
80007b0: f244 624f movw r2, #17999 @ 0x464f
80007b4: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80007b6: 4b3c ldr r3, [pc, #240] @ (80008a8 <MX_TIM4_Init+0x13c>)
80007b8: 2200 movs r2, #0
80007ba: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80007bc: 4b3a ldr r3, [pc, #232] @ (80008a8 <MX_TIM4_Init+0x13c>)
80007be: 2200 movs r2, #0
80007c0: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
80007c2: 4839 ldr r0, [pc, #228] @ (80008a8 <MX_TIM4_Init+0x13c>)
80007c4: f003 fa10 bl 8003be8 <HAL_TIM_Base_Init>
80007c8: 4603 mov r3, r0
80007ca: 2b00 cmp r3, #0
80007cc: d001 beq.n 80007d2 <MX_TIM4_Init+0x66>
{
Error_Handler();
80007ce: f000 f8c7 bl 8000960 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
80007d2: f44f 5380 mov.w r3, #4096 @ 0x1000
80007d6: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
80007d8: f107 0328 add.w r3, r7, #40 @ 0x28
80007dc: 4619 mov r1, r3
80007de: 4832 ldr r0, [pc, #200] @ (80008a8 <MX_TIM4_Init+0x13c>)
80007e0: f003 fb6c bl 8003ebc <HAL_TIM_ConfigClockSource>
80007e4: 4603 mov r3, r0
80007e6: 2b00 cmp r3, #0
80007e8: d001 beq.n 80007ee <MX_TIM4_Init+0x82>
{
Error_Handler();
80007ea: f000 f8b9 bl 8000960 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
80007ee: 482e ldr r0, [pc, #184] @ (80008a8 <MX_TIM4_Init+0x13c>)
80007f0: f003 fa49 bl 8003c86 <HAL_TIM_PWM_Init>
80007f4: 4603 mov r3, r0
80007f6: 2b00 cmp r3, #0
80007f8: d001 beq.n 80007fe <MX_TIM4_Init+0x92>
{
Error_Handler();
80007fa: f000 f8b1 bl 8000960 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80007fe: 2300 movs r3, #0
8000800: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8000802: 2300 movs r3, #0
8000804: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
8000806: f107 0320 add.w r3, r7, #32
800080a: 4619 mov r1, r3
800080c: 4826 ldr r0, [pc, #152] @ (80008a8 <MX_TIM4_Init+0x13c>)
800080e: f003 fea9 bl 8004564 <HAL_TIMEx_MasterConfigSynchronization>
8000812: 4603 mov r3, r0
8000814: 2b00 cmp r3, #0
8000816: d001 beq.n 800081c <MX_TIM4_Init+0xb0>
{
Error_Handler();
8000818: f000 f8a2 bl 8000960 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
800081c: 2360 movs r3, #96 @ 0x60
800081e: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
8000820: f241 3388 movw r3, #5000 @ 0x1388
8000824: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8000826: 2300 movs r3, #0
8000828: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800082a: 2304 movs r3, #4
800082c: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
800082e: 1d3b adds r3, r7, #4
8000830: 2200 movs r2, #0
8000832: 4619 mov r1, r3
8000834: 481c ldr r0, [pc, #112] @ (80008a8 <MX_TIM4_Init+0x13c>)
8000836: f003 fa7f bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
800083a: 4603 mov r3, r0
800083c: 2b00 cmp r3, #0
800083e: d001 beq.n 8000844 <MX_TIM4_Init+0xd8>
{
Error_Handler();
8000840: f000 f88e bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 6000;
8000844: f241 7370 movw r3, #6000 @ 0x1770
8000848: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
800084a: 1d3b adds r3, r7, #4
800084c: 2204 movs r2, #4
800084e: 4619 mov r1, r3
8000850: 4815 ldr r0, [pc, #84] @ (80008a8 <MX_TIM4_Init+0x13c>)
8000852: f003 fa71 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
8000856: 4603 mov r3, r0
8000858: 2b00 cmp r3, #0
800085a: d001 beq.n 8000860 <MX_TIM4_Init+0xf4>
{
Error_Handler();
800085c: f000 f880 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 7000;
8000860: f641 3358 movw r3, #7000 @ 0x1b58
8000864: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8000866: 1d3b adds r3, r7, #4
8000868: 2208 movs r2, #8
800086a: 4619 mov r1, r3
800086c: 480e ldr r0, [pc, #56] @ (80008a8 <MX_TIM4_Init+0x13c>)
800086e: f003 fa63 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
8000872: 4603 mov r3, r0
8000874: 2b00 cmp r3, #0
8000876: d001 beq.n 800087c <MX_TIM4_Init+0x110>
{
Error_Handler();
8000878: f000 f872 bl 8000960 <Error_Handler>
}
sConfigOC.Pulse = 8000;
800087c: f44f 53fa mov.w r3, #8000 @ 0x1f40
8000880: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8000882: 1d3b adds r3, r7, #4
8000884: 220c movs r2, #12
8000886: 4619 mov r1, r3
8000888: 4807 ldr r0, [pc, #28] @ (80008a8 <MX_TIM4_Init+0x13c>)
800088a: f003 fa55 bl 8003d38 <HAL_TIM_PWM_ConfigChannel>
800088e: 4603 mov r3, r0
8000890: 2b00 cmp r3, #0
8000892: d001 beq.n 8000898 <MX_TIM4_Init+0x12c>
{
Error_Handler();
8000894: f000 f864 bl 8000960 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
8000898: 4803 ldr r0, [pc, #12] @ (80008a8 <MX_TIM4_Init+0x13c>)
800089a: f000 f92d bl 8000af8 <HAL_TIM_MspPostInit>
}
800089e: bf00 nop
80008a0: 3738 adds r7, #56 @ 0x38
80008a2: 46bd mov sp, r7
80008a4: bd80 pop {r7, pc}
80008a6: bf00 nop
80008a8: 200002f0 .word 0x200002f0
80008ac: 40000800 .word 0x40000800
080008b0 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
80008b0: b580 push {r7, lr}
80008b2: b088 sub sp, #32
80008b4: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
80008b6: f107 0310 add.w r3, r7, #16
80008ba: 2200 movs r2, #0
80008bc: 601a str r2, [r3, #0]
80008be: 605a str r2, [r3, #4]
80008c0: 609a str r2, [r3, #8]
80008c2: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
80008c4: 4b24 ldr r3, [pc, #144] @ (8000958 <MX_GPIO_Init+0xa8>)
80008c6: 699b ldr r3, [r3, #24]
80008c8: 4a23 ldr r2, [pc, #140] @ (8000958 <MX_GPIO_Init+0xa8>)
80008ca: f043 0310 orr.w r3, r3, #16
80008ce: 6193 str r3, [r2, #24]
80008d0: 4b21 ldr r3, [pc, #132] @ (8000958 <MX_GPIO_Init+0xa8>)
80008d2: 699b ldr r3, [r3, #24]
80008d4: f003 0310 and.w r3, r3, #16
80008d8: 60fb str r3, [r7, #12]
80008da: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
80008dc: 4b1e ldr r3, [pc, #120] @ (8000958 <MX_GPIO_Init+0xa8>)
80008de: 699b ldr r3, [r3, #24]
80008e0: 4a1d ldr r2, [pc, #116] @ (8000958 <MX_GPIO_Init+0xa8>)
80008e2: f043 0320 orr.w r3, r3, #32
80008e6: 6193 str r3, [r2, #24]
80008e8: 4b1b ldr r3, [pc, #108] @ (8000958 <MX_GPIO_Init+0xa8>)
80008ea: 699b ldr r3, [r3, #24]
80008ec: f003 0320 and.w r3, r3, #32
80008f0: 60bb str r3, [r7, #8]
80008f2: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
80008f4: 4b18 ldr r3, [pc, #96] @ (8000958 <MX_GPIO_Init+0xa8>)
80008f6: 699b ldr r3, [r3, #24]
80008f8: 4a17 ldr r2, [pc, #92] @ (8000958 <MX_GPIO_Init+0xa8>)
80008fa: f043 0304 orr.w r3, r3, #4
80008fe: 6193 str r3, [r2, #24]
8000900: 4b15 ldr r3, [pc, #84] @ (8000958 <MX_GPIO_Init+0xa8>)
8000902: 699b ldr r3, [r3, #24]
8000904: f003 0304 and.w r3, r3, #4
8000908: 607b str r3, [r7, #4]
800090a: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
800090c: 4b12 ldr r3, [pc, #72] @ (8000958 <MX_GPIO_Init+0xa8>)
800090e: 699b ldr r3, [r3, #24]
8000910: 4a11 ldr r2, [pc, #68] @ (8000958 <MX_GPIO_Init+0xa8>)
8000912: f043 0308 orr.w r3, r3, #8
8000916: 6193 str r3, [r2, #24]
8000918: 4b0f ldr r3, [pc, #60] @ (8000958 <MX_GPIO_Init+0xa8>)
800091a: 699b ldr r3, [r3, #24]
800091c: f003 0308 and.w r3, r3, #8
8000920: 603b str r3, [r7, #0]
8000922: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET);
8000924: 2200 movs r2, #0
8000926: f44f 5100 mov.w r1, #8192 @ 0x2000
800092a: 480c ldr r0, [pc, #48] @ (800095c <MX_GPIO_Init+0xac>)
800092c: f000 ff36 bl 800179c <HAL_GPIO_WritePin>
/*Configure GPIO pin : PC13 */
GPIO_InitStruct.Pin = GPIO_PIN_13;
8000930: f44f 5300 mov.w r3, #8192 @ 0x2000
8000934: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8000936: 2301 movs r3, #1
8000938: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800093a: 2300 movs r3, #0
800093c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800093e: 2302 movs r3, #2
8000940: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8000942: f107 0310 add.w r3, r7, #16
8000946: 4619 mov r1, r3
8000948: 4804 ldr r0, [pc, #16] @ (800095c <MX_GPIO_Init+0xac>)
800094a: f000 fda3 bl 8001494 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
800094e: bf00 nop
8000950: 3720 adds r7, #32
8000952: 46bd mov sp, r7
8000954: bd80 pop {r7, pc}
8000956: bf00 nop
8000958: 40021000 .word 0x40021000
800095c: 40011000 .word 0x40011000
08000960 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8000960: b480 push {r7}
8000962: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8000964: b672 cpsid i
}
8000966: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
8000968: bf00 nop
800096a: e7fd b.n 8000968 <Error_Handler+0x8>
0800096c <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
800096c: b480 push {r7}
800096e: b085 sub sp, #20
8000970: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8000972: 4b15 ldr r3, [pc, #84] @ (80009c8 <HAL_MspInit+0x5c>)
8000974: 699b ldr r3, [r3, #24]
8000976: 4a14 ldr r2, [pc, #80] @ (80009c8 <HAL_MspInit+0x5c>)
8000978: f043 0301 orr.w r3, r3, #1
800097c: 6193 str r3, [r2, #24]
800097e: 4b12 ldr r3, [pc, #72] @ (80009c8 <HAL_MspInit+0x5c>)
8000980: 699b ldr r3, [r3, #24]
8000982: f003 0301 and.w r3, r3, #1
8000986: 60bb str r3, [r7, #8]
8000988: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
800098a: 4b0f ldr r3, [pc, #60] @ (80009c8 <HAL_MspInit+0x5c>)
800098c: 69db ldr r3, [r3, #28]
800098e: 4a0e ldr r2, [pc, #56] @ (80009c8 <HAL_MspInit+0x5c>)
8000990: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8000994: 61d3 str r3, [r2, #28]
8000996: 4b0c ldr r3, [pc, #48] @ (80009c8 <HAL_MspInit+0x5c>)
8000998: 69db ldr r3, [r3, #28]
800099a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800099e: 607b str r3, [r7, #4]
80009a0: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** DISABLE: JTAG-DP Disabled and SW-DP Disabled
*/
__HAL_AFIO_REMAP_SWJ_DISABLE();
80009a2: 4b0a ldr r3, [pc, #40] @ (80009cc <HAL_MspInit+0x60>)
80009a4: 685b ldr r3, [r3, #4]
80009a6: 60fb str r3, [r7, #12]
80009a8: 68fb ldr r3, [r7, #12]
80009aa: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
80009ae: 60fb str r3, [r7, #12]
80009b0: 68fb ldr r3, [r7, #12]
80009b2: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000
80009b6: 60fb str r3, [r7, #12]
80009b8: 4a04 ldr r2, [pc, #16] @ (80009cc <HAL_MspInit+0x60>)
80009ba: 68fb ldr r3, [r7, #12]
80009bc: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
80009be: bf00 nop
80009c0: 3714 adds r7, #20
80009c2: 46bd mov sp, r7
80009c4: bc80 pop {r7}
80009c6: 4770 bx lr
80009c8: 40021000 .word 0x40021000
80009cc: 40010000 .word 0x40010000
080009d0 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
80009d0: b580 push {r7, lr}
80009d2: b088 sub sp, #32
80009d4: af00 add r7, sp, #0
80009d6: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
80009d8: f107 0310 add.w r3, r7, #16
80009dc: 2200 movs r2, #0
80009de: 601a str r2, [r3, #0]
80009e0: 605a str r2, [r3, #4]
80009e2: 609a str r2, [r3, #8]
80009e4: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
80009e6: 687b ldr r3, [r7, #4]
80009e8: 681b ldr r3, [r3, #0]
80009ea: 4a14 ldr r2, [pc, #80] @ (8000a3c <HAL_ADC_MspInit+0x6c>)
80009ec: 4293 cmp r3, r2
80009ee: d121 bne.n 8000a34 <HAL_ADC_MspInit+0x64>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
80009f0: 4b13 ldr r3, [pc, #76] @ (8000a40 <HAL_ADC_MspInit+0x70>)
80009f2: 699b ldr r3, [r3, #24]
80009f4: 4a12 ldr r2, [pc, #72] @ (8000a40 <HAL_ADC_MspInit+0x70>)
80009f6: f443 7300 orr.w r3, r3, #512 @ 0x200
80009fa: 6193 str r3, [r2, #24]
80009fc: 4b10 ldr r3, [pc, #64] @ (8000a40 <HAL_ADC_MspInit+0x70>)
80009fe: 699b ldr r3, [r3, #24]
8000a00: f403 7300 and.w r3, r3, #512 @ 0x200
8000a04: 60fb str r3, [r7, #12]
8000a06: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8000a08: 4b0d ldr r3, [pc, #52] @ (8000a40 <HAL_ADC_MspInit+0x70>)
8000a0a: 699b ldr r3, [r3, #24]
8000a0c: 4a0c ldr r2, [pc, #48] @ (8000a40 <HAL_ADC_MspInit+0x70>)
8000a0e: f043 0304 orr.w r3, r3, #4
8000a12: 6193 str r3, [r2, #24]
8000a14: 4b0a ldr r3, [pc, #40] @ (8000a40 <HAL_ADC_MspInit+0x70>)
8000a16: 699b ldr r3, [r3, #24]
8000a18: f003 0304 and.w r3, r3, #4
8000a1c: 60bb str r3, [r7, #8]
8000a1e: 68bb ldr r3, [r7, #8]
/**ADC1 GPIO Configuration
PA4 ------> ADC1_IN4
PA5 ------> ADC1_IN5
*/
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5;
8000a20: 2330 movs r3, #48 @ 0x30
8000a22: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8000a24: 2303 movs r3, #3
8000a26: 617b str r3, [r7, #20]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000a28: f107 0310 add.w r3, r7, #16
8000a2c: 4619 mov r1, r3
8000a2e: 4805 ldr r0, [pc, #20] @ (8000a44 <HAL_ADC_MspInit+0x74>)
8000a30: f000 fd30 bl 8001494 <HAL_GPIO_Init>
/* USER CODE END ADC1_MspInit 1 */
}
}
8000a34: bf00 nop
8000a36: 3720 adds r7, #32
8000a38: 46bd mov sp, r7
8000a3a: bd80 pop {r7, pc}
8000a3c: 40012400 .word 0x40012400
8000a40: 40021000 .word 0x40021000
8000a44: 40010800 .word 0x40010800
08000a48 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8000a48: b480 push {r7}
8000a4a: b087 sub sp, #28
8000a4c: af00 add r7, sp, #0
8000a4e: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM1)
8000a50: 687b ldr r3, [r7, #4]
8000a52: 681b ldr r3, [r3, #0]
8000a54: 4a24 ldr r2, [pc, #144] @ (8000ae8 <HAL_TIM_Base_MspInit+0xa0>)
8000a56: 4293 cmp r3, r2
8000a58: d10c bne.n 8000a74 <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM1_MspInit 0 */
/* USER CODE END TIM1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM1_CLK_ENABLE();
8000a5a: 4b24 ldr r3, [pc, #144] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000a5c: 699b ldr r3, [r3, #24]
8000a5e: 4a23 ldr r2, [pc, #140] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000a60: f443 6300 orr.w r3, r3, #2048 @ 0x800
8000a64: 6193 str r3, [r2, #24]
8000a66: 4b21 ldr r3, [pc, #132] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000a68: 699b ldr r3, [r3, #24]
8000a6a: f403 6300 and.w r3, r3, #2048 @ 0x800
8000a6e: 617b str r3, [r7, #20]
8000a70: 697b ldr r3, [r7, #20]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8000a72: e034 b.n 8000ade <HAL_TIM_Base_MspInit+0x96>
else if(htim_base->Instance==TIM2)
8000a74: 687b ldr r3, [r7, #4]
8000a76: 681b ldr r3, [r3, #0]
8000a78: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8000a7c: d10c bne.n 8000a98 <HAL_TIM_Base_MspInit+0x50>
__HAL_RCC_TIM2_CLK_ENABLE();
8000a7e: 4b1b ldr r3, [pc, #108] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000a80: 69db ldr r3, [r3, #28]
8000a82: 4a1a ldr r2, [pc, #104] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000a84: f043 0301 orr.w r3, r3, #1
8000a88: 61d3 str r3, [r2, #28]
8000a8a: 4b18 ldr r3, [pc, #96] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000a8c: 69db ldr r3, [r3, #28]
8000a8e: f003 0301 and.w r3, r3, #1
8000a92: 613b str r3, [r7, #16]
8000a94: 693b ldr r3, [r7, #16]
}
8000a96: e022 b.n 8000ade <HAL_TIM_Base_MspInit+0x96>
else if(htim_base->Instance==TIM3)
8000a98: 687b ldr r3, [r7, #4]
8000a9a: 681b ldr r3, [r3, #0]
8000a9c: 4a14 ldr r2, [pc, #80] @ (8000af0 <HAL_TIM_Base_MspInit+0xa8>)
8000a9e: 4293 cmp r3, r2
8000aa0: d10c bne.n 8000abc <HAL_TIM_Base_MspInit+0x74>
__HAL_RCC_TIM3_CLK_ENABLE();
8000aa2: 4b12 ldr r3, [pc, #72] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000aa4: 69db ldr r3, [r3, #28]
8000aa6: 4a11 ldr r2, [pc, #68] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000aa8: f043 0302 orr.w r3, r3, #2
8000aac: 61d3 str r3, [r2, #28]
8000aae: 4b0f ldr r3, [pc, #60] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000ab0: 69db ldr r3, [r3, #28]
8000ab2: f003 0302 and.w r3, r3, #2
8000ab6: 60fb str r3, [r7, #12]
8000ab8: 68fb ldr r3, [r7, #12]
}
8000aba: e010 b.n 8000ade <HAL_TIM_Base_MspInit+0x96>
else if(htim_base->Instance==TIM4)
8000abc: 687b ldr r3, [r7, #4]
8000abe: 681b ldr r3, [r3, #0]
8000ac0: 4a0c ldr r2, [pc, #48] @ (8000af4 <HAL_TIM_Base_MspInit+0xac>)
8000ac2: 4293 cmp r3, r2
8000ac4: d10b bne.n 8000ade <HAL_TIM_Base_MspInit+0x96>
__HAL_RCC_TIM4_CLK_ENABLE();
8000ac6: 4b09 ldr r3, [pc, #36] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000ac8: 69db ldr r3, [r3, #28]
8000aca: 4a08 ldr r2, [pc, #32] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000acc: f043 0304 orr.w r3, r3, #4
8000ad0: 61d3 str r3, [r2, #28]
8000ad2: 4b06 ldr r3, [pc, #24] @ (8000aec <HAL_TIM_Base_MspInit+0xa4>)
8000ad4: 69db ldr r3, [r3, #28]
8000ad6: f003 0304 and.w r3, r3, #4
8000ada: 60bb str r3, [r7, #8]
8000adc: 68bb ldr r3, [r7, #8]
}
8000ade: bf00 nop
8000ae0: 371c adds r7, #28
8000ae2: 46bd mov sp, r7
8000ae4: bc80 pop {r7}
8000ae6: 4770 bx lr
8000ae8: 40012c00 .word 0x40012c00
8000aec: 40021000 .word 0x40021000
8000af0: 40000400 .word 0x40000400
8000af4: 40000800 .word 0x40000800
08000af8 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8000af8: b580 push {r7, lr}
8000afa: b08c sub sp, #48 @ 0x30
8000afc: af00 add r7, sp, #0
8000afe: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000b00: f107 0320 add.w r3, r7, #32
8000b04: 2200 movs r2, #0
8000b06: 601a str r2, [r3, #0]
8000b08: 605a str r2, [r3, #4]
8000b0a: 609a str r2, [r3, #8]
8000b0c: 60da str r2, [r3, #12]
if(htim->Instance==TIM1)
8000b0e: 687b ldr r3, [r7, #4]
8000b10: 681b ldr r3, [r3, #0]
8000b12: 4a49 ldr r2, [pc, #292] @ (8000c38 <HAL_TIM_MspPostInit+0x140>)
8000b14: 4293 cmp r3, r2
8000b16: d119 bne.n 8000b4c <HAL_TIM_MspPostInit+0x54>
{
/* USER CODE BEGIN TIM1_MspPostInit 0 */
/* USER CODE END TIM1_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8000b18: 4b48 ldr r3, [pc, #288] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000b1a: 699b ldr r3, [r3, #24]
8000b1c: 4a47 ldr r2, [pc, #284] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000b1e: f043 0304 orr.w r3, r3, #4
8000b22: 6193 str r3, [r2, #24]
8000b24: 4b45 ldr r3, [pc, #276] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000b26: 699b ldr r3, [r3, #24]
8000b28: f003 0304 and.w r3, r3, #4
8000b2c: 61fb str r3, [r7, #28]
8000b2e: 69fb ldr r3, [r7, #28]
/**TIM1 GPIO Configuration
PA8 ------> TIM1_CH1
PA9 ------> TIM1_CH2
PA10 ------> TIM1_CH3
*/
GPIO_InitStruct.Pin = GPIO_PIN_8|GPIO_PIN_9|GPIO_PIN_10;
8000b30: f44f 63e0 mov.w r3, #1792 @ 0x700
8000b34: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000b36: 2302 movs r3, #2
8000b38: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b3a: 2302 movs r3, #2
8000b3c: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000b3e: f107 0320 add.w r3, r7, #32
8000b42: 4619 mov r1, r3
8000b44: 483e ldr r0, [pc, #248] @ (8000c40 <HAL_TIM_MspPostInit+0x148>)
8000b46: f000 fca5 bl 8001494 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
8000b4a: e071 b.n 8000c30 <HAL_TIM_MspPostInit+0x138>
else if(htim->Instance==TIM2)
8000b4c: 687b ldr r3, [r7, #4]
8000b4e: 681b ldr r3, [r3, #0]
8000b50: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8000b54: d118 bne.n 8000b88 <HAL_TIM_MspPostInit+0x90>
__HAL_RCC_GPIOA_CLK_ENABLE();
8000b56: 4b39 ldr r3, [pc, #228] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000b58: 699b ldr r3, [r3, #24]
8000b5a: 4a38 ldr r2, [pc, #224] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000b5c: f043 0304 orr.w r3, r3, #4
8000b60: 6193 str r3, [r2, #24]
8000b62: 4b36 ldr r3, [pc, #216] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000b64: 699b ldr r3, [r3, #24]
8000b66: f003 0304 and.w r3, r3, #4
8000b6a: 61bb str r3, [r7, #24]
8000b6c: 69bb ldr r3, [r7, #24]
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
8000b6e: 230f movs r3, #15
8000b70: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000b72: 2302 movs r3, #2
8000b74: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000b76: 2302 movs r3, #2
8000b78: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000b7a: f107 0320 add.w r3, r7, #32
8000b7e: 4619 mov r1, r3
8000b80: 482f ldr r0, [pc, #188] @ (8000c40 <HAL_TIM_MspPostInit+0x148>)
8000b82: f000 fc87 bl 8001494 <HAL_GPIO_Init>
}
8000b86: e053 b.n 8000c30 <HAL_TIM_MspPostInit+0x138>
else if(htim->Instance==TIM3)
8000b88: 687b ldr r3, [r7, #4]
8000b8a: 681b ldr r3, [r3, #0]
8000b8c: 4a2d ldr r2, [pc, #180] @ (8000c44 <HAL_TIM_MspPostInit+0x14c>)
8000b8e: 4293 cmp r3, r2
8000b90: d130 bne.n 8000bf4 <HAL_TIM_MspPostInit+0xfc>
__HAL_RCC_GPIOA_CLK_ENABLE();
8000b92: 4b2a ldr r3, [pc, #168] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000b94: 699b ldr r3, [r3, #24]
8000b96: 4a29 ldr r2, [pc, #164] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000b98: f043 0304 orr.w r3, r3, #4
8000b9c: 6193 str r3, [r2, #24]
8000b9e: 4b27 ldr r3, [pc, #156] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000ba0: 699b ldr r3, [r3, #24]
8000ba2: f003 0304 and.w r3, r3, #4
8000ba6: 617b str r3, [r7, #20]
8000ba8: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOB_CLK_ENABLE();
8000baa: 4b24 ldr r3, [pc, #144] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000bac: 699b ldr r3, [r3, #24]
8000bae: 4a23 ldr r2, [pc, #140] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000bb0: f043 0308 orr.w r3, r3, #8
8000bb4: 6193 str r3, [r2, #24]
8000bb6: 4b21 ldr r3, [pc, #132] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000bb8: 699b ldr r3, [r3, #24]
8000bba: f003 0308 and.w r3, r3, #8
8000bbe: 613b str r3, [r7, #16]
8000bc0: 693b ldr r3, [r7, #16]
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
8000bc2: 23c0 movs r3, #192 @ 0xc0
8000bc4: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000bc6: 2302 movs r3, #2
8000bc8: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000bca: 2302 movs r3, #2
8000bcc: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8000bce: f107 0320 add.w r3, r7, #32
8000bd2: 4619 mov r1, r3
8000bd4: 481a ldr r0, [pc, #104] @ (8000c40 <HAL_TIM_MspPostInit+0x148>)
8000bd6: f000 fc5d bl 8001494 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1;
8000bda: 2303 movs r3, #3
8000bdc: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000bde: 2302 movs r3, #2
8000be0: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000be2: 2302 movs r3, #2
8000be4: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000be6: f107 0320 add.w r3, r7, #32
8000bea: 4619 mov r1, r3
8000bec: 4816 ldr r0, [pc, #88] @ (8000c48 <HAL_TIM_MspPostInit+0x150>)
8000bee: f000 fc51 bl 8001494 <HAL_GPIO_Init>
}
8000bf2: e01d b.n 8000c30 <HAL_TIM_MspPostInit+0x138>
else if(htim->Instance==TIM4)
8000bf4: 687b ldr r3, [r7, #4]
8000bf6: 681b ldr r3, [r3, #0]
8000bf8: 4a14 ldr r2, [pc, #80] @ (8000c4c <HAL_TIM_MspPostInit+0x154>)
8000bfa: 4293 cmp r3, r2
8000bfc: d118 bne.n 8000c30 <HAL_TIM_MspPostInit+0x138>
__HAL_RCC_GPIOB_CLK_ENABLE();
8000bfe: 4b0f ldr r3, [pc, #60] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000c00: 699b ldr r3, [r3, #24]
8000c02: 4a0e ldr r2, [pc, #56] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000c04: f043 0308 orr.w r3, r3, #8
8000c08: 6193 str r3, [r2, #24]
8000c0a: 4b0c ldr r3, [pc, #48] @ (8000c3c <HAL_TIM_MspPostInit+0x144>)
8000c0c: 699b ldr r3, [r3, #24]
8000c0e: f003 0308 and.w r3, r3, #8
8000c12: 60fb str r3, [r7, #12]
8000c14: 68fb ldr r3, [r7, #12]
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
8000c16: f44f 7370 mov.w r3, #960 @ 0x3c0
8000c1a: 623b str r3, [r7, #32]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000c1c: 2302 movs r3, #2
8000c1e: 627b str r3, [r7, #36] @ 0x24
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000c20: 2302 movs r3, #2
8000c22: 62fb str r3, [r7, #44] @ 0x2c
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000c24: f107 0320 add.w r3, r7, #32
8000c28: 4619 mov r1, r3
8000c2a: 4807 ldr r0, [pc, #28] @ (8000c48 <HAL_TIM_MspPostInit+0x150>)
8000c2c: f000 fc32 bl 8001494 <HAL_GPIO_Init>
}
8000c30: bf00 nop
8000c32: 3730 adds r7, #48 @ 0x30
8000c34: 46bd mov sp, r7
8000c36: bd80 pop {r7, pc}
8000c38: 40012c00 .word 0x40012c00
8000c3c: 40021000 .word 0x40021000
8000c40: 40010800 .word 0x40010800
8000c44: 40000400 .word 0x40000400
8000c48: 40010c00 .word 0x40010c00
8000c4c: 40000800 .word 0x40000800
08000c50 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8000c50: b480 push {r7}
8000c52: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8000c54: bf00 nop
8000c56: e7fd b.n 8000c54 <NMI_Handler+0x4>
08000c58 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8000c58: b480 push {r7}
8000c5a: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8000c5c: bf00 nop
8000c5e: e7fd b.n 8000c5c <HardFault_Handler+0x4>
08000c60 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8000c60: b480 push {r7}
8000c62: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8000c64: bf00 nop
8000c66: e7fd b.n 8000c64 <MemManage_Handler+0x4>
08000c68 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8000c68: b480 push {r7}
8000c6a: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8000c6c: bf00 nop
8000c6e: e7fd b.n 8000c6c <BusFault_Handler+0x4>
08000c70 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8000c70: b480 push {r7}
8000c72: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8000c74: bf00 nop
8000c76: e7fd b.n 8000c74 <UsageFault_Handler+0x4>
08000c78 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8000c78: b480 push {r7}
8000c7a: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8000c7c: bf00 nop
8000c7e: 46bd mov sp, r7
8000c80: bc80 pop {r7}
8000c82: 4770 bx lr
08000c84 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8000c84: b480 push {r7}
8000c86: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8000c88: bf00 nop
8000c8a: 46bd mov sp, r7
8000c8c: bc80 pop {r7}
8000c8e: 4770 bx lr
08000c90 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8000c90: b480 push {r7}
8000c92: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8000c94: bf00 nop
8000c96: 46bd mov sp, r7
8000c98: bc80 pop {r7}
8000c9a: 4770 bx lr
08000c9c <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8000c9c: b580 push {r7, lr}
8000c9e: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8000ca0: f000 f8b6 bl 8000e10 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
8000ca4: f000 fbef bl 8001486 <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
8000ca8: bf00 nop
8000caa: bd80 pop {r7, pc}
08000cac <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8000cac: b580 push {r7, lr}
8000cae: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8000cb0: 4802 ldr r0, [pc, #8] @ (8000cbc <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8000cb2: f000 fec0 bl 8001a36 <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8000cb6: bf00 nop
8000cb8: bd80 pop {r7, pc}
8000cba: bf00 nop
8000cbc: 20001110 .word 0x20001110
08000cc0 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8000cc0: b580 push {r7, lr}
8000cc2: b086 sub sp, #24
8000cc4: af00 add r7, sp, #0
8000cc6: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8000cc8: 4a14 ldr r2, [pc, #80] @ (8000d1c <_sbrk+0x5c>)
8000cca: 4b15 ldr r3, [pc, #84] @ (8000d20 <_sbrk+0x60>)
8000ccc: 1ad3 subs r3, r2, r3
8000cce: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8000cd0: 697b ldr r3, [r7, #20]
8000cd2: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8000cd4: 4b13 ldr r3, [pc, #76] @ (8000d24 <_sbrk+0x64>)
8000cd6: 681b ldr r3, [r3, #0]
8000cd8: 2b00 cmp r3, #0
8000cda: d102 bne.n 8000ce2 <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8000cdc: 4b11 ldr r3, [pc, #68] @ (8000d24 <_sbrk+0x64>)
8000cde: 4a12 ldr r2, [pc, #72] @ (8000d28 <_sbrk+0x68>)
8000ce0: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8000ce2: 4b10 ldr r3, [pc, #64] @ (8000d24 <_sbrk+0x64>)
8000ce4: 681a ldr r2, [r3, #0]
8000ce6: 687b ldr r3, [r7, #4]
8000ce8: 4413 add r3, r2
8000cea: 693a ldr r2, [r7, #16]
8000cec: 429a cmp r2, r3
8000cee: d207 bcs.n 8000d00 <_sbrk+0x40>
{
errno = ENOMEM;
8000cf0: f008 f92e bl 8008f50 <__errno>
8000cf4: 4603 mov r3, r0
8000cf6: 220c movs r2, #12
8000cf8: 601a str r2, [r3, #0]
return (void *)-1;
8000cfa: f04f 33ff mov.w r3, #4294967295
8000cfe: e009 b.n 8000d14 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8000d00: 4b08 ldr r3, [pc, #32] @ (8000d24 <_sbrk+0x64>)
8000d02: 681b ldr r3, [r3, #0]
8000d04: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8000d06: 4b07 ldr r3, [pc, #28] @ (8000d24 <_sbrk+0x64>)
8000d08: 681a ldr r2, [r3, #0]
8000d0a: 687b ldr r3, [r7, #4]
8000d0c: 4413 add r3, r2
8000d0e: 4a05 ldr r2, [pc, #20] @ (8000d24 <_sbrk+0x64>)
8000d10: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8000d12: 68fb ldr r3, [r7, #12]
}
8000d14: 4618 mov r0, r3
8000d16: 3718 adds r7, #24
8000d18: 46bd mov sp, r7
8000d1a: bd80 pop {r7, pc}
8000d1c: 20005000 .word 0x20005000
8000d20: 00000400 .word 0x00000400
8000d24: 2000033c .word 0x2000033c
8000d28: 20001750 .word 0x20001750
08000d2c <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8000d2c: b480 push {r7}
8000d2e: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8000d30: bf00 nop
8000d32: 46bd mov sp, r7
8000d34: bc80 pop {r7}
8000d36: 4770 bx lr
08000d38 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8000d38: f7ff fff8 bl 8000d2c <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8000d3c: 480b ldr r0, [pc, #44] @ (8000d6c <LoopFillZerobss+0xe>)
ldr r1, =_edata
8000d3e: 490c ldr r1, [pc, #48] @ (8000d70 <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8000d40: 4a0c ldr r2, [pc, #48] @ (8000d74 <LoopFillZerobss+0x16>)
movs r3, #0
8000d42: 2300 movs r3, #0
b LoopCopyDataInit
8000d44: e002 b.n 8000d4c <LoopCopyDataInit>
08000d46 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8000d46: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8000d48: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8000d4a: 3304 adds r3, #4
08000d4c <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8000d4c: 18c4 adds r4, r0, r3
cmp r4, r1
8000d4e: 428c cmp r4, r1
bcc CopyDataInit
8000d50: d3f9 bcc.n 8000d46 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8000d52: 4a09 ldr r2, [pc, #36] @ (8000d78 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8000d54: 4c09 ldr r4, [pc, #36] @ (8000d7c <LoopFillZerobss+0x1e>)
movs r3, #0
8000d56: 2300 movs r3, #0
b LoopFillZerobss
8000d58: e001 b.n 8000d5e <LoopFillZerobss>
08000d5a <FillZerobss>:
FillZerobss:
str r3, [r2]
8000d5a: 6013 str r3, [r2, #0]
adds r2, r2, #4
8000d5c: 3204 adds r2, #4
08000d5e <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8000d5e: 42a2 cmp r2, r4
bcc FillZerobss
8000d60: d3fb bcc.n 8000d5a <FillZerobss>
/* Call static constructors */
bl __libc_init_array
8000d62: f008 f8fb bl 8008f5c <__libc_init_array>
/* Call the application's entry point.*/
bl main
8000d66: f7ff fa29 bl 80001bc <main>
bx lr
8000d6a: 4770 bx lr
ldr r0, =_sdata
8000d6c: 20000000 .word 0x20000000
ldr r1, =_edata
8000d70: 200001cc .word 0x200001cc
ldr r2, =_sidata
8000d74: 0800992c .word 0x0800992c
ldr r2, =_sbss
8000d78: 200001cc .word 0x200001cc
ldr r4, =_ebss
8000d7c: 20001750 .word 0x20001750
08000d80 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8000d80: e7fe b.n 8000d80 <ADC1_2_IRQHandler>
...
08000d84 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8000d84: b580 push {r7, lr}
8000d86: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8000d88: 4b08 ldr r3, [pc, #32] @ (8000dac <HAL_Init+0x28>)
8000d8a: 681b ldr r3, [r3, #0]
8000d8c: 4a07 ldr r2, [pc, #28] @ (8000dac <HAL_Init+0x28>)
8000d8e: f043 0310 orr.w r3, r3, #16
8000d92: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8000d94: 2003 movs r0, #3
8000d96: f000 fb35 bl 8001404 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8000d9a: 200f movs r0, #15
8000d9c: f000 f808 bl 8000db0 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8000da0: f7ff fde4 bl 800096c <HAL_MspInit>
/* Return function status */
return HAL_OK;
8000da4: 2300 movs r3, #0
}
8000da6: 4618 mov r0, r3
8000da8: bd80 pop {r7, pc}
8000daa: bf00 nop
8000dac: 40022000 .word 0x40022000
08000db0 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8000db0: b580 push {r7, lr}
8000db2: b082 sub sp, #8
8000db4: af00 add r7, sp, #0
8000db6: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8000db8: 4b12 ldr r3, [pc, #72] @ (8000e04 <HAL_InitTick+0x54>)
8000dba: 681a ldr r2, [r3, #0]
8000dbc: 4b12 ldr r3, [pc, #72] @ (8000e08 <HAL_InitTick+0x58>)
8000dbe: 781b ldrb r3, [r3, #0]
8000dc0: 4619 mov r1, r3
8000dc2: f44f 737a mov.w r3, #1000 @ 0x3e8
8000dc6: fbb3 f3f1 udiv r3, r3, r1
8000dca: fbb2 f3f3 udiv r3, r2, r3
8000dce: 4618 mov r0, r3
8000dd0: f000 fb4d bl 800146e <HAL_SYSTICK_Config>
8000dd4: 4603 mov r3, r0
8000dd6: 2b00 cmp r3, #0
8000dd8: d001 beq.n 8000dde <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8000dda: 2301 movs r3, #1
8000ddc: e00e b.n 8000dfc <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8000dde: 687b ldr r3, [r7, #4]
8000de0: 2b0f cmp r3, #15
8000de2: d80a bhi.n 8000dfa <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8000de4: 2200 movs r2, #0
8000de6: 6879 ldr r1, [r7, #4]
8000de8: f04f 30ff mov.w r0, #4294967295
8000dec: f000 fb15 bl 800141a <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8000df0: 4a06 ldr r2, [pc, #24] @ (8000e0c <HAL_InitTick+0x5c>)
8000df2: 687b ldr r3, [r7, #4]
8000df4: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8000df6: 2300 movs r3, #0
8000df8: e000 b.n 8000dfc <HAL_InitTick+0x4c>
return HAL_ERROR;
8000dfa: 2301 movs r3, #1
}
8000dfc: 4618 mov r0, r3
8000dfe: 3708 adds r7, #8
8000e00: 46bd mov sp, r7
8000e02: bd80 pop {r7, pc}
8000e04: 20000000 .word 0x20000000
8000e08: 20000008 .word 0x20000008
8000e0c: 20000004 .word 0x20000004
08000e10 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8000e10: b480 push {r7}
8000e12: af00 add r7, sp, #0
uwTick += uwTickFreq;
8000e14: 4b05 ldr r3, [pc, #20] @ (8000e2c <HAL_IncTick+0x1c>)
8000e16: 781b ldrb r3, [r3, #0]
8000e18: 461a mov r2, r3
8000e1a: 4b05 ldr r3, [pc, #20] @ (8000e30 <HAL_IncTick+0x20>)
8000e1c: 681b ldr r3, [r3, #0]
8000e1e: 4413 add r3, r2
8000e20: 4a03 ldr r2, [pc, #12] @ (8000e30 <HAL_IncTick+0x20>)
8000e22: 6013 str r3, [r2, #0]
}
8000e24: bf00 nop
8000e26: 46bd mov sp, r7
8000e28: bc80 pop {r7}
8000e2a: 4770 bx lr
8000e2c: 20000008 .word 0x20000008
8000e30: 20000340 .word 0x20000340
08000e34 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8000e34: b480 push {r7}
8000e36: af00 add r7, sp, #0
return uwTick;
8000e38: 4b02 ldr r3, [pc, #8] @ (8000e44 <HAL_GetTick+0x10>)
8000e3a: 681b ldr r3, [r3, #0]
}
8000e3c: 4618 mov r0, r3
8000e3e: 46bd mov sp, r7
8000e40: bc80 pop {r7}
8000e42: 4770 bx lr
8000e44: 20000340 .word 0x20000340
08000e48 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8000e48: b580 push {r7, lr}
8000e4a: b086 sub sp, #24
8000e4c: af00 add r7, sp, #0
8000e4e: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8000e50: 2300 movs r3, #0
8000e52: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
8000e54: 2300 movs r3, #0
8000e56: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
8000e58: 2300 movs r3, #0
8000e5a: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
8000e5c: 2300 movs r3, #0
8000e5e: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
8000e60: 687b ldr r3, [r7, #4]
8000e62: 2b00 cmp r3, #0
8000e64: d101 bne.n 8000e6a <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
8000e66: 2301 movs r3, #1
8000e68: e0be b.n 8000fe8 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8000e6a: 687b ldr r3, [r7, #4]
8000e6c: 689b ldr r3, [r3, #8]
8000e6e: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
8000e70: 687b ldr r3, [r7, #4]
8000e72: 6a9b ldr r3, [r3, #40] @ 0x28
8000e74: 2b00 cmp r3, #0
8000e76: d109 bne.n 8000e8c <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8000e78: 687b ldr r3, [r7, #4]
8000e7a: 2200 movs r2, #0
8000e7c: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8000e7e: 687b ldr r3, [r7, #4]
8000e80: 2200 movs r2, #0
8000e82: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8000e86: 6878 ldr r0, [r7, #4]
8000e88: f7ff fda2 bl 80009d0 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
8000e8c: 6878 ldr r0, [r7, #4]
8000e8e: f000 f9ab bl 80011e8 <ADC_ConversionStop_Disable>
8000e92: 4603 mov r3, r0
8000e94: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8000e96: 687b ldr r3, [r7, #4]
8000e98: 6a9b ldr r3, [r3, #40] @ 0x28
8000e9a: f003 0310 and.w r3, r3, #16
8000e9e: 2b00 cmp r3, #0
8000ea0: f040 8099 bne.w 8000fd6 <HAL_ADC_Init+0x18e>
8000ea4: 7dfb ldrb r3, [r7, #23]
8000ea6: 2b00 cmp r3, #0
8000ea8: f040 8095 bne.w 8000fd6 <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8000eac: 687b ldr r3, [r7, #4]
8000eae: 6a9b ldr r3, [r3, #40] @ 0x28
8000eb0: f423 5388 bic.w r3, r3, #4352 @ 0x1100
8000eb4: f023 0302 bic.w r3, r3, #2
8000eb8: f043 0202 orr.w r2, r3, #2
8000ebc: 687b ldr r3, [r7, #4]
8000ebe: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
8000ec0: 687b ldr r3, [r7, #4]
8000ec2: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8000ec4: 687b ldr r3, [r7, #4]
8000ec6: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8000ec8: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8000eca: 687b ldr r3, [r7, #4]
8000ecc: 7b1b ldrb r3, [r3, #12]
8000ece: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8000ed0: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
8000ed2: 68ba ldr r2, [r7, #8]
8000ed4: 4313 orrs r3, r2
8000ed6: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8000ed8: 687b ldr r3, [r7, #4]
8000eda: 689b ldr r3, [r3, #8]
8000edc: f5b3 7f80 cmp.w r3, #256 @ 0x100
8000ee0: d003 beq.n 8000eea <HAL_ADC_Init+0xa2>
8000ee2: 687b ldr r3, [r7, #4]
8000ee4: 689b ldr r3, [r3, #8]
8000ee6: 2b01 cmp r3, #1
8000ee8: d102 bne.n 8000ef0 <HAL_ADC_Init+0xa8>
8000eea: f44f 7380 mov.w r3, #256 @ 0x100
8000eee: e000 b.n 8000ef2 <HAL_ADC_Init+0xaa>
8000ef0: 2300 movs r3, #0
8000ef2: 693a ldr r2, [r7, #16]
8000ef4: 4313 orrs r3, r2
8000ef6: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8000ef8: 687b ldr r3, [r7, #4]
8000efa: 7d1b ldrb r3, [r3, #20]
8000efc: 2b01 cmp r3, #1
8000efe: d119 bne.n 8000f34 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8000f00: 687b ldr r3, [r7, #4]
8000f02: 7b1b ldrb r3, [r3, #12]
8000f04: 2b00 cmp r3, #0
8000f06: d109 bne.n 8000f1c <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8000f08: 687b ldr r3, [r7, #4]
8000f0a: 699b ldr r3, [r3, #24]
8000f0c: 3b01 subs r3, #1
8000f0e: 035a lsls r2, r3, #13
8000f10: 693b ldr r3, [r7, #16]
8000f12: 4313 orrs r3, r2
8000f14: f443 6300 orr.w r3, r3, #2048 @ 0x800
8000f18: 613b str r3, [r7, #16]
8000f1a: e00b b.n 8000f34 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8000f1c: 687b ldr r3, [r7, #4]
8000f1e: 6a9b ldr r3, [r3, #40] @ 0x28
8000f20: f043 0220 orr.w r2, r3, #32
8000f24: 687b ldr r3, [r7, #4]
8000f26: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8000f28: 687b ldr r3, [r7, #4]
8000f2a: 6adb ldr r3, [r3, #44] @ 0x2c
8000f2c: f043 0201 orr.w r2, r3, #1
8000f30: 687b ldr r3, [r7, #4]
8000f32: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
8000f34: 687b ldr r3, [r7, #4]
8000f36: 681b ldr r3, [r3, #0]
8000f38: 685b ldr r3, [r3, #4]
8000f3a: f423 4169 bic.w r1, r3, #59648 @ 0xe900
8000f3e: 687b ldr r3, [r7, #4]
8000f40: 681b ldr r3, [r3, #0]
8000f42: 693a ldr r2, [r7, #16]
8000f44: 430a orrs r2, r1
8000f46: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
8000f48: 687b ldr r3, [r7, #4]
8000f4a: 681b ldr r3, [r3, #0]
8000f4c: 689a ldr r2, [r3, #8]
8000f4e: 4b28 ldr r3, [pc, #160] @ (8000ff0 <HAL_ADC_Init+0x1a8>)
8000f50: 4013 ands r3, r2
8000f52: 687a ldr r2, [r7, #4]
8000f54: 6812 ldr r2, [r2, #0]
8000f56: 68b9 ldr r1, [r7, #8]
8000f58: 430b orrs r3, r1
8000f5a: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
8000f5c: 687b ldr r3, [r7, #4]
8000f5e: 689b ldr r3, [r3, #8]
8000f60: f5b3 7f80 cmp.w r3, #256 @ 0x100
8000f64: d003 beq.n 8000f6e <HAL_ADC_Init+0x126>
8000f66: 687b ldr r3, [r7, #4]
8000f68: 689b ldr r3, [r3, #8]
8000f6a: 2b01 cmp r3, #1
8000f6c: d104 bne.n 8000f78 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
8000f6e: 687b ldr r3, [r7, #4]
8000f70: 691b ldr r3, [r3, #16]
8000f72: 3b01 subs r3, #1
8000f74: 051b lsls r3, r3, #20
8000f76: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
8000f78: 687b ldr r3, [r7, #4]
8000f7a: 681b ldr r3, [r3, #0]
8000f7c: 6adb ldr r3, [r3, #44] @ 0x2c
8000f7e: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
8000f82: 687b ldr r3, [r7, #4]
8000f84: 681b ldr r3, [r3, #0]
8000f86: 68fa ldr r2, [r7, #12]
8000f88: 430a orrs r2, r1
8000f8a: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8000f8c: 687b ldr r3, [r7, #4]
8000f8e: 681b ldr r3, [r3, #0]
8000f90: 689a ldr r2, [r3, #8]
8000f92: 4b18 ldr r3, [pc, #96] @ (8000ff4 <HAL_ADC_Init+0x1ac>)
8000f94: 4013 ands r3, r2
8000f96: 68ba ldr r2, [r7, #8]
8000f98: 429a cmp r2, r3
8000f9a: d10b bne.n 8000fb4 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8000f9c: 687b ldr r3, [r7, #4]
8000f9e: 2200 movs r2, #0
8000fa0: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
8000fa2: 687b ldr r3, [r7, #4]
8000fa4: 6a9b ldr r3, [r3, #40] @ 0x28
8000fa6: f023 0303 bic.w r3, r3, #3
8000faa: f043 0201 orr.w r2, r3, #1
8000fae: 687b ldr r3, [r7, #4]
8000fb0: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8000fb2: e018 b.n 8000fe6 <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8000fb4: 687b ldr r3, [r7, #4]
8000fb6: 6a9b ldr r3, [r3, #40] @ 0x28
8000fb8: f023 0312 bic.w r3, r3, #18
8000fbc: f043 0210 orr.w r2, r3, #16
8000fc0: 687b ldr r3, [r7, #4]
8000fc2: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8000fc4: 687b ldr r3, [r7, #4]
8000fc6: 6adb ldr r3, [r3, #44] @ 0x2c
8000fc8: f043 0201 orr.w r2, r3, #1
8000fcc: 687b ldr r3, [r7, #4]
8000fce: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
8000fd0: 2301 movs r3, #1
8000fd2: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8000fd4: e007 b.n 8000fe6 <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8000fd6: 687b ldr r3, [r7, #4]
8000fd8: 6a9b ldr r3, [r3, #40] @ 0x28
8000fda: f043 0210 orr.w r2, r3, #16
8000fde: 687b ldr r3, [r7, #4]
8000fe0: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8000fe2: 2301 movs r3, #1
8000fe4: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8000fe6: 7dfb ldrb r3, [r7, #23]
}
8000fe8: 4618 mov r0, r3
8000fea: 3718 adds r7, #24
8000fec: 46bd mov sp, r7
8000fee: bd80 pop {r7, pc}
8000ff0: ffe1f7fd .word 0xffe1f7fd
8000ff4: ff1f0efe .word 0xff1f0efe
08000ff8 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8000ff8: b480 push {r7}
8000ffa: b085 sub sp, #20
8000ffc: af00 add r7, sp, #0
8000ffe: 6078 str r0, [r7, #4]
8001000: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8001002: 2300 movs r3, #0
8001004: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
8001006: 2300 movs r3, #0
8001008: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
800100a: 687b ldr r3, [r7, #4]
800100c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8001010: 2b01 cmp r3, #1
8001012: d101 bne.n 8001018 <HAL_ADC_ConfigChannel+0x20>
8001014: 2302 movs r3, #2
8001016: e0dc b.n 80011d2 <HAL_ADC_ConfigChannel+0x1da>
8001018: 687b ldr r3, [r7, #4]
800101a: 2201 movs r2, #1
800101c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
8001020: 683b ldr r3, [r7, #0]
8001022: 685b ldr r3, [r3, #4]
8001024: 2b06 cmp r3, #6
8001026: d81c bhi.n 8001062 <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8001028: 687b ldr r3, [r7, #4]
800102a: 681b ldr r3, [r3, #0]
800102c: 6b59 ldr r1, [r3, #52] @ 0x34
800102e: 683b ldr r3, [r7, #0]
8001030: 685a ldr r2, [r3, #4]
8001032: 4613 mov r3, r2
8001034: 009b lsls r3, r3, #2
8001036: 4413 add r3, r2
8001038: 3b05 subs r3, #5
800103a: 221f movs r2, #31
800103c: fa02 f303 lsl.w r3, r2, r3
8001040: 43db mvns r3, r3
8001042: 4019 ands r1, r3
8001044: 683b ldr r3, [r7, #0]
8001046: 6818 ldr r0, [r3, #0]
8001048: 683b ldr r3, [r7, #0]
800104a: 685a ldr r2, [r3, #4]
800104c: 4613 mov r3, r2
800104e: 009b lsls r3, r3, #2
8001050: 4413 add r3, r2
8001052: 3b05 subs r3, #5
8001054: fa00 f203 lsl.w r2, r0, r3
8001058: 687b ldr r3, [r7, #4]
800105a: 681b ldr r3, [r3, #0]
800105c: 430a orrs r2, r1
800105e: 635a str r2, [r3, #52] @ 0x34
8001060: e03c b.n 80010dc <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
8001062: 683b ldr r3, [r7, #0]
8001064: 685b ldr r3, [r3, #4]
8001066: 2b0c cmp r3, #12
8001068: d81c bhi.n 80010a4 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
800106a: 687b ldr r3, [r7, #4]
800106c: 681b ldr r3, [r3, #0]
800106e: 6b19 ldr r1, [r3, #48] @ 0x30
8001070: 683b ldr r3, [r7, #0]
8001072: 685a ldr r2, [r3, #4]
8001074: 4613 mov r3, r2
8001076: 009b lsls r3, r3, #2
8001078: 4413 add r3, r2
800107a: 3b23 subs r3, #35 @ 0x23
800107c: 221f movs r2, #31
800107e: fa02 f303 lsl.w r3, r2, r3
8001082: 43db mvns r3, r3
8001084: 4019 ands r1, r3
8001086: 683b ldr r3, [r7, #0]
8001088: 6818 ldr r0, [r3, #0]
800108a: 683b ldr r3, [r7, #0]
800108c: 685a ldr r2, [r3, #4]
800108e: 4613 mov r3, r2
8001090: 009b lsls r3, r3, #2
8001092: 4413 add r3, r2
8001094: 3b23 subs r3, #35 @ 0x23
8001096: fa00 f203 lsl.w r2, r0, r3
800109a: 687b ldr r3, [r7, #4]
800109c: 681b ldr r3, [r3, #0]
800109e: 430a orrs r2, r1
80010a0: 631a str r2, [r3, #48] @ 0x30
80010a2: e01b b.n 80010dc <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
80010a4: 687b ldr r3, [r7, #4]
80010a6: 681b ldr r3, [r3, #0]
80010a8: 6ad9 ldr r1, [r3, #44] @ 0x2c
80010aa: 683b ldr r3, [r7, #0]
80010ac: 685a ldr r2, [r3, #4]
80010ae: 4613 mov r3, r2
80010b0: 009b lsls r3, r3, #2
80010b2: 4413 add r3, r2
80010b4: 3b41 subs r3, #65 @ 0x41
80010b6: 221f movs r2, #31
80010b8: fa02 f303 lsl.w r3, r2, r3
80010bc: 43db mvns r3, r3
80010be: 4019 ands r1, r3
80010c0: 683b ldr r3, [r7, #0]
80010c2: 6818 ldr r0, [r3, #0]
80010c4: 683b ldr r3, [r7, #0]
80010c6: 685a ldr r2, [r3, #4]
80010c8: 4613 mov r3, r2
80010ca: 009b lsls r3, r3, #2
80010cc: 4413 add r3, r2
80010ce: 3b41 subs r3, #65 @ 0x41
80010d0: fa00 f203 lsl.w r2, r0, r3
80010d4: 687b ldr r3, [r7, #4]
80010d6: 681b ldr r3, [r3, #0]
80010d8: 430a orrs r2, r1
80010da: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
80010dc: 683b ldr r3, [r7, #0]
80010de: 681b ldr r3, [r3, #0]
80010e0: 2b09 cmp r3, #9
80010e2: d91c bls.n 800111e <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
80010e4: 687b ldr r3, [r7, #4]
80010e6: 681b ldr r3, [r3, #0]
80010e8: 68d9 ldr r1, [r3, #12]
80010ea: 683b ldr r3, [r7, #0]
80010ec: 681a ldr r2, [r3, #0]
80010ee: 4613 mov r3, r2
80010f0: 005b lsls r3, r3, #1
80010f2: 4413 add r3, r2
80010f4: 3b1e subs r3, #30
80010f6: 2207 movs r2, #7
80010f8: fa02 f303 lsl.w r3, r2, r3
80010fc: 43db mvns r3, r3
80010fe: 4019 ands r1, r3
8001100: 683b ldr r3, [r7, #0]
8001102: 6898 ldr r0, [r3, #8]
8001104: 683b ldr r3, [r7, #0]
8001106: 681a ldr r2, [r3, #0]
8001108: 4613 mov r3, r2
800110a: 005b lsls r3, r3, #1
800110c: 4413 add r3, r2
800110e: 3b1e subs r3, #30
8001110: fa00 f203 lsl.w r2, r0, r3
8001114: 687b ldr r3, [r7, #4]
8001116: 681b ldr r3, [r3, #0]
8001118: 430a orrs r2, r1
800111a: 60da str r2, [r3, #12]
800111c: e019 b.n 8001152 <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
800111e: 687b ldr r3, [r7, #4]
8001120: 681b ldr r3, [r3, #0]
8001122: 6919 ldr r1, [r3, #16]
8001124: 683b ldr r3, [r7, #0]
8001126: 681a ldr r2, [r3, #0]
8001128: 4613 mov r3, r2
800112a: 005b lsls r3, r3, #1
800112c: 4413 add r3, r2
800112e: 2207 movs r2, #7
8001130: fa02 f303 lsl.w r3, r2, r3
8001134: 43db mvns r3, r3
8001136: 4019 ands r1, r3
8001138: 683b ldr r3, [r7, #0]
800113a: 6898 ldr r0, [r3, #8]
800113c: 683b ldr r3, [r7, #0]
800113e: 681a ldr r2, [r3, #0]
8001140: 4613 mov r3, r2
8001142: 005b lsls r3, r3, #1
8001144: 4413 add r3, r2
8001146: fa00 f203 lsl.w r2, r0, r3
800114a: 687b ldr r3, [r7, #4]
800114c: 681b ldr r3, [r3, #0]
800114e: 430a orrs r2, r1
8001150: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8001152: 683b ldr r3, [r7, #0]
8001154: 681b ldr r3, [r3, #0]
8001156: 2b10 cmp r3, #16
8001158: d003 beq.n 8001162 <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
800115a: 683b ldr r3, [r7, #0]
800115c: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
800115e: 2b11 cmp r3, #17
8001160: d132 bne.n 80011c8 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
8001162: 687b ldr r3, [r7, #4]
8001164: 681b ldr r3, [r3, #0]
8001166: 4a1d ldr r2, [pc, #116] @ (80011dc <HAL_ADC_ConfigChannel+0x1e4>)
8001168: 4293 cmp r3, r2
800116a: d125 bne.n 80011b8 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
800116c: 687b ldr r3, [r7, #4]
800116e: 681b ldr r3, [r3, #0]
8001170: 689b ldr r3, [r3, #8]
8001172: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8001176: 2b00 cmp r3, #0
8001178: d126 bne.n 80011c8 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
800117a: 687b ldr r3, [r7, #4]
800117c: 681b ldr r3, [r3, #0]
800117e: 689a ldr r2, [r3, #8]
8001180: 687b ldr r3, [r7, #4]
8001182: 681b ldr r3, [r3, #0]
8001184: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8001188: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
800118a: 683b ldr r3, [r7, #0]
800118c: 681b ldr r3, [r3, #0]
800118e: 2b10 cmp r3, #16
8001190: d11a bne.n 80011c8 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
8001192: 4b13 ldr r3, [pc, #76] @ (80011e0 <HAL_ADC_ConfigChannel+0x1e8>)
8001194: 681b ldr r3, [r3, #0]
8001196: 4a13 ldr r2, [pc, #76] @ (80011e4 <HAL_ADC_ConfigChannel+0x1ec>)
8001198: fba2 2303 umull r2, r3, r2, r3
800119c: 0c9a lsrs r2, r3, #18
800119e: 4613 mov r3, r2
80011a0: 009b lsls r3, r3, #2
80011a2: 4413 add r3, r2
80011a4: 005b lsls r3, r3, #1
80011a6: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80011a8: e002 b.n 80011b0 <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
80011aa: 68bb ldr r3, [r7, #8]
80011ac: 3b01 subs r3, #1
80011ae: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80011b0: 68bb ldr r3, [r7, #8]
80011b2: 2b00 cmp r3, #0
80011b4: d1f9 bne.n 80011aa <HAL_ADC_ConfigChannel+0x1b2>
80011b6: e007 b.n 80011c8 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
80011b8: 687b ldr r3, [r7, #4]
80011ba: 6a9b ldr r3, [r3, #40] @ 0x28
80011bc: f043 0220 orr.w r2, r3, #32
80011c0: 687b ldr r3, [r7, #4]
80011c2: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
80011c4: 2301 movs r3, #1
80011c6: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
80011c8: 687b ldr r3, [r7, #4]
80011ca: 2200 movs r2, #0
80011cc: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
80011d0: 7bfb ldrb r3, [r7, #15]
}
80011d2: 4618 mov r0, r3
80011d4: 3714 adds r7, #20
80011d6: 46bd mov sp, r7
80011d8: bc80 pop {r7}
80011da: 4770 bx lr
80011dc: 40012400 .word 0x40012400
80011e0: 20000000 .word 0x20000000
80011e4: 431bde83 .word 0x431bde83
080011e8 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
80011e8: b580 push {r7, lr}
80011ea: b084 sub sp, #16
80011ec: af00 add r7, sp, #0
80011ee: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
80011f0: 2300 movs r3, #0
80011f2: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
80011f4: 687b ldr r3, [r7, #4]
80011f6: 681b ldr r3, [r3, #0]
80011f8: 689b ldr r3, [r3, #8]
80011fa: f003 0301 and.w r3, r3, #1
80011fe: 2b01 cmp r3, #1
8001200: d12e bne.n 8001260 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
8001202: 687b ldr r3, [r7, #4]
8001204: 681b ldr r3, [r3, #0]
8001206: 689a ldr r2, [r3, #8]
8001208: 687b ldr r3, [r7, #4]
800120a: 681b ldr r3, [r3, #0]
800120c: f022 0201 bic.w r2, r2, #1
8001210: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
8001212: f7ff fe0f bl 8000e34 <HAL_GetTick>
8001216: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
8001218: e01b b.n 8001252 <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
800121a: f7ff fe0b bl 8000e34 <HAL_GetTick>
800121e: 4602 mov r2, r0
8001220: 68fb ldr r3, [r7, #12]
8001222: 1ad3 subs r3, r2, r3
8001224: 2b02 cmp r3, #2
8001226: d914 bls.n 8001252 <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
8001228: 687b ldr r3, [r7, #4]
800122a: 681b ldr r3, [r3, #0]
800122c: 689b ldr r3, [r3, #8]
800122e: f003 0301 and.w r3, r3, #1
8001232: 2b01 cmp r3, #1
8001234: d10d bne.n 8001252 <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8001236: 687b ldr r3, [r7, #4]
8001238: 6a9b ldr r3, [r3, #40] @ 0x28
800123a: f043 0210 orr.w r2, r3, #16
800123e: 687b ldr r3, [r7, #4]
8001240: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8001242: 687b ldr r3, [r7, #4]
8001244: 6adb ldr r3, [r3, #44] @ 0x2c
8001246: f043 0201 orr.w r2, r3, #1
800124a: 687b ldr r3, [r7, #4]
800124c: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
800124e: 2301 movs r3, #1
8001250: e007 b.n 8001262 <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
8001252: 687b ldr r3, [r7, #4]
8001254: 681b ldr r3, [r3, #0]
8001256: 689b ldr r3, [r3, #8]
8001258: f003 0301 and.w r3, r3, #1
800125c: 2b01 cmp r3, #1
800125e: d0dc beq.n 800121a <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
8001260: 2300 movs r3, #0
}
8001262: 4618 mov r0, r3
8001264: 3710 adds r7, #16
8001266: 46bd mov sp, r7
8001268: bd80 pop {r7, pc}
...
0800126c <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
800126c: b480 push {r7}
800126e: b085 sub sp, #20
8001270: af00 add r7, sp, #0
8001272: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8001274: 687b ldr r3, [r7, #4]
8001276: f003 0307 and.w r3, r3, #7
800127a: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
800127c: 4b0c ldr r3, [pc, #48] @ (80012b0 <__NVIC_SetPriorityGrouping+0x44>)
800127e: 68db ldr r3, [r3, #12]
8001280: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8001282: 68ba ldr r2, [r7, #8]
8001284: f64f 03ff movw r3, #63743 @ 0xf8ff
8001288: 4013 ands r3, r2
800128a: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
800128c: 68fb ldr r3, [r7, #12]
800128e: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8001290: 68bb ldr r3, [r7, #8]
8001292: 4313 orrs r3, r2
reg_value = (reg_value |
8001294: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8001298: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800129c: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
800129e: 4a04 ldr r2, [pc, #16] @ (80012b0 <__NVIC_SetPriorityGrouping+0x44>)
80012a0: 68bb ldr r3, [r7, #8]
80012a2: 60d3 str r3, [r2, #12]
}
80012a4: bf00 nop
80012a6: 3714 adds r7, #20
80012a8: 46bd mov sp, r7
80012aa: bc80 pop {r7}
80012ac: 4770 bx lr
80012ae: bf00 nop
80012b0: e000ed00 .word 0xe000ed00
080012b4 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
80012b4: b480 push {r7}
80012b6: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
80012b8: 4b04 ldr r3, [pc, #16] @ (80012cc <__NVIC_GetPriorityGrouping+0x18>)
80012ba: 68db ldr r3, [r3, #12]
80012bc: 0a1b lsrs r3, r3, #8
80012be: f003 0307 and.w r3, r3, #7
}
80012c2: 4618 mov r0, r3
80012c4: 46bd mov sp, r7
80012c6: bc80 pop {r7}
80012c8: 4770 bx lr
80012ca: bf00 nop
80012cc: e000ed00 .word 0xe000ed00
080012d0 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
80012d0: b480 push {r7}
80012d2: b083 sub sp, #12
80012d4: af00 add r7, sp, #0
80012d6: 4603 mov r3, r0
80012d8: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80012da: f997 3007 ldrsb.w r3, [r7, #7]
80012de: 2b00 cmp r3, #0
80012e0: db0b blt.n 80012fa <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
80012e2: 79fb ldrb r3, [r7, #7]
80012e4: f003 021f and.w r2, r3, #31
80012e8: 4906 ldr r1, [pc, #24] @ (8001304 <__NVIC_EnableIRQ+0x34>)
80012ea: f997 3007 ldrsb.w r3, [r7, #7]
80012ee: 095b lsrs r3, r3, #5
80012f0: 2001 movs r0, #1
80012f2: fa00 f202 lsl.w r2, r0, r2
80012f6: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
80012fa: bf00 nop
80012fc: 370c adds r7, #12
80012fe: 46bd mov sp, r7
8001300: bc80 pop {r7}
8001302: 4770 bx lr
8001304: e000e100 .word 0xe000e100
08001308 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8001308: b480 push {r7}
800130a: b083 sub sp, #12
800130c: af00 add r7, sp, #0
800130e: 4603 mov r3, r0
8001310: 6039 str r1, [r7, #0]
8001312: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8001314: f997 3007 ldrsb.w r3, [r7, #7]
8001318: 2b00 cmp r3, #0
800131a: db0a blt.n 8001332 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
800131c: 683b ldr r3, [r7, #0]
800131e: b2da uxtb r2, r3
8001320: 490c ldr r1, [pc, #48] @ (8001354 <__NVIC_SetPriority+0x4c>)
8001322: f997 3007 ldrsb.w r3, [r7, #7]
8001326: 0112 lsls r2, r2, #4
8001328: b2d2 uxtb r2, r2
800132a: 440b add r3, r1
800132c: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8001330: e00a b.n 8001348 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8001332: 683b ldr r3, [r7, #0]
8001334: b2da uxtb r2, r3
8001336: 4908 ldr r1, [pc, #32] @ (8001358 <__NVIC_SetPriority+0x50>)
8001338: 79fb ldrb r3, [r7, #7]
800133a: f003 030f and.w r3, r3, #15
800133e: 3b04 subs r3, #4
8001340: 0112 lsls r2, r2, #4
8001342: b2d2 uxtb r2, r2
8001344: 440b add r3, r1
8001346: 761a strb r2, [r3, #24]
}
8001348: bf00 nop
800134a: 370c adds r7, #12
800134c: 46bd mov sp, r7
800134e: bc80 pop {r7}
8001350: 4770 bx lr
8001352: bf00 nop
8001354: e000e100 .word 0xe000e100
8001358: e000ed00 .word 0xe000ed00
0800135c <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
800135c: b480 push {r7}
800135e: b089 sub sp, #36 @ 0x24
8001360: af00 add r7, sp, #0
8001362: 60f8 str r0, [r7, #12]
8001364: 60b9 str r1, [r7, #8]
8001366: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8001368: 68fb ldr r3, [r7, #12]
800136a: f003 0307 and.w r3, r3, #7
800136e: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8001370: 69fb ldr r3, [r7, #28]
8001372: f1c3 0307 rsb r3, r3, #7
8001376: 2b04 cmp r3, #4
8001378: bf28 it cs
800137a: 2304 movcs r3, #4
800137c: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
800137e: 69fb ldr r3, [r7, #28]
8001380: 3304 adds r3, #4
8001382: 2b06 cmp r3, #6
8001384: d902 bls.n 800138c <NVIC_EncodePriority+0x30>
8001386: 69fb ldr r3, [r7, #28]
8001388: 3b03 subs r3, #3
800138a: e000 b.n 800138e <NVIC_EncodePriority+0x32>
800138c: 2300 movs r3, #0
800138e: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8001390: f04f 32ff mov.w r2, #4294967295
8001394: 69bb ldr r3, [r7, #24]
8001396: fa02 f303 lsl.w r3, r2, r3
800139a: 43da mvns r2, r3
800139c: 68bb ldr r3, [r7, #8]
800139e: 401a ands r2, r3
80013a0: 697b ldr r3, [r7, #20]
80013a2: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
80013a4: f04f 31ff mov.w r1, #4294967295
80013a8: 697b ldr r3, [r7, #20]
80013aa: fa01 f303 lsl.w r3, r1, r3
80013ae: 43d9 mvns r1, r3
80013b0: 687b ldr r3, [r7, #4]
80013b2: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
80013b4: 4313 orrs r3, r2
);
}
80013b6: 4618 mov r0, r3
80013b8: 3724 adds r7, #36 @ 0x24
80013ba: 46bd mov sp, r7
80013bc: bc80 pop {r7}
80013be: 4770 bx lr
080013c0 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
80013c0: b580 push {r7, lr}
80013c2: b082 sub sp, #8
80013c4: af00 add r7, sp, #0
80013c6: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
80013c8: 687b ldr r3, [r7, #4]
80013ca: 3b01 subs r3, #1
80013cc: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
80013d0: d301 bcc.n 80013d6 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
80013d2: 2301 movs r3, #1
80013d4: e00f b.n 80013f6 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
80013d6: 4a0a ldr r2, [pc, #40] @ (8001400 <SysTick_Config+0x40>)
80013d8: 687b ldr r3, [r7, #4]
80013da: 3b01 subs r3, #1
80013dc: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
80013de: 210f movs r1, #15
80013e0: f04f 30ff mov.w r0, #4294967295
80013e4: f7ff ff90 bl 8001308 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
80013e8: 4b05 ldr r3, [pc, #20] @ (8001400 <SysTick_Config+0x40>)
80013ea: 2200 movs r2, #0
80013ec: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
80013ee: 4b04 ldr r3, [pc, #16] @ (8001400 <SysTick_Config+0x40>)
80013f0: 2207 movs r2, #7
80013f2: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
80013f4: 2300 movs r3, #0
}
80013f6: 4618 mov r0, r3
80013f8: 3708 adds r7, #8
80013fa: 46bd mov sp, r7
80013fc: bd80 pop {r7, pc}
80013fe: bf00 nop
8001400: e000e010 .word 0xe000e010
08001404 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8001404: b580 push {r7, lr}
8001406: b082 sub sp, #8
8001408: af00 add r7, sp, #0
800140a: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
800140c: 6878 ldr r0, [r7, #4]
800140e: f7ff ff2d bl 800126c <__NVIC_SetPriorityGrouping>
}
8001412: bf00 nop
8001414: 3708 adds r7, #8
8001416: 46bd mov sp, r7
8001418: bd80 pop {r7, pc}
0800141a <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
800141a: b580 push {r7, lr}
800141c: b086 sub sp, #24
800141e: af00 add r7, sp, #0
8001420: 4603 mov r3, r0
8001422: 60b9 str r1, [r7, #8]
8001424: 607a str r2, [r7, #4]
8001426: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8001428: 2300 movs r3, #0
800142a: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
800142c: f7ff ff42 bl 80012b4 <__NVIC_GetPriorityGrouping>
8001430: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8001432: 687a ldr r2, [r7, #4]
8001434: 68b9 ldr r1, [r7, #8]
8001436: 6978 ldr r0, [r7, #20]
8001438: f7ff ff90 bl 800135c <NVIC_EncodePriority>
800143c: 4602 mov r2, r0
800143e: f997 300f ldrsb.w r3, [r7, #15]
8001442: 4611 mov r1, r2
8001444: 4618 mov r0, r3
8001446: f7ff ff5f bl 8001308 <__NVIC_SetPriority>
}
800144a: bf00 nop
800144c: 3718 adds r7, #24
800144e: 46bd mov sp, r7
8001450: bd80 pop {r7, pc}
08001452 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8001452: b580 push {r7, lr}
8001454: b082 sub sp, #8
8001456: af00 add r7, sp, #0
8001458: 4603 mov r3, r0
800145a: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
800145c: f997 3007 ldrsb.w r3, [r7, #7]
8001460: 4618 mov r0, r3
8001462: f7ff ff35 bl 80012d0 <__NVIC_EnableIRQ>
}
8001466: bf00 nop
8001468: 3708 adds r7, #8
800146a: 46bd mov sp, r7
800146c: bd80 pop {r7, pc}
0800146e <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
800146e: b580 push {r7, lr}
8001470: b082 sub sp, #8
8001472: af00 add r7, sp, #0
8001474: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8001476: 6878 ldr r0, [r7, #4]
8001478: f7ff ffa2 bl 80013c0 <SysTick_Config>
800147c: 4603 mov r3, r0
}
800147e: 4618 mov r0, r3
8001480: 3708 adds r7, #8
8001482: 46bd mov sp, r7
8001484: bd80 pop {r7, pc}
08001486 <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8001486: b580 push {r7, lr}
8001488: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
800148a: f7fe fe5f bl 800014c <HAL_SYSTICK_Callback>
}
800148e: bf00 nop
8001490: bd80 pop {r7, pc}
...
08001494 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8001494: b480 push {r7}
8001496: b08b sub sp, #44 @ 0x2c
8001498: af00 add r7, sp, #0
800149a: 6078 str r0, [r7, #4]
800149c: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
800149e: 2300 movs r3, #0
80014a0: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
80014a2: 2300 movs r3, #0
80014a4: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
80014a6: e169 b.n 800177c <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
80014a8: 2201 movs r2, #1
80014aa: 6a7b ldr r3, [r7, #36] @ 0x24
80014ac: fa02 f303 lsl.w r3, r2, r3
80014b0: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
80014b2: 683b ldr r3, [r7, #0]
80014b4: 681b ldr r3, [r3, #0]
80014b6: 69fa ldr r2, [r7, #28]
80014b8: 4013 ands r3, r2
80014ba: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
80014bc: 69ba ldr r2, [r7, #24]
80014be: 69fb ldr r3, [r7, #28]
80014c0: 429a cmp r2, r3
80014c2: f040 8158 bne.w 8001776 <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
80014c6: 683b ldr r3, [r7, #0]
80014c8: 685b ldr r3, [r3, #4]
80014ca: 4a9a ldr r2, [pc, #616] @ (8001734 <HAL_GPIO_Init+0x2a0>)
80014cc: 4293 cmp r3, r2
80014ce: d05e beq.n 800158e <HAL_GPIO_Init+0xfa>
80014d0: 4a98 ldr r2, [pc, #608] @ (8001734 <HAL_GPIO_Init+0x2a0>)
80014d2: 4293 cmp r3, r2
80014d4: d875 bhi.n 80015c2 <HAL_GPIO_Init+0x12e>
80014d6: 4a98 ldr r2, [pc, #608] @ (8001738 <HAL_GPIO_Init+0x2a4>)
80014d8: 4293 cmp r3, r2
80014da: d058 beq.n 800158e <HAL_GPIO_Init+0xfa>
80014dc: 4a96 ldr r2, [pc, #600] @ (8001738 <HAL_GPIO_Init+0x2a4>)
80014de: 4293 cmp r3, r2
80014e0: d86f bhi.n 80015c2 <HAL_GPIO_Init+0x12e>
80014e2: 4a96 ldr r2, [pc, #600] @ (800173c <HAL_GPIO_Init+0x2a8>)
80014e4: 4293 cmp r3, r2
80014e6: d052 beq.n 800158e <HAL_GPIO_Init+0xfa>
80014e8: 4a94 ldr r2, [pc, #592] @ (800173c <HAL_GPIO_Init+0x2a8>)
80014ea: 4293 cmp r3, r2
80014ec: d869 bhi.n 80015c2 <HAL_GPIO_Init+0x12e>
80014ee: 4a94 ldr r2, [pc, #592] @ (8001740 <HAL_GPIO_Init+0x2ac>)
80014f0: 4293 cmp r3, r2
80014f2: d04c beq.n 800158e <HAL_GPIO_Init+0xfa>
80014f4: 4a92 ldr r2, [pc, #584] @ (8001740 <HAL_GPIO_Init+0x2ac>)
80014f6: 4293 cmp r3, r2
80014f8: d863 bhi.n 80015c2 <HAL_GPIO_Init+0x12e>
80014fa: 4a92 ldr r2, [pc, #584] @ (8001744 <HAL_GPIO_Init+0x2b0>)
80014fc: 4293 cmp r3, r2
80014fe: d046 beq.n 800158e <HAL_GPIO_Init+0xfa>
8001500: 4a90 ldr r2, [pc, #576] @ (8001744 <HAL_GPIO_Init+0x2b0>)
8001502: 4293 cmp r3, r2
8001504: d85d bhi.n 80015c2 <HAL_GPIO_Init+0x12e>
8001506: 2b12 cmp r3, #18
8001508: d82a bhi.n 8001560 <HAL_GPIO_Init+0xcc>
800150a: 2b12 cmp r3, #18
800150c: d859 bhi.n 80015c2 <HAL_GPIO_Init+0x12e>
800150e: a201 add r2, pc, #4 @ (adr r2, 8001514 <HAL_GPIO_Init+0x80>)
8001510: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001514: 0800158f .word 0x0800158f
8001518: 08001569 .word 0x08001569
800151c: 0800157b .word 0x0800157b
8001520: 080015bd .word 0x080015bd
8001524: 080015c3 .word 0x080015c3
8001528: 080015c3 .word 0x080015c3
800152c: 080015c3 .word 0x080015c3
8001530: 080015c3 .word 0x080015c3
8001534: 080015c3 .word 0x080015c3
8001538: 080015c3 .word 0x080015c3
800153c: 080015c3 .word 0x080015c3
8001540: 080015c3 .word 0x080015c3
8001544: 080015c3 .word 0x080015c3
8001548: 080015c3 .word 0x080015c3
800154c: 080015c3 .word 0x080015c3
8001550: 080015c3 .word 0x080015c3
8001554: 080015c3 .word 0x080015c3
8001558: 08001571 .word 0x08001571
800155c: 08001585 .word 0x08001585
8001560: 4a79 ldr r2, [pc, #484] @ (8001748 <HAL_GPIO_Init+0x2b4>)
8001562: 4293 cmp r3, r2
8001564: d013 beq.n 800158e <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8001566: e02c b.n 80015c2 <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8001568: 683b ldr r3, [r7, #0]
800156a: 68db ldr r3, [r3, #12]
800156c: 623b str r3, [r7, #32]
break;
800156e: e029 b.n 80015c4 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
8001570: 683b ldr r3, [r7, #0]
8001572: 68db ldr r3, [r3, #12]
8001574: 3304 adds r3, #4
8001576: 623b str r3, [r7, #32]
break;
8001578: e024 b.n 80015c4 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
800157a: 683b ldr r3, [r7, #0]
800157c: 68db ldr r3, [r3, #12]
800157e: 3308 adds r3, #8
8001580: 623b str r3, [r7, #32]
break;
8001582: e01f b.n 80015c4 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8001584: 683b ldr r3, [r7, #0]
8001586: 68db ldr r3, [r3, #12]
8001588: 330c adds r3, #12
800158a: 623b str r3, [r7, #32]
break;
800158c: e01a b.n 80015c4 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
800158e: 683b ldr r3, [r7, #0]
8001590: 689b ldr r3, [r3, #8]
8001592: 2b00 cmp r3, #0
8001594: d102 bne.n 800159c <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8001596: 2304 movs r3, #4
8001598: 623b str r3, [r7, #32]
break;
800159a: e013 b.n 80015c4 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
800159c: 683b ldr r3, [r7, #0]
800159e: 689b ldr r3, [r3, #8]
80015a0: 2b01 cmp r3, #1
80015a2: d105 bne.n 80015b0 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
80015a4: 2308 movs r3, #8
80015a6: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
80015a8: 687b ldr r3, [r7, #4]
80015aa: 69fa ldr r2, [r7, #28]
80015ac: 611a str r2, [r3, #16]
break;
80015ae: e009 b.n 80015c4 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
80015b0: 2308 movs r3, #8
80015b2: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
80015b4: 687b ldr r3, [r7, #4]
80015b6: 69fa ldr r2, [r7, #28]
80015b8: 615a str r2, [r3, #20]
break;
80015ba: e003 b.n 80015c4 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
80015bc: 2300 movs r3, #0
80015be: 623b str r3, [r7, #32]
break;
80015c0: e000 b.n 80015c4 <HAL_GPIO_Init+0x130>
break;
80015c2: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
80015c4: 69bb ldr r3, [r7, #24]
80015c6: 2bff cmp r3, #255 @ 0xff
80015c8: d801 bhi.n 80015ce <HAL_GPIO_Init+0x13a>
80015ca: 687b ldr r3, [r7, #4]
80015cc: e001 b.n 80015d2 <HAL_GPIO_Init+0x13e>
80015ce: 687b ldr r3, [r7, #4]
80015d0: 3304 adds r3, #4
80015d2: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
80015d4: 69bb ldr r3, [r7, #24]
80015d6: 2bff cmp r3, #255 @ 0xff
80015d8: d802 bhi.n 80015e0 <HAL_GPIO_Init+0x14c>
80015da: 6a7b ldr r3, [r7, #36] @ 0x24
80015dc: 009b lsls r3, r3, #2
80015de: e002 b.n 80015e6 <HAL_GPIO_Init+0x152>
80015e0: 6a7b ldr r3, [r7, #36] @ 0x24
80015e2: 3b08 subs r3, #8
80015e4: 009b lsls r3, r3, #2
80015e6: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
80015e8: 697b ldr r3, [r7, #20]
80015ea: 681a ldr r2, [r3, #0]
80015ec: 210f movs r1, #15
80015ee: 693b ldr r3, [r7, #16]
80015f0: fa01 f303 lsl.w r3, r1, r3
80015f4: 43db mvns r3, r3
80015f6: 401a ands r2, r3
80015f8: 6a39 ldr r1, [r7, #32]
80015fa: 693b ldr r3, [r7, #16]
80015fc: fa01 f303 lsl.w r3, r1, r3
8001600: 431a orrs r2, r3
8001602: 697b ldr r3, [r7, #20]
8001604: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8001606: 683b ldr r3, [r7, #0]
8001608: 685b ldr r3, [r3, #4]
800160a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800160e: 2b00 cmp r3, #0
8001610: f000 80b1 beq.w 8001776 <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8001614: 4b4d ldr r3, [pc, #308] @ (800174c <HAL_GPIO_Init+0x2b8>)
8001616: 699b ldr r3, [r3, #24]
8001618: 4a4c ldr r2, [pc, #304] @ (800174c <HAL_GPIO_Init+0x2b8>)
800161a: f043 0301 orr.w r3, r3, #1
800161e: 6193 str r3, [r2, #24]
8001620: 4b4a ldr r3, [pc, #296] @ (800174c <HAL_GPIO_Init+0x2b8>)
8001622: 699b ldr r3, [r3, #24]
8001624: f003 0301 and.w r3, r3, #1
8001628: 60bb str r3, [r7, #8]
800162a: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
800162c: 4a48 ldr r2, [pc, #288] @ (8001750 <HAL_GPIO_Init+0x2bc>)
800162e: 6a7b ldr r3, [r7, #36] @ 0x24
8001630: 089b lsrs r3, r3, #2
8001632: 3302 adds r3, #2
8001634: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8001638: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
800163a: 6a7b ldr r3, [r7, #36] @ 0x24
800163c: f003 0303 and.w r3, r3, #3
8001640: 009b lsls r3, r3, #2
8001642: 220f movs r2, #15
8001644: fa02 f303 lsl.w r3, r2, r3
8001648: 43db mvns r3, r3
800164a: 68fa ldr r2, [r7, #12]
800164c: 4013 ands r3, r2
800164e: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
8001650: 687b ldr r3, [r7, #4]
8001652: 4a40 ldr r2, [pc, #256] @ (8001754 <HAL_GPIO_Init+0x2c0>)
8001654: 4293 cmp r3, r2
8001656: d013 beq.n 8001680 <HAL_GPIO_Init+0x1ec>
8001658: 687b ldr r3, [r7, #4]
800165a: 4a3f ldr r2, [pc, #252] @ (8001758 <HAL_GPIO_Init+0x2c4>)
800165c: 4293 cmp r3, r2
800165e: d00d beq.n 800167c <HAL_GPIO_Init+0x1e8>
8001660: 687b ldr r3, [r7, #4]
8001662: 4a3e ldr r2, [pc, #248] @ (800175c <HAL_GPIO_Init+0x2c8>)
8001664: 4293 cmp r3, r2
8001666: d007 beq.n 8001678 <HAL_GPIO_Init+0x1e4>
8001668: 687b ldr r3, [r7, #4]
800166a: 4a3d ldr r2, [pc, #244] @ (8001760 <HAL_GPIO_Init+0x2cc>)
800166c: 4293 cmp r3, r2
800166e: d101 bne.n 8001674 <HAL_GPIO_Init+0x1e0>
8001670: 2303 movs r3, #3
8001672: e006 b.n 8001682 <HAL_GPIO_Init+0x1ee>
8001674: 2304 movs r3, #4
8001676: e004 b.n 8001682 <HAL_GPIO_Init+0x1ee>
8001678: 2302 movs r3, #2
800167a: e002 b.n 8001682 <HAL_GPIO_Init+0x1ee>
800167c: 2301 movs r3, #1
800167e: e000 b.n 8001682 <HAL_GPIO_Init+0x1ee>
8001680: 2300 movs r3, #0
8001682: 6a7a ldr r2, [r7, #36] @ 0x24
8001684: f002 0203 and.w r2, r2, #3
8001688: 0092 lsls r2, r2, #2
800168a: 4093 lsls r3, r2
800168c: 68fa ldr r2, [r7, #12]
800168e: 4313 orrs r3, r2
8001690: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
8001692: 492f ldr r1, [pc, #188] @ (8001750 <HAL_GPIO_Init+0x2bc>)
8001694: 6a7b ldr r3, [r7, #36] @ 0x24
8001696: 089b lsrs r3, r3, #2
8001698: 3302 adds r3, #2
800169a: 68fa ldr r2, [r7, #12]
800169c: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
80016a0: 683b ldr r3, [r7, #0]
80016a2: 685b ldr r3, [r3, #4]
80016a4: f403 1380 and.w r3, r3, #1048576 @ 0x100000
80016a8: 2b00 cmp r3, #0
80016aa: d006 beq.n 80016ba <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
80016ac: 4b2d ldr r3, [pc, #180] @ (8001764 <HAL_GPIO_Init+0x2d0>)
80016ae: 689a ldr r2, [r3, #8]
80016b0: 492c ldr r1, [pc, #176] @ (8001764 <HAL_GPIO_Init+0x2d0>)
80016b2: 69bb ldr r3, [r7, #24]
80016b4: 4313 orrs r3, r2
80016b6: 608b str r3, [r1, #8]
80016b8: e006 b.n 80016c8 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
80016ba: 4b2a ldr r3, [pc, #168] @ (8001764 <HAL_GPIO_Init+0x2d0>)
80016bc: 689a ldr r2, [r3, #8]
80016be: 69bb ldr r3, [r7, #24]
80016c0: 43db mvns r3, r3
80016c2: 4928 ldr r1, [pc, #160] @ (8001764 <HAL_GPIO_Init+0x2d0>)
80016c4: 4013 ands r3, r2
80016c6: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
80016c8: 683b ldr r3, [r7, #0]
80016ca: 685b ldr r3, [r3, #4]
80016cc: f403 1300 and.w r3, r3, #2097152 @ 0x200000
80016d0: 2b00 cmp r3, #0
80016d2: d006 beq.n 80016e2 <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
80016d4: 4b23 ldr r3, [pc, #140] @ (8001764 <HAL_GPIO_Init+0x2d0>)
80016d6: 68da ldr r2, [r3, #12]
80016d8: 4922 ldr r1, [pc, #136] @ (8001764 <HAL_GPIO_Init+0x2d0>)
80016da: 69bb ldr r3, [r7, #24]
80016dc: 4313 orrs r3, r2
80016de: 60cb str r3, [r1, #12]
80016e0: e006 b.n 80016f0 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
80016e2: 4b20 ldr r3, [pc, #128] @ (8001764 <HAL_GPIO_Init+0x2d0>)
80016e4: 68da ldr r2, [r3, #12]
80016e6: 69bb ldr r3, [r7, #24]
80016e8: 43db mvns r3, r3
80016ea: 491e ldr r1, [pc, #120] @ (8001764 <HAL_GPIO_Init+0x2d0>)
80016ec: 4013 ands r3, r2
80016ee: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
80016f0: 683b ldr r3, [r7, #0]
80016f2: 685b ldr r3, [r3, #4]
80016f4: f403 3300 and.w r3, r3, #131072 @ 0x20000
80016f8: 2b00 cmp r3, #0
80016fa: d006 beq.n 800170a <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
80016fc: 4b19 ldr r3, [pc, #100] @ (8001764 <HAL_GPIO_Init+0x2d0>)
80016fe: 685a ldr r2, [r3, #4]
8001700: 4918 ldr r1, [pc, #96] @ (8001764 <HAL_GPIO_Init+0x2d0>)
8001702: 69bb ldr r3, [r7, #24]
8001704: 4313 orrs r3, r2
8001706: 604b str r3, [r1, #4]
8001708: e006 b.n 8001718 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
800170a: 4b16 ldr r3, [pc, #88] @ (8001764 <HAL_GPIO_Init+0x2d0>)
800170c: 685a ldr r2, [r3, #4]
800170e: 69bb ldr r3, [r7, #24]
8001710: 43db mvns r3, r3
8001712: 4914 ldr r1, [pc, #80] @ (8001764 <HAL_GPIO_Init+0x2d0>)
8001714: 4013 ands r3, r2
8001716: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8001718: 683b ldr r3, [r7, #0]
800171a: 685b ldr r3, [r3, #4]
800171c: f403 3380 and.w r3, r3, #65536 @ 0x10000
8001720: 2b00 cmp r3, #0
8001722: d021 beq.n 8001768 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
8001724: 4b0f ldr r3, [pc, #60] @ (8001764 <HAL_GPIO_Init+0x2d0>)
8001726: 681a ldr r2, [r3, #0]
8001728: 490e ldr r1, [pc, #56] @ (8001764 <HAL_GPIO_Init+0x2d0>)
800172a: 69bb ldr r3, [r7, #24]
800172c: 4313 orrs r3, r2
800172e: 600b str r3, [r1, #0]
8001730: e021 b.n 8001776 <HAL_GPIO_Init+0x2e2>
8001732: bf00 nop
8001734: 10320000 .word 0x10320000
8001738: 10310000 .word 0x10310000
800173c: 10220000 .word 0x10220000
8001740: 10210000 .word 0x10210000
8001744: 10120000 .word 0x10120000
8001748: 10110000 .word 0x10110000
800174c: 40021000 .word 0x40021000
8001750: 40010000 .word 0x40010000
8001754: 40010800 .word 0x40010800
8001758: 40010c00 .word 0x40010c00
800175c: 40011000 .word 0x40011000
8001760: 40011400 .word 0x40011400
8001764: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8001768: 4b0b ldr r3, [pc, #44] @ (8001798 <HAL_GPIO_Init+0x304>)
800176a: 681a ldr r2, [r3, #0]
800176c: 69bb ldr r3, [r7, #24]
800176e: 43db mvns r3, r3
8001770: 4909 ldr r1, [pc, #36] @ (8001798 <HAL_GPIO_Init+0x304>)
8001772: 4013 ands r3, r2
8001774: 600b str r3, [r1, #0]
}
}
}
position++;
8001776: 6a7b ldr r3, [r7, #36] @ 0x24
8001778: 3301 adds r3, #1
800177a: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
800177c: 683b ldr r3, [r7, #0]
800177e: 681a ldr r2, [r3, #0]
8001780: 6a7b ldr r3, [r7, #36] @ 0x24
8001782: fa22 f303 lsr.w r3, r2, r3
8001786: 2b00 cmp r3, #0
8001788: f47f ae8e bne.w 80014a8 <HAL_GPIO_Init+0x14>
}
}
800178c: bf00 nop
800178e: bf00 nop
8001790: 372c adds r7, #44 @ 0x2c
8001792: 46bd mov sp, r7
8001794: bc80 pop {r7}
8001796: 4770 bx lr
8001798: 40010400 .word 0x40010400
0800179c <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
800179c: b480 push {r7}
800179e: b083 sub sp, #12
80017a0: af00 add r7, sp, #0
80017a2: 6078 str r0, [r7, #4]
80017a4: 460b mov r3, r1
80017a6: 807b strh r3, [r7, #2]
80017a8: 4613 mov r3, r2
80017aa: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
80017ac: 787b ldrb r3, [r7, #1]
80017ae: 2b00 cmp r3, #0
80017b0: d003 beq.n 80017ba <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
80017b2: 887a ldrh r2, [r7, #2]
80017b4: 687b ldr r3, [r7, #4]
80017b6: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
80017b8: e003 b.n 80017c2 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
80017ba: 887b ldrh r3, [r7, #2]
80017bc: 041a lsls r2, r3, #16
80017be: 687b ldr r3, [r7, #4]
80017c0: 611a str r2, [r3, #16]
}
80017c2: bf00 nop
80017c4: 370c adds r7, #12
80017c6: 46bd mov sp, r7
80017c8: bc80 pop {r7}
80017ca: 4770 bx lr
080017cc <HAL_GPIO_TogglePin>:
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
* @param GPIO_Pin: Specifies the pins to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
80017cc: b480 push {r7}
80017ce: b085 sub sp, #20
80017d0: af00 add r7, sp, #0
80017d2: 6078 str r0, [r7, #4]
80017d4: 460b mov r3, r1
80017d6: 807b strh r3, [r7, #2]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* get current Output Data Register value */
odr = GPIOx->ODR;
80017d8: 687b ldr r3, [r7, #4]
80017da: 68db ldr r3, [r3, #12]
80017dc: 60fb str r3, [r7, #12]
/* Set selected pins that were at low level, and reset ones that were high */
GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
80017de: 887a ldrh r2, [r7, #2]
80017e0: 68fb ldr r3, [r7, #12]
80017e2: 4013 ands r3, r2
80017e4: 041a lsls r2, r3, #16
80017e6: 68fb ldr r3, [r7, #12]
80017e8: 43d9 mvns r1, r3
80017ea: 887b ldrh r3, [r7, #2]
80017ec: 400b ands r3, r1
80017ee: 431a orrs r2, r3
80017f0: 687b ldr r3, [r7, #4]
80017f2: 611a str r2, [r3, #16]
}
80017f4: bf00 nop
80017f6: 3714 adds r7, #20
80017f8: 46bd mov sp, r7
80017fa: bc80 pop {r7}
80017fc: 4770 bx lr
080017fe <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
80017fe: b580 push {r7, lr}
8001800: b084 sub sp, #16
8001802: af00 add r7, sp, #0
8001804: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8001806: 687b ldr r3, [r7, #4]
8001808: 2b00 cmp r3, #0
800180a: d101 bne.n 8001810 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
800180c: 2301 movs r3, #1
800180e: e0e8 b.n 80019e2 <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8001810: 687b ldr r3, [r7, #4]
8001812: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
8001816: b2db uxtb r3, r3
8001818: 2b00 cmp r3, #0
800181a: d106 bne.n 800182a <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
800181c: 687b ldr r3, [r7, #4]
800181e: 2200 movs r2, #0
8001820: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8001824: 6878 ldr r0, [r7, #4]
8001826: f007 f8bf bl 80089a8 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
800182a: 687b ldr r3, [r7, #4]
800182c: 2203 movs r2, #3
800182e: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8001832: 687b ldr r3, [r7, #4]
8001834: 2200 movs r2, #0
8001836: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8001838: 687b ldr r3, [r7, #4]
800183a: 681b ldr r3, [r3, #0]
800183c: 4618 mov r0, r3
800183e: f002 ff63 bl 8004708 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8001842: 687b ldr r3, [r7, #4]
8001844: 6818 ldr r0, [r3, #0]
8001846: 687b ldr r3, [r7, #4]
8001848: 3304 adds r3, #4
800184a: cb0e ldmia r3, {r1, r2, r3}
800184c: f002 ff39 bl 80046c2 <USB_CoreInit>
8001850: 4603 mov r3, r0
8001852: 2b00 cmp r3, #0
8001854: d005 beq.n 8001862 <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8001856: 687b ldr r3, [r7, #4]
8001858: 2202 movs r2, #2
800185a: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
800185e: 2301 movs r3, #1
8001860: e0bf b.n 80019e2 <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
8001862: 687b ldr r3, [r7, #4]
8001864: 681b ldr r3, [r3, #0]
8001866: 2100 movs r1, #0
8001868: 4618 mov r0, r3
800186a: f002 ff67 bl 800473c <USB_SetCurrentMode>
800186e: 4603 mov r3, r0
8001870: 2b00 cmp r3, #0
8001872: d005 beq.n 8001880 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8001874: 687b ldr r3, [r7, #4]
8001876: 2202 movs r2, #2
8001878: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
800187c: 2301 movs r3, #1
800187e: e0b0 b.n 80019e2 <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001880: 2300 movs r3, #0
8001882: 73fb strb r3, [r7, #15]
8001884: e03e b.n 8001904 <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
8001886: 7bfa ldrb r2, [r7, #15]
8001888: 6879 ldr r1, [r7, #4]
800188a: 4613 mov r3, r2
800188c: 009b lsls r3, r3, #2
800188e: 4413 add r3, r2
8001890: 00db lsls r3, r3, #3
8001892: 440b add r3, r1
8001894: 3311 adds r3, #17
8001896: 2201 movs r2, #1
8001898: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
800189a: 7bfa ldrb r2, [r7, #15]
800189c: 6879 ldr r1, [r7, #4]
800189e: 4613 mov r3, r2
80018a0: 009b lsls r3, r3, #2
80018a2: 4413 add r3, r2
80018a4: 00db lsls r3, r3, #3
80018a6: 440b add r3, r1
80018a8: 3310 adds r3, #16
80018aa: 7bfa ldrb r2, [r7, #15]
80018ac: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
80018ae: 7bfa ldrb r2, [r7, #15]
80018b0: 6879 ldr r1, [r7, #4]
80018b2: 4613 mov r3, r2
80018b4: 009b lsls r3, r3, #2
80018b6: 4413 add r3, r2
80018b8: 00db lsls r3, r3, #3
80018ba: 440b add r3, r1
80018bc: 3313 adds r3, #19
80018be: 2200 movs r2, #0
80018c0: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
80018c2: 7bfa ldrb r2, [r7, #15]
80018c4: 6879 ldr r1, [r7, #4]
80018c6: 4613 mov r3, r2
80018c8: 009b lsls r3, r3, #2
80018ca: 4413 add r3, r2
80018cc: 00db lsls r3, r3, #3
80018ce: 440b add r3, r1
80018d0: 3320 adds r3, #32
80018d2: 2200 movs r2, #0
80018d4: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
80018d6: 7bfa ldrb r2, [r7, #15]
80018d8: 6879 ldr r1, [r7, #4]
80018da: 4613 mov r3, r2
80018dc: 009b lsls r3, r3, #2
80018de: 4413 add r3, r2
80018e0: 00db lsls r3, r3, #3
80018e2: 440b add r3, r1
80018e4: 3324 adds r3, #36 @ 0x24
80018e6: 2200 movs r2, #0
80018e8: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
80018ea: 7bfb ldrb r3, [r7, #15]
80018ec: 6879 ldr r1, [r7, #4]
80018ee: 1c5a adds r2, r3, #1
80018f0: 4613 mov r3, r2
80018f2: 009b lsls r3, r3, #2
80018f4: 4413 add r3, r2
80018f6: 00db lsls r3, r3, #3
80018f8: 440b add r3, r1
80018fa: 2200 movs r2, #0
80018fc: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80018fe: 7bfb ldrb r3, [r7, #15]
8001900: 3301 adds r3, #1
8001902: 73fb strb r3, [r7, #15]
8001904: 687b ldr r3, [r7, #4]
8001906: 791b ldrb r3, [r3, #4]
8001908: 7bfa ldrb r2, [r7, #15]
800190a: 429a cmp r2, r3
800190c: d3bb bcc.n 8001886 <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800190e: 2300 movs r3, #0
8001910: 73fb strb r3, [r7, #15]
8001912: e044 b.n 800199e <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
8001914: 7bfa ldrb r2, [r7, #15]
8001916: 6879 ldr r1, [r7, #4]
8001918: 4613 mov r3, r2
800191a: 009b lsls r3, r3, #2
800191c: 4413 add r3, r2
800191e: 00db lsls r3, r3, #3
8001920: 440b add r3, r1
8001922: f203 1351 addw r3, r3, #337 @ 0x151
8001926: 2200 movs r2, #0
8001928: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
800192a: 7bfa ldrb r2, [r7, #15]
800192c: 6879 ldr r1, [r7, #4]
800192e: 4613 mov r3, r2
8001930: 009b lsls r3, r3, #2
8001932: 4413 add r3, r2
8001934: 00db lsls r3, r3, #3
8001936: 440b add r3, r1
8001938: f503 73a8 add.w r3, r3, #336 @ 0x150
800193c: 7bfa ldrb r2, [r7, #15]
800193e: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8001940: 7bfa ldrb r2, [r7, #15]
8001942: 6879 ldr r1, [r7, #4]
8001944: 4613 mov r3, r2
8001946: 009b lsls r3, r3, #2
8001948: 4413 add r3, r2
800194a: 00db lsls r3, r3, #3
800194c: 440b add r3, r1
800194e: f203 1353 addw r3, r3, #339 @ 0x153
8001952: 2200 movs r2, #0
8001954: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
8001956: 7bfa ldrb r2, [r7, #15]
8001958: 6879 ldr r1, [r7, #4]
800195a: 4613 mov r3, r2
800195c: 009b lsls r3, r3, #2
800195e: 4413 add r3, r2
8001960: 00db lsls r3, r3, #3
8001962: 440b add r3, r1
8001964: f503 73b0 add.w r3, r3, #352 @ 0x160
8001968: 2200 movs r2, #0
800196a: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
800196c: 7bfa ldrb r2, [r7, #15]
800196e: 6879 ldr r1, [r7, #4]
8001970: 4613 mov r3, r2
8001972: 009b lsls r3, r3, #2
8001974: 4413 add r3, r2
8001976: 00db lsls r3, r3, #3
8001978: 440b add r3, r1
800197a: f503 73b2 add.w r3, r3, #356 @ 0x164
800197e: 2200 movs r2, #0
8001980: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
8001982: 7bfa ldrb r2, [r7, #15]
8001984: 6879 ldr r1, [r7, #4]
8001986: 4613 mov r3, r2
8001988: 009b lsls r3, r3, #2
800198a: 4413 add r3, r2
800198c: 00db lsls r3, r3, #3
800198e: 440b add r3, r1
8001990: f503 73b4 add.w r3, r3, #360 @ 0x168
8001994: 2200 movs r2, #0
8001996: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001998: 7bfb ldrb r3, [r7, #15]
800199a: 3301 adds r3, #1
800199c: 73fb strb r3, [r7, #15]
800199e: 687b ldr r3, [r7, #4]
80019a0: 791b ldrb r3, [r3, #4]
80019a2: 7bfa ldrb r2, [r7, #15]
80019a4: 429a cmp r2, r3
80019a6: d3b5 bcc.n 8001914 <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
80019a8: 687b ldr r3, [r7, #4]
80019aa: 6818 ldr r0, [r3, #0]
80019ac: 687b ldr r3, [r7, #4]
80019ae: 3304 adds r3, #4
80019b0: cb0e ldmia r3, {r1, r2, r3}
80019b2: f002 fecf bl 8004754 <USB_DevInit>
80019b6: 4603 mov r3, r0
80019b8: 2b00 cmp r3, #0
80019ba: d005 beq.n 80019c8 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80019bc: 687b ldr r3, [r7, #4]
80019be: 2202 movs r2, #2
80019c0: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80019c4: 2301 movs r3, #1
80019c6: e00c b.n 80019e2 <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
80019c8: 687b ldr r3, [r7, #4]
80019ca: 2200 movs r2, #0
80019cc: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
80019ce: 687b ldr r3, [r7, #4]
80019d0: 2201 movs r2, #1
80019d2: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
80019d6: 687b ldr r3, [r7, #4]
80019d8: 681b ldr r3, [r3, #0]
80019da: 4618 mov r0, r3
80019dc: f005 f94f bl 8006c7e <USB_DevDisconnect>
return HAL_OK;
80019e0: 2300 movs r3, #0
}
80019e2: 4618 mov r0, r3
80019e4: 3710 adds r7, #16
80019e6: 46bd mov sp, r7
80019e8: bd80 pop {r7, pc}
080019ea <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
80019ea: b580 push {r7, lr}
80019ec: b082 sub sp, #8
80019ee: af00 add r7, sp, #0
80019f0: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
80019f2: 687b ldr r3, [r7, #4]
80019f4: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80019f8: 2b01 cmp r3, #1
80019fa: d101 bne.n 8001a00 <HAL_PCD_Start+0x16>
80019fc: 2302 movs r3, #2
80019fe: e016 b.n 8001a2e <HAL_PCD_Start+0x44>
8001a00: 687b ldr r3, [r7, #4]
8001a02: 2201 movs r2, #1
8001a04: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
8001a08: 687b ldr r3, [r7, #4]
8001a0a: 681b ldr r3, [r3, #0]
8001a0c: 4618 mov r0, r3
8001a0e: f002 fe65 bl 80046dc <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8001a12: 2101 movs r1, #1
8001a14: 6878 ldr r0, [r7, #4]
8001a16: f007 fa3a bl 8008e8e <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
8001a1a: 687b ldr r3, [r7, #4]
8001a1c: 681b ldr r3, [r3, #0]
8001a1e: 4618 mov r0, r3
8001a20: f005 f923 bl 8006c6a <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8001a24: 687b ldr r3, [r7, #4]
8001a26: 2200 movs r2, #0
8001a28: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8001a2c: 2300 movs r3, #0
}
8001a2e: 4618 mov r0, r3
8001a30: 3708 adds r7, #8
8001a32: 46bd mov sp, r7
8001a34: bd80 pop {r7, pc}
08001a36 <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8001a36: b580 push {r7, lr}
8001a38: b088 sub sp, #32
8001a3a: af00 add r7, sp, #0
8001a3c: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
8001a3e: 687b ldr r3, [r7, #4]
8001a40: 681b ldr r3, [r3, #0]
8001a42: 4618 mov r0, r3
8001a44: f005 f925 bl 8006c92 <USB_ReadInterrupts>
8001a48: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
8001a4a: 69bb ldr r3, [r7, #24]
8001a4c: f403 4300 and.w r3, r3, #32768 @ 0x8000
8001a50: 2b00 cmp r3, #0
8001a52: d003 beq.n 8001a5c <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
8001a54: 6878 ldr r0, [r7, #4]
8001a56: f000 fb1a bl 800208e <PCD_EP_ISR_Handler>
return;
8001a5a: e119 b.n 8001c90 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
8001a5c: 69bb ldr r3, [r7, #24]
8001a5e: f403 6380 and.w r3, r3, #1024 @ 0x400
8001a62: 2b00 cmp r3, #0
8001a64: d013 beq.n 8001a8e <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8001a66: 687b ldr r3, [r7, #4]
8001a68: 681b ldr r3, [r3, #0]
8001a6a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001a6e: b29a uxth r2, r3
8001a70: 687b ldr r3, [r7, #4]
8001a72: 681b ldr r3, [r3, #0]
8001a74: f422 6280 bic.w r2, r2, #1024 @ 0x400
8001a78: b292 uxth r2, r2
8001a7a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8001a7e: 6878 ldr r0, [r7, #4]
8001a80: f007 f80d bl 8008a9e <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
8001a84: 2100 movs r1, #0
8001a86: 6878 ldr r0, [r7, #4]
8001a88: f000 f905 bl 8001c96 <HAL_PCD_SetAddress>
return;
8001a8c: e100 b.n 8001c90 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
8001a8e: 69bb ldr r3, [r7, #24]
8001a90: f403 4380 and.w r3, r3, #16384 @ 0x4000
8001a94: 2b00 cmp r3, #0
8001a96: d00c beq.n 8001ab2 <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8001a98: 687b ldr r3, [r7, #4]
8001a9a: 681b ldr r3, [r3, #0]
8001a9c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001aa0: b29a uxth r2, r3
8001aa2: 687b ldr r3, [r7, #4]
8001aa4: 681b ldr r3, [r3, #0]
8001aa6: f422 4280 bic.w r2, r2, #16384 @ 0x4000
8001aaa: b292 uxth r2, r2
8001aac: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001ab0: e0ee b.n 8001c90 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
8001ab2: 69bb ldr r3, [r7, #24]
8001ab4: f403 5300 and.w r3, r3, #8192 @ 0x2000
8001ab8: 2b00 cmp r3, #0
8001aba: d00c beq.n 8001ad6 <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8001abc: 687b ldr r3, [r7, #4]
8001abe: 681b ldr r3, [r3, #0]
8001ac0: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001ac4: b29a uxth r2, r3
8001ac6: 687b ldr r3, [r7, #4]
8001ac8: 681b ldr r3, [r3, #0]
8001aca: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8001ace: b292 uxth r2, r2
8001ad0: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001ad4: e0dc b.n 8001c90 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
8001ad6: 69bb ldr r3, [r7, #24]
8001ad8: f403 5380 and.w r3, r3, #4096 @ 0x1000
8001adc: 2b00 cmp r3, #0
8001ade: d027 beq.n 8001b30 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8001ae0: 687b ldr r3, [r7, #4]
8001ae2: 681b ldr r3, [r3, #0]
8001ae4: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001ae8: b29a uxth r2, r3
8001aea: 687b ldr r3, [r7, #4]
8001aec: 681b ldr r3, [r3, #0]
8001aee: f022 0204 bic.w r2, r2, #4
8001af2: b292 uxth r2, r2
8001af4: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8001af8: 687b ldr r3, [r7, #4]
8001afa: 681b ldr r3, [r3, #0]
8001afc: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001b00: b29a uxth r2, r3
8001b02: 687b ldr r3, [r7, #4]
8001b04: 681b ldr r3, [r3, #0]
8001b06: f022 0208 bic.w r2, r2, #8
8001b0a: b292 uxth r2, r2
8001b0c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8001b10: 6878 ldr r0, [r7, #4]
8001b12: f006 fffd bl 8008b10 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8001b16: 687b ldr r3, [r7, #4]
8001b18: 681b ldr r3, [r3, #0]
8001b1a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001b1e: b29a uxth r2, r3
8001b20: 687b ldr r3, [r7, #4]
8001b22: 681b ldr r3, [r3, #0]
8001b24: f422 5280 bic.w r2, r2, #4096 @ 0x1000
8001b28: b292 uxth r2, r2
8001b2a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001b2e: e0af b.n 8001c90 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8001b30: 69bb ldr r3, [r7, #24]
8001b32: f403 6300 and.w r3, r3, #2048 @ 0x800
8001b36: 2b00 cmp r3, #0
8001b38: f000 8083 beq.w 8001c42 <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
8001b3c: 2300 movs r3, #0
8001b3e: 77fb strb r3, [r7, #31]
8001b40: e010 b.n 8001b64 <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8001b42: 687b ldr r3, [r7, #4]
8001b44: 681b ldr r3, [r3, #0]
8001b46: 461a mov r2, r3
8001b48: 7ffb ldrb r3, [r7, #31]
8001b4a: 009b lsls r3, r3, #2
8001b4c: 441a add r2, r3
8001b4e: 7ffb ldrb r3, [r7, #31]
8001b50: 8812 ldrh r2, [r2, #0]
8001b52: b292 uxth r2, r2
8001b54: 005b lsls r3, r3, #1
8001b56: 3320 adds r3, #32
8001b58: 443b add r3, r7
8001b5a: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8001b5e: 7ffb ldrb r3, [r7, #31]
8001b60: 3301 adds r3, #1
8001b62: 77fb strb r3, [r7, #31]
8001b64: 7ffb ldrb r3, [r7, #31]
8001b66: 2b07 cmp r3, #7
8001b68: d9eb bls.n 8001b42 <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8001b6a: 687b ldr r3, [r7, #4]
8001b6c: 681b ldr r3, [r3, #0]
8001b6e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001b72: b29a uxth r2, r3
8001b74: 687b ldr r3, [r7, #4]
8001b76: 681b ldr r3, [r3, #0]
8001b78: f042 0201 orr.w r2, r2, #1
8001b7c: b292 uxth r2, r2
8001b7e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
8001b82: 687b ldr r3, [r7, #4]
8001b84: 681b ldr r3, [r3, #0]
8001b86: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001b8a: b29a uxth r2, r3
8001b8c: 687b ldr r3, [r7, #4]
8001b8e: 681b ldr r3, [r3, #0]
8001b90: f022 0201 bic.w r2, r2, #1
8001b94: b292 uxth r2, r2
8001b96: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8001b9a: bf00 nop
8001b9c: 687b ldr r3, [r7, #4]
8001b9e: 681b ldr r3, [r3, #0]
8001ba0: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001ba4: b29b uxth r3, r3
8001ba6: f403 6380 and.w r3, r3, #1024 @ 0x400
8001baa: 2b00 cmp r3, #0
8001bac: d0f6 beq.n 8001b9c <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8001bae: 687b ldr r3, [r7, #4]
8001bb0: 681b ldr r3, [r3, #0]
8001bb2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001bb6: b29a uxth r2, r3
8001bb8: 687b ldr r3, [r7, #4]
8001bba: 681b ldr r3, [r3, #0]
8001bbc: f422 6280 bic.w r2, r2, #1024 @ 0x400
8001bc0: b292 uxth r2, r2
8001bc2: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8001bc6: 2300 movs r3, #0
8001bc8: 77fb strb r3, [r7, #31]
8001bca: e00f b.n 8001bec <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8001bcc: 7ffb ldrb r3, [r7, #31]
8001bce: 687a ldr r2, [r7, #4]
8001bd0: 6812 ldr r2, [r2, #0]
8001bd2: 4611 mov r1, r2
8001bd4: 7ffa ldrb r2, [r7, #31]
8001bd6: 0092 lsls r2, r2, #2
8001bd8: 440a add r2, r1
8001bda: 005b lsls r3, r3, #1
8001bdc: 3320 adds r3, #32
8001bde: 443b add r3, r7
8001be0: f833 3c18 ldrh.w r3, [r3, #-24]
8001be4: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8001be6: 7ffb ldrb r3, [r7, #31]
8001be8: 3301 adds r3, #1
8001bea: 77fb strb r3, [r7, #31]
8001bec: 7ffb ldrb r3, [r7, #31]
8001bee: 2b07 cmp r3, #7
8001bf0: d9ec bls.n 8001bcc <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8001bf2: 687b ldr r3, [r7, #4]
8001bf4: 681b ldr r3, [r3, #0]
8001bf6: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001bfa: b29a uxth r2, r3
8001bfc: 687b ldr r3, [r7, #4]
8001bfe: 681b ldr r3, [r3, #0]
8001c00: f042 0208 orr.w r2, r2, #8
8001c04: b292 uxth r2, r2
8001c06: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8001c0a: 687b ldr r3, [r7, #4]
8001c0c: 681b ldr r3, [r3, #0]
8001c0e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001c12: b29a uxth r2, r3
8001c14: 687b ldr r3, [r7, #4]
8001c16: 681b ldr r3, [r3, #0]
8001c18: f422 6200 bic.w r2, r2, #2048 @ 0x800
8001c1c: b292 uxth r2, r2
8001c1e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8001c22: 687b ldr r3, [r7, #4]
8001c24: 681b ldr r3, [r3, #0]
8001c26: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001c2a: b29a uxth r2, r3
8001c2c: 687b ldr r3, [r7, #4]
8001c2e: 681b ldr r3, [r3, #0]
8001c30: f042 0204 orr.w r2, r2, #4
8001c34: b292 uxth r2, r2
8001c36: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8001c3a: 6878 ldr r0, [r7, #4]
8001c3c: f006 ff4e bl 8008adc <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8001c40: e026 b.n 8001c90 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8001c42: 69bb ldr r3, [r7, #24]
8001c44: f403 7300 and.w r3, r3, #512 @ 0x200
8001c48: 2b00 cmp r3, #0
8001c4a: d00f beq.n 8001c6c <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8001c4c: 687b ldr r3, [r7, #4]
8001c4e: 681b ldr r3, [r3, #0]
8001c50: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001c54: b29a uxth r2, r3
8001c56: 687b ldr r3, [r7, #4]
8001c58: 681b ldr r3, [r3, #0]
8001c5a: f422 7200 bic.w r2, r2, #512 @ 0x200
8001c5e: b292 uxth r2, r2
8001c60: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8001c64: 6878 ldr r0, [r7, #4]
8001c66: f006 ff0c bl 8008a82 <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8001c6a: e011 b.n 8001c90 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8001c6c: 69bb ldr r3, [r7, #24]
8001c6e: f403 7380 and.w r3, r3, #256 @ 0x100
8001c72: 2b00 cmp r3, #0
8001c74: d00c beq.n 8001c90 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8001c76: 687b ldr r3, [r7, #4]
8001c78: 681b ldr r3, [r3, #0]
8001c7a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001c7e: b29a uxth r2, r3
8001c80: 687b ldr r3, [r7, #4]
8001c82: 681b ldr r3, [r3, #0]
8001c84: f422 7280 bic.w r2, r2, #256 @ 0x100
8001c88: b292 uxth r2, r2
8001c8a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001c8e: bf00 nop
}
}
8001c90: 3720 adds r7, #32
8001c92: 46bd mov sp, r7
8001c94: bd80 pop {r7, pc}
08001c96 <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8001c96: b580 push {r7, lr}
8001c98: b082 sub sp, #8
8001c9a: af00 add r7, sp, #0
8001c9c: 6078 str r0, [r7, #4]
8001c9e: 460b mov r3, r1
8001ca0: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8001ca2: 687b ldr r3, [r7, #4]
8001ca4: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001ca8: 2b01 cmp r3, #1
8001caa: d101 bne.n 8001cb0 <HAL_PCD_SetAddress+0x1a>
8001cac: 2302 movs r3, #2
8001cae: e012 b.n 8001cd6 <HAL_PCD_SetAddress+0x40>
8001cb0: 687b ldr r3, [r7, #4]
8001cb2: 2201 movs r2, #1
8001cb4: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8001cb8: 687b ldr r3, [r7, #4]
8001cba: 78fa ldrb r2, [r7, #3]
8001cbc: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8001cbe: 687b ldr r3, [r7, #4]
8001cc0: 681b ldr r3, [r3, #0]
8001cc2: 78fa ldrb r2, [r7, #3]
8001cc4: 4611 mov r1, r2
8001cc6: 4618 mov r0, r3
8001cc8: f004 ffbc bl 8006c44 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8001ccc: 687b ldr r3, [r7, #4]
8001cce: 2200 movs r2, #0
8001cd0: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8001cd4: 2300 movs r3, #0
}
8001cd6: 4618 mov r0, r3
8001cd8: 3708 adds r7, #8
8001cda: 46bd mov sp, r7
8001cdc: bd80 pop {r7, pc}
08001cde <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8001cde: b580 push {r7, lr}
8001ce0: b084 sub sp, #16
8001ce2: af00 add r7, sp, #0
8001ce4: 6078 str r0, [r7, #4]
8001ce6: 4608 mov r0, r1
8001ce8: 4611 mov r1, r2
8001cea: 461a mov r2, r3
8001cec: 4603 mov r3, r0
8001cee: 70fb strb r3, [r7, #3]
8001cf0: 460b mov r3, r1
8001cf2: 803b strh r3, [r7, #0]
8001cf4: 4613 mov r3, r2
8001cf6: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8001cf8: 2300 movs r3, #0
8001cfa: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8001cfc: f997 3003 ldrsb.w r3, [r7, #3]
8001d00: 2b00 cmp r3, #0
8001d02: da0e bge.n 8001d22 <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001d04: 78fb ldrb r3, [r7, #3]
8001d06: f003 0207 and.w r2, r3, #7
8001d0a: 4613 mov r3, r2
8001d0c: 009b lsls r3, r3, #2
8001d0e: 4413 add r3, r2
8001d10: 00db lsls r3, r3, #3
8001d12: 3310 adds r3, #16
8001d14: 687a ldr r2, [r7, #4]
8001d16: 4413 add r3, r2
8001d18: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001d1a: 68fb ldr r3, [r7, #12]
8001d1c: 2201 movs r2, #1
8001d1e: 705a strb r2, [r3, #1]
8001d20: e00e b.n 8001d40 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001d22: 78fb ldrb r3, [r7, #3]
8001d24: f003 0207 and.w r2, r3, #7
8001d28: 4613 mov r3, r2
8001d2a: 009b lsls r3, r3, #2
8001d2c: 4413 add r3, r2
8001d2e: 00db lsls r3, r3, #3
8001d30: f503 73a8 add.w r3, r3, #336 @ 0x150
8001d34: 687a ldr r2, [r7, #4]
8001d36: 4413 add r3, r2
8001d38: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001d3a: 68fb ldr r3, [r7, #12]
8001d3c: 2200 movs r2, #0
8001d3e: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8001d40: 78fb ldrb r3, [r7, #3]
8001d42: f003 0307 and.w r3, r3, #7
8001d46: b2da uxtb r2, r3
8001d48: 68fb ldr r3, [r7, #12]
8001d4a: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8001d4c: 883a ldrh r2, [r7, #0]
8001d4e: 68fb ldr r3, [r7, #12]
8001d50: 611a str r2, [r3, #16]
ep->type = ep_type;
8001d52: 68fb ldr r3, [r7, #12]
8001d54: 78ba ldrb r2, [r7, #2]
8001d56: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8001d58: 78bb ldrb r3, [r7, #2]
8001d5a: 2b02 cmp r3, #2
8001d5c: d102 bne.n 8001d64 <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8001d5e: 68fb ldr r3, [r7, #12]
8001d60: 2200 movs r2, #0
8001d62: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8001d64: 687b ldr r3, [r7, #4]
8001d66: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001d6a: 2b01 cmp r3, #1
8001d6c: d101 bne.n 8001d72 <HAL_PCD_EP_Open+0x94>
8001d6e: 2302 movs r3, #2
8001d70: e00e b.n 8001d90 <HAL_PCD_EP_Open+0xb2>
8001d72: 687b ldr r3, [r7, #4]
8001d74: 2201 movs r2, #1
8001d76: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8001d7a: 687b ldr r3, [r7, #4]
8001d7c: 681b ldr r3, [r3, #0]
8001d7e: 68f9 ldr r1, [r7, #12]
8001d80: 4618 mov r0, r3
8001d82: f002 fd05 bl 8004790 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8001d86: 687b ldr r3, [r7, #4]
8001d88: 2200 movs r2, #0
8001d8a: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
8001d8e: 7afb ldrb r3, [r7, #11]
}
8001d90: 4618 mov r0, r3
8001d92: 3710 adds r7, #16
8001d94: 46bd mov sp, r7
8001d96: bd80 pop {r7, pc}
08001d98 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001d98: b580 push {r7, lr}
8001d9a: b084 sub sp, #16
8001d9c: af00 add r7, sp, #0
8001d9e: 6078 str r0, [r7, #4]
8001da0: 460b mov r3, r1
8001da2: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8001da4: f997 3003 ldrsb.w r3, [r7, #3]
8001da8: 2b00 cmp r3, #0
8001daa: da0e bge.n 8001dca <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001dac: 78fb ldrb r3, [r7, #3]
8001dae: f003 0207 and.w r2, r3, #7
8001db2: 4613 mov r3, r2
8001db4: 009b lsls r3, r3, #2
8001db6: 4413 add r3, r2
8001db8: 00db lsls r3, r3, #3
8001dba: 3310 adds r3, #16
8001dbc: 687a ldr r2, [r7, #4]
8001dbe: 4413 add r3, r2
8001dc0: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001dc2: 68fb ldr r3, [r7, #12]
8001dc4: 2201 movs r2, #1
8001dc6: 705a strb r2, [r3, #1]
8001dc8: e00e b.n 8001de8 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001dca: 78fb ldrb r3, [r7, #3]
8001dcc: f003 0207 and.w r2, r3, #7
8001dd0: 4613 mov r3, r2
8001dd2: 009b lsls r3, r3, #2
8001dd4: 4413 add r3, r2
8001dd6: 00db lsls r3, r3, #3
8001dd8: f503 73a8 add.w r3, r3, #336 @ 0x150
8001ddc: 687a ldr r2, [r7, #4]
8001dde: 4413 add r3, r2
8001de0: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001de2: 68fb ldr r3, [r7, #12]
8001de4: 2200 movs r2, #0
8001de6: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8001de8: 78fb ldrb r3, [r7, #3]
8001dea: f003 0307 and.w r3, r3, #7
8001dee: b2da uxtb r2, r3
8001df0: 68fb ldr r3, [r7, #12]
8001df2: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8001df4: 687b ldr r3, [r7, #4]
8001df6: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001dfa: 2b01 cmp r3, #1
8001dfc: d101 bne.n 8001e02 <HAL_PCD_EP_Close+0x6a>
8001dfe: 2302 movs r3, #2
8001e00: e00e b.n 8001e20 <HAL_PCD_EP_Close+0x88>
8001e02: 687b ldr r3, [r7, #4]
8001e04: 2201 movs r2, #1
8001e06: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8001e0a: 687b ldr r3, [r7, #4]
8001e0c: 681b ldr r3, [r3, #0]
8001e0e: 68f9 ldr r1, [r7, #12]
8001e10: 4618 mov r0, r3
8001e12: f003 f87d bl 8004f10 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8001e16: 687b ldr r3, [r7, #4]
8001e18: 2200 movs r2, #0
8001e1a: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8001e1e: 2300 movs r3, #0
}
8001e20: 4618 mov r0, r3
8001e22: 3710 adds r7, #16
8001e24: 46bd mov sp, r7
8001e26: bd80 pop {r7, pc}
08001e28 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8001e28: b580 push {r7, lr}
8001e2a: b086 sub sp, #24
8001e2c: af00 add r7, sp, #0
8001e2e: 60f8 str r0, [r7, #12]
8001e30: 607a str r2, [r7, #4]
8001e32: 603b str r3, [r7, #0]
8001e34: 460b mov r3, r1
8001e36: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001e38: 7afb ldrb r3, [r7, #11]
8001e3a: f003 0207 and.w r2, r3, #7
8001e3e: 4613 mov r3, r2
8001e40: 009b lsls r3, r3, #2
8001e42: 4413 add r3, r2
8001e44: 00db lsls r3, r3, #3
8001e46: f503 73a8 add.w r3, r3, #336 @ 0x150
8001e4a: 68fa ldr r2, [r7, #12]
8001e4c: 4413 add r3, r2
8001e4e: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001e50: 697b ldr r3, [r7, #20]
8001e52: 687a ldr r2, [r7, #4]
8001e54: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001e56: 697b ldr r3, [r7, #20]
8001e58: 683a ldr r2, [r7, #0]
8001e5a: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8001e5c: 697b ldr r3, [r7, #20]
8001e5e: 2200 movs r2, #0
8001e60: 61da str r2, [r3, #28]
ep->is_in = 0U;
8001e62: 697b ldr r3, [r7, #20]
8001e64: 2200 movs r2, #0
8001e66: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8001e68: 7afb ldrb r3, [r7, #11]
8001e6a: f003 0307 and.w r3, r3, #7
8001e6e: b2da uxtb r2, r3
8001e70: 697b ldr r3, [r7, #20]
8001e72: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001e74: 68fb ldr r3, [r7, #12]
8001e76: 681b ldr r3, [r3, #0]
8001e78: 6979 ldr r1, [r7, #20]
8001e7a: 4618 mov r0, r3
8001e7c: f003 fa34 bl 80052e8 <USB_EPStartXfer>
return HAL_OK;
8001e80: 2300 movs r3, #0
}
8001e82: 4618 mov r0, r3
8001e84: 3718 adds r7, #24
8001e86: 46bd mov sp, r7
8001e88: bd80 pop {r7, pc}
08001e8a <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8001e8a: b480 push {r7}
8001e8c: b083 sub sp, #12
8001e8e: af00 add r7, sp, #0
8001e90: 6078 str r0, [r7, #4]
8001e92: 460b mov r3, r1
8001e94: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8001e96: 78fb ldrb r3, [r7, #3]
8001e98: f003 0207 and.w r2, r3, #7
8001e9c: 6879 ldr r1, [r7, #4]
8001e9e: 4613 mov r3, r2
8001ea0: 009b lsls r3, r3, #2
8001ea2: 4413 add r3, r2
8001ea4: 00db lsls r3, r3, #3
8001ea6: 440b add r3, r1
8001ea8: f503 73b6 add.w r3, r3, #364 @ 0x16c
8001eac: 681b ldr r3, [r3, #0]
}
8001eae: 4618 mov r0, r3
8001eb0: 370c adds r7, #12
8001eb2: 46bd mov sp, r7
8001eb4: bc80 pop {r7}
8001eb6: 4770 bx lr
08001eb8 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8001eb8: b580 push {r7, lr}
8001eba: b086 sub sp, #24
8001ebc: af00 add r7, sp, #0
8001ebe: 60f8 str r0, [r7, #12]
8001ec0: 607a str r2, [r7, #4]
8001ec2: 603b str r3, [r7, #0]
8001ec4: 460b mov r3, r1
8001ec6: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001ec8: 7afb ldrb r3, [r7, #11]
8001eca: f003 0207 and.w r2, r3, #7
8001ece: 4613 mov r3, r2
8001ed0: 009b lsls r3, r3, #2
8001ed2: 4413 add r3, r2
8001ed4: 00db lsls r3, r3, #3
8001ed6: 3310 adds r3, #16
8001ed8: 68fa ldr r2, [r7, #12]
8001eda: 4413 add r3, r2
8001edc: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001ede: 697b ldr r3, [r7, #20]
8001ee0: 687a ldr r2, [r7, #4]
8001ee2: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001ee4: 697b ldr r3, [r7, #20]
8001ee6: 683a ldr r2, [r7, #0]
8001ee8: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8001eea: 697b ldr r3, [r7, #20]
8001eec: 2201 movs r2, #1
8001eee: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
8001ef2: 697b ldr r3, [r7, #20]
8001ef4: 683a ldr r2, [r7, #0]
8001ef6: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8001ef8: 697b ldr r3, [r7, #20]
8001efa: 2200 movs r2, #0
8001efc: 61da str r2, [r3, #28]
ep->is_in = 1U;
8001efe: 697b ldr r3, [r7, #20]
8001f00: 2201 movs r2, #1
8001f02: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8001f04: 7afb ldrb r3, [r7, #11]
8001f06: f003 0307 and.w r3, r3, #7
8001f0a: b2da uxtb r2, r3
8001f0c: 697b ldr r3, [r7, #20]
8001f0e: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001f10: 68fb ldr r3, [r7, #12]
8001f12: 681b ldr r3, [r3, #0]
8001f14: 6979 ldr r1, [r7, #20]
8001f16: 4618 mov r0, r3
8001f18: f003 f9e6 bl 80052e8 <USB_EPStartXfer>
return HAL_OK;
8001f1c: 2300 movs r3, #0
}
8001f1e: 4618 mov r0, r3
8001f20: 3718 adds r7, #24
8001f22: 46bd mov sp, r7
8001f24: bd80 pop {r7, pc}
08001f26 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001f26: b580 push {r7, lr}
8001f28: b084 sub sp, #16
8001f2a: af00 add r7, sp, #0
8001f2c: 6078 str r0, [r7, #4]
8001f2e: 460b mov r3, r1
8001f30: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8001f32: 78fb ldrb r3, [r7, #3]
8001f34: f003 0307 and.w r3, r3, #7
8001f38: 687a ldr r2, [r7, #4]
8001f3a: 7912 ldrb r2, [r2, #4]
8001f3c: 4293 cmp r3, r2
8001f3e: d901 bls.n 8001f44 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8001f40: 2301 movs r3, #1
8001f42: e04c b.n 8001fde <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8001f44: f997 3003 ldrsb.w r3, [r7, #3]
8001f48: 2b00 cmp r3, #0
8001f4a: da0e bge.n 8001f6a <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001f4c: 78fb ldrb r3, [r7, #3]
8001f4e: f003 0207 and.w r2, r3, #7
8001f52: 4613 mov r3, r2
8001f54: 009b lsls r3, r3, #2
8001f56: 4413 add r3, r2
8001f58: 00db lsls r3, r3, #3
8001f5a: 3310 adds r3, #16
8001f5c: 687a ldr r2, [r7, #4]
8001f5e: 4413 add r3, r2
8001f60: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001f62: 68fb ldr r3, [r7, #12]
8001f64: 2201 movs r2, #1
8001f66: 705a strb r2, [r3, #1]
8001f68: e00c b.n 8001f84 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8001f6a: 78fa ldrb r2, [r7, #3]
8001f6c: 4613 mov r3, r2
8001f6e: 009b lsls r3, r3, #2
8001f70: 4413 add r3, r2
8001f72: 00db lsls r3, r3, #3
8001f74: f503 73a8 add.w r3, r3, #336 @ 0x150
8001f78: 687a ldr r2, [r7, #4]
8001f7a: 4413 add r3, r2
8001f7c: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001f7e: 68fb ldr r3, [r7, #12]
8001f80: 2200 movs r2, #0
8001f82: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8001f84: 68fb ldr r3, [r7, #12]
8001f86: 2201 movs r2, #1
8001f88: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8001f8a: 78fb ldrb r3, [r7, #3]
8001f8c: f003 0307 and.w r3, r3, #7
8001f90: b2da uxtb r2, r3
8001f92: 68fb ldr r3, [r7, #12]
8001f94: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8001f96: 687b ldr r3, [r7, #4]
8001f98: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001f9c: 2b01 cmp r3, #1
8001f9e: d101 bne.n 8001fa4 <HAL_PCD_EP_SetStall+0x7e>
8001fa0: 2302 movs r3, #2
8001fa2: e01c b.n 8001fde <HAL_PCD_EP_SetStall+0xb8>
8001fa4: 687b ldr r3, [r7, #4]
8001fa6: 2201 movs r2, #1
8001fa8: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8001fac: 687b ldr r3, [r7, #4]
8001fae: 681b ldr r3, [r3, #0]
8001fb0: 68f9 ldr r1, [r7, #12]
8001fb2: 4618 mov r0, r3
8001fb4: f004 fd49 bl 8006a4a <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8001fb8: 78fb ldrb r3, [r7, #3]
8001fba: f003 0307 and.w r3, r3, #7
8001fbe: 2b00 cmp r3, #0
8001fc0: d108 bne.n 8001fd4 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
8001fc2: 687b ldr r3, [r7, #4]
8001fc4: 681a ldr r2, [r3, #0]
8001fc6: 687b ldr r3, [r7, #4]
8001fc8: f503 7326 add.w r3, r3, #664 @ 0x298
8001fcc: 4619 mov r1, r3
8001fce: 4610 mov r0, r2
8001fd0: f004 fe6e bl 8006cb0 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8001fd4: 687b ldr r3, [r7, #4]
8001fd6: 2200 movs r2, #0
8001fd8: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8001fdc: 2300 movs r3, #0
}
8001fde: 4618 mov r0, r3
8001fe0: 3710 adds r7, #16
8001fe2: 46bd mov sp, r7
8001fe4: bd80 pop {r7, pc}
08001fe6 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001fe6: b580 push {r7, lr}
8001fe8: b084 sub sp, #16
8001fea: af00 add r7, sp, #0
8001fec: 6078 str r0, [r7, #4]
8001fee: 460b mov r3, r1
8001ff0: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8001ff2: 78fb ldrb r3, [r7, #3]
8001ff4: f003 030f and.w r3, r3, #15
8001ff8: 687a ldr r2, [r7, #4]
8001ffa: 7912 ldrb r2, [r2, #4]
8001ffc: 4293 cmp r3, r2
8001ffe: d901 bls.n 8002004 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8002000: 2301 movs r3, #1
8002002: e040 b.n 8002086 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8002004: f997 3003 ldrsb.w r3, [r7, #3]
8002008: 2b00 cmp r3, #0
800200a: da0e bge.n 800202a <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800200c: 78fb ldrb r3, [r7, #3]
800200e: f003 0207 and.w r2, r3, #7
8002012: 4613 mov r3, r2
8002014: 009b lsls r3, r3, #2
8002016: 4413 add r3, r2
8002018: 00db lsls r3, r3, #3
800201a: 3310 adds r3, #16
800201c: 687a ldr r2, [r7, #4]
800201e: 4413 add r3, r2
8002020: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8002022: 68fb ldr r3, [r7, #12]
8002024: 2201 movs r2, #1
8002026: 705a strb r2, [r3, #1]
8002028: e00e b.n 8002048 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
800202a: 78fb ldrb r3, [r7, #3]
800202c: f003 0207 and.w r2, r3, #7
8002030: 4613 mov r3, r2
8002032: 009b lsls r3, r3, #2
8002034: 4413 add r3, r2
8002036: 00db lsls r3, r3, #3
8002038: f503 73a8 add.w r3, r3, #336 @ 0x150
800203c: 687a ldr r2, [r7, #4]
800203e: 4413 add r3, r2
8002040: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8002042: 68fb ldr r3, [r7, #12]
8002044: 2200 movs r2, #0
8002046: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8002048: 68fb ldr r3, [r7, #12]
800204a: 2200 movs r2, #0
800204c: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
800204e: 78fb ldrb r3, [r7, #3]
8002050: f003 0307 and.w r3, r3, #7
8002054: b2da uxtb r2, r3
8002056: 68fb ldr r3, [r7, #12]
8002058: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
800205a: 687b ldr r3, [r7, #4]
800205c: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8002060: 2b01 cmp r3, #1
8002062: d101 bne.n 8002068 <HAL_PCD_EP_ClrStall+0x82>
8002064: 2302 movs r3, #2
8002066: e00e b.n 8002086 <HAL_PCD_EP_ClrStall+0xa0>
8002068: 687b ldr r3, [r7, #4]
800206a: 2201 movs r2, #1
800206c: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
8002070: 687b ldr r3, [r7, #4]
8002072: 681b ldr r3, [r3, #0]
8002074: 68f9 ldr r1, [r7, #12]
8002076: 4618 mov r0, r3
8002078: f004 fd37 bl 8006aea <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
800207c: 687b ldr r3, [r7, #4]
800207e: 2200 movs r2, #0
8002080: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8002084: 2300 movs r3, #0
}
8002086: 4618 mov r0, r3
8002088: 3710 adds r7, #16
800208a: 46bd mov sp, r7
800208c: bd80 pop {r7, pc}
0800208e <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
800208e: b580 push {r7, lr}
8002090: b096 sub sp, #88 @ 0x58
8002092: af00 add r7, sp, #0
8002094: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8002096: e3bb b.n 8002810 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8002098: 687b ldr r3, [r7, #4]
800209a: 681b ldr r3, [r3, #0]
800209c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80020a0: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
80020a4: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80020a8: b2db uxtb r3, r3
80020aa: f003 030f and.w r3, r3, #15
80020ae: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
80020b2: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80020b6: 2b00 cmp r3, #0
80020b8: f040 8175 bne.w 80023a6 <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
80020bc: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80020c0: f003 0310 and.w r3, r3, #16
80020c4: 2b00 cmp r3, #0
80020c6: d14e bne.n 8002166 <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80020c8: 687b ldr r3, [r7, #4]
80020ca: 681b ldr r3, [r3, #0]
80020cc: 881b ldrh r3, [r3, #0]
80020ce: b29b uxth r3, r3
80020d0: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
80020d4: f023 0370 bic.w r3, r3, #112 @ 0x70
80020d8: 81fb strh r3, [r7, #14]
80020da: 687b ldr r3, [r7, #4]
80020dc: 681a ldr r2, [r3, #0]
80020de: 89fb ldrh r3, [r7, #14]
80020e0: ea6f 4343 mvn.w r3, r3, lsl #17
80020e4: ea6f 4353 mvn.w r3, r3, lsr #17
80020e8: b29b uxth r3, r3
80020ea: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
80020ec: 687b ldr r3, [r7, #4]
80020ee: 3310 adds r3, #16
80020f0: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
80020f2: 687b ldr r3, [r7, #4]
80020f4: 681b ldr r3, [r3, #0]
80020f6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80020fa: b29b uxth r3, r3
80020fc: 461a mov r2, r3
80020fe: 6d7b ldr r3, [r7, #84] @ 0x54
8002100: 781b ldrb r3, [r3, #0]
8002102: 00db lsls r3, r3, #3
8002104: 4413 add r3, r2
8002106: 3302 adds r3, #2
8002108: 005b lsls r3, r3, #1
800210a: 687a ldr r2, [r7, #4]
800210c: 6812 ldr r2, [r2, #0]
800210e: 4413 add r3, r2
8002110: f503 6380 add.w r3, r3, #1024 @ 0x400
8002114: 881b ldrh r3, [r3, #0]
8002116: f3c3 0209 ubfx r2, r3, #0, #10
800211a: 6d7b ldr r3, [r7, #84] @ 0x54
800211c: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
800211e: 6d7b ldr r3, [r7, #84] @ 0x54
8002120: 695a ldr r2, [r3, #20]
8002122: 6d7b ldr r3, [r7, #84] @ 0x54
8002124: 69db ldr r3, [r3, #28]
8002126: 441a add r2, r3
8002128: 6d7b ldr r3, [r7, #84] @ 0x54
800212a: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
800212c: 2100 movs r1, #0
800212e: 6878 ldr r0, [r7, #4]
8002130: f006 fc8d bl 8008a4e <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
8002134: 687b ldr r3, [r7, #4]
8002136: 7b5b ldrb r3, [r3, #13]
8002138: b2db uxtb r3, r3
800213a: 2b00 cmp r3, #0
800213c: f000 8368 beq.w 8002810 <PCD_EP_ISR_Handler+0x782>
8002140: 6d7b ldr r3, [r7, #84] @ 0x54
8002142: 699b ldr r3, [r3, #24]
8002144: 2b00 cmp r3, #0
8002146: f040 8363 bne.w 8002810 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
800214a: 687b ldr r3, [r7, #4]
800214c: 7b5b ldrb r3, [r3, #13]
800214e: b2db uxtb r3, r3
8002150: f063 037f orn r3, r3, #127 @ 0x7f
8002154: b2da uxtb r2, r3
8002156: 687b ldr r3, [r7, #4]
8002158: 681b ldr r3, [r3, #0]
800215a: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
800215e: 687b ldr r3, [r7, #4]
8002160: 2200 movs r2, #0
8002162: 735a strb r2, [r3, #13]
8002164: e354 b.n 8002810 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
8002166: 687b ldr r3, [r7, #4]
8002168: f503 73a8 add.w r3, r3, #336 @ 0x150
800216c: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
800216e: 687b ldr r3, [r7, #4]
8002170: 681b ldr r3, [r3, #0]
8002172: 881b ldrh r3, [r3, #0]
8002174: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
8002178: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800217c: f403 6300 and.w r3, r3, #2048 @ 0x800
8002180: 2b00 cmp r3, #0
8002182: d034 beq.n 80021ee <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8002184: 687b ldr r3, [r7, #4]
8002186: 681b ldr r3, [r3, #0]
8002188: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800218c: b29b uxth r3, r3
800218e: 461a mov r2, r3
8002190: 6d7b ldr r3, [r7, #84] @ 0x54
8002192: 781b ldrb r3, [r3, #0]
8002194: 00db lsls r3, r3, #3
8002196: 4413 add r3, r2
8002198: 3306 adds r3, #6
800219a: 005b lsls r3, r3, #1
800219c: 687a ldr r2, [r7, #4]
800219e: 6812 ldr r2, [r2, #0]
80021a0: 4413 add r3, r2
80021a2: f503 6380 add.w r3, r3, #1024 @ 0x400
80021a6: 881b ldrh r3, [r3, #0]
80021a8: f3c3 0209 ubfx r2, r3, #0, #10
80021ac: 6d7b ldr r3, [r7, #84] @ 0x54
80021ae: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80021b0: 687b ldr r3, [r7, #4]
80021b2: 6818 ldr r0, [r3, #0]
80021b4: 687b ldr r3, [r7, #4]
80021b6: f503 7126 add.w r1, r3, #664 @ 0x298
80021ba: 6d7b ldr r3, [r7, #84] @ 0x54
80021bc: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
80021be: 6d7b ldr r3, [r7, #84] @ 0x54
80021c0: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80021c2: b29b uxth r3, r3
80021c4: f004 fdc5 bl 8006d52 <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80021c8: 687b ldr r3, [r7, #4]
80021ca: 681b ldr r3, [r3, #0]
80021cc: 881b ldrh r3, [r3, #0]
80021ce: b29a uxth r2, r3
80021d0: f640 738f movw r3, #3983 @ 0xf8f
80021d4: 4013 ands r3, r2
80021d6: 823b strh r3, [r7, #16]
80021d8: 687b ldr r3, [r7, #4]
80021da: 681b ldr r3, [r3, #0]
80021dc: 8a3a ldrh r2, [r7, #16]
80021de: f042 0280 orr.w r2, r2, #128 @ 0x80
80021e2: b292 uxth r2, r2
80021e4: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
80021e6: 6878 ldr r0, [r7, #4]
80021e8: f006 fc04 bl 80089f4 <HAL_PCD_SetupStageCallback>
80021ec: e310 b.n 8002810 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
80021ee: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
80021f2: 2b00 cmp r3, #0
80021f4: f280 830c bge.w 8002810 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80021f8: 687b ldr r3, [r7, #4]
80021fa: 681b ldr r3, [r3, #0]
80021fc: 881b ldrh r3, [r3, #0]
80021fe: b29a uxth r2, r3
8002200: f640 738f movw r3, #3983 @ 0xf8f
8002204: 4013 ands r3, r2
8002206: 83fb strh r3, [r7, #30]
8002208: 687b ldr r3, [r7, #4]
800220a: 681b ldr r3, [r3, #0]
800220c: 8bfa ldrh r2, [r7, #30]
800220e: f042 0280 orr.w r2, r2, #128 @ 0x80
8002212: b292 uxth r2, r2
8002214: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8002216: 687b ldr r3, [r7, #4]
8002218: 681b ldr r3, [r3, #0]
800221a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800221e: b29b uxth r3, r3
8002220: 461a mov r2, r3
8002222: 6d7b ldr r3, [r7, #84] @ 0x54
8002224: 781b ldrb r3, [r3, #0]
8002226: 00db lsls r3, r3, #3
8002228: 4413 add r3, r2
800222a: 3306 adds r3, #6
800222c: 005b lsls r3, r3, #1
800222e: 687a ldr r2, [r7, #4]
8002230: 6812 ldr r2, [r2, #0]
8002232: 4413 add r3, r2
8002234: f503 6380 add.w r3, r3, #1024 @ 0x400
8002238: 881b ldrh r3, [r3, #0]
800223a: f3c3 0209 ubfx r2, r3, #0, #10
800223e: 6d7b ldr r3, [r7, #84] @ 0x54
8002240: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
8002242: 6d7b ldr r3, [r7, #84] @ 0x54
8002244: 69db ldr r3, [r3, #28]
8002246: 2b00 cmp r3, #0
8002248: d019 beq.n 800227e <PCD_EP_ISR_Handler+0x1f0>
800224a: 6d7b ldr r3, [r7, #84] @ 0x54
800224c: 695b ldr r3, [r3, #20]
800224e: 2b00 cmp r3, #0
8002250: d015 beq.n 800227e <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8002252: 687b ldr r3, [r7, #4]
8002254: 6818 ldr r0, [r3, #0]
8002256: 6d7b ldr r3, [r7, #84] @ 0x54
8002258: 6959 ldr r1, [r3, #20]
800225a: 6d7b ldr r3, [r7, #84] @ 0x54
800225c: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
800225e: 6d7b ldr r3, [r7, #84] @ 0x54
8002260: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8002262: b29b uxth r3, r3
8002264: f004 fd75 bl 8006d52 <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
8002268: 6d7b ldr r3, [r7, #84] @ 0x54
800226a: 695a ldr r2, [r3, #20]
800226c: 6d7b ldr r3, [r7, #84] @ 0x54
800226e: 69db ldr r3, [r3, #28]
8002270: 441a add r2, r3
8002272: 6d7b ldr r3, [r7, #84] @ 0x54
8002274: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
8002276: 2100 movs r1, #0
8002278: 6878 ldr r0, [r7, #4]
800227a: f006 fbcd bl 8008a18 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
800227e: 687b ldr r3, [r7, #4]
8002280: 681b ldr r3, [r3, #0]
8002282: 881b ldrh r3, [r3, #0]
8002284: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8002288: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800228c: f403 6300 and.w r3, r3, #2048 @ 0x800
8002290: 2b00 cmp r3, #0
8002292: f040 82bd bne.w 8002810 <PCD_EP_ISR_Handler+0x782>
8002296: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800229a: f403 5340 and.w r3, r3, #12288 @ 0x3000
800229e: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
80022a2: f000 82b5 beq.w 8002810 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
80022a6: 687b ldr r3, [r7, #4]
80022a8: 681b ldr r3, [r3, #0]
80022aa: 61bb str r3, [r7, #24]
80022ac: 687b ldr r3, [r7, #4]
80022ae: 681b ldr r3, [r3, #0]
80022b0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80022b4: b29b uxth r3, r3
80022b6: 461a mov r2, r3
80022b8: 69bb ldr r3, [r7, #24]
80022ba: 4413 add r3, r2
80022bc: 61bb str r3, [r7, #24]
80022be: 69bb ldr r3, [r7, #24]
80022c0: f203 430c addw r3, r3, #1036 @ 0x40c
80022c4: 617b str r3, [r7, #20]
80022c6: 697b ldr r3, [r7, #20]
80022c8: 881b ldrh r3, [r3, #0]
80022ca: b29b uxth r3, r3
80022cc: f3c3 0309 ubfx r3, r3, #0, #10
80022d0: b29a uxth r2, r3
80022d2: 697b ldr r3, [r7, #20]
80022d4: 801a strh r2, [r3, #0]
80022d6: 6d7b ldr r3, [r7, #84] @ 0x54
80022d8: 691b ldr r3, [r3, #16]
80022da: 2b3e cmp r3, #62 @ 0x3e
80022dc: d91d bls.n 800231a <PCD_EP_ISR_Handler+0x28c>
80022de: 6d7b ldr r3, [r7, #84] @ 0x54
80022e0: 691b ldr r3, [r3, #16]
80022e2: 095b lsrs r3, r3, #5
80022e4: 647b str r3, [r7, #68] @ 0x44
80022e6: 6d7b ldr r3, [r7, #84] @ 0x54
80022e8: 691b ldr r3, [r3, #16]
80022ea: f003 031f and.w r3, r3, #31
80022ee: 2b00 cmp r3, #0
80022f0: d102 bne.n 80022f8 <PCD_EP_ISR_Handler+0x26a>
80022f2: 6c7b ldr r3, [r7, #68] @ 0x44
80022f4: 3b01 subs r3, #1
80022f6: 647b str r3, [r7, #68] @ 0x44
80022f8: 697b ldr r3, [r7, #20]
80022fa: 881b ldrh r3, [r3, #0]
80022fc: b29a uxth r2, r3
80022fe: 6c7b ldr r3, [r7, #68] @ 0x44
8002300: b29b uxth r3, r3
8002302: 029b lsls r3, r3, #10
8002304: b29b uxth r3, r3
8002306: 4313 orrs r3, r2
8002308: b29b uxth r3, r3
800230a: ea6f 4343 mvn.w r3, r3, lsl #17
800230e: ea6f 4353 mvn.w r3, r3, lsr #17
8002312: b29a uxth r2, r3
8002314: 697b ldr r3, [r7, #20]
8002316: 801a strh r2, [r3, #0]
8002318: e026 b.n 8002368 <PCD_EP_ISR_Handler+0x2da>
800231a: 6d7b ldr r3, [r7, #84] @ 0x54
800231c: 691b ldr r3, [r3, #16]
800231e: 2b00 cmp r3, #0
8002320: d10a bne.n 8002338 <PCD_EP_ISR_Handler+0x2aa>
8002322: 697b ldr r3, [r7, #20]
8002324: 881b ldrh r3, [r3, #0]
8002326: b29b uxth r3, r3
8002328: ea6f 4343 mvn.w r3, r3, lsl #17
800232c: ea6f 4353 mvn.w r3, r3, lsr #17
8002330: b29a uxth r2, r3
8002332: 697b ldr r3, [r7, #20]
8002334: 801a strh r2, [r3, #0]
8002336: e017 b.n 8002368 <PCD_EP_ISR_Handler+0x2da>
8002338: 6d7b ldr r3, [r7, #84] @ 0x54
800233a: 691b ldr r3, [r3, #16]
800233c: 085b lsrs r3, r3, #1
800233e: 647b str r3, [r7, #68] @ 0x44
8002340: 6d7b ldr r3, [r7, #84] @ 0x54
8002342: 691b ldr r3, [r3, #16]
8002344: f003 0301 and.w r3, r3, #1
8002348: 2b00 cmp r3, #0
800234a: d002 beq.n 8002352 <PCD_EP_ISR_Handler+0x2c4>
800234c: 6c7b ldr r3, [r7, #68] @ 0x44
800234e: 3301 adds r3, #1
8002350: 647b str r3, [r7, #68] @ 0x44
8002352: 697b ldr r3, [r7, #20]
8002354: 881b ldrh r3, [r3, #0]
8002356: b29a uxth r2, r3
8002358: 6c7b ldr r3, [r7, #68] @ 0x44
800235a: b29b uxth r3, r3
800235c: 029b lsls r3, r3, #10
800235e: b29b uxth r3, r3
8002360: 4313 orrs r3, r2
8002362: b29a uxth r2, r3
8002364: 697b ldr r3, [r7, #20]
8002366: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8002368: 687b ldr r3, [r7, #4]
800236a: 681b ldr r3, [r3, #0]
800236c: 881b ldrh r3, [r3, #0]
800236e: b29b uxth r3, r3
8002370: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8002374: f023 0370 bic.w r3, r3, #112 @ 0x70
8002378: 827b strh r3, [r7, #18]
800237a: 8a7b ldrh r3, [r7, #18]
800237c: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8002380: 827b strh r3, [r7, #18]
8002382: 8a7b ldrh r3, [r7, #18]
8002384: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8002388: 827b strh r3, [r7, #18]
800238a: 687b ldr r3, [r7, #4]
800238c: 681a ldr r2, [r3, #0]
800238e: 8a7b ldrh r3, [r7, #18]
8002390: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002394: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002398: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800239c: f043 0380 orr.w r3, r3, #128 @ 0x80
80023a0: b29b uxth r3, r3
80023a2: 8013 strh r3, [r2, #0]
80023a4: e234 b.n 8002810 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
80023a6: 687b ldr r3, [r7, #4]
80023a8: 681b ldr r3, [r3, #0]
80023aa: 461a mov r2, r3
80023ac: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80023b0: 009b lsls r3, r3, #2
80023b2: 4413 add r3, r2
80023b4: 881b ldrh r3, [r3, #0]
80023b6: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
80023ba: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
80023be: 2b00 cmp r3, #0
80023c0: f280 80fc bge.w 80025bc <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
80023c4: 687b ldr r3, [r7, #4]
80023c6: 681b ldr r3, [r3, #0]
80023c8: 461a mov r2, r3
80023ca: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80023ce: 009b lsls r3, r3, #2
80023d0: 4413 add r3, r2
80023d2: 881b ldrh r3, [r3, #0]
80023d4: b29a uxth r2, r3
80023d6: f640 738f movw r3, #3983 @ 0xf8f
80023da: 4013 ands r3, r2
80023dc: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80023e0: 687b ldr r3, [r7, #4]
80023e2: 681b ldr r3, [r3, #0]
80023e4: 461a mov r2, r3
80023e6: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80023ea: 009b lsls r3, r3, #2
80023ec: 4413 add r3, r2
80023ee: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
80023f2: f042 0280 orr.w r2, r2, #128 @ 0x80
80023f6: b292 uxth r2, r2
80023f8: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
80023fa: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80023fe: 4613 mov r3, r2
8002400: 009b lsls r3, r3, #2
8002402: 4413 add r3, r2
8002404: 00db lsls r3, r3, #3
8002406: f503 73a8 add.w r3, r3, #336 @ 0x150
800240a: 687a ldr r2, [r7, #4]
800240c: 4413 add r3, r2
800240e: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8002410: 6d7b ldr r3, [r7, #84] @ 0x54
8002412: 7b1b ldrb r3, [r3, #12]
8002414: 2b00 cmp r3, #0
8002416: d125 bne.n 8002464 <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8002418: 687b ldr r3, [r7, #4]
800241a: 681b ldr r3, [r3, #0]
800241c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002420: b29b uxth r3, r3
8002422: 461a mov r2, r3
8002424: 6d7b ldr r3, [r7, #84] @ 0x54
8002426: 781b ldrb r3, [r3, #0]
8002428: 00db lsls r3, r3, #3
800242a: 4413 add r3, r2
800242c: 3306 adds r3, #6
800242e: 005b lsls r3, r3, #1
8002430: 687a ldr r2, [r7, #4]
8002432: 6812 ldr r2, [r2, #0]
8002434: 4413 add r3, r2
8002436: f503 6380 add.w r3, r3, #1024 @ 0x400
800243a: 881b ldrh r3, [r3, #0]
800243c: f3c3 0309 ubfx r3, r3, #0, #10
8002440: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8002444: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8002448: 2b00 cmp r3, #0
800244a: f000 8092 beq.w 8002572 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
800244e: 687b ldr r3, [r7, #4]
8002450: 6818 ldr r0, [r3, #0]
8002452: 6d7b ldr r3, [r7, #84] @ 0x54
8002454: 6959 ldr r1, [r3, #20]
8002456: 6d7b ldr r3, [r7, #84] @ 0x54
8002458: 88da ldrh r2, [r3, #6]
800245a: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800245e: f004 fc78 bl 8006d52 <USB_ReadPMA>
8002462: e086 b.n 8002572 <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
8002464: 6d7b ldr r3, [r7, #84] @ 0x54
8002466: 78db ldrb r3, [r3, #3]
8002468: 2b02 cmp r3, #2
800246a: d10a bne.n 8002482 <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
800246c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8002470: 461a mov r2, r3
8002472: 6d79 ldr r1, [r7, #84] @ 0x54
8002474: 6878 ldr r0, [r7, #4]
8002476: f000 f9d9 bl 800282c <HAL_PCD_EP_DB_Receive>
800247a: 4603 mov r3, r0
800247c: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
8002480: e077 b.n 8002572 <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8002482: 687b ldr r3, [r7, #4]
8002484: 681b ldr r3, [r3, #0]
8002486: 461a mov r2, r3
8002488: 6d7b ldr r3, [r7, #84] @ 0x54
800248a: 781b ldrb r3, [r3, #0]
800248c: 009b lsls r3, r3, #2
800248e: 4413 add r3, r2
8002490: 881b ldrh r3, [r3, #0]
8002492: b29b uxth r3, r3
8002494: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002498: f023 0370 bic.w r3, r3, #112 @ 0x70
800249c: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
80024a0: 687b ldr r3, [r7, #4]
80024a2: 681b ldr r3, [r3, #0]
80024a4: 461a mov r2, r3
80024a6: 6d7b ldr r3, [r7, #84] @ 0x54
80024a8: 781b ldrb r3, [r3, #0]
80024aa: 009b lsls r3, r3, #2
80024ac: 441a add r2, r3
80024ae: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
80024b2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80024b6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80024ba: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80024be: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80024c2: b29b uxth r3, r3
80024c4: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
80024c6: 687b ldr r3, [r7, #4]
80024c8: 681b ldr r3, [r3, #0]
80024ca: 461a mov r2, r3
80024cc: 6d7b ldr r3, [r7, #84] @ 0x54
80024ce: 781b ldrb r3, [r3, #0]
80024d0: 009b lsls r3, r3, #2
80024d2: 4413 add r3, r2
80024d4: 881b ldrh r3, [r3, #0]
80024d6: b29b uxth r3, r3
80024d8: f403 4380 and.w r3, r3, #16384 @ 0x4000
80024dc: 2b00 cmp r3, #0
80024de: d024 beq.n 800252a <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80024e0: 687b ldr r3, [r7, #4]
80024e2: 681b ldr r3, [r3, #0]
80024e4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80024e8: b29b uxth r3, r3
80024ea: 461a mov r2, r3
80024ec: 6d7b ldr r3, [r7, #84] @ 0x54
80024ee: 781b ldrb r3, [r3, #0]
80024f0: 00db lsls r3, r3, #3
80024f2: 4413 add r3, r2
80024f4: 3302 adds r3, #2
80024f6: 005b lsls r3, r3, #1
80024f8: 687a ldr r2, [r7, #4]
80024fa: 6812 ldr r2, [r2, #0]
80024fc: 4413 add r3, r2
80024fe: f503 6380 add.w r3, r3, #1024 @ 0x400
8002502: 881b ldrh r3, [r3, #0]
8002504: f3c3 0309 ubfx r3, r3, #0, #10
8002508: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800250c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8002510: 2b00 cmp r3, #0
8002512: d02e beq.n 8002572 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8002514: 687b ldr r3, [r7, #4]
8002516: 6818 ldr r0, [r3, #0]
8002518: 6d7b ldr r3, [r7, #84] @ 0x54
800251a: 6959 ldr r1, [r3, #20]
800251c: 6d7b ldr r3, [r7, #84] @ 0x54
800251e: 891a ldrh r2, [r3, #8]
8002520: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8002524: f004 fc15 bl 8006d52 <USB_ReadPMA>
8002528: e023 b.n 8002572 <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800252a: 687b ldr r3, [r7, #4]
800252c: 681b ldr r3, [r3, #0]
800252e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002532: b29b uxth r3, r3
8002534: 461a mov r2, r3
8002536: 6d7b ldr r3, [r7, #84] @ 0x54
8002538: 781b ldrb r3, [r3, #0]
800253a: 00db lsls r3, r3, #3
800253c: 4413 add r3, r2
800253e: 3306 adds r3, #6
8002540: 005b lsls r3, r3, #1
8002542: 687a ldr r2, [r7, #4]
8002544: 6812 ldr r2, [r2, #0]
8002546: 4413 add r3, r2
8002548: f503 6380 add.w r3, r3, #1024 @ 0x400
800254c: 881b ldrh r3, [r3, #0]
800254e: f3c3 0309 ubfx r3, r3, #0, #10
8002552: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8002556: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800255a: 2b00 cmp r3, #0
800255c: d009 beq.n 8002572 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
800255e: 687b ldr r3, [r7, #4]
8002560: 6818 ldr r0, [r3, #0]
8002562: 6d7b ldr r3, [r7, #84] @ 0x54
8002564: 6959 ldr r1, [r3, #20]
8002566: 6d7b ldr r3, [r7, #84] @ 0x54
8002568: 895a ldrh r2, [r3, #10]
800256a: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800256e: f004 fbf0 bl 8006d52 <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
8002572: 6d7b ldr r3, [r7, #84] @ 0x54
8002574: 69da ldr r2, [r3, #28]
8002576: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800257a: 441a add r2, r3
800257c: 6d7b ldr r3, [r7, #84] @ 0x54
800257e: 61da str r2, [r3, #28]
ep->xfer_buff += count;
8002580: 6d7b ldr r3, [r7, #84] @ 0x54
8002582: 695a ldr r2, [r3, #20]
8002584: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8002588: 441a add r2, r3
800258a: 6d7b ldr r3, [r7, #84] @ 0x54
800258c: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
800258e: 6d7b ldr r3, [r7, #84] @ 0x54
8002590: 699b ldr r3, [r3, #24]
8002592: 2b00 cmp r3, #0
8002594: d005 beq.n 80025a2 <PCD_EP_ISR_Handler+0x514>
8002596: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
800259a: 6d7b ldr r3, [r7, #84] @ 0x54
800259c: 691b ldr r3, [r3, #16]
800259e: 429a cmp r2, r3
80025a0: d206 bcs.n 80025b0 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
80025a2: 6d7b ldr r3, [r7, #84] @ 0x54
80025a4: 781b ldrb r3, [r3, #0]
80025a6: 4619 mov r1, r3
80025a8: 6878 ldr r0, [r7, #4]
80025aa: f006 fa35 bl 8008a18 <HAL_PCD_DataOutStageCallback>
80025ae: e005 b.n 80025bc <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
80025b0: 687b ldr r3, [r7, #4]
80025b2: 681b ldr r3, [r3, #0]
80025b4: 6d79 ldr r1, [r7, #84] @ 0x54
80025b6: 4618 mov r0, r3
80025b8: f002 fe96 bl 80052e8 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
80025bc: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80025c0: f003 0380 and.w r3, r3, #128 @ 0x80
80025c4: 2b00 cmp r3, #0
80025c6: f000 8123 beq.w 8002810 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
80025ca: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80025ce: 4613 mov r3, r2
80025d0: 009b lsls r3, r3, #2
80025d2: 4413 add r3, r2
80025d4: 00db lsls r3, r3, #3
80025d6: 3310 adds r3, #16
80025d8: 687a ldr r2, [r7, #4]
80025da: 4413 add r3, r2
80025dc: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
80025de: 687b ldr r3, [r7, #4]
80025e0: 681b ldr r3, [r3, #0]
80025e2: 461a mov r2, r3
80025e4: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80025e8: 009b lsls r3, r3, #2
80025ea: 4413 add r3, r2
80025ec: 881b ldrh r3, [r3, #0]
80025ee: b29b uxth r3, r3
80025f0: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
80025f4: f023 0370 bic.w r3, r3, #112 @ 0x70
80025f8: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80025fc: 687b ldr r3, [r7, #4]
80025fe: 681b ldr r3, [r3, #0]
8002600: 461a mov r2, r3
8002602: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8002606: 009b lsls r3, r3, #2
8002608: 441a add r2, r3
800260a: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
800260e: ea6f 4343 mvn.w r3, r3, lsl #17
8002612: ea6f 4353 mvn.w r3, r3, lsr #17
8002616: b29b uxth r3, r3
8002618: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
800261a: 6d7b ldr r3, [r7, #84] @ 0x54
800261c: 78db ldrb r3, [r3, #3]
800261e: 2b01 cmp r3, #1
8002620: f040 80a2 bne.w 8002768 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
8002624: 6d7b ldr r3, [r7, #84] @ 0x54
8002626: 2200 movs r2, #0
8002628: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
800262a: 6d7b ldr r3, [r7, #84] @ 0x54
800262c: 7b1b ldrb r3, [r3, #12]
800262e: 2b00 cmp r3, #0
8002630: f000 8093 beq.w 800275a <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002634: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8002638: f003 0340 and.w r3, r3, #64 @ 0x40
800263c: 2b00 cmp r3, #0
800263e: d046 beq.n 80026ce <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002640: 6d7b ldr r3, [r7, #84] @ 0x54
8002642: 785b ldrb r3, [r3, #1]
8002644: 2b00 cmp r3, #0
8002646: d126 bne.n 8002696 <PCD_EP_ISR_Handler+0x608>
8002648: 687b ldr r3, [r7, #4]
800264a: 681b ldr r3, [r3, #0]
800264c: 627b str r3, [r7, #36] @ 0x24
800264e: 687b ldr r3, [r7, #4]
8002650: 681b ldr r3, [r3, #0]
8002652: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002656: b29b uxth r3, r3
8002658: 461a mov r2, r3
800265a: 6a7b ldr r3, [r7, #36] @ 0x24
800265c: 4413 add r3, r2
800265e: 627b str r3, [r7, #36] @ 0x24
8002660: 6d7b ldr r3, [r7, #84] @ 0x54
8002662: 781b ldrb r3, [r3, #0]
8002664: 011a lsls r2, r3, #4
8002666: 6a7b ldr r3, [r7, #36] @ 0x24
8002668: 4413 add r3, r2
800266a: f203 4304 addw r3, r3, #1028 @ 0x404
800266e: 623b str r3, [r7, #32]
8002670: 6a3b ldr r3, [r7, #32]
8002672: 881b ldrh r3, [r3, #0]
8002674: b29b uxth r3, r3
8002676: f3c3 0309 ubfx r3, r3, #0, #10
800267a: b29a uxth r2, r3
800267c: 6a3b ldr r3, [r7, #32]
800267e: 801a strh r2, [r3, #0]
8002680: 6a3b ldr r3, [r7, #32]
8002682: 881b ldrh r3, [r3, #0]
8002684: b29b uxth r3, r3
8002686: ea6f 4343 mvn.w r3, r3, lsl #17
800268a: ea6f 4353 mvn.w r3, r3, lsr #17
800268e: b29a uxth r2, r3
8002690: 6a3b ldr r3, [r7, #32]
8002692: 801a strh r2, [r3, #0]
8002694: e061 b.n 800275a <PCD_EP_ISR_Handler+0x6cc>
8002696: 6d7b ldr r3, [r7, #84] @ 0x54
8002698: 785b ldrb r3, [r3, #1]
800269a: 2b01 cmp r3, #1
800269c: d15d bne.n 800275a <PCD_EP_ISR_Handler+0x6cc>
800269e: 687b ldr r3, [r7, #4]
80026a0: 681b ldr r3, [r3, #0]
80026a2: 62fb str r3, [r7, #44] @ 0x2c
80026a4: 687b ldr r3, [r7, #4]
80026a6: 681b ldr r3, [r3, #0]
80026a8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80026ac: b29b uxth r3, r3
80026ae: 461a mov r2, r3
80026b0: 6afb ldr r3, [r7, #44] @ 0x2c
80026b2: 4413 add r3, r2
80026b4: 62fb str r3, [r7, #44] @ 0x2c
80026b6: 6d7b ldr r3, [r7, #84] @ 0x54
80026b8: 781b ldrb r3, [r3, #0]
80026ba: 011a lsls r2, r3, #4
80026bc: 6afb ldr r3, [r7, #44] @ 0x2c
80026be: 4413 add r3, r2
80026c0: f203 4304 addw r3, r3, #1028 @ 0x404
80026c4: 62bb str r3, [r7, #40] @ 0x28
80026c6: 6abb ldr r3, [r7, #40] @ 0x28
80026c8: 2200 movs r2, #0
80026ca: 801a strh r2, [r3, #0]
80026cc: e045 b.n 800275a <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80026ce: 687b ldr r3, [r7, #4]
80026d0: 681b ldr r3, [r3, #0]
80026d2: 63fb str r3, [r7, #60] @ 0x3c
80026d4: 6d7b ldr r3, [r7, #84] @ 0x54
80026d6: 785b ldrb r3, [r3, #1]
80026d8: 2b00 cmp r3, #0
80026da: d126 bne.n 800272a <PCD_EP_ISR_Handler+0x69c>
80026dc: 687b ldr r3, [r7, #4]
80026de: 681b ldr r3, [r3, #0]
80026e0: 637b str r3, [r7, #52] @ 0x34
80026e2: 687b ldr r3, [r7, #4]
80026e4: 681b ldr r3, [r3, #0]
80026e6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80026ea: b29b uxth r3, r3
80026ec: 461a mov r2, r3
80026ee: 6b7b ldr r3, [r7, #52] @ 0x34
80026f0: 4413 add r3, r2
80026f2: 637b str r3, [r7, #52] @ 0x34
80026f4: 6d7b ldr r3, [r7, #84] @ 0x54
80026f6: 781b ldrb r3, [r3, #0]
80026f8: 011a lsls r2, r3, #4
80026fa: 6b7b ldr r3, [r7, #52] @ 0x34
80026fc: 4413 add r3, r2
80026fe: f203 430c addw r3, r3, #1036 @ 0x40c
8002702: 633b str r3, [r7, #48] @ 0x30
8002704: 6b3b ldr r3, [r7, #48] @ 0x30
8002706: 881b ldrh r3, [r3, #0]
8002708: b29b uxth r3, r3
800270a: f3c3 0309 ubfx r3, r3, #0, #10
800270e: b29a uxth r2, r3
8002710: 6b3b ldr r3, [r7, #48] @ 0x30
8002712: 801a strh r2, [r3, #0]
8002714: 6b3b ldr r3, [r7, #48] @ 0x30
8002716: 881b ldrh r3, [r3, #0]
8002718: b29b uxth r3, r3
800271a: ea6f 4343 mvn.w r3, r3, lsl #17
800271e: ea6f 4353 mvn.w r3, r3, lsr #17
8002722: b29a uxth r2, r3
8002724: 6b3b ldr r3, [r7, #48] @ 0x30
8002726: 801a strh r2, [r3, #0]
8002728: e017 b.n 800275a <PCD_EP_ISR_Handler+0x6cc>
800272a: 6d7b ldr r3, [r7, #84] @ 0x54
800272c: 785b ldrb r3, [r3, #1]
800272e: 2b01 cmp r3, #1
8002730: d113 bne.n 800275a <PCD_EP_ISR_Handler+0x6cc>
8002732: 687b ldr r3, [r7, #4]
8002734: 681b ldr r3, [r3, #0]
8002736: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800273a: b29b uxth r3, r3
800273c: 461a mov r2, r3
800273e: 6bfb ldr r3, [r7, #60] @ 0x3c
8002740: 4413 add r3, r2
8002742: 63fb str r3, [r7, #60] @ 0x3c
8002744: 6d7b ldr r3, [r7, #84] @ 0x54
8002746: 781b ldrb r3, [r3, #0]
8002748: 011a lsls r2, r3, #4
800274a: 6bfb ldr r3, [r7, #60] @ 0x3c
800274c: 4413 add r3, r2
800274e: f203 430c addw r3, r3, #1036 @ 0x40c
8002752: 63bb str r3, [r7, #56] @ 0x38
8002754: 6bbb ldr r3, [r7, #56] @ 0x38
8002756: 2200 movs r2, #0
8002758: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
800275a: 6d7b ldr r3, [r7, #84] @ 0x54
800275c: 781b ldrb r3, [r3, #0]
800275e: 4619 mov r1, r3
8002760: 6878 ldr r0, [r7, #4]
8002762: f006 f974 bl 8008a4e <HAL_PCD_DataInStageCallback>
8002766: e053 b.n 8002810 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
8002768: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800276c: f403 7380 and.w r3, r3, #256 @ 0x100
8002770: 2b00 cmp r3, #0
8002772: d146 bne.n 8002802 <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8002774: 687b ldr r3, [r7, #4]
8002776: 681b ldr r3, [r3, #0]
8002778: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800277c: b29b uxth r3, r3
800277e: 461a mov r2, r3
8002780: 6d7b ldr r3, [r7, #84] @ 0x54
8002782: 781b ldrb r3, [r3, #0]
8002784: 00db lsls r3, r3, #3
8002786: 4413 add r3, r2
8002788: 3302 adds r3, #2
800278a: 005b lsls r3, r3, #1
800278c: 687a ldr r2, [r7, #4]
800278e: 6812 ldr r2, [r2, #0]
8002790: 4413 add r3, r2
8002792: f503 6380 add.w r3, r3, #1024 @ 0x400
8002796: 881b ldrh r3, [r3, #0]
8002798: f3c3 0309 ubfx r3, r3, #0, #10
800279c: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
80027a0: 6d7b ldr r3, [r7, #84] @ 0x54
80027a2: 699a ldr r2, [r3, #24]
80027a4: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80027a8: 429a cmp r2, r3
80027aa: d907 bls.n 80027bc <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
80027ac: 6d7b ldr r3, [r7, #84] @ 0x54
80027ae: 699a ldr r2, [r3, #24]
80027b0: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80027b4: 1ad2 subs r2, r2, r3
80027b6: 6d7b ldr r3, [r7, #84] @ 0x54
80027b8: 619a str r2, [r3, #24]
80027ba: e002 b.n 80027c2 <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
80027bc: 6d7b ldr r3, [r7, #84] @ 0x54
80027be: 2200 movs r2, #0
80027c0: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
80027c2: 6d7b ldr r3, [r7, #84] @ 0x54
80027c4: 699b ldr r3, [r3, #24]
80027c6: 2b00 cmp r3, #0
80027c8: d106 bne.n 80027d8 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80027ca: 6d7b ldr r3, [r7, #84] @ 0x54
80027cc: 781b ldrb r3, [r3, #0]
80027ce: 4619 mov r1, r3
80027d0: 6878 ldr r0, [r7, #4]
80027d2: f006 f93c bl 8008a4e <HAL_PCD_DataInStageCallback>
80027d6: e01b b.n 8002810 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
80027d8: 6d7b ldr r3, [r7, #84] @ 0x54
80027da: 695a ldr r2, [r3, #20]
80027dc: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80027e0: 441a add r2, r3
80027e2: 6d7b ldr r3, [r7, #84] @ 0x54
80027e4: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
80027e6: 6d7b ldr r3, [r7, #84] @ 0x54
80027e8: 69da ldr r2, [r3, #28]
80027ea: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80027ee: 441a add r2, r3
80027f0: 6d7b ldr r3, [r7, #84] @ 0x54
80027f2: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
80027f4: 687b ldr r3, [r7, #4]
80027f6: 681b ldr r3, [r3, #0]
80027f8: 6d79 ldr r1, [r7, #84] @ 0x54
80027fa: 4618 mov r0, r3
80027fc: f002 fd74 bl 80052e8 <USB_EPStartXfer>
8002800: e006 b.n 8002810 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8002802: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8002806: 461a mov r2, r3
8002808: 6d79 ldr r1, [r7, #84] @ 0x54
800280a: 6878 ldr r0, [r7, #4]
800280c: f000 f91b bl 8002a46 <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8002810: 687b ldr r3, [r7, #4]
8002812: 681b ldr r3, [r3, #0]
8002814: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002818: b29b uxth r3, r3
800281a: b21b sxth r3, r3
800281c: 2b00 cmp r3, #0
800281e: f6ff ac3b blt.w 8002098 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8002822: 2300 movs r3, #0
}
8002824: 4618 mov r0, r3
8002826: 3758 adds r7, #88 @ 0x58
8002828: 46bd mov sp, r7
800282a: bd80 pop {r7, pc}
0800282c <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
800282c: b580 push {r7, lr}
800282e: b088 sub sp, #32
8002830: af00 add r7, sp, #0
8002832: 60f8 str r0, [r7, #12]
8002834: 60b9 str r1, [r7, #8]
8002836: 4613 mov r3, r2
8002838: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
800283a: 88fb ldrh r3, [r7, #6]
800283c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002840: 2b00 cmp r3, #0
8002842: d07e beq.n 8002942 <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8002844: 68fb ldr r3, [r7, #12]
8002846: 681b ldr r3, [r3, #0]
8002848: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800284c: b29b uxth r3, r3
800284e: 461a mov r2, r3
8002850: 68bb ldr r3, [r7, #8]
8002852: 781b ldrb r3, [r3, #0]
8002854: 00db lsls r3, r3, #3
8002856: 4413 add r3, r2
8002858: 3302 adds r3, #2
800285a: 005b lsls r3, r3, #1
800285c: 68fa ldr r2, [r7, #12]
800285e: 6812 ldr r2, [r2, #0]
8002860: 4413 add r3, r2
8002862: f503 6380 add.w r3, r3, #1024 @ 0x400
8002866: 881b ldrh r3, [r3, #0]
8002868: f3c3 0309 ubfx r3, r3, #0, #10
800286c: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
800286e: 68bb ldr r3, [r7, #8]
8002870: 699a ldr r2, [r3, #24]
8002872: 8b7b ldrh r3, [r7, #26]
8002874: 429a cmp r2, r3
8002876: d306 bcc.n 8002886 <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8002878: 68bb ldr r3, [r7, #8]
800287a: 699a ldr r2, [r3, #24]
800287c: 8b7b ldrh r3, [r7, #26]
800287e: 1ad2 subs r2, r2, r3
8002880: 68bb ldr r3, [r7, #8]
8002882: 619a str r2, [r3, #24]
8002884: e002 b.n 800288c <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
8002886: 68bb ldr r3, [r7, #8]
8002888: 2200 movs r2, #0
800288a: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
800288c: 68bb ldr r3, [r7, #8]
800288e: 699b ldr r3, [r3, #24]
8002890: 2b00 cmp r3, #0
8002892: d123 bne.n 80028dc <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8002894: 68fb ldr r3, [r7, #12]
8002896: 681b ldr r3, [r3, #0]
8002898: 461a mov r2, r3
800289a: 68bb ldr r3, [r7, #8]
800289c: 781b ldrb r3, [r3, #0]
800289e: 009b lsls r3, r3, #2
80028a0: 4413 add r3, r2
80028a2: 881b ldrh r3, [r3, #0]
80028a4: b29b uxth r3, r3
80028a6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80028aa: f023 0370 bic.w r3, r3, #112 @ 0x70
80028ae: 833b strh r3, [r7, #24]
80028b0: 8b3b ldrh r3, [r7, #24]
80028b2: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80028b6: 833b strh r3, [r7, #24]
80028b8: 68fb ldr r3, [r7, #12]
80028ba: 681b ldr r3, [r3, #0]
80028bc: 461a mov r2, r3
80028be: 68bb ldr r3, [r7, #8]
80028c0: 781b ldrb r3, [r3, #0]
80028c2: 009b lsls r3, r3, #2
80028c4: 441a add r2, r3
80028c6: 8b3b ldrh r3, [r7, #24]
80028c8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80028cc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80028d0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80028d4: f043 0380 orr.w r3, r3, #128 @ 0x80
80028d8: b29b uxth r3, r3
80028da: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80028dc: 88fb ldrh r3, [r7, #6]
80028de: f003 0340 and.w r3, r3, #64 @ 0x40
80028e2: 2b00 cmp r3, #0
80028e4: d01f beq.n 8002926 <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
80028e6: 68fb ldr r3, [r7, #12]
80028e8: 681b ldr r3, [r3, #0]
80028ea: 461a mov r2, r3
80028ec: 68bb ldr r3, [r7, #8]
80028ee: 781b ldrb r3, [r3, #0]
80028f0: 009b lsls r3, r3, #2
80028f2: 4413 add r3, r2
80028f4: 881b ldrh r3, [r3, #0]
80028f6: b29b uxth r3, r3
80028f8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80028fc: f023 0370 bic.w r3, r3, #112 @ 0x70
8002900: 82fb strh r3, [r7, #22]
8002902: 68fb ldr r3, [r7, #12]
8002904: 681b ldr r3, [r3, #0]
8002906: 461a mov r2, r3
8002908: 68bb ldr r3, [r7, #8]
800290a: 781b ldrb r3, [r3, #0]
800290c: 009b lsls r3, r3, #2
800290e: 441a add r2, r3
8002910: 8afb ldrh r3, [r7, #22]
8002912: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002916: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800291a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800291e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8002922: b29b uxth r3, r3
8002924: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8002926: 8b7b ldrh r3, [r7, #26]
8002928: 2b00 cmp r3, #0
800292a: f000 8087 beq.w 8002a3c <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
800292e: 68fb ldr r3, [r7, #12]
8002930: 6818 ldr r0, [r3, #0]
8002932: 68bb ldr r3, [r7, #8]
8002934: 6959 ldr r1, [r3, #20]
8002936: 68bb ldr r3, [r7, #8]
8002938: 891a ldrh r2, [r3, #8]
800293a: 8b7b ldrh r3, [r7, #26]
800293c: f004 fa09 bl 8006d52 <USB_ReadPMA>
8002940: e07c b.n 8002a3c <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8002942: 68fb ldr r3, [r7, #12]
8002944: 681b ldr r3, [r3, #0]
8002946: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800294a: b29b uxth r3, r3
800294c: 461a mov r2, r3
800294e: 68bb ldr r3, [r7, #8]
8002950: 781b ldrb r3, [r3, #0]
8002952: 00db lsls r3, r3, #3
8002954: 4413 add r3, r2
8002956: 3306 adds r3, #6
8002958: 005b lsls r3, r3, #1
800295a: 68fa ldr r2, [r7, #12]
800295c: 6812 ldr r2, [r2, #0]
800295e: 4413 add r3, r2
8002960: f503 6380 add.w r3, r3, #1024 @ 0x400
8002964: 881b ldrh r3, [r3, #0]
8002966: f3c3 0309 ubfx r3, r3, #0, #10
800296a: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
800296c: 68bb ldr r3, [r7, #8]
800296e: 699a ldr r2, [r3, #24]
8002970: 8b7b ldrh r3, [r7, #26]
8002972: 429a cmp r2, r3
8002974: d306 bcc.n 8002984 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
8002976: 68bb ldr r3, [r7, #8]
8002978: 699a ldr r2, [r3, #24]
800297a: 8b7b ldrh r3, [r7, #26]
800297c: 1ad2 subs r2, r2, r3
800297e: 68bb ldr r3, [r7, #8]
8002980: 619a str r2, [r3, #24]
8002982: e002 b.n 800298a <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
8002984: 68bb ldr r3, [r7, #8]
8002986: 2200 movs r2, #0
8002988: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
800298a: 68bb ldr r3, [r7, #8]
800298c: 699b ldr r3, [r3, #24]
800298e: 2b00 cmp r3, #0
8002990: d123 bne.n 80029da <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8002992: 68fb ldr r3, [r7, #12]
8002994: 681b ldr r3, [r3, #0]
8002996: 461a mov r2, r3
8002998: 68bb ldr r3, [r7, #8]
800299a: 781b ldrb r3, [r3, #0]
800299c: 009b lsls r3, r3, #2
800299e: 4413 add r3, r2
80029a0: 881b ldrh r3, [r3, #0]
80029a2: b29b uxth r3, r3
80029a4: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80029a8: f023 0370 bic.w r3, r3, #112 @ 0x70
80029ac: 83fb strh r3, [r7, #30]
80029ae: 8bfb ldrh r3, [r7, #30]
80029b0: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80029b4: 83fb strh r3, [r7, #30]
80029b6: 68fb ldr r3, [r7, #12]
80029b8: 681b ldr r3, [r3, #0]
80029ba: 461a mov r2, r3
80029bc: 68bb ldr r3, [r7, #8]
80029be: 781b ldrb r3, [r3, #0]
80029c0: 009b lsls r3, r3, #2
80029c2: 441a add r2, r3
80029c4: 8bfb ldrh r3, [r7, #30]
80029c6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80029ca: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80029ce: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80029d2: f043 0380 orr.w r3, r3, #128 @ 0x80
80029d6: b29b uxth r3, r3
80029d8: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
80029da: 88fb ldrh r3, [r7, #6]
80029dc: f003 0340 and.w r3, r3, #64 @ 0x40
80029e0: 2b00 cmp r3, #0
80029e2: d11f bne.n 8002a24 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
80029e4: 68fb ldr r3, [r7, #12]
80029e6: 681b ldr r3, [r3, #0]
80029e8: 461a mov r2, r3
80029ea: 68bb ldr r3, [r7, #8]
80029ec: 781b ldrb r3, [r3, #0]
80029ee: 009b lsls r3, r3, #2
80029f0: 4413 add r3, r2
80029f2: 881b ldrh r3, [r3, #0]
80029f4: b29b uxth r3, r3
80029f6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80029fa: f023 0370 bic.w r3, r3, #112 @ 0x70
80029fe: 83bb strh r3, [r7, #28]
8002a00: 68fb ldr r3, [r7, #12]
8002a02: 681b ldr r3, [r3, #0]
8002a04: 461a mov r2, r3
8002a06: 68bb ldr r3, [r7, #8]
8002a08: 781b ldrb r3, [r3, #0]
8002a0a: 009b lsls r3, r3, #2
8002a0c: 441a add r2, r3
8002a0e: 8bbb ldrh r3, [r7, #28]
8002a10: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002a14: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002a18: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8002a1c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8002a20: b29b uxth r3, r3
8002a22: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8002a24: 8b7b ldrh r3, [r7, #26]
8002a26: 2b00 cmp r3, #0
8002a28: d008 beq.n 8002a3c <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8002a2a: 68fb ldr r3, [r7, #12]
8002a2c: 6818 ldr r0, [r3, #0]
8002a2e: 68bb ldr r3, [r7, #8]
8002a30: 6959 ldr r1, [r3, #20]
8002a32: 68bb ldr r3, [r7, #8]
8002a34: 895a ldrh r2, [r3, #10]
8002a36: 8b7b ldrh r3, [r7, #26]
8002a38: f004 f98b bl 8006d52 <USB_ReadPMA>
}
}
return count;
8002a3c: 8b7b ldrh r3, [r7, #26]
}
8002a3e: 4618 mov r0, r3
8002a40: 3720 adds r7, #32
8002a42: 46bd mov sp, r7
8002a44: bd80 pop {r7, pc}
08002a46 <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8002a46: b580 push {r7, lr}
8002a48: b0a4 sub sp, #144 @ 0x90
8002a4a: af00 add r7, sp, #0
8002a4c: 60f8 str r0, [r7, #12]
8002a4e: 60b9 str r1, [r7, #8]
8002a50: 4613 mov r3, r2
8002a52: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002a54: 88fb ldrh r3, [r7, #6]
8002a56: f003 0340 and.w r3, r3, #64 @ 0x40
8002a5a: 2b00 cmp r3, #0
8002a5c: f000 81dd beq.w 8002e1a <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8002a60: 68fb ldr r3, [r7, #12]
8002a62: 681b ldr r3, [r3, #0]
8002a64: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002a68: b29b uxth r3, r3
8002a6a: 461a mov r2, r3
8002a6c: 68bb ldr r3, [r7, #8]
8002a6e: 781b ldrb r3, [r3, #0]
8002a70: 00db lsls r3, r3, #3
8002a72: 4413 add r3, r2
8002a74: 3302 adds r3, #2
8002a76: 005b lsls r3, r3, #1
8002a78: 68fa ldr r2, [r7, #12]
8002a7a: 6812 ldr r2, [r2, #0]
8002a7c: 4413 add r3, r2
8002a7e: f503 6380 add.w r3, r3, #1024 @ 0x400
8002a82: 881b ldrh r3, [r3, #0]
8002a84: f3c3 0309 ubfx r3, r3, #0, #10
8002a88: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8002a8c: 68bb ldr r3, [r7, #8]
8002a8e: 699a ldr r2, [r3, #24]
8002a90: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002a94: 429a cmp r2, r3
8002a96: d907 bls.n 8002aa8 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8002a98: 68bb ldr r3, [r7, #8]
8002a9a: 699a ldr r2, [r3, #24]
8002a9c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002aa0: 1ad2 subs r2, r2, r3
8002aa2: 68bb ldr r3, [r7, #8]
8002aa4: 619a str r2, [r3, #24]
8002aa6: e002 b.n 8002aae <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8002aa8: 68bb ldr r3, [r7, #8]
8002aaa: 2200 movs r2, #0
8002aac: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8002aae: 68bb ldr r3, [r7, #8]
8002ab0: 699b ldr r3, [r3, #24]
8002ab2: 2b00 cmp r3, #0
8002ab4: f040 80b9 bne.w 8002c2a <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002ab8: 68bb ldr r3, [r7, #8]
8002aba: 785b ldrb r3, [r3, #1]
8002abc: 2b00 cmp r3, #0
8002abe: d126 bne.n 8002b0e <HAL_PCD_EP_DB_Transmit+0xc8>
8002ac0: 68fb ldr r3, [r7, #12]
8002ac2: 681b ldr r3, [r3, #0]
8002ac4: 62fb str r3, [r7, #44] @ 0x2c
8002ac6: 68fb ldr r3, [r7, #12]
8002ac8: 681b ldr r3, [r3, #0]
8002aca: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002ace: b29b uxth r3, r3
8002ad0: 461a mov r2, r3
8002ad2: 6afb ldr r3, [r7, #44] @ 0x2c
8002ad4: 4413 add r3, r2
8002ad6: 62fb str r3, [r7, #44] @ 0x2c
8002ad8: 68bb ldr r3, [r7, #8]
8002ada: 781b ldrb r3, [r3, #0]
8002adc: 011a lsls r2, r3, #4
8002ade: 6afb ldr r3, [r7, #44] @ 0x2c
8002ae0: 4413 add r3, r2
8002ae2: f203 4304 addw r3, r3, #1028 @ 0x404
8002ae6: 62bb str r3, [r7, #40] @ 0x28
8002ae8: 6abb ldr r3, [r7, #40] @ 0x28
8002aea: 881b ldrh r3, [r3, #0]
8002aec: b29b uxth r3, r3
8002aee: f3c3 0309 ubfx r3, r3, #0, #10
8002af2: b29a uxth r2, r3
8002af4: 6abb ldr r3, [r7, #40] @ 0x28
8002af6: 801a strh r2, [r3, #0]
8002af8: 6abb ldr r3, [r7, #40] @ 0x28
8002afa: 881b ldrh r3, [r3, #0]
8002afc: b29b uxth r3, r3
8002afe: ea6f 4343 mvn.w r3, r3, lsl #17
8002b02: ea6f 4353 mvn.w r3, r3, lsr #17
8002b06: b29a uxth r2, r3
8002b08: 6abb ldr r3, [r7, #40] @ 0x28
8002b0a: 801a strh r2, [r3, #0]
8002b0c: e01a b.n 8002b44 <HAL_PCD_EP_DB_Transmit+0xfe>
8002b0e: 68bb ldr r3, [r7, #8]
8002b10: 785b ldrb r3, [r3, #1]
8002b12: 2b01 cmp r3, #1
8002b14: d116 bne.n 8002b44 <HAL_PCD_EP_DB_Transmit+0xfe>
8002b16: 68fb ldr r3, [r7, #12]
8002b18: 681b ldr r3, [r3, #0]
8002b1a: 637b str r3, [r7, #52] @ 0x34
8002b1c: 68fb ldr r3, [r7, #12]
8002b1e: 681b ldr r3, [r3, #0]
8002b20: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002b24: b29b uxth r3, r3
8002b26: 461a mov r2, r3
8002b28: 6b7b ldr r3, [r7, #52] @ 0x34
8002b2a: 4413 add r3, r2
8002b2c: 637b str r3, [r7, #52] @ 0x34
8002b2e: 68bb ldr r3, [r7, #8]
8002b30: 781b ldrb r3, [r3, #0]
8002b32: 011a lsls r2, r3, #4
8002b34: 6b7b ldr r3, [r7, #52] @ 0x34
8002b36: 4413 add r3, r2
8002b38: f203 4304 addw r3, r3, #1028 @ 0x404
8002b3c: 633b str r3, [r7, #48] @ 0x30
8002b3e: 6b3b ldr r3, [r7, #48] @ 0x30
8002b40: 2200 movs r2, #0
8002b42: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002b44: 68fb ldr r3, [r7, #12]
8002b46: 681b ldr r3, [r3, #0]
8002b48: 627b str r3, [r7, #36] @ 0x24
8002b4a: 68bb ldr r3, [r7, #8]
8002b4c: 785b ldrb r3, [r3, #1]
8002b4e: 2b00 cmp r3, #0
8002b50: d126 bne.n 8002ba0 <HAL_PCD_EP_DB_Transmit+0x15a>
8002b52: 68fb ldr r3, [r7, #12]
8002b54: 681b ldr r3, [r3, #0]
8002b56: 61fb str r3, [r7, #28]
8002b58: 68fb ldr r3, [r7, #12]
8002b5a: 681b ldr r3, [r3, #0]
8002b5c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002b60: b29b uxth r3, r3
8002b62: 461a mov r2, r3
8002b64: 69fb ldr r3, [r7, #28]
8002b66: 4413 add r3, r2
8002b68: 61fb str r3, [r7, #28]
8002b6a: 68bb ldr r3, [r7, #8]
8002b6c: 781b ldrb r3, [r3, #0]
8002b6e: 011a lsls r2, r3, #4
8002b70: 69fb ldr r3, [r7, #28]
8002b72: 4413 add r3, r2
8002b74: f203 430c addw r3, r3, #1036 @ 0x40c
8002b78: 61bb str r3, [r7, #24]
8002b7a: 69bb ldr r3, [r7, #24]
8002b7c: 881b ldrh r3, [r3, #0]
8002b7e: b29b uxth r3, r3
8002b80: f3c3 0309 ubfx r3, r3, #0, #10
8002b84: b29a uxth r2, r3
8002b86: 69bb ldr r3, [r7, #24]
8002b88: 801a strh r2, [r3, #0]
8002b8a: 69bb ldr r3, [r7, #24]
8002b8c: 881b ldrh r3, [r3, #0]
8002b8e: b29b uxth r3, r3
8002b90: ea6f 4343 mvn.w r3, r3, lsl #17
8002b94: ea6f 4353 mvn.w r3, r3, lsr #17
8002b98: b29a uxth r2, r3
8002b9a: 69bb ldr r3, [r7, #24]
8002b9c: 801a strh r2, [r3, #0]
8002b9e: e017 b.n 8002bd0 <HAL_PCD_EP_DB_Transmit+0x18a>
8002ba0: 68bb ldr r3, [r7, #8]
8002ba2: 785b ldrb r3, [r3, #1]
8002ba4: 2b01 cmp r3, #1
8002ba6: d113 bne.n 8002bd0 <HAL_PCD_EP_DB_Transmit+0x18a>
8002ba8: 68fb ldr r3, [r7, #12]
8002baa: 681b ldr r3, [r3, #0]
8002bac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002bb0: b29b uxth r3, r3
8002bb2: 461a mov r2, r3
8002bb4: 6a7b ldr r3, [r7, #36] @ 0x24
8002bb6: 4413 add r3, r2
8002bb8: 627b str r3, [r7, #36] @ 0x24
8002bba: 68bb ldr r3, [r7, #8]
8002bbc: 781b ldrb r3, [r3, #0]
8002bbe: 011a lsls r2, r3, #4
8002bc0: 6a7b ldr r3, [r7, #36] @ 0x24
8002bc2: 4413 add r3, r2
8002bc4: f203 430c addw r3, r3, #1036 @ 0x40c
8002bc8: 623b str r3, [r7, #32]
8002bca: 6a3b ldr r3, [r7, #32]
8002bcc: 2200 movs r2, #0
8002bce: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002bd0: 68bb ldr r3, [r7, #8]
8002bd2: 781b ldrb r3, [r3, #0]
8002bd4: 4619 mov r1, r3
8002bd6: 68f8 ldr r0, [r7, #12]
8002bd8: f005 ff39 bl 8008a4e <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8002bdc: 88fb ldrh r3, [r7, #6]
8002bde: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002be2: 2b00 cmp r3, #0
8002be4: f000 82fc beq.w 80031e0 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8002be8: 68fb ldr r3, [r7, #12]
8002bea: 681b ldr r3, [r3, #0]
8002bec: 461a mov r2, r3
8002bee: 68bb ldr r3, [r7, #8]
8002bf0: 781b ldrb r3, [r3, #0]
8002bf2: 009b lsls r3, r3, #2
8002bf4: 4413 add r3, r2
8002bf6: 881b ldrh r3, [r3, #0]
8002bf8: b29b uxth r3, r3
8002bfa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002bfe: f023 0370 bic.w r3, r3, #112 @ 0x70
8002c02: 82fb strh r3, [r7, #22]
8002c04: 68fb ldr r3, [r7, #12]
8002c06: 681b ldr r3, [r3, #0]
8002c08: 461a mov r2, r3
8002c0a: 68bb ldr r3, [r7, #8]
8002c0c: 781b ldrb r3, [r3, #0]
8002c0e: 009b lsls r3, r3, #2
8002c10: 441a add r2, r3
8002c12: 8afb ldrh r3, [r7, #22]
8002c14: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002c18: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002c1c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8002c20: f043 0380 orr.w r3, r3, #128 @ 0x80
8002c24: b29b uxth r3, r3
8002c26: 8013 strh r3, [r2, #0]
8002c28: e2da b.n 80031e0 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8002c2a: 88fb ldrh r3, [r7, #6]
8002c2c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002c30: 2b00 cmp r3, #0
8002c32: d021 beq.n 8002c78 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8002c34: 68fb ldr r3, [r7, #12]
8002c36: 681b ldr r3, [r3, #0]
8002c38: 461a mov r2, r3
8002c3a: 68bb ldr r3, [r7, #8]
8002c3c: 781b ldrb r3, [r3, #0]
8002c3e: 009b lsls r3, r3, #2
8002c40: 4413 add r3, r2
8002c42: 881b ldrh r3, [r3, #0]
8002c44: b29b uxth r3, r3
8002c46: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002c4a: f023 0370 bic.w r3, r3, #112 @ 0x70
8002c4e: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8002c52: 68fb ldr r3, [r7, #12]
8002c54: 681b ldr r3, [r3, #0]
8002c56: 461a mov r2, r3
8002c58: 68bb ldr r3, [r7, #8]
8002c5a: 781b ldrb r3, [r3, #0]
8002c5c: 009b lsls r3, r3, #2
8002c5e: 441a add r2, r3
8002c60: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8002c64: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002c68: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002c6c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8002c70: f043 0380 orr.w r3, r3, #128 @ 0x80
8002c74: b29b uxth r3, r3
8002c76: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8002c78: 68bb ldr r3, [r7, #8]
8002c7a: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8002c7e: 2b01 cmp r3, #1
8002c80: f040 82ae bne.w 80031e0 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8002c84: 68bb ldr r3, [r7, #8]
8002c86: 695a ldr r2, [r3, #20]
8002c88: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002c8c: 441a add r2, r3
8002c8e: 68bb ldr r3, [r7, #8]
8002c90: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8002c92: 68bb ldr r3, [r7, #8]
8002c94: 69da ldr r2, [r3, #28]
8002c96: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002c9a: 441a add r2, r3
8002c9c: 68bb ldr r3, [r7, #8]
8002c9e: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8002ca0: 68bb ldr r3, [r7, #8]
8002ca2: 6a1a ldr r2, [r3, #32]
8002ca4: 68bb ldr r3, [r7, #8]
8002ca6: 691b ldr r3, [r3, #16]
8002ca8: 429a cmp r2, r3
8002caa: d30b bcc.n 8002cc4 <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8002cac: 68bb ldr r3, [r7, #8]
8002cae: 691b ldr r3, [r3, #16]
8002cb0: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8002cb4: 68bb ldr r3, [r7, #8]
8002cb6: 6a1a ldr r2, [r3, #32]
8002cb8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002cbc: 1ad2 subs r2, r2, r3
8002cbe: 68bb ldr r3, [r7, #8]
8002cc0: 621a str r2, [r3, #32]
8002cc2: e017 b.n 8002cf4 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8002cc4: 68bb ldr r3, [r7, #8]
8002cc6: 6a1b ldr r3, [r3, #32]
8002cc8: 2b00 cmp r3, #0
8002cca: d108 bne.n 8002cde <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8002ccc: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002cd0: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8002cd4: 68bb ldr r3, [r7, #8]
8002cd6: 2200 movs r2, #0
8002cd8: f883 2024 strb.w r2, [r3, #36] @ 0x24
8002cdc: e00a b.n 8002cf4 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8002cde: 68bb ldr r3, [r7, #8]
8002ce0: 2200 movs r2, #0
8002ce2: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8002ce6: 68bb ldr r3, [r7, #8]
8002ce8: 6a1b ldr r3, [r3, #32]
8002cea: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8002cee: 68bb ldr r3, [r7, #8]
8002cf0: 2200 movs r2, #0
8002cf2: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8002cf4: 68bb ldr r3, [r7, #8]
8002cf6: 785b ldrb r3, [r3, #1]
8002cf8: 2b00 cmp r3, #0
8002cfa: d165 bne.n 8002dc8 <HAL_PCD_EP_DB_Transmit+0x382>
8002cfc: 68fb ldr r3, [r7, #12]
8002cfe: 681b ldr r3, [r3, #0]
8002d00: 63fb str r3, [r7, #60] @ 0x3c
8002d02: 68fb ldr r3, [r7, #12]
8002d04: 681b ldr r3, [r3, #0]
8002d06: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002d0a: b29b uxth r3, r3
8002d0c: 461a mov r2, r3
8002d0e: 6bfb ldr r3, [r7, #60] @ 0x3c
8002d10: 4413 add r3, r2
8002d12: 63fb str r3, [r7, #60] @ 0x3c
8002d14: 68bb ldr r3, [r7, #8]
8002d16: 781b ldrb r3, [r3, #0]
8002d18: 011a lsls r2, r3, #4
8002d1a: 6bfb ldr r3, [r7, #60] @ 0x3c
8002d1c: 4413 add r3, r2
8002d1e: f203 4304 addw r3, r3, #1028 @ 0x404
8002d22: 63bb str r3, [r7, #56] @ 0x38
8002d24: 6bbb ldr r3, [r7, #56] @ 0x38
8002d26: 881b ldrh r3, [r3, #0]
8002d28: b29b uxth r3, r3
8002d2a: f3c3 0309 ubfx r3, r3, #0, #10
8002d2e: b29a uxth r2, r3
8002d30: 6bbb ldr r3, [r7, #56] @ 0x38
8002d32: 801a strh r2, [r3, #0]
8002d34: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002d38: 2b3e cmp r3, #62 @ 0x3e
8002d3a: d91d bls.n 8002d78 <HAL_PCD_EP_DB_Transmit+0x332>
8002d3c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002d40: 095b lsrs r3, r3, #5
8002d42: 64bb str r3, [r7, #72] @ 0x48
8002d44: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002d48: f003 031f and.w r3, r3, #31
8002d4c: 2b00 cmp r3, #0
8002d4e: d102 bne.n 8002d56 <HAL_PCD_EP_DB_Transmit+0x310>
8002d50: 6cbb ldr r3, [r7, #72] @ 0x48
8002d52: 3b01 subs r3, #1
8002d54: 64bb str r3, [r7, #72] @ 0x48
8002d56: 6bbb ldr r3, [r7, #56] @ 0x38
8002d58: 881b ldrh r3, [r3, #0]
8002d5a: b29a uxth r2, r3
8002d5c: 6cbb ldr r3, [r7, #72] @ 0x48
8002d5e: b29b uxth r3, r3
8002d60: 029b lsls r3, r3, #10
8002d62: b29b uxth r3, r3
8002d64: 4313 orrs r3, r2
8002d66: b29b uxth r3, r3
8002d68: ea6f 4343 mvn.w r3, r3, lsl #17
8002d6c: ea6f 4353 mvn.w r3, r3, lsr #17
8002d70: b29a uxth r2, r3
8002d72: 6bbb ldr r3, [r7, #56] @ 0x38
8002d74: 801a strh r2, [r3, #0]
8002d76: e044 b.n 8002e02 <HAL_PCD_EP_DB_Transmit+0x3bc>
8002d78: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002d7c: 2b00 cmp r3, #0
8002d7e: d10a bne.n 8002d96 <HAL_PCD_EP_DB_Transmit+0x350>
8002d80: 6bbb ldr r3, [r7, #56] @ 0x38
8002d82: 881b ldrh r3, [r3, #0]
8002d84: b29b uxth r3, r3
8002d86: ea6f 4343 mvn.w r3, r3, lsl #17
8002d8a: ea6f 4353 mvn.w r3, r3, lsr #17
8002d8e: b29a uxth r2, r3
8002d90: 6bbb ldr r3, [r7, #56] @ 0x38
8002d92: 801a strh r2, [r3, #0]
8002d94: e035 b.n 8002e02 <HAL_PCD_EP_DB_Transmit+0x3bc>
8002d96: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002d9a: 085b lsrs r3, r3, #1
8002d9c: 64bb str r3, [r7, #72] @ 0x48
8002d9e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002da2: f003 0301 and.w r3, r3, #1
8002da6: 2b00 cmp r3, #0
8002da8: d002 beq.n 8002db0 <HAL_PCD_EP_DB_Transmit+0x36a>
8002daa: 6cbb ldr r3, [r7, #72] @ 0x48
8002dac: 3301 adds r3, #1
8002dae: 64bb str r3, [r7, #72] @ 0x48
8002db0: 6bbb ldr r3, [r7, #56] @ 0x38
8002db2: 881b ldrh r3, [r3, #0]
8002db4: b29a uxth r2, r3
8002db6: 6cbb ldr r3, [r7, #72] @ 0x48
8002db8: b29b uxth r3, r3
8002dba: 029b lsls r3, r3, #10
8002dbc: b29b uxth r3, r3
8002dbe: 4313 orrs r3, r2
8002dc0: b29a uxth r2, r3
8002dc2: 6bbb ldr r3, [r7, #56] @ 0x38
8002dc4: 801a strh r2, [r3, #0]
8002dc6: e01c b.n 8002e02 <HAL_PCD_EP_DB_Transmit+0x3bc>
8002dc8: 68bb ldr r3, [r7, #8]
8002dca: 785b ldrb r3, [r3, #1]
8002dcc: 2b01 cmp r3, #1
8002dce: d118 bne.n 8002e02 <HAL_PCD_EP_DB_Transmit+0x3bc>
8002dd0: 68fb ldr r3, [r7, #12]
8002dd2: 681b ldr r3, [r3, #0]
8002dd4: 647b str r3, [r7, #68] @ 0x44
8002dd6: 68fb ldr r3, [r7, #12]
8002dd8: 681b ldr r3, [r3, #0]
8002dda: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002dde: b29b uxth r3, r3
8002de0: 461a mov r2, r3
8002de2: 6c7b ldr r3, [r7, #68] @ 0x44
8002de4: 4413 add r3, r2
8002de6: 647b str r3, [r7, #68] @ 0x44
8002de8: 68bb ldr r3, [r7, #8]
8002dea: 781b ldrb r3, [r3, #0]
8002dec: 011a lsls r2, r3, #4
8002dee: 6c7b ldr r3, [r7, #68] @ 0x44
8002df0: 4413 add r3, r2
8002df2: f203 4304 addw r3, r3, #1028 @ 0x404
8002df6: 643b str r3, [r7, #64] @ 0x40
8002df8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002dfc: b29a uxth r2, r3
8002dfe: 6c3b ldr r3, [r7, #64] @ 0x40
8002e00: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8002e02: 68fb ldr r3, [r7, #12]
8002e04: 6818 ldr r0, [r3, #0]
8002e06: 68bb ldr r3, [r7, #8]
8002e08: 6959 ldr r1, [r3, #20]
8002e0a: 68bb ldr r3, [r7, #8]
8002e0c: 891a ldrh r2, [r3, #8]
8002e0e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002e12: b29b uxth r3, r3
8002e14: f003 ff57 bl 8006cc6 <USB_WritePMA>
8002e18: e1e2 b.n 80031e0 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8002e1a: 68fb ldr r3, [r7, #12]
8002e1c: 681b ldr r3, [r3, #0]
8002e1e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002e22: b29b uxth r3, r3
8002e24: 461a mov r2, r3
8002e26: 68bb ldr r3, [r7, #8]
8002e28: 781b ldrb r3, [r3, #0]
8002e2a: 00db lsls r3, r3, #3
8002e2c: 4413 add r3, r2
8002e2e: 3306 adds r3, #6
8002e30: 005b lsls r3, r3, #1
8002e32: 68fa ldr r2, [r7, #12]
8002e34: 6812 ldr r2, [r2, #0]
8002e36: 4413 add r3, r2
8002e38: f503 6380 add.w r3, r3, #1024 @ 0x400
8002e3c: 881b ldrh r3, [r3, #0]
8002e3e: f3c3 0309 ubfx r3, r3, #0, #10
8002e42: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
8002e46: 68bb ldr r3, [r7, #8]
8002e48: 699a ldr r2, [r3, #24]
8002e4a: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002e4e: 429a cmp r2, r3
8002e50: d307 bcc.n 8002e62 <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
8002e52: 68bb ldr r3, [r7, #8]
8002e54: 699a ldr r2, [r3, #24]
8002e56: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002e5a: 1ad2 subs r2, r2, r3
8002e5c: 68bb ldr r3, [r7, #8]
8002e5e: 619a str r2, [r3, #24]
8002e60: e002 b.n 8002e68 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
8002e62: 68bb ldr r3, [r7, #8]
8002e64: 2200 movs r2, #0
8002e66: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8002e68: 68bb ldr r3, [r7, #8]
8002e6a: 699b ldr r3, [r3, #24]
8002e6c: 2b00 cmp r3, #0
8002e6e: f040 80c0 bne.w 8002ff2 <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002e72: 68bb ldr r3, [r7, #8]
8002e74: 785b ldrb r3, [r3, #1]
8002e76: 2b00 cmp r3, #0
8002e78: d126 bne.n 8002ec8 <HAL_PCD_EP_DB_Transmit+0x482>
8002e7a: 68fb ldr r3, [r7, #12]
8002e7c: 681b ldr r3, [r3, #0]
8002e7e: 67fb str r3, [r7, #124] @ 0x7c
8002e80: 68fb ldr r3, [r7, #12]
8002e82: 681b ldr r3, [r3, #0]
8002e84: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002e88: b29b uxth r3, r3
8002e8a: 461a mov r2, r3
8002e8c: 6ffb ldr r3, [r7, #124] @ 0x7c
8002e8e: 4413 add r3, r2
8002e90: 67fb str r3, [r7, #124] @ 0x7c
8002e92: 68bb ldr r3, [r7, #8]
8002e94: 781b ldrb r3, [r3, #0]
8002e96: 011a lsls r2, r3, #4
8002e98: 6ffb ldr r3, [r7, #124] @ 0x7c
8002e9a: 4413 add r3, r2
8002e9c: f203 4304 addw r3, r3, #1028 @ 0x404
8002ea0: 67bb str r3, [r7, #120] @ 0x78
8002ea2: 6fbb ldr r3, [r7, #120] @ 0x78
8002ea4: 881b ldrh r3, [r3, #0]
8002ea6: b29b uxth r3, r3
8002ea8: f3c3 0309 ubfx r3, r3, #0, #10
8002eac: b29a uxth r2, r3
8002eae: 6fbb ldr r3, [r7, #120] @ 0x78
8002eb0: 801a strh r2, [r3, #0]
8002eb2: 6fbb ldr r3, [r7, #120] @ 0x78
8002eb4: 881b ldrh r3, [r3, #0]
8002eb6: b29b uxth r3, r3
8002eb8: ea6f 4343 mvn.w r3, r3, lsl #17
8002ebc: ea6f 4353 mvn.w r3, r3, lsr #17
8002ec0: b29a uxth r2, r3
8002ec2: 6fbb ldr r3, [r7, #120] @ 0x78
8002ec4: 801a strh r2, [r3, #0]
8002ec6: e01a b.n 8002efe <HAL_PCD_EP_DB_Transmit+0x4b8>
8002ec8: 68bb ldr r3, [r7, #8]
8002eca: 785b ldrb r3, [r3, #1]
8002ecc: 2b01 cmp r3, #1
8002ece: d116 bne.n 8002efe <HAL_PCD_EP_DB_Transmit+0x4b8>
8002ed0: 68fb ldr r3, [r7, #12]
8002ed2: 681b ldr r3, [r3, #0]
8002ed4: 667b str r3, [r7, #100] @ 0x64
8002ed6: 68fb ldr r3, [r7, #12]
8002ed8: 681b ldr r3, [r3, #0]
8002eda: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002ede: b29b uxth r3, r3
8002ee0: 461a mov r2, r3
8002ee2: 6e7b ldr r3, [r7, #100] @ 0x64
8002ee4: 4413 add r3, r2
8002ee6: 667b str r3, [r7, #100] @ 0x64
8002ee8: 68bb ldr r3, [r7, #8]
8002eea: 781b ldrb r3, [r3, #0]
8002eec: 011a lsls r2, r3, #4
8002eee: 6e7b ldr r3, [r7, #100] @ 0x64
8002ef0: 4413 add r3, r2
8002ef2: f203 4304 addw r3, r3, #1028 @ 0x404
8002ef6: 663b str r3, [r7, #96] @ 0x60
8002ef8: 6e3b ldr r3, [r7, #96] @ 0x60
8002efa: 2200 movs r2, #0
8002efc: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002efe: 68fb ldr r3, [r7, #12]
8002f00: 681b ldr r3, [r3, #0]
8002f02: 677b str r3, [r7, #116] @ 0x74
8002f04: 68bb ldr r3, [r7, #8]
8002f06: 785b ldrb r3, [r3, #1]
8002f08: 2b00 cmp r3, #0
8002f0a: d12b bne.n 8002f64 <HAL_PCD_EP_DB_Transmit+0x51e>
8002f0c: 68fb ldr r3, [r7, #12]
8002f0e: 681b ldr r3, [r3, #0]
8002f10: 66fb str r3, [r7, #108] @ 0x6c
8002f12: 68fb ldr r3, [r7, #12]
8002f14: 681b ldr r3, [r3, #0]
8002f16: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002f1a: b29b uxth r3, r3
8002f1c: 461a mov r2, r3
8002f1e: 6efb ldr r3, [r7, #108] @ 0x6c
8002f20: 4413 add r3, r2
8002f22: 66fb str r3, [r7, #108] @ 0x6c
8002f24: 68bb ldr r3, [r7, #8]
8002f26: 781b ldrb r3, [r3, #0]
8002f28: 011a lsls r2, r3, #4
8002f2a: 6efb ldr r3, [r7, #108] @ 0x6c
8002f2c: 4413 add r3, r2
8002f2e: f203 430c addw r3, r3, #1036 @ 0x40c
8002f32: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8002f36: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002f3a: 881b ldrh r3, [r3, #0]
8002f3c: b29b uxth r3, r3
8002f3e: f3c3 0309 ubfx r3, r3, #0, #10
8002f42: b29a uxth r2, r3
8002f44: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002f48: 801a strh r2, [r3, #0]
8002f4a: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002f4e: 881b ldrh r3, [r3, #0]
8002f50: b29b uxth r3, r3
8002f52: ea6f 4343 mvn.w r3, r3, lsl #17
8002f56: ea6f 4353 mvn.w r3, r3, lsr #17
8002f5a: b29a uxth r2, r3
8002f5c: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002f60: 801a strh r2, [r3, #0]
8002f62: e017 b.n 8002f94 <HAL_PCD_EP_DB_Transmit+0x54e>
8002f64: 68bb ldr r3, [r7, #8]
8002f66: 785b ldrb r3, [r3, #1]
8002f68: 2b01 cmp r3, #1
8002f6a: d113 bne.n 8002f94 <HAL_PCD_EP_DB_Transmit+0x54e>
8002f6c: 68fb ldr r3, [r7, #12]
8002f6e: 681b ldr r3, [r3, #0]
8002f70: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002f74: b29b uxth r3, r3
8002f76: 461a mov r2, r3
8002f78: 6f7b ldr r3, [r7, #116] @ 0x74
8002f7a: 4413 add r3, r2
8002f7c: 677b str r3, [r7, #116] @ 0x74
8002f7e: 68bb ldr r3, [r7, #8]
8002f80: 781b ldrb r3, [r3, #0]
8002f82: 011a lsls r2, r3, #4
8002f84: 6f7b ldr r3, [r7, #116] @ 0x74
8002f86: 4413 add r3, r2
8002f88: f203 430c addw r3, r3, #1036 @ 0x40c
8002f8c: 673b str r3, [r7, #112] @ 0x70
8002f8e: 6f3b ldr r3, [r7, #112] @ 0x70
8002f90: 2200 movs r2, #0
8002f92: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002f94: 68bb ldr r3, [r7, #8]
8002f96: 781b ldrb r3, [r3, #0]
8002f98: 4619 mov r1, r3
8002f9a: 68f8 ldr r0, [r7, #12]
8002f9c: f005 fd57 bl 8008a4e <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8002fa0: 88fb ldrh r3, [r7, #6]
8002fa2: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002fa6: 2b00 cmp r3, #0
8002fa8: f040 811a bne.w 80031e0 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8002fac: 68fb ldr r3, [r7, #12]
8002fae: 681b ldr r3, [r3, #0]
8002fb0: 461a mov r2, r3
8002fb2: 68bb ldr r3, [r7, #8]
8002fb4: 781b ldrb r3, [r3, #0]
8002fb6: 009b lsls r3, r3, #2
8002fb8: 4413 add r3, r2
8002fba: 881b ldrh r3, [r3, #0]
8002fbc: b29b uxth r3, r3
8002fbe: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002fc2: f023 0370 bic.w r3, r3, #112 @ 0x70
8002fc6: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8002fca: 68fb ldr r3, [r7, #12]
8002fcc: 681b ldr r3, [r3, #0]
8002fce: 461a mov r2, r3
8002fd0: 68bb ldr r3, [r7, #8]
8002fd2: 781b ldrb r3, [r3, #0]
8002fd4: 009b lsls r3, r3, #2
8002fd6: 441a add r2, r3
8002fd8: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
8002fdc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002fe0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002fe4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8002fe8: f043 0380 orr.w r3, r3, #128 @ 0x80
8002fec: b29b uxth r3, r3
8002fee: 8013 strh r3, [r2, #0]
8002ff0: e0f6 b.n 80031e0 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8002ff2: 88fb ldrh r3, [r7, #6]
8002ff4: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002ff8: 2b00 cmp r3, #0
8002ffa: d121 bne.n 8003040 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8002ffc: 68fb ldr r3, [r7, #12]
8002ffe: 681b ldr r3, [r3, #0]
8003000: 461a mov r2, r3
8003002: 68bb ldr r3, [r7, #8]
8003004: 781b ldrb r3, [r3, #0]
8003006: 009b lsls r3, r3, #2
8003008: 4413 add r3, r2
800300a: 881b ldrh r3, [r3, #0]
800300c: b29b uxth r3, r3
800300e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003012: f023 0370 bic.w r3, r3, #112 @ 0x70
8003016: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
800301a: 68fb ldr r3, [r7, #12]
800301c: 681b ldr r3, [r3, #0]
800301e: 461a mov r2, r3
8003020: 68bb ldr r3, [r7, #8]
8003022: 781b ldrb r3, [r3, #0]
8003024: 009b lsls r3, r3, #2
8003026: 441a add r2, r3
8003028: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800302c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003030: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003034: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8003038: f043 0380 orr.w r3, r3, #128 @ 0x80
800303c: b29b uxth r3, r3
800303e: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8003040: 68bb ldr r3, [r7, #8]
8003042: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8003046: 2b01 cmp r3, #1
8003048: f040 80ca bne.w 80031e0 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
800304c: 68bb ldr r3, [r7, #8]
800304e: 695a ldr r2, [r3, #20]
8003050: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003054: 441a add r2, r3
8003056: 68bb ldr r3, [r7, #8]
8003058: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
800305a: 68bb ldr r3, [r7, #8]
800305c: 69da ldr r2, [r3, #28]
800305e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003062: 441a add r2, r3
8003064: 68bb ldr r3, [r7, #8]
8003066: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8003068: 68bb ldr r3, [r7, #8]
800306a: 6a1a ldr r2, [r3, #32]
800306c: 68bb ldr r3, [r7, #8]
800306e: 691b ldr r3, [r3, #16]
8003070: 429a cmp r2, r3
8003072: d30b bcc.n 800308c <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
8003074: 68bb ldr r3, [r7, #8]
8003076: 691b ldr r3, [r3, #16]
8003078: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
800307c: 68bb ldr r3, [r7, #8]
800307e: 6a1a ldr r2, [r3, #32]
8003080: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003084: 1ad2 subs r2, r2, r3
8003086: 68bb ldr r3, [r7, #8]
8003088: 621a str r2, [r3, #32]
800308a: e017 b.n 80030bc <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
800308c: 68bb ldr r3, [r7, #8]
800308e: 6a1b ldr r3, [r3, #32]
8003090: 2b00 cmp r3, #0
8003092: d108 bne.n 80030a6 <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
8003094: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003098: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
800309c: 68bb ldr r3, [r7, #8]
800309e: 2200 movs r2, #0
80030a0: f883 2024 strb.w r2, [r3, #36] @ 0x24
80030a4: e00a b.n 80030bc <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
80030a6: 68bb ldr r3, [r7, #8]
80030a8: 6a1b ldr r3, [r3, #32]
80030aa: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
80030ae: 68bb ldr r3, [r7, #8]
80030b0: 2200 movs r2, #0
80030b2: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
80030b4: 68bb ldr r3, [r7, #8]
80030b6: 2200 movs r2, #0
80030b8: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
80030bc: 68fb ldr r3, [r7, #12]
80030be: 681b ldr r3, [r3, #0]
80030c0: 657b str r3, [r7, #84] @ 0x54
80030c2: 68bb ldr r3, [r7, #8]
80030c4: 785b ldrb r3, [r3, #1]
80030c6: 2b00 cmp r3, #0
80030c8: d165 bne.n 8003196 <HAL_PCD_EP_DB_Transmit+0x750>
80030ca: 68fb ldr r3, [r7, #12]
80030cc: 681b ldr r3, [r3, #0]
80030ce: 65fb str r3, [r7, #92] @ 0x5c
80030d0: 68fb ldr r3, [r7, #12]
80030d2: 681b ldr r3, [r3, #0]
80030d4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80030d8: b29b uxth r3, r3
80030da: 461a mov r2, r3
80030dc: 6dfb ldr r3, [r7, #92] @ 0x5c
80030de: 4413 add r3, r2
80030e0: 65fb str r3, [r7, #92] @ 0x5c
80030e2: 68bb ldr r3, [r7, #8]
80030e4: 781b ldrb r3, [r3, #0]
80030e6: 011a lsls r2, r3, #4
80030e8: 6dfb ldr r3, [r7, #92] @ 0x5c
80030ea: 4413 add r3, r2
80030ec: f203 430c addw r3, r3, #1036 @ 0x40c
80030f0: 65bb str r3, [r7, #88] @ 0x58
80030f2: 6dbb ldr r3, [r7, #88] @ 0x58
80030f4: 881b ldrh r3, [r3, #0]
80030f6: b29b uxth r3, r3
80030f8: f3c3 0309 ubfx r3, r3, #0, #10
80030fc: b29a uxth r2, r3
80030fe: 6dbb ldr r3, [r7, #88] @ 0x58
8003100: 801a strh r2, [r3, #0]
8003102: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003106: 2b3e cmp r3, #62 @ 0x3e
8003108: d91d bls.n 8003146 <HAL_PCD_EP_DB_Transmit+0x700>
800310a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800310e: 095b lsrs r3, r3, #5
8003110: 66bb str r3, [r7, #104] @ 0x68
8003112: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003116: f003 031f and.w r3, r3, #31
800311a: 2b00 cmp r3, #0
800311c: d102 bne.n 8003124 <HAL_PCD_EP_DB_Transmit+0x6de>
800311e: 6ebb ldr r3, [r7, #104] @ 0x68
8003120: 3b01 subs r3, #1
8003122: 66bb str r3, [r7, #104] @ 0x68
8003124: 6dbb ldr r3, [r7, #88] @ 0x58
8003126: 881b ldrh r3, [r3, #0]
8003128: b29a uxth r2, r3
800312a: 6ebb ldr r3, [r7, #104] @ 0x68
800312c: b29b uxth r3, r3
800312e: 029b lsls r3, r3, #10
8003130: b29b uxth r3, r3
8003132: 4313 orrs r3, r2
8003134: b29b uxth r3, r3
8003136: ea6f 4343 mvn.w r3, r3, lsl #17
800313a: ea6f 4353 mvn.w r3, r3, lsr #17
800313e: b29a uxth r2, r3
8003140: 6dbb ldr r3, [r7, #88] @ 0x58
8003142: 801a strh r2, [r3, #0]
8003144: e041 b.n 80031ca <HAL_PCD_EP_DB_Transmit+0x784>
8003146: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800314a: 2b00 cmp r3, #0
800314c: d10a bne.n 8003164 <HAL_PCD_EP_DB_Transmit+0x71e>
800314e: 6dbb ldr r3, [r7, #88] @ 0x58
8003150: 881b ldrh r3, [r3, #0]
8003152: b29b uxth r3, r3
8003154: ea6f 4343 mvn.w r3, r3, lsl #17
8003158: ea6f 4353 mvn.w r3, r3, lsr #17
800315c: b29a uxth r2, r3
800315e: 6dbb ldr r3, [r7, #88] @ 0x58
8003160: 801a strh r2, [r3, #0]
8003162: e032 b.n 80031ca <HAL_PCD_EP_DB_Transmit+0x784>
8003164: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003168: 085b lsrs r3, r3, #1
800316a: 66bb str r3, [r7, #104] @ 0x68
800316c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003170: f003 0301 and.w r3, r3, #1
8003174: 2b00 cmp r3, #0
8003176: d002 beq.n 800317e <HAL_PCD_EP_DB_Transmit+0x738>
8003178: 6ebb ldr r3, [r7, #104] @ 0x68
800317a: 3301 adds r3, #1
800317c: 66bb str r3, [r7, #104] @ 0x68
800317e: 6dbb ldr r3, [r7, #88] @ 0x58
8003180: 881b ldrh r3, [r3, #0]
8003182: b29a uxth r2, r3
8003184: 6ebb ldr r3, [r7, #104] @ 0x68
8003186: b29b uxth r3, r3
8003188: 029b lsls r3, r3, #10
800318a: b29b uxth r3, r3
800318c: 4313 orrs r3, r2
800318e: b29a uxth r2, r3
8003190: 6dbb ldr r3, [r7, #88] @ 0x58
8003192: 801a strh r2, [r3, #0]
8003194: e019 b.n 80031ca <HAL_PCD_EP_DB_Transmit+0x784>
8003196: 68bb ldr r3, [r7, #8]
8003198: 785b ldrb r3, [r3, #1]
800319a: 2b01 cmp r3, #1
800319c: d115 bne.n 80031ca <HAL_PCD_EP_DB_Transmit+0x784>
800319e: 68fb ldr r3, [r7, #12]
80031a0: 681b ldr r3, [r3, #0]
80031a2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80031a6: b29b uxth r3, r3
80031a8: 461a mov r2, r3
80031aa: 6d7b ldr r3, [r7, #84] @ 0x54
80031ac: 4413 add r3, r2
80031ae: 657b str r3, [r7, #84] @ 0x54
80031b0: 68bb ldr r3, [r7, #8]
80031b2: 781b ldrb r3, [r3, #0]
80031b4: 011a lsls r2, r3, #4
80031b6: 6d7b ldr r3, [r7, #84] @ 0x54
80031b8: 4413 add r3, r2
80031ba: f203 430c addw r3, r3, #1036 @ 0x40c
80031be: 653b str r3, [r7, #80] @ 0x50
80031c0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80031c4: b29a uxth r2, r3
80031c6: 6d3b ldr r3, [r7, #80] @ 0x50
80031c8: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
80031ca: 68fb ldr r3, [r7, #12]
80031cc: 6818 ldr r0, [r3, #0]
80031ce: 68bb ldr r3, [r7, #8]
80031d0: 6959 ldr r1, [r3, #20]
80031d2: 68bb ldr r3, [r7, #8]
80031d4: 895a ldrh r2, [r3, #10]
80031d6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80031da: b29b uxth r3, r3
80031dc: f003 fd73 bl 8006cc6 <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
80031e0: 68fb ldr r3, [r7, #12]
80031e2: 681b ldr r3, [r3, #0]
80031e4: 461a mov r2, r3
80031e6: 68bb ldr r3, [r7, #8]
80031e8: 781b ldrb r3, [r3, #0]
80031ea: 009b lsls r3, r3, #2
80031ec: 4413 add r3, r2
80031ee: 881b ldrh r3, [r3, #0]
80031f0: b29b uxth r3, r3
80031f2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80031f6: f023 0340 bic.w r3, r3, #64 @ 0x40
80031fa: 82bb strh r3, [r7, #20]
80031fc: 8abb ldrh r3, [r7, #20]
80031fe: f083 0310 eor.w r3, r3, #16
8003202: 82bb strh r3, [r7, #20]
8003204: 8abb ldrh r3, [r7, #20]
8003206: f083 0320 eor.w r3, r3, #32
800320a: 82bb strh r3, [r7, #20]
800320c: 68fb ldr r3, [r7, #12]
800320e: 681b ldr r3, [r3, #0]
8003210: 461a mov r2, r3
8003212: 68bb ldr r3, [r7, #8]
8003214: 781b ldrb r3, [r3, #0]
8003216: 009b lsls r3, r3, #2
8003218: 441a add r2, r3
800321a: 8abb ldrh r3, [r7, #20]
800321c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003220: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003224: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003228: f043 0380 orr.w r3, r3, #128 @ 0x80
800322c: b29b uxth r3, r3
800322e: 8013 strh r3, [r2, #0]
return HAL_OK;
8003230: 2300 movs r3, #0
}
8003232: 4618 mov r0, r3
8003234: 3790 adds r7, #144 @ 0x90
8003236: 46bd mov sp, r7
8003238: bd80 pop {r7, pc}
0800323a <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
800323a: b480 push {r7}
800323c: b087 sub sp, #28
800323e: af00 add r7, sp, #0
8003240: 60f8 str r0, [r7, #12]
8003242: 607b str r3, [r7, #4]
8003244: 460b mov r3, r1
8003246: 817b strh r3, [r7, #10]
8003248: 4613 mov r3, r2
800324a: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
800324c: 897b ldrh r3, [r7, #10]
800324e: f003 0380 and.w r3, r3, #128 @ 0x80
8003252: b29b uxth r3, r3
8003254: 2b00 cmp r3, #0
8003256: d00b beq.n 8003270 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8003258: 897b ldrh r3, [r7, #10]
800325a: f003 0207 and.w r2, r3, #7
800325e: 4613 mov r3, r2
8003260: 009b lsls r3, r3, #2
8003262: 4413 add r3, r2
8003264: 00db lsls r3, r3, #3
8003266: 3310 adds r3, #16
8003268: 68fa ldr r2, [r7, #12]
800326a: 4413 add r3, r2
800326c: 617b str r3, [r7, #20]
800326e: e009 b.n 8003284 <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8003270: 897a ldrh r2, [r7, #10]
8003272: 4613 mov r3, r2
8003274: 009b lsls r3, r3, #2
8003276: 4413 add r3, r2
8003278: 00db lsls r3, r3, #3
800327a: f503 73a8 add.w r3, r3, #336 @ 0x150
800327e: 68fa ldr r2, [r7, #12]
8003280: 4413 add r3, r2
8003282: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8003284: 893b ldrh r3, [r7, #8]
8003286: 2b00 cmp r3, #0
8003288: d107 bne.n 800329a <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
800328a: 697b ldr r3, [r7, #20]
800328c: 2200 movs r2, #0
800328e: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8003290: 687b ldr r3, [r7, #4]
8003292: b29a uxth r2, r3
8003294: 697b ldr r3, [r7, #20]
8003296: 80da strh r2, [r3, #6]
8003298: e00b b.n 80032b2 <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
800329a: 697b ldr r3, [r7, #20]
800329c: 2201 movs r2, #1
800329e: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
80032a0: 687b ldr r3, [r7, #4]
80032a2: b29a uxth r2, r3
80032a4: 697b ldr r3, [r7, #20]
80032a6: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
80032a8: 687b ldr r3, [r7, #4]
80032aa: 0c1b lsrs r3, r3, #16
80032ac: b29a uxth r2, r3
80032ae: 697b ldr r3, [r7, #20]
80032b0: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
80032b2: 2300 movs r3, #0
}
80032b4: 4618 mov r0, r3
80032b6: 371c adds r7, #28
80032b8: 46bd mov sp, r7
80032ba: bc80 pop {r7}
80032bc: 4770 bx lr
...
080032c0 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
80032c0: b580 push {r7, lr}
80032c2: b086 sub sp, #24
80032c4: af00 add r7, sp, #0
80032c6: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
80032c8: 687b ldr r3, [r7, #4]
80032ca: 2b00 cmp r3, #0
80032cc: d101 bne.n 80032d2 <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
80032ce: 2301 movs r3, #1
80032d0: e272 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
80032d2: 687b ldr r3, [r7, #4]
80032d4: 681b ldr r3, [r3, #0]
80032d6: f003 0301 and.w r3, r3, #1
80032da: 2b00 cmp r3, #0
80032dc: f000 8087 beq.w 80033ee <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
80032e0: 4b92 ldr r3, [pc, #584] @ (800352c <HAL_RCC_OscConfig+0x26c>)
80032e2: 685b ldr r3, [r3, #4]
80032e4: f003 030c and.w r3, r3, #12
80032e8: 2b04 cmp r3, #4
80032ea: d00c beq.n 8003306 <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
80032ec: 4b8f ldr r3, [pc, #572] @ (800352c <HAL_RCC_OscConfig+0x26c>)
80032ee: 685b ldr r3, [r3, #4]
80032f0: f003 030c and.w r3, r3, #12
80032f4: 2b08 cmp r3, #8
80032f6: d112 bne.n 800331e <HAL_RCC_OscConfig+0x5e>
80032f8: 4b8c ldr r3, [pc, #560] @ (800352c <HAL_RCC_OscConfig+0x26c>)
80032fa: 685b ldr r3, [r3, #4]
80032fc: f403 3380 and.w r3, r3, #65536 @ 0x10000
8003300: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8003304: d10b bne.n 800331e <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8003306: 4b89 ldr r3, [pc, #548] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003308: 681b ldr r3, [r3, #0]
800330a: f403 3300 and.w r3, r3, #131072 @ 0x20000
800330e: 2b00 cmp r3, #0
8003310: d06c beq.n 80033ec <HAL_RCC_OscConfig+0x12c>
8003312: 687b ldr r3, [r7, #4]
8003314: 685b ldr r3, [r3, #4]
8003316: 2b00 cmp r3, #0
8003318: d168 bne.n 80033ec <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
800331a: 2301 movs r3, #1
800331c: e24c b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
800331e: 687b ldr r3, [r7, #4]
8003320: 685b ldr r3, [r3, #4]
8003322: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8003326: d106 bne.n 8003336 <HAL_RCC_OscConfig+0x76>
8003328: 4b80 ldr r3, [pc, #512] @ (800352c <HAL_RCC_OscConfig+0x26c>)
800332a: 681b ldr r3, [r3, #0]
800332c: 4a7f ldr r2, [pc, #508] @ (800352c <HAL_RCC_OscConfig+0x26c>)
800332e: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8003332: 6013 str r3, [r2, #0]
8003334: e02e b.n 8003394 <HAL_RCC_OscConfig+0xd4>
8003336: 687b ldr r3, [r7, #4]
8003338: 685b ldr r3, [r3, #4]
800333a: 2b00 cmp r3, #0
800333c: d10c bne.n 8003358 <HAL_RCC_OscConfig+0x98>
800333e: 4b7b ldr r3, [pc, #492] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003340: 681b ldr r3, [r3, #0]
8003342: 4a7a ldr r2, [pc, #488] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003344: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8003348: 6013 str r3, [r2, #0]
800334a: 4b78 ldr r3, [pc, #480] @ (800352c <HAL_RCC_OscConfig+0x26c>)
800334c: 681b ldr r3, [r3, #0]
800334e: 4a77 ldr r2, [pc, #476] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003350: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8003354: 6013 str r3, [r2, #0]
8003356: e01d b.n 8003394 <HAL_RCC_OscConfig+0xd4>
8003358: 687b ldr r3, [r7, #4]
800335a: 685b ldr r3, [r3, #4]
800335c: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
8003360: d10c bne.n 800337c <HAL_RCC_OscConfig+0xbc>
8003362: 4b72 ldr r3, [pc, #456] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003364: 681b ldr r3, [r3, #0]
8003366: 4a71 ldr r2, [pc, #452] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003368: f443 2380 orr.w r3, r3, #262144 @ 0x40000
800336c: 6013 str r3, [r2, #0]
800336e: 4b6f ldr r3, [pc, #444] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003370: 681b ldr r3, [r3, #0]
8003372: 4a6e ldr r2, [pc, #440] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003374: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8003378: 6013 str r3, [r2, #0]
800337a: e00b b.n 8003394 <HAL_RCC_OscConfig+0xd4>
800337c: 4b6b ldr r3, [pc, #428] @ (800352c <HAL_RCC_OscConfig+0x26c>)
800337e: 681b ldr r3, [r3, #0]
8003380: 4a6a ldr r2, [pc, #424] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003382: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8003386: 6013 str r3, [r2, #0]
8003388: 4b68 ldr r3, [pc, #416] @ (800352c <HAL_RCC_OscConfig+0x26c>)
800338a: 681b ldr r3, [r3, #0]
800338c: 4a67 ldr r2, [pc, #412] @ (800352c <HAL_RCC_OscConfig+0x26c>)
800338e: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8003392: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8003394: 687b ldr r3, [r7, #4]
8003396: 685b ldr r3, [r3, #4]
8003398: 2b00 cmp r3, #0
800339a: d013 beq.n 80033c4 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800339c: f7fd fd4a bl 8000e34 <HAL_GetTick>
80033a0: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80033a2: e008 b.n 80033b6 <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
80033a4: f7fd fd46 bl 8000e34 <HAL_GetTick>
80033a8: 4602 mov r2, r0
80033aa: 693b ldr r3, [r7, #16]
80033ac: 1ad3 subs r3, r2, r3
80033ae: 2b64 cmp r3, #100 @ 0x64
80033b0: d901 bls.n 80033b6 <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
80033b2: 2303 movs r3, #3
80033b4: e200 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80033b6: 4b5d ldr r3, [pc, #372] @ (800352c <HAL_RCC_OscConfig+0x26c>)
80033b8: 681b ldr r3, [r3, #0]
80033ba: f403 3300 and.w r3, r3, #131072 @ 0x20000
80033be: 2b00 cmp r3, #0
80033c0: d0f0 beq.n 80033a4 <HAL_RCC_OscConfig+0xe4>
80033c2: e014 b.n 80033ee <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80033c4: f7fd fd36 bl 8000e34 <HAL_GetTick>
80033c8: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80033ca: e008 b.n 80033de <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
80033cc: f7fd fd32 bl 8000e34 <HAL_GetTick>
80033d0: 4602 mov r2, r0
80033d2: 693b ldr r3, [r7, #16]
80033d4: 1ad3 subs r3, r2, r3
80033d6: 2b64 cmp r3, #100 @ 0x64
80033d8: d901 bls.n 80033de <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
80033da: 2303 movs r3, #3
80033dc: e1ec b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80033de: 4b53 ldr r3, [pc, #332] @ (800352c <HAL_RCC_OscConfig+0x26c>)
80033e0: 681b ldr r3, [r3, #0]
80033e2: f403 3300 and.w r3, r3, #131072 @ 0x20000
80033e6: 2b00 cmp r3, #0
80033e8: d1f0 bne.n 80033cc <HAL_RCC_OscConfig+0x10c>
80033ea: e000 b.n 80033ee <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80033ec: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
80033ee: 687b ldr r3, [r7, #4]
80033f0: 681b ldr r3, [r3, #0]
80033f2: f003 0302 and.w r3, r3, #2
80033f6: 2b00 cmp r3, #0
80033f8: d063 beq.n 80034c2 <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
80033fa: 4b4c ldr r3, [pc, #304] @ (800352c <HAL_RCC_OscConfig+0x26c>)
80033fc: 685b ldr r3, [r3, #4]
80033fe: f003 030c and.w r3, r3, #12
8003402: 2b00 cmp r3, #0
8003404: d00b beq.n 800341e <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
8003406: 4b49 ldr r3, [pc, #292] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003408: 685b ldr r3, [r3, #4]
800340a: f003 030c and.w r3, r3, #12
800340e: 2b08 cmp r3, #8
8003410: d11c bne.n 800344c <HAL_RCC_OscConfig+0x18c>
8003412: 4b46 ldr r3, [pc, #280] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003414: 685b ldr r3, [r3, #4]
8003416: f403 3380 and.w r3, r3, #65536 @ 0x10000
800341a: 2b00 cmp r3, #0
800341c: d116 bne.n 800344c <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
800341e: 4b43 ldr r3, [pc, #268] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003420: 681b ldr r3, [r3, #0]
8003422: f003 0302 and.w r3, r3, #2
8003426: 2b00 cmp r3, #0
8003428: d005 beq.n 8003436 <HAL_RCC_OscConfig+0x176>
800342a: 687b ldr r3, [r7, #4]
800342c: 691b ldr r3, [r3, #16]
800342e: 2b01 cmp r3, #1
8003430: d001 beq.n 8003436 <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
8003432: 2301 movs r3, #1
8003434: e1c0 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8003436: 4b3d ldr r3, [pc, #244] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003438: 681b ldr r3, [r3, #0]
800343a: f023 02f8 bic.w r2, r3, #248 @ 0xf8
800343e: 687b ldr r3, [r7, #4]
8003440: 695b ldr r3, [r3, #20]
8003442: 00db lsls r3, r3, #3
8003444: 4939 ldr r1, [pc, #228] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003446: 4313 orrs r3, r2
8003448: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
800344a: e03a b.n 80034c2 <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
800344c: 687b ldr r3, [r7, #4]
800344e: 691b ldr r3, [r3, #16]
8003450: 2b00 cmp r3, #0
8003452: d020 beq.n 8003496 <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8003454: 4b36 ldr r3, [pc, #216] @ (8003530 <HAL_RCC_OscConfig+0x270>)
8003456: 2201 movs r2, #1
8003458: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800345a: f7fd fceb bl 8000e34 <HAL_GetTick>
800345e: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003460: e008 b.n 8003474 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8003462: f7fd fce7 bl 8000e34 <HAL_GetTick>
8003466: 4602 mov r2, r0
8003468: 693b ldr r3, [r7, #16]
800346a: 1ad3 subs r3, r2, r3
800346c: 2b02 cmp r3, #2
800346e: d901 bls.n 8003474 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
8003470: 2303 movs r3, #3
8003472: e1a1 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003474: 4b2d ldr r3, [pc, #180] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003476: 681b ldr r3, [r3, #0]
8003478: f003 0302 and.w r3, r3, #2
800347c: 2b00 cmp r3, #0
800347e: d0f0 beq.n 8003462 <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8003480: 4b2a ldr r3, [pc, #168] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003482: 681b ldr r3, [r3, #0]
8003484: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8003488: 687b ldr r3, [r7, #4]
800348a: 695b ldr r3, [r3, #20]
800348c: 00db lsls r3, r3, #3
800348e: 4927 ldr r1, [pc, #156] @ (800352c <HAL_RCC_OscConfig+0x26c>)
8003490: 4313 orrs r3, r2
8003492: 600b str r3, [r1, #0]
8003494: e015 b.n 80034c2 <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8003496: 4b26 ldr r3, [pc, #152] @ (8003530 <HAL_RCC_OscConfig+0x270>)
8003498: 2200 movs r2, #0
800349a: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800349c: f7fd fcca bl 8000e34 <HAL_GetTick>
80034a0: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
80034a2: e008 b.n 80034b6 <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
80034a4: f7fd fcc6 bl 8000e34 <HAL_GetTick>
80034a8: 4602 mov r2, r0
80034aa: 693b ldr r3, [r7, #16]
80034ac: 1ad3 subs r3, r2, r3
80034ae: 2b02 cmp r3, #2
80034b0: d901 bls.n 80034b6 <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
80034b2: 2303 movs r3, #3
80034b4: e180 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
80034b6: 4b1d ldr r3, [pc, #116] @ (800352c <HAL_RCC_OscConfig+0x26c>)
80034b8: 681b ldr r3, [r3, #0]
80034ba: f003 0302 and.w r3, r3, #2
80034be: 2b00 cmp r3, #0
80034c0: d1f0 bne.n 80034a4 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
80034c2: 687b ldr r3, [r7, #4]
80034c4: 681b ldr r3, [r3, #0]
80034c6: f003 0308 and.w r3, r3, #8
80034ca: 2b00 cmp r3, #0
80034cc: d03a beq.n 8003544 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
80034ce: 687b ldr r3, [r7, #4]
80034d0: 699b ldr r3, [r3, #24]
80034d2: 2b00 cmp r3, #0
80034d4: d019 beq.n 800350a <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
80034d6: 4b17 ldr r3, [pc, #92] @ (8003534 <HAL_RCC_OscConfig+0x274>)
80034d8: 2201 movs r2, #1
80034da: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80034dc: f7fd fcaa bl 8000e34 <HAL_GetTick>
80034e0: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80034e2: e008 b.n 80034f6 <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80034e4: f7fd fca6 bl 8000e34 <HAL_GetTick>
80034e8: 4602 mov r2, r0
80034ea: 693b ldr r3, [r7, #16]
80034ec: 1ad3 subs r3, r2, r3
80034ee: 2b02 cmp r3, #2
80034f0: d901 bls.n 80034f6 <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
80034f2: 2303 movs r3, #3
80034f4: e160 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80034f6: 4b0d ldr r3, [pc, #52] @ (800352c <HAL_RCC_OscConfig+0x26c>)
80034f8: 6a5b ldr r3, [r3, #36] @ 0x24
80034fa: f003 0302 and.w r3, r3, #2
80034fe: 2b00 cmp r3, #0
8003500: d0f0 beq.n 80034e4 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
8003502: 2001 movs r0, #1
8003504: f000 fa9c bl 8003a40 <RCC_Delay>
8003508: e01c b.n 8003544 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
800350a: 4b0a ldr r3, [pc, #40] @ (8003534 <HAL_RCC_OscConfig+0x274>)
800350c: 2200 movs r2, #0
800350e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003510: f7fd fc90 bl 8000e34 <HAL_GetTick>
8003514: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003516: e00f b.n 8003538 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8003518: f7fd fc8c bl 8000e34 <HAL_GetTick>
800351c: 4602 mov r2, r0
800351e: 693b ldr r3, [r7, #16]
8003520: 1ad3 subs r3, r2, r3
8003522: 2b02 cmp r3, #2
8003524: d908 bls.n 8003538 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
8003526: 2303 movs r3, #3
8003528: e146 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
800352a: bf00 nop
800352c: 40021000 .word 0x40021000
8003530: 42420000 .word 0x42420000
8003534: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8003538: 4b92 ldr r3, [pc, #584] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
800353a: 6a5b ldr r3, [r3, #36] @ 0x24
800353c: f003 0302 and.w r3, r3, #2
8003540: 2b00 cmp r3, #0
8003542: d1e9 bne.n 8003518 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8003544: 687b ldr r3, [r7, #4]
8003546: 681b ldr r3, [r3, #0]
8003548: f003 0304 and.w r3, r3, #4
800354c: 2b00 cmp r3, #0
800354e: f000 80a6 beq.w 800369e <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
8003552: 2300 movs r3, #0
8003554: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8003556: 4b8b ldr r3, [pc, #556] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003558: 69db ldr r3, [r3, #28]
800355a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800355e: 2b00 cmp r3, #0
8003560: d10d bne.n 800357e <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
8003562: 4b88 ldr r3, [pc, #544] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003564: 69db ldr r3, [r3, #28]
8003566: 4a87 ldr r2, [pc, #540] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003568: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
800356c: 61d3 str r3, [r2, #28]
800356e: 4b85 ldr r3, [pc, #532] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003570: 69db ldr r3, [r3, #28]
8003572: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8003576: 60bb str r3, [r7, #8]
8003578: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
800357a: 2301 movs r3, #1
800357c: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800357e: 4b82 ldr r3, [pc, #520] @ (8003788 <HAL_RCC_OscConfig+0x4c8>)
8003580: 681b ldr r3, [r3, #0]
8003582: f403 7380 and.w r3, r3, #256 @ 0x100
8003586: 2b00 cmp r3, #0
8003588: d118 bne.n 80035bc <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
800358a: 4b7f ldr r3, [pc, #508] @ (8003788 <HAL_RCC_OscConfig+0x4c8>)
800358c: 681b ldr r3, [r3, #0]
800358e: 4a7e ldr r2, [pc, #504] @ (8003788 <HAL_RCC_OscConfig+0x4c8>)
8003590: f443 7380 orr.w r3, r3, #256 @ 0x100
8003594: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8003596: f7fd fc4d bl 8000e34 <HAL_GetTick>
800359a: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800359c: e008 b.n 80035b0 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
800359e: f7fd fc49 bl 8000e34 <HAL_GetTick>
80035a2: 4602 mov r2, r0
80035a4: 693b ldr r3, [r7, #16]
80035a6: 1ad3 subs r3, r2, r3
80035a8: 2b64 cmp r3, #100 @ 0x64
80035aa: d901 bls.n 80035b0 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
80035ac: 2303 movs r3, #3
80035ae: e103 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80035b0: 4b75 ldr r3, [pc, #468] @ (8003788 <HAL_RCC_OscConfig+0x4c8>)
80035b2: 681b ldr r3, [r3, #0]
80035b4: f403 7380 and.w r3, r3, #256 @ 0x100
80035b8: 2b00 cmp r3, #0
80035ba: d0f0 beq.n 800359e <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
80035bc: 687b ldr r3, [r7, #4]
80035be: 68db ldr r3, [r3, #12]
80035c0: 2b01 cmp r3, #1
80035c2: d106 bne.n 80035d2 <HAL_RCC_OscConfig+0x312>
80035c4: 4b6f ldr r3, [pc, #444] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80035c6: 6a1b ldr r3, [r3, #32]
80035c8: 4a6e ldr r2, [pc, #440] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80035ca: f043 0301 orr.w r3, r3, #1
80035ce: 6213 str r3, [r2, #32]
80035d0: e02d b.n 800362e <HAL_RCC_OscConfig+0x36e>
80035d2: 687b ldr r3, [r7, #4]
80035d4: 68db ldr r3, [r3, #12]
80035d6: 2b00 cmp r3, #0
80035d8: d10c bne.n 80035f4 <HAL_RCC_OscConfig+0x334>
80035da: 4b6a ldr r3, [pc, #424] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80035dc: 6a1b ldr r3, [r3, #32]
80035de: 4a69 ldr r2, [pc, #420] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80035e0: f023 0301 bic.w r3, r3, #1
80035e4: 6213 str r3, [r2, #32]
80035e6: 4b67 ldr r3, [pc, #412] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80035e8: 6a1b ldr r3, [r3, #32]
80035ea: 4a66 ldr r2, [pc, #408] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80035ec: f023 0304 bic.w r3, r3, #4
80035f0: 6213 str r3, [r2, #32]
80035f2: e01c b.n 800362e <HAL_RCC_OscConfig+0x36e>
80035f4: 687b ldr r3, [r7, #4]
80035f6: 68db ldr r3, [r3, #12]
80035f8: 2b05 cmp r3, #5
80035fa: d10c bne.n 8003616 <HAL_RCC_OscConfig+0x356>
80035fc: 4b61 ldr r3, [pc, #388] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80035fe: 6a1b ldr r3, [r3, #32]
8003600: 4a60 ldr r2, [pc, #384] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003602: f043 0304 orr.w r3, r3, #4
8003606: 6213 str r3, [r2, #32]
8003608: 4b5e ldr r3, [pc, #376] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
800360a: 6a1b ldr r3, [r3, #32]
800360c: 4a5d ldr r2, [pc, #372] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
800360e: f043 0301 orr.w r3, r3, #1
8003612: 6213 str r3, [r2, #32]
8003614: e00b b.n 800362e <HAL_RCC_OscConfig+0x36e>
8003616: 4b5b ldr r3, [pc, #364] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003618: 6a1b ldr r3, [r3, #32]
800361a: 4a5a ldr r2, [pc, #360] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
800361c: f023 0301 bic.w r3, r3, #1
8003620: 6213 str r3, [r2, #32]
8003622: 4b58 ldr r3, [pc, #352] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003624: 6a1b ldr r3, [r3, #32]
8003626: 4a57 ldr r2, [pc, #348] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003628: f023 0304 bic.w r3, r3, #4
800362c: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
800362e: 687b ldr r3, [r7, #4]
8003630: 68db ldr r3, [r3, #12]
8003632: 2b00 cmp r3, #0
8003634: d015 beq.n 8003662 <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003636: f7fd fbfd bl 8000e34 <HAL_GetTick>
800363a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800363c: e00a b.n 8003654 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800363e: f7fd fbf9 bl 8000e34 <HAL_GetTick>
8003642: 4602 mov r2, r0
8003644: 693b ldr r3, [r7, #16]
8003646: 1ad3 subs r3, r2, r3
8003648: f241 3288 movw r2, #5000 @ 0x1388
800364c: 4293 cmp r3, r2
800364e: d901 bls.n 8003654 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8003650: 2303 movs r3, #3
8003652: e0b1 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003654: 4b4b ldr r3, [pc, #300] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003656: 6a1b ldr r3, [r3, #32]
8003658: f003 0302 and.w r3, r3, #2
800365c: 2b00 cmp r3, #0
800365e: d0ee beq.n 800363e <HAL_RCC_OscConfig+0x37e>
8003660: e014 b.n 800368c <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003662: f7fd fbe7 bl 8000e34 <HAL_GetTick>
8003666: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8003668: e00a b.n 8003680 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800366a: f7fd fbe3 bl 8000e34 <HAL_GetTick>
800366e: 4602 mov r2, r0
8003670: 693b ldr r3, [r7, #16]
8003672: 1ad3 subs r3, r2, r3
8003674: f241 3288 movw r2, #5000 @ 0x1388
8003678: 4293 cmp r3, r2
800367a: d901 bls.n 8003680 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
800367c: 2303 movs r3, #3
800367e: e09b b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8003680: 4b40 ldr r3, [pc, #256] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003682: 6a1b ldr r3, [r3, #32]
8003684: f003 0302 and.w r3, r3, #2
8003688: 2b00 cmp r3, #0
800368a: d1ee bne.n 800366a <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
800368c: 7dfb ldrb r3, [r7, #23]
800368e: 2b01 cmp r3, #1
8003690: d105 bne.n 800369e <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
8003692: 4b3c ldr r3, [pc, #240] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003694: 69db ldr r3, [r3, #28]
8003696: 4a3b ldr r2, [pc, #236] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003698: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
800369c: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
800369e: 687b ldr r3, [r7, #4]
80036a0: 69db ldr r3, [r3, #28]
80036a2: 2b00 cmp r3, #0
80036a4: f000 8087 beq.w 80037b6 <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
80036a8: 4b36 ldr r3, [pc, #216] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80036aa: 685b ldr r3, [r3, #4]
80036ac: f003 030c and.w r3, r3, #12
80036b0: 2b08 cmp r3, #8
80036b2: d061 beq.n 8003778 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
80036b4: 687b ldr r3, [r7, #4]
80036b6: 69db ldr r3, [r3, #28]
80036b8: 2b02 cmp r3, #2
80036ba: d146 bne.n 800374a <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80036bc: 4b33 ldr r3, [pc, #204] @ (800378c <HAL_RCC_OscConfig+0x4cc>)
80036be: 2200 movs r2, #0
80036c0: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80036c2: f7fd fbb7 bl 8000e34 <HAL_GetTick>
80036c6: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80036c8: e008 b.n 80036dc <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80036ca: f7fd fbb3 bl 8000e34 <HAL_GetTick>
80036ce: 4602 mov r2, r0
80036d0: 693b ldr r3, [r7, #16]
80036d2: 1ad3 subs r3, r2, r3
80036d4: 2b02 cmp r3, #2
80036d6: d901 bls.n 80036dc <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
80036d8: 2303 movs r3, #3
80036da: e06d b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80036dc: 4b29 ldr r3, [pc, #164] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80036de: 681b ldr r3, [r3, #0]
80036e0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80036e4: 2b00 cmp r3, #0
80036e6: d1f0 bne.n 80036ca <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
80036e8: 687b ldr r3, [r7, #4]
80036ea: 6a1b ldr r3, [r3, #32]
80036ec: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80036f0: d108 bne.n 8003704 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
80036f2: 4b24 ldr r3, [pc, #144] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
80036f4: 685b ldr r3, [r3, #4]
80036f6: f423 3200 bic.w r2, r3, #131072 @ 0x20000
80036fa: 687b ldr r3, [r7, #4]
80036fc: 689b ldr r3, [r3, #8]
80036fe: 4921 ldr r1, [pc, #132] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003700: 4313 orrs r3, r2
8003702: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
8003704: 4b1f ldr r3, [pc, #124] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003706: 685b ldr r3, [r3, #4]
8003708: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
800370c: 687b ldr r3, [r7, #4]
800370e: 6a19 ldr r1, [r3, #32]
8003710: 687b ldr r3, [r7, #4]
8003712: 6a5b ldr r3, [r3, #36] @ 0x24
8003714: 430b orrs r3, r1
8003716: 491b ldr r1, [pc, #108] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
8003718: 4313 orrs r3, r2
800371a: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
800371c: 4b1b ldr r3, [pc, #108] @ (800378c <HAL_RCC_OscConfig+0x4cc>)
800371e: 2201 movs r2, #1
8003720: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003722: f7fd fb87 bl 8000e34 <HAL_GetTick>
8003726: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003728: e008 b.n 800373c <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800372a: f7fd fb83 bl 8000e34 <HAL_GetTick>
800372e: 4602 mov r2, r0
8003730: 693b ldr r3, [r7, #16]
8003732: 1ad3 subs r3, r2, r3
8003734: 2b02 cmp r3, #2
8003736: d901 bls.n 800373c <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8003738: 2303 movs r3, #3
800373a: e03d b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800373c: 4b11 ldr r3, [pc, #68] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
800373e: 681b ldr r3, [r3, #0]
8003740: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8003744: 2b00 cmp r3, #0
8003746: d0f0 beq.n 800372a <HAL_RCC_OscConfig+0x46a>
8003748: e035 b.n 80037b6 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
800374a: 4b10 ldr r3, [pc, #64] @ (800378c <HAL_RCC_OscConfig+0x4cc>)
800374c: 2200 movs r2, #0
800374e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8003750: f7fd fb70 bl 8000e34 <HAL_GetTick>
8003754: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8003756: e008 b.n 800376a <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8003758: f7fd fb6c bl 8000e34 <HAL_GetTick>
800375c: 4602 mov r2, r0
800375e: 693b ldr r3, [r7, #16]
8003760: 1ad3 subs r3, r2, r3
8003762: 2b02 cmp r3, #2
8003764: d901 bls.n 800376a <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
8003766: 2303 movs r3, #3
8003768: e026 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800376a: 4b06 ldr r3, [pc, #24] @ (8003784 <HAL_RCC_OscConfig+0x4c4>)
800376c: 681b ldr r3, [r3, #0]
800376e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8003772: 2b00 cmp r3, #0
8003774: d1f0 bne.n 8003758 <HAL_RCC_OscConfig+0x498>
8003776: e01e b.n 80037b6 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8003778: 687b ldr r3, [r7, #4]
800377a: 69db ldr r3, [r3, #28]
800377c: 2b01 cmp r3, #1
800377e: d107 bne.n 8003790 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8003780: 2301 movs r3, #1
8003782: e019 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
8003784: 40021000 .word 0x40021000
8003788: 40007000 .word 0x40007000
800378c: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8003790: 4b0b ldr r3, [pc, #44] @ (80037c0 <HAL_RCC_OscConfig+0x500>)
8003792: 685b ldr r3, [r3, #4]
8003794: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8003796: 68fb ldr r3, [r7, #12]
8003798: f403 3280 and.w r2, r3, #65536 @ 0x10000
800379c: 687b ldr r3, [r7, #4]
800379e: 6a1b ldr r3, [r3, #32]
80037a0: 429a cmp r2, r3
80037a2: d106 bne.n 80037b2 <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
80037a4: 68fb ldr r3, [r7, #12]
80037a6: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
80037aa: 687b ldr r3, [r7, #4]
80037ac: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
80037ae: 429a cmp r2, r3
80037b0: d001 beq.n 80037b6 <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
80037b2: 2301 movs r3, #1
80037b4: e000 b.n 80037b8 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
80037b6: 2300 movs r3, #0
}
80037b8: 4618 mov r0, r3
80037ba: 3718 adds r7, #24
80037bc: 46bd mov sp, r7
80037be: bd80 pop {r7, pc}
80037c0: 40021000 .word 0x40021000
080037c4 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
80037c4: b580 push {r7, lr}
80037c6: b084 sub sp, #16
80037c8: af00 add r7, sp, #0
80037ca: 6078 str r0, [r7, #4]
80037cc: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
80037ce: 687b ldr r3, [r7, #4]
80037d0: 2b00 cmp r3, #0
80037d2: d101 bne.n 80037d8 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
80037d4: 2301 movs r3, #1
80037d6: e0d0 b.n 800397a <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
80037d8: 4b6a ldr r3, [pc, #424] @ (8003984 <HAL_RCC_ClockConfig+0x1c0>)
80037da: 681b ldr r3, [r3, #0]
80037dc: f003 0307 and.w r3, r3, #7
80037e0: 683a ldr r2, [r7, #0]
80037e2: 429a cmp r2, r3
80037e4: d910 bls.n 8003808 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80037e6: 4b67 ldr r3, [pc, #412] @ (8003984 <HAL_RCC_ClockConfig+0x1c0>)
80037e8: 681b ldr r3, [r3, #0]
80037ea: f023 0207 bic.w r2, r3, #7
80037ee: 4965 ldr r1, [pc, #404] @ (8003984 <HAL_RCC_ClockConfig+0x1c0>)
80037f0: 683b ldr r3, [r7, #0]
80037f2: 4313 orrs r3, r2
80037f4: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80037f6: 4b63 ldr r3, [pc, #396] @ (8003984 <HAL_RCC_ClockConfig+0x1c0>)
80037f8: 681b ldr r3, [r3, #0]
80037fa: f003 0307 and.w r3, r3, #7
80037fe: 683a ldr r2, [r7, #0]
8003800: 429a cmp r2, r3
8003802: d001 beq.n 8003808 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8003804: 2301 movs r3, #1
8003806: e0b8 b.n 800397a <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8003808: 687b ldr r3, [r7, #4]
800380a: 681b ldr r3, [r3, #0]
800380c: f003 0302 and.w r3, r3, #2
8003810: 2b00 cmp r3, #0
8003812: d020 beq.n 8003856 <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8003814: 687b ldr r3, [r7, #4]
8003816: 681b ldr r3, [r3, #0]
8003818: f003 0304 and.w r3, r3, #4
800381c: 2b00 cmp r3, #0
800381e: d005 beq.n 800382c <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8003820: 4b59 ldr r3, [pc, #356] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
8003822: 685b ldr r3, [r3, #4]
8003824: 4a58 ldr r2, [pc, #352] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
8003826: f443 63e0 orr.w r3, r3, #1792 @ 0x700
800382a: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
800382c: 687b ldr r3, [r7, #4]
800382e: 681b ldr r3, [r3, #0]
8003830: f003 0308 and.w r3, r3, #8
8003834: 2b00 cmp r3, #0
8003836: d005 beq.n 8003844 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8003838: 4b53 ldr r3, [pc, #332] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
800383a: 685b ldr r3, [r3, #4]
800383c: 4a52 ldr r2, [pc, #328] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
800383e: f443 5360 orr.w r3, r3, #14336 @ 0x3800
8003842: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8003844: 4b50 ldr r3, [pc, #320] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
8003846: 685b ldr r3, [r3, #4]
8003848: f023 02f0 bic.w r2, r3, #240 @ 0xf0
800384c: 687b ldr r3, [r7, #4]
800384e: 689b ldr r3, [r3, #8]
8003850: 494d ldr r1, [pc, #308] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
8003852: 4313 orrs r3, r2
8003854: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8003856: 687b ldr r3, [r7, #4]
8003858: 681b ldr r3, [r3, #0]
800385a: f003 0301 and.w r3, r3, #1
800385e: 2b00 cmp r3, #0
8003860: d040 beq.n 80038e4 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8003862: 687b ldr r3, [r7, #4]
8003864: 685b ldr r3, [r3, #4]
8003866: 2b01 cmp r3, #1
8003868: d107 bne.n 800387a <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800386a: 4b47 ldr r3, [pc, #284] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
800386c: 681b ldr r3, [r3, #0]
800386e: f403 3300 and.w r3, r3, #131072 @ 0x20000
8003872: 2b00 cmp r3, #0
8003874: d115 bne.n 80038a2 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8003876: 2301 movs r3, #1
8003878: e07f b.n 800397a <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
800387a: 687b ldr r3, [r7, #4]
800387c: 685b ldr r3, [r3, #4]
800387e: 2b02 cmp r3, #2
8003880: d107 bne.n 8003892 <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8003882: 4b41 ldr r3, [pc, #260] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
8003884: 681b ldr r3, [r3, #0]
8003886: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800388a: 2b00 cmp r3, #0
800388c: d109 bne.n 80038a2 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800388e: 2301 movs r3, #1
8003890: e073 b.n 800397a <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8003892: 4b3d ldr r3, [pc, #244] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
8003894: 681b ldr r3, [r3, #0]
8003896: f003 0302 and.w r3, r3, #2
800389a: 2b00 cmp r3, #0
800389c: d101 bne.n 80038a2 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800389e: 2301 movs r3, #1
80038a0: e06b b.n 800397a <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
80038a2: 4b39 ldr r3, [pc, #228] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
80038a4: 685b ldr r3, [r3, #4]
80038a6: f023 0203 bic.w r2, r3, #3
80038aa: 687b ldr r3, [r7, #4]
80038ac: 685b ldr r3, [r3, #4]
80038ae: 4936 ldr r1, [pc, #216] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
80038b0: 4313 orrs r3, r2
80038b2: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
80038b4: f7fd fabe bl 8000e34 <HAL_GetTick>
80038b8: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80038ba: e00a b.n 80038d2 <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
80038bc: f7fd faba bl 8000e34 <HAL_GetTick>
80038c0: 4602 mov r2, r0
80038c2: 68fb ldr r3, [r7, #12]
80038c4: 1ad3 subs r3, r2, r3
80038c6: f241 3288 movw r2, #5000 @ 0x1388
80038ca: 4293 cmp r3, r2
80038cc: d901 bls.n 80038d2 <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
80038ce: 2303 movs r3, #3
80038d0: e053 b.n 800397a <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80038d2: 4b2d ldr r3, [pc, #180] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
80038d4: 685b ldr r3, [r3, #4]
80038d6: f003 020c and.w r2, r3, #12
80038da: 687b ldr r3, [r7, #4]
80038dc: 685b ldr r3, [r3, #4]
80038de: 009b lsls r3, r3, #2
80038e0: 429a cmp r2, r3
80038e2: d1eb bne.n 80038bc <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
80038e4: 4b27 ldr r3, [pc, #156] @ (8003984 <HAL_RCC_ClockConfig+0x1c0>)
80038e6: 681b ldr r3, [r3, #0]
80038e8: f003 0307 and.w r3, r3, #7
80038ec: 683a ldr r2, [r7, #0]
80038ee: 429a cmp r2, r3
80038f0: d210 bcs.n 8003914 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80038f2: 4b24 ldr r3, [pc, #144] @ (8003984 <HAL_RCC_ClockConfig+0x1c0>)
80038f4: 681b ldr r3, [r3, #0]
80038f6: f023 0207 bic.w r2, r3, #7
80038fa: 4922 ldr r1, [pc, #136] @ (8003984 <HAL_RCC_ClockConfig+0x1c0>)
80038fc: 683b ldr r3, [r7, #0]
80038fe: 4313 orrs r3, r2
8003900: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8003902: 4b20 ldr r3, [pc, #128] @ (8003984 <HAL_RCC_ClockConfig+0x1c0>)
8003904: 681b ldr r3, [r3, #0]
8003906: f003 0307 and.w r3, r3, #7
800390a: 683a ldr r2, [r7, #0]
800390c: 429a cmp r2, r3
800390e: d001 beq.n 8003914 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8003910: 2301 movs r3, #1
8003912: e032 b.n 800397a <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8003914: 687b ldr r3, [r7, #4]
8003916: 681b ldr r3, [r3, #0]
8003918: f003 0304 and.w r3, r3, #4
800391c: 2b00 cmp r3, #0
800391e: d008 beq.n 8003932 <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8003920: 4b19 ldr r3, [pc, #100] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
8003922: 685b ldr r3, [r3, #4]
8003924: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8003928: 687b ldr r3, [r7, #4]
800392a: 68db ldr r3, [r3, #12]
800392c: 4916 ldr r1, [pc, #88] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
800392e: 4313 orrs r3, r2
8003930: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8003932: 687b ldr r3, [r7, #4]
8003934: 681b ldr r3, [r3, #0]
8003936: f003 0308 and.w r3, r3, #8
800393a: 2b00 cmp r3, #0
800393c: d009 beq.n 8003952 <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
800393e: 4b12 ldr r3, [pc, #72] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
8003940: 685b ldr r3, [r3, #4]
8003942: f423 5260 bic.w r2, r3, #14336 @ 0x3800
8003946: 687b ldr r3, [r7, #4]
8003948: 691b ldr r3, [r3, #16]
800394a: 00db lsls r3, r3, #3
800394c: 490e ldr r1, [pc, #56] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
800394e: 4313 orrs r3, r2
8003950: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
8003952: f000 f821 bl 8003998 <HAL_RCC_GetSysClockFreq>
8003956: 4602 mov r2, r0
8003958: 4b0b ldr r3, [pc, #44] @ (8003988 <HAL_RCC_ClockConfig+0x1c4>)
800395a: 685b ldr r3, [r3, #4]
800395c: 091b lsrs r3, r3, #4
800395e: f003 030f and.w r3, r3, #15
8003962: 490a ldr r1, [pc, #40] @ (800398c <HAL_RCC_ClockConfig+0x1c8>)
8003964: 5ccb ldrb r3, [r1, r3]
8003966: fa22 f303 lsr.w r3, r2, r3
800396a: 4a09 ldr r2, [pc, #36] @ (8003990 <HAL_RCC_ClockConfig+0x1cc>)
800396c: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
800396e: 4b09 ldr r3, [pc, #36] @ (8003994 <HAL_RCC_ClockConfig+0x1d0>)
8003970: 681b ldr r3, [r3, #0]
8003972: 4618 mov r0, r3
8003974: f7fd fa1c bl 8000db0 <HAL_InitTick>
return HAL_OK;
8003978: 2300 movs r3, #0
}
800397a: 4618 mov r0, r3
800397c: 3710 adds r7, #16
800397e: 46bd mov sp, r7
8003980: bd80 pop {r7, pc}
8003982: bf00 nop
8003984: 40022000 .word 0x40022000
8003988: 40021000 .word 0x40021000
800398c: 080098cc .word 0x080098cc
8003990: 20000000 .word 0x20000000
8003994: 20000004 .word 0x20000004
08003998 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8003998: b480 push {r7}
800399a: b087 sub sp, #28
800399c: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
800399e: 2300 movs r3, #0
80039a0: 60fb str r3, [r7, #12]
80039a2: 2300 movs r3, #0
80039a4: 60bb str r3, [r7, #8]
80039a6: 2300 movs r3, #0
80039a8: 617b str r3, [r7, #20]
80039aa: 2300 movs r3, #0
80039ac: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
80039ae: 2300 movs r3, #0
80039b0: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
80039b2: 4b1e ldr r3, [pc, #120] @ (8003a2c <HAL_RCC_GetSysClockFreq+0x94>)
80039b4: 685b ldr r3, [r3, #4]
80039b6: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
80039b8: 68fb ldr r3, [r7, #12]
80039ba: f003 030c and.w r3, r3, #12
80039be: 2b04 cmp r3, #4
80039c0: d002 beq.n 80039c8 <HAL_RCC_GetSysClockFreq+0x30>
80039c2: 2b08 cmp r3, #8
80039c4: d003 beq.n 80039ce <HAL_RCC_GetSysClockFreq+0x36>
80039c6: e027 b.n 8003a18 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
80039c8: 4b19 ldr r3, [pc, #100] @ (8003a30 <HAL_RCC_GetSysClockFreq+0x98>)
80039ca: 613b str r3, [r7, #16]
break;
80039cc: e027 b.n 8003a1e <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
80039ce: 68fb ldr r3, [r7, #12]
80039d0: 0c9b lsrs r3, r3, #18
80039d2: f003 030f and.w r3, r3, #15
80039d6: 4a17 ldr r2, [pc, #92] @ (8003a34 <HAL_RCC_GetSysClockFreq+0x9c>)
80039d8: 5cd3 ldrb r3, [r2, r3]
80039da: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
80039dc: 68fb ldr r3, [r7, #12]
80039de: f403 3380 and.w r3, r3, #65536 @ 0x10000
80039e2: 2b00 cmp r3, #0
80039e4: d010 beq.n 8003a08 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
80039e6: 4b11 ldr r3, [pc, #68] @ (8003a2c <HAL_RCC_GetSysClockFreq+0x94>)
80039e8: 685b ldr r3, [r3, #4]
80039ea: 0c5b lsrs r3, r3, #17
80039ec: f003 0301 and.w r3, r3, #1
80039f0: 4a11 ldr r2, [pc, #68] @ (8003a38 <HAL_RCC_GetSysClockFreq+0xa0>)
80039f2: 5cd3 ldrb r3, [r2, r3]
80039f4: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
80039f6: 687b ldr r3, [r7, #4]
80039f8: 4a0d ldr r2, [pc, #52] @ (8003a30 <HAL_RCC_GetSysClockFreq+0x98>)
80039fa: fb03 f202 mul.w r2, r3, r2
80039fe: 68bb ldr r3, [r7, #8]
8003a00: fbb2 f3f3 udiv r3, r2, r3
8003a04: 617b str r3, [r7, #20]
8003a06: e004 b.n 8003a12 <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8003a08: 687b ldr r3, [r7, #4]
8003a0a: 4a0c ldr r2, [pc, #48] @ (8003a3c <HAL_RCC_GetSysClockFreq+0xa4>)
8003a0c: fb02 f303 mul.w r3, r2, r3
8003a10: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
8003a12: 697b ldr r3, [r7, #20]
8003a14: 613b str r3, [r7, #16]
break;
8003a16: e002 b.n 8003a1e <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8003a18: 4b05 ldr r3, [pc, #20] @ (8003a30 <HAL_RCC_GetSysClockFreq+0x98>)
8003a1a: 613b str r3, [r7, #16]
break;
8003a1c: bf00 nop
}
}
return sysclockfreq;
8003a1e: 693b ldr r3, [r7, #16]
}
8003a20: 4618 mov r0, r3
8003a22: 371c adds r7, #28
8003a24: 46bd mov sp, r7
8003a26: bc80 pop {r7}
8003a28: 4770 bx lr
8003a2a: bf00 nop
8003a2c: 40021000 .word 0x40021000
8003a30: 007a1200 .word 0x007a1200
8003a34: 080098dc .word 0x080098dc
8003a38: 080098ec .word 0x080098ec
8003a3c: 003d0900 .word 0x003d0900
08003a40 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8003a40: b480 push {r7}
8003a42: b085 sub sp, #20
8003a44: af00 add r7, sp, #0
8003a46: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8003a48: 4b0a ldr r3, [pc, #40] @ (8003a74 <RCC_Delay+0x34>)
8003a4a: 681b ldr r3, [r3, #0]
8003a4c: 4a0a ldr r2, [pc, #40] @ (8003a78 <RCC_Delay+0x38>)
8003a4e: fba2 2303 umull r2, r3, r2, r3
8003a52: 0a5b lsrs r3, r3, #9
8003a54: 687a ldr r2, [r7, #4]
8003a56: fb02 f303 mul.w r3, r2, r3
8003a5a: 60fb str r3, [r7, #12]
do
{
__NOP();
8003a5c: bf00 nop
}
while (Delay --);
8003a5e: 68fb ldr r3, [r7, #12]
8003a60: 1e5a subs r2, r3, #1
8003a62: 60fa str r2, [r7, #12]
8003a64: 2b00 cmp r3, #0
8003a66: d1f9 bne.n 8003a5c <RCC_Delay+0x1c>
}
8003a68: bf00 nop
8003a6a: bf00 nop
8003a6c: 3714 adds r7, #20
8003a6e: 46bd mov sp, r7
8003a70: bc80 pop {r7}
8003a72: 4770 bx lr
8003a74: 20000000 .word 0x20000000
8003a78: 10624dd3 .word 0x10624dd3
08003a7c <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8003a7c: b580 push {r7, lr}
8003a7e: b086 sub sp, #24
8003a80: af00 add r7, sp, #0
8003a82: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
8003a84: 2300 movs r3, #0
8003a86: 613b str r3, [r7, #16]
8003a88: 2300 movs r3, #0
8003a8a: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8003a8c: 687b ldr r3, [r7, #4]
8003a8e: 681b ldr r3, [r3, #0]
8003a90: f003 0301 and.w r3, r3, #1
8003a94: 2b00 cmp r3, #0
8003a96: d07d beq.n 8003b94 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
8003a98: 2300 movs r3, #0
8003a9a: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8003a9c: 4b4f ldr r3, [pc, #316] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003a9e: 69db ldr r3, [r3, #28]
8003aa0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8003aa4: 2b00 cmp r3, #0
8003aa6: d10d bne.n 8003ac4 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
8003aa8: 4b4c ldr r3, [pc, #304] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003aaa: 69db ldr r3, [r3, #28]
8003aac: 4a4b ldr r2, [pc, #300] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003aae: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8003ab2: 61d3 str r3, [r2, #28]
8003ab4: 4b49 ldr r3, [pc, #292] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003ab6: 69db ldr r3, [r3, #28]
8003ab8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8003abc: 60bb str r3, [r7, #8]
8003abe: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8003ac0: 2301 movs r3, #1
8003ac2: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003ac4: 4b46 ldr r3, [pc, #280] @ (8003be0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003ac6: 681b ldr r3, [r3, #0]
8003ac8: f403 7380 and.w r3, r3, #256 @ 0x100
8003acc: 2b00 cmp r3, #0
8003ace: d118 bne.n 8003b02 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8003ad0: 4b43 ldr r3, [pc, #268] @ (8003be0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003ad2: 681b ldr r3, [r3, #0]
8003ad4: 4a42 ldr r2, [pc, #264] @ (8003be0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003ad6: f443 7380 orr.w r3, r3, #256 @ 0x100
8003ada: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8003adc: f7fd f9aa bl 8000e34 <HAL_GetTick>
8003ae0: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003ae2: e008 b.n 8003af6 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8003ae4: f7fd f9a6 bl 8000e34 <HAL_GetTick>
8003ae8: 4602 mov r2, r0
8003aea: 693b ldr r3, [r7, #16]
8003aec: 1ad3 subs r3, r2, r3
8003aee: 2b64 cmp r3, #100 @ 0x64
8003af0: d901 bls.n 8003af6 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8003af2: 2303 movs r3, #3
8003af4: e06d b.n 8003bd2 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003af6: 4b3a ldr r3, [pc, #232] @ (8003be0 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003af8: 681b ldr r3, [r3, #0]
8003afa: f403 7380 and.w r3, r3, #256 @ 0x100
8003afe: 2b00 cmp r3, #0
8003b00: d0f0 beq.n 8003ae4 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8003b02: 4b36 ldr r3, [pc, #216] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b04: 6a1b ldr r3, [r3, #32]
8003b06: f403 7340 and.w r3, r3, #768 @ 0x300
8003b0a: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8003b0c: 68fb ldr r3, [r7, #12]
8003b0e: 2b00 cmp r3, #0
8003b10: d02e beq.n 8003b70 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8003b12: 687b ldr r3, [r7, #4]
8003b14: 685b ldr r3, [r3, #4]
8003b16: f403 7340 and.w r3, r3, #768 @ 0x300
8003b1a: 68fa ldr r2, [r7, #12]
8003b1c: 429a cmp r2, r3
8003b1e: d027 beq.n 8003b70 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8003b20: 4b2e ldr r3, [pc, #184] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b22: 6a1b ldr r3, [r3, #32]
8003b24: f423 7340 bic.w r3, r3, #768 @ 0x300
8003b28: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8003b2a: 4b2e ldr r3, [pc, #184] @ (8003be4 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8003b2c: 2201 movs r2, #1
8003b2e: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8003b30: 4b2c ldr r3, [pc, #176] @ (8003be4 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8003b32: 2200 movs r2, #0
8003b34: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8003b36: 4a29 ldr r2, [pc, #164] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b38: 68fb ldr r3, [r7, #12]
8003b3a: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8003b3c: 68fb ldr r3, [r7, #12]
8003b3e: f003 0301 and.w r3, r3, #1
8003b42: 2b00 cmp r3, #0
8003b44: d014 beq.n 8003b70 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003b46: f7fd f975 bl 8000e34 <HAL_GetTick>
8003b4a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003b4c: e00a b.n 8003b64 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8003b4e: f7fd f971 bl 8000e34 <HAL_GetTick>
8003b52: 4602 mov r2, r0
8003b54: 693b ldr r3, [r7, #16]
8003b56: 1ad3 subs r3, r2, r3
8003b58: f241 3288 movw r2, #5000 @ 0x1388
8003b5c: 4293 cmp r3, r2
8003b5e: d901 bls.n 8003b64 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8003b60: 2303 movs r3, #3
8003b62: e036 b.n 8003bd2 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003b64: 4b1d ldr r3, [pc, #116] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b66: 6a1b ldr r3, [r3, #32]
8003b68: f003 0302 and.w r3, r3, #2
8003b6c: 2b00 cmp r3, #0
8003b6e: d0ee beq.n 8003b4e <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8003b70: 4b1a ldr r3, [pc, #104] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b72: 6a1b ldr r3, [r3, #32]
8003b74: f423 7240 bic.w r2, r3, #768 @ 0x300
8003b78: 687b ldr r3, [r7, #4]
8003b7a: 685b ldr r3, [r3, #4]
8003b7c: 4917 ldr r1, [pc, #92] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b7e: 4313 orrs r3, r2
8003b80: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8003b82: 7dfb ldrb r3, [r7, #23]
8003b84: 2b01 cmp r3, #1
8003b86: d105 bne.n 8003b94 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8003b88: 4b14 ldr r3, [pc, #80] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b8a: 69db ldr r3, [r3, #28]
8003b8c: 4a13 ldr r2, [pc, #76] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003b8e: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8003b92: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8003b94: 687b ldr r3, [r7, #4]
8003b96: 681b ldr r3, [r3, #0]
8003b98: f003 0302 and.w r3, r3, #2
8003b9c: 2b00 cmp r3, #0
8003b9e: d008 beq.n 8003bb2 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
8003ba0: 4b0e ldr r3, [pc, #56] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003ba2: 685b ldr r3, [r3, #4]
8003ba4: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8003ba8: 687b ldr r3, [r7, #4]
8003baa: 689b ldr r3, [r3, #8]
8003bac: 490b ldr r1, [pc, #44] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bae: 4313 orrs r3, r2
8003bb0: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8003bb2: 687b ldr r3, [r7, #4]
8003bb4: 681b ldr r3, [r3, #0]
8003bb6: f003 0310 and.w r3, r3, #16
8003bba: 2b00 cmp r3, #0
8003bbc: d008 beq.n 8003bd0 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8003bbe: 4b07 ldr r3, [pc, #28] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bc0: 685b ldr r3, [r3, #4]
8003bc2: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8003bc6: 687b ldr r3, [r7, #4]
8003bc8: 68db ldr r3, [r3, #12]
8003bca: 4904 ldr r1, [pc, #16] @ (8003bdc <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003bcc: 4313 orrs r3, r2
8003bce: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8003bd0: 2300 movs r3, #0
}
8003bd2: 4618 mov r0, r3
8003bd4: 3718 adds r7, #24
8003bd6: 46bd mov sp, r7
8003bd8: bd80 pop {r7, pc}
8003bda: bf00 nop
8003bdc: 40021000 .word 0x40021000
8003be0: 40007000 .word 0x40007000
8003be4: 42420440 .word 0x42420440
08003be8 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8003be8: b580 push {r7, lr}
8003bea: b082 sub sp, #8
8003bec: af00 add r7, sp, #0
8003bee: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8003bf0: 687b ldr r3, [r7, #4]
8003bf2: 2b00 cmp r3, #0
8003bf4: d101 bne.n 8003bfa <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8003bf6: 2301 movs r3, #1
8003bf8: e041 b.n 8003c7e <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8003bfa: 687b ldr r3, [r7, #4]
8003bfc: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8003c00: b2db uxtb r3, r3
8003c02: 2b00 cmp r3, #0
8003c04: d106 bne.n 8003c14 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8003c06: 687b ldr r3, [r7, #4]
8003c08: 2200 movs r2, #0
8003c0a: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8003c0e: 6878 ldr r0, [r7, #4]
8003c10: f7fc ff1a bl 8000a48 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8003c14: 687b ldr r3, [r7, #4]
8003c16: 2202 movs r2, #2
8003c18: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8003c1c: 687b ldr r3, [r7, #4]
8003c1e: 681a ldr r2, [r3, #0]
8003c20: 687b ldr r3, [r7, #4]
8003c22: 3304 adds r3, #4
8003c24: 4619 mov r1, r3
8003c26: 4610 mov r0, r2
8003c28: f000 fa10 bl 800404c <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8003c2c: 687b ldr r3, [r7, #4]
8003c2e: 2201 movs r2, #1
8003c30: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003c34: 687b ldr r3, [r7, #4]
8003c36: 2201 movs r2, #1
8003c38: f883 203e strb.w r2, [r3, #62] @ 0x3e
8003c3c: 687b ldr r3, [r7, #4]
8003c3e: 2201 movs r2, #1
8003c40: f883 203f strb.w r2, [r3, #63] @ 0x3f
8003c44: 687b ldr r3, [r7, #4]
8003c46: 2201 movs r2, #1
8003c48: f883 2040 strb.w r2, [r3, #64] @ 0x40
8003c4c: 687b ldr r3, [r7, #4]
8003c4e: 2201 movs r2, #1
8003c50: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003c54: 687b ldr r3, [r7, #4]
8003c56: 2201 movs r2, #1
8003c58: f883 2042 strb.w r2, [r3, #66] @ 0x42
8003c5c: 687b ldr r3, [r7, #4]
8003c5e: 2201 movs r2, #1
8003c60: f883 2043 strb.w r2, [r3, #67] @ 0x43
8003c64: 687b ldr r3, [r7, #4]
8003c66: 2201 movs r2, #1
8003c68: f883 2044 strb.w r2, [r3, #68] @ 0x44
8003c6c: 687b ldr r3, [r7, #4]
8003c6e: 2201 movs r2, #1
8003c70: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8003c74: 687b ldr r3, [r7, #4]
8003c76: 2201 movs r2, #1
8003c78: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8003c7c: 2300 movs r3, #0
}
8003c7e: 4618 mov r0, r3
8003c80: 3708 adds r7, #8
8003c82: 46bd mov sp, r7
8003c84: bd80 pop {r7, pc}
08003c86 <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8003c86: b580 push {r7, lr}
8003c88: b082 sub sp, #8
8003c8a: af00 add r7, sp, #0
8003c8c: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8003c8e: 687b ldr r3, [r7, #4]
8003c90: 2b00 cmp r3, #0
8003c92: d101 bne.n 8003c98 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8003c94: 2301 movs r3, #1
8003c96: e041 b.n 8003d1c <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8003c98: 687b ldr r3, [r7, #4]
8003c9a: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8003c9e: b2db uxtb r3, r3
8003ca0: 2b00 cmp r3, #0
8003ca2: d106 bne.n 8003cb2 <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8003ca4: 687b ldr r3, [r7, #4]
8003ca6: 2200 movs r2, #0
8003ca8: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
8003cac: 6878 ldr r0, [r7, #4]
8003cae: f000 f839 bl 8003d24 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8003cb2: 687b ldr r3, [r7, #4]
8003cb4: 2202 movs r2, #2
8003cb6: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8003cba: 687b ldr r3, [r7, #4]
8003cbc: 681a ldr r2, [r3, #0]
8003cbe: 687b ldr r3, [r7, #4]
8003cc0: 3304 adds r3, #4
8003cc2: 4619 mov r1, r3
8003cc4: 4610 mov r0, r2
8003cc6: f000 f9c1 bl 800404c <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8003cca: 687b ldr r3, [r7, #4]
8003ccc: 2201 movs r2, #1
8003cce: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003cd2: 687b ldr r3, [r7, #4]
8003cd4: 2201 movs r2, #1
8003cd6: f883 203e strb.w r2, [r3, #62] @ 0x3e
8003cda: 687b ldr r3, [r7, #4]
8003cdc: 2201 movs r2, #1
8003cde: f883 203f strb.w r2, [r3, #63] @ 0x3f
8003ce2: 687b ldr r3, [r7, #4]
8003ce4: 2201 movs r2, #1
8003ce6: f883 2040 strb.w r2, [r3, #64] @ 0x40
8003cea: 687b ldr r3, [r7, #4]
8003cec: 2201 movs r2, #1
8003cee: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003cf2: 687b ldr r3, [r7, #4]
8003cf4: 2201 movs r2, #1
8003cf6: f883 2042 strb.w r2, [r3, #66] @ 0x42
8003cfa: 687b ldr r3, [r7, #4]
8003cfc: 2201 movs r2, #1
8003cfe: f883 2043 strb.w r2, [r3, #67] @ 0x43
8003d02: 687b ldr r3, [r7, #4]
8003d04: 2201 movs r2, #1
8003d06: f883 2044 strb.w r2, [r3, #68] @ 0x44
8003d0a: 687b ldr r3, [r7, #4]
8003d0c: 2201 movs r2, #1
8003d0e: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8003d12: 687b ldr r3, [r7, #4]
8003d14: 2201 movs r2, #1
8003d16: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8003d1a: 2300 movs r3, #0
}
8003d1c: 4618 mov r0, r3
8003d1e: 3708 adds r7, #8
8003d20: 46bd mov sp, r7
8003d22: bd80 pop {r7, pc}
08003d24 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8003d24: b480 push {r7}
8003d26: b083 sub sp, #12
8003d28: af00 add r7, sp, #0
8003d2a: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8003d2c: bf00 nop
8003d2e: 370c adds r7, #12
8003d30: 46bd mov sp, r7
8003d32: bc80 pop {r7}
8003d34: 4770 bx lr
...
08003d38 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8003d38: b580 push {r7, lr}
8003d3a: b086 sub sp, #24
8003d3c: af00 add r7, sp, #0
8003d3e: 60f8 str r0, [r7, #12]
8003d40: 60b9 str r1, [r7, #8]
8003d42: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8003d44: 2300 movs r3, #0
8003d46: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8003d48: 68fb ldr r3, [r7, #12]
8003d4a: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8003d4e: 2b01 cmp r3, #1
8003d50: d101 bne.n 8003d56 <HAL_TIM_PWM_ConfigChannel+0x1e>
8003d52: 2302 movs r3, #2
8003d54: e0ae b.n 8003eb4 <HAL_TIM_PWM_ConfigChannel+0x17c>
8003d56: 68fb ldr r3, [r7, #12]
8003d58: 2201 movs r2, #1
8003d5a: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
8003d5e: 687b ldr r3, [r7, #4]
8003d60: 2b0c cmp r3, #12
8003d62: f200 809f bhi.w 8003ea4 <HAL_TIM_PWM_ConfigChannel+0x16c>
8003d66: a201 add r2, pc, #4 @ (adr r2, 8003d6c <HAL_TIM_PWM_ConfigChannel+0x34>)
8003d68: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003d6c: 08003da1 .word 0x08003da1
8003d70: 08003ea5 .word 0x08003ea5
8003d74: 08003ea5 .word 0x08003ea5
8003d78: 08003ea5 .word 0x08003ea5
8003d7c: 08003de1 .word 0x08003de1
8003d80: 08003ea5 .word 0x08003ea5
8003d84: 08003ea5 .word 0x08003ea5
8003d88: 08003ea5 .word 0x08003ea5
8003d8c: 08003e23 .word 0x08003e23
8003d90: 08003ea5 .word 0x08003ea5
8003d94: 08003ea5 .word 0x08003ea5
8003d98: 08003ea5 .word 0x08003ea5
8003d9c: 08003e63 .word 0x08003e63
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
8003da0: 68fb ldr r3, [r7, #12]
8003da2: 681b ldr r3, [r3, #0]
8003da4: 68b9 ldr r1, [r7, #8]
8003da6: 4618 mov r0, r3
8003da8: f000 f9be bl 8004128 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
8003dac: 68fb ldr r3, [r7, #12]
8003dae: 681b ldr r3, [r3, #0]
8003db0: 699a ldr r2, [r3, #24]
8003db2: 68fb ldr r3, [r7, #12]
8003db4: 681b ldr r3, [r3, #0]
8003db6: f042 0208 orr.w r2, r2, #8
8003dba: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
8003dbc: 68fb ldr r3, [r7, #12]
8003dbe: 681b ldr r3, [r3, #0]
8003dc0: 699a ldr r2, [r3, #24]
8003dc2: 68fb ldr r3, [r7, #12]
8003dc4: 681b ldr r3, [r3, #0]
8003dc6: f022 0204 bic.w r2, r2, #4
8003dca: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
8003dcc: 68fb ldr r3, [r7, #12]
8003dce: 681b ldr r3, [r3, #0]
8003dd0: 6999 ldr r1, [r3, #24]
8003dd2: 68bb ldr r3, [r7, #8]
8003dd4: 691a ldr r2, [r3, #16]
8003dd6: 68fb ldr r3, [r7, #12]
8003dd8: 681b ldr r3, [r3, #0]
8003dda: 430a orrs r2, r1
8003ddc: 619a str r2, [r3, #24]
break;
8003dde: e064 b.n 8003eaa <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
8003de0: 68fb ldr r3, [r7, #12]
8003de2: 681b ldr r3, [r3, #0]
8003de4: 68b9 ldr r1, [r7, #8]
8003de6: 4618 mov r0, r3
8003de8: f000 fa04 bl 80041f4 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8003dec: 68fb ldr r3, [r7, #12]
8003dee: 681b ldr r3, [r3, #0]
8003df0: 699a ldr r2, [r3, #24]
8003df2: 68fb ldr r3, [r7, #12]
8003df4: 681b ldr r3, [r3, #0]
8003df6: f442 6200 orr.w r2, r2, #2048 @ 0x800
8003dfa: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8003dfc: 68fb ldr r3, [r7, #12]
8003dfe: 681b ldr r3, [r3, #0]
8003e00: 699a ldr r2, [r3, #24]
8003e02: 68fb ldr r3, [r7, #12]
8003e04: 681b ldr r3, [r3, #0]
8003e06: f422 6280 bic.w r2, r2, #1024 @ 0x400
8003e0a: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8003e0c: 68fb ldr r3, [r7, #12]
8003e0e: 681b ldr r3, [r3, #0]
8003e10: 6999 ldr r1, [r3, #24]
8003e12: 68bb ldr r3, [r7, #8]
8003e14: 691b ldr r3, [r3, #16]
8003e16: 021a lsls r2, r3, #8
8003e18: 68fb ldr r3, [r7, #12]
8003e1a: 681b ldr r3, [r3, #0]
8003e1c: 430a orrs r2, r1
8003e1e: 619a str r2, [r3, #24]
break;
8003e20: e043 b.n 8003eaa <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8003e22: 68fb ldr r3, [r7, #12]
8003e24: 681b ldr r3, [r3, #0]
8003e26: 68b9 ldr r1, [r7, #8]
8003e28: 4618 mov r0, r3
8003e2a: f000 fa4d bl 80042c8 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
8003e2e: 68fb ldr r3, [r7, #12]
8003e30: 681b ldr r3, [r3, #0]
8003e32: 69da ldr r2, [r3, #28]
8003e34: 68fb ldr r3, [r7, #12]
8003e36: 681b ldr r3, [r3, #0]
8003e38: f042 0208 orr.w r2, r2, #8
8003e3c: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
8003e3e: 68fb ldr r3, [r7, #12]
8003e40: 681b ldr r3, [r3, #0]
8003e42: 69da ldr r2, [r3, #28]
8003e44: 68fb ldr r3, [r7, #12]
8003e46: 681b ldr r3, [r3, #0]
8003e48: f022 0204 bic.w r2, r2, #4
8003e4c: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
8003e4e: 68fb ldr r3, [r7, #12]
8003e50: 681b ldr r3, [r3, #0]
8003e52: 69d9 ldr r1, [r3, #28]
8003e54: 68bb ldr r3, [r7, #8]
8003e56: 691a ldr r2, [r3, #16]
8003e58: 68fb ldr r3, [r7, #12]
8003e5a: 681b ldr r3, [r3, #0]
8003e5c: 430a orrs r2, r1
8003e5e: 61da str r2, [r3, #28]
break;
8003e60: e023 b.n 8003eaa <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
8003e62: 68fb ldr r3, [r7, #12]
8003e64: 681b ldr r3, [r3, #0]
8003e66: 68b9 ldr r1, [r7, #8]
8003e68: 4618 mov r0, r3
8003e6a: f000 fa97 bl 800439c <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
8003e6e: 68fb ldr r3, [r7, #12]
8003e70: 681b ldr r3, [r3, #0]
8003e72: 69da ldr r2, [r3, #28]
8003e74: 68fb ldr r3, [r7, #12]
8003e76: 681b ldr r3, [r3, #0]
8003e78: f442 6200 orr.w r2, r2, #2048 @ 0x800
8003e7c: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
8003e7e: 68fb ldr r3, [r7, #12]
8003e80: 681b ldr r3, [r3, #0]
8003e82: 69da ldr r2, [r3, #28]
8003e84: 68fb ldr r3, [r7, #12]
8003e86: 681b ldr r3, [r3, #0]
8003e88: f422 6280 bic.w r2, r2, #1024 @ 0x400
8003e8c: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
8003e8e: 68fb ldr r3, [r7, #12]
8003e90: 681b ldr r3, [r3, #0]
8003e92: 69d9 ldr r1, [r3, #28]
8003e94: 68bb ldr r3, [r7, #8]
8003e96: 691b ldr r3, [r3, #16]
8003e98: 021a lsls r2, r3, #8
8003e9a: 68fb ldr r3, [r7, #12]
8003e9c: 681b ldr r3, [r3, #0]
8003e9e: 430a orrs r2, r1
8003ea0: 61da str r2, [r3, #28]
break;
8003ea2: e002 b.n 8003eaa <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
8003ea4: 2301 movs r3, #1
8003ea6: 75fb strb r3, [r7, #23]
break;
8003ea8: bf00 nop
}
__HAL_UNLOCK(htim);
8003eaa: 68fb ldr r3, [r7, #12]
8003eac: 2200 movs r2, #0
8003eae: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8003eb2: 7dfb ldrb r3, [r7, #23]
}
8003eb4: 4618 mov r0, r3
8003eb6: 3718 adds r7, #24
8003eb8: 46bd mov sp, r7
8003eba: bd80 pop {r7, pc}
08003ebc <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
8003ebc: b580 push {r7, lr}
8003ebe: b084 sub sp, #16
8003ec0: af00 add r7, sp, #0
8003ec2: 6078 str r0, [r7, #4]
8003ec4: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8003ec6: 2300 movs r3, #0
8003ec8: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
8003eca: 687b ldr r3, [r7, #4]
8003ecc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8003ed0: 2b01 cmp r3, #1
8003ed2: d101 bne.n 8003ed8 <HAL_TIM_ConfigClockSource+0x1c>
8003ed4: 2302 movs r3, #2
8003ed6: e0b4 b.n 8004042 <HAL_TIM_ConfigClockSource+0x186>
8003ed8: 687b ldr r3, [r7, #4]
8003eda: 2201 movs r2, #1
8003edc: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
8003ee0: 687b ldr r3, [r7, #4]
8003ee2: 2202 movs r2, #2
8003ee4: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8003ee8: 687b ldr r3, [r7, #4]
8003eea: 681b ldr r3, [r3, #0]
8003eec: 689b ldr r3, [r3, #8]
8003eee: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
8003ef0: 68bb ldr r3, [r7, #8]
8003ef2: f023 0377 bic.w r3, r3, #119 @ 0x77
8003ef6: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8003ef8: 68bb ldr r3, [r7, #8]
8003efa: f423 437f bic.w r3, r3, #65280 @ 0xff00
8003efe: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
8003f00: 687b ldr r3, [r7, #4]
8003f02: 681b ldr r3, [r3, #0]
8003f04: 68ba ldr r2, [r7, #8]
8003f06: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8003f08: 683b ldr r3, [r7, #0]
8003f0a: 681b ldr r3, [r3, #0]
8003f0c: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8003f10: d03e beq.n 8003f90 <HAL_TIM_ConfigClockSource+0xd4>
8003f12: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8003f16: f200 8087 bhi.w 8004028 <HAL_TIM_ConfigClockSource+0x16c>
8003f1a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8003f1e: f000 8086 beq.w 800402e <HAL_TIM_ConfigClockSource+0x172>
8003f22: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8003f26: d87f bhi.n 8004028 <HAL_TIM_ConfigClockSource+0x16c>
8003f28: 2b70 cmp r3, #112 @ 0x70
8003f2a: d01a beq.n 8003f62 <HAL_TIM_ConfigClockSource+0xa6>
8003f2c: 2b70 cmp r3, #112 @ 0x70
8003f2e: d87b bhi.n 8004028 <HAL_TIM_ConfigClockSource+0x16c>
8003f30: 2b60 cmp r3, #96 @ 0x60
8003f32: d050 beq.n 8003fd6 <HAL_TIM_ConfigClockSource+0x11a>
8003f34: 2b60 cmp r3, #96 @ 0x60
8003f36: d877 bhi.n 8004028 <HAL_TIM_ConfigClockSource+0x16c>
8003f38: 2b50 cmp r3, #80 @ 0x50
8003f3a: d03c beq.n 8003fb6 <HAL_TIM_ConfigClockSource+0xfa>
8003f3c: 2b50 cmp r3, #80 @ 0x50
8003f3e: d873 bhi.n 8004028 <HAL_TIM_ConfigClockSource+0x16c>
8003f40: 2b40 cmp r3, #64 @ 0x40
8003f42: d058 beq.n 8003ff6 <HAL_TIM_ConfigClockSource+0x13a>
8003f44: 2b40 cmp r3, #64 @ 0x40
8003f46: d86f bhi.n 8004028 <HAL_TIM_ConfigClockSource+0x16c>
8003f48: 2b30 cmp r3, #48 @ 0x30
8003f4a: d064 beq.n 8004016 <HAL_TIM_ConfigClockSource+0x15a>
8003f4c: 2b30 cmp r3, #48 @ 0x30
8003f4e: d86b bhi.n 8004028 <HAL_TIM_ConfigClockSource+0x16c>
8003f50: 2b20 cmp r3, #32
8003f52: d060 beq.n 8004016 <HAL_TIM_ConfigClockSource+0x15a>
8003f54: 2b20 cmp r3, #32
8003f56: d867 bhi.n 8004028 <HAL_TIM_ConfigClockSource+0x16c>
8003f58: 2b00 cmp r3, #0
8003f5a: d05c beq.n 8004016 <HAL_TIM_ConfigClockSource+0x15a>
8003f5c: 2b10 cmp r3, #16
8003f5e: d05a beq.n 8004016 <HAL_TIM_ConfigClockSource+0x15a>
8003f60: e062 b.n 8004028 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8003f62: 687b ldr r3, [r7, #4]
8003f64: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8003f66: 683b ldr r3, [r7, #0]
8003f68: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8003f6a: 683b ldr r3, [r7, #0]
8003f6c: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8003f6e: 683b ldr r3, [r7, #0]
8003f70: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8003f72: f000 fad8 bl 8004526 <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
8003f76: 687b ldr r3, [r7, #4]
8003f78: 681b ldr r3, [r3, #0]
8003f7a: 689b ldr r3, [r3, #8]
8003f7c: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
8003f7e: 68bb ldr r3, [r7, #8]
8003f80: f043 0377 orr.w r3, r3, #119 @ 0x77
8003f84: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8003f86: 687b ldr r3, [r7, #4]
8003f88: 681b ldr r3, [r3, #0]
8003f8a: 68ba ldr r2, [r7, #8]
8003f8c: 609a str r2, [r3, #8]
break;
8003f8e: e04f b.n 8004030 <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8003f90: 687b ldr r3, [r7, #4]
8003f92: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8003f94: 683b ldr r3, [r7, #0]
8003f96: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8003f98: 683b ldr r3, [r7, #0]
8003f9a: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8003f9c: 683b ldr r3, [r7, #0]
8003f9e: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8003fa0: f000 fac1 bl 8004526 <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
8003fa4: 687b ldr r3, [r7, #4]
8003fa6: 681b ldr r3, [r3, #0]
8003fa8: 689a ldr r2, [r3, #8]
8003faa: 687b ldr r3, [r7, #4]
8003fac: 681b ldr r3, [r3, #0]
8003fae: f442 4280 orr.w r2, r2, #16384 @ 0x4000
8003fb2: 609a str r2, [r3, #8]
break;
8003fb4: e03c b.n 8004030 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8003fb6: 687b ldr r3, [r7, #4]
8003fb8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8003fba: 683b ldr r3, [r7, #0]
8003fbc: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8003fbe: 683b ldr r3, [r7, #0]
8003fc0: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8003fc2: 461a mov r2, r3
8003fc4: f000 fa38 bl 8004438 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
8003fc8: 687b ldr r3, [r7, #4]
8003fca: 681b ldr r3, [r3, #0]
8003fcc: 2150 movs r1, #80 @ 0x50
8003fce: 4618 mov r0, r3
8003fd0: f000 fa8f bl 80044f2 <TIM_ITRx_SetConfig>
break;
8003fd4: e02c b.n 8004030 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
8003fd6: 687b ldr r3, [r7, #4]
8003fd8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8003fda: 683b ldr r3, [r7, #0]
8003fdc: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8003fde: 683b ldr r3, [r7, #0]
8003fe0: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
8003fe2: 461a mov r2, r3
8003fe4: f000 fa56 bl 8004494 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
8003fe8: 687b ldr r3, [r7, #4]
8003fea: 681b ldr r3, [r3, #0]
8003fec: 2160 movs r1, #96 @ 0x60
8003fee: 4618 mov r0, r3
8003ff0: f000 fa7f bl 80044f2 <TIM_ITRx_SetConfig>
break;
8003ff4: e01c b.n 8004030 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8003ff6: 687b ldr r3, [r7, #4]
8003ff8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8003ffa: 683b ldr r3, [r7, #0]
8003ffc: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8003ffe: 683b ldr r3, [r7, #0]
8004000: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8004002: 461a mov r2, r3
8004004: f000 fa18 bl 8004438 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8004008: 687b ldr r3, [r7, #4]
800400a: 681b ldr r3, [r3, #0]
800400c: 2140 movs r1, #64 @ 0x40
800400e: 4618 mov r0, r3
8004010: f000 fa6f bl 80044f2 <TIM_ITRx_SetConfig>
break;
8004014: e00c b.n 8004030 <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
8004016: 687b ldr r3, [r7, #4]
8004018: 681a ldr r2, [r3, #0]
800401a: 683b ldr r3, [r7, #0]
800401c: 681b ldr r3, [r3, #0]
800401e: 4619 mov r1, r3
8004020: 4610 mov r0, r2
8004022: f000 fa66 bl 80044f2 <TIM_ITRx_SetConfig>
break;
8004026: e003 b.n 8004030 <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8004028: 2301 movs r3, #1
800402a: 73fb strb r3, [r7, #15]
break;
800402c: e000 b.n 8004030 <HAL_TIM_ConfigClockSource+0x174>
break;
800402e: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
8004030: 687b ldr r3, [r7, #4]
8004032: 2201 movs r2, #1
8004034: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8004038: 687b ldr r3, [r7, #4]
800403a: 2200 movs r2, #0
800403c: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8004040: 7bfb ldrb r3, [r7, #15]
}
8004042: 4618 mov r0, r3
8004044: 3710 adds r7, #16
8004046: 46bd mov sp, r7
8004048: bd80 pop {r7, pc}
...
0800404c <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
800404c: b480 push {r7}
800404e: b085 sub sp, #20
8004050: af00 add r7, sp, #0
8004052: 6078 str r0, [r7, #4]
8004054: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8004056: 687b ldr r3, [r7, #4]
8004058: 681b ldr r3, [r3, #0]
800405a: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
800405c: 687b ldr r3, [r7, #4]
800405e: 4a2f ldr r2, [pc, #188] @ (800411c <TIM_Base_SetConfig+0xd0>)
8004060: 4293 cmp r3, r2
8004062: d00b beq.n 800407c <TIM_Base_SetConfig+0x30>
8004064: 687b ldr r3, [r7, #4]
8004066: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800406a: d007 beq.n 800407c <TIM_Base_SetConfig+0x30>
800406c: 687b ldr r3, [r7, #4]
800406e: 4a2c ldr r2, [pc, #176] @ (8004120 <TIM_Base_SetConfig+0xd4>)
8004070: 4293 cmp r3, r2
8004072: d003 beq.n 800407c <TIM_Base_SetConfig+0x30>
8004074: 687b ldr r3, [r7, #4]
8004076: 4a2b ldr r2, [pc, #172] @ (8004124 <TIM_Base_SetConfig+0xd8>)
8004078: 4293 cmp r3, r2
800407a: d108 bne.n 800408e <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
800407c: 68fb ldr r3, [r7, #12]
800407e: f023 0370 bic.w r3, r3, #112 @ 0x70
8004082: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8004084: 683b ldr r3, [r7, #0]
8004086: 685b ldr r3, [r3, #4]
8004088: 68fa ldr r2, [r7, #12]
800408a: 4313 orrs r3, r2
800408c: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
800408e: 687b ldr r3, [r7, #4]
8004090: 4a22 ldr r2, [pc, #136] @ (800411c <TIM_Base_SetConfig+0xd0>)
8004092: 4293 cmp r3, r2
8004094: d00b beq.n 80040ae <TIM_Base_SetConfig+0x62>
8004096: 687b ldr r3, [r7, #4]
8004098: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800409c: d007 beq.n 80040ae <TIM_Base_SetConfig+0x62>
800409e: 687b ldr r3, [r7, #4]
80040a0: 4a1f ldr r2, [pc, #124] @ (8004120 <TIM_Base_SetConfig+0xd4>)
80040a2: 4293 cmp r3, r2
80040a4: d003 beq.n 80040ae <TIM_Base_SetConfig+0x62>
80040a6: 687b ldr r3, [r7, #4]
80040a8: 4a1e ldr r2, [pc, #120] @ (8004124 <TIM_Base_SetConfig+0xd8>)
80040aa: 4293 cmp r3, r2
80040ac: d108 bne.n 80040c0 <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
80040ae: 68fb ldr r3, [r7, #12]
80040b0: f423 7340 bic.w r3, r3, #768 @ 0x300
80040b4: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
80040b6: 683b ldr r3, [r7, #0]
80040b8: 68db ldr r3, [r3, #12]
80040ba: 68fa ldr r2, [r7, #12]
80040bc: 4313 orrs r3, r2
80040be: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
80040c0: 68fb ldr r3, [r7, #12]
80040c2: f023 0280 bic.w r2, r3, #128 @ 0x80
80040c6: 683b ldr r3, [r7, #0]
80040c8: 695b ldr r3, [r3, #20]
80040ca: 4313 orrs r3, r2
80040cc: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
80040ce: 687b ldr r3, [r7, #4]
80040d0: 68fa ldr r2, [r7, #12]
80040d2: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
80040d4: 683b ldr r3, [r7, #0]
80040d6: 689a ldr r2, [r3, #8]
80040d8: 687b ldr r3, [r7, #4]
80040da: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
80040dc: 683b ldr r3, [r7, #0]
80040de: 681a ldr r2, [r3, #0]
80040e0: 687b ldr r3, [r7, #4]
80040e2: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
80040e4: 687b ldr r3, [r7, #4]
80040e6: 4a0d ldr r2, [pc, #52] @ (800411c <TIM_Base_SetConfig+0xd0>)
80040e8: 4293 cmp r3, r2
80040ea: d103 bne.n 80040f4 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
80040ec: 683b ldr r3, [r7, #0]
80040ee: 691a ldr r2, [r3, #16]
80040f0: 687b ldr r3, [r7, #4]
80040f2: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
80040f4: 687b ldr r3, [r7, #4]
80040f6: 2201 movs r2, #1
80040f8: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
80040fa: 687b ldr r3, [r7, #4]
80040fc: 691b ldr r3, [r3, #16]
80040fe: f003 0301 and.w r3, r3, #1
8004102: 2b00 cmp r3, #0
8004104: d005 beq.n 8004112 <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
8004106: 687b ldr r3, [r7, #4]
8004108: 691b ldr r3, [r3, #16]
800410a: f023 0201 bic.w r2, r3, #1
800410e: 687b ldr r3, [r7, #4]
8004110: 611a str r2, [r3, #16]
}
}
8004112: bf00 nop
8004114: 3714 adds r7, #20
8004116: 46bd mov sp, r7
8004118: bc80 pop {r7}
800411a: 4770 bx lr
800411c: 40012c00 .word 0x40012c00
8004120: 40000400 .word 0x40000400
8004124: 40000800 .word 0x40000800
08004128 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8004128: b480 push {r7}
800412a: b087 sub sp, #28
800412c: af00 add r7, sp, #0
800412e: 6078 str r0, [r7, #4]
8004130: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8004132: 687b ldr r3, [r7, #4]
8004134: 6a1b ldr r3, [r3, #32]
8004136: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
8004138: 687b ldr r3, [r7, #4]
800413a: 6a1b ldr r3, [r3, #32]
800413c: f023 0201 bic.w r2, r3, #1
8004140: 687b ldr r3, [r7, #4]
8004142: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8004144: 687b ldr r3, [r7, #4]
8004146: 685b ldr r3, [r3, #4]
8004148: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
800414a: 687b ldr r3, [r7, #4]
800414c: 699b ldr r3, [r3, #24]
800414e: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
8004150: 68fb ldr r3, [r7, #12]
8004152: f023 0370 bic.w r3, r3, #112 @ 0x70
8004156: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
8004158: 68fb ldr r3, [r7, #12]
800415a: f023 0303 bic.w r3, r3, #3
800415e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8004160: 683b ldr r3, [r7, #0]
8004162: 681b ldr r3, [r3, #0]
8004164: 68fa ldr r2, [r7, #12]
8004166: 4313 orrs r3, r2
8004168: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
800416a: 697b ldr r3, [r7, #20]
800416c: f023 0302 bic.w r3, r3, #2
8004170: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
8004172: 683b ldr r3, [r7, #0]
8004174: 689b ldr r3, [r3, #8]
8004176: 697a ldr r2, [r7, #20]
8004178: 4313 orrs r3, r2
800417a: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
800417c: 687b ldr r3, [r7, #4]
800417e: 4a1c ldr r2, [pc, #112] @ (80041f0 <TIM_OC1_SetConfig+0xc8>)
8004180: 4293 cmp r3, r2
8004182: d10c bne.n 800419e <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
8004184: 697b ldr r3, [r7, #20]
8004186: f023 0308 bic.w r3, r3, #8
800418a: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
800418c: 683b ldr r3, [r7, #0]
800418e: 68db ldr r3, [r3, #12]
8004190: 697a ldr r2, [r7, #20]
8004192: 4313 orrs r3, r2
8004194: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
8004196: 697b ldr r3, [r7, #20]
8004198: f023 0304 bic.w r3, r3, #4
800419c: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
800419e: 687b ldr r3, [r7, #4]
80041a0: 4a13 ldr r2, [pc, #76] @ (80041f0 <TIM_OC1_SetConfig+0xc8>)
80041a2: 4293 cmp r3, r2
80041a4: d111 bne.n 80041ca <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
80041a6: 693b ldr r3, [r7, #16]
80041a8: f423 7380 bic.w r3, r3, #256 @ 0x100
80041ac: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
80041ae: 693b ldr r3, [r7, #16]
80041b0: f423 7300 bic.w r3, r3, #512 @ 0x200
80041b4: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
80041b6: 683b ldr r3, [r7, #0]
80041b8: 695b ldr r3, [r3, #20]
80041ba: 693a ldr r2, [r7, #16]
80041bc: 4313 orrs r3, r2
80041be: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
80041c0: 683b ldr r3, [r7, #0]
80041c2: 699b ldr r3, [r3, #24]
80041c4: 693a ldr r2, [r7, #16]
80041c6: 4313 orrs r3, r2
80041c8: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80041ca: 687b ldr r3, [r7, #4]
80041cc: 693a ldr r2, [r7, #16]
80041ce: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
80041d0: 687b ldr r3, [r7, #4]
80041d2: 68fa ldr r2, [r7, #12]
80041d4: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
80041d6: 683b ldr r3, [r7, #0]
80041d8: 685a ldr r2, [r3, #4]
80041da: 687b ldr r3, [r7, #4]
80041dc: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80041de: 687b ldr r3, [r7, #4]
80041e0: 697a ldr r2, [r7, #20]
80041e2: 621a str r2, [r3, #32]
}
80041e4: bf00 nop
80041e6: 371c adds r7, #28
80041e8: 46bd mov sp, r7
80041ea: bc80 pop {r7}
80041ec: 4770 bx lr
80041ee: bf00 nop
80041f0: 40012c00 .word 0x40012c00
080041f4 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80041f4: b480 push {r7}
80041f6: b087 sub sp, #28
80041f8: af00 add r7, sp, #0
80041fa: 6078 str r0, [r7, #4]
80041fc: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80041fe: 687b ldr r3, [r7, #4]
8004200: 6a1b ldr r3, [r3, #32]
8004202: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
8004204: 687b ldr r3, [r7, #4]
8004206: 6a1b ldr r3, [r3, #32]
8004208: f023 0210 bic.w r2, r3, #16
800420c: 687b ldr r3, [r7, #4]
800420e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8004210: 687b ldr r3, [r7, #4]
8004212: 685b ldr r3, [r3, #4]
8004214: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8004216: 687b ldr r3, [r7, #4]
8004218: 699b ldr r3, [r3, #24]
800421a: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
800421c: 68fb ldr r3, [r7, #12]
800421e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004222: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
8004224: 68fb ldr r3, [r7, #12]
8004226: f423 7340 bic.w r3, r3, #768 @ 0x300
800422a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
800422c: 683b ldr r3, [r7, #0]
800422e: 681b ldr r3, [r3, #0]
8004230: 021b lsls r3, r3, #8
8004232: 68fa ldr r2, [r7, #12]
8004234: 4313 orrs r3, r2
8004236: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
8004238: 697b ldr r3, [r7, #20]
800423a: f023 0320 bic.w r3, r3, #32
800423e: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
8004240: 683b ldr r3, [r7, #0]
8004242: 689b ldr r3, [r3, #8]
8004244: 011b lsls r3, r3, #4
8004246: 697a ldr r2, [r7, #20]
8004248: 4313 orrs r3, r2
800424a: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
800424c: 687b ldr r3, [r7, #4]
800424e: 4a1d ldr r2, [pc, #116] @ (80042c4 <TIM_OC2_SetConfig+0xd0>)
8004250: 4293 cmp r3, r2
8004252: d10d bne.n 8004270 <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
8004254: 697b ldr r3, [r7, #20]
8004256: f023 0380 bic.w r3, r3, #128 @ 0x80
800425a: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
800425c: 683b ldr r3, [r7, #0]
800425e: 68db ldr r3, [r3, #12]
8004260: 011b lsls r3, r3, #4
8004262: 697a ldr r2, [r7, #20]
8004264: 4313 orrs r3, r2
8004266: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
8004268: 697b ldr r3, [r7, #20]
800426a: f023 0340 bic.w r3, r3, #64 @ 0x40
800426e: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8004270: 687b ldr r3, [r7, #4]
8004272: 4a14 ldr r2, [pc, #80] @ (80042c4 <TIM_OC2_SetConfig+0xd0>)
8004274: 4293 cmp r3, r2
8004276: d113 bne.n 80042a0 <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
8004278: 693b ldr r3, [r7, #16]
800427a: f423 6380 bic.w r3, r3, #1024 @ 0x400
800427e: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
8004280: 693b ldr r3, [r7, #16]
8004282: f423 6300 bic.w r3, r3, #2048 @ 0x800
8004286: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8004288: 683b ldr r3, [r7, #0]
800428a: 695b ldr r3, [r3, #20]
800428c: 009b lsls r3, r3, #2
800428e: 693a ldr r2, [r7, #16]
8004290: 4313 orrs r3, r2
8004292: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
8004294: 683b ldr r3, [r7, #0]
8004296: 699b ldr r3, [r3, #24]
8004298: 009b lsls r3, r3, #2
800429a: 693a ldr r2, [r7, #16]
800429c: 4313 orrs r3, r2
800429e: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80042a0: 687b ldr r3, [r7, #4]
80042a2: 693a ldr r2, [r7, #16]
80042a4: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
80042a6: 687b ldr r3, [r7, #4]
80042a8: 68fa ldr r2, [r7, #12]
80042aa: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
80042ac: 683b ldr r3, [r7, #0]
80042ae: 685a ldr r2, [r3, #4]
80042b0: 687b ldr r3, [r7, #4]
80042b2: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80042b4: 687b ldr r3, [r7, #4]
80042b6: 697a ldr r2, [r7, #20]
80042b8: 621a str r2, [r3, #32]
}
80042ba: bf00 nop
80042bc: 371c adds r7, #28
80042be: 46bd mov sp, r7
80042c0: bc80 pop {r7}
80042c2: 4770 bx lr
80042c4: 40012c00 .word 0x40012c00
080042c8 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80042c8: b480 push {r7}
80042ca: b087 sub sp, #28
80042cc: af00 add r7, sp, #0
80042ce: 6078 str r0, [r7, #4]
80042d0: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80042d2: 687b ldr r3, [r7, #4]
80042d4: 6a1b ldr r3, [r3, #32]
80042d6: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
80042d8: 687b ldr r3, [r7, #4]
80042da: 6a1b ldr r3, [r3, #32]
80042dc: f423 7280 bic.w r2, r3, #256 @ 0x100
80042e0: 687b ldr r3, [r7, #4]
80042e2: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80042e4: 687b ldr r3, [r7, #4]
80042e6: 685b ldr r3, [r3, #4]
80042e8: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
80042ea: 687b ldr r3, [r7, #4]
80042ec: 69db ldr r3, [r3, #28]
80042ee: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
80042f0: 68fb ldr r3, [r7, #12]
80042f2: f023 0370 bic.w r3, r3, #112 @ 0x70
80042f6: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
80042f8: 68fb ldr r3, [r7, #12]
80042fa: f023 0303 bic.w r3, r3, #3
80042fe: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8004300: 683b ldr r3, [r7, #0]
8004302: 681b ldr r3, [r3, #0]
8004304: 68fa ldr r2, [r7, #12]
8004306: 4313 orrs r3, r2
8004308: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
800430a: 697b ldr r3, [r7, #20]
800430c: f423 7300 bic.w r3, r3, #512 @ 0x200
8004310: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
8004312: 683b ldr r3, [r7, #0]
8004314: 689b ldr r3, [r3, #8]
8004316: 021b lsls r3, r3, #8
8004318: 697a ldr r2, [r7, #20]
800431a: 4313 orrs r3, r2
800431c: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
800431e: 687b ldr r3, [r7, #4]
8004320: 4a1d ldr r2, [pc, #116] @ (8004398 <TIM_OC3_SetConfig+0xd0>)
8004322: 4293 cmp r3, r2
8004324: d10d bne.n 8004342 <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
8004326: 697b ldr r3, [r7, #20]
8004328: f423 6300 bic.w r3, r3, #2048 @ 0x800
800432c: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
800432e: 683b ldr r3, [r7, #0]
8004330: 68db ldr r3, [r3, #12]
8004332: 021b lsls r3, r3, #8
8004334: 697a ldr r2, [r7, #20]
8004336: 4313 orrs r3, r2
8004338: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
800433a: 697b ldr r3, [r7, #20]
800433c: f423 6380 bic.w r3, r3, #1024 @ 0x400
8004340: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8004342: 687b ldr r3, [r7, #4]
8004344: 4a14 ldr r2, [pc, #80] @ (8004398 <TIM_OC3_SetConfig+0xd0>)
8004346: 4293 cmp r3, r2
8004348: d113 bne.n 8004372 <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
800434a: 693b ldr r3, [r7, #16]
800434c: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8004350: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
8004352: 693b ldr r3, [r7, #16]
8004354: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8004358: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
800435a: 683b ldr r3, [r7, #0]
800435c: 695b ldr r3, [r3, #20]
800435e: 011b lsls r3, r3, #4
8004360: 693a ldr r2, [r7, #16]
8004362: 4313 orrs r3, r2
8004364: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
8004366: 683b ldr r3, [r7, #0]
8004368: 699b ldr r3, [r3, #24]
800436a: 011b lsls r3, r3, #4
800436c: 693a ldr r2, [r7, #16]
800436e: 4313 orrs r3, r2
8004370: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8004372: 687b ldr r3, [r7, #4]
8004374: 693a ldr r2, [r7, #16]
8004376: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8004378: 687b ldr r3, [r7, #4]
800437a: 68fa ldr r2, [r7, #12]
800437c: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
800437e: 683b ldr r3, [r7, #0]
8004380: 685a ldr r2, [r3, #4]
8004382: 687b ldr r3, [r7, #4]
8004384: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8004386: 687b ldr r3, [r7, #4]
8004388: 697a ldr r2, [r7, #20]
800438a: 621a str r2, [r3, #32]
}
800438c: bf00 nop
800438e: 371c adds r7, #28
8004390: 46bd mov sp, r7
8004392: bc80 pop {r7}
8004394: 4770 bx lr
8004396: bf00 nop
8004398: 40012c00 .word 0x40012c00
0800439c <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
800439c: b480 push {r7}
800439e: b087 sub sp, #28
80043a0: af00 add r7, sp, #0
80043a2: 6078 str r0, [r7, #4]
80043a4: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80043a6: 687b ldr r3, [r7, #4]
80043a8: 6a1b ldr r3, [r3, #32]
80043aa: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
80043ac: 687b ldr r3, [r7, #4]
80043ae: 6a1b ldr r3, [r3, #32]
80043b0: f423 5280 bic.w r2, r3, #4096 @ 0x1000
80043b4: 687b ldr r3, [r7, #4]
80043b6: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80043b8: 687b ldr r3, [r7, #4]
80043ba: 685b ldr r3, [r3, #4]
80043bc: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
80043be: 687b ldr r3, [r7, #4]
80043c0: 69db ldr r3, [r3, #28]
80043c2: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
80043c4: 68fb ldr r3, [r7, #12]
80043c6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80043ca: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
80043cc: 68fb ldr r3, [r7, #12]
80043ce: f423 7340 bic.w r3, r3, #768 @ 0x300
80043d2: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
80043d4: 683b ldr r3, [r7, #0]
80043d6: 681b ldr r3, [r3, #0]
80043d8: 021b lsls r3, r3, #8
80043da: 68fa ldr r2, [r7, #12]
80043dc: 4313 orrs r3, r2
80043de: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
80043e0: 693b ldr r3, [r7, #16]
80043e2: f423 5300 bic.w r3, r3, #8192 @ 0x2000
80043e6: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
80043e8: 683b ldr r3, [r7, #0]
80043ea: 689b ldr r3, [r3, #8]
80043ec: 031b lsls r3, r3, #12
80043ee: 693a ldr r2, [r7, #16]
80043f0: 4313 orrs r3, r2
80043f2: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
80043f4: 687b ldr r3, [r7, #4]
80043f6: 4a0f ldr r2, [pc, #60] @ (8004434 <TIM_OC4_SetConfig+0x98>)
80043f8: 4293 cmp r3, r2
80043fa: d109 bne.n 8004410 <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
80043fc: 697b ldr r3, [r7, #20]
80043fe: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004402: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
8004404: 683b ldr r3, [r7, #0]
8004406: 695b ldr r3, [r3, #20]
8004408: 019b lsls r3, r3, #6
800440a: 697a ldr r2, [r7, #20]
800440c: 4313 orrs r3, r2
800440e: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8004410: 687b ldr r3, [r7, #4]
8004412: 697a ldr r2, [r7, #20]
8004414: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8004416: 687b ldr r3, [r7, #4]
8004418: 68fa ldr r2, [r7, #12]
800441a: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
800441c: 683b ldr r3, [r7, #0]
800441e: 685a ldr r2, [r3, #4]
8004420: 687b ldr r3, [r7, #4]
8004422: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8004424: 687b ldr r3, [r7, #4]
8004426: 693a ldr r2, [r7, #16]
8004428: 621a str r2, [r3, #32]
}
800442a: bf00 nop
800442c: 371c adds r7, #28
800442e: 46bd mov sp, r7
8004430: bc80 pop {r7}
8004432: 4770 bx lr
8004434: 40012c00 .word 0x40012c00
08004438 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8004438: b480 push {r7}
800443a: b087 sub sp, #28
800443c: af00 add r7, sp, #0
800443e: 60f8 str r0, [r7, #12]
8004440: 60b9 str r1, [r7, #8]
8004442: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
8004444: 68fb ldr r3, [r7, #12]
8004446: 6a1b ldr r3, [r3, #32]
8004448: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
800444a: 68fb ldr r3, [r7, #12]
800444c: 6a1b ldr r3, [r3, #32]
800444e: f023 0201 bic.w r2, r3, #1
8004452: 68fb ldr r3, [r7, #12]
8004454: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8004456: 68fb ldr r3, [r7, #12]
8004458: 699b ldr r3, [r3, #24]
800445a: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
800445c: 693b ldr r3, [r7, #16]
800445e: f023 03f0 bic.w r3, r3, #240 @ 0xf0
8004462: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
8004464: 687b ldr r3, [r7, #4]
8004466: 011b lsls r3, r3, #4
8004468: 693a ldr r2, [r7, #16]
800446a: 4313 orrs r3, r2
800446c: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
800446e: 697b ldr r3, [r7, #20]
8004470: f023 030a bic.w r3, r3, #10
8004474: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
8004476: 697a ldr r2, [r7, #20]
8004478: 68bb ldr r3, [r7, #8]
800447a: 4313 orrs r3, r2
800447c: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
800447e: 68fb ldr r3, [r7, #12]
8004480: 693a ldr r2, [r7, #16]
8004482: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8004484: 68fb ldr r3, [r7, #12]
8004486: 697a ldr r2, [r7, #20]
8004488: 621a str r2, [r3, #32]
}
800448a: bf00 nop
800448c: 371c adds r7, #28
800448e: 46bd mov sp, r7
8004490: bc80 pop {r7}
8004492: 4770 bx lr
08004494 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8004494: b480 push {r7}
8004496: b087 sub sp, #28
8004498: af00 add r7, sp, #0
800449a: 60f8 str r0, [r7, #12]
800449c: 60b9 str r1, [r7, #8]
800449e: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
80044a0: 68fb ldr r3, [r7, #12]
80044a2: 6a1b ldr r3, [r3, #32]
80044a4: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
80044a6: 68fb ldr r3, [r7, #12]
80044a8: 6a1b ldr r3, [r3, #32]
80044aa: f023 0210 bic.w r2, r3, #16
80044ae: 68fb ldr r3, [r7, #12]
80044b0: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
80044b2: 68fb ldr r3, [r7, #12]
80044b4: 699b ldr r3, [r3, #24]
80044b6: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
80044b8: 693b ldr r3, [r7, #16]
80044ba: f423 4370 bic.w r3, r3, #61440 @ 0xf000
80044be: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
80044c0: 687b ldr r3, [r7, #4]
80044c2: 031b lsls r3, r3, #12
80044c4: 693a ldr r2, [r7, #16]
80044c6: 4313 orrs r3, r2
80044c8: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
80044ca: 697b ldr r3, [r7, #20]
80044cc: f023 03a0 bic.w r3, r3, #160 @ 0xa0
80044d0: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
80044d2: 68bb ldr r3, [r7, #8]
80044d4: 011b lsls r3, r3, #4
80044d6: 697a ldr r2, [r7, #20]
80044d8: 4313 orrs r3, r2
80044da: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
80044dc: 68fb ldr r3, [r7, #12]
80044de: 693a ldr r2, [r7, #16]
80044e0: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
80044e2: 68fb ldr r3, [r7, #12]
80044e4: 697a ldr r2, [r7, #20]
80044e6: 621a str r2, [r3, #32]
}
80044e8: bf00 nop
80044ea: 371c adds r7, #28
80044ec: 46bd mov sp, r7
80044ee: bc80 pop {r7}
80044f0: 4770 bx lr
080044f2 <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
80044f2: b480 push {r7}
80044f4: b085 sub sp, #20
80044f6: af00 add r7, sp, #0
80044f8: 6078 str r0, [r7, #4]
80044fa: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
80044fc: 687b ldr r3, [r7, #4]
80044fe: 689b ldr r3, [r3, #8]
8004500: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
8004502: 68fb ldr r3, [r7, #12]
8004504: f023 0370 bic.w r3, r3, #112 @ 0x70
8004508: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
800450a: 683a ldr r2, [r7, #0]
800450c: 68fb ldr r3, [r7, #12]
800450e: 4313 orrs r3, r2
8004510: f043 0307 orr.w r3, r3, #7
8004514: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8004516: 687b ldr r3, [r7, #4]
8004518: 68fa ldr r2, [r7, #12]
800451a: 609a str r2, [r3, #8]
}
800451c: bf00 nop
800451e: 3714 adds r7, #20
8004520: 46bd mov sp, r7
8004522: bc80 pop {r7}
8004524: 4770 bx lr
08004526 <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
8004526: b480 push {r7}
8004528: b087 sub sp, #28
800452a: af00 add r7, sp, #0
800452c: 60f8 str r0, [r7, #12]
800452e: 60b9 str r1, [r7, #8]
8004530: 607a str r2, [r7, #4]
8004532: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
8004534: 68fb ldr r3, [r7, #12]
8004536: 689b ldr r3, [r3, #8]
8004538: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
800453a: 697b ldr r3, [r7, #20]
800453c: f423 437f bic.w r3, r3, #65280 @ 0xff00
8004540: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
8004542: 683b ldr r3, [r7, #0]
8004544: 021a lsls r2, r3, #8
8004546: 687b ldr r3, [r7, #4]
8004548: 431a orrs r2, r3
800454a: 68bb ldr r3, [r7, #8]
800454c: 4313 orrs r3, r2
800454e: 697a ldr r2, [r7, #20]
8004550: 4313 orrs r3, r2
8004552: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8004554: 68fb ldr r3, [r7, #12]
8004556: 697a ldr r2, [r7, #20]
8004558: 609a str r2, [r3, #8]
}
800455a: bf00 nop
800455c: 371c adds r7, #28
800455e: 46bd mov sp, r7
8004560: bc80 pop {r7}
8004562: 4770 bx lr
08004564 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8004564: b480 push {r7}
8004566: b085 sub sp, #20
8004568: af00 add r7, sp, #0
800456a: 6078 str r0, [r7, #4]
800456c: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
800456e: 687b ldr r3, [r7, #4]
8004570: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8004574: 2b01 cmp r3, #1
8004576: d101 bne.n 800457c <HAL_TIMEx_MasterConfigSynchronization+0x18>
8004578: 2302 movs r3, #2
800457a: e046 b.n 800460a <HAL_TIMEx_MasterConfigSynchronization+0xa6>
800457c: 687b ldr r3, [r7, #4]
800457e: 2201 movs r2, #1
8004580: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8004584: 687b ldr r3, [r7, #4]
8004586: 2202 movs r2, #2
8004588: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
800458c: 687b ldr r3, [r7, #4]
800458e: 681b ldr r3, [r3, #0]
8004590: 685b ldr r3, [r3, #4]
8004592: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8004594: 687b ldr r3, [r7, #4]
8004596: 681b ldr r3, [r3, #0]
8004598: 689b ldr r3, [r3, #8]
800459a: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
800459c: 68fb ldr r3, [r7, #12]
800459e: f023 0370 bic.w r3, r3, #112 @ 0x70
80045a2: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
80045a4: 683b ldr r3, [r7, #0]
80045a6: 681b ldr r3, [r3, #0]
80045a8: 68fa ldr r2, [r7, #12]
80045aa: 4313 orrs r3, r2
80045ac: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
80045ae: 687b ldr r3, [r7, #4]
80045b0: 681b ldr r3, [r3, #0]
80045b2: 68fa ldr r2, [r7, #12]
80045b4: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
80045b6: 687b ldr r3, [r7, #4]
80045b8: 681b ldr r3, [r3, #0]
80045ba: 4a16 ldr r2, [pc, #88] @ (8004614 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
80045bc: 4293 cmp r3, r2
80045be: d00e beq.n 80045de <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80045c0: 687b ldr r3, [r7, #4]
80045c2: 681b ldr r3, [r3, #0]
80045c4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80045c8: d009 beq.n 80045de <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80045ca: 687b ldr r3, [r7, #4]
80045cc: 681b ldr r3, [r3, #0]
80045ce: 4a12 ldr r2, [pc, #72] @ (8004618 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
80045d0: 4293 cmp r3, r2
80045d2: d004 beq.n 80045de <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80045d4: 687b ldr r3, [r7, #4]
80045d6: 681b ldr r3, [r3, #0]
80045d8: 4a10 ldr r2, [pc, #64] @ (800461c <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
80045da: 4293 cmp r3, r2
80045dc: d10c bne.n 80045f8 <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
80045de: 68bb ldr r3, [r7, #8]
80045e0: f023 0380 bic.w r3, r3, #128 @ 0x80
80045e4: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
80045e6: 683b ldr r3, [r7, #0]
80045e8: 685b ldr r3, [r3, #4]
80045ea: 68ba ldr r2, [r7, #8]
80045ec: 4313 orrs r3, r2
80045ee: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80045f0: 687b ldr r3, [r7, #4]
80045f2: 681b ldr r3, [r3, #0]
80045f4: 68ba ldr r2, [r7, #8]
80045f6: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
80045f8: 687b ldr r3, [r7, #4]
80045fa: 2201 movs r2, #1
80045fc: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8004600: 687b ldr r3, [r7, #4]
8004602: 2200 movs r2, #0
8004604: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
8004608: 2300 movs r3, #0
}
800460a: 4618 mov r0, r3
800460c: 3714 adds r7, #20
800460e: 46bd mov sp, r7
8004610: bc80 pop {r7}
8004612: 4770 bx lr
8004614: 40012c00 .word 0x40012c00
8004618: 40000400 .word 0x40000400
800461c: 40000800 .word 0x40000800
08004620 <HAL_TIMEx_ConfigBreakDeadTime>:
* interrupt can be enabled by calling the @ref __HAL_TIM_ENABLE_IT macro.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
const TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
{
8004620: b480 push {r7}
8004622: b085 sub sp, #20
8004624: af00 add r7, sp, #0
8004626: 6078 str r0, [r7, #4]
8004628: 6039 str r1, [r7, #0]
/* Keep this variable initialized to 0 as it is used to configure BDTR register */
uint32_t tmpbdtr = 0U;
800462a: 2300 movs r3, #0
800462c: 60fb str r3, [r7, #12]
assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
/* Check input state */
__HAL_LOCK(htim);
800462e: 687b ldr r3, [r7, #4]
8004630: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8004634: 2b01 cmp r3, #1
8004636: d101 bne.n 800463c <HAL_TIMEx_ConfigBreakDeadTime+0x1c>
8004638: 2302 movs r3, #2
800463a: e03d b.n 80046b8 <HAL_TIMEx_ConfigBreakDeadTime+0x98>
800463c: 687b ldr r3, [r7, #4]
800463e: 2201 movs r2, #1
8004640: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
the OSSI State, the dead time value and the Automatic Output Enable Bit */
/* Set the BDTR bits */
MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
8004644: 68fb ldr r3, [r7, #12]
8004646: f023 02ff bic.w r2, r3, #255 @ 0xff
800464a: 683b ldr r3, [r7, #0]
800464c: 68db ldr r3, [r3, #12]
800464e: 4313 orrs r3, r2
8004650: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
8004652: 68fb ldr r3, [r7, #12]
8004654: f423 7240 bic.w r2, r3, #768 @ 0x300
8004658: 683b ldr r3, [r7, #0]
800465a: 689b ldr r3, [r3, #8]
800465c: 4313 orrs r3, r2
800465e: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
8004660: 68fb ldr r3, [r7, #12]
8004662: f423 6280 bic.w r2, r3, #1024 @ 0x400
8004666: 683b ldr r3, [r7, #0]
8004668: 685b ldr r3, [r3, #4]
800466a: 4313 orrs r3, r2
800466c: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
800466e: 68fb ldr r3, [r7, #12]
8004670: f423 6200 bic.w r2, r3, #2048 @ 0x800
8004674: 683b ldr r3, [r7, #0]
8004676: 681b ldr r3, [r3, #0]
8004678: 4313 orrs r3, r2
800467a: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
800467c: 68fb ldr r3, [r7, #12]
800467e: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8004682: 683b ldr r3, [r7, #0]
8004684: 691b ldr r3, [r3, #16]
8004686: 4313 orrs r3, r2
8004688: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
800468a: 68fb ldr r3, [r7, #12]
800468c: f423 5200 bic.w r2, r3, #8192 @ 0x2000
8004690: 683b ldr r3, [r7, #0]
8004692: 695b ldr r3, [r3, #20]
8004694: 4313 orrs r3, r2
8004696: 60fb str r3, [r7, #12]
MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
8004698: 68fb ldr r3, [r7, #12]
800469a: f423 4280 bic.w r2, r3, #16384 @ 0x4000
800469e: 683b ldr r3, [r7, #0]
80046a0: 69db ldr r3, [r3, #28]
80046a2: 4313 orrs r3, r2
80046a4: 60fb str r3, [r7, #12]
/* Set TIMx_BDTR */
htim->Instance->BDTR = tmpbdtr;
80046a6: 687b ldr r3, [r7, #4]
80046a8: 681b ldr r3, [r3, #0]
80046aa: 68fa ldr r2, [r7, #12]
80046ac: 645a str r2, [r3, #68] @ 0x44
__HAL_UNLOCK(htim);
80046ae: 687b ldr r3, [r7, #4]
80046b0: 2200 movs r2, #0
80046b2: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
80046b6: 2300 movs r3, #0
}
80046b8: 4618 mov r0, r3
80046ba: 3714 adds r7, #20
80046bc: 46bd mov sp, r7
80046be: bc80 pop {r7}
80046c0: 4770 bx lr
080046c2 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
80046c2: b480 push {r7}
80046c4: b085 sub sp, #20
80046c6: af00 add r7, sp, #0
80046c8: 60f8 str r0, [r7, #12]
80046ca: 4638 mov r0, r7
80046cc: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80046d0: 2300 movs r3, #0
}
80046d2: 4618 mov r0, r3
80046d4: 3714 adds r7, #20
80046d6: 46bd mov sp, r7
80046d8: bc80 pop {r7}
80046da: 4770 bx lr
080046dc <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
80046dc: b480 push {r7}
80046de: b085 sub sp, #20
80046e0: af00 add r7, sp, #0
80046e2: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
80046e4: 687b ldr r3, [r7, #4]
80046e6: 2200 movs r2, #0
80046e8: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
80046ec: f44f 433f mov.w r3, #48896 @ 0xbf00
80046f0: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
80046f2: 68fb ldr r3, [r7, #12]
80046f4: b29a uxth r2, r3
80046f6: 687b ldr r3, [r7, #4]
80046f8: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
80046fc: 2300 movs r3, #0
}
80046fe: 4618 mov r0, r3
8004700: 3714 adds r7, #20
8004702: 46bd mov sp, r7
8004704: bc80 pop {r7}
8004706: 4770 bx lr
08004708 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8004708: b480 push {r7}
800470a: b085 sub sp, #20
800470c: af00 add r7, sp, #0
800470e: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8004710: f44f 433f mov.w r3, #48896 @ 0xbf00
8004714: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8004716: 687b ldr r3, [r7, #4]
8004718: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800471c: b29a uxth r2, r3
800471e: 68fb ldr r3, [r7, #12]
8004720: b29b uxth r3, r3
8004722: 43db mvns r3, r3
8004724: b29b uxth r3, r3
8004726: 4013 ands r3, r2
8004728: b29a uxth r2, r3
800472a: 687b ldr r3, [r7, #4]
800472c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8004730: 2300 movs r3, #0
}
8004732: 4618 mov r0, r3
8004734: 3714 adds r7, #20
8004736: 46bd mov sp, r7
8004738: bc80 pop {r7}
800473a: 4770 bx lr
0800473c <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
800473c: b480 push {r7}
800473e: b083 sub sp, #12
8004740: af00 add r7, sp, #0
8004742: 6078 str r0, [r7, #4]
8004744: 460b mov r3, r1
8004746: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8004748: 2300 movs r3, #0
}
800474a: 4618 mov r0, r3
800474c: 370c adds r7, #12
800474e: 46bd mov sp, r7
8004750: bc80 pop {r7}
8004752: 4770 bx lr
08004754 <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8004754: b480 push {r7}
8004756: b085 sub sp, #20
8004758: af00 add r7, sp, #0
800475a: 60f8 str r0, [r7, #12]
800475c: 4638 mov r0, r7
800475e: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8004762: 68fb ldr r3, [r7, #12]
8004764: 2201 movs r2, #1
8004766: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
800476a: 68fb ldr r3, [r7, #12]
800476c: 2200 movs r2, #0
800476e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8004772: 68fb ldr r3, [r7, #12]
8004774: 2200 movs r2, #0
8004776: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
800477a: 68fb ldr r3, [r7, #12]
800477c: 2200 movs r2, #0
800477e: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8004782: 2300 movs r3, #0
}
8004784: 4618 mov r0, r3
8004786: 3714 adds r7, #20
8004788: 46bd mov sp, r7
800478a: bc80 pop {r7}
800478c: 4770 bx lr
...
08004790 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8004790: b480 push {r7}
8004792: b09d sub sp, #116 @ 0x74
8004794: af00 add r7, sp, #0
8004796: 6078 str r0, [r7, #4]
8004798: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
800479a: 2300 movs r3, #0
800479c: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
80047a0: 687a ldr r2, [r7, #4]
80047a2: 683b ldr r3, [r7, #0]
80047a4: 781b ldrb r3, [r3, #0]
80047a6: 009b lsls r3, r3, #2
80047a8: 4413 add r3, r2
80047aa: 881b ldrh r3, [r3, #0]
80047ac: b29b uxth r3, r3
80047ae: f423 43ec bic.w r3, r3, #30208 @ 0x7600
80047b2: f023 0370 bic.w r3, r3, #112 @ 0x70
80047b6: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
80047ba: 683b ldr r3, [r7, #0]
80047bc: 78db ldrb r3, [r3, #3]
80047be: 2b03 cmp r3, #3
80047c0: d81f bhi.n 8004802 <USB_ActivateEndpoint+0x72>
80047c2: a201 add r2, pc, #4 @ (adr r2, 80047c8 <USB_ActivateEndpoint+0x38>)
80047c4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80047c8: 080047d9 .word 0x080047d9
80047cc: 080047f5 .word 0x080047f5
80047d0: 0800480b .word 0x0800480b
80047d4: 080047e7 .word 0x080047e7
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
80047d8: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
80047dc: f443 7300 orr.w r3, r3, #512 @ 0x200
80047e0: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
80047e4: e012 b.n 800480c <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
80047e6: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
80047ea: f443 63c0 orr.w r3, r3, #1536 @ 0x600
80047ee: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
80047f2: e00b b.n 800480c <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
80047f4: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
80047f8: f443 6380 orr.w r3, r3, #1024 @ 0x400
80047fc: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8004800: e004 b.n 800480c <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
8004802: 2301 movs r3, #1
8004804: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8004808: e000 b.n 800480c <USB_ActivateEndpoint+0x7c>
break;
800480a: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
800480c: 687a ldr r2, [r7, #4]
800480e: 683b ldr r3, [r7, #0]
8004810: 781b ldrb r3, [r3, #0]
8004812: 009b lsls r3, r3, #2
8004814: 441a add r2, r3
8004816: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
800481a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800481e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004822: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004826: f043 0380 orr.w r3, r3, #128 @ 0x80
800482a: b29b uxth r3, r3
800482c: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
800482e: 687a ldr r2, [r7, #4]
8004830: 683b ldr r3, [r7, #0]
8004832: 781b ldrb r3, [r3, #0]
8004834: 009b lsls r3, r3, #2
8004836: 4413 add r3, r2
8004838: 881b ldrh r3, [r3, #0]
800483a: b29b uxth r3, r3
800483c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004840: f023 0370 bic.w r3, r3, #112 @ 0x70
8004844: b29b uxth r3, r3
8004846: 683a ldr r2, [r7, #0]
8004848: 7812 ldrb r2, [r2, #0]
800484a: 4313 orrs r3, r2
800484c: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
8004850: 687a ldr r2, [r7, #4]
8004852: 683b ldr r3, [r7, #0]
8004854: 781b ldrb r3, [r3, #0]
8004856: 009b lsls r3, r3, #2
8004858: 441a add r2, r3
800485a: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
800485e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004862: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004866: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800486a: f043 0380 orr.w r3, r3, #128 @ 0x80
800486e: b29b uxth r3, r3
8004870: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
8004872: 683b ldr r3, [r7, #0]
8004874: 7b1b ldrb r3, [r3, #12]
8004876: 2b00 cmp r3, #0
8004878: f040 8178 bne.w 8004b6c <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
800487c: 683b ldr r3, [r7, #0]
800487e: 785b ldrb r3, [r3, #1]
8004880: 2b00 cmp r3, #0
8004882: f000 8084 beq.w 800498e <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8004886: 687b ldr r3, [r7, #4]
8004888: 61bb str r3, [r7, #24]
800488a: 687b ldr r3, [r7, #4]
800488c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004890: b29b uxth r3, r3
8004892: 461a mov r2, r3
8004894: 69bb ldr r3, [r7, #24]
8004896: 4413 add r3, r2
8004898: 61bb str r3, [r7, #24]
800489a: 683b ldr r3, [r7, #0]
800489c: 781b ldrb r3, [r3, #0]
800489e: 011a lsls r2, r3, #4
80048a0: 69bb ldr r3, [r7, #24]
80048a2: 4413 add r3, r2
80048a4: f503 6380 add.w r3, r3, #1024 @ 0x400
80048a8: 617b str r3, [r7, #20]
80048aa: 683b ldr r3, [r7, #0]
80048ac: 88db ldrh r3, [r3, #6]
80048ae: 085b lsrs r3, r3, #1
80048b0: b29b uxth r3, r3
80048b2: 005b lsls r3, r3, #1
80048b4: b29a uxth r2, r3
80048b6: 697b ldr r3, [r7, #20]
80048b8: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80048ba: 687a ldr r2, [r7, #4]
80048bc: 683b ldr r3, [r7, #0]
80048be: 781b ldrb r3, [r3, #0]
80048c0: 009b lsls r3, r3, #2
80048c2: 4413 add r3, r2
80048c4: 881b ldrh r3, [r3, #0]
80048c6: 827b strh r3, [r7, #18]
80048c8: 8a7b ldrh r3, [r7, #18]
80048ca: f003 0340 and.w r3, r3, #64 @ 0x40
80048ce: 2b00 cmp r3, #0
80048d0: d01b beq.n 800490a <USB_ActivateEndpoint+0x17a>
80048d2: 687a ldr r2, [r7, #4]
80048d4: 683b ldr r3, [r7, #0]
80048d6: 781b ldrb r3, [r3, #0]
80048d8: 009b lsls r3, r3, #2
80048da: 4413 add r3, r2
80048dc: 881b ldrh r3, [r3, #0]
80048de: b29b uxth r3, r3
80048e0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80048e4: f023 0370 bic.w r3, r3, #112 @ 0x70
80048e8: 823b strh r3, [r7, #16]
80048ea: 687a ldr r2, [r7, #4]
80048ec: 683b ldr r3, [r7, #0]
80048ee: 781b ldrb r3, [r3, #0]
80048f0: 009b lsls r3, r3, #2
80048f2: 441a add r2, r3
80048f4: 8a3b ldrh r3, [r7, #16]
80048f6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80048fa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80048fe: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004902: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004906: b29b uxth r3, r3
8004908: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800490a: 683b ldr r3, [r7, #0]
800490c: 78db ldrb r3, [r3, #3]
800490e: 2b01 cmp r3, #1
8004910: d020 beq.n 8004954 <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8004912: 687a ldr r2, [r7, #4]
8004914: 683b ldr r3, [r7, #0]
8004916: 781b ldrb r3, [r3, #0]
8004918: 009b lsls r3, r3, #2
800491a: 4413 add r3, r2
800491c: 881b ldrh r3, [r3, #0]
800491e: b29b uxth r3, r3
8004920: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004924: f023 0340 bic.w r3, r3, #64 @ 0x40
8004928: 81bb strh r3, [r7, #12]
800492a: 89bb ldrh r3, [r7, #12]
800492c: f083 0320 eor.w r3, r3, #32
8004930: 81bb strh r3, [r7, #12]
8004932: 687a ldr r2, [r7, #4]
8004934: 683b ldr r3, [r7, #0]
8004936: 781b ldrb r3, [r3, #0]
8004938: 009b lsls r3, r3, #2
800493a: 441a add r2, r3
800493c: 89bb ldrh r3, [r7, #12]
800493e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004942: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004946: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800494a: f043 0380 orr.w r3, r3, #128 @ 0x80
800494e: b29b uxth r3, r3
8004950: 8013 strh r3, [r2, #0]
8004952: e2d5 b.n 8004f00 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004954: 687a ldr r2, [r7, #4]
8004956: 683b ldr r3, [r7, #0]
8004958: 781b ldrb r3, [r3, #0]
800495a: 009b lsls r3, r3, #2
800495c: 4413 add r3, r2
800495e: 881b ldrh r3, [r3, #0]
8004960: b29b uxth r3, r3
8004962: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004966: f023 0340 bic.w r3, r3, #64 @ 0x40
800496a: 81fb strh r3, [r7, #14]
800496c: 687a ldr r2, [r7, #4]
800496e: 683b ldr r3, [r7, #0]
8004970: 781b ldrb r3, [r3, #0]
8004972: 009b lsls r3, r3, #2
8004974: 441a add r2, r3
8004976: 89fb ldrh r3, [r7, #14]
8004978: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800497c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004980: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004984: f043 0380 orr.w r3, r3, #128 @ 0x80
8004988: b29b uxth r3, r3
800498a: 8013 strh r3, [r2, #0]
800498c: e2b8 b.n 8004f00 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
800498e: 687b ldr r3, [r7, #4]
8004990: 633b str r3, [r7, #48] @ 0x30
8004992: 687b ldr r3, [r7, #4]
8004994: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004998: b29b uxth r3, r3
800499a: 461a mov r2, r3
800499c: 6b3b ldr r3, [r7, #48] @ 0x30
800499e: 4413 add r3, r2
80049a0: 633b str r3, [r7, #48] @ 0x30
80049a2: 683b ldr r3, [r7, #0]
80049a4: 781b ldrb r3, [r3, #0]
80049a6: 011a lsls r2, r3, #4
80049a8: 6b3b ldr r3, [r7, #48] @ 0x30
80049aa: 4413 add r3, r2
80049ac: f503 6381 add.w r3, r3, #1032 @ 0x408
80049b0: 62fb str r3, [r7, #44] @ 0x2c
80049b2: 683b ldr r3, [r7, #0]
80049b4: 88db ldrh r3, [r3, #6]
80049b6: 085b lsrs r3, r3, #1
80049b8: b29b uxth r3, r3
80049ba: 005b lsls r3, r3, #1
80049bc: b29a uxth r2, r3
80049be: 6afb ldr r3, [r7, #44] @ 0x2c
80049c0: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
80049c2: 687b ldr r3, [r7, #4]
80049c4: 62bb str r3, [r7, #40] @ 0x28
80049c6: 687b ldr r3, [r7, #4]
80049c8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80049cc: b29b uxth r3, r3
80049ce: 461a mov r2, r3
80049d0: 6abb ldr r3, [r7, #40] @ 0x28
80049d2: 4413 add r3, r2
80049d4: 62bb str r3, [r7, #40] @ 0x28
80049d6: 683b ldr r3, [r7, #0]
80049d8: 781b ldrb r3, [r3, #0]
80049da: 011a lsls r2, r3, #4
80049dc: 6abb ldr r3, [r7, #40] @ 0x28
80049de: 4413 add r3, r2
80049e0: f203 430c addw r3, r3, #1036 @ 0x40c
80049e4: 627b str r3, [r7, #36] @ 0x24
80049e6: 6a7b ldr r3, [r7, #36] @ 0x24
80049e8: 881b ldrh r3, [r3, #0]
80049ea: b29b uxth r3, r3
80049ec: f3c3 0309 ubfx r3, r3, #0, #10
80049f0: b29a uxth r2, r3
80049f2: 6a7b ldr r3, [r7, #36] @ 0x24
80049f4: 801a strh r2, [r3, #0]
80049f6: 683b ldr r3, [r7, #0]
80049f8: 691b ldr r3, [r3, #16]
80049fa: 2b3e cmp r3, #62 @ 0x3e
80049fc: d91d bls.n 8004a3a <USB_ActivateEndpoint+0x2aa>
80049fe: 683b ldr r3, [r7, #0]
8004a00: 691b ldr r3, [r3, #16]
8004a02: 095b lsrs r3, r3, #5
8004a04: 66bb str r3, [r7, #104] @ 0x68
8004a06: 683b ldr r3, [r7, #0]
8004a08: 691b ldr r3, [r3, #16]
8004a0a: f003 031f and.w r3, r3, #31
8004a0e: 2b00 cmp r3, #0
8004a10: d102 bne.n 8004a18 <USB_ActivateEndpoint+0x288>
8004a12: 6ebb ldr r3, [r7, #104] @ 0x68
8004a14: 3b01 subs r3, #1
8004a16: 66bb str r3, [r7, #104] @ 0x68
8004a18: 6a7b ldr r3, [r7, #36] @ 0x24
8004a1a: 881b ldrh r3, [r3, #0]
8004a1c: b29a uxth r2, r3
8004a1e: 6ebb ldr r3, [r7, #104] @ 0x68
8004a20: b29b uxth r3, r3
8004a22: 029b lsls r3, r3, #10
8004a24: b29b uxth r3, r3
8004a26: 4313 orrs r3, r2
8004a28: b29b uxth r3, r3
8004a2a: ea6f 4343 mvn.w r3, r3, lsl #17
8004a2e: ea6f 4353 mvn.w r3, r3, lsr #17
8004a32: b29a uxth r2, r3
8004a34: 6a7b ldr r3, [r7, #36] @ 0x24
8004a36: 801a strh r2, [r3, #0]
8004a38: e026 b.n 8004a88 <USB_ActivateEndpoint+0x2f8>
8004a3a: 683b ldr r3, [r7, #0]
8004a3c: 691b ldr r3, [r3, #16]
8004a3e: 2b00 cmp r3, #0
8004a40: d10a bne.n 8004a58 <USB_ActivateEndpoint+0x2c8>
8004a42: 6a7b ldr r3, [r7, #36] @ 0x24
8004a44: 881b ldrh r3, [r3, #0]
8004a46: b29b uxth r3, r3
8004a48: ea6f 4343 mvn.w r3, r3, lsl #17
8004a4c: ea6f 4353 mvn.w r3, r3, lsr #17
8004a50: b29a uxth r2, r3
8004a52: 6a7b ldr r3, [r7, #36] @ 0x24
8004a54: 801a strh r2, [r3, #0]
8004a56: e017 b.n 8004a88 <USB_ActivateEndpoint+0x2f8>
8004a58: 683b ldr r3, [r7, #0]
8004a5a: 691b ldr r3, [r3, #16]
8004a5c: 085b lsrs r3, r3, #1
8004a5e: 66bb str r3, [r7, #104] @ 0x68
8004a60: 683b ldr r3, [r7, #0]
8004a62: 691b ldr r3, [r3, #16]
8004a64: f003 0301 and.w r3, r3, #1
8004a68: 2b00 cmp r3, #0
8004a6a: d002 beq.n 8004a72 <USB_ActivateEndpoint+0x2e2>
8004a6c: 6ebb ldr r3, [r7, #104] @ 0x68
8004a6e: 3301 adds r3, #1
8004a70: 66bb str r3, [r7, #104] @ 0x68
8004a72: 6a7b ldr r3, [r7, #36] @ 0x24
8004a74: 881b ldrh r3, [r3, #0]
8004a76: b29a uxth r2, r3
8004a78: 6ebb ldr r3, [r7, #104] @ 0x68
8004a7a: b29b uxth r3, r3
8004a7c: 029b lsls r3, r3, #10
8004a7e: b29b uxth r3, r3
8004a80: 4313 orrs r3, r2
8004a82: b29a uxth r2, r3
8004a84: 6a7b ldr r3, [r7, #36] @ 0x24
8004a86: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004a88: 687a ldr r2, [r7, #4]
8004a8a: 683b ldr r3, [r7, #0]
8004a8c: 781b ldrb r3, [r3, #0]
8004a8e: 009b lsls r3, r3, #2
8004a90: 4413 add r3, r2
8004a92: 881b ldrh r3, [r3, #0]
8004a94: 847b strh r3, [r7, #34] @ 0x22
8004a96: 8c7b ldrh r3, [r7, #34] @ 0x22
8004a98: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004a9c: 2b00 cmp r3, #0
8004a9e: d01b beq.n 8004ad8 <USB_ActivateEndpoint+0x348>
8004aa0: 687a ldr r2, [r7, #4]
8004aa2: 683b ldr r3, [r7, #0]
8004aa4: 781b ldrb r3, [r3, #0]
8004aa6: 009b lsls r3, r3, #2
8004aa8: 4413 add r3, r2
8004aaa: 881b ldrh r3, [r3, #0]
8004aac: b29b uxth r3, r3
8004aae: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004ab2: f023 0370 bic.w r3, r3, #112 @ 0x70
8004ab6: 843b strh r3, [r7, #32]
8004ab8: 687a ldr r2, [r7, #4]
8004aba: 683b ldr r3, [r7, #0]
8004abc: 781b ldrb r3, [r3, #0]
8004abe: 009b lsls r3, r3, #2
8004ac0: 441a add r2, r3
8004ac2: 8c3b ldrh r3, [r7, #32]
8004ac4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004ac8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004acc: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004ad0: f043 0380 orr.w r3, r3, #128 @ 0x80
8004ad4: b29b uxth r3, r3
8004ad6: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
8004ad8: 683b ldr r3, [r7, #0]
8004ada: 781b ldrb r3, [r3, #0]
8004adc: 2b00 cmp r3, #0
8004ade: d124 bne.n 8004b2a <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8004ae0: 687a ldr r2, [r7, #4]
8004ae2: 683b ldr r3, [r7, #0]
8004ae4: 781b ldrb r3, [r3, #0]
8004ae6: 009b lsls r3, r3, #2
8004ae8: 4413 add r3, r2
8004aea: 881b ldrh r3, [r3, #0]
8004aec: b29b uxth r3, r3
8004aee: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004af2: f023 0370 bic.w r3, r3, #112 @ 0x70
8004af6: 83bb strh r3, [r7, #28]
8004af8: 8bbb ldrh r3, [r7, #28]
8004afa: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8004afe: 83bb strh r3, [r7, #28]
8004b00: 8bbb ldrh r3, [r7, #28]
8004b02: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8004b06: 83bb strh r3, [r7, #28]
8004b08: 687a ldr r2, [r7, #4]
8004b0a: 683b ldr r3, [r7, #0]
8004b0c: 781b ldrb r3, [r3, #0]
8004b0e: 009b lsls r3, r3, #2
8004b10: 441a add r2, r3
8004b12: 8bbb ldrh r3, [r7, #28]
8004b14: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004b18: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004b1c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004b20: f043 0380 orr.w r3, r3, #128 @ 0x80
8004b24: b29b uxth r3, r3
8004b26: 8013 strh r3, [r2, #0]
8004b28: e1ea b.n 8004f00 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
8004b2a: 687a ldr r2, [r7, #4]
8004b2c: 683b ldr r3, [r7, #0]
8004b2e: 781b ldrb r3, [r3, #0]
8004b30: 009b lsls r3, r3, #2
8004b32: 4413 add r3, r2
8004b34: 881b ldrh r3, [r3, #0]
8004b36: b29b uxth r3, r3
8004b38: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004b3c: f023 0370 bic.w r3, r3, #112 @ 0x70
8004b40: 83fb strh r3, [r7, #30]
8004b42: 8bfb ldrh r3, [r7, #30]
8004b44: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8004b48: 83fb strh r3, [r7, #30]
8004b4a: 687a ldr r2, [r7, #4]
8004b4c: 683b ldr r3, [r7, #0]
8004b4e: 781b ldrb r3, [r3, #0]
8004b50: 009b lsls r3, r3, #2
8004b52: 441a add r2, r3
8004b54: 8bfb ldrh r3, [r7, #30]
8004b56: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004b5a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004b5e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004b62: f043 0380 orr.w r3, r3, #128 @ 0x80
8004b66: b29b uxth r3, r3
8004b68: 8013 strh r3, [r2, #0]
8004b6a: e1c9 b.n 8004f00 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
8004b6c: 683b ldr r3, [r7, #0]
8004b6e: 78db ldrb r3, [r3, #3]
8004b70: 2b02 cmp r3, #2
8004b72: d11e bne.n 8004bb2 <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8004b74: 687a ldr r2, [r7, #4]
8004b76: 683b ldr r3, [r7, #0]
8004b78: 781b ldrb r3, [r3, #0]
8004b7a: 009b lsls r3, r3, #2
8004b7c: 4413 add r3, r2
8004b7e: 881b ldrh r3, [r3, #0]
8004b80: b29b uxth r3, r3
8004b82: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004b86: f023 0370 bic.w r3, r3, #112 @ 0x70
8004b8a: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
8004b8e: 687a ldr r2, [r7, #4]
8004b90: 683b ldr r3, [r7, #0]
8004b92: 781b ldrb r3, [r3, #0]
8004b94: 009b lsls r3, r3, #2
8004b96: 441a add r2, r3
8004b98: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8004b9c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004ba0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004ba4: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8004ba8: f043 0380 orr.w r3, r3, #128 @ 0x80
8004bac: b29b uxth r3, r3
8004bae: 8013 strh r3, [r2, #0]
8004bb0: e01d b.n 8004bee <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
8004bb2: 687a ldr r2, [r7, #4]
8004bb4: 683b ldr r3, [r7, #0]
8004bb6: 781b ldrb r3, [r3, #0]
8004bb8: 009b lsls r3, r3, #2
8004bba: 4413 add r3, r2
8004bbc: 881b ldrh r3, [r3, #0]
8004bbe: b29b uxth r3, r3
8004bc0: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8004bc4: f023 0370 bic.w r3, r3, #112 @ 0x70
8004bc8: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
8004bcc: 687a ldr r2, [r7, #4]
8004bce: 683b ldr r3, [r7, #0]
8004bd0: 781b ldrb r3, [r3, #0]
8004bd2: 009b lsls r3, r3, #2
8004bd4: 441a add r2, r3
8004bd6: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
8004bda: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004bde: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004be2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004be6: f043 0380 orr.w r3, r3, #128 @ 0x80
8004bea: b29b uxth r3, r3
8004bec: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
8004bee: 687b ldr r3, [r7, #4]
8004bf0: 65fb str r3, [r7, #92] @ 0x5c
8004bf2: 687b ldr r3, [r7, #4]
8004bf4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004bf8: b29b uxth r3, r3
8004bfa: 461a mov r2, r3
8004bfc: 6dfb ldr r3, [r7, #92] @ 0x5c
8004bfe: 4413 add r3, r2
8004c00: 65fb str r3, [r7, #92] @ 0x5c
8004c02: 683b ldr r3, [r7, #0]
8004c04: 781b ldrb r3, [r3, #0]
8004c06: 011a lsls r2, r3, #4
8004c08: 6dfb ldr r3, [r7, #92] @ 0x5c
8004c0a: 4413 add r3, r2
8004c0c: f503 6380 add.w r3, r3, #1024 @ 0x400
8004c10: 65bb str r3, [r7, #88] @ 0x58
8004c12: 683b ldr r3, [r7, #0]
8004c14: 891b ldrh r3, [r3, #8]
8004c16: 085b lsrs r3, r3, #1
8004c18: b29b uxth r3, r3
8004c1a: 005b lsls r3, r3, #1
8004c1c: b29a uxth r2, r3
8004c1e: 6dbb ldr r3, [r7, #88] @ 0x58
8004c20: 801a strh r2, [r3, #0]
8004c22: 687b ldr r3, [r7, #4]
8004c24: 657b str r3, [r7, #84] @ 0x54
8004c26: 687b ldr r3, [r7, #4]
8004c28: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004c2c: b29b uxth r3, r3
8004c2e: 461a mov r2, r3
8004c30: 6d7b ldr r3, [r7, #84] @ 0x54
8004c32: 4413 add r3, r2
8004c34: 657b str r3, [r7, #84] @ 0x54
8004c36: 683b ldr r3, [r7, #0]
8004c38: 781b ldrb r3, [r3, #0]
8004c3a: 011a lsls r2, r3, #4
8004c3c: 6d7b ldr r3, [r7, #84] @ 0x54
8004c3e: 4413 add r3, r2
8004c40: f503 6381 add.w r3, r3, #1032 @ 0x408
8004c44: 653b str r3, [r7, #80] @ 0x50
8004c46: 683b ldr r3, [r7, #0]
8004c48: 895b ldrh r3, [r3, #10]
8004c4a: 085b lsrs r3, r3, #1
8004c4c: b29b uxth r3, r3
8004c4e: 005b lsls r3, r3, #1
8004c50: b29a uxth r2, r3
8004c52: 6d3b ldr r3, [r7, #80] @ 0x50
8004c54: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
8004c56: 683b ldr r3, [r7, #0]
8004c58: 785b ldrb r3, [r3, #1]
8004c5a: 2b00 cmp r3, #0
8004c5c: f040 8093 bne.w 8004d86 <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004c60: 687a ldr r2, [r7, #4]
8004c62: 683b ldr r3, [r7, #0]
8004c64: 781b ldrb r3, [r3, #0]
8004c66: 009b lsls r3, r3, #2
8004c68: 4413 add r3, r2
8004c6a: 881b ldrh r3, [r3, #0]
8004c6c: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
8004c70: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8004c74: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004c78: 2b00 cmp r3, #0
8004c7a: d01b beq.n 8004cb4 <USB_ActivateEndpoint+0x524>
8004c7c: 687a ldr r2, [r7, #4]
8004c7e: 683b ldr r3, [r7, #0]
8004c80: 781b ldrb r3, [r3, #0]
8004c82: 009b lsls r3, r3, #2
8004c84: 4413 add r3, r2
8004c86: 881b ldrh r3, [r3, #0]
8004c88: b29b uxth r3, r3
8004c8a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004c8e: f023 0370 bic.w r3, r3, #112 @ 0x70
8004c92: 87fb strh r3, [r7, #62] @ 0x3e
8004c94: 687a ldr r2, [r7, #4]
8004c96: 683b ldr r3, [r7, #0]
8004c98: 781b ldrb r3, [r3, #0]
8004c9a: 009b lsls r3, r3, #2
8004c9c: 441a add r2, r3
8004c9e: 8ffb ldrh r3, [r7, #62] @ 0x3e
8004ca0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004ca4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004ca8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004cac: f043 0380 orr.w r3, r3, #128 @ 0x80
8004cb0: b29b uxth r3, r3
8004cb2: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8004cb4: 687a ldr r2, [r7, #4]
8004cb6: 683b ldr r3, [r7, #0]
8004cb8: 781b ldrb r3, [r3, #0]
8004cba: 009b lsls r3, r3, #2
8004cbc: 4413 add r3, r2
8004cbe: 881b ldrh r3, [r3, #0]
8004cc0: 87bb strh r3, [r7, #60] @ 0x3c
8004cc2: 8fbb ldrh r3, [r7, #60] @ 0x3c
8004cc4: f003 0340 and.w r3, r3, #64 @ 0x40
8004cc8: 2b00 cmp r3, #0
8004cca: d01b beq.n 8004d04 <USB_ActivateEndpoint+0x574>
8004ccc: 687a ldr r2, [r7, #4]
8004cce: 683b ldr r3, [r7, #0]
8004cd0: 781b ldrb r3, [r3, #0]
8004cd2: 009b lsls r3, r3, #2
8004cd4: 4413 add r3, r2
8004cd6: 881b ldrh r3, [r3, #0]
8004cd8: b29b uxth r3, r3
8004cda: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004cde: f023 0370 bic.w r3, r3, #112 @ 0x70
8004ce2: 877b strh r3, [r7, #58] @ 0x3a
8004ce4: 687a ldr r2, [r7, #4]
8004ce6: 683b ldr r3, [r7, #0]
8004ce8: 781b ldrb r3, [r3, #0]
8004cea: 009b lsls r3, r3, #2
8004cec: 441a add r2, r3
8004cee: 8f7b ldrh r3, [r7, #58] @ 0x3a
8004cf0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004cf4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004cf8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004cfc: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004d00: b29b uxth r3, r3
8004d02: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8004d04: 687a ldr r2, [r7, #4]
8004d06: 683b ldr r3, [r7, #0]
8004d08: 781b ldrb r3, [r3, #0]
8004d0a: 009b lsls r3, r3, #2
8004d0c: 4413 add r3, r2
8004d0e: 881b ldrh r3, [r3, #0]
8004d10: b29b uxth r3, r3
8004d12: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004d16: f023 0370 bic.w r3, r3, #112 @ 0x70
8004d1a: 873b strh r3, [r7, #56] @ 0x38
8004d1c: 8f3b ldrh r3, [r7, #56] @ 0x38
8004d1e: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8004d22: 873b strh r3, [r7, #56] @ 0x38
8004d24: 8f3b ldrh r3, [r7, #56] @ 0x38
8004d26: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8004d2a: 873b strh r3, [r7, #56] @ 0x38
8004d2c: 687a ldr r2, [r7, #4]
8004d2e: 683b ldr r3, [r7, #0]
8004d30: 781b ldrb r3, [r3, #0]
8004d32: 009b lsls r3, r3, #2
8004d34: 441a add r2, r3
8004d36: 8f3b ldrh r3, [r7, #56] @ 0x38
8004d38: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004d3c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004d40: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004d44: f043 0380 orr.w r3, r3, #128 @ 0x80
8004d48: b29b uxth r3, r3
8004d4a: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004d4c: 687a ldr r2, [r7, #4]
8004d4e: 683b ldr r3, [r7, #0]
8004d50: 781b ldrb r3, [r3, #0]
8004d52: 009b lsls r3, r3, #2
8004d54: 4413 add r3, r2
8004d56: 881b ldrh r3, [r3, #0]
8004d58: b29b uxth r3, r3
8004d5a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004d5e: f023 0340 bic.w r3, r3, #64 @ 0x40
8004d62: 86fb strh r3, [r7, #54] @ 0x36
8004d64: 687a ldr r2, [r7, #4]
8004d66: 683b ldr r3, [r7, #0]
8004d68: 781b ldrb r3, [r3, #0]
8004d6a: 009b lsls r3, r3, #2
8004d6c: 441a add r2, r3
8004d6e: 8efb ldrh r3, [r7, #54] @ 0x36
8004d70: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004d74: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004d78: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004d7c: f043 0380 orr.w r3, r3, #128 @ 0x80
8004d80: b29b uxth r3, r3
8004d82: 8013 strh r3, [r2, #0]
8004d84: e0bc b.n 8004f00 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004d86: 687a ldr r2, [r7, #4]
8004d88: 683b ldr r3, [r7, #0]
8004d8a: 781b ldrb r3, [r3, #0]
8004d8c: 009b lsls r3, r3, #2
8004d8e: 4413 add r3, r2
8004d90: 881b ldrh r3, [r3, #0]
8004d92: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8004d96: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8004d9a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004d9e: 2b00 cmp r3, #0
8004da0: d01d beq.n 8004dde <USB_ActivateEndpoint+0x64e>
8004da2: 687a ldr r2, [r7, #4]
8004da4: 683b ldr r3, [r7, #0]
8004da6: 781b ldrb r3, [r3, #0]
8004da8: 009b lsls r3, r3, #2
8004daa: 4413 add r3, r2
8004dac: 881b ldrh r3, [r3, #0]
8004dae: b29b uxth r3, r3
8004db0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004db4: f023 0370 bic.w r3, r3, #112 @ 0x70
8004db8: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
8004dbc: 687a ldr r2, [r7, #4]
8004dbe: 683b ldr r3, [r7, #0]
8004dc0: 781b ldrb r3, [r3, #0]
8004dc2: 009b lsls r3, r3, #2
8004dc4: 441a add r2, r3
8004dc6: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
8004dca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004dce: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004dd2: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004dd6: f043 0380 orr.w r3, r3, #128 @ 0x80
8004dda: b29b uxth r3, r3
8004ddc: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8004dde: 687a ldr r2, [r7, #4]
8004de0: 683b ldr r3, [r7, #0]
8004de2: 781b ldrb r3, [r3, #0]
8004de4: 009b lsls r3, r3, #2
8004de6: 4413 add r3, r2
8004de8: 881b ldrh r3, [r3, #0]
8004dea: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
8004dee: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8004df2: f003 0340 and.w r3, r3, #64 @ 0x40
8004df6: 2b00 cmp r3, #0
8004df8: d01d beq.n 8004e36 <USB_ActivateEndpoint+0x6a6>
8004dfa: 687a ldr r2, [r7, #4]
8004dfc: 683b ldr r3, [r7, #0]
8004dfe: 781b ldrb r3, [r3, #0]
8004e00: 009b lsls r3, r3, #2
8004e02: 4413 add r3, r2
8004e04: 881b ldrh r3, [r3, #0]
8004e06: b29b uxth r3, r3
8004e08: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004e0c: f023 0370 bic.w r3, r3, #112 @ 0x70
8004e10: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8004e14: 687a ldr r2, [r7, #4]
8004e16: 683b ldr r3, [r7, #0]
8004e18: 781b ldrb r3, [r3, #0]
8004e1a: 009b lsls r3, r3, #2
8004e1c: 441a add r2, r3
8004e1e: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
8004e22: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004e26: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004e2a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004e2e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004e32: b29b uxth r3, r3
8004e34: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8004e36: 683b ldr r3, [r7, #0]
8004e38: 78db ldrb r3, [r3, #3]
8004e3a: 2b01 cmp r3, #1
8004e3c: d024 beq.n 8004e88 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8004e3e: 687a ldr r2, [r7, #4]
8004e40: 683b ldr r3, [r7, #0]
8004e42: 781b ldrb r3, [r3, #0]
8004e44: 009b lsls r3, r3, #2
8004e46: 4413 add r3, r2
8004e48: 881b ldrh r3, [r3, #0]
8004e4a: b29b uxth r3, r3
8004e4c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004e50: f023 0340 bic.w r3, r3, #64 @ 0x40
8004e54: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8004e58: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8004e5c: f083 0320 eor.w r3, r3, #32
8004e60: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8004e64: 687a ldr r2, [r7, #4]
8004e66: 683b ldr r3, [r7, #0]
8004e68: 781b ldrb r3, [r3, #0]
8004e6a: 009b lsls r3, r3, #2
8004e6c: 441a add r2, r3
8004e6e: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8004e72: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004e76: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004e7a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004e7e: f043 0380 orr.w r3, r3, #128 @ 0x80
8004e82: b29b uxth r3, r3
8004e84: 8013 strh r3, [r2, #0]
8004e86: e01d b.n 8004ec4 <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004e88: 687a ldr r2, [r7, #4]
8004e8a: 683b ldr r3, [r7, #0]
8004e8c: 781b ldrb r3, [r3, #0]
8004e8e: 009b lsls r3, r3, #2
8004e90: 4413 add r3, r2
8004e92: 881b ldrh r3, [r3, #0]
8004e94: b29b uxth r3, r3
8004e96: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004e9a: f023 0340 bic.w r3, r3, #64 @ 0x40
8004e9e: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
8004ea2: 687a ldr r2, [r7, #4]
8004ea4: 683b ldr r3, [r7, #0]
8004ea6: 781b ldrb r3, [r3, #0]
8004ea8: 009b lsls r3, r3, #2
8004eaa: 441a add r2, r3
8004eac: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8004eb0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004eb4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004eb8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004ebc: f043 0380 orr.w r3, r3, #128 @ 0x80
8004ec0: b29b uxth r3, r3
8004ec2: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8004ec4: 687a ldr r2, [r7, #4]
8004ec6: 683b ldr r3, [r7, #0]
8004ec8: 781b ldrb r3, [r3, #0]
8004eca: 009b lsls r3, r3, #2
8004ecc: 4413 add r3, r2
8004ece: 881b ldrh r3, [r3, #0]
8004ed0: b29b uxth r3, r3
8004ed2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004ed6: f023 0370 bic.w r3, r3, #112 @ 0x70
8004eda: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
8004ede: 687a ldr r2, [r7, #4]
8004ee0: 683b ldr r3, [r7, #0]
8004ee2: 781b ldrb r3, [r3, #0]
8004ee4: 009b lsls r3, r3, #2
8004ee6: 441a add r2, r3
8004ee8: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8004eec: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004ef0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004ef4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004ef8: f043 0380 orr.w r3, r3, #128 @ 0x80
8004efc: b29b uxth r3, r3
8004efe: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
8004f00: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
8004f04: 4618 mov r0, r3
8004f06: 3774 adds r7, #116 @ 0x74
8004f08: 46bd mov sp, r7
8004f0a: bc80 pop {r7}
8004f0c: 4770 bx lr
8004f0e: bf00 nop
08004f10 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8004f10: b480 push {r7}
8004f12: b08d sub sp, #52 @ 0x34
8004f14: af00 add r7, sp, #0
8004f16: 6078 str r0, [r7, #4]
8004f18: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8004f1a: 683b ldr r3, [r7, #0]
8004f1c: 7b1b ldrb r3, [r3, #12]
8004f1e: 2b00 cmp r3, #0
8004f20: f040 808e bne.w 8005040 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
8004f24: 683b ldr r3, [r7, #0]
8004f26: 785b ldrb r3, [r3, #1]
8004f28: 2b00 cmp r3, #0
8004f2a: d044 beq.n 8004fb6 <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8004f2c: 687a ldr r2, [r7, #4]
8004f2e: 683b ldr r3, [r7, #0]
8004f30: 781b ldrb r3, [r3, #0]
8004f32: 009b lsls r3, r3, #2
8004f34: 4413 add r3, r2
8004f36: 881b ldrh r3, [r3, #0]
8004f38: 81bb strh r3, [r7, #12]
8004f3a: 89bb ldrh r3, [r7, #12]
8004f3c: f003 0340 and.w r3, r3, #64 @ 0x40
8004f40: 2b00 cmp r3, #0
8004f42: d01b beq.n 8004f7c <USB_DeactivateEndpoint+0x6c>
8004f44: 687a ldr r2, [r7, #4]
8004f46: 683b ldr r3, [r7, #0]
8004f48: 781b ldrb r3, [r3, #0]
8004f4a: 009b lsls r3, r3, #2
8004f4c: 4413 add r3, r2
8004f4e: 881b ldrh r3, [r3, #0]
8004f50: b29b uxth r3, r3
8004f52: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004f56: f023 0370 bic.w r3, r3, #112 @ 0x70
8004f5a: 817b strh r3, [r7, #10]
8004f5c: 687a ldr r2, [r7, #4]
8004f5e: 683b ldr r3, [r7, #0]
8004f60: 781b ldrb r3, [r3, #0]
8004f62: 009b lsls r3, r3, #2
8004f64: 441a add r2, r3
8004f66: 897b ldrh r3, [r7, #10]
8004f68: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004f6c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004f70: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004f74: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004f78: b29b uxth r3, r3
8004f7a: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004f7c: 687a ldr r2, [r7, #4]
8004f7e: 683b ldr r3, [r7, #0]
8004f80: 781b ldrb r3, [r3, #0]
8004f82: 009b lsls r3, r3, #2
8004f84: 4413 add r3, r2
8004f86: 881b ldrh r3, [r3, #0]
8004f88: b29b uxth r3, r3
8004f8a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004f8e: f023 0340 bic.w r3, r3, #64 @ 0x40
8004f92: 813b strh r3, [r7, #8]
8004f94: 687a ldr r2, [r7, #4]
8004f96: 683b ldr r3, [r7, #0]
8004f98: 781b ldrb r3, [r3, #0]
8004f9a: 009b lsls r3, r3, #2
8004f9c: 441a add r2, r3
8004f9e: 893b ldrh r3, [r7, #8]
8004fa0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004fa4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004fa8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004fac: f043 0380 orr.w r3, r3, #128 @ 0x80
8004fb0: b29b uxth r3, r3
8004fb2: 8013 strh r3, [r2, #0]
8004fb4: e192 b.n 80052dc <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004fb6: 687a ldr r2, [r7, #4]
8004fb8: 683b ldr r3, [r7, #0]
8004fba: 781b ldrb r3, [r3, #0]
8004fbc: 009b lsls r3, r3, #2
8004fbe: 4413 add r3, r2
8004fc0: 881b ldrh r3, [r3, #0]
8004fc2: 827b strh r3, [r7, #18]
8004fc4: 8a7b ldrh r3, [r7, #18]
8004fc6: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004fca: 2b00 cmp r3, #0
8004fcc: d01b beq.n 8005006 <USB_DeactivateEndpoint+0xf6>
8004fce: 687a ldr r2, [r7, #4]
8004fd0: 683b ldr r3, [r7, #0]
8004fd2: 781b ldrb r3, [r3, #0]
8004fd4: 009b lsls r3, r3, #2
8004fd6: 4413 add r3, r2
8004fd8: 881b ldrh r3, [r3, #0]
8004fda: b29b uxth r3, r3
8004fdc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004fe0: f023 0370 bic.w r3, r3, #112 @ 0x70
8004fe4: 823b strh r3, [r7, #16]
8004fe6: 687a ldr r2, [r7, #4]
8004fe8: 683b ldr r3, [r7, #0]
8004fea: 781b ldrb r3, [r3, #0]
8004fec: 009b lsls r3, r3, #2
8004fee: 441a add r2, r3
8004ff0: 8a3b ldrh r3, [r7, #16]
8004ff2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004ff6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004ffa: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004ffe: f043 0380 orr.w r3, r3, #128 @ 0x80
8005002: b29b uxth r3, r3
8005004: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8005006: 687a ldr r2, [r7, #4]
8005008: 683b ldr r3, [r7, #0]
800500a: 781b ldrb r3, [r3, #0]
800500c: 009b lsls r3, r3, #2
800500e: 4413 add r3, r2
8005010: 881b ldrh r3, [r3, #0]
8005012: b29b uxth r3, r3
8005014: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8005018: f023 0370 bic.w r3, r3, #112 @ 0x70
800501c: 81fb strh r3, [r7, #14]
800501e: 687a ldr r2, [r7, #4]
8005020: 683b ldr r3, [r7, #0]
8005022: 781b ldrb r3, [r3, #0]
8005024: 009b lsls r3, r3, #2
8005026: 441a add r2, r3
8005028: 89fb ldrh r3, [r7, #14]
800502a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800502e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005032: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005036: f043 0380 orr.w r3, r3, #128 @ 0x80
800503a: b29b uxth r3, r3
800503c: 8013 strh r3, [r2, #0]
800503e: e14d b.n 80052dc <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
8005040: 683b ldr r3, [r7, #0]
8005042: 785b ldrb r3, [r3, #1]
8005044: 2b00 cmp r3, #0
8005046: f040 80a5 bne.w 8005194 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800504a: 687a ldr r2, [r7, #4]
800504c: 683b ldr r3, [r7, #0]
800504e: 781b ldrb r3, [r3, #0]
8005050: 009b lsls r3, r3, #2
8005052: 4413 add r3, r2
8005054: 881b ldrh r3, [r3, #0]
8005056: 843b strh r3, [r7, #32]
8005058: 8c3b ldrh r3, [r7, #32]
800505a: f403 4380 and.w r3, r3, #16384 @ 0x4000
800505e: 2b00 cmp r3, #0
8005060: d01b beq.n 800509a <USB_DeactivateEndpoint+0x18a>
8005062: 687a ldr r2, [r7, #4]
8005064: 683b ldr r3, [r7, #0]
8005066: 781b ldrb r3, [r3, #0]
8005068: 009b lsls r3, r3, #2
800506a: 4413 add r3, r2
800506c: 881b ldrh r3, [r3, #0]
800506e: b29b uxth r3, r3
8005070: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005074: f023 0370 bic.w r3, r3, #112 @ 0x70
8005078: 83fb strh r3, [r7, #30]
800507a: 687a ldr r2, [r7, #4]
800507c: 683b ldr r3, [r7, #0]
800507e: 781b ldrb r3, [r3, #0]
8005080: 009b lsls r3, r3, #2
8005082: 441a add r2, r3
8005084: 8bfb ldrh r3, [r7, #30]
8005086: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800508a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800508e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8005092: f043 0380 orr.w r3, r3, #128 @ 0x80
8005096: b29b uxth r3, r3
8005098: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800509a: 687a ldr r2, [r7, #4]
800509c: 683b ldr r3, [r7, #0]
800509e: 781b ldrb r3, [r3, #0]
80050a0: 009b lsls r3, r3, #2
80050a2: 4413 add r3, r2
80050a4: 881b ldrh r3, [r3, #0]
80050a6: 83bb strh r3, [r7, #28]
80050a8: 8bbb ldrh r3, [r7, #28]
80050aa: f003 0340 and.w r3, r3, #64 @ 0x40
80050ae: 2b00 cmp r3, #0
80050b0: d01b beq.n 80050ea <USB_DeactivateEndpoint+0x1da>
80050b2: 687a ldr r2, [r7, #4]
80050b4: 683b ldr r3, [r7, #0]
80050b6: 781b ldrb r3, [r3, #0]
80050b8: 009b lsls r3, r3, #2
80050ba: 4413 add r3, r2
80050bc: 881b ldrh r3, [r3, #0]
80050be: b29b uxth r3, r3
80050c0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80050c4: f023 0370 bic.w r3, r3, #112 @ 0x70
80050c8: 837b strh r3, [r7, #26]
80050ca: 687a ldr r2, [r7, #4]
80050cc: 683b ldr r3, [r7, #0]
80050ce: 781b ldrb r3, [r3, #0]
80050d0: 009b lsls r3, r3, #2
80050d2: 441a add r2, r3
80050d4: 8b7b ldrh r3, [r7, #26]
80050d6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80050da: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80050de: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80050e2: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80050e6: b29b uxth r3, r3
80050e8: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
80050ea: 687a ldr r2, [r7, #4]
80050ec: 683b ldr r3, [r7, #0]
80050ee: 781b ldrb r3, [r3, #0]
80050f0: 009b lsls r3, r3, #2
80050f2: 4413 add r3, r2
80050f4: 881b ldrh r3, [r3, #0]
80050f6: b29b uxth r3, r3
80050f8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80050fc: f023 0370 bic.w r3, r3, #112 @ 0x70
8005100: 833b strh r3, [r7, #24]
8005102: 687a ldr r2, [r7, #4]
8005104: 683b ldr r3, [r7, #0]
8005106: 781b ldrb r3, [r3, #0]
8005108: 009b lsls r3, r3, #2
800510a: 441a add r2, r3
800510c: 8b3b ldrh r3, [r7, #24]
800510e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005112: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005116: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800511a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800511e: b29b uxth r3, r3
8005120: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8005122: 687a ldr r2, [r7, #4]
8005124: 683b ldr r3, [r7, #0]
8005126: 781b ldrb r3, [r3, #0]
8005128: 009b lsls r3, r3, #2
800512a: 4413 add r3, r2
800512c: 881b ldrh r3, [r3, #0]
800512e: b29b uxth r3, r3
8005130: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8005134: f023 0370 bic.w r3, r3, #112 @ 0x70
8005138: 82fb strh r3, [r7, #22]
800513a: 687a ldr r2, [r7, #4]
800513c: 683b ldr r3, [r7, #0]
800513e: 781b ldrb r3, [r3, #0]
8005140: 009b lsls r3, r3, #2
8005142: 441a add r2, r3
8005144: 8afb ldrh r3, [r7, #22]
8005146: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800514a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800514e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005152: f043 0380 orr.w r3, r3, #128 @ 0x80
8005156: b29b uxth r3, r3
8005158: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800515a: 687a ldr r2, [r7, #4]
800515c: 683b ldr r3, [r7, #0]
800515e: 781b ldrb r3, [r3, #0]
8005160: 009b lsls r3, r3, #2
8005162: 4413 add r3, r2
8005164: 881b ldrh r3, [r3, #0]
8005166: b29b uxth r3, r3
8005168: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800516c: f023 0340 bic.w r3, r3, #64 @ 0x40
8005170: 82bb strh r3, [r7, #20]
8005172: 687a ldr r2, [r7, #4]
8005174: 683b ldr r3, [r7, #0]
8005176: 781b ldrb r3, [r3, #0]
8005178: 009b lsls r3, r3, #2
800517a: 441a add r2, r3
800517c: 8abb ldrh r3, [r7, #20]
800517e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005182: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005186: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800518a: f043 0380 orr.w r3, r3, #128 @ 0x80
800518e: b29b uxth r3, r3
8005190: 8013 strh r3, [r2, #0]
8005192: e0a3 b.n 80052dc <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8005194: 687a ldr r2, [r7, #4]
8005196: 683b ldr r3, [r7, #0]
8005198: 781b ldrb r3, [r3, #0]
800519a: 009b lsls r3, r3, #2
800519c: 4413 add r3, r2
800519e: 881b ldrh r3, [r3, #0]
80051a0: 85fb strh r3, [r7, #46] @ 0x2e
80051a2: 8dfb ldrh r3, [r7, #46] @ 0x2e
80051a4: f403 4380 and.w r3, r3, #16384 @ 0x4000
80051a8: 2b00 cmp r3, #0
80051aa: d01b beq.n 80051e4 <USB_DeactivateEndpoint+0x2d4>
80051ac: 687a ldr r2, [r7, #4]
80051ae: 683b ldr r3, [r7, #0]
80051b0: 781b ldrb r3, [r3, #0]
80051b2: 009b lsls r3, r3, #2
80051b4: 4413 add r3, r2
80051b6: 881b ldrh r3, [r3, #0]
80051b8: b29b uxth r3, r3
80051ba: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80051be: f023 0370 bic.w r3, r3, #112 @ 0x70
80051c2: 85bb strh r3, [r7, #44] @ 0x2c
80051c4: 687a ldr r2, [r7, #4]
80051c6: 683b ldr r3, [r7, #0]
80051c8: 781b ldrb r3, [r3, #0]
80051ca: 009b lsls r3, r3, #2
80051cc: 441a add r2, r3
80051ce: 8dbb ldrh r3, [r7, #44] @ 0x2c
80051d0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80051d4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80051d8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80051dc: f043 0380 orr.w r3, r3, #128 @ 0x80
80051e0: b29b uxth r3, r3
80051e2: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80051e4: 687a ldr r2, [r7, #4]
80051e6: 683b ldr r3, [r7, #0]
80051e8: 781b ldrb r3, [r3, #0]
80051ea: 009b lsls r3, r3, #2
80051ec: 4413 add r3, r2
80051ee: 881b ldrh r3, [r3, #0]
80051f0: 857b strh r3, [r7, #42] @ 0x2a
80051f2: 8d7b ldrh r3, [r7, #42] @ 0x2a
80051f4: f003 0340 and.w r3, r3, #64 @ 0x40
80051f8: 2b00 cmp r3, #0
80051fa: d01b beq.n 8005234 <USB_DeactivateEndpoint+0x324>
80051fc: 687a ldr r2, [r7, #4]
80051fe: 683b ldr r3, [r7, #0]
8005200: 781b ldrb r3, [r3, #0]
8005202: 009b lsls r3, r3, #2
8005204: 4413 add r3, r2
8005206: 881b ldrh r3, [r3, #0]
8005208: b29b uxth r3, r3
800520a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800520e: f023 0370 bic.w r3, r3, #112 @ 0x70
8005212: 853b strh r3, [r7, #40] @ 0x28
8005214: 687a ldr r2, [r7, #4]
8005216: 683b ldr r3, [r7, #0]
8005218: 781b ldrb r3, [r3, #0]
800521a: 009b lsls r3, r3, #2
800521c: 441a add r2, r3
800521e: 8d3b ldrh r3, [r7, #40] @ 0x28
8005220: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005224: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005228: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800522c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8005230: b29b uxth r3, r3
8005232: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
8005234: 687a ldr r2, [r7, #4]
8005236: 683b ldr r3, [r7, #0]
8005238: 781b ldrb r3, [r3, #0]
800523a: 009b lsls r3, r3, #2
800523c: 4413 add r3, r2
800523e: 881b ldrh r3, [r3, #0]
8005240: b29b uxth r3, r3
8005242: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005246: f023 0370 bic.w r3, r3, #112 @ 0x70
800524a: 84fb strh r3, [r7, #38] @ 0x26
800524c: 687a ldr r2, [r7, #4]
800524e: 683b ldr r3, [r7, #0]
8005250: 781b ldrb r3, [r3, #0]
8005252: 009b lsls r3, r3, #2
8005254: 441a add r2, r3
8005256: 8cfb ldrh r3, [r7, #38] @ 0x26
8005258: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800525c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005260: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8005264: f043 0380 orr.w r3, r3, #128 @ 0x80
8005268: b29b uxth r3, r3
800526a: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800526c: 687a ldr r2, [r7, #4]
800526e: 683b ldr r3, [r7, #0]
8005270: 781b ldrb r3, [r3, #0]
8005272: 009b lsls r3, r3, #2
8005274: 4413 add r3, r2
8005276: 881b ldrh r3, [r3, #0]
8005278: b29b uxth r3, r3
800527a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800527e: f023 0340 bic.w r3, r3, #64 @ 0x40
8005282: 84bb strh r3, [r7, #36] @ 0x24
8005284: 687a ldr r2, [r7, #4]
8005286: 683b ldr r3, [r7, #0]
8005288: 781b ldrb r3, [r3, #0]
800528a: 009b lsls r3, r3, #2
800528c: 441a add r2, r3
800528e: 8cbb ldrh r3, [r7, #36] @ 0x24
8005290: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005294: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005298: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800529c: f043 0380 orr.w r3, r3, #128 @ 0x80
80052a0: b29b uxth r3, r3
80052a2: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80052a4: 687a ldr r2, [r7, #4]
80052a6: 683b ldr r3, [r7, #0]
80052a8: 781b ldrb r3, [r3, #0]
80052aa: 009b lsls r3, r3, #2
80052ac: 4413 add r3, r2
80052ae: 881b ldrh r3, [r3, #0]
80052b0: b29b uxth r3, r3
80052b2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80052b6: f023 0370 bic.w r3, r3, #112 @ 0x70
80052ba: 847b strh r3, [r7, #34] @ 0x22
80052bc: 687a ldr r2, [r7, #4]
80052be: 683b ldr r3, [r7, #0]
80052c0: 781b ldrb r3, [r3, #0]
80052c2: 009b lsls r3, r3, #2
80052c4: 441a add r2, r3
80052c6: 8c7b ldrh r3, [r7, #34] @ 0x22
80052c8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80052cc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80052d0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80052d4: f043 0380 orr.w r3, r3, #128 @ 0x80
80052d8: b29b uxth r3, r3
80052da: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
80052dc: 2300 movs r3, #0
}
80052de: 4618 mov r0, r3
80052e0: 3734 adds r7, #52 @ 0x34
80052e2: 46bd mov sp, r7
80052e4: bc80 pop {r7}
80052e6: 4770 bx lr
080052e8 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80052e8: b580 push {r7, lr}
80052ea: b0c2 sub sp, #264 @ 0x108
80052ec: af00 add r7, sp, #0
80052ee: f507 7384 add.w r3, r7, #264 @ 0x108
80052f2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80052f6: 6018 str r0, [r3, #0]
80052f8: f507 7384 add.w r3, r7, #264 @ 0x108
80052fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005300: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
8005302: f507 7384 add.w r3, r7, #264 @ 0x108
8005306: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800530a: 681b ldr r3, [r3, #0]
800530c: 785b ldrb r3, [r3, #1]
800530e: 2b01 cmp r3, #1
8005310: f040 86b7 bne.w 8006082 <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
8005314: f507 7384 add.w r3, r7, #264 @ 0x108
8005318: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800531c: 681b ldr r3, [r3, #0]
800531e: 699a ldr r2, [r3, #24]
8005320: f507 7384 add.w r3, r7, #264 @ 0x108
8005324: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005328: 681b ldr r3, [r3, #0]
800532a: 691b ldr r3, [r3, #16]
800532c: 429a cmp r2, r3
800532e: d908 bls.n 8005342 <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
8005330: f507 7384 add.w r3, r7, #264 @ 0x108
8005334: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005338: 681b ldr r3, [r3, #0]
800533a: 691b ldr r3, [r3, #16]
800533c: f8c7 3104 str.w r3, [r7, #260] @ 0x104
8005340: e007 b.n 8005352 <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
8005342: f507 7384 add.w r3, r7, #264 @ 0x108
8005346: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800534a: 681b ldr r3, [r3, #0]
800534c: 699b ldr r3, [r3, #24]
800534e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
8005352: f507 7384 add.w r3, r7, #264 @ 0x108
8005356: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800535a: 681b ldr r3, [r3, #0]
800535c: 7b1b ldrb r3, [r3, #12]
800535e: 2b00 cmp r3, #0
8005360: d13a bne.n 80053d8 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8005362: f507 7384 add.w r3, r7, #264 @ 0x108
8005366: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800536a: 681b ldr r3, [r3, #0]
800536c: 6959 ldr r1, [r3, #20]
800536e: f507 7384 add.w r3, r7, #264 @ 0x108
8005372: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005376: 681b ldr r3, [r3, #0]
8005378: 88da ldrh r2, [r3, #6]
800537a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800537e: b29b uxth r3, r3
8005380: f507 7084 add.w r0, r7, #264 @ 0x108
8005384: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005388: 6800 ldr r0, [r0, #0]
800538a: f001 fc9c bl 8006cc6 <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800538e: f507 7384 add.w r3, r7, #264 @ 0x108
8005392: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005396: 681b ldr r3, [r3, #0]
8005398: 613b str r3, [r7, #16]
800539a: f507 7384 add.w r3, r7, #264 @ 0x108
800539e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80053a2: 681b ldr r3, [r3, #0]
80053a4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80053a8: b29b uxth r3, r3
80053aa: 461a mov r2, r3
80053ac: 693b ldr r3, [r7, #16]
80053ae: 4413 add r3, r2
80053b0: 613b str r3, [r7, #16]
80053b2: f507 7384 add.w r3, r7, #264 @ 0x108
80053b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80053ba: 681b ldr r3, [r3, #0]
80053bc: 781b ldrb r3, [r3, #0]
80053be: 011a lsls r2, r3, #4
80053c0: 693b ldr r3, [r7, #16]
80053c2: 4413 add r3, r2
80053c4: f203 4304 addw r3, r3, #1028 @ 0x404
80053c8: 60fb str r3, [r7, #12]
80053ca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80053ce: b29a uxth r2, r3
80053d0: 68fb ldr r3, [r7, #12]
80053d2: 801a strh r2, [r3, #0]
80053d4: f000 be1f b.w 8006016 <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
80053d8: f507 7384 add.w r3, r7, #264 @ 0x108
80053dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80053e0: 681b ldr r3, [r3, #0]
80053e2: 78db ldrb r3, [r3, #3]
80053e4: 2b02 cmp r3, #2
80053e6: f040 8462 bne.w 8005cae <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
80053ea: f507 7384 add.w r3, r7, #264 @ 0x108
80053ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80053f2: 681b ldr r3, [r3, #0]
80053f4: 6a1a ldr r2, [r3, #32]
80053f6: f507 7384 add.w r3, r7, #264 @ 0x108
80053fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80053fe: 681b ldr r3, [r3, #0]
8005400: 691b ldr r3, [r3, #16]
8005402: 429a cmp r2, r3
8005404: f240 83df bls.w 8005bc6 <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8005408: f507 7384 add.w r3, r7, #264 @ 0x108
800540c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005410: 681a ldr r2, [r3, #0]
8005412: f507 7384 add.w r3, r7, #264 @ 0x108
8005416: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800541a: 681b ldr r3, [r3, #0]
800541c: 781b ldrb r3, [r3, #0]
800541e: 009b lsls r3, r3, #2
8005420: 4413 add r3, r2
8005422: 881b ldrh r3, [r3, #0]
8005424: b29b uxth r3, r3
8005426: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800542a: f023 0370 bic.w r3, r3, #112 @ 0x70
800542e: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
8005432: f507 7384 add.w r3, r7, #264 @ 0x108
8005436: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800543a: 681a ldr r2, [r3, #0]
800543c: f507 7384 add.w r3, r7, #264 @ 0x108
8005440: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005444: 681b ldr r3, [r3, #0]
8005446: 781b ldrb r3, [r3, #0]
8005448: 009b lsls r3, r3, #2
800544a: 441a add r2, r3
800544c: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
8005450: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005454: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005458: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800545c: f043 0380 orr.w r3, r3, #128 @ 0x80
8005460: b29b uxth r3, r3
8005462: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8005464: f507 7384 add.w r3, r7, #264 @ 0x108
8005468: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800546c: 681b ldr r3, [r3, #0]
800546e: 6a1a ldr r2, [r3, #32]
8005470: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005474: 1ad2 subs r2, r2, r3
8005476: f507 7384 add.w r3, r7, #264 @ 0x108
800547a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800547e: 681b ldr r3, [r3, #0]
8005480: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8005482: f507 7384 add.w r3, r7, #264 @ 0x108
8005486: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800548a: 681a ldr r2, [r3, #0]
800548c: f507 7384 add.w r3, r7, #264 @ 0x108
8005490: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005494: 681b ldr r3, [r3, #0]
8005496: 781b ldrb r3, [r3, #0]
8005498: 009b lsls r3, r3, #2
800549a: 4413 add r3, r2
800549c: 881b ldrh r3, [r3, #0]
800549e: b29b uxth r3, r3
80054a0: f003 0340 and.w r3, r3, #64 @ 0x40
80054a4: 2b00 cmp r3, #0
80054a6: f000 81c7 beq.w 8005838 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
80054aa: f507 7384 add.w r3, r7, #264 @ 0x108
80054ae: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80054b2: 681b ldr r3, [r3, #0]
80054b4: 633b str r3, [r7, #48] @ 0x30
80054b6: f507 7384 add.w r3, r7, #264 @ 0x108
80054ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80054be: 681b ldr r3, [r3, #0]
80054c0: 785b ldrb r3, [r3, #1]
80054c2: 2b00 cmp r3, #0
80054c4: d177 bne.n 80055b6 <USB_EPStartXfer+0x2ce>
80054c6: f507 7384 add.w r3, r7, #264 @ 0x108
80054ca: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80054ce: 681b ldr r3, [r3, #0]
80054d0: 62bb str r3, [r7, #40] @ 0x28
80054d2: f507 7384 add.w r3, r7, #264 @ 0x108
80054d6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80054da: 681b ldr r3, [r3, #0]
80054dc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80054e0: b29b uxth r3, r3
80054e2: 461a mov r2, r3
80054e4: 6abb ldr r3, [r7, #40] @ 0x28
80054e6: 4413 add r3, r2
80054e8: 62bb str r3, [r7, #40] @ 0x28
80054ea: f507 7384 add.w r3, r7, #264 @ 0x108
80054ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80054f2: 681b ldr r3, [r3, #0]
80054f4: 781b ldrb r3, [r3, #0]
80054f6: 011a lsls r2, r3, #4
80054f8: 6abb ldr r3, [r7, #40] @ 0x28
80054fa: 4413 add r3, r2
80054fc: f203 430c addw r3, r3, #1036 @ 0x40c
8005500: 627b str r3, [r7, #36] @ 0x24
8005502: 6a7b ldr r3, [r7, #36] @ 0x24
8005504: 881b ldrh r3, [r3, #0]
8005506: b29b uxth r3, r3
8005508: f3c3 0309 ubfx r3, r3, #0, #10
800550c: b29a uxth r2, r3
800550e: 6a7b ldr r3, [r7, #36] @ 0x24
8005510: 801a strh r2, [r3, #0]
8005512: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005516: 2b3e cmp r3, #62 @ 0x3e
8005518: d921 bls.n 800555e <USB_EPStartXfer+0x276>
800551a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800551e: 095b lsrs r3, r3, #5
8005520: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8005524: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005528: f003 031f and.w r3, r3, #31
800552c: 2b00 cmp r3, #0
800552e: d104 bne.n 800553a <USB_EPStartXfer+0x252>
8005530: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8005534: 3b01 subs r3, #1
8005536: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800553a: 6a7b ldr r3, [r7, #36] @ 0x24
800553c: 881b ldrh r3, [r3, #0]
800553e: b29a uxth r2, r3
8005540: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8005544: b29b uxth r3, r3
8005546: 029b lsls r3, r3, #10
8005548: b29b uxth r3, r3
800554a: 4313 orrs r3, r2
800554c: b29b uxth r3, r3
800554e: ea6f 4343 mvn.w r3, r3, lsl #17
8005552: ea6f 4353 mvn.w r3, r3, lsr #17
8005556: b29a uxth r2, r3
8005558: 6a7b ldr r3, [r7, #36] @ 0x24
800555a: 801a strh r2, [r3, #0]
800555c: e050 b.n 8005600 <USB_EPStartXfer+0x318>
800555e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005562: 2b00 cmp r3, #0
8005564: d10a bne.n 800557c <USB_EPStartXfer+0x294>
8005566: 6a7b ldr r3, [r7, #36] @ 0x24
8005568: 881b ldrh r3, [r3, #0]
800556a: b29b uxth r3, r3
800556c: ea6f 4343 mvn.w r3, r3, lsl #17
8005570: ea6f 4353 mvn.w r3, r3, lsr #17
8005574: b29a uxth r2, r3
8005576: 6a7b ldr r3, [r7, #36] @ 0x24
8005578: 801a strh r2, [r3, #0]
800557a: e041 b.n 8005600 <USB_EPStartXfer+0x318>
800557c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005580: 085b lsrs r3, r3, #1
8005582: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8005586: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800558a: f003 0301 and.w r3, r3, #1
800558e: 2b00 cmp r3, #0
8005590: d004 beq.n 800559c <USB_EPStartXfer+0x2b4>
8005592: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8005596: 3301 adds r3, #1
8005598: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800559c: 6a7b ldr r3, [r7, #36] @ 0x24
800559e: 881b ldrh r3, [r3, #0]
80055a0: b29a uxth r2, r3
80055a2: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
80055a6: b29b uxth r3, r3
80055a8: 029b lsls r3, r3, #10
80055aa: b29b uxth r3, r3
80055ac: 4313 orrs r3, r2
80055ae: b29a uxth r2, r3
80055b0: 6a7b ldr r3, [r7, #36] @ 0x24
80055b2: 801a strh r2, [r3, #0]
80055b4: e024 b.n 8005600 <USB_EPStartXfer+0x318>
80055b6: f507 7384 add.w r3, r7, #264 @ 0x108
80055ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055be: 681b ldr r3, [r3, #0]
80055c0: 785b ldrb r3, [r3, #1]
80055c2: 2b01 cmp r3, #1
80055c4: d11c bne.n 8005600 <USB_EPStartXfer+0x318>
80055c6: f507 7384 add.w r3, r7, #264 @ 0x108
80055ca: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80055ce: 681b ldr r3, [r3, #0]
80055d0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80055d4: b29b uxth r3, r3
80055d6: 461a mov r2, r3
80055d8: 6b3b ldr r3, [r7, #48] @ 0x30
80055da: 4413 add r3, r2
80055dc: 633b str r3, [r7, #48] @ 0x30
80055de: f507 7384 add.w r3, r7, #264 @ 0x108
80055e2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055e6: 681b ldr r3, [r3, #0]
80055e8: 781b ldrb r3, [r3, #0]
80055ea: 011a lsls r2, r3, #4
80055ec: 6b3b ldr r3, [r7, #48] @ 0x30
80055ee: 4413 add r3, r2
80055f0: f203 430c addw r3, r3, #1036 @ 0x40c
80055f4: 62fb str r3, [r7, #44] @ 0x2c
80055f6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80055fa: b29a uxth r2, r3
80055fc: 6afb ldr r3, [r7, #44] @ 0x2c
80055fe: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8005600: f507 7384 add.w r3, r7, #264 @ 0x108
8005604: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005608: 681b ldr r3, [r3, #0]
800560a: 895b ldrh r3, [r3, #10]
800560c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005610: f507 7384 add.w r3, r7, #264 @ 0x108
8005614: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005618: 681b ldr r3, [r3, #0]
800561a: 6959 ldr r1, [r3, #20]
800561c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005620: b29b uxth r3, r3
8005622: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005626: f507 7084 add.w r0, r7, #264 @ 0x108
800562a: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800562e: 6800 ldr r0, [r0, #0]
8005630: f001 fb49 bl 8006cc6 <USB_WritePMA>
ep->xfer_buff += len;
8005634: f507 7384 add.w r3, r7, #264 @ 0x108
8005638: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800563c: 681b ldr r3, [r3, #0]
800563e: 695a ldr r2, [r3, #20]
8005640: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005644: 441a add r2, r3
8005646: f507 7384 add.w r3, r7, #264 @ 0x108
800564a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800564e: 681b ldr r3, [r3, #0]
8005650: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8005652: f507 7384 add.w r3, r7, #264 @ 0x108
8005656: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800565a: 681b ldr r3, [r3, #0]
800565c: 6a1a ldr r2, [r3, #32]
800565e: f507 7384 add.w r3, r7, #264 @ 0x108
8005662: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005666: 681b ldr r3, [r3, #0]
8005668: 691b ldr r3, [r3, #16]
800566a: 429a cmp r2, r3
800566c: d90f bls.n 800568e <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
800566e: f507 7384 add.w r3, r7, #264 @ 0x108
8005672: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005676: 681b ldr r3, [r3, #0]
8005678: 6a1a ldr r2, [r3, #32]
800567a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800567e: 1ad2 subs r2, r2, r3
8005680: f507 7384 add.w r3, r7, #264 @ 0x108
8005684: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005688: 681b ldr r3, [r3, #0]
800568a: 621a str r2, [r3, #32]
800568c: e00e b.n 80056ac <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
800568e: f507 7384 add.w r3, r7, #264 @ 0x108
8005692: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005696: 681b ldr r3, [r3, #0]
8005698: 6a1b ldr r3, [r3, #32]
800569a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800569e: f507 7384 add.w r3, r7, #264 @ 0x108
80056a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80056a6: 681b ldr r3, [r3, #0]
80056a8: 2200 movs r2, #0
80056aa: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
80056ac: f507 7384 add.w r3, r7, #264 @ 0x108
80056b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80056b4: 681b ldr r3, [r3, #0]
80056b6: 785b ldrb r3, [r3, #1]
80056b8: 2b00 cmp r3, #0
80056ba: d177 bne.n 80057ac <USB_EPStartXfer+0x4c4>
80056bc: f507 7384 add.w r3, r7, #264 @ 0x108
80056c0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80056c4: 681b ldr r3, [r3, #0]
80056c6: 61bb str r3, [r7, #24]
80056c8: f507 7384 add.w r3, r7, #264 @ 0x108
80056cc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80056d0: 681b ldr r3, [r3, #0]
80056d2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80056d6: b29b uxth r3, r3
80056d8: 461a mov r2, r3
80056da: 69bb ldr r3, [r7, #24]
80056dc: 4413 add r3, r2
80056de: 61bb str r3, [r7, #24]
80056e0: f507 7384 add.w r3, r7, #264 @ 0x108
80056e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80056e8: 681b ldr r3, [r3, #0]
80056ea: 781b ldrb r3, [r3, #0]
80056ec: 011a lsls r2, r3, #4
80056ee: 69bb ldr r3, [r7, #24]
80056f0: 4413 add r3, r2
80056f2: f203 4304 addw r3, r3, #1028 @ 0x404
80056f6: 617b str r3, [r7, #20]
80056f8: 697b ldr r3, [r7, #20]
80056fa: 881b ldrh r3, [r3, #0]
80056fc: b29b uxth r3, r3
80056fe: f3c3 0309 ubfx r3, r3, #0, #10
8005702: b29a uxth r2, r3
8005704: 697b ldr r3, [r7, #20]
8005706: 801a strh r2, [r3, #0]
8005708: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800570c: 2b3e cmp r3, #62 @ 0x3e
800570e: d921 bls.n 8005754 <USB_EPStartXfer+0x46c>
8005710: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005714: 095b lsrs r3, r3, #5
8005716: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800571a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800571e: f003 031f and.w r3, r3, #31
8005722: 2b00 cmp r3, #0
8005724: d104 bne.n 8005730 <USB_EPStartXfer+0x448>
8005726: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800572a: 3b01 subs r3, #1
800572c: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8005730: 697b ldr r3, [r7, #20]
8005732: 881b ldrh r3, [r3, #0]
8005734: b29a uxth r2, r3
8005736: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800573a: b29b uxth r3, r3
800573c: 029b lsls r3, r3, #10
800573e: b29b uxth r3, r3
8005740: 4313 orrs r3, r2
8005742: b29b uxth r3, r3
8005744: ea6f 4343 mvn.w r3, r3, lsl #17
8005748: ea6f 4353 mvn.w r3, r3, lsr #17
800574c: b29a uxth r2, r3
800574e: 697b ldr r3, [r7, #20]
8005750: 801a strh r2, [r3, #0]
8005752: e056 b.n 8005802 <USB_EPStartXfer+0x51a>
8005754: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005758: 2b00 cmp r3, #0
800575a: d10a bne.n 8005772 <USB_EPStartXfer+0x48a>
800575c: 697b ldr r3, [r7, #20]
800575e: 881b ldrh r3, [r3, #0]
8005760: b29b uxth r3, r3
8005762: ea6f 4343 mvn.w r3, r3, lsl #17
8005766: ea6f 4353 mvn.w r3, r3, lsr #17
800576a: b29a uxth r2, r3
800576c: 697b ldr r3, [r7, #20]
800576e: 801a strh r2, [r3, #0]
8005770: e047 b.n 8005802 <USB_EPStartXfer+0x51a>
8005772: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005776: 085b lsrs r3, r3, #1
8005778: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800577c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005780: f003 0301 and.w r3, r3, #1
8005784: 2b00 cmp r3, #0
8005786: d004 beq.n 8005792 <USB_EPStartXfer+0x4aa>
8005788: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800578c: 3301 adds r3, #1
800578e: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8005792: 697b ldr r3, [r7, #20]
8005794: 881b ldrh r3, [r3, #0]
8005796: b29a uxth r2, r3
8005798: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800579c: b29b uxth r3, r3
800579e: 029b lsls r3, r3, #10
80057a0: b29b uxth r3, r3
80057a2: 4313 orrs r3, r2
80057a4: b29a uxth r2, r3
80057a6: 697b ldr r3, [r7, #20]
80057a8: 801a strh r2, [r3, #0]
80057aa: e02a b.n 8005802 <USB_EPStartXfer+0x51a>
80057ac: f507 7384 add.w r3, r7, #264 @ 0x108
80057b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80057b4: 681b ldr r3, [r3, #0]
80057b6: 785b ldrb r3, [r3, #1]
80057b8: 2b01 cmp r3, #1
80057ba: d122 bne.n 8005802 <USB_EPStartXfer+0x51a>
80057bc: f507 7384 add.w r3, r7, #264 @ 0x108
80057c0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80057c4: 681b ldr r3, [r3, #0]
80057c6: 623b str r3, [r7, #32]
80057c8: f507 7384 add.w r3, r7, #264 @ 0x108
80057cc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80057d0: 681b ldr r3, [r3, #0]
80057d2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80057d6: b29b uxth r3, r3
80057d8: 461a mov r2, r3
80057da: 6a3b ldr r3, [r7, #32]
80057dc: 4413 add r3, r2
80057de: 623b str r3, [r7, #32]
80057e0: f507 7384 add.w r3, r7, #264 @ 0x108
80057e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80057e8: 681b ldr r3, [r3, #0]
80057ea: 781b ldrb r3, [r3, #0]
80057ec: 011a lsls r2, r3, #4
80057ee: 6a3b ldr r3, [r7, #32]
80057f0: 4413 add r3, r2
80057f2: f203 4304 addw r3, r3, #1028 @ 0x404
80057f6: 61fb str r3, [r7, #28]
80057f8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80057fc: b29a uxth r2, r3
80057fe: 69fb ldr r3, [r7, #28]
8005800: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8005802: f507 7384 add.w r3, r7, #264 @ 0x108
8005806: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800580a: 681b ldr r3, [r3, #0]
800580c: 891b ldrh r3, [r3, #8]
800580e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005812: f507 7384 add.w r3, r7, #264 @ 0x108
8005816: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800581a: 681b ldr r3, [r3, #0]
800581c: 6959 ldr r1, [r3, #20]
800581e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005822: b29b uxth r3, r3
8005824: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005828: f507 7084 add.w r0, r7, #264 @ 0x108
800582c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005830: 6800 ldr r0, [r0, #0]
8005832: f001 fa48 bl 8006cc6 <USB_WritePMA>
8005836: e3ee b.n 8006016 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8005838: f507 7384 add.w r3, r7, #264 @ 0x108
800583c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005840: 681b ldr r3, [r3, #0]
8005842: 785b ldrb r3, [r3, #1]
8005844: 2b00 cmp r3, #0
8005846: d177 bne.n 8005938 <USB_EPStartXfer+0x650>
8005848: f507 7384 add.w r3, r7, #264 @ 0x108
800584c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005850: 681b ldr r3, [r3, #0]
8005852: 64bb str r3, [r7, #72] @ 0x48
8005854: f507 7384 add.w r3, r7, #264 @ 0x108
8005858: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800585c: 681b ldr r3, [r3, #0]
800585e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005862: b29b uxth r3, r3
8005864: 461a mov r2, r3
8005866: 6cbb ldr r3, [r7, #72] @ 0x48
8005868: 4413 add r3, r2
800586a: 64bb str r3, [r7, #72] @ 0x48
800586c: f507 7384 add.w r3, r7, #264 @ 0x108
8005870: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005874: 681b ldr r3, [r3, #0]
8005876: 781b ldrb r3, [r3, #0]
8005878: 011a lsls r2, r3, #4
800587a: 6cbb ldr r3, [r7, #72] @ 0x48
800587c: 4413 add r3, r2
800587e: f203 4304 addw r3, r3, #1028 @ 0x404
8005882: 647b str r3, [r7, #68] @ 0x44
8005884: 6c7b ldr r3, [r7, #68] @ 0x44
8005886: 881b ldrh r3, [r3, #0]
8005888: b29b uxth r3, r3
800588a: f3c3 0309 ubfx r3, r3, #0, #10
800588e: b29a uxth r2, r3
8005890: 6c7b ldr r3, [r7, #68] @ 0x44
8005892: 801a strh r2, [r3, #0]
8005894: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005898: 2b3e cmp r3, #62 @ 0x3e
800589a: d921 bls.n 80058e0 <USB_EPStartXfer+0x5f8>
800589c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80058a0: 095b lsrs r3, r3, #5
80058a2: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
80058a6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80058aa: f003 031f and.w r3, r3, #31
80058ae: 2b00 cmp r3, #0
80058b0: d104 bne.n 80058bc <USB_EPStartXfer+0x5d4>
80058b2: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
80058b6: 3b01 subs r3, #1
80058b8: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
80058bc: 6c7b ldr r3, [r7, #68] @ 0x44
80058be: 881b ldrh r3, [r3, #0]
80058c0: b29a uxth r2, r3
80058c2: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
80058c6: b29b uxth r3, r3
80058c8: 029b lsls r3, r3, #10
80058ca: b29b uxth r3, r3
80058cc: 4313 orrs r3, r2
80058ce: b29b uxth r3, r3
80058d0: ea6f 4343 mvn.w r3, r3, lsl #17
80058d4: ea6f 4353 mvn.w r3, r3, lsr #17
80058d8: b29a uxth r2, r3
80058da: 6c7b ldr r3, [r7, #68] @ 0x44
80058dc: 801a strh r2, [r3, #0]
80058de: e056 b.n 800598e <USB_EPStartXfer+0x6a6>
80058e0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80058e4: 2b00 cmp r3, #0
80058e6: d10a bne.n 80058fe <USB_EPStartXfer+0x616>
80058e8: 6c7b ldr r3, [r7, #68] @ 0x44
80058ea: 881b ldrh r3, [r3, #0]
80058ec: b29b uxth r3, r3
80058ee: ea6f 4343 mvn.w r3, r3, lsl #17
80058f2: ea6f 4353 mvn.w r3, r3, lsr #17
80058f6: b29a uxth r2, r3
80058f8: 6c7b ldr r3, [r7, #68] @ 0x44
80058fa: 801a strh r2, [r3, #0]
80058fc: e047 b.n 800598e <USB_EPStartXfer+0x6a6>
80058fe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005902: 085b lsrs r3, r3, #1
8005904: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8005908: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800590c: f003 0301 and.w r3, r3, #1
8005910: 2b00 cmp r3, #0
8005912: d004 beq.n 800591e <USB_EPStartXfer+0x636>
8005914: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8005918: 3301 adds r3, #1
800591a: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800591e: 6c7b ldr r3, [r7, #68] @ 0x44
8005920: 881b ldrh r3, [r3, #0]
8005922: b29a uxth r2, r3
8005924: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8005928: b29b uxth r3, r3
800592a: 029b lsls r3, r3, #10
800592c: b29b uxth r3, r3
800592e: 4313 orrs r3, r2
8005930: b29a uxth r2, r3
8005932: 6c7b ldr r3, [r7, #68] @ 0x44
8005934: 801a strh r2, [r3, #0]
8005936: e02a b.n 800598e <USB_EPStartXfer+0x6a6>
8005938: f507 7384 add.w r3, r7, #264 @ 0x108
800593c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005940: 681b ldr r3, [r3, #0]
8005942: 785b ldrb r3, [r3, #1]
8005944: 2b01 cmp r3, #1
8005946: d122 bne.n 800598e <USB_EPStartXfer+0x6a6>
8005948: f507 7384 add.w r3, r7, #264 @ 0x108
800594c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005950: 681b ldr r3, [r3, #0]
8005952: 653b str r3, [r7, #80] @ 0x50
8005954: f507 7384 add.w r3, r7, #264 @ 0x108
8005958: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800595c: 681b ldr r3, [r3, #0]
800595e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005962: b29b uxth r3, r3
8005964: 461a mov r2, r3
8005966: 6d3b ldr r3, [r7, #80] @ 0x50
8005968: 4413 add r3, r2
800596a: 653b str r3, [r7, #80] @ 0x50
800596c: f507 7384 add.w r3, r7, #264 @ 0x108
8005970: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005974: 681b ldr r3, [r3, #0]
8005976: 781b ldrb r3, [r3, #0]
8005978: 011a lsls r2, r3, #4
800597a: 6d3b ldr r3, [r7, #80] @ 0x50
800597c: 4413 add r3, r2
800597e: f203 4304 addw r3, r3, #1028 @ 0x404
8005982: 64fb str r3, [r7, #76] @ 0x4c
8005984: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005988: b29a uxth r2, r3
800598a: 6cfb ldr r3, [r7, #76] @ 0x4c
800598c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800598e: f507 7384 add.w r3, r7, #264 @ 0x108
8005992: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005996: 681b ldr r3, [r3, #0]
8005998: 891b ldrh r3, [r3, #8]
800599a: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800599e: f507 7384 add.w r3, r7, #264 @ 0x108
80059a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059a6: 681b ldr r3, [r3, #0]
80059a8: 6959 ldr r1, [r3, #20]
80059aa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80059ae: b29b uxth r3, r3
80059b0: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80059b4: f507 7084 add.w r0, r7, #264 @ 0x108
80059b8: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80059bc: 6800 ldr r0, [r0, #0]
80059be: f001 f982 bl 8006cc6 <USB_WritePMA>
ep->xfer_buff += len;
80059c2: f507 7384 add.w r3, r7, #264 @ 0x108
80059c6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059ca: 681b ldr r3, [r3, #0]
80059cc: 695a ldr r2, [r3, #20]
80059ce: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80059d2: 441a add r2, r3
80059d4: f507 7384 add.w r3, r7, #264 @ 0x108
80059d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059dc: 681b ldr r3, [r3, #0]
80059de: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
80059e0: f507 7384 add.w r3, r7, #264 @ 0x108
80059e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059e8: 681b ldr r3, [r3, #0]
80059ea: 6a1a ldr r2, [r3, #32]
80059ec: f507 7384 add.w r3, r7, #264 @ 0x108
80059f0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059f4: 681b ldr r3, [r3, #0]
80059f6: 691b ldr r3, [r3, #16]
80059f8: 429a cmp r2, r3
80059fa: d90f bls.n 8005a1c <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
80059fc: f507 7384 add.w r3, r7, #264 @ 0x108
8005a00: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a04: 681b ldr r3, [r3, #0]
8005a06: 6a1a ldr r2, [r3, #32]
8005a08: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005a0c: 1ad2 subs r2, r2, r3
8005a0e: f507 7384 add.w r3, r7, #264 @ 0x108
8005a12: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a16: 681b ldr r3, [r3, #0]
8005a18: 621a str r2, [r3, #32]
8005a1a: e00e b.n 8005a3a <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
8005a1c: f507 7384 add.w r3, r7, #264 @ 0x108
8005a20: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a24: 681b ldr r3, [r3, #0]
8005a26: 6a1b ldr r3, [r3, #32]
8005a28: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8005a2c: f507 7384 add.w r3, r7, #264 @ 0x108
8005a30: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a34: 681b ldr r3, [r3, #0]
8005a36: 2200 movs r2, #0
8005a38: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8005a3a: f507 7384 add.w r3, r7, #264 @ 0x108
8005a3e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005a42: 681b ldr r3, [r3, #0]
8005a44: 643b str r3, [r7, #64] @ 0x40
8005a46: f507 7384 add.w r3, r7, #264 @ 0x108
8005a4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a4e: 681b ldr r3, [r3, #0]
8005a50: 785b ldrb r3, [r3, #1]
8005a52: 2b00 cmp r3, #0
8005a54: d177 bne.n 8005b46 <USB_EPStartXfer+0x85e>
8005a56: f507 7384 add.w r3, r7, #264 @ 0x108
8005a5a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005a5e: 681b ldr r3, [r3, #0]
8005a60: 63bb str r3, [r7, #56] @ 0x38
8005a62: f507 7384 add.w r3, r7, #264 @ 0x108
8005a66: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005a6a: 681b ldr r3, [r3, #0]
8005a6c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005a70: b29b uxth r3, r3
8005a72: 461a mov r2, r3
8005a74: 6bbb ldr r3, [r7, #56] @ 0x38
8005a76: 4413 add r3, r2
8005a78: 63bb str r3, [r7, #56] @ 0x38
8005a7a: f507 7384 add.w r3, r7, #264 @ 0x108
8005a7e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a82: 681b ldr r3, [r3, #0]
8005a84: 781b ldrb r3, [r3, #0]
8005a86: 011a lsls r2, r3, #4
8005a88: 6bbb ldr r3, [r7, #56] @ 0x38
8005a8a: 4413 add r3, r2
8005a8c: f203 430c addw r3, r3, #1036 @ 0x40c
8005a90: 637b str r3, [r7, #52] @ 0x34
8005a92: 6b7b ldr r3, [r7, #52] @ 0x34
8005a94: 881b ldrh r3, [r3, #0]
8005a96: b29b uxth r3, r3
8005a98: f3c3 0309 ubfx r3, r3, #0, #10
8005a9c: b29a uxth r2, r3
8005a9e: 6b7b ldr r3, [r7, #52] @ 0x34
8005aa0: 801a strh r2, [r3, #0]
8005aa2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005aa6: 2b3e cmp r3, #62 @ 0x3e
8005aa8: d921 bls.n 8005aee <USB_EPStartXfer+0x806>
8005aaa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005aae: 095b lsrs r3, r3, #5
8005ab0: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8005ab4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ab8: f003 031f and.w r3, r3, #31
8005abc: 2b00 cmp r3, #0
8005abe: d104 bne.n 8005aca <USB_EPStartXfer+0x7e2>
8005ac0: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8005ac4: 3b01 subs r3, #1
8005ac6: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8005aca: 6b7b ldr r3, [r7, #52] @ 0x34
8005acc: 881b ldrh r3, [r3, #0]
8005ace: b29a uxth r2, r3
8005ad0: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8005ad4: b29b uxth r3, r3
8005ad6: 029b lsls r3, r3, #10
8005ad8: b29b uxth r3, r3
8005ada: 4313 orrs r3, r2
8005adc: b29b uxth r3, r3
8005ade: ea6f 4343 mvn.w r3, r3, lsl #17
8005ae2: ea6f 4353 mvn.w r3, r3, lsr #17
8005ae6: b29a uxth r2, r3
8005ae8: 6b7b ldr r3, [r7, #52] @ 0x34
8005aea: 801a strh r2, [r3, #0]
8005aec: e050 b.n 8005b90 <USB_EPStartXfer+0x8a8>
8005aee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005af2: 2b00 cmp r3, #0
8005af4: d10a bne.n 8005b0c <USB_EPStartXfer+0x824>
8005af6: 6b7b ldr r3, [r7, #52] @ 0x34
8005af8: 881b ldrh r3, [r3, #0]
8005afa: b29b uxth r3, r3
8005afc: ea6f 4343 mvn.w r3, r3, lsl #17
8005b00: ea6f 4353 mvn.w r3, r3, lsr #17
8005b04: b29a uxth r2, r3
8005b06: 6b7b ldr r3, [r7, #52] @ 0x34
8005b08: 801a strh r2, [r3, #0]
8005b0a: e041 b.n 8005b90 <USB_EPStartXfer+0x8a8>
8005b0c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005b10: 085b lsrs r3, r3, #1
8005b12: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8005b16: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005b1a: f003 0301 and.w r3, r3, #1
8005b1e: 2b00 cmp r3, #0
8005b20: d004 beq.n 8005b2c <USB_EPStartXfer+0x844>
8005b22: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8005b26: 3301 adds r3, #1
8005b28: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8005b2c: 6b7b ldr r3, [r7, #52] @ 0x34
8005b2e: 881b ldrh r3, [r3, #0]
8005b30: b29a uxth r2, r3
8005b32: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8005b36: b29b uxth r3, r3
8005b38: 029b lsls r3, r3, #10
8005b3a: b29b uxth r3, r3
8005b3c: 4313 orrs r3, r2
8005b3e: b29a uxth r2, r3
8005b40: 6b7b ldr r3, [r7, #52] @ 0x34
8005b42: 801a strh r2, [r3, #0]
8005b44: e024 b.n 8005b90 <USB_EPStartXfer+0x8a8>
8005b46: f507 7384 add.w r3, r7, #264 @ 0x108
8005b4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b4e: 681b ldr r3, [r3, #0]
8005b50: 785b ldrb r3, [r3, #1]
8005b52: 2b01 cmp r3, #1
8005b54: d11c bne.n 8005b90 <USB_EPStartXfer+0x8a8>
8005b56: f507 7384 add.w r3, r7, #264 @ 0x108
8005b5a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005b5e: 681b ldr r3, [r3, #0]
8005b60: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005b64: b29b uxth r3, r3
8005b66: 461a mov r2, r3
8005b68: 6c3b ldr r3, [r7, #64] @ 0x40
8005b6a: 4413 add r3, r2
8005b6c: 643b str r3, [r7, #64] @ 0x40
8005b6e: f507 7384 add.w r3, r7, #264 @ 0x108
8005b72: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b76: 681b ldr r3, [r3, #0]
8005b78: 781b ldrb r3, [r3, #0]
8005b7a: 011a lsls r2, r3, #4
8005b7c: 6c3b ldr r3, [r7, #64] @ 0x40
8005b7e: 4413 add r3, r2
8005b80: f203 430c addw r3, r3, #1036 @ 0x40c
8005b84: 63fb str r3, [r7, #60] @ 0x3c
8005b86: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005b8a: b29a uxth r2, r3
8005b8c: 6bfb ldr r3, [r7, #60] @ 0x3c
8005b8e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8005b90: f507 7384 add.w r3, r7, #264 @ 0x108
8005b94: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b98: 681b ldr r3, [r3, #0]
8005b9a: 895b ldrh r3, [r3, #10]
8005b9c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005ba0: f507 7384 add.w r3, r7, #264 @ 0x108
8005ba4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005ba8: 681b ldr r3, [r3, #0]
8005baa: 6959 ldr r1, [r3, #20]
8005bac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005bb0: b29b uxth r3, r3
8005bb2: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005bb6: f507 7084 add.w r0, r7, #264 @ 0x108
8005bba: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005bbe: 6800 ldr r0, [r0, #0]
8005bc0: f001 f881 bl 8006cc6 <USB_WritePMA>
8005bc4: e227 b.n 8006016 <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
8005bc6: f507 7384 add.w r3, r7, #264 @ 0x108
8005bca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005bce: 681b ldr r3, [r3, #0]
8005bd0: 6a1b ldr r3, [r3, #32]
8005bd2: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
8005bd6: f507 7384 add.w r3, r7, #264 @ 0x108
8005bda: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005bde: 681a ldr r2, [r3, #0]
8005be0: f507 7384 add.w r3, r7, #264 @ 0x108
8005be4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005be8: 681b ldr r3, [r3, #0]
8005bea: 781b ldrb r3, [r3, #0]
8005bec: 009b lsls r3, r3, #2
8005bee: 4413 add r3, r2
8005bf0: 881b ldrh r3, [r3, #0]
8005bf2: b29b uxth r3, r3
8005bf4: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8005bf8: f023 0370 bic.w r3, r3, #112 @ 0x70
8005bfc: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
8005c00: f507 7384 add.w r3, r7, #264 @ 0x108
8005c04: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005c08: 681a ldr r2, [r3, #0]
8005c0a: f507 7384 add.w r3, r7, #264 @ 0x108
8005c0e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c12: 681b ldr r3, [r3, #0]
8005c14: 781b ldrb r3, [r3, #0]
8005c16: 009b lsls r3, r3, #2
8005c18: 441a add r2, r3
8005c1a: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8005c1e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005c22: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005c26: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005c2a: f043 0380 orr.w r3, r3, #128 @ 0x80
8005c2e: b29b uxth r3, r3
8005c30: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8005c32: f507 7384 add.w r3, r7, #264 @ 0x108
8005c36: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005c3a: 681b ldr r3, [r3, #0]
8005c3c: 65fb str r3, [r7, #92] @ 0x5c
8005c3e: f507 7384 add.w r3, r7, #264 @ 0x108
8005c42: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005c46: 681b ldr r3, [r3, #0]
8005c48: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005c4c: b29b uxth r3, r3
8005c4e: 461a mov r2, r3
8005c50: 6dfb ldr r3, [r7, #92] @ 0x5c
8005c52: 4413 add r3, r2
8005c54: 65fb str r3, [r7, #92] @ 0x5c
8005c56: f507 7384 add.w r3, r7, #264 @ 0x108
8005c5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c5e: 681b ldr r3, [r3, #0]
8005c60: 781b ldrb r3, [r3, #0]
8005c62: 011a lsls r2, r3, #4
8005c64: 6dfb ldr r3, [r7, #92] @ 0x5c
8005c66: 4413 add r3, r2
8005c68: f203 4304 addw r3, r3, #1028 @ 0x404
8005c6c: 65bb str r3, [r7, #88] @ 0x58
8005c6e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005c72: b29a uxth r2, r3
8005c74: 6dbb ldr r3, [r7, #88] @ 0x58
8005c76: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8005c78: f507 7384 add.w r3, r7, #264 @ 0x108
8005c7c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c80: 681b ldr r3, [r3, #0]
8005c82: 891b ldrh r3, [r3, #8]
8005c84: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005c88: f507 7384 add.w r3, r7, #264 @ 0x108
8005c8c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c90: 681b ldr r3, [r3, #0]
8005c92: 6959 ldr r1, [r3, #20]
8005c94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005c98: b29b uxth r3, r3
8005c9a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005c9e: f507 7084 add.w r0, r7, #264 @ 0x108
8005ca2: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005ca6: 6800 ldr r0, [r0, #0]
8005ca8: f001 f80d bl 8006cc6 <USB_WritePMA>
8005cac: e1b3 b.n 8006016 <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8005cae: f507 7384 add.w r3, r7, #264 @ 0x108
8005cb2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005cb6: 681b ldr r3, [r3, #0]
8005cb8: 6a1a ldr r2, [r3, #32]
8005cba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005cbe: 1ad2 subs r2, r2, r3
8005cc0: f507 7384 add.w r3, r7, #264 @ 0x108
8005cc4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005cc8: 681b ldr r3, [r3, #0]
8005cca: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8005ccc: f507 7384 add.w r3, r7, #264 @ 0x108
8005cd0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005cd4: 681a ldr r2, [r3, #0]
8005cd6: f507 7384 add.w r3, r7, #264 @ 0x108
8005cda: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005cde: 681b ldr r3, [r3, #0]
8005ce0: 781b ldrb r3, [r3, #0]
8005ce2: 009b lsls r3, r3, #2
8005ce4: 4413 add r3, r2
8005ce6: 881b ldrh r3, [r3, #0]
8005ce8: b29b uxth r3, r3
8005cea: f003 0340 and.w r3, r3, #64 @ 0x40
8005cee: 2b00 cmp r3, #0
8005cf0: f000 80c6 beq.w 8005e80 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8005cf4: f507 7384 add.w r3, r7, #264 @ 0x108
8005cf8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005cfc: 681b ldr r3, [r3, #0]
8005cfe: 673b str r3, [r7, #112] @ 0x70
8005d00: f507 7384 add.w r3, r7, #264 @ 0x108
8005d04: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d08: 681b ldr r3, [r3, #0]
8005d0a: 785b ldrb r3, [r3, #1]
8005d0c: 2b00 cmp r3, #0
8005d0e: d177 bne.n 8005e00 <USB_EPStartXfer+0xb18>
8005d10: f507 7384 add.w r3, r7, #264 @ 0x108
8005d14: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005d18: 681b ldr r3, [r3, #0]
8005d1a: 66bb str r3, [r7, #104] @ 0x68
8005d1c: f507 7384 add.w r3, r7, #264 @ 0x108
8005d20: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005d24: 681b ldr r3, [r3, #0]
8005d26: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005d2a: b29b uxth r3, r3
8005d2c: 461a mov r2, r3
8005d2e: 6ebb ldr r3, [r7, #104] @ 0x68
8005d30: 4413 add r3, r2
8005d32: 66bb str r3, [r7, #104] @ 0x68
8005d34: f507 7384 add.w r3, r7, #264 @ 0x108
8005d38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d3c: 681b ldr r3, [r3, #0]
8005d3e: 781b ldrb r3, [r3, #0]
8005d40: 011a lsls r2, r3, #4
8005d42: 6ebb ldr r3, [r7, #104] @ 0x68
8005d44: 4413 add r3, r2
8005d46: f203 430c addw r3, r3, #1036 @ 0x40c
8005d4a: 667b str r3, [r7, #100] @ 0x64
8005d4c: 6e7b ldr r3, [r7, #100] @ 0x64
8005d4e: 881b ldrh r3, [r3, #0]
8005d50: b29b uxth r3, r3
8005d52: f3c3 0309 ubfx r3, r3, #0, #10
8005d56: b29a uxth r2, r3
8005d58: 6e7b ldr r3, [r7, #100] @ 0x64
8005d5a: 801a strh r2, [r3, #0]
8005d5c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005d60: 2b3e cmp r3, #62 @ 0x3e
8005d62: d921 bls.n 8005da8 <USB_EPStartXfer+0xac0>
8005d64: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005d68: 095b lsrs r3, r3, #5
8005d6a: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8005d6e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005d72: f003 031f and.w r3, r3, #31
8005d76: 2b00 cmp r3, #0
8005d78: d104 bne.n 8005d84 <USB_EPStartXfer+0xa9c>
8005d7a: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005d7e: 3b01 subs r3, #1
8005d80: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8005d84: 6e7b ldr r3, [r7, #100] @ 0x64
8005d86: 881b ldrh r3, [r3, #0]
8005d88: b29a uxth r2, r3
8005d8a: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005d8e: b29b uxth r3, r3
8005d90: 029b lsls r3, r3, #10
8005d92: b29b uxth r3, r3
8005d94: 4313 orrs r3, r2
8005d96: b29b uxth r3, r3
8005d98: ea6f 4343 mvn.w r3, r3, lsl #17
8005d9c: ea6f 4353 mvn.w r3, r3, lsr #17
8005da0: b29a uxth r2, r3
8005da2: 6e7b ldr r3, [r7, #100] @ 0x64
8005da4: 801a strh r2, [r3, #0]
8005da6: e050 b.n 8005e4a <USB_EPStartXfer+0xb62>
8005da8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005dac: 2b00 cmp r3, #0
8005dae: d10a bne.n 8005dc6 <USB_EPStartXfer+0xade>
8005db0: 6e7b ldr r3, [r7, #100] @ 0x64
8005db2: 881b ldrh r3, [r3, #0]
8005db4: b29b uxth r3, r3
8005db6: ea6f 4343 mvn.w r3, r3, lsl #17
8005dba: ea6f 4353 mvn.w r3, r3, lsr #17
8005dbe: b29a uxth r2, r3
8005dc0: 6e7b ldr r3, [r7, #100] @ 0x64
8005dc2: 801a strh r2, [r3, #0]
8005dc4: e041 b.n 8005e4a <USB_EPStartXfer+0xb62>
8005dc6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005dca: 085b lsrs r3, r3, #1
8005dcc: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8005dd0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005dd4: f003 0301 and.w r3, r3, #1
8005dd8: 2b00 cmp r3, #0
8005dda: d004 beq.n 8005de6 <USB_EPStartXfer+0xafe>
8005ddc: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005de0: 3301 adds r3, #1
8005de2: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8005de6: 6e7b ldr r3, [r7, #100] @ 0x64
8005de8: 881b ldrh r3, [r3, #0]
8005dea: b29a uxth r2, r3
8005dec: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005df0: b29b uxth r3, r3
8005df2: 029b lsls r3, r3, #10
8005df4: b29b uxth r3, r3
8005df6: 4313 orrs r3, r2
8005df8: b29a uxth r2, r3
8005dfa: 6e7b ldr r3, [r7, #100] @ 0x64
8005dfc: 801a strh r2, [r3, #0]
8005dfe: e024 b.n 8005e4a <USB_EPStartXfer+0xb62>
8005e00: f507 7384 add.w r3, r7, #264 @ 0x108
8005e04: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e08: 681b ldr r3, [r3, #0]
8005e0a: 785b ldrb r3, [r3, #1]
8005e0c: 2b01 cmp r3, #1
8005e0e: d11c bne.n 8005e4a <USB_EPStartXfer+0xb62>
8005e10: f507 7384 add.w r3, r7, #264 @ 0x108
8005e14: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005e18: 681b ldr r3, [r3, #0]
8005e1a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005e1e: b29b uxth r3, r3
8005e20: 461a mov r2, r3
8005e22: 6f3b ldr r3, [r7, #112] @ 0x70
8005e24: 4413 add r3, r2
8005e26: 673b str r3, [r7, #112] @ 0x70
8005e28: f507 7384 add.w r3, r7, #264 @ 0x108
8005e2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e30: 681b ldr r3, [r3, #0]
8005e32: 781b ldrb r3, [r3, #0]
8005e34: 011a lsls r2, r3, #4
8005e36: 6f3b ldr r3, [r7, #112] @ 0x70
8005e38: 4413 add r3, r2
8005e3a: f203 430c addw r3, r3, #1036 @ 0x40c
8005e3e: 66fb str r3, [r7, #108] @ 0x6c
8005e40: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005e44: b29a uxth r2, r3
8005e46: 6efb ldr r3, [r7, #108] @ 0x6c
8005e48: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8005e4a: f507 7384 add.w r3, r7, #264 @ 0x108
8005e4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e52: 681b ldr r3, [r3, #0]
8005e54: 895b ldrh r3, [r3, #10]
8005e56: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005e5a: f507 7384 add.w r3, r7, #264 @ 0x108
8005e5e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e62: 681b ldr r3, [r3, #0]
8005e64: 6959 ldr r1, [r3, #20]
8005e66: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005e6a: b29b uxth r3, r3
8005e6c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005e70: f507 7084 add.w r0, r7, #264 @ 0x108
8005e74: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005e78: 6800 ldr r0, [r0, #0]
8005e7a: f000 ff24 bl 8006cc6 <USB_WritePMA>
8005e7e: e0ca b.n 8006016 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8005e80: f507 7384 add.w r3, r7, #264 @ 0x108
8005e84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e88: 681b ldr r3, [r3, #0]
8005e8a: 785b ldrb r3, [r3, #1]
8005e8c: 2b00 cmp r3, #0
8005e8e: d177 bne.n 8005f80 <USB_EPStartXfer+0xc98>
8005e90: f507 7384 add.w r3, r7, #264 @ 0x108
8005e94: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005e98: 681b ldr r3, [r3, #0]
8005e9a: 67fb str r3, [r7, #124] @ 0x7c
8005e9c: f507 7384 add.w r3, r7, #264 @ 0x108
8005ea0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005ea4: 681b ldr r3, [r3, #0]
8005ea6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005eaa: b29b uxth r3, r3
8005eac: 461a mov r2, r3
8005eae: 6ffb ldr r3, [r7, #124] @ 0x7c
8005eb0: 4413 add r3, r2
8005eb2: 67fb str r3, [r7, #124] @ 0x7c
8005eb4: f507 7384 add.w r3, r7, #264 @ 0x108
8005eb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005ebc: 681b ldr r3, [r3, #0]
8005ebe: 781b ldrb r3, [r3, #0]
8005ec0: 011a lsls r2, r3, #4
8005ec2: 6ffb ldr r3, [r7, #124] @ 0x7c
8005ec4: 4413 add r3, r2
8005ec6: f203 4304 addw r3, r3, #1028 @ 0x404
8005eca: 67bb str r3, [r7, #120] @ 0x78
8005ecc: 6fbb ldr r3, [r7, #120] @ 0x78
8005ece: 881b ldrh r3, [r3, #0]
8005ed0: b29b uxth r3, r3
8005ed2: f3c3 0309 ubfx r3, r3, #0, #10
8005ed6: b29a uxth r2, r3
8005ed8: 6fbb ldr r3, [r7, #120] @ 0x78
8005eda: 801a strh r2, [r3, #0]
8005edc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ee0: 2b3e cmp r3, #62 @ 0x3e
8005ee2: d921 bls.n 8005f28 <USB_EPStartXfer+0xc40>
8005ee4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ee8: 095b lsrs r3, r3, #5
8005eea: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8005eee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ef2: f003 031f and.w r3, r3, #31
8005ef6: 2b00 cmp r3, #0
8005ef8: d104 bne.n 8005f04 <USB_EPStartXfer+0xc1c>
8005efa: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8005efe: 3b01 subs r3, #1
8005f00: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8005f04: 6fbb ldr r3, [r7, #120] @ 0x78
8005f06: 881b ldrh r3, [r3, #0]
8005f08: b29a uxth r2, r3
8005f0a: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8005f0e: b29b uxth r3, r3
8005f10: 029b lsls r3, r3, #10
8005f12: b29b uxth r3, r3
8005f14: 4313 orrs r3, r2
8005f16: b29b uxth r3, r3
8005f18: ea6f 4343 mvn.w r3, r3, lsl #17
8005f1c: ea6f 4353 mvn.w r3, r3, lsr #17
8005f20: b29a uxth r2, r3
8005f22: 6fbb ldr r3, [r7, #120] @ 0x78
8005f24: 801a strh r2, [r3, #0]
8005f26: e05c b.n 8005fe2 <USB_EPStartXfer+0xcfa>
8005f28: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005f2c: 2b00 cmp r3, #0
8005f2e: d10a bne.n 8005f46 <USB_EPStartXfer+0xc5e>
8005f30: 6fbb ldr r3, [r7, #120] @ 0x78
8005f32: 881b ldrh r3, [r3, #0]
8005f34: b29b uxth r3, r3
8005f36: ea6f 4343 mvn.w r3, r3, lsl #17
8005f3a: ea6f 4353 mvn.w r3, r3, lsr #17
8005f3e: b29a uxth r2, r3
8005f40: 6fbb ldr r3, [r7, #120] @ 0x78
8005f42: 801a strh r2, [r3, #0]
8005f44: e04d b.n 8005fe2 <USB_EPStartXfer+0xcfa>
8005f46: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005f4a: 085b lsrs r3, r3, #1
8005f4c: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8005f50: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005f54: f003 0301 and.w r3, r3, #1
8005f58: 2b00 cmp r3, #0
8005f5a: d004 beq.n 8005f66 <USB_EPStartXfer+0xc7e>
8005f5c: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8005f60: 3301 adds r3, #1
8005f62: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8005f66: 6fbb ldr r3, [r7, #120] @ 0x78
8005f68: 881b ldrh r3, [r3, #0]
8005f6a: b29a uxth r2, r3
8005f6c: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8005f70: b29b uxth r3, r3
8005f72: 029b lsls r3, r3, #10
8005f74: b29b uxth r3, r3
8005f76: 4313 orrs r3, r2
8005f78: b29a uxth r2, r3
8005f7a: 6fbb ldr r3, [r7, #120] @ 0x78
8005f7c: 801a strh r2, [r3, #0]
8005f7e: e030 b.n 8005fe2 <USB_EPStartXfer+0xcfa>
8005f80: f507 7384 add.w r3, r7, #264 @ 0x108
8005f84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005f88: 681b ldr r3, [r3, #0]
8005f8a: 785b ldrb r3, [r3, #1]
8005f8c: 2b01 cmp r3, #1
8005f8e: d128 bne.n 8005fe2 <USB_EPStartXfer+0xcfa>
8005f90: f507 7384 add.w r3, r7, #264 @ 0x108
8005f94: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005f98: 681b ldr r3, [r3, #0]
8005f9a: f8c7 3084 str.w r3, [r7, #132] @ 0x84
8005f9e: f507 7384 add.w r3, r7, #264 @ 0x108
8005fa2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005fa6: 681b ldr r3, [r3, #0]
8005fa8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005fac: b29b uxth r3, r3
8005fae: 461a mov r2, r3
8005fb0: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
8005fb4: 4413 add r3, r2
8005fb6: f8c7 3084 str.w r3, [r7, #132] @ 0x84
8005fba: f507 7384 add.w r3, r7, #264 @ 0x108
8005fbe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005fc2: 681b ldr r3, [r3, #0]
8005fc4: 781b ldrb r3, [r3, #0]
8005fc6: 011a lsls r2, r3, #4
8005fc8: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
8005fcc: 4413 add r3, r2
8005fce: f203 4304 addw r3, r3, #1028 @ 0x404
8005fd2: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8005fd6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005fda: b29a uxth r2, r3
8005fdc: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8005fe0: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8005fe2: f507 7384 add.w r3, r7, #264 @ 0x108
8005fe6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005fea: 681b ldr r3, [r3, #0]
8005fec: 891b ldrh r3, [r3, #8]
8005fee: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005ff2: f507 7384 add.w r3, r7, #264 @ 0x108
8005ff6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005ffa: 681b ldr r3, [r3, #0]
8005ffc: 6959 ldr r1, [r3, #20]
8005ffe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006002: b29b uxth r3, r3
8006004: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8006008: f507 7084 add.w r0, r7, #264 @ 0x108
800600c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8006010: 6800 ldr r0, [r0, #0]
8006012: f000 fe58 bl 8006cc6 <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
8006016: f507 7384 add.w r3, r7, #264 @ 0x108
800601a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800601e: 681a ldr r2, [r3, #0]
8006020: f507 7384 add.w r3, r7, #264 @ 0x108
8006024: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006028: 681b ldr r3, [r3, #0]
800602a: 781b ldrb r3, [r3, #0]
800602c: 009b lsls r3, r3, #2
800602e: 4413 add r3, r2
8006030: 881b ldrh r3, [r3, #0]
8006032: b29b uxth r3, r3
8006034: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006038: f023 0340 bic.w r3, r3, #64 @ 0x40
800603c: 817b strh r3, [r7, #10]
800603e: 897b ldrh r3, [r7, #10]
8006040: f083 0310 eor.w r3, r3, #16
8006044: 817b strh r3, [r7, #10]
8006046: 897b ldrh r3, [r7, #10]
8006048: f083 0320 eor.w r3, r3, #32
800604c: 817b strh r3, [r7, #10]
800604e: f507 7384 add.w r3, r7, #264 @ 0x108
8006052: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006056: 681a ldr r2, [r3, #0]
8006058: f507 7384 add.w r3, r7, #264 @ 0x108
800605c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006060: 681b ldr r3, [r3, #0]
8006062: 781b ldrb r3, [r3, #0]
8006064: 009b lsls r3, r3, #2
8006066: 441a add r2, r3
8006068: 897b ldrh r3, [r7, #10]
800606a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800606e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006072: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006076: f043 0380 orr.w r3, r3, #128 @ 0x80
800607a: b29b uxth r3, r3
800607c: 8013 strh r3, [r2, #0]
800607e: f000 bcde b.w 8006a3e <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
8006082: f507 7384 add.w r3, r7, #264 @ 0x108
8006086: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800608a: 681b ldr r3, [r3, #0]
800608c: 7b1b ldrb r3, [r3, #12]
800608e: 2b00 cmp r3, #0
8006090: f040 80bb bne.w 800620a <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8006094: f507 7384 add.w r3, r7, #264 @ 0x108
8006098: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800609c: 681b ldr r3, [r3, #0]
800609e: 699a ldr r2, [r3, #24]
80060a0: f507 7384 add.w r3, r7, #264 @ 0x108
80060a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80060a8: 681b ldr r3, [r3, #0]
80060aa: 691b ldr r3, [r3, #16]
80060ac: 429a cmp r2, r3
80060ae: d917 bls.n 80060e0 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
80060b0: f507 7384 add.w r3, r7, #264 @ 0x108
80060b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80060b8: 681b ldr r3, [r3, #0]
80060ba: 691b ldr r3, [r3, #16]
80060bc: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
80060c0: f507 7384 add.w r3, r7, #264 @ 0x108
80060c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80060c8: 681b ldr r3, [r3, #0]
80060ca: 699a ldr r2, [r3, #24]
80060cc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80060d0: 1ad2 subs r2, r2, r3
80060d2: f507 7384 add.w r3, r7, #264 @ 0x108
80060d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80060da: 681b ldr r3, [r3, #0]
80060dc: 619a str r2, [r3, #24]
80060de: e00e b.n 80060fe <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
80060e0: f507 7384 add.w r3, r7, #264 @ 0x108
80060e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80060e8: 681b ldr r3, [r3, #0]
80060ea: 699b ldr r3, [r3, #24]
80060ec: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
80060f0: f507 7384 add.w r3, r7, #264 @ 0x108
80060f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80060f8: 681b ldr r3, [r3, #0]
80060fa: 2200 movs r2, #0
80060fc: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
80060fe: f507 7384 add.w r3, r7, #264 @ 0x108
8006102: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006106: 681b ldr r3, [r3, #0]
8006108: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800610c: f507 7384 add.w r3, r7, #264 @ 0x108
8006110: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006114: 681b ldr r3, [r3, #0]
8006116: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800611a: b29b uxth r3, r3
800611c: 461a mov r2, r3
800611e: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
8006122: 4413 add r3, r2
8006124: f8c7 3090 str.w r3, [r7, #144] @ 0x90
8006128: f507 7384 add.w r3, r7, #264 @ 0x108
800612c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006130: 681b ldr r3, [r3, #0]
8006132: 781b ldrb r3, [r3, #0]
8006134: 011a lsls r2, r3, #4
8006136: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800613a: 4413 add r3, r2
800613c: f203 430c addw r3, r3, #1036 @ 0x40c
8006140: f8c7 308c str.w r3, [r7, #140] @ 0x8c
8006144: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006148: 881b ldrh r3, [r3, #0]
800614a: b29b uxth r3, r3
800614c: f3c3 0309 ubfx r3, r3, #0, #10
8006150: b29a uxth r2, r3
8006152: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006156: 801a strh r2, [r3, #0]
8006158: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800615c: 2b3e cmp r3, #62 @ 0x3e
800615e: d924 bls.n 80061aa <USB_EPStartXfer+0xec2>
8006160: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006164: 095b lsrs r3, r3, #5
8006166: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800616a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800616e: f003 031f and.w r3, r3, #31
8006172: 2b00 cmp r3, #0
8006174: d104 bne.n 8006180 <USB_EPStartXfer+0xe98>
8006176: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800617a: 3b01 subs r3, #1
800617c: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8006180: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006184: 881b ldrh r3, [r3, #0]
8006186: b29a uxth r2, r3
8006188: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800618c: b29b uxth r3, r3
800618e: 029b lsls r3, r3, #10
8006190: b29b uxth r3, r3
8006192: 4313 orrs r3, r2
8006194: b29b uxth r3, r3
8006196: ea6f 4343 mvn.w r3, r3, lsl #17
800619a: ea6f 4353 mvn.w r3, r3, lsr #17
800619e: b29a uxth r2, r3
80061a0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80061a4: 801a strh r2, [r3, #0]
80061a6: f000 bc10 b.w 80069ca <USB_EPStartXfer+0x16e2>
80061aa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80061ae: 2b00 cmp r3, #0
80061b0: d10c bne.n 80061cc <USB_EPStartXfer+0xee4>
80061b2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80061b6: 881b ldrh r3, [r3, #0]
80061b8: b29b uxth r3, r3
80061ba: ea6f 4343 mvn.w r3, r3, lsl #17
80061be: ea6f 4353 mvn.w r3, r3, lsr #17
80061c2: b29a uxth r2, r3
80061c4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80061c8: 801a strh r2, [r3, #0]
80061ca: e3fe b.n 80069ca <USB_EPStartXfer+0x16e2>
80061cc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80061d0: 085b lsrs r3, r3, #1
80061d2: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
80061d6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80061da: f003 0301 and.w r3, r3, #1
80061de: 2b00 cmp r3, #0
80061e0: d004 beq.n 80061ec <USB_EPStartXfer+0xf04>
80061e2: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
80061e6: 3301 adds r3, #1
80061e8: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
80061ec: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80061f0: 881b ldrh r3, [r3, #0]
80061f2: b29a uxth r2, r3
80061f4: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
80061f8: b29b uxth r3, r3
80061fa: 029b lsls r3, r3, #10
80061fc: b29b uxth r3, r3
80061fe: 4313 orrs r3, r2
8006200: b29a uxth r2, r3
8006202: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006206: 801a strh r2, [r3, #0]
8006208: e3df b.n 80069ca <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
800620a: f507 7384 add.w r3, r7, #264 @ 0x108
800620e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006212: 681b ldr r3, [r3, #0]
8006214: 78db ldrb r3, [r3, #3]
8006216: 2b02 cmp r3, #2
8006218: f040 8218 bne.w 800664c <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
800621c: f507 7384 add.w r3, r7, #264 @ 0x108
8006220: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006224: 681b ldr r3, [r3, #0]
8006226: 785b ldrb r3, [r3, #1]
8006228: 2b00 cmp r3, #0
800622a: f040 809d bne.w 8006368 <USB_EPStartXfer+0x1080>
800622e: f507 7384 add.w r3, r7, #264 @ 0x108
8006232: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006236: 681b ldr r3, [r3, #0]
8006238: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800623c: f507 7384 add.w r3, r7, #264 @ 0x108
8006240: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006244: 681b ldr r3, [r3, #0]
8006246: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800624a: b29b uxth r3, r3
800624c: 461a mov r2, r3
800624e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8006252: 4413 add r3, r2
8006254: f8c7 30ac str.w r3, [r7, #172] @ 0xac
8006258: f507 7384 add.w r3, r7, #264 @ 0x108
800625c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006260: 681b ldr r3, [r3, #0]
8006262: 781b ldrb r3, [r3, #0]
8006264: 011a lsls r2, r3, #4
8006266: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800626a: 4413 add r3, r2
800626c: f203 4304 addw r3, r3, #1028 @ 0x404
8006270: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
8006274: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8006278: 881b ldrh r3, [r3, #0]
800627a: b29b uxth r3, r3
800627c: f3c3 0309 ubfx r3, r3, #0, #10
8006280: b29a uxth r2, r3
8006282: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8006286: 801a strh r2, [r3, #0]
8006288: f507 7384 add.w r3, r7, #264 @ 0x108
800628c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006290: 681b ldr r3, [r3, #0]
8006292: 691b ldr r3, [r3, #16]
8006294: 2b3e cmp r3, #62 @ 0x3e
8006296: d92b bls.n 80062f0 <USB_EPStartXfer+0x1008>
8006298: f507 7384 add.w r3, r7, #264 @ 0x108
800629c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80062a0: 681b ldr r3, [r3, #0]
80062a2: 691b ldr r3, [r3, #16]
80062a4: 095b lsrs r3, r3, #5
80062a6: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
80062aa: f507 7384 add.w r3, r7, #264 @ 0x108
80062ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80062b2: 681b ldr r3, [r3, #0]
80062b4: 691b ldr r3, [r3, #16]
80062b6: f003 031f and.w r3, r3, #31
80062ba: 2b00 cmp r3, #0
80062bc: d104 bne.n 80062c8 <USB_EPStartXfer+0xfe0>
80062be: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
80062c2: 3b01 subs r3, #1
80062c4: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
80062c8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80062cc: 881b ldrh r3, [r3, #0]
80062ce: b29a uxth r2, r3
80062d0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
80062d4: b29b uxth r3, r3
80062d6: 029b lsls r3, r3, #10
80062d8: b29b uxth r3, r3
80062da: 4313 orrs r3, r2
80062dc: b29b uxth r3, r3
80062de: ea6f 4343 mvn.w r3, r3, lsl #17
80062e2: ea6f 4353 mvn.w r3, r3, lsr #17
80062e6: b29a uxth r2, r3
80062e8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80062ec: 801a strh r2, [r3, #0]
80062ee: e070 b.n 80063d2 <USB_EPStartXfer+0x10ea>
80062f0: f507 7384 add.w r3, r7, #264 @ 0x108
80062f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80062f8: 681b ldr r3, [r3, #0]
80062fa: 691b ldr r3, [r3, #16]
80062fc: 2b00 cmp r3, #0
80062fe: d10c bne.n 800631a <USB_EPStartXfer+0x1032>
8006300: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8006304: 881b ldrh r3, [r3, #0]
8006306: b29b uxth r3, r3
8006308: ea6f 4343 mvn.w r3, r3, lsl #17
800630c: ea6f 4353 mvn.w r3, r3, lsr #17
8006310: b29a uxth r2, r3
8006312: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8006316: 801a strh r2, [r3, #0]
8006318: e05b b.n 80063d2 <USB_EPStartXfer+0x10ea>
800631a: f507 7384 add.w r3, r7, #264 @ 0x108
800631e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006322: 681b ldr r3, [r3, #0]
8006324: 691b ldr r3, [r3, #16]
8006326: 085b lsrs r3, r3, #1
8006328: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800632c: f507 7384 add.w r3, r7, #264 @ 0x108
8006330: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006334: 681b ldr r3, [r3, #0]
8006336: 691b ldr r3, [r3, #16]
8006338: f003 0301 and.w r3, r3, #1
800633c: 2b00 cmp r3, #0
800633e: d004 beq.n 800634a <USB_EPStartXfer+0x1062>
8006340: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8006344: 3301 adds r3, #1
8006346: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800634a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800634e: 881b ldrh r3, [r3, #0]
8006350: b29a uxth r2, r3
8006352: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8006356: b29b uxth r3, r3
8006358: 029b lsls r3, r3, #10
800635a: b29b uxth r3, r3
800635c: 4313 orrs r3, r2
800635e: b29a uxth r2, r3
8006360: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8006364: 801a strh r2, [r3, #0]
8006366: e034 b.n 80063d2 <USB_EPStartXfer+0x10ea>
8006368: f507 7384 add.w r3, r7, #264 @ 0x108
800636c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006370: 681b ldr r3, [r3, #0]
8006372: 785b ldrb r3, [r3, #1]
8006374: 2b01 cmp r3, #1
8006376: d12c bne.n 80063d2 <USB_EPStartXfer+0x10ea>
8006378: f507 7384 add.w r3, r7, #264 @ 0x108
800637c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006380: 681b ldr r3, [r3, #0]
8006382: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8006386: f507 7384 add.w r3, r7, #264 @ 0x108
800638a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800638e: 681b ldr r3, [r3, #0]
8006390: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006394: b29b uxth r3, r3
8006396: 461a mov r2, r3
8006398: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800639c: 4413 add r3, r2
800639e: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
80063a2: f507 7384 add.w r3, r7, #264 @ 0x108
80063a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80063aa: 681b ldr r3, [r3, #0]
80063ac: 781b ldrb r3, [r3, #0]
80063ae: 011a lsls r2, r3, #4
80063b0: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
80063b4: 4413 add r3, r2
80063b6: f203 4304 addw r3, r3, #1028 @ 0x404
80063ba: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
80063be: f507 7384 add.w r3, r7, #264 @ 0x108
80063c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80063c6: 681b ldr r3, [r3, #0]
80063c8: 691b ldr r3, [r3, #16]
80063ca: b29a uxth r2, r3
80063cc: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
80063d0: 801a strh r2, [r3, #0]
80063d2: f507 7384 add.w r3, r7, #264 @ 0x108
80063d6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80063da: 681b ldr r3, [r3, #0]
80063dc: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
80063e0: f507 7384 add.w r3, r7, #264 @ 0x108
80063e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80063e8: 681b ldr r3, [r3, #0]
80063ea: 785b ldrb r3, [r3, #1]
80063ec: 2b00 cmp r3, #0
80063ee: f040 809d bne.w 800652c <USB_EPStartXfer+0x1244>
80063f2: f507 7384 add.w r3, r7, #264 @ 0x108
80063f6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80063fa: 681b ldr r3, [r3, #0]
80063fc: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8006400: f507 7384 add.w r3, r7, #264 @ 0x108
8006404: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006408: 681b ldr r3, [r3, #0]
800640a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800640e: b29b uxth r3, r3
8006410: 461a mov r2, r3
8006412: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8006416: 4413 add r3, r2
8006418: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800641c: f507 7384 add.w r3, r7, #264 @ 0x108
8006420: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006424: 681b ldr r3, [r3, #0]
8006426: 781b ldrb r3, [r3, #0]
8006428: 011a lsls r2, r3, #4
800642a: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800642e: 4413 add r3, r2
8006430: f203 430c addw r3, r3, #1036 @ 0x40c
8006434: f8c7 3098 str.w r3, [r7, #152] @ 0x98
8006438: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800643c: 881b ldrh r3, [r3, #0]
800643e: b29b uxth r3, r3
8006440: f3c3 0309 ubfx r3, r3, #0, #10
8006444: b29a uxth r2, r3
8006446: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800644a: 801a strh r2, [r3, #0]
800644c: f507 7384 add.w r3, r7, #264 @ 0x108
8006450: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006454: 681b ldr r3, [r3, #0]
8006456: 691b ldr r3, [r3, #16]
8006458: 2b3e cmp r3, #62 @ 0x3e
800645a: d92b bls.n 80064b4 <USB_EPStartXfer+0x11cc>
800645c: f507 7384 add.w r3, r7, #264 @ 0x108
8006460: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006464: 681b ldr r3, [r3, #0]
8006466: 691b ldr r3, [r3, #16]
8006468: 095b lsrs r3, r3, #5
800646a: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800646e: f507 7384 add.w r3, r7, #264 @ 0x108
8006472: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006476: 681b ldr r3, [r3, #0]
8006478: 691b ldr r3, [r3, #16]
800647a: f003 031f and.w r3, r3, #31
800647e: 2b00 cmp r3, #0
8006480: d104 bne.n 800648c <USB_EPStartXfer+0x11a4>
8006482: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8006486: 3b01 subs r3, #1
8006488: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800648c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8006490: 881b ldrh r3, [r3, #0]
8006492: b29a uxth r2, r3
8006494: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8006498: b29b uxth r3, r3
800649a: 029b lsls r3, r3, #10
800649c: b29b uxth r3, r3
800649e: 4313 orrs r3, r2
80064a0: b29b uxth r3, r3
80064a2: ea6f 4343 mvn.w r3, r3, lsl #17
80064a6: ea6f 4353 mvn.w r3, r3, lsr #17
80064aa: b29a uxth r2, r3
80064ac: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
80064b0: 801a strh r2, [r3, #0]
80064b2: e069 b.n 8006588 <USB_EPStartXfer+0x12a0>
80064b4: f507 7384 add.w r3, r7, #264 @ 0x108
80064b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80064bc: 681b ldr r3, [r3, #0]
80064be: 691b ldr r3, [r3, #16]
80064c0: 2b00 cmp r3, #0
80064c2: d10c bne.n 80064de <USB_EPStartXfer+0x11f6>
80064c4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
80064c8: 881b ldrh r3, [r3, #0]
80064ca: b29b uxth r3, r3
80064cc: ea6f 4343 mvn.w r3, r3, lsl #17
80064d0: ea6f 4353 mvn.w r3, r3, lsr #17
80064d4: b29a uxth r2, r3
80064d6: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
80064da: 801a strh r2, [r3, #0]
80064dc: e054 b.n 8006588 <USB_EPStartXfer+0x12a0>
80064de: f507 7384 add.w r3, r7, #264 @ 0x108
80064e2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80064e6: 681b ldr r3, [r3, #0]
80064e8: 691b ldr r3, [r3, #16]
80064ea: 085b lsrs r3, r3, #1
80064ec: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
80064f0: f507 7384 add.w r3, r7, #264 @ 0x108
80064f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80064f8: 681b ldr r3, [r3, #0]
80064fa: 691b ldr r3, [r3, #16]
80064fc: f003 0301 and.w r3, r3, #1
8006500: 2b00 cmp r3, #0
8006502: d004 beq.n 800650e <USB_EPStartXfer+0x1226>
8006504: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8006508: 3301 adds r3, #1
800650a: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800650e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8006512: 881b ldrh r3, [r3, #0]
8006514: b29a uxth r2, r3
8006516: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800651a: b29b uxth r3, r3
800651c: 029b lsls r3, r3, #10
800651e: b29b uxth r3, r3
8006520: 4313 orrs r3, r2
8006522: b29a uxth r2, r3
8006524: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8006528: 801a strh r2, [r3, #0]
800652a: e02d b.n 8006588 <USB_EPStartXfer+0x12a0>
800652c: f507 7384 add.w r3, r7, #264 @ 0x108
8006530: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006534: 681b ldr r3, [r3, #0]
8006536: 785b ldrb r3, [r3, #1]
8006538: 2b01 cmp r3, #1
800653a: d125 bne.n 8006588 <USB_EPStartXfer+0x12a0>
800653c: f507 7384 add.w r3, r7, #264 @ 0x108
8006540: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006544: 681b ldr r3, [r3, #0]
8006546: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800654a: b29b uxth r3, r3
800654c: 461a mov r2, r3
800654e: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8006552: 4413 add r3, r2
8006554: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
8006558: f507 7384 add.w r3, r7, #264 @ 0x108
800655c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006560: 681b ldr r3, [r3, #0]
8006562: 781b ldrb r3, [r3, #0]
8006564: 011a lsls r2, r3, #4
8006566: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800656a: 4413 add r3, r2
800656c: f203 430c addw r3, r3, #1036 @ 0x40c
8006570: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
8006574: f507 7384 add.w r3, r7, #264 @ 0x108
8006578: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800657c: 681b ldr r3, [r3, #0]
800657e: 691b ldr r3, [r3, #16]
8006580: b29a uxth r2, r3
8006582: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
8006586: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
8006588: f507 7384 add.w r3, r7, #264 @ 0x108
800658c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006590: 681b ldr r3, [r3, #0]
8006592: 69db ldr r3, [r3, #28]
8006594: 2b00 cmp r3, #0
8006596: f000 8218 beq.w 80069ca <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
800659a: f507 7384 add.w r3, r7, #264 @ 0x108
800659e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80065a2: 681a ldr r2, [r3, #0]
80065a4: f507 7384 add.w r3, r7, #264 @ 0x108
80065a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80065ac: 681b ldr r3, [r3, #0]
80065ae: 781b ldrb r3, [r3, #0]
80065b0: 009b lsls r3, r3, #2
80065b2: 4413 add r3, r2
80065b4: 881b ldrh r3, [r3, #0]
80065b6: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
80065ba: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
80065be: f403 4380 and.w r3, r3, #16384 @ 0x4000
80065c2: 2b00 cmp r3, #0
80065c4: d005 beq.n 80065d2 <USB_EPStartXfer+0x12ea>
80065c6: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
80065ca: f003 0340 and.w r3, r3, #64 @ 0x40
80065ce: 2b00 cmp r3, #0
80065d0: d10d bne.n 80065ee <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
80065d2: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
80065d6: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
80065da: 2b00 cmp r3, #0
80065dc: f040 81f5 bne.w 80069ca <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
80065e0: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
80065e4: f003 0340 and.w r3, r3, #64 @ 0x40
80065e8: 2b00 cmp r3, #0
80065ea: f040 81ee bne.w 80069ca <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
80065ee: f507 7384 add.w r3, r7, #264 @ 0x108
80065f2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80065f6: 681a ldr r2, [r3, #0]
80065f8: f507 7384 add.w r3, r7, #264 @ 0x108
80065fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006600: 681b ldr r3, [r3, #0]
8006602: 781b ldrb r3, [r3, #0]
8006604: 009b lsls r3, r3, #2
8006606: 4413 add r3, r2
8006608: 881b ldrh r3, [r3, #0]
800660a: b29b uxth r3, r3
800660c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006610: f023 0370 bic.w r3, r3, #112 @ 0x70
8006614: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
8006618: f507 7384 add.w r3, r7, #264 @ 0x108
800661c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006620: 681a ldr r2, [r3, #0]
8006622: f507 7384 add.w r3, r7, #264 @ 0x108
8006626: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800662a: 681b ldr r3, [r3, #0]
800662c: 781b ldrb r3, [r3, #0]
800662e: 009b lsls r3, r3, #2
8006630: 441a add r2, r3
8006632: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
8006636: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800663a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800663e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006642: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006646: b29b uxth r3, r3
8006648: 8013 strh r3, [r2, #0]
800664a: e1be b.n 80069ca <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800664c: f507 7384 add.w r3, r7, #264 @ 0x108
8006650: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006654: 681b ldr r3, [r3, #0]
8006656: 78db ldrb r3, [r3, #3]
8006658: 2b01 cmp r3, #1
800665a: f040 81b4 bne.w 80069c6 <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800665e: f507 7384 add.w r3, r7, #264 @ 0x108
8006662: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006666: 681b ldr r3, [r3, #0]
8006668: 699a ldr r2, [r3, #24]
800666a: f507 7384 add.w r3, r7, #264 @ 0x108
800666e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006672: 681b ldr r3, [r3, #0]
8006674: 691b ldr r3, [r3, #16]
8006676: 429a cmp r2, r3
8006678: d917 bls.n 80066aa <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
800667a: f507 7384 add.w r3, r7, #264 @ 0x108
800667e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006682: 681b ldr r3, [r3, #0]
8006684: 691b ldr r3, [r3, #16]
8006686: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800668a: f507 7384 add.w r3, r7, #264 @ 0x108
800668e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006692: 681b ldr r3, [r3, #0]
8006694: 699a ldr r2, [r3, #24]
8006696: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800669a: 1ad2 subs r2, r2, r3
800669c: f507 7384 add.w r3, r7, #264 @ 0x108
80066a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80066a4: 681b ldr r3, [r3, #0]
80066a6: 619a str r2, [r3, #24]
80066a8: e00e b.n 80066c8 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
80066aa: f507 7384 add.w r3, r7, #264 @ 0x108
80066ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80066b2: 681b ldr r3, [r3, #0]
80066b4: 699b ldr r3, [r3, #24]
80066b6: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
80066ba: f507 7384 add.w r3, r7, #264 @ 0x108
80066be: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80066c2: 681b ldr r3, [r3, #0]
80066c4: 2200 movs r2, #0
80066c6: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
80066c8: f507 7384 add.w r3, r7, #264 @ 0x108
80066cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80066d0: 681b ldr r3, [r3, #0]
80066d2: 785b ldrb r3, [r3, #1]
80066d4: 2b00 cmp r3, #0
80066d6: f040 8085 bne.w 80067e4 <USB_EPStartXfer+0x14fc>
80066da: f507 7384 add.w r3, r7, #264 @ 0x108
80066de: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80066e2: 681b ldr r3, [r3, #0]
80066e4: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
80066e8: f507 7384 add.w r3, r7, #264 @ 0x108
80066ec: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80066f0: 681b ldr r3, [r3, #0]
80066f2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80066f6: b29b uxth r3, r3
80066f8: 461a mov r2, r3
80066fa: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
80066fe: 4413 add r3, r2
8006700: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
8006704: f507 7384 add.w r3, r7, #264 @ 0x108
8006708: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800670c: 681b ldr r3, [r3, #0]
800670e: 781b ldrb r3, [r3, #0]
8006710: 011a lsls r2, r3, #4
8006712: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
8006716: 4413 add r3, r2
8006718: f203 4304 addw r3, r3, #1028 @ 0x404
800671c: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
8006720: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006724: 881b ldrh r3, [r3, #0]
8006726: b29b uxth r3, r3
8006728: f3c3 0309 ubfx r3, r3, #0, #10
800672c: b29a uxth r2, r3
800672e: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006732: 801a strh r2, [r3, #0]
8006734: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006738: 2b3e cmp r3, #62 @ 0x3e
800673a: d923 bls.n 8006784 <USB_EPStartXfer+0x149c>
800673c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006740: 095b lsrs r3, r3, #5
8006742: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8006746: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800674a: f003 031f and.w r3, r3, #31
800674e: 2b00 cmp r3, #0
8006750: d104 bne.n 800675c <USB_EPStartXfer+0x1474>
8006752: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8006756: 3b01 subs r3, #1
8006758: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800675c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006760: 881b ldrh r3, [r3, #0]
8006762: b29a uxth r2, r3
8006764: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8006768: b29b uxth r3, r3
800676a: 029b lsls r3, r3, #10
800676c: b29b uxth r3, r3
800676e: 4313 orrs r3, r2
8006770: b29b uxth r3, r3
8006772: ea6f 4343 mvn.w r3, r3, lsl #17
8006776: ea6f 4353 mvn.w r3, r3, lsr #17
800677a: b29a uxth r2, r3
800677c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006780: 801a strh r2, [r3, #0]
8006782: e060 b.n 8006846 <USB_EPStartXfer+0x155e>
8006784: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006788: 2b00 cmp r3, #0
800678a: d10c bne.n 80067a6 <USB_EPStartXfer+0x14be>
800678c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006790: 881b ldrh r3, [r3, #0]
8006792: b29b uxth r3, r3
8006794: ea6f 4343 mvn.w r3, r3, lsl #17
8006798: ea6f 4353 mvn.w r3, r3, lsr #17
800679c: b29a uxth r2, r3
800679e: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
80067a2: 801a strh r2, [r3, #0]
80067a4: e04f b.n 8006846 <USB_EPStartXfer+0x155e>
80067a6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80067aa: 085b lsrs r3, r3, #1
80067ac: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
80067b0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80067b4: f003 0301 and.w r3, r3, #1
80067b8: 2b00 cmp r3, #0
80067ba: d004 beq.n 80067c6 <USB_EPStartXfer+0x14de>
80067bc: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
80067c0: 3301 adds r3, #1
80067c2: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
80067c6: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
80067ca: 881b ldrh r3, [r3, #0]
80067cc: b29a uxth r2, r3
80067ce: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
80067d2: b29b uxth r3, r3
80067d4: 029b lsls r3, r3, #10
80067d6: b29b uxth r3, r3
80067d8: 4313 orrs r3, r2
80067da: b29a uxth r2, r3
80067dc: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
80067e0: 801a strh r2, [r3, #0]
80067e2: e030 b.n 8006846 <USB_EPStartXfer+0x155e>
80067e4: f507 7384 add.w r3, r7, #264 @ 0x108
80067e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80067ec: 681b ldr r3, [r3, #0]
80067ee: 785b ldrb r3, [r3, #1]
80067f0: 2b01 cmp r3, #1
80067f2: d128 bne.n 8006846 <USB_EPStartXfer+0x155e>
80067f4: f507 7384 add.w r3, r7, #264 @ 0x108
80067f8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80067fc: 681b ldr r3, [r3, #0]
80067fe: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
8006802: f507 7384 add.w r3, r7, #264 @ 0x108
8006806: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800680a: 681b ldr r3, [r3, #0]
800680c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006810: b29b uxth r3, r3
8006812: 461a mov r2, r3
8006814: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8006818: 4413 add r3, r2
800681a: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800681e: f507 7384 add.w r3, r7, #264 @ 0x108
8006822: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006826: 681b ldr r3, [r3, #0]
8006828: 781b ldrb r3, [r3, #0]
800682a: 011a lsls r2, r3, #4
800682c: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8006830: 4413 add r3, r2
8006832: f203 4304 addw r3, r3, #1028 @ 0x404
8006836: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800683a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800683e: b29a uxth r2, r3
8006840: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
8006844: 801a strh r2, [r3, #0]
8006846: f507 7384 add.w r3, r7, #264 @ 0x108
800684a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800684e: 681b ldr r3, [r3, #0]
8006850: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
8006854: f507 7384 add.w r3, r7, #264 @ 0x108
8006858: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800685c: 681b ldr r3, [r3, #0]
800685e: 785b ldrb r3, [r3, #1]
8006860: 2b00 cmp r3, #0
8006862: f040 8085 bne.w 8006970 <USB_EPStartXfer+0x1688>
8006866: f507 7384 add.w r3, r7, #264 @ 0x108
800686a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800686e: 681b ldr r3, [r3, #0]
8006870: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
8006874: f507 7384 add.w r3, r7, #264 @ 0x108
8006878: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800687c: 681b ldr r3, [r3, #0]
800687e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006882: b29b uxth r3, r3
8006884: 461a mov r2, r3
8006886: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800688a: 4413 add r3, r2
800688c: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
8006890: f507 7384 add.w r3, r7, #264 @ 0x108
8006894: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006898: 681b ldr r3, [r3, #0]
800689a: 781b ldrb r3, [r3, #0]
800689c: 011a lsls r2, r3, #4
800689e: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
80068a2: 4413 add r3, r2
80068a4: f203 430c addw r3, r3, #1036 @ 0x40c
80068a8: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
80068ac: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
80068b0: 881b ldrh r3, [r3, #0]
80068b2: b29b uxth r3, r3
80068b4: f3c3 0309 ubfx r3, r3, #0, #10
80068b8: b29a uxth r2, r3
80068ba: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
80068be: 801a strh r2, [r3, #0]
80068c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80068c4: 2b3e cmp r3, #62 @ 0x3e
80068c6: d923 bls.n 8006910 <USB_EPStartXfer+0x1628>
80068c8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80068cc: 095b lsrs r3, r3, #5
80068ce: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
80068d2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80068d6: f003 031f and.w r3, r3, #31
80068da: 2b00 cmp r3, #0
80068dc: d104 bne.n 80068e8 <USB_EPStartXfer+0x1600>
80068de: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
80068e2: 3b01 subs r3, #1
80068e4: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
80068e8: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
80068ec: 881b ldrh r3, [r3, #0]
80068ee: b29a uxth r2, r3
80068f0: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
80068f4: b29b uxth r3, r3
80068f6: 029b lsls r3, r3, #10
80068f8: b29b uxth r3, r3
80068fa: 4313 orrs r3, r2
80068fc: b29b uxth r3, r3
80068fe: ea6f 4343 mvn.w r3, r3, lsl #17
8006902: ea6f 4353 mvn.w r3, r3, lsr #17
8006906: b29a uxth r2, r3
8006908: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800690c: 801a strh r2, [r3, #0]
800690e: e05c b.n 80069ca <USB_EPStartXfer+0x16e2>
8006910: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006914: 2b00 cmp r3, #0
8006916: d10c bne.n 8006932 <USB_EPStartXfer+0x164a>
8006918: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800691c: 881b ldrh r3, [r3, #0]
800691e: b29b uxth r3, r3
8006920: ea6f 4343 mvn.w r3, r3, lsl #17
8006924: ea6f 4353 mvn.w r3, r3, lsr #17
8006928: b29a uxth r2, r3
800692a: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800692e: 801a strh r2, [r3, #0]
8006930: e04b b.n 80069ca <USB_EPStartXfer+0x16e2>
8006932: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006936: 085b lsrs r3, r3, #1
8006938: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800693c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006940: f003 0301 and.w r3, r3, #1
8006944: 2b00 cmp r3, #0
8006946: d004 beq.n 8006952 <USB_EPStartXfer+0x166a>
8006948: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800694c: 3301 adds r3, #1
800694e: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8006952: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006956: 881b ldrh r3, [r3, #0]
8006958: b29a uxth r2, r3
800695a: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800695e: b29b uxth r3, r3
8006960: 029b lsls r3, r3, #10
8006962: b29b uxth r3, r3
8006964: 4313 orrs r3, r2
8006966: b29a uxth r2, r3
8006968: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800696c: 801a strh r2, [r3, #0]
800696e: e02c b.n 80069ca <USB_EPStartXfer+0x16e2>
8006970: f507 7384 add.w r3, r7, #264 @ 0x108
8006974: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006978: 681b ldr r3, [r3, #0]
800697a: 785b ldrb r3, [r3, #1]
800697c: 2b01 cmp r3, #1
800697e: d124 bne.n 80069ca <USB_EPStartXfer+0x16e2>
8006980: f507 7384 add.w r3, r7, #264 @ 0x108
8006984: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006988: 681b ldr r3, [r3, #0]
800698a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800698e: b29b uxth r3, r3
8006990: 461a mov r2, r3
8006992: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
8006996: 4413 add r3, r2
8006998: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800699c: f507 7384 add.w r3, r7, #264 @ 0x108
80069a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069a4: 681b ldr r3, [r3, #0]
80069a6: 781b ldrb r3, [r3, #0]
80069a8: 011a lsls r2, r3, #4
80069aa: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
80069ae: 4413 add r3, r2
80069b0: f203 430c addw r3, r3, #1036 @ 0x40c
80069b4: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
80069b8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80069bc: b29a uxth r2, r3
80069be: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
80069c2: 801a strh r2, [r3, #0]
80069c4: e001 b.n 80069ca <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
80069c6: 2301 movs r3, #1
80069c8: e03a b.n 8006a40 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80069ca: f507 7384 add.w r3, r7, #264 @ 0x108
80069ce: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80069d2: 681a ldr r2, [r3, #0]
80069d4: f507 7384 add.w r3, r7, #264 @ 0x108
80069d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069dc: 681b ldr r3, [r3, #0]
80069de: 781b ldrb r3, [r3, #0]
80069e0: 009b lsls r3, r3, #2
80069e2: 4413 add r3, r2
80069e4: 881b ldrh r3, [r3, #0]
80069e6: b29b uxth r3, r3
80069e8: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80069ec: f023 0370 bic.w r3, r3, #112 @ 0x70
80069f0: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
80069f4: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
80069f8: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80069fc: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8006a00: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8006a04: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006a08: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8006a0c: f507 7384 add.w r3, r7, #264 @ 0x108
8006a10: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006a14: 681a ldr r2, [r3, #0]
8006a16: f507 7384 add.w r3, r7, #264 @ 0x108
8006a1a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006a1e: 681b ldr r3, [r3, #0]
8006a20: 781b ldrb r3, [r3, #0]
8006a22: 009b lsls r3, r3, #2
8006a24: 441a add r2, r3
8006a26: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8006a2a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006a2e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006a32: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006a36: f043 0380 orr.w r3, r3, #128 @ 0x80
8006a3a: b29b uxth r3, r3
8006a3c: 8013 strh r3, [r2, #0]
}
return HAL_OK;
8006a3e: 2300 movs r3, #0
}
8006a40: 4618 mov r0, r3
8006a42: f507 7784 add.w r7, r7, #264 @ 0x108
8006a46: 46bd mov sp, r7
8006a48: bd80 pop {r7, pc}
08006a4a <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8006a4a: b480 push {r7}
8006a4c: b085 sub sp, #20
8006a4e: af00 add r7, sp, #0
8006a50: 6078 str r0, [r7, #4]
8006a52: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
8006a54: 683b ldr r3, [r7, #0]
8006a56: 785b ldrb r3, [r3, #1]
8006a58: 2b00 cmp r3, #0
8006a5a: d020 beq.n 8006a9e <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
8006a5c: 687a ldr r2, [r7, #4]
8006a5e: 683b ldr r3, [r7, #0]
8006a60: 781b ldrb r3, [r3, #0]
8006a62: 009b lsls r3, r3, #2
8006a64: 4413 add r3, r2
8006a66: 881b ldrh r3, [r3, #0]
8006a68: b29b uxth r3, r3
8006a6a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006a6e: f023 0340 bic.w r3, r3, #64 @ 0x40
8006a72: 81bb strh r3, [r7, #12]
8006a74: 89bb ldrh r3, [r7, #12]
8006a76: f083 0310 eor.w r3, r3, #16
8006a7a: 81bb strh r3, [r7, #12]
8006a7c: 687a ldr r2, [r7, #4]
8006a7e: 683b ldr r3, [r7, #0]
8006a80: 781b ldrb r3, [r3, #0]
8006a82: 009b lsls r3, r3, #2
8006a84: 441a add r2, r3
8006a86: 89bb ldrh r3, [r7, #12]
8006a88: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006a8c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006a90: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006a94: f043 0380 orr.w r3, r3, #128 @ 0x80
8006a98: b29b uxth r3, r3
8006a9a: 8013 strh r3, [r2, #0]
8006a9c: e01f b.n 8006ade <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
8006a9e: 687a ldr r2, [r7, #4]
8006aa0: 683b ldr r3, [r7, #0]
8006aa2: 781b ldrb r3, [r3, #0]
8006aa4: 009b lsls r3, r3, #2
8006aa6: 4413 add r3, r2
8006aa8: 881b ldrh r3, [r3, #0]
8006aaa: b29b uxth r3, r3
8006aac: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006ab0: f023 0370 bic.w r3, r3, #112 @ 0x70
8006ab4: 81fb strh r3, [r7, #14]
8006ab6: 89fb ldrh r3, [r7, #14]
8006ab8: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8006abc: 81fb strh r3, [r7, #14]
8006abe: 687a ldr r2, [r7, #4]
8006ac0: 683b ldr r3, [r7, #0]
8006ac2: 781b ldrb r3, [r3, #0]
8006ac4: 009b lsls r3, r3, #2
8006ac6: 441a add r2, r3
8006ac8: 89fb ldrh r3, [r7, #14]
8006aca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006ace: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006ad2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006ad6: f043 0380 orr.w r3, r3, #128 @ 0x80
8006ada: b29b uxth r3, r3
8006adc: 8013 strh r3, [r2, #0]
}
return HAL_OK;
8006ade: 2300 movs r3, #0
}
8006ae0: 4618 mov r0, r3
8006ae2: 3714 adds r7, #20
8006ae4: 46bd mov sp, r7
8006ae6: bc80 pop {r7}
8006ae8: 4770 bx lr
08006aea <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8006aea: b480 push {r7}
8006aec: b087 sub sp, #28
8006aee: af00 add r7, sp, #0
8006af0: 6078 str r0, [r7, #4]
8006af2: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8006af4: 683b ldr r3, [r7, #0]
8006af6: 7b1b ldrb r3, [r3, #12]
8006af8: 2b00 cmp r3, #0
8006afa: f040 809d bne.w 8006c38 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
8006afe: 683b ldr r3, [r7, #0]
8006b00: 785b ldrb r3, [r3, #1]
8006b02: 2b00 cmp r3, #0
8006b04: d04c beq.n 8006ba0 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8006b06: 687a ldr r2, [r7, #4]
8006b08: 683b ldr r3, [r7, #0]
8006b0a: 781b ldrb r3, [r3, #0]
8006b0c: 009b lsls r3, r3, #2
8006b0e: 4413 add r3, r2
8006b10: 881b ldrh r3, [r3, #0]
8006b12: 823b strh r3, [r7, #16]
8006b14: 8a3b ldrh r3, [r7, #16]
8006b16: f003 0340 and.w r3, r3, #64 @ 0x40
8006b1a: 2b00 cmp r3, #0
8006b1c: d01b beq.n 8006b56 <USB_EPClearStall+0x6c>
8006b1e: 687a ldr r2, [r7, #4]
8006b20: 683b ldr r3, [r7, #0]
8006b22: 781b ldrb r3, [r3, #0]
8006b24: 009b lsls r3, r3, #2
8006b26: 4413 add r3, r2
8006b28: 881b ldrh r3, [r3, #0]
8006b2a: b29b uxth r3, r3
8006b2c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006b30: f023 0370 bic.w r3, r3, #112 @ 0x70
8006b34: 81fb strh r3, [r7, #14]
8006b36: 687a ldr r2, [r7, #4]
8006b38: 683b ldr r3, [r7, #0]
8006b3a: 781b ldrb r3, [r3, #0]
8006b3c: 009b lsls r3, r3, #2
8006b3e: 441a add r2, r3
8006b40: 89fb ldrh r3, [r7, #14]
8006b42: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006b46: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006b4a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006b4e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006b52: b29b uxth r3, r3
8006b54: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8006b56: 683b ldr r3, [r7, #0]
8006b58: 78db ldrb r3, [r3, #3]
8006b5a: 2b01 cmp r3, #1
8006b5c: d06c beq.n 8006c38 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8006b5e: 687a ldr r2, [r7, #4]
8006b60: 683b ldr r3, [r7, #0]
8006b62: 781b ldrb r3, [r3, #0]
8006b64: 009b lsls r3, r3, #2
8006b66: 4413 add r3, r2
8006b68: 881b ldrh r3, [r3, #0]
8006b6a: b29b uxth r3, r3
8006b6c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006b70: f023 0340 bic.w r3, r3, #64 @ 0x40
8006b74: 81bb strh r3, [r7, #12]
8006b76: 89bb ldrh r3, [r7, #12]
8006b78: f083 0320 eor.w r3, r3, #32
8006b7c: 81bb strh r3, [r7, #12]
8006b7e: 687a ldr r2, [r7, #4]
8006b80: 683b ldr r3, [r7, #0]
8006b82: 781b ldrb r3, [r3, #0]
8006b84: 009b lsls r3, r3, #2
8006b86: 441a add r2, r3
8006b88: 89bb ldrh r3, [r7, #12]
8006b8a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006b8e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006b92: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006b96: f043 0380 orr.w r3, r3, #128 @ 0x80
8006b9a: b29b uxth r3, r3
8006b9c: 8013 strh r3, [r2, #0]
8006b9e: e04b b.n 8006c38 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006ba0: 687a ldr r2, [r7, #4]
8006ba2: 683b ldr r3, [r7, #0]
8006ba4: 781b ldrb r3, [r3, #0]
8006ba6: 009b lsls r3, r3, #2
8006ba8: 4413 add r3, r2
8006baa: 881b ldrh r3, [r3, #0]
8006bac: 82fb strh r3, [r7, #22]
8006bae: 8afb ldrh r3, [r7, #22]
8006bb0: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006bb4: 2b00 cmp r3, #0
8006bb6: d01b beq.n 8006bf0 <USB_EPClearStall+0x106>
8006bb8: 687a ldr r2, [r7, #4]
8006bba: 683b ldr r3, [r7, #0]
8006bbc: 781b ldrb r3, [r3, #0]
8006bbe: 009b lsls r3, r3, #2
8006bc0: 4413 add r3, r2
8006bc2: 881b ldrh r3, [r3, #0]
8006bc4: b29b uxth r3, r3
8006bc6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006bca: f023 0370 bic.w r3, r3, #112 @ 0x70
8006bce: 82bb strh r3, [r7, #20]
8006bd0: 687a ldr r2, [r7, #4]
8006bd2: 683b ldr r3, [r7, #0]
8006bd4: 781b ldrb r3, [r3, #0]
8006bd6: 009b lsls r3, r3, #2
8006bd8: 441a add r2, r3
8006bda: 8abb ldrh r3, [r7, #20]
8006bdc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006be0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006be4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006be8: f043 0380 orr.w r3, r3, #128 @ 0x80
8006bec: b29b uxth r3, r3
8006bee: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8006bf0: 687a ldr r2, [r7, #4]
8006bf2: 683b ldr r3, [r7, #0]
8006bf4: 781b ldrb r3, [r3, #0]
8006bf6: 009b lsls r3, r3, #2
8006bf8: 4413 add r3, r2
8006bfa: 881b ldrh r3, [r3, #0]
8006bfc: b29b uxth r3, r3
8006bfe: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006c02: f023 0370 bic.w r3, r3, #112 @ 0x70
8006c06: 827b strh r3, [r7, #18]
8006c08: 8a7b ldrh r3, [r7, #18]
8006c0a: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8006c0e: 827b strh r3, [r7, #18]
8006c10: 8a7b ldrh r3, [r7, #18]
8006c12: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006c16: 827b strh r3, [r7, #18]
8006c18: 687a ldr r2, [r7, #4]
8006c1a: 683b ldr r3, [r7, #0]
8006c1c: 781b ldrb r3, [r3, #0]
8006c1e: 009b lsls r3, r3, #2
8006c20: 441a add r2, r3
8006c22: 8a7b ldrh r3, [r7, #18]
8006c24: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006c28: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006c2c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006c30: f043 0380 orr.w r3, r3, #128 @ 0x80
8006c34: b29b uxth r3, r3
8006c36: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
8006c38: 2300 movs r3, #0
}
8006c3a: 4618 mov r0, r3
8006c3c: 371c adds r7, #28
8006c3e: 46bd mov sp, r7
8006c40: bc80 pop {r7}
8006c42: 4770 bx lr
08006c44 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
8006c44: b480 push {r7}
8006c46: b083 sub sp, #12
8006c48: af00 add r7, sp, #0
8006c4a: 6078 str r0, [r7, #4]
8006c4c: 460b mov r3, r1
8006c4e: 70fb strb r3, [r7, #3]
if (address == 0U)
8006c50: 78fb ldrb r3, [r7, #3]
8006c52: 2b00 cmp r3, #0
8006c54: d103 bne.n 8006c5e <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
8006c56: 687b ldr r3, [r7, #4]
8006c58: 2280 movs r2, #128 @ 0x80
8006c5a: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
8006c5e: 2300 movs r3, #0
}
8006c60: 4618 mov r0, r3
8006c62: 370c adds r7, #12
8006c64: 46bd mov sp, r7
8006c66: bc80 pop {r7}
8006c68: 4770 bx lr
08006c6a <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
8006c6a: b480 push {r7}
8006c6c: b083 sub sp, #12
8006c6e: af00 add r7, sp, #0
8006c70: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8006c72: 2300 movs r3, #0
}
8006c74: 4618 mov r0, r3
8006c76: 370c adds r7, #12
8006c78: 46bd mov sp, r7
8006c7a: bc80 pop {r7}
8006c7c: 4770 bx lr
08006c7e <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
8006c7e: b480 push {r7}
8006c80: b083 sub sp, #12
8006c82: af00 add r7, sp, #0
8006c84: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8006c86: 2300 movs r3, #0
}
8006c88: 4618 mov r0, r3
8006c8a: 370c adds r7, #12
8006c8c: 46bd mov sp, r7
8006c8e: bc80 pop {r7}
8006c90: 4770 bx lr
08006c92 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
8006c92: b480 push {r7}
8006c94: b085 sub sp, #20
8006c96: af00 add r7, sp, #0
8006c98: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
8006c9a: 687b ldr r3, [r7, #4]
8006c9c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006ca0: b29b uxth r3, r3
8006ca2: 60fb str r3, [r7, #12]
return tmpreg;
8006ca4: 68fb ldr r3, [r7, #12]
}
8006ca6: 4618 mov r0, r3
8006ca8: 3714 adds r7, #20
8006caa: 46bd mov sp, r7
8006cac: bc80 pop {r7}
8006cae: 4770 bx lr
08006cb0 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
8006cb0: b480 push {r7}
8006cb2: b083 sub sp, #12
8006cb4: af00 add r7, sp, #0
8006cb6: 6078 str r0, [r7, #4]
8006cb8: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8006cba: 2300 movs r3, #0
}
8006cbc: 4618 mov r0, r3
8006cbe: 370c adds r7, #12
8006cc0: 46bd mov sp, r7
8006cc2: bc80 pop {r7}
8006cc4: 4770 bx lr
08006cc6 <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
8006cc6: b480 push {r7}
8006cc8: b08b sub sp, #44 @ 0x2c
8006cca: af00 add r7, sp, #0
8006ccc: 60f8 str r0, [r7, #12]
8006cce: 60b9 str r1, [r7, #8]
8006cd0: 4611 mov r1, r2
8006cd2: 461a mov r2, r3
8006cd4: 460b mov r3, r1
8006cd6: 80fb strh r3, [r7, #6]
8006cd8: 4613 mov r3, r2
8006cda: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
8006cdc: 88bb ldrh r3, [r7, #4]
8006cde: 3301 adds r3, #1
8006ce0: 085b lsrs r3, r3, #1
8006ce2: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
8006ce4: 68fb ldr r3, [r7, #12]
8006ce6: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8006ce8: 68bb ldr r3, [r7, #8]
8006cea: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8006cec: 88fb ldrh r3, [r7, #6]
8006cee: 005a lsls r2, r3, #1
8006cf0: 697b ldr r3, [r7, #20]
8006cf2: 4413 add r3, r2
8006cf4: f503 6380 add.w r3, r3, #1024 @ 0x400
8006cf8: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
8006cfa: 69bb ldr r3, [r7, #24]
8006cfc: 627b str r3, [r7, #36] @ 0x24
8006cfe: e01f b.n 8006d40 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
8006d00: 69fb ldr r3, [r7, #28]
8006d02: 781b ldrb r3, [r3, #0]
8006d04: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
8006d06: 69fb ldr r3, [r7, #28]
8006d08: 3301 adds r3, #1
8006d0a: 781b ldrb r3, [r3, #0]
8006d0c: b21b sxth r3, r3
8006d0e: 021b lsls r3, r3, #8
8006d10: b21a sxth r2, r3
8006d12: f9b7 3012 ldrsh.w r3, [r7, #18]
8006d16: 4313 orrs r3, r2
8006d18: b21b sxth r3, r3
8006d1a: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
8006d1c: 6a3b ldr r3, [r7, #32]
8006d1e: 8a7a ldrh r2, [r7, #18]
8006d20: 801a strh r2, [r3, #0]
pdwVal++;
8006d22: 6a3b ldr r3, [r7, #32]
8006d24: 3302 adds r3, #2
8006d26: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
8006d28: 6a3b ldr r3, [r7, #32]
8006d2a: 3302 adds r3, #2
8006d2c: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
8006d2e: 69fb ldr r3, [r7, #28]
8006d30: 3301 adds r3, #1
8006d32: 61fb str r3, [r7, #28]
pBuf++;
8006d34: 69fb ldr r3, [r7, #28]
8006d36: 3301 adds r3, #1
8006d38: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
8006d3a: 6a7b ldr r3, [r7, #36] @ 0x24
8006d3c: 3b01 subs r3, #1
8006d3e: 627b str r3, [r7, #36] @ 0x24
8006d40: 6a7b ldr r3, [r7, #36] @ 0x24
8006d42: 2b00 cmp r3, #0
8006d44: d1dc bne.n 8006d00 <USB_WritePMA+0x3a>
}
}
8006d46: bf00 nop
8006d48: bf00 nop
8006d4a: 372c adds r7, #44 @ 0x2c
8006d4c: 46bd mov sp, r7
8006d4e: bc80 pop {r7}
8006d50: 4770 bx lr
08006d52 <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
8006d52: b480 push {r7}
8006d54: b08b sub sp, #44 @ 0x2c
8006d56: af00 add r7, sp, #0
8006d58: 60f8 str r0, [r7, #12]
8006d5a: 60b9 str r1, [r7, #8]
8006d5c: 4611 mov r1, r2
8006d5e: 461a mov r2, r3
8006d60: 460b mov r3, r1
8006d62: 80fb strh r3, [r7, #6]
8006d64: 4613 mov r3, r2
8006d66: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
8006d68: 88bb ldrh r3, [r7, #4]
8006d6a: 085b lsrs r3, r3, #1
8006d6c: b29b uxth r3, r3
8006d6e: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
8006d70: 68fb ldr r3, [r7, #12]
8006d72: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8006d74: 68bb ldr r3, [r7, #8]
8006d76: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8006d78: 88fb ldrh r3, [r7, #6]
8006d7a: 005a lsls r2, r3, #1
8006d7c: 697b ldr r3, [r7, #20]
8006d7e: 4413 add r3, r2
8006d80: f503 6380 add.w r3, r3, #1024 @ 0x400
8006d84: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
8006d86: 69bb ldr r3, [r7, #24]
8006d88: 627b str r3, [r7, #36] @ 0x24
8006d8a: e01b b.n 8006dc4 <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
8006d8c: 6a3b ldr r3, [r7, #32]
8006d8e: 881b ldrh r3, [r3, #0]
8006d90: b29b uxth r3, r3
8006d92: 613b str r3, [r7, #16]
pdwVal++;
8006d94: 6a3b ldr r3, [r7, #32]
8006d96: 3302 adds r3, #2
8006d98: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
8006d9a: 693b ldr r3, [r7, #16]
8006d9c: b2da uxtb r2, r3
8006d9e: 69fb ldr r3, [r7, #28]
8006da0: 701a strb r2, [r3, #0]
pBuf++;
8006da2: 69fb ldr r3, [r7, #28]
8006da4: 3301 adds r3, #1
8006da6: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
8006da8: 693b ldr r3, [r7, #16]
8006daa: 0a1b lsrs r3, r3, #8
8006dac: b2da uxtb r2, r3
8006dae: 69fb ldr r3, [r7, #28]
8006db0: 701a strb r2, [r3, #0]
pBuf++;
8006db2: 69fb ldr r3, [r7, #28]
8006db4: 3301 adds r3, #1
8006db6: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
8006db8: 6a3b ldr r3, [r7, #32]
8006dba: 3302 adds r3, #2
8006dbc: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
8006dbe: 6a7b ldr r3, [r7, #36] @ 0x24
8006dc0: 3b01 subs r3, #1
8006dc2: 627b str r3, [r7, #36] @ 0x24
8006dc4: 6a7b ldr r3, [r7, #36] @ 0x24
8006dc6: 2b00 cmp r3, #0
8006dc8: d1e0 bne.n 8006d8c <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
8006dca: 88bb ldrh r3, [r7, #4]
8006dcc: f003 0301 and.w r3, r3, #1
8006dd0: b29b uxth r3, r3
8006dd2: 2b00 cmp r3, #0
8006dd4: d007 beq.n 8006de6 <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
8006dd6: 6a3b ldr r3, [r7, #32]
8006dd8: 881b ldrh r3, [r3, #0]
8006dda: b29b uxth r3, r3
8006ddc: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
8006dde: 693b ldr r3, [r7, #16]
8006de0: b2da uxtb r2, r3
8006de2: 69fb ldr r3, [r7, #28]
8006de4: 701a strb r2, [r3, #0]
}
}
8006de6: bf00 nop
8006de8: 372c adds r7, #44 @ 0x2c
8006dea: 46bd mov sp, r7
8006dec: bc80 pop {r7}
8006dee: 4770 bx lr
08006df0 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8006df0: b580 push {r7, lr}
8006df2: b084 sub sp, #16
8006df4: af00 add r7, sp, #0
8006df6: 6078 str r0, [r7, #4]
8006df8: 460b mov r3, r1
8006dfa: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
8006dfc: 2300 movs r3, #0
8006dfe: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
8006e00: 687b ldr r3, [r7, #4]
8006e02: 7c1b ldrb r3, [r3, #16]
8006e04: 2b00 cmp r3, #0
8006e06: d115 bne.n 8006e34 <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
8006e08: f44f 7300 mov.w r3, #512 @ 0x200
8006e0c: 2202 movs r2, #2
8006e0e: 2181 movs r1, #129 @ 0x81
8006e10: 6878 ldr r0, [r7, #4]
8006e12: f001 ff00 bl 8008c16 <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
8006e16: 687b ldr r3, [r7, #4]
8006e18: 2201 movs r2, #1
8006e1a: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
8006e1c: f44f 7300 mov.w r3, #512 @ 0x200
8006e20: 2202 movs r2, #2
8006e22: 2101 movs r1, #1
8006e24: 6878 ldr r0, [r7, #4]
8006e26: f001 fef6 bl 8008c16 <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
8006e2a: 687b ldr r3, [r7, #4]
8006e2c: 2201 movs r2, #1
8006e2e: f8c3 216c str.w r2, [r3, #364] @ 0x16c
8006e32: e012 b.n 8006e5a <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
8006e34: 2340 movs r3, #64 @ 0x40
8006e36: 2202 movs r2, #2
8006e38: 2181 movs r1, #129 @ 0x81
8006e3a: 6878 ldr r0, [r7, #4]
8006e3c: f001 feeb bl 8008c16 <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
8006e40: 687b ldr r3, [r7, #4]
8006e42: 2201 movs r2, #1
8006e44: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
8006e46: 2340 movs r3, #64 @ 0x40
8006e48: 2202 movs r2, #2
8006e4a: 2101 movs r1, #1
8006e4c: 6878 ldr r0, [r7, #4]
8006e4e: f001 fee2 bl 8008c16 <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
8006e52: 687b ldr r3, [r7, #4]
8006e54: 2201 movs r2, #1
8006e56: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
8006e5a: 2308 movs r3, #8
8006e5c: 2203 movs r2, #3
8006e5e: 2182 movs r1, #130 @ 0x82
8006e60: 6878 ldr r0, [r7, #4]
8006e62: f001 fed8 bl 8008c16 <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
8006e66: 687b ldr r3, [r7, #4]
8006e68: 2201 movs r2, #1
8006e6a: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
8006e6c: f44f 7007 mov.w r0, #540 @ 0x21c
8006e70: f001 fff8 bl 8008e64 <USBD_static_malloc>
8006e74: 4602 mov r2, r0
8006e76: 687b ldr r3, [r7, #4]
8006e78: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
8006e7c: 687b ldr r3, [r7, #4]
8006e7e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006e82: 2b00 cmp r3, #0
8006e84: d102 bne.n 8006e8c <USBD_CDC_Init+0x9c>
{
ret = 1U;
8006e86: 2301 movs r3, #1
8006e88: 73fb strb r3, [r7, #15]
8006e8a: e026 b.n 8006eda <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8006e8c: 687b ldr r3, [r7, #4]
8006e8e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006e92: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
8006e94: 687b ldr r3, [r7, #4]
8006e96: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8006e9a: 681b ldr r3, [r3, #0]
8006e9c: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
8006e9e: 68bb ldr r3, [r7, #8]
8006ea0: 2200 movs r2, #0
8006ea2: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
8006ea6: 68bb ldr r3, [r7, #8]
8006ea8: 2200 movs r2, #0
8006eaa: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
8006eae: 687b ldr r3, [r7, #4]
8006eb0: 7c1b ldrb r3, [r3, #16]
8006eb2: 2b00 cmp r3, #0
8006eb4: d109 bne.n 8006eca <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
8006eb6: 68bb ldr r3, [r7, #8]
8006eb8: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8006ebc: f44f 7300 mov.w r3, #512 @ 0x200
8006ec0: 2101 movs r1, #1
8006ec2: 6878 ldr r0, [r7, #4]
8006ec4: f001 ff97 bl 8008df6 <USBD_LL_PrepareReceive>
8006ec8: e007 b.n 8006eda <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
8006eca: 68bb ldr r3, [r7, #8]
8006ecc: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8006ed0: 2340 movs r3, #64 @ 0x40
8006ed2: 2101 movs r1, #1
8006ed4: 6878 ldr r0, [r7, #4]
8006ed6: f001 ff8e bl 8008df6 <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
8006eda: 7bfb ldrb r3, [r7, #15]
}
8006edc: 4618 mov r0, r3
8006ede: 3710 adds r7, #16
8006ee0: 46bd mov sp, r7
8006ee2: bd80 pop {r7, pc}
08006ee4 <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8006ee4: b580 push {r7, lr}
8006ee6: b084 sub sp, #16
8006ee8: af00 add r7, sp, #0
8006eea: 6078 str r0, [r7, #4]
8006eec: 460b mov r3, r1
8006eee: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
8006ef0: 2300 movs r3, #0
8006ef2: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
8006ef4: 2181 movs r1, #129 @ 0x81
8006ef6: 6878 ldr r0, [r7, #4]
8006ef8: f001 feb3 bl 8008c62 <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
8006efc: 687b ldr r3, [r7, #4]
8006efe: 2200 movs r2, #0
8006f00: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
8006f02: 2101 movs r1, #1
8006f04: 6878 ldr r0, [r7, #4]
8006f06: f001 feac bl 8008c62 <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
8006f0a: 687b ldr r3, [r7, #4]
8006f0c: 2200 movs r2, #0
8006f0e: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
8006f12: 2182 movs r1, #130 @ 0x82
8006f14: 6878 ldr r0, [r7, #4]
8006f16: f001 fea4 bl 8008c62 <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
8006f1a: 687b ldr r3, [r7, #4]
8006f1c: 2200 movs r2, #0
8006f1e: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
8006f20: 687b ldr r3, [r7, #4]
8006f22: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006f26: 2b00 cmp r3, #0
8006f28: d00e beq.n 8006f48 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
8006f2a: 687b ldr r3, [r7, #4]
8006f2c: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8006f30: 685b ldr r3, [r3, #4]
8006f32: 4798 blx r3
USBD_free(pdev->pClassData);
8006f34: 687b ldr r3, [r7, #4]
8006f36: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006f3a: 4618 mov r0, r3
8006f3c: f001 ff9e bl 8008e7c <USBD_static_free>
pdev->pClassData = NULL;
8006f40: 687b ldr r3, [r7, #4]
8006f42: 2200 movs r2, #0
8006f44: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
8006f48: 7bfb ldrb r3, [r7, #15]
}
8006f4a: 4618 mov r0, r3
8006f4c: 3710 adds r7, #16
8006f4e: 46bd mov sp, r7
8006f50: bd80 pop {r7, pc}
08006f52 <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8006f52: b580 push {r7, lr}
8006f54: b086 sub sp, #24
8006f56: af00 add r7, sp, #0
8006f58: 6078 str r0, [r7, #4]
8006f5a: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8006f5c: 687b ldr r3, [r7, #4]
8006f5e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006f62: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
8006f64: 2300 movs r3, #0
8006f66: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
8006f68: 2300 movs r3, #0
8006f6a: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
8006f6c: 2300 movs r3, #0
8006f6e: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8006f70: 683b ldr r3, [r7, #0]
8006f72: 781b ldrb r3, [r3, #0]
8006f74: f003 0360 and.w r3, r3, #96 @ 0x60
8006f78: 2b00 cmp r3, #0
8006f7a: d039 beq.n 8006ff0 <USBD_CDC_Setup+0x9e>
8006f7c: 2b20 cmp r3, #32
8006f7e: d17f bne.n 8007080 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
8006f80: 683b ldr r3, [r7, #0]
8006f82: 88db ldrh r3, [r3, #6]
8006f84: 2b00 cmp r3, #0
8006f86: d029 beq.n 8006fdc <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
8006f88: 683b ldr r3, [r7, #0]
8006f8a: 781b ldrb r3, [r3, #0]
8006f8c: b25b sxtb r3, r3
8006f8e: 2b00 cmp r3, #0
8006f90: da11 bge.n 8006fb6 <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8006f92: 687b ldr r3, [r7, #4]
8006f94: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8006f98: 689b ldr r3, [r3, #8]
8006f9a: 683a ldr r2, [r7, #0]
8006f9c: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
8006f9e: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8006fa0: 683a ldr r2, [r7, #0]
8006fa2: 88d2 ldrh r2, [r2, #6]
8006fa4: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
8006fa6: 6939 ldr r1, [r7, #16]
8006fa8: 683b ldr r3, [r7, #0]
8006faa: 88db ldrh r3, [r3, #6]
8006fac: 461a mov r2, r3
8006fae: 6878 ldr r0, [r7, #4]
8006fb0: f001 fa06 bl 80083c0 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
8006fb4: e06b b.n 800708e <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
8006fb6: 683b ldr r3, [r7, #0]
8006fb8: 785a ldrb r2, [r3, #1]
8006fba: 693b ldr r3, [r7, #16]
8006fbc: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
8006fc0: 683b ldr r3, [r7, #0]
8006fc2: 88db ldrh r3, [r3, #6]
8006fc4: b2da uxtb r2, r3
8006fc6: 693b ldr r3, [r7, #16]
8006fc8: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
8006fcc: 6939 ldr r1, [r7, #16]
8006fce: 683b ldr r3, [r7, #0]
8006fd0: 88db ldrh r3, [r3, #6]
8006fd2: 461a mov r2, r3
8006fd4: 6878 ldr r0, [r7, #4]
8006fd6: f001 fa21 bl 800841c <USBD_CtlPrepareRx>
break;
8006fda: e058 b.n 800708e <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8006fdc: 687b ldr r3, [r7, #4]
8006fde: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8006fe2: 689b ldr r3, [r3, #8]
8006fe4: 683a ldr r2, [r7, #0]
8006fe6: 7850 ldrb r0, [r2, #1]
8006fe8: 2200 movs r2, #0
8006fea: 6839 ldr r1, [r7, #0]
8006fec: 4798 blx r3
break;
8006fee: e04e b.n 800708e <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
8006ff0: 683b ldr r3, [r7, #0]
8006ff2: 785b ldrb r3, [r3, #1]
8006ff4: 2b0b cmp r3, #11
8006ff6: d02e beq.n 8007056 <USBD_CDC_Setup+0x104>
8006ff8: 2b0b cmp r3, #11
8006ffa: dc38 bgt.n 800706e <USBD_CDC_Setup+0x11c>
8006ffc: 2b00 cmp r3, #0
8006ffe: d002 beq.n 8007006 <USBD_CDC_Setup+0xb4>
8007000: 2b0a cmp r3, #10
8007002: d014 beq.n 800702e <USBD_CDC_Setup+0xdc>
8007004: e033 b.n 800706e <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007006: 687b ldr r3, [r7, #4]
8007008: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800700c: 2b03 cmp r3, #3
800700e: d107 bne.n 8007020 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
8007010: f107 030c add.w r3, r7, #12
8007014: 2202 movs r2, #2
8007016: 4619 mov r1, r3
8007018: 6878 ldr r0, [r7, #4]
800701a: f001 f9d1 bl 80083c0 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800701e: e02e b.n 800707e <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
8007020: 6839 ldr r1, [r7, #0]
8007022: 6878 ldr r0, [r7, #4]
8007024: f001 f962 bl 80082ec <USBD_CtlError>
ret = USBD_FAIL;
8007028: 2302 movs r3, #2
800702a: 75fb strb r3, [r7, #23]
break;
800702c: e027 b.n 800707e <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800702e: 687b ldr r3, [r7, #4]
8007030: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007034: 2b03 cmp r3, #3
8007036: d107 bne.n 8007048 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
8007038: f107 030f add.w r3, r7, #15
800703c: 2201 movs r2, #1
800703e: 4619 mov r1, r3
8007040: 6878 ldr r0, [r7, #4]
8007042: f001 f9bd bl 80083c0 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8007046: e01a b.n 800707e <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
8007048: 6839 ldr r1, [r7, #0]
800704a: 6878 ldr r0, [r7, #4]
800704c: f001 f94e bl 80082ec <USBD_CtlError>
ret = USBD_FAIL;
8007050: 2302 movs r3, #2
8007052: 75fb strb r3, [r7, #23]
break;
8007054: e013 b.n 800707e <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
8007056: 687b ldr r3, [r7, #4]
8007058: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800705c: 2b03 cmp r3, #3
800705e: d00d beq.n 800707c <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
8007060: 6839 ldr r1, [r7, #0]
8007062: 6878 ldr r0, [r7, #4]
8007064: f001 f942 bl 80082ec <USBD_CtlError>
ret = USBD_FAIL;
8007068: 2302 movs r3, #2
800706a: 75fb strb r3, [r7, #23]
}
break;
800706c: e006 b.n 800707c <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800706e: 6839 ldr r1, [r7, #0]
8007070: 6878 ldr r0, [r7, #4]
8007072: f001 f93b bl 80082ec <USBD_CtlError>
ret = USBD_FAIL;
8007076: 2302 movs r3, #2
8007078: 75fb strb r3, [r7, #23]
break;
800707a: e000 b.n 800707e <USBD_CDC_Setup+0x12c>
break;
800707c: bf00 nop
}
break;
800707e: e006 b.n 800708e <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
8007080: 6839 ldr r1, [r7, #0]
8007082: 6878 ldr r0, [r7, #4]
8007084: f001 f932 bl 80082ec <USBD_CtlError>
ret = USBD_FAIL;
8007088: 2302 movs r3, #2
800708a: 75fb strb r3, [r7, #23]
break;
800708c: bf00 nop
}
return ret;
800708e: 7dfb ldrb r3, [r7, #23]
}
8007090: 4618 mov r0, r3
8007092: 3718 adds r7, #24
8007094: 46bd mov sp, r7
8007096: bd80 pop {r7, pc}
08007098 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8007098: b580 push {r7, lr}
800709a: b084 sub sp, #16
800709c: af00 add r7, sp, #0
800709e: 6078 str r0, [r7, #4]
80070a0: 460b mov r3, r1
80070a2: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
80070a4: 687b ldr r3, [r7, #4]
80070a6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80070aa: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
80070ac: 687b ldr r3, [r7, #4]
80070ae: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
80070b2: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
80070b4: 687b ldr r3, [r7, #4]
80070b6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80070ba: 2b00 cmp r3, #0
80070bc: d03a beq.n 8007134 <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
80070be: 78fa ldrb r2, [r7, #3]
80070c0: 6879 ldr r1, [r7, #4]
80070c2: 4613 mov r3, r2
80070c4: 009b lsls r3, r3, #2
80070c6: 4413 add r3, r2
80070c8: 009b lsls r3, r3, #2
80070ca: 440b add r3, r1
80070cc: 331c adds r3, #28
80070ce: 681b ldr r3, [r3, #0]
80070d0: 2b00 cmp r3, #0
80070d2: d029 beq.n 8007128 <USBD_CDC_DataIn+0x90>
80070d4: 78fa ldrb r2, [r7, #3]
80070d6: 6879 ldr r1, [r7, #4]
80070d8: 4613 mov r3, r2
80070da: 009b lsls r3, r3, #2
80070dc: 4413 add r3, r2
80070de: 009b lsls r3, r3, #2
80070e0: 440b add r3, r1
80070e2: 331c adds r3, #28
80070e4: 681a ldr r2, [r3, #0]
80070e6: 78f9 ldrb r1, [r7, #3]
80070e8: 68b8 ldr r0, [r7, #8]
80070ea: 460b mov r3, r1
80070ec: 009b lsls r3, r3, #2
80070ee: 440b add r3, r1
80070f0: 00db lsls r3, r3, #3
80070f2: 4403 add r3, r0
80070f4: 3320 adds r3, #32
80070f6: 681b ldr r3, [r3, #0]
80070f8: fbb2 f1f3 udiv r1, r2, r3
80070fc: fb01 f303 mul.w r3, r1, r3
8007100: 1ad3 subs r3, r2, r3
8007102: 2b00 cmp r3, #0
8007104: d110 bne.n 8007128 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
8007106: 78fa ldrb r2, [r7, #3]
8007108: 6879 ldr r1, [r7, #4]
800710a: 4613 mov r3, r2
800710c: 009b lsls r3, r3, #2
800710e: 4413 add r3, r2
8007110: 009b lsls r3, r3, #2
8007112: 440b add r3, r1
8007114: 331c adds r3, #28
8007116: 2200 movs r2, #0
8007118: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
800711a: 78f9 ldrb r1, [r7, #3]
800711c: 2300 movs r3, #0
800711e: 2200 movs r2, #0
8007120: 6878 ldr r0, [r7, #4]
8007122: f001 fe45 bl 8008db0 <USBD_LL_Transmit>
8007126: e003 b.n 8007130 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
8007128: 68fb ldr r3, [r7, #12]
800712a: 2200 movs r2, #0
800712c: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
8007130: 2300 movs r3, #0
8007132: e000 b.n 8007136 <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
8007134: 2302 movs r3, #2
}
}
8007136: 4618 mov r0, r3
8007138: 3710 adds r7, #16
800713a: 46bd mov sp, r7
800713c: bd80 pop {r7, pc}
0800713e <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800713e: b580 push {r7, lr}
8007140: b084 sub sp, #16
8007142: af00 add r7, sp, #0
8007144: 6078 str r0, [r7, #4]
8007146: 460b mov r3, r1
8007148: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800714a: 687b ldr r3, [r7, #4]
800714c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007150: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
8007152: 78fb ldrb r3, [r7, #3]
8007154: 4619 mov r1, r3
8007156: 6878 ldr r0, [r7, #4]
8007158: f001 fe70 bl 8008e3c <USBD_LL_GetRxDataSize>
800715c: 4602 mov r2, r0
800715e: 68fb ldr r3, [r7, #12]
8007160: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
8007164: 687b ldr r3, [r7, #4]
8007166: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800716a: 2b00 cmp r3, #0
800716c: d00d beq.n 800718a <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800716e: 687b ldr r3, [r7, #4]
8007170: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8007174: 68db ldr r3, [r3, #12]
8007176: 68fa ldr r2, [r7, #12]
8007178: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800717c: 68fa ldr r2, [r7, #12]
800717e: f502 7203 add.w r2, r2, #524 @ 0x20c
8007182: 4611 mov r1, r2
8007184: 4798 blx r3
return USBD_OK;
8007186: 2300 movs r3, #0
8007188: e000 b.n 800718c <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800718a: 2302 movs r3, #2
}
}
800718c: 4618 mov r0, r3
800718e: 3710 adds r7, #16
8007190: 46bd mov sp, r7
8007192: bd80 pop {r7, pc}
08007194 <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
8007194: b580 push {r7, lr}
8007196: b084 sub sp, #16
8007198: af00 add r7, sp, #0
800719a: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800719c: 687b ldr r3, [r7, #4]
800719e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80071a2: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
80071a4: 687b ldr r3, [r7, #4]
80071a6: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
80071aa: 2b00 cmp r3, #0
80071ac: d014 beq.n 80071d8 <USBD_CDC_EP0_RxReady+0x44>
80071ae: 68fb ldr r3, [r7, #12]
80071b0: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
80071b4: 2bff cmp r3, #255 @ 0xff
80071b6: d00f beq.n 80071d8 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
80071b8: 687b ldr r3, [r7, #4]
80071ba: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
80071be: 689b ldr r3, [r3, #8]
80071c0: 68fa ldr r2, [r7, #12]
80071c2: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
80071c6: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
80071c8: 68fa ldr r2, [r7, #12]
80071ca: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
80071ce: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
80071d0: 68fb ldr r3, [r7, #12]
80071d2: 22ff movs r2, #255 @ 0xff
80071d4: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
80071d8: 2300 movs r3, #0
}
80071da: 4618 mov r0, r3
80071dc: 3710 adds r7, #16
80071de: 46bd mov sp, r7
80071e0: bd80 pop {r7, pc}
...
080071e4 <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
80071e4: b480 push {r7}
80071e6: b083 sub sp, #12
80071e8: af00 add r7, sp, #0
80071ea: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
80071ec: 687b ldr r3, [r7, #4]
80071ee: 2243 movs r2, #67 @ 0x43
80071f0: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
80071f2: 4b03 ldr r3, [pc, #12] @ (8007200 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
80071f4: 4618 mov r0, r3
80071f6: 370c adds r7, #12
80071f8: 46bd mov sp, r7
80071fa: bc80 pop {r7}
80071fc: 4770 bx lr
80071fe: bf00 nop
8007200: 20000094 .word 0x20000094
08007204 <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
8007204: b480 push {r7}
8007206: b083 sub sp, #12
8007208: af00 add r7, sp, #0
800720a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
800720c: 687b ldr r3, [r7, #4]
800720e: 2243 movs r2, #67 @ 0x43
8007210: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
8007212: 4b03 ldr r3, [pc, #12] @ (8007220 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
8007214: 4618 mov r0, r3
8007216: 370c adds r7, #12
8007218: 46bd mov sp, r7
800721a: bc80 pop {r7}
800721c: 4770 bx lr
800721e: bf00 nop
8007220: 20000050 .word 0x20000050
08007224 <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
8007224: b480 push {r7}
8007226: b083 sub sp, #12
8007228: af00 add r7, sp, #0
800722a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800722c: 687b ldr r3, [r7, #4]
800722e: 2243 movs r2, #67 @ 0x43
8007230: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
8007232: 4b03 ldr r3, [pc, #12] @ (8007240 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
8007234: 4618 mov r0, r3
8007236: 370c adds r7, #12
8007238: 46bd mov sp, r7
800723a: bc80 pop {r7}
800723c: 4770 bx lr
800723e: bf00 nop
8007240: 200000d8 .word 0x200000d8
08007244 <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
8007244: b480 push {r7}
8007246: b083 sub sp, #12
8007248: af00 add r7, sp, #0
800724a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800724c: 687b ldr r3, [r7, #4]
800724e: 220a movs r2, #10
8007250: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
8007252: 4b03 ldr r3, [pc, #12] @ (8007260 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
8007254: 4618 mov r0, r3
8007256: 370c adds r7, #12
8007258: 46bd mov sp, r7
800725a: bc80 pop {r7}
800725c: 4770 bx lr
800725e: bf00 nop
8007260: 2000000c .word 0x2000000c
08007264 <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
8007264: b480 push {r7}
8007266: b085 sub sp, #20
8007268: af00 add r7, sp, #0
800726a: 6078 str r0, [r7, #4]
800726c: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800726e: 2302 movs r3, #2
8007270: 73fb strb r3, [r7, #15]
if (fops != NULL)
8007272: 683b ldr r3, [r7, #0]
8007274: 2b00 cmp r3, #0
8007276: d005 beq.n 8007284 <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
8007278: 687b ldr r3, [r7, #4]
800727a: 683a ldr r2, [r7, #0]
800727c: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
8007280: 2300 movs r3, #0
8007282: 73fb strb r3, [r7, #15]
}
return ret;
8007284: 7bfb ldrb r3, [r7, #15]
}
8007286: 4618 mov r0, r3
8007288: 3714 adds r7, #20
800728a: 46bd mov sp, r7
800728c: bc80 pop {r7}
800728e: 4770 bx lr
08007290 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
8007290: b480 push {r7}
8007292: b087 sub sp, #28
8007294: af00 add r7, sp, #0
8007296: 60f8 str r0, [r7, #12]
8007298: 60b9 str r1, [r7, #8]
800729a: 4613 mov r3, r2
800729c: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800729e: 68fb ldr r3, [r7, #12]
80072a0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80072a4: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
80072a6: 697b ldr r3, [r7, #20]
80072a8: 68ba ldr r2, [r7, #8]
80072aa: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
80072ae: 88fa ldrh r2, [r7, #6]
80072b0: 697b ldr r3, [r7, #20]
80072b2: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
80072b6: 2300 movs r3, #0
}
80072b8: 4618 mov r0, r3
80072ba: 371c adds r7, #28
80072bc: 46bd mov sp, r7
80072be: bc80 pop {r7}
80072c0: 4770 bx lr
080072c2 <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
80072c2: b480 push {r7}
80072c4: b085 sub sp, #20
80072c6: af00 add r7, sp, #0
80072c8: 6078 str r0, [r7, #4]
80072ca: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80072cc: 687b ldr r3, [r7, #4]
80072ce: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80072d2: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
80072d4: 68fb ldr r3, [r7, #12]
80072d6: 683a ldr r2, [r7, #0]
80072d8: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
80072dc: 2300 movs r3, #0
}
80072de: 4618 mov r0, r3
80072e0: 3714 adds r7, #20
80072e2: 46bd mov sp, r7
80072e4: bc80 pop {r7}
80072e6: 4770 bx lr
080072e8 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
80072e8: b580 push {r7, lr}
80072ea: b084 sub sp, #16
80072ec: af00 add r7, sp, #0
80072ee: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80072f0: 687b ldr r3, [r7, #4]
80072f2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80072f6: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
80072f8: 687b ldr r3, [r7, #4]
80072fa: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80072fe: 2b00 cmp r3, #0
8007300: d01c beq.n 800733c <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
8007302: 68fb ldr r3, [r7, #12]
8007304: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
8007308: 2b00 cmp r3, #0
800730a: d115 bne.n 8007338 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
800730c: 68fb ldr r3, [r7, #12]
800730e: 2201 movs r2, #1
8007310: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
8007314: 68fb ldr r3, [r7, #12]
8007316: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
800731a: 687b ldr r3, [r7, #4]
800731c: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800731e: 68fb ldr r3, [r7, #12]
8007320: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
8007324: 68fb ldr r3, [r7, #12]
8007326: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800732a: b29b uxth r3, r3
800732c: 2181 movs r1, #129 @ 0x81
800732e: 6878 ldr r0, [r7, #4]
8007330: f001 fd3e bl 8008db0 <USBD_LL_Transmit>
return USBD_OK;
8007334: 2300 movs r3, #0
8007336: e002 b.n 800733e <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
8007338: 2301 movs r3, #1
800733a: e000 b.n 800733e <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
800733c: 2302 movs r3, #2
}
}
800733e: 4618 mov r0, r3
8007340: 3710 adds r7, #16
8007342: 46bd mov sp, r7
8007344: bd80 pop {r7, pc}
08007346 <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
8007346: b580 push {r7, lr}
8007348: b084 sub sp, #16
800734a: af00 add r7, sp, #0
800734c: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800734e: 687b ldr r3, [r7, #4]
8007350: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8007354: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
8007356: 687b ldr r3, [r7, #4]
8007358: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800735c: 2b00 cmp r3, #0
800735e: d017 beq.n 8007390 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007360: 687b ldr r3, [r7, #4]
8007362: 7c1b ldrb r3, [r3, #16]
8007364: 2b00 cmp r3, #0
8007366: d109 bne.n 800737c <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
8007368: 68fb ldr r3, [r7, #12]
800736a: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800736e: f44f 7300 mov.w r3, #512 @ 0x200
8007372: 2101 movs r1, #1
8007374: 6878 ldr r0, [r7, #4]
8007376: f001 fd3e bl 8008df6 <USBD_LL_PrepareReceive>
800737a: e007 b.n 800738c <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800737c: 68fb ldr r3, [r7, #12]
800737e: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8007382: 2340 movs r3, #64 @ 0x40
8007384: 2101 movs r1, #1
8007386: 6878 ldr r0, [r7, #4]
8007388: f001 fd35 bl 8008df6 <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
800738c: 2300 movs r3, #0
800738e: e000 b.n 8007392 <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
8007390: 2302 movs r3, #2
}
}
8007392: 4618 mov r0, r3
8007394: 3710 adds r7, #16
8007396: 46bd mov sp, r7
8007398: bd80 pop {r7, pc}
0800739a <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800739a: b580 push {r7, lr}
800739c: b084 sub sp, #16
800739e: af00 add r7, sp, #0
80073a0: 60f8 str r0, [r7, #12]
80073a2: 60b9 str r1, [r7, #8]
80073a4: 4613 mov r3, r2
80073a6: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
80073a8: 68fb ldr r3, [r7, #12]
80073aa: 2b00 cmp r3, #0
80073ac: d101 bne.n 80073b2 <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
80073ae: 2302 movs r3, #2
80073b0: e01a b.n 80073e8 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
80073b2: 68fb ldr r3, [r7, #12]
80073b4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80073b8: 2b00 cmp r3, #0
80073ba: d003 beq.n 80073c4 <USBD_Init+0x2a>
{
pdev->pClass = NULL;
80073bc: 68fb ldr r3, [r7, #12]
80073be: 2200 movs r2, #0
80073c0: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
80073c4: 68bb ldr r3, [r7, #8]
80073c6: 2b00 cmp r3, #0
80073c8: d003 beq.n 80073d2 <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
80073ca: 68fb ldr r3, [r7, #12]
80073cc: 68ba ldr r2, [r7, #8]
80073ce: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
80073d2: 68fb ldr r3, [r7, #12]
80073d4: 2201 movs r2, #1
80073d6: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
80073da: 68fb ldr r3, [r7, #12]
80073dc: 79fa ldrb r2, [r7, #7]
80073de: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
80073e0: 68f8 ldr r0, [r7, #12]
80073e2: f001 fba3 bl 8008b2c <USBD_LL_Init>
return USBD_OK;
80073e6: 2300 movs r3, #0
}
80073e8: 4618 mov r0, r3
80073ea: 3710 adds r7, #16
80073ec: 46bd mov sp, r7
80073ee: bd80 pop {r7, pc}
080073f0 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
80073f0: b480 push {r7}
80073f2: b085 sub sp, #20
80073f4: af00 add r7, sp, #0
80073f6: 6078 str r0, [r7, #4]
80073f8: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
80073fa: 2300 movs r3, #0
80073fc: 73fb strb r3, [r7, #15]
if (pclass != NULL)
80073fe: 683b ldr r3, [r7, #0]
8007400: 2b00 cmp r3, #0
8007402: d006 beq.n 8007412 <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
8007404: 687b ldr r3, [r7, #4]
8007406: 683a ldr r2, [r7, #0]
8007408: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
800740c: 2300 movs r3, #0
800740e: 73fb strb r3, [r7, #15]
8007410: e001 b.n 8007416 <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
8007412: 2302 movs r3, #2
8007414: 73fb strb r3, [r7, #15]
}
return status;
8007416: 7bfb ldrb r3, [r7, #15]
}
8007418: 4618 mov r0, r3
800741a: 3714 adds r7, #20
800741c: 46bd mov sp, r7
800741e: bc80 pop {r7}
8007420: 4770 bx lr
08007422 <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
8007422: b580 push {r7, lr}
8007424: b082 sub sp, #8
8007426: af00 add r7, sp, #0
8007428: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
800742a: 6878 ldr r0, [r7, #4]
800742c: f001 fbd8 bl 8008be0 <USBD_LL_Start>
return USBD_OK;
8007430: 2300 movs r3, #0
}
8007432: 4618 mov r0, r3
8007434: 3708 adds r7, #8
8007436: 46bd mov sp, r7
8007438: bd80 pop {r7, pc}
0800743a <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800743a: b480 push {r7}
800743c: b083 sub sp, #12
800743e: af00 add r7, sp, #0
8007440: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
8007442: 2300 movs r3, #0
}
8007444: 4618 mov r0, r3
8007446: 370c adds r7, #12
8007448: 46bd mov sp, r7
800744a: bc80 pop {r7}
800744c: 4770 bx lr
0800744e <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800744e: b580 push {r7, lr}
8007450: b084 sub sp, #16
8007452: af00 add r7, sp, #0
8007454: 6078 str r0, [r7, #4]
8007456: 460b mov r3, r1
8007458: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800745a: 2302 movs r3, #2
800745c: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
800745e: 687b ldr r3, [r7, #4]
8007460: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007464: 2b00 cmp r3, #0
8007466: d00c beq.n 8007482 <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
8007468: 687b ldr r3, [r7, #4]
800746a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800746e: 681b ldr r3, [r3, #0]
8007470: 78fa ldrb r2, [r7, #3]
8007472: 4611 mov r1, r2
8007474: 6878 ldr r0, [r7, #4]
8007476: 4798 blx r3
8007478: 4603 mov r3, r0
800747a: 2b00 cmp r3, #0
800747c: d101 bne.n 8007482 <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
800747e: 2300 movs r3, #0
8007480: 73fb strb r3, [r7, #15]
}
}
return ret;
8007482: 7bfb ldrb r3, [r7, #15]
}
8007484: 4618 mov r0, r3
8007486: 3710 adds r7, #16
8007488: 46bd mov sp, r7
800748a: bd80 pop {r7, pc}
0800748c <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800748c: b580 push {r7, lr}
800748e: b082 sub sp, #8
8007490: af00 add r7, sp, #0
8007492: 6078 str r0, [r7, #4]
8007494: 460b mov r3, r1
8007496: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
8007498: 687b ldr r3, [r7, #4]
800749a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800749e: 685b ldr r3, [r3, #4]
80074a0: 78fa ldrb r2, [r7, #3]
80074a2: 4611 mov r1, r2
80074a4: 6878 ldr r0, [r7, #4]
80074a6: 4798 blx r3
return USBD_OK;
80074a8: 2300 movs r3, #0
}
80074aa: 4618 mov r0, r3
80074ac: 3708 adds r7, #8
80074ae: 46bd mov sp, r7
80074b0: bd80 pop {r7, pc}
080074b2 <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
80074b2: b580 push {r7, lr}
80074b4: b082 sub sp, #8
80074b6: af00 add r7, sp, #0
80074b8: 6078 str r0, [r7, #4]
80074ba: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
80074bc: 687b ldr r3, [r7, #4]
80074be: f503 732a add.w r3, r3, #680 @ 0x2a8
80074c2: 6839 ldr r1, [r7, #0]
80074c4: 4618 mov r0, r3
80074c6: f000 fed8 bl 800827a <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
80074ca: 687b ldr r3, [r7, #4]
80074cc: 2201 movs r2, #1
80074ce: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
80074d2: 687b ldr r3, [r7, #4]
80074d4: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
80074d8: 461a mov r2, r3
80074da: 687b ldr r3, [r7, #4]
80074dc: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
80074e0: 687b ldr r3, [r7, #4]
80074e2: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
80074e6: f003 031f and.w r3, r3, #31
80074ea: 2b02 cmp r3, #2
80074ec: d016 beq.n 800751c <USBD_LL_SetupStage+0x6a>
80074ee: 2b02 cmp r3, #2
80074f0: d81c bhi.n 800752c <USBD_LL_SetupStage+0x7a>
80074f2: 2b00 cmp r3, #0
80074f4: d002 beq.n 80074fc <USBD_LL_SetupStage+0x4a>
80074f6: 2b01 cmp r3, #1
80074f8: d008 beq.n 800750c <USBD_LL_SetupStage+0x5a>
80074fa: e017 b.n 800752c <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
80074fc: 687b ldr r3, [r7, #4]
80074fe: f503 732a add.w r3, r3, #680 @ 0x2a8
8007502: 4619 mov r1, r3
8007504: 6878 ldr r0, [r7, #4]
8007506: f000 f9cb bl 80078a0 <USBD_StdDevReq>
break;
800750a: e01a b.n 8007542 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
800750c: 687b ldr r3, [r7, #4]
800750e: f503 732a add.w r3, r3, #680 @ 0x2a8
8007512: 4619 mov r1, r3
8007514: 6878 ldr r0, [r7, #4]
8007516: f000 fa2d bl 8007974 <USBD_StdItfReq>
break;
800751a: e012 b.n 8007542 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
800751c: 687b ldr r3, [r7, #4]
800751e: f503 732a add.w r3, r3, #680 @ 0x2a8
8007522: 4619 mov r1, r3
8007524: 6878 ldr r0, [r7, #4]
8007526: f000 fa6d bl 8007a04 <USBD_StdEPReq>
break;
800752a: e00a b.n 8007542 <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800752c: 687b ldr r3, [r7, #4]
800752e: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
8007532: f023 037f bic.w r3, r3, #127 @ 0x7f
8007536: b2db uxtb r3, r3
8007538: 4619 mov r1, r3
800753a: 6878 ldr r0, [r7, #4]
800753c: f001 fbb0 bl 8008ca0 <USBD_LL_StallEP>
break;
8007540: bf00 nop
}
return USBD_OK;
8007542: 2300 movs r3, #0
}
8007544: 4618 mov r0, r3
8007546: 3708 adds r7, #8
8007548: 46bd mov sp, r7
800754a: bd80 pop {r7, pc}
0800754c <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800754c: b580 push {r7, lr}
800754e: b086 sub sp, #24
8007550: af00 add r7, sp, #0
8007552: 60f8 str r0, [r7, #12]
8007554: 460b mov r3, r1
8007556: 607a str r2, [r7, #4]
8007558: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800755a: 7afb ldrb r3, [r7, #11]
800755c: 2b00 cmp r3, #0
800755e: d14b bne.n 80075f8 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
8007560: 68fb ldr r3, [r7, #12]
8007562: f503 73aa add.w r3, r3, #340 @ 0x154
8007566: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
8007568: 68fb ldr r3, [r7, #12]
800756a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800756e: 2b03 cmp r3, #3
8007570: d134 bne.n 80075dc <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
8007572: 697b ldr r3, [r7, #20]
8007574: 68da ldr r2, [r3, #12]
8007576: 697b ldr r3, [r7, #20]
8007578: 691b ldr r3, [r3, #16]
800757a: 429a cmp r2, r3
800757c: d919 bls.n 80075b2 <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
800757e: 697b ldr r3, [r7, #20]
8007580: 68da ldr r2, [r3, #12]
8007582: 697b ldr r3, [r7, #20]
8007584: 691b ldr r3, [r3, #16]
8007586: 1ad2 subs r2, r2, r3
8007588: 697b ldr r3, [r7, #20]
800758a: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800758c: 697b ldr r3, [r7, #20]
800758e: 68da ldr r2, [r3, #12]
8007590: 697b ldr r3, [r7, #20]
8007592: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8007594: 429a cmp r2, r3
8007596: d203 bcs.n 80075a0 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8007598: 697b ldr r3, [r7, #20]
800759a: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
800759c: b29b uxth r3, r3
800759e: e002 b.n 80075a6 <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
80075a0: 697b ldr r3, [r7, #20]
80075a2: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
80075a4: b29b uxth r3, r3
80075a6: 461a mov r2, r3
80075a8: 6879 ldr r1, [r7, #4]
80075aa: 68f8 ldr r0, [r7, #12]
80075ac: f000 ff54 bl 8008458 <USBD_CtlContinueRx>
80075b0: e038 b.n 8007624 <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
80075b2: 68fb ldr r3, [r7, #12]
80075b4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80075b8: 691b ldr r3, [r3, #16]
80075ba: 2b00 cmp r3, #0
80075bc: d00a beq.n 80075d4 <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
80075be: 68fb ldr r3, [r7, #12]
80075c0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
80075c4: 2b03 cmp r3, #3
80075c6: d105 bne.n 80075d4 <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
80075c8: 68fb ldr r3, [r7, #12]
80075ca: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80075ce: 691b ldr r3, [r3, #16]
80075d0: 68f8 ldr r0, [r7, #12]
80075d2: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
80075d4: 68f8 ldr r0, [r7, #12]
80075d6: f000 ff51 bl 800847c <USBD_CtlSendStatus>
80075da: e023 b.n 8007624 <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
80075dc: 68fb ldr r3, [r7, #12]
80075de: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
80075e2: 2b05 cmp r3, #5
80075e4: d11e bne.n 8007624 <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
80075e6: 68fb ldr r3, [r7, #12]
80075e8: 2200 movs r2, #0
80075ea: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
80075ee: 2100 movs r1, #0
80075f0: 68f8 ldr r0, [r7, #12]
80075f2: f001 fb55 bl 8008ca0 <USBD_LL_StallEP>
80075f6: e015 b.n 8007624 <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
80075f8: 68fb ldr r3, [r7, #12]
80075fa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80075fe: 699b ldr r3, [r3, #24]
8007600: 2b00 cmp r3, #0
8007602: d00d beq.n 8007620 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8007604: 68fb ldr r3, [r7, #12]
8007606: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
800760a: 2b03 cmp r3, #3
800760c: d108 bne.n 8007620 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
800760e: 68fb ldr r3, [r7, #12]
8007610: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007614: 699b ldr r3, [r3, #24]
8007616: 7afa ldrb r2, [r7, #11]
8007618: 4611 mov r1, r2
800761a: 68f8 ldr r0, [r7, #12]
800761c: 4798 blx r3
800761e: e001 b.n 8007624 <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8007620: 2302 movs r3, #2
8007622: e000 b.n 8007626 <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
8007624: 2300 movs r3, #0
}
8007626: 4618 mov r0, r3
8007628: 3718 adds r7, #24
800762a: 46bd mov sp, r7
800762c: bd80 pop {r7, pc}
0800762e <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800762e: b580 push {r7, lr}
8007630: b086 sub sp, #24
8007632: af00 add r7, sp, #0
8007634: 60f8 str r0, [r7, #12]
8007636: 460b mov r3, r1
8007638: 607a str r2, [r7, #4]
800763a: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800763c: 7afb ldrb r3, [r7, #11]
800763e: 2b00 cmp r3, #0
8007640: d17f bne.n 8007742 <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
8007642: 68fb ldr r3, [r7, #12]
8007644: 3314 adds r3, #20
8007646: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
8007648: 68fb ldr r3, [r7, #12]
800764a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800764e: 2b02 cmp r3, #2
8007650: d15c bne.n 800770c <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
8007652: 697b ldr r3, [r7, #20]
8007654: 68da ldr r2, [r3, #12]
8007656: 697b ldr r3, [r7, #20]
8007658: 691b ldr r3, [r3, #16]
800765a: 429a cmp r2, r3
800765c: d915 bls.n 800768a <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
800765e: 697b ldr r3, [r7, #20]
8007660: 68da ldr r2, [r3, #12]
8007662: 697b ldr r3, [r7, #20]
8007664: 691b ldr r3, [r3, #16]
8007666: 1ad2 subs r2, r2, r3
8007668: 697b ldr r3, [r7, #20]
800766a: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
800766c: 697b ldr r3, [r7, #20]
800766e: 68db ldr r3, [r3, #12]
8007670: b29b uxth r3, r3
8007672: 461a mov r2, r3
8007674: 6879 ldr r1, [r7, #4]
8007676: 68f8 ldr r0, [r7, #12]
8007678: f000 febe bl 80083f8 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800767c: 2300 movs r3, #0
800767e: 2200 movs r2, #0
8007680: 2100 movs r1, #0
8007682: 68f8 ldr r0, [r7, #12]
8007684: f001 fbb7 bl 8008df6 <USBD_LL_PrepareReceive>
8007688: e04e b.n 8007728 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800768a: 697b ldr r3, [r7, #20]
800768c: 689b ldr r3, [r3, #8]
800768e: 697a ldr r2, [r7, #20]
8007690: 6912 ldr r2, [r2, #16]
8007692: fbb3 f1f2 udiv r1, r3, r2
8007696: fb01 f202 mul.w r2, r1, r2
800769a: 1a9b subs r3, r3, r2
800769c: 2b00 cmp r3, #0
800769e: d11c bne.n 80076da <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
80076a0: 697b ldr r3, [r7, #20]
80076a2: 689a ldr r2, [r3, #8]
80076a4: 697b ldr r3, [r7, #20]
80076a6: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
80076a8: 429a cmp r2, r3
80076aa: d316 bcc.n 80076da <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
80076ac: 697b ldr r3, [r7, #20]
80076ae: 689a ldr r2, [r3, #8]
80076b0: 68fb ldr r3, [r7, #12]
80076b2: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
80076b6: 429a cmp r2, r3
80076b8: d20f bcs.n 80076da <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
80076ba: 2200 movs r2, #0
80076bc: 2100 movs r1, #0
80076be: 68f8 ldr r0, [r7, #12]
80076c0: f000 fe9a bl 80083f8 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
80076c4: 68fb ldr r3, [r7, #12]
80076c6: 2200 movs r2, #0
80076c8: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
80076cc: 2300 movs r3, #0
80076ce: 2200 movs r2, #0
80076d0: 2100 movs r1, #0
80076d2: 68f8 ldr r0, [r7, #12]
80076d4: f001 fb8f bl 8008df6 <USBD_LL_PrepareReceive>
80076d8: e026 b.n 8007728 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
80076da: 68fb ldr r3, [r7, #12]
80076dc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80076e0: 68db ldr r3, [r3, #12]
80076e2: 2b00 cmp r3, #0
80076e4: d00a beq.n 80076fc <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
80076e6: 68fb ldr r3, [r7, #12]
80076e8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
80076ec: 2b03 cmp r3, #3
80076ee: d105 bne.n 80076fc <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
80076f0: 68fb ldr r3, [r7, #12]
80076f2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80076f6: 68db ldr r3, [r3, #12]
80076f8: 68f8 ldr r0, [r7, #12]
80076fa: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
80076fc: 2180 movs r1, #128 @ 0x80
80076fe: 68f8 ldr r0, [r7, #12]
8007700: f001 face bl 8008ca0 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
8007704: 68f8 ldr r0, [r7, #12]
8007706: f000 fecc bl 80084a2 <USBD_CtlReceiveStatus>
800770a: e00d b.n 8007728 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800770c: 68fb ldr r3, [r7, #12]
800770e: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8007712: 2b04 cmp r3, #4
8007714: d004 beq.n 8007720 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
8007716: 68fb ldr r3, [r7, #12]
8007718: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800771c: 2b00 cmp r3, #0
800771e: d103 bne.n 8007728 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
8007720: 2180 movs r1, #128 @ 0x80
8007722: 68f8 ldr r0, [r7, #12]
8007724: f001 fabc bl 8008ca0 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
8007728: 68fb ldr r3, [r7, #12]
800772a: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800772e: 2b01 cmp r3, #1
8007730: d11d bne.n 800776e <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
8007732: 68f8 ldr r0, [r7, #12]
8007734: f7ff fe81 bl 800743a <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
8007738: 68fb ldr r3, [r7, #12]
800773a: 2200 movs r2, #0
800773c: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
8007740: e015 b.n 800776e <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
8007742: 68fb ldr r3, [r7, #12]
8007744: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007748: 695b ldr r3, [r3, #20]
800774a: 2b00 cmp r3, #0
800774c: d00d beq.n 800776a <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800774e: 68fb ldr r3, [r7, #12]
8007750: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
8007754: 2b03 cmp r3, #3
8007756: d108 bne.n 800776a <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
8007758: 68fb ldr r3, [r7, #12]
800775a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800775e: 695b ldr r3, [r3, #20]
8007760: 7afa ldrb r2, [r7, #11]
8007762: 4611 mov r1, r2
8007764: 68f8 ldr r0, [r7, #12]
8007766: 4798 blx r3
8007768: e001 b.n 800776e <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800776a: 2302 movs r3, #2
800776c: e000 b.n 8007770 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
800776e: 2300 movs r3, #0
}
8007770: 4618 mov r0, r3
8007772: 3718 adds r7, #24
8007774: 46bd mov sp, r7
8007776: bd80 pop {r7, pc}
08007778 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
8007778: b580 push {r7, lr}
800777a: b082 sub sp, #8
800777c: af00 add r7, sp, #0
800777e: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8007780: 2340 movs r3, #64 @ 0x40
8007782: 2200 movs r2, #0
8007784: 2100 movs r1, #0
8007786: 6878 ldr r0, [r7, #4]
8007788: f001 fa45 bl 8008c16 <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800778c: 687b ldr r3, [r7, #4]
800778e: 2201 movs r2, #1
8007790: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
8007794: 687b ldr r3, [r7, #4]
8007796: 2240 movs r2, #64 @ 0x40
8007798: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800779c: 2340 movs r3, #64 @ 0x40
800779e: 2200 movs r2, #0
80077a0: 2180 movs r1, #128 @ 0x80
80077a2: 6878 ldr r0, [r7, #4]
80077a4: f001 fa37 bl 8008c16 <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
80077a8: 687b ldr r3, [r7, #4]
80077aa: 2201 movs r2, #1
80077ac: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
80077ae: 687b ldr r3, [r7, #4]
80077b0: 2240 movs r2, #64 @ 0x40
80077b2: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
80077b4: 687b ldr r3, [r7, #4]
80077b6: 2201 movs r2, #1
80077b8: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
80077bc: 687b ldr r3, [r7, #4]
80077be: 2200 movs r2, #0
80077c0: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
80077c4: 687b ldr r3, [r7, #4]
80077c6: 2200 movs r2, #0
80077c8: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
80077ca: 687b ldr r3, [r7, #4]
80077cc: 2200 movs r2, #0
80077ce: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
80077d2: 687b ldr r3, [r7, #4]
80077d4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80077d8: 2b00 cmp r3, #0
80077da: d009 beq.n 80077f0 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
80077dc: 687b ldr r3, [r7, #4]
80077de: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80077e2: 685b ldr r3, [r3, #4]
80077e4: 687a ldr r2, [r7, #4]
80077e6: 6852 ldr r2, [r2, #4]
80077e8: b2d2 uxtb r2, r2
80077ea: 4611 mov r1, r2
80077ec: 6878 ldr r0, [r7, #4]
80077ee: 4798 blx r3
}
return USBD_OK;
80077f0: 2300 movs r3, #0
}
80077f2: 4618 mov r0, r3
80077f4: 3708 adds r7, #8
80077f6: 46bd mov sp, r7
80077f8: bd80 pop {r7, pc}
080077fa <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
80077fa: b480 push {r7}
80077fc: b083 sub sp, #12
80077fe: af00 add r7, sp, #0
8007800: 6078 str r0, [r7, #4]
8007802: 460b mov r3, r1
8007804: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
8007806: 687b ldr r3, [r7, #4]
8007808: 78fa ldrb r2, [r7, #3]
800780a: 741a strb r2, [r3, #16]
return USBD_OK;
800780c: 2300 movs r3, #0
}
800780e: 4618 mov r0, r3
8007810: 370c adds r7, #12
8007812: 46bd mov sp, r7
8007814: bc80 pop {r7}
8007816: 4770 bx lr
08007818 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
8007818: b480 push {r7}
800781a: b083 sub sp, #12
800781c: af00 add r7, sp, #0
800781e: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
8007820: 687b ldr r3, [r7, #4]
8007822: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
8007826: 687b ldr r3, [r7, #4]
8007828: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
800782c: 687b ldr r3, [r7, #4]
800782e: 2204 movs r2, #4
8007830: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
8007834: 2300 movs r3, #0
}
8007836: 4618 mov r0, r3
8007838: 370c adds r7, #12
800783a: 46bd mov sp, r7
800783c: bc80 pop {r7}
800783e: 4770 bx lr
08007840 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
8007840: b480 push {r7}
8007842: b083 sub sp, #12
8007844: af00 add r7, sp, #0
8007846: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
8007848: 687b ldr r3, [r7, #4]
800784a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800784e: 2b04 cmp r3, #4
8007850: d105 bne.n 800785e <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
8007852: 687b ldr r3, [r7, #4]
8007854: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
8007858: 687b ldr r3, [r7, #4]
800785a: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800785e: 2300 movs r3, #0
}
8007860: 4618 mov r0, r3
8007862: 370c adds r7, #12
8007864: 46bd mov sp, r7
8007866: bc80 pop {r7}
8007868: 4770 bx lr
0800786a <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800786a: b580 push {r7, lr}
800786c: b082 sub sp, #8
800786e: af00 add r7, sp, #0
8007870: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007872: 687b ldr r3, [r7, #4]
8007874: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007878: 2b03 cmp r3, #3
800787a: d10b bne.n 8007894 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800787c: 687b ldr r3, [r7, #4]
800787e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007882: 69db ldr r3, [r3, #28]
8007884: 2b00 cmp r3, #0
8007886: d005 beq.n 8007894 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
8007888: 687b ldr r3, [r7, #4]
800788a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800788e: 69db ldr r3, [r3, #28]
8007890: 6878 ldr r0, [r7, #4]
8007892: 4798 blx r3
}
}
return USBD_OK;
8007894: 2300 movs r3, #0
}
8007896: 4618 mov r0, r3
8007898: 3708 adds r7, #8
800789a: 46bd mov sp, r7
800789c: bd80 pop {r7, pc}
...
080078a0 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80078a0: b580 push {r7, lr}
80078a2: b084 sub sp, #16
80078a4: af00 add r7, sp, #0
80078a6: 6078 str r0, [r7, #4]
80078a8: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
80078aa: 2300 movs r3, #0
80078ac: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
80078ae: 683b ldr r3, [r7, #0]
80078b0: 781b ldrb r3, [r3, #0]
80078b2: f003 0360 and.w r3, r3, #96 @ 0x60
80078b6: 2b40 cmp r3, #64 @ 0x40
80078b8: d005 beq.n 80078c6 <USBD_StdDevReq+0x26>
80078ba: 2b40 cmp r3, #64 @ 0x40
80078bc: d84f bhi.n 800795e <USBD_StdDevReq+0xbe>
80078be: 2b00 cmp r3, #0
80078c0: d009 beq.n 80078d6 <USBD_StdDevReq+0x36>
80078c2: 2b20 cmp r3, #32
80078c4: d14b bne.n 800795e <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
80078c6: 687b ldr r3, [r7, #4]
80078c8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80078cc: 689b ldr r3, [r3, #8]
80078ce: 6839 ldr r1, [r7, #0]
80078d0: 6878 ldr r0, [r7, #4]
80078d2: 4798 blx r3
break;
80078d4: e048 b.n 8007968 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
80078d6: 683b ldr r3, [r7, #0]
80078d8: 785b ldrb r3, [r3, #1]
80078da: 2b09 cmp r3, #9
80078dc: d839 bhi.n 8007952 <USBD_StdDevReq+0xb2>
80078de: a201 add r2, pc, #4 @ (adr r2, 80078e4 <USBD_StdDevReq+0x44>)
80078e0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80078e4: 08007935 .word 0x08007935
80078e8: 08007949 .word 0x08007949
80078ec: 08007953 .word 0x08007953
80078f0: 0800793f .word 0x0800793f
80078f4: 08007953 .word 0x08007953
80078f8: 08007917 .word 0x08007917
80078fc: 0800790d .word 0x0800790d
8007900: 08007953 .word 0x08007953
8007904: 0800792b .word 0x0800792b
8007908: 08007921 .word 0x08007921
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800790c: 6839 ldr r1, [r7, #0]
800790e: 6878 ldr r0, [r7, #4]
8007910: f000 f9dc bl 8007ccc <USBD_GetDescriptor>
break;
8007914: e022 b.n 800795c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
8007916: 6839 ldr r1, [r7, #0]
8007918: 6878 ldr r0, [r7, #4]
800791a: f000 fb3f bl 8007f9c <USBD_SetAddress>
break;
800791e: e01d b.n 800795c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
8007920: 6839 ldr r1, [r7, #0]
8007922: 6878 ldr r0, [r7, #4]
8007924: f000 fb7e bl 8008024 <USBD_SetConfig>
break;
8007928: e018 b.n 800795c <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800792a: 6839 ldr r1, [r7, #0]
800792c: 6878 ldr r0, [r7, #4]
800792e: f000 fc07 bl 8008140 <USBD_GetConfig>
break;
8007932: e013 b.n 800795c <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
8007934: 6839 ldr r1, [r7, #0]
8007936: 6878 ldr r0, [r7, #4]
8007938: f000 fc37 bl 80081aa <USBD_GetStatus>
break;
800793c: e00e b.n 800795c <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800793e: 6839 ldr r1, [r7, #0]
8007940: 6878 ldr r0, [r7, #4]
8007942: f000 fc65 bl 8008210 <USBD_SetFeature>
break;
8007946: e009 b.n 800795c <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
8007948: 6839 ldr r1, [r7, #0]
800794a: 6878 ldr r0, [r7, #4]
800794c: f000 fc74 bl 8008238 <USBD_ClrFeature>
break;
8007950: e004 b.n 800795c <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
8007952: 6839 ldr r1, [r7, #0]
8007954: 6878 ldr r0, [r7, #4]
8007956: f000 fcc9 bl 80082ec <USBD_CtlError>
break;
800795a: bf00 nop
}
break;
800795c: e004 b.n 8007968 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800795e: 6839 ldr r1, [r7, #0]
8007960: 6878 ldr r0, [r7, #4]
8007962: f000 fcc3 bl 80082ec <USBD_CtlError>
break;
8007966: bf00 nop
}
return ret;
8007968: 7bfb ldrb r3, [r7, #15]
}
800796a: 4618 mov r0, r3
800796c: 3710 adds r7, #16
800796e: 46bd mov sp, r7
8007970: bd80 pop {r7, pc}
8007972: bf00 nop
08007974 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007974: b580 push {r7, lr}
8007976: b084 sub sp, #16
8007978: af00 add r7, sp, #0
800797a: 6078 str r0, [r7, #4]
800797c: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800797e: 2300 movs r3, #0
8007980: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007982: 683b ldr r3, [r7, #0]
8007984: 781b ldrb r3, [r3, #0]
8007986: f003 0360 and.w r3, r3, #96 @ 0x60
800798a: 2b40 cmp r3, #64 @ 0x40
800798c: d005 beq.n 800799a <USBD_StdItfReq+0x26>
800798e: 2b40 cmp r3, #64 @ 0x40
8007990: d82e bhi.n 80079f0 <USBD_StdItfReq+0x7c>
8007992: 2b00 cmp r3, #0
8007994: d001 beq.n 800799a <USBD_StdItfReq+0x26>
8007996: 2b20 cmp r3, #32
8007998: d12a bne.n 80079f0 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800799a: 687b ldr r3, [r7, #4]
800799c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80079a0: 3b01 subs r3, #1
80079a2: 2b02 cmp r3, #2
80079a4: d81d bhi.n 80079e2 <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
80079a6: 683b ldr r3, [r7, #0]
80079a8: 889b ldrh r3, [r3, #4]
80079aa: b2db uxtb r3, r3
80079ac: 2b01 cmp r3, #1
80079ae: d813 bhi.n 80079d8 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
80079b0: 687b ldr r3, [r7, #4]
80079b2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80079b6: 689b ldr r3, [r3, #8]
80079b8: 6839 ldr r1, [r7, #0]
80079ba: 6878 ldr r0, [r7, #4]
80079bc: 4798 blx r3
80079be: 4603 mov r3, r0
80079c0: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
80079c2: 683b ldr r3, [r7, #0]
80079c4: 88db ldrh r3, [r3, #6]
80079c6: 2b00 cmp r3, #0
80079c8: d110 bne.n 80079ec <USBD_StdItfReq+0x78>
80079ca: 7bfb ldrb r3, [r7, #15]
80079cc: 2b00 cmp r3, #0
80079ce: d10d bne.n 80079ec <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
80079d0: 6878 ldr r0, [r7, #4]
80079d2: f000 fd53 bl 800847c <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
80079d6: e009 b.n 80079ec <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
80079d8: 6839 ldr r1, [r7, #0]
80079da: 6878 ldr r0, [r7, #4]
80079dc: f000 fc86 bl 80082ec <USBD_CtlError>
break;
80079e0: e004 b.n 80079ec <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
80079e2: 6839 ldr r1, [r7, #0]
80079e4: 6878 ldr r0, [r7, #4]
80079e6: f000 fc81 bl 80082ec <USBD_CtlError>
break;
80079ea: e000 b.n 80079ee <USBD_StdItfReq+0x7a>
break;
80079ec: bf00 nop
}
break;
80079ee: e004 b.n 80079fa <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
80079f0: 6839 ldr r1, [r7, #0]
80079f2: 6878 ldr r0, [r7, #4]
80079f4: f000 fc7a bl 80082ec <USBD_CtlError>
break;
80079f8: bf00 nop
}
return USBD_OK;
80079fa: 2300 movs r3, #0
}
80079fc: 4618 mov r0, r3
80079fe: 3710 adds r7, #16
8007a00: 46bd mov sp, r7
8007a02: bd80 pop {r7, pc}
08007a04 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007a04: b580 push {r7, lr}
8007a06: b084 sub sp, #16
8007a08: af00 add r7, sp, #0
8007a0a: 6078 str r0, [r7, #4]
8007a0c: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
8007a0e: 2300 movs r3, #0
8007a10: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
8007a12: 683b ldr r3, [r7, #0]
8007a14: 889b ldrh r3, [r3, #4]
8007a16: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007a18: 683b ldr r3, [r7, #0]
8007a1a: 781b ldrb r3, [r3, #0]
8007a1c: f003 0360 and.w r3, r3, #96 @ 0x60
8007a20: 2b40 cmp r3, #64 @ 0x40
8007a22: d007 beq.n 8007a34 <USBD_StdEPReq+0x30>
8007a24: 2b40 cmp r3, #64 @ 0x40
8007a26: f200 8146 bhi.w 8007cb6 <USBD_StdEPReq+0x2b2>
8007a2a: 2b00 cmp r3, #0
8007a2c: d00a beq.n 8007a44 <USBD_StdEPReq+0x40>
8007a2e: 2b20 cmp r3, #32
8007a30: f040 8141 bne.w 8007cb6 <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
8007a34: 687b ldr r3, [r7, #4]
8007a36: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007a3a: 689b ldr r3, [r3, #8]
8007a3c: 6839 ldr r1, [r7, #0]
8007a3e: 6878 ldr r0, [r7, #4]
8007a40: 4798 blx r3
break;
8007a42: e13d b.n 8007cc0 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
8007a44: 683b ldr r3, [r7, #0]
8007a46: 781b ldrb r3, [r3, #0]
8007a48: f003 0360 and.w r3, r3, #96 @ 0x60
8007a4c: 2b20 cmp r3, #32
8007a4e: d10a bne.n 8007a66 <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
8007a50: 687b ldr r3, [r7, #4]
8007a52: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007a56: 689b ldr r3, [r3, #8]
8007a58: 6839 ldr r1, [r7, #0]
8007a5a: 6878 ldr r0, [r7, #4]
8007a5c: 4798 blx r3
8007a5e: 4603 mov r3, r0
8007a60: 73fb strb r3, [r7, #15]
return ret;
8007a62: 7bfb ldrb r3, [r7, #15]
8007a64: e12d b.n 8007cc2 <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
8007a66: 683b ldr r3, [r7, #0]
8007a68: 785b ldrb r3, [r3, #1]
8007a6a: 2b03 cmp r3, #3
8007a6c: d007 beq.n 8007a7e <USBD_StdEPReq+0x7a>
8007a6e: 2b03 cmp r3, #3
8007a70: f300 811b bgt.w 8007caa <USBD_StdEPReq+0x2a6>
8007a74: 2b00 cmp r3, #0
8007a76: d072 beq.n 8007b5e <USBD_StdEPReq+0x15a>
8007a78: 2b01 cmp r3, #1
8007a7a: d03a beq.n 8007af2 <USBD_StdEPReq+0xee>
8007a7c: e115 b.n 8007caa <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
8007a7e: 687b ldr r3, [r7, #4]
8007a80: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007a84: 2b02 cmp r3, #2
8007a86: d002 beq.n 8007a8e <USBD_StdEPReq+0x8a>
8007a88: 2b03 cmp r3, #3
8007a8a: d015 beq.n 8007ab8 <USBD_StdEPReq+0xb4>
8007a8c: e02b b.n 8007ae6 <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8007a8e: 7bbb ldrb r3, [r7, #14]
8007a90: 2b00 cmp r3, #0
8007a92: d00c beq.n 8007aae <USBD_StdEPReq+0xaa>
8007a94: 7bbb ldrb r3, [r7, #14]
8007a96: 2b80 cmp r3, #128 @ 0x80
8007a98: d009 beq.n 8007aae <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
8007a9a: 7bbb ldrb r3, [r7, #14]
8007a9c: 4619 mov r1, r3
8007a9e: 6878 ldr r0, [r7, #4]
8007aa0: f001 f8fe bl 8008ca0 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8007aa4: 2180 movs r1, #128 @ 0x80
8007aa6: 6878 ldr r0, [r7, #4]
8007aa8: f001 f8fa bl 8008ca0 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8007aac: e020 b.n 8007af0 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
8007aae: 6839 ldr r1, [r7, #0]
8007ab0: 6878 ldr r0, [r7, #4]
8007ab2: f000 fc1b bl 80082ec <USBD_CtlError>
break;
8007ab6: e01b b.n 8007af0 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8007ab8: 683b ldr r3, [r7, #0]
8007aba: 885b ldrh r3, [r3, #2]
8007abc: 2b00 cmp r3, #0
8007abe: d10e bne.n 8007ade <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
8007ac0: 7bbb ldrb r3, [r7, #14]
8007ac2: 2b00 cmp r3, #0
8007ac4: d00b beq.n 8007ade <USBD_StdEPReq+0xda>
8007ac6: 7bbb ldrb r3, [r7, #14]
8007ac8: 2b80 cmp r3, #128 @ 0x80
8007aca: d008 beq.n 8007ade <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
8007acc: 683b ldr r3, [r7, #0]
8007ace: 88db ldrh r3, [r3, #6]
8007ad0: 2b00 cmp r3, #0
8007ad2: d104 bne.n 8007ade <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
8007ad4: 7bbb ldrb r3, [r7, #14]
8007ad6: 4619 mov r1, r3
8007ad8: 6878 ldr r0, [r7, #4]
8007ada: f001 f8e1 bl 8008ca0 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
8007ade: 6878 ldr r0, [r7, #4]
8007ae0: f000 fccc bl 800847c <USBD_CtlSendStatus>
break;
8007ae4: e004 b.n 8007af0 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
8007ae6: 6839 ldr r1, [r7, #0]
8007ae8: 6878 ldr r0, [r7, #4]
8007aea: f000 fbff bl 80082ec <USBD_CtlError>
break;
8007aee: bf00 nop
}
break;
8007af0: e0e0 b.n 8007cb4 <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
8007af2: 687b ldr r3, [r7, #4]
8007af4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007af8: 2b02 cmp r3, #2
8007afa: d002 beq.n 8007b02 <USBD_StdEPReq+0xfe>
8007afc: 2b03 cmp r3, #3
8007afe: d015 beq.n 8007b2c <USBD_StdEPReq+0x128>
8007b00: e026 b.n 8007b50 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8007b02: 7bbb ldrb r3, [r7, #14]
8007b04: 2b00 cmp r3, #0
8007b06: d00c beq.n 8007b22 <USBD_StdEPReq+0x11e>
8007b08: 7bbb ldrb r3, [r7, #14]
8007b0a: 2b80 cmp r3, #128 @ 0x80
8007b0c: d009 beq.n 8007b22 <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
8007b0e: 7bbb ldrb r3, [r7, #14]
8007b10: 4619 mov r1, r3
8007b12: 6878 ldr r0, [r7, #4]
8007b14: f001 f8c4 bl 8008ca0 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8007b18: 2180 movs r1, #128 @ 0x80
8007b1a: 6878 ldr r0, [r7, #4]
8007b1c: f001 f8c0 bl 8008ca0 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8007b20: e01c b.n 8007b5c <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
8007b22: 6839 ldr r1, [r7, #0]
8007b24: 6878 ldr r0, [r7, #4]
8007b26: f000 fbe1 bl 80082ec <USBD_CtlError>
break;
8007b2a: e017 b.n 8007b5c <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8007b2c: 683b ldr r3, [r7, #0]
8007b2e: 885b ldrh r3, [r3, #2]
8007b30: 2b00 cmp r3, #0
8007b32: d112 bne.n 8007b5a <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
8007b34: 7bbb ldrb r3, [r7, #14]
8007b36: f003 037f and.w r3, r3, #127 @ 0x7f
8007b3a: 2b00 cmp r3, #0
8007b3c: d004 beq.n 8007b48 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
8007b3e: 7bbb ldrb r3, [r7, #14]
8007b40: 4619 mov r1, r3
8007b42: 6878 ldr r0, [r7, #4]
8007b44: f001 f8cb bl 8008cde <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
8007b48: 6878 ldr r0, [r7, #4]
8007b4a: f000 fc97 bl 800847c <USBD_CtlSendStatus>
}
break;
8007b4e: e004 b.n 8007b5a <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
8007b50: 6839 ldr r1, [r7, #0]
8007b52: 6878 ldr r0, [r7, #4]
8007b54: f000 fbca bl 80082ec <USBD_CtlError>
break;
8007b58: e000 b.n 8007b5c <USBD_StdEPReq+0x158>
break;
8007b5a: bf00 nop
}
break;
8007b5c: e0aa b.n 8007cb4 <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
8007b5e: 687b ldr r3, [r7, #4]
8007b60: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007b64: 2b02 cmp r3, #2
8007b66: d002 beq.n 8007b6e <USBD_StdEPReq+0x16a>
8007b68: 2b03 cmp r3, #3
8007b6a: d032 beq.n 8007bd2 <USBD_StdEPReq+0x1ce>
8007b6c: e097 b.n 8007c9e <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8007b6e: 7bbb ldrb r3, [r7, #14]
8007b70: 2b00 cmp r3, #0
8007b72: d007 beq.n 8007b84 <USBD_StdEPReq+0x180>
8007b74: 7bbb ldrb r3, [r7, #14]
8007b76: 2b80 cmp r3, #128 @ 0x80
8007b78: d004 beq.n 8007b84 <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
8007b7a: 6839 ldr r1, [r7, #0]
8007b7c: 6878 ldr r0, [r7, #4]
8007b7e: f000 fbb5 bl 80082ec <USBD_CtlError>
break;
8007b82: e091 b.n 8007ca8 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007b84: f997 300e ldrsb.w r3, [r7, #14]
8007b88: 2b00 cmp r3, #0
8007b8a: da0b bge.n 8007ba4 <USBD_StdEPReq+0x1a0>
8007b8c: 7bbb ldrb r3, [r7, #14]
8007b8e: f003 027f and.w r2, r3, #127 @ 0x7f
8007b92: 4613 mov r3, r2
8007b94: 009b lsls r3, r3, #2
8007b96: 4413 add r3, r2
8007b98: 009b lsls r3, r3, #2
8007b9a: 3310 adds r3, #16
8007b9c: 687a ldr r2, [r7, #4]
8007b9e: 4413 add r3, r2
8007ba0: 3304 adds r3, #4
8007ba2: e00b b.n 8007bbc <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
8007ba4: 7bbb ldrb r3, [r7, #14]
8007ba6: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007baa: 4613 mov r3, r2
8007bac: 009b lsls r3, r3, #2
8007bae: 4413 add r3, r2
8007bb0: 009b lsls r3, r3, #2
8007bb2: f503 73a8 add.w r3, r3, #336 @ 0x150
8007bb6: 687a ldr r2, [r7, #4]
8007bb8: 4413 add r3, r2
8007bba: 3304 adds r3, #4
8007bbc: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
8007bbe: 68bb ldr r3, [r7, #8]
8007bc0: 2200 movs r2, #0
8007bc2: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8007bc4: 68bb ldr r3, [r7, #8]
8007bc6: 2202 movs r2, #2
8007bc8: 4619 mov r1, r3
8007bca: 6878 ldr r0, [r7, #4]
8007bcc: f000 fbf8 bl 80083c0 <USBD_CtlSendData>
break;
8007bd0: e06a b.n 8007ca8 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
8007bd2: f997 300e ldrsb.w r3, [r7, #14]
8007bd6: 2b00 cmp r3, #0
8007bd8: da11 bge.n 8007bfe <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
8007bda: 7bbb ldrb r3, [r7, #14]
8007bdc: f003 020f and.w r2, r3, #15
8007be0: 6879 ldr r1, [r7, #4]
8007be2: 4613 mov r3, r2
8007be4: 009b lsls r3, r3, #2
8007be6: 4413 add r3, r2
8007be8: 009b lsls r3, r3, #2
8007bea: 440b add r3, r1
8007bec: 3318 adds r3, #24
8007bee: 681b ldr r3, [r3, #0]
8007bf0: 2b00 cmp r3, #0
8007bf2: d117 bne.n 8007c24 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8007bf4: 6839 ldr r1, [r7, #0]
8007bf6: 6878 ldr r0, [r7, #4]
8007bf8: f000 fb78 bl 80082ec <USBD_CtlError>
break;
8007bfc: e054 b.n 8007ca8 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
8007bfe: 7bbb ldrb r3, [r7, #14]
8007c00: f003 020f and.w r2, r3, #15
8007c04: 6879 ldr r1, [r7, #4]
8007c06: 4613 mov r3, r2
8007c08: 009b lsls r3, r3, #2
8007c0a: 4413 add r3, r2
8007c0c: 009b lsls r3, r3, #2
8007c0e: 440b add r3, r1
8007c10: f503 73ac add.w r3, r3, #344 @ 0x158
8007c14: 681b ldr r3, [r3, #0]
8007c16: 2b00 cmp r3, #0
8007c18: d104 bne.n 8007c24 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8007c1a: 6839 ldr r1, [r7, #0]
8007c1c: 6878 ldr r0, [r7, #4]
8007c1e: f000 fb65 bl 80082ec <USBD_CtlError>
break;
8007c22: e041 b.n 8007ca8 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007c24: f997 300e ldrsb.w r3, [r7, #14]
8007c28: 2b00 cmp r3, #0
8007c2a: da0b bge.n 8007c44 <USBD_StdEPReq+0x240>
8007c2c: 7bbb ldrb r3, [r7, #14]
8007c2e: f003 027f and.w r2, r3, #127 @ 0x7f
8007c32: 4613 mov r3, r2
8007c34: 009b lsls r3, r3, #2
8007c36: 4413 add r3, r2
8007c38: 009b lsls r3, r3, #2
8007c3a: 3310 adds r3, #16
8007c3c: 687a ldr r2, [r7, #4]
8007c3e: 4413 add r3, r2
8007c40: 3304 adds r3, #4
8007c42: e00b b.n 8007c5c <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
8007c44: 7bbb ldrb r3, [r7, #14]
8007c46: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007c4a: 4613 mov r3, r2
8007c4c: 009b lsls r3, r3, #2
8007c4e: 4413 add r3, r2
8007c50: 009b lsls r3, r3, #2
8007c52: f503 73a8 add.w r3, r3, #336 @ 0x150
8007c56: 687a ldr r2, [r7, #4]
8007c58: 4413 add r3, r2
8007c5a: 3304 adds r3, #4
8007c5c: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
8007c5e: 7bbb ldrb r3, [r7, #14]
8007c60: 2b00 cmp r3, #0
8007c62: d002 beq.n 8007c6a <USBD_StdEPReq+0x266>
8007c64: 7bbb ldrb r3, [r7, #14]
8007c66: 2b80 cmp r3, #128 @ 0x80
8007c68: d103 bne.n 8007c72 <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
8007c6a: 68bb ldr r3, [r7, #8]
8007c6c: 2200 movs r2, #0
8007c6e: 601a str r2, [r3, #0]
8007c70: e00e b.n 8007c90 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
8007c72: 7bbb ldrb r3, [r7, #14]
8007c74: 4619 mov r1, r3
8007c76: 6878 ldr r0, [r7, #4]
8007c78: f001 f850 bl 8008d1c <USBD_LL_IsStallEP>
8007c7c: 4603 mov r3, r0
8007c7e: 2b00 cmp r3, #0
8007c80: d003 beq.n 8007c8a <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
8007c82: 68bb ldr r3, [r7, #8]
8007c84: 2201 movs r2, #1
8007c86: 601a str r2, [r3, #0]
8007c88: e002 b.n 8007c90 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
8007c8a: 68bb ldr r3, [r7, #8]
8007c8c: 2200 movs r2, #0
8007c8e: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8007c90: 68bb ldr r3, [r7, #8]
8007c92: 2202 movs r2, #2
8007c94: 4619 mov r1, r3
8007c96: 6878 ldr r0, [r7, #4]
8007c98: f000 fb92 bl 80083c0 <USBD_CtlSendData>
break;
8007c9c: e004 b.n 8007ca8 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
8007c9e: 6839 ldr r1, [r7, #0]
8007ca0: 6878 ldr r0, [r7, #4]
8007ca2: f000 fb23 bl 80082ec <USBD_CtlError>
break;
8007ca6: bf00 nop
}
break;
8007ca8: e004 b.n 8007cb4 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
8007caa: 6839 ldr r1, [r7, #0]
8007cac: 6878 ldr r0, [r7, #4]
8007cae: f000 fb1d bl 80082ec <USBD_CtlError>
break;
8007cb2: bf00 nop
}
break;
8007cb4: e004 b.n 8007cc0 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
8007cb6: 6839 ldr r1, [r7, #0]
8007cb8: 6878 ldr r0, [r7, #4]
8007cba: f000 fb17 bl 80082ec <USBD_CtlError>
break;
8007cbe: bf00 nop
}
return ret;
8007cc0: 7bfb ldrb r3, [r7, #15]
}
8007cc2: 4618 mov r0, r3
8007cc4: 3710 adds r7, #16
8007cc6: 46bd mov sp, r7
8007cc8: bd80 pop {r7, pc}
...
08007ccc <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007ccc: b580 push {r7, lr}
8007cce: b084 sub sp, #16
8007cd0: af00 add r7, sp, #0
8007cd2: 6078 str r0, [r7, #4]
8007cd4: 6039 str r1, [r7, #0]
uint16_t len = 0U;
8007cd6: 2300 movs r3, #0
8007cd8: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
8007cda: 2300 movs r3, #0
8007cdc: 60fb str r3, [r7, #12]
uint8_t err = 0U;
8007cde: 2300 movs r3, #0
8007ce0: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
8007ce2: 683b ldr r3, [r7, #0]
8007ce4: 885b ldrh r3, [r3, #2]
8007ce6: 0a1b lsrs r3, r3, #8
8007ce8: b29b uxth r3, r3
8007cea: 3b01 subs r3, #1
8007cec: 2b06 cmp r3, #6
8007cee: f200 8128 bhi.w 8007f42 <USBD_GetDescriptor+0x276>
8007cf2: a201 add r2, pc, #4 @ (adr r2, 8007cf8 <USBD_GetDescriptor+0x2c>)
8007cf4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007cf8: 08007d15 .word 0x08007d15
8007cfc: 08007d2d .word 0x08007d2d
8007d00: 08007d6d .word 0x08007d6d
8007d04: 08007f43 .word 0x08007f43
8007d08: 08007f43 .word 0x08007f43
8007d0c: 08007ee3 .word 0x08007ee3
8007d10: 08007f0f .word 0x08007f0f
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
8007d14: 687b ldr r3, [r7, #4]
8007d16: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007d1a: 681b ldr r3, [r3, #0]
8007d1c: 687a ldr r2, [r7, #4]
8007d1e: 7c12 ldrb r2, [r2, #16]
8007d20: f107 0108 add.w r1, r7, #8
8007d24: 4610 mov r0, r2
8007d26: 4798 blx r3
8007d28: 60f8 str r0, [r7, #12]
break;
8007d2a: e112 b.n 8007f52 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007d2c: 687b ldr r3, [r7, #4]
8007d2e: 7c1b ldrb r3, [r3, #16]
8007d30: 2b00 cmp r3, #0
8007d32: d10d bne.n 8007d50 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
8007d34: 687b ldr r3, [r7, #4]
8007d36: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007d3a: 6a9b ldr r3, [r3, #40] @ 0x28
8007d3c: f107 0208 add.w r2, r7, #8
8007d40: 4610 mov r0, r2
8007d42: 4798 blx r3
8007d44: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8007d46: 68fb ldr r3, [r7, #12]
8007d48: 3301 adds r3, #1
8007d4a: 2202 movs r2, #2
8007d4c: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
8007d4e: e100 b.n 8007f52 <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
8007d50: 687b ldr r3, [r7, #4]
8007d52: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007d56: 6adb ldr r3, [r3, #44] @ 0x2c
8007d58: f107 0208 add.w r2, r7, #8
8007d5c: 4610 mov r0, r2
8007d5e: 4798 blx r3
8007d60: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8007d62: 68fb ldr r3, [r7, #12]
8007d64: 3301 adds r3, #1
8007d66: 2202 movs r2, #2
8007d68: 701a strb r2, [r3, #0]
break;
8007d6a: e0f2 b.n 8007f52 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
8007d6c: 683b ldr r3, [r7, #0]
8007d6e: 885b ldrh r3, [r3, #2]
8007d70: b2db uxtb r3, r3
8007d72: 2b05 cmp r3, #5
8007d74: f200 80ac bhi.w 8007ed0 <USBD_GetDescriptor+0x204>
8007d78: a201 add r2, pc, #4 @ (adr r2, 8007d80 <USBD_GetDescriptor+0xb4>)
8007d7a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007d7e: bf00 nop
8007d80: 08007d99 .word 0x08007d99
8007d84: 08007dcd .word 0x08007dcd
8007d88: 08007e01 .word 0x08007e01
8007d8c: 08007e35 .word 0x08007e35
8007d90: 08007e69 .word 0x08007e69
8007d94: 08007e9d .word 0x08007e9d
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
8007d98: 687b ldr r3, [r7, #4]
8007d9a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007d9e: 685b ldr r3, [r3, #4]
8007da0: 2b00 cmp r3, #0
8007da2: d00b beq.n 8007dbc <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
8007da4: 687b ldr r3, [r7, #4]
8007da6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007daa: 685b ldr r3, [r3, #4]
8007dac: 687a ldr r2, [r7, #4]
8007dae: 7c12 ldrb r2, [r2, #16]
8007db0: f107 0108 add.w r1, r7, #8
8007db4: 4610 mov r0, r2
8007db6: 4798 blx r3
8007db8: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007dba: e091 b.n 8007ee0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007dbc: 6839 ldr r1, [r7, #0]
8007dbe: 6878 ldr r0, [r7, #4]
8007dc0: f000 fa94 bl 80082ec <USBD_CtlError>
err++;
8007dc4: 7afb ldrb r3, [r7, #11]
8007dc6: 3301 adds r3, #1
8007dc8: 72fb strb r3, [r7, #11]
break;
8007dca: e089 b.n 8007ee0 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
8007dcc: 687b ldr r3, [r7, #4]
8007dce: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007dd2: 689b ldr r3, [r3, #8]
8007dd4: 2b00 cmp r3, #0
8007dd6: d00b beq.n 8007df0 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
8007dd8: 687b ldr r3, [r7, #4]
8007dda: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007dde: 689b ldr r3, [r3, #8]
8007de0: 687a ldr r2, [r7, #4]
8007de2: 7c12 ldrb r2, [r2, #16]
8007de4: f107 0108 add.w r1, r7, #8
8007de8: 4610 mov r0, r2
8007dea: 4798 blx r3
8007dec: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007dee: e077 b.n 8007ee0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007df0: 6839 ldr r1, [r7, #0]
8007df2: 6878 ldr r0, [r7, #4]
8007df4: f000 fa7a bl 80082ec <USBD_CtlError>
err++;
8007df8: 7afb ldrb r3, [r7, #11]
8007dfa: 3301 adds r3, #1
8007dfc: 72fb strb r3, [r7, #11]
break;
8007dfe: e06f b.n 8007ee0 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
8007e00: 687b ldr r3, [r7, #4]
8007e02: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007e06: 68db ldr r3, [r3, #12]
8007e08: 2b00 cmp r3, #0
8007e0a: d00b beq.n 8007e24 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
8007e0c: 687b ldr r3, [r7, #4]
8007e0e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007e12: 68db ldr r3, [r3, #12]
8007e14: 687a ldr r2, [r7, #4]
8007e16: 7c12 ldrb r2, [r2, #16]
8007e18: f107 0108 add.w r1, r7, #8
8007e1c: 4610 mov r0, r2
8007e1e: 4798 blx r3
8007e20: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007e22: e05d b.n 8007ee0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007e24: 6839 ldr r1, [r7, #0]
8007e26: 6878 ldr r0, [r7, #4]
8007e28: f000 fa60 bl 80082ec <USBD_CtlError>
err++;
8007e2c: 7afb ldrb r3, [r7, #11]
8007e2e: 3301 adds r3, #1
8007e30: 72fb strb r3, [r7, #11]
break;
8007e32: e055 b.n 8007ee0 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
8007e34: 687b ldr r3, [r7, #4]
8007e36: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007e3a: 691b ldr r3, [r3, #16]
8007e3c: 2b00 cmp r3, #0
8007e3e: d00b beq.n 8007e58 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
8007e40: 687b ldr r3, [r7, #4]
8007e42: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007e46: 691b ldr r3, [r3, #16]
8007e48: 687a ldr r2, [r7, #4]
8007e4a: 7c12 ldrb r2, [r2, #16]
8007e4c: f107 0108 add.w r1, r7, #8
8007e50: 4610 mov r0, r2
8007e52: 4798 blx r3
8007e54: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007e56: e043 b.n 8007ee0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007e58: 6839 ldr r1, [r7, #0]
8007e5a: 6878 ldr r0, [r7, #4]
8007e5c: f000 fa46 bl 80082ec <USBD_CtlError>
err++;
8007e60: 7afb ldrb r3, [r7, #11]
8007e62: 3301 adds r3, #1
8007e64: 72fb strb r3, [r7, #11]
break;
8007e66: e03b b.n 8007ee0 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
8007e68: 687b ldr r3, [r7, #4]
8007e6a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007e6e: 695b ldr r3, [r3, #20]
8007e70: 2b00 cmp r3, #0
8007e72: d00b beq.n 8007e8c <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
8007e74: 687b ldr r3, [r7, #4]
8007e76: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007e7a: 695b ldr r3, [r3, #20]
8007e7c: 687a ldr r2, [r7, #4]
8007e7e: 7c12 ldrb r2, [r2, #16]
8007e80: f107 0108 add.w r1, r7, #8
8007e84: 4610 mov r0, r2
8007e86: 4798 blx r3
8007e88: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007e8a: e029 b.n 8007ee0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007e8c: 6839 ldr r1, [r7, #0]
8007e8e: 6878 ldr r0, [r7, #4]
8007e90: f000 fa2c bl 80082ec <USBD_CtlError>
err++;
8007e94: 7afb ldrb r3, [r7, #11]
8007e96: 3301 adds r3, #1
8007e98: 72fb strb r3, [r7, #11]
break;
8007e9a: e021 b.n 8007ee0 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
8007e9c: 687b ldr r3, [r7, #4]
8007e9e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007ea2: 699b ldr r3, [r3, #24]
8007ea4: 2b00 cmp r3, #0
8007ea6: d00b beq.n 8007ec0 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
8007ea8: 687b ldr r3, [r7, #4]
8007eaa: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007eae: 699b ldr r3, [r3, #24]
8007eb0: 687a ldr r2, [r7, #4]
8007eb2: 7c12 ldrb r2, [r2, #16]
8007eb4: f107 0108 add.w r1, r7, #8
8007eb8: 4610 mov r0, r2
8007eba: 4798 blx r3
8007ebc: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007ebe: e00f b.n 8007ee0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007ec0: 6839 ldr r1, [r7, #0]
8007ec2: 6878 ldr r0, [r7, #4]
8007ec4: f000 fa12 bl 80082ec <USBD_CtlError>
err++;
8007ec8: 7afb ldrb r3, [r7, #11]
8007eca: 3301 adds r3, #1
8007ecc: 72fb strb r3, [r7, #11]
break;
8007ece: e007 b.n 8007ee0 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
8007ed0: 6839 ldr r1, [r7, #0]
8007ed2: 6878 ldr r0, [r7, #4]
8007ed4: f000 fa0a bl 80082ec <USBD_CtlError>
err++;
8007ed8: 7afb ldrb r3, [r7, #11]
8007eda: 3301 adds r3, #1
8007edc: 72fb strb r3, [r7, #11]
#endif
}
break;
8007ede: e038 b.n 8007f52 <USBD_GetDescriptor+0x286>
8007ee0: e037 b.n 8007f52 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007ee2: 687b ldr r3, [r7, #4]
8007ee4: 7c1b ldrb r3, [r3, #16]
8007ee6: 2b00 cmp r3, #0
8007ee8: d109 bne.n 8007efe <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
8007eea: 687b ldr r3, [r7, #4]
8007eec: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007ef0: 6b5b ldr r3, [r3, #52] @ 0x34
8007ef2: f107 0208 add.w r2, r7, #8
8007ef6: 4610 mov r0, r2
8007ef8: 4798 blx r3
8007efa: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007efc: e029 b.n 8007f52 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
8007efe: 6839 ldr r1, [r7, #0]
8007f00: 6878 ldr r0, [r7, #4]
8007f02: f000 f9f3 bl 80082ec <USBD_CtlError>
err++;
8007f06: 7afb ldrb r3, [r7, #11]
8007f08: 3301 adds r3, #1
8007f0a: 72fb strb r3, [r7, #11]
break;
8007f0c: e021 b.n 8007f52 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007f0e: 687b ldr r3, [r7, #4]
8007f10: 7c1b ldrb r3, [r3, #16]
8007f12: 2b00 cmp r3, #0
8007f14: d10d bne.n 8007f32 <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
8007f16: 687b ldr r3, [r7, #4]
8007f18: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007f1c: 6b1b ldr r3, [r3, #48] @ 0x30
8007f1e: f107 0208 add.w r2, r7, #8
8007f22: 4610 mov r0, r2
8007f24: 4798 blx r3
8007f26: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
8007f28: 68fb ldr r3, [r7, #12]
8007f2a: 3301 adds r3, #1
8007f2c: 2207 movs r2, #7
8007f2e: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007f30: e00f b.n 8007f52 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
8007f32: 6839 ldr r1, [r7, #0]
8007f34: 6878 ldr r0, [r7, #4]
8007f36: f000 f9d9 bl 80082ec <USBD_CtlError>
err++;
8007f3a: 7afb ldrb r3, [r7, #11]
8007f3c: 3301 adds r3, #1
8007f3e: 72fb strb r3, [r7, #11]
break;
8007f40: e007 b.n 8007f52 <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
8007f42: 6839 ldr r1, [r7, #0]
8007f44: 6878 ldr r0, [r7, #4]
8007f46: f000 f9d1 bl 80082ec <USBD_CtlError>
err++;
8007f4a: 7afb ldrb r3, [r7, #11]
8007f4c: 3301 adds r3, #1
8007f4e: 72fb strb r3, [r7, #11]
break;
8007f50: bf00 nop
}
if (err != 0U)
8007f52: 7afb ldrb r3, [r7, #11]
8007f54: 2b00 cmp r3, #0
8007f56: d11c bne.n 8007f92 <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
8007f58: 893b ldrh r3, [r7, #8]
8007f5a: 2b00 cmp r3, #0
8007f5c: d011 beq.n 8007f82 <USBD_GetDescriptor+0x2b6>
8007f5e: 683b ldr r3, [r7, #0]
8007f60: 88db ldrh r3, [r3, #6]
8007f62: 2b00 cmp r3, #0
8007f64: d00d beq.n 8007f82 <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
8007f66: 683b ldr r3, [r7, #0]
8007f68: 88da ldrh r2, [r3, #6]
8007f6a: 893b ldrh r3, [r7, #8]
8007f6c: 4293 cmp r3, r2
8007f6e: bf28 it cs
8007f70: 4613 movcs r3, r2
8007f72: b29b uxth r3, r3
8007f74: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
8007f76: 893b ldrh r3, [r7, #8]
8007f78: 461a mov r2, r3
8007f7a: 68f9 ldr r1, [r7, #12]
8007f7c: 6878 ldr r0, [r7, #4]
8007f7e: f000 fa1f bl 80083c0 <USBD_CtlSendData>
}
if (req->wLength == 0U)
8007f82: 683b ldr r3, [r7, #0]
8007f84: 88db ldrh r3, [r3, #6]
8007f86: 2b00 cmp r3, #0
8007f88: d104 bne.n 8007f94 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
8007f8a: 6878 ldr r0, [r7, #4]
8007f8c: f000 fa76 bl 800847c <USBD_CtlSendStatus>
8007f90: e000 b.n 8007f94 <USBD_GetDescriptor+0x2c8>
return;
8007f92: bf00 nop
}
}
}
8007f94: 3710 adds r7, #16
8007f96: 46bd mov sp, r7
8007f98: bd80 pop {r7, pc}
8007f9a: bf00 nop
08007f9c <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007f9c: b580 push {r7, lr}
8007f9e: b084 sub sp, #16
8007fa0: af00 add r7, sp, #0
8007fa2: 6078 str r0, [r7, #4]
8007fa4: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
8007fa6: 683b ldr r3, [r7, #0]
8007fa8: 889b ldrh r3, [r3, #4]
8007faa: 2b00 cmp r3, #0
8007fac: d130 bne.n 8008010 <USBD_SetAddress+0x74>
8007fae: 683b ldr r3, [r7, #0]
8007fb0: 88db ldrh r3, [r3, #6]
8007fb2: 2b00 cmp r3, #0
8007fb4: d12c bne.n 8008010 <USBD_SetAddress+0x74>
8007fb6: 683b ldr r3, [r7, #0]
8007fb8: 885b ldrh r3, [r3, #2]
8007fba: 2b7f cmp r3, #127 @ 0x7f
8007fbc: d828 bhi.n 8008010 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
8007fbe: 683b ldr r3, [r7, #0]
8007fc0: 885b ldrh r3, [r3, #2]
8007fc2: b2db uxtb r3, r3
8007fc4: f003 037f and.w r3, r3, #127 @ 0x7f
8007fc8: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007fca: 687b ldr r3, [r7, #4]
8007fcc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007fd0: 2b03 cmp r3, #3
8007fd2: d104 bne.n 8007fde <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
8007fd4: 6839 ldr r1, [r7, #0]
8007fd6: 6878 ldr r0, [r7, #4]
8007fd8: f000 f988 bl 80082ec <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007fdc: e01d b.n 800801a <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
8007fde: 687b ldr r3, [r7, #4]
8007fe0: 7bfa ldrb r2, [r7, #15]
8007fe2: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
8007fe6: 7bfb ldrb r3, [r7, #15]
8007fe8: 4619 mov r1, r3
8007fea: 6878 ldr r0, [r7, #4]
8007fec: f000 fec1 bl 8008d72 <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
8007ff0: 6878 ldr r0, [r7, #4]
8007ff2: f000 fa43 bl 800847c <USBD_CtlSendStatus>
if (dev_addr != 0U)
8007ff6: 7bfb ldrb r3, [r7, #15]
8007ff8: 2b00 cmp r3, #0
8007ffa: d004 beq.n 8008006 <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8007ffc: 687b ldr r3, [r7, #4]
8007ffe: 2202 movs r2, #2
8008000: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8008004: e009 b.n 800801a <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
8008006: 687b ldr r3, [r7, #4]
8008008: 2201 movs r2, #1
800800a: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800800e: e004 b.n 800801a <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
8008010: 6839 ldr r1, [r7, #0]
8008012: 6878 ldr r0, [r7, #4]
8008014: f000 f96a bl 80082ec <USBD_CtlError>
}
}
8008018: bf00 nop
800801a: bf00 nop
800801c: 3710 adds r7, #16
800801e: 46bd mov sp, r7
8008020: bd80 pop {r7, pc}
...
08008024 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8008024: b580 push {r7, lr}
8008026: b082 sub sp, #8
8008028: af00 add r7, sp, #0
800802a: 6078 str r0, [r7, #4]
800802c: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800802e: 683b ldr r3, [r7, #0]
8008030: 885b ldrh r3, [r3, #2]
8008032: b2da uxtb r2, r3
8008034: 4b41 ldr r3, [pc, #260] @ (800813c <USBD_SetConfig+0x118>)
8008036: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
8008038: 4b40 ldr r3, [pc, #256] @ (800813c <USBD_SetConfig+0x118>)
800803a: 781b ldrb r3, [r3, #0]
800803c: 2b01 cmp r3, #1
800803e: d904 bls.n 800804a <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
8008040: 6839 ldr r1, [r7, #0]
8008042: 6878 ldr r0, [r7, #4]
8008044: f000 f952 bl 80082ec <USBD_CtlError>
8008048: e075 b.n 8008136 <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800804a: 687b ldr r3, [r7, #4]
800804c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8008050: 2b02 cmp r3, #2
8008052: d002 beq.n 800805a <USBD_SetConfig+0x36>
8008054: 2b03 cmp r3, #3
8008056: d023 beq.n 80080a0 <USBD_SetConfig+0x7c>
8008058: e062 b.n 8008120 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800805a: 4b38 ldr r3, [pc, #224] @ (800813c <USBD_SetConfig+0x118>)
800805c: 781b ldrb r3, [r3, #0]
800805e: 2b00 cmp r3, #0
8008060: d01a beq.n 8008098 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
8008062: 4b36 ldr r3, [pc, #216] @ (800813c <USBD_SetConfig+0x118>)
8008064: 781b ldrb r3, [r3, #0]
8008066: 461a mov r2, r3
8008068: 687b ldr r3, [r7, #4]
800806a: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800806c: 687b ldr r3, [r7, #4]
800806e: 2203 movs r2, #3
8008070: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8008074: 4b31 ldr r3, [pc, #196] @ (800813c <USBD_SetConfig+0x118>)
8008076: 781b ldrb r3, [r3, #0]
8008078: 4619 mov r1, r3
800807a: 6878 ldr r0, [r7, #4]
800807c: f7ff f9e7 bl 800744e <USBD_SetClassConfig>
8008080: 4603 mov r3, r0
8008082: 2b02 cmp r3, #2
8008084: d104 bne.n 8008090 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
8008086: 6839 ldr r1, [r7, #0]
8008088: 6878 ldr r0, [r7, #4]
800808a: f000 f92f bl 80082ec <USBD_CtlError>
return;
800808e: e052 b.n 8008136 <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
8008090: 6878 ldr r0, [r7, #4]
8008092: f000 f9f3 bl 800847c <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
8008096: e04e b.n 8008136 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8008098: 6878 ldr r0, [r7, #4]
800809a: f000 f9ef bl 800847c <USBD_CtlSendStatus>
break;
800809e: e04a b.n 8008136 <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
80080a0: 4b26 ldr r3, [pc, #152] @ (800813c <USBD_SetConfig+0x118>)
80080a2: 781b ldrb r3, [r3, #0]
80080a4: 2b00 cmp r3, #0
80080a6: d112 bne.n 80080ce <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
80080a8: 687b ldr r3, [r7, #4]
80080aa: 2202 movs r2, #2
80080ac: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
80080b0: 4b22 ldr r3, [pc, #136] @ (800813c <USBD_SetConfig+0x118>)
80080b2: 781b ldrb r3, [r3, #0]
80080b4: 461a mov r2, r3
80080b6: 687b ldr r3, [r7, #4]
80080b8: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
80080ba: 4b20 ldr r3, [pc, #128] @ (800813c <USBD_SetConfig+0x118>)
80080bc: 781b ldrb r3, [r3, #0]
80080be: 4619 mov r1, r3
80080c0: 6878 ldr r0, [r7, #4]
80080c2: f7ff f9e3 bl 800748c <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
80080c6: 6878 ldr r0, [r7, #4]
80080c8: f000 f9d8 bl 800847c <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
80080cc: e033 b.n 8008136 <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
80080ce: 4b1b ldr r3, [pc, #108] @ (800813c <USBD_SetConfig+0x118>)
80080d0: 781b ldrb r3, [r3, #0]
80080d2: 461a mov r2, r3
80080d4: 687b ldr r3, [r7, #4]
80080d6: 685b ldr r3, [r3, #4]
80080d8: 429a cmp r2, r3
80080da: d01d beq.n 8008118 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
80080dc: 687b ldr r3, [r7, #4]
80080de: 685b ldr r3, [r3, #4]
80080e0: b2db uxtb r3, r3
80080e2: 4619 mov r1, r3
80080e4: 6878 ldr r0, [r7, #4]
80080e6: f7ff f9d1 bl 800748c <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
80080ea: 4b14 ldr r3, [pc, #80] @ (800813c <USBD_SetConfig+0x118>)
80080ec: 781b ldrb r3, [r3, #0]
80080ee: 461a mov r2, r3
80080f0: 687b ldr r3, [r7, #4]
80080f2: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
80080f4: 4b11 ldr r3, [pc, #68] @ (800813c <USBD_SetConfig+0x118>)
80080f6: 781b ldrb r3, [r3, #0]
80080f8: 4619 mov r1, r3
80080fa: 6878 ldr r0, [r7, #4]
80080fc: f7ff f9a7 bl 800744e <USBD_SetClassConfig>
8008100: 4603 mov r3, r0
8008102: 2b02 cmp r3, #2
8008104: d104 bne.n 8008110 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
8008106: 6839 ldr r1, [r7, #0]
8008108: 6878 ldr r0, [r7, #4]
800810a: f000 f8ef bl 80082ec <USBD_CtlError>
return;
800810e: e012 b.n 8008136 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8008110: 6878 ldr r0, [r7, #4]
8008112: f000 f9b3 bl 800847c <USBD_CtlSendStatus>
break;
8008116: e00e b.n 8008136 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8008118: 6878 ldr r0, [r7, #4]
800811a: f000 f9af bl 800847c <USBD_CtlSendStatus>
break;
800811e: e00a b.n 8008136 <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
8008120: 6839 ldr r1, [r7, #0]
8008122: 6878 ldr r0, [r7, #4]
8008124: f000 f8e2 bl 80082ec <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
8008128: 4b04 ldr r3, [pc, #16] @ (800813c <USBD_SetConfig+0x118>)
800812a: 781b ldrb r3, [r3, #0]
800812c: 4619 mov r1, r3
800812e: 6878 ldr r0, [r7, #4]
8008130: f7ff f9ac bl 800748c <USBD_ClrClassConfig>
break;
8008134: bf00 nop
}
}
}
8008136: 3708 adds r7, #8
8008138: 46bd mov sp, r7
800813a: bd80 pop {r7, pc}
800813c: 20000344 .word 0x20000344
08008140 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8008140: b580 push {r7, lr}
8008142: b082 sub sp, #8
8008144: af00 add r7, sp, #0
8008146: 6078 str r0, [r7, #4]
8008148: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800814a: 683b ldr r3, [r7, #0]
800814c: 88db ldrh r3, [r3, #6]
800814e: 2b01 cmp r3, #1
8008150: d004 beq.n 800815c <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
8008152: 6839 ldr r1, [r7, #0]
8008154: 6878 ldr r0, [r7, #4]
8008156: f000 f8c9 bl 80082ec <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800815a: e022 b.n 80081a2 <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800815c: 687b ldr r3, [r7, #4]
800815e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8008162: 2b02 cmp r3, #2
8008164: dc02 bgt.n 800816c <USBD_GetConfig+0x2c>
8008166: 2b00 cmp r3, #0
8008168: dc03 bgt.n 8008172 <USBD_GetConfig+0x32>
800816a: e015 b.n 8008198 <USBD_GetConfig+0x58>
800816c: 2b03 cmp r3, #3
800816e: d00b beq.n 8008188 <USBD_GetConfig+0x48>
8008170: e012 b.n 8008198 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
8008172: 687b ldr r3, [r7, #4]
8008174: 2200 movs r2, #0
8008176: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
8008178: 687b ldr r3, [r7, #4]
800817a: 3308 adds r3, #8
800817c: 2201 movs r2, #1
800817e: 4619 mov r1, r3
8008180: 6878 ldr r0, [r7, #4]
8008182: f000 f91d bl 80083c0 <USBD_CtlSendData>
break;
8008186: e00c b.n 80081a2 <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
8008188: 687b ldr r3, [r7, #4]
800818a: 3304 adds r3, #4
800818c: 2201 movs r2, #1
800818e: 4619 mov r1, r3
8008190: 6878 ldr r0, [r7, #4]
8008192: f000 f915 bl 80083c0 <USBD_CtlSendData>
break;
8008196: e004 b.n 80081a2 <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
8008198: 6839 ldr r1, [r7, #0]
800819a: 6878 ldr r0, [r7, #4]
800819c: f000 f8a6 bl 80082ec <USBD_CtlError>
break;
80081a0: bf00 nop
}
80081a2: bf00 nop
80081a4: 3708 adds r7, #8
80081a6: 46bd mov sp, r7
80081a8: bd80 pop {r7, pc}
080081aa <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80081aa: b580 push {r7, lr}
80081ac: b082 sub sp, #8
80081ae: af00 add r7, sp, #0
80081b0: 6078 str r0, [r7, #4]
80081b2: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
80081b4: 687b ldr r3, [r7, #4]
80081b6: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80081ba: 3b01 subs r3, #1
80081bc: 2b02 cmp r3, #2
80081be: d81e bhi.n 80081fe <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
80081c0: 683b ldr r3, [r7, #0]
80081c2: 88db ldrh r3, [r3, #6]
80081c4: 2b02 cmp r3, #2
80081c6: d004 beq.n 80081d2 <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
80081c8: 6839 ldr r1, [r7, #0]
80081ca: 6878 ldr r0, [r7, #4]
80081cc: f000 f88e bl 80082ec <USBD_CtlError>
break;
80081d0: e01a b.n 8008208 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
80081d2: 687b ldr r3, [r7, #4]
80081d4: 2201 movs r2, #1
80081d6: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
80081d8: 687b ldr r3, [r7, #4]
80081da: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
80081de: 2b00 cmp r3, #0
80081e0: d005 beq.n 80081ee <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
80081e2: 687b ldr r3, [r7, #4]
80081e4: 68db ldr r3, [r3, #12]
80081e6: f043 0202 orr.w r2, r3, #2
80081ea: 687b ldr r3, [r7, #4]
80081ec: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
80081ee: 687b ldr r3, [r7, #4]
80081f0: 330c adds r3, #12
80081f2: 2202 movs r2, #2
80081f4: 4619 mov r1, r3
80081f6: 6878 ldr r0, [r7, #4]
80081f8: f000 f8e2 bl 80083c0 <USBD_CtlSendData>
break;
80081fc: e004 b.n 8008208 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
80081fe: 6839 ldr r1, [r7, #0]
8008200: 6878 ldr r0, [r7, #4]
8008202: f000 f873 bl 80082ec <USBD_CtlError>
break;
8008206: bf00 nop
}
}
8008208: bf00 nop
800820a: 3708 adds r7, #8
800820c: 46bd mov sp, r7
800820e: bd80 pop {r7, pc}
08008210 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8008210: b580 push {r7, lr}
8008212: b082 sub sp, #8
8008214: af00 add r7, sp, #0
8008216: 6078 str r0, [r7, #4]
8008218: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800821a: 683b ldr r3, [r7, #0]
800821c: 885b ldrh r3, [r3, #2]
800821e: 2b01 cmp r3, #1
8008220: d106 bne.n 8008230 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
8008222: 687b ldr r3, [r7, #4]
8008224: 2201 movs r2, #1
8008226: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800822a: 6878 ldr r0, [r7, #4]
800822c: f000 f926 bl 800847c <USBD_CtlSendStatus>
}
}
8008230: bf00 nop
8008232: 3708 adds r7, #8
8008234: 46bd mov sp, r7
8008236: bd80 pop {r7, pc}
08008238 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8008238: b580 push {r7, lr}
800823a: b082 sub sp, #8
800823c: af00 add r7, sp, #0
800823e: 6078 str r0, [r7, #4]
8008240: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8008242: 687b ldr r3, [r7, #4]
8008244: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8008248: 3b01 subs r3, #1
800824a: 2b02 cmp r3, #2
800824c: d80b bhi.n 8008266 <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800824e: 683b ldr r3, [r7, #0]
8008250: 885b ldrh r3, [r3, #2]
8008252: 2b01 cmp r3, #1
8008254: d10c bne.n 8008270 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
8008256: 687b ldr r3, [r7, #4]
8008258: 2200 movs r2, #0
800825a: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800825e: 6878 ldr r0, [r7, #4]
8008260: f000 f90c bl 800847c <USBD_CtlSendStatus>
}
break;
8008264: e004 b.n 8008270 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
8008266: 6839 ldr r1, [r7, #0]
8008268: 6878 ldr r0, [r7, #4]
800826a: f000 f83f bl 80082ec <USBD_CtlError>
break;
800826e: e000 b.n 8008272 <USBD_ClrFeature+0x3a>
break;
8008270: bf00 nop
}
}
8008272: bf00 nop
8008274: 3708 adds r7, #8
8008276: 46bd mov sp, r7
8008278: bd80 pop {r7, pc}
0800827a <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800827a: b480 push {r7}
800827c: b083 sub sp, #12
800827e: af00 add r7, sp, #0
8008280: 6078 str r0, [r7, #4]
8008282: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
8008284: 683b ldr r3, [r7, #0]
8008286: 781a ldrb r2, [r3, #0]
8008288: 687b ldr r3, [r7, #4]
800828a: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800828c: 683b ldr r3, [r7, #0]
800828e: 785a ldrb r2, [r3, #1]
8008290: 687b ldr r3, [r7, #4]
8008292: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
8008294: 683b ldr r3, [r7, #0]
8008296: 3302 adds r3, #2
8008298: 781b ldrb r3, [r3, #0]
800829a: 461a mov r2, r3
800829c: 683b ldr r3, [r7, #0]
800829e: 3303 adds r3, #3
80082a0: 781b ldrb r3, [r3, #0]
80082a2: 021b lsls r3, r3, #8
80082a4: b29b uxth r3, r3
80082a6: 4413 add r3, r2
80082a8: b29a uxth r2, r3
80082aa: 687b ldr r3, [r7, #4]
80082ac: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
80082ae: 683b ldr r3, [r7, #0]
80082b0: 3304 adds r3, #4
80082b2: 781b ldrb r3, [r3, #0]
80082b4: 461a mov r2, r3
80082b6: 683b ldr r3, [r7, #0]
80082b8: 3305 adds r3, #5
80082ba: 781b ldrb r3, [r3, #0]
80082bc: 021b lsls r3, r3, #8
80082be: b29b uxth r3, r3
80082c0: 4413 add r3, r2
80082c2: b29a uxth r2, r3
80082c4: 687b ldr r3, [r7, #4]
80082c6: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
80082c8: 683b ldr r3, [r7, #0]
80082ca: 3306 adds r3, #6
80082cc: 781b ldrb r3, [r3, #0]
80082ce: 461a mov r2, r3
80082d0: 683b ldr r3, [r7, #0]
80082d2: 3307 adds r3, #7
80082d4: 781b ldrb r3, [r3, #0]
80082d6: 021b lsls r3, r3, #8
80082d8: b29b uxth r3, r3
80082da: 4413 add r3, r2
80082dc: b29a uxth r2, r3
80082de: 687b ldr r3, [r7, #4]
80082e0: 80da strh r2, [r3, #6]
}
80082e2: bf00 nop
80082e4: 370c adds r7, #12
80082e6: 46bd mov sp, r7
80082e8: bc80 pop {r7}
80082ea: 4770 bx lr
080082ec <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80082ec: b580 push {r7, lr}
80082ee: b082 sub sp, #8
80082f0: af00 add r7, sp, #0
80082f2: 6078 str r0, [r7, #4]
80082f4: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
80082f6: 2180 movs r1, #128 @ 0x80
80082f8: 6878 ldr r0, [r7, #4]
80082fa: f000 fcd1 bl 8008ca0 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
80082fe: 2100 movs r1, #0
8008300: 6878 ldr r0, [r7, #4]
8008302: f000 fccd bl 8008ca0 <USBD_LL_StallEP>
}
8008306: bf00 nop
8008308: 3708 adds r7, #8
800830a: 46bd mov sp, r7
800830c: bd80 pop {r7, pc}
0800830e <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800830e: b580 push {r7, lr}
8008310: b086 sub sp, #24
8008312: af00 add r7, sp, #0
8008314: 60f8 str r0, [r7, #12]
8008316: 60b9 str r1, [r7, #8]
8008318: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800831a: 2300 movs r3, #0
800831c: 75fb strb r3, [r7, #23]
if (desc != NULL)
800831e: 68fb ldr r3, [r7, #12]
8008320: 2b00 cmp r3, #0
8008322: d032 beq.n 800838a <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
8008324: 68f8 ldr r0, [r7, #12]
8008326: f000 f834 bl 8008392 <USBD_GetLen>
800832a: 4603 mov r3, r0
800832c: 3301 adds r3, #1
800832e: b29b uxth r3, r3
8008330: 005b lsls r3, r3, #1
8008332: b29a uxth r2, r3
8008334: 687b ldr r3, [r7, #4]
8008336: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
8008338: 7dfb ldrb r3, [r7, #23]
800833a: 1c5a adds r2, r3, #1
800833c: 75fa strb r2, [r7, #23]
800833e: 461a mov r2, r3
8008340: 68bb ldr r3, [r7, #8]
8008342: 4413 add r3, r2
8008344: 687a ldr r2, [r7, #4]
8008346: 7812 ldrb r2, [r2, #0]
8008348: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800834a: 7dfb ldrb r3, [r7, #23]
800834c: 1c5a adds r2, r3, #1
800834e: 75fa strb r2, [r7, #23]
8008350: 461a mov r2, r3
8008352: 68bb ldr r3, [r7, #8]
8008354: 4413 add r3, r2
8008356: 2203 movs r2, #3
8008358: 701a strb r2, [r3, #0]
while (*desc != '\0')
800835a: e012 b.n 8008382 <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
800835c: 68fb ldr r3, [r7, #12]
800835e: 1c5a adds r2, r3, #1
8008360: 60fa str r2, [r7, #12]
8008362: 7dfa ldrb r2, [r7, #23]
8008364: 1c51 adds r1, r2, #1
8008366: 75f9 strb r1, [r7, #23]
8008368: 4611 mov r1, r2
800836a: 68ba ldr r2, [r7, #8]
800836c: 440a add r2, r1
800836e: 781b ldrb r3, [r3, #0]
8008370: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
8008372: 7dfb ldrb r3, [r7, #23]
8008374: 1c5a adds r2, r3, #1
8008376: 75fa strb r2, [r7, #23]
8008378: 461a mov r2, r3
800837a: 68bb ldr r3, [r7, #8]
800837c: 4413 add r3, r2
800837e: 2200 movs r2, #0
8008380: 701a strb r2, [r3, #0]
while (*desc != '\0')
8008382: 68fb ldr r3, [r7, #12]
8008384: 781b ldrb r3, [r3, #0]
8008386: 2b00 cmp r3, #0
8008388: d1e8 bne.n 800835c <USBD_GetString+0x4e>
}
}
}
800838a: bf00 nop
800838c: 3718 adds r7, #24
800838e: 46bd mov sp, r7
8008390: bd80 pop {r7, pc}
08008392 <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
8008392: b480 push {r7}
8008394: b085 sub sp, #20
8008396: af00 add r7, sp, #0
8008398: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800839a: 2300 movs r3, #0
800839c: 73fb strb r3, [r7, #15]
while (*buf != '\0')
800839e: e005 b.n 80083ac <USBD_GetLen+0x1a>
{
len++;
80083a0: 7bfb ldrb r3, [r7, #15]
80083a2: 3301 adds r3, #1
80083a4: 73fb strb r3, [r7, #15]
buf++;
80083a6: 687b ldr r3, [r7, #4]
80083a8: 3301 adds r3, #1
80083aa: 607b str r3, [r7, #4]
while (*buf != '\0')
80083ac: 687b ldr r3, [r7, #4]
80083ae: 781b ldrb r3, [r3, #0]
80083b0: 2b00 cmp r3, #0
80083b2: d1f5 bne.n 80083a0 <USBD_GetLen+0xe>
}
return len;
80083b4: 7bfb ldrb r3, [r7, #15]
}
80083b6: 4618 mov r0, r3
80083b8: 3714 adds r7, #20
80083ba: 46bd mov sp, r7
80083bc: bc80 pop {r7}
80083be: 4770 bx lr
080083c0 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
80083c0: b580 push {r7, lr}
80083c2: b084 sub sp, #16
80083c4: af00 add r7, sp, #0
80083c6: 60f8 str r0, [r7, #12]
80083c8: 60b9 str r1, [r7, #8]
80083ca: 4613 mov r3, r2
80083cc: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
80083ce: 68fb ldr r3, [r7, #12]
80083d0: 2202 movs r2, #2
80083d2: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
80083d6: 88fa ldrh r2, [r7, #6]
80083d8: 68fb ldr r3, [r7, #12]
80083da: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
80083dc: 88fa ldrh r2, [r7, #6]
80083de: 68fb ldr r3, [r7, #12]
80083e0: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
80083e2: 88fb ldrh r3, [r7, #6]
80083e4: 68ba ldr r2, [r7, #8]
80083e6: 2100 movs r1, #0
80083e8: 68f8 ldr r0, [r7, #12]
80083ea: f000 fce1 bl 8008db0 <USBD_LL_Transmit>
return USBD_OK;
80083ee: 2300 movs r3, #0
}
80083f0: 4618 mov r0, r3
80083f2: 3710 adds r7, #16
80083f4: 46bd mov sp, r7
80083f6: bd80 pop {r7, pc}
080083f8 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
80083f8: b580 push {r7, lr}
80083fa: b084 sub sp, #16
80083fc: af00 add r7, sp, #0
80083fe: 60f8 str r0, [r7, #12]
8008400: 60b9 str r1, [r7, #8]
8008402: 4613 mov r3, r2
8008404: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8008406: 88fb ldrh r3, [r7, #6]
8008408: 68ba ldr r2, [r7, #8]
800840a: 2100 movs r1, #0
800840c: 68f8 ldr r0, [r7, #12]
800840e: f000 fccf bl 8008db0 <USBD_LL_Transmit>
return USBD_OK;
8008412: 2300 movs r3, #0
}
8008414: 4618 mov r0, r3
8008416: 3710 adds r7, #16
8008418: 46bd mov sp, r7
800841a: bd80 pop {r7, pc}
0800841c <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800841c: b580 push {r7, lr}
800841e: b084 sub sp, #16
8008420: af00 add r7, sp, #0
8008422: 60f8 str r0, [r7, #12]
8008424: 60b9 str r1, [r7, #8]
8008426: 4613 mov r3, r2
8008428: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
800842a: 68fb ldr r3, [r7, #12]
800842c: 2203 movs r2, #3
800842e: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
8008432: 88fa ldrh r2, [r7, #6]
8008434: 68fb ldr r3, [r7, #12]
8008436: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800843a: 88fa ldrh r2, [r7, #6]
800843c: 68fb ldr r3, [r7, #12]
800843e: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8008442: 88fb ldrh r3, [r7, #6]
8008444: 68ba ldr r2, [r7, #8]
8008446: 2100 movs r1, #0
8008448: 68f8 ldr r0, [r7, #12]
800844a: f000 fcd4 bl 8008df6 <USBD_LL_PrepareReceive>
return USBD_OK;
800844e: 2300 movs r3, #0
}
8008450: 4618 mov r0, r3
8008452: 3710 adds r7, #16
8008454: 46bd mov sp, r7
8008456: bd80 pop {r7, pc}
08008458 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8008458: b580 push {r7, lr}
800845a: b084 sub sp, #16
800845c: af00 add r7, sp, #0
800845e: 60f8 str r0, [r7, #12]
8008460: 60b9 str r1, [r7, #8]
8008462: 4613 mov r3, r2
8008464: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8008466: 88fb ldrh r3, [r7, #6]
8008468: 68ba ldr r2, [r7, #8]
800846a: 2100 movs r1, #0
800846c: 68f8 ldr r0, [r7, #12]
800846e: f000 fcc2 bl 8008df6 <USBD_LL_PrepareReceive>
return USBD_OK;
8008472: 2300 movs r3, #0
}
8008474: 4618 mov r0, r3
8008476: 3710 adds r7, #16
8008478: 46bd mov sp, r7
800847a: bd80 pop {r7, pc}
0800847c <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800847c: b580 push {r7, lr}
800847e: b082 sub sp, #8
8008480: af00 add r7, sp, #0
8008482: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
8008484: 687b ldr r3, [r7, #4]
8008486: 2204 movs r2, #4
8008488: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800848c: 2300 movs r3, #0
800848e: 2200 movs r2, #0
8008490: 2100 movs r1, #0
8008492: 6878 ldr r0, [r7, #4]
8008494: f000 fc8c bl 8008db0 <USBD_LL_Transmit>
return USBD_OK;
8008498: 2300 movs r3, #0
}
800849a: 4618 mov r0, r3
800849c: 3708 adds r7, #8
800849e: 46bd mov sp, r7
80084a0: bd80 pop {r7, pc}
080084a2 <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
80084a2: b580 push {r7, lr}
80084a4: b082 sub sp, #8
80084a6: af00 add r7, sp, #0
80084a8: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
80084aa: 687b ldr r3, [r7, #4]
80084ac: 2205 movs r2, #5
80084ae: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
80084b2: 2300 movs r3, #0
80084b4: 2200 movs r2, #0
80084b6: 2100 movs r1, #0
80084b8: 6878 ldr r0, [r7, #4]
80084ba: f000 fc9c bl 8008df6 <USBD_LL_PrepareReceive>
return USBD_OK;
80084be: 2300 movs r3, #0
}
80084c0: 4618 mov r0, r3
80084c2: 3708 adds r7, #8
80084c4: 46bd mov sp, r7
80084c6: bd80 pop {r7, pc}
080084c8 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
80084c8: b580 push {r7, lr}
80084ca: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
80084cc: 2200 movs r2, #0
80084ce: 4912 ldr r1, [pc, #72] @ (8008518 <MX_USB_DEVICE_Init+0x50>)
80084d0: 4812 ldr r0, [pc, #72] @ (800851c <MX_USB_DEVICE_Init+0x54>)
80084d2: f7fe ff62 bl 800739a <USBD_Init>
80084d6: 4603 mov r3, r0
80084d8: 2b00 cmp r3, #0
80084da: d001 beq.n 80084e0 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
80084dc: f7f8 fa40 bl 8000960 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
80084e0: 490f ldr r1, [pc, #60] @ (8008520 <MX_USB_DEVICE_Init+0x58>)
80084e2: 480e ldr r0, [pc, #56] @ (800851c <MX_USB_DEVICE_Init+0x54>)
80084e4: f7fe ff84 bl 80073f0 <USBD_RegisterClass>
80084e8: 4603 mov r3, r0
80084ea: 2b00 cmp r3, #0
80084ec: d001 beq.n 80084f2 <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
80084ee: f7f8 fa37 bl 8000960 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
80084f2: 490c ldr r1, [pc, #48] @ (8008524 <MX_USB_DEVICE_Init+0x5c>)
80084f4: 4809 ldr r0, [pc, #36] @ (800851c <MX_USB_DEVICE_Init+0x54>)
80084f6: f7fe feb5 bl 8007264 <USBD_CDC_RegisterInterface>
80084fa: 4603 mov r3, r0
80084fc: 2b00 cmp r3, #0
80084fe: d001 beq.n 8008504 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
8008500: f7f8 fa2e bl 8000960 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
8008504: 4805 ldr r0, [pc, #20] @ (800851c <MX_USB_DEVICE_Init+0x54>)
8008506: f7fe ff8c bl 8007422 <USBD_Start>
800850a: 4603 mov r3, r0
800850c: 2b00 cmp r3, #0
800850e: d001 beq.n 8008514 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
8008510: f7f8 fa26 bl 8000960 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
8008514: bf00 nop
8008516: bd80 pop {r7, pc}
8008518: 2000012c .word 0x2000012c
800851c: 20000348 .word 0x20000348
8008520: 20000018 .word 0x20000018
8008524: 2000011c .word 0x2000011c
08008528 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
8008528: b480 push {r7}
800852a: b085 sub sp, #20
800852c: af00 add r7, sp, #0
800852e: 6078 str r0, [r7, #4]
8008530: 6039 str r1, [r7, #0]
while (len--) {
8008532: e01e b.n 8008572 <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
8008534: 4b14 ldr r3, [pc, #80] @ (8008588 <fifo_push+0x60>)
8008536: 881b ldrh r3, [r3, #0]
8008538: b29b uxth r3, r3
800853a: 3301 adds r3, #1
800853c: b29b uxth r3, r3
800853e: b2db uxtb r3, r3
8008540: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
8008542: 89fa ldrh r2, [r7, #14]
8008544: 4b11 ldr r3, [pc, #68] @ (800858c <fifo_push+0x64>)
8008546: 881b ldrh r3, [r3, #0]
8008548: b29b uxth r3, r3
800854a: b2db uxtb r3, r3
800854c: 429a cmp r2, r3
800854e: d103 bne.n 8008558 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
8008550: 687b ldr r3, [r7, #4]
8008552: 3301 adds r3, #1
8008554: 607b str r3, [r7, #4]
continue;
8008556: e00c b.n 8008572 <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
8008558: 687b ldr r3, [r7, #4]
800855a: 1c5a adds r2, r3, #1
800855c: 607a str r2, [r7, #4]
800855e: 4a0a ldr r2, [pc, #40] @ (8008588 <fifo_push+0x60>)
8008560: 8812 ldrh r2, [r2, #0]
8008562: b292 uxth r2, r2
8008564: b2d2 uxtb r2, r2
8008566: 7819 ldrb r1, [r3, #0]
8008568: 4b09 ldr r3, [pc, #36] @ (8008590 <fifo_push+0x68>)
800856a: 5499 strb r1, [r3, r2]
rx_head = next;
800856c: 4a06 ldr r2, [pc, #24] @ (8008588 <fifo_push+0x60>)
800856e: 89fb ldrh r3, [r7, #14]
8008570: 8013 strh r3, [r2, #0]
while (len--) {
8008572: 683b ldr r3, [r7, #0]
8008574: 1e5a subs r2, r3, #1
8008576: 603a str r2, [r7, #0]
8008578: 2b00 cmp r3, #0
800857a: d1db bne.n 8008534 <fifo_push+0xc>
}
}
800857c: bf00 nop
800857e: bf00 nop
8008580: 3714 adds r7, #20
8008582: 46bd mov sp, r7
8008584: bc80 pop {r7}
8008586: 4770 bx lr
8008588: 20000f0c .word 0x20000f0c
800858c: 20000f0e .word 0x20000f0e
8008590: 20000e0c .word 0x20000e0c
08008594 <CDC_Available>:
uint32_t CDC_Available(void) {
8008594: b480 push {r7}
8008596: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
8008598: 4b06 ldr r3, [pc, #24] @ (80085b4 <CDC_Available+0x20>)
800859a: 881b ldrh r3, [r3, #0]
800859c: b29a uxth r2, r3
800859e: 4b06 ldr r3, [pc, #24] @ (80085b8 <CDC_Available+0x24>)
80085a0: 881b ldrh r3, [r3, #0]
80085a2: b29b uxth r3, r3
80085a4: 1ad3 subs r3, r2, r3
80085a6: b29b uxth r3, r3
80085a8: b2db uxtb r3, r3
}
80085aa: 4618 mov r0, r3
80085ac: 46bd mov sp, r7
80085ae: bc80 pop {r7}
80085b0: 4770 bx lr
80085b2: bf00 nop
80085b4: 20000f0c .word 0x20000f0c
80085b8: 20000f0e .word 0x20000f0e
080085bc <CDC_ReadByte>:
int CDC_ReadByte(void) {
80085bc: b480 push {r7}
80085be: b083 sub sp, #12
80085c0: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
80085c2: 4b10 ldr r3, [pc, #64] @ (8008604 <CDC_ReadByte+0x48>)
80085c4: 881b ldrh r3, [r3, #0]
80085c6: b29a uxth r2, r3
80085c8: 4b0f ldr r3, [pc, #60] @ (8008608 <CDC_ReadByte+0x4c>)
80085ca: 881b ldrh r3, [r3, #0]
80085cc: b29b uxth r3, r3
80085ce: 429a cmp r2, r3
80085d0: d102 bne.n 80085d8 <CDC_ReadByte+0x1c>
80085d2: f04f 33ff mov.w r3, #4294967295
80085d6: e010 b.n 80085fa <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
80085d8: 4b0a ldr r3, [pc, #40] @ (8008604 <CDC_ReadByte+0x48>)
80085da: 881b ldrh r3, [r3, #0]
80085dc: b29b uxth r3, r3
80085de: b2db uxtb r3, r3
80085e0: 4a0a ldr r2, [pc, #40] @ (800860c <CDC_ReadByte+0x50>)
80085e2: 5cd3 ldrb r3, [r2, r3]
80085e4: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
80085e6: 4b07 ldr r3, [pc, #28] @ (8008604 <CDC_ReadByte+0x48>)
80085e8: 881b ldrh r3, [r3, #0]
80085ea: b29b uxth r3, r3
80085ec: 3301 adds r3, #1
80085ee: b29b uxth r3, r3
80085f0: b2db uxtb r3, r3
80085f2: b29a uxth r2, r3
80085f4: 4b03 ldr r3, [pc, #12] @ (8008604 <CDC_ReadByte+0x48>)
80085f6: 801a strh r2, [r3, #0]
return b;
80085f8: 687b ldr r3, [r7, #4]
}
80085fa: 4618 mov r0, r3
80085fc: 370c adds r7, #12
80085fe: 46bd mov sp, r7
8008600: bc80 pop {r7}
8008602: 4770 bx lr
8008604: 20000f0e .word 0x20000f0e
8008608: 20000f0c .word 0x20000f0c
800860c: 20000e0c .word 0x20000e0c
08008610 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
8008610: b580 push {r7, lr}
8008612: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
8008614: 2200 movs r2, #0
8008616: 4905 ldr r1, [pc, #20] @ (800862c <CDC_Init_FS+0x1c>)
8008618: 4805 ldr r0, [pc, #20] @ (8008630 <CDC_Init_FS+0x20>)
800861a: f7fe fe39 bl 8007290 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
800861e: 4905 ldr r1, [pc, #20] @ (8008634 <CDC_Init_FS+0x24>)
8008620: 4803 ldr r0, [pc, #12] @ (8008630 <CDC_Init_FS+0x20>)
8008622: f7fe fe4e bl 80072c2 <USBD_CDC_SetRxBuffer>
return (USBD_OK);
8008626: 2300 movs r3, #0
/* USER CODE END 3 */
}
8008628: 4618 mov r0, r3
800862a: bd80 pop {r7, pc}
800862c: 20000a0c .word 0x20000a0c
8008630: 20000348 .word 0x20000348
8008634: 2000060c .word 0x2000060c
08008638 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
8008638: b480 push {r7}
800863a: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
800863c: 2300 movs r3, #0
/* USER CODE END 4 */
}
800863e: 4618 mov r0, r3
8008640: 46bd mov sp, r7
8008642: bc80 pop {r7}
8008644: 4770 bx lr
...
08008648 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
8008648: b480 push {r7}
800864a: b083 sub sp, #12
800864c: af00 add r7, sp, #0
800864e: 4603 mov r3, r0
8008650: 6039 str r1, [r7, #0]
8008652: 71fb strb r3, [r7, #7]
8008654: 4613 mov r3, r2
8008656: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
8008658: 79fb ldrb r3, [r7, #7]
800865a: 2b23 cmp r3, #35 @ 0x23
800865c: d84a bhi.n 80086f4 <CDC_Control_FS+0xac>
800865e: a201 add r2, pc, #4 @ (adr r2, 8008664 <CDC_Control_FS+0x1c>)
8008660: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008664: 080086f5 .word 0x080086f5
8008668: 080086f5 .word 0x080086f5
800866c: 080086f5 .word 0x080086f5
8008670: 080086f5 .word 0x080086f5
8008674: 080086f5 .word 0x080086f5
8008678: 080086f5 .word 0x080086f5
800867c: 080086f5 .word 0x080086f5
8008680: 080086f5 .word 0x080086f5
8008684: 080086f5 .word 0x080086f5
8008688: 080086f5 .word 0x080086f5
800868c: 080086f5 .word 0x080086f5
8008690: 080086f5 .word 0x080086f5
8008694: 080086f5 .word 0x080086f5
8008698: 080086f5 .word 0x080086f5
800869c: 080086f5 .word 0x080086f5
80086a0: 080086f5 .word 0x080086f5
80086a4: 080086f5 .word 0x080086f5
80086a8: 080086f5 .word 0x080086f5
80086ac: 080086f5 .word 0x080086f5
80086b0: 080086f5 .word 0x080086f5
80086b4: 080086f5 .word 0x080086f5
80086b8: 080086f5 .word 0x080086f5
80086bc: 080086f5 .word 0x080086f5
80086c0: 080086f5 .word 0x080086f5
80086c4: 080086f5 .word 0x080086f5
80086c8: 080086f5 .word 0x080086f5
80086cc: 080086f5 .word 0x080086f5
80086d0: 080086f5 .word 0x080086f5
80086d4: 080086f5 .word 0x080086f5
80086d8: 080086f5 .word 0x080086f5
80086dc: 080086f5 .word 0x080086f5
80086e0: 080086f5 .word 0x080086f5
80086e4: 080086f5 .word 0x080086f5
80086e8: 080086f5 .word 0x080086f5
80086ec: 080086f5 .word 0x080086f5
80086f0: 080086f5 .word 0x080086f5
case CDC_SEND_BREAK:
break;
default:
break;
80086f4: bf00 nop
}
return (USBD_OK);
80086f6: 2300 movs r3, #0
/* USER CODE END 5 */
}
80086f8: 4618 mov r0, r3
80086fa: 370c adds r7, #12
80086fc: 46bd mov sp, r7
80086fe: bc80 pop {r7}
8008700: 4770 bx lr
8008702: bf00 nop
08008704 <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
8008704: b580 push {r7, lr}
8008706: b082 sub sp, #8
8008708: af00 add r7, sp, #0
800870a: 6078 str r0, [r7, #4]
800870c: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
800870e: 683b ldr r3, [r7, #0]
8008710: 681b ldr r3, [r3, #0]
8008712: 2b00 cmp r3, #0
8008714: d005 beq.n 8008722 <CDC_Receive_FS+0x1e>
8008716: 683b ldr r3, [r7, #0]
8008718: 681b ldr r3, [r3, #0]
800871a: 4619 mov r1, r3
800871c: 6878 ldr r0, [r7, #4]
800871e: f7ff ff03 bl 8008528 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
8008722: 6879 ldr r1, [r7, #4]
8008724: 4805 ldr r0, [pc, #20] @ (800873c <CDC_Receive_FS+0x38>)
8008726: f7fe fdcc bl 80072c2 <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
800872a: 4804 ldr r0, [pc, #16] @ (800873c <CDC_Receive_FS+0x38>)
800872c: f7fe fe0b bl 8007346 <USBD_CDC_ReceivePacket>
return (USBD_OK);
8008730: 2300 movs r3, #0
/* USER CODE END 6 */
}
8008732: 4618 mov r0, r3
8008734: 3708 adds r7, #8
8008736: 46bd mov sp, r7
8008738: bd80 pop {r7, pc}
800873a: bf00 nop
800873c: 20000348 .word 0x20000348
08008740 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
8008740: b580 push {r7, lr}
8008742: b084 sub sp, #16
8008744: af00 add r7, sp, #0
8008746: 6078 str r0, [r7, #4]
8008748: 460b mov r3, r1
800874a: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
800874c: 2300 movs r3, #0
800874e: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
8008750: 4b0d ldr r3, [pc, #52] @ (8008788 <CDC_Transmit_FS+0x48>)
8008752: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008756: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
8008758: 68bb ldr r3, [r7, #8]
800875a: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800875e: 2b00 cmp r3, #0
8008760: d001 beq.n 8008766 <CDC_Transmit_FS+0x26>
return USBD_BUSY;
8008762: 2301 movs r3, #1
8008764: e00b b.n 800877e <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
8008766: 887b ldrh r3, [r7, #2]
8008768: 461a mov r2, r3
800876a: 6879 ldr r1, [r7, #4]
800876c: 4806 ldr r0, [pc, #24] @ (8008788 <CDC_Transmit_FS+0x48>)
800876e: f7fe fd8f bl 8007290 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
8008772: 4805 ldr r0, [pc, #20] @ (8008788 <CDC_Transmit_FS+0x48>)
8008774: f7fe fdb8 bl 80072e8 <USBD_CDC_TransmitPacket>
8008778: 4603 mov r3, r0
800877a: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
800877c: 7bfb ldrb r3, [r7, #15]
}
800877e: 4618 mov r0, r3
8008780: 3710 adds r7, #16
8008782: 46bd mov sp, r7
8008784: bd80 pop {r7, pc}
8008786: bf00 nop
8008788: 20000348 .word 0x20000348
0800878c <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800878c: b480 push {r7}
800878e: b083 sub sp, #12
8008790: af00 add r7, sp, #0
8008792: 4603 mov r3, r0
8008794: 6039 str r1, [r7, #0]
8008796: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
8008798: 683b ldr r3, [r7, #0]
800879a: 2212 movs r2, #18
800879c: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
800879e: 4b03 ldr r3, [pc, #12] @ (80087ac <USBD_FS_DeviceDescriptor+0x20>)
}
80087a0: 4618 mov r0, r3
80087a2: 370c adds r7, #12
80087a4: 46bd mov sp, r7
80087a6: bc80 pop {r7}
80087a8: 4770 bx lr
80087aa: bf00 nop
80087ac: 20000148 .word 0x20000148
080087b0 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80087b0: b480 push {r7}
80087b2: b083 sub sp, #12
80087b4: af00 add r7, sp, #0
80087b6: 4603 mov r3, r0
80087b8: 6039 str r1, [r7, #0]
80087ba: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
80087bc: 683b ldr r3, [r7, #0]
80087be: 2204 movs r2, #4
80087c0: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
80087c2: 4b03 ldr r3, [pc, #12] @ (80087d0 <USBD_FS_LangIDStrDescriptor+0x20>)
}
80087c4: 4618 mov r0, r3
80087c6: 370c adds r7, #12
80087c8: 46bd mov sp, r7
80087ca: bc80 pop {r7}
80087cc: 4770 bx lr
80087ce: bf00 nop
80087d0: 2000015c .word 0x2000015c
080087d4 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80087d4: b580 push {r7, lr}
80087d6: b082 sub sp, #8
80087d8: af00 add r7, sp, #0
80087da: 4603 mov r3, r0
80087dc: 6039 str r1, [r7, #0]
80087de: 71fb strb r3, [r7, #7]
if(speed == 0)
80087e0: 79fb ldrb r3, [r7, #7]
80087e2: 2b00 cmp r3, #0
80087e4: d105 bne.n 80087f2 <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
80087e6: 683a ldr r2, [r7, #0]
80087e8: 4907 ldr r1, [pc, #28] @ (8008808 <USBD_FS_ProductStrDescriptor+0x34>)
80087ea: 4808 ldr r0, [pc, #32] @ (800880c <USBD_FS_ProductStrDescriptor+0x38>)
80087ec: f7ff fd8f bl 800830e <USBD_GetString>
80087f0: e004 b.n 80087fc <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
80087f2: 683a ldr r2, [r7, #0]
80087f4: 4904 ldr r1, [pc, #16] @ (8008808 <USBD_FS_ProductStrDescriptor+0x34>)
80087f6: 4805 ldr r0, [pc, #20] @ (800880c <USBD_FS_ProductStrDescriptor+0x38>)
80087f8: f7ff fd89 bl 800830e <USBD_GetString>
}
return USBD_StrDesc;
80087fc: 4b02 ldr r3, [pc, #8] @ (8008808 <USBD_FS_ProductStrDescriptor+0x34>)
}
80087fe: 4618 mov r0, r3
8008800: 3708 adds r7, #8
8008802: 46bd mov sp, r7
8008804: bd80 pop {r7, pc}
8008806: bf00 nop
8008808: 20000f10 .word 0x20000f10
800880c: 08009884 .word 0x08009884
08008810 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008810: b580 push {r7, lr}
8008812: b082 sub sp, #8
8008814: af00 add r7, sp, #0
8008816: 4603 mov r3, r0
8008818: 6039 str r1, [r7, #0]
800881a: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800881c: 683a ldr r2, [r7, #0]
800881e: 4904 ldr r1, [pc, #16] @ (8008830 <USBD_FS_ManufacturerStrDescriptor+0x20>)
8008820: 4804 ldr r0, [pc, #16] @ (8008834 <USBD_FS_ManufacturerStrDescriptor+0x24>)
8008822: f7ff fd74 bl 800830e <USBD_GetString>
return USBD_StrDesc;
8008826: 4b02 ldr r3, [pc, #8] @ (8008830 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
8008828: 4618 mov r0, r3
800882a: 3708 adds r7, #8
800882c: 46bd mov sp, r7
800882e: bd80 pop {r7, pc}
8008830: 20000f10 .word 0x20000f10
8008834: 0800989c .word 0x0800989c
08008838 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008838: b580 push {r7, lr}
800883a: b082 sub sp, #8
800883c: af00 add r7, sp, #0
800883e: 4603 mov r3, r0
8008840: 6039 str r1, [r7, #0]
8008842: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
8008844: 683b ldr r3, [r7, #0]
8008846: 221a movs r2, #26
8008848: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800884a: f000 f843 bl 80088d4 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800884e: 4b02 ldr r3, [pc, #8] @ (8008858 <USBD_FS_SerialStrDescriptor+0x20>)
}
8008850: 4618 mov r0, r3
8008852: 3708 adds r7, #8
8008854: 46bd mov sp, r7
8008856: bd80 pop {r7, pc}
8008858: 20000160 .word 0x20000160
0800885c <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800885c: b580 push {r7, lr}
800885e: b082 sub sp, #8
8008860: af00 add r7, sp, #0
8008862: 4603 mov r3, r0
8008864: 6039 str r1, [r7, #0]
8008866: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
8008868: 79fb ldrb r3, [r7, #7]
800886a: 2b00 cmp r3, #0
800886c: d105 bne.n 800887a <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800886e: 683a ldr r2, [r7, #0]
8008870: 4907 ldr r1, [pc, #28] @ (8008890 <USBD_FS_ConfigStrDescriptor+0x34>)
8008872: 4808 ldr r0, [pc, #32] @ (8008894 <USBD_FS_ConfigStrDescriptor+0x38>)
8008874: f7ff fd4b bl 800830e <USBD_GetString>
8008878: e004 b.n 8008884 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800887a: 683a ldr r2, [r7, #0]
800887c: 4904 ldr r1, [pc, #16] @ (8008890 <USBD_FS_ConfigStrDescriptor+0x34>)
800887e: 4805 ldr r0, [pc, #20] @ (8008894 <USBD_FS_ConfigStrDescriptor+0x38>)
8008880: f7ff fd45 bl 800830e <USBD_GetString>
}
return USBD_StrDesc;
8008884: 4b02 ldr r3, [pc, #8] @ (8008890 <USBD_FS_ConfigStrDescriptor+0x34>)
}
8008886: 4618 mov r0, r3
8008888: 3708 adds r7, #8
800888a: 46bd mov sp, r7
800888c: bd80 pop {r7, pc}
800888e: bf00 nop
8008890: 20000f10 .word 0x20000f10
8008894: 080098b0 .word 0x080098b0
08008898 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008898: b580 push {r7, lr}
800889a: b082 sub sp, #8
800889c: af00 add r7, sp, #0
800889e: 4603 mov r3, r0
80088a0: 6039 str r1, [r7, #0]
80088a2: 71fb strb r3, [r7, #7]
if(speed == 0)
80088a4: 79fb ldrb r3, [r7, #7]
80088a6: 2b00 cmp r3, #0
80088a8: d105 bne.n 80088b6 <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
80088aa: 683a ldr r2, [r7, #0]
80088ac: 4907 ldr r1, [pc, #28] @ (80088cc <USBD_FS_InterfaceStrDescriptor+0x34>)
80088ae: 4808 ldr r0, [pc, #32] @ (80088d0 <USBD_FS_InterfaceStrDescriptor+0x38>)
80088b0: f7ff fd2d bl 800830e <USBD_GetString>
80088b4: e004 b.n 80088c0 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
80088b6: 683a ldr r2, [r7, #0]
80088b8: 4904 ldr r1, [pc, #16] @ (80088cc <USBD_FS_InterfaceStrDescriptor+0x34>)
80088ba: 4805 ldr r0, [pc, #20] @ (80088d0 <USBD_FS_InterfaceStrDescriptor+0x38>)
80088bc: f7ff fd27 bl 800830e <USBD_GetString>
}
return USBD_StrDesc;
80088c0: 4b02 ldr r3, [pc, #8] @ (80088cc <USBD_FS_InterfaceStrDescriptor+0x34>)
}
80088c2: 4618 mov r0, r3
80088c4: 3708 adds r7, #8
80088c6: 46bd mov sp, r7
80088c8: bd80 pop {r7, pc}
80088ca: bf00 nop
80088cc: 20000f10 .word 0x20000f10
80088d0: 080098bc .word 0x080098bc
080088d4 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
80088d4: b580 push {r7, lr}
80088d6: b084 sub sp, #16
80088d8: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
80088da: 4b0f ldr r3, [pc, #60] @ (8008918 <Get_SerialNum+0x44>)
80088dc: 681b ldr r3, [r3, #0]
80088de: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
80088e0: 4b0e ldr r3, [pc, #56] @ (800891c <Get_SerialNum+0x48>)
80088e2: 681b ldr r3, [r3, #0]
80088e4: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
80088e6: 4b0e ldr r3, [pc, #56] @ (8008920 <Get_SerialNum+0x4c>)
80088e8: 681b ldr r3, [r3, #0]
80088ea: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
80088ec: 68fa ldr r2, [r7, #12]
80088ee: 687b ldr r3, [r7, #4]
80088f0: 4413 add r3, r2
80088f2: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
80088f4: 68fb ldr r3, [r7, #12]
80088f6: 2b00 cmp r3, #0
80088f8: d009 beq.n 800890e <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
80088fa: 2208 movs r2, #8
80088fc: 4909 ldr r1, [pc, #36] @ (8008924 <Get_SerialNum+0x50>)
80088fe: 68f8 ldr r0, [r7, #12]
8008900: f000 f814 bl 800892c <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
8008904: 2204 movs r2, #4
8008906: 4908 ldr r1, [pc, #32] @ (8008928 <Get_SerialNum+0x54>)
8008908: 68b8 ldr r0, [r7, #8]
800890a: f000 f80f bl 800892c <IntToUnicode>
}
}
800890e: bf00 nop
8008910: 3710 adds r7, #16
8008912: 46bd mov sp, r7
8008914: bd80 pop {r7, pc}
8008916: bf00 nop
8008918: 1ffff7e8 .word 0x1ffff7e8
800891c: 1ffff7ec .word 0x1ffff7ec
8008920: 1ffff7f0 .word 0x1ffff7f0
8008924: 20000162 .word 0x20000162
8008928: 20000172 .word 0x20000172
0800892c <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800892c: b480 push {r7}
800892e: b087 sub sp, #28
8008930: af00 add r7, sp, #0
8008932: 60f8 str r0, [r7, #12]
8008934: 60b9 str r1, [r7, #8]
8008936: 4613 mov r3, r2
8008938: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800893a: 2300 movs r3, #0
800893c: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800893e: 2300 movs r3, #0
8008940: 75fb strb r3, [r7, #23]
8008942: e027 b.n 8008994 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
8008944: 68fb ldr r3, [r7, #12]
8008946: 0f1b lsrs r3, r3, #28
8008948: 2b09 cmp r3, #9
800894a: d80b bhi.n 8008964 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800894c: 68fb ldr r3, [r7, #12]
800894e: 0f1b lsrs r3, r3, #28
8008950: b2da uxtb r2, r3
8008952: 7dfb ldrb r3, [r7, #23]
8008954: 005b lsls r3, r3, #1
8008956: 4619 mov r1, r3
8008958: 68bb ldr r3, [r7, #8]
800895a: 440b add r3, r1
800895c: 3230 adds r2, #48 @ 0x30
800895e: b2d2 uxtb r2, r2
8008960: 701a strb r2, [r3, #0]
8008962: e00a b.n 800897a <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
8008964: 68fb ldr r3, [r7, #12]
8008966: 0f1b lsrs r3, r3, #28
8008968: b2da uxtb r2, r3
800896a: 7dfb ldrb r3, [r7, #23]
800896c: 005b lsls r3, r3, #1
800896e: 4619 mov r1, r3
8008970: 68bb ldr r3, [r7, #8]
8008972: 440b add r3, r1
8008974: 3237 adds r2, #55 @ 0x37
8008976: b2d2 uxtb r2, r2
8008978: 701a strb r2, [r3, #0]
}
value = value << 4;
800897a: 68fb ldr r3, [r7, #12]
800897c: 011b lsls r3, r3, #4
800897e: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
8008980: 7dfb ldrb r3, [r7, #23]
8008982: 005b lsls r3, r3, #1
8008984: 3301 adds r3, #1
8008986: 68ba ldr r2, [r7, #8]
8008988: 4413 add r3, r2
800898a: 2200 movs r2, #0
800898c: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800898e: 7dfb ldrb r3, [r7, #23]
8008990: 3301 adds r3, #1
8008992: 75fb strb r3, [r7, #23]
8008994: 7dfa ldrb r2, [r7, #23]
8008996: 79fb ldrb r3, [r7, #7]
8008998: 429a cmp r2, r3
800899a: d3d3 bcc.n 8008944 <IntToUnicode+0x18>
}
}
800899c: bf00 nop
800899e: bf00 nop
80089a0: 371c adds r7, #28
80089a2: 46bd mov sp, r7
80089a4: bc80 pop {r7}
80089a6: 4770 bx lr
080089a8 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
80089a8: b580 push {r7, lr}
80089aa: b084 sub sp, #16
80089ac: af00 add r7, sp, #0
80089ae: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
80089b0: 687b ldr r3, [r7, #4]
80089b2: 681b ldr r3, [r3, #0]
80089b4: 4a0d ldr r2, [pc, #52] @ (80089ec <HAL_PCD_MspInit+0x44>)
80089b6: 4293 cmp r3, r2
80089b8: d113 bne.n 80089e2 <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
80089ba: 4b0d ldr r3, [pc, #52] @ (80089f0 <HAL_PCD_MspInit+0x48>)
80089bc: 69db ldr r3, [r3, #28]
80089be: 4a0c ldr r2, [pc, #48] @ (80089f0 <HAL_PCD_MspInit+0x48>)
80089c0: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
80089c4: 61d3 str r3, [r2, #28]
80089c6: 4b0a ldr r3, [pc, #40] @ (80089f0 <HAL_PCD_MspInit+0x48>)
80089c8: 69db ldr r3, [r3, #28]
80089ca: f403 0300 and.w r3, r3, #8388608 @ 0x800000
80089ce: 60fb str r3, [r7, #12]
80089d0: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
80089d2: 2200 movs r2, #0
80089d4: 2100 movs r1, #0
80089d6: 2014 movs r0, #20
80089d8: f7f8 fd1f bl 800141a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
80089dc: 2014 movs r0, #20
80089de: f7f8 fd38 bl 8001452 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
80089e2: bf00 nop
80089e4: 3710 adds r7, #16
80089e6: 46bd mov sp, r7
80089e8: bd80 pop {r7, pc}
80089ea: bf00 nop
80089ec: 40005c00 .word 0x40005c00
80089f0: 40021000 .word 0x40021000
080089f4 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80089f4: b580 push {r7, lr}
80089f6: b082 sub sp, #8
80089f8: af00 add r7, sp, #0
80089fa: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
80089fc: 687b ldr r3, [r7, #4]
80089fe: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
8008a02: 687b ldr r3, [r7, #4]
8008a04: f503 7326 add.w r3, r3, #664 @ 0x298
8008a08: 4619 mov r1, r3
8008a0a: 4610 mov r0, r2
8008a0c: f7fe fd51 bl 80074b2 <USBD_LL_SetupStage>
}
8008a10: bf00 nop
8008a12: 3708 adds r7, #8
8008a14: 46bd mov sp, r7
8008a16: bd80 pop {r7, pc}
08008a18 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008a18: b580 push {r7, lr}
8008a1a: b082 sub sp, #8
8008a1c: af00 add r7, sp, #0
8008a1e: 6078 str r0, [r7, #4]
8008a20: 460b mov r3, r1
8008a22: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
8008a24: 687b ldr r3, [r7, #4]
8008a26: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
8008a2a: 78fa ldrb r2, [r7, #3]
8008a2c: 6879 ldr r1, [r7, #4]
8008a2e: 4613 mov r3, r2
8008a30: 009b lsls r3, r3, #2
8008a32: 4413 add r3, r2
8008a34: 00db lsls r3, r3, #3
8008a36: 440b add r3, r1
8008a38: f503 73b2 add.w r3, r3, #356 @ 0x164
8008a3c: 681a ldr r2, [r3, #0]
8008a3e: 78fb ldrb r3, [r7, #3]
8008a40: 4619 mov r1, r3
8008a42: f7fe fd83 bl 800754c <USBD_LL_DataOutStage>
}
8008a46: bf00 nop
8008a48: 3708 adds r7, #8
8008a4a: 46bd mov sp, r7
8008a4c: bd80 pop {r7, pc}
08008a4e <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008a4e: b580 push {r7, lr}
8008a50: b082 sub sp, #8
8008a52: af00 add r7, sp, #0
8008a54: 6078 str r0, [r7, #4]
8008a56: 460b mov r3, r1
8008a58: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
8008a5a: 687b ldr r3, [r7, #4]
8008a5c: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
8008a60: 78fa ldrb r2, [r7, #3]
8008a62: 6879 ldr r1, [r7, #4]
8008a64: 4613 mov r3, r2
8008a66: 009b lsls r3, r3, #2
8008a68: 4413 add r3, r2
8008a6a: 00db lsls r3, r3, #3
8008a6c: 440b add r3, r1
8008a6e: 3324 adds r3, #36 @ 0x24
8008a70: 681a ldr r2, [r3, #0]
8008a72: 78fb ldrb r3, [r7, #3]
8008a74: 4619 mov r1, r3
8008a76: f7fe fdda bl 800762e <USBD_LL_DataInStage>
}
8008a7a: bf00 nop
8008a7c: 3708 adds r7, #8
8008a7e: 46bd mov sp, r7
8008a80: bd80 pop {r7, pc}
08008a82 <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008a82: b580 push {r7, lr}
8008a84: b082 sub sp, #8
8008a86: af00 add r7, sp, #0
8008a88: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
8008a8a: 687b ldr r3, [r7, #4]
8008a8c: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008a90: 4618 mov r0, r3
8008a92: f7fe feea bl 800786a <USBD_LL_SOF>
}
8008a96: bf00 nop
8008a98: 3708 adds r7, #8
8008a9a: 46bd mov sp, r7
8008a9c: bd80 pop {r7, pc}
08008a9e <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008a9e: b580 push {r7, lr}
8008aa0: b084 sub sp, #16
8008aa2: af00 add r7, sp, #0
8008aa4: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
8008aa6: 2301 movs r3, #1
8008aa8: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
8008aaa: 687b ldr r3, [r7, #4]
8008aac: 799b ldrb r3, [r3, #6]
8008aae: 2b02 cmp r3, #2
8008ab0: d001 beq.n 8008ab6 <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
8008ab2: f7f7 ff55 bl 8000960 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
8008ab6: 687b ldr r3, [r7, #4]
8008ab8: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008abc: 7bfa ldrb r2, [r7, #15]
8008abe: 4611 mov r1, r2
8008ac0: 4618 mov r0, r3
8008ac2: f7fe fe9a bl 80077fa <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
8008ac6: 687b ldr r3, [r7, #4]
8008ac8: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008acc: 4618 mov r0, r3
8008ace: f7fe fe53 bl 8007778 <USBD_LL_Reset>
}
8008ad2: bf00 nop
8008ad4: 3710 adds r7, #16
8008ad6: 46bd mov sp, r7
8008ad8: bd80 pop {r7, pc}
...
08008adc <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008adc: b580 push {r7, lr}
8008ade: b082 sub sp, #8
8008ae0: af00 add r7, sp, #0
8008ae2: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
8008ae4: 687b ldr r3, [r7, #4]
8008ae6: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008aea: 4618 mov r0, r3
8008aec: f7fe fe94 bl 8007818 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
8008af0: 687b ldr r3, [r7, #4]
8008af2: 7a9b ldrb r3, [r3, #10]
8008af4: 2b00 cmp r3, #0
8008af6: d005 beq.n 8008b04 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
8008af8: 4b04 ldr r3, [pc, #16] @ (8008b0c <HAL_PCD_SuspendCallback+0x30>)
8008afa: 691b ldr r3, [r3, #16]
8008afc: 4a03 ldr r2, [pc, #12] @ (8008b0c <HAL_PCD_SuspendCallback+0x30>)
8008afe: f043 0306 orr.w r3, r3, #6
8008b02: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
8008b04: bf00 nop
8008b06: 3708 adds r7, #8
8008b08: 46bd mov sp, r7
8008b0a: bd80 pop {r7, pc}
8008b0c: e000ed00 .word 0xe000ed00
08008b10 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008b10: b580 push {r7, lr}
8008b12: b082 sub sp, #8
8008b14: af00 add r7, sp, #0
8008b16: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
8008b18: 687b ldr r3, [r7, #4]
8008b1a: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008b1e: 4618 mov r0, r3
8008b20: f7fe fe8e bl 8007840 <USBD_LL_Resume>
}
8008b24: bf00 nop
8008b26: 3708 adds r7, #8
8008b28: 46bd mov sp, r7
8008b2a: bd80 pop {r7, pc}
08008b2c <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
8008b2c: b580 push {r7, lr}
8008b2e: b082 sub sp, #8
8008b30: af00 add r7, sp, #0
8008b32: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
8008b34: 4a28 ldr r2, [pc, #160] @ (8008bd8 <USBD_LL_Init+0xac>)
8008b36: 687b ldr r3, [r7, #4]
8008b38: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
8008b3c: 687b ldr r3, [r7, #4]
8008b3e: 4a26 ldr r2, [pc, #152] @ (8008bd8 <USBD_LL_Init+0xac>)
8008b40: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
8008b44: 4b24 ldr r3, [pc, #144] @ (8008bd8 <USBD_LL_Init+0xac>)
8008b46: 4a25 ldr r2, [pc, #148] @ (8008bdc <USBD_LL_Init+0xb0>)
8008b48: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
8008b4a: 4b23 ldr r3, [pc, #140] @ (8008bd8 <USBD_LL_Init+0xac>)
8008b4c: 2208 movs r2, #8
8008b4e: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
8008b50: 4b21 ldr r3, [pc, #132] @ (8008bd8 <USBD_LL_Init+0xac>)
8008b52: 2202 movs r2, #2
8008b54: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
8008b56: 4b20 ldr r3, [pc, #128] @ (8008bd8 <USBD_LL_Init+0xac>)
8008b58: 2200 movs r2, #0
8008b5a: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
8008b5c: 4b1e ldr r3, [pc, #120] @ (8008bd8 <USBD_LL_Init+0xac>)
8008b5e: 2200 movs r2, #0
8008b60: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
8008b62: 4b1d ldr r3, [pc, #116] @ (8008bd8 <USBD_LL_Init+0xac>)
8008b64: 2200 movs r2, #0
8008b66: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
8008b68: 481b ldr r0, [pc, #108] @ (8008bd8 <USBD_LL_Init+0xac>)
8008b6a: f7f8 fe48 bl 80017fe <HAL_PCD_Init>
8008b6e: 4603 mov r3, r0
8008b70: 2b00 cmp r3, #0
8008b72: d001 beq.n 8008b78 <USBD_LL_Init+0x4c>
{
Error_Handler( );
8008b74: f7f7 fef4 bl 8000960 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
8008b78: 687b ldr r3, [r7, #4]
8008b7a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008b7e: 2318 movs r3, #24
8008b80: 2200 movs r2, #0
8008b82: 2100 movs r1, #0
8008b84: f7fa fb59 bl 800323a <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
8008b88: 687b ldr r3, [r7, #4]
8008b8a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008b8e: 2358 movs r3, #88 @ 0x58
8008b90: 2200 movs r2, #0
8008b92: 2180 movs r1, #128 @ 0x80
8008b94: f7fa fb51 bl 800323a <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
8008b98: 687b ldr r3, [r7, #4]
8008b9a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008b9e: 23c0 movs r3, #192 @ 0xc0
8008ba0: 2200 movs r2, #0
8008ba2: 2181 movs r1, #129 @ 0x81
8008ba4: f7fa fb49 bl 800323a <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
8008ba8: 687b ldr r3, [r7, #4]
8008baa: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008bae: f44f 7388 mov.w r3, #272 @ 0x110
8008bb2: 2200 movs r2, #0
8008bb4: 2101 movs r1, #1
8008bb6: f7fa fb40 bl 800323a <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
8008bba: 687b ldr r3, [r7, #4]
8008bbc: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008bc0: f44f 7380 mov.w r3, #256 @ 0x100
8008bc4: 2200 movs r2, #0
8008bc6: 2182 movs r1, #130 @ 0x82
8008bc8: f7fa fb37 bl 800323a <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
8008bcc: 2300 movs r3, #0
}
8008bce: 4618 mov r0, r3
8008bd0: 3708 adds r7, #8
8008bd2: 46bd mov sp, r7
8008bd4: bd80 pop {r7, pc}
8008bd6: bf00 nop
8008bd8: 20001110 .word 0x20001110
8008bdc: 40005c00 .word 0x40005c00
08008be0 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
8008be0: b580 push {r7, lr}
8008be2: b084 sub sp, #16
8008be4: af00 add r7, sp, #0
8008be6: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8008be8: 2300 movs r3, #0
8008bea: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008bec: 2300 movs r3, #0
8008bee: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
8008bf0: 687b ldr r3, [r7, #4]
8008bf2: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008bf6: 4618 mov r0, r3
8008bf8: f7f8 fef7 bl 80019ea <HAL_PCD_Start>
8008bfc: 4603 mov r3, r0
8008bfe: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008c00: 7bfb ldrb r3, [r7, #15]
8008c02: 4618 mov r0, r3
8008c04: f000 f94e bl 8008ea4 <USBD_Get_USB_Status>
8008c08: 4603 mov r3, r0
8008c0a: 73bb strb r3, [r7, #14]
return usb_status;
8008c0c: 7bbb ldrb r3, [r7, #14]
}
8008c0e: 4618 mov r0, r3
8008c10: 3710 adds r7, #16
8008c12: 46bd mov sp, r7
8008c14: bd80 pop {r7, pc}
08008c16 <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
8008c16: b580 push {r7, lr}
8008c18: b084 sub sp, #16
8008c1a: af00 add r7, sp, #0
8008c1c: 6078 str r0, [r7, #4]
8008c1e: 4608 mov r0, r1
8008c20: 4611 mov r1, r2
8008c22: 461a mov r2, r3
8008c24: 4603 mov r3, r0
8008c26: 70fb strb r3, [r7, #3]
8008c28: 460b mov r3, r1
8008c2a: 70bb strb r3, [r7, #2]
8008c2c: 4613 mov r3, r2
8008c2e: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
8008c30: 2300 movs r3, #0
8008c32: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008c34: 2300 movs r3, #0
8008c36: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
8008c38: 687b ldr r3, [r7, #4]
8008c3a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008c3e: 78bb ldrb r3, [r7, #2]
8008c40: 883a ldrh r2, [r7, #0]
8008c42: 78f9 ldrb r1, [r7, #3]
8008c44: f7f9 f84b bl 8001cde <HAL_PCD_EP_Open>
8008c48: 4603 mov r3, r0
8008c4a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008c4c: 7bfb ldrb r3, [r7, #15]
8008c4e: 4618 mov r0, r3
8008c50: f000 f928 bl 8008ea4 <USBD_Get_USB_Status>
8008c54: 4603 mov r3, r0
8008c56: 73bb strb r3, [r7, #14]
return usb_status;
8008c58: 7bbb ldrb r3, [r7, #14]
}
8008c5a: 4618 mov r0, r3
8008c5c: 3710 adds r7, #16
8008c5e: 46bd mov sp, r7
8008c60: bd80 pop {r7, pc}
08008c62 <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008c62: b580 push {r7, lr}
8008c64: b084 sub sp, #16
8008c66: af00 add r7, sp, #0
8008c68: 6078 str r0, [r7, #4]
8008c6a: 460b mov r3, r1
8008c6c: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008c6e: 2300 movs r3, #0
8008c70: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008c72: 2300 movs r3, #0
8008c74: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
8008c76: 687b ldr r3, [r7, #4]
8008c78: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008c7c: 78fa ldrb r2, [r7, #3]
8008c7e: 4611 mov r1, r2
8008c80: 4618 mov r0, r3
8008c82: f7f9 f889 bl 8001d98 <HAL_PCD_EP_Close>
8008c86: 4603 mov r3, r0
8008c88: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008c8a: 7bfb ldrb r3, [r7, #15]
8008c8c: 4618 mov r0, r3
8008c8e: f000 f909 bl 8008ea4 <USBD_Get_USB_Status>
8008c92: 4603 mov r3, r0
8008c94: 73bb strb r3, [r7, #14]
return usb_status;
8008c96: 7bbb ldrb r3, [r7, #14]
}
8008c98: 4618 mov r0, r3
8008c9a: 3710 adds r7, #16
8008c9c: 46bd mov sp, r7
8008c9e: bd80 pop {r7, pc}
08008ca0 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008ca0: b580 push {r7, lr}
8008ca2: b084 sub sp, #16
8008ca4: af00 add r7, sp, #0
8008ca6: 6078 str r0, [r7, #4]
8008ca8: 460b mov r3, r1
8008caa: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008cac: 2300 movs r3, #0
8008cae: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008cb0: 2300 movs r3, #0
8008cb2: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
8008cb4: 687b ldr r3, [r7, #4]
8008cb6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008cba: 78fa ldrb r2, [r7, #3]
8008cbc: 4611 mov r1, r2
8008cbe: 4618 mov r0, r3
8008cc0: f7f9 f931 bl 8001f26 <HAL_PCD_EP_SetStall>
8008cc4: 4603 mov r3, r0
8008cc6: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008cc8: 7bfb ldrb r3, [r7, #15]
8008cca: 4618 mov r0, r3
8008ccc: f000 f8ea bl 8008ea4 <USBD_Get_USB_Status>
8008cd0: 4603 mov r3, r0
8008cd2: 73bb strb r3, [r7, #14]
return usb_status;
8008cd4: 7bbb ldrb r3, [r7, #14]
}
8008cd6: 4618 mov r0, r3
8008cd8: 3710 adds r7, #16
8008cda: 46bd mov sp, r7
8008cdc: bd80 pop {r7, pc}
08008cde <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008cde: b580 push {r7, lr}
8008ce0: b084 sub sp, #16
8008ce2: af00 add r7, sp, #0
8008ce4: 6078 str r0, [r7, #4]
8008ce6: 460b mov r3, r1
8008ce8: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008cea: 2300 movs r3, #0
8008cec: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008cee: 2300 movs r3, #0
8008cf0: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
8008cf2: 687b ldr r3, [r7, #4]
8008cf4: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008cf8: 78fa ldrb r2, [r7, #3]
8008cfa: 4611 mov r1, r2
8008cfc: 4618 mov r0, r3
8008cfe: f7f9 f972 bl 8001fe6 <HAL_PCD_EP_ClrStall>
8008d02: 4603 mov r3, r0
8008d04: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008d06: 7bfb ldrb r3, [r7, #15]
8008d08: 4618 mov r0, r3
8008d0a: f000 f8cb bl 8008ea4 <USBD_Get_USB_Status>
8008d0e: 4603 mov r3, r0
8008d10: 73bb strb r3, [r7, #14]
return usb_status;
8008d12: 7bbb ldrb r3, [r7, #14]
}
8008d14: 4618 mov r0, r3
8008d16: 3710 adds r7, #16
8008d18: 46bd mov sp, r7
8008d1a: bd80 pop {r7, pc}
08008d1c <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008d1c: b480 push {r7}
8008d1e: b085 sub sp, #20
8008d20: af00 add r7, sp, #0
8008d22: 6078 str r0, [r7, #4]
8008d24: 460b mov r3, r1
8008d26: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
8008d28: 687b ldr r3, [r7, #4]
8008d2a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008d2e: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
8008d30: f997 3003 ldrsb.w r3, [r7, #3]
8008d34: 2b00 cmp r3, #0
8008d36: da0b bge.n 8008d50 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
8008d38: 78fb ldrb r3, [r7, #3]
8008d3a: f003 027f and.w r2, r3, #127 @ 0x7f
8008d3e: 68f9 ldr r1, [r7, #12]
8008d40: 4613 mov r3, r2
8008d42: 009b lsls r3, r3, #2
8008d44: 4413 add r3, r2
8008d46: 00db lsls r3, r3, #3
8008d48: 440b add r3, r1
8008d4a: 3312 adds r3, #18
8008d4c: 781b ldrb r3, [r3, #0]
8008d4e: e00b b.n 8008d68 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
8008d50: 78fb ldrb r3, [r7, #3]
8008d52: f003 027f and.w r2, r3, #127 @ 0x7f
8008d56: 68f9 ldr r1, [r7, #12]
8008d58: 4613 mov r3, r2
8008d5a: 009b lsls r3, r3, #2
8008d5c: 4413 add r3, r2
8008d5e: 00db lsls r3, r3, #3
8008d60: 440b add r3, r1
8008d62: f503 73a9 add.w r3, r3, #338 @ 0x152
8008d66: 781b ldrb r3, [r3, #0]
}
}
8008d68: 4618 mov r0, r3
8008d6a: 3714 adds r7, #20
8008d6c: 46bd mov sp, r7
8008d6e: bc80 pop {r7}
8008d70: 4770 bx lr
08008d72 <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
8008d72: b580 push {r7, lr}
8008d74: b084 sub sp, #16
8008d76: af00 add r7, sp, #0
8008d78: 6078 str r0, [r7, #4]
8008d7a: 460b mov r3, r1
8008d7c: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008d7e: 2300 movs r3, #0
8008d80: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008d82: 2300 movs r3, #0
8008d84: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
8008d86: 687b ldr r3, [r7, #4]
8008d88: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008d8c: 78fa ldrb r2, [r7, #3]
8008d8e: 4611 mov r1, r2
8008d90: 4618 mov r0, r3
8008d92: f7f8 ff80 bl 8001c96 <HAL_PCD_SetAddress>
8008d96: 4603 mov r3, r0
8008d98: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008d9a: 7bfb ldrb r3, [r7, #15]
8008d9c: 4618 mov r0, r3
8008d9e: f000 f881 bl 8008ea4 <USBD_Get_USB_Status>
8008da2: 4603 mov r3, r0
8008da4: 73bb strb r3, [r7, #14]
return usb_status;
8008da6: 7bbb ldrb r3, [r7, #14]
}
8008da8: 4618 mov r0, r3
8008daa: 3710 adds r7, #16
8008dac: 46bd mov sp, r7
8008dae: bd80 pop {r7, pc}
08008db0 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
8008db0: b580 push {r7, lr}
8008db2: b086 sub sp, #24
8008db4: af00 add r7, sp, #0
8008db6: 60f8 str r0, [r7, #12]
8008db8: 607a str r2, [r7, #4]
8008dba: 461a mov r2, r3
8008dbc: 460b mov r3, r1
8008dbe: 72fb strb r3, [r7, #11]
8008dc0: 4613 mov r3, r2
8008dc2: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
8008dc4: 2300 movs r3, #0
8008dc6: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8008dc8: 2300 movs r3, #0
8008dca: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
8008dcc: 68fb ldr r3, [r7, #12]
8008dce: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008dd2: 893b ldrh r3, [r7, #8]
8008dd4: 7af9 ldrb r1, [r7, #11]
8008dd6: 687a ldr r2, [r7, #4]
8008dd8: f7f9 f86e bl 8001eb8 <HAL_PCD_EP_Transmit>
8008ddc: 4603 mov r3, r0
8008dde: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8008de0: 7dfb ldrb r3, [r7, #23]
8008de2: 4618 mov r0, r3
8008de4: f000 f85e bl 8008ea4 <USBD_Get_USB_Status>
8008de8: 4603 mov r3, r0
8008dea: 75bb strb r3, [r7, #22]
return usb_status;
8008dec: 7dbb ldrb r3, [r7, #22]
}
8008dee: 4618 mov r0, r3
8008df0: 3718 adds r7, #24
8008df2: 46bd mov sp, r7
8008df4: bd80 pop {r7, pc}
08008df6 <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
8008df6: b580 push {r7, lr}
8008df8: b086 sub sp, #24
8008dfa: af00 add r7, sp, #0
8008dfc: 60f8 str r0, [r7, #12]
8008dfe: 607a str r2, [r7, #4]
8008e00: 461a mov r2, r3
8008e02: 460b mov r3, r1
8008e04: 72fb strb r3, [r7, #11]
8008e06: 4613 mov r3, r2
8008e08: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
8008e0a: 2300 movs r3, #0
8008e0c: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8008e0e: 2300 movs r3, #0
8008e10: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
8008e12: 68fb ldr r3, [r7, #12]
8008e14: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008e18: 893b ldrh r3, [r7, #8]
8008e1a: 7af9 ldrb r1, [r7, #11]
8008e1c: 687a ldr r2, [r7, #4]
8008e1e: f7f9 f803 bl 8001e28 <HAL_PCD_EP_Receive>
8008e22: 4603 mov r3, r0
8008e24: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
8008e26: 7dfb ldrb r3, [r7, #23]
8008e28: 4618 mov r0, r3
8008e2a: f000 f83b bl 8008ea4 <USBD_Get_USB_Status>
8008e2e: 4603 mov r3, r0
8008e30: 75bb strb r3, [r7, #22]
return usb_status;
8008e32: 7dbb ldrb r3, [r7, #22]
}
8008e34: 4618 mov r0, r3
8008e36: 3718 adds r7, #24
8008e38: 46bd mov sp, r7
8008e3a: bd80 pop {r7, pc}
08008e3c <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008e3c: b580 push {r7, lr}
8008e3e: b082 sub sp, #8
8008e40: af00 add r7, sp, #0
8008e42: 6078 str r0, [r7, #4]
8008e44: 460b mov r3, r1
8008e46: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
8008e48: 687b ldr r3, [r7, #4]
8008e4a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008e4e: 78fa ldrb r2, [r7, #3]
8008e50: 4611 mov r1, r2
8008e52: 4618 mov r0, r3
8008e54: f7f9 f819 bl 8001e8a <HAL_PCD_EP_GetRxCount>
8008e58: 4603 mov r3, r0
}
8008e5a: 4618 mov r0, r3
8008e5c: 3708 adds r7, #8
8008e5e: 46bd mov sp, r7
8008e60: bd80 pop {r7, pc}
...
08008e64 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
8008e64: b480 push {r7}
8008e66: b083 sub sp, #12
8008e68: af00 add r7, sp, #0
8008e6a: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
8008e6c: 4b02 ldr r3, [pc, #8] @ (8008e78 <USBD_static_malloc+0x14>)
}
8008e6e: 4618 mov r0, r3
8008e70: 370c adds r7, #12
8008e72: 46bd mov sp, r7
8008e74: bc80 pop {r7}
8008e76: 4770 bx lr
8008e78: 200013e8 .word 0x200013e8
08008e7c <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
8008e7c: b480 push {r7}
8008e7e: b083 sub sp, #12
8008e80: af00 add r7, sp, #0
8008e82: 6078 str r0, [r7, #4]
}
8008e84: bf00 nop
8008e86: 370c adds r7, #12
8008e88: 46bd mov sp, r7
8008e8a: bc80 pop {r7}
8008e8c: 4770 bx lr
08008e8e <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008e8e: b480 push {r7}
8008e90: b083 sub sp, #12
8008e92: af00 add r7, sp, #0
8008e94: 6078 str r0, [r7, #4]
8008e96: 460b mov r3, r1
8008e98: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
8008e9a: bf00 nop
8008e9c: 370c adds r7, #12
8008e9e: 46bd mov sp, r7
8008ea0: bc80 pop {r7}
8008ea2: 4770 bx lr
08008ea4 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
8008ea4: b480 push {r7}
8008ea6: b085 sub sp, #20
8008ea8: af00 add r7, sp, #0
8008eaa: 4603 mov r3, r0
8008eac: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
8008eae: 2300 movs r3, #0
8008eb0: 73fb strb r3, [r7, #15]
switch (hal_status)
8008eb2: 79fb ldrb r3, [r7, #7]
8008eb4: 2b03 cmp r3, #3
8008eb6: d817 bhi.n 8008ee8 <USBD_Get_USB_Status+0x44>
8008eb8: a201 add r2, pc, #4 @ (adr r2, 8008ec0 <USBD_Get_USB_Status+0x1c>)
8008eba: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008ebe: bf00 nop
8008ec0: 08008ed1 .word 0x08008ed1
8008ec4: 08008ed7 .word 0x08008ed7
8008ec8: 08008edd .word 0x08008edd
8008ecc: 08008ee3 .word 0x08008ee3
{
case HAL_OK :
usb_status = USBD_OK;
8008ed0: 2300 movs r3, #0
8008ed2: 73fb strb r3, [r7, #15]
break;
8008ed4: e00b b.n 8008eee <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
8008ed6: 2302 movs r3, #2
8008ed8: 73fb strb r3, [r7, #15]
break;
8008eda: e008 b.n 8008eee <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
8008edc: 2301 movs r3, #1
8008ede: 73fb strb r3, [r7, #15]
break;
8008ee0: e005 b.n 8008eee <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
8008ee2: 2302 movs r3, #2
8008ee4: 73fb strb r3, [r7, #15]
break;
8008ee6: e002 b.n 8008eee <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
8008ee8: 2302 movs r3, #2
8008eea: 73fb strb r3, [r7, #15]
break;
8008eec: bf00 nop
}
return usb_status;
8008eee: 7bfb ldrb r3, [r7, #15]
}
8008ef0: 4618 mov r0, r3
8008ef2: 3714 adds r7, #20
8008ef4: 46bd mov sp, r7
8008ef6: bc80 pop {r7}
8008ef8: 4770 bx lr
8008efa: bf00 nop
08008efc <siprintf>:
8008efc: b40e push {r1, r2, r3}
8008efe: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
8008f02: b510 push {r4, lr}
8008f04: 2400 movs r4, #0
8008f06: b09d sub sp, #116 @ 0x74
8008f08: ab1f add r3, sp, #124 @ 0x7c
8008f0a: 9002 str r0, [sp, #8]
8008f0c: 9006 str r0, [sp, #24]
8008f0e: 9107 str r1, [sp, #28]
8008f10: 9104 str r1, [sp, #16]
8008f12: 4809 ldr r0, [pc, #36] @ (8008f38 <siprintf+0x3c>)
8008f14: 4909 ldr r1, [pc, #36] @ (8008f3c <siprintf+0x40>)
8008f16: f853 2b04 ldr.w r2, [r3], #4
8008f1a: 9105 str r1, [sp, #20]
8008f1c: 6800 ldr r0, [r0, #0]
8008f1e: a902 add r1, sp, #8
8008f20: 9301 str r3, [sp, #4]
8008f22: 941b str r4, [sp, #108] @ 0x6c
8008f24: f000 f992 bl 800924c <_svfiprintf_r>
8008f28: 9b02 ldr r3, [sp, #8]
8008f2a: 701c strb r4, [r3, #0]
8008f2c: b01d add sp, #116 @ 0x74
8008f2e: e8bd 4010 ldmia.w sp!, {r4, lr}
8008f32: b003 add sp, #12
8008f34: 4770 bx lr
8008f36: bf00 nop
8008f38: 2000017c .word 0x2000017c
8008f3c: ffff0208 .word 0xffff0208
08008f40 <memset>:
8008f40: 4603 mov r3, r0
8008f42: 4402 add r2, r0
8008f44: 4293 cmp r3, r2
8008f46: d100 bne.n 8008f4a <memset+0xa>
8008f48: 4770 bx lr
8008f4a: f803 1b01 strb.w r1, [r3], #1
8008f4e: e7f9 b.n 8008f44 <memset+0x4>
08008f50 <__errno>:
8008f50: 4b01 ldr r3, [pc, #4] @ (8008f58 <__errno+0x8>)
8008f52: 6818 ldr r0, [r3, #0]
8008f54: 4770 bx lr
8008f56: bf00 nop
8008f58: 2000017c .word 0x2000017c
08008f5c <__libc_init_array>:
8008f5c: b570 push {r4, r5, r6, lr}
8008f5e: 2600 movs r6, #0
8008f60: 4d0c ldr r5, [pc, #48] @ (8008f94 <__libc_init_array+0x38>)
8008f62: 4c0d ldr r4, [pc, #52] @ (8008f98 <__libc_init_array+0x3c>)
8008f64: 1b64 subs r4, r4, r5
8008f66: 10a4 asrs r4, r4, #2
8008f68: 42a6 cmp r6, r4
8008f6a: d109 bne.n 8008f80 <__libc_init_array+0x24>
8008f6c: f000 fc76 bl 800985c <_init>
8008f70: 2600 movs r6, #0
8008f72: 4d0a ldr r5, [pc, #40] @ (8008f9c <__libc_init_array+0x40>)
8008f74: 4c0a ldr r4, [pc, #40] @ (8008fa0 <__libc_init_array+0x44>)
8008f76: 1b64 subs r4, r4, r5
8008f78: 10a4 asrs r4, r4, #2
8008f7a: 42a6 cmp r6, r4
8008f7c: d105 bne.n 8008f8a <__libc_init_array+0x2e>
8008f7e: bd70 pop {r4, r5, r6, pc}
8008f80: f855 3b04 ldr.w r3, [r5], #4
8008f84: 4798 blx r3
8008f86: 3601 adds r6, #1
8008f88: e7ee b.n 8008f68 <__libc_init_array+0xc>
8008f8a: f855 3b04 ldr.w r3, [r5], #4
8008f8e: 4798 blx r3
8008f90: 3601 adds r6, #1
8008f92: e7f2 b.n 8008f7a <__libc_init_array+0x1e>
8008f94: 08009924 .word 0x08009924
8008f98: 08009924 .word 0x08009924
8008f9c: 08009924 .word 0x08009924
8008fa0: 08009928 .word 0x08009928
08008fa4 <__retarget_lock_acquire_recursive>:
8008fa4: 4770 bx lr
08008fa6 <__retarget_lock_release_recursive>:
8008fa6: 4770 bx lr
08008fa8 <_free_r>:
8008fa8: b538 push {r3, r4, r5, lr}
8008faa: 4605 mov r5, r0
8008fac: 2900 cmp r1, #0
8008fae: d040 beq.n 8009032 <_free_r+0x8a>
8008fb0: f851 3c04 ldr.w r3, [r1, #-4]
8008fb4: 1f0c subs r4, r1, #4
8008fb6: 2b00 cmp r3, #0
8008fb8: bfb8 it lt
8008fba: 18e4 addlt r4, r4, r3
8008fbc: f000 f8de bl 800917c <__malloc_lock>
8008fc0: 4a1c ldr r2, [pc, #112] @ (8009034 <_free_r+0x8c>)
8008fc2: 6813 ldr r3, [r2, #0]
8008fc4: b933 cbnz r3, 8008fd4 <_free_r+0x2c>
8008fc6: 6063 str r3, [r4, #4]
8008fc8: 6014 str r4, [r2, #0]
8008fca: 4628 mov r0, r5
8008fcc: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
8008fd0: f000 b8da b.w 8009188 <__malloc_unlock>
8008fd4: 42a3 cmp r3, r4
8008fd6: d908 bls.n 8008fea <_free_r+0x42>
8008fd8: 6820 ldr r0, [r4, #0]
8008fda: 1821 adds r1, r4, r0
8008fdc: 428b cmp r3, r1
8008fde: bf01 itttt eq
8008fe0: 6819 ldreq r1, [r3, #0]
8008fe2: 685b ldreq r3, [r3, #4]
8008fe4: 1809 addeq r1, r1, r0
8008fe6: 6021 streq r1, [r4, #0]
8008fe8: e7ed b.n 8008fc6 <_free_r+0x1e>
8008fea: 461a mov r2, r3
8008fec: 685b ldr r3, [r3, #4]
8008fee: b10b cbz r3, 8008ff4 <_free_r+0x4c>
8008ff0: 42a3 cmp r3, r4
8008ff2: d9fa bls.n 8008fea <_free_r+0x42>
8008ff4: 6811 ldr r1, [r2, #0]
8008ff6: 1850 adds r0, r2, r1
8008ff8: 42a0 cmp r0, r4
8008ffa: d10b bne.n 8009014 <_free_r+0x6c>
8008ffc: 6820 ldr r0, [r4, #0]
8008ffe: 4401 add r1, r0
8009000: 1850 adds r0, r2, r1
8009002: 4283 cmp r3, r0
8009004: 6011 str r1, [r2, #0]
8009006: d1e0 bne.n 8008fca <_free_r+0x22>
8009008: 6818 ldr r0, [r3, #0]
800900a: 685b ldr r3, [r3, #4]
800900c: 4408 add r0, r1
800900e: 6010 str r0, [r2, #0]
8009010: 6053 str r3, [r2, #4]
8009012: e7da b.n 8008fca <_free_r+0x22>
8009014: d902 bls.n 800901c <_free_r+0x74>
8009016: 230c movs r3, #12
8009018: 602b str r3, [r5, #0]
800901a: e7d6 b.n 8008fca <_free_r+0x22>
800901c: 6820 ldr r0, [r4, #0]
800901e: 1821 adds r1, r4, r0
8009020: 428b cmp r3, r1
8009022: bf01 itttt eq
8009024: 6819 ldreq r1, [r3, #0]
8009026: 685b ldreq r3, [r3, #4]
8009028: 1809 addeq r1, r1, r0
800902a: 6021 streq r1, [r4, #0]
800902c: 6063 str r3, [r4, #4]
800902e: 6054 str r4, [r2, #4]
8009030: e7cb b.n 8008fca <_free_r+0x22>
8009032: bd38 pop {r3, r4, r5, pc}
8009034: 2000174c .word 0x2000174c
08009038 <sbrk_aligned>:
8009038: b570 push {r4, r5, r6, lr}
800903a: 4e0f ldr r6, [pc, #60] @ (8009078 <sbrk_aligned+0x40>)
800903c: 460c mov r4, r1
800903e: 6831 ldr r1, [r6, #0]
8009040: 4605 mov r5, r0
8009042: b911 cbnz r1, 800904a <sbrk_aligned+0x12>
8009044: f000 fba8 bl 8009798 <_sbrk_r>
8009048: 6030 str r0, [r6, #0]
800904a: 4621 mov r1, r4
800904c: 4628 mov r0, r5
800904e: f000 fba3 bl 8009798 <_sbrk_r>
8009052: 1c43 adds r3, r0, #1
8009054: d103 bne.n 800905e <sbrk_aligned+0x26>
8009056: f04f 34ff mov.w r4, #4294967295
800905a: 4620 mov r0, r4
800905c: bd70 pop {r4, r5, r6, pc}
800905e: 1cc4 adds r4, r0, #3
8009060: f024 0403 bic.w r4, r4, #3
8009064: 42a0 cmp r0, r4
8009066: d0f8 beq.n 800905a <sbrk_aligned+0x22>
8009068: 1a21 subs r1, r4, r0
800906a: 4628 mov r0, r5
800906c: f000 fb94 bl 8009798 <_sbrk_r>
8009070: 3001 adds r0, #1
8009072: d1f2 bne.n 800905a <sbrk_aligned+0x22>
8009074: e7ef b.n 8009056 <sbrk_aligned+0x1e>
8009076: bf00 nop
8009078: 20001748 .word 0x20001748
0800907c <_malloc_r>:
800907c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
8009080: 1ccd adds r5, r1, #3
8009082: f025 0503 bic.w r5, r5, #3
8009086: 3508 adds r5, #8
8009088: 2d0c cmp r5, #12
800908a: bf38 it cc
800908c: 250c movcc r5, #12
800908e: 2d00 cmp r5, #0
8009090: 4606 mov r6, r0
8009092: db01 blt.n 8009098 <_malloc_r+0x1c>
8009094: 42a9 cmp r1, r5
8009096: d904 bls.n 80090a2 <_malloc_r+0x26>
8009098: 230c movs r3, #12
800909a: 6033 str r3, [r6, #0]
800909c: 2000 movs r0, #0
800909e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
80090a2: f8df 80d4 ldr.w r8, [pc, #212] @ 8009178 <_malloc_r+0xfc>
80090a6: f000 f869 bl 800917c <__malloc_lock>
80090aa: f8d8 3000 ldr.w r3, [r8]
80090ae: 461c mov r4, r3
80090b0: bb44 cbnz r4, 8009104 <_malloc_r+0x88>
80090b2: 4629 mov r1, r5
80090b4: 4630 mov r0, r6
80090b6: f7ff ffbf bl 8009038 <sbrk_aligned>
80090ba: 1c43 adds r3, r0, #1
80090bc: 4604 mov r4, r0
80090be: d158 bne.n 8009172 <_malloc_r+0xf6>
80090c0: f8d8 4000 ldr.w r4, [r8]
80090c4: 4627 mov r7, r4
80090c6: 2f00 cmp r7, #0
80090c8: d143 bne.n 8009152 <_malloc_r+0xd6>
80090ca: 2c00 cmp r4, #0
80090cc: d04b beq.n 8009166 <_malloc_r+0xea>
80090ce: 6823 ldr r3, [r4, #0]
80090d0: 4639 mov r1, r7
80090d2: 4630 mov r0, r6
80090d4: eb04 0903 add.w r9, r4, r3
80090d8: f000 fb5e bl 8009798 <_sbrk_r>
80090dc: 4581 cmp r9, r0
80090de: d142 bne.n 8009166 <_malloc_r+0xea>
80090e0: 6821 ldr r1, [r4, #0]
80090e2: 4630 mov r0, r6
80090e4: 1a6d subs r5, r5, r1
80090e6: 4629 mov r1, r5
80090e8: f7ff ffa6 bl 8009038 <sbrk_aligned>
80090ec: 3001 adds r0, #1
80090ee: d03a beq.n 8009166 <_malloc_r+0xea>
80090f0: 6823 ldr r3, [r4, #0]
80090f2: 442b add r3, r5
80090f4: 6023 str r3, [r4, #0]
80090f6: f8d8 3000 ldr.w r3, [r8]
80090fa: 685a ldr r2, [r3, #4]
80090fc: bb62 cbnz r2, 8009158 <_malloc_r+0xdc>
80090fe: f8c8 7000 str.w r7, [r8]
8009102: e00f b.n 8009124 <_malloc_r+0xa8>
8009104: 6822 ldr r2, [r4, #0]
8009106: 1b52 subs r2, r2, r5
8009108: d420 bmi.n 800914c <_malloc_r+0xd0>
800910a: 2a0b cmp r2, #11
800910c: d917 bls.n 800913e <_malloc_r+0xc2>
800910e: 1961 adds r1, r4, r5
8009110: 42a3 cmp r3, r4
8009112: 6025 str r5, [r4, #0]
8009114: bf18 it ne
8009116: 6059 strne r1, [r3, #4]
8009118: 6863 ldr r3, [r4, #4]
800911a: bf08 it eq
800911c: f8c8 1000 streq.w r1, [r8]
8009120: 5162 str r2, [r4, r5]
8009122: 604b str r3, [r1, #4]
8009124: 4630 mov r0, r6
8009126: f000 f82f bl 8009188 <__malloc_unlock>
800912a: f104 000b add.w r0, r4, #11
800912e: 1d23 adds r3, r4, #4
8009130: f020 0007 bic.w r0, r0, #7
8009134: 1ac2 subs r2, r0, r3
8009136: bf1c itt ne
8009138: 1a1b subne r3, r3, r0
800913a: 50a3 strne r3, [r4, r2]
800913c: e7af b.n 800909e <_malloc_r+0x22>
800913e: 6862 ldr r2, [r4, #4]
8009140: 42a3 cmp r3, r4
8009142: bf0c ite eq
8009144: f8c8 2000 streq.w r2, [r8]
8009148: 605a strne r2, [r3, #4]
800914a: e7eb b.n 8009124 <_malloc_r+0xa8>
800914c: 4623 mov r3, r4
800914e: 6864 ldr r4, [r4, #4]
8009150: e7ae b.n 80090b0 <_malloc_r+0x34>
8009152: 463c mov r4, r7
8009154: 687f ldr r7, [r7, #4]
8009156: e7b6 b.n 80090c6 <_malloc_r+0x4a>
8009158: 461a mov r2, r3
800915a: 685b ldr r3, [r3, #4]
800915c: 42a3 cmp r3, r4
800915e: d1fb bne.n 8009158 <_malloc_r+0xdc>
8009160: 2300 movs r3, #0
8009162: 6053 str r3, [r2, #4]
8009164: e7de b.n 8009124 <_malloc_r+0xa8>
8009166: 230c movs r3, #12
8009168: 4630 mov r0, r6
800916a: 6033 str r3, [r6, #0]
800916c: f000 f80c bl 8009188 <__malloc_unlock>
8009170: e794 b.n 800909c <_malloc_r+0x20>
8009172: 6005 str r5, [r0, #0]
8009174: e7d6 b.n 8009124 <_malloc_r+0xa8>
8009176: bf00 nop
8009178: 2000174c .word 0x2000174c
0800917c <__malloc_lock>:
800917c: 4801 ldr r0, [pc, #4] @ (8009184 <__malloc_lock+0x8>)
800917e: f7ff bf11 b.w 8008fa4 <__retarget_lock_acquire_recursive>
8009182: bf00 nop
8009184: 20001744 .word 0x20001744
08009188 <__malloc_unlock>:
8009188: 4801 ldr r0, [pc, #4] @ (8009190 <__malloc_unlock+0x8>)
800918a: f7ff bf0c b.w 8008fa6 <__retarget_lock_release_recursive>
800918e: bf00 nop
8009190: 20001744 .word 0x20001744
08009194 <__ssputs_r>:
8009194: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
8009198: 461f mov r7, r3
800919a: 688e ldr r6, [r1, #8]
800919c: 4682 mov sl, r0
800919e: 42be cmp r6, r7
80091a0: 460c mov r4, r1
80091a2: 4690 mov r8, r2
80091a4: 680b ldr r3, [r1, #0]
80091a6: d82d bhi.n 8009204 <__ssputs_r+0x70>
80091a8: f9b1 200c ldrsh.w r2, [r1, #12]
80091ac: f412 6f90 tst.w r2, #1152 @ 0x480
80091b0: d026 beq.n 8009200 <__ssputs_r+0x6c>
80091b2: 6965 ldr r5, [r4, #20]
80091b4: 6909 ldr r1, [r1, #16]
80091b6: eb05 0545 add.w r5, r5, r5, lsl #1
80091ba: eba3 0901 sub.w r9, r3, r1
80091be: eb05 75d5 add.w r5, r5, r5, lsr #31
80091c2: 1c7b adds r3, r7, #1
80091c4: 444b add r3, r9
80091c6: 106d asrs r5, r5, #1
80091c8: 429d cmp r5, r3
80091ca: bf38 it cc
80091cc: 461d movcc r5, r3
80091ce: 0553 lsls r3, r2, #21
80091d0: d527 bpl.n 8009222 <__ssputs_r+0x8e>
80091d2: 4629 mov r1, r5
80091d4: f7ff ff52 bl 800907c <_malloc_r>
80091d8: 4606 mov r6, r0
80091da: b360 cbz r0, 8009236 <__ssputs_r+0xa2>
80091dc: 464a mov r2, r9
80091de: 6921 ldr r1, [r4, #16]
80091e0: f000 faf8 bl 80097d4 <memcpy>
80091e4: 89a3 ldrh r3, [r4, #12]
80091e6: f423 6390 bic.w r3, r3, #1152 @ 0x480
80091ea: f043 0380 orr.w r3, r3, #128 @ 0x80
80091ee: 81a3 strh r3, [r4, #12]
80091f0: 6126 str r6, [r4, #16]
80091f2: 444e add r6, r9
80091f4: 6026 str r6, [r4, #0]
80091f6: 463e mov r6, r7
80091f8: 6165 str r5, [r4, #20]
80091fa: eba5 0509 sub.w r5, r5, r9
80091fe: 60a5 str r5, [r4, #8]
8009200: 42be cmp r6, r7
8009202: d900 bls.n 8009206 <__ssputs_r+0x72>
8009204: 463e mov r6, r7
8009206: 4632 mov r2, r6
8009208: 4641 mov r1, r8
800920a: 6820 ldr r0, [r4, #0]
800920c: f000 faaa bl 8009764 <memmove>
8009210: 2000 movs r0, #0
8009212: 68a3 ldr r3, [r4, #8]
8009214: 1b9b subs r3, r3, r6
8009216: 60a3 str r3, [r4, #8]
8009218: 6823 ldr r3, [r4, #0]
800921a: 4433 add r3, r6
800921c: 6023 str r3, [r4, #0]
800921e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8009222: 462a mov r2, r5
8009224: f000 fae4 bl 80097f0 <_realloc_r>
8009228: 4606 mov r6, r0
800922a: 2800 cmp r0, #0
800922c: d1e0 bne.n 80091f0 <__ssputs_r+0x5c>
800922e: 4650 mov r0, sl
8009230: 6921 ldr r1, [r4, #16]
8009232: f7ff feb9 bl 8008fa8 <_free_r>
8009236: 230c movs r3, #12
8009238: f8ca 3000 str.w r3, [sl]
800923c: 89a3 ldrh r3, [r4, #12]
800923e: f04f 30ff mov.w r0, #4294967295
8009242: f043 0340 orr.w r3, r3, #64 @ 0x40
8009246: 81a3 strh r3, [r4, #12]
8009248: e7e9 b.n 800921e <__ssputs_r+0x8a>
...
0800924c <_svfiprintf_r>:
800924c: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8009250: 4698 mov r8, r3
8009252: 898b ldrh r3, [r1, #12]
8009254: 4607 mov r7, r0
8009256: 061b lsls r3, r3, #24
8009258: 460d mov r5, r1
800925a: 4614 mov r4, r2
800925c: b09d sub sp, #116 @ 0x74
800925e: d510 bpl.n 8009282 <_svfiprintf_r+0x36>
8009260: 690b ldr r3, [r1, #16]
8009262: b973 cbnz r3, 8009282 <_svfiprintf_r+0x36>
8009264: 2140 movs r1, #64 @ 0x40
8009266: f7ff ff09 bl 800907c <_malloc_r>
800926a: 6028 str r0, [r5, #0]
800926c: 6128 str r0, [r5, #16]
800926e: b930 cbnz r0, 800927e <_svfiprintf_r+0x32>
8009270: 230c movs r3, #12
8009272: 603b str r3, [r7, #0]
8009274: f04f 30ff mov.w r0, #4294967295
8009278: b01d add sp, #116 @ 0x74
800927a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800927e: 2340 movs r3, #64 @ 0x40
8009280: 616b str r3, [r5, #20]
8009282: 2300 movs r3, #0
8009284: 9309 str r3, [sp, #36] @ 0x24
8009286: 2320 movs r3, #32
8009288: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800928c: 2330 movs r3, #48 @ 0x30
800928e: f04f 0901 mov.w r9, #1
8009292: f8cd 800c str.w r8, [sp, #12]
8009296: f8df 8198 ldr.w r8, [pc, #408] @ 8009430 <_svfiprintf_r+0x1e4>
800929a: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800929e: 4623 mov r3, r4
80092a0: 469a mov sl, r3
80092a2: f813 2b01 ldrb.w r2, [r3], #1
80092a6: b10a cbz r2, 80092ac <_svfiprintf_r+0x60>
80092a8: 2a25 cmp r2, #37 @ 0x25
80092aa: d1f9 bne.n 80092a0 <_svfiprintf_r+0x54>
80092ac: ebba 0b04 subs.w fp, sl, r4
80092b0: d00b beq.n 80092ca <_svfiprintf_r+0x7e>
80092b2: 465b mov r3, fp
80092b4: 4622 mov r2, r4
80092b6: 4629 mov r1, r5
80092b8: 4638 mov r0, r7
80092ba: f7ff ff6b bl 8009194 <__ssputs_r>
80092be: 3001 adds r0, #1
80092c0: f000 80a7 beq.w 8009412 <_svfiprintf_r+0x1c6>
80092c4: 9a09 ldr r2, [sp, #36] @ 0x24
80092c6: 445a add r2, fp
80092c8: 9209 str r2, [sp, #36] @ 0x24
80092ca: f89a 3000 ldrb.w r3, [sl]
80092ce: 2b00 cmp r3, #0
80092d0: f000 809f beq.w 8009412 <_svfiprintf_r+0x1c6>
80092d4: 2300 movs r3, #0
80092d6: f04f 32ff mov.w r2, #4294967295
80092da: e9cd 2305 strd r2, r3, [sp, #20]
80092de: f10a 0a01 add.w sl, sl, #1
80092e2: 9304 str r3, [sp, #16]
80092e4: 9307 str r3, [sp, #28]
80092e6: f88d 3053 strb.w r3, [sp, #83] @ 0x53
80092ea: 931a str r3, [sp, #104] @ 0x68
80092ec: 4654 mov r4, sl
80092ee: 2205 movs r2, #5
80092f0: f814 1b01 ldrb.w r1, [r4], #1
80092f4: 484e ldr r0, [pc, #312] @ (8009430 <_svfiprintf_r+0x1e4>)
80092f6: f000 fa5f bl 80097b8 <memchr>
80092fa: 9a04 ldr r2, [sp, #16]
80092fc: b9d8 cbnz r0, 8009336 <_svfiprintf_r+0xea>
80092fe: 06d0 lsls r0, r2, #27
8009300: bf44 itt mi
8009302: 2320 movmi r3, #32
8009304: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
8009308: 0711 lsls r1, r2, #28
800930a: bf44 itt mi
800930c: 232b movmi r3, #43 @ 0x2b
800930e: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
8009312: f89a 3000 ldrb.w r3, [sl]
8009316: 2b2a cmp r3, #42 @ 0x2a
8009318: d015 beq.n 8009346 <_svfiprintf_r+0xfa>
800931a: 4654 mov r4, sl
800931c: 2000 movs r0, #0
800931e: f04f 0c0a mov.w ip, #10
8009322: 9a07 ldr r2, [sp, #28]
8009324: 4621 mov r1, r4
8009326: f811 3b01 ldrb.w r3, [r1], #1
800932a: 3b30 subs r3, #48 @ 0x30
800932c: 2b09 cmp r3, #9
800932e: d94b bls.n 80093c8 <_svfiprintf_r+0x17c>
8009330: b1b0 cbz r0, 8009360 <_svfiprintf_r+0x114>
8009332: 9207 str r2, [sp, #28]
8009334: e014 b.n 8009360 <_svfiprintf_r+0x114>
8009336: eba0 0308 sub.w r3, r0, r8
800933a: fa09 f303 lsl.w r3, r9, r3
800933e: 4313 orrs r3, r2
8009340: 46a2 mov sl, r4
8009342: 9304 str r3, [sp, #16]
8009344: e7d2 b.n 80092ec <_svfiprintf_r+0xa0>
8009346: 9b03 ldr r3, [sp, #12]
8009348: 1d19 adds r1, r3, #4
800934a: 681b ldr r3, [r3, #0]
800934c: 9103 str r1, [sp, #12]
800934e: 2b00 cmp r3, #0
8009350: bfbb ittet lt
8009352: 425b neglt r3, r3
8009354: f042 0202 orrlt.w r2, r2, #2
8009358: 9307 strge r3, [sp, #28]
800935a: 9307 strlt r3, [sp, #28]
800935c: bfb8 it lt
800935e: 9204 strlt r2, [sp, #16]
8009360: 7823 ldrb r3, [r4, #0]
8009362: 2b2e cmp r3, #46 @ 0x2e
8009364: d10a bne.n 800937c <_svfiprintf_r+0x130>
8009366: 7863 ldrb r3, [r4, #1]
8009368: 2b2a cmp r3, #42 @ 0x2a
800936a: d132 bne.n 80093d2 <_svfiprintf_r+0x186>
800936c: 9b03 ldr r3, [sp, #12]
800936e: 3402 adds r4, #2
8009370: 1d1a adds r2, r3, #4
8009372: 681b ldr r3, [r3, #0]
8009374: 9203 str r2, [sp, #12]
8009376: ea43 73e3 orr.w r3, r3, r3, asr #31
800937a: 9305 str r3, [sp, #20]
800937c: f8df a0b4 ldr.w sl, [pc, #180] @ 8009434 <_svfiprintf_r+0x1e8>
8009380: 2203 movs r2, #3
8009382: 4650 mov r0, sl
8009384: 7821 ldrb r1, [r4, #0]
8009386: f000 fa17 bl 80097b8 <memchr>
800938a: b138 cbz r0, 800939c <_svfiprintf_r+0x150>
800938c: 2240 movs r2, #64 @ 0x40
800938e: 9b04 ldr r3, [sp, #16]
8009390: eba0 000a sub.w r0, r0, sl
8009394: 4082 lsls r2, r0
8009396: 4313 orrs r3, r2
8009398: 3401 adds r4, #1
800939a: 9304 str r3, [sp, #16]
800939c: f814 1b01 ldrb.w r1, [r4], #1
80093a0: 2206 movs r2, #6
80093a2: 4825 ldr r0, [pc, #148] @ (8009438 <_svfiprintf_r+0x1ec>)
80093a4: f88d 1028 strb.w r1, [sp, #40] @ 0x28
80093a8: f000 fa06 bl 80097b8 <memchr>
80093ac: 2800 cmp r0, #0
80093ae: d036 beq.n 800941e <_svfiprintf_r+0x1d2>
80093b0: 4b22 ldr r3, [pc, #136] @ (800943c <_svfiprintf_r+0x1f0>)
80093b2: bb1b cbnz r3, 80093fc <_svfiprintf_r+0x1b0>
80093b4: 9b03 ldr r3, [sp, #12]
80093b6: 3307 adds r3, #7
80093b8: f023 0307 bic.w r3, r3, #7
80093bc: 3308 adds r3, #8
80093be: 9303 str r3, [sp, #12]
80093c0: 9b09 ldr r3, [sp, #36] @ 0x24
80093c2: 4433 add r3, r6
80093c4: 9309 str r3, [sp, #36] @ 0x24
80093c6: e76a b.n 800929e <_svfiprintf_r+0x52>
80093c8: 460c mov r4, r1
80093ca: 2001 movs r0, #1
80093cc: fb0c 3202 mla r2, ip, r2, r3
80093d0: e7a8 b.n 8009324 <_svfiprintf_r+0xd8>
80093d2: 2300 movs r3, #0
80093d4: f04f 0c0a mov.w ip, #10
80093d8: 4619 mov r1, r3
80093da: 3401 adds r4, #1
80093dc: 9305 str r3, [sp, #20]
80093de: 4620 mov r0, r4
80093e0: f810 2b01 ldrb.w r2, [r0], #1
80093e4: 3a30 subs r2, #48 @ 0x30
80093e6: 2a09 cmp r2, #9
80093e8: d903 bls.n 80093f2 <_svfiprintf_r+0x1a6>
80093ea: 2b00 cmp r3, #0
80093ec: d0c6 beq.n 800937c <_svfiprintf_r+0x130>
80093ee: 9105 str r1, [sp, #20]
80093f0: e7c4 b.n 800937c <_svfiprintf_r+0x130>
80093f2: 4604 mov r4, r0
80093f4: 2301 movs r3, #1
80093f6: fb0c 2101 mla r1, ip, r1, r2
80093fa: e7f0 b.n 80093de <_svfiprintf_r+0x192>
80093fc: ab03 add r3, sp, #12
80093fe: 9300 str r3, [sp, #0]
8009400: 462a mov r2, r5
8009402: 4638 mov r0, r7
8009404: 4b0e ldr r3, [pc, #56] @ (8009440 <_svfiprintf_r+0x1f4>)
8009406: a904 add r1, sp, #16
8009408: f3af 8000 nop.w
800940c: 1c42 adds r2, r0, #1
800940e: 4606 mov r6, r0
8009410: d1d6 bne.n 80093c0 <_svfiprintf_r+0x174>
8009412: 89ab ldrh r3, [r5, #12]
8009414: 065b lsls r3, r3, #25
8009416: f53f af2d bmi.w 8009274 <_svfiprintf_r+0x28>
800941a: 9809 ldr r0, [sp, #36] @ 0x24
800941c: e72c b.n 8009278 <_svfiprintf_r+0x2c>
800941e: ab03 add r3, sp, #12
8009420: 9300 str r3, [sp, #0]
8009422: 462a mov r2, r5
8009424: 4638 mov r0, r7
8009426: 4b06 ldr r3, [pc, #24] @ (8009440 <_svfiprintf_r+0x1f4>)
8009428: a904 add r1, sp, #16
800942a: f000 f87d bl 8009528 <_printf_i>
800942e: e7ed b.n 800940c <_svfiprintf_r+0x1c0>
8009430: 080098ee .word 0x080098ee
8009434: 080098f4 .word 0x080098f4
8009438: 080098f8 .word 0x080098f8
800943c: 00000000 .word 0x00000000
8009440: 08009195 .word 0x08009195
08009444 <_printf_common>:
8009444: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
8009448: 4616 mov r6, r2
800944a: 4698 mov r8, r3
800944c: 688a ldr r2, [r1, #8]
800944e: 690b ldr r3, [r1, #16]
8009450: 4607 mov r7, r0
8009452: 4293 cmp r3, r2
8009454: bfb8 it lt
8009456: 4613 movlt r3, r2
8009458: 6033 str r3, [r6, #0]
800945a: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800945e: 460c mov r4, r1
8009460: f8dd 9020 ldr.w r9, [sp, #32]
8009464: b10a cbz r2, 800946a <_printf_common+0x26>
8009466: 3301 adds r3, #1
8009468: 6033 str r3, [r6, #0]
800946a: 6823 ldr r3, [r4, #0]
800946c: 0699 lsls r1, r3, #26
800946e: bf42 ittt mi
8009470: 6833 ldrmi r3, [r6, #0]
8009472: 3302 addmi r3, #2
8009474: 6033 strmi r3, [r6, #0]
8009476: 6825 ldr r5, [r4, #0]
8009478: f015 0506 ands.w r5, r5, #6
800947c: d106 bne.n 800948c <_printf_common+0x48>
800947e: f104 0a19 add.w sl, r4, #25
8009482: 68e3 ldr r3, [r4, #12]
8009484: 6832 ldr r2, [r6, #0]
8009486: 1a9b subs r3, r3, r2
8009488: 42ab cmp r3, r5
800948a: dc2b bgt.n 80094e4 <_printf_common+0xa0>
800948c: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
8009490: 6822 ldr r2, [r4, #0]
8009492: 3b00 subs r3, #0
8009494: bf18 it ne
8009496: 2301 movne r3, #1
8009498: 0692 lsls r2, r2, #26
800949a: d430 bmi.n 80094fe <_printf_common+0xba>
800949c: 4641 mov r1, r8
800949e: 4638 mov r0, r7
80094a0: f104 0243 add.w r2, r4, #67 @ 0x43
80094a4: 47c8 blx r9
80094a6: 3001 adds r0, #1
80094a8: d023 beq.n 80094f2 <_printf_common+0xae>
80094aa: 6823 ldr r3, [r4, #0]
80094ac: 6922 ldr r2, [r4, #16]
80094ae: f003 0306 and.w r3, r3, #6
80094b2: 2b04 cmp r3, #4
80094b4: bf14 ite ne
80094b6: 2500 movne r5, #0
80094b8: 6833 ldreq r3, [r6, #0]
80094ba: f04f 0600 mov.w r6, #0
80094be: bf08 it eq
80094c0: 68e5 ldreq r5, [r4, #12]
80094c2: f104 041a add.w r4, r4, #26
80094c6: bf08 it eq
80094c8: 1aed subeq r5, r5, r3
80094ca: f854 3c12 ldr.w r3, [r4, #-18]
80094ce: bf08 it eq
80094d0: ea25 75e5 biceq.w r5, r5, r5, asr #31
80094d4: 4293 cmp r3, r2
80094d6: bfc4 itt gt
80094d8: 1a9b subgt r3, r3, r2
80094da: 18ed addgt r5, r5, r3
80094dc: 42b5 cmp r5, r6
80094de: d11a bne.n 8009516 <_printf_common+0xd2>
80094e0: 2000 movs r0, #0
80094e2: e008 b.n 80094f6 <_printf_common+0xb2>
80094e4: 2301 movs r3, #1
80094e6: 4652 mov r2, sl
80094e8: 4641 mov r1, r8
80094ea: 4638 mov r0, r7
80094ec: 47c8 blx r9
80094ee: 3001 adds r0, #1
80094f0: d103 bne.n 80094fa <_printf_common+0xb6>
80094f2: f04f 30ff mov.w r0, #4294967295
80094f6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
80094fa: 3501 adds r5, #1
80094fc: e7c1 b.n 8009482 <_printf_common+0x3e>
80094fe: 2030 movs r0, #48 @ 0x30
8009500: 18e1 adds r1, r4, r3
8009502: f881 0043 strb.w r0, [r1, #67] @ 0x43
8009506: 1c5a adds r2, r3, #1
8009508: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800950c: 4422 add r2, r4
800950e: 3302 adds r3, #2
8009510: f882 1043 strb.w r1, [r2, #67] @ 0x43
8009514: e7c2 b.n 800949c <_printf_common+0x58>
8009516: 2301 movs r3, #1
8009518: 4622 mov r2, r4
800951a: 4641 mov r1, r8
800951c: 4638 mov r0, r7
800951e: 47c8 blx r9
8009520: 3001 adds r0, #1
8009522: d0e6 beq.n 80094f2 <_printf_common+0xae>
8009524: 3601 adds r6, #1
8009526: e7d9 b.n 80094dc <_printf_common+0x98>
08009528 <_printf_i>:
8009528: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800952c: 7e0f ldrb r7, [r1, #24]
800952e: 4691 mov r9, r2
8009530: 2f78 cmp r7, #120 @ 0x78
8009532: 4680 mov r8, r0
8009534: 460c mov r4, r1
8009536: 469a mov sl, r3
8009538: 9e0c ldr r6, [sp, #48] @ 0x30
800953a: f101 0243 add.w r2, r1, #67 @ 0x43
800953e: d807 bhi.n 8009550 <_printf_i+0x28>
8009540: 2f62 cmp r7, #98 @ 0x62
8009542: d80a bhi.n 800955a <_printf_i+0x32>
8009544: 2f00 cmp r7, #0
8009546: f000 80d1 beq.w 80096ec <_printf_i+0x1c4>
800954a: 2f58 cmp r7, #88 @ 0x58
800954c: f000 80b8 beq.w 80096c0 <_printf_i+0x198>
8009550: f104 0642 add.w r6, r4, #66 @ 0x42
8009554: f884 7042 strb.w r7, [r4, #66] @ 0x42
8009558: e03a b.n 80095d0 <_printf_i+0xa8>
800955a: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800955e: 2b15 cmp r3, #21
8009560: d8f6 bhi.n 8009550 <_printf_i+0x28>
8009562: a101 add r1, pc, #4 @ (adr r1, 8009568 <_printf_i+0x40>)
8009564: f851 f023 ldr.w pc, [r1, r3, lsl #2]
8009568: 080095c1 .word 0x080095c1
800956c: 080095d5 .word 0x080095d5
8009570: 08009551 .word 0x08009551
8009574: 08009551 .word 0x08009551
8009578: 08009551 .word 0x08009551
800957c: 08009551 .word 0x08009551
8009580: 080095d5 .word 0x080095d5
8009584: 08009551 .word 0x08009551
8009588: 08009551 .word 0x08009551
800958c: 08009551 .word 0x08009551
8009590: 08009551 .word 0x08009551
8009594: 080096d3 .word 0x080096d3
8009598: 080095ff .word 0x080095ff
800959c: 0800968d .word 0x0800968d
80095a0: 08009551 .word 0x08009551
80095a4: 08009551 .word 0x08009551
80095a8: 080096f5 .word 0x080096f5
80095ac: 08009551 .word 0x08009551
80095b0: 080095ff .word 0x080095ff
80095b4: 08009551 .word 0x08009551
80095b8: 08009551 .word 0x08009551
80095bc: 08009695 .word 0x08009695
80095c0: 6833 ldr r3, [r6, #0]
80095c2: 1d1a adds r2, r3, #4
80095c4: 681b ldr r3, [r3, #0]
80095c6: 6032 str r2, [r6, #0]
80095c8: f104 0642 add.w r6, r4, #66 @ 0x42
80095cc: f884 3042 strb.w r3, [r4, #66] @ 0x42
80095d0: 2301 movs r3, #1
80095d2: e09c b.n 800970e <_printf_i+0x1e6>
80095d4: 6833 ldr r3, [r6, #0]
80095d6: 6820 ldr r0, [r4, #0]
80095d8: 1d19 adds r1, r3, #4
80095da: 6031 str r1, [r6, #0]
80095dc: 0606 lsls r6, r0, #24
80095de: d501 bpl.n 80095e4 <_printf_i+0xbc>
80095e0: 681d ldr r5, [r3, #0]
80095e2: e003 b.n 80095ec <_printf_i+0xc4>
80095e4: 0645 lsls r5, r0, #25
80095e6: d5fb bpl.n 80095e0 <_printf_i+0xb8>
80095e8: f9b3 5000 ldrsh.w r5, [r3]
80095ec: 2d00 cmp r5, #0
80095ee: da03 bge.n 80095f8 <_printf_i+0xd0>
80095f0: 232d movs r3, #45 @ 0x2d
80095f2: 426d negs r5, r5
80095f4: f884 3043 strb.w r3, [r4, #67] @ 0x43
80095f8: 230a movs r3, #10
80095fa: 4858 ldr r0, [pc, #352] @ (800975c <_printf_i+0x234>)
80095fc: e011 b.n 8009622 <_printf_i+0xfa>
80095fe: 6821 ldr r1, [r4, #0]
8009600: 6833 ldr r3, [r6, #0]
8009602: 0608 lsls r0, r1, #24
8009604: f853 5b04 ldr.w r5, [r3], #4
8009608: d402 bmi.n 8009610 <_printf_i+0xe8>
800960a: 0649 lsls r1, r1, #25
800960c: bf48 it mi
800960e: b2ad uxthmi r5, r5
8009610: 2f6f cmp r7, #111 @ 0x6f
8009612: 6033 str r3, [r6, #0]
8009614: bf14 ite ne
8009616: 230a movne r3, #10
8009618: 2308 moveq r3, #8
800961a: 4850 ldr r0, [pc, #320] @ (800975c <_printf_i+0x234>)
800961c: 2100 movs r1, #0
800961e: f884 1043 strb.w r1, [r4, #67] @ 0x43
8009622: 6866 ldr r6, [r4, #4]
8009624: 2e00 cmp r6, #0
8009626: 60a6 str r6, [r4, #8]
8009628: db05 blt.n 8009636 <_printf_i+0x10e>
800962a: 6821 ldr r1, [r4, #0]
800962c: 432e orrs r6, r5
800962e: f021 0104 bic.w r1, r1, #4
8009632: 6021 str r1, [r4, #0]
8009634: d04b beq.n 80096ce <_printf_i+0x1a6>
8009636: 4616 mov r6, r2
8009638: fbb5 f1f3 udiv r1, r5, r3
800963c: fb03 5711 mls r7, r3, r1, r5
8009640: 5dc7 ldrb r7, [r0, r7]
8009642: f806 7d01 strb.w r7, [r6, #-1]!
8009646: 462f mov r7, r5
8009648: 42bb cmp r3, r7
800964a: 460d mov r5, r1
800964c: d9f4 bls.n 8009638 <_printf_i+0x110>
800964e: 2b08 cmp r3, #8
8009650: d10b bne.n 800966a <_printf_i+0x142>
8009652: 6823 ldr r3, [r4, #0]
8009654: 07df lsls r7, r3, #31
8009656: d508 bpl.n 800966a <_printf_i+0x142>
8009658: 6923 ldr r3, [r4, #16]
800965a: 6861 ldr r1, [r4, #4]
800965c: 4299 cmp r1, r3
800965e: bfde ittt le
8009660: 2330 movle r3, #48 @ 0x30
8009662: f806 3c01 strble.w r3, [r6, #-1]
8009666: f106 36ff addle.w r6, r6, #4294967295
800966a: 1b92 subs r2, r2, r6
800966c: 6122 str r2, [r4, #16]
800966e: 464b mov r3, r9
8009670: 4621 mov r1, r4
8009672: 4640 mov r0, r8
8009674: f8cd a000 str.w sl, [sp]
8009678: aa03 add r2, sp, #12
800967a: f7ff fee3 bl 8009444 <_printf_common>
800967e: 3001 adds r0, #1
8009680: d14a bne.n 8009718 <_printf_i+0x1f0>
8009682: f04f 30ff mov.w r0, #4294967295
8009686: b004 add sp, #16
8009688: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800968c: 6823 ldr r3, [r4, #0]
800968e: f043 0320 orr.w r3, r3, #32
8009692: 6023 str r3, [r4, #0]
8009694: 2778 movs r7, #120 @ 0x78
8009696: 4832 ldr r0, [pc, #200] @ (8009760 <_printf_i+0x238>)
8009698: f884 7045 strb.w r7, [r4, #69] @ 0x45
800969c: 6823 ldr r3, [r4, #0]
800969e: 6831 ldr r1, [r6, #0]
80096a0: 061f lsls r7, r3, #24
80096a2: f851 5b04 ldr.w r5, [r1], #4
80096a6: d402 bmi.n 80096ae <_printf_i+0x186>
80096a8: 065f lsls r7, r3, #25
80096aa: bf48 it mi
80096ac: b2ad uxthmi r5, r5
80096ae: 6031 str r1, [r6, #0]
80096b0: 07d9 lsls r1, r3, #31
80096b2: bf44 itt mi
80096b4: f043 0320 orrmi.w r3, r3, #32
80096b8: 6023 strmi r3, [r4, #0]
80096ba: b11d cbz r5, 80096c4 <_printf_i+0x19c>
80096bc: 2310 movs r3, #16
80096be: e7ad b.n 800961c <_printf_i+0xf4>
80096c0: 4826 ldr r0, [pc, #152] @ (800975c <_printf_i+0x234>)
80096c2: e7e9 b.n 8009698 <_printf_i+0x170>
80096c4: 6823 ldr r3, [r4, #0]
80096c6: f023 0320 bic.w r3, r3, #32
80096ca: 6023 str r3, [r4, #0]
80096cc: e7f6 b.n 80096bc <_printf_i+0x194>
80096ce: 4616 mov r6, r2
80096d0: e7bd b.n 800964e <_printf_i+0x126>
80096d2: 6833 ldr r3, [r6, #0]
80096d4: 6825 ldr r5, [r4, #0]
80096d6: 1d18 adds r0, r3, #4
80096d8: 6961 ldr r1, [r4, #20]
80096da: 6030 str r0, [r6, #0]
80096dc: 062e lsls r6, r5, #24
80096de: 681b ldr r3, [r3, #0]
80096e0: d501 bpl.n 80096e6 <_printf_i+0x1be>
80096e2: 6019 str r1, [r3, #0]
80096e4: e002 b.n 80096ec <_printf_i+0x1c4>
80096e6: 0668 lsls r0, r5, #25
80096e8: d5fb bpl.n 80096e2 <_printf_i+0x1ba>
80096ea: 8019 strh r1, [r3, #0]
80096ec: 2300 movs r3, #0
80096ee: 4616 mov r6, r2
80096f0: 6123 str r3, [r4, #16]
80096f2: e7bc b.n 800966e <_printf_i+0x146>
80096f4: 6833 ldr r3, [r6, #0]
80096f6: 2100 movs r1, #0
80096f8: 1d1a adds r2, r3, #4
80096fa: 6032 str r2, [r6, #0]
80096fc: 681e ldr r6, [r3, #0]
80096fe: 6862 ldr r2, [r4, #4]
8009700: 4630 mov r0, r6
8009702: f000 f859 bl 80097b8 <memchr>
8009706: b108 cbz r0, 800970c <_printf_i+0x1e4>
8009708: 1b80 subs r0, r0, r6
800970a: 6060 str r0, [r4, #4]
800970c: 6863 ldr r3, [r4, #4]
800970e: 6123 str r3, [r4, #16]
8009710: 2300 movs r3, #0
8009712: f884 3043 strb.w r3, [r4, #67] @ 0x43
8009716: e7aa b.n 800966e <_printf_i+0x146>
8009718: 4632 mov r2, r6
800971a: 4649 mov r1, r9
800971c: 4640 mov r0, r8
800971e: 6923 ldr r3, [r4, #16]
8009720: 47d0 blx sl
8009722: 3001 adds r0, #1
8009724: d0ad beq.n 8009682 <_printf_i+0x15a>
8009726: 6823 ldr r3, [r4, #0]
8009728: 079b lsls r3, r3, #30
800972a: d413 bmi.n 8009754 <_printf_i+0x22c>
800972c: 68e0 ldr r0, [r4, #12]
800972e: 9b03 ldr r3, [sp, #12]
8009730: 4298 cmp r0, r3
8009732: bfb8 it lt
8009734: 4618 movlt r0, r3
8009736: e7a6 b.n 8009686 <_printf_i+0x15e>
8009738: 2301 movs r3, #1
800973a: 4632 mov r2, r6
800973c: 4649 mov r1, r9
800973e: 4640 mov r0, r8
8009740: 47d0 blx sl
8009742: 3001 adds r0, #1
8009744: d09d beq.n 8009682 <_printf_i+0x15a>
8009746: 3501 adds r5, #1
8009748: 68e3 ldr r3, [r4, #12]
800974a: 9903 ldr r1, [sp, #12]
800974c: 1a5b subs r3, r3, r1
800974e: 42ab cmp r3, r5
8009750: dcf2 bgt.n 8009738 <_printf_i+0x210>
8009752: e7eb b.n 800972c <_printf_i+0x204>
8009754: 2500 movs r5, #0
8009756: f104 0619 add.w r6, r4, #25
800975a: e7f5 b.n 8009748 <_printf_i+0x220>
800975c: 080098ff .word 0x080098ff
8009760: 08009910 .word 0x08009910
08009764 <memmove>:
8009764: 4288 cmp r0, r1
8009766: b510 push {r4, lr}
8009768: eb01 0402 add.w r4, r1, r2
800976c: d902 bls.n 8009774 <memmove+0x10>
800976e: 4284 cmp r4, r0
8009770: 4623 mov r3, r4
8009772: d807 bhi.n 8009784 <memmove+0x20>
8009774: 1e43 subs r3, r0, #1
8009776: 42a1 cmp r1, r4
8009778: d008 beq.n 800978c <memmove+0x28>
800977a: f811 2b01 ldrb.w r2, [r1], #1
800977e: f803 2f01 strb.w r2, [r3, #1]!
8009782: e7f8 b.n 8009776 <memmove+0x12>
8009784: 4601 mov r1, r0
8009786: 4402 add r2, r0
8009788: 428a cmp r2, r1
800978a: d100 bne.n 800978e <memmove+0x2a>
800978c: bd10 pop {r4, pc}
800978e: f813 4d01 ldrb.w r4, [r3, #-1]!
8009792: f802 4d01 strb.w r4, [r2, #-1]!
8009796: e7f7 b.n 8009788 <memmove+0x24>
08009798 <_sbrk_r>:
8009798: b538 push {r3, r4, r5, lr}
800979a: 2300 movs r3, #0
800979c: 4d05 ldr r5, [pc, #20] @ (80097b4 <_sbrk_r+0x1c>)
800979e: 4604 mov r4, r0
80097a0: 4608 mov r0, r1
80097a2: 602b str r3, [r5, #0]
80097a4: f7f7 fa8c bl 8000cc0 <_sbrk>
80097a8: 1c43 adds r3, r0, #1
80097aa: d102 bne.n 80097b2 <_sbrk_r+0x1a>
80097ac: 682b ldr r3, [r5, #0]
80097ae: b103 cbz r3, 80097b2 <_sbrk_r+0x1a>
80097b0: 6023 str r3, [r4, #0]
80097b2: bd38 pop {r3, r4, r5, pc}
80097b4: 20001740 .word 0x20001740
080097b8 <memchr>:
80097b8: 4603 mov r3, r0
80097ba: b510 push {r4, lr}
80097bc: b2c9 uxtb r1, r1
80097be: 4402 add r2, r0
80097c0: 4293 cmp r3, r2
80097c2: 4618 mov r0, r3
80097c4: d101 bne.n 80097ca <memchr+0x12>
80097c6: 2000 movs r0, #0
80097c8: e003 b.n 80097d2 <memchr+0x1a>
80097ca: 7804 ldrb r4, [r0, #0]
80097cc: 3301 adds r3, #1
80097ce: 428c cmp r4, r1
80097d0: d1f6 bne.n 80097c0 <memchr+0x8>
80097d2: bd10 pop {r4, pc}
080097d4 <memcpy>:
80097d4: 440a add r2, r1
80097d6: 4291 cmp r1, r2
80097d8: f100 33ff add.w r3, r0, #4294967295
80097dc: d100 bne.n 80097e0 <memcpy+0xc>
80097de: 4770 bx lr
80097e0: b510 push {r4, lr}
80097e2: f811 4b01 ldrb.w r4, [r1], #1
80097e6: 4291 cmp r1, r2
80097e8: f803 4f01 strb.w r4, [r3, #1]!
80097ec: d1f9 bne.n 80097e2 <memcpy+0xe>
80097ee: bd10 pop {r4, pc}
080097f0 <_realloc_r>:
80097f0: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
80097f4: 4607 mov r7, r0
80097f6: 4614 mov r4, r2
80097f8: 460d mov r5, r1
80097fa: b921 cbnz r1, 8009806 <_realloc_r+0x16>
80097fc: 4611 mov r1, r2
80097fe: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
8009802: f7ff bc3b b.w 800907c <_malloc_r>
8009806: b92a cbnz r2, 8009814 <_realloc_r+0x24>
8009808: f7ff fbce bl 8008fa8 <_free_r>
800980c: 4625 mov r5, r4
800980e: 4628 mov r0, r5
8009810: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
8009814: f000 f81a bl 800984c <_malloc_usable_size_r>
8009818: 4284 cmp r4, r0
800981a: 4606 mov r6, r0
800981c: d802 bhi.n 8009824 <_realloc_r+0x34>
800981e: ebb4 0f50 cmp.w r4, r0, lsr #1
8009822: d8f4 bhi.n 800980e <_realloc_r+0x1e>
8009824: 4621 mov r1, r4
8009826: 4638 mov r0, r7
8009828: f7ff fc28 bl 800907c <_malloc_r>
800982c: 4680 mov r8, r0
800982e: b908 cbnz r0, 8009834 <_realloc_r+0x44>
8009830: 4645 mov r5, r8
8009832: e7ec b.n 800980e <_realloc_r+0x1e>
8009834: 42b4 cmp r4, r6
8009836: 4622 mov r2, r4
8009838: 4629 mov r1, r5
800983a: bf28 it cs
800983c: 4632 movcs r2, r6
800983e: f7ff ffc9 bl 80097d4 <memcpy>
8009842: 4629 mov r1, r5
8009844: 4638 mov r0, r7
8009846: f7ff fbaf bl 8008fa8 <_free_r>
800984a: e7f1 b.n 8009830 <_realloc_r+0x40>
0800984c <_malloc_usable_size_r>:
800984c: f851 3c04 ldr.w r3, [r1, #-4]
8009850: 1f18 subs r0, r3, #4
8009852: 2b00 cmp r3, #0
8009854: bfbc itt lt
8009856: 580b ldrlt r3, [r1, r0]
8009858: 18c0 addlt r0, r0, r3
800985a: 4770 bx lr
0800985c <_init>:
800985c: b5f8 push {r3, r4, r5, r6, r7, lr}
800985e: bf00 nop
8009860: bcf8 pop {r3, r4, r5, r6, r7}
8009862: bc08 pop {r3}
8009864: 469e mov lr, r3
8009866: 4770 bx lr
08009868 <_fini>:
8009868: b5f8 push {r3, r4, r5, r6, r7, lr}
800986a: bf00 nop
800986c: bcf8 pop {r3, r4, r5, r6, r7}
800986e: bc08 pop {r3}
8009870: 469e mov lr, r3
8009872: 4770 bx lr
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