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687c222259793eaf2e72feeb4ff2e30de585b505
AUTOM/workspace/AUTOM10/th250t1s/AUTOM10.list
andrea 687c222259 wip
2026-06-16 01:12:52 +02:00

35962 lines
1.3 MiB
Raw Blame History

AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000ed10 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000007ec 0800ee1c 0800ee1c 0000fe1c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800f608 0800f608 000111dc 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800f608 0800f608 00010608 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800f610 0800f610 000111dc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800f610 0800f610 00010610 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800f614 0800f614 00010614 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001dc 20000000 0800f618 00011000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 000016c4 200001e0 0800f7f4 000111e0 2**3
ALLOC
10 ._user_heap_stack 00000604 200018a4 0800f7f4 000118a4 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 000111dc 2**0
CONTENTS, READONLY
12 .debug_info 0001a759 00000000 00000000 00011205 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00004a0b 00000000 00000000 0002b95e 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 000016b0 00000000 00000000 00030370 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00001168 00000000 00000000 00031a20 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001d2fe 00000000 00000000 00032b88 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001f1cb 00000000 00000000 0004fe86 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 00095eaa 00000000 00000000 0006f051 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 00104efb 2**0
CONTENTS, READONLY
20 .debug_frame 000061b8 00000000 00000000 00104f40 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000055 00000000 00000000 0010b0f8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001e0 .word 0x200001e0
8000128: 00000000 .word 0x00000000
800012c: 0800ee04 .word 0x0800ee04
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001e4 .word 0x200001e4
8000148: 0800ee04 .word 0x0800ee04
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <manageAdc>:
uint16_t ch5 ;
uint16_t ch6 ;
uint16_t ch7 ;
uint16_t ch8 ;
void manageAdc(void){
800015c: b480 push {r7}
800015e: af00 add r7, sp, #0
if (adc_avg_ready)
8000160: 4b12 ldr r3, [pc, #72] @ (80001ac <manageAdc+0x50>)
8000162: 781b ldrb r3, [r3, #0]
8000164: b2db uxtb r3, r3
8000166: 2b00 cmp r3, #0
8000168: d01b beq.n 80001a2 <manageAdc+0x46>
{
adc_avg_ready = 0;
800016a: 4b10 ldr r3, [pc, #64] @ (80001ac <manageAdc+0x50>)
800016c: 2200 movs r2, #0
800016e: 701a strb r2, [r3, #0]
// Read averaged channels (example mapping)
ch4 = adc_avg[0];
8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 <manageAdc+0x54>)
8000172: 881b ldrh r3, [r3, #0]
8000174: b29a uxth r2, r3
8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 <manageAdc+0x58>)
8000178: 801a strh r2, [r3, #0]
ch5 = adc_avg[1];
800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 <manageAdc+0x54>)
800017c: 885b ldrh r3, [r3, #2]
800017e: b29a uxth r2, r3
8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 <manageAdc+0x5c>)
8000182: 801a strh r2, [r3, #0]
ch6 = adc_avg[2];
8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 <manageAdc+0x54>)
8000186: 889b ldrh r3, [r3, #4]
8000188: b29a uxth r2, r3
800018a: 4b0c ldr r3, [pc, #48] @ (80001bc <manageAdc+0x60>)
800018c: 801a strh r2, [r3, #0]
ch7 = adc_avg[3];
800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 <manageAdc+0x54>)
8000190: 88db ldrh r3, [r3, #6]
8000192: b29a uxth r2, r3
8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 <manageAdc+0x64>)
8000196: 801a strh r2, [r3, #0]
ch8 = adc_avg[4];
8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 <manageAdc+0x54>)
800019a: 891b ldrh r3, [r3, #8]
800019c: b29a uxth r2, r3
800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 <manageAdc+0x68>)
80001a0: 801a strh r2, [r3, #0]
// Use them (convert to volts, control, etc.)
// float v4 = (3.3f * ch4) / 4095.0f;
}
}
80001a2: bf00 nop
80001a4: 46bd mov sp, r7
80001a6: bc80 pop {r7}
80001a8: 4770 bx lr
80001aa: bf00 nop
80001ac: 20000229 .word 0x20000229
80001b0: 20000208 .word 0x20000208
80001b4: 2000022a .word 0x2000022a
80001b8: 2000022c .word 0x2000022c
80001bc: 2000022e .word 0x2000022e
80001c0: 20000230 .word 0x20000230
80001c4: 20000232 .word 0x20000232
080001c8 <readAdc>:
void readAdc(void){
80001c8: b480 push {r7}
80001ca: b083 sub sp, #12
80001cc: af00 add r7, sp, #0
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001ce: 2300 movs r3, #0
80001d0: 71fb strb r3, [r7, #7]
80001d2: e010 b.n 80001f6 <readAdc+0x2e>
{
adc_sum[i] += adc_dma_buf[i];
80001d4: 79fb ldrb r3, [r7, #7]
80001d6: 4a21 ldr r2, [pc, #132] @ (800025c <readAdc+0x94>)
80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80001dc: b299 uxth r1, r3
80001de: 79fb ldrb r3, [r7, #7]
80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 <readAdc+0x98>)
80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2]
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 440a add r2, r1
80001ea: 491d ldr r1, [pc, #116] @ (8000260 <readAdc+0x98>)
80001ec: f841 2023 str.w r2, [r1, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001f0: 79fb ldrb r3, [r7, #7]
80001f2: 3301 adds r3, #1
80001f4: 71fb strb r3, [r7, #7]
80001f6: 79fb ldrb r3, [r7, #7]
80001f8: 2b04 cmp r3, #4
80001fa: d9eb bls.n 80001d4 <readAdc+0xc>
}
adc_sum_count++;
80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 <readAdc+0x9c>)
80001fe: 781b ldrb r3, [r3, #0]
8000200: 3301 adds r3, #1
8000202: b2da uxtb r2, r3
8000204: 4b17 ldr r3, [pc, #92] @ (8000264 <readAdc+0x9c>)
8000206: 701a strb r2, [r3, #0]
/* When we collected ADC_AVG_WINDOW samples → compute average */
if (adc_sum_count >= ADC_AVG_WINDOW)
8000208: 4b16 ldr r3, [pc, #88] @ (8000264 <readAdc+0x9c>)
800020a: 781b ldrb r3, [r3, #0]
800020c: 2b04 cmp r3, #4
800020e: d920 bls.n 8000252 <readAdc+0x8a>
{
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
8000210: 2300 movs r3, #0
8000212: 71bb strb r3, [r7, #6]
8000214: e014 b.n 8000240 <readAdc+0x78>
{
adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW);
8000216: 79bb ldrb r3, [r7, #6]
8000218: 4a11 ldr r2, [pc, #68] @ (8000260 <readAdc+0x98>)
800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800021e: 4a12 ldr r2, [pc, #72] @ (8000268 <readAdc+0xa0>)
8000220: fba2 2303 umull r2, r3, r2, r3
8000224: 089a lsrs r2, r3, #2
8000226: 79bb ldrb r3, [r7, #6]
8000228: b291 uxth r1, r2
800022a: 4a10 ldr r2, [pc, #64] @ (800026c <readAdc+0xa4>)
800022c: f822 1013 strh.w r1, [r2, r3, lsl #1]
adc_sum[i] = 0;
8000230: 79bb ldrb r3, [r7, #6]
8000232: 4a0b ldr r2, [pc, #44] @ (8000260 <readAdc+0x98>)
8000234: 2100 movs r1, #0
8000236: f842 1023 str.w r1, [r2, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
800023a: 79bb ldrb r3, [r7, #6]
800023c: 3301 adds r3, #1
800023e: 71bb strb r3, [r7, #6]
8000240: 79bb ldrb r3, [r7, #6]
8000242: 2b04 cmp r3, #4
8000244: d9e7 bls.n 8000216 <readAdc+0x4e>
}
adc_sum_count = 0;
8000246: 4b07 ldr r3, [pc, #28] @ (8000264 <readAdc+0x9c>)
8000248: 2200 movs r2, #0
800024a: 701a strb r2, [r3, #0]
adc_avg_ready = 1; // tell main loop new data is ready
800024c: 4b08 ldr r3, [pc, #32] @ (8000270 <readAdc+0xa8>)
800024e: 2201 movs r2, #1
8000250: 701a strb r2, [r3, #0]
}
}
8000252: bf00 nop
8000254: 370c adds r7, #12
8000256: 46bd mov sp, r7
8000258: bc80 pop {r7}
800025a: 4770 bx lr
800025c: 200001fc .word 0x200001fc
8000260: 20000214 .word 0x20000214
8000264: 20000228 .word 0x20000228
8000268: cccccccd .word 0xcccccccd
800026c: 20000208 .word 0x20000208
8000270: 20000229 .word 0x20000229
08000274 <EEW_Read>:
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
void loadEE(void);
void loadDefault(void);
/* Pseudo-array accessor EEW[idx] */
static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value)
{
8000274: b580 push {r7, lr}
8000276: b082 sub sp, #8
8000278: af00 add r7, sp, #0
800027a: 4603 mov r3, r0
800027c: 6039 str r1, [r7, #0]
800027e: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000280: 79fb ldrb r3, [r7, #7]
8000282: b29b uxth r3, r3
8000284: 3301 adds r3, #1
8000286: b29b uxth r3, r3
8000288: 6839 ldr r1, [r7, #0]
800028a: 4618 mov r0, r3
800028c: f001 f9e4 bl 8001658 <EE_ReadVariable>
8000290: 4603 mov r3, r0
}
8000292: 4618 mov r0, r3
8000294: 3708 adds r7, #8
8000296: 46bd mov sp, r7
8000298: bd80 pop {r7, pc}
0800029a <EEW_Write>:
static inline uint16_t EEW_Write(uint8_t idx, uint16_t value)
{
800029a: b580 push {r7, lr}
800029c: b082 sub sp, #8
800029e: af00 add r7, sp, #0
80002a0: 4603 mov r3, r0
80002a2: 460a mov r2, r1
80002a4: 71fb strb r3, [r7, #7]
80002a6: 4613 mov r3, r2
80002a8: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80002aa: 79fb ldrb r3, [r7, #7]
80002ac: b29b uxth r3, r3
80002ae: 3301 adds r3, #1
80002b0: b29b uxth r3, r3
80002b2: 88ba ldrh r2, [r7, #4]
80002b4: 4611 mov r1, r2
80002b6: 4618 mov r0, r3
80002b8: f001 f9ea bl 8001690 <EE_WriteVariable>
80002bc: 4603 mov r3, r0
}
80002be: 4618 mov r0, r3
80002c0: 3708 adds r7, #8
80002c2: 46bd mov sp, r7
80002c4: bd80 pop {r7, pc}
080002c6 <toHex>:
extern uint16_t tramp;
extern uint16_t tanem;
extern uint16_t thanem;
extern uint16_t trampman;
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80002c6: b490 push {r4, r7}
80002c8: b082 sub sp, #8
80002ca: af00 add r7, sp, #0
80002cc: 4604 mov r4, r0
80002ce: 4608 mov r0, r1
80002d0: 4611 mov r1, r2
80002d2: 461a mov r2, r3
80002d4: 4623 mov r3, r4
80002d6: 71fb strb r3, [r7, #7]
80002d8: 4603 mov r3, r0
80002da: 71bb strb r3, [r7, #6]
80002dc: 460b mov r3, r1
80002de: 717b strb r3, [r7, #5]
80002e0: 4613 mov r3, r2
80002e2: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80002e4: 79fb ldrb r3, [r7, #7]
80002e6: 2b2f cmp r3, #47 @ 0x2f
80002e8: d906 bls.n 80002f8 <toHex+0x32>
80002ea: 79fb ldrb r3, [r7, #7]
80002ec: 2b39 cmp r3, #57 @ 0x39
80002ee: d803 bhi.n 80002f8 <toHex+0x32>
c1-='0';
80002f0: 79fb ldrb r3, [r7, #7]
80002f2: 3b30 subs r3, #48 @ 0x30
80002f4: 71fb strb r3, [r7, #7]
80002f6: e00b b.n 8000310 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80002f8: 79fb ldrb r3, [r7, #7]
80002fa: 2b60 cmp r3, #96 @ 0x60
80002fc: d906 bls.n 800030c <toHex+0x46>
80002fe: 79fb ldrb r3, [r7, #7]
8000300: 2b66 cmp r3, #102 @ 0x66
8000302: d803 bhi.n 800030c <toHex+0x46>
c1=(c1-'a')+10;
8000304: 79fb ldrb r3, [r7, #7]
8000306: 3b57 subs r3, #87 @ 0x57
8000308: 71fb strb r3, [r7, #7]
800030a: e001 b.n 8000310 <toHex+0x4a>
}else return false;
800030c: 2300 movs r3, #0
800030e: e070 b.n 80003f2 <toHex+0x12c>
if((c2>='0')&&(c2<='9')){
8000310: 79bb ldrb r3, [r7, #6]
8000312: 2b2f cmp r3, #47 @ 0x2f
8000314: d906 bls.n 8000324 <toHex+0x5e>
8000316: 79bb ldrb r3, [r7, #6]
8000318: 2b39 cmp r3, #57 @ 0x39
800031a: d803 bhi.n 8000324 <toHex+0x5e>
c2-='0';
800031c: 79bb ldrb r3, [r7, #6]
800031e: 3b30 subs r3, #48 @ 0x30
8000320: 71bb strb r3, [r7, #6]
8000322: e00b b.n 800033c <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
8000324: 79bb ldrb r3, [r7, #6]
8000326: 2b60 cmp r3, #96 @ 0x60
8000328: d906 bls.n 8000338 <toHex+0x72>
800032a: 79bb ldrb r3, [r7, #6]
800032c: 2b66 cmp r3, #102 @ 0x66
800032e: d803 bhi.n 8000338 <toHex+0x72>
c2=(c2-'a')+10;
8000330: 79bb ldrb r3, [r7, #6]
8000332: 3b57 subs r3, #87 @ 0x57
8000334: 71bb strb r3, [r7, #6]
8000336: e001 b.n 800033c <toHex+0x76>
}else return false;
8000338: 2300 movs r3, #0
800033a: e05a b.n 80003f2 <toHex+0x12c>
if((c3>='0')&&(c3<='9')){
800033c: 797b ldrb r3, [r7, #5]
800033e: 2b2f cmp r3, #47 @ 0x2f
8000340: d906 bls.n 8000350 <toHex+0x8a>
8000342: 797b ldrb r3, [r7, #5]
8000344: 2b39 cmp r3, #57 @ 0x39
8000346: d803 bhi.n 8000350 <toHex+0x8a>
c3-='0';
8000348: 797b ldrb r3, [r7, #5]
800034a: 3b30 subs r3, #48 @ 0x30
800034c: 717b strb r3, [r7, #5]
800034e: e00b b.n 8000368 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000350: 797b ldrb r3, [r7, #5]
8000352: 2b60 cmp r3, #96 @ 0x60
8000354: d906 bls.n 8000364 <toHex+0x9e>
8000356: 797b ldrb r3, [r7, #5]
8000358: 2b66 cmp r3, #102 @ 0x66
800035a: d803 bhi.n 8000364 <toHex+0x9e>
c3=(c3-'a')+10;
800035c: 797b ldrb r3, [r7, #5]
800035e: 3b57 subs r3, #87 @ 0x57
8000360: 717b strb r3, [r7, #5]
8000362: e001 b.n 8000368 <toHex+0xa2>
}else return false;
8000364: 2300 movs r3, #0
8000366: e044 b.n 80003f2 <toHex+0x12c>
if((c4>='0')&&(c4<='9')){
8000368: 793b ldrb r3, [r7, #4]
800036a: 2b2f cmp r3, #47 @ 0x2f
800036c: d906 bls.n 800037c <toHex+0xb6>
800036e: 793b ldrb r3, [r7, #4]
8000370: 2b39 cmp r3, #57 @ 0x39
8000372: d803 bhi.n 800037c <toHex+0xb6>
c4-='0';
8000374: 793b ldrb r3, [r7, #4]
8000376: 3b30 subs r3, #48 @ 0x30
8000378: 713b strb r3, [r7, #4]
800037a: e00b b.n 8000394 <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
800037c: 793b ldrb r3, [r7, #4]
800037e: 2b60 cmp r3, #96 @ 0x60
8000380: d906 bls.n 8000390 <toHex+0xca>
8000382: 793b ldrb r3, [r7, #4]
8000384: 2b66 cmp r3, #102 @ 0x66
8000386: d803 bhi.n 8000390 <toHex+0xca>
c4=(c4-'a')+10;
8000388: 793b ldrb r3, [r7, #4]
800038a: 3b57 subs r3, #87 @ 0x57
800038c: 713b strb r3, [r7, #4]
800038e: e001 b.n 8000394 <toHex+0xce>
}else return false;
8000390: 2300 movs r3, #0
8000392: e02e b.n 80003f2 <toHex+0x12c>
*retval=c1;
8000394: 79fb ldrb r3, [r7, #7]
8000396: b29a uxth r2, r3
8000398: 693b ldr r3, [r7, #16]
800039a: 801a strh r2, [r3, #0]
*retval*=16;
800039c: 693b ldr r3, [r7, #16]
800039e: 881b ldrh r3, [r3, #0]
80003a0: 011b lsls r3, r3, #4
80003a2: b29a uxth r2, r3
80003a4: 693b ldr r3, [r7, #16]
80003a6: 801a strh r2, [r3, #0]
*retval+=c2;
80003a8: 693b ldr r3, [r7, #16]
80003aa: 881a ldrh r2, [r3, #0]
80003ac: 79bb ldrb r3, [r7, #6]
80003ae: b29b uxth r3, r3
80003b0: 4413 add r3, r2
80003b2: b29a uxth r2, r3
80003b4: 693b ldr r3, [r7, #16]
80003b6: 801a strh r2, [r3, #0]
*retval*=16;
80003b8: 693b ldr r3, [r7, #16]
80003ba: 881b ldrh r3, [r3, #0]
80003bc: 011b lsls r3, r3, #4
80003be: b29a uxth r2, r3
80003c0: 693b ldr r3, [r7, #16]
80003c2: 801a strh r2, [r3, #0]
*retval+=c3;
80003c4: 693b ldr r3, [r7, #16]
80003c6: 881a ldrh r2, [r3, #0]
80003c8: 797b ldrb r3, [r7, #5]
80003ca: b29b uxth r3, r3
80003cc: 4413 add r3, r2
80003ce: b29a uxth r2, r3
80003d0: 693b ldr r3, [r7, #16]
80003d2: 801a strh r2, [r3, #0]
*retval*=16;
80003d4: 693b ldr r3, [r7, #16]
80003d6: 881b ldrh r3, [r3, #0]
80003d8: 011b lsls r3, r3, #4
80003da: b29a uxth r2, r3
80003dc: 693b ldr r3, [r7, #16]
80003de: 801a strh r2, [r3, #0]
*retval+=c4;
80003e0: 693b ldr r3, [r7, #16]
80003e2: 881a ldrh r2, [r3, #0]
80003e4: 793b ldrb r3, [r7, #4]
80003e6: b29b uxth r3, r3
80003e8: 4413 add r3, r2
80003ea: b29a uxth r2, r3
80003ec: 693b ldr r3, [r7, #16]
80003ee: 801a strh r2, [r3, #0]
return true;
80003f0: 2301 movs r3, #1
}
80003f2: 4618 mov r0, r3
80003f4: 3708 adds r7, #8
80003f6: 46bd mov sp, r7
80003f8: bc90 pop {r4, r7}
80003fa: 4770 bx lr
080003fc <manageCDC>:
void manageCDC(void){
80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
8000400: b0c1 sub sp, #260 @ 0x104
8000402: af06 add r7, sp, #24
uint16_t val;
uint16_t st;
uint16_t eeadd;
uint8_t i;
if (CDC_Available()) {
8000404: f00d fb9a bl 800db3c <CDC_Available>
8000408: 4603 mov r3, r0
800040a: 2b00 cmp r3, #0
800040c: f000 86c8 beq.w 80011a0 <manageCDC+0xda4>
int rx = CDC_ReadByte();
8000410: f00d fba8 bl 800db64 <CDC_ReadByte>
8000414: f8c7 00e0 str.w r0, [r7, #224] @ 0xe0
if (rx < 0) return;
8000418: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800041c: 2b00 cmp r3, #0
800041e: f2c0 86be blt.w 800119e <manageCDC+0xda2>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
8000422: 4bbd ldr r3, [pc, #756] @ (8000718 <manageCDC+0x31c>)
8000424: 781b ldrb r3, [r3, #0]
8000426: 461a mov r2, r3
8000428: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800042c: b2d9 uxtb r1, r3
800042e: 4bbb ldr r3, [pc, #748] @ (800071c <manageCDC+0x320>)
8000430: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
8000432: bf00 nop
8000434: 4bb8 ldr r3, [pc, #736] @ (8000718 <manageCDC+0x31c>)
8000436: 781b ldrb r3, [r3, #0]
8000438: 461a mov r2, r3
800043a: 4bb8 ldr r3, [pc, #736] @ (800071c <manageCDC+0x320>)
800043c: 4413 add r3, r2
800043e: 2101 movs r1, #1
8000440: 4618 mov r0, r3
8000442: f00d fc51 bl 800dce8 <CDC_Transmit_FS>
8000446: 4603 mov r3, r0
8000448: 2b01 cmp r3, #1
800044a: d0f3 beq.n 8000434 <manageCDC+0x38>
if((rx==0x0d)||(rx==0x0a)){
800044c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8000450: 2b0d cmp r3, #13
8000452: d004 beq.n 800045e <manageCDC+0x62>
8000454: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8000458: 2b0a cmp r3, #10
800045a: f040 8699 bne.w 8001190 <manageCDC+0xd94>
if(rxidx){
800045e: 4bae ldr r3, [pc, #696] @ (8000718 <manageCDC+0x31c>)
8000460: 781b ldrb r3, [r3, #0]
8000462: 2b00 cmp r3, #0
8000464: f000 8690 beq.w 8001188 <manageCDC+0xd8c>
switch(rxbuf[0]){
8000468: 4bac ldr r3, [pc, #688] @ (800071c <manageCDC+0x320>)
800046a: 781b ldrb r3, [r3, #0]
800046c: 3b49 subs r3, #73 @ 0x49
800046e: 2b24 cmp r3, #36 @ 0x24
8000470: f200 8678 bhi.w 8001164 <manageCDC+0xd68>
8000474: a201 add r2, pc, #4 @ (adr r2, 800047c <manageCDC+0x80>)
8000476: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800047a: bf00 nop
800047c: 080006c7 .word 0x080006c7
8000480: 08001165 .word 0x08001165
8000484: 08001165 .word 0x08001165
8000488: 08001165 .word 0x08001165
800048c: 08001165 .word 0x08001165
8000490: 08001165 .word 0x08001165
8000494: 08001165 .word 0x08001165
8000498: 08001165 .word 0x08001165
800049c: 08001165 .word 0x08001165
80004a0: 08001165 .word 0x08001165
80004a4: 08001165 .word 0x08001165
80004a8: 08001165 .word 0x08001165
80004ac: 08001165 .word 0x08001165
80004b0: 08001165 .word 0x08001165
80004b4: 08001165 .word 0x08001165
80004b8: 08001165 .word 0x08001165
80004bc: 08001165 .word 0x08001165
80004c0: 08001165 .word 0x08001165
80004c4: 08001165 .word 0x08001165
80004c8: 08001165 .word 0x08001165
80004cc: 08001165 .word 0x08001165
80004d0: 08001165 .word 0x08001165
80004d4: 08001165 .word 0x08001165
80004d8: 08001165 .word 0x08001165
80004dc: 08001165 .word 0x08001165
80004e0: 080006eb .word 0x080006eb
80004e4: 08001165 .word 0x08001165
80004e8: 08001165 .word 0x08001165
80004ec: 080009f5 .word 0x080009f5
80004f0: 08001165 .word 0x08001165
80004f4: 08001165 .word 0x08001165
80004f8: 08001165 .word 0x08001165
80004fc: 08000511 .word 0x08000511
8000500: 08001165 .word 0x08001165
8000504: 08001165 .word 0x08001165
8000508: 08001165 .word 0x08001165
800050c: 080007ad .word 0x080007ad
case 'i':
sprintf((char*)s,"info\n");
8000510: f107 0310 add.w r3, r7, #16
8000514: 4982 ldr r1, [pc, #520] @ (8000720 <manageCDC+0x324>)
8000516: 4618 mov r0, r3
8000518: f00d ffc4 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
800051c: bf00 nop
800051e: f107 0310 add.w r3, r7, #16
8000522: 2105 movs r1, #5
8000524: 4618 mov r0, r3
8000526: f00d fbdf bl 800dce8 <CDC_Transmit_FS>
800052a: 4603 mov r3, r0
800052c: 2b01 cmp r3, #1
800052e: d0f6 beq.n 800051e <manageCDC+0x122>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
8000530: 2100 movs r1, #0
8000532: 487c ldr r0, [pc, #496] @ (8000724 <manageCDC+0x328>)
8000534: f003 ffb0 bl 8004498 <IsPwmRunning>
8000538: 4603 mov r3, r0
800053a: 4698 mov r8, r3
800053c: 2104 movs r1, #4
800053e: 4879 ldr r0, [pc, #484] @ (8000724 <manageCDC+0x328>)
8000540: f003 ffaa bl 8004498 <IsPwmRunning>
8000544: 4603 mov r3, r0
8000546: 4699 mov r9, r3
8000548: 2108 movs r1, #8
800054a: 4876 ldr r0, [pc, #472] @ (8000724 <manageCDC+0x328>)
800054c: f003 ffa4 bl 8004498 <IsPwmRunning>
8000550: 4603 mov r3, r0
8000552: 461c mov r4, r3
8000554: 210c movs r1, #12
8000556: 4873 ldr r0, [pc, #460] @ (8000724 <manageCDC+0x328>)
8000558: f003 ff9e bl 8004498 <IsPwmRunning>
800055c: 4603 mov r3, r0
800055e: 461d mov r5, r3
8000560: 2100 movs r1, #0
8000562: 4871 ldr r0, [pc, #452] @ (8000728 <manageCDC+0x32c>)
8000564: f003 ff98 bl 8004498 <IsPwmRunning>
8000568: 4603 mov r3, r0
800056a: 461e mov r6, r3
800056c: 2104 movs r1, #4
800056e: 486e ldr r0, [pc, #440] @ (8000728 <manageCDC+0x32c>)
8000570: f003 ff92 bl 8004498 <IsPwmRunning>
8000574: 4603 mov r3, r0
8000576: 607b str r3, [r7, #4]
8000578: 2108 movs r1, #8
800057a: 486b ldr r0, [pc, #428] @ (8000728 <manageCDC+0x32c>)
800057c: f003 ff8c bl 8004498 <IsPwmRunning>
8000580: 4603 mov r3, r0
8000582: 603b str r3, [r7, #0]
8000584: 210c movs r1, #12
8000586: 4868 ldr r0, [pc, #416] @ (8000728 <manageCDC+0x32c>)
8000588: f003 ff86 bl 8004498 <IsPwmRunning>
800058c: 4603 mov r3, r0
800058e: f107 0010 add.w r0, r7, #16
8000592: 9305 str r3, [sp, #20]
8000594: 683a ldr r2, [r7, #0]
8000596: 9204 str r2, [sp, #16]
8000598: 687b ldr r3, [r7, #4]
800059a: 9303 str r3, [sp, #12]
800059c: 9602 str r6, [sp, #8]
800059e: 9501 str r5, [sp, #4]
80005a0: 9400 str r4, [sp, #0]
80005a2: 464b mov r3, r9
80005a4: 4642 mov r2, r8
80005a6: 4961 ldr r1, [pc, #388] @ (800072c <manageCDC+0x330>)
80005a8: f00d ff7c bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80005ac: bf00 nop
80005ae: f107 0310 add.w r3, r7, #16
80005b2: 4618 mov r0, r3
80005b4: f7ff fdca bl 800014c <strlen>
80005b8: 4603 mov r3, r0
80005ba: b29a uxth r2, r3
80005bc: f107 0310 add.w r3, r7, #16
80005c0: 4611 mov r1, r2
80005c2: 4618 mov r0, r3
80005c4: f00d fb90 bl 800dce8 <CDC_Transmit_FS>
80005c8: 4603 mov r3, r0
80005ca: 2b01 cmp r3, #1
80005cc: d0ef beq.n 80005ae <manageCDC+0x1b2>
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
80005ce: 4b55 ldr r3, [pc, #340] @ (8000724 <manageCDC+0x328>)
80005d0: 681b ldr r3, [r3, #0]
80005d2: 6b5b ldr r3, [r3, #52] @ 0x34
80005d4: 607b str r3, [r7, #4]
80005d6: 4b53 ldr r3, [pc, #332] @ (8000724 <manageCDC+0x328>)
80005d8: 681b ldr r3, [r3, #0]
80005da: 6b99 ldr r1, [r3, #56] @ 0x38
80005dc: 6039 str r1, [r7, #0]
80005de: 4b51 ldr r3, [pc, #324] @ (8000724 <manageCDC+0x328>)
80005e0: 681b ldr r3, [r3, #0]
80005e2: 6bdb ldr r3, [r3, #60] @ 0x3c
80005e4: 4a4f ldr r2, [pc, #316] @ (8000724 <manageCDC+0x328>)
80005e6: 6812 ldr r2, [r2, #0]
80005e8: 6c12 ldr r2, [r2, #64] @ 0x40
80005ea: 494f ldr r1, [pc, #316] @ (8000728 <manageCDC+0x32c>)
80005ec: 6809 ldr r1, [r1, #0]
80005ee: 6b49 ldr r1, [r1, #52] @ 0x34
80005f0: 484d ldr r0, [pc, #308] @ (8000728 <manageCDC+0x32c>)
80005f2: 6800 ldr r0, [r0, #0]
80005f4: 6b80 ldr r0, [r0, #56] @ 0x38
80005f6: 4c4c ldr r4, [pc, #304] @ (8000728 <manageCDC+0x32c>)
80005f8: 6824 ldr r4, [r4, #0]
80005fa: 6be4 ldr r4, [r4, #60] @ 0x3c
80005fc: 4d4a ldr r5, [pc, #296] @ (8000728 <manageCDC+0x32c>)
80005fe: 682d ldr r5, [r5, #0]
8000600: 6c2d ldr r5, [r5, #64] @ 0x40
8000602: f107 0610 add.w r6, r7, #16
8000606: 9505 str r5, [sp, #20]
8000608: 9404 str r4, [sp, #16]
800060a: 9003 str r0, [sp, #12]
800060c: 9102 str r1, [sp, #8]
800060e: 9201 str r2, [sp, #4]
8000610: 9300 str r3, [sp, #0]
8000612: 683b ldr r3, [r7, #0]
8000614: 687a ldr r2, [r7, #4]
8000616: 4946 ldr r1, [pc, #280] @ (8000730 <manageCDC+0x334>)
8000618: 4630 mov r0, r6
800061a: f00d ff43 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800061e: bf00 nop
8000620: f107 0310 add.w r3, r7, #16
8000624: 4618 mov r0, r3
8000626: f7ff fd91 bl 800014c <strlen>
800062a: 4603 mov r3, r0
800062c: b29a uxth r2, r3
800062e: f107 0310 add.w r3, r7, #16
8000632: 4611 mov r1, r2
8000634: 4618 mov r0, r3
8000636: f00d fb57 bl 800dce8 <CDC_Transmit_FS>
800063a: 4603 mov r3, r0
800063c: 2b01 cmp r3, #1
800063e: d0ef beq.n 8000620 <manageCDC+0x224>
sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8);
8000640: 4b3c ldr r3, [pc, #240] @ (8000734 <manageCDC+0x338>)
8000642: 781b ldrb r3, [r3, #0]
8000644: 461d mov r5, r3
8000646: 4b3c ldr r3, [pc, #240] @ (8000738 <manageCDC+0x33c>)
8000648: 881b ldrh r3, [r3, #0]
800064a: 461e mov r6, r3
800064c: 4b3b ldr r3, [pc, #236] @ (800073c <manageCDC+0x340>)
800064e: 881b ldrh r3, [r3, #0]
8000650: 461a mov r2, r3
8000652: 4b3b ldr r3, [pc, #236] @ (8000740 <manageCDC+0x344>)
8000654: 881b ldrh r3, [r3, #0]
8000656: 4619 mov r1, r3
8000658: 4b3a ldr r3, [pc, #232] @ (8000744 <manageCDC+0x348>)
800065a: 881b ldrh r3, [r3, #0]
800065c: 461c mov r4, r3
800065e: 4b3a ldr r3, [pc, #232] @ (8000748 <manageCDC+0x34c>)
8000660: 881b ldrh r3, [r3, #0]
8000662: f107 0010 add.w r0, r7, #16
8000666: 9303 str r3, [sp, #12]
8000668: 9402 str r4, [sp, #8]
800066a: 9101 str r1, [sp, #4]
800066c: 9200 str r2, [sp, #0]
800066e: 4633 mov r3, r6
8000670: 462a mov r2, r5
8000672: 4936 ldr r1, [pc, #216] @ (800074c <manageCDC+0x350>)
8000674: f00d ff16 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000678: bf00 nop
800067a: f107 0310 add.w r3, r7, #16
800067e: 4618 mov r0, r3
8000680: f7ff fd64 bl 800014c <strlen>
8000684: 4603 mov r3, r0
8000686: b29a uxth r2, r3
8000688: f107 0310 add.w r3, r7, #16
800068c: 4611 mov r1, r2
800068e: 4618 mov r0, r3
8000690: f00d fb2a bl 800dce8 <CDC_Transmit_FS>
8000694: 4603 mov r3, r0
8000696: 2b01 cmp r3, #1
8000698: d0ef beq.n 800067a <manageCDC+0x27e>
sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti);
800069a: 4b2d ldr r3, [pc, #180] @ (8000750 <manageCDC+0x354>)
800069c: 781b ldrb r3, [r3, #0]
800069e: 461a mov r2, r3
80006a0: 4b2c ldr r3, [pc, #176] @ (8000754 <manageCDC+0x358>)
80006a2: 781b ldrb r3, [r3, #0]
80006a4: f107 0010 add.w r0, r7, #16
80006a8: 492b ldr r1, [pc, #172] @ (8000758 <manageCDC+0x35c>)
80006aa: f00d fefb bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 31) == USBD_BUSY);
80006ae: bf00 nop
80006b0: f107 0310 add.w r3, r7, #16
80006b4: 211f movs r1, #31
80006b6: 4618 mov r0, r3
80006b8: f00d fb16 bl 800dce8 <CDC_Transmit_FS>
80006bc: 4603 mov r3, r0
80006be: 2b01 cmp r3, #1
80006c0: d0f6 beq.n 80006b0 <manageCDC+0x2b4>
break;
80006c2: f000 bd61 b.w 8001188 <manageCDC+0xd8c>
case 'I':
sprintf((char*)s,"\nID000000");
80006c6: f107 0310 add.w r3, r7, #16
80006ca: 4924 ldr r1, [pc, #144] @ (800075c <manageCDC+0x360>)
80006cc: 4618 mov r0, r3
80006ce: f00d fee9 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 9) == USBD_BUSY);
80006d2: bf00 nop
80006d4: f107 0310 add.w r3, r7, #16
80006d8: 2109 movs r1, #9
80006da: 4618 mov r0, r3
80006dc: f00d fb04 bl 800dce8 <CDC_Transmit_FS>
80006e0: 4603 mov r3, r0
80006e2: 2b01 cmp r3, #1
80006e4: d0f6 beq.n 80006d4 <manageCDC+0x2d8>
break;
80006e6: f000 bd4f b.w 8001188 <manageCDC+0xd8c>
case 'b':
if(rxidx==2){
80006ea: 4b0b ldr r3, [pc, #44] @ (8000718 <manageCDC+0x31c>)
80006ec: 781b ldrb r3, [r3, #0]
80006ee: 2b02 cmp r3, #2
80006f0: d14a bne.n 8000788 <manageCDC+0x38c>
if(rxbuf[1]=='0'){
80006f2: 4b0a ldr r3, [pc, #40] @ (800071c <manageCDC+0x320>)
80006f4: 785b ldrb r3, [r3, #1]
80006f6: 2b30 cmp r3, #48 @ 0x30
80006f8: d104 bne.n 8000704 <manageCDC+0x308>
nobuz=false;
80006fa: 4b19 ldr r3, [pc, #100] @ (8000760 <manageCDC+0x364>)
80006fc: 2200 movs r2, #0
80006fe: 701a strb r2, [r3, #0]
}
}else{
sprintf((char*)s,"\nb0|1");
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
}
break;
8000700: f000 bd42 b.w 8001188 <manageCDC+0xd8c>
}else if(rxbuf[1]=='1'){
8000704: 4b05 ldr r3, [pc, #20] @ (800071c <manageCDC+0x320>)
8000706: 785b ldrb r3, [r3, #1]
8000708: 2b31 cmp r3, #49 @ 0x31
800070a: d12b bne.n 8000764 <manageCDC+0x368>
nobuz=true;
800070c: 4b14 ldr r3, [pc, #80] @ (8000760 <manageCDC+0x364>)
800070e: 2201 movs r2, #1
8000710: 701a strb r2, [r3, #0]
break;
8000712: f000 bd39 b.w 8001188 <manageCDC+0xd8c>
8000716: bf00 nop
8000718: 20000234 .word 0x20000234
800071c: 20000238 .word 0x20000238
8000720: 0800ee1c .word 0x0800ee1c
8000724: 20000318 .word 0x20000318
8000728: 20000360 .word 0x20000360
800072c: 0800ee24 .word 0x0800ee24
8000730: 0800ee3c .word 0x0800ee3c
8000734: 200003f0 .word 0x200003f0
8000738: 2000022a .word 0x2000022a
800073c: 2000022c .word 0x2000022c
8000740: 2000022e .word 0x2000022e
8000744: 20000230 .word 0x20000230
8000748: 20000232 .word 0x20000232
800074c: 0800ee70 .word 0x0800ee70
8000750: 20000456 .word 0x20000456
8000754: 20000454 .word 0x20000454
8000758: 0800eea8 .word 0x0800eea8
800075c: 0800eec8 .word 0x0800eec8
8000760: 20000458 .word 0x20000458
sprintf((char*)s,"\nb0|1");
8000764: f107 0310 add.w r3, r7, #16
8000768: 499b ldr r1, [pc, #620] @ (80009d8 <manageCDC+0x5dc>)
800076a: 4618 mov r0, r3
800076c: f00d fe9a bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000770: bf00 nop
8000772: f107 0310 add.w r3, r7, #16
8000776: 2105 movs r1, #5
8000778: 4618 mov r0, r3
800077a: f00d fab5 bl 800dce8 <CDC_Transmit_FS>
800077e: 4603 mov r3, r0
8000780: 2b01 cmp r3, #1
8000782: d0f6 beq.n 8000772 <manageCDC+0x376>
break;
8000784: f000 bd00 b.w 8001188 <manageCDC+0xd8c>
sprintf((char*)s,"\nb0|1");
8000788: f107 0310 add.w r3, r7, #16
800078c: 4992 ldr r1, [pc, #584] @ (80009d8 <manageCDC+0x5dc>)
800078e: 4618 mov r0, r3
8000790: f00d fe88 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000794: bf00 nop
8000796: f107 0310 add.w r3, r7, #16
800079a: 2105 movs r1, #5
800079c: 4618 mov r0, r3
800079e: f00d faa3 bl 800dce8 <CDC_Transmit_FS>
80007a2: 4603 mov r3, r0
80007a4: 2b01 cmp r3, #1
80007a6: d0f6 beq.n 8000796 <manageCDC+0x39a>
break;
80007a8: f000 bcee b.w 8001188 <manageCDC+0xd8c>
case 'm':
if(rxidx==8){
80007ac: 4b8b ldr r3, [pc, #556] @ (80009dc <manageCDC+0x5e0>)
80007ae: 781b ldrb r3, [r3, #0]
80007b0: 2b08 cmp r3, #8
80007b2: f040 80fe bne.w 80009b2 <manageCDC+0x5b6>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
80007b6: 4b8a ldr r3, [pc, #552] @ (80009e0 <manageCDC+0x5e4>)
80007b8: 785b ldrb r3, [r3, #1]
80007ba: 2b30 cmp r3, #48 @ 0x30
80007bc: f240 80e8 bls.w 8000990 <manageCDC+0x594>
80007c0: 4b87 ldr r3, [pc, #540] @ (80009e0 <manageCDC+0x5e4>)
80007c2: 785b ldrb r3, [r3, #1]
80007c4: 2b34 cmp r3, #52 @ 0x34
80007c6: f200 80e3 bhi.w 8000990 <manageCDC+0x594>
mot=rxbuf[1]-='0';
80007ca: 4b85 ldr r3, [pc, #532] @ (80009e0 <manageCDC+0x5e4>)
80007cc: 785b ldrb r3, [r3, #1]
80007ce: 3b30 subs r3, #48 @ 0x30
80007d0: b2da uxtb r2, r3
80007d2: 4b83 ldr r3, [pc, #524] @ (80009e0 <manageCDC+0x5e4>)
80007d4: 705a strb r2, [r3, #1]
80007d6: 4b82 ldr r3, [pc, #520] @ (80009e0 <manageCDC+0x5e4>)
80007d8: 785b ldrb r3, [r3, #1]
80007da: f887 30df strb.w r3, [r7, #223] @ 0xdf
if(rxbuf[2]=='f'){
80007de: 4b80 ldr r3, [pc, #512] @ (80009e0 <manageCDC+0x5e4>)
80007e0: 789b ldrb r3, [r3, #2]
80007e2: 2b66 cmp r3, #102 @ 0x66
80007e4: d103 bne.n 80007ee <manageCDC+0x3f2>
dir=FW;
80007e6: 2300 movs r3, #0
80007e8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7
80007ec: e019 b.n 8000822 <manageCDC+0x426>
}else if(rxbuf[2]=='b'){
80007ee: 4b7c ldr r3, [pc, #496] @ (80009e0 <manageCDC+0x5e4>)
80007f0: 789b ldrb r3, [r3, #2]
80007f2: 2b62 cmp r3, #98 @ 0x62
80007f4: d103 bne.n 80007fe <manageCDC+0x402>
dir=BW;
80007f6: 2301 movs r3, #1
80007f8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7
80007fc: e011 b.n 8000822 <manageCDC+0x426>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
80007fe: f107 0310 add.w r3, r7, #16
8000802: 4978 ldr r1, [pc, #480] @ (80009e4 <manageCDC+0x5e8>)
8000804: 4618 mov r0, r3
8000806: f00d fe4d bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
800080a: bf00 nop
800080c: f107 0310 add.w r3, r7, #16
8000810: 2110 movs r1, #16
8000812: 4618 mov r0, r3
8000814: f00d fa68 bl 800dce8 <CDC_Transmit_FS>
8000818: 4603 mov r3, r0
800081a: 2b01 cmp r3, #1
800081c: d0f6 beq.n 800080c <manageCDC+0x410>
break;
800081e: f000 bcb3 b.w 8001188 <manageCDC+0xd8c>
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000822: 4b6f ldr r3, [pc, #444] @ (80009e0 <manageCDC+0x5e4>)
8000824: 78db ldrb r3, [r3, #3]
8000826: 2b2f cmp r3, #47 @ 0x2f
8000828: f240 80a1 bls.w 800096e <manageCDC+0x572>
800082c: 4b6c ldr r3, [pc, #432] @ (80009e0 <manageCDC+0x5e4>)
800082e: 78db ldrb r3, [r3, #3]
8000830: 2b39 cmp r3, #57 @ 0x39
8000832: f200 809c bhi.w 800096e <manageCDC+0x572>
8000836: 4b6a ldr r3, [pc, #424] @ (80009e0 <manageCDC+0x5e4>)
8000838: 791b ldrb r3, [r3, #4]
800083a: 2b2f cmp r3, #47 @ 0x2f
800083c: f240 8097 bls.w 800096e <manageCDC+0x572>
8000840: 4b67 ldr r3, [pc, #412] @ (80009e0 <manageCDC+0x5e4>)
8000842: 791b ldrb r3, [r3, #4]
8000844: 2b39 cmp r3, #57 @ 0x39
8000846: f200 8092 bhi.w 800096e <manageCDC+0x572>
800084a: 4b65 ldr r3, [pc, #404] @ (80009e0 <manageCDC+0x5e4>)
800084c: 795b ldrb r3, [r3, #5]
800084e: 2b2f cmp r3, #47 @ 0x2f
8000850: f240 808d bls.w 800096e <manageCDC+0x572>
8000854: 4b62 ldr r3, [pc, #392] @ (80009e0 <manageCDC+0x5e4>)
8000856: 795b ldrb r3, [r3, #5]
8000858: 2b39 cmp r3, #57 @ 0x39
800085a: f200 8088 bhi.w 800096e <manageCDC+0x572>
800085e: 4b60 ldr r3, [pc, #384] @ (80009e0 <manageCDC+0x5e4>)
8000860: 799b ldrb r3, [r3, #6]
8000862: 2b2f cmp r3, #47 @ 0x2f
8000864: f240 8083 bls.w 800096e <manageCDC+0x572>
8000868: 4b5d ldr r3, [pc, #372] @ (80009e0 <manageCDC+0x5e4>)
800086a: 799b ldrb r3, [r3, #6]
800086c: 2b39 cmp r3, #57 @ 0x39
800086e: d87e bhi.n 800096e <manageCDC+0x572>
8000870: 4b5b ldr r3, [pc, #364] @ (80009e0 <manageCDC+0x5e4>)
8000872: 79db ldrb r3, [r3, #7]
8000874: 2b2f cmp r3, #47 @ 0x2f
8000876: d97a bls.n 800096e <manageCDC+0x572>
8000878: 4b59 ldr r3, [pc, #356] @ (80009e0 <manageCDC+0x5e4>)
800087a: 79db ldrb r3, [r3, #7]
800087c: 2b39 cmp r3, #57 @ 0x39
800087e: d876 bhi.n 800096e <manageCDC+0x572>
dm=rxbuf[3]-='0';
8000880: 4b57 ldr r3, [pc, #348] @ (80009e0 <manageCDC+0x5e4>)
8000882: 78db ldrb r3, [r3, #3]
8000884: 3b30 subs r3, #48 @ 0x30
8000886: b2da uxtb r2, r3
8000888: 4b55 ldr r3, [pc, #340] @ (80009e0 <manageCDC+0x5e4>)
800088a: 70da strb r2, [r3, #3]
800088c: 4b54 ldr r3, [pc, #336] @ (80009e0 <manageCDC+0x5e4>)
800088e: 78db ldrb r3, [r3, #3]
8000890: f887 30de strb.w r3, [r7, #222] @ 0xde
m=rxbuf[4]-='0';
8000894: 4b52 ldr r3, [pc, #328] @ (80009e0 <manageCDC+0x5e4>)
8000896: 791b ldrb r3, [r3, #4]
8000898: 3b30 subs r3, #48 @ 0x30
800089a: b2da uxtb r2, r3
800089c: 4b50 ldr r3, [pc, #320] @ (80009e0 <manageCDC+0x5e4>)
800089e: 711a strb r2, [r3, #4]
80008a0: 4b4f ldr r3, [pc, #316] @ (80009e0 <manageCDC+0x5e4>)
80008a2: 791b ldrb r3, [r3, #4]
80008a4: f887 30dd strb.w r3, [r7, #221] @ 0xdd
c=rxbuf[5]-='0';
80008a8: 4b4d ldr r3, [pc, #308] @ (80009e0 <manageCDC+0x5e4>)
80008aa: 795b ldrb r3, [r3, #5]
80008ac: 3b30 subs r3, #48 @ 0x30
80008ae: b2da uxtb r2, r3
80008b0: 4b4b ldr r3, [pc, #300] @ (80009e0 <manageCDC+0x5e4>)
80008b2: 715a strb r2, [r3, #5]
80008b4: 4b4a ldr r3, [pc, #296] @ (80009e0 <manageCDC+0x5e4>)
80008b6: 795b ldrb r3, [r3, #5]
80008b8: f887 30dc strb.w r3, [r7, #220] @ 0xdc
d=rxbuf[6]-='0';
80008bc: 4b48 ldr r3, [pc, #288] @ (80009e0 <manageCDC+0x5e4>)
80008be: 799b ldrb r3, [r3, #6]
80008c0: 3b30 subs r3, #48 @ 0x30
80008c2: b2da uxtb r2, r3
80008c4: 4b46 ldr r3, [pc, #280] @ (80009e0 <manageCDC+0x5e4>)
80008c6: 719a strb r2, [r3, #6]
80008c8: 4b45 ldr r3, [pc, #276] @ (80009e0 <manageCDC+0x5e4>)
80008ca: 799b ldrb r3, [r3, #6]
80008cc: f887 30db strb.w r3, [r7, #219] @ 0xdb
u=rxbuf[7]-='0';
80008d0: 4b43 ldr r3, [pc, #268] @ (80009e0 <manageCDC+0x5e4>)
80008d2: 79db ldrb r3, [r3, #7]
80008d4: 3b30 subs r3, #48 @ 0x30
80008d6: b2da uxtb r2, r3
80008d8: 4b41 ldr r3, [pc, #260] @ (80009e0 <manageCDC+0x5e4>)
80008da: 71da strb r2, [r3, #7]
80008dc: 4b40 ldr r3, [pc, #256] @ (80009e0 <manageCDC+0x5e4>)
80008de: 79db ldrb r3, [r3, #7]
80008e0: f887 30da strb.w r3, [r7, #218] @ 0xda
val=dm;
80008e4: f897 30de ldrb.w r3, [r7, #222] @ 0xde
80008e8: b29b uxth r3, r3
80008ea: 81fb strh r3, [r7, #14]
val*=10;
80008ec: 89fb ldrh r3, [r7, #14]
80008ee: 461a mov r2, r3
80008f0: 0092 lsls r2, r2, #2
80008f2: 4413 add r3, r2
80008f4: 005b lsls r3, r3, #1
80008f6: b29b uxth r3, r3
80008f8: 81fb strh r3, [r7, #14]
val+=m;
80008fa: f897 30dd ldrb.w r3, [r7, #221] @ 0xdd
80008fe: b29a uxth r2, r3
8000900: 89fb ldrh r3, [r7, #14]
8000902: 4413 add r3, r2
8000904: b29b uxth r3, r3
8000906: 81fb strh r3, [r7, #14]
val*=10;
8000908: 89fb ldrh r3, [r7, #14]
800090a: 461a mov r2, r3
800090c: 0092 lsls r2, r2, #2
800090e: 4413 add r3, r2
8000910: 005b lsls r3, r3, #1
8000912: b29b uxth r3, r3
8000914: 81fb strh r3, [r7, #14]
val+=c;
8000916: f897 30dc ldrb.w r3, [r7, #220] @ 0xdc
800091a: b29a uxth r2, r3
800091c: 89fb ldrh r3, [r7, #14]
800091e: 4413 add r3, r2
8000920: b29b uxth r3, r3
8000922: 81fb strh r3, [r7, #14]
val*=10;
8000924: 89fb ldrh r3, [r7, #14]
8000926: 461a mov r2, r3
8000928: 0092 lsls r2, r2, #2
800092a: 4413 add r3, r2
800092c: 005b lsls r3, r3, #1
800092e: b29b uxth r3, r3
8000930: 81fb strh r3, [r7, #14]
val+=d;
8000932: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
8000936: b29a uxth r2, r3
8000938: 89fb ldrh r3, [r7, #14]
800093a: 4413 add r3, r2
800093c: b29b uxth r3, r3
800093e: 81fb strh r3, [r7, #14]
val*=10;
8000940: 89fb ldrh r3, [r7, #14]
8000942: 461a mov r2, r3
8000944: 0092 lsls r2, r2, #2
8000946: 4413 add r3, r2
8000948: 005b lsls r3, r3, #1
800094a: b29b uxth r3, r3
800094c: 81fb strh r3, [r7, #14]
val+=u;
800094e: f897 30da ldrb.w r3, [r7, #218] @ 0xda
8000952: b29a uxth r2, r3
8000954: 89fb ldrh r3, [r7, #14]
8000956: 4413 add r3, r2
8000958: b29b uxth r3, r3
800095a: 81fb strh r3, [r7, #14]
SetMot(mot,dir,val);
800095c: 89fa ldrh r2, [r7, #14]
800095e: f897 10e7 ldrb.w r1, [r7, #231] @ 0xe7
8000962: f897 30df ldrb.w r3, [r7, #223] @ 0xdf
8000966: 4618 mov r0, r3
8000968: f003 fe0c bl 8004584 <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800096c: e032 b.n 80009d4 <manageCDC+0x5d8>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
800096e: f107 0310 add.w r3, r7, #16
8000972: 491d ldr r1, [pc, #116] @ (80009e8 <manageCDC+0x5ec>)
8000974: 4618 mov r0, r3
8000976: f00d fd95 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800097a: bf00 nop
800097c: f107 0310 add.w r3, r7, #16
8000980: 2113 movs r1, #19
8000982: 4618 mov r0, r3
8000984: f00d f9b0 bl 800dce8 <CDC_Transmit_FS>
8000988: 4603 mov r3, r0
800098a: 2b01 cmp r3, #1
800098c: d0f6 beq.n 800097c <manageCDC+0x580>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800098e: e021 b.n 80009d4 <manageCDC+0x5d8>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
8000990: f107 0310 add.w r3, r7, #16
8000994: 4915 ldr r1, [pc, #84] @ (80009ec <manageCDC+0x5f0>)
8000996: 4618 mov r0, r3
8000998: f00d fd84 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800099c: bf00 nop
800099e: f107 0310 add.w r3, r7, #16
80009a2: 2113 movs r1, #19
80009a4: 4618 mov r0, r3
80009a6: f00d f99f bl 800dce8 <CDC_Transmit_FS>
80009aa: 4603 mov r3, r0
80009ac: 2b01 cmp r3, #1
80009ae: d0f6 beq.n 800099e <manageCDC+0x5a2>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
80009b0: e3ea b.n 8001188 <manageCDC+0xd8c>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
80009b2: f107 0310 add.w r3, r7, #16
80009b6: 490e ldr r1, [pc, #56] @ (80009f0 <manageCDC+0x5f4>)
80009b8: 4618 mov r0, r3
80009ba: f00d fd73 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80009be: bf00 nop
80009c0: f107 0310 add.w r3, r7, #16
80009c4: 210a movs r1, #10
80009c6: 4618 mov r0, r3
80009c8: f00d f98e bl 800dce8 <CDC_Transmit_FS>
80009cc: 4603 mov r3, r0
80009ce: 2b01 cmp r3, #1
80009d0: d0f6 beq.n 80009c0 <manageCDC+0x5c4>
break;
80009d2: e3d9 b.n 8001188 <manageCDC+0xd8c>
80009d4: e3d8 b.n 8001188 <manageCDC+0xd8c>
80009d6: bf00 nop
80009d8: 0800eed4 .word 0x0800eed4
80009dc: 20000234 .word 0x20000234
80009e0: 20000238 .word 0x20000238
80009e4: 0800eedc .word 0x0800eedc
80009e8: 0800eef0 .word 0x0800eef0
80009ec: 0800ef10 .word 0x0800ef10
80009f0: 0800ef24 .word 0x0800ef24
case 'e':
if(rxidx>1){
80009f4: 4bbb ldr r3, [pc, #748] @ (8000ce4 <manageCDC+0x8e8>)
80009f6: 781b ldrb r3, [r3, #0]
80009f8: 2b01 cmp r3, #1
80009fa: f240 839b bls.w 8001134 <manageCDC+0xd38>
if(rxbuf[1]=='r'){
80009fe: 4bba ldr r3, [pc, #744] @ (8000ce8 <manageCDC+0x8ec>)
8000a00: 785b ldrb r3, [r3, #1]
8000a02: 2b72 cmp r3, #114 @ 0x72
8000a04: f040 8086 bne.w 8000b14 <manageCDC+0x718>
if(rxidx==4){
8000a08: 4bb6 ldr r3, [pc, #728] @ (8000ce4 <manageCDC+0x8e8>)
8000a0a: 781b ldrb r3, [r3, #0]
8000a0c: 2b04 cmp r3, #4
8000a0e: d169 bne.n 8000ae4 <manageCDC+0x6e8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000a10: 4bb5 ldr r3, [pc, #724] @ (8000ce8 <manageCDC+0x8ec>)
8000a12: 789a ldrb r2, [r3, #2]
8000a14: 4bb4 ldr r3, [pc, #720] @ (8000ce8 <manageCDC+0x8ec>)
8000a16: 78d9 ldrb r1, [r3, #3]
8000a18: f107 030c add.w r3, r7, #12
8000a1c: 9300 str r3, [sp, #0]
8000a1e: 460b mov r3, r1
8000a20: 2130 movs r1, #48 @ 0x30
8000a22: 2030 movs r0, #48 @ 0x30
8000a24: f7ff fc4f bl 80002c6 <toHex>
8000a28: 4603 mov r3, r0
8000a2a: 2b00 cmp r3, #0
8000a2c: d042 beq.n 8000ab4 <manageCDC+0x6b8>
st=EEW_Read(eeadd, &val);
8000a2e: 89bb ldrh r3, [r7, #12]
8000a30: b2db uxtb r3, r3
8000a32: f107 020e add.w r2, r7, #14
8000a36: 4611 mov r1, r2
8000a38: 4618 mov r0, r3
8000a3a: f7ff fc1b bl 8000274 <EEW_Read>
8000a3e: 4603 mov r3, r0
8000a40: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK){
8000a44: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000a48: 2b00 cmp r3, #0
8000a4a: d119 bne.n 8000a80 <manageCDC+0x684>
sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val);
8000a4c: 89bb ldrh r3, [r7, #12]
8000a4e: 461a mov r2, r3
8000a50: 89fb ldrh r3, [r7, #14]
8000a52: f107 0010 add.w r0, r7, #16
8000a56: 49a5 ldr r1, [pc, #660] @ (8000cec <manageCDC+0x8f0>)
8000a58: f00d fd24 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a5c: bf00 nop
8000a5e: f107 0310 add.w r3, r7, #16
8000a62: 4618 mov r0, r3
8000a64: f7ff fb72 bl 800014c <strlen>
8000a68: 4603 mov r3, r0
8000a6a: b29a uxth r2, r3
8000a6c: f107 0310 add.w r3, r7, #16
8000a70: 4611 mov r1, r2
8000a72: 4618 mov r0, r3
8000a74: f00d f938 bl 800dce8 <CDC_Transmit_FS>
8000a78: 4603 mov r3, r0
8000a7a: 2b01 cmp r3, #1
8000a7c: d0ef beq.n 8000a5e <manageCDC+0x662>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
8000a7e: e382 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\nee read error %d",st);
8000a80: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000a84: f107 0310 add.w r3, r7, #16
8000a88: 4999 ldr r1, [pc, #612] @ (8000cf0 <manageCDC+0x8f4>)
8000a8a: 4618 mov r0, r3
8000a8c: f00d fd0a bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a90: bf00 nop
8000a92: f107 0310 add.w r3, r7, #16
8000a96: 4618 mov r0, r3
8000a98: f7ff fb58 bl 800014c <strlen>
8000a9c: 4603 mov r3, r0
8000a9e: b29a uxth r2, r3
8000aa0: f107 0310 add.w r3, r7, #16
8000aa4: 4611 mov r1, r2
8000aa6: 4618 mov r0, r3
8000aa8: f00d f91e bl 800dce8 <CDC_Transmit_FS>
8000aac: 4603 mov r3, r0
8000aae: 2b01 cmp r3, #1
8000ab0: d0ef beq.n 8000a92 <manageCDC+0x696>
break;
8000ab2: e368 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?eraa hex values");
8000ab4: f107 0310 add.w r3, r7, #16
8000ab8: 498e ldr r1, [pc, #568] @ (8000cf4 <manageCDC+0x8f8>)
8000aba: 4618 mov r0, r3
8000abc: f00d fcf2 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ac0: bf00 nop
8000ac2: f107 0310 add.w r3, r7, #16
8000ac6: 4618 mov r0, r3
8000ac8: f7ff fb40 bl 800014c <strlen>
8000acc: 4603 mov r3, r0
8000ace: b29a uxth r2, r3
8000ad0: f107 0310 add.w r3, r7, #16
8000ad4: 4611 mov r1, r2
8000ad6: 4618 mov r0, r3
8000ad8: f00d f906 bl 800dce8 <CDC_Transmit_FS>
8000adc: 4603 mov r3, r0
8000ade: 2b01 cmp r3, #1
8000ae0: d0ef beq.n 8000ac2 <manageCDC+0x6c6>
break;
8000ae2: e350 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?eraa");
8000ae4: f107 0310 add.w r3, r7, #16
8000ae8: 4983 ldr r1, [pc, #524] @ (8000cf8 <manageCDC+0x8fc>)
8000aea: 4618 mov r0, r3
8000aec: f00d fcda bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000af0: bf00 nop
8000af2: f107 0310 add.w r3, r7, #16
8000af6: 4618 mov r0, r3
8000af8: f7ff fb28 bl 800014c <strlen>
8000afc: 4603 mov r3, r0
8000afe: b29a uxth r2, r3
8000b00: f107 0310 add.w r3, r7, #16
8000b04: 4611 mov r1, r2
8000b06: 4618 mov r0, r3
8000b08: f00d f8ee bl 800dce8 <CDC_Transmit_FS>
8000b0c: 4603 mov r3, r0
8000b0e: 2b01 cmp r3, #1
8000b10: d0ef beq.n 8000af2 <manageCDC+0x6f6>
break;
8000b12: e338 b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='w'){
8000b14: 4b74 ldr r3, [pc, #464] @ (8000ce8 <manageCDC+0x8ec>)
8000b16: 785b ldrb r3, [r3, #1]
8000b18: 2b77 cmp r3, #119 @ 0x77
8000b1a: d169 bne.n 8000bf0 <manageCDC+0x7f4>
if(rxidx==8){
8000b1c: 4b71 ldr r3, [pc, #452] @ (8000ce4 <manageCDC+0x8e8>)
8000b1e: 781b ldrb r3, [r3, #0]
8000b20: 2b08 cmp r3, #8
8000b22: d14d bne.n 8000bc0 <manageCDC+0x7c4>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000b24: 4b70 ldr r3, [pc, #448] @ (8000ce8 <manageCDC+0x8ec>)
8000b26: 789a ldrb r2, [r3, #2]
8000b28: 4b6f ldr r3, [pc, #444] @ (8000ce8 <manageCDC+0x8ec>)
8000b2a: 78d9 ldrb r1, [r3, #3]
8000b2c: f107 030c add.w r3, r7, #12
8000b30: 9300 str r3, [sp, #0]
8000b32: 460b mov r3, r1
8000b34: 2130 movs r1, #48 @ 0x30
8000b36: 2030 movs r0, #48 @ 0x30
8000b38: f7ff fbc5 bl 80002c6 <toHex>
8000b3c: 4603 mov r3, r0
8000b3e: 2b00 cmp r3, #0
8000b40: d037 beq.n 8000bb2 <manageCDC+0x7b6>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
8000b42: 4b69 ldr r3, [pc, #420] @ (8000ce8 <manageCDC+0x8ec>)
8000b44: 7918 ldrb r0, [r3, #4]
8000b46: 4b68 ldr r3, [pc, #416] @ (8000ce8 <manageCDC+0x8ec>)
8000b48: 7959 ldrb r1, [r3, #5]
8000b4a: 4b67 ldr r3, [pc, #412] @ (8000ce8 <manageCDC+0x8ec>)
8000b4c: 799a ldrb r2, [r3, #6]
8000b4e: 4b66 ldr r3, [pc, #408] @ (8000ce8 <manageCDC+0x8ec>)
8000b50: 79dc ldrb r4, [r3, #7]
8000b52: f107 030e add.w r3, r7, #14
8000b56: 9300 str r3, [sp, #0]
8000b58: 4623 mov r3, r4
8000b5a: f7ff fbb4 bl 80002c6 <toHex>
8000b5e: 4603 mov r3, r0
8000b60: 2b00 cmp r3, #0
8000b62: d01f beq.n 8000ba4 <manageCDC+0x7a8>
st=EEW_Write(eeadd, val);
8000b64: 89bb ldrh r3, [r7, #12]
8000b66: b2db uxtb r3, r3
8000b68: 89fa ldrh r2, [r7, #14]
8000b6a: 4611 mov r1, r2
8000b6c: 4618 mov r0, r3
8000b6e: f7ff fb94 bl 800029a <EEW_Write>
8000b72: 4603 mov r3, r0
8000b74: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val);
8000b78: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000b7c: 2b00 cmp r3, #0
8000b7e: d108 bne.n 8000b92 <manageCDC+0x796>
8000b80: 89bb ldrh r3, [r7, #12]
8000b82: 461a mov r2, r3
8000b84: 89fb ldrh r3, [r7, #14]
8000b86: f107 0010 add.w r0, r7, #16
8000b8a: 495c ldr r1, [pc, #368] @ (8000cfc <manageCDC+0x900>)
8000b8c: f00d fc8a bl 800e4a4 <siprintf>
8000b90: e01c b.n 8000bcc <manageCDC+0x7d0>
else sprintf((char*)s,"\nee write error %d", st);
8000b92: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000b96: f107 0310 add.w r3, r7, #16
8000b9a: 4959 ldr r1, [pc, #356] @ (8000d00 <manageCDC+0x904>)
8000b9c: 4618 mov r0, r3
8000b9e: f00d fc81 bl 800e4a4 <siprintf>
8000ba2: e013 b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaavvvv hex values");
8000ba4: f107 0310 add.w r3, r7, #16
8000ba8: 4956 ldr r1, [pc, #344] @ (8000d04 <manageCDC+0x908>)
8000baa: 4618 mov r0, r3
8000bac: f00d fc7a bl 800e4a4 <siprintf>
8000bb0: e00c b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaa hex values");
8000bb2: f107 0310 add.w r3, r7, #16
8000bb6: 4954 ldr r1, [pc, #336] @ (8000d08 <manageCDC+0x90c>)
8000bb8: 4618 mov r0, r3
8000bba: f00d fc73 bl 800e4a4 <siprintf>
8000bbe: e005 b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaavvvv");
8000bc0: f107 0310 add.w r3, r7, #16
8000bc4: 4951 ldr r1, [pc, #324] @ (8000d0c <manageCDC+0x910>)
8000bc6: 4618 mov r0, r3
8000bc8: f00d fc6c bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bcc: bf00 nop
8000bce: f107 0310 add.w r3, r7, #16
8000bd2: 4618 mov r0, r3
8000bd4: f7ff faba bl 800014c <strlen>
8000bd8: 4603 mov r3, r0
8000bda: b29a uxth r2, r3
8000bdc: f107 0310 add.w r3, r7, #16
8000be0: 4611 mov r1, r2
8000be2: 4618 mov r0, r3
8000be4: f00d f880 bl 800dce8 <CDC_Transmit_FS>
8000be8: 4603 mov r3, r0
8000bea: 2b01 cmp r3, #1
8000bec: d0ef beq.n 8000bce <manageCDC+0x7d2>
break;
8000bee: e2ca b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='d'){
8000bf0: 4b3d ldr r3, [pc, #244] @ (8000ce8 <manageCDC+0x8ec>)
8000bf2: 785b ldrb r3, [r3, #1]
8000bf4: 2b64 cmp r3, #100 @ 0x64
8000bf6: f040 80a9 bne.w 8000d4c <manageCDC+0x950>
if(rxidx==2){
8000bfa: 4b3a ldr r3, [pc, #232] @ (8000ce4 <manageCDC+0x8e8>)
8000bfc: 781b ldrb r3, [r3, #0]
8000bfe: 2b02 cmp r3, #2
8000c00: f040 808c bne.w 8000d1c <manageCDC+0x920>
for(i=0;i<32;i++){
8000c04: 2300 movs r3, #0
8000c06: f887 30e6 strb.w r3, [r7, #230] @ 0xe6
8000c0a: e046 b.n 8000c9a <manageCDC+0x89e>
st=EEW_Read(i, &val);
8000c0c: f107 020e add.w r2, r7, #14
8000c10: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c14: 4611 mov r1, r2
8000c16: 4618 mov r0, r3
8000c18: f7ff fb2c bl 8000274 <EEW_Read>
8000c1c: 4603 mov r3, r0
8000c1e: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK){
8000c22: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000c26: 2b00 cmp r3, #0
8000c28: d119 bne.n 8000c5e <manageCDC+0x862>
sprintf((char*)s,"\n0x%02x=%5d ",i,val);
8000c2a: f897 20e6 ldrb.w r2, [r7, #230] @ 0xe6
8000c2e: 89fb ldrh r3, [r7, #14]
8000c30: f107 0010 add.w r0, r7, #16
8000c34: 4936 ldr r1, [pc, #216] @ (8000d10 <manageCDC+0x914>)
8000c36: f00d fc35 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c3a: bf00 nop
8000c3c: f107 0310 add.w r3, r7, #16
8000c40: 4618 mov r0, r3
8000c42: f7ff fa83 bl 800014c <strlen>
8000c46: 4603 mov r3, r0
8000c48: b29a uxth r2, r3
8000c4a: f107 0310 add.w r3, r7, #16
8000c4e: 4611 mov r1, r2
8000c50: 4618 mov r0, r3
8000c52: f00d f849 bl 800dce8 <CDC_Transmit_FS>
8000c56: 4603 mov r3, r0
8000c58: 2b01 cmp r3, #1
8000c5a: d0ef beq.n 8000c3c <manageCDC+0x840>
8000c5c: e018 b.n 8000c90 <manageCDC+0x894>
sprintf((char*)s,"rderr %d ",st);
8000c5e: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000c62: f107 0310 add.w r3, r7, #16
8000c66: 492b ldr r1, [pc, #172] @ (8000d14 <manageCDC+0x918>)
8000c68: 4618 mov r0, r3
8000c6a: f00d fc1b bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c6e: bf00 nop
8000c70: f107 0310 add.w r3, r7, #16
8000c74: 4618 mov r0, r3
8000c76: f7ff fa69 bl 800014c <strlen>
8000c7a: 4603 mov r3, r0
8000c7c: b29a uxth r2, r3
8000c7e: f107 0310 add.w r3, r7, #16
8000c82: 4611 mov r1, r2
8000c84: 4618 mov r0, r3
8000c86: f00d f82f bl 800dce8 <CDC_Transmit_FS>
8000c8a: 4603 mov r3, r0
8000c8c: 2b01 cmp r3, #1
8000c8e: d0ef beq.n 8000c70 <manageCDC+0x874>
for(i=0;i<32;i++){
8000c90: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c94: 3301 adds r3, #1
8000c96: f887 30e6 strb.w r3, [r7, #230] @ 0xe6
8000c9a: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c9e: 2b1f cmp r3, #31
8000ca0: d9b4 bls.n 8000c0c <manageCDC+0x810>
if((i%4)==0){
8000ca2: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000ca6: f003 0303 and.w r3, r3, #3
8000caa: b2db uxtb r3, r3
8000cac: 2b00 cmp r3, #0
8000cae: f040 826a bne.w 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n");
8000cb2: f107 0310 add.w r3, r7, #16
8000cb6: 4918 ldr r1, [pc, #96] @ (8000d18 <manageCDC+0x91c>)
8000cb8: 4618 mov r0, r3
8000cba: f00d fbf3 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000cbe: bf00 nop
8000cc0: f107 0310 add.w r3, r7, #16
8000cc4: 4618 mov r0, r3
8000cc6: f7ff fa41 bl 800014c <strlen>
8000cca: 4603 mov r3, r0
8000ccc: b29a uxth r2, r3
8000cce: f107 0310 add.w r3, r7, #16
8000cd2: 4611 mov r1, r2
8000cd4: 4618 mov r0, r3
8000cd6: f00d f807 bl 800dce8 <CDC_Transmit_FS>
8000cda: 4603 mov r3, r0
8000cdc: 2b01 cmp r3, #1
8000cde: d0ef beq.n 8000cc0 <manageCDC+0x8c4>
break;
8000ce0: e251 b.n 8001186 <manageCDC+0xd8a>
8000ce2: bf00 nop
8000ce4: 20000234 .word 0x20000234
8000ce8: 20000238 .word 0x20000238
8000cec: 0800ef30 .word 0x0800ef30
8000cf0: 0800ef44 .word 0x0800ef44
8000cf4: 0800ef58 .word 0x0800ef58
8000cf8: 0800ef6c .word 0x0800ef6c
8000cfc: 0800ef74 .word 0x0800ef74
8000d00: 0800ef88 .word 0x0800ef88
8000d04: 0800ef9c .word 0x0800ef9c
8000d08: 0800efb4 .word 0x0800efb4
8000d0c: 0800efc8 .word 0x0800efc8
8000d10: 0800efd4 .word 0x0800efd4
8000d14: 0800efe4 .word 0x0800efe4
8000d18: 0800eff0 .word 0x0800eff0
sprintf((char*)s,"\n?ed");
8000d1c: f107 0310 add.w r3, r7, #16
8000d20: 491d ldr r1, [pc, #116] @ (8000d98 <manageCDC+0x99c>)
8000d22: 4618 mov r0, r3
8000d24: f00d fbbe bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d28: bf00 nop
8000d2a: f107 0310 add.w r3, r7, #16
8000d2e: 4618 mov r0, r3
8000d30: f7ff fa0c bl 800014c <strlen>
8000d34: 4603 mov r3, r0
8000d36: b29a uxth r2, r3
8000d38: f107 0310 add.w r3, r7, #16
8000d3c: 4611 mov r1, r2
8000d3e: 4618 mov r0, r3
8000d40: f00c ffd2 bl 800dce8 <CDC_Transmit_FS>
8000d44: 4603 mov r3, r0
8000d46: 2b01 cmp r3, #1
8000d48: d0ef beq.n 8000d2a <manageCDC+0x92e>
break;
8000d4a: e21c b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='x'){
8000d4c: 4b13 ldr r3, [pc, #76] @ (8000d9c <manageCDC+0x9a0>)
8000d4e: 785b ldrb r3, [r3, #1]
8000d50: 2b78 cmp r3, #120 @ 0x78
8000d52: d129 bne.n 8000da8 <manageCDC+0x9ac>
if(rxidx==2){
8000d54: 4b12 ldr r3, [pc, #72] @ (8000da0 <manageCDC+0x9a4>)
8000d56: 781b ldrb r3, [r3, #0]
8000d58: 2b02 cmp r3, #2
8000d5a: d104 bne.n 8000d66 <manageCDC+0x96a>
loadDefault();
8000d5c: f000 fcd2 bl 8001704 <loadDefault>
loadEE();
8000d60: f000 fd1e bl 80017a0 <loadEE>
break;
8000d64: e20f b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?ex");
8000d66: f107 0310 add.w r3, r7, #16
8000d6a: 490e ldr r1, [pc, #56] @ (8000da4 <manageCDC+0x9a8>)
8000d6c: 4618 mov r0, r3
8000d6e: f00d fb99 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d72: bf00 nop
8000d74: f107 0310 add.w r3, r7, #16
8000d78: 4618 mov r0, r3
8000d7a: f7ff f9e7 bl 800014c <strlen>
8000d7e: 4603 mov r3, r0
8000d80: b29a uxth r2, r3
8000d82: f107 0310 add.w r3, r7, #16
8000d86: 4611 mov r1, r2
8000d88: 4618 mov r0, r3
8000d8a: f00c ffad bl 800dce8 <CDC_Transmit_FS>
8000d8e: 4603 mov r3, r0
8000d90: 2b01 cmp r3, #1
8000d92: d0ef beq.n 8000d74 <manageCDC+0x978>
break;
8000d94: e1f7 b.n 8001186 <manageCDC+0xd8a>
8000d96: bf00 nop
8000d98: 0800eff4 .word 0x0800eff4
8000d9c: 20000238 .word 0x20000238
8000da0: 20000234 .word 0x20000234
8000da4: 0800effc .word 0x0800effc
}else if(rxbuf[1]=='v'){
8000da8: 4bb4 ldr r3, [pc, #720] @ (800107c <manageCDC+0xc80>)
8000daa: 785b ldrb r3, [r3, #1]
8000dac: 2b76 cmp r3, #118 @ 0x76
8000dae: f040 814c bne.w 800104a <manageCDC+0xc4e>
if(rxidx==2){
8000db2: 4bb3 ldr r3, [pc, #716] @ (8001080 <manageCDC+0xc84>)
8000db4: 781b ldrb r3, [r3, #0]
8000db6: 2b02 cmp r3, #2
8000db8: f040 812f bne.w 800101a <manageCDC+0xc1e>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8000dbc: 4bb1 ldr r3, [pc, #708] @ (8001084 <manageCDC+0xc88>)
8000dbe: 881b ldrh r3, [r3, #0]
8000dc0: 469c mov ip, r3
8000dc2: 4bb1 ldr r3, [pc, #708] @ (8001088 <manageCDC+0xc8c>)
8000dc4: 881b ldrh r3, [r3, #0]
8000dc6: 469e mov lr, r3
8000dc8: 4bb0 ldr r3, [pc, #704] @ (800108c <manageCDC+0xc90>)
8000dca: 881b ldrh r3, [r3, #0]
8000dcc: 461a mov r2, r3
8000dce: 4bb0 ldr r3, [pc, #704] @ (8001090 <manageCDC+0xc94>)
8000dd0: 881b ldrh r3, [r3, #0]
8000dd2: 4619 mov r1, r3
8000dd4: 4baf ldr r3, [pc, #700] @ (8001094 <manageCDC+0xc98>)
8000dd6: 881b ldrh r3, [r3, #0]
8000dd8: 461c mov r4, r3
8000dda: 4baf ldr r3, [pc, #700] @ (8001098 <manageCDC+0xc9c>)
8000ddc: 881b ldrh r3, [r3, #0]
8000dde: 461d mov r5, r3
8000de0: 4bae ldr r3, [pc, #696] @ (800109c <manageCDC+0xca0>)
8000de2: 881b ldrh r3, [r3, #0]
8000de4: 461e mov r6, r3
8000de6: 4bae ldr r3, [pc, #696] @ (80010a0 <manageCDC+0xca4>)
8000de8: 881b ldrh r3, [r3, #0]
8000dea: f107 0010 add.w r0, r7, #16
8000dee: 9305 str r3, [sp, #20]
8000df0: 9604 str r6, [sp, #16]
8000df2: 9503 str r5, [sp, #12]
8000df4: 9402 str r4, [sp, #8]
8000df6: 9101 str r1, [sp, #4]
8000df8: 9200 str r2, [sp, #0]
8000dfa: 4673 mov r3, lr
8000dfc: 4662 mov r2, ip
8000dfe: 49a9 ldr r1, [pc, #676] @ (80010a4 <manageCDC+0xca8>)
8000e00: f00d fb50 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e04: bf00 nop
8000e06: f107 0310 add.w r3, r7, #16
8000e0a: 4618 mov r0, r3
8000e0c: f7ff f99e bl 800014c <strlen>
8000e10: 4603 mov r3, r0
8000e12: b29a uxth r2, r3
8000e14: f107 0310 add.w r3, r7, #16
8000e18: 4611 mov r1, r2
8000e1a: 4618 mov r0, r3
8000e1c: f00c ff64 bl 800dce8 <CDC_Transmit_FS>
8000e20: 4603 mov r3, r0
8000e22: 2b01 cmp r3, #1
8000e24: d0ef beq.n 8000e06 <manageCDC+0xa0a>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
8000e26: 4ba0 ldr r3, [pc, #640] @ (80010a8 <manageCDC+0xcac>)
8000e28: 881b ldrh r3, [r3, #0]
8000e2a: 4619 mov r1, r3
8000e2c: 4b9f ldr r3, [pc, #636] @ (80010ac <manageCDC+0xcb0>)
8000e2e: 881b ldrh r3, [r3, #0]
8000e30: 461c mov r4, r3
8000e32: 4b9f ldr r3, [pc, #636] @ (80010b0 <manageCDC+0xcb4>)
8000e34: 881b ldrh r3, [r3, #0]
8000e36: 461a mov r2, r3
8000e38: 4b9e ldr r3, [pc, #632] @ (80010b4 <manageCDC+0xcb8>)
8000e3a: 881b ldrh r3, [r3, #0]
8000e3c: f107 0010 add.w r0, r7, #16
8000e40: 9301 str r3, [sp, #4]
8000e42: 9200 str r2, [sp, #0]
8000e44: 4623 mov r3, r4
8000e46: 460a mov r2, r1
8000e48: 499b ldr r1, [pc, #620] @ (80010b8 <manageCDC+0xcbc>)
8000e4a: f00d fb2b bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e4e: bf00 nop
8000e50: f107 0310 add.w r3, r7, #16
8000e54: 4618 mov r0, r3
8000e56: f7ff f979 bl 800014c <strlen>
8000e5a: 4603 mov r3, r0
8000e5c: b29a uxth r2, r3
8000e5e: f107 0310 add.w r3, r7, #16
8000e62: 4611 mov r1, r2
8000e64: 4618 mov r0, r3
8000e66: f00c ff3f bl 800dce8 <CDC_Transmit_FS>
8000e6a: 4603 mov r3, r0
8000e6c: 2b01 cmp r3, #1
8000e6e: d0ef beq.n 8000e50 <manageCDC+0xa54>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
8000e70: 4b92 ldr r3, [pc, #584] @ (80010bc <manageCDC+0xcc0>)
8000e72: 881b ldrh r3, [r3, #0]
8000e74: 461a mov r2, r3
8000e76: 4b92 ldr r3, [pc, #584] @ (80010c0 <manageCDC+0xcc4>)
8000e78: 881b ldrh r3, [r3, #0]
8000e7a: f107 0010 add.w r0, r7, #16
8000e7e: 4991 ldr r1, [pc, #580] @ (80010c4 <manageCDC+0xcc8>)
8000e80: f00d fb10 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e84: bf00 nop
8000e86: f107 0310 add.w r3, r7, #16
8000e8a: 4618 mov r0, r3
8000e8c: f7ff f95e bl 800014c <strlen>
8000e90: 4603 mov r3, r0
8000e92: b29a uxth r2, r3
8000e94: f107 0310 add.w r3, r7, #16
8000e98: 4611 mov r1, r2
8000e9a: 4618 mov r0, r3
8000e9c: f00c ff24 bl 800dce8 <CDC_Transmit_FS>
8000ea0: 4603 mov r3, r0
8000ea2: 2b01 cmp r3, #1
8000ea4: d0ef beq.n 8000e86 <manageCDC+0xa8a>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
8000ea6: 4b88 ldr r3, [pc, #544] @ (80010c8 <manageCDC+0xccc>)
8000ea8: 881b ldrh r3, [r3, #0]
8000eaa: 4619 mov r1, r3
8000eac: 4b87 ldr r3, [pc, #540] @ (80010cc <manageCDC+0xcd0>)
8000eae: 881b ldrh r3, [r3, #0]
8000eb0: 461c mov r4, r3
8000eb2: 4b87 ldr r3, [pc, #540] @ (80010d0 <manageCDC+0xcd4>)
8000eb4: 881b ldrh r3, [r3, #0]
8000eb6: 461a mov r2, r3
8000eb8: 4b86 ldr r3, [pc, #536] @ (80010d4 <manageCDC+0xcd8>)
8000eba: 881b ldrh r3, [r3, #0]
8000ebc: f107 0010 add.w r0, r7, #16
8000ec0: 9301 str r3, [sp, #4]
8000ec2: 9200 str r2, [sp, #0]
8000ec4: 4623 mov r3, r4
8000ec6: 460a mov r2, r1
8000ec8: 4983 ldr r1, [pc, #524] @ (80010d8 <manageCDC+0xcdc>)
8000eca: f00d faeb bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ece: bf00 nop
8000ed0: f107 0310 add.w r3, r7, #16
8000ed4: 4618 mov r0, r3
8000ed6: f7ff f939 bl 800014c <strlen>
8000eda: 4603 mov r3, r0
8000edc: b29a uxth r2, r3
8000ede: f107 0310 add.w r3, r7, #16
8000ee2: 4611 mov r1, r2
8000ee4: 4618 mov r0, r3
8000ee6: f00c feff bl 800dce8 <CDC_Transmit_FS>
8000eea: 4603 mov r3, r0
8000eec: 2b01 cmp r3, #1
8000eee: d0ef beq.n 8000ed0 <manageCDC+0xad4>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
8000ef0: 4b7a ldr r3, [pc, #488] @ (80010dc <manageCDC+0xce0>)
8000ef2: 881b ldrh r3, [r3, #0]
8000ef4: 4619 mov r1, r3
8000ef6: 4b7a ldr r3, [pc, #488] @ (80010e0 <manageCDC+0xce4>)
8000ef8: 881b ldrh r3, [r3, #0]
8000efa: 461c mov r4, r3
8000efc: 4b79 ldr r3, [pc, #484] @ (80010e4 <manageCDC+0xce8>)
8000efe: 881b ldrh r3, [r3, #0]
8000f00: 461a mov r2, r3
8000f02: 4b79 ldr r3, [pc, #484] @ (80010e8 <manageCDC+0xcec>)
8000f04: 881b ldrh r3, [r3, #0]
8000f06: f107 0010 add.w r0, r7, #16
8000f0a: 9301 str r3, [sp, #4]
8000f0c: 9200 str r2, [sp, #0]
8000f0e: 4623 mov r3, r4
8000f10: 460a mov r2, r1
8000f12: 4976 ldr r1, [pc, #472] @ (80010ec <manageCDC+0xcf0>)
8000f14: f00d fac6 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000f18: bf00 nop
8000f1a: f107 0310 add.w r3, r7, #16
8000f1e: 4618 mov r0, r3
8000f20: f7ff f914 bl 800014c <strlen>
8000f24: 4603 mov r3, r0
8000f26: b29a uxth r2, r3
8000f28: f107 0310 add.w r3, r7, #16
8000f2c: 4611 mov r1, r2
8000f2e: 4618 mov r0, r3
8000f30: f00c feda bl 800dce8 <CDC_Transmit_FS>
8000f34: 4603 mov r3, r0
8000f36: 2b01 cmp r3, #1
8000f38: d0ef beq.n 8000f1a <manageCDC+0xb1e>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
8000f3a: 4b6d ldr r3, [pc, #436] @ (80010f0 <manageCDC+0xcf4>)
8000f3c: 881b ldrh r3, [r3, #0]
8000f3e: 4619 mov r1, r3
8000f40: 4b6c ldr r3, [pc, #432] @ (80010f4 <manageCDC+0xcf8>)
8000f42: 881b ldrh r3, [r3, #0]
8000f44: 461c mov r4, r3
8000f46: 4b6c ldr r3, [pc, #432] @ (80010f8 <manageCDC+0xcfc>)
8000f48: 881b ldrh r3, [r3, #0]
8000f4a: 461a mov r2, r3
8000f4c: 4b6b ldr r3, [pc, #428] @ (80010fc <manageCDC+0xd00>)
8000f4e: 881b ldrh r3, [r3, #0]
8000f50: f107 0010 add.w r0, r7, #16
8000f54: 9301 str r3, [sp, #4]
8000f56: 9200 str r2, [sp, #0]
8000f58: 4623 mov r3, r4
8000f5a: 460a mov r2, r1
8000f5c: 4968 ldr r1, [pc, #416] @ (8001100 <manageCDC+0xd04>)
8000f5e: f00d faa1 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000f62: bf00 nop
8000f64: f107 0310 add.w r3, r7, #16
8000f68: 4618 mov r0, r3
8000f6a: f7ff f8ef bl 800014c <strlen>
8000f6e: 4603 mov r3, r0
8000f70: b29a uxth r2, r3
8000f72: f107 0310 add.w r3, r7, #16
8000f76: 4611 mov r1, r2
8000f78: 4618 mov r0, r3
8000f7a: f00c feb5 bl 800dce8 <CDC_Transmit_FS>
8000f7e: 4603 mov r3, r0
8000f80: 2b01 cmp r3, #1
8000f82: d0ef beq.n 8000f64 <manageCDC+0xb68>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
8000f84: 4b5f ldr r3, [pc, #380] @ (8001104 <manageCDC+0xd08>)
8000f86: 881b ldrh r3, [r3, #0]
8000f88: 4619 mov r1, r3
8000f8a: 4b5f ldr r3, [pc, #380] @ (8001108 <manageCDC+0xd0c>)
8000f8c: 881b ldrh r3, [r3, #0]
8000f8e: 461c mov r4, r3
8000f90: 4b5e ldr r3, [pc, #376] @ (800110c <manageCDC+0xd10>)
8000f92: 881b ldrh r3, [r3, #0]
8000f94: 461a mov r2, r3
8000f96: 4b5e ldr r3, [pc, #376] @ (8001110 <manageCDC+0xd14>)
8000f98: 881b ldrh r3, [r3, #0]
8000f9a: f107 0010 add.w r0, r7, #16
8000f9e: 9301 str r3, [sp, #4]
8000fa0: 9200 str r2, [sp, #0]
8000fa2: 4623 mov r3, r4
8000fa4: 460a mov r2, r1
8000fa6: 495b ldr r1, [pc, #364] @ (8001114 <manageCDC+0xd18>)
8000fa8: f00d fa7c bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000fac: bf00 nop
8000fae: f107 0310 add.w r3, r7, #16
8000fb2: 4618 mov r0, r3
8000fb4: f7ff f8ca bl 800014c <strlen>
8000fb8: 4603 mov r3, r0
8000fba: b29a uxth r2, r3
8000fbc: f107 0310 add.w r3, r7, #16
8000fc0: 4611 mov r1, r2
8000fc2: 4618 mov r0, r3
8000fc4: f00c fe90 bl 800dce8 <CDC_Transmit_FS>
8000fc8: 4603 mov r3, r0
8000fca: 2b01 cmp r3, #1
8000fcc: d0ef beq.n 8000fae <manageCDC+0xbb2>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
8000fce: 4b52 ldr r3, [pc, #328] @ (8001118 <manageCDC+0xd1c>)
8000fd0: 881b ldrh r3, [r3, #0]
8000fd2: 4619 mov r1, r3
8000fd4: 4b51 ldr r3, [pc, #324] @ (800111c <manageCDC+0xd20>)
8000fd6: 881b ldrh r3, [r3, #0]
8000fd8: 461c mov r4, r3
8000fda: 4b51 ldr r3, [pc, #324] @ (8001120 <manageCDC+0xd24>)
8000fdc: 881b ldrh r3, [r3, #0]
8000fde: 461a mov r2, r3
8000fe0: 4b50 ldr r3, [pc, #320] @ (8001124 <manageCDC+0xd28>)
8000fe2: 881b ldrh r3, [r3, #0]
8000fe4: f107 0010 add.w r0, r7, #16
8000fe8: 9301 str r3, [sp, #4]
8000fea: 9200 str r2, [sp, #0]
8000fec: 4623 mov r3, r4
8000fee: 460a mov r2, r1
8000ff0: 494d ldr r1, [pc, #308] @ (8001128 <manageCDC+0xd2c>)
8000ff2: f00d fa57 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ff6: bf00 nop
8000ff8: f107 0310 add.w r3, r7, #16
8000ffc: 4618 mov r0, r3
8000ffe: f7ff f8a5 bl 800014c <strlen>
8001002: 4603 mov r3, r0
8001004: b29a uxth r2, r3
8001006: f107 0310 add.w r3, r7, #16
800100a: 4611 mov r1, r2
800100c: 4618 mov r0, r3
800100e: f00c fe6b bl 800dce8 <CDC_Transmit_FS>
8001012: 4603 mov r3, r0
8001014: 2b01 cmp r3, #1
8001016: d0ef beq.n 8000ff8 <manageCDC+0xbfc>
break;
8001018: e0b5 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?ev");
800101a: f107 0310 add.w r3, r7, #16
800101e: 4943 ldr r1, [pc, #268] @ (800112c <manageCDC+0xd30>)
8001020: 4618 mov r0, r3
8001022: f00d fa3f bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001026: bf00 nop
8001028: f107 0310 add.w r3, r7, #16
800102c: 4618 mov r0, r3
800102e: f7ff f88d bl 800014c <strlen>
8001032: 4603 mov r3, r0
8001034: b29a uxth r2, r3
8001036: f107 0310 add.w r3, r7, #16
800103a: 4611 mov r1, r2
800103c: 4618 mov r0, r3
800103e: f00c fe53 bl 800dce8 <CDC_Transmit_FS>
8001042: 4603 mov r3, r0
8001044: 2b01 cmp r3, #1
8001046: d0ef beq.n 8001028 <manageCDC+0xc2c>
break;
8001048: e09d b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?er|w|d|x|v");
800104a: f107 0310 add.w r3, r7, #16
800104e: 4938 ldr r1, [pc, #224] @ (8001130 <manageCDC+0xd34>)
8001050: 4618 mov r0, r3
8001052: f00d fa27 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001056: bf00 nop
8001058: f107 0310 add.w r3, r7, #16
800105c: 4618 mov r0, r3
800105e: f7ff f875 bl 800014c <strlen>
8001062: 4603 mov r3, r0
8001064: b29a uxth r2, r3
8001066: f107 0310 add.w r3, r7, #16
800106a: 4611 mov r1, r2
800106c: 4618 mov r0, r3
800106e: f00c fe3b bl 800dce8 <CDC_Transmit_FS>
8001072: 4603 mov r3, r0
8001074: 2b01 cmp r3, #1
8001076: d0ef beq.n 8001058 <manageCDC+0xc5c>
break;
8001078: e085 b.n 8001186 <manageCDC+0xd8a>
800107a: bf00 nop
800107c: 20000238 .word 0x20000238
8001080: 20000234 .word 0x20000234
8001084: 20000400 .word 0x20000400
8001088: 20000402 .word 0x20000402
800108c: 20000404 .word 0x20000404
8001090: 20000406 .word 0x20000406
8001094: 20000408 .word 0x20000408
8001098: 2000040a .word 0x2000040a
800109c: 2000040c .word 0x2000040c
80010a0: 2000040e .word 0x2000040e
80010a4: 0800f004 .word 0x0800f004
80010a8: 20000410 .word 0x20000410
80010ac: 20000412 .word 0x20000412
80010b0: 20000414 .word 0x20000414
80010b4: 20000416 .word 0x20000416
80010b8: 0800f060 .word 0x0800f060
80010bc: 20000418 .word 0x20000418
80010c0: 2000041e .word 0x2000041e
80010c4: 0800f0a4 .word 0x0800f0a4
80010c8: 20000420 .word 0x20000420
80010cc: 20000422 .word 0x20000422
80010d0: 20000424 .word 0x20000424
80010d4: 20000426 .word 0x20000426
80010d8: 0800f0bc .word 0x0800f0bc
80010dc: 20000428 .word 0x20000428
80010e0: 2000042a .word 0x2000042a
80010e4: 20000438 .word 0x20000438
80010e8: 2000043a .word 0x2000043a
80010ec: 0800f0f0 .word 0x0800f0f0
80010f0: 2000042c .word 0x2000042c
80010f4: 2000042e .word 0x2000042e
80010f8: 2000043c .word 0x2000043c
80010fc: 2000043e .word 0x2000043e
8001100: 0800f124 .word 0x0800f124
8001104: 20000430 .word 0x20000430
8001108: 20000432 .word 0x20000432
800110c: 20000440 .word 0x20000440
8001110: 20000442 .word 0x20000442
8001114: 0800f158 .word 0x0800f158
8001118: 20000434 .word 0x20000434
800111c: 20000436 .word 0x20000436
8001120: 20000444 .word 0x20000444
8001124: 20000446 .word 0x20000446
8001128: 0800f18c .word 0x0800f18c
800112c: 0800f1c0 .word 0x0800f1c0
8001130: 0800f1c8 .word 0x0800f1c8
sprintf((char*)s,"\n?eraa | ewaavvvv");
8001134: f107 0310 add.w r3, r7, #16
8001138: 491b ldr r1, [pc, #108] @ (80011a8 <manageCDC+0xdac>)
800113a: 4618 mov r0, r3
800113c: f00d f9b2 bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001140: bf00 nop
8001142: f107 0310 add.w r3, r7, #16
8001146: 4618 mov r0, r3
8001148: f7ff f800 bl 800014c <strlen>
800114c: 4603 mov r3, r0
800114e: b29a uxth r2, r3
8001150: f107 0310 add.w r3, r7, #16
8001154: 4611 mov r1, r2
8001156: 4618 mov r0, r3
8001158: f00c fdc6 bl 800dce8 <CDC_Transmit_FS>
800115c: 4603 mov r3, r0
800115e: 2b01 cmp r3, #1
8001160: d0ef beq.n 8001142 <manageCDC+0xd46>
break;
8001162: e010 b.n 8001186 <manageCDC+0xd8a>
default:
sprintf((char*)s,"\n?");
8001164: f107 0310 add.w r3, r7, #16
8001168: 4910 ldr r1, [pc, #64] @ (80011ac <manageCDC+0xdb0>)
800116a: 4618 mov r0, r3
800116c: f00d f99a bl 800e4a4 <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8001170: bf00 nop
8001172: f107 0310 add.w r3, r7, #16
8001176: 2102 movs r1, #2
8001178: 4618 mov r0, r3
800117a: f00c fdb5 bl 800dce8 <CDC_Transmit_FS>
800117e: 4603 mov r3, r0
8001180: 2b01 cmp r3, #1
8001182: d0f6 beq.n 8001172 <manageCDC+0xd76>
break;
8001184: e000 b.n 8001188 <manageCDC+0xd8c>
break;
8001186: bf00 nop
}
}
rxidx=0;
8001188: 4b09 ldr r3, [pc, #36] @ (80011b0 <manageCDC+0xdb4>)
800118a: 2200 movs r2, #0
800118c: 701a strb r2, [r3, #0]
800118e: e007 b.n 80011a0 <manageCDC+0xda4>
}else rxidx++;
8001190: 4b07 ldr r3, [pc, #28] @ (80011b0 <manageCDC+0xdb4>)
8001192: 781b ldrb r3, [r3, #0]
8001194: 3301 adds r3, #1
8001196: b2da uxtb r2, r3
8001198: 4b05 ldr r3, [pc, #20] @ (80011b0 <manageCDC+0xdb4>)
800119a: 701a strb r2, [r3, #0]
800119c: e000 b.n 80011a0 <manageCDC+0xda4>
if (rx < 0) return;
800119e: bf00 nop
// tiny spin or yield
}
}
80011a0: 37ec adds r7, #236 @ 0xec
80011a2: 46bd mov sp, r7
80011a4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
80011a8: 0800f1d8 .word 0x0800f1d8
80011ac: 0800f1ec .word 0x0800f1ec
80011b0: 20000234 .word 0x20000234
080011b4 <debug>:
extern UART_HandleTypeDef huart1;
extern uint8_t pulsanti;
extern uint16_t stPulsanti;
extern omCiclo_st stCiclo;
void debug(void){
80011b4: b580 push {r7, lr}
80011b6: b09a sub sp, #104 @ 0x68
80011b8: af00 add r7, sp, #0
static uint8_t mempulsanti=0;
static uint16_t memstPulsanti=0;
static omCiclo_st memstCiclo=omchiuso;
char s [100];
if(mempulsanti!=pulsanti){
80011ba: 4b2f ldr r3, [pc, #188] @ (8001278 <debug+0xc4>)
80011bc: 781a ldrb r2, [r3, #0]
80011be: 4b2f ldr r3, [pc, #188] @ (800127c <debug+0xc8>)
80011c0: 781b ldrb r3, [r3, #0]
80011c2: 429a cmp r2, r3
80011c4: d017 beq.n 80011f6 <debug+0x42>
mempulsanti=pulsanti;
80011c6: 4b2d ldr r3, [pc, #180] @ (800127c <debug+0xc8>)
80011c8: 781a ldrb r2, [r3, #0]
80011ca: 4b2b ldr r3, [pc, #172] @ (8001278 <debug+0xc4>)
80011cc: 701a strb r2, [r3, #0]
sprintf(s,"\npulsanti=%X",pulsanti);
80011ce: 4b2b ldr r3, [pc, #172] @ (800127c <debug+0xc8>)
80011d0: 781b ldrb r3, [r3, #0]
80011d2: 461a mov r2, r3
80011d4: 1d3b adds r3, r7, #4
80011d6: 492a ldr r1, [pc, #168] @ (8001280 <debug+0xcc>)
80011d8: 4618 mov r0, r3
80011da: f00d f963 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80011de: 1d3b adds r3, r7, #4
80011e0: 4618 mov r0, r3
80011e2: f7fe ffb3 bl 800014c <strlen>
80011e6: 4603 mov r3, r0
80011e8: b29a uxth r2, r3
80011ea: 1d39 adds r1, r7, #4
80011ec: f04f 33ff mov.w r3, #4294967295
80011f0: 4824 ldr r0, [pc, #144] @ (8001284 <debug+0xd0>)
80011f2: f008 fb67 bl 80098c4 <HAL_UART_Transmit>
}
if(memstPulsanti!=stPulsanti){
80011f6: 4b24 ldr r3, [pc, #144] @ (8001288 <debug+0xd4>)
80011f8: 881a ldrh r2, [r3, #0]
80011fa: 4b24 ldr r3, [pc, #144] @ (800128c <debug+0xd8>)
80011fc: 881b ldrh r3, [r3, #0]
80011fe: 429a cmp r2, r3
8001200: d017 beq.n 8001232 <debug+0x7e>
memstPulsanti=stPulsanti;
8001202: 4b22 ldr r3, [pc, #136] @ (800128c <debug+0xd8>)
8001204: 881a ldrh r2, [r3, #0]
8001206: 4b20 ldr r3, [pc, #128] @ (8001288 <debug+0xd4>)
8001208: 801a strh r2, [r3, #0]
sprintf(s,"\nstpulsanti=%X",stPulsanti);
800120a: 4b20 ldr r3, [pc, #128] @ (800128c <debug+0xd8>)
800120c: 881b ldrh r3, [r3, #0]
800120e: 461a mov r2, r3
8001210: 1d3b adds r3, r7, #4
8001212: 491f ldr r1, [pc, #124] @ (8001290 <debug+0xdc>)
8001214: 4618 mov r0, r3
8001216: f00d f945 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800121a: 1d3b adds r3, r7, #4
800121c: 4618 mov r0, r3
800121e: f7fe ff95 bl 800014c <strlen>
8001222: 4603 mov r3, r0
8001224: b29a uxth r2, r3
8001226: 1d39 adds r1, r7, #4
8001228: f04f 33ff mov.w r3, #4294967295
800122c: 4815 ldr r0, [pc, #84] @ (8001284 <debug+0xd0>)
800122e: f008 fb49 bl 80098c4 <HAL_UART_Transmit>
}
if(memstCiclo!=stCiclo){
8001232: 4b18 ldr r3, [pc, #96] @ (8001294 <debug+0xe0>)
8001234: 781a ldrb r2, [r3, #0]
8001236: 4b18 ldr r3, [pc, #96] @ (8001298 <debug+0xe4>)
8001238: 781b ldrb r3, [r3, #0]
800123a: 429a cmp r2, r3
800123c: d017 beq.n 800126e <debug+0xba>
memstCiclo=stCiclo;
800123e: 4b16 ldr r3, [pc, #88] @ (8001298 <debug+0xe4>)
8001240: 781a ldrb r2, [r3, #0]
8001242: 4b14 ldr r3, [pc, #80] @ (8001294 <debug+0xe0>)
8001244: 701a strb r2, [r3, #0]
sprintf(s,"\nstCiclo=%d",stCiclo);
8001246: 4b14 ldr r3, [pc, #80] @ (8001298 <debug+0xe4>)
8001248: 781b ldrb r3, [r3, #0]
800124a: 461a mov r2, r3
800124c: 1d3b adds r3, r7, #4
800124e: 4913 ldr r1, [pc, #76] @ (800129c <debug+0xe8>)
8001250: 4618 mov r0, r3
8001252: f00d f927 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001256: 1d3b adds r3, r7, #4
8001258: 4618 mov r0, r3
800125a: f7fe ff77 bl 800014c <strlen>
800125e: 4603 mov r3, r0
8001260: b29a uxth r2, r3
8001262: 1d39 adds r1, r7, #4
8001264: f04f 33ff mov.w r3, #4294967295
8001268: 4806 ldr r0, [pc, #24] @ (8001284 <debug+0xd0>)
800126a: f008 fb2b bl 80098c4 <HAL_UART_Transmit>
}
}
800126e: bf00 nop
8001270: 3768 adds r7, #104 @ 0x68
8001272: 46bd mov sp, r7
8001274: bd80 pop {r7, pc}
8001276: bf00 nop
8001278: 2000029c .word 0x2000029c
800127c: 200003f0 .word 0x200003f0
8001280: 0800f1f0 .word 0x0800f1f0
8001284: 200003a8 .word 0x200003a8
8001288: 2000029e .word 0x2000029e
800128c: 20000454 .word 0x20000454
8001290: 0800f200 .word 0x0800f200
8001294: 200002a0 .word 0x200002a0
8001298: 20000456 .word 0x20000456
800129c: 0800f210 .word 0x0800f210
080012a0 <EEW_Read>:
{
80012a0: b580 push {r7, lr}
80012a2: b082 sub sp, #8
80012a4: af00 add r7, sp, #0
80012a6: 4603 mov r3, r0
80012a8: 6039 str r1, [r7, #0]
80012aa: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
80012ac: 79fb ldrb r3, [r7, #7]
80012ae: b29b uxth r3, r3
80012b0: 3301 adds r3, #1
80012b2: b29b uxth r3, r3
80012b4: 6839 ldr r1, [r7, #0]
80012b6: 4618 mov r0, r3
80012b8: f000 f9ce bl 8001658 <EE_ReadVariable>
80012bc: 4603 mov r3, r0
}
80012be: 4618 mov r0, r3
80012c0: 3708 adds r7, #8
80012c2: 46bd mov sp, r7
80012c4: bd80 pop {r7, pc}
080012c6 <EEW_Write>:
{
80012c6: b580 push {r7, lr}
80012c8: b082 sub sp, #8
80012ca: af00 add r7, sp, #0
80012cc: 4603 mov r3, r0
80012ce: 460a mov r2, r1
80012d0: 71fb strb r3, [r7, #7]
80012d2: 4613 mov r3, r2
80012d4: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80012d6: 79fb ldrb r3, [r7, #7]
80012d8: b29b uxth r3, r3
80012da: 3301 adds r3, #1
80012dc: b29b uxth r3, r3
80012de: 88ba ldrh r2, [r7, #4]
80012e0: 4611 mov r1, r2
80012e2: 4618 mov r0, r3
80012e4: f000 f9d4 bl 8001690 <EE_WriteVariable>
80012e8: 4603 mov r3, r0
}
80012ea: 4618 mov r0, r3
80012ec: 3708 adds r7, #8
80012ee: 46bd mov sp, r7
80012f0: bd80 pop {r7, pc}
080012f2 <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
80012f2: b480 push {r7}
80012f4: b083 sub sp, #12
80012f6: af00 add r7, sp, #0
80012f8: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
80012fa: 687b ldr r3, [r7, #4]
80012fc: 881b ldrh r3, [r3, #0]
80012fe: b29b uxth r3, r3
}
8001300: 4618 mov r0, r3
8001302: 370c adds r7, #12
8001304: 46bd mov sp, r7
8001306: bc80 pop {r7}
8001308: 4770 bx lr
0800130a <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
800130a: b5b0 push {r4, r5, r7, lr}
800130c: b084 sub sp, #16
800130e: af00 add r7, sp, #0
8001310: 6078 str r0, [r7, #4]
8001312: 460b mov r3, r1
8001314: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
8001316: f004 feab bl 8006070 <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
800131a: 887b ldrh r3, [r7, #2]
800131c: 2200 movs r2, #0
800131e: 461c mov r4, r3
8001320: 4615 mov r5, r2
8001322: 4622 mov r2, r4
8001324: 462b mov r3, r5
8001326: 6879 ldr r1, [r7, #4]
8001328: 2001 movs r0, #1
800132a: f004 fe31 bl 8005f90 <HAL_FLASH_Program>
800132e: 4603 mov r3, r0
8001330: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
8001332: f004 fec3 bl 80060bc <HAL_FLASH_Lock>
return status;
8001336: 7bfb ldrb r3, [r7, #15]
}
8001338: 4618 mov r0, r3
800133a: 3710 adds r7, #16
800133c: 46bd mov sp, r7
800133e: bdb0 pop {r4, r5, r7, pc}
08001340 <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
8001340: b580 push {r7, lr}
8001342: b088 sub sp, #32
8001344: af00 add r7, sp, #0
8001346: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8001348: 2300 movs r3, #0
800134a: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
800134c: f004 fe90 bl 8006070 <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
8001350: 2300 movs r3, #0
8001352: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
8001354: 687b ldr r3, [r7, #4]
8001356: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8001358: 2301 movs r3, #1
800135a: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
800135c: f107 0208 add.w r2, r7, #8
8001360: f107 030c add.w r3, r7, #12
8001364: 4611 mov r1, r2
8001366: 4618 mov r0, r3
8001368: f004 ff6a bl 8006240 <HAL_FLASHEx_Erase>
800136c: 4603 mov r3, r0
800136e: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
8001370: f004 fea4 bl 80060bc <HAL_FLASH_Lock>
return status;
8001374: 7ffb ldrb r3, [r7, #31]
}
8001376: 4618 mov r0, r3
8001378: 3720 adds r7, #32
800137a: 46bd mov sp, r7
800137c: bd80 pop {r7, pc}
0800137e <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
800137e: b480 push {r7}
8001380: b087 sub sp, #28
8001382: af00 add r7, sp, #0
8001384: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8001386: 687b ldr r3, [r7, #4]
8001388: 3302 adds r3, #2
800138a: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
800138c: 687b ldr r3, [r7, #4]
800138e: f503 6380 add.w r3, r3, #1024 @ 0x400
8001392: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8001394: e00c b.n 80013b0 <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8001396: 697b ldr r3, [r7, #20]
8001398: 881b ldrh r3, [r3, #0]
800139a: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
800139c: 89fb ldrh r3, [r7, #14]
800139e: f64f 72ff movw r2, #65535 @ 0xffff
80013a2: 4293 cmp r3, r2
80013a4: d101 bne.n 80013aa <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
80013a6: 697b ldr r3, [r7, #20]
80013a8: e008 b.n 80013bc <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
80013aa: 697b ldr r3, [r7, #20]
80013ac: 3304 adds r3, #4
80013ae: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
80013b0: 693b ldr r3, [r7, #16]
80013b2: 3b03 subs r3, #3
80013b4: 697a ldr r2, [r7, #20]
80013b6: 429a cmp r2, r3
80013b8: d3ed bcc.n 8001396 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
80013ba: 2300 movs r3, #0
}
80013bc: 4618 mov r0, r3
80013be: 371c adds r7, #28
80013c0: 46bd mov sp, r7
80013c2: bc80 pop {r7}
80013c4: 4770 bx lr
080013c6 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */
/* Find latest value of VirtAddress in a specific page (scan forward) */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
80013c6: b480 push {r7}
80013c8: b089 sub sp, #36 @ 0x24
80013ca: af00 add r7, sp, #0
80013cc: 60f8 str r0, [r7, #12]
80013ce: 460b mov r3, r1
80013d0: 607a str r2, [r7, #4]
80013d2: 817b strh r3, [r7, #10]
uint32_t addr = pageBase + 2U; // skip status halfword
80013d4: 68fb ldr r3, [r7, #12]
80013d6: 3302 adds r3, #2
80013d8: 61fb str r3, [r7, #28]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
80013da: 68fb ldr r3, [r7, #12]
80013dc: f503 6380 add.w r3, r3, #1024 @ 0x400
80013e0: 617b str r3, [r7, #20]
EE_Status result = EE_NOT_FOUND;
80013e2: 2302 movs r3, #2
80013e4: 76fb strb r3, [r7, #27]
uint16_t lastVal = 0;
80013e6: 2300 movs r3, #0
80013e8: 833b strh r3, [r7, #24]
if (Data == NULL)
80013ea: 687b ldr r3, [r7, #4]
80013ec: 2b00 cmp r3, #0
80013ee: d118 bne.n 8001422 <EE_FindInPage+0x5c>
return EE_ERROR;
80013f0: 2301 movs r3, #1
80013f2: e024 b.n 800143e <EE_FindInPage+0x78>
while (addr <= (pageEnd - sizeof(EE_Record_t)))
{
uint16_t vaddr = *(__IO uint16_t *)addr;
80013f4: 69fb ldr r3, [r7, #28]
80013f6: 881b ldrh r3, [r3, #0]
80013f8: 827b strh r3, [r7, #18]
if (vaddr == 0xFFFFU)
80013fa: 8a7b ldrh r3, [r7, #18]
80013fc: f64f 72ff movw r2, #65535 @ 0xffff
8001400: 4293 cmp r3, r2
8001402: d014 beq.n 800142e <EE_FindInPage+0x68>
{
// First empty slot => no more records in this page
break;
}
uint16_t value = *(__IO uint16_t *)(addr + 2U);
8001404: 69fb ldr r3, [r7, #28]
8001406: 3302 adds r3, #2
8001408: 881b ldrh r3, [r3, #0]
800140a: 823b strh r3, [r7, #16]
if (vaddr == VirtAddress)
800140c: 8a7a ldrh r2, [r7, #18]
800140e: 897b ldrh r3, [r7, #10]
8001410: 429a cmp r2, r3
8001412: d103 bne.n 800141c <EE_FindInPage+0x56>
{
lastVal = value; // keep most recent
8001414: 8a3b ldrh r3, [r7, #16]
8001416: 833b strh r3, [r7, #24]
result = EE_OK;
8001418: 2300 movs r3, #0
800141a: 76fb strb r3, [r7, #27]
}
addr += sizeof(EE_Record_t); // move 4 bytes forward
800141c: 69fb ldr r3, [r7, #28]
800141e: 3304 adds r3, #4
8001420: 61fb str r3, [r7, #28]
while (addr <= (pageEnd - sizeof(EE_Record_t)))
8001422: 697b ldr r3, [r7, #20]
8001424: 3b04 subs r3, #4
8001426: 69fa ldr r2, [r7, #28]
8001428: 429a cmp r2, r3
800142a: d9e3 bls.n 80013f4 <EE_FindInPage+0x2e>
800142c: e000 b.n 8001430 <EE_FindInPage+0x6a>
break;
800142e: bf00 nop
}
if (result == EE_OK)
8001430: 7efb ldrb r3, [r7, #27]
8001432: 2b00 cmp r3, #0
8001434: d102 bne.n 800143c <EE_FindInPage+0x76>
*Data = lastVal;
8001436: 687b ldr r3, [r7, #4]
8001438: 8b3a ldrh r2, [r7, #24]
800143a: 801a strh r2, [r3, #0]
return result;
800143c: 7efb ldrb r3, [r7, #27]
}
800143e: 4618 mov r0, r3
8001440: 3724 adds r7, #36 @ 0x24
8001442: 46bd mov sp, r7
8001444: bc80 pop {r7}
8001446: 4770 bx lr
08001448 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8001448: b580 push {r7, lr}
800144a: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
800144c: 480f ldr r0, [pc, #60] @ (800148c <EE_Format+0x44>)
800144e: f7ff ff77 bl 8001340 <EE_FlashErasePage>
8001452: 4603 mov r3, r0
8001454: 2b00 cmp r3, #0
8001456: d001 beq.n 800145c <EE_Format+0x14>
return EE_STATUS_ERROR;
8001458: 2301 movs r3, #1
800145a: e015 b.n 8001488 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
800145c: 480c ldr r0, [pc, #48] @ (8001490 <EE_Format+0x48>)
800145e: f7ff ff6f bl 8001340 <EE_FlashErasePage>
8001462: 4603 mov r3, r0
8001464: 2b00 cmp r3, #0
8001466: d001 beq.n 800146c <EE_Format+0x24>
return EE_STATUS_ERROR;
8001468: 2301 movs r3, #1
800146a: e00d b.n 8001488 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
800146c: f64a 21aa movw r1, #43690 @ 0xaaaa
8001470: 4806 ldr r0, [pc, #24] @ (800148c <EE_Format+0x44>)
8001472: f7ff ff4a bl 800130a <EE_FlashProgramHalfWord>
8001476: 4603 mov r3, r0
8001478: 2b00 cmp r3, #0
800147a: d001 beq.n 8001480 <EE_Format+0x38>
return EE_STATUS_ERROR;
800147c: 2301 movs r3, #1
800147e: e003 b.n 8001488 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
8001480: 4b04 ldr r3, [pc, #16] @ (8001494 <EE_Format+0x4c>)
8001482: 4a02 ldr r2, [pc, #8] @ (800148c <EE_Format+0x44>)
8001484: 601a str r2, [r3, #0]
return EE_STATUS_OK;
8001486: 2300 movs r3, #0
}
8001488: 4618 mov r0, r3
800148a: bd80 pop {r7, pc}
800148c: 0800f800 .word 0x0800f800
8001490: 0800fc00 .word 0x0800fc00
8001494: 20000000 .word 0x20000000
08001498 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8001498: b480 push {r7}
800149a: b083 sub sp, #12
800149c: af00 add r7, sp, #0
800149e: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
80014a0: 687b ldr r3, [r7, #4]
80014a2: 4a05 ldr r2, [pc, #20] @ (80014b8 <EE_GetOtherPageBase+0x20>)
80014a4: 4293 cmp r3, r2
80014a6: d101 bne.n 80014ac <EE_GetOtherPageBase+0x14>
80014a8: 4b04 ldr r3, [pc, #16] @ (80014bc <EE_GetOtherPageBase+0x24>)
80014aa: e000 b.n 80014ae <EE_GetOtherPageBase+0x16>
80014ac: 4b02 ldr r3, [pc, #8] @ (80014b8 <EE_GetOtherPageBase+0x20>)
}
80014ae: 4618 mov r0, r3
80014b0: 370c adds r7, #12
80014b2: 46bd mov sp, r7
80014b4: bc80 pop {r7}
80014b6: 4770 bx lr
80014b8: 0800f800 .word 0x0800f800
80014bc: 0800fc00 .word 0x0800fc00
080014c0 <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
80014c0: b580 push {r7, lr}
80014c2: b088 sub sp, #32
80014c4: af00 add r7, sp, #0
80014c6: 4603 mov r3, r0
80014c8: 460a mov r2, r1
80014ca: 80fb strh r3, [r7, #6]
80014cc: 4613 mov r3, r2
80014ce: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
80014d0: 4b3c ldr r3, [pc, #240] @ (80015c4 <EE_PageTransfer+0x104>)
80014d2: 681b ldr r3, [r3, #0]
80014d4: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
80014d6: 6978 ldr r0, [r7, #20]
80014d8: f7ff ffde bl 8001498 <EE_GetOtherPageBase>
80014dc: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
80014de: 6938 ldr r0, [r7, #16]
80014e0: f7ff ff2e bl 8001340 <EE_FlashErasePage>
80014e4: 4603 mov r3, r0
80014e6: 2b00 cmp r3, #0
80014e8: d001 beq.n 80014ee <EE_PageTransfer+0x2e>
return EE_STATUS_ERROR;
80014ea: 2301 movs r3, #1
80014ec: e065 b.n 80015ba <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
80014ee: f245 5155 movw r1, #21845 @ 0x5555
80014f2: 6938 ldr r0, [r7, #16]
80014f4: f7ff ff09 bl 800130a <EE_FlashProgramHalfWord>
80014f8: 4603 mov r3, r0
80014fa: 2b00 cmp r3, #0
80014fc: d001 beq.n 8001502 <EE_PageTransfer+0x42>
return EE_STATUS_ERROR;
80014fe: 2301 movs r3, #1
8001500: e05b b.n 80015ba <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
8001502: 693b ldr r3, [r7, #16]
8001504: 3302 adds r3, #2
8001506: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8001508: 2300 movs r3, #0
800150a: 837b strh r3, [r7, #26]
800150c: e03c b.n 8001588 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
800150e: 8b7b ldrh r3, [r7, #26]
8001510: 4a2d ldr r2, [pc, #180] @ (80015c8 <EE_PageTransfer+0x108>)
8001512: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001516: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
8001518: 89fa ldrh r2, [r7, #14]
800151a: 88fb ldrh r3, [r7, #6]
800151c: 429a cmp r2, r3
800151e: d102 bne.n 8001526 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
8001520: 88bb ldrh r3, [r7, #4]
8001522: 817b strh r3, [r7, #10]
8001524: e00b b.n 800153e <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8001526: f107 020a add.w r2, r7, #10
800152a: 89fb ldrh r3, [r7, #14]
800152c: 4619 mov r1, r3
800152e: 6978 ldr r0, [r7, #20]
8001530: f7ff ff49 bl 80013c6 <EE_FindInPage>
8001534: 4603 mov r3, r0
8001536: 737b strb r3, [r7, #13]
if (st != EE_STATUS_OK)
8001538: 7b7b ldrb r3, [r7, #13]
800153a: 2b00 cmp r3, #0
800153c: d120 bne.n 8001580 <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
800153e: 89fb ldrh r3, [r7, #14]
8001540: 4619 mov r1, r3
8001542: 69f8 ldr r0, [r7, #28]
8001544: f7ff fee1 bl 800130a <EE_FlashProgramHalfWord>
8001548: 4603 mov r3, r0
800154a: 2b00 cmp r3, #0
800154c: d001 beq.n 8001552 <EE_PageTransfer+0x92>
return EE_STATUS_ERROR;
800154e: 2301 movs r3, #1
8001550: e033 b.n 80015ba <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
8001552: 69fb ldr r3, [r7, #28]
8001554: 3302 adds r3, #2
8001556: 897a ldrh r2, [r7, #10]
8001558: 4611 mov r1, r2
800155a: 4618 mov r0, r3
800155c: f7ff fed5 bl 800130a <EE_FlashProgramHalfWord>
8001560: 4603 mov r3, r0
8001562: 2b00 cmp r3, #0
8001564: d001 beq.n 800156a <EE_PageTransfer+0xaa>
return EE_STATUS_ERROR;
8001566: 2301 movs r3, #1
8001568: e027 b.n 80015ba <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
800156a: 69fb ldr r3, [r7, #28]
800156c: 3304 adds r3, #4
800156e: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
8001570: 693b ldr r3, [r7, #16]
8001572: f503 6380 add.w r3, r3, #1024 @ 0x400
8001576: 69fa ldr r2, [r7, #28]
8001578: 429a cmp r2, r3
800157a: d302 bcc.n 8001582 <EE_PageTransfer+0xc2>
return EE_STATUS_NO_SPACE;
800157c: 2303 movs r3, #3
800157e: e01c b.n 80015ba <EE_PageTransfer+0xfa>
continue;
8001580: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8001582: 8b7b ldrh r3, [r7, #26]
8001584: 3301 adds r3, #1
8001586: 837b strh r3, [r7, #26]
8001588: 8b7b ldrh r3, [r7, #26]
800158a: 2b3f cmp r3, #63 @ 0x3f
800158c: d9bf bls.n 800150e <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
800158e: 6978 ldr r0, [r7, #20]
8001590: f7ff fed6 bl 8001340 <EE_FlashErasePage>
8001594: 4603 mov r3, r0
8001596: 2b00 cmp r3, #0
8001598: d001 beq.n 800159e <EE_PageTransfer+0xde>
return EE_STATUS_ERROR;
800159a: 2301 movs r3, #1
800159c: e00d b.n 80015ba <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
800159e: f64a 21aa movw r1, #43690 @ 0xaaaa
80015a2: 6938 ldr r0, [r7, #16]
80015a4: f7ff feb1 bl 800130a <EE_FlashProgramHalfWord>
80015a8: 4603 mov r3, r0
80015aa: 2b00 cmp r3, #0
80015ac: d001 beq.n 80015b2 <EE_PageTransfer+0xf2>
return EE_STATUS_ERROR;
80015ae: 2301 movs r3, #1
80015b0: e003 b.n 80015ba <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
80015b2: 4a04 ldr r2, [pc, #16] @ (80015c4 <EE_PageTransfer+0x104>)
80015b4: 693b ldr r3, [r7, #16]
80015b6: 6013 str r3, [r2, #0]
return EE_STATUS_OK;
80015b8: 2300 movs r3, #0
}
80015ba: 4618 mov r0, r3
80015bc: 3720 adds r7, #32
80015be: 46bd mov sp, r7
80015c0: bd80 pop {r7, pc}
80015c2: bf00 nop
80015c4: 20000000 .word 0x20000000
80015c8: 0800f528 .word 0x0800f528
080015cc <EE_Init>:
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
* PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...)
*/
uint16_t EE_Init(void)
{
80015cc: b580 push {r7, lr}
80015ce: b082 sub sp, #8
80015d0: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
80015d2: 481e ldr r0, [pc, #120] @ (800164c <EE_Init+0x80>)
80015d4: f7ff fe8d bl 80012f2 <EE_GetPageStatus>
80015d8: 4603 mov r3, r0
80015da: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
80015dc: 481c ldr r0, [pc, #112] @ (8001650 <EE_Init+0x84>)
80015de: f7ff fe88 bl 80012f2 <EE_GetPageStatus>
80015e2: 4603 mov r3, r0
80015e4: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
80015e6: 88fb ldrh r3, [r7, #6]
80015e8: f64f 72ff movw r2, #65535 @ 0xffff
80015ec: 4293 cmp r3, r2
80015ee: d108 bne.n 8001602 <EE_Init+0x36>
80015f0: 88bb ldrh r3, [r7, #4]
80015f2: f64f 72ff movw r2, #65535 @ 0xffff
80015f6: 4293 cmp r3, r2
80015f8: d103 bne.n 8001602 <EE_Init+0x36>
{
/* Fresh device -> format */
return (uint16_t)EE_Format();
80015fa: f7ff ff25 bl 8001448 <EE_Format>
80015fe: 4603 mov r3, r0
8001600: e020 b.n 8001644 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
8001602: 88fb ldrh r3, [r7, #6]
8001604: f64a 22aa movw r2, #43690 @ 0xaaaa
8001608: 4293 cmp r3, r2
800160a: d109 bne.n 8001620 <EE_Init+0x54>
800160c: 88bb ldrh r3, [r7, #4]
800160e: f64f 72ff movw r2, #65535 @ 0xffff
8001612: 4293 cmp r3, r2
8001614: d104 bne.n 8001620 <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
8001616: 4b0f ldr r3, [pc, #60] @ (8001654 <EE_Init+0x88>)
8001618: 4a0c ldr r2, [pc, #48] @ (800164c <EE_Init+0x80>)
800161a: 601a str r2, [r3, #0]
return EE_OK;
800161c: 2300 movs r3, #0
800161e: e011 b.n 8001644 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
8001620: 88bb ldrh r3, [r7, #4]
8001622: f64a 22aa movw r2, #43690 @ 0xaaaa
8001626: 4293 cmp r3, r2
8001628: d109 bne.n 800163e <EE_Init+0x72>
800162a: 88fb ldrh r3, [r7, #6]
800162c: f64f 72ff movw r2, #65535 @ 0xffff
8001630: 4293 cmp r3, r2
8001632: d104 bne.n 800163e <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8001634: 4b07 ldr r3, [pc, #28] @ (8001654 <EE_Init+0x88>)
8001636: 4a06 ldr r2, [pc, #24] @ (8001650 <EE_Init+0x84>)
8001638: 601a str r2, [r3, #0]
return EE_OK;
800163a: 2300 movs r3, #0
800163c: e002 b.n 8001644 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return (uint16_t)EE_Format();
800163e: f7ff ff03 bl 8001448 <EE_Format>
8001642: 4603 mov r3, r0
}
}
8001644: 4618 mov r0, r3
8001646: 3708 adds r7, #8
8001648: 46bd mov sp, r7
800164a: bd80 pop {r7, pc}
800164c: 0800f800 .word 0x0800f800
8001650: 0800fc00 .word 0x0800fc00
8001654: 20000000 .word 0x20000000
08001658 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
* PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t)
*/
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8001658: b580 push {r7, lr}
800165a: b084 sub sp, #16
800165c: af00 add r7, sp, #0
800165e: 4603 mov r3, r0
8001660: 6039 str r1, [r7, #0]
8001662: 80fb strh r3, [r7, #6]
EE_Status st;
if (Data == NULL)
8001664: 683b ldr r3, [r7, #0]
8001666: 2b00 cmp r3, #0
8001668: d101 bne.n 800166e <EE_ReadVariable+0x16>
return EE_ERROR;
800166a: 2301 movs r3, #1
800166c: e00a b.n 8001684 <EE_ReadVariable+0x2c>
st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
800166e: 4b07 ldr r3, [pc, #28] @ (800168c <EE_ReadVariable+0x34>)
8001670: 681b ldr r3, [r3, #0]
8001672: 88f9 ldrh r1, [r7, #6]
8001674: 683a ldr r2, [r7, #0]
8001676: 4618 mov r0, r3
8001678: f7ff fea5 bl 80013c6 <EE_FindInPage>
800167c: 4603 mov r3, r0
800167e: 73fb strb r3, [r7, #15]
return (uint16_t)st;
8001680: 7bfb ldrb r3, [r7, #15]
8001682: b29b uxth r3, r3
}
8001684: 4618 mov r0, r3
8001686: 3710 adds r7, #16
8001688: 46bd mov sp, r7
800168a: bd80 pop {r7, pc}
800168c: 20000000 .word 0x20000000
08001690 <EE_WriteVariable>:
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
* PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t)
*/
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
8001690: b580 push {r7, lr}
8001692: b084 sub sp, #16
8001694: af00 add r7, sp, #0
8001696: 4603 mov r3, r0
8001698: 460a mov r2, r1
800169a: 80fb strh r3, [r7, #6]
800169c: 4613 mov r3, r2
800169e: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
80016a0: 4b17 ldr r3, [pc, #92] @ (8001700 <EE_WriteVariable+0x70>)
80016a2: 681b ldr r3, [r3, #0]
80016a4: 4618 mov r0, r3
80016a6: f7ff fe6a bl 800137e <EE_FindFreeAddress>
80016aa: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
80016ac: 68fb ldr r3, [r7, #12]
80016ae: 2b00 cmp r3, #0
80016b0: d017 beq.n 80016e2 <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
80016b2: 88fb ldrh r3, [r7, #6]
80016b4: 4619 mov r1, r3
80016b6: 68f8 ldr r0, [r7, #12]
80016b8: f7ff fe27 bl 800130a <EE_FlashProgramHalfWord>
80016bc: 4603 mov r3, r0
80016be: 2b00 cmp r3, #0
80016c0: d001 beq.n 80016c6 <EE_WriteVariable+0x36>
return EE_ERROR;
80016c2: 2301 movs r3, #1
80016c4: e017 b.n 80016f6 <EE_WriteVariable+0x66>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
80016c6: 68fb ldr r3, [r7, #12]
80016c8: 3302 adds r3, #2
80016ca: 88ba ldrh r2, [r7, #4]
80016cc: 4611 mov r1, r2
80016ce: 4618 mov r0, r3
80016d0: f7ff fe1b bl 800130a <EE_FlashProgramHalfWord>
80016d4: 4603 mov r3, r0
80016d6: 2b00 cmp r3, #0
80016d8: d001 beq.n 80016de <EE_WriteVariable+0x4e>
return EE_ERROR;
80016da: 2301 movs r3, #1
80016dc: e00b b.n 80016f6 <EE_WriteVariable+0x66>
return EE_OK;
80016de: 2300 movs r3, #0
80016e0: e009 b.n 80016f6 <EE_WriteVariable+0x66>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
80016e2: 88ba ldrh r2, [r7, #4]
80016e4: 88fb ldrh r3, [r7, #6]
80016e6: 4611 mov r1, r2
80016e8: 4618 mov r0, r3
80016ea: f7ff fee9 bl 80014c0 <EE_PageTransfer>
80016ee: 4603 mov r3, r0
80016f0: 72fb strb r3, [r7, #11]
return (uint16_t)st;
80016f2: 7afb ldrb r3, [r7, #11]
80016f4: b29b uxth r3, r3
}
80016f6: 4618 mov r0, r3
80016f8: 3710 adds r7, #16
80016fa: 46bd mov sp, r7
80016fc: bd80 pop {r7, pc}
80016fe: bf00 nop
8001700: 20000000 .word 0x20000000
08001704 <loadDefault>:
void loadDefault(void){
8001704: b580 push {r7, lr}
8001706: b09a sub sp, #104 @ 0x68
8001708: af00 add r7, sp, #0
uint8_t i;
char s[100];
uint16_t st;
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
800170a: 2300 movs r3, #0
800170c: f887 3067 strb.w r3, [r7, #103] @ 0x67
8001710: e035 b.n 800177e <loadDefault+0x7a>
st=EEW_Write(i,deftab[i]);
8001712: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001716: 4a1e ldr r2, [pc, #120] @ (8001790 <loadDefault+0x8c>)
8001718: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
800171c: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001720: 4611 mov r1, r2
8001722: 4618 mov r0, r3
8001724: f7ff fdcf bl 80012c6 <EEW_Write>
8001728: 4603 mov r3, r0
800172a: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
if (st == EE_OK)sprintf((char*)s,"\ndone %d=%d",i,deftab[i]);
800172e: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
8001732: 2b00 cmp r3, #0
8001734: d10b bne.n 800174e <loadDefault+0x4a>
8001736: f897 2067 ldrb.w r2, [r7, #103] @ 0x67
800173a: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
800173e: 4914 ldr r1, [pc, #80] @ (8001790 <loadDefault+0x8c>)
8001740: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8001744: 4638 mov r0, r7
8001746: 4913 ldr r1, [pc, #76] @ (8001794 <loadDefault+0x90>)
8001748: f00c feac bl 800e4a4 <siprintf>
800174c: e006 b.n 800175c <loadDefault+0x58>
else sprintf((char*)s,"\nee write error %d", st);
800174e: f8b7 2064 ldrh.w r2, [r7, #100] @ 0x64
8001752: 463b mov r3, r7
8001754: 4910 ldr r1, [pc, #64] @ (8001798 <loadDefault+0x94>)
8001756: 4618 mov r0, r3
8001758: f00c fea4 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800175c: 463b mov r3, r7
800175e: 4618 mov r0, r3
8001760: f7fe fcf4 bl 800014c <strlen>
8001764: 4603 mov r3, r0
8001766: b29a uxth r2, r3
8001768: 4639 mov r1, r7
800176a: f04f 33ff mov.w r3, #4294967295
800176e: 480b ldr r0, [pc, #44] @ (800179c <loadDefault+0x98>)
8001770: f008 f8a8 bl 80098c4 <HAL_UART_Transmit>
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
8001774: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001778: 3301 adds r3, #1
800177a: f887 3067 strb.w r3, [r7, #103] @ 0x67
800177e: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001782: 2b3f cmp r3, #63 @ 0x3f
8001784: d9c5 bls.n 8001712 <loadDefault+0xe>
}
}
8001786: bf00 nop
8001788: bf00 nop
800178a: 3768 adds r7, #104 @ 0x68
800178c: 46bd mov sp, r7
800178e: bd80 pop {r7, pc}
8001790: 0800f4a8 .word 0x0800f4a8
8001794: 0800f21c .word 0x0800f21c
8001798: 0800f228 .word 0x0800f228
800179c: 200003a8 .word 0x200003a8
080017a0 <loadEE>:
void loadEE(void){
80017a0: b5f0 push {r4, r5, r6, r7, lr}
80017a2: b0b9 sub sp, #228 @ 0xe4
80017a4: af06 add r7, sp, #24
char s [200];
EEW_Read(M1PWMAP, &m1pwmap);
80017a6: 49bc ldr r1, [pc, #752] @ (8001a98 <loadEE+0x2f8>)
80017a8: 2000 movs r0, #0
80017aa: f7ff fd79 bl 80012a0 <EEW_Read>
EEW_Read(M1PWMCH, &m1pwmch);
80017ae: 49bb ldr r1, [pc, #748] @ (8001a9c <loadEE+0x2fc>)
80017b0: 2001 movs r0, #1
80017b2: f7ff fd75 bl 80012a0 <EEW_Read>
EEW_Read(M2PWMAP, &m2pwmap);
80017b6: 49ba ldr r1, [pc, #744] @ (8001aa0 <loadEE+0x300>)
80017b8: 2002 movs r0, #2
80017ba: f7ff fd71 bl 80012a0 <EEW_Read>
EEW_Read(M2PWMCH, &m2pwmch);
80017be: 49b9 ldr r1, [pc, #740] @ (8001aa4 <loadEE+0x304>)
80017c0: 2003 movs r0, #3
80017c2: f7ff fd6d bl 80012a0 <EEW_Read>
EEW_Read(M3PWMAP, &m3pwmap);
80017c6: 49b8 ldr r1, [pc, #736] @ (8001aa8 <loadEE+0x308>)
80017c8: 2004 movs r0, #4
80017ca: f7ff fd69 bl 80012a0 <EEW_Read>
EEW_Read(M3PWMCH, &m3pwmch);
80017ce: 49b7 ldr r1, [pc, #732] @ (8001aac <loadEE+0x30c>)
80017d0: 2005 movs r0, #5
80017d2: f7ff fd65 bl 80012a0 <EEW_Read>
EEW_Read(M4PWMAP, &m4pwmap);
80017d6: 49b6 ldr r1, [pc, #728] @ (8001ab0 <loadEE+0x310>)
80017d8: 2006 movs r0, #6
80017da: f7ff fd61 bl 80012a0 <EEW_Read>
EEW_Read(M4PWMCH, &m4pwmch);
80017de: 49b5 ldr r1, [pc, #724] @ (8001ab4 <loadEE+0x314>)
80017e0: 2007 movs r0, #7
80017e2: f7ff fd5d bl 80012a0 <EEW_Read>
EEW_Read(M1RAMPSTART, &mrampstart[M1-1]);
80017e6: 49b4 ldr r1, [pc, #720] @ (8001ab8 <loadEE+0x318>)
80017e8: 2008 movs r0, #8
80017ea: f7ff fd59 bl 80012a0 <EEW_Read>
EEW_Read(M2RAMPSTART, &mrampstart[M2-1]);
80017ee: 49b3 ldr r1, [pc, #716] @ (8001abc <loadEE+0x31c>)
80017f0: 2009 movs r0, #9
80017f2: f7ff fd55 bl 80012a0 <EEW_Read>
EEW_Read(M3RAMPSTART, &mrampstart[M3-1]);
80017f6: 49b2 ldr r1, [pc, #712] @ (8001ac0 <loadEE+0x320>)
80017f8: 200a movs r0, #10
80017fa: f7ff fd51 bl 80012a0 <EEW_Read>
EEW_Read(M4RAMPSTART, &mrampstart[M4-1]);
80017fe: 49b1 ldr r1, [pc, #708] @ (8001ac4 <loadEE+0x324>)
8001800: 200b movs r0, #11
8001802: f7ff fd4d bl 80012a0 <EEW_Read>
EEW_Read(M1TIMEOUTMAN, &m1TimeoutMan);
8001806: 49b0 ldr r1, [pc, #704] @ (8001ac8 <loadEE+0x328>)
8001808: 200c movs r0, #12
800180a: f7ff fd49 bl 80012a0 <EEW_Read>
EEW_Read(M2TIMEOUTMAN, &m2TimeoutMan);
800180e: 49af ldr r1, [pc, #700] @ (8001acc <loadEE+0x32c>)
8001810: 200d movs r0, #13
8001812: f7ff fd45 bl 80012a0 <EEW_Read>
EEW_Read(M3TIMEOUTMAN, &m3TimeoutMan);
8001816: 49ae ldr r1, [pc, #696] @ (8001ad0 <loadEE+0x330>)
8001818: 200e movs r0, #14
800181a: f7ff fd41 bl 80012a0 <EEW_Read>
EEW_Read(M4TIMEOUTMAN, &m4TimeoutMan);
800181e: 49ad ldr r1, [pc, #692] @ (8001ad4 <loadEE+0x334>)
8001820: 200f movs r0, #15
8001822: f7ff fd3d bl 80012a0 <EEW_Read>
EEW_Read(THANEM, &thanem);
8001826: 49ac ldr r1, [pc, #688] @ (8001ad8 <loadEE+0x338>)
8001828: 2018 movs r0, #24
800182a: f7ff fd39 bl 80012a0 <EEW_Read>
EEW_Read(TANEM, &tanem);
800182e: 49ab ldr r1, [pc, #684] @ (8001adc <loadEE+0x33c>)
8001830: 2019 movs r0, #25
8001832: f7ff fd35 bl 80012a0 <EEW_Read>
EEW_Read(M1PWMMAN, &m1pwmMan);
8001836: 49aa ldr r1, [pc, #680] @ (8001ae0 <loadEE+0x340>)
8001838: 201a movs r0, #26
800183a: f7ff fd31 bl 80012a0 <EEW_Read>
EEW_Read(M2PWMMAN, &m2pwmMan);
800183e: 49a9 ldr r1, [pc, #676] @ (8001ae4 <loadEE+0x344>)
8001840: 201b movs r0, #27
8001842: f7ff fd2d bl 80012a0 <EEW_Read>
EEW_Read(M3PWMMAN, &m3pwmMan);
8001846: 49a8 ldr r1, [pc, #672] @ (8001ae8 <loadEE+0x348>)
8001848: 201c movs r0, #28
800184a: f7ff fd29 bl 80012a0 <EEW_Read>
EEW_Read(M4PWMMAN, &m4pwmMan);
800184e: 49a7 ldr r1, [pc, #668] @ (8001aec <loadEE+0x34c>)
8001850: 201d movs r0, #29
8001852: f7ff fd25 bl 80012a0 <EEW_Read>
EEW_Read(TRAMPMAN, &trampman);
8001856: 49a6 ldr r1, [pc, #664] @ (8001af0 <loadEE+0x350>)
8001858: 201e movs r0, #30
800185a: f7ff fd21 bl 80012a0 <EEW_Read>
EEW_Read(TRAMP, &tramp);
800185e: 49a5 ldr r1, [pc, #660] @ (8001af4 <loadEE+0x354>)
8001860: 201f movs r0, #31
8001862: f7ff fd1d bl 80012a0 <EEW_Read>
EEW_Read(APM1START,&apM1start);
8001866: 49a4 ldr r1, [pc, #656] @ (8001af8 <loadEE+0x358>)
8001868: 2020 movs r0, #32
800186a: f7ff fd19 bl 80012a0 <EEW_Read>
EEW_Read(APM1STOP ,&apM1stop);
800186e: 49a3 ldr r1, [pc, #652] @ (8001afc <loadEE+0x35c>)
8001870: 2021 movs r0, #33 @ 0x21
8001872: f7ff fd15 bl 80012a0 <EEW_Read>
EEW_Read(APM2START,&apM2start);
8001876: 49a2 ldr r1, [pc, #648] @ (8001b00 <loadEE+0x360>)
8001878: 2022 movs r0, #34 @ 0x22
800187a: f7ff fd11 bl 80012a0 <EEW_Read>
EEW_Read(APM2STOP ,&apM2stop);
800187e: 49a1 ldr r1, [pc, #644] @ (8001b04 <loadEE+0x364>)
8001880: 2023 movs r0, #35 @ 0x23
8001882: f7ff fd0d bl 80012a0 <EEW_Read>
EEW_Read(APM3START,&apM3start);
8001886: 49a0 ldr r1, [pc, #640] @ (8001b08 <loadEE+0x368>)
8001888: 2024 movs r0, #36 @ 0x24
800188a: f7ff fd09 bl 80012a0 <EEW_Read>
EEW_Read(APM3STOP ,&apM3stop);
800188e: 499f ldr r1, [pc, #636] @ (8001b0c <loadEE+0x36c>)
8001890: 2025 movs r0, #37 @ 0x25
8001892: f7ff fd05 bl 80012a0 <EEW_Read>
EEW_Read(APM4START,&apM4start);
8001896: 499e ldr r1, [pc, #632] @ (8001b10 <loadEE+0x370>)
8001898: 2026 movs r0, #38 @ 0x26
800189a: f7ff fd01 bl 80012a0 <EEW_Read>
EEW_Read(APM4STOP ,&apM4stop);
800189e: 499d ldr r1, [pc, #628] @ (8001b14 <loadEE+0x374>)
80018a0: 2027 movs r0, #39 @ 0x27
80018a2: f7ff fcfd bl 80012a0 <EEW_Read>
EEW_Read(CHM1START,&chM1start);
80018a6: 499c ldr r1, [pc, #624] @ (8001b18 <loadEE+0x378>)
80018a8: 2028 movs r0, #40 @ 0x28
80018aa: f7ff fcf9 bl 80012a0 <EEW_Read>
EEW_Read(CHM1STOP ,&chM1stop);
80018ae: 499b ldr r1, [pc, #620] @ (8001b1c <loadEE+0x37c>)
80018b0: 2029 movs r0, #41 @ 0x29
80018b2: f7ff fcf5 bl 80012a0 <EEW_Read>
EEW_Read(CHM2START,&chM2start);
80018b6: 499a ldr r1, [pc, #616] @ (8001b20 <loadEE+0x380>)
80018b8: 202a movs r0, #42 @ 0x2a
80018ba: f7ff fcf1 bl 80012a0 <EEW_Read>
EEW_Read(CHM2STOP ,&chM2stop);
80018be: 4999 ldr r1, [pc, #612] @ (8001b24 <loadEE+0x384>)
80018c0: 202b movs r0, #43 @ 0x2b
80018c2: f7ff fced bl 80012a0 <EEW_Read>
EEW_Read(CHM3START,&chM3start);
80018c6: 4998 ldr r1, [pc, #608] @ (8001b28 <loadEE+0x388>)
80018c8: 202c movs r0, #44 @ 0x2c
80018ca: f7ff fce9 bl 80012a0 <EEW_Read>
EEW_Read(CHM3STOP ,&chM3stop);
80018ce: 4997 ldr r1, [pc, #604] @ (8001b2c <loadEE+0x38c>)
80018d0: 202d movs r0, #45 @ 0x2d
80018d2: f7ff fce5 bl 80012a0 <EEW_Read>
EEW_Read(CHM4START,&chM4start);
80018d6: 4996 ldr r1, [pc, #600] @ (8001b30 <loadEE+0x390>)
80018d8: 202e movs r0, #46 @ 0x2e
80018da: f7ff fce1 bl 80012a0 <EEW_Read>
EEW_Read(CHM4STOP ,&chM4stop);
80018de: 4995 ldr r1, [pc, #596] @ (8001b34 <loadEE+0x394>)
80018e0: 202f movs r0, #47 @ 0x2f
80018e2: f7ff fcdd bl 80012a0 <EEW_Read>
EEW_Read(FLAGPAR ,&flagPar);
80018e6: 4994 ldr r1, [pc, #592] @ (8001b38 <loadEE+0x398>)
80018e8: 203f movs r0, #63 @ 0x3f
80018ea: f7ff fcd9 bl 80012a0 <EEW_Read>
sprintf((char*)s,"LoadEE\n");
80018ee: 463b mov r3, r7
80018f0: 4992 ldr r1, [pc, #584] @ (8001b3c <loadEE+0x39c>)
80018f2: 4618 mov r0, r3
80018f4: f00c fdd6 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80018f8: 463b mov r3, r7
80018fa: 4618 mov r0, r3
80018fc: f7fe fc26 bl 800014c <strlen>
8001900: 4603 mov r3, r0
8001902: b29a uxth r2, r3
8001904: 4639 mov r1, r7
8001906: f04f 33ff mov.w r3, #4294967295
800190a: 488d ldr r0, [pc, #564] @ (8001b40 <loadEE+0x3a0>)
800190c: f007 ffda bl 80098c4 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8001910: 4b61 ldr r3, [pc, #388] @ (8001a98 <loadEE+0x2f8>)
8001912: 881b ldrh r3, [r3, #0]
8001914: 469c mov ip, r3
8001916: 4b61 ldr r3, [pc, #388] @ (8001a9c <loadEE+0x2fc>)
8001918: 881b ldrh r3, [r3, #0]
800191a: 469e mov lr, r3
800191c: 4b60 ldr r3, [pc, #384] @ (8001aa0 <loadEE+0x300>)
800191e: 881b ldrh r3, [r3, #0]
8001920: 461a mov r2, r3
8001922: 4b60 ldr r3, [pc, #384] @ (8001aa4 <loadEE+0x304>)
8001924: 881b ldrh r3, [r3, #0]
8001926: 4619 mov r1, r3
8001928: 4b5f ldr r3, [pc, #380] @ (8001aa8 <loadEE+0x308>)
800192a: 881b ldrh r3, [r3, #0]
800192c: 461c mov r4, r3
800192e: 4b5f ldr r3, [pc, #380] @ (8001aac <loadEE+0x30c>)
8001930: 881b ldrh r3, [r3, #0]
8001932: 461d mov r5, r3
8001934: 4b5e ldr r3, [pc, #376] @ (8001ab0 <loadEE+0x310>)
8001936: 881b ldrh r3, [r3, #0]
8001938: 461e mov r6, r3
800193a: 4b5e ldr r3, [pc, #376] @ (8001ab4 <loadEE+0x314>)
800193c: 881b ldrh r3, [r3, #0]
800193e: 4638 mov r0, r7
8001940: 9305 str r3, [sp, #20]
8001942: 9604 str r6, [sp, #16]
8001944: 9503 str r5, [sp, #12]
8001946: 9402 str r4, [sp, #8]
8001948: 9101 str r1, [sp, #4]
800194a: 9200 str r2, [sp, #0]
800194c: 4673 mov r3, lr
800194e: 4662 mov r2, ip
8001950: 497c ldr r1, [pc, #496] @ (8001b44 <loadEE+0x3a4>)
8001952: f00c fda7 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001956: 463b mov r3, r7
8001958: 4618 mov r0, r3
800195a: f7fe fbf7 bl 800014c <strlen>
800195e: 4603 mov r3, r0
8001960: b29a uxth r2, r3
8001962: 4639 mov r1, r7
8001964: f04f 33ff mov.w r3, #4294967295
8001968: 4875 ldr r0, [pc, #468] @ (8001b40 <loadEE+0x3a0>)
800196a: f007 ffab bl 80098c4 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
800196e: 4b56 ldr r3, [pc, #344] @ (8001ac8 <loadEE+0x328>)
8001970: 881b ldrh r3, [r3, #0]
8001972: 4619 mov r1, r3
8001974: 4b55 ldr r3, [pc, #340] @ (8001acc <loadEE+0x32c>)
8001976: 881b ldrh r3, [r3, #0]
8001978: 461c mov r4, r3
800197a: 4b55 ldr r3, [pc, #340] @ (8001ad0 <loadEE+0x330>)
800197c: 881b ldrh r3, [r3, #0]
800197e: 461a mov r2, r3
8001980: 4b54 ldr r3, [pc, #336] @ (8001ad4 <loadEE+0x334>)
8001982: 881b ldrh r3, [r3, #0]
8001984: 4638 mov r0, r7
8001986: 9301 str r3, [sp, #4]
8001988: 9200 str r2, [sp, #0]
800198a: 4623 mov r3, r4
800198c: 460a mov r2, r1
800198e: 496e ldr r1, [pc, #440] @ (8001b48 <loadEE+0x3a8>)
8001990: f00c fd88 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001994: 463b mov r3, r7
8001996: 4618 mov r0, r3
8001998: f7fe fbd8 bl 800014c <strlen>
800199c: 4603 mov r3, r0
800199e: b29a uxth r2, r3
80019a0: 4639 mov r1, r7
80019a2: f04f 33ff mov.w r3, #4294967295
80019a6: 4866 ldr r0, [pc, #408] @ (8001b40 <loadEE+0x3a0>)
80019a8: f007 ff8c bl 80098c4 <HAL_UART_Transmit>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
80019ac: 4b51 ldr r3, [pc, #324] @ (8001af4 <loadEE+0x354>)
80019ae: 881b ldrh r3, [r3, #0]
80019b0: 461a mov r2, r3
80019b2: 4b4f ldr r3, [pc, #316] @ (8001af0 <loadEE+0x350>)
80019b4: 881b ldrh r3, [r3, #0]
80019b6: 4638 mov r0, r7
80019b8: 4964 ldr r1, [pc, #400] @ (8001b4c <loadEE+0x3ac>)
80019ba: f00c fd73 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80019be: 463b mov r3, r7
80019c0: 4618 mov r0, r3
80019c2: f7fe fbc3 bl 800014c <strlen>
80019c6: 4603 mov r3, r0
80019c8: b29a uxth r2, r3
80019ca: 4639 mov r1, r7
80019cc: f04f 33ff mov.w r3, #4294967295
80019d0: 485b ldr r0, [pc, #364] @ (8001b40 <loadEE+0x3a0>)
80019d2: f007 ff77 bl 80098c4 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
80019d6: 4b42 ldr r3, [pc, #264] @ (8001ae0 <loadEE+0x340>)
80019d8: 881b ldrh r3, [r3, #0]
80019da: 4619 mov r1, r3
80019dc: 4b41 ldr r3, [pc, #260] @ (8001ae4 <loadEE+0x344>)
80019de: 881b ldrh r3, [r3, #0]
80019e0: 461c mov r4, r3
80019e2: 4b41 ldr r3, [pc, #260] @ (8001ae8 <loadEE+0x348>)
80019e4: 881b ldrh r3, [r3, #0]
80019e6: 461a mov r2, r3
80019e8: 4b40 ldr r3, [pc, #256] @ (8001aec <loadEE+0x34c>)
80019ea: 881b ldrh r3, [r3, #0]
80019ec: 4638 mov r0, r7
80019ee: 9301 str r3, [sp, #4]
80019f0: 9200 str r2, [sp, #0]
80019f2: 4623 mov r3, r4
80019f4: 460a mov r2, r1
80019f6: 4956 ldr r1, [pc, #344] @ (8001b50 <loadEE+0x3b0>)
80019f8: f00c fd54 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80019fc: 463b mov r3, r7
80019fe: 4618 mov r0, r3
8001a00: f7fe fba4 bl 800014c <strlen>
8001a04: 4603 mov r3, r0
8001a06: b29a uxth r2, r3
8001a08: 4639 mov r1, r7
8001a0a: f04f 33ff mov.w r3, #4294967295
8001a0e: 484c ldr r0, [pc, #304] @ (8001b40 <loadEE+0x3a0>)
8001a10: f007 ff58 bl 80098c4 <HAL_UART_Transmit>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
8001a14: 4b38 ldr r3, [pc, #224] @ (8001af8 <loadEE+0x358>)
8001a16: 881b ldrh r3, [r3, #0]
8001a18: 4619 mov r1, r3
8001a1a: 4b38 ldr r3, [pc, #224] @ (8001afc <loadEE+0x35c>)
8001a1c: 881b ldrh r3, [r3, #0]
8001a1e: 461c mov r4, r3
8001a20: 4b3d ldr r3, [pc, #244] @ (8001b18 <loadEE+0x378>)
8001a22: 881b ldrh r3, [r3, #0]
8001a24: 461a mov r2, r3
8001a26: 4b3d ldr r3, [pc, #244] @ (8001b1c <loadEE+0x37c>)
8001a28: 881b ldrh r3, [r3, #0]
8001a2a: 4638 mov r0, r7
8001a2c: 9301 str r3, [sp, #4]
8001a2e: 9200 str r2, [sp, #0]
8001a30: 4623 mov r3, r4
8001a32: 460a mov r2, r1
8001a34: 4947 ldr r1, [pc, #284] @ (8001b54 <loadEE+0x3b4>)
8001a36: f00c fd35 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001a3a: 463b mov r3, r7
8001a3c: 4618 mov r0, r3
8001a3e: f7fe fb85 bl 800014c <strlen>
8001a42: 4603 mov r3, r0
8001a44: b29a uxth r2, r3
8001a46: 4639 mov r1, r7
8001a48: f04f 33ff mov.w r3, #4294967295
8001a4c: 483c ldr r0, [pc, #240] @ (8001b40 <loadEE+0x3a0>)
8001a4e: f007 ff39 bl 80098c4 <HAL_UART_Transmit>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
8001a52: 4b2b ldr r3, [pc, #172] @ (8001b00 <loadEE+0x360>)
8001a54: 881b ldrh r3, [r3, #0]
8001a56: 4619 mov r1, r3
8001a58: 4b2a ldr r3, [pc, #168] @ (8001b04 <loadEE+0x364>)
8001a5a: 881b ldrh r3, [r3, #0]
8001a5c: 461c mov r4, r3
8001a5e: 4b30 ldr r3, [pc, #192] @ (8001b20 <loadEE+0x380>)
8001a60: 881b ldrh r3, [r3, #0]
8001a62: 461a mov r2, r3
8001a64: 4b2f ldr r3, [pc, #188] @ (8001b24 <loadEE+0x384>)
8001a66: 881b ldrh r3, [r3, #0]
8001a68: 4638 mov r0, r7
8001a6a: 9301 str r3, [sp, #4]
8001a6c: 9200 str r2, [sp, #0]
8001a6e: 4623 mov r3, r4
8001a70: 460a mov r2, r1
8001a72: 4939 ldr r1, [pc, #228] @ (8001b58 <loadEE+0x3b8>)
8001a74: f00c fd16 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001a78: 463b mov r3, r7
8001a7a: 4618 mov r0, r3
8001a7c: f7fe fb66 bl 800014c <strlen>
8001a80: 4603 mov r3, r0
8001a82: b29a uxth r2, r3
8001a84: 4639 mov r1, r7
8001a86: f04f 33ff mov.w r3, #4294967295
8001a8a: 482d ldr r0, [pc, #180] @ (8001b40 <loadEE+0x3a0>)
8001a8c: f007 ff1a bl 80098c4 <HAL_UART_Transmit>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
8001a90: 4b1d ldr r3, [pc, #116] @ (8001b08 <loadEE+0x368>)
8001a92: 881b ldrh r3, [r3, #0]
8001a94: 4619 mov r1, r3
8001a96: e061 b.n 8001b5c <loadEE+0x3bc>
8001a98: 20000400 .word 0x20000400
8001a9c: 20000402 .word 0x20000402
8001aa0: 20000404 .word 0x20000404
8001aa4: 20000406 .word 0x20000406
8001aa8: 20000408 .word 0x20000408
8001aac: 2000040a .word 0x2000040a
8001ab0: 2000040c .word 0x2000040c
8001ab4: 2000040e .word 0x2000040e
8001ab8: 2000044c .word 0x2000044c
8001abc: 2000044e .word 0x2000044e
8001ac0: 20000450 .word 0x20000450
8001ac4: 20000452 .word 0x20000452
8001ac8: 20000410 .word 0x20000410
8001acc: 20000412 .word 0x20000412
8001ad0: 20000414 .word 0x20000414
8001ad4: 20000416 .word 0x20000416
8001ad8: 2000041c .word 0x2000041c
8001adc: 2000041a .word 0x2000041a
8001ae0: 20000420 .word 0x20000420
8001ae4: 20000422 .word 0x20000422
8001ae8: 20000424 .word 0x20000424
8001aec: 20000426 .word 0x20000426
8001af0: 2000041e .word 0x2000041e
8001af4: 20000418 .word 0x20000418
8001af8: 20000428 .word 0x20000428
8001afc: 2000042a .word 0x2000042a
8001b00: 2000042c .word 0x2000042c
8001b04: 2000042e .word 0x2000042e
8001b08: 20000430 .word 0x20000430
8001b0c: 20000432 .word 0x20000432
8001b10: 20000434 .word 0x20000434
8001b14: 20000436 .word 0x20000436
8001b18: 20000438 .word 0x20000438
8001b1c: 2000043a .word 0x2000043a
8001b20: 2000043c .word 0x2000043c
8001b24: 2000043e .word 0x2000043e
8001b28: 20000440 .word 0x20000440
8001b2c: 20000442 .word 0x20000442
8001b30: 20000444 .word 0x20000444
8001b34: 20000446 .word 0x20000446
8001b38: 20000448 .word 0x20000448
8001b3c: 0800f23c .word 0x0800f23c
8001b40: 200003a8 .word 0x200003a8
8001b44: 0800f244 .word 0x0800f244
8001b48: 0800f2a0 .word 0x0800f2a0
8001b4c: 0800f2e4 .word 0x0800f2e4
8001b50: 0800f2fc .word 0x0800f2fc
8001b54: 0800f330 .word 0x0800f330
8001b58: 0800f364 .word 0x0800f364
8001b5c: 4b1f ldr r3, [pc, #124] @ (8001bdc <loadEE+0x43c>)
8001b5e: 881b ldrh r3, [r3, #0]
8001b60: 461c mov r4, r3
8001b62: 4b1f ldr r3, [pc, #124] @ (8001be0 <loadEE+0x440>)
8001b64: 881b ldrh r3, [r3, #0]
8001b66: 461a mov r2, r3
8001b68: 4b1e ldr r3, [pc, #120] @ (8001be4 <loadEE+0x444>)
8001b6a: 881b ldrh r3, [r3, #0]
8001b6c: 4638 mov r0, r7
8001b6e: 9301 str r3, [sp, #4]
8001b70: 9200 str r2, [sp, #0]
8001b72: 4623 mov r3, r4
8001b74: 460a mov r2, r1
8001b76: 491c ldr r1, [pc, #112] @ (8001be8 <loadEE+0x448>)
8001b78: f00c fc94 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001b7c: 463b mov r3, r7
8001b7e: 4618 mov r0, r3
8001b80: f7fe fae4 bl 800014c <strlen>
8001b84: 4603 mov r3, r0
8001b86: b29a uxth r2, r3
8001b88: 4639 mov r1, r7
8001b8a: f04f 33ff mov.w r3, #4294967295
8001b8e: 4817 ldr r0, [pc, #92] @ (8001bec <loadEE+0x44c>)
8001b90: f007 fe98 bl 80098c4 <HAL_UART_Transmit>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
8001b94: 4b16 ldr r3, [pc, #88] @ (8001bf0 <loadEE+0x450>)
8001b96: 881b ldrh r3, [r3, #0]
8001b98: 4619 mov r1, r3
8001b9a: 4b16 ldr r3, [pc, #88] @ (8001bf4 <loadEE+0x454>)
8001b9c: 881b ldrh r3, [r3, #0]
8001b9e: 461c mov r4, r3
8001ba0: 4b15 ldr r3, [pc, #84] @ (8001bf8 <loadEE+0x458>)
8001ba2: 881b ldrh r3, [r3, #0]
8001ba4: 461a mov r2, r3
8001ba6: 4b15 ldr r3, [pc, #84] @ (8001bfc <loadEE+0x45c>)
8001ba8: 881b ldrh r3, [r3, #0]
8001baa: 4638 mov r0, r7
8001bac: 9301 str r3, [sp, #4]
8001bae: 9200 str r2, [sp, #0]
8001bb0: 4623 mov r3, r4
8001bb2: 460a mov r2, r1
8001bb4: 4912 ldr r1, [pc, #72] @ (8001c00 <loadEE+0x460>)
8001bb6: f00c fc75 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001bba: 463b mov r3, r7
8001bbc: 4618 mov r0, r3
8001bbe: f7fe fac5 bl 800014c <strlen>
8001bc2: 4603 mov r3, r0
8001bc4: b29a uxth r2, r3
8001bc6: 4639 mov r1, r7
8001bc8: f04f 33ff mov.w r3, #4294967295
8001bcc: 4807 ldr r0, [pc, #28] @ (8001bec <loadEE+0x44c>)
8001bce: f007 fe79 bl 80098c4 <HAL_UART_Transmit>
}
8001bd2: bf00 nop
8001bd4: 37cc adds r7, #204 @ 0xcc
8001bd6: 46bd mov sp, r7
8001bd8: bdf0 pop {r4, r5, r6, r7, pc}
8001bda: bf00 nop
8001bdc: 20000432 .word 0x20000432
8001be0: 20000440 .word 0x20000440
8001be4: 20000442 .word 0x20000442
8001be8: 0800f398 .word 0x0800f398
8001bec: 200003a8 .word 0x200003a8
8001bf0: 20000434 .word 0x20000434
8001bf4: 20000436 .word 0x20000436
8001bf8: 20000444 .word 0x20000444
8001bfc: 20000446 .word 0x20000446
8001c00: 0800f3cc .word 0x0800f3cc
08001c04 <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void) {
8001c04: b580 push {r7, lr}
8001c06: b082 sub sp, #8
8001c08: af00 add r7, sp, #0
static uint8_t c1s = 0;
static uint8_t inidx = 0;
static uint8_t inbuf[4];
uint8_t i;
if (++c10ms >= 10) { // 10 ms
8001c0a: 4b7c ldr r3, [pc, #496] @ (8001dfc <HAL_SYSTICK_Callback+0x1f8>)
8001c0c: 781b ldrb r3, [r3, #0]
8001c0e: 3301 adds r3, #1
8001c10: b2da uxtb r2, r3
8001c12: 4b7a ldr r3, [pc, #488] @ (8001dfc <HAL_SYSTICK_Callback+0x1f8>)
8001c14: 701a strb r2, [r3, #0]
8001c16: 4b79 ldr r3, [pc, #484] @ (8001dfc <HAL_SYSTICK_Callback+0x1f8>)
8001c18: 781b ldrb r3, [r3, #0]
8001c1a: 2b09 cmp r3, #9
8001c1c: f240 81e7 bls.w 8001fee <HAL_SYSTICK_Callback+0x3ea>
c10ms = 0;
8001c20: 4b76 ldr r3, [pc, #472] @ (8001dfc <HAL_SYSTICK_Callback+0x1f8>)
8001c22: 2200 movs r2, #0
8001c24: 701a strb r2, [r3, #0]
if (rtP1)
8001c26: 4b76 ldr r3, [pc, #472] @ (8001e00 <HAL_SYSTICK_Callback+0x1fc>)
8001c28: 781b ldrb r3, [r3, #0]
8001c2a: b2db uxtb r3, r3
8001c2c: 2b00 cmp r3, #0
8001c2e: d006 beq.n 8001c3e <HAL_SYSTICK_Callback+0x3a>
rtP1--;
8001c30: 4b73 ldr r3, [pc, #460] @ (8001e00 <HAL_SYSTICK_Callback+0x1fc>)
8001c32: 781b ldrb r3, [r3, #0]
8001c34: b2db uxtb r3, r3
8001c36: 3b01 subs r3, #1
8001c38: b2da uxtb r2, r3
8001c3a: 4b71 ldr r3, [pc, #452] @ (8001e00 <HAL_SYSTICK_Callback+0x1fc>)
8001c3c: 701a strb r2, [r3, #0]
if (rtP2)
8001c3e: 4b71 ldr r3, [pc, #452] @ (8001e04 <HAL_SYSTICK_Callback+0x200>)
8001c40: 781b ldrb r3, [r3, #0]
8001c42: b2db uxtb r3, r3
8001c44: 2b00 cmp r3, #0
8001c46: d006 beq.n 8001c56 <HAL_SYSTICK_Callback+0x52>
rtP2--;
8001c48: 4b6e ldr r3, [pc, #440] @ (8001e04 <HAL_SYSTICK_Callback+0x200>)
8001c4a: 781b ldrb r3, [r3, #0]
8001c4c: b2db uxtb r3, r3
8001c4e: 3b01 subs r3, #1
8001c50: b2da uxtb r2, r3
8001c52: 4b6c ldr r3, [pc, #432] @ (8001e04 <HAL_SYSTICK_Callback+0x200>)
8001c54: 701a strb r2, [r3, #0]
if (rtTLC)
8001c56: 4b6c ldr r3, [pc, #432] @ (8001e08 <HAL_SYSTICK_Callback+0x204>)
8001c58: 781b ldrb r3, [r3, #0]
8001c5a: b2db uxtb r3, r3
8001c5c: 2b00 cmp r3, #0
8001c5e: d006 beq.n 8001c6e <HAL_SYSTICK_Callback+0x6a>
rtTLC--;
8001c60: 4b69 ldr r3, [pc, #420] @ (8001e08 <HAL_SYSTICK_Callback+0x204>)
8001c62: 781b ldrb r3, [r3, #0]
8001c64: b2db uxtb r3, r3
8001c66: 3b01 subs r3, #1
8001c68: b2da uxtb r2, r3
8001c6a: 4b67 ldr r3, [pc, #412] @ (8001e08 <HAL_SYSTICK_Callback+0x204>)
8001c6c: 701a strb r2, [r3, #0]
//**** legge i tasti********************************************************************************
inidx++;
8001c6e: 4b67 ldr r3, [pc, #412] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c70: 781b ldrb r3, [r3, #0]
8001c72: 3301 adds r3, #1
8001c74: b2da uxtb r2, r3
8001c76: 4b65 ldr r3, [pc, #404] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c78: 701a strb r2, [r3, #0]
inidx &= 0x03;
8001c7a: 4b64 ldr r3, [pc, #400] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c7c: 781b ldrb r3, [r3, #0]
8001c7e: f003 0303 and.w r3, r3, #3
8001c82: b2da uxtb r2, r3
8001c84: 4b61 ldr r3, [pc, #388] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c86: 701a strb r2, [r3, #0]
if (HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin) == GPIO_PIN_RESET)
8001c88: f44f 4180 mov.w r1, #16384 @ 0x4000
8001c8c: 4860 ldr r0, [pc, #384] @ (8001e10 <HAL_SYSTICK_Callback+0x20c>)
8001c8e: f004 fd03 bl 8006698 <HAL_GPIO_ReadPin>
8001c92: 4603 mov r3, r0
8001c94: 2b00 cmp r3, #0
8001c96: d10c bne.n 8001cb2 <HAL_SYSTICK_Callback+0xae>
inbuf[inidx] |= INP1;
8001c98: 4b5c ldr r3, [pc, #368] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c9a: 781b ldrb r3, [r3, #0]
8001c9c: 461a mov r2, r3
8001c9e: 4b5d ldr r3, [pc, #372] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001ca0: 5c9b ldrb r3, [r3, r2]
8001ca2: 4a5a ldr r2, [pc, #360] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001ca4: 7812 ldrb r2, [r2, #0]
8001ca6: f043 0301 orr.w r3, r3, #1
8001caa: b2d9 uxtb r1, r3
8001cac: 4b59 ldr r3, [pc, #356] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cae: 5499 strb r1, [r3, r2]
8001cb0: e00b b.n 8001cca <HAL_SYSTICK_Callback+0xc6>
else
inbuf[inidx] &= (~INP1);
8001cb2: 4b56 ldr r3, [pc, #344] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001cb4: 781b ldrb r3, [r3, #0]
8001cb6: 461a mov r2, r3
8001cb8: 4b56 ldr r3, [pc, #344] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cba: 5c9b ldrb r3, [r3, r2]
8001cbc: 4a53 ldr r2, [pc, #332] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001cbe: 7812 ldrb r2, [r2, #0]
8001cc0: f023 0301 bic.w r3, r3, #1
8001cc4: b2d9 uxtb r1, r3
8001cc6: 4b53 ldr r3, [pc, #332] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cc8: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin) == GPIO_PIN_RESET)
8001cca: f44f 4100 mov.w r1, #32768 @ 0x8000
8001cce: 4850 ldr r0, [pc, #320] @ (8001e10 <HAL_SYSTICK_Callback+0x20c>)
8001cd0: f004 fce2 bl 8006698 <HAL_GPIO_ReadPin>
8001cd4: 4603 mov r3, r0
8001cd6: 2b00 cmp r3, #0
8001cd8: d10c bne.n 8001cf4 <HAL_SYSTICK_Callback+0xf0>
inbuf[inidx] |= INP2;
8001cda: 4b4c ldr r3, [pc, #304] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001cdc: 781b ldrb r3, [r3, #0]
8001cde: 461a mov r2, r3
8001ce0: 4b4c ldr r3, [pc, #304] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001ce2: 5c9b ldrb r3, [r3, r2]
8001ce4: 4a49 ldr r2, [pc, #292] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001ce6: 7812 ldrb r2, [r2, #0]
8001ce8: f043 0302 orr.w r3, r3, #2
8001cec: b2d9 uxtb r1, r3
8001cee: 4b49 ldr r3, [pc, #292] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cf0: 5499 strb r1, [r3, r2]
8001cf2: e00b b.n 8001d0c <HAL_SYSTICK_Callback+0x108>
else
inbuf[inidx] &= (~INP2);
8001cf4: 4b45 ldr r3, [pc, #276] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001cf6: 781b ldrb r3, [r3, #0]
8001cf8: 461a mov r2, r3
8001cfa: 4b46 ldr r3, [pc, #280] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cfc: 5c9b ldrb r3, [r3, r2]
8001cfe: 4a43 ldr r2, [pc, #268] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d00: 7812 ldrb r2, [r2, #0]
8001d02: f023 0302 bic.w r3, r3, #2
8001d06: b2d9 uxtb r1, r3
8001d08: 4b42 ldr r3, [pc, #264] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d0a: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin) == GPIO_PIN_RESET)
8001d0c: f44f 5180 mov.w r1, #4096 @ 0x1000
8001d10: 4841 ldr r0, [pc, #260] @ (8001e18 <HAL_SYSTICK_Callback+0x214>)
8001d12: f004 fcc1 bl 8006698 <HAL_GPIO_ReadPin>
8001d16: 4603 mov r3, r0
8001d18: 2b00 cmp r3, #0
8001d1a: d10c bne.n 8001d36 <HAL_SYSTICK_Callback+0x132>
inbuf[inidx] |= INCH1;
8001d1c: 4b3b ldr r3, [pc, #236] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d1e: 781b ldrb r3, [r3, #0]
8001d20: 461a mov r2, r3
8001d22: 4b3c ldr r3, [pc, #240] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d24: 5c9b ldrb r3, [r3, r2]
8001d26: 4a39 ldr r2, [pc, #228] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d28: 7812 ldrb r2, [r2, #0]
8001d2a: f043 0304 orr.w r3, r3, #4
8001d2e: b2d9 uxtb r1, r3
8001d30: 4b38 ldr r3, [pc, #224] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d32: 5499 strb r1, [r3, r2]
8001d34: e00b b.n 8001d4e <HAL_SYSTICK_Callback+0x14a>
else
inbuf[inidx] &= (~INCH1);
8001d36: 4b35 ldr r3, [pc, #212] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d38: 781b ldrb r3, [r3, #0]
8001d3a: 461a mov r2, r3
8001d3c: 4b35 ldr r3, [pc, #212] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d3e: 5c9b ldrb r3, [r3, r2]
8001d40: 4a32 ldr r2, [pc, #200] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d42: 7812 ldrb r2, [r2, #0]
8001d44: f023 0304 bic.w r3, r3, #4
8001d48: b2d9 uxtb r1, r3
8001d4a: 4b32 ldr r3, [pc, #200] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d4c: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin) == GPIO_PIN_RESET)
8001d4e: f44f 5100 mov.w r1, #8192 @ 0x2000
8001d52: 4831 ldr r0, [pc, #196] @ (8001e18 <HAL_SYSTICK_Callback+0x214>)
8001d54: f004 fca0 bl 8006698 <HAL_GPIO_ReadPin>
8001d58: 4603 mov r3, r0
8001d5a: 2b00 cmp r3, #0
8001d5c: d10c bne.n 8001d78 <HAL_SYSTICK_Callback+0x174>
inbuf[inidx] |= INCH2;
8001d5e: 4b2b ldr r3, [pc, #172] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d60: 781b ldrb r3, [r3, #0]
8001d62: 461a mov r2, r3
8001d64: 4b2b ldr r3, [pc, #172] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d66: 5c9b ldrb r3, [r3, r2]
8001d68: 4a28 ldr r2, [pc, #160] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d6a: 7812 ldrb r2, [r2, #0]
8001d6c: f043 0308 orr.w r3, r3, #8
8001d70: b2d9 uxtb r1, r3
8001d72: 4b28 ldr r3, [pc, #160] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d74: 5499 strb r1, [r3, r2]
8001d76: e00b b.n 8001d90 <HAL_SYSTICK_Callback+0x18c>
else
inbuf[inidx] &= (~INCH2);
8001d78: 4b24 ldr r3, [pc, #144] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d7a: 781b ldrb r3, [r3, #0]
8001d7c: 461a mov r2, r3
8001d7e: 4b25 ldr r3, [pc, #148] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d80: 5c9b ldrb r3, [r3, r2]
8001d82: 4a22 ldr r2, [pc, #136] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d84: 7812 ldrb r2, [r2, #0]
8001d86: f023 0308 bic.w r3, r3, #8
8001d8a: b2d9 uxtb r1, r3
8001d8c: 4b21 ldr r3, [pc, #132] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d8e: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin) == GPIO_PIN_RESET)
8001d90: f44f 4180 mov.w r1, #16384 @ 0x4000
8001d94: 4820 ldr r0, [pc, #128] @ (8001e18 <HAL_SYSTICK_Callback+0x214>)
8001d96: f004 fc7f bl 8006698 <HAL_GPIO_ReadPin>
8001d9a: 4603 mov r3, r0
8001d9c: 2b00 cmp r3, #0
8001d9e: d10c bne.n 8001dba <HAL_SYSTICK_Callback+0x1b6>
inbuf[inidx] |= INCH3;
8001da0: 4b1a ldr r3, [pc, #104] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001da2: 781b ldrb r3, [r3, #0]
8001da4: 461a mov r2, r3
8001da6: 4b1b ldr r3, [pc, #108] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001da8: 5c9b ldrb r3, [r3, r2]
8001daa: 4a18 ldr r2, [pc, #96] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001dac: 7812 ldrb r2, [r2, #0]
8001dae: f043 0310 orr.w r3, r3, #16
8001db2: b2d9 uxtb r1, r3
8001db4: 4b17 ldr r3, [pc, #92] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001db6: 5499 strb r1, [r3, r2]
8001db8: e00b b.n 8001dd2 <HAL_SYSTICK_Callback+0x1ce>
else
inbuf[inidx] &= (~INCH3);
8001dba: 4b14 ldr r3, [pc, #80] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001dbc: 781b ldrb r3, [r3, #0]
8001dbe: 461a mov r2, r3
8001dc0: 4b14 ldr r3, [pc, #80] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001dc2: 5c9b ldrb r3, [r3, r2]
8001dc4: 4a11 ldr r2, [pc, #68] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001dc6: 7812 ldrb r2, [r2, #0]
8001dc8: f023 0310 bic.w r3, r3, #16
8001dcc: b2d9 uxtb r1, r3
8001dce: 4b11 ldr r3, [pc, #68] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001dd0: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin) == GPIO_PIN_RESET)
8001dd2: f44f 4100 mov.w r1, #32768 @ 0x8000
8001dd6: 4810 ldr r0, [pc, #64] @ (8001e18 <HAL_SYSTICK_Callback+0x214>)
8001dd8: f004 fc5e bl 8006698 <HAL_GPIO_ReadPin>
8001ddc: 4603 mov r3, r0
8001dde: 2b00 cmp r3, #0
8001de0: d11c bne.n 8001e1c <HAL_SYSTICK_Callback+0x218>
inbuf[inidx] |= INCH4;
8001de2: 4b0a ldr r3, [pc, #40] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001de4: 781b ldrb r3, [r3, #0]
8001de6: 461a mov r2, r3
8001de8: 4b0a ldr r3, [pc, #40] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001dea: 5c9b ldrb r3, [r3, r2]
8001dec: 4a07 ldr r2, [pc, #28] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001dee: 7812 ldrb r2, [r2, #0]
8001df0: f043 0320 orr.w r3, r3, #32
8001df4: b2d9 uxtb r1, r3
8001df6: 4b07 ldr r3, [pc, #28] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001df8: 5499 strb r1, [r3, r2]
8001dfa: e01b b.n 8001e34 <HAL_SYSTICK_Callback+0x230>
8001dfc: 2000045a .word 0x2000045a
8001e00: 20000004 .word 0x20000004
8001e04: 20000005 .word 0x20000005
8001e08: 20000006 .word 0x20000006
8001e0c: 2000045b .word 0x2000045b
8001e10: 40011000 .word 0x40011000
8001e14: 2000045c .word 0x2000045c
8001e18: 40010c00 .word 0x40010c00
else
inbuf[inidx] &= (~INCH4);
8001e1c: 4b76 ldr r3, [pc, #472] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f4>)
8001e1e: 781b ldrb r3, [r3, #0]
8001e20: 461a mov r2, r3
8001e22: 4b76 ldr r3, [pc, #472] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e24: 5c9b ldrb r3, [r3, r2]
8001e26: 4a74 ldr r2, [pc, #464] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f4>)
8001e28: 7812 ldrb r2, [r2, #0]
8001e2a: f023 0320 bic.w r3, r3, #32
8001e2e: b2d9 uxtb r1, r3
8001e30: 4b72 ldr r3, [pc, #456] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e32: 5499 strb r1, [r3, r2]
pulsanti |= (inbuf[0] & inbuf[1] & inbuf[2] & inbuf[3]);
8001e34: 4b71 ldr r3, [pc, #452] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e36: 781a ldrb r2, [r3, #0]
8001e38: 4b70 ldr r3, [pc, #448] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e3a: 785b ldrb r3, [r3, #1]
8001e3c: 4013 ands r3, r2
8001e3e: b2da uxtb r2, r3
8001e40: 4b6e ldr r3, [pc, #440] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e42: 789b ldrb r3, [r3, #2]
8001e44: 4013 ands r3, r2
8001e46: b2da uxtb r2, r3
8001e48: 4b6c ldr r3, [pc, #432] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e4a: 78db ldrb r3, [r3, #3]
8001e4c: 4013 ands r3, r2
8001e4e: b2da uxtb r2, r3
8001e50: 4b6b ldr r3, [pc, #428] @ (8002000 <HAL_SYSTICK_Callback+0x3fc>)
8001e52: 781b ldrb r3, [r3, #0]
8001e54: 4313 orrs r3, r2
8001e56: b2da uxtb r2, r3
8001e58: 4b69 ldr r3, [pc, #420] @ (8002000 <HAL_SYSTICK_Callback+0x3fc>)
8001e5a: 701a strb r2, [r3, #0]
pulsanti &= (inbuf[0] | inbuf[1] | inbuf[2] | inbuf[3]);
8001e5c: 4b67 ldr r3, [pc, #412] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e5e: 781a ldrb r2, [r3, #0]
8001e60: 4b66 ldr r3, [pc, #408] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e62: 785b ldrb r3, [r3, #1]
8001e64: 4313 orrs r3, r2
8001e66: b2da uxtb r2, r3
8001e68: 4b64 ldr r3, [pc, #400] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e6a: 789b ldrb r3, [r3, #2]
8001e6c: 4313 orrs r3, r2
8001e6e: b2da uxtb r2, r3
8001e70: 4b62 ldr r3, [pc, #392] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e72: 78db ldrb r3, [r3, #3]
8001e74: 4313 orrs r3, r2
8001e76: b2da uxtb r2, r3
8001e78: 4b61 ldr r3, [pc, #388] @ (8002000 <HAL_SYSTICK_Callback+0x3fc>)
8001e7a: 781b ldrb r3, [r3, #0]
8001e7c: 4013 ands r3, r2
8001e7e: b2da uxtb r2, r3
8001e80: 4b5f ldr r3, [pc, #380] @ (8002000 <HAL_SYSTICK_Callback+0x3fc>)
8001e82: 701a strb r2, [r3, #0]
//**** legge adc ***********************************************************************************
readAdc();
8001e84: f7fe f9a0 bl 80001c8 <readAdc>
if (++c100ms >= 10) { // 10 ms
8001e88: 4b5e ldr r3, [pc, #376] @ (8002004 <HAL_SYSTICK_Callback+0x400>)
8001e8a: 781b ldrb r3, [r3, #0]
8001e8c: 3301 adds r3, #1
8001e8e: b2da uxtb r2, r3
8001e90: 4b5c ldr r3, [pc, #368] @ (8002004 <HAL_SYSTICK_Callback+0x400>)
8001e92: 701a strb r2, [r3, #0]
8001e94: 4b5b ldr r3, [pc, #364] @ (8002004 <HAL_SYSTICK_Callback+0x400>)
8001e96: 781b ldrb r3, [r3, #0]
8001e98: 2b09 cmp r3, #9
8001e9a: f240 80a8 bls.w 8001fee <HAL_SYSTICK_Callback+0x3ea>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8001e9e: 4b59 ldr r3, [pc, #356] @ (8002004 <HAL_SYSTICK_Callback+0x400>)
8001ea0: 2200 movs r2, #0
8001ea2: 701a strb r2, [r3, #0]
for (i = 0; i < 4; i++) {
8001ea4: 2300 movs r3, #0
8001ea6: 71fb strb r3, [r7, #7]
8001ea8: e013 b.n 8001ed2 <HAL_SYSTICK_Callback+0x2ce>
if (rtramp[i])
8001eaa: 79fb ldrb r3, [r7, #7]
8001eac: 4a56 ldr r2, [pc, #344] @ (8002008 <HAL_SYSTICK_Callback+0x404>)
8001eae: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001eb2: b29b uxth r3, r3
8001eb4: 2b00 cmp r3, #0
8001eb6: d009 beq.n 8001ecc <HAL_SYSTICK_Callback+0x2c8>
rtramp[i]--;
8001eb8: 79fb ldrb r3, [r7, #7]
8001eba: 4a53 ldr r2, [pc, #332] @ (8002008 <HAL_SYSTICK_Callback+0x404>)
8001ebc: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
8001ec0: b292 uxth r2, r2
8001ec2: 3a01 subs r2, #1
8001ec4: b291 uxth r1, r2
8001ec6: 4a50 ldr r2, [pc, #320] @ (8002008 <HAL_SYSTICK_Callback+0x404>)
8001ec8: f822 1013 strh.w r1, [r2, r3, lsl #1]
for (i = 0; i < 4; i++) {
8001ecc: 79fb ldrb r3, [r7, #7]
8001ece: 3301 adds r3, #1
8001ed0: 71fb strb r3, [r7, #7]
8001ed2: 79fb ldrb r3, [r7, #7]
8001ed4: 2b03 cmp r3, #3
8001ed6: d9e8 bls.n 8001eaa <HAL_SYSTICK_Callback+0x2a6>
}
if (rtCiclo < 0xffff)rtCiclo++;
8001ed8: 4b4c ldr r3, [pc, #304] @ (800200c <HAL_SYSTICK_Callback+0x408>)
8001eda: 881b ldrh r3, [r3, #0]
8001edc: b29b uxth r3, r3
8001ede: f64f 72ff movw r2, #65535 @ 0xffff
8001ee2: 4293 cmp r3, r2
8001ee4: d006 beq.n 8001ef4 <HAL_SYSTICK_Callback+0x2f0>
8001ee6: 4b49 ldr r3, [pc, #292] @ (800200c <HAL_SYSTICK_Callback+0x408>)
8001ee8: 881b ldrh r3, [r3, #0]
8001eea: b29b uxth r3, r3
8001eec: 3301 adds r3, #1
8001eee: b29a uxth r2, r3
8001ef0: 4b46 ldr r3, [pc, #280] @ (800200c <HAL_SYSTICK_Callback+0x408>)
8001ef2: 801a strh r2, [r3, #0]
if (rtAnem)rtAnem--;
8001ef4: 4b46 ldr r3, [pc, #280] @ (8002010 <HAL_SYSTICK_Callback+0x40c>)
8001ef6: 881b ldrh r3, [r3, #0]
8001ef8: b29b uxth r3, r3
8001efa: 2b00 cmp r3, #0
8001efc: d006 beq.n 8001f0c <HAL_SYSTICK_Callback+0x308>
8001efe: 4b44 ldr r3, [pc, #272] @ (8002010 <HAL_SYSTICK_Callback+0x40c>)
8001f00: 881b ldrh r3, [r3, #0]
8001f02: b29b uxth r3, r3
8001f04: 3b01 subs r3, #1
8001f06: b29a uxth r2, r3
8001f08: 4b41 ldr r3, [pc, #260] @ (8002010 <HAL_SYSTICK_Callback+0x40c>)
8001f0a: 801a strh r2, [r3, #0]
//**** gestione buzzer *****************************************************************************
if (stBuz == bzmoving) {
8001f0c: 4b41 ldr r3, [pc, #260] @ (8002014 <HAL_SYSTICK_Callback+0x410>)
8001f0e: 781b ldrb r3, [r3, #0]
8001f10: b2db uxtb r3, r3
8001f12: 2b01 cmp r3, #1
8001f14: d127 bne.n 8001f66 <HAL_SYSTICK_Callback+0x362>
if (nobuz) {
8001f16: 4b40 ldr r3, [pc, #256] @ (8002018 <HAL_SYSTICK_Callback+0x414>)
8001f18: 781b ldrb r3, [r3, #0]
8001f1a: 2b00 cmp r3, #0
8001f1c: d011 beq.n 8001f42 <HAL_SYSTICK_Callback+0x33e>
if (c1s >= 5)
8001f1e: 4b3f ldr r3, [pc, #252] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001f20: 781b ldrb r3, [r3, #0]
8001f22: 2b04 cmp r3, #4
8001f24: d906 bls.n 8001f34 <HAL_SYSTICK_Callback+0x330>
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f26: 2200 movs r2, #0
8001f28: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f2c: 483c ldr r0, [pc, #240] @ (8002020 <HAL_SYSTICK_Callback+0x41c>)
8001f2e: f004 fbca bl 80066c6 <HAL_GPIO_WritePin>
8001f32: e04f b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_RESET);
else
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f34: 2201 movs r2, #1
8001f36: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f3a: 4839 ldr r0, [pc, #228] @ (8002020 <HAL_SYSTICK_Callback+0x41c>)
8001f3c: f004 fbc3 bl 80066c6 <HAL_GPIO_WritePin>
8001f40: e048 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_SET);
} else {
if (c1s >= 5)
8001f42: 4b36 ldr r3, [pc, #216] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001f44: 781b ldrb r3, [r3, #0]
8001f46: 2b04 cmp r3, #4
8001f48: d906 bls.n 8001f58 <HAL_SYSTICK_Callback+0x354>
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001f4a: 2200 movs r2, #0
8001f4c: f44f 7180 mov.w r1, #256 @ 0x100
8001f50: 4834 ldr r0, [pc, #208] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001f52: f004 fbb8 bl 80066c6 <HAL_GPIO_WritePin>
8001f56: e03d b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
else
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001f58: 2201 movs r2, #1
8001f5a: f44f 7180 mov.w r1, #256 @ 0x100
8001f5e: 4831 ldr r0, [pc, #196] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001f60: f004 fbb1 bl 80066c6 <HAL_GPIO_WritePin>
8001f64: e036 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
}
} else if (stBuz == bzwarning) {
8001f66: 4b2b ldr r3, [pc, #172] @ (8002014 <HAL_SYSTICK_Callback+0x410>)
8001f68: 781b ldrb r3, [r3, #0]
8001f6a: b2db uxtb r3, r3
8001f6c: 2b02 cmp r3, #2
8001f6e: d12b bne.n 8001fc8 <HAL_SYSTICK_Callback+0x3c4>
if (nobuz) {
8001f70: 4b29 ldr r3, [pc, #164] @ (8002018 <HAL_SYSTICK_Callback+0x414>)
8001f72: 781b ldrb r3, [r3, #0]
8001f74: 2b00 cmp r3, #0
8001f76: d013 beq.n 8001fa0 <HAL_SYSTICK_Callback+0x39c>
if (c1s & 1)
8001f78: 4b28 ldr r3, [pc, #160] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001f7a: 781b ldrb r3, [r3, #0]
8001f7c: f003 0301 and.w r3, r3, #1
8001f80: 2b00 cmp r3, #0
8001f82: d006 beq.n 8001f92 <HAL_SYSTICK_Callback+0x38e>
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f84: 2200 movs r2, #0
8001f86: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f8a: 4825 ldr r0, [pc, #148] @ (8002020 <HAL_SYSTICK_Callback+0x41c>)
8001f8c: f004 fb9b bl 80066c6 <HAL_GPIO_WritePin>
8001f90: e020 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_RESET);
else
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f92: 2201 movs r2, #1
8001f94: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f98: 4821 ldr r0, [pc, #132] @ (8002020 <HAL_SYSTICK_Callback+0x41c>)
8001f9a: f004 fb94 bl 80066c6 <HAL_GPIO_WritePin>
8001f9e: e019 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_SET);
} else {
if (c1s & 1)
8001fa0: 4b1e ldr r3, [pc, #120] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fa2: 781b ldrb r3, [r3, #0]
8001fa4: f003 0301 and.w r3, r3, #1
8001fa8: 2b00 cmp r3, #0
8001faa: d006 beq.n 8001fba <HAL_SYSTICK_Callback+0x3b6>
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001fac: 2200 movs r2, #0
8001fae: f44f 7180 mov.w r1, #256 @ 0x100
8001fb2: 481c ldr r0, [pc, #112] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001fb4: f004 fb87 bl 80066c6 <HAL_GPIO_WritePin>
8001fb8: e00c b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
else
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001fba: 2201 movs r2, #1
8001fbc: f44f 7180 mov.w r1, #256 @ 0x100
8001fc0: 4818 ldr r0, [pc, #96] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001fc2: f004 fb80 bl 80066c6 <HAL_GPIO_WritePin>
8001fc6: e005 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
}
} else { //bzoff
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001fc8: 2200 movs r2, #0
8001fca: f44f 7180 mov.w r1, #256 @ 0x100
8001fce: 4815 ldr r0, [pc, #84] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001fd0: f004 fb79 bl 80066c6 <HAL_GPIO_WritePin>
}
//**************************************************************************************************
if (++c1s >= 10) { // 1 s
8001fd4: 4b11 ldr r3, [pc, #68] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fd6: 781b ldrb r3, [r3, #0]
8001fd8: 3301 adds r3, #1
8001fda: b2da uxtb r2, r3
8001fdc: 4b0f ldr r3, [pc, #60] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fde: 701a strb r2, [r3, #0]
8001fe0: 4b0e ldr r3, [pc, #56] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fe2: 781b ldrb r3, [r3, #0]
8001fe4: 2b09 cmp r3, #9
8001fe6: d902 bls.n 8001fee <HAL_SYSTICK_Callback+0x3ea>
c1s = 0;
8001fe8: 4b0c ldr r3, [pc, #48] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fea: 2200 movs r2, #0
8001fec: 701a strb r2, [r3, #0]
//HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
}
}
}
}
8001fee: bf00 nop
8001ff0: 3708 adds r7, #8
8001ff2: 46bd mov sp, r7
8001ff4: bd80 pop {r7, pc}
8001ff6: bf00 nop
8001ff8: 2000045b .word 0x2000045b
8001ffc: 2000045c .word 0x2000045c
8002000: 200003f0 .word 0x200003f0
8002004: 20000460 .word 0x20000460
8002008: 200003f4 .word 0x200003f4
800200c: 200003fc .word 0x200003fc
8002010: 200003fe .word 0x200003fe
8002014: 20000457 .word 0x20000457
8002018: 20000458 .word 0x20000458
800201c: 20000461 .word 0x20000461
8002020: 40011000 .word 0x40011000
8002024: 40010800 .word 0x40010800
08002028 <managePulsanti>:
void managePulsanti(void) {
8002028: b580 push {r7, lr}
800202a: af00 add r7, sp, #0
if (pulsanti & INP1) {
800202c: 4bac ldr r3, [pc, #688] @ (80022e0 <managePulsanti+0x2b8>)
800202e: 781b ldrb r3, [r3, #0]
8002030: f003 0301 and.w r3, r3, #1
8002034: 2b00 cmp r3, #0
8002036: d013 beq.n 8002060 <managePulsanti+0x38>
if (rtP1 == 0)
8002038: 4baa ldr r3, [pc, #680] @ (80022e4 <managePulsanti+0x2bc>)
800203a: 781b ldrb r3, [r3, #0]
800203c: b2db uxtb r3, r3
800203e: 2b00 cmp r3, #0
8002040: d107 bne.n 8002052 <managePulsanti+0x2a>
stPulsanti |= P1START;
8002042: 4ba9 ldr r3, [pc, #676] @ (80022e8 <managePulsanti+0x2c0>)
8002044: 881b ldrh r3, [r3, #0]
8002046: f043 0301 orr.w r3, r3, #1
800204a: b29a uxth r2, r3
800204c: 4ba6 ldr r3, [pc, #664] @ (80022e8 <managePulsanti+0x2c0>)
800204e: 801a strh r2, [r3, #0]
8002050: e036 b.n 80020c0 <managePulsanti+0x98>
else {
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET);
8002052: 2201 movs r2, #1
8002054: f44f 5100 mov.w r1, #8192 @ 0x2000
8002058: 48a4 ldr r0, [pc, #656] @ (80022ec <managePulsanti+0x2c4>)
800205a: f004 fb34 bl 80066c6 <HAL_GPIO_WritePin>
800205e: e02f b.n 80020c0 <managePulsanti+0x98>
}
} else {
if (stPulsanti & P1START) {
8002060: 4ba1 ldr r3, [pc, #644] @ (80022e8 <managePulsanti+0x2c0>)
8002062: 881b ldrh r3, [r3, #0]
8002064: f003 0301 and.w r3, r3, #1
8002068: 2b00 cmp r3, #0
800206a: d014 beq.n 8002096 <managePulsanti+0x6e>
stPulsanti &= (~P1START);
800206c: 4b9e ldr r3, [pc, #632] @ (80022e8 <managePulsanti+0x2c0>)
800206e: 881b ldrh r3, [r3, #0]
8002070: f023 0301 bic.w r3, r3, #1
8002074: b29a uxth r2, r3
8002076: 4b9c ldr r3, [pc, #624] @ (80022e8 <managePulsanti+0x2c0>)
8002078: 801a strh r2, [r3, #0]
stPulsanti|=P1RELEASED;
800207a: 4b9b ldr r3, [pc, #620] @ (80022e8 <managePulsanti+0x2c0>)
800207c: 881b ldrh r3, [r3, #0]
800207e: f443 5380 orr.w r3, r3, #4096 @ 0x1000
8002082: b29a uxth r2, r3
8002084: 4b98 ldr r3, [pc, #608] @ (80022e8 <managePulsanti+0x2c0>)
8002086: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8002088: 2200 movs r2, #0
800208a: f44f 5100 mov.w r1, #8192 @ 0x2000
800208e: 4897 ldr r0, [pc, #604] @ (80022ec <managePulsanti+0x2c4>)
8002090: f004 fb19 bl 80066c6 <HAL_GPIO_WritePin>
8002094: e011 b.n 80020ba <managePulsanti+0x92>
} else if (rtP1 <= 190) {
8002096: 4b93 ldr r3, [pc, #588] @ (80022e4 <managePulsanti+0x2bc>)
8002098: 781b ldrb r3, [r3, #0]
800209a: b2db uxtb r3, r3
800209c: 2bbe cmp r3, #190 @ 0xbe
800209e: d80c bhi.n 80020ba <managePulsanti+0x92>
stPulsanti |= P1STOP;
80020a0: 4b91 ldr r3, [pc, #580] @ (80022e8 <managePulsanti+0x2c0>)
80020a2: 881b ldrh r3, [r3, #0]
80020a4: f043 0302 orr.w r3, r3, #2
80020a8: b29a uxth r2, r3
80020aa: 4b8f ldr r3, [pc, #572] @ (80022e8 <managePulsanti+0x2c0>)
80020ac: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
80020ae: 2200 movs r2, #0
80020b0: f44f 5100 mov.w r1, #8192 @ 0x2000
80020b4: 488d ldr r0, [pc, #564] @ (80022ec <managePulsanti+0x2c4>)
80020b6: f004 fb06 bl 80066c6 <HAL_GPIO_WritePin>
}
rtP1 = 200;
80020ba: 4b8a ldr r3, [pc, #552] @ (80022e4 <managePulsanti+0x2bc>)
80020bc: 22c8 movs r2, #200 @ 0xc8
80020be: 701a strb r2, [r3, #0]
}
if (pulsanti & INP2) {
80020c0: 4b87 ldr r3, [pc, #540] @ (80022e0 <managePulsanti+0x2b8>)
80020c2: 781b ldrb r3, [r3, #0]
80020c4: f003 0302 and.w r3, r3, #2
80020c8: 2b00 cmp r3, #0
80020ca: d00c beq.n 80020e6 <managePulsanti+0xbe>
if (rtP2 == 0)
80020cc: 4b88 ldr r3, [pc, #544] @ (80022f0 <managePulsanti+0x2c8>)
80020ce: 781b ldrb r3, [r3, #0]
80020d0: b2db uxtb r3, r3
80020d2: 2b00 cmp r3, #0
80020d4: d124 bne.n 8002120 <managePulsanti+0xf8>
stPulsanti |= P2START;
80020d6: 4b84 ldr r3, [pc, #528] @ (80022e8 <managePulsanti+0x2c0>)
80020d8: 881b ldrh r3, [r3, #0]
80020da: f043 0304 orr.w r3, r3, #4
80020de: b29a uxth r2, r3
80020e0: 4b81 ldr r3, [pc, #516] @ (80022e8 <managePulsanti+0x2c0>)
80020e2: 801a strh r2, [r3, #0]
80020e4: e01c b.n 8002120 <managePulsanti+0xf8>
} else {
if (stPulsanti & P2START)
80020e6: 4b80 ldr r3, [pc, #512] @ (80022e8 <managePulsanti+0x2c0>)
80020e8: 881b ldrh r3, [r3, #0]
80020ea: f003 0304 and.w r3, r3, #4
80020ee: 2b00 cmp r3, #0
80020f0: d007 beq.n 8002102 <managePulsanti+0xda>
stPulsanti &= (~P2START);
80020f2: 4b7d ldr r3, [pc, #500] @ (80022e8 <managePulsanti+0x2c0>)
80020f4: 881b ldrh r3, [r3, #0]
80020f6: f023 0304 bic.w r3, r3, #4
80020fa: b29a uxth r2, r3
80020fc: 4b7a ldr r3, [pc, #488] @ (80022e8 <managePulsanti+0x2c0>)
80020fe: 801a strh r2, [r3, #0]
8002100: e00b b.n 800211a <managePulsanti+0xf2>
else if (rtP2 <= 190)
8002102: 4b7b ldr r3, [pc, #492] @ (80022f0 <managePulsanti+0x2c8>)
8002104: 781b ldrb r3, [r3, #0]
8002106: b2db uxtb r3, r3
8002108: 2bbe cmp r3, #190 @ 0xbe
800210a: d806 bhi.n 800211a <managePulsanti+0xf2>
stPulsanti |= P2STOP;
800210c: 4b76 ldr r3, [pc, #472] @ (80022e8 <managePulsanti+0x2c0>)
800210e: 881b ldrh r3, [r3, #0]
8002110: f043 0308 orr.w r3, r3, #8
8002114: b29a uxth r2, r3
8002116: 4b74 ldr r3, [pc, #464] @ (80022e8 <managePulsanti+0x2c0>)
8002118: 801a strh r2, [r3, #0]
rtP2 = 200;
800211a: 4b75 ldr r3, [pc, #468] @ (80022f0 <managePulsanti+0x2c8>)
800211c: 22c8 movs r2, #200 @ 0xc8
800211e: 701a strb r2, [r3, #0]
}
stPulsanti &= (P1START | P1STOP | P2START | P2STOP |P1RELEASED);
8002120: 4b71 ldr r3, [pc, #452] @ (80022e8 <managePulsanti+0x2c0>)
8002122: 881a ldrh r2, [r3, #0]
8002124: f241 030f movw r3, #4111 @ 0x100f
8002128: 4013 ands r3, r2
800212a: b29a uxth r2, r3
800212c: 4b6e ldr r3, [pc, #440] @ (80022e8 <managePulsanti+0x2c0>)
800212e: 801a strh r2, [r3, #0]
if (stPulsanti == 0) {
8002130: 4b6d ldr r3, [pc, #436] @ (80022e8 <managePulsanti+0x2c0>)
8002132: 881b ldrh r3, [r3, #0]
8002134: 2b00 cmp r3, #0
8002136: f040 80e0 bne.w 80022fa <managePulsanti+0x2d2>
switch (pulsanti & 0x3c) {
800213a: 4b69 ldr r3, [pc, #420] @ (80022e0 <managePulsanti+0x2b8>)
800213c: 781b ldrb r3, [r3, #0]
800213e: f003 033c and.w r3, r3, #60 @ 0x3c
8002142: 2b30 cmp r3, #48 @ 0x30
8002144: f200 80bb bhi.w 80022be <managePulsanti+0x296>
8002148: a201 add r2, pc, #4 @ (adr r2, 8002150 <managePulsanti+0x128>)
800214a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800214e: bf00 nop
8002150: 08002215 .word 0x08002215
8002154: 080022bf .word 0x080022bf
8002158: 080022bf .word 0x080022bf
800215c: 080022bf .word 0x080022bf
8002160: 08002271 .word 0x08002271
8002164: 080022bf .word 0x080022bf
8002168: 080022bf .word 0x080022bf
800216c: 080022bf .word 0x080022bf
8002170: 08002223 .word 0x08002223
8002174: 080022bf .word 0x080022bf
8002178: 080022bf .word 0x080022bf
800217c: 080022bf .word 0x080022bf
8002180: 080022a5 .word 0x080022a5
8002184: 080022bf .word 0x080022bf
8002188: 080022bf .word 0x080022bf
800218c: 080022bf .word 0x080022bf
8002190: 0800223d .word 0x0800223d
8002194: 080022bf .word 0x080022bf
8002198: 080022bf .word 0x080022bf
800219c: 080022bf .word 0x080022bf
80021a0: 080022bf .word 0x080022bf
80021a4: 080022bf .word 0x080022bf
80021a8: 080022bf .word 0x080022bf
80021ac: 080022bf .word 0x080022bf
80021b0: 080022bf .word 0x080022bf
80021b4: 080022bf .word 0x080022bf
80021b8: 080022bf .word 0x080022bf
80021bc: 080022bf .word 0x080022bf
80021c0: 080022bf .word 0x080022bf
80021c4: 080022bf .word 0x080022bf
80021c8: 080022bf .word 0x080022bf
80021cc: 080022bf .word 0x080022bf
80021d0: 08002257 .word 0x08002257
80021d4: 080022bf .word 0x080022bf
80021d8: 080022bf .word 0x080022bf
80021dc: 080022bf .word 0x080022bf
80021e0: 080022bf .word 0x080022bf
80021e4: 080022bf .word 0x080022bf
80021e8: 080022bf .word 0x080022bf
80021ec: 080022bf .word 0x080022bf
80021f0: 080022bf .word 0x080022bf
80021f4: 080022bf .word 0x080022bf
80021f8: 080022bf .word 0x080022bf
80021fc: 080022bf .word 0x080022bf
8002200: 080022bf .word 0x080022bf
8002204: 080022bf .word 0x080022bf
8002208: 080022bf .word 0x080022bf
800220c: 080022bf .word 0x080022bf
8002210: 0800228b .word 0x0800228b
case 0x00:
rtTLC = 100;
8002214: 4b37 ldr r3, [pc, #220] @ (80022f4 <managePulsanti+0x2cc>)
8002216: 2264 movs r2, #100 @ 0x64
8002218: 701a strb r2, [r3, #0]
stPulsanti &= (!(M1FW | M1BW | M3FW | M3BW | M4FW | M4BW));
800221a: 4b33 ldr r3, [pc, #204] @ (80022e8 <managePulsanti+0x2c0>)
800221c: 2200 movs r2, #0
800221e: 801a strh r2, [r3, #0]
break;
8002220: e06b b.n 80022fa <managePulsanti+0x2d2>
case 0x08: //tlc1
if (rtTLC == 0)
8002222: 4b34 ldr r3, [pc, #208] @ (80022f4 <managePulsanti+0x2cc>)
8002224: 781b ldrb r3, [r3, #0]
8002226: b2db uxtb r3, r3
8002228: 2b00 cmp r3, #0
800222a: d14f bne.n 80022cc <managePulsanti+0x2a4>
stPulsanti |= M1FW;
800222c: 4b2e ldr r3, [pc, #184] @ (80022e8 <managePulsanti+0x2c0>)
800222e: 881b ldrh r3, [r3, #0]
8002230: f043 0310 orr.w r3, r3, #16
8002234: b29a uxth r2, r3
8002236: 4b2c ldr r3, [pc, #176] @ (80022e8 <managePulsanti+0x2c0>)
8002238: 801a strh r2, [r3, #0]
break;
800223a: e047 b.n 80022cc <managePulsanti+0x2a4>
case 0x10: //tlc2
if (rtTLC == 0)
800223c: 4b2d ldr r3, [pc, #180] @ (80022f4 <managePulsanti+0x2cc>)
800223e: 781b ldrb r3, [r3, #0]
8002240: b2db uxtb r3, r3
8002242: 2b00 cmp r3, #0
8002244: d144 bne.n 80022d0 <managePulsanti+0x2a8>
stPulsanti |= M1BW;
8002246: 4b28 ldr r3, [pc, #160] @ (80022e8 <managePulsanti+0x2c0>)
8002248: 881b ldrh r3, [r3, #0]
800224a: f043 0320 orr.w r3, r3, #32
800224e: b29a uxth r2, r3
8002250: 4b25 ldr r3, [pc, #148] @ (80022e8 <managePulsanti+0x2c0>)
8002252: 801a strh r2, [r3, #0]
break;
8002254: e03c b.n 80022d0 <managePulsanti+0x2a8>
case 0x20: //tlc3
if (rtTLC == 0)
8002256: 4b27 ldr r3, [pc, #156] @ (80022f4 <managePulsanti+0x2cc>)
8002258: 781b ldrb r3, [r3, #0]
800225a: b2db uxtb r3, r3
800225c: 2b00 cmp r3, #0
800225e: d139 bne.n 80022d4 <managePulsanti+0x2ac>
stPulsanti |= M3FW;
8002260: 4b21 ldr r3, [pc, #132] @ (80022e8 <managePulsanti+0x2c0>)
8002262: 881b ldrh r3, [r3, #0]
8002264: f443 7380 orr.w r3, r3, #256 @ 0x100
8002268: b29a uxth r2, r3
800226a: 4b1f ldr r3, [pc, #124] @ (80022e8 <managePulsanti+0x2c0>)
800226c: 801a strh r2, [r3, #0]
break;
800226e: e031 b.n 80022d4 <managePulsanti+0x2ac>
case 0x04: //tlc4
if (rtTLC == 0)
8002270: 4b20 ldr r3, [pc, #128] @ (80022f4 <managePulsanti+0x2cc>)
8002272: 781b ldrb r3, [r3, #0]
8002274: b2db uxtb r3, r3
8002276: 2b00 cmp r3, #0
8002278: d12e bne.n 80022d8 <managePulsanti+0x2b0>
stPulsanti |= M3BW;
800227a: 4b1b ldr r3, [pc, #108] @ (80022e8 <managePulsanti+0x2c0>)
800227c: 881b ldrh r3, [r3, #0]
800227e: f443 7300 orr.w r3, r3, #512 @ 0x200
8002282: b29a uxth r2, r3
8002284: 4b18 ldr r3, [pc, #96] @ (80022e8 <managePulsanti+0x2c0>)
8002286: 801a strh r2, [r3, #0]
break;
8002288: e026 b.n 80022d8 <managePulsanti+0x2b0>
case 0x30: //tlc5
if (rtTLC == 0)
800228a: 4b1a ldr r3, [pc, #104] @ (80022f4 <managePulsanti+0x2cc>)
800228c: 781b ldrb r3, [r3, #0]
800228e: b2db uxtb r3, r3
8002290: 2b00 cmp r3, #0
8002292: d123 bne.n 80022dc <managePulsanti+0x2b4>
stPulsanti |= M4FW;
8002294: 4b14 ldr r3, [pc, #80] @ (80022e8 <managePulsanti+0x2c0>)
8002296: 881b ldrh r3, [r3, #0]
8002298: f443 6380 orr.w r3, r3, #1024 @ 0x400
800229c: b29a uxth r2, r3
800229e: 4b12 ldr r3, [pc, #72] @ (80022e8 <managePulsanti+0x2c0>)
80022a0: 801a strh r2, [r3, #0]
break;
80022a2: e01b b.n 80022dc <managePulsanti+0x2b4>
case 0x0c: //tlc6
if (rtTLC == 0)
80022a4: 4b13 ldr r3, [pc, #76] @ (80022f4 <managePulsanti+0x2cc>)
80022a6: 781b ldrb r3, [r3, #0]
80022a8: b2db uxtb r3, r3
80022aa: 2b00 cmp r3, #0
80022ac: d124 bne.n 80022f8 <managePulsanti+0x2d0>
stPulsanti |= M4BW;
80022ae: 4b0e ldr r3, [pc, #56] @ (80022e8 <managePulsanti+0x2c0>)
80022b0: 881b ldrh r3, [r3, #0]
80022b2: f443 6300 orr.w r3, r3, #2048 @ 0x800
80022b6: b29a uxth r2, r3
80022b8: 4b0b ldr r3, [pc, #44] @ (80022e8 <managePulsanti+0x2c0>)
80022ba: 801a strh r2, [r3, #0]
break;
80022bc: e01c b.n 80022f8 <managePulsanti+0x2d0>
default:
rtTLC = 100;
80022be: 4b0d ldr r3, [pc, #52] @ (80022f4 <managePulsanti+0x2cc>)
80022c0: 2264 movs r2, #100 @ 0x64
80022c2: 701a strb r2, [r3, #0]
stPulsanti &= (!(M1FW | M1BW | M3FW | M3BW | M4FW | M4BW));
80022c4: 4b08 ldr r3, [pc, #32] @ (80022e8 <managePulsanti+0x2c0>)
80022c6: 2200 movs r2, #0
80022c8: 801a strh r2, [r3, #0]
break;
80022ca: e016 b.n 80022fa <managePulsanti+0x2d2>
break;
80022cc: bf00 nop
80022ce: e014 b.n 80022fa <managePulsanti+0x2d2>
break;
80022d0: bf00 nop
80022d2: e012 b.n 80022fa <managePulsanti+0x2d2>
break;
80022d4: bf00 nop
80022d6: e010 b.n 80022fa <managePulsanti+0x2d2>
break;
80022d8: bf00 nop
80022da: e00e b.n 80022fa <managePulsanti+0x2d2>
break;
80022dc: bf00 nop
80022de: e00c b.n 80022fa <managePulsanti+0x2d2>
80022e0: 200003f0 .word 0x200003f0
80022e4: 20000004 .word 0x20000004
80022e8: 20000454 .word 0x20000454
80022ec: 40011000 .word 0x40011000
80022f0: 20000005 .word 0x20000005
80022f4: 20000006 .word 0x20000006
break;
80022f8: bf00 nop
}
}
}
80022fa: bf00 nop
80022fc: bd80 pop {r7, pc}
80022fe: bf00 nop
08002300 <manageCiclo>:
void manageCiclo(void) {
8002300: b580 push {r7, lr}
8002302: b084 sub sp, #16
8002304: af02 add r7, sp, #8
motMov_st m1, m2, m3, m4;
switch (stCiclo) {
8002306: 4b9b ldr r3, [pc, #620] @ (8002574 <manageCiclo+0x274>)
8002308: 781b ldrb r3, [r3, #0]
800230a: 2b19 cmp r3, #25
800230c: f200 8690 bhi.w 8003030 <manageCiclo+0xd30>
8002310: a201 add r2, pc, #4 @ (adr r2, 8002318 <manageCiclo+0x18>)
8002312: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002316: bf00 nop
8002318: 08002381 .word 0x08002381
800231c: 0800244d .word 0x0800244d
8002320: 08002497 .word 0x08002497
8002324: 080024e1 .word 0x080024e1
8002328: 0800252b .word 0x0800252b
800232c: 080025b1 .word 0x080025b1
8002330: 080025fb .word 0x080025fb
8002334: 08002645 .word 0x08002645
8002338: 0800268f .word 0x0800268f
800233c: 080026d9 .word 0x080026d9
8002340: 08002723 .word 0x08002723
8002344: 0800276d .word 0x0800276d
8002348: 080027b7 .word 0x080027b7
800234c: 08002825 .word 0x08002825
8002350: 0800286d .word 0x0800286d
8002354: 080028b5 .word 0x080028b5
8002358: 080028fd .word 0x080028fd
800235c: 08002945 .word 0x08002945
8002360: 080029ad .word 0x080029ad
8002364: 08002a3d .word 0x08002a3d
8002368: 08002ad9 .word 0x08002ad9
800236c: 08002ef3 .word 0x08002ef3
8002370: 08002b43 .word 0x08002b43
8002374: 08002e03 .word 0x08002e03
8002378: 08002e93 .word 0x08002e93
800237c: 08002f5b .word 0x08002f5b
case omchiuso:
stPulsanti &= (~P1RELEASED);
8002380: 4b7d ldr r3, [pc, #500] @ (8002578 <manageCiclo+0x278>)
8002382: 881b ldrh r3, [r3, #0]
8002384: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8002388: b29a uxth r2, r3
800238a: 4b7b ldr r3, [pc, #492] @ (8002578 <manageCiclo+0x278>)
800238c: 801a strh r2, [r3, #0]
if (stPulsanti & P1START) {
800238e: 4b7a ldr r3, [pc, #488] @ (8002578 <manageCiclo+0x278>)
8002390: 881b ldrh r3, [r3, #0]
8002392: f003 0301 and.w r3, r3, #1
8002396: 2b00 cmp r3, #0
8002398: d014 beq.n 80023c4 <manageCiclo+0xc4>
stBuz = bzwarning;
800239a: 4b78 ldr r3, [pc, #480] @ (800257c <manageCiclo+0x27c>)
800239c: 2202 movs r2, #2
800239e: 701a strb r2, [r3, #0]
rtCiclo = 0;
80023a0: 4b77 ldr r3, [pc, #476] @ (8002580 <manageCiclo+0x280>)
80023a2: 2200 movs r2, #0
80023a4: 801a strh r2, [r3, #0]
stCiclo = omapertura0;
80023a6: 4b73 ldr r3, [pc, #460] @ (8002574 <manageCiclo+0x274>)
80023a8: 2212 movs r2, #18
80023aa: 701a strb r2, [r3, #0]
fchiuso = false;
80023ac: 4b75 ldr r3, [pc, #468] @ (8002584 <manageCiclo+0x284>)
80023ae: 2200 movs r2, #0
80023b0: 701a strb r2, [r3, #0]
(void) m1ap();
80023b2: f001 f9db bl 800376c <m1ap>
(void) m2ap();
80023b6: f001 faab bl 8003910 <m2ap>
(void) m3ap();
80023ba: f001 fb7b bl 8003ab4 <m3ap>
(void) m4ap();
80023be: f001 fc4d bl 8003c5c <m4ap>
80023c2: e00b b.n 80023dc <manageCiclo+0xdc>
} else if (stPulsanti & P1STOP) {
80023c4: 4b6c ldr r3, [pc, #432] @ (8002578 <manageCiclo+0x278>)
80023c6: 881b ldrh r3, [r3, #0]
80023c8: f003 0302 and.w r3, r3, #2
80023cc: 2b00 cmp r3, #0
80023ce: d005 beq.n 80023dc <manageCiclo+0xdc>
fchiuso = false;
80023d0: 4b6c ldr r3, [pc, #432] @ (8002584 <manageCiclo+0x284>)
80023d2: 2200 movs r2, #0
80023d4: 701a strb r2, [r3, #0]
stCiclo = omstopapertura;
80023d6: 4b67 ldr r3, [pc, #412] @ (8002574 <manageCiclo+0x274>)
80023d8: 2213 movs r2, #19
80023da: 701a strb r2, [r3, #0]
}
#ifdef ANEMCH
fchiuso = false;
#endif
if ((ch8 > thanem) && (fchiuso == false)) {
80023dc: 4b6a ldr r3, [pc, #424] @ (8002588 <manageCiclo+0x288>)
80023de: 881a ldrh r2, [r3, #0]
80023e0: 4b6a ldr r3, [pc, #424] @ (800258c <manageCiclo+0x28c>)
80023e2: 881b ldrh r3, [r3, #0]
80023e4: 429a cmp r2, r3
80023e6: d923 bls.n 8002430 <manageCiclo+0x130>
80023e8: 4b66 ldr r3, [pc, #408] @ (8002584 <manageCiclo+0x284>)
80023ea: 781b ldrb r3, [r3, #0]
80023ec: f083 0301 eor.w r3, r3, #1
80023f0: b2db uxtb r3, r3
80023f2: 2b00 cmp r3, #0
80023f4: d01c beq.n 8002430 <manageCiclo+0x130>
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET);
80023f6: 2201 movs r2, #1
80023f8: f44f 4100 mov.w r1, #32768 @ 0x8000
80023fc: 4864 ldr r0, [pc, #400] @ (8002590 <manageCiclo+0x290>)
80023fe: f004 f962 bl 80066c6 <HAL_GPIO_WritePin>
if (rtAnem == 0) {
8002402: 4b64 ldr r3, [pc, #400] @ (8002594 <manageCiclo+0x294>)
8002404: 881b ldrh r3, [r3, #0]
8002406: b29b uxth r3, r3
8002408: 2b00 cmp r3, #0
800240a: d11d bne.n 8002448 <manageCiclo+0x148>
rtCiclo=0;
800240c: 4b5c ldr r3, [pc, #368] @ (8002580 <manageCiclo+0x280>)
800240e: 2200 movs r2, #0
8002410: 801a strh r2, [r3, #0]
stBuz = bzmoving;
8002412: 4b5a ldr r3, [pc, #360] @ (800257c <manageCiclo+0x27c>)
8002414: 2201 movs r2, #1
8002416: 701a strb r2, [r3, #0]
stCiclo = omemergenza1;
8002418: 4b56 ldr r3, [pc, #344] @ (8002574 <manageCiclo+0x274>)
800241a: 2218 movs r2, #24
800241c: 701a strb r2, [r3, #0]
(void) m1ch();
800241e: f001 fcf1 bl 8003e04 <m1ch>
(void) m2ch();
8002422: f001 fdc1 bl 8003fa8 <m2ch>
(void) m3ch();
8002426: f001 fe91 bl 800414c <m3ch>
(void) m4ch();
800242a: f001 ff63 bl 80042f4 <m4ch>
if (rtAnem == 0) {
800242e: e00b b.n 8002448 <manageCiclo+0x148>
}
} else{
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET);
8002430: 2200 movs r2, #0
8002432: f44f 4100 mov.w r1, #32768 @ 0x8000
8002436: 4856 ldr r0, [pc, #344] @ (8002590 <manageCiclo+0x290>)
8002438: f004 f945 bl 80066c6 <HAL_GPIO_WritePin>
rtAnem = tanem;
800243c: 4b56 ldr r3, [pc, #344] @ (8002598 <manageCiclo+0x298>)
800243e: 881a ldrh r2, [r3, #0]
8002440: 4b54 ldr r3, [pc, #336] @ (8002594 <manageCiclo+0x294>)
8002442: 801a strh r2, [r3, #0]
}
break;
8002444: f000 bdf4 b.w 8003030 <manageCiclo+0xd30>
8002448: f000 bdf2 b.w 8003030 <manageCiclo+0xd30>
case omM1fw1:
(void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
800244c: 4b53 ldr r3, [pc, #332] @ (800259c <manageCiclo+0x29c>)
800244e: 881b ldrh r3, [r3, #0]
8002450: b2da uxtb r2, r3
8002452: 4b53 ldr r3, [pc, #332] @ (80025a0 <manageCiclo+0x2a0>)
8002454: 881b ldrh r3, [r3, #0]
8002456: b2d9 uxtb r1, r3
8002458: 4b52 ldr r3, [pc, #328] @ (80025a4 <manageCiclo+0x2a4>)
800245a: 881b ldrh r3, [r3, #0]
800245c: b2db uxtb r3, r3
800245e: 200a movs r0, #10
8002460: 9001 str r0, [sp, #4]
8002462: 9300 str r3, [sp, #0]
8002464: 460b mov r3, r1
8002466: 2100 movs r1, #0
8002468: 2001 movs r0, #1
800246a: f002 fb7d bl 8004b68 <ramp>
if (rtCiclo >= m1TimeoutMan)
800246e: 4b44 ldr r3, [pc, #272] @ (8002580 <manageCiclo+0x280>)
8002470: 881b ldrh r3, [r3, #0]
8002472: b29a uxth r2, r3
8002474: 4b4c ldr r3, [pc, #304] @ (80025a8 <manageCiclo+0x2a8>)
8002476: 881b ldrh r3, [r3, #0]
8002478: 429a cmp r2, r3
800247a: d302 bcc.n 8002482 <manageCiclo+0x182>
stCiclo = omStopMan;
800247c: 4b3d ldr r3, [pc, #244] @ (8002574 <manageCiclo+0x274>)
800247e: 2211 movs r2, #17
8002480: 701a strb r2, [r3, #0]
if (pulsanti == 0)
8002482: 4b4a ldr r3, [pc, #296] @ (80025ac <manageCiclo+0x2ac>)
8002484: 781b ldrb r3, [r3, #0]
8002486: 2b00 cmp r3, #0
8002488: f040 85a1 bne.w 8002fce <manageCiclo+0xcce>
stCiclo = omM1fw2;
800248c: 4b39 ldr r3, [pc, #228] @ (8002574 <manageCiclo+0x274>)
800248e: 2202 movs r2, #2
8002490: 701a strb r2, [r3, #0]
break;
8002492: f000 bd9c b.w 8002fce <manageCiclo+0xcce>
case omM1fw2:
(void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
8002496: 4b41 ldr r3, [pc, #260] @ (800259c <manageCiclo+0x29c>)
8002498: 881b ldrh r3, [r3, #0]
800249a: b2da uxtb r2, r3
800249c: 4b40 ldr r3, [pc, #256] @ (80025a0 <manageCiclo+0x2a0>)
800249e: 881b ldrh r3, [r3, #0]
80024a0: b2d9 uxtb r1, r3
80024a2: 4b40 ldr r3, [pc, #256] @ (80025a4 <manageCiclo+0x2a4>)
80024a4: 881b ldrh r3, [r3, #0]
80024a6: b2db uxtb r3, r3
80024a8: 200a movs r0, #10
80024aa: 9001 str r0, [sp, #4]
80024ac: 9300 str r3, [sp, #0]
80024ae: 460b mov r3, r1
80024b0: 2100 movs r1, #0
80024b2: 2001 movs r0, #1
80024b4: f002 fb58 bl 8004b68 <ramp>
if (rtCiclo >= m1TimeoutMan)
80024b8: 4b31 ldr r3, [pc, #196] @ (8002580 <manageCiclo+0x280>)
80024ba: 881b ldrh r3, [r3, #0]
80024bc: b29a uxth r2, r3
80024be: 4b3a ldr r3, [pc, #232] @ (80025a8 <manageCiclo+0x2a8>)
80024c0: 881b ldrh r3, [r3, #0]
80024c2: 429a cmp r2, r3
80024c4: d302 bcc.n 80024cc <manageCiclo+0x1cc>
stCiclo = omStopMan;
80024c6: 4b2b ldr r3, [pc, #172] @ (8002574 <manageCiclo+0x274>)
80024c8: 2211 movs r2, #17
80024ca: 701a strb r2, [r3, #0]
if (pulsanti)
80024cc: 4b37 ldr r3, [pc, #220] @ (80025ac <manageCiclo+0x2ac>)
80024ce: 781b ldrb r3, [r3, #0]
80024d0: 2b00 cmp r3, #0
80024d2: f000 857e beq.w 8002fd2 <manageCiclo+0xcd2>
stCiclo = omStopMan;
80024d6: 4b27 ldr r3, [pc, #156] @ (8002574 <manageCiclo+0x274>)
80024d8: 2211 movs r2, #17
80024da: 701a strb r2, [r3, #0]
break;
80024dc: f000 bd79 b.w 8002fd2 <manageCiclo+0xcd2>
case omM1bw1:
(void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
80024e0: 4b2e ldr r3, [pc, #184] @ (800259c <manageCiclo+0x29c>)
80024e2: 881b ldrh r3, [r3, #0]
80024e4: b2da uxtb r2, r3
80024e6: 4b2e ldr r3, [pc, #184] @ (80025a0 <manageCiclo+0x2a0>)
80024e8: 881b ldrh r3, [r3, #0]
80024ea: b2d9 uxtb r1, r3
80024ec: 4b2d ldr r3, [pc, #180] @ (80025a4 <manageCiclo+0x2a4>)
80024ee: 881b ldrh r3, [r3, #0]
80024f0: b2db uxtb r3, r3
80024f2: 200a movs r0, #10
80024f4: 9001 str r0, [sp, #4]
80024f6: 9300 str r3, [sp, #0]
80024f8: 460b mov r3, r1
80024fa: 2101 movs r1, #1
80024fc: 2001 movs r0, #1
80024fe: f002 fb33 bl 8004b68 <ramp>
if (rtCiclo >= m1TimeoutMan)
8002502: 4b1f ldr r3, [pc, #124] @ (8002580 <manageCiclo+0x280>)
8002504: 881b ldrh r3, [r3, #0]
8002506: b29a uxth r2, r3
8002508: 4b27 ldr r3, [pc, #156] @ (80025a8 <manageCiclo+0x2a8>)
800250a: 881b ldrh r3, [r3, #0]
800250c: 429a cmp r2, r3
800250e: d302 bcc.n 8002516 <manageCiclo+0x216>
stCiclo = omStopMan;
8002510: 4b18 ldr r3, [pc, #96] @ (8002574 <manageCiclo+0x274>)
8002512: 2211 movs r2, #17
8002514: 701a strb r2, [r3, #0]
if (pulsanti == 0)
8002516: 4b25 ldr r3, [pc, #148] @ (80025ac <manageCiclo+0x2ac>)
8002518: 781b ldrb r3, [r3, #0]
800251a: 2b00 cmp r3, #0
800251c: f040 855b bne.w 8002fd6 <manageCiclo+0xcd6>
stCiclo = omM1bw2;
8002520: 4b14 ldr r3, [pc, #80] @ (8002574 <manageCiclo+0x274>)
8002522: 2204 movs r2, #4
8002524: 701a strb r2, [r3, #0]
break;
8002526: f000 bd56 b.w 8002fd6 <manageCiclo+0xcd6>
case omM1bw2:
(void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
800252a: 4b1c ldr r3, [pc, #112] @ (800259c <manageCiclo+0x29c>)
800252c: 881b ldrh r3, [r3, #0]
800252e: b2da uxtb r2, r3
8002530: 4b1b ldr r3, [pc, #108] @ (80025a0 <manageCiclo+0x2a0>)
8002532: 881b ldrh r3, [r3, #0]
8002534: b2d9 uxtb r1, r3
8002536: 4b1b ldr r3, [pc, #108] @ (80025a4 <manageCiclo+0x2a4>)
8002538: 881b ldrh r3, [r3, #0]
800253a: b2db uxtb r3, r3
800253c: 200a movs r0, #10
800253e: 9001 str r0, [sp, #4]
8002540: 9300 str r3, [sp, #0]
8002542: 460b mov r3, r1
8002544: 2101 movs r1, #1
8002546: 2001 movs r0, #1
8002548: f002 fb0e bl 8004b68 <ramp>
if (rtCiclo >= m1TimeoutMan)
800254c: 4b0c ldr r3, [pc, #48] @ (8002580 <manageCiclo+0x280>)
800254e: 881b ldrh r3, [r3, #0]
8002550: b29a uxth r2, r3
8002552: 4b15 ldr r3, [pc, #84] @ (80025a8 <manageCiclo+0x2a8>)
8002554: 881b ldrh r3, [r3, #0]
8002556: 429a cmp r2, r3
8002558: d302 bcc.n 8002560 <manageCiclo+0x260>
stCiclo = omStopMan;
800255a: 4b06 ldr r3, [pc, #24] @ (8002574 <manageCiclo+0x274>)
800255c: 2211 movs r2, #17
800255e: 701a strb r2, [r3, #0]
if (pulsanti)
8002560: 4b12 ldr r3, [pc, #72] @ (80025ac <manageCiclo+0x2ac>)
8002562: 781b ldrb r3, [r3, #0]
8002564: 2b00 cmp r3, #0
8002566: f000 8538 beq.w 8002fda <manageCiclo+0xcda>
stCiclo = omStopMan;
800256a: 4b02 ldr r3, [pc, #8] @ (8002574 <manageCiclo+0x274>)
800256c: 2211 movs r2, #17
800256e: 701a strb r2, [r3, #0]
break;
8002570: f000 bd33 b.w 8002fda <manageCiclo+0xcda>
8002574: 20000456 .word 0x20000456
8002578: 20000454 .word 0x20000454
800257c: 20000457 .word 0x20000457
8002580: 200003fc .word 0x200003fc
8002584: 20000459 .word 0x20000459
8002588: 20000232 .word 0x20000232
800258c: 2000041c .word 0x2000041c
8002590: 40010800 .word 0x40010800
8002594: 200003fe .word 0x200003fe
8002598: 2000041a .word 0x2000041a
800259c: 2000044c .word 0x2000044c
80025a0: 20000420 .word 0x20000420
80025a4: 2000041e .word 0x2000041e
80025a8: 20000410 .word 0x20000410
80025ac: 200003f0 .word 0x200003f0
case omM2fw1:
(void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
80025b0: 4b93 ldr r3, [pc, #588] @ (8002800 <manageCiclo+0x500>)
80025b2: 885b ldrh r3, [r3, #2]
80025b4: b2da uxtb r2, r3
80025b6: 4b93 ldr r3, [pc, #588] @ (8002804 <manageCiclo+0x504>)
80025b8: 881b ldrh r3, [r3, #0]
80025ba: b2d9 uxtb r1, r3
80025bc: 4b92 ldr r3, [pc, #584] @ (8002808 <manageCiclo+0x508>)
80025be: 881b ldrh r3, [r3, #0]
80025c0: b2db uxtb r3, r3
80025c2: 200a movs r0, #10
80025c4: 9001 str r0, [sp, #4]
80025c6: 9300 str r3, [sp, #0]
80025c8: 460b mov r3, r1
80025ca: 2100 movs r1, #0
80025cc: 2002 movs r0, #2
80025ce: f002 facb bl 8004b68 <ramp>
if (rtCiclo >= m2TimeoutMan)
80025d2: 4b8e ldr r3, [pc, #568] @ (800280c <manageCiclo+0x50c>)
80025d4: 881b ldrh r3, [r3, #0]
80025d6: b29a uxth r2, r3
80025d8: 4b8d ldr r3, [pc, #564] @ (8002810 <manageCiclo+0x510>)
80025da: 881b ldrh r3, [r3, #0]
80025dc: 429a cmp r2, r3
80025de: d302 bcc.n 80025e6 <manageCiclo+0x2e6>
stCiclo = omStopMan;
80025e0: 4b8c ldr r3, [pc, #560] @ (8002814 <manageCiclo+0x514>)
80025e2: 2211 movs r2, #17
80025e4: 701a strb r2, [r3, #0]
if (pulsanti == 0)
80025e6: 4b8c ldr r3, [pc, #560] @ (8002818 <manageCiclo+0x518>)
80025e8: 781b ldrb r3, [r3, #0]
80025ea: 2b00 cmp r3, #0
80025ec: f040 84f7 bne.w 8002fde <manageCiclo+0xcde>
stCiclo = omM2fw2;
80025f0: 4b88 ldr r3, [pc, #544] @ (8002814 <manageCiclo+0x514>)
80025f2: 2206 movs r2, #6
80025f4: 701a strb r2, [r3, #0]
break;
80025f6: f000 bcf2 b.w 8002fde <manageCiclo+0xcde>
case omM2fw2:
(void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
80025fa: 4b81 ldr r3, [pc, #516] @ (8002800 <manageCiclo+0x500>)
80025fc: 885b ldrh r3, [r3, #2]
80025fe: b2da uxtb r2, r3
8002600: 4b80 ldr r3, [pc, #512] @ (8002804 <manageCiclo+0x504>)
8002602: 881b ldrh r3, [r3, #0]
8002604: b2d9 uxtb r1, r3
8002606: 4b80 ldr r3, [pc, #512] @ (8002808 <manageCiclo+0x508>)
8002608: 881b ldrh r3, [r3, #0]
800260a: b2db uxtb r3, r3
800260c: 200a movs r0, #10
800260e: 9001 str r0, [sp, #4]
8002610: 9300 str r3, [sp, #0]
8002612: 460b mov r3, r1
8002614: 2100 movs r1, #0
8002616: 2002 movs r0, #2
8002618: f002 faa6 bl 8004b68 <ramp>
if (rtCiclo >= m2TimeoutMan)
800261c: 4b7b ldr r3, [pc, #492] @ (800280c <manageCiclo+0x50c>)
800261e: 881b ldrh r3, [r3, #0]
8002620: b29a uxth r2, r3
8002622: 4b7b ldr r3, [pc, #492] @ (8002810 <manageCiclo+0x510>)
8002624: 881b ldrh r3, [r3, #0]
8002626: 429a cmp r2, r3
8002628: d302 bcc.n 8002630 <manageCiclo+0x330>
stCiclo = omStopMan;
800262a: 4b7a ldr r3, [pc, #488] @ (8002814 <manageCiclo+0x514>)
800262c: 2211 movs r2, #17
800262e: 701a strb r2, [r3, #0]
if (pulsanti)
8002630: 4b79 ldr r3, [pc, #484] @ (8002818 <manageCiclo+0x518>)
8002632: 781b ldrb r3, [r3, #0]
8002634: 2b00 cmp r3, #0
8002636: f000 84d4 beq.w 8002fe2 <manageCiclo+0xce2>
stCiclo = omStopMan;
800263a: 4b76 ldr r3, [pc, #472] @ (8002814 <manageCiclo+0x514>)
800263c: 2211 movs r2, #17
800263e: 701a strb r2, [r3, #0]
break;
8002640: f000 bccf b.w 8002fe2 <manageCiclo+0xce2>
case omM2bw1:
(void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
8002644: 4b6e ldr r3, [pc, #440] @ (8002800 <manageCiclo+0x500>)
8002646: 885b ldrh r3, [r3, #2]
8002648: b2da uxtb r2, r3
800264a: 4b6e ldr r3, [pc, #440] @ (8002804 <manageCiclo+0x504>)
800264c: 881b ldrh r3, [r3, #0]
800264e: b2d9 uxtb r1, r3
8002650: 4b6d ldr r3, [pc, #436] @ (8002808 <manageCiclo+0x508>)
8002652: 881b ldrh r3, [r3, #0]
8002654: b2db uxtb r3, r3
8002656: 200a movs r0, #10
8002658: 9001 str r0, [sp, #4]
800265a: 9300 str r3, [sp, #0]
800265c: 460b mov r3, r1
800265e: 2101 movs r1, #1
8002660: 2002 movs r0, #2
8002662: f002 fa81 bl 8004b68 <ramp>
if (rtCiclo >= m2TimeoutMan)
8002666: 4b69 ldr r3, [pc, #420] @ (800280c <manageCiclo+0x50c>)
8002668: 881b ldrh r3, [r3, #0]
800266a: b29a uxth r2, r3
800266c: 4b68 ldr r3, [pc, #416] @ (8002810 <manageCiclo+0x510>)
800266e: 881b ldrh r3, [r3, #0]
8002670: 429a cmp r2, r3
8002672: d302 bcc.n 800267a <manageCiclo+0x37a>
stCiclo = omStopMan;
8002674: 4b67 ldr r3, [pc, #412] @ (8002814 <manageCiclo+0x514>)
8002676: 2211 movs r2, #17
8002678: 701a strb r2, [r3, #0]
if (pulsanti == 0)
800267a: 4b67 ldr r3, [pc, #412] @ (8002818 <manageCiclo+0x518>)
800267c: 781b ldrb r3, [r3, #0]
800267e: 2b00 cmp r3, #0
8002680: f040 84b1 bne.w 8002fe6 <manageCiclo+0xce6>
stCiclo = omM2bw2;
8002684: 4b63 ldr r3, [pc, #396] @ (8002814 <manageCiclo+0x514>)
8002686: 2208 movs r2, #8
8002688: 701a strb r2, [r3, #0]
break;
800268a: f000 bcac b.w 8002fe6 <manageCiclo+0xce6>
case omM2bw2:
(void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
800268e: 4b5c ldr r3, [pc, #368] @ (8002800 <manageCiclo+0x500>)
8002690: 885b ldrh r3, [r3, #2]
8002692: b2da uxtb r2, r3
8002694: 4b5b ldr r3, [pc, #364] @ (8002804 <manageCiclo+0x504>)
8002696: 881b ldrh r3, [r3, #0]
8002698: b2d9 uxtb r1, r3
800269a: 4b5b ldr r3, [pc, #364] @ (8002808 <manageCiclo+0x508>)
800269c: 881b ldrh r3, [r3, #0]
800269e: b2db uxtb r3, r3
80026a0: 200a movs r0, #10
80026a2: 9001 str r0, [sp, #4]
80026a4: 9300 str r3, [sp, #0]
80026a6: 460b mov r3, r1
80026a8: 2101 movs r1, #1
80026aa: 2002 movs r0, #2
80026ac: f002 fa5c bl 8004b68 <ramp>
if (rtCiclo >= m2TimeoutMan)
80026b0: 4b56 ldr r3, [pc, #344] @ (800280c <manageCiclo+0x50c>)
80026b2: 881b ldrh r3, [r3, #0]
80026b4: b29a uxth r2, r3
80026b6: 4b56 ldr r3, [pc, #344] @ (8002810 <manageCiclo+0x510>)
80026b8: 881b ldrh r3, [r3, #0]
80026ba: 429a cmp r2, r3
80026bc: d302 bcc.n 80026c4 <manageCiclo+0x3c4>
stCiclo = omStopMan;
80026be: 4b55 ldr r3, [pc, #340] @ (8002814 <manageCiclo+0x514>)
80026c0: 2211 movs r2, #17
80026c2: 701a strb r2, [r3, #0]
if (pulsanti)
80026c4: 4b54 ldr r3, [pc, #336] @ (8002818 <manageCiclo+0x518>)
80026c6: 781b ldrb r3, [r3, #0]
80026c8: 2b00 cmp r3, #0
80026ca: f000 848e beq.w 8002fea <manageCiclo+0xcea>
stCiclo = omStopMan;
80026ce: 4b51 ldr r3, [pc, #324] @ (8002814 <manageCiclo+0x514>)
80026d0: 2211 movs r2, #17
80026d2: 701a strb r2, [r3, #0]
break;
80026d4: f000 bc89 b.w 8002fea <manageCiclo+0xcea>
case omM3fw1:
(void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
80026d8: 4b49 ldr r3, [pc, #292] @ (8002800 <manageCiclo+0x500>)
80026da: 889b ldrh r3, [r3, #4]
80026dc: b2da uxtb r2, r3
80026de: 4b4f ldr r3, [pc, #316] @ (800281c <manageCiclo+0x51c>)
80026e0: 881b ldrh r3, [r3, #0]
80026e2: b2d9 uxtb r1, r3
80026e4: 4b48 ldr r3, [pc, #288] @ (8002808 <manageCiclo+0x508>)
80026e6: 881b ldrh r3, [r3, #0]
80026e8: b2db uxtb r3, r3
80026ea: 200a movs r0, #10
80026ec: 9001 str r0, [sp, #4]
80026ee: 9300 str r3, [sp, #0]
80026f0: 460b mov r3, r1
80026f2: 2100 movs r1, #0
80026f4: 2003 movs r0, #3
80026f6: f002 fa37 bl 8004b68 <ramp>
if (rtCiclo >= m3TimeoutMan)
80026fa: 4b44 ldr r3, [pc, #272] @ (800280c <manageCiclo+0x50c>)
80026fc: 881b ldrh r3, [r3, #0]
80026fe: b29a uxth r2, r3
8002700: 4b47 ldr r3, [pc, #284] @ (8002820 <manageCiclo+0x520>)
8002702: 881b ldrh r3, [r3, #0]
8002704: 429a cmp r2, r3
8002706: d302 bcc.n 800270e <manageCiclo+0x40e>
stCiclo = omStopMan;
8002708: 4b42 ldr r3, [pc, #264] @ (8002814 <manageCiclo+0x514>)
800270a: 2211 movs r2, #17
800270c: 701a strb r2, [r3, #0]
if (pulsanti == 0)
800270e: 4b42 ldr r3, [pc, #264] @ (8002818 <manageCiclo+0x518>)
8002710: 781b ldrb r3, [r3, #0]
8002712: 2b00 cmp r3, #0
8002714: f040 846b bne.w 8002fee <manageCiclo+0xcee>
stCiclo = omM3fw2;
8002718: 4b3e ldr r3, [pc, #248] @ (8002814 <manageCiclo+0x514>)
800271a: 220a movs r2, #10
800271c: 701a strb r2, [r3, #0]
break;
800271e: f000 bc66 b.w 8002fee <manageCiclo+0xcee>
case omM3fw2:
(void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
8002722: 4b37 ldr r3, [pc, #220] @ (8002800 <manageCiclo+0x500>)
8002724: 889b ldrh r3, [r3, #4]
8002726: b2da uxtb r2, r3
8002728: 4b3c ldr r3, [pc, #240] @ (800281c <manageCiclo+0x51c>)
800272a: 881b ldrh r3, [r3, #0]
800272c: b2d9 uxtb r1, r3
800272e: 4b36 ldr r3, [pc, #216] @ (8002808 <manageCiclo+0x508>)
8002730: 881b ldrh r3, [r3, #0]
8002732: b2db uxtb r3, r3
8002734: 200a movs r0, #10
8002736: 9001 str r0, [sp, #4]
8002738: 9300 str r3, [sp, #0]
800273a: 460b mov r3, r1
800273c: 2100 movs r1, #0
800273e: 2003 movs r0, #3
8002740: f002 fa12 bl 8004b68 <ramp>
if (rtCiclo >= m3TimeoutMan)
8002744: 4b31 ldr r3, [pc, #196] @ (800280c <manageCiclo+0x50c>)
8002746: 881b ldrh r3, [r3, #0]
8002748: b29a uxth r2, r3
800274a: 4b35 ldr r3, [pc, #212] @ (8002820 <manageCiclo+0x520>)
800274c: 881b ldrh r3, [r3, #0]
800274e: 429a cmp r2, r3
8002750: d302 bcc.n 8002758 <manageCiclo+0x458>
stCiclo = omStopMan;
8002752: 4b30 ldr r3, [pc, #192] @ (8002814 <manageCiclo+0x514>)
8002754: 2211 movs r2, #17
8002756: 701a strb r2, [r3, #0]
if (pulsanti)
8002758: 4b2f ldr r3, [pc, #188] @ (8002818 <manageCiclo+0x518>)
800275a: 781b ldrb r3, [r3, #0]
800275c: 2b00 cmp r3, #0
800275e: f000 8448 beq.w 8002ff2 <manageCiclo+0xcf2>
stCiclo = omStopMan;
8002762: 4b2c ldr r3, [pc, #176] @ (8002814 <manageCiclo+0x514>)
8002764: 2211 movs r2, #17
8002766: 701a strb r2, [r3, #0]
break;
8002768: f000 bc43 b.w 8002ff2 <manageCiclo+0xcf2>
case omM3bw1:
(void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
800276c: 4b24 ldr r3, [pc, #144] @ (8002800 <manageCiclo+0x500>)
800276e: 889b ldrh r3, [r3, #4]
8002770: b2da uxtb r2, r3
8002772: 4b2a ldr r3, [pc, #168] @ (800281c <manageCiclo+0x51c>)
8002774: 881b ldrh r3, [r3, #0]
8002776: b2d9 uxtb r1, r3
8002778: 4b23 ldr r3, [pc, #140] @ (8002808 <manageCiclo+0x508>)
800277a: 881b ldrh r3, [r3, #0]
800277c: b2db uxtb r3, r3
800277e: 200a movs r0, #10
8002780: 9001 str r0, [sp, #4]
8002782: 9300 str r3, [sp, #0]
8002784: 460b mov r3, r1
8002786: 2101 movs r1, #1
8002788: 2003 movs r0, #3
800278a: f002 f9ed bl 8004b68 <ramp>
if (rtCiclo >= m3TimeoutMan)
800278e: 4b1f ldr r3, [pc, #124] @ (800280c <manageCiclo+0x50c>)
8002790: 881b ldrh r3, [r3, #0]
8002792: b29a uxth r2, r3
8002794: 4b22 ldr r3, [pc, #136] @ (8002820 <manageCiclo+0x520>)
8002796: 881b ldrh r3, [r3, #0]
8002798: 429a cmp r2, r3
800279a: d302 bcc.n 80027a2 <manageCiclo+0x4a2>
stCiclo = omStopMan;
800279c: 4b1d ldr r3, [pc, #116] @ (8002814 <manageCiclo+0x514>)
800279e: 2211 movs r2, #17
80027a0: 701a strb r2, [r3, #0]
if (pulsanti == 0)
80027a2: 4b1d ldr r3, [pc, #116] @ (8002818 <manageCiclo+0x518>)
80027a4: 781b ldrb r3, [r3, #0]
80027a6: 2b00 cmp r3, #0
80027a8: f040 8425 bne.w 8002ff6 <manageCiclo+0xcf6>
stCiclo = omM3bw2;
80027ac: 4b19 ldr r3, [pc, #100] @ (8002814 <manageCiclo+0x514>)
80027ae: 220c movs r2, #12
80027b0: 701a strb r2, [r3, #0]
break;
80027b2: f000 bc20 b.w 8002ff6 <manageCiclo+0xcf6>
case omM3bw2:
(void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
80027b6: 4b12 ldr r3, [pc, #72] @ (8002800 <manageCiclo+0x500>)
80027b8: 889b ldrh r3, [r3, #4]
80027ba: b2da uxtb r2, r3
80027bc: 4b17 ldr r3, [pc, #92] @ (800281c <manageCiclo+0x51c>)
80027be: 881b ldrh r3, [r3, #0]
80027c0: b2d9 uxtb r1, r3
80027c2: 4b11 ldr r3, [pc, #68] @ (8002808 <manageCiclo+0x508>)
80027c4: 881b ldrh r3, [r3, #0]
80027c6: b2db uxtb r3, r3
80027c8: 200a movs r0, #10
80027ca: 9001 str r0, [sp, #4]
80027cc: 9300 str r3, [sp, #0]
80027ce: 460b mov r3, r1
80027d0: 2101 movs r1, #1
80027d2: 2003 movs r0, #3
80027d4: f002 f9c8 bl 8004b68 <ramp>
if (rtCiclo >= m3TimeoutMan)
80027d8: 4b0c ldr r3, [pc, #48] @ (800280c <manageCiclo+0x50c>)
80027da: 881b ldrh r3, [r3, #0]
80027dc: b29a uxth r2, r3
80027de: 4b10 ldr r3, [pc, #64] @ (8002820 <manageCiclo+0x520>)
80027e0: 881b ldrh r3, [r3, #0]
80027e2: 429a cmp r2, r3
80027e4: d302 bcc.n 80027ec <manageCiclo+0x4ec>
stCiclo = omStopMan;
80027e6: 4b0b ldr r3, [pc, #44] @ (8002814 <manageCiclo+0x514>)
80027e8: 2211 movs r2, #17
80027ea: 701a strb r2, [r3, #0]
if (pulsanti)
80027ec: 4b0a ldr r3, [pc, #40] @ (8002818 <manageCiclo+0x518>)
80027ee: 781b ldrb r3, [r3, #0]
80027f0: 2b00 cmp r3, #0
80027f2: f000 8402 beq.w 8002ffa <manageCiclo+0xcfa>
stCiclo = omStopMan;
80027f6: 4b07 ldr r3, [pc, #28] @ (8002814 <manageCiclo+0x514>)
80027f8: 2211 movs r2, #17
80027fa: 701a strb r2, [r3, #0]
break;
80027fc: e3fd b.n 8002ffa <manageCiclo+0xcfa>
80027fe: bf00 nop
8002800: 2000044c .word 0x2000044c
8002804: 20000422 .word 0x20000422
8002808: 2000041e .word 0x2000041e
800280c: 200003fc .word 0x200003fc
8002810: 20000412 .word 0x20000412
8002814: 20000456 .word 0x20000456
8002818: 200003f0 .word 0x200003f0
800281c: 20000424 .word 0x20000424
8002820: 20000414 .word 0x20000414
case omM4fw1:
(void) ramp(M4, FW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
8002824: 4ba3 ldr r3, [pc, #652] @ (8002ab4 <manageCiclo+0x7b4>)
8002826: 88db ldrh r3, [r3, #6]
8002828: b2da uxtb r2, r3
800282a: 4ba3 ldr r3, [pc, #652] @ (8002ab8 <manageCiclo+0x7b8>)
800282c: 881b ldrh r3, [r3, #0]
800282e: b2d9 uxtb r1, r3
8002830: 4ba2 ldr r3, [pc, #648] @ (8002abc <manageCiclo+0x7bc>)
8002832: 881b ldrh r3, [r3, #0]
8002834: b2db uxtb r3, r3
8002836: 200a movs r0, #10
8002838: 9001 str r0, [sp, #4]
800283a: 9300 str r3, [sp, #0]
800283c: 460b mov r3, r1
800283e: 2100 movs r1, #0
8002840: 2004 movs r0, #4
8002842: f002 f991 bl 8004b68 <ramp>
if (rtCiclo >= m4TimeoutMan)
8002846: 4b9e ldr r3, [pc, #632] @ (8002ac0 <manageCiclo+0x7c0>)
8002848: 881b ldrh r3, [r3, #0]
800284a: b29a uxth r2, r3
800284c: 4b9d ldr r3, [pc, #628] @ (8002ac4 <manageCiclo+0x7c4>)
800284e: 881b ldrh r3, [r3, #0]
8002850: 429a cmp r2, r3
8002852: d302 bcc.n 800285a <manageCiclo+0x55a>
stCiclo = omStopMan;
8002854: 4b9c ldr r3, [pc, #624] @ (8002ac8 <manageCiclo+0x7c8>)
8002856: 2211 movs r2, #17
8002858: 701a strb r2, [r3, #0]
if (pulsanti == 0)
800285a: 4b9c ldr r3, [pc, #624] @ (8002acc <manageCiclo+0x7cc>)
800285c: 781b ldrb r3, [r3, #0]
800285e: 2b00 cmp r3, #0
8002860: f040 83cd bne.w 8002ffe <manageCiclo+0xcfe>
stCiclo = omM4fw2;
8002864: 4b98 ldr r3, [pc, #608] @ (8002ac8 <manageCiclo+0x7c8>)
8002866: 220e movs r2, #14
8002868: 701a strb r2, [r3, #0]
break;
800286a: e3c8 b.n 8002ffe <manageCiclo+0xcfe>
case omM4fw2:
(void) ramp(M4, FW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
800286c: 4b91 ldr r3, [pc, #580] @ (8002ab4 <manageCiclo+0x7b4>)
800286e: 88db ldrh r3, [r3, #6]
8002870: b2da uxtb r2, r3
8002872: 4b91 ldr r3, [pc, #580] @ (8002ab8 <manageCiclo+0x7b8>)
8002874: 881b ldrh r3, [r3, #0]
8002876: b2d9 uxtb r1, r3
8002878: 4b90 ldr r3, [pc, #576] @ (8002abc <manageCiclo+0x7bc>)
800287a: 881b ldrh r3, [r3, #0]
800287c: b2db uxtb r3, r3
800287e: 200a movs r0, #10
8002880: 9001 str r0, [sp, #4]
8002882: 9300 str r3, [sp, #0]
8002884: 460b mov r3, r1
8002886: 2100 movs r1, #0
8002888: 2004 movs r0, #4
800288a: f002 f96d bl 8004b68 <ramp>
if (rtCiclo >= m4TimeoutMan)
800288e: 4b8c ldr r3, [pc, #560] @ (8002ac0 <manageCiclo+0x7c0>)
8002890: 881b ldrh r3, [r3, #0]
8002892: b29a uxth r2, r3
8002894: 4b8b ldr r3, [pc, #556] @ (8002ac4 <manageCiclo+0x7c4>)
8002896: 881b ldrh r3, [r3, #0]
8002898: 429a cmp r2, r3
800289a: d302 bcc.n 80028a2 <manageCiclo+0x5a2>
stCiclo = omStopMan;
800289c: 4b8a ldr r3, [pc, #552] @ (8002ac8 <manageCiclo+0x7c8>)
800289e: 2211 movs r2, #17
80028a0: 701a strb r2, [r3, #0]
if (pulsanti)
80028a2: 4b8a ldr r3, [pc, #552] @ (8002acc <manageCiclo+0x7cc>)
80028a4: 781b ldrb r3, [r3, #0]
80028a6: 2b00 cmp r3, #0
80028a8: f000 83ab beq.w 8003002 <manageCiclo+0xd02>
stCiclo = omStopMan;
80028ac: 4b86 ldr r3, [pc, #536] @ (8002ac8 <manageCiclo+0x7c8>)
80028ae: 2211 movs r2, #17
80028b0: 701a strb r2, [r3, #0]
break;
80028b2: e3a6 b.n 8003002 <manageCiclo+0xd02>
case omM4bw1:
(void) ramp(M4, BW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
80028b4: 4b7f ldr r3, [pc, #508] @ (8002ab4 <manageCiclo+0x7b4>)
80028b6: 88db ldrh r3, [r3, #6]
80028b8: b2da uxtb r2, r3
80028ba: 4b7f ldr r3, [pc, #508] @ (8002ab8 <manageCiclo+0x7b8>)
80028bc: 881b ldrh r3, [r3, #0]
80028be: b2d9 uxtb r1, r3
80028c0: 4b7e ldr r3, [pc, #504] @ (8002abc <manageCiclo+0x7bc>)
80028c2: 881b ldrh r3, [r3, #0]
80028c4: b2db uxtb r3, r3
80028c6: 200a movs r0, #10
80028c8: 9001 str r0, [sp, #4]
80028ca: 9300 str r3, [sp, #0]
80028cc: 460b mov r3, r1
80028ce: 2101 movs r1, #1
80028d0: 2004 movs r0, #4
80028d2: f002 f949 bl 8004b68 <ramp>
if (rtCiclo >= m4TimeoutMan)
80028d6: 4b7a ldr r3, [pc, #488] @ (8002ac0 <manageCiclo+0x7c0>)
80028d8: 881b ldrh r3, [r3, #0]
80028da: b29a uxth r2, r3
80028dc: 4b79 ldr r3, [pc, #484] @ (8002ac4 <manageCiclo+0x7c4>)
80028de: 881b ldrh r3, [r3, #0]
80028e0: 429a cmp r2, r3
80028e2: d302 bcc.n 80028ea <manageCiclo+0x5ea>
stCiclo = omStopMan;
80028e4: 4b78 ldr r3, [pc, #480] @ (8002ac8 <manageCiclo+0x7c8>)
80028e6: 2211 movs r2, #17
80028e8: 701a strb r2, [r3, #0]
if (pulsanti == 0)
80028ea: 4b78 ldr r3, [pc, #480] @ (8002acc <manageCiclo+0x7cc>)
80028ec: 781b ldrb r3, [r3, #0]
80028ee: 2b00 cmp r3, #0
80028f0: f040 8389 bne.w 8003006 <manageCiclo+0xd06>
stCiclo = omM4bw2;
80028f4: 4b74 ldr r3, [pc, #464] @ (8002ac8 <manageCiclo+0x7c8>)
80028f6: 2210 movs r2, #16
80028f8: 701a strb r2, [r3, #0]
break;
80028fa: e384 b.n 8003006 <manageCiclo+0xd06>
case omM4bw2:
(void) ramp(M4, BW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
80028fc: 4b6d ldr r3, [pc, #436] @ (8002ab4 <manageCiclo+0x7b4>)
80028fe: 88db ldrh r3, [r3, #6]
8002900: b2da uxtb r2, r3
8002902: 4b6d ldr r3, [pc, #436] @ (8002ab8 <manageCiclo+0x7b8>)
8002904: 881b ldrh r3, [r3, #0]
8002906: b2d9 uxtb r1, r3
8002908: 4b6c ldr r3, [pc, #432] @ (8002abc <manageCiclo+0x7bc>)
800290a: 881b ldrh r3, [r3, #0]
800290c: b2db uxtb r3, r3
800290e: 200a movs r0, #10
8002910: 9001 str r0, [sp, #4]
8002912: 9300 str r3, [sp, #0]
8002914: 460b mov r3, r1
8002916: 2101 movs r1, #1
8002918: 2004 movs r0, #4
800291a: f002 f925 bl 8004b68 <ramp>
if (rtCiclo >= m4TimeoutMan)
800291e: 4b68 ldr r3, [pc, #416] @ (8002ac0 <manageCiclo+0x7c0>)
8002920: 881b ldrh r3, [r3, #0]
8002922: b29a uxth r2, r3
8002924: 4b67 ldr r3, [pc, #412] @ (8002ac4 <manageCiclo+0x7c4>)
8002926: 881b ldrh r3, [r3, #0]
8002928: 429a cmp r2, r3
800292a: d302 bcc.n 8002932 <manageCiclo+0x632>
stCiclo = omStopMan;
800292c: 4b66 ldr r3, [pc, #408] @ (8002ac8 <manageCiclo+0x7c8>)
800292e: 2211 movs r2, #17
8002930: 701a strb r2, [r3, #0]
if (pulsanti)
8002932: 4b66 ldr r3, [pc, #408] @ (8002acc <manageCiclo+0x7cc>)
8002934: 781b ldrb r3, [r3, #0]
8002936: 2b00 cmp r3, #0
8002938: f000 8367 beq.w 800300a <manageCiclo+0xd0a>
stCiclo = omStopMan;
800293c: 4b62 ldr r3, [pc, #392] @ (8002ac8 <manageCiclo+0x7c8>)
800293e: 2211 movs r2, #17
8002940: 701a strb r2, [r3, #0]
break;
8002942: e362 b.n 800300a <manageCiclo+0xd0a>
case omStopMan:
SetMotPerc(M1, FW, 0);
8002944: 2200 movs r2, #0
8002946: 2100 movs r1, #0
8002948: 2001 movs r0, #1
800294a: f001 ff8d bl 8004868 <SetMotPerc>
SetMotPerc(M2, FW, 0);
800294e: 2200 movs r2, #0
8002950: 2100 movs r1, #0
8002952: 2002 movs r0, #2
8002954: f001 ff88 bl 8004868 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002958: 2200 movs r2, #0
800295a: 2100 movs r1, #0
800295c: 2003 movs r0, #3
800295e: f001 ff83 bl 8004868 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002962: 2200 movs r2, #0
8002964: 2100 movs r1, #0
8002966: 2004 movs r0, #4
8002968: f001 ff7e bl 8004868 <SetMotPerc>
SetMotPerc(M1, BW, 0);
800296c: 2200 movs r2, #0
800296e: 2101 movs r1, #1
8002970: 2001 movs r0, #1
8002972: f001 ff79 bl 8004868 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002976: 2200 movs r2, #0
8002978: 2101 movs r1, #1
800297a: 2002 movs r0, #2
800297c: f001 ff74 bl 8004868 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002980: 2200 movs r2, #0
8002982: 2101 movs r1, #1
8002984: 2003 movs r0, #3
8002986: f001 ff6f bl 8004868 <SetMotPerc>
SetMotPerc(M4, BW, 0);
800298a: 2200 movs r2, #0
800298c: 2101 movs r1, #1
800298e: 2004 movs r0, #4
8002990: f001 ff6a bl 8004868 <SetMotPerc>
if (pulsanti == 0) {
8002994: 4b4d ldr r3, [pc, #308] @ (8002acc <manageCiclo+0x7cc>)
8002996: 781b ldrb r3, [r3, #0]
8002998: 2b00 cmp r3, #0
800299a: f040 8338 bne.w 800300e <manageCiclo+0xd0e>
stBuz = bzoff;
800299e: 4b4c ldr r3, [pc, #304] @ (8002ad0 <manageCiclo+0x7d0>)
80029a0: 2200 movs r2, #0
80029a2: 701a strb r2, [r3, #0]
stCiclo = omaperto;
80029a4: 4b48 ldr r3, [pc, #288] @ (8002ac8 <manageCiclo+0x7c8>)
80029a6: 2216 movs r2, #22
80029a8: 701a strb r2, [r3, #0]
}
break;
80029aa: e330 b.n 800300e <manageCiclo+0xd0e>
case omapertura0:
if (rtCiclo >= 30) { //dopo 3 secondi
80029ac: 4b44 ldr r3, [pc, #272] @ (8002ac0 <manageCiclo+0x7c0>)
80029ae: 881b ldrh r3, [r3, #0]
80029b0: b29b uxth r3, r3
80029b2: 2b1d cmp r3, #29
80029b4: d924 bls.n 8002a00 <manageCiclo+0x700>
stBuz = bzmoving;
80029b6: 4b46 ldr r3, [pc, #280] @ (8002ad0 <manageCiclo+0x7d0>)
80029b8: 2201 movs r2, #1
80029ba: 701a strb r2, [r3, #0]
m1 = m1ap();
80029bc: f000 fed6 bl 800376c <m1ap>
80029c0: 4603 mov r3, r0
80029c2: 71fb strb r3, [r7, #7]
m2 = m2ap();
80029c4: f000 ffa4 bl 8003910 <m2ap>
80029c8: 4603 mov r3, r0
80029ca: 71bb strb r3, [r7, #6]
m3 = m3ap();
80029cc: f001 f872 bl 8003ab4 <m3ap>
80029d0: 4603 mov r3, r0
80029d2: 717b strb r3, [r7, #5]
m4 = m4ap();
80029d4: f001 f942 bl 8003c5c <m4ap>
80029d8: 4603 mov r3, r0
80029da: 713b strb r3, [r7, #4]
if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop)
80029dc: 79fb ldrb r3, [r7, #7]
80029de: 2b04 cmp r3, #4
80029e0: d10e bne.n 8002a00 <manageCiclo+0x700>
80029e2: 79bb ldrb r3, [r7, #6]
80029e4: 2b04 cmp r3, #4
80029e6: d10b bne.n 8002a00 <manageCiclo+0x700>
80029e8: 797b ldrb r3, [r7, #5]
80029ea: 2b04 cmp r3, #4
80029ec: d108 bne.n 8002a00 <manageCiclo+0x700>
&& (m4 == motStop)) {
80029ee: 793b ldrb r3, [r7, #4]
80029f0: 2b04 cmp r3, #4
80029f2: d105 bne.n 8002a00 <manageCiclo+0x700>
stBuz = bzoff;
80029f4: 4b36 ldr r3, [pc, #216] @ (8002ad0 <manageCiclo+0x7d0>)
80029f6: 2200 movs r2, #0
80029f8: 701a strb r2, [r3, #0]
stCiclo = omaperto;
80029fa: 4b33 ldr r3, [pc, #204] @ (8002ac8 <manageCiclo+0x7c8>)
80029fc: 2216 movs r2, #22
80029fe: 701a strb r2, [r3, #0]
}
}
if (stPulsanti & P1STOP)
8002a00: 4b34 ldr r3, [pc, #208] @ (8002ad4 <manageCiclo+0x7d4>)
8002a02: 881b ldrh r3, [r3, #0]
8002a04: f003 0302 and.w r3, r3, #2
8002a08: 2b00 cmp r3, #0
8002a0a: d002 beq.n 8002a12 <manageCiclo+0x712>
stCiclo = omstopapertura;
8002a0c: 4b2e ldr r3, [pc, #184] @ (8002ac8 <manageCiclo+0x7c8>)
8002a0e: 2213 movs r2, #19
8002a10: 701a strb r2, [r3, #0]
if ((stPulsanti & P1START)&&(stPulsanti & P1RELEASED)) {
8002a12: 4b30 ldr r3, [pc, #192] @ (8002ad4 <manageCiclo+0x7d4>)
8002a14: 881b ldrh r3, [r3, #0]
8002a16: f003 0301 and.w r3, r3, #1
8002a1a: 2b00 cmp r3, #0
8002a1c: f000 82f9 beq.w 8003012 <manageCiclo+0xd12>
8002a20: 4b2c ldr r3, [pc, #176] @ (8002ad4 <manageCiclo+0x7d4>)
8002a22: 881b ldrh r3, [r3, #0]
8002a24: f403 5380 and.w r3, r3, #4096 @ 0x1000
8002a28: 2b00 cmp r3, #0
8002a2a: f000 82f2 beq.w 8003012 <manageCiclo+0xd12>
stCiclo = omstoprestartchiusura;
8002a2e: 4b26 ldr r3, [pc, #152] @ (8002ac8 <manageCiclo+0x7c8>)
8002a30: 2214 movs r2, #20
8002a32: 701a strb r2, [r3, #0]
rtCiclo = 0;
8002a34: 4b22 ldr r3, [pc, #136] @ (8002ac0 <manageCiclo+0x7c0>)
8002a36: 2200 movs r2, #0
8002a38: 801a strh r2, [r3, #0]
}
break;
8002a3a: e2ea b.n 8003012 <manageCiclo+0xd12>
case omstopapertura:
SetMotPerc(M1, FW, 0);
8002a3c: 2200 movs r2, #0
8002a3e: 2100 movs r1, #0
8002a40: 2001 movs r0, #1
8002a42: f001 ff11 bl 8004868 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002a46: 2200 movs r2, #0
8002a48: 2100 movs r1, #0
8002a4a: 2002 movs r0, #2
8002a4c: f001 ff0c bl 8004868 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002a50: 2200 movs r2, #0
8002a52: 2100 movs r1, #0
8002a54: 2003 movs r0, #3
8002a56: f001 ff07 bl 8004868 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002a5a: 2200 movs r2, #0
8002a5c: 2100 movs r1, #0
8002a5e: 2004 movs r0, #4
8002a60: f001 ff02 bl 8004868 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002a64: 2200 movs r2, #0
8002a66: 2101 movs r1, #1
8002a68: 2001 movs r0, #1
8002a6a: f001 fefd bl 8004868 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002a6e: 2200 movs r2, #0
8002a70: 2101 movs r1, #1
8002a72: 2002 movs r0, #2
8002a74: f001 fef8 bl 8004868 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002a78: 2200 movs r2, #0
8002a7a: 2101 movs r1, #1
8002a7c: 2003 movs r0, #3
8002a7e: f001 fef3 bl 8004868 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002a82: 2200 movs r2, #0
8002a84: 2101 movs r1, #1
8002a86: 2004 movs r0, #4
8002a88: f001 feee bl 8004868 <SetMotPerc>
if (pulsanti == 0) {
8002a8c: 4b0f ldr r3, [pc, #60] @ (8002acc <manageCiclo+0x7cc>)
8002a8e: 781b ldrb r3, [r3, #0]
8002a90: 2b00 cmp r3, #0
8002a92: f040 82c0 bne.w 8003016 <manageCiclo+0xd16>
stBuz = bzoff;
8002a96: 4b0e ldr r3, [pc, #56] @ (8002ad0 <manageCiclo+0x7d0>)
8002a98: 2200 movs r2, #0
8002a9a: 701a strb r2, [r3, #0]
stCiclo = omchiuso;
8002a9c: 4b0a ldr r3, [pc, #40] @ (8002ac8 <manageCiclo+0x7c8>)
8002a9e: 2200 movs r2, #0
8002aa0: 701a strb r2, [r3, #0]
stPulsanti &= (~P1STOP);
8002aa2: 4b0c ldr r3, [pc, #48] @ (8002ad4 <manageCiclo+0x7d4>)
8002aa4: 881b ldrh r3, [r3, #0]
8002aa6: f023 0302 bic.w r3, r3, #2
8002aaa: b29a uxth r2, r3
8002aac: 4b09 ldr r3, [pc, #36] @ (8002ad4 <manageCiclo+0x7d4>)
8002aae: 801a strh r2, [r3, #0]
}
break;
8002ab0: e2b1 b.n 8003016 <manageCiclo+0xd16>
8002ab2: bf00 nop
8002ab4: 2000044c .word 0x2000044c
8002ab8: 20000426 .word 0x20000426
8002abc: 2000041e .word 0x2000041e
8002ac0: 200003fc .word 0x200003fc
8002ac4: 20000416 .word 0x20000416
8002ac8: 20000456 .word 0x20000456
8002acc: 200003f0 .word 0x200003f0
8002ad0: 20000457 .word 0x20000457
8002ad4: 20000454 .word 0x20000454
case omstoprestartchiusura:
SetMotPerc(M1, FW, 0);
8002ad8: 2200 movs r2, #0
8002ada: 2100 movs r1, #0
8002adc: 2001 movs r0, #1
8002ade: f001 fec3 bl 8004868 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002ae2: 2200 movs r2, #0
8002ae4: 2100 movs r1, #0
8002ae6: 2002 movs r0, #2
8002ae8: f001 febe bl 8004868 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002aec: 2200 movs r2, #0
8002aee: 2100 movs r1, #0
8002af0: 2003 movs r0, #3
8002af2: f001 feb9 bl 8004868 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002af6: 2200 movs r2, #0
8002af8: 2100 movs r1, #0
8002afa: 2004 movs r0, #4
8002afc: f001 feb4 bl 8004868 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002b00: 2200 movs r2, #0
8002b02: 2101 movs r1, #1
8002b04: 2001 movs r0, #1
8002b06: f001 feaf bl 8004868 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002b0a: 2200 movs r2, #0
8002b0c: 2101 movs r1, #1
8002b0e: 2002 movs r0, #2
8002b10: f001 feaa bl 8004868 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002b14: 2200 movs r2, #0
8002b16: 2101 movs r1, #1
8002b18: 2003 movs r0, #3
8002b1a: f001 fea5 bl 8004868 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002b1e: 2200 movs r2, #0
8002b20: 2101 movs r1, #1
8002b22: 2004 movs r0, #4
8002b24: f001 fea0 bl 8004868 <SetMotPerc>
stBuz = bzoff;
8002b28: 4b98 ldr r3, [pc, #608] @ (8002d8c <manageCiclo+0xa8c>)
8002b2a: 2200 movs r2, #0
8002b2c: 701a strb r2, [r3, #0]
if (rtCiclo >= 20)
8002b2e: 4b98 ldr r3, [pc, #608] @ (8002d90 <manageCiclo+0xa90>)
8002b30: 881b ldrh r3, [r3, #0]
8002b32: b29b uxth r3, r3
8002b34: 2b13 cmp r3, #19
8002b36: f240 8270 bls.w 800301a <manageCiclo+0xd1a>
stCiclo = omaperto;
8002b3a: 4b96 ldr r3, [pc, #600] @ (8002d94 <manageCiclo+0xa94>)
8002b3c: 2216 movs r2, #22
8002b3e: 701a strb r2, [r3, #0]
break;
8002b40: e26b b.n 800301a <manageCiclo+0xd1a>
case omaperto:
stPulsanti &= (~P1RELEASED);
8002b42: 4b95 ldr r3, [pc, #596] @ (8002d98 <manageCiclo+0xa98>)
8002b44: 881b ldrh r3, [r3, #0]
8002b46: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8002b4a: b29a uxth r2, r3
8002b4c: 4b92 ldr r3, [pc, #584] @ (8002d98 <manageCiclo+0xa98>)
8002b4e: 801a strh r2, [r3, #0]
rtCiclo = 0;
8002b50: 4b8f ldr r3, [pc, #572] @ (8002d90 <manageCiclo+0xa90>)
8002b52: 2200 movs r2, #0
8002b54: 801a strh r2, [r3, #0]
if (stPulsanti & P1START) {
8002b56: 4b90 ldr r3, [pc, #576] @ (8002d98 <manageCiclo+0xa98>)
8002b58: 881b ldrh r3, [r3, #0]
8002b5a: f003 0301 and.w r3, r3, #1
8002b5e: 2b00 cmp r3, #0
8002b60: d00d beq.n 8002b7e <manageCiclo+0x87e>
stBuz = bzmoving;
8002b62: 4b8a ldr r3, [pc, #552] @ (8002d8c <manageCiclo+0xa8c>)
8002b64: 2201 movs r2, #1
8002b66: 701a strb r2, [r3, #0]
//(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
stCiclo = omchiusura1;
8002b68: 4b8a ldr r3, [pc, #552] @ (8002d94 <manageCiclo+0xa94>)
8002b6a: 2217 movs r2, #23
8002b6c: 701a strb r2, [r3, #0]
(void) m1ch();
8002b6e: f001 f949 bl 8003e04 <m1ch>
(void) m2ch();
8002b72: f001 fa19 bl 8003fa8 <m2ch>
(void) m3ch();
8002b76: f001 fae9 bl 800414c <m3ch>
(void) m4ch();
8002b7a: f001 fbbb bl 80042f4 <m4ch>
}
if (ch8 > thanem) {
8002b7e: 4b87 ldr r3, [pc, #540] @ (8002d9c <manageCiclo+0xa9c>)
8002b80: 881a ldrh r2, [r3, #0]
8002b82: 4b87 ldr r3, [pc, #540] @ (8002da0 <manageCiclo+0xaa0>)
8002b84: 881b ldrh r3, [r3, #0]
8002b86: 429a cmp r2, r3
8002b88: d919 bls.n 8002bbe <manageCiclo+0x8be>
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET);
8002b8a: 2201 movs r2, #1
8002b8c: f44f 4100 mov.w r1, #32768 @ 0x8000
8002b90: 4884 ldr r0, [pc, #528] @ (8002da4 <manageCiclo+0xaa4>)
8002b92: f003 fd98 bl 80066c6 <HAL_GPIO_WritePin>
if (rtAnem == 0) {
8002b96: 4b84 ldr r3, [pc, #528] @ (8002da8 <manageCiclo+0xaa8>)
8002b98: 881b ldrh r3, [r3, #0]
8002b9a: b29b uxth r3, r3
8002b9c: 2b00 cmp r3, #0
8002b9e: d118 bne.n 8002bd2 <manageCiclo+0x8d2>
stBuz = bzmoving;
8002ba0: 4b7a ldr r3, [pc, #488] @ (8002d8c <manageCiclo+0xa8c>)
8002ba2: 2201 movs r2, #1
8002ba4: 701a strb r2, [r3, #0]
stCiclo = omemergenza1;
8002ba6: 4b7b ldr r3, [pc, #492] @ (8002d94 <manageCiclo+0xa94>)
8002ba8: 2218 movs r2, #24
8002baa: 701a strb r2, [r3, #0]
(void) m1ch();
8002bac: f001 f92a bl 8003e04 <m1ch>
(void) m2ch();
8002bb0: f001 f9fa bl 8003fa8 <m2ch>
(void) m3ch();
8002bb4: f001 faca bl 800414c <m3ch>
(void) m4ch();
8002bb8: f001 fb9c bl 80042f4 <m4ch>
8002bbc: e009 b.n 8002bd2 <manageCiclo+0x8d2>
}
} else{
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET);
8002bbe: 2200 movs r2, #0
8002bc0: f44f 4100 mov.w r1, #32768 @ 0x8000
8002bc4: 4877 ldr r0, [pc, #476] @ (8002da4 <manageCiclo+0xaa4>)
8002bc6: f003 fd7e bl 80066c6 <HAL_GPIO_WritePin>
rtAnem = tanem;
8002bca: 4b78 ldr r3, [pc, #480] @ (8002dac <manageCiclo+0xaac>)
8002bcc: 881a ldrh r2, [r3, #0]
8002bce: 4b76 ldr r3, [pc, #472] @ (8002da8 <manageCiclo+0xaa8>)
8002bd0: 801a strh r2, [r3, #0]
}
if (stPulsanti & P1STOP)
8002bd2: 4b71 ldr r3, [pc, #452] @ (8002d98 <manageCiclo+0xa98>)
8002bd4: 881b ldrh r3, [r3, #0]
8002bd6: f003 0302 and.w r3, r3, #2
8002bda: 2b00 cmp r3, #0
8002bdc: d003 beq.n 8002be6 <manageCiclo+0x8e6>
stCiclo = omstopchiusura;
8002bde: 4b6d ldr r3, [pc, #436] @ (8002d94 <manageCiclo+0xa94>)
8002be0: 2219 movs r2, #25
8002be2: 701a strb r2, [r3, #0]
stBuz = bzmoving;
(void) ramp(M4, BW, mrampstart[M4 - 1], m3pwmMan, trampman,
RAMPINIT);
stCiclo = omM4bw1;
}
break;
8002be4: e21b b.n 800301e <manageCiclo+0xd1e>
else if (stPulsanti & M1FW) {
8002be6: 4b6c ldr r3, [pc, #432] @ (8002d98 <manageCiclo+0xa98>)
8002be8: 881b ldrh r3, [r3, #0]
8002bea: f003 0310 and.w r3, r3, #16
8002bee: 2b00 cmp r3, #0
8002bf0: d017 beq.n 8002c22 <manageCiclo+0x922>
stBuz = bzmoving;
8002bf2: 4b66 ldr r3, [pc, #408] @ (8002d8c <manageCiclo+0xa8c>)
8002bf4: 2201 movs r2, #1
8002bf6: 701a strb r2, [r3, #0]
(void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman,
8002bf8: 4b6d ldr r3, [pc, #436] @ (8002db0 <manageCiclo+0xab0>)
8002bfa: 881b ldrh r3, [r3, #0]
8002bfc: b2da uxtb r2, r3
8002bfe: 4b6d ldr r3, [pc, #436] @ (8002db4 <manageCiclo+0xab4>)
8002c00: 881b ldrh r3, [r3, #0]
8002c02: b2d9 uxtb r1, r3
8002c04: 4b6c ldr r3, [pc, #432] @ (8002db8 <manageCiclo+0xab8>)
8002c06: 881b ldrh r3, [r3, #0]
8002c08: b2db uxtb r3, r3
8002c0a: 2000 movs r0, #0
8002c0c: 9001 str r0, [sp, #4]
8002c0e: 9300 str r3, [sp, #0]
8002c10: 460b mov r3, r1
8002c12: 2100 movs r1, #0
8002c14: 2001 movs r0, #1
8002c16: f001 ffa7 bl 8004b68 <ramp>
stCiclo = omM1fw1;
8002c1a: 4b5e ldr r3, [pc, #376] @ (8002d94 <manageCiclo+0xa94>)
8002c1c: 2201 movs r2, #1
8002c1e: 701a strb r2, [r3, #0]
break;
8002c20: e1fd b.n 800301e <manageCiclo+0xd1e>
} else if (stPulsanti & M1BW) {
8002c22: 4b5d ldr r3, [pc, #372] @ (8002d98 <manageCiclo+0xa98>)
8002c24: 881b ldrh r3, [r3, #0]
8002c26: f003 0320 and.w r3, r3, #32
8002c2a: 2b00 cmp r3, #0
8002c2c: d017 beq.n 8002c5e <manageCiclo+0x95e>
stBuz = bzmoving;
8002c2e: 4b57 ldr r3, [pc, #348] @ (8002d8c <manageCiclo+0xa8c>)
8002c30: 2201 movs r2, #1
8002c32: 701a strb r2, [r3, #0]
(void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman,
8002c34: 4b5e ldr r3, [pc, #376] @ (8002db0 <manageCiclo+0xab0>)
8002c36: 881b ldrh r3, [r3, #0]
8002c38: b2da uxtb r2, r3
8002c3a: 4b5e ldr r3, [pc, #376] @ (8002db4 <manageCiclo+0xab4>)
8002c3c: 881b ldrh r3, [r3, #0]
8002c3e: b2d9 uxtb r1, r3
8002c40: 4b5d ldr r3, [pc, #372] @ (8002db8 <manageCiclo+0xab8>)
8002c42: 881b ldrh r3, [r3, #0]
8002c44: b2db uxtb r3, r3
8002c46: 2000 movs r0, #0
8002c48: 9001 str r0, [sp, #4]
8002c4a: 9300 str r3, [sp, #0]
8002c4c: 460b mov r3, r1
8002c4e: 2101 movs r1, #1
8002c50: 2001 movs r0, #1
8002c52: f001 ff89 bl 8004b68 <ramp>
stCiclo = omM1bw1;
8002c56: 4b4f ldr r3, [pc, #316] @ (8002d94 <manageCiclo+0xa94>)
8002c58: 2203 movs r2, #3
8002c5a: 701a strb r2, [r3, #0]
break;
8002c5c: e1df b.n 800301e <manageCiclo+0xd1e>
} else if (stPulsanti & M2FW) {
8002c5e: 4b4e ldr r3, [pc, #312] @ (8002d98 <manageCiclo+0xa98>)
8002c60: 881b ldrh r3, [r3, #0]
8002c62: f003 0340 and.w r3, r3, #64 @ 0x40
8002c66: 2b00 cmp r3, #0
8002c68: d017 beq.n 8002c9a <manageCiclo+0x99a>
stBuz = bzmoving;
8002c6a: 4b48 ldr r3, [pc, #288] @ (8002d8c <manageCiclo+0xa8c>)
8002c6c: 2201 movs r2, #1
8002c6e: 701a strb r2, [r3, #0]
(void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman,
8002c70: 4b4f ldr r3, [pc, #316] @ (8002db0 <manageCiclo+0xab0>)
8002c72: 885b ldrh r3, [r3, #2]
8002c74: b2da uxtb r2, r3
8002c76: 4b51 ldr r3, [pc, #324] @ (8002dbc <manageCiclo+0xabc>)
8002c78: 881b ldrh r3, [r3, #0]
8002c7a: b2d9 uxtb r1, r3
8002c7c: 4b4e ldr r3, [pc, #312] @ (8002db8 <manageCiclo+0xab8>)
8002c7e: 881b ldrh r3, [r3, #0]
8002c80: b2db uxtb r3, r3
8002c82: 2000 movs r0, #0
8002c84: 9001 str r0, [sp, #4]
8002c86: 9300 str r3, [sp, #0]
8002c88: 460b mov r3, r1
8002c8a: 2100 movs r1, #0
8002c8c: 2002 movs r0, #2
8002c8e: f001 ff6b bl 8004b68 <ramp>
stCiclo = omM2fw1;
8002c92: 4b40 ldr r3, [pc, #256] @ (8002d94 <manageCiclo+0xa94>)
8002c94: 2205 movs r2, #5
8002c96: 701a strb r2, [r3, #0]
break;
8002c98: e1c1 b.n 800301e <manageCiclo+0xd1e>
} else if (stPulsanti & M2BW) {
8002c9a: 4b3f ldr r3, [pc, #252] @ (8002d98 <manageCiclo+0xa98>)
8002c9c: 881b ldrh r3, [r3, #0]
8002c9e: f003 0380 and.w r3, r3, #128 @ 0x80
8002ca2: 2b00 cmp r3, #0
8002ca4: d017 beq.n 8002cd6 <manageCiclo+0x9d6>
stBuz = bzmoving;
8002ca6: 4b39 ldr r3, [pc, #228] @ (8002d8c <manageCiclo+0xa8c>)
8002ca8: 2201 movs r2, #1
8002caa: 701a strb r2, [r3, #0]
(void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman,
8002cac: 4b40 ldr r3, [pc, #256] @ (8002db0 <manageCiclo+0xab0>)
8002cae: 885b ldrh r3, [r3, #2]
8002cb0: b2da uxtb r2, r3
8002cb2: 4b42 ldr r3, [pc, #264] @ (8002dbc <manageCiclo+0xabc>)
8002cb4: 881b ldrh r3, [r3, #0]
8002cb6: b2d9 uxtb r1, r3
8002cb8: 4b3f ldr r3, [pc, #252] @ (8002db8 <manageCiclo+0xab8>)
8002cba: 881b ldrh r3, [r3, #0]
8002cbc: b2db uxtb r3, r3
8002cbe: 2000 movs r0, #0
8002cc0: 9001 str r0, [sp, #4]
8002cc2: 9300 str r3, [sp, #0]
8002cc4: 460b mov r3, r1
8002cc6: 2101 movs r1, #1
8002cc8: 2002 movs r0, #2
8002cca: f001 ff4d bl 8004b68 <ramp>
stCiclo = omM2bw1;
8002cce: 4b31 ldr r3, [pc, #196] @ (8002d94 <manageCiclo+0xa94>)
8002cd0: 2207 movs r2, #7
8002cd2: 701a strb r2, [r3, #0]
break;
8002cd4: e1a3 b.n 800301e <manageCiclo+0xd1e>
} else if (stPulsanti & M3FW) {
8002cd6: 4b30 ldr r3, [pc, #192] @ (8002d98 <manageCiclo+0xa98>)
8002cd8: 881b ldrh r3, [r3, #0]
8002cda: f403 7380 and.w r3, r3, #256 @ 0x100
8002cde: 2b00 cmp r3, #0
8002ce0: d017 beq.n 8002d12 <manageCiclo+0xa12>
stBuz = bzmoving;
8002ce2: 4b2a ldr r3, [pc, #168] @ (8002d8c <manageCiclo+0xa8c>)
8002ce4: 2201 movs r2, #1
8002ce6: 701a strb r2, [r3, #0]
(void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman,
8002ce8: 4b31 ldr r3, [pc, #196] @ (8002db0 <manageCiclo+0xab0>)
8002cea: 889b ldrh r3, [r3, #4]
8002cec: b2da uxtb r2, r3
8002cee: 4b34 ldr r3, [pc, #208] @ (8002dc0 <manageCiclo+0xac0>)
8002cf0: 881b ldrh r3, [r3, #0]
8002cf2: b2d9 uxtb r1, r3
8002cf4: 4b30 ldr r3, [pc, #192] @ (8002db8 <manageCiclo+0xab8>)
8002cf6: 881b ldrh r3, [r3, #0]
8002cf8: b2db uxtb r3, r3
8002cfa: 2000 movs r0, #0
8002cfc: 9001 str r0, [sp, #4]
8002cfe: 9300 str r3, [sp, #0]
8002d00: 460b mov r3, r1
8002d02: 2100 movs r1, #0
8002d04: 2003 movs r0, #3
8002d06: f001 ff2f bl 8004b68 <ramp>
stCiclo = omM3fw1;
8002d0a: 4b22 ldr r3, [pc, #136] @ (8002d94 <manageCiclo+0xa94>)
8002d0c: 2209 movs r2, #9
8002d0e: 701a strb r2, [r3, #0]
break;
8002d10: e185 b.n 800301e <manageCiclo+0xd1e>
} else if (stPulsanti & M3BW) {
8002d12: 4b21 ldr r3, [pc, #132] @ (8002d98 <manageCiclo+0xa98>)
8002d14: 881b ldrh r3, [r3, #0]
8002d16: f403 7300 and.w r3, r3, #512 @ 0x200
8002d1a: 2b00 cmp r3, #0
8002d1c: d017 beq.n 8002d4e <manageCiclo+0xa4e>
stBuz = bzmoving;
8002d1e: 4b1b ldr r3, [pc, #108] @ (8002d8c <manageCiclo+0xa8c>)
8002d20: 2201 movs r2, #1
8002d22: 701a strb r2, [r3, #0]
(void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman,
8002d24: 4b22 ldr r3, [pc, #136] @ (8002db0 <manageCiclo+0xab0>)
8002d26: 889b ldrh r3, [r3, #4]
8002d28: b2da uxtb r2, r3
8002d2a: 4b25 ldr r3, [pc, #148] @ (8002dc0 <manageCiclo+0xac0>)
8002d2c: 881b ldrh r3, [r3, #0]
8002d2e: b2d9 uxtb r1, r3
8002d30: 4b21 ldr r3, [pc, #132] @ (8002db8 <manageCiclo+0xab8>)
8002d32: 881b ldrh r3, [r3, #0]
8002d34: b2db uxtb r3, r3
8002d36: 2000 movs r0, #0
8002d38: 9001 str r0, [sp, #4]
8002d3a: 9300 str r3, [sp, #0]
8002d3c: 460b mov r3, r1
8002d3e: 2101 movs r1, #1
8002d40: 2003 movs r0, #3
8002d42: f001 ff11 bl 8004b68 <ramp>
stCiclo = omM3bw1;
8002d46: 4b13 ldr r3, [pc, #76] @ (8002d94 <manageCiclo+0xa94>)
8002d48: 220b movs r2, #11
8002d4a: 701a strb r2, [r3, #0]
break;
8002d4c: e167 b.n 800301e <manageCiclo+0xd1e>
} else if (stPulsanti & M4FW) {
8002d4e: 4b12 ldr r3, [pc, #72] @ (8002d98 <manageCiclo+0xa98>)
8002d50: 881b ldrh r3, [r3, #0]
8002d52: f403 6380 and.w r3, r3, #1024 @ 0x400
8002d56: 2b00 cmp r3, #0
8002d58: d034 beq.n 8002dc4 <manageCiclo+0xac4>
stBuz = bzmoving;
8002d5a: 4b0c ldr r3, [pc, #48] @ (8002d8c <manageCiclo+0xa8c>)
8002d5c: 2201 movs r2, #1
8002d5e: 701a strb r2, [r3, #0]
(void) ramp(M4, FW, mrampstart[M4 - 1], m3pwmMan, trampman,
8002d60: 4b13 ldr r3, [pc, #76] @ (8002db0 <manageCiclo+0xab0>)
8002d62: 88db ldrh r3, [r3, #6]
8002d64: b2da uxtb r2, r3
8002d66: 4b16 ldr r3, [pc, #88] @ (8002dc0 <manageCiclo+0xac0>)
8002d68: 881b ldrh r3, [r3, #0]
8002d6a: b2d9 uxtb r1, r3
8002d6c: 4b12 ldr r3, [pc, #72] @ (8002db8 <manageCiclo+0xab8>)
8002d6e: 881b ldrh r3, [r3, #0]
8002d70: b2db uxtb r3, r3
8002d72: 2000 movs r0, #0
8002d74: 9001 str r0, [sp, #4]
8002d76: 9300 str r3, [sp, #0]
8002d78: 460b mov r3, r1
8002d7a: 2100 movs r1, #0
8002d7c: 2004 movs r0, #4
8002d7e: f001 fef3 bl 8004b68 <ramp>
stCiclo = omM4fw1;
8002d82: 4b04 ldr r3, [pc, #16] @ (8002d94 <manageCiclo+0xa94>)
8002d84: 220d movs r2, #13
8002d86: 701a strb r2, [r3, #0]
break;
8002d88: e149 b.n 800301e <manageCiclo+0xd1e>
8002d8a: bf00 nop
8002d8c: 20000457 .word 0x20000457
8002d90: 200003fc .word 0x200003fc
8002d94: 20000456 .word 0x20000456
8002d98: 20000454 .word 0x20000454
8002d9c: 20000232 .word 0x20000232
8002da0: 2000041c .word 0x2000041c
8002da4: 40010800 .word 0x40010800
8002da8: 200003fe .word 0x200003fe
8002dac: 2000041a .word 0x2000041a
8002db0: 2000044c .word 0x2000044c
8002db4: 20000420 .word 0x20000420
8002db8: 2000041e .word 0x2000041e
8002dbc: 20000422 .word 0x20000422
8002dc0: 20000424 .word 0x20000424
} else if (stPulsanti & M4BW) {
8002dc4: 4b9c ldr r3, [pc, #624] @ (8003038 <manageCiclo+0xd38>)
8002dc6: 881b ldrh r3, [r3, #0]
8002dc8: f403 6300 and.w r3, r3, #2048 @ 0x800
8002dcc: 2b00 cmp r3, #0
8002dce: f000 8126 beq.w 800301e <manageCiclo+0xd1e>
stBuz = bzmoving;
8002dd2: 4b9a ldr r3, [pc, #616] @ (800303c <manageCiclo+0xd3c>)
8002dd4: 2201 movs r2, #1
8002dd6: 701a strb r2, [r3, #0]
(void) ramp(M4, BW, mrampstart[M4 - 1], m3pwmMan, trampman,
8002dd8: 4b99 ldr r3, [pc, #612] @ (8003040 <manageCiclo+0xd40>)
8002dda: 88db ldrh r3, [r3, #6]
8002ddc: b2da uxtb r2, r3
8002dde: 4b99 ldr r3, [pc, #612] @ (8003044 <manageCiclo+0xd44>)
8002de0: 881b ldrh r3, [r3, #0]
8002de2: b2d9 uxtb r1, r3
8002de4: 4b98 ldr r3, [pc, #608] @ (8003048 <manageCiclo+0xd48>)
8002de6: 881b ldrh r3, [r3, #0]
8002de8: b2db uxtb r3, r3
8002dea: 2000 movs r0, #0
8002dec: 9001 str r0, [sp, #4]
8002dee: 9300 str r3, [sp, #0]
8002df0: 460b mov r3, r1
8002df2: 2101 movs r1, #1
8002df4: 2004 movs r0, #4
8002df6: f001 feb7 bl 8004b68 <ramp>
stCiclo = omM4bw1;
8002dfa: 4b94 ldr r3, [pc, #592] @ (800304c <manageCiclo+0xd4c>)
8002dfc: 220f movs r2, #15
8002dfe: 701a strb r2, [r3, #0]
break;
8002e00: e10d b.n 800301e <manageCiclo+0xd1e>
case omchiusura1:
if (rtCiclo >= 10) { //doppo 1 secondi
8002e02: 4b93 ldr r3, [pc, #588] @ (8003050 <manageCiclo+0xd50>)
8002e04: 881b ldrh r3, [r3, #0]
8002e06: b29b uxth r3, r3
8002e08: 2b09 cmp r3, #9
8002e0a: d924 bls.n 8002e56 <manageCiclo+0xb56>
m1 = m1ch();
8002e0c: f000 fffa bl 8003e04 <m1ch>
8002e10: 4603 mov r3, r0
8002e12: 71fb strb r3, [r7, #7]
m2 = m2ch();
8002e14: f001 f8c8 bl 8003fa8 <m2ch>
8002e18: 4603 mov r3, r0
8002e1a: 71bb strb r3, [r7, #6]
m3 = m3ch();
8002e1c: f001 f996 bl 800414c <m3ch>
8002e20: 4603 mov r3, r0
8002e22: 717b strb r3, [r7, #5]
m4 = m4ch();
8002e24: f001 fa66 bl 80042f4 <m4ch>
8002e28: 4603 mov r3, r0
8002e2a: 713b strb r3, [r7, #4]
if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop)
8002e2c: 79fb ldrb r3, [r7, #7]
8002e2e: 2b04 cmp r3, #4
8002e30: d111 bne.n 8002e56 <manageCiclo+0xb56>
8002e32: 79bb ldrb r3, [r7, #6]
8002e34: 2b04 cmp r3, #4
8002e36: d10e bne.n 8002e56 <manageCiclo+0xb56>
8002e38: 797b ldrb r3, [r7, #5]
8002e3a: 2b04 cmp r3, #4
8002e3c: d10b bne.n 8002e56 <manageCiclo+0xb56>
&& (m4 == motStop)) {
8002e3e: 793b ldrb r3, [r7, #4]
8002e40: 2b04 cmp r3, #4
8002e42: d108 bne.n 8002e56 <manageCiclo+0xb56>
stBuz = bzoff;
8002e44: 4b7d ldr r3, [pc, #500] @ (800303c <manageCiclo+0xd3c>)
8002e46: 2200 movs r2, #0
8002e48: 701a strb r2, [r3, #0]
stCiclo = omchiuso;
8002e4a: 4b80 ldr r3, [pc, #512] @ (800304c <manageCiclo+0xd4c>)
8002e4c: 2200 movs r2, #0
8002e4e: 701a strb r2, [r3, #0]
fchiuso = true;
8002e50: 4b80 ldr r3, [pc, #512] @ (8003054 <manageCiclo+0xd54>)
8002e52: 2201 movs r2, #1
8002e54: 701a strb r2, [r3, #0]
}
}
if (stPulsanti & P1STOP)
8002e56: 4b78 ldr r3, [pc, #480] @ (8003038 <manageCiclo+0xd38>)
8002e58: 881b ldrh r3, [r3, #0]
8002e5a: f003 0302 and.w r3, r3, #2
8002e5e: 2b00 cmp r3, #0
8002e60: d002 beq.n 8002e68 <manageCiclo+0xb68>
stCiclo = omstopchiusura;
8002e62: 4b7a ldr r3, [pc, #488] @ (800304c <manageCiclo+0xd4c>)
8002e64: 2219 movs r2, #25
8002e66: 701a strb r2, [r3, #0]
if ((stPulsanti & P1START)&&(stPulsanti & P1RELEASED)) {
8002e68: 4b73 ldr r3, [pc, #460] @ (8003038 <manageCiclo+0xd38>)
8002e6a: 881b ldrh r3, [r3, #0]
8002e6c: f003 0301 and.w r3, r3, #1
8002e70: 2b00 cmp r3, #0
8002e72: f000 80d6 beq.w 8003022 <manageCiclo+0xd22>
8002e76: 4b70 ldr r3, [pc, #448] @ (8003038 <manageCiclo+0xd38>)
8002e78: 881b ldrh r3, [r3, #0]
8002e7a: f403 5380 and.w r3, r3, #4096 @ 0x1000
8002e7e: 2b00 cmp r3, #0
8002e80: f000 80cf beq.w 8003022 <manageCiclo+0xd22>
stCiclo = omstoprestartapertura;
8002e84: 4b71 ldr r3, [pc, #452] @ (800304c <manageCiclo+0xd4c>)
8002e86: 2215 movs r2, #21
8002e88: 701a strb r2, [r3, #0]
rtCiclo = 0;
8002e8a: 4b71 ldr r3, [pc, #452] @ (8003050 <manageCiclo+0xd50>)
8002e8c: 2200 movs r2, #0
8002e8e: 801a strh r2, [r3, #0]
}
break;
8002e90: e0c7 b.n 8003022 <manageCiclo+0xd22>
case omemergenza1:
if (rtCiclo >= 10) { //doppo 1 secondi
8002e92: 4b6f ldr r3, [pc, #444] @ (8003050 <manageCiclo+0xd50>)
8002e94: 881b ldrh r3, [r3, #0]
8002e96: b29b uxth r3, r3
8002e98: 2b09 cmp r3, #9
8002e9a: f240 80c4 bls.w 8003026 <manageCiclo+0xd26>
m1 = m1ch();
8002e9e: f000 ffb1 bl 8003e04 <m1ch>
8002ea2: 4603 mov r3, r0
8002ea4: 71fb strb r3, [r7, #7]
m2 = m2ch();
8002ea6: f001 f87f bl 8003fa8 <m2ch>
8002eaa: 4603 mov r3, r0
8002eac: 71bb strb r3, [r7, #6]
m3 = m3ch();
8002eae: f001 f94d bl 800414c <m3ch>
8002eb2: 4603 mov r3, r0
8002eb4: 717b strb r3, [r7, #5]
m4 = m4ch();
8002eb6: f001 fa1d bl 80042f4 <m4ch>
8002eba: 4603 mov r3, r0
8002ebc: 713b strb r3, [r7, #4]
if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop)
8002ebe: 79fb ldrb r3, [r7, #7]
8002ec0: 2b04 cmp r3, #4
8002ec2: f040 80b0 bne.w 8003026 <manageCiclo+0xd26>
8002ec6: 79bb ldrb r3, [r7, #6]
8002ec8: 2b04 cmp r3, #4
8002eca: f040 80ac bne.w 8003026 <manageCiclo+0xd26>
8002ece: 797b ldrb r3, [r7, #5]
8002ed0: 2b04 cmp r3, #4
8002ed2: f040 80a8 bne.w 8003026 <manageCiclo+0xd26>
&& (m4 == motStop)) {
8002ed6: 793b ldrb r3, [r7, #4]
8002ed8: 2b04 cmp r3, #4
8002eda: f040 80a4 bne.w 8003026 <manageCiclo+0xd26>
stBuz = bzoff;
8002ede: 4b57 ldr r3, [pc, #348] @ (800303c <manageCiclo+0xd3c>)
8002ee0: 2200 movs r2, #0
8002ee2: 701a strb r2, [r3, #0]
stCiclo = omchiuso;
8002ee4: 4b59 ldr r3, [pc, #356] @ (800304c <manageCiclo+0xd4c>)
8002ee6: 2200 movs r2, #0
8002ee8: 701a strb r2, [r3, #0]
fchiuso = true;
8002eea: 4b5a ldr r3, [pc, #360] @ (8003054 <manageCiclo+0xd54>)
8002eec: 2201 movs r2, #1
8002eee: 701a strb r2, [r3, #0]
}
}
break;
8002ef0: e099 b.n 8003026 <manageCiclo+0xd26>
case omstoprestartapertura:
SetMotPerc(M1, FW, 0);
8002ef2: 2200 movs r2, #0
8002ef4: 2100 movs r1, #0
8002ef6: 2001 movs r0, #1
8002ef8: f001 fcb6 bl 8004868 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002efc: 2200 movs r2, #0
8002efe: 2100 movs r1, #0
8002f00: 2002 movs r0, #2
8002f02: f001 fcb1 bl 8004868 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002f06: 2200 movs r2, #0
8002f08: 2100 movs r1, #0
8002f0a: 2003 movs r0, #3
8002f0c: f001 fcac bl 8004868 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002f10: 2200 movs r2, #0
8002f12: 2100 movs r1, #0
8002f14: 2004 movs r0, #4
8002f16: f001 fca7 bl 8004868 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002f1a: 2200 movs r2, #0
8002f1c: 2101 movs r1, #1
8002f1e: 2001 movs r0, #1
8002f20: f001 fca2 bl 8004868 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002f24: 2200 movs r2, #0
8002f26: 2101 movs r1, #1
8002f28: 2002 movs r0, #2
8002f2a: f001 fc9d bl 8004868 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002f2e: 2200 movs r2, #0
8002f30: 2101 movs r1, #1
8002f32: 2003 movs r0, #3
8002f34: f001 fc98 bl 8004868 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002f38: 2200 movs r2, #0
8002f3a: 2101 movs r1, #1
8002f3c: 2004 movs r0, #4
8002f3e: f001 fc93 bl 8004868 <SetMotPerc>
stBuz = bzoff;
8002f42: 4b3e ldr r3, [pc, #248] @ (800303c <manageCiclo+0xd3c>)
8002f44: 2200 movs r2, #0
8002f46: 701a strb r2, [r3, #0]
if (rtCiclo >= 20)
8002f48: 4b41 ldr r3, [pc, #260] @ (8003050 <manageCiclo+0xd50>)
8002f4a: 881b ldrh r3, [r3, #0]
8002f4c: b29b uxth r3, r3
8002f4e: 2b13 cmp r3, #19
8002f50: d96b bls.n 800302a <manageCiclo+0xd2a>
stCiclo = omchiuso;
8002f52: 4b3e ldr r3, [pc, #248] @ (800304c <manageCiclo+0xd4c>)
8002f54: 2200 movs r2, #0
8002f56: 701a strb r2, [r3, #0]
break;
8002f58: e067 b.n 800302a <manageCiclo+0xd2a>
case omstopchiusura:
SetMotPerc(M1, FW, 0);
8002f5a: 2200 movs r2, #0
8002f5c: 2100 movs r1, #0
8002f5e: 2001 movs r0, #1
8002f60: f001 fc82 bl 8004868 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002f64: 2200 movs r2, #0
8002f66: 2100 movs r1, #0
8002f68: 2002 movs r0, #2
8002f6a: f001 fc7d bl 8004868 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002f6e: 2200 movs r2, #0
8002f70: 2100 movs r1, #0
8002f72: 2003 movs r0, #3
8002f74: f001 fc78 bl 8004868 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002f78: 2200 movs r2, #0
8002f7a: 2100 movs r1, #0
8002f7c: 2004 movs r0, #4
8002f7e: f001 fc73 bl 8004868 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002f82: 2200 movs r2, #0
8002f84: 2101 movs r1, #1
8002f86: 2001 movs r0, #1
8002f88: f001 fc6e bl 8004868 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002f8c: 2200 movs r2, #0
8002f8e: 2101 movs r1, #1
8002f90: 2002 movs r0, #2
8002f92: f001 fc69 bl 8004868 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002f96: 2200 movs r2, #0
8002f98: 2101 movs r1, #1
8002f9a: 2003 movs r0, #3
8002f9c: f001 fc64 bl 8004868 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002fa0: 2200 movs r2, #0
8002fa2: 2101 movs r1, #1
8002fa4: 2004 movs r0, #4
8002fa6: f001 fc5f bl 8004868 <SetMotPerc>
if (pulsanti == 0) {
8002faa: 4b2b ldr r3, [pc, #172] @ (8003058 <manageCiclo+0xd58>)
8002fac: 781b ldrb r3, [r3, #0]
8002fae: 2b00 cmp r3, #0
8002fb0: d13d bne.n 800302e <manageCiclo+0xd2e>
stBuz = bzoff;
8002fb2: 4b22 ldr r3, [pc, #136] @ (800303c <manageCiclo+0xd3c>)
8002fb4: 2200 movs r2, #0
8002fb6: 701a strb r2, [r3, #0]
stCiclo = omaperto;
8002fb8: 4b24 ldr r3, [pc, #144] @ (800304c <manageCiclo+0xd4c>)
8002fba: 2216 movs r2, #22
8002fbc: 701a strb r2, [r3, #0]
stPulsanti &= (~P1STOP);
8002fbe: 4b1e ldr r3, [pc, #120] @ (8003038 <manageCiclo+0xd38>)
8002fc0: 881b ldrh r3, [r3, #0]
8002fc2: f023 0302 bic.w r3, r3, #2
8002fc6: b29a uxth r2, r3
8002fc8: 4b1b ldr r3, [pc, #108] @ (8003038 <manageCiclo+0xd38>)
8002fca: 801a strh r2, [r3, #0]
}
break;
8002fcc: e02f b.n 800302e <manageCiclo+0xd2e>
break;
8002fce: bf00 nop
8002fd0: e02e b.n 8003030 <manageCiclo+0xd30>
break;
8002fd2: bf00 nop
8002fd4: e02c b.n 8003030 <manageCiclo+0xd30>
break;
8002fd6: bf00 nop
8002fd8: e02a b.n 8003030 <manageCiclo+0xd30>
break;
8002fda: bf00 nop
8002fdc: e028 b.n 8003030 <manageCiclo+0xd30>
break;
8002fde: bf00 nop
8002fe0: e026 b.n 8003030 <manageCiclo+0xd30>
break;
8002fe2: bf00 nop
8002fe4: e024 b.n 8003030 <manageCiclo+0xd30>
break;
8002fe6: bf00 nop
8002fe8: e022 b.n 8003030 <manageCiclo+0xd30>
break;
8002fea: bf00 nop
8002fec: e020 b.n 8003030 <manageCiclo+0xd30>
break;
8002fee: bf00 nop
8002ff0: e01e b.n 8003030 <manageCiclo+0xd30>
break;
8002ff2: bf00 nop
8002ff4: e01c b.n 8003030 <manageCiclo+0xd30>
break;
8002ff6: bf00 nop
8002ff8: e01a b.n 8003030 <manageCiclo+0xd30>
break;
8002ffa: bf00 nop
8002ffc: e018 b.n 8003030 <manageCiclo+0xd30>
break;
8002ffe: bf00 nop
8003000: e016 b.n 8003030 <manageCiclo+0xd30>
break;
8003002: bf00 nop
8003004: e014 b.n 8003030 <manageCiclo+0xd30>
break;
8003006: bf00 nop
8003008: e012 b.n 8003030 <manageCiclo+0xd30>
break;
800300a: bf00 nop
800300c: e010 b.n 8003030 <manageCiclo+0xd30>
break;
800300e: bf00 nop
8003010: e00e b.n 8003030 <manageCiclo+0xd30>
break;
8003012: bf00 nop
8003014: e00c b.n 8003030 <manageCiclo+0xd30>
break;
8003016: bf00 nop
8003018: e00a b.n 8003030 <manageCiclo+0xd30>
break;
800301a: bf00 nop
800301c: e008 b.n 8003030 <manageCiclo+0xd30>
break;
800301e: bf00 nop
8003020: e006 b.n 8003030 <manageCiclo+0xd30>
break;
8003022: bf00 nop
8003024: e004 b.n 8003030 <manageCiclo+0xd30>
break;
8003026: bf00 nop
8003028: e002 b.n 8003030 <manageCiclo+0xd30>
break;
800302a: bf00 nop
800302c: e000 b.n 8003030 <manageCiclo+0xd30>
break;
800302e: bf00 nop
}
}
8003030: bf00 nop
8003032: 3708 adds r7, #8
8003034: 46bd mov sp, r7
8003036: bd80 pop {r7, pc}
8003038: 20000454 .word 0x20000454
800303c: 20000457 .word 0x20000457
8003040: 2000044c .word 0x2000044c
8003044: 20000424 .word 0x20000424
8003048: 2000041e .word 0x2000041e
800304c: 20000456 .word 0x20000456
8003050: 200003fc .word 0x200003fc
8003054: 20000459 .word 0x20000459
8003058: 200003f0 .word 0x200003f0
0800305c <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void) {
800305c: b580 push {r7, lr}
800305e: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8003060: f002 f866 bl 8005130 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8003064: f000 f86e bl 8003144 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8003068: f000 fad0 bl 800360c <MX_GPIO_Init>
MX_DMA_Init();
800306c: f000 fab0 bl 80035d0 <MX_DMA_Init>
MX_USB_DEVICE_Init();
8003070: f00a fcfe bl 800da70 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
8003074: f000 f93c bl 80032f0 <MX_TIM2_Init>
MX_TIM4_Init();
8003078: f000 f9de bl 8003438 <MX_TIM4_Init>
MX_ADC1_Init();
800307c: f000 f8c0 bl 8003200 <MX_ADC1_Init>
MX_USART1_UART_Init();
8003080: f000 fa7c bl 800357c <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
HAL_ADC_Start_DMA(&hadc1, (uint32_t*) adc_dma_buf, ADC_NUM_CHANNELS);
8003084: 2205 movs r2, #5
8003086: 4928 ldr r1, [pc, #160] @ (8003128 <main+0xcc>)
8003088: 4828 ldr r0, [pc, #160] @ (800312c <main+0xd0>)
800308a: f002 f98b bl 80053a4 <HAL_ADC_Start_DMA>
StopMot(timMot1, FWMot1);
800308e: 2100 movs r1, #0
8003090: 4827 ldr r0, [pc, #156] @ (8003130 <main+0xd4>)
8003092: f001 fa16 bl 80044c2 <StopMot>
StopMot(timMot1, BWMot1);
8003096: 2104 movs r1, #4
8003098: 4825 ldr r0, [pc, #148] @ (8003130 <main+0xd4>)
800309a: f001 fa12 bl 80044c2 <StopMot>
StopMot(timMot2, FWMot2);
800309e: 2108 movs r1, #8
80030a0: 4823 ldr r0, [pc, #140] @ (8003130 <main+0xd4>)
80030a2: f001 fa0e bl 80044c2 <StopMot>
StopMot(timMot2, BWMot2);
80030a6: 210c movs r1, #12
80030a8: 4821 ldr r0, [pc, #132] @ (8003130 <main+0xd4>)
80030aa: f001 fa0a bl 80044c2 <StopMot>
StopMot(timMot3, FWMot3);
80030ae: 2100 movs r1, #0
80030b0: 4820 ldr r0, [pc, #128] @ (8003134 <main+0xd8>)
80030b2: f001 fa06 bl 80044c2 <StopMot>
StopMot(timMot3, BWMot3);
80030b6: 2104 movs r1, #4
80030b8: 481e ldr r0, [pc, #120] @ (8003134 <main+0xd8>)
80030ba: f001 fa02 bl 80044c2 <StopMot>
StopMot(timMot4, FWMot4);
80030be: 2108 movs r1, #8
80030c0: 481c ldr r0, [pc, #112] @ (8003134 <main+0xd8>)
80030c2: f001 f9fe bl 80044c2 <StopMot>
StopMot(timMot4, BWMot4);
80030c6: 210c movs r1, #12
80030c8: 481a ldr r0, [pc, #104] @ (8003134 <main+0xd8>)
80030ca: f001 f9fa bl 80044c2 <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
//while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
if (EE_Init() != EE_OK) {
80030ce: f7fe fa7d bl 80015cc <EE_Init>
80030d2: 4603 mov r3, r0
80030d4: 2b00 cmp r3, #0
80030d6: d001 beq.n 80030dc <main+0x80>
for (;;)
80030d8: bf00 nop
80030da: e7fd b.n 80030d8 <main+0x7c>
; //errore eeprom
}
loadEE();
80030dc: f7fe fb60 bl 80017a0 <loadEE>
if (flagPar != VERSIONE) {
80030e0: 4b15 ldr r3, [pc, #84] @ (8003138 <main+0xdc>)
80030e2: 881b ldrh r3, [r3, #0]
80030e4: 2b01 cmp r3, #1
80030e6: d00f beq.n 8003108 <main+0xac>
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
80030e8: 2201 movs r2, #1
80030ea: f44f 7180 mov.w r1, #256 @ 0x100
80030ee: 4813 ldr r0, [pc, #76] @ (800313c <main+0xe0>)
80030f0: f003 fae9 bl 80066c6 <HAL_GPIO_WritePin>
loadDefault();
80030f4: f7fe fb06 bl 8001704 <loadDefault>
loadEE();
80030f8: f7fe fb52 bl 80017a0 <loadEE>
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
80030fc: 2200 movs r2, #0
80030fe: f44f 7180 mov.w r1, #256 @ 0x100
8003102: 480e ldr r0, [pc, #56] @ (800313c <main+0xe0>)
8003104: f003 fadf bl 80066c6 <HAL_GPIO_WritePin>
}
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
fchiuso = false;
8003108: 4b0d ldr r3, [pc, #52] @ (8003140 <main+0xe4>)
800310a: 2200 movs r2, #0
800310c: 701a strb r2, [r3, #0]
while (1) {
manageCDC();
800310e: f7fd f975 bl 80003fc <manageCDC>
manageAdc();
8003112: f7fd f823 bl 800015c <manageAdc>
managePulsanti();
8003116: f7fe ff87 bl 8002028 <managePulsanti>
manageCiclo();
800311a: f7ff f8f1 bl 8002300 <manageCiclo>
debug();
800311e: f7fe f849 bl 80011b4 <debug>
manageCDC();
8003122: bf00 nop
8003124: e7f3 b.n 800310e <main+0xb2>
8003126: bf00 nop
8003128: 200001fc .word 0x200001fc
800312c: 200002a4 .word 0x200002a4
8003130: 20000318 .word 0x20000318
8003134: 20000360 .word 0x20000360
8003138: 20000448 .word 0x20000448
800313c: 40010800 .word 0x40010800
8003140: 20000459 .word 0x20000459
08003144 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void) {
8003144: b580 push {r7, lr}
8003146: b094 sub sp, #80 @ 0x50
8003148: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
800314a: f107 0328 add.w r3, r7, #40 @ 0x28
800314e: 2228 movs r2, #40 @ 0x28
8003150: 2100 movs r1, #0
8003152: 4618 mov r0, r3
8003154: f00b f9c8 bl 800e4e8 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
8003158: f107 0314 add.w r3, r7, #20
800315c: 2200 movs r2, #0
800315e: 601a str r2, [r3, #0]
8003160: 605a str r2, [r3, #4]
8003162: 609a str r2, [r3, #8]
8003164: 60da str r2, [r3, #12]
8003166: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = { 0 };
8003168: 1d3b adds r3, r7, #4
800316a: 2200 movs r2, #0
800316c: 601a str r2, [r3, #0]
800316e: 605a str r2, [r3, #4]
8003170: 609a str r2, [r3, #8]
8003172: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8003174: 2301 movs r3, #1
8003176: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8003178: f44f 3380 mov.w r3, #65536 @ 0x10000
800317c: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
800317e: 2300 movs r3, #0
8003180: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
8003182: 2301 movs r3, #1
8003184: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8003186: 2302 movs r3, #2
8003188: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
800318a: f44f 3380 mov.w r3, #65536 @ 0x10000
800318e: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
8003190: f44f 1380 mov.w r3, #1048576 @ 0x100000
8003194: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
8003196: f107 0328 add.w r3, r7, #40 @ 0x28
800319a: 4618 mov r0, r3
800319c: f005 f80c bl 80081b8 <HAL_RCC_OscConfig>
80031a0: 4603 mov r3, r0
80031a2: 2b00 cmp r3, #0
80031a4: d001 beq.n 80031aa <SystemClock_Config+0x66>
Error_Handler();
80031a6: f000 fadb bl 8003760 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
80031aa: 230f movs r3, #15
80031ac: 617b str r3, [r7, #20]
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
80031ae: 2302 movs r3, #2
80031b0: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
80031b2: 2300 movs r3, #0
80031b4: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
80031b6: f44f 6380 mov.w r3, #1024 @ 0x400
80031ba: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
80031bc: 2300 movs r3, #0
80031be: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
80031c0: f107 0314 add.w r3, r7, #20
80031c4: 2102 movs r1, #2
80031c6: 4618 mov r0, r3
80031c8: f005 fa78 bl 80086bc <HAL_RCC_ClockConfig>
80031cc: 4603 mov r3, r0
80031ce: 2b00 cmp r3, #0
80031d0: d001 beq.n 80031d6 <SystemClock_Config+0x92>
Error_Handler();
80031d2: f000 fac5 bl 8003760 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
80031d6: 2312 movs r3, #18
80031d8: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
80031da: f44f 4300 mov.w r3, #32768 @ 0x8000
80031de: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
80031e0: 2300 movs r3, #0
80031e2: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
80031e4: 1d3b adds r3, r7, #4
80031e6: 4618 mov r0, r3
80031e8: f005 fbf8 bl 80089dc <HAL_RCCEx_PeriphCLKConfig>
80031ec: 4603 mov r3, r0
80031ee: 2b00 cmp r3, #0
80031f0: d001 beq.n 80031f6 <SystemClock_Config+0xb2>
Error_Handler();
80031f2: f000 fab5 bl 8003760 <Error_Handler>
}
}
80031f6: bf00 nop
80031f8: 3750 adds r7, #80 @ 0x50
80031fa: 46bd mov sp, r7
80031fc: bd80 pop {r7, pc}
...
08003200 <MX_ADC1_Init>:
/**
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void) {
8003200: b580 push {r7, lr}
8003202: b084 sub sp, #16
8003204: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = { 0 };
8003206: 1d3b adds r3, r7, #4
8003208: 2200 movs r2, #0
800320a: 601a str r2, [r3, #0]
800320c: 605a str r2, [r3, #4]
800320e: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
8003210: 4b35 ldr r3, [pc, #212] @ (80032e8 <MX_ADC1_Init+0xe8>)
8003212: 4a36 ldr r2, [pc, #216] @ (80032ec <MX_ADC1_Init+0xec>)
8003214: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
8003216: 4b34 ldr r3, [pc, #208] @ (80032e8 <MX_ADC1_Init+0xe8>)
8003218: f44f 7280 mov.w r2, #256 @ 0x100
800321c: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = ENABLE;
800321e: 4b32 ldr r3, [pc, #200] @ (80032e8 <MX_ADC1_Init+0xe8>)
8003220: 2201 movs r2, #1
8003222: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
8003224: 4b30 ldr r3, [pc, #192] @ (80032e8 <MX_ADC1_Init+0xe8>)
8003226: 2200 movs r2, #0
8003228: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
800322a: 4b2f ldr r3, [pc, #188] @ (80032e8 <MX_ADC1_Init+0xe8>)
800322c: f44f 2260 mov.w r2, #917504 @ 0xe0000
8003230: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
8003232: 4b2d ldr r3, [pc, #180] @ (80032e8 <MX_ADC1_Init+0xe8>)
8003234: 2200 movs r2, #0
8003236: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 5;
8003238: 4b2b ldr r3, [pc, #172] @ (80032e8 <MX_ADC1_Init+0xe8>)
800323a: 2205 movs r2, #5
800323c: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK) {
800323e: 482a ldr r0, [pc, #168] @ (80032e8 <MX_ADC1_Init+0xe8>)
8003240: f001 ffd8 bl 80051f4 <HAL_ADC_Init>
8003244: 4603 mov r3, r0
8003246: 2b00 cmp r3, #0
8003248: d001 beq.n 800324e <MX_ADC1_Init+0x4e>
Error_Handler();
800324a: f000 fa89 bl 8003760 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
800324e: 2304 movs r3, #4
8003250: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
8003252: 2301 movs r3, #1
8003254: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5;
8003256: 2303 movs r3, #3
8003258: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
800325a: 1d3b adds r3, r7, #4
800325c: 4619 mov r1, r3
800325e: 4822 ldr r0, [pc, #136] @ (80032e8 <MX_ADC1_Init+0xe8>)
8003260: f002 f99a bl 8005598 <HAL_ADC_ConfigChannel>
8003264: 4603 mov r3, r0
8003266: 2b00 cmp r3, #0
8003268: d001 beq.n 800326e <MX_ADC1_Init+0x6e>
Error_Handler();
800326a: f000 fa79 bl 8003760 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_5;
800326e: 2305 movs r3, #5
8003270: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_2;
8003272: 2302 movs r3, #2
8003274: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
8003276: 1d3b adds r3, r7, #4
8003278: 4619 mov r1, r3
800327a: 481b ldr r0, [pc, #108] @ (80032e8 <MX_ADC1_Init+0xe8>)
800327c: f002 f98c bl 8005598 <HAL_ADC_ConfigChannel>
8003280: 4603 mov r3, r0
8003282: 2b00 cmp r3, #0
8003284: d001 beq.n 800328a <MX_ADC1_Init+0x8a>
Error_Handler();
8003286: f000 fa6b bl 8003760 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_6;
800328a: 2306 movs r3, #6
800328c: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_3;
800328e: 2303 movs r3, #3
8003290: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
8003292: 1d3b adds r3, r7, #4
8003294: 4619 mov r1, r3
8003296: 4814 ldr r0, [pc, #80] @ (80032e8 <MX_ADC1_Init+0xe8>)
8003298: f002 f97e bl 8005598 <HAL_ADC_ConfigChannel>
800329c: 4603 mov r3, r0
800329e: 2b00 cmp r3, #0
80032a0: d001 beq.n 80032a6 <MX_ADC1_Init+0xa6>
Error_Handler();
80032a2: f000 fa5d bl 8003760 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_7;
80032a6: 2307 movs r3, #7
80032a8: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_4;
80032aa: 2304 movs r3, #4
80032ac: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
80032ae: 1d3b adds r3, r7, #4
80032b0: 4619 mov r1, r3
80032b2: 480d ldr r0, [pc, #52] @ (80032e8 <MX_ADC1_Init+0xe8>)
80032b4: f002 f970 bl 8005598 <HAL_ADC_ConfigChannel>
80032b8: 4603 mov r3, r0
80032ba: 2b00 cmp r3, #0
80032bc: d001 beq.n 80032c2 <MX_ADC1_Init+0xc2>
Error_Handler();
80032be: f000 fa4f bl 8003760 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
80032c2: 2308 movs r3, #8
80032c4: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_5;
80032c6: 2305 movs r3, #5
80032c8: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
80032ca: 1d3b adds r3, r7, #4
80032cc: 4619 mov r1, r3
80032ce: 4806 ldr r0, [pc, #24] @ (80032e8 <MX_ADC1_Init+0xe8>)
80032d0: f002 f962 bl 8005598 <HAL_ADC_ConfigChannel>
80032d4: 4603 mov r3, r0
80032d6: 2b00 cmp r3, #0
80032d8: d001 beq.n 80032de <MX_ADC1_Init+0xde>
Error_Handler();
80032da: f000 fa41 bl 8003760 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
80032de: bf00 nop
80032e0: 3710 adds r7, #16
80032e2: 46bd mov sp, r7
80032e4: bd80 pop {r7, pc}
80032e6: bf00 nop
80032e8: 200002a4 .word 0x200002a4
80032ec: 40012400 .word 0x40012400
080032f0 <MX_TIM2_Init>:
/**
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void) {
80032f0: b580 push {r7, lr}
80032f2: b08e sub sp, #56 @ 0x38
80032f4: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
80032f6: f107 0328 add.w r3, r7, #40 @ 0x28
80032fa: 2200 movs r2, #0
80032fc: 601a str r2, [r3, #0]
80032fe: 605a str r2, [r3, #4]
8003300: 609a str r2, [r3, #8]
8003302: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = { 0 };
8003304: f107 0320 add.w r3, r7, #32
8003308: 2200 movs r2, #0
800330a: 601a str r2, [r3, #0]
800330c: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = { 0 };
800330e: 1d3b adds r3, r7, #4
8003310: 2200 movs r2, #0
8003312: 601a str r2, [r3, #0]
8003314: 605a str r2, [r3, #4]
8003316: 609a str r2, [r3, #8]
8003318: 60da str r2, [r3, #12]
800331a: 611a str r2, [r3, #16]
800331c: 615a str r2, [r3, #20]
800331e: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8003320: 4b44 ldr r3, [pc, #272] @ (8003434 <MX_TIM2_Init+0x144>)
8003322: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8003326: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8003328: 4b42 ldr r3, [pc, #264] @ (8003434 <MX_TIM2_Init+0x144>)
800332a: 2200 movs r2, #0
800332c: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
800332e: 4b41 ldr r3, [pc, #260] @ (8003434 <MX_TIM2_Init+0x144>)
8003330: 2200 movs r2, #0
8003332: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
8003334: 4b3f ldr r3, [pc, #252] @ (8003434 <MX_TIM2_Init+0x144>)
8003336: f244 624f movw r2, #17999 @ 0x464f
800333a: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
800333c: 4b3d ldr r3, [pc, #244] @ (8003434 <MX_TIM2_Init+0x144>)
800333e: 2200 movs r2, #0
8003340: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8003342: 4b3c ldr r3, [pc, #240] @ (8003434 <MX_TIM2_Init+0x144>)
8003344: 2200 movs r2, #0
8003346: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK) {
8003348: 483a ldr r0, [pc, #232] @ (8003434 <MX_TIM2_Init+0x144>)
800334a: f005 fbfd bl 8008b48 <HAL_TIM_Base_Init>
800334e: 4603 mov r3, r0
8003350: 2b00 cmp r3, #0
8003352: d001 beq.n 8003358 <MX_TIM2_Init+0x68>
Error_Handler();
8003354: f000 fa04 bl 8003760 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8003358: f44f 5380 mov.w r3, #4096 @ 0x1000
800335c: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) {
800335e: f107 0328 add.w r3, r7, #40 @ 0x28
8003362: 4619 mov r1, r3
8003364: 4833 ldr r0, [pc, #204] @ (8003434 <MX_TIM2_Init+0x144>)
8003366: f005 fe5f bl 8009028 <HAL_TIM_ConfigClockSource>
800336a: 4603 mov r3, r0
800336c: 2b00 cmp r3, #0
800336e: d001 beq.n 8003374 <MX_TIM2_Init+0x84>
Error_Handler();
8003370: f000 f9f6 bl 8003760 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) {
8003374: 482f ldr r0, [pc, #188] @ (8003434 <MX_TIM2_Init+0x144>)
8003376: f005 fc36 bl 8008be6 <HAL_TIM_PWM_Init>
800337a: 4603 mov r3, r0
800337c: 2b00 cmp r3, #0
800337e: d001 beq.n 8003384 <MX_TIM2_Init+0x94>
Error_Handler();
8003380: f000 f9ee bl 8003760 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8003384: 2300 movs r3, #0
8003386: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8003388: 2300 movs r3, #0
800338a: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig)
800338c: f107 0320 add.w r3, r7, #32
8003390: 4619 mov r1, r3
8003392: 4828 ldr r0, [pc, #160] @ (8003434 <MX_TIM2_Init+0x144>)
8003394: f006 f9e8 bl 8009768 <HAL_TIMEx_MasterConfigSynchronization>
8003398: 4603 mov r3, r0
800339a: 2b00 cmp r3, #0
800339c: d001 beq.n 80033a2 <MX_TIM2_Init+0xb2>
!= HAL_OK) {
Error_Handler();
800339e: f000 f9df bl 8003760 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
80033a2: 2360 movs r3, #96 @ 0x60
80033a4: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
80033a6: f44f 737a mov.w r3, #1000 @ 0x3e8
80033aa: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
80033ac: 2300 movs r3, #0
80033ae: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80033b0: 2304 movs r3, #4
80033b2: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1)
80033b4: 1d3b adds r3, r7, #4
80033b6: 2200 movs r2, #0
80033b8: 4619 mov r1, r3
80033ba: 481e ldr r0, [pc, #120] @ (8003434 <MX_TIM2_Init+0x144>)
80033bc: f005 fd72 bl 8008ea4 <HAL_TIM_PWM_ConfigChannel>
80033c0: 4603 mov r3, r0
80033c2: 2b00 cmp r3, #0
80033c4: d001 beq.n 80033ca <MX_TIM2_Init+0xda>
!= HAL_OK) {
Error_Handler();
80033c6: f000 f9cb bl 8003760 <Error_Handler>
}
sConfigOC.Pulse = 2000;
80033ca: f44f 63fa mov.w r3, #2000 @ 0x7d0
80033ce: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2)
80033d0: 1d3b adds r3, r7, #4
80033d2: 2204 movs r2, #4
80033d4: 4619 mov r1, r3
80033d6: 4817 ldr r0, [pc, #92] @ (8003434 <MX_TIM2_Init+0x144>)
80033d8: f005 fd64 bl 8008ea4 <HAL_TIM_PWM_ConfigChannel>
80033dc: 4603 mov r3, r0
80033de: 2b00 cmp r3, #0
80033e0: d001 beq.n 80033e6 <MX_TIM2_Init+0xf6>
!= HAL_OK) {
Error_Handler();
80033e2: f000 f9bd bl 8003760 <Error_Handler>
}
sConfigOC.Pulse = 3000;
80033e6: f640 33b8 movw r3, #3000 @ 0xbb8
80033ea: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
80033ec: 2300 movs r3, #0
80033ee: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3)
80033f0: 1d3b adds r3, r7, #4
80033f2: 2208 movs r2, #8
80033f4: 4619 mov r1, r3
80033f6: 480f ldr r0, [pc, #60] @ (8003434 <MX_TIM2_Init+0x144>)
80033f8: f005 fd54 bl 8008ea4 <HAL_TIM_PWM_ConfigChannel>
80033fc: 4603 mov r3, r0
80033fe: 2b00 cmp r3, #0
8003400: d001 beq.n 8003406 <MX_TIM2_Init+0x116>
!= HAL_OK) {
Error_Handler();
8003402: f000 f9ad bl 8003760 <Error_Handler>
}
sConfigOC.Pulse = 4000;
8003406: f44f 637a mov.w r3, #4000 @ 0xfa0
800340a: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800340c: 2304 movs r3, #4
800340e: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4)
8003410: 1d3b adds r3, r7, #4
8003412: 220c movs r2, #12
8003414: 4619 mov r1, r3
8003416: 4807 ldr r0, [pc, #28] @ (8003434 <MX_TIM2_Init+0x144>)
8003418: f005 fd44 bl 8008ea4 <HAL_TIM_PWM_ConfigChannel>
800341c: 4603 mov r3, r0
800341e: 2b00 cmp r3, #0
8003420: d001 beq.n 8003426 <MX_TIM2_Init+0x136>
!= HAL_OK) {
Error_Handler();
8003422: f000 f99d bl 8003760 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
8003426: 4803 ldr r0, [pc, #12] @ (8003434 <MX_TIM2_Init+0x144>)
8003428: f001 fd3e bl 8004ea8 <HAL_TIM_MspPostInit>
}
800342c: bf00 nop
800342e: 3738 adds r7, #56 @ 0x38
8003430: 46bd mov sp, r7
8003432: bd80 pop {r7, pc}
8003434: 20000318 .word 0x20000318
08003438 <MX_TIM4_Init>:
/**
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void) {
8003438: b580 push {r7, lr}
800343a: b08e sub sp, #56 @ 0x38
800343c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
800343e: f107 0328 add.w r3, r7, #40 @ 0x28
8003442: 2200 movs r2, #0
8003444: 601a str r2, [r3, #0]
8003446: 605a str r2, [r3, #4]
8003448: 609a str r2, [r3, #8]
800344a: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = { 0 };
800344c: f107 0320 add.w r3, r7, #32
8003450: 2200 movs r2, #0
8003452: 601a str r2, [r3, #0]
8003454: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = { 0 };
8003456: 1d3b adds r3, r7, #4
8003458: 2200 movs r2, #0
800345a: 601a str r2, [r3, #0]
800345c: 605a str r2, [r3, #4]
800345e: 609a str r2, [r3, #8]
8003460: 60da str r2, [r3, #12]
8003462: 611a str r2, [r3, #16]
8003464: 615a str r2, [r3, #20]
8003466: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
8003468: 4b42 ldr r3, [pc, #264] @ (8003574 <MX_TIM4_Init+0x13c>)
800346a: 4a43 ldr r2, [pc, #268] @ (8003578 <MX_TIM4_Init+0x140>)
800346c: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
800346e: 4b41 ldr r3, [pc, #260] @ (8003574 <MX_TIM4_Init+0x13c>)
8003470: 2200 movs r2, #0
8003472: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
8003474: 4b3f ldr r3, [pc, #252] @ (8003574 <MX_TIM4_Init+0x13c>)
8003476: 2200 movs r2, #0
8003478: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
800347a: 4b3e ldr r3, [pc, #248] @ (8003574 <MX_TIM4_Init+0x13c>)
800347c: f244 624f movw r2, #17999 @ 0x464f
8003480: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8003482: 4b3c ldr r3, [pc, #240] @ (8003574 <MX_TIM4_Init+0x13c>)
8003484: 2200 movs r2, #0
8003486: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8003488: 4b3a ldr r3, [pc, #232] @ (8003574 <MX_TIM4_Init+0x13c>)
800348a: 2200 movs r2, #0
800348c: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK) {
800348e: 4839 ldr r0, [pc, #228] @ (8003574 <MX_TIM4_Init+0x13c>)
8003490: f005 fb5a bl 8008b48 <HAL_TIM_Base_Init>
8003494: 4603 mov r3, r0
8003496: 2b00 cmp r3, #0
8003498: d001 beq.n 800349e <MX_TIM4_Init+0x66>
Error_Handler();
800349a: f000 f961 bl 8003760 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
800349e: f44f 5380 mov.w r3, #4096 @ 0x1000
80034a2: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) {
80034a4: f107 0328 add.w r3, r7, #40 @ 0x28
80034a8: 4619 mov r1, r3
80034aa: 4832 ldr r0, [pc, #200] @ (8003574 <MX_TIM4_Init+0x13c>)
80034ac: f005 fdbc bl 8009028 <HAL_TIM_ConfigClockSource>
80034b0: 4603 mov r3, r0
80034b2: 2b00 cmp r3, #0
80034b4: d001 beq.n 80034ba <MX_TIM4_Init+0x82>
Error_Handler();
80034b6: f000 f953 bl 8003760 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) {
80034ba: 482e ldr r0, [pc, #184] @ (8003574 <MX_TIM4_Init+0x13c>)
80034bc: f005 fb93 bl 8008be6 <HAL_TIM_PWM_Init>
80034c0: 4603 mov r3, r0
80034c2: 2b00 cmp r3, #0
80034c4: d001 beq.n 80034ca <MX_TIM4_Init+0x92>
Error_Handler();
80034c6: f000 f94b bl 8003760 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80034ca: 2300 movs r3, #0
80034cc: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80034ce: 2300 movs r3, #0
80034d0: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig)
80034d2: f107 0320 add.w r3, r7, #32
80034d6: 4619 mov r1, r3
80034d8: 4826 ldr r0, [pc, #152] @ (8003574 <MX_TIM4_Init+0x13c>)
80034da: f006 f945 bl 8009768 <HAL_TIMEx_MasterConfigSynchronization>
80034de: 4603 mov r3, r0
80034e0: 2b00 cmp r3, #0
80034e2: d001 beq.n 80034e8 <MX_TIM4_Init+0xb0>
!= HAL_OK) {
Error_Handler();
80034e4: f000 f93c bl 8003760 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
80034e8: 2360 movs r3, #96 @ 0x60
80034ea: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
80034ec: f241 3388 movw r3, #5000 @ 0x1388
80034f0: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
80034f2: 2300 movs r3, #0
80034f4: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80034f6: 2304 movs r3, #4
80034f8: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1)
80034fa: 1d3b adds r3, r7, #4
80034fc: 2200 movs r2, #0
80034fe: 4619 mov r1, r3
8003500: 481c ldr r0, [pc, #112] @ (8003574 <MX_TIM4_Init+0x13c>)
8003502: f005 fccf bl 8008ea4 <HAL_TIM_PWM_ConfigChannel>
8003506: 4603 mov r3, r0
8003508: 2b00 cmp r3, #0
800350a: d001 beq.n 8003510 <MX_TIM4_Init+0xd8>
!= HAL_OK) {
Error_Handler();
800350c: f000 f928 bl 8003760 <Error_Handler>
}
sConfigOC.Pulse = 6000;
8003510: f241 7370 movw r3, #6000 @ 0x1770
8003514: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2)
8003516: 1d3b adds r3, r7, #4
8003518: 2204 movs r2, #4
800351a: 4619 mov r1, r3
800351c: 4815 ldr r0, [pc, #84] @ (8003574 <MX_TIM4_Init+0x13c>)
800351e: f005 fcc1 bl 8008ea4 <HAL_TIM_PWM_ConfigChannel>
8003522: 4603 mov r3, r0
8003524: 2b00 cmp r3, #0
8003526: d001 beq.n 800352c <MX_TIM4_Init+0xf4>
!= HAL_OK) {
Error_Handler();
8003528: f000 f91a bl 8003760 <Error_Handler>
}
sConfigOC.Pulse = 7000;
800352c: f641 3358 movw r3, #7000 @ 0x1b58
8003530: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3)
8003532: 1d3b adds r3, r7, #4
8003534: 2208 movs r2, #8
8003536: 4619 mov r1, r3
8003538: 480e ldr r0, [pc, #56] @ (8003574 <MX_TIM4_Init+0x13c>)
800353a: f005 fcb3 bl 8008ea4 <HAL_TIM_PWM_ConfigChannel>
800353e: 4603 mov r3, r0
8003540: 2b00 cmp r3, #0
8003542: d001 beq.n 8003548 <MX_TIM4_Init+0x110>
!= HAL_OK) {
Error_Handler();
8003544: f000 f90c bl 8003760 <Error_Handler>
}
sConfigOC.Pulse = 8000;
8003548: f44f 53fa mov.w r3, #8000 @ 0x1f40
800354c: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4)
800354e: 1d3b adds r3, r7, #4
8003550: 220c movs r2, #12
8003552: 4619 mov r1, r3
8003554: 4807 ldr r0, [pc, #28] @ (8003574 <MX_TIM4_Init+0x13c>)
8003556: f005 fca5 bl 8008ea4 <HAL_TIM_PWM_ConfigChannel>
800355a: 4603 mov r3, r0
800355c: 2b00 cmp r3, #0
800355e: d001 beq.n 8003564 <MX_TIM4_Init+0x12c>
!= HAL_OK) {
Error_Handler();
8003560: f000 f8fe bl 8003760 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
8003564: 4803 ldr r0, [pc, #12] @ (8003574 <MX_TIM4_Init+0x13c>)
8003566: f001 fc9f bl 8004ea8 <HAL_TIM_MspPostInit>
}
800356a: bf00 nop
800356c: 3738 adds r7, #56 @ 0x38
800356e: 46bd mov sp, r7
8003570: bd80 pop {r7, pc}
8003572: bf00 nop
8003574: 20000360 .word 0x20000360
8003578: 40000800 .word 0x40000800
0800357c <MX_USART1_UART_Init>:
/**
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void) {
800357c: b580 push {r7, lr}
800357e: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
8003580: 4b11 ldr r3, [pc, #68] @ (80035c8 <MX_USART1_UART_Init+0x4c>)
8003582: 4a12 ldr r2, [pc, #72] @ (80035cc <MX_USART1_UART_Init+0x50>)
8003584: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
8003586: 4b10 ldr r3, [pc, #64] @ (80035c8 <MX_USART1_UART_Init+0x4c>)
8003588: f44f 32e1 mov.w r2, #115200 @ 0x1c200
800358c: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
800358e: 4b0e ldr r3, [pc, #56] @ (80035c8 <MX_USART1_UART_Init+0x4c>)
8003590: 2200 movs r2, #0
8003592: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8003594: 4b0c ldr r3, [pc, #48] @ (80035c8 <MX_USART1_UART_Init+0x4c>)
8003596: 2200 movs r2, #0
8003598: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
800359a: 4b0b ldr r3, [pc, #44] @ (80035c8 <MX_USART1_UART_Init+0x4c>)
800359c: 2200 movs r2, #0
800359e: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
80035a0: 4b09 ldr r3, [pc, #36] @ (80035c8 <MX_USART1_UART_Init+0x4c>)
80035a2: 220c movs r2, #12
80035a4: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
80035a6: 4b08 ldr r3, [pc, #32] @ (80035c8 <MX_USART1_UART_Init+0x4c>)
80035a8: 2200 movs r2, #0
80035aa: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
80035ac: 4b06 ldr r3, [pc, #24] @ (80035c8 <MX_USART1_UART_Init+0x4c>)
80035ae: 2200 movs r2, #0
80035b0: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK) {
80035b2: 4805 ldr r0, [pc, #20] @ (80035c8 <MX_USART1_UART_Init+0x4c>)
80035b4: f006 f936 bl 8009824 <HAL_UART_Init>
80035b8: 4603 mov r3, r0
80035ba: 2b00 cmp r3, #0
80035bc: d001 beq.n 80035c2 <MX_USART1_UART_Init+0x46>
Error_Handler();
80035be: f000 f8cf bl 8003760 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
80035c2: bf00 nop
80035c4: bd80 pop {r7, pc}
80035c6: bf00 nop
80035c8: 200003a8 .word 0x200003a8
80035cc: 40013800 .word 0x40013800
080035d0 <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void) {
80035d0: b580 push {r7, lr}
80035d2: b082 sub sp, #8
80035d4: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
80035d6: 4b0c ldr r3, [pc, #48] @ (8003608 <MX_DMA_Init+0x38>)
80035d8: 695b ldr r3, [r3, #20]
80035da: 4a0b ldr r2, [pc, #44] @ (8003608 <MX_DMA_Init+0x38>)
80035dc: f043 0301 orr.w r3, r3, #1
80035e0: 6153 str r3, [r2, #20]
80035e2: 4b09 ldr r3, [pc, #36] @ (8003608 <MX_DMA_Init+0x38>)
80035e4: 695b ldr r3, [r3, #20]
80035e6: f003 0301 and.w r3, r3, #1
80035ea: 607b str r3, [r7, #4]
80035ec: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
80035ee: 2200 movs r2, #0
80035f0: 2100 movs r1, #0
80035f2: 200b movs r0, #11
80035f4: f002 faa1 bl 8005b3a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
80035f8: 200b movs r0, #11
80035fa: f002 faba bl 8005b72 <HAL_NVIC_EnableIRQ>
}
80035fe: bf00 nop
8003600: 3708 adds r7, #8
8003602: 46bd mov sp, r7
8003604: bd80 pop {r7, pc}
8003606: bf00 nop
8003608: 40021000 .word 0x40021000
0800360c <MX_GPIO_Init>:
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void) {
800360c: b580 push {r7, lr}
800360e: b088 sub sp, #32
8003610: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = { 0 };
8003612: f107 0310 add.w r3, r7, #16
8003616: 2200 movs r2, #0
8003618: 601a str r2, [r3, #0]
800361a: 605a str r2, [r3, #4]
800361c: 609a str r2, [r3, #8]
800361e: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
8003620: 4b4b ldr r3, [pc, #300] @ (8003750 <MX_GPIO_Init+0x144>)
8003622: 699b ldr r3, [r3, #24]
8003624: 4a4a ldr r2, [pc, #296] @ (8003750 <MX_GPIO_Init+0x144>)
8003626: f043 0310 orr.w r3, r3, #16
800362a: 6193 str r3, [r2, #24]
800362c: 4b48 ldr r3, [pc, #288] @ (8003750 <MX_GPIO_Init+0x144>)
800362e: 699b ldr r3, [r3, #24]
8003630: f003 0310 and.w r3, r3, #16
8003634: 60fb str r3, [r7, #12]
8003636: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
8003638: 4b45 ldr r3, [pc, #276] @ (8003750 <MX_GPIO_Init+0x144>)
800363a: 699b ldr r3, [r3, #24]
800363c: 4a44 ldr r2, [pc, #272] @ (8003750 <MX_GPIO_Init+0x144>)
800363e: f043 0320 orr.w r3, r3, #32
8003642: 6193 str r3, [r2, #24]
8003644: 4b42 ldr r3, [pc, #264] @ (8003750 <MX_GPIO_Init+0x144>)
8003646: 699b ldr r3, [r3, #24]
8003648: f003 0320 and.w r3, r3, #32
800364c: 60bb str r3, [r7, #8]
800364e: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
8003650: 4b3f ldr r3, [pc, #252] @ (8003750 <MX_GPIO_Init+0x144>)
8003652: 699b ldr r3, [r3, #24]
8003654: 4a3e ldr r2, [pc, #248] @ (8003750 <MX_GPIO_Init+0x144>)
8003656: f043 0304 orr.w r3, r3, #4
800365a: 6193 str r3, [r2, #24]
800365c: 4b3c ldr r3, [pc, #240] @ (8003750 <MX_GPIO_Init+0x144>)
800365e: 699b ldr r3, [r3, #24]
8003660: f003 0304 and.w r3, r3, #4
8003664: 607b str r3, [r7, #4]
8003666: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
8003668: 4b39 ldr r3, [pc, #228] @ (8003750 <MX_GPIO_Init+0x144>)
800366a: 699b ldr r3, [r3, #24]
800366c: 4a38 ldr r2, [pc, #224] @ (8003750 <MX_GPIO_Init+0x144>)
800366e: f043 0308 orr.w r3, r3, #8
8003672: 6193 str r3, [r2, #24]
8003674: 4b36 ldr r3, [pc, #216] @ (8003750 <MX_GPIO_Init+0x144>)
8003676: 699b ldr r3, [r3, #24]
8003678: f003 0308 and.w r3, r3, #8
800367c: 603b str r3, [r7, #0]
800367e: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8003680: 2200 movs r2, #0
8003682: f44f 5100 mov.w r1, #8192 @ 0x2000
8003686: 4833 ldr r0, [pc, #204] @ (8003754 <MX_GPIO_Init+0x148>)
8003688: f003 f81d bl 80066c6 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB,
800368c: 2200 movs r2, #0
800368e: f640 413e movw r1, #3134 @ 0xc3e
8003692: 4831 ldr r0, [pc, #196] @ (8003758 <MX_GPIO_Init+0x14c>)
8003694: f003 f817 bl 80066c6 <HAL_GPIO_WritePin>
INH1_Pin | INH2_Pin | INH3_Pin | INH4_Pin | EXP1_Pin | EXP2_Pin
| EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin | LED1_Pin, GPIO_PIN_RESET);
8003698: 2200 movs r2, #0
800369a: f44f 4101 mov.w r1, #33024 @ 0x8100
800369e: 482f ldr r0, [pc, #188] @ (800375c <MX_GPIO_Init+0x150>)
80036a0: f003 f811 bl 80066c6 <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
80036a4: f44f 5300 mov.w r3, #8192 @ 0x2000
80036a8: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80036aa: 2301 movs r3, #1
80036ac: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80036ae: 2300 movs r3, #0
80036b0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80036b2: 2302 movs r3, #2
80036b4: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
80036b6: f107 0310 add.w r3, r7, #16
80036ba: 4619 mov r1, r3
80036bc: 4825 ldr r0, [pc, #148] @ (8003754 <MX_GPIO_Init+0x148>)
80036be: f002 fe67 bl 8006390 <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin | P2_Pin;
80036c2: f44f 4340 mov.w r3, #49152 @ 0xc000
80036c6: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
80036c8: 2300 movs r3, #0
80036ca: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80036cc: 2300 movs r3, #0
80036ce: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
80036d0: f107 0310 add.w r3, r7, #16
80036d4: 4619 mov r1, r3
80036d6: 481f ldr r0, [pc, #124] @ (8003754 <MX_GPIO_Init+0x148>)
80036d8: f002 fe5a bl 8006390 <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
80036dc: 2310 movs r3, #16
80036de: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
80036e0: 2303 movs r3, #3
80036e2: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
80036e4: f107 0310 add.w r3, r7, #16
80036e8: 4619 mov r1, r3
80036ea: 481c ldr r0, [pc, #112] @ (800375c <MX_GPIO_Init+0x150>)
80036ec: f002 fe50 bl 8006390 <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin | INH2_Pin | INH3_Pin | INH4_Pin | EXP1_Pin
80036f0: f640 433e movw r3, #3134 @ 0xc3e
80036f4: 613b str r3, [r7, #16]
| EXP2_Pin | EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80036f6: 2301 movs r3, #1
80036f8: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80036fa: 2300 movs r3, #0
80036fc: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80036fe: 2302 movs r3, #2
8003700: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8003702: f107 0310 add.w r3, r7, #16
8003706: 4619 mov r1, r3
8003708: 4813 ldr r0, [pc, #76] @ (8003758 <MX_GPIO_Init+0x14c>)
800370a: f002 fe41 bl 8006390 <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin | CH2_Pin | CH3_Pin | CH4_Pin;
800370e: f44f 4370 mov.w r3, #61440 @ 0xf000
8003712: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8003714: 2300 movs r3, #0
8003716: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003718: 2300 movs r3, #0
800371a: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
800371c: f107 0310 add.w r3, r7, #16
8003720: 4619 mov r1, r3
8003722: 480d ldr r0, [pc, #52] @ (8003758 <MX_GPIO_Init+0x14c>)
8003724: f002 fe34 bl 8006390 <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin | LED1_Pin;
8003728: f44f 4301 mov.w r3, #33024 @ 0x8100
800372c: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800372e: 2301 movs r3, #1
8003730: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003732: 2300 movs r3, #0
8003734: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8003736: 2302 movs r3, #2
8003738: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800373a: f107 0310 add.w r3, r7, #16
800373e: 4619 mov r1, r3
8003740: 4806 ldr r0, [pc, #24] @ (800375c <MX_GPIO_Init+0x150>)
8003742: f002 fe25 bl 8006390 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
8003746: bf00 nop
8003748: 3720 adds r7, #32
800374a: 46bd mov sp, r7
800374c: bd80 pop {r7, pc}
800374e: bf00 nop
8003750: 40021000 .word 0x40021000
8003754: 40011000 .word 0x40011000
8003758: 40010c00 .word 0x40010c00
800375c: 40010800 .word 0x40010800
08003760 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void) {
8003760: b480 push {r7}
8003762: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8003764: b672 cpsid i
}
8003766: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1) {
8003768: bf00 nop
800376a: e7fd b.n 8003768 <Error_Handler+0x8>
0800376c <m1ap>:
extern uint16_t mrampstart[4];
extern uint16_t tramp;
extern UART_HandleTypeDef huart1;
motMov_st m1ap(void){
800376c: b580 push {r7, lr}
800376e: b09c sub sp, #112 @ 0x70
8003770: af02 add r7, sp, #8
static motMov_st m1st=motWaiting;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
8003772: 4b5d ldr r3, [pc, #372] @ (80038e8 <m1ap+0x17c>)
8003774: 781a ldrb r2, [r3, #0]
8003776: 4b5d ldr r3, [pc, #372] @ (80038ec <m1ap+0x180>)
8003778: 781b ldrb r3, [r3, #0]
800377a: 429a cmp r2, r3
800377c: d017 beq.n 80037ae <m1ap+0x42>
memm1st=m1st;
800377e: 4b5b ldr r3, [pc, #364] @ (80038ec <m1ap+0x180>)
8003780: 781a ldrb r2, [r3, #0]
8003782: 4b59 ldr r3, [pc, #356] @ (80038e8 <m1ap+0x17c>)
8003784: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ap=%d",m1st);
8003786: 4b59 ldr r3, [pc, #356] @ (80038ec <m1ap+0x180>)
8003788: 781b ldrb r3, [r3, #0]
800378a: 461a mov r2, r3
800378c: 1d3b adds r3, r7, #4
800378e: 4958 ldr r1, [pc, #352] @ (80038f0 <m1ap+0x184>)
8003790: 4618 mov r0, r3
8003792: f00a fe87 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003796: 1d3b adds r3, r7, #4
8003798: 4618 mov r0, r3
800379a: f7fc fcd7 bl 800014c <strlen>
800379e: 4603 mov r3, r0
80037a0: b29a uxth r2, r3
80037a2: 1d39 adds r1, r7, #4
80037a4: f04f 33ff mov.w r3, #4294967295
80037a8: 4852 ldr r0, [pc, #328] @ (80038f4 <m1ap+0x188>)
80037aa: f006 f88b bl 80098c4 <HAL_UART_Transmit>
}
if(rtCiclo<apM1start)m1st=motWaiting;
80037ae: 4b52 ldr r3, [pc, #328] @ (80038f8 <m1ap+0x18c>)
80037b0: 881b ldrh r3, [r3, #0]
80037b2: b29a uxth r2, r3
80037b4: 4b51 ldr r3, [pc, #324] @ (80038fc <m1ap+0x190>)
80037b6: 881b ldrh r3, [r3, #0]
80037b8: 429a cmp r2, r3
80037ba: d202 bcs.n 80037c2 <m1ap+0x56>
80037bc: 4b4b ldr r3, [pc, #300] @ (80038ec <m1ap+0x180>)
80037be: 2200 movs r2, #0
80037c0: 701a strb r2, [r3, #0]
switch(m1st){
80037c2: 4b4a ldr r3, [pc, #296] @ (80038ec <m1ap+0x180>)
80037c4: 781b ldrb r3, [r3, #0]
80037c6: 2b03 cmp r3, #3
80037c8: d876 bhi.n 80038b8 <m1ap+0x14c>
80037ca: a201 add r2, pc, #4 @ (adr r2, 80037d0 <m1ap+0x64>)
80037cc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80037d0: 080037e1 .word 0x080037e1
80037d4: 0800382d .word 0x0800382d
80037d8: 0800385d .word 0x0800385d
80037dc: 0800388f .word 0x0800388f
case motWaiting:
SetMotPerc(M1,FW,0);
80037e0: 2200 movs r2, #0
80037e2: 2100 movs r1, #0
80037e4: 2001 movs r0, #1
80037e6: f001 f83f bl 8004868 <SetMotPerc>
SetMotPerc(M1,BW,0);
80037ea: 2200 movs r2, #0
80037ec: 2101 movs r1, #1
80037ee: 2001 movs r0, #1
80037f0: f001 f83a bl 8004868 <SetMotPerc>
if(rtCiclo>=apM1start){
80037f4: 4b40 ldr r3, [pc, #256] @ (80038f8 <m1ap+0x18c>)
80037f6: 881b ldrh r3, [r3, #0]
80037f8: b29a uxth r2, r3
80037fa: 4b40 ldr r3, [pc, #256] @ (80038fc <m1ap+0x190>)
80037fc: 881b ldrh r3, [r3, #0]
80037fe: 429a cmp r2, r3
8003800: d365 bcc.n 80038ce <m1ap+0x162>
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT);
8003802: 4b3f ldr r3, [pc, #252] @ (8003900 <m1ap+0x194>)
8003804: 881b ldrh r3, [r3, #0]
8003806: b2da uxtb r2, r3
8003808: 4b3e ldr r3, [pc, #248] @ (8003904 <m1ap+0x198>)
800380a: 881b ldrh r3, [r3, #0]
800380c: b2d9 uxtb r1, r3
800380e: 4b3e ldr r3, [pc, #248] @ (8003908 <m1ap+0x19c>)
8003810: 881b ldrh r3, [r3, #0]
8003812: b2db uxtb r3, r3
8003814: 2000 movs r0, #0
8003816: 9001 str r0, [sp, #4]
8003818: 9300 str r3, [sp, #0]
800381a: 460b mov r3, r1
800381c: 2100 movs r1, #0
800381e: 2001 movs r0, #1
8003820: f001 f9a2 bl 8004b68 <ramp>
m1st=motStartRamp;
8003824: 4b31 ldr r3, [pc, #196] @ (80038ec <m1ap+0x180>)
8003826: 2201 movs r2, #1
8003828: 701a strb r2, [r3, #0]
}
break;
800382a: e050 b.n 80038ce <m1ap+0x162>
case motStartRamp:
if(ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){
800382c: 4b34 ldr r3, [pc, #208] @ (8003900 <m1ap+0x194>)
800382e: 881b ldrh r3, [r3, #0]
8003830: b2da uxtb r2, r3
8003832: 4b34 ldr r3, [pc, #208] @ (8003904 <m1ap+0x198>)
8003834: 881b ldrh r3, [r3, #0]
8003836: b2d9 uxtb r1, r3
8003838: 4b33 ldr r3, [pc, #204] @ (8003908 <m1ap+0x19c>)
800383a: 881b ldrh r3, [r3, #0]
800383c: b2db uxtb r3, r3
800383e: 200a movs r0, #10
8003840: 9001 str r0, [sp, #4]
8003842: 9300 str r3, [sp, #0]
8003844: 460b mov r3, r1
8003846: 2100 movs r1, #0
8003848: 2001 movs r0, #1
800384a: f001 f98d bl 8004b68 <ramp>
800384e: 4603 mov r3, r0
8003850: 2b00 cmp r3, #0
8003852: d13e bne.n 80038d2 <m1ap+0x166>
m1st=motWaitingTime;
8003854: 4b25 ldr r3, [pc, #148] @ (80038ec <m1ap+0x180>)
8003856: 2202 movs r2, #2
8003858: 701a strb r2, [r3, #0]
}
break;
800385a: e03a b.n 80038d2 <m1ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM1stop){
800385c: 4b26 ldr r3, [pc, #152] @ (80038f8 <m1ap+0x18c>)
800385e: 881b ldrh r3, [r3, #0]
8003860: b29a uxth r2, r3
8003862: 4b2a ldr r3, [pc, #168] @ (800390c <m1ap+0x1a0>)
8003864: 881b ldrh r3, [r3, #0]
8003866: 429a cmp r2, r3
8003868: d335 bcc.n 80038d6 <m1ap+0x16a>
(void)ramp(M1,FW,m1pwmap,0,tramp,RAMPINIT);
800386a: 4b26 ldr r3, [pc, #152] @ (8003904 <m1ap+0x198>)
800386c: 881b ldrh r3, [r3, #0]
800386e: b2da uxtb r2, r3
8003870: 4b25 ldr r3, [pc, #148] @ (8003908 <m1ap+0x19c>)
8003872: 881b ldrh r3, [r3, #0]
8003874: b2db uxtb r3, r3
8003876: 2100 movs r1, #0
8003878: 9101 str r1, [sp, #4]
800387a: 9300 str r3, [sp, #0]
800387c: 2300 movs r3, #0
800387e: 2100 movs r1, #0
8003880: 2001 movs r0, #1
8003882: f001 f971 bl 8004b68 <ramp>
m1st=motStopRamp;
8003886: 4b19 ldr r3, [pc, #100] @ (80038ec <m1ap+0x180>)
8003888: 2203 movs r2, #3
800388a: 701a strb r2, [r3, #0]
}
break;
800388c: e023 b.n 80038d6 <m1ap+0x16a>
case motStopRamp:
if(ramp(M1,FW,m1pwmap,0,tramp,RAMPRUN)==DONE){
800388e: 4b1d ldr r3, [pc, #116] @ (8003904 <m1ap+0x198>)
8003890: 881b ldrh r3, [r3, #0]
8003892: b2da uxtb r2, r3
8003894: 4b1c ldr r3, [pc, #112] @ (8003908 <m1ap+0x19c>)
8003896: 881b ldrh r3, [r3, #0]
8003898: b2db uxtb r3, r3
800389a: 210a movs r1, #10
800389c: 9101 str r1, [sp, #4]
800389e: 9300 str r3, [sp, #0]
80038a0: 2300 movs r3, #0
80038a2: 2100 movs r1, #0
80038a4: 2001 movs r0, #1
80038a6: f001 f95f bl 8004b68 <ramp>
80038aa: 4603 mov r3, r0
80038ac: 2b00 cmp r3, #0
80038ae: d114 bne.n 80038da <m1ap+0x16e>
m1st=motStop;
80038b0: 4b0e ldr r3, [pc, #56] @ (80038ec <m1ap+0x180>)
80038b2: 2204 movs r2, #4
80038b4: 701a strb r2, [r3, #0]
}
break;
80038b6: e010 b.n 80038da <m1ap+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
80038b8: 2200 movs r2, #0
80038ba: 2100 movs r1, #0
80038bc: 2001 movs r0, #1
80038be: f000 ffd3 bl 8004868 <SetMotPerc>
SetMotPerc(M1,BW,0);
80038c2: 2200 movs r2, #0
80038c4: 2101 movs r1, #1
80038c6: 2001 movs r0, #1
80038c8: f000 ffce bl 8004868 <SetMotPerc>
break;
80038cc: e006 b.n 80038dc <m1ap+0x170>
break;
80038ce: bf00 nop
80038d0: e004 b.n 80038dc <m1ap+0x170>
break;
80038d2: bf00 nop
80038d4: e002 b.n 80038dc <m1ap+0x170>
break;
80038d6: bf00 nop
80038d8: e000 b.n 80038dc <m1ap+0x170>
break;
80038da: bf00 nop
}
return m1st;
80038dc: 4b03 ldr r3, [pc, #12] @ (80038ec <m1ap+0x180>)
80038de: 781b ldrb r3, [r3, #0]
}
80038e0: 4618 mov r0, r3
80038e2: 3768 adds r7, #104 @ 0x68
80038e4: 46bd mov sp, r7
80038e6: bd80 pop {r7, pc}
80038e8: 20000007 .word 0x20000007
80038ec: 20000462 .word 0x20000462
80038f0: 0800f400 .word 0x0800f400
80038f4: 200003a8 .word 0x200003a8
80038f8: 200003fc .word 0x200003fc
80038fc: 20000428 .word 0x20000428
8003900: 2000044c .word 0x2000044c
8003904: 20000400 .word 0x20000400
8003908: 20000418 .word 0x20000418
800390c: 2000042a .word 0x2000042a
08003910 <m2ap>:
motMov_st m2ap(void){
8003910: b580 push {r7, lr}
8003912: b09c sub sp, #112 @ 0x70
8003914: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
8003916: 4b5d ldr r3, [pc, #372] @ (8003a8c <m2ap+0x17c>)
8003918: 781a ldrb r2, [r3, #0]
800391a: 4b5d ldr r3, [pc, #372] @ (8003a90 <m2ap+0x180>)
800391c: 781b ldrb r3, [r3, #0]
800391e: 429a cmp r2, r3
8003920: d017 beq.n 8003952 <m2ap+0x42>
memm2st=m2st;
8003922: 4b5b ldr r3, [pc, #364] @ (8003a90 <m2ap+0x180>)
8003924: 781a ldrb r2, [r3, #0]
8003926: 4b59 ldr r3, [pc, #356] @ (8003a8c <m2ap+0x17c>)
8003928: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ap=%d",m2st);
800392a: 4b59 ldr r3, [pc, #356] @ (8003a90 <m2ap+0x180>)
800392c: 781b ldrb r3, [r3, #0]
800392e: 461a mov r2, r3
8003930: 1d3b adds r3, r7, #4
8003932: 4958 ldr r1, [pc, #352] @ (8003a94 <m2ap+0x184>)
8003934: 4618 mov r0, r3
8003936: f00a fdb5 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800393a: 1d3b adds r3, r7, #4
800393c: 4618 mov r0, r3
800393e: f7fc fc05 bl 800014c <strlen>
8003942: 4603 mov r3, r0
8003944: b29a uxth r2, r3
8003946: 1d39 adds r1, r7, #4
8003948: f04f 33ff mov.w r3, #4294967295
800394c: 4852 ldr r0, [pc, #328] @ (8003a98 <m2ap+0x188>)
800394e: f005 ffb9 bl 80098c4 <HAL_UART_Transmit>
}
if(rtCiclo<apM2start)m2st=motWaiting;
8003952: 4b52 ldr r3, [pc, #328] @ (8003a9c <m2ap+0x18c>)
8003954: 881b ldrh r3, [r3, #0]
8003956: b29a uxth r2, r3
8003958: 4b51 ldr r3, [pc, #324] @ (8003aa0 <m2ap+0x190>)
800395a: 881b ldrh r3, [r3, #0]
800395c: 429a cmp r2, r3
800395e: d202 bcs.n 8003966 <m2ap+0x56>
8003960: 4b4b ldr r3, [pc, #300] @ (8003a90 <m2ap+0x180>)
8003962: 2200 movs r2, #0
8003964: 701a strb r2, [r3, #0]
switch(m2st){
8003966: 4b4a ldr r3, [pc, #296] @ (8003a90 <m2ap+0x180>)
8003968: 781b ldrb r3, [r3, #0]
800396a: 2b03 cmp r3, #3
800396c: d876 bhi.n 8003a5c <m2ap+0x14c>
800396e: a201 add r2, pc, #4 @ (adr r2, 8003974 <m2ap+0x64>)
8003970: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003974: 08003985 .word 0x08003985
8003978: 080039d1 .word 0x080039d1
800397c: 08003a01 .word 0x08003a01
8003980: 08003a33 .word 0x08003a33
case motWaiting:
SetMotPerc(M2,FW,0);
8003984: 2200 movs r2, #0
8003986: 2100 movs r1, #0
8003988: 2002 movs r0, #2
800398a: f000 ff6d bl 8004868 <SetMotPerc>
SetMotPerc(M2,BW,0);
800398e: 2200 movs r2, #0
8003990: 2101 movs r1, #1
8003992: 2002 movs r0, #2
8003994: f000 ff68 bl 8004868 <SetMotPerc>
if(rtCiclo>=apM2start){
8003998: 4b40 ldr r3, [pc, #256] @ (8003a9c <m2ap+0x18c>)
800399a: 881b ldrh r3, [r3, #0]
800399c: b29a uxth r2, r3
800399e: 4b40 ldr r3, [pc, #256] @ (8003aa0 <m2ap+0x190>)
80039a0: 881b ldrh r3, [r3, #0]
80039a2: 429a cmp r2, r3
80039a4: d365 bcc.n 8003a72 <m2ap+0x162>
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT);
80039a6: 4b3f ldr r3, [pc, #252] @ (8003aa4 <m2ap+0x194>)
80039a8: 885b ldrh r3, [r3, #2]
80039aa: b2da uxtb r2, r3
80039ac: 4b3e ldr r3, [pc, #248] @ (8003aa8 <m2ap+0x198>)
80039ae: 881b ldrh r3, [r3, #0]
80039b0: b2d9 uxtb r1, r3
80039b2: 4b3e ldr r3, [pc, #248] @ (8003aac <m2ap+0x19c>)
80039b4: 881b ldrh r3, [r3, #0]
80039b6: b2db uxtb r3, r3
80039b8: 2000 movs r0, #0
80039ba: 9001 str r0, [sp, #4]
80039bc: 9300 str r3, [sp, #0]
80039be: 460b mov r3, r1
80039c0: 2101 movs r1, #1
80039c2: 2002 movs r0, #2
80039c4: f001 f8d0 bl 8004b68 <ramp>
m2st=motStartRamp;
80039c8: 4b31 ldr r3, [pc, #196] @ (8003a90 <m2ap+0x180>)
80039ca: 2201 movs r2, #1
80039cc: 701a strb r2, [r3, #0]
}
break;
80039ce: e050 b.n 8003a72 <m2ap+0x162>
case motStartRamp:
if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){
80039d0: 4b34 ldr r3, [pc, #208] @ (8003aa4 <m2ap+0x194>)
80039d2: 885b ldrh r3, [r3, #2]
80039d4: b2da uxtb r2, r3
80039d6: 4b34 ldr r3, [pc, #208] @ (8003aa8 <m2ap+0x198>)
80039d8: 881b ldrh r3, [r3, #0]
80039da: b2d9 uxtb r1, r3
80039dc: 4b33 ldr r3, [pc, #204] @ (8003aac <m2ap+0x19c>)
80039de: 881b ldrh r3, [r3, #0]
80039e0: b2db uxtb r3, r3
80039e2: 200a movs r0, #10
80039e4: 9001 str r0, [sp, #4]
80039e6: 9300 str r3, [sp, #0]
80039e8: 460b mov r3, r1
80039ea: 2101 movs r1, #1
80039ec: 2002 movs r0, #2
80039ee: f001 f8bb bl 8004b68 <ramp>
80039f2: 4603 mov r3, r0
80039f4: 2b00 cmp r3, #0
80039f6: d13e bne.n 8003a76 <m2ap+0x166>
m2st=motWaitingTime;
80039f8: 4b25 ldr r3, [pc, #148] @ (8003a90 <m2ap+0x180>)
80039fa: 2202 movs r2, #2
80039fc: 701a strb r2, [r3, #0]
}
break;
80039fe: e03a b.n 8003a76 <m2ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM2stop){
8003a00: 4b26 ldr r3, [pc, #152] @ (8003a9c <m2ap+0x18c>)
8003a02: 881b ldrh r3, [r3, #0]
8003a04: b29a uxth r2, r3
8003a06: 4b2a ldr r3, [pc, #168] @ (8003ab0 <m2ap+0x1a0>)
8003a08: 881b ldrh r3, [r3, #0]
8003a0a: 429a cmp r2, r3
8003a0c: d335 bcc.n 8003a7a <m2ap+0x16a>
(void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT);
8003a0e: 4b26 ldr r3, [pc, #152] @ (8003aa8 <m2ap+0x198>)
8003a10: 881b ldrh r3, [r3, #0]
8003a12: b2da uxtb r2, r3
8003a14: 4b25 ldr r3, [pc, #148] @ (8003aac <m2ap+0x19c>)
8003a16: 881b ldrh r3, [r3, #0]
8003a18: b2db uxtb r3, r3
8003a1a: 2100 movs r1, #0
8003a1c: 9101 str r1, [sp, #4]
8003a1e: 9300 str r3, [sp, #0]
8003a20: 2300 movs r3, #0
8003a22: 2101 movs r1, #1
8003a24: 2002 movs r0, #2
8003a26: f001 f89f bl 8004b68 <ramp>
m2st=motStopRamp;
8003a2a: 4b19 ldr r3, [pc, #100] @ (8003a90 <m2ap+0x180>)
8003a2c: 2203 movs r2, #3
8003a2e: 701a strb r2, [r3, #0]
}
break;
8003a30: e023 b.n 8003a7a <m2ap+0x16a>
case motStopRamp:
if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){
8003a32: 4b1d ldr r3, [pc, #116] @ (8003aa8 <m2ap+0x198>)
8003a34: 881b ldrh r3, [r3, #0]
8003a36: b2da uxtb r2, r3
8003a38: 4b1c ldr r3, [pc, #112] @ (8003aac <m2ap+0x19c>)
8003a3a: 881b ldrh r3, [r3, #0]
8003a3c: b2db uxtb r3, r3
8003a3e: 210a movs r1, #10
8003a40: 9101 str r1, [sp, #4]
8003a42: 9300 str r3, [sp, #0]
8003a44: 2300 movs r3, #0
8003a46: 2101 movs r1, #1
8003a48: 2002 movs r0, #2
8003a4a: f001 f88d bl 8004b68 <ramp>
8003a4e: 4603 mov r3, r0
8003a50: 2b00 cmp r3, #0
8003a52: d114 bne.n 8003a7e <m2ap+0x16e>
m2st=motStop;
8003a54: 4b0e ldr r3, [pc, #56] @ (8003a90 <m2ap+0x180>)
8003a56: 2204 movs r2, #4
8003a58: 701a strb r2, [r3, #0]
}
break;
8003a5a: e010 b.n 8003a7e <m2ap+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
8003a5c: 2200 movs r2, #0
8003a5e: 2100 movs r1, #0
8003a60: 2002 movs r0, #2
8003a62: f000 ff01 bl 8004868 <SetMotPerc>
SetMotPerc(M2,BW,0);
8003a66: 2200 movs r2, #0
8003a68: 2101 movs r1, #1
8003a6a: 2002 movs r0, #2
8003a6c: f000 fefc bl 8004868 <SetMotPerc>
break;
8003a70: e006 b.n 8003a80 <m2ap+0x170>
break;
8003a72: bf00 nop
8003a74: e004 b.n 8003a80 <m2ap+0x170>
break;
8003a76: bf00 nop
8003a78: e002 b.n 8003a80 <m2ap+0x170>
break;
8003a7a: bf00 nop
8003a7c: e000 b.n 8003a80 <m2ap+0x170>
break;
8003a7e: bf00 nop
}
return m2st;
8003a80: 4b03 ldr r3, [pc, #12] @ (8003a90 <m2ap+0x180>)
8003a82: 781b ldrb r3, [r3, #0]
}
8003a84: 4618 mov r0, r3
8003a86: 3768 adds r7, #104 @ 0x68
8003a88: 46bd mov sp, r7
8003a8a: bd80 pop {r7, pc}
8003a8c: 20000008 .word 0x20000008
8003a90: 20000463 .word 0x20000463
8003a94: 0800f40c .word 0x0800f40c
8003a98: 200003a8 .word 0x200003a8
8003a9c: 200003fc .word 0x200003fc
8003aa0: 2000042c .word 0x2000042c
8003aa4: 2000044c .word 0x2000044c
8003aa8: 20000404 .word 0x20000404
8003aac: 20000418 .word 0x20000418
8003ab0: 2000042e .word 0x2000042e
08003ab4 <m3ap>:
motMov_st m3ap(void){
8003ab4: b580 push {r7, lr}
8003ab6: b09c sub sp, #112 @ 0x70
8003ab8: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
8003aba: 4b5d ldr r3, [pc, #372] @ (8003c30 <m3ap+0x17c>)
8003abc: 781a ldrb r2, [r3, #0]
8003abe: 4b5d ldr r3, [pc, #372] @ (8003c34 <m3ap+0x180>)
8003ac0: 781b ldrb r3, [r3, #0]
8003ac2: 429a cmp r2, r3
8003ac4: d017 beq.n 8003af6 <m3ap+0x42>
memm3st=m3st;
8003ac6: 4b5b ldr r3, [pc, #364] @ (8003c34 <m3ap+0x180>)
8003ac8: 781a ldrb r2, [r3, #0]
8003aca: 4b59 ldr r3, [pc, #356] @ (8003c30 <m3ap+0x17c>)
8003acc: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ap=%d",m3st);
8003ace: 4b59 ldr r3, [pc, #356] @ (8003c34 <m3ap+0x180>)
8003ad0: 781b ldrb r3, [r3, #0]
8003ad2: 461a mov r2, r3
8003ad4: 1d3b adds r3, r7, #4
8003ad6: 4958 ldr r1, [pc, #352] @ (8003c38 <m3ap+0x184>)
8003ad8: 4618 mov r0, r3
8003ada: f00a fce3 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003ade: 1d3b adds r3, r7, #4
8003ae0: 4618 mov r0, r3
8003ae2: f7fc fb33 bl 800014c <strlen>
8003ae6: 4603 mov r3, r0
8003ae8: b29a uxth r2, r3
8003aea: 1d39 adds r1, r7, #4
8003aec: f04f 33ff mov.w r3, #4294967295
8003af0: 4852 ldr r0, [pc, #328] @ (8003c3c <m3ap+0x188>)
8003af2: f005 fee7 bl 80098c4 <HAL_UART_Transmit>
}
if(rtCiclo<apM3start)m3st=motWaiting;
8003af6: 4b52 ldr r3, [pc, #328] @ (8003c40 <m3ap+0x18c>)
8003af8: 881b ldrh r3, [r3, #0]
8003afa: b29a uxth r2, r3
8003afc: 4b51 ldr r3, [pc, #324] @ (8003c44 <m3ap+0x190>)
8003afe: 881b ldrh r3, [r3, #0]
8003b00: 429a cmp r2, r3
8003b02: d202 bcs.n 8003b0a <m3ap+0x56>
8003b04: 4b4b ldr r3, [pc, #300] @ (8003c34 <m3ap+0x180>)
8003b06: 2200 movs r2, #0
8003b08: 701a strb r2, [r3, #0]
switch(m3st){
8003b0a: 4b4a ldr r3, [pc, #296] @ (8003c34 <m3ap+0x180>)
8003b0c: 781b ldrb r3, [r3, #0]
8003b0e: 2b03 cmp r3, #3
8003b10: d876 bhi.n 8003c00 <m3ap+0x14c>
8003b12: a201 add r2, pc, #4 @ (adr r2, 8003b18 <m3ap+0x64>)
8003b14: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003b18: 08003b29 .word 0x08003b29
8003b1c: 08003b75 .word 0x08003b75
8003b20: 08003ba5 .word 0x08003ba5
8003b24: 08003bd7 .word 0x08003bd7
case motWaiting:
SetMotPerc(M3,FW,0);
8003b28: 2200 movs r2, #0
8003b2a: 2100 movs r1, #0
8003b2c: 2003 movs r0, #3
8003b2e: f000 fe9b bl 8004868 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003b32: 2200 movs r2, #0
8003b34: 2101 movs r1, #1
8003b36: 2003 movs r0, #3
8003b38: f000 fe96 bl 8004868 <SetMotPerc>
if(rtCiclo>=apM3start){
8003b3c: 4b40 ldr r3, [pc, #256] @ (8003c40 <m3ap+0x18c>)
8003b3e: 881b ldrh r3, [r3, #0]
8003b40: b29a uxth r2, r3
8003b42: 4b40 ldr r3, [pc, #256] @ (8003c44 <m3ap+0x190>)
8003b44: 881b ldrh r3, [r3, #0]
8003b46: 429a cmp r2, r3
8003b48: d365 bcc.n 8003c16 <m3ap+0x162>
(void)ramp(M3,FW,mrampstart[M3-1],m2pwmap,tramp,RAMPINIT);
8003b4a: 4b3f ldr r3, [pc, #252] @ (8003c48 <m3ap+0x194>)
8003b4c: 889b ldrh r3, [r3, #4]
8003b4e: b2da uxtb r2, r3
8003b50: 4b3e ldr r3, [pc, #248] @ (8003c4c <m3ap+0x198>)
8003b52: 881b ldrh r3, [r3, #0]
8003b54: b2d9 uxtb r1, r3
8003b56: 4b3e ldr r3, [pc, #248] @ (8003c50 <m3ap+0x19c>)
8003b58: 881b ldrh r3, [r3, #0]
8003b5a: b2db uxtb r3, r3
8003b5c: 2000 movs r0, #0
8003b5e: 9001 str r0, [sp, #4]
8003b60: 9300 str r3, [sp, #0]
8003b62: 460b mov r3, r1
8003b64: 2100 movs r1, #0
8003b66: 2003 movs r0, #3
8003b68: f000 fffe bl 8004b68 <ramp>
m3st=motStartRamp;
8003b6c: 4b31 ldr r3, [pc, #196] @ (8003c34 <m3ap+0x180>)
8003b6e: 2201 movs r2, #1
8003b70: 701a strb r2, [r3, #0]
}
break;
8003b72: e050 b.n 8003c16 <m3ap+0x162>
case motStartRamp:
if(ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){
8003b74: 4b34 ldr r3, [pc, #208] @ (8003c48 <m3ap+0x194>)
8003b76: 889b ldrh r3, [r3, #4]
8003b78: b2da uxtb r2, r3
8003b7a: 4b36 ldr r3, [pc, #216] @ (8003c54 <m3ap+0x1a0>)
8003b7c: 881b ldrh r3, [r3, #0]
8003b7e: b2d9 uxtb r1, r3
8003b80: 4b33 ldr r3, [pc, #204] @ (8003c50 <m3ap+0x19c>)
8003b82: 881b ldrh r3, [r3, #0]
8003b84: b2db uxtb r3, r3
8003b86: 200a movs r0, #10
8003b88: 9001 str r0, [sp, #4]
8003b8a: 9300 str r3, [sp, #0]
8003b8c: 460b mov r3, r1
8003b8e: 2100 movs r1, #0
8003b90: 2003 movs r0, #3
8003b92: f000 ffe9 bl 8004b68 <ramp>
8003b96: 4603 mov r3, r0
8003b98: 2b00 cmp r3, #0
8003b9a: d13e bne.n 8003c1a <m3ap+0x166>
m3st=motWaitingTime;
8003b9c: 4b25 ldr r3, [pc, #148] @ (8003c34 <m3ap+0x180>)
8003b9e: 2202 movs r2, #2
8003ba0: 701a strb r2, [r3, #0]
}
break;
8003ba2: e03a b.n 8003c1a <m3ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM3stop){
8003ba4: 4b26 ldr r3, [pc, #152] @ (8003c40 <m3ap+0x18c>)
8003ba6: 881b ldrh r3, [r3, #0]
8003ba8: b29a uxth r2, r3
8003baa: 4b2b ldr r3, [pc, #172] @ (8003c58 <m3ap+0x1a4>)
8003bac: 881b ldrh r3, [r3, #0]
8003bae: 429a cmp r2, r3
8003bb0: d335 bcc.n 8003c1e <m3ap+0x16a>
(void)ramp(M3,FW,m3pwmap,0,tramp,RAMPINIT);
8003bb2: 4b28 ldr r3, [pc, #160] @ (8003c54 <m3ap+0x1a0>)
8003bb4: 881b ldrh r3, [r3, #0]
8003bb6: b2da uxtb r2, r3
8003bb8: 4b25 ldr r3, [pc, #148] @ (8003c50 <m3ap+0x19c>)
8003bba: 881b ldrh r3, [r3, #0]
8003bbc: b2db uxtb r3, r3
8003bbe: 2100 movs r1, #0
8003bc0: 9101 str r1, [sp, #4]
8003bc2: 9300 str r3, [sp, #0]
8003bc4: 2300 movs r3, #0
8003bc6: 2100 movs r1, #0
8003bc8: 2003 movs r0, #3
8003bca: f000 ffcd bl 8004b68 <ramp>
m3st=motStopRamp;
8003bce: 4b19 ldr r3, [pc, #100] @ (8003c34 <m3ap+0x180>)
8003bd0: 2203 movs r2, #3
8003bd2: 701a strb r2, [r3, #0]
}
break;
8003bd4: e023 b.n 8003c1e <m3ap+0x16a>
case motStopRamp:
if(ramp(M3,FW,m3pwmap,0,tramp,RAMPRUN)==DONE){
8003bd6: 4b1f ldr r3, [pc, #124] @ (8003c54 <m3ap+0x1a0>)
8003bd8: 881b ldrh r3, [r3, #0]
8003bda: b2da uxtb r2, r3
8003bdc: 4b1c ldr r3, [pc, #112] @ (8003c50 <m3ap+0x19c>)
8003bde: 881b ldrh r3, [r3, #0]
8003be0: b2db uxtb r3, r3
8003be2: 210a movs r1, #10
8003be4: 9101 str r1, [sp, #4]
8003be6: 9300 str r3, [sp, #0]
8003be8: 2300 movs r3, #0
8003bea: 2100 movs r1, #0
8003bec: 2003 movs r0, #3
8003bee: f000 ffbb bl 8004b68 <ramp>
8003bf2: 4603 mov r3, r0
8003bf4: 2b00 cmp r3, #0
8003bf6: d114 bne.n 8003c22 <m3ap+0x16e>
m3st=motStop;
8003bf8: 4b0e ldr r3, [pc, #56] @ (8003c34 <m3ap+0x180>)
8003bfa: 2204 movs r2, #4
8003bfc: 701a strb r2, [r3, #0]
}
break;
8003bfe: e010 b.n 8003c22 <m3ap+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8003c00: 2200 movs r2, #0
8003c02: 2100 movs r1, #0
8003c04: 2003 movs r0, #3
8003c06: f000 fe2f bl 8004868 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003c0a: 2200 movs r2, #0
8003c0c: 2101 movs r1, #1
8003c0e: 2003 movs r0, #3
8003c10: f000 fe2a bl 8004868 <SetMotPerc>
break;
8003c14: e006 b.n 8003c24 <m3ap+0x170>
break;
8003c16: bf00 nop
8003c18: e004 b.n 8003c24 <m3ap+0x170>
break;
8003c1a: bf00 nop
8003c1c: e002 b.n 8003c24 <m3ap+0x170>
break;
8003c1e: bf00 nop
8003c20: e000 b.n 8003c24 <m3ap+0x170>
break;
8003c22: bf00 nop
}
return m3st;
8003c24: 4b03 ldr r3, [pc, #12] @ (8003c34 <m3ap+0x180>)
8003c26: 781b ldrb r3, [r3, #0]
}
8003c28: 4618 mov r0, r3
8003c2a: 3768 adds r7, #104 @ 0x68
8003c2c: 46bd mov sp, r7
8003c2e: bd80 pop {r7, pc}
8003c30: 20000009 .word 0x20000009
8003c34: 20000464 .word 0x20000464
8003c38: 0800f418 .word 0x0800f418
8003c3c: 200003a8 .word 0x200003a8
8003c40: 200003fc .word 0x200003fc
8003c44: 20000430 .word 0x20000430
8003c48: 2000044c .word 0x2000044c
8003c4c: 20000404 .word 0x20000404
8003c50: 20000418 .word 0x20000418
8003c54: 20000408 .word 0x20000408
8003c58: 20000432 .word 0x20000432
08003c5c <m4ap>:
motMov_st m4ap(void){
8003c5c: b580 push {r7, lr}
8003c5e: b09c sub sp, #112 @ 0x70
8003c60: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
8003c62: 4b5d ldr r3, [pc, #372] @ (8003dd8 <m4ap+0x17c>)
8003c64: 781a ldrb r2, [r3, #0]
8003c66: 4b5d ldr r3, [pc, #372] @ (8003ddc <m4ap+0x180>)
8003c68: 781b ldrb r3, [r3, #0]
8003c6a: 429a cmp r2, r3
8003c6c: d017 beq.n 8003c9e <m4ap+0x42>
memm4st=m4st;
8003c6e: 4b5b ldr r3, [pc, #364] @ (8003ddc <m4ap+0x180>)
8003c70: 781a ldrb r2, [r3, #0]
8003c72: 4b59 ldr r3, [pc, #356] @ (8003dd8 <m4ap+0x17c>)
8003c74: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ap=%d",m4st);
8003c76: 4b59 ldr r3, [pc, #356] @ (8003ddc <m4ap+0x180>)
8003c78: 781b ldrb r3, [r3, #0]
8003c7a: 461a mov r2, r3
8003c7c: 1d3b adds r3, r7, #4
8003c7e: 4958 ldr r1, [pc, #352] @ (8003de0 <m4ap+0x184>)
8003c80: 4618 mov r0, r3
8003c82: f00a fc0f bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003c86: 1d3b adds r3, r7, #4
8003c88: 4618 mov r0, r3
8003c8a: f7fc fa5f bl 800014c <strlen>
8003c8e: 4603 mov r3, r0
8003c90: b29a uxth r2, r3
8003c92: 1d39 adds r1, r7, #4
8003c94: f04f 33ff mov.w r3, #4294967295
8003c98: 4852 ldr r0, [pc, #328] @ (8003de4 <m4ap+0x188>)
8003c9a: f005 fe13 bl 80098c4 <HAL_UART_Transmit>
}
if(rtCiclo<apM4start)m4st=motWaiting;
8003c9e: 4b52 ldr r3, [pc, #328] @ (8003de8 <m4ap+0x18c>)
8003ca0: 881b ldrh r3, [r3, #0]
8003ca2: b29a uxth r2, r3
8003ca4: 4b51 ldr r3, [pc, #324] @ (8003dec <m4ap+0x190>)
8003ca6: 881b ldrh r3, [r3, #0]
8003ca8: 429a cmp r2, r3
8003caa: d202 bcs.n 8003cb2 <m4ap+0x56>
8003cac: 4b4b ldr r3, [pc, #300] @ (8003ddc <m4ap+0x180>)
8003cae: 2200 movs r2, #0
8003cb0: 701a strb r2, [r3, #0]
switch(m4st){
8003cb2: 4b4a ldr r3, [pc, #296] @ (8003ddc <m4ap+0x180>)
8003cb4: 781b ldrb r3, [r3, #0]
8003cb6: 2b03 cmp r3, #3
8003cb8: d876 bhi.n 8003da8 <m4ap+0x14c>
8003cba: a201 add r2, pc, #4 @ (adr r2, 8003cc0 <m4ap+0x64>)
8003cbc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003cc0: 08003cd1 .word 0x08003cd1
8003cc4: 08003d1d .word 0x08003d1d
8003cc8: 08003d4d .word 0x08003d4d
8003ccc: 08003d7f .word 0x08003d7f
case motWaiting:
SetMotPerc(M4,FW,0);
8003cd0: 2200 movs r2, #0
8003cd2: 2100 movs r1, #0
8003cd4: 2004 movs r0, #4
8003cd6: f000 fdc7 bl 8004868 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003cda: 2200 movs r2, #0
8003cdc: 2101 movs r1, #1
8003cde: 2004 movs r0, #4
8003ce0: f000 fdc2 bl 8004868 <SetMotPerc>
if(rtCiclo>=apM4start){
8003ce4: 4b40 ldr r3, [pc, #256] @ (8003de8 <m4ap+0x18c>)
8003ce6: 881b ldrh r3, [r3, #0]
8003ce8: b29a uxth r2, r3
8003cea: 4b40 ldr r3, [pc, #256] @ (8003dec <m4ap+0x190>)
8003cec: 881b ldrh r3, [r3, #0]
8003cee: 429a cmp r2, r3
8003cf0: d365 bcc.n 8003dbe <m4ap+0x162>
(void)ramp(M4,FW,mrampstart[M4-1],m2pwmap,tramp,RAMPINIT);
8003cf2: 4b3f ldr r3, [pc, #252] @ (8003df0 <m4ap+0x194>)
8003cf4: 88db ldrh r3, [r3, #6]
8003cf6: b2da uxtb r2, r3
8003cf8: 4b3e ldr r3, [pc, #248] @ (8003df4 <m4ap+0x198>)
8003cfa: 881b ldrh r3, [r3, #0]
8003cfc: b2d9 uxtb r1, r3
8003cfe: 4b3e ldr r3, [pc, #248] @ (8003df8 <m4ap+0x19c>)
8003d00: 881b ldrh r3, [r3, #0]
8003d02: b2db uxtb r3, r3
8003d04: 2000 movs r0, #0
8003d06: 9001 str r0, [sp, #4]
8003d08: 9300 str r3, [sp, #0]
8003d0a: 460b mov r3, r1
8003d0c: 2100 movs r1, #0
8003d0e: 2004 movs r0, #4
8003d10: f000 ff2a bl 8004b68 <ramp>
m4st=motStartRamp;
8003d14: 4b31 ldr r3, [pc, #196] @ (8003ddc <m4ap+0x180>)
8003d16: 2201 movs r2, #1
8003d18: 701a strb r2, [r3, #0]
}
break;
8003d1a: e050 b.n 8003dbe <m4ap+0x162>
case motStartRamp:
if(ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){
8003d1c: 4b34 ldr r3, [pc, #208] @ (8003df0 <m4ap+0x194>)
8003d1e: 88db ldrh r3, [r3, #6]
8003d20: b2da uxtb r2, r3
8003d22: 4b36 ldr r3, [pc, #216] @ (8003dfc <m4ap+0x1a0>)
8003d24: 881b ldrh r3, [r3, #0]
8003d26: b2d9 uxtb r1, r3
8003d28: 4b33 ldr r3, [pc, #204] @ (8003df8 <m4ap+0x19c>)
8003d2a: 881b ldrh r3, [r3, #0]
8003d2c: b2db uxtb r3, r3
8003d2e: 200a movs r0, #10
8003d30: 9001 str r0, [sp, #4]
8003d32: 9300 str r3, [sp, #0]
8003d34: 460b mov r3, r1
8003d36: 2100 movs r1, #0
8003d38: 2004 movs r0, #4
8003d3a: f000 ff15 bl 8004b68 <ramp>
8003d3e: 4603 mov r3, r0
8003d40: 2b00 cmp r3, #0
8003d42: d13e bne.n 8003dc2 <m4ap+0x166>
m4st=motWaitingTime;
8003d44: 4b25 ldr r3, [pc, #148] @ (8003ddc <m4ap+0x180>)
8003d46: 2202 movs r2, #2
8003d48: 701a strb r2, [r3, #0]
}
break;
8003d4a: e03a b.n 8003dc2 <m4ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM4stop){
8003d4c: 4b26 ldr r3, [pc, #152] @ (8003de8 <m4ap+0x18c>)
8003d4e: 881b ldrh r3, [r3, #0]
8003d50: b29a uxth r2, r3
8003d52: 4b2b ldr r3, [pc, #172] @ (8003e00 <m4ap+0x1a4>)
8003d54: 881b ldrh r3, [r3, #0]
8003d56: 429a cmp r2, r3
8003d58: d335 bcc.n 8003dc6 <m4ap+0x16a>
(void)ramp(M4,FW,m4pwmap,0,tramp,RAMPINIT);
8003d5a: 4b28 ldr r3, [pc, #160] @ (8003dfc <m4ap+0x1a0>)
8003d5c: 881b ldrh r3, [r3, #0]
8003d5e: b2da uxtb r2, r3
8003d60: 4b25 ldr r3, [pc, #148] @ (8003df8 <m4ap+0x19c>)
8003d62: 881b ldrh r3, [r3, #0]
8003d64: b2db uxtb r3, r3
8003d66: 2100 movs r1, #0
8003d68: 9101 str r1, [sp, #4]
8003d6a: 9300 str r3, [sp, #0]
8003d6c: 2300 movs r3, #0
8003d6e: 2100 movs r1, #0
8003d70: 2004 movs r0, #4
8003d72: f000 fef9 bl 8004b68 <ramp>
m4st=motStopRamp;
8003d76: 4b19 ldr r3, [pc, #100] @ (8003ddc <m4ap+0x180>)
8003d78: 2203 movs r2, #3
8003d7a: 701a strb r2, [r3, #0]
}
break;
8003d7c: e023 b.n 8003dc6 <m4ap+0x16a>
case motStopRamp:
if(ramp(M4,FW,m4pwmap,0,tramp,RAMPRUN)==DONE){
8003d7e: 4b1f ldr r3, [pc, #124] @ (8003dfc <m4ap+0x1a0>)
8003d80: 881b ldrh r3, [r3, #0]
8003d82: b2da uxtb r2, r3
8003d84: 4b1c ldr r3, [pc, #112] @ (8003df8 <m4ap+0x19c>)
8003d86: 881b ldrh r3, [r3, #0]
8003d88: b2db uxtb r3, r3
8003d8a: 210a movs r1, #10
8003d8c: 9101 str r1, [sp, #4]
8003d8e: 9300 str r3, [sp, #0]
8003d90: 2300 movs r3, #0
8003d92: 2100 movs r1, #0
8003d94: 2004 movs r0, #4
8003d96: f000 fee7 bl 8004b68 <ramp>
8003d9a: 4603 mov r3, r0
8003d9c: 2b00 cmp r3, #0
8003d9e: d114 bne.n 8003dca <m4ap+0x16e>
m4st=motStop;
8003da0: 4b0e ldr r3, [pc, #56] @ (8003ddc <m4ap+0x180>)
8003da2: 2204 movs r2, #4
8003da4: 701a strb r2, [r3, #0]
}
break;
8003da6: e010 b.n 8003dca <m4ap+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8003da8: 2200 movs r2, #0
8003daa: 2100 movs r1, #0
8003dac: 2004 movs r0, #4
8003dae: f000 fd5b bl 8004868 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003db2: 2200 movs r2, #0
8003db4: 2101 movs r1, #1
8003db6: 2004 movs r0, #4
8003db8: f000 fd56 bl 8004868 <SetMotPerc>
break;
8003dbc: e006 b.n 8003dcc <m4ap+0x170>
break;
8003dbe: bf00 nop
8003dc0: e004 b.n 8003dcc <m4ap+0x170>
break;
8003dc2: bf00 nop
8003dc4: e002 b.n 8003dcc <m4ap+0x170>
break;
8003dc6: bf00 nop
8003dc8: e000 b.n 8003dcc <m4ap+0x170>
break;
8003dca: bf00 nop
}
return m4st;
8003dcc: 4b03 ldr r3, [pc, #12] @ (8003ddc <m4ap+0x180>)
8003dce: 781b ldrb r3, [r3, #0]
}
8003dd0: 4618 mov r0, r3
8003dd2: 3768 adds r7, #104 @ 0x68
8003dd4: 46bd mov sp, r7
8003dd6: bd80 pop {r7, pc}
8003dd8: 2000000a .word 0x2000000a
8003ddc: 20000465 .word 0x20000465
8003de0: 0800f424 .word 0x0800f424
8003de4: 200003a8 .word 0x200003a8
8003de8: 200003fc .word 0x200003fc
8003dec: 20000434 .word 0x20000434
8003df0: 2000044c .word 0x2000044c
8003df4: 20000404 .word 0x20000404
8003df8: 20000418 .word 0x20000418
8003dfc: 2000040c .word 0x2000040c
8003e00: 20000436 .word 0x20000436
08003e04 <m1ch>:
motMov_st m1ch(void){
8003e04: b580 push {r7, lr}
8003e06: b09c sub sp, #112 @ 0x70
8003e08: af02 add r7, sp, #8
static motMov_st m1st;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
8003e0a: 4b5d ldr r3, [pc, #372] @ (8003f80 <m1ch+0x17c>)
8003e0c: 781a ldrb r2, [r3, #0]
8003e0e: 4b5d ldr r3, [pc, #372] @ (8003f84 <m1ch+0x180>)
8003e10: 781b ldrb r3, [r3, #0]
8003e12: 429a cmp r2, r3
8003e14: d017 beq.n 8003e46 <m1ch+0x42>
memm1st=m1st;
8003e16: 4b5b ldr r3, [pc, #364] @ (8003f84 <m1ch+0x180>)
8003e18: 781a ldrb r2, [r3, #0]
8003e1a: 4b59 ldr r3, [pc, #356] @ (8003f80 <m1ch+0x17c>)
8003e1c: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ch=%d",m1st);
8003e1e: 4b59 ldr r3, [pc, #356] @ (8003f84 <m1ch+0x180>)
8003e20: 781b ldrb r3, [r3, #0]
8003e22: 461a mov r2, r3
8003e24: 1d3b adds r3, r7, #4
8003e26: 4958 ldr r1, [pc, #352] @ (8003f88 <m1ch+0x184>)
8003e28: 4618 mov r0, r3
8003e2a: f00a fb3b bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003e2e: 1d3b adds r3, r7, #4
8003e30: 4618 mov r0, r3
8003e32: f7fc f98b bl 800014c <strlen>
8003e36: 4603 mov r3, r0
8003e38: b29a uxth r2, r3
8003e3a: 1d39 adds r1, r7, #4
8003e3c: f04f 33ff mov.w r3, #4294967295
8003e40: 4852 ldr r0, [pc, #328] @ (8003f8c <m1ch+0x188>)
8003e42: f005 fd3f bl 80098c4 <HAL_UART_Transmit>
}
if(rtCiclo<chM1start)m1st=motWaiting;
8003e46: 4b52 ldr r3, [pc, #328] @ (8003f90 <m1ch+0x18c>)
8003e48: 881b ldrh r3, [r3, #0]
8003e4a: b29a uxth r2, r3
8003e4c: 4b51 ldr r3, [pc, #324] @ (8003f94 <m1ch+0x190>)
8003e4e: 881b ldrh r3, [r3, #0]
8003e50: 429a cmp r2, r3
8003e52: d202 bcs.n 8003e5a <m1ch+0x56>
8003e54: 4b4b ldr r3, [pc, #300] @ (8003f84 <m1ch+0x180>)
8003e56: 2200 movs r2, #0
8003e58: 701a strb r2, [r3, #0]
switch(m1st){
8003e5a: 4b4a ldr r3, [pc, #296] @ (8003f84 <m1ch+0x180>)
8003e5c: 781b ldrb r3, [r3, #0]
8003e5e: 2b03 cmp r3, #3
8003e60: d876 bhi.n 8003f50 <m1ch+0x14c>
8003e62: a201 add r2, pc, #4 @ (adr r2, 8003e68 <m1ch+0x64>)
8003e64: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003e68: 08003e79 .word 0x08003e79
8003e6c: 08003ec5 .word 0x08003ec5
8003e70: 08003ef5 .word 0x08003ef5
8003e74: 08003f27 .word 0x08003f27
case motWaiting:
SetMotPerc(M1,FW,0);
8003e78: 2200 movs r2, #0
8003e7a: 2100 movs r1, #0
8003e7c: 2001 movs r0, #1
8003e7e: f000 fcf3 bl 8004868 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003e82: 2200 movs r2, #0
8003e84: 2101 movs r1, #1
8003e86: 2001 movs r0, #1
8003e88: f000 fcee bl 8004868 <SetMotPerc>
if(rtCiclo>=chM1start){
8003e8c: 4b40 ldr r3, [pc, #256] @ (8003f90 <m1ch+0x18c>)
8003e8e: 881b ldrh r3, [r3, #0]
8003e90: b29a uxth r2, r3
8003e92: 4b40 ldr r3, [pc, #256] @ (8003f94 <m1ch+0x190>)
8003e94: 881b ldrh r3, [r3, #0]
8003e96: 429a cmp r2, r3
8003e98: d365 bcc.n 8003f66 <m1ch+0x162>
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
8003e9a: 4b3f ldr r3, [pc, #252] @ (8003f98 <m1ch+0x194>)
8003e9c: 881b ldrh r3, [r3, #0]
8003e9e: b2da uxtb r2, r3
8003ea0: 4b3e ldr r3, [pc, #248] @ (8003f9c <m1ch+0x198>)
8003ea2: 881b ldrh r3, [r3, #0]
8003ea4: b2d9 uxtb r1, r3
8003ea6: 4b3e ldr r3, [pc, #248] @ (8003fa0 <m1ch+0x19c>)
8003ea8: 881b ldrh r3, [r3, #0]
8003eaa: b2db uxtb r3, r3
8003eac: 2000 movs r0, #0
8003eae: 9001 str r0, [sp, #4]
8003eb0: 9300 str r3, [sp, #0]
8003eb2: 460b mov r3, r1
8003eb4: 2101 movs r1, #1
8003eb6: 2001 movs r0, #1
8003eb8: f000 fe56 bl 8004b68 <ramp>
m1st=motStartRamp;
8003ebc: 4b31 ldr r3, [pc, #196] @ (8003f84 <m1ch+0x180>)
8003ebe: 2201 movs r2, #1
8003ec0: 701a strb r2, [r3, #0]
}
break;
8003ec2: e050 b.n 8003f66 <m1ch+0x162>
case motStartRamp:
if(ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){
8003ec4: 4b34 ldr r3, [pc, #208] @ (8003f98 <m1ch+0x194>)
8003ec6: 881b ldrh r3, [r3, #0]
8003ec8: b2da uxtb r2, r3
8003eca: 4b34 ldr r3, [pc, #208] @ (8003f9c <m1ch+0x198>)
8003ecc: 881b ldrh r3, [r3, #0]
8003ece: b2d9 uxtb r1, r3
8003ed0: 4b33 ldr r3, [pc, #204] @ (8003fa0 <m1ch+0x19c>)
8003ed2: 881b ldrh r3, [r3, #0]
8003ed4: b2db uxtb r3, r3
8003ed6: 200a movs r0, #10
8003ed8: 9001 str r0, [sp, #4]
8003eda: 9300 str r3, [sp, #0]
8003edc: 460b mov r3, r1
8003ede: 2101 movs r1, #1
8003ee0: 2001 movs r0, #1
8003ee2: f000 fe41 bl 8004b68 <ramp>
8003ee6: 4603 mov r3, r0
8003ee8: 2b00 cmp r3, #0
8003eea: d13e bne.n 8003f6a <m1ch+0x166>
m1st=motWaitingTime;
8003eec: 4b25 ldr r3, [pc, #148] @ (8003f84 <m1ch+0x180>)
8003eee: 2202 movs r2, #2
8003ef0: 701a strb r2, [r3, #0]
}
break;
8003ef2: e03a b.n 8003f6a <m1ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM1stop){
8003ef4: 4b26 ldr r3, [pc, #152] @ (8003f90 <m1ch+0x18c>)
8003ef6: 881b ldrh r3, [r3, #0]
8003ef8: b29a uxth r2, r3
8003efa: 4b2a ldr r3, [pc, #168] @ (8003fa4 <m1ch+0x1a0>)
8003efc: 881b ldrh r3, [r3, #0]
8003efe: 429a cmp r2, r3
8003f00: d335 bcc.n 8003f6e <m1ch+0x16a>
(void)ramp(M1,BW,m1pwmch,0,tramp,RAMPINIT);
8003f02: 4b26 ldr r3, [pc, #152] @ (8003f9c <m1ch+0x198>)
8003f04: 881b ldrh r3, [r3, #0]
8003f06: b2da uxtb r2, r3
8003f08: 4b25 ldr r3, [pc, #148] @ (8003fa0 <m1ch+0x19c>)
8003f0a: 881b ldrh r3, [r3, #0]
8003f0c: b2db uxtb r3, r3
8003f0e: 2100 movs r1, #0
8003f10: 9101 str r1, [sp, #4]
8003f12: 9300 str r3, [sp, #0]
8003f14: 2300 movs r3, #0
8003f16: 2101 movs r1, #1
8003f18: 2001 movs r0, #1
8003f1a: f000 fe25 bl 8004b68 <ramp>
m1st=motStopRamp;
8003f1e: 4b19 ldr r3, [pc, #100] @ (8003f84 <m1ch+0x180>)
8003f20: 2203 movs r2, #3
8003f22: 701a strb r2, [r3, #0]
}
break;
8003f24: e023 b.n 8003f6e <m1ch+0x16a>
case motStopRamp:
if(ramp(M1,BW,m1pwmch,0,tramp,RAMPRUN)==DONE){
8003f26: 4b1d ldr r3, [pc, #116] @ (8003f9c <m1ch+0x198>)
8003f28: 881b ldrh r3, [r3, #0]
8003f2a: b2da uxtb r2, r3
8003f2c: 4b1c ldr r3, [pc, #112] @ (8003fa0 <m1ch+0x19c>)
8003f2e: 881b ldrh r3, [r3, #0]
8003f30: b2db uxtb r3, r3
8003f32: 210a movs r1, #10
8003f34: 9101 str r1, [sp, #4]
8003f36: 9300 str r3, [sp, #0]
8003f38: 2300 movs r3, #0
8003f3a: 2101 movs r1, #1
8003f3c: 2001 movs r0, #1
8003f3e: f000 fe13 bl 8004b68 <ramp>
8003f42: 4603 mov r3, r0
8003f44: 2b00 cmp r3, #0
8003f46: d114 bne.n 8003f72 <m1ch+0x16e>
m1st=motStop;
8003f48: 4b0e ldr r3, [pc, #56] @ (8003f84 <m1ch+0x180>)
8003f4a: 2204 movs r2, #4
8003f4c: 701a strb r2, [r3, #0]
}
break;
8003f4e: e010 b.n 8003f72 <m1ch+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
8003f50: 2200 movs r2, #0
8003f52: 2100 movs r1, #0
8003f54: 2001 movs r0, #1
8003f56: f000 fc87 bl 8004868 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003f5a: 2200 movs r2, #0
8003f5c: 2101 movs r1, #1
8003f5e: 2001 movs r0, #1
8003f60: f000 fc82 bl 8004868 <SetMotPerc>
break;
8003f64: e006 b.n 8003f74 <m1ch+0x170>
break;
8003f66: bf00 nop
8003f68: e004 b.n 8003f74 <m1ch+0x170>
break;
8003f6a: bf00 nop
8003f6c: e002 b.n 8003f74 <m1ch+0x170>
break;
8003f6e: bf00 nop
8003f70: e000 b.n 8003f74 <m1ch+0x170>
break;
8003f72: bf00 nop
}
return m1st;
8003f74: 4b03 ldr r3, [pc, #12] @ (8003f84 <m1ch+0x180>)
8003f76: 781b ldrb r3, [r3, #0]
}
8003f78: 4618 mov r0, r3
8003f7a: 3768 adds r7, #104 @ 0x68
8003f7c: 46bd mov sp, r7
8003f7e: bd80 pop {r7, pc}
8003f80: 2000000b .word 0x2000000b
8003f84: 20000466 .word 0x20000466
8003f88: 0800f430 .word 0x0800f430
8003f8c: 200003a8 .word 0x200003a8
8003f90: 200003fc .word 0x200003fc
8003f94: 20000438 .word 0x20000438
8003f98: 2000044c .word 0x2000044c
8003f9c: 20000402 .word 0x20000402
8003fa0: 20000418 .word 0x20000418
8003fa4: 2000043a .word 0x2000043a
08003fa8 <m2ch>:
motMov_st m2ch(void){
8003fa8: b580 push {r7, lr}
8003faa: b09c sub sp, #112 @ 0x70
8003fac: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
8003fae: 4b5d ldr r3, [pc, #372] @ (8004124 <m2ch+0x17c>)
8003fb0: 781a ldrb r2, [r3, #0]
8003fb2: 4b5d ldr r3, [pc, #372] @ (8004128 <m2ch+0x180>)
8003fb4: 781b ldrb r3, [r3, #0]
8003fb6: 429a cmp r2, r3
8003fb8: d017 beq.n 8003fea <m2ch+0x42>
memm2st=m2st;
8003fba: 4b5b ldr r3, [pc, #364] @ (8004128 <m2ch+0x180>)
8003fbc: 781a ldrb r2, [r3, #0]
8003fbe: 4b59 ldr r3, [pc, #356] @ (8004124 <m2ch+0x17c>)
8003fc0: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ch=%d",m2st);
8003fc2: 4b59 ldr r3, [pc, #356] @ (8004128 <m2ch+0x180>)
8003fc4: 781b ldrb r3, [r3, #0]
8003fc6: 461a mov r2, r3
8003fc8: 1d3b adds r3, r7, #4
8003fca: 4958 ldr r1, [pc, #352] @ (800412c <m2ch+0x184>)
8003fcc: 4618 mov r0, r3
8003fce: f00a fa69 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003fd2: 1d3b adds r3, r7, #4
8003fd4: 4618 mov r0, r3
8003fd6: f7fc f8b9 bl 800014c <strlen>
8003fda: 4603 mov r3, r0
8003fdc: b29a uxth r2, r3
8003fde: 1d39 adds r1, r7, #4
8003fe0: f04f 33ff mov.w r3, #4294967295
8003fe4: 4852 ldr r0, [pc, #328] @ (8004130 <m2ch+0x188>)
8003fe6: f005 fc6d bl 80098c4 <HAL_UART_Transmit>
}
if(rtCiclo<chM2start)m2st=motWaiting;
8003fea: 4b52 ldr r3, [pc, #328] @ (8004134 <m2ch+0x18c>)
8003fec: 881b ldrh r3, [r3, #0]
8003fee: b29a uxth r2, r3
8003ff0: 4b51 ldr r3, [pc, #324] @ (8004138 <m2ch+0x190>)
8003ff2: 881b ldrh r3, [r3, #0]
8003ff4: 429a cmp r2, r3
8003ff6: d202 bcs.n 8003ffe <m2ch+0x56>
8003ff8: 4b4b ldr r3, [pc, #300] @ (8004128 <m2ch+0x180>)
8003ffa: 2200 movs r2, #0
8003ffc: 701a strb r2, [r3, #0]
switch(m2st){
8003ffe: 4b4a ldr r3, [pc, #296] @ (8004128 <m2ch+0x180>)
8004000: 781b ldrb r3, [r3, #0]
8004002: 2b03 cmp r3, #3
8004004: d876 bhi.n 80040f4 <m2ch+0x14c>
8004006: a201 add r2, pc, #4 @ (adr r2, 800400c <m2ch+0x64>)
8004008: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800400c: 0800401d .word 0x0800401d
8004010: 08004069 .word 0x08004069
8004014: 08004099 .word 0x08004099
8004018: 080040cb .word 0x080040cb
case motWaiting:
SetMotPerc(M2,FW,0);
800401c: 2200 movs r2, #0
800401e: 2100 movs r1, #0
8004020: 2002 movs r0, #2
8004022: f000 fc21 bl 8004868 <SetMotPerc>
SetMotPerc(M2,BW,0);
8004026: 2200 movs r2, #0
8004028: 2101 movs r1, #1
800402a: 2002 movs r0, #2
800402c: f000 fc1c bl 8004868 <SetMotPerc>
if(rtCiclo>=chM2start){
8004030: 4b40 ldr r3, [pc, #256] @ (8004134 <m2ch+0x18c>)
8004032: 881b ldrh r3, [r3, #0]
8004034: b29a uxth r2, r3
8004036: 4b40 ldr r3, [pc, #256] @ (8004138 <m2ch+0x190>)
8004038: 881b ldrh r3, [r3, #0]
800403a: 429a cmp r2, r3
800403c: d365 bcc.n 800410a <m2ch+0x162>
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT);
800403e: 4b3f ldr r3, [pc, #252] @ (800413c <m2ch+0x194>)
8004040: 885b ldrh r3, [r3, #2]
8004042: b2da uxtb r2, r3
8004044: 4b3e ldr r3, [pc, #248] @ (8004140 <m2ch+0x198>)
8004046: 881b ldrh r3, [r3, #0]
8004048: b2d9 uxtb r1, r3
800404a: 4b3e ldr r3, [pc, #248] @ (8004144 <m2ch+0x19c>)
800404c: 881b ldrh r3, [r3, #0]
800404e: b2db uxtb r3, r3
8004050: 2000 movs r0, #0
8004052: 9001 str r0, [sp, #4]
8004054: 9300 str r3, [sp, #0]
8004056: 460b mov r3, r1
8004058: 2100 movs r1, #0
800405a: 2002 movs r0, #2
800405c: f000 fd84 bl 8004b68 <ramp>
m2st=motStartRamp;
8004060: 4b31 ldr r3, [pc, #196] @ (8004128 <m2ch+0x180>)
8004062: 2201 movs r2, #1
8004064: 701a strb r2, [r3, #0]
}
break;
8004066: e050 b.n 800410a <m2ch+0x162>
case motStartRamp:
if(ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE){
8004068: 4b34 ldr r3, [pc, #208] @ (800413c <m2ch+0x194>)
800406a: 885b ldrh r3, [r3, #2]
800406c: b2da uxtb r2, r3
800406e: 4b34 ldr r3, [pc, #208] @ (8004140 <m2ch+0x198>)
8004070: 881b ldrh r3, [r3, #0]
8004072: b2d9 uxtb r1, r3
8004074: 4b33 ldr r3, [pc, #204] @ (8004144 <m2ch+0x19c>)
8004076: 881b ldrh r3, [r3, #0]
8004078: b2db uxtb r3, r3
800407a: 200a movs r0, #10
800407c: 9001 str r0, [sp, #4]
800407e: 9300 str r3, [sp, #0]
8004080: 460b mov r3, r1
8004082: 2100 movs r1, #0
8004084: 2002 movs r0, #2
8004086: f000 fd6f bl 8004b68 <ramp>
800408a: 4603 mov r3, r0
800408c: 2b00 cmp r3, #0
800408e: d13e bne.n 800410e <m2ch+0x166>
m2st=motWaitingTime;
8004090: 4b25 ldr r3, [pc, #148] @ (8004128 <m2ch+0x180>)
8004092: 2202 movs r2, #2
8004094: 701a strb r2, [r3, #0]
}
break;
8004096: e03a b.n 800410e <m2ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM2stop){
8004098: 4b26 ldr r3, [pc, #152] @ (8004134 <m2ch+0x18c>)
800409a: 881b ldrh r3, [r3, #0]
800409c: b29a uxth r2, r3
800409e: 4b2a ldr r3, [pc, #168] @ (8004148 <m2ch+0x1a0>)
80040a0: 881b ldrh r3, [r3, #0]
80040a2: 429a cmp r2, r3
80040a4: d335 bcc.n 8004112 <m2ch+0x16a>
(void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT);
80040a6: 4b26 ldr r3, [pc, #152] @ (8004140 <m2ch+0x198>)
80040a8: 881b ldrh r3, [r3, #0]
80040aa: b2da uxtb r2, r3
80040ac: 4b25 ldr r3, [pc, #148] @ (8004144 <m2ch+0x19c>)
80040ae: 881b ldrh r3, [r3, #0]
80040b0: b2db uxtb r3, r3
80040b2: 2100 movs r1, #0
80040b4: 9101 str r1, [sp, #4]
80040b6: 9300 str r3, [sp, #0]
80040b8: 2300 movs r3, #0
80040ba: 2100 movs r1, #0
80040bc: 2002 movs r0, #2
80040be: f000 fd53 bl 8004b68 <ramp>
m2st=motStopRamp;
80040c2: 4b19 ldr r3, [pc, #100] @ (8004128 <m2ch+0x180>)
80040c4: 2203 movs r2, #3
80040c6: 701a strb r2, [r3, #0]
}
break;
80040c8: e023 b.n 8004112 <m2ch+0x16a>
case motStopRamp:
if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){
80040ca: 4b1d ldr r3, [pc, #116] @ (8004140 <m2ch+0x198>)
80040cc: 881b ldrh r3, [r3, #0]
80040ce: b2da uxtb r2, r3
80040d0: 4b1c ldr r3, [pc, #112] @ (8004144 <m2ch+0x19c>)
80040d2: 881b ldrh r3, [r3, #0]
80040d4: b2db uxtb r3, r3
80040d6: 210a movs r1, #10
80040d8: 9101 str r1, [sp, #4]
80040da: 9300 str r3, [sp, #0]
80040dc: 2300 movs r3, #0
80040de: 2100 movs r1, #0
80040e0: 2002 movs r0, #2
80040e2: f000 fd41 bl 8004b68 <ramp>
80040e6: 4603 mov r3, r0
80040e8: 2b00 cmp r3, #0
80040ea: d114 bne.n 8004116 <m2ch+0x16e>
m2st=motStop;
80040ec: 4b0e ldr r3, [pc, #56] @ (8004128 <m2ch+0x180>)
80040ee: 2204 movs r2, #4
80040f0: 701a strb r2, [r3, #0]
}
break;
80040f2: e010 b.n 8004116 <m2ch+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
80040f4: 2200 movs r2, #0
80040f6: 2100 movs r1, #0
80040f8: 2002 movs r0, #2
80040fa: f000 fbb5 bl 8004868 <SetMotPerc>
SetMotPerc(M2,BW,0);
80040fe: 2200 movs r2, #0
8004100: 2101 movs r1, #1
8004102: 2002 movs r0, #2
8004104: f000 fbb0 bl 8004868 <SetMotPerc>
break;
8004108: e006 b.n 8004118 <m2ch+0x170>
break;
800410a: bf00 nop
800410c: e004 b.n 8004118 <m2ch+0x170>
break;
800410e: bf00 nop
8004110: e002 b.n 8004118 <m2ch+0x170>
break;
8004112: bf00 nop
8004114: e000 b.n 8004118 <m2ch+0x170>
break;
8004116: bf00 nop
}
return m2st;
8004118: 4b03 ldr r3, [pc, #12] @ (8004128 <m2ch+0x180>)
800411a: 781b ldrb r3, [r3, #0]
}
800411c: 4618 mov r0, r3
800411e: 3768 adds r7, #104 @ 0x68
8004120: 46bd mov sp, r7
8004122: bd80 pop {r7, pc}
8004124: 2000000c .word 0x2000000c
8004128: 20000467 .word 0x20000467
800412c: 0800f43c .word 0x0800f43c
8004130: 200003a8 .word 0x200003a8
8004134: 200003fc .word 0x200003fc
8004138: 2000043c .word 0x2000043c
800413c: 2000044c .word 0x2000044c
8004140: 20000406 .word 0x20000406
8004144: 20000418 .word 0x20000418
8004148: 2000043e .word 0x2000043e
0800414c <m3ch>:
motMov_st m3ch(void){
800414c: b580 push {r7, lr}
800414e: b09c sub sp, #112 @ 0x70
8004150: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
8004152: 4b5d ldr r3, [pc, #372] @ (80042c8 <m3ch+0x17c>)
8004154: 781a ldrb r2, [r3, #0]
8004156: 4b5d ldr r3, [pc, #372] @ (80042cc <m3ch+0x180>)
8004158: 781b ldrb r3, [r3, #0]
800415a: 429a cmp r2, r3
800415c: d017 beq.n 800418e <m3ch+0x42>
memm3st=m3st;
800415e: 4b5b ldr r3, [pc, #364] @ (80042cc <m3ch+0x180>)
8004160: 781a ldrb r2, [r3, #0]
8004162: 4b59 ldr r3, [pc, #356] @ (80042c8 <m3ch+0x17c>)
8004164: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ch=%d",m3st);
8004166: 4b59 ldr r3, [pc, #356] @ (80042cc <m3ch+0x180>)
8004168: 781b ldrb r3, [r3, #0]
800416a: 461a mov r2, r3
800416c: 1d3b adds r3, r7, #4
800416e: 4958 ldr r1, [pc, #352] @ (80042d0 <m3ch+0x184>)
8004170: 4618 mov r0, r3
8004172: f00a f997 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8004176: 1d3b adds r3, r7, #4
8004178: 4618 mov r0, r3
800417a: f7fb ffe7 bl 800014c <strlen>
800417e: 4603 mov r3, r0
8004180: b29a uxth r2, r3
8004182: 1d39 adds r1, r7, #4
8004184: f04f 33ff mov.w r3, #4294967295
8004188: 4852 ldr r0, [pc, #328] @ (80042d4 <m3ch+0x188>)
800418a: f005 fb9b bl 80098c4 <HAL_UART_Transmit>
}
if(rtCiclo<chM3start)m3st=motWaiting;
800418e: 4b52 ldr r3, [pc, #328] @ (80042d8 <m3ch+0x18c>)
8004190: 881b ldrh r3, [r3, #0]
8004192: b29a uxth r2, r3
8004194: 4b51 ldr r3, [pc, #324] @ (80042dc <m3ch+0x190>)
8004196: 881b ldrh r3, [r3, #0]
8004198: 429a cmp r2, r3
800419a: d202 bcs.n 80041a2 <m3ch+0x56>
800419c: 4b4b ldr r3, [pc, #300] @ (80042cc <m3ch+0x180>)
800419e: 2200 movs r2, #0
80041a0: 701a strb r2, [r3, #0]
switch(m3st){
80041a2: 4b4a ldr r3, [pc, #296] @ (80042cc <m3ch+0x180>)
80041a4: 781b ldrb r3, [r3, #0]
80041a6: 2b03 cmp r3, #3
80041a8: d876 bhi.n 8004298 <m3ch+0x14c>
80041aa: a201 add r2, pc, #4 @ (adr r2, 80041b0 <m3ch+0x64>)
80041ac: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80041b0: 080041c1 .word 0x080041c1
80041b4: 0800420d .word 0x0800420d
80041b8: 0800423d .word 0x0800423d
80041bc: 0800426f .word 0x0800426f
case motWaiting:
SetMotPerc(M3,FW,0);
80041c0: 2200 movs r2, #0
80041c2: 2100 movs r1, #0
80041c4: 2003 movs r0, #3
80041c6: f000 fb4f bl 8004868 <SetMotPerc>
SetMotPerc(M3,BW,0);
80041ca: 2200 movs r2, #0
80041cc: 2101 movs r1, #1
80041ce: 2003 movs r0, #3
80041d0: f000 fb4a bl 8004868 <SetMotPerc>
if(rtCiclo>=chM3start){
80041d4: 4b40 ldr r3, [pc, #256] @ (80042d8 <m3ch+0x18c>)
80041d6: 881b ldrh r3, [r3, #0]
80041d8: b29a uxth r2, r3
80041da: 4b40 ldr r3, [pc, #256] @ (80042dc <m3ch+0x190>)
80041dc: 881b ldrh r3, [r3, #0]
80041de: 429a cmp r2, r3
80041e0: d365 bcc.n 80042ae <m3ch+0x162>
(void)ramp(M3,BW,mrampstart[M3-1],m2pwmch,tramp,RAMPINIT);
80041e2: 4b3f ldr r3, [pc, #252] @ (80042e0 <m3ch+0x194>)
80041e4: 889b ldrh r3, [r3, #4]
80041e6: b2da uxtb r2, r3
80041e8: 4b3e ldr r3, [pc, #248] @ (80042e4 <m3ch+0x198>)
80041ea: 881b ldrh r3, [r3, #0]
80041ec: b2d9 uxtb r1, r3
80041ee: 4b3e ldr r3, [pc, #248] @ (80042e8 <m3ch+0x19c>)
80041f0: 881b ldrh r3, [r3, #0]
80041f2: b2db uxtb r3, r3
80041f4: 2000 movs r0, #0
80041f6: 9001 str r0, [sp, #4]
80041f8: 9300 str r3, [sp, #0]
80041fa: 460b mov r3, r1
80041fc: 2101 movs r1, #1
80041fe: 2003 movs r0, #3
8004200: f000 fcb2 bl 8004b68 <ramp>
m3st=motStartRamp;
8004204: 4b31 ldr r3, [pc, #196] @ (80042cc <m3ch+0x180>)
8004206: 2201 movs r2, #1
8004208: 701a strb r2, [r3, #0]
}
break;
800420a: e050 b.n 80042ae <m3ch+0x162>
case motStartRamp:
if(ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){
800420c: 4b34 ldr r3, [pc, #208] @ (80042e0 <m3ch+0x194>)
800420e: 889b ldrh r3, [r3, #4]
8004210: b2da uxtb r2, r3
8004212: 4b36 ldr r3, [pc, #216] @ (80042ec <m3ch+0x1a0>)
8004214: 881b ldrh r3, [r3, #0]
8004216: b2d9 uxtb r1, r3
8004218: 4b33 ldr r3, [pc, #204] @ (80042e8 <m3ch+0x19c>)
800421a: 881b ldrh r3, [r3, #0]
800421c: b2db uxtb r3, r3
800421e: 200a movs r0, #10
8004220: 9001 str r0, [sp, #4]
8004222: 9300 str r3, [sp, #0]
8004224: 460b mov r3, r1
8004226: 2101 movs r1, #1
8004228: 2003 movs r0, #3
800422a: f000 fc9d bl 8004b68 <ramp>
800422e: 4603 mov r3, r0
8004230: 2b00 cmp r3, #0
8004232: d13e bne.n 80042b2 <m3ch+0x166>
m3st=motWaitingTime;
8004234: 4b25 ldr r3, [pc, #148] @ (80042cc <m3ch+0x180>)
8004236: 2202 movs r2, #2
8004238: 701a strb r2, [r3, #0]
}
break;
800423a: e03a b.n 80042b2 <m3ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM3stop){
800423c: 4b26 ldr r3, [pc, #152] @ (80042d8 <m3ch+0x18c>)
800423e: 881b ldrh r3, [r3, #0]
8004240: b29a uxth r2, r3
8004242: 4b2b ldr r3, [pc, #172] @ (80042f0 <m3ch+0x1a4>)
8004244: 881b ldrh r3, [r3, #0]
8004246: 429a cmp r2, r3
8004248: d335 bcc.n 80042b6 <m3ch+0x16a>
(void)ramp(M3,BW,m3pwmch,0,tramp,RAMPINIT);
800424a: 4b28 ldr r3, [pc, #160] @ (80042ec <m3ch+0x1a0>)
800424c: 881b ldrh r3, [r3, #0]
800424e: b2da uxtb r2, r3
8004250: 4b25 ldr r3, [pc, #148] @ (80042e8 <m3ch+0x19c>)
8004252: 881b ldrh r3, [r3, #0]
8004254: b2db uxtb r3, r3
8004256: 2100 movs r1, #0
8004258: 9101 str r1, [sp, #4]
800425a: 9300 str r3, [sp, #0]
800425c: 2300 movs r3, #0
800425e: 2101 movs r1, #1
8004260: 2003 movs r0, #3
8004262: f000 fc81 bl 8004b68 <ramp>
m3st=motStopRamp;
8004266: 4b19 ldr r3, [pc, #100] @ (80042cc <m3ch+0x180>)
8004268: 2203 movs r2, #3
800426a: 701a strb r2, [r3, #0]
}
break;
800426c: e023 b.n 80042b6 <m3ch+0x16a>
case motStopRamp:
if(ramp(M3,BW,m3pwmch,0,tramp,RAMPRUN)==DONE){
800426e: 4b1f ldr r3, [pc, #124] @ (80042ec <m3ch+0x1a0>)
8004270: 881b ldrh r3, [r3, #0]
8004272: b2da uxtb r2, r3
8004274: 4b1c ldr r3, [pc, #112] @ (80042e8 <m3ch+0x19c>)
8004276: 881b ldrh r3, [r3, #0]
8004278: b2db uxtb r3, r3
800427a: 210a movs r1, #10
800427c: 9101 str r1, [sp, #4]
800427e: 9300 str r3, [sp, #0]
8004280: 2300 movs r3, #0
8004282: 2101 movs r1, #1
8004284: 2003 movs r0, #3
8004286: f000 fc6f bl 8004b68 <ramp>
800428a: 4603 mov r3, r0
800428c: 2b00 cmp r3, #0
800428e: d114 bne.n 80042ba <m3ch+0x16e>
m3st=motStop;
8004290: 4b0e ldr r3, [pc, #56] @ (80042cc <m3ch+0x180>)
8004292: 2204 movs r2, #4
8004294: 701a strb r2, [r3, #0]
}
break;
8004296: e010 b.n 80042ba <m3ch+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8004298: 2200 movs r2, #0
800429a: 2100 movs r1, #0
800429c: 2003 movs r0, #3
800429e: f000 fae3 bl 8004868 <SetMotPerc>
SetMotPerc(M3,BW,0);
80042a2: 2200 movs r2, #0
80042a4: 2101 movs r1, #1
80042a6: 2003 movs r0, #3
80042a8: f000 fade bl 8004868 <SetMotPerc>
break;
80042ac: e006 b.n 80042bc <m3ch+0x170>
break;
80042ae: bf00 nop
80042b0: e004 b.n 80042bc <m3ch+0x170>
break;
80042b2: bf00 nop
80042b4: e002 b.n 80042bc <m3ch+0x170>
break;
80042b6: bf00 nop
80042b8: e000 b.n 80042bc <m3ch+0x170>
break;
80042ba: bf00 nop
}
return m3st;
80042bc: 4b03 ldr r3, [pc, #12] @ (80042cc <m3ch+0x180>)
80042be: 781b ldrb r3, [r3, #0]
}
80042c0: 4618 mov r0, r3
80042c2: 3768 adds r7, #104 @ 0x68
80042c4: 46bd mov sp, r7
80042c6: bd80 pop {r7, pc}
80042c8: 2000000d .word 0x2000000d
80042cc: 20000468 .word 0x20000468
80042d0: 0800f448 .word 0x0800f448
80042d4: 200003a8 .word 0x200003a8
80042d8: 200003fc .word 0x200003fc
80042dc: 20000440 .word 0x20000440
80042e0: 2000044c .word 0x2000044c
80042e4: 20000406 .word 0x20000406
80042e8: 20000418 .word 0x20000418
80042ec: 2000040a .word 0x2000040a
80042f0: 20000442 .word 0x20000442
080042f4 <m4ch>:
motMov_st m4ch(void){
80042f4: b580 push {r7, lr}
80042f6: b09c sub sp, #112 @ 0x70
80042f8: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
80042fa: 4b5d ldr r3, [pc, #372] @ (8004470 <m4ch+0x17c>)
80042fc: 781a ldrb r2, [r3, #0]
80042fe: 4b5d ldr r3, [pc, #372] @ (8004474 <m4ch+0x180>)
8004300: 781b ldrb r3, [r3, #0]
8004302: 429a cmp r2, r3
8004304: d017 beq.n 8004336 <m4ch+0x42>
memm4st=m4st;
8004306: 4b5b ldr r3, [pc, #364] @ (8004474 <m4ch+0x180>)
8004308: 781a ldrb r2, [r3, #0]
800430a: 4b59 ldr r3, [pc, #356] @ (8004470 <m4ch+0x17c>)
800430c: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ch=%d",m4st);
800430e: 4b59 ldr r3, [pc, #356] @ (8004474 <m4ch+0x180>)
8004310: 781b ldrb r3, [r3, #0]
8004312: 461a mov r2, r3
8004314: 1d3b adds r3, r7, #4
8004316: 4958 ldr r1, [pc, #352] @ (8004478 <m4ch+0x184>)
8004318: 4618 mov r0, r3
800431a: f00a f8c3 bl 800e4a4 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800431e: 1d3b adds r3, r7, #4
8004320: 4618 mov r0, r3
8004322: f7fb ff13 bl 800014c <strlen>
8004326: 4603 mov r3, r0
8004328: b29a uxth r2, r3
800432a: 1d39 adds r1, r7, #4
800432c: f04f 33ff mov.w r3, #4294967295
8004330: 4852 ldr r0, [pc, #328] @ (800447c <m4ch+0x188>)
8004332: f005 fac7 bl 80098c4 <HAL_UART_Transmit>
}
if(rtCiclo<chM4start)m4st=motWaiting;
8004336: 4b52 ldr r3, [pc, #328] @ (8004480 <m4ch+0x18c>)
8004338: 881b ldrh r3, [r3, #0]
800433a: b29a uxth r2, r3
800433c: 4b51 ldr r3, [pc, #324] @ (8004484 <m4ch+0x190>)
800433e: 881b ldrh r3, [r3, #0]
8004340: 429a cmp r2, r3
8004342: d202 bcs.n 800434a <m4ch+0x56>
8004344: 4b4b ldr r3, [pc, #300] @ (8004474 <m4ch+0x180>)
8004346: 2200 movs r2, #0
8004348: 701a strb r2, [r3, #0]
switch(m4st){
800434a: 4b4a ldr r3, [pc, #296] @ (8004474 <m4ch+0x180>)
800434c: 781b ldrb r3, [r3, #0]
800434e: 2b03 cmp r3, #3
8004350: d876 bhi.n 8004440 <m4ch+0x14c>
8004352: a201 add r2, pc, #4 @ (adr r2, 8004358 <m4ch+0x64>)
8004354: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004358: 08004369 .word 0x08004369
800435c: 080043b5 .word 0x080043b5
8004360: 080043e5 .word 0x080043e5
8004364: 08004417 .word 0x08004417
case motWaiting:
SetMotPerc(M4,FW,0);
8004368: 2200 movs r2, #0
800436a: 2100 movs r1, #0
800436c: 2004 movs r0, #4
800436e: f000 fa7b bl 8004868 <SetMotPerc>
SetMotPerc(M4,BW,0);
8004372: 2200 movs r2, #0
8004374: 2101 movs r1, #1
8004376: 2004 movs r0, #4
8004378: f000 fa76 bl 8004868 <SetMotPerc>
if(rtCiclo>=chM4start){
800437c: 4b40 ldr r3, [pc, #256] @ (8004480 <m4ch+0x18c>)
800437e: 881b ldrh r3, [r3, #0]
8004380: b29a uxth r2, r3
8004382: 4b40 ldr r3, [pc, #256] @ (8004484 <m4ch+0x190>)
8004384: 881b ldrh r3, [r3, #0]
8004386: 429a cmp r2, r3
8004388: d365 bcc.n 8004456 <m4ch+0x162>
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPINIT);
800438a: 4b3f ldr r3, [pc, #252] @ (8004488 <m4ch+0x194>)
800438c: 88db ldrh r3, [r3, #6]
800438e: b2da uxtb r2, r3
8004390: 4b3e ldr r3, [pc, #248] @ (800448c <m4ch+0x198>)
8004392: 881b ldrh r3, [r3, #0]
8004394: b2d9 uxtb r1, r3
8004396: 4b3e ldr r3, [pc, #248] @ (8004490 <m4ch+0x19c>)
8004398: 881b ldrh r3, [r3, #0]
800439a: b2db uxtb r3, r3
800439c: 2000 movs r0, #0
800439e: 9001 str r0, [sp, #4]
80043a0: 9300 str r3, [sp, #0]
80043a2: 460b mov r3, r1
80043a4: 2101 movs r1, #1
80043a6: 2004 movs r0, #4
80043a8: f000 fbde bl 8004b68 <ramp>
m4st=motStartRamp;
80043ac: 4b31 ldr r3, [pc, #196] @ (8004474 <m4ch+0x180>)
80043ae: 2201 movs r2, #1
80043b0: 701a strb r2, [r3, #0]
}
break;
80043b2: e050 b.n 8004456 <m4ch+0x162>
case motStartRamp:
if(ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE){
80043b4: 4b34 ldr r3, [pc, #208] @ (8004488 <m4ch+0x194>)
80043b6: 88db ldrh r3, [r3, #6]
80043b8: b2da uxtb r2, r3
80043ba: 4b34 ldr r3, [pc, #208] @ (800448c <m4ch+0x198>)
80043bc: 881b ldrh r3, [r3, #0]
80043be: b2d9 uxtb r1, r3
80043c0: 4b33 ldr r3, [pc, #204] @ (8004490 <m4ch+0x19c>)
80043c2: 881b ldrh r3, [r3, #0]
80043c4: b2db uxtb r3, r3
80043c6: 200a movs r0, #10
80043c8: 9001 str r0, [sp, #4]
80043ca: 9300 str r3, [sp, #0]
80043cc: 460b mov r3, r1
80043ce: 2101 movs r1, #1
80043d0: 2004 movs r0, #4
80043d2: f000 fbc9 bl 8004b68 <ramp>
80043d6: 4603 mov r3, r0
80043d8: 2b00 cmp r3, #0
80043da: d13e bne.n 800445a <m4ch+0x166>
m4st=motWaitingTime;
80043dc: 4b25 ldr r3, [pc, #148] @ (8004474 <m4ch+0x180>)
80043de: 2202 movs r2, #2
80043e0: 701a strb r2, [r3, #0]
}
break;
80043e2: e03a b.n 800445a <m4ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM4stop){
80043e4: 4b26 ldr r3, [pc, #152] @ (8004480 <m4ch+0x18c>)
80043e6: 881b ldrh r3, [r3, #0]
80043e8: b29a uxth r2, r3
80043ea: 4b2a ldr r3, [pc, #168] @ (8004494 <m4ch+0x1a0>)
80043ec: 881b ldrh r3, [r3, #0]
80043ee: 429a cmp r2, r3
80043f0: d335 bcc.n 800445e <m4ch+0x16a>
(void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT);
80043f2: 4b26 ldr r3, [pc, #152] @ (800448c <m4ch+0x198>)
80043f4: 881b ldrh r3, [r3, #0]
80043f6: b2da uxtb r2, r3
80043f8: 4b25 ldr r3, [pc, #148] @ (8004490 <m4ch+0x19c>)
80043fa: 881b ldrh r3, [r3, #0]
80043fc: b2db uxtb r3, r3
80043fe: 2100 movs r1, #0
8004400: 9101 str r1, [sp, #4]
8004402: 9300 str r3, [sp, #0]
8004404: 2300 movs r3, #0
8004406: 2101 movs r1, #1
8004408: 2004 movs r0, #4
800440a: f000 fbad bl 8004b68 <ramp>
m4st=motStopRamp;
800440e: 4b19 ldr r3, [pc, #100] @ (8004474 <m4ch+0x180>)
8004410: 2203 movs r2, #3
8004412: 701a strb r2, [r3, #0]
}
break;
8004414: e023 b.n 800445e <m4ch+0x16a>
case motStopRamp:
if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){
8004416: 4b1d ldr r3, [pc, #116] @ (800448c <m4ch+0x198>)
8004418: 881b ldrh r3, [r3, #0]
800441a: b2da uxtb r2, r3
800441c: 4b1c ldr r3, [pc, #112] @ (8004490 <m4ch+0x19c>)
800441e: 881b ldrh r3, [r3, #0]
8004420: b2db uxtb r3, r3
8004422: 210a movs r1, #10
8004424: 9101 str r1, [sp, #4]
8004426: 9300 str r3, [sp, #0]
8004428: 2300 movs r3, #0
800442a: 2101 movs r1, #1
800442c: 2004 movs r0, #4
800442e: f000 fb9b bl 8004b68 <ramp>
8004432: 4603 mov r3, r0
8004434: 2b00 cmp r3, #0
8004436: d114 bne.n 8004462 <m4ch+0x16e>
m4st=motStop;
8004438: 4b0e ldr r3, [pc, #56] @ (8004474 <m4ch+0x180>)
800443a: 2204 movs r2, #4
800443c: 701a strb r2, [r3, #0]
}
break;
800443e: e010 b.n 8004462 <m4ch+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8004440: 2200 movs r2, #0
8004442: 2100 movs r1, #0
8004444: 2004 movs r0, #4
8004446: f000 fa0f bl 8004868 <SetMotPerc>
SetMotPerc(M4,BW,0);
800444a: 2200 movs r2, #0
800444c: 2101 movs r1, #1
800444e: 2004 movs r0, #4
8004450: f000 fa0a bl 8004868 <SetMotPerc>
break;
8004454: e006 b.n 8004464 <m4ch+0x170>
break;
8004456: bf00 nop
8004458: e004 b.n 8004464 <m4ch+0x170>
break;
800445a: bf00 nop
800445c: e002 b.n 8004464 <m4ch+0x170>
break;
800445e: bf00 nop
8004460: e000 b.n 8004464 <m4ch+0x170>
break;
8004462: bf00 nop
}
return m4st;
8004464: 4b03 ldr r3, [pc, #12] @ (8004474 <m4ch+0x180>)
8004466: 781b ldrb r3, [r3, #0]
}
8004468: 4618 mov r0, r3
800446a: 3768 adds r7, #104 @ 0x68
800446c: 46bd mov sp, r7
800446e: bd80 pop {r7, pc}
8004470: 2000000e .word 0x2000000e
8004474: 20000469 .word 0x20000469
8004478: 0800f454 .word 0x0800f454
800447c: 200003a8 .word 0x200003a8
8004480: 200003fc .word 0x200003fc
8004484: 20000444 .word 0x20000444
8004488: 2000044c .word 0x2000044c
800448c: 2000040e .word 0x2000040e
8004490: 20000418 .word 0x20000418
8004494: 20000446 .word 0x20000446
08004498 <IsPwmRunning>:
extern volatile uint16_t rtramp[4];
extern uint16_t mrampstart[4];
extern UART_HandleTypeDef huart1;
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8004498: b580 push {r7, lr}
800449a: b084 sub sp, #16
800449c: af00 add r7, sp, #0
800449e: 6078 str r0, [r7, #4]
80044a0: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
80044a2: 6839 ldr r1, [r7, #0]
80044a4: 6878 ldr r0, [r7, #4]
80044a6: f004 fe86 bl 80091b6 <HAL_TIM_GetChannelState>
80044aa: 4603 mov r3, r0
80044ac: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
80044ae: 7bfb ldrb r3, [r7, #15]
80044b0: 2b02 cmp r3, #2
80044b2: bf0c ite eq
80044b4: 2301 moveq r3, #1
80044b6: 2300 movne r3, #0
80044b8: b2db uxtb r3, r3
}
80044ba: 4618 mov r0, r3
80044bc: 3710 adds r7, #16
80044be: 46bd mov sp, r7
80044c0: bd80 pop {r7, pc}
080044c2 <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
80044c2: b580 push {r7, lr}
80044c4: b082 sub sp, #8
80044c6: af00 add r7, sp, #0
80044c8: 6078 str r0, [r7, #4]
80044ca: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
80044cc: 6839 ldr r1, [r7, #0]
80044ce: 6878 ldr r0, [r7, #4]
80044d0: f004 fc84 bl 8008ddc <HAL_TIM_PWM_Stop>
}
80044d4: bf00 nop
80044d6: 3708 adds r7, #8
80044d8: 46bd mov sp, r7
80044da: bd80 pop {r7, pc}
080044dc <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
80044dc: b580 push {r7, lr}
80044de: b084 sub sp, #16
80044e0: af00 add r7, sp, #0
80044e2: 60f8 str r0, [r7, #12]
80044e4: 60b9 str r1, [r7, #8]
80044e6: 4613 mov r3, r2
80044e8: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80044ea: 68bb ldr r3, [r7, #8]
80044ec: 2b00 cmp r3, #0
80044ee: d104 bne.n 80044fa <StartMot+0x1e>
80044f0: 68fb ldr r3, [r7, #12]
80044f2: 681b ldr r3, [r3, #0]
80044f4: 88fa ldrh r2, [r7, #6]
80044f6: 635a str r2, [r3, #52] @ 0x34
80044f8: e013 b.n 8004522 <StartMot+0x46>
80044fa: 68bb ldr r3, [r7, #8]
80044fc: 2b04 cmp r3, #4
80044fe: d104 bne.n 800450a <StartMot+0x2e>
8004500: 68fb ldr r3, [r7, #12]
8004502: 681a ldr r2, [r3, #0]
8004504: 88fb ldrh r3, [r7, #6]
8004506: 6393 str r3, [r2, #56] @ 0x38
8004508: e00b b.n 8004522 <StartMot+0x46>
800450a: 68bb ldr r3, [r7, #8]
800450c: 2b08 cmp r3, #8
800450e: d104 bne.n 800451a <StartMot+0x3e>
8004510: 68fb ldr r3, [r7, #12]
8004512: 681a ldr r2, [r3, #0]
8004514: 88fb ldrh r3, [r7, #6]
8004516: 63d3 str r3, [r2, #60] @ 0x3c
8004518: e003 b.n 8004522 <StartMot+0x46>
800451a: 68fb ldr r3, [r7, #12]
800451c: 681a ldr r2, [r3, #0]
800451e: 88fb ldrh r3, [r7, #6]
8004520: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
8004522: 68b9 ldr r1, [r7, #8]
8004524: 68f8 ldr r0, [r7, #12]
8004526: f004 fbb7 bl 8008c98 <HAL_TIM_PWM_Start>
}
800452a: bf00 nop
800452c: 3710 adds r7, #16
800452e: 46bd mov sp, r7
8004530: bd80 pop {r7, pc}
08004532 <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8004532: b480 push {r7}
8004534: b085 sub sp, #20
8004536: af00 add r7, sp, #0
8004538: 60f8 str r0, [r7, #12]
800453a: 60b9 str r1, [r7, #8]
800453c: 4613 mov r3, r2
800453e: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004540: 68bb ldr r3, [r7, #8]
8004542: 2b00 cmp r3, #0
8004544: d104 bne.n 8004550 <SetMotPwm+0x1e>
8004546: 68fb ldr r3, [r7, #12]
8004548: 681b ldr r3, [r3, #0]
800454a: 88fa ldrh r2, [r7, #6]
800454c: 635a str r2, [r3, #52] @ 0x34
}
800454e: e013 b.n 8004578 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004550: 68bb ldr r3, [r7, #8]
8004552: 2b04 cmp r3, #4
8004554: d104 bne.n 8004560 <SetMotPwm+0x2e>
8004556: 68fb ldr r3, [r7, #12]
8004558: 681a ldr r2, [r3, #0]
800455a: 88fb ldrh r3, [r7, #6]
800455c: 6393 str r3, [r2, #56] @ 0x38
}
800455e: e00b b.n 8004578 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004560: 68bb ldr r3, [r7, #8]
8004562: 2b08 cmp r3, #8
8004564: d104 bne.n 8004570 <SetMotPwm+0x3e>
8004566: 68fb ldr r3, [r7, #12]
8004568: 681a ldr r2, [r3, #0]
800456a: 88fb ldrh r3, [r7, #6]
800456c: 63d3 str r3, [r2, #60] @ 0x3c
}
800456e: e003 b.n 8004578 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004570: 68fb ldr r3, [r7, #12]
8004572: 681a ldr r2, [r3, #0]
8004574: 88fb ldrh r3, [r7, #6]
8004576: 6413 str r3, [r2, #64] @ 0x40
}
8004578: bf00 nop
800457a: 3714 adds r7, #20
800457c: 46bd mov sp, r7
800457e: bc80 pop {r7}
8004580: 4770 bx lr
...
08004584 <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
8004584: b580 push {r7, lr}
8004586: b082 sub sp, #8
8004588: af00 add r7, sp, #0
800458a: 4603 mov r3, r0
800458c: 71fb strb r3, [r7, #7]
800458e: 460b mov r3, r1
8004590: 71bb strb r3, [r7, #6]
8004592: 4613 mov r3, r2
8004594: 80bb strh r3, [r7, #4]
switch(mot){
8004596: 79fb ldrb r3, [r7, #7]
8004598: 3b01 subs r3, #1
800459a: 2b03 cmp r3, #3
800459c: f200 8158 bhi.w 8004850 <SetMot+0x2cc>
80045a0: a201 add r2, pc, #4 @ (adr r2, 80045a8 <SetMot+0x24>)
80045a2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80045a6: bf00 nop
80045a8: 080045b9 .word 0x080045b9
80045ac: 0800465b .word 0x0800465b
80045b0: 080046fd .word 0x080046fd
80045b4: 080047a7 .word 0x080047a7
case 1:
if(dir==FW){
80045b8: 79bb ldrb r3, [r7, #6]
80045ba: 2b00 cmp r3, #0
80045bc: d126 bne.n 800460c <SetMot+0x88>
if(pwmval==0){
80045be: 88bb ldrh r3, [r7, #4]
80045c0: 2b00 cmp r3, #0
80045c2: d109 bne.n 80045d8 <SetMot+0x54>
StopMot(timMot1,FWMot1);
80045c4: 2100 movs r1, #0
80045c6: 48a5 ldr r0, [pc, #660] @ (800485c <SetMot+0x2d8>)
80045c8: f7ff ff7b bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
80045cc: 2200 movs r2, #0
80045ce: 2102 movs r1, #2
80045d0: 48a3 ldr r0, [pc, #652] @ (8004860 <SetMot+0x2dc>)
80045d2: f002 f878 bl 80066c6 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
80045d6: e13c b.n 8004852 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
80045d8: 2100 movs r1, #0
80045da: 48a0 ldr r0, [pc, #640] @ (800485c <SetMot+0x2d8>)
80045dc: f7ff ff5c bl 8004498 <IsPwmRunning>
80045e0: 4603 mov r3, r0
80045e2: 2b00 cmp r3, #0
80045e4: d006 beq.n 80045f4 <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
80045e6: 88bb ldrh r3, [r7, #4]
80045e8: 461a mov r2, r3
80045ea: 2100 movs r1, #0
80045ec: 489b ldr r0, [pc, #620] @ (800485c <SetMot+0x2d8>)
80045ee: f7ff ffa0 bl 8004532 <SetMotPwm>
break;
80045f2: e12e b.n 8004852 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80045f4: 2201 movs r2, #1
80045f6: 2102 movs r1, #2
80045f8: 4899 ldr r0, [pc, #612] @ (8004860 <SetMot+0x2dc>)
80045fa: f002 f864 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
80045fe: 88bb ldrh r3, [r7, #4]
8004600: 461a mov r2, r3
8004602: 2100 movs r1, #0
8004604: 4895 ldr r0, [pc, #596] @ (800485c <SetMot+0x2d8>)
8004606: f7ff ff69 bl 80044dc <StartMot>
break;
800460a: e122 b.n 8004852 <SetMot+0x2ce>
if(pwmval==0){
800460c: 88bb ldrh r3, [r7, #4]
800460e: 2b00 cmp r3, #0
8004610: d109 bne.n 8004626 <SetMot+0xa2>
StopMot(timMot1,BWMot1);
8004612: 2104 movs r1, #4
8004614: 4891 ldr r0, [pc, #580] @ (800485c <SetMot+0x2d8>)
8004616: f7ff ff54 bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
800461a: 2200 movs r2, #0
800461c: 2102 movs r1, #2
800461e: 4890 ldr r0, [pc, #576] @ (8004860 <SetMot+0x2dc>)
8004620: f002 f851 bl 80066c6 <HAL_GPIO_WritePin>
break;
8004624: e115 b.n 8004852 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
8004626: 2104 movs r1, #4
8004628: 488c ldr r0, [pc, #560] @ (800485c <SetMot+0x2d8>)
800462a: f7ff ff35 bl 8004498 <IsPwmRunning>
800462e: 4603 mov r3, r0
8004630: 2b00 cmp r3, #0
8004632: d006 beq.n 8004642 <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
8004634: 88bb ldrh r3, [r7, #4]
8004636: 461a mov r2, r3
8004638: 2104 movs r1, #4
800463a: 4888 ldr r0, [pc, #544] @ (800485c <SetMot+0x2d8>)
800463c: f7ff ff79 bl 8004532 <SetMotPwm>
break;
8004640: e107 b.n 8004852 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8004642: 2201 movs r2, #1
8004644: 2102 movs r1, #2
8004646: 4886 ldr r0, [pc, #536] @ (8004860 <SetMot+0x2dc>)
8004648: f002 f83d bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
800464c: 88bb ldrh r3, [r7, #4]
800464e: 461a mov r2, r3
8004650: 2104 movs r1, #4
8004652: 4882 ldr r0, [pc, #520] @ (800485c <SetMot+0x2d8>)
8004654: f7ff ff42 bl 80044dc <StartMot>
break;
8004658: e0fb b.n 8004852 <SetMot+0x2ce>
case 2:
if(dir==FW){
800465a: 79bb ldrb r3, [r7, #6]
800465c: 2b00 cmp r3, #0
800465e: d126 bne.n 80046ae <SetMot+0x12a>
if(pwmval==0){
8004660: 88bb ldrh r3, [r7, #4]
8004662: 2b00 cmp r3, #0
8004664: d109 bne.n 800467a <SetMot+0xf6>
StopMot(timMot2,FWMot2);
8004666: 2108 movs r1, #8
8004668: 487c ldr r0, [pc, #496] @ (800485c <SetMot+0x2d8>)
800466a: f7ff ff2a bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
800466e: 2200 movs r2, #0
8004670: 2104 movs r1, #4
8004672: 487b ldr r0, [pc, #492] @ (8004860 <SetMot+0x2dc>)
8004674: f002 f827 bl 80066c6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8004678: e0eb b.n 8004852 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
800467a: 2108 movs r1, #8
800467c: 4877 ldr r0, [pc, #476] @ (800485c <SetMot+0x2d8>)
800467e: f7ff ff0b bl 8004498 <IsPwmRunning>
8004682: 4603 mov r3, r0
8004684: 2b00 cmp r3, #0
8004686: d006 beq.n 8004696 <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
8004688: 88bb ldrh r3, [r7, #4]
800468a: 461a mov r2, r3
800468c: 2108 movs r1, #8
800468e: 4873 ldr r0, [pc, #460] @ (800485c <SetMot+0x2d8>)
8004690: f7ff ff4f bl 8004532 <SetMotPwm>
break;
8004694: e0dd b.n 8004852 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004696: 2201 movs r2, #1
8004698: 2104 movs r1, #4
800469a: 4871 ldr r0, [pc, #452] @ (8004860 <SetMot+0x2dc>)
800469c: f002 f813 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
80046a0: 88bb ldrh r3, [r7, #4]
80046a2: 461a mov r2, r3
80046a4: 2108 movs r1, #8
80046a6: 486d ldr r0, [pc, #436] @ (800485c <SetMot+0x2d8>)
80046a8: f7ff ff18 bl 80044dc <StartMot>
break;
80046ac: e0d1 b.n 8004852 <SetMot+0x2ce>
if(pwmval==0){
80046ae: 88bb ldrh r3, [r7, #4]
80046b0: 2b00 cmp r3, #0
80046b2: d109 bne.n 80046c8 <SetMot+0x144>
StopMot(timMot2,BWMot2);
80046b4: 210c movs r1, #12
80046b6: 4869 ldr r0, [pc, #420] @ (800485c <SetMot+0x2d8>)
80046b8: f7ff ff03 bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80046bc: 2200 movs r2, #0
80046be: 2104 movs r1, #4
80046c0: 4867 ldr r0, [pc, #412] @ (8004860 <SetMot+0x2dc>)
80046c2: f002 f800 bl 80066c6 <HAL_GPIO_WritePin>
break;
80046c6: e0c4 b.n 8004852 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
80046c8: 210c movs r1, #12
80046ca: 4864 ldr r0, [pc, #400] @ (800485c <SetMot+0x2d8>)
80046cc: f7ff fee4 bl 8004498 <IsPwmRunning>
80046d0: 4603 mov r3, r0
80046d2: 2b00 cmp r3, #0
80046d4: d006 beq.n 80046e4 <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
80046d6: 88bb ldrh r3, [r7, #4]
80046d8: 461a mov r2, r3
80046da: 210c movs r1, #12
80046dc: 485f ldr r0, [pc, #380] @ (800485c <SetMot+0x2d8>)
80046de: f7ff ff28 bl 8004532 <SetMotPwm>
break;
80046e2: e0b6 b.n 8004852 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
80046e4: 2201 movs r2, #1
80046e6: 2104 movs r1, #4
80046e8: 485d ldr r0, [pc, #372] @ (8004860 <SetMot+0x2dc>)
80046ea: f001 ffec bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
80046ee: 88bb ldrh r3, [r7, #4]
80046f0: 461a mov r2, r3
80046f2: 210c movs r1, #12
80046f4: 4859 ldr r0, [pc, #356] @ (800485c <SetMot+0x2d8>)
80046f6: f7ff fef1 bl 80044dc <StartMot>
break;
80046fa: e0aa b.n 8004852 <SetMot+0x2ce>
case 3:
if(dir==FW){
80046fc: 79bb ldrb r3, [r7, #6]
80046fe: 2b00 cmp r3, #0
8004700: d128 bne.n 8004754 <SetMot+0x1d0>
if(pwmval==0){
8004702: 88bb ldrh r3, [r7, #4]
8004704: 2b00 cmp r3, #0
8004706: d10a bne.n 800471e <SetMot+0x19a>
StopMot(timMot3,FWMot3);
8004708: 2100 movs r1, #0
800470a: 4856 ldr r0, [pc, #344] @ (8004864 <SetMot+0x2e0>)
800470c: f7ff fed9 bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004710: 2200 movs r2, #0
8004712: f44f 6180 mov.w r1, #1024 @ 0x400
8004716: 4852 ldr r0, [pc, #328] @ (8004860 <SetMot+0x2dc>)
8004718: f001 ffd5 bl 80066c6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
800471c: e099 b.n 8004852 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
800471e: 2100 movs r1, #0
8004720: 4850 ldr r0, [pc, #320] @ (8004864 <SetMot+0x2e0>)
8004722: f7ff feb9 bl 8004498 <IsPwmRunning>
8004726: 4603 mov r3, r0
8004728: 2b00 cmp r3, #0
800472a: d006 beq.n 800473a <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
800472c: 88bb ldrh r3, [r7, #4]
800472e: 461a mov r2, r3
8004730: 2100 movs r1, #0
8004732: 484c ldr r0, [pc, #304] @ (8004864 <SetMot+0x2e0>)
8004734: f7ff fefd bl 8004532 <SetMotPwm>
break;
8004738: e08b b.n 8004852 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
800473a: 2201 movs r2, #1
800473c: f44f 6180 mov.w r1, #1024 @ 0x400
8004740: 4847 ldr r0, [pc, #284] @ (8004860 <SetMot+0x2dc>)
8004742: f001 ffc0 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8004746: 88bb ldrh r3, [r7, #4]
8004748: 461a mov r2, r3
800474a: 2100 movs r1, #0
800474c: 4845 ldr r0, [pc, #276] @ (8004864 <SetMot+0x2e0>)
800474e: f7ff fec5 bl 80044dc <StartMot>
break;
8004752: e07e b.n 8004852 <SetMot+0x2ce>
if(pwmval==0){
8004754: 88bb ldrh r3, [r7, #4]
8004756: 2b00 cmp r3, #0
8004758: d10a bne.n 8004770 <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
800475a: 2104 movs r1, #4
800475c: 4841 ldr r0, [pc, #260] @ (8004864 <SetMot+0x2e0>)
800475e: f7ff feb0 bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004762: 2200 movs r2, #0
8004764: f44f 6180 mov.w r1, #1024 @ 0x400
8004768: 483d ldr r0, [pc, #244] @ (8004860 <SetMot+0x2dc>)
800476a: f001 ffac bl 80066c6 <HAL_GPIO_WritePin>
break;
800476e: e070 b.n 8004852 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
8004770: 2104 movs r1, #4
8004772: 483c ldr r0, [pc, #240] @ (8004864 <SetMot+0x2e0>)
8004774: f7ff fe90 bl 8004498 <IsPwmRunning>
8004778: 4603 mov r3, r0
800477a: 2b00 cmp r3, #0
800477c: d006 beq.n 800478c <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
800477e: 88bb ldrh r3, [r7, #4]
8004780: 461a mov r2, r3
8004782: 2104 movs r1, #4
8004784: 4837 ldr r0, [pc, #220] @ (8004864 <SetMot+0x2e0>)
8004786: f7ff fed4 bl 8004532 <SetMotPwm>
break;
800478a: e062 b.n 8004852 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
800478c: 2201 movs r2, #1
800478e: f44f 6180 mov.w r1, #1024 @ 0x400
8004792: 4833 ldr r0, [pc, #204] @ (8004860 <SetMot+0x2dc>)
8004794: f001 ff97 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004798: 88bb ldrh r3, [r7, #4]
800479a: 461a mov r2, r3
800479c: 2104 movs r1, #4
800479e: 4831 ldr r0, [pc, #196] @ (8004864 <SetMot+0x2e0>)
80047a0: f7ff fe9c bl 80044dc <StartMot>
break;
80047a4: e055 b.n 8004852 <SetMot+0x2ce>
case 4:
if(dir==FW){
80047a6: 79bb ldrb r3, [r7, #6]
80047a8: 2b00 cmp r3, #0
80047aa: d128 bne.n 80047fe <SetMot+0x27a>
if(pwmval==0){
80047ac: 88bb ldrh r3, [r7, #4]
80047ae: 2b00 cmp r3, #0
80047b0: d10a bne.n 80047c8 <SetMot+0x244>
StopMot(timMot4,FWMot4);
80047b2: 2108 movs r1, #8
80047b4: 482b ldr r0, [pc, #172] @ (8004864 <SetMot+0x2e0>)
80047b6: f7ff fe84 bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
80047ba: 2200 movs r2, #0
80047bc: f44f 6100 mov.w r1, #2048 @ 0x800
80047c0: 4827 ldr r0, [pc, #156] @ (8004860 <SetMot+0x2dc>)
80047c2: f001 ff80 bl 80066c6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
80047c6: e044 b.n 8004852 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
80047c8: 2108 movs r1, #8
80047ca: 4826 ldr r0, [pc, #152] @ (8004864 <SetMot+0x2e0>)
80047cc: f7ff fe64 bl 8004498 <IsPwmRunning>
80047d0: 4603 mov r3, r0
80047d2: 2b00 cmp r3, #0
80047d4: d006 beq.n 80047e4 <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
80047d6: 88bb ldrh r3, [r7, #4]
80047d8: 461a mov r2, r3
80047da: 2108 movs r1, #8
80047dc: 4821 ldr r0, [pc, #132] @ (8004864 <SetMot+0x2e0>)
80047de: f7ff fea8 bl 8004532 <SetMotPwm>
break;
80047e2: e036 b.n 8004852 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80047e4: 2201 movs r2, #1
80047e6: f44f 6100 mov.w r1, #2048 @ 0x800
80047ea: 481d ldr r0, [pc, #116] @ (8004860 <SetMot+0x2dc>)
80047ec: f001 ff6b bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
80047f0: 88bb ldrh r3, [r7, #4]
80047f2: 461a mov r2, r3
80047f4: 2108 movs r1, #8
80047f6: 481b ldr r0, [pc, #108] @ (8004864 <SetMot+0x2e0>)
80047f8: f7ff fe70 bl 80044dc <StartMot>
break;
80047fc: e029 b.n 8004852 <SetMot+0x2ce>
if(pwmval==0){
80047fe: 88bb ldrh r3, [r7, #4]
8004800: 2b00 cmp r3, #0
8004802: d10a bne.n 800481a <SetMot+0x296>
StopMot(timMot4,BWMot4);
8004804: 210c movs r1, #12
8004806: 4817 ldr r0, [pc, #92] @ (8004864 <SetMot+0x2e0>)
8004808: f7ff fe5b bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
800480c: 2200 movs r2, #0
800480e: f44f 6100 mov.w r1, #2048 @ 0x800
8004812: 4813 ldr r0, [pc, #76] @ (8004860 <SetMot+0x2dc>)
8004814: f001 ff57 bl 80066c6 <HAL_GPIO_WritePin>
break;
8004818: e01b b.n 8004852 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
800481a: 210c movs r1, #12
800481c: 4811 ldr r0, [pc, #68] @ (8004864 <SetMot+0x2e0>)
800481e: f7ff fe3b bl 8004498 <IsPwmRunning>
8004822: 4603 mov r3, r0
8004824: 2b00 cmp r3, #0
8004826: d006 beq.n 8004836 <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
8004828: 88bb ldrh r3, [r7, #4]
800482a: 461a mov r2, r3
800482c: 210c movs r1, #12
800482e: 480d ldr r0, [pc, #52] @ (8004864 <SetMot+0x2e0>)
8004830: f7ff fe7f bl 8004532 <SetMotPwm>
break;
8004834: e00d b.n 8004852 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004836: 2201 movs r2, #1
8004838: f44f 6100 mov.w r1, #2048 @ 0x800
800483c: 4808 ldr r0, [pc, #32] @ (8004860 <SetMot+0x2dc>)
800483e: f001 ff42 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
8004842: 88bb ldrh r3, [r7, #4]
8004844: 461a mov r2, r3
8004846: 210c movs r1, #12
8004848: 4806 ldr r0, [pc, #24] @ (8004864 <SetMot+0x2e0>)
800484a: f7ff fe47 bl 80044dc <StartMot>
break;
800484e: e000 b.n 8004852 <SetMot+0x2ce>
default:
break;
8004850: bf00 nop
}
}
8004852: bf00 nop
8004854: 3708 adds r7, #8
8004856: 46bd mov sp, r7
8004858: bd80 pop {r7, pc}
800485a: bf00 nop
800485c: 20000318 .word 0x20000318
8004860: 40010c00 .word 0x40010c00
8004864: 20000360 .word 0x20000360
08004868 <SetMotPerc>:
void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){
8004868: b580 push {r7, lr}
800486a: b084 sub sp, #16
800486c: af00 add r7, sp, #0
800486e: 4603 mov r3, r0
8004870: 71fb strb r3, [r7, #7]
8004872: 460b mov r3, r1
8004874: 71bb strb r3, [r7, #6]
8004876: 4613 mov r3, r2
8004878: 717b strb r3, [r7, #5]
uint16_t pwmval;
uint32_t tempval;
tempval=perc;
800487a: 797b ldrb r3, [r7, #5]
800487c: 60fb str r3, [r7, #12]
tempval*=16384;
800487e: 68fb ldr r3, [r7, #12]
8004880: 039b lsls r3, r3, #14
8004882: 60fb str r3, [r7, #12]
tempval/=100;
8004884: 68fb ldr r3, [r7, #12]
8004886: 4ab4 ldr r2, [pc, #720] @ (8004b58 <SetMotPerc+0x2f0>)
8004888: fba2 2303 umull r2, r3, r2, r3
800488c: 095b lsrs r3, r3, #5
800488e: 60fb str r3, [r7, #12]
pwmval=(uint16_t)tempval;
8004890: 68fb ldr r3, [r7, #12]
8004892: 817b strh r3, [r7, #10]
switch(mot){
8004894: 79fb ldrb r3, [r7, #7]
8004896: 3b01 subs r3, #1
8004898: 2b03 cmp r3, #3
800489a: f200 8157 bhi.w 8004b4c <SetMotPerc+0x2e4>
800489e: a201 add r2, pc, #4 @ (adr r2, 80048a4 <SetMotPerc+0x3c>)
80048a0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80048a4: 080048b5 .word 0x080048b5
80048a8: 08004957 .word 0x08004957
80048ac: 080049f9 .word 0x080049f9
80048b0: 08004aa3 .word 0x08004aa3
case 1:
if(dir==FW){
80048b4: 79bb ldrb r3, [r7, #6]
80048b6: 2b00 cmp r3, #0
80048b8: d126 bne.n 8004908 <SetMotPerc+0xa0>
if(pwmval==0){
80048ba: 897b ldrh r3, [r7, #10]
80048bc: 2b00 cmp r3, #0
80048be: d109 bne.n 80048d4 <SetMotPerc+0x6c>
StopMot(timMot1,FWMot1);
80048c0: 2100 movs r1, #0
80048c2: 48a6 ldr r0, [pc, #664] @ (8004b5c <SetMotPerc+0x2f4>)
80048c4: f7ff fdfd bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
80048c8: 2200 movs r2, #0
80048ca: 2102 movs r1, #2
80048cc: 48a4 ldr r0, [pc, #656] @ (8004b60 <SetMotPerc+0x2f8>)
80048ce: f001 fefa bl 80066c6 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
80048d2: e13c b.n 8004b4e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, FWMot1)){
80048d4: 2100 movs r1, #0
80048d6: 48a1 ldr r0, [pc, #644] @ (8004b5c <SetMotPerc+0x2f4>)
80048d8: f7ff fdde bl 8004498 <IsPwmRunning>
80048dc: 4603 mov r3, r0
80048de: 2b00 cmp r3, #0
80048e0: d006 beq.n 80048f0 <SetMotPerc+0x88>
SetMotPwm(timMot1,FWMot1,pwmval);
80048e2: 897b ldrh r3, [r7, #10]
80048e4: 461a mov r2, r3
80048e6: 2100 movs r1, #0
80048e8: 489c ldr r0, [pc, #624] @ (8004b5c <SetMotPerc+0x2f4>)
80048ea: f7ff fe22 bl 8004532 <SetMotPwm>
break;
80048ee: e12e b.n 8004b4e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80048f0: 2201 movs r2, #1
80048f2: 2102 movs r1, #2
80048f4: 489a ldr r0, [pc, #616] @ (8004b60 <SetMotPerc+0x2f8>)
80048f6: f001 fee6 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
80048fa: 897b ldrh r3, [r7, #10]
80048fc: 461a mov r2, r3
80048fe: 2100 movs r1, #0
8004900: 4896 ldr r0, [pc, #600] @ (8004b5c <SetMotPerc+0x2f4>)
8004902: f7ff fdeb bl 80044dc <StartMot>
break;
8004906: e122 b.n 8004b4e <SetMotPerc+0x2e6>
if(pwmval==0){
8004908: 897b ldrh r3, [r7, #10]
800490a: 2b00 cmp r3, #0
800490c: d109 bne.n 8004922 <SetMotPerc+0xba>
StopMot(timMot1,BWMot1);
800490e: 2104 movs r1, #4
8004910: 4892 ldr r0, [pc, #584] @ (8004b5c <SetMotPerc+0x2f4>)
8004912: f7ff fdd6 bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004916: 2200 movs r2, #0
8004918: 2102 movs r1, #2
800491a: 4891 ldr r0, [pc, #580] @ (8004b60 <SetMotPerc+0x2f8>)
800491c: f001 fed3 bl 80066c6 <HAL_GPIO_WritePin>
break;
8004920: e115 b.n 8004b4e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, BWMot1)){
8004922: 2104 movs r1, #4
8004924: 488d ldr r0, [pc, #564] @ (8004b5c <SetMotPerc+0x2f4>)
8004926: f7ff fdb7 bl 8004498 <IsPwmRunning>
800492a: 4603 mov r3, r0
800492c: 2b00 cmp r3, #0
800492e: d006 beq.n 800493e <SetMotPerc+0xd6>
SetMotPwm(timMot1,BWMot1,pwmval);
8004930: 897b ldrh r3, [r7, #10]
8004932: 461a mov r2, r3
8004934: 2104 movs r1, #4
8004936: 4889 ldr r0, [pc, #548] @ (8004b5c <SetMotPerc+0x2f4>)
8004938: f7ff fdfb bl 8004532 <SetMotPwm>
break;
800493c: e107 b.n 8004b4e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
800493e: 2201 movs r2, #1
8004940: 2102 movs r1, #2
8004942: 4887 ldr r0, [pc, #540] @ (8004b60 <SetMotPerc+0x2f8>)
8004944: f001 febf bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
8004948: 897b ldrh r3, [r7, #10]
800494a: 461a mov r2, r3
800494c: 2104 movs r1, #4
800494e: 4883 ldr r0, [pc, #524] @ (8004b5c <SetMotPerc+0x2f4>)
8004950: f7ff fdc4 bl 80044dc <StartMot>
break;
8004954: e0fb b.n 8004b4e <SetMotPerc+0x2e6>
case 2:
if(dir==FW){
8004956: 79bb ldrb r3, [r7, #6]
8004958: 2b00 cmp r3, #0
800495a: d126 bne.n 80049aa <SetMotPerc+0x142>
if(pwmval==0){
800495c: 897b ldrh r3, [r7, #10]
800495e: 2b00 cmp r3, #0
8004960: d109 bne.n 8004976 <SetMotPerc+0x10e>
StopMot(timMot2,FWMot2);
8004962: 2108 movs r1, #8
8004964: 487d ldr r0, [pc, #500] @ (8004b5c <SetMotPerc+0x2f4>)
8004966: f7ff fdac bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
800496a: 2200 movs r2, #0
800496c: 2104 movs r1, #4
800496e: 487c ldr r0, [pc, #496] @ (8004b60 <SetMotPerc+0x2f8>)
8004970: f001 fea9 bl 80066c6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8004974: e0eb b.n 8004b4e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, FWMot2)){
8004976: 2108 movs r1, #8
8004978: 4878 ldr r0, [pc, #480] @ (8004b5c <SetMotPerc+0x2f4>)
800497a: f7ff fd8d bl 8004498 <IsPwmRunning>
800497e: 4603 mov r3, r0
8004980: 2b00 cmp r3, #0
8004982: d006 beq.n 8004992 <SetMotPerc+0x12a>
SetMotPwm(timMot2,FWMot2,pwmval);
8004984: 897b ldrh r3, [r7, #10]
8004986: 461a mov r2, r3
8004988: 2108 movs r1, #8
800498a: 4874 ldr r0, [pc, #464] @ (8004b5c <SetMotPerc+0x2f4>)
800498c: f7ff fdd1 bl 8004532 <SetMotPwm>
break;
8004990: e0dd b.n 8004b4e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004992: 2201 movs r2, #1
8004994: 2104 movs r1, #4
8004996: 4872 ldr r0, [pc, #456] @ (8004b60 <SetMotPerc+0x2f8>)
8004998: f001 fe95 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
800499c: 897b ldrh r3, [r7, #10]
800499e: 461a mov r2, r3
80049a0: 2108 movs r1, #8
80049a2: 486e ldr r0, [pc, #440] @ (8004b5c <SetMotPerc+0x2f4>)
80049a4: f7ff fd9a bl 80044dc <StartMot>
break;
80049a8: e0d1 b.n 8004b4e <SetMotPerc+0x2e6>
if(pwmval==0){
80049aa: 897b ldrh r3, [r7, #10]
80049ac: 2b00 cmp r3, #0
80049ae: d109 bne.n 80049c4 <SetMotPerc+0x15c>
StopMot(timMot2,BWMot2);
80049b0: 210c movs r1, #12
80049b2: 486a ldr r0, [pc, #424] @ (8004b5c <SetMotPerc+0x2f4>)
80049b4: f7ff fd85 bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80049b8: 2200 movs r2, #0
80049ba: 2104 movs r1, #4
80049bc: 4868 ldr r0, [pc, #416] @ (8004b60 <SetMotPerc+0x2f8>)
80049be: f001 fe82 bl 80066c6 <HAL_GPIO_WritePin>
break;
80049c2: e0c4 b.n 8004b4e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, BWMot2)){
80049c4: 210c movs r1, #12
80049c6: 4865 ldr r0, [pc, #404] @ (8004b5c <SetMotPerc+0x2f4>)
80049c8: f7ff fd66 bl 8004498 <IsPwmRunning>
80049cc: 4603 mov r3, r0
80049ce: 2b00 cmp r3, #0
80049d0: d006 beq.n 80049e0 <SetMotPerc+0x178>
SetMotPwm(timMot2,BWMot2,pwmval);
80049d2: 897b ldrh r3, [r7, #10]
80049d4: 461a mov r2, r3
80049d6: 210c movs r1, #12
80049d8: 4860 ldr r0, [pc, #384] @ (8004b5c <SetMotPerc+0x2f4>)
80049da: f7ff fdaa bl 8004532 <SetMotPwm>
break;
80049de: e0b6 b.n 8004b4e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
80049e0: 2201 movs r2, #1
80049e2: 2104 movs r1, #4
80049e4: 485e ldr r0, [pc, #376] @ (8004b60 <SetMotPerc+0x2f8>)
80049e6: f001 fe6e bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
80049ea: 897b ldrh r3, [r7, #10]
80049ec: 461a mov r2, r3
80049ee: 210c movs r1, #12
80049f0: 485a ldr r0, [pc, #360] @ (8004b5c <SetMotPerc+0x2f4>)
80049f2: f7ff fd73 bl 80044dc <StartMot>
break;
80049f6: e0aa b.n 8004b4e <SetMotPerc+0x2e6>
case 3:
if(dir==FW){
80049f8: 79bb ldrb r3, [r7, #6]
80049fa: 2b00 cmp r3, #0
80049fc: d128 bne.n 8004a50 <SetMotPerc+0x1e8>
if(pwmval==0){
80049fe: 897b ldrh r3, [r7, #10]
8004a00: 2b00 cmp r3, #0
8004a02: d10a bne.n 8004a1a <SetMotPerc+0x1b2>
StopMot(timMot3,FWMot3);
8004a04: 2100 movs r1, #0
8004a06: 4857 ldr r0, [pc, #348] @ (8004b64 <SetMotPerc+0x2fc>)
8004a08: f7ff fd5b bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004a0c: 2200 movs r2, #0
8004a0e: f44f 6180 mov.w r1, #1024 @ 0x400
8004a12: 4853 ldr r0, [pc, #332] @ (8004b60 <SetMotPerc+0x2f8>)
8004a14: f001 fe57 bl 80066c6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8004a18: e099 b.n 8004b4e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, FWMot3)){
8004a1a: 2100 movs r1, #0
8004a1c: 4851 ldr r0, [pc, #324] @ (8004b64 <SetMotPerc+0x2fc>)
8004a1e: f7ff fd3b bl 8004498 <IsPwmRunning>
8004a22: 4603 mov r3, r0
8004a24: 2b00 cmp r3, #0
8004a26: d006 beq.n 8004a36 <SetMotPerc+0x1ce>
SetMotPwm(timMot3,FWMot3,pwmval);
8004a28: 897b ldrh r3, [r7, #10]
8004a2a: 461a mov r2, r3
8004a2c: 2100 movs r1, #0
8004a2e: 484d ldr r0, [pc, #308] @ (8004b64 <SetMotPerc+0x2fc>)
8004a30: f7ff fd7f bl 8004532 <SetMotPwm>
break;
8004a34: e08b b.n 8004b4e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8004a36: 2201 movs r2, #1
8004a38: f44f 6180 mov.w r1, #1024 @ 0x400
8004a3c: 4848 ldr r0, [pc, #288] @ (8004b60 <SetMotPerc+0x2f8>)
8004a3e: f001 fe42 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8004a42: 897b ldrh r3, [r7, #10]
8004a44: 461a mov r2, r3
8004a46: 2100 movs r1, #0
8004a48: 4846 ldr r0, [pc, #280] @ (8004b64 <SetMotPerc+0x2fc>)
8004a4a: f7ff fd47 bl 80044dc <StartMot>
break;
8004a4e: e07e b.n 8004b4e <SetMotPerc+0x2e6>
if(pwmval==0){
8004a50: 897b ldrh r3, [r7, #10]
8004a52: 2b00 cmp r3, #0
8004a54: d10a bne.n 8004a6c <SetMotPerc+0x204>
StopMot(timMot3,BWMot3);
8004a56: 2104 movs r1, #4
8004a58: 4842 ldr r0, [pc, #264] @ (8004b64 <SetMotPerc+0x2fc>)
8004a5a: f7ff fd32 bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004a5e: 2200 movs r2, #0
8004a60: f44f 6180 mov.w r1, #1024 @ 0x400
8004a64: 483e ldr r0, [pc, #248] @ (8004b60 <SetMotPerc+0x2f8>)
8004a66: f001 fe2e bl 80066c6 <HAL_GPIO_WritePin>
break;
8004a6a: e070 b.n 8004b4e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, BWMot3)){
8004a6c: 2104 movs r1, #4
8004a6e: 483d ldr r0, [pc, #244] @ (8004b64 <SetMotPerc+0x2fc>)
8004a70: f7ff fd12 bl 8004498 <IsPwmRunning>
8004a74: 4603 mov r3, r0
8004a76: 2b00 cmp r3, #0
8004a78: d006 beq.n 8004a88 <SetMotPerc+0x220>
SetMotPwm(timMot3,BWMot3,pwmval);
8004a7a: 897b ldrh r3, [r7, #10]
8004a7c: 461a mov r2, r3
8004a7e: 2104 movs r1, #4
8004a80: 4838 ldr r0, [pc, #224] @ (8004b64 <SetMotPerc+0x2fc>)
8004a82: f7ff fd56 bl 8004532 <SetMotPwm>
break;
8004a86: e062 b.n 8004b4e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8004a88: 2201 movs r2, #1
8004a8a: f44f 6180 mov.w r1, #1024 @ 0x400
8004a8e: 4834 ldr r0, [pc, #208] @ (8004b60 <SetMotPerc+0x2f8>)
8004a90: f001 fe19 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004a94: 897b ldrh r3, [r7, #10]
8004a96: 461a mov r2, r3
8004a98: 2104 movs r1, #4
8004a9a: 4832 ldr r0, [pc, #200] @ (8004b64 <SetMotPerc+0x2fc>)
8004a9c: f7ff fd1e bl 80044dc <StartMot>
break;
8004aa0: e055 b.n 8004b4e <SetMotPerc+0x2e6>
case 4:
if(dir==FW){
8004aa2: 79bb ldrb r3, [r7, #6]
8004aa4: 2b00 cmp r3, #0
8004aa6: d128 bne.n 8004afa <SetMotPerc+0x292>
if(pwmval==0){
8004aa8: 897b ldrh r3, [r7, #10]
8004aaa: 2b00 cmp r3, #0
8004aac: d10a bne.n 8004ac4 <SetMotPerc+0x25c>
StopMot(timMot4,FWMot4);
8004aae: 2108 movs r1, #8
8004ab0: 482c ldr r0, [pc, #176] @ (8004b64 <SetMotPerc+0x2fc>)
8004ab2: f7ff fd06 bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004ab6: 2200 movs r2, #0
8004ab8: f44f 6100 mov.w r1, #2048 @ 0x800
8004abc: 4828 ldr r0, [pc, #160] @ (8004b60 <SetMotPerc+0x2f8>)
8004abe: f001 fe02 bl 80066c6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8004ac2: e044 b.n 8004b4e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, FWMot4)){
8004ac4: 2108 movs r1, #8
8004ac6: 4827 ldr r0, [pc, #156] @ (8004b64 <SetMotPerc+0x2fc>)
8004ac8: f7ff fce6 bl 8004498 <IsPwmRunning>
8004acc: 4603 mov r3, r0
8004ace: 2b00 cmp r3, #0
8004ad0: d006 beq.n 8004ae0 <SetMotPerc+0x278>
SetMotPwm(timMot4,FWMot4,pwmval);
8004ad2: 897b ldrh r3, [r7, #10]
8004ad4: 461a mov r2, r3
8004ad6: 2108 movs r1, #8
8004ad8: 4822 ldr r0, [pc, #136] @ (8004b64 <SetMotPerc+0x2fc>)
8004ada: f7ff fd2a bl 8004532 <SetMotPwm>
break;
8004ade: e036 b.n 8004b4e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004ae0: 2201 movs r2, #1
8004ae2: f44f 6100 mov.w r1, #2048 @ 0x800
8004ae6: 481e ldr r0, [pc, #120] @ (8004b60 <SetMotPerc+0x2f8>)
8004ae8: f001 fded bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
8004aec: 897b ldrh r3, [r7, #10]
8004aee: 461a mov r2, r3
8004af0: 2108 movs r1, #8
8004af2: 481c ldr r0, [pc, #112] @ (8004b64 <SetMotPerc+0x2fc>)
8004af4: f7ff fcf2 bl 80044dc <StartMot>
break;
8004af8: e029 b.n 8004b4e <SetMotPerc+0x2e6>
if(pwmval==0){
8004afa: 897b ldrh r3, [r7, #10]
8004afc: 2b00 cmp r3, #0
8004afe: d10a bne.n 8004b16 <SetMotPerc+0x2ae>
StopMot(timMot4,BWMot4);
8004b00: 210c movs r1, #12
8004b02: 4818 ldr r0, [pc, #96] @ (8004b64 <SetMotPerc+0x2fc>)
8004b04: f7ff fcdd bl 80044c2 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004b08: 2200 movs r2, #0
8004b0a: f44f 6100 mov.w r1, #2048 @ 0x800
8004b0e: 4814 ldr r0, [pc, #80] @ (8004b60 <SetMotPerc+0x2f8>)
8004b10: f001 fdd9 bl 80066c6 <HAL_GPIO_WritePin>
break;
8004b14: e01b b.n 8004b4e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, BWMot4)){
8004b16: 210c movs r1, #12
8004b18: 4812 ldr r0, [pc, #72] @ (8004b64 <SetMotPerc+0x2fc>)
8004b1a: f7ff fcbd bl 8004498 <IsPwmRunning>
8004b1e: 4603 mov r3, r0
8004b20: 2b00 cmp r3, #0
8004b22: d006 beq.n 8004b32 <SetMotPerc+0x2ca>
SetMotPwm(timMot4,BWMot4,pwmval);
8004b24: 897b ldrh r3, [r7, #10]
8004b26: 461a mov r2, r3
8004b28: 210c movs r1, #12
8004b2a: 480e ldr r0, [pc, #56] @ (8004b64 <SetMotPerc+0x2fc>)
8004b2c: f7ff fd01 bl 8004532 <SetMotPwm>
break;
8004b30: e00d b.n 8004b4e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004b32: 2201 movs r2, #1
8004b34: f44f 6100 mov.w r1, #2048 @ 0x800
8004b38: 4809 ldr r0, [pc, #36] @ (8004b60 <SetMotPerc+0x2f8>)
8004b3a: f001 fdc4 bl 80066c6 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
8004b3e: 897b ldrh r3, [r7, #10]
8004b40: 461a mov r2, r3
8004b42: 210c movs r1, #12
8004b44: 4807 ldr r0, [pc, #28] @ (8004b64 <SetMotPerc+0x2fc>)
8004b46: f7ff fcc9 bl 80044dc <StartMot>
break;
8004b4a: e000 b.n 8004b4e <SetMotPerc+0x2e6>
default:
break;
8004b4c: bf00 nop
}
}
8004b4e: bf00 nop
8004b50: 3710 adds r7, #16
8004b52: 46bd mov sp, r7
8004b54: bd80 pop {r7, pc}
8004b56: bf00 nop
8004b58: 51eb851f .word 0x51eb851f
8004b5c: 20000318 .word 0x20000318
8004b60: 40010c00 .word 0x40010c00
8004b64: 20000360 .word 0x20000360
08004b68 <ramp>:
uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){
8004b68: b590 push {r4, r7, lr}
8004b6a: b085 sub sp, #20
8004b6c: af00 add r7, sp, #0
8004b6e: 4604 mov r4, r0
8004b70: 4608 mov r0, r1
8004b72: 4611 mov r1, r2
8004b74: 461a mov r2, r3
8004b76: 4623 mov r3, r4
8004b78: 71fb strb r3, [r7, #7]
8004b7a: 4603 mov r3, r0
8004b7c: 71bb strb r3, [r7, #6]
8004b7e: 460b mov r3, r1
8004b80: 717b strb r3, [r7, #5]
8004b82: 4613 mov r3, r2
8004b84: 713b strb r3, [r7, #4]
static uint8_t memrtramp[4];
// char s[10];
uint16_t delta;
switch(mode){
8004b86: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
8004b8a: 2b00 cmp r3, #0
8004b8c: d002 beq.n 8004b94 <ramp+0x2c>
8004b8e: 2b0a cmp r3, #10
8004b90: d016 beq.n 8004bc0 <ramp+0x58>
8004b92: e09d b.n 8004cd0 <ramp+0x168>
case RAMPINIT:
memrtramp[mot-1]=rtramp[mot-1]=tr;
8004b94: 79fb ldrb r3, [r7, #7]
8004b96: 3b01 subs r3, #1
8004b98: f897 2020 ldrb.w r2, [r7, #32]
8004b9c: b291 uxth r1, r2
8004b9e: 4a4f ldr r2, [pc, #316] @ (8004cdc <ramp+0x174>)
8004ba0: 4608 mov r0, r1
8004ba2: f822 0013 strh.w r0, [r2, r3, lsl #1]
8004ba6: 79fb ldrb r3, [r7, #7]
8004ba8: 3b01 subs r3, #1
8004baa: b2c9 uxtb r1, r1
8004bac: 4a4c ldr r2, [pc, #304] @ (8004ce0 <ramp+0x178>)
8004bae: 54d1 strb r1, [r2, r3]
SetMotPerc(mot,dir,percStart);
8004bb0: 797a ldrb r2, [r7, #5]
8004bb2: 79b9 ldrb r1, [r7, #6]
8004bb4: 79fb ldrb r3, [r7, #7]
8004bb6: 4618 mov r0, r3
8004bb8: f7ff fe56 bl 8004868 <SetMotPerc>
return DONE;
8004bbc: 2300 movs r3, #0
8004bbe: e088 b.n 8004cd2 <ramp+0x16a>
case RAMPRUN:
if(memrtramp[mot-1]!=rtramp[mot-1]){
8004bc0: 79fb ldrb r3, [r7, #7]
8004bc2: 3b01 subs r3, #1
8004bc4: 4a46 ldr r2, [pc, #280] @ (8004ce0 <ramp+0x178>)
8004bc6: 5cd3 ldrb r3, [r2, r3]
8004bc8: 4619 mov r1, r3
8004bca: 79fb ldrb r3, [r7, #7]
8004bcc: 3b01 subs r3, #1
8004bce: 4a43 ldr r2, [pc, #268] @ (8004cdc <ramp+0x174>)
8004bd0: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004bd4: b29b uxth r3, r3
8004bd6: 4299 cmp r1, r3
8004bd8: d078 beq.n 8004ccc <ramp+0x164>
memrtramp[mot-1]=rtramp[mot-1];
8004bda: 79fb ldrb r3, [r7, #7]
8004bdc: 3b01 subs r3, #1
8004bde: 4a3f ldr r2, [pc, #252] @ (8004cdc <ramp+0x174>)
8004be0: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004be4: b29a uxth r2, r3
8004be6: 79fb ldrb r3, [r7, #7]
8004be8: 3b01 subs r3, #1
8004bea: b2d1 uxtb r1, r2
8004bec: 4a3c ldr r2, [pc, #240] @ (8004ce0 <ramp+0x178>)
8004bee: 54d1 strb r1, [r2, r3]
if(rtramp[mot-1]){
8004bf0: 79fb ldrb r3, [r7, #7]
8004bf2: 3b01 subs r3, #1
8004bf4: 4a39 ldr r2, [pc, #228] @ (8004cdc <ramp+0x174>)
8004bf6: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004bfa: b29b uxth r3, r3
8004bfc: 2b00 cmp r3, #0
8004bfe: d05d beq.n 8004cbc <ramp+0x154>
if(percStart>percEnd){
8004c00: 797a ldrb r2, [r7, #5]
8004c02: 793b ldrb r3, [r7, #4]
8004c04: 429a cmp r2, r3
8004c06: d926 bls.n 8004c56 <ramp+0xee>
delta=percStart-percEnd;
8004c08: 797b ldrb r3, [r7, #5]
8004c0a: b29a uxth r2, r3
8004c0c: 793b ldrb r3, [r7, #4]
8004c0e: b29b uxth r3, r3
8004c10: 1ad3 subs r3, r2, r3
8004c12: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004c14: f897 3020 ldrb.w r3, [r7, #32]
8004c18: b29a uxth r2, r3
8004c1a: 79fb ldrb r3, [r7, #7]
8004c1c: 3b01 subs r3, #1
8004c1e: 492f ldr r1, [pc, #188] @ (8004cdc <ramp+0x174>)
8004c20: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8004c24: b29b uxth r3, r3
8004c26: 1ad3 subs r3, r2, r3
8004c28: b29b uxth r3, r3
8004c2a: 89fa ldrh r2, [r7, #14]
8004c2c: fb02 f303 mul.w r3, r2, r3
8004c30: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004c32: 89fa ldrh r2, [r7, #14]
8004c34: f897 3020 ldrb.w r3, [r7, #32]
8004c38: fb92 f3f3 sdiv r3, r2, r3
8004c3c: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart-delta);
8004c3e: 89fb ldrh r3, [r7, #14]
8004c40: b2db uxtb r3, r3
8004c42: 797a ldrb r2, [r7, #5]
8004c44: 1ad3 subs r3, r2, r3
8004c46: b2da uxtb r2, r3
8004c48: 79b9 ldrb r1, [r7, #6]
8004c4a: 79fb ldrb r3, [r7, #7]
8004c4c: 4618 mov r0, r3
8004c4e: f7ff fe0b bl 8004868 <SetMotPerc>
return RUNNING;
8004c52: 2301 movs r3, #1
8004c54: e03d b.n 8004cd2 <ramp+0x16a>
}else if(percStart<percEnd){
8004c56: 797a ldrb r2, [r7, #5]
8004c58: 793b ldrb r3, [r7, #4]
8004c5a: 429a cmp r2, r3
8004c5c: d226 bcs.n 8004cac <ramp+0x144>
delta=percEnd-percStart;
8004c5e: 793b ldrb r3, [r7, #4]
8004c60: b29a uxth r2, r3
8004c62: 797b ldrb r3, [r7, #5]
8004c64: b29b uxth r3, r3
8004c66: 1ad3 subs r3, r2, r3
8004c68: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004c6a: f897 3020 ldrb.w r3, [r7, #32]
8004c6e: b29a uxth r2, r3
8004c70: 79fb ldrb r3, [r7, #7]
8004c72: 3b01 subs r3, #1
8004c74: 4919 ldr r1, [pc, #100] @ (8004cdc <ramp+0x174>)
8004c76: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8004c7a: b29b uxth r3, r3
8004c7c: 1ad3 subs r3, r2, r3
8004c7e: b29b uxth r3, r3
8004c80: 89fa ldrh r2, [r7, #14]
8004c82: fb02 f303 mul.w r3, r2, r3
8004c86: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004c88: 89fa ldrh r2, [r7, #14]
8004c8a: f897 3020 ldrb.w r3, [r7, #32]
8004c8e: fb92 f3f3 sdiv r3, r2, r3
8004c92: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart+delta);
8004c94: 89fb ldrh r3, [r7, #14]
8004c96: b2da uxtb r2, r3
8004c98: 797b ldrb r3, [r7, #5]
8004c9a: 4413 add r3, r2
8004c9c: b2da uxtb r2, r3
8004c9e: 79b9 ldrb r1, [r7, #6]
8004ca0: 79fb ldrb r3, [r7, #7]
8004ca2: 4618 mov r0, r3
8004ca4: f7ff fde0 bl 8004868 <SetMotPerc>
// sprintf((char*)s,"\n%d",percStart+delta);
// HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
return RUNNING;
8004ca8: 2301 movs r3, #1
8004caa: e012 b.n 8004cd2 <ramp+0x16a>
}else{
SetMotPerc(mot,dir,percEnd);
8004cac: 793a ldrb r2, [r7, #4]
8004cae: 79b9 ldrb r1, [r7, #6]
8004cb0: 79fb ldrb r3, [r7, #7]
8004cb2: 4618 mov r0, r3
8004cb4: f7ff fdd8 bl 8004868 <SetMotPerc>
return DONE;
8004cb8: 2300 movs r3, #0
8004cba: e00a b.n 8004cd2 <ramp+0x16a>
}
}else{
SetMotPerc(mot,dir,percEnd);
8004cbc: 793a ldrb r2, [r7, #4]
8004cbe: 79b9 ldrb r1, [r7, #6]
8004cc0: 79fb ldrb r3, [r7, #7]
8004cc2: 4618 mov r0, r3
8004cc4: f7ff fdd0 bl 8004868 <SetMotPerc>
return DONE;
8004cc8: 2300 movs r3, #0
8004cca: e002 b.n 8004cd2 <ramp+0x16a>
}
}else return RUNNING;
8004ccc: 2301 movs r3, #1
8004cce: e000 b.n 8004cd2 <ramp+0x16a>
break;
}
return DONE;
8004cd0: 2300 movs r3, #0
}
8004cd2: 4618 mov r0, r3
8004cd4: 3714 adds r7, #20
8004cd6: 46bd mov sp, r7
8004cd8: bd90 pop {r4, r7, pc}
8004cda: bf00 nop
8004cdc: 200003f4 .word 0x200003f4
8004ce0: 2000046c .word 0x2000046c
08004ce4 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8004ce4: b480 push {r7}
8004ce6: b085 sub sp, #20
8004ce8: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8004cea: 4b15 ldr r3, [pc, #84] @ (8004d40 <HAL_MspInit+0x5c>)
8004cec: 699b ldr r3, [r3, #24]
8004cee: 4a14 ldr r2, [pc, #80] @ (8004d40 <HAL_MspInit+0x5c>)
8004cf0: f043 0301 orr.w r3, r3, #1
8004cf4: 6193 str r3, [r2, #24]
8004cf6: 4b12 ldr r3, [pc, #72] @ (8004d40 <HAL_MspInit+0x5c>)
8004cf8: 699b ldr r3, [r3, #24]
8004cfa: f003 0301 and.w r3, r3, #1
8004cfe: 60bb str r3, [r7, #8]
8004d00: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
8004d02: 4b0f ldr r3, [pc, #60] @ (8004d40 <HAL_MspInit+0x5c>)
8004d04: 69db ldr r3, [r3, #28]
8004d06: 4a0e ldr r2, [pc, #56] @ (8004d40 <HAL_MspInit+0x5c>)
8004d08: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8004d0c: 61d3 str r3, [r2, #28]
8004d0e: 4b0c ldr r3, [pc, #48] @ (8004d40 <HAL_MspInit+0x5c>)
8004d10: 69db ldr r3, [r3, #28]
8004d12: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8004d16: 607b str r3, [r7, #4]
8004d18: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
8004d1a: 4b0a ldr r3, [pc, #40] @ (8004d44 <HAL_MspInit+0x60>)
8004d1c: 685b ldr r3, [r3, #4]
8004d1e: 60fb str r3, [r7, #12]
8004d20: 68fb ldr r3, [r7, #12]
8004d22: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
8004d26: 60fb str r3, [r7, #12]
8004d28: 68fb ldr r3, [r7, #12]
8004d2a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
8004d2e: 60fb str r3, [r7, #12]
8004d30: 4a04 ldr r2, [pc, #16] @ (8004d44 <HAL_MspInit+0x60>)
8004d32: 68fb ldr r3, [r7, #12]
8004d34: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8004d36: bf00 nop
8004d38: 3714 adds r7, #20
8004d3a: 46bd mov sp, r7
8004d3c: bc80 pop {r7}
8004d3e: 4770 bx lr
8004d40: 40021000 .word 0x40021000
8004d44: 40010000 .word 0x40010000
08004d48 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
8004d48: b580 push {r7, lr}
8004d4a: b08a sub sp, #40 @ 0x28
8004d4c: af00 add r7, sp, #0
8004d4e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004d50: f107 0318 add.w r3, r7, #24
8004d54: 2200 movs r2, #0
8004d56: 601a str r2, [r3, #0]
8004d58: 605a str r2, [r3, #4]
8004d5a: 609a str r2, [r3, #8]
8004d5c: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
8004d5e: 687b ldr r3, [r7, #4]
8004d60: 681b ldr r3, [r3, #0]
8004d62: 4a33 ldr r2, [pc, #204] @ (8004e30 <HAL_ADC_MspInit+0xe8>)
8004d64: 4293 cmp r3, r2
8004d66: d15f bne.n 8004e28 <HAL_ADC_MspInit+0xe0>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
8004d68: 4b32 ldr r3, [pc, #200] @ (8004e34 <HAL_ADC_MspInit+0xec>)
8004d6a: 699b ldr r3, [r3, #24]
8004d6c: 4a31 ldr r2, [pc, #196] @ (8004e34 <HAL_ADC_MspInit+0xec>)
8004d6e: f443 7300 orr.w r3, r3, #512 @ 0x200
8004d72: 6193 str r3, [r2, #24]
8004d74: 4b2f ldr r3, [pc, #188] @ (8004e34 <HAL_ADC_MspInit+0xec>)
8004d76: 699b ldr r3, [r3, #24]
8004d78: f403 7300 and.w r3, r3, #512 @ 0x200
8004d7c: 617b str r3, [r7, #20]
8004d7e: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004d80: 4b2c ldr r3, [pc, #176] @ (8004e34 <HAL_ADC_MspInit+0xec>)
8004d82: 699b ldr r3, [r3, #24]
8004d84: 4a2b ldr r2, [pc, #172] @ (8004e34 <HAL_ADC_MspInit+0xec>)
8004d86: f043 0304 orr.w r3, r3, #4
8004d8a: 6193 str r3, [r2, #24]
8004d8c: 4b29 ldr r3, [pc, #164] @ (8004e34 <HAL_ADC_MspInit+0xec>)
8004d8e: 699b ldr r3, [r3, #24]
8004d90: f003 0304 and.w r3, r3, #4
8004d94: 613b str r3, [r7, #16]
8004d96: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
8004d98: 4b26 ldr r3, [pc, #152] @ (8004e34 <HAL_ADC_MspInit+0xec>)
8004d9a: 699b ldr r3, [r3, #24]
8004d9c: 4a25 ldr r2, [pc, #148] @ (8004e34 <HAL_ADC_MspInit+0xec>)
8004d9e: f043 0308 orr.w r3, r3, #8
8004da2: 6193 str r3, [r2, #24]
8004da4: 4b23 ldr r3, [pc, #140] @ (8004e34 <HAL_ADC_MspInit+0xec>)
8004da6: 699b ldr r3, [r3, #24]
8004da8: f003 0308 and.w r3, r3, #8
8004dac: 60fb str r3, [r7, #12]
8004dae: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
8004db0: 23f0 movs r3, #240 @ 0xf0
8004db2: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004db4: 2303 movs r3, #3
8004db6: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004db8: f107 0318 add.w r3, r7, #24
8004dbc: 4619 mov r1, r3
8004dbe: 481e ldr r0, [pc, #120] @ (8004e38 <HAL_ADC_MspInit+0xf0>)
8004dc0: f001 fae6 bl 8006390 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8004dc4: 2301 movs r3, #1
8004dc6: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004dc8: 2303 movs r3, #3
8004dca: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
8004dcc: f107 0318 add.w r3, r7, #24
8004dd0: 4619 mov r1, r3
8004dd2: 481a ldr r0, [pc, #104] @ (8004e3c <HAL_ADC_MspInit+0xf4>)
8004dd4: f001 fadc bl 8006390 <HAL_GPIO_Init>
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
8004dd8: 4b19 ldr r3, [pc, #100] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004dda: 4a1a ldr r2, [pc, #104] @ (8004e44 <HAL_ADC_MspInit+0xfc>)
8004ddc: 601a str r2, [r3, #0]
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
8004dde: 4b18 ldr r3, [pc, #96] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004de0: 2200 movs r2, #0
8004de2: 605a str r2, [r3, #4]
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
8004de4: 4b16 ldr r3, [pc, #88] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004de6: 2200 movs r2, #0
8004de8: 609a str r2, [r3, #8]
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
8004dea: 4b15 ldr r3, [pc, #84] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004dec: 2280 movs r2, #128 @ 0x80
8004dee: 60da str r2, [r3, #12]
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
8004df0: 4b13 ldr r3, [pc, #76] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004df2: f44f 7280 mov.w r2, #256 @ 0x100
8004df6: 611a str r2, [r3, #16]
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
8004df8: 4b11 ldr r3, [pc, #68] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004dfa: f44f 6280 mov.w r2, #1024 @ 0x400
8004dfe: 615a str r2, [r3, #20]
hdma_adc1.Init.Mode = DMA_CIRCULAR;
8004e00: 4b0f ldr r3, [pc, #60] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004e02: 2220 movs r2, #32
8004e04: 619a str r2, [r3, #24]
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
8004e06: 4b0e ldr r3, [pc, #56] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004e08: 2200 movs r2, #0
8004e0a: 61da str r2, [r3, #28]
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
8004e0c: 480c ldr r0, [pc, #48] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004e0e: f000 fed1 bl 8005bb4 <HAL_DMA_Init>
8004e12: 4603 mov r3, r0
8004e14: 2b00 cmp r3, #0
8004e16: d001 beq.n 8004e1c <HAL_ADC_MspInit+0xd4>
{
Error_Handler();
8004e18: f7fe fca2 bl 8003760 <Error_Handler>
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
8004e1c: 687b ldr r3, [r7, #4]
8004e1e: 4a08 ldr r2, [pc, #32] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004e20: 621a str r2, [r3, #32]
8004e22: 4a07 ldr r2, [pc, #28] @ (8004e40 <HAL_ADC_MspInit+0xf8>)
8004e24: 687b ldr r3, [r7, #4]
8004e26: 6253 str r3, [r2, #36] @ 0x24
/* USER CODE END ADC1_MspInit 1 */
}
}
8004e28: bf00 nop
8004e2a: 3728 adds r7, #40 @ 0x28
8004e2c: 46bd mov sp, r7
8004e2e: bd80 pop {r7, pc}
8004e30: 40012400 .word 0x40012400
8004e34: 40021000 .word 0x40021000
8004e38: 40010800 .word 0x40010800
8004e3c: 40010c00 .word 0x40010c00
8004e40: 200002d4 .word 0x200002d4
8004e44: 40020008 .word 0x40020008
08004e48 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8004e48: b480 push {r7}
8004e4a: b085 sub sp, #20
8004e4c: af00 add r7, sp, #0
8004e4e: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
8004e50: 687b ldr r3, [r7, #4]
8004e52: 681b ldr r3, [r3, #0]
8004e54: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004e58: d10c bne.n 8004e74 <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
8004e5a: 4b11 ldr r3, [pc, #68] @ (8004ea0 <HAL_TIM_Base_MspInit+0x58>)
8004e5c: 69db ldr r3, [r3, #28]
8004e5e: 4a10 ldr r2, [pc, #64] @ (8004ea0 <HAL_TIM_Base_MspInit+0x58>)
8004e60: f043 0301 orr.w r3, r3, #1
8004e64: 61d3 str r3, [r2, #28]
8004e66: 4b0e ldr r3, [pc, #56] @ (8004ea0 <HAL_TIM_Base_MspInit+0x58>)
8004e68: 69db ldr r3, [r3, #28]
8004e6a: f003 0301 and.w r3, r3, #1
8004e6e: 60fb str r3, [r7, #12]
8004e70: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8004e72: e010 b.n 8004e96 <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
8004e74: 687b ldr r3, [r7, #4]
8004e76: 681b ldr r3, [r3, #0]
8004e78: 4a0a ldr r2, [pc, #40] @ (8004ea4 <HAL_TIM_Base_MspInit+0x5c>)
8004e7a: 4293 cmp r3, r2
8004e7c: d10b bne.n 8004e96 <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
8004e7e: 4b08 ldr r3, [pc, #32] @ (8004ea0 <HAL_TIM_Base_MspInit+0x58>)
8004e80: 69db ldr r3, [r3, #28]
8004e82: 4a07 ldr r2, [pc, #28] @ (8004ea0 <HAL_TIM_Base_MspInit+0x58>)
8004e84: f043 0304 orr.w r3, r3, #4
8004e88: 61d3 str r3, [r2, #28]
8004e8a: 4b05 ldr r3, [pc, #20] @ (8004ea0 <HAL_TIM_Base_MspInit+0x58>)
8004e8c: 69db ldr r3, [r3, #28]
8004e8e: f003 0304 and.w r3, r3, #4
8004e92: 60bb str r3, [r7, #8]
8004e94: 68bb ldr r3, [r7, #8]
}
8004e96: bf00 nop
8004e98: 3714 adds r7, #20
8004e9a: 46bd mov sp, r7
8004e9c: bc80 pop {r7}
8004e9e: 4770 bx lr
8004ea0: 40021000 .word 0x40021000
8004ea4: 40000800 .word 0x40000800
08004ea8 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8004ea8: b580 push {r7, lr}
8004eaa: b088 sub sp, #32
8004eac: af00 add r7, sp, #0
8004eae: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004eb0: f107 0310 add.w r3, r7, #16
8004eb4: 2200 movs r2, #0
8004eb6: 601a str r2, [r3, #0]
8004eb8: 605a str r2, [r3, #4]
8004eba: 609a str r2, [r3, #8]
8004ebc: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
8004ebe: 687b ldr r3, [r7, #4]
8004ec0: 681b ldr r3, [r3, #0]
8004ec2: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004ec6: d118 bne.n 8004efa <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8004ec8: 4b1d ldr r3, [pc, #116] @ (8004f40 <HAL_TIM_MspPostInit+0x98>)
8004eca: 699b ldr r3, [r3, #24]
8004ecc: 4a1c ldr r2, [pc, #112] @ (8004f40 <HAL_TIM_MspPostInit+0x98>)
8004ece: f043 0304 orr.w r3, r3, #4
8004ed2: 6193 str r3, [r2, #24]
8004ed4: 4b1a ldr r3, [pc, #104] @ (8004f40 <HAL_TIM_MspPostInit+0x98>)
8004ed6: 699b ldr r3, [r3, #24]
8004ed8: f003 0304 and.w r3, r3, #4
8004edc: 60fb str r3, [r7, #12]
8004ede: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
8004ee0: 230f movs r3, #15
8004ee2: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004ee4: 2302 movs r3, #2
8004ee6: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8004ee8: 2302 movs r3, #2
8004eea: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004eec: f107 0310 add.w r3, r7, #16
8004ef0: 4619 mov r1, r3
8004ef2: 4814 ldr r0, [pc, #80] @ (8004f44 <HAL_TIM_MspPostInit+0x9c>)
8004ef4: f001 fa4c bl 8006390 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
8004ef8: e01d b.n 8004f36 <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
8004efa: 687b ldr r3, [r7, #4]
8004efc: 681b ldr r3, [r3, #0]
8004efe: 4a12 ldr r2, [pc, #72] @ (8004f48 <HAL_TIM_MspPostInit+0xa0>)
8004f00: 4293 cmp r3, r2
8004f02: d118 bne.n 8004f36 <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
8004f04: 4b0e ldr r3, [pc, #56] @ (8004f40 <HAL_TIM_MspPostInit+0x98>)
8004f06: 699b ldr r3, [r3, #24]
8004f08: 4a0d ldr r2, [pc, #52] @ (8004f40 <HAL_TIM_MspPostInit+0x98>)
8004f0a: f043 0308 orr.w r3, r3, #8
8004f0e: 6193 str r3, [r2, #24]
8004f10: 4b0b ldr r3, [pc, #44] @ (8004f40 <HAL_TIM_MspPostInit+0x98>)
8004f12: 699b ldr r3, [r3, #24]
8004f14: f003 0308 and.w r3, r3, #8
8004f18: 60bb str r3, [r7, #8]
8004f1a: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
8004f1c: f44f 7370 mov.w r3, #960 @ 0x3c0
8004f20: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004f22: 2302 movs r3, #2
8004f24: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8004f26: 2302 movs r3, #2
8004f28: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8004f2a: f107 0310 add.w r3, r7, #16
8004f2e: 4619 mov r1, r3
8004f30: 4806 ldr r0, [pc, #24] @ (8004f4c <HAL_TIM_MspPostInit+0xa4>)
8004f32: f001 fa2d bl 8006390 <HAL_GPIO_Init>
}
8004f36: bf00 nop
8004f38: 3720 adds r7, #32
8004f3a: 46bd mov sp, r7
8004f3c: bd80 pop {r7, pc}
8004f3e: bf00 nop
8004f40: 40021000 .word 0x40021000
8004f44: 40010800 .word 0x40010800
8004f48: 40000800 .word 0x40000800
8004f4c: 40010c00 .word 0x40010c00
08004f50 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8004f50: b580 push {r7, lr}
8004f52: b088 sub sp, #32
8004f54: af00 add r7, sp, #0
8004f56: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004f58: f107 0310 add.w r3, r7, #16
8004f5c: 2200 movs r2, #0
8004f5e: 601a str r2, [r3, #0]
8004f60: 605a str r2, [r3, #4]
8004f62: 609a str r2, [r3, #8]
8004f64: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
8004f66: 687b ldr r3, [r7, #4]
8004f68: 681b ldr r3, [r3, #0]
8004f6a: 4a1c ldr r2, [pc, #112] @ (8004fdc <HAL_UART_MspInit+0x8c>)
8004f6c: 4293 cmp r3, r2
8004f6e: d131 bne.n 8004fd4 <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8004f70: 4b1b ldr r3, [pc, #108] @ (8004fe0 <HAL_UART_MspInit+0x90>)
8004f72: 699b ldr r3, [r3, #24]
8004f74: 4a1a ldr r2, [pc, #104] @ (8004fe0 <HAL_UART_MspInit+0x90>)
8004f76: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8004f7a: 6193 str r3, [r2, #24]
8004f7c: 4b18 ldr r3, [pc, #96] @ (8004fe0 <HAL_UART_MspInit+0x90>)
8004f7e: 699b ldr r3, [r3, #24]
8004f80: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004f84: 60fb str r3, [r7, #12]
8004f86: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004f88: 4b15 ldr r3, [pc, #84] @ (8004fe0 <HAL_UART_MspInit+0x90>)
8004f8a: 699b ldr r3, [r3, #24]
8004f8c: 4a14 ldr r2, [pc, #80] @ (8004fe0 <HAL_UART_MspInit+0x90>)
8004f8e: f043 0304 orr.w r3, r3, #4
8004f92: 6193 str r3, [r2, #24]
8004f94: 4b12 ldr r3, [pc, #72] @ (8004fe0 <HAL_UART_MspInit+0x90>)
8004f96: 699b ldr r3, [r3, #24]
8004f98: f003 0304 and.w r3, r3, #4
8004f9c: 60bb str r3, [r7, #8]
8004f9e: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
8004fa0: f44f 7300 mov.w r3, #512 @ 0x200
8004fa4: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004fa6: 2302 movs r3, #2
8004fa8: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8004faa: 2303 movs r3, #3
8004fac: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004fae: f107 0310 add.w r3, r7, #16
8004fb2: 4619 mov r1, r3
8004fb4: 480b ldr r0, [pc, #44] @ (8004fe4 <HAL_UART_MspInit+0x94>)
8004fb6: f001 f9eb bl 8006390 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
8004fba: f44f 6380 mov.w r3, #1024 @ 0x400
8004fbe: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8004fc0: 2300 movs r3, #0
8004fc2: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8004fc4: 2300 movs r3, #0
8004fc6: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004fc8: f107 0310 add.w r3, r7, #16
8004fcc: 4619 mov r1, r3
8004fce: 4805 ldr r0, [pc, #20] @ (8004fe4 <HAL_UART_MspInit+0x94>)
8004fd0: f001 f9de bl 8006390 <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8004fd4: bf00 nop
8004fd6: 3720 adds r7, #32
8004fd8: 46bd mov sp, r7
8004fda: bd80 pop {r7, pc}
8004fdc: 40013800 .word 0x40013800
8004fe0: 40021000 .word 0x40021000
8004fe4: 40010800 .word 0x40010800
08004fe8 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8004fe8: b480 push {r7}
8004fea: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8004fec: bf00 nop
8004fee: e7fd b.n 8004fec <NMI_Handler+0x4>
08004ff0 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8004ff0: b480 push {r7}
8004ff2: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8004ff4: bf00 nop
8004ff6: e7fd b.n 8004ff4 <HardFault_Handler+0x4>
08004ff8 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8004ff8: b480 push {r7}
8004ffa: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8004ffc: bf00 nop
8004ffe: e7fd b.n 8004ffc <MemManage_Handler+0x4>
08005000 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8005000: b480 push {r7}
8005002: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8005004: bf00 nop
8005006: e7fd b.n 8005004 <BusFault_Handler+0x4>
08005008 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8005008: b480 push {r7}
800500a: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
800500c: bf00 nop
800500e: e7fd b.n 800500c <UsageFault_Handler+0x4>
08005010 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8005010: b480 push {r7}
8005012: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8005014: bf00 nop
8005016: 46bd mov sp, r7
8005018: bc80 pop {r7}
800501a: 4770 bx lr
0800501c <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
800501c: b480 push {r7}
800501e: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8005020: bf00 nop
8005022: 46bd mov sp, r7
8005024: bc80 pop {r7}
8005026: 4770 bx lr
08005028 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8005028: b480 push {r7}
800502a: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
800502c: bf00 nop
800502e: 46bd mov sp, r7
8005030: bc80 pop {r7}
8005032: 4770 bx lr
08005034 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8005034: b580 push {r7, lr}
8005036: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8005038: f000 f8c0 bl 80051bc <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
800503c: f000 fdb3 bl 8005ba6 <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
8005040: bf00 nop
8005042: bd80 pop {r7, pc}
08005044 <DMA1_Channel1_IRQHandler>:
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
8005044: b580 push {r7, lr}
8005046: af00 add r7, sp, #0
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
8005048: 4802 ldr r0, [pc, #8] @ (8005054 <DMA1_Channel1_IRQHandler+0x10>)
800504a: f000 fe6d bl 8005d28 <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
800504e: bf00 nop
8005050: bd80 pop {r7, pc}
8005052: bf00 nop
8005054: 200002d4 .word 0x200002d4
08005058 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8005058: b580 push {r7, lr}
800505a: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
800505c: 4802 ldr r0, [pc, #8] @ (8005068 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
800505e: f001 fc66 bl 800692e <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8005062: bf00 nop
8005064: bd80 pop {r7, pc}
8005066: bf00 nop
8005068: 20001264 .word 0x20001264
0800506c <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
800506c: b580 push {r7, lr}
800506e: b086 sub sp, #24
8005070: af00 add r7, sp, #0
8005072: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8005074: 4a14 ldr r2, [pc, #80] @ (80050c8 <_sbrk+0x5c>)
8005076: 4b15 ldr r3, [pc, #84] @ (80050cc <_sbrk+0x60>)
8005078: 1ad3 subs r3, r2, r3
800507a: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
800507c: 697b ldr r3, [r7, #20]
800507e: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8005080: 4b13 ldr r3, [pc, #76] @ (80050d0 <_sbrk+0x64>)
8005082: 681b ldr r3, [r3, #0]
8005084: 2b00 cmp r3, #0
8005086: d102 bne.n 800508e <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8005088: 4b11 ldr r3, [pc, #68] @ (80050d0 <_sbrk+0x64>)
800508a: 4a12 ldr r2, [pc, #72] @ (80050d4 <_sbrk+0x68>)
800508c: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
800508e: 4b10 ldr r3, [pc, #64] @ (80050d0 <_sbrk+0x64>)
8005090: 681a ldr r2, [r3, #0]
8005092: 687b ldr r3, [r7, #4]
8005094: 4413 add r3, r2
8005096: 693a ldr r2, [r7, #16]
8005098: 429a cmp r2, r3
800509a: d207 bcs.n 80050ac <_sbrk+0x40>
{
errno = ENOMEM;
800509c: f009 fa2c bl 800e4f8 <__errno>
80050a0: 4603 mov r3, r0
80050a2: 220c movs r2, #12
80050a4: 601a str r2, [r3, #0]
return (void *)-1;
80050a6: f04f 33ff mov.w r3, #4294967295
80050aa: e009 b.n 80050c0 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
80050ac: 4b08 ldr r3, [pc, #32] @ (80050d0 <_sbrk+0x64>)
80050ae: 681b ldr r3, [r3, #0]
80050b0: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
80050b2: 4b07 ldr r3, [pc, #28] @ (80050d0 <_sbrk+0x64>)
80050b4: 681a ldr r2, [r3, #0]
80050b6: 687b ldr r3, [r7, #4]
80050b8: 4413 add r3, r2
80050ba: 4a05 ldr r2, [pc, #20] @ (80050d0 <_sbrk+0x64>)
80050bc: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
80050be: 68fb ldr r3, [r7, #12]
}
80050c0: 4618 mov r0, r3
80050c2: 3718 adds r7, #24
80050c4: 46bd mov sp, r7
80050c6: bd80 pop {r7, pc}
80050c8: 20005000 .word 0x20005000
80050cc: 00000400 .word 0x00000400
80050d0: 20000470 .word 0x20000470
80050d4: 200018a8 .word 0x200018a8
080050d8 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
80050d8: b480 push {r7}
80050da: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
80050dc: bf00 nop
80050de: 46bd mov sp, r7
80050e0: bc80 pop {r7}
80050e2: 4770 bx lr
080050e4 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
80050e4: f7ff fff8 bl 80050d8 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
80050e8: 480b ldr r0, [pc, #44] @ (8005118 <LoopFillZerobss+0xe>)
ldr r1, =_edata
80050ea: 490c ldr r1, [pc, #48] @ (800511c <LoopFillZerobss+0x12>)
ldr r2, =_sidata
80050ec: 4a0c ldr r2, [pc, #48] @ (8005120 <LoopFillZerobss+0x16>)
movs r3, #0
80050ee: 2300 movs r3, #0
b LoopCopyDataInit
80050f0: e002 b.n 80050f8 <LoopCopyDataInit>
080050f2 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
80050f2: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
80050f4: 50c4 str r4, [r0, r3]
adds r3, r3, #4
80050f6: 3304 adds r3, #4
080050f8 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
80050f8: 18c4 adds r4, r0, r3
cmp r4, r1
80050fa: 428c cmp r4, r1
bcc CopyDataInit
80050fc: d3f9 bcc.n 80050f2 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
80050fe: 4a09 ldr r2, [pc, #36] @ (8005124 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8005100: 4c09 ldr r4, [pc, #36] @ (8005128 <LoopFillZerobss+0x1e>)
movs r3, #0
8005102: 2300 movs r3, #0
b LoopFillZerobss
8005104: e001 b.n 800510a <LoopFillZerobss>
08005106 <FillZerobss>:
FillZerobss:
str r3, [r2]
8005106: 6013 str r3, [r2, #0]
adds r2, r2, #4
8005108: 3204 adds r2, #4
0800510a <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
800510a: 42a2 cmp r2, r4
bcc FillZerobss
800510c: d3fb bcc.n 8005106 <FillZerobss>
/* Call static constructors */
bl __libc_init_array
800510e: f009 f9f9 bl 800e504 <__libc_init_array>
/* Call the application's entry point.*/
bl main
8005112: f7fd ffa3 bl 800305c <main>
bx lr
8005116: 4770 bx lr
ldr r0, =_sdata
8005118: 20000000 .word 0x20000000
ldr r1, =_edata
800511c: 200001dc .word 0x200001dc
ldr r2, =_sidata
8005120: 0800f618 .word 0x0800f618
ldr r2, =_sbss
8005124: 200001e0 .word 0x200001e0
ldr r4, =_ebss
8005128: 200018a4 .word 0x200018a4
0800512c <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
800512c: e7fe b.n 800512c <ADC1_2_IRQHandler>
...
08005130 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8005130: b580 push {r7, lr}
8005132: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8005134: 4b08 ldr r3, [pc, #32] @ (8005158 <HAL_Init+0x28>)
8005136: 681b ldr r3, [r3, #0]
8005138: 4a07 ldr r2, [pc, #28] @ (8005158 <HAL_Init+0x28>)
800513a: f043 0310 orr.w r3, r3, #16
800513e: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8005140: 2003 movs r0, #3
8005142: f000 fcef bl 8005b24 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8005146: 200f movs r0, #15
8005148: f000 f808 bl 800515c <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
800514c: f7ff fdca bl 8004ce4 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8005150: 2300 movs r3, #0
}
8005152: 4618 mov r0, r3
8005154: bd80 pop {r7, pc}
8005156: bf00 nop
8005158: 40022000 .word 0x40022000
0800515c <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
800515c: b580 push {r7, lr}
800515e: b082 sub sp, #8
8005160: af00 add r7, sp, #0
8005162: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8005164: 4b12 ldr r3, [pc, #72] @ (80051b0 <HAL_InitTick+0x54>)
8005166: 681a ldr r2, [r3, #0]
8005168: 4b12 ldr r3, [pc, #72] @ (80051b4 <HAL_InitTick+0x58>)
800516a: 781b ldrb r3, [r3, #0]
800516c: 4619 mov r1, r3
800516e: f44f 737a mov.w r3, #1000 @ 0x3e8
8005172: fbb3 f3f1 udiv r3, r3, r1
8005176: fbb2 f3f3 udiv r3, r2, r3
800517a: 4618 mov r0, r3
800517c: f000 fd07 bl 8005b8e <HAL_SYSTICK_Config>
8005180: 4603 mov r3, r0
8005182: 2b00 cmp r3, #0
8005184: d001 beq.n 800518a <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8005186: 2301 movs r3, #1
8005188: e00e b.n 80051a8 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
800518a: 687b ldr r3, [r7, #4]
800518c: 2b0f cmp r3, #15
800518e: d80a bhi.n 80051a6 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8005190: 2200 movs r2, #0
8005192: 6879 ldr r1, [r7, #4]
8005194: f04f 30ff mov.w r0, #4294967295
8005198: f000 fccf bl 8005b3a <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
800519c: 4a06 ldr r2, [pc, #24] @ (80051b8 <HAL_InitTick+0x5c>)
800519e: 687b ldr r3, [r7, #4]
80051a0: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
80051a2: 2300 movs r3, #0
80051a4: e000 b.n 80051a8 <HAL_InitTick+0x4c>
return HAL_ERROR;
80051a6: 2301 movs r3, #1
}
80051a8: 4618 mov r0, r3
80051aa: 3708 adds r7, #8
80051ac: 46bd mov sp, r7
80051ae: bd80 pop {r7, pc}
80051b0: 20000010 .word 0x20000010
80051b4: 20000018 .word 0x20000018
80051b8: 20000014 .word 0x20000014
080051bc <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
80051bc: b480 push {r7}
80051be: af00 add r7, sp, #0
uwTick += uwTickFreq;
80051c0: 4b05 ldr r3, [pc, #20] @ (80051d8 <HAL_IncTick+0x1c>)
80051c2: 781b ldrb r3, [r3, #0]
80051c4: 461a mov r2, r3
80051c6: 4b05 ldr r3, [pc, #20] @ (80051dc <HAL_IncTick+0x20>)
80051c8: 681b ldr r3, [r3, #0]
80051ca: 4413 add r3, r2
80051cc: 4a03 ldr r2, [pc, #12] @ (80051dc <HAL_IncTick+0x20>)
80051ce: 6013 str r3, [r2, #0]
}
80051d0: bf00 nop
80051d2: 46bd mov sp, r7
80051d4: bc80 pop {r7}
80051d6: 4770 bx lr
80051d8: 20000018 .word 0x20000018
80051dc: 20000474 .word 0x20000474
080051e0 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
80051e0: b480 push {r7}
80051e2: af00 add r7, sp, #0
return uwTick;
80051e4: 4b02 ldr r3, [pc, #8] @ (80051f0 <HAL_GetTick+0x10>)
80051e6: 681b ldr r3, [r3, #0]
}
80051e8: 4618 mov r0, r3
80051ea: 46bd mov sp, r7
80051ec: bc80 pop {r7}
80051ee: 4770 bx lr
80051f0: 20000474 .word 0x20000474
080051f4 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
80051f4: b580 push {r7, lr}
80051f6: b086 sub sp, #24
80051f8: af00 add r7, sp, #0
80051fa: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
80051fc: 2300 movs r3, #0
80051fe: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
8005200: 2300 movs r3, #0
8005202: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
8005204: 2300 movs r3, #0
8005206: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
8005208: 2300 movs r3, #0
800520a: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
800520c: 687b ldr r3, [r7, #4]
800520e: 2b00 cmp r3, #0
8005210: d101 bne.n 8005216 <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
8005212: 2301 movs r3, #1
8005214: e0be b.n 8005394 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8005216: 687b ldr r3, [r7, #4]
8005218: 689b ldr r3, [r3, #8]
800521a: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
800521c: 687b ldr r3, [r7, #4]
800521e: 6a9b ldr r3, [r3, #40] @ 0x28
8005220: 2b00 cmp r3, #0
8005222: d109 bne.n 8005238 <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8005224: 687b ldr r3, [r7, #4]
8005226: 2200 movs r2, #0
8005228: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
800522a: 687b ldr r3, [r7, #4]
800522c: 2200 movs r2, #0
800522e: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8005232: 6878 ldr r0, [r7, #4]
8005234: f7ff fd88 bl 8004d48 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
8005238: 6878 ldr r0, [r7, #4]
800523a: f000 faff bl 800583c <ADC_ConversionStop_Disable>
800523e: 4603 mov r3, r0
8005240: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8005242: 687b ldr r3, [r7, #4]
8005244: 6a9b ldr r3, [r3, #40] @ 0x28
8005246: f003 0310 and.w r3, r3, #16
800524a: 2b00 cmp r3, #0
800524c: f040 8099 bne.w 8005382 <HAL_ADC_Init+0x18e>
8005250: 7dfb ldrb r3, [r7, #23]
8005252: 2b00 cmp r3, #0
8005254: f040 8095 bne.w 8005382 <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8005258: 687b ldr r3, [r7, #4]
800525a: 6a9b ldr r3, [r3, #40] @ 0x28
800525c: f423 5388 bic.w r3, r3, #4352 @ 0x1100
8005260: f023 0302 bic.w r3, r3, #2
8005264: f043 0202 orr.w r2, r3, #2
8005268: 687b ldr r3, [r7, #4]
800526a: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
800526c: 687b ldr r3, [r7, #4]
800526e: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8005270: 687b ldr r3, [r7, #4]
8005272: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8005274: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8005276: 687b ldr r3, [r7, #4]
8005278: 7b1b ldrb r3, [r3, #12]
800527a: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
800527c: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
800527e: 68ba ldr r2, [r7, #8]
8005280: 4313 orrs r3, r2
8005282: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8005284: 687b ldr r3, [r7, #4]
8005286: 689b ldr r3, [r3, #8]
8005288: f5b3 7f80 cmp.w r3, #256 @ 0x100
800528c: d003 beq.n 8005296 <HAL_ADC_Init+0xa2>
800528e: 687b ldr r3, [r7, #4]
8005290: 689b ldr r3, [r3, #8]
8005292: 2b01 cmp r3, #1
8005294: d102 bne.n 800529c <HAL_ADC_Init+0xa8>
8005296: f44f 7380 mov.w r3, #256 @ 0x100
800529a: e000 b.n 800529e <HAL_ADC_Init+0xaa>
800529c: 2300 movs r3, #0
800529e: 693a ldr r2, [r7, #16]
80052a0: 4313 orrs r3, r2
80052a2: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
80052a4: 687b ldr r3, [r7, #4]
80052a6: 7d1b ldrb r3, [r3, #20]
80052a8: 2b01 cmp r3, #1
80052aa: d119 bne.n 80052e0 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
80052ac: 687b ldr r3, [r7, #4]
80052ae: 7b1b ldrb r3, [r3, #12]
80052b0: 2b00 cmp r3, #0
80052b2: d109 bne.n 80052c8 <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
80052b4: 687b ldr r3, [r7, #4]
80052b6: 699b ldr r3, [r3, #24]
80052b8: 3b01 subs r3, #1
80052ba: 035a lsls r2, r3, #13
80052bc: 693b ldr r3, [r7, #16]
80052be: 4313 orrs r3, r2
80052c0: f443 6300 orr.w r3, r3, #2048 @ 0x800
80052c4: 613b str r3, [r7, #16]
80052c6: e00b b.n 80052e0 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
80052c8: 687b ldr r3, [r7, #4]
80052ca: 6a9b ldr r3, [r3, #40] @ 0x28
80052cc: f043 0220 orr.w r2, r3, #32
80052d0: 687b ldr r3, [r7, #4]
80052d2: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80052d4: 687b ldr r3, [r7, #4]
80052d6: 6adb ldr r3, [r3, #44] @ 0x2c
80052d8: f043 0201 orr.w r2, r3, #1
80052dc: 687b ldr r3, [r7, #4]
80052de: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
80052e0: 687b ldr r3, [r7, #4]
80052e2: 681b ldr r3, [r3, #0]
80052e4: 685b ldr r3, [r3, #4]
80052e6: f423 4169 bic.w r1, r3, #59648 @ 0xe900
80052ea: 687b ldr r3, [r7, #4]
80052ec: 681b ldr r3, [r3, #0]
80052ee: 693a ldr r2, [r7, #16]
80052f0: 430a orrs r2, r1
80052f2: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
80052f4: 687b ldr r3, [r7, #4]
80052f6: 681b ldr r3, [r3, #0]
80052f8: 689a ldr r2, [r3, #8]
80052fa: 4b28 ldr r3, [pc, #160] @ (800539c <HAL_ADC_Init+0x1a8>)
80052fc: 4013 ands r3, r2
80052fe: 687a ldr r2, [r7, #4]
8005300: 6812 ldr r2, [r2, #0]
8005302: 68b9 ldr r1, [r7, #8]
8005304: 430b orrs r3, r1
8005306: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
8005308: 687b ldr r3, [r7, #4]
800530a: 689b ldr r3, [r3, #8]
800530c: f5b3 7f80 cmp.w r3, #256 @ 0x100
8005310: d003 beq.n 800531a <HAL_ADC_Init+0x126>
8005312: 687b ldr r3, [r7, #4]
8005314: 689b ldr r3, [r3, #8]
8005316: 2b01 cmp r3, #1
8005318: d104 bne.n 8005324 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
800531a: 687b ldr r3, [r7, #4]
800531c: 691b ldr r3, [r3, #16]
800531e: 3b01 subs r3, #1
8005320: 051b lsls r3, r3, #20
8005322: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
8005324: 687b ldr r3, [r7, #4]
8005326: 681b ldr r3, [r3, #0]
8005328: 6adb ldr r3, [r3, #44] @ 0x2c
800532a: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
800532e: 687b ldr r3, [r7, #4]
8005330: 681b ldr r3, [r3, #0]
8005332: 68fa ldr r2, [r7, #12]
8005334: 430a orrs r2, r1
8005336: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8005338: 687b ldr r3, [r7, #4]
800533a: 681b ldr r3, [r3, #0]
800533c: 689a ldr r2, [r3, #8]
800533e: 4b18 ldr r3, [pc, #96] @ (80053a0 <HAL_ADC_Init+0x1ac>)
8005340: 4013 ands r3, r2
8005342: 68ba ldr r2, [r7, #8]
8005344: 429a cmp r2, r3
8005346: d10b bne.n 8005360 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8005348: 687b ldr r3, [r7, #4]
800534a: 2200 movs r2, #0
800534c: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
800534e: 687b ldr r3, [r7, #4]
8005350: 6a9b ldr r3, [r3, #40] @ 0x28
8005352: f023 0303 bic.w r3, r3, #3
8005356: f043 0201 orr.w r2, r3, #1
800535a: 687b ldr r3, [r7, #4]
800535c: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
800535e: e018 b.n 8005392 <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8005360: 687b ldr r3, [r7, #4]
8005362: 6a9b ldr r3, [r3, #40] @ 0x28
8005364: f023 0312 bic.w r3, r3, #18
8005368: f043 0210 orr.w r2, r3, #16
800536c: 687b ldr r3, [r7, #4]
800536e: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8005370: 687b ldr r3, [r7, #4]
8005372: 6adb ldr r3, [r3, #44] @ 0x2c
8005374: f043 0201 orr.w r2, r3, #1
8005378: 687b ldr r3, [r7, #4]
800537a: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
800537c: 2301 movs r3, #1
800537e: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8005380: e007 b.n 8005392 <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8005382: 687b ldr r3, [r7, #4]
8005384: 6a9b ldr r3, [r3, #40] @ 0x28
8005386: f043 0210 orr.w r2, r3, #16
800538a: 687b ldr r3, [r7, #4]
800538c: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
800538e: 2301 movs r3, #1
8005390: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8005392: 7dfb ldrb r3, [r7, #23]
}
8005394: 4618 mov r0, r3
8005396: 3718 adds r7, #24
8005398: 46bd mov sp, r7
800539a: bd80 pop {r7, pc}
800539c: ffe1f7fd .word 0xffe1f7fd
80053a0: ff1f0efe .word 0xff1f0efe
080053a4 <HAL_ADC_Start_DMA>:
* @param pData: The destination Buffer address.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @retval None
*/
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
{
80053a4: b580 push {r7, lr}
80053a6: b086 sub sp, #24
80053a8: af00 add r7, sp, #0
80053aa: 60f8 str r0, [r7, #12]
80053ac: 60b9 str r1, [r7, #8]
80053ae: 607a str r2, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
80053b0: 2300 movs r3, #0
80053b2: 75fb strb r3, [r7, #23]
assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
/* Verification if multimode is disabled (for devices with several ADC) */
/* If multimode is enabled, dedicated function multimode conversion */
/* start DMA must be used. */
if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
80053b4: 68fb ldr r3, [r7, #12]
80053b6: 681b ldr r3, [r3, #0]
80053b8: 4a64 ldr r2, [pc, #400] @ (800554c <HAL_ADC_Start_DMA+0x1a8>)
80053ba: 4293 cmp r3, r2
80053bc: d004 beq.n 80053c8 <HAL_ADC_Start_DMA+0x24>
80053be: 68fb ldr r3, [r7, #12]
80053c0: 681b ldr r3, [r3, #0]
80053c2: 4a63 ldr r2, [pc, #396] @ (8005550 <HAL_ADC_Start_DMA+0x1ac>)
80053c4: 4293 cmp r3, r2
80053c6: d106 bne.n 80053d6 <HAL_ADC_Start_DMA+0x32>
80053c8: 4b60 ldr r3, [pc, #384] @ (800554c <HAL_ADC_Start_DMA+0x1a8>)
80053ca: 685b ldr r3, [r3, #4]
80053cc: f403 2370 and.w r3, r3, #983040 @ 0xf0000
80053d0: 2b00 cmp r3, #0
80053d2: f040 80b3 bne.w 800553c <HAL_ADC_Start_DMA+0x198>
{
/* Process locked */
__HAL_LOCK(hadc);
80053d6: 68fb ldr r3, [r7, #12]
80053d8: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
80053dc: 2b01 cmp r3, #1
80053de: d101 bne.n 80053e4 <HAL_ADC_Start_DMA+0x40>
80053e0: 2302 movs r3, #2
80053e2: e0ae b.n 8005542 <HAL_ADC_Start_DMA+0x19e>
80053e4: 68fb ldr r3, [r7, #12]
80053e6: 2201 movs r2, #1
80053e8: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Enable the ADC peripheral */
tmp_hal_status = ADC_Enable(hadc);
80053ec: 68f8 ldr r0, [r7, #12]
80053ee: f000 f9cb bl 8005788 <ADC_Enable>
80053f2: 4603 mov r3, r0
80053f4: 75fb strb r3, [r7, #23]
/* Start conversion if ADC is effectively enabled */
if (tmp_hal_status == HAL_OK)
80053f6: 7dfb ldrb r3, [r7, #23]
80053f8: 2b00 cmp r3, #0
80053fa: f040 809a bne.w 8005532 <HAL_ADC_Start_DMA+0x18e>
{
/* Set ADC state */
/* - Clear state bitfield related to regular group conversion results */
/* - Set state bitfield related to regular operation */
ADC_STATE_CLR_SET(hadc->State,
80053fe: 68fb ldr r3, [r7, #12]
8005400: 6a9b ldr r3, [r3, #40] @ 0x28
8005402: f423 6370 bic.w r3, r3, #3840 @ 0xf00
8005406: f023 0301 bic.w r3, r3, #1
800540a: f443 7280 orr.w r2, r3, #256 @ 0x100
800540e: 68fb ldr r3, [r7, #12]
8005410: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_REG_BUSY);
/* Set group injected state (from auto-injection) and multimode state */
/* for all cases of multimode: independent mode, multimode ADC master */
/* or multimode ADC slave (for devices with several ADCs): */
if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
8005412: 68fb ldr r3, [r7, #12]
8005414: 681b ldr r3, [r3, #0]
8005416: 4a4e ldr r2, [pc, #312] @ (8005550 <HAL_ADC_Start_DMA+0x1ac>)
8005418: 4293 cmp r3, r2
800541a: d105 bne.n 8005428 <HAL_ADC_Start_DMA+0x84>
800541c: 4b4b ldr r3, [pc, #300] @ (800554c <HAL_ADC_Start_DMA+0x1a8>)
800541e: 685b ldr r3, [r3, #4]
8005420: f403 2370 and.w r3, r3, #983040 @ 0xf0000
8005424: 2b00 cmp r3, #0
8005426: d115 bne.n 8005454 <HAL_ADC_Start_DMA+0xb0>
{
/* Set ADC state (ADC independent or master) */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8005428: 68fb ldr r3, [r7, #12]
800542a: 6a9b ldr r3, [r3, #40] @ 0x28
800542c: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
8005430: 68fb ldr r3, [r7, #12]
8005432: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8005434: 68fb ldr r3, [r7, #12]
8005436: 681b ldr r3, [r3, #0]
8005438: 685b ldr r3, [r3, #4]
800543a: f403 6380 and.w r3, r3, #1024 @ 0x400
800543e: 2b00 cmp r3, #0
8005440: d026 beq.n 8005490 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8005442: 68fb ldr r3, [r7, #12]
8005444: 6a9b ldr r3, [r3, #40] @ 0x28
8005446: f423 5340 bic.w r3, r3, #12288 @ 0x3000
800544a: f443 5280 orr.w r2, r3, #4096 @ 0x1000
800544e: 68fb ldr r3, [r7, #12]
8005450: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8005452: e01d b.n 8005490 <HAL_ADC_Start_DMA+0xec>
}
}
else
{
/* Set ADC state (ADC slave) */
SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8005454: 68fb ldr r3, [r7, #12]
8005456: 6a9b ldr r3, [r3, #40] @ 0x28
8005458: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
800545c: 68fb ldr r3, [r7, #12]
800545e: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
8005460: 68fb ldr r3, [r7, #12]
8005462: 681b ldr r3, [r3, #0]
8005464: 4a39 ldr r2, [pc, #228] @ (800554c <HAL_ADC_Start_DMA+0x1a8>)
8005466: 4293 cmp r3, r2
8005468: d004 beq.n 8005474 <HAL_ADC_Start_DMA+0xd0>
800546a: 68fb ldr r3, [r7, #12]
800546c: 681b ldr r3, [r3, #0]
800546e: 4a38 ldr r2, [pc, #224] @ (8005550 <HAL_ADC_Start_DMA+0x1ac>)
8005470: 4293 cmp r3, r2
8005472: d10d bne.n 8005490 <HAL_ADC_Start_DMA+0xec>
8005474: 4b35 ldr r3, [pc, #212] @ (800554c <HAL_ADC_Start_DMA+0x1a8>)
8005476: 685b ldr r3, [r3, #4]
8005478: f403 6380 and.w r3, r3, #1024 @ 0x400
800547c: 2b00 cmp r3, #0
800547e: d007 beq.n 8005490 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8005480: 68fb ldr r3, [r7, #12]
8005482: 6a9b ldr r3, [r3, #40] @ 0x28
8005484: f423 5340 bic.w r3, r3, #12288 @ 0x3000
8005488: f443 5280 orr.w r2, r3, #4096 @ 0x1000
800548c: 68fb ldr r3, [r7, #12]
800548e: 629a str r2, [r3, #40] @ 0x28
}
}
/* State machine update: Check if an injected conversion is ongoing */
if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8005490: 68fb ldr r3, [r7, #12]
8005492: 6a9b ldr r3, [r3, #40] @ 0x28
8005494: f403 5380 and.w r3, r3, #4096 @ 0x1000
8005498: 2b00 cmp r3, #0
800549a: d006 beq.n 80054aa <HAL_ADC_Start_DMA+0x106>
{
/* Reset ADC error code fields related to conversions on group regular */
CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
800549c: 68fb ldr r3, [r7, #12]
800549e: 6adb ldr r3, [r3, #44] @ 0x2c
80054a0: f023 0206 bic.w r2, r3, #6
80054a4: 68fb ldr r3, [r7, #12]
80054a6: 62da str r2, [r3, #44] @ 0x2c
80054a8: e002 b.n 80054b0 <HAL_ADC_Start_DMA+0x10c>
}
else
{
/* Reset ADC all error code fields */
ADC_CLEAR_ERRORCODE(hadc);
80054aa: 68fb ldr r3, [r7, #12]
80054ac: 2200 movs r2, #0
80054ae: 62da str r2, [r3, #44] @ 0x2c
}
/* Process unlocked */
/* Unlock before starting ADC conversions: in case of potential */
/* interruption, to let the process to ADC IRQ Handler. */
__HAL_UNLOCK(hadc);
80054b0: 68fb ldr r3, [r7, #12]
80054b2: 2200 movs r2, #0
80054b4: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Set the DMA transfer complete callback */
hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
80054b8: 68fb ldr r3, [r7, #12]
80054ba: 6a1b ldr r3, [r3, #32]
80054bc: 4a25 ldr r2, [pc, #148] @ (8005554 <HAL_ADC_Start_DMA+0x1b0>)
80054be: 629a str r2, [r3, #40] @ 0x28
/* Set the DMA half transfer complete callback */
hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
80054c0: 68fb ldr r3, [r7, #12]
80054c2: 6a1b ldr r3, [r3, #32]
80054c4: 4a24 ldr r2, [pc, #144] @ (8005558 <HAL_ADC_Start_DMA+0x1b4>)
80054c6: 62da str r2, [r3, #44] @ 0x2c
/* Set the DMA error callback */
hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
80054c8: 68fb ldr r3, [r7, #12]
80054ca: 6a1b ldr r3, [r3, #32]
80054cc: 4a23 ldr r2, [pc, #140] @ (800555c <HAL_ADC_Start_DMA+0x1b8>)
80054ce: 631a str r2, [r3, #48] @ 0x30
/* start (in case of SW start): */
/* Clear regular group conversion flag and overrun flag */
/* (To ensure of no unknown state from potential previous ADC */
/* operations) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
80054d0: 68fb ldr r3, [r7, #12]
80054d2: 681b ldr r3, [r3, #0]
80054d4: f06f 0202 mvn.w r2, #2
80054d8: 601a str r2, [r3, #0]
/* Enable ADC DMA mode */
SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
80054da: 68fb ldr r3, [r7, #12]
80054dc: 681b ldr r3, [r3, #0]
80054de: 689a ldr r2, [r3, #8]
80054e0: 68fb ldr r3, [r7, #12]
80054e2: 681b ldr r3, [r3, #0]
80054e4: f442 7280 orr.w r2, r2, #256 @ 0x100
80054e8: 609a str r2, [r3, #8]
/* Start the DMA channel */
HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
80054ea: 68fb ldr r3, [r7, #12]
80054ec: 6a18 ldr r0, [r3, #32]
80054ee: 68fb ldr r3, [r7, #12]
80054f0: 681b ldr r3, [r3, #0]
80054f2: 334c adds r3, #76 @ 0x4c
80054f4: 4619 mov r1, r3
80054f6: 68ba ldr r2, [r7, #8]
80054f8: 687b ldr r3, [r7, #4]
80054fa: f000 fbb5 bl 8005c68 <HAL_DMA_Start_IT>
/* Enable conversion of regular group. */
/* If software start has been selected, conversion starts immediately. */
/* If external trigger has been selected, conversion will start at next */
/* trigger event. */
if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
80054fe: 68fb ldr r3, [r7, #12]
8005500: 681b ldr r3, [r3, #0]
8005502: 689b ldr r3, [r3, #8]
8005504: f403 2360 and.w r3, r3, #917504 @ 0xe0000
8005508: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
800550c: d108 bne.n 8005520 <HAL_ADC_Start_DMA+0x17c>
{
/* Start ADC conversion on regular group with SW start */
SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
800550e: 68fb ldr r3, [r7, #12]
8005510: 681b ldr r3, [r3, #0]
8005512: 689a ldr r2, [r3, #8]
8005514: 68fb ldr r3, [r7, #12]
8005516: 681b ldr r3, [r3, #0]
8005518: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000
800551c: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
800551e: e00f b.n 8005540 <HAL_ADC_Start_DMA+0x19c>
}
else
{
/* Start ADC conversion on regular group with external trigger */
SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
8005520: 68fb ldr r3, [r7, #12]
8005522: 681b ldr r3, [r3, #0]
8005524: 689a ldr r2, [r3, #8]
8005526: 68fb ldr r3, [r7, #12]
8005528: 681b ldr r3, [r3, #0]
800552a: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
800552e: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
8005530: e006 b.n 8005540 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hadc);
8005532: 68fb ldr r3, [r7, #12]
8005534: 2200 movs r2, #0
8005536: f883 2024 strb.w r2, [r3, #36] @ 0x24
if (tmp_hal_status == HAL_OK)
800553a: e001 b.n 8005540 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
tmp_hal_status = HAL_ERROR;
800553c: 2301 movs r3, #1
800553e: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8005540: 7dfb ldrb r3, [r7, #23]
}
8005542: 4618 mov r0, r3
8005544: 3718 adds r7, #24
8005546: 46bd mov sp, r7
8005548: bd80 pop {r7, pc}
800554a: bf00 nop
800554c: 40012400 .word 0x40012400
8005550: 40012800 .word 0x40012800
8005554: 080058bf .word 0x080058bf
8005558: 0800593b .word 0x0800593b
800555c: 08005957 .word 0x08005957
08005560 <HAL_ADC_ConvCpltCallback>:
* @brief Conversion complete callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
8005560: b480 push {r7}
8005562: b083 sub sp, #12
8005564: af00 add r7, sp, #0
8005566: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvCpltCallback must be implemented in the user file.
*/
}
8005568: bf00 nop
800556a: 370c adds r7, #12
800556c: 46bd mov sp, r7
800556e: bc80 pop {r7}
8005570: 4770 bx lr
08005572 <HAL_ADC_ConvHalfCpltCallback>:
* @brief Conversion DMA half-transfer callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
{
8005572: b480 push {r7}
8005574: b083 sub sp, #12
8005576: af00 add r7, sp, #0
8005578: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
*/
}
800557a: bf00 nop
800557c: 370c adds r7, #12
800557e: 46bd mov sp, r7
8005580: bc80 pop {r7}
8005582: 4770 bx lr
08005584 <HAL_ADC_ErrorCallback>:
* (ADC conversion with interruption or transfer by DMA)
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
8005584: b480 push {r7}
8005586: b083 sub sp, #12
8005588: af00 add r7, sp, #0
800558a: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ErrorCallback must be implemented in the user file.
*/
}
800558c: bf00 nop
800558e: 370c adds r7, #12
8005590: 46bd mov sp, r7
8005592: bc80 pop {r7}
8005594: 4770 bx lr
...
08005598 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8005598: b480 push {r7}
800559a: b085 sub sp, #20
800559c: af00 add r7, sp, #0
800559e: 6078 str r0, [r7, #4]
80055a0: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
80055a2: 2300 movs r3, #0
80055a4: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
80055a6: 2300 movs r3, #0
80055a8: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
80055aa: 687b ldr r3, [r7, #4]
80055ac: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
80055b0: 2b01 cmp r3, #1
80055b2: d101 bne.n 80055b8 <HAL_ADC_ConfigChannel+0x20>
80055b4: 2302 movs r3, #2
80055b6: e0dc b.n 8005772 <HAL_ADC_ConfigChannel+0x1da>
80055b8: 687b ldr r3, [r7, #4]
80055ba: 2201 movs r2, #1
80055bc: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
80055c0: 683b ldr r3, [r7, #0]
80055c2: 685b ldr r3, [r3, #4]
80055c4: 2b06 cmp r3, #6
80055c6: d81c bhi.n 8005602 <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
80055c8: 687b ldr r3, [r7, #4]
80055ca: 681b ldr r3, [r3, #0]
80055cc: 6b59 ldr r1, [r3, #52] @ 0x34
80055ce: 683b ldr r3, [r7, #0]
80055d0: 685a ldr r2, [r3, #4]
80055d2: 4613 mov r3, r2
80055d4: 009b lsls r3, r3, #2
80055d6: 4413 add r3, r2
80055d8: 3b05 subs r3, #5
80055da: 221f movs r2, #31
80055dc: fa02 f303 lsl.w r3, r2, r3
80055e0: 43db mvns r3, r3
80055e2: 4019 ands r1, r3
80055e4: 683b ldr r3, [r7, #0]
80055e6: 6818 ldr r0, [r3, #0]
80055e8: 683b ldr r3, [r7, #0]
80055ea: 685a ldr r2, [r3, #4]
80055ec: 4613 mov r3, r2
80055ee: 009b lsls r3, r3, #2
80055f0: 4413 add r3, r2
80055f2: 3b05 subs r3, #5
80055f4: fa00 f203 lsl.w r2, r0, r3
80055f8: 687b ldr r3, [r7, #4]
80055fa: 681b ldr r3, [r3, #0]
80055fc: 430a orrs r2, r1
80055fe: 635a str r2, [r3, #52] @ 0x34
8005600: e03c b.n 800567c <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
8005602: 683b ldr r3, [r7, #0]
8005604: 685b ldr r3, [r3, #4]
8005606: 2b0c cmp r3, #12
8005608: d81c bhi.n 8005644 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
800560a: 687b ldr r3, [r7, #4]
800560c: 681b ldr r3, [r3, #0]
800560e: 6b19 ldr r1, [r3, #48] @ 0x30
8005610: 683b ldr r3, [r7, #0]
8005612: 685a ldr r2, [r3, #4]
8005614: 4613 mov r3, r2
8005616: 009b lsls r3, r3, #2
8005618: 4413 add r3, r2
800561a: 3b23 subs r3, #35 @ 0x23
800561c: 221f movs r2, #31
800561e: fa02 f303 lsl.w r3, r2, r3
8005622: 43db mvns r3, r3
8005624: 4019 ands r1, r3
8005626: 683b ldr r3, [r7, #0]
8005628: 6818 ldr r0, [r3, #0]
800562a: 683b ldr r3, [r7, #0]
800562c: 685a ldr r2, [r3, #4]
800562e: 4613 mov r3, r2
8005630: 009b lsls r3, r3, #2
8005632: 4413 add r3, r2
8005634: 3b23 subs r3, #35 @ 0x23
8005636: fa00 f203 lsl.w r2, r0, r3
800563a: 687b ldr r3, [r7, #4]
800563c: 681b ldr r3, [r3, #0]
800563e: 430a orrs r2, r1
8005640: 631a str r2, [r3, #48] @ 0x30
8005642: e01b b.n 800567c <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
8005644: 687b ldr r3, [r7, #4]
8005646: 681b ldr r3, [r3, #0]
8005648: 6ad9 ldr r1, [r3, #44] @ 0x2c
800564a: 683b ldr r3, [r7, #0]
800564c: 685a ldr r2, [r3, #4]
800564e: 4613 mov r3, r2
8005650: 009b lsls r3, r3, #2
8005652: 4413 add r3, r2
8005654: 3b41 subs r3, #65 @ 0x41
8005656: 221f movs r2, #31
8005658: fa02 f303 lsl.w r3, r2, r3
800565c: 43db mvns r3, r3
800565e: 4019 ands r1, r3
8005660: 683b ldr r3, [r7, #0]
8005662: 6818 ldr r0, [r3, #0]
8005664: 683b ldr r3, [r7, #0]
8005666: 685a ldr r2, [r3, #4]
8005668: 4613 mov r3, r2
800566a: 009b lsls r3, r3, #2
800566c: 4413 add r3, r2
800566e: 3b41 subs r3, #65 @ 0x41
8005670: fa00 f203 lsl.w r2, r0, r3
8005674: 687b ldr r3, [r7, #4]
8005676: 681b ldr r3, [r3, #0]
8005678: 430a orrs r2, r1
800567a: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
800567c: 683b ldr r3, [r7, #0]
800567e: 681b ldr r3, [r3, #0]
8005680: 2b09 cmp r3, #9
8005682: d91c bls.n 80056be <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
8005684: 687b ldr r3, [r7, #4]
8005686: 681b ldr r3, [r3, #0]
8005688: 68d9 ldr r1, [r3, #12]
800568a: 683b ldr r3, [r7, #0]
800568c: 681a ldr r2, [r3, #0]
800568e: 4613 mov r3, r2
8005690: 005b lsls r3, r3, #1
8005692: 4413 add r3, r2
8005694: 3b1e subs r3, #30
8005696: 2207 movs r2, #7
8005698: fa02 f303 lsl.w r3, r2, r3
800569c: 43db mvns r3, r3
800569e: 4019 ands r1, r3
80056a0: 683b ldr r3, [r7, #0]
80056a2: 6898 ldr r0, [r3, #8]
80056a4: 683b ldr r3, [r7, #0]
80056a6: 681a ldr r2, [r3, #0]
80056a8: 4613 mov r3, r2
80056aa: 005b lsls r3, r3, #1
80056ac: 4413 add r3, r2
80056ae: 3b1e subs r3, #30
80056b0: fa00 f203 lsl.w r2, r0, r3
80056b4: 687b ldr r3, [r7, #4]
80056b6: 681b ldr r3, [r3, #0]
80056b8: 430a orrs r2, r1
80056ba: 60da str r2, [r3, #12]
80056bc: e019 b.n 80056f2 <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
80056be: 687b ldr r3, [r7, #4]
80056c0: 681b ldr r3, [r3, #0]
80056c2: 6919 ldr r1, [r3, #16]
80056c4: 683b ldr r3, [r7, #0]
80056c6: 681a ldr r2, [r3, #0]
80056c8: 4613 mov r3, r2
80056ca: 005b lsls r3, r3, #1
80056cc: 4413 add r3, r2
80056ce: 2207 movs r2, #7
80056d0: fa02 f303 lsl.w r3, r2, r3
80056d4: 43db mvns r3, r3
80056d6: 4019 ands r1, r3
80056d8: 683b ldr r3, [r7, #0]
80056da: 6898 ldr r0, [r3, #8]
80056dc: 683b ldr r3, [r7, #0]
80056de: 681a ldr r2, [r3, #0]
80056e0: 4613 mov r3, r2
80056e2: 005b lsls r3, r3, #1
80056e4: 4413 add r3, r2
80056e6: fa00 f203 lsl.w r2, r0, r3
80056ea: 687b ldr r3, [r7, #4]
80056ec: 681b ldr r3, [r3, #0]
80056ee: 430a orrs r2, r1
80056f0: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
80056f2: 683b ldr r3, [r7, #0]
80056f4: 681b ldr r3, [r3, #0]
80056f6: 2b10 cmp r3, #16
80056f8: d003 beq.n 8005702 <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
80056fa: 683b ldr r3, [r7, #0]
80056fc: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
80056fe: 2b11 cmp r3, #17
8005700: d132 bne.n 8005768 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
8005702: 687b ldr r3, [r7, #4]
8005704: 681b ldr r3, [r3, #0]
8005706: 4a1d ldr r2, [pc, #116] @ (800577c <HAL_ADC_ConfigChannel+0x1e4>)
8005708: 4293 cmp r3, r2
800570a: d125 bne.n 8005758 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
800570c: 687b ldr r3, [r7, #4]
800570e: 681b ldr r3, [r3, #0]
8005710: 689b ldr r3, [r3, #8]
8005712: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8005716: 2b00 cmp r3, #0
8005718: d126 bne.n 8005768 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
800571a: 687b ldr r3, [r7, #4]
800571c: 681b ldr r3, [r3, #0]
800571e: 689a ldr r2, [r3, #8]
8005720: 687b ldr r3, [r7, #4]
8005722: 681b ldr r3, [r3, #0]
8005724: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8005728: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
800572a: 683b ldr r3, [r7, #0]
800572c: 681b ldr r3, [r3, #0]
800572e: 2b10 cmp r3, #16
8005730: d11a bne.n 8005768 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
8005732: 4b13 ldr r3, [pc, #76] @ (8005780 <HAL_ADC_ConfigChannel+0x1e8>)
8005734: 681b ldr r3, [r3, #0]
8005736: 4a13 ldr r2, [pc, #76] @ (8005784 <HAL_ADC_ConfigChannel+0x1ec>)
8005738: fba2 2303 umull r2, r3, r2, r3
800573c: 0c9a lsrs r2, r3, #18
800573e: 4613 mov r3, r2
8005740: 009b lsls r3, r3, #2
8005742: 4413 add r3, r2
8005744: 005b lsls r3, r3, #1
8005746: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005748: e002 b.n 8005750 <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
800574a: 68bb ldr r3, [r7, #8]
800574c: 3b01 subs r3, #1
800574e: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005750: 68bb ldr r3, [r7, #8]
8005752: 2b00 cmp r3, #0
8005754: d1f9 bne.n 800574a <HAL_ADC_ConfigChannel+0x1b2>
8005756: e007 b.n 8005768 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8005758: 687b ldr r3, [r7, #4]
800575a: 6a9b ldr r3, [r3, #40] @ 0x28
800575c: f043 0220 orr.w r2, r3, #32
8005760: 687b ldr r3, [r7, #4]
8005762: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8005764: 2301 movs r3, #1
8005766: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8005768: 687b ldr r3, [r7, #4]
800576a: 2200 movs r2, #0
800576c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
8005770: 7bfb ldrb r3, [r7, #15]
}
8005772: 4618 mov r0, r3
8005774: 3714 adds r7, #20
8005776: 46bd mov sp, r7
8005778: bc80 pop {r7}
800577a: 4770 bx lr
800577c: 40012400 .word 0x40012400
8005780: 20000010 .word 0x20000010
8005784: 431bde83 .word 0x431bde83
08005788 <ADC_Enable>:
* and voltage regulator must be enabled (done into HAL_ADC_Init()).
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
{
8005788: b580 push {r7, lr}
800578a: b084 sub sp, #16
800578c: af00 add r7, sp, #0
800578e: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8005790: 2300 movs r3, #0
8005792: 60fb str r3, [r7, #12]
__IO uint32_t wait_loop_index = 0U;
8005794: 2300 movs r3, #0
8005796: 60bb str r3, [r7, #8]
/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
/* enabling phase not yet completed: flag ADC ready not yet set). */
/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
/* causes: ADC clock not running, ...). */
if (ADC_IS_ENABLE(hadc) == RESET)
8005798: 687b ldr r3, [r7, #4]
800579a: 681b ldr r3, [r3, #0]
800579c: 689b ldr r3, [r3, #8]
800579e: f003 0301 and.w r3, r3, #1
80057a2: 2b01 cmp r3, #1
80057a4: d040 beq.n 8005828 <ADC_Enable+0xa0>
{
/* Enable the Peripheral */
__HAL_ADC_ENABLE(hadc);
80057a6: 687b ldr r3, [r7, #4]
80057a8: 681b ldr r3, [r3, #0]
80057aa: 689a ldr r2, [r3, #8]
80057ac: 687b ldr r3, [r7, #4]
80057ae: 681b ldr r3, [r3, #0]
80057b0: f042 0201 orr.w r2, r2, #1
80057b4: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
80057b6: 4b1f ldr r3, [pc, #124] @ (8005834 <ADC_Enable+0xac>)
80057b8: 681b ldr r3, [r3, #0]
80057ba: 4a1f ldr r2, [pc, #124] @ (8005838 <ADC_Enable+0xb0>)
80057bc: fba2 2303 umull r2, r3, r2, r3
80057c0: 0c9b lsrs r3, r3, #18
80057c2: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80057c4: e002 b.n 80057cc <ADC_Enable+0x44>
{
wait_loop_index--;
80057c6: 68bb ldr r3, [r7, #8]
80057c8: 3b01 subs r3, #1
80057ca: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80057cc: 68bb ldr r3, [r7, #8]
80057ce: 2b00 cmp r3, #0
80057d0: d1f9 bne.n 80057c6 <ADC_Enable+0x3e>
}
/* Get tick count */
tickstart = HAL_GetTick();
80057d2: f7ff fd05 bl 80051e0 <HAL_GetTick>
80057d6: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively enabled */
while(ADC_IS_ENABLE(hadc) == RESET)
80057d8: e01f b.n 800581a <ADC_Enable+0x92>
{
if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
80057da: f7ff fd01 bl 80051e0 <HAL_GetTick>
80057de: 4602 mov r2, r0
80057e0: 68fb ldr r3, [r7, #12]
80057e2: 1ad3 subs r3, r2, r3
80057e4: 2b02 cmp r3, #2
80057e6: d918 bls.n 800581a <ADC_Enable+0x92>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) == RESET)
80057e8: 687b ldr r3, [r7, #4]
80057ea: 681b ldr r3, [r3, #0]
80057ec: 689b ldr r3, [r3, #8]
80057ee: f003 0301 and.w r3, r3, #1
80057f2: 2b01 cmp r3, #1
80057f4: d011 beq.n 800581a <ADC_Enable+0x92>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80057f6: 687b ldr r3, [r7, #4]
80057f8: 6a9b ldr r3, [r3, #40] @ 0x28
80057fa: f043 0210 orr.w r2, r3, #16
80057fe: 687b ldr r3, [r7, #4]
8005800: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8005802: 687b ldr r3, [r7, #4]
8005804: 6adb ldr r3, [r3, #44] @ 0x2c
8005806: f043 0201 orr.w r2, r3, #1
800580a: 687b ldr r3, [r7, #4]
800580c: 62da str r2, [r3, #44] @ 0x2c
/* Process unlocked */
__HAL_UNLOCK(hadc);
800580e: 687b ldr r3, [r7, #4]
8005810: 2200 movs r2, #0
8005812: f883 2024 strb.w r2, [r3, #36] @ 0x24
return HAL_ERROR;
8005816: 2301 movs r3, #1
8005818: e007 b.n 800582a <ADC_Enable+0xa2>
while(ADC_IS_ENABLE(hadc) == RESET)
800581a: 687b ldr r3, [r7, #4]
800581c: 681b ldr r3, [r3, #0]
800581e: 689b ldr r3, [r3, #8]
8005820: f003 0301 and.w r3, r3, #1
8005824: 2b01 cmp r3, #1
8005826: d1d8 bne.n 80057da <ADC_Enable+0x52>
}
}
}
/* Return HAL status */
return HAL_OK;
8005828: 2300 movs r3, #0
}
800582a: 4618 mov r0, r3
800582c: 3710 adds r7, #16
800582e: 46bd mov sp, r7
8005830: bd80 pop {r7, pc}
8005832: bf00 nop
8005834: 20000010 .word 0x20000010
8005838: 431bde83 .word 0x431bde83
0800583c <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
800583c: b580 push {r7, lr}
800583e: b084 sub sp, #16
8005840: af00 add r7, sp, #0
8005842: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8005844: 2300 movs r3, #0
8005846: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
8005848: 687b ldr r3, [r7, #4]
800584a: 681b ldr r3, [r3, #0]
800584c: 689b ldr r3, [r3, #8]
800584e: f003 0301 and.w r3, r3, #1
8005852: 2b01 cmp r3, #1
8005854: d12e bne.n 80058b4 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
8005856: 687b ldr r3, [r7, #4]
8005858: 681b ldr r3, [r3, #0]
800585a: 689a ldr r2, [r3, #8]
800585c: 687b ldr r3, [r7, #4]
800585e: 681b ldr r3, [r3, #0]
8005860: f022 0201 bic.w r2, r2, #1
8005864: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
8005866: f7ff fcbb bl 80051e0 <HAL_GetTick>
800586a: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
800586c: e01b b.n 80058a6 <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
800586e: f7ff fcb7 bl 80051e0 <HAL_GetTick>
8005872: 4602 mov r2, r0
8005874: 68fb ldr r3, [r7, #12]
8005876: 1ad3 subs r3, r2, r3
8005878: 2b02 cmp r3, #2
800587a: d914 bls.n 80058a6 <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
800587c: 687b ldr r3, [r7, #4]
800587e: 681b ldr r3, [r3, #0]
8005880: 689b ldr r3, [r3, #8]
8005882: f003 0301 and.w r3, r3, #1
8005886: 2b01 cmp r3, #1
8005888: d10d bne.n 80058a6 <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
800588a: 687b ldr r3, [r7, #4]
800588c: 6a9b ldr r3, [r3, #40] @ 0x28
800588e: f043 0210 orr.w r2, r3, #16
8005892: 687b ldr r3, [r7, #4]
8005894: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8005896: 687b ldr r3, [r7, #4]
8005898: 6adb ldr r3, [r3, #44] @ 0x2c
800589a: f043 0201 orr.w r2, r3, #1
800589e: 687b ldr r3, [r7, #4]
80058a0: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
80058a2: 2301 movs r3, #1
80058a4: e007 b.n 80058b6 <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
80058a6: 687b ldr r3, [r7, #4]
80058a8: 681b ldr r3, [r3, #0]
80058aa: 689b ldr r3, [r3, #8]
80058ac: f003 0301 and.w r3, r3, #1
80058b0: 2b01 cmp r3, #1
80058b2: d0dc beq.n 800586e <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
80058b4: 2300 movs r3, #0
}
80058b6: 4618 mov r0, r3
80058b8: 3710 adds r7, #16
80058ba: 46bd mov sp, r7
80058bc: bd80 pop {r7, pc}
080058be <ADC_DMAConvCplt>:
* @brief DMA transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
80058be: b580 push {r7, lr}
80058c0: b084 sub sp, #16
80058c2: af00 add r7, sp, #0
80058c4: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
80058c6: 687b ldr r3, [r7, #4]
80058c8: 6a5b ldr r3, [r3, #36] @ 0x24
80058ca: 60fb str r3, [r7, #12]
/* Update state machine on conversion status if not in error state */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
80058cc: 68fb ldr r3, [r7, #12]
80058ce: 6a9b ldr r3, [r3, #40] @ 0x28
80058d0: f003 0350 and.w r3, r3, #80 @ 0x50
80058d4: 2b00 cmp r3, #0
80058d6: d127 bne.n 8005928 <ADC_DMAConvCplt+0x6a>
{
/* Update ADC state machine */
SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
80058d8: 68fb ldr r3, [r7, #12]
80058da: 6a9b ldr r3, [r3, #40] @ 0x28
80058dc: f443 7200 orr.w r2, r3, #512 @ 0x200
80058e0: 68fb ldr r3, [r7, #12]
80058e2: 629a str r2, [r3, #40] @ 0x28
/* Determine whether any further conversion upcoming on group regular */
/* by external trigger, continuous mode or scan sequence on going. */
/* Note: On STM32F1 devices, in case of sequencer enabled */
/* (several ranks selected), end of conversion flag is raised */
/* at the end of the sequence. */
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
80058e4: 68fb ldr r3, [r7, #12]
80058e6: 681b ldr r3, [r3, #0]
80058e8: 689b ldr r3, [r3, #8]
80058ea: f403 2360 and.w r3, r3, #917504 @ 0xe0000
80058ee: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
80058f2: d115 bne.n 8005920 <ADC_DMAConvCplt+0x62>
(hadc->Init.ContinuousConvMode == DISABLE) )
80058f4: 68fb ldr r3, [r7, #12]
80058f6: 7b1b ldrb r3, [r3, #12]
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
80058f8: 2b00 cmp r3, #0
80058fa: d111 bne.n 8005920 <ADC_DMAConvCplt+0x62>
{
/* Set ADC state */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
80058fc: 68fb ldr r3, [r7, #12]
80058fe: 6a9b ldr r3, [r3, #40] @ 0x28
8005900: f423 7280 bic.w r2, r3, #256 @ 0x100
8005904: 68fb ldr r3, [r7, #12]
8005906: 629a str r2, [r3, #40] @ 0x28
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8005908: 68fb ldr r3, [r7, #12]
800590a: 6a9b ldr r3, [r3, #40] @ 0x28
800590c: f403 5380 and.w r3, r3, #4096 @ 0x1000
8005910: 2b00 cmp r3, #0
8005912: d105 bne.n 8005920 <ADC_DMAConvCplt+0x62>
{
SET_BIT(hadc->State, HAL_ADC_STATE_READY);
8005914: 68fb ldr r3, [r7, #12]
8005916: 6a9b ldr r3, [r3, #40] @ 0x28
8005918: f043 0201 orr.w r2, r3, #1
800591c: 68fb ldr r3, [r7, #12]
800591e: 629a str r2, [r3, #40] @ 0x28
/* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvCpltCallback(hadc);
#else
HAL_ADC_ConvCpltCallback(hadc);
8005920: 68f8 ldr r0, [r7, #12]
8005922: f7ff fe1d bl 8005560 <HAL_ADC_ConvCpltCallback>
else
{
/* Call DMA error callback */
hadc->DMA_Handle->XferErrorCallback(hdma);
}
}
8005926: e004 b.n 8005932 <ADC_DMAConvCplt+0x74>
hadc->DMA_Handle->XferErrorCallback(hdma);
8005928: 68fb ldr r3, [r7, #12]
800592a: 6a1b ldr r3, [r3, #32]
800592c: 6b1b ldr r3, [r3, #48] @ 0x30
800592e: 6878 ldr r0, [r7, #4]
8005930: 4798 blx r3
}
8005932: bf00 nop
8005934: 3710 adds r7, #16
8005936: 46bd mov sp, r7
8005938: bd80 pop {r7, pc}
0800593a <ADC_DMAHalfConvCplt>:
* @brief DMA half transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
{
800593a: b580 push {r7, lr}
800593c: b084 sub sp, #16
800593e: af00 add r7, sp, #0
8005940: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8005942: 687b ldr r3, [r7, #4]
8005944: 6a5b ldr r3, [r3, #36] @ 0x24
8005946: 60fb str r3, [r7, #12]
/* Half conversion callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvHalfCpltCallback(hadc);
#else
HAL_ADC_ConvHalfCpltCallback(hadc);
8005948: 68f8 ldr r0, [r7, #12]
800594a: f7ff fe12 bl 8005572 <HAL_ADC_ConvHalfCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
800594e: bf00 nop
8005950: 3710 adds r7, #16
8005952: 46bd mov sp, r7
8005954: bd80 pop {r7, pc}
08005956 <ADC_DMAError>:
* @brief DMA error callback
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAError(DMA_HandleTypeDef *hdma)
{
8005956: b580 push {r7, lr}
8005958: b084 sub sp, #16
800595a: af00 add r7, sp, #0
800595c: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
800595e: 687b ldr r3, [r7, #4]
8005960: 6a5b ldr r3, [r3, #36] @ 0x24
8005962: 60fb str r3, [r7, #12]
/* Set ADC state */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
8005964: 68fb ldr r3, [r7, #12]
8005966: 6a9b ldr r3, [r3, #40] @ 0x28
8005968: f043 0240 orr.w r2, r3, #64 @ 0x40
800596c: 68fb ldr r3, [r7, #12]
800596e: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to DMA error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
8005970: 68fb ldr r3, [r7, #12]
8005972: 6adb ldr r3, [r3, #44] @ 0x2c
8005974: f043 0204 orr.w r2, r3, #4
8005978: 68fb ldr r3, [r7, #12]
800597a: 62da str r2, [r3, #44] @ 0x2c
/* Error callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ErrorCallback(hadc);
#else
HAL_ADC_ErrorCallback(hadc);
800597c: 68f8 ldr r0, [r7, #12]
800597e: f7ff fe01 bl 8005584 <HAL_ADC_ErrorCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
8005982: bf00 nop
8005984: 3710 adds r7, #16
8005986: 46bd mov sp, r7
8005988: bd80 pop {r7, pc}
...
0800598c <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
800598c: b480 push {r7}
800598e: b085 sub sp, #20
8005990: af00 add r7, sp, #0
8005992: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005994: 687b ldr r3, [r7, #4]
8005996: f003 0307 and.w r3, r3, #7
800599a: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
800599c: 4b0c ldr r3, [pc, #48] @ (80059d0 <__NVIC_SetPriorityGrouping+0x44>)
800599e: 68db ldr r3, [r3, #12]
80059a0: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
80059a2: 68ba ldr r2, [r7, #8]
80059a4: f64f 03ff movw r3, #63743 @ 0xf8ff
80059a8: 4013 ands r3, r2
80059aa: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
80059ac: 68fb ldr r3, [r7, #12]
80059ae: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
80059b0: 68bb ldr r3, [r7, #8]
80059b2: 4313 orrs r3, r2
reg_value = (reg_value |
80059b4: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
80059b8: f443 3300 orr.w r3, r3, #131072 @ 0x20000
80059bc: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
80059be: 4a04 ldr r2, [pc, #16] @ (80059d0 <__NVIC_SetPriorityGrouping+0x44>)
80059c0: 68bb ldr r3, [r7, #8]
80059c2: 60d3 str r3, [r2, #12]
}
80059c4: bf00 nop
80059c6: 3714 adds r7, #20
80059c8: 46bd mov sp, r7
80059ca: bc80 pop {r7}
80059cc: 4770 bx lr
80059ce: bf00 nop
80059d0: e000ed00 .word 0xe000ed00
080059d4 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
80059d4: b480 push {r7}
80059d6: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
80059d8: 4b04 ldr r3, [pc, #16] @ (80059ec <__NVIC_GetPriorityGrouping+0x18>)
80059da: 68db ldr r3, [r3, #12]
80059dc: 0a1b lsrs r3, r3, #8
80059de: f003 0307 and.w r3, r3, #7
}
80059e2: 4618 mov r0, r3
80059e4: 46bd mov sp, r7
80059e6: bc80 pop {r7}
80059e8: 4770 bx lr
80059ea: bf00 nop
80059ec: e000ed00 .word 0xe000ed00
080059f0 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
80059f0: b480 push {r7}
80059f2: b083 sub sp, #12
80059f4: af00 add r7, sp, #0
80059f6: 4603 mov r3, r0
80059f8: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80059fa: f997 3007 ldrsb.w r3, [r7, #7]
80059fe: 2b00 cmp r3, #0
8005a00: db0b blt.n 8005a1a <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8005a02: 79fb ldrb r3, [r7, #7]
8005a04: f003 021f and.w r2, r3, #31
8005a08: 4906 ldr r1, [pc, #24] @ (8005a24 <__NVIC_EnableIRQ+0x34>)
8005a0a: f997 3007 ldrsb.w r3, [r7, #7]
8005a0e: 095b lsrs r3, r3, #5
8005a10: 2001 movs r0, #1
8005a12: fa00 f202 lsl.w r2, r0, r2
8005a16: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8005a1a: bf00 nop
8005a1c: 370c adds r7, #12
8005a1e: 46bd mov sp, r7
8005a20: bc80 pop {r7}
8005a22: 4770 bx lr
8005a24: e000e100 .word 0xe000e100
08005a28 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8005a28: b480 push {r7}
8005a2a: b083 sub sp, #12
8005a2c: af00 add r7, sp, #0
8005a2e: 4603 mov r3, r0
8005a30: 6039 str r1, [r7, #0]
8005a32: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8005a34: f997 3007 ldrsb.w r3, [r7, #7]
8005a38: 2b00 cmp r3, #0
8005a3a: db0a blt.n 8005a52 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8005a3c: 683b ldr r3, [r7, #0]
8005a3e: b2da uxtb r2, r3
8005a40: 490c ldr r1, [pc, #48] @ (8005a74 <__NVIC_SetPriority+0x4c>)
8005a42: f997 3007 ldrsb.w r3, [r7, #7]
8005a46: 0112 lsls r2, r2, #4
8005a48: b2d2 uxtb r2, r2
8005a4a: 440b add r3, r1
8005a4c: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8005a50: e00a b.n 8005a68 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8005a52: 683b ldr r3, [r7, #0]
8005a54: b2da uxtb r2, r3
8005a56: 4908 ldr r1, [pc, #32] @ (8005a78 <__NVIC_SetPriority+0x50>)
8005a58: 79fb ldrb r3, [r7, #7]
8005a5a: f003 030f and.w r3, r3, #15
8005a5e: 3b04 subs r3, #4
8005a60: 0112 lsls r2, r2, #4
8005a62: b2d2 uxtb r2, r2
8005a64: 440b add r3, r1
8005a66: 761a strb r2, [r3, #24]
}
8005a68: bf00 nop
8005a6a: 370c adds r7, #12
8005a6c: 46bd mov sp, r7
8005a6e: bc80 pop {r7}
8005a70: 4770 bx lr
8005a72: bf00 nop
8005a74: e000e100 .word 0xe000e100
8005a78: e000ed00 .word 0xe000ed00
08005a7c <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8005a7c: b480 push {r7}
8005a7e: b089 sub sp, #36 @ 0x24
8005a80: af00 add r7, sp, #0
8005a82: 60f8 str r0, [r7, #12]
8005a84: 60b9 str r1, [r7, #8]
8005a86: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005a88: 68fb ldr r3, [r7, #12]
8005a8a: f003 0307 and.w r3, r3, #7
8005a8e: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8005a90: 69fb ldr r3, [r7, #28]
8005a92: f1c3 0307 rsb r3, r3, #7
8005a96: 2b04 cmp r3, #4
8005a98: bf28 it cs
8005a9a: 2304 movcs r3, #4
8005a9c: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8005a9e: 69fb ldr r3, [r7, #28]
8005aa0: 3304 adds r3, #4
8005aa2: 2b06 cmp r3, #6
8005aa4: d902 bls.n 8005aac <NVIC_EncodePriority+0x30>
8005aa6: 69fb ldr r3, [r7, #28]
8005aa8: 3b03 subs r3, #3
8005aaa: e000 b.n 8005aae <NVIC_EncodePriority+0x32>
8005aac: 2300 movs r3, #0
8005aae: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005ab0: f04f 32ff mov.w r2, #4294967295
8005ab4: 69bb ldr r3, [r7, #24]
8005ab6: fa02 f303 lsl.w r3, r2, r3
8005aba: 43da mvns r2, r3
8005abc: 68bb ldr r3, [r7, #8]
8005abe: 401a ands r2, r3
8005ac0: 697b ldr r3, [r7, #20]
8005ac2: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8005ac4: f04f 31ff mov.w r1, #4294967295
8005ac8: 697b ldr r3, [r7, #20]
8005aca: fa01 f303 lsl.w r3, r1, r3
8005ace: 43d9 mvns r1, r3
8005ad0: 687b ldr r3, [r7, #4]
8005ad2: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005ad4: 4313 orrs r3, r2
);
}
8005ad6: 4618 mov r0, r3
8005ad8: 3724 adds r7, #36 @ 0x24
8005ada: 46bd mov sp, r7
8005adc: bc80 pop {r7}
8005ade: 4770 bx lr
08005ae0 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8005ae0: b580 push {r7, lr}
8005ae2: b082 sub sp, #8
8005ae4: af00 add r7, sp, #0
8005ae6: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8005ae8: 687b ldr r3, [r7, #4]
8005aea: 3b01 subs r3, #1
8005aec: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
8005af0: d301 bcc.n 8005af6 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8005af2: 2301 movs r3, #1
8005af4: e00f b.n 8005b16 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8005af6: 4a0a ldr r2, [pc, #40] @ (8005b20 <SysTick_Config+0x40>)
8005af8: 687b ldr r3, [r7, #4]
8005afa: 3b01 subs r3, #1
8005afc: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8005afe: 210f movs r1, #15
8005b00: f04f 30ff mov.w r0, #4294967295
8005b04: f7ff ff90 bl 8005a28 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8005b08: 4b05 ldr r3, [pc, #20] @ (8005b20 <SysTick_Config+0x40>)
8005b0a: 2200 movs r2, #0
8005b0c: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8005b0e: 4b04 ldr r3, [pc, #16] @ (8005b20 <SysTick_Config+0x40>)
8005b10: 2207 movs r2, #7
8005b12: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8005b14: 2300 movs r3, #0
}
8005b16: 4618 mov r0, r3
8005b18: 3708 adds r7, #8
8005b1a: 46bd mov sp, r7
8005b1c: bd80 pop {r7, pc}
8005b1e: bf00 nop
8005b20: e000e010 .word 0xe000e010
08005b24 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8005b24: b580 push {r7, lr}
8005b26: b082 sub sp, #8
8005b28: af00 add r7, sp, #0
8005b2a: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8005b2c: 6878 ldr r0, [r7, #4]
8005b2e: f7ff ff2d bl 800598c <__NVIC_SetPriorityGrouping>
}
8005b32: bf00 nop
8005b34: 3708 adds r7, #8
8005b36: 46bd mov sp, r7
8005b38: bd80 pop {r7, pc}
08005b3a <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8005b3a: b580 push {r7, lr}
8005b3c: b086 sub sp, #24
8005b3e: af00 add r7, sp, #0
8005b40: 4603 mov r3, r0
8005b42: 60b9 str r1, [r7, #8]
8005b44: 607a str r2, [r7, #4]
8005b46: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8005b48: 2300 movs r3, #0
8005b4a: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8005b4c: f7ff ff42 bl 80059d4 <__NVIC_GetPriorityGrouping>
8005b50: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8005b52: 687a ldr r2, [r7, #4]
8005b54: 68b9 ldr r1, [r7, #8]
8005b56: 6978 ldr r0, [r7, #20]
8005b58: f7ff ff90 bl 8005a7c <NVIC_EncodePriority>
8005b5c: 4602 mov r2, r0
8005b5e: f997 300f ldrsb.w r3, [r7, #15]
8005b62: 4611 mov r1, r2
8005b64: 4618 mov r0, r3
8005b66: f7ff ff5f bl 8005a28 <__NVIC_SetPriority>
}
8005b6a: bf00 nop
8005b6c: 3718 adds r7, #24
8005b6e: 46bd mov sp, r7
8005b70: bd80 pop {r7, pc}
08005b72 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8005b72: b580 push {r7, lr}
8005b74: b082 sub sp, #8
8005b76: af00 add r7, sp, #0
8005b78: 4603 mov r3, r0
8005b7a: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8005b7c: f997 3007 ldrsb.w r3, [r7, #7]
8005b80: 4618 mov r0, r3
8005b82: f7ff ff35 bl 80059f0 <__NVIC_EnableIRQ>
}
8005b86: bf00 nop
8005b88: 3708 adds r7, #8
8005b8a: 46bd mov sp, r7
8005b8c: bd80 pop {r7, pc}
08005b8e <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8005b8e: b580 push {r7, lr}
8005b90: b082 sub sp, #8
8005b92: af00 add r7, sp, #0
8005b94: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8005b96: 6878 ldr r0, [r7, #4]
8005b98: f7ff ffa2 bl 8005ae0 <SysTick_Config>
8005b9c: 4603 mov r3, r0
}
8005b9e: 4618 mov r0, r3
8005ba0: 3708 adds r7, #8
8005ba2: 46bd mov sp, r7
8005ba4: bd80 pop {r7, pc}
08005ba6 <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8005ba6: b580 push {r7, lr}
8005ba8: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
8005baa: f7fc f82b bl 8001c04 <HAL_SYSTICK_Callback>
}
8005bae: bf00 nop
8005bb0: bd80 pop {r7, pc}
...
08005bb4 <HAL_DMA_Init>:
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8005bb4: b480 push {r7}
8005bb6: b085 sub sp, #20
8005bb8: af00 add r7, sp, #0
8005bba: 6078 str r0, [r7, #4]
uint32_t tmp = 0U;
8005bbc: 2300 movs r3, #0
8005bbe: 60fb str r3, [r7, #12]
/* Check the DMA handle allocation */
if(hdma == NULL)
8005bc0: 687b ldr r3, [r7, #4]
8005bc2: 2b00 cmp r3, #0
8005bc4: d101 bne.n 8005bca <HAL_DMA_Init+0x16>
{
return HAL_ERROR;
8005bc6: 2301 movs r3, #1
8005bc8: e043 b.n 8005c52 <HAL_DMA_Init+0x9e>
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
hdma->DmaBaseAddress = DMA2;
}
#else
/* DMA1 */
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
8005bca: 687b ldr r3, [r7, #4]
8005bcc: 681b ldr r3, [r3, #0]
8005bce: 461a mov r2, r3
8005bd0: 4b22 ldr r3, [pc, #136] @ (8005c5c <HAL_DMA_Init+0xa8>)
8005bd2: 4413 add r3, r2
8005bd4: 4a22 ldr r2, [pc, #136] @ (8005c60 <HAL_DMA_Init+0xac>)
8005bd6: fba2 2303 umull r2, r3, r2, r3
8005bda: 091b lsrs r3, r3, #4
8005bdc: 009a lsls r2, r3, #2
8005bde: 687b ldr r3, [r7, #4]
8005be0: 641a str r2, [r3, #64] @ 0x40
hdma->DmaBaseAddress = DMA1;
8005be2: 687b ldr r3, [r7, #4]
8005be4: 4a1f ldr r2, [pc, #124] @ (8005c64 <HAL_DMA_Init+0xb0>)
8005be6: 63da str r2, [r3, #60] @ 0x3c
#endif /* DMA2 */
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005be8: 687b ldr r3, [r7, #4]
8005bea: 2202 movs r2, #2
8005bec: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Get the CR register value */
tmp = hdma->Instance->CCR;
8005bf0: 687b ldr r3, [r7, #4]
8005bf2: 681b ldr r3, [r3, #0]
8005bf4: 681b ldr r3, [r3, #0]
8005bf6: 60fb str r3, [r7, #12]
/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
8005bf8: 68fb ldr r3, [r7, #12]
8005bfa: f423 537f bic.w r3, r3, #16320 @ 0x3fc0
8005bfe: f023 0330 bic.w r3, r3, #48 @ 0x30
8005c02: 60fb str r3, [r7, #12]
DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
DMA_CCR_DIR));
/* Prepare the DMA Channel configuration */
tmp |= hdma->Init.Direction |
8005c04: 687b ldr r3, [r7, #4]
8005c06: 685a ldr r2, [r3, #4]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005c08: 687b ldr r3, [r7, #4]
8005c0a: 689b ldr r3, [r3, #8]
tmp |= hdma->Init.Direction |
8005c0c: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005c0e: 687b ldr r3, [r7, #4]
8005c10: 68db ldr r3, [r3, #12]
8005c12: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005c14: 687b ldr r3, [r7, #4]
8005c16: 691b ldr r3, [r3, #16]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005c18: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005c1a: 687b ldr r3, [r7, #4]
8005c1c: 695b ldr r3, [r3, #20]
8005c1e: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8005c20: 687b ldr r3, [r7, #4]
8005c22: 699b ldr r3, [r3, #24]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005c24: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8005c26: 687b ldr r3, [r7, #4]
8005c28: 69db ldr r3, [r3, #28]
8005c2a: 4313 orrs r3, r2
tmp |= hdma->Init.Direction |
8005c2c: 68fa ldr r2, [r7, #12]
8005c2e: 4313 orrs r3, r2
8005c30: 60fb str r3, [r7, #12]
/* Write to DMA Channel CR register */
hdma->Instance->CCR = tmp;
8005c32: 687b ldr r3, [r7, #4]
8005c34: 681b ldr r3, [r3, #0]
8005c36: 68fa ldr r2, [r7, #12]
8005c38: 601a str r2, [r3, #0]
/* Initialise the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005c3a: 687b ldr r3, [r7, #4]
8005c3c: 2200 movs r2, #0
8005c3e: 639a str r2, [r3, #56] @ 0x38
/* Initialize the DMA state*/
hdma->State = HAL_DMA_STATE_READY;
8005c40: 687b ldr r3, [r7, #4]
8005c42: 2201 movs r2, #1
8005c44: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Allocate lock resource and initialize it */
hdma->Lock = HAL_UNLOCKED;
8005c48: 687b ldr r3, [r7, #4]
8005c4a: 2200 movs r2, #0
8005c4c: f883 2020 strb.w r2, [r3, #32]
return HAL_OK;
8005c50: 2300 movs r3, #0
}
8005c52: 4618 mov r0, r3
8005c54: 3714 adds r7, #20
8005c56: 46bd mov sp, r7
8005c58: bc80 pop {r7}
8005c5a: 4770 bx lr
8005c5c: bffdfff8 .word 0xbffdfff8
8005c60: cccccccd .word 0xcccccccd
8005c64: 40020000 .word 0x40020000
08005c68 <HAL_DMA_Start_IT>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8005c68: b580 push {r7, lr}
8005c6a: b086 sub sp, #24
8005c6c: af00 add r7, sp, #0
8005c6e: 60f8 str r0, [r7, #12]
8005c70: 60b9 str r1, [r7, #8]
8005c72: 607a str r2, [r7, #4]
8005c74: 603b str r3, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8005c76: 2300 movs r3, #0
8005c78: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
8005c7a: 68fb ldr r3, [r7, #12]
8005c7c: f893 3020 ldrb.w r3, [r3, #32]
8005c80: 2b01 cmp r3, #1
8005c82: d101 bne.n 8005c88 <HAL_DMA_Start_IT+0x20>
8005c84: 2302 movs r3, #2
8005c86: e04b b.n 8005d20 <HAL_DMA_Start_IT+0xb8>
8005c88: 68fb ldr r3, [r7, #12]
8005c8a: 2201 movs r2, #1
8005c8c: f883 2020 strb.w r2, [r3, #32]
if(HAL_DMA_STATE_READY == hdma->State)
8005c90: 68fb ldr r3, [r7, #12]
8005c92: f893 3021 ldrb.w r3, [r3, #33] @ 0x21
8005c96: b2db uxtb r3, r3
8005c98: 2b01 cmp r3, #1
8005c9a: d13a bne.n 8005d12 <HAL_DMA_Start_IT+0xaa>
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005c9c: 68fb ldr r3, [r7, #12]
8005c9e: 2202 movs r2, #2
8005ca0: f883 2021 strb.w r2, [r3, #33] @ 0x21
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005ca4: 68fb ldr r3, [r7, #12]
8005ca6: 2200 movs r2, #0
8005ca8: 639a str r2, [r3, #56] @ 0x38
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
8005caa: 68fb ldr r3, [r7, #12]
8005cac: 681b ldr r3, [r3, #0]
8005cae: 681a ldr r2, [r3, #0]
8005cb0: 68fb ldr r3, [r7, #12]
8005cb2: 681b ldr r3, [r3, #0]
8005cb4: f022 0201 bic.w r2, r2, #1
8005cb8: 601a str r2, [r3, #0]
/* Configure the source, destination address and the data length & clear flags*/
DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
8005cba: 683b ldr r3, [r7, #0]
8005cbc: 687a ldr r2, [r7, #4]
8005cbe: 68b9 ldr r1, [r7, #8]
8005cc0: 68f8 ldr r0, [r7, #12]
8005cc2: f000 f937 bl 8005f34 <DMA_SetConfig>
/* Enable the transfer complete interrupt */
/* Enable the transfer Error interrupt */
if(NULL != hdma->XferHalfCpltCallback)
8005cc6: 68fb ldr r3, [r7, #12]
8005cc8: 6adb ldr r3, [r3, #44] @ 0x2c
8005cca: 2b00 cmp r3, #0
8005ccc: d008 beq.n 8005ce0 <HAL_DMA_Start_IT+0x78>
{
/* Enable the Half transfer complete interrupt as well */
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005cce: 68fb ldr r3, [r7, #12]
8005cd0: 681b ldr r3, [r3, #0]
8005cd2: 681a ldr r2, [r3, #0]
8005cd4: 68fb ldr r3, [r7, #12]
8005cd6: 681b ldr r3, [r3, #0]
8005cd8: f042 020e orr.w r2, r2, #14
8005cdc: 601a str r2, [r3, #0]
8005cde: e00f b.n 8005d00 <HAL_DMA_Start_IT+0x98>
}
else
{
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005ce0: 68fb ldr r3, [r7, #12]
8005ce2: 681b ldr r3, [r3, #0]
8005ce4: 681a ldr r2, [r3, #0]
8005ce6: 68fb ldr r3, [r7, #12]
8005ce8: 681b ldr r3, [r3, #0]
8005cea: f022 0204 bic.w r2, r2, #4
8005cee: 601a str r2, [r3, #0]
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
8005cf0: 68fb ldr r3, [r7, #12]
8005cf2: 681b ldr r3, [r3, #0]
8005cf4: 681a ldr r2, [r3, #0]
8005cf6: 68fb ldr r3, [r7, #12]
8005cf8: 681b ldr r3, [r3, #0]
8005cfa: f042 020a orr.w r2, r2, #10
8005cfe: 601a str r2, [r3, #0]
}
/* Enable the Peripheral */
__HAL_DMA_ENABLE(hdma);
8005d00: 68fb ldr r3, [r7, #12]
8005d02: 681b ldr r3, [r3, #0]
8005d04: 681a ldr r2, [r3, #0]
8005d06: 68fb ldr r3, [r7, #12]
8005d08: 681b ldr r3, [r3, #0]
8005d0a: f042 0201 orr.w r2, r2, #1
8005d0e: 601a str r2, [r3, #0]
8005d10: e005 b.n 8005d1e <HAL_DMA_Start_IT+0xb6>
}
else
{
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005d12: 68fb ldr r3, [r7, #12]
8005d14: 2200 movs r2, #0
8005d16: f883 2020 strb.w r2, [r3, #32]
/* Remain BUSY */
status = HAL_BUSY;
8005d1a: 2302 movs r3, #2
8005d1c: 75fb strb r3, [r7, #23]
}
return status;
8005d1e: 7dfb ldrb r3, [r7, #23]
}
8005d20: 4618 mov r0, r3
8005d22: 3718 adds r7, #24
8005d24: 46bd mov sp, r7
8005d26: bd80 pop {r7, pc}
08005d28 <HAL_DMA_IRQHandler>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
8005d28: b580 push {r7, lr}
8005d2a: b084 sub sp, #16
8005d2c: af00 add r7, sp, #0
8005d2e: 6078 str r0, [r7, #4]
uint32_t flag_it = hdma->DmaBaseAddress->ISR;
8005d30: 687b ldr r3, [r7, #4]
8005d32: 6bdb ldr r3, [r3, #60] @ 0x3c
8005d34: 681b ldr r3, [r3, #0]
8005d36: 60fb str r3, [r7, #12]
uint32_t source_it = hdma->Instance->CCR;
8005d38: 687b ldr r3, [r7, #4]
8005d3a: 681b ldr r3, [r3, #0]
8005d3c: 681b ldr r3, [r3, #0]
8005d3e: 60bb str r3, [r7, #8]
/* Half Transfer Complete Interrupt management ******************************/
if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
8005d40: 687b ldr r3, [r7, #4]
8005d42: 6c1b ldr r3, [r3, #64] @ 0x40
8005d44: 2204 movs r2, #4
8005d46: 409a lsls r2, r3
8005d48: 68fb ldr r3, [r7, #12]
8005d4a: 4013 ands r3, r2
8005d4c: 2b00 cmp r3, #0
8005d4e: d04f beq.n 8005df0 <HAL_DMA_IRQHandler+0xc8>
8005d50: 68bb ldr r3, [r7, #8]
8005d52: f003 0304 and.w r3, r3, #4
8005d56: 2b00 cmp r3, #0
8005d58: d04a beq.n 8005df0 <HAL_DMA_IRQHandler+0xc8>
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
8005d5a: 687b ldr r3, [r7, #4]
8005d5c: 681b ldr r3, [r3, #0]
8005d5e: 681b ldr r3, [r3, #0]
8005d60: f003 0320 and.w r3, r3, #32
8005d64: 2b00 cmp r3, #0
8005d66: d107 bne.n 8005d78 <HAL_DMA_IRQHandler+0x50>
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005d68: 687b ldr r3, [r7, #4]
8005d6a: 681b ldr r3, [r3, #0]
8005d6c: 681a ldr r2, [r3, #0]
8005d6e: 687b ldr r3, [r7, #4]
8005d70: 681b ldr r3, [r3, #0]
8005d72: f022 0204 bic.w r2, r2, #4
8005d76: 601a str r2, [r3, #0]
}
/* Clear the half transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
8005d78: 687b ldr r3, [r7, #4]
8005d7a: 681b ldr r3, [r3, #0]
8005d7c: 4a66 ldr r2, [pc, #408] @ (8005f18 <HAL_DMA_IRQHandler+0x1f0>)
8005d7e: 4293 cmp r3, r2
8005d80: d029 beq.n 8005dd6 <HAL_DMA_IRQHandler+0xae>
8005d82: 687b ldr r3, [r7, #4]
8005d84: 681b ldr r3, [r3, #0]
8005d86: 4a65 ldr r2, [pc, #404] @ (8005f1c <HAL_DMA_IRQHandler+0x1f4>)
8005d88: 4293 cmp r3, r2
8005d8a: d022 beq.n 8005dd2 <HAL_DMA_IRQHandler+0xaa>
8005d8c: 687b ldr r3, [r7, #4]
8005d8e: 681b ldr r3, [r3, #0]
8005d90: 4a63 ldr r2, [pc, #396] @ (8005f20 <HAL_DMA_IRQHandler+0x1f8>)
8005d92: 4293 cmp r3, r2
8005d94: d01a beq.n 8005dcc <HAL_DMA_IRQHandler+0xa4>
8005d96: 687b ldr r3, [r7, #4]
8005d98: 681b ldr r3, [r3, #0]
8005d9a: 4a62 ldr r2, [pc, #392] @ (8005f24 <HAL_DMA_IRQHandler+0x1fc>)
8005d9c: 4293 cmp r3, r2
8005d9e: d012 beq.n 8005dc6 <HAL_DMA_IRQHandler+0x9e>
8005da0: 687b ldr r3, [r7, #4]
8005da2: 681b ldr r3, [r3, #0]
8005da4: 4a60 ldr r2, [pc, #384] @ (8005f28 <HAL_DMA_IRQHandler+0x200>)
8005da6: 4293 cmp r3, r2
8005da8: d00a beq.n 8005dc0 <HAL_DMA_IRQHandler+0x98>
8005daa: 687b ldr r3, [r7, #4]
8005dac: 681b ldr r3, [r3, #0]
8005dae: 4a5f ldr r2, [pc, #380] @ (8005f2c <HAL_DMA_IRQHandler+0x204>)
8005db0: 4293 cmp r3, r2
8005db2: d102 bne.n 8005dba <HAL_DMA_IRQHandler+0x92>
8005db4: f44f 0380 mov.w r3, #4194304 @ 0x400000
8005db8: e00e b.n 8005dd8 <HAL_DMA_IRQHandler+0xb0>
8005dba: f04f 6380 mov.w r3, #67108864 @ 0x4000000
8005dbe: e00b b.n 8005dd8 <HAL_DMA_IRQHandler+0xb0>
8005dc0: f44f 2380 mov.w r3, #262144 @ 0x40000
8005dc4: e008 b.n 8005dd8 <HAL_DMA_IRQHandler+0xb0>
8005dc6: f44f 4380 mov.w r3, #16384 @ 0x4000
8005dca: e005 b.n 8005dd8 <HAL_DMA_IRQHandler+0xb0>
8005dcc: f44f 6380 mov.w r3, #1024 @ 0x400
8005dd0: e002 b.n 8005dd8 <HAL_DMA_IRQHandler+0xb0>
8005dd2: 2340 movs r3, #64 @ 0x40
8005dd4: e000 b.n 8005dd8 <HAL_DMA_IRQHandler+0xb0>
8005dd6: 2304 movs r3, #4
8005dd8: 4a55 ldr r2, [pc, #340] @ (8005f30 <HAL_DMA_IRQHandler+0x208>)
8005dda: 6053 str r3, [r2, #4]
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
8005ddc: 687b ldr r3, [r7, #4]
8005dde: 6adb ldr r3, [r3, #44] @ 0x2c
8005de0: 2b00 cmp r3, #0
8005de2: f000 8094 beq.w 8005f0e <HAL_DMA_IRQHandler+0x1e6>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
8005de6: 687b ldr r3, [r7, #4]
8005de8: 6adb ldr r3, [r3, #44] @ 0x2c
8005dea: 6878 ldr r0, [r7, #4]
8005dec: 4798 blx r3
if(hdma->XferHalfCpltCallback != NULL)
8005dee: e08e b.n 8005f0e <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Complete Interrupt management ***********************************/
else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
8005df0: 687b ldr r3, [r7, #4]
8005df2: 6c1b ldr r3, [r3, #64] @ 0x40
8005df4: 2202 movs r2, #2
8005df6: 409a lsls r2, r3
8005df8: 68fb ldr r3, [r7, #12]
8005dfa: 4013 ands r3, r2
8005dfc: 2b00 cmp r3, #0
8005dfe: d056 beq.n 8005eae <HAL_DMA_IRQHandler+0x186>
8005e00: 68bb ldr r3, [r7, #8]
8005e02: f003 0302 and.w r3, r3, #2
8005e06: 2b00 cmp r3, #0
8005e08: d051 beq.n 8005eae <HAL_DMA_IRQHandler+0x186>
{
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
8005e0a: 687b ldr r3, [r7, #4]
8005e0c: 681b ldr r3, [r3, #0]
8005e0e: 681b ldr r3, [r3, #0]
8005e10: f003 0320 and.w r3, r3, #32
8005e14: 2b00 cmp r3, #0
8005e16: d10b bne.n 8005e30 <HAL_DMA_IRQHandler+0x108>
{
/* Disable the transfer complete and error interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
8005e18: 687b ldr r3, [r7, #4]
8005e1a: 681b ldr r3, [r3, #0]
8005e1c: 681a ldr r2, [r3, #0]
8005e1e: 687b ldr r3, [r7, #4]
8005e20: 681b ldr r3, [r3, #0]
8005e22: f022 020a bic.w r2, r2, #10
8005e26: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8005e28: 687b ldr r3, [r7, #4]
8005e2a: 2201 movs r2, #1
8005e2c: f883 2021 strb.w r2, [r3, #33] @ 0x21
}
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
8005e30: 687b ldr r3, [r7, #4]
8005e32: 681b ldr r3, [r3, #0]
8005e34: 4a38 ldr r2, [pc, #224] @ (8005f18 <HAL_DMA_IRQHandler+0x1f0>)
8005e36: 4293 cmp r3, r2
8005e38: d029 beq.n 8005e8e <HAL_DMA_IRQHandler+0x166>
8005e3a: 687b ldr r3, [r7, #4]
8005e3c: 681b ldr r3, [r3, #0]
8005e3e: 4a37 ldr r2, [pc, #220] @ (8005f1c <HAL_DMA_IRQHandler+0x1f4>)
8005e40: 4293 cmp r3, r2
8005e42: d022 beq.n 8005e8a <HAL_DMA_IRQHandler+0x162>
8005e44: 687b ldr r3, [r7, #4]
8005e46: 681b ldr r3, [r3, #0]
8005e48: 4a35 ldr r2, [pc, #212] @ (8005f20 <HAL_DMA_IRQHandler+0x1f8>)
8005e4a: 4293 cmp r3, r2
8005e4c: d01a beq.n 8005e84 <HAL_DMA_IRQHandler+0x15c>
8005e4e: 687b ldr r3, [r7, #4]
8005e50: 681b ldr r3, [r3, #0]
8005e52: 4a34 ldr r2, [pc, #208] @ (8005f24 <HAL_DMA_IRQHandler+0x1fc>)
8005e54: 4293 cmp r3, r2
8005e56: d012 beq.n 8005e7e <HAL_DMA_IRQHandler+0x156>
8005e58: 687b ldr r3, [r7, #4]
8005e5a: 681b ldr r3, [r3, #0]
8005e5c: 4a32 ldr r2, [pc, #200] @ (8005f28 <HAL_DMA_IRQHandler+0x200>)
8005e5e: 4293 cmp r3, r2
8005e60: d00a beq.n 8005e78 <HAL_DMA_IRQHandler+0x150>
8005e62: 687b ldr r3, [r7, #4]
8005e64: 681b ldr r3, [r3, #0]
8005e66: 4a31 ldr r2, [pc, #196] @ (8005f2c <HAL_DMA_IRQHandler+0x204>)
8005e68: 4293 cmp r3, r2
8005e6a: d102 bne.n 8005e72 <HAL_DMA_IRQHandler+0x14a>
8005e6c: f44f 1300 mov.w r3, #2097152 @ 0x200000
8005e70: e00e b.n 8005e90 <HAL_DMA_IRQHandler+0x168>
8005e72: f04f 7300 mov.w r3, #33554432 @ 0x2000000
8005e76: e00b b.n 8005e90 <HAL_DMA_IRQHandler+0x168>
8005e78: f44f 3300 mov.w r3, #131072 @ 0x20000
8005e7c: e008 b.n 8005e90 <HAL_DMA_IRQHandler+0x168>
8005e7e: f44f 5300 mov.w r3, #8192 @ 0x2000
8005e82: e005 b.n 8005e90 <HAL_DMA_IRQHandler+0x168>
8005e84: f44f 7300 mov.w r3, #512 @ 0x200
8005e88: e002 b.n 8005e90 <HAL_DMA_IRQHandler+0x168>
8005e8a: 2320 movs r3, #32
8005e8c: e000 b.n 8005e90 <HAL_DMA_IRQHandler+0x168>
8005e8e: 2302 movs r3, #2
8005e90: 4a27 ldr r2, [pc, #156] @ (8005f30 <HAL_DMA_IRQHandler+0x208>)
8005e92: 6053 str r3, [r2, #4]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005e94: 687b ldr r3, [r7, #4]
8005e96: 2200 movs r2, #0
8005e98: f883 2020 strb.w r2, [r3, #32]
if(hdma->XferCpltCallback != NULL)
8005e9c: 687b ldr r3, [r7, #4]
8005e9e: 6a9b ldr r3, [r3, #40] @ 0x28
8005ea0: 2b00 cmp r3, #0
8005ea2: d034 beq.n 8005f0e <HAL_DMA_IRQHandler+0x1e6>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8005ea4: 687b ldr r3, [r7, #4]
8005ea6: 6a9b ldr r3, [r3, #40] @ 0x28
8005ea8: 6878 ldr r0, [r7, #4]
8005eaa: 4798 blx r3
if(hdma->XferCpltCallback != NULL)
8005eac: e02f b.n 8005f0e <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Error Interrupt management **************************************/
else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
8005eae: 687b ldr r3, [r7, #4]
8005eb0: 6c1b ldr r3, [r3, #64] @ 0x40
8005eb2: 2208 movs r2, #8
8005eb4: 409a lsls r2, r3
8005eb6: 68fb ldr r3, [r7, #12]
8005eb8: 4013 ands r3, r2
8005eba: 2b00 cmp r3, #0
8005ebc: d028 beq.n 8005f10 <HAL_DMA_IRQHandler+0x1e8>
8005ebe: 68bb ldr r3, [r7, #8]
8005ec0: f003 0308 and.w r3, r3, #8
8005ec4: 2b00 cmp r3, #0
8005ec6: d023 beq.n 8005f10 <HAL_DMA_IRQHandler+0x1e8>
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
/* Disable ALL DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005ec8: 687b ldr r3, [r7, #4]
8005eca: 681b ldr r3, [r3, #0]
8005ecc: 681a ldr r2, [r3, #0]
8005ece: 687b ldr r3, [r7, #4]
8005ed0: 681b ldr r3, [r3, #0]
8005ed2: f022 020e bic.w r2, r2, #14
8005ed6: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8005ed8: 687b ldr r3, [r7, #4]
8005eda: 6c1a ldr r2, [r3, #64] @ 0x40
8005edc: 687b ldr r3, [r7, #4]
8005ede: 6bdb ldr r3, [r3, #60] @ 0x3c
8005ee0: 2101 movs r1, #1
8005ee2: fa01 f202 lsl.w r2, r1, r2
8005ee6: 605a str r2, [r3, #4]
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
8005ee8: 687b ldr r3, [r7, #4]
8005eea: 2201 movs r2, #1
8005eec: 639a str r2, [r3, #56] @ 0x38
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8005eee: 687b ldr r3, [r7, #4]
8005ef0: 2201 movs r2, #1
8005ef2: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005ef6: 687b ldr r3, [r7, #4]
8005ef8: 2200 movs r2, #0
8005efa: f883 2020 strb.w r2, [r3, #32]
if (hdma->XferErrorCallback != NULL)
8005efe: 687b ldr r3, [r7, #4]
8005f00: 6b1b ldr r3, [r3, #48] @ 0x30
8005f02: 2b00 cmp r3, #0
8005f04: d004 beq.n 8005f10 <HAL_DMA_IRQHandler+0x1e8>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
8005f06: 687b ldr r3, [r7, #4]
8005f08: 6b1b ldr r3, [r3, #48] @ 0x30
8005f0a: 6878 ldr r0, [r7, #4]
8005f0c: 4798 blx r3
}
}
return;
8005f0e: bf00 nop
8005f10: bf00 nop
}
8005f12: 3710 adds r7, #16
8005f14: 46bd mov sp, r7
8005f16: bd80 pop {r7, pc}
8005f18: 40020008 .word 0x40020008
8005f1c: 4002001c .word 0x4002001c
8005f20: 40020030 .word 0x40020030
8005f24: 40020044 .word 0x40020044
8005f28: 40020058 .word 0x40020058
8005f2c: 4002006c .word 0x4002006c
8005f30: 40020000 .word 0x40020000
08005f34 <DMA_SetConfig>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8005f34: b480 push {r7}
8005f36: b085 sub sp, #20
8005f38: af00 add r7, sp, #0
8005f3a: 60f8 str r0, [r7, #12]
8005f3c: 60b9 str r1, [r7, #8]
8005f3e: 607a str r2, [r7, #4]
8005f40: 603b str r3, [r7, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8005f42: 68fb ldr r3, [r7, #12]
8005f44: 6c1a ldr r2, [r3, #64] @ 0x40
8005f46: 68fb ldr r3, [r7, #12]
8005f48: 6bdb ldr r3, [r3, #60] @ 0x3c
8005f4a: 2101 movs r1, #1
8005f4c: fa01 f202 lsl.w r2, r1, r2
8005f50: 605a str r2, [r3, #4]
/* Configure DMA Channel data length */
hdma->Instance->CNDTR = DataLength;
8005f52: 68fb ldr r3, [r7, #12]
8005f54: 681b ldr r3, [r3, #0]
8005f56: 683a ldr r2, [r7, #0]
8005f58: 605a str r2, [r3, #4]
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
8005f5a: 68fb ldr r3, [r7, #12]
8005f5c: 685b ldr r3, [r3, #4]
8005f5e: 2b10 cmp r3, #16
8005f60: d108 bne.n 8005f74 <DMA_SetConfig+0x40>
{
/* Configure DMA Channel destination address */
hdma->Instance->CPAR = DstAddress;
8005f62: 68fb ldr r3, [r7, #12]
8005f64: 681b ldr r3, [r3, #0]
8005f66: 687a ldr r2, [r7, #4]
8005f68: 609a str r2, [r3, #8]
/* Configure DMA Channel source address */
hdma->Instance->CMAR = SrcAddress;
8005f6a: 68fb ldr r3, [r7, #12]
8005f6c: 681b ldr r3, [r3, #0]
8005f6e: 68ba ldr r2, [r7, #8]
8005f70: 60da str r2, [r3, #12]
hdma->Instance->CPAR = SrcAddress;
/* Configure DMA Channel destination address */
hdma->Instance->CMAR = DstAddress;
}
}
8005f72: e007 b.n 8005f84 <DMA_SetConfig+0x50>
hdma->Instance->CPAR = SrcAddress;
8005f74: 68fb ldr r3, [r7, #12]
8005f76: 681b ldr r3, [r3, #0]
8005f78: 68ba ldr r2, [r7, #8]
8005f7a: 609a str r2, [r3, #8]
hdma->Instance->CMAR = DstAddress;
8005f7c: 68fb ldr r3, [r7, #12]
8005f7e: 681b ldr r3, [r3, #0]
8005f80: 687a ldr r2, [r7, #4]
8005f82: 60da str r2, [r3, #12]
}
8005f84: bf00 nop
8005f86: 3714 adds r7, #20
8005f88: 46bd mov sp, r7
8005f8a: bc80 pop {r7}
8005f8c: 4770 bx lr
...
08005f90 <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
8005f90: b5f0 push {r4, r5, r6, r7, lr}
8005f92: b087 sub sp, #28
8005f94: af00 add r7, sp, #0
8005f96: 60f8 str r0, [r7, #12]
8005f98: 60b9 str r1, [r7, #8]
8005f9a: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
8005f9e: 2301 movs r3, #1
8005fa0: 75fb strb r3, [r7, #23]
uint8_t index = 0;
8005fa2: 2300 movs r3, #0
8005fa4: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
8005fa6: 2300 movs r3, #0
8005fa8: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
8005faa: 4b2f ldr r3, [pc, #188] @ (8006068 <HAL_FLASH_Program+0xd8>)
8005fac: 7e1b ldrb r3, [r3, #24]
8005fae: 2b01 cmp r3, #1
8005fb0: d101 bne.n 8005fb6 <HAL_FLASH_Program+0x26>
8005fb2: 2302 movs r3, #2
8005fb4: e054 b.n 8006060 <HAL_FLASH_Program+0xd0>
8005fb6: 4b2c ldr r3, [pc, #176] @ (8006068 <HAL_FLASH_Program+0xd8>)
8005fb8: 2201 movs r2, #1
8005fba: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8005fbc: f24c 3050 movw r0, #50000 @ 0xc350
8005fc0: f000 f8a8 bl 8006114 <FLASH_WaitForLastOperation>
8005fc4: 4603 mov r3, r0
8005fc6: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
8005fc8: 7dfb ldrb r3, [r7, #23]
8005fca: 2b00 cmp r3, #0
8005fcc: d144 bne.n 8006058 <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
8005fce: 68fb ldr r3, [r7, #12]
8005fd0: 2b01 cmp r3, #1
8005fd2: d102 bne.n 8005fda <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8005fd4: 2301 movs r3, #1
8005fd6: 757b strb r3, [r7, #21]
8005fd8: e007 b.n 8005fea <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
8005fda: 68fb ldr r3, [r7, #12]
8005fdc: 2b02 cmp r3, #2
8005fde: d102 bne.n 8005fe6 <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
8005fe0: 2302 movs r3, #2
8005fe2: 757b strb r3, [r7, #21]
8005fe4: e001 b.n 8005fea <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
8005fe6: 2304 movs r3, #4
8005fe8: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
8005fea: 2300 movs r3, #0
8005fec: 75bb strb r3, [r7, #22]
8005fee: e02d b.n 800604c <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
8005ff0: 7dbb ldrb r3, [r7, #22]
8005ff2: 005a lsls r2, r3, #1
8005ff4: 68bb ldr r3, [r7, #8]
8005ff6: eb02 0c03 add.w ip, r2, r3
8005ffa: 7dbb ldrb r3, [r7, #22]
8005ffc: 0119 lsls r1, r3, #4
8005ffe: e9d7 2300 ldrd r2, r3, [r7]
8006002: f1c1 0620 rsb r6, r1, #32
8006006: f1a1 0020 sub.w r0, r1, #32
800600a: fa22 f401 lsr.w r4, r2, r1
800600e: fa03 f606 lsl.w r6, r3, r6
8006012: 4334 orrs r4, r6
8006014: fa23 f000 lsr.w r0, r3, r0
8006018: 4304 orrs r4, r0
800601a: fa23 f501 lsr.w r5, r3, r1
800601e: b2a3 uxth r3, r4
8006020: 4619 mov r1, r3
8006022: 4660 mov r0, ip
8006024: f000 f85a bl 80060dc <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8006028: f24c 3050 movw r0, #50000 @ 0xc350
800602c: f000 f872 bl 8006114 <FLASH_WaitForLastOperation>
8006030: 4603 mov r3, r0
8006032: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
8006034: 4b0d ldr r3, [pc, #52] @ (800606c <HAL_FLASH_Program+0xdc>)
8006036: 691b ldr r3, [r3, #16]
8006038: 4a0c ldr r2, [pc, #48] @ (800606c <HAL_FLASH_Program+0xdc>)
800603a: f023 0301 bic.w r3, r3, #1
800603e: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
8006040: 7dfb ldrb r3, [r7, #23]
8006042: 2b00 cmp r3, #0
8006044: d107 bne.n 8006056 <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
8006046: 7dbb ldrb r3, [r7, #22]
8006048: 3301 adds r3, #1
800604a: 75bb strb r3, [r7, #22]
800604c: 7dba ldrb r2, [r7, #22]
800604e: 7d7b ldrb r3, [r7, #21]
8006050: 429a cmp r2, r3
8006052: d3cd bcc.n 8005ff0 <HAL_FLASH_Program+0x60>
8006054: e000 b.n 8006058 <HAL_FLASH_Program+0xc8>
{
break;
8006056: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8006058: 4b03 ldr r3, [pc, #12] @ (8006068 <HAL_FLASH_Program+0xd8>)
800605a: 2200 movs r2, #0
800605c: 761a strb r2, [r3, #24]
return status;
800605e: 7dfb ldrb r3, [r7, #23]
}
8006060: 4618 mov r0, r3
8006062: 371c adds r7, #28
8006064: 46bd mov sp, r7
8006066: bdf0 pop {r4, r5, r6, r7, pc}
8006068: 20000478 .word 0x20000478
800606c: 40022000 .word 0x40022000
08006070 <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
8006070: b480 push {r7}
8006072: b083 sub sp, #12
8006074: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
8006076: 2300 movs r3, #0
8006078: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
800607a: 4b0d ldr r3, [pc, #52] @ (80060b0 <HAL_FLASH_Unlock+0x40>)
800607c: 691b ldr r3, [r3, #16]
800607e: f003 0380 and.w r3, r3, #128 @ 0x80
8006082: 2b00 cmp r3, #0
8006084: d00d beq.n 80060a2 <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
8006086: 4b0a ldr r3, [pc, #40] @ (80060b0 <HAL_FLASH_Unlock+0x40>)
8006088: 4a0a ldr r2, [pc, #40] @ (80060b4 <HAL_FLASH_Unlock+0x44>)
800608a: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
800608c: 4b08 ldr r3, [pc, #32] @ (80060b0 <HAL_FLASH_Unlock+0x40>)
800608e: 4a0a ldr r2, [pc, #40] @ (80060b8 <HAL_FLASH_Unlock+0x48>)
8006090: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8006092: 4b07 ldr r3, [pc, #28] @ (80060b0 <HAL_FLASH_Unlock+0x40>)
8006094: 691b ldr r3, [r3, #16]
8006096: f003 0380 and.w r3, r3, #128 @ 0x80
800609a: 2b00 cmp r3, #0
800609c: d001 beq.n 80060a2 <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
800609e: 2301 movs r3, #1
80060a0: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
80060a2: 79fb ldrb r3, [r7, #7]
}
80060a4: 4618 mov r0, r3
80060a6: 370c adds r7, #12
80060a8: 46bd mov sp, r7
80060aa: bc80 pop {r7}
80060ac: 4770 bx lr
80060ae: bf00 nop
80060b0: 40022000 .word 0x40022000
80060b4: 45670123 .word 0x45670123
80060b8: cdef89ab .word 0xcdef89ab
080060bc <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
80060bc: b480 push {r7}
80060be: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
80060c0: 4b05 ldr r3, [pc, #20] @ (80060d8 <HAL_FLASH_Lock+0x1c>)
80060c2: 691b ldr r3, [r3, #16]
80060c4: 4a04 ldr r2, [pc, #16] @ (80060d8 <HAL_FLASH_Lock+0x1c>)
80060c6: f043 0380 orr.w r3, r3, #128 @ 0x80
80060ca: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
80060cc: 2300 movs r3, #0
}
80060ce: 4618 mov r0, r3
80060d0: 46bd mov sp, r7
80060d2: bc80 pop {r7}
80060d4: 4770 bx lr
80060d6: bf00 nop
80060d8: 40022000 .word 0x40022000
080060dc <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
80060dc: b480 push {r7}
80060de: b083 sub sp, #12
80060e0: af00 add r7, sp, #0
80060e2: 6078 str r0, [r7, #4]
80060e4: 460b mov r3, r1
80060e6: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80060e8: 4b08 ldr r3, [pc, #32] @ (800610c <FLASH_Program_HalfWord+0x30>)
80060ea: 2200 movs r2, #0
80060ec: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
80060ee: 4b08 ldr r3, [pc, #32] @ (8006110 <FLASH_Program_HalfWord+0x34>)
80060f0: 691b ldr r3, [r3, #16]
80060f2: 4a07 ldr r2, [pc, #28] @ (8006110 <FLASH_Program_HalfWord+0x34>)
80060f4: f043 0301 orr.w r3, r3, #1
80060f8: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
80060fa: 687b ldr r3, [r7, #4]
80060fc: 887a ldrh r2, [r7, #2]
80060fe: 801a strh r2, [r3, #0]
}
8006100: bf00 nop
8006102: 370c adds r7, #12
8006104: 46bd mov sp, r7
8006106: bc80 pop {r7}
8006108: 4770 bx lr
800610a: bf00 nop
800610c: 20000478 .word 0x20000478
8006110: 40022000 .word 0x40022000
08006114 <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
8006114: b580 push {r7, lr}
8006116: b084 sub sp, #16
8006118: af00 add r7, sp, #0
800611a: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
800611c: f7ff f860 bl 80051e0 <HAL_GetTick>
8006120: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
8006122: e010 b.n 8006146 <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
8006124: 687b ldr r3, [r7, #4]
8006126: f1b3 3fff cmp.w r3, #4294967295
800612a: d00c beq.n 8006146 <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
800612c: 687b ldr r3, [r7, #4]
800612e: 2b00 cmp r3, #0
8006130: d007 beq.n 8006142 <FLASH_WaitForLastOperation+0x2e>
8006132: f7ff f855 bl 80051e0 <HAL_GetTick>
8006136: 4602 mov r2, r0
8006138: 68fb ldr r3, [r7, #12]
800613a: 1ad3 subs r3, r2, r3
800613c: 687a ldr r2, [r7, #4]
800613e: 429a cmp r2, r3
8006140: d201 bcs.n 8006146 <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
8006142: 2303 movs r3, #3
8006144: e025 b.n 8006192 <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
8006146: 4b15 ldr r3, [pc, #84] @ (800619c <FLASH_WaitForLastOperation+0x88>)
8006148: 68db ldr r3, [r3, #12]
800614a: f003 0301 and.w r3, r3, #1
800614e: 2b00 cmp r3, #0
8006150: d1e8 bne.n 8006124 <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
8006152: 4b12 ldr r3, [pc, #72] @ (800619c <FLASH_WaitForLastOperation+0x88>)
8006154: 68db ldr r3, [r3, #12]
8006156: f003 0320 and.w r3, r3, #32
800615a: 2b00 cmp r3, #0
800615c: d002 beq.n 8006164 <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
800615e: 4b0f ldr r3, [pc, #60] @ (800619c <FLASH_WaitForLastOperation+0x88>)
8006160: 2220 movs r2, #32
8006162: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8006164: 4b0d ldr r3, [pc, #52] @ (800619c <FLASH_WaitForLastOperation+0x88>)
8006166: 68db ldr r3, [r3, #12]
8006168: f003 0310 and.w r3, r3, #16
800616c: 2b00 cmp r3, #0
800616e: d10b bne.n 8006188 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8006170: 4b0a ldr r3, [pc, #40] @ (800619c <FLASH_WaitForLastOperation+0x88>)
8006172: 69db ldr r3, [r3, #28]
8006174: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8006178: 2b00 cmp r3, #0
800617a: d105 bne.n 8006188 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
800617c: 4b07 ldr r3, [pc, #28] @ (800619c <FLASH_WaitForLastOperation+0x88>)
800617e: 68db ldr r3, [r3, #12]
8006180: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8006184: 2b00 cmp r3, #0
8006186: d003 beq.n 8006190 <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
8006188: f000 f80a bl 80061a0 <FLASH_SetErrorCode>
return HAL_ERROR;
800618c: 2301 movs r3, #1
800618e: e000 b.n 8006192 <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
8006190: 2300 movs r3, #0
}
8006192: 4618 mov r0, r3
8006194: 3710 adds r7, #16
8006196: 46bd mov sp, r7
8006198: bd80 pop {r7, pc}
800619a: bf00 nop
800619c: 40022000 .word 0x40022000
080061a0 <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
80061a0: b480 push {r7}
80061a2: b083 sub sp, #12
80061a4: af00 add r7, sp, #0
uint32_t flags = 0U;
80061a6: 2300 movs r3, #0
80061a8: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
80061aa: 4b23 ldr r3, [pc, #140] @ (8006238 <FLASH_SetErrorCode+0x98>)
80061ac: 68db ldr r3, [r3, #12]
80061ae: f003 0310 and.w r3, r3, #16
80061b2: 2b00 cmp r3, #0
80061b4: d009 beq.n 80061ca <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
80061b6: 4b21 ldr r3, [pc, #132] @ (800623c <FLASH_SetErrorCode+0x9c>)
80061b8: 69db ldr r3, [r3, #28]
80061ba: f043 0302 orr.w r3, r3, #2
80061be: 4a1f ldr r2, [pc, #124] @ (800623c <FLASH_SetErrorCode+0x9c>)
80061c0: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
80061c2: 687b ldr r3, [r7, #4]
80061c4: f043 0310 orr.w r3, r3, #16
80061c8: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
80061ca: 4b1b ldr r3, [pc, #108] @ (8006238 <FLASH_SetErrorCode+0x98>)
80061cc: 68db ldr r3, [r3, #12]
80061ce: f003 0304 and.w r3, r3, #4
80061d2: 2b00 cmp r3, #0
80061d4: d009 beq.n 80061ea <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
80061d6: 4b19 ldr r3, [pc, #100] @ (800623c <FLASH_SetErrorCode+0x9c>)
80061d8: 69db ldr r3, [r3, #28]
80061da: f043 0301 orr.w r3, r3, #1
80061de: 4a17 ldr r2, [pc, #92] @ (800623c <FLASH_SetErrorCode+0x9c>)
80061e0: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
80061e2: 687b ldr r3, [r7, #4]
80061e4: f043 0304 orr.w r3, r3, #4
80061e8: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
80061ea: 4b13 ldr r3, [pc, #76] @ (8006238 <FLASH_SetErrorCode+0x98>)
80061ec: 69db ldr r3, [r3, #28]
80061ee: f003 0301 and.w r3, r3, #1
80061f2: 2b00 cmp r3, #0
80061f4: d00b beq.n 800620e <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
80061f6: 4b11 ldr r3, [pc, #68] @ (800623c <FLASH_SetErrorCode+0x9c>)
80061f8: 69db ldr r3, [r3, #28]
80061fa: f043 0304 orr.w r3, r3, #4
80061fe: 4a0f ldr r2, [pc, #60] @ (800623c <FLASH_SetErrorCode+0x9c>)
8006200: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
8006202: 4b0d ldr r3, [pc, #52] @ (8006238 <FLASH_SetErrorCode+0x98>)
8006204: 69db ldr r3, [r3, #28]
8006206: 4a0c ldr r2, [pc, #48] @ (8006238 <FLASH_SetErrorCode+0x98>)
8006208: f023 0301 bic.w r3, r3, #1
800620c: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
800620e: 687b ldr r3, [r7, #4]
8006210: f240 1201 movw r2, #257 @ 0x101
8006214: 4293 cmp r3, r2
8006216: d106 bne.n 8006226 <FLASH_SetErrorCode+0x86>
8006218: 4b07 ldr r3, [pc, #28] @ (8006238 <FLASH_SetErrorCode+0x98>)
800621a: 69db ldr r3, [r3, #28]
800621c: 4a06 ldr r2, [pc, #24] @ (8006238 <FLASH_SetErrorCode+0x98>)
800621e: f023 0301 bic.w r3, r3, #1
8006222: 61d3 str r3, [r2, #28]
}
8006224: e002 b.n 800622c <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
8006226: 4a04 ldr r2, [pc, #16] @ (8006238 <FLASH_SetErrorCode+0x98>)
8006228: 687b ldr r3, [r7, #4]
800622a: 60d3 str r3, [r2, #12]
}
800622c: bf00 nop
800622e: 370c adds r7, #12
8006230: 46bd mov sp, r7
8006232: bc80 pop {r7}
8006234: 4770 bx lr
8006236: bf00 nop
8006238: 40022000 .word 0x40022000
800623c: 20000478 .word 0x20000478
08006240 <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
8006240: b580 push {r7, lr}
8006242: b084 sub sp, #16
8006244: af00 add r7, sp, #0
8006246: 6078 str r0, [r7, #4]
8006248: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
800624a: 2301 movs r3, #1
800624c: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
800624e: 2300 movs r3, #0
8006250: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
8006252: 4b2f ldr r3, [pc, #188] @ (8006310 <HAL_FLASHEx_Erase+0xd0>)
8006254: 7e1b ldrb r3, [r3, #24]
8006256: 2b01 cmp r3, #1
8006258: d101 bne.n 800625e <HAL_FLASHEx_Erase+0x1e>
800625a: 2302 movs r3, #2
800625c: e053 b.n 8006306 <HAL_FLASHEx_Erase+0xc6>
800625e: 4b2c ldr r3, [pc, #176] @ (8006310 <HAL_FLASHEx_Erase+0xd0>)
8006260: 2201 movs r2, #1
8006262: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
8006264: 687b ldr r3, [r7, #4]
8006266: 681b ldr r3, [r3, #0]
8006268: 2b02 cmp r3, #2
800626a: d116 bne.n 800629a <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
800626c: f24c 3050 movw r0, #50000 @ 0xc350
8006270: f7ff ff50 bl 8006114 <FLASH_WaitForLastOperation>
8006274: 4603 mov r3, r0
8006276: 2b00 cmp r3, #0
8006278: d141 bne.n 80062fe <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
800627a: 2001 movs r0, #1
800627c: f000 f84c bl 8006318 <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8006280: f24c 3050 movw r0, #50000 @ 0xc350
8006284: f7ff ff46 bl 8006114 <FLASH_WaitForLastOperation>
8006288: 4603 mov r3, r0
800628a: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
800628c: 4b21 ldr r3, [pc, #132] @ (8006314 <HAL_FLASHEx_Erase+0xd4>)
800628e: 691b ldr r3, [r3, #16]
8006290: 4a20 ldr r2, [pc, #128] @ (8006314 <HAL_FLASHEx_Erase+0xd4>)
8006292: f023 0304 bic.w r3, r3, #4
8006296: 6113 str r3, [r2, #16]
8006298: e031 b.n 80062fe <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
800629a: f24c 3050 movw r0, #50000 @ 0xc350
800629e: f7ff ff39 bl 8006114 <FLASH_WaitForLastOperation>
80062a2: 4603 mov r3, r0
80062a4: 2b00 cmp r3, #0
80062a6: d12a bne.n 80062fe <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
80062a8: 683b ldr r3, [r7, #0]
80062aa: f04f 32ff mov.w r2, #4294967295
80062ae: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
80062b0: 687b ldr r3, [r7, #4]
80062b2: 689b ldr r3, [r3, #8]
80062b4: 60bb str r3, [r7, #8]
80062b6: e019 b.n 80062ec <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
80062b8: 68b8 ldr r0, [r7, #8]
80062ba: f000 f849 bl 8006350 <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
80062be: f24c 3050 movw r0, #50000 @ 0xc350
80062c2: f7ff ff27 bl 8006114 <FLASH_WaitForLastOperation>
80062c6: 4603 mov r3, r0
80062c8: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
80062ca: 4b12 ldr r3, [pc, #72] @ (8006314 <HAL_FLASHEx_Erase+0xd4>)
80062cc: 691b ldr r3, [r3, #16]
80062ce: 4a11 ldr r2, [pc, #68] @ (8006314 <HAL_FLASHEx_Erase+0xd4>)
80062d0: f023 0302 bic.w r3, r3, #2
80062d4: 6113 str r3, [r2, #16]
if (status != HAL_OK)
80062d6: 7bfb ldrb r3, [r7, #15]
80062d8: 2b00 cmp r3, #0
80062da: d003 beq.n 80062e4 <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
80062dc: 683b ldr r3, [r7, #0]
80062de: 68ba ldr r2, [r7, #8]
80062e0: 601a str r2, [r3, #0]
break;
80062e2: e00c b.n 80062fe <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
80062e4: 68bb ldr r3, [r7, #8]
80062e6: f503 6380 add.w r3, r3, #1024 @ 0x400
80062ea: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
80062ec: 687b ldr r3, [r7, #4]
80062ee: 68db ldr r3, [r3, #12]
80062f0: 029a lsls r2, r3, #10
80062f2: 687b ldr r3, [r7, #4]
80062f4: 689b ldr r3, [r3, #8]
80062f6: 4413 add r3, r2
80062f8: 68ba ldr r2, [r7, #8]
80062fa: 429a cmp r2, r3
80062fc: d3dc bcc.n 80062b8 <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
80062fe: 4b04 ldr r3, [pc, #16] @ (8006310 <HAL_FLASHEx_Erase+0xd0>)
8006300: 2200 movs r2, #0
8006302: 761a strb r2, [r3, #24]
return status;
8006304: 7bfb ldrb r3, [r7, #15]
}
8006306: 4618 mov r0, r3
8006308: 3710 adds r7, #16
800630a: 46bd mov sp, r7
800630c: bd80 pop {r7, pc}
800630e: bf00 nop
8006310: 20000478 .word 0x20000478
8006314: 40022000 .word 0x40022000
08006318 <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
8006318: b480 push {r7}
800631a: b083 sub sp, #12
800631c: af00 add r7, sp, #0
800631e: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8006320: 4b09 ldr r3, [pc, #36] @ (8006348 <FLASH_MassErase+0x30>)
8006322: 2200 movs r2, #0
8006324: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
8006326: 4b09 ldr r3, [pc, #36] @ (800634c <FLASH_MassErase+0x34>)
8006328: 691b ldr r3, [r3, #16]
800632a: 4a08 ldr r2, [pc, #32] @ (800634c <FLASH_MassErase+0x34>)
800632c: f043 0304 orr.w r3, r3, #4
8006330: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8006332: 4b06 ldr r3, [pc, #24] @ (800634c <FLASH_MassErase+0x34>)
8006334: 691b ldr r3, [r3, #16]
8006336: 4a05 ldr r2, [pc, #20] @ (800634c <FLASH_MassErase+0x34>)
8006338: f043 0340 orr.w r3, r3, #64 @ 0x40
800633c: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
800633e: bf00 nop
8006340: 370c adds r7, #12
8006342: 46bd mov sp, r7
8006344: bc80 pop {r7}
8006346: 4770 bx lr
8006348: 20000478 .word 0x20000478
800634c: 40022000 .word 0x40022000
08006350 <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
8006350: b480 push {r7}
8006352: b083 sub sp, #12
8006354: af00 add r7, sp, #0
8006356: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8006358: 4b0b ldr r3, [pc, #44] @ (8006388 <FLASH_PageErase+0x38>)
800635a: 2200 movs r2, #0
800635c: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
800635e: 4b0b ldr r3, [pc, #44] @ (800638c <FLASH_PageErase+0x3c>)
8006360: 691b ldr r3, [r3, #16]
8006362: 4a0a ldr r2, [pc, #40] @ (800638c <FLASH_PageErase+0x3c>)
8006364: f043 0302 orr.w r3, r3, #2
8006368: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
800636a: 4a08 ldr r2, [pc, #32] @ (800638c <FLASH_PageErase+0x3c>)
800636c: 687b ldr r3, [r7, #4]
800636e: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8006370: 4b06 ldr r3, [pc, #24] @ (800638c <FLASH_PageErase+0x3c>)
8006372: 691b ldr r3, [r3, #16]
8006374: 4a05 ldr r2, [pc, #20] @ (800638c <FLASH_PageErase+0x3c>)
8006376: f043 0340 orr.w r3, r3, #64 @ 0x40
800637a: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
800637c: bf00 nop
800637e: 370c adds r7, #12
8006380: 46bd mov sp, r7
8006382: bc80 pop {r7}
8006384: 4770 bx lr
8006386: bf00 nop
8006388: 20000478 .word 0x20000478
800638c: 40022000 .word 0x40022000
08006390 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8006390: b480 push {r7}
8006392: b08b sub sp, #44 @ 0x2c
8006394: af00 add r7, sp, #0
8006396: 6078 str r0, [r7, #4]
8006398: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
800639a: 2300 movs r3, #0
800639c: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
800639e: 2300 movs r3, #0
80063a0: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
80063a2: e169 b.n 8006678 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
80063a4: 2201 movs r2, #1
80063a6: 6a7b ldr r3, [r7, #36] @ 0x24
80063a8: fa02 f303 lsl.w r3, r2, r3
80063ac: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
80063ae: 683b ldr r3, [r7, #0]
80063b0: 681b ldr r3, [r3, #0]
80063b2: 69fa ldr r2, [r7, #28]
80063b4: 4013 ands r3, r2
80063b6: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
80063b8: 69ba ldr r2, [r7, #24]
80063ba: 69fb ldr r3, [r7, #28]
80063bc: 429a cmp r2, r3
80063be: f040 8158 bne.w 8006672 <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
80063c2: 683b ldr r3, [r7, #0]
80063c4: 685b ldr r3, [r3, #4]
80063c6: 4a9a ldr r2, [pc, #616] @ (8006630 <HAL_GPIO_Init+0x2a0>)
80063c8: 4293 cmp r3, r2
80063ca: d05e beq.n 800648a <HAL_GPIO_Init+0xfa>
80063cc: 4a98 ldr r2, [pc, #608] @ (8006630 <HAL_GPIO_Init+0x2a0>)
80063ce: 4293 cmp r3, r2
80063d0: d875 bhi.n 80064be <HAL_GPIO_Init+0x12e>
80063d2: 4a98 ldr r2, [pc, #608] @ (8006634 <HAL_GPIO_Init+0x2a4>)
80063d4: 4293 cmp r3, r2
80063d6: d058 beq.n 800648a <HAL_GPIO_Init+0xfa>
80063d8: 4a96 ldr r2, [pc, #600] @ (8006634 <HAL_GPIO_Init+0x2a4>)
80063da: 4293 cmp r3, r2
80063dc: d86f bhi.n 80064be <HAL_GPIO_Init+0x12e>
80063de: 4a96 ldr r2, [pc, #600] @ (8006638 <HAL_GPIO_Init+0x2a8>)
80063e0: 4293 cmp r3, r2
80063e2: d052 beq.n 800648a <HAL_GPIO_Init+0xfa>
80063e4: 4a94 ldr r2, [pc, #592] @ (8006638 <HAL_GPIO_Init+0x2a8>)
80063e6: 4293 cmp r3, r2
80063e8: d869 bhi.n 80064be <HAL_GPIO_Init+0x12e>
80063ea: 4a94 ldr r2, [pc, #592] @ (800663c <HAL_GPIO_Init+0x2ac>)
80063ec: 4293 cmp r3, r2
80063ee: d04c beq.n 800648a <HAL_GPIO_Init+0xfa>
80063f0: 4a92 ldr r2, [pc, #584] @ (800663c <HAL_GPIO_Init+0x2ac>)
80063f2: 4293 cmp r3, r2
80063f4: d863 bhi.n 80064be <HAL_GPIO_Init+0x12e>
80063f6: 4a92 ldr r2, [pc, #584] @ (8006640 <HAL_GPIO_Init+0x2b0>)
80063f8: 4293 cmp r3, r2
80063fa: d046 beq.n 800648a <HAL_GPIO_Init+0xfa>
80063fc: 4a90 ldr r2, [pc, #576] @ (8006640 <HAL_GPIO_Init+0x2b0>)
80063fe: 4293 cmp r3, r2
8006400: d85d bhi.n 80064be <HAL_GPIO_Init+0x12e>
8006402: 2b12 cmp r3, #18
8006404: d82a bhi.n 800645c <HAL_GPIO_Init+0xcc>
8006406: 2b12 cmp r3, #18
8006408: d859 bhi.n 80064be <HAL_GPIO_Init+0x12e>
800640a: a201 add r2, pc, #4 @ (adr r2, 8006410 <HAL_GPIO_Init+0x80>)
800640c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006410: 0800648b .word 0x0800648b
8006414: 08006465 .word 0x08006465
8006418: 08006477 .word 0x08006477
800641c: 080064b9 .word 0x080064b9
8006420: 080064bf .word 0x080064bf
8006424: 080064bf .word 0x080064bf
8006428: 080064bf .word 0x080064bf
800642c: 080064bf .word 0x080064bf
8006430: 080064bf .word 0x080064bf
8006434: 080064bf .word 0x080064bf
8006438: 080064bf .word 0x080064bf
800643c: 080064bf .word 0x080064bf
8006440: 080064bf .word 0x080064bf
8006444: 080064bf .word 0x080064bf
8006448: 080064bf .word 0x080064bf
800644c: 080064bf .word 0x080064bf
8006450: 080064bf .word 0x080064bf
8006454: 0800646d .word 0x0800646d
8006458: 08006481 .word 0x08006481
800645c: 4a79 ldr r2, [pc, #484] @ (8006644 <HAL_GPIO_Init+0x2b4>)
800645e: 4293 cmp r3, r2
8006460: d013 beq.n 800648a <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8006462: e02c b.n 80064be <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8006464: 683b ldr r3, [r7, #0]
8006466: 68db ldr r3, [r3, #12]
8006468: 623b str r3, [r7, #32]
break;
800646a: e029 b.n 80064c0 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
800646c: 683b ldr r3, [r7, #0]
800646e: 68db ldr r3, [r3, #12]
8006470: 3304 adds r3, #4
8006472: 623b str r3, [r7, #32]
break;
8006474: e024 b.n 80064c0 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
8006476: 683b ldr r3, [r7, #0]
8006478: 68db ldr r3, [r3, #12]
800647a: 3308 adds r3, #8
800647c: 623b str r3, [r7, #32]
break;
800647e: e01f b.n 80064c0 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8006480: 683b ldr r3, [r7, #0]
8006482: 68db ldr r3, [r3, #12]
8006484: 330c adds r3, #12
8006486: 623b str r3, [r7, #32]
break;
8006488: e01a b.n 80064c0 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
800648a: 683b ldr r3, [r7, #0]
800648c: 689b ldr r3, [r3, #8]
800648e: 2b00 cmp r3, #0
8006490: d102 bne.n 8006498 <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8006492: 2304 movs r3, #4
8006494: 623b str r3, [r7, #32]
break;
8006496: e013 b.n 80064c0 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8006498: 683b ldr r3, [r7, #0]
800649a: 689b ldr r3, [r3, #8]
800649c: 2b01 cmp r3, #1
800649e: d105 bne.n 80064ac <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
80064a0: 2308 movs r3, #8
80064a2: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
80064a4: 687b ldr r3, [r7, #4]
80064a6: 69fa ldr r2, [r7, #28]
80064a8: 611a str r2, [r3, #16]
break;
80064aa: e009 b.n 80064c0 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
80064ac: 2308 movs r3, #8
80064ae: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
80064b0: 687b ldr r3, [r7, #4]
80064b2: 69fa ldr r2, [r7, #28]
80064b4: 615a str r2, [r3, #20]
break;
80064b6: e003 b.n 80064c0 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
80064b8: 2300 movs r3, #0
80064ba: 623b str r3, [r7, #32]
break;
80064bc: e000 b.n 80064c0 <HAL_GPIO_Init+0x130>
break;
80064be: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
80064c0: 69bb ldr r3, [r7, #24]
80064c2: 2bff cmp r3, #255 @ 0xff
80064c4: d801 bhi.n 80064ca <HAL_GPIO_Init+0x13a>
80064c6: 687b ldr r3, [r7, #4]
80064c8: e001 b.n 80064ce <HAL_GPIO_Init+0x13e>
80064ca: 687b ldr r3, [r7, #4]
80064cc: 3304 adds r3, #4
80064ce: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
80064d0: 69bb ldr r3, [r7, #24]
80064d2: 2bff cmp r3, #255 @ 0xff
80064d4: d802 bhi.n 80064dc <HAL_GPIO_Init+0x14c>
80064d6: 6a7b ldr r3, [r7, #36] @ 0x24
80064d8: 009b lsls r3, r3, #2
80064da: e002 b.n 80064e2 <HAL_GPIO_Init+0x152>
80064dc: 6a7b ldr r3, [r7, #36] @ 0x24
80064de: 3b08 subs r3, #8
80064e0: 009b lsls r3, r3, #2
80064e2: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
80064e4: 697b ldr r3, [r7, #20]
80064e6: 681a ldr r2, [r3, #0]
80064e8: 210f movs r1, #15
80064ea: 693b ldr r3, [r7, #16]
80064ec: fa01 f303 lsl.w r3, r1, r3
80064f0: 43db mvns r3, r3
80064f2: 401a ands r2, r3
80064f4: 6a39 ldr r1, [r7, #32]
80064f6: 693b ldr r3, [r7, #16]
80064f8: fa01 f303 lsl.w r3, r1, r3
80064fc: 431a orrs r2, r3
80064fe: 697b ldr r3, [r7, #20]
8006500: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8006502: 683b ldr r3, [r7, #0]
8006504: 685b ldr r3, [r3, #4]
8006506: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800650a: 2b00 cmp r3, #0
800650c: f000 80b1 beq.w 8006672 <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8006510: 4b4d ldr r3, [pc, #308] @ (8006648 <HAL_GPIO_Init+0x2b8>)
8006512: 699b ldr r3, [r3, #24]
8006514: 4a4c ldr r2, [pc, #304] @ (8006648 <HAL_GPIO_Init+0x2b8>)
8006516: f043 0301 orr.w r3, r3, #1
800651a: 6193 str r3, [r2, #24]
800651c: 4b4a ldr r3, [pc, #296] @ (8006648 <HAL_GPIO_Init+0x2b8>)
800651e: 699b ldr r3, [r3, #24]
8006520: f003 0301 and.w r3, r3, #1
8006524: 60bb str r3, [r7, #8]
8006526: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8006528: 4a48 ldr r2, [pc, #288] @ (800664c <HAL_GPIO_Init+0x2bc>)
800652a: 6a7b ldr r3, [r7, #36] @ 0x24
800652c: 089b lsrs r3, r3, #2
800652e: 3302 adds r3, #2
8006530: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8006534: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
8006536: 6a7b ldr r3, [r7, #36] @ 0x24
8006538: f003 0303 and.w r3, r3, #3
800653c: 009b lsls r3, r3, #2
800653e: 220f movs r2, #15
8006540: fa02 f303 lsl.w r3, r2, r3
8006544: 43db mvns r3, r3
8006546: 68fa ldr r2, [r7, #12]
8006548: 4013 ands r3, r2
800654a: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
800654c: 687b ldr r3, [r7, #4]
800654e: 4a40 ldr r2, [pc, #256] @ (8006650 <HAL_GPIO_Init+0x2c0>)
8006550: 4293 cmp r3, r2
8006552: d013 beq.n 800657c <HAL_GPIO_Init+0x1ec>
8006554: 687b ldr r3, [r7, #4]
8006556: 4a3f ldr r2, [pc, #252] @ (8006654 <HAL_GPIO_Init+0x2c4>)
8006558: 4293 cmp r3, r2
800655a: d00d beq.n 8006578 <HAL_GPIO_Init+0x1e8>
800655c: 687b ldr r3, [r7, #4]
800655e: 4a3e ldr r2, [pc, #248] @ (8006658 <HAL_GPIO_Init+0x2c8>)
8006560: 4293 cmp r3, r2
8006562: d007 beq.n 8006574 <HAL_GPIO_Init+0x1e4>
8006564: 687b ldr r3, [r7, #4]
8006566: 4a3d ldr r2, [pc, #244] @ (800665c <HAL_GPIO_Init+0x2cc>)
8006568: 4293 cmp r3, r2
800656a: d101 bne.n 8006570 <HAL_GPIO_Init+0x1e0>
800656c: 2303 movs r3, #3
800656e: e006 b.n 800657e <HAL_GPIO_Init+0x1ee>
8006570: 2304 movs r3, #4
8006572: e004 b.n 800657e <HAL_GPIO_Init+0x1ee>
8006574: 2302 movs r3, #2
8006576: e002 b.n 800657e <HAL_GPIO_Init+0x1ee>
8006578: 2301 movs r3, #1
800657a: e000 b.n 800657e <HAL_GPIO_Init+0x1ee>
800657c: 2300 movs r3, #0
800657e: 6a7a ldr r2, [r7, #36] @ 0x24
8006580: f002 0203 and.w r2, r2, #3
8006584: 0092 lsls r2, r2, #2
8006586: 4093 lsls r3, r2
8006588: 68fa ldr r2, [r7, #12]
800658a: 4313 orrs r3, r2
800658c: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
800658e: 492f ldr r1, [pc, #188] @ (800664c <HAL_GPIO_Init+0x2bc>)
8006590: 6a7b ldr r3, [r7, #36] @ 0x24
8006592: 089b lsrs r3, r3, #2
8006594: 3302 adds r3, #2
8006596: 68fa ldr r2, [r7, #12]
8006598: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
800659c: 683b ldr r3, [r7, #0]
800659e: 685b ldr r3, [r3, #4]
80065a0: f403 1380 and.w r3, r3, #1048576 @ 0x100000
80065a4: 2b00 cmp r3, #0
80065a6: d006 beq.n 80065b6 <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
80065a8: 4b2d ldr r3, [pc, #180] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065aa: 689a ldr r2, [r3, #8]
80065ac: 492c ldr r1, [pc, #176] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065ae: 69bb ldr r3, [r7, #24]
80065b0: 4313 orrs r3, r2
80065b2: 608b str r3, [r1, #8]
80065b4: e006 b.n 80065c4 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
80065b6: 4b2a ldr r3, [pc, #168] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065b8: 689a ldr r2, [r3, #8]
80065ba: 69bb ldr r3, [r7, #24]
80065bc: 43db mvns r3, r3
80065be: 4928 ldr r1, [pc, #160] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065c0: 4013 ands r3, r2
80065c2: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
80065c4: 683b ldr r3, [r7, #0]
80065c6: 685b ldr r3, [r3, #4]
80065c8: f403 1300 and.w r3, r3, #2097152 @ 0x200000
80065cc: 2b00 cmp r3, #0
80065ce: d006 beq.n 80065de <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
80065d0: 4b23 ldr r3, [pc, #140] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065d2: 68da ldr r2, [r3, #12]
80065d4: 4922 ldr r1, [pc, #136] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065d6: 69bb ldr r3, [r7, #24]
80065d8: 4313 orrs r3, r2
80065da: 60cb str r3, [r1, #12]
80065dc: e006 b.n 80065ec <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
80065de: 4b20 ldr r3, [pc, #128] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065e0: 68da ldr r2, [r3, #12]
80065e2: 69bb ldr r3, [r7, #24]
80065e4: 43db mvns r3, r3
80065e6: 491e ldr r1, [pc, #120] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065e8: 4013 ands r3, r2
80065ea: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
80065ec: 683b ldr r3, [r7, #0]
80065ee: 685b ldr r3, [r3, #4]
80065f0: f403 3300 and.w r3, r3, #131072 @ 0x20000
80065f4: 2b00 cmp r3, #0
80065f6: d006 beq.n 8006606 <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
80065f8: 4b19 ldr r3, [pc, #100] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065fa: 685a ldr r2, [r3, #4]
80065fc: 4918 ldr r1, [pc, #96] @ (8006660 <HAL_GPIO_Init+0x2d0>)
80065fe: 69bb ldr r3, [r7, #24]
8006600: 4313 orrs r3, r2
8006602: 604b str r3, [r1, #4]
8006604: e006 b.n 8006614 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
8006606: 4b16 ldr r3, [pc, #88] @ (8006660 <HAL_GPIO_Init+0x2d0>)
8006608: 685a ldr r2, [r3, #4]
800660a: 69bb ldr r3, [r7, #24]
800660c: 43db mvns r3, r3
800660e: 4914 ldr r1, [pc, #80] @ (8006660 <HAL_GPIO_Init+0x2d0>)
8006610: 4013 ands r3, r2
8006612: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8006614: 683b ldr r3, [r7, #0]
8006616: 685b ldr r3, [r3, #4]
8006618: f403 3380 and.w r3, r3, #65536 @ 0x10000
800661c: 2b00 cmp r3, #0
800661e: d021 beq.n 8006664 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
8006620: 4b0f ldr r3, [pc, #60] @ (8006660 <HAL_GPIO_Init+0x2d0>)
8006622: 681a ldr r2, [r3, #0]
8006624: 490e ldr r1, [pc, #56] @ (8006660 <HAL_GPIO_Init+0x2d0>)
8006626: 69bb ldr r3, [r7, #24]
8006628: 4313 orrs r3, r2
800662a: 600b str r3, [r1, #0]
800662c: e021 b.n 8006672 <HAL_GPIO_Init+0x2e2>
800662e: bf00 nop
8006630: 10320000 .word 0x10320000
8006634: 10310000 .word 0x10310000
8006638: 10220000 .word 0x10220000
800663c: 10210000 .word 0x10210000
8006640: 10120000 .word 0x10120000
8006644: 10110000 .word 0x10110000
8006648: 40021000 .word 0x40021000
800664c: 40010000 .word 0x40010000
8006650: 40010800 .word 0x40010800
8006654: 40010c00 .word 0x40010c00
8006658: 40011000 .word 0x40011000
800665c: 40011400 .word 0x40011400
8006660: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8006664: 4b0b ldr r3, [pc, #44] @ (8006694 <HAL_GPIO_Init+0x304>)
8006666: 681a ldr r2, [r3, #0]
8006668: 69bb ldr r3, [r7, #24]
800666a: 43db mvns r3, r3
800666c: 4909 ldr r1, [pc, #36] @ (8006694 <HAL_GPIO_Init+0x304>)
800666e: 4013 ands r3, r2
8006670: 600b str r3, [r1, #0]
}
}
}
position++;
8006672: 6a7b ldr r3, [r7, #36] @ 0x24
8006674: 3301 adds r3, #1
8006676: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
8006678: 683b ldr r3, [r7, #0]
800667a: 681a ldr r2, [r3, #0]
800667c: 6a7b ldr r3, [r7, #36] @ 0x24
800667e: fa22 f303 lsr.w r3, r2, r3
8006682: 2b00 cmp r3, #0
8006684: f47f ae8e bne.w 80063a4 <HAL_GPIO_Init+0x14>
}
}
8006688: bf00 nop
800668a: bf00 nop
800668c: 372c adds r7, #44 @ 0x2c
800668e: 46bd mov sp, r7
8006690: bc80 pop {r7}
8006692: 4770 bx lr
8006694: 40010400 .word 0x40010400
08006698 <HAL_GPIO_ReadPin>:
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8006698: b480 push {r7}
800669a: b085 sub sp, #20
800669c: af00 add r7, sp, #0
800669e: 6078 str r0, [r7, #4]
80066a0: 460b mov r3, r1
80066a2: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
80066a4: 687b ldr r3, [r7, #4]
80066a6: 689a ldr r2, [r3, #8]
80066a8: 887b ldrh r3, [r7, #2]
80066aa: 4013 ands r3, r2
80066ac: 2b00 cmp r3, #0
80066ae: d002 beq.n 80066b6 <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
80066b0: 2301 movs r3, #1
80066b2: 73fb strb r3, [r7, #15]
80066b4: e001 b.n 80066ba <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
80066b6: 2300 movs r3, #0
80066b8: 73fb strb r3, [r7, #15]
}
return bitstatus;
80066ba: 7bfb ldrb r3, [r7, #15]
}
80066bc: 4618 mov r0, r3
80066be: 3714 adds r7, #20
80066c0: 46bd mov sp, r7
80066c2: bc80 pop {r7}
80066c4: 4770 bx lr
080066c6 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
80066c6: b480 push {r7}
80066c8: b083 sub sp, #12
80066ca: af00 add r7, sp, #0
80066cc: 6078 str r0, [r7, #4]
80066ce: 460b mov r3, r1
80066d0: 807b strh r3, [r7, #2]
80066d2: 4613 mov r3, r2
80066d4: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
80066d6: 787b ldrb r3, [r7, #1]
80066d8: 2b00 cmp r3, #0
80066da: d003 beq.n 80066e4 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
80066dc: 887a ldrh r2, [r7, #2]
80066de: 687b ldr r3, [r7, #4]
80066e0: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
80066e2: e003 b.n 80066ec <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
80066e4: 887b ldrh r3, [r7, #2]
80066e6: 041a lsls r2, r3, #16
80066e8: 687b ldr r3, [r7, #4]
80066ea: 611a str r2, [r3, #16]
}
80066ec: bf00 nop
80066ee: 370c adds r7, #12
80066f0: 46bd mov sp, r7
80066f2: bc80 pop {r7}
80066f4: 4770 bx lr
080066f6 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
80066f6: b580 push {r7, lr}
80066f8: b084 sub sp, #16
80066fa: af00 add r7, sp, #0
80066fc: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
80066fe: 687b ldr r3, [r7, #4]
8006700: 2b00 cmp r3, #0
8006702: d101 bne.n 8006708 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8006704: 2301 movs r3, #1
8006706: e0e8 b.n 80068da <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8006708: 687b ldr r3, [r7, #4]
800670a: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
800670e: b2db uxtb r3, r3
8006710: 2b00 cmp r3, #0
8006712: d106 bne.n 8006722 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8006714: 687b ldr r3, [r7, #4]
8006716: 2200 movs r2, #0
8006718: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
800671c: 6878 ldr r0, [r7, #4]
800671e: f007 fc17 bl 800df50 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8006722: 687b ldr r3, [r7, #4]
8006724: 2203 movs r2, #3
8006726: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
800672a: 687b ldr r3, [r7, #4]
800672c: 2200 movs r2, #0
800672e: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8006730: 687b ldr r3, [r7, #4]
8006732: 681b ldr r3, [r3, #0]
8006734: 4618 mov r0, r3
8006736: f003 fabc bl 8009cb2 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
800673a: 687b ldr r3, [r7, #4]
800673c: 6818 ldr r0, [r3, #0]
800673e: 687b ldr r3, [r7, #4]
8006740: 3304 adds r3, #4
8006742: cb0e ldmia r3, {r1, r2, r3}
8006744: f003 fa92 bl 8009c6c <USB_CoreInit>
8006748: 4603 mov r3, r0
800674a: 2b00 cmp r3, #0
800674c: d005 beq.n 800675a <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800674e: 687b ldr r3, [r7, #4]
8006750: 2202 movs r2, #2
8006752: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006756: 2301 movs r3, #1
8006758: e0bf b.n 80068da <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
800675a: 687b ldr r3, [r7, #4]
800675c: 681b ldr r3, [r3, #0]
800675e: 2100 movs r1, #0
8006760: 4618 mov r0, r3
8006762: f003 fac0 bl 8009ce6 <USB_SetCurrentMode>
8006766: 4603 mov r3, r0
8006768: 2b00 cmp r3, #0
800676a: d005 beq.n 8006778 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800676c: 687b ldr r3, [r7, #4]
800676e: 2202 movs r2, #2
8006770: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006774: 2301 movs r3, #1
8006776: e0b0 b.n 80068da <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006778: 2300 movs r3, #0
800677a: 73fb strb r3, [r7, #15]
800677c: e03e b.n 80067fc <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
800677e: 7bfa ldrb r2, [r7, #15]
8006780: 6879 ldr r1, [r7, #4]
8006782: 4613 mov r3, r2
8006784: 009b lsls r3, r3, #2
8006786: 4413 add r3, r2
8006788: 00db lsls r3, r3, #3
800678a: 440b add r3, r1
800678c: 3311 adds r3, #17
800678e: 2201 movs r2, #1
8006790: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8006792: 7bfa ldrb r2, [r7, #15]
8006794: 6879 ldr r1, [r7, #4]
8006796: 4613 mov r3, r2
8006798: 009b lsls r3, r3, #2
800679a: 4413 add r3, r2
800679c: 00db lsls r3, r3, #3
800679e: 440b add r3, r1
80067a0: 3310 adds r3, #16
80067a2: 7bfa ldrb r2, [r7, #15]
80067a4: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
80067a6: 7bfa ldrb r2, [r7, #15]
80067a8: 6879 ldr r1, [r7, #4]
80067aa: 4613 mov r3, r2
80067ac: 009b lsls r3, r3, #2
80067ae: 4413 add r3, r2
80067b0: 00db lsls r3, r3, #3
80067b2: 440b add r3, r1
80067b4: 3313 adds r3, #19
80067b6: 2200 movs r2, #0
80067b8: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
80067ba: 7bfa ldrb r2, [r7, #15]
80067bc: 6879 ldr r1, [r7, #4]
80067be: 4613 mov r3, r2
80067c0: 009b lsls r3, r3, #2
80067c2: 4413 add r3, r2
80067c4: 00db lsls r3, r3, #3
80067c6: 440b add r3, r1
80067c8: 3320 adds r3, #32
80067ca: 2200 movs r2, #0
80067cc: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
80067ce: 7bfa ldrb r2, [r7, #15]
80067d0: 6879 ldr r1, [r7, #4]
80067d2: 4613 mov r3, r2
80067d4: 009b lsls r3, r3, #2
80067d6: 4413 add r3, r2
80067d8: 00db lsls r3, r3, #3
80067da: 440b add r3, r1
80067dc: 3324 adds r3, #36 @ 0x24
80067de: 2200 movs r2, #0
80067e0: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
80067e2: 7bfb ldrb r3, [r7, #15]
80067e4: 6879 ldr r1, [r7, #4]
80067e6: 1c5a adds r2, r3, #1
80067e8: 4613 mov r3, r2
80067ea: 009b lsls r3, r3, #2
80067ec: 4413 add r3, r2
80067ee: 00db lsls r3, r3, #3
80067f0: 440b add r3, r1
80067f2: 2200 movs r2, #0
80067f4: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80067f6: 7bfb ldrb r3, [r7, #15]
80067f8: 3301 adds r3, #1
80067fa: 73fb strb r3, [r7, #15]
80067fc: 687b ldr r3, [r7, #4]
80067fe: 791b ldrb r3, [r3, #4]
8006800: 7bfa ldrb r2, [r7, #15]
8006802: 429a cmp r2, r3
8006804: d3bb bcc.n 800677e <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006806: 2300 movs r3, #0
8006808: 73fb strb r3, [r7, #15]
800680a: e044 b.n 8006896 <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
800680c: 7bfa ldrb r2, [r7, #15]
800680e: 6879 ldr r1, [r7, #4]
8006810: 4613 mov r3, r2
8006812: 009b lsls r3, r3, #2
8006814: 4413 add r3, r2
8006816: 00db lsls r3, r3, #3
8006818: 440b add r3, r1
800681a: f203 1351 addw r3, r3, #337 @ 0x151
800681e: 2200 movs r2, #0
8006820: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
8006822: 7bfa ldrb r2, [r7, #15]
8006824: 6879 ldr r1, [r7, #4]
8006826: 4613 mov r3, r2
8006828: 009b lsls r3, r3, #2
800682a: 4413 add r3, r2
800682c: 00db lsls r3, r3, #3
800682e: 440b add r3, r1
8006830: f503 73a8 add.w r3, r3, #336 @ 0x150
8006834: 7bfa ldrb r2, [r7, #15]
8006836: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8006838: 7bfa ldrb r2, [r7, #15]
800683a: 6879 ldr r1, [r7, #4]
800683c: 4613 mov r3, r2
800683e: 009b lsls r3, r3, #2
8006840: 4413 add r3, r2
8006842: 00db lsls r3, r3, #3
8006844: 440b add r3, r1
8006846: f203 1353 addw r3, r3, #339 @ 0x153
800684a: 2200 movs r2, #0
800684c: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
800684e: 7bfa ldrb r2, [r7, #15]
8006850: 6879 ldr r1, [r7, #4]
8006852: 4613 mov r3, r2
8006854: 009b lsls r3, r3, #2
8006856: 4413 add r3, r2
8006858: 00db lsls r3, r3, #3
800685a: 440b add r3, r1
800685c: f503 73b0 add.w r3, r3, #352 @ 0x160
8006860: 2200 movs r2, #0
8006862: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8006864: 7bfa ldrb r2, [r7, #15]
8006866: 6879 ldr r1, [r7, #4]
8006868: 4613 mov r3, r2
800686a: 009b lsls r3, r3, #2
800686c: 4413 add r3, r2
800686e: 00db lsls r3, r3, #3
8006870: 440b add r3, r1
8006872: f503 73b2 add.w r3, r3, #356 @ 0x164
8006876: 2200 movs r2, #0
8006878: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
800687a: 7bfa ldrb r2, [r7, #15]
800687c: 6879 ldr r1, [r7, #4]
800687e: 4613 mov r3, r2
8006880: 009b lsls r3, r3, #2
8006882: 4413 add r3, r2
8006884: 00db lsls r3, r3, #3
8006886: 440b add r3, r1
8006888: f503 73b4 add.w r3, r3, #360 @ 0x168
800688c: 2200 movs r2, #0
800688e: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006890: 7bfb ldrb r3, [r7, #15]
8006892: 3301 adds r3, #1
8006894: 73fb strb r3, [r7, #15]
8006896: 687b ldr r3, [r7, #4]
8006898: 791b ldrb r3, [r3, #4]
800689a: 7bfa ldrb r2, [r7, #15]
800689c: 429a cmp r2, r3
800689e: d3b5 bcc.n 800680c <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
80068a0: 687b ldr r3, [r7, #4]
80068a2: 6818 ldr r0, [r3, #0]
80068a4: 687b ldr r3, [r7, #4]
80068a6: 3304 adds r3, #4
80068a8: cb0e ldmia r3, {r1, r2, r3}
80068aa: f003 fa28 bl 8009cfe <USB_DevInit>
80068ae: 4603 mov r3, r0
80068b0: 2b00 cmp r3, #0
80068b2: d005 beq.n 80068c0 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80068b4: 687b ldr r3, [r7, #4]
80068b6: 2202 movs r2, #2
80068b8: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80068bc: 2301 movs r3, #1
80068be: e00c b.n 80068da <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
80068c0: 687b ldr r3, [r7, #4]
80068c2: 2200 movs r2, #0
80068c4: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
80068c6: 687b ldr r3, [r7, #4]
80068c8: 2201 movs r2, #1
80068ca: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
80068ce: 687b ldr r3, [r7, #4]
80068d0: 681b ldr r3, [r3, #0]
80068d2: 4618 mov r0, r3
80068d4: f005 fca7 bl 800c226 <USB_DevDisconnect>
return HAL_OK;
80068d8: 2300 movs r3, #0
}
80068da: 4618 mov r0, r3
80068dc: 3710 adds r7, #16
80068de: 46bd mov sp, r7
80068e0: bd80 pop {r7, pc}
080068e2 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
80068e2: b580 push {r7, lr}
80068e4: b082 sub sp, #8
80068e6: af00 add r7, sp, #0
80068e8: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
80068ea: 687b ldr r3, [r7, #4]
80068ec: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80068f0: 2b01 cmp r3, #1
80068f2: d101 bne.n 80068f8 <HAL_PCD_Start+0x16>
80068f4: 2302 movs r3, #2
80068f6: e016 b.n 8006926 <HAL_PCD_Start+0x44>
80068f8: 687b ldr r3, [r7, #4]
80068fa: 2201 movs r2, #1
80068fc: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
8006900: 687b ldr r3, [r7, #4]
8006902: 681b ldr r3, [r3, #0]
8006904: 4618 mov r0, r3
8006906: f003 f9be bl 8009c86 <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
800690a: 2101 movs r1, #1
800690c: 6878 ldr r0, [r7, #4]
800690e: f007 fd92 bl 800e436 <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
8006912: 687b ldr r3, [r7, #4]
8006914: 681b ldr r3, [r3, #0]
8006916: 4618 mov r0, r3
8006918: f005 fc7b bl 800c212 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
800691c: 687b ldr r3, [r7, #4]
800691e: 2200 movs r2, #0
8006920: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006924: 2300 movs r3, #0
}
8006926: 4618 mov r0, r3
8006928: 3708 adds r7, #8
800692a: 46bd mov sp, r7
800692c: bd80 pop {r7, pc}
0800692e <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
800692e: b580 push {r7, lr}
8006930: b088 sub sp, #32
8006932: af00 add r7, sp, #0
8006934: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
8006936: 687b ldr r3, [r7, #4]
8006938: 681b ldr r3, [r3, #0]
800693a: 4618 mov r0, r3
800693c: f005 fc7d bl 800c23a <USB_ReadInterrupts>
8006940: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
8006942: 69bb ldr r3, [r7, #24]
8006944: f403 4300 and.w r3, r3, #32768 @ 0x8000
8006948: 2b00 cmp r3, #0
800694a: d003 beq.n 8006954 <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
800694c: 6878 ldr r0, [r7, #4]
800694e: f000 fb1a bl 8006f86 <PCD_EP_ISR_Handler>
return;
8006952: e119 b.n 8006b88 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
8006954: 69bb ldr r3, [r7, #24]
8006956: f403 6380 and.w r3, r3, #1024 @ 0x400
800695a: 2b00 cmp r3, #0
800695c: d013 beq.n 8006986 <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
800695e: 687b ldr r3, [r7, #4]
8006960: 681b ldr r3, [r3, #0]
8006962: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006966: b29a uxth r2, r3
8006968: 687b ldr r3, [r7, #4]
800696a: 681b ldr r3, [r3, #0]
800696c: f422 6280 bic.w r2, r2, #1024 @ 0x400
8006970: b292 uxth r2, r2
8006972: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8006976: 6878 ldr r0, [r7, #4]
8006978: f007 fb65 bl 800e046 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
800697c: 2100 movs r1, #0
800697e: 6878 ldr r0, [r7, #4]
8006980: f000 f905 bl 8006b8e <HAL_PCD_SetAddress>
return;
8006984: e100 b.n 8006b88 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
8006986: 69bb ldr r3, [r7, #24]
8006988: f403 4380 and.w r3, r3, #16384 @ 0x4000
800698c: 2b00 cmp r3, #0
800698e: d00c beq.n 80069aa <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8006990: 687b ldr r3, [r7, #4]
8006992: 681b ldr r3, [r3, #0]
8006994: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006998: b29a uxth r2, r3
800699a: 687b ldr r3, [r7, #4]
800699c: 681b ldr r3, [r3, #0]
800699e: f422 4280 bic.w r2, r2, #16384 @ 0x4000
80069a2: b292 uxth r2, r2
80069a4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
80069a8: e0ee b.n 8006b88 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
80069aa: 69bb ldr r3, [r7, #24]
80069ac: f403 5300 and.w r3, r3, #8192 @ 0x2000
80069b0: 2b00 cmp r3, #0
80069b2: d00c beq.n 80069ce <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
80069b4: 687b ldr r3, [r7, #4]
80069b6: 681b ldr r3, [r3, #0]
80069b8: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80069bc: b29a uxth r2, r3
80069be: 687b ldr r3, [r7, #4]
80069c0: 681b ldr r3, [r3, #0]
80069c2: f422 5200 bic.w r2, r2, #8192 @ 0x2000
80069c6: b292 uxth r2, r2
80069c8: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
80069cc: e0dc b.n 8006b88 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
80069ce: 69bb ldr r3, [r7, #24]
80069d0: f403 5380 and.w r3, r3, #4096 @ 0x1000
80069d4: 2b00 cmp r3, #0
80069d6: d027 beq.n 8006a28 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
80069d8: 687b ldr r3, [r7, #4]
80069da: 681b ldr r3, [r3, #0]
80069dc: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80069e0: b29a uxth r2, r3
80069e2: 687b ldr r3, [r7, #4]
80069e4: 681b ldr r3, [r3, #0]
80069e6: f022 0204 bic.w r2, r2, #4
80069ea: b292 uxth r2, r2
80069ec: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
80069f0: 687b ldr r3, [r7, #4]
80069f2: 681b ldr r3, [r3, #0]
80069f4: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80069f8: b29a uxth r2, r3
80069fa: 687b ldr r3, [r7, #4]
80069fc: 681b ldr r3, [r3, #0]
80069fe: f022 0208 bic.w r2, r2, #8
8006a02: b292 uxth r2, r2
8006a04: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8006a08: 6878 ldr r0, [r7, #4]
8006a0a: f007 fb55 bl 800e0b8 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8006a0e: 687b ldr r3, [r7, #4]
8006a10: 681b ldr r3, [r3, #0]
8006a12: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006a16: b29a uxth r2, r3
8006a18: 687b ldr r3, [r7, #4]
8006a1a: 681b ldr r3, [r3, #0]
8006a1c: f422 5280 bic.w r2, r2, #4096 @ 0x1000
8006a20: b292 uxth r2, r2
8006a22: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006a26: e0af b.n 8006b88 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8006a28: 69bb ldr r3, [r7, #24]
8006a2a: f403 6300 and.w r3, r3, #2048 @ 0x800
8006a2e: 2b00 cmp r3, #0
8006a30: f000 8083 beq.w 8006b3a <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
8006a34: 2300 movs r3, #0
8006a36: 77fb strb r3, [r7, #31]
8006a38: e010 b.n 8006a5c <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8006a3a: 687b ldr r3, [r7, #4]
8006a3c: 681b ldr r3, [r3, #0]
8006a3e: 461a mov r2, r3
8006a40: 7ffb ldrb r3, [r7, #31]
8006a42: 009b lsls r3, r3, #2
8006a44: 441a add r2, r3
8006a46: 7ffb ldrb r3, [r7, #31]
8006a48: 8812 ldrh r2, [r2, #0]
8006a4a: b292 uxth r2, r2
8006a4c: 005b lsls r3, r3, #1
8006a4e: 3320 adds r3, #32
8006a50: 443b add r3, r7
8006a52: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8006a56: 7ffb ldrb r3, [r7, #31]
8006a58: 3301 adds r3, #1
8006a5a: 77fb strb r3, [r7, #31]
8006a5c: 7ffb ldrb r3, [r7, #31]
8006a5e: 2b07 cmp r3, #7
8006a60: d9eb bls.n 8006a3a <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8006a62: 687b ldr r3, [r7, #4]
8006a64: 681b ldr r3, [r3, #0]
8006a66: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006a6a: b29a uxth r2, r3
8006a6c: 687b ldr r3, [r7, #4]
8006a6e: 681b ldr r3, [r3, #0]
8006a70: f042 0201 orr.w r2, r2, #1
8006a74: b292 uxth r2, r2
8006a76: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
8006a7a: 687b ldr r3, [r7, #4]
8006a7c: 681b ldr r3, [r3, #0]
8006a7e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006a82: b29a uxth r2, r3
8006a84: 687b ldr r3, [r7, #4]
8006a86: 681b ldr r3, [r3, #0]
8006a88: f022 0201 bic.w r2, r2, #1
8006a8c: b292 uxth r2, r2
8006a8e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8006a92: bf00 nop
8006a94: 687b ldr r3, [r7, #4]
8006a96: 681b ldr r3, [r3, #0]
8006a98: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006a9c: b29b uxth r3, r3
8006a9e: f403 6380 and.w r3, r3, #1024 @ 0x400
8006aa2: 2b00 cmp r3, #0
8006aa4: d0f6 beq.n 8006a94 <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8006aa6: 687b ldr r3, [r7, #4]
8006aa8: 681b ldr r3, [r3, #0]
8006aaa: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006aae: b29a uxth r2, r3
8006ab0: 687b ldr r3, [r7, #4]
8006ab2: 681b ldr r3, [r3, #0]
8006ab4: f422 6280 bic.w r2, r2, #1024 @ 0x400
8006ab8: b292 uxth r2, r2
8006aba: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8006abe: 2300 movs r3, #0
8006ac0: 77fb strb r3, [r7, #31]
8006ac2: e00f b.n 8006ae4 <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8006ac4: 7ffb ldrb r3, [r7, #31]
8006ac6: 687a ldr r2, [r7, #4]
8006ac8: 6812 ldr r2, [r2, #0]
8006aca: 4611 mov r1, r2
8006acc: 7ffa ldrb r2, [r7, #31]
8006ace: 0092 lsls r2, r2, #2
8006ad0: 440a add r2, r1
8006ad2: 005b lsls r3, r3, #1
8006ad4: 3320 adds r3, #32
8006ad6: 443b add r3, r7
8006ad8: f833 3c18 ldrh.w r3, [r3, #-24]
8006adc: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8006ade: 7ffb ldrb r3, [r7, #31]
8006ae0: 3301 adds r3, #1
8006ae2: 77fb strb r3, [r7, #31]
8006ae4: 7ffb ldrb r3, [r7, #31]
8006ae6: 2b07 cmp r3, #7
8006ae8: d9ec bls.n 8006ac4 <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8006aea: 687b ldr r3, [r7, #4]
8006aec: 681b ldr r3, [r3, #0]
8006aee: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006af2: b29a uxth r2, r3
8006af4: 687b ldr r3, [r7, #4]
8006af6: 681b ldr r3, [r3, #0]
8006af8: f042 0208 orr.w r2, r2, #8
8006afc: b292 uxth r2, r2
8006afe: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8006b02: 687b ldr r3, [r7, #4]
8006b04: 681b ldr r3, [r3, #0]
8006b06: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006b0a: b29a uxth r2, r3
8006b0c: 687b ldr r3, [r7, #4]
8006b0e: 681b ldr r3, [r3, #0]
8006b10: f422 6200 bic.w r2, r2, #2048 @ 0x800
8006b14: b292 uxth r2, r2
8006b16: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8006b1a: 687b ldr r3, [r7, #4]
8006b1c: 681b ldr r3, [r3, #0]
8006b1e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006b22: b29a uxth r2, r3
8006b24: 687b ldr r3, [r7, #4]
8006b26: 681b ldr r3, [r3, #0]
8006b28: f042 0204 orr.w r2, r2, #4
8006b2c: b292 uxth r2, r2
8006b2e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8006b32: 6878 ldr r0, [r7, #4]
8006b34: f007 faa6 bl 800e084 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8006b38: e026 b.n 8006b88 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8006b3a: 69bb ldr r3, [r7, #24]
8006b3c: f403 7300 and.w r3, r3, #512 @ 0x200
8006b40: 2b00 cmp r3, #0
8006b42: d00f beq.n 8006b64 <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8006b44: 687b ldr r3, [r7, #4]
8006b46: 681b ldr r3, [r3, #0]
8006b48: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006b4c: b29a uxth r2, r3
8006b4e: 687b ldr r3, [r7, #4]
8006b50: 681b ldr r3, [r3, #0]
8006b52: f422 7200 bic.w r2, r2, #512 @ 0x200
8006b56: b292 uxth r2, r2
8006b58: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8006b5c: 6878 ldr r0, [r7, #4]
8006b5e: f007 fa64 bl 800e02a <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8006b62: e011 b.n 8006b88 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8006b64: 69bb ldr r3, [r7, #24]
8006b66: f403 7380 and.w r3, r3, #256 @ 0x100
8006b6a: 2b00 cmp r3, #0
8006b6c: d00c beq.n 8006b88 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8006b6e: 687b ldr r3, [r7, #4]
8006b70: 681b ldr r3, [r3, #0]
8006b72: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006b76: b29a uxth r2, r3
8006b78: 687b ldr r3, [r7, #4]
8006b7a: 681b ldr r3, [r3, #0]
8006b7c: f422 7280 bic.w r2, r2, #256 @ 0x100
8006b80: b292 uxth r2, r2
8006b82: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006b86: bf00 nop
}
}
8006b88: 3720 adds r7, #32
8006b8a: 46bd mov sp, r7
8006b8c: bd80 pop {r7, pc}
08006b8e <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8006b8e: b580 push {r7, lr}
8006b90: b082 sub sp, #8
8006b92: af00 add r7, sp, #0
8006b94: 6078 str r0, [r7, #4]
8006b96: 460b mov r3, r1
8006b98: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8006b9a: 687b ldr r3, [r7, #4]
8006b9c: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006ba0: 2b01 cmp r3, #1
8006ba2: d101 bne.n 8006ba8 <HAL_PCD_SetAddress+0x1a>
8006ba4: 2302 movs r3, #2
8006ba6: e012 b.n 8006bce <HAL_PCD_SetAddress+0x40>
8006ba8: 687b ldr r3, [r7, #4]
8006baa: 2201 movs r2, #1
8006bac: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8006bb0: 687b ldr r3, [r7, #4]
8006bb2: 78fa ldrb r2, [r7, #3]
8006bb4: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8006bb6: 687b ldr r3, [r7, #4]
8006bb8: 681b ldr r3, [r3, #0]
8006bba: 78fa ldrb r2, [r7, #3]
8006bbc: 4611 mov r1, r2
8006bbe: 4618 mov r0, r3
8006bc0: f005 fb14 bl 800c1ec <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8006bc4: 687b ldr r3, [r7, #4]
8006bc6: 2200 movs r2, #0
8006bc8: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006bcc: 2300 movs r3, #0
}
8006bce: 4618 mov r0, r3
8006bd0: 3708 adds r7, #8
8006bd2: 46bd mov sp, r7
8006bd4: bd80 pop {r7, pc}
08006bd6 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8006bd6: b580 push {r7, lr}
8006bd8: b084 sub sp, #16
8006bda: af00 add r7, sp, #0
8006bdc: 6078 str r0, [r7, #4]
8006bde: 4608 mov r0, r1
8006be0: 4611 mov r1, r2
8006be2: 461a mov r2, r3
8006be4: 4603 mov r3, r0
8006be6: 70fb strb r3, [r7, #3]
8006be8: 460b mov r3, r1
8006bea: 803b strh r3, [r7, #0]
8006bec: 4613 mov r3, r2
8006bee: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8006bf0: 2300 movs r3, #0
8006bf2: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006bf4: f997 3003 ldrsb.w r3, [r7, #3]
8006bf8: 2b00 cmp r3, #0
8006bfa: da0e bge.n 8006c1a <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006bfc: 78fb ldrb r3, [r7, #3]
8006bfe: f003 0207 and.w r2, r3, #7
8006c02: 4613 mov r3, r2
8006c04: 009b lsls r3, r3, #2
8006c06: 4413 add r3, r2
8006c08: 00db lsls r3, r3, #3
8006c0a: 3310 adds r3, #16
8006c0c: 687a ldr r2, [r7, #4]
8006c0e: 4413 add r3, r2
8006c10: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006c12: 68fb ldr r3, [r7, #12]
8006c14: 2201 movs r2, #1
8006c16: 705a strb r2, [r3, #1]
8006c18: e00e b.n 8006c38 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006c1a: 78fb ldrb r3, [r7, #3]
8006c1c: f003 0207 and.w r2, r3, #7
8006c20: 4613 mov r3, r2
8006c22: 009b lsls r3, r3, #2
8006c24: 4413 add r3, r2
8006c26: 00db lsls r3, r3, #3
8006c28: f503 73a8 add.w r3, r3, #336 @ 0x150
8006c2c: 687a ldr r2, [r7, #4]
8006c2e: 4413 add r3, r2
8006c30: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006c32: 68fb ldr r3, [r7, #12]
8006c34: 2200 movs r2, #0
8006c36: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006c38: 78fb ldrb r3, [r7, #3]
8006c3a: f003 0307 and.w r3, r3, #7
8006c3e: b2da uxtb r2, r3
8006c40: 68fb ldr r3, [r7, #12]
8006c42: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8006c44: 883a ldrh r2, [r7, #0]
8006c46: 68fb ldr r3, [r7, #12]
8006c48: 611a str r2, [r3, #16]
ep->type = ep_type;
8006c4a: 68fb ldr r3, [r7, #12]
8006c4c: 78ba ldrb r2, [r7, #2]
8006c4e: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8006c50: 78bb ldrb r3, [r7, #2]
8006c52: 2b02 cmp r3, #2
8006c54: d102 bne.n 8006c5c <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8006c56: 68fb ldr r3, [r7, #12]
8006c58: 2200 movs r2, #0
8006c5a: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8006c5c: 687b ldr r3, [r7, #4]
8006c5e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006c62: 2b01 cmp r3, #1
8006c64: d101 bne.n 8006c6a <HAL_PCD_EP_Open+0x94>
8006c66: 2302 movs r3, #2
8006c68: e00e b.n 8006c88 <HAL_PCD_EP_Open+0xb2>
8006c6a: 687b ldr r3, [r7, #4]
8006c6c: 2201 movs r2, #1
8006c6e: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8006c72: 687b ldr r3, [r7, #4]
8006c74: 681b ldr r3, [r3, #0]
8006c76: 68f9 ldr r1, [r7, #12]
8006c78: 4618 mov r0, r3
8006c7a: f003 f85d bl 8009d38 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8006c7e: 687b ldr r3, [r7, #4]
8006c80: 2200 movs r2, #0
8006c82: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
8006c86: 7afb ldrb r3, [r7, #11]
}
8006c88: 4618 mov r0, r3
8006c8a: 3710 adds r7, #16
8006c8c: 46bd mov sp, r7
8006c8e: bd80 pop {r7, pc}
08006c90 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006c90: b580 push {r7, lr}
8006c92: b084 sub sp, #16
8006c94: af00 add r7, sp, #0
8006c96: 6078 str r0, [r7, #4]
8006c98: 460b mov r3, r1
8006c9a: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006c9c: f997 3003 ldrsb.w r3, [r7, #3]
8006ca0: 2b00 cmp r3, #0
8006ca2: da0e bge.n 8006cc2 <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006ca4: 78fb ldrb r3, [r7, #3]
8006ca6: f003 0207 and.w r2, r3, #7
8006caa: 4613 mov r3, r2
8006cac: 009b lsls r3, r3, #2
8006cae: 4413 add r3, r2
8006cb0: 00db lsls r3, r3, #3
8006cb2: 3310 adds r3, #16
8006cb4: 687a ldr r2, [r7, #4]
8006cb6: 4413 add r3, r2
8006cb8: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006cba: 68fb ldr r3, [r7, #12]
8006cbc: 2201 movs r2, #1
8006cbe: 705a strb r2, [r3, #1]
8006cc0: e00e b.n 8006ce0 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006cc2: 78fb ldrb r3, [r7, #3]
8006cc4: f003 0207 and.w r2, r3, #7
8006cc8: 4613 mov r3, r2
8006cca: 009b lsls r3, r3, #2
8006ccc: 4413 add r3, r2
8006cce: 00db lsls r3, r3, #3
8006cd0: f503 73a8 add.w r3, r3, #336 @ 0x150
8006cd4: 687a ldr r2, [r7, #4]
8006cd6: 4413 add r3, r2
8006cd8: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006cda: 68fb ldr r3, [r7, #12]
8006cdc: 2200 movs r2, #0
8006cde: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006ce0: 78fb ldrb r3, [r7, #3]
8006ce2: f003 0307 and.w r3, r3, #7
8006ce6: b2da uxtb r2, r3
8006ce8: 68fb ldr r3, [r7, #12]
8006cea: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006cec: 687b ldr r3, [r7, #4]
8006cee: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006cf2: 2b01 cmp r3, #1
8006cf4: d101 bne.n 8006cfa <HAL_PCD_EP_Close+0x6a>
8006cf6: 2302 movs r3, #2
8006cf8: e00e b.n 8006d18 <HAL_PCD_EP_Close+0x88>
8006cfa: 687b ldr r3, [r7, #4]
8006cfc: 2201 movs r2, #1
8006cfe: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8006d02: 687b ldr r3, [r7, #4]
8006d04: 681b ldr r3, [r3, #0]
8006d06: 68f9 ldr r1, [r7, #12]
8006d08: 4618 mov r0, r3
8006d0a: f003 fbd5 bl 800a4b8 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8006d0e: 687b ldr r3, [r7, #4]
8006d10: 2200 movs r2, #0
8006d12: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006d16: 2300 movs r3, #0
}
8006d18: 4618 mov r0, r3
8006d1a: 3710 adds r7, #16
8006d1c: 46bd mov sp, r7
8006d1e: bd80 pop {r7, pc}
08006d20 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006d20: b580 push {r7, lr}
8006d22: b086 sub sp, #24
8006d24: af00 add r7, sp, #0
8006d26: 60f8 str r0, [r7, #12]
8006d28: 607a str r2, [r7, #4]
8006d2a: 603b str r3, [r7, #0]
8006d2c: 460b mov r3, r1
8006d2e: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006d30: 7afb ldrb r3, [r7, #11]
8006d32: f003 0207 and.w r2, r3, #7
8006d36: 4613 mov r3, r2
8006d38: 009b lsls r3, r3, #2
8006d3a: 4413 add r3, r2
8006d3c: 00db lsls r3, r3, #3
8006d3e: f503 73a8 add.w r3, r3, #336 @ 0x150
8006d42: 68fa ldr r2, [r7, #12]
8006d44: 4413 add r3, r2
8006d46: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8006d48: 697b ldr r3, [r7, #20]
8006d4a: 687a ldr r2, [r7, #4]
8006d4c: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006d4e: 697b ldr r3, [r7, #20]
8006d50: 683a ldr r2, [r7, #0]
8006d52: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8006d54: 697b ldr r3, [r7, #20]
8006d56: 2200 movs r2, #0
8006d58: 61da str r2, [r3, #28]
ep->is_in = 0U;
8006d5a: 697b ldr r3, [r7, #20]
8006d5c: 2200 movs r2, #0
8006d5e: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006d60: 7afb ldrb r3, [r7, #11]
8006d62: f003 0307 and.w r3, r3, #7
8006d66: b2da uxtb r2, r3
8006d68: 697b ldr r3, [r7, #20]
8006d6a: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006d6c: 68fb ldr r3, [r7, #12]
8006d6e: 681b ldr r3, [r3, #0]
8006d70: 6979 ldr r1, [r7, #20]
8006d72: 4618 mov r0, r3
8006d74: f003 fd8c bl 800a890 <USB_EPStartXfer>
return HAL_OK;
8006d78: 2300 movs r3, #0
}
8006d7a: 4618 mov r0, r3
8006d7c: 3718 adds r7, #24
8006d7e: 46bd mov sp, r7
8006d80: bd80 pop {r7, pc}
08006d82 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8006d82: b480 push {r7}
8006d84: b083 sub sp, #12
8006d86: af00 add r7, sp, #0
8006d88: 6078 str r0, [r7, #4]
8006d8a: 460b mov r3, r1
8006d8c: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8006d8e: 78fb ldrb r3, [r7, #3]
8006d90: f003 0207 and.w r2, r3, #7
8006d94: 6879 ldr r1, [r7, #4]
8006d96: 4613 mov r3, r2
8006d98: 009b lsls r3, r3, #2
8006d9a: 4413 add r3, r2
8006d9c: 00db lsls r3, r3, #3
8006d9e: 440b add r3, r1
8006da0: f503 73b6 add.w r3, r3, #364 @ 0x16c
8006da4: 681b ldr r3, [r3, #0]
}
8006da6: 4618 mov r0, r3
8006da8: 370c adds r7, #12
8006daa: 46bd mov sp, r7
8006dac: bc80 pop {r7}
8006dae: 4770 bx lr
08006db0 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006db0: b580 push {r7, lr}
8006db2: b086 sub sp, #24
8006db4: af00 add r7, sp, #0
8006db6: 60f8 str r0, [r7, #12]
8006db8: 607a str r2, [r7, #4]
8006dba: 603b str r3, [r7, #0]
8006dbc: 460b mov r3, r1
8006dbe: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006dc0: 7afb ldrb r3, [r7, #11]
8006dc2: f003 0207 and.w r2, r3, #7
8006dc6: 4613 mov r3, r2
8006dc8: 009b lsls r3, r3, #2
8006dca: 4413 add r3, r2
8006dcc: 00db lsls r3, r3, #3
8006dce: 3310 adds r3, #16
8006dd0: 68fa ldr r2, [r7, #12]
8006dd2: 4413 add r3, r2
8006dd4: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8006dd6: 697b ldr r3, [r7, #20]
8006dd8: 687a ldr r2, [r7, #4]
8006dda: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006ddc: 697b ldr r3, [r7, #20]
8006dde: 683a ldr r2, [r7, #0]
8006de0: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8006de2: 697b ldr r3, [r7, #20]
8006de4: 2201 movs r2, #1
8006de6: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
8006dea: 697b ldr r3, [r7, #20]
8006dec: 683a ldr r2, [r7, #0]
8006dee: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8006df0: 697b ldr r3, [r7, #20]
8006df2: 2200 movs r2, #0
8006df4: 61da str r2, [r3, #28]
ep->is_in = 1U;
8006df6: 697b ldr r3, [r7, #20]
8006df8: 2201 movs r2, #1
8006dfa: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006dfc: 7afb ldrb r3, [r7, #11]
8006dfe: f003 0307 and.w r3, r3, #7
8006e02: b2da uxtb r2, r3
8006e04: 697b ldr r3, [r7, #20]
8006e06: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006e08: 68fb ldr r3, [r7, #12]
8006e0a: 681b ldr r3, [r3, #0]
8006e0c: 6979 ldr r1, [r7, #20]
8006e0e: 4618 mov r0, r3
8006e10: f003 fd3e bl 800a890 <USB_EPStartXfer>
return HAL_OK;
8006e14: 2300 movs r3, #0
}
8006e16: 4618 mov r0, r3
8006e18: 3718 adds r7, #24
8006e1a: 46bd mov sp, r7
8006e1c: bd80 pop {r7, pc}
08006e1e <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006e1e: b580 push {r7, lr}
8006e20: b084 sub sp, #16
8006e22: af00 add r7, sp, #0
8006e24: 6078 str r0, [r7, #4]
8006e26: 460b mov r3, r1
8006e28: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8006e2a: 78fb ldrb r3, [r7, #3]
8006e2c: f003 0307 and.w r3, r3, #7
8006e30: 687a ldr r2, [r7, #4]
8006e32: 7912 ldrb r2, [r2, #4]
8006e34: 4293 cmp r3, r2
8006e36: d901 bls.n 8006e3c <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8006e38: 2301 movs r3, #1
8006e3a: e04c b.n 8006ed6 <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8006e3c: f997 3003 ldrsb.w r3, [r7, #3]
8006e40: 2b00 cmp r3, #0
8006e42: da0e bge.n 8006e62 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006e44: 78fb ldrb r3, [r7, #3]
8006e46: f003 0207 and.w r2, r3, #7
8006e4a: 4613 mov r3, r2
8006e4c: 009b lsls r3, r3, #2
8006e4e: 4413 add r3, r2
8006e50: 00db lsls r3, r3, #3
8006e52: 3310 adds r3, #16
8006e54: 687a ldr r2, [r7, #4]
8006e56: 4413 add r3, r2
8006e58: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006e5a: 68fb ldr r3, [r7, #12]
8006e5c: 2201 movs r2, #1
8006e5e: 705a strb r2, [r3, #1]
8006e60: e00c b.n 8006e7c <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8006e62: 78fa ldrb r2, [r7, #3]
8006e64: 4613 mov r3, r2
8006e66: 009b lsls r3, r3, #2
8006e68: 4413 add r3, r2
8006e6a: 00db lsls r3, r3, #3
8006e6c: f503 73a8 add.w r3, r3, #336 @ 0x150
8006e70: 687a ldr r2, [r7, #4]
8006e72: 4413 add r3, r2
8006e74: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006e76: 68fb ldr r3, [r7, #12]
8006e78: 2200 movs r2, #0
8006e7a: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8006e7c: 68fb ldr r3, [r7, #12]
8006e7e: 2201 movs r2, #1
8006e80: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006e82: 78fb ldrb r3, [r7, #3]
8006e84: f003 0307 and.w r3, r3, #7
8006e88: b2da uxtb r2, r3
8006e8a: 68fb ldr r3, [r7, #12]
8006e8c: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006e8e: 687b ldr r3, [r7, #4]
8006e90: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006e94: 2b01 cmp r3, #1
8006e96: d101 bne.n 8006e9c <HAL_PCD_EP_SetStall+0x7e>
8006e98: 2302 movs r3, #2
8006e9a: e01c b.n 8006ed6 <HAL_PCD_EP_SetStall+0xb8>
8006e9c: 687b ldr r3, [r7, #4]
8006e9e: 2201 movs r2, #1
8006ea0: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8006ea4: 687b ldr r3, [r7, #4]
8006ea6: 681b ldr r3, [r3, #0]
8006ea8: 68f9 ldr r1, [r7, #12]
8006eaa: 4618 mov r0, r3
8006eac: f005 f8a1 bl 800bff2 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8006eb0: 78fb ldrb r3, [r7, #3]
8006eb2: f003 0307 and.w r3, r3, #7
8006eb6: 2b00 cmp r3, #0
8006eb8: d108 bne.n 8006ecc <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
8006eba: 687b ldr r3, [r7, #4]
8006ebc: 681a ldr r2, [r3, #0]
8006ebe: 687b ldr r3, [r7, #4]
8006ec0: f503 7326 add.w r3, r3, #664 @ 0x298
8006ec4: 4619 mov r1, r3
8006ec6: 4610 mov r0, r2
8006ec8: f005 f9c6 bl 800c258 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8006ecc: 687b ldr r3, [r7, #4]
8006ece: 2200 movs r2, #0
8006ed0: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006ed4: 2300 movs r3, #0
}
8006ed6: 4618 mov r0, r3
8006ed8: 3710 adds r7, #16
8006eda: 46bd mov sp, r7
8006edc: bd80 pop {r7, pc}
08006ede <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006ede: b580 push {r7, lr}
8006ee0: b084 sub sp, #16
8006ee2: af00 add r7, sp, #0
8006ee4: 6078 str r0, [r7, #4]
8006ee6: 460b mov r3, r1
8006ee8: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8006eea: 78fb ldrb r3, [r7, #3]
8006eec: f003 030f and.w r3, r3, #15
8006ef0: 687a ldr r2, [r7, #4]
8006ef2: 7912 ldrb r2, [r2, #4]
8006ef4: 4293 cmp r3, r2
8006ef6: d901 bls.n 8006efc <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8006ef8: 2301 movs r3, #1
8006efa: e040 b.n 8006f7e <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8006efc: f997 3003 ldrsb.w r3, [r7, #3]
8006f00: 2b00 cmp r3, #0
8006f02: da0e bge.n 8006f22 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006f04: 78fb ldrb r3, [r7, #3]
8006f06: f003 0207 and.w r2, r3, #7
8006f0a: 4613 mov r3, r2
8006f0c: 009b lsls r3, r3, #2
8006f0e: 4413 add r3, r2
8006f10: 00db lsls r3, r3, #3
8006f12: 3310 adds r3, #16
8006f14: 687a ldr r2, [r7, #4]
8006f16: 4413 add r3, r2
8006f18: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006f1a: 68fb ldr r3, [r7, #12]
8006f1c: 2201 movs r2, #1
8006f1e: 705a strb r2, [r3, #1]
8006f20: e00e b.n 8006f40 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006f22: 78fb ldrb r3, [r7, #3]
8006f24: f003 0207 and.w r2, r3, #7
8006f28: 4613 mov r3, r2
8006f2a: 009b lsls r3, r3, #2
8006f2c: 4413 add r3, r2
8006f2e: 00db lsls r3, r3, #3
8006f30: f503 73a8 add.w r3, r3, #336 @ 0x150
8006f34: 687a ldr r2, [r7, #4]
8006f36: 4413 add r3, r2
8006f38: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006f3a: 68fb ldr r3, [r7, #12]
8006f3c: 2200 movs r2, #0
8006f3e: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8006f40: 68fb ldr r3, [r7, #12]
8006f42: 2200 movs r2, #0
8006f44: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006f46: 78fb ldrb r3, [r7, #3]
8006f48: f003 0307 and.w r3, r3, #7
8006f4c: b2da uxtb r2, r3
8006f4e: 68fb ldr r3, [r7, #12]
8006f50: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006f52: 687b ldr r3, [r7, #4]
8006f54: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006f58: 2b01 cmp r3, #1
8006f5a: d101 bne.n 8006f60 <HAL_PCD_EP_ClrStall+0x82>
8006f5c: 2302 movs r3, #2
8006f5e: e00e b.n 8006f7e <HAL_PCD_EP_ClrStall+0xa0>
8006f60: 687b ldr r3, [r7, #4]
8006f62: 2201 movs r2, #1
8006f64: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
8006f68: 687b ldr r3, [r7, #4]
8006f6a: 681b ldr r3, [r3, #0]
8006f6c: 68f9 ldr r1, [r7, #12]
8006f6e: 4618 mov r0, r3
8006f70: f005 f88f bl 800c092 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8006f74: 687b ldr r3, [r7, #4]
8006f76: 2200 movs r2, #0
8006f78: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006f7c: 2300 movs r3, #0
}
8006f7e: 4618 mov r0, r3
8006f80: 3710 adds r7, #16
8006f82: 46bd mov sp, r7
8006f84: bd80 pop {r7, pc}
08006f86 <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
8006f86: b580 push {r7, lr}
8006f88: b096 sub sp, #88 @ 0x58
8006f8a: af00 add r7, sp, #0
8006f8c: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8006f8e: e3bb b.n 8007708 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8006f90: 687b ldr r3, [r7, #4]
8006f92: 681b ldr r3, [r3, #0]
8006f94: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006f98: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
8006f9c: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006fa0: b2db uxtb r3, r3
8006fa2: f003 030f and.w r3, r3, #15
8006fa6: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
8006faa: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006fae: 2b00 cmp r3, #0
8006fb0: f040 8175 bne.w 800729e <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8006fb4: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006fb8: f003 0310 and.w r3, r3, #16
8006fbc: 2b00 cmp r3, #0
8006fbe: d14e bne.n 800705e <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006fc0: 687b ldr r3, [r7, #4]
8006fc2: 681b ldr r3, [r3, #0]
8006fc4: 881b ldrh r3, [r3, #0]
8006fc6: b29b uxth r3, r3
8006fc8: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8006fcc: f023 0370 bic.w r3, r3, #112 @ 0x70
8006fd0: 81fb strh r3, [r7, #14]
8006fd2: 687b ldr r3, [r7, #4]
8006fd4: 681a ldr r2, [r3, #0]
8006fd6: 89fb ldrh r3, [r7, #14]
8006fd8: ea6f 4343 mvn.w r3, r3, lsl #17
8006fdc: ea6f 4353 mvn.w r3, r3, lsr #17
8006fe0: b29b uxth r3, r3
8006fe2: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
8006fe4: 687b ldr r3, [r7, #4]
8006fe6: 3310 adds r3, #16
8006fe8: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8006fea: 687b ldr r3, [r7, #4]
8006fec: 681b ldr r3, [r3, #0]
8006fee: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006ff2: b29b uxth r3, r3
8006ff4: 461a mov r2, r3
8006ff6: 6d7b ldr r3, [r7, #84] @ 0x54
8006ff8: 781b ldrb r3, [r3, #0]
8006ffa: 00db lsls r3, r3, #3
8006ffc: 4413 add r3, r2
8006ffe: 3302 adds r3, #2
8007000: 005b lsls r3, r3, #1
8007002: 687a ldr r2, [r7, #4]
8007004: 6812 ldr r2, [r2, #0]
8007006: 4413 add r3, r2
8007008: f503 6380 add.w r3, r3, #1024 @ 0x400
800700c: 881b ldrh r3, [r3, #0]
800700e: f3c3 0209 ubfx r2, r3, #0, #10
8007012: 6d7b ldr r3, [r7, #84] @ 0x54
8007014: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
8007016: 6d7b ldr r3, [r7, #84] @ 0x54
8007018: 695a ldr r2, [r3, #20]
800701a: 6d7b ldr r3, [r7, #84] @ 0x54
800701c: 69db ldr r3, [r3, #28]
800701e: 441a add r2, r3
8007020: 6d7b ldr r3, [r7, #84] @ 0x54
8007022: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
8007024: 2100 movs r1, #0
8007026: 6878 ldr r0, [r7, #4]
8007028: f006 ffe5 bl 800dff6 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
800702c: 687b ldr r3, [r7, #4]
800702e: 7b5b ldrb r3, [r3, #13]
8007030: b2db uxtb r3, r3
8007032: 2b00 cmp r3, #0
8007034: f000 8368 beq.w 8007708 <PCD_EP_ISR_Handler+0x782>
8007038: 6d7b ldr r3, [r7, #84] @ 0x54
800703a: 699b ldr r3, [r3, #24]
800703c: 2b00 cmp r3, #0
800703e: f040 8363 bne.w 8007708 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8007042: 687b ldr r3, [r7, #4]
8007044: 7b5b ldrb r3, [r3, #13]
8007046: b2db uxtb r3, r3
8007048: f063 037f orn r3, r3, #127 @ 0x7f
800704c: b2da uxtb r2, r3
800704e: 687b ldr r3, [r7, #4]
8007050: 681b ldr r3, [r3, #0]
8007052: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
8007056: 687b ldr r3, [r7, #4]
8007058: 2200 movs r2, #0
800705a: 735a strb r2, [r3, #13]
800705c: e354 b.n 8007708 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
800705e: 687b ldr r3, [r7, #4]
8007060: f503 73a8 add.w r3, r3, #336 @ 0x150
8007064: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8007066: 687b ldr r3, [r7, #4]
8007068: 681b ldr r3, [r3, #0]
800706a: 881b ldrh r3, [r3, #0]
800706c: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
8007070: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007074: f403 6300 and.w r3, r3, #2048 @ 0x800
8007078: 2b00 cmp r3, #0
800707a: d034 beq.n 80070e6 <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
800707c: 687b ldr r3, [r7, #4]
800707e: 681b ldr r3, [r3, #0]
8007080: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007084: b29b uxth r3, r3
8007086: 461a mov r2, r3
8007088: 6d7b ldr r3, [r7, #84] @ 0x54
800708a: 781b ldrb r3, [r3, #0]
800708c: 00db lsls r3, r3, #3
800708e: 4413 add r3, r2
8007090: 3306 adds r3, #6
8007092: 005b lsls r3, r3, #1
8007094: 687a ldr r2, [r7, #4]
8007096: 6812 ldr r2, [r2, #0]
8007098: 4413 add r3, r2
800709a: f503 6380 add.w r3, r3, #1024 @ 0x400
800709e: 881b ldrh r3, [r3, #0]
80070a0: f3c3 0209 ubfx r2, r3, #0, #10
80070a4: 6d7b ldr r3, [r7, #84] @ 0x54
80070a6: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80070a8: 687b ldr r3, [r7, #4]
80070aa: 6818 ldr r0, [r3, #0]
80070ac: 687b ldr r3, [r7, #4]
80070ae: f503 7126 add.w r1, r3, #664 @ 0x298
80070b2: 6d7b ldr r3, [r7, #84] @ 0x54
80070b4: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
80070b6: 6d7b ldr r3, [r7, #84] @ 0x54
80070b8: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80070ba: b29b uxth r3, r3
80070bc: f005 f91d bl 800c2fa <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80070c0: 687b ldr r3, [r7, #4]
80070c2: 681b ldr r3, [r3, #0]
80070c4: 881b ldrh r3, [r3, #0]
80070c6: b29a uxth r2, r3
80070c8: f640 738f movw r3, #3983 @ 0xf8f
80070cc: 4013 ands r3, r2
80070ce: 823b strh r3, [r7, #16]
80070d0: 687b ldr r3, [r7, #4]
80070d2: 681b ldr r3, [r3, #0]
80070d4: 8a3a ldrh r2, [r7, #16]
80070d6: f042 0280 orr.w r2, r2, #128 @ 0x80
80070da: b292 uxth r2, r2
80070dc: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
80070de: 6878 ldr r0, [r7, #4]
80070e0: f006 ff5c bl 800df9c <HAL_PCD_SetupStageCallback>
80070e4: e310 b.n 8007708 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
80070e6: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
80070ea: 2b00 cmp r3, #0
80070ec: f280 830c bge.w 8007708 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80070f0: 687b ldr r3, [r7, #4]
80070f2: 681b ldr r3, [r3, #0]
80070f4: 881b ldrh r3, [r3, #0]
80070f6: b29a uxth r2, r3
80070f8: f640 738f movw r3, #3983 @ 0xf8f
80070fc: 4013 ands r3, r2
80070fe: 83fb strh r3, [r7, #30]
8007100: 687b ldr r3, [r7, #4]
8007102: 681b ldr r3, [r3, #0]
8007104: 8bfa ldrh r2, [r7, #30]
8007106: f042 0280 orr.w r2, r2, #128 @ 0x80
800710a: b292 uxth r2, r2
800710c: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
800710e: 687b ldr r3, [r7, #4]
8007110: 681b ldr r3, [r3, #0]
8007112: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007116: b29b uxth r3, r3
8007118: 461a mov r2, r3
800711a: 6d7b ldr r3, [r7, #84] @ 0x54
800711c: 781b ldrb r3, [r3, #0]
800711e: 00db lsls r3, r3, #3
8007120: 4413 add r3, r2
8007122: 3306 adds r3, #6
8007124: 005b lsls r3, r3, #1
8007126: 687a ldr r2, [r7, #4]
8007128: 6812 ldr r2, [r2, #0]
800712a: 4413 add r3, r2
800712c: f503 6380 add.w r3, r3, #1024 @ 0x400
8007130: 881b ldrh r3, [r3, #0]
8007132: f3c3 0209 ubfx r2, r3, #0, #10
8007136: 6d7b ldr r3, [r7, #84] @ 0x54
8007138: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
800713a: 6d7b ldr r3, [r7, #84] @ 0x54
800713c: 69db ldr r3, [r3, #28]
800713e: 2b00 cmp r3, #0
8007140: d019 beq.n 8007176 <PCD_EP_ISR_Handler+0x1f0>
8007142: 6d7b ldr r3, [r7, #84] @ 0x54
8007144: 695b ldr r3, [r3, #20]
8007146: 2b00 cmp r3, #0
8007148: d015 beq.n 8007176 <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
800714a: 687b ldr r3, [r7, #4]
800714c: 6818 ldr r0, [r3, #0]
800714e: 6d7b ldr r3, [r7, #84] @ 0x54
8007150: 6959 ldr r1, [r3, #20]
8007152: 6d7b ldr r3, [r7, #84] @ 0x54
8007154: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8007156: 6d7b ldr r3, [r7, #84] @ 0x54
8007158: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
800715a: b29b uxth r3, r3
800715c: f005 f8cd bl 800c2fa <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
8007160: 6d7b ldr r3, [r7, #84] @ 0x54
8007162: 695a ldr r2, [r3, #20]
8007164: 6d7b ldr r3, [r7, #84] @ 0x54
8007166: 69db ldr r3, [r3, #28]
8007168: 441a add r2, r3
800716a: 6d7b ldr r3, [r7, #84] @ 0x54
800716c: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
800716e: 2100 movs r1, #0
8007170: 6878 ldr r0, [r7, #4]
8007172: f006 ff25 bl 800dfc0 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8007176: 687b ldr r3, [r7, #4]
8007178: 681b ldr r3, [r3, #0]
800717a: 881b ldrh r3, [r3, #0]
800717c: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8007180: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007184: f403 6300 and.w r3, r3, #2048 @ 0x800
8007188: 2b00 cmp r3, #0
800718a: f040 82bd bne.w 8007708 <PCD_EP_ISR_Handler+0x782>
800718e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007192: f403 5340 and.w r3, r3, #12288 @ 0x3000
8007196: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
800719a: f000 82b5 beq.w 8007708 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
800719e: 687b ldr r3, [r7, #4]
80071a0: 681b ldr r3, [r3, #0]
80071a2: 61bb str r3, [r7, #24]
80071a4: 687b ldr r3, [r7, #4]
80071a6: 681b ldr r3, [r3, #0]
80071a8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80071ac: b29b uxth r3, r3
80071ae: 461a mov r2, r3
80071b0: 69bb ldr r3, [r7, #24]
80071b2: 4413 add r3, r2
80071b4: 61bb str r3, [r7, #24]
80071b6: 69bb ldr r3, [r7, #24]
80071b8: f203 430c addw r3, r3, #1036 @ 0x40c
80071bc: 617b str r3, [r7, #20]
80071be: 697b ldr r3, [r7, #20]
80071c0: 881b ldrh r3, [r3, #0]
80071c2: b29b uxth r3, r3
80071c4: f3c3 0309 ubfx r3, r3, #0, #10
80071c8: b29a uxth r2, r3
80071ca: 697b ldr r3, [r7, #20]
80071cc: 801a strh r2, [r3, #0]
80071ce: 6d7b ldr r3, [r7, #84] @ 0x54
80071d0: 691b ldr r3, [r3, #16]
80071d2: 2b3e cmp r3, #62 @ 0x3e
80071d4: d91d bls.n 8007212 <PCD_EP_ISR_Handler+0x28c>
80071d6: 6d7b ldr r3, [r7, #84] @ 0x54
80071d8: 691b ldr r3, [r3, #16]
80071da: 095b lsrs r3, r3, #5
80071dc: 647b str r3, [r7, #68] @ 0x44
80071de: 6d7b ldr r3, [r7, #84] @ 0x54
80071e0: 691b ldr r3, [r3, #16]
80071e2: f003 031f and.w r3, r3, #31
80071e6: 2b00 cmp r3, #0
80071e8: d102 bne.n 80071f0 <PCD_EP_ISR_Handler+0x26a>
80071ea: 6c7b ldr r3, [r7, #68] @ 0x44
80071ec: 3b01 subs r3, #1
80071ee: 647b str r3, [r7, #68] @ 0x44
80071f0: 697b ldr r3, [r7, #20]
80071f2: 881b ldrh r3, [r3, #0]
80071f4: b29a uxth r2, r3
80071f6: 6c7b ldr r3, [r7, #68] @ 0x44
80071f8: b29b uxth r3, r3
80071fa: 029b lsls r3, r3, #10
80071fc: b29b uxth r3, r3
80071fe: 4313 orrs r3, r2
8007200: b29b uxth r3, r3
8007202: ea6f 4343 mvn.w r3, r3, lsl #17
8007206: ea6f 4353 mvn.w r3, r3, lsr #17
800720a: b29a uxth r2, r3
800720c: 697b ldr r3, [r7, #20]
800720e: 801a strh r2, [r3, #0]
8007210: e026 b.n 8007260 <PCD_EP_ISR_Handler+0x2da>
8007212: 6d7b ldr r3, [r7, #84] @ 0x54
8007214: 691b ldr r3, [r3, #16]
8007216: 2b00 cmp r3, #0
8007218: d10a bne.n 8007230 <PCD_EP_ISR_Handler+0x2aa>
800721a: 697b ldr r3, [r7, #20]
800721c: 881b ldrh r3, [r3, #0]
800721e: b29b uxth r3, r3
8007220: ea6f 4343 mvn.w r3, r3, lsl #17
8007224: ea6f 4353 mvn.w r3, r3, lsr #17
8007228: b29a uxth r2, r3
800722a: 697b ldr r3, [r7, #20]
800722c: 801a strh r2, [r3, #0]
800722e: e017 b.n 8007260 <PCD_EP_ISR_Handler+0x2da>
8007230: 6d7b ldr r3, [r7, #84] @ 0x54
8007232: 691b ldr r3, [r3, #16]
8007234: 085b lsrs r3, r3, #1
8007236: 647b str r3, [r7, #68] @ 0x44
8007238: 6d7b ldr r3, [r7, #84] @ 0x54
800723a: 691b ldr r3, [r3, #16]
800723c: f003 0301 and.w r3, r3, #1
8007240: 2b00 cmp r3, #0
8007242: d002 beq.n 800724a <PCD_EP_ISR_Handler+0x2c4>
8007244: 6c7b ldr r3, [r7, #68] @ 0x44
8007246: 3301 adds r3, #1
8007248: 647b str r3, [r7, #68] @ 0x44
800724a: 697b ldr r3, [r7, #20]
800724c: 881b ldrh r3, [r3, #0]
800724e: b29a uxth r2, r3
8007250: 6c7b ldr r3, [r7, #68] @ 0x44
8007252: b29b uxth r3, r3
8007254: 029b lsls r3, r3, #10
8007256: b29b uxth r3, r3
8007258: 4313 orrs r3, r2
800725a: b29a uxth r2, r3
800725c: 697b ldr r3, [r7, #20]
800725e: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8007260: 687b ldr r3, [r7, #4]
8007262: 681b ldr r3, [r3, #0]
8007264: 881b ldrh r3, [r3, #0]
8007266: b29b uxth r3, r3
8007268: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800726c: f023 0370 bic.w r3, r3, #112 @ 0x70
8007270: 827b strh r3, [r7, #18]
8007272: 8a7b ldrh r3, [r7, #18]
8007274: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8007278: 827b strh r3, [r7, #18]
800727a: 8a7b ldrh r3, [r7, #18]
800727c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8007280: 827b strh r3, [r7, #18]
8007282: 687b ldr r3, [r7, #4]
8007284: 681a ldr r2, [r3, #0]
8007286: 8a7b ldrh r3, [r7, #18]
8007288: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800728c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007290: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007294: f043 0380 orr.w r3, r3, #128 @ 0x80
8007298: b29b uxth r3, r3
800729a: 8013 strh r3, [r2, #0]
800729c: e234 b.n 8007708 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
800729e: 687b ldr r3, [r7, #4]
80072a0: 681b ldr r3, [r3, #0]
80072a2: 461a mov r2, r3
80072a4: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80072a8: 009b lsls r3, r3, #2
80072aa: 4413 add r3, r2
80072ac: 881b ldrh r3, [r3, #0]
80072ae: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
80072b2: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
80072b6: 2b00 cmp r3, #0
80072b8: f280 80fc bge.w 80074b4 <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
80072bc: 687b ldr r3, [r7, #4]
80072be: 681b ldr r3, [r3, #0]
80072c0: 461a mov r2, r3
80072c2: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80072c6: 009b lsls r3, r3, #2
80072c8: 4413 add r3, r2
80072ca: 881b ldrh r3, [r3, #0]
80072cc: b29a uxth r2, r3
80072ce: f640 738f movw r3, #3983 @ 0xf8f
80072d2: 4013 ands r3, r2
80072d4: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80072d8: 687b ldr r3, [r7, #4]
80072da: 681b ldr r3, [r3, #0]
80072dc: 461a mov r2, r3
80072de: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80072e2: 009b lsls r3, r3, #2
80072e4: 4413 add r3, r2
80072e6: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
80072ea: f042 0280 orr.w r2, r2, #128 @ 0x80
80072ee: b292 uxth r2, r2
80072f0: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
80072f2: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80072f6: 4613 mov r3, r2
80072f8: 009b lsls r3, r3, #2
80072fa: 4413 add r3, r2
80072fc: 00db lsls r3, r3, #3
80072fe: f503 73a8 add.w r3, r3, #336 @ 0x150
8007302: 687a ldr r2, [r7, #4]
8007304: 4413 add r3, r2
8007306: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8007308: 6d7b ldr r3, [r7, #84] @ 0x54
800730a: 7b1b ldrb r3, [r3, #12]
800730c: 2b00 cmp r3, #0
800730e: d125 bne.n 800735c <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8007310: 687b ldr r3, [r7, #4]
8007312: 681b ldr r3, [r3, #0]
8007314: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007318: b29b uxth r3, r3
800731a: 461a mov r2, r3
800731c: 6d7b ldr r3, [r7, #84] @ 0x54
800731e: 781b ldrb r3, [r3, #0]
8007320: 00db lsls r3, r3, #3
8007322: 4413 add r3, r2
8007324: 3306 adds r3, #6
8007326: 005b lsls r3, r3, #1
8007328: 687a ldr r2, [r7, #4]
800732a: 6812 ldr r2, [r2, #0]
800732c: 4413 add r3, r2
800732e: f503 6380 add.w r3, r3, #1024 @ 0x400
8007332: 881b ldrh r3, [r3, #0]
8007334: f3c3 0309 ubfx r3, r3, #0, #10
8007338: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800733c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007340: 2b00 cmp r3, #0
8007342: f000 8092 beq.w 800746a <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
8007346: 687b ldr r3, [r7, #4]
8007348: 6818 ldr r0, [r3, #0]
800734a: 6d7b ldr r3, [r7, #84] @ 0x54
800734c: 6959 ldr r1, [r3, #20]
800734e: 6d7b ldr r3, [r7, #84] @ 0x54
8007350: 88da ldrh r2, [r3, #6]
8007352: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007356: f004 ffd0 bl 800c2fa <USB_ReadPMA>
800735a: e086 b.n 800746a <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
800735c: 6d7b ldr r3, [r7, #84] @ 0x54
800735e: 78db ldrb r3, [r3, #3]
8007360: 2b02 cmp r3, #2
8007362: d10a bne.n 800737a <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
8007364: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007368: 461a mov r2, r3
800736a: 6d79 ldr r1, [r7, #84] @ 0x54
800736c: 6878 ldr r0, [r7, #4]
800736e: f000 f9d9 bl 8007724 <HAL_PCD_EP_DB_Receive>
8007372: 4603 mov r3, r0
8007374: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
8007378: e077 b.n 800746a <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
800737a: 687b ldr r3, [r7, #4]
800737c: 681b ldr r3, [r3, #0]
800737e: 461a mov r2, r3
8007380: 6d7b ldr r3, [r7, #84] @ 0x54
8007382: 781b ldrb r3, [r3, #0]
8007384: 009b lsls r3, r3, #2
8007386: 4413 add r3, r2
8007388: 881b ldrh r3, [r3, #0]
800738a: b29b uxth r3, r3
800738c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007390: f023 0370 bic.w r3, r3, #112 @ 0x70
8007394: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
8007398: 687b ldr r3, [r7, #4]
800739a: 681b ldr r3, [r3, #0]
800739c: 461a mov r2, r3
800739e: 6d7b ldr r3, [r7, #84] @ 0x54
80073a0: 781b ldrb r3, [r3, #0]
80073a2: 009b lsls r3, r3, #2
80073a4: 441a add r2, r3
80073a6: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
80073aa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80073ae: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80073b2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80073b6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80073ba: b29b uxth r3, r3
80073bc: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
80073be: 687b ldr r3, [r7, #4]
80073c0: 681b ldr r3, [r3, #0]
80073c2: 461a mov r2, r3
80073c4: 6d7b ldr r3, [r7, #84] @ 0x54
80073c6: 781b ldrb r3, [r3, #0]
80073c8: 009b lsls r3, r3, #2
80073ca: 4413 add r3, r2
80073cc: 881b ldrh r3, [r3, #0]
80073ce: b29b uxth r3, r3
80073d0: f403 4380 and.w r3, r3, #16384 @ 0x4000
80073d4: 2b00 cmp r3, #0
80073d6: d024 beq.n 8007422 <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80073d8: 687b ldr r3, [r7, #4]
80073da: 681b ldr r3, [r3, #0]
80073dc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80073e0: b29b uxth r3, r3
80073e2: 461a mov r2, r3
80073e4: 6d7b ldr r3, [r7, #84] @ 0x54
80073e6: 781b ldrb r3, [r3, #0]
80073e8: 00db lsls r3, r3, #3
80073ea: 4413 add r3, r2
80073ec: 3302 adds r3, #2
80073ee: 005b lsls r3, r3, #1
80073f0: 687a ldr r2, [r7, #4]
80073f2: 6812 ldr r2, [r2, #0]
80073f4: 4413 add r3, r2
80073f6: f503 6380 add.w r3, r3, #1024 @ 0x400
80073fa: 881b ldrh r3, [r3, #0]
80073fc: f3c3 0309 ubfx r3, r3, #0, #10
8007400: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8007404: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007408: 2b00 cmp r3, #0
800740a: d02e beq.n 800746a <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
800740c: 687b ldr r3, [r7, #4]
800740e: 6818 ldr r0, [r3, #0]
8007410: 6d7b ldr r3, [r7, #84] @ 0x54
8007412: 6959 ldr r1, [r3, #20]
8007414: 6d7b ldr r3, [r7, #84] @ 0x54
8007416: 891a ldrh r2, [r3, #8]
8007418: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800741c: f004 ff6d bl 800c2fa <USB_ReadPMA>
8007420: e023 b.n 800746a <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8007422: 687b ldr r3, [r7, #4]
8007424: 681b ldr r3, [r3, #0]
8007426: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800742a: b29b uxth r3, r3
800742c: 461a mov r2, r3
800742e: 6d7b ldr r3, [r7, #84] @ 0x54
8007430: 781b ldrb r3, [r3, #0]
8007432: 00db lsls r3, r3, #3
8007434: 4413 add r3, r2
8007436: 3306 adds r3, #6
8007438: 005b lsls r3, r3, #1
800743a: 687a ldr r2, [r7, #4]
800743c: 6812 ldr r2, [r2, #0]
800743e: 4413 add r3, r2
8007440: f503 6380 add.w r3, r3, #1024 @ 0x400
8007444: 881b ldrh r3, [r3, #0]
8007446: f3c3 0309 ubfx r3, r3, #0, #10
800744a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800744e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007452: 2b00 cmp r3, #0
8007454: d009 beq.n 800746a <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8007456: 687b ldr r3, [r7, #4]
8007458: 6818 ldr r0, [r3, #0]
800745a: 6d7b ldr r3, [r7, #84] @ 0x54
800745c: 6959 ldr r1, [r3, #20]
800745e: 6d7b ldr r3, [r7, #84] @ 0x54
8007460: 895a ldrh r2, [r3, #10]
8007462: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007466: f004 ff48 bl 800c2fa <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
800746a: 6d7b ldr r3, [r7, #84] @ 0x54
800746c: 69da ldr r2, [r3, #28]
800746e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007472: 441a add r2, r3
8007474: 6d7b ldr r3, [r7, #84] @ 0x54
8007476: 61da str r2, [r3, #28]
ep->xfer_buff += count;
8007478: 6d7b ldr r3, [r7, #84] @ 0x54
800747a: 695a ldr r2, [r3, #20]
800747c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007480: 441a add r2, r3
8007482: 6d7b ldr r3, [r7, #84] @ 0x54
8007484: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
8007486: 6d7b ldr r3, [r7, #84] @ 0x54
8007488: 699b ldr r3, [r3, #24]
800748a: 2b00 cmp r3, #0
800748c: d005 beq.n 800749a <PCD_EP_ISR_Handler+0x514>
800748e: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
8007492: 6d7b ldr r3, [r7, #84] @ 0x54
8007494: 691b ldr r3, [r3, #16]
8007496: 429a cmp r2, r3
8007498: d206 bcs.n 80074a8 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
800749a: 6d7b ldr r3, [r7, #84] @ 0x54
800749c: 781b ldrb r3, [r3, #0]
800749e: 4619 mov r1, r3
80074a0: 6878 ldr r0, [r7, #4]
80074a2: f006 fd8d bl 800dfc0 <HAL_PCD_DataOutStageCallback>
80074a6: e005 b.n 80074b4 <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
80074a8: 687b ldr r3, [r7, #4]
80074aa: 681b ldr r3, [r3, #0]
80074ac: 6d79 ldr r1, [r7, #84] @ 0x54
80074ae: 4618 mov r0, r3
80074b0: f003 f9ee bl 800a890 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
80074b4: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80074b8: f003 0380 and.w r3, r3, #128 @ 0x80
80074bc: 2b00 cmp r3, #0
80074be: f000 8123 beq.w 8007708 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
80074c2: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80074c6: 4613 mov r3, r2
80074c8: 009b lsls r3, r3, #2
80074ca: 4413 add r3, r2
80074cc: 00db lsls r3, r3, #3
80074ce: 3310 adds r3, #16
80074d0: 687a ldr r2, [r7, #4]
80074d2: 4413 add r3, r2
80074d4: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
80074d6: 687b ldr r3, [r7, #4]
80074d8: 681b ldr r3, [r3, #0]
80074da: 461a mov r2, r3
80074dc: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80074e0: 009b lsls r3, r3, #2
80074e2: 4413 add r3, r2
80074e4: 881b ldrh r3, [r3, #0]
80074e6: b29b uxth r3, r3
80074e8: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
80074ec: f023 0370 bic.w r3, r3, #112 @ 0x70
80074f0: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80074f4: 687b ldr r3, [r7, #4]
80074f6: 681b ldr r3, [r3, #0]
80074f8: 461a mov r2, r3
80074fa: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80074fe: 009b lsls r3, r3, #2
8007500: 441a add r2, r3
8007502: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8007506: ea6f 4343 mvn.w r3, r3, lsl #17
800750a: ea6f 4353 mvn.w r3, r3, lsr #17
800750e: b29b uxth r3, r3
8007510: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
8007512: 6d7b ldr r3, [r7, #84] @ 0x54
8007514: 78db ldrb r3, [r3, #3]
8007516: 2b01 cmp r3, #1
8007518: f040 80a2 bne.w 8007660 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
800751c: 6d7b ldr r3, [r7, #84] @ 0x54
800751e: 2200 movs r2, #0
8007520: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
8007522: 6d7b ldr r3, [r7, #84] @ 0x54
8007524: 7b1b ldrb r3, [r3, #12]
8007526: 2b00 cmp r3, #0
8007528: f000 8093 beq.w 8007652 <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
800752c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007530: f003 0340 and.w r3, r3, #64 @ 0x40
8007534: 2b00 cmp r3, #0
8007536: d046 beq.n 80075c6 <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007538: 6d7b ldr r3, [r7, #84] @ 0x54
800753a: 785b ldrb r3, [r3, #1]
800753c: 2b00 cmp r3, #0
800753e: d126 bne.n 800758e <PCD_EP_ISR_Handler+0x608>
8007540: 687b ldr r3, [r7, #4]
8007542: 681b ldr r3, [r3, #0]
8007544: 627b str r3, [r7, #36] @ 0x24
8007546: 687b ldr r3, [r7, #4]
8007548: 681b ldr r3, [r3, #0]
800754a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800754e: b29b uxth r3, r3
8007550: 461a mov r2, r3
8007552: 6a7b ldr r3, [r7, #36] @ 0x24
8007554: 4413 add r3, r2
8007556: 627b str r3, [r7, #36] @ 0x24
8007558: 6d7b ldr r3, [r7, #84] @ 0x54
800755a: 781b ldrb r3, [r3, #0]
800755c: 011a lsls r2, r3, #4
800755e: 6a7b ldr r3, [r7, #36] @ 0x24
8007560: 4413 add r3, r2
8007562: f203 4304 addw r3, r3, #1028 @ 0x404
8007566: 623b str r3, [r7, #32]
8007568: 6a3b ldr r3, [r7, #32]
800756a: 881b ldrh r3, [r3, #0]
800756c: b29b uxth r3, r3
800756e: f3c3 0309 ubfx r3, r3, #0, #10
8007572: b29a uxth r2, r3
8007574: 6a3b ldr r3, [r7, #32]
8007576: 801a strh r2, [r3, #0]
8007578: 6a3b ldr r3, [r7, #32]
800757a: 881b ldrh r3, [r3, #0]
800757c: b29b uxth r3, r3
800757e: ea6f 4343 mvn.w r3, r3, lsl #17
8007582: ea6f 4353 mvn.w r3, r3, lsr #17
8007586: b29a uxth r2, r3
8007588: 6a3b ldr r3, [r7, #32]
800758a: 801a strh r2, [r3, #0]
800758c: e061 b.n 8007652 <PCD_EP_ISR_Handler+0x6cc>
800758e: 6d7b ldr r3, [r7, #84] @ 0x54
8007590: 785b ldrb r3, [r3, #1]
8007592: 2b01 cmp r3, #1
8007594: d15d bne.n 8007652 <PCD_EP_ISR_Handler+0x6cc>
8007596: 687b ldr r3, [r7, #4]
8007598: 681b ldr r3, [r3, #0]
800759a: 62fb str r3, [r7, #44] @ 0x2c
800759c: 687b ldr r3, [r7, #4]
800759e: 681b ldr r3, [r3, #0]
80075a0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80075a4: b29b uxth r3, r3
80075a6: 461a mov r2, r3
80075a8: 6afb ldr r3, [r7, #44] @ 0x2c
80075aa: 4413 add r3, r2
80075ac: 62fb str r3, [r7, #44] @ 0x2c
80075ae: 6d7b ldr r3, [r7, #84] @ 0x54
80075b0: 781b ldrb r3, [r3, #0]
80075b2: 011a lsls r2, r3, #4
80075b4: 6afb ldr r3, [r7, #44] @ 0x2c
80075b6: 4413 add r3, r2
80075b8: f203 4304 addw r3, r3, #1028 @ 0x404
80075bc: 62bb str r3, [r7, #40] @ 0x28
80075be: 6abb ldr r3, [r7, #40] @ 0x28
80075c0: 2200 movs r2, #0
80075c2: 801a strh r2, [r3, #0]
80075c4: e045 b.n 8007652 <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80075c6: 687b ldr r3, [r7, #4]
80075c8: 681b ldr r3, [r3, #0]
80075ca: 63fb str r3, [r7, #60] @ 0x3c
80075cc: 6d7b ldr r3, [r7, #84] @ 0x54
80075ce: 785b ldrb r3, [r3, #1]
80075d0: 2b00 cmp r3, #0
80075d2: d126 bne.n 8007622 <PCD_EP_ISR_Handler+0x69c>
80075d4: 687b ldr r3, [r7, #4]
80075d6: 681b ldr r3, [r3, #0]
80075d8: 637b str r3, [r7, #52] @ 0x34
80075da: 687b ldr r3, [r7, #4]
80075dc: 681b ldr r3, [r3, #0]
80075de: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80075e2: b29b uxth r3, r3
80075e4: 461a mov r2, r3
80075e6: 6b7b ldr r3, [r7, #52] @ 0x34
80075e8: 4413 add r3, r2
80075ea: 637b str r3, [r7, #52] @ 0x34
80075ec: 6d7b ldr r3, [r7, #84] @ 0x54
80075ee: 781b ldrb r3, [r3, #0]
80075f0: 011a lsls r2, r3, #4
80075f2: 6b7b ldr r3, [r7, #52] @ 0x34
80075f4: 4413 add r3, r2
80075f6: f203 430c addw r3, r3, #1036 @ 0x40c
80075fa: 633b str r3, [r7, #48] @ 0x30
80075fc: 6b3b ldr r3, [r7, #48] @ 0x30
80075fe: 881b ldrh r3, [r3, #0]
8007600: b29b uxth r3, r3
8007602: f3c3 0309 ubfx r3, r3, #0, #10
8007606: b29a uxth r2, r3
8007608: 6b3b ldr r3, [r7, #48] @ 0x30
800760a: 801a strh r2, [r3, #0]
800760c: 6b3b ldr r3, [r7, #48] @ 0x30
800760e: 881b ldrh r3, [r3, #0]
8007610: b29b uxth r3, r3
8007612: ea6f 4343 mvn.w r3, r3, lsl #17
8007616: ea6f 4353 mvn.w r3, r3, lsr #17
800761a: b29a uxth r2, r3
800761c: 6b3b ldr r3, [r7, #48] @ 0x30
800761e: 801a strh r2, [r3, #0]
8007620: e017 b.n 8007652 <PCD_EP_ISR_Handler+0x6cc>
8007622: 6d7b ldr r3, [r7, #84] @ 0x54
8007624: 785b ldrb r3, [r3, #1]
8007626: 2b01 cmp r3, #1
8007628: d113 bne.n 8007652 <PCD_EP_ISR_Handler+0x6cc>
800762a: 687b ldr r3, [r7, #4]
800762c: 681b ldr r3, [r3, #0]
800762e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007632: b29b uxth r3, r3
8007634: 461a mov r2, r3
8007636: 6bfb ldr r3, [r7, #60] @ 0x3c
8007638: 4413 add r3, r2
800763a: 63fb str r3, [r7, #60] @ 0x3c
800763c: 6d7b ldr r3, [r7, #84] @ 0x54
800763e: 781b ldrb r3, [r3, #0]
8007640: 011a lsls r2, r3, #4
8007642: 6bfb ldr r3, [r7, #60] @ 0x3c
8007644: 4413 add r3, r2
8007646: f203 430c addw r3, r3, #1036 @ 0x40c
800764a: 63bb str r3, [r7, #56] @ 0x38
800764c: 6bbb ldr r3, [r7, #56] @ 0x38
800764e: 2200 movs r2, #0
8007650: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007652: 6d7b ldr r3, [r7, #84] @ 0x54
8007654: 781b ldrb r3, [r3, #0]
8007656: 4619 mov r1, r3
8007658: 6878 ldr r0, [r7, #4]
800765a: f006 fccc bl 800dff6 <HAL_PCD_DataInStageCallback>
800765e: e053 b.n 8007708 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
8007660: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007664: f403 7380 and.w r3, r3, #256 @ 0x100
8007668: 2b00 cmp r3, #0
800766a: d146 bne.n 80076fa <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
800766c: 687b ldr r3, [r7, #4]
800766e: 681b ldr r3, [r3, #0]
8007670: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007674: b29b uxth r3, r3
8007676: 461a mov r2, r3
8007678: 6d7b ldr r3, [r7, #84] @ 0x54
800767a: 781b ldrb r3, [r3, #0]
800767c: 00db lsls r3, r3, #3
800767e: 4413 add r3, r2
8007680: 3302 adds r3, #2
8007682: 005b lsls r3, r3, #1
8007684: 687a ldr r2, [r7, #4]
8007686: 6812 ldr r2, [r2, #0]
8007688: 4413 add r3, r2
800768a: f503 6380 add.w r3, r3, #1024 @ 0x400
800768e: 881b ldrh r3, [r3, #0]
8007690: f3c3 0309 ubfx r3, r3, #0, #10
8007694: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8007698: 6d7b ldr r3, [r7, #84] @ 0x54
800769a: 699a ldr r2, [r3, #24]
800769c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80076a0: 429a cmp r2, r3
80076a2: d907 bls.n 80076b4 <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
80076a4: 6d7b ldr r3, [r7, #84] @ 0x54
80076a6: 699a ldr r2, [r3, #24]
80076a8: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80076ac: 1ad2 subs r2, r2, r3
80076ae: 6d7b ldr r3, [r7, #84] @ 0x54
80076b0: 619a str r2, [r3, #24]
80076b2: e002 b.n 80076ba <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
80076b4: 6d7b ldr r3, [r7, #84] @ 0x54
80076b6: 2200 movs r2, #0
80076b8: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
80076ba: 6d7b ldr r3, [r7, #84] @ 0x54
80076bc: 699b ldr r3, [r3, #24]
80076be: 2b00 cmp r3, #0
80076c0: d106 bne.n 80076d0 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80076c2: 6d7b ldr r3, [r7, #84] @ 0x54
80076c4: 781b ldrb r3, [r3, #0]
80076c6: 4619 mov r1, r3
80076c8: 6878 ldr r0, [r7, #4]
80076ca: f006 fc94 bl 800dff6 <HAL_PCD_DataInStageCallback>
80076ce: e01b b.n 8007708 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
80076d0: 6d7b ldr r3, [r7, #84] @ 0x54
80076d2: 695a ldr r2, [r3, #20]
80076d4: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80076d8: 441a add r2, r3
80076da: 6d7b ldr r3, [r7, #84] @ 0x54
80076dc: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
80076de: 6d7b ldr r3, [r7, #84] @ 0x54
80076e0: 69da ldr r2, [r3, #28]
80076e2: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80076e6: 441a add r2, r3
80076e8: 6d7b ldr r3, [r7, #84] @ 0x54
80076ea: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
80076ec: 687b ldr r3, [r7, #4]
80076ee: 681b ldr r3, [r3, #0]
80076f0: 6d79 ldr r1, [r7, #84] @ 0x54
80076f2: 4618 mov r0, r3
80076f4: f003 f8cc bl 800a890 <USB_EPStartXfer>
80076f8: e006 b.n 8007708 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
80076fa: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80076fe: 461a mov r2, r3
8007700: 6d79 ldr r1, [r7, #84] @ 0x54
8007702: 6878 ldr r0, [r7, #4]
8007704: f000 f91b bl 800793e <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8007708: 687b ldr r3, [r7, #4]
800770a: 681b ldr r3, [r3, #0]
800770c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8007710: b29b uxth r3, r3
8007712: b21b sxth r3, r3
8007714: 2b00 cmp r3, #0
8007716: f6ff ac3b blt.w 8006f90 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
800771a: 2300 movs r3, #0
}
800771c: 4618 mov r0, r3
800771e: 3758 adds r7, #88 @ 0x58
8007720: 46bd mov sp, r7
8007722: bd80 pop {r7, pc}
08007724 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8007724: b580 push {r7, lr}
8007726: b088 sub sp, #32
8007728: af00 add r7, sp, #0
800772a: 60f8 str r0, [r7, #12]
800772c: 60b9 str r1, [r7, #8]
800772e: 4613 mov r3, r2
8007730: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007732: 88fb ldrh r3, [r7, #6]
8007734: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007738: 2b00 cmp r3, #0
800773a: d07e beq.n 800783a <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
800773c: 68fb ldr r3, [r7, #12]
800773e: 681b ldr r3, [r3, #0]
8007740: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007744: b29b uxth r3, r3
8007746: 461a mov r2, r3
8007748: 68bb ldr r3, [r7, #8]
800774a: 781b ldrb r3, [r3, #0]
800774c: 00db lsls r3, r3, #3
800774e: 4413 add r3, r2
8007750: 3302 adds r3, #2
8007752: 005b lsls r3, r3, #1
8007754: 68fa ldr r2, [r7, #12]
8007756: 6812 ldr r2, [r2, #0]
8007758: 4413 add r3, r2
800775a: f503 6380 add.w r3, r3, #1024 @ 0x400
800775e: 881b ldrh r3, [r3, #0]
8007760: f3c3 0309 ubfx r3, r3, #0, #10
8007764: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8007766: 68bb ldr r3, [r7, #8]
8007768: 699a ldr r2, [r3, #24]
800776a: 8b7b ldrh r3, [r7, #26]
800776c: 429a cmp r2, r3
800776e: d306 bcc.n 800777e <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8007770: 68bb ldr r3, [r7, #8]
8007772: 699a ldr r2, [r3, #24]
8007774: 8b7b ldrh r3, [r7, #26]
8007776: 1ad2 subs r2, r2, r3
8007778: 68bb ldr r3, [r7, #8]
800777a: 619a str r2, [r3, #24]
800777c: e002 b.n 8007784 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
800777e: 68bb ldr r3, [r7, #8]
8007780: 2200 movs r2, #0
8007782: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8007784: 68bb ldr r3, [r7, #8]
8007786: 699b ldr r3, [r3, #24]
8007788: 2b00 cmp r3, #0
800778a: d123 bne.n 80077d4 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
800778c: 68fb ldr r3, [r7, #12]
800778e: 681b ldr r3, [r3, #0]
8007790: 461a mov r2, r3
8007792: 68bb ldr r3, [r7, #8]
8007794: 781b ldrb r3, [r3, #0]
8007796: 009b lsls r3, r3, #2
8007798: 4413 add r3, r2
800779a: 881b ldrh r3, [r3, #0]
800779c: b29b uxth r3, r3
800779e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80077a2: f023 0370 bic.w r3, r3, #112 @ 0x70
80077a6: 833b strh r3, [r7, #24]
80077a8: 8b3b ldrh r3, [r7, #24]
80077aa: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80077ae: 833b strh r3, [r7, #24]
80077b0: 68fb ldr r3, [r7, #12]
80077b2: 681b ldr r3, [r3, #0]
80077b4: 461a mov r2, r3
80077b6: 68bb ldr r3, [r7, #8]
80077b8: 781b ldrb r3, [r3, #0]
80077ba: 009b lsls r3, r3, #2
80077bc: 441a add r2, r3
80077be: 8b3b ldrh r3, [r7, #24]
80077c0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80077c4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80077c8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80077cc: f043 0380 orr.w r3, r3, #128 @ 0x80
80077d0: b29b uxth r3, r3
80077d2: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80077d4: 88fb ldrh r3, [r7, #6]
80077d6: f003 0340 and.w r3, r3, #64 @ 0x40
80077da: 2b00 cmp r3, #0
80077dc: d01f beq.n 800781e <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
80077de: 68fb ldr r3, [r7, #12]
80077e0: 681b ldr r3, [r3, #0]
80077e2: 461a mov r2, r3
80077e4: 68bb ldr r3, [r7, #8]
80077e6: 781b ldrb r3, [r3, #0]
80077e8: 009b lsls r3, r3, #2
80077ea: 4413 add r3, r2
80077ec: 881b ldrh r3, [r3, #0]
80077ee: b29b uxth r3, r3
80077f0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80077f4: f023 0370 bic.w r3, r3, #112 @ 0x70
80077f8: 82fb strh r3, [r7, #22]
80077fa: 68fb ldr r3, [r7, #12]
80077fc: 681b ldr r3, [r3, #0]
80077fe: 461a mov r2, r3
8007800: 68bb ldr r3, [r7, #8]
8007802: 781b ldrb r3, [r3, #0]
8007804: 009b lsls r3, r3, #2
8007806: 441a add r2, r3
8007808: 8afb ldrh r3, [r7, #22]
800780a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800780e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007812: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007816: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800781a: b29b uxth r3, r3
800781c: 8013 strh r3, [r2, #0]
}
if (count != 0U)
800781e: 8b7b ldrh r3, [r7, #26]
8007820: 2b00 cmp r3, #0
8007822: f000 8087 beq.w 8007934 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8007826: 68fb ldr r3, [r7, #12]
8007828: 6818 ldr r0, [r3, #0]
800782a: 68bb ldr r3, [r7, #8]
800782c: 6959 ldr r1, [r3, #20]
800782e: 68bb ldr r3, [r7, #8]
8007830: 891a ldrh r2, [r3, #8]
8007832: 8b7b ldrh r3, [r7, #26]
8007834: f004 fd61 bl 800c2fa <USB_ReadPMA>
8007838: e07c b.n 8007934 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800783a: 68fb ldr r3, [r7, #12]
800783c: 681b ldr r3, [r3, #0]
800783e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007842: b29b uxth r3, r3
8007844: 461a mov r2, r3
8007846: 68bb ldr r3, [r7, #8]
8007848: 781b ldrb r3, [r3, #0]
800784a: 00db lsls r3, r3, #3
800784c: 4413 add r3, r2
800784e: 3306 adds r3, #6
8007850: 005b lsls r3, r3, #1
8007852: 68fa ldr r2, [r7, #12]
8007854: 6812 ldr r2, [r2, #0]
8007856: 4413 add r3, r2
8007858: f503 6380 add.w r3, r3, #1024 @ 0x400
800785c: 881b ldrh r3, [r3, #0]
800785e: f3c3 0309 ubfx r3, r3, #0, #10
8007862: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8007864: 68bb ldr r3, [r7, #8]
8007866: 699a ldr r2, [r3, #24]
8007868: 8b7b ldrh r3, [r7, #26]
800786a: 429a cmp r2, r3
800786c: d306 bcc.n 800787c <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
800786e: 68bb ldr r3, [r7, #8]
8007870: 699a ldr r2, [r3, #24]
8007872: 8b7b ldrh r3, [r7, #26]
8007874: 1ad2 subs r2, r2, r3
8007876: 68bb ldr r3, [r7, #8]
8007878: 619a str r2, [r3, #24]
800787a: e002 b.n 8007882 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
800787c: 68bb ldr r3, [r7, #8]
800787e: 2200 movs r2, #0
8007880: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8007882: 68bb ldr r3, [r7, #8]
8007884: 699b ldr r3, [r3, #24]
8007886: 2b00 cmp r3, #0
8007888: d123 bne.n 80078d2 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
800788a: 68fb ldr r3, [r7, #12]
800788c: 681b ldr r3, [r3, #0]
800788e: 461a mov r2, r3
8007890: 68bb ldr r3, [r7, #8]
8007892: 781b ldrb r3, [r3, #0]
8007894: 009b lsls r3, r3, #2
8007896: 4413 add r3, r2
8007898: 881b ldrh r3, [r3, #0]
800789a: b29b uxth r3, r3
800789c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80078a0: f023 0370 bic.w r3, r3, #112 @ 0x70
80078a4: 83fb strh r3, [r7, #30]
80078a6: 8bfb ldrh r3, [r7, #30]
80078a8: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80078ac: 83fb strh r3, [r7, #30]
80078ae: 68fb ldr r3, [r7, #12]
80078b0: 681b ldr r3, [r3, #0]
80078b2: 461a mov r2, r3
80078b4: 68bb ldr r3, [r7, #8]
80078b6: 781b ldrb r3, [r3, #0]
80078b8: 009b lsls r3, r3, #2
80078ba: 441a add r2, r3
80078bc: 8bfb ldrh r3, [r7, #30]
80078be: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80078c2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80078c6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80078ca: f043 0380 orr.w r3, r3, #128 @ 0x80
80078ce: b29b uxth r3, r3
80078d0: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
80078d2: 88fb ldrh r3, [r7, #6]
80078d4: f003 0340 and.w r3, r3, #64 @ 0x40
80078d8: 2b00 cmp r3, #0
80078da: d11f bne.n 800791c <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
80078dc: 68fb ldr r3, [r7, #12]
80078de: 681b ldr r3, [r3, #0]
80078e0: 461a mov r2, r3
80078e2: 68bb ldr r3, [r7, #8]
80078e4: 781b ldrb r3, [r3, #0]
80078e6: 009b lsls r3, r3, #2
80078e8: 4413 add r3, r2
80078ea: 881b ldrh r3, [r3, #0]
80078ec: b29b uxth r3, r3
80078ee: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80078f2: f023 0370 bic.w r3, r3, #112 @ 0x70
80078f6: 83bb strh r3, [r7, #28]
80078f8: 68fb ldr r3, [r7, #12]
80078fa: 681b ldr r3, [r3, #0]
80078fc: 461a mov r2, r3
80078fe: 68bb ldr r3, [r7, #8]
8007900: 781b ldrb r3, [r3, #0]
8007902: 009b lsls r3, r3, #2
8007904: 441a add r2, r3
8007906: 8bbb ldrh r3, [r7, #28]
8007908: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800790c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007910: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007914: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007918: b29b uxth r3, r3
800791a: 8013 strh r3, [r2, #0]
}
if (count != 0U)
800791c: 8b7b ldrh r3, [r7, #26]
800791e: 2b00 cmp r3, #0
8007920: d008 beq.n 8007934 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8007922: 68fb ldr r3, [r7, #12]
8007924: 6818 ldr r0, [r3, #0]
8007926: 68bb ldr r3, [r7, #8]
8007928: 6959 ldr r1, [r3, #20]
800792a: 68bb ldr r3, [r7, #8]
800792c: 895a ldrh r2, [r3, #10]
800792e: 8b7b ldrh r3, [r7, #26]
8007930: f004 fce3 bl 800c2fa <USB_ReadPMA>
}
}
return count;
8007934: 8b7b ldrh r3, [r7, #26]
}
8007936: 4618 mov r0, r3
8007938: 3720 adds r7, #32
800793a: 46bd mov sp, r7
800793c: bd80 pop {r7, pc}
0800793e <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
800793e: b580 push {r7, lr}
8007940: b0a4 sub sp, #144 @ 0x90
8007942: af00 add r7, sp, #0
8007944: 60f8 str r0, [r7, #12]
8007946: 60b9 str r1, [r7, #8]
8007948: 4613 mov r3, r2
800794a: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
800794c: 88fb ldrh r3, [r7, #6]
800794e: f003 0340 and.w r3, r3, #64 @ 0x40
8007952: 2b00 cmp r3, #0
8007954: f000 81dd beq.w 8007d12 <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8007958: 68fb ldr r3, [r7, #12]
800795a: 681b ldr r3, [r3, #0]
800795c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007960: b29b uxth r3, r3
8007962: 461a mov r2, r3
8007964: 68bb ldr r3, [r7, #8]
8007966: 781b ldrb r3, [r3, #0]
8007968: 00db lsls r3, r3, #3
800796a: 4413 add r3, r2
800796c: 3302 adds r3, #2
800796e: 005b lsls r3, r3, #1
8007970: 68fa ldr r2, [r7, #12]
8007972: 6812 ldr r2, [r2, #0]
8007974: 4413 add r3, r2
8007976: f503 6380 add.w r3, r3, #1024 @ 0x400
800797a: 881b ldrh r3, [r3, #0]
800797c: f3c3 0309 ubfx r3, r3, #0, #10
8007980: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8007984: 68bb ldr r3, [r7, #8]
8007986: 699a ldr r2, [r3, #24]
8007988: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800798c: 429a cmp r2, r3
800798e: d907 bls.n 80079a0 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8007990: 68bb ldr r3, [r7, #8]
8007992: 699a ldr r2, [r3, #24]
8007994: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007998: 1ad2 subs r2, r2, r3
800799a: 68bb ldr r3, [r7, #8]
800799c: 619a str r2, [r3, #24]
800799e: e002 b.n 80079a6 <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
80079a0: 68bb ldr r3, [r7, #8]
80079a2: 2200 movs r2, #0
80079a4: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
80079a6: 68bb ldr r3, [r7, #8]
80079a8: 699b ldr r3, [r3, #24]
80079aa: 2b00 cmp r3, #0
80079ac: f040 80b9 bne.w 8007b22 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80079b0: 68bb ldr r3, [r7, #8]
80079b2: 785b ldrb r3, [r3, #1]
80079b4: 2b00 cmp r3, #0
80079b6: d126 bne.n 8007a06 <HAL_PCD_EP_DB_Transmit+0xc8>
80079b8: 68fb ldr r3, [r7, #12]
80079ba: 681b ldr r3, [r3, #0]
80079bc: 62fb str r3, [r7, #44] @ 0x2c
80079be: 68fb ldr r3, [r7, #12]
80079c0: 681b ldr r3, [r3, #0]
80079c2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80079c6: b29b uxth r3, r3
80079c8: 461a mov r2, r3
80079ca: 6afb ldr r3, [r7, #44] @ 0x2c
80079cc: 4413 add r3, r2
80079ce: 62fb str r3, [r7, #44] @ 0x2c
80079d0: 68bb ldr r3, [r7, #8]
80079d2: 781b ldrb r3, [r3, #0]
80079d4: 011a lsls r2, r3, #4
80079d6: 6afb ldr r3, [r7, #44] @ 0x2c
80079d8: 4413 add r3, r2
80079da: f203 4304 addw r3, r3, #1028 @ 0x404
80079de: 62bb str r3, [r7, #40] @ 0x28
80079e0: 6abb ldr r3, [r7, #40] @ 0x28
80079e2: 881b ldrh r3, [r3, #0]
80079e4: b29b uxth r3, r3
80079e6: f3c3 0309 ubfx r3, r3, #0, #10
80079ea: b29a uxth r2, r3
80079ec: 6abb ldr r3, [r7, #40] @ 0x28
80079ee: 801a strh r2, [r3, #0]
80079f0: 6abb ldr r3, [r7, #40] @ 0x28
80079f2: 881b ldrh r3, [r3, #0]
80079f4: b29b uxth r3, r3
80079f6: ea6f 4343 mvn.w r3, r3, lsl #17
80079fa: ea6f 4353 mvn.w r3, r3, lsr #17
80079fe: b29a uxth r2, r3
8007a00: 6abb ldr r3, [r7, #40] @ 0x28
8007a02: 801a strh r2, [r3, #0]
8007a04: e01a b.n 8007a3c <HAL_PCD_EP_DB_Transmit+0xfe>
8007a06: 68bb ldr r3, [r7, #8]
8007a08: 785b ldrb r3, [r3, #1]
8007a0a: 2b01 cmp r3, #1
8007a0c: d116 bne.n 8007a3c <HAL_PCD_EP_DB_Transmit+0xfe>
8007a0e: 68fb ldr r3, [r7, #12]
8007a10: 681b ldr r3, [r3, #0]
8007a12: 637b str r3, [r7, #52] @ 0x34
8007a14: 68fb ldr r3, [r7, #12]
8007a16: 681b ldr r3, [r3, #0]
8007a18: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007a1c: b29b uxth r3, r3
8007a1e: 461a mov r2, r3
8007a20: 6b7b ldr r3, [r7, #52] @ 0x34
8007a22: 4413 add r3, r2
8007a24: 637b str r3, [r7, #52] @ 0x34
8007a26: 68bb ldr r3, [r7, #8]
8007a28: 781b ldrb r3, [r3, #0]
8007a2a: 011a lsls r2, r3, #4
8007a2c: 6b7b ldr r3, [r7, #52] @ 0x34
8007a2e: 4413 add r3, r2
8007a30: f203 4304 addw r3, r3, #1028 @ 0x404
8007a34: 633b str r3, [r7, #48] @ 0x30
8007a36: 6b3b ldr r3, [r7, #48] @ 0x30
8007a38: 2200 movs r2, #0
8007a3a: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007a3c: 68fb ldr r3, [r7, #12]
8007a3e: 681b ldr r3, [r3, #0]
8007a40: 627b str r3, [r7, #36] @ 0x24
8007a42: 68bb ldr r3, [r7, #8]
8007a44: 785b ldrb r3, [r3, #1]
8007a46: 2b00 cmp r3, #0
8007a48: d126 bne.n 8007a98 <HAL_PCD_EP_DB_Transmit+0x15a>
8007a4a: 68fb ldr r3, [r7, #12]
8007a4c: 681b ldr r3, [r3, #0]
8007a4e: 61fb str r3, [r7, #28]
8007a50: 68fb ldr r3, [r7, #12]
8007a52: 681b ldr r3, [r3, #0]
8007a54: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007a58: b29b uxth r3, r3
8007a5a: 461a mov r2, r3
8007a5c: 69fb ldr r3, [r7, #28]
8007a5e: 4413 add r3, r2
8007a60: 61fb str r3, [r7, #28]
8007a62: 68bb ldr r3, [r7, #8]
8007a64: 781b ldrb r3, [r3, #0]
8007a66: 011a lsls r2, r3, #4
8007a68: 69fb ldr r3, [r7, #28]
8007a6a: 4413 add r3, r2
8007a6c: f203 430c addw r3, r3, #1036 @ 0x40c
8007a70: 61bb str r3, [r7, #24]
8007a72: 69bb ldr r3, [r7, #24]
8007a74: 881b ldrh r3, [r3, #0]
8007a76: b29b uxth r3, r3
8007a78: f3c3 0309 ubfx r3, r3, #0, #10
8007a7c: b29a uxth r2, r3
8007a7e: 69bb ldr r3, [r7, #24]
8007a80: 801a strh r2, [r3, #0]
8007a82: 69bb ldr r3, [r7, #24]
8007a84: 881b ldrh r3, [r3, #0]
8007a86: b29b uxth r3, r3
8007a88: ea6f 4343 mvn.w r3, r3, lsl #17
8007a8c: ea6f 4353 mvn.w r3, r3, lsr #17
8007a90: b29a uxth r2, r3
8007a92: 69bb ldr r3, [r7, #24]
8007a94: 801a strh r2, [r3, #0]
8007a96: e017 b.n 8007ac8 <HAL_PCD_EP_DB_Transmit+0x18a>
8007a98: 68bb ldr r3, [r7, #8]
8007a9a: 785b ldrb r3, [r3, #1]
8007a9c: 2b01 cmp r3, #1
8007a9e: d113 bne.n 8007ac8 <HAL_PCD_EP_DB_Transmit+0x18a>
8007aa0: 68fb ldr r3, [r7, #12]
8007aa2: 681b ldr r3, [r3, #0]
8007aa4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007aa8: b29b uxth r3, r3
8007aaa: 461a mov r2, r3
8007aac: 6a7b ldr r3, [r7, #36] @ 0x24
8007aae: 4413 add r3, r2
8007ab0: 627b str r3, [r7, #36] @ 0x24
8007ab2: 68bb ldr r3, [r7, #8]
8007ab4: 781b ldrb r3, [r3, #0]
8007ab6: 011a lsls r2, r3, #4
8007ab8: 6a7b ldr r3, [r7, #36] @ 0x24
8007aba: 4413 add r3, r2
8007abc: f203 430c addw r3, r3, #1036 @ 0x40c
8007ac0: 623b str r3, [r7, #32]
8007ac2: 6a3b ldr r3, [r7, #32]
8007ac4: 2200 movs r2, #0
8007ac6: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007ac8: 68bb ldr r3, [r7, #8]
8007aca: 781b ldrb r3, [r3, #0]
8007acc: 4619 mov r1, r3
8007ace: 68f8 ldr r0, [r7, #12]
8007ad0: f006 fa91 bl 800dff6 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007ad4: 88fb ldrh r3, [r7, #6]
8007ad6: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007ada: 2b00 cmp r3, #0
8007adc: f000 82fc beq.w 80080d8 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007ae0: 68fb ldr r3, [r7, #12]
8007ae2: 681b ldr r3, [r3, #0]
8007ae4: 461a mov r2, r3
8007ae6: 68bb ldr r3, [r7, #8]
8007ae8: 781b ldrb r3, [r3, #0]
8007aea: 009b lsls r3, r3, #2
8007aec: 4413 add r3, r2
8007aee: 881b ldrh r3, [r3, #0]
8007af0: b29b uxth r3, r3
8007af2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007af6: f023 0370 bic.w r3, r3, #112 @ 0x70
8007afa: 82fb strh r3, [r7, #22]
8007afc: 68fb ldr r3, [r7, #12]
8007afe: 681b ldr r3, [r3, #0]
8007b00: 461a mov r2, r3
8007b02: 68bb ldr r3, [r7, #8]
8007b04: 781b ldrb r3, [r3, #0]
8007b06: 009b lsls r3, r3, #2
8007b08: 441a add r2, r3
8007b0a: 8afb ldrh r3, [r7, #22]
8007b0c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007b10: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007b14: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007b18: f043 0380 orr.w r3, r3, #128 @ 0x80
8007b1c: b29b uxth r3, r3
8007b1e: 8013 strh r3, [r2, #0]
8007b20: e2da b.n 80080d8 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007b22: 88fb ldrh r3, [r7, #6]
8007b24: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007b28: 2b00 cmp r3, #0
8007b2a: d021 beq.n 8007b70 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007b2c: 68fb ldr r3, [r7, #12]
8007b2e: 681b ldr r3, [r3, #0]
8007b30: 461a mov r2, r3
8007b32: 68bb ldr r3, [r7, #8]
8007b34: 781b ldrb r3, [r3, #0]
8007b36: 009b lsls r3, r3, #2
8007b38: 4413 add r3, r2
8007b3a: 881b ldrh r3, [r3, #0]
8007b3c: b29b uxth r3, r3
8007b3e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007b42: f023 0370 bic.w r3, r3, #112 @ 0x70
8007b46: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8007b4a: 68fb ldr r3, [r7, #12]
8007b4c: 681b ldr r3, [r3, #0]
8007b4e: 461a mov r2, r3
8007b50: 68bb ldr r3, [r7, #8]
8007b52: 781b ldrb r3, [r3, #0]
8007b54: 009b lsls r3, r3, #2
8007b56: 441a add r2, r3
8007b58: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8007b5c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007b60: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007b64: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007b68: f043 0380 orr.w r3, r3, #128 @ 0x80
8007b6c: b29b uxth r3, r3
8007b6e: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8007b70: 68bb ldr r3, [r7, #8]
8007b72: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8007b76: 2b01 cmp r3, #1
8007b78: f040 82ae bne.w 80080d8 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8007b7c: 68bb ldr r3, [r7, #8]
8007b7e: 695a ldr r2, [r3, #20]
8007b80: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007b84: 441a add r2, r3
8007b86: 68bb ldr r3, [r7, #8]
8007b88: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007b8a: 68bb ldr r3, [r7, #8]
8007b8c: 69da ldr r2, [r3, #28]
8007b8e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007b92: 441a add r2, r3
8007b94: 68bb ldr r3, [r7, #8]
8007b96: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007b98: 68bb ldr r3, [r7, #8]
8007b9a: 6a1a ldr r2, [r3, #32]
8007b9c: 68bb ldr r3, [r7, #8]
8007b9e: 691b ldr r3, [r3, #16]
8007ba0: 429a cmp r2, r3
8007ba2: d30b bcc.n 8007bbc <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8007ba4: 68bb ldr r3, [r7, #8]
8007ba6: 691b ldr r3, [r3, #16]
8007ba8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007bac: 68bb ldr r3, [r7, #8]
8007bae: 6a1a ldr r2, [r3, #32]
8007bb0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007bb4: 1ad2 subs r2, r2, r3
8007bb6: 68bb ldr r3, [r7, #8]
8007bb8: 621a str r2, [r3, #32]
8007bba: e017 b.n 8007bec <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8007bbc: 68bb ldr r3, [r7, #8]
8007bbe: 6a1b ldr r3, [r3, #32]
8007bc0: 2b00 cmp r3, #0
8007bc2: d108 bne.n 8007bd6 <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8007bc4: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007bc8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007bcc: 68bb ldr r3, [r7, #8]
8007bce: 2200 movs r2, #0
8007bd0: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007bd4: e00a b.n 8007bec <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8007bd6: 68bb ldr r3, [r7, #8]
8007bd8: 2200 movs r2, #0
8007bda: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8007bde: 68bb ldr r3, [r7, #8]
8007be0: 6a1b ldr r3, [r3, #32]
8007be2: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007be6: 68bb ldr r3, [r7, #8]
8007be8: 2200 movs r2, #0
8007bea: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007bec: 68bb ldr r3, [r7, #8]
8007bee: 785b ldrb r3, [r3, #1]
8007bf0: 2b00 cmp r3, #0
8007bf2: d165 bne.n 8007cc0 <HAL_PCD_EP_DB_Transmit+0x382>
8007bf4: 68fb ldr r3, [r7, #12]
8007bf6: 681b ldr r3, [r3, #0]
8007bf8: 63fb str r3, [r7, #60] @ 0x3c
8007bfa: 68fb ldr r3, [r7, #12]
8007bfc: 681b ldr r3, [r3, #0]
8007bfe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007c02: b29b uxth r3, r3
8007c04: 461a mov r2, r3
8007c06: 6bfb ldr r3, [r7, #60] @ 0x3c
8007c08: 4413 add r3, r2
8007c0a: 63fb str r3, [r7, #60] @ 0x3c
8007c0c: 68bb ldr r3, [r7, #8]
8007c0e: 781b ldrb r3, [r3, #0]
8007c10: 011a lsls r2, r3, #4
8007c12: 6bfb ldr r3, [r7, #60] @ 0x3c
8007c14: 4413 add r3, r2
8007c16: f203 4304 addw r3, r3, #1028 @ 0x404
8007c1a: 63bb str r3, [r7, #56] @ 0x38
8007c1c: 6bbb ldr r3, [r7, #56] @ 0x38
8007c1e: 881b ldrh r3, [r3, #0]
8007c20: b29b uxth r3, r3
8007c22: f3c3 0309 ubfx r3, r3, #0, #10
8007c26: b29a uxth r2, r3
8007c28: 6bbb ldr r3, [r7, #56] @ 0x38
8007c2a: 801a strh r2, [r3, #0]
8007c2c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007c30: 2b3e cmp r3, #62 @ 0x3e
8007c32: d91d bls.n 8007c70 <HAL_PCD_EP_DB_Transmit+0x332>
8007c34: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007c38: 095b lsrs r3, r3, #5
8007c3a: 64bb str r3, [r7, #72] @ 0x48
8007c3c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007c40: f003 031f and.w r3, r3, #31
8007c44: 2b00 cmp r3, #0
8007c46: d102 bne.n 8007c4e <HAL_PCD_EP_DB_Transmit+0x310>
8007c48: 6cbb ldr r3, [r7, #72] @ 0x48
8007c4a: 3b01 subs r3, #1
8007c4c: 64bb str r3, [r7, #72] @ 0x48
8007c4e: 6bbb ldr r3, [r7, #56] @ 0x38
8007c50: 881b ldrh r3, [r3, #0]
8007c52: b29a uxth r2, r3
8007c54: 6cbb ldr r3, [r7, #72] @ 0x48
8007c56: b29b uxth r3, r3
8007c58: 029b lsls r3, r3, #10
8007c5a: b29b uxth r3, r3
8007c5c: 4313 orrs r3, r2
8007c5e: b29b uxth r3, r3
8007c60: ea6f 4343 mvn.w r3, r3, lsl #17
8007c64: ea6f 4353 mvn.w r3, r3, lsr #17
8007c68: b29a uxth r2, r3
8007c6a: 6bbb ldr r3, [r7, #56] @ 0x38
8007c6c: 801a strh r2, [r3, #0]
8007c6e: e044 b.n 8007cfa <HAL_PCD_EP_DB_Transmit+0x3bc>
8007c70: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007c74: 2b00 cmp r3, #0
8007c76: d10a bne.n 8007c8e <HAL_PCD_EP_DB_Transmit+0x350>
8007c78: 6bbb ldr r3, [r7, #56] @ 0x38
8007c7a: 881b ldrh r3, [r3, #0]
8007c7c: b29b uxth r3, r3
8007c7e: ea6f 4343 mvn.w r3, r3, lsl #17
8007c82: ea6f 4353 mvn.w r3, r3, lsr #17
8007c86: b29a uxth r2, r3
8007c88: 6bbb ldr r3, [r7, #56] @ 0x38
8007c8a: 801a strh r2, [r3, #0]
8007c8c: e035 b.n 8007cfa <HAL_PCD_EP_DB_Transmit+0x3bc>
8007c8e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007c92: 085b lsrs r3, r3, #1
8007c94: 64bb str r3, [r7, #72] @ 0x48
8007c96: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007c9a: f003 0301 and.w r3, r3, #1
8007c9e: 2b00 cmp r3, #0
8007ca0: d002 beq.n 8007ca8 <HAL_PCD_EP_DB_Transmit+0x36a>
8007ca2: 6cbb ldr r3, [r7, #72] @ 0x48
8007ca4: 3301 adds r3, #1
8007ca6: 64bb str r3, [r7, #72] @ 0x48
8007ca8: 6bbb ldr r3, [r7, #56] @ 0x38
8007caa: 881b ldrh r3, [r3, #0]
8007cac: b29a uxth r2, r3
8007cae: 6cbb ldr r3, [r7, #72] @ 0x48
8007cb0: b29b uxth r3, r3
8007cb2: 029b lsls r3, r3, #10
8007cb4: b29b uxth r3, r3
8007cb6: 4313 orrs r3, r2
8007cb8: b29a uxth r2, r3
8007cba: 6bbb ldr r3, [r7, #56] @ 0x38
8007cbc: 801a strh r2, [r3, #0]
8007cbe: e01c b.n 8007cfa <HAL_PCD_EP_DB_Transmit+0x3bc>
8007cc0: 68bb ldr r3, [r7, #8]
8007cc2: 785b ldrb r3, [r3, #1]
8007cc4: 2b01 cmp r3, #1
8007cc6: d118 bne.n 8007cfa <HAL_PCD_EP_DB_Transmit+0x3bc>
8007cc8: 68fb ldr r3, [r7, #12]
8007cca: 681b ldr r3, [r3, #0]
8007ccc: 647b str r3, [r7, #68] @ 0x44
8007cce: 68fb ldr r3, [r7, #12]
8007cd0: 681b ldr r3, [r3, #0]
8007cd2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007cd6: b29b uxth r3, r3
8007cd8: 461a mov r2, r3
8007cda: 6c7b ldr r3, [r7, #68] @ 0x44
8007cdc: 4413 add r3, r2
8007cde: 647b str r3, [r7, #68] @ 0x44
8007ce0: 68bb ldr r3, [r7, #8]
8007ce2: 781b ldrb r3, [r3, #0]
8007ce4: 011a lsls r2, r3, #4
8007ce6: 6c7b ldr r3, [r7, #68] @ 0x44
8007ce8: 4413 add r3, r2
8007cea: f203 4304 addw r3, r3, #1028 @ 0x404
8007cee: 643b str r3, [r7, #64] @ 0x40
8007cf0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007cf4: b29a uxth r2, r3
8007cf6: 6c3b ldr r3, [r7, #64] @ 0x40
8007cf8: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8007cfa: 68fb ldr r3, [r7, #12]
8007cfc: 6818 ldr r0, [r3, #0]
8007cfe: 68bb ldr r3, [r7, #8]
8007d00: 6959 ldr r1, [r3, #20]
8007d02: 68bb ldr r3, [r7, #8]
8007d04: 891a ldrh r2, [r3, #8]
8007d06: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007d0a: b29b uxth r3, r3
8007d0c: f004 faaf bl 800c26e <USB_WritePMA>
8007d10: e1e2 b.n 80080d8 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8007d12: 68fb ldr r3, [r7, #12]
8007d14: 681b ldr r3, [r3, #0]
8007d16: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007d1a: b29b uxth r3, r3
8007d1c: 461a mov r2, r3
8007d1e: 68bb ldr r3, [r7, #8]
8007d20: 781b ldrb r3, [r3, #0]
8007d22: 00db lsls r3, r3, #3
8007d24: 4413 add r3, r2
8007d26: 3306 adds r3, #6
8007d28: 005b lsls r3, r3, #1
8007d2a: 68fa ldr r2, [r7, #12]
8007d2c: 6812 ldr r2, [r2, #0]
8007d2e: 4413 add r3, r2
8007d30: f503 6380 add.w r3, r3, #1024 @ 0x400
8007d34: 881b ldrh r3, [r3, #0]
8007d36: f3c3 0309 ubfx r3, r3, #0, #10
8007d3a: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
8007d3e: 68bb ldr r3, [r7, #8]
8007d40: 699a ldr r2, [r3, #24]
8007d42: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007d46: 429a cmp r2, r3
8007d48: d307 bcc.n 8007d5a <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
8007d4a: 68bb ldr r3, [r7, #8]
8007d4c: 699a ldr r2, [r3, #24]
8007d4e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007d52: 1ad2 subs r2, r2, r3
8007d54: 68bb ldr r3, [r7, #8]
8007d56: 619a str r2, [r3, #24]
8007d58: e002 b.n 8007d60 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
8007d5a: 68bb ldr r3, [r7, #8]
8007d5c: 2200 movs r2, #0
8007d5e: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8007d60: 68bb ldr r3, [r7, #8]
8007d62: 699b ldr r3, [r3, #24]
8007d64: 2b00 cmp r3, #0
8007d66: f040 80c0 bne.w 8007eea <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007d6a: 68bb ldr r3, [r7, #8]
8007d6c: 785b ldrb r3, [r3, #1]
8007d6e: 2b00 cmp r3, #0
8007d70: d126 bne.n 8007dc0 <HAL_PCD_EP_DB_Transmit+0x482>
8007d72: 68fb ldr r3, [r7, #12]
8007d74: 681b ldr r3, [r3, #0]
8007d76: 67fb str r3, [r7, #124] @ 0x7c
8007d78: 68fb ldr r3, [r7, #12]
8007d7a: 681b ldr r3, [r3, #0]
8007d7c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007d80: b29b uxth r3, r3
8007d82: 461a mov r2, r3
8007d84: 6ffb ldr r3, [r7, #124] @ 0x7c
8007d86: 4413 add r3, r2
8007d88: 67fb str r3, [r7, #124] @ 0x7c
8007d8a: 68bb ldr r3, [r7, #8]
8007d8c: 781b ldrb r3, [r3, #0]
8007d8e: 011a lsls r2, r3, #4
8007d90: 6ffb ldr r3, [r7, #124] @ 0x7c
8007d92: 4413 add r3, r2
8007d94: f203 4304 addw r3, r3, #1028 @ 0x404
8007d98: 67bb str r3, [r7, #120] @ 0x78
8007d9a: 6fbb ldr r3, [r7, #120] @ 0x78
8007d9c: 881b ldrh r3, [r3, #0]
8007d9e: b29b uxth r3, r3
8007da0: f3c3 0309 ubfx r3, r3, #0, #10
8007da4: b29a uxth r2, r3
8007da6: 6fbb ldr r3, [r7, #120] @ 0x78
8007da8: 801a strh r2, [r3, #0]
8007daa: 6fbb ldr r3, [r7, #120] @ 0x78
8007dac: 881b ldrh r3, [r3, #0]
8007dae: b29b uxth r3, r3
8007db0: ea6f 4343 mvn.w r3, r3, lsl #17
8007db4: ea6f 4353 mvn.w r3, r3, lsr #17
8007db8: b29a uxth r2, r3
8007dba: 6fbb ldr r3, [r7, #120] @ 0x78
8007dbc: 801a strh r2, [r3, #0]
8007dbe: e01a b.n 8007df6 <HAL_PCD_EP_DB_Transmit+0x4b8>
8007dc0: 68bb ldr r3, [r7, #8]
8007dc2: 785b ldrb r3, [r3, #1]
8007dc4: 2b01 cmp r3, #1
8007dc6: d116 bne.n 8007df6 <HAL_PCD_EP_DB_Transmit+0x4b8>
8007dc8: 68fb ldr r3, [r7, #12]
8007dca: 681b ldr r3, [r3, #0]
8007dcc: 667b str r3, [r7, #100] @ 0x64
8007dce: 68fb ldr r3, [r7, #12]
8007dd0: 681b ldr r3, [r3, #0]
8007dd2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007dd6: b29b uxth r3, r3
8007dd8: 461a mov r2, r3
8007dda: 6e7b ldr r3, [r7, #100] @ 0x64
8007ddc: 4413 add r3, r2
8007dde: 667b str r3, [r7, #100] @ 0x64
8007de0: 68bb ldr r3, [r7, #8]
8007de2: 781b ldrb r3, [r3, #0]
8007de4: 011a lsls r2, r3, #4
8007de6: 6e7b ldr r3, [r7, #100] @ 0x64
8007de8: 4413 add r3, r2
8007dea: f203 4304 addw r3, r3, #1028 @ 0x404
8007dee: 663b str r3, [r7, #96] @ 0x60
8007df0: 6e3b ldr r3, [r7, #96] @ 0x60
8007df2: 2200 movs r2, #0
8007df4: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007df6: 68fb ldr r3, [r7, #12]
8007df8: 681b ldr r3, [r3, #0]
8007dfa: 677b str r3, [r7, #116] @ 0x74
8007dfc: 68bb ldr r3, [r7, #8]
8007dfe: 785b ldrb r3, [r3, #1]
8007e00: 2b00 cmp r3, #0
8007e02: d12b bne.n 8007e5c <HAL_PCD_EP_DB_Transmit+0x51e>
8007e04: 68fb ldr r3, [r7, #12]
8007e06: 681b ldr r3, [r3, #0]
8007e08: 66fb str r3, [r7, #108] @ 0x6c
8007e0a: 68fb ldr r3, [r7, #12]
8007e0c: 681b ldr r3, [r3, #0]
8007e0e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007e12: b29b uxth r3, r3
8007e14: 461a mov r2, r3
8007e16: 6efb ldr r3, [r7, #108] @ 0x6c
8007e18: 4413 add r3, r2
8007e1a: 66fb str r3, [r7, #108] @ 0x6c
8007e1c: 68bb ldr r3, [r7, #8]
8007e1e: 781b ldrb r3, [r3, #0]
8007e20: 011a lsls r2, r3, #4
8007e22: 6efb ldr r3, [r7, #108] @ 0x6c
8007e24: 4413 add r3, r2
8007e26: f203 430c addw r3, r3, #1036 @ 0x40c
8007e2a: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8007e2e: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007e32: 881b ldrh r3, [r3, #0]
8007e34: b29b uxth r3, r3
8007e36: f3c3 0309 ubfx r3, r3, #0, #10
8007e3a: b29a uxth r2, r3
8007e3c: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007e40: 801a strh r2, [r3, #0]
8007e42: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007e46: 881b ldrh r3, [r3, #0]
8007e48: b29b uxth r3, r3
8007e4a: ea6f 4343 mvn.w r3, r3, lsl #17
8007e4e: ea6f 4353 mvn.w r3, r3, lsr #17
8007e52: b29a uxth r2, r3
8007e54: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007e58: 801a strh r2, [r3, #0]
8007e5a: e017 b.n 8007e8c <HAL_PCD_EP_DB_Transmit+0x54e>
8007e5c: 68bb ldr r3, [r7, #8]
8007e5e: 785b ldrb r3, [r3, #1]
8007e60: 2b01 cmp r3, #1
8007e62: d113 bne.n 8007e8c <HAL_PCD_EP_DB_Transmit+0x54e>
8007e64: 68fb ldr r3, [r7, #12]
8007e66: 681b ldr r3, [r3, #0]
8007e68: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007e6c: b29b uxth r3, r3
8007e6e: 461a mov r2, r3
8007e70: 6f7b ldr r3, [r7, #116] @ 0x74
8007e72: 4413 add r3, r2
8007e74: 677b str r3, [r7, #116] @ 0x74
8007e76: 68bb ldr r3, [r7, #8]
8007e78: 781b ldrb r3, [r3, #0]
8007e7a: 011a lsls r2, r3, #4
8007e7c: 6f7b ldr r3, [r7, #116] @ 0x74
8007e7e: 4413 add r3, r2
8007e80: f203 430c addw r3, r3, #1036 @ 0x40c
8007e84: 673b str r3, [r7, #112] @ 0x70
8007e86: 6f3b ldr r3, [r7, #112] @ 0x70
8007e88: 2200 movs r2, #0
8007e8a: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007e8c: 68bb ldr r3, [r7, #8]
8007e8e: 781b ldrb r3, [r3, #0]
8007e90: 4619 mov r1, r3
8007e92: 68f8 ldr r0, [r7, #12]
8007e94: f006 f8af bl 800dff6 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8007e98: 88fb ldrh r3, [r7, #6]
8007e9a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007e9e: 2b00 cmp r3, #0
8007ea0: f040 811a bne.w 80080d8 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007ea4: 68fb ldr r3, [r7, #12]
8007ea6: 681b ldr r3, [r3, #0]
8007ea8: 461a mov r2, r3
8007eaa: 68bb ldr r3, [r7, #8]
8007eac: 781b ldrb r3, [r3, #0]
8007eae: 009b lsls r3, r3, #2
8007eb0: 4413 add r3, r2
8007eb2: 881b ldrh r3, [r3, #0]
8007eb4: b29b uxth r3, r3
8007eb6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007eba: f023 0370 bic.w r3, r3, #112 @ 0x70
8007ebe: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8007ec2: 68fb ldr r3, [r7, #12]
8007ec4: 681b ldr r3, [r3, #0]
8007ec6: 461a mov r2, r3
8007ec8: 68bb ldr r3, [r7, #8]
8007eca: 781b ldrb r3, [r3, #0]
8007ecc: 009b lsls r3, r3, #2
8007ece: 441a add r2, r3
8007ed0: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
8007ed4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007ed8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007edc: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007ee0: f043 0380 orr.w r3, r3, #128 @ 0x80
8007ee4: b29b uxth r3, r3
8007ee6: 8013 strh r3, [r2, #0]
8007ee8: e0f6 b.n 80080d8 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8007eea: 88fb ldrh r3, [r7, #6]
8007eec: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007ef0: 2b00 cmp r3, #0
8007ef2: d121 bne.n 8007f38 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007ef4: 68fb ldr r3, [r7, #12]
8007ef6: 681b ldr r3, [r3, #0]
8007ef8: 461a mov r2, r3
8007efa: 68bb ldr r3, [r7, #8]
8007efc: 781b ldrb r3, [r3, #0]
8007efe: 009b lsls r3, r3, #2
8007f00: 4413 add r3, r2
8007f02: 881b ldrh r3, [r3, #0]
8007f04: b29b uxth r3, r3
8007f06: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007f0a: f023 0370 bic.w r3, r3, #112 @ 0x70
8007f0e: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8007f12: 68fb ldr r3, [r7, #12]
8007f14: 681b ldr r3, [r3, #0]
8007f16: 461a mov r2, r3
8007f18: 68bb ldr r3, [r7, #8]
8007f1a: 781b ldrb r3, [r3, #0]
8007f1c: 009b lsls r3, r3, #2
8007f1e: 441a add r2, r3
8007f20: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8007f24: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007f28: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007f2c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007f30: f043 0380 orr.w r3, r3, #128 @ 0x80
8007f34: b29b uxth r3, r3
8007f36: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8007f38: 68bb ldr r3, [r7, #8]
8007f3a: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8007f3e: 2b01 cmp r3, #1
8007f40: f040 80ca bne.w 80080d8 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8007f44: 68bb ldr r3, [r7, #8]
8007f46: 695a ldr r2, [r3, #20]
8007f48: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007f4c: 441a add r2, r3
8007f4e: 68bb ldr r3, [r7, #8]
8007f50: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007f52: 68bb ldr r3, [r7, #8]
8007f54: 69da ldr r2, [r3, #28]
8007f56: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007f5a: 441a add r2, r3
8007f5c: 68bb ldr r3, [r7, #8]
8007f5e: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007f60: 68bb ldr r3, [r7, #8]
8007f62: 6a1a ldr r2, [r3, #32]
8007f64: 68bb ldr r3, [r7, #8]
8007f66: 691b ldr r3, [r3, #16]
8007f68: 429a cmp r2, r3
8007f6a: d30b bcc.n 8007f84 <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
8007f6c: 68bb ldr r3, [r7, #8]
8007f6e: 691b ldr r3, [r3, #16]
8007f70: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007f74: 68bb ldr r3, [r7, #8]
8007f76: 6a1a ldr r2, [r3, #32]
8007f78: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007f7c: 1ad2 subs r2, r2, r3
8007f7e: 68bb ldr r3, [r7, #8]
8007f80: 621a str r2, [r3, #32]
8007f82: e017 b.n 8007fb4 <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
8007f84: 68bb ldr r3, [r7, #8]
8007f86: 6a1b ldr r3, [r3, #32]
8007f88: 2b00 cmp r3, #0
8007f8a: d108 bne.n 8007f9e <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
8007f8c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007f90: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007f94: 68bb ldr r3, [r7, #8]
8007f96: 2200 movs r2, #0
8007f98: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007f9c: e00a b.n 8007fb4 <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
8007f9e: 68bb ldr r3, [r7, #8]
8007fa0: 6a1b ldr r3, [r3, #32]
8007fa2: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007fa6: 68bb ldr r3, [r7, #8]
8007fa8: 2200 movs r2, #0
8007faa: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8007fac: 68bb ldr r3, [r7, #8]
8007fae: 2200 movs r2, #0
8007fb0: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007fb4: 68fb ldr r3, [r7, #12]
8007fb6: 681b ldr r3, [r3, #0]
8007fb8: 657b str r3, [r7, #84] @ 0x54
8007fba: 68bb ldr r3, [r7, #8]
8007fbc: 785b ldrb r3, [r3, #1]
8007fbe: 2b00 cmp r3, #0
8007fc0: d165 bne.n 800808e <HAL_PCD_EP_DB_Transmit+0x750>
8007fc2: 68fb ldr r3, [r7, #12]
8007fc4: 681b ldr r3, [r3, #0]
8007fc6: 65fb str r3, [r7, #92] @ 0x5c
8007fc8: 68fb ldr r3, [r7, #12]
8007fca: 681b ldr r3, [r3, #0]
8007fcc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007fd0: b29b uxth r3, r3
8007fd2: 461a mov r2, r3
8007fd4: 6dfb ldr r3, [r7, #92] @ 0x5c
8007fd6: 4413 add r3, r2
8007fd8: 65fb str r3, [r7, #92] @ 0x5c
8007fda: 68bb ldr r3, [r7, #8]
8007fdc: 781b ldrb r3, [r3, #0]
8007fde: 011a lsls r2, r3, #4
8007fe0: 6dfb ldr r3, [r7, #92] @ 0x5c
8007fe2: 4413 add r3, r2
8007fe4: f203 430c addw r3, r3, #1036 @ 0x40c
8007fe8: 65bb str r3, [r7, #88] @ 0x58
8007fea: 6dbb ldr r3, [r7, #88] @ 0x58
8007fec: 881b ldrh r3, [r3, #0]
8007fee: b29b uxth r3, r3
8007ff0: f3c3 0309 ubfx r3, r3, #0, #10
8007ff4: b29a uxth r2, r3
8007ff6: 6dbb ldr r3, [r7, #88] @ 0x58
8007ff8: 801a strh r2, [r3, #0]
8007ffa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007ffe: 2b3e cmp r3, #62 @ 0x3e
8008000: d91d bls.n 800803e <HAL_PCD_EP_DB_Transmit+0x700>
8008002: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8008006: 095b lsrs r3, r3, #5
8008008: 66bb str r3, [r7, #104] @ 0x68
800800a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800800e: f003 031f and.w r3, r3, #31
8008012: 2b00 cmp r3, #0
8008014: d102 bne.n 800801c <HAL_PCD_EP_DB_Transmit+0x6de>
8008016: 6ebb ldr r3, [r7, #104] @ 0x68
8008018: 3b01 subs r3, #1
800801a: 66bb str r3, [r7, #104] @ 0x68
800801c: 6dbb ldr r3, [r7, #88] @ 0x58
800801e: 881b ldrh r3, [r3, #0]
8008020: b29a uxth r2, r3
8008022: 6ebb ldr r3, [r7, #104] @ 0x68
8008024: b29b uxth r3, r3
8008026: 029b lsls r3, r3, #10
8008028: b29b uxth r3, r3
800802a: 4313 orrs r3, r2
800802c: b29b uxth r3, r3
800802e: ea6f 4343 mvn.w r3, r3, lsl #17
8008032: ea6f 4353 mvn.w r3, r3, lsr #17
8008036: b29a uxth r2, r3
8008038: 6dbb ldr r3, [r7, #88] @ 0x58
800803a: 801a strh r2, [r3, #0]
800803c: e041 b.n 80080c2 <HAL_PCD_EP_DB_Transmit+0x784>
800803e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8008042: 2b00 cmp r3, #0
8008044: d10a bne.n 800805c <HAL_PCD_EP_DB_Transmit+0x71e>
8008046: 6dbb ldr r3, [r7, #88] @ 0x58
8008048: 881b ldrh r3, [r3, #0]
800804a: b29b uxth r3, r3
800804c: ea6f 4343 mvn.w r3, r3, lsl #17
8008050: ea6f 4353 mvn.w r3, r3, lsr #17
8008054: b29a uxth r2, r3
8008056: 6dbb ldr r3, [r7, #88] @ 0x58
8008058: 801a strh r2, [r3, #0]
800805a: e032 b.n 80080c2 <HAL_PCD_EP_DB_Transmit+0x784>
800805c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8008060: 085b lsrs r3, r3, #1
8008062: 66bb str r3, [r7, #104] @ 0x68
8008064: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8008068: f003 0301 and.w r3, r3, #1
800806c: 2b00 cmp r3, #0
800806e: d002 beq.n 8008076 <HAL_PCD_EP_DB_Transmit+0x738>
8008070: 6ebb ldr r3, [r7, #104] @ 0x68
8008072: 3301 adds r3, #1
8008074: 66bb str r3, [r7, #104] @ 0x68
8008076: 6dbb ldr r3, [r7, #88] @ 0x58
8008078: 881b ldrh r3, [r3, #0]
800807a: b29a uxth r2, r3
800807c: 6ebb ldr r3, [r7, #104] @ 0x68
800807e: b29b uxth r3, r3
8008080: 029b lsls r3, r3, #10
8008082: b29b uxth r3, r3
8008084: 4313 orrs r3, r2
8008086: b29a uxth r2, r3
8008088: 6dbb ldr r3, [r7, #88] @ 0x58
800808a: 801a strh r2, [r3, #0]
800808c: e019 b.n 80080c2 <HAL_PCD_EP_DB_Transmit+0x784>
800808e: 68bb ldr r3, [r7, #8]
8008090: 785b ldrb r3, [r3, #1]
8008092: 2b01 cmp r3, #1
8008094: d115 bne.n 80080c2 <HAL_PCD_EP_DB_Transmit+0x784>
8008096: 68fb ldr r3, [r7, #12]
8008098: 681b ldr r3, [r3, #0]
800809a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800809e: b29b uxth r3, r3
80080a0: 461a mov r2, r3
80080a2: 6d7b ldr r3, [r7, #84] @ 0x54
80080a4: 4413 add r3, r2
80080a6: 657b str r3, [r7, #84] @ 0x54
80080a8: 68bb ldr r3, [r7, #8]
80080aa: 781b ldrb r3, [r3, #0]
80080ac: 011a lsls r2, r3, #4
80080ae: 6d7b ldr r3, [r7, #84] @ 0x54
80080b0: 4413 add r3, r2
80080b2: f203 430c addw r3, r3, #1036 @ 0x40c
80080b6: 653b str r3, [r7, #80] @ 0x50
80080b8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80080bc: b29a uxth r2, r3
80080be: 6d3b ldr r3, [r7, #80] @ 0x50
80080c0: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
80080c2: 68fb ldr r3, [r7, #12]
80080c4: 6818 ldr r0, [r3, #0]
80080c6: 68bb ldr r3, [r7, #8]
80080c8: 6959 ldr r1, [r3, #20]
80080ca: 68bb ldr r3, [r7, #8]
80080cc: 895a ldrh r2, [r3, #10]
80080ce: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80080d2: b29b uxth r3, r3
80080d4: f004 f8cb bl 800c26e <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
80080d8: 68fb ldr r3, [r7, #12]
80080da: 681b ldr r3, [r3, #0]
80080dc: 461a mov r2, r3
80080de: 68bb ldr r3, [r7, #8]
80080e0: 781b ldrb r3, [r3, #0]
80080e2: 009b lsls r3, r3, #2
80080e4: 4413 add r3, r2
80080e6: 881b ldrh r3, [r3, #0]
80080e8: b29b uxth r3, r3
80080ea: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80080ee: f023 0340 bic.w r3, r3, #64 @ 0x40
80080f2: 82bb strh r3, [r7, #20]
80080f4: 8abb ldrh r3, [r7, #20]
80080f6: f083 0310 eor.w r3, r3, #16
80080fa: 82bb strh r3, [r7, #20]
80080fc: 8abb ldrh r3, [r7, #20]
80080fe: f083 0320 eor.w r3, r3, #32
8008102: 82bb strh r3, [r7, #20]
8008104: 68fb ldr r3, [r7, #12]
8008106: 681b ldr r3, [r3, #0]
8008108: 461a mov r2, r3
800810a: 68bb ldr r3, [r7, #8]
800810c: 781b ldrb r3, [r3, #0]
800810e: 009b lsls r3, r3, #2
8008110: 441a add r2, r3
8008112: 8abb ldrh r3, [r7, #20]
8008114: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008118: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800811c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008120: f043 0380 orr.w r3, r3, #128 @ 0x80
8008124: b29b uxth r3, r3
8008126: 8013 strh r3, [r2, #0]
return HAL_OK;
8008128: 2300 movs r3, #0
}
800812a: 4618 mov r0, r3
800812c: 3790 adds r7, #144 @ 0x90
800812e: 46bd mov sp, r7
8008130: bd80 pop {r7, pc}
08008132 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
8008132: b480 push {r7}
8008134: b087 sub sp, #28
8008136: af00 add r7, sp, #0
8008138: 60f8 str r0, [r7, #12]
800813a: 607b str r3, [r7, #4]
800813c: 460b mov r3, r1
800813e: 817b strh r3, [r7, #10]
8008140: 4613 mov r3, r2
8008142: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8008144: 897b ldrh r3, [r7, #10]
8008146: f003 0380 and.w r3, r3, #128 @ 0x80
800814a: b29b uxth r3, r3
800814c: 2b00 cmp r3, #0
800814e: d00b beq.n 8008168 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8008150: 897b ldrh r3, [r7, #10]
8008152: f003 0207 and.w r2, r3, #7
8008156: 4613 mov r3, r2
8008158: 009b lsls r3, r3, #2
800815a: 4413 add r3, r2
800815c: 00db lsls r3, r3, #3
800815e: 3310 adds r3, #16
8008160: 68fa ldr r2, [r7, #12]
8008162: 4413 add r3, r2
8008164: 617b str r3, [r7, #20]
8008166: e009 b.n 800817c <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8008168: 897a ldrh r2, [r7, #10]
800816a: 4613 mov r3, r2
800816c: 009b lsls r3, r3, #2
800816e: 4413 add r3, r2
8008170: 00db lsls r3, r3, #3
8008172: f503 73a8 add.w r3, r3, #336 @ 0x150
8008176: 68fa ldr r2, [r7, #12]
8008178: 4413 add r3, r2
800817a: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
800817c: 893b ldrh r3, [r7, #8]
800817e: 2b00 cmp r3, #0
8008180: d107 bne.n 8008192 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8008182: 697b ldr r3, [r7, #20]
8008184: 2200 movs r2, #0
8008186: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8008188: 687b ldr r3, [r7, #4]
800818a: b29a uxth r2, r3
800818c: 697b ldr r3, [r7, #20]
800818e: 80da strh r2, [r3, #6]
8008190: e00b b.n 80081aa <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8008192: 697b ldr r3, [r7, #20]
8008194: 2201 movs r2, #1
8008196: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8008198: 687b ldr r3, [r7, #4]
800819a: b29a uxth r2, r3
800819c: 697b ldr r3, [r7, #20]
800819e: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
80081a0: 687b ldr r3, [r7, #4]
80081a2: 0c1b lsrs r3, r3, #16
80081a4: b29a uxth r2, r3
80081a6: 697b ldr r3, [r7, #20]
80081a8: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
80081aa: 2300 movs r3, #0
}
80081ac: 4618 mov r0, r3
80081ae: 371c adds r7, #28
80081b0: 46bd mov sp, r7
80081b2: bc80 pop {r7}
80081b4: 4770 bx lr
...
080081b8 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
80081b8: b580 push {r7, lr}
80081ba: b086 sub sp, #24
80081bc: af00 add r7, sp, #0
80081be: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
80081c0: 687b ldr r3, [r7, #4]
80081c2: 2b00 cmp r3, #0
80081c4: d101 bne.n 80081ca <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
80081c6: 2301 movs r3, #1
80081c8: e272 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
80081ca: 687b ldr r3, [r7, #4]
80081cc: 681b ldr r3, [r3, #0]
80081ce: f003 0301 and.w r3, r3, #1
80081d2: 2b00 cmp r3, #0
80081d4: f000 8087 beq.w 80082e6 <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
80081d8: 4b92 ldr r3, [pc, #584] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
80081da: 685b ldr r3, [r3, #4]
80081dc: f003 030c and.w r3, r3, #12
80081e0: 2b04 cmp r3, #4
80081e2: d00c beq.n 80081fe <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
80081e4: 4b8f ldr r3, [pc, #572] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
80081e6: 685b ldr r3, [r3, #4]
80081e8: f003 030c and.w r3, r3, #12
80081ec: 2b08 cmp r3, #8
80081ee: d112 bne.n 8008216 <HAL_RCC_OscConfig+0x5e>
80081f0: 4b8c ldr r3, [pc, #560] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
80081f2: 685b ldr r3, [r3, #4]
80081f4: f403 3380 and.w r3, r3, #65536 @ 0x10000
80081f8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80081fc: d10b bne.n 8008216 <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80081fe: 4b89 ldr r3, [pc, #548] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008200: 681b ldr r3, [r3, #0]
8008202: f403 3300 and.w r3, r3, #131072 @ 0x20000
8008206: 2b00 cmp r3, #0
8008208: d06c beq.n 80082e4 <HAL_RCC_OscConfig+0x12c>
800820a: 687b ldr r3, [r7, #4]
800820c: 685b ldr r3, [r3, #4]
800820e: 2b00 cmp r3, #0
8008210: d168 bne.n 80082e4 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
8008212: 2301 movs r3, #1
8008214: e24c b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8008216: 687b ldr r3, [r7, #4]
8008218: 685b ldr r3, [r3, #4]
800821a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800821e: d106 bne.n 800822e <HAL_RCC_OscConfig+0x76>
8008220: 4b80 ldr r3, [pc, #512] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008222: 681b ldr r3, [r3, #0]
8008224: 4a7f ldr r2, [pc, #508] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008226: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800822a: 6013 str r3, [r2, #0]
800822c: e02e b.n 800828c <HAL_RCC_OscConfig+0xd4>
800822e: 687b ldr r3, [r7, #4]
8008230: 685b ldr r3, [r3, #4]
8008232: 2b00 cmp r3, #0
8008234: d10c bne.n 8008250 <HAL_RCC_OscConfig+0x98>
8008236: 4b7b ldr r3, [pc, #492] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008238: 681b ldr r3, [r3, #0]
800823a: 4a7a ldr r2, [pc, #488] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
800823c: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8008240: 6013 str r3, [r2, #0]
8008242: 4b78 ldr r3, [pc, #480] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008244: 681b ldr r3, [r3, #0]
8008246: 4a77 ldr r2, [pc, #476] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008248: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800824c: 6013 str r3, [r2, #0]
800824e: e01d b.n 800828c <HAL_RCC_OscConfig+0xd4>
8008250: 687b ldr r3, [r7, #4]
8008252: 685b ldr r3, [r3, #4]
8008254: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
8008258: d10c bne.n 8008274 <HAL_RCC_OscConfig+0xbc>
800825a: 4b72 ldr r3, [pc, #456] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
800825c: 681b ldr r3, [r3, #0]
800825e: 4a71 ldr r2, [pc, #452] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008260: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8008264: 6013 str r3, [r2, #0]
8008266: 4b6f ldr r3, [pc, #444] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008268: 681b ldr r3, [r3, #0]
800826a: 4a6e ldr r2, [pc, #440] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
800826c: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8008270: 6013 str r3, [r2, #0]
8008272: e00b b.n 800828c <HAL_RCC_OscConfig+0xd4>
8008274: 4b6b ldr r3, [pc, #428] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008276: 681b ldr r3, [r3, #0]
8008278: 4a6a ldr r2, [pc, #424] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
800827a: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800827e: 6013 str r3, [r2, #0]
8008280: 4b68 ldr r3, [pc, #416] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008282: 681b ldr r3, [r3, #0]
8008284: 4a67 ldr r2, [pc, #412] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008286: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800828a: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
800828c: 687b ldr r3, [r7, #4]
800828e: 685b ldr r3, [r3, #4]
8008290: 2b00 cmp r3, #0
8008292: d013 beq.n 80082bc <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008294: f7fc ffa4 bl 80051e0 <HAL_GetTick>
8008298: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800829a: e008 b.n 80082ae <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
800829c: f7fc ffa0 bl 80051e0 <HAL_GetTick>
80082a0: 4602 mov r2, r0
80082a2: 693b ldr r3, [r7, #16]
80082a4: 1ad3 subs r3, r2, r3
80082a6: 2b64 cmp r3, #100 @ 0x64
80082a8: d901 bls.n 80082ae <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
80082aa: 2303 movs r3, #3
80082ac: e200 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80082ae: 4b5d ldr r3, [pc, #372] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
80082b0: 681b ldr r3, [r3, #0]
80082b2: f403 3300 and.w r3, r3, #131072 @ 0x20000
80082b6: 2b00 cmp r3, #0
80082b8: d0f0 beq.n 800829c <HAL_RCC_OscConfig+0xe4>
80082ba: e014 b.n 80082e6 <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80082bc: f7fc ff90 bl 80051e0 <HAL_GetTick>
80082c0: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80082c2: e008 b.n 80082d6 <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
80082c4: f7fc ff8c bl 80051e0 <HAL_GetTick>
80082c8: 4602 mov r2, r0
80082ca: 693b ldr r3, [r7, #16]
80082cc: 1ad3 subs r3, r2, r3
80082ce: 2b64 cmp r3, #100 @ 0x64
80082d0: d901 bls.n 80082d6 <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
80082d2: 2303 movs r3, #3
80082d4: e1ec b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80082d6: 4b53 ldr r3, [pc, #332] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
80082d8: 681b ldr r3, [r3, #0]
80082da: f403 3300 and.w r3, r3, #131072 @ 0x20000
80082de: 2b00 cmp r3, #0
80082e0: d1f0 bne.n 80082c4 <HAL_RCC_OscConfig+0x10c>
80082e2: e000 b.n 80082e6 <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80082e4: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
80082e6: 687b ldr r3, [r7, #4]
80082e8: 681b ldr r3, [r3, #0]
80082ea: f003 0302 and.w r3, r3, #2
80082ee: 2b00 cmp r3, #0
80082f0: d063 beq.n 80083ba <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
80082f2: 4b4c ldr r3, [pc, #304] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
80082f4: 685b ldr r3, [r3, #4]
80082f6: f003 030c and.w r3, r3, #12
80082fa: 2b00 cmp r3, #0
80082fc: d00b beq.n 8008316 <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
80082fe: 4b49 ldr r3, [pc, #292] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008300: 685b ldr r3, [r3, #4]
8008302: f003 030c and.w r3, r3, #12
8008306: 2b08 cmp r3, #8
8008308: d11c bne.n 8008344 <HAL_RCC_OscConfig+0x18c>
800830a: 4b46 ldr r3, [pc, #280] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
800830c: 685b ldr r3, [r3, #4]
800830e: f403 3380 and.w r3, r3, #65536 @ 0x10000
8008312: 2b00 cmp r3, #0
8008314: d116 bne.n 8008344 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8008316: 4b43 ldr r3, [pc, #268] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008318: 681b ldr r3, [r3, #0]
800831a: f003 0302 and.w r3, r3, #2
800831e: 2b00 cmp r3, #0
8008320: d005 beq.n 800832e <HAL_RCC_OscConfig+0x176>
8008322: 687b ldr r3, [r7, #4]
8008324: 691b ldr r3, [r3, #16]
8008326: 2b01 cmp r3, #1
8008328: d001 beq.n 800832e <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
800832a: 2301 movs r3, #1
800832c: e1c0 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800832e: 4b3d ldr r3, [pc, #244] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008330: 681b ldr r3, [r3, #0]
8008332: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8008336: 687b ldr r3, [r7, #4]
8008338: 695b ldr r3, [r3, #20]
800833a: 00db lsls r3, r3, #3
800833c: 4939 ldr r1, [pc, #228] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
800833e: 4313 orrs r3, r2
8008340: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8008342: e03a b.n 80083ba <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8008344: 687b ldr r3, [r7, #4]
8008346: 691b ldr r3, [r3, #16]
8008348: 2b00 cmp r3, #0
800834a: d020 beq.n 800838e <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
800834c: 4b36 ldr r3, [pc, #216] @ (8008428 <HAL_RCC_OscConfig+0x270>)
800834e: 2201 movs r2, #1
8008350: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008352: f7fc ff45 bl 80051e0 <HAL_GetTick>
8008356: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8008358: e008 b.n 800836c <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800835a: f7fc ff41 bl 80051e0 <HAL_GetTick>
800835e: 4602 mov r2, r0
8008360: 693b ldr r3, [r7, #16]
8008362: 1ad3 subs r3, r2, r3
8008364: 2b02 cmp r3, #2
8008366: d901 bls.n 800836c <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
8008368: 2303 movs r3, #3
800836a: e1a1 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800836c: 4b2d ldr r3, [pc, #180] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
800836e: 681b ldr r3, [r3, #0]
8008370: f003 0302 and.w r3, r3, #2
8008374: 2b00 cmp r3, #0
8008376: d0f0 beq.n 800835a <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8008378: 4b2a ldr r3, [pc, #168] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
800837a: 681b ldr r3, [r3, #0]
800837c: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8008380: 687b ldr r3, [r7, #4]
8008382: 695b ldr r3, [r3, #20]
8008384: 00db lsls r3, r3, #3
8008386: 4927 ldr r1, [pc, #156] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
8008388: 4313 orrs r3, r2
800838a: 600b str r3, [r1, #0]
800838c: e015 b.n 80083ba <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
800838e: 4b26 ldr r3, [pc, #152] @ (8008428 <HAL_RCC_OscConfig+0x270>)
8008390: 2200 movs r2, #0
8008392: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008394: f7fc ff24 bl 80051e0 <HAL_GetTick>
8008398: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800839a: e008 b.n 80083ae <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800839c: f7fc ff20 bl 80051e0 <HAL_GetTick>
80083a0: 4602 mov r2, r0
80083a2: 693b ldr r3, [r7, #16]
80083a4: 1ad3 subs r3, r2, r3
80083a6: 2b02 cmp r3, #2
80083a8: d901 bls.n 80083ae <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
80083aa: 2303 movs r3, #3
80083ac: e180 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
80083ae: 4b1d ldr r3, [pc, #116] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
80083b0: 681b ldr r3, [r3, #0]
80083b2: f003 0302 and.w r3, r3, #2
80083b6: 2b00 cmp r3, #0
80083b8: d1f0 bne.n 800839c <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
80083ba: 687b ldr r3, [r7, #4]
80083bc: 681b ldr r3, [r3, #0]
80083be: f003 0308 and.w r3, r3, #8
80083c2: 2b00 cmp r3, #0
80083c4: d03a beq.n 800843c <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
80083c6: 687b ldr r3, [r7, #4]
80083c8: 699b ldr r3, [r3, #24]
80083ca: 2b00 cmp r3, #0
80083cc: d019 beq.n 8008402 <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
80083ce: 4b17 ldr r3, [pc, #92] @ (800842c <HAL_RCC_OscConfig+0x274>)
80083d0: 2201 movs r2, #1
80083d2: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80083d4: f7fc ff04 bl 80051e0 <HAL_GetTick>
80083d8: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80083da: e008 b.n 80083ee <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80083dc: f7fc ff00 bl 80051e0 <HAL_GetTick>
80083e0: 4602 mov r2, r0
80083e2: 693b ldr r3, [r7, #16]
80083e4: 1ad3 subs r3, r2, r3
80083e6: 2b02 cmp r3, #2
80083e8: d901 bls.n 80083ee <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
80083ea: 2303 movs r3, #3
80083ec: e160 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80083ee: 4b0d ldr r3, [pc, #52] @ (8008424 <HAL_RCC_OscConfig+0x26c>)
80083f0: 6a5b ldr r3, [r3, #36] @ 0x24
80083f2: f003 0302 and.w r3, r3, #2
80083f6: 2b00 cmp r3, #0
80083f8: d0f0 beq.n 80083dc <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
80083fa: 2001 movs r0, #1
80083fc: f000 fad0 bl 80089a0 <RCC_Delay>
8008400: e01c b.n 800843c <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8008402: 4b0a ldr r3, [pc, #40] @ (800842c <HAL_RCC_OscConfig+0x274>)
8008404: 2200 movs r2, #0
8008406: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008408: f7fc feea bl 80051e0 <HAL_GetTick>
800840c: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
800840e: e00f b.n 8008430 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8008410: f7fc fee6 bl 80051e0 <HAL_GetTick>
8008414: 4602 mov r2, r0
8008416: 693b ldr r3, [r7, #16]
8008418: 1ad3 subs r3, r2, r3
800841a: 2b02 cmp r3, #2
800841c: d908 bls.n 8008430 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
800841e: 2303 movs r3, #3
8008420: e146 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
8008422: bf00 nop
8008424: 40021000 .word 0x40021000
8008428: 42420000 .word 0x42420000
800842c: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8008430: 4b92 ldr r3, [pc, #584] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008432: 6a5b ldr r3, [r3, #36] @ 0x24
8008434: f003 0302 and.w r3, r3, #2
8008438: 2b00 cmp r3, #0
800843a: d1e9 bne.n 8008410 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
800843c: 687b ldr r3, [r7, #4]
800843e: 681b ldr r3, [r3, #0]
8008440: f003 0304 and.w r3, r3, #4
8008444: 2b00 cmp r3, #0
8008446: f000 80a6 beq.w 8008596 <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
800844a: 2300 movs r3, #0
800844c: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
800844e: 4b8b ldr r3, [pc, #556] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008450: 69db ldr r3, [r3, #28]
8008452: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8008456: 2b00 cmp r3, #0
8008458: d10d bne.n 8008476 <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
800845a: 4b88 ldr r3, [pc, #544] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
800845c: 69db ldr r3, [r3, #28]
800845e: 4a87 ldr r2, [pc, #540] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008460: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8008464: 61d3 str r3, [r2, #28]
8008466: 4b85 ldr r3, [pc, #532] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008468: 69db ldr r3, [r3, #28]
800846a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800846e: 60bb str r3, [r7, #8]
8008470: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8008472: 2301 movs r3, #1
8008474: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008476: 4b82 ldr r3, [pc, #520] @ (8008680 <HAL_RCC_OscConfig+0x4c8>)
8008478: 681b ldr r3, [r3, #0]
800847a: f403 7380 and.w r3, r3, #256 @ 0x100
800847e: 2b00 cmp r3, #0
8008480: d118 bne.n 80084b4 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8008482: 4b7f ldr r3, [pc, #508] @ (8008680 <HAL_RCC_OscConfig+0x4c8>)
8008484: 681b ldr r3, [r3, #0]
8008486: 4a7e ldr r2, [pc, #504] @ (8008680 <HAL_RCC_OscConfig+0x4c8>)
8008488: f443 7380 orr.w r3, r3, #256 @ 0x100
800848c: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800848e: f7fc fea7 bl 80051e0 <HAL_GetTick>
8008492: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008494: e008 b.n 80084a8 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8008496: f7fc fea3 bl 80051e0 <HAL_GetTick>
800849a: 4602 mov r2, r0
800849c: 693b ldr r3, [r7, #16]
800849e: 1ad3 subs r3, r2, r3
80084a0: 2b64 cmp r3, #100 @ 0x64
80084a2: d901 bls.n 80084a8 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
80084a4: 2303 movs r3, #3
80084a6: e103 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80084a8: 4b75 ldr r3, [pc, #468] @ (8008680 <HAL_RCC_OscConfig+0x4c8>)
80084aa: 681b ldr r3, [r3, #0]
80084ac: f403 7380 and.w r3, r3, #256 @ 0x100
80084b0: 2b00 cmp r3, #0
80084b2: d0f0 beq.n 8008496 <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
80084b4: 687b ldr r3, [r7, #4]
80084b6: 68db ldr r3, [r3, #12]
80084b8: 2b01 cmp r3, #1
80084ba: d106 bne.n 80084ca <HAL_RCC_OscConfig+0x312>
80084bc: 4b6f ldr r3, [pc, #444] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80084be: 6a1b ldr r3, [r3, #32]
80084c0: 4a6e ldr r2, [pc, #440] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80084c2: f043 0301 orr.w r3, r3, #1
80084c6: 6213 str r3, [r2, #32]
80084c8: e02d b.n 8008526 <HAL_RCC_OscConfig+0x36e>
80084ca: 687b ldr r3, [r7, #4]
80084cc: 68db ldr r3, [r3, #12]
80084ce: 2b00 cmp r3, #0
80084d0: d10c bne.n 80084ec <HAL_RCC_OscConfig+0x334>
80084d2: 4b6a ldr r3, [pc, #424] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80084d4: 6a1b ldr r3, [r3, #32]
80084d6: 4a69 ldr r2, [pc, #420] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80084d8: f023 0301 bic.w r3, r3, #1
80084dc: 6213 str r3, [r2, #32]
80084de: 4b67 ldr r3, [pc, #412] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80084e0: 6a1b ldr r3, [r3, #32]
80084e2: 4a66 ldr r2, [pc, #408] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80084e4: f023 0304 bic.w r3, r3, #4
80084e8: 6213 str r3, [r2, #32]
80084ea: e01c b.n 8008526 <HAL_RCC_OscConfig+0x36e>
80084ec: 687b ldr r3, [r7, #4]
80084ee: 68db ldr r3, [r3, #12]
80084f0: 2b05 cmp r3, #5
80084f2: d10c bne.n 800850e <HAL_RCC_OscConfig+0x356>
80084f4: 4b61 ldr r3, [pc, #388] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80084f6: 6a1b ldr r3, [r3, #32]
80084f8: 4a60 ldr r2, [pc, #384] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80084fa: f043 0304 orr.w r3, r3, #4
80084fe: 6213 str r3, [r2, #32]
8008500: 4b5e ldr r3, [pc, #376] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008502: 6a1b ldr r3, [r3, #32]
8008504: 4a5d ldr r2, [pc, #372] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008506: f043 0301 orr.w r3, r3, #1
800850a: 6213 str r3, [r2, #32]
800850c: e00b b.n 8008526 <HAL_RCC_OscConfig+0x36e>
800850e: 4b5b ldr r3, [pc, #364] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008510: 6a1b ldr r3, [r3, #32]
8008512: 4a5a ldr r2, [pc, #360] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008514: f023 0301 bic.w r3, r3, #1
8008518: 6213 str r3, [r2, #32]
800851a: 4b58 ldr r3, [pc, #352] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
800851c: 6a1b ldr r3, [r3, #32]
800851e: 4a57 ldr r2, [pc, #348] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008520: f023 0304 bic.w r3, r3, #4
8008524: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8008526: 687b ldr r3, [r7, #4]
8008528: 68db ldr r3, [r3, #12]
800852a: 2b00 cmp r3, #0
800852c: d015 beq.n 800855a <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800852e: f7fc fe57 bl 80051e0 <HAL_GetTick>
8008532: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008534: e00a b.n 800854c <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8008536: f7fc fe53 bl 80051e0 <HAL_GetTick>
800853a: 4602 mov r2, r0
800853c: 693b ldr r3, [r7, #16]
800853e: 1ad3 subs r3, r2, r3
8008540: f241 3288 movw r2, #5000 @ 0x1388
8008544: 4293 cmp r3, r2
8008546: d901 bls.n 800854c <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8008548: 2303 movs r3, #3
800854a: e0b1 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800854c: 4b4b ldr r3, [pc, #300] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
800854e: 6a1b ldr r3, [r3, #32]
8008550: f003 0302 and.w r3, r3, #2
8008554: 2b00 cmp r3, #0
8008556: d0ee beq.n 8008536 <HAL_RCC_OscConfig+0x37e>
8008558: e014 b.n 8008584 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800855a: f7fc fe41 bl 80051e0 <HAL_GetTick>
800855e: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8008560: e00a b.n 8008578 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8008562: f7fc fe3d bl 80051e0 <HAL_GetTick>
8008566: 4602 mov r2, r0
8008568: 693b ldr r3, [r7, #16]
800856a: 1ad3 subs r3, r2, r3
800856c: f241 3288 movw r2, #5000 @ 0x1388
8008570: 4293 cmp r3, r2
8008572: d901 bls.n 8008578 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8008574: 2303 movs r3, #3
8008576: e09b b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8008578: 4b40 ldr r3, [pc, #256] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
800857a: 6a1b ldr r3, [r3, #32]
800857c: f003 0302 and.w r3, r3, #2
8008580: 2b00 cmp r3, #0
8008582: d1ee bne.n 8008562 <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8008584: 7dfb ldrb r3, [r7, #23]
8008586: 2b01 cmp r3, #1
8008588: d105 bne.n 8008596 <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
800858a: 4b3c ldr r3, [pc, #240] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
800858c: 69db ldr r3, [r3, #28]
800858e: 4a3b ldr r2, [pc, #236] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008590: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8008594: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8008596: 687b ldr r3, [r7, #4]
8008598: 69db ldr r3, [r3, #28]
800859a: 2b00 cmp r3, #0
800859c: f000 8087 beq.w 80086ae <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
80085a0: 4b36 ldr r3, [pc, #216] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80085a2: 685b ldr r3, [r3, #4]
80085a4: f003 030c and.w r3, r3, #12
80085a8: 2b08 cmp r3, #8
80085aa: d061 beq.n 8008670 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
80085ac: 687b ldr r3, [r7, #4]
80085ae: 69db ldr r3, [r3, #28]
80085b0: 2b02 cmp r3, #2
80085b2: d146 bne.n 8008642 <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80085b4: 4b33 ldr r3, [pc, #204] @ (8008684 <HAL_RCC_OscConfig+0x4cc>)
80085b6: 2200 movs r2, #0
80085b8: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80085ba: f7fc fe11 bl 80051e0 <HAL_GetTick>
80085be: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80085c0: e008 b.n 80085d4 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80085c2: f7fc fe0d bl 80051e0 <HAL_GetTick>
80085c6: 4602 mov r2, r0
80085c8: 693b ldr r3, [r7, #16]
80085ca: 1ad3 subs r3, r2, r3
80085cc: 2b02 cmp r3, #2
80085ce: d901 bls.n 80085d4 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
80085d0: 2303 movs r3, #3
80085d2: e06d b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80085d4: 4b29 ldr r3, [pc, #164] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80085d6: 681b ldr r3, [r3, #0]
80085d8: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80085dc: 2b00 cmp r3, #0
80085de: d1f0 bne.n 80085c2 <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
80085e0: 687b ldr r3, [r7, #4]
80085e2: 6a1b ldr r3, [r3, #32]
80085e4: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80085e8: d108 bne.n 80085fc <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
80085ea: 4b24 ldr r3, [pc, #144] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80085ec: 685b ldr r3, [r3, #4]
80085ee: f423 3200 bic.w r2, r3, #131072 @ 0x20000
80085f2: 687b ldr r3, [r7, #4]
80085f4: 689b ldr r3, [r3, #8]
80085f6: 4921 ldr r1, [pc, #132] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80085f8: 4313 orrs r3, r2
80085fa: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
80085fc: 4b1f ldr r3, [pc, #124] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
80085fe: 685b ldr r3, [r3, #4]
8008600: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
8008604: 687b ldr r3, [r7, #4]
8008606: 6a19 ldr r1, [r3, #32]
8008608: 687b ldr r3, [r7, #4]
800860a: 6a5b ldr r3, [r3, #36] @ 0x24
800860c: 430b orrs r3, r1
800860e: 491b ldr r1, [pc, #108] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008610: 4313 orrs r3, r2
8008612: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8008614: 4b1b ldr r3, [pc, #108] @ (8008684 <HAL_RCC_OscConfig+0x4cc>)
8008616: 2201 movs r2, #1
8008618: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800861a: f7fc fde1 bl 80051e0 <HAL_GetTick>
800861e: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8008620: e008 b.n 8008634 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8008622: f7fc fddd bl 80051e0 <HAL_GetTick>
8008626: 4602 mov r2, r0
8008628: 693b ldr r3, [r7, #16]
800862a: 1ad3 subs r3, r2, r3
800862c: 2b02 cmp r3, #2
800862e: d901 bls.n 8008634 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8008630: 2303 movs r3, #3
8008632: e03d b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8008634: 4b11 ldr r3, [pc, #68] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008636: 681b ldr r3, [r3, #0]
8008638: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800863c: 2b00 cmp r3, #0
800863e: d0f0 beq.n 8008622 <HAL_RCC_OscConfig+0x46a>
8008640: e035 b.n 80086ae <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8008642: 4b10 ldr r3, [pc, #64] @ (8008684 <HAL_RCC_OscConfig+0x4cc>)
8008644: 2200 movs r2, #0
8008646: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008648: f7fc fdca bl 80051e0 <HAL_GetTick>
800864c: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800864e: e008 b.n 8008662 <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8008650: f7fc fdc6 bl 80051e0 <HAL_GetTick>
8008654: 4602 mov r2, r0
8008656: 693b ldr r3, [r7, #16]
8008658: 1ad3 subs r3, r2, r3
800865a: 2b02 cmp r3, #2
800865c: d901 bls.n 8008662 <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
800865e: 2303 movs r3, #3
8008660: e026 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8008662: 4b06 ldr r3, [pc, #24] @ (800867c <HAL_RCC_OscConfig+0x4c4>)
8008664: 681b ldr r3, [r3, #0]
8008666: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800866a: 2b00 cmp r3, #0
800866c: d1f0 bne.n 8008650 <HAL_RCC_OscConfig+0x498>
800866e: e01e b.n 80086ae <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8008670: 687b ldr r3, [r7, #4]
8008672: 69db ldr r3, [r3, #28]
8008674: 2b01 cmp r3, #1
8008676: d107 bne.n 8008688 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8008678: 2301 movs r3, #1
800867a: e019 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
800867c: 40021000 .word 0x40021000
8008680: 40007000 .word 0x40007000
8008684: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8008688: 4b0b ldr r3, [pc, #44] @ (80086b8 <HAL_RCC_OscConfig+0x500>)
800868a: 685b ldr r3, [r3, #4]
800868c: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800868e: 68fb ldr r3, [r7, #12]
8008690: f403 3280 and.w r2, r3, #65536 @ 0x10000
8008694: 687b ldr r3, [r7, #4]
8008696: 6a1b ldr r3, [r3, #32]
8008698: 429a cmp r2, r3
800869a: d106 bne.n 80086aa <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
800869c: 68fb ldr r3, [r7, #12]
800869e: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
80086a2: 687b ldr r3, [r7, #4]
80086a4: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
80086a6: 429a cmp r2, r3
80086a8: d001 beq.n 80086ae <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
80086aa: 2301 movs r3, #1
80086ac: e000 b.n 80086b0 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
80086ae: 2300 movs r3, #0
}
80086b0: 4618 mov r0, r3
80086b2: 3718 adds r7, #24
80086b4: 46bd mov sp, r7
80086b6: bd80 pop {r7, pc}
80086b8: 40021000 .word 0x40021000
080086bc <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
80086bc: b580 push {r7, lr}
80086be: b084 sub sp, #16
80086c0: af00 add r7, sp, #0
80086c2: 6078 str r0, [r7, #4]
80086c4: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
80086c6: 687b ldr r3, [r7, #4]
80086c8: 2b00 cmp r3, #0
80086ca: d101 bne.n 80086d0 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
80086cc: 2301 movs r3, #1
80086ce: e0d0 b.n 8008872 <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
80086d0: 4b6a ldr r3, [pc, #424] @ (800887c <HAL_RCC_ClockConfig+0x1c0>)
80086d2: 681b ldr r3, [r3, #0]
80086d4: f003 0307 and.w r3, r3, #7
80086d8: 683a ldr r2, [r7, #0]
80086da: 429a cmp r2, r3
80086dc: d910 bls.n 8008700 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80086de: 4b67 ldr r3, [pc, #412] @ (800887c <HAL_RCC_ClockConfig+0x1c0>)
80086e0: 681b ldr r3, [r3, #0]
80086e2: f023 0207 bic.w r2, r3, #7
80086e6: 4965 ldr r1, [pc, #404] @ (800887c <HAL_RCC_ClockConfig+0x1c0>)
80086e8: 683b ldr r3, [r7, #0]
80086ea: 4313 orrs r3, r2
80086ec: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80086ee: 4b63 ldr r3, [pc, #396] @ (800887c <HAL_RCC_ClockConfig+0x1c0>)
80086f0: 681b ldr r3, [r3, #0]
80086f2: f003 0307 and.w r3, r3, #7
80086f6: 683a ldr r2, [r7, #0]
80086f8: 429a cmp r2, r3
80086fa: d001 beq.n 8008700 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
80086fc: 2301 movs r3, #1
80086fe: e0b8 b.n 8008872 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8008700: 687b ldr r3, [r7, #4]
8008702: 681b ldr r3, [r3, #0]
8008704: f003 0302 and.w r3, r3, #2
8008708: 2b00 cmp r3, #0
800870a: d020 beq.n 800874e <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
800870c: 687b ldr r3, [r7, #4]
800870e: 681b ldr r3, [r3, #0]
8008710: f003 0304 and.w r3, r3, #4
8008714: 2b00 cmp r3, #0
8008716: d005 beq.n 8008724 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8008718: 4b59 ldr r3, [pc, #356] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
800871a: 685b ldr r3, [r3, #4]
800871c: 4a58 ldr r2, [pc, #352] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
800871e: f443 63e0 orr.w r3, r3, #1792 @ 0x700
8008722: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8008724: 687b ldr r3, [r7, #4]
8008726: 681b ldr r3, [r3, #0]
8008728: f003 0308 and.w r3, r3, #8
800872c: 2b00 cmp r3, #0
800872e: d005 beq.n 800873c <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8008730: 4b53 ldr r3, [pc, #332] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
8008732: 685b ldr r3, [r3, #4]
8008734: 4a52 ldr r2, [pc, #328] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
8008736: f443 5360 orr.w r3, r3, #14336 @ 0x3800
800873a: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
800873c: 4b50 ldr r3, [pc, #320] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
800873e: 685b ldr r3, [r3, #4]
8008740: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8008744: 687b ldr r3, [r7, #4]
8008746: 689b ldr r3, [r3, #8]
8008748: 494d ldr r1, [pc, #308] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
800874a: 4313 orrs r3, r2
800874c: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
800874e: 687b ldr r3, [r7, #4]
8008750: 681b ldr r3, [r3, #0]
8008752: f003 0301 and.w r3, r3, #1
8008756: 2b00 cmp r3, #0
8008758: d040 beq.n 80087dc <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
800875a: 687b ldr r3, [r7, #4]
800875c: 685b ldr r3, [r3, #4]
800875e: 2b01 cmp r3, #1
8008760: d107 bne.n 8008772 <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8008762: 4b47 ldr r3, [pc, #284] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
8008764: 681b ldr r3, [r3, #0]
8008766: f403 3300 and.w r3, r3, #131072 @ 0x20000
800876a: 2b00 cmp r3, #0
800876c: d115 bne.n 800879a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800876e: 2301 movs r3, #1
8008770: e07f b.n 8008872 <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8008772: 687b ldr r3, [r7, #4]
8008774: 685b ldr r3, [r3, #4]
8008776: 2b02 cmp r3, #2
8008778: d107 bne.n 800878a <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800877a: 4b41 ldr r3, [pc, #260] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
800877c: 681b ldr r3, [r3, #0]
800877e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8008782: 2b00 cmp r3, #0
8008784: d109 bne.n 800879a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8008786: 2301 movs r3, #1
8008788: e073 b.n 8008872 <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800878a: 4b3d ldr r3, [pc, #244] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
800878c: 681b ldr r3, [r3, #0]
800878e: f003 0302 and.w r3, r3, #2
8008792: 2b00 cmp r3, #0
8008794: d101 bne.n 800879a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8008796: 2301 movs r3, #1
8008798: e06b b.n 8008872 <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
800879a: 4b39 ldr r3, [pc, #228] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
800879c: 685b ldr r3, [r3, #4]
800879e: f023 0203 bic.w r2, r3, #3
80087a2: 687b ldr r3, [r7, #4]
80087a4: 685b ldr r3, [r3, #4]
80087a6: 4936 ldr r1, [pc, #216] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
80087a8: 4313 orrs r3, r2
80087aa: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
80087ac: f7fc fd18 bl 80051e0 <HAL_GetTick>
80087b0: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80087b2: e00a b.n 80087ca <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
80087b4: f7fc fd14 bl 80051e0 <HAL_GetTick>
80087b8: 4602 mov r2, r0
80087ba: 68fb ldr r3, [r7, #12]
80087bc: 1ad3 subs r3, r2, r3
80087be: f241 3288 movw r2, #5000 @ 0x1388
80087c2: 4293 cmp r3, r2
80087c4: d901 bls.n 80087ca <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
80087c6: 2303 movs r3, #3
80087c8: e053 b.n 8008872 <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80087ca: 4b2d ldr r3, [pc, #180] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
80087cc: 685b ldr r3, [r3, #4]
80087ce: f003 020c and.w r2, r3, #12
80087d2: 687b ldr r3, [r7, #4]
80087d4: 685b ldr r3, [r3, #4]
80087d6: 009b lsls r3, r3, #2
80087d8: 429a cmp r2, r3
80087da: d1eb bne.n 80087b4 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
80087dc: 4b27 ldr r3, [pc, #156] @ (800887c <HAL_RCC_ClockConfig+0x1c0>)
80087de: 681b ldr r3, [r3, #0]
80087e0: f003 0307 and.w r3, r3, #7
80087e4: 683a ldr r2, [r7, #0]
80087e6: 429a cmp r2, r3
80087e8: d210 bcs.n 800880c <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80087ea: 4b24 ldr r3, [pc, #144] @ (800887c <HAL_RCC_ClockConfig+0x1c0>)
80087ec: 681b ldr r3, [r3, #0]
80087ee: f023 0207 bic.w r2, r3, #7
80087f2: 4922 ldr r1, [pc, #136] @ (800887c <HAL_RCC_ClockConfig+0x1c0>)
80087f4: 683b ldr r3, [r7, #0]
80087f6: 4313 orrs r3, r2
80087f8: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80087fa: 4b20 ldr r3, [pc, #128] @ (800887c <HAL_RCC_ClockConfig+0x1c0>)
80087fc: 681b ldr r3, [r3, #0]
80087fe: f003 0307 and.w r3, r3, #7
8008802: 683a ldr r2, [r7, #0]
8008804: 429a cmp r2, r3
8008806: d001 beq.n 800880c <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8008808: 2301 movs r3, #1
800880a: e032 b.n 8008872 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
800880c: 687b ldr r3, [r7, #4]
800880e: 681b ldr r3, [r3, #0]
8008810: f003 0304 and.w r3, r3, #4
8008814: 2b00 cmp r3, #0
8008816: d008 beq.n 800882a <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8008818: 4b19 ldr r3, [pc, #100] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
800881a: 685b ldr r3, [r3, #4]
800881c: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8008820: 687b ldr r3, [r7, #4]
8008822: 68db ldr r3, [r3, #12]
8008824: 4916 ldr r1, [pc, #88] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
8008826: 4313 orrs r3, r2
8008828: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
800882a: 687b ldr r3, [r7, #4]
800882c: 681b ldr r3, [r3, #0]
800882e: f003 0308 and.w r3, r3, #8
8008832: 2b00 cmp r3, #0
8008834: d009 beq.n 800884a <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8008836: 4b12 ldr r3, [pc, #72] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
8008838: 685b ldr r3, [r3, #4]
800883a: f423 5260 bic.w r2, r3, #14336 @ 0x3800
800883e: 687b ldr r3, [r7, #4]
8008840: 691b ldr r3, [r3, #16]
8008842: 00db lsls r3, r3, #3
8008844: 490e ldr r1, [pc, #56] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
8008846: 4313 orrs r3, r2
8008848: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
800884a: f000 f821 bl 8008890 <HAL_RCC_GetSysClockFreq>
800884e: 4602 mov r2, r0
8008850: 4b0b ldr r3, [pc, #44] @ (8008880 <HAL_RCC_ClockConfig+0x1c4>)
8008852: 685b ldr r3, [r3, #4]
8008854: 091b lsrs r3, r3, #4
8008856: f003 030f and.w r3, r3, #15
800885a: 490a ldr r1, [pc, #40] @ (8008884 <HAL_RCC_ClockConfig+0x1c8>)
800885c: 5ccb ldrb r3, [r1, r3]
800885e: fa22 f303 lsr.w r3, r2, r3
8008862: 4a09 ldr r2, [pc, #36] @ (8008888 <HAL_RCC_ClockConfig+0x1cc>)
8008864: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
8008866: 4b09 ldr r3, [pc, #36] @ (800888c <HAL_RCC_ClockConfig+0x1d0>)
8008868: 681b ldr r3, [r3, #0]
800886a: 4618 mov r0, r3
800886c: f7fc fc76 bl 800515c <HAL_InitTick>
return HAL_OK;
8008870: 2300 movs r3, #0
}
8008872: 4618 mov r0, r3
8008874: 3710 adds r7, #16
8008876: 46bd mov sp, r7
8008878: bd80 pop {r7, pc}
800887a: bf00 nop
800887c: 40022000 .word 0x40022000
8008880: 40021000 .word 0x40021000
8008884: 0800f5a8 .word 0x0800f5a8
8008888: 20000010 .word 0x20000010
800888c: 20000014 .word 0x20000014
08008890 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8008890: b480 push {r7}
8008892: b087 sub sp, #28
8008894: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8008896: 2300 movs r3, #0
8008898: 60fb str r3, [r7, #12]
800889a: 2300 movs r3, #0
800889c: 60bb str r3, [r7, #8]
800889e: 2300 movs r3, #0
80088a0: 617b str r3, [r7, #20]
80088a2: 2300 movs r3, #0
80088a4: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
80088a6: 2300 movs r3, #0
80088a8: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
80088aa: 4b1e ldr r3, [pc, #120] @ (8008924 <HAL_RCC_GetSysClockFreq+0x94>)
80088ac: 685b ldr r3, [r3, #4]
80088ae: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
80088b0: 68fb ldr r3, [r7, #12]
80088b2: f003 030c and.w r3, r3, #12
80088b6: 2b04 cmp r3, #4
80088b8: d002 beq.n 80088c0 <HAL_RCC_GetSysClockFreq+0x30>
80088ba: 2b08 cmp r3, #8
80088bc: d003 beq.n 80088c6 <HAL_RCC_GetSysClockFreq+0x36>
80088be: e027 b.n 8008910 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
80088c0: 4b19 ldr r3, [pc, #100] @ (8008928 <HAL_RCC_GetSysClockFreq+0x98>)
80088c2: 613b str r3, [r7, #16]
break;
80088c4: e027 b.n 8008916 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
80088c6: 68fb ldr r3, [r7, #12]
80088c8: 0c9b lsrs r3, r3, #18
80088ca: f003 030f and.w r3, r3, #15
80088ce: 4a17 ldr r2, [pc, #92] @ (800892c <HAL_RCC_GetSysClockFreq+0x9c>)
80088d0: 5cd3 ldrb r3, [r2, r3]
80088d2: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
80088d4: 68fb ldr r3, [r7, #12]
80088d6: f403 3380 and.w r3, r3, #65536 @ 0x10000
80088da: 2b00 cmp r3, #0
80088dc: d010 beq.n 8008900 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
80088de: 4b11 ldr r3, [pc, #68] @ (8008924 <HAL_RCC_GetSysClockFreq+0x94>)
80088e0: 685b ldr r3, [r3, #4]
80088e2: 0c5b lsrs r3, r3, #17
80088e4: f003 0301 and.w r3, r3, #1
80088e8: 4a11 ldr r2, [pc, #68] @ (8008930 <HAL_RCC_GetSysClockFreq+0xa0>)
80088ea: 5cd3 ldrb r3, [r2, r3]
80088ec: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
80088ee: 687b ldr r3, [r7, #4]
80088f0: 4a0d ldr r2, [pc, #52] @ (8008928 <HAL_RCC_GetSysClockFreq+0x98>)
80088f2: fb03 f202 mul.w r2, r3, r2
80088f6: 68bb ldr r3, [r7, #8]
80088f8: fbb2 f3f3 udiv r3, r2, r3
80088fc: 617b str r3, [r7, #20]
80088fe: e004 b.n 800890a <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8008900: 687b ldr r3, [r7, #4]
8008902: 4a0c ldr r2, [pc, #48] @ (8008934 <HAL_RCC_GetSysClockFreq+0xa4>)
8008904: fb02 f303 mul.w r3, r2, r3
8008908: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
800890a: 697b ldr r3, [r7, #20]
800890c: 613b str r3, [r7, #16]
break;
800890e: e002 b.n 8008916 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8008910: 4b09 ldr r3, [pc, #36] @ (8008938 <HAL_RCC_GetSysClockFreq+0xa8>)
8008912: 613b str r3, [r7, #16]
break;
8008914: bf00 nop
}
}
return sysclockfreq;
8008916: 693b ldr r3, [r7, #16]
}
8008918: 4618 mov r0, r3
800891a: 371c adds r7, #28
800891c: 46bd mov sp, r7
800891e: bc80 pop {r7}
8008920: 4770 bx lr
8008922: bf00 nop
8008924: 40021000 .word 0x40021000
8008928: 00b71b00 .word 0x00b71b00
800892c: 0800f5c0 .word 0x0800f5c0
8008930: 0800f5d0 .word 0x0800f5d0
8008934: 003d0900 .word 0x003d0900
8008938: 007a1200 .word 0x007a1200
0800893c <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
800893c: b480 push {r7}
800893e: af00 add r7, sp, #0
return SystemCoreClock;
8008940: 4b02 ldr r3, [pc, #8] @ (800894c <HAL_RCC_GetHCLKFreq+0x10>)
8008942: 681b ldr r3, [r3, #0]
}
8008944: 4618 mov r0, r3
8008946: 46bd mov sp, r7
8008948: bc80 pop {r7}
800894a: 4770 bx lr
800894c: 20000010 .word 0x20000010
08008950 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8008950: b580 push {r7, lr}
8008952: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
8008954: f7ff fff2 bl 800893c <HAL_RCC_GetHCLKFreq>
8008958: 4602 mov r2, r0
800895a: 4b05 ldr r3, [pc, #20] @ (8008970 <HAL_RCC_GetPCLK1Freq+0x20>)
800895c: 685b ldr r3, [r3, #4]
800895e: 0a1b lsrs r3, r3, #8
8008960: f003 0307 and.w r3, r3, #7
8008964: 4903 ldr r1, [pc, #12] @ (8008974 <HAL_RCC_GetPCLK1Freq+0x24>)
8008966: 5ccb ldrb r3, [r1, r3]
8008968: fa22 f303 lsr.w r3, r2, r3
}
800896c: 4618 mov r0, r3
800896e: bd80 pop {r7, pc}
8008970: 40021000 .word 0x40021000
8008974: 0800f5b8 .word 0x0800f5b8
08008978 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8008978: b580 push {r7, lr}
800897a: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
800897c: f7ff ffde bl 800893c <HAL_RCC_GetHCLKFreq>
8008980: 4602 mov r2, r0
8008982: 4b05 ldr r3, [pc, #20] @ (8008998 <HAL_RCC_GetPCLK2Freq+0x20>)
8008984: 685b ldr r3, [r3, #4]
8008986: 0adb lsrs r3, r3, #11
8008988: f003 0307 and.w r3, r3, #7
800898c: 4903 ldr r1, [pc, #12] @ (800899c <HAL_RCC_GetPCLK2Freq+0x24>)
800898e: 5ccb ldrb r3, [r1, r3]
8008990: fa22 f303 lsr.w r3, r2, r3
}
8008994: 4618 mov r0, r3
8008996: bd80 pop {r7, pc}
8008998: 40021000 .word 0x40021000
800899c: 0800f5b8 .word 0x0800f5b8
080089a0 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
80089a0: b480 push {r7}
80089a2: b085 sub sp, #20
80089a4: af00 add r7, sp, #0
80089a6: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
80089a8: 4b0a ldr r3, [pc, #40] @ (80089d4 <RCC_Delay+0x34>)
80089aa: 681b ldr r3, [r3, #0]
80089ac: 4a0a ldr r2, [pc, #40] @ (80089d8 <RCC_Delay+0x38>)
80089ae: fba2 2303 umull r2, r3, r2, r3
80089b2: 0a5b lsrs r3, r3, #9
80089b4: 687a ldr r2, [r7, #4]
80089b6: fb02 f303 mul.w r3, r2, r3
80089ba: 60fb str r3, [r7, #12]
do
{
__NOP();
80089bc: bf00 nop
}
while (Delay --);
80089be: 68fb ldr r3, [r7, #12]
80089c0: 1e5a subs r2, r3, #1
80089c2: 60fa str r2, [r7, #12]
80089c4: 2b00 cmp r3, #0
80089c6: d1f9 bne.n 80089bc <RCC_Delay+0x1c>
}
80089c8: bf00 nop
80089ca: bf00 nop
80089cc: 3714 adds r7, #20
80089ce: 46bd mov sp, r7
80089d0: bc80 pop {r7}
80089d2: 4770 bx lr
80089d4: 20000010 .word 0x20000010
80089d8: 10624dd3 .word 0x10624dd3
080089dc <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
80089dc: b580 push {r7, lr}
80089de: b086 sub sp, #24
80089e0: af00 add r7, sp, #0
80089e2: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
80089e4: 2300 movs r3, #0
80089e6: 613b str r3, [r7, #16]
80089e8: 2300 movs r3, #0
80089ea: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
80089ec: 687b ldr r3, [r7, #4]
80089ee: 681b ldr r3, [r3, #0]
80089f0: f003 0301 and.w r3, r3, #1
80089f4: 2b00 cmp r3, #0
80089f6: d07d beq.n 8008af4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
80089f8: 2300 movs r3, #0
80089fa: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
80089fc: 4b4f ldr r3, [pc, #316] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089fe: 69db ldr r3, [r3, #28]
8008a00: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8008a04: 2b00 cmp r3, #0
8008a06: d10d bne.n 8008a24 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
8008a08: 4b4c ldr r3, [pc, #304] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a0a: 69db ldr r3, [r3, #28]
8008a0c: 4a4b ldr r2, [pc, #300] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a0e: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8008a12: 61d3 str r3, [r2, #28]
8008a14: 4b49 ldr r3, [pc, #292] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a16: 69db ldr r3, [r3, #28]
8008a18: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8008a1c: 60bb str r3, [r7, #8]
8008a1e: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8008a20: 2301 movs r3, #1
8008a22: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008a24: 4b46 ldr r3, [pc, #280] @ (8008b40 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008a26: 681b ldr r3, [r3, #0]
8008a28: f403 7380 and.w r3, r3, #256 @ 0x100
8008a2c: 2b00 cmp r3, #0
8008a2e: d118 bne.n 8008a62 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8008a30: 4b43 ldr r3, [pc, #268] @ (8008b40 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008a32: 681b ldr r3, [r3, #0]
8008a34: 4a42 ldr r2, [pc, #264] @ (8008b40 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008a36: f443 7380 orr.w r3, r3, #256 @ 0x100
8008a3a: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8008a3c: f7fc fbd0 bl 80051e0 <HAL_GetTick>
8008a40: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008a42: e008 b.n 8008a56 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8008a44: f7fc fbcc bl 80051e0 <HAL_GetTick>
8008a48: 4602 mov r2, r0
8008a4a: 693b ldr r3, [r7, #16]
8008a4c: 1ad3 subs r3, r2, r3
8008a4e: 2b64 cmp r3, #100 @ 0x64
8008a50: d901 bls.n 8008a56 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8008a52: 2303 movs r3, #3
8008a54: e06d b.n 8008b32 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008a56: 4b3a ldr r3, [pc, #232] @ (8008b40 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008a58: 681b ldr r3, [r3, #0]
8008a5a: f403 7380 and.w r3, r3, #256 @ 0x100
8008a5e: 2b00 cmp r3, #0
8008a60: d0f0 beq.n 8008a44 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8008a62: 4b36 ldr r3, [pc, #216] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a64: 6a1b ldr r3, [r3, #32]
8008a66: f403 7340 and.w r3, r3, #768 @ 0x300
8008a6a: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8008a6c: 68fb ldr r3, [r7, #12]
8008a6e: 2b00 cmp r3, #0
8008a70: d02e beq.n 8008ad0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8008a72: 687b ldr r3, [r7, #4]
8008a74: 685b ldr r3, [r3, #4]
8008a76: f403 7340 and.w r3, r3, #768 @ 0x300
8008a7a: 68fa ldr r2, [r7, #12]
8008a7c: 429a cmp r2, r3
8008a7e: d027 beq.n 8008ad0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8008a80: 4b2e ldr r3, [pc, #184] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a82: 6a1b ldr r3, [r3, #32]
8008a84: f423 7340 bic.w r3, r3, #768 @ 0x300
8008a88: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8008a8a: 4b2e ldr r3, [pc, #184] @ (8008b44 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8008a8c: 2201 movs r2, #1
8008a8e: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8008a90: 4b2c ldr r3, [pc, #176] @ (8008b44 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8008a92: 2200 movs r2, #0
8008a94: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8008a96: 4a29 ldr r2, [pc, #164] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a98: 68fb ldr r3, [r7, #12]
8008a9a: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8008a9c: 68fb ldr r3, [r7, #12]
8008a9e: f003 0301 and.w r3, r3, #1
8008aa2: 2b00 cmp r3, #0
8008aa4: d014 beq.n 8008ad0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008aa6: f7fc fb9b bl 80051e0 <HAL_GetTick>
8008aaa: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008aac: e00a b.n 8008ac4 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8008aae: f7fc fb97 bl 80051e0 <HAL_GetTick>
8008ab2: 4602 mov r2, r0
8008ab4: 693b ldr r3, [r7, #16]
8008ab6: 1ad3 subs r3, r2, r3
8008ab8: f241 3288 movw r2, #5000 @ 0x1388
8008abc: 4293 cmp r3, r2
8008abe: d901 bls.n 8008ac4 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8008ac0: 2303 movs r3, #3
8008ac2: e036 b.n 8008b32 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008ac4: 4b1d ldr r3, [pc, #116] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008ac6: 6a1b ldr r3, [r3, #32]
8008ac8: f003 0302 and.w r3, r3, #2
8008acc: 2b00 cmp r3, #0
8008ace: d0ee beq.n 8008aae <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8008ad0: 4b1a ldr r3, [pc, #104] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008ad2: 6a1b ldr r3, [r3, #32]
8008ad4: f423 7240 bic.w r2, r3, #768 @ 0x300
8008ad8: 687b ldr r3, [r7, #4]
8008ada: 685b ldr r3, [r3, #4]
8008adc: 4917 ldr r1, [pc, #92] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008ade: 4313 orrs r3, r2
8008ae0: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8008ae2: 7dfb ldrb r3, [r7, #23]
8008ae4: 2b01 cmp r3, #1
8008ae6: d105 bne.n 8008af4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8008ae8: 4b14 ldr r3, [pc, #80] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008aea: 69db ldr r3, [r3, #28]
8008aec: 4a13 ldr r2, [pc, #76] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008aee: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8008af2: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8008af4: 687b ldr r3, [r7, #4]
8008af6: 681b ldr r3, [r3, #0]
8008af8: f003 0302 and.w r3, r3, #2
8008afc: 2b00 cmp r3, #0
8008afe: d008 beq.n 8008b12 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
8008b00: 4b0e ldr r3, [pc, #56] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008b02: 685b ldr r3, [r3, #4]
8008b04: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8008b08: 687b ldr r3, [r7, #4]
8008b0a: 689b ldr r3, [r3, #8]
8008b0c: 490b ldr r1, [pc, #44] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008b0e: 4313 orrs r3, r2
8008b10: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8008b12: 687b ldr r3, [r7, #4]
8008b14: 681b ldr r3, [r3, #0]
8008b16: f003 0310 and.w r3, r3, #16
8008b1a: 2b00 cmp r3, #0
8008b1c: d008 beq.n 8008b30 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8008b1e: 4b07 ldr r3, [pc, #28] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008b20: 685b ldr r3, [r3, #4]
8008b22: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8008b26: 687b ldr r3, [r7, #4]
8008b28: 68db ldr r3, [r3, #12]
8008b2a: 4904 ldr r1, [pc, #16] @ (8008b3c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008b2c: 4313 orrs r3, r2
8008b2e: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8008b30: 2300 movs r3, #0
}
8008b32: 4618 mov r0, r3
8008b34: 3718 adds r7, #24
8008b36: 46bd mov sp, r7
8008b38: bd80 pop {r7, pc}
8008b3a: bf00 nop
8008b3c: 40021000 .word 0x40021000
8008b40: 40007000 .word 0x40007000
8008b44: 42420440 .word 0x42420440
08008b48 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8008b48: b580 push {r7, lr}
8008b4a: b082 sub sp, #8
8008b4c: af00 add r7, sp, #0
8008b4e: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8008b50: 687b ldr r3, [r7, #4]
8008b52: 2b00 cmp r3, #0
8008b54: d101 bne.n 8008b5a <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8008b56: 2301 movs r3, #1
8008b58: e041 b.n 8008bde <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8008b5a: 687b ldr r3, [r7, #4]
8008b5c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8008b60: b2db uxtb r3, r3
8008b62: 2b00 cmp r3, #0
8008b64: d106 bne.n 8008b74 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8008b66: 687b ldr r3, [r7, #4]
8008b68: 2200 movs r2, #0
8008b6a: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8008b6e: 6878 ldr r0, [r7, #4]
8008b70: f7fc f96a bl 8004e48 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8008b74: 687b ldr r3, [r7, #4]
8008b76: 2202 movs r2, #2
8008b78: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8008b7c: 687b ldr r3, [r7, #4]
8008b7e: 681a ldr r2, [r3, #0]
8008b80: 687b ldr r3, [r7, #4]
8008b82: 3304 adds r3, #4
8008b84: 4619 mov r1, r3
8008b86: 4610 mov r0, r2
8008b88: f000 fb3e bl 8009208 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8008b8c: 687b ldr r3, [r7, #4]
8008b8e: 2201 movs r2, #1
8008b90: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008b94: 687b ldr r3, [r7, #4]
8008b96: 2201 movs r2, #1
8008b98: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008b9c: 687b ldr r3, [r7, #4]
8008b9e: 2201 movs r2, #1
8008ba0: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008ba4: 687b ldr r3, [r7, #4]
8008ba6: 2201 movs r2, #1
8008ba8: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008bac: 687b ldr r3, [r7, #4]
8008bae: 2201 movs r2, #1
8008bb0: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008bb4: 687b ldr r3, [r7, #4]
8008bb6: 2201 movs r2, #1
8008bb8: f883 2042 strb.w r2, [r3, #66] @ 0x42
8008bbc: 687b ldr r3, [r7, #4]
8008bbe: 2201 movs r2, #1
8008bc0: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008bc4: 687b ldr r3, [r7, #4]
8008bc6: 2201 movs r2, #1
8008bc8: f883 2044 strb.w r2, [r3, #68] @ 0x44
8008bcc: 687b ldr r3, [r7, #4]
8008bce: 2201 movs r2, #1
8008bd0: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008bd4: 687b ldr r3, [r7, #4]
8008bd6: 2201 movs r2, #1
8008bd8: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8008bdc: 2300 movs r3, #0
}
8008bde: 4618 mov r0, r3
8008be0: 3708 adds r7, #8
8008be2: 46bd mov sp, r7
8008be4: bd80 pop {r7, pc}
08008be6 <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8008be6: b580 push {r7, lr}
8008be8: b082 sub sp, #8
8008bea: af00 add r7, sp, #0
8008bec: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8008bee: 687b ldr r3, [r7, #4]
8008bf0: 2b00 cmp r3, #0
8008bf2: d101 bne.n 8008bf8 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8008bf4: 2301 movs r3, #1
8008bf6: e041 b.n 8008c7c <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8008bf8: 687b ldr r3, [r7, #4]
8008bfa: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8008bfe: b2db uxtb r3, r3
8008c00: 2b00 cmp r3, #0
8008c02: d106 bne.n 8008c12 <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8008c04: 687b ldr r3, [r7, #4]
8008c06: 2200 movs r2, #0
8008c08: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
8008c0c: 6878 ldr r0, [r7, #4]
8008c0e: f000 f839 bl 8008c84 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8008c12: 687b ldr r3, [r7, #4]
8008c14: 2202 movs r2, #2
8008c16: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8008c1a: 687b ldr r3, [r7, #4]
8008c1c: 681a ldr r2, [r3, #0]
8008c1e: 687b ldr r3, [r7, #4]
8008c20: 3304 adds r3, #4
8008c22: 4619 mov r1, r3
8008c24: 4610 mov r0, r2
8008c26: f000 faef bl 8009208 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8008c2a: 687b ldr r3, [r7, #4]
8008c2c: 2201 movs r2, #1
8008c2e: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008c32: 687b ldr r3, [r7, #4]
8008c34: 2201 movs r2, #1
8008c36: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008c3a: 687b ldr r3, [r7, #4]
8008c3c: 2201 movs r2, #1
8008c3e: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008c42: 687b ldr r3, [r7, #4]
8008c44: 2201 movs r2, #1
8008c46: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008c4a: 687b ldr r3, [r7, #4]
8008c4c: 2201 movs r2, #1
8008c4e: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008c52: 687b ldr r3, [r7, #4]
8008c54: 2201 movs r2, #1
8008c56: f883 2042 strb.w r2, [r3, #66] @ 0x42
8008c5a: 687b ldr r3, [r7, #4]
8008c5c: 2201 movs r2, #1
8008c5e: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008c62: 687b ldr r3, [r7, #4]
8008c64: 2201 movs r2, #1
8008c66: f883 2044 strb.w r2, [r3, #68] @ 0x44
8008c6a: 687b ldr r3, [r7, #4]
8008c6c: 2201 movs r2, #1
8008c6e: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008c72: 687b ldr r3, [r7, #4]
8008c74: 2201 movs r2, #1
8008c76: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8008c7a: 2300 movs r3, #0
}
8008c7c: 4618 mov r0, r3
8008c7e: 3708 adds r7, #8
8008c80: 46bd mov sp, r7
8008c82: bd80 pop {r7, pc}
08008c84 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8008c84: b480 push {r7}
8008c86: b083 sub sp, #12
8008c88: af00 add r7, sp, #0
8008c8a: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8008c8c: bf00 nop
8008c8e: 370c adds r7, #12
8008c90: 46bd mov sp, r7
8008c92: bc80 pop {r7}
8008c94: 4770 bx lr
...
08008c98 <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008c98: b580 push {r7, lr}
8008c9a: b084 sub sp, #16
8008c9c: af00 add r7, sp, #0
8008c9e: 6078 str r0, [r7, #4]
8008ca0: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8008ca2: 683b ldr r3, [r7, #0]
8008ca4: 2b00 cmp r3, #0
8008ca6: d109 bne.n 8008cbc <HAL_TIM_PWM_Start+0x24>
8008ca8: 687b ldr r3, [r7, #4]
8008caa: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8008cae: b2db uxtb r3, r3
8008cb0: 2b01 cmp r3, #1
8008cb2: bf14 ite ne
8008cb4: 2301 movne r3, #1
8008cb6: 2300 moveq r3, #0
8008cb8: b2db uxtb r3, r3
8008cba: e022 b.n 8008d02 <HAL_TIM_PWM_Start+0x6a>
8008cbc: 683b ldr r3, [r7, #0]
8008cbe: 2b04 cmp r3, #4
8008cc0: d109 bne.n 8008cd6 <HAL_TIM_PWM_Start+0x3e>
8008cc2: 687b ldr r3, [r7, #4]
8008cc4: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8008cc8: b2db uxtb r3, r3
8008cca: 2b01 cmp r3, #1
8008ccc: bf14 ite ne
8008cce: 2301 movne r3, #1
8008cd0: 2300 moveq r3, #0
8008cd2: b2db uxtb r3, r3
8008cd4: e015 b.n 8008d02 <HAL_TIM_PWM_Start+0x6a>
8008cd6: 683b ldr r3, [r7, #0]
8008cd8: 2b08 cmp r3, #8
8008cda: d109 bne.n 8008cf0 <HAL_TIM_PWM_Start+0x58>
8008cdc: 687b ldr r3, [r7, #4]
8008cde: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8008ce2: b2db uxtb r3, r3
8008ce4: 2b01 cmp r3, #1
8008ce6: bf14 ite ne
8008ce8: 2301 movne r3, #1
8008cea: 2300 moveq r3, #0
8008cec: b2db uxtb r3, r3
8008cee: e008 b.n 8008d02 <HAL_TIM_PWM_Start+0x6a>
8008cf0: 687b ldr r3, [r7, #4]
8008cf2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8008cf6: b2db uxtb r3, r3
8008cf8: 2b01 cmp r3, #1
8008cfa: bf14 ite ne
8008cfc: 2301 movne r3, #1
8008cfe: 2300 moveq r3, #0
8008d00: b2db uxtb r3, r3
8008d02: 2b00 cmp r3, #0
8008d04: d001 beq.n 8008d0a <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
8008d06: 2301 movs r3, #1
8008d08: e05e b.n 8008dc8 <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
8008d0a: 683b ldr r3, [r7, #0]
8008d0c: 2b00 cmp r3, #0
8008d0e: d104 bne.n 8008d1a <HAL_TIM_PWM_Start+0x82>
8008d10: 687b ldr r3, [r7, #4]
8008d12: 2202 movs r2, #2
8008d14: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008d18: e013 b.n 8008d42 <HAL_TIM_PWM_Start+0xaa>
8008d1a: 683b ldr r3, [r7, #0]
8008d1c: 2b04 cmp r3, #4
8008d1e: d104 bne.n 8008d2a <HAL_TIM_PWM_Start+0x92>
8008d20: 687b ldr r3, [r7, #4]
8008d22: 2202 movs r2, #2
8008d24: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008d28: e00b b.n 8008d42 <HAL_TIM_PWM_Start+0xaa>
8008d2a: 683b ldr r3, [r7, #0]
8008d2c: 2b08 cmp r3, #8
8008d2e: d104 bne.n 8008d3a <HAL_TIM_PWM_Start+0xa2>
8008d30: 687b ldr r3, [r7, #4]
8008d32: 2202 movs r2, #2
8008d34: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008d38: e003 b.n 8008d42 <HAL_TIM_PWM_Start+0xaa>
8008d3a: 687b ldr r3, [r7, #4]
8008d3c: 2202 movs r2, #2
8008d3e: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
8008d42: 687b ldr r3, [r7, #4]
8008d44: 681b ldr r3, [r3, #0]
8008d46: 2201 movs r2, #1
8008d48: 6839 ldr r1, [r7, #0]
8008d4a: 4618 mov r0, r3
8008d4c: f000 fce8 bl 8009720 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008d50: 687b ldr r3, [r7, #4]
8008d52: 681b ldr r3, [r3, #0]
8008d54: 4a1e ldr r2, [pc, #120] @ (8008dd0 <HAL_TIM_PWM_Start+0x138>)
8008d56: 4293 cmp r3, r2
8008d58: d107 bne.n 8008d6a <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
8008d5a: 687b ldr r3, [r7, #4]
8008d5c: 681b ldr r3, [r3, #0]
8008d5e: 6c5a ldr r2, [r3, #68] @ 0x44
8008d60: 687b ldr r3, [r7, #4]
8008d62: 681b ldr r3, [r3, #0]
8008d64: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8008d68: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8008d6a: 687b ldr r3, [r7, #4]
8008d6c: 681b ldr r3, [r3, #0]
8008d6e: 4a18 ldr r2, [pc, #96] @ (8008dd0 <HAL_TIM_PWM_Start+0x138>)
8008d70: 4293 cmp r3, r2
8008d72: d00e beq.n 8008d92 <HAL_TIM_PWM_Start+0xfa>
8008d74: 687b ldr r3, [r7, #4]
8008d76: 681b ldr r3, [r3, #0]
8008d78: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008d7c: d009 beq.n 8008d92 <HAL_TIM_PWM_Start+0xfa>
8008d7e: 687b ldr r3, [r7, #4]
8008d80: 681b ldr r3, [r3, #0]
8008d82: 4a14 ldr r2, [pc, #80] @ (8008dd4 <HAL_TIM_PWM_Start+0x13c>)
8008d84: 4293 cmp r3, r2
8008d86: d004 beq.n 8008d92 <HAL_TIM_PWM_Start+0xfa>
8008d88: 687b ldr r3, [r7, #4]
8008d8a: 681b ldr r3, [r3, #0]
8008d8c: 4a12 ldr r2, [pc, #72] @ (8008dd8 <HAL_TIM_PWM_Start+0x140>)
8008d8e: 4293 cmp r3, r2
8008d90: d111 bne.n 8008db6 <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8008d92: 687b ldr r3, [r7, #4]
8008d94: 681b ldr r3, [r3, #0]
8008d96: 689b ldr r3, [r3, #8]
8008d98: f003 0307 and.w r3, r3, #7
8008d9c: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008d9e: 68fb ldr r3, [r7, #12]
8008da0: 2b06 cmp r3, #6
8008da2: d010 beq.n 8008dc6 <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8008da4: 687b ldr r3, [r7, #4]
8008da6: 681b ldr r3, [r3, #0]
8008da8: 681a ldr r2, [r3, #0]
8008daa: 687b ldr r3, [r7, #4]
8008dac: 681b ldr r3, [r3, #0]
8008dae: f042 0201 orr.w r2, r2, #1
8008db2: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008db4: e007 b.n 8008dc6 <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8008db6: 687b ldr r3, [r7, #4]
8008db8: 681b ldr r3, [r3, #0]
8008dba: 681a ldr r2, [r3, #0]
8008dbc: 687b ldr r3, [r7, #4]
8008dbe: 681b ldr r3, [r3, #0]
8008dc0: f042 0201 orr.w r2, r2, #1
8008dc4: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8008dc6: 2300 movs r3, #0
}
8008dc8: 4618 mov r0, r3
8008dca: 3710 adds r7, #16
8008dcc: 46bd mov sp, r7
8008dce: bd80 pop {r7, pc}
8008dd0: 40012c00 .word 0x40012c00
8008dd4: 40000400 .word 0x40000400
8008dd8: 40000800 .word 0x40000800
08008ddc <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008ddc: b580 push {r7, lr}
8008dde: b082 sub sp, #8
8008de0: af00 add r7, sp, #0
8008de2: 6078 str r0, [r7, #4]
8008de4: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
8008de6: 687b ldr r3, [r7, #4]
8008de8: 681b ldr r3, [r3, #0]
8008dea: 2200 movs r2, #0
8008dec: 6839 ldr r1, [r7, #0]
8008dee: 4618 mov r0, r3
8008df0: f000 fc96 bl 8009720 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008df4: 687b ldr r3, [r7, #4]
8008df6: 681b ldr r3, [r3, #0]
8008df8: 4a29 ldr r2, [pc, #164] @ (8008ea0 <HAL_TIM_PWM_Stop+0xc4>)
8008dfa: 4293 cmp r3, r2
8008dfc: d117 bne.n 8008e2e <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
8008dfe: 687b ldr r3, [r7, #4]
8008e00: 681b ldr r3, [r3, #0]
8008e02: 6a1a ldr r2, [r3, #32]
8008e04: f241 1311 movw r3, #4369 @ 0x1111
8008e08: 4013 ands r3, r2
8008e0a: 2b00 cmp r3, #0
8008e0c: d10f bne.n 8008e2e <HAL_TIM_PWM_Stop+0x52>
8008e0e: 687b ldr r3, [r7, #4]
8008e10: 681b ldr r3, [r3, #0]
8008e12: 6a1a ldr r2, [r3, #32]
8008e14: f240 4344 movw r3, #1092 @ 0x444
8008e18: 4013 ands r3, r2
8008e1a: 2b00 cmp r3, #0
8008e1c: d107 bne.n 8008e2e <HAL_TIM_PWM_Stop+0x52>
8008e1e: 687b ldr r3, [r7, #4]
8008e20: 681b ldr r3, [r3, #0]
8008e22: 6c5a ldr r2, [r3, #68] @ 0x44
8008e24: 687b ldr r3, [r7, #4]
8008e26: 681b ldr r3, [r3, #0]
8008e28: f422 4200 bic.w r2, r2, #32768 @ 0x8000
8008e2c: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
8008e2e: 687b ldr r3, [r7, #4]
8008e30: 681b ldr r3, [r3, #0]
8008e32: 6a1a ldr r2, [r3, #32]
8008e34: f241 1311 movw r3, #4369 @ 0x1111
8008e38: 4013 ands r3, r2
8008e3a: 2b00 cmp r3, #0
8008e3c: d10f bne.n 8008e5e <HAL_TIM_PWM_Stop+0x82>
8008e3e: 687b ldr r3, [r7, #4]
8008e40: 681b ldr r3, [r3, #0]
8008e42: 6a1a ldr r2, [r3, #32]
8008e44: f240 4344 movw r3, #1092 @ 0x444
8008e48: 4013 ands r3, r2
8008e4a: 2b00 cmp r3, #0
8008e4c: d107 bne.n 8008e5e <HAL_TIM_PWM_Stop+0x82>
8008e4e: 687b ldr r3, [r7, #4]
8008e50: 681b ldr r3, [r3, #0]
8008e52: 681a ldr r2, [r3, #0]
8008e54: 687b ldr r3, [r7, #4]
8008e56: 681b ldr r3, [r3, #0]
8008e58: f022 0201 bic.w r2, r2, #1
8008e5c: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
8008e5e: 683b ldr r3, [r7, #0]
8008e60: 2b00 cmp r3, #0
8008e62: d104 bne.n 8008e6e <HAL_TIM_PWM_Stop+0x92>
8008e64: 687b ldr r3, [r7, #4]
8008e66: 2201 movs r2, #1
8008e68: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008e6c: e013 b.n 8008e96 <HAL_TIM_PWM_Stop+0xba>
8008e6e: 683b ldr r3, [r7, #0]
8008e70: 2b04 cmp r3, #4
8008e72: d104 bne.n 8008e7e <HAL_TIM_PWM_Stop+0xa2>
8008e74: 687b ldr r3, [r7, #4]
8008e76: 2201 movs r2, #1
8008e78: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008e7c: e00b b.n 8008e96 <HAL_TIM_PWM_Stop+0xba>
8008e7e: 683b ldr r3, [r7, #0]
8008e80: 2b08 cmp r3, #8
8008e82: d104 bne.n 8008e8e <HAL_TIM_PWM_Stop+0xb2>
8008e84: 687b ldr r3, [r7, #4]
8008e86: 2201 movs r2, #1
8008e88: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008e8c: e003 b.n 8008e96 <HAL_TIM_PWM_Stop+0xba>
8008e8e: 687b ldr r3, [r7, #4]
8008e90: 2201 movs r2, #1
8008e92: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
8008e96: 2300 movs r3, #0
}
8008e98: 4618 mov r0, r3
8008e9a: 3708 adds r7, #8
8008e9c: 46bd mov sp, r7
8008e9e: bd80 pop {r7, pc}
8008ea0: 40012c00 .word 0x40012c00
08008ea4 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8008ea4: b580 push {r7, lr}
8008ea6: b086 sub sp, #24
8008ea8: af00 add r7, sp, #0
8008eaa: 60f8 str r0, [r7, #12]
8008eac: 60b9 str r1, [r7, #8]
8008eae: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8008eb0: 2300 movs r3, #0
8008eb2: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8008eb4: 68fb ldr r3, [r7, #12]
8008eb6: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8008eba: 2b01 cmp r3, #1
8008ebc: d101 bne.n 8008ec2 <HAL_TIM_PWM_ConfigChannel+0x1e>
8008ebe: 2302 movs r3, #2
8008ec0: e0ae b.n 8009020 <HAL_TIM_PWM_ConfigChannel+0x17c>
8008ec2: 68fb ldr r3, [r7, #12]
8008ec4: 2201 movs r2, #1
8008ec6: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
8008eca: 687b ldr r3, [r7, #4]
8008ecc: 2b0c cmp r3, #12
8008ece: f200 809f bhi.w 8009010 <HAL_TIM_PWM_ConfigChannel+0x16c>
8008ed2: a201 add r2, pc, #4 @ (adr r2, 8008ed8 <HAL_TIM_PWM_ConfigChannel+0x34>)
8008ed4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008ed8: 08008f0d .word 0x08008f0d
8008edc: 08009011 .word 0x08009011
8008ee0: 08009011 .word 0x08009011
8008ee4: 08009011 .word 0x08009011
8008ee8: 08008f4d .word 0x08008f4d
8008eec: 08009011 .word 0x08009011
8008ef0: 08009011 .word 0x08009011
8008ef4: 08009011 .word 0x08009011
8008ef8: 08008f8f .word 0x08008f8f
8008efc: 08009011 .word 0x08009011
8008f00: 08009011 .word 0x08009011
8008f04: 08009011 .word 0x08009011
8008f08: 08008fcf .word 0x08008fcf
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
8008f0c: 68fb ldr r3, [r7, #12]
8008f0e: 681b ldr r3, [r3, #0]
8008f10: 68b9 ldr r1, [r7, #8]
8008f12: 4618 mov r0, r3
8008f14: f000 f9e6 bl 80092e4 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
8008f18: 68fb ldr r3, [r7, #12]
8008f1a: 681b ldr r3, [r3, #0]
8008f1c: 699a ldr r2, [r3, #24]
8008f1e: 68fb ldr r3, [r7, #12]
8008f20: 681b ldr r3, [r3, #0]
8008f22: f042 0208 orr.w r2, r2, #8
8008f26: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
8008f28: 68fb ldr r3, [r7, #12]
8008f2a: 681b ldr r3, [r3, #0]
8008f2c: 699a ldr r2, [r3, #24]
8008f2e: 68fb ldr r3, [r7, #12]
8008f30: 681b ldr r3, [r3, #0]
8008f32: f022 0204 bic.w r2, r2, #4
8008f36: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
8008f38: 68fb ldr r3, [r7, #12]
8008f3a: 681b ldr r3, [r3, #0]
8008f3c: 6999 ldr r1, [r3, #24]
8008f3e: 68bb ldr r3, [r7, #8]
8008f40: 691a ldr r2, [r3, #16]
8008f42: 68fb ldr r3, [r7, #12]
8008f44: 681b ldr r3, [r3, #0]
8008f46: 430a orrs r2, r1
8008f48: 619a str r2, [r3, #24]
break;
8008f4a: e064 b.n 8009016 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
8008f4c: 68fb ldr r3, [r7, #12]
8008f4e: 681b ldr r3, [r3, #0]
8008f50: 68b9 ldr r1, [r7, #8]
8008f52: 4618 mov r0, r3
8008f54: f000 fa2c bl 80093b0 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8008f58: 68fb ldr r3, [r7, #12]
8008f5a: 681b ldr r3, [r3, #0]
8008f5c: 699a ldr r2, [r3, #24]
8008f5e: 68fb ldr r3, [r7, #12]
8008f60: 681b ldr r3, [r3, #0]
8008f62: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008f66: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8008f68: 68fb ldr r3, [r7, #12]
8008f6a: 681b ldr r3, [r3, #0]
8008f6c: 699a ldr r2, [r3, #24]
8008f6e: 68fb ldr r3, [r7, #12]
8008f70: 681b ldr r3, [r3, #0]
8008f72: f422 6280 bic.w r2, r2, #1024 @ 0x400
8008f76: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8008f78: 68fb ldr r3, [r7, #12]
8008f7a: 681b ldr r3, [r3, #0]
8008f7c: 6999 ldr r1, [r3, #24]
8008f7e: 68bb ldr r3, [r7, #8]
8008f80: 691b ldr r3, [r3, #16]
8008f82: 021a lsls r2, r3, #8
8008f84: 68fb ldr r3, [r7, #12]
8008f86: 681b ldr r3, [r3, #0]
8008f88: 430a orrs r2, r1
8008f8a: 619a str r2, [r3, #24]
break;
8008f8c: e043 b.n 8009016 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8008f8e: 68fb ldr r3, [r7, #12]
8008f90: 681b ldr r3, [r3, #0]
8008f92: 68b9 ldr r1, [r7, #8]
8008f94: 4618 mov r0, r3
8008f96: f000 fa75 bl 8009484 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
8008f9a: 68fb ldr r3, [r7, #12]
8008f9c: 681b ldr r3, [r3, #0]
8008f9e: 69da ldr r2, [r3, #28]
8008fa0: 68fb ldr r3, [r7, #12]
8008fa2: 681b ldr r3, [r3, #0]
8008fa4: f042 0208 orr.w r2, r2, #8
8008fa8: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
8008faa: 68fb ldr r3, [r7, #12]
8008fac: 681b ldr r3, [r3, #0]
8008fae: 69da ldr r2, [r3, #28]
8008fb0: 68fb ldr r3, [r7, #12]
8008fb2: 681b ldr r3, [r3, #0]
8008fb4: f022 0204 bic.w r2, r2, #4
8008fb8: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
8008fba: 68fb ldr r3, [r7, #12]
8008fbc: 681b ldr r3, [r3, #0]
8008fbe: 69d9 ldr r1, [r3, #28]
8008fc0: 68bb ldr r3, [r7, #8]
8008fc2: 691a ldr r2, [r3, #16]
8008fc4: 68fb ldr r3, [r7, #12]
8008fc6: 681b ldr r3, [r3, #0]
8008fc8: 430a orrs r2, r1
8008fca: 61da str r2, [r3, #28]
break;
8008fcc: e023 b.n 8009016 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
8008fce: 68fb ldr r3, [r7, #12]
8008fd0: 681b ldr r3, [r3, #0]
8008fd2: 68b9 ldr r1, [r7, #8]
8008fd4: 4618 mov r0, r3
8008fd6: f000 fabf bl 8009558 <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
8008fda: 68fb ldr r3, [r7, #12]
8008fdc: 681b ldr r3, [r3, #0]
8008fde: 69da ldr r2, [r3, #28]
8008fe0: 68fb ldr r3, [r7, #12]
8008fe2: 681b ldr r3, [r3, #0]
8008fe4: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008fe8: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
8008fea: 68fb ldr r3, [r7, #12]
8008fec: 681b ldr r3, [r3, #0]
8008fee: 69da ldr r2, [r3, #28]
8008ff0: 68fb ldr r3, [r7, #12]
8008ff2: 681b ldr r3, [r3, #0]
8008ff4: f422 6280 bic.w r2, r2, #1024 @ 0x400
8008ff8: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
8008ffa: 68fb ldr r3, [r7, #12]
8008ffc: 681b ldr r3, [r3, #0]
8008ffe: 69d9 ldr r1, [r3, #28]
8009000: 68bb ldr r3, [r7, #8]
8009002: 691b ldr r3, [r3, #16]
8009004: 021a lsls r2, r3, #8
8009006: 68fb ldr r3, [r7, #12]
8009008: 681b ldr r3, [r3, #0]
800900a: 430a orrs r2, r1
800900c: 61da str r2, [r3, #28]
break;
800900e: e002 b.n 8009016 <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
8009010: 2301 movs r3, #1
8009012: 75fb strb r3, [r7, #23]
break;
8009014: bf00 nop
}
__HAL_UNLOCK(htim);
8009016: 68fb ldr r3, [r7, #12]
8009018: 2200 movs r2, #0
800901a: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
800901e: 7dfb ldrb r3, [r7, #23]
}
8009020: 4618 mov r0, r3
8009022: 3718 adds r7, #24
8009024: 46bd mov sp, r7
8009026: bd80 pop {r7, pc}
08009028 <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
8009028: b580 push {r7, lr}
800902a: b084 sub sp, #16
800902c: af00 add r7, sp, #0
800902e: 6078 str r0, [r7, #4]
8009030: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8009032: 2300 movs r3, #0
8009034: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
8009036: 687b ldr r3, [r7, #4]
8009038: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
800903c: 2b01 cmp r3, #1
800903e: d101 bne.n 8009044 <HAL_TIM_ConfigClockSource+0x1c>
8009040: 2302 movs r3, #2
8009042: e0b4 b.n 80091ae <HAL_TIM_ConfigClockSource+0x186>
8009044: 687b ldr r3, [r7, #4]
8009046: 2201 movs r2, #1
8009048: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
800904c: 687b ldr r3, [r7, #4]
800904e: 2202 movs r2, #2
8009050: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8009054: 687b ldr r3, [r7, #4]
8009056: 681b ldr r3, [r3, #0]
8009058: 689b ldr r3, [r3, #8]
800905a: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
800905c: 68bb ldr r3, [r7, #8]
800905e: f023 0377 bic.w r3, r3, #119 @ 0x77
8009062: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8009064: 68bb ldr r3, [r7, #8]
8009066: f423 437f bic.w r3, r3, #65280 @ 0xff00
800906a: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
800906c: 687b ldr r3, [r7, #4]
800906e: 681b ldr r3, [r3, #0]
8009070: 68ba ldr r2, [r7, #8]
8009072: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8009074: 683b ldr r3, [r7, #0]
8009076: 681b ldr r3, [r3, #0]
8009078: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800907c: d03e beq.n 80090fc <HAL_TIM_ConfigClockSource+0xd4>
800907e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8009082: f200 8087 bhi.w 8009194 <HAL_TIM_ConfigClockSource+0x16c>
8009086: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800908a: f000 8086 beq.w 800919a <HAL_TIM_ConfigClockSource+0x172>
800908e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8009092: d87f bhi.n 8009194 <HAL_TIM_ConfigClockSource+0x16c>
8009094: 2b70 cmp r3, #112 @ 0x70
8009096: d01a beq.n 80090ce <HAL_TIM_ConfigClockSource+0xa6>
8009098: 2b70 cmp r3, #112 @ 0x70
800909a: d87b bhi.n 8009194 <HAL_TIM_ConfigClockSource+0x16c>
800909c: 2b60 cmp r3, #96 @ 0x60
800909e: d050 beq.n 8009142 <HAL_TIM_ConfigClockSource+0x11a>
80090a0: 2b60 cmp r3, #96 @ 0x60
80090a2: d877 bhi.n 8009194 <HAL_TIM_ConfigClockSource+0x16c>
80090a4: 2b50 cmp r3, #80 @ 0x50
80090a6: d03c beq.n 8009122 <HAL_TIM_ConfigClockSource+0xfa>
80090a8: 2b50 cmp r3, #80 @ 0x50
80090aa: d873 bhi.n 8009194 <HAL_TIM_ConfigClockSource+0x16c>
80090ac: 2b40 cmp r3, #64 @ 0x40
80090ae: d058 beq.n 8009162 <HAL_TIM_ConfigClockSource+0x13a>
80090b0: 2b40 cmp r3, #64 @ 0x40
80090b2: d86f bhi.n 8009194 <HAL_TIM_ConfigClockSource+0x16c>
80090b4: 2b30 cmp r3, #48 @ 0x30
80090b6: d064 beq.n 8009182 <HAL_TIM_ConfigClockSource+0x15a>
80090b8: 2b30 cmp r3, #48 @ 0x30
80090ba: d86b bhi.n 8009194 <HAL_TIM_ConfigClockSource+0x16c>
80090bc: 2b20 cmp r3, #32
80090be: d060 beq.n 8009182 <HAL_TIM_ConfigClockSource+0x15a>
80090c0: 2b20 cmp r3, #32
80090c2: d867 bhi.n 8009194 <HAL_TIM_ConfigClockSource+0x16c>
80090c4: 2b00 cmp r3, #0
80090c6: d05c beq.n 8009182 <HAL_TIM_ConfigClockSource+0x15a>
80090c8: 2b10 cmp r3, #16
80090ca: d05a beq.n 8009182 <HAL_TIM_ConfigClockSource+0x15a>
80090cc: e062 b.n 8009194 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
80090ce: 687b ldr r3, [r7, #4]
80090d0: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
80090d2: 683b ldr r3, [r7, #0]
80090d4: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
80090d6: 683b ldr r3, [r7, #0]
80090d8: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
80090da: 683b ldr r3, [r7, #0]
80090dc: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80090de: f000 fb00 bl 80096e2 <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
80090e2: 687b ldr r3, [r7, #4]
80090e4: 681b ldr r3, [r3, #0]
80090e6: 689b ldr r3, [r3, #8]
80090e8: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
80090ea: 68bb ldr r3, [r7, #8]
80090ec: f043 0377 orr.w r3, r3, #119 @ 0x77
80090f0: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80090f2: 687b ldr r3, [r7, #4]
80090f4: 681b ldr r3, [r3, #0]
80090f6: 68ba ldr r2, [r7, #8]
80090f8: 609a str r2, [r3, #8]
break;
80090fa: e04f b.n 800919c <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
80090fc: 687b ldr r3, [r7, #4]
80090fe: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8009100: 683b ldr r3, [r7, #0]
8009102: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8009104: 683b ldr r3, [r7, #0]
8009106: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8009108: 683b ldr r3, [r7, #0]
800910a: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
800910c: f000 fae9 bl 80096e2 <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
8009110: 687b ldr r3, [r7, #4]
8009112: 681b ldr r3, [r3, #0]
8009114: 689a ldr r2, [r3, #8]
8009116: 687b ldr r3, [r7, #4]
8009118: 681b ldr r3, [r3, #0]
800911a: f442 4280 orr.w r2, r2, #16384 @ 0x4000
800911e: 609a str r2, [r3, #8]
break;
8009120: e03c b.n 800919c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8009122: 687b ldr r3, [r7, #4]
8009124: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8009126: 683b ldr r3, [r7, #0]
8009128: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800912a: 683b ldr r3, [r7, #0]
800912c: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
800912e: 461a mov r2, r3
8009130: f000 fa60 bl 80095f4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
8009134: 687b ldr r3, [r7, #4]
8009136: 681b ldr r3, [r3, #0]
8009138: 2150 movs r1, #80 @ 0x50
800913a: 4618 mov r0, r3
800913c: f000 fab7 bl 80096ae <TIM_ITRx_SetConfig>
break;
8009140: e02c b.n 800919c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
8009142: 687b ldr r3, [r7, #4]
8009144: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8009146: 683b ldr r3, [r7, #0]
8009148: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800914a: 683b ldr r3, [r7, #0]
800914c: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
800914e: 461a mov r2, r3
8009150: f000 fa7e bl 8009650 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
8009154: 687b ldr r3, [r7, #4]
8009156: 681b ldr r3, [r3, #0]
8009158: 2160 movs r1, #96 @ 0x60
800915a: 4618 mov r0, r3
800915c: f000 faa7 bl 80096ae <TIM_ITRx_SetConfig>
break;
8009160: e01c b.n 800919c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8009162: 687b ldr r3, [r7, #4]
8009164: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8009166: 683b ldr r3, [r7, #0]
8009168: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800916a: 683b ldr r3, [r7, #0]
800916c: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
800916e: 461a mov r2, r3
8009170: f000 fa40 bl 80095f4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8009174: 687b ldr r3, [r7, #4]
8009176: 681b ldr r3, [r3, #0]
8009178: 2140 movs r1, #64 @ 0x40
800917a: 4618 mov r0, r3
800917c: f000 fa97 bl 80096ae <TIM_ITRx_SetConfig>
break;
8009180: e00c b.n 800919c <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
8009182: 687b ldr r3, [r7, #4]
8009184: 681a ldr r2, [r3, #0]
8009186: 683b ldr r3, [r7, #0]
8009188: 681b ldr r3, [r3, #0]
800918a: 4619 mov r1, r3
800918c: 4610 mov r0, r2
800918e: f000 fa8e bl 80096ae <TIM_ITRx_SetConfig>
break;
8009192: e003 b.n 800919c <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8009194: 2301 movs r3, #1
8009196: 73fb strb r3, [r7, #15]
break;
8009198: e000 b.n 800919c <HAL_TIM_ConfigClockSource+0x174>
break;
800919a: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
800919c: 687b ldr r3, [r7, #4]
800919e: 2201 movs r2, #1
80091a0: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
80091a4: 687b ldr r3, [r7, #4]
80091a6: 2200 movs r2, #0
80091a8: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
80091ac: 7bfb ldrb r3, [r7, #15]
}
80091ae: 4618 mov r0, r3
80091b0: 3710 adds r7, #16
80091b2: 46bd mov sp, r7
80091b4: bd80 pop {r7, pc}
080091b6 <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
80091b6: b480 push {r7}
80091b8: b085 sub sp, #20
80091ba: af00 add r7, sp, #0
80091bc: 6078 str r0, [r7, #4]
80091be: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
80091c0: 683b ldr r3, [r7, #0]
80091c2: 2b00 cmp r3, #0
80091c4: d104 bne.n 80091d0 <HAL_TIM_GetChannelState+0x1a>
80091c6: 687b ldr r3, [r7, #4]
80091c8: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
80091cc: b2db uxtb r3, r3
80091ce: e013 b.n 80091f8 <HAL_TIM_GetChannelState+0x42>
80091d0: 683b ldr r3, [r7, #0]
80091d2: 2b04 cmp r3, #4
80091d4: d104 bne.n 80091e0 <HAL_TIM_GetChannelState+0x2a>
80091d6: 687b ldr r3, [r7, #4]
80091d8: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
80091dc: b2db uxtb r3, r3
80091de: e00b b.n 80091f8 <HAL_TIM_GetChannelState+0x42>
80091e0: 683b ldr r3, [r7, #0]
80091e2: 2b08 cmp r3, #8
80091e4: d104 bne.n 80091f0 <HAL_TIM_GetChannelState+0x3a>
80091e6: 687b ldr r3, [r7, #4]
80091e8: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
80091ec: b2db uxtb r3, r3
80091ee: e003 b.n 80091f8 <HAL_TIM_GetChannelState+0x42>
80091f0: 687b ldr r3, [r7, #4]
80091f2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80091f6: b2db uxtb r3, r3
80091f8: 73fb strb r3, [r7, #15]
return channel_state;
80091fa: 7bfb ldrb r3, [r7, #15]
}
80091fc: 4618 mov r0, r3
80091fe: 3714 adds r7, #20
8009200: 46bd mov sp, r7
8009202: bc80 pop {r7}
8009204: 4770 bx lr
...
08009208 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
8009208: b480 push {r7}
800920a: b085 sub sp, #20
800920c: af00 add r7, sp, #0
800920e: 6078 str r0, [r7, #4]
8009210: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8009212: 687b ldr r3, [r7, #4]
8009214: 681b ldr r3, [r3, #0]
8009216: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8009218: 687b ldr r3, [r7, #4]
800921a: 4a2f ldr r2, [pc, #188] @ (80092d8 <TIM_Base_SetConfig+0xd0>)
800921c: 4293 cmp r3, r2
800921e: d00b beq.n 8009238 <TIM_Base_SetConfig+0x30>
8009220: 687b ldr r3, [r7, #4]
8009222: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8009226: d007 beq.n 8009238 <TIM_Base_SetConfig+0x30>
8009228: 687b ldr r3, [r7, #4]
800922a: 4a2c ldr r2, [pc, #176] @ (80092dc <TIM_Base_SetConfig+0xd4>)
800922c: 4293 cmp r3, r2
800922e: d003 beq.n 8009238 <TIM_Base_SetConfig+0x30>
8009230: 687b ldr r3, [r7, #4]
8009232: 4a2b ldr r2, [pc, #172] @ (80092e0 <TIM_Base_SetConfig+0xd8>)
8009234: 4293 cmp r3, r2
8009236: d108 bne.n 800924a <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8009238: 68fb ldr r3, [r7, #12]
800923a: f023 0370 bic.w r3, r3, #112 @ 0x70
800923e: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8009240: 683b ldr r3, [r7, #0]
8009242: 685b ldr r3, [r3, #4]
8009244: 68fa ldr r2, [r7, #12]
8009246: 4313 orrs r3, r2
8009248: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
800924a: 687b ldr r3, [r7, #4]
800924c: 4a22 ldr r2, [pc, #136] @ (80092d8 <TIM_Base_SetConfig+0xd0>)
800924e: 4293 cmp r3, r2
8009250: d00b beq.n 800926a <TIM_Base_SetConfig+0x62>
8009252: 687b ldr r3, [r7, #4]
8009254: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8009258: d007 beq.n 800926a <TIM_Base_SetConfig+0x62>
800925a: 687b ldr r3, [r7, #4]
800925c: 4a1f ldr r2, [pc, #124] @ (80092dc <TIM_Base_SetConfig+0xd4>)
800925e: 4293 cmp r3, r2
8009260: d003 beq.n 800926a <TIM_Base_SetConfig+0x62>
8009262: 687b ldr r3, [r7, #4]
8009264: 4a1e ldr r2, [pc, #120] @ (80092e0 <TIM_Base_SetConfig+0xd8>)
8009266: 4293 cmp r3, r2
8009268: d108 bne.n 800927c <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
800926a: 68fb ldr r3, [r7, #12]
800926c: f423 7340 bic.w r3, r3, #768 @ 0x300
8009270: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8009272: 683b ldr r3, [r7, #0]
8009274: 68db ldr r3, [r3, #12]
8009276: 68fa ldr r2, [r7, #12]
8009278: 4313 orrs r3, r2
800927a: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
800927c: 68fb ldr r3, [r7, #12]
800927e: f023 0280 bic.w r2, r3, #128 @ 0x80
8009282: 683b ldr r3, [r7, #0]
8009284: 695b ldr r3, [r3, #20]
8009286: 4313 orrs r3, r2
8009288: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
800928a: 687b ldr r3, [r7, #4]
800928c: 68fa ldr r2, [r7, #12]
800928e: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8009290: 683b ldr r3, [r7, #0]
8009292: 689a ldr r2, [r3, #8]
8009294: 687b ldr r3, [r7, #4]
8009296: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8009298: 683b ldr r3, [r7, #0]
800929a: 681a ldr r2, [r3, #0]
800929c: 687b ldr r3, [r7, #4]
800929e: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
80092a0: 687b ldr r3, [r7, #4]
80092a2: 4a0d ldr r2, [pc, #52] @ (80092d8 <TIM_Base_SetConfig+0xd0>)
80092a4: 4293 cmp r3, r2
80092a6: d103 bne.n 80092b0 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
80092a8: 683b ldr r3, [r7, #0]
80092aa: 691a ldr r2, [r3, #16]
80092ac: 687b ldr r3, [r7, #4]
80092ae: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
80092b0: 687b ldr r3, [r7, #4]
80092b2: 2201 movs r2, #1
80092b4: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
80092b6: 687b ldr r3, [r7, #4]
80092b8: 691b ldr r3, [r3, #16]
80092ba: f003 0301 and.w r3, r3, #1
80092be: 2b00 cmp r3, #0
80092c0: d005 beq.n 80092ce <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
80092c2: 687b ldr r3, [r7, #4]
80092c4: 691b ldr r3, [r3, #16]
80092c6: f023 0201 bic.w r2, r3, #1
80092ca: 687b ldr r3, [r7, #4]
80092cc: 611a str r2, [r3, #16]
}
}
80092ce: bf00 nop
80092d0: 3714 adds r7, #20
80092d2: 46bd mov sp, r7
80092d4: bc80 pop {r7}
80092d6: 4770 bx lr
80092d8: 40012c00 .word 0x40012c00
80092dc: 40000400 .word 0x40000400
80092e0: 40000800 .word 0x40000800
080092e4 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80092e4: b480 push {r7}
80092e6: b087 sub sp, #28
80092e8: af00 add r7, sp, #0
80092ea: 6078 str r0, [r7, #4]
80092ec: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80092ee: 687b ldr r3, [r7, #4]
80092f0: 6a1b ldr r3, [r3, #32]
80092f2: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
80092f4: 687b ldr r3, [r7, #4]
80092f6: 6a1b ldr r3, [r3, #32]
80092f8: f023 0201 bic.w r2, r3, #1
80092fc: 687b ldr r3, [r7, #4]
80092fe: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8009300: 687b ldr r3, [r7, #4]
8009302: 685b ldr r3, [r3, #4]
8009304: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8009306: 687b ldr r3, [r7, #4]
8009308: 699b ldr r3, [r3, #24]
800930a: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
800930c: 68fb ldr r3, [r7, #12]
800930e: f023 0370 bic.w r3, r3, #112 @ 0x70
8009312: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
8009314: 68fb ldr r3, [r7, #12]
8009316: f023 0303 bic.w r3, r3, #3
800931a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
800931c: 683b ldr r3, [r7, #0]
800931e: 681b ldr r3, [r3, #0]
8009320: 68fa ldr r2, [r7, #12]
8009322: 4313 orrs r3, r2
8009324: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
8009326: 697b ldr r3, [r7, #20]
8009328: f023 0302 bic.w r3, r3, #2
800932c: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
800932e: 683b ldr r3, [r7, #0]
8009330: 689b ldr r3, [r3, #8]
8009332: 697a ldr r2, [r7, #20]
8009334: 4313 orrs r3, r2
8009336: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
8009338: 687b ldr r3, [r7, #4]
800933a: 4a1c ldr r2, [pc, #112] @ (80093ac <TIM_OC1_SetConfig+0xc8>)
800933c: 4293 cmp r3, r2
800933e: d10c bne.n 800935a <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
8009340: 697b ldr r3, [r7, #20]
8009342: f023 0308 bic.w r3, r3, #8
8009346: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
8009348: 683b ldr r3, [r7, #0]
800934a: 68db ldr r3, [r3, #12]
800934c: 697a ldr r2, [r7, #20]
800934e: 4313 orrs r3, r2
8009350: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
8009352: 697b ldr r3, [r7, #20]
8009354: f023 0304 bic.w r3, r3, #4
8009358: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
800935a: 687b ldr r3, [r7, #4]
800935c: 4a13 ldr r2, [pc, #76] @ (80093ac <TIM_OC1_SetConfig+0xc8>)
800935e: 4293 cmp r3, r2
8009360: d111 bne.n 8009386 <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
8009362: 693b ldr r3, [r7, #16]
8009364: f423 7380 bic.w r3, r3, #256 @ 0x100
8009368: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
800936a: 693b ldr r3, [r7, #16]
800936c: f423 7300 bic.w r3, r3, #512 @ 0x200
8009370: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
8009372: 683b ldr r3, [r7, #0]
8009374: 695b ldr r3, [r3, #20]
8009376: 693a ldr r2, [r7, #16]
8009378: 4313 orrs r3, r2
800937a: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
800937c: 683b ldr r3, [r7, #0]
800937e: 699b ldr r3, [r3, #24]
8009380: 693a ldr r2, [r7, #16]
8009382: 4313 orrs r3, r2
8009384: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8009386: 687b ldr r3, [r7, #4]
8009388: 693a ldr r2, [r7, #16]
800938a: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
800938c: 687b ldr r3, [r7, #4]
800938e: 68fa ldr r2, [r7, #12]
8009390: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8009392: 683b ldr r3, [r7, #0]
8009394: 685a ldr r2, [r3, #4]
8009396: 687b ldr r3, [r7, #4]
8009398: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800939a: 687b ldr r3, [r7, #4]
800939c: 697a ldr r2, [r7, #20]
800939e: 621a str r2, [r3, #32]
}
80093a0: bf00 nop
80093a2: 371c adds r7, #28
80093a4: 46bd mov sp, r7
80093a6: bc80 pop {r7}
80093a8: 4770 bx lr
80093aa: bf00 nop
80093ac: 40012c00 .word 0x40012c00
080093b0 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80093b0: b480 push {r7}
80093b2: b087 sub sp, #28
80093b4: af00 add r7, sp, #0
80093b6: 6078 str r0, [r7, #4]
80093b8: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80093ba: 687b ldr r3, [r7, #4]
80093bc: 6a1b ldr r3, [r3, #32]
80093be: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
80093c0: 687b ldr r3, [r7, #4]
80093c2: 6a1b ldr r3, [r3, #32]
80093c4: f023 0210 bic.w r2, r3, #16
80093c8: 687b ldr r3, [r7, #4]
80093ca: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80093cc: 687b ldr r3, [r7, #4]
80093ce: 685b ldr r3, [r3, #4]
80093d0: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
80093d2: 687b ldr r3, [r7, #4]
80093d4: 699b ldr r3, [r3, #24]
80093d6: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
80093d8: 68fb ldr r3, [r7, #12]
80093da: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80093de: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
80093e0: 68fb ldr r3, [r7, #12]
80093e2: f423 7340 bic.w r3, r3, #768 @ 0x300
80093e6: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
80093e8: 683b ldr r3, [r7, #0]
80093ea: 681b ldr r3, [r3, #0]
80093ec: 021b lsls r3, r3, #8
80093ee: 68fa ldr r2, [r7, #12]
80093f0: 4313 orrs r3, r2
80093f2: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
80093f4: 697b ldr r3, [r7, #20]
80093f6: f023 0320 bic.w r3, r3, #32
80093fa: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
80093fc: 683b ldr r3, [r7, #0]
80093fe: 689b ldr r3, [r3, #8]
8009400: 011b lsls r3, r3, #4
8009402: 697a ldr r2, [r7, #20]
8009404: 4313 orrs r3, r2
8009406: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
8009408: 687b ldr r3, [r7, #4]
800940a: 4a1d ldr r2, [pc, #116] @ (8009480 <TIM_OC2_SetConfig+0xd0>)
800940c: 4293 cmp r3, r2
800940e: d10d bne.n 800942c <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
8009410: 697b ldr r3, [r7, #20]
8009412: f023 0380 bic.w r3, r3, #128 @ 0x80
8009416: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
8009418: 683b ldr r3, [r7, #0]
800941a: 68db ldr r3, [r3, #12]
800941c: 011b lsls r3, r3, #4
800941e: 697a ldr r2, [r7, #20]
8009420: 4313 orrs r3, r2
8009422: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
8009424: 697b ldr r3, [r7, #20]
8009426: f023 0340 bic.w r3, r3, #64 @ 0x40
800942a: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
800942c: 687b ldr r3, [r7, #4]
800942e: 4a14 ldr r2, [pc, #80] @ (8009480 <TIM_OC2_SetConfig+0xd0>)
8009430: 4293 cmp r3, r2
8009432: d113 bne.n 800945c <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
8009434: 693b ldr r3, [r7, #16]
8009436: f423 6380 bic.w r3, r3, #1024 @ 0x400
800943a: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
800943c: 693b ldr r3, [r7, #16]
800943e: f423 6300 bic.w r3, r3, #2048 @ 0x800
8009442: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8009444: 683b ldr r3, [r7, #0]
8009446: 695b ldr r3, [r3, #20]
8009448: 009b lsls r3, r3, #2
800944a: 693a ldr r2, [r7, #16]
800944c: 4313 orrs r3, r2
800944e: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
8009450: 683b ldr r3, [r7, #0]
8009452: 699b ldr r3, [r3, #24]
8009454: 009b lsls r3, r3, #2
8009456: 693a ldr r2, [r7, #16]
8009458: 4313 orrs r3, r2
800945a: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800945c: 687b ldr r3, [r7, #4]
800945e: 693a ldr r2, [r7, #16]
8009460: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8009462: 687b ldr r3, [r7, #4]
8009464: 68fa ldr r2, [r7, #12]
8009466: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
8009468: 683b ldr r3, [r7, #0]
800946a: 685a ldr r2, [r3, #4]
800946c: 687b ldr r3, [r7, #4]
800946e: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8009470: 687b ldr r3, [r7, #4]
8009472: 697a ldr r2, [r7, #20]
8009474: 621a str r2, [r3, #32]
}
8009476: bf00 nop
8009478: 371c adds r7, #28
800947a: 46bd mov sp, r7
800947c: bc80 pop {r7}
800947e: 4770 bx lr
8009480: 40012c00 .word 0x40012c00
08009484 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8009484: b480 push {r7}
8009486: b087 sub sp, #28
8009488: af00 add r7, sp, #0
800948a: 6078 str r0, [r7, #4]
800948c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800948e: 687b ldr r3, [r7, #4]
8009490: 6a1b ldr r3, [r3, #32]
8009492: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8009494: 687b ldr r3, [r7, #4]
8009496: 6a1b ldr r3, [r3, #32]
8009498: f423 7280 bic.w r2, r3, #256 @ 0x100
800949c: 687b ldr r3, [r7, #4]
800949e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80094a0: 687b ldr r3, [r7, #4]
80094a2: 685b ldr r3, [r3, #4]
80094a4: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
80094a6: 687b ldr r3, [r7, #4]
80094a8: 69db ldr r3, [r3, #28]
80094aa: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
80094ac: 68fb ldr r3, [r7, #12]
80094ae: f023 0370 bic.w r3, r3, #112 @ 0x70
80094b2: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
80094b4: 68fb ldr r3, [r7, #12]
80094b6: f023 0303 bic.w r3, r3, #3
80094ba: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
80094bc: 683b ldr r3, [r7, #0]
80094be: 681b ldr r3, [r3, #0]
80094c0: 68fa ldr r2, [r7, #12]
80094c2: 4313 orrs r3, r2
80094c4: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
80094c6: 697b ldr r3, [r7, #20]
80094c8: f423 7300 bic.w r3, r3, #512 @ 0x200
80094cc: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
80094ce: 683b ldr r3, [r7, #0]
80094d0: 689b ldr r3, [r3, #8]
80094d2: 021b lsls r3, r3, #8
80094d4: 697a ldr r2, [r7, #20]
80094d6: 4313 orrs r3, r2
80094d8: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
80094da: 687b ldr r3, [r7, #4]
80094dc: 4a1d ldr r2, [pc, #116] @ (8009554 <TIM_OC3_SetConfig+0xd0>)
80094de: 4293 cmp r3, r2
80094e0: d10d bne.n 80094fe <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
80094e2: 697b ldr r3, [r7, #20]
80094e4: f423 6300 bic.w r3, r3, #2048 @ 0x800
80094e8: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
80094ea: 683b ldr r3, [r7, #0]
80094ec: 68db ldr r3, [r3, #12]
80094ee: 021b lsls r3, r3, #8
80094f0: 697a ldr r2, [r7, #20]
80094f2: 4313 orrs r3, r2
80094f4: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
80094f6: 697b ldr r3, [r7, #20]
80094f8: f423 6380 bic.w r3, r3, #1024 @ 0x400
80094fc: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80094fe: 687b ldr r3, [r7, #4]
8009500: 4a14 ldr r2, [pc, #80] @ (8009554 <TIM_OC3_SetConfig+0xd0>)
8009502: 4293 cmp r3, r2
8009504: d113 bne.n 800952e <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
8009506: 693b ldr r3, [r7, #16]
8009508: f423 5380 bic.w r3, r3, #4096 @ 0x1000
800950c: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
800950e: 693b ldr r3, [r7, #16]
8009510: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8009514: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
8009516: 683b ldr r3, [r7, #0]
8009518: 695b ldr r3, [r3, #20]
800951a: 011b lsls r3, r3, #4
800951c: 693a ldr r2, [r7, #16]
800951e: 4313 orrs r3, r2
8009520: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
8009522: 683b ldr r3, [r7, #0]
8009524: 699b ldr r3, [r3, #24]
8009526: 011b lsls r3, r3, #4
8009528: 693a ldr r2, [r7, #16]
800952a: 4313 orrs r3, r2
800952c: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800952e: 687b ldr r3, [r7, #4]
8009530: 693a ldr r2, [r7, #16]
8009532: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8009534: 687b ldr r3, [r7, #4]
8009536: 68fa ldr r2, [r7, #12]
8009538: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
800953a: 683b ldr r3, [r7, #0]
800953c: 685a ldr r2, [r3, #4]
800953e: 687b ldr r3, [r7, #4]
8009540: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8009542: 687b ldr r3, [r7, #4]
8009544: 697a ldr r2, [r7, #20]
8009546: 621a str r2, [r3, #32]
}
8009548: bf00 nop
800954a: 371c adds r7, #28
800954c: 46bd mov sp, r7
800954e: bc80 pop {r7}
8009550: 4770 bx lr
8009552: bf00 nop
8009554: 40012c00 .word 0x40012c00
08009558 <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8009558: b480 push {r7}
800955a: b087 sub sp, #28
800955c: af00 add r7, sp, #0
800955e: 6078 str r0, [r7, #4]
8009560: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8009562: 687b ldr r3, [r7, #4]
8009564: 6a1b ldr r3, [r3, #32]
8009566: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
8009568: 687b ldr r3, [r7, #4]
800956a: 6a1b ldr r3, [r3, #32]
800956c: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8009570: 687b ldr r3, [r7, #4]
8009572: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8009574: 687b ldr r3, [r7, #4]
8009576: 685b ldr r3, [r3, #4]
8009578: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
800957a: 687b ldr r3, [r7, #4]
800957c: 69db ldr r3, [r3, #28]
800957e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8009580: 68fb ldr r3, [r7, #12]
8009582: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009586: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
8009588: 68fb ldr r3, [r7, #12]
800958a: f423 7340 bic.w r3, r3, #768 @ 0x300
800958e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8009590: 683b ldr r3, [r7, #0]
8009592: 681b ldr r3, [r3, #0]
8009594: 021b lsls r3, r3, #8
8009596: 68fa ldr r2, [r7, #12]
8009598: 4313 orrs r3, r2
800959a: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
800959c: 693b ldr r3, [r7, #16]
800959e: f423 5300 bic.w r3, r3, #8192 @ 0x2000
80095a2: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
80095a4: 683b ldr r3, [r7, #0]
80095a6: 689b ldr r3, [r3, #8]
80095a8: 031b lsls r3, r3, #12
80095aa: 693a ldr r2, [r7, #16]
80095ac: 4313 orrs r3, r2
80095ae: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
80095b0: 687b ldr r3, [r7, #4]
80095b2: 4a0f ldr r2, [pc, #60] @ (80095f0 <TIM_OC4_SetConfig+0x98>)
80095b4: 4293 cmp r3, r2
80095b6: d109 bne.n 80095cc <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
80095b8: 697b ldr r3, [r7, #20]
80095ba: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80095be: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
80095c0: 683b ldr r3, [r7, #0]
80095c2: 695b ldr r3, [r3, #20]
80095c4: 019b lsls r3, r3, #6
80095c6: 697a ldr r2, [r7, #20]
80095c8: 4313 orrs r3, r2
80095ca: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80095cc: 687b ldr r3, [r7, #4]
80095ce: 697a ldr r2, [r7, #20]
80095d0: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
80095d2: 687b ldr r3, [r7, #4]
80095d4: 68fa ldr r2, [r7, #12]
80095d6: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
80095d8: 683b ldr r3, [r7, #0]
80095da: 685a ldr r2, [r3, #4]
80095dc: 687b ldr r3, [r7, #4]
80095de: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80095e0: 687b ldr r3, [r7, #4]
80095e2: 693a ldr r2, [r7, #16]
80095e4: 621a str r2, [r3, #32]
}
80095e6: bf00 nop
80095e8: 371c adds r7, #28
80095ea: 46bd mov sp, r7
80095ec: bc80 pop {r7}
80095ee: 4770 bx lr
80095f0: 40012c00 .word 0x40012c00
080095f4 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
80095f4: b480 push {r7}
80095f6: b087 sub sp, #28
80095f8: af00 add r7, sp, #0
80095fa: 60f8 str r0, [r7, #12]
80095fc: 60b9 str r1, [r7, #8]
80095fe: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
8009600: 68fb ldr r3, [r7, #12]
8009602: 6a1b ldr r3, [r3, #32]
8009604: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
8009606: 68fb ldr r3, [r7, #12]
8009608: 6a1b ldr r3, [r3, #32]
800960a: f023 0201 bic.w r2, r3, #1
800960e: 68fb ldr r3, [r7, #12]
8009610: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8009612: 68fb ldr r3, [r7, #12]
8009614: 699b ldr r3, [r3, #24]
8009616: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
8009618: 693b ldr r3, [r7, #16]
800961a: f023 03f0 bic.w r3, r3, #240 @ 0xf0
800961e: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
8009620: 687b ldr r3, [r7, #4]
8009622: 011b lsls r3, r3, #4
8009624: 693a ldr r2, [r7, #16]
8009626: 4313 orrs r3, r2
8009628: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
800962a: 697b ldr r3, [r7, #20]
800962c: f023 030a bic.w r3, r3, #10
8009630: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
8009632: 697a ldr r2, [r7, #20]
8009634: 68bb ldr r3, [r7, #8]
8009636: 4313 orrs r3, r2
8009638: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
800963a: 68fb ldr r3, [r7, #12]
800963c: 693a ldr r2, [r7, #16]
800963e: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8009640: 68fb ldr r3, [r7, #12]
8009642: 697a ldr r2, [r7, #20]
8009644: 621a str r2, [r3, #32]
}
8009646: bf00 nop
8009648: 371c adds r7, #28
800964a: 46bd mov sp, r7
800964c: bc80 pop {r7}
800964e: 4770 bx lr
08009650 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8009650: b480 push {r7}
8009652: b087 sub sp, #28
8009654: af00 add r7, sp, #0
8009656: 60f8 str r0, [r7, #12]
8009658: 60b9 str r1, [r7, #8]
800965a: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
800965c: 68fb ldr r3, [r7, #12]
800965e: 6a1b ldr r3, [r3, #32]
8009660: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
8009662: 68fb ldr r3, [r7, #12]
8009664: 6a1b ldr r3, [r3, #32]
8009666: f023 0210 bic.w r2, r3, #16
800966a: 68fb ldr r3, [r7, #12]
800966c: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
800966e: 68fb ldr r3, [r7, #12]
8009670: 699b ldr r3, [r3, #24]
8009672: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
8009674: 693b ldr r3, [r7, #16]
8009676: f423 4370 bic.w r3, r3, #61440 @ 0xf000
800967a: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
800967c: 687b ldr r3, [r7, #4]
800967e: 031b lsls r3, r3, #12
8009680: 693a ldr r2, [r7, #16]
8009682: 4313 orrs r3, r2
8009684: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8009686: 697b ldr r3, [r7, #20]
8009688: f023 03a0 bic.w r3, r3, #160 @ 0xa0
800968c: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
800968e: 68bb ldr r3, [r7, #8]
8009690: 011b lsls r3, r3, #4
8009692: 697a ldr r2, [r7, #20]
8009694: 4313 orrs r3, r2
8009696: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8009698: 68fb ldr r3, [r7, #12]
800969a: 693a ldr r2, [r7, #16]
800969c: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
800969e: 68fb ldr r3, [r7, #12]
80096a0: 697a ldr r2, [r7, #20]
80096a2: 621a str r2, [r3, #32]
}
80096a4: bf00 nop
80096a6: 371c adds r7, #28
80096a8: 46bd mov sp, r7
80096aa: bc80 pop {r7}
80096ac: 4770 bx lr
080096ae <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
80096ae: b480 push {r7}
80096b0: b085 sub sp, #20
80096b2: af00 add r7, sp, #0
80096b4: 6078 str r0, [r7, #4]
80096b6: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
80096b8: 687b ldr r3, [r7, #4]
80096ba: 689b ldr r3, [r3, #8]
80096bc: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
80096be: 68fb ldr r3, [r7, #12]
80096c0: f023 0370 bic.w r3, r3, #112 @ 0x70
80096c4: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
80096c6: 683a ldr r2, [r7, #0]
80096c8: 68fb ldr r3, [r7, #12]
80096ca: 4313 orrs r3, r2
80096cc: f043 0307 orr.w r3, r3, #7
80096d0: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
80096d2: 687b ldr r3, [r7, #4]
80096d4: 68fa ldr r2, [r7, #12]
80096d6: 609a str r2, [r3, #8]
}
80096d8: bf00 nop
80096da: 3714 adds r7, #20
80096dc: 46bd mov sp, r7
80096de: bc80 pop {r7}
80096e0: 4770 bx lr
080096e2 <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
80096e2: b480 push {r7}
80096e4: b087 sub sp, #28
80096e6: af00 add r7, sp, #0
80096e8: 60f8 str r0, [r7, #12]
80096ea: 60b9 str r1, [r7, #8]
80096ec: 607a str r2, [r7, #4]
80096ee: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
80096f0: 68fb ldr r3, [r7, #12]
80096f2: 689b ldr r3, [r3, #8]
80096f4: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
80096f6: 697b ldr r3, [r7, #20]
80096f8: f423 437f bic.w r3, r3, #65280 @ 0xff00
80096fc: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
80096fe: 683b ldr r3, [r7, #0]
8009700: 021a lsls r2, r3, #8
8009702: 687b ldr r3, [r7, #4]
8009704: 431a orrs r2, r3
8009706: 68bb ldr r3, [r7, #8]
8009708: 4313 orrs r3, r2
800970a: 697a ldr r2, [r7, #20]
800970c: 4313 orrs r3, r2
800970e: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8009710: 68fb ldr r3, [r7, #12]
8009712: 697a ldr r2, [r7, #20]
8009714: 609a str r2, [r3, #8]
}
8009716: bf00 nop
8009718: 371c adds r7, #28
800971a: 46bd mov sp, r7
800971c: bc80 pop {r7}
800971e: 4770 bx lr
08009720 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8009720: b480 push {r7}
8009722: b087 sub sp, #28
8009724: af00 add r7, sp, #0
8009726: 60f8 str r0, [r7, #12]
8009728: 60b9 str r1, [r7, #8]
800972a: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
800972c: 68bb ldr r3, [r7, #8]
800972e: f003 031f and.w r3, r3, #31
8009732: 2201 movs r2, #1
8009734: fa02 f303 lsl.w r3, r2, r3
8009738: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
800973a: 68fb ldr r3, [r7, #12]
800973c: 6a1a ldr r2, [r3, #32]
800973e: 697b ldr r3, [r7, #20]
8009740: 43db mvns r3, r3
8009742: 401a ands r2, r3
8009744: 68fb ldr r3, [r7, #12]
8009746: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8009748: 68fb ldr r3, [r7, #12]
800974a: 6a1a ldr r2, [r3, #32]
800974c: 68bb ldr r3, [r7, #8]
800974e: f003 031f and.w r3, r3, #31
8009752: 6879 ldr r1, [r7, #4]
8009754: fa01 f303 lsl.w r3, r1, r3
8009758: 431a orrs r2, r3
800975a: 68fb ldr r3, [r7, #12]
800975c: 621a str r2, [r3, #32]
}
800975e: bf00 nop
8009760: 371c adds r7, #28
8009762: 46bd mov sp, r7
8009764: bc80 pop {r7}
8009766: 4770 bx lr
08009768 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8009768: b480 push {r7}
800976a: b085 sub sp, #20
800976c: af00 add r7, sp, #0
800976e: 6078 str r0, [r7, #4]
8009770: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8009772: 687b ldr r3, [r7, #4]
8009774: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8009778: 2b01 cmp r3, #1
800977a: d101 bne.n 8009780 <HAL_TIMEx_MasterConfigSynchronization+0x18>
800977c: 2302 movs r3, #2
800977e: e046 b.n 800980e <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8009780: 687b ldr r3, [r7, #4]
8009782: 2201 movs r2, #1
8009784: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8009788: 687b ldr r3, [r7, #4]
800978a: 2202 movs r2, #2
800978c: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8009790: 687b ldr r3, [r7, #4]
8009792: 681b ldr r3, [r3, #0]
8009794: 685b ldr r3, [r3, #4]
8009796: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8009798: 687b ldr r3, [r7, #4]
800979a: 681b ldr r3, [r3, #0]
800979c: 689b ldr r3, [r3, #8]
800979e: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
80097a0: 68fb ldr r3, [r7, #12]
80097a2: f023 0370 bic.w r3, r3, #112 @ 0x70
80097a6: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
80097a8: 683b ldr r3, [r7, #0]
80097aa: 681b ldr r3, [r3, #0]
80097ac: 68fa ldr r2, [r7, #12]
80097ae: 4313 orrs r3, r2
80097b0: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
80097b2: 687b ldr r3, [r7, #4]
80097b4: 681b ldr r3, [r3, #0]
80097b6: 68fa ldr r2, [r7, #12]
80097b8: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
80097ba: 687b ldr r3, [r7, #4]
80097bc: 681b ldr r3, [r3, #0]
80097be: 4a16 ldr r2, [pc, #88] @ (8009818 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
80097c0: 4293 cmp r3, r2
80097c2: d00e beq.n 80097e2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80097c4: 687b ldr r3, [r7, #4]
80097c6: 681b ldr r3, [r3, #0]
80097c8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80097cc: d009 beq.n 80097e2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80097ce: 687b ldr r3, [r7, #4]
80097d0: 681b ldr r3, [r3, #0]
80097d2: 4a12 ldr r2, [pc, #72] @ (800981c <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
80097d4: 4293 cmp r3, r2
80097d6: d004 beq.n 80097e2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80097d8: 687b ldr r3, [r7, #4]
80097da: 681b ldr r3, [r3, #0]
80097dc: 4a10 ldr r2, [pc, #64] @ (8009820 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
80097de: 4293 cmp r3, r2
80097e0: d10c bne.n 80097fc <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
80097e2: 68bb ldr r3, [r7, #8]
80097e4: f023 0380 bic.w r3, r3, #128 @ 0x80
80097e8: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
80097ea: 683b ldr r3, [r7, #0]
80097ec: 685b ldr r3, [r3, #4]
80097ee: 68ba ldr r2, [r7, #8]
80097f0: 4313 orrs r3, r2
80097f2: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80097f4: 687b ldr r3, [r7, #4]
80097f6: 681b ldr r3, [r3, #0]
80097f8: 68ba ldr r2, [r7, #8]
80097fa: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
80097fc: 687b ldr r3, [r7, #4]
80097fe: 2201 movs r2, #1
8009800: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8009804: 687b ldr r3, [r7, #4]
8009806: 2200 movs r2, #0
8009808: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
800980c: 2300 movs r3, #0
}
800980e: 4618 mov r0, r3
8009810: 3714 adds r7, #20
8009812: 46bd mov sp, r7
8009814: bc80 pop {r7}
8009816: 4770 bx lr
8009818: 40012c00 .word 0x40012c00
800981c: 40000400 .word 0x40000400
8009820: 40000800 .word 0x40000800
08009824 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8009824: b580 push {r7, lr}
8009826: b082 sub sp, #8
8009828: af00 add r7, sp, #0
800982a: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
800982c: 687b ldr r3, [r7, #4]
800982e: 2b00 cmp r3, #0
8009830: d101 bne.n 8009836 <HAL_UART_Init+0x12>
{
return HAL_ERROR;
8009832: 2301 movs r3, #1
8009834: e042 b.n 80098bc <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
8009836: 687b ldr r3, [r7, #4]
8009838: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
800983c: b2db uxtb r3, r3
800983e: 2b00 cmp r3, #0
8009840: d106 bne.n 8009850 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
8009842: 687b ldr r3, [r7, #4]
8009844: 2200 movs r2, #0
8009846: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
800984a: 6878 ldr r0, [r7, #4]
800984c: f7fb fb80 bl 8004f50 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8009850: 687b ldr r3, [r7, #4]
8009852: 2224 movs r2, #36 @ 0x24
8009854: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
8009858: 687b ldr r3, [r7, #4]
800985a: 681b ldr r3, [r3, #0]
800985c: 68da ldr r2, [r3, #12]
800985e: 687b ldr r3, [r7, #4]
8009860: 681b ldr r3, [r3, #0]
8009862: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8009866: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
8009868: 6878 ldr r0, [r7, #4]
800986a: f000 f971 bl 8009b50 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
800986e: 687b ldr r3, [r7, #4]
8009870: 681b ldr r3, [r3, #0]
8009872: 691a ldr r2, [r3, #16]
8009874: 687b ldr r3, [r7, #4]
8009876: 681b ldr r3, [r3, #0]
8009878: f422 4290 bic.w r2, r2, #18432 @ 0x4800
800987c: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
800987e: 687b ldr r3, [r7, #4]
8009880: 681b ldr r3, [r3, #0]
8009882: 695a ldr r2, [r3, #20]
8009884: 687b ldr r3, [r7, #4]
8009886: 681b ldr r3, [r3, #0]
8009888: f022 022a bic.w r2, r2, #42 @ 0x2a
800988c: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
800988e: 687b ldr r3, [r7, #4]
8009890: 681b ldr r3, [r3, #0]
8009892: 68da ldr r2, [r3, #12]
8009894: 687b ldr r3, [r7, #4]
8009896: 681b ldr r3, [r3, #0]
8009898: f442 5200 orr.w r2, r2, #8192 @ 0x2000
800989c: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
800989e: 687b ldr r3, [r7, #4]
80098a0: 2200 movs r2, #0
80098a2: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
80098a4: 687b ldr r3, [r7, #4]
80098a6: 2220 movs r2, #32
80098a8: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
80098ac: 687b ldr r3, [r7, #4]
80098ae: 2220 movs r2, #32
80098b0: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
80098b4: 687b ldr r3, [r7, #4]
80098b6: 2200 movs r2, #0
80098b8: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
80098ba: 2300 movs r3, #0
}
80098bc: 4618 mov r0, r3
80098be: 3708 adds r7, #8
80098c0: 46bd mov sp, r7
80098c2: bd80 pop {r7, pc}
080098c4 <HAL_UART_Transmit>:
* @param Size Amount of data elements (u8 or u16) to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
80098c4: b580 push {r7, lr}
80098c6: b08a sub sp, #40 @ 0x28
80098c8: af02 add r7, sp, #8
80098ca: 60f8 str r0, [r7, #12]
80098cc: 60b9 str r1, [r7, #8]
80098ce: 603b str r3, [r7, #0]
80098d0: 4613 mov r3, r2
80098d2: 80fb strh r3, [r7, #6]
const uint8_t *pdata8bits;
const uint16_t *pdata16bits;
uint32_t tickstart = 0U;
80098d4: 2300 movs r3, #0
80098d6: 617b str r3, [r7, #20]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
80098d8: 68fb ldr r3, [r7, #12]
80098da: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80098de: b2db uxtb r3, r3
80098e0: 2b20 cmp r3, #32
80098e2: d175 bne.n 80099d0 <HAL_UART_Transmit+0x10c>
{
if ((pData == NULL) || (Size == 0U))
80098e4: 68bb ldr r3, [r7, #8]
80098e6: 2b00 cmp r3, #0
80098e8: d002 beq.n 80098f0 <HAL_UART_Transmit+0x2c>
80098ea: 88fb ldrh r3, [r7, #6]
80098ec: 2b00 cmp r3, #0
80098ee: d101 bne.n 80098f4 <HAL_UART_Transmit+0x30>
{
return HAL_ERROR;
80098f0: 2301 movs r3, #1
80098f2: e06e b.n 80099d2 <HAL_UART_Transmit+0x10e>
}
huart->ErrorCode = HAL_UART_ERROR_NONE;
80098f4: 68fb ldr r3, [r7, #12]
80098f6: 2200 movs r2, #0
80098f8: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_BUSY_TX;
80098fa: 68fb ldr r3, [r7, #12]
80098fc: 2221 movs r2, #33 @ 0x21
80098fe: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
8009902: f7fb fc6d bl 80051e0 <HAL_GetTick>
8009906: 6178 str r0, [r7, #20]
huart->TxXferSize = Size;
8009908: 68fb ldr r3, [r7, #12]
800990a: 88fa ldrh r2, [r7, #6]
800990c: 849a strh r2, [r3, #36] @ 0x24
huart->TxXferCount = Size;
800990e: 68fb ldr r3, [r7, #12]
8009910: 88fa ldrh r2, [r7, #6]
8009912: 84da strh r2, [r3, #38] @ 0x26
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
8009914: 68fb ldr r3, [r7, #12]
8009916: 689b ldr r3, [r3, #8]
8009918: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800991c: d108 bne.n 8009930 <HAL_UART_Transmit+0x6c>
800991e: 68fb ldr r3, [r7, #12]
8009920: 691b ldr r3, [r3, #16]
8009922: 2b00 cmp r3, #0
8009924: d104 bne.n 8009930 <HAL_UART_Transmit+0x6c>
{
pdata8bits = NULL;
8009926: 2300 movs r3, #0
8009928: 61fb str r3, [r7, #28]
pdata16bits = (const uint16_t *) pData;
800992a: 68bb ldr r3, [r7, #8]
800992c: 61bb str r3, [r7, #24]
800992e: e003 b.n 8009938 <HAL_UART_Transmit+0x74>
}
else
{
pdata8bits = pData;
8009930: 68bb ldr r3, [r7, #8]
8009932: 61fb str r3, [r7, #28]
pdata16bits = NULL;
8009934: 2300 movs r3, #0
8009936: 61bb str r3, [r7, #24]
}
while (huart->TxXferCount > 0U)
8009938: e02e b.n 8009998 <HAL_UART_Transmit+0xd4>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
800993a: 683b ldr r3, [r7, #0]
800993c: 9300 str r3, [sp, #0]
800993e: 697b ldr r3, [r7, #20]
8009940: 2200 movs r2, #0
8009942: 2180 movs r1, #128 @ 0x80
8009944: 68f8 ldr r0, [r7, #12]
8009946: f000 f848 bl 80099da <UART_WaitOnFlagUntilTimeout>
800994a: 4603 mov r3, r0
800994c: 2b00 cmp r3, #0
800994e: d005 beq.n 800995c <HAL_UART_Transmit+0x98>
{
huart->gState = HAL_UART_STATE_READY;
8009950: 68fb ldr r3, [r7, #12]
8009952: 2220 movs r2, #32
8009954: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
8009958: 2303 movs r3, #3
800995a: e03a b.n 80099d2 <HAL_UART_Transmit+0x10e>
}
if (pdata8bits == NULL)
800995c: 69fb ldr r3, [r7, #28]
800995e: 2b00 cmp r3, #0
8009960: d10b bne.n 800997a <HAL_UART_Transmit+0xb6>
{
huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
8009962: 69bb ldr r3, [r7, #24]
8009964: 881b ldrh r3, [r3, #0]
8009966: 461a mov r2, r3
8009968: 68fb ldr r3, [r7, #12]
800996a: 681b ldr r3, [r3, #0]
800996c: f3c2 0208 ubfx r2, r2, #0, #9
8009970: 605a str r2, [r3, #4]
pdata16bits++;
8009972: 69bb ldr r3, [r7, #24]
8009974: 3302 adds r3, #2
8009976: 61bb str r3, [r7, #24]
8009978: e007 b.n 800998a <HAL_UART_Transmit+0xc6>
}
else
{
huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
800997a: 69fb ldr r3, [r7, #28]
800997c: 781a ldrb r2, [r3, #0]
800997e: 68fb ldr r3, [r7, #12]
8009980: 681b ldr r3, [r3, #0]
8009982: 605a str r2, [r3, #4]
pdata8bits++;
8009984: 69fb ldr r3, [r7, #28]
8009986: 3301 adds r3, #1
8009988: 61fb str r3, [r7, #28]
}
huart->TxXferCount--;
800998a: 68fb ldr r3, [r7, #12]
800998c: 8cdb ldrh r3, [r3, #38] @ 0x26
800998e: b29b uxth r3, r3
8009990: 3b01 subs r3, #1
8009992: b29a uxth r2, r3
8009994: 68fb ldr r3, [r7, #12]
8009996: 84da strh r2, [r3, #38] @ 0x26
while (huart->TxXferCount > 0U)
8009998: 68fb ldr r3, [r7, #12]
800999a: 8cdb ldrh r3, [r3, #38] @ 0x26
800999c: b29b uxth r3, r3
800999e: 2b00 cmp r3, #0
80099a0: d1cb bne.n 800993a <HAL_UART_Transmit+0x76>
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
80099a2: 683b ldr r3, [r7, #0]
80099a4: 9300 str r3, [sp, #0]
80099a6: 697b ldr r3, [r7, #20]
80099a8: 2200 movs r2, #0
80099aa: 2140 movs r1, #64 @ 0x40
80099ac: 68f8 ldr r0, [r7, #12]
80099ae: f000 f814 bl 80099da <UART_WaitOnFlagUntilTimeout>
80099b2: 4603 mov r3, r0
80099b4: 2b00 cmp r3, #0
80099b6: d005 beq.n 80099c4 <HAL_UART_Transmit+0x100>
{
huart->gState = HAL_UART_STATE_READY;
80099b8: 68fb ldr r3, [r7, #12]
80099ba: 2220 movs r2, #32
80099bc: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
80099c0: 2303 movs r3, #3
80099c2: e006 b.n 80099d2 <HAL_UART_Transmit+0x10e>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
80099c4: 68fb ldr r3, [r7, #12]
80099c6: 2220 movs r2, #32
80099c8: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_OK;
80099cc: 2300 movs r3, #0
80099ce: e000 b.n 80099d2 <HAL_UART_Transmit+0x10e>
}
else
{
return HAL_BUSY;
80099d0: 2302 movs r3, #2
}
}
80099d2: 4618 mov r0, r3
80099d4: 3720 adds r7, #32
80099d6: 46bd mov sp, r7
80099d8: bd80 pop {r7, pc}
080099da <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
80099da: b580 push {r7, lr}
80099dc: b086 sub sp, #24
80099de: af00 add r7, sp, #0
80099e0: 60f8 str r0, [r7, #12]
80099e2: 60b9 str r1, [r7, #8]
80099e4: 603b str r3, [r7, #0]
80099e6: 4613 mov r3, r2
80099e8: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
80099ea: e03b b.n 8009a64 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
80099ec: 6a3b ldr r3, [r7, #32]
80099ee: f1b3 3fff cmp.w r3, #4294967295
80099f2: d037 beq.n 8009a64 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
80099f4: f7fb fbf4 bl 80051e0 <HAL_GetTick>
80099f8: 4602 mov r2, r0
80099fa: 683b ldr r3, [r7, #0]
80099fc: 1ad3 subs r3, r2, r3
80099fe: 6a3a ldr r2, [r7, #32]
8009a00: 429a cmp r2, r3
8009a02: d302 bcc.n 8009a0a <UART_WaitOnFlagUntilTimeout+0x30>
8009a04: 6a3b ldr r3, [r7, #32]
8009a06: 2b00 cmp r3, #0
8009a08: d101 bne.n 8009a0e <UART_WaitOnFlagUntilTimeout+0x34>
{
return HAL_TIMEOUT;
8009a0a: 2303 movs r3, #3
8009a0c: e03a b.n 8009a84 <UART_WaitOnFlagUntilTimeout+0xaa>
}
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
8009a0e: 68fb ldr r3, [r7, #12]
8009a10: 681b ldr r3, [r3, #0]
8009a12: 68db ldr r3, [r3, #12]
8009a14: f003 0304 and.w r3, r3, #4
8009a18: 2b00 cmp r3, #0
8009a1a: d023 beq.n 8009a64 <UART_WaitOnFlagUntilTimeout+0x8a>
8009a1c: 68bb ldr r3, [r7, #8]
8009a1e: 2b80 cmp r3, #128 @ 0x80
8009a20: d020 beq.n 8009a64 <UART_WaitOnFlagUntilTimeout+0x8a>
8009a22: 68bb ldr r3, [r7, #8]
8009a24: 2b40 cmp r3, #64 @ 0x40
8009a26: d01d beq.n 8009a64 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
8009a28: 68fb ldr r3, [r7, #12]
8009a2a: 681b ldr r3, [r3, #0]
8009a2c: 681b ldr r3, [r3, #0]
8009a2e: f003 0308 and.w r3, r3, #8
8009a32: 2b08 cmp r3, #8
8009a34: d116 bne.n 8009a64 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Clear Overrun Error flag*/
__HAL_UART_CLEAR_OREFLAG(huart);
8009a36: 2300 movs r3, #0
8009a38: 617b str r3, [r7, #20]
8009a3a: 68fb ldr r3, [r7, #12]
8009a3c: 681b ldr r3, [r3, #0]
8009a3e: 681b ldr r3, [r3, #0]
8009a40: 617b str r3, [r7, #20]
8009a42: 68fb ldr r3, [r7, #12]
8009a44: 681b ldr r3, [r3, #0]
8009a46: 685b ldr r3, [r3, #4]
8009a48: 617b str r3, [r7, #20]
8009a4a: 697b ldr r3, [r7, #20]
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
8009a4c: 68f8 ldr r0, [r7, #12]
8009a4e: f000 f81d bl 8009a8c <UART_EndRxTransfer>
huart->ErrorCode = HAL_UART_ERROR_ORE;
8009a52: 68fb ldr r3, [r7, #12]
8009a54: 2208 movs r2, #8
8009a56: 645a str r2, [r3, #68] @ 0x44
/* Process Unlocked */
__HAL_UNLOCK(huart);
8009a58: 68fb ldr r3, [r7, #12]
8009a5a: 2200 movs r2, #0
8009a5c: f883 2040 strb.w r2, [r3, #64] @ 0x40
return HAL_ERROR;
8009a60: 2301 movs r3, #1
8009a62: e00f b.n 8009a84 <UART_WaitOnFlagUntilTimeout+0xaa>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8009a64: 68fb ldr r3, [r7, #12]
8009a66: 681b ldr r3, [r3, #0]
8009a68: 681a ldr r2, [r3, #0]
8009a6a: 68bb ldr r3, [r7, #8]
8009a6c: 4013 ands r3, r2
8009a6e: 68ba ldr r2, [r7, #8]
8009a70: 429a cmp r2, r3
8009a72: bf0c ite eq
8009a74: 2301 moveq r3, #1
8009a76: 2300 movne r3, #0
8009a78: b2db uxtb r3, r3
8009a7a: 461a mov r2, r3
8009a7c: 79fb ldrb r3, [r7, #7]
8009a7e: 429a cmp r2, r3
8009a80: d0b4 beq.n 80099ec <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
8009a82: 2300 movs r3, #0
}
8009a84: 4618 mov r0, r3
8009a86: 3718 adds r7, #24
8009a88: 46bd mov sp, r7
8009a8a: bd80 pop {r7, pc}
08009a8c <UART_EndRxTransfer>:
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
* @param huart UART handle.
* @retval None
*/
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
8009a8c: b480 push {r7}
8009a8e: b095 sub sp, #84 @ 0x54
8009a90: af00 add r7, sp, #0
8009a92: 6078 str r0, [r7, #4]
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
8009a94: 687b ldr r3, [r7, #4]
8009a96: 681b ldr r3, [r3, #0]
8009a98: 330c adds r3, #12
8009a9a: 637b str r3, [r7, #52] @ 0x34
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009a9c: 6b7b ldr r3, [r7, #52] @ 0x34
8009a9e: e853 3f00 ldrex r3, [r3]
8009aa2: 633b str r3, [r7, #48] @ 0x30
return(result);
8009aa4: 6b3b ldr r3, [r7, #48] @ 0x30
8009aa6: f423 7390 bic.w r3, r3, #288 @ 0x120
8009aaa: 64fb str r3, [r7, #76] @ 0x4c
8009aac: 687b ldr r3, [r7, #4]
8009aae: 681b ldr r3, [r3, #0]
8009ab0: 330c adds r3, #12
8009ab2: 6cfa ldr r2, [r7, #76] @ 0x4c
8009ab4: 643a str r2, [r7, #64] @ 0x40
8009ab6: 63fb str r3, [r7, #60] @ 0x3c
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009ab8: 6bf9 ldr r1, [r7, #60] @ 0x3c
8009aba: 6c3a ldr r2, [r7, #64] @ 0x40
8009abc: e841 2300 strex r3, r2, [r1]
8009ac0: 63bb str r3, [r7, #56] @ 0x38
return(result);
8009ac2: 6bbb ldr r3, [r7, #56] @ 0x38
8009ac4: 2b00 cmp r3, #0
8009ac6: d1e5 bne.n 8009a94 <UART_EndRxTransfer+0x8>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8009ac8: 687b ldr r3, [r7, #4]
8009aca: 681b ldr r3, [r3, #0]
8009acc: 3314 adds r3, #20
8009ace: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009ad0: 6a3b ldr r3, [r7, #32]
8009ad2: e853 3f00 ldrex r3, [r3]
8009ad6: 61fb str r3, [r7, #28]
return(result);
8009ad8: 69fb ldr r3, [r7, #28]
8009ada: f023 0301 bic.w r3, r3, #1
8009ade: 64bb str r3, [r7, #72] @ 0x48
8009ae0: 687b ldr r3, [r7, #4]
8009ae2: 681b ldr r3, [r3, #0]
8009ae4: 3314 adds r3, #20
8009ae6: 6cba ldr r2, [r7, #72] @ 0x48
8009ae8: 62fa str r2, [r7, #44] @ 0x2c
8009aea: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009aec: 6ab9 ldr r1, [r7, #40] @ 0x28
8009aee: 6afa ldr r2, [r7, #44] @ 0x2c
8009af0: e841 2300 strex r3, r2, [r1]
8009af4: 627b str r3, [r7, #36] @ 0x24
return(result);
8009af6: 6a7b ldr r3, [r7, #36] @ 0x24
8009af8: 2b00 cmp r3, #0
8009afa: d1e5 bne.n 8009ac8 <UART_EndRxTransfer+0x3c>
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
8009afc: 687b ldr r3, [r7, #4]
8009afe: 6b1b ldr r3, [r3, #48] @ 0x30
8009b00: 2b01 cmp r3, #1
8009b02: d119 bne.n 8009b38 <UART_EndRxTransfer+0xac>
{
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
8009b04: 687b ldr r3, [r7, #4]
8009b06: 681b ldr r3, [r3, #0]
8009b08: 330c adds r3, #12
8009b0a: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009b0c: 68fb ldr r3, [r7, #12]
8009b0e: e853 3f00 ldrex r3, [r3]
8009b12: 60bb str r3, [r7, #8]
return(result);
8009b14: 68bb ldr r3, [r7, #8]
8009b16: f023 0310 bic.w r3, r3, #16
8009b1a: 647b str r3, [r7, #68] @ 0x44
8009b1c: 687b ldr r3, [r7, #4]
8009b1e: 681b ldr r3, [r3, #0]
8009b20: 330c adds r3, #12
8009b22: 6c7a ldr r2, [r7, #68] @ 0x44
8009b24: 61ba str r2, [r7, #24]
8009b26: 617b str r3, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009b28: 6979 ldr r1, [r7, #20]
8009b2a: 69ba ldr r2, [r7, #24]
8009b2c: e841 2300 strex r3, r2, [r1]
8009b30: 613b str r3, [r7, #16]
return(result);
8009b32: 693b ldr r3, [r7, #16]
8009b34: 2b00 cmp r3, #0
8009b36: d1e5 bne.n 8009b04 <UART_EndRxTransfer+0x78>
}
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
8009b38: 687b ldr r3, [r7, #4]
8009b3a: 2220 movs r2, #32
8009b3c: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8009b40: 687b ldr r3, [r7, #4]
8009b42: 2200 movs r2, #0
8009b44: 631a str r2, [r3, #48] @ 0x30
}
8009b46: bf00 nop
8009b48: 3754 adds r7, #84 @ 0x54
8009b4a: 46bd mov sp, r7
8009b4c: bc80 pop {r7}
8009b4e: 4770 bx lr
08009b50 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
8009b50: b580 push {r7, lr}
8009b52: b084 sub sp, #16
8009b54: af00 add r7, sp, #0
8009b56: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8009b58: 687b ldr r3, [r7, #4]
8009b5a: 681b ldr r3, [r3, #0]
8009b5c: 691b ldr r3, [r3, #16]
8009b5e: f423 5140 bic.w r1, r3, #12288 @ 0x3000
8009b62: 687b ldr r3, [r7, #4]
8009b64: 68da ldr r2, [r3, #12]
8009b66: 687b ldr r3, [r7, #4]
8009b68: 681b ldr r3, [r3, #0]
8009b6a: 430a orrs r2, r1
8009b6c: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
8009b6e: 687b ldr r3, [r7, #4]
8009b70: 689a ldr r2, [r3, #8]
8009b72: 687b ldr r3, [r7, #4]
8009b74: 691b ldr r3, [r3, #16]
8009b76: 431a orrs r2, r3
8009b78: 687b ldr r3, [r7, #4]
8009b7a: 695b ldr r3, [r3, #20]
8009b7c: 4313 orrs r3, r2
8009b7e: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8009b80: 687b ldr r3, [r7, #4]
8009b82: 681b ldr r3, [r3, #0]
8009b84: 68db ldr r3, [r3, #12]
8009b86: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
8009b8a: f023 030c bic.w r3, r3, #12
8009b8e: 687a ldr r2, [r7, #4]
8009b90: 6812 ldr r2, [r2, #0]
8009b92: 68b9 ldr r1, [r7, #8]
8009b94: 430b orrs r3, r1
8009b96: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8009b98: 687b ldr r3, [r7, #4]
8009b9a: 681b ldr r3, [r3, #0]
8009b9c: 695b ldr r3, [r3, #20]
8009b9e: f423 7140 bic.w r1, r3, #768 @ 0x300
8009ba2: 687b ldr r3, [r7, #4]
8009ba4: 699a ldr r2, [r3, #24]
8009ba6: 687b ldr r3, [r7, #4]
8009ba8: 681b ldr r3, [r3, #0]
8009baa: 430a orrs r2, r1
8009bac: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8009bae: 687b ldr r3, [r7, #4]
8009bb0: 681b ldr r3, [r3, #0]
8009bb2: 4a2c ldr r2, [pc, #176] @ (8009c64 <UART_SetConfig+0x114>)
8009bb4: 4293 cmp r3, r2
8009bb6: d103 bne.n 8009bc0 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8009bb8: f7fe fede bl 8008978 <HAL_RCC_GetPCLK2Freq>
8009bbc: 60f8 str r0, [r7, #12]
8009bbe: e002 b.n 8009bc6 <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8009bc0: f7fe fec6 bl 8008950 <HAL_RCC_GetPCLK1Freq>
8009bc4: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8009bc6: 68fa ldr r2, [r7, #12]
8009bc8: 4613 mov r3, r2
8009bca: 009b lsls r3, r3, #2
8009bcc: 4413 add r3, r2
8009bce: 009a lsls r2, r3, #2
8009bd0: 441a add r2, r3
8009bd2: 687b ldr r3, [r7, #4]
8009bd4: 685b ldr r3, [r3, #4]
8009bd6: 009b lsls r3, r3, #2
8009bd8: fbb2 f3f3 udiv r3, r2, r3
8009bdc: 4a22 ldr r2, [pc, #136] @ (8009c68 <UART_SetConfig+0x118>)
8009bde: fba2 2303 umull r2, r3, r2, r3
8009be2: 095b lsrs r3, r3, #5
8009be4: 0119 lsls r1, r3, #4
8009be6: 68fa ldr r2, [r7, #12]
8009be8: 4613 mov r3, r2
8009bea: 009b lsls r3, r3, #2
8009bec: 4413 add r3, r2
8009bee: 009a lsls r2, r3, #2
8009bf0: 441a add r2, r3
8009bf2: 687b ldr r3, [r7, #4]
8009bf4: 685b ldr r3, [r3, #4]
8009bf6: 009b lsls r3, r3, #2
8009bf8: fbb2 f2f3 udiv r2, r2, r3
8009bfc: 4b1a ldr r3, [pc, #104] @ (8009c68 <UART_SetConfig+0x118>)
8009bfe: fba3 0302 umull r0, r3, r3, r2
8009c02: 095b lsrs r3, r3, #5
8009c04: 2064 movs r0, #100 @ 0x64
8009c06: fb00 f303 mul.w r3, r0, r3
8009c0a: 1ad3 subs r3, r2, r3
8009c0c: 011b lsls r3, r3, #4
8009c0e: 3332 adds r3, #50 @ 0x32
8009c10: 4a15 ldr r2, [pc, #84] @ (8009c68 <UART_SetConfig+0x118>)
8009c12: fba2 2303 umull r2, r3, r2, r3
8009c16: 095b lsrs r3, r3, #5
8009c18: f003 03f0 and.w r3, r3, #240 @ 0xf0
8009c1c: 4419 add r1, r3
8009c1e: 68fa ldr r2, [r7, #12]
8009c20: 4613 mov r3, r2
8009c22: 009b lsls r3, r3, #2
8009c24: 4413 add r3, r2
8009c26: 009a lsls r2, r3, #2
8009c28: 441a add r2, r3
8009c2a: 687b ldr r3, [r7, #4]
8009c2c: 685b ldr r3, [r3, #4]
8009c2e: 009b lsls r3, r3, #2
8009c30: fbb2 f2f3 udiv r2, r2, r3
8009c34: 4b0c ldr r3, [pc, #48] @ (8009c68 <UART_SetConfig+0x118>)
8009c36: fba3 0302 umull r0, r3, r3, r2
8009c3a: 095b lsrs r3, r3, #5
8009c3c: 2064 movs r0, #100 @ 0x64
8009c3e: fb00 f303 mul.w r3, r0, r3
8009c42: 1ad3 subs r3, r2, r3
8009c44: 011b lsls r3, r3, #4
8009c46: 3332 adds r3, #50 @ 0x32
8009c48: 4a07 ldr r2, [pc, #28] @ (8009c68 <UART_SetConfig+0x118>)
8009c4a: fba2 2303 umull r2, r3, r2, r3
8009c4e: 095b lsrs r3, r3, #5
8009c50: f003 020f and.w r2, r3, #15
8009c54: 687b ldr r3, [r7, #4]
8009c56: 681b ldr r3, [r3, #0]
8009c58: 440a add r2, r1
8009c5a: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
8009c5c: bf00 nop
8009c5e: 3710 adds r7, #16
8009c60: 46bd mov sp, r7
8009c62: bd80 pop {r7, pc}
8009c64: 40013800 .word 0x40013800
8009c68: 51eb851f .word 0x51eb851f
08009c6c <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009c6c: b480 push {r7}
8009c6e: b085 sub sp, #20
8009c70: af00 add r7, sp, #0
8009c72: 60f8 str r0, [r7, #12]
8009c74: 4638 mov r0, r7
8009c76: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8009c7a: 2300 movs r3, #0
}
8009c7c: 4618 mov r0, r3
8009c7e: 3714 adds r7, #20
8009c80: 46bd mov sp, r7
8009c82: bc80 pop {r7}
8009c84: 4770 bx lr
08009c86 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8009c86: b480 push {r7}
8009c88: b085 sub sp, #20
8009c8a: af00 add r7, sp, #0
8009c8c: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009c8e: 687b ldr r3, [r7, #4]
8009c90: 2200 movs r2, #0
8009c92: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8009c96: f44f 433f mov.w r3, #48896 @ 0xbf00
8009c9a: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8009c9c: 68fb ldr r3, [r7, #12]
8009c9e: b29a uxth r2, r3
8009ca0: 687b ldr r3, [r7, #4]
8009ca2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8009ca6: 2300 movs r3, #0
}
8009ca8: 4618 mov r0, r3
8009caa: 3714 adds r7, #20
8009cac: 46bd mov sp, r7
8009cae: bc80 pop {r7}
8009cb0: 4770 bx lr
08009cb2 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8009cb2: b480 push {r7}
8009cb4: b085 sub sp, #20
8009cb6: af00 add r7, sp, #0
8009cb8: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8009cba: f44f 433f mov.w r3, #48896 @ 0xbf00
8009cbe: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8009cc0: 687b ldr r3, [r7, #4]
8009cc2: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8009cc6: b29a uxth r2, r3
8009cc8: 68fb ldr r3, [r7, #12]
8009cca: b29b uxth r3, r3
8009ccc: 43db mvns r3, r3
8009cce: b29b uxth r3, r3
8009cd0: 4013 ands r3, r2
8009cd2: b29a uxth r2, r3
8009cd4: 687b ldr r3, [r7, #4]
8009cd6: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8009cda: 2300 movs r3, #0
}
8009cdc: 4618 mov r0, r3
8009cde: 3714 adds r7, #20
8009ce0: 46bd mov sp, r7
8009ce2: bc80 pop {r7}
8009ce4: 4770 bx lr
08009ce6 <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8009ce6: b480 push {r7}
8009ce8: b083 sub sp, #12
8009cea: af00 add r7, sp, #0
8009cec: 6078 str r0, [r7, #4]
8009cee: 460b mov r3, r1
8009cf0: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8009cf2: 2300 movs r3, #0
}
8009cf4: 4618 mov r0, r3
8009cf6: 370c adds r7, #12
8009cf8: 46bd mov sp, r7
8009cfa: bc80 pop {r7}
8009cfc: 4770 bx lr
08009cfe <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009cfe: b480 push {r7}
8009d00: b085 sub sp, #20
8009d02: af00 add r7, sp, #0
8009d04: 60f8 str r0, [r7, #12]
8009d06: 4638 mov r0, r7
8009d08: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8009d0c: 68fb ldr r3, [r7, #12]
8009d0e: 2201 movs r2, #1
8009d10: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
8009d14: 68fb ldr r3, [r7, #12]
8009d16: 2200 movs r2, #0
8009d18: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009d1c: 68fb ldr r3, [r7, #12]
8009d1e: 2200 movs r2, #0
8009d20: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
8009d24: 68fb ldr r3, [r7, #12]
8009d26: 2200 movs r2, #0
8009d28: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8009d2c: 2300 movs r3, #0
}
8009d2e: 4618 mov r0, r3
8009d30: 3714 adds r7, #20
8009d32: 46bd mov sp, r7
8009d34: bc80 pop {r7}
8009d36: 4770 bx lr
08009d38 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8009d38: b480 push {r7}
8009d3a: b09d sub sp, #116 @ 0x74
8009d3c: af00 add r7, sp, #0
8009d3e: 6078 str r0, [r7, #4]
8009d40: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
8009d42: 2300 movs r3, #0
8009d44: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
8009d48: 687a ldr r2, [r7, #4]
8009d4a: 683b ldr r3, [r7, #0]
8009d4c: 781b ldrb r3, [r3, #0]
8009d4e: 009b lsls r3, r3, #2
8009d50: 4413 add r3, r2
8009d52: 881b ldrh r3, [r3, #0]
8009d54: b29b uxth r3, r3
8009d56: f423 43ec bic.w r3, r3, #30208 @ 0x7600
8009d5a: f023 0370 bic.w r3, r3, #112 @ 0x70
8009d5e: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
8009d62: 683b ldr r3, [r7, #0]
8009d64: 78db ldrb r3, [r3, #3]
8009d66: 2b03 cmp r3, #3
8009d68: d81f bhi.n 8009daa <USB_ActivateEndpoint+0x72>
8009d6a: a201 add r2, pc, #4 @ (adr r2, 8009d70 <USB_ActivateEndpoint+0x38>)
8009d6c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009d70: 08009d81 .word 0x08009d81
8009d74: 08009d9d .word 0x08009d9d
8009d78: 08009db3 .word 0x08009db3
8009d7c: 08009d8f .word 0x08009d8f
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8009d80: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009d84: f443 7300 orr.w r3, r3, #512 @ 0x200
8009d88: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009d8c: e012 b.n 8009db4 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8009d8e: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009d92: f443 63c0 orr.w r3, r3, #1536 @ 0x600
8009d96: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009d9a: e00b b.n 8009db4 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8009d9c: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009da0: f443 6380 orr.w r3, r3, #1024 @ 0x400
8009da4: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009da8: e004 b.n 8009db4 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
8009daa: 2301 movs r3, #1
8009dac: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8009db0: e000 b.n 8009db4 <USB_ActivateEndpoint+0x7c>
break;
8009db2: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8009db4: 687a ldr r2, [r7, #4]
8009db6: 683b ldr r3, [r7, #0]
8009db8: 781b ldrb r3, [r3, #0]
8009dba: 009b lsls r3, r3, #2
8009dbc: 441a add r2, r3
8009dbe: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009dc2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009dc6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009dca: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009dce: f043 0380 orr.w r3, r3, #128 @ 0x80
8009dd2: b29b uxth r3, r3
8009dd4: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8009dd6: 687a ldr r2, [r7, #4]
8009dd8: 683b ldr r3, [r7, #0]
8009dda: 781b ldrb r3, [r3, #0]
8009ddc: 009b lsls r3, r3, #2
8009dde: 4413 add r3, r2
8009de0: 881b ldrh r3, [r3, #0]
8009de2: b29b uxth r3, r3
8009de4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009de8: f023 0370 bic.w r3, r3, #112 @ 0x70
8009dec: b29b uxth r3, r3
8009dee: 683a ldr r2, [r7, #0]
8009df0: 7812 ldrb r2, [r2, #0]
8009df2: 4313 orrs r3, r2
8009df4: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
8009df8: 687a ldr r2, [r7, #4]
8009dfa: 683b ldr r3, [r7, #0]
8009dfc: 781b ldrb r3, [r3, #0]
8009dfe: 009b lsls r3, r3, #2
8009e00: 441a add r2, r3
8009e02: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
8009e06: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009e0a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e0e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009e12: f043 0380 orr.w r3, r3, #128 @ 0x80
8009e16: b29b uxth r3, r3
8009e18: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
8009e1a: 683b ldr r3, [r7, #0]
8009e1c: 7b1b ldrb r3, [r3, #12]
8009e1e: 2b00 cmp r3, #0
8009e20: f040 8178 bne.w 800a114 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8009e24: 683b ldr r3, [r7, #0]
8009e26: 785b ldrb r3, [r3, #1]
8009e28: 2b00 cmp r3, #0
8009e2a: f000 8084 beq.w 8009f36 <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8009e2e: 687b ldr r3, [r7, #4]
8009e30: 61bb str r3, [r7, #24]
8009e32: 687b ldr r3, [r7, #4]
8009e34: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009e38: b29b uxth r3, r3
8009e3a: 461a mov r2, r3
8009e3c: 69bb ldr r3, [r7, #24]
8009e3e: 4413 add r3, r2
8009e40: 61bb str r3, [r7, #24]
8009e42: 683b ldr r3, [r7, #0]
8009e44: 781b ldrb r3, [r3, #0]
8009e46: 011a lsls r2, r3, #4
8009e48: 69bb ldr r3, [r7, #24]
8009e4a: 4413 add r3, r2
8009e4c: f503 6380 add.w r3, r3, #1024 @ 0x400
8009e50: 617b str r3, [r7, #20]
8009e52: 683b ldr r3, [r7, #0]
8009e54: 88db ldrh r3, [r3, #6]
8009e56: 085b lsrs r3, r3, #1
8009e58: b29b uxth r3, r3
8009e5a: 005b lsls r3, r3, #1
8009e5c: b29a uxth r2, r3
8009e5e: 697b ldr r3, [r7, #20]
8009e60: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009e62: 687a ldr r2, [r7, #4]
8009e64: 683b ldr r3, [r7, #0]
8009e66: 781b ldrb r3, [r3, #0]
8009e68: 009b lsls r3, r3, #2
8009e6a: 4413 add r3, r2
8009e6c: 881b ldrh r3, [r3, #0]
8009e6e: 827b strh r3, [r7, #18]
8009e70: 8a7b ldrh r3, [r7, #18]
8009e72: f003 0340 and.w r3, r3, #64 @ 0x40
8009e76: 2b00 cmp r3, #0
8009e78: d01b beq.n 8009eb2 <USB_ActivateEndpoint+0x17a>
8009e7a: 687a ldr r2, [r7, #4]
8009e7c: 683b ldr r3, [r7, #0]
8009e7e: 781b ldrb r3, [r3, #0]
8009e80: 009b lsls r3, r3, #2
8009e82: 4413 add r3, r2
8009e84: 881b ldrh r3, [r3, #0]
8009e86: b29b uxth r3, r3
8009e88: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009e8c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009e90: 823b strh r3, [r7, #16]
8009e92: 687a ldr r2, [r7, #4]
8009e94: 683b ldr r3, [r7, #0]
8009e96: 781b ldrb r3, [r3, #0]
8009e98: 009b lsls r3, r3, #2
8009e9a: 441a add r2, r3
8009e9c: 8a3b ldrh r3, [r7, #16]
8009e9e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009ea2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009ea6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009eaa: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009eae: b29b uxth r3, r3
8009eb0: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8009eb2: 683b ldr r3, [r7, #0]
8009eb4: 78db ldrb r3, [r3, #3]
8009eb6: 2b01 cmp r3, #1
8009eb8: d020 beq.n 8009efc <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8009eba: 687a ldr r2, [r7, #4]
8009ebc: 683b ldr r3, [r7, #0]
8009ebe: 781b ldrb r3, [r3, #0]
8009ec0: 009b lsls r3, r3, #2
8009ec2: 4413 add r3, r2
8009ec4: 881b ldrh r3, [r3, #0]
8009ec6: b29b uxth r3, r3
8009ec8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009ecc: f023 0340 bic.w r3, r3, #64 @ 0x40
8009ed0: 81bb strh r3, [r7, #12]
8009ed2: 89bb ldrh r3, [r7, #12]
8009ed4: f083 0320 eor.w r3, r3, #32
8009ed8: 81bb strh r3, [r7, #12]
8009eda: 687a ldr r2, [r7, #4]
8009edc: 683b ldr r3, [r7, #0]
8009ede: 781b ldrb r3, [r3, #0]
8009ee0: 009b lsls r3, r3, #2
8009ee2: 441a add r2, r3
8009ee4: 89bb ldrh r3, [r7, #12]
8009ee6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009eea: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009eee: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009ef2: f043 0380 orr.w r3, r3, #128 @ 0x80
8009ef6: b29b uxth r3, r3
8009ef8: 8013 strh r3, [r2, #0]
8009efa: e2d5 b.n 800a4a8 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009efc: 687a ldr r2, [r7, #4]
8009efe: 683b ldr r3, [r7, #0]
8009f00: 781b ldrb r3, [r3, #0]
8009f02: 009b lsls r3, r3, #2
8009f04: 4413 add r3, r2
8009f06: 881b ldrh r3, [r3, #0]
8009f08: b29b uxth r3, r3
8009f0a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009f0e: f023 0340 bic.w r3, r3, #64 @ 0x40
8009f12: 81fb strh r3, [r7, #14]
8009f14: 687a ldr r2, [r7, #4]
8009f16: 683b ldr r3, [r7, #0]
8009f18: 781b ldrb r3, [r3, #0]
8009f1a: 009b lsls r3, r3, #2
8009f1c: 441a add r2, r3
8009f1e: 89fb ldrh r3, [r7, #14]
8009f20: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009f24: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009f28: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009f2c: f043 0380 orr.w r3, r3, #128 @ 0x80
8009f30: b29b uxth r3, r3
8009f32: 8013 strh r3, [r2, #0]
8009f34: e2b8 b.n 800a4a8 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
8009f36: 687b ldr r3, [r7, #4]
8009f38: 633b str r3, [r7, #48] @ 0x30
8009f3a: 687b ldr r3, [r7, #4]
8009f3c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009f40: b29b uxth r3, r3
8009f42: 461a mov r2, r3
8009f44: 6b3b ldr r3, [r7, #48] @ 0x30
8009f46: 4413 add r3, r2
8009f48: 633b str r3, [r7, #48] @ 0x30
8009f4a: 683b ldr r3, [r7, #0]
8009f4c: 781b ldrb r3, [r3, #0]
8009f4e: 011a lsls r2, r3, #4
8009f50: 6b3b ldr r3, [r7, #48] @ 0x30
8009f52: 4413 add r3, r2
8009f54: f503 6381 add.w r3, r3, #1032 @ 0x408
8009f58: 62fb str r3, [r7, #44] @ 0x2c
8009f5a: 683b ldr r3, [r7, #0]
8009f5c: 88db ldrh r3, [r3, #6]
8009f5e: 085b lsrs r3, r3, #1
8009f60: b29b uxth r3, r3
8009f62: 005b lsls r3, r3, #1
8009f64: b29a uxth r2, r3
8009f66: 6afb ldr r3, [r7, #44] @ 0x2c
8009f68: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
8009f6a: 687b ldr r3, [r7, #4]
8009f6c: 62bb str r3, [r7, #40] @ 0x28
8009f6e: 687b ldr r3, [r7, #4]
8009f70: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009f74: b29b uxth r3, r3
8009f76: 461a mov r2, r3
8009f78: 6abb ldr r3, [r7, #40] @ 0x28
8009f7a: 4413 add r3, r2
8009f7c: 62bb str r3, [r7, #40] @ 0x28
8009f7e: 683b ldr r3, [r7, #0]
8009f80: 781b ldrb r3, [r3, #0]
8009f82: 011a lsls r2, r3, #4
8009f84: 6abb ldr r3, [r7, #40] @ 0x28
8009f86: 4413 add r3, r2
8009f88: f203 430c addw r3, r3, #1036 @ 0x40c
8009f8c: 627b str r3, [r7, #36] @ 0x24
8009f8e: 6a7b ldr r3, [r7, #36] @ 0x24
8009f90: 881b ldrh r3, [r3, #0]
8009f92: b29b uxth r3, r3
8009f94: f3c3 0309 ubfx r3, r3, #0, #10
8009f98: b29a uxth r2, r3
8009f9a: 6a7b ldr r3, [r7, #36] @ 0x24
8009f9c: 801a strh r2, [r3, #0]
8009f9e: 683b ldr r3, [r7, #0]
8009fa0: 691b ldr r3, [r3, #16]
8009fa2: 2b3e cmp r3, #62 @ 0x3e
8009fa4: d91d bls.n 8009fe2 <USB_ActivateEndpoint+0x2aa>
8009fa6: 683b ldr r3, [r7, #0]
8009fa8: 691b ldr r3, [r3, #16]
8009faa: 095b lsrs r3, r3, #5
8009fac: 66bb str r3, [r7, #104] @ 0x68
8009fae: 683b ldr r3, [r7, #0]
8009fb0: 691b ldr r3, [r3, #16]
8009fb2: f003 031f and.w r3, r3, #31
8009fb6: 2b00 cmp r3, #0
8009fb8: d102 bne.n 8009fc0 <USB_ActivateEndpoint+0x288>
8009fba: 6ebb ldr r3, [r7, #104] @ 0x68
8009fbc: 3b01 subs r3, #1
8009fbe: 66bb str r3, [r7, #104] @ 0x68
8009fc0: 6a7b ldr r3, [r7, #36] @ 0x24
8009fc2: 881b ldrh r3, [r3, #0]
8009fc4: b29a uxth r2, r3
8009fc6: 6ebb ldr r3, [r7, #104] @ 0x68
8009fc8: b29b uxth r3, r3
8009fca: 029b lsls r3, r3, #10
8009fcc: b29b uxth r3, r3
8009fce: 4313 orrs r3, r2
8009fd0: b29b uxth r3, r3
8009fd2: ea6f 4343 mvn.w r3, r3, lsl #17
8009fd6: ea6f 4353 mvn.w r3, r3, lsr #17
8009fda: b29a uxth r2, r3
8009fdc: 6a7b ldr r3, [r7, #36] @ 0x24
8009fde: 801a strh r2, [r3, #0]
8009fe0: e026 b.n 800a030 <USB_ActivateEndpoint+0x2f8>
8009fe2: 683b ldr r3, [r7, #0]
8009fe4: 691b ldr r3, [r3, #16]
8009fe6: 2b00 cmp r3, #0
8009fe8: d10a bne.n 800a000 <USB_ActivateEndpoint+0x2c8>
8009fea: 6a7b ldr r3, [r7, #36] @ 0x24
8009fec: 881b ldrh r3, [r3, #0]
8009fee: b29b uxth r3, r3
8009ff0: ea6f 4343 mvn.w r3, r3, lsl #17
8009ff4: ea6f 4353 mvn.w r3, r3, lsr #17
8009ff8: b29a uxth r2, r3
8009ffa: 6a7b ldr r3, [r7, #36] @ 0x24
8009ffc: 801a strh r2, [r3, #0]
8009ffe: e017 b.n 800a030 <USB_ActivateEndpoint+0x2f8>
800a000: 683b ldr r3, [r7, #0]
800a002: 691b ldr r3, [r3, #16]
800a004: 085b lsrs r3, r3, #1
800a006: 66bb str r3, [r7, #104] @ 0x68
800a008: 683b ldr r3, [r7, #0]
800a00a: 691b ldr r3, [r3, #16]
800a00c: f003 0301 and.w r3, r3, #1
800a010: 2b00 cmp r3, #0
800a012: d002 beq.n 800a01a <USB_ActivateEndpoint+0x2e2>
800a014: 6ebb ldr r3, [r7, #104] @ 0x68
800a016: 3301 adds r3, #1
800a018: 66bb str r3, [r7, #104] @ 0x68
800a01a: 6a7b ldr r3, [r7, #36] @ 0x24
800a01c: 881b ldrh r3, [r3, #0]
800a01e: b29a uxth r2, r3
800a020: 6ebb ldr r3, [r7, #104] @ 0x68
800a022: b29b uxth r3, r3
800a024: 029b lsls r3, r3, #10
800a026: b29b uxth r3, r3
800a028: 4313 orrs r3, r2
800a02a: b29a uxth r2, r3
800a02c: 6a7b ldr r3, [r7, #36] @ 0x24
800a02e: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a030: 687a ldr r2, [r7, #4]
800a032: 683b ldr r3, [r7, #0]
800a034: 781b ldrb r3, [r3, #0]
800a036: 009b lsls r3, r3, #2
800a038: 4413 add r3, r2
800a03a: 881b ldrh r3, [r3, #0]
800a03c: 847b strh r3, [r7, #34] @ 0x22
800a03e: 8c7b ldrh r3, [r7, #34] @ 0x22
800a040: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a044: 2b00 cmp r3, #0
800a046: d01b beq.n 800a080 <USB_ActivateEndpoint+0x348>
800a048: 687a ldr r2, [r7, #4]
800a04a: 683b ldr r3, [r7, #0]
800a04c: 781b ldrb r3, [r3, #0]
800a04e: 009b lsls r3, r3, #2
800a050: 4413 add r3, r2
800a052: 881b ldrh r3, [r3, #0]
800a054: b29b uxth r3, r3
800a056: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a05a: f023 0370 bic.w r3, r3, #112 @ 0x70
800a05e: 843b strh r3, [r7, #32]
800a060: 687a ldr r2, [r7, #4]
800a062: 683b ldr r3, [r7, #0]
800a064: 781b ldrb r3, [r3, #0]
800a066: 009b lsls r3, r3, #2
800a068: 441a add r2, r3
800a06a: 8c3b ldrh r3, [r7, #32]
800a06c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a070: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a074: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a078: f043 0380 orr.w r3, r3, #128 @ 0x80
800a07c: b29b uxth r3, r3
800a07e: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
800a080: 683b ldr r3, [r7, #0]
800a082: 781b ldrb r3, [r3, #0]
800a084: 2b00 cmp r3, #0
800a086: d124 bne.n 800a0d2 <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800a088: 687a ldr r2, [r7, #4]
800a08a: 683b ldr r3, [r7, #0]
800a08c: 781b ldrb r3, [r3, #0]
800a08e: 009b lsls r3, r3, #2
800a090: 4413 add r3, r2
800a092: 881b ldrh r3, [r3, #0]
800a094: b29b uxth r3, r3
800a096: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a09a: f023 0370 bic.w r3, r3, #112 @ 0x70
800a09e: 83bb strh r3, [r7, #28]
800a0a0: 8bbb ldrh r3, [r7, #28]
800a0a2: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800a0a6: 83bb strh r3, [r7, #28]
800a0a8: 8bbb ldrh r3, [r7, #28]
800a0aa: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a0ae: 83bb strh r3, [r7, #28]
800a0b0: 687a ldr r2, [r7, #4]
800a0b2: 683b ldr r3, [r7, #0]
800a0b4: 781b ldrb r3, [r3, #0]
800a0b6: 009b lsls r3, r3, #2
800a0b8: 441a add r2, r3
800a0ba: 8bbb ldrh r3, [r7, #28]
800a0bc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a0c0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a0c4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a0c8: f043 0380 orr.w r3, r3, #128 @ 0x80
800a0cc: b29b uxth r3, r3
800a0ce: 8013 strh r3, [r2, #0]
800a0d0: e1ea b.n 800a4a8 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
800a0d2: 687a ldr r2, [r7, #4]
800a0d4: 683b ldr r3, [r7, #0]
800a0d6: 781b ldrb r3, [r3, #0]
800a0d8: 009b lsls r3, r3, #2
800a0da: 4413 add r3, r2
800a0dc: 881b ldrh r3, [r3, #0]
800a0de: b29b uxth r3, r3
800a0e0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a0e4: f023 0370 bic.w r3, r3, #112 @ 0x70
800a0e8: 83fb strh r3, [r7, #30]
800a0ea: 8bfb ldrh r3, [r7, #30]
800a0ec: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a0f0: 83fb strh r3, [r7, #30]
800a0f2: 687a ldr r2, [r7, #4]
800a0f4: 683b ldr r3, [r7, #0]
800a0f6: 781b ldrb r3, [r3, #0]
800a0f8: 009b lsls r3, r3, #2
800a0fa: 441a add r2, r3
800a0fc: 8bfb ldrh r3, [r7, #30]
800a0fe: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a102: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a106: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a10a: f043 0380 orr.w r3, r3, #128 @ 0x80
800a10e: b29b uxth r3, r3
800a110: 8013 strh r3, [r2, #0]
800a112: e1c9 b.n 800a4a8 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
800a114: 683b ldr r3, [r7, #0]
800a116: 78db ldrb r3, [r3, #3]
800a118: 2b02 cmp r3, #2
800a11a: d11e bne.n 800a15a <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800a11c: 687a ldr r2, [r7, #4]
800a11e: 683b ldr r3, [r7, #0]
800a120: 781b ldrb r3, [r3, #0]
800a122: 009b lsls r3, r3, #2
800a124: 4413 add r3, r2
800a126: 881b ldrh r3, [r3, #0]
800a128: b29b uxth r3, r3
800a12a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a12e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a132: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800a136: 687a ldr r2, [r7, #4]
800a138: 683b ldr r3, [r7, #0]
800a13a: 781b ldrb r3, [r3, #0]
800a13c: 009b lsls r3, r3, #2
800a13e: 441a add r2, r3
800a140: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800a144: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a148: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a14c: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800a150: f043 0380 orr.w r3, r3, #128 @ 0x80
800a154: b29b uxth r3, r3
800a156: 8013 strh r3, [r2, #0]
800a158: e01d b.n 800a196 <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
800a15a: 687a ldr r2, [r7, #4]
800a15c: 683b ldr r3, [r7, #0]
800a15e: 781b ldrb r3, [r3, #0]
800a160: 009b lsls r3, r3, #2
800a162: 4413 add r3, r2
800a164: 881b ldrh r3, [r3, #0]
800a166: b29b uxth r3, r3
800a168: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800a16c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a170: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
800a174: 687a ldr r2, [r7, #4]
800a176: 683b ldr r3, [r7, #0]
800a178: 781b ldrb r3, [r3, #0]
800a17a: 009b lsls r3, r3, #2
800a17c: 441a add r2, r3
800a17e: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
800a182: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a186: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a18a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a18e: f043 0380 orr.w r3, r3, #128 @ 0x80
800a192: b29b uxth r3, r3
800a194: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
800a196: 687b ldr r3, [r7, #4]
800a198: 65fb str r3, [r7, #92] @ 0x5c
800a19a: 687b ldr r3, [r7, #4]
800a19c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a1a0: b29b uxth r3, r3
800a1a2: 461a mov r2, r3
800a1a4: 6dfb ldr r3, [r7, #92] @ 0x5c
800a1a6: 4413 add r3, r2
800a1a8: 65fb str r3, [r7, #92] @ 0x5c
800a1aa: 683b ldr r3, [r7, #0]
800a1ac: 781b ldrb r3, [r3, #0]
800a1ae: 011a lsls r2, r3, #4
800a1b0: 6dfb ldr r3, [r7, #92] @ 0x5c
800a1b2: 4413 add r3, r2
800a1b4: f503 6380 add.w r3, r3, #1024 @ 0x400
800a1b8: 65bb str r3, [r7, #88] @ 0x58
800a1ba: 683b ldr r3, [r7, #0]
800a1bc: 891b ldrh r3, [r3, #8]
800a1be: 085b lsrs r3, r3, #1
800a1c0: b29b uxth r3, r3
800a1c2: 005b lsls r3, r3, #1
800a1c4: b29a uxth r2, r3
800a1c6: 6dbb ldr r3, [r7, #88] @ 0x58
800a1c8: 801a strh r2, [r3, #0]
800a1ca: 687b ldr r3, [r7, #4]
800a1cc: 657b str r3, [r7, #84] @ 0x54
800a1ce: 687b ldr r3, [r7, #4]
800a1d0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a1d4: b29b uxth r3, r3
800a1d6: 461a mov r2, r3
800a1d8: 6d7b ldr r3, [r7, #84] @ 0x54
800a1da: 4413 add r3, r2
800a1dc: 657b str r3, [r7, #84] @ 0x54
800a1de: 683b ldr r3, [r7, #0]
800a1e0: 781b ldrb r3, [r3, #0]
800a1e2: 011a lsls r2, r3, #4
800a1e4: 6d7b ldr r3, [r7, #84] @ 0x54
800a1e6: 4413 add r3, r2
800a1e8: f503 6381 add.w r3, r3, #1032 @ 0x408
800a1ec: 653b str r3, [r7, #80] @ 0x50
800a1ee: 683b ldr r3, [r7, #0]
800a1f0: 895b ldrh r3, [r3, #10]
800a1f2: 085b lsrs r3, r3, #1
800a1f4: b29b uxth r3, r3
800a1f6: 005b lsls r3, r3, #1
800a1f8: b29a uxth r2, r3
800a1fa: 6d3b ldr r3, [r7, #80] @ 0x50
800a1fc: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
800a1fe: 683b ldr r3, [r7, #0]
800a200: 785b ldrb r3, [r3, #1]
800a202: 2b00 cmp r3, #0
800a204: f040 8093 bne.w 800a32e <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a208: 687a ldr r2, [r7, #4]
800a20a: 683b ldr r3, [r7, #0]
800a20c: 781b ldrb r3, [r3, #0]
800a20e: 009b lsls r3, r3, #2
800a210: 4413 add r3, r2
800a212: 881b ldrh r3, [r3, #0]
800a214: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
800a218: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
800a21c: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a220: 2b00 cmp r3, #0
800a222: d01b beq.n 800a25c <USB_ActivateEndpoint+0x524>
800a224: 687a ldr r2, [r7, #4]
800a226: 683b ldr r3, [r7, #0]
800a228: 781b ldrb r3, [r3, #0]
800a22a: 009b lsls r3, r3, #2
800a22c: 4413 add r3, r2
800a22e: 881b ldrh r3, [r3, #0]
800a230: b29b uxth r3, r3
800a232: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a236: f023 0370 bic.w r3, r3, #112 @ 0x70
800a23a: 87fb strh r3, [r7, #62] @ 0x3e
800a23c: 687a ldr r2, [r7, #4]
800a23e: 683b ldr r3, [r7, #0]
800a240: 781b ldrb r3, [r3, #0]
800a242: 009b lsls r3, r3, #2
800a244: 441a add r2, r3
800a246: 8ffb ldrh r3, [r7, #62] @ 0x3e
800a248: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a24c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a250: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a254: f043 0380 orr.w r3, r3, #128 @ 0x80
800a258: b29b uxth r3, r3
800a25a: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a25c: 687a ldr r2, [r7, #4]
800a25e: 683b ldr r3, [r7, #0]
800a260: 781b ldrb r3, [r3, #0]
800a262: 009b lsls r3, r3, #2
800a264: 4413 add r3, r2
800a266: 881b ldrh r3, [r3, #0]
800a268: 87bb strh r3, [r7, #60] @ 0x3c
800a26a: 8fbb ldrh r3, [r7, #60] @ 0x3c
800a26c: f003 0340 and.w r3, r3, #64 @ 0x40
800a270: 2b00 cmp r3, #0
800a272: d01b beq.n 800a2ac <USB_ActivateEndpoint+0x574>
800a274: 687a ldr r2, [r7, #4]
800a276: 683b ldr r3, [r7, #0]
800a278: 781b ldrb r3, [r3, #0]
800a27a: 009b lsls r3, r3, #2
800a27c: 4413 add r3, r2
800a27e: 881b ldrh r3, [r3, #0]
800a280: b29b uxth r3, r3
800a282: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a286: f023 0370 bic.w r3, r3, #112 @ 0x70
800a28a: 877b strh r3, [r7, #58] @ 0x3a
800a28c: 687a ldr r2, [r7, #4]
800a28e: 683b ldr r3, [r7, #0]
800a290: 781b ldrb r3, [r3, #0]
800a292: 009b lsls r3, r3, #2
800a294: 441a add r2, r3
800a296: 8f7b ldrh r3, [r7, #58] @ 0x3a
800a298: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a29c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a2a0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a2a4: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a2a8: b29b uxth r3, r3
800a2aa: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800a2ac: 687a ldr r2, [r7, #4]
800a2ae: 683b ldr r3, [r7, #0]
800a2b0: 781b ldrb r3, [r3, #0]
800a2b2: 009b lsls r3, r3, #2
800a2b4: 4413 add r3, r2
800a2b6: 881b ldrh r3, [r3, #0]
800a2b8: b29b uxth r3, r3
800a2ba: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a2be: f023 0370 bic.w r3, r3, #112 @ 0x70
800a2c2: 873b strh r3, [r7, #56] @ 0x38
800a2c4: 8f3b ldrh r3, [r7, #56] @ 0x38
800a2c6: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800a2ca: 873b strh r3, [r7, #56] @ 0x38
800a2cc: 8f3b ldrh r3, [r7, #56] @ 0x38
800a2ce: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a2d2: 873b strh r3, [r7, #56] @ 0x38
800a2d4: 687a ldr r2, [r7, #4]
800a2d6: 683b ldr r3, [r7, #0]
800a2d8: 781b ldrb r3, [r3, #0]
800a2da: 009b lsls r3, r3, #2
800a2dc: 441a add r2, r3
800a2de: 8f3b ldrh r3, [r7, #56] @ 0x38
800a2e0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a2e4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a2e8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a2ec: f043 0380 orr.w r3, r3, #128 @ 0x80
800a2f0: b29b uxth r3, r3
800a2f2: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a2f4: 687a ldr r2, [r7, #4]
800a2f6: 683b ldr r3, [r7, #0]
800a2f8: 781b ldrb r3, [r3, #0]
800a2fa: 009b lsls r3, r3, #2
800a2fc: 4413 add r3, r2
800a2fe: 881b ldrh r3, [r3, #0]
800a300: b29b uxth r3, r3
800a302: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a306: f023 0340 bic.w r3, r3, #64 @ 0x40
800a30a: 86fb strh r3, [r7, #54] @ 0x36
800a30c: 687a ldr r2, [r7, #4]
800a30e: 683b ldr r3, [r7, #0]
800a310: 781b ldrb r3, [r3, #0]
800a312: 009b lsls r3, r3, #2
800a314: 441a add r2, r3
800a316: 8efb ldrh r3, [r7, #54] @ 0x36
800a318: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a31c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a320: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a324: f043 0380 orr.w r3, r3, #128 @ 0x80
800a328: b29b uxth r3, r3
800a32a: 8013 strh r3, [r2, #0]
800a32c: e0bc b.n 800a4a8 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a32e: 687a ldr r2, [r7, #4]
800a330: 683b ldr r3, [r7, #0]
800a332: 781b ldrb r3, [r3, #0]
800a334: 009b lsls r3, r3, #2
800a336: 4413 add r3, r2
800a338: 881b ldrh r3, [r3, #0]
800a33a: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
800a33e: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800a342: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a346: 2b00 cmp r3, #0
800a348: d01d beq.n 800a386 <USB_ActivateEndpoint+0x64e>
800a34a: 687a ldr r2, [r7, #4]
800a34c: 683b ldr r3, [r7, #0]
800a34e: 781b ldrb r3, [r3, #0]
800a350: 009b lsls r3, r3, #2
800a352: 4413 add r3, r2
800a354: 881b ldrh r3, [r3, #0]
800a356: b29b uxth r3, r3
800a358: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a35c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a360: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
800a364: 687a ldr r2, [r7, #4]
800a366: 683b ldr r3, [r7, #0]
800a368: 781b ldrb r3, [r3, #0]
800a36a: 009b lsls r3, r3, #2
800a36c: 441a add r2, r3
800a36e: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
800a372: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a376: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a37a: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a37e: f043 0380 orr.w r3, r3, #128 @ 0x80
800a382: b29b uxth r3, r3
800a384: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a386: 687a ldr r2, [r7, #4]
800a388: 683b ldr r3, [r7, #0]
800a38a: 781b ldrb r3, [r3, #0]
800a38c: 009b lsls r3, r3, #2
800a38e: 4413 add r3, r2
800a390: 881b ldrh r3, [r3, #0]
800a392: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
800a396: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800a39a: f003 0340 and.w r3, r3, #64 @ 0x40
800a39e: 2b00 cmp r3, #0
800a3a0: d01d beq.n 800a3de <USB_ActivateEndpoint+0x6a6>
800a3a2: 687a ldr r2, [r7, #4]
800a3a4: 683b ldr r3, [r7, #0]
800a3a6: 781b ldrb r3, [r3, #0]
800a3a8: 009b lsls r3, r3, #2
800a3aa: 4413 add r3, r2
800a3ac: 881b ldrh r3, [r3, #0]
800a3ae: b29b uxth r3, r3
800a3b0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a3b4: f023 0370 bic.w r3, r3, #112 @ 0x70
800a3b8: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
800a3bc: 687a ldr r2, [r7, #4]
800a3be: 683b ldr r3, [r7, #0]
800a3c0: 781b ldrb r3, [r3, #0]
800a3c2: 009b lsls r3, r3, #2
800a3c4: 441a add r2, r3
800a3c6: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
800a3ca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a3ce: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a3d2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a3d6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a3da: b29b uxth r3, r3
800a3dc: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800a3de: 683b ldr r3, [r7, #0]
800a3e0: 78db ldrb r3, [r3, #3]
800a3e2: 2b01 cmp r3, #1
800a3e4: d024 beq.n 800a430 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800a3e6: 687a ldr r2, [r7, #4]
800a3e8: 683b ldr r3, [r7, #0]
800a3ea: 781b ldrb r3, [r3, #0]
800a3ec: 009b lsls r3, r3, #2
800a3ee: 4413 add r3, r2
800a3f0: 881b ldrh r3, [r3, #0]
800a3f2: b29b uxth r3, r3
800a3f4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a3f8: f023 0340 bic.w r3, r3, #64 @ 0x40
800a3fc: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800a400: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800a404: f083 0320 eor.w r3, r3, #32
800a408: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800a40c: 687a ldr r2, [r7, #4]
800a40e: 683b ldr r3, [r7, #0]
800a410: 781b ldrb r3, [r3, #0]
800a412: 009b lsls r3, r3, #2
800a414: 441a add r2, r3
800a416: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800a41a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a41e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a422: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a426: f043 0380 orr.w r3, r3, #128 @ 0x80
800a42a: b29b uxth r3, r3
800a42c: 8013 strh r3, [r2, #0]
800a42e: e01d b.n 800a46c <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a430: 687a ldr r2, [r7, #4]
800a432: 683b ldr r3, [r7, #0]
800a434: 781b ldrb r3, [r3, #0]
800a436: 009b lsls r3, r3, #2
800a438: 4413 add r3, r2
800a43a: 881b ldrh r3, [r3, #0]
800a43c: b29b uxth r3, r3
800a43e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a442: f023 0340 bic.w r3, r3, #64 @ 0x40
800a446: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
800a44a: 687a ldr r2, [r7, #4]
800a44c: 683b ldr r3, [r7, #0]
800a44e: 781b ldrb r3, [r3, #0]
800a450: 009b lsls r3, r3, #2
800a452: 441a add r2, r3
800a454: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800a458: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a45c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a460: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a464: f043 0380 orr.w r3, r3, #128 @ 0x80
800a468: b29b uxth r3, r3
800a46a: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a46c: 687a ldr r2, [r7, #4]
800a46e: 683b ldr r3, [r7, #0]
800a470: 781b ldrb r3, [r3, #0]
800a472: 009b lsls r3, r3, #2
800a474: 4413 add r3, r2
800a476: 881b ldrh r3, [r3, #0]
800a478: b29b uxth r3, r3
800a47a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a47e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a482: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
800a486: 687a ldr r2, [r7, #4]
800a488: 683b ldr r3, [r7, #0]
800a48a: 781b ldrb r3, [r3, #0]
800a48c: 009b lsls r3, r3, #2
800a48e: 441a add r2, r3
800a490: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
800a494: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a498: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a49c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a4a0: f043 0380 orr.w r3, r3, #128 @ 0x80
800a4a4: b29b uxth r3, r3
800a4a6: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
800a4a8: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
800a4ac: 4618 mov r0, r3
800a4ae: 3774 adds r7, #116 @ 0x74
800a4b0: 46bd mov sp, r7
800a4b2: bc80 pop {r7}
800a4b4: 4770 bx lr
800a4b6: bf00 nop
0800a4b8 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a4b8: b480 push {r7}
800a4ba: b08d sub sp, #52 @ 0x34
800a4bc: af00 add r7, sp, #0
800a4be: 6078 str r0, [r7, #4]
800a4c0: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800a4c2: 683b ldr r3, [r7, #0]
800a4c4: 7b1b ldrb r3, [r3, #12]
800a4c6: 2b00 cmp r3, #0
800a4c8: f040 808e bne.w 800a5e8 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
800a4cc: 683b ldr r3, [r7, #0]
800a4ce: 785b ldrb r3, [r3, #1]
800a4d0: 2b00 cmp r3, #0
800a4d2: d044 beq.n 800a55e <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a4d4: 687a ldr r2, [r7, #4]
800a4d6: 683b ldr r3, [r7, #0]
800a4d8: 781b ldrb r3, [r3, #0]
800a4da: 009b lsls r3, r3, #2
800a4dc: 4413 add r3, r2
800a4de: 881b ldrh r3, [r3, #0]
800a4e0: 81bb strh r3, [r7, #12]
800a4e2: 89bb ldrh r3, [r7, #12]
800a4e4: f003 0340 and.w r3, r3, #64 @ 0x40
800a4e8: 2b00 cmp r3, #0
800a4ea: d01b beq.n 800a524 <USB_DeactivateEndpoint+0x6c>
800a4ec: 687a ldr r2, [r7, #4]
800a4ee: 683b ldr r3, [r7, #0]
800a4f0: 781b ldrb r3, [r3, #0]
800a4f2: 009b lsls r3, r3, #2
800a4f4: 4413 add r3, r2
800a4f6: 881b ldrh r3, [r3, #0]
800a4f8: b29b uxth r3, r3
800a4fa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a4fe: f023 0370 bic.w r3, r3, #112 @ 0x70
800a502: 817b strh r3, [r7, #10]
800a504: 687a ldr r2, [r7, #4]
800a506: 683b ldr r3, [r7, #0]
800a508: 781b ldrb r3, [r3, #0]
800a50a: 009b lsls r3, r3, #2
800a50c: 441a add r2, r3
800a50e: 897b ldrh r3, [r7, #10]
800a510: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a514: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a518: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a51c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a520: b29b uxth r3, r3
800a522: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a524: 687a ldr r2, [r7, #4]
800a526: 683b ldr r3, [r7, #0]
800a528: 781b ldrb r3, [r3, #0]
800a52a: 009b lsls r3, r3, #2
800a52c: 4413 add r3, r2
800a52e: 881b ldrh r3, [r3, #0]
800a530: b29b uxth r3, r3
800a532: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a536: f023 0340 bic.w r3, r3, #64 @ 0x40
800a53a: 813b strh r3, [r7, #8]
800a53c: 687a ldr r2, [r7, #4]
800a53e: 683b ldr r3, [r7, #0]
800a540: 781b ldrb r3, [r3, #0]
800a542: 009b lsls r3, r3, #2
800a544: 441a add r2, r3
800a546: 893b ldrh r3, [r7, #8]
800a548: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a54c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a550: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a554: f043 0380 orr.w r3, r3, #128 @ 0x80
800a558: b29b uxth r3, r3
800a55a: 8013 strh r3, [r2, #0]
800a55c: e192 b.n 800a884 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a55e: 687a ldr r2, [r7, #4]
800a560: 683b ldr r3, [r7, #0]
800a562: 781b ldrb r3, [r3, #0]
800a564: 009b lsls r3, r3, #2
800a566: 4413 add r3, r2
800a568: 881b ldrh r3, [r3, #0]
800a56a: 827b strh r3, [r7, #18]
800a56c: 8a7b ldrh r3, [r7, #18]
800a56e: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a572: 2b00 cmp r3, #0
800a574: d01b beq.n 800a5ae <USB_DeactivateEndpoint+0xf6>
800a576: 687a ldr r2, [r7, #4]
800a578: 683b ldr r3, [r7, #0]
800a57a: 781b ldrb r3, [r3, #0]
800a57c: 009b lsls r3, r3, #2
800a57e: 4413 add r3, r2
800a580: 881b ldrh r3, [r3, #0]
800a582: b29b uxth r3, r3
800a584: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a588: f023 0370 bic.w r3, r3, #112 @ 0x70
800a58c: 823b strh r3, [r7, #16]
800a58e: 687a ldr r2, [r7, #4]
800a590: 683b ldr r3, [r7, #0]
800a592: 781b ldrb r3, [r3, #0]
800a594: 009b lsls r3, r3, #2
800a596: 441a add r2, r3
800a598: 8a3b ldrh r3, [r7, #16]
800a59a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a59e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a5a2: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a5a6: f043 0380 orr.w r3, r3, #128 @ 0x80
800a5aa: b29b uxth r3, r3
800a5ac: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a5ae: 687a ldr r2, [r7, #4]
800a5b0: 683b ldr r3, [r7, #0]
800a5b2: 781b ldrb r3, [r3, #0]
800a5b4: 009b lsls r3, r3, #2
800a5b6: 4413 add r3, r2
800a5b8: 881b ldrh r3, [r3, #0]
800a5ba: b29b uxth r3, r3
800a5bc: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a5c0: f023 0370 bic.w r3, r3, #112 @ 0x70
800a5c4: 81fb strh r3, [r7, #14]
800a5c6: 687a ldr r2, [r7, #4]
800a5c8: 683b ldr r3, [r7, #0]
800a5ca: 781b ldrb r3, [r3, #0]
800a5cc: 009b lsls r3, r3, #2
800a5ce: 441a add r2, r3
800a5d0: 89fb ldrh r3, [r7, #14]
800a5d2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a5d6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a5da: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a5de: f043 0380 orr.w r3, r3, #128 @ 0x80
800a5e2: b29b uxth r3, r3
800a5e4: 8013 strh r3, [r2, #0]
800a5e6: e14d b.n 800a884 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
800a5e8: 683b ldr r3, [r7, #0]
800a5ea: 785b ldrb r3, [r3, #1]
800a5ec: 2b00 cmp r3, #0
800a5ee: f040 80a5 bne.w 800a73c <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a5f2: 687a ldr r2, [r7, #4]
800a5f4: 683b ldr r3, [r7, #0]
800a5f6: 781b ldrb r3, [r3, #0]
800a5f8: 009b lsls r3, r3, #2
800a5fa: 4413 add r3, r2
800a5fc: 881b ldrh r3, [r3, #0]
800a5fe: 843b strh r3, [r7, #32]
800a600: 8c3b ldrh r3, [r7, #32]
800a602: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a606: 2b00 cmp r3, #0
800a608: d01b beq.n 800a642 <USB_DeactivateEndpoint+0x18a>
800a60a: 687a ldr r2, [r7, #4]
800a60c: 683b ldr r3, [r7, #0]
800a60e: 781b ldrb r3, [r3, #0]
800a610: 009b lsls r3, r3, #2
800a612: 4413 add r3, r2
800a614: 881b ldrh r3, [r3, #0]
800a616: b29b uxth r3, r3
800a618: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a61c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a620: 83fb strh r3, [r7, #30]
800a622: 687a ldr r2, [r7, #4]
800a624: 683b ldr r3, [r7, #0]
800a626: 781b ldrb r3, [r3, #0]
800a628: 009b lsls r3, r3, #2
800a62a: 441a add r2, r3
800a62c: 8bfb ldrh r3, [r7, #30]
800a62e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a632: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a636: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a63a: f043 0380 orr.w r3, r3, #128 @ 0x80
800a63e: b29b uxth r3, r3
800a640: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a642: 687a ldr r2, [r7, #4]
800a644: 683b ldr r3, [r7, #0]
800a646: 781b ldrb r3, [r3, #0]
800a648: 009b lsls r3, r3, #2
800a64a: 4413 add r3, r2
800a64c: 881b ldrh r3, [r3, #0]
800a64e: 83bb strh r3, [r7, #28]
800a650: 8bbb ldrh r3, [r7, #28]
800a652: f003 0340 and.w r3, r3, #64 @ 0x40
800a656: 2b00 cmp r3, #0
800a658: d01b beq.n 800a692 <USB_DeactivateEndpoint+0x1da>
800a65a: 687a ldr r2, [r7, #4]
800a65c: 683b ldr r3, [r7, #0]
800a65e: 781b ldrb r3, [r3, #0]
800a660: 009b lsls r3, r3, #2
800a662: 4413 add r3, r2
800a664: 881b ldrh r3, [r3, #0]
800a666: b29b uxth r3, r3
800a668: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a66c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a670: 837b strh r3, [r7, #26]
800a672: 687a ldr r2, [r7, #4]
800a674: 683b ldr r3, [r7, #0]
800a676: 781b ldrb r3, [r3, #0]
800a678: 009b lsls r3, r3, #2
800a67a: 441a add r2, r3
800a67c: 8b7b ldrh r3, [r7, #26]
800a67e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a682: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a686: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a68a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a68e: b29b uxth r3, r3
800a690: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
800a692: 687a ldr r2, [r7, #4]
800a694: 683b ldr r3, [r7, #0]
800a696: 781b ldrb r3, [r3, #0]
800a698: 009b lsls r3, r3, #2
800a69a: 4413 add r3, r2
800a69c: 881b ldrh r3, [r3, #0]
800a69e: b29b uxth r3, r3
800a6a0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a6a4: f023 0370 bic.w r3, r3, #112 @ 0x70
800a6a8: 833b strh r3, [r7, #24]
800a6aa: 687a ldr r2, [r7, #4]
800a6ac: 683b ldr r3, [r7, #0]
800a6ae: 781b ldrb r3, [r3, #0]
800a6b0: 009b lsls r3, r3, #2
800a6b2: 441a add r2, r3
800a6b4: 8b3b ldrh r3, [r7, #24]
800a6b6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a6ba: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a6be: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a6c2: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a6c6: b29b uxth r3, r3
800a6c8: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a6ca: 687a ldr r2, [r7, #4]
800a6cc: 683b ldr r3, [r7, #0]
800a6ce: 781b ldrb r3, [r3, #0]
800a6d0: 009b lsls r3, r3, #2
800a6d2: 4413 add r3, r2
800a6d4: 881b ldrh r3, [r3, #0]
800a6d6: b29b uxth r3, r3
800a6d8: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a6dc: f023 0370 bic.w r3, r3, #112 @ 0x70
800a6e0: 82fb strh r3, [r7, #22]
800a6e2: 687a ldr r2, [r7, #4]
800a6e4: 683b ldr r3, [r7, #0]
800a6e6: 781b ldrb r3, [r3, #0]
800a6e8: 009b lsls r3, r3, #2
800a6ea: 441a add r2, r3
800a6ec: 8afb ldrh r3, [r7, #22]
800a6ee: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a6f2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a6f6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a6fa: f043 0380 orr.w r3, r3, #128 @ 0x80
800a6fe: b29b uxth r3, r3
800a700: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a702: 687a ldr r2, [r7, #4]
800a704: 683b ldr r3, [r7, #0]
800a706: 781b ldrb r3, [r3, #0]
800a708: 009b lsls r3, r3, #2
800a70a: 4413 add r3, r2
800a70c: 881b ldrh r3, [r3, #0]
800a70e: b29b uxth r3, r3
800a710: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a714: f023 0340 bic.w r3, r3, #64 @ 0x40
800a718: 82bb strh r3, [r7, #20]
800a71a: 687a ldr r2, [r7, #4]
800a71c: 683b ldr r3, [r7, #0]
800a71e: 781b ldrb r3, [r3, #0]
800a720: 009b lsls r3, r3, #2
800a722: 441a add r2, r3
800a724: 8abb ldrh r3, [r7, #20]
800a726: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a72a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a72e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a732: f043 0380 orr.w r3, r3, #128 @ 0x80
800a736: b29b uxth r3, r3
800a738: 8013 strh r3, [r2, #0]
800a73a: e0a3 b.n 800a884 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a73c: 687a ldr r2, [r7, #4]
800a73e: 683b ldr r3, [r7, #0]
800a740: 781b ldrb r3, [r3, #0]
800a742: 009b lsls r3, r3, #2
800a744: 4413 add r3, r2
800a746: 881b ldrh r3, [r3, #0]
800a748: 85fb strh r3, [r7, #46] @ 0x2e
800a74a: 8dfb ldrh r3, [r7, #46] @ 0x2e
800a74c: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a750: 2b00 cmp r3, #0
800a752: d01b beq.n 800a78c <USB_DeactivateEndpoint+0x2d4>
800a754: 687a ldr r2, [r7, #4]
800a756: 683b ldr r3, [r7, #0]
800a758: 781b ldrb r3, [r3, #0]
800a75a: 009b lsls r3, r3, #2
800a75c: 4413 add r3, r2
800a75e: 881b ldrh r3, [r3, #0]
800a760: b29b uxth r3, r3
800a762: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a766: f023 0370 bic.w r3, r3, #112 @ 0x70
800a76a: 85bb strh r3, [r7, #44] @ 0x2c
800a76c: 687a ldr r2, [r7, #4]
800a76e: 683b ldr r3, [r7, #0]
800a770: 781b ldrb r3, [r3, #0]
800a772: 009b lsls r3, r3, #2
800a774: 441a add r2, r3
800a776: 8dbb ldrh r3, [r7, #44] @ 0x2c
800a778: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a77c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a780: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a784: f043 0380 orr.w r3, r3, #128 @ 0x80
800a788: b29b uxth r3, r3
800a78a: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a78c: 687a ldr r2, [r7, #4]
800a78e: 683b ldr r3, [r7, #0]
800a790: 781b ldrb r3, [r3, #0]
800a792: 009b lsls r3, r3, #2
800a794: 4413 add r3, r2
800a796: 881b ldrh r3, [r3, #0]
800a798: 857b strh r3, [r7, #42] @ 0x2a
800a79a: 8d7b ldrh r3, [r7, #42] @ 0x2a
800a79c: f003 0340 and.w r3, r3, #64 @ 0x40
800a7a0: 2b00 cmp r3, #0
800a7a2: d01b beq.n 800a7dc <USB_DeactivateEndpoint+0x324>
800a7a4: 687a ldr r2, [r7, #4]
800a7a6: 683b ldr r3, [r7, #0]
800a7a8: 781b ldrb r3, [r3, #0]
800a7aa: 009b lsls r3, r3, #2
800a7ac: 4413 add r3, r2
800a7ae: 881b ldrh r3, [r3, #0]
800a7b0: b29b uxth r3, r3
800a7b2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a7b6: f023 0370 bic.w r3, r3, #112 @ 0x70
800a7ba: 853b strh r3, [r7, #40] @ 0x28
800a7bc: 687a ldr r2, [r7, #4]
800a7be: 683b ldr r3, [r7, #0]
800a7c0: 781b ldrb r3, [r3, #0]
800a7c2: 009b lsls r3, r3, #2
800a7c4: 441a add r2, r3
800a7c6: 8d3b ldrh r3, [r7, #40] @ 0x28
800a7c8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a7cc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a7d0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a7d4: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a7d8: b29b uxth r3, r3
800a7da: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
800a7dc: 687a ldr r2, [r7, #4]
800a7de: 683b ldr r3, [r7, #0]
800a7e0: 781b ldrb r3, [r3, #0]
800a7e2: 009b lsls r3, r3, #2
800a7e4: 4413 add r3, r2
800a7e6: 881b ldrh r3, [r3, #0]
800a7e8: b29b uxth r3, r3
800a7ea: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a7ee: f023 0370 bic.w r3, r3, #112 @ 0x70
800a7f2: 84fb strh r3, [r7, #38] @ 0x26
800a7f4: 687a ldr r2, [r7, #4]
800a7f6: 683b ldr r3, [r7, #0]
800a7f8: 781b ldrb r3, [r3, #0]
800a7fa: 009b lsls r3, r3, #2
800a7fc: 441a add r2, r3
800a7fe: 8cfb ldrh r3, [r7, #38] @ 0x26
800a800: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a804: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a808: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a80c: f043 0380 orr.w r3, r3, #128 @ 0x80
800a810: b29b uxth r3, r3
800a812: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a814: 687a ldr r2, [r7, #4]
800a816: 683b ldr r3, [r7, #0]
800a818: 781b ldrb r3, [r3, #0]
800a81a: 009b lsls r3, r3, #2
800a81c: 4413 add r3, r2
800a81e: 881b ldrh r3, [r3, #0]
800a820: b29b uxth r3, r3
800a822: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a826: f023 0340 bic.w r3, r3, #64 @ 0x40
800a82a: 84bb strh r3, [r7, #36] @ 0x24
800a82c: 687a ldr r2, [r7, #4]
800a82e: 683b ldr r3, [r7, #0]
800a830: 781b ldrb r3, [r3, #0]
800a832: 009b lsls r3, r3, #2
800a834: 441a add r2, r3
800a836: 8cbb ldrh r3, [r7, #36] @ 0x24
800a838: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a83c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a840: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a844: f043 0380 orr.w r3, r3, #128 @ 0x80
800a848: b29b uxth r3, r3
800a84a: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a84c: 687a ldr r2, [r7, #4]
800a84e: 683b ldr r3, [r7, #0]
800a850: 781b ldrb r3, [r3, #0]
800a852: 009b lsls r3, r3, #2
800a854: 4413 add r3, r2
800a856: 881b ldrh r3, [r3, #0]
800a858: b29b uxth r3, r3
800a85a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a85e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a862: 847b strh r3, [r7, #34] @ 0x22
800a864: 687a ldr r2, [r7, #4]
800a866: 683b ldr r3, [r7, #0]
800a868: 781b ldrb r3, [r3, #0]
800a86a: 009b lsls r3, r3, #2
800a86c: 441a add r2, r3
800a86e: 8c7b ldrh r3, [r7, #34] @ 0x22
800a870: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a874: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a878: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a87c: f043 0380 orr.w r3, r3, #128 @ 0x80
800a880: b29b uxth r3, r3
800a882: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
800a884: 2300 movs r3, #0
}
800a886: 4618 mov r0, r3
800a888: 3734 adds r7, #52 @ 0x34
800a88a: 46bd mov sp, r7
800a88c: bc80 pop {r7}
800a88e: 4770 bx lr
0800a890 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a890: b580 push {r7, lr}
800a892: b0c2 sub sp, #264 @ 0x108
800a894: af00 add r7, sp, #0
800a896: f507 7384 add.w r3, r7, #264 @ 0x108
800a89a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a89e: 6018 str r0, [r3, #0]
800a8a0: f507 7384 add.w r3, r7, #264 @ 0x108
800a8a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8a8: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
800a8aa: f507 7384 add.w r3, r7, #264 @ 0x108
800a8ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8b2: 681b ldr r3, [r3, #0]
800a8b4: 785b ldrb r3, [r3, #1]
800a8b6: 2b01 cmp r3, #1
800a8b8: f040 86b7 bne.w 800b62a <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
800a8bc: f507 7384 add.w r3, r7, #264 @ 0x108
800a8c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8c4: 681b ldr r3, [r3, #0]
800a8c6: 699a ldr r2, [r3, #24]
800a8c8: f507 7384 add.w r3, r7, #264 @ 0x108
800a8cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8d0: 681b ldr r3, [r3, #0]
800a8d2: 691b ldr r3, [r3, #16]
800a8d4: 429a cmp r2, r3
800a8d6: d908 bls.n 800a8ea <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
800a8d8: f507 7384 add.w r3, r7, #264 @ 0x108
800a8dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8e0: 681b ldr r3, [r3, #0]
800a8e2: 691b ldr r3, [r3, #16]
800a8e4: f8c7 3104 str.w r3, [r7, #260] @ 0x104
800a8e8: e007 b.n 800a8fa <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
800a8ea: f507 7384 add.w r3, r7, #264 @ 0x108
800a8ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8f2: 681b ldr r3, [r3, #0]
800a8f4: 699b ldr r3, [r3, #24]
800a8f6: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
800a8fa: f507 7384 add.w r3, r7, #264 @ 0x108
800a8fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a902: 681b ldr r3, [r3, #0]
800a904: 7b1b ldrb r3, [r3, #12]
800a906: 2b00 cmp r3, #0
800a908: d13a bne.n 800a980 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
800a90a: f507 7384 add.w r3, r7, #264 @ 0x108
800a90e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a912: 681b ldr r3, [r3, #0]
800a914: 6959 ldr r1, [r3, #20]
800a916: f507 7384 add.w r3, r7, #264 @ 0x108
800a91a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a91e: 681b ldr r3, [r3, #0]
800a920: 88da ldrh r2, [r3, #6]
800a922: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a926: b29b uxth r3, r3
800a928: f507 7084 add.w r0, r7, #264 @ 0x108
800a92c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a930: 6800 ldr r0, [r0, #0]
800a932: f001 fc9c bl 800c26e <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800a936: f507 7384 add.w r3, r7, #264 @ 0x108
800a93a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a93e: 681b ldr r3, [r3, #0]
800a940: 613b str r3, [r7, #16]
800a942: f507 7384 add.w r3, r7, #264 @ 0x108
800a946: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a94a: 681b ldr r3, [r3, #0]
800a94c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a950: b29b uxth r3, r3
800a952: 461a mov r2, r3
800a954: 693b ldr r3, [r7, #16]
800a956: 4413 add r3, r2
800a958: 613b str r3, [r7, #16]
800a95a: f507 7384 add.w r3, r7, #264 @ 0x108
800a95e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a962: 681b ldr r3, [r3, #0]
800a964: 781b ldrb r3, [r3, #0]
800a966: 011a lsls r2, r3, #4
800a968: 693b ldr r3, [r7, #16]
800a96a: 4413 add r3, r2
800a96c: f203 4304 addw r3, r3, #1028 @ 0x404
800a970: 60fb str r3, [r7, #12]
800a972: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a976: b29a uxth r2, r3
800a978: 68fb ldr r3, [r7, #12]
800a97a: 801a strh r2, [r3, #0]
800a97c: f000 be1f b.w 800b5be <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
800a980: f507 7384 add.w r3, r7, #264 @ 0x108
800a984: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a988: 681b ldr r3, [r3, #0]
800a98a: 78db ldrb r3, [r3, #3]
800a98c: 2b02 cmp r3, #2
800a98e: f040 8462 bne.w 800b256 <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
800a992: f507 7384 add.w r3, r7, #264 @ 0x108
800a996: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a99a: 681b ldr r3, [r3, #0]
800a99c: 6a1a ldr r2, [r3, #32]
800a99e: f507 7384 add.w r3, r7, #264 @ 0x108
800a9a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9a6: 681b ldr r3, [r3, #0]
800a9a8: 691b ldr r3, [r3, #16]
800a9aa: 429a cmp r2, r3
800a9ac: f240 83df bls.w 800b16e <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800a9b0: f507 7384 add.w r3, r7, #264 @ 0x108
800a9b4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a9b8: 681a ldr r2, [r3, #0]
800a9ba: f507 7384 add.w r3, r7, #264 @ 0x108
800a9be: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9c2: 681b ldr r3, [r3, #0]
800a9c4: 781b ldrb r3, [r3, #0]
800a9c6: 009b lsls r3, r3, #2
800a9c8: 4413 add r3, r2
800a9ca: 881b ldrh r3, [r3, #0]
800a9cc: b29b uxth r3, r3
800a9ce: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a9d2: f023 0370 bic.w r3, r3, #112 @ 0x70
800a9d6: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
800a9da: f507 7384 add.w r3, r7, #264 @ 0x108
800a9de: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a9e2: 681a ldr r2, [r3, #0]
800a9e4: f507 7384 add.w r3, r7, #264 @ 0x108
800a9e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9ec: 681b ldr r3, [r3, #0]
800a9ee: 781b ldrb r3, [r3, #0]
800a9f0: 009b lsls r3, r3, #2
800a9f2: 441a add r2, r3
800a9f4: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
800a9f8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a9fc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800aa00: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800aa04: f043 0380 orr.w r3, r3, #128 @ 0x80
800aa08: b29b uxth r3, r3
800aa0a: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800aa0c: f507 7384 add.w r3, r7, #264 @ 0x108
800aa10: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa14: 681b ldr r3, [r3, #0]
800aa16: 6a1a ldr r2, [r3, #32]
800aa18: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa1c: 1ad2 subs r2, r2, r3
800aa1e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa22: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa26: 681b ldr r3, [r3, #0]
800aa28: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800aa2a: f507 7384 add.w r3, r7, #264 @ 0x108
800aa2e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa32: 681a ldr r2, [r3, #0]
800aa34: f507 7384 add.w r3, r7, #264 @ 0x108
800aa38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa3c: 681b ldr r3, [r3, #0]
800aa3e: 781b ldrb r3, [r3, #0]
800aa40: 009b lsls r3, r3, #2
800aa42: 4413 add r3, r2
800aa44: 881b ldrh r3, [r3, #0]
800aa46: b29b uxth r3, r3
800aa48: f003 0340 and.w r3, r3, #64 @ 0x40
800aa4c: 2b00 cmp r3, #0
800aa4e: f000 81c7 beq.w 800ade0 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800aa52: f507 7384 add.w r3, r7, #264 @ 0x108
800aa56: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa5a: 681b ldr r3, [r3, #0]
800aa5c: 633b str r3, [r7, #48] @ 0x30
800aa5e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa62: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa66: 681b ldr r3, [r3, #0]
800aa68: 785b ldrb r3, [r3, #1]
800aa6a: 2b00 cmp r3, #0
800aa6c: d177 bne.n 800ab5e <USB_EPStartXfer+0x2ce>
800aa6e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa72: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa76: 681b ldr r3, [r3, #0]
800aa78: 62bb str r3, [r7, #40] @ 0x28
800aa7a: f507 7384 add.w r3, r7, #264 @ 0x108
800aa7e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa82: 681b ldr r3, [r3, #0]
800aa84: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800aa88: b29b uxth r3, r3
800aa8a: 461a mov r2, r3
800aa8c: 6abb ldr r3, [r7, #40] @ 0x28
800aa8e: 4413 add r3, r2
800aa90: 62bb str r3, [r7, #40] @ 0x28
800aa92: f507 7384 add.w r3, r7, #264 @ 0x108
800aa96: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa9a: 681b ldr r3, [r3, #0]
800aa9c: 781b ldrb r3, [r3, #0]
800aa9e: 011a lsls r2, r3, #4
800aaa0: 6abb ldr r3, [r7, #40] @ 0x28
800aaa2: 4413 add r3, r2
800aaa4: f203 430c addw r3, r3, #1036 @ 0x40c
800aaa8: 627b str r3, [r7, #36] @ 0x24
800aaaa: 6a7b ldr r3, [r7, #36] @ 0x24
800aaac: 881b ldrh r3, [r3, #0]
800aaae: b29b uxth r3, r3
800aab0: f3c3 0309 ubfx r3, r3, #0, #10
800aab4: b29a uxth r2, r3
800aab6: 6a7b ldr r3, [r7, #36] @ 0x24
800aab8: 801a strh r2, [r3, #0]
800aaba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aabe: 2b3e cmp r3, #62 @ 0x3e
800aac0: d921 bls.n 800ab06 <USB_EPStartXfer+0x276>
800aac2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aac6: 095b lsrs r3, r3, #5
800aac8: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800aacc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aad0: f003 031f and.w r3, r3, #31
800aad4: 2b00 cmp r3, #0
800aad6: d104 bne.n 800aae2 <USB_EPStartXfer+0x252>
800aad8: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800aadc: 3b01 subs r3, #1
800aade: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800aae2: 6a7b ldr r3, [r7, #36] @ 0x24
800aae4: 881b ldrh r3, [r3, #0]
800aae6: b29a uxth r2, r3
800aae8: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800aaec: b29b uxth r3, r3
800aaee: 029b lsls r3, r3, #10
800aaf0: b29b uxth r3, r3
800aaf2: 4313 orrs r3, r2
800aaf4: b29b uxth r3, r3
800aaf6: ea6f 4343 mvn.w r3, r3, lsl #17
800aafa: ea6f 4353 mvn.w r3, r3, lsr #17
800aafe: b29a uxth r2, r3
800ab00: 6a7b ldr r3, [r7, #36] @ 0x24
800ab02: 801a strh r2, [r3, #0]
800ab04: e050 b.n 800aba8 <USB_EPStartXfer+0x318>
800ab06: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab0a: 2b00 cmp r3, #0
800ab0c: d10a bne.n 800ab24 <USB_EPStartXfer+0x294>
800ab0e: 6a7b ldr r3, [r7, #36] @ 0x24
800ab10: 881b ldrh r3, [r3, #0]
800ab12: b29b uxth r3, r3
800ab14: ea6f 4343 mvn.w r3, r3, lsl #17
800ab18: ea6f 4353 mvn.w r3, r3, lsr #17
800ab1c: b29a uxth r2, r3
800ab1e: 6a7b ldr r3, [r7, #36] @ 0x24
800ab20: 801a strh r2, [r3, #0]
800ab22: e041 b.n 800aba8 <USB_EPStartXfer+0x318>
800ab24: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab28: 085b lsrs r3, r3, #1
800ab2a: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800ab2e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab32: f003 0301 and.w r3, r3, #1
800ab36: 2b00 cmp r3, #0
800ab38: d004 beq.n 800ab44 <USB_EPStartXfer+0x2b4>
800ab3a: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800ab3e: 3301 adds r3, #1
800ab40: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800ab44: 6a7b ldr r3, [r7, #36] @ 0x24
800ab46: 881b ldrh r3, [r3, #0]
800ab48: b29a uxth r2, r3
800ab4a: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800ab4e: b29b uxth r3, r3
800ab50: 029b lsls r3, r3, #10
800ab52: b29b uxth r3, r3
800ab54: 4313 orrs r3, r2
800ab56: b29a uxth r2, r3
800ab58: 6a7b ldr r3, [r7, #36] @ 0x24
800ab5a: 801a strh r2, [r3, #0]
800ab5c: e024 b.n 800aba8 <USB_EPStartXfer+0x318>
800ab5e: f507 7384 add.w r3, r7, #264 @ 0x108
800ab62: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab66: 681b ldr r3, [r3, #0]
800ab68: 785b ldrb r3, [r3, #1]
800ab6a: 2b01 cmp r3, #1
800ab6c: d11c bne.n 800aba8 <USB_EPStartXfer+0x318>
800ab6e: f507 7384 add.w r3, r7, #264 @ 0x108
800ab72: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab76: 681b ldr r3, [r3, #0]
800ab78: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ab7c: b29b uxth r3, r3
800ab7e: 461a mov r2, r3
800ab80: 6b3b ldr r3, [r7, #48] @ 0x30
800ab82: 4413 add r3, r2
800ab84: 633b str r3, [r7, #48] @ 0x30
800ab86: f507 7384 add.w r3, r7, #264 @ 0x108
800ab8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab8e: 681b ldr r3, [r3, #0]
800ab90: 781b ldrb r3, [r3, #0]
800ab92: 011a lsls r2, r3, #4
800ab94: 6b3b ldr r3, [r7, #48] @ 0x30
800ab96: 4413 add r3, r2
800ab98: f203 430c addw r3, r3, #1036 @ 0x40c
800ab9c: 62fb str r3, [r7, #44] @ 0x2c
800ab9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aba2: b29a uxth r2, r3
800aba4: 6afb ldr r3, [r7, #44] @ 0x2c
800aba6: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800aba8: f507 7384 add.w r3, r7, #264 @ 0x108
800abac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abb0: 681b ldr r3, [r3, #0]
800abb2: 895b ldrh r3, [r3, #10]
800abb4: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800abb8: f507 7384 add.w r3, r7, #264 @ 0x108
800abbc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abc0: 681b ldr r3, [r3, #0]
800abc2: 6959 ldr r1, [r3, #20]
800abc4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abc8: b29b uxth r3, r3
800abca: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800abce: f507 7084 add.w r0, r7, #264 @ 0x108
800abd2: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800abd6: 6800 ldr r0, [r0, #0]
800abd8: f001 fb49 bl 800c26e <USB_WritePMA>
ep->xfer_buff += len;
800abdc: f507 7384 add.w r3, r7, #264 @ 0x108
800abe0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abe4: 681b ldr r3, [r3, #0]
800abe6: 695a ldr r2, [r3, #20]
800abe8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abec: 441a add r2, r3
800abee: f507 7384 add.w r3, r7, #264 @ 0x108
800abf2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abf6: 681b ldr r3, [r3, #0]
800abf8: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800abfa: f507 7384 add.w r3, r7, #264 @ 0x108
800abfe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac02: 681b ldr r3, [r3, #0]
800ac04: 6a1a ldr r2, [r3, #32]
800ac06: f507 7384 add.w r3, r7, #264 @ 0x108
800ac0a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac0e: 681b ldr r3, [r3, #0]
800ac10: 691b ldr r3, [r3, #16]
800ac12: 429a cmp r2, r3
800ac14: d90f bls.n 800ac36 <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
800ac16: f507 7384 add.w r3, r7, #264 @ 0x108
800ac1a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac1e: 681b ldr r3, [r3, #0]
800ac20: 6a1a ldr r2, [r3, #32]
800ac22: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac26: 1ad2 subs r2, r2, r3
800ac28: f507 7384 add.w r3, r7, #264 @ 0x108
800ac2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac30: 681b ldr r3, [r3, #0]
800ac32: 621a str r2, [r3, #32]
800ac34: e00e b.n 800ac54 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
800ac36: f507 7384 add.w r3, r7, #264 @ 0x108
800ac3a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac3e: 681b ldr r3, [r3, #0]
800ac40: 6a1b ldr r3, [r3, #32]
800ac42: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800ac46: f507 7384 add.w r3, r7, #264 @ 0x108
800ac4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac4e: 681b ldr r3, [r3, #0]
800ac50: 2200 movs r2, #0
800ac52: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800ac54: f507 7384 add.w r3, r7, #264 @ 0x108
800ac58: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac5c: 681b ldr r3, [r3, #0]
800ac5e: 785b ldrb r3, [r3, #1]
800ac60: 2b00 cmp r3, #0
800ac62: d177 bne.n 800ad54 <USB_EPStartXfer+0x4c4>
800ac64: f507 7384 add.w r3, r7, #264 @ 0x108
800ac68: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ac6c: 681b ldr r3, [r3, #0]
800ac6e: 61bb str r3, [r7, #24]
800ac70: f507 7384 add.w r3, r7, #264 @ 0x108
800ac74: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ac78: 681b ldr r3, [r3, #0]
800ac7a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ac7e: b29b uxth r3, r3
800ac80: 461a mov r2, r3
800ac82: 69bb ldr r3, [r7, #24]
800ac84: 4413 add r3, r2
800ac86: 61bb str r3, [r7, #24]
800ac88: f507 7384 add.w r3, r7, #264 @ 0x108
800ac8c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac90: 681b ldr r3, [r3, #0]
800ac92: 781b ldrb r3, [r3, #0]
800ac94: 011a lsls r2, r3, #4
800ac96: 69bb ldr r3, [r7, #24]
800ac98: 4413 add r3, r2
800ac9a: f203 4304 addw r3, r3, #1028 @ 0x404
800ac9e: 617b str r3, [r7, #20]
800aca0: 697b ldr r3, [r7, #20]
800aca2: 881b ldrh r3, [r3, #0]
800aca4: b29b uxth r3, r3
800aca6: f3c3 0309 ubfx r3, r3, #0, #10
800acaa: b29a uxth r2, r3
800acac: 697b ldr r3, [r7, #20]
800acae: 801a strh r2, [r3, #0]
800acb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800acb4: 2b3e cmp r3, #62 @ 0x3e
800acb6: d921 bls.n 800acfc <USB_EPStartXfer+0x46c>
800acb8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800acbc: 095b lsrs r3, r3, #5
800acbe: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800acc2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800acc6: f003 031f and.w r3, r3, #31
800acca: 2b00 cmp r3, #0
800accc: d104 bne.n 800acd8 <USB_EPStartXfer+0x448>
800acce: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800acd2: 3b01 subs r3, #1
800acd4: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800acd8: 697b ldr r3, [r7, #20]
800acda: 881b ldrh r3, [r3, #0]
800acdc: b29a uxth r2, r3
800acde: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ace2: b29b uxth r3, r3
800ace4: 029b lsls r3, r3, #10
800ace6: b29b uxth r3, r3
800ace8: 4313 orrs r3, r2
800acea: b29b uxth r3, r3
800acec: ea6f 4343 mvn.w r3, r3, lsl #17
800acf0: ea6f 4353 mvn.w r3, r3, lsr #17
800acf4: b29a uxth r2, r3
800acf6: 697b ldr r3, [r7, #20]
800acf8: 801a strh r2, [r3, #0]
800acfa: e056 b.n 800adaa <USB_EPStartXfer+0x51a>
800acfc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad00: 2b00 cmp r3, #0
800ad02: d10a bne.n 800ad1a <USB_EPStartXfer+0x48a>
800ad04: 697b ldr r3, [r7, #20]
800ad06: 881b ldrh r3, [r3, #0]
800ad08: b29b uxth r3, r3
800ad0a: ea6f 4343 mvn.w r3, r3, lsl #17
800ad0e: ea6f 4353 mvn.w r3, r3, lsr #17
800ad12: b29a uxth r2, r3
800ad14: 697b ldr r3, [r7, #20]
800ad16: 801a strh r2, [r3, #0]
800ad18: e047 b.n 800adaa <USB_EPStartXfer+0x51a>
800ad1a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad1e: 085b lsrs r3, r3, #1
800ad20: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ad24: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad28: f003 0301 and.w r3, r3, #1
800ad2c: 2b00 cmp r3, #0
800ad2e: d004 beq.n 800ad3a <USB_EPStartXfer+0x4aa>
800ad30: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ad34: 3301 adds r3, #1
800ad36: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ad3a: 697b ldr r3, [r7, #20]
800ad3c: 881b ldrh r3, [r3, #0]
800ad3e: b29a uxth r2, r3
800ad40: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ad44: b29b uxth r3, r3
800ad46: 029b lsls r3, r3, #10
800ad48: b29b uxth r3, r3
800ad4a: 4313 orrs r3, r2
800ad4c: b29a uxth r2, r3
800ad4e: 697b ldr r3, [r7, #20]
800ad50: 801a strh r2, [r3, #0]
800ad52: e02a b.n 800adaa <USB_EPStartXfer+0x51a>
800ad54: f507 7384 add.w r3, r7, #264 @ 0x108
800ad58: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad5c: 681b ldr r3, [r3, #0]
800ad5e: 785b ldrb r3, [r3, #1]
800ad60: 2b01 cmp r3, #1
800ad62: d122 bne.n 800adaa <USB_EPStartXfer+0x51a>
800ad64: f507 7384 add.w r3, r7, #264 @ 0x108
800ad68: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad6c: 681b ldr r3, [r3, #0]
800ad6e: 623b str r3, [r7, #32]
800ad70: f507 7384 add.w r3, r7, #264 @ 0x108
800ad74: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad78: 681b ldr r3, [r3, #0]
800ad7a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ad7e: b29b uxth r3, r3
800ad80: 461a mov r2, r3
800ad82: 6a3b ldr r3, [r7, #32]
800ad84: 4413 add r3, r2
800ad86: 623b str r3, [r7, #32]
800ad88: f507 7384 add.w r3, r7, #264 @ 0x108
800ad8c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad90: 681b ldr r3, [r3, #0]
800ad92: 781b ldrb r3, [r3, #0]
800ad94: 011a lsls r2, r3, #4
800ad96: 6a3b ldr r3, [r7, #32]
800ad98: 4413 add r3, r2
800ad9a: f203 4304 addw r3, r3, #1028 @ 0x404
800ad9e: 61fb str r3, [r7, #28]
800ada0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ada4: b29a uxth r2, r3
800ada6: 69fb ldr r3, [r7, #28]
800ada8: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800adaa: f507 7384 add.w r3, r7, #264 @ 0x108
800adae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adb2: 681b ldr r3, [r3, #0]
800adb4: 891b ldrh r3, [r3, #8]
800adb6: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800adba: f507 7384 add.w r3, r7, #264 @ 0x108
800adbe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adc2: 681b ldr r3, [r3, #0]
800adc4: 6959 ldr r1, [r3, #20]
800adc6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800adca: b29b uxth r3, r3
800adcc: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800add0: f507 7084 add.w r0, r7, #264 @ 0x108
800add4: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800add8: 6800 ldr r0, [r0, #0]
800adda: f001 fa48 bl 800c26e <USB_WritePMA>
800adde: e3ee b.n 800b5be <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800ade0: f507 7384 add.w r3, r7, #264 @ 0x108
800ade4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ade8: 681b ldr r3, [r3, #0]
800adea: 785b ldrb r3, [r3, #1]
800adec: 2b00 cmp r3, #0
800adee: d177 bne.n 800aee0 <USB_EPStartXfer+0x650>
800adf0: f507 7384 add.w r3, r7, #264 @ 0x108
800adf4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800adf8: 681b ldr r3, [r3, #0]
800adfa: 64bb str r3, [r7, #72] @ 0x48
800adfc: f507 7384 add.w r3, r7, #264 @ 0x108
800ae00: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ae04: 681b ldr r3, [r3, #0]
800ae06: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ae0a: b29b uxth r3, r3
800ae0c: 461a mov r2, r3
800ae0e: 6cbb ldr r3, [r7, #72] @ 0x48
800ae10: 4413 add r3, r2
800ae12: 64bb str r3, [r7, #72] @ 0x48
800ae14: f507 7384 add.w r3, r7, #264 @ 0x108
800ae18: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae1c: 681b ldr r3, [r3, #0]
800ae1e: 781b ldrb r3, [r3, #0]
800ae20: 011a lsls r2, r3, #4
800ae22: 6cbb ldr r3, [r7, #72] @ 0x48
800ae24: 4413 add r3, r2
800ae26: f203 4304 addw r3, r3, #1028 @ 0x404
800ae2a: 647b str r3, [r7, #68] @ 0x44
800ae2c: 6c7b ldr r3, [r7, #68] @ 0x44
800ae2e: 881b ldrh r3, [r3, #0]
800ae30: b29b uxth r3, r3
800ae32: f3c3 0309 ubfx r3, r3, #0, #10
800ae36: b29a uxth r2, r3
800ae38: 6c7b ldr r3, [r7, #68] @ 0x44
800ae3a: 801a strh r2, [r3, #0]
800ae3c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae40: 2b3e cmp r3, #62 @ 0x3e
800ae42: d921 bls.n 800ae88 <USB_EPStartXfer+0x5f8>
800ae44: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae48: 095b lsrs r3, r3, #5
800ae4a: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ae4e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae52: f003 031f and.w r3, r3, #31
800ae56: 2b00 cmp r3, #0
800ae58: d104 bne.n 800ae64 <USB_EPStartXfer+0x5d4>
800ae5a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800ae5e: 3b01 subs r3, #1
800ae60: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ae64: 6c7b ldr r3, [r7, #68] @ 0x44
800ae66: 881b ldrh r3, [r3, #0]
800ae68: b29a uxth r2, r3
800ae6a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800ae6e: b29b uxth r3, r3
800ae70: 029b lsls r3, r3, #10
800ae72: b29b uxth r3, r3
800ae74: 4313 orrs r3, r2
800ae76: b29b uxth r3, r3
800ae78: ea6f 4343 mvn.w r3, r3, lsl #17
800ae7c: ea6f 4353 mvn.w r3, r3, lsr #17
800ae80: b29a uxth r2, r3
800ae82: 6c7b ldr r3, [r7, #68] @ 0x44
800ae84: 801a strh r2, [r3, #0]
800ae86: e056 b.n 800af36 <USB_EPStartXfer+0x6a6>
800ae88: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae8c: 2b00 cmp r3, #0
800ae8e: d10a bne.n 800aea6 <USB_EPStartXfer+0x616>
800ae90: 6c7b ldr r3, [r7, #68] @ 0x44
800ae92: 881b ldrh r3, [r3, #0]
800ae94: b29b uxth r3, r3
800ae96: ea6f 4343 mvn.w r3, r3, lsl #17
800ae9a: ea6f 4353 mvn.w r3, r3, lsr #17
800ae9e: b29a uxth r2, r3
800aea0: 6c7b ldr r3, [r7, #68] @ 0x44
800aea2: 801a strh r2, [r3, #0]
800aea4: e047 b.n 800af36 <USB_EPStartXfer+0x6a6>
800aea6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aeaa: 085b lsrs r3, r3, #1
800aeac: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800aeb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aeb4: f003 0301 and.w r3, r3, #1
800aeb8: 2b00 cmp r3, #0
800aeba: d004 beq.n 800aec6 <USB_EPStartXfer+0x636>
800aebc: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800aec0: 3301 adds r3, #1
800aec2: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800aec6: 6c7b ldr r3, [r7, #68] @ 0x44
800aec8: 881b ldrh r3, [r3, #0]
800aeca: b29a uxth r2, r3
800aecc: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800aed0: b29b uxth r3, r3
800aed2: 029b lsls r3, r3, #10
800aed4: b29b uxth r3, r3
800aed6: 4313 orrs r3, r2
800aed8: b29a uxth r2, r3
800aeda: 6c7b ldr r3, [r7, #68] @ 0x44
800aedc: 801a strh r2, [r3, #0]
800aede: e02a b.n 800af36 <USB_EPStartXfer+0x6a6>
800aee0: f507 7384 add.w r3, r7, #264 @ 0x108
800aee4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aee8: 681b ldr r3, [r3, #0]
800aeea: 785b ldrb r3, [r3, #1]
800aeec: 2b01 cmp r3, #1
800aeee: d122 bne.n 800af36 <USB_EPStartXfer+0x6a6>
800aef0: f507 7384 add.w r3, r7, #264 @ 0x108
800aef4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aef8: 681b ldr r3, [r3, #0]
800aefa: 653b str r3, [r7, #80] @ 0x50
800aefc: f507 7384 add.w r3, r7, #264 @ 0x108
800af00: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af04: 681b ldr r3, [r3, #0]
800af06: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800af0a: b29b uxth r3, r3
800af0c: 461a mov r2, r3
800af0e: 6d3b ldr r3, [r7, #80] @ 0x50
800af10: 4413 add r3, r2
800af12: 653b str r3, [r7, #80] @ 0x50
800af14: f507 7384 add.w r3, r7, #264 @ 0x108
800af18: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af1c: 681b ldr r3, [r3, #0]
800af1e: 781b ldrb r3, [r3, #0]
800af20: 011a lsls r2, r3, #4
800af22: 6d3b ldr r3, [r7, #80] @ 0x50
800af24: 4413 add r3, r2
800af26: f203 4304 addw r3, r3, #1028 @ 0x404
800af2a: 64fb str r3, [r7, #76] @ 0x4c
800af2c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af30: b29a uxth r2, r3
800af32: 6cfb ldr r3, [r7, #76] @ 0x4c
800af34: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800af36: f507 7384 add.w r3, r7, #264 @ 0x108
800af3a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af3e: 681b ldr r3, [r3, #0]
800af40: 891b ldrh r3, [r3, #8]
800af42: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800af46: f507 7384 add.w r3, r7, #264 @ 0x108
800af4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af4e: 681b ldr r3, [r3, #0]
800af50: 6959 ldr r1, [r3, #20]
800af52: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af56: b29b uxth r3, r3
800af58: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800af5c: f507 7084 add.w r0, r7, #264 @ 0x108
800af60: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800af64: 6800 ldr r0, [r0, #0]
800af66: f001 f982 bl 800c26e <USB_WritePMA>
ep->xfer_buff += len;
800af6a: f507 7384 add.w r3, r7, #264 @ 0x108
800af6e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af72: 681b ldr r3, [r3, #0]
800af74: 695a ldr r2, [r3, #20]
800af76: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af7a: 441a add r2, r3
800af7c: f507 7384 add.w r3, r7, #264 @ 0x108
800af80: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af84: 681b ldr r3, [r3, #0]
800af86: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800af88: f507 7384 add.w r3, r7, #264 @ 0x108
800af8c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af90: 681b ldr r3, [r3, #0]
800af92: 6a1a ldr r2, [r3, #32]
800af94: f507 7384 add.w r3, r7, #264 @ 0x108
800af98: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af9c: 681b ldr r3, [r3, #0]
800af9e: 691b ldr r3, [r3, #16]
800afa0: 429a cmp r2, r3
800afa2: d90f bls.n 800afc4 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
800afa4: f507 7384 add.w r3, r7, #264 @ 0x108
800afa8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afac: 681b ldr r3, [r3, #0]
800afae: 6a1a ldr r2, [r3, #32]
800afb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afb4: 1ad2 subs r2, r2, r3
800afb6: f507 7384 add.w r3, r7, #264 @ 0x108
800afba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afbe: 681b ldr r3, [r3, #0]
800afc0: 621a str r2, [r3, #32]
800afc2: e00e b.n 800afe2 <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
800afc4: f507 7384 add.w r3, r7, #264 @ 0x108
800afc8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afcc: 681b ldr r3, [r3, #0]
800afce: 6a1b ldr r3, [r3, #32]
800afd0: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800afd4: f507 7384 add.w r3, r7, #264 @ 0x108
800afd8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afdc: 681b ldr r3, [r3, #0]
800afde: 2200 movs r2, #0
800afe0: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800afe2: f507 7384 add.w r3, r7, #264 @ 0x108
800afe6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800afea: 681b ldr r3, [r3, #0]
800afec: 643b str r3, [r7, #64] @ 0x40
800afee: f507 7384 add.w r3, r7, #264 @ 0x108
800aff2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aff6: 681b ldr r3, [r3, #0]
800aff8: 785b ldrb r3, [r3, #1]
800affa: 2b00 cmp r3, #0
800affc: d177 bne.n 800b0ee <USB_EPStartXfer+0x85e>
800affe: f507 7384 add.w r3, r7, #264 @ 0x108
800b002: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b006: 681b ldr r3, [r3, #0]
800b008: 63bb str r3, [r7, #56] @ 0x38
800b00a: f507 7384 add.w r3, r7, #264 @ 0x108
800b00e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b012: 681b ldr r3, [r3, #0]
800b014: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b018: b29b uxth r3, r3
800b01a: 461a mov r2, r3
800b01c: 6bbb ldr r3, [r7, #56] @ 0x38
800b01e: 4413 add r3, r2
800b020: 63bb str r3, [r7, #56] @ 0x38
800b022: f507 7384 add.w r3, r7, #264 @ 0x108
800b026: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b02a: 681b ldr r3, [r3, #0]
800b02c: 781b ldrb r3, [r3, #0]
800b02e: 011a lsls r2, r3, #4
800b030: 6bbb ldr r3, [r7, #56] @ 0x38
800b032: 4413 add r3, r2
800b034: f203 430c addw r3, r3, #1036 @ 0x40c
800b038: 637b str r3, [r7, #52] @ 0x34
800b03a: 6b7b ldr r3, [r7, #52] @ 0x34
800b03c: 881b ldrh r3, [r3, #0]
800b03e: b29b uxth r3, r3
800b040: f3c3 0309 ubfx r3, r3, #0, #10
800b044: b29a uxth r2, r3
800b046: 6b7b ldr r3, [r7, #52] @ 0x34
800b048: 801a strh r2, [r3, #0]
800b04a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b04e: 2b3e cmp r3, #62 @ 0x3e
800b050: d921 bls.n 800b096 <USB_EPStartXfer+0x806>
800b052: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b056: 095b lsrs r3, r3, #5
800b058: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800b05c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b060: f003 031f and.w r3, r3, #31
800b064: 2b00 cmp r3, #0
800b066: d104 bne.n 800b072 <USB_EPStartXfer+0x7e2>
800b068: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800b06c: 3b01 subs r3, #1
800b06e: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800b072: 6b7b ldr r3, [r7, #52] @ 0x34
800b074: 881b ldrh r3, [r3, #0]
800b076: b29a uxth r2, r3
800b078: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800b07c: b29b uxth r3, r3
800b07e: 029b lsls r3, r3, #10
800b080: b29b uxth r3, r3
800b082: 4313 orrs r3, r2
800b084: b29b uxth r3, r3
800b086: ea6f 4343 mvn.w r3, r3, lsl #17
800b08a: ea6f 4353 mvn.w r3, r3, lsr #17
800b08e: b29a uxth r2, r3
800b090: 6b7b ldr r3, [r7, #52] @ 0x34
800b092: 801a strh r2, [r3, #0]
800b094: e050 b.n 800b138 <USB_EPStartXfer+0x8a8>
800b096: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b09a: 2b00 cmp r3, #0
800b09c: d10a bne.n 800b0b4 <USB_EPStartXfer+0x824>
800b09e: 6b7b ldr r3, [r7, #52] @ 0x34
800b0a0: 881b ldrh r3, [r3, #0]
800b0a2: b29b uxth r3, r3
800b0a4: ea6f 4343 mvn.w r3, r3, lsl #17
800b0a8: ea6f 4353 mvn.w r3, r3, lsr #17
800b0ac: b29a uxth r2, r3
800b0ae: 6b7b ldr r3, [r7, #52] @ 0x34
800b0b0: 801a strh r2, [r3, #0]
800b0b2: e041 b.n 800b138 <USB_EPStartXfer+0x8a8>
800b0b4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b0b8: 085b lsrs r3, r3, #1
800b0ba: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800b0be: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b0c2: f003 0301 and.w r3, r3, #1
800b0c6: 2b00 cmp r3, #0
800b0c8: d004 beq.n 800b0d4 <USB_EPStartXfer+0x844>
800b0ca: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800b0ce: 3301 adds r3, #1
800b0d0: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800b0d4: 6b7b ldr r3, [r7, #52] @ 0x34
800b0d6: 881b ldrh r3, [r3, #0]
800b0d8: b29a uxth r2, r3
800b0da: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800b0de: b29b uxth r3, r3
800b0e0: 029b lsls r3, r3, #10
800b0e2: b29b uxth r3, r3
800b0e4: 4313 orrs r3, r2
800b0e6: b29a uxth r2, r3
800b0e8: 6b7b ldr r3, [r7, #52] @ 0x34
800b0ea: 801a strh r2, [r3, #0]
800b0ec: e024 b.n 800b138 <USB_EPStartXfer+0x8a8>
800b0ee: f507 7384 add.w r3, r7, #264 @ 0x108
800b0f2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0f6: 681b ldr r3, [r3, #0]
800b0f8: 785b ldrb r3, [r3, #1]
800b0fa: 2b01 cmp r3, #1
800b0fc: d11c bne.n 800b138 <USB_EPStartXfer+0x8a8>
800b0fe: f507 7384 add.w r3, r7, #264 @ 0x108
800b102: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b106: 681b ldr r3, [r3, #0]
800b108: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b10c: b29b uxth r3, r3
800b10e: 461a mov r2, r3
800b110: 6c3b ldr r3, [r7, #64] @ 0x40
800b112: 4413 add r3, r2
800b114: 643b str r3, [r7, #64] @ 0x40
800b116: f507 7384 add.w r3, r7, #264 @ 0x108
800b11a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b11e: 681b ldr r3, [r3, #0]
800b120: 781b ldrb r3, [r3, #0]
800b122: 011a lsls r2, r3, #4
800b124: 6c3b ldr r3, [r7, #64] @ 0x40
800b126: 4413 add r3, r2
800b128: f203 430c addw r3, r3, #1036 @ 0x40c
800b12c: 63fb str r3, [r7, #60] @ 0x3c
800b12e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b132: b29a uxth r2, r3
800b134: 6bfb ldr r3, [r7, #60] @ 0x3c
800b136: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800b138: f507 7384 add.w r3, r7, #264 @ 0x108
800b13c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b140: 681b ldr r3, [r3, #0]
800b142: 895b ldrh r3, [r3, #10]
800b144: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b148: f507 7384 add.w r3, r7, #264 @ 0x108
800b14c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b150: 681b ldr r3, [r3, #0]
800b152: 6959 ldr r1, [r3, #20]
800b154: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b158: b29b uxth r3, r3
800b15a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b15e: f507 7084 add.w r0, r7, #264 @ 0x108
800b162: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b166: 6800 ldr r0, [r0, #0]
800b168: f001 f881 bl 800c26e <USB_WritePMA>
800b16c: e227 b.n 800b5be <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
800b16e: f507 7384 add.w r3, r7, #264 @ 0x108
800b172: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b176: 681b ldr r3, [r3, #0]
800b178: 6a1b ldr r3, [r3, #32]
800b17a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
800b17e: f507 7384 add.w r3, r7, #264 @ 0x108
800b182: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b186: 681a ldr r2, [r3, #0]
800b188: f507 7384 add.w r3, r7, #264 @ 0x108
800b18c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b190: 681b ldr r3, [r3, #0]
800b192: 781b ldrb r3, [r3, #0]
800b194: 009b lsls r3, r3, #2
800b196: 4413 add r3, r2
800b198: 881b ldrh r3, [r3, #0]
800b19a: b29b uxth r3, r3
800b19c: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800b1a0: f023 0370 bic.w r3, r3, #112 @ 0x70
800b1a4: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800b1a8: f507 7384 add.w r3, r7, #264 @ 0x108
800b1ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1b0: 681a ldr r2, [r3, #0]
800b1b2: f507 7384 add.w r3, r7, #264 @ 0x108
800b1b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1ba: 681b ldr r3, [r3, #0]
800b1bc: 781b ldrb r3, [r3, #0]
800b1be: 009b lsls r3, r3, #2
800b1c0: 441a add r2, r3
800b1c2: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800b1c6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b1ca: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b1ce: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b1d2: f043 0380 orr.w r3, r3, #128 @ 0x80
800b1d6: b29b uxth r3, r3
800b1d8: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800b1da: f507 7384 add.w r3, r7, #264 @ 0x108
800b1de: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1e2: 681b ldr r3, [r3, #0]
800b1e4: 65fb str r3, [r7, #92] @ 0x5c
800b1e6: f507 7384 add.w r3, r7, #264 @ 0x108
800b1ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1ee: 681b ldr r3, [r3, #0]
800b1f0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b1f4: b29b uxth r3, r3
800b1f6: 461a mov r2, r3
800b1f8: 6dfb ldr r3, [r7, #92] @ 0x5c
800b1fa: 4413 add r3, r2
800b1fc: 65fb str r3, [r7, #92] @ 0x5c
800b1fe: f507 7384 add.w r3, r7, #264 @ 0x108
800b202: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b206: 681b ldr r3, [r3, #0]
800b208: 781b ldrb r3, [r3, #0]
800b20a: 011a lsls r2, r3, #4
800b20c: 6dfb ldr r3, [r7, #92] @ 0x5c
800b20e: 4413 add r3, r2
800b210: f203 4304 addw r3, r3, #1028 @ 0x404
800b214: 65bb str r3, [r7, #88] @ 0x58
800b216: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b21a: b29a uxth r2, r3
800b21c: 6dbb ldr r3, [r7, #88] @ 0x58
800b21e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800b220: f507 7384 add.w r3, r7, #264 @ 0x108
800b224: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b228: 681b ldr r3, [r3, #0]
800b22a: 891b ldrh r3, [r3, #8]
800b22c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b230: f507 7384 add.w r3, r7, #264 @ 0x108
800b234: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b238: 681b ldr r3, [r3, #0]
800b23a: 6959 ldr r1, [r3, #20]
800b23c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b240: b29b uxth r3, r3
800b242: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b246: f507 7084 add.w r0, r7, #264 @ 0x108
800b24a: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b24e: 6800 ldr r0, [r0, #0]
800b250: f001 f80d bl 800c26e <USB_WritePMA>
800b254: e1b3 b.n 800b5be <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800b256: f507 7384 add.w r3, r7, #264 @ 0x108
800b25a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b25e: 681b ldr r3, [r3, #0]
800b260: 6a1a ldr r2, [r3, #32]
800b262: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b266: 1ad2 subs r2, r2, r3
800b268: f507 7384 add.w r3, r7, #264 @ 0x108
800b26c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b270: 681b ldr r3, [r3, #0]
800b272: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800b274: f507 7384 add.w r3, r7, #264 @ 0x108
800b278: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b27c: 681a ldr r2, [r3, #0]
800b27e: f507 7384 add.w r3, r7, #264 @ 0x108
800b282: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b286: 681b ldr r3, [r3, #0]
800b288: 781b ldrb r3, [r3, #0]
800b28a: 009b lsls r3, r3, #2
800b28c: 4413 add r3, r2
800b28e: 881b ldrh r3, [r3, #0]
800b290: b29b uxth r3, r3
800b292: f003 0340 and.w r3, r3, #64 @ 0x40
800b296: 2b00 cmp r3, #0
800b298: f000 80c6 beq.w 800b428 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800b29c: f507 7384 add.w r3, r7, #264 @ 0x108
800b2a0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b2a4: 681b ldr r3, [r3, #0]
800b2a6: 673b str r3, [r7, #112] @ 0x70
800b2a8: f507 7384 add.w r3, r7, #264 @ 0x108
800b2ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2b0: 681b ldr r3, [r3, #0]
800b2b2: 785b ldrb r3, [r3, #1]
800b2b4: 2b00 cmp r3, #0
800b2b6: d177 bne.n 800b3a8 <USB_EPStartXfer+0xb18>
800b2b8: f507 7384 add.w r3, r7, #264 @ 0x108
800b2bc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b2c0: 681b ldr r3, [r3, #0]
800b2c2: 66bb str r3, [r7, #104] @ 0x68
800b2c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b2c8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b2cc: 681b ldr r3, [r3, #0]
800b2ce: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b2d2: b29b uxth r3, r3
800b2d4: 461a mov r2, r3
800b2d6: 6ebb ldr r3, [r7, #104] @ 0x68
800b2d8: 4413 add r3, r2
800b2da: 66bb str r3, [r7, #104] @ 0x68
800b2dc: f507 7384 add.w r3, r7, #264 @ 0x108
800b2e0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2e4: 681b ldr r3, [r3, #0]
800b2e6: 781b ldrb r3, [r3, #0]
800b2e8: 011a lsls r2, r3, #4
800b2ea: 6ebb ldr r3, [r7, #104] @ 0x68
800b2ec: 4413 add r3, r2
800b2ee: f203 430c addw r3, r3, #1036 @ 0x40c
800b2f2: 667b str r3, [r7, #100] @ 0x64
800b2f4: 6e7b ldr r3, [r7, #100] @ 0x64
800b2f6: 881b ldrh r3, [r3, #0]
800b2f8: b29b uxth r3, r3
800b2fa: f3c3 0309 ubfx r3, r3, #0, #10
800b2fe: b29a uxth r2, r3
800b300: 6e7b ldr r3, [r7, #100] @ 0x64
800b302: 801a strh r2, [r3, #0]
800b304: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b308: 2b3e cmp r3, #62 @ 0x3e
800b30a: d921 bls.n 800b350 <USB_EPStartXfer+0xac0>
800b30c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b310: 095b lsrs r3, r3, #5
800b312: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b316: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b31a: f003 031f and.w r3, r3, #31
800b31e: 2b00 cmp r3, #0
800b320: d104 bne.n 800b32c <USB_EPStartXfer+0xa9c>
800b322: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b326: 3b01 subs r3, #1
800b328: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b32c: 6e7b ldr r3, [r7, #100] @ 0x64
800b32e: 881b ldrh r3, [r3, #0]
800b330: b29a uxth r2, r3
800b332: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b336: b29b uxth r3, r3
800b338: 029b lsls r3, r3, #10
800b33a: b29b uxth r3, r3
800b33c: 4313 orrs r3, r2
800b33e: b29b uxth r3, r3
800b340: ea6f 4343 mvn.w r3, r3, lsl #17
800b344: ea6f 4353 mvn.w r3, r3, lsr #17
800b348: b29a uxth r2, r3
800b34a: 6e7b ldr r3, [r7, #100] @ 0x64
800b34c: 801a strh r2, [r3, #0]
800b34e: e050 b.n 800b3f2 <USB_EPStartXfer+0xb62>
800b350: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b354: 2b00 cmp r3, #0
800b356: d10a bne.n 800b36e <USB_EPStartXfer+0xade>
800b358: 6e7b ldr r3, [r7, #100] @ 0x64
800b35a: 881b ldrh r3, [r3, #0]
800b35c: b29b uxth r3, r3
800b35e: ea6f 4343 mvn.w r3, r3, lsl #17
800b362: ea6f 4353 mvn.w r3, r3, lsr #17
800b366: b29a uxth r2, r3
800b368: 6e7b ldr r3, [r7, #100] @ 0x64
800b36a: 801a strh r2, [r3, #0]
800b36c: e041 b.n 800b3f2 <USB_EPStartXfer+0xb62>
800b36e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b372: 085b lsrs r3, r3, #1
800b374: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b378: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b37c: f003 0301 and.w r3, r3, #1
800b380: 2b00 cmp r3, #0
800b382: d004 beq.n 800b38e <USB_EPStartXfer+0xafe>
800b384: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b388: 3301 adds r3, #1
800b38a: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b38e: 6e7b ldr r3, [r7, #100] @ 0x64
800b390: 881b ldrh r3, [r3, #0]
800b392: b29a uxth r2, r3
800b394: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b398: b29b uxth r3, r3
800b39a: 029b lsls r3, r3, #10
800b39c: b29b uxth r3, r3
800b39e: 4313 orrs r3, r2
800b3a0: b29a uxth r2, r3
800b3a2: 6e7b ldr r3, [r7, #100] @ 0x64
800b3a4: 801a strh r2, [r3, #0]
800b3a6: e024 b.n 800b3f2 <USB_EPStartXfer+0xb62>
800b3a8: f507 7384 add.w r3, r7, #264 @ 0x108
800b3ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3b0: 681b ldr r3, [r3, #0]
800b3b2: 785b ldrb r3, [r3, #1]
800b3b4: 2b01 cmp r3, #1
800b3b6: d11c bne.n 800b3f2 <USB_EPStartXfer+0xb62>
800b3b8: f507 7384 add.w r3, r7, #264 @ 0x108
800b3bc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b3c0: 681b ldr r3, [r3, #0]
800b3c2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b3c6: b29b uxth r3, r3
800b3c8: 461a mov r2, r3
800b3ca: 6f3b ldr r3, [r7, #112] @ 0x70
800b3cc: 4413 add r3, r2
800b3ce: 673b str r3, [r7, #112] @ 0x70
800b3d0: f507 7384 add.w r3, r7, #264 @ 0x108
800b3d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3d8: 681b ldr r3, [r3, #0]
800b3da: 781b ldrb r3, [r3, #0]
800b3dc: 011a lsls r2, r3, #4
800b3de: 6f3b ldr r3, [r7, #112] @ 0x70
800b3e0: 4413 add r3, r2
800b3e2: f203 430c addw r3, r3, #1036 @ 0x40c
800b3e6: 66fb str r3, [r7, #108] @ 0x6c
800b3e8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b3ec: b29a uxth r2, r3
800b3ee: 6efb ldr r3, [r7, #108] @ 0x6c
800b3f0: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800b3f2: f507 7384 add.w r3, r7, #264 @ 0x108
800b3f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3fa: 681b ldr r3, [r3, #0]
800b3fc: 895b ldrh r3, [r3, #10]
800b3fe: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b402: f507 7384 add.w r3, r7, #264 @ 0x108
800b406: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b40a: 681b ldr r3, [r3, #0]
800b40c: 6959 ldr r1, [r3, #20]
800b40e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b412: b29b uxth r3, r3
800b414: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b418: f507 7084 add.w r0, r7, #264 @ 0x108
800b41c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b420: 6800 ldr r0, [r0, #0]
800b422: f000 ff24 bl 800c26e <USB_WritePMA>
800b426: e0ca b.n 800b5be <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800b428: f507 7384 add.w r3, r7, #264 @ 0x108
800b42c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b430: 681b ldr r3, [r3, #0]
800b432: 785b ldrb r3, [r3, #1]
800b434: 2b00 cmp r3, #0
800b436: d177 bne.n 800b528 <USB_EPStartXfer+0xc98>
800b438: f507 7384 add.w r3, r7, #264 @ 0x108
800b43c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b440: 681b ldr r3, [r3, #0]
800b442: 67fb str r3, [r7, #124] @ 0x7c
800b444: f507 7384 add.w r3, r7, #264 @ 0x108
800b448: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b44c: 681b ldr r3, [r3, #0]
800b44e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b452: b29b uxth r3, r3
800b454: 461a mov r2, r3
800b456: 6ffb ldr r3, [r7, #124] @ 0x7c
800b458: 4413 add r3, r2
800b45a: 67fb str r3, [r7, #124] @ 0x7c
800b45c: f507 7384 add.w r3, r7, #264 @ 0x108
800b460: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b464: 681b ldr r3, [r3, #0]
800b466: 781b ldrb r3, [r3, #0]
800b468: 011a lsls r2, r3, #4
800b46a: 6ffb ldr r3, [r7, #124] @ 0x7c
800b46c: 4413 add r3, r2
800b46e: f203 4304 addw r3, r3, #1028 @ 0x404
800b472: 67bb str r3, [r7, #120] @ 0x78
800b474: 6fbb ldr r3, [r7, #120] @ 0x78
800b476: 881b ldrh r3, [r3, #0]
800b478: b29b uxth r3, r3
800b47a: f3c3 0309 ubfx r3, r3, #0, #10
800b47e: b29a uxth r2, r3
800b480: 6fbb ldr r3, [r7, #120] @ 0x78
800b482: 801a strh r2, [r3, #0]
800b484: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b488: 2b3e cmp r3, #62 @ 0x3e
800b48a: d921 bls.n 800b4d0 <USB_EPStartXfer+0xc40>
800b48c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b490: 095b lsrs r3, r3, #5
800b492: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b496: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b49a: f003 031f and.w r3, r3, #31
800b49e: 2b00 cmp r3, #0
800b4a0: d104 bne.n 800b4ac <USB_EPStartXfer+0xc1c>
800b4a2: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b4a6: 3b01 subs r3, #1
800b4a8: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b4ac: 6fbb ldr r3, [r7, #120] @ 0x78
800b4ae: 881b ldrh r3, [r3, #0]
800b4b0: b29a uxth r2, r3
800b4b2: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b4b6: b29b uxth r3, r3
800b4b8: 029b lsls r3, r3, #10
800b4ba: b29b uxth r3, r3
800b4bc: 4313 orrs r3, r2
800b4be: b29b uxth r3, r3
800b4c0: ea6f 4343 mvn.w r3, r3, lsl #17
800b4c4: ea6f 4353 mvn.w r3, r3, lsr #17
800b4c8: b29a uxth r2, r3
800b4ca: 6fbb ldr r3, [r7, #120] @ 0x78
800b4cc: 801a strh r2, [r3, #0]
800b4ce: e05c b.n 800b58a <USB_EPStartXfer+0xcfa>
800b4d0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b4d4: 2b00 cmp r3, #0
800b4d6: d10a bne.n 800b4ee <USB_EPStartXfer+0xc5e>
800b4d8: 6fbb ldr r3, [r7, #120] @ 0x78
800b4da: 881b ldrh r3, [r3, #0]
800b4dc: b29b uxth r3, r3
800b4de: ea6f 4343 mvn.w r3, r3, lsl #17
800b4e2: ea6f 4353 mvn.w r3, r3, lsr #17
800b4e6: b29a uxth r2, r3
800b4e8: 6fbb ldr r3, [r7, #120] @ 0x78
800b4ea: 801a strh r2, [r3, #0]
800b4ec: e04d b.n 800b58a <USB_EPStartXfer+0xcfa>
800b4ee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b4f2: 085b lsrs r3, r3, #1
800b4f4: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b4f8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b4fc: f003 0301 and.w r3, r3, #1
800b500: 2b00 cmp r3, #0
800b502: d004 beq.n 800b50e <USB_EPStartXfer+0xc7e>
800b504: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b508: 3301 adds r3, #1
800b50a: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b50e: 6fbb ldr r3, [r7, #120] @ 0x78
800b510: 881b ldrh r3, [r3, #0]
800b512: b29a uxth r2, r3
800b514: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b518: b29b uxth r3, r3
800b51a: 029b lsls r3, r3, #10
800b51c: b29b uxth r3, r3
800b51e: 4313 orrs r3, r2
800b520: b29a uxth r2, r3
800b522: 6fbb ldr r3, [r7, #120] @ 0x78
800b524: 801a strh r2, [r3, #0]
800b526: e030 b.n 800b58a <USB_EPStartXfer+0xcfa>
800b528: f507 7384 add.w r3, r7, #264 @ 0x108
800b52c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b530: 681b ldr r3, [r3, #0]
800b532: 785b ldrb r3, [r3, #1]
800b534: 2b01 cmp r3, #1
800b536: d128 bne.n 800b58a <USB_EPStartXfer+0xcfa>
800b538: f507 7384 add.w r3, r7, #264 @ 0x108
800b53c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b540: 681b ldr r3, [r3, #0]
800b542: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800b546: f507 7384 add.w r3, r7, #264 @ 0x108
800b54a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b54e: 681b ldr r3, [r3, #0]
800b550: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b554: b29b uxth r3, r3
800b556: 461a mov r2, r3
800b558: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800b55c: 4413 add r3, r2
800b55e: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800b562: f507 7384 add.w r3, r7, #264 @ 0x108
800b566: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b56a: 681b ldr r3, [r3, #0]
800b56c: 781b ldrb r3, [r3, #0]
800b56e: 011a lsls r2, r3, #4
800b570: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800b574: 4413 add r3, r2
800b576: f203 4304 addw r3, r3, #1028 @ 0x404
800b57a: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800b57e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b582: b29a uxth r2, r3
800b584: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800b588: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800b58a: f507 7384 add.w r3, r7, #264 @ 0x108
800b58e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b592: 681b ldr r3, [r3, #0]
800b594: 891b ldrh r3, [r3, #8]
800b596: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b59a: f507 7384 add.w r3, r7, #264 @ 0x108
800b59e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b5a2: 681b ldr r3, [r3, #0]
800b5a4: 6959 ldr r1, [r3, #20]
800b5a6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5aa: b29b uxth r3, r3
800b5ac: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b5b0: f507 7084 add.w r0, r7, #264 @ 0x108
800b5b4: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b5b8: 6800 ldr r0, [r0, #0]
800b5ba: f000 fe58 bl 800c26e <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
800b5be: f507 7384 add.w r3, r7, #264 @ 0x108
800b5c2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b5c6: 681a ldr r2, [r3, #0]
800b5c8: f507 7384 add.w r3, r7, #264 @ 0x108
800b5cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b5d0: 681b ldr r3, [r3, #0]
800b5d2: 781b ldrb r3, [r3, #0]
800b5d4: 009b lsls r3, r3, #2
800b5d6: 4413 add r3, r2
800b5d8: 881b ldrh r3, [r3, #0]
800b5da: b29b uxth r3, r3
800b5dc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b5e0: f023 0340 bic.w r3, r3, #64 @ 0x40
800b5e4: 817b strh r3, [r7, #10]
800b5e6: 897b ldrh r3, [r7, #10]
800b5e8: f083 0310 eor.w r3, r3, #16
800b5ec: 817b strh r3, [r7, #10]
800b5ee: 897b ldrh r3, [r7, #10]
800b5f0: f083 0320 eor.w r3, r3, #32
800b5f4: 817b strh r3, [r7, #10]
800b5f6: f507 7384 add.w r3, r7, #264 @ 0x108
800b5fa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b5fe: 681a ldr r2, [r3, #0]
800b600: f507 7384 add.w r3, r7, #264 @ 0x108
800b604: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b608: 681b ldr r3, [r3, #0]
800b60a: 781b ldrb r3, [r3, #0]
800b60c: 009b lsls r3, r3, #2
800b60e: 441a add r2, r3
800b610: 897b ldrh r3, [r7, #10]
800b612: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b616: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b61a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b61e: f043 0380 orr.w r3, r3, #128 @ 0x80
800b622: b29b uxth r3, r3
800b624: 8013 strh r3, [r2, #0]
800b626: f000 bcde b.w 800bfe6 <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800b62a: f507 7384 add.w r3, r7, #264 @ 0x108
800b62e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b632: 681b ldr r3, [r3, #0]
800b634: 7b1b ldrb r3, [r3, #12]
800b636: 2b00 cmp r3, #0
800b638: f040 80bb bne.w 800b7b2 <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800b63c: f507 7384 add.w r3, r7, #264 @ 0x108
800b640: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b644: 681b ldr r3, [r3, #0]
800b646: 699a ldr r2, [r3, #24]
800b648: f507 7384 add.w r3, r7, #264 @ 0x108
800b64c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b650: 681b ldr r3, [r3, #0]
800b652: 691b ldr r3, [r3, #16]
800b654: 429a cmp r2, r3
800b656: d917 bls.n 800b688 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
800b658: f507 7384 add.w r3, r7, #264 @ 0x108
800b65c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b660: 681b ldr r3, [r3, #0]
800b662: 691b ldr r3, [r3, #16]
800b664: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800b668: f507 7384 add.w r3, r7, #264 @ 0x108
800b66c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b670: 681b ldr r3, [r3, #0]
800b672: 699a ldr r2, [r3, #24]
800b674: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b678: 1ad2 subs r2, r2, r3
800b67a: f507 7384 add.w r3, r7, #264 @ 0x108
800b67e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b682: 681b ldr r3, [r3, #0]
800b684: 619a str r2, [r3, #24]
800b686: e00e b.n 800b6a6 <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
800b688: f507 7384 add.w r3, r7, #264 @ 0x108
800b68c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b690: 681b ldr r3, [r3, #0]
800b692: 699b ldr r3, [r3, #24]
800b694: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800b698: f507 7384 add.w r3, r7, #264 @ 0x108
800b69c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6a0: 681b ldr r3, [r3, #0]
800b6a2: 2200 movs r2, #0
800b6a4: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
800b6a6: f507 7384 add.w r3, r7, #264 @ 0x108
800b6aa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b6ae: 681b ldr r3, [r3, #0]
800b6b0: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800b6b4: f507 7384 add.w r3, r7, #264 @ 0x108
800b6b8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b6bc: 681b ldr r3, [r3, #0]
800b6be: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b6c2: b29b uxth r3, r3
800b6c4: 461a mov r2, r3
800b6c6: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800b6ca: 4413 add r3, r2
800b6cc: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800b6d0: f507 7384 add.w r3, r7, #264 @ 0x108
800b6d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6d8: 681b ldr r3, [r3, #0]
800b6da: 781b ldrb r3, [r3, #0]
800b6dc: 011a lsls r2, r3, #4
800b6de: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800b6e2: 4413 add r3, r2
800b6e4: f203 430c addw r3, r3, #1036 @ 0x40c
800b6e8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800b6ec: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b6f0: 881b ldrh r3, [r3, #0]
800b6f2: b29b uxth r3, r3
800b6f4: f3c3 0309 ubfx r3, r3, #0, #10
800b6f8: b29a uxth r2, r3
800b6fa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b6fe: 801a strh r2, [r3, #0]
800b700: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b704: 2b3e cmp r3, #62 @ 0x3e
800b706: d924 bls.n 800b752 <USB_EPStartXfer+0xec2>
800b708: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b70c: 095b lsrs r3, r3, #5
800b70e: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b712: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b716: f003 031f and.w r3, r3, #31
800b71a: 2b00 cmp r3, #0
800b71c: d104 bne.n 800b728 <USB_EPStartXfer+0xe98>
800b71e: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b722: 3b01 subs r3, #1
800b724: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b728: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b72c: 881b ldrh r3, [r3, #0]
800b72e: b29a uxth r2, r3
800b730: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b734: b29b uxth r3, r3
800b736: 029b lsls r3, r3, #10
800b738: b29b uxth r3, r3
800b73a: 4313 orrs r3, r2
800b73c: b29b uxth r3, r3
800b73e: ea6f 4343 mvn.w r3, r3, lsl #17
800b742: ea6f 4353 mvn.w r3, r3, lsr #17
800b746: b29a uxth r2, r3
800b748: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b74c: 801a strh r2, [r3, #0]
800b74e: f000 bc10 b.w 800bf72 <USB_EPStartXfer+0x16e2>
800b752: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b756: 2b00 cmp r3, #0
800b758: d10c bne.n 800b774 <USB_EPStartXfer+0xee4>
800b75a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b75e: 881b ldrh r3, [r3, #0]
800b760: b29b uxth r3, r3
800b762: ea6f 4343 mvn.w r3, r3, lsl #17
800b766: ea6f 4353 mvn.w r3, r3, lsr #17
800b76a: b29a uxth r2, r3
800b76c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b770: 801a strh r2, [r3, #0]
800b772: e3fe b.n 800bf72 <USB_EPStartXfer+0x16e2>
800b774: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b778: 085b lsrs r3, r3, #1
800b77a: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b77e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b782: f003 0301 and.w r3, r3, #1
800b786: 2b00 cmp r3, #0
800b788: d004 beq.n 800b794 <USB_EPStartXfer+0xf04>
800b78a: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b78e: 3301 adds r3, #1
800b790: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b794: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b798: 881b ldrh r3, [r3, #0]
800b79a: b29a uxth r2, r3
800b79c: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b7a0: b29b uxth r3, r3
800b7a2: 029b lsls r3, r3, #10
800b7a4: b29b uxth r3, r3
800b7a6: 4313 orrs r3, r2
800b7a8: b29a uxth r2, r3
800b7aa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b7ae: 801a strh r2, [r3, #0]
800b7b0: e3df b.n 800bf72 <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
800b7b2: f507 7384 add.w r3, r7, #264 @ 0x108
800b7b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7ba: 681b ldr r3, [r3, #0]
800b7bc: 78db ldrb r3, [r3, #3]
800b7be: 2b02 cmp r3, #2
800b7c0: f040 8218 bne.w 800bbf4 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
800b7c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b7c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7cc: 681b ldr r3, [r3, #0]
800b7ce: 785b ldrb r3, [r3, #1]
800b7d0: 2b00 cmp r3, #0
800b7d2: f040 809d bne.w 800b910 <USB_EPStartXfer+0x1080>
800b7d6: f507 7384 add.w r3, r7, #264 @ 0x108
800b7da: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b7de: 681b ldr r3, [r3, #0]
800b7e0: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b7e4: f507 7384 add.w r3, r7, #264 @ 0x108
800b7e8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b7ec: 681b ldr r3, [r3, #0]
800b7ee: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b7f2: b29b uxth r3, r3
800b7f4: 461a mov r2, r3
800b7f6: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b7fa: 4413 add r3, r2
800b7fc: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b800: f507 7384 add.w r3, r7, #264 @ 0x108
800b804: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b808: 681b ldr r3, [r3, #0]
800b80a: 781b ldrb r3, [r3, #0]
800b80c: 011a lsls r2, r3, #4
800b80e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b812: 4413 add r3, r2
800b814: f203 4304 addw r3, r3, #1028 @ 0x404
800b818: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
800b81c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b820: 881b ldrh r3, [r3, #0]
800b822: b29b uxth r3, r3
800b824: f3c3 0309 ubfx r3, r3, #0, #10
800b828: b29a uxth r2, r3
800b82a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b82e: 801a strh r2, [r3, #0]
800b830: f507 7384 add.w r3, r7, #264 @ 0x108
800b834: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b838: 681b ldr r3, [r3, #0]
800b83a: 691b ldr r3, [r3, #16]
800b83c: 2b3e cmp r3, #62 @ 0x3e
800b83e: d92b bls.n 800b898 <USB_EPStartXfer+0x1008>
800b840: f507 7384 add.w r3, r7, #264 @ 0x108
800b844: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b848: 681b ldr r3, [r3, #0]
800b84a: 691b ldr r3, [r3, #16]
800b84c: 095b lsrs r3, r3, #5
800b84e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b852: f507 7384 add.w r3, r7, #264 @ 0x108
800b856: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b85a: 681b ldr r3, [r3, #0]
800b85c: 691b ldr r3, [r3, #16]
800b85e: f003 031f and.w r3, r3, #31
800b862: 2b00 cmp r3, #0
800b864: d104 bne.n 800b870 <USB_EPStartXfer+0xfe0>
800b866: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b86a: 3b01 subs r3, #1
800b86c: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b870: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b874: 881b ldrh r3, [r3, #0]
800b876: b29a uxth r2, r3
800b878: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b87c: b29b uxth r3, r3
800b87e: 029b lsls r3, r3, #10
800b880: b29b uxth r3, r3
800b882: 4313 orrs r3, r2
800b884: b29b uxth r3, r3
800b886: ea6f 4343 mvn.w r3, r3, lsl #17
800b88a: ea6f 4353 mvn.w r3, r3, lsr #17
800b88e: b29a uxth r2, r3
800b890: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b894: 801a strh r2, [r3, #0]
800b896: e070 b.n 800b97a <USB_EPStartXfer+0x10ea>
800b898: f507 7384 add.w r3, r7, #264 @ 0x108
800b89c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8a0: 681b ldr r3, [r3, #0]
800b8a2: 691b ldr r3, [r3, #16]
800b8a4: 2b00 cmp r3, #0
800b8a6: d10c bne.n 800b8c2 <USB_EPStartXfer+0x1032>
800b8a8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b8ac: 881b ldrh r3, [r3, #0]
800b8ae: b29b uxth r3, r3
800b8b0: ea6f 4343 mvn.w r3, r3, lsl #17
800b8b4: ea6f 4353 mvn.w r3, r3, lsr #17
800b8b8: b29a uxth r2, r3
800b8ba: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b8be: 801a strh r2, [r3, #0]
800b8c0: e05b b.n 800b97a <USB_EPStartXfer+0x10ea>
800b8c2: f507 7384 add.w r3, r7, #264 @ 0x108
800b8c6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8ca: 681b ldr r3, [r3, #0]
800b8cc: 691b ldr r3, [r3, #16]
800b8ce: 085b lsrs r3, r3, #1
800b8d0: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b8d4: f507 7384 add.w r3, r7, #264 @ 0x108
800b8d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8dc: 681b ldr r3, [r3, #0]
800b8de: 691b ldr r3, [r3, #16]
800b8e0: f003 0301 and.w r3, r3, #1
800b8e4: 2b00 cmp r3, #0
800b8e6: d004 beq.n 800b8f2 <USB_EPStartXfer+0x1062>
800b8e8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b8ec: 3301 adds r3, #1
800b8ee: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b8f2: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b8f6: 881b ldrh r3, [r3, #0]
800b8f8: b29a uxth r2, r3
800b8fa: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b8fe: b29b uxth r3, r3
800b900: 029b lsls r3, r3, #10
800b902: b29b uxth r3, r3
800b904: 4313 orrs r3, r2
800b906: b29a uxth r2, r3
800b908: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b90c: 801a strh r2, [r3, #0]
800b90e: e034 b.n 800b97a <USB_EPStartXfer+0x10ea>
800b910: f507 7384 add.w r3, r7, #264 @ 0x108
800b914: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b918: 681b ldr r3, [r3, #0]
800b91a: 785b ldrb r3, [r3, #1]
800b91c: 2b01 cmp r3, #1
800b91e: d12c bne.n 800b97a <USB_EPStartXfer+0x10ea>
800b920: f507 7384 add.w r3, r7, #264 @ 0x108
800b924: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b928: 681b ldr r3, [r3, #0]
800b92a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b92e: f507 7384 add.w r3, r7, #264 @ 0x108
800b932: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b936: 681b ldr r3, [r3, #0]
800b938: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b93c: b29b uxth r3, r3
800b93e: 461a mov r2, r3
800b940: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b944: 4413 add r3, r2
800b946: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b94a: f507 7384 add.w r3, r7, #264 @ 0x108
800b94e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b952: 681b ldr r3, [r3, #0]
800b954: 781b ldrb r3, [r3, #0]
800b956: 011a lsls r2, r3, #4
800b958: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b95c: 4413 add r3, r2
800b95e: f203 4304 addw r3, r3, #1028 @ 0x404
800b962: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
800b966: f507 7384 add.w r3, r7, #264 @ 0x108
800b96a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b96e: 681b ldr r3, [r3, #0]
800b970: 691b ldr r3, [r3, #16]
800b972: b29a uxth r2, r3
800b974: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
800b978: 801a strh r2, [r3, #0]
800b97a: f507 7384 add.w r3, r7, #264 @ 0x108
800b97e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b982: 681b ldr r3, [r3, #0]
800b984: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b988: f507 7384 add.w r3, r7, #264 @ 0x108
800b98c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b990: 681b ldr r3, [r3, #0]
800b992: 785b ldrb r3, [r3, #1]
800b994: 2b00 cmp r3, #0
800b996: f040 809d bne.w 800bad4 <USB_EPStartXfer+0x1244>
800b99a: f507 7384 add.w r3, r7, #264 @ 0x108
800b99e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b9a2: 681b ldr r3, [r3, #0]
800b9a4: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b9a8: f507 7384 add.w r3, r7, #264 @ 0x108
800b9ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b9b0: 681b ldr r3, [r3, #0]
800b9b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b9b6: b29b uxth r3, r3
800b9b8: 461a mov r2, r3
800b9ba: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b9be: 4413 add r3, r2
800b9c0: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b9c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b9c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b9cc: 681b ldr r3, [r3, #0]
800b9ce: 781b ldrb r3, [r3, #0]
800b9d0: 011a lsls r2, r3, #4
800b9d2: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b9d6: 4413 add r3, r2
800b9d8: f203 430c addw r3, r3, #1036 @ 0x40c
800b9dc: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800b9e0: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b9e4: 881b ldrh r3, [r3, #0]
800b9e6: b29b uxth r3, r3
800b9e8: f3c3 0309 ubfx r3, r3, #0, #10
800b9ec: b29a uxth r2, r3
800b9ee: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b9f2: 801a strh r2, [r3, #0]
800b9f4: f507 7384 add.w r3, r7, #264 @ 0x108
800b9f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b9fc: 681b ldr r3, [r3, #0]
800b9fe: 691b ldr r3, [r3, #16]
800ba00: 2b3e cmp r3, #62 @ 0x3e
800ba02: d92b bls.n 800ba5c <USB_EPStartXfer+0x11cc>
800ba04: f507 7384 add.w r3, r7, #264 @ 0x108
800ba08: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba0c: 681b ldr r3, [r3, #0]
800ba0e: 691b ldr r3, [r3, #16]
800ba10: 095b lsrs r3, r3, #5
800ba12: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800ba16: f507 7384 add.w r3, r7, #264 @ 0x108
800ba1a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba1e: 681b ldr r3, [r3, #0]
800ba20: 691b ldr r3, [r3, #16]
800ba22: f003 031f and.w r3, r3, #31
800ba26: 2b00 cmp r3, #0
800ba28: d104 bne.n 800ba34 <USB_EPStartXfer+0x11a4>
800ba2a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800ba2e: 3b01 subs r3, #1
800ba30: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800ba34: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ba38: 881b ldrh r3, [r3, #0]
800ba3a: b29a uxth r2, r3
800ba3c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800ba40: b29b uxth r3, r3
800ba42: 029b lsls r3, r3, #10
800ba44: b29b uxth r3, r3
800ba46: 4313 orrs r3, r2
800ba48: b29b uxth r3, r3
800ba4a: ea6f 4343 mvn.w r3, r3, lsl #17
800ba4e: ea6f 4353 mvn.w r3, r3, lsr #17
800ba52: b29a uxth r2, r3
800ba54: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ba58: 801a strh r2, [r3, #0]
800ba5a: e069 b.n 800bb30 <USB_EPStartXfer+0x12a0>
800ba5c: f507 7384 add.w r3, r7, #264 @ 0x108
800ba60: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba64: 681b ldr r3, [r3, #0]
800ba66: 691b ldr r3, [r3, #16]
800ba68: 2b00 cmp r3, #0
800ba6a: d10c bne.n 800ba86 <USB_EPStartXfer+0x11f6>
800ba6c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ba70: 881b ldrh r3, [r3, #0]
800ba72: b29b uxth r3, r3
800ba74: ea6f 4343 mvn.w r3, r3, lsl #17
800ba78: ea6f 4353 mvn.w r3, r3, lsr #17
800ba7c: b29a uxth r2, r3
800ba7e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ba82: 801a strh r2, [r3, #0]
800ba84: e054 b.n 800bb30 <USB_EPStartXfer+0x12a0>
800ba86: f507 7384 add.w r3, r7, #264 @ 0x108
800ba8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba8e: 681b ldr r3, [r3, #0]
800ba90: 691b ldr r3, [r3, #16]
800ba92: 085b lsrs r3, r3, #1
800ba94: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800ba98: f507 7384 add.w r3, r7, #264 @ 0x108
800ba9c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800baa0: 681b ldr r3, [r3, #0]
800baa2: 691b ldr r3, [r3, #16]
800baa4: f003 0301 and.w r3, r3, #1
800baa8: 2b00 cmp r3, #0
800baaa: d004 beq.n 800bab6 <USB_EPStartXfer+0x1226>
800baac: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800bab0: 3301 adds r3, #1
800bab2: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800bab6: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800baba: 881b ldrh r3, [r3, #0]
800babc: b29a uxth r2, r3
800babe: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800bac2: b29b uxth r3, r3
800bac4: 029b lsls r3, r3, #10
800bac6: b29b uxth r3, r3
800bac8: 4313 orrs r3, r2
800baca: b29a uxth r2, r3
800bacc: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800bad0: 801a strh r2, [r3, #0]
800bad2: e02d b.n 800bb30 <USB_EPStartXfer+0x12a0>
800bad4: f507 7384 add.w r3, r7, #264 @ 0x108
800bad8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800badc: 681b ldr r3, [r3, #0]
800bade: 785b ldrb r3, [r3, #1]
800bae0: 2b01 cmp r3, #1
800bae2: d125 bne.n 800bb30 <USB_EPStartXfer+0x12a0>
800bae4: f507 7384 add.w r3, r7, #264 @ 0x108
800bae8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800baec: 681b ldr r3, [r3, #0]
800baee: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800baf2: b29b uxth r3, r3
800baf4: 461a mov r2, r3
800baf6: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800bafa: 4413 add r3, r2
800bafc: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800bb00: f507 7384 add.w r3, r7, #264 @ 0x108
800bb04: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb08: 681b ldr r3, [r3, #0]
800bb0a: 781b ldrb r3, [r3, #0]
800bb0c: 011a lsls r2, r3, #4
800bb0e: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800bb12: 4413 add r3, r2
800bb14: f203 430c addw r3, r3, #1036 @ 0x40c
800bb18: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
800bb1c: f507 7384 add.w r3, r7, #264 @ 0x108
800bb20: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb24: 681b ldr r3, [r3, #0]
800bb26: 691b ldr r3, [r3, #16]
800bb28: b29a uxth r2, r3
800bb2a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800bb2e: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
800bb30: f507 7384 add.w r3, r7, #264 @ 0x108
800bb34: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb38: 681b ldr r3, [r3, #0]
800bb3a: 69db ldr r3, [r3, #28]
800bb3c: 2b00 cmp r3, #0
800bb3e: f000 8218 beq.w 800bf72 <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
800bb42: f507 7384 add.w r3, r7, #264 @ 0x108
800bb46: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bb4a: 681a ldr r2, [r3, #0]
800bb4c: f507 7384 add.w r3, r7, #264 @ 0x108
800bb50: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb54: 681b ldr r3, [r3, #0]
800bb56: 781b ldrb r3, [r3, #0]
800bb58: 009b lsls r3, r3, #2
800bb5a: 4413 add r3, r2
800bb5c: 881b ldrh r3, [r3, #0]
800bb5e: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800bb62: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800bb66: f403 4380 and.w r3, r3, #16384 @ 0x4000
800bb6a: 2b00 cmp r3, #0
800bb6c: d005 beq.n 800bb7a <USB_EPStartXfer+0x12ea>
800bb6e: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800bb72: f003 0340 and.w r3, r3, #64 @ 0x40
800bb76: 2b00 cmp r3, #0
800bb78: d10d bne.n 800bb96 <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800bb7a: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800bb7e: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800bb82: 2b00 cmp r3, #0
800bb84: f040 81f5 bne.w 800bf72 <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800bb88: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800bb8c: f003 0340 and.w r3, r3, #64 @ 0x40
800bb90: 2b00 cmp r3, #0
800bb92: f040 81ee bne.w 800bf72 <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
800bb96: f507 7384 add.w r3, r7, #264 @ 0x108
800bb9a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bb9e: 681a ldr r2, [r3, #0]
800bba0: f507 7384 add.w r3, r7, #264 @ 0x108
800bba4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bba8: 681b ldr r3, [r3, #0]
800bbaa: 781b ldrb r3, [r3, #0]
800bbac: 009b lsls r3, r3, #2
800bbae: 4413 add r3, r2
800bbb0: 881b ldrh r3, [r3, #0]
800bbb2: b29b uxth r3, r3
800bbb4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800bbb8: f023 0370 bic.w r3, r3, #112 @ 0x70
800bbbc: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
800bbc0: f507 7384 add.w r3, r7, #264 @ 0x108
800bbc4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bbc8: 681a ldr r2, [r3, #0]
800bbca: f507 7384 add.w r3, r7, #264 @ 0x108
800bbce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bbd2: 681b ldr r3, [r3, #0]
800bbd4: 781b ldrb r3, [r3, #0]
800bbd6: 009b lsls r3, r3, #2
800bbd8: 441a add r2, r3
800bbda: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
800bbde: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bbe2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bbe6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bbea: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800bbee: b29b uxth r3, r3
800bbf0: 8013 strh r3, [r2, #0]
800bbf2: e1be b.n 800bf72 <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800bbf4: f507 7384 add.w r3, r7, #264 @ 0x108
800bbf8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bbfc: 681b ldr r3, [r3, #0]
800bbfe: 78db ldrb r3, [r3, #3]
800bc00: 2b01 cmp r3, #1
800bc02: f040 81b4 bne.w 800bf6e <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800bc06: f507 7384 add.w r3, r7, #264 @ 0x108
800bc0a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc0e: 681b ldr r3, [r3, #0]
800bc10: 699a ldr r2, [r3, #24]
800bc12: f507 7384 add.w r3, r7, #264 @ 0x108
800bc16: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc1a: 681b ldr r3, [r3, #0]
800bc1c: 691b ldr r3, [r3, #16]
800bc1e: 429a cmp r2, r3
800bc20: d917 bls.n 800bc52 <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
800bc22: f507 7384 add.w r3, r7, #264 @ 0x108
800bc26: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc2a: 681b ldr r3, [r3, #0]
800bc2c: 691b ldr r3, [r3, #16]
800bc2e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800bc32: f507 7384 add.w r3, r7, #264 @ 0x108
800bc36: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc3a: 681b ldr r3, [r3, #0]
800bc3c: 699a ldr r2, [r3, #24]
800bc3e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bc42: 1ad2 subs r2, r2, r3
800bc44: f507 7384 add.w r3, r7, #264 @ 0x108
800bc48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc4c: 681b ldr r3, [r3, #0]
800bc4e: 619a str r2, [r3, #24]
800bc50: e00e b.n 800bc70 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
800bc52: f507 7384 add.w r3, r7, #264 @ 0x108
800bc56: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc5a: 681b ldr r3, [r3, #0]
800bc5c: 699b ldr r3, [r3, #24]
800bc5e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800bc62: f507 7384 add.w r3, r7, #264 @ 0x108
800bc66: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc6a: 681b ldr r3, [r3, #0]
800bc6c: 2200 movs r2, #0
800bc6e: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
800bc70: f507 7384 add.w r3, r7, #264 @ 0x108
800bc74: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc78: 681b ldr r3, [r3, #0]
800bc7a: 785b ldrb r3, [r3, #1]
800bc7c: 2b00 cmp r3, #0
800bc7e: f040 8085 bne.w 800bd8c <USB_EPStartXfer+0x14fc>
800bc82: f507 7384 add.w r3, r7, #264 @ 0x108
800bc86: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bc8a: 681b ldr r3, [r3, #0]
800bc8c: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800bc90: f507 7384 add.w r3, r7, #264 @ 0x108
800bc94: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bc98: 681b ldr r3, [r3, #0]
800bc9a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bc9e: b29b uxth r3, r3
800bca0: 461a mov r2, r3
800bca2: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800bca6: 4413 add r3, r2
800bca8: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800bcac: f507 7384 add.w r3, r7, #264 @ 0x108
800bcb0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bcb4: 681b ldr r3, [r3, #0]
800bcb6: 781b ldrb r3, [r3, #0]
800bcb8: 011a lsls r2, r3, #4
800bcba: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800bcbe: 4413 add r3, r2
800bcc0: f203 4304 addw r3, r3, #1028 @ 0x404
800bcc4: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
800bcc8: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bccc: 881b ldrh r3, [r3, #0]
800bcce: b29b uxth r3, r3
800bcd0: f3c3 0309 ubfx r3, r3, #0, #10
800bcd4: b29a uxth r2, r3
800bcd6: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bcda: 801a strh r2, [r3, #0]
800bcdc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bce0: 2b3e cmp r3, #62 @ 0x3e
800bce2: d923 bls.n 800bd2c <USB_EPStartXfer+0x149c>
800bce4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bce8: 095b lsrs r3, r3, #5
800bcea: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bcee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bcf2: f003 031f and.w r3, r3, #31
800bcf6: 2b00 cmp r3, #0
800bcf8: d104 bne.n 800bd04 <USB_EPStartXfer+0x1474>
800bcfa: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bcfe: 3b01 subs r3, #1
800bd00: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bd04: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bd08: 881b ldrh r3, [r3, #0]
800bd0a: b29a uxth r2, r3
800bd0c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bd10: b29b uxth r3, r3
800bd12: 029b lsls r3, r3, #10
800bd14: b29b uxth r3, r3
800bd16: 4313 orrs r3, r2
800bd18: b29b uxth r3, r3
800bd1a: ea6f 4343 mvn.w r3, r3, lsl #17
800bd1e: ea6f 4353 mvn.w r3, r3, lsr #17
800bd22: b29a uxth r2, r3
800bd24: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bd28: 801a strh r2, [r3, #0]
800bd2a: e060 b.n 800bdee <USB_EPStartXfer+0x155e>
800bd2c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd30: 2b00 cmp r3, #0
800bd32: d10c bne.n 800bd4e <USB_EPStartXfer+0x14be>
800bd34: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bd38: 881b ldrh r3, [r3, #0]
800bd3a: b29b uxth r3, r3
800bd3c: ea6f 4343 mvn.w r3, r3, lsl #17
800bd40: ea6f 4353 mvn.w r3, r3, lsr #17
800bd44: b29a uxth r2, r3
800bd46: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bd4a: 801a strh r2, [r3, #0]
800bd4c: e04f b.n 800bdee <USB_EPStartXfer+0x155e>
800bd4e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd52: 085b lsrs r3, r3, #1
800bd54: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bd58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd5c: f003 0301 and.w r3, r3, #1
800bd60: 2b00 cmp r3, #0
800bd62: d004 beq.n 800bd6e <USB_EPStartXfer+0x14de>
800bd64: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bd68: 3301 adds r3, #1
800bd6a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bd6e: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bd72: 881b ldrh r3, [r3, #0]
800bd74: b29a uxth r2, r3
800bd76: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bd7a: b29b uxth r3, r3
800bd7c: 029b lsls r3, r3, #10
800bd7e: b29b uxth r3, r3
800bd80: 4313 orrs r3, r2
800bd82: b29a uxth r2, r3
800bd84: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bd88: 801a strh r2, [r3, #0]
800bd8a: e030 b.n 800bdee <USB_EPStartXfer+0x155e>
800bd8c: f507 7384 add.w r3, r7, #264 @ 0x108
800bd90: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bd94: 681b ldr r3, [r3, #0]
800bd96: 785b ldrb r3, [r3, #1]
800bd98: 2b01 cmp r3, #1
800bd9a: d128 bne.n 800bdee <USB_EPStartXfer+0x155e>
800bd9c: f507 7384 add.w r3, r7, #264 @ 0x108
800bda0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bda4: 681b ldr r3, [r3, #0]
800bda6: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800bdaa: f507 7384 add.w r3, r7, #264 @ 0x108
800bdae: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bdb2: 681b ldr r3, [r3, #0]
800bdb4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bdb8: b29b uxth r3, r3
800bdba: 461a mov r2, r3
800bdbc: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800bdc0: 4413 add r3, r2
800bdc2: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800bdc6: f507 7384 add.w r3, r7, #264 @ 0x108
800bdca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bdce: 681b ldr r3, [r3, #0]
800bdd0: 781b ldrb r3, [r3, #0]
800bdd2: 011a lsls r2, r3, #4
800bdd4: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800bdd8: 4413 add r3, r2
800bdda: f203 4304 addw r3, r3, #1028 @ 0x404
800bdde: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800bde2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bde6: b29a uxth r2, r3
800bde8: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
800bdec: 801a strh r2, [r3, #0]
800bdee: f507 7384 add.w r3, r7, #264 @ 0x108
800bdf2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bdf6: 681b ldr r3, [r3, #0]
800bdf8: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800bdfc: f507 7384 add.w r3, r7, #264 @ 0x108
800be00: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800be04: 681b ldr r3, [r3, #0]
800be06: 785b ldrb r3, [r3, #1]
800be08: 2b00 cmp r3, #0
800be0a: f040 8085 bne.w 800bf18 <USB_EPStartXfer+0x1688>
800be0e: f507 7384 add.w r3, r7, #264 @ 0x108
800be12: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800be16: 681b ldr r3, [r3, #0]
800be18: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800be1c: f507 7384 add.w r3, r7, #264 @ 0x108
800be20: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800be24: 681b ldr r3, [r3, #0]
800be26: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800be2a: b29b uxth r3, r3
800be2c: 461a mov r2, r3
800be2e: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800be32: 4413 add r3, r2
800be34: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800be38: f507 7384 add.w r3, r7, #264 @ 0x108
800be3c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800be40: 681b ldr r3, [r3, #0]
800be42: 781b ldrb r3, [r3, #0]
800be44: 011a lsls r2, r3, #4
800be46: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800be4a: 4413 add r3, r2
800be4c: f203 430c addw r3, r3, #1036 @ 0x40c
800be50: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
800be54: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800be58: 881b ldrh r3, [r3, #0]
800be5a: b29b uxth r3, r3
800be5c: f3c3 0309 ubfx r3, r3, #0, #10
800be60: b29a uxth r2, r3
800be62: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800be66: 801a strh r2, [r3, #0]
800be68: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800be6c: 2b3e cmp r3, #62 @ 0x3e
800be6e: d923 bls.n 800beb8 <USB_EPStartXfer+0x1628>
800be70: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800be74: 095b lsrs r3, r3, #5
800be76: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800be7a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800be7e: f003 031f and.w r3, r3, #31
800be82: 2b00 cmp r3, #0
800be84: d104 bne.n 800be90 <USB_EPStartXfer+0x1600>
800be86: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800be8a: 3b01 subs r3, #1
800be8c: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800be90: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800be94: 881b ldrh r3, [r3, #0]
800be96: b29a uxth r2, r3
800be98: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800be9c: b29b uxth r3, r3
800be9e: 029b lsls r3, r3, #10
800bea0: b29b uxth r3, r3
800bea2: 4313 orrs r3, r2
800bea4: b29b uxth r3, r3
800bea6: ea6f 4343 mvn.w r3, r3, lsl #17
800beaa: ea6f 4353 mvn.w r3, r3, lsr #17
800beae: b29a uxth r2, r3
800beb0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800beb4: 801a strh r2, [r3, #0]
800beb6: e05c b.n 800bf72 <USB_EPStartXfer+0x16e2>
800beb8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bebc: 2b00 cmp r3, #0
800bebe: d10c bne.n 800beda <USB_EPStartXfer+0x164a>
800bec0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bec4: 881b ldrh r3, [r3, #0]
800bec6: b29b uxth r3, r3
800bec8: ea6f 4343 mvn.w r3, r3, lsl #17
800becc: ea6f 4353 mvn.w r3, r3, lsr #17
800bed0: b29a uxth r2, r3
800bed2: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bed6: 801a strh r2, [r3, #0]
800bed8: e04b b.n 800bf72 <USB_EPStartXfer+0x16e2>
800beda: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bede: 085b lsrs r3, r3, #1
800bee0: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bee4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bee8: f003 0301 and.w r3, r3, #1
800beec: 2b00 cmp r3, #0
800beee: d004 beq.n 800befa <USB_EPStartXfer+0x166a>
800bef0: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bef4: 3301 adds r3, #1
800bef6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800befa: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800befe: 881b ldrh r3, [r3, #0]
800bf00: b29a uxth r2, r3
800bf02: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bf06: b29b uxth r3, r3
800bf08: 029b lsls r3, r3, #10
800bf0a: b29b uxth r3, r3
800bf0c: 4313 orrs r3, r2
800bf0e: b29a uxth r2, r3
800bf10: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bf14: 801a strh r2, [r3, #0]
800bf16: e02c b.n 800bf72 <USB_EPStartXfer+0x16e2>
800bf18: f507 7384 add.w r3, r7, #264 @ 0x108
800bf1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bf20: 681b ldr r3, [r3, #0]
800bf22: 785b ldrb r3, [r3, #1]
800bf24: 2b01 cmp r3, #1
800bf26: d124 bne.n 800bf72 <USB_EPStartXfer+0x16e2>
800bf28: f507 7384 add.w r3, r7, #264 @ 0x108
800bf2c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bf30: 681b ldr r3, [r3, #0]
800bf32: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bf36: b29b uxth r3, r3
800bf38: 461a mov r2, r3
800bf3a: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800bf3e: 4413 add r3, r2
800bf40: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800bf44: f507 7384 add.w r3, r7, #264 @ 0x108
800bf48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bf4c: 681b ldr r3, [r3, #0]
800bf4e: 781b ldrb r3, [r3, #0]
800bf50: 011a lsls r2, r3, #4
800bf52: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800bf56: 4413 add r3, r2
800bf58: f203 430c addw r3, r3, #1036 @ 0x40c
800bf5c: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800bf60: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bf64: b29a uxth r2, r3
800bf66: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800bf6a: 801a strh r2, [r3, #0]
800bf6c: e001 b.n 800bf72 <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
800bf6e: 2301 movs r3, #1
800bf70: e03a b.n 800bfe8 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800bf72: f507 7384 add.w r3, r7, #264 @ 0x108
800bf76: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bf7a: 681a ldr r2, [r3, #0]
800bf7c: f507 7384 add.w r3, r7, #264 @ 0x108
800bf80: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bf84: 681b ldr r3, [r3, #0]
800bf86: 781b ldrb r3, [r3, #0]
800bf88: 009b lsls r3, r3, #2
800bf8a: 4413 add r3, r2
800bf8c: 881b ldrh r3, [r3, #0]
800bf8e: b29b uxth r3, r3
800bf90: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800bf94: f023 0370 bic.w r3, r3, #112 @ 0x70
800bf98: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800bf9c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800bfa0: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800bfa4: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800bfa8: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800bfac: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800bfb0: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800bfb4: f507 7384 add.w r3, r7, #264 @ 0x108
800bfb8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bfbc: 681a ldr r2, [r3, #0]
800bfbe: f507 7384 add.w r3, r7, #264 @ 0x108
800bfc2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bfc6: 681b ldr r3, [r3, #0]
800bfc8: 781b ldrb r3, [r3, #0]
800bfca: 009b lsls r3, r3, #2
800bfcc: 441a add r2, r3
800bfce: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800bfd2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bfd6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bfda: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bfde: f043 0380 orr.w r3, r3, #128 @ 0x80
800bfe2: b29b uxth r3, r3
800bfe4: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800bfe6: 2300 movs r3, #0
}
800bfe8: 4618 mov r0, r3
800bfea: f507 7784 add.w r7, r7, #264 @ 0x108
800bfee: 46bd mov sp, r7
800bff0: bd80 pop {r7, pc}
0800bff2 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800bff2: b480 push {r7}
800bff4: b085 sub sp, #20
800bff6: af00 add r7, sp, #0
800bff8: 6078 str r0, [r7, #4]
800bffa: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
800bffc: 683b ldr r3, [r7, #0]
800bffe: 785b ldrb r3, [r3, #1]
800c000: 2b00 cmp r3, #0
800c002: d020 beq.n 800c046 <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
800c004: 687a ldr r2, [r7, #4]
800c006: 683b ldr r3, [r7, #0]
800c008: 781b ldrb r3, [r3, #0]
800c00a: 009b lsls r3, r3, #2
800c00c: 4413 add r3, r2
800c00e: 881b ldrh r3, [r3, #0]
800c010: b29b uxth r3, r3
800c012: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800c016: f023 0340 bic.w r3, r3, #64 @ 0x40
800c01a: 81bb strh r3, [r7, #12]
800c01c: 89bb ldrh r3, [r7, #12]
800c01e: f083 0310 eor.w r3, r3, #16
800c022: 81bb strh r3, [r7, #12]
800c024: 687a ldr r2, [r7, #4]
800c026: 683b ldr r3, [r7, #0]
800c028: 781b ldrb r3, [r3, #0]
800c02a: 009b lsls r3, r3, #2
800c02c: 441a add r2, r3
800c02e: 89bb ldrh r3, [r7, #12]
800c030: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c034: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c038: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c03c: f043 0380 orr.w r3, r3, #128 @ 0x80
800c040: b29b uxth r3, r3
800c042: 8013 strh r3, [r2, #0]
800c044: e01f b.n 800c086 <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800c046: 687a ldr r2, [r7, #4]
800c048: 683b ldr r3, [r7, #0]
800c04a: 781b ldrb r3, [r3, #0]
800c04c: 009b lsls r3, r3, #2
800c04e: 4413 add r3, r2
800c050: 881b ldrh r3, [r3, #0]
800c052: b29b uxth r3, r3
800c054: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800c058: f023 0370 bic.w r3, r3, #112 @ 0x70
800c05c: 81fb strh r3, [r7, #14]
800c05e: 89fb ldrh r3, [r7, #14]
800c060: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800c064: 81fb strh r3, [r7, #14]
800c066: 687a ldr r2, [r7, #4]
800c068: 683b ldr r3, [r7, #0]
800c06a: 781b ldrb r3, [r3, #0]
800c06c: 009b lsls r3, r3, #2
800c06e: 441a add r2, r3
800c070: 89fb ldrh r3, [r7, #14]
800c072: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c076: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c07a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c07e: f043 0380 orr.w r3, r3, #128 @ 0x80
800c082: b29b uxth r3, r3
800c084: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800c086: 2300 movs r3, #0
}
800c088: 4618 mov r0, r3
800c08a: 3714 adds r7, #20
800c08c: 46bd mov sp, r7
800c08e: bc80 pop {r7}
800c090: 4770 bx lr
0800c092 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800c092: b480 push {r7}
800c094: b087 sub sp, #28
800c096: af00 add r7, sp, #0
800c098: 6078 str r0, [r7, #4]
800c09a: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800c09c: 683b ldr r3, [r7, #0]
800c09e: 7b1b ldrb r3, [r3, #12]
800c0a0: 2b00 cmp r3, #0
800c0a2: f040 809d bne.w 800c1e0 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800c0a6: 683b ldr r3, [r7, #0]
800c0a8: 785b ldrb r3, [r3, #1]
800c0aa: 2b00 cmp r3, #0
800c0ac: d04c beq.n 800c148 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800c0ae: 687a ldr r2, [r7, #4]
800c0b0: 683b ldr r3, [r7, #0]
800c0b2: 781b ldrb r3, [r3, #0]
800c0b4: 009b lsls r3, r3, #2
800c0b6: 4413 add r3, r2
800c0b8: 881b ldrh r3, [r3, #0]
800c0ba: 823b strh r3, [r7, #16]
800c0bc: 8a3b ldrh r3, [r7, #16]
800c0be: f003 0340 and.w r3, r3, #64 @ 0x40
800c0c2: 2b00 cmp r3, #0
800c0c4: d01b beq.n 800c0fe <USB_EPClearStall+0x6c>
800c0c6: 687a ldr r2, [r7, #4]
800c0c8: 683b ldr r3, [r7, #0]
800c0ca: 781b ldrb r3, [r3, #0]
800c0cc: 009b lsls r3, r3, #2
800c0ce: 4413 add r3, r2
800c0d0: 881b ldrh r3, [r3, #0]
800c0d2: b29b uxth r3, r3
800c0d4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800c0d8: f023 0370 bic.w r3, r3, #112 @ 0x70
800c0dc: 81fb strh r3, [r7, #14]
800c0de: 687a ldr r2, [r7, #4]
800c0e0: 683b ldr r3, [r7, #0]
800c0e2: 781b ldrb r3, [r3, #0]
800c0e4: 009b lsls r3, r3, #2
800c0e6: 441a add r2, r3
800c0e8: 89fb ldrh r3, [r7, #14]
800c0ea: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c0ee: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c0f2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c0f6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800c0fa: b29b uxth r3, r3
800c0fc: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800c0fe: 683b ldr r3, [r7, #0]
800c100: 78db ldrb r3, [r3, #3]
800c102: 2b01 cmp r3, #1
800c104: d06c beq.n 800c1e0 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800c106: 687a ldr r2, [r7, #4]
800c108: 683b ldr r3, [r7, #0]
800c10a: 781b ldrb r3, [r3, #0]
800c10c: 009b lsls r3, r3, #2
800c10e: 4413 add r3, r2
800c110: 881b ldrh r3, [r3, #0]
800c112: b29b uxth r3, r3
800c114: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800c118: f023 0340 bic.w r3, r3, #64 @ 0x40
800c11c: 81bb strh r3, [r7, #12]
800c11e: 89bb ldrh r3, [r7, #12]
800c120: f083 0320 eor.w r3, r3, #32
800c124: 81bb strh r3, [r7, #12]
800c126: 687a ldr r2, [r7, #4]
800c128: 683b ldr r3, [r7, #0]
800c12a: 781b ldrb r3, [r3, #0]
800c12c: 009b lsls r3, r3, #2
800c12e: 441a add r2, r3
800c130: 89bb ldrh r3, [r7, #12]
800c132: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c136: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c13a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c13e: f043 0380 orr.w r3, r3, #128 @ 0x80
800c142: b29b uxth r3, r3
800c144: 8013 strh r3, [r2, #0]
800c146: e04b b.n 800c1e0 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800c148: 687a ldr r2, [r7, #4]
800c14a: 683b ldr r3, [r7, #0]
800c14c: 781b ldrb r3, [r3, #0]
800c14e: 009b lsls r3, r3, #2
800c150: 4413 add r3, r2
800c152: 881b ldrh r3, [r3, #0]
800c154: 82fb strh r3, [r7, #22]
800c156: 8afb ldrh r3, [r7, #22]
800c158: f403 4380 and.w r3, r3, #16384 @ 0x4000
800c15c: 2b00 cmp r3, #0
800c15e: d01b beq.n 800c198 <USB_EPClearStall+0x106>
800c160: 687a ldr r2, [r7, #4]
800c162: 683b ldr r3, [r7, #0]
800c164: 781b ldrb r3, [r3, #0]
800c166: 009b lsls r3, r3, #2
800c168: 4413 add r3, r2
800c16a: 881b ldrh r3, [r3, #0]
800c16c: b29b uxth r3, r3
800c16e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800c172: f023 0370 bic.w r3, r3, #112 @ 0x70
800c176: 82bb strh r3, [r7, #20]
800c178: 687a ldr r2, [r7, #4]
800c17a: 683b ldr r3, [r7, #0]
800c17c: 781b ldrb r3, [r3, #0]
800c17e: 009b lsls r3, r3, #2
800c180: 441a add r2, r3
800c182: 8abb ldrh r3, [r7, #20]
800c184: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c188: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c18c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800c190: f043 0380 orr.w r3, r3, #128 @ 0x80
800c194: b29b uxth r3, r3
800c196: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800c198: 687a ldr r2, [r7, #4]
800c19a: 683b ldr r3, [r7, #0]
800c19c: 781b ldrb r3, [r3, #0]
800c19e: 009b lsls r3, r3, #2
800c1a0: 4413 add r3, r2
800c1a2: 881b ldrh r3, [r3, #0]
800c1a4: b29b uxth r3, r3
800c1a6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800c1aa: f023 0370 bic.w r3, r3, #112 @ 0x70
800c1ae: 827b strh r3, [r7, #18]
800c1b0: 8a7b ldrh r3, [r7, #18]
800c1b2: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800c1b6: 827b strh r3, [r7, #18]
800c1b8: 8a7b ldrh r3, [r7, #18]
800c1ba: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800c1be: 827b strh r3, [r7, #18]
800c1c0: 687a ldr r2, [r7, #4]
800c1c2: 683b ldr r3, [r7, #0]
800c1c4: 781b ldrb r3, [r3, #0]
800c1c6: 009b lsls r3, r3, #2
800c1c8: 441a add r2, r3
800c1ca: 8a7b ldrh r3, [r7, #18]
800c1cc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c1d0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c1d4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c1d8: f043 0380 orr.w r3, r3, #128 @ 0x80
800c1dc: b29b uxth r3, r3
800c1de: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800c1e0: 2300 movs r3, #0
}
800c1e2: 4618 mov r0, r3
800c1e4: 371c adds r7, #28
800c1e6: 46bd mov sp, r7
800c1e8: bc80 pop {r7}
800c1ea: 4770 bx lr
0800c1ec <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
800c1ec: b480 push {r7}
800c1ee: b083 sub sp, #12
800c1f0: af00 add r7, sp, #0
800c1f2: 6078 str r0, [r7, #4]
800c1f4: 460b mov r3, r1
800c1f6: 70fb strb r3, [r7, #3]
if (address == 0U)
800c1f8: 78fb ldrb r3, [r7, #3]
800c1fa: 2b00 cmp r3, #0
800c1fc: d103 bne.n 800c206 <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800c1fe: 687b ldr r3, [r7, #4]
800c200: 2280 movs r2, #128 @ 0x80
800c202: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
800c206: 2300 movs r3, #0
}
800c208: 4618 mov r0, r3
800c20a: 370c adds r7, #12
800c20c: 46bd mov sp, r7
800c20e: bc80 pop {r7}
800c210: 4770 bx lr
0800c212 <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
800c212: b480 push {r7}
800c214: b083 sub sp, #12
800c216: af00 add r7, sp, #0
800c218: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c21a: 2300 movs r3, #0
}
800c21c: 4618 mov r0, r3
800c21e: 370c adds r7, #12
800c220: 46bd mov sp, r7
800c222: bc80 pop {r7}
800c224: 4770 bx lr
0800c226 <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800c226: b480 push {r7}
800c228: b083 sub sp, #12
800c22a: af00 add r7, sp, #0
800c22c: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c22e: 2300 movs r3, #0
}
800c230: 4618 mov r0, r3
800c232: 370c adds r7, #12
800c234: 46bd mov sp, r7
800c236: bc80 pop {r7}
800c238: 4770 bx lr
0800c23a <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
800c23a: b480 push {r7}
800c23c: b085 sub sp, #20
800c23e: af00 add r7, sp, #0
800c240: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
800c242: 687b ldr r3, [r7, #4]
800c244: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800c248: b29b uxth r3, r3
800c24a: 60fb str r3, [r7, #12]
return tmpreg;
800c24c: 68fb ldr r3, [r7, #12]
}
800c24e: 4618 mov r0, r3
800c250: 3714 adds r7, #20
800c252: 46bd mov sp, r7
800c254: bc80 pop {r7}
800c256: 4770 bx lr
0800c258 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
800c258: b480 push {r7}
800c25a: b083 sub sp, #12
800c25c: af00 add r7, sp, #0
800c25e: 6078 str r0, [r7, #4]
800c260: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c262: 2300 movs r3, #0
}
800c264: 4618 mov r0, r3
800c266: 370c adds r7, #12
800c268: 46bd mov sp, r7
800c26a: bc80 pop {r7}
800c26c: 4770 bx lr
0800c26e <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800c26e: b480 push {r7}
800c270: b08b sub sp, #44 @ 0x2c
800c272: af00 add r7, sp, #0
800c274: 60f8 str r0, [r7, #12]
800c276: 60b9 str r1, [r7, #8]
800c278: 4611 mov r1, r2
800c27a: 461a mov r2, r3
800c27c: 460b mov r3, r1
800c27e: 80fb strh r3, [r7, #6]
800c280: 4613 mov r3, r2
800c282: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
800c284: 88bb ldrh r3, [r7, #4]
800c286: 3301 adds r3, #1
800c288: 085b lsrs r3, r3, #1
800c28a: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800c28c: 68fb ldr r3, [r7, #12]
800c28e: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800c290: 68bb ldr r3, [r7, #8]
800c292: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800c294: 88fb ldrh r3, [r7, #6]
800c296: 005a lsls r2, r3, #1
800c298: 697b ldr r3, [r7, #20]
800c29a: 4413 add r3, r2
800c29c: f503 6380 add.w r3, r3, #1024 @ 0x400
800c2a0: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c2a2: 69bb ldr r3, [r7, #24]
800c2a4: 627b str r3, [r7, #36] @ 0x24
800c2a6: e01f b.n 800c2e8 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
800c2a8: 69fb ldr r3, [r7, #28]
800c2aa: 781b ldrb r3, [r3, #0]
800c2ac: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
800c2ae: 69fb ldr r3, [r7, #28]
800c2b0: 3301 adds r3, #1
800c2b2: 781b ldrb r3, [r3, #0]
800c2b4: b21b sxth r3, r3
800c2b6: 021b lsls r3, r3, #8
800c2b8: b21a sxth r2, r3
800c2ba: f9b7 3012 ldrsh.w r3, [r7, #18]
800c2be: 4313 orrs r3, r2
800c2c0: b21b sxth r3, r3
800c2c2: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
800c2c4: 6a3b ldr r3, [r7, #32]
800c2c6: 8a7a ldrh r2, [r7, #18]
800c2c8: 801a strh r2, [r3, #0]
pdwVal++;
800c2ca: 6a3b ldr r3, [r7, #32]
800c2cc: 3302 adds r3, #2
800c2ce: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
800c2d0: 6a3b ldr r3, [r7, #32]
800c2d2: 3302 adds r3, #2
800c2d4: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
800c2d6: 69fb ldr r3, [r7, #28]
800c2d8: 3301 adds r3, #1
800c2da: 61fb str r3, [r7, #28]
pBuf++;
800c2dc: 69fb ldr r3, [r7, #28]
800c2de: 3301 adds r3, #1
800c2e0: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
800c2e2: 6a7b ldr r3, [r7, #36] @ 0x24
800c2e4: 3b01 subs r3, #1
800c2e6: 627b str r3, [r7, #36] @ 0x24
800c2e8: 6a7b ldr r3, [r7, #36] @ 0x24
800c2ea: 2b00 cmp r3, #0
800c2ec: d1dc bne.n 800c2a8 <USB_WritePMA+0x3a>
}
}
800c2ee: bf00 nop
800c2f0: bf00 nop
800c2f2: 372c adds r7, #44 @ 0x2c
800c2f4: 46bd mov sp, r7
800c2f6: bc80 pop {r7}
800c2f8: 4770 bx lr
0800c2fa <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800c2fa: b480 push {r7}
800c2fc: b08b sub sp, #44 @ 0x2c
800c2fe: af00 add r7, sp, #0
800c300: 60f8 str r0, [r7, #12]
800c302: 60b9 str r1, [r7, #8]
800c304: 4611 mov r1, r2
800c306: 461a mov r2, r3
800c308: 460b mov r3, r1
800c30a: 80fb strh r3, [r7, #6]
800c30c: 4613 mov r3, r2
800c30e: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
800c310: 88bb ldrh r3, [r7, #4]
800c312: 085b lsrs r3, r3, #1
800c314: b29b uxth r3, r3
800c316: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800c318: 68fb ldr r3, [r7, #12]
800c31a: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800c31c: 68bb ldr r3, [r7, #8]
800c31e: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800c320: 88fb ldrh r3, [r7, #6]
800c322: 005a lsls r2, r3, #1
800c324: 697b ldr r3, [r7, #20]
800c326: 4413 add r3, r2
800c328: f503 6380 add.w r3, r3, #1024 @ 0x400
800c32c: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c32e: 69bb ldr r3, [r7, #24]
800c330: 627b str r3, [r7, #36] @ 0x24
800c332: e01b b.n 800c36c <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
800c334: 6a3b ldr r3, [r7, #32]
800c336: 881b ldrh r3, [r3, #0]
800c338: b29b uxth r3, r3
800c33a: 613b str r3, [r7, #16]
pdwVal++;
800c33c: 6a3b ldr r3, [r7, #32]
800c33e: 3302 adds r3, #2
800c340: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800c342: 693b ldr r3, [r7, #16]
800c344: b2da uxtb r2, r3
800c346: 69fb ldr r3, [r7, #28]
800c348: 701a strb r2, [r3, #0]
pBuf++;
800c34a: 69fb ldr r3, [r7, #28]
800c34c: 3301 adds r3, #1
800c34e: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
800c350: 693b ldr r3, [r7, #16]
800c352: 0a1b lsrs r3, r3, #8
800c354: b2da uxtb r2, r3
800c356: 69fb ldr r3, [r7, #28]
800c358: 701a strb r2, [r3, #0]
pBuf++;
800c35a: 69fb ldr r3, [r7, #28]
800c35c: 3301 adds r3, #1
800c35e: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
800c360: 6a3b ldr r3, [r7, #32]
800c362: 3302 adds r3, #2
800c364: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c366: 6a7b ldr r3, [r7, #36] @ 0x24
800c368: 3b01 subs r3, #1
800c36a: 627b str r3, [r7, #36] @ 0x24
800c36c: 6a7b ldr r3, [r7, #36] @ 0x24
800c36e: 2b00 cmp r3, #0
800c370: d1e0 bne.n 800c334 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
800c372: 88bb ldrh r3, [r7, #4]
800c374: f003 0301 and.w r3, r3, #1
800c378: b29b uxth r3, r3
800c37a: 2b00 cmp r3, #0
800c37c: d007 beq.n 800c38e <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
800c37e: 6a3b ldr r3, [r7, #32]
800c380: 881b ldrh r3, [r3, #0]
800c382: b29b uxth r3, r3
800c384: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800c386: 693b ldr r3, [r7, #16]
800c388: b2da uxtb r2, r3
800c38a: 69fb ldr r3, [r7, #28]
800c38c: 701a strb r2, [r3, #0]
}
}
800c38e: bf00 nop
800c390: 372c adds r7, #44 @ 0x2c
800c392: 46bd mov sp, r7
800c394: bc80 pop {r7}
800c396: 4770 bx lr
0800c398 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c398: b580 push {r7, lr}
800c39a: b084 sub sp, #16
800c39c: af00 add r7, sp, #0
800c39e: 6078 str r0, [r7, #4]
800c3a0: 460b mov r3, r1
800c3a2: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800c3a4: 2300 movs r3, #0
800c3a6: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c3a8: 687b ldr r3, [r7, #4]
800c3aa: 7c1b ldrb r3, [r3, #16]
800c3ac: 2b00 cmp r3, #0
800c3ae: d115 bne.n 800c3dc <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800c3b0: f44f 7300 mov.w r3, #512 @ 0x200
800c3b4: 2202 movs r2, #2
800c3b6: 2181 movs r1, #129 @ 0x81
800c3b8: 6878 ldr r0, [r7, #4]
800c3ba: f001 ff00 bl 800e1be <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800c3be: 687b ldr r3, [r7, #4]
800c3c0: 2201 movs r2, #1
800c3c2: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800c3c4: f44f 7300 mov.w r3, #512 @ 0x200
800c3c8: 2202 movs r2, #2
800c3ca: 2101 movs r1, #1
800c3cc: 6878 ldr r0, [r7, #4]
800c3ce: f001 fef6 bl 800e1be <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800c3d2: 687b ldr r3, [r7, #4]
800c3d4: 2201 movs r2, #1
800c3d6: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800c3da: e012 b.n 800c402 <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800c3dc: 2340 movs r3, #64 @ 0x40
800c3de: 2202 movs r2, #2
800c3e0: 2181 movs r1, #129 @ 0x81
800c3e2: 6878 ldr r0, [r7, #4]
800c3e4: f001 feeb bl 800e1be <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800c3e8: 687b ldr r3, [r7, #4]
800c3ea: 2201 movs r2, #1
800c3ec: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800c3ee: 2340 movs r3, #64 @ 0x40
800c3f0: 2202 movs r2, #2
800c3f2: 2101 movs r1, #1
800c3f4: 6878 ldr r0, [r7, #4]
800c3f6: f001 fee2 bl 800e1be <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800c3fa: 687b ldr r3, [r7, #4]
800c3fc: 2201 movs r2, #1
800c3fe: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
800c402: 2308 movs r3, #8
800c404: 2203 movs r2, #3
800c406: 2182 movs r1, #130 @ 0x82
800c408: 6878 ldr r0, [r7, #4]
800c40a: f001 fed8 bl 800e1be <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800c40e: 687b ldr r3, [r7, #4]
800c410: 2201 movs r2, #1
800c412: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
800c414: f44f 7007 mov.w r0, #540 @ 0x21c
800c418: f001 fff8 bl 800e40c <USBD_static_malloc>
800c41c: 4602 mov r2, r0
800c41e: 687b ldr r3, [r7, #4]
800c420: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
800c424: 687b ldr r3, [r7, #4]
800c426: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c42a: 2b00 cmp r3, #0
800c42c: d102 bne.n 800c434 <USBD_CDC_Init+0x9c>
{
ret = 1U;
800c42e: 2301 movs r3, #1
800c430: 73fb strb r3, [r7, #15]
800c432: e026 b.n 800c482 <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c434: 687b ldr r3, [r7, #4]
800c436: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c43a: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
800c43c: 687b ldr r3, [r7, #4]
800c43e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c442: 681b ldr r3, [r3, #0]
800c444: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800c446: 68bb ldr r3, [r7, #8]
800c448: 2200 movs r2, #0
800c44a: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
800c44e: 68bb ldr r3, [r7, #8]
800c450: 2200 movs r2, #0
800c452: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c456: 687b ldr r3, [r7, #4]
800c458: 7c1b ldrb r3, [r3, #16]
800c45a: 2b00 cmp r3, #0
800c45c: d109 bne.n 800c472 <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800c45e: 68bb ldr r3, [r7, #8]
800c460: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c464: f44f 7300 mov.w r3, #512 @ 0x200
800c468: 2101 movs r1, #1
800c46a: 6878 ldr r0, [r7, #4]
800c46c: f001 ff97 bl 800e39e <USBD_LL_PrepareReceive>
800c470: e007 b.n 800c482 <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800c472: 68bb ldr r3, [r7, #8]
800c474: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c478: 2340 movs r3, #64 @ 0x40
800c47a: 2101 movs r1, #1
800c47c: 6878 ldr r0, [r7, #4]
800c47e: f001 ff8e bl 800e39e <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
800c482: 7bfb ldrb r3, [r7, #15]
}
800c484: 4618 mov r0, r3
800c486: 3710 adds r7, #16
800c488: 46bd mov sp, r7
800c48a: bd80 pop {r7, pc}
0800c48c <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c48c: b580 push {r7, lr}
800c48e: b084 sub sp, #16
800c490: af00 add r7, sp, #0
800c492: 6078 str r0, [r7, #4]
800c494: 460b mov r3, r1
800c496: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800c498: 2300 movs r3, #0
800c49a: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
800c49c: 2181 movs r1, #129 @ 0x81
800c49e: 6878 ldr r0, [r7, #4]
800c4a0: f001 feb3 bl 800e20a <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
800c4a4: 687b ldr r3, [r7, #4]
800c4a6: 2200 movs r2, #0
800c4a8: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
800c4aa: 2101 movs r1, #1
800c4ac: 6878 ldr r0, [r7, #4]
800c4ae: f001 feac bl 800e20a <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
800c4b2: 687b ldr r3, [r7, #4]
800c4b4: 2200 movs r2, #0
800c4b6: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
800c4ba: 2182 movs r1, #130 @ 0x82
800c4bc: 6878 ldr r0, [r7, #4]
800c4be: f001 fea4 bl 800e20a <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
800c4c2: 687b ldr r3, [r7, #4]
800c4c4: 2200 movs r2, #0
800c4c6: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
800c4c8: 687b ldr r3, [r7, #4]
800c4ca: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c4ce: 2b00 cmp r3, #0
800c4d0: d00e beq.n 800c4f0 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
800c4d2: 687b ldr r3, [r7, #4]
800c4d4: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c4d8: 685b ldr r3, [r3, #4]
800c4da: 4798 blx r3
USBD_free(pdev->pClassData);
800c4dc: 687b ldr r3, [r7, #4]
800c4de: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c4e2: 4618 mov r0, r3
800c4e4: f001 ff9e bl 800e424 <USBD_static_free>
pdev->pClassData = NULL;
800c4e8: 687b ldr r3, [r7, #4]
800c4ea: 2200 movs r2, #0
800c4ec: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
800c4f0: 7bfb ldrb r3, [r7, #15]
}
800c4f2: 4618 mov r0, r3
800c4f4: 3710 adds r7, #16
800c4f6: 46bd mov sp, r7
800c4f8: bd80 pop {r7, pc}
0800c4fa <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c4fa: b580 push {r7, lr}
800c4fc: b086 sub sp, #24
800c4fe: af00 add r7, sp, #0
800c500: 6078 str r0, [r7, #4]
800c502: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c504: 687b ldr r3, [r7, #4]
800c506: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c50a: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
800c50c: 2300 movs r3, #0
800c50e: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
800c510: 2300 movs r3, #0
800c512: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
800c514: 2300 movs r3, #0
800c516: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c518: 683b ldr r3, [r7, #0]
800c51a: 781b ldrb r3, [r3, #0]
800c51c: f003 0360 and.w r3, r3, #96 @ 0x60
800c520: 2b00 cmp r3, #0
800c522: d039 beq.n 800c598 <USBD_CDC_Setup+0x9e>
800c524: 2b20 cmp r3, #32
800c526: d17f bne.n 800c628 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
800c528: 683b ldr r3, [r7, #0]
800c52a: 88db ldrh r3, [r3, #6]
800c52c: 2b00 cmp r3, #0
800c52e: d029 beq.n 800c584 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
800c530: 683b ldr r3, [r7, #0]
800c532: 781b ldrb r3, [r3, #0]
800c534: b25b sxtb r3, r3
800c536: 2b00 cmp r3, #0
800c538: da11 bge.n 800c55e <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c53a: 687b ldr r3, [r7, #4]
800c53c: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c540: 689b ldr r3, [r3, #8]
800c542: 683a ldr r2, [r7, #0]
800c544: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800c546: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c548: 683a ldr r2, [r7, #0]
800c54a: 88d2 ldrh r2, [r2, #6]
800c54c: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800c54e: 6939 ldr r1, [r7, #16]
800c550: 683b ldr r3, [r7, #0]
800c552: 88db ldrh r3, [r3, #6]
800c554: 461a mov r2, r3
800c556: 6878 ldr r0, [r7, #4]
800c558: f001 fa06 bl 800d968 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
800c55c: e06b b.n 800c636 <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
800c55e: 683b ldr r3, [r7, #0]
800c560: 785a ldrb r2, [r3, #1]
800c562: 693b ldr r3, [r7, #16]
800c564: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
800c568: 683b ldr r3, [r7, #0]
800c56a: 88db ldrh r3, [r3, #6]
800c56c: b2da uxtb r2, r3
800c56e: 693b ldr r3, [r7, #16]
800c570: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800c574: 6939 ldr r1, [r7, #16]
800c576: 683b ldr r3, [r7, #0]
800c578: 88db ldrh r3, [r3, #6]
800c57a: 461a mov r2, r3
800c57c: 6878 ldr r0, [r7, #4]
800c57e: f001 fa21 bl 800d9c4 <USBD_CtlPrepareRx>
break;
800c582: e058 b.n 800c636 <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c584: 687b ldr r3, [r7, #4]
800c586: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c58a: 689b ldr r3, [r3, #8]
800c58c: 683a ldr r2, [r7, #0]
800c58e: 7850 ldrb r0, [r2, #1]
800c590: 2200 movs r2, #0
800c592: 6839 ldr r1, [r7, #0]
800c594: 4798 blx r3
break;
800c596: e04e b.n 800c636 <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800c598: 683b ldr r3, [r7, #0]
800c59a: 785b ldrb r3, [r3, #1]
800c59c: 2b0b cmp r3, #11
800c59e: d02e beq.n 800c5fe <USBD_CDC_Setup+0x104>
800c5a0: 2b0b cmp r3, #11
800c5a2: dc38 bgt.n 800c616 <USBD_CDC_Setup+0x11c>
800c5a4: 2b00 cmp r3, #0
800c5a6: d002 beq.n 800c5ae <USBD_CDC_Setup+0xb4>
800c5a8: 2b0a cmp r3, #10
800c5aa: d014 beq.n 800c5d6 <USBD_CDC_Setup+0xdc>
800c5ac: e033 b.n 800c616 <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c5ae: 687b ldr r3, [r7, #4]
800c5b0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c5b4: 2b03 cmp r3, #3
800c5b6: d107 bne.n 800c5c8 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
800c5b8: f107 030c add.w r3, r7, #12
800c5bc: 2202 movs r2, #2
800c5be: 4619 mov r1, r3
800c5c0: 6878 ldr r0, [r7, #4]
800c5c2: f001 f9d1 bl 800d968 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800c5c6: e02e b.n 800c626 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800c5c8: 6839 ldr r1, [r7, #0]
800c5ca: 6878 ldr r0, [r7, #4]
800c5cc: f001 f962 bl 800d894 <USBD_CtlError>
ret = USBD_FAIL;
800c5d0: 2302 movs r3, #2
800c5d2: 75fb strb r3, [r7, #23]
break;
800c5d4: e027 b.n 800c626 <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c5d6: 687b ldr r3, [r7, #4]
800c5d8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c5dc: 2b03 cmp r3, #3
800c5de: d107 bne.n 800c5f0 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
800c5e0: f107 030f add.w r3, r7, #15
800c5e4: 2201 movs r2, #1
800c5e6: 4619 mov r1, r3
800c5e8: 6878 ldr r0, [r7, #4]
800c5ea: f001 f9bd bl 800d968 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800c5ee: e01a b.n 800c626 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800c5f0: 6839 ldr r1, [r7, #0]
800c5f2: 6878 ldr r0, [r7, #4]
800c5f4: f001 f94e bl 800d894 <USBD_CtlError>
ret = USBD_FAIL;
800c5f8: 2302 movs r3, #2
800c5fa: 75fb strb r3, [r7, #23]
break;
800c5fc: e013 b.n 800c626 <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800c5fe: 687b ldr r3, [r7, #4]
800c600: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c604: 2b03 cmp r3, #3
800c606: d00d beq.n 800c624 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
800c608: 6839 ldr r1, [r7, #0]
800c60a: 6878 ldr r0, [r7, #4]
800c60c: f001 f942 bl 800d894 <USBD_CtlError>
ret = USBD_FAIL;
800c610: 2302 movs r3, #2
800c612: 75fb strb r3, [r7, #23]
}
break;
800c614: e006 b.n 800c624 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800c616: 6839 ldr r1, [r7, #0]
800c618: 6878 ldr r0, [r7, #4]
800c61a: f001 f93b bl 800d894 <USBD_CtlError>
ret = USBD_FAIL;
800c61e: 2302 movs r3, #2
800c620: 75fb strb r3, [r7, #23]
break;
800c622: e000 b.n 800c626 <USBD_CDC_Setup+0x12c>
break;
800c624: bf00 nop
}
break;
800c626: e006 b.n 800c636 <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
800c628: 6839 ldr r1, [r7, #0]
800c62a: 6878 ldr r0, [r7, #4]
800c62c: f001 f932 bl 800d894 <USBD_CtlError>
ret = USBD_FAIL;
800c630: 2302 movs r3, #2
800c632: 75fb strb r3, [r7, #23]
break;
800c634: bf00 nop
}
return ret;
800c636: 7dfb ldrb r3, [r7, #23]
}
800c638: 4618 mov r0, r3
800c63a: 3718 adds r7, #24
800c63c: 46bd mov sp, r7
800c63e: bd80 pop {r7, pc}
0800c640 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800c640: b580 push {r7, lr}
800c642: b084 sub sp, #16
800c644: af00 add r7, sp, #0
800c646: 6078 str r0, [r7, #4]
800c648: 460b mov r3, r1
800c64a: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
800c64c: 687b ldr r3, [r7, #4]
800c64e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c652: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
800c654: 687b ldr r3, [r7, #4]
800c656: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c65a: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
800c65c: 687b ldr r3, [r7, #4]
800c65e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c662: 2b00 cmp r3, #0
800c664: d03a beq.n 800c6dc <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800c666: 78fa ldrb r2, [r7, #3]
800c668: 6879 ldr r1, [r7, #4]
800c66a: 4613 mov r3, r2
800c66c: 009b lsls r3, r3, #2
800c66e: 4413 add r3, r2
800c670: 009b lsls r3, r3, #2
800c672: 440b add r3, r1
800c674: 331c adds r3, #28
800c676: 681b ldr r3, [r3, #0]
800c678: 2b00 cmp r3, #0
800c67a: d029 beq.n 800c6d0 <USBD_CDC_DataIn+0x90>
800c67c: 78fa ldrb r2, [r7, #3]
800c67e: 6879 ldr r1, [r7, #4]
800c680: 4613 mov r3, r2
800c682: 009b lsls r3, r3, #2
800c684: 4413 add r3, r2
800c686: 009b lsls r3, r3, #2
800c688: 440b add r3, r1
800c68a: 331c adds r3, #28
800c68c: 681a ldr r2, [r3, #0]
800c68e: 78f9 ldrb r1, [r7, #3]
800c690: 68b8 ldr r0, [r7, #8]
800c692: 460b mov r3, r1
800c694: 009b lsls r3, r3, #2
800c696: 440b add r3, r1
800c698: 00db lsls r3, r3, #3
800c69a: 4403 add r3, r0
800c69c: 3320 adds r3, #32
800c69e: 681b ldr r3, [r3, #0]
800c6a0: fbb2 f1f3 udiv r1, r2, r3
800c6a4: fb01 f303 mul.w r3, r1, r3
800c6a8: 1ad3 subs r3, r2, r3
800c6aa: 2b00 cmp r3, #0
800c6ac: d110 bne.n 800c6d0 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
800c6ae: 78fa ldrb r2, [r7, #3]
800c6b0: 6879 ldr r1, [r7, #4]
800c6b2: 4613 mov r3, r2
800c6b4: 009b lsls r3, r3, #2
800c6b6: 4413 add r3, r2
800c6b8: 009b lsls r3, r3, #2
800c6ba: 440b add r3, r1
800c6bc: 331c adds r3, #28
800c6be: 2200 movs r2, #0
800c6c0: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
800c6c2: 78f9 ldrb r1, [r7, #3]
800c6c4: 2300 movs r3, #0
800c6c6: 2200 movs r2, #0
800c6c8: 6878 ldr r0, [r7, #4]
800c6ca: f001 fe45 bl 800e358 <USBD_LL_Transmit>
800c6ce: e003 b.n 800c6d8 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
800c6d0: 68fb ldr r3, [r7, #12]
800c6d2: 2200 movs r2, #0
800c6d4: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
800c6d8: 2300 movs r3, #0
800c6da: e000 b.n 800c6de <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
800c6dc: 2302 movs r3, #2
}
}
800c6de: 4618 mov r0, r3
800c6e0: 3710 adds r7, #16
800c6e2: 46bd mov sp, r7
800c6e4: bd80 pop {r7, pc}
0800c6e6 <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800c6e6: b580 push {r7, lr}
800c6e8: b084 sub sp, #16
800c6ea: af00 add r7, sp, #0
800c6ec: 6078 str r0, [r7, #4]
800c6ee: 460b mov r3, r1
800c6f0: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c6f2: 687b ldr r3, [r7, #4]
800c6f4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c6f8: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
800c6fa: 78fb ldrb r3, [r7, #3]
800c6fc: 4619 mov r1, r3
800c6fe: 6878 ldr r0, [r7, #4]
800c700: f001 fe70 bl 800e3e4 <USBD_LL_GetRxDataSize>
800c704: 4602 mov r2, r0
800c706: 68fb ldr r3, [r7, #12]
800c708: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
800c70c: 687b ldr r3, [r7, #4]
800c70e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c712: 2b00 cmp r3, #0
800c714: d00d beq.n 800c732 <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800c716: 687b ldr r3, [r7, #4]
800c718: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c71c: 68db ldr r3, [r3, #12]
800c71e: 68fa ldr r2, [r7, #12]
800c720: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800c724: 68fa ldr r2, [r7, #12]
800c726: f502 7203 add.w r2, r2, #524 @ 0x20c
800c72a: 4611 mov r1, r2
800c72c: 4798 blx r3
return USBD_OK;
800c72e: 2300 movs r3, #0
800c730: e000 b.n 800c734 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800c732: 2302 movs r3, #2
}
}
800c734: 4618 mov r0, r3
800c736: 3710 adds r7, #16
800c738: 46bd mov sp, r7
800c73a: bd80 pop {r7, pc}
0800c73c <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
800c73c: b580 push {r7, lr}
800c73e: b084 sub sp, #16
800c740: af00 add r7, sp, #0
800c742: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c744: 687b ldr r3, [r7, #4]
800c746: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c74a: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
800c74c: 687b ldr r3, [r7, #4]
800c74e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c752: 2b00 cmp r3, #0
800c754: d014 beq.n 800c780 <USBD_CDC_EP0_RxReady+0x44>
800c756: 68fb ldr r3, [r7, #12]
800c758: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
800c75c: 2bff cmp r3, #255 @ 0xff
800c75e: d00f beq.n 800c780 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c760: 687b ldr r3, [r7, #4]
800c762: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c766: 689b ldr r3, [r3, #8]
800c768: 68fa ldr r2, [r7, #12]
800c76a: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
800c76e: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
800c770: 68fa ldr r2, [r7, #12]
800c772: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c776: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
800c778: 68fb ldr r3, [r7, #12]
800c77a: 22ff movs r2, #255 @ 0xff
800c77c: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
800c780: 2300 movs r3, #0
}
800c782: 4618 mov r0, r3
800c784: 3710 adds r7, #16
800c786: 46bd mov sp, r7
800c788: bd80 pop {r7, pc}
...
0800c78c <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
800c78c: b480 push {r7}
800c78e: b083 sub sp, #12
800c790: af00 add r7, sp, #0
800c792: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
800c794: 687b ldr r3, [r7, #4]
800c796: 2243 movs r2, #67 @ 0x43
800c798: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
800c79a: 4b03 ldr r3, [pc, #12] @ (800c7a8 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
800c79c: 4618 mov r0, r3
800c79e: 370c adds r7, #12
800c7a0: 46bd mov sp, r7
800c7a2: bc80 pop {r7}
800c7a4: 4770 bx lr
800c7a6: bf00 nop
800c7a8: 200000a4 .word 0x200000a4
0800c7ac <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
800c7ac: b480 push {r7}
800c7ae: b083 sub sp, #12
800c7b0: af00 add r7, sp, #0
800c7b2: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
800c7b4: 687b ldr r3, [r7, #4]
800c7b6: 2243 movs r2, #67 @ 0x43
800c7b8: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
800c7ba: 4b03 ldr r3, [pc, #12] @ (800c7c8 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
800c7bc: 4618 mov r0, r3
800c7be: 370c adds r7, #12
800c7c0: 46bd mov sp, r7
800c7c2: bc80 pop {r7}
800c7c4: 4770 bx lr
800c7c6: bf00 nop
800c7c8: 20000060 .word 0x20000060
0800c7cc <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
800c7cc: b480 push {r7}
800c7ce: b083 sub sp, #12
800c7d0: af00 add r7, sp, #0
800c7d2: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800c7d4: 687b ldr r3, [r7, #4]
800c7d6: 2243 movs r2, #67 @ 0x43
800c7d8: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
800c7da: 4b03 ldr r3, [pc, #12] @ (800c7e8 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
800c7dc: 4618 mov r0, r3
800c7de: 370c adds r7, #12
800c7e0: 46bd mov sp, r7
800c7e2: bc80 pop {r7}
800c7e4: 4770 bx lr
800c7e6: bf00 nop
800c7e8: 200000e8 .word 0x200000e8
0800c7ec <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
800c7ec: b480 push {r7}
800c7ee: b083 sub sp, #12
800c7f0: af00 add r7, sp, #0
800c7f2: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800c7f4: 687b ldr r3, [r7, #4]
800c7f6: 220a movs r2, #10
800c7f8: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
800c7fa: 4b03 ldr r3, [pc, #12] @ (800c808 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
800c7fc: 4618 mov r0, r3
800c7fe: 370c adds r7, #12
800c800: 46bd mov sp, r7
800c802: bc80 pop {r7}
800c804: 4770 bx lr
800c806: bf00 nop
800c808: 2000001c .word 0x2000001c
0800c80c <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
800c80c: b480 push {r7}
800c80e: b085 sub sp, #20
800c810: af00 add r7, sp, #0
800c812: 6078 str r0, [r7, #4]
800c814: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800c816: 2302 movs r3, #2
800c818: 73fb strb r3, [r7, #15]
if (fops != NULL)
800c81a: 683b ldr r3, [r7, #0]
800c81c: 2b00 cmp r3, #0
800c81e: d005 beq.n 800c82c <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
800c820: 687b ldr r3, [r7, #4]
800c822: 683a ldr r2, [r7, #0]
800c824: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
800c828: 2300 movs r3, #0
800c82a: 73fb strb r3, [r7, #15]
}
return ret;
800c82c: 7bfb ldrb r3, [r7, #15]
}
800c82e: 4618 mov r0, r3
800c830: 3714 adds r7, #20
800c832: 46bd mov sp, r7
800c834: bc80 pop {r7}
800c836: 4770 bx lr
0800c838 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
800c838: b480 push {r7}
800c83a: b087 sub sp, #28
800c83c: af00 add r7, sp, #0
800c83e: 60f8 str r0, [r7, #12]
800c840: 60b9 str r1, [r7, #8]
800c842: 4613 mov r3, r2
800c844: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c846: 68fb ldr r3, [r7, #12]
800c848: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c84c: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
800c84e: 697b ldr r3, [r7, #20]
800c850: 68ba ldr r2, [r7, #8]
800c852: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
800c856: 88fa ldrh r2, [r7, #6]
800c858: 697b ldr r3, [r7, #20]
800c85a: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
800c85e: 2300 movs r3, #0
}
800c860: 4618 mov r0, r3
800c862: 371c adds r7, #28
800c864: 46bd mov sp, r7
800c866: bc80 pop {r7}
800c868: 4770 bx lr
0800c86a <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
800c86a: b480 push {r7}
800c86c: b085 sub sp, #20
800c86e: af00 add r7, sp, #0
800c870: 6078 str r0, [r7, #4]
800c872: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c874: 687b ldr r3, [r7, #4]
800c876: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c87a: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
800c87c: 68fb ldr r3, [r7, #12]
800c87e: 683a ldr r2, [r7, #0]
800c880: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
800c884: 2300 movs r3, #0
}
800c886: 4618 mov r0, r3
800c888: 3714 adds r7, #20
800c88a: 46bd mov sp, r7
800c88c: bc80 pop {r7}
800c88e: 4770 bx lr
0800c890 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
800c890: b580 push {r7, lr}
800c892: b084 sub sp, #16
800c894: af00 add r7, sp, #0
800c896: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c898: 687b ldr r3, [r7, #4]
800c89a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c89e: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
800c8a0: 687b ldr r3, [r7, #4]
800c8a2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c8a6: 2b00 cmp r3, #0
800c8a8: d01c beq.n 800c8e4 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
800c8aa: 68fb ldr r3, [r7, #12]
800c8ac: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800c8b0: 2b00 cmp r3, #0
800c8b2: d115 bne.n 800c8e0 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
800c8b4: 68fb ldr r3, [r7, #12]
800c8b6: 2201 movs r2, #1
800c8b8: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
800c8bc: 68fb ldr r3, [r7, #12]
800c8be: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
800c8c2: 687b ldr r3, [r7, #4]
800c8c4: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c8c6: 68fb ldr r3, [r7, #12]
800c8c8: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
800c8cc: 68fb ldr r3, [r7, #12]
800c8ce: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c8d2: b29b uxth r3, r3
800c8d4: 2181 movs r1, #129 @ 0x81
800c8d6: 6878 ldr r0, [r7, #4]
800c8d8: f001 fd3e bl 800e358 <USBD_LL_Transmit>
return USBD_OK;
800c8dc: 2300 movs r3, #0
800c8de: e002 b.n 800c8e6 <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800c8e0: 2301 movs r3, #1
800c8e2: e000 b.n 800c8e6 <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
800c8e4: 2302 movs r3, #2
}
}
800c8e6: 4618 mov r0, r3
800c8e8: 3710 adds r7, #16
800c8ea: 46bd mov sp, r7
800c8ec: bd80 pop {r7, pc}
0800c8ee <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800c8ee: b580 push {r7, lr}
800c8f0: b084 sub sp, #16
800c8f2: af00 add r7, sp, #0
800c8f4: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c8f6: 687b ldr r3, [r7, #4]
800c8f8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c8fc: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800c8fe: 687b ldr r3, [r7, #4]
800c900: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c904: 2b00 cmp r3, #0
800c906: d017 beq.n 800c938 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c908: 687b ldr r3, [r7, #4]
800c90a: 7c1b ldrb r3, [r3, #16]
800c90c: 2b00 cmp r3, #0
800c90e: d109 bne.n 800c924 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c910: 68fb ldr r3, [r7, #12]
800c912: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c916: f44f 7300 mov.w r3, #512 @ 0x200
800c91a: 2101 movs r1, #1
800c91c: 6878 ldr r0, [r7, #4]
800c91e: f001 fd3e bl 800e39e <USBD_LL_PrepareReceive>
800c922: e007 b.n 800c934 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c924: 68fb ldr r3, [r7, #12]
800c926: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c92a: 2340 movs r3, #64 @ 0x40
800c92c: 2101 movs r1, #1
800c92e: 6878 ldr r0, [r7, #4]
800c930: f001 fd35 bl 800e39e <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
800c934: 2300 movs r3, #0
800c936: e000 b.n 800c93a <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
800c938: 2302 movs r3, #2
}
}
800c93a: 4618 mov r0, r3
800c93c: 3710 adds r7, #16
800c93e: 46bd mov sp, r7
800c940: bd80 pop {r7, pc}
0800c942 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800c942: b580 push {r7, lr}
800c944: b084 sub sp, #16
800c946: af00 add r7, sp, #0
800c948: 60f8 str r0, [r7, #12]
800c94a: 60b9 str r1, [r7, #8]
800c94c: 4613 mov r3, r2
800c94e: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800c950: 68fb ldr r3, [r7, #12]
800c952: 2b00 cmp r3, #0
800c954: d101 bne.n 800c95a <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
800c956: 2302 movs r3, #2
800c958: e01a b.n 800c990 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
800c95a: 68fb ldr r3, [r7, #12]
800c95c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c960: 2b00 cmp r3, #0
800c962: d003 beq.n 800c96c <USBD_Init+0x2a>
{
pdev->pClass = NULL;
800c964: 68fb ldr r3, [r7, #12]
800c966: 2200 movs r2, #0
800c968: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
800c96c: 68bb ldr r3, [r7, #8]
800c96e: 2b00 cmp r3, #0
800c970: d003 beq.n 800c97a <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
800c972: 68fb ldr r3, [r7, #12]
800c974: 68ba ldr r2, [r7, #8]
800c976: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
800c97a: 68fb ldr r3, [r7, #12]
800c97c: 2201 movs r2, #1
800c97e: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
800c982: 68fb ldr r3, [r7, #12]
800c984: 79fa ldrb r2, [r7, #7]
800c986: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
800c988: 68f8 ldr r0, [r7, #12]
800c98a: f001 fba3 bl 800e0d4 <USBD_LL_Init>
return USBD_OK;
800c98e: 2300 movs r3, #0
}
800c990: 4618 mov r0, r3
800c992: 3710 adds r7, #16
800c994: 46bd mov sp, r7
800c996: bd80 pop {r7, pc}
0800c998 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800c998: b480 push {r7}
800c99a: b085 sub sp, #20
800c99c: af00 add r7, sp, #0
800c99e: 6078 str r0, [r7, #4]
800c9a0: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
800c9a2: 2300 movs r3, #0
800c9a4: 73fb strb r3, [r7, #15]
if (pclass != NULL)
800c9a6: 683b ldr r3, [r7, #0]
800c9a8: 2b00 cmp r3, #0
800c9aa: d006 beq.n 800c9ba <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
800c9ac: 687b ldr r3, [r7, #4]
800c9ae: 683a ldr r2, [r7, #0]
800c9b0: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
800c9b4: 2300 movs r3, #0
800c9b6: 73fb strb r3, [r7, #15]
800c9b8: e001 b.n 800c9be <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
800c9ba: 2302 movs r3, #2
800c9bc: 73fb strb r3, [r7, #15]
}
return status;
800c9be: 7bfb ldrb r3, [r7, #15]
}
800c9c0: 4618 mov r0, r3
800c9c2: 3714 adds r7, #20
800c9c4: 46bd mov sp, r7
800c9c6: bc80 pop {r7}
800c9c8: 4770 bx lr
0800c9ca <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800c9ca: b580 push {r7, lr}
800c9cc: b082 sub sp, #8
800c9ce: af00 add r7, sp, #0
800c9d0: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
800c9d2: 6878 ldr r0, [r7, #4]
800c9d4: f001 fbd8 bl 800e188 <USBD_LL_Start>
return USBD_OK;
800c9d8: 2300 movs r3, #0
}
800c9da: 4618 mov r0, r3
800c9dc: 3708 adds r7, #8
800c9de: 46bd mov sp, r7
800c9e0: bd80 pop {r7, pc}
0800c9e2 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800c9e2: b480 push {r7}
800c9e4: b083 sub sp, #12
800c9e6: af00 add r7, sp, #0
800c9e8: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800c9ea: 2300 movs r3, #0
}
800c9ec: 4618 mov r0, r3
800c9ee: 370c adds r7, #12
800c9f0: 46bd mov sp, r7
800c9f2: bc80 pop {r7}
800c9f4: 4770 bx lr
0800c9f6 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c9f6: b580 push {r7, lr}
800c9f8: b084 sub sp, #16
800c9fa: af00 add r7, sp, #0
800c9fc: 6078 str r0, [r7, #4]
800c9fe: 460b mov r3, r1
800ca00: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800ca02: 2302 movs r3, #2
800ca04: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
800ca06: 687b ldr r3, [r7, #4]
800ca08: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ca0c: 2b00 cmp r3, #0
800ca0e: d00c beq.n 800ca2a <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
800ca10: 687b ldr r3, [r7, #4]
800ca12: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ca16: 681b ldr r3, [r3, #0]
800ca18: 78fa ldrb r2, [r7, #3]
800ca1a: 4611 mov r1, r2
800ca1c: 6878 ldr r0, [r7, #4]
800ca1e: 4798 blx r3
800ca20: 4603 mov r3, r0
800ca22: 2b00 cmp r3, #0
800ca24: d101 bne.n 800ca2a <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
800ca26: 2300 movs r3, #0
800ca28: 73fb strb r3, [r7, #15]
}
}
return ret;
800ca2a: 7bfb ldrb r3, [r7, #15]
}
800ca2c: 4618 mov r0, r3
800ca2e: 3710 adds r7, #16
800ca30: 46bd mov sp, r7
800ca32: bd80 pop {r7, pc}
0800ca34 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800ca34: b580 push {r7, lr}
800ca36: b082 sub sp, #8
800ca38: af00 add r7, sp, #0
800ca3a: 6078 str r0, [r7, #4]
800ca3c: 460b mov r3, r1
800ca3e: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
800ca40: 687b ldr r3, [r7, #4]
800ca42: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ca46: 685b ldr r3, [r3, #4]
800ca48: 78fa ldrb r2, [r7, #3]
800ca4a: 4611 mov r1, r2
800ca4c: 6878 ldr r0, [r7, #4]
800ca4e: 4798 blx r3
return USBD_OK;
800ca50: 2300 movs r3, #0
}
800ca52: 4618 mov r0, r3
800ca54: 3708 adds r7, #8
800ca56: 46bd mov sp, r7
800ca58: bd80 pop {r7, pc}
0800ca5a <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800ca5a: b580 push {r7, lr}
800ca5c: b082 sub sp, #8
800ca5e: af00 add r7, sp, #0
800ca60: 6078 str r0, [r7, #4]
800ca62: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
800ca64: 687b ldr r3, [r7, #4]
800ca66: f503 732a add.w r3, r3, #680 @ 0x2a8
800ca6a: 6839 ldr r1, [r7, #0]
800ca6c: 4618 mov r0, r3
800ca6e: f000 fed8 bl 800d822 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800ca72: 687b ldr r3, [r7, #4]
800ca74: 2201 movs r2, #1
800ca76: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
800ca7a: 687b ldr r3, [r7, #4]
800ca7c: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800ca80: 461a mov r2, r3
800ca82: 687b ldr r3, [r7, #4]
800ca84: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
800ca88: 687b ldr r3, [r7, #4]
800ca8a: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800ca8e: f003 031f and.w r3, r3, #31
800ca92: 2b02 cmp r3, #2
800ca94: d016 beq.n 800cac4 <USBD_LL_SetupStage+0x6a>
800ca96: 2b02 cmp r3, #2
800ca98: d81c bhi.n 800cad4 <USBD_LL_SetupStage+0x7a>
800ca9a: 2b00 cmp r3, #0
800ca9c: d002 beq.n 800caa4 <USBD_LL_SetupStage+0x4a>
800ca9e: 2b01 cmp r3, #1
800caa0: d008 beq.n 800cab4 <USBD_LL_SetupStage+0x5a>
800caa2: e017 b.n 800cad4 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
800caa4: 687b ldr r3, [r7, #4]
800caa6: f503 732a add.w r3, r3, #680 @ 0x2a8
800caaa: 4619 mov r1, r3
800caac: 6878 ldr r0, [r7, #4]
800caae: f000 f9cb bl 800ce48 <USBD_StdDevReq>
break;
800cab2: e01a b.n 800caea <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
800cab4: 687b ldr r3, [r7, #4]
800cab6: f503 732a add.w r3, r3, #680 @ 0x2a8
800caba: 4619 mov r1, r3
800cabc: 6878 ldr r0, [r7, #4]
800cabe: f000 fa2d bl 800cf1c <USBD_StdItfReq>
break;
800cac2: e012 b.n 800caea <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
800cac4: 687b ldr r3, [r7, #4]
800cac6: f503 732a add.w r3, r3, #680 @ 0x2a8
800caca: 4619 mov r1, r3
800cacc: 6878 ldr r0, [r7, #4]
800cace: f000 fa6d bl 800cfac <USBD_StdEPReq>
break;
800cad2: e00a b.n 800caea <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800cad4: 687b ldr r3, [r7, #4]
800cad6: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800cada: f023 037f bic.w r3, r3, #127 @ 0x7f
800cade: b2db uxtb r3, r3
800cae0: 4619 mov r1, r3
800cae2: 6878 ldr r0, [r7, #4]
800cae4: f001 fbb0 bl 800e248 <USBD_LL_StallEP>
break;
800cae8: bf00 nop
}
return USBD_OK;
800caea: 2300 movs r3, #0
}
800caec: 4618 mov r0, r3
800caee: 3708 adds r7, #8
800caf0: 46bd mov sp, r7
800caf2: bd80 pop {r7, pc}
0800caf4 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800caf4: b580 push {r7, lr}
800caf6: b086 sub sp, #24
800caf8: af00 add r7, sp, #0
800cafa: 60f8 str r0, [r7, #12]
800cafc: 460b mov r3, r1
800cafe: 607a str r2, [r7, #4]
800cb00: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800cb02: 7afb ldrb r3, [r7, #11]
800cb04: 2b00 cmp r3, #0
800cb06: d14b bne.n 800cba0 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
800cb08: 68fb ldr r3, [r7, #12]
800cb0a: f503 73aa add.w r3, r3, #340 @ 0x154
800cb0e: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800cb10: 68fb ldr r3, [r7, #12]
800cb12: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800cb16: 2b03 cmp r3, #3
800cb18: d134 bne.n 800cb84 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
800cb1a: 697b ldr r3, [r7, #20]
800cb1c: 68da ldr r2, [r3, #12]
800cb1e: 697b ldr r3, [r7, #20]
800cb20: 691b ldr r3, [r3, #16]
800cb22: 429a cmp r2, r3
800cb24: d919 bls.n 800cb5a <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
800cb26: 697b ldr r3, [r7, #20]
800cb28: 68da ldr r2, [r3, #12]
800cb2a: 697b ldr r3, [r7, #20]
800cb2c: 691b ldr r3, [r3, #16]
800cb2e: 1ad2 subs r2, r2, r3
800cb30: 697b ldr r3, [r7, #20]
800cb32: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800cb34: 697b ldr r3, [r7, #20]
800cb36: 68da ldr r2, [r3, #12]
800cb38: 697b ldr r3, [r7, #20]
800cb3a: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800cb3c: 429a cmp r2, r3
800cb3e: d203 bcs.n 800cb48 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800cb40: 697b ldr r3, [r7, #20]
800cb42: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
800cb44: b29b uxth r3, r3
800cb46: e002 b.n 800cb4e <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800cb48: 697b ldr r3, [r7, #20]
800cb4a: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800cb4c: b29b uxth r3, r3
800cb4e: 461a mov r2, r3
800cb50: 6879 ldr r1, [r7, #4]
800cb52: 68f8 ldr r0, [r7, #12]
800cb54: f000 ff54 bl 800da00 <USBD_CtlContinueRx>
800cb58: e038 b.n 800cbcc <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800cb5a: 68fb ldr r3, [r7, #12]
800cb5c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb60: 691b ldr r3, [r3, #16]
800cb62: 2b00 cmp r3, #0
800cb64: d00a beq.n 800cb7c <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cb66: 68fb ldr r3, [r7, #12]
800cb68: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
800cb6c: 2b03 cmp r3, #3
800cb6e: d105 bne.n 800cb7c <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
800cb70: 68fb ldr r3, [r7, #12]
800cb72: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb76: 691b ldr r3, [r3, #16]
800cb78: 68f8 ldr r0, [r7, #12]
800cb7a: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
800cb7c: 68f8 ldr r0, [r7, #12]
800cb7e: f000 ff51 bl 800da24 <USBD_CtlSendStatus>
800cb82: e023 b.n 800cbcc <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
800cb84: 68fb ldr r3, [r7, #12]
800cb86: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800cb8a: 2b05 cmp r3, #5
800cb8c: d11e bne.n 800cbcc <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
800cb8e: 68fb ldr r3, [r7, #12]
800cb90: 2200 movs r2, #0
800cb92: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
800cb96: 2100 movs r1, #0
800cb98: 68f8 ldr r0, [r7, #12]
800cb9a: f001 fb55 bl 800e248 <USBD_LL_StallEP>
800cb9e: e015 b.n 800cbcc <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
800cba0: 68fb ldr r3, [r7, #12]
800cba2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cba6: 699b ldr r3, [r3, #24]
800cba8: 2b00 cmp r3, #0
800cbaa: d00d beq.n 800cbc8 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cbac: 68fb ldr r3, [r7, #12]
800cbae: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
800cbb2: 2b03 cmp r3, #3
800cbb4: d108 bne.n 800cbc8 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
800cbb6: 68fb ldr r3, [r7, #12]
800cbb8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cbbc: 699b ldr r3, [r3, #24]
800cbbe: 7afa ldrb r2, [r7, #11]
800cbc0: 4611 mov r1, r2
800cbc2: 68f8 ldr r0, [r7, #12]
800cbc4: 4798 blx r3
800cbc6: e001 b.n 800cbcc <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800cbc8: 2302 movs r3, #2
800cbca: e000 b.n 800cbce <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800cbcc: 2300 movs r3, #0
}
800cbce: 4618 mov r0, r3
800cbd0: 3718 adds r7, #24
800cbd2: 46bd mov sp, r7
800cbd4: bd80 pop {r7, pc}
0800cbd6 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800cbd6: b580 push {r7, lr}
800cbd8: b086 sub sp, #24
800cbda: af00 add r7, sp, #0
800cbdc: 60f8 str r0, [r7, #12]
800cbde: 460b mov r3, r1
800cbe0: 607a str r2, [r7, #4]
800cbe2: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800cbe4: 7afb ldrb r3, [r7, #11]
800cbe6: 2b00 cmp r3, #0
800cbe8: d17f bne.n 800ccea <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
800cbea: 68fb ldr r3, [r7, #12]
800cbec: 3314 adds r3, #20
800cbee: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800cbf0: 68fb ldr r3, [r7, #12]
800cbf2: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800cbf6: 2b02 cmp r3, #2
800cbf8: d15c bne.n 800ccb4 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
800cbfa: 697b ldr r3, [r7, #20]
800cbfc: 68da ldr r2, [r3, #12]
800cbfe: 697b ldr r3, [r7, #20]
800cc00: 691b ldr r3, [r3, #16]
800cc02: 429a cmp r2, r3
800cc04: d915 bls.n 800cc32 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
800cc06: 697b ldr r3, [r7, #20]
800cc08: 68da ldr r2, [r3, #12]
800cc0a: 697b ldr r3, [r7, #20]
800cc0c: 691b ldr r3, [r3, #16]
800cc0e: 1ad2 subs r2, r2, r3
800cc10: 697b ldr r3, [r7, #20]
800cc12: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
800cc14: 697b ldr r3, [r7, #20]
800cc16: 68db ldr r3, [r3, #12]
800cc18: b29b uxth r3, r3
800cc1a: 461a mov r2, r3
800cc1c: 6879 ldr r1, [r7, #4]
800cc1e: 68f8 ldr r0, [r7, #12]
800cc20: f000 febe bl 800d9a0 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800cc24: 2300 movs r3, #0
800cc26: 2200 movs r2, #0
800cc28: 2100 movs r1, #0
800cc2a: 68f8 ldr r0, [r7, #12]
800cc2c: f001 fbb7 bl 800e39e <USBD_LL_PrepareReceive>
800cc30: e04e b.n 800ccd0 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800cc32: 697b ldr r3, [r7, #20]
800cc34: 689b ldr r3, [r3, #8]
800cc36: 697a ldr r2, [r7, #20]
800cc38: 6912 ldr r2, [r2, #16]
800cc3a: fbb3 f1f2 udiv r1, r3, r2
800cc3e: fb01 f202 mul.w r2, r1, r2
800cc42: 1a9b subs r3, r3, r2
800cc44: 2b00 cmp r3, #0
800cc46: d11c bne.n 800cc82 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800cc48: 697b ldr r3, [r7, #20]
800cc4a: 689a ldr r2, [r3, #8]
800cc4c: 697b ldr r3, [r7, #20]
800cc4e: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
800cc50: 429a cmp r2, r3
800cc52: d316 bcc.n 800cc82 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
800cc54: 697b ldr r3, [r7, #20]
800cc56: 689a ldr r2, [r3, #8]
800cc58: 68fb ldr r3, [r7, #12]
800cc5a: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800cc5e: 429a cmp r2, r3
800cc60: d20f bcs.n 800cc82 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
800cc62: 2200 movs r2, #0
800cc64: 2100 movs r1, #0
800cc66: 68f8 ldr r0, [r7, #12]
800cc68: f000 fe9a bl 800d9a0 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800cc6c: 68fb ldr r3, [r7, #12]
800cc6e: 2200 movs r2, #0
800cc70: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800cc74: 2300 movs r3, #0
800cc76: 2200 movs r2, #0
800cc78: 2100 movs r1, #0
800cc7a: 68f8 ldr r0, [r7, #12]
800cc7c: f001 fb8f bl 800e39e <USBD_LL_PrepareReceive>
800cc80: e026 b.n 800ccd0 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
800cc82: 68fb ldr r3, [r7, #12]
800cc84: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cc88: 68db ldr r3, [r3, #12]
800cc8a: 2b00 cmp r3, #0
800cc8c: d00a beq.n 800cca4 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cc8e: 68fb ldr r3, [r7, #12]
800cc90: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
800cc94: 2b03 cmp r3, #3
800cc96: d105 bne.n 800cca4 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
800cc98: 68fb ldr r3, [r7, #12]
800cc9a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cc9e: 68db ldr r3, [r3, #12]
800cca0: 68f8 ldr r0, [r7, #12]
800cca2: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
800cca4: 2180 movs r1, #128 @ 0x80
800cca6: 68f8 ldr r0, [r7, #12]
800cca8: f001 face bl 800e248 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800ccac: 68f8 ldr r0, [r7, #12]
800ccae: f000 fecc bl 800da4a <USBD_CtlReceiveStatus>
800ccb2: e00d b.n 800ccd0 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800ccb4: 68fb ldr r3, [r7, #12]
800ccb6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800ccba: 2b04 cmp r3, #4
800ccbc: d004 beq.n 800ccc8 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
800ccbe: 68fb ldr r3, [r7, #12]
800ccc0: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800ccc4: 2b00 cmp r3, #0
800ccc6: d103 bne.n 800ccd0 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800ccc8: 2180 movs r1, #128 @ 0x80
800ccca: 68f8 ldr r0, [r7, #12]
800cccc: f001 fabc bl 800e248 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
800ccd0: 68fb ldr r3, [r7, #12]
800ccd2: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800ccd6: 2b01 cmp r3, #1
800ccd8: d11d bne.n 800cd16 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800ccda: 68f8 ldr r0, [r7, #12]
800ccdc: f7ff fe81 bl 800c9e2 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800cce0: 68fb ldr r3, [r7, #12]
800cce2: 2200 movs r2, #0
800cce4: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
800cce8: e015 b.n 800cd16 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800ccea: 68fb ldr r3, [r7, #12]
800ccec: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ccf0: 695b ldr r3, [r3, #20]
800ccf2: 2b00 cmp r3, #0
800ccf4: d00d beq.n 800cd12 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800ccf6: 68fb ldr r3, [r7, #12]
800ccf8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800ccfc: 2b03 cmp r3, #3
800ccfe: d108 bne.n 800cd12 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
800cd00: 68fb ldr r3, [r7, #12]
800cd02: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd06: 695b ldr r3, [r3, #20]
800cd08: 7afa ldrb r2, [r7, #11]
800cd0a: 4611 mov r1, r2
800cd0c: 68f8 ldr r0, [r7, #12]
800cd0e: 4798 blx r3
800cd10: e001 b.n 800cd16 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800cd12: 2302 movs r3, #2
800cd14: e000 b.n 800cd18 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
800cd16: 2300 movs r3, #0
}
800cd18: 4618 mov r0, r3
800cd1a: 3718 adds r7, #24
800cd1c: 46bd mov sp, r7
800cd1e: bd80 pop {r7, pc}
0800cd20 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800cd20: b580 push {r7, lr}
800cd22: b082 sub sp, #8
800cd24: af00 add r7, sp, #0
800cd26: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800cd28: 2340 movs r3, #64 @ 0x40
800cd2a: 2200 movs r2, #0
800cd2c: 2100 movs r1, #0
800cd2e: 6878 ldr r0, [r7, #4]
800cd30: f001 fa45 bl 800e1be <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800cd34: 687b ldr r3, [r7, #4]
800cd36: 2201 movs r2, #1
800cd38: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800cd3c: 687b ldr r3, [r7, #4]
800cd3e: 2240 movs r2, #64 @ 0x40
800cd40: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800cd44: 2340 movs r3, #64 @ 0x40
800cd46: 2200 movs r2, #0
800cd48: 2180 movs r1, #128 @ 0x80
800cd4a: 6878 ldr r0, [r7, #4]
800cd4c: f001 fa37 bl 800e1be <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800cd50: 687b ldr r3, [r7, #4]
800cd52: 2201 movs r2, #1
800cd54: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
800cd56: 687b ldr r3, [r7, #4]
800cd58: 2240 movs r2, #64 @ 0x40
800cd5a: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800cd5c: 687b ldr r3, [r7, #4]
800cd5e: 2201 movs r2, #1
800cd60: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
800cd64: 687b ldr r3, [r7, #4]
800cd66: 2200 movs r2, #0
800cd68: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
800cd6c: 687b ldr r3, [r7, #4]
800cd6e: 2200 movs r2, #0
800cd70: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800cd72: 687b ldr r3, [r7, #4]
800cd74: 2200 movs r2, #0
800cd76: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
800cd7a: 687b ldr r3, [r7, #4]
800cd7c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800cd80: 2b00 cmp r3, #0
800cd82: d009 beq.n 800cd98 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
800cd84: 687b ldr r3, [r7, #4]
800cd86: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd8a: 685b ldr r3, [r3, #4]
800cd8c: 687a ldr r2, [r7, #4]
800cd8e: 6852 ldr r2, [r2, #4]
800cd90: b2d2 uxtb r2, r2
800cd92: 4611 mov r1, r2
800cd94: 6878 ldr r0, [r7, #4]
800cd96: 4798 blx r3
}
return USBD_OK;
800cd98: 2300 movs r3, #0
}
800cd9a: 4618 mov r0, r3
800cd9c: 3708 adds r7, #8
800cd9e: 46bd mov sp, r7
800cda0: bd80 pop {r7, pc}
0800cda2 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
800cda2: b480 push {r7}
800cda4: b083 sub sp, #12
800cda6: af00 add r7, sp, #0
800cda8: 6078 str r0, [r7, #4]
800cdaa: 460b mov r3, r1
800cdac: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800cdae: 687b ldr r3, [r7, #4]
800cdb0: 78fa ldrb r2, [r7, #3]
800cdb2: 741a strb r2, [r3, #16]
return USBD_OK;
800cdb4: 2300 movs r3, #0
}
800cdb6: 4618 mov r0, r3
800cdb8: 370c adds r7, #12
800cdba: 46bd mov sp, r7
800cdbc: bc80 pop {r7}
800cdbe: 4770 bx lr
0800cdc0 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
800cdc0: b480 push {r7}
800cdc2: b083 sub sp, #12
800cdc4: af00 add r7, sp, #0
800cdc6: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
800cdc8: 687b ldr r3, [r7, #4]
800cdca: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
800cdce: 687b ldr r3, [r7, #4]
800cdd0: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
800cdd4: 687b ldr r3, [r7, #4]
800cdd6: 2204 movs r2, #4
800cdd8: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800cddc: 2300 movs r3, #0
}
800cdde: 4618 mov r0, r3
800cde0: 370c adds r7, #12
800cde2: 46bd mov sp, r7
800cde4: bc80 pop {r7}
800cde6: 4770 bx lr
0800cde8 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800cde8: b480 push {r7}
800cdea: b083 sub sp, #12
800cdec: af00 add r7, sp, #0
800cdee: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
800cdf0: 687b ldr r3, [r7, #4]
800cdf2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cdf6: 2b04 cmp r3, #4
800cdf8: d105 bne.n 800ce06 <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800cdfa: 687b ldr r3, [r7, #4]
800cdfc: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
800ce00: 687b ldr r3, [r7, #4]
800ce02: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800ce06: 2300 movs r3, #0
}
800ce08: 4618 mov r0, r3
800ce0a: 370c adds r7, #12
800ce0c: 46bd mov sp, r7
800ce0e: bc80 pop {r7}
800ce10: 4770 bx lr
0800ce12 <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800ce12: b580 push {r7, lr}
800ce14: b082 sub sp, #8
800ce16: af00 add r7, sp, #0
800ce18: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800ce1a: 687b ldr r3, [r7, #4]
800ce1c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800ce20: 2b03 cmp r3, #3
800ce22: d10b bne.n 800ce3c <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800ce24: 687b ldr r3, [r7, #4]
800ce26: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ce2a: 69db ldr r3, [r3, #28]
800ce2c: 2b00 cmp r3, #0
800ce2e: d005 beq.n 800ce3c <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
800ce30: 687b ldr r3, [r7, #4]
800ce32: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ce36: 69db ldr r3, [r3, #28]
800ce38: 6878 ldr r0, [r7, #4]
800ce3a: 4798 blx r3
}
}
return USBD_OK;
800ce3c: 2300 movs r3, #0
}
800ce3e: 4618 mov r0, r3
800ce40: 3708 adds r7, #8
800ce42: 46bd mov sp, r7
800ce44: bd80 pop {r7, pc}
...
0800ce48 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800ce48: b580 push {r7, lr}
800ce4a: b084 sub sp, #16
800ce4c: af00 add r7, sp, #0
800ce4e: 6078 str r0, [r7, #4]
800ce50: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800ce52: 2300 movs r3, #0
800ce54: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800ce56: 683b ldr r3, [r7, #0]
800ce58: 781b ldrb r3, [r3, #0]
800ce5a: f003 0360 and.w r3, r3, #96 @ 0x60
800ce5e: 2b40 cmp r3, #64 @ 0x40
800ce60: d005 beq.n 800ce6e <USBD_StdDevReq+0x26>
800ce62: 2b40 cmp r3, #64 @ 0x40
800ce64: d84f bhi.n 800cf06 <USBD_StdDevReq+0xbe>
800ce66: 2b00 cmp r3, #0
800ce68: d009 beq.n 800ce7e <USBD_StdDevReq+0x36>
800ce6a: 2b20 cmp r3, #32
800ce6c: d14b bne.n 800cf06 <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800ce6e: 687b ldr r3, [r7, #4]
800ce70: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ce74: 689b ldr r3, [r3, #8]
800ce76: 6839 ldr r1, [r7, #0]
800ce78: 6878 ldr r0, [r7, #4]
800ce7a: 4798 blx r3
break;
800ce7c: e048 b.n 800cf10 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800ce7e: 683b ldr r3, [r7, #0]
800ce80: 785b ldrb r3, [r3, #1]
800ce82: 2b09 cmp r3, #9
800ce84: d839 bhi.n 800cefa <USBD_StdDevReq+0xb2>
800ce86: a201 add r2, pc, #4 @ (adr r2, 800ce8c <USBD_StdDevReq+0x44>)
800ce88: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800ce8c: 0800cedd .word 0x0800cedd
800ce90: 0800cef1 .word 0x0800cef1
800ce94: 0800cefb .word 0x0800cefb
800ce98: 0800cee7 .word 0x0800cee7
800ce9c: 0800cefb .word 0x0800cefb
800cea0: 0800cebf .word 0x0800cebf
800cea4: 0800ceb5 .word 0x0800ceb5
800cea8: 0800cefb .word 0x0800cefb
800ceac: 0800ced3 .word 0x0800ced3
800ceb0: 0800cec9 .word 0x0800cec9
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800ceb4: 6839 ldr r1, [r7, #0]
800ceb6: 6878 ldr r0, [r7, #4]
800ceb8: f000 f9dc bl 800d274 <USBD_GetDescriptor>
break;
800cebc: e022 b.n 800cf04 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800cebe: 6839 ldr r1, [r7, #0]
800cec0: 6878 ldr r0, [r7, #4]
800cec2: f000 fb3f bl 800d544 <USBD_SetAddress>
break;
800cec6: e01d b.n 800cf04 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
800cec8: 6839 ldr r1, [r7, #0]
800ceca: 6878 ldr r0, [r7, #4]
800cecc: f000 fb7e bl 800d5cc <USBD_SetConfig>
break;
800ced0: e018 b.n 800cf04 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800ced2: 6839 ldr r1, [r7, #0]
800ced4: 6878 ldr r0, [r7, #4]
800ced6: f000 fc07 bl 800d6e8 <USBD_GetConfig>
break;
800ceda: e013 b.n 800cf04 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800cedc: 6839 ldr r1, [r7, #0]
800cede: 6878 ldr r0, [r7, #4]
800cee0: f000 fc37 bl 800d752 <USBD_GetStatus>
break;
800cee4: e00e b.n 800cf04 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800cee6: 6839 ldr r1, [r7, #0]
800cee8: 6878 ldr r0, [r7, #4]
800ceea: f000 fc65 bl 800d7b8 <USBD_SetFeature>
break;
800ceee: e009 b.n 800cf04 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
800cef0: 6839 ldr r1, [r7, #0]
800cef2: 6878 ldr r0, [r7, #4]
800cef4: f000 fc74 bl 800d7e0 <USBD_ClrFeature>
break;
800cef8: e004 b.n 800cf04 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800cefa: 6839 ldr r1, [r7, #0]
800cefc: 6878 ldr r0, [r7, #4]
800cefe: f000 fcc9 bl 800d894 <USBD_CtlError>
break;
800cf02: bf00 nop
}
break;
800cf04: e004 b.n 800cf10 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800cf06: 6839 ldr r1, [r7, #0]
800cf08: 6878 ldr r0, [r7, #4]
800cf0a: f000 fcc3 bl 800d894 <USBD_CtlError>
break;
800cf0e: bf00 nop
}
return ret;
800cf10: 7bfb ldrb r3, [r7, #15]
}
800cf12: 4618 mov r0, r3
800cf14: 3710 adds r7, #16
800cf16: 46bd mov sp, r7
800cf18: bd80 pop {r7, pc}
800cf1a: bf00 nop
0800cf1c <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cf1c: b580 push {r7, lr}
800cf1e: b084 sub sp, #16
800cf20: af00 add r7, sp, #0
800cf22: 6078 str r0, [r7, #4]
800cf24: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800cf26: 2300 movs r3, #0
800cf28: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800cf2a: 683b ldr r3, [r7, #0]
800cf2c: 781b ldrb r3, [r3, #0]
800cf2e: f003 0360 and.w r3, r3, #96 @ 0x60
800cf32: 2b40 cmp r3, #64 @ 0x40
800cf34: d005 beq.n 800cf42 <USBD_StdItfReq+0x26>
800cf36: 2b40 cmp r3, #64 @ 0x40
800cf38: d82e bhi.n 800cf98 <USBD_StdItfReq+0x7c>
800cf3a: 2b00 cmp r3, #0
800cf3c: d001 beq.n 800cf42 <USBD_StdItfReq+0x26>
800cf3e: 2b20 cmp r3, #32
800cf40: d12a bne.n 800cf98 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800cf42: 687b ldr r3, [r7, #4]
800cf44: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cf48: 3b01 subs r3, #1
800cf4a: 2b02 cmp r3, #2
800cf4c: d81d bhi.n 800cf8a <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
800cf4e: 683b ldr r3, [r7, #0]
800cf50: 889b ldrh r3, [r3, #4]
800cf52: b2db uxtb r3, r3
800cf54: 2b01 cmp r3, #1
800cf56: d813 bhi.n 800cf80 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800cf58: 687b ldr r3, [r7, #4]
800cf5a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cf5e: 689b ldr r3, [r3, #8]
800cf60: 6839 ldr r1, [r7, #0]
800cf62: 6878 ldr r0, [r7, #4]
800cf64: 4798 blx r3
800cf66: 4603 mov r3, r0
800cf68: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800cf6a: 683b ldr r3, [r7, #0]
800cf6c: 88db ldrh r3, [r3, #6]
800cf6e: 2b00 cmp r3, #0
800cf70: d110 bne.n 800cf94 <USBD_StdItfReq+0x78>
800cf72: 7bfb ldrb r3, [r7, #15]
800cf74: 2b00 cmp r3, #0
800cf76: d10d bne.n 800cf94 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
800cf78: 6878 ldr r0, [r7, #4]
800cf7a: f000 fd53 bl 800da24 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800cf7e: e009 b.n 800cf94 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
800cf80: 6839 ldr r1, [r7, #0]
800cf82: 6878 ldr r0, [r7, #4]
800cf84: f000 fc86 bl 800d894 <USBD_CtlError>
break;
800cf88: e004 b.n 800cf94 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
800cf8a: 6839 ldr r1, [r7, #0]
800cf8c: 6878 ldr r0, [r7, #4]
800cf8e: f000 fc81 bl 800d894 <USBD_CtlError>
break;
800cf92: e000 b.n 800cf96 <USBD_StdItfReq+0x7a>
break;
800cf94: bf00 nop
}
break;
800cf96: e004 b.n 800cfa2 <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
800cf98: 6839 ldr r1, [r7, #0]
800cf9a: 6878 ldr r0, [r7, #4]
800cf9c: f000 fc7a bl 800d894 <USBD_CtlError>
break;
800cfa0: bf00 nop
}
return USBD_OK;
800cfa2: 2300 movs r3, #0
}
800cfa4: 4618 mov r0, r3
800cfa6: 3710 adds r7, #16
800cfa8: 46bd mov sp, r7
800cfaa: bd80 pop {r7, pc}
0800cfac <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cfac: b580 push {r7, lr}
800cfae: b084 sub sp, #16
800cfb0: af00 add r7, sp, #0
800cfb2: 6078 str r0, [r7, #4]
800cfb4: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
800cfb6: 2300 movs r3, #0
800cfb8: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800cfba: 683b ldr r3, [r7, #0]
800cfbc: 889b ldrh r3, [r3, #4]
800cfbe: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800cfc0: 683b ldr r3, [r7, #0]
800cfc2: 781b ldrb r3, [r3, #0]
800cfc4: f003 0360 and.w r3, r3, #96 @ 0x60
800cfc8: 2b40 cmp r3, #64 @ 0x40
800cfca: d007 beq.n 800cfdc <USBD_StdEPReq+0x30>
800cfcc: 2b40 cmp r3, #64 @ 0x40
800cfce: f200 8146 bhi.w 800d25e <USBD_StdEPReq+0x2b2>
800cfd2: 2b00 cmp r3, #0
800cfd4: d00a beq.n 800cfec <USBD_StdEPReq+0x40>
800cfd6: 2b20 cmp r3, #32
800cfd8: f040 8141 bne.w 800d25e <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800cfdc: 687b ldr r3, [r7, #4]
800cfde: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cfe2: 689b ldr r3, [r3, #8]
800cfe4: 6839 ldr r1, [r7, #0]
800cfe6: 6878 ldr r0, [r7, #4]
800cfe8: 4798 blx r3
break;
800cfea: e13d b.n 800d268 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
800cfec: 683b ldr r3, [r7, #0]
800cfee: 781b ldrb r3, [r3, #0]
800cff0: f003 0360 and.w r3, r3, #96 @ 0x60
800cff4: 2b20 cmp r3, #32
800cff6: d10a bne.n 800d00e <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800cff8: 687b ldr r3, [r7, #4]
800cffa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cffe: 689b ldr r3, [r3, #8]
800d000: 6839 ldr r1, [r7, #0]
800d002: 6878 ldr r0, [r7, #4]
800d004: 4798 blx r3
800d006: 4603 mov r3, r0
800d008: 73fb strb r3, [r7, #15]
return ret;
800d00a: 7bfb ldrb r3, [r7, #15]
800d00c: e12d b.n 800d26a <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
800d00e: 683b ldr r3, [r7, #0]
800d010: 785b ldrb r3, [r3, #1]
800d012: 2b03 cmp r3, #3
800d014: d007 beq.n 800d026 <USBD_StdEPReq+0x7a>
800d016: 2b03 cmp r3, #3
800d018: f300 811b bgt.w 800d252 <USBD_StdEPReq+0x2a6>
800d01c: 2b00 cmp r3, #0
800d01e: d072 beq.n 800d106 <USBD_StdEPReq+0x15a>
800d020: 2b01 cmp r3, #1
800d022: d03a beq.n 800d09a <USBD_StdEPReq+0xee>
800d024: e115 b.n 800d252 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800d026: 687b ldr r3, [r7, #4]
800d028: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d02c: 2b02 cmp r3, #2
800d02e: d002 beq.n 800d036 <USBD_StdEPReq+0x8a>
800d030: 2b03 cmp r3, #3
800d032: d015 beq.n 800d060 <USBD_StdEPReq+0xb4>
800d034: e02b b.n 800d08e <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800d036: 7bbb ldrb r3, [r7, #14]
800d038: 2b00 cmp r3, #0
800d03a: d00c beq.n 800d056 <USBD_StdEPReq+0xaa>
800d03c: 7bbb ldrb r3, [r7, #14]
800d03e: 2b80 cmp r3, #128 @ 0x80
800d040: d009 beq.n 800d056 <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800d042: 7bbb ldrb r3, [r7, #14]
800d044: 4619 mov r1, r3
800d046: 6878 ldr r0, [r7, #4]
800d048: f001 f8fe bl 800e248 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800d04c: 2180 movs r1, #128 @ 0x80
800d04e: 6878 ldr r0, [r7, #4]
800d050: f001 f8fa bl 800e248 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800d054: e020 b.n 800d098 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800d056: 6839 ldr r1, [r7, #0]
800d058: 6878 ldr r0, [r7, #4]
800d05a: f000 fc1b bl 800d894 <USBD_CtlError>
break;
800d05e: e01b b.n 800d098 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800d060: 683b ldr r3, [r7, #0]
800d062: 885b ldrh r3, [r3, #2]
800d064: 2b00 cmp r3, #0
800d066: d10e bne.n 800d086 <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
800d068: 7bbb ldrb r3, [r7, #14]
800d06a: 2b00 cmp r3, #0
800d06c: d00b beq.n 800d086 <USBD_StdEPReq+0xda>
800d06e: 7bbb ldrb r3, [r7, #14]
800d070: 2b80 cmp r3, #128 @ 0x80
800d072: d008 beq.n 800d086 <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800d074: 683b ldr r3, [r7, #0]
800d076: 88db ldrh r3, [r3, #6]
800d078: 2b00 cmp r3, #0
800d07a: d104 bne.n 800d086 <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
800d07c: 7bbb ldrb r3, [r7, #14]
800d07e: 4619 mov r1, r3
800d080: 6878 ldr r0, [r7, #4]
800d082: f001 f8e1 bl 800e248 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800d086: 6878 ldr r0, [r7, #4]
800d088: f000 fccc bl 800da24 <USBD_CtlSendStatus>
break;
800d08c: e004 b.n 800d098 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
800d08e: 6839 ldr r1, [r7, #0]
800d090: 6878 ldr r0, [r7, #4]
800d092: f000 fbff bl 800d894 <USBD_CtlError>
break;
800d096: bf00 nop
}
break;
800d098: e0e0 b.n 800d25c <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800d09a: 687b ldr r3, [r7, #4]
800d09c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d0a0: 2b02 cmp r3, #2
800d0a2: d002 beq.n 800d0aa <USBD_StdEPReq+0xfe>
800d0a4: 2b03 cmp r3, #3
800d0a6: d015 beq.n 800d0d4 <USBD_StdEPReq+0x128>
800d0a8: e026 b.n 800d0f8 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800d0aa: 7bbb ldrb r3, [r7, #14]
800d0ac: 2b00 cmp r3, #0
800d0ae: d00c beq.n 800d0ca <USBD_StdEPReq+0x11e>
800d0b0: 7bbb ldrb r3, [r7, #14]
800d0b2: 2b80 cmp r3, #128 @ 0x80
800d0b4: d009 beq.n 800d0ca <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
800d0b6: 7bbb ldrb r3, [r7, #14]
800d0b8: 4619 mov r1, r3
800d0ba: 6878 ldr r0, [r7, #4]
800d0bc: f001 f8c4 bl 800e248 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800d0c0: 2180 movs r1, #128 @ 0x80
800d0c2: 6878 ldr r0, [r7, #4]
800d0c4: f001 f8c0 bl 800e248 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800d0c8: e01c b.n 800d104 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
800d0ca: 6839 ldr r1, [r7, #0]
800d0cc: 6878 ldr r0, [r7, #4]
800d0ce: f000 fbe1 bl 800d894 <USBD_CtlError>
break;
800d0d2: e017 b.n 800d104 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800d0d4: 683b ldr r3, [r7, #0]
800d0d6: 885b ldrh r3, [r3, #2]
800d0d8: 2b00 cmp r3, #0
800d0da: d112 bne.n 800d102 <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
800d0dc: 7bbb ldrb r3, [r7, #14]
800d0de: f003 037f and.w r3, r3, #127 @ 0x7f
800d0e2: 2b00 cmp r3, #0
800d0e4: d004 beq.n 800d0f0 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
800d0e6: 7bbb ldrb r3, [r7, #14]
800d0e8: 4619 mov r1, r3
800d0ea: 6878 ldr r0, [r7, #4]
800d0ec: f001 f8cb bl 800e286 <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
800d0f0: 6878 ldr r0, [r7, #4]
800d0f2: f000 fc97 bl 800da24 <USBD_CtlSendStatus>
}
break;
800d0f6: e004 b.n 800d102 <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
800d0f8: 6839 ldr r1, [r7, #0]
800d0fa: 6878 ldr r0, [r7, #4]
800d0fc: f000 fbca bl 800d894 <USBD_CtlError>
break;
800d100: e000 b.n 800d104 <USBD_StdEPReq+0x158>
break;
800d102: bf00 nop
}
break;
800d104: e0aa b.n 800d25c <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800d106: 687b ldr r3, [r7, #4]
800d108: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d10c: 2b02 cmp r3, #2
800d10e: d002 beq.n 800d116 <USBD_StdEPReq+0x16a>
800d110: 2b03 cmp r3, #3
800d112: d032 beq.n 800d17a <USBD_StdEPReq+0x1ce>
800d114: e097 b.n 800d246 <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800d116: 7bbb ldrb r3, [r7, #14]
800d118: 2b00 cmp r3, #0
800d11a: d007 beq.n 800d12c <USBD_StdEPReq+0x180>
800d11c: 7bbb ldrb r3, [r7, #14]
800d11e: 2b80 cmp r3, #128 @ 0x80
800d120: d004 beq.n 800d12c <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
800d122: 6839 ldr r1, [r7, #0]
800d124: 6878 ldr r0, [r7, #4]
800d126: f000 fbb5 bl 800d894 <USBD_CtlError>
break;
800d12a: e091 b.n 800d250 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d12c: f997 300e ldrsb.w r3, [r7, #14]
800d130: 2b00 cmp r3, #0
800d132: da0b bge.n 800d14c <USBD_StdEPReq+0x1a0>
800d134: 7bbb ldrb r3, [r7, #14]
800d136: f003 027f and.w r2, r3, #127 @ 0x7f
800d13a: 4613 mov r3, r2
800d13c: 009b lsls r3, r3, #2
800d13e: 4413 add r3, r2
800d140: 009b lsls r3, r3, #2
800d142: 3310 adds r3, #16
800d144: 687a ldr r2, [r7, #4]
800d146: 4413 add r3, r2
800d148: 3304 adds r3, #4
800d14a: e00b b.n 800d164 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
800d14c: 7bbb ldrb r3, [r7, #14]
800d14e: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d152: 4613 mov r3, r2
800d154: 009b lsls r3, r3, #2
800d156: 4413 add r3, r2
800d158: 009b lsls r3, r3, #2
800d15a: f503 73a8 add.w r3, r3, #336 @ 0x150
800d15e: 687a ldr r2, [r7, #4]
800d160: 4413 add r3, r2
800d162: 3304 adds r3, #4
800d164: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800d166: 68bb ldr r3, [r7, #8]
800d168: 2200 movs r2, #0
800d16a: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800d16c: 68bb ldr r3, [r7, #8]
800d16e: 2202 movs r2, #2
800d170: 4619 mov r1, r3
800d172: 6878 ldr r0, [r7, #4]
800d174: f000 fbf8 bl 800d968 <USBD_CtlSendData>
break;
800d178: e06a b.n 800d250 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800d17a: f997 300e ldrsb.w r3, [r7, #14]
800d17e: 2b00 cmp r3, #0
800d180: da11 bge.n 800d1a6 <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800d182: 7bbb ldrb r3, [r7, #14]
800d184: f003 020f and.w r2, r3, #15
800d188: 6879 ldr r1, [r7, #4]
800d18a: 4613 mov r3, r2
800d18c: 009b lsls r3, r3, #2
800d18e: 4413 add r3, r2
800d190: 009b lsls r3, r3, #2
800d192: 440b add r3, r1
800d194: 3318 adds r3, #24
800d196: 681b ldr r3, [r3, #0]
800d198: 2b00 cmp r3, #0
800d19a: d117 bne.n 800d1cc <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800d19c: 6839 ldr r1, [r7, #0]
800d19e: 6878 ldr r0, [r7, #4]
800d1a0: f000 fb78 bl 800d894 <USBD_CtlError>
break;
800d1a4: e054 b.n 800d250 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800d1a6: 7bbb ldrb r3, [r7, #14]
800d1a8: f003 020f and.w r2, r3, #15
800d1ac: 6879 ldr r1, [r7, #4]
800d1ae: 4613 mov r3, r2
800d1b0: 009b lsls r3, r3, #2
800d1b2: 4413 add r3, r2
800d1b4: 009b lsls r3, r3, #2
800d1b6: 440b add r3, r1
800d1b8: f503 73ac add.w r3, r3, #344 @ 0x158
800d1bc: 681b ldr r3, [r3, #0]
800d1be: 2b00 cmp r3, #0
800d1c0: d104 bne.n 800d1cc <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800d1c2: 6839 ldr r1, [r7, #0]
800d1c4: 6878 ldr r0, [r7, #4]
800d1c6: f000 fb65 bl 800d894 <USBD_CtlError>
break;
800d1ca: e041 b.n 800d250 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d1cc: f997 300e ldrsb.w r3, [r7, #14]
800d1d0: 2b00 cmp r3, #0
800d1d2: da0b bge.n 800d1ec <USBD_StdEPReq+0x240>
800d1d4: 7bbb ldrb r3, [r7, #14]
800d1d6: f003 027f and.w r2, r3, #127 @ 0x7f
800d1da: 4613 mov r3, r2
800d1dc: 009b lsls r3, r3, #2
800d1de: 4413 add r3, r2
800d1e0: 009b lsls r3, r3, #2
800d1e2: 3310 adds r3, #16
800d1e4: 687a ldr r2, [r7, #4]
800d1e6: 4413 add r3, r2
800d1e8: 3304 adds r3, #4
800d1ea: e00b b.n 800d204 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
800d1ec: 7bbb ldrb r3, [r7, #14]
800d1ee: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d1f2: 4613 mov r3, r2
800d1f4: 009b lsls r3, r3, #2
800d1f6: 4413 add r3, r2
800d1f8: 009b lsls r3, r3, #2
800d1fa: f503 73a8 add.w r3, r3, #336 @ 0x150
800d1fe: 687a ldr r2, [r7, #4]
800d200: 4413 add r3, r2
800d202: 3304 adds r3, #4
800d204: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800d206: 7bbb ldrb r3, [r7, #14]
800d208: 2b00 cmp r3, #0
800d20a: d002 beq.n 800d212 <USBD_StdEPReq+0x266>
800d20c: 7bbb ldrb r3, [r7, #14]
800d20e: 2b80 cmp r3, #128 @ 0x80
800d210: d103 bne.n 800d21a <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
800d212: 68bb ldr r3, [r7, #8]
800d214: 2200 movs r2, #0
800d216: 601a str r2, [r3, #0]
800d218: e00e b.n 800d238 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800d21a: 7bbb ldrb r3, [r7, #14]
800d21c: 4619 mov r1, r3
800d21e: 6878 ldr r0, [r7, #4]
800d220: f001 f850 bl 800e2c4 <USBD_LL_IsStallEP>
800d224: 4603 mov r3, r0
800d226: 2b00 cmp r3, #0
800d228: d003 beq.n 800d232 <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800d22a: 68bb ldr r3, [r7, #8]
800d22c: 2201 movs r2, #1
800d22e: 601a str r2, [r3, #0]
800d230: e002 b.n 800d238 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
800d232: 68bb ldr r3, [r7, #8]
800d234: 2200 movs r2, #0
800d236: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800d238: 68bb ldr r3, [r7, #8]
800d23a: 2202 movs r2, #2
800d23c: 4619 mov r1, r3
800d23e: 6878 ldr r0, [r7, #4]
800d240: f000 fb92 bl 800d968 <USBD_CtlSendData>
break;
800d244: e004 b.n 800d250 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800d246: 6839 ldr r1, [r7, #0]
800d248: 6878 ldr r0, [r7, #4]
800d24a: f000 fb23 bl 800d894 <USBD_CtlError>
break;
800d24e: bf00 nop
}
break;
800d250: e004 b.n 800d25c <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
800d252: 6839 ldr r1, [r7, #0]
800d254: 6878 ldr r0, [r7, #4]
800d256: f000 fb1d bl 800d894 <USBD_CtlError>
break;
800d25a: bf00 nop
}
break;
800d25c: e004 b.n 800d268 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
800d25e: 6839 ldr r1, [r7, #0]
800d260: 6878 ldr r0, [r7, #4]
800d262: f000 fb17 bl 800d894 <USBD_CtlError>
break;
800d266: bf00 nop
}
return ret;
800d268: 7bfb ldrb r3, [r7, #15]
}
800d26a: 4618 mov r0, r3
800d26c: 3710 adds r7, #16
800d26e: 46bd mov sp, r7
800d270: bd80 pop {r7, pc}
...
0800d274 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d274: b580 push {r7, lr}
800d276: b084 sub sp, #16
800d278: af00 add r7, sp, #0
800d27a: 6078 str r0, [r7, #4]
800d27c: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800d27e: 2300 movs r3, #0
800d280: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800d282: 2300 movs r3, #0
800d284: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800d286: 2300 movs r3, #0
800d288: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
800d28a: 683b ldr r3, [r7, #0]
800d28c: 885b ldrh r3, [r3, #2]
800d28e: 0a1b lsrs r3, r3, #8
800d290: b29b uxth r3, r3
800d292: 3b01 subs r3, #1
800d294: 2b06 cmp r3, #6
800d296: f200 8128 bhi.w 800d4ea <USBD_GetDescriptor+0x276>
800d29a: a201 add r2, pc, #4 @ (adr r2, 800d2a0 <USBD_GetDescriptor+0x2c>)
800d29c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d2a0: 0800d2bd .word 0x0800d2bd
800d2a4: 0800d2d5 .word 0x0800d2d5
800d2a8: 0800d315 .word 0x0800d315
800d2ac: 0800d4eb .word 0x0800d4eb
800d2b0: 0800d4eb .word 0x0800d4eb
800d2b4: 0800d48b .word 0x0800d48b
800d2b8: 0800d4b7 .word 0x0800d4b7
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800d2bc: 687b ldr r3, [r7, #4]
800d2be: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2c2: 681b ldr r3, [r3, #0]
800d2c4: 687a ldr r2, [r7, #4]
800d2c6: 7c12 ldrb r2, [r2, #16]
800d2c8: f107 0108 add.w r1, r7, #8
800d2cc: 4610 mov r0, r2
800d2ce: 4798 blx r3
800d2d0: 60f8 str r0, [r7, #12]
break;
800d2d2: e112 b.n 800d4fa <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d2d4: 687b ldr r3, [r7, #4]
800d2d6: 7c1b ldrb r3, [r3, #16]
800d2d8: 2b00 cmp r3, #0
800d2da: d10d bne.n 800d2f8 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
800d2dc: 687b ldr r3, [r7, #4]
800d2de: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d2e2: 6a9b ldr r3, [r3, #40] @ 0x28
800d2e4: f107 0208 add.w r2, r7, #8
800d2e8: 4610 mov r0, r2
800d2ea: 4798 blx r3
800d2ec: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800d2ee: 68fb ldr r3, [r7, #12]
800d2f0: 3301 adds r3, #1
800d2f2: 2202 movs r2, #2
800d2f4: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800d2f6: e100 b.n 800d4fa <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
800d2f8: 687b ldr r3, [r7, #4]
800d2fa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d2fe: 6adb ldr r3, [r3, #44] @ 0x2c
800d300: f107 0208 add.w r2, r7, #8
800d304: 4610 mov r0, r2
800d306: 4798 blx r3
800d308: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800d30a: 68fb ldr r3, [r7, #12]
800d30c: 3301 adds r3, #1
800d30e: 2202 movs r2, #2
800d310: 701a strb r2, [r3, #0]
break;
800d312: e0f2 b.n 800d4fa <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800d314: 683b ldr r3, [r7, #0]
800d316: 885b ldrh r3, [r3, #2]
800d318: b2db uxtb r3, r3
800d31a: 2b05 cmp r3, #5
800d31c: f200 80ac bhi.w 800d478 <USBD_GetDescriptor+0x204>
800d320: a201 add r2, pc, #4 @ (adr r2, 800d328 <USBD_GetDescriptor+0xb4>)
800d322: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d326: bf00 nop
800d328: 0800d341 .word 0x0800d341
800d32c: 0800d375 .word 0x0800d375
800d330: 0800d3a9 .word 0x0800d3a9
800d334: 0800d3dd .word 0x0800d3dd
800d338: 0800d411 .word 0x0800d411
800d33c: 0800d445 .word 0x0800d445
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
800d340: 687b ldr r3, [r7, #4]
800d342: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d346: 685b ldr r3, [r3, #4]
800d348: 2b00 cmp r3, #0
800d34a: d00b beq.n 800d364 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800d34c: 687b ldr r3, [r7, #4]
800d34e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d352: 685b ldr r3, [r3, #4]
800d354: 687a ldr r2, [r7, #4]
800d356: 7c12 ldrb r2, [r2, #16]
800d358: f107 0108 add.w r1, r7, #8
800d35c: 4610 mov r0, r2
800d35e: 4798 blx r3
800d360: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d362: e091 b.n 800d488 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d364: 6839 ldr r1, [r7, #0]
800d366: 6878 ldr r0, [r7, #4]
800d368: f000 fa94 bl 800d894 <USBD_CtlError>
err++;
800d36c: 7afb ldrb r3, [r7, #11]
800d36e: 3301 adds r3, #1
800d370: 72fb strb r3, [r7, #11]
break;
800d372: e089 b.n 800d488 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800d374: 687b ldr r3, [r7, #4]
800d376: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d37a: 689b ldr r3, [r3, #8]
800d37c: 2b00 cmp r3, #0
800d37e: d00b beq.n 800d398 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
800d380: 687b ldr r3, [r7, #4]
800d382: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d386: 689b ldr r3, [r3, #8]
800d388: 687a ldr r2, [r7, #4]
800d38a: 7c12 ldrb r2, [r2, #16]
800d38c: f107 0108 add.w r1, r7, #8
800d390: 4610 mov r0, r2
800d392: 4798 blx r3
800d394: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d396: e077 b.n 800d488 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d398: 6839 ldr r1, [r7, #0]
800d39a: 6878 ldr r0, [r7, #4]
800d39c: f000 fa7a bl 800d894 <USBD_CtlError>
err++;
800d3a0: 7afb ldrb r3, [r7, #11]
800d3a2: 3301 adds r3, #1
800d3a4: 72fb strb r3, [r7, #11]
break;
800d3a6: e06f b.n 800d488 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
800d3a8: 687b ldr r3, [r7, #4]
800d3aa: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d3ae: 68db ldr r3, [r3, #12]
800d3b0: 2b00 cmp r3, #0
800d3b2: d00b beq.n 800d3cc <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
800d3b4: 687b ldr r3, [r7, #4]
800d3b6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d3ba: 68db ldr r3, [r3, #12]
800d3bc: 687a ldr r2, [r7, #4]
800d3be: 7c12 ldrb r2, [r2, #16]
800d3c0: f107 0108 add.w r1, r7, #8
800d3c4: 4610 mov r0, r2
800d3c6: 4798 blx r3
800d3c8: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d3ca: e05d b.n 800d488 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d3cc: 6839 ldr r1, [r7, #0]
800d3ce: 6878 ldr r0, [r7, #4]
800d3d0: f000 fa60 bl 800d894 <USBD_CtlError>
err++;
800d3d4: 7afb ldrb r3, [r7, #11]
800d3d6: 3301 adds r3, #1
800d3d8: 72fb strb r3, [r7, #11]
break;
800d3da: e055 b.n 800d488 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800d3dc: 687b ldr r3, [r7, #4]
800d3de: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d3e2: 691b ldr r3, [r3, #16]
800d3e4: 2b00 cmp r3, #0
800d3e6: d00b beq.n 800d400 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800d3e8: 687b ldr r3, [r7, #4]
800d3ea: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d3ee: 691b ldr r3, [r3, #16]
800d3f0: 687a ldr r2, [r7, #4]
800d3f2: 7c12 ldrb r2, [r2, #16]
800d3f4: f107 0108 add.w r1, r7, #8
800d3f8: 4610 mov r0, r2
800d3fa: 4798 blx r3
800d3fc: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d3fe: e043 b.n 800d488 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d400: 6839 ldr r1, [r7, #0]
800d402: 6878 ldr r0, [r7, #4]
800d404: f000 fa46 bl 800d894 <USBD_CtlError>
err++;
800d408: 7afb ldrb r3, [r7, #11]
800d40a: 3301 adds r3, #1
800d40c: 72fb strb r3, [r7, #11]
break;
800d40e: e03b b.n 800d488 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800d410: 687b ldr r3, [r7, #4]
800d412: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d416: 695b ldr r3, [r3, #20]
800d418: 2b00 cmp r3, #0
800d41a: d00b beq.n 800d434 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800d41c: 687b ldr r3, [r7, #4]
800d41e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d422: 695b ldr r3, [r3, #20]
800d424: 687a ldr r2, [r7, #4]
800d426: 7c12 ldrb r2, [r2, #16]
800d428: f107 0108 add.w r1, r7, #8
800d42c: 4610 mov r0, r2
800d42e: 4798 blx r3
800d430: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d432: e029 b.n 800d488 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d434: 6839 ldr r1, [r7, #0]
800d436: 6878 ldr r0, [r7, #4]
800d438: f000 fa2c bl 800d894 <USBD_CtlError>
err++;
800d43c: 7afb ldrb r3, [r7, #11]
800d43e: 3301 adds r3, #1
800d440: 72fb strb r3, [r7, #11]
break;
800d442: e021 b.n 800d488 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800d444: 687b ldr r3, [r7, #4]
800d446: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d44a: 699b ldr r3, [r3, #24]
800d44c: 2b00 cmp r3, #0
800d44e: d00b beq.n 800d468 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800d450: 687b ldr r3, [r7, #4]
800d452: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d456: 699b ldr r3, [r3, #24]
800d458: 687a ldr r2, [r7, #4]
800d45a: 7c12 ldrb r2, [r2, #16]
800d45c: f107 0108 add.w r1, r7, #8
800d460: 4610 mov r0, r2
800d462: 4798 blx r3
800d464: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d466: e00f b.n 800d488 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d468: 6839 ldr r1, [r7, #0]
800d46a: 6878 ldr r0, [r7, #4]
800d46c: f000 fa12 bl 800d894 <USBD_CtlError>
err++;
800d470: 7afb ldrb r3, [r7, #11]
800d472: 3301 adds r3, #1
800d474: 72fb strb r3, [r7, #11]
break;
800d476: e007 b.n 800d488 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
800d478: 6839 ldr r1, [r7, #0]
800d47a: 6878 ldr r0, [r7, #4]
800d47c: f000 fa0a bl 800d894 <USBD_CtlError>
err++;
800d480: 7afb ldrb r3, [r7, #11]
800d482: 3301 adds r3, #1
800d484: 72fb strb r3, [r7, #11]
#endif
}
break;
800d486: e038 b.n 800d4fa <USBD_GetDescriptor+0x286>
800d488: e037 b.n 800d4fa <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d48a: 687b ldr r3, [r7, #4]
800d48c: 7c1b ldrb r3, [r3, #16]
800d48e: 2b00 cmp r3, #0
800d490: d109 bne.n 800d4a6 <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800d492: 687b ldr r3, [r7, #4]
800d494: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d498: 6b5b ldr r3, [r3, #52] @ 0x34
800d49a: f107 0208 add.w r2, r7, #8
800d49e: 4610 mov r0, r2
800d4a0: 4798 blx r3
800d4a2: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d4a4: e029 b.n 800d4fa <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800d4a6: 6839 ldr r1, [r7, #0]
800d4a8: 6878 ldr r0, [r7, #4]
800d4aa: f000 f9f3 bl 800d894 <USBD_CtlError>
err++;
800d4ae: 7afb ldrb r3, [r7, #11]
800d4b0: 3301 adds r3, #1
800d4b2: 72fb strb r3, [r7, #11]
break;
800d4b4: e021 b.n 800d4fa <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d4b6: 687b ldr r3, [r7, #4]
800d4b8: 7c1b ldrb r3, [r3, #16]
800d4ba: 2b00 cmp r3, #0
800d4bc: d10d bne.n 800d4da <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
800d4be: 687b ldr r3, [r7, #4]
800d4c0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d4c4: 6b1b ldr r3, [r3, #48] @ 0x30
800d4c6: f107 0208 add.w r2, r7, #8
800d4ca: 4610 mov r0, r2
800d4cc: 4798 blx r3
800d4ce: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
800d4d0: 68fb ldr r3, [r7, #12]
800d4d2: 3301 adds r3, #1
800d4d4: 2207 movs r2, #7
800d4d6: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d4d8: e00f b.n 800d4fa <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800d4da: 6839 ldr r1, [r7, #0]
800d4dc: 6878 ldr r0, [r7, #4]
800d4de: f000 f9d9 bl 800d894 <USBD_CtlError>
err++;
800d4e2: 7afb ldrb r3, [r7, #11]
800d4e4: 3301 adds r3, #1
800d4e6: 72fb strb r3, [r7, #11]
break;
800d4e8: e007 b.n 800d4fa <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800d4ea: 6839 ldr r1, [r7, #0]
800d4ec: 6878 ldr r0, [r7, #4]
800d4ee: f000 f9d1 bl 800d894 <USBD_CtlError>
err++;
800d4f2: 7afb ldrb r3, [r7, #11]
800d4f4: 3301 adds r3, #1
800d4f6: 72fb strb r3, [r7, #11]
break;
800d4f8: bf00 nop
}
if (err != 0U)
800d4fa: 7afb ldrb r3, [r7, #11]
800d4fc: 2b00 cmp r3, #0
800d4fe: d11c bne.n 800d53a <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
800d500: 893b ldrh r3, [r7, #8]
800d502: 2b00 cmp r3, #0
800d504: d011 beq.n 800d52a <USBD_GetDescriptor+0x2b6>
800d506: 683b ldr r3, [r7, #0]
800d508: 88db ldrh r3, [r3, #6]
800d50a: 2b00 cmp r3, #0
800d50c: d00d beq.n 800d52a <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800d50e: 683b ldr r3, [r7, #0]
800d510: 88da ldrh r2, [r3, #6]
800d512: 893b ldrh r3, [r7, #8]
800d514: 4293 cmp r3, r2
800d516: bf28 it cs
800d518: 4613 movcs r3, r2
800d51a: b29b uxth r3, r3
800d51c: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800d51e: 893b ldrh r3, [r7, #8]
800d520: 461a mov r2, r3
800d522: 68f9 ldr r1, [r7, #12]
800d524: 6878 ldr r0, [r7, #4]
800d526: f000 fa1f bl 800d968 <USBD_CtlSendData>
}
if (req->wLength == 0U)
800d52a: 683b ldr r3, [r7, #0]
800d52c: 88db ldrh r3, [r3, #6]
800d52e: 2b00 cmp r3, #0
800d530: d104 bne.n 800d53c <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800d532: 6878 ldr r0, [r7, #4]
800d534: f000 fa76 bl 800da24 <USBD_CtlSendStatus>
800d538: e000 b.n 800d53c <USBD_GetDescriptor+0x2c8>
return;
800d53a: bf00 nop
}
}
}
800d53c: 3710 adds r7, #16
800d53e: 46bd mov sp, r7
800d540: bd80 pop {r7, pc}
800d542: bf00 nop
0800d544 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d544: b580 push {r7, lr}
800d546: b084 sub sp, #16
800d548: af00 add r7, sp, #0
800d54a: 6078 str r0, [r7, #4]
800d54c: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800d54e: 683b ldr r3, [r7, #0]
800d550: 889b ldrh r3, [r3, #4]
800d552: 2b00 cmp r3, #0
800d554: d130 bne.n 800d5b8 <USBD_SetAddress+0x74>
800d556: 683b ldr r3, [r7, #0]
800d558: 88db ldrh r3, [r3, #6]
800d55a: 2b00 cmp r3, #0
800d55c: d12c bne.n 800d5b8 <USBD_SetAddress+0x74>
800d55e: 683b ldr r3, [r7, #0]
800d560: 885b ldrh r3, [r3, #2]
800d562: 2b7f cmp r3, #127 @ 0x7f
800d564: d828 bhi.n 800d5b8 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800d566: 683b ldr r3, [r7, #0]
800d568: 885b ldrh r3, [r3, #2]
800d56a: b2db uxtb r3, r3
800d56c: f003 037f and.w r3, r3, #127 @ 0x7f
800d570: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d572: 687b ldr r3, [r7, #4]
800d574: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d578: 2b03 cmp r3, #3
800d57a: d104 bne.n 800d586 <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
800d57c: 6839 ldr r1, [r7, #0]
800d57e: 6878 ldr r0, [r7, #4]
800d580: f000 f988 bl 800d894 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d584: e01d b.n 800d5c2 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800d586: 687b ldr r3, [r7, #4]
800d588: 7bfa ldrb r2, [r7, #15]
800d58a: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
800d58e: 7bfb ldrb r3, [r7, #15]
800d590: 4619 mov r1, r3
800d592: 6878 ldr r0, [r7, #4]
800d594: f000 fec1 bl 800e31a <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
800d598: 6878 ldr r0, [r7, #4]
800d59a: f000 fa43 bl 800da24 <USBD_CtlSendStatus>
if (dev_addr != 0U)
800d59e: 7bfb ldrb r3, [r7, #15]
800d5a0: 2b00 cmp r3, #0
800d5a2: d004 beq.n 800d5ae <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800d5a4: 687b ldr r3, [r7, #4]
800d5a6: 2202 movs r2, #2
800d5a8: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d5ac: e009 b.n 800d5c2 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800d5ae: 687b ldr r3, [r7, #4]
800d5b0: 2201 movs r2, #1
800d5b2: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d5b6: e004 b.n 800d5c2 <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
800d5b8: 6839 ldr r1, [r7, #0]
800d5ba: 6878 ldr r0, [r7, #4]
800d5bc: f000 f96a bl 800d894 <USBD_CtlError>
}
}
800d5c0: bf00 nop
800d5c2: bf00 nop
800d5c4: 3710 adds r7, #16
800d5c6: 46bd mov sp, r7
800d5c8: bd80 pop {r7, pc}
...
0800d5cc <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d5cc: b580 push {r7, lr}
800d5ce: b082 sub sp, #8
800d5d0: af00 add r7, sp, #0
800d5d2: 6078 str r0, [r7, #4]
800d5d4: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800d5d6: 683b ldr r3, [r7, #0]
800d5d8: 885b ldrh r3, [r3, #2]
800d5da: b2da uxtb r2, r3
800d5dc: 4b41 ldr r3, [pc, #260] @ (800d6e4 <USBD_SetConfig+0x118>)
800d5de: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800d5e0: 4b40 ldr r3, [pc, #256] @ (800d6e4 <USBD_SetConfig+0x118>)
800d5e2: 781b ldrb r3, [r3, #0]
800d5e4: 2b01 cmp r3, #1
800d5e6: d904 bls.n 800d5f2 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
800d5e8: 6839 ldr r1, [r7, #0]
800d5ea: 6878 ldr r0, [r7, #4]
800d5ec: f000 f952 bl 800d894 <USBD_CtlError>
800d5f0: e075 b.n 800d6de <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800d5f2: 687b ldr r3, [r7, #4]
800d5f4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d5f8: 2b02 cmp r3, #2
800d5fa: d002 beq.n 800d602 <USBD_SetConfig+0x36>
800d5fc: 2b03 cmp r3, #3
800d5fe: d023 beq.n 800d648 <USBD_SetConfig+0x7c>
800d600: e062 b.n 800d6c8 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800d602: 4b38 ldr r3, [pc, #224] @ (800d6e4 <USBD_SetConfig+0x118>)
800d604: 781b ldrb r3, [r3, #0]
800d606: 2b00 cmp r3, #0
800d608: d01a beq.n 800d640 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800d60a: 4b36 ldr r3, [pc, #216] @ (800d6e4 <USBD_SetConfig+0x118>)
800d60c: 781b ldrb r3, [r3, #0]
800d60e: 461a mov r2, r3
800d610: 687b ldr r3, [r7, #4]
800d612: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800d614: 687b ldr r3, [r7, #4]
800d616: 2203 movs r2, #3
800d618: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800d61c: 4b31 ldr r3, [pc, #196] @ (800d6e4 <USBD_SetConfig+0x118>)
800d61e: 781b ldrb r3, [r3, #0]
800d620: 4619 mov r1, r3
800d622: 6878 ldr r0, [r7, #4]
800d624: f7ff f9e7 bl 800c9f6 <USBD_SetClassConfig>
800d628: 4603 mov r3, r0
800d62a: 2b02 cmp r3, #2
800d62c: d104 bne.n 800d638 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800d62e: 6839 ldr r1, [r7, #0]
800d630: 6878 ldr r0, [r7, #4]
800d632: f000 f92f bl 800d894 <USBD_CtlError>
return;
800d636: e052 b.n 800d6de <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800d638: 6878 ldr r0, [r7, #4]
800d63a: f000 f9f3 bl 800da24 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800d63e: e04e b.n 800d6de <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d640: 6878 ldr r0, [r7, #4]
800d642: f000 f9ef bl 800da24 <USBD_CtlSendStatus>
break;
800d646: e04a b.n 800d6de <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800d648: 4b26 ldr r3, [pc, #152] @ (800d6e4 <USBD_SetConfig+0x118>)
800d64a: 781b ldrb r3, [r3, #0]
800d64c: 2b00 cmp r3, #0
800d64e: d112 bne.n 800d676 <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800d650: 687b ldr r3, [r7, #4]
800d652: 2202 movs r2, #2
800d654: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800d658: 4b22 ldr r3, [pc, #136] @ (800d6e4 <USBD_SetConfig+0x118>)
800d65a: 781b ldrb r3, [r3, #0]
800d65c: 461a mov r2, r3
800d65e: 687b ldr r3, [r7, #4]
800d660: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800d662: 4b20 ldr r3, [pc, #128] @ (800d6e4 <USBD_SetConfig+0x118>)
800d664: 781b ldrb r3, [r3, #0]
800d666: 4619 mov r1, r3
800d668: 6878 ldr r0, [r7, #4]
800d66a: f7ff f9e3 bl 800ca34 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
800d66e: 6878 ldr r0, [r7, #4]
800d670: f000 f9d8 bl 800da24 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800d674: e033 b.n 800d6de <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800d676: 4b1b ldr r3, [pc, #108] @ (800d6e4 <USBD_SetConfig+0x118>)
800d678: 781b ldrb r3, [r3, #0]
800d67a: 461a mov r2, r3
800d67c: 687b ldr r3, [r7, #4]
800d67e: 685b ldr r3, [r3, #4]
800d680: 429a cmp r2, r3
800d682: d01d beq.n 800d6c0 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800d684: 687b ldr r3, [r7, #4]
800d686: 685b ldr r3, [r3, #4]
800d688: b2db uxtb r3, r3
800d68a: 4619 mov r1, r3
800d68c: 6878 ldr r0, [r7, #4]
800d68e: f7ff f9d1 bl 800ca34 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800d692: 4b14 ldr r3, [pc, #80] @ (800d6e4 <USBD_SetConfig+0x118>)
800d694: 781b ldrb r3, [r3, #0]
800d696: 461a mov r2, r3
800d698: 687b ldr r3, [r7, #4]
800d69a: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800d69c: 4b11 ldr r3, [pc, #68] @ (800d6e4 <USBD_SetConfig+0x118>)
800d69e: 781b ldrb r3, [r3, #0]
800d6a0: 4619 mov r1, r3
800d6a2: 6878 ldr r0, [r7, #4]
800d6a4: f7ff f9a7 bl 800c9f6 <USBD_SetClassConfig>
800d6a8: 4603 mov r3, r0
800d6aa: 2b02 cmp r3, #2
800d6ac: d104 bne.n 800d6b8 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
800d6ae: 6839 ldr r1, [r7, #0]
800d6b0: 6878 ldr r0, [r7, #4]
800d6b2: f000 f8ef bl 800d894 <USBD_CtlError>
return;
800d6b6: e012 b.n 800d6de <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d6b8: 6878 ldr r0, [r7, #4]
800d6ba: f000 f9b3 bl 800da24 <USBD_CtlSendStatus>
break;
800d6be: e00e b.n 800d6de <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d6c0: 6878 ldr r0, [r7, #4]
800d6c2: f000 f9af bl 800da24 <USBD_CtlSendStatus>
break;
800d6c6: e00a b.n 800d6de <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
800d6c8: 6839 ldr r1, [r7, #0]
800d6ca: 6878 ldr r0, [r7, #4]
800d6cc: f000 f8e2 bl 800d894 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
800d6d0: 4b04 ldr r3, [pc, #16] @ (800d6e4 <USBD_SetConfig+0x118>)
800d6d2: 781b ldrb r3, [r3, #0]
800d6d4: 4619 mov r1, r3
800d6d6: 6878 ldr r0, [r7, #4]
800d6d8: f7ff f9ac bl 800ca34 <USBD_ClrClassConfig>
break;
800d6dc: bf00 nop
}
}
}
800d6de: 3708 adds r7, #8
800d6e0: 46bd mov sp, r7
800d6e2: bd80 pop {r7, pc}
800d6e4: 20000498 .word 0x20000498
0800d6e8 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d6e8: b580 push {r7, lr}
800d6ea: b082 sub sp, #8
800d6ec: af00 add r7, sp, #0
800d6ee: 6078 str r0, [r7, #4]
800d6f0: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800d6f2: 683b ldr r3, [r7, #0]
800d6f4: 88db ldrh r3, [r3, #6]
800d6f6: 2b01 cmp r3, #1
800d6f8: d004 beq.n 800d704 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800d6fa: 6839 ldr r1, [r7, #0]
800d6fc: 6878 ldr r0, [r7, #4]
800d6fe: f000 f8c9 bl 800d894 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800d702: e022 b.n 800d74a <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800d704: 687b ldr r3, [r7, #4]
800d706: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d70a: 2b02 cmp r3, #2
800d70c: dc02 bgt.n 800d714 <USBD_GetConfig+0x2c>
800d70e: 2b00 cmp r3, #0
800d710: dc03 bgt.n 800d71a <USBD_GetConfig+0x32>
800d712: e015 b.n 800d740 <USBD_GetConfig+0x58>
800d714: 2b03 cmp r3, #3
800d716: d00b beq.n 800d730 <USBD_GetConfig+0x48>
800d718: e012 b.n 800d740 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800d71a: 687b ldr r3, [r7, #4]
800d71c: 2200 movs r2, #0
800d71e: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
800d720: 687b ldr r3, [r7, #4]
800d722: 3308 adds r3, #8
800d724: 2201 movs r2, #1
800d726: 4619 mov r1, r3
800d728: 6878 ldr r0, [r7, #4]
800d72a: f000 f91d bl 800d968 <USBD_CtlSendData>
break;
800d72e: e00c b.n 800d74a <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
800d730: 687b ldr r3, [r7, #4]
800d732: 3304 adds r3, #4
800d734: 2201 movs r2, #1
800d736: 4619 mov r1, r3
800d738: 6878 ldr r0, [r7, #4]
800d73a: f000 f915 bl 800d968 <USBD_CtlSendData>
break;
800d73e: e004 b.n 800d74a <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
800d740: 6839 ldr r1, [r7, #0]
800d742: 6878 ldr r0, [r7, #4]
800d744: f000 f8a6 bl 800d894 <USBD_CtlError>
break;
800d748: bf00 nop
}
800d74a: bf00 nop
800d74c: 3708 adds r7, #8
800d74e: 46bd mov sp, r7
800d750: bd80 pop {r7, pc}
0800d752 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d752: b580 push {r7, lr}
800d754: b082 sub sp, #8
800d756: af00 add r7, sp, #0
800d758: 6078 str r0, [r7, #4]
800d75a: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d75c: 687b ldr r3, [r7, #4]
800d75e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d762: 3b01 subs r3, #1
800d764: 2b02 cmp r3, #2
800d766: d81e bhi.n 800d7a6 <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800d768: 683b ldr r3, [r7, #0]
800d76a: 88db ldrh r3, [r3, #6]
800d76c: 2b02 cmp r3, #2
800d76e: d004 beq.n 800d77a <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
800d770: 6839 ldr r1, [r7, #0]
800d772: 6878 ldr r0, [r7, #4]
800d774: f000 f88e bl 800d894 <USBD_CtlError>
break;
800d778: e01a b.n 800d7b0 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800d77a: 687b ldr r3, [r7, #4]
800d77c: 2201 movs r2, #1
800d77e: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
800d780: 687b ldr r3, [r7, #4]
800d782: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800d786: 2b00 cmp r3, #0
800d788: d005 beq.n 800d796 <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800d78a: 687b ldr r3, [r7, #4]
800d78c: 68db ldr r3, [r3, #12]
800d78e: f043 0202 orr.w r2, r3, #2
800d792: 687b ldr r3, [r7, #4]
800d794: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800d796: 687b ldr r3, [r7, #4]
800d798: 330c adds r3, #12
800d79a: 2202 movs r2, #2
800d79c: 4619 mov r1, r3
800d79e: 6878 ldr r0, [r7, #4]
800d7a0: f000 f8e2 bl 800d968 <USBD_CtlSendData>
break;
800d7a4: e004 b.n 800d7b0 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800d7a6: 6839 ldr r1, [r7, #0]
800d7a8: 6878 ldr r0, [r7, #4]
800d7aa: f000 f873 bl 800d894 <USBD_CtlError>
break;
800d7ae: bf00 nop
}
}
800d7b0: bf00 nop
800d7b2: 3708 adds r7, #8
800d7b4: 46bd mov sp, r7
800d7b6: bd80 pop {r7, pc}
0800d7b8 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d7b8: b580 push {r7, lr}
800d7ba: b082 sub sp, #8
800d7bc: af00 add r7, sp, #0
800d7be: 6078 str r0, [r7, #4]
800d7c0: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d7c2: 683b ldr r3, [r7, #0]
800d7c4: 885b ldrh r3, [r3, #2]
800d7c6: 2b01 cmp r3, #1
800d7c8: d106 bne.n 800d7d8 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
800d7ca: 687b ldr r3, [r7, #4]
800d7cc: 2201 movs r2, #1
800d7ce: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d7d2: 6878 ldr r0, [r7, #4]
800d7d4: f000 f926 bl 800da24 <USBD_CtlSendStatus>
}
}
800d7d8: bf00 nop
800d7da: 3708 adds r7, #8
800d7dc: 46bd mov sp, r7
800d7de: bd80 pop {r7, pc}
0800d7e0 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d7e0: b580 push {r7, lr}
800d7e2: b082 sub sp, #8
800d7e4: af00 add r7, sp, #0
800d7e6: 6078 str r0, [r7, #4]
800d7e8: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d7ea: 687b ldr r3, [r7, #4]
800d7ec: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d7f0: 3b01 subs r3, #1
800d7f2: 2b02 cmp r3, #2
800d7f4: d80b bhi.n 800d80e <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d7f6: 683b ldr r3, [r7, #0]
800d7f8: 885b ldrh r3, [r3, #2]
800d7fa: 2b01 cmp r3, #1
800d7fc: d10c bne.n 800d818 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
800d7fe: 687b ldr r3, [r7, #4]
800d800: 2200 movs r2, #0
800d802: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d806: 6878 ldr r0, [r7, #4]
800d808: f000 f90c bl 800da24 <USBD_CtlSendStatus>
}
break;
800d80c: e004 b.n 800d818 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
800d80e: 6839 ldr r1, [r7, #0]
800d810: 6878 ldr r0, [r7, #4]
800d812: f000 f83f bl 800d894 <USBD_CtlError>
break;
800d816: e000 b.n 800d81a <USBD_ClrFeature+0x3a>
break;
800d818: bf00 nop
}
}
800d81a: bf00 nop
800d81c: 3708 adds r7, #8
800d81e: 46bd mov sp, r7
800d820: bd80 pop {r7, pc}
0800d822 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800d822: b480 push {r7}
800d824: b083 sub sp, #12
800d826: af00 add r7, sp, #0
800d828: 6078 str r0, [r7, #4]
800d82a: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
800d82c: 683b ldr r3, [r7, #0]
800d82e: 781a ldrb r2, [r3, #0]
800d830: 687b ldr r3, [r7, #4]
800d832: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800d834: 683b ldr r3, [r7, #0]
800d836: 785a ldrb r2, [r3, #1]
800d838: 687b ldr r3, [r7, #4]
800d83a: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
800d83c: 683b ldr r3, [r7, #0]
800d83e: 3302 adds r3, #2
800d840: 781b ldrb r3, [r3, #0]
800d842: 461a mov r2, r3
800d844: 683b ldr r3, [r7, #0]
800d846: 3303 adds r3, #3
800d848: 781b ldrb r3, [r3, #0]
800d84a: 021b lsls r3, r3, #8
800d84c: b29b uxth r3, r3
800d84e: 4413 add r3, r2
800d850: b29a uxth r2, r3
800d852: 687b ldr r3, [r7, #4]
800d854: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800d856: 683b ldr r3, [r7, #0]
800d858: 3304 adds r3, #4
800d85a: 781b ldrb r3, [r3, #0]
800d85c: 461a mov r2, r3
800d85e: 683b ldr r3, [r7, #0]
800d860: 3305 adds r3, #5
800d862: 781b ldrb r3, [r3, #0]
800d864: 021b lsls r3, r3, #8
800d866: b29b uxth r3, r3
800d868: 4413 add r3, r2
800d86a: b29a uxth r2, r3
800d86c: 687b ldr r3, [r7, #4]
800d86e: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
800d870: 683b ldr r3, [r7, #0]
800d872: 3306 adds r3, #6
800d874: 781b ldrb r3, [r3, #0]
800d876: 461a mov r2, r3
800d878: 683b ldr r3, [r7, #0]
800d87a: 3307 adds r3, #7
800d87c: 781b ldrb r3, [r3, #0]
800d87e: 021b lsls r3, r3, #8
800d880: b29b uxth r3, r3
800d882: 4413 add r3, r2
800d884: b29a uxth r2, r3
800d886: 687b ldr r3, [r7, #4]
800d888: 80da strh r2, [r3, #6]
}
800d88a: bf00 nop
800d88c: 370c adds r7, #12
800d88e: 46bd mov sp, r7
800d890: bc80 pop {r7}
800d892: 4770 bx lr
0800d894 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d894: b580 push {r7, lr}
800d896: b082 sub sp, #8
800d898: af00 add r7, sp, #0
800d89a: 6078 str r0, [r7, #4]
800d89c: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
800d89e: 2180 movs r1, #128 @ 0x80
800d8a0: 6878 ldr r0, [r7, #4]
800d8a2: f000 fcd1 bl 800e248 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
800d8a6: 2100 movs r1, #0
800d8a8: 6878 ldr r0, [r7, #4]
800d8aa: f000 fccd bl 800e248 <USBD_LL_StallEP>
}
800d8ae: bf00 nop
800d8b0: 3708 adds r7, #8
800d8b2: 46bd mov sp, r7
800d8b4: bd80 pop {r7, pc}
0800d8b6 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800d8b6: b580 push {r7, lr}
800d8b8: b086 sub sp, #24
800d8ba: af00 add r7, sp, #0
800d8bc: 60f8 str r0, [r7, #12]
800d8be: 60b9 str r1, [r7, #8]
800d8c0: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800d8c2: 2300 movs r3, #0
800d8c4: 75fb strb r3, [r7, #23]
if (desc != NULL)
800d8c6: 68fb ldr r3, [r7, #12]
800d8c8: 2b00 cmp r3, #0
800d8ca: d032 beq.n 800d932 <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
800d8cc: 68f8 ldr r0, [r7, #12]
800d8ce: f000 f834 bl 800d93a <USBD_GetLen>
800d8d2: 4603 mov r3, r0
800d8d4: 3301 adds r3, #1
800d8d6: b29b uxth r3, r3
800d8d8: 005b lsls r3, r3, #1
800d8da: b29a uxth r2, r3
800d8dc: 687b ldr r3, [r7, #4]
800d8de: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
800d8e0: 7dfb ldrb r3, [r7, #23]
800d8e2: 1c5a adds r2, r3, #1
800d8e4: 75fa strb r2, [r7, #23]
800d8e6: 461a mov r2, r3
800d8e8: 68bb ldr r3, [r7, #8]
800d8ea: 4413 add r3, r2
800d8ec: 687a ldr r2, [r7, #4]
800d8ee: 7812 ldrb r2, [r2, #0]
800d8f0: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800d8f2: 7dfb ldrb r3, [r7, #23]
800d8f4: 1c5a adds r2, r3, #1
800d8f6: 75fa strb r2, [r7, #23]
800d8f8: 461a mov r2, r3
800d8fa: 68bb ldr r3, [r7, #8]
800d8fc: 4413 add r3, r2
800d8fe: 2203 movs r2, #3
800d900: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d902: e012 b.n 800d92a <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
800d904: 68fb ldr r3, [r7, #12]
800d906: 1c5a adds r2, r3, #1
800d908: 60fa str r2, [r7, #12]
800d90a: 7dfa ldrb r2, [r7, #23]
800d90c: 1c51 adds r1, r2, #1
800d90e: 75f9 strb r1, [r7, #23]
800d910: 4611 mov r1, r2
800d912: 68ba ldr r2, [r7, #8]
800d914: 440a add r2, r1
800d916: 781b ldrb r3, [r3, #0]
800d918: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
800d91a: 7dfb ldrb r3, [r7, #23]
800d91c: 1c5a adds r2, r3, #1
800d91e: 75fa strb r2, [r7, #23]
800d920: 461a mov r2, r3
800d922: 68bb ldr r3, [r7, #8]
800d924: 4413 add r3, r2
800d926: 2200 movs r2, #0
800d928: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d92a: 68fb ldr r3, [r7, #12]
800d92c: 781b ldrb r3, [r3, #0]
800d92e: 2b00 cmp r3, #0
800d930: d1e8 bne.n 800d904 <USBD_GetString+0x4e>
}
}
}
800d932: bf00 nop
800d934: 3718 adds r7, #24
800d936: 46bd mov sp, r7
800d938: bd80 pop {r7, pc}
0800d93a <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800d93a: b480 push {r7}
800d93c: b085 sub sp, #20
800d93e: af00 add r7, sp, #0
800d940: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800d942: 2300 movs r3, #0
800d944: 73fb strb r3, [r7, #15]
while (*buf != '\0')
800d946: e005 b.n 800d954 <USBD_GetLen+0x1a>
{
len++;
800d948: 7bfb ldrb r3, [r7, #15]
800d94a: 3301 adds r3, #1
800d94c: 73fb strb r3, [r7, #15]
buf++;
800d94e: 687b ldr r3, [r7, #4]
800d950: 3301 adds r3, #1
800d952: 607b str r3, [r7, #4]
while (*buf != '\0')
800d954: 687b ldr r3, [r7, #4]
800d956: 781b ldrb r3, [r3, #0]
800d958: 2b00 cmp r3, #0
800d95a: d1f5 bne.n 800d948 <USBD_GetLen+0xe>
}
return len;
800d95c: 7bfb ldrb r3, [r7, #15]
}
800d95e: 4618 mov r0, r3
800d960: 3714 adds r7, #20
800d962: 46bd mov sp, r7
800d964: bc80 pop {r7}
800d966: 4770 bx lr
0800d968 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d968: b580 push {r7, lr}
800d96a: b084 sub sp, #16
800d96c: af00 add r7, sp, #0
800d96e: 60f8 str r0, [r7, #12]
800d970: 60b9 str r1, [r7, #8]
800d972: 4613 mov r3, r2
800d974: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
800d976: 68fb ldr r3, [r7, #12]
800d978: 2202 movs r2, #2
800d97a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800d97e: 88fa ldrh r2, [r7, #6]
800d980: 68fb ldr r3, [r7, #12]
800d982: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
800d984: 88fa ldrh r2, [r7, #6]
800d986: 68fb ldr r3, [r7, #12]
800d988: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d98a: 88fb ldrh r3, [r7, #6]
800d98c: 68ba ldr r2, [r7, #8]
800d98e: 2100 movs r1, #0
800d990: 68f8 ldr r0, [r7, #12]
800d992: f000 fce1 bl 800e358 <USBD_LL_Transmit>
return USBD_OK;
800d996: 2300 movs r3, #0
}
800d998: 4618 mov r0, r3
800d99a: 3710 adds r7, #16
800d99c: 46bd mov sp, r7
800d99e: bd80 pop {r7, pc}
0800d9a0 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d9a0: b580 push {r7, lr}
800d9a2: b084 sub sp, #16
800d9a4: af00 add r7, sp, #0
800d9a6: 60f8 str r0, [r7, #12]
800d9a8: 60b9 str r1, [r7, #8]
800d9aa: 4613 mov r3, r2
800d9ac: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d9ae: 88fb ldrh r3, [r7, #6]
800d9b0: 68ba ldr r2, [r7, #8]
800d9b2: 2100 movs r1, #0
800d9b4: 68f8 ldr r0, [r7, #12]
800d9b6: f000 fccf bl 800e358 <USBD_LL_Transmit>
return USBD_OK;
800d9ba: 2300 movs r3, #0
}
800d9bc: 4618 mov r0, r3
800d9be: 3710 adds r7, #16
800d9c0: 46bd mov sp, r7
800d9c2: bd80 pop {r7, pc}
0800d9c4 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d9c4: b580 push {r7, lr}
800d9c6: b084 sub sp, #16
800d9c8: af00 add r7, sp, #0
800d9ca: 60f8 str r0, [r7, #12]
800d9cc: 60b9 str r1, [r7, #8]
800d9ce: 4613 mov r3, r2
800d9d0: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
800d9d2: 68fb ldr r3, [r7, #12]
800d9d4: 2203 movs r2, #3
800d9d6: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
800d9da: 88fa ldrh r2, [r7, #6]
800d9dc: 68fb ldr r3, [r7, #12]
800d9de: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800d9e2: 88fa ldrh r2, [r7, #6]
800d9e4: 68fb ldr r3, [r7, #12]
800d9e6: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d9ea: 88fb ldrh r3, [r7, #6]
800d9ec: 68ba ldr r2, [r7, #8]
800d9ee: 2100 movs r1, #0
800d9f0: 68f8 ldr r0, [r7, #12]
800d9f2: f000 fcd4 bl 800e39e <USBD_LL_PrepareReceive>
return USBD_OK;
800d9f6: 2300 movs r3, #0
}
800d9f8: 4618 mov r0, r3
800d9fa: 3710 adds r7, #16
800d9fc: 46bd mov sp, r7
800d9fe: bd80 pop {r7, pc}
0800da00 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800da00: b580 push {r7, lr}
800da02: b084 sub sp, #16
800da04: af00 add r7, sp, #0
800da06: 60f8 str r0, [r7, #12]
800da08: 60b9 str r1, [r7, #8]
800da0a: 4613 mov r3, r2
800da0c: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800da0e: 88fb ldrh r3, [r7, #6]
800da10: 68ba ldr r2, [r7, #8]
800da12: 2100 movs r1, #0
800da14: 68f8 ldr r0, [r7, #12]
800da16: f000 fcc2 bl 800e39e <USBD_LL_PrepareReceive>
return USBD_OK;
800da1a: 2300 movs r3, #0
}
800da1c: 4618 mov r0, r3
800da1e: 3710 adds r7, #16
800da20: 46bd mov sp, r7
800da22: bd80 pop {r7, pc}
0800da24 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800da24: b580 push {r7, lr}
800da26: b082 sub sp, #8
800da28: af00 add r7, sp, #0
800da2a: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800da2c: 687b ldr r3, [r7, #4]
800da2e: 2204 movs r2, #4
800da30: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800da34: 2300 movs r3, #0
800da36: 2200 movs r2, #0
800da38: 2100 movs r1, #0
800da3a: 6878 ldr r0, [r7, #4]
800da3c: f000 fc8c bl 800e358 <USBD_LL_Transmit>
return USBD_OK;
800da40: 2300 movs r3, #0
}
800da42: 4618 mov r0, r3
800da44: 3708 adds r7, #8
800da46: 46bd mov sp, r7
800da48: bd80 pop {r7, pc}
0800da4a <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800da4a: b580 push {r7, lr}
800da4c: b082 sub sp, #8
800da4e: af00 add r7, sp, #0
800da50: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800da52: 687b ldr r3, [r7, #4]
800da54: 2205 movs r2, #5
800da56: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800da5a: 2300 movs r3, #0
800da5c: 2200 movs r2, #0
800da5e: 2100 movs r1, #0
800da60: 6878 ldr r0, [r7, #4]
800da62: f000 fc9c bl 800e39e <USBD_LL_PrepareReceive>
return USBD_OK;
800da66: 2300 movs r3, #0
}
800da68: 4618 mov r0, r3
800da6a: 3708 adds r7, #8
800da6c: 46bd mov sp, r7
800da6e: bd80 pop {r7, pc}
0800da70 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800da70: b580 push {r7, lr}
800da72: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
800da74: 2200 movs r2, #0
800da76: 4912 ldr r1, [pc, #72] @ (800dac0 <MX_USB_DEVICE_Init+0x50>)
800da78: 4812 ldr r0, [pc, #72] @ (800dac4 <MX_USB_DEVICE_Init+0x54>)
800da7a: f7fe ff62 bl 800c942 <USBD_Init>
800da7e: 4603 mov r3, r0
800da80: 2b00 cmp r3, #0
800da82: d001 beq.n 800da88 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
800da84: f7f5 fe6c bl 8003760 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
800da88: 490f ldr r1, [pc, #60] @ (800dac8 <MX_USB_DEVICE_Init+0x58>)
800da8a: 480e ldr r0, [pc, #56] @ (800dac4 <MX_USB_DEVICE_Init+0x54>)
800da8c: f7fe ff84 bl 800c998 <USBD_RegisterClass>
800da90: 4603 mov r3, r0
800da92: 2b00 cmp r3, #0
800da94: d001 beq.n 800da9a <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
800da96: f7f5 fe63 bl 8003760 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
800da9a: 490c ldr r1, [pc, #48] @ (800dacc <MX_USB_DEVICE_Init+0x5c>)
800da9c: 4809 ldr r0, [pc, #36] @ (800dac4 <MX_USB_DEVICE_Init+0x54>)
800da9e: f7fe feb5 bl 800c80c <USBD_CDC_RegisterInterface>
800daa2: 4603 mov r3, r0
800daa4: 2b00 cmp r3, #0
800daa6: d001 beq.n 800daac <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
800daa8: f7f5 fe5a bl 8003760 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
800daac: 4805 ldr r0, [pc, #20] @ (800dac4 <MX_USB_DEVICE_Init+0x54>)
800daae: f7fe ff8c bl 800c9ca <USBD_Start>
800dab2: 4603 mov r3, r0
800dab4: 2b00 cmp r3, #0
800dab6: d001 beq.n 800dabc <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
800dab8: f7f5 fe52 bl 8003760 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
800dabc: bf00 nop
800dabe: bd80 pop {r7, pc}
800dac0: 2000013c .word 0x2000013c
800dac4: 2000049c .word 0x2000049c
800dac8: 20000028 .word 0x20000028
800dacc: 2000012c .word 0x2000012c
0800dad0 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
800dad0: b480 push {r7}
800dad2: b085 sub sp, #20
800dad4: af00 add r7, sp, #0
800dad6: 6078 str r0, [r7, #4]
800dad8: 6039 str r1, [r7, #0]
while (len--) {
800dada: e01e b.n 800db1a <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
800dadc: 4b14 ldr r3, [pc, #80] @ (800db30 <fifo_push+0x60>)
800dade: 881b ldrh r3, [r3, #0]
800dae0: b29b uxth r3, r3
800dae2: 3301 adds r3, #1
800dae4: b29b uxth r3, r3
800dae6: b2db uxtb r3, r3
800dae8: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
800daea: 89fa ldrh r2, [r7, #14]
800daec: 4b11 ldr r3, [pc, #68] @ (800db34 <fifo_push+0x64>)
800daee: 881b ldrh r3, [r3, #0]
800daf0: b29b uxth r3, r3
800daf2: b2db uxtb r3, r3
800daf4: 429a cmp r2, r3
800daf6: d103 bne.n 800db00 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
800daf8: 687b ldr r3, [r7, #4]
800dafa: 3301 adds r3, #1
800dafc: 607b str r3, [r7, #4]
continue;
800dafe: e00c b.n 800db1a <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
800db00: 687b ldr r3, [r7, #4]
800db02: 1c5a adds r2, r3, #1
800db04: 607a str r2, [r7, #4]
800db06: 4a0a ldr r2, [pc, #40] @ (800db30 <fifo_push+0x60>)
800db08: 8812 ldrh r2, [r2, #0]
800db0a: b292 uxth r2, r2
800db0c: b2d2 uxtb r2, r2
800db0e: 7819 ldrb r1, [r3, #0]
800db10: 4b09 ldr r3, [pc, #36] @ (800db38 <fifo_push+0x68>)
800db12: 5499 strb r1, [r3, r2]
rx_head = next;
800db14: 4a06 ldr r2, [pc, #24] @ (800db30 <fifo_push+0x60>)
800db16: 89fb ldrh r3, [r7, #14]
800db18: 8013 strh r3, [r2, #0]
while (len--) {
800db1a: 683b ldr r3, [r7, #0]
800db1c: 1e5a subs r2, r3, #1
800db1e: 603a str r2, [r7, #0]
800db20: 2b00 cmp r3, #0
800db22: d1db bne.n 800dadc <fifo_push+0xc>
}
}
800db24: bf00 nop
800db26: bf00 nop
800db28: 3714 adds r7, #20
800db2a: 46bd mov sp, r7
800db2c: bc80 pop {r7}
800db2e: 4770 bx lr
800db30: 20001060 .word 0x20001060
800db34: 20001062 .word 0x20001062
800db38: 20000f60 .word 0x20000f60
0800db3c <CDC_Available>:
uint32_t CDC_Available(void) {
800db3c: b480 push {r7}
800db3e: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
800db40: 4b06 ldr r3, [pc, #24] @ (800db5c <CDC_Available+0x20>)
800db42: 881b ldrh r3, [r3, #0]
800db44: b29a uxth r2, r3
800db46: 4b06 ldr r3, [pc, #24] @ (800db60 <CDC_Available+0x24>)
800db48: 881b ldrh r3, [r3, #0]
800db4a: b29b uxth r3, r3
800db4c: 1ad3 subs r3, r2, r3
800db4e: b29b uxth r3, r3
800db50: b2db uxtb r3, r3
}
800db52: 4618 mov r0, r3
800db54: 46bd mov sp, r7
800db56: bc80 pop {r7}
800db58: 4770 bx lr
800db5a: bf00 nop
800db5c: 20001060 .word 0x20001060
800db60: 20001062 .word 0x20001062
0800db64 <CDC_ReadByte>:
int CDC_ReadByte(void) {
800db64: b480 push {r7}
800db66: b083 sub sp, #12
800db68: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
800db6a: 4b10 ldr r3, [pc, #64] @ (800dbac <CDC_ReadByte+0x48>)
800db6c: 881b ldrh r3, [r3, #0]
800db6e: b29a uxth r2, r3
800db70: 4b0f ldr r3, [pc, #60] @ (800dbb0 <CDC_ReadByte+0x4c>)
800db72: 881b ldrh r3, [r3, #0]
800db74: b29b uxth r3, r3
800db76: 429a cmp r2, r3
800db78: d102 bne.n 800db80 <CDC_ReadByte+0x1c>
800db7a: f04f 33ff mov.w r3, #4294967295
800db7e: e010 b.n 800dba2 <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
800db80: 4b0a ldr r3, [pc, #40] @ (800dbac <CDC_ReadByte+0x48>)
800db82: 881b ldrh r3, [r3, #0]
800db84: b29b uxth r3, r3
800db86: b2db uxtb r3, r3
800db88: 4a0a ldr r2, [pc, #40] @ (800dbb4 <CDC_ReadByte+0x50>)
800db8a: 5cd3 ldrb r3, [r2, r3]
800db8c: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
800db8e: 4b07 ldr r3, [pc, #28] @ (800dbac <CDC_ReadByte+0x48>)
800db90: 881b ldrh r3, [r3, #0]
800db92: b29b uxth r3, r3
800db94: 3301 adds r3, #1
800db96: b29b uxth r3, r3
800db98: b2db uxtb r3, r3
800db9a: b29a uxth r2, r3
800db9c: 4b03 ldr r3, [pc, #12] @ (800dbac <CDC_ReadByte+0x48>)
800db9e: 801a strh r2, [r3, #0]
return b;
800dba0: 687b ldr r3, [r7, #4]
}
800dba2: 4618 mov r0, r3
800dba4: 370c adds r7, #12
800dba6: 46bd mov sp, r7
800dba8: bc80 pop {r7}
800dbaa: 4770 bx lr
800dbac: 20001062 .word 0x20001062
800dbb0: 20001060 .word 0x20001060
800dbb4: 20000f60 .word 0x20000f60
0800dbb8 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
800dbb8: b580 push {r7, lr}
800dbba: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
800dbbc: 2200 movs r2, #0
800dbbe: 4905 ldr r1, [pc, #20] @ (800dbd4 <CDC_Init_FS+0x1c>)
800dbc0: 4805 ldr r0, [pc, #20] @ (800dbd8 <CDC_Init_FS+0x20>)
800dbc2: f7fe fe39 bl 800c838 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
800dbc6: 4905 ldr r1, [pc, #20] @ (800dbdc <CDC_Init_FS+0x24>)
800dbc8: 4803 ldr r0, [pc, #12] @ (800dbd8 <CDC_Init_FS+0x20>)
800dbca: f7fe fe4e bl 800c86a <USBD_CDC_SetRxBuffer>
return (USBD_OK);
800dbce: 2300 movs r3, #0
/* USER CODE END 3 */
}
800dbd0: 4618 mov r0, r3
800dbd2: bd80 pop {r7, pc}
800dbd4: 20000b60 .word 0x20000b60
800dbd8: 2000049c .word 0x2000049c
800dbdc: 20000760 .word 0x20000760
0800dbe0 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
800dbe0: b480 push {r7}
800dbe2: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
800dbe4: 2300 movs r3, #0
/* USER CODE END 4 */
}
800dbe6: 4618 mov r0, r3
800dbe8: 46bd mov sp, r7
800dbea: bc80 pop {r7}
800dbec: 4770 bx lr
...
0800dbf0 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800dbf0: b480 push {r7}
800dbf2: b083 sub sp, #12
800dbf4: af00 add r7, sp, #0
800dbf6: 4603 mov r3, r0
800dbf8: 6039 str r1, [r7, #0]
800dbfa: 71fb strb r3, [r7, #7]
800dbfc: 4613 mov r3, r2
800dbfe: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800dc00: 79fb ldrb r3, [r7, #7]
800dc02: 2b23 cmp r3, #35 @ 0x23
800dc04: d84a bhi.n 800dc9c <CDC_Control_FS+0xac>
800dc06: a201 add r2, pc, #4 @ (adr r2, 800dc0c <CDC_Control_FS+0x1c>)
800dc08: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800dc0c: 0800dc9d .word 0x0800dc9d
800dc10: 0800dc9d .word 0x0800dc9d
800dc14: 0800dc9d .word 0x0800dc9d
800dc18: 0800dc9d .word 0x0800dc9d
800dc1c: 0800dc9d .word 0x0800dc9d
800dc20: 0800dc9d .word 0x0800dc9d
800dc24: 0800dc9d .word 0x0800dc9d
800dc28: 0800dc9d .word 0x0800dc9d
800dc2c: 0800dc9d .word 0x0800dc9d
800dc30: 0800dc9d .word 0x0800dc9d
800dc34: 0800dc9d .word 0x0800dc9d
800dc38: 0800dc9d .word 0x0800dc9d
800dc3c: 0800dc9d .word 0x0800dc9d
800dc40: 0800dc9d .word 0x0800dc9d
800dc44: 0800dc9d .word 0x0800dc9d
800dc48: 0800dc9d .word 0x0800dc9d
800dc4c: 0800dc9d .word 0x0800dc9d
800dc50: 0800dc9d .word 0x0800dc9d
800dc54: 0800dc9d .word 0x0800dc9d
800dc58: 0800dc9d .word 0x0800dc9d
800dc5c: 0800dc9d .word 0x0800dc9d
800dc60: 0800dc9d .word 0x0800dc9d
800dc64: 0800dc9d .word 0x0800dc9d
800dc68: 0800dc9d .word 0x0800dc9d
800dc6c: 0800dc9d .word 0x0800dc9d
800dc70: 0800dc9d .word 0x0800dc9d
800dc74: 0800dc9d .word 0x0800dc9d
800dc78: 0800dc9d .word 0x0800dc9d
800dc7c: 0800dc9d .word 0x0800dc9d
800dc80: 0800dc9d .word 0x0800dc9d
800dc84: 0800dc9d .word 0x0800dc9d
800dc88: 0800dc9d .word 0x0800dc9d
800dc8c: 0800dc9d .word 0x0800dc9d
800dc90: 0800dc9d .word 0x0800dc9d
800dc94: 0800dc9d .word 0x0800dc9d
800dc98: 0800dc9d .word 0x0800dc9d
case CDC_SEND_BREAK:
break;
default:
break;
800dc9c: bf00 nop
}
return (USBD_OK);
800dc9e: 2300 movs r3, #0
/* USER CODE END 5 */
}
800dca0: 4618 mov r0, r3
800dca2: 370c adds r7, #12
800dca4: 46bd mov sp, r7
800dca6: bc80 pop {r7}
800dca8: 4770 bx lr
800dcaa: bf00 nop
0800dcac <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
800dcac: b580 push {r7, lr}
800dcae: b082 sub sp, #8
800dcb0: af00 add r7, sp, #0
800dcb2: 6078 str r0, [r7, #4]
800dcb4: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
800dcb6: 683b ldr r3, [r7, #0]
800dcb8: 681b ldr r3, [r3, #0]
800dcba: 2b00 cmp r3, #0
800dcbc: d005 beq.n 800dcca <CDC_Receive_FS+0x1e>
800dcbe: 683b ldr r3, [r7, #0]
800dcc0: 681b ldr r3, [r3, #0]
800dcc2: 4619 mov r1, r3
800dcc4: 6878 ldr r0, [r7, #4]
800dcc6: f7ff ff03 bl 800dad0 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
800dcca: 6879 ldr r1, [r7, #4]
800dccc: 4805 ldr r0, [pc, #20] @ (800dce4 <CDC_Receive_FS+0x38>)
800dcce: f7fe fdcc bl 800c86a <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
800dcd2: 4804 ldr r0, [pc, #16] @ (800dce4 <CDC_Receive_FS+0x38>)
800dcd4: f7fe fe0b bl 800c8ee <USBD_CDC_ReceivePacket>
return (USBD_OK);
800dcd8: 2300 movs r3, #0
/* USER CODE END 6 */
}
800dcda: 4618 mov r0, r3
800dcdc: 3708 adds r7, #8
800dcde: 46bd mov sp, r7
800dce0: bd80 pop {r7, pc}
800dce2: bf00 nop
800dce4: 2000049c .word 0x2000049c
0800dce8 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
800dce8: b580 push {r7, lr}
800dcea: b084 sub sp, #16
800dcec: af00 add r7, sp, #0
800dcee: 6078 str r0, [r7, #4]
800dcf0: 460b mov r3, r1
800dcf2: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
800dcf4: 2300 movs r3, #0
800dcf6: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
800dcf8: 4b0d ldr r3, [pc, #52] @ (800dd30 <CDC_Transmit_FS+0x48>)
800dcfa: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800dcfe: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
800dd00: 68bb ldr r3, [r7, #8]
800dd02: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800dd06: 2b00 cmp r3, #0
800dd08: d001 beq.n 800dd0e <CDC_Transmit_FS+0x26>
return USBD_BUSY;
800dd0a: 2301 movs r3, #1
800dd0c: e00b b.n 800dd26 <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800dd0e: 887b ldrh r3, [r7, #2]
800dd10: 461a mov r2, r3
800dd12: 6879 ldr r1, [r7, #4]
800dd14: 4806 ldr r0, [pc, #24] @ (800dd30 <CDC_Transmit_FS+0x48>)
800dd16: f7fe fd8f bl 800c838 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800dd1a: 4805 ldr r0, [pc, #20] @ (800dd30 <CDC_Transmit_FS+0x48>)
800dd1c: f7fe fdb8 bl 800c890 <USBD_CDC_TransmitPacket>
800dd20: 4603 mov r3, r0
800dd22: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
800dd24: 7bfb ldrb r3, [r7, #15]
}
800dd26: 4618 mov r0, r3
800dd28: 3710 adds r7, #16
800dd2a: 46bd mov sp, r7
800dd2c: bd80 pop {r7, pc}
800dd2e: bf00 nop
800dd30: 2000049c .word 0x2000049c
0800dd34 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dd34: b480 push {r7}
800dd36: b083 sub sp, #12
800dd38: af00 add r7, sp, #0
800dd3a: 4603 mov r3, r0
800dd3c: 6039 str r1, [r7, #0]
800dd3e: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800dd40: 683b ldr r3, [r7, #0]
800dd42: 2212 movs r2, #18
800dd44: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
800dd46: 4b03 ldr r3, [pc, #12] @ (800dd54 <USBD_FS_DeviceDescriptor+0x20>)
}
800dd48: 4618 mov r0, r3
800dd4a: 370c adds r7, #12
800dd4c: 46bd mov sp, r7
800dd4e: bc80 pop {r7}
800dd50: 4770 bx lr
800dd52: bf00 nop
800dd54: 20000158 .word 0x20000158
0800dd58 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dd58: b480 push {r7}
800dd5a: b083 sub sp, #12
800dd5c: af00 add r7, sp, #0
800dd5e: 4603 mov r3, r0
800dd60: 6039 str r1, [r7, #0]
800dd62: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
800dd64: 683b ldr r3, [r7, #0]
800dd66: 2204 movs r2, #4
800dd68: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
800dd6a: 4b03 ldr r3, [pc, #12] @ (800dd78 <USBD_FS_LangIDStrDescriptor+0x20>)
}
800dd6c: 4618 mov r0, r3
800dd6e: 370c adds r7, #12
800dd70: 46bd mov sp, r7
800dd72: bc80 pop {r7}
800dd74: 4770 bx lr
800dd76: bf00 nop
800dd78: 2000016c .word 0x2000016c
0800dd7c <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dd7c: b580 push {r7, lr}
800dd7e: b082 sub sp, #8
800dd80: af00 add r7, sp, #0
800dd82: 4603 mov r3, r0
800dd84: 6039 str r1, [r7, #0]
800dd86: 71fb strb r3, [r7, #7]
if(speed == 0)
800dd88: 79fb ldrb r3, [r7, #7]
800dd8a: 2b00 cmp r3, #0
800dd8c: d105 bne.n 800dd9a <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800dd8e: 683a ldr r2, [r7, #0]
800dd90: 4907 ldr r1, [pc, #28] @ (800ddb0 <USBD_FS_ProductStrDescriptor+0x34>)
800dd92: 4808 ldr r0, [pc, #32] @ (800ddb4 <USBD_FS_ProductStrDescriptor+0x38>)
800dd94: f7ff fd8f bl 800d8b6 <USBD_GetString>
800dd98: e004 b.n 800dda4 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800dd9a: 683a ldr r2, [r7, #0]
800dd9c: 4904 ldr r1, [pc, #16] @ (800ddb0 <USBD_FS_ProductStrDescriptor+0x34>)
800dd9e: 4805 ldr r0, [pc, #20] @ (800ddb4 <USBD_FS_ProductStrDescriptor+0x38>)
800dda0: f7ff fd89 bl 800d8b6 <USBD_GetString>
}
return USBD_StrDesc;
800dda4: 4b02 ldr r3, [pc, #8] @ (800ddb0 <USBD_FS_ProductStrDescriptor+0x34>)
}
800dda6: 4618 mov r0, r3
800dda8: 3708 adds r7, #8
800ddaa: 46bd mov sp, r7
800ddac: bd80 pop {r7, pc}
800ddae: bf00 nop
800ddb0: 20001064 .word 0x20001064
800ddb4: 0800f460 .word 0x0800f460
0800ddb8 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800ddb8: b580 push {r7, lr}
800ddba: b082 sub sp, #8
800ddbc: af00 add r7, sp, #0
800ddbe: 4603 mov r3, r0
800ddc0: 6039 str r1, [r7, #0]
800ddc2: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800ddc4: 683a ldr r2, [r7, #0]
800ddc6: 4904 ldr r1, [pc, #16] @ (800ddd8 <USBD_FS_ManufacturerStrDescriptor+0x20>)
800ddc8: 4804 ldr r0, [pc, #16] @ (800dddc <USBD_FS_ManufacturerStrDescriptor+0x24>)
800ddca: f7ff fd74 bl 800d8b6 <USBD_GetString>
return USBD_StrDesc;
800ddce: 4b02 ldr r3, [pc, #8] @ (800ddd8 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800ddd0: 4618 mov r0, r3
800ddd2: 3708 adds r7, #8
800ddd4: 46bd mov sp, r7
800ddd6: bd80 pop {r7, pc}
800ddd8: 20001064 .word 0x20001064
800dddc: 0800f478 .word 0x0800f478
0800dde0 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dde0: b580 push {r7, lr}
800dde2: b082 sub sp, #8
800dde4: af00 add r7, sp, #0
800dde6: 4603 mov r3, r0
800dde8: 6039 str r1, [r7, #0]
800ddea: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800ddec: 683b ldr r3, [r7, #0]
800ddee: 221a movs r2, #26
800ddf0: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800ddf2: f000 f843 bl 800de7c <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800ddf6: 4b02 ldr r3, [pc, #8] @ (800de00 <USBD_FS_SerialStrDescriptor+0x20>)
}
800ddf8: 4618 mov r0, r3
800ddfa: 3708 adds r7, #8
800ddfc: 46bd mov sp, r7
800ddfe: bd80 pop {r7, pc}
800de00: 20000170 .word 0x20000170
0800de04 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800de04: b580 push {r7, lr}
800de06: b082 sub sp, #8
800de08: af00 add r7, sp, #0
800de0a: 4603 mov r3, r0
800de0c: 6039 str r1, [r7, #0]
800de0e: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800de10: 79fb ldrb r3, [r7, #7]
800de12: 2b00 cmp r3, #0
800de14: d105 bne.n 800de22 <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800de16: 683a ldr r2, [r7, #0]
800de18: 4907 ldr r1, [pc, #28] @ (800de38 <USBD_FS_ConfigStrDescriptor+0x34>)
800de1a: 4808 ldr r0, [pc, #32] @ (800de3c <USBD_FS_ConfigStrDescriptor+0x38>)
800de1c: f7ff fd4b bl 800d8b6 <USBD_GetString>
800de20: e004 b.n 800de2c <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800de22: 683a ldr r2, [r7, #0]
800de24: 4904 ldr r1, [pc, #16] @ (800de38 <USBD_FS_ConfigStrDescriptor+0x34>)
800de26: 4805 ldr r0, [pc, #20] @ (800de3c <USBD_FS_ConfigStrDescriptor+0x38>)
800de28: f7ff fd45 bl 800d8b6 <USBD_GetString>
}
return USBD_StrDesc;
800de2c: 4b02 ldr r3, [pc, #8] @ (800de38 <USBD_FS_ConfigStrDescriptor+0x34>)
}
800de2e: 4618 mov r0, r3
800de30: 3708 adds r7, #8
800de32: 46bd mov sp, r7
800de34: bd80 pop {r7, pc}
800de36: bf00 nop
800de38: 20001064 .word 0x20001064
800de3c: 0800f48c .word 0x0800f48c
0800de40 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800de40: b580 push {r7, lr}
800de42: b082 sub sp, #8
800de44: af00 add r7, sp, #0
800de46: 4603 mov r3, r0
800de48: 6039 str r1, [r7, #0]
800de4a: 71fb strb r3, [r7, #7]
if(speed == 0)
800de4c: 79fb ldrb r3, [r7, #7]
800de4e: 2b00 cmp r3, #0
800de50: d105 bne.n 800de5e <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800de52: 683a ldr r2, [r7, #0]
800de54: 4907 ldr r1, [pc, #28] @ (800de74 <USBD_FS_InterfaceStrDescriptor+0x34>)
800de56: 4808 ldr r0, [pc, #32] @ (800de78 <USBD_FS_InterfaceStrDescriptor+0x38>)
800de58: f7ff fd2d bl 800d8b6 <USBD_GetString>
800de5c: e004 b.n 800de68 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800de5e: 683a ldr r2, [r7, #0]
800de60: 4904 ldr r1, [pc, #16] @ (800de74 <USBD_FS_InterfaceStrDescriptor+0x34>)
800de62: 4805 ldr r0, [pc, #20] @ (800de78 <USBD_FS_InterfaceStrDescriptor+0x38>)
800de64: f7ff fd27 bl 800d8b6 <USBD_GetString>
}
return USBD_StrDesc;
800de68: 4b02 ldr r3, [pc, #8] @ (800de74 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
800de6a: 4618 mov r0, r3
800de6c: 3708 adds r7, #8
800de6e: 46bd mov sp, r7
800de70: bd80 pop {r7, pc}
800de72: bf00 nop
800de74: 20001064 .word 0x20001064
800de78: 0800f498 .word 0x0800f498
0800de7c <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
800de7c: b580 push {r7, lr}
800de7e: b084 sub sp, #16
800de80: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800de82: 4b0f ldr r3, [pc, #60] @ (800dec0 <Get_SerialNum+0x44>)
800de84: 681b ldr r3, [r3, #0]
800de86: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
800de88: 4b0e ldr r3, [pc, #56] @ (800dec4 <Get_SerialNum+0x48>)
800de8a: 681b ldr r3, [r3, #0]
800de8c: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800de8e: 4b0e ldr r3, [pc, #56] @ (800dec8 <Get_SerialNum+0x4c>)
800de90: 681b ldr r3, [r3, #0]
800de92: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800de94: 68fa ldr r2, [r7, #12]
800de96: 687b ldr r3, [r7, #4]
800de98: 4413 add r3, r2
800de9a: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800de9c: 68fb ldr r3, [r7, #12]
800de9e: 2b00 cmp r3, #0
800dea0: d009 beq.n 800deb6 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800dea2: 2208 movs r2, #8
800dea4: 4909 ldr r1, [pc, #36] @ (800decc <Get_SerialNum+0x50>)
800dea6: 68f8 ldr r0, [r7, #12]
800dea8: f000 f814 bl 800ded4 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800deac: 2204 movs r2, #4
800deae: 4908 ldr r1, [pc, #32] @ (800ded0 <Get_SerialNum+0x54>)
800deb0: 68b8 ldr r0, [r7, #8]
800deb2: f000 f80f bl 800ded4 <IntToUnicode>
}
}
800deb6: bf00 nop
800deb8: 3710 adds r7, #16
800deba: 46bd mov sp, r7
800debc: bd80 pop {r7, pc}
800debe: bf00 nop
800dec0: 1ffff7e8 .word 0x1ffff7e8
800dec4: 1ffff7ec .word 0x1ffff7ec
800dec8: 1ffff7f0 .word 0x1ffff7f0
800decc: 20000172 .word 0x20000172
800ded0: 20000182 .word 0x20000182
0800ded4 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800ded4: b480 push {r7}
800ded6: b087 sub sp, #28
800ded8: af00 add r7, sp, #0
800deda: 60f8 str r0, [r7, #12]
800dedc: 60b9 str r1, [r7, #8]
800dede: 4613 mov r3, r2
800dee0: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800dee2: 2300 movs r3, #0
800dee4: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800dee6: 2300 movs r3, #0
800dee8: 75fb strb r3, [r7, #23]
800deea: e027 b.n 800df3c <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800deec: 68fb ldr r3, [r7, #12]
800deee: 0f1b lsrs r3, r3, #28
800def0: 2b09 cmp r3, #9
800def2: d80b bhi.n 800df0c <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800def4: 68fb ldr r3, [r7, #12]
800def6: 0f1b lsrs r3, r3, #28
800def8: b2da uxtb r2, r3
800defa: 7dfb ldrb r3, [r7, #23]
800defc: 005b lsls r3, r3, #1
800defe: 4619 mov r1, r3
800df00: 68bb ldr r3, [r7, #8]
800df02: 440b add r3, r1
800df04: 3230 adds r2, #48 @ 0x30
800df06: b2d2 uxtb r2, r2
800df08: 701a strb r2, [r3, #0]
800df0a: e00a b.n 800df22 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800df0c: 68fb ldr r3, [r7, #12]
800df0e: 0f1b lsrs r3, r3, #28
800df10: b2da uxtb r2, r3
800df12: 7dfb ldrb r3, [r7, #23]
800df14: 005b lsls r3, r3, #1
800df16: 4619 mov r1, r3
800df18: 68bb ldr r3, [r7, #8]
800df1a: 440b add r3, r1
800df1c: 3237 adds r2, #55 @ 0x37
800df1e: b2d2 uxtb r2, r2
800df20: 701a strb r2, [r3, #0]
}
value = value << 4;
800df22: 68fb ldr r3, [r7, #12]
800df24: 011b lsls r3, r3, #4
800df26: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800df28: 7dfb ldrb r3, [r7, #23]
800df2a: 005b lsls r3, r3, #1
800df2c: 3301 adds r3, #1
800df2e: 68ba ldr r2, [r7, #8]
800df30: 4413 add r3, r2
800df32: 2200 movs r2, #0
800df34: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800df36: 7dfb ldrb r3, [r7, #23]
800df38: 3301 adds r3, #1
800df3a: 75fb strb r3, [r7, #23]
800df3c: 7dfa ldrb r2, [r7, #23]
800df3e: 79fb ldrb r3, [r7, #7]
800df40: 429a cmp r2, r3
800df42: d3d3 bcc.n 800deec <IntToUnicode+0x18>
}
}
800df44: bf00 nop
800df46: bf00 nop
800df48: 371c adds r7, #28
800df4a: 46bd mov sp, r7
800df4c: bc80 pop {r7}
800df4e: 4770 bx lr
0800df50 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800df50: b580 push {r7, lr}
800df52: b084 sub sp, #16
800df54: af00 add r7, sp, #0
800df56: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800df58: 687b ldr r3, [r7, #4]
800df5a: 681b ldr r3, [r3, #0]
800df5c: 4a0d ldr r2, [pc, #52] @ (800df94 <HAL_PCD_MspInit+0x44>)
800df5e: 4293 cmp r3, r2
800df60: d113 bne.n 800df8a <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800df62: 4b0d ldr r3, [pc, #52] @ (800df98 <HAL_PCD_MspInit+0x48>)
800df64: 69db ldr r3, [r3, #28]
800df66: 4a0c ldr r2, [pc, #48] @ (800df98 <HAL_PCD_MspInit+0x48>)
800df68: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800df6c: 61d3 str r3, [r2, #28]
800df6e: 4b0a ldr r3, [pc, #40] @ (800df98 <HAL_PCD_MspInit+0x48>)
800df70: 69db ldr r3, [r3, #28]
800df72: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800df76: 60fb str r3, [r7, #12]
800df78: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800df7a: 2200 movs r2, #0
800df7c: 2100 movs r1, #0
800df7e: 2014 movs r0, #20
800df80: f7f7 fddb bl 8005b3a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800df84: 2014 movs r0, #20
800df86: f7f7 fdf4 bl 8005b72 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800df8a: bf00 nop
800df8c: 3710 adds r7, #16
800df8e: 46bd mov sp, r7
800df90: bd80 pop {r7, pc}
800df92: bf00 nop
800df94: 40005c00 .word 0x40005c00
800df98: 40021000 .word 0x40021000
0800df9c <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800df9c: b580 push {r7, lr}
800df9e: b082 sub sp, #8
800dfa0: af00 add r7, sp, #0
800dfa2: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800dfa4: 687b ldr r3, [r7, #4]
800dfa6: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800dfaa: 687b ldr r3, [r7, #4]
800dfac: f503 7326 add.w r3, r3, #664 @ 0x298
800dfb0: 4619 mov r1, r3
800dfb2: 4610 mov r0, r2
800dfb4: f7fe fd51 bl 800ca5a <USBD_LL_SetupStage>
}
800dfb8: bf00 nop
800dfba: 3708 adds r7, #8
800dfbc: 46bd mov sp, r7
800dfbe: bd80 pop {r7, pc}
0800dfc0 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800dfc0: b580 push {r7, lr}
800dfc2: b082 sub sp, #8
800dfc4: af00 add r7, sp, #0
800dfc6: 6078 str r0, [r7, #4]
800dfc8: 460b mov r3, r1
800dfca: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800dfcc: 687b ldr r3, [r7, #4]
800dfce: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800dfd2: 78fa ldrb r2, [r7, #3]
800dfd4: 6879 ldr r1, [r7, #4]
800dfd6: 4613 mov r3, r2
800dfd8: 009b lsls r3, r3, #2
800dfda: 4413 add r3, r2
800dfdc: 00db lsls r3, r3, #3
800dfde: 440b add r3, r1
800dfe0: f503 73b2 add.w r3, r3, #356 @ 0x164
800dfe4: 681a ldr r2, [r3, #0]
800dfe6: 78fb ldrb r3, [r7, #3]
800dfe8: 4619 mov r1, r3
800dfea: f7fe fd83 bl 800caf4 <USBD_LL_DataOutStage>
}
800dfee: bf00 nop
800dff0: 3708 adds r7, #8
800dff2: 46bd mov sp, r7
800dff4: bd80 pop {r7, pc}
0800dff6 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800dff6: b580 push {r7, lr}
800dff8: b082 sub sp, #8
800dffa: af00 add r7, sp, #0
800dffc: 6078 str r0, [r7, #4]
800dffe: 460b mov r3, r1
800e000: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800e002: 687b ldr r3, [r7, #4]
800e004: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800e008: 78fa ldrb r2, [r7, #3]
800e00a: 6879 ldr r1, [r7, #4]
800e00c: 4613 mov r3, r2
800e00e: 009b lsls r3, r3, #2
800e010: 4413 add r3, r2
800e012: 00db lsls r3, r3, #3
800e014: 440b add r3, r1
800e016: 3324 adds r3, #36 @ 0x24
800e018: 681a ldr r2, [r3, #0]
800e01a: 78fb ldrb r3, [r7, #3]
800e01c: 4619 mov r1, r3
800e01e: f7fe fdda bl 800cbd6 <USBD_LL_DataInStage>
}
800e022: bf00 nop
800e024: 3708 adds r7, #8
800e026: 46bd mov sp, r7
800e028: bd80 pop {r7, pc}
0800e02a <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800e02a: b580 push {r7, lr}
800e02c: b082 sub sp, #8
800e02e: af00 add r7, sp, #0
800e030: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800e032: 687b ldr r3, [r7, #4]
800e034: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800e038: 4618 mov r0, r3
800e03a: f7fe feea bl 800ce12 <USBD_LL_SOF>
}
800e03e: bf00 nop
800e040: 3708 adds r7, #8
800e042: 46bd mov sp, r7
800e044: bd80 pop {r7, pc}
0800e046 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800e046: b580 push {r7, lr}
800e048: b084 sub sp, #16
800e04a: af00 add r7, sp, #0
800e04c: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800e04e: 2301 movs r3, #1
800e050: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800e052: 687b ldr r3, [r7, #4]
800e054: 799b ldrb r3, [r3, #6]
800e056: 2b02 cmp r3, #2
800e058: d001 beq.n 800e05e <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800e05a: f7f5 fb81 bl 8003760 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800e05e: 687b ldr r3, [r7, #4]
800e060: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800e064: 7bfa ldrb r2, [r7, #15]
800e066: 4611 mov r1, r2
800e068: 4618 mov r0, r3
800e06a: f7fe fe9a bl 800cda2 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800e06e: 687b ldr r3, [r7, #4]
800e070: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800e074: 4618 mov r0, r3
800e076: f7fe fe53 bl 800cd20 <USBD_LL_Reset>
}
800e07a: bf00 nop
800e07c: 3710 adds r7, #16
800e07e: 46bd mov sp, r7
800e080: bd80 pop {r7, pc}
...
0800e084 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800e084: b580 push {r7, lr}
800e086: b082 sub sp, #8
800e088: af00 add r7, sp, #0
800e08a: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800e08c: 687b ldr r3, [r7, #4]
800e08e: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800e092: 4618 mov r0, r3
800e094: f7fe fe94 bl 800cdc0 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800e098: 687b ldr r3, [r7, #4]
800e09a: 7a9b ldrb r3, [r3, #10]
800e09c: 2b00 cmp r3, #0
800e09e: d005 beq.n 800e0ac <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800e0a0: 4b04 ldr r3, [pc, #16] @ (800e0b4 <HAL_PCD_SuspendCallback+0x30>)
800e0a2: 691b ldr r3, [r3, #16]
800e0a4: 4a03 ldr r2, [pc, #12] @ (800e0b4 <HAL_PCD_SuspendCallback+0x30>)
800e0a6: f043 0306 orr.w r3, r3, #6
800e0aa: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800e0ac: bf00 nop
800e0ae: 3708 adds r7, #8
800e0b0: 46bd mov sp, r7
800e0b2: bd80 pop {r7, pc}
800e0b4: e000ed00 .word 0xe000ed00
0800e0b8 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800e0b8: b580 push {r7, lr}
800e0ba: b082 sub sp, #8
800e0bc: af00 add r7, sp, #0
800e0be: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800e0c0: 687b ldr r3, [r7, #4]
800e0c2: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800e0c6: 4618 mov r0, r3
800e0c8: f7fe fe8e bl 800cde8 <USBD_LL_Resume>
}
800e0cc: bf00 nop
800e0ce: 3708 adds r7, #8
800e0d0: 46bd mov sp, r7
800e0d2: bd80 pop {r7, pc}
0800e0d4 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800e0d4: b580 push {r7, lr}
800e0d6: b082 sub sp, #8
800e0d8: af00 add r7, sp, #0
800e0da: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800e0dc: 4a28 ldr r2, [pc, #160] @ (800e180 <USBD_LL_Init+0xac>)
800e0de: 687b ldr r3, [r7, #4]
800e0e0: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800e0e4: 687b ldr r3, [r7, #4]
800e0e6: 4a26 ldr r2, [pc, #152] @ (800e180 <USBD_LL_Init+0xac>)
800e0e8: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800e0ec: 4b24 ldr r3, [pc, #144] @ (800e180 <USBD_LL_Init+0xac>)
800e0ee: 4a25 ldr r2, [pc, #148] @ (800e184 <USBD_LL_Init+0xb0>)
800e0f0: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800e0f2: 4b23 ldr r3, [pc, #140] @ (800e180 <USBD_LL_Init+0xac>)
800e0f4: 2208 movs r2, #8
800e0f6: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800e0f8: 4b21 ldr r3, [pc, #132] @ (800e180 <USBD_LL_Init+0xac>)
800e0fa: 2202 movs r2, #2
800e0fc: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800e0fe: 4b20 ldr r3, [pc, #128] @ (800e180 <USBD_LL_Init+0xac>)
800e100: 2200 movs r2, #0
800e102: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800e104: 4b1e ldr r3, [pc, #120] @ (800e180 <USBD_LL_Init+0xac>)
800e106: 2200 movs r2, #0
800e108: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800e10a: 4b1d ldr r3, [pc, #116] @ (800e180 <USBD_LL_Init+0xac>)
800e10c: 2200 movs r2, #0
800e10e: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800e110: 481b ldr r0, [pc, #108] @ (800e180 <USBD_LL_Init+0xac>)
800e112: f7f8 faf0 bl 80066f6 <HAL_PCD_Init>
800e116: 4603 mov r3, r0
800e118: 2b00 cmp r3, #0
800e11a: d001 beq.n 800e120 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800e11c: f7f5 fb20 bl 8003760 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800e120: 687b ldr r3, [r7, #4]
800e122: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e126: 2318 movs r3, #24
800e128: 2200 movs r2, #0
800e12a: 2100 movs r1, #0
800e12c: f7fa f801 bl 8008132 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800e130: 687b ldr r3, [r7, #4]
800e132: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e136: 2358 movs r3, #88 @ 0x58
800e138: 2200 movs r2, #0
800e13a: 2180 movs r1, #128 @ 0x80
800e13c: f7f9 fff9 bl 8008132 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800e140: 687b ldr r3, [r7, #4]
800e142: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e146: 23c0 movs r3, #192 @ 0xc0
800e148: 2200 movs r2, #0
800e14a: 2181 movs r1, #129 @ 0x81
800e14c: f7f9 fff1 bl 8008132 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800e150: 687b ldr r3, [r7, #4]
800e152: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e156: f44f 7388 mov.w r3, #272 @ 0x110
800e15a: 2200 movs r2, #0
800e15c: 2101 movs r1, #1
800e15e: f7f9 ffe8 bl 8008132 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800e162: 687b ldr r3, [r7, #4]
800e164: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e168: f44f 7380 mov.w r3, #256 @ 0x100
800e16c: 2200 movs r2, #0
800e16e: 2182 movs r1, #130 @ 0x82
800e170: f7f9 ffdf bl 8008132 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800e174: 2300 movs r3, #0
}
800e176: 4618 mov r0, r3
800e178: 3708 adds r7, #8
800e17a: 46bd mov sp, r7
800e17c: bd80 pop {r7, pc}
800e17e: bf00 nop
800e180: 20001264 .word 0x20001264
800e184: 40005c00 .word 0x40005c00
0800e188 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800e188: b580 push {r7, lr}
800e18a: b084 sub sp, #16
800e18c: af00 add r7, sp, #0
800e18e: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800e190: 2300 movs r3, #0
800e192: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e194: 2300 movs r3, #0
800e196: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800e198: 687b ldr r3, [r7, #4]
800e19a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e19e: 4618 mov r0, r3
800e1a0: f7f8 fb9f bl 80068e2 <HAL_PCD_Start>
800e1a4: 4603 mov r3, r0
800e1a6: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e1a8: 7bfb ldrb r3, [r7, #15]
800e1aa: 4618 mov r0, r3
800e1ac: f000 f94e bl 800e44c <USBD_Get_USB_Status>
800e1b0: 4603 mov r3, r0
800e1b2: 73bb strb r3, [r7, #14]
return usb_status;
800e1b4: 7bbb ldrb r3, [r7, #14]
}
800e1b6: 4618 mov r0, r3
800e1b8: 3710 adds r7, #16
800e1ba: 46bd mov sp, r7
800e1bc: bd80 pop {r7, pc}
0800e1be <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800e1be: b580 push {r7, lr}
800e1c0: b084 sub sp, #16
800e1c2: af00 add r7, sp, #0
800e1c4: 6078 str r0, [r7, #4]
800e1c6: 4608 mov r0, r1
800e1c8: 4611 mov r1, r2
800e1ca: 461a mov r2, r3
800e1cc: 4603 mov r3, r0
800e1ce: 70fb strb r3, [r7, #3]
800e1d0: 460b mov r3, r1
800e1d2: 70bb strb r3, [r7, #2]
800e1d4: 4613 mov r3, r2
800e1d6: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800e1d8: 2300 movs r3, #0
800e1da: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e1dc: 2300 movs r3, #0
800e1de: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800e1e0: 687b ldr r3, [r7, #4]
800e1e2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e1e6: 78bb ldrb r3, [r7, #2]
800e1e8: 883a ldrh r2, [r7, #0]
800e1ea: 78f9 ldrb r1, [r7, #3]
800e1ec: f7f8 fcf3 bl 8006bd6 <HAL_PCD_EP_Open>
800e1f0: 4603 mov r3, r0
800e1f2: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e1f4: 7bfb ldrb r3, [r7, #15]
800e1f6: 4618 mov r0, r3
800e1f8: f000 f928 bl 800e44c <USBD_Get_USB_Status>
800e1fc: 4603 mov r3, r0
800e1fe: 73bb strb r3, [r7, #14]
return usb_status;
800e200: 7bbb ldrb r3, [r7, #14]
}
800e202: 4618 mov r0, r3
800e204: 3710 adds r7, #16
800e206: 46bd mov sp, r7
800e208: bd80 pop {r7, pc}
0800e20a <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e20a: b580 push {r7, lr}
800e20c: b084 sub sp, #16
800e20e: af00 add r7, sp, #0
800e210: 6078 str r0, [r7, #4]
800e212: 460b mov r3, r1
800e214: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e216: 2300 movs r3, #0
800e218: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e21a: 2300 movs r3, #0
800e21c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800e21e: 687b ldr r3, [r7, #4]
800e220: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e224: 78fa ldrb r2, [r7, #3]
800e226: 4611 mov r1, r2
800e228: 4618 mov r0, r3
800e22a: f7f8 fd31 bl 8006c90 <HAL_PCD_EP_Close>
800e22e: 4603 mov r3, r0
800e230: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e232: 7bfb ldrb r3, [r7, #15]
800e234: 4618 mov r0, r3
800e236: f000 f909 bl 800e44c <USBD_Get_USB_Status>
800e23a: 4603 mov r3, r0
800e23c: 73bb strb r3, [r7, #14]
return usb_status;
800e23e: 7bbb ldrb r3, [r7, #14]
}
800e240: 4618 mov r0, r3
800e242: 3710 adds r7, #16
800e244: 46bd mov sp, r7
800e246: bd80 pop {r7, pc}
0800e248 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e248: b580 push {r7, lr}
800e24a: b084 sub sp, #16
800e24c: af00 add r7, sp, #0
800e24e: 6078 str r0, [r7, #4]
800e250: 460b mov r3, r1
800e252: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e254: 2300 movs r3, #0
800e256: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e258: 2300 movs r3, #0
800e25a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800e25c: 687b ldr r3, [r7, #4]
800e25e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e262: 78fa ldrb r2, [r7, #3]
800e264: 4611 mov r1, r2
800e266: 4618 mov r0, r3
800e268: f7f8 fdd9 bl 8006e1e <HAL_PCD_EP_SetStall>
800e26c: 4603 mov r3, r0
800e26e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e270: 7bfb ldrb r3, [r7, #15]
800e272: 4618 mov r0, r3
800e274: f000 f8ea bl 800e44c <USBD_Get_USB_Status>
800e278: 4603 mov r3, r0
800e27a: 73bb strb r3, [r7, #14]
return usb_status;
800e27c: 7bbb ldrb r3, [r7, #14]
}
800e27e: 4618 mov r0, r3
800e280: 3710 adds r7, #16
800e282: 46bd mov sp, r7
800e284: bd80 pop {r7, pc}
0800e286 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e286: b580 push {r7, lr}
800e288: b084 sub sp, #16
800e28a: af00 add r7, sp, #0
800e28c: 6078 str r0, [r7, #4]
800e28e: 460b mov r3, r1
800e290: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e292: 2300 movs r3, #0
800e294: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e296: 2300 movs r3, #0
800e298: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800e29a: 687b ldr r3, [r7, #4]
800e29c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e2a0: 78fa ldrb r2, [r7, #3]
800e2a2: 4611 mov r1, r2
800e2a4: 4618 mov r0, r3
800e2a6: f7f8 fe1a bl 8006ede <HAL_PCD_EP_ClrStall>
800e2aa: 4603 mov r3, r0
800e2ac: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e2ae: 7bfb ldrb r3, [r7, #15]
800e2b0: 4618 mov r0, r3
800e2b2: f000 f8cb bl 800e44c <USBD_Get_USB_Status>
800e2b6: 4603 mov r3, r0
800e2b8: 73bb strb r3, [r7, #14]
return usb_status;
800e2ba: 7bbb ldrb r3, [r7, #14]
}
800e2bc: 4618 mov r0, r3
800e2be: 3710 adds r7, #16
800e2c0: 46bd mov sp, r7
800e2c2: bd80 pop {r7, pc}
0800e2c4 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e2c4: b480 push {r7}
800e2c6: b085 sub sp, #20
800e2c8: af00 add r7, sp, #0
800e2ca: 6078 str r0, [r7, #4]
800e2cc: 460b mov r3, r1
800e2ce: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800e2d0: 687b ldr r3, [r7, #4]
800e2d2: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e2d6: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800e2d8: f997 3003 ldrsb.w r3, [r7, #3]
800e2dc: 2b00 cmp r3, #0
800e2de: da0b bge.n 800e2f8 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800e2e0: 78fb ldrb r3, [r7, #3]
800e2e2: f003 027f and.w r2, r3, #127 @ 0x7f
800e2e6: 68f9 ldr r1, [r7, #12]
800e2e8: 4613 mov r3, r2
800e2ea: 009b lsls r3, r3, #2
800e2ec: 4413 add r3, r2
800e2ee: 00db lsls r3, r3, #3
800e2f0: 440b add r3, r1
800e2f2: 3312 adds r3, #18
800e2f4: 781b ldrb r3, [r3, #0]
800e2f6: e00b b.n 800e310 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800e2f8: 78fb ldrb r3, [r7, #3]
800e2fa: f003 027f and.w r2, r3, #127 @ 0x7f
800e2fe: 68f9 ldr r1, [r7, #12]
800e300: 4613 mov r3, r2
800e302: 009b lsls r3, r3, #2
800e304: 4413 add r3, r2
800e306: 00db lsls r3, r3, #3
800e308: 440b add r3, r1
800e30a: f503 73a9 add.w r3, r3, #338 @ 0x152
800e30e: 781b ldrb r3, [r3, #0]
}
}
800e310: 4618 mov r0, r3
800e312: 3714 adds r7, #20
800e314: 46bd mov sp, r7
800e316: bc80 pop {r7}
800e318: 4770 bx lr
0800e31a <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800e31a: b580 push {r7, lr}
800e31c: b084 sub sp, #16
800e31e: af00 add r7, sp, #0
800e320: 6078 str r0, [r7, #4]
800e322: 460b mov r3, r1
800e324: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e326: 2300 movs r3, #0
800e328: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e32a: 2300 movs r3, #0
800e32c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800e32e: 687b ldr r3, [r7, #4]
800e330: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e334: 78fa ldrb r2, [r7, #3]
800e336: 4611 mov r1, r2
800e338: 4618 mov r0, r3
800e33a: f7f8 fc28 bl 8006b8e <HAL_PCD_SetAddress>
800e33e: 4603 mov r3, r0
800e340: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e342: 7bfb ldrb r3, [r7, #15]
800e344: 4618 mov r0, r3
800e346: f000 f881 bl 800e44c <USBD_Get_USB_Status>
800e34a: 4603 mov r3, r0
800e34c: 73bb strb r3, [r7, #14]
return usb_status;
800e34e: 7bbb ldrb r3, [r7, #14]
}
800e350: 4618 mov r0, r3
800e352: 3710 adds r7, #16
800e354: 46bd mov sp, r7
800e356: bd80 pop {r7, pc}
0800e358 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800e358: b580 push {r7, lr}
800e35a: b086 sub sp, #24
800e35c: af00 add r7, sp, #0
800e35e: 60f8 str r0, [r7, #12]
800e360: 607a str r2, [r7, #4]
800e362: 461a mov r2, r3
800e364: 460b mov r3, r1
800e366: 72fb strb r3, [r7, #11]
800e368: 4613 mov r3, r2
800e36a: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800e36c: 2300 movs r3, #0
800e36e: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800e370: 2300 movs r3, #0
800e372: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800e374: 68fb ldr r3, [r7, #12]
800e376: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e37a: 893b ldrh r3, [r7, #8]
800e37c: 7af9 ldrb r1, [r7, #11]
800e37e: 687a ldr r2, [r7, #4]
800e380: f7f8 fd16 bl 8006db0 <HAL_PCD_EP_Transmit>
800e384: 4603 mov r3, r0
800e386: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800e388: 7dfb ldrb r3, [r7, #23]
800e38a: 4618 mov r0, r3
800e38c: f000 f85e bl 800e44c <USBD_Get_USB_Status>
800e390: 4603 mov r3, r0
800e392: 75bb strb r3, [r7, #22]
return usb_status;
800e394: 7dbb ldrb r3, [r7, #22]
}
800e396: 4618 mov r0, r3
800e398: 3718 adds r7, #24
800e39a: 46bd mov sp, r7
800e39c: bd80 pop {r7, pc}
0800e39e <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800e39e: b580 push {r7, lr}
800e3a0: b086 sub sp, #24
800e3a2: af00 add r7, sp, #0
800e3a4: 60f8 str r0, [r7, #12]
800e3a6: 607a str r2, [r7, #4]
800e3a8: 461a mov r2, r3
800e3aa: 460b mov r3, r1
800e3ac: 72fb strb r3, [r7, #11]
800e3ae: 4613 mov r3, r2
800e3b0: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800e3b2: 2300 movs r3, #0
800e3b4: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800e3b6: 2300 movs r3, #0
800e3b8: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800e3ba: 68fb ldr r3, [r7, #12]
800e3bc: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e3c0: 893b ldrh r3, [r7, #8]
800e3c2: 7af9 ldrb r1, [r7, #11]
800e3c4: 687a ldr r2, [r7, #4]
800e3c6: f7f8 fcab bl 8006d20 <HAL_PCD_EP_Receive>
800e3ca: 4603 mov r3, r0
800e3cc: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800e3ce: 7dfb ldrb r3, [r7, #23]
800e3d0: 4618 mov r0, r3
800e3d2: f000 f83b bl 800e44c <USBD_Get_USB_Status>
800e3d6: 4603 mov r3, r0
800e3d8: 75bb strb r3, [r7, #22]
return usb_status;
800e3da: 7dbb ldrb r3, [r7, #22]
}
800e3dc: 4618 mov r0, r3
800e3de: 3718 adds r7, #24
800e3e0: 46bd mov sp, r7
800e3e2: bd80 pop {r7, pc}
0800e3e4 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e3e4: b580 push {r7, lr}
800e3e6: b082 sub sp, #8
800e3e8: af00 add r7, sp, #0
800e3ea: 6078 str r0, [r7, #4]
800e3ec: 460b mov r3, r1
800e3ee: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800e3f0: 687b ldr r3, [r7, #4]
800e3f2: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e3f6: 78fa ldrb r2, [r7, #3]
800e3f8: 4611 mov r1, r2
800e3fa: 4618 mov r0, r3
800e3fc: f7f8 fcc1 bl 8006d82 <HAL_PCD_EP_GetRxCount>
800e400: 4603 mov r3, r0
}
800e402: 4618 mov r0, r3
800e404: 3708 adds r7, #8
800e406: 46bd mov sp, r7
800e408: bd80 pop {r7, pc}
...
0800e40c <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800e40c: b480 push {r7}
800e40e: b083 sub sp, #12
800e410: af00 add r7, sp, #0
800e412: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800e414: 4b02 ldr r3, [pc, #8] @ (800e420 <USBD_static_malloc+0x14>)
}
800e416: 4618 mov r0, r3
800e418: 370c adds r7, #12
800e41a: 46bd mov sp, r7
800e41c: bc80 pop {r7}
800e41e: 4770 bx lr
800e420: 2000153c .word 0x2000153c
0800e424 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800e424: b480 push {r7}
800e426: b083 sub sp, #12
800e428: af00 add r7, sp, #0
800e42a: 6078 str r0, [r7, #4]
}
800e42c: bf00 nop
800e42e: 370c adds r7, #12
800e430: 46bd mov sp, r7
800e432: bc80 pop {r7}
800e434: 4770 bx lr
0800e436 <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800e436: b480 push {r7}
800e438: b083 sub sp, #12
800e43a: af00 add r7, sp, #0
800e43c: 6078 str r0, [r7, #4]
800e43e: 460b mov r3, r1
800e440: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800e442: bf00 nop
800e444: 370c adds r7, #12
800e446: 46bd mov sp, r7
800e448: bc80 pop {r7}
800e44a: 4770 bx lr
0800e44c <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800e44c: b480 push {r7}
800e44e: b085 sub sp, #20
800e450: af00 add r7, sp, #0
800e452: 4603 mov r3, r0
800e454: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800e456: 2300 movs r3, #0
800e458: 73fb strb r3, [r7, #15]
switch (hal_status)
800e45a: 79fb ldrb r3, [r7, #7]
800e45c: 2b03 cmp r3, #3
800e45e: d817 bhi.n 800e490 <USBD_Get_USB_Status+0x44>
800e460: a201 add r2, pc, #4 @ (adr r2, 800e468 <USBD_Get_USB_Status+0x1c>)
800e462: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e466: bf00 nop
800e468: 0800e479 .word 0x0800e479
800e46c: 0800e47f .word 0x0800e47f
800e470: 0800e485 .word 0x0800e485
800e474: 0800e48b .word 0x0800e48b
{
case HAL_OK :
usb_status = USBD_OK;
800e478: 2300 movs r3, #0
800e47a: 73fb strb r3, [r7, #15]
break;
800e47c: e00b b.n 800e496 <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800e47e: 2302 movs r3, #2
800e480: 73fb strb r3, [r7, #15]
break;
800e482: e008 b.n 800e496 <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800e484: 2301 movs r3, #1
800e486: 73fb strb r3, [r7, #15]
break;
800e488: e005 b.n 800e496 <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800e48a: 2302 movs r3, #2
800e48c: 73fb strb r3, [r7, #15]
break;
800e48e: e002 b.n 800e496 <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800e490: 2302 movs r3, #2
800e492: 73fb strb r3, [r7, #15]
break;
800e494: bf00 nop
}
return usb_status;
800e496: 7bfb ldrb r3, [r7, #15]
}
800e498: 4618 mov r0, r3
800e49a: 3714 adds r7, #20
800e49c: 46bd mov sp, r7
800e49e: bc80 pop {r7}
800e4a0: 4770 bx lr
800e4a2: bf00 nop
0800e4a4 <siprintf>:
800e4a4: b40e push {r1, r2, r3}
800e4a6: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800e4aa: b510 push {r4, lr}
800e4ac: 2400 movs r4, #0
800e4ae: b09d sub sp, #116 @ 0x74
800e4b0: ab1f add r3, sp, #124 @ 0x7c
800e4b2: 9002 str r0, [sp, #8]
800e4b4: 9006 str r0, [sp, #24]
800e4b6: 9107 str r1, [sp, #28]
800e4b8: 9104 str r1, [sp, #16]
800e4ba: 4809 ldr r0, [pc, #36] @ (800e4e0 <siprintf+0x3c>)
800e4bc: 4909 ldr r1, [pc, #36] @ (800e4e4 <siprintf+0x40>)
800e4be: f853 2b04 ldr.w r2, [r3], #4
800e4c2: 9105 str r1, [sp, #20]
800e4c4: 6800 ldr r0, [r0, #0]
800e4c6: a902 add r1, sp, #8
800e4c8: 9301 str r3, [sp, #4]
800e4ca: 941b str r4, [sp, #108] @ 0x6c
800e4cc: f000 f992 bl 800e7f4 <_svfiprintf_r>
800e4d0: 9b02 ldr r3, [sp, #8]
800e4d2: 701c strb r4, [r3, #0]
800e4d4: b01d add sp, #116 @ 0x74
800e4d6: e8bd 4010 ldmia.w sp!, {r4, lr}
800e4da: b003 add sp, #12
800e4dc: 4770 bx lr
800e4de: bf00 nop
800e4e0: 2000018c .word 0x2000018c
800e4e4: ffff0208 .word 0xffff0208
0800e4e8 <memset>:
800e4e8: 4603 mov r3, r0
800e4ea: 4402 add r2, r0
800e4ec: 4293 cmp r3, r2
800e4ee: d100 bne.n 800e4f2 <memset+0xa>
800e4f0: 4770 bx lr
800e4f2: f803 1b01 strb.w r1, [r3], #1
800e4f6: e7f9 b.n 800e4ec <memset+0x4>
0800e4f8 <__errno>:
800e4f8: 4b01 ldr r3, [pc, #4] @ (800e500 <__errno+0x8>)
800e4fa: 6818 ldr r0, [r3, #0]
800e4fc: 4770 bx lr
800e4fe: bf00 nop
800e500: 2000018c .word 0x2000018c
0800e504 <__libc_init_array>:
800e504: b570 push {r4, r5, r6, lr}
800e506: 2600 movs r6, #0
800e508: 4d0c ldr r5, [pc, #48] @ (800e53c <__libc_init_array+0x38>)
800e50a: 4c0d ldr r4, [pc, #52] @ (800e540 <__libc_init_array+0x3c>)
800e50c: 1b64 subs r4, r4, r5
800e50e: 10a4 asrs r4, r4, #2
800e510: 42a6 cmp r6, r4
800e512: d109 bne.n 800e528 <__libc_init_array+0x24>
800e514: f000 fc76 bl 800ee04 <_init>
800e518: 2600 movs r6, #0
800e51a: 4d0a ldr r5, [pc, #40] @ (800e544 <__libc_init_array+0x40>)
800e51c: 4c0a ldr r4, [pc, #40] @ (800e548 <__libc_init_array+0x44>)
800e51e: 1b64 subs r4, r4, r5
800e520: 10a4 asrs r4, r4, #2
800e522: 42a6 cmp r6, r4
800e524: d105 bne.n 800e532 <__libc_init_array+0x2e>
800e526: bd70 pop {r4, r5, r6, pc}
800e528: f855 3b04 ldr.w r3, [r5], #4
800e52c: 4798 blx r3
800e52e: 3601 adds r6, #1
800e530: e7ee b.n 800e510 <__libc_init_array+0xc>
800e532: f855 3b04 ldr.w r3, [r5], #4
800e536: 4798 blx r3
800e538: 3601 adds r6, #1
800e53a: e7f2 b.n 800e522 <__libc_init_array+0x1e>
800e53c: 0800f610 .word 0x0800f610
800e540: 0800f610 .word 0x0800f610
800e544: 0800f610 .word 0x0800f610
800e548: 0800f614 .word 0x0800f614
0800e54c <__retarget_lock_acquire_recursive>:
800e54c: 4770 bx lr
0800e54e <__retarget_lock_release_recursive>:
800e54e: 4770 bx lr
0800e550 <_free_r>:
800e550: b538 push {r3, r4, r5, lr}
800e552: 4605 mov r5, r0
800e554: 2900 cmp r1, #0
800e556: d040 beq.n 800e5da <_free_r+0x8a>
800e558: f851 3c04 ldr.w r3, [r1, #-4]
800e55c: 1f0c subs r4, r1, #4
800e55e: 2b00 cmp r3, #0
800e560: bfb8 it lt
800e562: 18e4 addlt r4, r4, r3
800e564: f000 f8de bl 800e724 <__malloc_lock>
800e568: 4a1c ldr r2, [pc, #112] @ (800e5dc <_free_r+0x8c>)
800e56a: 6813 ldr r3, [r2, #0]
800e56c: b933 cbnz r3, 800e57c <_free_r+0x2c>
800e56e: 6063 str r3, [r4, #4]
800e570: 6014 str r4, [r2, #0]
800e572: 4628 mov r0, r5
800e574: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800e578: f000 b8da b.w 800e730 <__malloc_unlock>
800e57c: 42a3 cmp r3, r4
800e57e: d908 bls.n 800e592 <_free_r+0x42>
800e580: 6820 ldr r0, [r4, #0]
800e582: 1821 adds r1, r4, r0
800e584: 428b cmp r3, r1
800e586: bf01 itttt eq
800e588: 6819 ldreq r1, [r3, #0]
800e58a: 685b ldreq r3, [r3, #4]
800e58c: 1809 addeq r1, r1, r0
800e58e: 6021 streq r1, [r4, #0]
800e590: e7ed b.n 800e56e <_free_r+0x1e>
800e592: 461a mov r2, r3
800e594: 685b ldr r3, [r3, #4]
800e596: b10b cbz r3, 800e59c <_free_r+0x4c>
800e598: 42a3 cmp r3, r4
800e59a: d9fa bls.n 800e592 <_free_r+0x42>
800e59c: 6811 ldr r1, [r2, #0]
800e59e: 1850 adds r0, r2, r1
800e5a0: 42a0 cmp r0, r4
800e5a2: d10b bne.n 800e5bc <_free_r+0x6c>
800e5a4: 6820 ldr r0, [r4, #0]
800e5a6: 4401 add r1, r0
800e5a8: 1850 adds r0, r2, r1
800e5aa: 4283 cmp r3, r0
800e5ac: 6011 str r1, [r2, #0]
800e5ae: d1e0 bne.n 800e572 <_free_r+0x22>
800e5b0: 6818 ldr r0, [r3, #0]
800e5b2: 685b ldr r3, [r3, #4]
800e5b4: 4408 add r0, r1
800e5b6: 6010 str r0, [r2, #0]
800e5b8: 6053 str r3, [r2, #4]
800e5ba: e7da b.n 800e572 <_free_r+0x22>
800e5bc: d902 bls.n 800e5c4 <_free_r+0x74>
800e5be: 230c movs r3, #12
800e5c0: 602b str r3, [r5, #0]
800e5c2: e7d6 b.n 800e572 <_free_r+0x22>
800e5c4: 6820 ldr r0, [r4, #0]
800e5c6: 1821 adds r1, r4, r0
800e5c8: 428b cmp r3, r1
800e5ca: bf01 itttt eq
800e5cc: 6819 ldreq r1, [r3, #0]
800e5ce: 685b ldreq r3, [r3, #4]
800e5d0: 1809 addeq r1, r1, r0
800e5d2: 6021 streq r1, [r4, #0]
800e5d4: 6063 str r3, [r4, #4]
800e5d6: 6054 str r4, [r2, #4]
800e5d8: e7cb b.n 800e572 <_free_r+0x22>
800e5da: bd38 pop {r3, r4, r5, pc}
800e5dc: 200018a0 .word 0x200018a0
0800e5e0 <sbrk_aligned>:
800e5e0: b570 push {r4, r5, r6, lr}
800e5e2: 4e0f ldr r6, [pc, #60] @ (800e620 <sbrk_aligned+0x40>)
800e5e4: 460c mov r4, r1
800e5e6: 6831 ldr r1, [r6, #0]
800e5e8: 4605 mov r5, r0
800e5ea: b911 cbnz r1, 800e5f2 <sbrk_aligned+0x12>
800e5ec: f000 fba8 bl 800ed40 <_sbrk_r>
800e5f0: 6030 str r0, [r6, #0]
800e5f2: 4621 mov r1, r4
800e5f4: 4628 mov r0, r5
800e5f6: f000 fba3 bl 800ed40 <_sbrk_r>
800e5fa: 1c43 adds r3, r0, #1
800e5fc: d103 bne.n 800e606 <sbrk_aligned+0x26>
800e5fe: f04f 34ff mov.w r4, #4294967295
800e602: 4620 mov r0, r4
800e604: bd70 pop {r4, r5, r6, pc}
800e606: 1cc4 adds r4, r0, #3
800e608: f024 0403 bic.w r4, r4, #3
800e60c: 42a0 cmp r0, r4
800e60e: d0f8 beq.n 800e602 <sbrk_aligned+0x22>
800e610: 1a21 subs r1, r4, r0
800e612: 4628 mov r0, r5
800e614: f000 fb94 bl 800ed40 <_sbrk_r>
800e618: 3001 adds r0, #1
800e61a: d1f2 bne.n 800e602 <sbrk_aligned+0x22>
800e61c: e7ef b.n 800e5fe <sbrk_aligned+0x1e>
800e61e: bf00 nop
800e620: 2000189c .word 0x2000189c
0800e624 <_malloc_r>:
800e624: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800e628: 1ccd adds r5, r1, #3
800e62a: f025 0503 bic.w r5, r5, #3
800e62e: 3508 adds r5, #8
800e630: 2d0c cmp r5, #12
800e632: bf38 it cc
800e634: 250c movcc r5, #12
800e636: 2d00 cmp r5, #0
800e638: 4606 mov r6, r0
800e63a: db01 blt.n 800e640 <_malloc_r+0x1c>
800e63c: 42a9 cmp r1, r5
800e63e: d904 bls.n 800e64a <_malloc_r+0x26>
800e640: 230c movs r3, #12
800e642: 6033 str r3, [r6, #0]
800e644: 2000 movs r0, #0
800e646: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800e64a: f8df 80d4 ldr.w r8, [pc, #212] @ 800e720 <_malloc_r+0xfc>
800e64e: f000 f869 bl 800e724 <__malloc_lock>
800e652: f8d8 3000 ldr.w r3, [r8]
800e656: 461c mov r4, r3
800e658: bb44 cbnz r4, 800e6ac <_malloc_r+0x88>
800e65a: 4629 mov r1, r5
800e65c: 4630 mov r0, r6
800e65e: f7ff ffbf bl 800e5e0 <sbrk_aligned>
800e662: 1c43 adds r3, r0, #1
800e664: 4604 mov r4, r0
800e666: d158 bne.n 800e71a <_malloc_r+0xf6>
800e668: f8d8 4000 ldr.w r4, [r8]
800e66c: 4627 mov r7, r4
800e66e: 2f00 cmp r7, #0
800e670: d143 bne.n 800e6fa <_malloc_r+0xd6>
800e672: 2c00 cmp r4, #0
800e674: d04b beq.n 800e70e <_malloc_r+0xea>
800e676: 6823 ldr r3, [r4, #0]
800e678: 4639 mov r1, r7
800e67a: 4630 mov r0, r6
800e67c: eb04 0903 add.w r9, r4, r3
800e680: f000 fb5e bl 800ed40 <_sbrk_r>
800e684: 4581 cmp r9, r0
800e686: d142 bne.n 800e70e <_malloc_r+0xea>
800e688: 6821 ldr r1, [r4, #0]
800e68a: 4630 mov r0, r6
800e68c: 1a6d subs r5, r5, r1
800e68e: 4629 mov r1, r5
800e690: f7ff ffa6 bl 800e5e0 <sbrk_aligned>
800e694: 3001 adds r0, #1
800e696: d03a beq.n 800e70e <_malloc_r+0xea>
800e698: 6823 ldr r3, [r4, #0]
800e69a: 442b add r3, r5
800e69c: 6023 str r3, [r4, #0]
800e69e: f8d8 3000 ldr.w r3, [r8]
800e6a2: 685a ldr r2, [r3, #4]
800e6a4: bb62 cbnz r2, 800e700 <_malloc_r+0xdc>
800e6a6: f8c8 7000 str.w r7, [r8]
800e6aa: e00f b.n 800e6cc <_malloc_r+0xa8>
800e6ac: 6822 ldr r2, [r4, #0]
800e6ae: 1b52 subs r2, r2, r5
800e6b0: d420 bmi.n 800e6f4 <_malloc_r+0xd0>
800e6b2: 2a0b cmp r2, #11
800e6b4: d917 bls.n 800e6e6 <_malloc_r+0xc2>
800e6b6: 1961 adds r1, r4, r5
800e6b8: 42a3 cmp r3, r4
800e6ba: 6025 str r5, [r4, #0]
800e6bc: bf18 it ne
800e6be: 6059 strne r1, [r3, #4]
800e6c0: 6863 ldr r3, [r4, #4]
800e6c2: bf08 it eq
800e6c4: f8c8 1000 streq.w r1, [r8]
800e6c8: 5162 str r2, [r4, r5]
800e6ca: 604b str r3, [r1, #4]
800e6cc: 4630 mov r0, r6
800e6ce: f000 f82f bl 800e730 <__malloc_unlock>
800e6d2: f104 000b add.w r0, r4, #11
800e6d6: 1d23 adds r3, r4, #4
800e6d8: f020 0007 bic.w r0, r0, #7
800e6dc: 1ac2 subs r2, r0, r3
800e6de: bf1c itt ne
800e6e0: 1a1b subne r3, r3, r0
800e6e2: 50a3 strne r3, [r4, r2]
800e6e4: e7af b.n 800e646 <_malloc_r+0x22>
800e6e6: 6862 ldr r2, [r4, #4]
800e6e8: 42a3 cmp r3, r4
800e6ea: bf0c ite eq
800e6ec: f8c8 2000 streq.w r2, [r8]
800e6f0: 605a strne r2, [r3, #4]
800e6f2: e7eb b.n 800e6cc <_malloc_r+0xa8>
800e6f4: 4623 mov r3, r4
800e6f6: 6864 ldr r4, [r4, #4]
800e6f8: e7ae b.n 800e658 <_malloc_r+0x34>
800e6fa: 463c mov r4, r7
800e6fc: 687f ldr r7, [r7, #4]
800e6fe: e7b6 b.n 800e66e <_malloc_r+0x4a>
800e700: 461a mov r2, r3
800e702: 685b ldr r3, [r3, #4]
800e704: 42a3 cmp r3, r4
800e706: d1fb bne.n 800e700 <_malloc_r+0xdc>
800e708: 2300 movs r3, #0
800e70a: 6053 str r3, [r2, #4]
800e70c: e7de b.n 800e6cc <_malloc_r+0xa8>
800e70e: 230c movs r3, #12
800e710: 4630 mov r0, r6
800e712: 6033 str r3, [r6, #0]
800e714: f000 f80c bl 800e730 <__malloc_unlock>
800e718: e794 b.n 800e644 <_malloc_r+0x20>
800e71a: 6005 str r5, [r0, #0]
800e71c: e7d6 b.n 800e6cc <_malloc_r+0xa8>
800e71e: bf00 nop
800e720: 200018a0 .word 0x200018a0
0800e724 <__malloc_lock>:
800e724: 4801 ldr r0, [pc, #4] @ (800e72c <__malloc_lock+0x8>)
800e726: f7ff bf11 b.w 800e54c <__retarget_lock_acquire_recursive>
800e72a: bf00 nop
800e72c: 20001898 .word 0x20001898
0800e730 <__malloc_unlock>:
800e730: 4801 ldr r0, [pc, #4] @ (800e738 <__malloc_unlock+0x8>)
800e732: f7ff bf0c b.w 800e54e <__retarget_lock_release_recursive>
800e736: bf00 nop
800e738: 20001898 .word 0x20001898
0800e73c <__ssputs_r>:
800e73c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e740: 461f mov r7, r3
800e742: 688e ldr r6, [r1, #8]
800e744: 4682 mov sl, r0
800e746: 42be cmp r6, r7
800e748: 460c mov r4, r1
800e74a: 4690 mov r8, r2
800e74c: 680b ldr r3, [r1, #0]
800e74e: d82d bhi.n 800e7ac <__ssputs_r+0x70>
800e750: f9b1 200c ldrsh.w r2, [r1, #12]
800e754: f412 6f90 tst.w r2, #1152 @ 0x480
800e758: d026 beq.n 800e7a8 <__ssputs_r+0x6c>
800e75a: 6965 ldr r5, [r4, #20]
800e75c: 6909 ldr r1, [r1, #16]
800e75e: eb05 0545 add.w r5, r5, r5, lsl #1
800e762: eba3 0901 sub.w r9, r3, r1
800e766: eb05 75d5 add.w r5, r5, r5, lsr #31
800e76a: 1c7b adds r3, r7, #1
800e76c: 444b add r3, r9
800e76e: 106d asrs r5, r5, #1
800e770: 429d cmp r5, r3
800e772: bf38 it cc
800e774: 461d movcc r5, r3
800e776: 0553 lsls r3, r2, #21
800e778: d527 bpl.n 800e7ca <__ssputs_r+0x8e>
800e77a: 4629 mov r1, r5
800e77c: f7ff ff52 bl 800e624 <_malloc_r>
800e780: 4606 mov r6, r0
800e782: b360 cbz r0, 800e7de <__ssputs_r+0xa2>
800e784: 464a mov r2, r9
800e786: 6921 ldr r1, [r4, #16]
800e788: f000 faf8 bl 800ed7c <memcpy>
800e78c: 89a3 ldrh r3, [r4, #12]
800e78e: f423 6390 bic.w r3, r3, #1152 @ 0x480
800e792: f043 0380 orr.w r3, r3, #128 @ 0x80
800e796: 81a3 strh r3, [r4, #12]
800e798: 6126 str r6, [r4, #16]
800e79a: 444e add r6, r9
800e79c: 6026 str r6, [r4, #0]
800e79e: 463e mov r6, r7
800e7a0: 6165 str r5, [r4, #20]
800e7a2: eba5 0509 sub.w r5, r5, r9
800e7a6: 60a5 str r5, [r4, #8]
800e7a8: 42be cmp r6, r7
800e7aa: d900 bls.n 800e7ae <__ssputs_r+0x72>
800e7ac: 463e mov r6, r7
800e7ae: 4632 mov r2, r6
800e7b0: 4641 mov r1, r8
800e7b2: 6820 ldr r0, [r4, #0]
800e7b4: f000 faaa bl 800ed0c <memmove>
800e7b8: 2000 movs r0, #0
800e7ba: 68a3 ldr r3, [r4, #8]
800e7bc: 1b9b subs r3, r3, r6
800e7be: 60a3 str r3, [r4, #8]
800e7c0: 6823 ldr r3, [r4, #0]
800e7c2: 4433 add r3, r6
800e7c4: 6023 str r3, [r4, #0]
800e7c6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e7ca: 462a mov r2, r5
800e7cc: f000 fae4 bl 800ed98 <_realloc_r>
800e7d0: 4606 mov r6, r0
800e7d2: 2800 cmp r0, #0
800e7d4: d1e0 bne.n 800e798 <__ssputs_r+0x5c>
800e7d6: 4650 mov r0, sl
800e7d8: 6921 ldr r1, [r4, #16]
800e7da: f7ff feb9 bl 800e550 <_free_r>
800e7de: 230c movs r3, #12
800e7e0: f8ca 3000 str.w r3, [sl]
800e7e4: 89a3 ldrh r3, [r4, #12]
800e7e6: f04f 30ff mov.w r0, #4294967295
800e7ea: f043 0340 orr.w r3, r3, #64 @ 0x40
800e7ee: 81a3 strh r3, [r4, #12]
800e7f0: e7e9 b.n 800e7c6 <__ssputs_r+0x8a>
...
0800e7f4 <_svfiprintf_r>:
800e7f4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800e7f8: 4698 mov r8, r3
800e7fa: 898b ldrh r3, [r1, #12]
800e7fc: 4607 mov r7, r0
800e7fe: 061b lsls r3, r3, #24
800e800: 460d mov r5, r1
800e802: 4614 mov r4, r2
800e804: b09d sub sp, #116 @ 0x74
800e806: d510 bpl.n 800e82a <_svfiprintf_r+0x36>
800e808: 690b ldr r3, [r1, #16]
800e80a: b973 cbnz r3, 800e82a <_svfiprintf_r+0x36>
800e80c: 2140 movs r1, #64 @ 0x40
800e80e: f7ff ff09 bl 800e624 <_malloc_r>
800e812: 6028 str r0, [r5, #0]
800e814: 6128 str r0, [r5, #16]
800e816: b930 cbnz r0, 800e826 <_svfiprintf_r+0x32>
800e818: 230c movs r3, #12
800e81a: 603b str r3, [r7, #0]
800e81c: f04f 30ff mov.w r0, #4294967295
800e820: b01d add sp, #116 @ 0x74
800e822: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800e826: 2340 movs r3, #64 @ 0x40
800e828: 616b str r3, [r5, #20]
800e82a: 2300 movs r3, #0
800e82c: 9309 str r3, [sp, #36] @ 0x24
800e82e: 2320 movs r3, #32
800e830: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800e834: 2330 movs r3, #48 @ 0x30
800e836: f04f 0901 mov.w r9, #1
800e83a: f8cd 800c str.w r8, [sp, #12]
800e83e: f8df 8198 ldr.w r8, [pc, #408] @ 800e9d8 <_svfiprintf_r+0x1e4>
800e842: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800e846: 4623 mov r3, r4
800e848: 469a mov sl, r3
800e84a: f813 2b01 ldrb.w r2, [r3], #1
800e84e: b10a cbz r2, 800e854 <_svfiprintf_r+0x60>
800e850: 2a25 cmp r2, #37 @ 0x25
800e852: d1f9 bne.n 800e848 <_svfiprintf_r+0x54>
800e854: ebba 0b04 subs.w fp, sl, r4
800e858: d00b beq.n 800e872 <_svfiprintf_r+0x7e>
800e85a: 465b mov r3, fp
800e85c: 4622 mov r2, r4
800e85e: 4629 mov r1, r5
800e860: 4638 mov r0, r7
800e862: f7ff ff6b bl 800e73c <__ssputs_r>
800e866: 3001 adds r0, #1
800e868: f000 80a7 beq.w 800e9ba <_svfiprintf_r+0x1c6>
800e86c: 9a09 ldr r2, [sp, #36] @ 0x24
800e86e: 445a add r2, fp
800e870: 9209 str r2, [sp, #36] @ 0x24
800e872: f89a 3000 ldrb.w r3, [sl]
800e876: 2b00 cmp r3, #0
800e878: f000 809f beq.w 800e9ba <_svfiprintf_r+0x1c6>
800e87c: 2300 movs r3, #0
800e87e: f04f 32ff mov.w r2, #4294967295
800e882: e9cd 2305 strd r2, r3, [sp, #20]
800e886: f10a 0a01 add.w sl, sl, #1
800e88a: 9304 str r3, [sp, #16]
800e88c: 9307 str r3, [sp, #28]
800e88e: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800e892: 931a str r3, [sp, #104] @ 0x68
800e894: 4654 mov r4, sl
800e896: 2205 movs r2, #5
800e898: f814 1b01 ldrb.w r1, [r4], #1
800e89c: 484e ldr r0, [pc, #312] @ (800e9d8 <_svfiprintf_r+0x1e4>)
800e89e: f000 fa5f bl 800ed60 <memchr>
800e8a2: 9a04 ldr r2, [sp, #16]
800e8a4: b9d8 cbnz r0, 800e8de <_svfiprintf_r+0xea>
800e8a6: 06d0 lsls r0, r2, #27
800e8a8: bf44 itt mi
800e8aa: 2320 movmi r3, #32
800e8ac: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e8b0: 0711 lsls r1, r2, #28
800e8b2: bf44 itt mi
800e8b4: 232b movmi r3, #43 @ 0x2b
800e8b6: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e8ba: f89a 3000 ldrb.w r3, [sl]
800e8be: 2b2a cmp r3, #42 @ 0x2a
800e8c0: d015 beq.n 800e8ee <_svfiprintf_r+0xfa>
800e8c2: 4654 mov r4, sl
800e8c4: 2000 movs r0, #0
800e8c6: f04f 0c0a mov.w ip, #10
800e8ca: 9a07 ldr r2, [sp, #28]
800e8cc: 4621 mov r1, r4
800e8ce: f811 3b01 ldrb.w r3, [r1], #1
800e8d2: 3b30 subs r3, #48 @ 0x30
800e8d4: 2b09 cmp r3, #9
800e8d6: d94b bls.n 800e970 <_svfiprintf_r+0x17c>
800e8d8: b1b0 cbz r0, 800e908 <_svfiprintf_r+0x114>
800e8da: 9207 str r2, [sp, #28]
800e8dc: e014 b.n 800e908 <_svfiprintf_r+0x114>
800e8de: eba0 0308 sub.w r3, r0, r8
800e8e2: fa09 f303 lsl.w r3, r9, r3
800e8e6: 4313 orrs r3, r2
800e8e8: 46a2 mov sl, r4
800e8ea: 9304 str r3, [sp, #16]
800e8ec: e7d2 b.n 800e894 <_svfiprintf_r+0xa0>
800e8ee: 9b03 ldr r3, [sp, #12]
800e8f0: 1d19 adds r1, r3, #4
800e8f2: 681b ldr r3, [r3, #0]
800e8f4: 9103 str r1, [sp, #12]
800e8f6: 2b00 cmp r3, #0
800e8f8: bfbb ittet lt
800e8fa: 425b neglt r3, r3
800e8fc: f042 0202 orrlt.w r2, r2, #2
800e900: 9307 strge r3, [sp, #28]
800e902: 9307 strlt r3, [sp, #28]
800e904: bfb8 it lt
800e906: 9204 strlt r2, [sp, #16]
800e908: 7823 ldrb r3, [r4, #0]
800e90a: 2b2e cmp r3, #46 @ 0x2e
800e90c: d10a bne.n 800e924 <_svfiprintf_r+0x130>
800e90e: 7863 ldrb r3, [r4, #1]
800e910: 2b2a cmp r3, #42 @ 0x2a
800e912: d132 bne.n 800e97a <_svfiprintf_r+0x186>
800e914: 9b03 ldr r3, [sp, #12]
800e916: 3402 adds r4, #2
800e918: 1d1a adds r2, r3, #4
800e91a: 681b ldr r3, [r3, #0]
800e91c: 9203 str r2, [sp, #12]
800e91e: ea43 73e3 orr.w r3, r3, r3, asr #31
800e922: 9305 str r3, [sp, #20]
800e924: f8df a0b4 ldr.w sl, [pc, #180] @ 800e9dc <_svfiprintf_r+0x1e8>
800e928: 2203 movs r2, #3
800e92a: 4650 mov r0, sl
800e92c: 7821 ldrb r1, [r4, #0]
800e92e: f000 fa17 bl 800ed60 <memchr>
800e932: b138 cbz r0, 800e944 <_svfiprintf_r+0x150>
800e934: 2240 movs r2, #64 @ 0x40
800e936: 9b04 ldr r3, [sp, #16]
800e938: eba0 000a sub.w r0, r0, sl
800e93c: 4082 lsls r2, r0
800e93e: 4313 orrs r3, r2
800e940: 3401 adds r4, #1
800e942: 9304 str r3, [sp, #16]
800e944: f814 1b01 ldrb.w r1, [r4], #1
800e948: 2206 movs r2, #6
800e94a: 4825 ldr r0, [pc, #148] @ (800e9e0 <_svfiprintf_r+0x1ec>)
800e94c: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800e950: f000 fa06 bl 800ed60 <memchr>
800e954: 2800 cmp r0, #0
800e956: d036 beq.n 800e9c6 <_svfiprintf_r+0x1d2>
800e958: 4b22 ldr r3, [pc, #136] @ (800e9e4 <_svfiprintf_r+0x1f0>)
800e95a: bb1b cbnz r3, 800e9a4 <_svfiprintf_r+0x1b0>
800e95c: 9b03 ldr r3, [sp, #12]
800e95e: 3307 adds r3, #7
800e960: f023 0307 bic.w r3, r3, #7
800e964: 3308 adds r3, #8
800e966: 9303 str r3, [sp, #12]
800e968: 9b09 ldr r3, [sp, #36] @ 0x24
800e96a: 4433 add r3, r6
800e96c: 9309 str r3, [sp, #36] @ 0x24
800e96e: e76a b.n 800e846 <_svfiprintf_r+0x52>
800e970: 460c mov r4, r1
800e972: 2001 movs r0, #1
800e974: fb0c 3202 mla r2, ip, r2, r3
800e978: e7a8 b.n 800e8cc <_svfiprintf_r+0xd8>
800e97a: 2300 movs r3, #0
800e97c: f04f 0c0a mov.w ip, #10
800e980: 4619 mov r1, r3
800e982: 3401 adds r4, #1
800e984: 9305 str r3, [sp, #20]
800e986: 4620 mov r0, r4
800e988: f810 2b01 ldrb.w r2, [r0], #1
800e98c: 3a30 subs r2, #48 @ 0x30
800e98e: 2a09 cmp r2, #9
800e990: d903 bls.n 800e99a <_svfiprintf_r+0x1a6>
800e992: 2b00 cmp r3, #0
800e994: d0c6 beq.n 800e924 <_svfiprintf_r+0x130>
800e996: 9105 str r1, [sp, #20]
800e998: e7c4 b.n 800e924 <_svfiprintf_r+0x130>
800e99a: 4604 mov r4, r0
800e99c: 2301 movs r3, #1
800e99e: fb0c 2101 mla r1, ip, r1, r2
800e9a2: e7f0 b.n 800e986 <_svfiprintf_r+0x192>
800e9a4: ab03 add r3, sp, #12
800e9a6: 9300 str r3, [sp, #0]
800e9a8: 462a mov r2, r5
800e9aa: 4638 mov r0, r7
800e9ac: 4b0e ldr r3, [pc, #56] @ (800e9e8 <_svfiprintf_r+0x1f4>)
800e9ae: a904 add r1, sp, #16
800e9b0: f3af 8000 nop.w
800e9b4: 1c42 adds r2, r0, #1
800e9b6: 4606 mov r6, r0
800e9b8: d1d6 bne.n 800e968 <_svfiprintf_r+0x174>
800e9ba: 89ab ldrh r3, [r5, #12]
800e9bc: 065b lsls r3, r3, #25
800e9be: f53f af2d bmi.w 800e81c <_svfiprintf_r+0x28>
800e9c2: 9809 ldr r0, [sp, #36] @ 0x24
800e9c4: e72c b.n 800e820 <_svfiprintf_r+0x2c>
800e9c6: ab03 add r3, sp, #12
800e9c8: 9300 str r3, [sp, #0]
800e9ca: 462a mov r2, r5
800e9cc: 4638 mov r0, r7
800e9ce: 4b06 ldr r3, [pc, #24] @ (800e9e8 <_svfiprintf_r+0x1f4>)
800e9d0: a904 add r1, sp, #16
800e9d2: f000 f87d bl 800ead0 <_printf_i>
800e9d6: e7ed b.n 800e9b4 <_svfiprintf_r+0x1c0>
800e9d8: 0800f5d2 .word 0x0800f5d2
800e9dc: 0800f5d8 .word 0x0800f5d8
800e9e0: 0800f5dc .word 0x0800f5dc
800e9e4: 00000000 .word 0x00000000
800e9e8: 0800e73d .word 0x0800e73d
0800e9ec <_printf_common>:
800e9ec: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e9f0: 4616 mov r6, r2
800e9f2: 4698 mov r8, r3
800e9f4: 688a ldr r2, [r1, #8]
800e9f6: 690b ldr r3, [r1, #16]
800e9f8: 4607 mov r7, r0
800e9fa: 4293 cmp r3, r2
800e9fc: bfb8 it lt
800e9fe: 4613 movlt r3, r2
800ea00: 6033 str r3, [r6, #0]
800ea02: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800ea06: 460c mov r4, r1
800ea08: f8dd 9020 ldr.w r9, [sp, #32]
800ea0c: b10a cbz r2, 800ea12 <_printf_common+0x26>
800ea0e: 3301 adds r3, #1
800ea10: 6033 str r3, [r6, #0]
800ea12: 6823 ldr r3, [r4, #0]
800ea14: 0699 lsls r1, r3, #26
800ea16: bf42 ittt mi
800ea18: 6833 ldrmi r3, [r6, #0]
800ea1a: 3302 addmi r3, #2
800ea1c: 6033 strmi r3, [r6, #0]
800ea1e: 6825 ldr r5, [r4, #0]
800ea20: f015 0506 ands.w r5, r5, #6
800ea24: d106 bne.n 800ea34 <_printf_common+0x48>
800ea26: f104 0a19 add.w sl, r4, #25
800ea2a: 68e3 ldr r3, [r4, #12]
800ea2c: 6832 ldr r2, [r6, #0]
800ea2e: 1a9b subs r3, r3, r2
800ea30: 42ab cmp r3, r5
800ea32: dc2b bgt.n 800ea8c <_printf_common+0xa0>
800ea34: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800ea38: 6822 ldr r2, [r4, #0]
800ea3a: 3b00 subs r3, #0
800ea3c: bf18 it ne
800ea3e: 2301 movne r3, #1
800ea40: 0692 lsls r2, r2, #26
800ea42: d430 bmi.n 800eaa6 <_printf_common+0xba>
800ea44: 4641 mov r1, r8
800ea46: 4638 mov r0, r7
800ea48: f104 0243 add.w r2, r4, #67 @ 0x43
800ea4c: 47c8 blx r9
800ea4e: 3001 adds r0, #1
800ea50: d023 beq.n 800ea9a <_printf_common+0xae>
800ea52: 6823 ldr r3, [r4, #0]
800ea54: 6922 ldr r2, [r4, #16]
800ea56: f003 0306 and.w r3, r3, #6
800ea5a: 2b04 cmp r3, #4
800ea5c: bf14 ite ne
800ea5e: 2500 movne r5, #0
800ea60: 6833 ldreq r3, [r6, #0]
800ea62: f04f 0600 mov.w r6, #0
800ea66: bf08 it eq
800ea68: 68e5 ldreq r5, [r4, #12]
800ea6a: f104 041a add.w r4, r4, #26
800ea6e: bf08 it eq
800ea70: 1aed subeq r5, r5, r3
800ea72: f854 3c12 ldr.w r3, [r4, #-18]
800ea76: bf08 it eq
800ea78: ea25 75e5 biceq.w r5, r5, r5, asr #31
800ea7c: 4293 cmp r3, r2
800ea7e: bfc4 itt gt
800ea80: 1a9b subgt r3, r3, r2
800ea82: 18ed addgt r5, r5, r3
800ea84: 42b5 cmp r5, r6
800ea86: d11a bne.n 800eabe <_printf_common+0xd2>
800ea88: 2000 movs r0, #0
800ea8a: e008 b.n 800ea9e <_printf_common+0xb2>
800ea8c: 2301 movs r3, #1
800ea8e: 4652 mov r2, sl
800ea90: 4641 mov r1, r8
800ea92: 4638 mov r0, r7
800ea94: 47c8 blx r9
800ea96: 3001 adds r0, #1
800ea98: d103 bne.n 800eaa2 <_printf_common+0xb6>
800ea9a: f04f 30ff mov.w r0, #4294967295
800ea9e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800eaa2: 3501 adds r5, #1
800eaa4: e7c1 b.n 800ea2a <_printf_common+0x3e>
800eaa6: 2030 movs r0, #48 @ 0x30
800eaa8: 18e1 adds r1, r4, r3
800eaaa: f881 0043 strb.w r0, [r1, #67] @ 0x43
800eaae: 1c5a adds r2, r3, #1
800eab0: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800eab4: 4422 add r2, r4
800eab6: 3302 adds r3, #2
800eab8: f882 1043 strb.w r1, [r2, #67] @ 0x43
800eabc: e7c2 b.n 800ea44 <_printf_common+0x58>
800eabe: 2301 movs r3, #1
800eac0: 4622 mov r2, r4
800eac2: 4641 mov r1, r8
800eac4: 4638 mov r0, r7
800eac6: 47c8 blx r9
800eac8: 3001 adds r0, #1
800eaca: d0e6 beq.n 800ea9a <_printf_common+0xae>
800eacc: 3601 adds r6, #1
800eace: e7d9 b.n 800ea84 <_printf_common+0x98>
0800ead0 <_printf_i>:
800ead0: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800ead4: 7e0f ldrb r7, [r1, #24]
800ead6: 4691 mov r9, r2
800ead8: 2f78 cmp r7, #120 @ 0x78
800eada: 4680 mov r8, r0
800eadc: 460c mov r4, r1
800eade: 469a mov sl, r3
800eae0: 9e0c ldr r6, [sp, #48] @ 0x30
800eae2: f101 0243 add.w r2, r1, #67 @ 0x43
800eae6: d807 bhi.n 800eaf8 <_printf_i+0x28>
800eae8: 2f62 cmp r7, #98 @ 0x62
800eaea: d80a bhi.n 800eb02 <_printf_i+0x32>
800eaec: 2f00 cmp r7, #0
800eaee: f000 80d1 beq.w 800ec94 <_printf_i+0x1c4>
800eaf2: 2f58 cmp r7, #88 @ 0x58
800eaf4: f000 80b8 beq.w 800ec68 <_printf_i+0x198>
800eaf8: f104 0642 add.w r6, r4, #66 @ 0x42
800eafc: f884 7042 strb.w r7, [r4, #66] @ 0x42
800eb00: e03a b.n 800eb78 <_printf_i+0xa8>
800eb02: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800eb06: 2b15 cmp r3, #21
800eb08: d8f6 bhi.n 800eaf8 <_printf_i+0x28>
800eb0a: a101 add r1, pc, #4 @ (adr r1, 800eb10 <_printf_i+0x40>)
800eb0c: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800eb10: 0800eb69 .word 0x0800eb69
800eb14: 0800eb7d .word 0x0800eb7d
800eb18: 0800eaf9 .word 0x0800eaf9
800eb1c: 0800eaf9 .word 0x0800eaf9
800eb20: 0800eaf9 .word 0x0800eaf9
800eb24: 0800eaf9 .word 0x0800eaf9
800eb28: 0800eb7d .word 0x0800eb7d
800eb2c: 0800eaf9 .word 0x0800eaf9
800eb30: 0800eaf9 .word 0x0800eaf9
800eb34: 0800eaf9 .word 0x0800eaf9
800eb38: 0800eaf9 .word 0x0800eaf9
800eb3c: 0800ec7b .word 0x0800ec7b
800eb40: 0800eba7 .word 0x0800eba7
800eb44: 0800ec35 .word 0x0800ec35
800eb48: 0800eaf9 .word 0x0800eaf9
800eb4c: 0800eaf9 .word 0x0800eaf9
800eb50: 0800ec9d .word 0x0800ec9d
800eb54: 0800eaf9 .word 0x0800eaf9
800eb58: 0800eba7 .word 0x0800eba7
800eb5c: 0800eaf9 .word 0x0800eaf9
800eb60: 0800eaf9 .word 0x0800eaf9
800eb64: 0800ec3d .word 0x0800ec3d
800eb68: 6833 ldr r3, [r6, #0]
800eb6a: 1d1a adds r2, r3, #4
800eb6c: 681b ldr r3, [r3, #0]
800eb6e: 6032 str r2, [r6, #0]
800eb70: f104 0642 add.w r6, r4, #66 @ 0x42
800eb74: f884 3042 strb.w r3, [r4, #66] @ 0x42
800eb78: 2301 movs r3, #1
800eb7a: e09c b.n 800ecb6 <_printf_i+0x1e6>
800eb7c: 6833 ldr r3, [r6, #0]
800eb7e: 6820 ldr r0, [r4, #0]
800eb80: 1d19 adds r1, r3, #4
800eb82: 6031 str r1, [r6, #0]
800eb84: 0606 lsls r6, r0, #24
800eb86: d501 bpl.n 800eb8c <_printf_i+0xbc>
800eb88: 681d ldr r5, [r3, #0]
800eb8a: e003 b.n 800eb94 <_printf_i+0xc4>
800eb8c: 0645 lsls r5, r0, #25
800eb8e: d5fb bpl.n 800eb88 <_printf_i+0xb8>
800eb90: f9b3 5000 ldrsh.w r5, [r3]
800eb94: 2d00 cmp r5, #0
800eb96: da03 bge.n 800eba0 <_printf_i+0xd0>
800eb98: 232d movs r3, #45 @ 0x2d
800eb9a: 426d negs r5, r5
800eb9c: f884 3043 strb.w r3, [r4, #67] @ 0x43
800eba0: 230a movs r3, #10
800eba2: 4858 ldr r0, [pc, #352] @ (800ed04 <_printf_i+0x234>)
800eba4: e011 b.n 800ebca <_printf_i+0xfa>
800eba6: 6821 ldr r1, [r4, #0]
800eba8: 6833 ldr r3, [r6, #0]
800ebaa: 0608 lsls r0, r1, #24
800ebac: f853 5b04 ldr.w r5, [r3], #4
800ebb0: d402 bmi.n 800ebb8 <_printf_i+0xe8>
800ebb2: 0649 lsls r1, r1, #25
800ebb4: bf48 it mi
800ebb6: b2ad uxthmi r5, r5
800ebb8: 2f6f cmp r7, #111 @ 0x6f
800ebba: 6033 str r3, [r6, #0]
800ebbc: bf14 ite ne
800ebbe: 230a movne r3, #10
800ebc0: 2308 moveq r3, #8
800ebc2: 4850 ldr r0, [pc, #320] @ (800ed04 <_printf_i+0x234>)
800ebc4: 2100 movs r1, #0
800ebc6: f884 1043 strb.w r1, [r4, #67] @ 0x43
800ebca: 6866 ldr r6, [r4, #4]
800ebcc: 2e00 cmp r6, #0
800ebce: 60a6 str r6, [r4, #8]
800ebd0: db05 blt.n 800ebde <_printf_i+0x10e>
800ebd2: 6821 ldr r1, [r4, #0]
800ebd4: 432e orrs r6, r5
800ebd6: f021 0104 bic.w r1, r1, #4
800ebda: 6021 str r1, [r4, #0]
800ebdc: d04b beq.n 800ec76 <_printf_i+0x1a6>
800ebde: 4616 mov r6, r2
800ebe0: fbb5 f1f3 udiv r1, r5, r3
800ebe4: fb03 5711 mls r7, r3, r1, r5
800ebe8: 5dc7 ldrb r7, [r0, r7]
800ebea: f806 7d01 strb.w r7, [r6, #-1]!
800ebee: 462f mov r7, r5
800ebf0: 42bb cmp r3, r7
800ebf2: 460d mov r5, r1
800ebf4: d9f4 bls.n 800ebe0 <_printf_i+0x110>
800ebf6: 2b08 cmp r3, #8
800ebf8: d10b bne.n 800ec12 <_printf_i+0x142>
800ebfa: 6823 ldr r3, [r4, #0]
800ebfc: 07df lsls r7, r3, #31
800ebfe: d508 bpl.n 800ec12 <_printf_i+0x142>
800ec00: 6923 ldr r3, [r4, #16]
800ec02: 6861 ldr r1, [r4, #4]
800ec04: 4299 cmp r1, r3
800ec06: bfde ittt le
800ec08: 2330 movle r3, #48 @ 0x30
800ec0a: f806 3c01 strble.w r3, [r6, #-1]
800ec0e: f106 36ff addle.w r6, r6, #4294967295
800ec12: 1b92 subs r2, r2, r6
800ec14: 6122 str r2, [r4, #16]
800ec16: 464b mov r3, r9
800ec18: 4621 mov r1, r4
800ec1a: 4640 mov r0, r8
800ec1c: f8cd a000 str.w sl, [sp]
800ec20: aa03 add r2, sp, #12
800ec22: f7ff fee3 bl 800e9ec <_printf_common>
800ec26: 3001 adds r0, #1
800ec28: d14a bne.n 800ecc0 <_printf_i+0x1f0>
800ec2a: f04f 30ff mov.w r0, #4294967295
800ec2e: b004 add sp, #16
800ec30: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800ec34: 6823 ldr r3, [r4, #0]
800ec36: f043 0320 orr.w r3, r3, #32
800ec3a: 6023 str r3, [r4, #0]
800ec3c: 2778 movs r7, #120 @ 0x78
800ec3e: 4832 ldr r0, [pc, #200] @ (800ed08 <_printf_i+0x238>)
800ec40: f884 7045 strb.w r7, [r4, #69] @ 0x45
800ec44: 6823 ldr r3, [r4, #0]
800ec46: 6831 ldr r1, [r6, #0]
800ec48: 061f lsls r7, r3, #24
800ec4a: f851 5b04 ldr.w r5, [r1], #4
800ec4e: d402 bmi.n 800ec56 <_printf_i+0x186>
800ec50: 065f lsls r7, r3, #25
800ec52: bf48 it mi
800ec54: b2ad uxthmi r5, r5
800ec56: 6031 str r1, [r6, #0]
800ec58: 07d9 lsls r1, r3, #31
800ec5a: bf44 itt mi
800ec5c: f043 0320 orrmi.w r3, r3, #32
800ec60: 6023 strmi r3, [r4, #0]
800ec62: b11d cbz r5, 800ec6c <_printf_i+0x19c>
800ec64: 2310 movs r3, #16
800ec66: e7ad b.n 800ebc4 <_printf_i+0xf4>
800ec68: 4826 ldr r0, [pc, #152] @ (800ed04 <_printf_i+0x234>)
800ec6a: e7e9 b.n 800ec40 <_printf_i+0x170>
800ec6c: 6823 ldr r3, [r4, #0]
800ec6e: f023 0320 bic.w r3, r3, #32
800ec72: 6023 str r3, [r4, #0]
800ec74: e7f6 b.n 800ec64 <_printf_i+0x194>
800ec76: 4616 mov r6, r2
800ec78: e7bd b.n 800ebf6 <_printf_i+0x126>
800ec7a: 6833 ldr r3, [r6, #0]
800ec7c: 6825 ldr r5, [r4, #0]
800ec7e: 1d18 adds r0, r3, #4
800ec80: 6961 ldr r1, [r4, #20]
800ec82: 6030 str r0, [r6, #0]
800ec84: 062e lsls r6, r5, #24
800ec86: 681b ldr r3, [r3, #0]
800ec88: d501 bpl.n 800ec8e <_printf_i+0x1be>
800ec8a: 6019 str r1, [r3, #0]
800ec8c: e002 b.n 800ec94 <_printf_i+0x1c4>
800ec8e: 0668 lsls r0, r5, #25
800ec90: d5fb bpl.n 800ec8a <_printf_i+0x1ba>
800ec92: 8019 strh r1, [r3, #0]
800ec94: 2300 movs r3, #0
800ec96: 4616 mov r6, r2
800ec98: 6123 str r3, [r4, #16]
800ec9a: e7bc b.n 800ec16 <_printf_i+0x146>
800ec9c: 6833 ldr r3, [r6, #0]
800ec9e: 2100 movs r1, #0
800eca0: 1d1a adds r2, r3, #4
800eca2: 6032 str r2, [r6, #0]
800eca4: 681e ldr r6, [r3, #0]
800eca6: 6862 ldr r2, [r4, #4]
800eca8: 4630 mov r0, r6
800ecaa: f000 f859 bl 800ed60 <memchr>
800ecae: b108 cbz r0, 800ecb4 <_printf_i+0x1e4>
800ecb0: 1b80 subs r0, r0, r6
800ecb2: 6060 str r0, [r4, #4]
800ecb4: 6863 ldr r3, [r4, #4]
800ecb6: 6123 str r3, [r4, #16]
800ecb8: 2300 movs r3, #0
800ecba: f884 3043 strb.w r3, [r4, #67] @ 0x43
800ecbe: e7aa b.n 800ec16 <_printf_i+0x146>
800ecc0: 4632 mov r2, r6
800ecc2: 4649 mov r1, r9
800ecc4: 4640 mov r0, r8
800ecc6: 6923 ldr r3, [r4, #16]
800ecc8: 47d0 blx sl
800ecca: 3001 adds r0, #1
800eccc: d0ad beq.n 800ec2a <_printf_i+0x15a>
800ecce: 6823 ldr r3, [r4, #0]
800ecd0: 079b lsls r3, r3, #30
800ecd2: d413 bmi.n 800ecfc <_printf_i+0x22c>
800ecd4: 68e0 ldr r0, [r4, #12]
800ecd6: 9b03 ldr r3, [sp, #12]
800ecd8: 4298 cmp r0, r3
800ecda: bfb8 it lt
800ecdc: 4618 movlt r0, r3
800ecde: e7a6 b.n 800ec2e <_printf_i+0x15e>
800ece0: 2301 movs r3, #1
800ece2: 4632 mov r2, r6
800ece4: 4649 mov r1, r9
800ece6: 4640 mov r0, r8
800ece8: 47d0 blx sl
800ecea: 3001 adds r0, #1
800ecec: d09d beq.n 800ec2a <_printf_i+0x15a>
800ecee: 3501 adds r5, #1
800ecf0: 68e3 ldr r3, [r4, #12]
800ecf2: 9903 ldr r1, [sp, #12]
800ecf4: 1a5b subs r3, r3, r1
800ecf6: 42ab cmp r3, r5
800ecf8: dcf2 bgt.n 800ece0 <_printf_i+0x210>
800ecfa: e7eb b.n 800ecd4 <_printf_i+0x204>
800ecfc: 2500 movs r5, #0
800ecfe: f104 0619 add.w r6, r4, #25
800ed02: e7f5 b.n 800ecf0 <_printf_i+0x220>
800ed04: 0800f5e3 .word 0x0800f5e3
800ed08: 0800f5f4 .word 0x0800f5f4
0800ed0c <memmove>:
800ed0c: 4288 cmp r0, r1
800ed0e: b510 push {r4, lr}
800ed10: eb01 0402 add.w r4, r1, r2
800ed14: d902 bls.n 800ed1c <memmove+0x10>
800ed16: 4284 cmp r4, r0
800ed18: 4623 mov r3, r4
800ed1a: d807 bhi.n 800ed2c <memmove+0x20>
800ed1c: 1e43 subs r3, r0, #1
800ed1e: 42a1 cmp r1, r4
800ed20: d008 beq.n 800ed34 <memmove+0x28>
800ed22: f811 2b01 ldrb.w r2, [r1], #1
800ed26: f803 2f01 strb.w r2, [r3, #1]!
800ed2a: e7f8 b.n 800ed1e <memmove+0x12>
800ed2c: 4601 mov r1, r0
800ed2e: 4402 add r2, r0
800ed30: 428a cmp r2, r1
800ed32: d100 bne.n 800ed36 <memmove+0x2a>
800ed34: bd10 pop {r4, pc}
800ed36: f813 4d01 ldrb.w r4, [r3, #-1]!
800ed3a: f802 4d01 strb.w r4, [r2, #-1]!
800ed3e: e7f7 b.n 800ed30 <memmove+0x24>
0800ed40 <_sbrk_r>:
800ed40: b538 push {r3, r4, r5, lr}
800ed42: 2300 movs r3, #0
800ed44: 4d05 ldr r5, [pc, #20] @ (800ed5c <_sbrk_r+0x1c>)
800ed46: 4604 mov r4, r0
800ed48: 4608 mov r0, r1
800ed4a: 602b str r3, [r5, #0]
800ed4c: f7f6 f98e bl 800506c <_sbrk>
800ed50: 1c43 adds r3, r0, #1
800ed52: d102 bne.n 800ed5a <_sbrk_r+0x1a>
800ed54: 682b ldr r3, [r5, #0]
800ed56: b103 cbz r3, 800ed5a <_sbrk_r+0x1a>
800ed58: 6023 str r3, [r4, #0]
800ed5a: bd38 pop {r3, r4, r5, pc}
800ed5c: 20001894 .word 0x20001894
0800ed60 <memchr>:
800ed60: 4603 mov r3, r0
800ed62: b510 push {r4, lr}
800ed64: b2c9 uxtb r1, r1
800ed66: 4402 add r2, r0
800ed68: 4293 cmp r3, r2
800ed6a: 4618 mov r0, r3
800ed6c: d101 bne.n 800ed72 <memchr+0x12>
800ed6e: 2000 movs r0, #0
800ed70: e003 b.n 800ed7a <memchr+0x1a>
800ed72: 7804 ldrb r4, [r0, #0]
800ed74: 3301 adds r3, #1
800ed76: 428c cmp r4, r1
800ed78: d1f6 bne.n 800ed68 <memchr+0x8>
800ed7a: bd10 pop {r4, pc}
0800ed7c <memcpy>:
800ed7c: 440a add r2, r1
800ed7e: 4291 cmp r1, r2
800ed80: f100 33ff add.w r3, r0, #4294967295
800ed84: d100 bne.n 800ed88 <memcpy+0xc>
800ed86: 4770 bx lr
800ed88: b510 push {r4, lr}
800ed8a: f811 4b01 ldrb.w r4, [r1], #1
800ed8e: 4291 cmp r1, r2
800ed90: f803 4f01 strb.w r4, [r3, #1]!
800ed94: d1f9 bne.n 800ed8a <memcpy+0xe>
800ed96: bd10 pop {r4, pc}
0800ed98 <_realloc_r>:
800ed98: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800ed9c: 4607 mov r7, r0
800ed9e: 4614 mov r4, r2
800eda0: 460d mov r5, r1
800eda2: b921 cbnz r1, 800edae <_realloc_r+0x16>
800eda4: 4611 mov r1, r2
800eda6: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800edaa: f7ff bc3b b.w 800e624 <_malloc_r>
800edae: b92a cbnz r2, 800edbc <_realloc_r+0x24>
800edb0: f7ff fbce bl 800e550 <_free_r>
800edb4: 4625 mov r5, r4
800edb6: 4628 mov r0, r5
800edb8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800edbc: f000 f81a bl 800edf4 <_malloc_usable_size_r>
800edc0: 4284 cmp r4, r0
800edc2: 4606 mov r6, r0
800edc4: d802 bhi.n 800edcc <_realloc_r+0x34>
800edc6: ebb4 0f50 cmp.w r4, r0, lsr #1
800edca: d8f4 bhi.n 800edb6 <_realloc_r+0x1e>
800edcc: 4621 mov r1, r4
800edce: 4638 mov r0, r7
800edd0: f7ff fc28 bl 800e624 <_malloc_r>
800edd4: 4680 mov r8, r0
800edd6: b908 cbnz r0, 800eddc <_realloc_r+0x44>
800edd8: 4645 mov r5, r8
800edda: e7ec b.n 800edb6 <_realloc_r+0x1e>
800eddc: 42b4 cmp r4, r6
800edde: 4622 mov r2, r4
800ede0: 4629 mov r1, r5
800ede2: bf28 it cs
800ede4: 4632 movcs r2, r6
800ede6: f7ff ffc9 bl 800ed7c <memcpy>
800edea: 4629 mov r1, r5
800edec: 4638 mov r0, r7
800edee: f7ff fbaf bl 800e550 <_free_r>
800edf2: e7f1 b.n 800edd8 <_realloc_r+0x40>
0800edf4 <_malloc_usable_size_r>:
800edf4: f851 3c04 ldr.w r3, [r1, #-4]
800edf8: 1f18 subs r0, r3, #4
800edfa: 2b00 cmp r3, #0
800edfc: bfbc itt lt
800edfe: 580b ldrlt r3, [r1, r0]
800ee00: 18c0 addlt r0, r0, r3
800ee02: 4770 bx lr
0800ee04 <_init>:
800ee04: b5f8 push {r3, r4, r5, r6, r7, lr}
800ee06: bf00 nop
800ee08: bcf8 pop {r3, r4, r5, r6, r7}
800ee0a: bc08 pop {r3}
800ee0c: 469e mov lr, r3
800ee0e: 4770 bx lr
0800ee10 <_fini>:
800ee10: b5f8 push {r3, r4, r5, r6, r7, lr}
800ee12: bf00 nop
800ee14: bcf8 pop {r3, r4, r5, r6, r7}
800ee16: bc08 pop {r3}
800ee18: 469e mov lr, r3
800ee1a: 4770 bx lr
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