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792e63b21c4821bd0e6ee2353c3897d4f8a35a79
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
andrea 792e63b21c wip
2025-12-07 21:39:26 +01:00

27037 lines
1008 KiB
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AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000ae08 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000224 0800af14 0800af14 0000bf14 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800b138 0800b138 0000d1d0 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800b138 0800b138 0000c138 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800b140 0800b140 0000d1d0 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800b140 0800b140 0000c140 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800b144 0800b144 0000c144 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001d0 20000000 0800b148 0000d000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 0000160c 200001d0 0800b318 0000d1d0 2**3
ALLOC
10 ._user_heap_stack 00000604 200017dc 0800b318 0000d7dc 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 0000d1d0 2**0
CONTENTS, READONLY
12 .debug_info 00017707 00000000 00000000 0000d1f9 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 0000416c 00000000 00000000 00024900 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 00001540 00000000 00000000 00028a70 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00001040 00000000 00000000 00029fb0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001c2ee 00000000 00000000 0002aff0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001b49d 00000000 00000000 000472de 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 000953dd 00000000 00000000 0006277b 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 000f7b58 2**0
CONTENTS, READONLY
20 .debug_frame 00005c58 00000000 00000000 000f7b9c 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 000fd7f4 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001d0 .word 0x200001d0
8000128: 00000000 .word 0x00000000
800012c: 0800aefc .word 0x0800aefc
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001d4 .word 0x200001d4
8000148: 0800aefc .word 0x0800aefc
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <EEW_Read>:
EE_Status EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data);
EE_Status EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
/* Pseudo-array accessor */
static inline EE_Status EEW_Read(uint8_t idx, uint16_t *value)
{
800015c: b580 push {r7, lr}
800015e: b082 sub sp, #8
8000160: af00 add r7, sp, #0
8000162: 4603 mov r3, r0
8000164: 6039 str r1, [r7, #0]
8000166: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000168: 79fb ldrb r3, [r7, #7]
800016a: b29b uxth r3, r3
800016c: 3301 adds r3, #1
800016e: b29b uxth r3, r3
8000170: 6839 ldr r1, [r7, #0]
8000172: 4618 mov r0, r3
8000174: f000 fdde bl 8000d34 <EE_ReadVariable>
8000178: 4603 mov r3, r0
}
800017a: 4618 mov r0, r3
800017c: 3708 adds r7, #8
800017e: 46bd mov sp, r7
8000180: bd80 pop {r7, pc}
08000182 <EEW_Write>:
static inline EE_Status EEW_Write(uint8_t idx, uint16_t value)
{
8000182: b580 push {r7, lr}
8000184: b082 sub sp, #8
8000186: af00 add r7, sp, #0
8000188: 4603 mov r3, r0
800018a: 460a mov r2, r1
800018c: 71fb strb r3, [r7, #7]
800018e: 4613 mov r3, r2
8000190: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
8000192: 79fb ldrb r3, [r7, #7]
8000194: b29b uxth r3, r3
8000196: 3301 adds r3, #1
8000198: b29b uxth r3, r3
800019a: 88ba ldrh r2, [r7, #4]
800019c: 4611 mov r1, r2
800019e: 4618 mov r0, r3
80001a0: f000 fde2 bl 8000d68 <EE_WriteVariable>
80001a4: 4603 mov r3, r0
}
80001a6: 4618 mov r0, r3
80001a8: 3708 adds r7, #8
80001aa: 46bd mov sp, r7
80001ac: bd80 pop {r7, pc}
080001ae <toHex>:
extern TIM_HandleTypeDef htim1;
extern TIM_HandleTypeDef htim2;
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim4;
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80001ae: b490 push {r4, r7}
80001b0: b082 sub sp, #8
80001b2: af00 add r7, sp, #0
80001b4: 4604 mov r4, r0
80001b6: 4608 mov r0, r1
80001b8: 4611 mov r1, r2
80001ba: 461a mov r2, r3
80001bc: 4623 mov r3, r4
80001be: 71fb strb r3, [r7, #7]
80001c0: 4603 mov r3, r0
80001c2: 71bb strb r3, [r7, #6]
80001c4: 460b mov r3, r1
80001c6: 717b strb r3, [r7, #5]
80001c8: 4613 mov r3, r2
80001ca: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80001cc: 79fb ldrb r3, [r7, #7]
80001ce: 2b2f cmp r3, #47 @ 0x2f
80001d0: d906 bls.n 80001e0 <toHex+0x32>
80001d2: 79fb ldrb r3, [r7, #7]
80001d4: 2b39 cmp r3, #57 @ 0x39
80001d6: d803 bhi.n 80001e0 <toHex+0x32>
c1-='0';
80001d8: 79fb ldrb r3, [r7, #7]
80001da: 3b30 subs r3, #48 @ 0x30
80001dc: 71fb strb r3, [r7, #7]
80001de: e00b b.n 80001f8 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80001e0: 79fb ldrb r3, [r7, #7]
80001e2: 2b60 cmp r3, #96 @ 0x60
80001e4: d906 bls.n 80001f4 <toHex+0x46>
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 2b66 cmp r3, #102 @ 0x66
80001ea: d803 bhi.n 80001f4 <toHex+0x46>
c1=(c1-'a')+10;
80001ec: 79fb ldrb r3, [r7, #7]
80001ee: 3b57 subs r3, #87 @ 0x57
80001f0: 71fb strb r3, [r7, #7]
80001f2: e001 b.n 80001f8 <toHex+0x4a>
}else return false;
80001f4: 2300 movs r3, #0
80001f6: e079 b.n 80002ec <toHex+0x13e>
if((c2>='0')&&(c2<='9')){
80001f8: 79bb ldrb r3, [r7, #6]
80001fa: 2b2f cmp r3, #47 @ 0x2f
80001fc: d906 bls.n 800020c <toHex+0x5e>
80001fe: 79bb ldrb r3, [r7, #6]
8000200: 2b39 cmp r3, #57 @ 0x39
8000202: d803 bhi.n 800020c <toHex+0x5e>
c2-='0';
8000204: 79bb ldrb r3, [r7, #6]
8000206: 3b30 subs r3, #48 @ 0x30
8000208: 71bb strb r3, [r7, #6]
800020a: e00b b.n 8000224 <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
800020c: 79bb ldrb r3, [r7, #6]
800020e: 2b60 cmp r3, #96 @ 0x60
8000210: d906 bls.n 8000220 <toHex+0x72>
8000212: 79bb ldrb r3, [r7, #6]
8000214: 2b66 cmp r3, #102 @ 0x66
8000216: d803 bhi.n 8000220 <toHex+0x72>
c2=(c2-'a')+10;
8000218: 79bb ldrb r3, [r7, #6]
800021a: 3b57 subs r3, #87 @ 0x57
800021c: 71bb strb r3, [r7, #6]
800021e: e001 b.n 8000224 <toHex+0x76>
}else return false;
8000220: 2300 movs r3, #0
8000222: e063 b.n 80002ec <toHex+0x13e>
if((c3>='0')&&(c3<='9')){
8000224: 797b ldrb r3, [r7, #5]
8000226: 2b2f cmp r3, #47 @ 0x2f
8000228: d906 bls.n 8000238 <toHex+0x8a>
800022a: 797b ldrb r3, [r7, #5]
800022c: 2b39 cmp r3, #57 @ 0x39
800022e: d803 bhi.n 8000238 <toHex+0x8a>
c3-='0';
8000230: 797b ldrb r3, [r7, #5]
8000232: 3b30 subs r3, #48 @ 0x30
8000234: 717b strb r3, [r7, #5]
8000236: e00b b.n 8000250 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000238: 797b ldrb r3, [r7, #5]
800023a: 2b60 cmp r3, #96 @ 0x60
800023c: d906 bls.n 800024c <toHex+0x9e>
800023e: 797b ldrb r3, [r7, #5]
8000240: 2b66 cmp r3, #102 @ 0x66
8000242: d803 bhi.n 800024c <toHex+0x9e>
c3=(c3-'a')+10;
8000244: 797b ldrb r3, [r7, #5]
8000246: 3b57 subs r3, #87 @ 0x57
8000248: 717b strb r3, [r7, #5]
800024a: e001 b.n 8000250 <toHex+0xa2>
}else return false;
800024c: 2300 movs r3, #0
800024e: e04d b.n 80002ec <toHex+0x13e>
if((c4>='0')&&(c4<='9')){
8000250: 793b ldrb r3, [r7, #4]
8000252: 2b2f cmp r3, #47 @ 0x2f
8000254: d906 bls.n 8000264 <toHex+0xb6>
8000256: 793b ldrb r3, [r7, #4]
8000258: 2b39 cmp r3, #57 @ 0x39
800025a: d803 bhi.n 8000264 <toHex+0xb6>
c4-='0';
800025c: 793b ldrb r3, [r7, #4]
800025e: 3b30 subs r3, #48 @ 0x30
8000260: 713b strb r3, [r7, #4]
8000262: e00b b.n 800027c <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
8000264: 793b ldrb r3, [r7, #4]
8000266: 2b60 cmp r3, #96 @ 0x60
8000268: d906 bls.n 8000278 <toHex+0xca>
800026a: 793b ldrb r3, [r7, #4]
800026c: 2b66 cmp r3, #102 @ 0x66
800026e: d803 bhi.n 8000278 <toHex+0xca>
c4=(c4-'a')+10;
8000270: 793b ldrb r3, [r7, #4]
8000272: 3b57 subs r3, #87 @ 0x57
8000274: 713b strb r3, [r7, #4]
8000276: e001 b.n 800027c <toHex+0xce>
}else return false;
8000278: 2300 movs r3, #0
800027a: e037 b.n 80002ec <toHex+0x13e>
*retval=c1;
800027c: 79fb ldrb r3, [r7, #7]
800027e: b29a uxth r2, r3
8000280: 693b ldr r3, [r7, #16]
8000282: 801a strh r2, [r3, #0]
*retval*=10;
8000284: 693b ldr r3, [r7, #16]
8000286: 881b ldrh r3, [r3, #0]
8000288: 461a mov r2, r3
800028a: 0092 lsls r2, r2, #2
800028c: 4413 add r3, r2
800028e: 005b lsls r3, r3, #1
8000290: b29a uxth r2, r3
8000292: 693b ldr r3, [r7, #16]
8000294: 801a strh r2, [r3, #0]
*retval+=c2;
8000296: 693b ldr r3, [r7, #16]
8000298: 881a ldrh r2, [r3, #0]
800029a: 79bb ldrb r3, [r7, #6]
800029c: b29b uxth r3, r3
800029e: 4413 add r3, r2
80002a0: b29a uxth r2, r3
80002a2: 693b ldr r3, [r7, #16]
80002a4: 801a strh r2, [r3, #0]
*retval*=10;
80002a6: 693b ldr r3, [r7, #16]
80002a8: 881b ldrh r3, [r3, #0]
80002aa: 461a mov r2, r3
80002ac: 0092 lsls r2, r2, #2
80002ae: 4413 add r3, r2
80002b0: 005b lsls r3, r3, #1
80002b2: b29a uxth r2, r3
80002b4: 693b ldr r3, [r7, #16]
80002b6: 801a strh r2, [r3, #0]
*retval+=c3;
80002b8: 693b ldr r3, [r7, #16]
80002ba: 881a ldrh r2, [r3, #0]
80002bc: 797b ldrb r3, [r7, #5]
80002be: b29b uxth r3, r3
80002c0: 4413 add r3, r2
80002c2: b29a uxth r2, r3
80002c4: 693b ldr r3, [r7, #16]
80002c6: 801a strh r2, [r3, #0]
*retval*=10;
80002c8: 693b ldr r3, [r7, #16]
80002ca: 881b ldrh r3, [r3, #0]
80002cc: 461a mov r2, r3
80002ce: 0092 lsls r2, r2, #2
80002d0: 4413 add r3, r2
80002d2: 005b lsls r3, r3, #1
80002d4: b29a uxth r2, r3
80002d6: 693b ldr r3, [r7, #16]
80002d8: 801a strh r2, [r3, #0]
*retval+=c4;
80002da: 693b ldr r3, [r7, #16]
80002dc: 881a ldrh r2, [r3, #0]
80002de: 793b ldrb r3, [r7, #4]
80002e0: b29b uxth r3, r3
80002e2: 4413 add r3, r2
80002e4: b29a uxth r2, r3
80002e6: 693b ldr r3, [r7, #16]
80002e8: 801a strh r2, [r3, #0]
return true;
80002ea: 2301 movs r3, #1
}
80002ec: 4618 mov r0, r3
80002ee: 3708 adds r7, #8
80002f0: 46bd mov sp, r7
80002f2: bc90 pop {r4, r7}
80002f4: 4770 bx lr
...
080002f8 <manageCDC>:
void manageCDC(void){
80002f8: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
80002fc: b0a7 sub sp, #156 @ 0x9c
80002fe: af06 add r7, sp, #24
unsigned char s[100];
uint8_t mot,dir,dm,m,c,d,u;
uint16_t val;
uint16_t eeadd;
if (CDC_Available()) {
8000300: f009 fc98 bl 8009c34 <CDC_Available>
8000304: 4603 mov r3, r0
8000306: 2b00 cmp r3, #0
8000308: f000 8353 beq.w 80009b2 <manageCDC+0x6ba>
int rx = CDC_ReadByte();
800030c: f009 fca6 bl 8009c5c <CDC_ReadByte>
8000310: 67b8 str r0, [r7, #120] @ 0x78
if (rx < 0) return;
8000312: 6fbb ldr r3, [r7, #120] @ 0x78
8000314: 2b00 cmp r3, #0
8000316: f2c0 834b blt.w 80009b0 <manageCDC+0x6b8>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
800031a: 4b82 ldr r3, [pc, #520] @ (8000524 <manageCDC+0x22c>)
800031c: 781b ldrb r3, [r3, #0]
800031e: 461a mov r2, r3
8000320: 6fbb ldr r3, [r7, #120] @ 0x78
8000322: b2d9 uxtb r1, r3
8000324: 4b80 ldr r3, [pc, #512] @ (8000528 <manageCDC+0x230>)
8000326: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
8000328: bf00 nop
800032a: 4b7e ldr r3, [pc, #504] @ (8000524 <manageCDC+0x22c>)
800032c: 781b ldrb r3, [r3, #0]
800032e: 461a mov r2, r3
8000330: 4b7d ldr r3, [pc, #500] @ (8000528 <manageCDC+0x230>)
8000332: 4413 add r3, r2
8000334: 2101 movs r1, #1
8000336: 4618 mov r0, r3
8000338: f009 fd52 bl 8009de0 <CDC_Transmit_FS>
800033c: 4603 mov r3, r0
800033e: 2b01 cmp r3, #1
8000340: d0f3 beq.n 800032a <manageCDC+0x32>
if((rx==0x0d)||(rx==0x0a)){
8000342: 6fbb ldr r3, [r7, #120] @ 0x78
8000344: 2b0d cmp r3, #13
8000346: d003 beq.n 8000350 <manageCDC+0x58>
8000348: 6fbb ldr r3, [r7, #120] @ 0x78
800034a: 2b0a cmp r3, #10
800034c: f040 8329 bne.w 80009a2 <manageCDC+0x6aa>
if(rxidx){
8000350: 4b74 ldr r3, [pc, #464] @ (8000524 <manageCDC+0x22c>)
8000352: 781b ldrb r3, [r3, #0]
8000354: 2b00 cmp r3, #0
8000356: f000 8320 beq.w 800099a <manageCDC+0x6a2>
switch(rxbuf[0]){
800035a: 4b73 ldr r3, [pc, #460] @ (8000528 <manageCDC+0x230>)
800035c: 781b ldrb r3, [r3, #0]
800035e: 2b6d cmp r3, #109 @ 0x6d
8000360: f000 80a5 beq.w 80004ae <manageCDC+0x1b6>
8000364: 2b6d cmp r3, #109 @ 0x6d
8000366: f300 8307 bgt.w 8000978 <manageCDC+0x680>
800036a: 2b65 cmp r3, #101 @ 0x65
800036c: f000 81c6 beq.w 80006fc <manageCDC+0x404>
8000370: 2b69 cmp r3, #105 @ 0x69
8000372: f040 8301 bne.w 8000978 <manageCDC+0x680>
case 'i':
sprintf((char*)s,"\ninfo");
8000376: f107 030c add.w r3, r7, #12
800037a: 496c ldr r1, [pc, #432] @ (800052c <manageCDC+0x234>)
800037c: 4618 mov r0, r3
800037e: f00a f90d bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000382: bf00 nop
8000384: f107 030c add.w r3, r7, #12
8000388: 2105 movs r1, #5
800038a: 4618 mov r0, r3
800038c: f009 fd28 bl 8009de0 <CDC_Transmit_FS>
8000390: 4603 mov r3, r0
8000392: 2b01 cmp r3, #1
8000394: d0f6 beq.n 8000384 <manageCDC+0x8c>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
8000396: 2100 movs r1, #0
8000398: 4865 ldr r0, [pc, #404] @ (8000530 <manageCDC+0x238>)
800039a: f001 f85b bl 8001454 <IsPwmRunning>
800039e: 4603 mov r3, r0
80003a0: 4698 mov r8, r3
80003a2: 2104 movs r1, #4
80003a4: 4862 ldr r0, [pc, #392] @ (8000530 <manageCDC+0x238>)
80003a6: f001 f855 bl 8001454 <IsPwmRunning>
80003aa: 4603 mov r3, r0
80003ac: 4699 mov r9, r3
80003ae: 2108 movs r1, #8
80003b0: 485f ldr r0, [pc, #380] @ (8000530 <manageCDC+0x238>)
80003b2: f001 f84f bl 8001454 <IsPwmRunning>
80003b6: 4603 mov r3, r0
80003b8: 461c mov r4, r3
80003ba: 210c movs r1, #12
80003bc: 485c ldr r0, [pc, #368] @ (8000530 <manageCDC+0x238>)
80003be: f001 f849 bl 8001454 <IsPwmRunning>
80003c2: 4603 mov r3, r0
80003c4: 461d mov r5, r3
80003c6: 2100 movs r1, #0
80003c8: 485a ldr r0, [pc, #360] @ (8000534 <manageCDC+0x23c>)
80003ca: f001 f843 bl 8001454 <IsPwmRunning>
80003ce: 4603 mov r3, r0
80003d0: 461e mov r6, r3
80003d2: 2104 movs r1, #4
80003d4: 4857 ldr r0, [pc, #348] @ (8000534 <manageCDC+0x23c>)
80003d6: f001 f83d bl 8001454 <IsPwmRunning>
80003da: 4603 mov r3, r0
80003dc: 607b str r3, [r7, #4]
80003de: 2108 movs r1, #8
80003e0: 4854 ldr r0, [pc, #336] @ (8000534 <manageCDC+0x23c>)
80003e2: f001 f837 bl 8001454 <IsPwmRunning>
80003e6: 4603 mov r3, r0
80003e8: 603b str r3, [r7, #0]
80003ea: 210c movs r1, #12
80003ec: 4851 ldr r0, [pc, #324] @ (8000534 <manageCDC+0x23c>)
80003ee: f001 f831 bl 8001454 <IsPwmRunning>
80003f2: 4603 mov r3, r0
80003f4: f107 000c add.w r0, r7, #12
80003f8: 9305 str r3, [sp, #20]
80003fa: 683a ldr r2, [r7, #0]
80003fc: 9204 str r2, [sp, #16]
80003fe: 687b ldr r3, [r7, #4]
8000400: 9303 str r3, [sp, #12]
8000402: 9602 str r6, [sp, #8]
8000404: 9501 str r5, [sp, #4]
8000406: 9400 str r4, [sp, #0]
8000408: 464b mov r3, r9
800040a: 4642 mov r2, r8
800040c: 494a ldr r1, [pc, #296] @ (8000538 <manageCDC+0x240>)
800040e: f00a f8c5 bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000412: bf00 nop
8000414: f107 030c add.w r3, r7, #12
8000418: 4618 mov r0, r3
800041a: f7ff fe97 bl 800014c <strlen>
800041e: 4603 mov r3, r0
8000420: b29a uxth r2, r3
8000422: f107 030c add.w r3, r7, #12
8000426: 4611 mov r1, r2
8000428: 4618 mov r0, r3
800042a: f009 fcd9 bl 8009de0 <CDC_Transmit_FS>
800042e: 4603 mov r3, r0
8000430: 2b01 cmp r3, #1
8000432: d0ef beq.n 8000414 <manageCDC+0x11c>
__HAL_TIM_GET_COMPARE(&htim3, TIM_CHANNEL_1);
8000434: 4b41 ldr r3, [pc, #260] @ (800053c <manageCDC+0x244>)
8000436: 681b ldr r3, [r3, #0]
8000438: 6b5b ldr r3, [r3, #52] @ 0x34
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
800043a: 4b3d ldr r3, [pc, #244] @ (8000530 <manageCDC+0x238>)
800043c: 681b ldr r3, [r3, #0]
800043e: 6b5b ldr r3, [r3, #52] @ 0x34
8000440: 607b str r3, [r7, #4]
8000442: 4b3b ldr r3, [pc, #236] @ (8000530 <manageCDC+0x238>)
8000444: 681b ldr r3, [r3, #0]
8000446: 6b99 ldr r1, [r3, #56] @ 0x38
8000448: 6039 str r1, [r7, #0]
800044a: 4b39 ldr r3, [pc, #228] @ (8000530 <manageCDC+0x238>)
800044c: 681b ldr r3, [r3, #0]
800044e: 6bdb ldr r3, [r3, #60] @ 0x3c
8000450: 4a37 ldr r2, [pc, #220] @ (8000530 <manageCDC+0x238>)
8000452: 6812 ldr r2, [r2, #0]
8000454: 6c12 ldr r2, [r2, #64] @ 0x40
8000456: 4937 ldr r1, [pc, #220] @ (8000534 <manageCDC+0x23c>)
8000458: 6809 ldr r1, [r1, #0]
800045a: 6b49 ldr r1, [r1, #52] @ 0x34
800045c: 4835 ldr r0, [pc, #212] @ (8000534 <manageCDC+0x23c>)
800045e: 6800 ldr r0, [r0, #0]
8000460: 6b80 ldr r0, [r0, #56] @ 0x38
8000462: 4c34 ldr r4, [pc, #208] @ (8000534 <manageCDC+0x23c>)
8000464: 6824 ldr r4, [r4, #0]
8000466: 6be4 ldr r4, [r4, #60] @ 0x3c
8000468: 4d32 ldr r5, [pc, #200] @ (8000534 <manageCDC+0x23c>)
800046a: 682d ldr r5, [r5, #0]
800046c: 6c2d ldr r5, [r5, #64] @ 0x40
800046e: f107 060c add.w r6, r7, #12
8000472: 9505 str r5, [sp, #20]
8000474: 9404 str r4, [sp, #16]
8000476: 9003 str r0, [sp, #12]
8000478: 9102 str r1, [sp, #8]
800047a: 9201 str r2, [sp, #4]
800047c: 9300 str r3, [sp, #0]
800047e: 683b ldr r3, [r7, #0]
8000480: 687a ldr r2, [r7, #4]
8000482: 492f ldr r1, [pc, #188] @ (8000540 <manageCDC+0x248>)
8000484: 4630 mov r0, r6
8000486: f00a f889 bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800048a: bf00 nop
800048c: f107 030c add.w r3, r7, #12
8000490: 4618 mov r0, r3
8000492: f7ff fe5b bl 800014c <strlen>
8000496: 4603 mov r3, r0
8000498: b29a uxth r2, r3
800049a: f107 030c add.w r3, r7, #12
800049e: 4611 mov r1, r2
80004a0: 4618 mov r0, r3
80004a2: f009 fc9d bl 8009de0 <CDC_Transmit_FS>
80004a6: 4603 mov r3, r0
80004a8: 2b01 cmp r3, #1
80004aa: d0ef beq.n 800048c <manageCDC+0x194>
break;
80004ac: e275 b.n 800099a <manageCDC+0x6a2>
case 'm':
if(rxidx==8){
80004ae: 4b1d ldr r3, [pc, #116] @ (8000524 <manageCDC+0x22c>)
80004b0: 781b ldrb r3, [r3, #0]
80004b2: 2b08 cmp r3, #8
80004b4: f040 8110 bne.w 80006d8 <manageCDC+0x3e0>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
80004b8: 4b1b ldr r3, [pc, #108] @ (8000528 <manageCDC+0x230>)
80004ba: 785b ldrb r3, [r3, #1]
80004bc: 2b30 cmp r3, #48 @ 0x30
80004be: f240 80fa bls.w 80006b6 <manageCDC+0x3be>
80004c2: 4b19 ldr r3, [pc, #100] @ (8000528 <manageCDC+0x230>)
80004c4: 785b ldrb r3, [r3, #1]
80004c6: 2b34 cmp r3, #52 @ 0x34
80004c8: f200 80f5 bhi.w 80006b6 <manageCDC+0x3be>
mot=rxbuf[1]-='0';
80004cc: 4b16 ldr r3, [pc, #88] @ (8000528 <manageCDC+0x230>)
80004ce: 785b ldrb r3, [r3, #1]
80004d0: 3b30 subs r3, #48 @ 0x30
80004d2: b2da uxtb r2, r3
80004d4: 4b14 ldr r3, [pc, #80] @ (8000528 <manageCDC+0x230>)
80004d6: 705a strb r2, [r3, #1]
80004d8: 4b13 ldr r3, [pc, #76] @ (8000528 <manageCDC+0x230>)
80004da: 785b ldrb r3, [r3, #1]
80004dc: f887 3077 strb.w r3, [r7, #119] @ 0x77
if(rxbuf[2]=='f'){
80004e0: 4b11 ldr r3, [pc, #68] @ (8000528 <manageCDC+0x230>)
80004e2: 789b ldrb r3, [r3, #2]
80004e4: 2b66 cmp r3, #102 @ 0x66
80004e6: d103 bne.n 80004f0 <manageCDC+0x1f8>
dir=FW;
80004e8: 2300 movs r3, #0
80004ea: f887 307f strb.w r3, [r7, #127] @ 0x7f
80004ee: e02b b.n 8000548 <manageCDC+0x250>
}else if(rxbuf[2]=='b'){
80004f0: 4b0d ldr r3, [pc, #52] @ (8000528 <manageCDC+0x230>)
80004f2: 789b ldrb r3, [r3, #2]
80004f4: 2b62 cmp r3, #98 @ 0x62
80004f6: d103 bne.n 8000500 <manageCDC+0x208>
dir=BW;
80004f8: 2301 movs r3, #1
80004fa: f887 307f strb.w r3, [r7, #127] @ 0x7f
80004fe: e023 b.n 8000548 <manageCDC+0x250>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
8000500: f107 030c add.w r3, r7, #12
8000504: 490f ldr r1, [pc, #60] @ (8000544 <manageCDC+0x24c>)
8000506: 4618 mov r0, r3
8000508: f00a f848 bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
800050c: bf00 nop
800050e: f107 030c add.w r3, r7, #12
8000512: 2110 movs r1, #16
8000514: 4618 mov r0, r3
8000516: f009 fc63 bl 8009de0 <CDC_Transmit_FS>
800051a: 4603 mov r3, r0
800051c: 2b01 cmp r3, #1
800051e: d0f6 beq.n 800050e <manageCDC+0x216>
break;
8000520: e23b b.n 800099a <manageCDC+0x6a2>
8000522: bf00 nop
8000524: 200001ec .word 0x200001ec
8000528: 200001f0 .word 0x200001f0
800052c: 0800af14 .word 0x0800af14
8000530: 20000284 .word 0x20000284
8000534: 200002cc .word 0x200002cc
8000538: 0800af1c .word 0x0800af1c
800053c: 2000035c .word 0x2000035c
8000540: 0800af34 .word 0x0800af34
8000544: 0800af68 .word 0x0800af68
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000548: 4ba3 ldr r3, [pc, #652] @ (80007d8 <manageCDC+0x4e0>)
800054a: 78db ldrb r3, [r3, #3]
800054c: 2b2f cmp r3, #47 @ 0x2f
800054e: f240 80a1 bls.w 8000694 <manageCDC+0x39c>
8000552: 4ba1 ldr r3, [pc, #644] @ (80007d8 <manageCDC+0x4e0>)
8000554: 78db ldrb r3, [r3, #3]
8000556: 2b39 cmp r3, #57 @ 0x39
8000558: f200 809c bhi.w 8000694 <manageCDC+0x39c>
800055c: 4b9e ldr r3, [pc, #632] @ (80007d8 <manageCDC+0x4e0>)
800055e: 791b ldrb r3, [r3, #4]
8000560: 2b2f cmp r3, #47 @ 0x2f
8000562: f240 8097 bls.w 8000694 <manageCDC+0x39c>
8000566: 4b9c ldr r3, [pc, #624] @ (80007d8 <manageCDC+0x4e0>)
8000568: 791b ldrb r3, [r3, #4]
800056a: 2b39 cmp r3, #57 @ 0x39
800056c: f200 8092 bhi.w 8000694 <manageCDC+0x39c>
8000570: 4b99 ldr r3, [pc, #612] @ (80007d8 <manageCDC+0x4e0>)
8000572: 795b ldrb r3, [r3, #5]
8000574: 2b2f cmp r3, #47 @ 0x2f
8000576: f240 808d bls.w 8000694 <manageCDC+0x39c>
800057a: 4b97 ldr r3, [pc, #604] @ (80007d8 <manageCDC+0x4e0>)
800057c: 795b ldrb r3, [r3, #5]
800057e: 2b39 cmp r3, #57 @ 0x39
8000580: f200 8088 bhi.w 8000694 <manageCDC+0x39c>
8000584: 4b94 ldr r3, [pc, #592] @ (80007d8 <manageCDC+0x4e0>)
8000586: 799b ldrb r3, [r3, #6]
8000588: 2b2f cmp r3, #47 @ 0x2f
800058a: f240 8083 bls.w 8000694 <manageCDC+0x39c>
800058e: 4b92 ldr r3, [pc, #584] @ (80007d8 <manageCDC+0x4e0>)
8000590: 799b ldrb r3, [r3, #6]
8000592: 2b39 cmp r3, #57 @ 0x39
8000594: d87e bhi.n 8000694 <manageCDC+0x39c>
8000596: 4b90 ldr r3, [pc, #576] @ (80007d8 <manageCDC+0x4e0>)
8000598: 79db ldrb r3, [r3, #7]
800059a: 2b2f cmp r3, #47 @ 0x2f
800059c: d97a bls.n 8000694 <manageCDC+0x39c>
800059e: 4b8e ldr r3, [pc, #568] @ (80007d8 <manageCDC+0x4e0>)
80005a0: 79db ldrb r3, [r3, #7]
80005a2: 2b39 cmp r3, #57 @ 0x39
80005a4: d876 bhi.n 8000694 <manageCDC+0x39c>
dm=rxbuf[3]-='0';
80005a6: 4b8c ldr r3, [pc, #560] @ (80007d8 <manageCDC+0x4e0>)
80005a8: 78db ldrb r3, [r3, #3]
80005aa: 3b30 subs r3, #48 @ 0x30
80005ac: b2da uxtb r2, r3
80005ae: 4b8a ldr r3, [pc, #552] @ (80007d8 <manageCDC+0x4e0>)
80005b0: 70da strb r2, [r3, #3]
80005b2: 4b89 ldr r3, [pc, #548] @ (80007d8 <manageCDC+0x4e0>)
80005b4: 78db ldrb r3, [r3, #3]
80005b6: f887 3076 strb.w r3, [r7, #118] @ 0x76
m=rxbuf[4]-='0';
80005ba: 4b87 ldr r3, [pc, #540] @ (80007d8 <manageCDC+0x4e0>)
80005bc: 791b ldrb r3, [r3, #4]
80005be: 3b30 subs r3, #48 @ 0x30
80005c0: b2da uxtb r2, r3
80005c2: 4b85 ldr r3, [pc, #532] @ (80007d8 <manageCDC+0x4e0>)
80005c4: 711a strb r2, [r3, #4]
80005c6: 4b84 ldr r3, [pc, #528] @ (80007d8 <manageCDC+0x4e0>)
80005c8: 791b ldrb r3, [r3, #4]
80005ca: f887 3075 strb.w r3, [r7, #117] @ 0x75
c=rxbuf[5]-='0';
80005ce: 4b82 ldr r3, [pc, #520] @ (80007d8 <manageCDC+0x4e0>)
80005d0: 795b ldrb r3, [r3, #5]
80005d2: 3b30 subs r3, #48 @ 0x30
80005d4: b2da uxtb r2, r3
80005d6: 4b80 ldr r3, [pc, #512] @ (80007d8 <manageCDC+0x4e0>)
80005d8: 715a strb r2, [r3, #5]
80005da: 4b7f ldr r3, [pc, #508] @ (80007d8 <manageCDC+0x4e0>)
80005dc: 795b ldrb r3, [r3, #5]
80005de: f887 3074 strb.w r3, [r7, #116] @ 0x74
d=rxbuf[6]-='0';
80005e2: 4b7d ldr r3, [pc, #500] @ (80007d8 <manageCDC+0x4e0>)
80005e4: 799b ldrb r3, [r3, #6]
80005e6: 3b30 subs r3, #48 @ 0x30
80005e8: b2da uxtb r2, r3
80005ea: 4b7b ldr r3, [pc, #492] @ (80007d8 <manageCDC+0x4e0>)
80005ec: 719a strb r2, [r3, #6]
80005ee: 4b7a ldr r3, [pc, #488] @ (80007d8 <manageCDC+0x4e0>)
80005f0: 799b ldrb r3, [r3, #6]
80005f2: f887 3073 strb.w r3, [r7, #115] @ 0x73
u=rxbuf[7]-='0';
80005f6: 4b78 ldr r3, [pc, #480] @ (80007d8 <manageCDC+0x4e0>)
80005f8: 79db ldrb r3, [r3, #7]
80005fa: 3b30 subs r3, #48 @ 0x30
80005fc: b2da uxtb r2, r3
80005fe: 4b76 ldr r3, [pc, #472] @ (80007d8 <manageCDC+0x4e0>)
8000600: 71da strb r2, [r3, #7]
8000602: 4b75 ldr r3, [pc, #468] @ (80007d8 <manageCDC+0x4e0>)
8000604: 79db ldrb r3, [r3, #7]
8000606: f887 3072 strb.w r3, [r7, #114] @ 0x72
val=dm;
800060a: f897 3076 ldrb.w r3, [r7, #118] @ 0x76
800060e: b29b uxth r3, r3
8000610: 817b strh r3, [r7, #10]
val*=10;
8000612: 897b ldrh r3, [r7, #10]
8000614: 461a mov r2, r3
8000616: 0092 lsls r2, r2, #2
8000618: 4413 add r3, r2
800061a: 005b lsls r3, r3, #1
800061c: b29b uxth r3, r3
800061e: 817b strh r3, [r7, #10]
val+=m;
8000620: f897 3075 ldrb.w r3, [r7, #117] @ 0x75
8000624: b29a uxth r2, r3
8000626: 897b ldrh r3, [r7, #10]
8000628: 4413 add r3, r2
800062a: b29b uxth r3, r3
800062c: 817b strh r3, [r7, #10]
val*=10;
800062e: 897b ldrh r3, [r7, #10]
8000630: 461a mov r2, r3
8000632: 0092 lsls r2, r2, #2
8000634: 4413 add r3, r2
8000636: 005b lsls r3, r3, #1
8000638: b29b uxth r3, r3
800063a: 817b strh r3, [r7, #10]
val+=c;
800063c: f897 3074 ldrb.w r3, [r7, #116] @ 0x74
8000640: b29a uxth r2, r3
8000642: 897b ldrh r3, [r7, #10]
8000644: 4413 add r3, r2
8000646: b29b uxth r3, r3
8000648: 817b strh r3, [r7, #10]
val*=10;
800064a: 897b ldrh r3, [r7, #10]
800064c: 461a mov r2, r3
800064e: 0092 lsls r2, r2, #2
8000650: 4413 add r3, r2
8000652: 005b lsls r3, r3, #1
8000654: b29b uxth r3, r3
8000656: 817b strh r3, [r7, #10]
val+=d;
8000658: f897 3073 ldrb.w r3, [r7, #115] @ 0x73
800065c: b29a uxth r2, r3
800065e: 897b ldrh r3, [r7, #10]
8000660: 4413 add r3, r2
8000662: b29b uxth r3, r3
8000664: 817b strh r3, [r7, #10]
val*=10;
8000666: 897b ldrh r3, [r7, #10]
8000668: 461a mov r2, r3
800066a: 0092 lsls r2, r2, #2
800066c: 4413 add r3, r2
800066e: 005b lsls r3, r3, #1
8000670: b29b uxth r3, r3
8000672: 817b strh r3, [r7, #10]
val+=u;
8000674: f897 3072 ldrb.w r3, [r7, #114] @ 0x72
8000678: b29a uxth r2, r3
800067a: 897b ldrh r3, [r7, #10]
800067c: 4413 add r3, r2
800067e: b29b uxth r3, r3
8000680: 817b strh r3, [r7, #10]
SetMot(mot,dir,val);
8000682: 897a ldrh r2, [r7, #10]
8000684: f897 107f ldrb.w r1, [r7, #127] @ 0x7f
8000688: f897 3077 ldrb.w r3, [r7, #119] @ 0x77
800068c: 4618 mov r0, r3
800068e: f000 ff57 bl 8001540 <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000692: e032 b.n 80006fa <manageCDC+0x402>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
8000694: f107 030c add.w r3, r7, #12
8000698: 4950 ldr r1, [pc, #320] @ (80007dc <manageCDC+0x4e4>)
800069a: 4618 mov r0, r3
800069c: f009 ff7e bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
80006a0: bf00 nop
80006a2: f107 030c add.w r3, r7, #12
80006a6: 2113 movs r1, #19
80006a8: 4618 mov r0, r3
80006aa: f009 fb99 bl 8009de0 <CDC_Transmit_FS>
80006ae: 4603 mov r3, r0
80006b0: 2b01 cmp r3, #1
80006b2: d0f6 beq.n 80006a2 <manageCDC+0x3aa>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
80006b4: e021 b.n 80006fa <manageCDC+0x402>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
80006b6: f107 030c add.w r3, r7, #12
80006ba: 4949 ldr r1, [pc, #292] @ (80007e0 <manageCDC+0x4e8>)
80006bc: 4618 mov r0, r3
80006be: f009 ff6d bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
80006c2: bf00 nop
80006c4: f107 030c add.w r3, r7, #12
80006c8: 2113 movs r1, #19
80006ca: 4618 mov r0, r3
80006cc: f009 fb88 bl 8009de0 <CDC_Transmit_FS>
80006d0: 4603 mov r3, r0
80006d2: 2b01 cmp r3, #1
80006d4: d0f6 beq.n 80006c4 <manageCDC+0x3cc>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
80006d6: e160 b.n 800099a <manageCDC+0x6a2>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
80006d8: f107 030c add.w r3, r7, #12
80006dc: 4941 ldr r1, [pc, #260] @ (80007e4 <manageCDC+0x4ec>)
80006de: 4618 mov r0, r3
80006e0: f009 ff5c bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80006e4: bf00 nop
80006e6: f107 030c add.w r3, r7, #12
80006ea: 210a movs r1, #10
80006ec: 4618 mov r0, r3
80006ee: f009 fb77 bl 8009de0 <CDC_Transmit_FS>
80006f2: 4603 mov r3, r0
80006f4: 2b01 cmp r3, #1
80006f6: d0f6 beq.n 80006e6 <manageCDC+0x3ee>
break;
80006f8: e14f b.n 800099a <manageCDC+0x6a2>
80006fa: e14e b.n 800099a <manageCDC+0x6a2>
case 'e':
if(rxidx>1){
80006fc: 4b3a ldr r3, [pc, #232] @ (80007e8 <manageCDC+0x4f0>)
80006fe: 781b ldrb r3, [r3, #0]
8000700: 2b01 cmp r3, #1
8000702: f240 8121 bls.w 8000948 <manageCDC+0x650>
if(rxbuf[1]=='r'){
8000706: 4b34 ldr r3, [pc, #208] @ (80007d8 <manageCDC+0x4e0>)
8000708: 785b ldrb r3, [r3, #1]
800070a: 2b72 cmp r3, #114 @ 0x72
800070c: d174 bne.n 80007f8 <manageCDC+0x500>
if(rxidx==4){
800070e: 4b36 ldr r3, [pc, #216] @ (80007e8 <manageCDC+0x4f0>)
8000710: 781b ldrb r3, [r3, #0]
8000712: 2b04 cmp r3, #4
8000714: d148 bne.n 80007a8 <manageCDC+0x4b0>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000716: 4b30 ldr r3, [pc, #192] @ (80007d8 <manageCDC+0x4e0>)
8000718: 789a ldrb r2, [r3, #2]
800071a: 4b2f ldr r3, [pc, #188] @ (80007d8 <manageCDC+0x4e0>)
800071c: 78d9 ldrb r1, [r3, #3]
800071e: f107 0308 add.w r3, r7, #8
8000722: 9300 str r3, [sp, #0]
8000724: 460b mov r3, r1
8000726: 2130 movs r1, #48 @ 0x30
8000728: 2030 movs r0, #48 @ 0x30
800072a: f7ff fd40 bl 80001ae <toHex>
800072e: 4603 mov r3, r0
8000730: 2b00 cmp r3, #0
8000732: d021 beq.n 8000778 <manageCDC+0x480>
EEW_Read(eeadd, &val);
8000734: 893b ldrh r3, [r7, #8]
8000736: b2db uxtb r3, r3
8000738: f107 020a add.w r2, r7, #10
800073c: 4611 mov r1, r2
800073e: 4618 mov r0, r3
8000740: f7ff fd0c bl 800015c <EEW_Read>
sprintf((char*)s,"\nee 0x%02x=%04x",eeadd,val);
8000744: 893b ldrh r3, [r7, #8]
8000746: 461a mov r2, r3
8000748: 897b ldrh r3, [r7, #10]
800074a: f107 000c add.w r0, r7, #12
800074e: 4927 ldr r1, [pc, #156] @ (80007ec <manageCDC+0x4f4>)
8000750: f009 ff24 bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000754: bf00 nop
8000756: f107 030c add.w r3, r7, #12
800075a: 4618 mov r0, r3
800075c: f7ff fcf6 bl 800014c <strlen>
8000760: 4603 mov r3, r0
8000762: b29a uxth r2, r3
8000764: f107 030c add.w r3, r7, #12
8000768: 4611 mov r1, r2
800076a: 4618 mov r0, r3
800076c: f009 fb38 bl 8009de0 <CDC_Transmit_FS>
8000770: 4603 mov r3, r0
8000772: 2b01 cmp r3, #1
8000774: d0ef beq.n 8000756 <manageCDC+0x45e>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
8000776: e110 b.n 800099a <manageCDC+0x6a2>
sprintf((char*)s,"\n?eraa hex values");
8000778: f107 030c add.w r3, r7, #12
800077c: 491c ldr r1, [pc, #112] @ (80007f0 <manageCDC+0x4f8>)
800077e: 4618 mov r0, r3
8000780: f009 ff0c bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000784: bf00 nop
8000786: f107 030c add.w r3, r7, #12
800078a: 4618 mov r0, r3
800078c: f7ff fcde bl 800014c <strlen>
8000790: 4603 mov r3, r0
8000792: b29a uxth r2, r3
8000794: f107 030c add.w r3, r7, #12
8000798: 4611 mov r1, r2
800079a: 4618 mov r0, r3
800079c: f009 fb20 bl 8009de0 <CDC_Transmit_FS>
80007a0: 4603 mov r3, r0
80007a2: 2b01 cmp r3, #1
80007a4: d0ef beq.n 8000786 <manageCDC+0x48e>
break;
80007a6: e0f8 b.n 800099a <manageCDC+0x6a2>
sprintf((char*)s,"\n?eraa");
80007a8: f107 030c add.w r3, r7, #12
80007ac: 4911 ldr r1, [pc, #68] @ (80007f4 <manageCDC+0x4fc>)
80007ae: 4618 mov r0, r3
80007b0: f009 fef4 bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80007b4: bf00 nop
80007b6: f107 030c add.w r3, r7, #12
80007ba: 4618 mov r0, r3
80007bc: f7ff fcc6 bl 800014c <strlen>
80007c0: 4603 mov r3, r0
80007c2: b29a uxth r2, r3
80007c4: f107 030c add.w r3, r7, #12
80007c8: 4611 mov r1, r2
80007ca: 4618 mov r0, r3
80007cc: f009 fb08 bl 8009de0 <CDC_Transmit_FS>
80007d0: 4603 mov r3, r0
80007d2: 2b01 cmp r3, #1
80007d4: d0ef beq.n 80007b6 <manageCDC+0x4be>
break;
80007d6: e0e0 b.n 800099a <manageCDC+0x6a2>
80007d8: 200001f0 .word 0x200001f0
80007dc: 0800af7c .word 0x0800af7c
80007e0: 0800af9c .word 0x0800af9c
80007e4: 0800afb0 .word 0x0800afb0
80007e8: 200001ec .word 0x200001ec
80007ec: 0800afbc .word 0x0800afbc
80007f0: 0800afcc .word 0x0800afcc
80007f4: 0800afe0 .word 0x0800afe0
}else if(rxbuf[1]=='w'){
80007f8: 4b70 ldr r3, [pc, #448] @ (80009bc <manageCDC+0x6c4>)
80007fa: 785b ldrb r3, [r3, #1]
80007fc: 2b77 cmp r3, #119 @ 0x77
80007fe: f040 808b bne.w 8000918 <manageCDC+0x620>
if(rxidx==8){
8000802: 4b6f ldr r3, [pc, #444] @ (80009c0 <manageCDC+0x6c8>)
8000804: 781b ldrb r3, [r3, #0]
8000806: 2b08 cmp r3, #8
8000808: d16e bne.n 80008e8 <manageCDC+0x5f0>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
800080a: 4b6c ldr r3, [pc, #432] @ (80009bc <manageCDC+0x6c4>)
800080c: 789a ldrb r2, [r3, #2]
800080e: 4b6b ldr r3, [pc, #428] @ (80009bc <manageCDC+0x6c4>)
8000810: 78d9 ldrb r1, [r3, #3]
8000812: f107 0308 add.w r3, r7, #8
8000816: 9300 str r3, [sp, #0]
8000818: 460b mov r3, r1
800081a: 2130 movs r1, #48 @ 0x30
800081c: 2030 movs r0, #48 @ 0x30
800081e: f7ff fcc6 bl 80001ae <toHex>
8000822: 4603 mov r3, r0
8000824: 2b00 cmp r3, #0
8000826: d047 beq.n 80008b8 <manageCDC+0x5c0>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
8000828: 4b64 ldr r3, [pc, #400] @ (80009bc <manageCDC+0x6c4>)
800082a: 7918 ldrb r0, [r3, #4]
800082c: 4b63 ldr r3, [pc, #396] @ (80009bc <manageCDC+0x6c4>)
800082e: 7959 ldrb r1, [r3, #5]
8000830: 4b62 ldr r3, [pc, #392] @ (80009bc <manageCDC+0x6c4>)
8000832: 799a ldrb r2, [r3, #6]
8000834: 4b61 ldr r3, [pc, #388] @ (80009bc <manageCDC+0x6c4>)
8000836: 79dc ldrb r4, [r3, #7]
8000838: f107 030a add.w r3, r7, #10
800083c: 9300 str r3, [sp, #0]
800083e: 4623 mov r3, r4
8000840: f7ff fcb5 bl 80001ae <toHex>
8000844: 4603 mov r3, r0
8000846: 2b00 cmp r3, #0
8000848: d01e beq.n 8000888 <manageCDC+0x590>
EEW_Write(eeadd, val);
800084a: 893b ldrh r3, [r7, #8]
800084c: b2db uxtb r3, r3
800084e: 897a ldrh r2, [r7, #10]
8000850: 4611 mov r1, r2
8000852: 4618 mov r0, r3
8000854: f7ff fc95 bl 8000182 <EEW_Write>
sprintf((char*)s,"\ndone");
8000858: f107 030c add.w r3, r7, #12
800085c: 4959 ldr r1, [pc, #356] @ (80009c4 <manageCDC+0x6cc>)
800085e: 4618 mov r0, r3
8000860: f009 fe9c bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000864: bf00 nop
8000866: f107 030c add.w r3, r7, #12
800086a: 4618 mov r0, r3
800086c: f7ff fc6e bl 800014c <strlen>
8000870: 4603 mov r3, r0
8000872: b29a uxth r2, r3
8000874: f107 030c add.w r3, r7, #12
8000878: 4611 mov r1, r2
800087a: 4618 mov r0, r3
800087c: f009 fab0 bl 8009de0 <CDC_Transmit_FS>
8000880: 4603 mov r3, r0
8000882: 2b01 cmp r3, #1
8000884: d0ef beq.n 8000866 <manageCDC+0x56e>
break;
8000886: e088 b.n 800099a <manageCDC+0x6a2>
sprintf((char*)s,"\n?ewaavvvv hex values");
8000888: f107 030c add.w r3, r7, #12
800088c: 494e ldr r1, [pc, #312] @ (80009c8 <manageCDC+0x6d0>)
800088e: 4618 mov r0, r3
8000890: f009 fe84 bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000894: bf00 nop
8000896: f107 030c add.w r3, r7, #12
800089a: 4618 mov r0, r3
800089c: f7ff fc56 bl 800014c <strlen>
80008a0: 4603 mov r3, r0
80008a2: b29a uxth r2, r3
80008a4: f107 030c add.w r3, r7, #12
80008a8: 4611 mov r1, r2
80008aa: 4618 mov r0, r3
80008ac: f009 fa98 bl 8009de0 <CDC_Transmit_FS>
80008b0: 4603 mov r3, r0
80008b2: 2b01 cmp r3, #1
80008b4: d0ef beq.n 8000896 <manageCDC+0x59e>
break;
80008b6: e070 b.n 800099a <manageCDC+0x6a2>
sprintf((char*)s,"\n?ewaa hex values");
80008b8: f107 030c add.w r3, r7, #12
80008bc: 4943 ldr r1, [pc, #268] @ (80009cc <manageCDC+0x6d4>)
80008be: 4618 mov r0, r3
80008c0: f009 fe6c bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80008c4: bf00 nop
80008c6: f107 030c add.w r3, r7, #12
80008ca: 4618 mov r0, r3
80008cc: f7ff fc3e bl 800014c <strlen>
80008d0: 4603 mov r3, r0
80008d2: b29a uxth r2, r3
80008d4: f107 030c add.w r3, r7, #12
80008d8: 4611 mov r1, r2
80008da: 4618 mov r0, r3
80008dc: f009 fa80 bl 8009de0 <CDC_Transmit_FS>
80008e0: 4603 mov r3, r0
80008e2: 2b01 cmp r3, #1
80008e4: d0ef beq.n 80008c6 <manageCDC+0x5ce>
break;
80008e6: e058 b.n 800099a <manageCDC+0x6a2>
sprintf((char*)s,"\n?ewaavvvv");
80008e8: f107 030c add.w r3, r7, #12
80008ec: 4938 ldr r1, [pc, #224] @ (80009d0 <manageCDC+0x6d8>)
80008ee: 4618 mov r0, r3
80008f0: f009 fe54 bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80008f4: bf00 nop
80008f6: f107 030c add.w r3, r7, #12
80008fa: 4618 mov r0, r3
80008fc: f7ff fc26 bl 800014c <strlen>
8000900: 4603 mov r3, r0
8000902: b29a uxth r2, r3
8000904: f107 030c add.w r3, r7, #12
8000908: 4611 mov r1, r2
800090a: 4618 mov r0, r3
800090c: f009 fa68 bl 8009de0 <CDC_Transmit_FS>
8000910: 4603 mov r3, r0
8000912: 2b01 cmp r3, #1
8000914: d0ef beq.n 80008f6 <manageCDC+0x5fe>
break;
8000916: e040 b.n 800099a <manageCDC+0x6a2>
sprintf((char*)s,"\n?er|w");
8000918: f107 030c add.w r3, r7, #12
800091c: 492d ldr r1, [pc, #180] @ (80009d4 <manageCDC+0x6dc>)
800091e: 4618 mov r0, r3
8000920: f009 fe3c bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000924: bf00 nop
8000926: f107 030c add.w r3, r7, #12
800092a: 4618 mov r0, r3
800092c: f7ff fc0e bl 800014c <strlen>
8000930: 4603 mov r3, r0
8000932: b29a uxth r2, r3
8000934: f107 030c add.w r3, r7, #12
8000938: 4611 mov r1, r2
800093a: 4618 mov r0, r3
800093c: f009 fa50 bl 8009de0 <CDC_Transmit_FS>
8000940: 4603 mov r3, r0
8000942: 2b01 cmp r3, #1
8000944: d0ef beq.n 8000926 <manageCDC+0x62e>
break;
8000946: e028 b.n 800099a <manageCDC+0x6a2>
sprintf((char*)s,"\n?eraa | ewaavvvv");
8000948: f107 030c add.w r3, r7, #12
800094c: 4922 ldr r1, [pc, #136] @ (80009d8 <manageCDC+0x6e0>)
800094e: 4618 mov r0, r3
8000950: f009 fe24 bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000954: bf00 nop
8000956: f107 030c add.w r3, r7, #12
800095a: 4618 mov r0, r3
800095c: f7ff fbf6 bl 800014c <strlen>
8000960: 4603 mov r3, r0
8000962: b29a uxth r2, r3
8000964: f107 030c add.w r3, r7, #12
8000968: 4611 mov r1, r2
800096a: 4618 mov r0, r3
800096c: f009 fa38 bl 8009de0 <CDC_Transmit_FS>
8000970: 4603 mov r3, r0
8000972: 2b01 cmp r3, #1
8000974: d0ef beq.n 8000956 <manageCDC+0x65e>
break;
8000976: e010 b.n 800099a <manageCDC+0x6a2>
default:
sprintf((char*)s,"\n?");
8000978: f107 030c add.w r3, r7, #12
800097c: 4917 ldr r1, [pc, #92] @ (80009dc <manageCDC+0x6e4>)
800097e: 4618 mov r0, r3
8000980: f009 fe0c bl 800a59c <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8000984: bf00 nop
8000986: f107 030c add.w r3, r7, #12
800098a: 2102 movs r1, #2
800098c: 4618 mov r0, r3
800098e: f009 fa27 bl 8009de0 <CDC_Transmit_FS>
8000992: 4603 mov r3, r0
8000994: 2b01 cmp r3, #1
8000996: d0f6 beq.n 8000986 <manageCDC+0x68e>
break;
8000998: bf00 nop
}
}
rxidx=0;
800099a: 4b09 ldr r3, [pc, #36] @ (80009c0 <manageCDC+0x6c8>)
800099c: 2200 movs r2, #0
800099e: 701a strb r2, [r3, #0]
80009a0: e007 b.n 80009b2 <manageCDC+0x6ba>
}else rxidx++;
80009a2: 4b07 ldr r3, [pc, #28] @ (80009c0 <manageCDC+0x6c8>)
80009a4: 781b ldrb r3, [r3, #0]
80009a6: 3301 adds r3, #1
80009a8: b2da uxtb r2, r3
80009aa: 4b05 ldr r3, [pc, #20] @ (80009c0 <manageCDC+0x6c8>)
80009ac: 701a strb r2, [r3, #0]
80009ae: e000 b.n 80009b2 <manageCDC+0x6ba>
if (rx < 0) return;
80009b0: bf00 nop
// tiny spin or yield
}
}
80009b2: 3784 adds r7, #132 @ 0x84
80009b4: 46bd mov sp, r7
80009b6: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
80009ba: bf00 nop
80009bc: 200001f0 .word 0x200001f0
80009c0: 200001ec .word 0x200001ec
80009c4: 0800afe8 .word 0x0800afe8
80009c8: 0800aff0 .word 0x0800aff0
80009cc: 0800b008 .word 0x0800b008
80009d0: 0800b01c .word 0x0800b01c
80009d4: 0800b028 .word 0x0800b028
80009d8: 0800b030 .word 0x0800b030
80009dc: 0800b044 .word 0x0800b044
080009e0 <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
80009e0: b480 push {r7}
80009e2: b083 sub sp, #12
80009e4: af00 add r7, sp, #0
80009e6: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
80009e8: 687b ldr r3, [r7, #4]
80009ea: 881b ldrh r3, [r3, #0]
80009ec: b29b uxth r3, r3
}
80009ee: 4618 mov r0, r3
80009f0: 370c adds r7, #12
80009f2: 46bd mov sp, r7
80009f4: bc80 pop {r7}
80009f6: 4770 bx lr
080009f8 <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
80009f8: b5b0 push {r4, r5, r7, lr}
80009fa: b084 sub sp, #16
80009fc: af00 add r7, sp, #0
80009fe: 6078 str r0, [r7, #4]
8000a00: 460b mov r3, r1
8000a02: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
8000a04: f001 fcf6 bl 80023f4 <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
8000a08: 887b ldrh r3, [r7, #2]
8000a0a: 2200 movs r2, #0
8000a0c: 461c mov r4, r3
8000a0e: 4615 mov r5, r2
8000a10: 4622 mov r2, r4
8000a12: 462b mov r3, r5
8000a14: 6879 ldr r1, [r7, #4]
8000a16: 2001 movs r0, #1
8000a18: f001 fc7c bl 8002314 <HAL_FLASH_Program>
8000a1c: 4603 mov r3, r0
8000a1e: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
8000a20: f001 fd0e bl 8002440 <HAL_FLASH_Lock>
return status;
8000a24: 7bfb ldrb r3, [r7, #15]
}
8000a26: 4618 mov r0, r3
8000a28: 3710 adds r7, #16
8000a2a: 46bd mov sp, r7
8000a2c: bdb0 pop {r4, r5, r7, pc}
08000a2e <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
8000a2e: b580 push {r7, lr}
8000a30: b088 sub sp, #32
8000a32: af00 add r7, sp, #0
8000a34: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8000a36: 2300 movs r3, #0
8000a38: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
8000a3a: f001 fcdb bl 80023f4 <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
8000a3e: 2300 movs r3, #0
8000a40: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
8000a42: 687b ldr r3, [r7, #4]
8000a44: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8000a46: 2301 movs r3, #1
8000a48: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
8000a4a: f107 0208 add.w r2, r7, #8
8000a4e: f107 030c add.w r3, r7, #12
8000a52: 4611 mov r1, r2
8000a54: 4618 mov r0, r3
8000a56: f001 fdb5 bl 80025c4 <HAL_FLASHEx_Erase>
8000a5a: 4603 mov r3, r0
8000a5c: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
8000a5e: f001 fcef bl 8002440 <HAL_FLASH_Lock>
return status;
8000a62: 7ffb ldrb r3, [r7, #31]
}
8000a64: 4618 mov r0, r3
8000a66: 3720 adds r7, #32
8000a68: 46bd mov sp, r7
8000a6a: bd80 pop {r7, pc}
08000a6c <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
8000a6c: b480 push {r7}
8000a6e: b087 sub sp, #28
8000a70: af00 add r7, sp, #0
8000a72: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8000a74: 687b ldr r3, [r7, #4]
8000a76: 3302 adds r3, #2
8000a78: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8000a7a: 687b ldr r3, [r7, #4]
8000a7c: f503 6380 add.w r3, r3, #1024 @ 0x400
8000a80: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8000a82: e00c b.n 8000a9e <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8000a84: 697b ldr r3, [r7, #20]
8000a86: 881b ldrh r3, [r3, #0]
8000a88: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
8000a8a: 89fb ldrh r3, [r7, #14]
8000a8c: f64f 72ff movw r2, #65535 @ 0xffff
8000a90: 4293 cmp r3, r2
8000a92: d101 bne.n 8000a98 <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
8000a94: 697b ldr r3, [r7, #20]
8000a96: e008 b.n 8000aaa <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
8000a98: 697b ldr r3, [r7, #20]
8000a9a: 3304 adds r3, #4
8000a9c: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8000a9e: 693b ldr r3, [r7, #16]
8000aa0: 3b03 subs r3, #3
8000aa2: 697a ldr r2, [r7, #20]
8000aa4: 429a cmp r2, r3
8000aa6: d3ed bcc.n 8000a84 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
8000aa8: 2300 movs r3, #0
}
8000aaa: 4618 mov r0, r3
8000aac: 371c adds r7, #28
8000aae: 46bd mov sp, r7
8000ab0: bc80 pop {r7}
8000ab2: 4770 bx lr
08000ab4 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
8000ab4: b480 push {r7}
8000ab6: b089 sub sp, #36 @ 0x24
8000ab8: af00 add r7, sp, #0
8000aba: 60f8 str r0, [r7, #12]
8000abc: 460b mov r3, r1
8000abe: 607a str r2, [r7, #4]
8000ac0: 817b strh r3, [r7, #10]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8000ac2: 68fb ldr r3, [r7, #12]
8000ac4: f503 6380 add.w r3, r3, #1024 @ 0x400
8000ac8: 61bb str r3, [r7, #24]
uint32_t addr;
if (Data == NULL)
8000aca: 687b ldr r3, [r7, #4]
8000acc: 2b00 cmp r3, #0
8000ace: d101 bne.n 8000ad4 <EE_FindInPage+0x20>
return EE_ERROR;
8000ad0: 2301 movs r3, #1
8000ad2: e022 b.n 8000b1a <EE_FindInPage+0x66>
/* Start from last possible record and go backwards */
for (addr = pageEnd - sizeof(EE_Record_t); addr > pageBase + 1U; addr -= sizeof(EE_Record_t))
8000ad4: 69bb ldr r3, [r7, #24]
8000ad6: 3b04 subs r3, #4
8000ad8: 61fb str r3, [r7, #28]
8000ada: e018 b.n 8000b0e <EE_FindInPage+0x5a>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8000adc: 69fb ldr r3, [r7, #28]
8000ade: 881b ldrh r3, [r3, #0]
8000ae0: 82fb strh r3, [r7, #22]
uint16_t value = *(__IO uint16_t *)(addr + 2U);
8000ae2: 69fb ldr r3, [r7, #28]
8000ae4: 3302 adds r3, #2
8000ae6: 881b ldrh r3, [r3, #0]
8000ae8: 82bb strh r3, [r7, #20]
if (vaddr == 0xFFFFU)
8000aea: 8afb ldrh r3, [r7, #22]
8000aec: f64f 72ff movw r2, #65535 @ 0xffff
8000af0: 4293 cmp r3, r2
8000af2: d008 beq.n 8000b06 <EE_FindInPage+0x52>
{
/* Empty slot, skip */
continue;
}
if (vaddr == VirtAddress)
8000af4: 8afa ldrh r2, [r7, #22]
8000af6: 897b ldrh r3, [r7, #10]
8000af8: 429a cmp r2, r3
8000afa: d105 bne.n 8000b08 <EE_FindInPage+0x54>
{
*Data = value;
8000afc: 687b ldr r3, [r7, #4]
8000afe: 8aba ldrh r2, [r7, #20]
8000b00: 801a strh r2, [r3, #0]
return EE_OK;
8000b02: 2300 movs r3, #0
8000b04: e009 b.n 8000b1a <EE_FindInPage+0x66>
continue;
8000b06: bf00 nop
for (addr = pageEnd - sizeof(EE_Record_t); addr > pageBase + 1U; addr -= sizeof(EE_Record_t))
8000b08: 69fb ldr r3, [r7, #28]
8000b0a: 3b04 subs r3, #4
8000b0c: 61fb str r3, [r7, #28]
8000b0e: 68fb ldr r3, [r7, #12]
8000b10: 3301 adds r3, #1
8000b12: 69fa ldr r2, [r7, #28]
8000b14: 429a cmp r2, r3
8000b16: d8e1 bhi.n 8000adc <EE_FindInPage+0x28>
}
}
return EE_NOT_FOUND;
8000b18: 2302 movs r3, #2
}
8000b1a: 4618 mov r0, r3
8000b1c: 3724 adds r7, #36 @ 0x24
8000b1e: 46bd mov sp, r7
8000b20: bc80 pop {r7}
8000b22: 4770 bx lr
08000b24 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8000b24: b580 push {r7, lr}
8000b26: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
8000b28: 480f ldr r0, [pc, #60] @ (8000b68 <EE_Format+0x44>)
8000b2a: f7ff ff80 bl 8000a2e <EE_FlashErasePage>
8000b2e: 4603 mov r3, r0
8000b30: 2b00 cmp r3, #0
8000b32: d001 beq.n 8000b38 <EE_Format+0x14>
return EE_ERROR;
8000b34: 2301 movs r3, #1
8000b36: e015 b.n 8000b64 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
8000b38: 480c ldr r0, [pc, #48] @ (8000b6c <EE_Format+0x48>)
8000b3a: f7ff ff78 bl 8000a2e <EE_FlashErasePage>
8000b3e: 4603 mov r3, r0
8000b40: 2b00 cmp r3, #0
8000b42: d001 beq.n 8000b48 <EE_Format+0x24>
return EE_ERROR;
8000b44: 2301 movs r3, #1
8000b46: e00d b.n 8000b64 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
8000b48: f64a 21aa movw r1, #43690 @ 0xaaaa
8000b4c: 4806 ldr r0, [pc, #24] @ (8000b68 <EE_Format+0x44>)
8000b4e: f7ff ff53 bl 80009f8 <EE_FlashProgramHalfWord>
8000b52: 4603 mov r3, r0
8000b54: 2b00 cmp r3, #0
8000b56: d001 beq.n 8000b5c <EE_Format+0x38>
return EE_ERROR;
8000b58: 2301 movs r3, #1
8000b5a: e003 b.n 8000b64 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
8000b5c: 4b04 ldr r3, [pc, #16] @ (8000b70 <EE_Format+0x4c>)
8000b5e: 4a02 ldr r2, [pc, #8] @ (8000b68 <EE_Format+0x44>)
8000b60: 601a str r2, [r3, #0]
return EE_OK;
8000b62: 2300 movs r3, #0
}
8000b64: 4618 mov r0, r3
8000b66: bd80 pop {r7, pc}
8000b68: 0800f800 .word 0x0800f800
8000b6c: 0800fc00 .word 0x0800fc00
8000b70: 20000000 .word 0x20000000
08000b74 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8000b74: b480 push {r7}
8000b76: b083 sub sp, #12
8000b78: af00 add r7, sp, #0
8000b7a: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
8000b7c: 687b ldr r3, [r7, #4]
8000b7e: 4a05 ldr r2, [pc, #20] @ (8000b94 <EE_GetOtherPageBase+0x20>)
8000b80: 4293 cmp r3, r2
8000b82: d101 bne.n 8000b88 <EE_GetOtherPageBase+0x14>
8000b84: 4b04 ldr r3, [pc, #16] @ (8000b98 <EE_GetOtherPageBase+0x24>)
8000b86: e000 b.n 8000b8a <EE_GetOtherPageBase+0x16>
8000b88: 4b02 ldr r3, [pc, #8] @ (8000b94 <EE_GetOtherPageBase+0x20>)
}
8000b8a: 4618 mov r0, r3
8000b8c: 370c adds r7, #12
8000b8e: 46bd mov sp, r7
8000b90: bc80 pop {r7}
8000b92: 4770 bx lr
8000b94: 0800f800 .word 0x0800f800
8000b98: 0800fc00 .word 0x0800fc00
08000b9c <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
8000b9c: b580 push {r7, lr}
8000b9e: b088 sub sp, #32
8000ba0: af00 add r7, sp, #0
8000ba2: 4603 mov r3, r0
8000ba4: 460a mov r2, r1
8000ba6: 80fb strh r3, [r7, #6]
8000ba8: 4613 mov r3, r2
8000baa: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
8000bac: 4b3c ldr r3, [pc, #240] @ (8000ca0 <EE_PageTransfer+0x104>)
8000bae: 681b ldr r3, [r3, #0]
8000bb0: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
8000bb2: 6978 ldr r0, [r7, #20]
8000bb4: f7ff ffde bl 8000b74 <EE_GetOtherPageBase>
8000bb8: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
8000bba: 6938 ldr r0, [r7, #16]
8000bbc: f7ff ff37 bl 8000a2e <EE_FlashErasePage>
8000bc0: 4603 mov r3, r0
8000bc2: 2b00 cmp r3, #0
8000bc4: d001 beq.n 8000bca <EE_PageTransfer+0x2e>
return EE_ERROR;
8000bc6: 2301 movs r3, #1
8000bc8: e065 b.n 8000c96 <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
8000bca: f245 5155 movw r1, #21845 @ 0x5555
8000bce: 6938 ldr r0, [r7, #16]
8000bd0: f7ff ff12 bl 80009f8 <EE_FlashProgramHalfWord>
8000bd4: 4603 mov r3, r0
8000bd6: 2b00 cmp r3, #0
8000bd8: d001 beq.n 8000bde <EE_PageTransfer+0x42>
return EE_ERROR;
8000bda: 2301 movs r3, #1
8000bdc: e05b b.n 8000c96 <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
8000bde: 693b ldr r3, [r7, #16]
8000be0: 3302 adds r3, #2
8000be2: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8000be4: 2300 movs r3, #0
8000be6: 837b strh r3, [r7, #26]
8000be8: e03c b.n 8000c64 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
8000bea: 8b7b ldrh r3, [r7, #26]
8000bec: 4a2d ldr r2, [pc, #180] @ (8000ca4 <EE_PageTransfer+0x108>)
8000bee: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8000bf2: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
8000bf4: 89fa ldrh r2, [r7, #14]
8000bf6: 88fb ldrh r3, [r7, #6]
8000bf8: 429a cmp r2, r3
8000bfa: d102 bne.n 8000c02 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
8000bfc: 88bb ldrh r3, [r7, #4]
8000bfe: 817b strh r3, [r7, #10]
8000c00: e00b b.n 8000c1a <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8000c02: f107 020a add.w r2, r7, #10
8000c06: 89fb ldrh r3, [r7, #14]
8000c08: 4619 mov r1, r3
8000c0a: 6978 ldr r0, [r7, #20]
8000c0c: f7ff ff52 bl 8000ab4 <EE_FindInPage>
8000c10: 4603 mov r3, r0
8000c12: 737b strb r3, [r7, #13]
if (st != EE_OK)
8000c14: 7b7b ldrb r3, [r7, #13]
8000c16: 2b00 cmp r3, #0
8000c18: d120 bne.n 8000c5c <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
8000c1a: 89fb ldrh r3, [r7, #14]
8000c1c: 4619 mov r1, r3
8000c1e: 69f8 ldr r0, [r7, #28]
8000c20: f7ff feea bl 80009f8 <EE_FlashProgramHalfWord>
8000c24: 4603 mov r3, r0
8000c26: 2b00 cmp r3, #0
8000c28: d001 beq.n 8000c2e <EE_PageTransfer+0x92>
return EE_ERROR;
8000c2a: 2301 movs r3, #1
8000c2c: e033 b.n 8000c96 <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
8000c2e: 69fb ldr r3, [r7, #28]
8000c30: 3302 adds r3, #2
8000c32: 897a ldrh r2, [r7, #10]
8000c34: 4611 mov r1, r2
8000c36: 4618 mov r0, r3
8000c38: f7ff fede bl 80009f8 <EE_FlashProgramHalfWord>
8000c3c: 4603 mov r3, r0
8000c3e: 2b00 cmp r3, #0
8000c40: d001 beq.n 8000c46 <EE_PageTransfer+0xaa>
return EE_ERROR;
8000c42: 2301 movs r3, #1
8000c44: e027 b.n 8000c96 <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
8000c46: 69fb ldr r3, [r7, #28]
8000c48: 3304 adds r3, #4
8000c4a: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
8000c4c: 693b ldr r3, [r7, #16]
8000c4e: f503 6380 add.w r3, r3, #1024 @ 0x400
8000c52: 69fa ldr r2, [r7, #28]
8000c54: 429a cmp r2, r3
8000c56: d302 bcc.n 8000c5e <EE_PageTransfer+0xc2>
return EE_NO_SPACE;
8000c58: 2303 movs r3, #3
8000c5a: e01c b.n 8000c96 <EE_PageTransfer+0xfa>
continue;
8000c5c: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8000c5e: 8b7b ldrh r3, [r7, #26]
8000c60: 3301 adds r3, #1
8000c62: 837b strh r3, [r7, #26]
8000c64: 8b7b ldrh r3, [r7, #26]
8000c66: 2b1f cmp r3, #31
8000c68: d9bf bls.n 8000bea <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
8000c6a: 6978 ldr r0, [r7, #20]
8000c6c: f7ff fedf bl 8000a2e <EE_FlashErasePage>
8000c70: 4603 mov r3, r0
8000c72: 2b00 cmp r3, #0
8000c74: d001 beq.n 8000c7a <EE_PageTransfer+0xde>
return EE_ERROR;
8000c76: 2301 movs r3, #1
8000c78: e00d b.n 8000c96 <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
8000c7a: f64a 21aa movw r1, #43690 @ 0xaaaa
8000c7e: 6938 ldr r0, [r7, #16]
8000c80: f7ff feba bl 80009f8 <EE_FlashProgramHalfWord>
8000c84: 4603 mov r3, r0
8000c86: 2b00 cmp r3, #0
8000c88: d001 beq.n 8000c8e <EE_PageTransfer+0xf2>
return EE_ERROR;
8000c8a: 2301 movs r3, #1
8000c8c: e003 b.n 8000c96 <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
8000c8e: 4a04 ldr r2, [pc, #16] @ (8000ca0 <EE_PageTransfer+0x104>)
8000c90: 693b ldr r3, [r7, #16]
8000c92: 6013 str r3, [r2, #0]
return EE_OK;
8000c94: 2300 movs r3, #0
}
8000c96: 4618 mov r0, r3
8000c98: 3720 adds r7, #32
8000c9a: 46bd mov sp, r7
8000c9c: bd80 pop {r7, pc}
8000c9e: bf00 nop
8000ca0: 20000000 .word 0x20000000
8000ca4: 0800b098 .word 0x0800b098
08000ca8 <EE_Init>:
* Initialize the EEPROM emulation.
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
*/
EE_Status EE_Init(void)
{
8000ca8: b580 push {r7, lr}
8000caa: b082 sub sp, #8
8000cac: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
8000cae: 481e ldr r0, [pc, #120] @ (8000d28 <EE_Init+0x80>)
8000cb0: f7ff fe96 bl 80009e0 <EE_GetPageStatus>
8000cb4: 4603 mov r3, r0
8000cb6: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
8000cb8: 481c ldr r0, [pc, #112] @ (8000d2c <EE_Init+0x84>)
8000cba: f7ff fe91 bl 80009e0 <EE_GetPageStatus>
8000cbe: 4603 mov r3, r0
8000cc0: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
8000cc2: 88fb ldrh r3, [r7, #6]
8000cc4: f64f 72ff movw r2, #65535 @ 0xffff
8000cc8: 4293 cmp r3, r2
8000cca: d108 bne.n 8000cde <EE_Init+0x36>
8000ccc: 88bb ldrh r3, [r7, #4]
8000cce: f64f 72ff movw r2, #65535 @ 0xffff
8000cd2: 4293 cmp r3, r2
8000cd4: d103 bne.n 8000cde <EE_Init+0x36>
{
/* Fresh device -> format */
return EE_Format();
8000cd6: f7ff ff25 bl 8000b24 <EE_Format>
8000cda: 4603 mov r3, r0
8000cdc: e020 b.n 8000d20 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
8000cde: 88fb ldrh r3, [r7, #6]
8000ce0: f64a 22aa movw r2, #43690 @ 0xaaaa
8000ce4: 4293 cmp r3, r2
8000ce6: d109 bne.n 8000cfc <EE_Init+0x54>
8000ce8: 88bb ldrh r3, [r7, #4]
8000cea: f64f 72ff movw r2, #65535 @ 0xffff
8000cee: 4293 cmp r3, r2
8000cf0: d104 bne.n 8000cfc <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
8000cf2: 4b0f ldr r3, [pc, #60] @ (8000d30 <EE_Init+0x88>)
8000cf4: 4a0c ldr r2, [pc, #48] @ (8000d28 <EE_Init+0x80>)
8000cf6: 601a str r2, [r3, #0]
return EE_OK;
8000cf8: 2300 movs r3, #0
8000cfa: e011 b.n 8000d20 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
8000cfc: 88bb ldrh r3, [r7, #4]
8000cfe: f64a 22aa movw r2, #43690 @ 0xaaaa
8000d02: 4293 cmp r3, r2
8000d04: d109 bne.n 8000d1a <EE_Init+0x72>
8000d06: 88fb ldrh r3, [r7, #6]
8000d08: f64f 72ff movw r2, #65535 @ 0xffff
8000d0c: 4293 cmp r3, r2
8000d0e: d104 bne.n 8000d1a <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8000d10: 4b07 ldr r3, [pc, #28] @ (8000d30 <EE_Init+0x88>)
8000d12: 4a06 ldr r2, [pc, #24] @ (8000d2c <EE_Init+0x84>)
8000d14: 601a str r2, [r3, #0]
return EE_OK;
8000d16: 2300 movs r3, #0
8000d18: e002 b.n 8000d20 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return EE_Format();
8000d1a: f7ff ff03 bl 8000b24 <EE_Format>
8000d1e: 4603 mov r3, r0
}
}
8000d20: 4618 mov r0, r3
8000d22: 3708 adds r7, #8
8000d24: 46bd mov sp, r7
8000d26: bd80 pop {r7, pc}
8000d28: 0800f800 .word 0x0800f800
8000d2c: 0800fc00 .word 0x0800fc00
8000d30: 20000000 .word 0x20000000
08000d34 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
*/
EE_Status EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8000d34: b580 push {r7, lr}
8000d36: b082 sub sp, #8
8000d38: af00 add r7, sp, #0
8000d3a: 4603 mov r3, r0
8000d3c: 6039 str r1, [r7, #0]
8000d3e: 80fb strh r3, [r7, #6]
if (Data == NULL)
8000d40: 683b ldr r3, [r7, #0]
8000d42: 2b00 cmp r3, #0
8000d44: d101 bne.n 8000d4a <EE_ReadVariable+0x16>
return EE_ERROR;
8000d46: 2301 movs r3, #1
8000d48: e007 b.n 8000d5a <EE_ReadVariable+0x26>
return EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
8000d4a: 4b06 ldr r3, [pc, #24] @ (8000d64 <EE_ReadVariable+0x30>)
8000d4c: 681b ldr r3, [r3, #0]
8000d4e: 88f9 ldrh r1, [r7, #6]
8000d50: 683a ldr r2, [r7, #0]
8000d52: 4618 mov r0, r3
8000d54: f7ff feae bl 8000ab4 <EE_FindInPage>
8000d58: 4603 mov r3, r0
}
8000d5a: 4618 mov r0, r3
8000d5c: 3708 adds r7, #8
8000d5e: 46bd mov sp, r7
8000d60: bd80 pop {r7, pc}
8000d62: bf00 nop
8000d64: 20000000 .word 0x20000000
08000d68 <EE_WriteVariable>:
* Write (append) a 16-bit variable.
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
*/
EE_Status EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
8000d68: b580 push {r7, lr}
8000d6a: b084 sub sp, #16
8000d6c: af00 add r7, sp, #0
8000d6e: 4603 mov r3, r0
8000d70: 460a mov r2, r1
8000d72: 80fb strh r3, [r7, #6]
8000d74: 4613 mov r3, r2
8000d76: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
8000d78: 4b16 ldr r3, [pc, #88] @ (8000dd4 <EE_WriteVariable+0x6c>)
8000d7a: 681b ldr r3, [r3, #0]
8000d7c: 4618 mov r0, r3
8000d7e: f7ff fe75 bl 8000a6c <EE_FindFreeAddress>
8000d82: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
8000d84: 68fb ldr r3, [r7, #12]
8000d86: 2b00 cmp r3, #0
8000d88: d017 beq.n 8000dba <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
8000d8a: 88fb ldrh r3, [r7, #6]
8000d8c: 4619 mov r1, r3
8000d8e: 68f8 ldr r0, [r7, #12]
8000d90: f7ff fe32 bl 80009f8 <EE_FlashProgramHalfWord>
8000d94: 4603 mov r3, r0
8000d96: 2b00 cmp r3, #0
8000d98: d001 beq.n 8000d9e <EE_WriteVariable+0x36>
return EE_ERROR;
8000d9a: 2301 movs r3, #1
8000d9c: e016 b.n 8000dcc <EE_WriteVariable+0x64>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
8000d9e: 68fb ldr r3, [r7, #12]
8000da0: 3302 adds r3, #2
8000da2: 88ba ldrh r2, [r7, #4]
8000da4: 4611 mov r1, r2
8000da6: 4618 mov r0, r3
8000da8: f7ff fe26 bl 80009f8 <EE_FlashProgramHalfWord>
8000dac: 4603 mov r3, r0
8000dae: 2b00 cmp r3, #0
8000db0: d001 beq.n 8000db6 <EE_WriteVariable+0x4e>
return EE_ERROR;
8000db2: 2301 movs r3, #1
8000db4: e00a b.n 8000dcc <EE_WriteVariable+0x64>
return EE_OK;
8000db6: 2300 movs r3, #0
8000db8: e008 b.n 8000dcc <EE_WriteVariable+0x64>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
8000dba: 88ba ldrh r2, [r7, #4]
8000dbc: 88fb ldrh r3, [r7, #6]
8000dbe: 4611 mov r1, r2
8000dc0: 4618 mov r0, r3
8000dc2: f7ff feeb bl 8000b9c <EE_PageTransfer>
8000dc6: 4603 mov r3, r0
8000dc8: 72fb strb r3, [r7, #11]
return st;
8000dca: 7afb ldrb r3, [r7, #11]
}
8000dcc: 4618 mov r0, r3
8000dce: 3710 adds r7, #16
8000dd0: 46bd mov sp, r7
8000dd2: bd80 pop {r7, pc}
8000dd4: 20000000 .word 0x20000000
08000dd8 <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void){
8000dd8: b580 push {r7, lr}
8000dda: af00 add r7, sp, #0
static unsigned char c10ms = 0;
static uint8_t c100ms = 0;
static uint8_t c1s = 0;
if (++c10ms >= 10) { // 10 ms
8000ddc: 4b16 ldr r3, [pc, #88] @ (8000e38 <HAL_SYSTICK_Callback+0x60>)
8000dde: 781b ldrb r3, [r3, #0]
8000de0: 3301 adds r3, #1
8000de2: b2da uxtb r2, r3
8000de4: 4b14 ldr r3, [pc, #80] @ (8000e38 <HAL_SYSTICK_Callback+0x60>)
8000de6: 701a strb r2, [r3, #0]
8000de8: 4b13 ldr r3, [pc, #76] @ (8000e38 <HAL_SYSTICK_Callback+0x60>)
8000dea: 781b ldrb r3, [r3, #0]
8000dec: 2b09 cmp r3, #9
8000dee: d921 bls.n 8000e34 <HAL_SYSTICK_Callback+0x5c>
c10ms = 0;
8000df0: 4b11 ldr r3, [pc, #68] @ (8000e38 <HAL_SYSTICK_Callback+0x60>)
8000df2: 2200 movs r2, #0
8000df4: 701a strb r2, [r3, #0]
if (++c100ms >= 10) { // 10 ms
8000df6: 4b11 ldr r3, [pc, #68] @ (8000e3c <HAL_SYSTICK_Callback+0x64>)
8000df8: 781b ldrb r3, [r3, #0]
8000dfa: 3301 adds r3, #1
8000dfc: b2da uxtb r2, r3
8000dfe: 4b0f ldr r3, [pc, #60] @ (8000e3c <HAL_SYSTICK_Callback+0x64>)
8000e00: 701a strb r2, [r3, #0]
8000e02: 4b0e ldr r3, [pc, #56] @ (8000e3c <HAL_SYSTICK_Callback+0x64>)
8000e04: 781b ldrb r3, [r3, #0]
8000e06: 2b09 cmp r3, #9
8000e08: d914 bls.n 8000e34 <HAL_SYSTICK_Callback+0x5c>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8000e0a: 4b0c ldr r3, [pc, #48] @ (8000e3c <HAL_SYSTICK_Callback+0x64>)
8000e0c: 2200 movs r2, #0
8000e0e: 701a strb r2, [r3, #0]
if (++c1s >= 10) { // 10 ms
8000e10: 4b0b ldr r3, [pc, #44] @ (8000e40 <HAL_SYSTICK_Callback+0x68>)
8000e12: 781b ldrb r3, [r3, #0]
8000e14: 3301 adds r3, #1
8000e16: b2da uxtb r2, r3
8000e18: 4b09 ldr r3, [pc, #36] @ (8000e40 <HAL_SYSTICK_Callback+0x68>)
8000e1a: 701a strb r2, [r3, #0]
8000e1c: 4b08 ldr r3, [pc, #32] @ (8000e40 <HAL_SYSTICK_Callback+0x68>)
8000e1e: 781b ldrb r3, [r3, #0]
8000e20: 2b09 cmp r3, #9
8000e22: d907 bls.n 8000e34 <HAL_SYSTICK_Callback+0x5c>
c1s = 0;
8000e24: 4b06 ldr r3, [pc, #24] @ (8000e40 <HAL_SYSTICK_Callback+0x68>)
8000e26: 2200 movs r2, #0
8000e28: 701a strb r2, [r3, #0]
HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_13);
8000e2a: f44f 5100 mov.w r1, #8192 @ 0x2000
8000e2e: 4805 ldr r0, [pc, #20] @ (8000e44 <HAL_SYSTICK_Callback+0x6c>)
8000e30: f001 fe0c bl 8002a4c <HAL_GPIO_TogglePin>
}
}
}
}
8000e34: bf00 nop
8000e36: bd80 pop {r7, pc}
8000e38: 200003a4 .word 0x200003a4
8000e3c: 200003a5 .word 0x200003a5
8000e40: 200003a6 .word 0x200003a6
8000e44: 40011000 .word 0x40011000
08000e48 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8000e48: b580 push {r7, lr}
8000e4a: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8000e4c: f000 feda bl 8001c04 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000e50: f000 f844 bl 8000edc <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8000e54: f000 fa4e bl 80012f4 <MX_GPIO_Init>
MX_USB_DEVICE_Init();
8000e58: f008 fe86 bl 8009b68 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
8000e5c: f000 f8da bl 8001014 <MX_TIM2_Init>
MX_TIM4_Init();
8000e60: f000 f97c bl 800115c <MX_TIM4_Init>
MX_ADC1_Init();
8000e64: f000 f898 bl 8000f98 <MX_ADC1_Init>
MX_USART1_UART_Init();
8000e68: f000 fa1a bl 80012a0 <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
StopMot(timMot1,FWMot1);
8000e6c: 2100 movs r1, #0
8000e6e: 4818 ldr r0, [pc, #96] @ (8000ed0 <main+0x88>)
8000e70: f000 fb05 bl 800147e <StopMot>
StopMot(timMot1,BWMot1);
8000e74: 2104 movs r1, #4
8000e76: 4816 ldr r0, [pc, #88] @ (8000ed0 <main+0x88>)
8000e78: f000 fb01 bl 800147e <StopMot>
StopMot(timMot2,FWMot2);
8000e7c: 2108 movs r1, #8
8000e7e: 4814 ldr r0, [pc, #80] @ (8000ed0 <main+0x88>)
8000e80: f000 fafd bl 800147e <StopMot>
StopMot(timMot2,BWMot2);
8000e84: 210c movs r1, #12
8000e86: 4812 ldr r0, [pc, #72] @ (8000ed0 <main+0x88>)
8000e88: f000 faf9 bl 800147e <StopMot>
StopMot(timMot3,FWMot3);
8000e8c: 2100 movs r1, #0
8000e8e: 4811 ldr r0, [pc, #68] @ (8000ed4 <main+0x8c>)
8000e90: f000 faf5 bl 800147e <StopMot>
StopMot(timMot3,BWMot3);
8000e94: 2104 movs r1, #4
8000e96: 480f ldr r0, [pc, #60] @ (8000ed4 <main+0x8c>)
8000e98: f000 faf1 bl 800147e <StopMot>
StopMot(timMot4,FWMot4);
8000e9c: 2108 movs r1, #8
8000e9e: 480d ldr r0, [pc, #52] @ (8000ed4 <main+0x8c>)
8000ea0: f000 faed bl 800147e <StopMot>
StopMot(timMot4,BWMot4);
8000ea4: 210c movs r1, #12
8000ea6: 480b ldr r0, [pc, #44] @ (8000ed4 <main+0x8c>)
8000ea8: f000 fae9 bl 800147e <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
8000eac: bf00 nop
8000eae: 2107 movs r1, #7
8000eb0: 4809 ldr r0, [pc, #36] @ (8000ed8 <main+0x90>)
8000eb2: f008 ff95 bl 8009de0 <CDC_Transmit_FS>
8000eb6: 4603 mov r3, r0
8000eb8: 2b01 cmp r3, #1
8000eba: d0f8 beq.n 8000eae <main+0x66>
if (EE_Init() != EE_OK){
8000ebc: f7ff fef4 bl 8000ca8 <EE_Init>
8000ec0: 4603 mov r3, r0
8000ec2: 2b00 cmp r3, #0
8000ec4: d001 beq.n 8000eca <main+0x82>
for(;;);//errore eeprom
8000ec6: bf00 nop
8000ec8: e7fd b.n 8000ec6 <main+0x7e>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
manageCDC();
8000eca: f7ff fa15 bl 80002f8 <manageCDC>
8000ece: e7fc b.n 8000eca <main+0x82>
8000ed0: 20000284 .word 0x20000284
8000ed4: 200002cc .word 0x200002cc
8000ed8: 0800b048 .word 0x0800b048
08000edc <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8000edc: b580 push {r7, lr}
8000ede: b094 sub sp, #80 @ 0x50
8000ee0: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8000ee2: f107 0328 add.w r3, r7, #40 @ 0x28
8000ee6: 2228 movs r2, #40 @ 0x28
8000ee8: 2100 movs r1, #0
8000eea: 4618 mov r0, r3
8000eec: f009 fb78 bl 800a5e0 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8000ef0: f107 0314 add.w r3, r7, #20
8000ef4: 2200 movs r2, #0
8000ef6: 601a str r2, [r3, #0]
8000ef8: 605a str r2, [r3, #4]
8000efa: 609a str r2, [r3, #8]
8000efc: 60da str r2, [r3, #12]
8000efe: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
8000f00: 1d3b adds r3, r7, #4
8000f02: 2200 movs r2, #0
8000f04: 601a str r2, [r3, #0]
8000f06: 605a str r2, [r3, #4]
8000f08: 609a str r2, [r3, #8]
8000f0a: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8000f0c: 2301 movs r3, #1
8000f0e: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8000f10: f44f 3380 mov.w r3, #65536 @ 0x10000
8000f14: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
8000f16: 2300 movs r3, #0
8000f18: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
8000f1a: 2301 movs r3, #1
8000f1c: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8000f1e: 2302 movs r3, #2
8000f20: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8000f22: f44f 3380 mov.w r3, #65536 @ 0x10000
8000f26: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
8000f28: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000
8000f2c: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8000f2e: f107 0328 add.w r3, r7, #40 @ 0x28
8000f32: 4618 mov r0, r3
8000f34: f003 fb04 bl 8004540 <HAL_RCC_OscConfig>
8000f38: 4603 mov r3, r0
8000f3a: 2b00 cmp r3, #0
8000f3c: d001 beq.n 8000f42 <SystemClock_Config+0x66>
{
Error_Handler();
8000f3e: f000 fa83 bl 8001448 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8000f42: 230f movs r3, #15
8000f44: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8000f46: 2302 movs r3, #2
8000f48: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8000f4a: 2300 movs r3, #0
8000f4c: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
8000f4e: f44f 6380 mov.w r3, #1024 @ 0x400
8000f52: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8000f54: 2300 movs r3, #0
8000f56: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
8000f58: f107 0314 add.w r3, r7, #20
8000f5c: 2102 movs r1, #2
8000f5e: 4618 mov r0, r3
8000f60: f003 fd70 bl 8004a44 <HAL_RCC_ClockConfig>
8000f64: 4603 mov r3, r0
8000f66: 2b00 cmp r3, #0
8000f68: d001 beq.n 8000f6e <SystemClock_Config+0x92>
{
Error_Handler();
8000f6a: f000 fa6d bl 8001448 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
8000f6e: 2312 movs r3, #18
8000f70: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
8000f72: f44f 4300 mov.w r3, #32768 @ 0x8000
8000f76: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
8000f78: 2300 movs r3, #0
8000f7a: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
8000f7c: 1d3b adds r3, r7, #4
8000f7e: 4618 mov r0, r3
8000f80: f003 feee bl 8004d60 <HAL_RCCEx_PeriphCLKConfig>
8000f84: 4603 mov r3, r0
8000f86: 2b00 cmp r3, #0
8000f88: d001 beq.n 8000f8e <SystemClock_Config+0xb2>
{
Error_Handler();
8000f8a: f000 fa5d bl 8001448 <Error_Handler>
}
}
8000f8e: bf00 nop
8000f90: 3750 adds r7, #80 @ 0x50
8000f92: 46bd mov sp, r7
8000f94: bd80 pop {r7, pc}
...
08000f98 <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
8000f98: b580 push {r7, lr}
8000f9a: b084 sub sp, #16
8000f9c: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
8000f9e: 1d3b adds r3, r7, #4
8000fa0: 2200 movs r2, #0
8000fa2: 601a str r2, [r3, #0]
8000fa4: 605a str r2, [r3, #4]
8000fa6: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
8000fa8: 4b18 ldr r3, [pc, #96] @ (800100c <MX_ADC1_Init+0x74>)
8000faa: 4a19 ldr r2, [pc, #100] @ (8001010 <MX_ADC1_Init+0x78>)
8000fac: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
8000fae: 4b17 ldr r3, [pc, #92] @ (800100c <MX_ADC1_Init+0x74>)
8000fb0: 2200 movs r2, #0
8000fb2: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = DISABLE;
8000fb4: 4b15 ldr r3, [pc, #84] @ (800100c <MX_ADC1_Init+0x74>)
8000fb6: 2200 movs r2, #0
8000fb8: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
8000fba: 4b14 ldr r3, [pc, #80] @ (800100c <MX_ADC1_Init+0x74>)
8000fbc: 2200 movs r2, #0
8000fbe: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8000fc0: 4b12 ldr r3, [pc, #72] @ (800100c <MX_ADC1_Init+0x74>)
8000fc2: f44f 2260 mov.w r2, #917504 @ 0xe0000
8000fc6: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
8000fc8: 4b10 ldr r3, [pc, #64] @ (800100c <MX_ADC1_Init+0x74>)
8000fca: 2200 movs r2, #0
8000fcc: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 1;
8000fce: 4b0f ldr r3, [pc, #60] @ (800100c <MX_ADC1_Init+0x74>)
8000fd0: 2201 movs r2, #1
8000fd2: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8000fd4: 480d ldr r0, [pc, #52] @ (800100c <MX_ADC1_Init+0x74>)
8000fd6: f000 fe77 bl 8001cc8 <HAL_ADC_Init>
8000fda: 4603 mov r3, r0
8000fdc: 2b00 cmp r3, #0
8000fde: d001 beq.n 8000fe4 <MX_ADC1_Init+0x4c>
{
Error_Handler();
8000fe0: f000 fa32 bl 8001448 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
8000fe4: 2304 movs r3, #4
8000fe6: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
8000fe8: 2301 movs r3, #1
8000fea: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
8000fec: 2300 movs r3, #0
8000fee: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8000ff0: 1d3b adds r3, r7, #4
8000ff2: 4619 mov r1, r3
8000ff4: 4805 ldr r0, [pc, #20] @ (800100c <MX_ADC1_Init+0x74>)
8000ff6: f000 ff3f bl 8001e78 <HAL_ADC_ConfigChannel>
8000ffa: 4603 mov r3, r0
8000ffc: 2b00 cmp r3, #0
8000ffe: d001 beq.n 8001004 <MX_ADC1_Init+0x6c>
{
Error_Handler();
8001000: f000 fa22 bl 8001448 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
8001004: bf00 nop
8001006: 3710 adds r7, #16
8001008: 46bd mov sp, r7
800100a: bd80 pop {r7, pc}
800100c: 20000254 .word 0x20000254
8001010: 40012400 .word 0x40012400
08001014 <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
8001014: b580 push {r7, lr}
8001016: b08e sub sp, #56 @ 0x38
8001018: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
800101a: f107 0328 add.w r3, r7, #40 @ 0x28
800101e: 2200 movs r2, #0
8001020: 601a str r2, [r3, #0]
8001022: 605a str r2, [r3, #4]
8001024: 609a str r2, [r3, #8]
8001026: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8001028: f107 0320 add.w r3, r7, #32
800102c: 2200 movs r2, #0
800102e: 601a str r2, [r3, #0]
8001030: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
8001032: 1d3b adds r3, r7, #4
8001034: 2200 movs r2, #0
8001036: 601a str r2, [r3, #0]
8001038: 605a str r2, [r3, #4]
800103a: 609a str r2, [r3, #8]
800103c: 60da str r2, [r3, #12]
800103e: 611a str r2, [r3, #16]
8001040: 615a str r2, [r3, #20]
8001042: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8001044: 4b44 ldr r3, [pc, #272] @ (8001158 <MX_TIM2_Init+0x144>)
8001046: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
800104a: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
800104c: 4b42 ldr r3, [pc, #264] @ (8001158 <MX_TIM2_Init+0x144>)
800104e: 2200 movs r2, #0
8001050: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
8001052: 4b41 ldr r3, [pc, #260] @ (8001158 <MX_TIM2_Init+0x144>)
8001054: 2200 movs r2, #0
8001056: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
8001058: 4b3f ldr r3, [pc, #252] @ (8001158 <MX_TIM2_Init+0x144>)
800105a: f244 624f movw r2, #17999 @ 0x464f
800105e: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8001060: 4b3d ldr r3, [pc, #244] @ (8001158 <MX_TIM2_Init+0x144>)
8001062: 2200 movs r2, #0
8001064: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8001066: 4b3c ldr r3, [pc, #240] @ (8001158 <MX_TIM2_Init+0x144>)
8001068: 2200 movs r2, #0
800106a: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
800106c: 483a ldr r0, [pc, #232] @ (8001158 <MX_TIM2_Init+0x144>)
800106e: f003 ff2d bl 8004ecc <HAL_TIM_Base_Init>
8001072: 4603 mov r3, r0
8001074: 2b00 cmp r3, #0
8001076: d001 beq.n 800107c <MX_TIM2_Init+0x68>
{
Error_Handler();
8001078: f000 f9e6 bl 8001448 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
800107c: f44f 5380 mov.w r3, #4096 @ 0x1000
8001080: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
8001082: f107 0328 add.w r3, r7, #40 @ 0x28
8001086: 4619 mov r1, r3
8001088: 4833 ldr r0, [pc, #204] @ (8001158 <MX_TIM2_Init+0x144>)
800108a: f004 f98f bl 80053ac <HAL_TIM_ConfigClockSource>
800108e: 4603 mov r3, r0
8001090: 2b00 cmp r3, #0
8001092: d001 beq.n 8001098 <MX_TIM2_Init+0x84>
{
Error_Handler();
8001094: f000 f9d8 bl 8001448 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
8001098: 482f ldr r0, [pc, #188] @ (8001158 <MX_TIM2_Init+0x144>)
800109a: f003 ff66 bl 8004f6a <HAL_TIM_PWM_Init>
800109e: 4603 mov r3, r0
80010a0: 2b00 cmp r3, #0
80010a2: d001 beq.n 80010a8 <MX_TIM2_Init+0x94>
{
Error_Handler();
80010a4: f000 f9d0 bl 8001448 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80010a8: 2300 movs r3, #0
80010aa: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80010ac: 2300 movs r3, #0
80010ae: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
80010b0: f107 0320 add.w r3, r7, #32
80010b4: 4619 mov r1, r3
80010b6: 4828 ldr r0, [pc, #160] @ (8001158 <MX_TIM2_Init+0x144>)
80010b8: f004 fd18 bl 8005aec <HAL_TIMEx_MasterConfigSynchronization>
80010bc: 4603 mov r3, r0
80010be: 2b00 cmp r3, #0
80010c0: d001 beq.n 80010c6 <MX_TIM2_Init+0xb2>
{
Error_Handler();
80010c2: f000 f9c1 bl 8001448 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
80010c6: 2360 movs r3, #96 @ 0x60
80010c8: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
80010ca: f44f 737a mov.w r3, #1000 @ 0x3e8
80010ce: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
80010d0: 2300 movs r3, #0
80010d2: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80010d4: 2304 movs r3, #4
80010d6: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
80010d8: 1d3b adds r3, r7, #4
80010da: 2200 movs r2, #0
80010dc: 4619 mov r1, r3
80010de: 481e ldr r0, [pc, #120] @ (8001158 <MX_TIM2_Init+0x144>)
80010e0: f004 f8a2 bl 8005228 <HAL_TIM_PWM_ConfigChannel>
80010e4: 4603 mov r3, r0
80010e6: 2b00 cmp r3, #0
80010e8: d001 beq.n 80010ee <MX_TIM2_Init+0xda>
{
Error_Handler();
80010ea: f000 f9ad bl 8001448 <Error_Handler>
}
sConfigOC.Pulse = 2000;
80010ee: f44f 63fa mov.w r3, #2000 @ 0x7d0
80010f2: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
80010f4: 1d3b adds r3, r7, #4
80010f6: 2204 movs r2, #4
80010f8: 4619 mov r1, r3
80010fa: 4817 ldr r0, [pc, #92] @ (8001158 <MX_TIM2_Init+0x144>)
80010fc: f004 f894 bl 8005228 <HAL_TIM_PWM_ConfigChannel>
8001100: 4603 mov r3, r0
8001102: 2b00 cmp r3, #0
8001104: d001 beq.n 800110a <MX_TIM2_Init+0xf6>
{
Error_Handler();
8001106: f000 f99f bl 8001448 <Error_Handler>
}
sConfigOC.Pulse = 3000;
800110a: f640 33b8 movw r3, #3000 @ 0xbb8
800110e: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
8001110: 2300 movs r3, #0
8001112: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8001114: 1d3b adds r3, r7, #4
8001116: 2208 movs r2, #8
8001118: 4619 mov r1, r3
800111a: 480f ldr r0, [pc, #60] @ (8001158 <MX_TIM2_Init+0x144>)
800111c: f004 f884 bl 8005228 <HAL_TIM_PWM_ConfigChannel>
8001120: 4603 mov r3, r0
8001122: 2b00 cmp r3, #0
8001124: d001 beq.n 800112a <MX_TIM2_Init+0x116>
{
Error_Handler();
8001126: f000 f98f bl 8001448 <Error_Handler>
}
sConfigOC.Pulse = 4000;
800112a: f44f 637a mov.w r3, #4000 @ 0xfa0
800112e: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8001130: 2304 movs r3, #4
8001132: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8001134: 1d3b adds r3, r7, #4
8001136: 220c movs r2, #12
8001138: 4619 mov r1, r3
800113a: 4807 ldr r0, [pc, #28] @ (8001158 <MX_TIM2_Init+0x144>)
800113c: f004 f874 bl 8005228 <HAL_TIM_PWM_ConfigChannel>
8001140: 4603 mov r3, r0
8001142: 2b00 cmp r3, #0
8001144: d001 beq.n 800114a <MX_TIM2_Init+0x136>
{
Error_Handler();
8001146: f000 f97f bl 8001448 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
800114a: 4803 ldr r0, [pc, #12] @ (8001158 <MX_TIM2_Init+0x144>)
800114c: f000 fc20 bl 8001990 <HAL_TIM_MspPostInit>
}
8001150: bf00 nop
8001152: 3738 adds r7, #56 @ 0x38
8001154: 46bd mov sp, r7
8001156: bd80 pop {r7, pc}
8001158: 20000284 .word 0x20000284
0800115c <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
800115c: b580 push {r7, lr}
800115e: b08e sub sp, #56 @ 0x38
8001160: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8001162: f107 0328 add.w r3, r7, #40 @ 0x28
8001166: 2200 movs r2, #0
8001168: 601a str r2, [r3, #0]
800116a: 605a str r2, [r3, #4]
800116c: 609a str r2, [r3, #8]
800116e: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8001170: f107 0320 add.w r3, r7, #32
8001174: 2200 movs r2, #0
8001176: 601a str r2, [r3, #0]
8001178: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
800117a: 1d3b adds r3, r7, #4
800117c: 2200 movs r2, #0
800117e: 601a str r2, [r3, #0]
8001180: 605a str r2, [r3, #4]
8001182: 609a str r2, [r3, #8]
8001184: 60da str r2, [r3, #12]
8001186: 611a str r2, [r3, #16]
8001188: 615a str r2, [r3, #20]
800118a: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
800118c: 4b42 ldr r3, [pc, #264] @ (8001298 <MX_TIM4_Init+0x13c>)
800118e: 4a43 ldr r2, [pc, #268] @ (800129c <MX_TIM4_Init+0x140>)
8001190: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
8001192: 4b41 ldr r3, [pc, #260] @ (8001298 <MX_TIM4_Init+0x13c>)
8001194: 2200 movs r2, #0
8001196: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
8001198: 4b3f ldr r3, [pc, #252] @ (8001298 <MX_TIM4_Init+0x13c>)
800119a: 2200 movs r2, #0
800119c: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
800119e: 4b3e ldr r3, [pc, #248] @ (8001298 <MX_TIM4_Init+0x13c>)
80011a0: f244 624f movw r2, #17999 @ 0x464f
80011a4: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80011a6: 4b3c ldr r3, [pc, #240] @ (8001298 <MX_TIM4_Init+0x13c>)
80011a8: 2200 movs r2, #0
80011aa: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80011ac: 4b3a ldr r3, [pc, #232] @ (8001298 <MX_TIM4_Init+0x13c>)
80011ae: 2200 movs r2, #0
80011b0: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
80011b2: 4839 ldr r0, [pc, #228] @ (8001298 <MX_TIM4_Init+0x13c>)
80011b4: f003 fe8a bl 8004ecc <HAL_TIM_Base_Init>
80011b8: 4603 mov r3, r0
80011ba: 2b00 cmp r3, #0
80011bc: d001 beq.n 80011c2 <MX_TIM4_Init+0x66>
{
Error_Handler();
80011be: f000 f943 bl 8001448 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
80011c2: f44f 5380 mov.w r3, #4096 @ 0x1000
80011c6: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
80011c8: f107 0328 add.w r3, r7, #40 @ 0x28
80011cc: 4619 mov r1, r3
80011ce: 4832 ldr r0, [pc, #200] @ (8001298 <MX_TIM4_Init+0x13c>)
80011d0: f004 f8ec bl 80053ac <HAL_TIM_ConfigClockSource>
80011d4: 4603 mov r3, r0
80011d6: 2b00 cmp r3, #0
80011d8: d001 beq.n 80011de <MX_TIM4_Init+0x82>
{
Error_Handler();
80011da: f000 f935 bl 8001448 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
80011de: 482e ldr r0, [pc, #184] @ (8001298 <MX_TIM4_Init+0x13c>)
80011e0: f003 fec3 bl 8004f6a <HAL_TIM_PWM_Init>
80011e4: 4603 mov r3, r0
80011e6: 2b00 cmp r3, #0
80011e8: d001 beq.n 80011ee <MX_TIM4_Init+0x92>
{
Error_Handler();
80011ea: f000 f92d bl 8001448 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80011ee: 2300 movs r3, #0
80011f0: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80011f2: 2300 movs r3, #0
80011f4: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
80011f6: f107 0320 add.w r3, r7, #32
80011fa: 4619 mov r1, r3
80011fc: 4826 ldr r0, [pc, #152] @ (8001298 <MX_TIM4_Init+0x13c>)
80011fe: f004 fc75 bl 8005aec <HAL_TIMEx_MasterConfigSynchronization>
8001202: 4603 mov r3, r0
8001204: 2b00 cmp r3, #0
8001206: d001 beq.n 800120c <MX_TIM4_Init+0xb0>
{
Error_Handler();
8001208: f000 f91e bl 8001448 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
800120c: 2360 movs r3, #96 @ 0x60
800120e: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
8001210: f241 3388 movw r3, #5000 @ 0x1388
8001214: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8001216: 2300 movs r3, #0
8001218: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800121a: 2304 movs r3, #4
800121c: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
800121e: 1d3b adds r3, r7, #4
8001220: 2200 movs r2, #0
8001222: 4619 mov r1, r3
8001224: 481c ldr r0, [pc, #112] @ (8001298 <MX_TIM4_Init+0x13c>)
8001226: f003 ffff bl 8005228 <HAL_TIM_PWM_ConfigChannel>
800122a: 4603 mov r3, r0
800122c: 2b00 cmp r3, #0
800122e: d001 beq.n 8001234 <MX_TIM4_Init+0xd8>
{
Error_Handler();
8001230: f000 f90a bl 8001448 <Error_Handler>
}
sConfigOC.Pulse = 6000;
8001234: f241 7370 movw r3, #6000 @ 0x1770
8001238: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
800123a: 1d3b adds r3, r7, #4
800123c: 2204 movs r2, #4
800123e: 4619 mov r1, r3
8001240: 4815 ldr r0, [pc, #84] @ (8001298 <MX_TIM4_Init+0x13c>)
8001242: f003 fff1 bl 8005228 <HAL_TIM_PWM_ConfigChannel>
8001246: 4603 mov r3, r0
8001248: 2b00 cmp r3, #0
800124a: d001 beq.n 8001250 <MX_TIM4_Init+0xf4>
{
Error_Handler();
800124c: f000 f8fc bl 8001448 <Error_Handler>
}
sConfigOC.Pulse = 7000;
8001250: f641 3358 movw r3, #7000 @ 0x1b58
8001254: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8001256: 1d3b adds r3, r7, #4
8001258: 2208 movs r2, #8
800125a: 4619 mov r1, r3
800125c: 480e ldr r0, [pc, #56] @ (8001298 <MX_TIM4_Init+0x13c>)
800125e: f003 ffe3 bl 8005228 <HAL_TIM_PWM_ConfigChannel>
8001262: 4603 mov r3, r0
8001264: 2b00 cmp r3, #0
8001266: d001 beq.n 800126c <MX_TIM4_Init+0x110>
{
Error_Handler();
8001268: f000 f8ee bl 8001448 <Error_Handler>
}
sConfigOC.Pulse = 8000;
800126c: f44f 53fa mov.w r3, #8000 @ 0x1f40
8001270: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8001272: 1d3b adds r3, r7, #4
8001274: 220c movs r2, #12
8001276: 4619 mov r1, r3
8001278: 4807 ldr r0, [pc, #28] @ (8001298 <MX_TIM4_Init+0x13c>)
800127a: f003 ffd5 bl 8005228 <HAL_TIM_PWM_ConfigChannel>
800127e: 4603 mov r3, r0
8001280: 2b00 cmp r3, #0
8001282: d001 beq.n 8001288 <MX_TIM4_Init+0x12c>
{
Error_Handler();
8001284: f000 f8e0 bl 8001448 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
8001288: 4803 ldr r0, [pc, #12] @ (8001298 <MX_TIM4_Init+0x13c>)
800128a: f000 fb81 bl 8001990 <HAL_TIM_MspPostInit>
}
800128e: bf00 nop
8001290: 3738 adds r7, #56 @ 0x38
8001292: 46bd mov sp, r7
8001294: bd80 pop {r7, pc}
8001296: bf00 nop
8001298: 200002cc .word 0x200002cc
800129c: 40000800 .word 0x40000800
080012a0 <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
80012a0: b580 push {r7, lr}
80012a2: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
80012a4: 4b11 ldr r3, [pc, #68] @ (80012ec <MX_USART1_UART_Init+0x4c>)
80012a6: 4a12 ldr r2, [pc, #72] @ (80012f0 <MX_USART1_UART_Init+0x50>)
80012a8: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
80012aa: 4b10 ldr r3, [pc, #64] @ (80012ec <MX_USART1_UART_Init+0x4c>)
80012ac: f44f 32e1 mov.w r2, #115200 @ 0x1c200
80012b0: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
80012b2: 4b0e ldr r3, [pc, #56] @ (80012ec <MX_USART1_UART_Init+0x4c>)
80012b4: 2200 movs r2, #0
80012b6: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
80012b8: 4b0c ldr r3, [pc, #48] @ (80012ec <MX_USART1_UART_Init+0x4c>)
80012ba: 2200 movs r2, #0
80012bc: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
80012be: 4b0b ldr r3, [pc, #44] @ (80012ec <MX_USART1_UART_Init+0x4c>)
80012c0: 2200 movs r2, #0
80012c2: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
80012c4: 4b09 ldr r3, [pc, #36] @ (80012ec <MX_USART1_UART_Init+0x4c>)
80012c6: 220c movs r2, #12
80012c8: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
80012ca: 4b08 ldr r3, [pc, #32] @ (80012ec <MX_USART1_UART_Init+0x4c>)
80012cc: 2200 movs r2, #0
80012ce: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
80012d0: 4b06 ldr r3, [pc, #24] @ (80012ec <MX_USART1_UART_Init+0x4c>)
80012d2: 2200 movs r2, #0
80012d4: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK)
80012d6: 4805 ldr r0, [pc, #20] @ (80012ec <MX_USART1_UART_Init+0x4c>)
80012d8: f004 fc66 bl 8005ba8 <HAL_UART_Init>
80012dc: 4603 mov r3, r0
80012de: 2b00 cmp r3, #0
80012e0: d001 beq.n 80012e6 <MX_USART1_UART_Init+0x46>
{
Error_Handler();
80012e2: f000 f8b1 bl 8001448 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
80012e6: bf00 nop
80012e8: bd80 pop {r7, pc}
80012ea: bf00 nop
80012ec: 20000314 .word 0x20000314
80012f0: 40013800 .word 0x40013800
080012f4 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
80012f4: b580 push {r7, lr}
80012f6: b088 sub sp, #32
80012f8: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
80012fa: f107 0310 add.w r3, r7, #16
80012fe: 2200 movs r2, #0
8001300: 601a str r2, [r3, #0]
8001302: 605a str r2, [r3, #4]
8001304: 609a str r2, [r3, #8]
8001306: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
8001308: 4b4b ldr r3, [pc, #300] @ (8001438 <MX_GPIO_Init+0x144>)
800130a: 699b ldr r3, [r3, #24]
800130c: 4a4a ldr r2, [pc, #296] @ (8001438 <MX_GPIO_Init+0x144>)
800130e: f043 0310 orr.w r3, r3, #16
8001312: 6193 str r3, [r2, #24]
8001314: 4b48 ldr r3, [pc, #288] @ (8001438 <MX_GPIO_Init+0x144>)
8001316: 699b ldr r3, [r3, #24]
8001318: f003 0310 and.w r3, r3, #16
800131c: 60fb str r3, [r7, #12]
800131e: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
8001320: 4b45 ldr r3, [pc, #276] @ (8001438 <MX_GPIO_Init+0x144>)
8001322: 699b ldr r3, [r3, #24]
8001324: 4a44 ldr r2, [pc, #272] @ (8001438 <MX_GPIO_Init+0x144>)
8001326: f043 0320 orr.w r3, r3, #32
800132a: 6193 str r3, [r2, #24]
800132c: 4b42 ldr r3, [pc, #264] @ (8001438 <MX_GPIO_Init+0x144>)
800132e: 699b ldr r3, [r3, #24]
8001330: f003 0320 and.w r3, r3, #32
8001334: 60bb str r3, [r7, #8]
8001336: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
8001338: 4b3f ldr r3, [pc, #252] @ (8001438 <MX_GPIO_Init+0x144>)
800133a: 699b ldr r3, [r3, #24]
800133c: 4a3e ldr r2, [pc, #248] @ (8001438 <MX_GPIO_Init+0x144>)
800133e: f043 0304 orr.w r3, r3, #4
8001342: 6193 str r3, [r2, #24]
8001344: 4b3c ldr r3, [pc, #240] @ (8001438 <MX_GPIO_Init+0x144>)
8001346: 699b ldr r3, [r3, #24]
8001348: f003 0304 and.w r3, r3, #4
800134c: 607b str r3, [r7, #4]
800134e: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
8001350: 4b39 ldr r3, [pc, #228] @ (8001438 <MX_GPIO_Init+0x144>)
8001352: 699b ldr r3, [r3, #24]
8001354: 4a38 ldr r2, [pc, #224] @ (8001438 <MX_GPIO_Init+0x144>)
8001356: f043 0308 orr.w r3, r3, #8
800135a: 6193 str r3, [r2, #24]
800135c: 4b36 ldr r3, [pc, #216] @ (8001438 <MX_GPIO_Init+0x144>)
800135e: 699b ldr r3, [r3, #24]
8001360: f003 0308 and.w r3, r3, #8
8001364: 603b str r3, [r7, #0]
8001366: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8001368: 2200 movs r2, #0
800136a: f44f 5100 mov.w r1, #8192 @ 0x2000
800136e: 4833 ldr r0, [pc, #204] @ (800143c <MX_GPIO_Init+0x148>)
8001370: f001 fb54 bl 8002a1c <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
8001374: 2200 movs r2, #0
8001376: f640 413e movw r1, #3134 @ 0xc3e
800137a: 4831 ldr r0, [pc, #196] @ (8001440 <MX_GPIO_Init+0x14c>)
800137c: f001 fb4e bl 8002a1c <HAL_GPIO_WritePin>
|EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET);
8001380: 2200 movs r2, #0
8001382: f44f 4101 mov.w r1, #33024 @ 0x8100
8001386: 482f ldr r0, [pc, #188] @ (8001444 <MX_GPIO_Init+0x150>)
8001388: f001 fb48 bl 8002a1c <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
800138c: f44f 5300 mov.w r3, #8192 @ 0x2000
8001390: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001392: 2301 movs r3, #1
8001394: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001396: 2300 movs r3, #0
8001398: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800139a: 2302 movs r3, #2
800139c: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
800139e: f107 0310 add.w r3, r7, #16
80013a2: 4619 mov r1, r3
80013a4: 4825 ldr r0, [pc, #148] @ (800143c <MX_GPIO_Init+0x148>)
80013a6: f001 f9b5 bl 8002714 <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin|P2_Pin;
80013aa: f44f 4340 mov.w r3, #49152 @ 0xc000
80013ae: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
80013b0: 2300 movs r3, #0
80013b2: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80013b4: 2300 movs r3, #0
80013b6: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
80013b8: f107 0310 add.w r3, r7, #16
80013bc: 4619 mov r1, r3
80013be: 481f ldr r0, [pc, #124] @ (800143c <MX_GPIO_Init+0x148>)
80013c0: f001 f9a8 bl 8002714 <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
80013c4: 2310 movs r3, #16
80013c6: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
80013c8: 2303 movs r3, #3
80013ca: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
80013cc: f107 0310 add.w r3, r7, #16
80013d0: 4619 mov r1, r3
80013d2: 481c ldr r0, [pc, #112] @ (8001444 <MX_GPIO_Init+0x150>)
80013d4: f001 f99e bl 8002714 <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
80013d8: f640 433e movw r3, #3134 @ 0xc3e
80013dc: 613b str r3, [r7, #16]
|EXP1_Pin|EXP2_Pin|EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80013de: 2301 movs r3, #1
80013e0: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80013e2: 2300 movs r3, #0
80013e4: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80013e6: 2302 movs r3, #2
80013e8: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80013ea: f107 0310 add.w r3, r7, #16
80013ee: 4619 mov r1, r3
80013f0: 4813 ldr r0, [pc, #76] @ (8001440 <MX_GPIO_Init+0x14c>)
80013f2: f001 f98f bl 8002714 <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin;
80013f6: f44f 4370 mov.w r3, #61440 @ 0xf000
80013fa: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
80013fc: 2300 movs r3, #0
80013fe: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001400: 2300 movs r3, #0
8001402: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001404: f107 0310 add.w r3, r7, #16
8001408: 4619 mov r1, r3
800140a: 480d ldr r0, [pc, #52] @ (8001440 <MX_GPIO_Init+0x14c>)
800140c: f001 f982 bl 8002714 <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin;
8001410: f44f 4301 mov.w r3, #33024 @ 0x8100
8001414: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8001416: 2301 movs r3, #1
8001418: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800141a: 2300 movs r3, #0
800141c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800141e: 2302 movs r3, #2
8001420: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001422: f107 0310 add.w r3, r7, #16
8001426: 4619 mov r1, r3
8001428: 4806 ldr r0, [pc, #24] @ (8001444 <MX_GPIO_Init+0x150>)
800142a: f001 f973 bl 8002714 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
800142e: bf00 nop
8001430: 3720 adds r7, #32
8001432: 46bd mov sp, r7
8001434: bd80 pop {r7, pc}
8001436: bf00 nop
8001438: 40021000 .word 0x40021000
800143c: 40011000 .word 0x40011000
8001440: 40010c00 .word 0x40010c00
8001444: 40010800 .word 0x40010800
08001448 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8001448: b480 push {r7}
800144a: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
800144c: b672 cpsid i
}
800144e: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
8001450: bf00 nop
8001452: e7fd b.n 8001450 <Error_Handler+0x8>
08001454 <IsPwmRunning>:
extern TIM_HandleTypeDef htim2;
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim4;
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8001454: b580 push {r7, lr}
8001456: b084 sub sp, #16
8001458: af00 add r7, sp, #0
800145a: 6078 str r0, [r7, #4]
800145c: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
800145e: 6839 ldr r1, [r7, #0]
8001460: 6878 ldr r0, [r7, #4]
8001462: f004 f86a bl 800553a <HAL_TIM_GetChannelState>
8001466: 4603 mov r3, r0
8001468: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
800146a: 7bfb ldrb r3, [r7, #15]
800146c: 2b02 cmp r3, #2
800146e: bf0c ite eq
8001470: 2301 moveq r3, #1
8001472: 2300 movne r3, #0
8001474: b2db uxtb r3, r3
}
8001476: 4618 mov r0, r3
8001478: 3710 adds r7, #16
800147a: 46bd mov sp, r7
800147c: bd80 pop {r7, pc}
0800147e <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
800147e: b580 push {r7, lr}
8001480: b082 sub sp, #8
8001482: af00 add r7, sp, #0
8001484: 6078 str r0, [r7, #4]
8001486: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
8001488: 6839 ldr r1, [r7, #0]
800148a: 6878 ldr r0, [r7, #4]
800148c: f003 fe68 bl 8005160 <HAL_TIM_PWM_Stop>
}
8001490: bf00 nop
8001492: 3708 adds r7, #8
8001494: 46bd mov sp, r7
8001496: bd80 pop {r7, pc}
08001498 <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8001498: b580 push {r7, lr}
800149a: b084 sub sp, #16
800149c: af00 add r7, sp, #0
800149e: 60f8 str r0, [r7, #12]
80014a0: 60b9 str r1, [r7, #8]
80014a2: 4613 mov r3, r2
80014a4: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80014a6: 68bb ldr r3, [r7, #8]
80014a8: 2b00 cmp r3, #0
80014aa: d104 bne.n 80014b6 <StartMot+0x1e>
80014ac: 68fb ldr r3, [r7, #12]
80014ae: 681b ldr r3, [r3, #0]
80014b0: 88fa ldrh r2, [r7, #6]
80014b2: 635a str r2, [r3, #52] @ 0x34
80014b4: e013 b.n 80014de <StartMot+0x46>
80014b6: 68bb ldr r3, [r7, #8]
80014b8: 2b04 cmp r3, #4
80014ba: d104 bne.n 80014c6 <StartMot+0x2e>
80014bc: 68fb ldr r3, [r7, #12]
80014be: 681a ldr r2, [r3, #0]
80014c0: 88fb ldrh r3, [r7, #6]
80014c2: 6393 str r3, [r2, #56] @ 0x38
80014c4: e00b b.n 80014de <StartMot+0x46>
80014c6: 68bb ldr r3, [r7, #8]
80014c8: 2b08 cmp r3, #8
80014ca: d104 bne.n 80014d6 <StartMot+0x3e>
80014cc: 68fb ldr r3, [r7, #12]
80014ce: 681a ldr r2, [r3, #0]
80014d0: 88fb ldrh r3, [r7, #6]
80014d2: 63d3 str r3, [r2, #60] @ 0x3c
80014d4: e003 b.n 80014de <StartMot+0x46>
80014d6: 68fb ldr r3, [r7, #12]
80014d8: 681a ldr r2, [r3, #0]
80014da: 88fb ldrh r3, [r7, #6]
80014dc: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
80014de: 68b9 ldr r1, [r7, #8]
80014e0: 68f8 ldr r0, [r7, #12]
80014e2: f003 fd9b bl 800501c <HAL_TIM_PWM_Start>
}
80014e6: bf00 nop
80014e8: 3710 adds r7, #16
80014ea: 46bd mov sp, r7
80014ec: bd80 pop {r7, pc}
080014ee <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
80014ee: b480 push {r7}
80014f0: b085 sub sp, #20
80014f2: af00 add r7, sp, #0
80014f4: 60f8 str r0, [r7, #12]
80014f6: 60b9 str r1, [r7, #8]
80014f8: 4613 mov r3, r2
80014fa: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80014fc: 68bb ldr r3, [r7, #8]
80014fe: 2b00 cmp r3, #0
8001500: d104 bne.n 800150c <SetMotPwm+0x1e>
8001502: 68fb ldr r3, [r7, #12]
8001504: 681b ldr r3, [r3, #0]
8001506: 88fa ldrh r2, [r7, #6]
8001508: 635a str r2, [r3, #52] @ 0x34
}
800150a: e013 b.n 8001534 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
800150c: 68bb ldr r3, [r7, #8]
800150e: 2b04 cmp r3, #4
8001510: d104 bne.n 800151c <SetMotPwm+0x2e>
8001512: 68fb ldr r3, [r7, #12]
8001514: 681a ldr r2, [r3, #0]
8001516: 88fb ldrh r3, [r7, #6]
8001518: 6393 str r3, [r2, #56] @ 0x38
}
800151a: e00b b.n 8001534 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
800151c: 68bb ldr r3, [r7, #8]
800151e: 2b08 cmp r3, #8
8001520: d104 bne.n 800152c <SetMotPwm+0x3e>
8001522: 68fb ldr r3, [r7, #12]
8001524: 681a ldr r2, [r3, #0]
8001526: 88fb ldrh r3, [r7, #6]
8001528: 63d3 str r3, [r2, #60] @ 0x3c
}
800152a: e003 b.n 8001534 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
800152c: 68fb ldr r3, [r7, #12]
800152e: 681a ldr r2, [r3, #0]
8001530: 88fb ldrh r3, [r7, #6]
8001532: 6413 str r3, [r2, #64] @ 0x40
}
8001534: bf00 nop
8001536: 3714 adds r7, #20
8001538: 46bd mov sp, r7
800153a: bc80 pop {r7}
800153c: 4770 bx lr
...
08001540 <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
8001540: b580 push {r7, lr}
8001542: b082 sub sp, #8
8001544: af00 add r7, sp, #0
8001546: 4603 mov r3, r0
8001548: 71fb strb r3, [r7, #7]
800154a: 460b mov r3, r1
800154c: 71bb strb r3, [r7, #6]
800154e: 4613 mov r3, r2
8001550: 80bb strh r3, [r7, #4]
switch(mot){
8001552: 79fb ldrb r3, [r7, #7]
8001554: 3b01 subs r3, #1
8001556: 2b03 cmp r3, #3
8001558: f200 8158 bhi.w 800180c <SetMot+0x2cc>
800155c: a201 add r2, pc, #4 @ (adr r2, 8001564 <SetMot+0x24>)
800155e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001562: bf00 nop
8001564: 08001575 .word 0x08001575
8001568: 08001617 .word 0x08001617
800156c: 080016b9 .word 0x080016b9
8001570: 08001763 .word 0x08001763
case 1:
if(dir==FW){
8001574: 79bb ldrb r3, [r7, #6]
8001576: 2b00 cmp r3, #0
8001578: d126 bne.n 80015c8 <SetMot+0x88>
if(pwmval==0){
800157a: 88bb ldrh r3, [r7, #4]
800157c: 2b00 cmp r3, #0
800157e: d109 bne.n 8001594 <SetMot+0x54>
StopMot(timMot1,FWMot1);
8001580: 2100 movs r1, #0
8001582: 48a5 ldr r0, [pc, #660] @ (8001818 <SetMot+0x2d8>)
8001584: f7ff ff7b bl 800147e <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8001588: 2200 movs r2, #0
800158a: 2102 movs r1, #2
800158c: 48a3 ldr r0, [pc, #652] @ (800181c <SetMot+0x2dc>)
800158e: f001 fa45 bl 8002a1c <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
8001592: e13c b.n 800180e <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
8001594: 2100 movs r1, #0
8001596: 48a0 ldr r0, [pc, #640] @ (8001818 <SetMot+0x2d8>)
8001598: f7ff ff5c bl 8001454 <IsPwmRunning>
800159c: 4603 mov r3, r0
800159e: 2b00 cmp r3, #0
80015a0: d006 beq.n 80015b0 <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
80015a2: 88bb ldrh r3, [r7, #4]
80015a4: 461a mov r2, r3
80015a6: 2100 movs r1, #0
80015a8: 489b ldr r0, [pc, #620] @ (8001818 <SetMot+0x2d8>)
80015aa: f7ff ffa0 bl 80014ee <SetMotPwm>
break;
80015ae: e12e b.n 800180e <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80015b0: 2201 movs r2, #1
80015b2: 2102 movs r1, #2
80015b4: 4899 ldr r0, [pc, #612] @ (800181c <SetMot+0x2dc>)
80015b6: f001 fa31 bl 8002a1c <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
80015ba: 88bb ldrh r3, [r7, #4]
80015bc: 461a mov r2, r3
80015be: 2100 movs r1, #0
80015c0: 4895 ldr r0, [pc, #596] @ (8001818 <SetMot+0x2d8>)
80015c2: f7ff ff69 bl 8001498 <StartMot>
break;
80015c6: e122 b.n 800180e <SetMot+0x2ce>
if(pwmval==0){
80015c8: 88bb ldrh r3, [r7, #4]
80015ca: 2b00 cmp r3, #0
80015cc: d109 bne.n 80015e2 <SetMot+0xa2>
StopMot(timMot1,BWMot1);
80015ce: 2104 movs r1, #4
80015d0: 4891 ldr r0, [pc, #580] @ (8001818 <SetMot+0x2d8>)
80015d2: f7ff ff54 bl 800147e <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
80015d6: 2200 movs r2, #0
80015d8: 2102 movs r1, #2
80015da: 4890 ldr r0, [pc, #576] @ (800181c <SetMot+0x2dc>)
80015dc: f001 fa1e bl 8002a1c <HAL_GPIO_WritePin>
break;
80015e0: e115 b.n 800180e <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
80015e2: 2104 movs r1, #4
80015e4: 488c ldr r0, [pc, #560] @ (8001818 <SetMot+0x2d8>)
80015e6: f7ff ff35 bl 8001454 <IsPwmRunning>
80015ea: 4603 mov r3, r0
80015ec: 2b00 cmp r3, #0
80015ee: d006 beq.n 80015fe <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
80015f0: 88bb ldrh r3, [r7, #4]
80015f2: 461a mov r2, r3
80015f4: 2104 movs r1, #4
80015f6: 4888 ldr r0, [pc, #544] @ (8001818 <SetMot+0x2d8>)
80015f8: f7ff ff79 bl 80014ee <SetMotPwm>
break;
80015fc: e107 b.n 800180e <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80015fe: 2201 movs r2, #1
8001600: 2102 movs r1, #2
8001602: 4886 ldr r0, [pc, #536] @ (800181c <SetMot+0x2dc>)
8001604: f001 fa0a bl 8002a1c <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
8001608: 88bb ldrh r3, [r7, #4]
800160a: 461a mov r2, r3
800160c: 2104 movs r1, #4
800160e: 4882 ldr r0, [pc, #520] @ (8001818 <SetMot+0x2d8>)
8001610: f7ff ff42 bl 8001498 <StartMot>
break;
8001614: e0fb b.n 800180e <SetMot+0x2ce>
case 2:
if(dir==FW){
8001616: 79bb ldrb r3, [r7, #6]
8001618: 2b00 cmp r3, #0
800161a: d126 bne.n 800166a <SetMot+0x12a>
if(pwmval==0){
800161c: 88bb ldrh r3, [r7, #4]
800161e: 2b00 cmp r3, #0
8001620: d109 bne.n 8001636 <SetMot+0xf6>
StopMot(timMot2,FWMot2);
8001622: 2108 movs r1, #8
8001624: 487c ldr r0, [pc, #496] @ (8001818 <SetMot+0x2d8>)
8001626: f7ff ff2a bl 800147e <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
800162a: 2200 movs r2, #0
800162c: 2104 movs r1, #4
800162e: 487b ldr r0, [pc, #492] @ (800181c <SetMot+0x2dc>)
8001630: f001 f9f4 bl 8002a1c <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8001634: e0eb b.n 800180e <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
8001636: 2108 movs r1, #8
8001638: 4877 ldr r0, [pc, #476] @ (8001818 <SetMot+0x2d8>)
800163a: f7ff ff0b bl 8001454 <IsPwmRunning>
800163e: 4603 mov r3, r0
8001640: 2b00 cmp r3, #0
8001642: d006 beq.n 8001652 <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
8001644: 88bb ldrh r3, [r7, #4]
8001646: 461a mov r2, r3
8001648: 2108 movs r1, #8
800164a: 4873 ldr r0, [pc, #460] @ (8001818 <SetMot+0x2d8>)
800164c: f7ff ff4f bl 80014ee <SetMotPwm>
break;
8001650: e0dd b.n 800180e <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8001652: 2201 movs r2, #1
8001654: 2104 movs r1, #4
8001656: 4871 ldr r0, [pc, #452] @ (800181c <SetMot+0x2dc>)
8001658: f001 f9e0 bl 8002a1c <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
800165c: 88bb ldrh r3, [r7, #4]
800165e: 461a mov r2, r3
8001660: 2108 movs r1, #8
8001662: 486d ldr r0, [pc, #436] @ (8001818 <SetMot+0x2d8>)
8001664: f7ff ff18 bl 8001498 <StartMot>
break;
8001668: e0d1 b.n 800180e <SetMot+0x2ce>
if(pwmval==0){
800166a: 88bb ldrh r3, [r7, #4]
800166c: 2b00 cmp r3, #0
800166e: d109 bne.n 8001684 <SetMot+0x144>
StopMot(timMot2,BWMot2);
8001670: 210c movs r1, #12
8001672: 4869 ldr r0, [pc, #420] @ (8001818 <SetMot+0x2d8>)
8001674: f7ff ff03 bl 800147e <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8001678: 2200 movs r2, #0
800167a: 2104 movs r1, #4
800167c: 4867 ldr r0, [pc, #412] @ (800181c <SetMot+0x2dc>)
800167e: f001 f9cd bl 8002a1c <HAL_GPIO_WritePin>
break;
8001682: e0c4 b.n 800180e <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
8001684: 210c movs r1, #12
8001686: 4864 ldr r0, [pc, #400] @ (8001818 <SetMot+0x2d8>)
8001688: f7ff fee4 bl 8001454 <IsPwmRunning>
800168c: 4603 mov r3, r0
800168e: 2b00 cmp r3, #0
8001690: d006 beq.n 80016a0 <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
8001692: 88bb ldrh r3, [r7, #4]
8001694: 461a mov r2, r3
8001696: 210c movs r1, #12
8001698: 485f ldr r0, [pc, #380] @ (8001818 <SetMot+0x2d8>)
800169a: f7ff ff28 bl 80014ee <SetMotPwm>
break;
800169e: e0b6 b.n 800180e <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
80016a0: 2201 movs r2, #1
80016a2: 2104 movs r1, #4
80016a4: 485d ldr r0, [pc, #372] @ (800181c <SetMot+0x2dc>)
80016a6: f001 f9b9 bl 8002a1c <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
80016aa: 88bb ldrh r3, [r7, #4]
80016ac: 461a mov r2, r3
80016ae: 210c movs r1, #12
80016b0: 4859 ldr r0, [pc, #356] @ (8001818 <SetMot+0x2d8>)
80016b2: f7ff fef1 bl 8001498 <StartMot>
break;
80016b6: e0aa b.n 800180e <SetMot+0x2ce>
case 3:
if(dir==FW){
80016b8: 79bb ldrb r3, [r7, #6]
80016ba: 2b00 cmp r3, #0
80016bc: d128 bne.n 8001710 <SetMot+0x1d0>
if(pwmval==0){
80016be: 88bb ldrh r3, [r7, #4]
80016c0: 2b00 cmp r3, #0
80016c2: d10a bne.n 80016da <SetMot+0x19a>
StopMot(timMot3,FWMot3);
80016c4: 2100 movs r1, #0
80016c6: 4856 ldr r0, [pc, #344] @ (8001820 <SetMot+0x2e0>)
80016c8: f7ff fed9 bl 800147e <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
80016cc: 2200 movs r2, #0
80016ce: f44f 6180 mov.w r1, #1024 @ 0x400
80016d2: 4852 ldr r0, [pc, #328] @ (800181c <SetMot+0x2dc>)
80016d4: f001 f9a2 bl 8002a1c <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
80016d8: e099 b.n 800180e <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
80016da: 2100 movs r1, #0
80016dc: 4850 ldr r0, [pc, #320] @ (8001820 <SetMot+0x2e0>)
80016de: f7ff feb9 bl 8001454 <IsPwmRunning>
80016e2: 4603 mov r3, r0
80016e4: 2b00 cmp r3, #0
80016e6: d006 beq.n 80016f6 <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
80016e8: 88bb ldrh r3, [r7, #4]
80016ea: 461a mov r2, r3
80016ec: 2100 movs r1, #0
80016ee: 484c ldr r0, [pc, #304] @ (8001820 <SetMot+0x2e0>)
80016f0: f7ff fefd bl 80014ee <SetMotPwm>
break;
80016f4: e08b b.n 800180e <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80016f6: 2201 movs r2, #1
80016f8: f44f 6180 mov.w r1, #1024 @ 0x400
80016fc: 4847 ldr r0, [pc, #284] @ (800181c <SetMot+0x2dc>)
80016fe: f001 f98d bl 8002a1c <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8001702: 88bb ldrh r3, [r7, #4]
8001704: 461a mov r2, r3
8001706: 2100 movs r1, #0
8001708: 4845 ldr r0, [pc, #276] @ (8001820 <SetMot+0x2e0>)
800170a: f7ff fec5 bl 8001498 <StartMot>
break;
800170e: e07e b.n 800180e <SetMot+0x2ce>
if(pwmval==0){
8001710: 88bb ldrh r3, [r7, #4]
8001712: 2b00 cmp r3, #0
8001714: d10a bne.n 800172c <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
8001716: 2104 movs r1, #4
8001718: 4841 ldr r0, [pc, #260] @ (8001820 <SetMot+0x2e0>)
800171a: f7ff feb0 bl 800147e <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
800171e: 2200 movs r2, #0
8001720: f44f 6180 mov.w r1, #1024 @ 0x400
8001724: 483d ldr r0, [pc, #244] @ (800181c <SetMot+0x2dc>)
8001726: f001 f979 bl 8002a1c <HAL_GPIO_WritePin>
break;
800172a: e070 b.n 800180e <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
800172c: 2104 movs r1, #4
800172e: 483c ldr r0, [pc, #240] @ (8001820 <SetMot+0x2e0>)
8001730: f7ff fe90 bl 8001454 <IsPwmRunning>
8001734: 4603 mov r3, r0
8001736: 2b00 cmp r3, #0
8001738: d006 beq.n 8001748 <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
800173a: 88bb ldrh r3, [r7, #4]
800173c: 461a mov r2, r3
800173e: 2104 movs r1, #4
8001740: 4837 ldr r0, [pc, #220] @ (8001820 <SetMot+0x2e0>)
8001742: f7ff fed4 bl 80014ee <SetMotPwm>
break;
8001746: e062 b.n 800180e <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8001748: 2201 movs r2, #1
800174a: f44f 6180 mov.w r1, #1024 @ 0x400
800174e: 4833 ldr r0, [pc, #204] @ (800181c <SetMot+0x2dc>)
8001750: f001 f964 bl 8002a1c <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8001754: 88bb ldrh r3, [r7, #4]
8001756: 461a mov r2, r3
8001758: 2104 movs r1, #4
800175a: 4831 ldr r0, [pc, #196] @ (8001820 <SetMot+0x2e0>)
800175c: f7ff fe9c bl 8001498 <StartMot>
break;
8001760: e055 b.n 800180e <SetMot+0x2ce>
case 4:
if(dir==FW){
8001762: 79bb ldrb r3, [r7, #6]
8001764: 2b00 cmp r3, #0
8001766: d128 bne.n 80017ba <SetMot+0x27a>
if(pwmval==0){
8001768: 88bb ldrh r3, [r7, #4]
800176a: 2b00 cmp r3, #0
800176c: d10a bne.n 8001784 <SetMot+0x244>
StopMot(timMot4,FWMot4);
800176e: 2108 movs r1, #8
8001770: 482b ldr r0, [pc, #172] @ (8001820 <SetMot+0x2e0>)
8001772: f7ff fe84 bl 800147e <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8001776: 2200 movs r2, #0
8001778: f44f 6100 mov.w r1, #2048 @ 0x800
800177c: 4827 ldr r0, [pc, #156] @ (800181c <SetMot+0x2dc>)
800177e: f001 f94d bl 8002a1c <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8001782: e044 b.n 800180e <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
8001784: 2108 movs r1, #8
8001786: 4826 ldr r0, [pc, #152] @ (8001820 <SetMot+0x2e0>)
8001788: f7ff fe64 bl 8001454 <IsPwmRunning>
800178c: 4603 mov r3, r0
800178e: 2b00 cmp r3, #0
8001790: d006 beq.n 80017a0 <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
8001792: 88bb ldrh r3, [r7, #4]
8001794: 461a mov r2, r3
8001796: 2108 movs r1, #8
8001798: 4821 ldr r0, [pc, #132] @ (8001820 <SetMot+0x2e0>)
800179a: f7ff fea8 bl 80014ee <SetMotPwm>
break;
800179e: e036 b.n 800180e <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80017a0: 2201 movs r2, #1
80017a2: f44f 6100 mov.w r1, #2048 @ 0x800
80017a6: 481d ldr r0, [pc, #116] @ (800181c <SetMot+0x2dc>)
80017a8: f001 f938 bl 8002a1c <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
80017ac: 88bb ldrh r3, [r7, #4]
80017ae: 461a mov r2, r3
80017b0: 2108 movs r1, #8
80017b2: 481b ldr r0, [pc, #108] @ (8001820 <SetMot+0x2e0>)
80017b4: f7ff fe70 bl 8001498 <StartMot>
break;
80017b8: e029 b.n 800180e <SetMot+0x2ce>
if(pwmval==0){
80017ba: 88bb ldrh r3, [r7, #4]
80017bc: 2b00 cmp r3, #0
80017be: d10a bne.n 80017d6 <SetMot+0x296>
StopMot(timMot4,BWMot4);
80017c0: 210c movs r1, #12
80017c2: 4817 ldr r0, [pc, #92] @ (8001820 <SetMot+0x2e0>)
80017c4: f7ff fe5b bl 800147e <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
80017c8: 2200 movs r2, #0
80017ca: f44f 6100 mov.w r1, #2048 @ 0x800
80017ce: 4813 ldr r0, [pc, #76] @ (800181c <SetMot+0x2dc>)
80017d0: f001 f924 bl 8002a1c <HAL_GPIO_WritePin>
break;
80017d4: e01b b.n 800180e <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
80017d6: 210c movs r1, #12
80017d8: 4811 ldr r0, [pc, #68] @ (8001820 <SetMot+0x2e0>)
80017da: f7ff fe3b bl 8001454 <IsPwmRunning>
80017de: 4603 mov r3, r0
80017e0: 2b00 cmp r3, #0
80017e2: d006 beq.n 80017f2 <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
80017e4: 88bb ldrh r3, [r7, #4]
80017e6: 461a mov r2, r3
80017e8: 210c movs r1, #12
80017ea: 480d ldr r0, [pc, #52] @ (8001820 <SetMot+0x2e0>)
80017ec: f7ff fe7f bl 80014ee <SetMotPwm>
break;
80017f0: e00d b.n 800180e <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80017f2: 2201 movs r2, #1
80017f4: f44f 6100 mov.w r1, #2048 @ 0x800
80017f8: 4808 ldr r0, [pc, #32] @ (800181c <SetMot+0x2dc>)
80017fa: f001 f90f bl 8002a1c <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
80017fe: 88bb ldrh r3, [r7, #4]
8001800: 461a mov r2, r3
8001802: 210c movs r1, #12
8001804: 4806 ldr r0, [pc, #24] @ (8001820 <SetMot+0x2e0>)
8001806: f7ff fe47 bl 8001498 <StartMot>
break;
800180a: e000 b.n 800180e <SetMot+0x2ce>
default:
break;
800180c: bf00 nop
}
}
800180e: bf00 nop
8001810: 3708 adds r7, #8
8001812: 46bd mov sp, r7
8001814: bd80 pop {r7, pc}
8001816: bf00 nop
8001818: 20000284 .word 0x20000284
800181c: 40010c00 .word 0x40010c00
8001820: 200002cc .word 0x200002cc
08001824 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8001824: b480 push {r7}
8001826: b085 sub sp, #20
8001828: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
800182a: 4b15 ldr r3, [pc, #84] @ (8001880 <HAL_MspInit+0x5c>)
800182c: 699b ldr r3, [r3, #24]
800182e: 4a14 ldr r2, [pc, #80] @ (8001880 <HAL_MspInit+0x5c>)
8001830: f043 0301 orr.w r3, r3, #1
8001834: 6193 str r3, [r2, #24]
8001836: 4b12 ldr r3, [pc, #72] @ (8001880 <HAL_MspInit+0x5c>)
8001838: 699b ldr r3, [r3, #24]
800183a: f003 0301 and.w r3, r3, #1
800183e: 60bb str r3, [r7, #8]
8001840: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
8001842: 4b0f ldr r3, [pc, #60] @ (8001880 <HAL_MspInit+0x5c>)
8001844: 69db ldr r3, [r3, #28]
8001846: 4a0e ldr r2, [pc, #56] @ (8001880 <HAL_MspInit+0x5c>)
8001848: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
800184c: 61d3 str r3, [r2, #28]
800184e: 4b0c ldr r3, [pc, #48] @ (8001880 <HAL_MspInit+0x5c>)
8001850: 69db ldr r3, [r3, #28]
8001852: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8001856: 607b str r3, [r7, #4]
8001858: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
800185a: 4b0a ldr r3, [pc, #40] @ (8001884 <HAL_MspInit+0x60>)
800185c: 685b ldr r3, [r3, #4]
800185e: 60fb str r3, [r7, #12]
8001860: 68fb ldr r3, [r7, #12]
8001862: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
8001866: 60fb str r3, [r7, #12]
8001868: 68fb ldr r3, [r7, #12]
800186a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
800186e: 60fb str r3, [r7, #12]
8001870: 4a04 ldr r2, [pc, #16] @ (8001884 <HAL_MspInit+0x60>)
8001872: 68fb ldr r3, [r7, #12]
8001874: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8001876: bf00 nop
8001878: 3714 adds r7, #20
800187a: 46bd mov sp, r7
800187c: bc80 pop {r7}
800187e: 4770 bx lr
8001880: 40021000 .word 0x40021000
8001884: 40010000 .word 0x40010000
08001888 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
8001888: b580 push {r7, lr}
800188a: b08a sub sp, #40 @ 0x28
800188c: af00 add r7, sp, #0
800188e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001890: f107 0318 add.w r3, r7, #24
8001894: 2200 movs r2, #0
8001896: 601a str r2, [r3, #0]
8001898: 605a str r2, [r3, #4]
800189a: 609a str r2, [r3, #8]
800189c: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
800189e: 687b ldr r3, [r7, #4]
80018a0: 681b ldr r3, [r3, #0]
80018a2: 4a1f ldr r2, [pc, #124] @ (8001920 <HAL_ADC_MspInit+0x98>)
80018a4: 4293 cmp r3, r2
80018a6: d137 bne.n 8001918 <HAL_ADC_MspInit+0x90>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
80018a8: 4b1e ldr r3, [pc, #120] @ (8001924 <HAL_ADC_MspInit+0x9c>)
80018aa: 699b ldr r3, [r3, #24]
80018ac: 4a1d ldr r2, [pc, #116] @ (8001924 <HAL_ADC_MspInit+0x9c>)
80018ae: f443 7300 orr.w r3, r3, #512 @ 0x200
80018b2: 6193 str r3, [r2, #24]
80018b4: 4b1b ldr r3, [pc, #108] @ (8001924 <HAL_ADC_MspInit+0x9c>)
80018b6: 699b ldr r3, [r3, #24]
80018b8: f403 7300 and.w r3, r3, #512 @ 0x200
80018bc: 617b str r3, [r7, #20]
80018be: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
80018c0: 4b18 ldr r3, [pc, #96] @ (8001924 <HAL_ADC_MspInit+0x9c>)
80018c2: 699b ldr r3, [r3, #24]
80018c4: 4a17 ldr r2, [pc, #92] @ (8001924 <HAL_ADC_MspInit+0x9c>)
80018c6: f043 0304 orr.w r3, r3, #4
80018ca: 6193 str r3, [r2, #24]
80018cc: 4b15 ldr r3, [pc, #84] @ (8001924 <HAL_ADC_MspInit+0x9c>)
80018ce: 699b ldr r3, [r3, #24]
80018d0: f003 0304 and.w r3, r3, #4
80018d4: 613b str r3, [r7, #16]
80018d6: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
80018d8: 4b12 ldr r3, [pc, #72] @ (8001924 <HAL_ADC_MspInit+0x9c>)
80018da: 699b ldr r3, [r3, #24]
80018dc: 4a11 ldr r2, [pc, #68] @ (8001924 <HAL_ADC_MspInit+0x9c>)
80018de: f043 0308 orr.w r3, r3, #8
80018e2: 6193 str r3, [r2, #24]
80018e4: 4b0f ldr r3, [pc, #60] @ (8001924 <HAL_ADC_MspInit+0x9c>)
80018e6: 699b ldr r3, [r3, #24]
80018e8: f003 0308 and.w r3, r3, #8
80018ec: 60fb str r3, [r7, #12]
80018ee: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
80018f0: 23f0 movs r3, #240 @ 0xf0
80018f2: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
80018f4: 2303 movs r3, #3
80018f6: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80018f8: f107 0318 add.w r3, r7, #24
80018fc: 4619 mov r1, r3
80018fe: 480a ldr r0, [pc, #40] @ (8001928 <HAL_ADC_MspInit+0xa0>)
8001900: f000 ff08 bl 8002714 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8001904: 2301 movs r3, #1
8001906: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8001908: 2303 movs r3, #3
800190a: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
800190c: f107 0318 add.w r3, r7, #24
8001910: 4619 mov r1, r3
8001912: 4806 ldr r0, [pc, #24] @ (800192c <HAL_ADC_MspInit+0xa4>)
8001914: f000 fefe bl 8002714 <HAL_GPIO_Init>
/* USER CODE END ADC1_MspInit 1 */
}
}
8001918: bf00 nop
800191a: 3728 adds r7, #40 @ 0x28
800191c: 46bd mov sp, r7
800191e: bd80 pop {r7, pc}
8001920: 40012400 .word 0x40012400
8001924: 40021000 .word 0x40021000
8001928: 40010800 .word 0x40010800
800192c: 40010c00 .word 0x40010c00
08001930 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8001930: b480 push {r7}
8001932: b085 sub sp, #20
8001934: af00 add r7, sp, #0
8001936: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
8001938: 687b ldr r3, [r7, #4]
800193a: 681b ldr r3, [r3, #0]
800193c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8001940: d10c bne.n 800195c <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
8001942: 4b11 ldr r3, [pc, #68] @ (8001988 <HAL_TIM_Base_MspInit+0x58>)
8001944: 69db ldr r3, [r3, #28]
8001946: 4a10 ldr r2, [pc, #64] @ (8001988 <HAL_TIM_Base_MspInit+0x58>)
8001948: f043 0301 orr.w r3, r3, #1
800194c: 61d3 str r3, [r2, #28]
800194e: 4b0e ldr r3, [pc, #56] @ (8001988 <HAL_TIM_Base_MspInit+0x58>)
8001950: 69db ldr r3, [r3, #28]
8001952: f003 0301 and.w r3, r3, #1
8001956: 60fb str r3, [r7, #12]
8001958: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
800195a: e010 b.n 800197e <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
800195c: 687b ldr r3, [r7, #4]
800195e: 681b ldr r3, [r3, #0]
8001960: 4a0a ldr r2, [pc, #40] @ (800198c <HAL_TIM_Base_MspInit+0x5c>)
8001962: 4293 cmp r3, r2
8001964: d10b bne.n 800197e <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
8001966: 4b08 ldr r3, [pc, #32] @ (8001988 <HAL_TIM_Base_MspInit+0x58>)
8001968: 69db ldr r3, [r3, #28]
800196a: 4a07 ldr r2, [pc, #28] @ (8001988 <HAL_TIM_Base_MspInit+0x58>)
800196c: f043 0304 orr.w r3, r3, #4
8001970: 61d3 str r3, [r2, #28]
8001972: 4b05 ldr r3, [pc, #20] @ (8001988 <HAL_TIM_Base_MspInit+0x58>)
8001974: 69db ldr r3, [r3, #28]
8001976: f003 0304 and.w r3, r3, #4
800197a: 60bb str r3, [r7, #8]
800197c: 68bb ldr r3, [r7, #8]
}
800197e: bf00 nop
8001980: 3714 adds r7, #20
8001982: 46bd mov sp, r7
8001984: bc80 pop {r7}
8001986: 4770 bx lr
8001988: 40021000 .word 0x40021000
800198c: 40000800 .word 0x40000800
08001990 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8001990: b580 push {r7, lr}
8001992: b088 sub sp, #32
8001994: af00 add r7, sp, #0
8001996: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001998: f107 0310 add.w r3, r7, #16
800199c: 2200 movs r2, #0
800199e: 601a str r2, [r3, #0]
80019a0: 605a str r2, [r3, #4]
80019a2: 609a str r2, [r3, #8]
80019a4: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
80019a6: 687b ldr r3, [r7, #4]
80019a8: 681b ldr r3, [r3, #0]
80019aa: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80019ae: d118 bne.n 80019e2 <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
80019b0: 4b1d ldr r3, [pc, #116] @ (8001a28 <HAL_TIM_MspPostInit+0x98>)
80019b2: 699b ldr r3, [r3, #24]
80019b4: 4a1c ldr r2, [pc, #112] @ (8001a28 <HAL_TIM_MspPostInit+0x98>)
80019b6: f043 0304 orr.w r3, r3, #4
80019ba: 6193 str r3, [r2, #24]
80019bc: 4b1a ldr r3, [pc, #104] @ (8001a28 <HAL_TIM_MspPostInit+0x98>)
80019be: 699b ldr r3, [r3, #24]
80019c0: f003 0304 and.w r3, r3, #4
80019c4: 60fb str r3, [r7, #12]
80019c6: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
80019c8: 230f movs r3, #15
80019ca: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80019cc: 2302 movs r3, #2
80019ce: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80019d0: 2302 movs r3, #2
80019d2: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80019d4: f107 0310 add.w r3, r7, #16
80019d8: 4619 mov r1, r3
80019da: 4814 ldr r0, [pc, #80] @ (8001a2c <HAL_TIM_MspPostInit+0x9c>)
80019dc: f000 fe9a bl 8002714 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
80019e0: e01d b.n 8001a1e <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
80019e2: 687b ldr r3, [r7, #4]
80019e4: 681b ldr r3, [r3, #0]
80019e6: 4a12 ldr r2, [pc, #72] @ (8001a30 <HAL_TIM_MspPostInit+0xa0>)
80019e8: 4293 cmp r3, r2
80019ea: d118 bne.n 8001a1e <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
80019ec: 4b0e ldr r3, [pc, #56] @ (8001a28 <HAL_TIM_MspPostInit+0x98>)
80019ee: 699b ldr r3, [r3, #24]
80019f0: 4a0d ldr r2, [pc, #52] @ (8001a28 <HAL_TIM_MspPostInit+0x98>)
80019f2: f043 0308 orr.w r3, r3, #8
80019f6: 6193 str r3, [r2, #24]
80019f8: 4b0b ldr r3, [pc, #44] @ (8001a28 <HAL_TIM_MspPostInit+0x98>)
80019fa: 699b ldr r3, [r3, #24]
80019fc: f003 0308 and.w r3, r3, #8
8001a00: 60bb str r3, [r7, #8]
8001a02: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
8001a04: f44f 7370 mov.w r3, #960 @ 0x3c0
8001a08: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001a0a: 2302 movs r3, #2
8001a0c: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8001a0e: 2302 movs r3, #2
8001a10: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8001a12: f107 0310 add.w r3, r7, #16
8001a16: 4619 mov r1, r3
8001a18: 4806 ldr r0, [pc, #24] @ (8001a34 <HAL_TIM_MspPostInit+0xa4>)
8001a1a: f000 fe7b bl 8002714 <HAL_GPIO_Init>
}
8001a1e: bf00 nop
8001a20: 3720 adds r7, #32
8001a22: 46bd mov sp, r7
8001a24: bd80 pop {r7, pc}
8001a26: bf00 nop
8001a28: 40021000 .word 0x40021000
8001a2c: 40010800 .word 0x40010800
8001a30: 40000800 .word 0x40000800
8001a34: 40010c00 .word 0x40010c00
08001a38 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8001a38: b580 push {r7, lr}
8001a3a: b088 sub sp, #32
8001a3c: af00 add r7, sp, #0
8001a3e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8001a40: f107 0310 add.w r3, r7, #16
8001a44: 2200 movs r2, #0
8001a46: 601a str r2, [r3, #0]
8001a48: 605a str r2, [r3, #4]
8001a4a: 609a str r2, [r3, #8]
8001a4c: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
8001a4e: 687b ldr r3, [r7, #4]
8001a50: 681b ldr r3, [r3, #0]
8001a52: 4a1c ldr r2, [pc, #112] @ (8001ac4 <HAL_UART_MspInit+0x8c>)
8001a54: 4293 cmp r3, r2
8001a56: d131 bne.n 8001abc <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8001a58: 4b1b ldr r3, [pc, #108] @ (8001ac8 <HAL_UART_MspInit+0x90>)
8001a5a: 699b ldr r3, [r3, #24]
8001a5c: 4a1a ldr r2, [pc, #104] @ (8001ac8 <HAL_UART_MspInit+0x90>)
8001a5e: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8001a62: 6193 str r3, [r2, #24]
8001a64: 4b18 ldr r3, [pc, #96] @ (8001ac8 <HAL_UART_MspInit+0x90>)
8001a66: 699b ldr r3, [r3, #24]
8001a68: f403 4380 and.w r3, r3, #16384 @ 0x4000
8001a6c: 60fb str r3, [r7, #12]
8001a6e: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8001a70: 4b15 ldr r3, [pc, #84] @ (8001ac8 <HAL_UART_MspInit+0x90>)
8001a72: 699b ldr r3, [r3, #24]
8001a74: 4a14 ldr r2, [pc, #80] @ (8001ac8 <HAL_UART_MspInit+0x90>)
8001a76: f043 0304 orr.w r3, r3, #4
8001a7a: 6193 str r3, [r2, #24]
8001a7c: 4b12 ldr r3, [pc, #72] @ (8001ac8 <HAL_UART_MspInit+0x90>)
8001a7e: 699b ldr r3, [r3, #24]
8001a80: f003 0304 and.w r3, r3, #4
8001a84: 60bb str r3, [r7, #8]
8001a86: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
8001a88: f44f 7300 mov.w r3, #512 @ 0x200
8001a8c: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8001a8e: 2302 movs r3, #2
8001a90: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8001a92: 2303 movs r3, #3
8001a94: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001a96: f107 0310 add.w r3, r7, #16
8001a9a: 4619 mov r1, r3
8001a9c: 480b ldr r0, [pc, #44] @ (8001acc <HAL_UART_MspInit+0x94>)
8001a9e: f000 fe39 bl 8002714 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
8001aa2: f44f 6380 mov.w r3, #1024 @ 0x400
8001aa6: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8001aa8: 2300 movs r3, #0
8001aaa: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8001aac: 2300 movs r3, #0
8001aae: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8001ab0: f107 0310 add.w r3, r7, #16
8001ab4: 4619 mov r1, r3
8001ab6: 4805 ldr r0, [pc, #20] @ (8001acc <HAL_UART_MspInit+0x94>)
8001ab8: f000 fe2c bl 8002714 <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8001abc: bf00 nop
8001abe: 3720 adds r7, #32
8001ac0: 46bd mov sp, r7
8001ac2: bd80 pop {r7, pc}
8001ac4: 40013800 .word 0x40013800
8001ac8: 40021000 .word 0x40021000
8001acc: 40010800 .word 0x40010800
08001ad0 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8001ad0: b480 push {r7}
8001ad2: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8001ad4: bf00 nop
8001ad6: e7fd b.n 8001ad4 <NMI_Handler+0x4>
08001ad8 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8001ad8: b480 push {r7}
8001ada: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8001adc: bf00 nop
8001ade: e7fd b.n 8001adc <HardFault_Handler+0x4>
08001ae0 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8001ae0: b480 push {r7}
8001ae2: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8001ae4: bf00 nop
8001ae6: e7fd b.n 8001ae4 <MemManage_Handler+0x4>
08001ae8 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8001ae8: b480 push {r7}
8001aea: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8001aec: bf00 nop
8001aee: e7fd b.n 8001aec <BusFault_Handler+0x4>
08001af0 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8001af0: b480 push {r7}
8001af2: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8001af4: bf00 nop
8001af6: e7fd b.n 8001af4 <UsageFault_Handler+0x4>
08001af8 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8001af8: b480 push {r7}
8001afa: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8001afc: bf00 nop
8001afe: 46bd mov sp, r7
8001b00: bc80 pop {r7}
8001b02: 4770 bx lr
08001b04 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8001b04: b480 push {r7}
8001b06: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8001b08: bf00 nop
8001b0a: 46bd mov sp, r7
8001b0c: bc80 pop {r7}
8001b0e: 4770 bx lr
08001b10 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8001b10: b480 push {r7}
8001b12: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8001b14: bf00 nop
8001b16: 46bd mov sp, r7
8001b18: bc80 pop {r7}
8001b1a: 4770 bx lr
08001b1c <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8001b1c: b580 push {r7, lr}
8001b1e: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8001b20: f000 f8b6 bl 8001c90 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
8001b24: f000 fbef bl 8002306 <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
8001b28: bf00 nop
8001b2a: bd80 pop {r7, pc}
08001b2c <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8001b2c: b580 push {r7, lr}
8001b2e: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8001b30: 4802 ldr r0, [pc, #8] @ (8001b3c <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8001b32: f001 f8c0 bl 8002cb6 <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8001b36: bf00 nop
8001b38: bd80 pop {r7, pc}
8001b3a: bf00 nop
8001b3c: 2000119c .word 0x2000119c
08001b40 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8001b40: b580 push {r7, lr}
8001b42: b086 sub sp, #24
8001b44: af00 add r7, sp, #0
8001b46: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8001b48: 4a14 ldr r2, [pc, #80] @ (8001b9c <_sbrk+0x5c>)
8001b4a: 4b15 ldr r3, [pc, #84] @ (8001ba0 <_sbrk+0x60>)
8001b4c: 1ad3 subs r3, r2, r3
8001b4e: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8001b50: 697b ldr r3, [r7, #20]
8001b52: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8001b54: 4b13 ldr r3, [pc, #76] @ (8001ba4 <_sbrk+0x64>)
8001b56: 681b ldr r3, [r3, #0]
8001b58: 2b00 cmp r3, #0
8001b5a: d102 bne.n 8001b62 <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8001b5c: 4b11 ldr r3, [pc, #68] @ (8001ba4 <_sbrk+0x64>)
8001b5e: 4a12 ldr r2, [pc, #72] @ (8001ba8 <_sbrk+0x68>)
8001b60: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8001b62: 4b10 ldr r3, [pc, #64] @ (8001ba4 <_sbrk+0x64>)
8001b64: 681a ldr r2, [r3, #0]
8001b66: 687b ldr r3, [r7, #4]
8001b68: 4413 add r3, r2
8001b6a: 693a ldr r2, [r7, #16]
8001b6c: 429a cmp r2, r3
8001b6e: d207 bcs.n 8001b80 <_sbrk+0x40>
{
errno = ENOMEM;
8001b70: f008 fd3e bl 800a5f0 <__errno>
8001b74: 4603 mov r3, r0
8001b76: 220c movs r2, #12
8001b78: 601a str r2, [r3, #0]
return (void *)-1;
8001b7a: f04f 33ff mov.w r3, #4294967295
8001b7e: e009 b.n 8001b94 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8001b80: 4b08 ldr r3, [pc, #32] @ (8001ba4 <_sbrk+0x64>)
8001b82: 681b ldr r3, [r3, #0]
8001b84: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8001b86: 4b07 ldr r3, [pc, #28] @ (8001ba4 <_sbrk+0x64>)
8001b88: 681a ldr r2, [r3, #0]
8001b8a: 687b ldr r3, [r7, #4]
8001b8c: 4413 add r3, r2
8001b8e: 4a05 ldr r2, [pc, #20] @ (8001ba4 <_sbrk+0x64>)
8001b90: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8001b92: 68fb ldr r3, [r7, #12]
}
8001b94: 4618 mov r0, r3
8001b96: 3718 adds r7, #24
8001b98: 46bd mov sp, r7
8001b9a: bd80 pop {r7, pc}
8001b9c: 20005000 .word 0x20005000
8001ba0: 00000400 .word 0x00000400
8001ba4: 200003a8 .word 0x200003a8
8001ba8: 200017e0 .word 0x200017e0
08001bac <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8001bac: b480 push {r7}
8001bae: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8001bb0: bf00 nop
8001bb2: 46bd mov sp, r7
8001bb4: bc80 pop {r7}
8001bb6: 4770 bx lr
08001bb8 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8001bb8: f7ff fff8 bl 8001bac <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8001bbc: 480b ldr r0, [pc, #44] @ (8001bec <LoopFillZerobss+0xe>)
ldr r1, =_edata
8001bbe: 490c ldr r1, [pc, #48] @ (8001bf0 <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8001bc0: 4a0c ldr r2, [pc, #48] @ (8001bf4 <LoopFillZerobss+0x16>)
movs r3, #0
8001bc2: 2300 movs r3, #0
b LoopCopyDataInit
8001bc4: e002 b.n 8001bcc <LoopCopyDataInit>
08001bc6 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8001bc6: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8001bc8: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8001bca: 3304 adds r3, #4
08001bcc <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8001bcc: 18c4 adds r4, r0, r3
cmp r4, r1
8001bce: 428c cmp r4, r1
bcc CopyDataInit
8001bd0: d3f9 bcc.n 8001bc6 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8001bd2: 4a09 ldr r2, [pc, #36] @ (8001bf8 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8001bd4: 4c09 ldr r4, [pc, #36] @ (8001bfc <LoopFillZerobss+0x1e>)
movs r3, #0
8001bd6: 2300 movs r3, #0
b LoopFillZerobss
8001bd8: e001 b.n 8001bde <LoopFillZerobss>
08001bda <FillZerobss>:
FillZerobss:
str r3, [r2]
8001bda: 6013 str r3, [r2, #0]
adds r2, r2, #4
8001bdc: 3204 adds r2, #4
08001bde <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8001bde: 42a2 cmp r2, r4
bcc FillZerobss
8001be0: d3fb bcc.n 8001bda <FillZerobss>
/* Call static constructors */
bl __libc_init_array
8001be2: f008 fd0b bl 800a5fc <__libc_init_array>
/* Call the application's entry point.*/
bl main
8001be6: f7ff f92f bl 8000e48 <main>
bx lr
8001bea: 4770 bx lr
ldr r0, =_sdata
8001bec: 20000000 .word 0x20000000
ldr r1, =_edata
8001bf0: 200001d0 .word 0x200001d0
ldr r2, =_sidata
8001bf4: 0800b148 .word 0x0800b148
ldr r2, =_sbss
8001bf8: 200001d0 .word 0x200001d0
ldr r4, =_ebss
8001bfc: 200017dc .word 0x200017dc
08001c00 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8001c00: e7fe b.n 8001c00 <ADC1_2_IRQHandler>
...
08001c04 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8001c04: b580 push {r7, lr}
8001c06: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8001c08: 4b08 ldr r3, [pc, #32] @ (8001c2c <HAL_Init+0x28>)
8001c0a: 681b ldr r3, [r3, #0]
8001c0c: 4a07 ldr r2, [pc, #28] @ (8001c2c <HAL_Init+0x28>)
8001c0e: f043 0310 orr.w r3, r3, #16
8001c12: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8001c14: 2003 movs r0, #3
8001c16: f000 fb35 bl 8002284 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8001c1a: 200f movs r0, #15
8001c1c: f000 f808 bl 8001c30 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8001c20: f7ff fe00 bl 8001824 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8001c24: 2300 movs r3, #0
}
8001c26: 4618 mov r0, r3
8001c28: bd80 pop {r7, pc}
8001c2a: bf00 nop
8001c2c: 40022000 .word 0x40022000
08001c30 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8001c30: b580 push {r7, lr}
8001c32: b082 sub sp, #8
8001c34: af00 add r7, sp, #0
8001c36: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8001c38: 4b12 ldr r3, [pc, #72] @ (8001c84 <HAL_InitTick+0x54>)
8001c3a: 681a ldr r2, [r3, #0]
8001c3c: 4b12 ldr r3, [pc, #72] @ (8001c88 <HAL_InitTick+0x58>)
8001c3e: 781b ldrb r3, [r3, #0]
8001c40: 4619 mov r1, r3
8001c42: f44f 737a mov.w r3, #1000 @ 0x3e8
8001c46: fbb3 f3f1 udiv r3, r3, r1
8001c4a: fbb2 f3f3 udiv r3, r2, r3
8001c4e: 4618 mov r0, r3
8001c50: f000 fb4d bl 80022ee <HAL_SYSTICK_Config>
8001c54: 4603 mov r3, r0
8001c56: 2b00 cmp r3, #0
8001c58: d001 beq.n 8001c5e <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8001c5a: 2301 movs r3, #1
8001c5c: e00e b.n 8001c7c <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8001c5e: 687b ldr r3, [r7, #4]
8001c60: 2b0f cmp r3, #15
8001c62: d80a bhi.n 8001c7a <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8001c64: 2200 movs r2, #0
8001c66: 6879 ldr r1, [r7, #4]
8001c68: f04f 30ff mov.w r0, #4294967295
8001c6c: f000 fb15 bl 800229a <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8001c70: 4a06 ldr r2, [pc, #24] @ (8001c8c <HAL_InitTick+0x5c>)
8001c72: 687b ldr r3, [r7, #4]
8001c74: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8001c76: 2300 movs r3, #0
8001c78: e000 b.n 8001c7c <HAL_InitTick+0x4c>
return HAL_ERROR;
8001c7a: 2301 movs r3, #1
}
8001c7c: 4618 mov r0, r3
8001c7e: 3708 adds r7, #8
8001c80: 46bd mov sp, r7
8001c82: bd80 pop {r7, pc}
8001c84: 20000004 .word 0x20000004
8001c88: 2000000c .word 0x2000000c
8001c8c: 20000008 .word 0x20000008
08001c90 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8001c90: b480 push {r7}
8001c92: af00 add r7, sp, #0
uwTick += uwTickFreq;
8001c94: 4b05 ldr r3, [pc, #20] @ (8001cac <HAL_IncTick+0x1c>)
8001c96: 781b ldrb r3, [r3, #0]
8001c98: 461a mov r2, r3
8001c9a: 4b05 ldr r3, [pc, #20] @ (8001cb0 <HAL_IncTick+0x20>)
8001c9c: 681b ldr r3, [r3, #0]
8001c9e: 4413 add r3, r2
8001ca0: 4a03 ldr r2, [pc, #12] @ (8001cb0 <HAL_IncTick+0x20>)
8001ca2: 6013 str r3, [r2, #0]
}
8001ca4: bf00 nop
8001ca6: 46bd mov sp, r7
8001ca8: bc80 pop {r7}
8001caa: 4770 bx lr
8001cac: 2000000c .word 0x2000000c
8001cb0: 200003ac .word 0x200003ac
08001cb4 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8001cb4: b480 push {r7}
8001cb6: af00 add r7, sp, #0
return uwTick;
8001cb8: 4b02 ldr r3, [pc, #8] @ (8001cc4 <HAL_GetTick+0x10>)
8001cba: 681b ldr r3, [r3, #0]
}
8001cbc: 4618 mov r0, r3
8001cbe: 46bd mov sp, r7
8001cc0: bc80 pop {r7}
8001cc2: 4770 bx lr
8001cc4: 200003ac .word 0x200003ac
08001cc8 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8001cc8: b580 push {r7, lr}
8001cca: b086 sub sp, #24
8001ccc: af00 add r7, sp, #0
8001cce: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8001cd0: 2300 movs r3, #0
8001cd2: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
8001cd4: 2300 movs r3, #0
8001cd6: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
8001cd8: 2300 movs r3, #0
8001cda: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
8001cdc: 2300 movs r3, #0
8001cde: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
8001ce0: 687b ldr r3, [r7, #4]
8001ce2: 2b00 cmp r3, #0
8001ce4: d101 bne.n 8001cea <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
8001ce6: 2301 movs r3, #1
8001ce8: e0be b.n 8001e68 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8001cea: 687b ldr r3, [r7, #4]
8001cec: 689b ldr r3, [r3, #8]
8001cee: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
8001cf0: 687b ldr r3, [r7, #4]
8001cf2: 6a9b ldr r3, [r3, #40] @ 0x28
8001cf4: 2b00 cmp r3, #0
8001cf6: d109 bne.n 8001d0c <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8001cf8: 687b ldr r3, [r7, #4]
8001cfa: 2200 movs r2, #0
8001cfc: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8001cfe: 687b ldr r3, [r7, #4]
8001d00: 2200 movs r2, #0
8001d02: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8001d06: 6878 ldr r0, [r7, #4]
8001d08: f7ff fdbe bl 8001888 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
8001d0c: 6878 ldr r0, [r7, #4]
8001d0e: f000 f9ab bl 8002068 <ADC_ConversionStop_Disable>
8001d12: 4603 mov r3, r0
8001d14: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8001d16: 687b ldr r3, [r7, #4]
8001d18: 6a9b ldr r3, [r3, #40] @ 0x28
8001d1a: f003 0310 and.w r3, r3, #16
8001d1e: 2b00 cmp r3, #0
8001d20: f040 8099 bne.w 8001e56 <HAL_ADC_Init+0x18e>
8001d24: 7dfb ldrb r3, [r7, #23]
8001d26: 2b00 cmp r3, #0
8001d28: f040 8095 bne.w 8001e56 <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8001d2c: 687b ldr r3, [r7, #4]
8001d2e: 6a9b ldr r3, [r3, #40] @ 0x28
8001d30: f423 5388 bic.w r3, r3, #4352 @ 0x1100
8001d34: f023 0302 bic.w r3, r3, #2
8001d38: f043 0202 orr.w r2, r3, #2
8001d3c: 687b ldr r3, [r7, #4]
8001d3e: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
8001d40: 687b ldr r3, [r7, #4]
8001d42: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8001d44: 687b ldr r3, [r7, #4]
8001d46: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8001d48: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8001d4a: 687b ldr r3, [r7, #4]
8001d4c: 7b1b ldrb r3, [r3, #12]
8001d4e: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8001d50: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
8001d52: 68ba ldr r2, [r7, #8]
8001d54: 4313 orrs r3, r2
8001d56: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8001d58: 687b ldr r3, [r7, #4]
8001d5a: 689b ldr r3, [r3, #8]
8001d5c: f5b3 7f80 cmp.w r3, #256 @ 0x100
8001d60: d003 beq.n 8001d6a <HAL_ADC_Init+0xa2>
8001d62: 687b ldr r3, [r7, #4]
8001d64: 689b ldr r3, [r3, #8]
8001d66: 2b01 cmp r3, #1
8001d68: d102 bne.n 8001d70 <HAL_ADC_Init+0xa8>
8001d6a: f44f 7380 mov.w r3, #256 @ 0x100
8001d6e: e000 b.n 8001d72 <HAL_ADC_Init+0xaa>
8001d70: 2300 movs r3, #0
8001d72: 693a ldr r2, [r7, #16]
8001d74: 4313 orrs r3, r2
8001d76: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8001d78: 687b ldr r3, [r7, #4]
8001d7a: 7d1b ldrb r3, [r3, #20]
8001d7c: 2b01 cmp r3, #1
8001d7e: d119 bne.n 8001db4 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8001d80: 687b ldr r3, [r7, #4]
8001d82: 7b1b ldrb r3, [r3, #12]
8001d84: 2b00 cmp r3, #0
8001d86: d109 bne.n 8001d9c <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8001d88: 687b ldr r3, [r7, #4]
8001d8a: 699b ldr r3, [r3, #24]
8001d8c: 3b01 subs r3, #1
8001d8e: 035a lsls r2, r3, #13
8001d90: 693b ldr r3, [r7, #16]
8001d92: 4313 orrs r3, r2
8001d94: f443 6300 orr.w r3, r3, #2048 @ 0x800
8001d98: 613b str r3, [r7, #16]
8001d9a: e00b b.n 8001db4 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8001d9c: 687b ldr r3, [r7, #4]
8001d9e: 6a9b ldr r3, [r3, #40] @ 0x28
8001da0: f043 0220 orr.w r2, r3, #32
8001da4: 687b ldr r3, [r7, #4]
8001da6: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8001da8: 687b ldr r3, [r7, #4]
8001daa: 6adb ldr r3, [r3, #44] @ 0x2c
8001dac: f043 0201 orr.w r2, r3, #1
8001db0: 687b ldr r3, [r7, #4]
8001db2: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
8001db4: 687b ldr r3, [r7, #4]
8001db6: 681b ldr r3, [r3, #0]
8001db8: 685b ldr r3, [r3, #4]
8001dba: f423 4169 bic.w r1, r3, #59648 @ 0xe900
8001dbe: 687b ldr r3, [r7, #4]
8001dc0: 681b ldr r3, [r3, #0]
8001dc2: 693a ldr r2, [r7, #16]
8001dc4: 430a orrs r2, r1
8001dc6: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
8001dc8: 687b ldr r3, [r7, #4]
8001dca: 681b ldr r3, [r3, #0]
8001dcc: 689a ldr r2, [r3, #8]
8001dce: 4b28 ldr r3, [pc, #160] @ (8001e70 <HAL_ADC_Init+0x1a8>)
8001dd0: 4013 ands r3, r2
8001dd2: 687a ldr r2, [r7, #4]
8001dd4: 6812 ldr r2, [r2, #0]
8001dd6: 68b9 ldr r1, [r7, #8]
8001dd8: 430b orrs r3, r1
8001dda: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
8001ddc: 687b ldr r3, [r7, #4]
8001dde: 689b ldr r3, [r3, #8]
8001de0: f5b3 7f80 cmp.w r3, #256 @ 0x100
8001de4: d003 beq.n 8001dee <HAL_ADC_Init+0x126>
8001de6: 687b ldr r3, [r7, #4]
8001de8: 689b ldr r3, [r3, #8]
8001dea: 2b01 cmp r3, #1
8001dec: d104 bne.n 8001df8 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
8001dee: 687b ldr r3, [r7, #4]
8001df0: 691b ldr r3, [r3, #16]
8001df2: 3b01 subs r3, #1
8001df4: 051b lsls r3, r3, #20
8001df6: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
8001df8: 687b ldr r3, [r7, #4]
8001dfa: 681b ldr r3, [r3, #0]
8001dfc: 6adb ldr r3, [r3, #44] @ 0x2c
8001dfe: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
8001e02: 687b ldr r3, [r7, #4]
8001e04: 681b ldr r3, [r3, #0]
8001e06: 68fa ldr r2, [r7, #12]
8001e08: 430a orrs r2, r1
8001e0a: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8001e0c: 687b ldr r3, [r7, #4]
8001e0e: 681b ldr r3, [r3, #0]
8001e10: 689a ldr r2, [r3, #8]
8001e12: 4b18 ldr r3, [pc, #96] @ (8001e74 <HAL_ADC_Init+0x1ac>)
8001e14: 4013 ands r3, r2
8001e16: 68ba ldr r2, [r7, #8]
8001e18: 429a cmp r2, r3
8001e1a: d10b bne.n 8001e34 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8001e1c: 687b ldr r3, [r7, #4]
8001e1e: 2200 movs r2, #0
8001e20: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
8001e22: 687b ldr r3, [r7, #4]
8001e24: 6a9b ldr r3, [r3, #40] @ 0x28
8001e26: f023 0303 bic.w r3, r3, #3
8001e2a: f043 0201 orr.w r2, r3, #1
8001e2e: 687b ldr r3, [r7, #4]
8001e30: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8001e32: e018 b.n 8001e66 <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8001e34: 687b ldr r3, [r7, #4]
8001e36: 6a9b ldr r3, [r3, #40] @ 0x28
8001e38: f023 0312 bic.w r3, r3, #18
8001e3c: f043 0210 orr.w r2, r3, #16
8001e40: 687b ldr r3, [r7, #4]
8001e42: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8001e44: 687b ldr r3, [r7, #4]
8001e46: 6adb ldr r3, [r3, #44] @ 0x2c
8001e48: f043 0201 orr.w r2, r3, #1
8001e4c: 687b ldr r3, [r7, #4]
8001e4e: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
8001e50: 2301 movs r3, #1
8001e52: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8001e54: e007 b.n 8001e66 <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8001e56: 687b ldr r3, [r7, #4]
8001e58: 6a9b ldr r3, [r3, #40] @ 0x28
8001e5a: f043 0210 orr.w r2, r3, #16
8001e5e: 687b ldr r3, [r7, #4]
8001e60: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8001e62: 2301 movs r3, #1
8001e64: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8001e66: 7dfb ldrb r3, [r7, #23]
}
8001e68: 4618 mov r0, r3
8001e6a: 3718 adds r7, #24
8001e6c: 46bd mov sp, r7
8001e6e: bd80 pop {r7, pc}
8001e70: ffe1f7fd .word 0xffe1f7fd
8001e74: ff1f0efe .word 0xff1f0efe
08001e78 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8001e78: b480 push {r7}
8001e7a: b085 sub sp, #20
8001e7c: af00 add r7, sp, #0
8001e7e: 6078 str r0, [r7, #4]
8001e80: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8001e82: 2300 movs r3, #0
8001e84: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
8001e86: 2300 movs r3, #0
8001e88: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8001e8a: 687b ldr r3, [r7, #4]
8001e8c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8001e90: 2b01 cmp r3, #1
8001e92: d101 bne.n 8001e98 <HAL_ADC_ConfigChannel+0x20>
8001e94: 2302 movs r3, #2
8001e96: e0dc b.n 8002052 <HAL_ADC_ConfigChannel+0x1da>
8001e98: 687b ldr r3, [r7, #4]
8001e9a: 2201 movs r2, #1
8001e9c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
8001ea0: 683b ldr r3, [r7, #0]
8001ea2: 685b ldr r3, [r3, #4]
8001ea4: 2b06 cmp r3, #6
8001ea6: d81c bhi.n 8001ee2 <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8001ea8: 687b ldr r3, [r7, #4]
8001eaa: 681b ldr r3, [r3, #0]
8001eac: 6b59 ldr r1, [r3, #52] @ 0x34
8001eae: 683b ldr r3, [r7, #0]
8001eb0: 685a ldr r2, [r3, #4]
8001eb2: 4613 mov r3, r2
8001eb4: 009b lsls r3, r3, #2
8001eb6: 4413 add r3, r2
8001eb8: 3b05 subs r3, #5
8001eba: 221f movs r2, #31
8001ebc: fa02 f303 lsl.w r3, r2, r3
8001ec0: 43db mvns r3, r3
8001ec2: 4019 ands r1, r3
8001ec4: 683b ldr r3, [r7, #0]
8001ec6: 6818 ldr r0, [r3, #0]
8001ec8: 683b ldr r3, [r7, #0]
8001eca: 685a ldr r2, [r3, #4]
8001ecc: 4613 mov r3, r2
8001ece: 009b lsls r3, r3, #2
8001ed0: 4413 add r3, r2
8001ed2: 3b05 subs r3, #5
8001ed4: fa00 f203 lsl.w r2, r0, r3
8001ed8: 687b ldr r3, [r7, #4]
8001eda: 681b ldr r3, [r3, #0]
8001edc: 430a orrs r2, r1
8001ede: 635a str r2, [r3, #52] @ 0x34
8001ee0: e03c b.n 8001f5c <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
8001ee2: 683b ldr r3, [r7, #0]
8001ee4: 685b ldr r3, [r3, #4]
8001ee6: 2b0c cmp r3, #12
8001ee8: d81c bhi.n 8001f24 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
8001eea: 687b ldr r3, [r7, #4]
8001eec: 681b ldr r3, [r3, #0]
8001eee: 6b19 ldr r1, [r3, #48] @ 0x30
8001ef0: 683b ldr r3, [r7, #0]
8001ef2: 685a ldr r2, [r3, #4]
8001ef4: 4613 mov r3, r2
8001ef6: 009b lsls r3, r3, #2
8001ef8: 4413 add r3, r2
8001efa: 3b23 subs r3, #35 @ 0x23
8001efc: 221f movs r2, #31
8001efe: fa02 f303 lsl.w r3, r2, r3
8001f02: 43db mvns r3, r3
8001f04: 4019 ands r1, r3
8001f06: 683b ldr r3, [r7, #0]
8001f08: 6818 ldr r0, [r3, #0]
8001f0a: 683b ldr r3, [r7, #0]
8001f0c: 685a ldr r2, [r3, #4]
8001f0e: 4613 mov r3, r2
8001f10: 009b lsls r3, r3, #2
8001f12: 4413 add r3, r2
8001f14: 3b23 subs r3, #35 @ 0x23
8001f16: fa00 f203 lsl.w r2, r0, r3
8001f1a: 687b ldr r3, [r7, #4]
8001f1c: 681b ldr r3, [r3, #0]
8001f1e: 430a orrs r2, r1
8001f20: 631a str r2, [r3, #48] @ 0x30
8001f22: e01b b.n 8001f5c <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
8001f24: 687b ldr r3, [r7, #4]
8001f26: 681b ldr r3, [r3, #0]
8001f28: 6ad9 ldr r1, [r3, #44] @ 0x2c
8001f2a: 683b ldr r3, [r7, #0]
8001f2c: 685a ldr r2, [r3, #4]
8001f2e: 4613 mov r3, r2
8001f30: 009b lsls r3, r3, #2
8001f32: 4413 add r3, r2
8001f34: 3b41 subs r3, #65 @ 0x41
8001f36: 221f movs r2, #31
8001f38: fa02 f303 lsl.w r3, r2, r3
8001f3c: 43db mvns r3, r3
8001f3e: 4019 ands r1, r3
8001f40: 683b ldr r3, [r7, #0]
8001f42: 6818 ldr r0, [r3, #0]
8001f44: 683b ldr r3, [r7, #0]
8001f46: 685a ldr r2, [r3, #4]
8001f48: 4613 mov r3, r2
8001f4a: 009b lsls r3, r3, #2
8001f4c: 4413 add r3, r2
8001f4e: 3b41 subs r3, #65 @ 0x41
8001f50: fa00 f203 lsl.w r2, r0, r3
8001f54: 687b ldr r3, [r7, #4]
8001f56: 681b ldr r3, [r3, #0]
8001f58: 430a orrs r2, r1
8001f5a: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
8001f5c: 683b ldr r3, [r7, #0]
8001f5e: 681b ldr r3, [r3, #0]
8001f60: 2b09 cmp r3, #9
8001f62: d91c bls.n 8001f9e <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
8001f64: 687b ldr r3, [r7, #4]
8001f66: 681b ldr r3, [r3, #0]
8001f68: 68d9 ldr r1, [r3, #12]
8001f6a: 683b ldr r3, [r7, #0]
8001f6c: 681a ldr r2, [r3, #0]
8001f6e: 4613 mov r3, r2
8001f70: 005b lsls r3, r3, #1
8001f72: 4413 add r3, r2
8001f74: 3b1e subs r3, #30
8001f76: 2207 movs r2, #7
8001f78: fa02 f303 lsl.w r3, r2, r3
8001f7c: 43db mvns r3, r3
8001f7e: 4019 ands r1, r3
8001f80: 683b ldr r3, [r7, #0]
8001f82: 6898 ldr r0, [r3, #8]
8001f84: 683b ldr r3, [r7, #0]
8001f86: 681a ldr r2, [r3, #0]
8001f88: 4613 mov r3, r2
8001f8a: 005b lsls r3, r3, #1
8001f8c: 4413 add r3, r2
8001f8e: 3b1e subs r3, #30
8001f90: fa00 f203 lsl.w r2, r0, r3
8001f94: 687b ldr r3, [r7, #4]
8001f96: 681b ldr r3, [r3, #0]
8001f98: 430a orrs r2, r1
8001f9a: 60da str r2, [r3, #12]
8001f9c: e019 b.n 8001fd2 <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
8001f9e: 687b ldr r3, [r7, #4]
8001fa0: 681b ldr r3, [r3, #0]
8001fa2: 6919 ldr r1, [r3, #16]
8001fa4: 683b ldr r3, [r7, #0]
8001fa6: 681a ldr r2, [r3, #0]
8001fa8: 4613 mov r3, r2
8001faa: 005b lsls r3, r3, #1
8001fac: 4413 add r3, r2
8001fae: 2207 movs r2, #7
8001fb0: fa02 f303 lsl.w r3, r2, r3
8001fb4: 43db mvns r3, r3
8001fb6: 4019 ands r1, r3
8001fb8: 683b ldr r3, [r7, #0]
8001fba: 6898 ldr r0, [r3, #8]
8001fbc: 683b ldr r3, [r7, #0]
8001fbe: 681a ldr r2, [r3, #0]
8001fc0: 4613 mov r3, r2
8001fc2: 005b lsls r3, r3, #1
8001fc4: 4413 add r3, r2
8001fc6: fa00 f203 lsl.w r2, r0, r3
8001fca: 687b ldr r3, [r7, #4]
8001fcc: 681b ldr r3, [r3, #0]
8001fce: 430a orrs r2, r1
8001fd0: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8001fd2: 683b ldr r3, [r7, #0]
8001fd4: 681b ldr r3, [r3, #0]
8001fd6: 2b10 cmp r3, #16
8001fd8: d003 beq.n 8001fe2 <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
8001fda: 683b ldr r3, [r7, #0]
8001fdc: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8001fde: 2b11 cmp r3, #17
8001fe0: d132 bne.n 8002048 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
8001fe2: 687b ldr r3, [r7, #4]
8001fe4: 681b ldr r3, [r3, #0]
8001fe6: 4a1d ldr r2, [pc, #116] @ (800205c <HAL_ADC_ConfigChannel+0x1e4>)
8001fe8: 4293 cmp r3, r2
8001fea: d125 bne.n 8002038 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
8001fec: 687b ldr r3, [r7, #4]
8001fee: 681b ldr r3, [r3, #0]
8001ff0: 689b ldr r3, [r3, #8]
8001ff2: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8001ff6: 2b00 cmp r3, #0
8001ff8: d126 bne.n 8002048 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
8001ffa: 687b ldr r3, [r7, #4]
8001ffc: 681b ldr r3, [r3, #0]
8001ffe: 689a ldr r2, [r3, #8]
8002000: 687b ldr r3, [r7, #4]
8002002: 681b ldr r3, [r3, #0]
8002004: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8002008: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
800200a: 683b ldr r3, [r7, #0]
800200c: 681b ldr r3, [r3, #0]
800200e: 2b10 cmp r3, #16
8002010: d11a bne.n 8002048 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
8002012: 4b13 ldr r3, [pc, #76] @ (8002060 <HAL_ADC_ConfigChannel+0x1e8>)
8002014: 681b ldr r3, [r3, #0]
8002016: 4a13 ldr r2, [pc, #76] @ (8002064 <HAL_ADC_ConfigChannel+0x1ec>)
8002018: fba2 2303 umull r2, r3, r2, r3
800201c: 0c9a lsrs r2, r3, #18
800201e: 4613 mov r3, r2
8002020: 009b lsls r3, r3, #2
8002022: 4413 add r3, r2
8002024: 005b lsls r3, r3, #1
8002026: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8002028: e002 b.n 8002030 <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
800202a: 68bb ldr r3, [r7, #8]
800202c: 3b01 subs r3, #1
800202e: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8002030: 68bb ldr r3, [r7, #8]
8002032: 2b00 cmp r3, #0
8002034: d1f9 bne.n 800202a <HAL_ADC_ConfigChannel+0x1b2>
8002036: e007 b.n 8002048 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8002038: 687b ldr r3, [r7, #4]
800203a: 6a9b ldr r3, [r3, #40] @ 0x28
800203c: f043 0220 orr.w r2, r3, #32
8002040: 687b ldr r3, [r7, #4]
8002042: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8002044: 2301 movs r3, #1
8002046: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8002048: 687b ldr r3, [r7, #4]
800204a: 2200 movs r2, #0
800204c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
8002050: 7bfb ldrb r3, [r7, #15]
}
8002052: 4618 mov r0, r3
8002054: 3714 adds r7, #20
8002056: 46bd mov sp, r7
8002058: bc80 pop {r7}
800205a: 4770 bx lr
800205c: 40012400 .word 0x40012400
8002060: 20000004 .word 0x20000004
8002064: 431bde83 .word 0x431bde83
08002068 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
8002068: b580 push {r7, lr}
800206a: b084 sub sp, #16
800206c: af00 add r7, sp, #0
800206e: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8002070: 2300 movs r3, #0
8002072: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
8002074: 687b ldr r3, [r7, #4]
8002076: 681b ldr r3, [r3, #0]
8002078: 689b ldr r3, [r3, #8]
800207a: f003 0301 and.w r3, r3, #1
800207e: 2b01 cmp r3, #1
8002080: d12e bne.n 80020e0 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
8002082: 687b ldr r3, [r7, #4]
8002084: 681b ldr r3, [r3, #0]
8002086: 689a ldr r2, [r3, #8]
8002088: 687b ldr r3, [r7, #4]
800208a: 681b ldr r3, [r3, #0]
800208c: f022 0201 bic.w r2, r2, #1
8002090: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
8002092: f7ff fe0f bl 8001cb4 <HAL_GetTick>
8002096: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
8002098: e01b b.n 80020d2 <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
800209a: f7ff fe0b bl 8001cb4 <HAL_GetTick>
800209e: 4602 mov r2, r0
80020a0: 68fb ldr r3, [r7, #12]
80020a2: 1ad3 subs r3, r2, r3
80020a4: 2b02 cmp r3, #2
80020a6: d914 bls.n 80020d2 <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
80020a8: 687b ldr r3, [r7, #4]
80020aa: 681b ldr r3, [r3, #0]
80020ac: 689b ldr r3, [r3, #8]
80020ae: f003 0301 and.w r3, r3, #1
80020b2: 2b01 cmp r3, #1
80020b4: d10d bne.n 80020d2 <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80020b6: 687b ldr r3, [r7, #4]
80020b8: 6a9b ldr r3, [r3, #40] @ 0x28
80020ba: f043 0210 orr.w r2, r3, #16
80020be: 687b ldr r3, [r7, #4]
80020c0: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80020c2: 687b ldr r3, [r7, #4]
80020c4: 6adb ldr r3, [r3, #44] @ 0x2c
80020c6: f043 0201 orr.w r2, r3, #1
80020ca: 687b ldr r3, [r7, #4]
80020cc: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
80020ce: 2301 movs r3, #1
80020d0: e007 b.n 80020e2 <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
80020d2: 687b ldr r3, [r7, #4]
80020d4: 681b ldr r3, [r3, #0]
80020d6: 689b ldr r3, [r3, #8]
80020d8: f003 0301 and.w r3, r3, #1
80020dc: 2b01 cmp r3, #1
80020de: d0dc beq.n 800209a <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
80020e0: 2300 movs r3, #0
}
80020e2: 4618 mov r0, r3
80020e4: 3710 adds r7, #16
80020e6: 46bd mov sp, r7
80020e8: bd80 pop {r7, pc}
...
080020ec <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80020ec: b480 push {r7}
80020ee: b085 sub sp, #20
80020f0: af00 add r7, sp, #0
80020f2: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80020f4: 687b ldr r3, [r7, #4]
80020f6: f003 0307 and.w r3, r3, #7
80020fa: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
80020fc: 4b0c ldr r3, [pc, #48] @ (8002130 <__NVIC_SetPriorityGrouping+0x44>)
80020fe: 68db ldr r3, [r3, #12]
8002100: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8002102: 68ba ldr r2, [r7, #8]
8002104: f64f 03ff movw r3, #63743 @ 0xf8ff
8002108: 4013 ands r3, r2
800210a: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
800210c: 68fb ldr r3, [r7, #12]
800210e: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8002110: 68bb ldr r3, [r7, #8]
8002112: 4313 orrs r3, r2
reg_value = (reg_value |
8002114: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8002118: f443 3300 orr.w r3, r3, #131072 @ 0x20000
800211c: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
800211e: 4a04 ldr r2, [pc, #16] @ (8002130 <__NVIC_SetPriorityGrouping+0x44>)
8002120: 68bb ldr r3, [r7, #8]
8002122: 60d3 str r3, [r2, #12]
}
8002124: bf00 nop
8002126: 3714 adds r7, #20
8002128: 46bd mov sp, r7
800212a: bc80 pop {r7}
800212c: 4770 bx lr
800212e: bf00 nop
8002130: e000ed00 .word 0xe000ed00
08002134 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8002134: b480 push {r7}
8002136: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8002138: 4b04 ldr r3, [pc, #16] @ (800214c <__NVIC_GetPriorityGrouping+0x18>)
800213a: 68db ldr r3, [r3, #12]
800213c: 0a1b lsrs r3, r3, #8
800213e: f003 0307 and.w r3, r3, #7
}
8002142: 4618 mov r0, r3
8002144: 46bd mov sp, r7
8002146: bc80 pop {r7}
8002148: 4770 bx lr
800214a: bf00 nop
800214c: e000ed00 .word 0xe000ed00
08002150 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8002150: b480 push {r7}
8002152: b083 sub sp, #12
8002154: af00 add r7, sp, #0
8002156: 4603 mov r3, r0
8002158: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
800215a: f997 3007 ldrsb.w r3, [r7, #7]
800215e: 2b00 cmp r3, #0
8002160: db0b blt.n 800217a <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8002162: 79fb ldrb r3, [r7, #7]
8002164: f003 021f and.w r2, r3, #31
8002168: 4906 ldr r1, [pc, #24] @ (8002184 <__NVIC_EnableIRQ+0x34>)
800216a: f997 3007 ldrsb.w r3, [r7, #7]
800216e: 095b lsrs r3, r3, #5
8002170: 2001 movs r0, #1
8002172: fa00 f202 lsl.w r2, r0, r2
8002176: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
800217a: bf00 nop
800217c: 370c adds r7, #12
800217e: 46bd mov sp, r7
8002180: bc80 pop {r7}
8002182: 4770 bx lr
8002184: e000e100 .word 0xe000e100
08002188 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8002188: b480 push {r7}
800218a: b083 sub sp, #12
800218c: af00 add r7, sp, #0
800218e: 4603 mov r3, r0
8002190: 6039 str r1, [r7, #0]
8002192: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8002194: f997 3007 ldrsb.w r3, [r7, #7]
8002198: 2b00 cmp r3, #0
800219a: db0a blt.n 80021b2 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
800219c: 683b ldr r3, [r7, #0]
800219e: b2da uxtb r2, r3
80021a0: 490c ldr r1, [pc, #48] @ (80021d4 <__NVIC_SetPriority+0x4c>)
80021a2: f997 3007 ldrsb.w r3, [r7, #7]
80021a6: 0112 lsls r2, r2, #4
80021a8: b2d2 uxtb r2, r2
80021aa: 440b add r3, r1
80021ac: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
80021b0: e00a b.n 80021c8 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80021b2: 683b ldr r3, [r7, #0]
80021b4: b2da uxtb r2, r3
80021b6: 4908 ldr r1, [pc, #32] @ (80021d8 <__NVIC_SetPriority+0x50>)
80021b8: 79fb ldrb r3, [r7, #7]
80021ba: f003 030f and.w r3, r3, #15
80021be: 3b04 subs r3, #4
80021c0: 0112 lsls r2, r2, #4
80021c2: b2d2 uxtb r2, r2
80021c4: 440b add r3, r1
80021c6: 761a strb r2, [r3, #24]
}
80021c8: bf00 nop
80021ca: 370c adds r7, #12
80021cc: 46bd mov sp, r7
80021ce: bc80 pop {r7}
80021d0: 4770 bx lr
80021d2: bf00 nop
80021d4: e000e100 .word 0xe000e100
80021d8: e000ed00 .word 0xe000ed00
080021dc <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
80021dc: b480 push {r7}
80021de: b089 sub sp, #36 @ 0x24
80021e0: af00 add r7, sp, #0
80021e2: 60f8 str r0, [r7, #12]
80021e4: 60b9 str r1, [r7, #8]
80021e6: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80021e8: 68fb ldr r3, [r7, #12]
80021ea: f003 0307 and.w r3, r3, #7
80021ee: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
80021f0: 69fb ldr r3, [r7, #28]
80021f2: f1c3 0307 rsb r3, r3, #7
80021f6: 2b04 cmp r3, #4
80021f8: bf28 it cs
80021fa: 2304 movcs r3, #4
80021fc: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
80021fe: 69fb ldr r3, [r7, #28]
8002200: 3304 adds r3, #4
8002202: 2b06 cmp r3, #6
8002204: d902 bls.n 800220c <NVIC_EncodePriority+0x30>
8002206: 69fb ldr r3, [r7, #28]
8002208: 3b03 subs r3, #3
800220a: e000 b.n 800220e <NVIC_EncodePriority+0x32>
800220c: 2300 movs r3, #0
800220e: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8002210: f04f 32ff mov.w r2, #4294967295
8002214: 69bb ldr r3, [r7, #24]
8002216: fa02 f303 lsl.w r3, r2, r3
800221a: 43da mvns r2, r3
800221c: 68bb ldr r3, [r7, #8]
800221e: 401a ands r2, r3
8002220: 697b ldr r3, [r7, #20]
8002222: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8002224: f04f 31ff mov.w r1, #4294967295
8002228: 697b ldr r3, [r7, #20]
800222a: fa01 f303 lsl.w r3, r1, r3
800222e: 43d9 mvns r1, r3
8002230: 687b ldr r3, [r7, #4]
8002232: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8002234: 4313 orrs r3, r2
);
}
8002236: 4618 mov r0, r3
8002238: 3724 adds r7, #36 @ 0x24
800223a: 46bd mov sp, r7
800223c: bc80 pop {r7}
800223e: 4770 bx lr
08002240 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8002240: b580 push {r7, lr}
8002242: b082 sub sp, #8
8002244: af00 add r7, sp, #0
8002246: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8002248: 687b ldr r3, [r7, #4]
800224a: 3b01 subs r3, #1
800224c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
8002250: d301 bcc.n 8002256 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8002252: 2301 movs r3, #1
8002254: e00f b.n 8002276 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8002256: 4a0a ldr r2, [pc, #40] @ (8002280 <SysTick_Config+0x40>)
8002258: 687b ldr r3, [r7, #4]
800225a: 3b01 subs r3, #1
800225c: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
800225e: 210f movs r1, #15
8002260: f04f 30ff mov.w r0, #4294967295
8002264: f7ff ff90 bl 8002188 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8002268: 4b05 ldr r3, [pc, #20] @ (8002280 <SysTick_Config+0x40>)
800226a: 2200 movs r2, #0
800226c: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
800226e: 4b04 ldr r3, [pc, #16] @ (8002280 <SysTick_Config+0x40>)
8002270: 2207 movs r2, #7
8002272: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8002274: 2300 movs r3, #0
}
8002276: 4618 mov r0, r3
8002278: 3708 adds r7, #8
800227a: 46bd mov sp, r7
800227c: bd80 pop {r7, pc}
800227e: bf00 nop
8002280: e000e010 .word 0xe000e010
08002284 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8002284: b580 push {r7, lr}
8002286: b082 sub sp, #8
8002288: af00 add r7, sp, #0
800228a: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
800228c: 6878 ldr r0, [r7, #4]
800228e: f7ff ff2d bl 80020ec <__NVIC_SetPriorityGrouping>
}
8002292: bf00 nop
8002294: 3708 adds r7, #8
8002296: 46bd mov sp, r7
8002298: bd80 pop {r7, pc}
0800229a <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
800229a: b580 push {r7, lr}
800229c: b086 sub sp, #24
800229e: af00 add r7, sp, #0
80022a0: 4603 mov r3, r0
80022a2: 60b9 str r1, [r7, #8]
80022a4: 607a str r2, [r7, #4]
80022a6: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
80022a8: 2300 movs r3, #0
80022aa: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
80022ac: f7ff ff42 bl 8002134 <__NVIC_GetPriorityGrouping>
80022b0: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
80022b2: 687a ldr r2, [r7, #4]
80022b4: 68b9 ldr r1, [r7, #8]
80022b6: 6978 ldr r0, [r7, #20]
80022b8: f7ff ff90 bl 80021dc <NVIC_EncodePriority>
80022bc: 4602 mov r2, r0
80022be: f997 300f ldrsb.w r3, [r7, #15]
80022c2: 4611 mov r1, r2
80022c4: 4618 mov r0, r3
80022c6: f7ff ff5f bl 8002188 <__NVIC_SetPriority>
}
80022ca: bf00 nop
80022cc: 3718 adds r7, #24
80022ce: 46bd mov sp, r7
80022d0: bd80 pop {r7, pc}
080022d2 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
80022d2: b580 push {r7, lr}
80022d4: b082 sub sp, #8
80022d6: af00 add r7, sp, #0
80022d8: 4603 mov r3, r0
80022da: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
80022dc: f997 3007 ldrsb.w r3, [r7, #7]
80022e0: 4618 mov r0, r3
80022e2: f7ff ff35 bl 8002150 <__NVIC_EnableIRQ>
}
80022e6: bf00 nop
80022e8: 3708 adds r7, #8
80022ea: 46bd mov sp, r7
80022ec: bd80 pop {r7, pc}
080022ee <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
80022ee: b580 push {r7, lr}
80022f0: b082 sub sp, #8
80022f2: af00 add r7, sp, #0
80022f4: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
80022f6: 6878 ldr r0, [r7, #4]
80022f8: f7ff ffa2 bl 8002240 <SysTick_Config>
80022fc: 4603 mov r3, r0
}
80022fe: 4618 mov r0, r3
8002300: 3708 adds r7, #8
8002302: 46bd mov sp, r7
8002304: bd80 pop {r7, pc}
08002306 <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8002306: b580 push {r7, lr}
8002308: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
800230a: f7fe fd65 bl 8000dd8 <HAL_SYSTICK_Callback>
}
800230e: bf00 nop
8002310: bd80 pop {r7, pc}
...
08002314 <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
8002314: b5f0 push {r4, r5, r6, r7, lr}
8002316: b087 sub sp, #28
8002318: af00 add r7, sp, #0
800231a: 60f8 str r0, [r7, #12]
800231c: 60b9 str r1, [r7, #8]
800231e: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
8002322: 2301 movs r3, #1
8002324: 75fb strb r3, [r7, #23]
uint8_t index = 0;
8002326: 2300 movs r3, #0
8002328: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
800232a: 2300 movs r3, #0
800232c: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
800232e: 4b2f ldr r3, [pc, #188] @ (80023ec <HAL_FLASH_Program+0xd8>)
8002330: 7e1b ldrb r3, [r3, #24]
8002332: 2b01 cmp r3, #1
8002334: d101 bne.n 800233a <HAL_FLASH_Program+0x26>
8002336: 2302 movs r3, #2
8002338: e054 b.n 80023e4 <HAL_FLASH_Program+0xd0>
800233a: 4b2c ldr r3, [pc, #176] @ (80023ec <HAL_FLASH_Program+0xd8>)
800233c: 2201 movs r2, #1
800233e: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8002340: f24c 3050 movw r0, #50000 @ 0xc350
8002344: f000 f8a8 bl 8002498 <FLASH_WaitForLastOperation>
8002348: 4603 mov r3, r0
800234a: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
800234c: 7dfb ldrb r3, [r7, #23]
800234e: 2b00 cmp r3, #0
8002350: d144 bne.n 80023dc <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
8002352: 68fb ldr r3, [r7, #12]
8002354: 2b01 cmp r3, #1
8002356: d102 bne.n 800235e <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8002358: 2301 movs r3, #1
800235a: 757b strb r3, [r7, #21]
800235c: e007 b.n 800236e <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
800235e: 68fb ldr r3, [r7, #12]
8002360: 2b02 cmp r3, #2
8002362: d102 bne.n 800236a <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
8002364: 2302 movs r3, #2
8002366: 757b strb r3, [r7, #21]
8002368: e001 b.n 800236e <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
800236a: 2304 movs r3, #4
800236c: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
800236e: 2300 movs r3, #0
8002370: 75bb strb r3, [r7, #22]
8002372: e02d b.n 80023d0 <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
8002374: 7dbb ldrb r3, [r7, #22]
8002376: 005a lsls r2, r3, #1
8002378: 68bb ldr r3, [r7, #8]
800237a: eb02 0c03 add.w ip, r2, r3
800237e: 7dbb ldrb r3, [r7, #22]
8002380: 0119 lsls r1, r3, #4
8002382: e9d7 2300 ldrd r2, r3, [r7]
8002386: f1c1 0620 rsb r6, r1, #32
800238a: f1a1 0020 sub.w r0, r1, #32
800238e: fa22 f401 lsr.w r4, r2, r1
8002392: fa03 f606 lsl.w r6, r3, r6
8002396: 4334 orrs r4, r6
8002398: fa23 f000 lsr.w r0, r3, r0
800239c: 4304 orrs r4, r0
800239e: fa23 f501 lsr.w r5, r3, r1
80023a2: b2a3 uxth r3, r4
80023a4: 4619 mov r1, r3
80023a6: 4660 mov r0, ip
80023a8: f000 f85a bl 8002460 <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
80023ac: f24c 3050 movw r0, #50000 @ 0xc350
80023b0: f000 f872 bl 8002498 <FLASH_WaitForLastOperation>
80023b4: 4603 mov r3, r0
80023b6: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
80023b8: 4b0d ldr r3, [pc, #52] @ (80023f0 <HAL_FLASH_Program+0xdc>)
80023ba: 691b ldr r3, [r3, #16]
80023bc: 4a0c ldr r2, [pc, #48] @ (80023f0 <HAL_FLASH_Program+0xdc>)
80023be: f023 0301 bic.w r3, r3, #1
80023c2: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
80023c4: 7dfb ldrb r3, [r7, #23]
80023c6: 2b00 cmp r3, #0
80023c8: d107 bne.n 80023da <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
80023ca: 7dbb ldrb r3, [r7, #22]
80023cc: 3301 adds r3, #1
80023ce: 75bb strb r3, [r7, #22]
80023d0: 7dba ldrb r2, [r7, #22]
80023d2: 7d7b ldrb r3, [r7, #21]
80023d4: 429a cmp r2, r3
80023d6: d3cd bcc.n 8002374 <HAL_FLASH_Program+0x60>
80023d8: e000 b.n 80023dc <HAL_FLASH_Program+0xc8>
{
break;
80023da: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
80023dc: 4b03 ldr r3, [pc, #12] @ (80023ec <HAL_FLASH_Program+0xd8>)
80023de: 2200 movs r2, #0
80023e0: 761a strb r2, [r3, #24]
return status;
80023e2: 7dfb ldrb r3, [r7, #23]
}
80023e4: 4618 mov r0, r3
80023e6: 371c adds r7, #28
80023e8: 46bd mov sp, r7
80023ea: bdf0 pop {r4, r5, r6, r7, pc}
80023ec: 200003b0 .word 0x200003b0
80023f0: 40022000 .word 0x40022000
080023f4 <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
80023f4: b480 push {r7}
80023f6: b083 sub sp, #12
80023f8: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
80023fa: 2300 movs r3, #0
80023fc: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
80023fe: 4b0d ldr r3, [pc, #52] @ (8002434 <HAL_FLASH_Unlock+0x40>)
8002400: 691b ldr r3, [r3, #16]
8002402: f003 0380 and.w r3, r3, #128 @ 0x80
8002406: 2b00 cmp r3, #0
8002408: d00d beq.n 8002426 <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
800240a: 4b0a ldr r3, [pc, #40] @ (8002434 <HAL_FLASH_Unlock+0x40>)
800240c: 4a0a ldr r2, [pc, #40] @ (8002438 <HAL_FLASH_Unlock+0x44>)
800240e: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
8002410: 4b08 ldr r3, [pc, #32] @ (8002434 <HAL_FLASH_Unlock+0x40>)
8002412: 4a0a ldr r2, [pc, #40] @ (800243c <HAL_FLASH_Unlock+0x48>)
8002414: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8002416: 4b07 ldr r3, [pc, #28] @ (8002434 <HAL_FLASH_Unlock+0x40>)
8002418: 691b ldr r3, [r3, #16]
800241a: f003 0380 and.w r3, r3, #128 @ 0x80
800241e: 2b00 cmp r3, #0
8002420: d001 beq.n 8002426 <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
8002422: 2301 movs r3, #1
8002424: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
8002426: 79fb ldrb r3, [r7, #7]
}
8002428: 4618 mov r0, r3
800242a: 370c adds r7, #12
800242c: 46bd mov sp, r7
800242e: bc80 pop {r7}
8002430: 4770 bx lr
8002432: bf00 nop
8002434: 40022000 .word 0x40022000
8002438: 45670123 .word 0x45670123
800243c: cdef89ab .word 0xcdef89ab
08002440 <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
8002440: b480 push {r7}
8002442: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
8002444: 4b05 ldr r3, [pc, #20] @ (800245c <HAL_FLASH_Lock+0x1c>)
8002446: 691b ldr r3, [r3, #16]
8002448: 4a04 ldr r2, [pc, #16] @ (800245c <HAL_FLASH_Lock+0x1c>)
800244a: f043 0380 orr.w r3, r3, #128 @ 0x80
800244e: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
8002450: 2300 movs r3, #0
}
8002452: 4618 mov r0, r3
8002454: 46bd mov sp, r7
8002456: bc80 pop {r7}
8002458: 4770 bx lr
800245a: bf00 nop
800245c: 40022000 .word 0x40022000
08002460 <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
8002460: b480 push {r7}
8002462: b083 sub sp, #12
8002464: af00 add r7, sp, #0
8002466: 6078 str r0, [r7, #4]
8002468: 460b mov r3, r1
800246a: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
800246c: 4b08 ldr r3, [pc, #32] @ (8002490 <FLASH_Program_HalfWord+0x30>)
800246e: 2200 movs r2, #0
8002470: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
8002472: 4b08 ldr r3, [pc, #32] @ (8002494 <FLASH_Program_HalfWord+0x34>)
8002474: 691b ldr r3, [r3, #16]
8002476: 4a07 ldr r2, [pc, #28] @ (8002494 <FLASH_Program_HalfWord+0x34>)
8002478: f043 0301 orr.w r3, r3, #1
800247c: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
800247e: 687b ldr r3, [r7, #4]
8002480: 887a ldrh r2, [r7, #2]
8002482: 801a strh r2, [r3, #0]
}
8002484: bf00 nop
8002486: 370c adds r7, #12
8002488: 46bd mov sp, r7
800248a: bc80 pop {r7}
800248c: 4770 bx lr
800248e: bf00 nop
8002490: 200003b0 .word 0x200003b0
8002494: 40022000 .word 0x40022000
08002498 <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
8002498: b580 push {r7, lr}
800249a: b084 sub sp, #16
800249c: af00 add r7, sp, #0
800249e: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
80024a0: f7ff fc08 bl 8001cb4 <HAL_GetTick>
80024a4: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80024a6: e010 b.n 80024ca <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
80024a8: 687b ldr r3, [r7, #4]
80024aa: f1b3 3fff cmp.w r3, #4294967295
80024ae: d00c beq.n 80024ca <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
80024b0: 687b ldr r3, [r7, #4]
80024b2: 2b00 cmp r3, #0
80024b4: d007 beq.n 80024c6 <FLASH_WaitForLastOperation+0x2e>
80024b6: f7ff fbfd bl 8001cb4 <HAL_GetTick>
80024ba: 4602 mov r2, r0
80024bc: 68fb ldr r3, [r7, #12]
80024be: 1ad3 subs r3, r2, r3
80024c0: 687a ldr r2, [r7, #4]
80024c2: 429a cmp r2, r3
80024c4: d201 bcs.n 80024ca <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
80024c6: 2303 movs r3, #3
80024c8: e025 b.n 8002516 <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80024ca: 4b15 ldr r3, [pc, #84] @ (8002520 <FLASH_WaitForLastOperation+0x88>)
80024cc: 68db ldr r3, [r3, #12]
80024ce: f003 0301 and.w r3, r3, #1
80024d2: 2b00 cmp r3, #0
80024d4: d1e8 bne.n 80024a8 <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
80024d6: 4b12 ldr r3, [pc, #72] @ (8002520 <FLASH_WaitForLastOperation+0x88>)
80024d8: 68db ldr r3, [r3, #12]
80024da: f003 0320 and.w r3, r3, #32
80024de: 2b00 cmp r3, #0
80024e0: d002 beq.n 80024e8 <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
80024e2: 4b0f ldr r3, [pc, #60] @ (8002520 <FLASH_WaitForLastOperation+0x88>)
80024e4: 2220 movs r2, #32
80024e6: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
80024e8: 4b0d ldr r3, [pc, #52] @ (8002520 <FLASH_WaitForLastOperation+0x88>)
80024ea: 68db ldr r3, [r3, #12]
80024ec: f003 0310 and.w r3, r3, #16
80024f0: 2b00 cmp r3, #0
80024f2: d10b bne.n 800250c <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
80024f4: 4b0a ldr r3, [pc, #40] @ (8002520 <FLASH_WaitForLastOperation+0x88>)
80024f6: 69db ldr r3, [r3, #28]
80024f8: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
80024fc: 2b00 cmp r3, #0
80024fe: d105 bne.n 800250c <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8002500: 4b07 ldr r3, [pc, #28] @ (8002520 <FLASH_WaitForLastOperation+0x88>)
8002502: 68db ldr r3, [r3, #12]
8002504: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8002508: 2b00 cmp r3, #0
800250a: d003 beq.n 8002514 <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
800250c: f000 f80a bl 8002524 <FLASH_SetErrorCode>
return HAL_ERROR;
8002510: 2301 movs r3, #1
8002512: e000 b.n 8002516 <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
8002514: 2300 movs r3, #0
}
8002516: 4618 mov r0, r3
8002518: 3710 adds r7, #16
800251a: 46bd mov sp, r7
800251c: bd80 pop {r7, pc}
800251e: bf00 nop
8002520: 40022000 .word 0x40022000
08002524 <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
8002524: b480 push {r7}
8002526: b083 sub sp, #12
8002528: af00 add r7, sp, #0
uint32_t flags = 0U;
800252a: 2300 movs r3, #0
800252c: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
800252e: 4b23 ldr r3, [pc, #140] @ (80025bc <FLASH_SetErrorCode+0x98>)
8002530: 68db ldr r3, [r3, #12]
8002532: f003 0310 and.w r3, r3, #16
8002536: 2b00 cmp r3, #0
8002538: d009 beq.n 800254e <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
800253a: 4b21 ldr r3, [pc, #132] @ (80025c0 <FLASH_SetErrorCode+0x9c>)
800253c: 69db ldr r3, [r3, #28]
800253e: f043 0302 orr.w r3, r3, #2
8002542: 4a1f ldr r2, [pc, #124] @ (80025c0 <FLASH_SetErrorCode+0x9c>)
8002544: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
8002546: 687b ldr r3, [r7, #4]
8002548: f043 0310 orr.w r3, r3, #16
800254c: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
800254e: 4b1b ldr r3, [pc, #108] @ (80025bc <FLASH_SetErrorCode+0x98>)
8002550: 68db ldr r3, [r3, #12]
8002552: f003 0304 and.w r3, r3, #4
8002556: 2b00 cmp r3, #0
8002558: d009 beq.n 800256e <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
800255a: 4b19 ldr r3, [pc, #100] @ (80025c0 <FLASH_SetErrorCode+0x9c>)
800255c: 69db ldr r3, [r3, #28]
800255e: f043 0301 orr.w r3, r3, #1
8002562: 4a17 ldr r2, [pc, #92] @ (80025c0 <FLASH_SetErrorCode+0x9c>)
8002564: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
8002566: 687b ldr r3, [r7, #4]
8002568: f043 0304 orr.w r3, r3, #4
800256c: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
800256e: 4b13 ldr r3, [pc, #76] @ (80025bc <FLASH_SetErrorCode+0x98>)
8002570: 69db ldr r3, [r3, #28]
8002572: f003 0301 and.w r3, r3, #1
8002576: 2b00 cmp r3, #0
8002578: d00b beq.n 8002592 <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
800257a: 4b11 ldr r3, [pc, #68] @ (80025c0 <FLASH_SetErrorCode+0x9c>)
800257c: 69db ldr r3, [r3, #28]
800257e: f043 0304 orr.w r3, r3, #4
8002582: 4a0f ldr r2, [pc, #60] @ (80025c0 <FLASH_SetErrorCode+0x9c>)
8002584: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
8002586: 4b0d ldr r3, [pc, #52] @ (80025bc <FLASH_SetErrorCode+0x98>)
8002588: 69db ldr r3, [r3, #28]
800258a: 4a0c ldr r2, [pc, #48] @ (80025bc <FLASH_SetErrorCode+0x98>)
800258c: f023 0301 bic.w r3, r3, #1
8002590: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
8002592: 687b ldr r3, [r7, #4]
8002594: f240 1201 movw r2, #257 @ 0x101
8002598: 4293 cmp r3, r2
800259a: d106 bne.n 80025aa <FLASH_SetErrorCode+0x86>
800259c: 4b07 ldr r3, [pc, #28] @ (80025bc <FLASH_SetErrorCode+0x98>)
800259e: 69db ldr r3, [r3, #28]
80025a0: 4a06 ldr r2, [pc, #24] @ (80025bc <FLASH_SetErrorCode+0x98>)
80025a2: f023 0301 bic.w r3, r3, #1
80025a6: 61d3 str r3, [r2, #28]
}
80025a8: e002 b.n 80025b0 <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
80025aa: 4a04 ldr r2, [pc, #16] @ (80025bc <FLASH_SetErrorCode+0x98>)
80025ac: 687b ldr r3, [r7, #4]
80025ae: 60d3 str r3, [r2, #12]
}
80025b0: bf00 nop
80025b2: 370c adds r7, #12
80025b4: 46bd mov sp, r7
80025b6: bc80 pop {r7}
80025b8: 4770 bx lr
80025ba: bf00 nop
80025bc: 40022000 .word 0x40022000
80025c0: 200003b0 .word 0x200003b0
080025c4 <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
80025c4: b580 push {r7, lr}
80025c6: b084 sub sp, #16
80025c8: af00 add r7, sp, #0
80025ca: 6078 str r0, [r7, #4]
80025cc: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
80025ce: 2301 movs r3, #1
80025d0: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
80025d2: 2300 movs r3, #0
80025d4: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
80025d6: 4b2f ldr r3, [pc, #188] @ (8002694 <HAL_FLASHEx_Erase+0xd0>)
80025d8: 7e1b ldrb r3, [r3, #24]
80025da: 2b01 cmp r3, #1
80025dc: d101 bne.n 80025e2 <HAL_FLASHEx_Erase+0x1e>
80025de: 2302 movs r3, #2
80025e0: e053 b.n 800268a <HAL_FLASHEx_Erase+0xc6>
80025e2: 4b2c ldr r3, [pc, #176] @ (8002694 <HAL_FLASHEx_Erase+0xd0>)
80025e4: 2201 movs r2, #1
80025e6: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
80025e8: 687b ldr r3, [r7, #4]
80025ea: 681b ldr r3, [r3, #0]
80025ec: 2b02 cmp r3, #2
80025ee: d116 bne.n 800261e <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
80025f0: f24c 3050 movw r0, #50000 @ 0xc350
80025f4: f7ff ff50 bl 8002498 <FLASH_WaitForLastOperation>
80025f8: 4603 mov r3, r0
80025fa: 2b00 cmp r3, #0
80025fc: d141 bne.n 8002682 <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
80025fe: 2001 movs r0, #1
8002600: f000 f84c bl 800269c <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8002604: f24c 3050 movw r0, #50000 @ 0xc350
8002608: f7ff ff46 bl 8002498 <FLASH_WaitForLastOperation>
800260c: 4603 mov r3, r0
800260e: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
8002610: 4b21 ldr r3, [pc, #132] @ (8002698 <HAL_FLASHEx_Erase+0xd4>)
8002612: 691b ldr r3, [r3, #16]
8002614: 4a20 ldr r2, [pc, #128] @ (8002698 <HAL_FLASHEx_Erase+0xd4>)
8002616: f023 0304 bic.w r3, r3, #4
800261a: 6113 str r3, [r2, #16]
800261c: e031 b.n 8002682 <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
800261e: f24c 3050 movw r0, #50000 @ 0xc350
8002622: f7ff ff39 bl 8002498 <FLASH_WaitForLastOperation>
8002626: 4603 mov r3, r0
8002628: 2b00 cmp r3, #0
800262a: d12a bne.n 8002682 <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
800262c: 683b ldr r3, [r7, #0]
800262e: f04f 32ff mov.w r2, #4294967295
8002632: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
8002634: 687b ldr r3, [r7, #4]
8002636: 689b ldr r3, [r3, #8]
8002638: 60bb str r3, [r7, #8]
800263a: e019 b.n 8002670 <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
800263c: 68b8 ldr r0, [r7, #8]
800263e: f000 f849 bl 80026d4 <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8002642: f24c 3050 movw r0, #50000 @ 0xc350
8002646: f7ff ff27 bl 8002498 <FLASH_WaitForLastOperation>
800264a: 4603 mov r3, r0
800264c: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
800264e: 4b12 ldr r3, [pc, #72] @ (8002698 <HAL_FLASHEx_Erase+0xd4>)
8002650: 691b ldr r3, [r3, #16]
8002652: 4a11 ldr r2, [pc, #68] @ (8002698 <HAL_FLASHEx_Erase+0xd4>)
8002654: f023 0302 bic.w r3, r3, #2
8002658: 6113 str r3, [r2, #16]
if (status != HAL_OK)
800265a: 7bfb ldrb r3, [r7, #15]
800265c: 2b00 cmp r3, #0
800265e: d003 beq.n 8002668 <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
8002660: 683b ldr r3, [r7, #0]
8002662: 68ba ldr r2, [r7, #8]
8002664: 601a str r2, [r3, #0]
break;
8002666: e00c b.n 8002682 <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
8002668: 68bb ldr r3, [r7, #8]
800266a: f503 6380 add.w r3, r3, #1024 @ 0x400
800266e: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
8002670: 687b ldr r3, [r7, #4]
8002672: 68db ldr r3, [r3, #12]
8002674: 029a lsls r2, r3, #10
8002676: 687b ldr r3, [r7, #4]
8002678: 689b ldr r3, [r3, #8]
800267a: 4413 add r3, r2
800267c: 68ba ldr r2, [r7, #8]
800267e: 429a cmp r2, r3
8002680: d3dc bcc.n 800263c <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8002682: 4b04 ldr r3, [pc, #16] @ (8002694 <HAL_FLASHEx_Erase+0xd0>)
8002684: 2200 movs r2, #0
8002686: 761a strb r2, [r3, #24]
return status;
8002688: 7bfb ldrb r3, [r7, #15]
}
800268a: 4618 mov r0, r3
800268c: 3710 adds r7, #16
800268e: 46bd mov sp, r7
8002690: bd80 pop {r7, pc}
8002692: bf00 nop
8002694: 200003b0 .word 0x200003b0
8002698: 40022000 .word 0x40022000
0800269c <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
800269c: b480 push {r7}
800269e: b083 sub sp, #12
80026a0: af00 add r7, sp, #0
80026a2: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80026a4: 4b09 ldr r3, [pc, #36] @ (80026cc <FLASH_MassErase+0x30>)
80026a6: 2200 movs r2, #0
80026a8: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
80026aa: 4b09 ldr r3, [pc, #36] @ (80026d0 <FLASH_MassErase+0x34>)
80026ac: 691b ldr r3, [r3, #16]
80026ae: 4a08 ldr r2, [pc, #32] @ (80026d0 <FLASH_MassErase+0x34>)
80026b0: f043 0304 orr.w r3, r3, #4
80026b4: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
80026b6: 4b06 ldr r3, [pc, #24] @ (80026d0 <FLASH_MassErase+0x34>)
80026b8: 691b ldr r3, [r3, #16]
80026ba: 4a05 ldr r2, [pc, #20] @ (80026d0 <FLASH_MassErase+0x34>)
80026bc: f043 0340 orr.w r3, r3, #64 @ 0x40
80026c0: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
80026c2: bf00 nop
80026c4: 370c adds r7, #12
80026c6: 46bd mov sp, r7
80026c8: bc80 pop {r7}
80026ca: 4770 bx lr
80026cc: 200003b0 .word 0x200003b0
80026d0: 40022000 .word 0x40022000
080026d4 <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
80026d4: b480 push {r7}
80026d6: b083 sub sp, #12
80026d8: af00 add r7, sp, #0
80026da: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80026dc: 4b0b ldr r3, [pc, #44] @ (800270c <FLASH_PageErase+0x38>)
80026de: 2200 movs r2, #0
80026e0: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
80026e2: 4b0b ldr r3, [pc, #44] @ (8002710 <FLASH_PageErase+0x3c>)
80026e4: 691b ldr r3, [r3, #16]
80026e6: 4a0a ldr r2, [pc, #40] @ (8002710 <FLASH_PageErase+0x3c>)
80026e8: f043 0302 orr.w r3, r3, #2
80026ec: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
80026ee: 4a08 ldr r2, [pc, #32] @ (8002710 <FLASH_PageErase+0x3c>)
80026f0: 687b ldr r3, [r7, #4]
80026f2: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
80026f4: 4b06 ldr r3, [pc, #24] @ (8002710 <FLASH_PageErase+0x3c>)
80026f6: 691b ldr r3, [r3, #16]
80026f8: 4a05 ldr r2, [pc, #20] @ (8002710 <FLASH_PageErase+0x3c>)
80026fa: f043 0340 orr.w r3, r3, #64 @ 0x40
80026fe: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
8002700: bf00 nop
8002702: 370c adds r7, #12
8002704: 46bd mov sp, r7
8002706: bc80 pop {r7}
8002708: 4770 bx lr
800270a: bf00 nop
800270c: 200003b0 .word 0x200003b0
8002710: 40022000 .word 0x40022000
08002714 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8002714: b480 push {r7}
8002716: b08b sub sp, #44 @ 0x2c
8002718: af00 add r7, sp, #0
800271a: 6078 str r0, [r7, #4]
800271c: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
800271e: 2300 movs r3, #0
8002720: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
8002722: 2300 movs r3, #0
8002724: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8002726: e169 b.n 80029fc <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8002728: 2201 movs r2, #1
800272a: 6a7b ldr r3, [r7, #36] @ 0x24
800272c: fa02 f303 lsl.w r3, r2, r3
8002730: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8002732: 683b ldr r3, [r7, #0]
8002734: 681b ldr r3, [r3, #0]
8002736: 69fa ldr r2, [r7, #28]
8002738: 4013 ands r3, r2
800273a: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
800273c: 69ba ldr r2, [r7, #24]
800273e: 69fb ldr r3, [r7, #28]
8002740: 429a cmp r2, r3
8002742: f040 8158 bne.w 80029f6 <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
8002746: 683b ldr r3, [r7, #0]
8002748: 685b ldr r3, [r3, #4]
800274a: 4a9a ldr r2, [pc, #616] @ (80029b4 <HAL_GPIO_Init+0x2a0>)
800274c: 4293 cmp r3, r2
800274e: d05e beq.n 800280e <HAL_GPIO_Init+0xfa>
8002750: 4a98 ldr r2, [pc, #608] @ (80029b4 <HAL_GPIO_Init+0x2a0>)
8002752: 4293 cmp r3, r2
8002754: d875 bhi.n 8002842 <HAL_GPIO_Init+0x12e>
8002756: 4a98 ldr r2, [pc, #608] @ (80029b8 <HAL_GPIO_Init+0x2a4>)
8002758: 4293 cmp r3, r2
800275a: d058 beq.n 800280e <HAL_GPIO_Init+0xfa>
800275c: 4a96 ldr r2, [pc, #600] @ (80029b8 <HAL_GPIO_Init+0x2a4>)
800275e: 4293 cmp r3, r2
8002760: d86f bhi.n 8002842 <HAL_GPIO_Init+0x12e>
8002762: 4a96 ldr r2, [pc, #600] @ (80029bc <HAL_GPIO_Init+0x2a8>)
8002764: 4293 cmp r3, r2
8002766: d052 beq.n 800280e <HAL_GPIO_Init+0xfa>
8002768: 4a94 ldr r2, [pc, #592] @ (80029bc <HAL_GPIO_Init+0x2a8>)
800276a: 4293 cmp r3, r2
800276c: d869 bhi.n 8002842 <HAL_GPIO_Init+0x12e>
800276e: 4a94 ldr r2, [pc, #592] @ (80029c0 <HAL_GPIO_Init+0x2ac>)
8002770: 4293 cmp r3, r2
8002772: d04c beq.n 800280e <HAL_GPIO_Init+0xfa>
8002774: 4a92 ldr r2, [pc, #584] @ (80029c0 <HAL_GPIO_Init+0x2ac>)
8002776: 4293 cmp r3, r2
8002778: d863 bhi.n 8002842 <HAL_GPIO_Init+0x12e>
800277a: 4a92 ldr r2, [pc, #584] @ (80029c4 <HAL_GPIO_Init+0x2b0>)
800277c: 4293 cmp r3, r2
800277e: d046 beq.n 800280e <HAL_GPIO_Init+0xfa>
8002780: 4a90 ldr r2, [pc, #576] @ (80029c4 <HAL_GPIO_Init+0x2b0>)
8002782: 4293 cmp r3, r2
8002784: d85d bhi.n 8002842 <HAL_GPIO_Init+0x12e>
8002786: 2b12 cmp r3, #18
8002788: d82a bhi.n 80027e0 <HAL_GPIO_Init+0xcc>
800278a: 2b12 cmp r3, #18
800278c: d859 bhi.n 8002842 <HAL_GPIO_Init+0x12e>
800278e: a201 add r2, pc, #4 @ (adr r2, 8002794 <HAL_GPIO_Init+0x80>)
8002790: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002794: 0800280f .word 0x0800280f
8002798: 080027e9 .word 0x080027e9
800279c: 080027fb .word 0x080027fb
80027a0: 0800283d .word 0x0800283d
80027a4: 08002843 .word 0x08002843
80027a8: 08002843 .word 0x08002843
80027ac: 08002843 .word 0x08002843
80027b0: 08002843 .word 0x08002843
80027b4: 08002843 .word 0x08002843
80027b8: 08002843 .word 0x08002843
80027bc: 08002843 .word 0x08002843
80027c0: 08002843 .word 0x08002843
80027c4: 08002843 .word 0x08002843
80027c8: 08002843 .word 0x08002843
80027cc: 08002843 .word 0x08002843
80027d0: 08002843 .word 0x08002843
80027d4: 08002843 .word 0x08002843
80027d8: 080027f1 .word 0x080027f1
80027dc: 08002805 .word 0x08002805
80027e0: 4a79 ldr r2, [pc, #484] @ (80029c8 <HAL_GPIO_Init+0x2b4>)
80027e2: 4293 cmp r3, r2
80027e4: d013 beq.n 800280e <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
80027e6: e02c b.n 8002842 <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
80027e8: 683b ldr r3, [r7, #0]
80027ea: 68db ldr r3, [r3, #12]
80027ec: 623b str r3, [r7, #32]
break;
80027ee: e029 b.n 8002844 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
80027f0: 683b ldr r3, [r7, #0]
80027f2: 68db ldr r3, [r3, #12]
80027f4: 3304 adds r3, #4
80027f6: 623b str r3, [r7, #32]
break;
80027f8: e024 b.n 8002844 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
80027fa: 683b ldr r3, [r7, #0]
80027fc: 68db ldr r3, [r3, #12]
80027fe: 3308 adds r3, #8
8002800: 623b str r3, [r7, #32]
break;
8002802: e01f b.n 8002844 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8002804: 683b ldr r3, [r7, #0]
8002806: 68db ldr r3, [r3, #12]
8002808: 330c adds r3, #12
800280a: 623b str r3, [r7, #32]
break;
800280c: e01a b.n 8002844 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
800280e: 683b ldr r3, [r7, #0]
8002810: 689b ldr r3, [r3, #8]
8002812: 2b00 cmp r3, #0
8002814: d102 bne.n 800281c <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8002816: 2304 movs r3, #4
8002818: 623b str r3, [r7, #32]
break;
800281a: e013 b.n 8002844 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
800281c: 683b ldr r3, [r7, #0]
800281e: 689b ldr r3, [r3, #8]
8002820: 2b01 cmp r3, #1
8002822: d105 bne.n 8002830 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8002824: 2308 movs r3, #8
8002826: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8002828: 687b ldr r3, [r7, #4]
800282a: 69fa ldr r2, [r7, #28]
800282c: 611a str r2, [r3, #16]
break;
800282e: e009 b.n 8002844 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8002830: 2308 movs r3, #8
8002832: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
8002834: 687b ldr r3, [r7, #4]
8002836: 69fa ldr r2, [r7, #28]
8002838: 615a str r2, [r3, #20]
break;
800283a: e003 b.n 8002844 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
800283c: 2300 movs r3, #0
800283e: 623b str r3, [r7, #32]
break;
8002840: e000 b.n 8002844 <HAL_GPIO_Init+0x130>
break;
8002842: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8002844: 69bb ldr r3, [r7, #24]
8002846: 2bff cmp r3, #255 @ 0xff
8002848: d801 bhi.n 800284e <HAL_GPIO_Init+0x13a>
800284a: 687b ldr r3, [r7, #4]
800284c: e001 b.n 8002852 <HAL_GPIO_Init+0x13e>
800284e: 687b ldr r3, [r7, #4]
8002850: 3304 adds r3, #4
8002852: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8002854: 69bb ldr r3, [r7, #24]
8002856: 2bff cmp r3, #255 @ 0xff
8002858: d802 bhi.n 8002860 <HAL_GPIO_Init+0x14c>
800285a: 6a7b ldr r3, [r7, #36] @ 0x24
800285c: 009b lsls r3, r3, #2
800285e: e002 b.n 8002866 <HAL_GPIO_Init+0x152>
8002860: 6a7b ldr r3, [r7, #36] @ 0x24
8002862: 3b08 subs r3, #8
8002864: 009b lsls r3, r3, #2
8002866: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8002868: 697b ldr r3, [r7, #20]
800286a: 681a ldr r2, [r3, #0]
800286c: 210f movs r1, #15
800286e: 693b ldr r3, [r7, #16]
8002870: fa01 f303 lsl.w r3, r1, r3
8002874: 43db mvns r3, r3
8002876: 401a ands r2, r3
8002878: 6a39 ldr r1, [r7, #32]
800287a: 693b ldr r3, [r7, #16]
800287c: fa01 f303 lsl.w r3, r1, r3
8002880: 431a orrs r2, r3
8002882: 697b ldr r3, [r7, #20]
8002884: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8002886: 683b ldr r3, [r7, #0]
8002888: 685b ldr r3, [r3, #4]
800288a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800288e: 2b00 cmp r3, #0
8002890: f000 80b1 beq.w 80029f6 <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8002894: 4b4d ldr r3, [pc, #308] @ (80029cc <HAL_GPIO_Init+0x2b8>)
8002896: 699b ldr r3, [r3, #24]
8002898: 4a4c ldr r2, [pc, #304] @ (80029cc <HAL_GPIO_Init+0x2b8>)
800289a: f043 0301 orr.w r3, r3, #1
800289e: 6193 str r3, [r2, #24]
80028a0: 4b4a ldr r3, [pc, #296] @ (80029cc <HAL_GPIO_Init+0x2b8>)
80028a2: 699b ldr r3, [r3, #24]
80028a4: f003 0301 and.w r3, r3, #1
80028a8: 60bb str r3, [r7, #8]
80028aa: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
80028ac: 4a48 ldr r2, [pc, #288] @ (80029d0 <HAL_GPIO_Init+0x2bc>)
80028ae: 6a7b ldr r3, [r7, #36] @ 0x24
80028b0: 089b lsrs r3, r3, #2
80028b2: 3302 adds r3, #2
80028b4: f852 3023 ldr.w r3, [r2, r3, lsl #2]
80028b8: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
80028ba: 6a7b ldr r3, [r7, #36] @ 0x24
80028bc: f003 0303 and.w r3, r3, #3
80028c0: 009b lsls r3, r3, #2
80028c2: 220f movs r2, #15
80028c4: fa02 f303 lsl.w r3, r2, r3
80028c8: 43db mvns r3, r3
80028ca: 68fa ldr r2, [r7, #12]
80028cc: 4013 ands r3, r2
80028ce: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
80028d0: 687b ldr r3, [r7, #4]
80028d2: 4a40 ldr r2, [pc, #256] @ (80029d4 <HAL_GPIO_Init+0x2c0>)
80028d4: 4293 cmp r3, r2
80028d6: d013 beq.n 8002900 <HAL_GPIO_Init+0x1ec>
80028d8: 687b ldr r3, [r7, #4]
80028da: 4a3f ldr r2, [pc, #252] @ (80029d8 <HAL_GPIO_Init+0x2c4>)
80028dc: 4293 cmp r3, r2
80028de: d00d beq.n 80028fc <HAL_GPIO_Init+0x1e8>
80028e0: 687b ldr r3, [r7, #4]
80028e2: 4a3e ldr r2, [pc, #248] @ (80029dc <HAL_GPIO_Init+0x2c8>)
80028e4: 4293 cmp r3, r2
80028e6: d007 beq.n 80028f8 <HAL_GPIO_Init+0x1e4>
80028e8: 687b ldr r3, [r7, #4]
80028ea: 4a3d ldr r2, [pc, #244] @ (80029e0 <HAL_GPIO_Init+0x2cc>)
80028ec: 4293 cmp r3, r2
80028ee: d101 bne.n 80028f4 <HAL_GPIO_Init+0x1e0>
80028f0: 2303 movs r3, #3
80028f2: e006 b.n 8002902 <HAL_GPIO_Init+0x1ee>
80028f4: 2304 movs r3, #4
80028f6: e004 b.n 8002902 <HAL_GPIO_Init+0x1ee>
80028f8: 2302 movs r3, #2
80028fa: e002 b.n 8002902 <HAL_GPIO_Init+0x1ee>
80028fc: 2301 movs r3, #1
80028fe: e000 b.n 8002902 <HAL_GPIO_Init+0x1ee>
8002900: 2300 movs r3, #0
8002902: 6a7a ldr r2, [r7, #36] @ 0x24
8002904: f002 0203 and.w r2, r2, #3
8002908: 0092 lsls r2, r2, #2
800290a: 4093 lsls r3, r2
800290c: 68fa ldr r2, [r7, #12]
800290e: 4313 orrs r3, r2
8002910: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
8002912: 492f ldr r1, [pc, #188] @ (80029d0 <HAL_GPIO_Init+0x2bc>)
8002914: 6a7b ldr r3, [r7, #36] @ 0x24
8002916: 089b lsrs r3, r3, #2
8002918: 3302 adds r3, #2
800291a: 68fa ldr r2, [r7, #12]
800291c: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8002920: 683b ldr r3, [r7, #0]
8002922: 685b ldr r3, [r3, #4]
8002924: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8002928: 2b00 cmp r3, #0
800292a: d006 beq.n 800293a <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
800292c: 4b2d ldr r3, [pc, #180] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
800292e: 689a ldr r2, [r3, #8]
8002930: 492c ldr r1, [pc, #176] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
8002932: 69bb ldr r3, [r7, #24]
8002934: 4313 orrs r3, r2
8002936: 608b str r3, [r1, #8]
8002938: e006 b.n 8002948 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
800293a: 4b2a ldr r3, [pc, #168] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
800293c: 689a ldr r2, [r3, #8]
800293e: 69bb ldr r3, [r7, #24]
8002940: 43db mvns r3, r3
8002942: 4928 ldr r1, [pc, #160] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
8002944: 4013 ands r3, r2
8002946: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8002948: 683b ldr r3, [r7, #0]
800294a: 685b ldr r3, [r3, #4]
800294c: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8002950: 2b00 cmp r3, #0
8002952: d006 beq.n 8002962 <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
8002954: 4b23 ldr r3, [pc, #140] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
8002956: 68da ldr r2, [r3, #12]
8002958: 4922 ldr r1, [pc, #136] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
800295a: 69bb ldr r3, [r7, #24]
800295c: 4313 orrs r3, r2
800295e: 60cb str r3, [r1, #12]
8002960: e006 b.n 8002970 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
8002962: 4b20 ldr r3, [pc, #128] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
8002964: 68da ldr r2, [r3, #12]
8002966: 69bb ldr r3, [r7, #24]
8002968: 43db mvns r3, r3
800296a: 491e ldr r1, [pc, #120] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
800296c: 4013 ands r3, r2
800296e: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8002970: 683b ldr r3, [r7, #0]
8002972: 685b ldr r3, [r3, #4]
8002974: f403 3300 and.w r3, r3, #131072 @ 0x20000
8002978: 2b00 cmp r3, #0
800297a: d006 beq.n 800298a <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
800297c: 4b19 ldr r3, [pc, #100] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
800297e: 685a ldr r2, [r3, #4]
8002980: 4918 ldr r1, [pc, #96] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
8002982: 69bb ldr r3, [r7, #24]
8002984: 4313 orrs r3, r2
8002986: 604b str r3, [r1, #4]
8002988: e006 b.n 8002998 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
800298a: 4b16 ldr r3, [pc, #88] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
800298c: 685a ldr r2, [r3, #4]
800298e: 69bb ldr r3, [r7, #24]
8002990: 43db mvns r3, r3
8002992: 4914 ldr r1, [pc, #80] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
8002994: 4013 ands r3, r2
8002996: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8002998: 683b ldr r3, [r7, #0]
800299a: 685b ldr r3, [r3, #4]
800299c: f403 3380 and.w r3, r3, #65536 @ 0x10000
80029a0: 2b00 cmp r3, #0
80029a2: d021 beq.n 80029e8 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
80029a4: 4b0f ldr r3, [pc, #60] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
80029a6: 681a ldr r2, [r3, #0]
80029a8: 490e ldr r1, [pc, #56] @ (80029e4 <HAL_GPIO_Init+0x2d0>)
80029aa: 69bb ldr r3, [r7, #24]
80029ac: 4313 orrs r3, r2
80029ae: 600b str r3, [r1, #0]
80029b0: e021 b.n 80029f6 <HAL_GPIO_Init+0x2e2>
80029b2: bf00 nop
80029b4: 10320000 .word 0x10320000
80029b8: 10310000 .word 0x10310000
80029bc: 10220000 .word 0x10220000
80029c0: 10210000 .word 0x10210000
80029c4: 10120000 .word 0x10120000
80029c8: 10110000 .word 0x10110000
80029cc: 40021000 .word 0x40021000
80029d0: 40010000 .word 0x40010000
80029d4: 40010800 .word 0x40010800
80029d8: 40010c00 .word 0x40010c00
80029dc: 40011000 .word 0x40011000
80029e0: 40011400 .word 0x40011400
80029e4: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
80029e8: 4b0b ldr r3, [pc, #44] @ (8002a18 <HAL_GPIO_Init+0x304>)
80029ea: 681a ldr r2, [r3, #0]
80029ec: 69bb ldr r3, [r7, #24]
80029ee: 43db mvns r3, r3
80029f0: 4909 ldr r1, [pc, #36] @ (8002a18 <HAL_GPIO_Init+0x304>)
80029f2: 4013 ands r3, r2
80029f4: 600b str r3, [r1, #0]
}
}
}
position++;
80029f6: 6a7b ldr r3, [r7, #36] @ 0x24
80029f8: 3301 adds r3, #1
80029fa: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
80029fc: 683b ldr r3, [r7, #0]
80029fe: 681a ldr r2, [r3, #0]
8002a00: 6a7b ldr r3, [r7, #36] @ 0x24
8002a02: fa22 f303 lsr.w r3, r2, r3
8002a06: 2b00 cmp r3, #0
8002a08: f47f ae8e bne.w 8002728 <HAL_GPIO_Init+0x14>
}
}
8002a0c: bf00 nop
8002a0e: bf00 nop
8002a10: 372c adds r7, #44 @ 0x2c
8002a12: 46bd mov sp, r7
8002a14: bc80 pop {r7}
8002a16: 4770 bx lr
8002a18: 40010400 .word 0x40010400
08002a1c <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8002a1c: b480 push {r7}
8002a1e: b083 sub sp, #12
8002a20: af00 add r7, sp, #0
8002a22: 6078 str r0, [r7, #4]
8002a24: 460b mov r3, r1
8002a26: 807b strh r3, [r7, #2]
8002a28: 4613 mov r3, r2
8002a2a: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8002a2c: 787b ldrb r3, [r7, #1]
8002a2e: 2b00 cmp r3, #0
8002a30: d003 beq.n 8002a3a <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8002a32: 887a ldrh r2, [r7, #2]
8002a34: 687b ldr r3, [r7, #4]
8002a36: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
8002a38: e003 b.n 8002a42 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
8002a3a: 887b ldrh r3, [r7, #2]
8002a3c: 041a lsls r2, r3, #16
8002a3e: 687b ldr r3, [r7, #4]
8002a40: 611a str r2, [r3, #16]
}
8002a42: bf00 nop
8002a44: 370c adds r7, #12
8002a46: 46bd mov sp, r7
8002a48: bc80 pop {r7}
8002a4a: 4770 bx lr
08002a4c <HAL_GPIO_TogglePin>:
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
* @param GPIO_Pin: Specifies the pins to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8002a4c: b480 push {r7}
8002a4e: b085 sub sp, #20
8002a50: af00 add r7, sp, #0
8002a52: 6078 str r0, [r7, #4]
8002a54: 460b mov r3, r1
8002a56: 807b strh r3, [r7, #2]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* get current Output Data Register value */
odr = GPIOx->ODR;
8002a58: 687b ldr r3, [r7, #4]
8002a5a: 68db ldr r3, [r3, #12]
8002a5c: 60fb str r3, [r7, #12]
/* Set selected pins that were at low level, and reset ones that were high */
GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
8002a5e: 887a ldrh r2, [r7, #2]
8002a60: 68fb ldr r3, [r7, #12]
8002a62: 4013 ands r3, r2
8002a64: 041a lsls r2, r3, #16
8002a66: 68fb ldr r3, [r7, #12]
8002a68: 43d9 mvns r1, r3
8002a6a: 887b ldrh r3, [r7, #2]
8002a6c: 400b ands r3, r1
8002a6e: 431a orrs r2, r3
8002a70: 687b ldr r3, [r7, #4]
8002a72: 611a str r2, [r3, #16]
}
8002a74: bf00 nop
8002a76: 3714 adds r7, #20
8002a78: 46bd mov sp, r7
8002a7a: bc80 pop {r7}
8002a7c: 4770 bx lr
08002a7e <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8002a7e: b580 push {r7, lr}
8002a80: b084 sub sp, #16
8002a82: af00 add r7, sp, #0
8002a84: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8002a86: 687b ldr r3, [r7, #4]
8002a88: 2b00 cmp r3, #0
8002a8a: d101 bne.n 8002a90 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8002a8c: 2301 movs r3, #1
8002a8e: e0e8 b.n 8002c62 <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8002a90: 687b ldr r3, [r7, #4]
8002a92: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
8002a96: b2db uxtb r3, r3
8002a98: 2b00 cmp r3, #0
8002a9a: d106 bne.n 8002aaa <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8002a9c: 687b ldr r3, [r7, #4]
8002a9e: 2200 movs r2, #0
8002aa0: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8002aa4: 6878 ldr r0, [r7, #4]
8002aa6: f007 facf bl 800a048 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8002aaa: 687b ldr r3, [r7, #4]
8002aac: 2203 movs r2, #3
8002aae: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8002ab2: 687b ldr r3, [r7, #4]
8002ab4: 2200 movs r2, #0
8002ab6: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8002ab8: 687b ldr r3, [r7, #4]
8002aba: 681b ldr r3, [r3, #0]
8002abc: 4618 mov r0, r3
8002abe: f003 f974 bl 8005daa <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8002ac2: 687b ldr r3, [r7, #4]
8002ac4: 6818 ldr r0, [r3, #0]
8002ac6: 687b ldr r3, [r7, #4]
8002ac8: 3304 adds r3, #4
8002aca: cb0e ldmia r3, {r1, r2, r3}
8002acc: f003 f94a bl 8005d64 <USB_CoreInit>
8002ad0: 4603 mov r3, r0
8002ad2: 2b00 cmp r3, #0
8002ad4: d005 beq.n 8002ae2 <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8002ad6: 687b ldr r3, [r7, #4]
8002ad8: 2202 movs r2, #2
8002ada: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8002ade: 2301 movs r3, #1
8002ae0: e0bf b.n 8002c62 <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
8002ae2: 687b ldr r3, [r7, #4]
8002ae4: 681b ldr r3, [r3, #0]
8002ae6: 2100 movs r1, #0
8002ae8: 4618 mov r0, r3
8002aea: f003 f978 bl 8005dde <USB_SetCurrentMode>
8002aee: 4603 mov r3, r0
8002af0: 2b00 cmp r3, #0
8002af2: d005 beq.n 8002b00 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8002af4: 687b ldr r3, [r7, #4]
8002af6: 2202 movs r2, #2
8002af8: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8002afc: 2301 movs r3, #1
8002afe: e0b0 b.n 8002c62 <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002b00: 2300 movs r3, #0
8002b02: 73fb strb r3, [r7, #15]
8002b04: e03e b.n 8002b84 <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
8002b06: 7bfa ldrb r2, [r7, #15]
8002b08: 6879 ldr r1, [r7, #4]
8002b0a: 4613 mov r3, r2
8002b0c: 009b lsls r3, r3, #2
8002b0e: 4413 add r3, r2
8002b10: 00db lsls r3, r3, #3
8002b12: 440b add r3, r1
8002b14: 3311 adds r3, #17
8002b16: 2201 movs r2, #1
8002b18: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8002b1a: 7bfa ldrb r2, [r7, #15]
8002b1c: 6879 ldr r1, [r7, #4]
8002b1e: 4613 mov r3, r2
8002b20: 009b lsls r3, r3, #2
8002b22: 4413 add r3, r2
8002b24: 00db lsls r3, r3, #3
8002b26: 440b add r3, r1
8002b28: 3310 adds r3, #16
8002b2a: 7bfa ldrb r2, [r7, #15]
8002b2c: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8002b2e: 7bfa ldrb r2, [r7, #15]
8002b30: 6879 ldr r1, [r7, #4]
8002b32: 4613 mov r3, r2
8002b34: 009b lsls r3, r3, #2
8002b36: 4413 add r3, r2
8002b38: 00db lsls r3, r3, #3
8002b3a: 440b add r3, r1
8002b3c: 3313 adds r3, #19
8002b3e: 2200 movs r2, #0
8002b40: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
8002b42: 7bfa ldrb r2, [r7, #15]
8002b44: 6879 ldr r1, [r7, #4]
8002b46: 4613 mov r3, r2
8002b48: 009b lsls r3, r3, #2
8002b4a: 4413 add r3, r2
8002b4c: 00db lsls r3, r3, #3
8002b4e: 440b add r3, r1
8002b50: 3320 adds r3, #32
8002b52: 2200 movs r2, #0
8002b54: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8002b56: 7bfa ldrb r2, [r7, #15]
8002b58: 6879 ldr r1, [r7, #4]
8002b5a: 4613 mov r3, r2
8002b5c: 009b lsls r3, r3, #2
8002b5e: 4413 add r3, r2
8002b60: 00db lsls r3, r3, #3
8002b62: 440b add r3, r1
8002b64: 3324 adds r3, #36 @ 0x24
8002b66: 2200 movs r2, #0
8002b68: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8002b6a: 7bfb ldrb r3, [r7, #15]
8002b6c: 6879 ldr r1, [r7, #4]
8002b6e: 1c5a adds r2, r3, #1
8002b70: 4613 mov r3, r2
8002b72: 009b lsls r3, r3, #2
8002b74: 4413 add r3, r2
8002b76: 00db lsls r3, r3, #3
8002b78: 440b add r3, r1
8002b7a: 2200 movs r2, #0
8002b7c: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002b7e: 7bfb ldrb r3, [r7, #15]
8002b80: 3301 adds r3, #1
8002b82: 73fb strb r3, [r7, #15]
8002b84: 687b ldr r3, [r7, #4]
8002b86: 791b ldrb r3, [r3, #4]
8002b88: 7bfa ldrb r2, [r7, #15]
8002b8a: 429a cmp r2, r3
8002b8c: d3bb bcc.n 8002b06 <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002b8e: 2300 movs r3, #0
8002b90: 73fb strb r3, [r7, #15]
8002b92: e044 b.n 8002c1e <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
8002b94: 7bfa ldrb r2, [r7, #15]
8002b96: 6879 ldr r1, [r7, #4]
8002b98: 4613 mov r3, r2
8002b9a: 009b lsls r3, r3, #2
8002b9c: 4413 add r3, r2
8002b9e: 00db lsls r3, r3, #3
8002ba0: 440b add r3, r1
8002ba2: f203 1351 addw r3, r3, #337 @ 0x151
8002ba6: 2200 movs r2, #0
8002ba8: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
8002baa: 7bfa ldrb r2, [r7, #15]
8002bac: 6879 ldr r1, [r7, #4]
8002bae: 4613 mov r3, r2
8002bb0: 009b lsls r3, r3, #2
8002bb2: 4413 add r3, r2
8002bb4: 00db lsls r3, r3, #3
8002bb6: 440b add r3, r1
8002bb8: f503 73a8 add.w r3, r3, #336 @ 0x150
8002bbc: 7bfa ldrb r2, [r7, #15]
8002bbe: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8002bc0: 7bfa ldrb r2, [r7, #15]
8002bc2: 6879 ldr r1, [r7, #4]
8002bc4: 4613 mov r3, r2
8002bc6: 009b lsls r3, r3, #2
8002bc8: 4413 add r3, r2
8002bca: 00db lsls r3, r3, #3
8002bcc: 440b add r3, r1
8002bce: f203 1353 addw r3, r3, #339 @ 0x153
8002bd2: 2200 movs r2, #0
8002bd4: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
8002bd6: 7bfa ldrb r2, [r7, #15]
8002bd8: 6879 ldr r1, [r7, #4]
8002bda: 4613 mov r3, r2
8002bdc: 009b lsls r3, r3, #2
8002bde: 4413 add r3, r2
8002be0: 00db lsls r3, r3, #3
8002be2: 440b add r3, r1
8002be4: f503 73b0 add.w r3, r3, #352 @ 0x160
8002be8: 2200 movs r2, #0
8002bea: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8002bec: 7bfa ldrb r2, [r7, #15]
8002bee: 6879 ldr r1, [r7, #4]
8002bf0: 4613 mov r3, r2
8002bf2: 009b lsls r3, r3, #2
8002bf4: 4413 add r3, r2
8002bf6: 00db lsls r3, r3, #3
8002bf8: 440b add r3, r1
8002bfa: f503 73b2 add.w r3, r3, #356 @ 0x164
8002bfe: 2200 movs r2, #0
8002c00: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
8002c02: 7bfa ldrb r2, [r7, #15]
8002c04: 6879 ldr r1, [r7, #4]
8002c06: 4613 mov r3, r2
8002c08: 009b lsls r3, r3, #2
8002c0a: 4413 add r3, r2
8002c0c: 00db lsls r3, r3, #3
8002c0e: 440b add r3, r1
8002c10: f503 73b4 add.w r3, r3, #360 @ 0x168
8002c14: 2200 movs r2, #0
8002c16: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8002c18: 7bfb ldrb r3, [r7, #15]
8002c1a: 3301 adds r3, #1
8002c1c: 73fb strb r3, [r7, #15]
8002c1e: 687b ldr r3, [r7, #4]
8002c20: 791b ldrb r3, [r3, #4]
8002c22: 7bfa ldrb r2, [r7, #15]
8002c24: 429a cmp r2, r3
8002c26: d3b5 bcc.n 8002b94 <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8002c28: 687b ldr r3, [r7, #4]
8002c2a: 6818 ldr r0, [r3, #0]
8002c2c: 687b ldr r3, [r7, #4]
8002c2e: 3304 adds r3, #4
8002c30: cb0e ldmia r3, {r1, r2, r3}
8002c32: f003 f8e0 bl 8005df6 <USB_DevInit>
8002c36: 4603 mov r3, r0
8002c38: 2b00 cmp r3, #0
8002c3a: d005 beq.n 8002c48 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8002c3c: 687b ldr r3, [r7, #4]
8002c3e: 2202 movs r2, #2
8002c40: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8002c44: 2301 movs r3, #1
8002c46: e00c b.n 8002c62 <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
8002c48: 687b ldr r3, [r7, #4]
8002c4a: 2200 movs r2, #0
8002c4c: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
8002c4e: 687b ldr r3, [r7, #4]
8002c50: 2201 movs r2, #1
8002c52: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
8002c56: 687b ldr r3, [r7, #4]
8002c58: 681b ldr r3, [r3, #0]
8002c5a: 4618 mov r0, r3
8002c5c: f005 fb5f bl 800831e <USB_DevDisconnect>
return HAL_OK;
8002c60: 2300 movs r3, #0
}
8002c62: 4618 mov r0, r3
8002c64: 3710 adds r7, #16
8002c66: 46bd mov sp, r7
8002c68: bd80 pop {r7, pc}
08002c6a <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8002c6a: b580 push {r7, lr}
8002c6c: b082 sub sp, #8
8002c6e: af00 add r7, sp, #0
8002c70: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8002c72: 687b ldr r3, [r7, #4]
8002c74: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8002c78: 2b01 cmp r3, #1
8002c7a: d101 bne.n 8002c80 <HAL_PCD_Start+0x16>
8002c7c: 2302 movs r3, #2
8002c7e: e016 b.n 8002cae <HAL_PCD_Start+0x44>
8002c80: 687b ldr r3, [r7, #4]
8002c82: 2201 movs r2, #1
8002c84: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
8002c88: 687b ldr r3, [r7, #4]
8002c8a: 681b ldr r3, [r3, #0]
8002c8c: 4618 mov r0, r3
8002c8e: f003 f876 bl 8005d7e <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8002c92: 2101 movs r1, #1
8002c94: 6878 ldr r0, [r7, #4]
8002c96: f007 fc4a bl 800a52e <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
8002c9a: 687b ldr r3, [r7, #4]
8002c9c: 681b ldr r3, [r3, #0]
8002c9e: 4618 mov r0, r3
8002ca0: f005 fb33 bl 800830a <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8002ca4: 687b ldr r3, [r7, #4]
8002ca6: 2200 movs r2, #0
8002ca8: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8002cac: 2300 movs r3, #0
}
8002cae: 4618 mov r0, r3
8002cb0: 3708 adds r7, #8
8002cb2: 46bd mov sp, r7
8002cb4: bd80 pop {r7, pc}
08002cb6 <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8002cb6: b580 push {r7, lr}
8002cb8: b088 sub sp, #32
8002cba: af00 add r7, sp, #0
8002cbc: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
8002cbe: 687b ldr r3, [r7, #4]
8002cc0: 681b ldr r3, [r3, #0]
8002cc2: 4618 mov r0, r3
8002cc4: f005 fb35 bl 8008332 <USB_ReadInterrupts>
8002cc8: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
8002cca: 69bb ldr r3, [r7, #24]
8002ccc: f403 4300 and.w r3, r3, #32768 @ 0x8000
8002cd0: 2b00 cmp r3, #0
8002cd2: d003 beq.n 8002cdc <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
8002cd4: 6878 ldr r0, [r7, #4]
8002cd6: f000 fb1a bl 800330e <PCD_EP_ISR_Handler>
return;
8002cda: e119 b.n 8002f10 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
8002cdc: 69bb ldr r3, [r7, #24]
8002cde: f403 6380 and.w r3, r3, #1024 @ 0x400
8002ce2: 2b00 cmp r3, #0
8002ce4: d013 beq.n 8002d0e <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8002ce6: 687b ldr r3, [r7, #4]
8002ce8: 681b ldr r3, [r3, #0]
8002cea: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002cee: b29a uxth r2, r3
8002cf0: 687b ldr r3, [r7, #4]
8002cf2: 681b ldr r3, [r3, #0]
8002cf4: f422 6280 bic.w r2, r2, #1024 @ 0x400
8002cf8: b292 uxth r2, r2
8002cfa: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8002cfe: 6878 ldr r0, [r7, #4]
8002d00: f007 fa1d bl 800a13e <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
8002d04: 2100 movs r1, #0
8002d06: 6878 ldr r0, [r7, #4]
8002d08: f000 f905 bl 8002f16 <HAL_PCD_SetAddress>
return;
8002d0c: e100 b.n 8002f10 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
8002d0e: 69bb ldr r3, [r7, #24]
8002d10: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002d14: 2b00 cmp r3, #0
8002d16: d00c beq.n 8002d32 <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8002d18: 687b ldr r3, [r7, #4]
8002d1a: 681b ldr r3, [r3, #0]
8002d1c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002d20: b29a uxth r2, r3
8002d22: 687b ldr r3, [r7, #4]
8002d24: 681b ldr r3, [r3, #0]
8002d26: f422 4280 bic.w r2, r2, #16384 @ 0x4000
8002d2a: b292 uxth r2, r2
8002d2c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8002d30: e0ee b.n 8002f10 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
8002d32: 69bb ldr r3, [r7, #24]
8002d34: f403 5300 and.w r3, r3, #8192 @ 0x2000
8002d38: 2b00 cmp r3, #0
8002d3a: d00c beq.n 8002d56 <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8002d3c: 687b ldr r3, [r7, #4]
8002d3e: 681b ldr r3, [r3, #0]
8002d40: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002d44: b29a uxth r2, r3
8002d46: 687b ldr r3, [r7, #4]
8002d48: 681b ldr r3, [r3, #0]
8002d4a: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8002d4e: b292 uxth r2, r2
8002d50: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8002d54: e0dc b.n 8002f10 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
8002d56: 69bb ldr r3, [r7, #24]
8002d58: f403 5380 and.w r3, r3, #4096 @ 0x1000
8002d5c: 2b00 cmp r3, #0
8002d5e: d027 beq.n 8002db0 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8002d60: 687b ldr r3, [r7, #4]
8002d62: 681b ldr r3, [r3, #0]
8002d64: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002d68: b29a uxth r2, r3
8002d6a: 687b ldr r3, [r7, #4]
8002d6c: 681b ldr r3, [r3, #0]
8002d6e: f022 0204 bic.w r2, r2, #4
8002d72: b292 uxth r2, r2
8002d74: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8002d78: 687b ldr r3, [r7, #4]
8002d7a: 681b ldr r3, [r3, #0]
8002d7c: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002d80: b29a uxth r2, r3
8002d82: 687b ldr r3, [r7, #4]
8002d84: 681b ldr r3, [r3, #0]
8002d86: f022 0208 bic.w r2, r2, #8
8002d8a: b292 uxth r2, r2
8002d8c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8002d90: 6878 ldr r0, [r7, #4]
8002d92: f007 fa0d bl 800a1b0 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8002d96: 687b ldr r3, [r7, #4]
8002d98: 681b ldr r3, [r3, #0]
8002d9a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002d9e: b29a uxth r2, r3
8002da0: 687b ldr r3, [r7, #4]
8002da2: 681b ldr r3, [r3, #0]
8002da4: f422 5280 bic.w r2, r2, #4096 @ 0x1000
8002da8: b292 uxth r2, r2
8002daa: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8002dae: e0af b.n 8002f10 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8002db0: 69bb ldr r3, [r7, #24]
8002db2: f403 6300 and.w r3, r3, #2048 @ 0x800
8002db6: 2b00 cmp r3, #0
8002db8: f000 8083 beq.w 8002ec2 <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
8002dbc: 2300 movs r3, #0
8002dbe: 77fb strb r3, [r7, #31]
8002dc0: e010 b.n 8002de4 <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8002dc2: 687b ldr r3, [r7, #4]
8002dc4: 681b ldr r3, [r3, #0]
8002dc6: 461a mov r2, r3
8002dc8: 7ffb ldrb r3, [r7, #31]
8002dca: 009b lsls r3, r3, #2
8002dcc: 441a add r2, r3
8002dce: 7ffb ldrb r3, [r7, #31]
8002dd0: 8812 ldrh r2, [r2, #0]
8002dd2: b292 uxth r2, r2
8002dd4: 005b lsls r3, r3, #1
8002dd6: 3320 adds r3, #32
8002dd8: 443b add r3, r7
8002dda: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8002dde: 7ffb ldrb r3, [r7, #31]
8002de0: 3301 adds r3, #1
8002de2: 77fb strb r3, [r7, #31]
8002de4: 7ffb ldrb r3, [r7, #31]
8002de6: 2b07 cmp r3, #7
8002de8: d9eb bls.n 8002dc2 <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8002dea: 687b ldr r3, [r7, #4]
8002dec: 681b ldr r3, [r3, #0]
8002dee: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002df2: b29a uxth r2, r3
8002df4: 687b ldr r3, [r7, #4]
8002df6: 681b ldr r3, [r3, #0]
8002df8: f042 0201 orr.w r2, r2, #1
8002dfc: b292 uxth r2, r2
8002dfe: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
8002e02: 687b ldr r3, [r7, #4]
8002e04: 681b ldr r3, [r3, #0]
8002e06: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002e0a: b29a uxth r2, r3
8002e0c: 687b ldr r3, [r7, #4]
8002e0e: 681b ldr r3, [r3, #0]
8002e10: f022 0201 bic.w r2, r2, #1
8002e14: b292 uxth r2, r2
8002e16: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8002e1a: bf00 nop
8002e1c: 687b ldr r3, [r7, #4]
8002e1e: 681b ldr r3, [r3, #0]
8002e20: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002e24: b29b uxth r3, r3
8002e26: f403 6380 and.w r3, r3, #1024 @ 0x400
8002e2a: 2b00 cmp r3, #0
8002e2c: d0f6 beq.n 8002e1c <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8002e2e: 687b ldr r3, [r7, #4]
8002e30: 681b ldr r3, [r3, #0]
8002e32: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002e36: b29a uxth r2, r3
8002e38: 687b ldr r3, [r7, #4]
8002e3a: 681b ldr r3, [r3, #0]
8002e3c: f422 6280 bic.w r2, r2, #1024 @ 0x400
8002e40: b292 uxth r2, r2
8002e42: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8002e46: 2300 movs r3, #0
8002e48: 77fb strb r3, [r7, #31]
8002e4a: e00f b.n 8002e6c <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8002e4c: 7ffb ldrb r3, [r7, #31]
8002e4e: 687a ldr r2, [r7, #4]
8002e50: 6812 ldr r2, [r2, #0]
8002e52: 4611 mov r1, r2
8002e54: 7ffa ldrb r2, [r7, #31]
8002e56: 0092 lsls r2, r2, #2
8002e58: 440a add r2, r1
8002e5a: 005b lsls r3, r3, #1
8002e5c: 3320 adds r3, #32
8002e5e: 443b add r3, r7
8002e60: f833 3c18 ldrh.w r3, [r3, #-24]
8002e64: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8002e66: 7ffb ldrb r3, [r7, #31]
8002e68: 3301 adds r3, #1
8002e6a: 77fb strb r3, [r7, #31]
8002e6c: 7ffb ldrb r3, [r7, #31]
8002e6e: 2b07 cmp r3, #7
8002e70: d9ec bls.n 8002e4c <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8002e72: 687b ldr r3, [r7, #4]
8002e74: 681b ldr r3, [r3, #0]
8002e76: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002e7a: b29a uxth r2, r3
8002e7c: 687b ldr r3, [r7, #4]
8002e7e: 681b ldr r3, [r3, #0]
8002e80: f042 0208 orr.w r2, r2, #8
8002e84: b292 uxth r2, r2
8002e86: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8002e8a: 687b ldr r3, [r7, #4]
8002e8c: 681b ldr r3, [r3, #0]
8002e8e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002e92: b29a uxth r2, r3
8002e94: 687b ldr r3, [r7, #4]
8002e96: 681b ldr r3, [r3, #0]
8002e98: f422 6200 bic.w r2, r2, #2048 @ 0x800
8002e9c: b292 uxth r2, r2
8002e9e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8002ea2: 687b ldr r3, [r7, #4]
8002ea4: 681b ldr r3, [r3, #0]
8002ea6: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8002eaa: b29a uxth r2, r3
8002eac: 687b ldr r3, [r7, #4]
8002eae: 681b ldr r3, [r3, #0]
8002eb0: f042 0204 orr.w r2, r2, #4
8002eb4: b292 uxth r2, r2
8002eb6: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8002eba: 6878 ldr r0, [r7, #4]
8002ebc: f007 f95e bl 800a17c <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8002ec0: e026 b.n 8002f10 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8002ec2: 69bb ldr r3, [r7, #24]
8002ec4: f403 7300 and.w r3, r3, #512 @ 0x200
8002ec8: 2b00 cmp r3, #0
8002eca: d00f beq.n 8002eec <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8002ecc: 687b ldr r3, [r7, #4]
8002ece: 681b ldr r3, [r3, #0]
8002ed0: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002ed4: b29a uxth r2, r3
8002ed6: 687b ldr r3, [r7, #4]
8002ed8: 681b ldr r3, [r3, #0]
8002eda: f422 7200 bic.w r2, r2, #512 @ 0x200
8002ede: b292 uxth r2, r2
8002ee0: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8002ee4: 6878 ldr r0, [r7, #4]
8002ee6: f007 f91c bl 800a122 <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8002eea: e011 b.n 8002f10 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8002eec: 69bb ldr r3, [r7, #24]
8002eee: f403 7380 and.w r3, r3, #256 @ 0x100
8002ef2: 2b00 cmp r3, #0
8002ef4: d00c beq.n 8002f10 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8002ef6: 687b ldr r3, [r7, #4]
8002ef8: 681b ldr r3, [r3, #0]
8002efa: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8002efe: b29a uxth r2, r3
8002f00: 687b ldr r3, [r7, #4]
8002f02: 681b ldr r3, [r3, #0]
8002f04: f422 7280 bic.w r2, r2, #256 @ 0x100
8002f08: b292 uxth r2, r2
8002f0a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8002f0e: bf00 nop
}
}
8002f10: 3720 adds r7, #32
8002f12: 46bd mov sp, r7
8002f14: bd80 pop {r7, pc}
08002f16 <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8002f16: b580 push {r7, lr}
8002f18: b082 sub sp, #8
8002f1a: af00 add r7, sp, #0
8002f1c: 6078 str r0, [r7, #4]
8002f1e: 460b mov r3, r1
8002f20: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8002f22: 687b ldr r3, [r7, #4]
8002f24: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8002f28: 2b01 cmp r3, #1
8002f2a: d101 bne.n 8002f30 <HAL_PCD_SetAddress+0x1a>
8002f2c: 2302 movs r3, #2
8002f2e: e012 b.n 8002f56 <HAL_PCD_SetAddress+0x40>
8002f30: 687b ldr r3, [r7, #4]
8002f32: 2201 movs r2, #1
8002f34: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8002f38: 687b ldr r3, [r7, #4]
8002f3a: 78fa ldrb r2, [r7, #3]
8002f3c: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8002f3e: 687b ldr r3, [r7, #4]
8002f40: 681b ldr r3, [r3, #0]
8002f42: 78fa ldrb r2, [r7, #3]
8002f44: 4611 mov r1, r2
8002f46: 4618 mov r0, r3
8002f48: f005 f9cc bl 80082e4 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8002f4c: 687b ldr r3, [r7, #4]
8002f4e: 2200 movs r2, #0
8002f50: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8002f54: 2300 movs r3, #0
}
8002f56: 4618 mov r0, r3
8002f58: 3708 adds r7, #8
8002f5a: 46bd mov sp, r7
8002f5c: bd80 pop {r7, pc}
08002f5e <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8002f5e: b580 push {r7, lr}
8002f60: b084 sub sp, #16
8002f62: af00 add r7, sp, #0
8002f64: 6078 str r0, [r7, #4]
8002f66: 4608 mov r0, r1
8002f68: 4611 mov r1, r2
8002f6a: 461a mov r2, r3
8002f6c: 4603 mov r3, r0
8002f6e: 70fb strb r3, [r7, #3]
8002f70: 460b mov r3, r1
8002f72: 803b strh r3, [r7, #0]
8002f74: 4613 mov r3, r2
8002f76: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8002f78: 2300 movs r3, #0
8002f7a: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8002f7c: f997 3003 ldrsb.w r3, [r7, #3]
8002f80: 2b00 cmp r3, #0
8002f82: da0e bge.n 8002fa2 <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8002f84: 78fb ldrb r3, [r7, #3]
8002f86: f003 0207 and.w r2, r3, #7
8002f8a: 4613 mov r3, r2
8002f8c: 009b lsls r3, r3, #2
8002f8e: 4413 add r3, r2
8002f90: 00db lsls r3, r3, #3
8002f92: 3310 adds r3, #16
8002f94: 687a ldr r2, [r7, #4]
8002f96: 4413 add r3, r2
8002f98: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8002f9a: 68fb ldr r3, [r7, #12]
8002f9c: 2201 movs r2, #1
8002f9e: 705a strb r2, [r3, #1]
8002fa0: e00e b.n 8002fc0 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8002fa2: 78fb ldrb r3, [r7, #3]
8002fa4: f003 0207 and.w r2, r3, #7
8002fa8: 4613 mov r3, r2
8002faa: 009b lsls r3, r3, #2
8002fac: 4413 add r3, r2
8002fae: 00db lsls r3, r3, #3
8002fb0: f503 73a8 add.w r3, r3, #336 @ 0x150
8002fb4: 687a ldr r2, [r7, #4]
8002fb6: 4413 add r3, r2
8002fb8: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8002fba: 68fb ldr r3, [r7, #12]
8002fbc: 2200 movs r2, #0
8002fbe: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8002fc0: 78fb ldrb r3, [r7, #3]
8002fc2: f003 0307 and.w r3, r3, #7
8002fc6: b2da uxtb r2, r3
8002fc8: 68fb ldr r3, [r7, #12]
8002fca: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8002fcc: 883a ldrh r2, [r7, #0]
8002fce: 68fb ldr r3, [r7, #12]
8002fd0: 611a str r2, [r3, #16]
ep->type = ep_type;
8002fd2: 68fb ldr r3, [r7, #12]
8002fd4: 78ba ldrb r2, [r7, #2]
8002fd6: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8002fd8: 78bb ldrb r3, [r7, #2]
8002fda: 2b02 cmp r3, #2
8002fdc: d102 bne.n 8002fe4 <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8002fde: 68fb ldr r3, [r7, #12]
8002fe0: 2200 movs r2, #0
8002fe2: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8002fe4: 687b ldr r3, [r7, #4]
8002fe6: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8002fea: 2b01 cmp r3, #1
8002fec: d101 bne.n 8002ff2 <HAL_PCD_EP_Open+0x94>
8002fee: 2302 movs r3, #2
8002ff0: e00e b.n 8003010 <HAL_PCD_EP_Open+0xb2>
8002ff2: 687b ldr r3, [r7, #4]
8002ff4: 2201 movs r2, #1
8002ff6: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8002ffa: 687b ldr r3, [r7, #4]
8002ffc: 681b ldr r3, [r3, #0]
8002ffe: 68f9 ldr r1, [r7, #12]
8003000: 4618 mov r0, r3
8003002: f002 ff15 bl 8005e30 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8003006: 687b ldr r3, [r7, #4]
8003008: 2200 movs r2, #0
800300a: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
800300e: 7afb ldrb r3, [r7, #11]
}
8003010: 4618 mov r0, r3
8003012: 3710 adds r7, #16
8003014: 46bd mov sp, r7
8003016: bd80 pop {r7, pc}
08003018 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8003018: b580 push {r7, lr}
800301a: b084 sub sp, #16
800301c: af00 add r7, sp, #0
800301e: 6078 str r0, [r7, #4]
8003020: 460b mov r3, r1
8003022: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8003024: f997 3003 ldrsb.w r3, [r7, #3]
8003028: 2b00 cmp r3, #0
800302a: da0e bge.n 800304a <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800302c: 78fb ldrb r3, [r7, #3]
800302e: f003 0207 and.w r2, r3, #7
8003032: 4613 mov r3, r2
8003034: 009b lsls r3, r3, #2
8003036: 4413 add r3, r2
8003038: 00db lsls r3, r3, #3
800303a: 3310 adds r3, #16
800303c: 687a ldr r2, [r7, #4]
800303e: 4413 add r3, r2
8003040: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8003042: 68fb ldr r3, [r7, #12]
8003044: 2201 movs r2, #1
8003046: 705a strb r2, [r3, #1]
8003048: e00e b.n 8003068 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
800304a: 78fb ldrb r3, [r7, #3]
800304c: f003 0207 and.w r2, r3, #7
8003050: 4613 mov r3, r2
8003052: 009b lsls r3, r3, #2
8003054: 4413 add r3, r2
8003056: 00db lsls r3, r3, #3
8003058: f503 73a8 add.w r3, r3, #336 @ 0x150
800305c: 687a ldr r2, [r7, #4]
800305e: 4413 add r3, r2
8003060: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8003062: 68fb ldr r3, [r7, #12]
8003064: 2200 movs r2, #0
8003066: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8003068: 78fb ldrb r3, [r7, #3]
800306a: f003 0307 and.w r3, r3, #7
800306e: b2da uxtb r2, r3
8003070: 68fb ldr r3, [r7, #12]
8003072: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8003074: 687b ldr r3, [r7, #4]
8003076: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
800307a: 2b01 cmp r3, #1
800307c: d101 bne.n 8003082 <HAL_PCD_EP_Close+0x6a>
800307e: 2302 movs r3, #2
8003080: e00e b.n 80030a0 <HAL_PCD_EP_Close+0x88>
8003082: 687b ldr r3, [r7, #4]
8003084: 2201 movs r2, #1
8003086: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
800308a: 687b ldr r3, [r7, #4]
800308c: 681b ldr r3, [r3, #0]
800308e: 68f9 ldr r1, [r7, #12]
8003090: 4618 mov r0, r3
8003092: f003 fa8d bl 80065b0 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8003096: 687b ldr r3, [r7, #4]
8003098: 2200 movs r2, #0
800309a: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
800309e: 2300 movs r3, #0
}
80030a0: 4618 mov r0, r3
80030a2: 3710 adds r7, #16
80030a4: 46bd mov sp, r7
80030a6: bd80 pop {r7, pc}
080030a8 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
80030a8: b580 push {r7, lr}
80030aa: b086 sub sp, #24
80030ac: af00 add r7, sp, #0
80030ae: 60f8 str r0, [r7, #12]
80030b0: 607a str r2, [r7, #4]
80030b2: 603b str r3, [r7, #0]
80030b4: 460b mov r3, r1
80030b6: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80030b8: 7afb ldrb r3, [r7, #11]
80030ba: f003 0207 and.w r2, r3, #7
80030be: 4613 mov r3, r2
80030c0: 009b lsls r3, r3, #2
80030c2: 4413 add r3, r2
80030c4: 00db lsls r3, r3, #3
80030c6: f503 73a8 add.w r3, r3, #336 @ 0x150
80030ca: 68fa ldr r2, [r7, #12]
80030cc: 4413 add r3, r2
80030ce: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
80030d0: 697b ldr r3, [r7, #20]
80030d2: 687a ldr r2, [r7, #4]
80030d4: 615a str r2, [r3, #20]
ep->xfer_len = len;
80030d6: 697b ldr r3, [r7, #20]
80030d8: 683a ldr r2, [r7, #0]
80030da: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
80030dc: 697b ldr r3, [r7, #20]
80030de: 2200 movs r2, #0
80030e0: 61da str r2, [r3, #28]
ep->is_in = 0U;
80030e2: 697b ldr r3, [r7, #20]
80030e4: 2200 movs r2, #0
80030e6: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
80030e8: 7afb ldrb r3, [r7, #11]
80030ea: f003 0307 and.w r3, r3, #7
80030ee: b2da uxtb r2, r3
80030f0: 697b ldr r3, [r7, #20]
80030f2: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
80030f4: 68fb ldr r3, [r7, #12]
80030f6: 681b ldr r3, [r3, #0]
80030f8: 6979 ldr r1, [r7, #20]
80030fa: 4618 mov r0, r3
80030fc: f003 fc44 bl 8006988 <USB_EPStartXfer>
return HAL_OK;
8003100: 2300 movs r3, #0
}
8003102: 4618 mov r0, r3
8003104: 3718 adds r7, #24
8003106: 46bd mov sp, r7
8003108: bd80 pop {r7, pc}
0800310a <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
800310a: b480 push {r7}
800310c: b083 sub sp, #12
800310e: af00 add r7, sp, #0
8003110: 6078 str r0, [r7, #4]
8003112: 460b mov r3, r1
8003114: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8003116: 78fb ldrb r3, [r7, #3]
8003118: f003 0207 and.w r2, r3, #7
800311c: 6879 ldr r1, [r7, #4]
800311e: 4613 mov r3, r2
8003120: 009b lsls r3, r3, #2
8003122: 4413 add r3, r2
8003124: 00db lsls r3, r3, #3
8003126: 440b add r3, r1
8003128: f503 73b6 add.w r3, r3, #364 @ 0x16c
800312c: 681b ldr r3, [r3, #0]
}
800312e: 4618 mov r0, r3
8003130: 370c adds r7, #12
8003132: 46bd mov sp, r7
8003134: bc80 pop {r7}
8003136: 4770 bx lr
08003138 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8003138: b580 push {r7, lr}
800313a: b086 sub sp, #24
800313c: af00 add r7, sp, #0
800313e: 60f8 str r0, [r7, #12]
8003140: 607a str r2, [r7, #4]
8003142: 603b str r3, [r7, #0]
8003144: 460b mov r3, r1
8003146: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8003148: 7afb ldrb r3, [r7, #11]
800314a: f003 0207 and.w r2, r3, #7
800314e: 4613 mov r3, r2
8003150: 009b lsls r3, r3, #2
8003152: 4413 add r3, r2
8003154: 00db lsls r3, r3, #3
8003156: 3310 adds r3, #16
8003158: 68fa ldr r2, [r7, #12]
800315a: 4413 add r3, r2
800315c: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
800315e: 697b ldr r3, [r7, #20]
8003160: 687a ldr r2, [r7, #4]
8003162: 615a str r2, [r3, #20]
ep->xfer_len = len;
8003164: 697b ldr r3, [r7, #20]
8003166: 683a ldr r2, [r7, #0]
8003168: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
800316a: 697b ldr r3, [r7, #20]
800316c: 2201 movs r2, #1
800316e: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
8003172: 697b ldr r3, [r7, #20]
8003174: 683a ldr r2, [r7, #0]
8003176: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8003178: 697b ldr r3, [r7, #20]
800317a: 2200 movs r2, #0
800317c: 61da str r2, [r3, #28]
ep->is_in = 1U;
800317e: 697b ldr r3, [r7, #20]
8003180: 2201 movs r2, #1
8003182: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8003184: 7afb ldrb r3, [r7, #11]
8003186: f003 0307 and.w r3, r3, #7
800318a: b2da uxtb r2, r3
800318c: 697b ldr r3, [r7, #20]
800318e: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8003190: 68fb ldr r3, [r7, #12]
8003192: 681b ldr r3, [r3, #0]
8003194: 6979 ldr r1, [r7, #20]
8003196: 4618 mov r0, r3
8003198: f003 fbf6 bl 8006988 <USB_EPStartXfer>
return HAL_OK;
800319c: 2300 movs r3, #0
}
800319e: 4618 mov r0, r3
80031a0: 3718 adds r7, #24
80031a2: 46bd mov sp, r7
80031a4: bd80 pop {r7, pc}
080031a6 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80031a6: b580 push {r7, lr}
80031a8: b084 sub sp, #16
80031aa: af00 add r7, sp, #0
80031ac: 6078 str r0, [r7, #4]
80031ae: 460b mov r3, r1
80031b0: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
80031b2: 78fb ldrb r3, [r7, #3]
80031b4: f003 0307 and.w r3, r3, #7
80031b8: 687a ldr r2, [r7, #4]
80031ba: 7912 ldrb r2, [r2, #4]
80031bc: 4293 cmp r3, r2
80031be: d901 bls.n 80031c4 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
80031c0: 2301 movs r3, #1
80031c2: e04c b.n 800325e <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
80031c4: f997 3003 ldrsb.w r3, [r7, #3]
80031c8: 2b00 cmp r3, #0
80031ca: da0e bge.n 80031ea <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80031cc: 78fb ldrb r3, [r7, #3]
80031ce: f003 0207 and.w r2, r3, #7
80031d2: 4613 mov r3, r2
80031d4: 009b lsls r3, r3, #2
80031d6: 4413 add r3, r2
80031d8: 00db lsls r3, r3, #3
80031da: 3310 adds r3, #16
80031dc: 687a ldr r2, [r7, #4]
80031de: 4413 add r3, r2
80031e0: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80031e2: 68fb ldr r3, [r7, #12]
80031e4: 2201 movs r2, #1
80031e6: 705a strb r2, [r3, #1]
80031e8: e00c b.n 8003204 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
80031ea: 78fa ldrb r2, [r7, #3]
80031ec: 4613 mov r3, r2
80031ee: 009b lsls r3, r3, #2
80031f0: 4413 add r3, r2
80031f2: 00db lsls r3, r3, #3
80031f4: f503 73a8 add.w r3, r3, #336 @ 0x150
80031f8: 687a ldr r2, [r7, #4]
80031fa: 4413 add r3, r2
80031fc: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80031fe: 68fb ldr r3, [r7, #12]
8003200: 2200 movs r2, #0
8003202: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8003204: 68fb ldr r3, [r7, #12]
8003206: 2201 movs r2, #1
8003208: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
800320a: 78fb ldrb r3, [r7, #3]
800320c: f003 0307 and.w r3, r3, #7
8003210: b2da uxtb r2, r3
8003212: 68fb ldr r3, [r7, #12]
8003214: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8003216: 687b ldr r3, [r7, #4]
8003218: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
800321c: 2b01 cmp r3, #1
800321e: d101 bne.n 8003224 <HAL_PCD_EP_SetStall+0x7e>
8003220: 2302 movs r3, #2
8003222: e01c b.n 800325e <HAL_PCD_EP_SetStall+0xb8>
8003224: 687b ldr r3, [r7, #4]
8003226: 2201 movs r2, #1
8003228: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
800322c: 687b ldr r3, [r7, #4]
800322e: 681b ldr r3, [r3, #0]
8003230: 68f9 ldr r1, [r7, #12]
8003232: 4618 mov r0, r3
8003234: f004 ff59 bl 80080ea <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8003238: 78fb ldrb r3, [r7, #3]
800323a: f003 0307 and.w r3, r3, #7
800323e: 2b00 cmp r3, #0
8003240: d108 bne.n 8003254 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
8003242: 687b ldr r3, [r7, #4]
8003244: 681a ldr r2, [r3, #0]
8003246: 687b ldr r3, [r7, #4]
8003248: f503 7326 add.w r3, r3, #664 @ 0x298
800324c: 4619 mov r1, r3
800324e: 4610 mov r0, r2
8003250: f005 f87e bl 8008350 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8003254: 687b ldr r3, [r7, #4]
8003256: 2200 movs r2, #0
8003258: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
800325c: 2300 movs r3, #0
}
800325e: 4618 mov r0, r3
8003260: 3710 adds r7, #16
8003262: 46bd mov sp, r7
8003264: bd80 pop {r7, pc}
08003266 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8003266: b580 push {r7, lr}
8003268: b084 sub sp, #16
800326a: af00 add r7, sp, #0
800326c: 6078 str r0, [r7, #4]
800326e: 460b mov r3, r1
8003270: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8003272: 78fb ldrb r3, [r7, #3]
8003274: f003 030f and.w r3, r3, #15
8003278: 687a ldr r2, [r7, #4]
800327a: 7912 ldrb r2, [r2, #4]
800327c: 4293 cmp r3, r2
800327e: d901 bls.n 8003284 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8003280: 2301 movs r3, #1
8003282: e040 b.n 8003306 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8003284: f997 3003 ldrsb.w r3, [r7, #3]
8003288: 2b00 cmp r3, #0
800328a: da0e bge.n 80032aa <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800328c: 78fb ldrb r3, [r7, #3]
800328e: f003 0207 and.w r2, r3, #7
8003292: 4613 mov r3, r2
8003294: 009b lsls r3, r3, #2
8003296: 4413 add r3, r2
8003298: 00db lsls r3, r3, #3
800329a: 3310 adds r3, #16
800329c: 687a ldr r2, [r7, #4]
800329e: 4413 add r3, r2
80032a0: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80032a2: 68fb ldr r3, [r7, #12]
80032a4: 2201 movs r2, #1
80032a6: 705a strb r2, [r3, #1]
80032a8: e00e b.n 80032c8 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80032aa: 78fb ldrb r3, [r7, #3]
80032ac: f003 0207 and.w r2, r3, #7
80032b0: 4613 mov r3, r2
80032b2: 009b lsls r3, r3, #2
80032b4: 4413 add r3, r2
80032b6: 00db lsls r3, r3, #3
80032b8: f503 73a8 add.w r3, r3, #336 @ 0x150
80032bc: 687a ldr r2, [r7, #4]
80032be: 4413 add r3, r2
80032c0: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80032c2: 68fb ldr r3, [r7, #12]
80032c4: 2200 movs r2, #0
80032c6: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
80032c8: 68fb ldr r3, [r7, #12]
80032ca: 2200 movs r2, #0
80032cc: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
80032ce: 78fb ldrb r3, [r7, #3]
80032d0: f003 0307 and.w r3, r3, #7
80032d4: b2da uxtb r2, r3
80032d6: 68fb ldr r3, [r7, #12]
80032d8: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80032da: 687b ldr r3, [r7, #4]
80032dc: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80032e0: 2b01 cmp r3, #1
80032e2: d101 bne.n 80032e8 <HAL_PCD_EP_ClrStall+0x82>
80032e4: 2302 movs r3, #2
80032e6: e00e b.n 8003306 <HAL_PCD_EP_ClrStall+0xa0>
80032e8: 687b ldr r3, [r7, #4]
80032ea: 2201 movs r2, #1
80032ec: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
80032f0: 687b ldr r3, [r7, #4]
80032f2: 681b ldr r3, [r3, #0]
80032f4: 68f9 ldr r1, [r7, #12]
80032f6: 4618 mov r0, r3
80032f8: f004 ff47 bl 800818a <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
80032fc: 687b ldr r3, [r7, #4]
80032fe: 2200 movs r2, #0
8003300: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8003304: 2300 movs r3, #0
}
8003306: 4618 mov r0, r3
8003308: 3710 adds r7, #16
800330a: 46bd mov sp, r7
800330c: bd80 pop {r7, pc}
0800330e <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
800330e: b580 push {r7, lr}
8003310: b096 sub sp, #88 @ 0x58
8003312: af00 add r7, sp, #0
8003314: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8003316: e3bb b.n 8003a90 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8003318: 687b ldr r3, [r7, #4]
800331a: 681b ldr r3, [r3, #0]
800331c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8003320: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
8003324: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8003328: b2db uxtb r3, r3
800332a: f003 030f and.w r3, r3, #15
800332e: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
8003332: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8003336: 2b00 cmp r3, #0
8003338: f040 8175 bne.w 8003626 <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
800333c: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8003340: f003 0310 and.w r3, r3, #16
8003344: 2b00 cmp r3, #0
8003346: d14e bne.n 80033e6 <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8003348: 687b ldr r3, [r7, #4]
800334a: 681b ldr r3, [r3, #0]
800334c: 881b ldrh r3, [r3, #0]
800334e: b29b uxth r3, r3
8003350: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8003354: f023 0370 bic.w r3, r3, #112 @ 0x70
8003358: 81fb strh r3, [r7, #14]
800335a: 687b ldr r3, [r7, #4]
800335c: 681a ldr r2, [r3, #0]
800335e: 89fb ldrh r3, [r7, #14]
8003360: ea6f 4343 mvn.w r3, r3, lsl #17
8003364: ea6f 4353 mvn.w r3, r3, lsr #17
8003368: b29b uxth r3, r3
800336a: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
800336c: 687b ldr r3, [r7, #4]
800336e: 3310 adds r3, #16
8003370: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8003372: 687b ldr r3, [r7, #4]
8003374: 681b ldr r3, [r3, #0]
8003376: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800337a: b29b uxth r3, r3
800337c: 461a mov r2, r3
800337e: 6d7b ldr r3, [r7, #84] @ 0x54
8003380: 781b ldrb r3, [r3, #0]
8003382: 00db lsls r3, r3, #3
8003384: 4413 add r3, r2
8003386: 3302 adds r3, #2
8003388: 005b lsls r3, r3, #1
800338a: 687a ldr r2, [r7, #4]
800338c: 6812 ldr r2, [r2, #0]
800338e: 4413 add r3, r2
8003390: f503 6380 add.w r3, r3, #1024 @ 0x400
8003394: 881b ldrh r3, [r3, #0]
8003396: f3c3 0209 ubfx r2, r3, #0, #10
800339a: 6d7b ldr r3, [r7, #84] @ 0x54
800339c: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
800339e: 6d7b ldr r3, [r7, #84] @ 0x54
80033a0: 695a ldr r2, [r3, #20]
80033a2: 6d7b ldr r3, [r7, #84] @ 0x54
80033a4: 69db ldr r3, [r3, #28]
80033a6: 441a add r2, r3
80033a8: 6d7b ldr r3, [r7, #84] @ 0x54
80033aa: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
80033ac: 2100 movs r1, #0
80033ae: 6878 ldr r0, [r7, #4]
80033b0: f006 fe9d bl 800a0ee <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
80033b4: 687b ldr r3, [r7, #4]
80033b6: 7b5b ldrb r3, [r3, #13]
80033b8: b2db uxtb r3, r3
80033ba: 2b00 cmp r3, #0
80033bc: f000 8368 beq.w 8003a90 <PCD_EP_ISR_Handler+0x782>
80033c0: 6d7b ldr r3, [r7, #84] @ 0x54
80033c2: 699b ldr r3, [r3, #24]
80033c4: 2b00 cmp r3, #0
80033c6: f040 8363 bne.w 8003a90 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
80033ca: 687b ldr r3, [r7, #4]
80033cc: 7b5b ldrb r3, [r3, #13]
80033ce: b2db uxtb r3, r3
80033d0: f063 037f orn r3, r3, #127 @ 0x7f
80033d4: b2da uxtb r2, r3
80033d6: 687b ldr r3, [r7, #4]
80033d8: 681b ldr r3, [r3, #0]
80033da: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
80033de: 687b ldr r3, [r7, #4]
80033e0: 2200 movs r2, #0
80033e2: 735a strb r2, [r3, #13]
80033e4: e354 b.n 8003a90 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
80033e6: 687b ldr r3, [r7, #4]
80033e8: f503 73a8 add.w r3, r3, #336 @ 0x150
80033ec: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
80033ee: 687b ldr r3, [r7, #4]
80033f0: 681b ldr r3, [r3, #0]
80033f2: 881b ldrh r3, [r3, #0]
80033f4: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
80033f8: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80033fc: f403 6300 and.w r3, r3, #2048 @ 0x800
8003400: 2b00 cmp r3, #0
8003402: d034 beq.n 800346e <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8003404: 687b ldr r3, [r7, #4]
8003406: 681b ldr r3, [r3, #0]
8003408: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800340c: b29b uxth r3, r3
800340e: 461a mov r2, r3
8003410: 6d7b ldr r3, [r7, #84] @ 0x54
8003412: 781b ldrb r3, [r3, #0]
8003414: 00db lsls r3, r3, #3
8003416: 4413 add r3, r2
8003418: 3306 adds r3, #6
800341a: 005b lsls r3, r3, #1
800341c: 687a ldr r2, [r7, #4]
800341e: 6812 ldr r2, [r2, #0]
8003420: 4413 add r3, r2
8003422: f503 6380 add.w r3, r3, #1024 @ 0x400
8003426: 881b ldrh r3, [r3, #0]
8003428: f3c3 0209 ubfx r2, r3, #0, #10
800342c: 6d7b ldr r3, [r7, #84] @ 0x54
800342e: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8003430: 687b ldr r3, [r7, #4]
8003432: 6818 ldr r0, [r3, #0]
8003434: 687b ldr r3, [r7, #4]
8003436: f503 7126 add.w r1, r3, #664 @ 0x298
800343a: 6d7b ldr r3, [r7, #84] @ 0x54
800343c: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
800343e: 6d7b ldr r3, [r7, #84] @ 0x54
8003440: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8003442: b29b uxth r3, r3
8003444: f004 ffd5 bl 80083f2 <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8003448: 687b ldr r3, [r7, #4]
800344a: 681b ldr r3, [r3, #0]
800344c: 881b ldrh r3, [r3, #0]
800344e: b29a uxth r2, r3
8003450: f640 738f movw r3, #3983 @ 0xf8f
8003454: 4013 ands r3, r2
8003456: 823b strh r3, [r7, #16]
8003458: 687b ldr r3, [r7, #4]
800345a: 681b ldr r3, [r3, #0]
800345c: 8a3a ldrh r2, [r7, #16]
800345e: f042 0280 orr.w r2, r2, #128 @ 0x80
8003462: b292 uxth r2, r2
8003464: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8003466: 6878 ldr r0, [r7, #4]
8003468: f006 fe14 bl 800a094 <HAL_PCD_SetupStageCallback>
800346c: e310 b.n 8003a90 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
800346e: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8003472: 2b00 cmp r3, #0
8003474: f280 830c bge.w 8003a90 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8003478: 687b ldr r3, [r7, #4]
800347a: 681b ldr r3, [r3, #0]
800347c: 881b ldrh r3, [r3, #0]
800347e: b29a uxth r2, r3
8003480: f640 738f movw r3, #3983 @ 0xf8f
8003484: 4013 ands r3, r2
8003486: 83fb strh r3, [r7, #30]
8003488: 687b ldr r3, [r7, #4]
800348a: 681b ldr r3, [r3, #0]
800348c: 8bfa ldrh r2, [r7, #30]
800348e: f042 0280 orr.w r2, r2, #128 @ 0x80
8003492: b292 uxth r2, r2
8003494: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8003496: 687b ldr r3, [r7, #4]
8003498: 681b ldr r3, [r3, #0]
800349a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800349e: b29b uxth r3, r3
80034a0: 461a mov r2, r3
80034a2: 6d7b ldr r3, [r7, #84] @ 0x54
80034a4: 781b ldrb r3, [r3, #0]
80034a6: 00db lsls r3, r3, #3
80034a8: 4413 add r3, r2
80034aa: 3306 adds r3, #6
80034ac: 005b lsls r3, r3, #1
80034ae: 687a ldr r2, [r7, #4]
80034b0: 6812 ldr r2, [r2, #0]
80034b2: 4413 add r3, r2
80034b4: f503 6380 add.w r3, r3, #1024 @ 0x400
80034b8: 881b ldrh r3, [r3, #0]
80034ba: f3c3 0209 ubfx r2, r3, #0, #10
80034be: 6d7b ldr r3, [r7, #84] @ 0x54
80034c0: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
80034c2: 6d7b ldr r3, [r7, #84] @ 0x54
80034c4: 69db ldr r3, [r3, #28]
80034c6: 2b00 cmp r3, #0
80034c8: d019 beq.n 80034fe <PCD_EP_ISR_Handler+0x1f0>
80034ca: 6d7b ldr r3, [r7, #84] @ 0x54
80034cc: 695b ldr r3, [r3, #20]
80034ce: 2b00 cmp r3, #0
80034d0: d015 beq.n 80034fe <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
80034d2: 687b ldr r3, [r7, #4]
80034d4: 6818 ldr r0, [r3, #0]
80034d6: 6d7b ldr r3, [r7, #84] @ 0x54
80034d8: 6959 ldr r1, [r3, #20]
80034da: 6d7b ldr r3, [r7, #84] @ 0x54
80034dc: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
80034de: 6d7b ldr r3, [r7, #84] @ 0x54
80034e0: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
80034e2: b29b uxth r3, r3
80034e4: f004 ff85 bl 80083f2 <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
80034e8: 6d7b ldr r3, [r7, #84] @ 0x54
80034ea: 695a ldr r2, [r3, #20]
80034ec: 6d7b ldr r3, [r7, #84] @ 0x54
80034ee: 69db ldr r3, [r3, #28]
80034f0: 441a add r2, r3
80034f2: 6d7b ldr r3, [r7, #84] @ 0x54
80034f4: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
80034f6: 2100 movs r1, #0
80034f8: 6878 ldr r0, [r7, #4]
80034fa: f006 fddd bl 800a0b8 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
80034fe: 687b ldr r3, [r7, #4]
8003500: 681b ldr r3, [r3, #0]
8003502: 881b ldrh r3, [r3, #0]
8003504: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8003508: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800350c: f403 6300 and.w r3, r3, #2048 @ 0x800
8003510: 2b00 cmp r3, #0
8003512: f040 82bd bne.w 8003a90 <PCD_EP_ISR_Handler+0x782>
8003516: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800351a: f403 5340 and.w r3, r3, #12288 @ 0x3000
800351e: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
8003522: f000 82b5 beq.w 8003a90 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
8003526: 687b ldr r3, [r7, #4]
8003528: 681b ldr r3, [r3, #0]
800352a: 61bb str r3, [r7, #24]
800352c: 687b ldr r3, [r7, #4]
800352e: 681b ldr r3, [r3, #0]
8003530: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003534: b29b uxth r3, r3
8003536: 461a mov r2, r3
8003538: 69bb ldr r3, [r7, #24]
800353a: 4413 add r3, r2
800353c: 61bb str r3, [r7, #24]
800353e: 69bb ldr r3, [r7, #24]
8003540: f203 430c addw r3, r3, #1036 @ 0x40c
8003544: 617b str r3, [r7, #20]
8003546: 697b ldr r3, [r7, #20]
8003548: 881b ldrh r3, [r3, #0]
800354a: b29b uxth r3, r3
800354c: f3c3 0309 ubfx r3, r3, #0, #10
8003550: b29a uxth r2, r3
8003552: 697b ldr r3, [r7, #20]
8003554: 801a strh r2, [r3, #0]
8003556: 6d7b ldr r3, [r7, #84] @ 0x54
8003558: 691b ldr r3, [r3, #16]
800355a: 2b3e cmp r3, #62 @ 0x3e
800355c: d91d bls.n 800359a <PCD_EP_ISR_Handler+0x28c>
800355e: 6d7b ldr r3, [r7, #84] @ 0x54
8003560: 691b ldr r3, [r3, #16]
8003562: 095b lsrs r3, r3, #5
8003564: 647b str r3, [r7, #68] @ 0x44
8003566: 6d7b ldr r3, [r7, #84] @ 0x54
8003568: 691b ldr r3, [r3, #16]
800356a: f003 031f and.w r3, r3, #31
800356e: 2b00 cmp r3, #0
8003570: d102 bne.n 8003578 <PCD_EP_ISR_Handler+0x26a>
8003572: 6c7b ldr r3, [r7, #68] @ 0x44
8003574: 3b01 subs r3, #1
8003576: 647b str r3, [r7, #68] @ 0x44
8003578: 697b ldr r3, [r7, #20]
800357a: 881b ldrh r3, [r3, #0]
800357c: b29a uxth r2, r3
800357e: 6c7b ldr r3, [r7, #68] @ 0x44
8003580: b29b uxth r3, r3
8003582: 029b lsls r3, r3, #10
8003584: b29b uxth r3, r3
8003586: 4313 orrs r3, r2
8003588: b29b uxth r3, r3
800358a: ea6f 4343 mvn.w r3, r3, lsl #17
800358e: ea6f 4353 mvn.w r3, r3, lsr #17
8003592: b29a uxth r2, r3
8003594: 697b ldr r3, [r7, #20]
8003596: 801a strh r2, [r3, #0]
8003598: e026 b.n 80035e8 <PCD_EP_ISR_Handler+0x2da>
800359a: 6d7b ldr r3, [r7, #84] @ 0x54
800359c: 691b ldr r3, [r3, #16]
800359e: 2b00 cmp r3, #0
80035a0: d10a bne.n 80035b8 <PCD_EP_ISR_Handler+0x2aa>
80035a2: 697b ldr r3, [r7, #20]
80035a4: 881b ldrh r3, [r3, #0]
80035a6: b29b uxth r3, r3
80035a8: ea6f 4343 mvn.w r3, r3, lsl #17
80035ac: ea6f 4353 mvn.w r3, r3, lsr #17
80035b0: b29a uxth r2, r3
80035b2: 697b ldr r3, [r7, #20]
80035b4: 801a strh r2, [r3, #0]
80035b6: e017 b.n 80035e8 <PCD_EP_ISR_Handler+0x2da>
80035b8: 6d7b ldr r3, [r7, #84] @ 0x54
80035ba: 691b ldr r3, [r3, #16]
80035bc: 085b lsrs r3, r3, #1
80035be: 647b str r3, [r7, #68] @ 0x44
80035c0: 6d7b ldr r3, [r7, #84] @ 0x54
80035c2: 691b ldr r3, [r3, #16]
80035c4: f003 0301 and.w r3, r3, #1
80035c8: 2b00 cmp r3, #0
80035ca: d002 beq.n 80035d2 <PCD_EP_ISR_Handler+0x2c4>
80035cc: 6c7b ldr r3, [r7, #68] @ 0x44
80035ce: 3301 adds r3, #1
80035d0: 647b str r3, [r7, #68] @ 0x44
80035d2: 697b ldr r3, [r7, #20]
80035d4: 881b ldrh r3, [r3, #0]
80035d6: b29a uxth r2, r3
80035d8: 6c7b ldr r3, [r7, #68] @ 0x44
80035da: b29b uxth r3, r3
80035dc: 029b lsls r3, r3, #10
80035de: b29b uxth r3, r3
80035e0: 4313 orrs r3, r2
80035e2: b29a uxth r2, r3
80035e4: 697b ldr r3, [r7, #20]
80035e6: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
80035e8: 687b ldr r3, [r7, #4]
80035ea: 681b ldr r3, [r3, #0]
80035ec: 881b ldrh r3, [r3, #0]
80035ee: b29b uxth r3, r3
80035f0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80035f4: f023 0370 bic.w r3, r3, #112 @ 0x70
80035f8: 827b strh r3, [r7, #18]
80035fa: 8a7b ldrh r3, [r7, #18]
80035fc: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8003600: 827b strh r3, [r7, #18]
8003602: 8a7b ldrh r3, [r7, #18]
8003604: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8003608: 827b strh r3, [r7, #18]
800360a: 687b ldr r3, [r7, #4]
800360c: 681a ldr r2, [r3, #0]
800360e: 8a7b ldrh r3, [r7, #18]
8003610: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003614: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003618: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800361c: f043 0380 orr.w r3, r3, #128 @ 0x80
8003620: b29b uxth r3, r3
8003622: 8013 strh r3, [r2, #0]
8003624: e234 b.n 8003a90 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
8003626: 687b ldr r3, [r7, #4]
8003628: 681b ldr r3, [r3, #0]
800362a: 461a mov r2, r3
800362c: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8003630: 009b lsls r3, r3, #2
8003632: 4413 add r3, r2
8003634: 881b ldrh r3, [r3, #0]
8003636: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
800363a: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
800363e: 2b00 cmp r3, #0
8003640: f280 80fc bge.w 800383c <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
8003644: 687b ldr r3, [r7, #4]
8003646: 681b ldr r3, [r3, #0]
8003648: 461a mov r2, r3
800364a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800364e: 009b lsls r3, r3, #2
8003650: 4413 add r3, r2
8003652: 881b ldrh r3, [r3, #0]
8003654: b29a uxth r2, r3
8003656: f640 738f movw r3, #3983 @ 0xf8f
800365a: 4013 ands r3, r2
800365c: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8003660: 687b ldr r3, [r7, #4]
8003662: 681b ldr r3, [r3, #0]
8003664: 461a mov r2, r3
8003666: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800366a: 009b lsls r3, r3, #2
800366c: 4413 add r3, r2
800366e: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
8003672: f042 0280 orr.w r2, r2, #128 @ 0x80
8003676: b292 uxth r2, r2
8003678: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
800367a: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
800367e: 4613 mov r3, r2
8003680: 009b lsls r3, r3, #2
8003682: 4413 add r3, r2
8003684: 00db lsls r3, r3, #3
8003686: f503 73a8 add.w r3, r3, #336 @ 0x150
800368a: 687a ldr r2, [r7, #4]
800368c: 4413 add r3, r2
800368e: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8003690: 6d7b ldr r3, [r7, #84] @ 0x54
8003692: 7b1b ldrb r3, [r3, #12]
8003694: 2b00 cmp r3, #0
8003696: d125 bne.n 80036e4 <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8003698: 687b ldr r3, [r7, #4]
800369a: 681b ldr r3, [r3, #0]
800369c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80036a0: b29b uxth r3, r3
80036a2: 461a mov r2, r3
80036a4: 6d7b ldr r3, [r7, #84] @ 0x54
80036a6: 781b ldrb r3, [r3, #0]
80036a8: 00db lsls r3, r3, #3
80036aa: 4413 add r3, r2
80036ac: 3306 adds r3, #6
80036ae: 005b lsls r3, r3, #1
80036b0: 687a ldr r2, [r7, #4]
80036b2: 6812 ldr r2, [r2, #0]
80036b4: 4413 add r3, r2
80036b6: f503 6380 add.w r3, r3, #1024 @ 0x400
80036ba: 881b ldrh r3, [r3, #0]
80036bc: f3c3 0309 ubfx r3, r3, #0, #10
80036c0: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80036c4: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80036c8: 2b00 cmp r3, #0
80036ca: f000 8092 beq.w 80037f2 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
80036ce: 687b ldr r3, [r7, #4]
80036d0: 6818 ldr r0, [r3, #0]
80036d2: 6d7b ldr r3, [r7, #84] @ 0x54
80036d4: 6959 ldr r1, [r3, #20]
80036d6: 6d7b ldr r3, [r7, #84] @ 0x54
80036d8: 88da ldrh r2, [r3, #6]
80036da: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80036de: f004 fe88 bl 80083f2 <USB_ReadPMA>
80036e2: e086 b.n 80037f2 <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
80036e4: 6d7b ldr r3, [r7, #84] @ 0x54
80036e6: 78db ldrb r3, [r3, #3]
80036e8: 2b02 cmp r3, #2
80036ea: d10a bne.n 8003702 <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
80036ec: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80036f0: 461a mov r2, r3
80036f2: 6d79 ldr r1, [r7, #84] @ 0x54
80036f4: 6878 ldr r0, [r7, #4]
80036f6: f000 f9d9 bl 8003aac <HAL_PCD_EP_DB_Receive>
80036fa: 4603 mov r3, r0
80036fc: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
8003700: e077 b.n 80037f2 <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8003702: 687b ldr r3, [r7, #4]
8003704: 681b ldr r3, [r3, #0]
8003706: 461a mov r2, r3
8003708: 6d7b ldr r3, [r7, #84] @ 0x54
800370a: 781b ldrb r3, [r3, #0]
800370c: 009b lsls r3, r3, #2
800370e: 4413 add r3, r2
8003710: 881b ldrh r3, [r3, #0]
8003712: b29b uxth r3, r3
8003714: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003718: f023 0370 bic.w r3, r3, #112 @ 0x70
800371c: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
8003720: 687b ldr r3, [r7, #4]
8003722: 681b ldr r3, [r3, #0]
8003724: 461a mov r2, r3
8003726: 6d7b ldr r3, [r7, #84] @ 0x54
8003728: 781b ldrb r3, [r3, #0]
800372a: 009b lsls r3, r3, #2
800372c: 441a add r2, r3
800372e: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
8003732: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003736: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800373a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800373e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8003742: b29b uxth r3, r3
8003744: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
8003746: 687b ldr r3, [r7, #4]
8003748: 681b ldr r3, [r3, #0]
800374a: 461a mov r2, r3
800374c: 6d7b ldr r3, [r7, #84] @ 0x54
800374e: 781b ldrb r3, [r3, #0]
8003750: 009b lsls r3, r3, #2
8003752: 4413 add r3, r2
8003754: 881b ldrh r3, [r3, #0]
8003756: b29b uxth r3, r3
8003758: f403 4380 and.w r3, r3, #16384 @ 0x4000
800375c: 2b00 cmp r3, #0
800375e: d024 beq.n 80037aa <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8003760: 687b ldr r3, [r7, #4]
8003762: 681b ldr r3, [r3, #0]
8003764: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003768: b29b uxth r3, r3
800376a: 461a mov r2, r3
800376c: 6d7b ldr r3, [r7, #84] @ 0x54
800376e: 781b ldrb r3, [r3, #0]
8003770: 00db lsls r3, r3, #3
8003772: 4413 add r3, r2
8003774: 3302 adds r3, #2
8003776: 005b lsls r3, r3, #1
8003778: 687a ldr r2, [r7, #4]
800377a: 6812 ldr r2, [r2, #0]
800377c: 4413 add r3, r2
800377e: f503 6380 add.w r3, r3, #1024 @ 0x400
8003782: 881b ldrh r3, [r3, #0]
8003784: f3c3 0309 ubfx r3, r3, #0, #10
8003788: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800378c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8003790: 2b00 cmp r3, #0
8003792: d02e beq.n 80037f2 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8003794: 687b ldr r3, [r7, #4]
8003796: 6818 ldr r0, [r3, #0]
8003798: 6d7b ldr r3, [r7, #84] @ 0x54
800379a: 6959 ldr r1, [r3, #20]
800379c: 6d7b ldr r3, [r7, #84] @ 0x54
800379e: 891a ldrh r2, [r3, #8]
80037a0: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80037a4: f004 fe25 bl 80083f2 <USB_ReadPMA>
80037a8: e023 b.n 80037f2 <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80037aa: 687b ldr r3, [r7, #4]
80037ac: 681b ldr r3, [r3, #0]
80037ae: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80037b2: b29b uxth r3, r3
80037b4: 461a mov r2, r3
80037b6: 6d7b ldr r3, [r7, #84] @ 0x54
80037b8: 781b ldrb r3, [r3, #0]
80037ba: 00db lsls r3, r3, #3
80037bc: 4413 add r3, r2
80037be: 3306 adds r3, #6
80037c0: 005b lsls r3, r3, #1
80037c2: 687a ldr r2, [r7, #4]
80037c4: 6812 ldr r2, [r2, #0]
80037c6: 4413 add r3, r2
80037c8: f503 6380 add.w r3, r3, #1024 @ 0x400
80037cc: 881b ldrh r3, [r3, #0]
80037ce: f3c3 0309 ubfx r3, r3, #0, #10
80037d2: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80037d6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80037da: 2b00 cmp r3, #0
80037dc: d009 beq.n 80037f2 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
80037de: 687b ldr r3, [r7, #4]
80037e0: 6818 ldr r0, [r3, #0]
80037e2: 6d7b ldr r3, [r7, #84] @ 0x54
80037e4: 6959 ldr r1, [r3, #20]
80037e6: 6d7b ldr r3, [r7, #84] @ 0x54
80037e8: 895a ldrh r2, [r3, #10]
80037ea: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80037ee: f004 fe00 bl 80083f2 <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
80037f2: 6d7b ldr r3, [r7, #84] @ 0x54
80037f4: 69da ldr r2, [r3, #28]
80037f6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80037fa: 441a add r2, r3
80037fc: 6d7b ldr r3, [r7, #84] @ 0x54
80037fe: 61da str r2, [r3, #28]
ep->xfer_buff += count;
8003800: 6d7b ldr r3, [r7, #84] @ 0x54
8003802: 695a ldr r2, [r3, #20]
8003804: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8003808: 441a add r2, r3
800380a: 6d7b ldr r3, [r7, #84] @ 0x54
800380c: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
800380e: 6d7b ldr r3, [r7, #84] @ 0x54
8003810: 699b ldr r3, [r3, #24]
8003812: 2b00 cmp r3, #0
8003814: d005 beq.n 8003822 <PCD_EP_ISR_Handler+0x514>
8003816: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
800381a: 6d7b ldr r3, [r7, #84] @ 0x54
800381c: 691b ldr r3, [r3, #16]
800381e: 429a cmp r2, r3
8003820: d206 bcs.n 8003830 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
8003822: 6d7b ldr r3, [r7, #84] @ 0x54
8003824: 781b ldrb r3, [r3, #0]
8003826: 4619 mov r1, r3
8003828: 6878 ldr r0, [r7, #4]
800382a: f006 fc45 bl 800a0b8 <HAL_PCD_DataOutStageCallback>
800382e: e005 b.n 800383c <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8003830: 687b ldr r3, [r7, #4]
8003832: 681b ldr r3, [r3, #0]
8003834: 6d79 ldr r1, [r7, #84] @ 0x54
8003836: 4618 mov r0, r3
8003838: f003 f8a6 bl 8006988 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
800383c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8003840: f003 0380 and.w r3, r3, #128 @ 0x80
8003844: 2b00 cmp r3, #0
8003846: f000 8123 beq.w 8003a90 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
800384a: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
800384e: 4613 mov r3, r2
8003850: 009b lsls r3, r3, #2
8003852: 4413 add r3, r2
8003854: 00db lsls r3, r3, #3
8003856: 3310 adds r3, #16
8003858: 687a ldr r2, [r7, #4]
800385a: 4413 add r3, r2
800385c: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
800385e: 687b ldr r3, [r7, #4]
8003860: 681b ldr r3, [r3, #0]
8003862: 461a mov r2, r3
8003864: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8003868: 009b lsls r3, r3, #2
800386a: 4413 add r3, r2
800386c: 881b ldrh r3, [r3, #0]
800386e: b29b uxth r3, r3
8003870: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8003874: f023 0370 bic.w r3, r3, #112 @ 0x70
8003878: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
800387c: 687b ldr r3, [r7, #4]
800387e: 681b ldr r3, [r3, #0]
8003880: 461a mov r2, r3
8003882: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8003886: 009b lsls r3, r3, #2
8003888: 441a add r2, r3
800388a: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
800388e: ea6f 4343 mvn.w r3, r3, lsl #17
8003892: ea6f 4353 mvn.w r3, r3, lsr #17
8003896: b29b uxth r3, r3
8003898: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
800389a: 6d7b ldr r3, [r7, #84] @ 0x54
800389c: 78db ldrb r3, [r3, #3]
800389e: 2b01 cmp r3, #1
80038a0: f040 80a2 bne.w 80039e8 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
80038a4: 6d7b ldr r3, [r7, #84] @ 0x54
80038a6: 2200 movs r2, #0
80038a8: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
80038aa: 6d7b ldr r3, [r7, #84] @ 0x54
80038ac: 7b1b ldrb r3, [r3, #12]
80038ae: 2b00 cmp r3, #0
80038b0: f000 8093 beq.w 80039da <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80038b4: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80038b8: f003 0340 and.w r3, r3, #64 @ 0x40
80038bc: 2b00 cmp r3, #0
80038be: d046 beq.n 800394e <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80038c0: 6d7b ldr r3, [r7, #84] @ 0x54
80038c2: 785b ldrb r3, [r3, #1]
80038c4: 2b00 cmp r3, #0
80038c6: d126 bne.n 8003916 <PCD_EP_ISR_Handler+0x608>
80038c8: 687b ldr r3, [r7, #4]
80038ca: 681b ldr r3, [r3, #0]
80038cc: 627b str r3, [r7, #36] @ 0x24
80038ce: 687b ldr r3, [r7, #4]
80038d0: 681b ldr r3, [r3, #0]
80038d2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80038d6: b29b uxth r3, r3
80038d8: 461a mov r2, r3
80038da: 6a7b ldr r3, [r7, #36] @ 0x24
80038dc: 4413 add r3, r2
80038de: 627b str r3, [r7, #36] @ 0x24
80038e0: 6d7b ldr r3, [r7, #84] @ 0x54
80038e2: 781b ldrb r3, [r3, #0]
80038e4: 011a lsls r2, r3, #4
80038e6: 6a7b ldr r3, [r7, #36] @ 0x24
80038e8: 4413 add r3, r2
80038ea: f203 4304 addw r3, r3, #1028 @ 0x404
80038ee: 623b str r3, [r7, #32]
80038f0: 6a3b ldr r3, [r7, #32]
80038f2: 881b ldrh r3, [r3, #0]
80038f4: b29b uxth r3, r3
80038f6: f3c3 0309 ubfx r3, r3, #0, #10
80038fa: b29a uxth r2, r3
80038fc: 6a3b ldr r3, [r7, #32]
80038fe: 801a strh r2, [r3, #0]
8003900: 6a3b ldr r3, [r7, #32]
8003902: 881b ldrh r3, [r3, #0]
8003904: b29b uxth r3, r3
8003906: ea6f 4343 mvn.w r3, r3, lsl #17
800390a: ea6f 4353 mvn.w r3, r3, lsr #17
800390e: b29a uxth r2, r3
8003910: 6a3b ldr r3, [r7, #32]
8003912: 801a strh r2, [r3, #0]
8003914: e061 b.n 80039da <PCD_EP_ISR_Handler+0x6cc>
8003916: 6d7b ldr r3, [r7, #84] @ 0x54
8003918: 785b ldrb r3, [r3, #1]
800391a: 2b01 cmp r3, #1
800391c: d15d bne.n 80039da <PCD_EP_ISR_Handler+0x6cc>
800391e: 687b ldr r3, [r7, #4]
8003920: 681b ldr r3, [r3, #0]
8003922: 62fb str r3, [r7, #44] @ 0x2c
8003924: 687b ldr r3, [r7, #4]
8003926: 681b ldr r3, [r3, #0]
8003928: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800392c: b29b uxth r3, r3
800392e: 461a mov r2, r3
8003930: 6afb ldr r3, [r7, #44] @ 0x2c
8003932: 4413 add r3, r2
8003934: 62fb str r3, [r7, #44] @ 0x2c
8003936: 6d7b ldr r3, [r7, #84] @ 0x54
8003938: 781b ldrb r3, [r3, #0]
800393a: 011a lsls r2, r3, #4
800393c: 6afb ldr r3, [r7, #44] @ 0x2c
800393e: 4413 add r3, r2
8003940: f203 4304 addw r3, r3, #1028 @ 0x404
8003944: 62bb str r3, [r7, #40] @ 0x28
8003946: 6abb ldr r3, [r7, #40] @ 0x28
8003948: 2200 movs r2, #0
800394a: 801a strh r2, [r3, #0]
800394c: e045 b.n 80039da <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800394e: 687b ldr r3, [r7, #4]
8003950: 681b ldr r3, [r3, #0]
8003952: 63fb str r3, [r7, #60] @ 0x3c
8003954: 6d7b ldr r3, [r7, #84] @ 0x54
8003956: 785b ldrb r3, [r3, #1]
8003958: 2b00 cmp r3, #0
800395a: d126 bne.n 80039aa <PCD_EP_ISR_Handler+0x69c>
800395c: 687b ldr r3, [r7, #4]
800395e: 681b ldr r3, [r3, #0]
8003960: 637b str r3, [r7, #52] @ 0x34
8003962: 687b ldr r3, [r7, #4]
8003964: 681b ldr r3, [r3, #0]
8003966: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800396a: b29b uxth r3, r3
800396c: 461a mov r2, r3
800396e: 6b7b ldr r3, [r7, #52] @ 0x34
8003970: 4413 add r3, r2
8003972: 637b str r3, [r7, #52] @ 0x34
8003974: 6d7b ldr r3, [r7, #84] @ 0x54
8003976: 781b ldrb r3, [r3, #0]
8003978: 011a lsls r2, r3, #4
800397a: 6b7b ldr r3, [r7, #52] @ 0x34
800397c: 4413 add r3, r2
800397e: f203 430c addw r3, r3, #1036 @ 0x40c
8003982: 633b str r3, [r7, #48] @ 0x30
8003984: 6b3b ldr r3, [r7, #48] @ 0x30
8003986: 881b ldrh r3, [r3, #0]
8003988: b29b uxth r3, r3
800398a: f3c3 0309 ubfx r3, r3, #0, #10
800398e: b29a uxth r2, r3
8003990: 6b3b ldr r3, [r7, #48] @ 0x30
8003992: 801a strh r2, [r3, #0]
8003994: 6b3b ldr r3, [r7, #48] @ 0x30
8003996: 881b ldrh r3, [r3, #0]
8003998: b29b uxth r3, r3
800399a: ea6f 4343 mvn.w r3, r3, lsl #17
800399e: ea6f 4353 mvn.w r3, r3, lsr #17
80039a2: b29a uxth r2, r3
80039a4: 6b3b ldr r3, [r7, #48] @ 0x30
80039a6: 801a strh r2, [r3, #0]
80039a8: e017 b.n 80039da <PCD_EP_ISR_Handler+0x6cc>
80039aa: 6d7b ldr r3, [r7, #84] @ 0x54
80039ac: 785b ldrb r3, [r3, #1]
80039ae: 2b01 cmp r3, #1
80039b0: d113 bne.n 80039da <PCD_EP_ISR_Handler+0x6cc>
80039b2: 687b ldr r3, [r7, #4]
80039b4: 681b ldr r3, [r3, #0]
80039b6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80039ba: b29b uxth r3, r3
80039bc: 461a mov r2, r3
80039be: 6bfb ldr r3, [r7, #60] @ 0x3c
80039c0: 4413 add r3, r2
80039c2: 63fb str r3, [r7, #60] @ 0x3c
80039c4: 6d7b ldr r3, [r7, #84] @ 0x54
80039c6: 781b ldrb r3, [r3, #0]
80039c8: 011a lsls r2, r3, #4
80039ca: 6bfb ldr r3, [r7, #60] @ 0x3c
80039cc: 4413 add r3, r2
80039ce: f203 430c addw r3, r3, #1036 @ 0x40c
80039d2: 63bb str r3, [r7, #56] @ 0x38
80039d4: 6bbb ldr r3, [r7, #56] @ 0x38
80039d6: 2200 movs r2, #0
80039d8: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80039da: 6d7b ldr r3, [r7, #84] @ 0x54
80039dc: 781b ldrb r3, [r3, #0]
80039de: 4619 mov r1, r3
80039e0: 6878 ldr r0, [r7, #4]
80039e2: f006 fb84 bl 800a0ee <HAL_PCD_DataInStageCallback>
80039e6: e053 b.n 8003a90 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
80039e8: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80039ec: f403 7380 and.w r3, r3, #256 @ 0x100
80039f0: 2b00 cmp r3, #0
80039f2: d146 bne.n 8003a82 <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
80039f4: 687b ldr r3, [r7, #4]
80039f6: 681b ldr r3, [r3, #0]
80039f8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80039fc: b29b uxth r3, r3
80039fe: 461a mov r2, r3
8003a00: 6d7b ldr r3, [r7, #84] @ 0x54
8003a02: 781b ldrb r3, [r3, #0]
8003a04: 00db lsls r3, r3, #3
8003a06: 4413 add r3, r2
8003a08: 3302 adds r3, #2
8003a0a: 005b lsls r3, r3, #1
8003a0c: 687a ldr r2, [r7, #4]
8003a0e: 6812 ldr r2, [r2, #0]
8003a10: 4413 add r3, r2
8003a12: f503 6380 add.w r3, r3, #1024 @ 0x400
8003a16: 881b ldrh r3, [r3, #0]
8003a18: f3c3 0309 ubfx r3, r3, #0, #10
8003a1c: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8003a20: 6d7b ldr r3, [r7, #84] @ 0x54
8003a22: 699a ldr r2, [r3, #24]
8003a24: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8003a28: 429a cmp r2, r3
8003a2a: d907 bls.n 8003a3c <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
8003a2c: 6d7b ldr r3, [r7, #84] @ 0x54
8003a2e: 699a ldr r2, [r3, #24]
8003a30: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8003a34: 1ad2 subs r2, r2, r3
8003a36: 6d7b ldr r3, [r7, #84] @ 0x54
8003a38: 619a str r2, [r3, #24]
8003a3a: e002 b.n 8003a42 <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
8003a3c: 6d7b ldr r3, [r7, #84] @ 0x54
8003a3e: 2200 movs r2, #0
8003a40: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8003a42: 6d7b ldr r3, [r7, #84] @ 0x54
8003a44: 699b ldr r3, [r3, #24]
8003a46: 2b00 cmp r3, #0
8003a48: d106 bne.n 8003a58 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8003a4a: 6d7b ldr r3, [r7, #84] @ 0x54
8003a4c: 781b ldrb r3, [r3, #0]
8003a4e: 4619 mov r1, r3
8003a50: 6878 ldr r0, [r7, #4]
8003a52: f006 fb4c bl 800a0ee <HAL_PCD_DataInStageCallback>
8003a56: e01b b.n 8003a90 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
8003a58: 6d7b ldr r3, [r7, #84] @ 0x54
8003a5a: 695a ldr r2, [r3, #20]
8003a5c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8003a60: 441a add r2, r3
8003a62: 6d7b ldr r3, [r7, #84] @ 0x54
8003a64: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8003a66: 6d7b ldr r3, [r7, #84] @ 0x54
8003a68: 69da ldr r2, [r3, #28]
8003a6a: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8003a6e: 441a add r2, r3
8003a70: 6d7b ldr r3, [r7, #84] @ 0x54
8003a72: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8003a74: 687b ldr r3, [r7, #4]
8003a76: 681b ldr r3, [r3, #0]
8003a78: 6d79 ldr r1, [r7, #84] @ 0x54
8003a7a: 4618 mov r0, r3
8003a7c: f002 ff84 bl 8006988 <USB_EPStartXfer>
8003a80: e006 b.n 8003a90 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8003a82: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8003a86: 461a mov r2, r3
8003a88: 6d79 ldr r1, [r7, #84] @ 0x54
8003a8a: 6878 ldr r0, [r7, #4]
8003a8c: f000 f91b bl 8003cc6 <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8003a90: 687b ldr r3, [r7, #4]
8003a92: 681b ldr r3, [r3, #0]
8003a94: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8003a98: b29b uxth r3, r3
8003a9a: b21b sxth r3, r3
8003a9c: 2b00 cmp r3, #0
8003a9e: f6ff ac3b blt.w 8003318 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8003aa2: 2300 movs r3, #0
}
8003aa4: 4618 mov r0, r3
8003aa6: 3758 adds r7, #88 @ 0x58
8003aa8: 46bd mov sp, r7
8003aaa: bd80 pop {r7, pc}
08003aac <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8003aac: b580 push {r7, lr}
8003aae: b088 sub sp, #32
8003ab0: af00 add r7, sp, #0
8003ab2: 60f8 str r0, [r7, #12]
8003ab4: 60b9 str r1, [r7, #8]
8003ab6: 4613 mov r3, r2
8003ab8: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8003aba: 88fb ldrh r3, [r7, #6]
8003abc: f403 4380 and.w r3, r3, #16384 @ 0x4000
8003ac0: 2b00 cmp r3, #0
8003ac2: d07e beq.n 8003bc2 <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8003ac4: 68fb ldr r3, [r7, #12]
8003ac6: 681b ldr r3, [r3, #0]
8003ac8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003acc: b29b uxth r3, r3
8003ace: 461a mov r2, r3
8003ad0: 68bb ldr r3, [r7, #8]
8003ad2: 781b ldrb r3, [r3, #0]
8003ad4: 00db lsls r3, r3, #3
8003ad6: 4413 add r3, r2
8003ad8: 3302 adds r3, #2
8003ada: 005b lsls r3, r3, #1
8003adc: 68fa ldr r2, [r7, #12]
8003ade: 6812 ldr r2, [r2, #0]
8003ae0: 4413 add r3, r2
8003ae2: f503 6380 add.w r3, r3, #1024 @ 0x400
8003ae6: 881b ldrh r3, [r3, #0]
8003ae8: f3c3 0309 ubfx r3, r3, #0, #10
8003aec: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8003aee: 68bb ldr r3, [r7, #8]
8003af0: 699a ldr r2, [r3, #24]
8003af2: 8b7b ldrh r3, [r7, #26]
8003af4: 429a cmp r2, r3
8003af6: d306 bcc.n 8003b06 <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8003af8: 68bb ldr r3, [r7, #8]
8003afa: 699a ldr r2, [r3, #24]
8003afc: 8b7b ldrh r3, [r7, #26]
8003afe: 1ad2 subs r2, r2, r3
8003b00: 68bb ldr r3, [r7, #8]
8003b02: 619a str r2, [r3, #24]
8003b04: e002 b.n 8003b0c <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
8003b06: 68bb ldr r3, [r7, #8]
8003b08: 2200 movs r2, #0
8003b0a: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8003b0c: 68bb ldr r3, [r7, #8]
8003b0e: 699b ldr r3, [r3, #24]
8003b10: 2b00 cmp r3, #0
8003b12: d123 bne.n 8003b5c <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8003b14: 68fb ldr r3, [r7, #12]
8003b16: 681b ldr r3, [r3, #0]
8003b18: 461a mov r2, r3
8003b1a: 68bb ldr r3, [r7, #8]
8003b1c: 781b ldrb r3, [r3, #0]
8003b1e: 009b lsls r3, r3, #2
8003b20: 4413 add r3, r2
8003b22: 881b ldrh r3, [r3, #0]
8003b24: b29b uxth r3, r3
8003b26: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8003b2a: f023 0370 bic.w r3, r3, #112 @ 0x70
8003b2e: 833b strh r3, [r7, #24]
8003b30: 8b3b ldrh r3, [r7, #24]
8003b32: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8003b36: 833b strh r3, [r7, #24]
8003b38: 68fb ldr r3, [r7, #12]
8003b3a: 681b ldr r3, [r3, #0]
8003b3c: 461a mov r2, r3
8003b3e: 68bb ldr r3, [r7, #8]
8003b40: 781b ldrb r3, [r3, #0]
8003b42: 009b lsls r3, r3, #2
8003b44: 441a add r2, r3
8003b46: 8b3b ldrh r3, [r7, #24]
8003b48: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003b4c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003b50: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003b54: f043 0380 orr.w r3, r3, #128 @ 0x80
8003b58: b29b uxth r3, r3
8003b5a: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8003b5c: 88fb ldrh r3, [r7, #6]
8003b5e: f003 0340 and.w r3, r3, #64 @ 0x40
8003b62: 2b00 cmp r3, #0
8003b64: d01f beq.n 8003ba6 <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8003b66: 68fb ldr r3, [r7, #12]
8003b68: 681b ldr r3, [r3, #0]
8003b6a: 461a mov r2, r3
8003b6c: 68bb ldr r3, [r7, #8]
8003b6e: 781b ldrb r3, [r3, #0]
8003b70: 009b lsls r3, r3, #2
8003b72: 4413 add r3, r2
8003b74: 881b ldrh r3, [r3, #0]
8003b76: b29b uxth r3, r3
8003b78: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003b7c: f023 0370 bic.w r3, r3, #112 @ 0x70
8003b80: 82fb strh r3, [r7, #22]
8003b82: 68fb ldr r3, [r7, #12]
8003b84: 681b ldr r3, [r3, #0]
8003b86: 461a mov r2, r3
8003b88: 68bb ldr r3, [r7, #8]
8003b8a: 781b ldrb r3, [r3, #0]
8003b8c: 009b lsls r3, r3, #2
8003b8e: 441a add r2, r3
8003b90: 8afb ldrh r3, [r7, #22]
8003b92: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003b96: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003b9a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003b9e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8003ba2: b29b uxth r3, r3
8003ba4: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8003ba6: 8b7b ldrh r3, [r7, #26]
8003ba8: 2b00 cmp r3, #0
8003baa: f000 8087 beq.w 8003cbc <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8003bae: 68fb ldr r3, [r7, #12]
8003bb0: 6818 ldr r0, [r3, #0]
8003bb2: 68bb ldr r3, [r7, #8]
8003bb4: 6959 ldr r1, [r3, #20]
8003bb6: 68bb ldr r3, [r7, #8]
8003bb8: 891a ldrh r2, [r3, #8]
8003bba: 8b7b ldrh r3, [r7, #26]
8003bbc: f004 fc19 bl 80083f2 <USB_ReadPMA>
8003bc0: e07c b.n 8003cbc <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8003bc2: 68fb ldr r3, [r7, #12]
8003bc4: 681b ldr r3, [r3, #0]
8003bc6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003bca: b29b uxth r3, r3
8003bcc: 461a mov r2, r3
8003bce: 68bb ldr r3, [r7, #8]
8003bd0: 781b ldrb r3, [r3, #0]
8003bd2: 00db lsls r3, r3, #3
8003bd4: 4413 add r3, r2
8003bd6: 3306 adds r3, #6
8003bd8: 005b lsls r3, r3, #1
8003bda: 68fa ldr r2, [r7, #12]
8003bdc: 6812 ldr r2, [r2, #0]
8003bde: 4413 add r3, r2
8003be0: f503 6380 add.w r3, r3, #1024 @ 0x400
8003be4: 881b ldrh r3, [r3, #0]
8003be6: f3c3 0309 ubfx r3, r3, #0, #10
8003bea: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8003bec: 68bb ldr r3, [r7, #8]
8003bee: 699a ldr r2, [r3, #24]
8003bf0: 8b7b ldrh r3, [r7, #26]
8003bf2: 429a cmp r2, r3
8003bf4: d306 bcc.n 8003c04 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
8003bf6: 68bb ldr r3, [r7, #8]
8003bf8: 699a ldr r2, [r3, #24]
8003bfa: 8b7b ldrh r3, [r7, #26]
8003bfc: 1ad2 subs r2, r2, r3
8003bfe: 68bb ldr r3, [r7, #8]
8003c00: 619a str r2, [r3, #24]
8003c02: e002 b.n 8003c0a <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
8003c04: 68bb ldr r3, [r7, #8]
8003c06: 2200 movs r2, #0
8003c08: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8003c0a: 68bb ldr r3, [r7, #8]
8003c0c: 699b ldr r3, [r3, #24]
8003c0e: 2b00 cmp r3, #0
8003c10: d123 bne.n 8003c5a <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8003c12: 68fb ldr r3, [r7, #12]
8003c14: 681b ldr r3, [r3, #0]
8003c16: 461a mov r2, r3
8003c18: 68bb ldr r3, [r7, #8]
8003c1a: 781b ldrb r3, [r3, #0]
8003c1c: 009b lsls r3, r3, #2
8003c1e: 4413 add r3, r2
8003c20: 881b ldrh r3, [r3, #0]
8003c22: b29b uxth r3, r3
8003c24: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8003c28: f023 0370 bic.w r3, r3, #112 @ 0x70
8003c2c: 83fb strh r3, [r7, #30]
8003c2e: 8bfb ldrh r3, [r7, #30]
8003c30: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8003c34: 83fb strh r3, [r7, #30]
8003c36: 68fb ldr r3, [r7, #12]
8003c38: 681b ldr r3, [r3, #0]
8003c3a: 461a mov r2, r3
8003c3c: 68bb ldr r3, [r7, #8]
8003c3e: 781b ldrb r3, [r3, #0]
8003c40: 009b lsls r3, r3, #2
8003c42: 441a add r2, r3
8003c44: 8bfb ldrh r3, [r7, #30]
8003c46: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003c4a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003c4e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003c52: f043 0380 orr.w r3, r3, #128 @ 0x80
8003c56: b29b uxth r3, r3
8003c58: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
8003c5a: 88fb ldrh r3, [r7, #6]
8003c5c: f003 0340 and.w r3, r3, #64 @ 0x40
8003c60: 2b00 cmp r3, #0
8003c62: d11f bne.n 8003ca4 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8003c64: 68fb ldr r3, [r7, #12]
8003c66: 681b ldr r3, [r3, #0]
8003c68: 461a mov r2, r3
8003c6a: 68bb ldr r3, [r7, #8]
8003c6c: 781b ldrb r3, [r3, #0]
8003c6e: 009b lsls r3, r3, #2
8003c70: 4413 add r3, r2
8003c72: 881b ldrh r3, [r3, #0]
8003c74: b29b uxth r3, r3
8003c76: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003c7a: f023 0370 bic.w r3, r3, #112 @ 0x70
8003c7e: 83bb strh r3, [r7, #28]
8003c80: 68fb ldr r3, [r7, #12]
8003c82: 681b ldr r3, [r3, #0]
8003c84: 461a mov r2, r3
8003c86: 68bb ldr r3, [r7, #8]
8003c88: 781b ldrb r3, [r3, #0]
8003c8a: 009b lsls r3, r3, #2
8003c8c: 441a add r2, r3
8003c8e: 8bbb ldrh r3, [r7, #28]
8003c90: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003c94: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003c98: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8003c9c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8003ca0: b29b uxth r3, r3
8003ca2: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8003ca4: 8b7b ldrh r3, [r7, #26]
8003ca6: 2b00 cmp r3, #0
8003ca8: d008 beq.n 8003cbc <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8003caa: 68fb ldr r3, [r7, #12]
8003cac: 6818 ldr r0, [r3, #0]
8003cae: 68bb ldr r3, [r7, #8]
8003cb0: 6959 ldr r1, [r3, #20]
8003cb2: 68bb ldr r3, [r7, #8]
8003cb4: 895a ldrh r2, [r3, #10]
8003cb6: 8b7b ldrh r3, [r7, #26]
8003cb8: f004 fb9b bl 80083f2 <USB_ReadPMA>
}
}
return count;
8003cbc: 8b7b ldrh r3, [r7, #26]
}
8003cbe: 4618 mov r0, r3
8003cc0: 3720 adds r7, #32
8003cc2: 46bd mov sp, r7
8003cc4: bd80 pop {r7, pc}
08003cc6 <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8003cc6: b580 push {r7, lr}
8003cc8: b0a4 sub sp, #144 @ 0x90
8003cca: af00 add r7, sp, #0
8003ccc: 60f8 str r0, [r7, #12]
8003cce: 60b9 str r1, [r7, #8]
8003cd0: 4613 mov r3, r2
8003cd2: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8003cd4: 88fb ldrh r3, [r7, #6]
8003cd6: f003 0340 and.w r3, r3, #64 @ 0x40
8003cda: 2b00 cmp r3, #0
8003cdc: f000 81dd beq.w 800409a <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8003ce0: 68fb ldr r3, [r7, #12]
8003ce2: 681b ldr r3, [r3, #0]
8003ce4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003ce8: b29b uxth r3, r3
8003cea: 461a mov r2, r3
8003cec: 68bb ldr r3, [r7, #8]
8003cee: 781b ldrb r3, [r3, #0]
8003cf0: 00db lsls r3, r3, #3
8003cf2: 4413 add r3, r2
8003cf4: 3302 adds r3, #2
8003cf6: 005b lsls r3, r3, #1
8003cf8: 68fa ldr r2, [r7, #12]
8003cfa: 6812 ldr r2, [r2, #0]
8003cfc: 4413 add r3, r2
8003cfe: f503 6380 add.w r3, r3, #1024 @ 0x400
8003d02: 881b ldrh r3, [r3, #0]
8003d04: f3c3 0309 ubfx r3, r3, #0, #10
8003d08: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8003d0c: 68bb ldr r3, [r7, #8]
8003d0e: 699a ldr r2, [r3, #24]
8003d10: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003d14: 429a cmp r2, r3
8003d16: d907 bls.n 8003d28 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8003d18: 68bb ldr r3, [r7, #8]
8003d1a: 699a ldr r2, [r3, #24]
8003d1c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003d20: 1ad2 subs r2, r2, r3
8003d22: 68bb ldr r3, [r7, #8]
8003d24: 619a str r2, [r3, #24]
8003d26: e002 b.n 8003d2e <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8003d28: 68bb ldr r3, [r7, #8]
8003d2a: 2200 movs r2, #0
8003d2c: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8003d2e: 68bb ldr r3, [r7, #8]
8003d30: 699b ldr r3, [r3, #24]
8003d32: 2b00 cmp r3, #0
8003d34: f040 80b9 bne.w 8003eaa <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8003d38: 68bb ldr r3, [r7, #8]
8003d3a: 785b ldrb r3, [r3, #1]
8003d3c: 2b00 cmp r3, #0
8003d3e: d126 bne.n 8003d8e <HAL_PCD_EP_DB_Transmit+0xc8>
8003d40: 68fb ldr r3, [r7, #12]
8003d42: 681b ldr r3, [r3, #0]
8003d44: 62fb str r3, [r7, #44] @ 0x2c
8003d46: 68fb ldr r3, [r7, #12]
8003d48: 681b ldr r3, [r3, #0]
8003d4a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003d4e: b29b uxth r3, r3
8003d50: 461a mov r2, r3
8003d52: 6afb ldr r3, [r7, #44] @ 0x2c
8003d54: 4413 add r3, r2
8003d56: 62fb str r3, [r7, #44] @ 0x2c
8003d58: 68bb ldr r3, [r7, #8]
8003d5a: 781b ldrb r3, [r3, #0]
8003d5c: 011a lsls r2, r3, #4
8003d5e: 6afb ldr r3, [r7, #44] @ 0x2c
8003d60: 4413 add r3, r2
8003d62: f203 4304 addw r3, r3, #1028 @ 0x404
8003d66: 62bb str r3, [r7, #40] @ 0x28
8003d68: 6abb ldr r3, [r7, #40] @ 0x28
8003d6a: 881b ldrh r3, [r3, #0]
8003d6c: b29b uxth r3, r3
8003d6e: f3c3 0309 ubfx r3, r3, #0, #10
8003d72: b29a uxth r2, r3
8003d74: 6abb ldr r3, [r7, #40] @ 0x28
8003d76: 801a strh r2, [r3, #0]
8003d78: 6abb ldr r3, [r7, #40] @ 0x28
8003d7a: 881b ldrh r3, [r3, #0]
8003d7c: b29b uxth r3, r3
8003d7e: ea6f 4343 mvn.w r3, r3, lsl #17
8003d82: ea6f 4353 mvn.w r3, r3, lsr #17
8003d86: b29a uxth r2, r3
8003d88: 6abb ldr r3, [r7, #40] @ 0x28
8003d8a: 801a strh r2, [r3, #0]
8003d8c: e01a b.n 8003dc4 <HAL_PCD_EP_DB_Transmit+0xfe>
8003d8e: 68bb ldr r3, [r7, #8]
8003d90: 785b ldrb r3, [r3, #1]
8003d92: 2b01 cmp r3, #1
8003d94: d116 bne.n 8003dc4 <HAL_PCD_EP_DB_Transmit+0xfe>
8003d96: 68fb ldr r3, [r7, #12]
8003d98: 681b ldr r3, [r3, #0]
8003d9a: 637b str r3, [r7, #52] @ 0x34
8003d9c: 68fb ldr r3, [r7, #12]
8003d9e: 681b ldr r3, [r3, #0]
8003da0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003da4: b29b uxth r3, r3
8003da6: 461a mov r2, r3
8003da8: 6b7b ldr r3, [r7, #52] @ 0x34
8003daa: 4413 add r3, r2
8003dac: 637b str r3, [r7, #52] @ 0x34
8003dae: 68bb ldr r3, [r7, #8]
8003db0: 781b ldrb r3, [r3, #0]
8003db2: 011a lsls r2, r3, #4
8003db4: 6b7b ldr r3, [r7, #52] @ 0x34
8003db6: 4413 add r3, r2
8003db8: f203 4304 addw r3, r3, #1028 @ 0x404
8003dbc: 633b str r3, [r7, #48] @ 0x30
8003dbe: 6b3b ldr r3, [r7, #48] @ 0x30
8003dc0: 2200 movs r2, #0
8003dc2: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8003dc4: 68fb ldr r3, [r7, #12]
8003dc6: 681b ldr r3, [r3, #0]
8003dc8: 627b str r3, [r7, #36] @ 0x24
8003dca: 68bb ldr r3, [r7, #8]
8003dcc: 785b ldrb r3, [r3, #1]
8003dce: 2b00 cmp r3, #0
8003dd0: d126 bne.n 8003e20 <HAL_PCD_EP_DB_Transmit+0x15a>
8003dd2: 68fb ldr r3, [r7, #12]
8003dd4: 681b ldr r3, [r3, #0]
8003dd6: 61fb str r3, [r7, #28]
8003dd8: 68fb ldr r3, [r7, #12]
8003dda: 681b ldr r3, [r3, #0]
8003ddc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003de0: b29b uxth r3, r3
8003de2: 461a mov r2, r3
8003de4: 69fb ldr r3, [r7, #28]
8003de6: 4413 add r3, r2
8003de8: 61fb str r3, [r7, #28]
8003dea: 68bb ldr r3, [r7, #8]
8003dec: 781b ldrb r3, [r3, #0]
8003dee: 011a lsls r2, r3, #4
8003df0: 69fb ldr r3, [r7, #28]
8003df2: 4413 add r3, r2
8003df4: f203 430c addw r3, r3, #1036 @ 0x40c
8003df8: 61bb str r3, [r7, #24]
8003dfa: 69bb ldr r3, [r7, #24]
8003dfc: 881b ldrh r3, [r3, #0]
8003dfe: b29b uxth r3, r3
8003e00: f3c3 0309 ubfx r3, r3, #0, #10
8003e04: b29a uxth r2, r3
8003e06: 69bb ldr r3, [r7, #24]
8003e08: 801a strh r2, [r3, #0]
8003e0a: 69bb ldr r3, [r7, #24]
8003e0c: 881b ldrh r3, [r3, #0]
8003e0e: b29b uxth r3, r3
8003e10: ea6f 4343 mvn.w r3, r3, lsl #17
8003e14: ea6f 4353 mvn.w r3, r3, lsr #17
8003e18: b29a uxth r2, r3
8003e1a: 69bb ldr r3, [r7, #24]
8003e1c: 801a strh r2, [r3, #0]
8003e1e: e017 b.n 8003e50 <HAL_PCD_EP_DB_Transmit+0x18a>
8003e20: 68bb ldr r3, [r7, #8]
8003e22: 785b ldrb r3, [r3, #1]
8003e24: 2b01 cmp r3, #1
8003e26: d113 bne.n 8003e50 <HAL_PCD_EP_DB_Transmit+0x18a>
8003e28: 68fb ldr r3, [r7, #12]
8003e2a: 681b ldr r3, [r3, #0]
8003e2c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003e30: b29b uxth r3, r3
8003e32: 461a mov r2, r3
8003e34: 6a7b ldr r3, [r7, #36] @ 0x24
8003e36: 4413 add r3, r2
8003e38: 627b str r3, [r7, #36] @ 0x24
8003e3a: 68bb ldr r3, [r7, #8]
8003e3c: 781b ldrb r3, [r3, #0]
8003e3e: 011a lsls r2, r3, #4
8003e40: 6a7b ldr r3, [r7, #36] @ 0x24
8003e42: 4413 add r3, r2
8003e44: f203 430c addw r3, r3, #1036 @ 0x40c
8003e48: 623b str r3, [r7, #32]
8003e4a: 6a3b ldr r3, [r7, #32]
8003e4c: 2200 movs r2, #0
8003e4e: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8003e50: 68bb ldr r3, [r7, #8]
8003e52: 781b ldrb r3, [r3, #0]
8003e54: 4619 mov r1, r3
8003e56: 68f8 ldr r0, [r7, #12]
8003e58: f006 f949 bl 800a0ee <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8003e5c: 88fb ldrh r3, [r7, #6]
8003e5e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8003e62: 2b00 cmp r3, #0
8003e64: f000 82fc beq.w 8004460 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8003e68: 68fb ldr r3, [r7, #12]
8003e6a: 681b ldr r3, [r3, #0]
8003e6c: 461a mov r2, r3
8003e6e: 68bb ldr r3, [r7, #8]
8003e70: 781b ldrb r3, [r3, #0]
8003e72: 009b lsls r3, r3, #2
8003e74: 4413 add r3, r2
8003e76: 881b ldrh r3, [r3, #0]
8003e78: b29b uxth r3, r3
8003e7a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003e7e: f023 0370 bic.w r3, r3, #112 @ 0x70
8003e82: 82fb strh r3, [r7, #22]
8003e84: 68fb ldr r3, [r7, #12]
8003e86: 681b ldr r3, [r3, #0]
8003e88: 461a mov r2, r3
8003e8a: 68bb ldr r3, [r7, #8]
8003e8c: 781b ldrb r3, [r3, #0]
8003e8e: 009b lsls r3, r3, #2
8003e90: 441a add r2, r3
8003e92: 8afb ldrh r3, [r7, #22]
8003e94: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003e98: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003e9c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8003ea0: f043 0380 orr.w r3, r3, #128 @ 0x80
8003ea4: b29b uxth r3, r3
8003ea6: 8013 strh r3, [r2, #0]
8003ea8: e2da b.n 8004460 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8003eaa: 88fb ldrh r3, [r7, #6]
8003eac: f403 4380 and.w r3, r3, #16384 @ 0x4000
8003eb0: 2b00 cmp r3, #0
8003eb2: d021 beq.n 8003ef8 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8003eb4: 68fb ldr r3, [r7, #12]
8003eb6: 681b ldr r3, [r3, #0]
8003eb8: 461a mov r2, r3
8003eba: 68bb ldr r3, [r7, #8]
8003ebc: 781b ldrb r3, [r3, #0]
8003ebe: 009b lsls r3, r3, #2
8003ec0: 4413 add r3, r2
8003ec2: 881b ldrh r3, [r3, #0]
8003ec4: b29b uxth r3, r3
8003ec6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003eca: f023 0370 bic.w r3, r3, #112 @ 0x70
8003ece: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8003ed2: 68fb ldr r3, [r7, #12]
8003ed4: 681b ldr r3, [r3, #0]
8003ed6: 461a mov r2, r3
8003ed8: 68bb ldr r3, [r7, #8]
8003eda: 781b ldrb r3, [r3, #0]
8003edc: 009b lsls r3, r3, #2
8003ede: 441a add r2, r3
8003ee0: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8003ee4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8003ee8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8003eec: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8003ef0: f043 0380 orr.w r3, r3, #128 @ 0x80
8003ef4: b29b uxth r3, r3
8003ef6: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8003ef8: 68bb ldr r3, [r7, #8]
8003efa: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8003efe: 2b01 cmp r3, #1
8003f00: f040 82ae bne.w 8004460 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8003f04: 68bb ldr r3, [r7, #8]
8003f06: 695a ldr r2, [r3, #20]
8003f08: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003f0c: 441a add r2, r3
8003f0e: 68bb ldr r3, [r7, #8]
8003f10: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8003f12: 68bb ldr r3, [r7, #8]
8003f14: 69da ldr r2, [r3, #28]
8003f16: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003f1a: 441a add r2, r3
8003f1c: 68bb ldr r3, [r7, #8]
8003f1e: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8003f20: 68bb ldr r3, [r7, #8]
8003f22: 6a1a ldr r2, [r3, #32]
8003f24: 68bb ldr r3, [r7, #8]
8003f26: 691b ldr r3, [r3, #16]
8003f28: 429a cmp r2, r3
8003f2a: d30b bcc.n 8003f44 <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8003f2c: 68bb ldr r3, [r7, #8]
8003f2e: 691b ldr r3, [r3, #16]
8003f30: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8003f34: 68bb ldr r3, [r7, #8]
8003f36: 6a1a ldr r2, [r3, #32]
8003f38: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003f3c: 1ad2 subs r2, r2, r3
8003f3e: 68bb ldr r3, [r7, #8]
8003f40: 621a str r2, [r3, #32]
8003f42: e017 b.n 8003f74 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8003f44: 68bb ldr r3, [r7, #8]
8003f46: 6a1b ldr r3, [r3, #32]
8003f48: 2b00 cmp r3, #0
8003f4a: d108 bne.n 8003f5e <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8003f4c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8003f50: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8003f54: 68bb ldr r3, [r7, #8]
8003f56: 2200 movs r2, #0
8003f58: f883 2024 strb.w r2, [r3, #36] @ 0x24
8003f5c: e00a b.n 8003f74 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8003f5e: 68bb ldr r3, [r7, #8]
8003f60: 2200 movs r2, #0
8003f62: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8003f66: 68bb ldr r3, [r7, #8]
8003f68: 6a1b ldr r3, [r3, #32]
8003f6a: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8003f6e: 68bb ldr r3, [r7, #8]
8003f70: 2200 movs r2, #0
8003f72: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8003f74: 68bb ldr r3, [r7, #8]
8003f76: 785b ldrb r3, [r3, #1]
8003f78: 2b00 cmp r3, #0
8003f7a: d165 bne.n 8004048 <HAL_PCD_EP_DB_Transmit+0x382>
8003f7c: 68fb ldr r3, [r7, #12]
8003f7e: 681b ldr r3, [r3, #0]
8003f80: 63fb str r3, [r7, #60] @ 0x3c
8003f82: 68fb ldr r3, [r7, #12]
8003f84: 681b ldr r3, [r3, #0]
8003f86: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8003f8a: b29b uxth r3, r3
8003f8c: 461a mov r2, r3
8003f8e: 6bfb ldr r3, [r7, #60] @ 0x3c
8003f90: 4413 add r3, r2
8003f92: 63fb str r3, [r7, #60] @ 0x3c
8003f94: 68bb ldr r3, [r7, #8]
8003f96: 781b ldrb r3, [r3, #0]
8003f98: 011a lsls r2, r3, #4
8003f9a: 6bfb ldr r3, [r7, #60] @ 0x3c
8003f9c: 4413 add r3, r2
8003f9e: f203 4304 addw r3, r3, #1028 @ 0x404
8003fa2: 63bb str r3, [r7, #56] @ 0x38
8003fa4: 6bbb ldr r3, [r7, #56] @ 0x38
8003fa6: 881b ldrh r3, [r3, #0]
8003fa8: b29b uxth r3, r3
8003faa: f3c3 0309 ubfx r3, r3, #0, #10
8003fae: b29a uxth r2, r3
8003fb0: 6bbb ldr r3, [r7, #56] @ 0x38
8003fb2: 801a strh r2, [r3, #0]
8003fb4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003fb8: 2b3e cmp r3, #62 @ 0x3e
8003fba: d91d bls.n 8003ff8 <HAL_PCD_EP_DB_Transmit+0x332>
8003fbc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003fc0: 095b lsrs r3, r3, #5
8003fc2: 64bb str r3, [r7, #72] @ 0x48
8003fc4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003fc8: f003 031f and.w r3, r3, #31
8003fcc: 2b00 cmp r3, #0
8003fce: d102 bne.n 8003fd6 <HAL_PCD_EP_DB_Transmit+0x310>
8003fd0: 6cbb ldr r3, [r7, #72] @ 0x48
8003fd2: 3b01 subs r3, #1
8003fd4: 64bb str r3, [r7, #72] @ 0x48
8003fd6: 6bbb ldr r3, [r7, #56] @ 0x38
8003fd8: 881b ldrh r3, [r3, #0]
8003fda: b29a uxth r2, r3
8003fdc: 6cbb ldr r3, [r7, #72] @ 0x48
8003fde: b29b uxth r3, r3
8003fe0: 029b lsls r3, r3, #10
8003fe2: b29b uxth r3, r3
8003fe4: 4313 orrs r3, r2
8003fe6: b29b uxth r3, r3
8003fe8: ea6f 4343 mvn.w r3, r3, lsl #17
8003fec: ea6f 4353 mvn.w r3, r3, lsr #17
8003ff0: b29a uxth r2, r3
8003ff2: 6bbb ldr r3, [r7, #56] @ 0x38
8003ff4: 801a strh r2, [r3, #0]
8003ff6: e044 b.n 8004082 <HAL_PCD_EP_DB_Transmit+0x3bc>
8003ff8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8003ffc: 2b00 cmp r3, #0
8003ffe: d10a bne.n 8004016 <HAL_PCD_EP_DB_Transmit+0x350>
8004000: 6bbb ldr r3, [r7, #56] @ 0x38
8004002: 881b ldrh r3, [r3, #0]
8004004: b29b uxth r3, r3
8004006: ea6f 4343 mvn.w r3, r3, lsl #17
800400a: ea6f 4353 mvn.w r3, r3, lsr #17
800400e: b29a uxth r2, r3
8004010: 6bbb ldr r3, [r7, #56] @ 0x38
8004012: 801a strh r2, [r3, #0]
8004014: e035 b.n 8004082 <HAL_PCD_EP_DB_Transmit+0x3bc>
8004016: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800401a: 085b lsrs r3, r3, #1
800401c: 64bb str r3, [r7, #72] @ 0x48
800401e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004022: f003 0301 and.w r3, r3, #1
8004026: 2b00 cmp r3, #0
8004028: d002 beq.n 8004030 <HAL_PCD_EP_DB_Transmit+0x36a>
800402a: 6cbb ldr r3, [r7, #72] @ 0x48
800402c: 3301 adds r3, #1
800402e: 64bb str r3, [r7, #72] @ 0x48
8004030: 6bbb ldr r3, [r7, #56] @ 0x38
8004032: 881b ldrh r3, [r3, #0]
8004034: b29a uxth r2, r3
8004036: 6cbb ldr r3, [r7, #72] @ 0x48
8004038: b29b uxth r3, r3
800403a: 029b lsls r3, r3, #10
800403c: b29b uxth r3, r3
800403e: 4313 orrs r3, r2
8004040: b29a uxth r2, r3
8004042: 6bbb ldr r3, [r7, #56] @ 0x38
8004044: 801a strh r2, [r3, #0]
8004046: e01c b.n 8004082 <HAL_PCD_EP_DB_Transmit+0x3bc>
8004048: 68bb ldr r3, [r7, #8]
800404a: 785b ldrb r3, [r3, #1]
800404c: 2b01 cmp r3, #1
800404e: d118 bne.n 8004082 <HAL_PCD_EP_DB_Transmit+0x3bc>
8004050: 68fb ldr r3, [r7, #12]
8004052: 681b ldr r3, [r3, #0]
8004054: 647b str r3, [r7, #68] @ 0x44
8004056: 68fb ldr r3, [r7, #12]
8004058: 681b ldr r3, [r3, #0]
800405a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800405e: b29b uxth r3, r3
8004060: 461a mov r2, r3
8004062: 6c7b ldr r3, [r7, #68] @ 0x44
8004064: 4413 add r3, r2
8004066: 647b str r3, [r7, #68] @ 0x44
8004068: 68bb ldr r3, [r7, #8]
800406a: 781b ldrb r3, [r3, #0]
800406c: 011a lsls r2, r3, #4
800406e: 6c7b ldr r3, [r7, #68] @ 0x44
8004070: 4413 add r3, r2
8004072: f203 4304 addw r3, r3, #1028 @ 0x404
8004076: 643b str r3, [r7, #64] @ 0x40
8004078: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800407c: b29a uxth r2, r3
800407e: 6c3b ldr r3, [r7, #64] @ 0x40
8004080: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8004082: 68fb ldr r3, [r7, #12]
8004084: 6818 ldr r0, [r3, #0]
8004086: 68bb ldr r3, [r7, #8]
8004088: 6959 ldr r1, [r3, #20]
800408a: 68bb ldr r3, [r7, #8]
800408c: 891a ldrh r2, [r3, #8]
800408e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004092: b29b uxth r3, r3
8004094: f004 f967 bl 8008366 <USB_WritePMA>
8004098: e1e2 b.n 8004460 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800409a: 68fb ldr r3, [r7, #12]
800409c: 681b ldr r3, [r3, #0]
800409e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80040a2: b29b uxth r3, r3
80040a4: 461a mov r2, r3
80040a6: 68bb ldr r3, [r7, #8]
80040a8: 781b ldrb r3, [r3, #0]
80040aa: 00db lsls r3, r3, #3
80040ac: 4413 add r3, r2
80040ae: 3306 adds r3, #6
80040b0: 005b lsls r3, r3, #1
80040b2: 68fa ldr r2, [r7, #12]
80040b4: 6812 ldr r2, [r2, #0]
80040b6: 4413 add r3, r2
80040b8: f503 6380 add.w r3, r3, #1024 @ 0x400
80040bc: 881b ldrh r3, [r3, #0]
80040be: f3c3 0309 ubfx r3, r3, #0, #10
80040c2: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
80040c6: 68bb ldr r3, [r7, #8]
80040c8: 699a ldr r2, [r3, #24]
80040ca: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80040ce: 429a cmp r2, r3
80040d0: d307 bcc.n 80040e2 <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
80040d2: 68bb ldr r3, [r7, #8]
80040d4: 699a ldr r2, [r3, #24]
80040d6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80040da: 1ad2 subs r2, r2, r3
80040dc: 68bb ldr r3, [r7, #8]
80040de: 619a str r2, [r3, #24]
80040e0: e002 b.n 80040e8 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
80040e2: 68bb ldr r3, [r7, #8]
80040e4: 2200 movs r2, #0
80040e6: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
80040e8: 68bb ldr r3, [r7, #8]
80040ea: 699b ldr r3, [r3, #24]
80040ec: 2b00 cmp r3, #0
80040ee: f040 80c0 bne.w 8004272 <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80040f2: 68bb ldr r3, [r7, #8]
80040f4: 785b ldrb r3, [r3, #1]
80040f6: 2b00 cmp r3, #0
80040f8: d126 bne.n 8004148 <HAL_PCD_EP_DB_Transmit+0x482>
80040fa: 68fb ldr r3, [r7, #12]
80040fc: 681b ldr r3, [r3, #0]
80040fe: 67fb str r3, [r7, #124] @ 0x7c
8004100: 68fb ldr r3, [r7, #12]
8004102: 681b ldr r3, [r3, #0]
8004104: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004108: b29b uxth r3, r3
800410a: 461a mov r2, r3
800410c: 6ffb ldr r3, [r7, #124] @ 0x7c
800410e: 4413 add r3, r2
8004110: 67fb str r3, [r7, #124] @ 0x7c
8004112: 68bb ldr r3, [r7, #8]
8004114: 781b ldrb r3, [r3, #0]
8004116: 011a lsls r2, r3, #4
8004118: 6ffb ldr r3, [r7, #124] @ 0x7c
800411a: 4413 add r3, r2
800411c: f203 4304 addw r3, r3, #1028 @ 0x404
8004120: 67bb str r3, [r7, #120] @ 0x78
8004122: 6fbb ldr r3, [r7, #120] @ 0x78
8004124: 881b ldrh r3, [r3, #0]
8004126: b29b uxth r3, r3
8004128: f3c3 0309 ubfx r3, r3, #0, #10
800412c: b29a uxth r2, r3
800412e: 6fbb ldr r3, [r7, #120] @ 0x78
8004130: 801a strh r2, [r3, #0]
8004132: 6fbb ldr r3, [r7, #120] @ 0x78
8004134: 881b ldrh r3, [r3, #0]
8004136: b29b uxth r3, r3
8004138: ea6f 4343 mvn.w r3, r3, lsl #17
800413c: ea6f 4353 mvn.w r3, r3, lsr #17
8004140: b29a uxth r2, r3
8004142: 6fbb ldr r3, [r7, #120] @ 0x78
8004144: 801a strh r2, [r3, #0]
8004146: e01a b.n 800417e <HAL_PCD_EP_DB_Transmit+0x4b8>
8004148: 68bb ldr r3, [r7, #8]
800414a: 785b ldrb r3, [r3, #1]
800414c: 2b01 cmp r3, #1
800414e: d116 bne.n 800417e <HAL_PCD_EP_DB_Transmit+0x4b8>
8004150: 68fb ldr r3, [r7, #12]
8004152: 681b ldr r3, [r3, #0]
8004154: 667b str r3, [r7, #100] @ 0x64
8004156: 68fb ldr r3, [r7, #12]
8004158: 681b ldr r3, [r3, #0]
800415a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800415e: b29b uxth r3, r3
8004160: 461a mov r2, r3
8004162: 6e7b ldr r3, [r7, #100] @ 0x64
8004164: 4413 add r3, r2
8004166: 667b str r3, [r7, #100] @ 0x64
8004168: 68bb ldr r3, [r7, #8]
800416a: 781b ldrb r3, [r3, #0]
800416c: 011a lsls r2, r3, #4
800416e: 6e7b ldr r3, [r7, #100] @ 0x64
8004170: 4413 add r3, r2
8004172: f203 4304 addw r3, r3, #1028 @ 0x404
8004176: 663b str r3, [r7, #96] @ 0x60
8004178: 6e3b ldr r3, [r7, #96] @ 0x60
800417a: 2200 movs r2, #0
800417c: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800417e: 68fb ldr r3, [r7, #12]
8004180: 681b ldr r3, [r3, #0]
8004182: 677b str r3, [r7, #116] @ 0x74
8004184: 68bb ldr r3, [r7, #8]
8004186: 785b ldrb r3, [r3, #1]
8004188: 2b00 cmp r3, #0
800418a: d12b bne.n 80041e4 <HAL_PCD_EP_DB_Transmit+0x51e>
800418c: 68fb ldr r3, [r7, #12]
800418e: 681b ldr r3, [r3, #0]
8004190: 66fb str r3, [r7, #108] @ 0x6c
8004192: 68fb ldr r3, [r7, #12]
8004194: 681b ldr r3, [r3, #0]
8004196: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800419a: b29b uxth r3, r3
800419c: 461a mov r2, r3
800419e: 6efb ldr r3, [r7, #108] @ 0x6c
80041a0: 4413 add r3, r2
80041a2: 66fb str r3, [r7, #108] @ 0x6c
80041a4: 68bb ldr r3, [r7, #8]
80041a6: 781b ldrb r3, [r3, #0]
80041a8: 011a lsls r2, r3, #4
80041aa: 6efb ldr r3, [r7, #108] @ 0x6c
80041ac: 4413 add r3, r2
80041ae: f203 430c addw r3, r3, #1036 @ 0x40c
80041b2: f8c7 3080 str.w r3, [r7, #128] @ 0x80
80041b6: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80041ba: 881b ldrh r3, [r3, #0]
80041bc: b29b uxth r3, r3
80041be: f3c3 0309 ubfx r3, r3, #0, #10
80041c2: b29a uxth r2, r3
80041c4: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80041c8: 801a strh r2, [r3, #0]
80041ca: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80041ce: 881b ldrh r3, [r3, #0]
80041d0: b29b uxth r3, r3
80041d2: ea6f 4343 mvn.w r3, r3, lsl #17
80041d6: ea6f 4353 mvn.w r3, r3, lsr #17
80041da: b29a uxth r2, r3
80041dc: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80041e0: 801a strh r2, [r3, #0]
80041e2: e017 b.n 8004214 <HAL_PCD_EP_DB_Transmit+0x54e>
80041e4: 68bb ldr r3, [r7, #8]
80041e6: 785b ldrb r3, [r3, #1]
80041e8: 2b01 cmp r3, #1
80041ea: d113 bne.n 8004214 <HAL_PCD_EP_DB_Transmit+0x54e>
80041ec: 68fb ldr r3, [r7, #12]
80041ee: 681b ldr r3, [r3, #0]
80041f0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80041f4: b29b uxth r3, r3
80041f6: 461a mov r2, r3
80041f8: 6f7b ldr r3, [r7, #116] @ 0x74
80041fa: 4413 add r3, r2
80041fc: 677b str r3, [r7, #116] @ 0x74
80041fe: 68bb ldr r3, [r7, #8]
8004200: 781b ldrb r3, [r3, #0]
8004202: 011a lsls r2, r3, #4
8004204: 6f7b ldr r3, [r7, #116] @ 0x74
8004206: 4413 add r3, r2
8004208: f203 430c addw r3, r3, #1036 @ 0x40c
800420c: 673b str r3, [r7, #112] @ 0x70
800420e: 6f3b ldr r3, [r7, #112] @ 0x70
8004210: 2200 movs r2, #0
8004212: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8004214: 68bb ldr r3, [r7, #8]
8004216: 781b ldrb r3, [r3, #0]
8004218: 4619 mov r1, r3
800421a: 68f8 ldr r0, [r7, #12]
800421c: f005 ff67 bl 800a0ee <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8004220: 88fb ldrh r3, [r7, #6]
8004222: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004226: 2b00 cmp r3, #0
8004228: f040 811a bne.w 8004460 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
800422c: 68fb ldr r3, [r7, #12]
800422e: 681b ldr r3, [r3, #0]
8004230: 461a mov r2, r3
8004232: 68bb ldr r3, [r7, #8]
8004234: 781b ldrb r3, [r3, #0]
8004236: 009b lsls r3, r3, #2
8004238: 4413 add r3, r2
800423a: 881b ldrh r3, [r3, #0]
800423c: b29b uxth r3, r3
800423e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004242: f023 0370 bic.w r3, r3, #112 @ 0x70
8004246: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
800424a: 68fb ldr r3, [r7, #12]
800424c: 681b ldr r3, [r3, #0]
800424e: 461a mov r2, r3
8004250: 68bb ldr r3, [r7, #8]
8004252: 781b ldrb r3, [r3, #0]
8004254: 009b lsls r3, r3, #2
8004256: 441a add r2, r3
8004258: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
800425c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004260: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004264: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004268: f043 0380 orr.w r3, r3, #128 @ 0x80
800426c: b29b uxth r3, r3
800426e: 8013 strh r3, [r2, #0]
8004270: e0f6 b.n 8004460 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8004272: 88fb ldrh r3, [r7, #6]
8004274: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004278: 2b00 cmp r3, #0
800427a: d121 bne.n 80042c0 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
800427c: 68fb ldr r3, [r7, #12]
800427e: 681b ldr r3, [r3, #0]
8004280: 461a mov r2, r3
8004282: 68bb ldr r3, [r7, #8]
8004284: 781b ldrb r3, [r3, #0]
8004286: 009b lsls r3, r3, #2
8004288: 4413 add r3, r2
800428a: 881b ldrh r3, [r3, #0]
800428c: b29b uxth r3, r3
800428e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004292: f023 0370 bic.w r3, r3, #112 @ 0x70
8004296: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
800429a: 68fb ldr r3, [r7, #12]
800429c: 681b ldr r3, [r3, #0]
800429e: 461a mov r2, r3
80042a0: 68bb ldr r3, [r7, #8]
80042a2: 781b ldrb r3, [r3, #0]
80042a4: 009b lsls r3, r3, #2
80042a6: 441a add r2, r3
80042a8: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80042ac: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80042b0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80042b4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80042b8: f043 0380 orr.w r3, r3, #128 @ 0x80
80042bc: b29b uxth r3, r3
80042be: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
80042c0: 68bb ldr r3, [r7, #8]
80042c2: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
80042c6: 2b01 cmp r3, #1
80042c8: f040 80ca bne.w 8004460 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
80042cc: 68bb ldr r3, [r7, #8]
80042ce: 695a ldr r2, [r3, #20]
80042d0: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80042d4: 441a add r2, r3
80042d6: 68bb ldr r3, [r7, #8]
80042d8: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
80042da: 68bb ldr r3, [r7, #8]
80042dc: 69da ldr r2, [r3, #28]
80042de: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80042e2: 441a add r2, r3
80042e4: 68bb ldr r3, [r7, #8]
80042e6: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
80042e8: 68bb ldr r3, [r7, #8]
80042ea: 6a1a ldr r2, [r3, #32]
80042ec: 68bb ldr r3, [r7, #8]
80042ee: 691b ldr r3, [r3, #16]
80042f0: 429a cmp r2, r3
80042f2: d30b bcc.n 800430c <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
80042f4: 68bb ldr r3, [r7, #8]
80042f6: 691b ldr r3, [r3, #16]
80042f8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
80042fc: 68bb ldr r3, [r7, #8]
80042fe: 6a1a ldr r2, [r3, #32]
8004300: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004304: 1ad2 subs r2, r2, r3
8004306: 68bb ldr r3, [r7, #8]
8004308: 621a str r2, [r3, #32]
800430a: e017 b.n 800433c <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
800430c: 68bb ldr r3, [r7, #8]
800430e: 6a1b ldr r3, [r3, #32]
8004310: 2b00 cmp r3, #0
8004312: d108 bne.n 8004326 <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
8004314: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8004318: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
800431c: 68bb ldr r3, [r7, #8]
800431e: 2200 movs r2, #0
8004320: f883 2024 strb.w r2, [r3, #36] @ 0x24
8004324: e00a b.n 800433c <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
8004326: 68bb ldr r3, [r7, #8]
8004328: 6a1b ldr r3, [r3, #32]
800432a: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
800432e: 68bb ldr r3, [r7, #8]
8004330: 2200 movs r2, #0
8004332: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8004334: 68bb ldr r3, [r7, #8]
8004336: 2200 movs r2, #0
8004338: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
800433c: 68fb ldr r3, [r7, #12]
800433e: 681b ldr r3, [r3, #0]
8004340: 657b str r3, [r7, #84] @ 0x54
8004342: 68bb ldr r3, [r7, #8]
8004344: 785b ldrb r3, [r3, #1]
8004346: 2b00 cmp r3, #0
8004348: d165 bne.n 8004416 <HAL_PCD_EP_DB_Transmit+0x750>
800434a: 68fb ldr r3, [r7, #12]
800434c: 681b ldr r3, [r3, #0]
800434e: 65fb str r3, [r7, #92] @ 0x5c
8004350: 68fb ldr r3, [r7, #12]
8004352: 681b ldr r3, [r3, #0]
8004354: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004358: b29b uxth r3, r3
800435a: 461a mov r2, r3
800435c: 6dfb ldr r3, [r7, #92] @ 0x5c
800435e: 4413 add r3, r2
8004360: 65fb str r3, [r7, #92] @ 0x5c
8004362: 68bb ldr r3, [r7, #8]
8004364: 781b ldrb r3, [r3, #0]
8004366: 011a lsls r2, r3, #4
8004368: 6dfb ldr r3, [r7, #92] @ 0x5c
800436a: 4413 add r3, r2
800436c: f203 430c addw r3, r3, #1036 @ 0x40c
8004370: 65bb str r3, [r7, #88] @ 0x58
8004372: 6dbb ldr r3, [r7, #88] @ 0x58
8004374: 881b ldrh r3, [r3, #0]
8004376: b29b uxth r3, r3
8004378: f3c3 0309 ubfx r3, r3, #0, #10
800437c: b29a uxth r2, r3
800437e: 6dbb ldr r3, [r7, #88] @ 0x58
8004380: 801a strh r2, [r3, #0]
8004382: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004386: 2b3e cmp r3, #62 @ 0x3e
8004388: d91d bls.n 80043c6 <HAL_PCD_EP_DB_Transmit+0x700>
800438a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800438e: 095b lsrs r3, r3, #5
8004390: 66bb str r3, [r7, #104] @ 0x68
8004392: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004396: f003 031f and.w r3, r3, #31
800439a: 2b00 cmp r3, #0
800439c: d102 bne.n 80043a4 <HAL_PCD_EP_DB_Transmit+0x6de>
800439e: 6ebb ldr r3, [r7, #104] @ 0x68
80043a0: 3b01 subs r3, #1
80043a2: 66bb str r3, [r7, #104] @ 0x68
80043a4: 6dbb ldr r3, [r7, #88] @ 0x58
80043a6: 881b ldrh r3, [r3, #0]
80043a8: b29a uxth r2, r3
80043aa: 6ebb ldr r3, [r7, #104] @ 0x68
80043ac: b29b uxth r3, r3
80043ae: 029b lsls r3, r3, #10
80043b0: b29b uxth r3, r3
80043b2: 4313 orrs r3, r2
80043b4: b29b uxth r3, r3
80043b6: ea6f 4343 mvn.w r3, r3, lsl #17
80043ba: ea6f 4353 mvn.w r3, r3, lsr #17
80043be: b29a uxth r2, r3
80043c0: 6dbb ldr r3, [r7, #88] @ 0x58
80043c2: 801a strh r2, [r3, #0]
80043c4: e041 b.n 800444a <HAL_PCD_EP_DB_Transmit+0x784>
80043c6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80043ca: 2b00 cmp r3, #0
80043cc: d10a bne.n 80043e4 <HAL_PCD_EP_DB_Transmit+0x71e>
80043ce: 6dbb ldr r3, [r7, #88] @ 0x58
80043d0: 881b ldrh r3, [r3, #0]
80043d2: b29b uxth r3, r3
80043d4: ea6f 4343 mvn.w r3, r3, lsl #17
80043d8: ea6f 4353 mvn.w r3, r3, lsr #17
80043dc: b29a uxth r2, r3
80043de: 6dbb ldr r3, [r7, #88] @ 0x58
80043e0: 801a strh r2, [r3, #0]
80043e2: e032 b.n 800444a <HAL_PCD_EP_DB_Transmit+0x784>
80043e4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80043e8: 085b lsrs r3, r3, #1
80043ea: 66bb str r3, [r7, #104] @ 0x68
80043ec: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80043f0: f003 0301 and.w r3, r3, #1
80043f4: 2b00 cmp r3, #0
80043f6: d002 beq.n 80043fe <HAL_PCD_EP_DB_Transmit+0x738>
80043f8: 6ebb ldr r3, [r7, #104] @ 0x68
80043fa: 3301 adds r3, #1
80043fc: 66bb str r3, [r7, #104] @ 0x68
80043fe: 6dbb ldr r3, [r7, #88] @ 0x58
8004400: 881b ldrh r3, [r3, #0]
8004402: b29a uxth r2, r3
8004404: 6ebb ldr r3, [r7, #104] @ 0x68
8004406: b29b uxth r3, r3
8004408: 029b lsls r3, r3, #10
800440a: b29b uxth r3, r3
800440c: 4313 orrs r3, r2
800440e: b29a uxth r2, r3
8004410: 6dbb ldr r3, [r7, #88] @ 0x58
8004412: 801a strh r2, [r3, #0]
8004414: e019 b.n 800444a <HAL_PCD_EP_DB_Transmit+0x784>
8004416: 68bb ldr r3, [r7, #8]
8004418: 785b ldrb r3, [r3, #1]
800441a: 2b01 cmp r3, #1
800441c: d115 bne.n 800444a <HAL_PCD_EP_DB_Transmit+0x784>
800441e: 68fb ldr r3, [r7, #12]
8004420: 681b ldr r3, [r3, #0]
8004422: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004426: b29b uxth r3, r3
8004428: 461a mov r2, r3
800442a: 6d7b ldr r3, [r7, #84] @ 0x54
800442c: 4413 add r3, r2
800442e: 657b str r3, [r7, #84] @ 0x54
8004430: 68bb ldr r3, [r7, #8]
8004432: 781b ldrb r3, [r3, #0]
8004434: 011a lsls r2, r3, #4
8004436: 6d7b ldr r3, [r7, #84] @ 0x54
8004438: 4413 add r3, r2
800443a: f203 430c addw r3, r3, #1036 @ 0x40c
800443e: 653b str r3, [r7, #80] @ 0x50
8004440: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8004444: b29a uxth r2, r3
8004446: 6d3b ldr r3, [r7, #80] @ 0x50
8004448: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
800444a: 68fb ldr r3, [r7, #12]
800444c: 6818 ldr r0, [r3, #0]
800444e: 68bb ldr r3, [r7, #8]
8004450: 6959 ldr r1, [r3, #20]
8004452: 68bb ldr r3, [r7, #8]
8004454: 895a ldrh r2, [r3, #10]
8004456: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800445a: b29b uxth r3, r3
800445c: f003 ff83 bl 8008366 <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
8004460: 68fb ldr r3, [r7, #12]
8004462: 681b ldr r3, [r3, #0]
8004464: 461a mov r2, r3
8004466: 68bb ldr r3, [r7, #8]
8004468: 781b ldrb r3, [r3, #0]
800446a: 009b lsls r3, r3, #2
800446c: 4413 add r3, r2
800446e: 881b ldrh r3, [r3, #0]
8004470: b29b uxth r3, r3
8004472: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004476: f023 0340 bic.w r3, r3, #64 @ 0x40
800447a: 82bb strh r3, [r7, #20]
800447c: 8abb ldrh r3, [r7, #20]
800447e: f083 0310 eor.w r3, r3, #16
8004482: 82bb strh r3, [r7, #20]
8004484: 8abb ldrh r3, [r7, #20]
8004486: f083 0320 eor.w r3, r3, #32
800448a: 82bb strh r3, [r7, #20]
800448c: 68fb ldr r3, [r7, #12]
800448e: 681b ldr r3, [r3, #0]
8004490: 461a mov r2, r3
8004492: 68bb ldr r3, [r7, #8]
8004494: 781b ldrb r3, [r3, #0]
8004496: 009b lsls r3, r3, #2
8004498: 441a add r2, r3
800449a: 8abb ldrh r3, [r7, #20]
800449c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80044a0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80044a4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80044a8: f043 0380 orr.w r3, r3, #128 @ 0x80
80044ac: b29b uxth r3, r3
80044ae: 8013 strh r3, [r2, #0]
return HAL_OK;
80044b0: 2300 movs r3, #0
}
80044b2: 4618 mov r0, r3
80044b4: 3790 adds r7, #144 @ 0x90
80044b6: 46bd mov sp, r7
80044b8: bd80 pop {r7, pc}
080044ba <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
80044ba: b480 push {r7}
80044bc: b087 sub sp, #28
80044be: af00 add r7, sp, #0
80044c0: 60f8 str r0, [r7, #12]
80044c2: 607b str r3, [r7, #4]
80044c4: 460b mov r3, r1
80044c6: 817b strh r3, [r7, #10]
80044c8: 4613 mov r3, r2
80044ca: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
80044cc: 897b ldrh r3, [r7, #10]
80044ce: f003 0380 and.w r3, r3, #128 @ 0x80
80044d2: b29b uxth r3, r3
80044d4: 2b00 cmp r3, #0
80044d6: d00b beq.n 80044f0 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80044d8: 897b ldrh r3, [r7, #10]
80044da: f003 0207 and.w r2, r3, #7
80044de: 4613 mov r3, r2
80044e0: 009b lsls r3, r3, #2
80044e2: 4413 add r3, r2
80044e4: 00db lsls r3, r3, #3
80044e6: 3310 adds r3, #16
80044e8: 68fa ldr r2, [r7, #12]
80044ea: 4413 add r3, r2
80044ec: 617b str r3, [r7, #20]
80044ee: e009 b.n 8004504 <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
80044f0: 897a ldrh r2, [r7, #10]
80044f2: 4613 mov r3, r2
80044f4: 009b lsls r3, r3, #2
80044f6: 4413 add r3, r2
80044f8: 00db lsls r3, r3, #3
80044fa: f503 73a8 add.w r3, r3, #336 @ 0x150
80044fe: 68fa ldr r2, [r7, #12]
8004500: 4413 add r3, r2
8004502: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8004504: 893b ldrh r3, [r7, #8]
8004506: 2b00 cmp r3, #0
8004508: d107 bne.n 800451a <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
800450a: 697b ldr r3, [r7, #20]
800450c: 2200 movs r2, #0
800450e: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8004510: 687b ldr r3, [r7, #4]
8004512: b29a uxth r2, r3
8004514: 697b ldr r3, [r7, #20]
8004516: 80da strh r2, [r3, #6]
8004518: e00b b.n 8004532 <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
800451a: 697b ldr r3, [r7, #20]
800451c: 2201 movs r2, #1
800451e: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8004520: 687b ldr r3, [r7, #4]
8004522: b29a uxth r2, r3
8004524: 697b ldr r3, [r7, #20]
8004526: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8004528: 687b ldr r3, [r7, #4]
800452a: 0c1b lsrs r3, r3, #16
800452c: b29a uxth r2, r3
800452e: 697b ldr r3, [r7, #20]
8004530: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8004532: 2300 movs r3, #0
}
8004534: 4618 mov r0, r3
8004536: 371c adds r7, #28
8004538: 46bd mov sp, r7
800453a: bc80 pop {r7}
800453c: 4770 bx lr
...
08004540 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8004540: b580 push {r7, lr}
8004542: b086 sub sp, #24
8004544: af00 add r7, sp, #0
8004546: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8004548: 687b ldr r3, [r7, #4]
800454a: 2b00 cmp r3, #0
800454c: d101 bne.n 8004552 <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
800454e: 2301 movs r3, #1
8004550: e272 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8004552: 687b ldr r3, [r7, #4]
8004554: 681b ldr r3, [r3, #0]
8004556: f003 0301 and.w r3, r3, #1
800455a: 2b00 cmp r3, #0
800455c: f000 8087 beq.w 800466e <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8004560: 4b92 ldr r3, [pc, #584] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004562: 685b ldr r3, [r3, #4]
8004564: f003 030c and.w r3, r3, #12
8004568: 2b04 cmp r3, #4
800456a: d00c beq.n 8004586 <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
800456c: 4b8f ldr r3, [pc, #572] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
800456e: 685b ldr r3, [r3, #4]
8004570: f003 030c and.w r3, r3, #12
8004574: 2b08 cmp r3, #8
8004576: d112 bne.n 800459e <HAL_RCC_OscConfig+0x5e>
8004578: 4b8c ldr r3, [pc, #560] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
800457a: 685b ldr r3, [r3, #4]
800457c: f403 3380 and.w r3, r3, #65536 @ 0x10000
8004580: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8004584: d10b bne.n 800459e <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8004586: 4b89 ldr r3, [pc, #548] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004588: 681b ldr r3, [r3, #0]
800458a: f403 3300 and.w r3, r3, #131072 @ 0x20000
800458e: 2b00 cmp r3, #0
8004590: d06c beq.n 800466c <HAL_RCC_OscConfig+0x12c>
8004592: 687b ldr r3, [r7, #4]
8004594: 685b ldr r3, [r3, #4]
8004596: 2b00 cmp r3, #0
8004598: d168 bne.n 800466c <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
800459a: 2301 movs r3, #1
800459c: e24c b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
800459e: 687b ldr r3, [r7, #4]
80045a0: 685b ldr r3, [r3, #4]
80045a2: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80045a6: d106 bne.n 80045b6 <HAL_RCC_OscConfig+0x76>
80045a8: 4b80 ldr r3, [pc, #512] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045aa: 681b ldr r3, [r3, #0]
80045ac: 4a7f ldr r2, [pc, #508] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045ae: f443 3380 orr.w r3, r3, #65536 @ 0x10000
80045b2: 6013 str r3, [r2, #0]
80045b4: e02e b.n 8004614 <HAL_RCC_OscConfig+0xd4>
80045b6: 687b ldr r3, [r7, #4]
80045b8: 685b ldr r3, [r3, #4]
80045ba: 2b00 cmp r3, #0
80045bc: d10c bne.n 80045d8 <HAL_RCC_OscConfig+0x98>
80045be: 4b7b ldr r3, [pc, #492] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045c0: 681b ldr r3, [r3, #0]
80045c2: 4a7a ldr r2, [pc, #488] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045c4: f423 3380 bic.w r3, r3, #65536 @ 0x10000
80045c8: 6013 str r3, [r2, #0]
80045ca: 4b78 ldr r3, [pc, #480] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045cc: 681b ldr r3, [r3, #0]
80045ce: 4a77 ldr r2, [pc, #476] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045d0: f423 2380 bic.w r3, r3, #262144 @ 0x40000
80045d4: 6013 str r3, [r2, #0]
80045d6: e01d b.n 8004614 <HAL_RCC_OscConfig+0xd4>
80045d8: 687b ldr r3, [r7, #4]
80045da: 685b ldr r3, [r3, #4]
80045dc: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
80045e0: d10c bne.n 80045fc <HAL_RCC_OscConfig+0xbc>
80045e2: 4b72 ldr r3, [pc, #456] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045e4: 681b ldr r3, [r3, #0]
80045e6: 4a71 ldr r2, [pc, #452] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045e8: f443 2380 orr.w r3, r3, #262144 @ 0x40000
80045ec: 6013 str r3, [r2, #0]
80045ee: 4b6f ldr r3, [pc, #444] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045f0: 681b ldr r3, [r3, #0]
80045f2: 4a6e ldr r2, [pc, #440] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045f4: f443 3380 orr.w r3, r3, #65536 @ 0x10000
80045f8: 6013 str r3, [r2, #0]
80045fa: e00b b.n 8004614 <HAL_RCC_OscConfig+0xd4>
80045fc: 4b6b ldr r3, [pc, #428] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80045fe: 681b ldr r3, [r3, #0]
8004600: 4a6a ldr r2, [pc, #424] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004602: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8004606: 6013 str r3, [r2, #0]
8004608: 4b68 ldr r3, [pc, #416] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
800460a: 681b ldr r3, [r3, #0]
800460c: 4a67 ldr r2, [pc, #412] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
800460e: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8004612: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8004614: 687b ldr r3, [r7, #4]
8004616: 685b ldr r3, [r3, #4]
8004618: 2b00 cmp r3, #0
800461a: d013 beq.n 8004644 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800461c: f7fd fb4a bl 8001cb4 <HAL_GetTick>
8004620: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004622: e008 b.n 8004636 <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8004624: f7fd fb46 bl 8001cb4 <HAL_GetTick>
8004628: 4602 mov r2, r0
800462a: 693b ldr r3, [r7, #16]
800462c: 1ad3 subs r3, r2, r3
800462e: 2b64 cmp r3, #100 @ 0x64
8004630: d901 bls.n 8004636 <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
8004632: 2303 movs r3, #3
8004634: e200 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004636: 4b5d ldr r3, [pc, #372] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004638: 681b ldr r3, [r3, #0]
800463a: f403 3300 and.w r3, r3, #131072 @ 0x20000
800463e: 2b00 cmp r3, #0
8004640: d0f0 beq.n 8004624 <HAL_RCC_OscConfig+0xe4>
8004642: e014 b.n 800466e <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004644: f7fd fb36 bl 8001cb4 <HAL_GetTick>
8004648: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
800464a: e008 b.n 800465e <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
800464c: f7fd fb32 bl 8001cb4 <HAL_GetTick>
8004650: 4602 mov r2, r0
8004652: 693b ldr r3, [r7, #16]
8004654: 1ad3 subs r3, r2, r3
8004656: 2b64 cmp r3, #100 @ 0x64
8004658: d901 bls.n 800465e <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
800465a: 2303 movs r3, #3
800465c: e1ec b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
800465e: 4b53 ldr r3, [pc, #332] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004660: 681b ldr r3, [r3, #0]
8004662: f403 3300 and.w r3, r3, #131072 @ 0x20000
8004666: 2b00 cmp r3, #0
8004668: d1f0 bne.n 800464c <HAL_RCC_OscConfig+0x10c>
800466a: e000 b.n 800466e <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
800466c: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
800466e: 687b ldr r3, [r7, #4]
8004670: 681b ldr r3, [r3, #0]
8004672: f003 0302 and.w r3, r3, #2
8004676: 2b00 cmp r3, #0
8004678: d063 beq.n 8004742 <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
800467a: 4b4c ldr r3, [pc, #304] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
800467c: 685b ldr r3, [r3, #4]
800467e: f003 030c and.w r3, r3, #12
8004682: 2b00 cmp r3, #0
8004684: d00b beq.n 800469e <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
8004686: 4b49 ldr r3, [pc, #292] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004688: 685b ldr r3, [r3, #4]
800468a: f003 030c and.w r3, r3, #12
800468e: 2b08 cmp r3, #8
8004690: d11c bne.n 80046cc <HAL_RCC_OscConfig+0x18c>
8004692: 4b46 ldr r3, [pc, #280] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004694: 685b ldr r3, [r3, #4]
8004696: f403 3380 and.w r3, r3, #65536 @ 0x10000
800469a: 2b00 cmp r3, #0
800469c: d116 bne.n 80046cc <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
800469e: 4b43 ldr r3, [pc, #268] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80046a0: 681b ldr r3, [r3, #0]
80046a2: f003 0302 and.w r3, r3, #2
80046a6: 2b00 cmp r3, #0
80046a8: d005 beq.n 80046b6 <HAL_RCC_OscConfig+0x176>
80046aa: 687b ldr r3, [r7, #4]
80046ac: 691b ldr r3, [r3, #16]
80046ae: 2b01 cmp r3, #1
80046b0: d001 beq.n 80046b6 <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
80046b2: 2301 movs r3, #1
80046b4: e1c0 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
80046b6: 4b3d ldr r3, [pc, #244] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80046b8: 681b ldr r3, [r3, #0]
80046ba: f023 02f8 bic.w r2, r3, #248 @ 0xf8
80046be: 687b ldr r3, [r7, #4]
80046c0: 695b ldr r3, [r3, #20]
80046c2: 00db lsls r3, r3, #3
80046c4: 4939 ldr r1, [pc, #228] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80046c6: 4313 orrs r3, r2
80046c8: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
80046ca: e03a b.n 8004742 <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
80046cc: 687b ldr r3, [r7, #4]
80046ce: 691b ldr r3, [r3, #16]
80046d0: 2b00 cmp r3, #0
80046d2: d020 beq.n 8004716 <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
80046d4: 4b36 ldr r3, [pc, #216] @ (80047b0 <HAL_RCC_OscConfig+0x270>)
80046d6: 2201 movs r2, #1
80046d8: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80046da: f7fd faeb bl 8001cb4 <HAL_GetTick>
80046de: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80046e0: e008 b.n 80046f4 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
80046e2: f7fd fae7 bl 8001cb4 <HAL_GetTick>
80046e6: 4602 mov r2, r0
80046e8: 693b ldr r3, [r7, #16]
80046ea: 1ad3 subs r3, r2, r3
80046ec: 2b02 cmp r3, #2
80046ee: d901 bls.n 80046f4 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
80046f0: 2303 movs r3, #3
80046f2: e1a1 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80046f4: 4b2d ldr r3, [pc, #180] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
80046f6: 681b ldr r3, [r3, #0]
80046f8: f003 0302 and.w r3, r3, #2
80046fc: 2b00 cmp r3, #0
80046fe: d0f0 beq.n 80046e2 <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8004700: 4b2a ldr r3, [pc, #168] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004702: 681b ldr r3, [r3, #0]
8004704: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8004708: 687b ldr r3, [r7, #4]
800470a: 695b ldr r3, [r3, #20]
800470c: 00db lsls r3, r3, #3
800470e: 4927 ldr r1, [pc, #156] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004710: 4313 orrs r3, r2
8004712: 600b str r3, [r1, #0]
8004714: e015 b.n 8004742 <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8004716: 4b26 ldr r3, [pc, #152] @ (80047b0 <HAL_RCC_OscConfig+0x270>)
8004718: 2200 movs r2, #0
800471a: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800471c: f7fd faca bl 8001cb4 <HAL_GetTick>
8004720: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8004722: e008 b.n 8004736 <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8004724: f7fd fac6 bl 8001cb4 <HAL_GetTick>
8004728: 4602 mov r2, r0
800472a: 693b ldr r3, [r7, #16]
800472c: 1ad3 subs r3, r2, r3
800472e: 2b02 cmp r3, #2
8004730: d901 bls.n 8004736 <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
8004732: 2303 movs r3, #3
8004734: e180 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8004736: 4b1d ldr r3, [pc, #116] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004738: 681b ldr r3, [r3, #0]
800473a: f003 0302 and.w r3, r3, #2
800473e: 2b00 cmp r3, #0
8004740: d1f0 bne.n 8004724 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8004742: 687b ldr r3, [r7, #4]
8004744: 681b ldr r3, [r3, #0]
8004746: f003 0308 and.w r3, r3, #8
800474a: 2b00 cmp r3, #0
800474c: d03a beq.n 80047c4 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
800474e: 687b ldr r3, [r7, #4]
8004750: 699b ldr r3, [r3, #24]
8004752: 2b00 cmp r3, #0
8004754: d019 beq.n 800478a <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8004756: 4b17 ldr r3, [pc, #92] @ (80047b4 <HAL_RCC_OscConfig+0x274>)
8004758: 2201 movs r2, #1
800475a: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800475c: f7fd faaa bl 8001cb4 <HAL_GetTick>
8004760: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8004762: e008 b.n 8004776 <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8004764: f7fd faa6 bl 8001cb4 <HAL_GetTick>
8004768: 4602 mov r2, r0
800476a: 693b ldr r3, [r7, #16]
800476c: 1ad3 subs r3, r2, r3
800476e: 2b02 cmp r3, #2
8004770: d901 bls.n 8004776 <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
8004772: 2303 movs r3, #3
8004774: e160 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8004776: 4b0d ldr r3, [pc, #52] @ (80047ac <HAL_RCC_OscConfig+0x26c>)
8004778: 6a5b ldr r3, [r3, #36] @ 0x24
800477a: f003 0302 and.w r3, r3, #2
800477e: 2b00 cmp r3, #0
8004780: d0f0 beq.n 8004764 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
8004782: 2001 movs r0, #1
8004784: f000 face bl 8004d24 <RCC_Delay>
8004788: e01c b.n 80047c4 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
800478a: 4b0a ldr r3, [pc, #40] @ (80047b4 <HAL_RCC_OscConfig+0x274>)
800478c: 2200 movs r2, #0
800478e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004790: f7fd fa90 bl 8001cb4 <HAL_GetTick>
8004794: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8004796: e00f b.n 80047b8 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8004798: f7fd fa8c bl 8001cb4 <HAL_GetTick>
800479c: 4602 mov r2, r0
800479e: 693b ldr r3, [r7, #16]
80047a0: 1ad3 subs r3, r2, r3
80047a2: 2b02 cmp r3, #2
80047a4: d908 bls.n 80047b8 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
80047a6: 2303 movs r3, #3
80047a8: e146 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
80047aa: bf00 nop
80047ac: 40021000 .word 0x40021000
80047b0: 42420000 .word 0x42420000
80047b4: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80047b8: 4b92 ldr r3, [pc, #584] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80047ba: 6a5b ldr r3, [r3, #36] @ 0x24
80047bc: f003 0302 and.w r3, r3, #2
80047c0: 2b00 cmp r3, #0
80047c2: d1e9 bne.n 8004798 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
80047c4: 687b ldr r3, [r7, #4]
80047c6: 681b ldr r3, [r3, #0]
80047c8: f003 0304 and.w r3, r3, #4
80047cc: 2b00 cmp r3, #0
80047ce: f000 80a6 beq.w 800491e <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
80047d2: 2300 movs r3, #0
80047d4: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
80047d6: 4b8b ldr r3, [pc, #556] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80047d8: 69db ldr r3, [r3, #28]
80047da: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80047de: 2b00 cmp r3, #0
80047e0: d10d bne.n 80047fe <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
80047e2: 4b88 ldr r3, [pc, #544] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80047e4: 69db ldr r3, [r3, #28]
80047e6: 4a87 ldr r2, [pc, #540] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80047e8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80047ec: 61d3 str r3, [r2, #28]
80047ee: 4b85 ldr r3, [pc, #532] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80047f0: 69db ldr r3, [r3, #28]
80047f2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80047f6: 60bb str r3, [r7, #8]
80047f8: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
80047fa: 2301 movs r3, #1
80047fc: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80047fe: 4b82 ldr r3, [pc, #520] @ (8004a08 <HAL_RCC_OscConfig+0x4c8>)
8004800: 681b ldr r3, [r3, #0]
8004802: f403 7380 and.w r3, r3, #256 @ 0x100
8004806: 2b00 cmp r3, #0
8004808: d118 bne.n 800483c <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
800480a: 4b7f ldr r3, [pc, #508] @ (8004a08 <HAL_RCC_OscConfig+0x4c8>)
800480c: 681b ldr r3, [r3, #0]
800480e: 4a7e ldr r2, [pc, #504] @ (8004a08 <HAL_RCC_OscConfig+0x4c8>)
8004810: f443 7380 orr.w r3, r3, #256 @ 0x100
8004814: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8004816: f7fd fa4d bl 8001cb4 <HAL_GetTick>
800481a: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800481c: e008 b.n 8004830 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
800481e: f7fd fa49 bl 8001cb4 <HAL_GetTick>
8004822: 4602 mov r2, r0
8004824: 693b ldr r3, [r7, #16]
8004826: 1ad3 subs r3, r2, r3
8004828: 2b64 cmp r3, #100 @ 0x64
800482a: d901 bls.n 8004830 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
800482c: 2303 movs r3, #3
800482e: e103 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004830: 4b75 ldr r3, [pc, #468] @ (8004a08 <HAL_RCC_OscConfig+0x4c8>)
8004832: 681b ldr r3, [r3, #0]
8004834: f403 7380 and.w r3, r3, #256 @ 0x100
8004838: 2b00 cmp r3, #0
800483a: d0f0 beq.n 800481e <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
800483c: 687b ldr r3, [r7, #4]
800483e: 68db ldr r3, [r3, #12]
8004840: 2b01 cmp r3, #1
8004842: d106 bne.n 8004852 <HAL_RCC_OscConfig+0x312>
8004844: 4b6f ldr r3, [pc, #444] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004846: 6a1b ldr r3, [r3, #32]
8004848: 4a6e ldr r2, [pc, #440] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
800484a: f043 0301 orr.w r3, r3, #1
800484e: 6213 str r3, [r2, #32]
8004850: e02d b.n 80048ae <HAL_RCC_OscConfig+0x36e>
8004852: 687b ldr r3, [r7, #4]
8004854: 68db ldr r3, [r3, #12]
8004856: 2b00 cmp r3, #0
8004858: d10c bne.n 8004874 <HAL_RCC_OscConfig+0x334>
800485a: 4b6a ldr r3, [pc, #424] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
800485c: 6a1b ldr r3, [r3, #32]
800485e: 4a69 ldr r2, [pc, #420] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004860: f023 0301 bic.w r3, r3, #1
8004864: 6213 str r3, [r2, #32]
8004866: 4b67 ldr r3, [pc, #412] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004868: 6a1b ldr r3, [r3, #32]
800486a: 4a66 ldr r2, [pc, #408] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
800486c: f023 0304 bic.w r3, r3, #4
8004870: 6213 str r3, [r2, #32]
8004872: e01c b.n 80048ae <HAL_RCC_OscConfig+0x36e>
8004874: 687b ldr r3, [r7, #4]
8004876: 68db ldr r3, [r3, #12]
8004878: 2b05 cmp r3, #5
800487a: d10c bne.n 8004896 <HAL_RCC_OscConfig+0x356>
800487c: 4b61 ldr r3, [pc, #388] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
800487e: 6a1b ldr r3, [r3, #32]
8004880: 4a60 ldr r2, [pc, #384] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004882: f043 0304 orr.w r3, r3, #4
8004886: 6213 str r3, [r2, #32]
8004888: 4b5e ldr r3, [pc, #376] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
800488a: 6a1b ldr r3, [r3, #32]
800488c: 4a5d ldr r2, [pc, #372] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
800488e: f043 0301 orr.w r3, r3, #1
8004892: 6213 str r3, [r2, #32]
8004894: e00b b.n 80048ae <HAL_RCC_OscConfig+0x36e>
8004896: 4b5b ldr r3, [pc, #364] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004898: 6a1b ldr r3, [r3, #32]
800489a: 4a5a ldr r2, [pc, #360] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
800489c: f023 0301 bic.w r3, r3, #1
80048a0: 6213 str r3, [r2, #32]
80048a2: 4b58 ldr r3, [pc, #352] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80048a4: 6a1b ldr r3, [r3, #32]
80048a6: 4a57 ldr r2, [pc, #348] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80048a8: f023 0304 bic.w r3, r3, #4
80048ac: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
80048ae: 687b ldr r3, [r7, #4]
80048b0: 68db ldr r3, [r3, #12]
80048b2: 2b00 cmp r3, #0
80048b4: d015 beq.n 80048e2 <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80048b6: f7fd f9fd bl 8001cb4 <HAL_GetTick>
80048ba: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80048bc: e00a b.n 80048d4 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80048be: f7fd f9f9 bl 8001cb4 <HAL_GetTick>
80048c2: 4602 mov r2, r0
80048c4: 693b ldr r3, [r7, #16]
80048c6: 1ad3 subs r3, r2, r3
80048c8: f241 3288 movw r2, #5000 @ 0x1388
80048cc: 4293 cmp r3, r2
80048ce: d901 bls.n 80048d4 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
80048d0: 2303 movs r3, #3
80048d2: e0b1 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80048d4: 4b4b ldr r3, [pc, #300] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80048d6: 6a1b ldr r3, [r3, #32]
80048d8: f003 0302 and.w r3, r3, #2
80048dc: 2b00 cmp r3, #0
80048de: d0ee beq.n 80048be <HAL_RCC_OscConfig+0x37e>
80048e0: e014 b.n 800490c <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80048e2: f7fd f9e7 bl 8001cb4 <HAL_GetTick>
80048e6: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80048e8: e00a b.n 8004900 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80048ea: f7fd f9e3 bl 8001cb4 <HAL_GetTick>
80048ee: 4602 mov r2, r0
80048f0: 693b ldr r3, [r7, #16]
80048f2: 1ad3 subs r3, r2, r3
80048f4: f241 3288 movw r2, #5000 @ 0x1388
80048f8: 4293 cmp r3, r2
80048fa: d901 bls.n 8004900 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
80048fc: 2303 movs r3, #3
80048fe: e09b b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8004900: 4b40 ldr r3, [pc, #256] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004902: 6a1b ldr r3, [r3, #32]
8004904: f003 0302 and.w r3, r3, #2
8004908: 2b00 cmp r3, #0
800490a: d1ee bne.n 80048ea <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
800490c: 7dfb ldrb r3, [r7, #23]
800490e: 2b01 cmp r3, #1
8004910: d105 bne.n 800491e <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
8004912: 4b3c ldr r3, [pc, #240] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004914: 69db ldr r3, [r3, #28]
8004916: 4a3b ldr r2, [pc, #236] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004918: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
800491c: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
800491e: 687b ldr r3, [r7, #4]
8004920: 69db ldr r3, [r3, #28]
8004922: 2b00 cmp r3, #0
8004924: f000 8087 beq.w 8004a36 <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8004928: 4b36 ldr r3, [pc, #216] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
800492a: 685b ldr r3, [r3, #4]
800492c: f003 030c and.w r3, r3, #12
8004930: 2b08 cmp r3, #8
8004932: d061 beq.n 80049f8 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8004934: 687b ldr r3, [r7, #4]
8004936: 69db ldr r3, [r3, #28]
8004938: 2b02 cmp r3, #2
800493a: d146 bne.n 80049ca <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
800493c: 4b33 ldr r3, [pc, #204] @ (8004a0c <HAL_RCC_OscConfig+0x4cc>)
800493e: 2200 movs r2, #0
8004940: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004942: f7fd f9b7 bl 8001cb4 <HAL_GetTick>
8004946: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8004948: e008 b.n 800495c <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800494a: f7fd f9b3 bl 8001cb4 <HAL_GetTick>
800494e: 4602 mov r2, r0
8004950: 693b ldr r3, [r7, #16]
8004952: 1ad3 subs r3, r2, r3
8004954: 2b02 cmp r3, #2
8004956: d901 bls.n 800495c <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
8004958: 2303 movs r3, #3
800495a: e06d b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800495c: 4b29 ldr r3, [pc, #164] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
800495e: 681b ldr r3, [r3, #0]
8004960: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8004964: 2b00 cmp r3, #0
8004966: d1f0 bne.n 800494a <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
8004968: 687b ldr r3, [r7, #4]
800496a: 6a1b ldr r3, [r3, #32]
800496c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8004970: d108 bne.n 8004984 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
8004972: 4b24 ldr r3, [pc, #144] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004974: 685b ldr r3, [r3, #4]
8004976: f423 3200 bic.w r2, r3, #131072 @ 0x20000
800497a: 687b ldr r3, [r7, #4]
800497c: 689b ldr r3, [r3, #8]
800497e: 4921 ldr r1, [pc, #132] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004980: 4313 orrs r3, r2
8004982: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
8004984: 4b1f ldr r3, [pc, #124] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004986: 685b ldr r3, [r3, #4]
8004988: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
800498c: 687b ldr r3, [r7, #4]
800498e: 6a19 ldr r1, [r3, #32]
8004990: 687b ldr r3, [r7, #4]
8004992: 6a5b ldr r3, [r3, #36] @ 0x24
8004994: 430b orrs r3, r1
8004996: 491b ldr r1, [pc, #108] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
8004998: 4313 orrs r3, r2
800499a: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
800499c: 4b1b ldr r3, [pc, #108] @ (8004a0c <HAL_RCC_OscConfig+0x4cc>)
800499e: 2201 movs r2, #1
80049a0: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80049a2: f7fd f987 bl 8001cb4 <HAL_GetTick>
80049a6: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80049a8: e008 b.n 80049bc <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80049aa: f7fd f983 bl 8001cb4 <HAL_GetTick>
80049ae: 4602 mov r2, r0
80049b0: 693b ldr r3, [r7, #16]
80049b2: 1ad3 subs r3, r2, r3
80049b4: 2b02 cmp r3, #2
80049b6: d901 bls.n 80049bc <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
80049b8: 2303 movs r3, #3
80049ba: e03d b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80049bc: 4b11 ldr r3, [pc, #68] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80049be: 681b ldr r3, [r3, #0]
80049c0: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80049c4: 2b00 cmp r3, #0
80049c6: d0f0 beq.n 80049aa <HAL_RCC_OscConfig+0x46a>
80049c8: e035 b.n 8004a36 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80049ca: 4b10 ldr r3, [pc, #64] @ (8004a0c <HAL_RCC_OscConfig+0x4cc>)
80049cc: 2200 movs r2, #0
80049ce: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80049d0: f7fd f970 bl 8001cb4 <HAL_GetTick>
80049d4: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80049d6: e008 b.n 80049ea <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80049d8: f7fd f96c bl 8001cb4 <HAL_GetTick>
80049dc: 4602 mov r2, r0
80049de: 693b ldr r3, [r7, #16]
80049e0: 1ad3 subs r3, r2, r3
80049e2: 2b02 cmp r3, #2
80049e4: d901 bls.n 80049ea <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
80049e6: 2303 movs r3, #3
80049e8: e026 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80049ea: 4b06 ldr r3, [pc, #24] @ (8004a04 <HAL_RCC_OscConfig+0x4c4>)
80049ec: 681b ldr r3, [r3, #0]
80049ee: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80049f2: 2b00 cmp r3, #0
80049f4: d1f0 bne.n 80049d8 <HAL_RCC_OscConfig+0x498>
80049f6: e01e b.n 8004a36 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
80049f8: 687b ldr r3, [r7, #4]
80049fa: 69db ldr r3, [r3, #28]
80049fc: 2b01 cmp r3, #1
80049fe: d107 bne.n 8004a10 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8004a00: 2301 movs r3, #1
8004a02: e019 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
8004a04: 40021000 .word 0x40021000
8004a08: 40007000 .word 0x40007000
8004a0c: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8004a10: 4b0b ldr r3, [pc, #44] @ (8004a40 <HAL_RCC_OscConfig+0x500>)
8004a12: 685b ldr r3, [r3, #4]
8004a14: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8004a16: 68fb ldr r3, [r7, #12]
8004a18: f403 3280 and.w r2, r3, #65536 @ 0x10000
8004a1c: 687b ldr r3, [r7, #4]
8004a1e: 6a1b ldr r3, [r3, #32]
8004a20: 429a cmp r2, r3
8004a22: d106 bne.n 8004a32 <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8004a24: 68fb ldr r3, [r7, #12]
8004a26: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
8004a2a: 687b ldr r3, [r7, #4]
8004a2c: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8004a2e: 429a cmp r2, r3
8004a30: d001 beq.n 8004a36 <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
8004a32: 2301 movs r3, #1
8004a34: e000 b.n 8004a38 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
8004a36: 2300 movs r3, #0
}
8004a38: 4618 mov r0, r3
8004a3a: 3718 adds r7, #24
8004a3c: 46bd mov sp, r7
8004a3e: bd80 pop {r7, pc}
8004a40: 40021000 .word 0x40021000
08004a44 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8004a44: b580 push {r7, lr}
8004a46: b084 sub sp, #16
8004a48: af00 add r7, sp, #0
8004a4a: 6078 str r0, [r7, #4]
8004a4c: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8004a4e: 687b ldr r3, [r7, #4]
8004a50: 2b00 cmp r3, #0
8004a52: d101 bne.n 8004a58 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8004a54: 2301 movs r3, #1
8004a56: e0d0 b.n 8004bfa <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8004a58: 4b6a ldr r3, [pc, #424] @ (8004c04 <HAL_RCC_ClockConfig+0x1c0>)
8004a5a: 681b ldr r3, [r3, #0]
8004a5c: f003 0307 and.w r3, r3, #7
8004a60: 683a ldr r2, [r7, #0]
8004a62: 429a cmp r2, r3
8004a64: d910 bls.n 8004a88 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8004a66: 4b67 ldr r3, [pc, #412] @ (8004c04 <HAL_RCC_ClockConfig+0x1c0>)
8004a68: 681b ldr r3, [r3, #0]
8004a6a: f023 0207 bic.w r2, r3, #7
8004a6e: 4965 ldr r1, [pc, #404] @ (8004c04 <HAL_RCC_ClockConfig+0x1c0>)
8004a70: 683b ldr r3, [r7, #0]
8004a72: 4313 orrs r3, r2
8004a74: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8004a76: 4b63 ldr r3, [pc, #396] @ (8004c04 <HAL_RCC_ClockConfig+0x1c0>)
8004a78: 681b ldr r3, [r3, #0]
8004a7a: f003 0307 and.w r3, r3, #7
8004a7e: 683a ldr r2, [r7, #0]
8004a80: 429a cmp r2, r3
8004a82: d001 beq.n 8004a88 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8004a84: 2301 movs r3, #1
8004a86: e0b8 b.n 8004bfa <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8004a88: 687b ldr r3, [r7, #4]
8004a8a: 681b ldr r3, [r3, #0]
8004a8c: f003 0302 and.w r3, r3, #2
8004a90: 2b00 cmp r3, #0
8004a92: d020 beq.n 8004ad6 <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8004a94: 687b ldr r3, [r7, #4]
8004a96: 681b ldr r3, [r3, #0]
8004a98: f003 0304 and.w r3, r3, #4
8004a9c: 2b00 cmp r3, #0
8004a9e: d005 beq.n 8004aac <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8004aa0: 4b59 ldr r3, [pc, #356] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004aa2: 685b ldr r3, [r3, #4]
8004aa4: 4a58 ldr r2, [pc, #352] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004aa6: f443 63e0 orr.w r3, r3, #1792 @ 0x700
8004aaa: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8004aac: 687b ldr r3, [r7, #4]
8004aae: 681b ldr r3, [r3, #0]
8004ab0: f003 0308 and.w r3, r3, #8
8004ab4: 2b00 cmp r3, #0
8004ab6: d005 beq.n 8004ac4 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8004ab8: 4b53 ldr r3, [pc, #332] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004aba: 685b ldr r3, [r3, #4]
8004abc: 4a52 ldr r2, [pc, #328] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004abe: f443 5360 orr.w r3, r3, #14336 @ 0x3800
8004ac2: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8004ac4: 4b50 ldr r3, [pc, #320] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004ac6: 685b ldr r3, [r3, #4]
8004ac8: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8004acc: 687b ldr r3, [r7, #4]
8004ace: 689b ldr r3, [r3, #8]
8004ad0: 494d ldr r1, [pc, #308] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004ad2: 4313 orrs r3, r2
8004ad4: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8004ad6: 687b ldr r3, [r7, #4]
8004ad8: 681b ldr r3, [r3, #0]
8004ada: f003 0301 and.w r3, r3, #1
8004ade: 2b00 cmp r3, #0
8004ae0: d040 beq.n 8004b64 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8004ae2: 687b ldr r3, [r7, #4]
8004ae4: 685b ldr r3, [r3, #4]
8004ae6: 2b01 cmp r3, #1
8004ae8: d107 bne.n 8004afa <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8004aea: 4b47 ldr r3, [pc, #284] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004aec: 681b ldr r3, [r3, #0]
8004aee: f403 3300 and.w r3, r3, #131072 @ 0x20000
8004af2: 2b00 cmp r3, #0
8004af4: d115 bne.n 8004b22 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8004af6: 2301 movs r3, #1
8004af8: e07f b.n 8004bfa <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8004afa: 687b ldr r3, [r7, #4]
8004afc: 685b ldr r3, [r3, #4]
8004afe: 2b02 cmp r3, #2
8004b00: d107 bne.n 8004b12 <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8004b02: 4b41 ldr r3, [pc, #260] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004b04: 681b ldr r3, [r3, #0]
8004b06: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8004b0a: 2b00 cmp r3, #0
8004b0c: d109 bne.n 8004b22 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8004b0e: 2301 movs r3, #1
8004b10: e073 b.n 8004bfa <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8004b12: 4b3d ldr r3, [pc, #244] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004b14: 681b ldr r3, [r3, #0]
8004b16: f003 0302 and.w r3, r3, #2
8004b1a: 2b00 cmp r3, #0
8004b1c: d101 bne.n 8004b22 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8004b1e: 2301 movs r3, #1
8004b20: e06b b.n 8004bfa <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8004b22: 4b39 ldr r3, [pc, #228] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004b24: 685b ldr r3, [r3, #4]
8004b26: f023 0203 bic.w r2, r3, #3
8004b2a: 687b ldr r3, [r7, #4]
8004b2c: 685b ldr r3, [r3, #4]
8004b2e: 4936 ldr r1, [pc, #216] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004b30: 4313 orrs r3, r2
8004b32: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
8004b34: f7fd f8be bl 8001cb4 <HAL_GetTick>
8004b38: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8004b3a: e00a b.n 8004b52 <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8004b3c: f7fd f8ba bl 8001cb4 <HAL_GetTick>
8004b40: 4602 mov r2, r0
8004b42: 68fb ldr r3, [r7, #12]
8004b44: 1ad3 subs r3, r2, r3
8004b46: f241 3288 movw r2, #5000 @ 0x1388
8004b4a: 4293 cmp r3, r2
8004b4c: d901 bls.n 8004b52 <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8004b4e: 2303 movs r3, #3
8004b50: e053 b.n 8004bfa <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8004b52: 4b2d ldr r3, [pc, #180] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004b54: 685b ldr r3, [r3, #4]
8004b56: f003 020c and.w r2, r3, #12
8004b5a: 687b ldr r3, [r7, #4]
8004b5c: 685b ldr r3, [r3, #4]
8004b5e: 009b lsls r3, r3, #2
8004b60: 429a cmp r2, r3
8004b62: d1eb bne.n 8004b3c <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8004b64: 4b27 ldr r3, [pc, #156] @ (8004c04 <HAL_RCC_ClockConfig+0x1c0>)
8004b66: 681b ldr r3, [r3, #0]
8004b68: f003 0307 and.w r3, r3, #7
8004b6c: 683a ldr r2, [r7, #0]
8004b6e: 429a cmp r2, r3
8004b70: d210 bcs.n 8004b94 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8004b72: 4b24 ldr r3, [pc, #144] @ (8004c04 <HAL_RCC_ClockConfig+0x1c0>)
8004b74: 681b ldr r3, [r3, #0]
8004b76: f023 0207 bic.w r2, r3, #7
8004b7a: 4922 ldr r1, [pc, #136] @ (8004c04 <HAL_RCC_ClockConfig+0x1c0>)
8004b7c: 683b ldr r3, [r7, #0]
8004b7e: 4313 orrs r3, r2
8004b80: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8004b82: 4b20 ldr r3, [pc, #128] @ (8004c04 <HAL_RCC_ClockConfig+0x1c0>)
8004b84: 681b ldr r3, [r3, #0]
8004b86: f003 0307 and.w r3, r3, #7
8004b8a: 683a ldr r2, [r7, #0]
8004b8c: 429a cmp r2, r3
8004b8e: d001 beq.n 8004b94 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8004b90: 2301 movs r3, #1
8004b92: e032 b.n 8004bfa <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8004b94: 687b ldr r3, [r7, #4]
8004b96: 681b ldr r3, [r3, #0]
8004b98: f003 0304 and.w r3, r3, #4
8004b9c: 2b00 cmp r3, #0
8004b9e: d008 beq.n 8004bb2 <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8004ba0: 4b19 ldr r3, [pc, #100] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004ba2: 685b ldr r3, [r3, #4]
8004ba4: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8004ba8: 687b ldr r3, [r7, #4]
8004baa: 68db ldr r3, [r3, #12]
8004bac: 4916 ldr r1, [pc, #88] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004bae: 4313 orrs r3, r2
8004bb0: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8004bb2: 687b ldr r3, [r7, #4]
8004bb4: 681b ldr r3, [r3, #0]
8004bb6: f003 0308 and.w r3, r3, #8
8004bba: 2b00 cmp r3, #0
8004bbc: d009 beq.n 8004bd2 <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8004bbe: 4b12 ldr r3, [pc, #72] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004bc0: 685b ldr r3, [r3, #4]
8004bc2: f423 5260 bic.w r2, r3, #14336 @ 0x3800
8004bc6: 687b ldr r3, [r7, #4]
8004bc8: 691b ldr r3, [r3, #16]
8004bca: 00db lsls r3, r3, #3
8004bcc: 490e ldr r1, [pc, #56] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004bce: 4313 orrs r3, r2
8004bd0: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
8004bd2: f000 f821 bl 8004c18 <HAL_RCC_GetSysClockFreq>
8004bd6: 4602 mov r2, r0
8004bd8: 4b0b ldr r3, [pc, #44] @ (8004c08 <HAL_RCC_ClockConfig+0x1c4>)
8004bda: 685b ldr r3, [r3, #4]
8004bdc: 091b lsrs r3, r3, #4
8004bde: f003 030f and.w r3, r3, #15
8004be2: 490a ldr r1, [pc, #40] @ (8004c0c <HAL_RCC_ClockConfig+0x1c8>)
8004be4: 5ccb ldrb r3, [r1, r3]
8004be6: fa22 f303 lsr.w r3, r2, r3
8004bea: 4a09 ldr r2, [pc, #36] @ (8004c10 <HAL_RCC_ClockConfig+0x1cc>)
8004bec: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
8004bee: 4b09 ldr r3, [pc, #36] @ (8004c14 <HAL_RCC_ClockConfig+0x1d0>)
8004bf0: 681b ldr r3, [r3, #0]
8004bf2: 4618 mov r0, r3
8004bf4: f7fd f81c bl 8001c30 <HAL_InitTick>
return HAL_OK;
8004bf8: 2300 movs r3, #0
}
8004bfa: 4618 mov r0, r3
8004bfc: 3710 adds r7, #16
8004bfe: 46bd mov sp, r7
8004c00: bd80 pop {r7, pc}
8004c02: bf00 nop
8004c04: 40022000 .word 0x40022000
8004c08: 40021000 .word 0x40021000
8004c0c: 0800b0d8 .word 0x0800b0d8
8004c10: 20000004 .word 0x20000004
8004c14: 20000008 .word 0x20000008
08004c18 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8004c18: b480 push {r7}
8004c1a: b087 sub sp, #28
8004c1c: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8004c1e: 2300 movs r3, #0
8004c20: 60fb str r3, [r7, #12]
8004c22: 2300 movs r3, #0
8004c24: 60bb str r3, [r7, #8]
8004c26: 2300 movs r3, #0
8004c28: 617b str r3, [r7, #20]
8004c2a: 2300 movs r3, #0
8004c2c: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
8004c2e: 2300 movs r3, #0
8004c30: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
8004c32: 4b1e ldr r3, [pc, #120] @ (8004cac <HAL_RCC_GetSysClockFreq+0x94>)
8004c34: 685b ldr r3, [r3, #4]
8004c36: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
8004c38: 68fb ldr r3, [r7, #12]
8004c3a: f003 030c and.w r3, r3, #12
8004c3e: 2b04 cmp r3, #4
8004c40: d002 beq.n 8004c48 <HAL_RCC_GetSysClockFreq+0x30>
8004c42: 2b08 cmp r3, #8
8004c44: d003 beq.n 8004c4e <HAL_RCC_GetSysClockFreq+0x36>
8004c46: e027 b.n 8004c98 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8004c48: 4b19 ldr r3, [pc, #100] @ (8004cb0 <HAL_RCC_GetSysClockFreq+0x98>)
8004c4a: 613b str r3, [r7, #16]
break;
8004c4c: e027 b.n 8004c9e <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
8004c4e: 68fb ldr r3, [r7, #12]
8004c50: 0c9b lsrs r3, r3, #18
8004c52: f003 030f and.w r3, r3, #15
8004c56: 4a17 ldr r2, [pc, #92] @ (8004cb4 <HAL_RCC_GetSysClockFreq+0x9c>)
8004c58: 5cd3 ldrb r3, [r2, r3]
8004c5a: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
8004c5c: 68fb ldr r3, [r7, #12]
8004c5e: f403 3380 and.w r3, r3, #65536 @ 0x10000
8004c62: 2b00 cmp r3, #0
8004c64: d010 beq.n 8004c88 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
8004c66: 4b11 ldr r3, [pc, #68] @ (8004cac <HAL_RCC_GetSysClockFreq+0x94>)
8004c68: 685b ldr r3, [r3, #4]
8004c6a: 0c5b lsrs r3, r3, #17
8004c6c: f003 0301 and.w r3, r3, #1
8004c70: 4a11 ldr r2, [pc, #68] @ (8004cb8 <HAL_RCC_GetSysClockFreq+0xa0>)
8004c72: 5cd3 ldrb r3, [r2, r3]
8004c74: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
8004c76: 687b ldr r3, [r7, #4]
8004c78: 4a0d ldr r2, [pc, #52] @ (8004cb0 <HAL_RCC_GetSysClockFreq+0x98>)
8004c7a: fb03 f202 mul.w r2, r3, r2
8004c7e: 68bb ldr r3, [r7, #8]
8004c80: fbb2 f3f3 udiv r3, r2, r3
8004c84: 617b str r3, [r7, #20]
8004c86: e004 b.n 8004c92 <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8004c88: 687b ldr r3, [r7, #4]
8004c8a: 4a0c ldr r2, [pc, #48] @ (8004cbc <HAL_RCC_GetSysClockFreq+0xa4>)
8004c8c: fb02 f303 mul.w r3, r2, r3
8004c90: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
8004c92: 697b ldr r3, [r7, #20]
8004c94: 613b str r3, [r7, #16]
break;
8004c96: e002 b.n 8004c9e <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8004c98: 4b05 ldr r3, [pc, #20] @ (8004cb0 <HAL_RCC_GetSysClockFreq+0x98>)
8004c9a: 613b str r3, [r7, #16]
break;
8004c9c: bf00 nop
}
}
return sysclockfreq;
8004c9e: 693b ldr r3, [r7, #16]
}
8004ca0: 4618 mov r0, r3
8004ca2: 371c adds r7, #28
8004ca4: 46bd mov sp, r7
8004ca6: bc80 pop {r7}
8004ca8: 4770 bx lr
8004caa: bf00 nop
8004cac: 40021000 .word 0x40021000
8004cb0: 007a1200 .word 0x007a1200
8004cb4: 0800b0f0 .word 0x0800b0f0
8004cb8: 0800b100 .word 0x0800b100
8004cbc: 003d0900 .word 0x003d0900
08004cc0 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8004cc0: b480 push {r7}
8004cc2: af00 add r7, sp, #0
return SystemCoreClock;
8004cc4: 4b02 ldr r3, [pc, #8] @ (8004cd0 <HAL_RCC_GetHCLKFreq+0x10>)
8004cc6: 681b ldr r3, [r3, #0]
}
8004cc8: 4618 mov r0, r3
8004cca: 46bd mov sp, r7
8004ccc: bc80 pop {r7}
8004cce: 4770 bx lr
8004cd0: 20000004 .word 0x20000004
08004cd4 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8004cd4: b580 push {r7, lr}
8004cd6: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
8004cd8: f7ff fff2 bl 8004cc0 <HAL_RCC_GetHCLKFreq>
8004cdc: 4602 mov r2, r0
8004cde: 4b05 ldr r3, [pc, #20] @ (8004cf4 <HAL_RCC_GetPCLK1Freq+0x20>)
8004ce0: 685b ldr r3, [r3, #4]
8004ce2: 0a1b lsrs r3, r3, #8
8004ce4: f003 0307 and.w r3, r3, #7
8004ce8: 4903 ldr r1, [pc, #12] @ (8004cf8 <HAL_RCC_GetPCLK1Freq+0x24>)
8004cea: 5ccb ldrb r3, [r1, r3]
8004cec: fa22 f303 lsr.w r3, r2, r3
}
8004cf0: 4618 mov r0, r3
8004cf2: bd80 pop {r7, pc}
8004cf4: 40021000 .word 0x40021000
8004cf8: 0800b0e8 .word 0x0800b0e8
08004cfc <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8004cfc: b580 push {r7, lr}
8004cfe: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
8004d00: f7ff ffde bl 8004cc0 <HAL_RCC_GetHCLKFreq>
8004d04: 4602 mov r2, r0
8004d06: 4b05 ldr r3, [pc, #20] @ (8004d1c <HAL_RCC_GetPCLK2Freq+0x20>)
8004d08: 685b ldr r3, [r3, #4]
8004d0a: 0adb lsrs r3, r3, #11
8004d0c: f003 0307 and.w r3, r3, #7
8004d10: 4903 ldr r1, [pc, #12] @ (8004d20 <HAL_RCC_GetPCLK2Freq+0x24>)
8004d12: 5ccb ldrb r3, [r1, r3]
8004d14: fa22 f303 lsr.w r3, r2, r3
}
8004d18: 4618 mov r0, r3
8004d1a: bd80 pop {r7, pc}
8004d1c: 40021000 .word 0x40021000
8004d20: 0800b0e8 .word 0x0800b0e8
08004d24 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8004d24: b480 push {r7}
8004d26: b085 sub sp, #20
8004d28: af00 add r7, sp, #0
8004d2a: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8004d2c: 4b0a ldr r3, [pc, #40] @ (8004d58 <RCC_Delay+0x34>)
8004d2e: 681b ldr r3, [r3, #0]
8004d30: 4a0a ldr r2, [pc, #40] @ (8004d5c <RCC_Delay+0x38>)
8004d32: fba2 2303 umull r2, r3, r2, r3
8004d36: 0a5b lsrs r3, r3, #9
8004d38: 687a ldr r2, [r7, #4]
8004d3a: fb02 f303 mul.w r3, r2, r3
8004d3e: 60fb str r3, [r7, #12]
do
{
__NOP();
8004d40: bf00 nop
}
while (Delay --);
8004d42: 68fb ldr r3, [r7, #12]
8004d44: 1e5a subs r2, r3, #1
8004d46: 60fa str r2, [r7, #12]
8004d48: 2b00 cmp r3, #0
8004d4a: d1f9 bne.n 8004d40 <RCC_Delay+0x1c>
}
8004d4c: bf00 nop
8004d4e: bf00 nop
8004d50: 3714 adds r7, #20
8004d52: 46bd mov sp, r7
8004d54: bc80 pop {r7}
8004d56: 4770 bx lr
8004d58: 20000004 .word 0x20000004
8004d5c: 10624dd3 .word 0x10624dd3
08004d60 <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8004d60: b580 push {r7, lr}
8004d62: b086 sub sp, #24
8004d64: af00 add r7, sp, #0
8004d66: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
8004d68: 2300 movs r3, #0
8004d6a: 613b str r3, [r7, #16]
8004d6c: 2300 movs r3, #0
8004d6e: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8004d70: 687b ldr r3, [r7, #4]
8004d72: 681b ldr r3, [r3, #0]
8004d74: f003 0301 and.w r3, r3, #1
8004d78: 2b00 cmp r3, #0
8004d7a: d07d beq.n 8004e78 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
8004d7c: 2300 movs r3, #0
8004d7e: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8004d80: 4b4f ldr r3, [pc, #316] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004d82: 69db ldr r3, [r3, #28]
8004d84: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8004d88: 2b00 cmp r3, #0
8004d8a: d10d bne.n 8004da8 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
8004d8c: 4b4c ldr r3, [pc, #304] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004d8e: 69db ldr r3, [r3, #28]
8004d90: 4a4b ldr r2, [pc, #300] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004d92: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8004d96: 61d3 str r3, [r2, #28]
8004d98: 4b49 ldr r3, [pc, #292] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004d9a: 69db ldr r3, [r3, #28]
8004d9c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8004da0: 60bb str r3, [r7, #8]
8004da2: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8004da4: 2301 movs r3, #1
8004da6: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004da8: 4b46 ldr r3, [pc, #280] @ (8004ec4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004daa: 681b ldr r3, [r3, #0]
8004dac: f403 7380 and.w r3, r3, #256 @ 0x100
8004db0: 2b00 cmp r3, #0
8004db2: d118 bne.n 8004de6 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8004db4: 4b43 ldr r3, [pc, #268] @ (8004ec4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004db6: 681b ldr r3, [r3, #0]
8004db8: 4a42 ldr r2, [pc, #264] @ (8004ec4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004dba: f443 7380 orr.w r3, r3, #256 @ 0x100
8004dbe: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8004dc0: f7fc ff78 bl 8001cb4 <HAL_GetTick>
8004dc4: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004dc6: e008 b.n 8004dda <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8004dc8: f7fc ff74 bl 8001cb4 <HAL_GetTick>
8004dcc: 4602 mov r2, r0
8004dce: 693b ldr r3, [r7, #16]
8004dd0: 1ad3 subs r3, r2, r3
8004dd2: 2b64 cmp r3, #100 @ 0x64
8004dd4: d901 bls.n 8004dda <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8004dd6: 2303 movs r3, #3
8004dd8: e06d b.n 8004eb6 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8004dda: 4b3a ldr r3, [pc, #232] @ (8004ec4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8004ddc: 681b ldr r3, [r3, #0]
8004dde: f403 7380 and.w r3, r3, #256 @ 0x100
8004de2: 2b00 cmp r3, #0
8004de4: d0f0 beq.n 8004dc8 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8004de6: 4b36 ldr r3, [pc, #216] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004de8: 6a1b ldr r3, [r3, #32]
8004dea: f403 7340 and.w r3, r3, #768 @ 0x300
8004dee: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8004df0: 68fb ldr r3, [r7, #12]
8004df2: 2b00 cmp r3, #0
8004df4: d02e beq.n 8004e54 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8004df6: 687b ldr r3, [r7, #4]
8004df8: 685b ldr r3, [r3, #4]
8004dfa: f403 7340 and.w r3, r3, #768 @ 0x300
8004dfe: 68fa ldr r2, [r7, #12]
8004e00: 429a cmp r2, r3
8004e02: d027 beq.n 8004e54 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8004e04: 4b2e ldr r3, [pc, #184] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004e06: 6a1b ldr r3, [r3, #32]
8004e08: f423 7340 bic.w r3, r3, #768 @ 0x300
8004e0c: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8004e0e: 4b2e ldr r3, [pc, #184] @ (8004ec8 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8004e10: 2201 movs r2, #1
8004e12: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8004e14: 4b2c ldr r3, [pc, #176] @ (8004ec8 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8004e16: 2200 movs r2, #0
8004e18: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8004e1a: 4a29 ldr r2, [pc, #164] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004e1c: 68fb ldr r3, [r7, #12]
8004e1e: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8004e20: 68fb ldr r3, [r7, #12]
8004e22: f003 0301 and.w r3, r3, #1
8004e26: 2b00 cmp r3, #0
8004e28: d014 beq.n 8004e54 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8004e2a: f7fc ff43 bl 8001cb4 <HAL_GetTick>
8004e2e: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004e30: e00a b.n 8004e48 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8004e32: f7fc ff3f bl 8001cb4 <HAL_GetTick>
8004e36: 4602 mov r2, r0
8004e38: 693b ldr r3, [r7, #16]
8004e3a: 1ad3 subs r3, r2, r3
8004e3c: f241 3288 movw r2, #5000 @ 0x1388
8004e40: 4293 cmp r3, r2
8004e42: d901 bls.n 8004e48 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8004e44: 2303 movs r3, #3
8004e46: e036 b.n 8004eb6 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8004e48: 4b1d ldr r3, [pc, #116] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004e4a: 6a1b ldr r3, [r3, #32]
8004e4c: f003 0302 and.w r3, r3, #2
8004e50: 2b00 cmp r3, #0
8004e52: d0ee beq.n 8004e32 <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8004e54: 4b1a ldr r3, [pc, #104] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004e56: 6a1b ldr r3, [r3, #32]
8004e58: f423 7240 bic.w r2, r3, #768 @ 0x300
8004e5c: 687b ldr r3, [r7, #4]
8004e5e: 685b ldr r3, [r3, #4]
8004e60: 4917 ldr r1, [pc, #92] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004e62: 4313 orrs r3, r2
8004e64: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8004e66: 7dfb ldrb r3, [r7, #23]
8004e68: 2b01 cmp r3, #1
8004e6a: d105 bne.n 8004e78 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8004e6c: 4b14 ldr r3, [pc, #80] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004e6e: 69db ldr r3, [r3, #28]
8004e70: 4a13 ldr r2, [pc, #76] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004e72: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8004e76: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8004e78: 687b ldr r3, [r7, #4]
8004e7a: 681b ldr r3, [r3, #0]
8004e7c: f003 0302 and.w r3, r3, #2
8004e80: 2b00 cmp r3, #0
8004e82: d008 beq.n 8004e96 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
8004e84: 4b0e ldr r3, [pc, #56] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004e86: 685b ldr r3, [r3, #4]
8004e88: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8004e8c: 687b ldr r3, [r7, #4]
8004e8e: 689b ldr r3, [r3, #8]
8004e90: 490b ldr r1, [pc, #44] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004e92: 4313 orrs r3, r2
8004e94: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8004e96: 687b ldr r3, [r7, #4]
8004e98: 681b ldr r3, [r3, #0]
8004e9a: f003 0310 and.w r3, r3, #16
8004e9e: 2b00 cmp r3, #0
8004ea0: d008 beq.n 8004eb4 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8004ea2: 4b07 ldr r3, [pc, #28] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004ea4: 685b ldr r3, [r3, #4]
8004ea6: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8004eaa: 687b ldr r3, [r7, #4]
8004eac: 68db ldr r3, [r3, #12]
8004eae: 4904 ldr r1, [pc, #16] @ (8004ec0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8004eb0: 4313 orrs r3, r2
8004eb2: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8004eb4: 2300 movs r3, #0
}
8004eb6: 4618 mov r0, r3
8004eb8: 3718 adds r7, #24
8004eba: 46bd mov sp, r7
8004ebc: bd80 pop {r7, pc}
8004ebe: bf00 nop
8004ec0: 40021000 .word 0x40021000
8004ec4: 40007000 .word 0x40007000
8004ec8: 42420440 .word 0x42420440
08004ecc <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8004ecc: b580 push {r7, lr}
8004ece: b082 sub sp, #8
8004ed0: af00 add r7, sp, #0
8004ed2: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8004ed4: 687b ldr r3, [r7, #4]
8004ed6: 2b00 cmp r3, #0
8004ed8: d101 bne.n 8004ede <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8004eda: 2301 movs r3, #1
8004edc: e041 b.n 8004f62 <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8004ede: 687b ldr r3, [r7, #4]
8004ee0: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8004ee4: b2db uxtb r3, r3
8004ee6: 2b00 cmp r3, #0
8004ee8: d106 bne.n 8004ef8 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8004eea: 687b ldr r3, [r7, #4]
8004eec: 2200 movs r2, #0
8004eee: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8004ef2: 6878 ldr r0, [r7, #4]
8004ef4: f7fc fd1c bl 8001930 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8004ef8: 687b ldr r3, [r7, #4]
8004efa: 2202 movs r2, #2
8004efc: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8004f00: 687b ldr r3, [r7, #4]
8004f02: 681a ldr r2, [r3, #0]
8004f04: 687b ldr r3, [r7, #4]
8004f06: 3304 adds r3, #4
8004f08: 4619 mov r1, r3
8004f0a: 4610 mov r0, r2
8004f0c: f000 fb3e bl 800558c <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8004f10: 687b ldr r3, [r7, #4]
8004f12: 2201 movs r2, #1
8004f14: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8004f18: 687b ldr r3, [r7, #4]
8004f1a: 2201 movs r2, #1
8004f1c: f883 203e strb.w r2, [r3, #62] @ 0x3e
8004f20: 687b ldr r3, [r7, #4]
8004f22: 2201 movs r2, #1
8004f24: f883 203f strb.w r2, [r3, #63] @ 0x3f
8004f28: 687b ldr r3, [r7, #4]
8004f2a: 2201 movs r2, #1
8004f2c: f883 2040 strb.w r2, [r3, #64] @ 0x40
8004f30: 687b ldr r3, [r7, #4]
8004f32: 2201 movs r2, #1
8004f34: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8004f38: 687b ldr r3, [r7, #4]
8004f3a: 2201 movs r2, #1
8004f3c: f883 2042 strb.w r2, [r3, #66] @ 0x42
8004f40: 687b ldr r3, [r7, #4]
8004f42: 2201 movs r2, #1
8004f44: f883 2043 strb.w r2, [r3, #67] @ 0x43
8004f48: 687b ldr r3, [r7, #4]
8004f4a: 2201 movs r2, #1
8004f4c: f883 2044 strb.w r2, [r3, #68] @ 0x44
8004f50: 687b ldr r3, [r7, #4]
8004f52: 2201 movs r2, #1
8004f54: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8004f58: 687b ldr r3, [r7, #4]
8004f5a: 2201 movs r2, #1
8004f5c: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8004f60: 2300 movs r3, #0
}
8004f62: 4618 mov r0, r3
8004f64: 3708 adds r7, #8
8004f66: 46bd mov sp, r7
8004f68: bd80 pop {r7, pc}
08004f6a <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8004f6a: b580 push {r7, lr}
8004f6c: b082 sub sp, #8
8004f6e: af00 add r7, sp, #0
8004f70: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8004f72: 687b ldr r3, [r7, #4]
8004f74: 2b00 cmp r3, #0
8004f76: d101 bne.n 8004f7c <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8004f78: 2301 movs r3, #1
8004f7a: e041 b.n 8005000 <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8004f7c: 687b ldr r3, [r7, #4]
8004f7e: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8004f82: b2db uxtb r3, r3
8004f84: 2b00 cmp r3, #0
8004f86: d106 bne.n 8004f96 <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8004f88: 687b ldr r3, [r7, #4]
8004f8a: 2200 movs r2, #0
8004f8c: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
8004f90: 6878 ldr r0, [r7, #4]
8004f92: f000 f839 bl 8005008 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8004f96: 687b ldr r3, [r7, #4]
8004f98: 2202 movs r2, #2
8004f9a: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8004f9e: 687b ldr r3, [r7, #4]
8004fa0: 681a ldr r2, [r3, #0]
8004fa2: 687b ldr r3, [r7, #4]
8004fa4: 3304 adds r3, #4
8004fa6: 4619 mov r1, r3
8004fa8: 4610 mov r0, r2
8004faa: f000 faef bl 800558c <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8004fae: 687b ldr r3, [r7, #4]
8004fb0: 2201 movs r2, #1
8004fb2: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8004fb6: 687b ldr r3, [r7, #4]
8004fb8: 2201 movs r2, #1
8004fba: f883 203e strb.w r2, [r3, #62] @ 0x3e
8004fbe: 687b ldr r3, [r7, #4]
8004fc0: 2201 movs r2, #1
8004fc2: f883 203f strb.w r2, [r3, #63] @ 0x3f
8004fc6: 687b ldr r3, [r7, #4]
8004fc8: 2201 movs r2, #1
8004fca: f883 2040 strb.w r2, [r3, #64] @ 0x40
8004fce: 687b ldr r3, [r7, #4]
8004fd0: 2201 movs r2, #1
8004fd2: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8004fd6: 687b ldr r3, [r7, #4]
8004fd8: 2201 movs r2, #1
8004fda: f883 2042 strb.w r2, [r3, #66] @ 0x42
8004fde: 687b ldr r3, [r7, #4]
8004fe0: 2201 movs r2, #1
8004fe2: f883 2043 strb.w r2, [r3, #67] @ 0x43
8004fe6: 687b ldr r3, [r7, #4]
8004fe8: 2201 movs r2, #1
8004fea: f883 2044 strb.w r2, [r3, #68] @ 0x44
8004fee: 687b ldr r3, [r7, #4]
8004ff0: 2201 movs r2, #1
8004ff2: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8004ff6: 687b ldr r3, [r7, #4]
8004ff8: 2201 movs r2, #1
8004ffa: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8004ffe: 2300 movs r3, #0
}
8005000: 4618 mov r0, r3
8005002: 3708 adds r7, #8
8005004: 46bd mov sp, r7
8005006: bd80 pop {r7, pc}
08005008 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8005008: b480 push {r7}
800500a: b083 sub sp, #12
800500c: af00 add r7, sp, #0
800500e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8005010: bf00 nop
8005012: 370c adds r7, #12
8005014: 46bd mov sp, r7
8005016: bc80 pop {r7}
8005018: 4770 bx lr
...
0800501c <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
800501c: b580 push {r7, lr}
800501e: b084 sub sp, #16
8005020: af00 add r7, sp, #0
8005022: 6078 str r0, [r7, #4]
8005024: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8005026: 683b ldr r3, [r7, #0]
8005028: 2b00 cmp r3, #0
800502a: d109 bne.n 8005040 <HAL_TIM_PWM_Start+0x24>
800502c: 687b ldr r3, [r7, #4]
800502e: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8005032: b2db uxtb r3, r3
8005034: 2b01 cmp r3, #1
8005036: bf14 ite ne
8005038: 2301 movne r3, #1
800503a: 2300 moveq r3, #0
800503c: b2db uxtb r3, r3
800503e: e022 b.n 8005086 <HAL_TIM_PWM_Start+0x6a>
8005040: 683b ldr r3, [r7, #0]
8005042: 2b04 cmp r3, #4
8005044: d109 bne.n 800505a <HAL_TIM_PWM_Start+0x3e>
8005046: 687b ldr r3, [r7, #4]
8005048: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
800504c: b2db uxtb r3, r3
800504e: 2b01 cmp r3, #1
8005050: bf14 ite ne
8005052: 2301 movne r3, #1
8005054: 2300 moveq r3, #0
8005056: b2db uxtb r3, r3
8005058: e015 b.n 8005086 <HAL_TIM_PWM_Start+0x6a>
800505a: 683b ldr r3, [r7, #0]
800505c: 2b08 cmp r3, #8
800505e: d109 bne.n 8005074 <HAL_TIM_PWM_Start+0x58>
8005060: 687b ldr r3, [r7, #4]
8005062: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8005066: b2db uxtb r3, r3
8005068: 2b01 cmp r3, #1
800506a: bf14 ite ne
800506c: 2301 movne r3, #1
800506e: 2300 moveq r3, #0
8005070: b2db uxtb r3, r3
8005072: e008 b.n 8005086 <HAL_TIM_PWM_Start+0x6a>
8005074: 687b ldr r3, [r7, #4]
8005076: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
800507a: b2db uxtb r3, r3
800507c: 2b01 cmp r3, #1
800507e: bf14 ite ne
8005080: 2301 movne r3, #1
8005082: 2300 moveq r3, #0
8005084: b2db uxtb r3, r3
8005086: 2b00 cmp r3, #0
8005088: d001 beq.n 800508e <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
800508a: 2301 movs r3, #1
800508c: e05e b.n 800514c <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
800508e: 683b ldr r3, [r7, #0]
8005090: 2b00 cmp r3, #0
8005092: d104 bne.n 800509e <HAL_TIM_PWM_Start+0x82>
8005094: 687b ldr r3, [r7, #4]
8005096: 2202 movs r2, #2
8005098: f883 203e strb.w r2, [r3, #62] @ 0x3e
800509c: e013 b.n 80050c6 <HAL_TIM_PWM_Start+0xaa>
800509e: 683b ldr r3, [r7, #0]
80050a0: 2b04 cmp r3, #4
80050a2: d104 bne.n 80050ae <HAL_TIM_PWM_Start+0x92>
80050a4: 687b ldr r3, [r7, #4]
80050a6: 2202 movs r2, #2
80050a8: f883 203f strb.w r2, [r3, #63] @ 0x3f
80050ac: e00b b.n 80050c6 <HAL_TIM_PWM_Start+0xaa>
80050ae: 683b ldr r3, [r7, #0]
80050b0: 2b08 cmp r3, #8
80050b2: d104 bne.n 80050be <HAL_TIM_PWM_Start+0xa2>
80050b4: 687b ldr r3, [r7, #4]
80050b6: 2202 movs r2, #2
80050b8: f883 2040 strb.w r2, [r3, #64] @ 0x40
80050bc: e003 b.n 80050c6 <HAL_TIM_PWM_Start+0xaa>
80050be: 687b ldr r3, [r7, #4]
80050c0: 2202 movs r2, #2
80050c2: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
80050c6: 687b ldr r3, [r7, #4]
80050c8: 681b ldr r3, [r3, #0]
80050ca: 2201 movs r2, #1
80050cc: 6839 ldr r1, [r7, #0]
80050ce: 4618 mov r0, r3
80050d0: f000 fce8 bl 8005aa4 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
80050d4: 687b ldr r3, [r7, #4]
80050d6: 681b ldr r3, [r3, #0]
80050d8: 4a1e ldr r2, [pc, #120] @ (8005154 <HAL_TIM_PWM_Start+0x138>)
80050da: 4293 cmp r3, r2
80050dc: d107 bne.n 80050ee <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
80050de: 687b ldr r3, [r7, #4]
80050e0: 681b ldr r3, [r3, #0]
80050e2: 6c5a ldr r2, [r3, #68] @ 0x44
80050e4: 687b ldr r3, [r7, #4]
80050e6: 681b ldr r3, [r3, #0]
80050e8: f442 4200 orr.w r2, r2, #32768 @ 0x8000
80050ec: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
80050ee: 687b ldr r3, [r7, #4]
80050f0: 681b ldr r3, [r3, #0]
80050f2: 4a18 ldr r2, [pc, #96] @ (8005154 <HAL_TIM_PWM_Start+0x138>)
80050f4: 4293 cmp r3, r2
80050f6: d00e beq.n 8005116 <HAL_TIM_PWM_Start+0xfa>
80050f8: 687b ldr r3, [r7, #4]
80050fa: 681b ldr r3, [r3, #0]
80050fc: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8005100: d009 beq.n 8005116 <HAL_TIM_PWM_Start+0xfa>
8005102: 687b ldr r3, [r7, #4]
8005104: 681b ldr r3, [r3, #0]
8005106: 4a14 ldr r2, [pc, #80] @ (8005158 <HAL_TIM_PWM_Start+0x13c>)
8005108: 4293 cmp r3, r2
800510a: d004 beq.n 8005116 <HAL_TIM_PWM_Start+0xfa>
800510c: 687b ldr r3, [r7, #4]
800510e: 681b ldr r3, [r3, #0]
8005110: 4a12 ldr r2, [pc, #72] @ (800515c <HAL_TIM_PWM_Start+0x140>)
8005112: 4293 cmp r3, r2
8005114: d111 bne.n 800513a <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8005116: 687b ldr r3, [r7, #4]
8005118: 681b ldr r3, [r3, #0]
800511a: 689b ldr r3, [r3, #8]
800511c: f003 0307 and.w r3, r3, #7
8005120: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8005122: 68fb ldr r3, [r7, #12]
8005124: 2b06 cmp r3, #6
8005126: d010 beq.n 800514a <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8005128: 687b ldr r3, [r7, #4]
800512a: 681b ldr r3, [r3, #0]
800512c: 681a ldr r2, [r3, #0]
800512e: 687b ldr r3, [r7, #4]
8005130: 681b ldr r3, [r3, #0]
8005132: f042 0201 orr.w r2, r2, #1
8005136: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8005138: e007 b.n 800514a <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
800513a: 687b ldr r3, [r7, #4]
800513c: 681b ldr r3, [r3, #0]
800513e: 681a ldr r2, [r3, #0]
8005140: 687b ldr r3, [r7, #4]
8005142: 681b ldr r3, [r3, #0]
8005144: f042 0201 orr.w r2, r2, #1
8005148: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
800514a: 2300 movs r3, #0
}
800514c: 4618 mov r0, r3
800514e: 3710 adds r7, #16
8005150: 46bd mov sp, r7
8005152: bd80 pop {r7, pc}
8005154: 40012c00 .word 0x40012c00
8005158: 40000400 .word 0x40000400
800515c: 40000800 .word 0x40000800
08005160 <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8005160: b580 push {r7, lr}
8005162: b082 sub sp, #8
8005164: af00 add r7, sp, #0
8005166: 6078 str r0, [r7, #4]
8005168: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
800516a: 687b ldr r3, [r7, #4]
800516c: 681b ldr r3, [r3, #0]
800516e: 2200 movs r2, #0
8005170: 6839 ldr r1, [r7, #0]
8005172: 4618 mov r0, r3
8005174: f000 fc96 bl 8005aa4 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8005178: 687b ldr r3, [r7, #4]
800517a: 681b ldr r3, [r3, #0]
800517c: 4a29 ldr r2, [pc, #164] @ (8005224 <HAL_TIM_PWM_Stop+0xc4>)
800517e: 4293 cmp r3, r2
8005180: d117 bne.n 80051b2 <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
8005182: 687b ldr r3, [r7, #4]
8005184: 681b ldr r3, [r3, #0]
8005186: 6a1a ldr r2, [r3, #32]
8005188: f241 1311 movw r3, #4369 @ 0x1111
800518c: 4013 ands r3, r2
800518e: 2b00 cmp r3, #0
8005190: d10f bne.n 80051b2 <HAL_TIM_PWM_Stop+0x52>
8005192: 687b ldr r3, [r7, #4]
8005194: 681b ldr r3, [r3, #0]
8005196: 6a1a ldr r2, [r3, #32]
8005198: f240 4344 movw r3, #1092 @ 0x444
800519c: 4013 ands r3, r2
800519e: 2b00 cmp r3, #0
80051a0: d107 bne.n 80051b2 <HAL_TIM_PWM_Stop+0x52>
80051a2: 687b ldr r3, [r7, #4]
80051a4: 681b ldr r3, [r3, #0]
80051a6: 6c5a ldr r2, [r3, #68] @ 0x44
80051a8: 687b ldr r3, [r7, #4]
80051aa: 681b ldr r3, [r3, #0]
80051ac: f422 4200 bic.w r2, r2, #32768 @ 0x8000
80051b0: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
80051b2: 687b ldr r3, [r7, #4]
80051b4: 681b ldr r3, [r3, #0]
80051b6: 6a1a ldr r2, [r3, #32]
80051b8: f241 1311 movw r3, #4369 @ 0x1111
80051bc: 4013 ands r3, r2
80051be: 2b00 cmp r3, #0
80051c0: d10f bne.n 80051e2 <HAL_TIM_PWM_Stop+0x82>
80051c2: 687b ldr r3, [r7, #4]
80051c4: 681b ldr r3, [r3, #0]
80051c6: 6a1a ldr r2, [r3, #32]
80051c8: f240 4344 movw r3, #1092 @ 0x444
80051cc: 4013 ands r3, r2
80051ce: 2b00 cmp r3, #0
80051d0: d107 bne.n 80051e2 <HAL_TIM_PWM_Stop+0x82>
80051d2: 687b ldr r3, [r7, #4]
80051d4: 681b ldr r3, [r3, #0]
80051d6: 681a ldr r2, [r3, #0]
80051d8: 687b ldr r3, [r7, #4]
80051da: 681b ldr r3, [r3, #0]
80051dc: f022 0201 bic.w r2, r2, #1
80051e0: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
80051e2: 683b ldr r3, [r7, #0]
80051e4: 2b00 cmp r3, #0
80051e6: d104 bne.n 80051f2 <HAL_TIM_PWM_Stop+0x92>
80051e8: 687b ldr r3, [r7, #4]
80051ea: 2201 movs r2, #1
80051ec: f883 203e strb.w r2, [r3, #62] @ 0x3e
80051f0: e013 b.n 800521a <HAL_TIM_PWM_Stop+0xba>
80051f2: 683b ldr r3, [r7, #0]
80051f4: 2b04 cmp r3, #4
80051f6: d104 bne.n 8005202 <HAL_TIM_PWM_Stop+0xa2>
80051f8: 687b ldr r3, [r7, #4]
80051fa: 2201 movs r2, #1
80051fc: f883 203f strb.w r2, [r3, #63] @ 0x3f
8005200: e00b b.n 800521a <HAL_TIM_PWM_Stop+0xba>
8005202: 683b ldr r3, [r7, #0]
8005204: 2b08 cmp r3, #8
8005206: d104 bne.n 8005212 <HAL_TIM_PWM_Stop+0xb2>
8005208: 687b ldr r3, [r7, #4]
800520a: 2201 movs r2, #1
800520c: f883 2040 strb.w r2, [r3, #64] @ 0x40
8005210: e003 b.n 800521a <HAL_TIM_PWM_Stop+0xba>
8005212: 687b ldr r3, [r7, #4]
8005214: 2201 movs r2, #1
8005216: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
800521a: 2300 movs r3, #0
}
800521c: 4618 mov r0, r3
800521e: 3708 adds r7, #8
8005220: 46bd mov sp, r7
8005222: bd80 pop {r7, pc}
8005224: 40012c00 .word 0x40012c00
08005228 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8005228: b580 push {r7, lr}
800522a: b086 sub sp, #24
800522c: af00 add r7, sp, #0
800522e: 60f8 str r0, [r7, #12]
8005230: 60b9 str r1, [r7, #8]
8005232: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8005234: 2300 movs r3, #0
8005236: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8005238: 68fb ldr r3, [r7, #12]
800523a: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
800523e: 2b01 cmp r3, #1
8005240: d101 bne.n 8005246 <HAL_TIM_PWM_ConfigChannel+0x1e>
8005242: 2302 movs r3, #2
8005244: e0ae b.n 80053a4 <HAL_TIM_PWM_ConfigChannel+0x17c>
8005246: 68fb ldr r3, [r7, #12]
8005248: 2201 movs r2, #1
800524a: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
800524e: 687b ldr r3, [r7, #4]
8005250: 2b0c cmp r3, #12
8005252: f200 809f bhi.w 8005394 <HAL_TIM_PWM_ConfigChannel+0x16c>
8005256: a201 add r2, pc, #4 @ (adr r2, 800525c <HAL_TIM_PWM_ConfigChannel+0x34>)
8005258: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800525c: 08005291 .word 0x08005291
8005260: 08005395 .word 0x08005395
8005264: 08005395 .word 0x08005395
8005268: 08005395 .word 0x08005395
800526c: 080052d1 .word 0x080052d1
8005270: 08005395 .word 0x08005395
8005274: 08005395 .word 0x08005395
8005278: 08005395 .word 0x08005395
800527c: 08005313 .word 0x08005313
8005280: 08005395 .word 0x08005395
8005284: 08005395 .word 0x08005395
8005288: 08005395 .word 0x08005395
800528c: 08005353 .word 0x08005353
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
8005290: 68fb ldr r3, [r7, #12]
8005292: 681b ldr r3, [r3, #0]
8005294: 68b9 ldr r1, [r7, #8]
8005296: 4618 mov r0, r3
8005298: f000 f9e6 bl 8005668 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
800529c: 68fb ldr r3, [r7, #12]
800529e: 681b ldr r3, [r3, #0]
80052a0: 699a ldr r2, [r3, #24]
80052a2: 68fb ldr r3, [r7, #12]
80052a4: 681b ldr r3, [r3, #0]
80052a6: f042 0208 orr.w r2, r2, #8
80052aa: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
80052ac: 68fb ldr r3, [r7, #12]
80052ae: 681b ldr r3, [r3, #0]
80052b0: 699a ldr r2, [r3, #24]
80052b2: 68fb ldr r3, [r7, #12]
80052b4: 681b ldr r3, [r3, #0]
80052b6: f022 0204 bic.w r2, r2, #4
80052ba: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
80052bc: 68fb ldr r3, [r7, #12]
80052be: 681b ldr r3, [r3, #0]
80052c0: 6999 ldr r1, [r3, #24]
80052c2: 68bb ldr r3, [r7, #8]
80052c4: 691a ldr r2, [r3, #16]
80052c6: 68fb ldr r3, [r7, #12]
80052c8: 681b ldr r3, [r3, #0]
80052ca: 430a orrs r2, r1
80052cc: 619a str r2, [r3, #24]
break;
80052ce: e064 b.n 800539a <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
80052d0: 68fb ldr r3, [r7, #12]
80052d2: 681b ldr r3, [r3, #0]
80052d4: 68b9 ldr r1, [r7, #8]
80052d6: 4618 mov r0, r3
80052d8: f000 fa2c bl 8005734 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
80052dc: 68fb ldr r3, [r7, #12]
80052de: 681b ldr r3, [r3, #0]
80052e0: 699a ldr r2, [r3, #24]
80052e2: 68fb ldr r3, [r7, #12]
80052e4: 681b ldr r3, [r3, #0]
80052e6: f442 6200 orr.w r2, r2, #2048 @ 0x800
80052ea: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
80052ec: 68fb ldr r3, [r7, #12]
80052ee: 681b ldr r3, [r3, #0]
80052f0: 699a ldr r2, [r3, #24]
80052f2: 68fb ldr r3, [r7, #12]
80052f4: 681b ldr r3, [r3, #0]
80052f6: f422 6280 bic.w r2, r2, #1024 @ 0x400
80052fa: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
80052fc: 68fb ldr r3, [r7, #12]
80052fe: 681b ldr r3, [r3, #0]
8005300: 6999 ldr r1, [r3, #24]
8005302: 68bb ldr r3, [r7, #8]
8005304: 691b ldr r3, [r3, #16]
8005306: 021a lsls r2, r3, #8
8005308: 68fb ldr r3, [r7, #12]
800530a: 681b ldr r3, [r3, #0]
800530c: 430a orrs r2, r1
800530e: 619a str r2, [r3, #24]
break;
8005310: e043 b.n 800539a <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8005312: 68fb ldr r3, [r7, #12]
8005314: 681b ldr r3, [r3, #0]
8005316: 68b9 ldr r1, [r7, #8]
8005318: 4618 mov r0, r3
800531a: f000 fa75 bl 8005808 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
800531e: 68fb ldr r3, [r7, #12]
8005320: 681b ldr r3, [r3, #0]
8005322: 69da ldr r2, [r3, #28]
8005324: 68fb ldr r3, [r7, #12]
8005326: 681b ldr r3, [r3, #0]
8005328: f042 0208 orr.w r2, r2, #8
800532c: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
800532e: 68fb ldr r3, [r7, #12]
8005330: 681b ldr r3, [r3, #0]
8005332: 69da ldr r2, [r3, #28]
8005334: 68fb ldr r3, [r7, #12]
8005336: 681b ldr r3, [r3, #0]
8005338: f022 0204 bic.w r2, r2, #4
800533c: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
800533e: 68fb ldr r3, [r7, #12]
8005340: 681b ldr r3, [r3, #0]
8005342: 69d9 ldr r1, [r3, #28]
8005344: 68bb ldr r3, [r7, #8]
8005346: 691a ldr r2, [r3, #16]
8005348: 68fb ldr r3, [r7, #12]
800534a: 681b ldr r3, [r3, #0]
800534c: 430a orrs r2, r1
800534e: 61da str r2, [r3, #28]
break;
8005350: e023 b.n 800539a <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
8005352: 68fb ldr r3, [r7, #12]
8005354: 681b ldr r3, [r3, #0]
8005356: 68b9 ldr r1, [r7, #8]
8005358: 4618 mov r0, r3
800535a: f000 fabf bl 80058dc <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
800535e: 68fb ldr r3, [r7, #12]
8005360: 681b ldr r3, [r3, #0]
8005362: 69da ldr r2, [r3, #28]
8005364: 68fb ldr r3, [r7, #12]
8005366: 681b ldr r3, [r3, #0]
8005368: f442 6200 orr.w r2, r2, #2048 @ 0x800
800536c: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
800536e: 68fb ldr r3, [r7, #12]
8005370: 681b ldr r3, [r3, #0]
8005372: 69da ldr r2, [r3, #28]
8005374: 68fb ldr r3, [r7, #12]
8005376: 681b ldr r3, [r3, #0]
8005378: f422 6280 bic.w r2, r2, #1024 @ 0x400
800537c: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
800537e: 68fb ldr r3, [r7, #12]
8005380: 681b ldr r3, [r3, #0]
8005382: 69d9 ldr r1, [r3, #28]
8005384: 68bb ldr r3, [r7, #8]
8005386: 691b ldr r3, [r3, #16]
8005388: 021a lsls r2, r3, #8
800538a: 68fb ldr r3, [r7, #12]
800538c: 681b ldr r3, [r3, #0]
800538e: 430a orrs r2, r1
8005390: 61da str r2, [r3, #28]
break;
8005392: e002 b.n 800539a <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
8005394: 2301 movs r3, #1
8005396: 75fb strb r3, [r7, #23]
break;
8005398: bf00 nop
}
__HAL_UNLOCK(htim);
800539a: 68fb ldr r3, [r7, #12]
800539c: 2200 movs r2, #0
800539e: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
80053a2: 7dfb ldrb r3, [r7, #23]
}
80053a4: 4618 mov r0, r3
80053a6: 3718 adds r7, #24
80053a8: 46bd mov sp, r7
80053aa: bd80 pop {r7, pc}
080053ac <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
80053ac: b580 push {r7, lr}
80053ae: b084 sub sp, #16
80053b0: af00 add r7, sp, #0
80053b2: 6078 str r0, [r7, #4]
80053b4: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
80053b6: 2300 movs r3, #0
80053b8: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
80053ba: 687b ldr r3, [r7, #4]
80053bc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
80053c0: 2b01 cmp r3, #1
80053c2: d101 bne.n 80053c8 <HAL_TIM_ConfigClockSource+0x1c>
80053c4: 2302 movs r3, #2
80053c6: e0b4 b.n 8005532 <HAL_TIM_ConfigClockSource+0x186>
80053c8: 687b ldr r3, [r7, #4]
80053ca: 2201 movs r2, #1
80053cc: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
80053d0: 687b ldr r3, [r7, #4]
80053d2: 2202 movs r2, #2
80053d4: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
80053d8: 687b ldr r3, [r7, #4]
80053da: 681b ldr r3, [r3, #0]
80053dc: 689b ldr r3, [r3, #8]
80053de: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
80053e0: 68bb ldr r3, [r7, #8]
80053e2: f023 0377 bic.w r3, r3, #119 @ 0x77
80053e6: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
80053e8: 68bb ldr r3, [r7, #8]
80053ea: f423 437f bic.w r3, r3, #65280 @ 0xff00
80053ee: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
80053f0: 687b ldr r3, [r7, #4]
80053f2: 681b ldr r3, [r3, #0]
80053f4: 68ba ldr r2, [r7, #8]
80053f6: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
80053f8: 683b ldr r3, [r7, #0]
80053fa: 681b ldr r3, [r3, #0]
80053fc: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8005400: d03e beq.n 8005480 <HAL_TIM_ConfigClockSource+0xd4>
8005402: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8005406: f200 8087 bhi.w 8005518 <HAL_TIM_ConfigClockSource+0x16c>
800540a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800540e: f000 8086 beq.w 800551e <HAL_TIM_ConfigClockSource+0x172>
8005412: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8005416: d87f bhi.n 8005518 <HAL_TIM_ConfigClockSource+0x16c>
8005418: 2b70 cmp r3, #112 @ 0x70
800541a: d01a beq.n 8005452 <HAL_TIM_ConfigClockSource+0xa6>
800541c: 2b70 cmp r3, #112 @ 0x70
800541e: d87b bhi.n 8005518 <HAL_TIM_ConfigClockSource+0x16c>
8005420: 2b60 cmp r3, #96 @ 0x60
8005422: d050 beq.n 80054c6 <HAL_TIM_ConfigClockSource+0x11a>
8005424: 2b60 cmp r3, #96 @ 0x60
8005426: d877 bhi.n 8005518 <HAL_TIM_ConfigClockSource+0x16c>
8005428: 2b50 cmp r3, #80 @ 0x50
800542a: d03c beq.n 80054a6 <HAL_TIM_ConfigClockSource+0xfa>
800542c: 2b50 cmp r3, #80 @ 0x50
800542e: d873 bhi.n 8005518 <HAL_TIM_ConfigClockSource+0x16c>
8005430: 2b40 cmp r3, #64 @ 0x40
8005432: d058 beq.n 80054e6 <HAL_TIM_ConfigClockSource+0x13a>
8005434: 2b40 cmp r3, #64 @ 0x40
8005436: d86f bhi.n 8005518 <HAL_TIM_ConfigClockSource+0x16c>
8005438: 2b30 cmp r3, #48 @ 0x30
800543a: d064 beq.n 8005506 <HAL_TIM_ConfigClockSource+0x15a>
800543c: 2b30 cmp r3, #48 @ 0x30
800543e: d86b bhi.n 8005518 <HAL_TIM_ConfigClockSource+0x16c>
8005440: 2b20 cmp r3, #32
8005442: d060 beq.n 8005506 <HAL_TIM_ConfigClockSource+0x15a>
8005444: 2b20 cmp r3, #32
8005446: d867 bhi.n 8005518 <HAL_TIM_ConfigClockSource+0x16c>
8005448: 2b00 cmp r3, #0
800544a: d05c beq.n 8005506 <HAL_TIM_ConfigClockSource+0x15a>
800544c: 2b10 cmp r3, #16
800544e: d05a beq.n 8005506 <HAL_TIM_ConfigClockSource+0x15a>
8005450: e062 b.n 8005518 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8005452: 687b ldr r3, [r7, #4]
8005454: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8005456: 683b ldr r3, [r7, #0]
8005458: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
800545a: 683b ldr r3, [r7, #0]
800545c: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
800545e: 683b ldr r3, [r7, #0]
8005460: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8005462: f000 fb00 bl 8005a66 <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
8005466: 687b ldr r3, [r7, #4]
8005468: 681b ldr r3, [r3, #0]
800546a: 689b ldr r3, [r3, #8]
800546c: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
800546e: 68bb ldr r3, [r7, #8]
8005470: f043 0377 orr.w r3, r3, #119 @ 0x77
8005474: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8005476: 687b ldr r3, [r7, #4]
8005478: 681b ldr r3, [r3, #0]
800547a: 68ba ldr r2, [r7, #8]
800547c: 609a str r2, [r3, #8]
break;
800547e: e04f b.n 8005520 <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8005480: 687b ldr r3, [r7, #4]
8005482: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8005484: 683b ldr r3, [r7, #0]
8005486: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8005488: 683b ldr r3, [r7, #0]
800548a: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
800548c: 683b ldr r3, [r7, #0]
800548e: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8005490: f000 fae9 bl 8005a66 <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
8005494: 687b ldr r3, [r7, #4]
8005496: 681b ldr r3, [r3, #0]
8005498: 689a ldr r2, [r3, #8]
800549a: 687b ldr r3, [r7, #4]
800549c: 681b ldr r3, [r3, #0]
800549e: f442 4280 orr.w r2, r2, #16384 @ 0x4000
80054a2: 609a str r2, [r3, #8]
break;
80054a4: e03c b.n 8005520 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
80054a6: 687b ldr r3, [r7, #4]
80054a8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80054aa: 683b ldr r3, [r7, #0]
80054ac: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80054ae: 683b ldr r3, [r7, #0]
80054b0: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
80054b2: 461a mov r2, r3
80054b4: f000 fa60 bl 8005978 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
80054b8: 687b ldr r3, [r7, #4]
80054ba: 681b ldr r3, [r3, #0]
80054bc: 2150 movs r1, #80 @ 0x50
80054be: 4618 mov r0, r3
80054c0: f000 fab7 bl 8005a32 <TIM_ITRx_SetConfig>
break;
80054c4: e02c b.n 8005520 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
80054c6: 687b ldr r3, [r7, #4]
80054c8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80054ca: 683b ldr r3, [r7, #0]
80054cc: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80054ce: 683b ldr r3, [r7, #0]
80054d0: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
80054d2: 461a mov r2, r3
80054d4: f000 fa7e bl 80059d4 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
80054d8: 687b ldr r3, [r7, #4]
80054da: 681b ldr r3, [r3, #0]
80054dc: 2160 movs r1, #96 @ 0x60
80054de: 4618 mov r0, r3
80054e0: f000 faa7 bl 8005a32 <TIM_ITRx_SetConfig>
break;
80054e4: e01c b.n 8005520 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
80054e6: 687b ldr r3, [r7, #4]
80054e8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80054ea: 683b ldr r3, [r7, #0]
80054ec: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80054ee: 683b ldr r3, [r7, #0]
80054f0: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
80054f2: 461a mov r2, r3
80054f4: f000 fa40 bl 8005978 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
80054f8: 687b ldr r3, [r7, #4]
80054fa: 681b ldr r3, [r3, #0]
80054fc: 2140 movs r1, #64 @ 0x40
80054fe: 4618 mov r0, r3
8005500: f000 fa97 bl 8005a32 <TIM_ITRx_SetConfig>
break;
8005504: e00c b.n 8005520 <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
8005506: 687b ldr r3, [r7, #4]
8005508: 681a ldr r2, [r3, #0]
800550a: 683b ldr r3, [r7, #0]
800550c: 681b ldr r3, [r3, #0]
800550e: 4619 mov r1, r3
8005510: 4610 mov r0, r2
8005512: f000 fa8e bl 8005a32 <TIM_ITRx_SetConfig>
break;
8005516: e003 b.n 8005520 <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8005518: 2301 movs r3, #1
800551a: 73fb strb r3, [r7, #15]
break;
800551c: e000 b.n 8005520 <HAL_TIM_ConfigClockSource+0x174>
break;
800551e: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
8005520: 687b ldr r3, [r7, #4]
8005522: 2201 movs r2, #1
8005524: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8005528: 687b ldr r3, [r7, #4]
800552a: 2200 movs r2, #0
800552c: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8005530: 7bfb ldrb r3, [r7, #15]
}
8005532: 4618 mov r0, r3
8005534: 3710 adds r7, #16
8005536: 46bd mov sp, r7
8005538: bd80 pop {r7, pc}
0800553a <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
800553a: b480 push {r7}
800553c: b085 sub sp, #20
800553e: af00 add r7, sp, #0
8005540: 6078 str r0, [r7, #4]
8005542: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
8005544: 683b ldr r3, [r7, #0]
8005546: 2b00 cmp r3, #0
8005548: d104 bne.n 8005554 <HAL_TIM_GetChannelState+0x1a>
800554a: 687b ldr r3, [r7, #4]
800554c: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8005550: b2db uxtb r3, r3
8005552: e013 b.n 800557c <HAL_TIM_GetChannelState+0x42>
8005554: 683b ldr r3, [r7, #0]
8005556: 2b04 cmp r3, #4
8005558: d104 bne.n 8005564 <HAL_TIM_GetChannelState+0x2a>
800555a: 687b ldr r3, [r7, #4]
800555c: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8005560: b2db uxtb r3, r3
8005562: e00b b.n 800557c <HAL_TIM_GetChannelState+0x42>
8005564: 683b ldr r3, [r7, #0]
8005566: 2b08 cmp r3, #8
8005568: d104 bne.n 8005574 <HAL_TIM_GetChannelState+0x3a>
800556a: 687b ldr r3, [r7, #4]
800556c: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8005570: b2db uxtb r3, r3
8005572: e003 b.n 800557c <HAL_TIM_GetChannelState+0x42>
8005574: 687b ldr r3, [r7, #4]
8005576: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
800557a: b2db uxtb r3, r3
800557c: 73fb strb r3, [r7, #15]
return channel_state;
800557e: 7bfb ldrb r3, [r7, #15]
}
8005580: 4618 mov r0, r3
8005582: 3714 adds r7, #20
8005584: 46bd mov sp, r7
8005586: bc80 pop {r7}
8005588: 4770 bx lr
...
0800558c <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
800558c: b480 push {r7}
800558e: b085 sub sp, #20
8005590: af00 add r7, sp, #0
8005592: 6078 str r0, [r7, #4]
8005594: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8005596: 687b ldr r3, [r7, #4]
8005598: 681b ldr r3, [r3, #0]
800559a: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
800559c: 687b ldr r3, [r7, #4]
800559e: 4a2f ldr r2, [pc, #188] @ (800565c <TIM_Base_SetConfig+0xd0>)
80055a0: 4293 cmp r3, r2
80055a2: d00b beq.n 80055bc <TIM_Base_SetConfig+0x30>
80055a4: 687b ldr r3, [r7, #4]
80055a6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80055aa: d007 beq.n 80055bc <TIM_Base_SetConfig+0x30>
80055ac: 687b ldr r3, [r7, #4]
80055ae: 4a2c ldr r2, [pc, #176] @ (8005660 <TIM_Base_SetConfig+0xd4>)
80055b0: 4293 cmp r3, r2
80055b2: d003 beq.n 80055bc <TIM_Base_SetConfig+0x30>
80055b4: 687b ldr r3, [r7, #4]
80055b6: 4a2b ldr r2, [pc, #172] @ (8005664 <TIM_Base_SetConfig+0xd8>)
80055b8: 4293 cmp r3, r2
80055ba: d108 bne.n 80055ce <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
80055bc: 68fb ldr r3, [r7, #12]
80055be: f023 0370 bic.w r3, r3, #112 @ 0x70
80055c2: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
80055c4: 683b ldr r3, [r7, #0]
80055c6: 685b ldr r3, [r3, #4]
80055c8: 68fa ldr r2, [r7, #12]
80055ca: 4313 orrs r3, r2
80055cc: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
80055ce: 687b ldr r3, [r7, #4]
80055d0: 4a22 ldr r2, [pc, #136] @ (800565c <TIM_Base_SetConfig+0xd0>)
80055d2: 4293 cmp r3, r2
80055d4: d00b beq.n 80055ee <TIM_Base_SetConfig+0x62>
80055d6: 687b ldr r3, [r7, #4]
80055d8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80055dc: d007 beq.n 80055ee <TIM_Base_SetConfig+0x62>
80055de: 687b ldr r3, [r7, #4]
80055e0: 4a1f ldr r2, [pc, #124] @ (8005660 <TIM_Base_SetConfig+0xd4>)
80055e2: 4293 cmp r3, r2
80055e4: d003 beq.n 80055ee <TIM_Base_SetConfig+0x62>
80055e6: 687b ldr r3, [r7, #4]
80055e8: 4a1e ldr r2, [pc, #120] @ (8005664 <TIM_Base_SetConfig+0xd8>)
80055ea: 4293 cmp r3, r2
80055ec: d108 bne.n 8005600 <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
80055ee: 68fb ldr r3, [r7, #12]
80055f0: f423 7340 bic.w r3, r3, #768 @ 0x300
80055f4: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
80055f6: 683b ldr r3, [r7, #0]
80055f8: 68db ldr r3, [r3, #12]
80055fa: 68fa ldr r2, [r7, #12]
80055fc: 4313 orrs r3, r2
80055fe: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8005600: 68fb ldr r3, [r7, #12]
8005602: f023 0280 bic.w r2, r3, #128 @ 0x80
8005606: 683b ldr r3, [r7, #0]
8005608: 695b ldr r3, [r3, #20]
800560a: 4313 orrs r3, r2
800560c: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
800560e: 687b ldr r3, [r7, #4]
8005610: 68fa ldr r2, [r7, #12]
8005612: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8005614: 683b ldr r3, [r7, #0]
8005616: 689a ldr r2, [r3, #8]
8005618: 687b ldr r3, [r7, #4]
800561a: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
800561c: 683b ldr r3, [r7, #0]
800561e: 681a ldr r2, [r3, #0]
8005620: 687b ldr r3, [r7, #4]
8005622: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8005624: 687b ldr r3, [r7, #4]
8005626: 4a0d ldr r2, [pc, #52] @ (800565c <TIM_Base_SetConfig+0xd0>)
8005628: 4293 cmp r3, r2
800562a: d103 bne.n 8005634 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
800562c: 683b ldr r3, [r7, #0]
800562e: 691a ldr r2, [r3, #16]
8005630: 687b ldr r3, [r7, #4]
8005632: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8005634: 687b ldr r3, [r7, #4]
8005636: 2201 movs r2, #1
8005638: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
800563a: 687b ldr r3, [r7, #4]
800563c: 691b ldr r3, [r3, #16]
800563e: f003 0301 and.w r3, r3, #1
8005642: 2b00 cmp r3, #0
8005644: d005 beq.n 8005652 <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
8005646: 687b ldr r3, [r7, #4]
8005648: 691b ldr r3, [r3, #16]
800564a: f023 0201 bic.w r2, r3, #1
800564e: 687b ldr r3, [r7, #4]
8005650: 611a str r2, [r3, #16]
}
}
8005652: bf00 nop
8005654: 3714 adds r7, #20
8005656: 46bd mov sp, r7
8005658: bc80 pop {r7}
800565a: 4770 bx lr
800565c: 40012c00 .word 0x40012c00
8005660: 40000400 .word 0x40000400
8005664: 40000800 .word 0x40000800
08005668 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8005668: b480 push {r7}
800566a: b087 sub sp, #28
800566c: af00 add r7, sp, #0
800566e: 6078 str r0, [r7, #4]
8005670: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8005672: 687b ldr r3, [r7, #4]
8005674: 6a1b ldr r3, [r3, #32]
8005676: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
8005678: 687b ldr r3, [r7, #4]
800567a: 6a1b ldr r3, [r3, #32]
800567c: f023 0201 bic.w r2, r3, #1
8005680: 687b ldr r3, [r7, #4]
8005682: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8005684: 687b ldr r3, [r7, #4]
8005686: 685b ldr r3, [r3, #4]
8005688: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
800568a: 687b ldr r3, [r7, #4]
800568c: 699b ldr r3, [r3, #24]
800568e: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
8005690: 68fb ldr r3, [r7, #12]
8005692: f023 0370 bic.w r3, r3, #112 @ 0x70
8005696: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
8005698: 68fb ldr r3, [r7, #12]
800569a: f023 0303 bic.w r3, r3, #3
800569e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
80056a0: 683b ldr r3, [r7, #0]
80056a2: 681b ldr r3, [r3, #0]
80056a4: 68fa ldr r2, [r7, #12]
80056a6: 4313 orrs r3, r2
80056a8: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
80056aa: 697b ldr r3, [r7, #20]
80056ac: f023 0302 bic.w r3, r3, #2
80056b0: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
80056b2: 683b ldr r3, [r7, #0]
80056b4: 689b ldr r3, [r3, #8]
80056b6: 697a ldr r2, [r7, #20]
80056b8: 4313 orrs r3, r2
80056ba: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
80056bc: 687b ldr r3, [r7, #4]
80056be: 4a1c ldr r2, [pc, #112] @ (8005730 <TIM_OC1_SetConfig+0xc8>)
80056c0: 4293 cmp r3, r2
80056c2: d10c bne.n 80056de <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
80056c4: 697b ldr r3, [r7, #20]
80056c6: f023 0308 bic.w r3, r3, #8
80056ca: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
80056cc: 683b ldr r3, [r7, #0]
80056ce: 68db ldr r3, [r3, #12]
80056d0: 697a ldr r2, [r7, #20]
80056d2: 4313 orrs r3, r2
80056d4: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
80056d6: 697b ldr r3, [r7, #20]
80056d8: f023 0304 bic.w r3, r3, #4
80056dc: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80056de: 687b ldr r3, [r7, #4]
80056e0: 4a13 ldr r2, [pc, #76] @ (8005730 <TIM_OC1_SetConfig+0xc8>)
80056e2: 4293 cmp r3, r2
80056e4: d111 bne.n 800570a <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
80056e6: 693b ldr r3, [r7, #16]
80056e8: f423 7380 bic.w r3, r3, #256 @ 0x100
80056ec: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
80056ee: 693b ldr r3, [r7, #16]
80056f0: f423 7300 bic.w r3, r3, #512 @ 0x200
80056f4: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
80056f6: 683b ldr r3, [r7, #0]
80056f8: 695b ldr r3, [r3, #20]
80056fa: 693a ldr r2, [r7, #16]
80056fc: 4313 orrs r3, r2
80056fe: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
8005700: 683b ldr r3, [r7, #0]
8005702: 699b ldr r3, [r3, #24]
8005704: 693a ldr r2, [r7, #16]
8005706: 4313 orrs r3, r2
8005708: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800570a: 687b ldr r3, [r7, #4]
800570c: 693a ldr r2, [r7, #16]
800570e: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8005710: 687b ldr r3, [r7, #4]
8005712: 68fa ldr r2, [r7, #12]
8005714: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8005716: 683b ldr r3, [r7, #0]
8005718: 685a ldr r2, [r3, #4]
800571a: 687b ldr r3, [r7, #4]
800571c: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800571e: 687b ldr r3, [r7, #4]
8005720: 697a ldr r2, [r7, #20]
8005722: 621a str r2, [r3, #32]
}
8005724: bf00 nop
8005726: 371c adds r7, #28
8005728: 46bd mov sp, r7
800572a: bc80 pop {r7}
800572c: 4770 bx lr
800572e: bf00 nop
8005730: 40012c00 .word 0x40012c00
08005734 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8005734: b480 push {r7}
8005736: b087 sub sp, #28
8005738: af00 add r7, sp, #0
800573a: 6078 str r0, [r7, #4]
800573c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800573e: 687b ldr r3, [r7, #4]
8005740: 6a1b ldr r3, [r3, #32]
8005742: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
8005744: 687b ldr r3, [r7, #4]
8005746: 6a1b ldr r3, [r3, #32]
8005748: f023 0210 bic.w r2, r3, #16
800574c: 687b ldr r3, [r7, #4]
800574e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8005750: 687b ldr r3, [r7, #4]
8005752: 685b ldr r3, [r3, #4]
8005754: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8005756: 687b ldr r3, [r7, #4]
8005758: 699b ldr r3, [r3, #24]
800575a: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
800575c: 68fb ldr r3, [r7, #12]
800575e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005762: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
8005764: 68fb ldr r3, [r7, #12]
8005766: f423 7340 bic.w r3, r3, #768 @ 0x300
800576a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
800576c: 683b ldr r3, [r7, #0]
800576e: 681b ldr r3, [r3, #0]
8005770: 021b lsls r3, r3, #8
8005772: 68fa ldr r2, [r7, #12]
8005774: 4313 orrs r3, r2
8005776: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
8005778: 697b ldr r3, [r7, #20]
800577a: f023 0320 bic.w r3, r3, #32
800577e: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
8005780: 683b ldr r3, [r7, #0]
8005782: 689b ldr r3, [r3, #8]
8005784: 011b lsls r3, r3, #4
8005786: 697a ldr r2, [r7, #20]
8005788: 4313 orrs r3, r2
800578a: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
800578c: 687b ldr r3, [r7, #4]
800578e: 4a1d ldr r2, [pc, #116] @ (8005804 <TIM_OC2_SetConfig+0xd0>)
8005790: 4293 cmp r3, r2
8005792: d10d bne.n 80057b0 <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
8005794: 697b ldr r3, [r7, #20]
8005796: f023 0380 bic.w r3, r3, #128 @ 0x80
800579a: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
800579c: 683b ldr r3, [r7, #0]
800579e: 68db ldr r3, [r3, #12]
80057a0: 011b lsls r3, r3, #4
80057a2: 697a ldr r2, [r7, #20]
80057a4: 4313 orrs r3, r2
80057a6: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
80057a8: 697b ldr r3, [r7, #20]
80057aa: f023 0340 bic.w r3, r3, #64 @ 0x40
80057ae: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80057b0: 687b ldr r3, [r7, #4]
80057b2: 4a14 ldr r2, [pc, #80] @ (8005804 <TIM_OC2_SetConfig+0xd0>)
80057b4: 4293 cmp r3, r2
80057b6: d113 bne.n 80057e0 <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
80057b8: 693b ldr r3, [r7, #16]
80057ba: f423 6380 bic.w r3, r3, #1024 @ 0x400
80057be: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
80057c0: 693b ldr r3, [r7, #16]
80057c2: f423 6300 bic.w r3, r3, #2048 @ 0x800
80057c6: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
80057c8: 683b ldr r3, [r7, #0]
80057ca: 695b ldr r3, [r3, #20]
80057cc: 009b lsls r3, r3, #2
80057ce: 693a ldr r2, [r7, #16]
80057d0: 4313 orrs r3, r2
80057d2: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
80057d4: 683b ldr r3, [r7, #0]
80057d6: 699b ldr r3, [r3, #24]
80057d8: 009b lsls r3, r3, #2
80057da: 693a ldr r2, [r7, #16]
80057dc: 4313 orrs r3, r2
80057de: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80057e0: 687b ldr r3, [r7, #4]
80057e2: 693a ldr r2, [r7, #16]
80057e4: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
80057e6: 687b ldr r3, [r7, #4]
80057e8: 68fa ldr r2, [r7, #12]
80057ea: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
80057ec: 683b ldr r3, [r7, #0]
80057ee: 685a ldr r2, [r3, #4]
80057f0: 687b ldr r3, [r7, #4]
80057f2: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80057f4: 687b ldr r3, [r7, #4]
80057f6: 697a ldr r2, [r7, #20]
80057f8: 621a str r2, [r3, #32]
}
80057fa: bf00 nop
80057fc: 371c adds r7, #28
80057fe: 46bd mov sp, r7
8005800: bc80 pop {r7}
8005802: 4770 bx lr
8005804: 40012c00 .word 0x40012c00
08005808 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8005808: b480 push {r7}
800580a: b087 sub sp, #28
800580c: af00 add r7, sp, #0
800580e: 6078 str r0, [r7, #4]
8005810: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8005812: 687b ldr r3, [r7, #4]
8005814: 6a1b ldr r3, [r3, #32]
8005816: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8005818: 687b ldr r3, [r7, #4]
800581a: 6a1b ldr r3, [r3, #32]
800581c: f423 7280 bic.w r2, r3, #256 @ 0x100
8005820: 687b ldr r3, [r7, #4]
8005822: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8005824: 687b ldr r3, [r7, #4]
8005826: 685b ldr r3, [r3, #4]
8005828: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
800582a: 687b ldr r3, [r7, #4]
800582c: 69db ldr r3, [r3, #28]
800582e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
8005830: 68fb ldr r3, [r7, #12]
8005832: f023 0370 bic.w r3, r3, #112 @ 0x70
8005836: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8005838: 68fb ldr r3, [r7, #12]
800583a: f023 0303 bic.w r3, r3, #3
800583e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8005840: 683b ldr r3, [r7, #0]
8005842: 681b ldr r3, [r3, #0]
8005844: 68fa ldr r2, [r7, #12]
8005846: 4313 orrs r3, r2
8005848: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
800584a: 697b ldr r3, [r7, #20]
800584c: f423 7300 bic.w r3, r3, #512 @ 0x200
8005850: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
8005852: 683b ldr r3, [r7, #0]
8005854: 689b ldr r3, [r3, #8]
8005856: 021b lsls r3, r3, #8
8005858: 697a ldr r2, [r7, #20]
800585a: 4313 orrs r3, r2
800585c: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
800585e: 687b ldr r3, [r7, #4]
8005860: 4a1d ldr r2, [pc, #116] @ (80058d8 <TIM_OC3_SetConfig+0xd0>)
8005862: 4293 cmp r3, r2
8005864: d10d bne.n 8005882 <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
8005866: 697b ldr r3, [r7, #20]
8005868: f423 6300 bic.w r3, r3, #2048 @ 0x800
800586c: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
800586e: 683b ldr r3, [r7, #0]
8005870: 68db ldr r3, [r3, #12]
8005872: 021b lsls r3, r3, #8
8005874: 697a ldr r2, [r7, #20]
8005876: 4313 orrs r3, r2
8005878: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
800587a: 697b ldr r3, [r7, #20]
800587c: f423 6380 bic.w r3, r3, #1024 @ 0x400
8005880: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8005882: 687b ldr r3, [r7, #4]
8005884: 4a14 ldr r2, [pc, #80] @ (80058d8 <TIM_OC3_SetConfig+0xd0>)
8005886: 4293 cmp r3, r2
8005888: d113 bne.n 80058b2 <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
800588a: 693b ldr r3, [r7, #16]
800588c: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8005890: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
8005892: 693b ldr r3, [r7, #16]
8005894: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8005898: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
800589a: 683b ldr r3, [r7, #0]
800589c: 695b ldr r3, [r3, #20]
800589e: 011b lsls r3, r3, #4
80058a0: 693a ldr r2, [r7, #16]
80058a2: 4313 orrs r3, r2
80058a4: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
80058a6: 683b ldr r3, [r7, #0]
80058a8: 699b ldr r3, [r3, #24]
80058aa: 011b lsls r3, r3, #4
80058ac: 693a ldr r2, [r7, #16]
80058ae: 4313 orrs r3, r2
80058b0: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80058b2: 687b ldr r3, [r7, #4]
80058b4: 693a ldr r2, [r7, #16]
80058b6: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
80058b8: 687b ldr r3, [r7, #4]
80058ba: 68fa ldr r2, [r7, #12]
80058bc: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
80058be: 683b ldr r3, [r7, #0]
80058c0: 685a ldr r2, [r3, #4]
80058c2: 687b ldr r3, [r7, #4]
80058c4: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80058c6: 687b ldr r3, [r7, #4]
80058c8: 697a ldr r2, [r7, #20]
80058ca: 621a str r2, [r3, #32]
}
80058cc: bf00 nop
80058ce: 371c adds r7, #28
80058d0: 46bd mov sp, r7
80058d2: bc80 pop {r7}
80058d4: 4770 bx lr
80058d6: bf00 nop
80058d8: 40012c00 .word 0x40012c00
080058dc <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80058dc: b480 push {r7}
80058de: b087 sub sp, #28
80058e0: af00 add r7, sp, #0
80058e2: 6078 str r0, [r7, #4]
80058e4: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80058e6: 687b ldr r3, [r7, #4]
80058e8: 6a1b ldr r3, [r3, #32]
80058ea: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
80058ec: 687b ldr r3, [r7, #4]
80058ee: 6a1b ldr r3, [r3, #32]
80058f0: f423 5280 bic.w r2, r3, #4096 @ 0x1000
80058f4: 687b ldr r3, [r7, #4]
80058f6: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80058f8: 687b ldr r3, [r7, #4]
80058fa: 685b ldr r3, [r3, #4]
80058fc: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
80058fe: 687b ldr r3, [r7, #4]
8005900: 69db ldr r3, [r3, #28]
8005902: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8005904: 68fb ldr r3, [r7, #12]
8005906: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800590a: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
800590c: 68fb ldr r3, [r7, #12]
800590e: f423 7340 bic.w r3, r3, #768 @ 0x300
8005912: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8005914: 683b ldr r3, [r7, #0]
8005916: 681b ldr r3, [r3, #0]
8005918: 021b lsls r3, r3, #8
800591a: 68fa ldr r2, [r7, #12]
800591c: 4313 orrs r3, r2
800591e: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8005920: 693b ldr r3, [r7, #16]
8005922: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8005926: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8005928: 683b ldr r3, [r7, #0]
800592a: 689b ldr r3, [r3, #8]
800592c: 031b lsls r3, r3, #12
800592e: 693a ldr r2, [r7, #16]
8005930: 4313 orrs r3, r2
8005932: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
8005934: 687b ldr r3, [r7, #4]
8005936: 4a0f ldr r2, [pc, #60] @ (8005974 <TIM_OC4_SetConfig+0x98>)
8005938: 4293 cmp r3, r2
800593a: d109 bne.n 8005950 <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
800593c: 697b ldr r3, [r7, #20]
800593e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8005942: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
8005944: 683b ldr r3, [r7, #0]
8005946: 695b ldr r3, [r3, #20]
8005948: 019b lsls r3, r3, #6
800594a: 697a ldr r2, [r7, #20]
800594c: 4313 orrs r3, r2
800594e: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8005950: 687b ldr r3, [r7, #4]
8005952: 697a ldr r2, [r7, #20]
8005954: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8005956: 687b ldr r3, [r7, #4]
8005958: 68fa ldr r2, [r7, #12]
800595a: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
800595c: 683b ldr r3, [r7, #0]
800595e: 685a ldr r2, [r3, #4]
8005960: 687b ldr r3, [r7, #4]
8005962: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8005964: 687b ldr r3, [r7, #4]
8005966: 693a ldr r2, [r7, #16]
8005968: 621a str r2, [r3, #32]
}
800596a: bf00 nop
800596c: 371c adds r7, #28
800596e: 46bd mov sp, r7
8005970: bc80 pop {r7}
8005972: 4770 bx lr
8005974: 40012c00 .word 0x40012c00
08005978 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8005978: b480 push {r7}
800597a: b087 sub sp, #28
800597c: af00 add r7, sp, #0
800597e: 60f8 str r0, [r7, #12]
8005980: 60b9 str r1, [r7, #8]
8005982: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
8005984: 68fb ldr r3, [r7, #12]
8005986: 6a1b ldr r3, [r3, #32]
8005988: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
800598a: 68fb ldr r3, [r7, #12]
800598c: 6a1b ldr r3, [r3, #32]
800598e: f023 0201 bic.w r2, r3, #1
8005992: 68fb ldr r3, [r7, #12]
8005994: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8005996: 68fb ldr r3, [r7, #12]
8005998: 699b ldr r3, [r3, #24]
800599a: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
800599c: 693b ldr r3, [r7, #16]
800599e: f023 03f0 bic.w r3, r3, #240 @ 0xf0
80059a2: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
80059a4: 687b ldr r3, [r7, #4]
80059a6: 011b lsls r3, r3, #4
80059a8: 693a ldr r2, [r7, #16]
80059aa: 4313 orrs r3, r2
80059ac: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
80059ae: 697b ldr r3, [r7, #20]
80059b0: f023 030a bic.w r3, r3, #10
80059b4: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
80059b6: 697a ldr r2, [r7, #20]
80059b8: 68bb ldr r3, [r7, #8]
80059ba: 4313 orrs r3, r2
80059bc: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
80059be: 68fb ldr r3, [r7, #12]
80059c0: 693a ldr r2, [r7, #16]
80059c2: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
80059c4: 68fb ldr r3, [r7, #12]
80059c6: 697a ldr r2, [r7, #20]
80059c8: 621a str r2, [r3, #32]
}
80059ca: bf00 nop
80059cc: 371c adds r7, #28
80059ce: 46bd mov sp, r7
80059d0: bc80 pop {r7}
80059d2: 4770 bx lr
080059d4 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
80059d4: b480 push {r7}
80059d6: b087 sub sp, #28
80059d8: af00 add r7, sp, #0
80059da: 60f8 str r0, [r7, #12]
80059dc: 60b9 str r1, [r7, #8]
80059de: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
80059e0: 68fb ldr r3, [r7, #12]
80059e2: 6a1b ldr r3, [r3, #32]
80059e4: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
80059e6: 68fb ldr r3, [r7, #12]
80059e8: 6a1b ldr r3, [r3, #32]
80059ea: f023 0210 bic.w r2, r3, #16
80059ee: 68fb ldr r3, [r7, #12]
80059f0: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
80059f2: 68fb ldr r3, [r7, #12]
80059f4: 699b ldr r3, [r3, #24]
80059f6: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
80059f8: 693b ldr r3, [r7, #16]
80059fa: f423 4370 bic.w r3, r3, #61440 @ 0xf000
80059fe: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
8005a00: 687b ldr r3, [r7, #4]
8005a02: 031b lsls r3, r3, #12
8005a04: 693a ldr r2, [r7, #16]
8005a06: 4313 orrs r3, r2
8005a08: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8005a0a: 697b ldr r3, [r7, #20]
8005a0c: f023 03a0 bic.w r3, r3, #160 @ 0xa0
8005a10: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
8005a12: 68bb ldr r3, [r7, #8]
8005a14: 011b lsls r3, r3, #4
8005a16: 697a ldr r2, [r7, #20]
8005a18: 4313 orrs r3, r2
8005a1a: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8005a1c: 68fb ldr r3, [r7, #12]
8005a1e: 693a ldr r2, [r7, #16]
8005a20: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8005a22: 68fb ldr r3, [r7, #12]
8005a24: 697a ldr r2, [r7, #20]
8005a26: 621a str r2, [r3, #32]
}
8005a28: bf00 nop
8005a2a: 371c adds r7, #28
8005a2c: 46bd mov sp, r7
8005a2e: bc80 pop {r7}
8005a30: 4770 bx lr
08005a32 <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
8005a32: b480 push {r7}
8005a34: b085 sub sp, #20
8005a36: af00 add r7, sp, #0
8005a38: 6078 str r0, [r7, #4]
8005a3a: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8005a3c: 687b ldr r3, [r7, #4]
8005a3e: 689b ldr r3, [r3, #8]
8005a40: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
8005a42: 68fb ldr r3, [r7, #12]
8005a44: f023 0370 bic.w r3, r3, #112 @ 0x70
8005a48: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
8005a4a: 683a ldr r2, [r7, #0]
8005a4c: 68fb ldr r3, [r7, #12]
8005a4e: 4313 orrs r3, r2
8005a50: f043 0307 orr.w r3, r3, #7
8005a54: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8005a56: 687b ldr r3, [r7, #4]
8005a58: 68fa ldr r2, [r7, #12]
8005a5a: 609a str r2, [r3, #8]
}
8005a5c: bf00 nop
8005a5e: 3714 adds r7, #20
8005a60: 46bd mov sp, r7
8005a62: bc80 pop {r7}
8005a64: 4770 bx lr
08005a66 <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
8005a66: b480 push {r7}
8005a68: b087 sub sp, #28
8005a6a: af00 add r7, sp, #0
8005a6c: 60f8 str r0, [r7, #12]
8005a6e: 60b9 str r1, [r7, #8]
8005a70: 607a str r2, [r7, #4]
8005a72: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
8005a74: 68fb ldr r3, [r7, #12]
8005a76: 689b ldr r3, [r3, #8]
8005a78: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8005a7a: 697b ldr r3, [r7, #20]
8005a7c: f423 437f bic.w r3, r3, #65280 @ 0xff00
8005a80: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
8005a82: 683b ldr r3, [r7, #0]
8005a84: 021a lsls r2, r3, #8
8005a86: 687b ldr r3, [r7, #4]
8005a88: 431a orrs r2, r3
8005a8a: 68bb ldr r3, [r7, #8]
8005a8c: 4313 orrs r3, r2
8005a8e: 697a ldr r2, [r7, #20]
8005a90: 4313 orrs r3, r2
8005a92: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8005a94: 68fb ldr r3, [r7, #12]
8005a96: 697a ldr r2, [r7, #20]
8005a98: 609a str r2, [r3, #8]
}
8005a9a: bf00 nop
8005a9c: 371c adds r7, #28
8005a9e: 46bd mov sp, r7
8005aa0: bc80 pop {r7}
8005aa2: 4770 bx lr
08005aa4 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8005aa4: b480 push {r7}
8005aa6: b087 sub sp, #28
8005aa8: af00 add r7, sp, #0
8005aaa: 60f8 str r0, [r7, #12]
8005aac: 60b9 str r1, [r7, #8]
8005aae: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
8005ab0: 68bb ldr r3, [r7, #8]
8005ab2: f003 031f and.w r3, r3, #31
8005ab6: 2201 movs r2, #1
8005ab8: fa02 f303 lsl.w r3, r2, r3
8005abc: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
8005abe: 68fb ldr r3, [r7, #12]
8005ac0: 6a1a ldr r2, [r3, #32]
8005ac2: 697b ldr r3, [r7, #20]
8005ac4: 43db mvns r3, r3
8005ac6: 401a ands r2, r3
8005ac8: 68fb ldr r3, [r7, #12]
8005aca: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8005acc: 68fb ldr r3, [r7, #12]
8005ace: 6a1a ldr r2, [r3, #32]
8005ad0: 68bb ldr r3, [r7, #8]
8005ad2: f003 031f and.w r3, r3, #31
8005ad6: 6879 ldr r1, [r7, #4]
8005ad8: fa01 f303 lsl.w r3, r1, r3
8005adc: 431a orrs r2, r3
8005ade: 68fb ldr r3, [r7, #12]
8005ae0: 621a str r2, [r3, #32]
}
8005ae2: bf00 nop
8005ae4: 371c adds r7, #28
8005ae6: 46bd mov sp, r7
8005ae8: bc80 pop {r7}
8005aea: 4770 bx lr
08005aec <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8005aec: b480 push {r7}
8005aee: b085 sub sp, #20
8005af0: af00 add r7, sp, #0
8005af2: 6078 str r0, [r7, #4]
8005af4: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8005af6: 687b ldr r3, [r7, #4]
8005af8: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8005afc: 2b01 cmp r3, #1
8005afe: d101 bne.n 8005b04 <HAL_TIMEx_MasterConfigSynchronization+0x18>
8005b00: 2302 movs r3, #2
8005b02: e046 b.n 8005b92 <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8005b04: 687b ldr r3, [r7, #4]
8005b06: 2201 movs r2, #1
8005b08: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8005b0c: 687b ldr r3, [r7, #4]
8005b0e: 2202 movs r2, #2
8005b10: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8005b14: 687b ldr r3, [r7, #4]
8005b16: 681b ldr r3, [r3, #0]
8005b18: 685b ldr r3, [r3, #4]
8005b1a: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8005b1c: 687b ldr r3, [r7, #4]
8005b1e: 681b ldr r3, [r3, #0]
8005b20: 689b ldr r3, [r3, #8]
8005b22: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8005b24: 68fb ldr r3, [r7, #12]
8005b26: f023 0370 bic.w r3, r3, #112 @ 0x70
8005b2a: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8005b2c: 683b ldr r3, [r7, #0]
8005b2e: 681b ldr r3, [r3, #0]
8005b30: 68fa ldr r2, [r7, #12]
8005b32: 4313 orrs r3, r2
8005b34: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8005b36: 687b ldr r3, [r7, #4]
8005b38: 681b ldr r3, [r3, #0]
8005b3a: 68fa ldr r2, [r7, #12]
8005b3c: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8005b3e: 687b ldr r3, [r7, #4]
8005b40: 681b ldr r3, [r3, #0]
8005b42: 4a16 ldr r2, [pc, #88] @ (8005b9c <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8005b44: 4293 cmp r3, r2
8005b46: d00e beq.n 8005b66 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8005b48: 687b ldr r3, [r7, #4]
8005b4a: 681b ldr r3, [r3, #0]
8005b4c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8005b50: d009 beq.n 8005b66 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8005b52: 687b ldr r3, [r7, #4]
8005b54: 681b ldr r3, [r3, #0]
8005b56: 4a12 ldr r2, [pc, #72] @ (8005ba0 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
8005b58: 4293 cmp r3, r2
8005b5a: d004 beq.n 8005b66 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8005b5c: 687b ldr r3, [r7, #4]
8005b5e: 681b ldr r3, [r3, #0]
8005b60: 4a10 ldr r2, [pc, #64] @ (8005ba4 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
8005b62: 4293 cmp r3, r2
8005b64: d10c bne.n 8005b80 <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8005b66: 68bb ldr r3, [r7, #8]
8005b68: f023 0380 bic.w r3, r3, #128 @ 0x80
8005b6c: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8005b6e: 683b ldr r3, [r7, #0]
8005b70: 685b ldr r3, [r3, #4]
8005b72: 68ba ldr r2, [r7, #8]
8005b74: 4313 orrs r3, r2
8005b76: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8005b78: 687b ldr r3, [r7, #4]
8005b7a: 681b ldr r3, [r3, #0]
8005b7c: 68ba ldr r2, [r7, #8]
8005b7e: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8005b80: 687b ldr r3, [r7, #4]
8005b82: 2201 movs r2, #1
8005b84: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8005b88: 687b ldr r3, [r7, #4]
8005b8a: 2200 movs r2, #0
8005b8c: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
8005b90: 2300 movs r3, #0
}
8005b92: 4618 mov r0, r3
8005b94: 3714 adds r7, #20
8005b96: 46bd mov sp, r7
8005b98: bc80 pop {r7}
8005b9a: 4770 bx lr
8005b9c: 40012c00 .word 0x40012c00
8005ba0: 40000400 .word 0x40000400
8005ba4: 40000800 .word 0x40000800
08005ba8 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8005ba8: b580 push {r7, lr}
8005baa: b082 sub sp, #8
8005bac: af00 add r7, sp, #0
8005bae: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8005bb0: 687b ldr r3, [r7, #4]
8005bb2: 2b00 cmp r3, #0
8005bb4: d101 bne.n 8005bba <HAL_UART_Init+0x12>
{
return HAL_ERROR;
8005bb6: 2301 movs r3, #1
8005bb8: e042 b.n 8005c40 <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
8005bba: 687b ldr r3, [r7, #4]
8005bbc: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8005bc0: b2db uxtb r3, r3
8005bc2: 2b00 cmp r3, #0
8005bc4: d106 bne.n 8005bd4 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
8005bc6: 687b ldr r3, [r7, #4]
8005bc8: 2200 movs r2, #0
8005bca: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
8005bce: 6878 ldr r0, [r7, #4]
8005bd0: f7fb ff32 bl 8001a38 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8005bd4: 687b ldr r3, [r7, #4]
8005bd6: 2224 movs r2, #36 @ 0x24
8005bd8: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
8005bdc: 687b ldr r3, [r7, #4]
8005bde: 681b ldr r3, [r3, #0]
8005be0: 68da ldr r2, [r3, #12]
8005be2: 687b ldr r3, [r7, #4]
8005be4: 681b ldr r3, [r3, #0]
8005be6: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8005bea: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
8005bec: 6878 ldr r0, [r7, #4]
8005bee: f000 f82b bl 8005c48 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
8005bf2: 687b ldr r3, [r7, #4]
8005bf4: 681b ldr r3, [r3, #0]
8005bf6: 691a ldr r2, [r3, #16]
8005bf8: 687b ldr r3, [r7, #4]
8005bfa: 681b ldr r3, [r3, #0]
8005bfc: f422 4290 bic.w r2, r2, #18432 @ 0x4800
8005c00: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
8005c02: 687b ldr r3, [r7, #4]
8005c04: 681b ldr r3, [r3, #0]
8005c06: 695a ldr r2, [r3, #20]
8005c08: 687b ldr r3, [r7, #4]
8005c0a: 681b ldr r3, [r3, #0]
8005c0c: f022 022a bic.w r2, r2, #42 @ 0x2a
8005c10: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
8005c12: 687b ldr r3, [r7, #4]
8005c14: 681b ldr r3, [r3, #0]
8005c16: 68da ldr r2, [r3, #12]
8005c18: 687b ldr r3, [r7, #4]
8005c1a: 681b ldr r3, [r3, #0]
8005c1c: f442 5200 orr.w r2, r2, #8192 @ 0x2000
8005c20: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8005c22: 687b ldr r3, [r7, #4]
8005c24: 2200 movs r2, #0
8005c26: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
8005c28: 687b ldr r3, [r7, #4]
8005c2a: 2220 movs r2, #32
8005c2c: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
8005c30: 687b ldr r3, [r7, #4]
8005c32: 2220 movs r2, #32
8005c34: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
8005c38: 687b ldr r3, [r7, #4]
8005c3a: 2200 movs r2, #0
8005c3c: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
8005c3e: 2300 movs r3, #0
}
8005c40: 4618 mov r0, r3
8005c42: 3708 adds r7, #8
8005c44: 46bd mov sp, r7
8005c46: bd80 pop {r7, pc}
08005c48 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
8005c48: b580 push {r7, lr}
8005c4a: b084 sub sp, #16
8005c4c: af00 add r7, sp, #0
8005c4e: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8005c50: 687b ldr r3, [r7, #4]
8005c52: 681b ldr r3, [r3, #0]
8005c54: 691b ldr r3, [r3, #16]
8005c56: f423 5140 bic.w r1, r3, #12288 @ 0x3000
8005c5a: 687b ldr r3, [r7, #4]
8005c5c: 68da ldr r2, [r3, #12]
8005c5e: 687b ldr r3, [r7, #4]
8005c60: 681b ldr r3, [r3, #0]
8005c62: 430a orrs r2, r1
8005c64: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
8005c66: 687b ldr r3, [r7, #4]
8005c68: 689a ldr r2, [r3, #8]
8005c6a: 687b ldr r3, [r7, #4]
8005c6c: 691b ldr r3, [r3, #16]
8005c6e: 431a orrs r2, r3
8005c70: 687b ldr r3, [r7, #4]
8005c72: 695b ldr r3, [r3, #20]
8005c74: 4313 orrs r3, r2
8005c76: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8005c78: 687b ldr r3, [r7, #4]
8005c7a: 681b ldr r3, [r3, #0]
8005c7c: 68db ldr r3, [r3, #12]
8005c7e: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
8005c82: f023 030c bic.w r3, r3, #12
8005c86: 687a ldr r2, [r7, #4]
8005c88: 6812 ldr r2, [r2, #0]
8005c8a: 68b9 ldr r1, [r7, #8]
8005c8c: 430b orrs r3, r1
8005c8e: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8005c90: 687b ldr r3, [r7, #4]
8005c92: 681b ldr r3, [r3, #0]
8005c94: 695b ldr r3, [r3, #20]
8005c96: f423 7140 bic.w r1, r3, #768 @ 0x300
8005c9a: 687b ldr r3, [r7, #4]
8005c9c: 699a ldr r2, [r3, #24]
8005c9e: 687b ldr r3, [r7, #4]
8005ca0: 681b ldr r3, [r3, #0]
8005ca2: 430a orrs r2, r1
8005ca4: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8005ca6: 687b ldr r3, [r7, #4]
8005ca8: 681b ldr r3, [r3, #0]
8005caa: 4a2c ldr r2, [pc, #176] @ (8005d5c <UART_SetConfig+0x114>)
8005cac: 4293 cmp r3, r2
8005cae: d103 bne.n 8005cb8 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8005cb0: f7ff f824 bl 8004cfc <HAL_RCC_GetPCLK2Freq>
8005cb4: 60f8 str r0, [r7, #12]
8005cb6: e002 b.n 8005cbe <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8005cb8: f7ff f80c bl 8004cd4 <HAL_RCC_GetPCLK1Freq>
8005cbc: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8005cbe: 68fa ldr r2, [r7, #12]
8005cc0: 4613 mov r3, r2
8005cc2: 009b lsls r3, r3, #2
8005cc4: 4413 add r3, r2
8005cc6: 009a lsls r2, r3, #2
8005cc8: 441a add r2, r3
8005cca: 687b ldr r3, [r7, #4]
8005ccc: 685b ldr r3, [r3, #4]
8005cce: 009b lsls r3, r3, #2
8005cd0: fbb2 f3f3 udiv r3, r2, r3
8005cd4: 4a22 ldr r2, [pc, #136] @ (8005d60 <UART_SetConfig+0x118>)
8005cd6: fba2 2303 umull r2, r3, r2, r3
8005cda: 095b lsrs r3, r3, #5
8005cdc: 0119 lsls r1, r3, #4
8005cde: 68fa ldr r2, [r7, #12]
8005ce0: 4613 mov r3, r2
8005ce2: 009b lsls r3, r3, #2
8005ce4: 4413 add r3, r2
8005ce6: 009a lsls r2, r3, #2
8005ce8: 441a add r2, r3
8005cea: 687b ldr r3, [r7, #4]
8005cec: 685b ldr r3, [r3, #4]
8005cee: 009b lsls r3, r3, #2
8005cf0: fbb2 f2f3 udiv r2, r2, r3
8005cf4: 4b1a ldr r3, [pc, #104] @ (8005d60 <UART_SetConfig+0x118>)
8005cf6: fba3 0302 umull r0, r3, r3, r2
8005cfa: 095b lsrs r3, r3, #5
8005cfc: 2064 movs r0, #100 @ 0x64
8005cfe: fb00 f303 mul.w r3, r0, r3
8005d02: 1ad3 subs r3, r2, r3
8005d04: 011b lsls r3, r3, #4
8005d06: 3332 adds r3, #50 @ 0x32
8005d08: 4a15 ldr r2, [pc, #84] @ (8005d60 <UART_SetConfig+0x118>)
8005d0a: fba2 2303 umull r2, r3, r2, r3
8005d0e: 095b lsrs r3, r3, #5
8005d10: f003 03f0 and.w r3, r3, #240 @ 0xf0
8005d14: 4419 add r1, r3
8005d16: 68fa ldr r2, [r7, #12]
8005d18: 4613 mov r3, r2
8005d1a: 009b lsls r3, r3, #2
8005d1c: 4413 add r3, r2
8005d1e: 009a lsls r2, r3, #2
8005d20: 441a add r2, r3
8005d22: 687b ldr r3, [r7, #4]
8005d24: 685b ldr r3, [r3, #4]
8005d26: 009b lsls r3, r3, #2
8005d28: fbb2 f2f3 udiv r2, r2, r3
8005d2c: 4b0c ldr r3, [pc, #48] @ (8005d60 <UART_SetConfig+0x118>)
8005d2e: fba3 0302 umull r0, r3, r3, r2
8005d32: 095b lsrs r3, r3, #5
8005d34: 2064 movs r0, #100 @ 0x64
8005d36: fb00 f303 mul.w r3, r0, r3
8005d3a: 1ad3 subs r3, r2, r3
8005d3c: 011b lsls r3, r3, #4
8005d3e: 3332 adds r3, #50 @ 0x32
8005d40: 4a07 ldr r2, [pc, #28] @ (8005d60 <UART_SetConfig+0x118>)
8005d42: fba2 2303 umull r2, r3, r2, r3
8005d46: 095b lsrs r3, r3, #5
8005d48: f003 020f and.w r2, r3, #15
8005d4c: 687b ldr r3, [r7, #4]
8005d4e: 681b ldr r3, [r3, #0]
8005d50: 440a add r2, r1
8005d52: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
8005d54: bf00 nop
8005d56: 3710 adds r7, #16
8005d58: 46bd mov sp, r7
8005d5a: bd80 pop {r7, pc}
8005d5c: 40013800 .word 0x40013800
8005d60: 51eb851f .word 0x51eb851f
08005d64 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8005d64: b480 push {r7}
8005d66: b085 sub sp, #20
8005d68: af00 add r7, sp, #0
8005d6a: 60f8 str r0, [r7, #12]
8005d6c: 4638 mov r0, r7
8005d6e: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8005d72: 2300 movs r3, #0
}
8005d74: 4618 mov r0, r3
8005d76: 3714 adds r7, #20
8005d78: 46bd mov sp, r7
8005d7a: bc80 pop {r7}
8005d7c: 4770 bx lr
08005d7e <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8005d7e: b480 push {r7}
8005d80: b085 sub sp, #20
8005d82: af00 add r7, sp, #0
8005d84: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8005d86: 687b ldr r3, [r7, #4]
8005d88: 2200 movs r2, #0
8005d8a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8005d8e: f44f 433f mov.w r3, #48896 @ 0xbf00
8005d92: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8005d94: 68fb ldr r3, [r7, #12]
8005d96: b29a uxth r2, r3
8005d98: 687b ldr r3, [r7, #4]
8005d9a: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8005d9e: 2300 movs r3, #0
}
8005da0: 4618 mov r0, r3
8005da2: 3714 adds r7, #20
8005da4: 46bd mov sp, r7
8005da6: bc80 pop {r7}
8005da8: 4770 bx lr
08005daa <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8005daa: b480 push {r7}
8005dac: b085 sub sp, #20
8005dae: af00 add r7, sp, #0
8005db0: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8005db2: f44f 433f mov.w r3, #48896 @ 0xbf00
8005db6: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8005db8: 687b ldr r3, [r7, #4]
8005dba: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8005dbe: b29a uxth r2, r3
8005dc0: 68fb ldr r3, [r7, #12]
8005dc2: b29b uxth r3, r3
8005dc4: 43db mvns r3, r3
8005dc6: b29b uxth r3, r3
8005dc8: 4013 ands r3, r2
8005dca: b29a uxth r2, r3
8005dcc: 687b ldr r3, [r7, #4]
8005dce: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8005dd2: 2300 movs r3, #0
}
8005dd4: 4618 mov r0, r3
8005dd6: 3714 adds r7, #20
8005dd8: 46bd mov sp, r7
8005dda: bc80 pop {r7}
8005ddc: 4770 bx lr
08005dde <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8005dde: b480 push {r7}
8005de0: b083 sub sp, #12
8005de2: af00 add r7, sp, #0
8005de4: 6078 str r0, [r7, #4]
8005de6: 460b mov r3, r1
8005de8: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8005dea: 2300 movs r3, #0
}
8005dec: 4618 mov r0, r3
8005dee: 370c adds r7, #12
8005df0: 46bd mov sp, r7
8005df2: bc80 pop {r7}
8005df4: 4770 bx lr
08005df6 <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8005df6: b480 push {r7}
8005df8: b085 sub sp, #20
8005dfa: af00 add r7, sp, #0
8005dfc: 60f8 str r0, [r7, #12]
8005dfe: 4638 mov r0, r7
8005e00: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8005e04: 68fb ldr r3, [r7, #12]
8005e06: 2201 movs r2, #1
8005e08: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
8005e0c: 68fb ldr r3, [r7, #12]
8005e0e: 2200 movs r2, #0
8005e10: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8005e14: 68fb ldr r3, [r7, #12]
8005e16: 2200 movs r2, #0
8005e18: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
8005e1c: 68fb ldr r3, [r7, #12]
8005e1e: 2200 movs r2, #0
8005e20: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8005e24: 2300 movs r3, #0
}
8005e26: 4618 mov r0, r3
8005e28: 3714 adds r7, #20
8005e2a: 46bd mov sp, r7
8005e2c: bc80 pop {r7}
8005e2e: 4770 bx lr
08005e30 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8005e30: b480 push {r7}
8005e32: b09d sub sp, #116 @ 0x74
8005e34: af00 add r7, sp, #0
8005e36: 6078 str r0, [r7, #4]
8005e38: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
8005e3a: 2300 movs r3, #0
8005e3c: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
8005e40: 687a ldr r2, [r7, #4]
8005e42: 683b ldr r3, [r7, #0]
8005e44: 781b ldrb r3, [r3, #0]
8005e46: 009b lsls r3, r3, #2
8005e48: 4413 add r3, r2
8005e4a: 881b ldrh r3, [r3, #0]
8005e4c: b29b uxth r3, r3
8005e4e: f423 43ec bic.w r3, r3, #30208 @ 0x7600
8005e52: f023 0370 bic.w r3, r3, #112 @ 0x70
8005e56: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
8005e5a: 683b ldr r3, [r7, #0]
8005e5c: 78db ldrb r3, [r3, #3]
8005e5e: 2b03 cmp r3, #3
8005e60: d81f bhi.n 8005ea2 <USB_ActivateEndpoint+0x72>
8005e62: a201 add r2, pc, #4 @ (adr r2, 8005e68 <USB_ActivateEndpoint+0x38>)
8005e64: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005e68: 08005e79 .word 0x08005e79
8005e6c: 08005e95 .word 0x08005e95
8005e70: 08005eab .word 0x08005eab
8005e74: 08005e87 .word 0x08005e87
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8005e78: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8005e7c: f443 7300 orr.w r3, r3, #512 @ 0x200
8005e80: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8005e84: e012 b.n 8005eac <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8005e86: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8005e8a: f443 63c0 orr.w r3, r3, #1536 @ 0x600
8005e8e: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8005e92: e00b b.n 8005eac <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8005e94: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8005e98: f443 6380 orr.w r3, r3, #1024 @ 0x400
8005e9c: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8005ea0: e004 b.n 8005eac <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
8005ea2: 2301 movs r3, #1
8005ea4: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8005ea8: e000 b.n 8005eac <USB_ActivateEndpoint+0x7c>
break;
8005eaa: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8005eac: 687a ldr r2, [r7, #4]
8005eae: 683b ldr r3, [r7, #0]
8005eb0: 781b ldrb r3, [r3, #0]
8005eb2: 009b lsls r3, r3, #2
8005eb4: 441a add r2, r3
8005eb6: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8005eba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005ebe: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005ec2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005ec6: f043 0380 orr.w r3, r3, #128 @ 0x80
8005eca: b29b uxth r3, r3
8005ecc: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8005ece: 687a ldr r2, [r7, #4]
8005ed0: 683b ldr r3, [r7, #0]
8005ed2: 781b ldrb r3, [r3, #0]
8005ed4: 009b lsls r3, r3, #2
8005ed6: 4413 add r3, r2
8005ed8: 881b ldrh r3, [r3, #0]
8005eda: b29b uxth r3, r3
8005edc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005ee0: f023 0370 bic.w r3, r3, #112 @ 0x70
8005ee4: b29b uxth r3, r3
8005ee6: 683a ldr r2, [r7, #0]
8005ee8: 7812 ldrb r2, [r2, #0]
8005eea: 4313 orrs r3, r2
8005eec: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
8005ef0: 687a ldr r2, [r7, #4]
8005ef2: 683b ldr r3, [r7, #0]
8005ef4: 781b ldrb r3, [r3, #0]
8005ef6: 009b lsls r3, r3, #2
8005ef8: 441a add r2, r3
8005efa: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
8005efe: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005f02: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005f06: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005f0a: f043 0380 orr.w r3, r3, #128 @ 0x80
8005f0e: b29b uxth r3, r3
8005f10: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
8005f12: 683b ldr r3, [r7, #0]
8005f14: 7b1b ldrb r3, [r3, #12]
8005f16: 2b00 cmp r3, #0
8005f18: f040 8178 bne.w 800620c <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8005f1c: 683b ldr r3, [r7, #0]
8005f1e: 785b ldrb r3, [r3, #1]
8005f20: 2b00 cmp r3, #0
8005f22: f000 8084 beq.w 800602e <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8005f26: 687b ldr r3, [r7, #4]
8005f28: 61bb str r3, [r7, #24]
8005f2a: 687b ldr r3, [r7, #4]
8005f2c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005f30: b29b uxth r3, r3
8005f32: 461a mov r2, r3
8005f34: 69bb ldr r3, [r7, #24]
8005f36: 4413 add r3, r2
8005f38: 61bb str r3, [r7, #24]
8005f3a: 683b ldr r3, [r7, #0]
8005f3c: 781b ldrb r3, [r3, #0]
8005f3e: 011a lsls r2, r3, #4
8005f40: 69bb ldr r3, [r7, #24]
8005f42: 4413 add r3, r2
8005f44: f503 6380 add.w r3, r3, #1024 @ 0x400
8005f48: 617b str r3, [r7, #20]
8005f4a: 683b ldr r3, [r7, #0]
8005f4c: 88db ldrh r3, [r3, #6]
8005f4e: 085b lsrs r3, r3, #1
8005f50: b29b uxth r3, r3
8005f52: 005b lsls r3, r3, #1
8005f54: b29a uxth r2, r3
8005f56: 697b ldr r3, [r7, #20]
8005f58: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8005f5a: 687a ldr r2, [r7, #4]
8005f5c: 683b ldr r3, [r7, #0]
8005f5e: 781b ldrb r3, [r3, #0]
8005f60: 009b lsls r3, r3, #2
8005f62: 4413 add r3, r2
8005f64: 881b ldrh r3, [r3, #0]
8005f66: 827b strh r3, [r7, #18]
8005f68: 8a7b ldrh r3, [r7, #18]
8005f6a: f003 0340 and.w r3, r3, #64 @ 0x40
8005f6e: 2b00 cmp r3, #0
8005f70: d01b beq.n 8005faa <USB_ActivateEndpoint+0x17a>
8005f72: 687a ldr r2, [r7, #4]
8005f74: 683b ldr r3, [r7, #0]
8005f76: 781b ldrb r3, [r3, #0]
8005f78: 009b lsls r3, r3, #2
8005f7a: 4413 add r3, r2
8005f7c: 881b ldrh r3, [r3, #0]
8005f7e: b29b uxth r3, r3
8005f80: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005f84: f023 0370 bic.w r3, r3, #112 @ 0x70
8005f88: 823b strh r3, [r7, #16]
8005f8a: 687a ldr r2, [r7, #4]
8005f8c: 683b ldr r3, [r7, #0]
8005f8e: 781b ldrb r3, [r3, #0]
8005f90: 009b lsls r3, r3, #2
8005f92: 441a add r2, r3
8005f94: 8a3b ldrh r3, [r7, #16]
8005f96: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005f9a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005f9e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005fa2: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8005fa6: b29b uxth r3, r3
8005fa8: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8005faa: 683b ldr r3, [r7, #0]
8005fac: 78db ldrb r3, [r3, #3]
8005fae: 2b01 cmp r3, #1
8005fb0: d020 beq.n 8005ff4 <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8005fb2: 687a ldr r2, [r7, #4]
8005fb4: 683b ldr r3, [r7, #0]
8005fb6: 781b ldrb r3, [r3, #0]
8005fb8: 009b lsls r3, r3, #2
8005fba: 4413 add r3, r2
8005fbc: 881b ldrh r3, [r3, #0]
8005fbe: b29b uxth r3, r3
8005fc0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005fc4: f023 0340 bic.w r3, r3, #64 @ 0x40
8005fc8: 81bb strh r3, [r7, #12]
8005fca: 89bb ldrh r3, [r7, #12]
8005fcc: f083 0320 eor.w r3, r3, #32
8005fd0: 81bb strh r3, [r7, #12]
8005fd2: 687a ldr r2, [r7, #4]
8005fd4: 683b ldr r3, [r7, #0]
8005fd6: 781b ldrb r3, [r3, #0]
8005fd8: 009b lsls r3, r3, #2
8005fda: 441a add r2, r3
8005fdc: 89bb ldrh r3, [r7, #12]
8005fde: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005fe2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005fe6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005fea: f043 0380 orr.w r3, r3, #128 @ 0x80
8005fee: b29b uxth r3, r3
8005ff0: 8013 strh r3, [r2, #0]
8005ff2: e2d5 b.n 80065a0 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8005ff4: 687a ldr r2, [r7, #4]
8005ff6: 683b ldr r3, [r7, #0]
8005ff8: 781b ldrb r3, [r3, #0]
8005ffa: 009b lsls r3, r3, #2
8005ffc: 4413 add r3, r2
8005ffe: 881b ldrh r3, [r3, #0]
8006000: b29b uxth r3, r3
8006002: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006006: f023 0340 bic.w r3, r3, #64 @ 0x40
800600a: 81fb strh r3, [r7, #14]
800600c: 687a ldr r2, [r7, #4]
800600e: 683b ldr r3, [r7, #0]
8006010: 781b ldrb r3, [r3, #0]
8006012: 009b lsls r3, r3, #2
8006014: 441a add r2, r3
8006016: 89fb ldrh r3, [r7, #14]
8006018: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800601c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006020: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006024: f043 0380 orr.w r3, r3, #128 @ 0x80
8006028: b29b uxth r3, r3
800602a: 8013 strh r3, [r2, #0]
800602c: e2b8 b.n 80065a0 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
800602e: 687b ldr r3, [r7, #4]
8006030: 633b str r3, [r7, #48] @ 0x30
8006032: 687b ldr r3, [r7, #4]
8006034: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006038: b29b uxth r3, r3
800603a: 461a mov r2, r3
800603c: 6b3b ldr r3, [r7, #48] @ 0x30
800603e: 4413 add r3, r2
8006040: 633b str r3, [r7, #48] @ 0x30
8006042: 683b ldr r3, [r7, #0]
8006044: 781b ldrb r3, [r3, #0]
8006046: 011a lsls r2, r3, #4
8006048: 6b3b ldr r3, [r7, #48] @ 0x30
800604a: 4413 add r3, r2
800604c: f503 6381 add.w r3, r3, #1032 @ 0x408
8006050: 62fb str r3, [r7, #44] @ 0x2c
8006052: 683b ldr r3, [r7, #0]
8006054: 88db ldrh r3, [r3, #6]
8006056: 085b lsrs r3, r3, #1
8006058: b29b uxth r3, r3
800605a: 005b lsls r3, r3, #1
800605c: b29a uxth r2, r3
800605e: 6afb ldr r3, [r7, #44] @ 0x2c
8006060: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
8006062: 687b ldr r3, [r7, #4]
8006064: 62bb str r3, [r7, #40] @ 0x28
8006066: 687b ldr r3, [r7, #4]
8006068: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800606c: b29b uxth r3, r3
800606e: 461a mov r2, r3
8006070: 6abb ldr r3, [r7, #40] @ 0x28
8006072: 4413 add r3, r2
8006074: 62bb str r3, [r7, #40] @ 0x28
8006076: 683b ldr r3, [r7, #0]
8006078: 781b ldrb r3, [r3, #0]
800607a: 011a lsls r2, r3, #4
800607c: 6abb ldr r3, [r7, #40] @ 0x28
800607e: 4413 add r3, r2
8006080: f203 430c addw r3, r3, #1036 @ 0x40c
8006084: 627b str r3, [r7, #36] @ 0x24
8006086: 6a7b ldr r3, [r7, #36] @ 0x24
8006088: 881b ldrh r3, [r3, #0]
800608a: b29b uxth r3, r3
800608c: f3c3 0309 ubfx r3, r3, #0, #10
8006090: b29a uxth r2, r3
8006092: 6a7b ldr r3, [r7, #36] @ 0x24
8006094: 801a strh r2, [r3, #0]
8006096: 683b ldr r3, [r7, #0]
8006098: 691b ldr r3, [r3, #16]
800609a: 2b3e cmp r3, #62 @ 0x3e
800609c: d91d bls.n 80060da <USB_ActivateEndpoint+0x2aa>
800609e: 683b ldr r3, [r7, #0]
80060a0: 691b ldr r3, [r3, #16]
80060a2: 095b lsrs r3, r3, #5
80060a4: 66bb str r3, [r7, #104] @ 0x68
80060a6: 683b ldr r3, [r7, #0]
80060a8: 691b ldr r3, [r3, #16]
80060aa: f003 031f and.w r3, r3, #31
80060ae: 2b00 cmp r3, #0
80060b0: d102 bne.n 80060b8 <USB_ActivateEndpoint+0x288>
80060b2: 6ebb ldr r3, [r7, #104] @ 0x68
80060b4: 3b01 subs r3, #1
80060b6: 66bb str r3, [r7, #104] @ 0x68
80060b8: 6a7b ldr r3, [r7, #36] @ 0x24
80060ba: 881b ldrh r3, [r3, #0]
80060bc: b29a uxth r2, r3
80060be: 6ebb ldr r3, [r7, #104] @ 0x68
80060c0: b29b uxth r3, r3
80060c2: 029b lsls r3, r3, #10
80060c4: b29b uxth r3, r3
80060c6: 4313 orrs r3, r2
80060c8: b29b uxth r3, r3
80060ca: ea6f 4343 mvn.w r3, r3, lsl #17
80060ce: ea6f 4353 mvn.w r3, r3, lsr #17
80060d2: b29a uxth r2, r3
80060d4: 6a7b ldr r3, [r7, #36] @ 0x24
80060d6: 801a strh r2, [r3, #0]
80060d8: e026 b.n 8006128 <USB_ActivateEndpoint+0x2f8>
80060da: 683b ldr r3, [r7, #0]
80060dc: 691b ldr r3, [r3, #16]
80060de: 2b00 cmp r3, #0
80060e0: d10a bne.n 80060f8 <USB_ActivateEndpoint+0x2c8>
80060e2: 6a7b ldr r3, [r7, #36] @ 0x24
80060e4: 881b ldrh r3, [r3, #0]
80060e6: b29b uxth r3, r3
80060e8: ea6f 4343 mvn.w r3, r3, lsl #17
80060ec: ea6f 4353 mvn.w r3, r3, lsr #17
80060f0: b29a uxth r2, r3
80060f2: 6a7b ldr r3, [r7, #36] @ 0x24
80060f4: 801a strh r2, [r3, #0]
80060f6: e017 b.n 8006128 <USB_ActivateEndpoint+0x2f8>
80060f8: 683b ldr r3, [r7, #0]
80060fa: 691b ldr r3, [r3, #16]
80060fc: 085b lsrs r3, r3, #1
80060fe: 66bb str r3, [r7, #104] @ 0x68
8006100: 683b ldr r3, [r7, #0]
8006102: 691b ldr r3, [r3, #16]
8006104: f003 0301 and.w r3, r3, #1
8006108: 2b00 cmp r3, #0
800610a: d002 beq.n 8006112 <USB_ActivateEndpoint+0x2e2>
800610c: 6ebb ldr r3, [r7, #104] @ 0x68
800610e: 3301 adds r3, #1
8006110: 66bb str r3, [r7, #104] @ 0x68
8006112: 6a7b ldr r3, [r7, #36] @ 0x24
8006114: 881b ldrh r3, [r3, #0]
8006116: b29a uxth r2, r3
8006118: 6ebb ldr r3, [r7, #104] @ 0x68
800611a: b29b uxth r3, r3
800611c: 029b lsls r3, r3, #10
800611e: b29b uxth r3, r3
8006120: 4313 orrs r3, r2
8006122: b29a uxth r2, r3
8006124: 6a7b ldr r3, [r7, #36] @ 0x24
8006126: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006128: 687a ldr r2, [r7, #4]
800612a: 683b ldr r3, [r7, #0]
800612c: 781b ldrb r3, [r3, #0]
800612e: 009b lsls r3, r3, #2
8006130: 4413 add r3, r2
8006132: 881b ldrh r3, [r3, #0]
8006134: 847b strh r3, [r7, #34] @ 0x22
8006136: 8c7b ldrh r3, [r7, #34] @ 0x22
8006138: f403 4380 and.w r3, r3, #16384 @ 0x4000
800613c: 2b00 cmp r3, #0
800613e: d01b beq.n 8006178 <USB_ActivateEndpoint+0x348>
8006140: 687a ldr r2, [r7, #4]
8006142: 683b ldr r3, [r7, #0]
8006144: 781b ldrb r3, [r3, #0]
8006146: 009b lsls r3, r3, #2
8006148: 4413 add r3, r2
800614a: 881b ldrh r3, [r3, #0]
800614c: b29b uxth r3, r3
800614e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006152: f023 0370 bic.w r3, r3, #112 @ 0x70
8006156: 843b strh r3, [r7, #32]
8006158: 687a ldr r2, [r7, #4]
800615a: 683b ldr r3, [r7, #0]
800615c: 781b ldrb r3, [r3, #0]
800615e: 009b lsls r3, r3, #2
8006160: 441a add r2, r3
8006162: 8c3b ldrh r3, [r7, #32]
8006164: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006168: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800616c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006170: f043 0380 orr.w r3, r3, #128 @ 0x80
8006174: b29b uxth r3, r3
8006176: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
8006178: 683b ldr r3, [r7, #0]
800617a: 781b ldrb r3, [r3, #0]
800617c: 2b00 cmp r3, #0
800617e: d124 bne.n 80061ca <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8006180: 687a ldr r2, [r7, #4]
8006182: 683b ldr r3, [r7, #0]
8006184: 781b ldrb r3, [r3, #0]
8006186: 009b lsls r3, r3, #2
8006188: 4413 add r3, r2
800618a: 881b ldrh r3, [r3, #0]
800618c: b29b uxth r3, r3
800618e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006192: f023 0370 bic.w r3, r3, #112 @ 0x70
8006196: 83bb strh r3, [r7, #28]
8006198: 8bbb ldrh r3, [r7, #28]
800619a: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800619e: 83bb strh r3, [r7, #28]
80061a0: 8bbb ldrh r3, [r7, #28]
80061a2: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80061a6: 83bb strh r3, [r7, #28]
80061a8: 687a ldr r2, [r7, #4]
80061aa: 683b ldr r3, [r7, #0]
80061ac: 781b ldrb r3, [r3, #0]
80061ae: 009b lsls r3, r3, #2
80061b0: 441a add r2, r3
80061b2: 8bbb ldrh r3, [r7, #28]
80061b4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80061b8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80061bc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80061c0: f043 0380 orr.w r3, r3, #128 @ 0x80
80061c4: b29b uxth r3, r3
80061c6: 8013 strh r3, [r2, #0]
80061c8: e1ea b.n 80065a0 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
80061ca: 687a ldr r2, [r7, #4]
80061cc: 683b ldr r3, [r7, #0]
80061ce: 781b ldrb r3, [r3, #0]
80061d0: 009b lsls r3, r3, #2
80061d2: 4413 add r3, r2
80061d4: 881b ldrh r3, [r3, #0]
80061d6: b29b uxth r3, r3
80061d8: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80061dc: f023 0370 bic.w r3, r3, #112 @ 0x70
80061e0: 83fb strh r3, [r7, #30]
80061e2: 8bfb ldrh r3, [r7, #30]
80061e4: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80061e8: 83fb strh r3, [r7, #30]
80061ea: 687a ldr r2, [r7, #4]
80061ec: 683b ldr r3, [r7, #0]
80061ee: 781b ldrb r3, [r3, #0]
80061f0: 009b lsls r3, r3, #2
80061f2: 441a add r2, r3
80061f4: 8bfb ldrh r3, [r7, #30]
80061f6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80061fa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80061fe: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006202: f043 0380 orr.w r3, r3, #128 @ 0x80
8006206: b29b uxth r3, r3
8006208: 8013 strh r3, [r2, #0]
800620a: e1c9 b.n 80065a0 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
800620c: 683b ldr r3, [r7, #0]
800620e: 78db ldrb r3, [r3, #3]
8006210: 2b02 cmp r3, #2
8006212: d11e bne.n 8006252 <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8006214: 687a ldr r2, [r7, #4]
8006216: 683b ldr r3, [r7, #0]
8006218: 781b ldrb r3, [r3, #0]
800621a: 009b lsls r3, r3, #2
800621c: 4413 add r3, r2
800621e: 881b ldrh r3, [r3, #0]
8006220: b29b uxth r3, r3
8006222: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006226: f023 0370 bic.w r3, r3, #112 @ 0x70
800622a: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800622e: 687a ldr r2, [r7, #4]
8006230: 683b ldr r3, [r7, #0]
8006232: 781b ldrb r3, [r3, #0]
8006234: 009b lsls r3, r3, #2
8006236: 441a add r2, r3
8006238: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800623c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006240: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006244: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8006248: f043 0380 orr.w r3, r3, #128 @ 0x80
800624c: b29b uxth r3, r3
800624e: 8013 strh r3, [r2, #0]
8006250: e01d b.n 800628e <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
8006252: 687a ldr r2, [r7, #4]
8006254: 683b ldr r3, [r7, #0]
8006256: 781b ldrb r3, [r3, #0]
8006258: 009b lsls r3, r3, #2
800625a: 4413 add r3, r2
800625c: 881b ldrh r3, [r3, #0]
800625e: b29b uxth r3, r3
8006260: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8006264: f023 0370 bic.w r3, r3, #112 @ 0x70
8006268: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
800626c: 687a ldr r2, [r7, #4]
800626e: 683b ldr r3, [r7, #0]
8006270: 781b ldrb r3, [r3, #0]
8006272: 009b lsls r3, r3, #2
8006274: 441a add r2, r3
8006276: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
800627a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800627e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006282: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006286: f043 0380 orr.w r3, r3, #128 @ 0x80
800628a: b29b uxth r3, r3
800628c: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
800628e: 687b ldr r3, [r7, #4]
8006290: 65fb str r3, [r7, #92] @ 0x5c
8006292: 687b ldr r3, [r7, #4]
8006294: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006298: b29b uxth r3, r3
800629a: 461a mov r2, r3
800629c: 6dfb ldr r3, [r7, #92] @ 0x5c
800629e: 4413 add r3, r2
80062a0: 65fb str r3, [r7, #92] @ 0x5c
80062a2: 683b ldr r3, [r7, #0]
80062a4: 781b ldrb r3, [r3, #0]
80062a6: 011a lsls r2, r3, #4
80062a8: 6dfb ldr r3, [r7, #92] @ 0x5c
80062aa: 4413 add r3, r2
80062ac: f503 6380 add.w r3, r3, #1024 @ 0x400
80062b0: 65bb str r3, [r7, #88] @ 0x58
80062b2: 683b ldr r3, [r7, #0]
80062b4: 891b ldrh r3, [r3, #8]
80062b6: 085b lsrs r3, r3, #1
80062b8: b29b uxth r3, r3
80062ba: 005b lsls r3, r3, #1
80062bc: b29a uxth r2, r3
80062be: 6dbb ldr r3, [r7, #88] @ 0x58
80062c0: 801a strh r2, [r3, #0]
80062c2: 687b ldr r3, [r7, #4]
80062c4: 657b str r3, [r7, #84] @ 0x54
80062c6: 687b ldr r3, [r7, #4]
80062c8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80062cc: b29b uxth r3, r3
80062ce: 461a mov r2, r3
80062d0: 6d7b ldr r3, [r7, #84] @ 0x54
80062d2: 4413 add r3, r2
80062d4: 657b str r3, [r7, #84] @ 0x54
80062d6: 683b ldr r3, [r7, #0]
80062d8: 781b ldrb r3, [r3, #0]
80062da: 011a lsls r2, r3, #4
80062dc: 6d7b ldr r3, [r7, #84] @ 0x54
80062de: 4413 add r3, r2
80062e0: f503 6381 add.w r3, r3, #1032 @ 0x408
80062e4: 653b str r3, [r7, #80] @ 0x50
80062e6: 683b ldr r3, [r7, #0]
80062e8: 895b ldrh r3, [r3, #10]
80062ea: 085b lsrs r3, r3, #1
80062ec: b29b uxth r3, r3
80062ee: 005b lsls r3, r3, #1
80062f0: b29a uxth r2, r3
80062f2: 6d3b ldr r3, [r7, #80] @ 0x50
80062f4: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
80062f6: 683b ldr r3, [r7, #0]
80062f8: 785b ldrb r3, [r3, #1]
80062fa: 2b00 cmp r3, #0
80062fc: f040 8093 bne.w 8006426 <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006300: 687a ldr r2, [r7, #4]
8006302: 683b ldr r3, [r7, #0]
8006304: 781b ldrb r3, [r3, #0]
8006306: 009b lsls r3, r3, #2
8006308: 4413 add r3, r2
800630a: 881b ldrh r3, [r3, #0]
800630c: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
8006310: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006314: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006318: 2b00 cmp r3, #0
800631a: d01b beq.n 8006354 <USB_ActivateEndpoint+0x524>
800631c: 687a ldr r2, [r7, #4]
800631e: 683b ldr r3, [r7, #0]
8006320: 781b ldrb r3, [r3, #0]
8006322: 009b lsls r3, r3, #2
8006324: 4413 add r3, r2
8006326: 881b ldrh r3, [r3, #0]
8006328: b29b uxth r3, r3
800632a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800632e: f023 0370 bic.w r3, r3, #112 @ 0x70
8006332: 87fb strh r3, [r7, #62] @ 0x3e
8006334: 687a ldr r2, [r7, #4]
8006336: 683b ldr r3, [r7, #0]
8006338: 781b ldrb r3, [r3, #0]
800633a: 009b lsls r3, r3, #2
800633c: 441a add r2, r3
800633e: 8ffb ldrh r3, [r7, #62] @ 0x3e
8006340: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006344: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006348: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800634c: f043 0380 orr.w r3, r3, #128 @ 0x80
8006350: b29b uxth r3, r3
8006352: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8006354: 687a ldr r2, [r7, #4]
8006356: 683b ldr r3, [r7, #0]
8006358: 781b ldrb r3, [r3, #0]
800635a: 009b lsls r3, r3, #2
800635c: 4413 add r3, r2
800635e: 881b ldrh r3, [r3, #0]
8006360: 87bb strh r3, [r7, #60] @ 0x3c
8006362: 8fbb ldrh r3, [r7, #60] @ 0x3c
8006364: f003 0340 and.w r3, r3, #64 @ 0x40
8006368: 2b00 cmp r3, #0
800636a: d01b beq.n 80063a4 <USB_ActivateEndpoint+0x574>
800636c: 687a ldr r2, [r7, #4]
800636e: 683b ldr r3, [r7, #0]
8006370: 781b ldrb r3, [r3, #0]
8006372: 009b lsls r3, r3, #2
8006374: 4413 add r3, r2
8006376: 881b ldrh r3, [r3, #0]
8006378: b29b uxth r3, r3
800637a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800637e: f023 0370 bic.w r3, r3, #112 @ 0x70
8006382: 877b strh r3, [r7, #58] @ 0x3a
8006384: 687a ldr r2, [r7, #4]
8006386: 683b ldr r3, [r7, #0]
8006388: 781b ldrb r3, [r3, #0]
800638a: 009b lsls r3, r3, #2
800638c: 441a add r2, r3
800638e: 8f7b ldrh r3, [r7, #58] @ 0x3a
8006390: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006394: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006398: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800639c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80063a0: b29b uxth r3, r3
80063a2: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80063a4: 687a ldr r2, [r7, #4]
80063a6: 683b ldr r3, [r7, #0]
80063a8: 781b ldrb r3, [r3, #0]
80063aa: 009b lsls r3, r3, #2
80063ac: 4413 add r3, r2
80063ae: 881b ldrh r3, [r3, #0]
80063b0: b29b uxth r3, r3
80063b2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80063b6: f023 0370 bic.w r3, r3, #112 @ 0x70
80063ba: 873b strh r3, [r7, #56] @ 0x38
80063bc: 8f3b ldrh r3, [r7, #56] @ 0x38
80063be: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80063c2: 873b strh r3, [r7, #56] @ 0x38
80063c4: 8f3b ldrh r3, [r7, #56] @ 0x38
80063c6: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80063ca: 873b strh r3, [r7, #56] @ 0x38
80063cc: 687a ldr r2, [r7, #4]
80063ce: 683b ldr r3, [r7, #0]
80063d0: 781b ldrb r3, [r3, #0]
80063d2: 009b lsls r3, r3, #2
80063d4: 441a add r2, r3
80063d6: 8f3b ldrh r3, [r7, #56] @ 0x38
80063d8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80063dc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80063e0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80063e4: f043 0380 orr.w r3, r3, #128 @ 0x80
80063e8: b29b uxth r3, r3
80063ea: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
80063ec: 687a ldr r2, [r7, #4]
80063ee: 683b ldr r3, [r7, #0]
80063f0: 781b ldrb r3, [r3, #0]
80063f2: 009b lsls r3, r3, #2
80063f4: 4413 add r3, r2
80063f6: 881b ldrh r3, [r3, #0]
80063f8: b29b uxth r3, r3
80063fa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80063fe: f023 0340 bic.w r3, r3, #64 @ 0x40
8006402: 86fb strh r3, [r7, #54] @ 0x36
8006404: 687a ldr r2, [r7, #4]
8006406: 683b ldr r3, [r7, #0]
8006408: 781b ldrb r3, [r3, #0]
800640a: 009b lsls r3, r3, #2
800640c: 441a add r2, r3
800640e: 8efb ldrh r3, [r7, #54] @ 0x36
8006410: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006414: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006418: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800641c: f043 0380 orr.w r3, r3, #128 @ 0x80
8006420: b29b uxth r3, r3
8006422: 8013 strh r3, [r2, #0]
8006424: e0bc b.n 80065a0 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006426: 687a ldr r2, [r7, #4]
8006428: 683b ldr r3, [r7, #0]
800642a: 781b ldrb r3, [r3, #0]
800642c: 009b lsls r3, r3, #2
800642e: 4413 add r3, r2
8006430: 881b ldrh r3, [r3, #0]
8006432: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8006436: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800643a: f403 4380 and.w r3, r3, #16384 @ 0x4000
800643e: 2b00 cmp r3, #0
8006440: d01d beq.n 800647e <USB_ActivateEndpoint+0x64e>
8006442: 687a ldr r2, [r7, #4]
8006444: 683b ldr r3, [r7, #0]
8006446: 781b ldrb r3, [r3, #0]
8006448: 009b lsls r3, r3, #2
800644a: 4413 add r3, r2
800644c: 881b ldrh r3, [r3, #0]
800644e: b29b uxth r3, r3
8006450: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006454: f023 0370 bic.w r3, r3, #112 @ 0x70
8006458: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
800645c: 687a ldr r2, [r7, #4]
800645e: 683b ldr r3, [r7, #0]
8006460: 781b ldrb r3, [r3, #0]
8006462: 009b lsls r3, r3, #2
8006464: 441a add r2, r3
8006466: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
800646a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800646e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006472: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006476: f043 0380 orr.w r3, r3, #128 @ 0x80
800647a: b29b uxth r3, r3
800647c: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800647e: 687a ldr r2, [r7, #4]
8006480: 683b ldr r3, [r7, #0]
8006482: 781b ldrb r3, [r3, #0]
8006484: 009b lsls r3, r3, #2
8006486: 4413 add r3, r2
8006488: 881b ldrh r3, [r3, #0]
800648a: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
800648e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006492: f003 0340 and.w r3, r3, #64 @ 0x40
8006496: 2b00 cmp r3, #0
8006498: d01d beq.n 80064d6 <USB_ActivateEndpoint+0x6a6>
800649a: 687a ldr r2, [r7, #4]
800649c: 683b ldr r3, [r7, #0]
800649e: 781b ldrb r3, [r3, #0]
80064a0: 009b lsls r3, r3, #2
80064a2: 4413 add r3, r2
80064a4: 881b ldrh r3, [r3, #0]
80064a6: b29b uxth r3, r3
80064a8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80064ac: f023 0370 bic.w r3, r3, #112 @ 0x70
80064b0: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80064b4: 687a ldr r2, [r7, #4]
80064b6: 683b ldr r3, [r7, #0]
80064b8: 781b ldrb r3, [r3, #0]
80064ba: 009b lsls r3, r3, #2
80064bc: 441a add r2, r3
80064be: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
80064c2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80064c6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80064ca: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80064ce: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80064d2: b29b uxth r3, r3
80064d4: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
80064d6: 683b ldr r3, [r7, #0]
80064d8: 78db ldrb r3, [r3, #3]
80064da: 2b01 cmp r3, #1
80064dc: d024 beq.n 8006528 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
80064de: 687a ldr r2, [r7, #4]
80064e0: 683b ldr r3, [r7, #0]
80064e2: 781b ldrb r3, [r3, #0]
80064e4: 009b lsls r3, r3, #2
80064e6: 4413 add r3, r2
80064e8: 881b ldrh r3, [r3, #0]
80064ea: b29b uxth r3, r3
80064ec: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80064f0: f023 0340 bic.w r3, r3, #64 @ 0x40
80064f4: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
80064f8: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
80064fc: f083 0320 eor.w r3, r3, #32
8006500: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8006504: 687a ldr r2, [r7, #4]
8006506: 683b ldr r3, [r7, #0]
8006508: 781b ldrb r3, [r3, #0]
800650a: 009b lsls r3, r3, #2
800650c: 441a add r2, r3
800650e: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8006512: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006516: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800651a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800651e: f043 0380 orr.w r3, r3, #128 @ 0x80
8006522: b29b uxth r3, r3
8006524: 8013 strh r3, [r2, #0]
8006526: e01d b.n 8006564 <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8006528: 687a ldr r2, [r7, #4]
800652a: 683b ldr r3, [r7, #0]
800652c: 781b ldrb r3, [r3, #0]
800652e: 009b lsls r3, r3, #2
8006530: 4413 add r3, r2
8006532: 881b ldrh r3, [r3, #0]
8006534: b29b uxth r3, r3
8006536: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800653a: f023 0340 bic.w r3, r3, #64 @ 0x40
800653e: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
8006542: 687a ldr r2, [r7, #4]
8006544: 683b ldr r3, [r7, #0]
8006546: 781b ldrb r3, [r3, #0]
8006548: 009b lsls r3, r3, #2
800654a: 441a add r2, r3
800654c: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8006550: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006554: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006558: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800655c: f043 0380 orr.w r3, r3, #128 @ 0x80
8006560: b29b uxth r3, r3
8006562: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8006564: 687a ldr r2, [r7, #4]
8006566: 683b ldr r3, [r7, #0]
8006568: 781b ldrb r3, [r3, #0]
800656a: 009b lsls r3, r3, #2
800656c: 4413 add r3, r2
800656e: 881b ldrh r3, [r3, #0]
8006570: b29b uxth r3, r3
8006572: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006576: f023 0370 bic.w r3, r3, #112 @ 0x70
800657a: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
800657e: 687a ldr r2, [r7, #4]
8006580: 683b ldr r3, [r7, #0]
8006582: 781b ldrb r3, [r3, #0]
8006584: 009b lsls r3, r3, #2
8006586: 441a add r2, r3
8006588: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
800658c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006590: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006594: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006598: f043 0380 orr.w r3, r3, #128 @ 0x80
800659c: b29b uxth r3, r3
800659e: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
80065a0: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
80065a4: 4618 mov r0, r3
80065a6: 3774 adds r7, #116 @ 0x74
80065a8: 46bd mov sp, r7
80065aa: bc80 pop {r7}
80065ac: 4770 bx lr
80065ae: bf00 nop
080065b0 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80065b0: b480 push {r7}
80065b2: b08d sub sp, #52 @ 0x34
80065b4: af00 add r7, sp, #0
80065b6: 6078 str r0, [r7, #4]
80065b8: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
80065ba: 683b ldr r3, [r7, #0]
80065bc: 7b1b ldrb r3, [r3, #12]
80065be: 2b00 cmp r3, #0
80065c0: f040 808e bne.w 80066e0 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
80065c4: 683b ldr r3, [r7, #0]
80065c6: 785b ldrb r3, [r3, #1]
80065c8: 2b00 cmp r3, #0
80065ca: d044 beq.n 8006656 <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80065cc: 687a ldr r2, [r7, #4]
80065ce: 683b ldr r3, [r7, #0]
80065d0: 781b ldrb r3, [r3, #0]
80065d2: 009b lsls r3, r3, #2
80065d4: 4413 add r3, r2
80065d6: 881b ldrh r3, [r3, #0]
80065d8: 81bb strh r3, [r7, #12]
80065da: 89bb ldrh r3, [r7, #12]
80065dc: f003 0340 and.w r3, r3, #64 @ 0x40
80065e0: 2b00 cmp r3, #0
80065e2: d01b beq.n 800661c <USB_DeactivateEndpoint+0x6c>
80065e4: 687a ldr r2, [r7, #4]
80065e6: 683b ldr r3, [r7, #0]
80065e8: 781b ldrb r3, [r3, #0]
80065ea: 009b lsls r3, r3, #2
80065ec: 4413 add r3, r2
80065ee: 881b ldrh r3, [r3, #0]
80065f0: b29b uxth r3, r3
80065f2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80065f6: f023 0370 bic.w r3, r3, #112 @ 0x70
80065fa: 817b strh r3, [r7, #10]
80065fc: 687a ldr r2, [r7, #4]
80065fe: 683b ldr r3, [r7, #0]
8006600: 781b ldrb r3, [r3, #0]
8006602: 009b lsls r3, r3, #2
8006604: 441a add r2, r3
8006606: 897b ldrh r3, [r7, #10]
8006608: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800660c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006610: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006614: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006618: b29b uxth r3, r3
800661a: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800661c: 687a ldr r2, [r7, #4]
800661e: 683b ldr r3, [r7, #0]
8006620: 781b ldrb r3, [r3, #0]
8006622: 009b lsls r3, r3, #2
8006624: 4413 add r3, r2
8006626: 881b ldrh r3, [r3, #0]
8006628: b29b uxth r3, r3
800662a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800662e: f023 0340 bic.w r3, r3, #64 @ 0x40
8006632: 813b strh r3, [r7, #8]
8006634: 687a ldr r2, [r7, #4]
8006636: 683b ldr r3, [r7, #0]
8006638: 781b ldrb r3, [r3, #0]
800663a: 009b lsls r3, r3, #2
800663c: 441a add r2, r3
800663e: 893b ldrh r3, [r7, #8]
8006640: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006644: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006648: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800664c: f043 0380 orr.w r3, r3, #128 @ 0x80
8006650: b29b uxth r3, r3
8006652: 8013 strh r3, [r2, #0]
8006654: e192 b.n 800697c <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006656: 687a ldr r2, [r7, #4]
8006658: 683b ldr r3, [r7, #0]
800665a: 781b ldrb r3, [r3, #0]
800665c: 009b lsls r3, r3, #2
800665e: 4413 add r3, r2
8006660: 881b ldrh r3, [r3, #0]
8006662: 827b strh r3, [r7, #18]
8006664: 8a7b ldrh r3, [r7, #18]
8006666: f403 4380 and.w r3, r3, #16384 @ 0x4000
800666a: 2b00 cmp r3, #0
800666c: d01b beq.n 80066a6 <USB_DeactivateEndpoint+0xf6>
800666e: 687a ldr r2, [r7, #4]
8006670: 683b ldr r3, [r7, #0]
8006672: 781b ldrb r3, [r3, #0]
8006674: 009b lsls r3, r3, #2
8006676: 4413 add r3, r2
8006678: 881b ldrh r3, [r3, #0]
800667a: b29b uxth r3, r3
800667c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006680: f023 0370 bic.w r3, r3, #112 @ 0x70
8006684: 823b strh r3, [r7, #16]
8006686: 687a ldr r2, [r7, #4]
8006688: 683b ldr r3, [r7, #0]
800668a: 781b ldrb r3, [r3, #0]
800668c: 009b lsls r3, r3, #2
800668e: 441a add r2, r3
8006690: 8a3b ldrh r3, [r7, #16]
8006692: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006696: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800669a: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800669e: f043 0380 orr.w r3, r3, #128 @ 0x80
80066a2: b29b uxth r3, r3
80066a4: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80066a6: 687a ldr r2, [r7, #4]
80066a8: 683b ldr r3, [r7, #0]
80066aa: 781b ldrb r3, [r3, #0]
80066ac: 009b lsls r3, r3, #2
80066ae: 4413 add r3, r2
80066b0: 881b ldrh r3, [r3, #0]
80066b2: b29b uxth r3, r3
80066b4: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80066b8: f023 0370 bic.w r3, r3, #112 @ 0x70
80066bc: 81fb strh r3, [r7, #14]
80066be: 687a ldr r2, [r7, #4]
80066c0: 683b ldr r3, [r7, #0]
80066c2: 781b ldrb r3, [r3, #0]
80066c4: 009b lsls r3, r3, #2
80066c6: 441a add r2, r3
80066c8: 89fb ldrh r3, [r7, #14]
80066ca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80066ce: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80066d2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80066d6: f043 0380 orr.w r3, r3, #128 @ 0x80
80066da: b29b uxth r3, r3
80066dc: 8013 strh r3, [r2, #0]
80066de: e14d b.n 800697c <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
80066e0: 683b ldr r3, [r7, #0]
80066e2: 785b ldrb r3, [r3, #1]
80066e4: 2b00 cmp r3, #0
80066e6: f040 80a5 bne.w 8006834 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80066ea: 687a ldr r2, [r7, #4]
80066ec: 683b ldr r3, [r7, #0]
80066ee: 781b ldrb r3, [r3, #0]
80066f0: 009b lsls r3, r3, #2
80066f2: 4413 add r3, r2
80066f4: 881b ldrh r3, [r3, #0]
80066f6: 843b strh r3, [r7, #32]
80066f8: 8c3b ldrh r3, [r7, #32]
80066fa: f403 4380 and.w r3, r3, #16384 @ 0x4000
80066fe: 2b00 cmp r3, #0
8006700: d01b beq.n 800673a <USB_DeactivateEndpoint+0x18a>
8006702: 687a ldr r2, [r7, #4]
8006704: 683b ldr r3, [r7, #0]
8006706: 781b ldrb r3, [r3, #0]
8006708: 009b lsls r3, r3, #2
800670a: 4413 add r3, r2
800670c: 881b ldrh r3, [r3, #0]
800670e: b29b uxth r3, r3
8006710: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006714: f023 0370 bic.w r3, r3, #112 @ 0x70
8006718: 83fb strh r3, [r7, #30]
800671a: 687a ldr r2, [r7, #4]
800671c: 683b ldr r3, [r7, #0]
800671e: 781b ldrb r3, [r3, #0]
8006720: 009b lsls r3, r3, #2
8006722: 441a add r2, r3
8006724: 8bfb ldrh r3, [r7, #30]
8006726: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800672a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800672e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006732: f043 0380 orr.w r3, r3, #128 @ 0x80
8006736: b29b uxth r3, r3
8006738: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800673a: 687a ldr r2, [r7, #4]
800673c: 683b ldr r3, [r7, #0]
800673e: 781b ldrb r3, [r3, #0]
8006740: 009b lsls r3, r3, #2
8006742: 4413 add r3, r2
8006744: 881b ldrh r3, [r3, #0]
8006746: 83bb strh r3, [r7, #28]
8006748: 8bbb ldrh r3, [r7, #28]
800674a: f003 0340 and.w r3, r3, #64 @ 0x40
800674e: 2b00 cmp r3, #0
8006750: d01b beq.n 800678a <USB_DeactivateEndpoint+0x1da>
8006752: 687a ldr r2, [r7, #4]
8006754: 683b ldr r3, [r7, #0]
8006756: 781b ldrb r3, [r3, #0]
8006758: 009b lsls r3, r3, #2
800675a: 4413 add r3, r2
800675c: 881b ldrh r3, [r3, #0]
800675e: b29b uxth r3, r3
8006760: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006764: f023 0370 bic.w r3, r3, #112 @ 0x70
8006768: 837b strh r3, [r7, #26]
800676a: 687a ldr r2, [r7, #4]
800676c: 683b ldr r3, [r7, #0]
800676e: 781b ldrb r3, [r3, #0]
8006770: 009b lsls r3, r3, #2
8006772: 441a add r2, r3
8006774: 8b7b ldrh r3, [r7, #26]
8006776: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800677a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800677e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006782: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006786: b29b uxth r3, r3
8006788: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
800678a: 687a ldr r2, [r7, #4]
800678c: 683b ldr r3, [r7, #0]
800678e: 781b ldrb r3, [r3, #0]
8006790: 009b lsls r3, r3, #2
8006792: 4413 add r3, r2
8006794: 881b ldrh r3, [r3, #0]
8006796: b29b uxth r3, r3
8006798: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800679c: f023 0370 bic.w r3, r3, #112 @ 0x70
80067a0: 833b strh r3, [r7, #24]
80067a2: 687a ldr r2, [r7, #4]
80067a4: 683b ldr r3, [r7, #0]
80067a6: 781b ldrb r3, [r3, #0]
80067a8: 009b lsls r3, r3, #2
80067aa: 441a add r2, r3
80067ac: 8b3b ldrh r3, [r7, #24]
80067ae: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80067b2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80067b6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80067ba: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80067be: b29b uxth r3, r3
80067c0: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80067c2: 687a ldr r2, [r7, #4]
80067c4: 683b ldr r3, [r7, #0]
80067c6: 781b ldrb r3, [r3, #0]
80067c8: 009b lsls r3, r3, #2
80067ca: 4413 add r3, r2
80067cc: 881b ldrh r3, [r3, #0]
80067ce: b29b uxth r3, r3
80067d0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80067d4: f023 0370 bic.w r3, r3, #112 @ 0x70
80067d8: 82fb strh r3, [r7, #22]
80067da: 687a ldr r2, [r7, #4]
80067dc: 683b ldr r3, [r7, #0]
80067de: 781b ldrb r3, [r3, #0]
80067e0: 009b lsls r3, r3, #2
80067e2: 441a add r2, r3
80067e4: 8afb ldrh r3, [r7, #22]
80067e6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80067ea: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80067ee: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80067f2: f043 0380 orr.w r3, r3, #128 @ 0x80
80067f6: b29b uxth r3, r3
80067f8: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
80067fa: 687a ldr r2, [r7, #4]
80067fc: 683b ldr r3, [r7, #0]
80067fe: 781b ldrb r3, [r3, #0]
8006800: 009b lsls r3, r3, #2
8006802: 4413 add r3, r2
8006804: 881b ldrh r3, [r3, #0]
8006806: b29b uxth r3, r3
8006808: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800680c: f023 0340 bic.w r3, r3, #64 @ 0x40
8006810: 82bb strh r3, [r7, #20]
8006812: 687a ldr r2, [r7, #4]
8006814: 683b ldr r3, [r7, #0]
8006816: 781b ldrb r3, [r3, #0]
8006818: 009b lsls r3, r3, #2
800681a: 441a add r2, r3
800681c: 8abb ldrh r3, [r7, #20]
800681e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006822: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006826: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800682a: f043 0380 orr.w r3, r3, #128 @ 0x80
800682e: b29b uxth r3, r3
8006830: 8013 strh r3, [r2, #0]
8006832: e0a3 b.n 800697c <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8006834: 687a ldr r2, [r7, #4]
8006836: 683b ldr r3, [r7, #0]
8006838: 781b ldrb r3, [r3, #0]
800683a: 009b lsls r3, r3, #2
800683c: 4413 add r3, r2
800683e: 881b ldrh r3, [r3, #0]
8006840: 85fb strh r3, [r7, #46] @ 0x2e
8006842: 8dfb ldrh r3, [r7, #46] @ 0x2e
8006844: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006848: 2b00 cmp r3, #0
800684a: d01b beq.n 8006884 <USB_DeactivateEndpoint+0x2d4>
800684c: 687a ldr r2, [r7, #4]
800684e: 683b ldr r3, [r7, #0]
8006850: 781b ldrb r3, [r3, #0]
8006852: 009b lsls r3, r3, #2
8006854: 4413 add r3, r2
8006856: 881b ldrh r3, [r3, #0]
8006858: b29b uxth r3, r3
800685a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800685e: f023 0370 bic.w r3, r3, #112 @ 0x70
8006862: 85bb strh r3, [r7, #44] @ 0x2c
8006864: 687a ldr r2, [r7, #4]
8006866: 683b ldr r3, [r7, #0]
8006868: 781b ldrb r3, [r3, #0]
800686a: 009b lsls r3, r3, #2
800686c: 441a add r2, r3
800686e: 8dbb ldrh r3, [r7, #44] @ 0x2c
8006870: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006874: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006878: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800687c: f043 0380 orr.w r3, r3, #128 @ 0x80
8006880: b29b uxth r3, r3
8006882: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8006884: 687a ldr r2, [r7, #4]
8006886: 683b ldr r3, [r7, #0]
8006888: 781b ldrb r3, [r3, #0]
800688a: 009b lsls r3, r3, #2
800688c: 4413 add r3, r2
800688e: 881b ldrh r3, [r3, #0]
8006890: 857b strh r3, [r7, #42] @ 0x2a
8006892: 8d7b ldrh r3, [r7, #42] @ 0x2a
8006894: f003 0340 and.w r3, r3, #64 @ 0x40
8006898: 2b00 cmp r3, #0
800689a: d01b beq.n 80068d4 <USB_DeactivateEndpoint+0x324>
800689c: 687a ldr r2, [r7, #4]
800689e: 683b ldr r3, [r7, #0]
80068a0: 781b ldrb r3, [r3, #0]
80068a2: 009b lsls r3, r3, #2
80068a4: 4413 add r3, r2
80068a6: 881b ldrh r3, [r3, #0]
80068a8: b29b uxth r3, r3
80068aa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80068ae: f023 0370 bic.w r3, r3, #112 @ 0x70
80068b2: 853b strh r3, [r7, #40] @ 0x28
80068b4: 687a ldr r2, [r7, #4]
80068b6: 683b ldr r3, [r7, #0]
80068b8: 781b ldrb r3, [r3, #0]
80068ba: 009b lsls r3, r3, #2
80068bc: 441a add r2, r3
80068be: 8d3b ldrh r3, [r7, #40] @ 0x28
80068c0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80068c4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80068c8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80068cc: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80068d0: b29b uxth r3, r3
80068d2: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
80068d4: 687a ldr r2, [r7, #4]
80068d6: 683b ldr r3, [r7, #0]
80068d8: 781b ldrb r3, [r3, #0]
80068da: 009b lsls r3, r3, #2
80068dc: 4413 add r3, r2
80068de: 881b ldrh r3, [r3, #0]
80068e0: b29b uxth r3, r3
80068e2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80068e6: f023 0370 bic.w r3, r3, #112 @ 0x70
80068ea: 84fb strh r3, [r7, #38] @ 0x26
80068ec: 687a ldr r2, [r7, #4]
80068ee: 683b ldr r3, [r7, #0]
80068f0: 781b ldrb r3, [r3, #0]
80068f2: 009b lsls r3, r3, #2
80068f4: 441a add r2, r3
80068f6: 8cfb ldrh r3, [r7, #38] @ 0x26
80068f8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80068fc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006900: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006904: f043 0380 orr.w r3, r3, #128 @ 0x80
8006908: b29b uxth r3, r3
800690a: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800690c: 687a ldr r2, [r7, #4]
800690e: 683b ldr r3, [r7, #0]
8006910: 781b ldrb r3, [r3, #0]
8006912: 009b lsls r3, r3, #2
8006914: 4413 add r3, r2
8006916: 881b ldrh r3, [r3, #0]
8006918: b29b uxth r3, r3
800691a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800691e: f023 0340 bic.w r3, r3, #64 @ 0x40
8006922: 84bb strh r3, [r7, #36] @ 0x24
8006924: 687a ldr r2, [r7, #4]
8006926: 683b ldr r3, [r7, #0]
8006928: 781b ldrb r3, [r3, #0]
800692a: 009b lsls r3, r3, #2
800692c: 441a add r2, r3
800692e: 8cbb ldrh r3, [r7, #36] @ 0x24
8006930: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006934: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006938: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800693c: f043 0380 orr.w r3, r3, #128 @ 0x80
8006940: b29b uxth r3, r3
8006942: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8006944: 687a ldr r2, [r7, #4]
8006946: 683b ldr r3, [r7, #0]
8006948: 781b ldrb r3, [r3, #0]
800694a: 009b lsls r3, r3, #2
800694c: 4413 add r3, r2
800694e: 881b ldrh r3, [r3, #0]
8006950: b29b uxth r3, r3
8006952: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006956: f023 0370 bic.w r3, r3, #112 @ 0x70
800695a: 847b strh r3, [r7, #34] @ 0x22
800695c: 687a ldr r2, [r7, #4]
800695e: 683b ldr r3, [r7, #0]
8006960: 781b ldrb r3, [r3, #0]
8006962: 009b lsls r3, r3, #2
8006964: 441a add r2, r3
8006966: 8c7b ldrh r3, [r7, #34] @ 0x22
8006968: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800696c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006970: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006974: f043 0380 orr.w r3, r3, #128 @ 0x80
8006978: b29b uxth r3, r3
800697a: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
800697c: 2300 movs r3, #0
}
800697e: 4618 mov r0, r3
8006980: 3734 adds r7, #52 @ 0x34
8006982: 46bd mov sp, r7
8006984: bc80 pop {r7}
8006986: 4770 bx lr
08006988 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8006988: b580 push {r7, lr}
800698a: b0c2 sub sp, #264 @ 0x108
800698c: af00 add r7, sp, #0
800698e: f507 7384 add.w r3, r7, #264 @ 0x108
8006992: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006996: 6018 str r0, [r3, #0]
8006998: f507 7384 add.w r3, r7, #264 @ 0x108
800699c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069a0: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
80069a2: f507 7384 add.w r3, r7, #264 @ 0x108
80069a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069aa: 681b ldr r3, [r3, #0]
80069ac: 785b ldrb r3, [r3, #1]
80069ae: 2b01 cmp r3, #1
80069b0: f040 86b7 bne.w 8007722 <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
80069b4: f507 7384 add.w r3, r7, #264 @ 0x108
80069b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069bc: 681b ldr r3, [r3, #0]
80069be: 699a ldr r2, [r3, #24]
80069c0: f507 7384 add.w r3, r7, #264 @ 0x108
80069c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069c8: 681b ldr r3, [r3, #0]
80069ca: 691b ldr r3, [r3, #16]
80069cc: 429a cmp r2, r3
80069ce: d908 bls.n 80069e2 <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
80069d0: f507 7384 add.w r3, r7, #264 @ 0x108
80069d4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069d8: 681b ldr r3, [r3, #0]
80069da: 691b ldr r3, [r3, #16]
80069dc: f8c7 3104 str.w r3, [r7, #260] @ 0x104
80069e0: e007 b.n 80069f2 <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
80069e2: f507 7384 add.w r3, r7, #264 @ 0x108
80069e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069ea: 681b ldr r3, [r3, #0]
80069ec: 699b ldr r3, [r3, #24]
80069ee: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
80069f2: f507 7384 add.w r3, r7, #264 @ 0x108
80069f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80069fa: 681b ldr r3, [r3, #0]
80069fc: 7b1b ldrb r3, [r3, #12]
80069fe: 2b00 cmp r3, #0
8006a00: d13a bne.n 8006a78 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8006a02: f507 7384 add.w r3, r7, #264 @ 0x108
8006a06: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006a0a: 681b ldr r3, [r3, #0]
8006a0c: 6959 ldr r1, [r3, #20]
8006a0e: f507 7384 add.w r3, r7, #264 @ 0x108
8006a12: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006a16: 681b ldr r3, [r3, #0]
8006a18: 88da ldrh r2, [r3, #6]
8006a1a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006a1e: b29b uxth r3, r3
8006a20: f507 7084 add.w r0, r7, #264 @ 0x108
8006a24: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8006a28: 6800 ldr r0, [r0, #0]
8006a2a: f001 fc9c bl 8008366 <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8006a2e: f507 7384 add.w r3, r7, #264 @ 0x108
8006a32: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006a36: 681b ldr r3, [r3, #0]
8006a38: 613b str r3, [r7, #16]
8006a3a: f507 7384 add.w r3, r7, #264 @ 0x108
8006a3e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006a42: 681b ldr r3, [r3, #0]
8006a44: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006a48: b29b uxth r3, r3
8006a4a: 461a mov r2, r3
8006a4c: 693b ldr r3, [r7, #16]
8006a4e: 4413 add r3, r2
8006a50: 613b str r3, [r7, #16]
8006a52: f507 7384 add.w r3, r7, #264 @ 0x108
8006a56: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006a5a: 681b ldr r3, [r3, #0]
8006a5c: 781b ldrb r3, [r3, #0]
8006a5e: 011a lsls r2, r3, #4
8006a60: 693b ldr r3, [r7, #16]
8006a62: 4413 add r3, r2
8006a64: f203 4304 addw r3, r3, #1028 @ 0x404
8006a68: 60fb str r3, [r7, #12]
8006a6a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006a6e: b29a uxth r2, r3
8006a70: 68fb ldr r3, [r7, #12]
8006a72: 801a strh r2, [r3, #0]
8006a74: f000 be1f b.w 80076b6 <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
8006a78: f507 7384 add.w r3, r7, #264 @ 0x108
8006a7c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006a80: 681b ldr r3, [r3, #0]
8006a82: 78db ldrb r3, [r3, #3]
8006a84: 2b02 cmp r3, #2
8006a86: f040 8462 bne.w 800734e <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
8006a8a: f507 7384 add.w r3, r7, #264 @ 0x108
8006a8e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006a92: 681b ldr r3, [r3, #0]
8006a94: 6a1a ldr r2, [r3, #32]
8006a96: f507 7384 add.w r3, r7, #264 @ 0x108
8006a9a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006a9e: 681b ldr r3, [r3, #0]
8006aa0: 691b ldr r3, [r3, #16]
8006aa2: 429a cmp r2, r3
8006aa4: f240 83df bls.w 8007266 <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8006aa8: f507 7384 add.w r3, r7, #264 @ 0x108
8006aac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006ab0: 681a ldr r2, [r3, #0]
8006ab2: f507 7384 add.w r3, r7, #264 @ 0x108
8006ab6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006aba: 681b ldr r3, [r3, #0]
8006abc: 781b ldrb r3, [r3, #0]
8006abe: 009b lsls r3, r3, #2
8006ac0: 4413 add r3, r2
8006ac2: 881b ldrh r3, [r3, #0]
8006ac4: b29b uxth r3, r3
8006ac6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006aca: f023 0370 bic.w r3, r3, #112 @ 0x70
8006ace: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
8006ad2: f507 7384 add.w r3, r7, #264 @ 0x108
8006ad6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006ada: 681a ldr r2, [r3, #0]
8006adc: f507 7384 add.w r3, r7, #264 @ 0x108
8006ae0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006ae4: 681b ldr r3, [r3, #0]
8006ae6: 781b ldrb r3, [r3, #0]
8006ae8: 009b lsls r3, r3, #2
8006aea: 441a add r2, r3
8006aec: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
8006af0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006af4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006af8: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8006afc: f043 0380 orr.w r3, r3, #128 @ 0x80
8006b00: b29b uxth r3, r3
8006b02: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8006b04: f507 7384 add.w r3, r7, #264 @ 0x108
8006b08: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b0c: 681b ldr r3, [r3, #0]
8006b0e: 6a1a ldr r2, [r3, #32]
8006b10: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006b14: 1ad2 subs r2, r2, r3
8006b16: f507 7384 add.w r3, r7, #264 @ 0x108
8006b1a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b1e: 681b ldr r3, [r3, #0]
8006b20: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8006b22: f507 7384 add.w r3, r7, #264 @ 0x108
8006b26: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006b2a: 681a ldr r2, [r3, #0]
8006b2c: f507 7384 add.w r3, r7, #264 @ 0x108
8006b30: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b34: 681b ldr r3, [r3, #0]
8006b36: 781b ldrb r3, [r3, #0]
8006b38: 009b lsls r3, r3, #2
8006b3a: 4413 add r3, r2
8006b3c: 881b ldrh r3, [r3, #0]
8006b3e: b29b uxth r3, r3
8006b40: f003 0340 and.w r3, r3, #64 @ 0x40
8006b44: 2b00 cmp r3, #0
8006b46: f000 81c7 beq.w 8006ed8 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8006b4a: f507 7384 add.w r3, r7, #264 @ 0x108
8006b4e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006b52: 681b ldr r3, [r3, #0]
8006b54: 633b str r3, [r7, #48] @ 0x30
8006b56: f507 7384 add.w r3, r7, #264 @ 0x108
8006b5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b5e: 681b ldr r3, [r3, #0]
8006b60: 785b ldrb r3, [r3, #1]
8006b62: 2b00 cmp r3, #0
8006b64: d177 bne.n 8006c56 <USB_EPStartXfer+0x2ce>
8006b66: f507 7384 add.w r3, r7, #264 @ 0x108
8006b6a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006b6e: 681b ldr r3, [r3, #0]
8006b70: 62bb str r3, [r7, #40] @ 0x28
8006b72: f507 7384 add.w r3, r7, #264 @ 0x108
8006b76: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006b7a: 681b ldr r3, [r3, #0]
8006b7c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006b80: b29b uxth r3, r3
8006b82: 461a mov r2, r3
8006b84: 6abb ldr r3, [r7, #40] @ 0x28
8006b86: 4413 add r3, r2
8006b88: 62bb str r3, [r7, #40] @ 0x28
8006b8a: f507 7384 add.w r3, r7, #264 @ 0x108
8006b8e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006b92: 681b ldr r3, [r3, #0]
8006b94: 781b ldrb r3, [r3, #0]
8006b96: 011a lsls r2, r3, #4
8006b98: 6abb ldr r3, [r7, #40] @ 0x28
8006b9a: 4413 add r3, r2
8006b9c: f203 430c addw r3, r3, #1036 @ 0x40c
8006ba0: 627b str r3, [r7, #36] @ 0x24
8006ba2: 6a7b ldr r3, [r7, #36] @ 0x24
8006ba4: 881b ldrh r3, [r3, #0]
8006ba6: b29b uxth r3, r3
8006ba8: f3c3 0309 ubfx r3, r3, #0, #10
8006bac: b29a uxth r2, r3
8006bae: 6a7b ldr r3, [r7, #36] @ 0x24
8006bb0: 801a strh r2, [r3, #0]
8006bb2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006bb6: 2b3e cmp r3, #62 @ 0x3e
8006bb8: d921 bls.n 8006bfe <USB_EPStartXfer+0x276>
8006bba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006bbe: 095b lsrs r3, r3, #5
8006bc0: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8006bc4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006bc8: f003 031f and.w r3, r3, #31
8006bcc: 2b00 cmp r3, #0
8006bce: d104 bne.n 8006bda <USB_EPStartXfer+0x252>
8006bd0: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8006bd4: 3b01 subs r3, #1
8006bd6: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8006bda: 6a7b ldr r3, [r7, #36] @ 0x24
8006bdc: 881b ldrh r3, [r3, #0]
8006bde: b29a uxth r2, r3
8006be0: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8006be4: b29b uxth r3, r3
8006be6: 029b lsls r3, r3, #10
8006be8: b29b uxth r3, r3
8006bea: 4313 orrs r3, r2
8006bec: b29b uxth r3, r3
8006bee: ea6f 4343 mvn.w r3, r3, lsl #17
8006bf2: ea6f 4353 mvn.w r3, r3, lsr #17
8006bf6: b29a uxth r2, r3
8006bf8: 6a7b ldr r3, [r7, #36] @ 0x24
8006bfa: 801a strh r2, [r3, #0]
8006bfc: e050 b.n 8006ca0 <USB_EPStartXfer+0x318>
8006bfe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006c02: 2b00 cmp r3, #0
8006c04: d10a bne.n 8006c1c <USB_EPStartXfer+0x294>
8006c06: 6a7b ldr r3, [r7, #36] @ 0x24
8006c08: 881b ldrh r3, [r3, #0]
8006c0a: b29b uxth r3, r3
8006c0c: ea6f 4343 mvn.w r3, r3, lsl #17
8006c10: ea6f 4353 mvn.w r3, r3, lsr #17
8006c14: b29a uxth r2, r3
8006c16: 6a7b ldr r3, [r7, #36] @ 0x24
8006c18: 801a strh r2, [r3, #0]
8006c1a: e041 b.n 8006ca0 <USB_EPStartXfer+0x318>
8006c1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006c20: 085b lsrs r3, r3, #1
8006c22: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8006c26: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006c2a: f003 0301 and.w r3, r3, #1
8006c2e: 2b00 cmp r3, #0
8006c30: d004 beq.n 8006c3c <USB_EPStartXfer+0x2b4>
8006c32: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8006c36: 3301 adds r3, #1
8006c38: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8006c3c: 6a7b ldr r3, [r7, #36] @ 0x24
8006c3e: 881b ldrh r3, [r3, #0]
8006c40: b29a uxth r2, r3
8006c42: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8006c46: b29b uxth r3, r3
8006c48: 029b lsls r3, r3, #10
8006c4a: b29b uxth r3, r3
8006c4c: 4313 orrs r3, r2
8006c4e: b29a uxth r2, r3
8006c50: 6a7b ldr r3, [r7, #36] @ 0x24
8006c52: 801a strh r2, [r3, #0]
8006c54: e024 b.n 8006ca0 <USB_EPStartXfer+0x318>
8006c56: f507 7384 add.w r3, r7, #264 @ 0x108
8006c5a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006c5e: 681b ldr r3, [r3, #0]
8006c60: 785b ldrb r3, [r3, #1]
8006c62: 2b01 cmp r3, #1
8006c64: d11c bne.n 8006ca0 <USB_EPStartXfer+0x318>
8006c66: f507 7384 add.w r3, r7, #264 @ 0x108
8006c6a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006c6e: 681b ldr r3, [r3, #0]
8006c70: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006c74: b29b uxth r3, r3
8006c76: 461a mov r2, r3
8006c78: 6b3b ldr r3, [r7, #48] @ 0x30
8006c7a: 4413 add r3, r2
8006c7c: 633b str r3, [r7, #48] @ 0x30
8006c7e: f507 7384 add.w r3, r7, #264 @ 0x108
8006c82: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006c86: 681b ldr r3, [r3, #0]
8006c88: 781b ldrb r3, [r3, #0]
8006c8a: 011a lsls r2, r3, #4
8006c8c: 6b3b ldr r3, [r7, #48] @ 0x30
8006c8e: 4413 add r3, r2
8006c90: f203 430c addw r3, r3, #1036 @ 0x40c
8006c94: 62fb str r3, [r7, #44] @ 0x2c
8006c96: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006c9a: b29a uxth r2, r3
8006c9c: 6afb ldr r3, [r7, #44] @ 0x2c
8006c9e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8006ca0: f507 7384 add.w r3, r7, #264 @ 0x108
8006ca4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006ca8: 681b ldr r3, [r3, #0]
8006caa: 895b ldrh r3, [r3, #10]
8006cac: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006cb0: f507 7384 add.w r3, r7, #264 @ 0x108
8006cb4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006cb8: 681b ldr r3, [r3, #0]
8006cba: 6959 ldr r1, [r3, #20]
8006cbc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006cc0: b29b uxth r3, r3
8006cc2: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8006cc6: f507 7084 add.w r0, r7, #264 @ 0x108
8006cca: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8006cce: 6800 ldr r0, [r0, #0]
8006cd0: f001 fb49 bl 8008366 <USB_WritePMA>
ep->xfer_buff += len;
8006cd4: f507 7384 add.w r3, r7, #264 @ 0x108
8006cd8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006cdc: 681b ldr r3, [r3, #0]
8006cde: 695a ldr r2, [r3, #20]
8006ce0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006ce4: 441a add r2, r3
8006ce6: f507 7384 add.w r3, r7, #264 @ 0x108
8006cea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006cee: 681b ldr r3, [r3, #0]
8006cf0: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8006cf2: f507 7384 add.w r3, r7, #264 @ 0x108
8006cf6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006cfa: 681b ldr r3, [r3, #0]
8006cfc: 6a1a ldr r2, [r3, #32]
8006cfe: f507 7384 add.w r3, r7, #264 @ 0x108
8006d02: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006d06: 681b ldr r3, [r3, #0]
8006d08: 691b ldr r3, [r3, #16]
8006d0a: 429a cmp r2, r3
8006d0c: d90f bls.n 8006d2e <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
8006d0e: f507 7384 add.w r3, r7, #264 @ 0x108
8006d12: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006d16: 681b ldr r3, [r3, #0]
8006d18: 6a1a ldr r2, [r3, #32]
8006d1a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006d1e: 1ad2 subs r2, r2, r3
8006d20: f507 7384 add.w r3, r7, #264 @ 0x108
8006d24: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006d28: 681b ldr r3, [r3, #0]
8006d2a: 621a str r2, [r3, #32]
8006d2c: e00e b.n 8006d4c <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
8006d2e: f507 7384 add.w r3, r7, #264 @ 0x108
8006d32: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006d36: 681b ldr r3, [r3, #0]
8006d38: 6a1b ldr r3, [r3, #32]
8006d3a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8006d3e: f507 7384 add.w r3, r7, #264 @ 0x108
8006d42: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006d46: 681b ldr r3, [r3, #0]
8006d48: 2200 movs r2, #0
8006d4a: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8006d4c: f507 7384 add.w r3, r7, #264 @ 0x108
8006d50: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006d54: 681b ldr r3, [r3, #0]
8006d56: 785b ldrb r3, [r3, #1]
8006d58: 2b00 cmp r3, #0
8006d5a: d177 bne.n 8006e4c <USB_EPStartXfer+0x4c4>
8006d5c: f507 7384 add.w r3, r7, #264 @ 0x108
8006d60: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006d64: 681b ldr r3, [r3, #0]
8006d66: 61bb str r3, [r7, #24]
8006d68: f507 7384 add.w r3, r7, #264 @ 0x108
8006d6c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006d70: 681b ldr r3, [r3, #0]
8006d72: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006d76: b29b uxth r3, r3
8006d78: 461a mov r2, r3
8006d7a: 69bb ldr r3, [r7, #24]
8006d7c: 4413 add r3, r2
8006d7e: 61bb str r3, [r7, #24]
8006d80: f507 7384 add.w r3, r7, #264 @ 0x108
8006d84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006d88: 681b ldr r3, [r3, #0]
8006d8a: 781b ldrb r3, [r3, #0]
8006d8c: 011a lsls r2, r3, #4
8006d8e: 69bb ldr r3, [r7, #24]
8006d90: 4413 add r3, r2
8006d92: f203 4304 addw r3, r3, #1028 @ 0x404
8006d96: 617b str r3, [r7, #20]
8006d98: 697b ldr r3, [r7, #20]
8006d9a: 881b ldrh r3, [r3, #0]
8006d9c: b29b uxth r3, r3
8006d9e: f3c3 0309 ubfx r3, r3, #0, #10
8006da2: b29a uxth r2, r3
8006da4: 697b ldr r3, [r7, #20]
8006da6: 801a strh r2, [r3, #0]
8006da8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006dac: 2b3e cmp r3, #62 @ 0x3e
8006dae: d921 bls.n 8006df4 <USB_EPStartXfer+0x46c>
8006db0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006db4: 095b lsrs r3, r3, #5
8006db6: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8006dba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006dbe: f003 031f and.w r3, r3, #31
8006dc2: 2b00 cmp r3, #0
8006dc4: d104 bne.n 8006dd0 <USB_EPStartXfer+0x448>
8006dc6: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8006dca: 3b01 subs r3, #1
8006dcc: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8006dd0: 697b ldr r3, [r7, #20]
8006dd2: 881b ldrh r3, [r3, #0]
8006dd4: b29a uxth r2, r3
8006dd6: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8006dda: b29b uxth r3, r3
8006ddc: 029b lsls r3, r3, #10
8006dde: b29b uxth r3, r3
8006de0: 4313 orrs r3, r2
8006de2: b29b uxth r3, r3
8006de4: ea6f 4343 mvn.w r3, r3, lsl #17
8006de8: ea6f 4353 mvn.w r3, r3, lsr #17
8006dec: b29a uxth r2, r3
8006dee: 697b ldr r3, [r7, #20]
8006df0: 801a strh r2, [r3, #0]
8006df2: e056 b.n 8006ea2 <USB_EPStartXfer+0x51a>
8006df4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006df8: 2b00 cmp r3, #0
8006dfa: d10a bne.n 8006e12 <USB_EPStartXfer+0x48a>
8006dfc: 697b ldr r3, [r7, #20]
8006dfe: 881b ldrh r3, [r3, #0]
8006e00: b29b uxth r3, r3
8006e02: ea6f 4343 mvn.w r3, r3, lsl #17
8006e06: ea6f 4353 mvn.w r3, r3, lsr #17
8006e0a: b29a uxth r2, r3
8006e0c: 697b ldr r3, [r7, #20]
8006e0e: 801a strh r2, [r3, #0]
8006e10: e047 b.n 8006ea2 <USB_EPStartXfer+0x51a>
8006e12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006e16: 085b lsrs r3, r3, #1
8006e18: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8006e1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006e20: f003 0301 and.w r3, r3, #1
8006e24: 2b00 cmp r3, #0
8006e26: d004 beq.n 8006e32 <USB_EPStartXfer+0x4aa>
8006e28: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8006e2c: 3301 adds r3, #1
8006e2e: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8006e32: 697b ldr r3, [r7, #20]
8006e34: 881b ldrh r3, [r3, #0]
8006e36: b29a uxth r2, r3
8006e38: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8006e3c: b29b uxth r3, r3
8006e3e: 029b lsls r3, r3, #10
8006e40: b29b uxth r3, r3
8006e42: 4313 orrs r3, r2
8006e44: b29a uxth r2, r3
8006e46: 697b ldr r3, [r7, #20]
8006e48: 801a strh r2, [r3, #0]
8006e4a: e02a b.n 8006ea2 <USB_EPStartXfer+0x51a>
8006e4c: f507 7384 add.w r3, r7, #264 @ 0x108
8006e50: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e54: 681b ldr r3, [r3, #0]
8006e56: 785b ldrb r3, [r3, #1]
8006e58: 2b01 cmp r3, #1
8006e5a: d122 bne.n 8006ea2 <USB_EPStartXfer+0x51a>
8006e5c: f507 7384 add.w r3, r7, #264 @ 0x108
8006e60: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006e64: 681b ldr r3, [r3, #0]
8006e66: 623b str r3, [r7, #32]
8006e68: f507 7384 add.w r3, r7, #264 @ 0x108
8006e6c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006e70: 681b ldr r3, [r3, #0]
8006e72: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006e76: b29b uxth r3, r3
8006e78: 461a mov r2, r3
8006e7a: 6a3b ldr r3, [r7, #32]
8006e7c: 4413 add r3, r2
8006e7e: 623b str r3, [r7, #32]
8006e80: f507 7384 add.w r3, r7, #264 @ 0x108
8006e84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006e88: 681b ldr r3, [r3, #0]
8006e8a: 781b ldrb r3, [r3, #0]
8006e8c: 011a lsls r2, r3, #4
8006e8e: 6a3b ldr r3, [r7, #32]
8006e90: 4413 add r3, r2
8006e92: f203 4304 addw r3, r3, #1028 @ 0x404
8006e96: 61fb str r3, [r7, #28]
8006e98: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006e9c: b29a uxth r2, r3
8006e9e: 69fb ldr r3, [r7, #28]
8006ea0: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8006ea2: f507 7384 add.w r3, r7, #264 @ 0x108
8006ea6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006eaa: 681b ldr r3, [r3, #0]
8006eac: 891b ldrh r3, [r3, #8]
8006eae: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8006eb2: f507 7384 add.w r3, r7, #264 @ 0x108
8006eb6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006eba: 681b ldr r3, [r3, #0]
8006ebc: 6959 ldr r1, [r3, #20]
8006ebe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006ec2: b29b uxth r3, r3
8006ec4: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8006ec8: f507 7084 add.w r0, r7, #264 @ 0x108
8006ecc: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8006ed0: 6800 ldr r0, [r0, #0]
8006ed2: f001 fa48 bl 8008366 <USB_WritePMA>
8006ed6: e3ee b.n 80076b6 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8006ed8: f507 7384 add.w r3, r7, #264 @ 0x108
8006edc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006ee0: 681b ldr r3, [r3, #0]
8006ee2: 785b ldrb r3, [r3, #1]
8006ee4: 2b00 cmp r3, #0
8006ee6: d177 bne.n 8006fd8 <USB_EPStartXfer+0x650>
8006ee8: f507 7384 add.w r3, r7, #264 @ 0x108
8006eec: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006ef0: 681b ldr r3, [r3, #0]
8006ef2: 64bb str r3, [r7, #72] @ 0x48
8006ef4: f507 7384 add.w r3, r7, #264 @ 0x108
8006ef8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006efc: 681b ldr r3, [r3, #0]
8006efe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006f02: b29b uxth r3, r3
8006f04: 461a mov r2, r3
8006f06: 6cbb ldr r3, [r7, #72] @ 0x48
8006f08: 4413 add r3, r2
8006f0a: 64bb str r3, [r7, #72] @ 0x48
8006f0c: f507 7384 add.w r3, r7, #264 @ 0x108
8006f10: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006f14: 681b ldr r3, [r3, #0]
8006f16: 781b ldrb r3, [r3, #0]
8006f18: 011a lsls r2, r3, #4
8006f1a: 6cbb ldr r3, [r7, #72] @ 0x48
8006f1c: 4413 add r3, r2
8006f1e: f203 4304 addw r3, r3, #1028 @ 0x404
8006f22: 647b str r3, [r7, #68] @ 0x44
8006f24: 6c7b ldr r3, [r7, #68] @ 0x44
8006f26: 881b ldrh r3, [r3, #0]
8006f28: b29b uxth r3, r3
8006f2a: f3c3 0309 ubfx r3, r3, #0, #10
8006f2e: b29a uxth r2, r3
8006f30: 6c7b ldr r3, [r7, #68] @ 0x44
8006f32: 801a strh r2, [r3, #0]
8006f34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006f38: 2b3e cmp r3, #62 @ 0x3e
8006f3a: d921 bls.n 8006f80 <USB_EPStartXfer+0x5f8>
8006f3c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006f40: 095b lsrs r3, r3, #5
8006f42: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8006f46: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006f4a: f003 031f and.w r3, r3, #31
8006f4e: 2b00 cmp r3, #0
8006f50: d104 bne.n 8006f5c <USB_EPStartXfer+0x5d4>
8006f52: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8006f56: 3b01 subs r3, #1
8006f58: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8006f5c: 6c7b ldr r3, [r7, #68] @ 0x44
8006f5e: 881b ldrh r3, [r3, #0]
8006f60: b29a uxth r2, r3
8006f62: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8006f66: b29b uxth r3, r3
8006f68: 029b lsls r3, r3, #10
8006f6a: b29b uxth r3, r3
8006f6c: 4313 orrs r3, r2
8006f6e: b29b uxth r3, r3
8006f70: ea6f 4343 mvn.w r3, r3, lsl #17
8006f74: ea6f 4353 mvn.w r3, r3, lsr #17
8006f78: b29a uxth r2, r3
8006f7a: 6c7b ldr r3, [r7, #68] @ 0x44
8006f7c: 801a strh r2, [r3, #0]
8006f7e: e056 b.n 800702e <USB_EPStartXfer+0x6a6>
8006f80: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006f84: 2b00 cmp r3, #0
8006f86: d10a bne.n 8006f9e <USB_EPStartXfer+0x616>
8006f88: 6c7b ldr r3, [r7, #68] @ 0x44
8006f8a: 881b ldrh r3, [r3, #0]
8006f8c: b29b uxth r3, r3
8006f8e: ea6f 4343 mvn.w r3, r3, lsl #17
8006f92: ea6f 4353 mvn.w r3, r3, lsr #17
8006f96: b29a uxth r2, r3
8006f98: 6c7b ldr r3, [r7, #68] @ 0x44
8006f9a: 801a strh r2, [r3, #0]
8006f9c: e047 b.n 800702e <USB_EPStartXfer+0x6a6>
8006f9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006fa2: 085b lsrs r3, r3, #1
8006fa4: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8006fa8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006fac: f003 0301 and.w r3, r3, #1
8006fb0: 2b00 cmp r3, #0
8006fb2: d004 beq.n 8006fbe <USB_EPStartXfer+0x636>
8006fb4: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8006fb8: 3301 adds r3, #1
8006fba: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8006fbe: 6c7b ldr r3, [r7, #68] @ 0x44
8006fc0: 881b ldrh r3, [r3, #0]
8006fc2: b29a uxth r2, r3
8006fc4: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8006fc8: b29b uxth r3, r3
8006fca: 029b lsls r3, r3, #10
8006fcc: b29b uxth r3, r3
8006fce: 4313 orrs r3, r2
8006fd0: b29a uxth r2, r3
8006fd2: 6c7b ldr r3, [r7, #68] @ 0x44
8006fd4: 801a strh r2, [r3, #0]
8006fd6: e02a b.n 800702e <USB_EPStartXfer+0x6a6>
8006fd8: f507 7384 add.w r3, r7, #264 @ 0x108
8006fdc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006fe0: 681b ldr r3, [r3, #0]
8006fe2: 785b ldrb r3, [r3, #1]
8006fe4: 2b01 cmp r3, #1
8006fe6: d122 bne.n 800702e <USB_EPStartXfer+0x6a6>
8006fe8: f507 7384 add.w r3, r7, #264 @ 0x108
8006fec: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006ff0: 681b ldr r3, [r3, #0]
8006ff2: 653b str r3, [r7, #80] @ 0x50
8006ff4: f507 7384 add.w r3, r7, #264 @ 0x108
8006ff8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006ffc: 681b ldr r3, [r3, #0]
8006ffe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007002: b29b uxth r3, r3
8007004: 461a mov r2, r3
8007006: 6d3b ldr r3, [r7, #80] @ 0x50
8007008: 4413 add r3, r2
800700a: 653b str r3, [r7, #80] @ 0x50
800700c: f507 7384 add.w r3, r7, #264 @ 0x108
8007010: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007014: 681b ldr r3, [r3, #0]
8007016: 781b ldrb r3, [r3, #0]
8007018: 011a lsls r2, r3, #4
800701a: 6d3b ldr r3, [r7, #80] @ 0x50
800701c: 4413 add r3, r2
800701e: f203 4304 addw r3, r3, #1028 @ 0x404
8007022: 64fb str r3, [r7, #76] @ 0x4c
8007024: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007028: b29a uxth r2, r3
800702a: 6cfb ldr r3, [r7, #76] @ 0x4c
800702c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800702e: f507 7384 add.w r3, r7, #264 @ 0x108
8007032: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007036: 681b ldr r3, [r3, #0]
8007038: 891b ldrh r3, [r3, #8]
800703a: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800703e: f507 7384 add.w r3, r7, #264 @ 0x108
8007042: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007046: 681b ldr r3, [r3, #0]
8007048: 6959 ldr r1, [r3, #20]
800704a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800704e: b29b uxth r3, r3
8007050: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8007054: f507 7084 add.w r0, r7, #264 @ 0x108
8007058: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800705c: 6800 ldr r0, [r0, #0]
800705e: f001 f982 bl 8008366 <USB_WritePMA>
ep->xfer_buff += len;
8007062: f507 7384 add.w r3, r7, #264 @ 0x108
8007066: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800706a: 681b ldr r3, [r3, #0]
800706c: 695a ldr r2, [r3, #20]
800706e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007072: 441a add r2, r3
8007074: f507 7384 add.w r3, r7, #264 @ 0x108
8007078: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800707c: 681b ldr r3, [r3, #0]
800707e: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8007080: f507 7384 add.w r3, r7, #264 @ 0x108
8007084: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007088: 681b ldr r3, [r3, #0]
800708a: 6a1a ldr r2, [r3, #32]
800708c: f507 7384 add.w r3, r7, #264 @ 0x108
8007090: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007094: 681b ldr r3, [r3, #0]
8007096: 691b ldr r3, [r3, #16]
8007098: 429a cmp r2, r3
800709a: d90f bls.n 80070bc <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
800709c: f507 7384 add.w r3, r7, #264 @ 0x108
80070a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80070a4: 681b ldr r3, [r3, #0]
80070a6: 6a1a ldr r2, [r3, #32]
80070a8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80070ac: 1ad2 subs r2, r2, r3
80070ae: f507 7384 add.w r3, r7, #264 @ 0x108
80070b2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80070b6: 681b ldr r3, [r3, #0]
80070b8: 621a str r2, [r3, #32]
80070ba: e00e b.n 80070da <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
80070bc: f507 7384 add.w r3, r7, #264 @ 0x108
80070c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80070c4: 681b ldr r3, [r3, #0]
80070c6: 6a1b ldr r3, [r3, #32]
80070c8: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
80070cc: f507 7384 add.w r3, r7, #264 @ 0x108
80070d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80070d4: 681b ldr r3, [r3, #0]
80070d6: 2200 movs r2, #0
80070d8: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
80070da: f507 7384 add.w r3, r7, #264 @ 0x108
80070de: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80070e2: 681b ldr r3, [r3, #0]
80070e4: 643b str r3, [r7, #64] @ 0x40
80070e6: f507 7384 add.w r3, r7, #264 @ 0x108
80070ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80070ee: 681b ldr r3, [r3, #0]
80070f0: 785b ldrb r3, [r3, #1]
80070f2: 2b00 cmp r3, #0
80070f4: d177 bne.n 80071e6 <USB_EPStartXfer+0x85e>
80070f6: f507 7384 add.w r3, r7, #264 @ 0x108
80070fa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80070fe: 681b ldr r3, [r3, #0]
8007100: 63bb str r3, [r7, #56] @ 0x38
8007102: f507 7384 add.w r3, r7, #264 @ 0x108
8007106: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800710a: 681b ldr r3, [r3, #0]
800710c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007110: b29b uxth r3, r3
8007112: 461a mov r2, r3
8007114: 6bbb ldr r3, [r7, #56] @ 0x38
8007116: 4413 add r3, r2
8007118: 63bb str r3, [r7, #56] @ 0x38
800711a: f507 7384 add.w r3, r7, #264 @ 0x108
800711e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007122: 681b ldr r3, [r3, #0]
8007124: 781b ldrb r3, [r3, #0]
8007126: 011a lsls r2, r3, #4
8007128: 6bbb ldr r3, [r7, #56] @ 0x38
800712a: 4413 add r3, r2
800712c: f203 430c addw r3, r3, #1036 @ 0x40c
8007130: 637b str r3, [r7, #52] @ 0x34
8007132: 6b7b ldr r3, [r7, #52] @ 0x34
8007134: 881b ldrh r3, [r3, #0]
8007136: b29b uxth r3, r3
8007138: f3c3 0309 ubfx r3, r3, #0, #10
800713c: b29a uxth r2, r3
800713e: 6b7b ldr r3, [r7, #52] @ 0x34
8007140: 801a strh r2, [r3, #0]
8007142: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007146: 2b3e cmp r3, #62 @ 0x3e
8007148: d921 bls.n 800718e <USB_EPStartXfer+0x806>
800714a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800714e: 095b lsrs r3, r3, #5
8007150: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8007154: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007158: f003 031f and.w r3, r3, #31
800715c: 2b00 cmp r3, #0
800715e: d104 bne.n 800716a <USB_EPStartXfer+0x7e2>
8007160: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8007164: 3b01 subs r3, #1
8007166: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800716a: 6b7b ldr r3, [r7, #52] @ 0x34
800716c: 881b ldrh r3, [r3, #0]
800716e: b29a uxth r2, r3
8007170: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
8007174: b29b uxth r3, r3
8007176: 029b lsls r3, r3, #10
8007178: b29b uxth r3, r3
800717a: 4313 orrs r3, r2
800717c: b29b uxth r3, r3
800717e: ea6f 4343 mvn.w r3, r3, lsl #17
8007182: ea6f 4353 mvn.w r3, r3, lsr #17
8007186: b29a uxth r2, r3
8007188: 6b7b ldr r3, [r7, #52] @ 0x34
800718a: 801a strh r2, [r3, #0]
800718c: e050 b.n 8007230 <USB_EPStartXfer+0x8a8>
800718e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007192: 2b00 cmp r3, #0
8007194: d10a bne.n 80071ac <USB_EPStartXfer+0x824>
8007196: 6b7b ldr r3, [r7, #52] @ 0x34
8007198: 881b ldrh r3, [r3, #0]
800719a: b29b uxth r3, r3
800719c: ea6f 4343 mvn.w r3, r3, lsl #17
80071a0: ea6f 4353 mvn.w r3, r3, lsr #17
80071a4: b29a uxth r2, r3
80071a6: 6b7b ldr r3, [r7, #52] @ 0x34
80071a8: 801a strh r2, [r3, #0]
80071aa: e041 b.n 8007230 <USB_EPStartXfer+0x8a8>
80071ac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80071b0: 085b lsrs r3, r3, #1
80071b2: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
80071b6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80071ba: f003 0301 and.w r3, r3, #1
80071be: 2b00 cmp r3, #0
80071c0: d004 beq.n 80071cc <USB_EPStartXfer+0x844>
80071c2: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
80071c6: 3301 adds r3, #1
80071c8: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
80071cc: 6b7b ldr r3, [r7, #52] @ 0x34
80071ce: 881b ldrh r3, [r3, #0]
80071d0: b29a uxth r2, r3
80071d2: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
80071d6: b29b uxth r3, r3
80071d8: 029b lsls r3, r3, #10
80071da: b29b uxth r3, r3
80071dc: 4313 orrs r3, r2
80071de: b29a uxth r2, r3
80071e0: 6b7b ldr r3, [r7, #52] @ 0x34
80071e2: 801a strh r2, [r3, #0]
80071e4: e024 b.n 8007230 <USB_EPStartXfer+0x8a8>
80071e6: f507 7384 add.w r3, r7, #264 @ 0x108
80071ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80071ee: 681b ldr r3, [r3, #0]
80071f0: 785b ldrb r3, [r3, #1]
80071f2: 2b01 cmp r3, #1
80071f4: d11c bne.n 8007230 <USB_EPStartXfer+0x8a8>
80071f6: f507 7384 add.w r3, r7, #264 @ 0x108
80071fa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80071fe: 681b ldr r3, [r3, #0]
8007200: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007204: b29b uxth r3, r3
8007206: 461a mov r2, r3
8007208: 6c3b ldr r3, [r7, #64] @ 0x40
800720a: 4413 add r3, r2
800720c: 643b str r3, [r7, #64] @ 0x40
800720e: f507 7384 add.w r3, r7, #264 @ 0x108
8007212: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007216: 681b ldr r3, [r3, #0]
8007218: 781b ldrb r3, [r3, #0]
800721a: 011a lsls r2, r3, #4
800721c: 6c3b ldr r3, [r7, #64] @ 0x40
800721e: 4413 add r3, r2
8007220: f203 430c addw r3, r3, #1036 @ 0x40c
8007224: 63fb str r3, [r7, #60] @ 0x3c
8007226: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800722a: b29a uxth r2, r3
800722c: 6bfb ldr r3, [r7, #60] @ 0x3c
800722e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8007230: f507 7384 add.w r3, r7, #264 @ 0x108
8007234: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007238: 681b ldr r3, [r3, #0]
800723a: 895b ldrh r3, [r3, #10]
800723c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8007240: f507 7384 add.w r3, r7, #264 @ 0x108
8007244: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007248: 681b ldr r3, [r3, #0]
800724a: 6959 ldr r1, [r3, #20]
800724c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007250: b29b uxth r3, r3
8007252: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8007256: f507 7084 add.w r0, r7, #264 @ 0x108
800725a: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800725e: 6800 ldr r0, [r0, #0]
8007260: f001 f881 bl 8008366 <USB_WritePMA>
8007264: e227 b.n 80076b6 <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
8007266: f507 7384 add.w r3, r7, #264 @ 0x108
800726a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800726e: 681b ldr r3, [r3, #0]
8007270: 6a1b ldr r3, [r3, #32]
8007272: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
8007276: f507 7384 add.w r3, r7, #264 @ 0x108
800727a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800727e: 681a ldr r2, [r3, #0]
8007280: f507 7384 add.w r3, r7, #264 @ 0x108
8007284: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007288: 681b ldr r3, [r3, #0]
800728a: 781b ldrb r3, [r3, #0]
800728c: 009b lsls r3, r3, #2
800728e: 4413 add r3, r2
8007290: 881b ldrh r3, [r3, #0]
8007292: b29b uxth r3, r3
8007294: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8007298: f023 0370 bic.w r3, r3, #112 @ 0x70
800729c: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
80072a0: f507 7384 add.w r3, r7, #264 @ 0x108
80072a4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80072a8: 681a ldr r2, [r3, #0]
80072aa: f507 7384 add.w r3, r7, #264 @ 0x108
80072ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80072b2: 681b ldr r3, [r3, #0]
80072b4: 781b ldrb r3, [r3, #0]
80072b6: 009b lsls r3, r3, #2
80072b8: 441a add r2, r3
80072ba: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
80072be: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80072c2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80072c6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80072ca: f043 0380 orr.w r3, r3, #128 @ 0x80
80072ce: b29b uxth r3, r3
80072d0: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
80072d2: f507 7384 add.w r3, r7, #264 @ 0x108
80072d6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80072da: 681b ldr r3, [r3, #0]
80072dc: 65fb str r3, [r7, #92] @ 0x5c
80072de: f507 7384 add.w r3, r7, #264 @ 0x108
80072e2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80072e6: 681b ldr r3, [r3, #0]
80072e8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80072ec: b29b uxth r3, r3
80072ee: 461a mov r2, r3
80072f0: 6dfb ldr r3, [r7, #92] @ 0x5c
80072f2: 4413 add r3, r2
80072f4: 65fb str r3, [r7, #92] @ 0x5c
80072f6: f507 7384 add.w r3, r7, #264 @ 0x108
80072fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80072fe: 681b ldr r3, [r3, #0]
8007300: 781b ldrb r3, [r3, #0]
8007302: 011a lsls r2, r3, #4
8007304: 6dfb ldr r3, [r7, #92] @ 0x5c
8007306: 4413 add r3, r2
8007308: f203 4304 addw r3, r3, #1028 @ 0x404
800730c: 65bb str r3, [r7, #88] @ 0x58
800730e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007312: b29a uxth r2, r3
8007314: 6dbb ldr r3, [r7, #88] @ 0x58
8007316: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8007318: f507 7384 add.w r3, r7, #264 @ 0x108
800731c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007320: 681b ldr r3, [r3, #0]
8007322: 891b ldrh r3, [r3, #8]
8007324: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8007328: f507 7384 add.w r3, r7, #264 @ 0x108
800732c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007330: 681b ldr r3, [r3, #0]
8007332: 6959 ldr r1, [r3, #20]
8007334: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007338: b29b uxth r3, r3
800733a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800733e: f507 7084 add.w r0, r7, #264 @ 0x108
8007342: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8007346: 6800 ldr r0, [r0, #0]
8007348: f001 f80d bl 8008366 <USB_WritePMA>
800734c: e1b3 b.n 80076b6 <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800734e: f507 7384 add.w r3, r7, #264 @ 0x108
8007352: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007356: 681b ldr r3, [r3, #0]
8007358: 6a1a ldr r2, [r3, #32]
800735a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800735e: 1ad2 subs r2, r2, r3
8007360: f507 7384 add.w r3, r7, #264 @ 0x108
8007364: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007368: 681b ldr r3, [r3, #0]
800736a: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800736c: f507 7384 add.w r3, r7, #264 @ 0x108
8007370: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007374: 681a ldr r2, [r3, #0]
8007376: f507 7384 add.w r3, r7, #264 @ 0x108
800737a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800737e: 681b ldr r3, [r3, #0]
8007380: 781b ldrb r3, [r3, #0]
8007382: 009b lsls r3, r3, #2
8007384: 4413 add r3, r2
8007386: 881b ldrh r3, [r3, #0]
8007388: b29b uxth r3, r3
800738a: f003 0340 and.w r3, r3, #64 @ 0x40
800738e: 2b00 cmp r3, #0
8007390: f000 80c6 beq.w 8007520 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8007394: f507 7384 add.w r3, r7, #264 @ 0x108
8007398: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800739c: 681b ldr r3, [r3, #0]
800739e: 673b str r3, [r7, #112] @ 0x70
80073a0: f507 7384 add.w r3, r7, #264 @ 0x108
80073a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80073a8: 681b ldr r3, [r3, #0]
80073aa: 785b ldrb r3, [r3, #1]
80073ac: 2b00 cmp r3, #0
80073ae: d177 bne.n 80074a0 <USB_EPStartXfer+0xb18>
80073b0: f507 7384 add.w r3, r7, #264 @ 0x108
80073b4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80073b8: 681b ldr r3, [r3, #0]
80073ba: 66bb str r3, [r7, #104] @ 0x68
80073bc: f507 7384 add.w r3, r7, #264 @ 0x108
80073c0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80073c4: 681b ldr r3, [r3, #0]
80073c6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80073ca: b29b uxth r3, r3
80073cc: 461a mov r2, r3
80073ce: 6ebb ldr r3, [r7, #104] @ 0x68
80073d0: 4413 add r3, r2
80073d2: 66bb str r3, [r7, #104] @ 0x68
80073d4: f507 7384 add.w r3, r7, #264 @ 0x108
80073d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80073dc: 681b ldr r3, [r3, #0]
80073de: 781b ldrb r3, [r3, #0]
80073e0: 011a lsls r2, r3, #4
80073e2: 6ebb ldr r3, [r7, #104] @ 0x68
80073e4: 4413 add r3, r2
80073e6: f203 430c addw r3, r3, #1036 @ 0x40c
80073ea: 667b str r3, [r7, #100] @ 0x64
80073ec: 6e7b ldr r3, [r7, #100] @ 0x64
80073ee: 881b ldrh r3, [r3, #0]
80073f0: b29b uxth r3, r3
80073f2: f3c3 0309 ubfx r3, r3, #0, #10
80073f6: b29a uxth r2, r3
80073f8: 6e7b ldr r3, [r7, #100] @ 0x64
80073fa: 801a strh r2, [r3, #0]
80073fc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007400: 2b3e cmp r3, #62 @ 0x3e
8007402: d921 bls.n 8007448 <USB_EPStartXfer+0xac0>
8007404: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007408: 095b lsrs r3, r3, #5
800740a: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800740e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007412: f003 031f and.w r3, r3, #31
8007416: 2b00 cmp r3, #0
8007418: d104 bne.n 8007424 <USB_EPStartXfer+0xa9c>
800741a: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800741e: 3b01 subs r3, #1
8007420: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8007424: 6e7b ldr r3, [r7, #100] @ 0x64
8007426: 881b ldrh r3, [r3, #0]
8007428: b29a uxth r2, r3
800742a: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800742e: b29b uxth r3, r3
8007430: 029b lsls r3, r3, #10
8007432: b29b uxth r3, r3
8007434: 4313 orrs r3, r2
8007436: b29b uxth r3, r3
8007438: ea6f 4343 mvn.w r3, r3, lsl #17
800743c: ea6f 4353 mvn.w r3, r3, lsr #17
8007440: b29a uxth r2, r3
8007442: 6e7b ldr r3, [r7, #100] @ 0x64
8007444: 801a strh r2, [r3, #0]
8007446: e050 b.n 80074ea <USB_EPStartXfer+0xb62>
8007448: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800744c: 2b00 cmp r3, #0
800744e: d10a bne.n 8007466 <USB_EPStartXfer+0xade>
8007450: 6e7b ldr r3, [r7, #100] @ 0x64
8007452: 881b ldrh r3, [r3, #0]
8007454: b29b uxth r3, r3
8007456: ea6f 4343 mvn.w r3, r3, lsl #17
800745a: ea6f 4353 mvn.w r3, r3, lsr #17
800745e: b29a uxth r2, r3
8007460: 6e7b ldr r3, [r7, #100] @ 0x64
8007462: 801a strh r2, [r3, #0]
8007464: e041 b.n 80074ea <USB_EPStartXfer+0xb62>
8007466: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800746a: 085b lsrs r3, r3, #1
800746c: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8007470: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007474: f003 0301 and.w r3, r3, #1
8007478: 2b00 cmp r3, #0
800747a: d004 beq.n 8007486 <USB_EPStartXfer+0xafe>
800747c: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8007480: 3301 adds r3, #1
8007482: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8007486: 6e7b ldr r3, [r7, #100] @ 0x64
8007488: 881b ldrh r3, [r3, #0]
800748a: b29a uxth r2, r3
800748c: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8007490: b29b uxth r3, r3
8007492: 029b lsls r3, r3, #10
8007494: b29b uxth r3, r3
8007496: 4313 orrs r3, r2
8007498: b29a uxth r2, r3
800749a: 6e7b ldr r3, [r7, #100] @ 0x64
800749c: 801a strh r2, [r3, #0]
800749e: e024 b.n 80074ea <USB_EPStartXfer+0xb62>
80074a0: f507 7384 add.w r3, r7, #264 @ 0x108
80074a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80074a8: 681b ldr r3, [r3, #0]
80074aa: 785b ldrb r3, [r3, #1]
80074ac: 2b01 cmp r3, #1
80074ae: d11c bne.n 80074ea <USB_EPStartXfer+0xb62>
80074b0: f507 7384 add.w r3, r7, #264 @ 0x108
80074b4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80074b8: 681b ldr r3, [r3, #0]
80074ba: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80074be: b29b uxth r3, r3
80074c0: 461a mov r2, r3
80074c2: 6f3b ldr r3, [r7, #112] @ 0x70
80074c4: 4413 add r3, r2
80074c6: 673b str r3, [r7, #112] @ 0x70
80074c8: f507 7384 add.w r3, r7, #264 @ 0x108
80074cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80074d0: 681b ldr r3, [r3, #0]
80074d2: 781b ldrb r3, [r3, #0]
80074d4: 011a lsls r2, r3, #4
80074d6: 6f3b ldr r3, [r7, #112] @ 0x70
80074d8: 4413 add r3, r2
80074da: f203 430c addw r3, r3, #1036 @ 0x40c
80074de: 66fb str r3, [r7, #108] @ 0x6c
80074e0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80074e4: b29a uxth r2, r3
80074e6: 6efb ldr r3, [r7, #108] @ 0x6c
80074e8: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
80074ea: f507 7384 add.w r3, r7, #264 @ 0x108
80074ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80074f2: 681b ldr r3, [r3, #0]
80074f4: 895b ldrh r3, [r3, #10]
80074f6: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80074fa: f507 7384 add.w r3, r7, #264 @ 0x108
80074fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007502: 681b ldr r3, [r3, #0]
8007504: 6959 ldr r1, [r3, #20]
8007506: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800750a: b29b uxth r3, r3
800750c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8007510: f507 7084 add.w r0, r7, #264 @ 0x108
8007514: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8007518: 6800 ldr r0, [r0, #0]
800751a: f000 ff24 bl 8008366 <USB_WritePMA>
800751e: e0ca b.n 80076b6 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8007520: f507 7384 add.w r3, r7, #264 @ 0x108
8007524: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007528: 681b ldr r3, [r3, #0]
800752a: 785b ldrb r3, [r3, #1]
800752c: 2b00 cmp r3, #0
800752e: d177 bne.n 8007620 <USB_EPStartXfer+0xc98>
8007530: f507 7384 add.w r3, r7, #264 @ 0x108
8007534: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007538: 681b ldr r3, [r3, #0]
800753a: 67fb str r3, [r7, #124] @ 0x7c
800753c: f507 7384 add.w r3, r7, #264 @ 0x108
8007540: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007544: 681b ldr r3, [r3, #0]
8007546: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800754a: b29b uxth r3, r3
800754c: 461a mov r2, r3
800754e: 6ffb ldr r3, [r7, #124] @ 0x7c
8007550: 4413 add r3, r2
8007552: 67fb str r3, [r7, #124] @ 0x7c
8007554: f507 7384 add.w r3, r7, #264 @ 0x108
8007558: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800755c: 681b ldr r3, [r3, #0]
800755e: 781b ldrb r3, [r3, #0]
8007560: 011a lsls r2, r3, #4
8007562: 6ffb ldr r3, [r7, #124] @ 0x7c
8007564: 4413 add r3, r2
8007566: f203 4304 addw r3, r3, #1028 @ 0x404
800756a: 67bb str r3, [r7, #120] @ 0x78
800756c: 6fbb ldr r3, [r7, #120] @ 0x78
800756e: 881b ldrh r3, [r3, #0]
8007570: b29b uxth r3, r3
8007572: f3c3 0309 ubfx r3, r3, #0, #10
8007576: b29a uxth r2, r3
8007578: 6fbb ldr r3, [r7, #120] @ 0x78
800757a: 801a strh r2, [r3, #0]
800757c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007580: 2b3e cmp r3, #62 @ 0x3e
8007582: d921 bls.n 80075c8 <USB_EPStartXfer+0xc40>
8007584: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007588: 095b lsrs r3, r3, #5
800758a: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800758e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007592: f003 031f and.w r3, r3, #31
8007596: 2b00 cmp r3, #0
8007598: d104 bne.n 80075a4 <USB_EPStartXfer+0xc1c>
800759a: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800759e: 3b01 subs r3, #1
80075a0: f8c7 30ec str.w r3, [r7, #236] @ 0xec
80075a4: 6fbb ldr r3, [r7, #120] @ 0x78
80075a6: 881b ldrh r3, [r3, #0]
80075a8: b29a uxth r2, r3
80075aa: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
80075ae: b29b uxth r3, r3
80075b0: 029b lsls r3, r3, #10
80075b2: b29b uxth r3, r3
80075b4: 4313 orrs r3, r2
80075b6: b29b uxth r3, r3
80075b8: ea6f 4343 mvn.w r3, r3, lsl #17
80075bc: ea6f 4353 mvn.w r3, r3, lsr #17
80075c0: b29a uxth r2, r3
80075c2: 6fbb ldr r3, [r7, #120] @ 0x78
80075c4: 801a strh r2, [r3, #0]
80075c6: e05c b.n 8007682 <USB_EPStartXfer+0xcfa>
80075c8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80075cc: 2b00 cmp r3, #0
80075ce: d10a bne.n 80075e6 <USB_EPStartXfer+0xc5e>
80075d0: 6fbb ldr r3, [r7, #120] @ 0x78
80075d2: 881b ldrh r3, [r3, #0]
80075d4: b29b uxth r3, r3
80075d6: ea6f 4343 mvn.w r3, r3, lsl #17
80075da: ea6f 4353 mvn.w r3, r3, lsr #17
80075de: b29a uxth r2, r3
80075e0: 6fbb ldr r3, [r7, #120] @ 0x78
80075e2: 801a strh r2, [r3, #0]
80075e4: e04d b.n 8007682 <USB_EPStartXfer+0xcfa>
80075e6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80075ea: 085b lsrs r3, r3, #1
80075ec: f8c7 30ec str.w r3, [r7, #236] @ 0xec
80075f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80075f4: f003 0301 and.w r3, r3, #1
80075f8: 2b00 cmp r3, #0
80075fa: d004 beq.n 8007606 <USB_EPStartXfer+0xc7e>
80075fc: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8007600: 3301 adds r3, #1
8007602: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8007606: 6fbb ldr r3, [r7, #120] @ 0x78
8007608: 881b ldrh r3, [r3, #0]
800760a: b29a uxth r2, r3
800760c: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8007610: b29b uxth r3, r3
8007612: 029b lsls r3, r3, #10
8007614: b29b uxth r3, r3
8007616: 4313 orrs r3, r2
8007618: b29a uxth r2, r3
800761a: 6fbb ldr r3, [r7, #120] @ 0x78
800761c: 801a strh r2, [r3, #0]
800761e: e030 b.n 8007682 <USB_EPStartXfer+0xcfa>
8007620: f507 7384 add.w r3, r7, #264 @ 0x108
8007624: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007628: 681b ldr r3, [r3, #0]
800762a: 785b ldrb r3, [r3, #1]
800762c: 2b01 cmp r3, #1
800762e: d128 bne.n 8007682 <USB_EPStartXfer+0xcfa>
8007630: f507 7384 add.w r3, r7, #264 @ 0x108
8007634: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007638: 681b ldr r3, [r3, #0]
800763a: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800763e: f507 7384 add.w r3, r7, #264 @ 0x108
8007642: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007646: 681b ldr r3, [r3, #0]
8007648: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800764c: b29b uxth r3, r3
800764e: 461a mov r2, r3
8007650: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
8007654: 4413 add r3, r2
8007656: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800765a: f507 7384 add.w r3, r7, #264 @ 0x108
800765e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007662: 681b ldr r3, [r3, #0]
8007664: 781b ldrb r3, [r3, #0]
8007666: 011a lsls r2, r3, #4
8007668: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800766c: 4413 add r3, r2
800766e: f203 4304 addw r3, r3, #1028 @ 0x404
8007672: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8007676: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800767a: b29a uxth r2, r3
800767c: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007680: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8007682: f507 7384 add.w r3, r7, #264 @ 0x108
8007686: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800768a: 681b ldr r3, [r3, #0]
800768c: 891b ldrh r3, [r3, #8]
800768e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8007692: f507 7384 add.w r3, r7, #264 @ 0x108
8007696: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800769a: 681b ldr r3, [r3, #0]
800769c: 6959 ldr r1, [r3, #20]
800769e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80076a2: b29b uxth r3, r3
80076a4: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80076a8: f507 7084 add.w r0, r7, #264 @ 0x108
80076ac: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80076b0: 6800 ldr r0, [r0, #0]
80076b2: f000 fe58 bl 8008366 <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
80076b6: f507 7384 add.w r3, r7, #264 @ 0x108
80076ba: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80076be: 681a ldr r2, [r3, #0]
80076c0: f507 7384 add.w r3, r7, #264 @ 0x108
80076c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80076c8: 681b ldr r3, [r3, #0]
80076ca: 781b ldrb r3, [r3, #0]
80076cc: 009b lsls r3, r3, #2
80076ce: 4413 add r3, r2
80076d0: 881b ldrh r3, [r3, #0]
80076d2: b29b uxth r3, r3
80076d4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80076d8: f023 0340 bic.w r3, r3, #64 @ 0x40
80076dc: 817b strh r3, [r7, #10]
80076de: 897b ldrh r3, [r7, #10]
80076e0: f083 0310 eor.w r3, r3, #16
80076e4: 817b strh r3, [r7, #10]
80076e6: 897b ldrh r3, [r7, #10]
80076e8: f083 0320 eor.w r3, r3, #32
80076ec: 817b strh r3, [r7, #10]
80076ee: f507 7384 add.w r3, r7, #264 @ 0x108
80076f2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80076f6: 681a ldr r2, [r3, #0]
80076f8: f507 7384 add.w r3, r7, #264 @ 0x108
80076fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007700: 681b ldr r3, [r3, #0]
8007702: 781b ldrb r3, [r3, #0]
8007704: 009b lsls r3, r3, #2
8007706: 441a add r2, r3
8007708: 897b ldrh r3, [r7, #10]
800770a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800770e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007712: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007716: f043 0380 orr.w r3, r3, #128 @ 0x80
800771a: b29b uxth r3, r3
800771c: 8013 strh r3, [r2, #0]
800771e: f000 bcde b.w 80080de <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
8007722: f507 7384 add.w r3, r7, #264 @ 0x108
8007726: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800772a: 681b ldr r3, [r3, #0]
800772c: 7b1b ldrb r3, [r3, #12]
800772e: 2b00 cmp r3, #0
8007730: f040 80bb bne.w 80078aa <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8007734: f507 7384 add.w r3, r7, #264 @ 0x108
8007738: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800773c: 681b ldr r3, [r3, #0]
800773e: 699a ldr r2, [r3, #24]
8007740: f507 7384 add.w r3, r7, #264 @ 0x108
8007744: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007748: 681b ldr r3, [r3, #0]
800774a: 691b ldr r3, [r3, #16]
800774c: 429a cmp r2, r3
800774e: d917 bls.n 8007780 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
8007750: f507 7384 add.w r3, r7, #264 @ 0x108
8007754: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007758: 681b ldr r3, [r3, #0]
800775a: 691b ldr r3, [r3, #16]
800775c: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
8007760: f507 7384 add.w r3, r7, #264 @ 0x108
8007764: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007768: 681b ldr r3, [r3, #0]
800776a: 699a ldr r2, [r3, #24]
800776c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007770: 1ad2 subs r2, r2, r3
8007772: f507 7384 add.w r3, r7, #264 @ 0x108
8007776: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800777a: 681b ldr r3, [r3, #0]
800777c: 619a str r2, [r3, #24]
800777e: e00e b.n 800779e <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
8007780: f507 7384 add.w r3, r7, #264 @ 0x108
8007784: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007788: 681b ldr r3, [r3, #0]
800778a: 699b ldr r3, [r3, #24]
800778c: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
8007790: f507 7384 add.w r3, r7, #264 @ 0x108
8007794: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007798: 681b ldr r3, [r3, #0]
800779a: 2200 movs r2, #0
800779c: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
800779e: f507 7384 add.w r3, r7, #264 @ 0x108
80077a2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80077a6: 681b ldr r3, [r3, #0]
80077a8: f8c7 3090 str.w r3, [r7, #144] @ 0x90
80077ac: f507 7384 add.w r3, r7, #264 @ 0x108
80077b0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80077b4: 681b ldr r3, [r3, #0]
80077b6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80077ba: b29b uxth r3, r3
80077bc: 461a mov r2, r3
80077be: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
80077c2: 4413 add r3, r2
80077c4: f8c7 3090 str.w r3, [r7, #144] @ 0x90
80077c8: f507 7384 add.w r3, r7, #264 @ 0x108
80077cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80077d0: 681b ldr r3, [r3, #0]
80077d2: 781b ldrb r3, [r3, #0]
80077d4: 011a lsls r2, r3, #4
80077d6: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
80077da: 4413 add r3, r2
80077dc: f203 430c addw r3, r3, #1036 @ 0x40c
80077e0: f8c7 308c str.w r3, [r7, #140] @ 0x8c
80077e4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80077e8: 881b ldrh r3, [r3, #0]
80077ea: b29b uxth r3, r3
80077ec: f3c3 0309 ubfx r3, r3, #0, #10
80077f0: b29a uxth r2, r3
80077f2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80077f6: 801a strh r2, [r3, #0]
80077f8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80077fc: 2b3e cmp r3, #62 @ 0x3e
80077fe: d924 bls.n 800784a <USB_EPStartXfer+0xec2>
8007800: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007804: 095b lsrs r3, r3, #5
8007806: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800780a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800780e: f003 031f and.w r3, r3, #31
8007812: 2b00 cmp r3, #0
8007814: d104 bne.n 8007820 <USB_EPStartXfer+0xe98>
8007816: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800781a: 3b01 subs r3, #1
800781c: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8007820: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007824: 881b ldrh r3, [r3, #0]
8007826: b29a uxth r2, r3
8007828: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800782c: b29b uxth r3, r3
800782e: 029b lsls r3, r3, #10
8007830: b29b uxth r3, r3
8007832: 4313 orrs r3, r2
8007834: b29b uxth r3, r3
8007836: ea6f 4343 mvn.w r3, r3, lsl #17
800783a: ea6f 4353 mvn.w r3, r3, lsr #17
800783e: b29a uxth r2, r3
8007840: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007844: 801a strh r2, [r3, #0]
8007846: f000 bc10 b.w 800806a <USB_EPStartXfer+0x16e2>
800784a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800784e: 2b00 cmp r3, #0
8007850: d10c bne.n 800786c <USB_EPStartXfer+0xee4>
8007852: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007856: 881b ldrh r3, [r3, #0]
8007858: b29b uxth r3, r3
800785a: ea6f 4343 mvn.w r3, r3, lsl #17
800785e: ea6f 4353 mvn.w r3, r3, lsr #17
8007862: b29a uxth r2, r3
8007864: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007868: 801a strh r2, [r3, #0]
800786a: e3fe b.n 800806a <USB_EPStartXfer+0x16e2>
800786c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007870: 085b lsrs r3, r3, #1
8007872: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8007876: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800787a: f003 0301 and.w r3, r3, #1
800787e: 2b00 cmp r3, #0
8007880: d004 beq.n 800788c <USB_EPStartXfer+0xf04>
8007882: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8007886: 3301 adds r3, #1
8007888: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800788c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007890: 881b ldrh r3, [r3, #0]
8007892: b29a uxth r2, r3
8007894: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8007898: b29b uxth r3, r3
800789a: 029b lsls r3, r3, #10
800789c: b29b uxth r3, r3
800789e: 4313 orrs r3, r2
80078a0: b29a uxth r2, r3
80078a2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80078a6: 801a strh r2, [r3, #0]
80078a8: e3df b.n 800806a <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
80078aa: f507 7384 add.w r3, r7, #264 @ 0x108
80078ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80078b2: 681b ldr r3, [r3, #0]
80078b4: 78db ldrb r3, [r3, #3]
80078b6: 2b02 cmp r3, #2
80078b8: f040 8218 bne.w 8007cec <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
80078bc: f507 7384 add.w r3, r7, #264 @ 0x108
80078c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80078c4: 681b ldr r3, [r3, #0]
80078c6: 785b ldrb r3, [r3, #1]
80078c8: 2b00 cmp r3, #0
80078ca: f040 809d bne.w 8007a08 <USB_EPStartXfer+0x1080>
80078ce: f507 7384 add.w r3, r7, #264 @ 0x108
80078d2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80078d6: 681b ldr r3, [r3, #0]
80078d8: f8c7 30ac str.w r3, [r7, #172] @ 0xac
80078dc: f507 7384 add.w r3, r7, #264 @ 0x108
80078e0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80078e4: 681b ldr r3, [r3, #0]
80078e6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80078ea: b29b uxth r3, r3
80078ec: 461a mov r2, r3
80078ee: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
80078f2: 4413 add r3, r2
80078f4: f8c7 30ac str.w r3, [r7, #172] @ 0xac
80078f8: f507 7384 add.w r3, r7, #264 @ 0x108
80078fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007900: 681b ldr r3, [r3, #0]
8007902: 781b ldrb r3, [r3, #0]
8007904: 011a lsls r2, r3, #4
8007906: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800790a: 4413 add r3, r2
800790c: f203 4304 addw r3, r3, #1028 @ 0x404
8007910: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
8007914: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007918: 881b ldrh r3, [r3, #0]
800791a: b29b uxth r3, r3
800791c: f3c3 0309 ubfx r3, r3, #0, #10
8007920: b29a uxth r2, r3
8007922: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007926: 801a strh r2, [r3, #0]
8007928: f507 7384 add.w r3, r7, #264 @ 0x108
800792c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007930: 681b ldr r3, [r3, #0]
8007932: 691b ldr r3, [r3, #16]
8007934: 2b3e cmp r3, #62 @ 0x3e
8007936: d92b bls.n 8007990 <USB_EPStartXfer+0x1008>
8007938: f507 7384 add.w r3, r7, #264 @ 0x108
800793c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007940: 681b ldr r3, [r3, #0]
8007942: 691b ldr r3, [r3, #16]
8007944: 095b lsrs r3, r3, #5
8007946: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800794a: f507 7384 add.w r3, r7, #264 @ 0x108
800794e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007952: 681b ldr r3, [r3, #0]
8007954: 691b ldr r3, [r3, #16]
8007956: f003 031f and.w r3, r3, #31
800795a: 2b00 cmp r3, #0
800795c: d104 bne.n 8007968 <USB_EPStartXfer+0xfe0>
800795e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8007962: 3b01 subs r3, #1
8007964: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8007968: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800796c: 881b ldrh r3, [r3, #0]
800796e: b29a uxth r2, r3
8007970: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8007974: b29b uxth r3, r3
8007976: 029b lsls r3, r3, #10
8007978: b29b uxth r3, r3
800797a: 4313 orrs r3, r2
800797c: b29b uxth r3, r3
800797e: ea6f 4343 mvn.w r3, r3, lsl #17
8007982: ea6f 4353 mvn.w r3, r3, lsr #17
8007986: b29a uxth r2, r3
8007988: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800798c: 801a strh r2, [r3, #0]
800798e: e070 b.n 8007a72 <USB_EPStartXfer+0x10ea>
8007990: f507 7384 add.w r3, r7, #264 @ 0x108
8007994: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007998: 681b ldr r3, [r3, #0]
800799a: 691b ldr r3, [r3, #16]
800799c: 2b00 cmp r3, #0
800799e: d10c bne.n 80079ba <USB_EPStartXfer+0x1032>
80079a0: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80079a4: 881b ldrh r3, [r3, #0]
80079a6: b29b uxth r3, r3
80079a8: ea6f 4343 mvn.w r3, r3, lsl #17
80079ac: ea6f 4353 mvn.w r3, r3, lsr #17
80079b0: b29a uxth r2, r3
80079b2: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80079b6: 801a strh r2, [r3, #0]
80079b8: e05b b.n 8007a72 <USB_EPStartXfer+0x10ea>
80079ba: f507 7384 add.w r3, r7, #264 @ 0x108
80079be: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80079c2: 681b ldr r3, [r3, #0]
80079c4: 691b ldr r3, [r3, #16]
80079c6: 085b lsrs r3, r3, #1
80079c8: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
80079cc: f507 7384 add.w r3, r7, #264 @ 0x108
80079d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80079d4: 681b ldr r3, [r3, #0]
80079d6: 691b ldr r3, [r3, #16]
80079d8: f003 0301 and.w r3, r3, #1
80079dc: 2b00 cmp r3, #0
80079de: d004 beq.n 80079ea <USB_EPStartXfer+0x1062>
80079e0: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
80079e4: 3301 adds r3, #1
80079e6: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
80079ea: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
80079ee: 881b ldrh r3, [r3, #0]
80079f0: b29a uxth r2, r3
80079f2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
80079f6: b29b uxth r3, r3
80079f8: 029b lsls r3, r3, #10
80079fa: b29b uxth r3, r3
80079fc: 4313 orrs r3, r2
80079fe: b29a uxth r2, r3
8007a00: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8007a04: 801a strh r2, [r3, #0]
8007a06: e034 b.n 8007a72 <USB_EPStartXfer+0x10ea>
8007a08: f507 7384 add.w r3, r7, #264 @ 0x108
8007a0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007a10: 681b ldr r3, [r3, #0]
8007a12: 785b ldrb r3, [r3, #1]
8007a14: 2b01 cmp r3, #1
8007a16: d12c bne.n 8007a72 <USB_EPStartXfer+0x10ea>
8007a18: f507 7384 add.w r3, r7, #264 @ 0x108
8007a1c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007a20: 681b ldr r3, [r3, #0]
8007a22: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8007a26: f507 7384 add.w r3, r7, #264 @ 0x108
8007a2a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007a2e: 681b ldr r3, [r3, #0]
8007a30: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007a34: b29b uxth r3, r3
8007a36: 461a mov r2, r3
8007a38: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8007a3c: 4413 add r3, r2
8007a3e: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8007a42: f507 7384 add.w r3, r7, #264 @ 0x108
8007a46: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007a4a: 681b ldr r3, [r3, #0]
8007a4c: 781b ldrb r3, [r3, #0]
8007a4e: 011a lsls r2, r3, #4
8007a50: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8007a54: 4413 add r3, r2
8007a56: f203 4304 addw r3, r3, #1028 @ 0x404
8007a5a: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
8007a5e: f507 7384 add.w r3, r7, #264 @ 0x108
8007a62: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007a66: 681b ldr r3, [r3, #0]
8007a68: 691b ldr r3, [r3, #16]
8007a6a: b29a uxth r2, r3
8007a6c: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
8007a70: 801a strh r2, [r3, #0]
8007a72: f507 7384 add.w r3, r7, #264 @ 0x108
8007a76: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007a7a: 681b ldr r3, [r3, #0]
8007a7c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
8007a80: f507 7384 add.w r3, r7, #264 @ 0x108
8007a84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007a88: 681b ldr r3, [r3, #0]
8007a8a: 785b ldrb r3, [r3, #1]
8007a8c: 2b00 cmp r3, #0
8007a8e: f040 809d bne.w 8007bcc <USB_EPStartXfer+0x1244>
8007a92: f507 7384 add.w r3, r7, #264 @ 0x108
8007a96: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007a9a: 681b ldr r3, [r3, #0]
8007a9c: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8007aa0: f507 7384 add.w r3, r7, #264 @ 0x108
8007aa4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007aa8: 681b ldr r3, [r3, #0]
8007aaa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007aae: b29b uxth r3, r3
8007ab0: 461a mov r2, r3
8007ab2: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8007ab6: 4413 add r3, r2
8007ab8: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8007abc: f507 7384 add.w r3, r7, #264 @ 0x108
8007ac0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007ac4: 681b ldr r3, [r3, #0]
8007ac6: 781b ldrb r3, [r3, #0]
8007ac8: 011a lsls r2, r3, #4
8007aca: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8007ace: 4413 add r3, r2
8007ad0: f203 430c addw r3, r3, #1036 @ 0x40c
8007ad4: f8c7 3098 str.w r3, [r7, #152] @ 0x98
8007ad8: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007adc: 881b ldrh r3, [r3, #0]
8007ade: b29b uxth r3, r3
8007ae0: f3c3 0309 ubfx r3, r3, #0, #10
8007ae4: b29a uxth r2, r3
8007ae6: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007aea: 801a strh r2, [r3, #0]
8007aec: f507 7384 add.w r3, r7, #264 @ 0x108
8007af0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007af4: 681b ldr r3, [r3, #0]
8007af6: 691b ldr r3, [r3, #16]
8007af8: 2b3e cmp r3, #62 @ 0x3e
8007afa: d92b bls.n 8007b54 <USB_EPStartXfer+0x11cc>
8007afc: f507 7384 add.w r3, r7, #264 @ 0x108
8007b00: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007b04: 681b ldr r3, [r3, #0]
8007b06: 691b ldr r3, [r3, #16]
8007b08: 095b lsrs r3, r3, #5
8007b0a: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8007b0e: f507 7384 add.w r3, r7, #264 @ 0x108
8007b12: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007b16: 681b ldr r3, [r3, #0]
8007b18: 691b ldr r3, [r3, #16]
8007b1a: f003 031f and.w r3, r3, #31
8007b1e: 2b00 cmp r3, #0
8007b20: d104 bne.n 8007b2c <USB_EPStartXfer+0x11a4>
8007b22: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8007b26: 3b01 subs r3, #1
8007b28: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8007b2c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007b30: 881b ldrh r3, [r3, #0]
8007b32: b29a uxth r2, r3
8007b34: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8007b38: b29b uxth r3, r3
8007b3a: 029b lsls r3, r3, #10
8007b3c: b29b uxth r3, r3
8007b3e: 4313 orrs r3, r2
8007b40: b29b uxth r3, r3
8007b42: ea6f 4343 mvn.w r3, r3, lsl #17
8007b46: ea6f 4353 mvn.w r3, r3, lsr #17
8007b4a: b29a uxth r2, r3
8007b4c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007b50: 801a strh r2, [r3, #0]
8007b52: e069 b.n 8007c28 <USB_EPStartXfer+0x12a0>
8007b54: f507 7384 add.w r3, r7, #264 @ 0x108
8007b58: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007b5c: 681b ldr r3, [r3, #0]
8007b5e: 691b ldr r3, [r3, #16]
8007b60: 2b00 cmp r3, #0
8007b62: d10c bne.n 8007b7e <USB_EPStartXfer+0x11f6>
8007b64: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007b68: 881b ldrh r3, [r3, #0]
8007b6a: b29b uxth r3, r3
8007b6c: ea6f 4343 mvn.w r3, r3, lsl #17
8007b70: ea6f 4353 mvn.w r3, r3, lsr #17
8007b74: b29a uxth r2, r3
8007b76: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007b7a: 801a strh r2, [r3, #0]
8007b7c: e054 b.n 8007c28 <USB_EPStartXfer+0x12a0>
8007b7e: f507 7384 add.w r3, r7, #264 @ 0x108
8007b82: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007b86: 681b ldr r3, [r3, #0]
8007b88: 691b ldr r3, [r3, #16]
8007b8a: 085b lsrs r3, r3, #1
8007b8c: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8007b90: f507 7384 add.w r3, r7, #264 @ 0x108
8007b94: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007b98: 681b ldr r3, [r3, #0]
8007b9a: 691b ldr r3, [r3, #16]
8007b9c: f003 0301 and.w r3, r3, #1
8007ba0: 2b00 cmp r3, #0
8007ba2: d004 beq.n 8007bae <USB_EPStartXfer+0x1226>
8007ba4: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8007ba8: 3301 adds r3, #1
8007baa: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8007bae: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007bb2: 881b ldrh r3, [r3, #0]
8007bb4: b29a uxth r2, r3
8007bb6: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8007bba: b29b uxth r3, r3
8007bbc: 029b lsls r3, r3, #10
8007bbe: b29b uxth r3, r3
8007bc0: 4313 orrs r3, r2
8007bc2: b29a uxth r2, r3
8007bc4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8007bc8: 801a strh r2, [r3, #0]
8007bca: e02d b.n 8007c28 <USB_EPStartXfer+0x12a0>
8007bcc: f507 7384 add.w r3, r7, #264 @ 0x108
8007bd0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007bd4: 681b ldr r3, [r3, #0]
8007bd6: 785b ldrb r3, [r3, #1]
8007bd8: 2b01 cmp r3, #1
8007bda: d125 bne.n 8007c28 <USB_EPStartXfer+0x12a0>
8007bdc: f507 7384 add.w r3, r7, #264 @ 0x108
8007be0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007be4: 681b ldr r3, [r3, #0]
8007be6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007bea: b29b uxth r3, r3
8007bec: 461a mov r2, r3
8007bee: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8007bf2: 4413 add r3, r2
8007bf4: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
8007bf8: f507 7384 add.w r3, r7, #264 @ 0x108
8007bfc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007c00: 681b ldr r3, [r3, #0]
8007c02: 781b ldrb r3, [r3, #0]
8007c04: 011a lsls r2, r3, #4
8007c06: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8007c0a: 4413 add r3, r2
8007c0c: f203 430c addw r3, r3, #1036 @ 0x40c
8007c10: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
8007c14: f507 7384 add.w r3, r7, #264 @ 0x108
8007c18: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007c1c: 681b ldr r3, [r3, #0]
8007c1e: 691b ldr r3, [r3, #16]
8007c20: b29a uxth r2, r3
8007c22: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
8007c26: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
8007c28: f507 7384 add.w r3, r7, #264 @ 0x108
8007c2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007c30: 681b ldr r3, [r3, #0]
8007c32: 69db ldr r3, [r3, #28]
8007c34: 2b00 cmp r3, #0
8007c36: f000 8218 beq.w 800806a <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
8007c3a: f507 7384 add.w r3, r7, #264 @ 0x108
8007c3e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007c42: 681a ldr r2, [r3, #0]
8007c44: f507 7384 add.w r3, r7, #264 @ 0x108
8007c48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007c4c: 681b ldr r3, [r3, #0]
8007c4e: 781b ldrb r3, [r3, #0]
8007c50: 009b lsls r3, r3, #2
8007c52: 4413 add r3, r2
8007c54: 881b ldrh r3, [r3, #0]
8007c56: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8007c5a: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8007c5e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007c62: 2b00 cmp r3, #0
8007c64: d005 beq.n 8007c72 <USB_EPStartXfer+0x12ea>
8007c66: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8007c6a: f003 0340 and.w r3, r3, #64 @ 0x40
8007c6e: 2b00 cmp r3, #0
8007c70: d10d bne.n 8007c8e <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8007c72: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8007c76: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8007c7a: 2b00 cmp r3, #0
8007c7c: f040 81f5 bne.w 800806a <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8007c80: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8007c84: f003 0340 and.w r3, r3, #64 @ 0x40
8007c88: 2b00 cmp r3, #0
8007c8a: f040 81ee bne.w 800806a <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
8007c8e: f507 7384 add.w r3, r7, #264 @ 0x108
8007c92: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007c96: 681a ldr r2, [r3, #0]
8007c98: f507 7384 add.w r3, r7, #264 @ 0x108
8007c9c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007ca0: 681b ldr r3, [r3, #0]
8007ca2: 781b ldrb r3, [r3, #0]
8007ca4: 009b lsls r3, r3, #2
8007ca6: 4413 add r3, r2
8007ca8: 881b ldrh r3, [r3, #0]
8007caa: b29b uxth r3, r3
8007cac: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007cb0: f023 0370 bic.w r3, r3, #112 @ 0x70
8007cb4: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
8007cb8: f507 7384 add.w r3, r7, #264 @ 0x108
8007cbc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007cc0: 681a ldr r2, [r3, #0]
8007cc2: f507 7384 add.w r3, r7, #264 @ 0x108
8007cc6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007cca: 681b ldr r3, [r3, #0]
8007ccc: 781b ldrb r3, [r3, #0]
8007cce: 009b lsls r3, r3, #2
8007cd0: 441a add r2, r3
8007cd2: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
8007cd6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007cda: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007cde: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007ce2: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007ce6: b29b uxth r3, r3
8007ce8: 8013 strh r3, [r2, #0]
8007cea: e1be b.n 800806a <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
8007cec: f507 7384 add.w r3, r7, #264 @ 0x108
8007cf0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007cf4: 681b ldr r3, [r3, #0]
8007cf6: 78db ldrb r3, [r3, #3]
8007cf8: 2b01 cmp r3, #1
8007cfa: f040 81b4 bne.w 8008066 <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8007cfe: f507 7384 add.w r3, r7, #264 @ 0x108
8007d02: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d06: 681b ldr r3, [r3, #0]
8007d08: 699a ldr r2, [r3, #24]
8007d0a: f507 7384 add.w r3, r7, #264 @ 0x108
8007d0e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d12: 681b ldr r3, [r3, #0]
8007d14: 691b ldr r3, [r3, #16]
8007d16: 429a cmp r2, r3
8007d18: d917 bls.n 8007d4a <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
8007d1a: f507 7384 add.w r3, r7, #264 @ 0x108
8007d1e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d22: 681b ldr r3, [r3, #0]
8007d24: 691b ldr r3, [r3, #16]
8007d26: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
8007d2a: f507 7384 add.w r3, r7, #264 @ 0x108
8007d2e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d32: 681b ldr r3, [r3, #0]
8007d34: 699a ldr r2, [r3, #24]
8007d36: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007d3a: 1ad2 subs r2, r2, r3
8007d3c: f507 7384 add.w r3, r7, #264 @ 0x108
8007d40: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d44: 681b ldr r3, [r3, #0]
8007d46: 619a str r2, [r3, #24]
8007d48: e00e b.n 8007d68 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
8007d4a: f507 7384 add.w r3, r7, #264 @ 0x108
8007d4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d52: 681b ldr r3, [r3, #0]
8007d54: 699b ldr r3, [r3, #24]
8007d56: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
8007d5a: f507 7384 add.w r3, r7, #264 @ 0x108
8007d5e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d62: 681b ldr r3, [r3, #0]
8007d64: 2200 movs r2, #0
8007d66: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
8007d68: f507 7384 add.w r3, r7, #264 @ 0x108
8007d6c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007d70: 681b ldr r3, [r3, #0]
8007d72: 785b ldrb r3, [r3, #1]
8007d74: 2b00 cmp r3, #0
8007d76: f040 8085 bne.w 8007e84 <USB_EPStartXfer+0x14fc>
8007d7a: f507 7384 add.w r3, r7, #264 @ 0x108
8007d7e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007d82: 681b ldr r3, [r3, #0]
8007d84: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
8007d88: f507 7384 add.w r3, r7, #264 @ 0x108
8007d8c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007d90: 681b ldr r3, [r3, #0]
8007d92: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007d96: b29b uxth r3, r3
8007d98: 461a mov r2, r3
8007d9a: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
8007d9e: 4413 add r3, r2
8007da0: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
8007da4: f507 7384 add.w r3, r7, #264 @ 0x108
8007da8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007dac: 681b ldr r3, [r3, #0]
8007dae: 781b ldrb r3, [r3, #0]
8007db0: 011a lsls r2, r3, #4
8007db2: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
8007db6: 4413 add r3, r2
8007db8: f203 4304 addw r3, r3, #1028 @ 0x404
8007dbc: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
8007dc0: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007dc4: 881b ldrh r3, [r3, #0]
8007dc6: b29b uxth r3, r3
8007dc8: f3c3 0309 ubfx r3, r3, #0, #10
8007dcc: b29a uxth r2, r3
8007dce: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007dd2: 801a strh r2, [r3, #0]
8007dd4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007dd8: 2b3e cmp r3, #62 @ 0x3e
8007dda: d923 bls.n 8007e24 <USB_EPStartXfer+0x149c>
8007ddc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007de0: 095b lsrs r3, r3, #5
8007de2: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8007de6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007dea: f003 031f and.w r3, r3, #31
8007dee: 2b00 cmp r3, #0
8007df0: d104 bne.n 8007dfc <USB_EPStartXfer+0x1474>
8007df2: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8007df6: 3b01 subs r3, #1
8007df8: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8007dfc: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007e00: 881b ldrh r3, [r3, #0]
8007e02: b29a uxth r2, r3
8007e04: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8007e08: b29b uxth r3, r3
8007e0a: 029b lsls r3, r3, #10
8007e0c: b29b uxth r3, r3
8007e0e: 4313 orrs r3, r2
8007e10: b29b uxth r3, r3
8007e12: ea6f 4343 mvn.w r3, r3, lsl #17
8007e16: ea6f 4353 mvn.w r3, r3, lsr #17
8007e1a: b29a uxth r2, r3
8007e1c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007e20: 801a strh r2, [r3, #0]
8007e22: e060 b.n 8007ee6 <USB_EPStartXfer+0x155e>
8007e24: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007e28: 2b00 cmp r3, #0
8007e2a: d10c bne.n 8007e46 <USB_EPStartXfer+0x14be>
8007e2c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007e30: 881b ldrh r3, [r3, #0]
8007e32: b29b uxth r3, r3
8007e34: ea6f 4343 mvn.w r3, r3, lsl #17
8007e38: ea6f 4353 mvn.w r3, r3, lsr #17
8007e3c: b29a uxth r2, r3
8007e3e: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007e42: 801a strh r2, [r3, #0]
8007e44: e04f b.n 8007ee6 <USB_EPStartXfer+0x155e>
8007e46: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007e4a: 085b lsrs r3, r3, #1
8007e4c: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8007e50: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007e54: f003 0301 and.w r3, r3, #1
8007e58: 2b00 cmp r3, #0
8007e5a: d004 beq.n 8007e66 <USB_EPStartXfer+0x14de>
8007e5c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8007e60: 3301 adds r3, #1
8007e62: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8007e66: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007e6a: 881b ldrh r3, [r3, #0]
8007e6c: b29a uxth r2, r3
8007e6e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8007e72: b29b uxth r3, r3
8007e74: 029b lsls r3, r3, #10
8007e76: b29b uxth r3, r3
8007e78: 4313 orrs r3, r2
8007e7a: b29a uxth r2, r3
8007e7c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8007e80: 801a strh r2, [r3, #0]
8007e82: e030 b.n 8007ee6 <USB_EPStartXfer+0x155e>
8007e84: f507 7384 add.w r3, r7, #264 @ 0x108
8007e88: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007e8c: 681b ldr r3, [r3, #0]
8007e8e: 785b ldrb r3, [r3, #1]
8007e90: 2b01 cmp r3, #1
8007e92: d128 bne.n 8007ee6 <USB_EPStartXfer+0x155e>
8007e94: f507 7384 add.w r3, r7, #264 @ 0x108
8007e98: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007e9c: 681b ldr r3, [r3, #0]
8007e9e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
8007ea2: f507 7384 add.w r3, r7, #264 @ 0x108
8007ea6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007eaa: 681b ldr r3, [r3, #0]
8007eac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007eb0: b29b uxth r3, r3
8007eb2: 461a mov r2, r3
8007eb4: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8007eb8: 4413 add r3, r2
8007eba: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
8007ebe: f507 7384 add.w r3, r7, #264 @ 0x108
8007ec2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007ec6: 681b ldr r3, [r3, #0]
8007ec8: 781b ldrb r3, [r3, #0]
8007eca: 011a lsls r2, r3, #4
8007ecc: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8007ed0: 4413 add r3, r2
8007ed2: f203 4304 addw r3, r3, #1028 @ 0x404
8007ed6: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
8007eda: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007ede: b29a uxth r2, r3
8007ee0: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
8007ee4: 801a strh r2, [r3, #0]
8007ee6: f507 7384 add.w r3, r7, #264 @ 0x108
8007eea: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007eee: 681b ldr r3, [r3, #0]
8007ef0: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
8007ef4: f507 7384 add.w r3, r7, #264 @ 0x108
8007ef8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007efc: 681b ldr r3, [r3, #0]
8007efe: 785b ldrb r3, [r3, #1]
8007f00: 2b00 cmp r3, #0
8007f02: f040 8085 bne.w 8008010 <USB_EPStartXfer+0x1688>
8007f06: f507 7384 add.w r3, r7, #264 @ 0x108
8007f0a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007f0e: 681b ldr r3, [r3, #0]
8007f10: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
8007f14: f507 7384 add.w r3, r7, #264 @ 0x108
8007f18: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8007f1c: 681b ldr r3, [r3, #0]
8007f1e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007f22: b29b uxth r3, r3
8007f24: 461a mov r2, r3
8007f26: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
8007f2a: 4413 add r3, r2
8007f2c: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
8007f30: f507 7384 add.w r3, r7, #264 @ 0x108
8007f34: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8007f38: 681b ldr r3, [r3, #0]
8007f3a: 781b ldrb r3, [r3, #0]
8007f3c: 011a lsls r2, r3, #4
8007f3e: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
8007f42: 4413 add r3, r2
8007f44: f203 430c addw r3, r3, #1036 @ 0x40c
8007f48: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
8007f4c: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8007f50: 881b ldrh r3, [r3, #0]
8007f52: b29b uxth r3, r3
8007f54: f3c3 0309 ubfx r3, r3, #0, #10
8007f58: b29a uxth r2, r3
8007f5a: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8007f5e: 801a strh r2, [r3, #0]
8007f60: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007f64: 2b3e cmp r3, #62 @ 0x3e
8007f66: d923 bls.n 8007fb0 <USB_EPStartXfer+0x1628>
8007f68: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007f6c: 095b lsrs r3, r3, #5
8007f6e: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8007f72: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007f76: f003 031f and.w r3, r3, #31
8007f7a: 2b00 cmp r3, #0
8007f7c: d104 bne.n 8007f88 <USB_EPStartXfer+0x1600>
8007f7e: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8007f82: 3b01 subs r3, #1
8007f84: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8007f88: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8007f8c: 881b ldrh r3, [r3, #0]
8007f8e: b29a uxth r2, r3
8007f90: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8007f94: b29b uxth r3, r3
8007f96: 029b lsls r3, r3, #10
8007f98: b29b uxth r3, r3
8007f9a: 4313 orrs r3, r2
8007f9c: b29b uxth r3, r3
8007f9e: ea6f 4343 mvn.w r3, r3, lsl #17
8007fa2: ea6f 4353 mvn.w r3, r3, lsr #17
8007fa6: b29a uxth r2, r3
8007fa8: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8007fac: 801a strh r2, [r3, #0]
8007fae: e05c b.n 800806a <USB_EPStartXfer+0x16e2>
8007fb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007fb4: 2b00 cmp r3, #0
8007fb6: d10c bne.n 8007fd2 <USB_EPStartXfer+0x164a>
8007fb8: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8007fbc: 881b ldrh r3, [r3, #0]
8007fbe: b29b uxth r3, r3
8007fc0: ea6f 4343 mvn.w r3, r3, lsl #17
8007fc4: ea6f 4353 mvn.w r3, r3, lsr #17
8007fc8: b29a uxth r2, r3
8007fca: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8007fce: 801a strh r2, [r3, #0]
8007fd0: e04b b.n 800806a <USB_EPStartXfer+0x16e2>
8007fd2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007fd6: 085b lsrs r3, r3, #1
8007fd8: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8007fdc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8007fe0: f003 0301 and.w r3, r3, #1
8007fe4: 2b00 cmp r3, #0
8007fe6: d004 beq.n 8007ff2 <USB_EPStartXfer+0x166a>
8007fe8: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8007fec: 3301 adds r3, #1
8007fee: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8007ff2: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8007ff6: 881b ldrh r3, [r3, #0]
8007ff8: b29a uxth r2, r3
8007ffa: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8007ffe: b29b uxth r3, r3
8008000: 029b lsls r3, r3, #10
8008002: b29b uxth r3, r3
8008004: 4313 orrs r3, r2
8008006: b29a uxth r2, r3
8008008: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800800c: 801a strh r2, [r3, #0]
800800e: e02c b.n 800806a <USB_EPStartXfer+0x16e2>
8008010: f507 7384 add.w r3, r7, #264 @ 0x108
8008014: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008018: 681b ldr r3, [r3, #0]
800801a: 785b ldrb r3, [r3, #1]
800801c: 2b01 cmp r3, #1
800801e: d124 bne.n 800806a <USB_EPStartXfer+0x16e2>
8008020: f507 7384 add.w r3, r7, #264 @ 0x108
8008024: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008028: 681b ldr r3, [r3, #0]
800802a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800802e: b29b uxth r3, r3
8008030: 461a mov r2, r3
8008032: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
8008036: 4413 add r3, r2
8008038: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800803c: f507 7384 add.w r3, r7, #264 @ 0x108
8008040: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8008044: 681b ldr r3, [r3, #0]
8008046: 781b ldrb r3, [r3, #0]
8008048: 011a lsls r2, r3, #4
800804a: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800804e: 4413 add r3, r2
8008050: f203 430c addw r3, r3, #1036 @ 0x40c
8008054: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
8008058: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800805c: b29a uxth r2, r3
800805e: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
8008062: 801a strh r2, [r3, #0]
8008064: e001 b.n 800806a <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
8008066: 2301 movs r3, #1
8008068: e03a b.n 80080e0 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800806a: f507 7384 add.w r3, r7, #264 @ 0x108
800806e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8008072: 681a ldr r2, [r3, #0]
8008074: f507 7384 add.w r3, r7, #264 @ 0x108
8008078: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800807c: 681b ldr r3, [r3, #0]
800807e: 781b ldrb r3, [r3, #0]
8008080: 009b lsls r3, r3, #2
8008082: 4413 add r3, r2
8008084: 881b ldrh r3, [r3, #0]
8008086: b29b uxth r3, r3
8008088: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800808c: f023 0370 bic.w r3, r3, #112 @ 0x70
8008090: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8008094: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8008098: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800809c: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
80080a0: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
80080a4: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80080a8: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
80080ac: f507 7384 add.w r3, r7, #264 @ 0x108
80080b0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80080b4: 681a ldr r2, [r3, #0]
80080b6: f507 7384 add.w r3, r7, #264 @ 0x108
80080ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80080be: 681b ldr r3, [r3, #0]
80080c0: 781b ldrb r3, [r3, #0]
80080c2: 009b lsls r3, r3, #2
80080c4: 441a add r2, r3
80080c6: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
80080ca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80080ce: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80080d2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80080d6: f043 0380 orr.w r3, r3, #128 @ 0x80
80080da: b29b uxth r3, r3
80080dc: 8013 strh r3, [r2, #0]
}
return HAL_OK;
80080de: 2300 movs r3, #0
}
80080e0: 4618 mov r0, r3
80080e2: f507 7784 add.w r7, r7, #264 @ 0x108
80080e6: 46bd mov sp, r7
80080e8: bd80 pop {r7, pc}
080080ea <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80080ea: b480 push {r7}
80080ec: b085 sub sp, #20
80080ee: af00 add r7, sp, #0
80080f0: 6078 str r0, [r7, #4]
80080f2: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
80080f4: 683b ldr r3, [r7, #0]
80080f6: 785b ldrb r3, [r3, #1]
80080f8: 2b00 cmp r3, #0
80080fa: d020 beq.n 800813e <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
80080fc: 687a ldr r2, [r7, #4]
80080fe: 683b ldr r3, [r7, #0]
8008100: 781b ldrb r3, [r3, #0]
8008102: 009b lsls r3, r3, #2
8008104: 4413 add r3, r2
8008106: 881b ldrh r3, [r3, #0]
8008108: b29b uxth r3, r3
800810a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800810e: f023 0340 bic.w r3, r3, #64 @ 0x40
8008112: 81bb strh r3, [r7, #12]
8008114: 89bb ldrh r3, [r7, #12]
8008116: f083 0310 eor.w r3, r3, #16
800811a: 81bb strh r3, [r7, #12]
800811c: 687a ldr r2, [r7, #4]
800811e: 683b ldr r3, [r7, #0]
8008120: 781b ldrb r3, [r3, #0]
8008122: 009b lsls r3, r3, #2
8008124: 441a add r2, r3
8008126: 89bb ldrh r3, [r7, #12]
8008128: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800812c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008130: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008134: f043 0380 orr.w r3, r3, #128 @ 0x80
8008138: b29b uxth r3, r3
800813a: 8013 strh r3, [r2, #0]
800813c: e01f b.n 800817e <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800813e: 687a ldr r2, [r7, #4]
8008140: 683b ldr r3, [r7, #0]
8008142: 781b ldrb r3, [r3, #0]
8008144: 009b lsls r3, r3, #2
8008146: 4413 add r3, r2
8008148: 881b ldrh r3, [r3, #0]
800814a: b29b uxth r3, r3
800814c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8008150: f023 0370 bic.w r3, r3, #112 @ 0x70
8008154: 81fb strh r3, [r7, #14]
8008156: 89fb ldrh r3, [r7, #14]
8008158: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800815c: 81fb strh r3, [r7, #14]
800815e: 687a ldr r2, [r7, #4]
8008160: 683b ldr r3, [r7, #0]
8008162: 781b ldrb r3, [r3, #0]
8008164: 009b lsls r3, r3, #2
8008166: 441a add r2, r3
8008168: 89fb ldrh r3, [r7, #14]
800816a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800816e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008172: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008176: f043 0380 orr.w r3, r3, #128 @ 0x80
800817a: b29b uxth r3, r3
800817c: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800817e: 2300 movs r3, #0
}
8008180: 4618 mov r0, r3
8008182: 3714 adds r7, #20
8008184: 46bd mov sp, r7
8008186: bc80 pop {r7}
8008188: 4770 bx lr
0800818a <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800818a: b480 push {r7}
800818c: b087 sub sp, #28
800818e: af00 add r7, sp, #0
8008190: 6078 str r0, [r7, #4]
8008192: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8008194: 683b ldr r3, [r7, #0]
8008196: 7b1b ldrb r3, [r3, #12]
8008198: 2b00 cmp r3, #0
800819a: f040 809d bne.w 80082d8 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800819e: 683b ldr r3, [r7, #0]
80081a0: 785b ldrb r3, [r3, #1]
80081a2: 2b00 cmp r3, #0
80081a4: d04c beq.n 8008240 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80081a6: 687a ldr r2, [r7, #4]
80081a8: 683b ldr r3, [r7, #0]
80081aa: 781b ldrb r3, [r3, #0]
80081ac: 009b lsls r3, r3, #2
80081ae: 4413 add r3, r2
80081b0: 881b ldrh r3, [r3, #0]
80081b2: 823b strh r3, [r7, #16]
80081b4: 8a3b ldrh r3, [r7, #16]
80081b6: f003 0340 and.w r3, r3, #64 @ 0x40
80081ba: 2b00 cmp r3, #0
80081bc: d01b beq.n 80081f6 <USB_EPClearStall+0x6c>
80081be: 687a ldr r2, [r7, #4]
80081c0: 683b ldr r3, [r7, #0]
80081c2: 781b ldrb r3, [r3, #0]
80081c4: 009b lsls r3, r3, #2
80081c6: 4413 add r3, r2
80081c8: 881b ldrh r3, [r3, #0]
80081ca: b29b uxth r3, r3
80081cc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80081d0: f023 0370 bic.w r3, r3, #112 @ 0x70
80081d4: 81fb strh r3, [r7, #14]
80081d6: 687a ldr r2, [r7, #4]
80081d8: 683b ldr r3, [r7, #0]
80081da: 781b ldrb r3, [r3, #0]
80081dc: 009b lsls r3, r3, #2
80081de: 441a add r2, r3
80081e0: 89fb ldrh r3, [r7, #14]
80081e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80081e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80081ea: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80081ee: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80081f2: b29b uxth r3, r3
80081f4: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
80081f6: 683b ldr r3, [r7, #0]
80081f8: 78db ldrb r3, [r3, #3]
80081fa: 2b01 cmp r3, #1
80081fc: d06c beq.n 80082d8 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
80081fe: 687a ldr r2, [r7, #4]
8008200: 683b ldr r3, [r7, #0]
8008202: 781b ldrb r3, [r3, #0]
8008204: 009b lsls r3, r3, #2
8008206: 4413 add r3, r2
8008208: 881b ldrh r3, [r3, #0]
800820a: b29b uxth r3, r3
800820c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008210: f023 0340 bic.w r3, r3, #64 @ 0x40
8008214: 81bb strh r3, [r7, #12]
8008216: 89bb ldrh r3, [r7, #12]
8008218: f083 0320 eor.w r3, r3, #32
800821c: 81bb strh r3, [r7, #12]
800821e: 687a ldr r2, [r7, #4]
8008220: 683b ldr r3, [r7, #0]
8008222: 781b ldrb r3, [r3, #0]
8008224: 009b lsls r3, r3, #2
8008226: 441a add r2, r3
8008228: 89bb ldrh r3, [r7, #12]
800822a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800822e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008232: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008236: f043 0380 orr.w r3, r3, #128 @ 0x80
800823a: b29b uxth r3, r3
800823c: 8013 strh r3, [r2, #0]
800823e: e04b b.n 80082d8 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8008240: 687a ldr r2, [r7, #4]
8008242: 683b ldr r3, [r7, #0]
8008244: 781b ldrb r3, [r3, #0]
8008246: 009b lsls r3, r3, #2
8008248: 4413 add r3, r2
800824a: 881b ldrh r3, [r3, #0]
800824c: 82fb strh r3, [r7, #22]
800824e: 8afb ldrh r3, [r7, #22]
8008250: f403 4380 and.w r3, r3, #16384 @ 0x4000
8008254: 2b00 cmp r3, #0
8008256: d01b beq.n 8008290 <USB_EPClearStall+0x106>
8008258: 687a ldr r2, [r7, #4]
800825a: 683b ldr r3, [r7, #0]
800825c: 781b ldrb r3, [r3, #0]
800825e: 009b lsls r3, r3, #2
8008260: 4413 add r3, r2
8008262: 881b ldrh r3, [r3, #0]
8008264: b29b uxth r3, r3
8008266: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800826a: f023 0370 bic.w r3, r3, #112 @ 0x70
800826e: 82bb strh r3, [r7, #20]
8008270: 687a ldr r2, [r7, #4]
8008272: 683b ldr r3, [r7, #0]
8008274: 781b ldrb r3, [r3, #0]
8008276: 009b lsls r3, r3, #2
8008278: 441a add r2, r3
800827a: 8abb ldrh r3, [r7, #20]
800827c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008280: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8008284: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8008288: f043 0380 orr.w r3, r3, #128 @ 0x80
800828c: b29b uxth r3, r3
800828e: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8008290: 687a ldr r2, [r7, #4]
8008292: 683b ldr r3, [r7, #0]
8008294: 781b ldrb r3, [r3, #0]
8008296: 009b lsls r3, r3, #2
8008298: 4413 add r3, r2
800829a: 881b ldrh r3, [r3, #0]
800829c: b29b uxth r3, r3
800829e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80082a2: f023 0370 bic.w r3, r3, #112 @ 0x70
80082a6: 827b strh r3, [r7, #18]
80082a8: 8a7b ldrh r3, [r7, #18]
80082aa: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80082ae: 827b strh r3, [r7, #18]
80082b0: 8a7b ldrh r3, [r7, #18]
80082b2: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80082b6: 827b strh r3, [r7, #18]
80082b8: 687a ldr r2, [r7, #4]
80082ba: 683b ldr r3, [r7, #0]
80082bc: 781b ldrb r3, [r3, #0]
80082be: 009b lsls r3, r3, #2
80082c0: 441a add r2, r3
80082c2: 8a7b ldrh r3, [r7, #18]
80082c4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80082c8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80082cc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80082d0: f043 0380 orr.w r3, r3, #128 @ 0x80
80082d4: b29b uxth r3, r3
80082d6: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
80082d8: 2300 movs r3, #0
}
80082da: 4618 mov r0, r3
80082dc: 371c adds r7, #28
80082de: 46bd mov sp, r7
80082e0: bc80 pop {r7}
80082e2: 4770 bx lr
080082e4 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
80082e4: b480 push {r7}
80082e6: b083 sub sp, #12
80082e8: af00 add r7, sp, #0
80082ea: 6078 str r0, [r7, #4]
80082ec: 460b mov r3, r1
80082ee: 70fb strb r3, [r7, #3]
if (address == 0U)
80082f0: 78fb ldrb r3, [r7, #3]
80082f2: 2b00 cmp r3, #0
80082f4: d103 bne.n 80082fe <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
80082f6: 687b ldr r3, [r7, #4]
80082f8: 2280 movs r2, #128 @ 0x80
80082fa: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
80082fe: 2300 movs r3, #0
}
8008300: 4618 mov r0, r3
8008302: 370c adds r7, #12
8008304: 46bd mov sp, r7
8008306: bc80 pop {r7}
8008308: 4770 bx lr
0800830a <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
800830a: b480 push {r7}
800830c: b083 sub sp, #12
800830e: af00 add r7, sp, #0
8008310: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8008312: 2300 movs r3, #0
}
8008314: 4618 mov r0, r3
8008316: 370c adds r7, #12
8008318: 46bd mov sp, r7
800831a: bc80 pop {r7}
800831c: 4770 bx lr
0800831e <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800831e: b480 push {r7}
8008320: b083 sub sp, #12
8008322: af00 add r7, sp, #0
8008324: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8008326: 2300 movs r3, #0
}
8008328: 4618 mov r0, r3
800832a: 370c adds r7, #12
800832c: 46bd mov sp, r7
800832e: bc80 pop {r7}
8008330: 4770 bx lr
08008332 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
8008332: b480 push {r7}
8008334: b085 sub sp, #20
8008336: af00 add r7, sp, #0
8008338: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
800833a: 687b ldr r3, [r7, #4]
800833c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8008340: b29b uxth r3, r3
8008342: 60fb str r3, [r7, #12]
return tmpreg;
8008344: 68fb ldr r3, [r7, #12]
}
8008346: 4618 mov r0, r3
8008348: 3714 adds r7, #20
800834a: 46bd mov sp, r7
800834c: bc80 pop {r7}
800834e: 4770 bx lr
08008350 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
8008350: b480 push {r7}
8008352: b083 sub sp, #12
8008354: af00 add r7, sp, #0
8008356: 6078 str r0, [r7, #4]
8008358: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800835a: 2300 movs r3, #0
}
800835c: 4618 mov r0, r3
800835e: 370c adds r7, #12
8008360: 46bd mov sp, r7
8008362: bc80 pop {r7}
8008364: 4770 bx lr
08008366 <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
8008366: b480 push {r7}
8008368: b08b sub sp, #44 @ 0x2c
800836a: af00 add r7, sp, #0
800836c: 60f8 str r0, [r7, #12]
800836e: 60b9 str r1, [r7, #8]
8008370: 4611 mov r1, r2
8008372: 461a mov r2, r3
8008374: 460b mov r3, r1
8008376: 80fb strh r3, [r7, #6]
8008378: 4613 mov r3, r2
800837a: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
800837c: 88bb ldrh r3, [r7, #4]
800837e: 3301 adds r3, #1
8008380: 085b lsrs r3, r3, #1
8008382: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
8008384: 68fb ldr r3, [r7, #12]
8008386: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8008388: 68bb ldr r3, [r7, #8]
800838a: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800838c: 88fb ldrh r3, [r7, #6]
800838e: 005a lsls r2, r3, #1
8008390: 697b ldr r3, [r7, #20]
8008392: 4413 add r3, r2
8008394: f503 6380 add.w r3, r3, #1024 @ 0x400
8008398: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800839a: 69bb ldr r3, [r7, #24]
800839c: 627b str r3, [r7, #36] @ 0x24
800839e: e01f b.n 80083e0 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
80083a0: 69fb ldr r3, [r7, #28]
80083a2: 781b ldrb r3, [r3, #0]
80083a4: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
80083a6: 69fb ldr r3, [r7, #28]
80083a8: 3301 adds r3, #1
80083aa: 781b ldrb r3, [r3, #0]
80083ac: b21b sxth r3, r3
80083ae: 021b lsls r3, r3, #8
80083b0: b21a sxth r2, r3
80083b2: f9b7 3012 ldrsh.w r3, [r7, #18]
80083b6: 4313 orrs r3, r2
80083b8: b21b sxth r3, r3
80083ba: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
80083bc: 6a3b ldr r3, [r7, #32]
80083be: 8a7a ldrh r2, [r7, #18]
80083c0: 801a strh r2, [r3, #0]
pdwVal++;
80083c2: 6a3b ldr r3, [r7, #32]
80083c4: 3302 adds r3, #2
80083c6: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
80083c8: 6a3b ldr r3, [r7, #32]
80083ca: 3302 adds r3, #2
80083cc: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
80083ce: 69fb ldr r3, [r7, #28]
80083d0: 3301 adds r3, #1
80083d2: 61fb str r3, [r7, #28]
pBuf++;
80083d4: 69fb ldr r3, [r7, #28]
80083d6: 3301 adds r3, #1
80083d8: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
80083da: 6a7b ldr r3, [r7, #36] @ 0x24
80083dc: 3b01 subs r3, #1
80083de: 627b str r3, [r7, #36] @ 0x24
80083e0: 6a7b ldr r3, [r7, #36] @ 0x24
80083e2: 2b00 cmp r3, #0
80083e4: d1dc bne.n 80083a0 <USB_WritePMA+0x3a>
}
}
80083e6: bf00 nop
80083e8: bf00 nop
80083ea: 372c adds r7, #44 @ 0x2c
80083ec: 46bd mov sp, r7
80083ee: bc80 pop {r7}
80083f0: 4770 bx lr
080083f2 <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
80083f2: b480 push {r7}
80083f4: b08b sub sp, #44 @ 0x2c
80083f6: af00 add r7, sp, #0
80083f8: 60f8 str r0, [r7, #12]
80083fa: 60b9 str r1, [r7, #8]
80083fc: 4611 mov r1, r2
80083fe: 461a mov r2, r3
8008400: 460b mov r3, r1
8008402: 80fb strh r3, [r7, #6]
8008404: 4613 mov r3, r2
8008406: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
8008408: 88bb ldrh r3, [r7, #4]
800840a: 085b lsrs r3, r3, #1
800840c: b29b uxth r3, r3
800840e: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
8008410: 68fb ldr r3, [r7, #12]
8008412: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8008414: 68bb ldr r3, [r7, #8]
8008416: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8008418: 88fb ldrh r3, [r7, #6]
800841a: 005a lsls r2, r3, #1
800841c: 697b ldr r3, [r7, #20]
800841e: 4413 add r3, r2
8008420: f503 6380 add.w r3, r3, #1024 @ 0x400
8008424: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
8008426: 69bb ldr r3, [r7, #24]
8008428: 627b str r3, [r7, #36] @ 0x24
800842a: e01b b.n 8008464 <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
800842c: 6a3b ldr r3, [r7, #32]
800842e: 881b ldrh r3, [r3, #0]
8008430: b29b uxth r3, r3
8008432: 613b str r3, [r7, #16]
pdwVal++;
8008434: 6a3b ldr r3, [r7, #32]
8008436: 3302 adds r3, #2
8008438: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800843a: 693b ldr r3, [r7, #16]
800843c: b2da uxtb r2, r3
800843e: 69fb ldr r3, [r7, #28]
8008440: 701a strb r2, [r3, #0]
pBuf++;
8008442: 69fb ldr r3, [r7, #28]
8008444: 3301 adds r3, #1
8008446: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
8008448: 693b ldr r3, [r7, #16]
800844a: 0a1b lsrs r3, r3, #8
800844c: b2da uxtb r2, r3
800844e: 69fb ldr r3, [r7, #28]
8008450: 701a strb r2, [r3, #0]
pBuf++;
8008452: 69fb ldr r3, [r7, #28]
8008454: 3301 adds r3, #1
8008456: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
8008458: 6a3b ldr r3, [r7, #32]
800845a: 3302 adds r3, #2
800845c: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800845e: 6a7b ldr r3, [r7, #36] @ 0x24
8008460: 3b01 subs r3, #1
8008462: 627b str r3, [r7, #36] @ 0x24
8008464: 6a7b ldr r3, [r7, #36] @ 0x24
8008466: 2b00 cmp r3, #0
8008468: d1e0 bne.n 800842c <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
800846a: 88bb ldrh r3, [r7, #4]
800846c: f003 0301 and.w r3, r3, #1
8008470: b29b uxth r3, r3
8008472: 2b00 cmp r3, #0
8008474: d007 beq.n 8008486 <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
8008476: 6a3b ldr r3, [r7, #32]
8008478: 881b ldrh r3, [r3, #0]
800847a: b29b uxth r3, r3
800847c: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800847e: 693b ldr r3, [r7, #16]
8008480: b2da uxtb r2, r3
8008482: 69fb ldr r3, [r7, #28]
8008484: 701a strb r2, [r3, #0]
}
}
8008486: bf00 nop
8008488: 372c adds r7, #44 @ 0x2c
800848a: 46bd mov sp, r7
800848c: bc80 pop {r7}
800848e: 4770 bx lr
08008490 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008490: b580 push {r7, lr}
8008492: b084 sub sp, #16
8008494: af00 add r7, sp, #0
8008496: 6078 str r0, [r7, #4]
8008498: 460b mov r3, r1
800849a: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800849c: 2300 movs r3, #0
800849e: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
80084a0: 687b ldr r3, [r7, #4]
80084a2: 7c1b ldrb r3, [r3, #16]
80084a4: 2b00 cmp r3, #0
80084a6: d115 bne.n 80084d4 <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
80084a8: f44f 7300 mov.w r3, #512 @ 0x200
80084ac: 2202 movs r2, #2
80084ae: 2181 movs r1, #129 @ 0x81
80084b0: 6878 ldr r0, [r7, #4]
80084b2: f001 ff00 bl 800a2b6 <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
80084b6: 687b ldr r3, [r7, #4]
80084b8: 2201 movs r2, #1
80084ba: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
80084bc: f44f 7300 mov.w r3, #512 @ 0x200
80084c0: 2202 movs r2, #2
80084c2: 2101 movs r1, #1
80084c4: 6878 ldr r0, [r7, #4]
80084c6: f001 fef6 bl 800a2b6 <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
80084ca: 687b ldr r3, [r7, #4]
80084cc: 2201 movs r2, #1
80084ce: f8c3 216c str.w r2, [r3, #364] @ 0x16c
80084d2: e012 b.n 80084fa <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
80084d4: 2340 movs r3, #64 @ 0x40
80084d6: 2202 movs r2, #2
80084d8: 2181 movs r1, #129 @ 0x81
80084da: 6878 ldr r0, [r7, #4]
80084dc: f001 feeb bl 800a2b6 <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
80084e0: 687b ldr r3, [r7, #4]
80084e2: 2201 movs r2, #1
80084e4: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
80084e6: 2340 movs r3, #64 @ 0x40
80084e8: 2202 movs r2, #2
80084ea: 2101 movs r1, #1
80084ec: 6878 ldr r0, [r7, #4]
80084ee: f001 fee2 bl 800a2b6 <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
80084f2: 687b ldr r3, [r7, #4]
80084f4: 2201 movs r2, #1
80084f6: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
80084fa: 2308 movs r3, #8
80084fc: 2203 movs r2, #3
80084fe: 2182 movs r1, #130 @ 0x82
8008500: 6878 ldr r0, [r7, #4]
8008502: f001 fed8 bl 800a2b6 <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
8008506: 687b ldr r3, [r7, #4]
8008508: 2201 movs r2, #1
800850a: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
800850c: f44f 7007 mov.w r0, #540 @ 0x21c
8008510: f001 fff8 bl 800a504 <USBD_static_malloc>
8008514: 4602 mov r2, r0
8008516: 687b ldr r3, [r7, #4]
8008518: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
800851c: 687b ldr r3, [r7, #4]
800851e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008522: 2b00 cmp r3, #0
8008524: d102 bne.n 800852c <USBD_CDC_Init+0x9c>
{
ret = 1U;
8008526: 2301 movs r3, #1
8008528: 73fb strb r3, [r7, #15]
800852a: e026 b.n 800857a <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800852c: 687b ldr r3, [r7, #4]
800852e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008532: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
8008534: 687b ldr r3, [r7, #4]
8008536: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800853a: 681b ldr r3, [r3, #0]
800853c: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800853e: 68bb ldr r3, [r7, #8]
8008540: 2200 movs r2, #0
8008542: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
8008546: 68bb ldr r3, [r7, #8]
8008548: 2200 movs r2, #0
800854a: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800854e: 687b ldr r3, [r7, #4]
8008550: 7c1b ldrb r3, [r3, #16]
8008552: 2b00 cmp r3, #0
8008554: d109 bne.n 800856a <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
8008556: 68bb ldr r3, [r7, #8]
8008558: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800855c: f44f 7300 mov.w r3, #512 @ 0x200
8008560: 2101 movs r1, #1
8008562: 6878 ldr r0, [r7, #4]
8008564: f001 ff97 bl 800a496 <USBD_LL_PrepareReceive>
8008568: e007 b.n 800857a <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800856a: 68bb ldr r3, [r7, #8]
800856c: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8008570: 2340 movs r3, #64 @ 0x40
8008572: 2101 movs r1, #1
8008574: 6878 ldr r0, [r7, #4]
8008576: f001 ff8e bl 800a496 <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
800857a: 7bfb ldrb r3, [r7, #15]
}
800857c: 4618 mov r0, r3
800857e: 3710 adds r7, #16
8008580: 46bd mov sp, r7
8008582: bd80 pop {r7, pc}
08008584 <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008584: b580 push {r7, lr}
8008586: b084 sub sp, #16
8008588: af00 add r7, sp, #0
800858a: 6078 str r0, [r7, #4]
800858c: 460b mov r3, r1
800858e: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
8008590: 2300 movs r3, #0
8008592: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
8008594: 2181 movs r1, #129 @ 0x81
8008596: 6878 ldr r0, [r7, #4]
8008598: f001 feb3 bl 800a302 <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
800859c: 687b ldr r3, [r7, #4]
800859e: 2200 movs r2, #0
80085a0: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
80085a2: 2101 movs r1, #1
80085a4: 6878 ldr r0, [r7, #4]
80085a6: f001 feac bl 800a302 <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
80085aa: 687b ldr r3, [r7, #4]
80085ac: 2200 movs r2, #0
80085ae: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
80085b2: 2182 movs r1, #130 @ 0x82
80085b4: 6878 ldr r0, [r7, #4]
80085b6: f001 fea4 bl 800a302 <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
80085ba: 687b ldr r3, [r7, #4]
80085bc: 2200 movs r2, #0
80085be: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
80085c0: 687b ldr r3, [r7, #4]
80085c2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80085c6: 2b00 cmp r3, #0
80085c8: d00e beq.n 80085e8 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
80085ca: 687b ldr r3, [r7, #4]
80085cc: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
80085d0: 685b ldr r3, [r3, #4]
80085d2: 4798 blx r3
USBD_free(pdev->pClassData);
80085d4: 687b ldr r3, [r7, #4]
80085d6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80085da: 4618 mov r0, r3
80085dc: f001 ff9e bl 800a51c <USBD_static_free>
pdev->pClassData = NULL;
80085e0: 687b ldr r3, [r7, #4]
80085e2: 2200 movs r2, #0
80085e4: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
80085e8: 7bfb ldrb r3, [r7, #15]
}
80085ea: 4618 mov r0, r3
80085ec: 3710 adds r7, #16
80085ee: 46bd mov sp, r7
80085f0: bd80 pop {r7, pc}
080085f2 <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80085f2: b580 push {r7, lr}
80085f4: b086 sub sp, #24
80085f6: af00 add r7, sp, #0
80085f8: 6078 str r0, [r7, #4]
80085fa: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80085fc: 687b ldr r3, [r7, #4]
80085fe: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008602: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
8008604: 2300 movs r3, #0
8008606: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
8008608: 2300 movs r3, #0
800860a: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
800860c: 2300 movs r3, #0
800860e: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8008610: 683b ldr r3, [r7, #0]
8008612: 781b ldrb r3, [r3, #0]
8008614: f003 0360 and.w r3, r3, #96 @ 0x60
8008618: 2b00 cmp r3, #0
800861a: d039 beq.n 8008690 <USBD_CDC_Setup+0x9e>
800861c: 2b20 cmp r3, #32
800861e: d17f bne.n 8008720 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
8008620: 683b ldr r3, [r7, #0]
8008622: 88db ldrh r3, [r3, #6]
8008624: 2b00 cmp r3, #0
8008626: d029 beq.n 800867c <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
8008628: 683b ldr r3, [r7, #0]
800862a: 781b ldrb r3, [r3, #0]
800862c: b25b sxtb r3, r3
800862e: 2b00 cmp r3, #0
8008630: da11 bge.n 8008656 <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8008632: 687b ldr r3, [r7, #4]
8008634: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8008638: 689b ldr r3, [r3, #8]
800863a: 683a ldr r2, [r7, #0]
800863c: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800863e: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
8008640: 683a ldr r2, [r7, #0]
8008642: 88d2 ldrh r2, [r2, #6]
8008644: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
8008646: 6939 ldr r1, [r7, #16]
8008648: 683b ldr r3, [r7, #0]
800864a: 88db ldrh r3, [r3, #6]
800864c: 461a mov r2, r3
800864e: 6878 ldr r0, [r7, #4]
8008650: f001 fa06 bl 8009a60 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
8008654: e06b b.n 800872e <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
8008656: 683b ldr r3, [r7, #0]
8008658: 785a ldrb r2, [r3, #1]
800865a: 693b ldr r3, [r7, #16]
800865c: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
8008660: 683b ldr r3, [r7, #0]
8008662: 88db ldrh r3, [r3, #6]
8008664: b2da uxtb r2, r3
8008666: 693b ldr r3, [r7, #16]
8008668: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800866c: 6939 ldr r1, [r7, #16]
800866e: 683b ldr r3, [r7, #0]
8008670: 88db ldrh r3, [r3, #6]
8008672: 461a mov r2, r3
8008674: 6878 ldr r0, [r7, #4]
8008676: f001 fa21 bl 8009abc <USBD_CtlPrepareRx>
break;
800867a: e058 b.n 800872e <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800867c: 687b ldr r3, [r7, #4]
800867e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8008682: 689b ldr r3, [r3, #8]
8008684: 683a ldr r2, [r7, #0]
8008686: 7850 ldrb r0, [r2, #1]
8008688: 2200 movs r2, #0
800868a: 6839 ldr r1, [r7, #0]
800868c: 4798 blx r3
break;
800868e: e04e b.n 800872e <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
8008690: 683b ldr r3, [r7, #0]
8008692: 785b ldrb r3, [r3, #1]
8008694: 2b0b cmp r3, #11
8008696: d02e beq.n 80086f6 <USBD_CDC_Setup+0x104>
8008698: 2b0b cmp r3, #11
800869a: dc38 bgt.n 800870e <USBD_CDC_Setup+0x11c>
800869c: 2b00 cmp r3, #0
800869e: d002 beq.n 80086a6 <USBD_CDC_Setup+0xb4>
80086a0: 2b0a cmp r3, #10
80086a2: d014 beq.n 80086ce <USBD_CDC_Setup+0xdc>
80086a4: e033 b.n 800870e <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80086a6: 687b ldr r3, [r7, #4]
80086a8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80086ac: 2b03 cmp r3, #3
80086ae: d107 bne.n 80086c0 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
80086b0: f107 030c add.w r3, r7, #12
80086b4: 2202 movs r2, #2
80086b6: 4619 mov r1, r3
80086b8: 6878 ldr r0, [r7, #4]
80086ba: f001 f9d1 bl 8009a60 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
80086be: e02e b.n 800871e <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
80086c0: 6839 ldr r1, [r7, #0]
80086c2: 6878 ldr r0, [r7, #4]
80086c4: f001 f962 bl 800998c <USBD_CtlError>
ret = USBD_FAIL;
80086c8: 2302 movs r3, #2
80086ca: 75fb strb r3, [r7, #23]
break;
80086cc: e027 b.n 800871e <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80086ce: 687b ldr r3, [r7, #4]
80086d0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80086d4: 2b03 cmp r3, #3
80086d6: d107 bne.n 80086e8 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
80086d8: f107 030f add.w r3, r7, #15
80086dc: 2201 movs r2, #1
80086de: 4619 mov r1, r3
80086e0: 6878 ldr r0, [r7, #4]
80086e2: f001 f9bd bl 8009a60 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
80086e6: e01a b.n 800871e <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
80086e8: 6839 ldr r1, [r7, #0]
80086ea: 6878 ldr r0, [r7, #4]
80086ec: f001 f94e bl 800998c <USBD_CtlError>
ret = USBD_FAIL;
80086f0: 2302 movs r3, #2
80086f2: 75fb strb r3, [r7, #23]
break;
80086f4: e013 b.n 800871e <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
80086f6: 687b ldr r3, [r7, #4]
80086f8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80086fc: 2b03 cmp r3, #3
80086fe: d00d beq.n 800871c <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
8008700: 6839 ldr r1, [r7, #0]
8008702: 6878 ldr r0, [r7, #4]
8008704: f001 f942 bl 800998c <USBD_CtlError>
ret = USBD_FAIL;
8008708: 2302 movs r3, #2
800870a: 75fb strb r3, [r7, #23]
}
break;
800870c: e006 b.n 800871c <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800870e: 6839 ldr r1, [r7, #0]
8008710: 6878 ldr r0, [r7, #4]
8008712: f001 f93b bl 800998c <USBD_CtlError>
ret = USBD_FAIL;
8008716: 2302 movs r3, #2
8008718: 75fb strb r3, [r7, #23]
break;
800871a: e000 b.n 800871e <USBD_CDC_Setup+0x12c>
break;
800871c: bf00 nop
}
break;
800871e: e006 b.n 800872e <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
8008720: 6839 ldr r1, [r7, #0]
8008722: 6878 ldr r0, [r7, #4]
8008724: f001 f932 bl 800998c <USBD_CtlError>
ret = USBD_FAIL;
8008728: 2302 movs r3, #2
800872a: 75fb strb r3, [r7, #23]
break;
800872c: bf00 nop
}
return ret;
800872e: 7dfb ldrb r3, [r7, #23]
}
8008730: 4618 mov r0, r3
8008732: 3718 adds r7, #24
8008734: 46bd mov sp, r7
8008736: bd80 pop {r7, pc}
08008738 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8008738: b580 push {r7, lr}
800873a: b084 sub sp, #16
800873c: af00 add r7, sp, #0
800873e: 6078 str r0, [r7, #4]
8008740: 460b mov r3, r1
8008742: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
8008744: 687b ldr r3, [r7, #4]
8008746: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800874a: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
800874c: 687b ldr r3, [r7, #4]
800874e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008752: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
8008754: 687b ldr r3, [r7, #4]
8008756: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800875a: 2b00 cmp r3, #0
800875c: d03a beq.n 80087d4 <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800875e: 78fa ldrb r2, [r7, #3]
8008760: 6879 ldr r1, [r7, #4]
8008762: 4613 mov r3, r2
8008764: 009b lsls r3, r3, #2
8008766: 4413 add r3, r2
8008768: 009b lsls r3, r3, #2
800876a: 440b add r3, r1
800876c: 331c adds r3, #28
800876e: 681b ldr r3, [r3, #0]
8008770: 2b00 cmp r3, #0
8008772: d029 beq.n 80087c8 <USBD_CDC_DataIn+0x90>
8008774: 78fa ldrb r2, [r7, #3]
8008776: 6879 ldr r1, [r7, #4]
8008778: 4613 mov r3, r2
800877a: 009b lsls r3, r3, #2
800877c: 4413 add r3, r2
800877e: 009b lsls r3, r3, #2
8008780: 440b add r3, r1
8008782: 331c adds r3, #28
8008784: 681a ldr r2, [r3, #0]
8008786: 78f9 ldrb r1, [r7, #3]
8008788: 68b8 ldr r0, [r7, #8]
800878a: 460b mov r3, r1
800878c: 009b lsls r3, r3, #2
800878e: 440b add r3, r1
8008790: 00db lsls r3, r3, #3
8008792: 4403 add r3, r0
8008794: 3320 adds r3, #32
8008796: 681b ldr r3, [r3, #0]
8008798: fbb2 f1f3 udiv r1, r2, r3
800879c: fb01 f303 mul.w r3, r1, r3
80087a0: 1ad3 subs r3, r2, r3
80087a2: 2b00 cmp r3, #0
80087a4: d110 bne.n 80087c8 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
80087a6: 78fa ldrb r2, [r7, #3]
80087a8: 6879 ldr r1, [r7, #4]
80087aa: 4613 mov r3, r2
80087ac: 009b lsls r3, r3, #2
80087ae: 4413 add r3, r2
80087b0: 009b lsls r3, r3, #2
80087b2: 440b add r3, r1
80087b4: 331c adds r3, #28
80087b6: 2200 movs r2, #0
80087b8: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
80087ba: 78f9 ldrb r1, [r7, #3]
80087bc: 2300 movs r3, #0
80087be: 2200 movs r2, #0
80087c0: 6878 ldr r0, [r7, #4]
80087c2: f001 fe45 bl 800a450 <USBD_LL_Transmit>
80087c6: e003 b.n 80087d0 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
80087c8: 68fb ldr r3, [r7, #12]
80087ca: 2200 movs r2, #0
80087cc: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
80087d0: 2300 movs r3, #0
80087d2: e000 b.n 80087d6 <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
80087d4: 2302 movs r3, #2
}
}
80087d6: 4618 mov r0, r3
80087d8: 3710 adds r7, #16
80087da: 46bd mov sp, r7
80087dc: bd80 pop {r7, pc}
080087de <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
80087de: b580 push {r7, lr}
80087e0: b084 sub sp, #16
80087e2: af00 add r7, sp, #0
80087e4: 6078 str r0, [r7, #4]
80087e6: 460b mov r3, r1
80087e8: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80087ea: 687b ldr r3, [r7, #4]
80087ec: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80087f0: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
80087f2: 78fb ldrb r3, [r7, #3]
80087f4: 4619 mov r1, r3
80087f6: 6878 ldr r0, [r7, #4]
80087f8: f001 fe70 bl 800a4dc <USBD_LL_GetRxDataSize>
80087fc: 4602 mov r2, r0
80087fe: 68fb ldr r3, [r7, #12]
8008800: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
8008804: 687b ldr r3, [r7, #4]
8008806: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800880a: 2b00 cmp r3, #0
800880c: d00d beq.n 800882a <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800880e: 687b ldr r3, [r7, #4]
8008810: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8008814: 68db ldr r3, [r3, #12]
8008816: 68fa ldr r2, [r7, #12]
8008818: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800881c: 68fa ldr r2, [r7, #12]
800881e: f502 7203 add.w r2, r2, #524 @ 0x20c
8008822: 4611 mov r1, r2
8008824: 4798 blx r3
return USBD_OK;
8008826: 2300 movs r3, #0
8008828: e000 b.n 800882c <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800882a: 2302 movs r3, #2
}
}
800882c: 4618 mov r0, r3
800882e: 3710 adds r7, #16
8008830: 46bd mov sp, r7
8008832: bd80 pop {r7, pc}
08008834 <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
8008834: b580 push {r7, lr}
8008836: b084 sub sp, #16
8008838: af00 add r7, sp, #0
800883a: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800883c: 687b ldr r3, [r7, #4]
800883e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008842: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
8008844: 687b ldr r3, [r7, #4]
8008846: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800884a: 2b00 cmp r3, #0
800884c: d014 beq.n 8008878 <USBD_CDC_EP0_RxReady+0x44>
800884e: 68fb ldr r3, [r7, #12]
8008850: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
8008854: 2bff cmp r3, #255 @ 0xff
8008856: d00f beq.n 8008878 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
8008858: 687b ldr r3, [r7, #4]
800885a: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800885e: 689b ldr r3, [r3, #8]
8008860: 68fa ldr r2, [r7, #12]
8008862: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
8008866: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
8008868: 68fa ldr r2, [r7, #12]
800886a: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800886e: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
8008870: 68fb ldr r3, [r7, #12]
8008872: 22ff movs r2, #255 @ 0xff
8008874: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
8008878: 2300 movs r3, #0
}
800887a: 4618 mov r0, r3
800887c: 3710 adds r7, #16
800887e: 46bd mov sp, r7
8008880: bd80 pop {r7, pc}
...
08008884 <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
8008884: b480 push {r7}
8008886: b083 sub sp, #12
8008888: af00 add r7, sp, #0
800888a: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
800888c: 687b ldr r3, [r7, #4]
800888e: 2243 movs r2, #67 @ 0x43
8008890: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
8008892: 4b03 ldr r3, [pc, #12] @ (80088a0 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
8008894: 4618 mov r0, r3
8008896: 370c adds r7, #12
8008898: 46bd mov sp, r7
800889a: bc80 pop {r7}
800889c: 4770 bx lr
800889e: bf00 nop
80088a0: 20000098 .word 0x20000098
080088a4 <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
80088a4: b480 push {r7}
80088a6: b083 sub sp, #12
80088a8: af00 add r7, sp, #0
80088aa: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
80088ac: 687b ldr r3, [r7, #4]
80088ae: 2243 movs r2, #67 @ 0x43
80088b0: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
80088b2: 4b03 ldr r3, [pc, #12] @ (80088c0 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
80088b4: 4618 mov r0, r3
80088b6: 370c adds r7, #12
80088b8: 46bd mov sp, r7
80088ba: bc80 pop {r7}
80088bc: 4770 bx lr
80088be: bf00 nop
80088c0: 20000054 .word 0x20000054
080088c4 <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
80088c4: b480 push {r7}
80088c6: b083 sub sp, #12
80088c8: af00 add r7, sp, #0
80088ca: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
80088cc: 687b ldr r3, [r7, #4]
80088ce: 2243 movs r2, #67 @ 0x43
80088d0: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
80088d2: 4b03 ldr r3, [pc, #12] @ (80088e0 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
80088d4: 4618 mov r0, r3
80088d6: 370c adds r7, #12
80088d8: 46bd mov sp, r7
80088da: bc80 pop {r7}
80088dc: 4770 bx lr
80088de: bf00 nop
80088e0: 200000dc .word 0x200000dc
080088e4 <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
80088e4: b480 push {r7}
80088e6: b083 sub sp, #12
80088e8: af00 add r7, sp, #0
80088ea: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
80088ec: 687b ldr r3, [r7, #4]
80088ee: 220a movs r2, #10
80088f0: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
80088f2: 4b03 ldr r3, [pc, #12] @ (8008900 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
80088f4: 4618 mov r0, r3
80088f6: 370c adds r7, #12
80088f8: 46bd mov sp, r7
80088fa: bc80 pop {r7}
80088fc: 4770 bx lr
80088fe: bf00 nop
8008900: 20000010 .word 0x20000010
08008904 <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
8008904: b480 push {r7}
8008906: b085 sub sp, #20
8008908: af00 add r7, sp, #0
800890a: 6078 str r0, [r7, #4]
800890c: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800890e: 2302 movs r3, #2
8008910: 73fb strb r3, [r7, #15]
if (fops != NULL)
8008912: 683b ldr r3, [r7, #0]
8008914: 2b00 cmp r3, #0
8008916: d005 beq.n 8008924 <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
8008918: 687b ldr r3, [r7, #4]
800891a: 683a ldr r2, [r7, #0]
800891c: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
8008920: 2300 movs r3, #0
8008922: 73fb strb r3, [r7, #15]
}
return ret;
8008924: 7bfb ldrb r3, [r7, #15]
}
8008926: 4618 mov r0, r3
8008928: 3714 adds r7, #20
800892a: 46bd mov sp, r7
800892c: bc80 pop {r7}
800892e: 4770 bx lr
08008930 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
8008930: b480 push {r7}
8008932: b087 sub sp, #28
8008934: af00 add r7, sp, #0
8008936: 60f8 str r0, [r7, #12]
8008938: 60b9 str r1, [r7, #8]
800893a: 4613 mov r3, r2
800893c: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800893e: 68fb ldr r3, [r7, #12]
8008940: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008944: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
8008946: 697b ldr r3, [r7, #20]
8008948: 68ba ldr r2, [r7, #8]
800894a: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
800894e: 88fa ldrh r2, [r7, #6]
8008950: 697b ldr r3, [r7, #20]
8008952: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
8008956: 2300 movs r3, #0
}
8008958: 4618 mov r0, r3
800895a: 371c adds r7, #28
800895c: 46bd mov sp, r7
800895e: bc80 pop {r7}
8008960: 4770 bx lr
08008962 <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
8008962: b480 push {r7}
8008964: b085 sub sp, #20
8008966: af00 add r7, sp, #0
8008968: 6078 str r0, [r7, #4]
800896a: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800896c: 687b ldr r3, [r7, #4]
800896e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008972: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
8008974: 68fb ldr r3, [r7, #12]
8008976: 683a ldr r2, [r7, #0]
8008978: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
800897c: 2300 movs r3, #0
}
800897e: 4618 mov r0, r3
8008980: 3714 adds r7, #20
8008982: 46bd mov sp, r7
8008984: bc80 pop {r7}
8008986: 4770 bx lr
08008988 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
8008988: b580 push {r7, lr}
800898a: b084 sub sp, #16
800898c: af00 add r7, sp, #0
800898e: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8008990: 687b ldr r3, [r7, #4]
8008992: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008996: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
8008998: 687b ldr r3, [r7, #4]
800899a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800899e: 2b00 cmp r3, #0
80089a0: d01c beq.n 80089dc <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
80089a2: 68fb ldr r3, [r7, #12]
80089a4: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
80089a8: 2b00 cmp r3, #0
80089aa: d115 bne.n 80089d8 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
80089ac: 68fb ldr r3, [r7, #12]
80089ae: 2201 movs r2, #1
80089b0: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
80089b4: 68fb ldr r3, [r7, #12]
80089b6: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
80089ba: 687b ldr r3, [r7, #4]
80089bc: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
80089be: 68fb ldr r3, [r7, #12]
80089c0: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
80089c4: 68fb ldr r3, [r7, #12]
80089c6: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
80089ca: b29b uxth r3, r3
80089cc: 2181 movs r1, #129 @ 0x81
80089ce: 6878 ldr r0, [r7, #4]
80089d0: f001 fd3e bl 800a450 <USBD_LL_Transmit>
return USBD_OK;
80089d4: 2300 movs r3, #0
80089d6: e002 b.n 80089de <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
80089d8: 2301 movs r3, #1
80089da: e000 b.n 80089de <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
80089dc: 2302 movs r3, #2
}
}
80089de: 4618 mov r0, r3
80089e0: 3710 adds r7, #16
80089e2: 46bd mov sp, r7
80089e4: bd80 pop {r7, pc}
080089e6 <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
80089e6: b580 push {r7, lr}
80089e8: b084 sub sp, #16
80089ea: af00 add r7, sp, #0
80089ec: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80089ee: 687b ldr r3, [r7, #4]
80089f0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80089f4: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
80089f6: 687b ldr r3, [r7, #4]
80089f8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80089fc: 2b00 cmp r3, #0
80089fe: d017 beq.n 8008a30 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
8008a00: 687b ldr r3, [r7, #4]
8008a02: 7c1b ldrb r3, [r3, #16]
8008a04: 2b00 cmp r3, #0
8008a06: d109 bne.n 8008a1c <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
8008a08: 68fb ldr r3, [r7, #12]
8008a0a: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8008a0e: f44f 7300 mov.w r3, #512 @ 0x200
8008a12: 2101 movs r1, #1
8008a14: 6878 ldr r0, [r7, #4]
8008a16: f001 fd3e bl 800a496 <USBD_LL_PrepareReceive>
8008a1a: e007 b.n 8008a2c <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
8008a1c: 68fb ldr r3, [r7, #12]
8008a1e: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8008a22: 2340 movs r3, #64 @ 0x40
8008a24: 2101 movs r1, #1
8008a26: 6878 ldr r0, [r7, #4]
8008a28: f001 fd35 bl 800a496 <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
8008a2c: 2300 movs r3, #0
8008a2e: e000 b.n 8008a32 <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
8008a30: 2302 movs r3, #2
}
}
8008a32: 4618 mov r0, r3
8008a34: 3710 adds r7, #16
8008a36: 46bd mov sp, r7
8008a38: bd80 pop {r7, pc}
08008a3a <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
8008a3a: b580 push {r7, lr}
8008a3c: b084 sub sp, #16
8008a3e: af00 add r7, sp, #0
8008a40: 60f8 str r0, [r7, #12]
8008a42: 60b9 str r1, [r7, #8]
8008a44: 4613 mov r3, r2
8008a46: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
8008a48: 68fb ldr r3, [r7, #12]
8008a4a: 2b00 cmp r3, #0
8008a4c: d101 bne.n 8008a52 <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
8008a4e: 2302 movs r3, #2
8008a50: e01a b.n 8008a88 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
8008a52: 68fb ldr r3, [r7, #12]
8008a54: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008a58: 2b00 cmp r3, #0
8008a5a: d003 beq.n 8008a64 <USBD_Init+0x2a>
{
pdev->pClass = NULL;
8008a5c: 68fb ldr r3, [r7, #12]
8008a5e: 2200 movs r2, #0
8008a60: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
8008a64: 68bb ldr r3, [r7, #8]
8008a66: 2b00 cmp r3, #0
8008a68: d003 beq.n 8008a72 <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
8008a6a: 68fb ldr r3, [r7, #12]
8008a6c: 68ba ldr r2, [r7, #8]
8008a6e: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
8008a72: 68fb ldr r3, [r7, #12]
8008a74: 2201 movs r2, #1
8008a76: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
8008a7a: 68fb ldr r3, [r7, #12]
8008a7c: 79fa ldrb r2, [r7, #7]
8008a7e: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
8008a80: 68f8 ldr r0, [r7, #12]
8008a82: f001 fba3 bl 800a1cc <USBD_LL_Init>
return USBD_OK;
8008a86: 2300 movs r3, #0
}
8008a88: 4618 mov r0, r3
8008a8a: 3710 adds r7, #16
8008a8c: 46bd mov sp, r7
8008a8e: bd80 pop {r7, pc}
08008a90 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
8008a90: b480 push {r7}
8008a92: b085 sub sp, #20
8008a94: af00 add r7, sp, #0
8008a96: 6078 str r0, [r7, #4]
8008a98: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
8008a9a: 2300 movs r3, #0
8008a9c: 73fb strb r3, [r7, #15]
if (pclass != NULL)
8008a9e: 683b ldr r3, [r7, #0]
8008aa0: 2b00 cmp r3, #0
8008aa2: d006 beq.n 8008ab2 <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
8008aa4: 687b ldr r3, [r7, #4]
8008aa6: 683a ldr r2, [r7, #0]
8008aa8: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
8008aac: 2300 movs r3, #0
8008aae: 73fb strb r3, [r7, #15]
8008ab0: e001 b.n 8008ab6 <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
8008ab2: 2302 movs r3, #2
8008ab4: 73fb strb r3, [r7, #15]
}
return status;
8008ab6: 7bfb ldrb r3, [r7, #15]
}
8008ab8: 4618 mov r0, r3
8008aba: 3714 adds r7, #20
8008abc: 46bd mov sp, r7
8008abe: bc80 pop {r7}
8008ac0: 4770 bx lr
08008ac2 <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
8008ac2: b580 push {r7, lr}
8008ac4: b082 sub sp, #8
8008ac6: af00 add r7, sp, #0
8008ac8: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
8008aca: 6878 ldr r0, [r7, #4]
8008acc: f001 fbd8 bl 800a280 <USBD_LL_Start>
return USBD_OK;
8008ad0: 2300 movs r3, #0
}
8008ad2: 4618 mov r0, r3
8008ad4: 3708 adds r7, #8
8008ad6: 46bd mov sp, r7
8008ad8: bd80 pop {r7, pc}
08008ada <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
8008ada: b480 push {r7}
8008adc: b083 sub sp, #12
8008ade: af00 add r7, sp, #0
8008ae0: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
8008ae2: 2300 movs r3, #0
}
8008ae4: 4618 mov r0, r3
8008ae6: 370c adds r7, #12
8008ae8: 46bd mov sp, r7
8008aea: bc80 pop {r7}
8008aec: 4770 bx lr
08008aee <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008aee: b580 push {r7, lr}
8008af0: b084 sub sp, #16
8008af2: af00 add r7, sp, #0
8008af4: 6078 str r0, [r7, #4]
8008af6: 460b mov r3, r1
8008af8: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
8008afa: 2302 movs r3, #2
8008afc: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
8008afe: 687b ldr r3, [r7, #4]
8008b00: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008b04: 2b00 cmp r3, #0
8008b06: d00c beq.n 8008b22 <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
8008b08: 687b ldr r3, [r7, #4]
8008b0a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008b0e: 681b ldr r3, [r3, #0]
8008b10: 78fa ldrb r2, [r7, #3]
8008b12: 4611 mov r1, r2
8008b14: 6878 ldr r0, [r7, #4]
8008b16: 4798 blx r3
8008b18: 4603 mov r3, r0
8008b1a: 2b00 cmp r3, #0
8008b1c: d101 bne.n 8008b22 <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
8008b1e: 2300 movs r3, #0
8008b20: 73fb strb r3, [r7, #15]
}
}
return ret;
8008b22: 7bfb ldrb r3, [r7, #15]
}
8008b24: 4618 mov r0, r3
8008b26: 3710 adds r7, #16
8008b28: 46bd mov sp, r7
8008b2a: bd80 pop {r7, pc}
08008b2c <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8008b2c: b580 push {r7, lr}
8008b2e: b082 sub sp, #8
8008b30: af00 add r7, sp, #0
8008b32: 6078 str r0, [r7, #4]
8008b34: 460b mov r3, r1
8008b36: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
8008b38: 687b ldr r3, [r7, #4]
8008b3a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008b3e: 685b ldr r3, [r3, #4]
8008b40: 78fa ldrb r2, [r7, #3]
8008b42: 4611 mov r1, r2
8008b44: 6878 ldr r0, [r7, #4]
8008b46: 4798 blx r3
return USBD_OK;
8008b48: 2300 movs r3, #0
}
8008b4a: 4618 mov r0, r3
8008b4c: 3708 adds r7, #8
8008b4e: 46bd mov sp, r7
8008b50: bd80 pop {r7, pc}
08008b52 <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
8008b52: b580 push {r7, lr}
8008b54: b082 sub sp, #8
8008b56: af00 add r7, sp, #0
8008b58: 6078 str r0, [r7, #4]
8008b5a: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
8008b5c: 687b ldr r3, [r7, #4]
8008b5e: f503 732a add.w r3, r3, #680 @ 0x2a8
8008b62: 6839 ldr r1, [r7, #0]
8008b64: 4618 mov r0, r3
8008b66: f000 fed8 bl 800991a <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
8008b6a: 687b ldr r3, [r7, #4]
8008b6c: 2201 movs r2, #1
8008b6e: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
8008b72: 687b ldr r3, [r7, #4]
8008b74: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
8008b78: 461a mov r2, r3
8008b7a: 687b ldr r3, [r7, #4]
8008b7c: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
8008b80: 687b ldr r3, [r7, #4]
8008b82: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
8008b86: f003 031f and.w r3, r3, #31
8008b8a: 2b02 cmp r3, #2
8008b8c: d016 beq.n 8008bbc <USBD_LL_SetupStage+0x6a>
8008b8e: 2b02 cmp r3, #2
8008b90: d81c bhi.n 8008bcc <USBD_LL_SetupStage+0x7a>
8008b92: 2b00 cmp r3, #0
8008b94: d002 beq.n 8008b9c <USBD_LL_SetupStage+0x4a>
8008b96: 2b01 cmp r3, #1
8008b98: d008 beq.n 8008bac <USBD_LL_SetupStage+0x5a>
8008b9a: e017 b.n 8008bcc <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
8008b9c: 687b ldr r3, [r7, #4]
8008b9e: f503 732a add.w r3, r3, #680 @ 0x2a8
8008ba2: 4619 mov r1, r3
8008ba4: 6878 ldr r0, [r7, #4]
8008ba6: f000 f9cb bl 8008f40 <USBD_StdDevReq>
break;
8008baa: e01a b.n 8008be2 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
8008bac: 687b ldr r3, [r7, #4]
8008bae: f503 732a add.w r3, r3, #680 @ 0x2a8
8008bb2: 4619 mov r1, r3
8008bb4: 6878 ldr r0, [r7, #4]
8008bb6: f000 fa2d bl 8009014 <USBD_StdItfReq>
break;
8008bba: e012 b.n 8008be2 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
8008bbc: 687b ldr r3, [r7, #4]
8008bbe: f503 732a add.w r3, r3, #680 @ 0x2a8
8008bc2: 4619 mov r1, r3
8008bc4: 6878 ldr r0, [r7, #4]
8008bc6: f000 fa6d bl 80090a4 <USBD_StdEPReq>
break;
8008bca: e00a b.n 8008be2 <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
8008bcc: 687b ldr r3, [r7, #4]
8008bce: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
8008bd2: f023 037f bic.w r3, r3, #127 @ 0x7f
8008bd6: b2db uxtb r3, r3
8008bd8: 4619 mov r1, r3
8008bda: 6878 ldr r0, [r7, #4]
8008bdc: f001 fbb0 bl 800a340 <USBD_LL_StallEP>
break;
8008be0: bf00 nop
}
return USBD_OK;
8008be2: 2300 movs r3, #0
}
8008be4: 4618 mov r0, r3
8008be6: 3708 adds r7, #8
8008be8: 46bd mov sp, r7
8008bea: bd80 pop {r7, pc}
08008bec <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8008bec: b580 push {r7, lr}
8008bee: b086 sub sp, #24
8008bf0: af00 add r7, sp, #0
8008bf2: 60f8 str r0, [r7, #12]
8008bf4: 460b mov r3, r1
8008bf6: 607a str r2, [r7, #4]
8008bf8: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8008bfa: 7afb ldrb r3, [r7, #11]
8008bfc: 2b00 cmp r3, #0
8008bfe: d14b bne.n 8008c98 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
8008c00: 68fb ldr r3, [r7, #12]
8008c02: f503 73aa add.w r3, r3, #340 @ 0x154
8008c06: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
8008c08: 68fb ldr r3, [r7, #12]
8008c0a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8008c0e: 2b03 cmp r3, #3
8008c10: d134 bne.n 8008c7c <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
8008c12: 697b ldr r3, [r7, #20]
8008c14: 68da ldr r2, [r3, #12]
8008c16: 697b ldr r3, [r7, #20]
8008c18: 691b ldr r3, [r3, #16]
8008c1a: 429a cmp r2, r3
8008c1c: d919 bls.n 8008c52 <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
8008c1e: 697b ldr r3, [r7, #20]
8008c20: 68da ldr r2, [r3, #12]
8008c22: 697b ldr r3, [r7, #20]
8008c24: 691b ldr r3, [r3, #16]
8008c26: 1ad2 subs r2, r2, r3
8008c28: 697b ldr r3, [r7, #20]
8008c2a: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008c2c: 697b ldr r3, [r7, #20]
8008c2e: 68da ldr r2, [r3, #12]
8008c30: 697b ldr r3, [r7, #20]
8008c32: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8008c34: 429a cmp r2, r3
8008c36: d203 bcs.n 8008c40 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008c38: 697b ldr r3, [r7, #20]
8008c3a: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
8008c3c: b29b uxth r3, r3
8008c3e: e002 b.n 8008c46 <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8008c40: 697b ldr r3, [r7, #20]
8008c42: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8008c44: b29b uxth r3, r3
8008c46: 461a mov r2, r3
8008c48: 6879 ldr r1, [r7, #4]
8008c4a: 68f8 ldr r0, [r7, #12]
8008c4c: f000 ff54 bl 8009af8 <USBD_CtlContinueRx>
8008c50: e038 b.n 8008cc4 <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
8008c52: 68fb ldr r3, [r7, #12]
8008c54: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008c58: 691b ldr r3, [r3, #16]
8008c5a: 2b00 cmp r3, #0
8008c5c: d00a beq.n 8008c74 <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008c5e: 68fb ldr r3, [r7, #12]
8008c60: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
8008c64: 2b03 cmp r3, #3
8008c66: d105 bne.n 8008c74 <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
8008c68: 68fb ldr r3, [r7, #12]
8008c6a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008c6e: 691b ldr r3, [r3, #16]
8008c70: 68f8 ldr r0, [r7, #12]
8008c72: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
8008c74: 68f8 ldr r0, [r7, #12]
8008c76: f000 ff51 bl 8009b1c <USBD_CtlSendStatus>
8008c7a: e023 b.n 8008cc4 <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
8008c7c: 68fb ldr r3, [r7, #12]
8008c7e: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8008c82: 2b05 cmp r3, #5
8008c84: d11e bne.n 8008cc4 <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
8008c86: 68fb ldr r3, [r7, #12]
8008c88: 2200 movs r2, #0
8008c8a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
8008c8e: 2100 movs r1, #0
8008c90: 68f8 ldr r0, [r7, #12]
8008c92: f001 fb55 bl 800a340 <USBD_LL_StallEP>
8008c96: e015 b.n 8008cc4 <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
8008c98: 68fb ldr r3, [r7, #12]
8008c9a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008c9e: 699b ldr r3, [r3, #24]
8008ca0: 2b00 cmp r3, #0
8008ca2: d00d beq.n 8008cc0 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008ca4: 68fb ldr r3, [r7, #12]
8008ca6: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
8008caa: 2b03 cmp r3, #3
8008cac: d108 bne.n 8008cc0 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
8008cae: 68fb ldr r3, [r7, #12]
8008cb0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008cb4: 699b ldr r3, [r3, #24]
8008cb6: 7afa ldrb r2, [r7, #11]
8008cb8: 4611 mov r1, r2
8008cba: 68f8 ldr r0, [r7, #12]
8008cbc: 4798 blx r3
8008cbe: e001 b.n 8008cc4 <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8008cc0: 2302 movs r3, #2
8008cc2: e000 b.n 8008cc6 <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
8008cc4: 2300 movs r3, #0
}
8008cc6: 4618 mov r0, r3
8008cc8: 3718 adds r7, #24
8008cca: 46bd mov sp, r7
8008ccc: bd80 pop {r7, pc}
08008cce <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8008cce: b580 push {r7, lr}
8008cd0: b086 sub sp, #24
8008cd2: af00 add r7, sp, #0
8008cd4: 60f8 str r0, [r7, #12]
8008cd6: 460b mov r3, r1
8008cd8: 607a str r2, [r7, #4]
8008cda: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8008cdc: 7afb ldrb r3, [r7, #11]
8008cde: 2b00 cmp r3, #0
8008ce0: d17f bne.n 8008de2 <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
8008ce2: 68fb ldr r3, [r7, #12]
8008ce4: 3314 adds r3, #20
8008ce6: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
8008ce8: 68fb ldr r3, [r7, #12]
8008cea: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8008cee: 2b02 cmp r3, #2
8008cf0: d15c bne.n 8008dac <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
8008cf2: 697b ldr r3, [r7, #20]
8008cf4: 68da ldr r2, [r3, #12]
8008cf6: 697b ldr r3, [r7, #20]
8008cf8: 691b ldr r3, [r3, #16]
8008cfa: 429a cmp r2, r3
8008cfc: d915 bls.n 8008d2a <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
8008cfe: 697b ldr r3, [r7, #20]
8008d00: 68da ldr r2, [r3, #12]
8008d02: 697b ldr r3, [r7, #20]
8008d04: 691b ldr r3, [r3, #16]
8008d06: 1ad2 subs r2, r2, r3
8008d08: 697b ldr r3, [r7, #20]
8008d0a: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
8008d0c: 697b ldr r3, [r7, #20]
8008d0e: 68db ldr r3, [r3, #12]
8008d10: b29b uxth r3, r3
8008d12: 461a mov r2, r3
8008d14: 6879 ldr r1, [r7, #4]
8008d16: 68f8 ldr r0, [r7, #12]
8008d18: f000 febe bl 8009a98 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8008d1c: 2300 movs r3, #0
8008d1e: 2200 movs r2, #0
8008d20: 2100 movs r1, #0
8008d22: 68f8 ldr r0, [r7, #12]
8008d24: f001 fbb7 bl 800a496 <USBD_LL_PrepareReceive>
8008d28: e04e b.n 8008dc8 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
8008d2a: 697b ldr r3, [r7, #20]
8008d2c: 689b ldr r3, [r3, #8]
8008d2e: 697a ldr r2, [r7, #20]
8008d30: 6912 ldr r2, [r2, #16]
8008d32: fbb3 f1f2 udiv r1, r3, r2
8008d36: fb01 f202 mul.w r2, r1, r2
8008d3a: 1a9b subs r3, r3, r2
8008d3c: 2b00 cmp r3, #0
8008d3e: d11c bne.n 8008d7a <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
8008d40: 697b ldr r3, [r7, #20]
8008d42: 689a ldr r2, [r3, #8]
8008d44: 697b ldr r3, [r7, #20]
8008d46: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
8008d48: 429a cmp r2, r3
8008d4a: d316 bcc.n 8008d7a <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
8008d4c: 697b ldr r3, [r7, #20]
8008d4e: 689a ldr r2, [r3, #8]
8008d50: 68fb ldr r3, [r7, #12]
8008d52: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
8008d56: 429a cmp r2, r3
8008d58: d20f bcs.n 8008d7a <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
8008d5a: 2200 movs r2, #0
8008d5c: 2100 movs r1, #0
8008d5e: 68f8 ldr r0, [r7, #12]
8008d60: f000 fe9a bl 8009a98 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
8008d64: 68fb ldr r3, [r7, #12]
8008d66: 2200 movs r2, #0
8008d68: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8008d6c: 2300 movs r3, #0
8008d6e: 2200 movs r2, #0
8008d70: 2100 movs r1, #0
8008d72: 68f8 ldr r0, [r7, #12]
8008d74: f001 fb8f bl 800a496 <USBD_LL_PrepareReceive>
8008d78: e026 b.n 8008dc8 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
8008d7a: 68fb ldr r3, [r7, #12]
8008d7c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008d80: 68db ldr r3, [r3, #12]
8008d82: 2b00 cmp r3, #0
8008d84: d00a beq.n 8008d9c <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008d86: 68fb ldr r3, [r7, #12]
8008d88: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
8008d8c: 2b03 cmp r3, #3
8008d8e: d105 bne.n 8008d9c <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
8008d90: 68fb ldr r3, [r7, #12]
8008d92: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008d96: 68db ldr r3, [r3, #12]
8008d98: 68f8 ldr r0, [r7, #12]
8008d9a: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
8008d9c: 2180 movs r1, #128 @ 0x80
8008d9e: 68f8 ldr r0, [r7, #12]
8008da0: f001 face bl 800a340 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
8008da4: 68f8 ldr r0, [r7, #12]
8008da6: f000 fecc bl 8009b42 <USBD_CtlReceiveStatus>
8008daa: e00d b.n 8008dc8 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8008dac: 68fb ldr r3, [r7, #12]
8008dae: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8008db2: 2b04 cmp r3, #4
8008db4: d004 beq.n 8008dc0 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
8008db6: 68fb ldr r3, [r7, #12]
8008db8: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8008dbc: 2b00 cmp r3, #0
8008dbe: d103 bne.n 8008dc8 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
8008dc0: 2180 movs r1, #128 @ 0x80
8008dc2: 68f8 ldr r0, [r7, #12]
8008dc4: f001 fabc bl 800a340 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
8008dc8: 68fb ldr r3, [r7, #12]
8008dca: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
8008dce: 2b01 cmp r3, #1
8008dd0: d11d bne.n 8008e0e <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
8008dd2: 68f8 ldr r0, [r7, #12]
8008dd4: f7ff fe81 bl 8008ada <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
8008dd8: 68fb ldr r3, [r7, #12]
8008dda: 2200 movs r2, #0
8008ddc: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
8008de0: e015 b.n 8008e0e <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
8008de2: 68fb ldr r3, [r7, #12]
8008de4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008de8: 695b ldr r3, [r3, #20]
8008dea: 2b00 cmp r3, #0
8008dec: d00d beq.n 8008e0a <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8008dee: 68fb ldr r3, [r7, #12]
8008df0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
8008df4: 2b03 cmp r3, #3
8008df6: d108 bne.n 8008e0a <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
8008df8: 68fb ldr r3, [r7, #12]
8008dfa: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008dfe: 695b ldr r3, [r3, #20]
8008e00: 7afa ldrb r2, [r7, #11]
8008e02: 4611 mov r1, r2
8008e04: 68f8 ldr r0, [r7, #12]
8008e06: 4798 blx r3
8008e08: e001 b.n 8008e0e <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8008e0a: 2302 movs r3, #2
8008e0c: e000 b.n 8008e10 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
8008e0e: 2300 movs r3, #0
}
8008e10: 4618 mov r0, r3
8008e12: 3718 adds r7, #24
8008e14: 46bd mov sp, r7
8008e16: bd80 pop {r7, pc}
08008e18 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
8008e18: b580 push {r7, lr}
8008e1a: b082 sub sp, #8
8008e1c: af00 add r7, sp, #0
8008e1e: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8008e20: 2340 movs r3, #64 @ 0x40
8008e22: 2200 movs r2, #0
8008e24: 2100 movs r1, #0
8008e26: 6878 ldr r0, [r7, #4]
8008e28: f001 fa45 bl 800a2b6 <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
8008e2c: 687b ldr r3, [r7, #4]
8008e2e: 2201 movs r2, #1
8008e30: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
8008e34: 687b ldr r3, [r7, #4]
8008e36: 2240 movs r2, #64 @ 0x40
8008e38: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8008e3c: 2340 movs r3, #64 @ 0x40
8008e3e: 2200 movs r2, #0
8008e40: 2180 movs r1, #128 @ 0x80
8008e42: 6878 ldr r0, [r7, #4]
8008e44: f001 fa37 bl 800a2b6 <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
8008e48: 687b ldr r3, [r7, #4]
8008e4a: 2201 movs r2, #1
8008e4c: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
8008e4e: 687b ldr r3, [r7, #4]
8008e50: 2240 movs r2, #64 @ 0x40
8008e52: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
8008e54: 687b ldr r3, [r7, #4]
8008e56: 2201 movs r2, #1
8008e58: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
8008e5c: 687b ldr r3, [r7, #4]
8008e5e: 2200 movs r2, #0
8008e60: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
8008e64: 687b ldr r3, [r7, #4]
8008e66: 2200 movs r2, #0
8008e68: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
8008e6a: 687b ldr r3, [r7, #4]
8008e6c: 2200 movs r2, #0
8008e6e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
8008e72: 687b ldr r3, [r7, #4]
8008e74: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8008e78: 2b00 cmp r3, #0
8008e7a: d009 beq.n 8008e90 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
8008e7c: 687b ldr r3, [r7, #4]
8008e7e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008e82: 685b ldr r3, [r3, #4]
8008e84: 687a ldr r2, [r7, #4]
8008e86: 6852 ldr r2, [r2, #4]
8008e88: b2d2 uxtb r2, r2
8008e8a: 4611 mov r1, r2
8008e8c: 6878 ldr r0, [r7, #4]
8008e8e: 4798 blx r3
}
return USBD_OK;
8008e90: 2300 movs r3, #0
}
8008e92: 4618 mov r0, r3
8008e94: 3708 adds r7, #8
8008e96: 46bd mov sp, r7
8008e98: bd80 pop {r7, pc}
08008e9a <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
8008e9a: b480 push {r7}
8008e9c: b083 sub sp, #12
8008e9e: af00 add r7, sp, #0
8008ea0: 6078 str r0, [r7, #4]
8008ea2: 460b mov r3, r1
8008ea4: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
8008ea6: 687b ldr r3, [r7, #4]
8008ea8: 78fa ldrb r2, [r7, #3]
8008eaa: 741a strb r2, [r3, #16]
return USBD_OK;
8008eac: 2300 movs r3, #0
}
8008eae: 4618 mov r0, r3
8008eb0: 370c adds r7, #12
8008eb2: 46bd mov sp, r7
8008eb4: bc80 pop {r7}
8008eb6: 4770 bx lr
08008eb8 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
8008eb8: b480 push {r7}
8008eba: b083 sub sp, #12
8008ebc: af00 add r7, sp, #0
8008ebe: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
8008ec0: 687b ldr r3, [r7, #4]
8008ec2: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
8008ec6: 687b ldr r3, [r7, #4]
8008ec8: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
8008ecc: 687b ldr r3, [r7, #4]
8008ece: 2204 movs r2, #4
8008ed0: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
8008ed4: 2300 movs r3, #0
}
8008ed6: 4618 mov r0, r3
8008ed8: 370c adds r7, #12
8008eda: 46bd mov sp, r7
8008edc: bc80 pop {r7}
8008ede: 4770 bx lr
08008ee0 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
8008ee0: b480 push {r7}
8008ee2: b083 sub sp, #12
8008ee4: af00 add r7, sp, #0
8008ee6: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
8008ee8: 687b ldr r3, [r7, #4]
8008eea: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8008eee: 2b04 cmp r3, #4
8008ef0: d105 bne.n 8008efe <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
8008ef2: 687b ldr r3, [r7, #4]
8008ef4: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
8008ef8: 687b ldr r3, [r7, #4]
8008efa: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
8008efe: 2300 movs r3, #0
}
8008f00: 4618 mov r0, r3
8008f02: 370c adds r7, #12
8008f04: 46bd mov sp, r7
8008f06: bc80 pop {r7}
8008f08: 4770 bx lr
08008f0a <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
8008f0a: b580 push {r7, lr}
8008f0c: b082 sub sp, #8
8008f0e: af00 add r7, sp, #0
8008f10: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8008f12: 687b ldr r3, [r7, #4]
8008f14: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8008f18: 2b03 cmp r3, #3
8008f1a: d10b bne.n 8008f34 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
8008f1c: 687b ldr r3, [r7, #4]
8008f1e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008f22: 69db ldr r3, [r3, #28]
8008f24: 2b00 cmp r3, #0
8008f26: d005 beq.n 8008f34 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
8008f28: 687b ldr r3, [r7, #4]
8008f2a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008f2e: 69db ldr r3, [r3, #28]
8008f30: 6878 ldr r0, [r7, #4]
8008f32: 4798 blx r3
}
}
return USBD_OK;
8008f34: 2300 movs r3, #0
}
8008f36: 4618 mov r0, r3
8008f38: 3708 adds r7, #8
8008f3a: 46bd mov sp, r7
8008f3c: bd80 pop {r7, pc}
...
08008f40 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8008f40: b580 push {r7, lr}
8008f42: b084 sub sp, #16
8008f44: af00 add r7, sp, #0
8008f46: 6078 str r0, [r7, #4]
8008f48: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
8008f4a: 2300 movs r3, #0
8008f4c: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8008f4e: 683b ldr r3, [r7, #0]
8008f50: 781b ldrb r3, [r3, #0]
8008f52: f003 0360 and.w r3, r3, #96 @ 0x60
8008f56: 2b40 cmp r3, #64 @ 0x40
8008f58: d005 beq.n 8008f66 <USBD_StdDevReq+0x26>
8008f5a: 2b40 cmp r3, #64 @ 0x40
8008f5c: d84f bhi.n 8008ffe <USBD_StdDevReq+0xbe>
8008f5e: 2b00 cmp r3, #0
8008f60: d009 beq.n 8008f76 <USBD_StdDevReq+0x36>
8008f62: 2b20 cmp r3, #32
8008f64: d14b bne.n 8008ffe <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
8008f66: 687b ldr r3, [r7, #4]
8008f68: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8008f6c: 689b ldr r3, [r3, #8]
8008f6e: 6839 ldr r1, [r7, #0]
8008f70: 6878 ldr r0, [r7, #4]
8008f72: 4798 blx r3
break;
8008f74: e048 b.n 8009008 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
8008f76: 683b ldr r3, [r7, #0]
8008f78: 785b ldrb r3, [r3, #1]
8008f7a: 2b09 cmp r3, #9
8008f7c: d839 bhi.n 8008ff2 <USBD_StdDevReq+0xb2>
8008f7e: a201 add r2, pc, #4 @ (adr r2, 8008f84 <USBD_StdDevReq+0x44>)
8008f80: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008f84: 08008fd5 .word 0x08008fd5
8008f88: 08008fe9 .word 0x08008fe9
8008f8c: 08008ff3 .word 0x08008ff3
8008f90: 08008fdf .word 0x08008fdf
8008f94: 08008ff3 .word 0x08008ff3
8008f98: 08008fb7 .word 0x08008fb7
8008f9c: 08008fad .word 0x08008fad
8008fa0: 08008ff3 .word 0x08008ff3
8008fa4: 08008fcb .word 0x08008fcb
8008fa8: 08008fc1 .word 0x08008fc1
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
8008fac: 6839 ldr r1, [r7, #0]
8008fae: 6878 ldr r0, [r7, #4]
8008fb0: f000 f9dc bl 800936c <USBD_GetDescriptor>
break;
8008fb4: e022 b.n 8008ffc <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
8008fb6: 6839 ldr r1, [r7, #0]
8008fb8: 6878 ldr r0, [r7, #4]
8008fba: f000 fb3f bl 800963c <USBD_SetAddress>
break;
8008fbe: e01d b.n 8008ffc <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
8008fc0: 6839 ldr r1, [r7, #0]
8008fc2: 6878 ldr r0, [r7, #4]
8008fc4: f000 fb7e bl 80096c4 <USBD_SetConfig>
break;
8008fc8: e018 b.n 8008ffc <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
8008fca: 6839 ldr r1, [r7, #0]
8008fcc: 6878 ldr r0, [r7, #4]
8008fce: f000 fc07 bl 80097e0 <USBD_GetConfig>
break;
8008fd2: e013 b.n 8008ffc <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
8008fd4: 6839 ldr r1, [r7, #0]
8008fd6: 6878 ldr r0, [r7, #4]
8008fd8: f000 fc37 bl 800984a <USBD_GetStatus>
break;
8008fdc: e00e b.n 8008ffc <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
8008fde: 6839 ldr r1, [r7, #0]
8008fe0: 6878 ldr r0, [r7, #4]
8008fe2: f000 fc65 bl 80098b0 <USBD_SetFeature>
break;
8008fe6: e009 b.n 8008ffc <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
8008fe8: 6839 ldr r1, [r7, #0]
8008fea: 6878 ldr r0, [r7, #4]
8008fec: f000 fc74 bl 80098d8 <USBD_ClrFeature>
break;
8008ff0: e004 b.n 8008ffc <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
8008ff2: 6839 ldr r1, [r7, #0]
8008ff4: 6878 ldr r0, [r7, #4]
8008ff6: f000 fcc9 bl 800998c <USBD_CtlError>
break;
8008ffa: bf00 nop
}
break;
8008ffc: e004 b.n 8009008 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
8008ffe: 6839 ldr r1, [r7, #0]
8009000: 6878 ldr r0, [r7, #4]
8009002: f000 fcc3 bl 800998c <USBD_CtlError>
break;
8009006: bf00 nop
}
return ret;
8009008: 7bfb ldrb r3, [r7, #15]
}
800900a: 4618 mov r0, r3
800900c: 3710 adds r7, #16
800900e: 46bd mov sp, r7
8009010: bd80 pop {r7, pc}
8009012: bf00 nop
08009014 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8009014: b580 push {r7, lr}
8009016: b084 sub sp, #16
8009018: af00 add r7, sp, #0
800901a: 6078 str r0, [r7, #4]
800901c: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800901e: 2300 movs r3, #0
8009020: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8009022: 683b ldr r3, [r7, #0]
8009024: 781b ldrb r3, [r3, #0]
8009026: f003 0360 and.w r3, r3, #96 @ 0x60
800902a: 2b40 cmp r3, #64 @ 0x40
800902c: d005 beq.n 800903a <USBD_StdItfReq+0x26>
800902e: 2b40 cmp r3, #64 @ 0x40
8009030: d82e bhi.n 8009090 <USBD_StdItfReq+0x7c>
8009032: 2b00 cmp r3, #0
8009034: d001 beq.n 800903a <USBD_StdItfReq+0x26>
8009036: 2b20 cmp r3, #32
8009038: d12a bne.n 8009090 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800903a: 687b ldr r3, [r7, #4]
800903c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009040: 3b01 subs r3, #1
8009042: 2b02 cmp r3, #2
8009044: d81d bhi.n 8009082 <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
8009046: 683b ldr r3, [r7, #0]
8009048: 889b ldrh r3, [r3, #4]
800904a: b2db uxtb r3, r3
800904c: 2b01 cmp r3, #1
800904e: d813 bhi.n 8009078 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
8009050: 687b ldr r3, [r7, #4]
8009052: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8009056: 689b ldr r3, [r3, #8]
8009058: 6839 ldr r1, [r7, #0]
800905a: 6878 ldr r0, [r7, #4]
800905c: 4798 blx r3
800905e: 4603 mov r3, r0
8009060: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
8009062: 683b ldr r3, [r7, #0]
8009064: 88db ldrh r3, [r3, #6]
8009066: 2b00 cmp r3, #0
8009068: d110 bne.n 800908c <USBD_StdItfReq+0x78>
800906a: 7bfb ldrb r3, [r7, #15]
800906c: 2b00 cmp r3, #0
800906e: d10d bne.n 800908c <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
8009070: 6878 ldr r0, [r7, #4]
8009072: f000 fd53 bl 8009b1c <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8009076: e009 b.n 800908c <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
8009078: 6839 ldr r1, [r7, #0]
800907a: 6878 ldr r0, [r7, #4]
800907c: f000 fc86 bl 800998c <USBD_CtlError>
break;
8009080: e004 b.n 800908c <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
8009082: 6839 ldr r1, [r7, #0]
8009084: 6878 ldr r0, [r7, #4]
8009086: f000 fc81 bl 800998c <USBD_CtlError>
break;
800908a: e000 b.n 800908e <USBD_StdItfReq+0x7a>
break;
800908c: bf00 nop
}
break;
800908e: e004 b.n 800909a <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
8009090: 6839 ldr r1, [r7, #0]
8009092: 6878 ldr r0, [r7, #4]
8009094: f000 fc7a bl 800998c <USBD_CtlError>
break;
8009098: bf00 nop
}
return USBD_OK;
800909a: 2300 movs r3, #0
}
800909c: 4618 mov r0, r3
800909e: 3710 adds r7, #16
80090a0: 46bd mov sp, r7
80090a2: bd80 pop {r7, pc}
080090a4 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80090a4: b580 push {r7, lr}
80090a6: b084 sub sp, #16
80090a8: af00 add r7, sp, #0
80090aa: 6078 str r0, [r7, #4]
80090ac: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
80090ae: 2300 movs r3, #0
80090b0: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
80090b2: 683b ldr r3, [r7, #0]
80090b4: 889b ldrh r3, [r3, #4]
80090b6: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
80090b8: 683b ldr r3, [r7, #0]
80090ba: 781b ldrb r3, [r3, #0]
80090bc: f003 0360 and.w r3, r3, #96 @ 0x60
80090c0: 2b40 cmp r3, #64 @ 0x40
80090c2: d007 beq.n 80090d4 <USBD_StdEPReq+0x30>
80090c4: 2b40 cmp r3, #64 @ 0x40
80090c6: f200 8146 bhi.w 8009356 <USBD_StdEPReq+0x2b2>
80090ca: 2b00 cmp r3, #0
80090cc: d00a beq.n 80090e4 <USBD_StdEPReq+0x40>
80090ce: 2b20 cmp r3, #32
80090d0: f040 8141 bne.w 8009356 <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
80090d4: 687b ldr r3, [r7, #4]
80090d6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80090da: 689b ldr r3, [r3, #8]
80090dc: 6839 ldr r1, [r7, #0]
80090de: 6878 ldr r0, [r7, #4]
80090e0: 4798 blx r3
break;
80090e2: e13d b.n 8009360 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
80090e4: 683b ldr r3, [r7, #0]
80090e6: 781b ldrb r3, [r3, #0]
80090e8: f003 0360 and.w r3, r3, #96 @ 0x60
80090ec: 2b20 cmp r3, #32
80090ee: d10a bne.n 8009106 <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
80090f0: 687b ldr r3, [r7, #4]
80090f2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80090f6: 689b ldr r3, [r3, #8]
80090f8: 6839 ldr r1, [r7, #0]
80090fa: 6878 ldr r0, [r7, #4]
80090fc: 4798 blx r3
80090fe: 4603 mov r3, r0
8009100: 73fb strb r3, [r7, #15]
return ret;
8009102: 7bfb ldrb r3, [r7, #15]
8009104: e12d b.n 8009362 <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
8009106: 683b ldr r3, [r7, #0]
8009108: 785b ldrb r3, [r3, #1]
800910a: 2b03 cmp r3, #3
800910c: d007 beq.n 800911e <USBD_StdEPReq+0x7a>
800910e: 2b03 cmp r3, #3
8009110: f300 811b bgt.w 800934a <USBD_StdEPReq+0x2a6>
8009114: 2b00 cmp r3, #0
8009116: d072 beq.n 80091fe <USBD_StdEPReq+0x15a>
8009118: 2b01 cmp r3, #1
800911a: d03a beq.n 8009192 <USBD_StdEPReq+0xee>
800911c: e115 b.n 800934a <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800911e: 687b ldr r3, [r7, #4]
8009120: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009124: 2b02 cmp r3, #2
8009126: d002 beq.n 800912e <USBD_StdEPReq+0x8a>
8009128: 2b03 cmp r3, #3
800912a: d015 beq.n 8009158 <USBD_StdEPReq+0xb4>
800912c: e02b b.n 8009186 <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800912e: 7bbb ldrb r3, [r7, #14]
8009130: 2b00 cmp r3, #0
8009132: d00c beq.n 800914e <USBD_StdEPReq+0xaa>
8009134: 7bbb ldrb r3, [r7, #14]
8009136: 2b80 cmp r3, #128 @ 0x80
8009138: d009 beq.n 800914e <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800913a: 7bbb ldrb r3, [r7, #14]
800913c: 4619 mov r1, r3
800913e: 6878 ldr r0, [r7, #4]
8009140: f001 f8fe bl 800a340 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8009144: 2180 movs r1, #128 @ 0x80
8009146: 6878 ldr r0, [r7, #4]
8009148: f001 f8fa bl 800a340 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800914c: e020 b.n 8009190 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800914e: 6839 ldr r1, [r7, #0]
8009150: 6878 ldr r0, [r7, #4]
8009152: f000 fc1b bl 800998c <USBD_CtlError>
break;
8009156: e01b b.n 8009190 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8009158: 683b ldr r3, [r7, #0]
800915a: 885b ldrh r3, [r3, #2]
800915c: 2b00 cmp r3, #0
800915e: d10e bne.n 800917e <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
8009160: 7bbb ldrb r3, [r7, #14]
8009162: 2b00 cmp r3, #0
8009164: d00b beq.n 800917e <USBD_StdEPReq+0xda>
8009166: 7bbb ldrb r3, [r7, #14]
8009168: 2b80 cmp r3, #128 @ 0x80
800916a: d008 beq.n 800917e <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800916c: 683b ldr r3, [r7, #0]
800916e: 88db ldrh r3, [r3, #6]
8009170: 2b00 cmp r3, #0
8009172: d104 bne.n 800917e <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
8009174: 7bbb ldrb r3, [r7, #14]
8009176: 4619 mov r1, r3
8009178: 6878 ldr r0, [r7, #4]
800917a: f001 f8e1 bl 800a340 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800917e: 6878 ldr r0, [r7, #4]
8009180: f000 fccc bl 8009b1c <USBD_CtlSendStatus>
break;
8009184: e004 b.n 8009190 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
8009186: 6839 ldr r1, [r7, #0]
8009188: 6878 ldr r0, [r7, #4]
800918a: f000 fbff bl 800998c <USBD_CtlError>
break;
800918e: bf00 nop
}
break;
8009190: e0e0 b.n 8009354 <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
8009192: 687b ldr r3, [r7, #4]
8009194: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009198: 2b02 cmp r3, #2
800919a: d002 beq.n 80091a2 <USBD_StdEPReq+0xfe>
800919c: 2b03 cmp r3, #3
800919e: d015 beq.n 80091cc <USBD_StdEPReq+0x128>
80091a0: e026 b.n 80091f0 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
80091a2: 7bbb ldrb r3, [r7, #14]
80091a4: 2b00 cmp r3, #0
80091a6: d00c beq.n 80091c2 <USBD_StdEPReq+0x11e>
80091a8: 7bbb ldrb r3, [r7, #14]
80091aa: 2b80 cmp r3, #128 @ 0x80
80091ac: d009 beq.n 80091c2 <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
80091ae: 7bbb ldrb r3, [r7, #14]
80091b0: 4619 mov r1, r3
80091b2: 6878 ldr r0, [r7, #4]
80091b4: f001 f8c4 bl 800a340 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
80091b8: 2180 movs r1, #128 @ 0x80
80091ba: 6878 ldr r0, [r7, #4]
80091bc: f001 f8c0 bl 800a340 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
80091c0: e01c b.n 80091fc <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
80091c2: 6839 ldr r1, [r7, #0]
80091c4: 6878 ldr r0, [r7, #4]
80091c6: f000 fbe1 bl 800998c <USBD_CtlError>
break;
80091ca: e017 b.n 80091fc <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
80091cc: 683b ldr r3, [r7, #0]
80091ce: 885b ldrh r3, [r3, #2]
80091d0: 2b00 cmp r3, #0
80091d2: d112 bne.n 80091fa <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
80091d4: 7bbb ldrb r3, [r7, #14]
80091d6: f003 037f and.w r3, r3, #127 @ 0x7f
80091da: 2b00 cmp r3, #0
80091dc: d004 beq.n 80091e8 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
80091de: 7bbb ldrb r3, [r7, #14]
80091e0: 4619 mov r1, r3
80091e2: 6878 ldr r0, [r7, #4]
80091e4: f001 f8cb bl 800a37e <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
80091e8: 6878 ldr r0, [r7, #4]
80091ea: f000 fc97 bl 8009b1c <USBD_CtlSendStatus>
}
break;
80091ee: e004 b.n 80091fa <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
80091f0: 6839 ldr r1, [r7, #0]
80091f2: 6878 ldr r0, [r7, #4]
80091f4: f000 fbca bl 800998c <USBD_CtlError>
break;
80091f8: e000 b.n 80091fc <USBD_StdEPReq+0x158>
break;
80091fa: bf00 nop
}
break;
80091fc: e0aa b.n 8009354 <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
80091fe: 687b ldr r3, [r7, #4]
8009200: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009204: 2b02 cmp r3, #2
8009206: d002 beq.n 800920e <USBD_StdEPReq+0x16a>
8009208: 2b03 cmp r3, #3
800920a: d032 beq.n 8009272 <USBD_StdEPReq+0x1ce>
800920c: e097 b.n 800933e <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800920e: 7bbb ldrb r3, [r7, #14]
8009210: 2b00 cmp r3, #0
8009212: d007 beq.n 8009224 <USBD_StdEPReq+0x180>
8009214: 7bbb ldrb r3, [r7, #14]
8009216: 2b80 cmp r3, #128 @ 0x80
8009218: d004 beq.n 8009224 <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
800921a: 6839 ldr r1, [r7, #0]
800921c: 6878 ldr r0, [r7, #4]
800921e: f000 fbb5 bl 800998c <USBD_CtlError>
break;
8009222: e091 b.n 8009348 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8009224: f997 300e ldrsb.w r3, [r7, #14]
8009228: 2b00 cmp r3, #0
800922a: da0b bge.n 8009244 <USBD_StdEPReq+0x1a0>
800922c: 7bbb ldrb r3, [r7, #14]
800922e: f003 027f and.w r2, r3, #127 @ 0x7f
8009232: 4613 mov r3, r2
8009234: 009b lsls r3, r3, #2
8009236: 4413 add r3, r2
8009238: 009b lsls r3, r3, #2
800923a: 3310 adds r3, #16
800923c: 687a ldr r2, [r7, #4]
800923e: 4413 add r3, r2
8009240: 3304 adds r3, #4
8009242: e00b b.n 800925c <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
8009244: 7bbb ldrb r3, [r7, #14]
8009246: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800924a: 4613 mov r3, r2
800924c: 009b lsls r3, r3, #2
800924e: 4413 add r3, r2
8009250: 009b lsls r3, r3, #2
8009252: f503 73a8 add.w r3, r3, #336 @ 0x150
8009256: 687a ldr r2, [r7, #4]
8009258: 4413 add r3, r2
800925a: 3304 adds r3, #4
800925c: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800925e: 68bb ldr r3, [r7, #8]
8009260: 2200 movs r2, #0
8009262: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8009264: 68bb ldr r3, [r7, #8]
8009266: 2202 movs r2, #2
8009268: 4619 mov r1, r3
800926a: 6878 ldr r0, [r7, #4]
800926c: f000 fbf8 bl 8009a60 <USBD_CtlSendData>
break;
8009270: e06a b.n 8009348 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
8009272: f997 300e ldrsb.w r3, [r7, #14]
8009276: 2b00 cmp r3, #0
8009278: da11 bge.n 800929e <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800927a: 7bbb ldrb r3, [r7, #14]
800927c: f003 020f and.w r2, r3, #15
8009280: 6879 ldr r1, [r7, #4]
8009282: 4613 mov r3, r2
8009284: 009b lsls r3, r3, #2
8009286: 4413 add r3, r2
8009288: 009b lsls r3, r3, #2
800928a: 440b add r3, r1
800928c: 3318 adds r3, #24
800928e: 681b ldr r3, [r3, #0]
8009290: 2b00 cmp r3, #0
8009292: d117 bne.n 80092c4 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8009294: 6839 ldr r1, [r7, #0]
8009296: 6878 ldr r0, [r7, #4]
8009298: f000 fb78 bl 800998c <USBD_CtlError>
break;
800929c: e054 b.n 8009348 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800929e: 7bbb ldrb r3, [r7, #14]
80092a0: f003 020f and.w r2, r3, #15
80092a4: 6879 ldr r1, [r7, #4]
80092a6: 4613 mov r3, r2
80092a8: 009b lsls r3, r3, #2
80092aa: 4413 add r3, r2
80092ac: 009b lsls r3, r3, #2
80092ae: 440b add r3, r1
80092b0: f503 73ac add.w r3, r3, #344 @ 0x158
80092b4: 681b ldr r3, [r3, #0]
80092b6: 2b00 cmp r3, #0
80092b8: d104 bne.n 80092c4 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
80092ba: 6839 ldr r1, [r7, #0]
80092bc: 6878 ldr r0, [r7, #4]
80092be: f000 fb65 bl 800998c <USBD_CtlError>
break;
80092c2: e041 b.n 8009348 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
80092c4: f997 300e ldrsb.w r3, [r7, #14]
80092c8: 2b00 cmp r3, #0
80092ca: da0b bge.n 80092e4 <USBD_StdEPReq+0x240>
80092cc: 7bbb ldrb r3, [r7, #14]
80092ce: f003 027f and.w r2, r3, #127 @ 0x7f
80092d2: 4613 mov r3, r2
80092d4: 009b lsls r3, r3, #2
80092d6: 4413 add r3, r2
80092d8: 009b lsls r3, r3, #2
80092da: 3310 adds r3, #16
80092dc: 687a ldr r2, [r7, #4]
80092de: 4413 add r3, r2
80092e0: 3304 adds r3, #4
80092e2: e00b b.n 80092fc <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
80092e4: 7bbb ldrb r3, [r7, #14]
80092e6: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
80092ea: 4613 mov r3, r2
80092ec: 009b lsls r3, r3, #2
80092ee: 4413 add r3, r2
80092f0: 009b lsls r3, r3, #2
80092f2: f503 73a8 add.w r3, r3, #336 @ 0x150
80092f6: 687a ldr r2, [r7, #4]
80092f8: 4413 add r3, r2
80092fa: 3304 adds r3, #4
80092fc: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
80092fe: 7bbb ldrb r3, [r7, #14]
8009300: 2b00 cmp r3, #0
8009302: d002 beq.n 800930a <USBD_StdEPReq+0x266>
8009304: 7bbb ldrb r3, [r7, #14]
8009306: 2b80 cmp r3, #128 @ 0x80
8009308: d103 bne.n 8009312 <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
800930a: 68bb ldr r3, [r7, #8]
800930c: 2200 movs r2, #0
800930e: 601a str r2, [r3, #0]
8009310: e00e b.n 8009330 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
8009312: 7bbb ldrb r3, [r7, #14]
8009314: 4619 mov r1, r3
8009316: 6878 ldr r0, [r7, #4]
8009318: f001 f850 bl 800a3bc <USBD_LL_IsStallEP>
800931c: 4603 mov r3, r0
800931e: 2b00 cmp r3, #0
8009320: d003 beq.n 800932a <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
8009322: 68bb ldr r3, [r7, #8]
8009324: 2201 movs r2, #1
8009326: 601a str r2, [r3, #0]
8009328: e002 b.n 8009330 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
800932a: 68bb ldr r3, [r7, #8]
800932c: 2200 movs r2, #0
800932e: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
8009330: 68bb ldr r3, [r7, #8]
8009332: 2202 movs r2, #2
8009334: 4619 mov r1, r3
8009336: 6878 ldr r0, [r7, #4]
8009338: f000 fb92 bl 8009a60 <USBD_CtlSendData>
break;
800933c: e004 b.n 8009348 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800933e: 6839 ldr r1, [r7, #0]
8009340: 6878 ldr r0, [r7, #4]
8009342: f000 fb23 bl 800998c <USBD_CtlError>
break;
8009346: bf00 nop
}
break;
8009348: e004 b.n 8009354 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
800934a: 6839 ldr r1, [r7, #0]
800934c: 6878 ldr r0, [r7, #4]
800934e: f000 fb1d bl 800998c <USBD_CtlError>
break;
8009352: bf00 nop
}
break;
8009354: e004 b.n 8009360 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
8009356: 6839 ldr r1, [r7, #0]
8009358: 6878 ldr r0, [r7, #4]
800935a: f000 fb17 bl 800998c <USBD_CtlError>
break;
800935e: bf00 nop
}
return ret;
8009360: 7bfb ldrb r3, [r7, #15]
}
8009362: 4618 mov r0, r3
8009364: 3710 adds r7, #16
8009366: 46bd mov sp, r7
8009368: bd80 pop {r7, pc}
...
0800936c <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800936c: b580 push {r7, lr}
800936e: b084 sub sp, #16
8009370: af00 add r7, sp, #0
8009372: 6078 str r0, [r7, #4]
8009374: 6039 str r1, [r7, #0]
uint16_t len = 0U;
8009376: 2300 movs r3, #0
8009378: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800937a: 2300 movs r3, #0
800937c: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800937e: 2300 movs r3, #0
8009380: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
8009382: 683b ldr r3, [r7, #0]
8009384: 885b ldrh r3, [r3, #2]
8009386: 0a1b lsrs r3, r3, #8
8009388: b29b uxth r3, r3
800938a: 3b01 subs r3, #1
800938c: 2b06 cmp r3, #6
800938e: f200 8128 bhi.w 80095e2 <USBD_GetDescriptor+0x276>
8009392: a201 add r2, pc, #4 @ (adr r2, 8009398 <USBD_GetDescriptor+0x2c>)
8009394: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009398: 080093b5 .word 0x080093b5
800939c: 080093cd .word 0x080093cd
80093a0: 0800940d .word 0x0800940d
80093a4: 080095e3 .word 0x080095e3
80093a8: 080095e3 .word 0x080095e3
80093ac: 08009583 .word 0x08009583
80093b0: 080095af .word 0x080095af
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
80093b4: 687b ldr r3, [r7, #4]
80093b6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80093ba: 681b ldr r3, [r3, #0]
80093bc: 687a ldr r2, [r7, #4]
80093be: 7c12 ldrb r2, [r2, #16]
80093c0: f107 0108 add.w r1, r7, #8
80093c4: 4610 mov r0, r2
80093c6: 4798 blx r3
80093c8: 60f8 str r0, [r7, #12]
break;
80093ca: e112 b.n 80095f2 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80093cc: 687b ldr r3, [r7, #4]
80093ce: 7c1b ldrb r3, [r3, #16]
80093d0: 2b00 cmp r3, #0
80093d2: d10d bne.n 80093f0 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
80093d4: 687b ldr r3, [r7, #4]
80093d6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80093da: 6a9b ldr r3, [r3, #40] @ 0x28
80093dc: f107 0208 add.w r2, r7, #8
80093e0: 4610 mov r0, r2
80093e2: 4798 blx r3
80093e4: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
80093e6: 68fb ldr r3, [r7, #12]
80093e8: 3301 adds r3, #1
80093ea: 2202 movs r2, #2
80093ec: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
80093ee: e100 b.n 80095f2 <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
80093f0: 687b ldr r3, [r7, #4]
80093f2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80093f6: 6adb ldr r3, [r3, #44] @ 0x2c
80093f8: f107 0208 add.w r2, r7, #8
80093fc: 4610 mov r0, r2
80093fe: 4798 blx r3
8009400: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
8009402: 68fb ldr r3, [r7, #12]
8009404: 3301 adds r3, #1
8009406: 2202 movs r2, #2
8009408: 701a strb r2, [r3, #0]
break;
800940a: e0f2 b.n 80095f2 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800940c: 683b ldr r3, [r7, #0]
800940e: 885b ldrh r3, [r3, #2]
8009410: b2db uxtb r3, r3
8009412: 2b05 cmp r3, #5
8009414: f200 80ac bhi.w 8009570 <USBD_GetDescriptor+0x204>
8009418: a201 add r2, pc, #4 @ (adr r2, 8009420 <USBD_GetDescriptor+0xb4>)
800941a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800941e: bf00 nop
8009420: 08009439 .word 0x08009439
8009424: 0800946d .word 0x0800946d
8009428: 080094a1 .word 0x080094a1
800942c: 080094d5 .word 0x080094d5
8009430: 08009509 .word 0x08009509
8009434: 0800953d .word 0x0800953d
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
8009438: 687b ldr r3, [r7, #4]
800943a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800943e: 685b ldr r3, [r3, #4]
8009440: 2b00 cmp r3, #0
8009442: d00b beq.n 800945c <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
8009444: 687b ldr r3, [r7, #4]
8009446: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800944a: 685b ldr r3, [r3, #4]
800944c: 687a ldr r2, [r7, #4]
800944e: 7c12 ldrb r2, [r2, #16]
8009450: f107 0108 add.w r1, r7, #8
8009454: 4610 mov r0, r2
8009456: 4798 blx r3
8009458: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800945a: e091 b.n 8009580 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800945c: 6839 ldr r1, [r7, #0]
800945e: 6878 ldr r0, [r7, #4]
8009460: f000 fa94 bl 800998c <USBD_CtlError>
err++;
8009464: 7afb ldrb r3, [r7, #11]
8009466: 3301 adds r3, #1
8009468: 72fb strb r3, [r7, #11]
break;
800946a: e089 b.n 8009580 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800946c: 687b ldr r3, [r7, #4]
800946e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8009472: 689b ldr r3, [r3, #8]
8009474: 2b00 cmp r3, #0
8009476: d00b beq.n 8009490 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
8009478: 687b ldr r3, [r7, #4]
800947a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800947e: 689b ldr r3, [r3, #8]
8009480: 687a ldr r2, [r7, #4]
8009482: 7c12 ldrb r2, [r2, #16]
8009484: f107 0108 add.w r1, r7, #8
8009488: 4610 mov r0, r2
800948a: 4798 blx r3
800948c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800948e: e077 b.n 8009580 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8009490: 6839 ldr r1, [r7, #0]
8009492: 6878 ldr r0, [r7, #4]
8009494: f000 fa7a bl 800998c <USBD_CtlError>
err++;
8009498: 7afb ldrb r3, [r7, #11]
800949a: 3301 adds r3, #1
800949c: 72fb strb r3, [r7, #11]
break;
800949e: e06f b.n 8009580 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
80094a0: 687b ldr r3, [r7, #4]
80094a2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80094a6: 68db ldr r3, [r3, #12]
80094a8: 2b00 cmp r3, #0
80094aa: d00b beq.n 80094c4 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
80094ac: 687b ldr r3, [r7, #4]
80094ae: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80094b2: 68db ldr r3, [r3, #12]
80094b4: 687a ldr r2, [r7, #4]
80094b6: 7c12 ldrb r2, [r2, #16]
80094b8: f107 0108 add.w r1, r7, #8
80094bc: 4610 mov r0, r2
80094be: 4798 blx r3
80094c0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80094c2: e05d b.n 8009580 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
80094c4: 6839 ldr r1, [r7, #0]
80094c6: 6878 ldr r0, [r7, #4]
80094c8: f000 fa60 bl 800998c <USBD_CtlError>
err++;
80094cc: 7afb ldrb r3, [r7, #11]
80094ce: 3301 adds r3, #1
80094d0: 72fb strb r3, [r7, #11]
break;
80094d2: e055 b.n 8009580 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
80094d4: 687b ldr r3, [r7, #4]
80094d6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80094da: 691b ldr r3, [r3, #16]
80094dc: 2b00 cmp r3, #0
80094de: d00b beq.n 80094f8 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
80094e0: 687b ldr r3, [r7, #4]
80094e2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80094e6: 691b ldr r3, [r3, #16]
80094e8: 687a ldr r2, [r7, #4]
80094ea: 7c12 ldrb r2, [r2, #16]
80094ec: f107 0108 add.w r1, r7, #8
80094f0: 4610 mov r0, r2
80094f2: 4798 blx r3
80094f4: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80094f6: e043 b.n 8009580 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
80094f8: 6839 ldr r1, [r7, #0]
80094fa: 6878 ldr r0, [r7, #4]
80094fc: f000 fa46 bl 800998c <USBD_CtlError>
err++;
8009500: 7afb ldrb r3, [r7, #11]
8009502: 3301 adds r3, #1
8009504: 72fb strb r3, [r7, #11]
break;
8009506: e03b b.n 8009580 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
8009508: 687b ldr r3, [r7, #4]
800950a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800950e: 695b ldr r3, [r3, #20]
8009510: 2b00 cmp r3, #0
8009512: d00b beq.n 800952c <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
8009514: 687b ldr r3, [r7, #4]
8009516: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800951a: 695b ldr r3, [r3, #20]
800951c: 687a ldr r2, [r7, #4]
800951e: 7c12 ldrb r2, [r2, #16]
8009520: f107 0108 add.w r1, r7, #8
8009524: 4610 mov r0, r2
8009526: 4798 blx r3
8009528: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800952a: e029 b.n 8009580 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800952c: 6839 ldr r1, [r7, #0]
800952e: 6878 ldr r0, [r7, #4]
8009530: f000 fa2c bl 800998c <USBD_CtlError>
err++;
8009534: 7afb ldrb r3, [r7, #11]
8009536: 3301 adds r3, #1
8009538: 72fb strb r3, [r7, #11]
break;
800953a: e021 b.n 8009580 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800953c: 687b ldr r3, [r7, #4]
800953e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8009542: 699b ldr r3, [r3, #24]
8009544: 2b00 cmp r3, #0
8009546: d00b beq.n 8009560 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
8009548: 687b ldr r3, [r7, #4]
800954a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800954e: 699b ldr r3, [r3, #24]
8009550: 687a ldr r2, [r7, #4]
8009552: 7c12 ldrb r2, [r2, #16]
8009554: f107 0108 add.w r1, r7, #8
8009558: 4610 mov r0, r2
800955a: 4798 blx r3
800955c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800955e: e00f b.n 8009580 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8009560: 6839 ldr r1, [r7, #0]
8009562: 6878 ldr r0, [r7, #4]
8009564: f000 fa12 bl 800998c <USBD_CtlError>
err++;
8009568: 7afb ldrb r3, [r7, #11]
800956a: 3301 adds r3, #1
800956c: 72fb strb r3, [r7, #11]
break;
800956e: e007 b.n 8009580 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
8009570: 6839 ldr r1, [r7, #0]
8009572: 6878 ldr r0, [r7, #4]
8009574: f000 fa0a bl 800998c <USBD_CtlError>
err++;
8009578: 7afb ldrb r3, [r7, #11]
800957a: 3301 adds r3, #1
800957c: 72fb strb r3, [r7, #11]
#endif
}
break;
800957e: e038 b.n 80095f2 <USBD_GetDescriptor+0x286>
8009580: e037 b.n 80095f2 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8009582: 687b ldr r3, [r7, #4]
8009584: 7c1b ldrb r3, [r3, #16]
8009586: 2b00 cmp r3, #0
8009588: d109 bne.n 800959e <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800958a: 687b ldr r3, [r7, #4]
800958c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8009590: 6b5b ldr r3, [r3, #52] @ 0x34
8009592: f107 0208 add.w r2, r7, #8
8009596: 4610 mov r0, r2
8009598: 4798 blx r3
800959a: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800959c: e029 b.n 80095f2 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800959e: 6839 ldr r1, [r7, #0]
80095a0: 6878 ldr r0, [r7, #4]
80095a2: f000 f9f3 bl 800998c <USBD_CtlError>
err++;
80095a6: 7afb ldrb r3, [r7, #11]
80095a8: 3301 adds r3, #1
80095aa: 72fb strb r3, [r7, #11]
break;
80095ac: e021 b.n 80095f2 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80095ae: 687b ldr r3, [r7, #4]
80095b0: 7c1b ldrb r3, [r3, #16]
80095b2: 2b00 cmp r3, #0
80095b4: d10d bne.n 80095d2 <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
80095b6: 687b ldr r3, [r7, #4]
80095b8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80095bc: 6b1b ldr r3, [r3, #48] @ 0x30
80095be: f107 0208 add.w r2, r7, #8
80095c2: 4610 mov r0, r2
80095c4: 4798 blx r3
80095c6: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
80095c8: 68fb ldr r3, [r7, #12]
80095ca: 3301 adds r3, #1
80095cc: 2207 movs r2, #7
80095ce: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80095d0: e00f b.n 80095f2 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
80095d2: 6839 ldr r1, [r7, #0]
80095d4: 6878 ldr r0, [r7, #4]
80095d6: f000 f9d9 bl 800998c <USBD_CtlError>
err++;
80095da: 7afb ldrb r3, [r7, #11]
80095dc: 3301 adds r3, #1
80095de: 72fb strb r3, [r7, #11]
break;
80095e0: e007 b.n 80095f2 <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
80095e2: 6839 ldr r1, [r7, #0]
80095e4: 6878 ldr r0, [r7, #4]
80095e6: f000 f9d1 bl 800998c <USBD_CtlError>
err++;
80095ea: 7afb ldrb r3, [r7, #11]
80095ec: 3301 adds r3, #1
80095ee: 72fb strb r3, [r7, #11]
break;
80095f0: bf00 nop
}
if (err != 0U)
80095f2: 7afb ldrb r3, [r7, #11]
80095f4: 2b00 cmp r3, #0
80095f6: d11c bne.n 8009632 <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
80095f8: 893b ldrh r3, [r7, #8]
80095fa: 2b00 cmp r3, #0
80095fc: d011 beq.n 8009622 <USBD_GetDescriptor+0x2b6>
80095fe: 683b ldr r3, [r7, #0]
8009600: 88db ldrh r3, [r3, #6]
8009602: 2b00 cmp r3, #0
8009604: d00d beq.n 8009622 <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
8009606: 683b ldr r3, [r7, #0]
8009608: 88da ldrh r2, [r3, #6]
800960a: 893b ldrh r3, [r7, #8]
800960c: 4293 cmp r3, r2
800960e: bf28 it cs
8009610: 4613 movcs r3, r2
8009612: b29b uxth r3, r3
8009614: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
8009616: 893b ldrh r3, [r7, #8]
8009618: 461a mov r2, r3
800961a: 68f9 ldr r1, [r7, #12]
800961c: 6878 ldr r0, [r7, #4]
800961e: f000 fa1f bl 8009a60 <USBD_CtlSendData>
}
if (req->wLength == 0U)
8009622: 683b ldr r3, [r7, #0]
8009624: 88db ldrh r3, [r3, #6]
8009626: 2b00 cmp r3, #0
8009628: d104 bne.n 8009634 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800962a: 6878 ldr r0, [r7, #4]
800962c: f000 fa76 bl 8009b1c <USBD_CtlSendStatus>
8009630: e000 b.n 8009634 <USBD_GetDescriptor+0x2c8>
return;
8009632: bf00 nop
}
}
}
8009634: 3710 adds r7, #16
8009636: 46bd mov sp, r7
8009638: bd80 pop {r7, pc}
800963a: bf00 nop
0800963c <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800963c: b580 push {r7, lr}
800963e: b084 sub sp, #16
8009640: af00 add r7, sp, #0
8009642: 6078 str r0, [r7, #4]
8009644: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
8009646: 683b ldr r3, [r7, #0]
8009648: 889b ldrh r3, [r3, #4]
800964a: 2b00 cmp r3, #0
800964c: d130 bne.n 80096b0 <USBD_SetAddress+0x74>
800964e: 683b ldr r3, [r7, #0]
8009650: 88db ldrh r3, [r3, #6]
8009652: 2b00 cmp r3, #0
8009654: d12c bne.n 80096b0 <USBD_SetAddress+0x74>
8009656: 683b ldr r3, [r7, #0]
8009658: 885b ldrh r3, [r3, #2]
800965a: 2b7f cmp r3, #127 @ 0x7f
800965c: d828 bhi.n 80096b0 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800965e: 683b ldr r3, [r7, #0]
8009660: 885b ldrh r3, [r3, #2]
8009662: b2db uxtb r3, r3
8009664: f003 037f and.w r3, r3, #127 @ 0x7f
8009668: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800966a: 687b ldr r3, [r7, #4]
800966c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009670: 2b03 cmp r3, #3
8009672: d104 bne.n 800967e <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
8009674: 6839 ldr r1, [r7, #0]
8009676: 6878 ldr r0, [r7, #4]
8009678: f000 f988 bl 800998c <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800967c: e01d b.n 80096ba <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800967e: 687b ldr r3, [r7, #4]
8009680: 7bfa ldrb r2, [r7, #15]
8009682: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
8009686: 7bfb ldrb r3, [r7, #15]
8009688: 4619 mov r1, r3
800968a: 6878 ldr r0, [r7, #4]
800968c: f000 fec1 bl 800a412 <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
8009690: 6878 ldr r0, [r7, #4]
8009692: f000 fa43 bl 8009b1c <USBD_CtlSendStatus>
if (dev_addr != 0U)
8009696: 7bfb ldrb r3, [r7, #15]
8009698: 2b00 cmp r3, #0
800969a: d004 beq.n 80096a6 <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800969c: 687b ldr r3, [r7, #4]
800969e: 2202 movs r2, #2
80096a0: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80096a4: e009 b.n 80096ba <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
80096a6: 687b ldr r3, [r7, #4]
80096a8: 2201 movs r2, #1
80096aa: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80096ae: e004 b.n 80096ba <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
80096b0: 6839 ldr r1, [r7, #0]
80096b2: 6878 ldr r0, [r7, #4]
80096b4: f000 f96a bl 800998c <USBD_CtlError>
}
}
80096b8: bf00 nop
80096ba: bf00 nop
80096bc: 3710 adds r7, #16
80096be: 46bd mov sp, r7
80096c0: bd80 pop {r7, pc}
...
080096c4 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80096c4: b580 push {r7, lr}
80096c6: b082 sub sp, #8
80096c8: af00 add r7, sp, #0
80096ca: 6078 str r0, [r7, #4]
80096cc: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
80096ce: 683b ldr r3, [r7, #0]
80096d0: 885b ldrh r3, [r3, #2]
80096d2: b2da uxtb r2, r3
80096d4: 4b41 ldr r3, [pc, #260] @ (80097dc <USBD_SetConfig+0x118>)
80096d6: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
80096d8: 4b40 ldr r3, [pc, #256] @ (80097dc <USBD_SetConfig+0x118>)
80096da: 781b ldrb r3, [r3, #0]
80096dc: 2b01 cmp r3, #1
80096de: d904 bls.n 80096ea <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
80096e0: 6839 ldr r1, [r7, #0]
80096e2: 6878 ldr r0, [r7, #4]
80096e4: f000 f952 bl 800998c <USBD_CtlError>
80096e8: e075 b.n 80097d6 <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
80096ea: 687b ldr r3, [r7, #4]
80096ec: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80096f0: 2b02 cmp r3, #2
80096f2: d002 beq.n 80096fa <USBD_SetConfig+0x36>
80096f4: 2b03 cmp r3, #3
80096f6: d023 beq.n 8009740 <USBD_SetConfig+0x7c>
80096f8: e062 b.n 80097c0 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
80096fa: 4b38 ldr r3, [pc, #224] @ (80097dc <USBD_SetConfig+0x118>)
80096fc: 781b ldrb r3, [r3, #0]
80096fe: 2b00 cmp r3, #0
8009700: d01a beq.n 8009738 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
8009702: 4b36 ldr r3, [pc, #216] @ (80097dc <USBD_SetConfig+0x118>)
8009704: 781b ldrb r3, [r3, #0]
8009706: 461a mov r2, r3
8009708: 687b ldr r3, [r7, #4]
800970a: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800970c: 687b ldr r3, [r7, #4]
800970e: 2203 movs r2, #3
8009710: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8009714: 4b31 ldr r3, [pc, #196] @ (80097dc <USBD_SetConfig+0x118>)
8009716: 781b ldrb r3, [r3, #0]
8009718: 4619 mov r1, r3
800971a: 6878 ldr r0, [r7, #4]
800971c: f7ff f9e7 bl 8008aee <USBD_SetClassConfig>
8009720: 4603 mov r3, r0
8009722: 2b02 cmp r3, #2
8009724: d104 bne.n 8009730 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
8009726: 6839 ldr r1, [r7, #0]
8009728: 6878 ldr r0, [r7, #4]
800972a: f000 f92f bl 800998c <USBD_CtlError>
return;
800972e: e052 b.n 80097d6 <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
8009730: 6878 ldr r0, [r7, #4]
8009732: f000 f9f3 bl 8009b1c <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
8009736: e04e b.n 80097d6 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8009738: 6878 ldr r0, [r7, #4]
800973a: f000 f9ef bl 8009b1c <USBD_CtlSendStatus>
break;
800973e: e04a b.n 80097d6 <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
8009740: 4b26 ldr r3, [pc, #152] @ (80097dc <USBD_SetConfig+0x118>)
8009742: 781b ldrb r3, [r3, #0]
8009744: 2b00 cmp r3, #0
8009746: d112 bne.n 800976e <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8009748: 687b ldr r3, [r7, #4]
800974a: 2202 movs r2, #2
800974c: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
8009750: 4b22 ldr r3, [pc, #136] @ (80097dc <USBD_SetConfig+0x118>)
8009752: 781b ldrb r3, [r3, #0]
8009754: 461a mov r2, r3
8009756: 687b ldr r3, [r7, #4]
8009758: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800975a: 4b20 ldr r3, [pc, #128] @ (80097dc <USBD_SetConfig+0x118>)
800975c: 781b ldrb r3, [r3, #0]
800975e: 4619 mov r1, r3
8009760: 6878 ldr r0, [r7, #4]
8009762: f7ff f9e3 bl 8008b2c <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
8009766: 6878 ldr r0, [r7, #4]
8009768: f000 f9d8 bl 8009b1c <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800976c: e033 b.n 80097d6 <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800976e: 4b1b ldr r3, [pc, #108] @ (80097dc <USBD_SetConfig+0x118>)
8009770: 781b ldrb r3, [r3, #0]
8009772: 461a mov r2, r3
8009774: 687b ldr r3, [r7, #4]
8009776: 685b ldr r3, [r3, #4]
8009778: 429a cmp r2, r3
800977a: d01d beq.n 80097b8 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800977c: 687b ldr r3, [r7, #4]
800977e: 685b ldr r3, [r3, #4]
8009780: b2db uxtb r3, r3
8009782: 4619 mov r1, r3
8009784: 6878 ldr r0, [r7, #4]
8009786: f7ff f9d1 bl 8008b2c <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800978a: 4b14 ldr r3, [pc, #80] @ (80097dc <USBD_SetConfig+0x118>)
800978c: 781b ldrb r3, [r3, #0]
800978e: 461a mov r2, r3
8009790: 687b ldr r3, [r7, #4]
8009792: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8009794: 4b11 ldr r3, [pc, #68] @ (80097dc <USBD_SetConfig+0x118>)
8009796: 781b ldrb r3, [r3, #0]
8009798: 4619 mov r1, r3
800979a: 6878 ldr r0, [r7, #4]
800979c: f7ff f9a7 bl 8008aee <USBD_SetClassConfig>
80097a0: 4603 mov r3, r0
80097a2: 2b02 cmp r3, #2
80097a4: d104 bne.n 80097b0 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
80097a6: 6839 ldr r1, [r7, #0]
80097a8: 6878 ldr r0, [r7, #4]
80097aa: f000 f8ef bl 800998c <USBD_CtlError>
return;
80097ae: e012 b.n 80097d6 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80097b0: 6878 ldr r0, [r7, #4]
80097b2: f000 f9b3 bl 8009b1c <USBD_CtlSendStatus>
break;
80097b6: e00e b.n 80097d6 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80097b8: 6878 ldr r0, [r7, #4]
80097ba: f000 f9af bl 8009b1c <USBD_CtlSendStatus>
break;
80097be: e00a b.n 80097d6 <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
80097c0: 6839 ldr r1, [r7, #0]
80097c2: 6878 ldr r0, [r7, #4]
80097c4: f000 f8e2 bl 800998c <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
80097c8: 4b04 ldr r3, [pc, #16] @ (80097dc <USBD_SetConfig+0x118>)
80097ca: 781b ldrb r3, [r3, #0]
80097cc: 4619 mov r1, r3
80097ce: 6878 ldr r0, [r7, #4]
80097d0: f7ff f9ac bl 8008b2c <USBD_ClrClassConfig>
break;
80097d4: bf00 nop
}
}
}
80097d6: 3708 adds r7, #8
80097d8: 46bd mov sp, r7
80097da: bd80 pop {r7, pc}
80097dc: 200003d0 .word 0x200003d0
080097e0 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
80097e0: b580 push {r7, lr}
80097e2: b082 sub sp, #8
80097e4: af00 add r7, sp, #0
80097e6: 6078 str r0, [r7, #4]
80097e8: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
80097ea: 683b ldr r3, [r7, #0]
80097ec: 88db ldrh r3, [r3, #6]
80097ee: 2b01 cmp r3, #1
80097f0: d004 beq.n 80097fc <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
80097f2: 6839 ldr r1, [r7, #0]
80097f4: 6878 ldr r0, [r7, #4]
80097f6: f000 f8c9 bl 800998c <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
80097fa: e022 b.n 8009842 <USBD_GetConfig+0x62>
switch (pdev->dev_state)
80097fc: 687b ldr r3, [r7, #4]
80097fe: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8009802: 2b02 cmp r3, #2
8009804: dc02 bgt.n 800980c <USBD_GetConfig+0x2c>
8009806: 2b00 cmp r3, #0
8009808: dc03 bgt.n 8009812 <USBD_GetConfig+0x32>
800980a: e015 b.n 8009838 <USBD_GetConfig+0x58>
800980c: 2b03 cmp r3, #3
800980e: d00b beq.n 8009828 <USBD_GetConfig+0x48>
8009810: e012 b.n 8009838 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
8009812: 687b ldr r3, [r7, #4]
8009814: 2200 movs r2, #0
8009816: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
8009818: 687b ldr r3, [r7, #4]
800981a: 3308 adds r3, #8
800981c: 2201 movs r2, #1
800981e: 4619 mov r1, r3
8009820: 6878 ldr r0, [r7, #4]
8009822: f000 f91d bl 8009a60 <USBD_CtlSendData>
break;
8009826: e00c b.n 8009842 <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
8009828: 687b ldr r3, [r7, #4]
800982a: 3304 adds r3, #4
800982c: 2201 movs r2, #1
800982e: 4619 mov r1, r3
8009830: 6878 ldr r0, [r7, #4]
8009832: f000 f915 bl 8009a60 <USBD_CtlSendData>
break;
8009836: e004 b.n 8009842 <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
8009838: 6839 ldr r1, [r7, #0]
800983a: 6878 ldr r0, [r7, #4]
800983c: f000 f8a6 bl 800998c <USBD_CtlError>
break;
8009840: bf00 nop
}
8009842: bf00 nop
8009844: 3708 adds r7, #8
8009846: 46bd mov sp, r7
8009848: bd80 pop {r7, pc}
0800984a <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800984a: b580 push {r7, lr}
800984c: b082 sub sp, #8
800984e: af00 add r7, sp, #0
8009850: 6078 str r0, [r7, #4]
8009852: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8009854: 687b ldr r3, [r7, #4]
8009856: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800985a: 3b01 subs r3, #1
800985c: 2b02 cmp r3, #2
800985e: d81e bhi.n 800989e <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
8009860: 683b ldr r3, [r7, #0]
8009862: 88db ldrh r3, [r3, #6]
8009864: 2b02 cmp r3, #2
8009866: d004 beq.n 8009872 <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
8009868: 6839 ldr r1, [r7, #0]
800986a: 6878 ldr r0, [r7, #4]
800986c: f000 f88e bl 800998c <USBD_CtlError>
break;
8009870: e01a b.n 80098a8 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
8009872: 687b ldr r3, [r7, #4]
8009874: 2201 movs r2, #1
8009876: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
8009878: 687b ldr r3, [r7, #4]
800987a: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800987e: 2b00 cmp r3, #0
8009880: d005 beq.n 800988e <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
8009882: 687b ldr r3, [r7, #4]
8009884: 68db ldr r3, [r3, #12]
8009886: f043 0202 orr.w r2, r3, #2
800988a: 687b ldr r3, [r7, #4]
800988c: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800988e: 687b ldr r3, [r7, #4]
8009890: 330c adds r3, #12
8009892: 2202 movs r2, #2
8009894: 4619 mov r1, r3
8009896: 6878 ldr r0, [r7, #4]
8009898: f000 f8e2 bl 8009a60 <USBD_CtlSendData>
break;
800989c: e004 b.n 80098a8 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800989e: 6839 ldr r1, [r7, #0]
80098a0: 6878 ldr r0, [r7, #4]
80098a2: f000 f873 bl 800998c <USBD_CtlError>
break;
80098a6: bf00 nop
}
}
80098a8: bf00 nop
80098aa: 3708 adds r7, #8
80098ac: 46bd mov sp, r7
80098ae: bd80 pop {r7, pc}
080098b0 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80098b0: b580 push {r7, lr}
80098b2: b082 sub sp, #8
80098b4: af00 add r7, sp, #0
80098b6: 6078 str r0, [r7, #4]
80098b8: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
80098ba: 683b ldr r3, [r7, #0]
80098bc: 885b ldrh r3, [r3, #2]
80098be: 2b01 cmp r3, #1
80098c0: d106 bne.n 80098d0 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
80098c2: 687b ldr r3, [r7, #4]
80098c4: 2201 movs r2, #1
80098c6: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
80098ca: 6878 ldr r0, [r7, #4]
80098cc: f000 f926 bl 8009b1c <USBD_CtlSendStatus>
}
}
80098d0: bf00 nop
80098d2: 3708 adds r7, #8
80098d4: 46bd mov sp, r7
80098d6: bd80 pop {r7, pc}
080098d8 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80098d8: b580 push {r7, lr}
80098da: b082 sub sp, #8
80098dc: af00 add r7, sp, #0
80098de: 6078 str r0, [r7, #4]
80098e0: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
80098e2: 687b ldr r3, [r7, #4]
80098e4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80098e8: 3b01 subs r3, #1
80098ea: 2b02 cmp r3, #2
80098ec: d80b bhi.n 8009906 <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
80098ee: 683b ldr r3, [r7, #0]
80098f0: 885b ldrh r3, [r3, #2]
80098f2: 2b01 cmp r3, #1
80098f4: d10c bne.n 8009910 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
80098f6: 687b ldr r3, [r7, #4]
80098f8: 2200 movs r2, #0
80098fa: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
80098fe: 6878 ldr r0, [r7, #4]
8009900: f000 f90c bl 8009b1c <USBD_CtlSendStatus>
}
break;
8009904: e004 b.n 8009910 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
8009906: 6839 ldr r1, [r7, #0]
8009908: 6878 ldr r0, [r7, #4]
800990a: f000 f83f bl 800998c <USBD_CtlError>
break;
800990e: e000 b.n 8009912 <USBD_ClrFeature+0x3a>
break;
8009910: bf00 nop
}
}
8009912: bf00 nop
8009914: 3708 adds r7, #8
8009916: 46bd mov sp, r7
8009918: bd80 pop {r7, pc}
0800991a <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800991a: b480 push {r7}
800991c: b083 sub sp, #12
800991e: af00 add r7, sp, #0
8009920: 6078 str r0, [r7, #4]
8009922: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
8009924: 683b ldr r3, [r7, #0]
8009926: 781a ldrb r2, [r3, #0]
8009928: 687b ldr r3, [r7, #4]
800992a: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800992c: 683b ldr r3, [r7, #0]
800992e: 785a ldrb r2, [r3, #1]
8009930: 687b ldr r3, [r7, #4]
8009932: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
8009934: 683b ldr r3, [r7, #0]
8009936: 3302 adds r3, #2
8009938: 781b ldrb r3, [r3, #0]
800993a: 461a mov r2, r3
800993c: 683b ldr r3, [r7, #0]
800993e: 3303 adds r3, #3
8009940: 781b ldrb r3, [r3, #0]
8009942: 021b lsls r3, r3, #8
8009944: b29b uxth r3, r3
8009946: 4413 add r3, r2
8009948: b29a uxth r2, r3
800994a: 687b ldr r3, [r7, #4]
800994c: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800994e: 683b ldr r3, [r7, #0]
8009950: 3304 adds r3, #4
8009952: 781b ldrb r3, [r3, #0]
8009954: 461a mov r2, r3
8009956: 683b ldr r3, [r7, #0]
8009958: 3305 adds r3, #5
800995a: 781b ldrb r3, [r3, #0]
800995c: 021b lsls r3, r3, #8
800995e: b29b uxth r3, r3
8009960: 4413 add r3, r2
8009962: b29a uxth r2, r3
8009964: 687b ldr r3, [r7, #4]
8009966: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
8009968: 683b ldr r3, [r7, #0]
800996a: 3306 adds r3, #6
800996c: 781b ldrb r3, [r3, #0]
800996e: 461a mov r2, r3
8009970: 683b ldr r3, [r7, #0]
8009972: 3307 adds r3, #7
8009974: 781b ldrb r3, [r3, #0]
8009976: 021b lsls r3, r3, #8
8009978: b29b uxth r3, r3
800997a: 4413 add r3, r2
800997c: b29a uxth r2, r3
800997e: 687b ldr r3, [r7, #4]
8009980: 80da strh r2, [r3, #6]
}
8009982: bf00 nop
8009984: 370c adds r7, #12
8009986: 46bd mov sp, r7
8009988: bc80 pop {r7}
800998a: 4770 bx lr
0800998c <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800998c: b580 push {r7, lr}
800998e: b082 sub sp, #8
8009990: af00 add r7, sp, #0
8009992: 6078 str r0, [r7, #4]
8009994: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
8009996: 2180 movs r1, #128 @ 0x80
8009998: 6878 ldr r0, [r7, #4]
800999a: f000 fcd1 bl 800a340 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
800999e: 2100 movs r1, #0
80099a0: 6878 ldr r0, [r7, #4]
80099a2: f000 fccd bl 800a340 <USBD_LL_StallEP>
}
80099a6: bf00 nop
80099a8: 3708 adds r7, #8
80099aa: 46bd mov sp, r7
80099ac: bd80 pop {r7, pc}
080099ae <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
80099ae: b580 push {r7, lr}
80099b0: b086 sub sp, #24
80099b2: af00 add r7, sp, #0
80099b4: 60f8 str r0, [r7, #12]
80099b6: 60b9 str r1, [r7, #8]
80099b8: 607a str r2, [r7, #4]
uint8_t idx = 0U;
80099ba: 2300 movs r3, #0
80099bc: 75fb strb r3, [r7, #23]
if (desc != NULL)
80099be: 68fb ldr r3, [r7, #12]
80099c0: 2b00 cmp r3, #0
80099c2: d032 beq.n 8009a2a <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
80099c4: 68f8 ldr r0, [r7, #12]
80099c6: f000 f834 bl 8009a32 <USBD_GetLen>
80099ca: 4603 mov r3, r0
80099cc: 3301 adds r3, #1
80099ce: b29b uxth r3, r3
80099d0: 005b lsls r3, r3, #1
80099d2: b29a uxth r2, r3
80099d4: 687b ldr r3, [r7, #4]
80099d6: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
80099d8: 7dfb ldrb r3, [r7, #23]
80099da: 1c5a adds r2, r3, #1
80099dc: 75fa strb r2, [r7, #23]
80099de: 461a mov r2, r3
80099e0: 68bb ldr r3, [r7, #8]
80099e2: 4413 add r3, r2
80099e4: 687a ldr r2, [r7, #4]
80099e6: 7812 ldrb r2, [r2, #0]
80099e8: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
80099ea: 7dfb ldrb r3, [r7, #23]
80099ec: 1c5a adds r2, r3, #1
80099ee: 75fa strb r2, [r7, #23]
80099f0: 461a mov r2, r3
80099f2: 68bb ldr r3, [r7, #8]
80099f4: 4413 add r3, r2
80099f6: 2203 movs r2, #3
80099f8: 701a strb r2, [r3, #0]
while (*desc != '\0')
80099fa: e012 b.n 8009a22 <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
80099fc: 68fb ldr r3, [r7, #12]
80099fe: 1c5a adds r2, r3, #1
8009a00: 60fa str r2, [r7, #12]
8009a02: 7dfa ldrb r2, [r7, #23]
8009a04: 1c51 adds r1, r2, #1
8009a06: 75f9 strb r1, [r7, #23]
8009a08: 4611 mov r1, r2
8009a0a: 68ba ldr r2, [r7, #8]
8009a0c: 440a add r2, r1
8009a0e: 781b ldrb r3, [r3, #0]
8009a10: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
8009a12: 7dfb ldrb r3, [r7, #23]
8009a14: 1c5a adds r2, r3, #1
8009a16: 75fa strb r2, [r7, #23]
8009a18: 461a mov r2, r3
8009a1a: 68bb ldr r3, [r7, #8]
8009a1c: 4413 add r3, r2
8009a1e: 2200 movs r2, #0
8009a20: 701a strb r2, [r3, #0]
while (*desc != '\0')
8009a22: 68fb ldr r3, [r7, #12]
8009a24: 781b ldrb r3, [r3, #0]
8009a26: 2b00 cmp r3, #0
8009a28: d1e8 bne.n 80099fc <USBD_GetString+0x4e>
}
}
}
8009a2a: bf00 nop
8009a2c: 3718 adds r7, #24
8009a2e: 46bd mov sp, r7
8009a30: bd80 pop {r7, pc}
08009a32 <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
8009a32: b480 push {r7}
8009a34: b085 sub sp, #20
8009a36: af00 add r7, sp, #0
8009a38: 6078 str r0, [r7, #4]
uint8_t len = 0U;
8009a3a: 2300 movs r3, #0
8009a3c: 73fb strb r3, [r7, #15]
while (*buf != '\0')
8009a3e: e005 b.n 8009a4c <USBD_GetLen+0x1a>
{
len++;
8009a40: 7bfb ldrb r3, [r7, #15]
8009a42: 3301 adds r3, #1
8009a44: 73fb strb r3, [r7, #15]
buf++;
8009a46: 687b ldr r3, [r7, #4]
8009a48: 3301 adds r3, #1
8009a4a: 607b str r3, [r7, #4]
while (*buf != '\0')
8009a4c: 687b ldr r3, [r7, #4]
8009a4e: 781b ldrb r3, [r3, #0]
8009a50: 2b00 cmp r3, #0
8009a52: d1f5 bne.n 8009a40 <USBD_GetLen+0xe>
}
return len;
8009a54: 7bfb ldrb r3, [r7, #15]
}
8009a56: 4618 mov r0, r3
8009a58: 3714 adds r7, #20
8009a5a: 46bd mov sp, r7
8009a5c: bc80 pop {r7}
8009a5e: 4770 bx lr
08009a60 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009a60: b580 push {r7, lr}
8009a62: b084 sub sp, #16
8009a64: af00 add r7, sp, #0
8009a66: 60f8 str r0, [r7, #12]
8009a68: 60b9 str r1, [r7, #8]
8009a6a: 4613 mov r3, r2
8009a6c: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
8009a6e: 68fb ldr r3, [r7, #12]
8009a70: 2202 movs r2, #2
8009a72: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
8009a76: 88fa ldrh r2, [r7, #6]
8009a78: 68fb ldr r3, [r7, #12]
8009a7a: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
8009a7c: 88fa ldrh r2, [r7, #6]
8009a7e: 68fb ldr r3, [r7, #12]
8009a80: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8009a82: 88fb ldrh r3, [r7, #6]
8009a84: 68ba ldr r2, [r7, #8]
8009a86: 2100 movs r1, #0
8009a88: 68f8 ldr r0, [r7, #12]
8009a8a: f000 fce1 bl 800a450 <USBD_LL_Transmit>
return USBD_OK;
8009a8e: 2300 movs r3, #0
}
8009a90: 4618 mov r0, r3
8009a92: 3710 adds r7, #16
8009a94: 46bd mov sp, r7
8009a96: bd80 pop {r7, pc}
08009a98 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009a98: b580 push {r7, lr}
8009a9a: b084 sub sp, #16
8009a9c: af00 add r7, sp, #0
8009a9e: 60f8 str r0, [r7, #12]
8009aa0: 60b9 str r1, [r7, #8]
8009aa2: 4613 mov r3, r2
8009aa4: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8009aa6: 88fb ldrh r3, [r7, #6]
8009aa8: 68ba ldr r2, [r7, #8]
8009aaa: 2100 movs r1, #0
8009aac: 68f8 ldr r0, [r7, #12]
8009aae: f000 fccf bl 800a450 <USBD_LL_Transmit>
return USBD_OK;
8009ab2: 2300 movs r3, #0
}
8009ab4: 4618 mov r0, r3
8009ab6: 3710 adds r7, #16
8009ab8: 46bd mov sp, r7
8009aba: bd80 pop {r7, pc}
08009abc <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009abc: b580 push {r7, lr}
8009abe: b084 sub sp, #16
8009ac0: af00 add r7, sp, #0
8009ac2: 60f8 str r0, [r7, #12]
8009ac4: 60b9 str r1, [r7, #8]
8009ac6: 4613 mov r3, r2
8009ac8: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
8009aca: 68fb ldr r3, [r7, #12]
8009acc: 2203 movs r2, #3
8009ace: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
8009ad2: 88fa ldrh r2, [r7, #6]
8009ad4: 68fb ldr r3, [r7, #12]
8009ad6: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
8009ada: 88fa ldrh r2, [r7, #6]
8009adc: 68fb ldr r3, [r7, #12]
8009ade: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8009ae2: 88fb ldrh r3, [r7, #6]
8009ae4: 68ba ldr r2, [r7, #8]
8009ae6: 2100 movs r1, #0
8009ae8: 68f8 ldr r0, [r7, #12]
8009aea: f000 fcd4 bl 800a496 <USBD_LL_PrepareReceive>
return USBD_OK;
8009aee: 2300 movs r3, #0
}
8009af0: 4618 mov r0, r3
8009af2: 3710 adds r7, #16
8009af4: 46bd mov sp, r7
8009af6: bd80 pop {r7, pc}
08009af8 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8009af8: b580 push {r7, lr}
8009afa: b084 sub sp, #16
8009afc: af00 add r7, sp, #0
8009afe: 60f8 str r0, [r7, #12]
8009b00: 60b9 str r1, [r7, #8]
8009b02: 4613 mov r3, r2
8009b04: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8009b06: 88fb ldrh r3, [r7, #6]
8009b08: 68ba ldr r2, [r7, #8]
8009b0a: 2100 movs r1, #0
8009b0c: 68f8 ldr r0, [r7, #12]
8009b0e: f000 fcc2 bl 800a496 <USBD_LL_PrepareReceive>
return USBD_OK;
8009b12: 2300 movs r3, #0
}
8009b14: 4618 mov r0, r3
8009b16: 3710 adds r7, #16
8009b18: 46bd mov sp, r7
8009b1a: bd80 pop {r7, pc}
08009b1c <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
8009b1c: b580 push {r7, lr}
8009b1e: b082 sub sp, #8
8009b20: af00 add r7, sp, #0
8009b22: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
8009b24: 687b ldr r3, [r7, #4]
8009b26: 2204 movs r2, #4
8009b28: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
8009b2c: 2300 movs r3, #0
8009b2e: 2200 movs r2, #0
8009b30: 2100 movs r1, #0
8009b32: 6878 ldr r0, [r7, #4]
8009b34: f000 fc8c bl 800a450 <USBD_LL_Transmit>
return USBD_OK;
8009b38: 2300 movs r3, #0
}
8009b3a: 4618 mov r0, r3
8009b3c: 3708 adds r7, #8
8009b3e: 46bd mov sp, r7
8009b40: bd80 pop {r7, pc}
08009b42 <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
8009b42: b580 push {r7, lr}
8009b44: b082 sub sp, #8
8009b46: af00 add r7, sp, #0
8009b48: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
8009b4a: 687b ldr r3, [r7, #4]
8009b4c: 2205 movs r2, #5
8009b4e: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8009b52: 2300 movs r3, #0
8009b54: 2200 movs r2, #0
8009b56: 2100 movs r1, #0
8009b58: 6878 ldr r0, [r7, #4]
8009b5a: f000 fc9c bl 800a496 <USBD_LL_PrepareReceive>
return USBD_OK;
8009b5e: 2300 movs r3, #0
}
8009b60: 4618 mov r0, r3
8009b62: 3708 adds r7, #8
8009b64: 46bd mov sp, r7
8009b66: bd80 pop {r7, pc}
08009b68 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
8009b68: b580 push {r7, lr}
8009b6a: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
8009b6c: 2200 movs r2, #0
8009b6e: 4912 ldr r1, [pc, #72] @ (8009bb8 <MX_USB_DEVICE_Init+0x50>)
8009b70: 4812 ldr r0, [pc, #72] @ (8009bbc <MX_USB_DEVICE_Init+0x54>)
8009b72: f7fe ff62 bl 8008a3a <USBD_Init>
8009b76: 4603 mov r3, r0
8009b78: 2b00 cmp r3, #0
8009b7a: d001 beq.n 8009b80 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
8009b7c: f7f7 fc64 bl 8001448 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
8009b80: 490f ldr r1, [pc, #60] @ (8009bc0 <MX_USB_DEVICE_Init+0x58>)
8009b82: 480e ldr r0, [pc, #56] @ (8009bbc <MX_USB_DEVICE_Init+0x54>)
8009b84: f7fe ff84 bl 8008a90 <USBD_RegisterClass>
8009b88: 4603 mov r3, r0
8009b8a: 2b00 cmp r3, #0
8009b8c: d001 beq.n 8009b92 <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
8009b8e: f7f7 fc5b bl 8001448 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
8009b92: 490c ldr r1, [pc, #48] @ (8009bc4 <MX_USB_DEVICE_Init+0x5c>)
8009b94: 4809 ldr r0, [pc, #36] @ (8009bbc <MX_USB_DEVICE_Init+0x54>)
8009b96: f7fe feb5 bl 8008904 <USBD_CDC_RegisterInterface>
8009b9a: 4603 mov r3, r0
8009b9c: 2b00 cmp r3, #0
8009b9e: d001 beq.n 8009ba4 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
8009ba0: f7f7 fc52 bl 8001448 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
8009ba4: 4805 ldr r0, [pc, #20] @ (8009bbc <MX_USB_DEVICE_Init+0x54>)
8009ba6: f7fe ff8c bl 8008ac2 <USBD_Start>
8009baa: 4603 mov r3, r0
8009bac: 2b00 cmp r3, #0
8009bae: d001 beq.n 8009bb4 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
8009bb0: f7f7 fc4a bl 8001448 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
8009bb4: bf00 nop
8009bb6: bd80 pop {r7, pc}
8009bb8: 20000130 .word 0x20000130
8009bbc: 200003d4 .word 0x200003d4
8009bc0: 2000001c .word 0x2000001c
8009bc4: 20000120 .word 0x20000120
08009bc8 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
8009bc8: b480 push {r7}
8009bca: b085 sub sp, #20
8009bcc: af00 add r7, sp, #0
8009bce: 6078 str r0, [r7, #4]
8009bd0: 6039 str r1, [r7, #0]
while (len--) {
8009bd2: e01e b.n 8009c12 <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
8009bd4: 4b14 ldr r3, [pc, #80] @ (8009c28 <fifo_push+0x60>)
8009bd6: 881b ldrh r3, [r3, #0]
8009bd8: b29b uxth r3, r3
8009bda: 3301 adds r3, #1
8009bdc: b29b uxth r3, r3
8009bde: b2db uxtb r3, r3
8009be0: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
8009be2: 89fa ldrh r2, [r7, #14]
8009be4: 4b11 ldr r3, [pc, #68] @ (8009c2c <fifo_push+0x64>)
8009be6: 881b ldrh r3, [r3, #0]
8009be8: b29b uxth r3, r3
8009bea: b2db uxtb r3, r3
8009bec: 429a cmp r2, r3
8009bee: d103 bne.n 8009bf8 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
8009bf0: 687b ldr r3, [r7, #4]
8009bf2: 3301 adds r3, #1
8009bf4: 607b str r3, [r7, #4]
continue;
8009bf6: e00c b.n 8009c12 <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
8009bf8: 687b ldr r3, [r7, #4]
8009bfa: 1c5a adds r2, r3, #1
8009bfc: 607a str r2, [r7, #4]
8009bfe: 4a0a ldr r2, [pc, #40] @ (8009c28 <fifo_push+0x60>)
8009c00: 8812 ldrh r2, [r2, #0]
8009c02: b292 uxth r2, r2
8009c04: b2d2 uxtb r2, r2
8009c06: 7819 ldrb r1, [r3, #0]
8009c08: 4b09 ldr r3, [pc, #36] @ (8009c30 <fifo_push+0x68>)
8009c0a: 5499 strb r1, [r3, r2]
rx_head = next;
8009c0c: 4a06 ldr r2, [pc, #24] @ (8009c28 <fifo_push+0x60>)
8009c0e: 89fb ldrh r3, [r7, #14]
8009c10: 8013 strh r3, [r2, #0]
while (len--) {
8009c12: 683b ldr r3, [r7, #0]
8009c14: 1e5a subs r2, r3, #1
8009c16: 603a str r2, [r7, #0]
8009c18: 2b00 cmp r3, #0
8009c1a: d1db bne.n 8009bd4 <fifo_push+0xc>
}
}
8009c1c: bf00 nop
8009c1e: bf00 nop
8009c20: 3714 adds r7, #20
8009c22: 46bd mov sp, r7
8009c24: bc80 pop {r7}
8009c26: 4770 bx lr
8009c28: 20000f98 .word 0x20000f98
8009c2c: 20000f9a .word 0x20000f9a
8009c30: 20000e98 .word 0x20000e98
08009c34 <CDC_Available>:
uint32_t CDC_Available(void) {
8009c34: b480 push {r7}
8009c36: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
8009c38: 4b06 ldr r3, [pc, #24] @ (8009c54 <CDC_Available+0x20>)
8009c3a: 881b ldrh r3, [r3, #0]
8009c3c: b29a uxth r2, r3
8009c3e: 4b06 ldr r3, [pc, #24] @ (8009c58 <CDC_Available+0x24>)
8009c40: 881b ldrh r3, [r3, #0]
8009c42: b29b uxth r3, r3
8009c44: 1ad3 subs r3, r2, r3
8009c46: b29b uxth r3, r3
8009c48: b2db uxtb r3, r3
}
8009c4a: 4618 mov r0, r3
8009c4c: 46bd mov sp, r7
8009c4e: bc80 pop {r7}
8009c50: 4770 bx lr
8009c52: bf00 nop
8009c54: 20000f98 .word 0x20000f98
8009c58: 20000f9a .word 0x20000f9a
08009c5c <CDC_ReadByte>:
int CDC_ReadByte(void) {
8009c5c: b480 push {r7}
8009c5e: b083 sub sp, #12
8009c60: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
8009c62: 4b10 ldr r3, [pc, #64] @ (8009ca4 <CDC_ReadByte+0x48>)
8009c64: 881b ldrh r3, [r3, #0]
8009c66: b29a uxth r2, r3
8009c68: 4b0f ldr r3, [pc, #60] @ (8009ca8 <CDC_ReadByte+0x4c>)
8009c6a: 881b ldrh r3, [r3, #0]
8009c6c: b29b uxth r3, r3
8009c6e: 429a cmp r2, r3
8009c70: d102 bne.n 8009c78 <CDC_ReadByte+0x1c>
8009c72: f04f 33ff mov.w r3, #4294967295
8009c76: e010 b.n 8009c9a <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
8009c78: 4b0a ldr r3, [pc, #40] @ (8009ca4 <CDC_ReadByte+0x48>)
8009c7a: 881b ldrh r3, [r3, #0]
8009c7c: b29b uxth r3, r3
8009c7e: b2db uxtb r3, r3
8009c80: 4a0a ldr r2, [pc, #40] @ (8009cac <CDC_ReadByte+0x50>)
8009c82: 5cd3 ldrb r3, [r2, r3]
8009c84: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
8009c86: 4b07 ldr r3, [pc, #28] @ (8009ca4 <CDC_ReadByte+0x48>)
8009c88: 881b ldrh r3, [r3, #0]
8009c8a: b29b uxth r3, r3
8009c8c: 3301 adds r3, #1
8009c8e: b29b uxth r3, r3
8009c90: b2db uxtb r3, r3
8009c92: b29a uxth r2, r3
8009c94: 4b03 ldr r3, [pc, #12] @ (8009ca4 <CDC_ReadByte+0x48>)
8009c96: 801a strh r2, [r3, #0]
return b;
8009c98: 687b ldr r3, [r7, #4]
}
8009c9a: 4618 mov r0, r3
8009c9c: 370c adds r7, #12
8009c9e: 46bd mov sp, r7
8009ca0: bc80 pop {r7}
8009ca2: 4770 bx lr
8009ca4: 20000f9a .word 0x20000f9a
8009ca8: 20000f98 .word 0x20000f98
8009cac: 20000e98 .word 0x20000e98
08009cb0 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
8009cb0: b580 push {r7, lr}
8009cb2: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
8009cb4: 2200 movs r2, #0
8009cb6: 4905 ldr r1, [pc, #20] @ (8009ccc <CDC_Init_FS+0x1c>)
8009cb8: 4805 ldr r0, [pc, #20] @ (8009cd0 <CDC_Init_FS+0x20>)
8009cba: f7fe fe39 bl 8008930 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
8009cbe: 4905 ldr r1, [pc, #20] @ (8009cd4 <CDC_Init_FS+0x24>)
8009cc0: 4803 ldr r0, [pc, #12] @ (8009cd0 <CDC_Init_FS+0x20>)
8009cc2: f7fe fe4e bl 8008962 <USBD_CDC_SetRxBuffer>
return (USBD_OK);
8009cc6: 2300 movs r3, #0
/* USER CODE END 3 */
}
8009cc8: 4618 mov r0, r3
8009cca: bd80 pop {r7, pc}
8009ccc: 20000a98 .word 0x20000a98
8009cd0: 200003d4 .word 0x200003d4
8009cd4: 20000698 .word 0x20000698
08009cd8 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
8009cd8: b480 push {r7}
8009cda: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
8009cdc: 2300 movs r3, #0
/* USER CODE END 4 */
}
8009cde: 4618 mov r0, r3
8009ce0: 46bd mov sp, r7
8009ce2: bc80 pop {r7}
8009ce4: 4770 bx lr
...
08009ce8 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
8009ce8: b480 push {r7}
8009cea: b083 sub sp, #12
8009cec: af00 add r7, sp, #0
8009cee: 4603 mov r3, r0
8009cf0: 6039 str r1, [r7, #0]
8009cf2: 71fb strb r3, [r7, #7]
8009cf4: 4613 mov r3, r2
8009cf6: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
8009cf8: 79fb ldrb r3, [r7, #7]
8009cfa: 2b23 cmp r3, #35 @ 0x23
8009cfc: d84a bhi.n 8009d94 <CDC_Control_FS+0xac>
8009cfe: a201 add r2, pc, #4 @ (adr r2, 8009d04 <CDC_Control_FS+0x1c>)
8009d00: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009d04: 08009d95 .word 0x08009d95
8009d08: 08009d95 .word 0x08009d95
8009d0c: 08009d95 .word 0x08009d95
8009d10: 08009d95 .word 0x08009d95
8009d14: 08009d95 .word 0x08009d95
8009d18: 08009d95 .word 0x08009d95
8009d1c: 08009d95 .word 0x08009d95
8009d20: 08009d95 .word 0x08009d95
8009d24: 08009d95 .word 0x08009d95
8009d28: 08009d95 .word 0x08009d95
8009d2c: 08009d95 .word 0x08009d95
8009d30: 08009d95 .word 0x08009d95
8009d34: 08009d95 .word 0x08009d95
8009d38: 08009d95 .word 0x08009d95
8009d3c: 08009d95 .word 0x08009d95
8009d40: 08009d95 .word 0x08009d95
8009d44: 08009d95 .word 0x08009d95
8009d48: 08009d95 .word 0x08009d95
8009d4c: 08009d95 .word 0x08009d95
8009d50: 08009d95 .word 0x08009d95
8009d54: 08009d95 .word 0x08009d95
8009d58: 08009d95 .word 0x08009d95
8009d5c: 08009d95 .word 0x08009d95
8009d60: 08009d95 .word 0x08009d95
8009d64: 08009d95 .word 0x08009d95
8009d68: 08009d95 .word 0x08009d95
8009d6c: 08009d95 .word 0x08009d95
8009d70: 08009d95 .word 0x08009d95
8009d74: 08009d95 .word 0x08009d95
8009d78: 08009d95 .word 0x08009d95
8009d7c: 08009d95 .word 0x08009d95
8009d80: 08009d95 .word 0x08009d95
8009d84: 08009d95 .word 0x08009d95
8009d88: 08009d95 .word 0x08009d95
8009d8c: 08009d95 .word 0x08009d95
8009d90: 08009d95 .word 0x08009d95
case CDC_SEND_BREAK:
break;
default:
break;
8009d94: bf00 nop
}
return (USBD_OK);
8009d96: 2300 movs r3, #0
/* USER CODE END 5 */
}
8009d98: 4618 mov r0, r3
8009d9a: 370c adds r7, #12
8009d9c: 46bd mov sp, r7
8009d9e: bc80 pop {r7}
8009da0: 4770 bx lr
8009da2: bf00 nop
08009da4 <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
8009da4: b580 push {r7, lr}
8009da6: b082 sub sp, #8
8009da8: af00 add r7, sp, #0
8009daa: 6078 str r0, [r7, #4]
8009dac: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
8009dae: 683b ldr r3, [r7, #0]
8009db0: 681b ldr r3, [r3, #0]
8009db2: 2b00 cmp r3, #0
8009db4: d005 beq.n 8009dc2 <CDC_Receive_FS+0x1e>
8009db6: 683b ldr r3, [r7, #0]
8009db8: 681b ldr r3, [r3, #0]
8009dba: 4619 mov r1, r3
8009dbc: 6878 ldr r0, [r7, #4]
8009dbe: f7ff ff03 bl 8009bc8 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
8009dc2: 6879 ldr r1, [r7, #4]
8009dc4: 4805 ldr r0, [pc, #20] @ (8009ddc <CDC_Receive_FS+0x38>)
8009dc6: f7fe fdcc bl 8008962 <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
8009dca: 4804 ldr r0, [pc, #16] @ (8009ddc <CDC_Receive_FS+0x38>)
8009dcc: f7fe fe0b bl 80089e6 <USBD_CDC_ReceivePacket>
return (USBD_OK);
8009dd0: 2300 movs r3, #0
/* USER CODE END 6 */
}
8009dd2: 4618 mov r0, r3
8009dd4: 3708 adds r7, #8
8009dd6: 46bd mov sp, r7
8009dd8: bd80 pop {r7, pc}
8009dda: bf00 nop
8009ddc: 200003d4 .word 0x200003d4
08009de0 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
8009de0: b580 push {r7, lr}
8009de2: b084 sub sp, #16
8009de4: af00 add r7, sp, #0
8009de6: 6078 str r0, [r7, #4]
8009de8: 460b mov r3, r1
8009dea: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
8009dec: 2300 movs r3, #0
8009dee: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
8009df0: 4b0d ldr r3, [pc, #52] @ (8009e28 <CDC_Transmit_FS+0x48>)
8009df2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8009df6: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
8009df8: 68bb ldr r3, [r7, #8]
8009dfa: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
8009dfe: 2b00 cmp r3, #0
8009e00: d001 beq.n 8009e06 <CDC_Transmit_FS+0x26>
return USBD_BUSY;
8009e02: 2301 movs r3, #1
8009e04: e00b b.n 8009e1e <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
8009e06: 887b ldrh r3, [r7, #2]
8009e08: 461a mov r2, r3
8009e0a: 6879 ldr r1, [r7, #4]
8009e0c: 4806 ldr r0, [pc, #24] @ (8009e28 <CDC_Transmit_FS+0x48>)
8009e0e: f7fe fd8f bl 8008930 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
8009e12: 4805 ldr r0, [pc, #20] @ (8009e28 <CDC_Transmit_FS+0x48>)
8009e14: f7fe fdb8 bl 8008988 <USBD_CDC_TransmitPacket>
8009e18: 4603 mov r3, r0
8009e1a: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
8009e1c: 7bfb ldrb r3, [r7, #15]
}
8009e1e: 4618 mov r0, r3
8009e20: 3710 adds r7, #16
8009e22: 46bd mov sp, r7
8009e24: bd80 pop {r7, pc}
8009e26: bf00 nop
8009e28: 200003d4 .word 0x200003d4
08009e2c <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009e2c: b480 push {r7}
8009e2e: b083 sub sp, #12
8009e30: af00 add r7, sp, #0
8009e32: 4603 mov r3, r0
8009e34: 6039 str r1, [r7, #0]
8009e36: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
8009e38: 683b ldr r3, [r7, #0]
8009e3a: 2212 movs r2, #18
8009e3c: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
8009e3e: 4b03 ldr r3, [pc, #12] @ (8009e4c <USBD_FS_DeviceDescriptor+0x20>)
}
8009e40: 4618 mov r0, r3
8009e42: 370c adds r7, #12
8009e44: 46bd mov sp, r7
8009e46: bc80 pop {r7}
8009e48: 4770 bx lr
8009e4a: bf00 nop
8009e4c: 2000014c .word 0x2000014c
08009e50 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009e50: b480 push {r7}
8009e52: b083 sub sp, #12
8009e54: af00 add r7, sp, #0
8009e56: 4603 mov r3, r0
8009e58: 6039 str r1, [r7, #0]
8009e5a: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
8009e5c: 683b ldr r3, [r7, #0]
8009e5e: 2204 movs r2, #4
8009e60: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
8009e62: 4b03 ldr r3, [pc, #12] @ (8009e70 <USBD_FS_LangIDStrDescriptor+0x20>)
}
8009e64: 4618 mov r0, r3
8009e66: 370c adds r7, #12
8009e68: 46bd mov sp, r7
8009e6a: bc80 pop {r7}
8009e6c: 4770 bx lr
8009e6e: bf00 nop
8009e70: 20000160 .word 0x20000160
08009e74 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009e74: b580 push {r7, lr}
8009e76: b082 sub sp, #8
8009e78: af00 add r7, sp, #0
8009e7a: 4603 mov r3, r0
8009e7c: 6039 str r1, [r7, #0]
8009e7e: 71fb strb r3, [r7, #7]
if(speed == 0)
8009e80: 79fb ldrb r3, [r7, #7]
8009e82: 2b00 cmp r3, #0
8009e84: d105 bne.n 8009e92 <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
8009e86: 683a ldr r2, [r7, #0]
8009e88: 4907 ldr r1, [pc, #28] @ (8009ea8 <USBD_FS_ProductStrDescriptor+0x34>)
8009e8a: 4808 ldr r0, [pc, #32] @ (8009eac <USBD_FS_ProductStrDescriptor+0x38>)
8009e8c: f7ff fd8f bl 80099ae <USBD_GetString>
8009e90: e004 b.n 8009e9c <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
8009e92: 683a ldr r2, [r7, #0]
8009e94: 4904 ldr r1, [pc, #16] @ (8009ea8 <USBD_FS_ProductStrDescriptor+0x34>)
8009e96: 4805 ldr r0, [pc, #20] @ (8009eac <USBD_FS_ProductStrDescriptor+0x38>)
8009e98: f7ff fd89 bl 80099ae <USBD_GetString>
}
return USBD_StrDesc;
8009e9c: 4b02 ldr r3, [pc, #8] @ (8009ea8 <USBD_FS_ProductStrDescriptor+0x34>)
}
8009e9e: 4618 mov r0, r3
8009ea0: 3708 adds r7, #8
8009ea2: 46bd mov sp, r7
8009ea4: bd80 pop {r7, pc}
8009ea6: bf00 nop
8009ea8: 20000f9c .word 0x20000f9c
8009eac: 0800b050 .word 0x0800b050
08009eb0 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009eb0: b580 push {r7, lr}
8009eb2: b082 sub sp, #8
8009eb4: af00 add r7, sp, #0
8009eb6: 4603 mov r3, r0
8009eb8: 6039 str r1, [r7, #0]
8009eba: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
8009ebc: 683a ldr r2, [r7, #0]
8009ebe: 4904 ldr r1, [pc, #16] @ (8009ed0 <USBD_FS_ManufacturerStrDescriptor+0x20>)
8009ec0: 4804 ldr r0, [pc, #16] @ (8009ed4 <USBD_FS_ManufacturerStrDescriptor+0x24>)
8009ec2: f7ff fd74 bl 80099ae <USBD_GetString>
return USBD_StrDesc;
8009ec6: 4b02 ldr r3, [pc, #8] @ (8009ed0 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
8009ec8: 4618 mov r0, r3
8009eca: 3708 adds r7, #8
8009ecc: 46bd mov sp, r7
8009ece: bd80 pop {r7, pc}
8009ed0: 20000f9c .word 0x20000f9c
8009ed4: 0800b068 .word 0x0800b068
08009ed8 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009ed8: b580 push {r7, lr}
8009eda: b082 sub sp, #8
8009edc: af00 add r7, sp, #0
8009ede: 4603 mov r3, r0
8009ee0: 6039 str r1, [r7, #0]
8009ee2: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
8009ee4: 683b ldr r3, [r7, #0]
8009ee6: 221a movs r2, #26
8009ee8: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
8009eea: f000 f843 bl 8009f74 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
8009eee: 4b02 ldr r3, [pc, #8] @ (8009ef8 <USBD_FS_SerialStrDescriptor+0x20>)
}
8009ef0: 4618 mov r0, r3
8009ef2: 3708 adds r7, #8
8009ef4: 46bd mov sp, r7
8009ef6: bd80 pop {r7, pc}
8009ef8: 20000164 .word 0x20000164
08009efc <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009efc: b580 push {r7, lr}
8009efe: b082 sub sp, #8
8009f00: af00 add r7, sp, #0
8009f02: 4603 mov r3, r0
8009f04: 6039 str r1, [r7, #0]
8009f06: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
8009f08: 79fb ldrb r3, [r7, #7]
8009f0a: 2b00 cmp r3, #0
8009f0c: d105 bne.n 8009f1a <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
8009f0e: 683a ldr r2, [r7, #0]
8009f10: 4907 ldr r1, [pc, #28] @ (8009f30 <USBD_FS_ConfigStrDescriptor+0x34>)
8009f12: 4808 ldr r0, [pc, #32] @ (8009f34 <USBD_FS_ConfigStrDescriptor+0x38>)
8009f14: f7ff fd4b bl 80099ae <USBD_GetString>
8009f18: e004 b.n 8009f24 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
8009f1a: 683a ldr r2, [r7, #0]
8009f1c: 4904 ldr r1, [pc, #16] @ (8009f30 <USBD_FS_ConfigStrDescriptor+0x34>)
8009f1e: 4805 ldr r0, [pc, #20] @ (8009f34 <USBD_FS_ConfigStrDescriptor+0x38>)
8009f20: f7ff fd45 bl 80099ae <USBD_GetString>
}
return USBD_StrDesc;
8009f24: 4b02 ldr r3, [pc, #8] @ (8009f30 <USBD_FS_ConfigStrDescriptor+0x34>)
}
8009f26: 4618 mov r0, r3
8009f28: 3708 adds r7, #8
8009f2a: 46bd mov sp, r7
8009f2c: bd80 pop {r7, pc}
8009f2e: bf00 nop
8009f30: 20000f9c .word 0x20000f9c
8009f34: 0800b07c .word 0x0800b07c
08009f38 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8009f38: b580 push {r7, lr}
8009f3a: b082 sub sp, #8
8009f3c: af00 add r7, sp, #0
8009f3e: 4603 mov r3, r0
8009f40: 6039 str r1, [r7, #0]
8009f42: 71fb strb r3, [r7, #7]
if(speed == 0)
8009f44: 79fb ldrb r3, [r7, #7]
8009f46: 2b00 cmp r3, #0
8009f48: d105 bne.n 8009f56 <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
8009f4a: 683a ldr r2, [r7, #0]
8009f4c: 4907 ldr r1, [pc, #28] @ (8009f6c <USBD_FS_InterfaceStrDescriptor+0x34>)
8009f4e: 4808 ldr r0, [pc, #32] @ (8009f70 <USBD_FS_InterfaceStrDescriptor+0x38>)
8009f50: f7ff fd2d bl 80099ae <USBD_GetString>
8009f54: e004 b.n 8009f60 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
8009f56: 683a ldr r2, [r7, #0]
8009f58: 4904 ldr r1, [pc, #16] @ (8009f6c <USBD_FS_InterfaceStrDescriptor+0x34>)
8009f5a: 4805 ldr r0, [pc, #20] @ (8009f70 <USBD_FS_InterfaceStrDescriptor+0x38>)
8009f5c: f7ff fd27 bl 80099ae <USBD_GetString>
}
return USBD_StrDesc;
8009f60: 4b02 ldr r3, [pc, #8] @ (8009f6c <USBD_FS_InterfaceStrDescriptor+0x34>)
}
8009f62: 4618 mov r0, r3
8009f64: 3708 adds r7, #8
8009f66: 46bd mov sp, r7
8009f68: bd80 pop {r7, pc}
8009f6a: bf00 nop
8009f6c: 20000f9c .word 0x20000f9c
8009f70: 0800b088 .word 0x0800b088
08009f74 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
8009f74: b580 push {r7, lr}
8009f76: b084 sub sp, #16
8009f78: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
8009f7a: 4b0f ldr r3, [pc, #60] @ (8009fb8 <Get_SerialNum+0x44>)
8009f7c: 681b ldr r3, [r3, #0]
8009f7e: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
8009f80: 4b0e ldr r3, [pc, #56] @ (8009fbc <Get_SerialNum+0x48>)
8009f82: 681b ldr r3, [r3, #0]
8009f84: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
8009f86: 4b0e ldr r3, [pc, #56] @ (8009fc0 <Get_SerialNum+0x4c>)
8009f88: 681b ldr r3, [r3, #0]
8009f8a: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
8009f8c: 68fa ldr r2, [r7, #12]
8009f8e: 687b ldr r3, [r7, #4]
8009f90: 4413 add r3, r2
8009f92: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
8009f94: 68fb ldr r3, [r7, #12]
8009f96: 2b00 cmp r3, #0
8009f98: d009 beq.n 8009fae <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
8009f9a: 2208 movs r2, #8
8009f9c: 4909 ldr r1, [pc, #36] @ (8009fc4 <Get_SerialNum+0x50>)
8009f9e: 68f8 ldr r0, [r7, #12]
8009fa0: f000 f814 bl 8009fcc <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
8009fa4: 2204 movs r2, #4
8009fa6: 4908 ldr r1, [pc, #32] @ (8009fc8 <Get_SerialNum+0x54>)
8009fa8: 68b8 ldr r0, [r7, #8]
8009faa: f000 f80f bl 8009fcc <IntToUnicode>
}
}
8009fae: bf00 nop
8009fb0: 3710 adds r7, #16
8009fb2: 46bd mov sp, r7
8009fb4: bd80 pop {r7, pc}
8009fb6: bf00 nop
8009fb8: 1ffff7e8 .word 0x1ffff7e8
8009fbc: 1ffff7ec .word 0x1ffff7ec
8009fc0: 1ffff7f0 .word 0x1ffff7f0
8009fc4: 20000166 .word 0x20000166
8009fc8: 20000176 .word 0x20000176
08009fcc <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
8009fcc: b480 push {r7}
8009fce: b087 sub sp, #28
8009fd0: af00 add r7, sp, #0
8009fd2: 60f8 str r0, [r7, #12]
8009fd4: 60b9 str r1, [r7, #8]
8009fd6: 4613 mov r3, r2
8009fd8: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
8009fda: 2300 movs r3, #0
8009fdc: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
8009fde: 2300 movs r3, #0
8009fe0: 75fb strb r3, [r7, #23]
8009fe2: e027 b.n 800a034 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
8009fe4: 68fb ldr r3, [r7, #12]
8009fe6: 0f1b lsrs r3, r3, #28
8009fe8: 2b09 cmp r3, #9
8009fea: d80b bhi.n 800a004 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
8009fec: 68fb ldr r3, [r7, #12]
8009fee: 0f1b lsrs r3, r3, #28
8009ff0: b2da uxtb r2, r3
8009ff2: 7dfb ldrb r3, [r7, #23]
8009ff4: 005b lsls r3, r3, #1
8009ff6: 4619 mov r1, r3
8009ff8: 68bb ldr r3, [r7, #8]
8009ffa: 440b add r3, r1
8009ffc: 3230 adds r2, #48 @ 0x30
8009ffe: b2d2 uxtb r2, r2
800a000: 701a strb r2, [r3, #0]
800a002: e00a b.n 800a01a <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800a004: 68fb ldr r3, [r7, #12]
800a006: 0f1b lsrs r3, r3, #28
800a008: b2da uxtb r2, r3
800a00a: 7dfb ldrb r3, [r7, #23]
800a00c: 005b lsls r3, r3, #1
800a00e: 4619 mov r1, r3
800a010: 68bb ldr r3, [r7, #8]
800a012: 440b add r3, r1
800a014: 3237 adds r2, #55 @ 0x37
800a016: b2d2 uxtb r2, r2
800a018: 701a strb r2, [r3, #0]
}
value = value << 4;
800a01a: 68fb ldr r3, [r7, #12]
800a01c: 011b lsls r3, r3, #4
800a01e: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800a020: 7dfb ldrb r3, [r7, #23]
800a022: 005b lsls r3, r3, #1
800a024: 3301 adds r3, #1
800a026: 68ba ldr r2, [r7, #8]
800a028: 4413 add r3, r2
800a02a: 2200 movs r2, #0
800a02c: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800a02e: 7dfb ldrb r3, [r7, #23]
800a030: 3301 adds r3, #1
800a032: 75fb strb r3, [r7, #23]
800a034: 7dfa ldrb r2, [r7, #23]
800a036: 79fb ldrb r3, [r7, #7]
800a038: 429a cmp r2, r3
800a03a: d3d3 bcc.n 8009fe4 <IntToUnicode+0x18>
}
}
800a03c: bf00 nop
800a03e: bf00 nop
800a040: 371c adds r7, #28
800a042: 46bd mov sp, r7
800a044: bc80 pop {r7}
800a046: 4770 bx lr
0800a048 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800a048: b580 push {r7, lr}
800a04a: b084 sub sp, #16
800a04c: af00 add r7, sp, #0
800a04e: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800a050: 687b ldr r3, [r7, #4]
800a052: 681b ldr r3, [r3, #0]
800a054: 4a0d ldr r2, [pc, #52] @ (800a08c <HAL_PCD_MspInit+0x44>)
800a056: 4293 cmp r3, r2
800a058: d113 bne.n 800a082 <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800a05a: 4b0d ldr r3, [pc, #52] @ (800a090 <HAL_PCD_MspInit+0x48>)
800a05c: 69db ldr r3, [r3, #28]
800a05e: 4a0c ldr r2, [pc, #48] @ (800a090 <HAL_PCD_MspInit+0x48>)
800a060: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800a064: 61d3 str r3, [r2, #28]
800a066: 4b0a ldr r3, [pc, #40] @ (800a090 <HAL_PCD_MspInit+0x48>)
800a068: 69db ldr r3, [r3, #28]
800a06a: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800a06e: 60fb str r3, [r7, #12]
800a070: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800a072: 2200 movs r2, #0
800a074: 2100 movs r1, #0
800a076: 2014 movs r0, #20
800a078: f7f8 f90f bl 800229a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800a07c: 2014 movs r0, #20
800a07e: f7f8 f928 bl 80022d2 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800a082: bf00 nop
800a084: 3710 adds r7, #16
800a086: 46bd mov sp, r7
800a088: bd80 pop {r7, pc}
800a08a: bf00 nop
800a08c: 40005c00 .word 0x40005c00
800a090: 40021000 .word 0x40021000
0800a094 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a094: b580 push {r7, lr}
800a096: b082 sub sp, #8
800a098: af00 add r7, sp, #0
800a09a: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800a09c: 687b ldr r3, [r7, #4]
800a09e: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800a0a2: 687b ldr r3, [r7, #4]
800a0a4: f503 7326 add.w r3, r3, #664 @ 0x298
800a0a8: 4619 mov r1, r3
800a0aa: 4610 mov r0, r2
800a0ac: f7fe fd51 bl 8008b52 <USBD_LL_SetupStage>
}
800a0b0: bf00 nop
800a0b2: 3708 adds r7, #8
800a0b4: 46bd mov sp, r7
800a0b6: bd80 pop {r7, pc}
0800a0b8 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a0b8: b580 push {r7, lr}
800a0ba: b082 sub sp, #8
800a0bc: af00 add r7, sp, #0
800a0be: 6078 str r0, [r7, #4]
800a0c0: 460b mov r3, r1
800a0c2: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800a0c4: 687b ldr r3, [r7, #4]
800a0c6: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800a0ca: 78fa ldrb r2, [r7, #3]
800a0cc: 6879 ldr r1, [r7, #4]
800a0ce: 4613 mov r3, r2
800a0d0: 009b lsls r3, r3, #2
800a0d2: 4413 add r3, r2
800a0d4: 00db lsls r3, r3, #3
800a0d6: 440b add r3, r1
800a0d8: f503 73b2 add.w r3, r3, #356 @ 0x164
800a0dc: 681a ldr r2, [r3, #0]
800a0de: 78fb ldrb r3, [r7, #3]
800a0e0: 4619 mov r1, r3
800a0e2: f7fe fd83 bl 8008bec <USBD_LL_DataOutStage>
}
800a0e6: bf00 nop
800a0e8: 3708 adds r7, #8
800a0ea: 46bd mov sp, r7
800a0ec: bd80 pop {r7, pc}
0800a0ee <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a0ee: b580 push {r7, lr}
800a0f0: b082 sub sp, #8
800a0f2: af00 add r7, sp, #0
800a0f4: 6078 str r0, [r7, #4]
800a0f6: 460b mov r3, r1
800a0f8: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800a0fa: 687b ldr r3, [r7, #4]
800a0fc: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800a100: 78fa ldrb r2, [r7, #3]
800a102: 6879 ldr r1, [r7, #4]
800a104: 4613 mov r3, r2
800a106: 009b lsls r3, r3, #2
800a108: 4413 add r3, r2
800a10a: 00db lsls r3, r3, #3
800a10c: 440b add r3, r1
800a10e: 3324 adds r3, #36 @ 0x24
800a110: 681a ldr r2, [r3, #0]
800a112: 78fb ldrb r3, [r7, #3]
800a114: 4619 mov r1, r3
800a116: f7fe fdda bl 8008cce <USBD_LL_DataInStage>
}
800a11a: bf00 nop
800a11c: 3708 adds r7, #8
800a11e: 46bd mov sp, r7
800a120: bd80 pop {r7, pc}
0800a122 <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a122: b580 push {r7, lr}
800a124: b082 sub sp, #8
800a126: af00 add r7, sp, #0
800a128: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800a12a: 687b ldr r3, [r7, #4]
800a12c: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a130: 4618 mov r0, r3
800a132: f7fe feea bl 8008f0a <USBD_LL_SOF>
}
800a136: bf00 nop
800a138: 3708 adds r7, #8
800a13a: 46bd mov sp, r7
800a13c: bd80 pop {r7, pc}
0800a13e <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a13e: b580 push {r7, lr}
800a140: b084 sub sp, #16
800a142: af00 add r7, sp, #0
800a144: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800a146: 2301 movs r3, #1
800a148: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800a14a: 687b ldr r3, [r7, #4]
800a14c: 799b ldrb r3, [r3, #6]
800a14e: 2b02 cmp r3, #2
800a150: d001 beq.n 800a156 <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800a152: f7f7 f979 bl 8001448 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800a156: 687b ldr r3, [r7, #4]
800a158: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a15c: 7bfa ldrb r2, [r7, #15]
800a15e: 4611 mov r1, r2
800a160: 4618 mov r0, r3
800a162: f7fe fe9a bl 8008e9a <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800a166: 687b ldr r3, [r7, #4]
800a168: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a16c: 4618 mov r0, r3
800a16e: f7fe fe53 bl 8008e18 <USBD_LL_Reset>
}
800a172: bf00 nop
800a174: 3710 adds r7, #16
800a176: 46bd mov sp, r7
800a178: bd80 pop {r7, pc}
...
0800a17c <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a17c: b580 push {r7, lr}
800a17e: b082 sub sp, #8
800a180: af00 add r7, sp, #0
800a182: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800a184: 687b ldr r3, [r7, #4]
800a186: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a18a: 4618 mov r0, r3
800a18c: f7fe fe94 bl 8008eb8 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800a190: 687b ldr r3, [r7, #4]
800a192: 7a9b ldrb r3, [r3, #10]
800a194: 2b00 cmp r3, #0
800a196: d005 beq.n 800a1a4 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800a198: 4b04 ldr r3, [pc, #16] @ (800a1ac <HAL_PCD_SuspendCallback+0x30>)
800a19a: 691b ldr r3, [r3, #16]
800a19c: 4a03 ldr r2, [pc, #12] @ (800a1ac <HAL_PCD_SuspendCallback+0x30>)
800a19e: f043 0306 orr.w r3, r3, #6
800a1a2: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800a1a4: bf00 nop
800a1a6: 3708 adds r7, #8
800a1a8: 46bd mov sp, r7
800a1aa: bd80 pop {r7, pc}
800a1ac: e000ed00 .word 0xe000ed00
0800a1b0 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a1b0: b580 push {r7, lr}
800a1b2: b082 sub sp, #8
800a1b4: af00 add r7, sp, #0
800a1b6: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800a1b8: 687b ldr r3, [r7, #4]
800a1ba: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800a1be: 4618 mov r0, r3
800a1c0: f7fe fe8e bl 8008ee0 <USBD_LL_Resume>
}
800a1c4: bf00 nop
800a1c6: 3708 adds r7, #8
800a1c8: 46bd mov sp, r7
800a1ca: bd80 pop {r7, pc}
0800a1cc <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800a1cc: b580 push {r7, lr}
800a1ce: b082 sub sp, #8
800a1d0: af00 add r7, sp, #0
800a1d2: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800a1d4: 4a28 ldr r2, [pc, #160] @ (800a278 <USBD_LL_Init+0xac>)
800a1d6: 687b ldr r3, [r7, #4]
800a1d8: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800a1dc: 687b ldr r3, [r7, #4]
800a1de: 4a26 ldr r2, [pc, #152] @ (800a278 <USBD_LL_Init+0xac>)
800a1e0: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800a1e4: 4b24 ldr r3, [pc, #144] @ (800a278 <USBD_LL_Init+0xac>)
800a1e6: 4a25 ldr r2, [pc, #148] @ (800a27c <USBD_LL_Init+0xb0>)
800a1e8: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800a1ea: 4b23 ldr r3, [pc, #140] @ (800a278 <USBD_LL_Init+0xac>)
800a1ec: 2208 movs r2, #8
800a1ee: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800a1f0: 4b21 ldr r3, [pc, #132] @ (800a278 <USBD_LL_Init+0xac>)
800a1f2: 2202 movs r2, #2
800a1f4: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800a1f6: 4b20 ldr r3, [pc, #128] @ (800a278 <USBD_LL_Init+0xac>)
800a1f8: 2200 movs r2, #0
800a1fa: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800a1fc: 4b1e ldr r3, [pc, #120] @ (800a278 <USBD_LL_Init+0xac>)
800a1fe: 2200 movs r2, #0
800a200: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800a202: 4b1d ldr r3, [pc, #116] @ (800a278 <USBD_LL_Init+0xac>)
800a204: 2200 movs r2, #0
800a206: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800a208: 481b ldr r0, [pc, #108] @ (800a278 <USBD_LL_Init+0xac>)
800a20a: f7f8 fc38 bl 8002a7e <HAL_PCD_Init>
800a20e: 4603 mov r3, r0
800a210: 2b00 cmp r3, #0
800a212: d001 beq.n 800a218 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800a214: f7f7 f918 bl 8001448 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800a218: 687b ldr r3, [r7, #4]
800a21a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a21e: 2318 movs r3, #24
800a220: 2200 movs r2, #0
800a222: 2100 movs r1, #0
800a224: f7fa f949 bl 80044ba <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800a228: 687b ldr r3, [r7, #4]
800a22a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a22e: 2358 movs r3, #88 @ 0x58
800a230: 2200 movs r2, #0
800a232: 2180 movs r1, #128 @ 0x80
800a234: f7fa f941 bl 80044ba <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800a238: 687b ldr r3, [r7, #4]
800a23a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a23e: 23c0 movs r3, #192 @ 0xc0
800a240: 2200 movs r2, #0
800a242: 2181 movs r1, #129 @ 0x81
800a244: f7fa f939 bl 80044ba <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800a248: 687b ldr r3, [r7, #4]
800a24a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a24e: f44f 7388 mov.w r3, #272 @ 0x110
800a252: 2200 movs r2, #0
800a254: 2101 movs r1, #1
800a256: f7fa f930 bl 80044ba <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800a25a: 687b ldr r3, [r7, #4]
800a25c: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a260: f44f 7380 mov.w r3, #256 @ 0x100
800a264: 2200 movs r2, #0
800a266: 2182 movs r1, #130 @ 0x82
800a268: f7fa f927 bl 80044ba <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800a26c: 2300 movs r3, #0
}
800a26e: 4618 mov r0, r3
800a270: 3708 adds r7, #8
800a272: 46bd mov sp, r7
800a274: bd80 pop {r7, pc}
800a276: bf00 nop
800a278: 2000119c .word 0x2000119c
800a27c: 40005c00 .word 0x40005c00
0800a280 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800a280: b580 push {r7, lr}
800a282: b084 sub sp, #16
800a284: af00 add r7, sp, #0
800a286: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800a288: 2300 movs r3, #0
800a28a: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a28c: 2300 movs r3, #0
800a28e: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800a290: 687b ldr r3, [r7, #4]
800a292: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a296: 4618 mov r0, r3
800a298: f7f8 fce7 bl 8002c6a <HAL_PCD_Start>
800a29c: 4603 mov r3, r0
800a29e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a2a0: 7bfb ldrb r3, [r7, #15]
800a2a2: 4618 mov r0, r3
800a2a4: f000 f94e bl 800a544 <USBD_Get_USB_Status>
800a2a8: 4603 mov r3, r0
800a2aa: 73bb strb r3, [r7, #14]
return usb_status;
800a2ac: 7bbb ldrb r3, [r7, #14]
}
800a2ae: 4618 mov r0, r3
800a2b0: 3710 adds r7, #16
800a2b2: 46bd mov sp, r7
800a2b4: bd80 pop {r7, pc}
0800a2b6 <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800a2b6: b580 push {r7, lr}
800a2b8: b084 sub sp, #16
800a2ba: af00 add r7, sp, #0
800a2bc: 6078 str r0, [r7, #4]
800a2be: 4608 mov r0, r1
800a2c0: 4611 mov r1, r2
800a2c2: 461a mov r2, r3
800a2c4: 4603 mov r3, r0
800a2c6: 70fb strb r3, [r7, #3]
800a2c8: 460b mov r3, r1
800a2ca: 70bb strb r3, [r7, #2]
800a2cc: 4613 mov r3, r2
800a2ce: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800a2d0: 2300 movs r3, #0
800a2d2: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a2d4: 2300 movs r3, #0
800a2d6: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800a2d8: 687b ldr r3, [r7, #4]
800a2da: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a2de: 78bb ldrb r3, [r7, #2]
800a2e0: 883a ldrh r2, [r7, #0]
800a2e2: 78f9 ldrb r1, [r7, #3]
800a2e4: f7f8 fe3b bl 8002f5e <HAL_PCD_EP_Open>
800a2e8: 4603 mov r3, r0
800a2ea: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a2ec: 7bfb ldrb r3, [r7, #15]
800a2ee: 4618 mov r0, r3
800a2f0: f000 f928 bl 800a544 <USBD_Get_USB_Status>
800a2f4: 4603 mov r3, r0
800a2f6: 73bb strb r3, [r7, #14]
return usb_status;
800a2f8: 7bbb ldrb r3, [r7, #14]
}
800a2fa: 4618 mov r0, r3
800a2fc: 3710 adds r7, #16
800a2fe: 46bd mov sp, r7
800a300: bd80 pop {r7, pc}
0800a302 <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a302: b580 push {r7, lr}
800a304: b084 sub sp, #16
800a306: af00 add r7, sp, #0
800a308: 6078 str r0, [r7, #4]
800a30a: 460b mov r3, r1
800a30c: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a30e: 2300 movs r3, #0
800a310: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a312: 2300 movs r3, #0
800a314: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800a316: 687b ldr r3, [r7, #4]
800a318: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a31c: 78fa ldrb r2, [r7, #3]
800a31e: 4611 mov r1, r2
800a320: 4618 mov r0, r3
800a322: f7f8 fe79 bl 8003018 <HAL_PCD_EP_Close>
800a326: 4603 mov r3, r0
800a328: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a32a: 7bfb ldrb r3, [r7, #15]
800a32c: 4618 mov r0, r3
800a32e: f000 f909 bl 800a544 <USBD_Get_USB_Status>
800a332: 4603 mov r3, r0
800a334: 73bb strb r3, [r7, #14]
return usb_status;
800a336: 7bbb ldrb r3, [r7, #14]
}
800a338: 4618 mov r0, r3
800a33a: 3710 adds r7, #16
800a33c: 46bd mov sp, r7
800a33e: bd80 pop {r7, pc}
0800a340 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a340: b580 push {r7, lr}
800a342: b084 sub sp, #16
800a344: af00 add r7, sp, #0
800a346: 6078 str r0, [r7, #4]
800a348: 460b mov r3, r1
800a34a: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a34c: 2300 movs r3, #0
800a34e: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a350: 2300 movs r3, #0
800a352: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800a354: 687b ldr r3, [r7, #4]
800a356: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a35a: 78fa ldrb r2, [r7, #3]
800a35c: 4611 mov r1, r2
800a35e: 4618 mov r0, r3
800a360: f7f8 ff21 bl 80031a6 <HAL_PCD_EP_SetStall>
800a364: 4603 mov r3, r0
800a366: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a368: 7bfb ldrb r3, [r7, #15]
800a36a: 4618 mov r0, r3
800a36c: f000 f8ea bl 800a544 <USBD_Get_USB_Status>
800a370: 4603 mov r3, r0
800a372: 73bb strb r3, [r7, #14]
return usb_status;
800a374: 7bbb ldrb r3, [r7, #14]
}
800a376: 4618 mov r0, r3
800a378: 3710 adds r7, #16
800a37a: 46bd mov sp, r7
800a37c: bd80 pop {r7, pc}
0800a37e <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a37e: b580 push {r7, lr}
800a380: b084 sub sp, #16
800a382: af00 add r7, sp, #0
800a384: 6078 str r0, [r7, #4]
800a386: 460b mov r3, r1
800a388: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a38a: 2300 movs r3, #0
800a38c: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a38e: 2300 movs r3, #0
800a390: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800a392: 687b ldr r3, [r7, #4]
800a394: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a398: 78fa ldrb r2, [r7, #3]
800a39a: 4611 mov r1, r2
800a39c: 4618 mov r0, r3
800a39e: f7f8 ff62 bl 8003266 <HAL_PCD_EP_ClrStall>
800a3a2: 4603 mov r3, r0
800a3a4: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a3a6: 7bfb ldrb r3, [r7, #15]
800a3a8: 4618 mov r0, r3
800a3aa: f000 f8cb bl 800a544 <USBD_Get_USB_Status>
800a3ae: 4603 mov r3, r0
800a3b0: 73bb strb r3, [r7, #14]
return usb_status;
800a3b2: 7bbb ldrb r3, [r7, #14]
}
800a3b4: 4618 mov r0, r3
800a3b6: 3710 adds r7, #16
800a3b8: 46bd mov sp, r7
800a3ba: bd80 pop {r7, pc}
0800a3bc <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a3bc: b480 push {r7}
800a3be: b085 sub sp, #20
800a3c0: af00 add r7, sp, #0
800a3c2: 6078 str r0, [r7, #4]
800a3c4: 460b mov r3, r1
800a3c6: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800a3c8: 687b ldr r3, [r7, #4]
800a3ca: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a3ce: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800a3d0: f997 3003 ldrsb.w r3, [r7, #3]
800a3d4: 2b00 cmp r3, #0
800a3d6: da0b bge.n 800a3f0 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800a3d8: 78fb ldrb r3, [r7, #3]
800a3da: f003 027f and.w r2, r3, #127 @ 0x7f
800a3de: 68f9 ldr r1, [r7, #12]
800a3e0: 4613 mov r3, r2
800a3e2: 009b lsls r3, r3, #2
800a3e4: 4413 add r3, r2
800a3e6: 00db lsls r3, r3, #3
800a3e8: 440b add r3, r1
800a3ea: 3312 adds r3, #18
800a3ec: 781b ldrb r3, [r3, #0]
800a3ee: e00b b.n 800a408 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800a3f0: 78fb ldrb r3, [r7, #3]
800a3f2: f003 027f and.w r2, r3, #127 @ 0x7f
800a3f6: 68f9 ldr r1, [r7, #12]
800a3f8: 4613 mov r3, r2
800a3fa: 009b lsls r3, r3, #2
800a3fc: 4413 add r3, r2
800a3fe: 00db lsls r3, r3, #3
800a400: 440b add r3, r1
800a402: f503 73a9 add.w r3, r3, #338 @ 0x152
800a406: 781b ldrb r3, [r3, #0]
}
}
800a408: 4618 mov r0, r3
800a40a: 3714 adds r7, #20
800a40c: 46bd mov sp, r7
800a40e: bc80 pop {r7}
800a410: 4770 bx lr
0800a412 <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800a412: b580 push {r7, lr}
800a414: b084 sub sp, #16
800a416: af00 add r7, sp, #0
800a418: 6078 str r0, [r7, #4]
800a41a: 460b mov r3, r1
800a41c: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800a41e: 2300 movs r3, #0
800a420: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800a422: 2300 movs r3, #0
800a424: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800a426: 687b ldr r3, [r7, #4]
800a428: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a42c: 78fa ldrb r2, [r7, #3]
800a42e: 4611 mov r1, r2
800a430: 4618 mov r0, r3
800a432: f7f8 fd70 bl 8002f16 <HAL_PCD_SetAddress>
800a436: 4603 mov r3, r0
800a438: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800a43a: 7bfb ldrb r3, [r7, #15]
800a43c: 4618 mov r0, r3
800a43e: f000 f881 bl 800a544 <USBD_Get_USB_Status>
800a442: 4603 mov r3, r0
800a444: 73bb strb r3, [r7, #14]
return usb_status;
800a446: 7bbb ldrb r3, [r7, #14]
}
800a448: 4618 mov r0, r3
800a44a: 3710 adds r7, #16
800a44c: 46bd mov sp, r7
800a44e: bd80 pop {r7, pc}
0800a450 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800a450: b580 push {r7, lr}
800a452: b086 sub sp, #24
800a454: af00 add r7, sp, #0
800a456: 60f8 str r0, [r7, #12]
800a458: 607a str r2, [r7, #4]
800a45a: 461a mov r2, r3
800a45c: 460b mov r3, r1
800a45e: 72fb strb r3, [r7, #11]
800a460: 4613 mov r3, r2
800a462: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800a464: 2300 movs r3, #0
800a466: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800a468: 2300 movs r3, #0
800a46a: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800a46c: 68fb ldr r3, [r7, #12]
800a46e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a472: 893b ldrh r3, [r7, #8]
800a474: 7af9 ldrb r1, [r7, #11]
800a476: 687a ldr r2, [r7, #4]
800a478: f7f8 fe5e bl 8003138 <HAL_PCD_EP_Transmit>
800a47c: 4603 mov r3, r0
800a47e: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800a480: 7dfb ldrb r3, [r7, #23]
800a482: 4618 mov r0, r3
800a484: f000 f85e bl 800a544 <USBD_Get_USB_Status>
800a488: 4603 mov r3, r0
800a48a: 75bb strb r3, [r7, #22]
return usb_status;
800a48c: 7dbb ldrb r3, [r7, #22]
}
800a48e: 4618 mov r0, r3
800a490: 3718 adds r7, #24
800a492: 46bd mov sp, r7
800a494: bd80 pop {r7, pc}
0800a496 <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800a496: b580 push {r7, lr}
800a498: b086 sub sp, #24
800a49a: af00 add r7, sp, #0
800a49c: 60f8 str r0, [r7, #12]
800a49e: 607a str r2, [r7, #4]
800a4a0: 461a mov r2, r3
800a4a2: 460b mov r3, r1
800a4a4: 72fb strb r3, [r7, #11]
800a4a6: 4613 mov r3, r2
800a4a8: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800a4aa: 2300 movs r3, #0
800a4ac: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800a4ae: 2300 movs r3, #0
800a4b0: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800a4b2: 68fb ldr r3, [r7, #12]
800a4b4: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800a4b8: 893b ldrh r3, [r7, #8]
800a4ba: 7af9 ldrb r1, [r7, #11]
800a4bc: 687a ldr r2, [r7, #4]
800a4be: f7f8 fdf3 bl 80030a8 <HAL_PCD_EP_Receive>
800a4c2: 4603 mov r3, r0
800a4c4: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800a4c6: 7dfb ldrb r3, [r7, #23]
800a4c8: 4618 mov r0, r3
800a4ca: f000 f83b bl 800a544 <USBD_Get_USB_Status>
800a4ce: 4603 mov r3, r0
800a4d0: 75bb strb r3, [r7, #22]
return usb_status;
800a4d2: 7dbb ldrb r3, [r7, #22]
}
800a4d4: 4618 mov r0, r3
800a4d6: 3718 adds r7, #24
800a4d8: 46bd mov sp, r7
800a4da: bd80 pop {r7, pc}
0800a4dc <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800a4dc: b580 push {r7, lr}
800a4de: b082 sub sp, #8
800a4e0: af00 add r7, sp, #0
800a4e2: 6078 str r0, [r7, #4]
800a4e4: 460b mov r3, r1
800a4e6: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800a4e8: 687b ldr r3, [r7, #4]
800a4ea: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800a4ee: 78fa ldrb r2, [r7, #3]
800a4f0: 4611 mov r1, r2
800a4f2: 4618 mov r0, r3
800a4f4: f7f8 fe09 bl 800310a <HAL_PCD_EP_GetRxCount>
800a4f8: 4603 mov r3, r0
}
800a4fa: 4618 mov r0, r3
800a4fc: 3708 adds r7, #8
800a4fe: 46bd mov sp, r7
800a500: bd80 pop {r7, pc}
...
0800a504 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800a504: b480 push {r7}
800a506: b083 sub sp, #12
800a508: af00 add r7, sp, #0
800a50a: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800a50c: 4b02 ldr r3, [pc, #8] @ (800a518 <USBD_static_malloc+0x14>)
}
800a50e: 4618 mov r0, r3
800a510: 370c adds r7, #12
800a512: 46bd mov sp, r7
800a514: bc80 pop {r7}
800a516: 4770 bx lr
800a518: 20001474 .word 0x20001474
0800a51c <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800a51c: b480 push {r7}
800a51e: b083 sub sp, #12
800a520: af00 add r7, sp, #0
800a522: 6078 str r0, [r7, #4]
}
800a524: bf00 nop
800a526: 370c adds r7, #12
800a528: 46bd mov sp, r7
800a52a: bc80 pop {r7}
800a52c: 4770 bx lr
0800a52e <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800a52e: b480 push {r7}
800a530: b083 sub sp, #12
800a532: af00 add r7, sp, #0
800a534: 6078 str r0, [r7, #4]
800a536: 460b mov r3, r1
800a538: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800a53a: bf00 nop
800a53c: 370c adds r7, #12
800a53e: 46bd mov sp, r7
800a540: bc80 pop {r7}
800a542: 4770 bx lr
0800a544 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800a544: b480 push {r7}
800a546: b085 sub sp, #20
800a548: af00 add r7, sp, #0
800a54a: 4603 mov r3, r0
800a54c: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800a54e: 2300 movs r3, #0
800a550: 73fb strb r3, [r7, #15]
switch (hal_status)
800a552: 79fb ldrb r3, [r7, #7]
800a554: 2b03 cmp r3, #3
800a556: d817 bhi.n 800a588 <USBD_Get_USB_Status+0x44>
800a558: a201 add r2, pc, #4 @ (adr r2, 800a560 <USBD_Get_USB_Status+0x1c>)
800a55a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800a55e: bf00 nop
800a560: 0800a571 .word 0x0800a571
800a564: 0800a577 .word 0x0800a577
800a568: 0800a57d .word 0x0800a57d
800a56c: 0800a583 .word 0x0800a583
{
case HAL_OK :
usb_status = USBD_OK;
800a570: 2300 movs r3, #0
800a572: 73fb strb r3, [r7, #15]
break;
800a574: e00b b.n 800a58e <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800a576: 2302 movs r3, #2
800a578: 73fb strb r3, [r7, #15]
break;
800a57a: e008 b.n 800a58e <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800a57c: 2301 movs r3, #1
800a57e: 73fb strb r3, [r7, #15]
break;
800a580: e005 b.n 800a58e <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800a582: 2302 movs r3, #2
800a584: 73fb strb r3, [r7, #15]
break;
800a586: e002 b.n 800a58e <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800a588: 2302 movs r3, #2
800a58a: 73fb strb r3, [r7, #15]
break;
800a58c: bf00 nop
}
return usb_status;
800a58e: 7bfb ldrb r3, [r7, #15]
}
800a590: 4618 mov r0, r3
800a592: 3714 adds r7, #20
800a594: 46bd mov sp, r7
800a596: bc80 pop {r7}
800a598: 4770 bx lr
800a59a: bf00 nop
0800a59c <siprintf>:
800a59c: b40e push {r1, r2, r3}
800a59e: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800a5a2: b510 push {r4, lr}
800a5a4: 2400 movs r4, #0
800a5a6: b09d sub sp, #116 @ 0x74
800a5a8: ab1f add r3, sp, #124 @ 0x7c
800a5aa: 9002 str r0, [sp, #8]
800a5ac: 9006 str r0, [sp, #24]
800a5ae: 9107 str r1, [sp, #28]
800a5b0: 9104 str r1, [sp, #16]
800a5b2: 4809 ldr r0, [pc, #36] @ (800a5d8 <siprintf+0x3c>)
800a5b4: 4909 ldr r1, [pc, #36] @ (800a5dc <siprintf+0x40>)
800a5b6: f853 2b04 ldr.w r2, [r3], #4
800a5ba: 9105 str r1, [sp, #20]
800a5bc: 6800 ldr r0, [r0, #0]
800a5be: a902 add r1, sp, #8
800a5c0: 9301 str r3, [sp, #4]
800a5c2: 941b str r4, [sp, #108] @ 0x6c
800a5c4: f000 f992 bl 800a8ec <_svfiprintf_r>
800a5c8: 9b02 ldr r3, [sp, #8]
800a5ca: 701c strb r4, [r3, #0]
800a5cc: b01d add sp, #116 @ 0x74
800a5ce: e8bd 4010 ldmia.w sp!, {r4, lr}
800a5d2: b003 add sp, #12
800a5d4: 4770 bx lr
800a5d6: bf00 nop
800a5d8: 20000180 .word 0x20000180
800a5dc: ffff0208 .word 0xffff0208
0800a5e0 <memset>:
800a5e0: 4603 mov r3, r0
800a5e2: 4402 add r2, r0
800a5e4: 4293 cmp r3, r2
800a5e6: d100 bne.n 800a5ea <memset+0xa>
800a5e8: 4770 bx lr
800a5ea: f803 1b01 strb.w r1, [r3], #1
800a5ee: e7f9 b.n 800a5e4 <memset+0x4>
0800a5f0 <__errno>:
800a5f0: 4b01 ldr r3, [pc, #4] @ (800a5f8 <__errno+0x8>)
800a5f2: 6818 ldr r0, [r3, #0]
800a5f4: 4770 bx lr
800a5f6: bf00 nop
800a5f8: 20000180 .word 0x20000180
0800a5fc <__libc_init_array>:
800a5fc: b570 push {r4, r5, r6, lr}
800a5fe: 2600 movs r6, #0
800a600: 4d0c ldr r5, [pc, #48] @ (800a634 <__libc_init_array+0x38>)
800a602: 4c0d ldr r4, [pc, #52] @ (800a638 <__libc_init_array+0x3c>)
800a604: 1b64 subs r4, r4, r5
800a606: 10a4 asrs r4, r4, #2
800a608: 42a6 cmp r6, r4
800a60a: d109 bne.n 800a620 <__libc_init_array+0x24>
800a60c: f000 fc76 bl 800aefc <_init>
800a610: 2600 movs r6, #0
800a612: 4d0a ldr r5, [pc, #40] @ (800a63c <__libc_init_array+0x40>)
800a614: 4c0a ldr r4, [pc, #40] @ (800a640 <__libc_init_array+0x44>)
800a616: 1b64 subs r4, r4, r5
800a618: 10a4 asrs r4, r4, #2
800a61a: 42a6 cmp r6, r4
800a61c: d105 bne.n 800a62a <__libc_init_array+0x2e>
800a61e: bd70 pop {r4, r5, r6, pc}
800a620: f855 3b04 ldr.w r3, [r5], #4
800a624: 4798 blx r3
800a626: 3601 adds r6, #1
800a628: e7ee b.n 800a608 <__libc_init_array+0xc>
800a62a: f855 3b04 ldr.w r3, [r5], #4
800a62e: 4798 blx r3
800a630: 3601 adds r6, #1
800a632: e7f2 b.n 800a61a <__libc_init_array+0x1e>
800a634: 0800b140 .word 0x0800b140
800a638: 0800b140 .word 0x0800b140
800a63c: 0800b140 .word 0x0800b140
800a640: 0800b144 .word 0x0800b144
0800a644 <__retarget_lock_acquire_recursive>:
800a644: 4770 bx lr
0800a646 <__retarget_lock_release_recursive>:
800a646: 4770 bx lr
0800a648 <_free_r>:
800a648: b538 push {r3, r4, r5, lr}
800a64a: 4605 mov r5, r0
800a64c: 2900 cmp r1, #0
800a64e: d040 beq.n 800a6d2 <_free_r+0x8a>
800a650: f851 3c04 ldr.w r3, [r1, #-4]
800a654: 1f0c subs r4, r1, #4
800a656: 2b00 cmp r3, #0
800a658: bfb8 it lt
800a65a: 18e4 addlt r4, r4, r3
800a65c: f000 f8de bl 800a81c <__malloc_lock>
800a660: 4a1c ldr r2, [pc, #112] @ (800a6d4 <_free_r+0x8c>)
800a662: 6813 ldr r3, [r2, #0]
800a664: b933 cbnz r3, 800a674 <_free_r+0x2c>
800a666: 6063 str r3, [r4, #4]
800a668: 6014 str r4, [r2, #0]
800a66a: 4628 mov r0, r5
800a66c: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800a670: f000 b8da b.w 800a828 <__malloc_unlock>
800a674: 42a3 cmp r3, r4
800a676: d908 bls.n 800a68a <_free_r+0x42>
800a678: 6820 ldr r0, [r4, #0]
800a67a: 1821 adds r1, r4, r0
800a67c: 428b cmp r3, r1
800a67e: bf01 itttt eq
800a680: 6819 ldreq r1, [r3, #0]
800a682: 685b ldreq r3, [r3, #4]
800a684: 1809 addeq r1, r1, r0
800a686: 6021 streq r1, [r4, #0]
800a688: e7ed b.n 800a666 <_free_r+0x1e>
800a68a: 461a mov r2, r3
800a68c: 685b ldr r3, [r3, #4]
800a68e: b10b cbz r3, 800a694 <_free_r+0x4c>
800a690: 42a3 cmp r3, r4
800a692: d9fa bls.n 800a68a <_free_r+0x42>
800a694: 6811 ldr r1, [r2, #0]
800a696: 1850 adds r0, r2, r1
800a698: 42a0 cmp r0, r4
800a69a: d10b bne.n 800a6b4 <_free_r+0x6c>
800a69c: 6820 ldr r0, [r4, #0]
800a69e: 4401 add r1, r0
800a6a0: 1850 adds r0, r2, r1
800a6a2: 4283 cmp r3, r0
800a6a4: 6011 str r1, [r2, #0]
800a6a6: d1e0 bne.n 800a66a <_free_r+0x22>
800a6a8: 6818 ldr r0, [r3, #0]
800a6aa: 685b ldr r3, [r3, #4]
800a6ac: 4408 add r0, r1
800a6ae: 6010 str r0, [r2, #0]
800a6b0: 6053 str r3, [r2, #4]
800a6b2: e7da b.n 800a66a <_free_r+0x22>
800a6b4: d902 bls.n 800a6bc <_free_r+0x74>
800a6b6: 230c movs r3, #12
800a6b8: 602b str r3, [r5, #0]
800a6ba: e7d6 b.n 800a66a <_free_r+0x22>
800a6bc: 6820 ldr r0, [r4, #0]
800a6be: 1821 adds r1, r4, r0
800a6c0: 428b cmp r3, r1
800a6c2: bf01 itttt eq
800a6c4: 6819 ldreq r1, [r3, #0]
800a6c6: 685b ldreq r3, [r3, #4]
800a6c8: 1809 addeq r1, r1, r0
800a6ca: 6021 streq r1, [r4, #0]
800a6cc: 6063 str r3, [r4, #4]
800a6ce: 6054 str r4, [r2, #4]
800a6d0: e7cb b.n 800a66a <_free_r+0x22>
800a6d2: bd38 pop {r3, r4, r5, pc}
800a6d4: 200017d8 .word 0x200017d8
0800a6d8 <sbrk_aligned>:
800a6d8: b570 push {r4, r5, r6, lr}
800a6da: 4e0f ldr r6, [pc, #60] @ (800a718 <sbrk_aligned+0x40>)
800a6dc: 460c mov r4, r1
800a6de: 6831 ldr r1, [r6, #0]
800a6e0: 4605 mov r5, r0
800a6e2: b911 cbnz r1, 800a6ea <sbrk_aligned+0x12>
800a6e4: f000 fba8 bl 800ae38 <_sbrk_r>
800a6e8: 6030 str r0, [r6, #0]
800a6ea: 4621 mov r1, r4
800a6ec: 4628 mov r0, r5
800a6ee: f000 fba3 bl 800ae38 <_sbrk_r>
800a6f2: 1c43 adds r3, r0, #1
800a6f4: d103 bne.n 800a6fe <sbrk_aligned+0x26>
800a6f6: f04f 34ff mov.w r4, #4294967295
800a6fa: 4620 mov r0, r4
800a6fc: bd70 pop {r4, r5, r6, pc}
800a6fe: 1cc4 adds r4, r0, #3
800a700: f024 0403 bic.w r4, r4, #3
800a704: 42a0 cmp r0, r4
800a706: d0f8 beq.n 800a6fa <sbrk_aligned+0x22>
800a708: 1a21 subs r1, r4, r0
800a70a: 4628 mov r0, r5
800a70c: f000 fb94 bl 800ae38 <_sbrk_r>
800a710: 3001 adds r0, #1
800a712: d1f2 bne.n 800a6fa <sbrk_aligned+0x22>
800a714: e7ef b.n 800a6f6 <sbrk_aligned+0x1e>
800a716: bf00 nop
800a718: 200017d4 .word 0x200017d4
0800a71c <_malloc_r>:
800a71c: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800a720: 1ccd adds r5, r1, #3
800a722: f025 0503 bic.w r5, r5, #3
800a726: 3508 adds r5, #8
800a728: 2d0c cmp r5, #12
800a72a: bf38 it cc
800a72c: 250c movcc r5, #12
800a72e: 2d00 cmp r5, #0
800a730: 4606 mov r6, r0
800a732: db01 blt.n 800a738 <_malloc_r+0x1c>
800a734: 42a9 cmp r1, r5
800a736: d904 bls.n 800a742 <_malloc_r+0x26>
800a738: 230c movs r3, #12
800a73a: 6033 str r3, [r6, #0]
800a73c: 2000 movs r0, #0
800a73e: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800a742: f8df 80d4 ldr.w r8, [pc, #212] @ 800a818 <_malloc_r+0xfc>
800a746: f000 f869 bl 800a81c <__malloc_lock>
800a74a: f8d8 3000 ldr.w r3, [r8]
800a74e: 461c mov r4, r3
800a750: bb44 cbnz r4, 800a7a4 <_malloc_r+0x88>
800a752: 4629 mov r1, r5
800a754: 4630 mov r0, r6
800a756: f7ff ffbf bl 800a6d8 <sbrk_aligned>
800a75a: 1c43 adds r3, r0, #1
800a75c: 4604 mov r4, r0
800a75e: d158 bne.n 800a812 <_malloc_r+0xf6>
800a760: f8d8 4000 ldr.w r4, [r8]
800a764: 4627 mov r7, r4
800a766: 2f00 cmp r7, #0
800a768: d143 bne.n 800a7f2 <_malloc_r+0xd6>
800a76a: 2c00 cmp r4, #0
800a76c: d04b beq.n 800a806 <_malloc_r+0xea>
800a76e: 6823 ldr r3, [r4, #0]
800a770: 4639 mov r1, r7
800a772: 4630 mov r0, r6
800a774: eb04 0903 add.w r9, r4, r3
800a778: f000 fb5e bl 800ae38 <_sbrk_r>
800a77c: 4581 cmp r9, r0
800a77e: d142 bne.n 800a806 <_malloc_r+0xea>
800a780: 6821 ldr r1, [r4, #0]
800a782: 4630 mov r0, r6
800a784: 1a6d subs r5, r5, r1
800a786: 4629 mov r1, r5
800a788: f7ff ffa6 bl 800a6d8 <sbrk_aligned>
800a78c: 3001 adds r0, #1
800a78e: d03a beq.n 800a806 <_malloc_r+0xea>
800a790: 6823 ldr r3, [r4, #0]
800a792: 442b add r3, r5
800a794: 6023 str r3, [r4, #0]
800a796: f8d8 3000 ldr.w r3, [r8]
800a79a: 685a ldr r2, [r3, #4]
800a79c: bb62 cbnz r2, 800a7f8 <_malloc_r+0xdc>
800a79e: f8c8 7000 str.w r7, [r8]
800a7a2: e00f b.n 800a7c4 <_malloc_r+0xa8>
800a7a4: 6822 ldr r2, [r4, #0]
800a7a6: 1b52 subs r2, r2, r5
800a7a8: d420 bmi.n 800a7ec <_malloc_r+0xd0>
800a7aa: 2a0b cmp r2, #11
800a7ac: d917 bls.n 800a7de <_malloc_r+0xc2>
800a7ae: 1961 adds r1, r4, r5
800a7b0: 42a3 cmp r3, r4
800a7b2: 6025 str r5, [r4, #0]
800a7b4: bf18 it ne
800a7b6: 6059 strne r1, [r3, #4]
800a7b8: 6863 ldr r3, [r4, #4]
800a7ba: bf08 it eq
800a7bc: f8c8 1000 streq.w r1, [r8]
800a7c0: 5162 str r2, [r4, r5]
800a7c2: 604b str r3, [r1, #4]
800a7c4: 4630 mov r0, r6
800a7c6: f000 f82f bl 800a828 <__malloc_unlock>
800a7ca: f104 000b add.w r0, r4, #11
800a7ce: 1d23 adds r3, r4, #4
800a7d0: f020 0007 bic.w r0, r0, #7
800a7d4: 1ac2 subs r2, r0, r3
800a7d6: bf1c itt ne
800a7d8: 1a1b subne r3, r3, r0
800a7da: 50a3 strne r3, [r4, r2]
800a7dc: e7af b.n 800a73e <_malloc_r+0x22>
800a7de: 6862 ldr r2, [r4, #4]
800a7e0: 42a3 cmp r3, r4
800a7e2: bf0c ite eq
800a7e4: f8c8 2000 streq.w r2, [r8]
800a7e8: 605a strne r2, [r3, #4]
800a7ea: e7eb b.n 800a7c4 <_malloc_r+0xa8>
800a7ec: 4623 mov r3, r4
800a7ee: 6864 ldr r4, [r4, #4]
800a7f0: e7ae b.n 800a750 <_malloc_r+0x34>
800a7f2: 463c mov r4, r7
800a7f4: 687f ldr r7, [r7, #4]
800a7f6: e7b6 b.n 800a766 <_malloc_r+0x4a>
800a7f8: 461a mov r2, r3
800a7fa: 685b ldr r3, [r3, #4]
800a7fc: 42a3 cmp r3, r4
800a7fe: d1fb bne.n 800a7f8 <_malloc_r+0xdc>
800a800: 2300 movs r3, #0
800a802: 6053 str r3, [r2, #4]
800a804: e7de b.n 800a7c4 <_malloc_r+0xa8>
800a806: 230c movs r3, #12
800a808: 4630 mov r0, r6
800a80a: 6033 str r3, [r6, #0]
800a80c: f000 f80c bl 800a828 <__malloc_unlock>
800a810: e794 b.n 800a73c <_malloc_r+0x20>
800a812: 6005 str r5, [r0, #0]
800a814: e7d6 b.n 800a7c4 <_malloc_r+0xa8>
800a816: bf00 nop
800a818: 200017d8 .word 0x200017d8
0800a81c <__malloc_lock>:
800a81c: 4801 ldr r0, [pc, #4] @ (800a824 <__malloc_lock+0x8>)
800a81e: f7ff bf11 b.w 800a644 <__retarget_lock_acquire_recursive>
800a822: bf00 nop
800a824: 200017d0 .word 0x200017d0
0800a828 <__malloc_unlock>:
800a828: 4801 ldr r0, [pc, #4] @ (800a830 <__malloc_unlock+0x8>)
800a82a: f7ff bf0c b.w 800a646 <__retarget_lock_release_recursive>
800a82e: bf00 nop
800a830: 200017d0 .word 0x200017d0
0800a834 <__ssputs_r>:
800a834: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800a838: 461f mov r7, r3
800a83a: 688e ldr r6, [r1, #8]
800a83c: 4682 mov sl, r0
800a83e: 42be cmp r6, r7
800a840: 460c mov r4, r1
800a842: 4690 mov r8, r2
800a844: 680b ldr r3, [r1, #0]
800a846: d82d bhi.n 800a8a4 <__ssputs_r+0x70>
800a848: f9b1 200c ldrsh.w r2, [r1, #12]
800a84c: f412 6f90 tst.w r2, #1152 @ 0x480
800a850: d026 beq.n 800a8a0 <__ssputs_r+0x6c>
800a852: 6965 ldr r5, [r4, #20]
800a854: 6909 ldr r1, [r1, #16]
800a856: eb05 0545 add.w r5, r5, r5, lsl #1
800a85a: eba3 0901 sub.w r9, r3, r1
800a85e: eb05 75d5 add.w r5, r5, r5, lsr #31
800a862: 1c7b adds r3, r7, #1
800a864: 444b add r3, r9
800a866: 106d asrs r5, r5, #1
800a868: 429d cmp r5, r3
800a86a: bf38 it cc
800a86c: 461d movcc r5, r3
800a86e: 0553 lsls r3, r2, #21
800a870: d527 bpl.n 800a8c2 <__ssputs_r+0x8e>
800a872: 4629 mov r1, r5
800a874: f7ff ff52 bl 800a71c <_malloc_r>
800a878: 4606 mov r6, r0
800a87a: b360 cbz r0, 800a8d6 <__ssputs_r+0xa2>
800a87c: 464a mov r2, r9
800a87e: 6921 ldr r1, [r4, #16]
800a880: f000 faf8 bl 800ae74 <memcpy>
800a884: 89a3 ldrh r3, [r4, #12]
800a886: f423 6390 bic.w r3, r3, #1152 @ 0x480
800a88a: f043 0380 orr.w r3, r3, #128 @ 0x80
800a88e: 81a3 strh r3, [r4, #12]
800a890: 6126 str r6, [r4, #16]
800a892: 444e add r6, r9
800a894: 6026 str r6, [r4, #0]
800a896: 463e mov r6, r7
800a898: 6165 str r5, [r4, #20]
800a89a: eba5 0509 sub.w r5, r5, r9
800a89e: 60a5 str r5, [r4, #8]
800a8a0: 42be cmp r6, r7
800a8a2: d900 bls.n 800a8a6 <__ssputs_r+0x72>
800a8a4: 463e mov r6, r7
800a8a6: 4632 mov r2, r6
800a8a8: 4641 mov r1, r8
800a8aa: 6820 ldr r0, [r4, #0]
800a8ac: f000 faaa bl 800ae04 <memmove>
800a8b0: 2000 movs r0, #0
800a8b2: 68a3 ldr r3, [r4, #8]
800a8b4: 1b9b subs r3, r3, r6
800a8b6: 60a3 str r3, [r4, #8]
800a8b8: 6823 ldr r3, [r4, #0]
800a8ba: 4433 add r3, r6
800a8bc: 6023 str r3, [r4, #0]
800a8be: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800a8c2: 462a mov r2, r5
800a8c4: f000 fae4 bl 800ae90 <_realloc_r>
800a8c8: 4606 mov r6, r0
800a8ca: 2800 cmp r0, #0
800a8cc: d1e0 bne.n 800a890 <__ssputs_r+0x5c>
800a8ce: 4650 mov r0, sl
800a8d0: 6921 ldr r1, [r4, #16]
800a8d2: f7ff feb9 bl 800a648 <_free_r>
800a8d6: 230c movs r3, #12
800a8d8: f8ca 3000 str.w r3, [sl]
800a8dc: 89a3 ldrh r3, [r4, #12]
800a8de: f04f 30ff mov.w r0, #4294967295
800a8e2: f043 0340 orr.w r3, r3, #64 @ 0x40
800a8e6: 81a3 strh r3, [r4, #12]
800a8e8: e7e9 b.n 800a8be <__ssputs_r+0x8a>
...
0800a8ec <_svfiprintf_r>:
800a8ec: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800a8f0: 4698 mov r8, r3
800a8f2: 898b ldrh r3, [r1, #12]
800a8f4: 4607 mov r7, r0
800a8f6: 061b lsls r3, r3, #24
800a8f8: 460d mov r5, r1
800a8fa: 4614 mov r4, r2
800a8fc: b09d sub sp, #116 @ 0x74
800a8fe: d510 bpl.n 800a922 <_svfiprintf_r+0x36>
800a900: 690b ldr r3, [r1, #16]
800a902: b973 cbnz r3, 800a922 <_svfiprintf_r+0x36>
800a904: 2140 movs r1, #64 @ 0x40
800a906: f7ff ff09 bl 800a71c <_malloc_r>
800a90a: 6028 str r0, [r5, #0]
800a90c: 6128 str r0, [r5, #16]
800a90e: b930 cbnz r0, 800a91e <_svfiprintf_r+0x32>
800a910: 230c movs r3, #12
800a912: 603b str r3, [r7, #0]
800a914: f04f 30ff mov.w r0, #4294967295
800a918: b01d add sp, #116 @ 0x74
800a91a: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800a91e: 2340 movs r3, #64 @ 0x40
800a920: 616b str r3, [r5, #20]
800a922: 2300 movs r3, #0
800a924: 9309 str r3, [sp, #36] @ 0x24
800a926: 2320 movs r3, #32
800a928: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800a92c: 2330 movs r3, #48 @ 0x30
800a92e: f04f 0901 mov.w r9, #1
800a932: f8cd 800c str.w r8, [sp, #12]
800a936: f8df 8198 ldr.w r8, [pc, #408] @ 800aad0 <_svfiprintf_r+0x1e4>
800a93a: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800a93e: 4623 mov r3, r4
800a940: 469a mov sl, r3
800a942: f813 2b01 ldrb.w r2, [r3], #1
800a946: b10a cbz r2, 800a94c <_svfiprintf_r+0x60>
800a948: 2a25 cmp r2, #37 @ 0x25
800a94a: d1f9 bne.n 800a940 <_svfiprintf_r+0x54>
800a94c: ebba 0b04 subs.w fp, sl, r4
800a950: d00b beq.n 800a96a <_svfiprintf_r+0x7e>
800a952: 465b mov r3, fp
800a954: 4622 mov r2, r4
800a956: 4629 mov r1, r5
800a958: 4638 mov r0, r7
800a95a: f7ff ff6b bl 800a834 <__ssputs_r>
800a95e: 3001 adds r0, #1
800a960: f000 80a7 beq.w 800aab2 <_svfiprintf_r+0x1c6>
800a964: 9a09 ldr r2, [sp, #36] @ 0x24
800a966: 445a add r2, fp
800a968: 9209 str r2, [sp, #36] @ 0x24
800a96a: f89a 3000 ldrb.w r3, [sl]
800a96e: 2b00 cmp r3, #0
800a970: f000 809f beq.w 800aab2 <_svfiprintf_r+0x1c6>
800a974: 2300 movs r3, #0
800a976: f04f 32ff mov.w r2, #4294967295
800a97a: e9cd 2305 strd r2, r3, [sp, #20]
800a97e: f10a 0a01 add.w sl, sl, #1
800a982: 9304 str r3, [sp, #16]
800a984: 9307 str r3, [sp, #28]
800a986: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800a98a: 931a str r3, [sp, #104] @ 0x68
800a98c: 4654 mov r4, sl
800a98e: 2205 movs r2, #5
800a990: f814 1b01 ldrb.w r1, [r4], #1
800a994: 484e ldr r0, [pc, #312] @ (800aad0 <_svfiprintf_r+0x1e4>)
800a996: f000 fa5f bl 800ae58 <memchr>
800a99a: 9a04 ldr r2, [sp, #16]
800a99c: b9d8 cbnz r0, 800a9d6 <_svfiprintf_r+0xea>
800a99e: 06d0 lsls r0, r2, #27
800a9a0: bf44 itt mi
800a9a2: 2320 movmi r3, #32
800a9a4: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800a9a8: 0711 lsls r1, r2, #28
800a9aa: bf44 itt mi
800a9ac: 232b movmi r3, #43 @ 0x2b
800a9ae: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800a9b2: f89a 3000 ldrb.w r3, [sl]
800a9b6: 2b2a cmp r3, #42 @ 0x2a
800a9b8: d015 beq.n 800a9e6 <_svfiprintf_r+0xfa>
800a9ba: 4654 mov r4, sl
800a9bc: 2000 movs r0, #0
800a9be: f04f 0c0a mov.w ip, #10
800a9c2: 9a07 ldr r2, [sp, #28]
800a9c4: 4621 mov r1, r4
800a9c6: f811 3b01 ldrb.w r3, [r1], #1
800a9ca: 3b30 subs r3, #48 @ 0x30
800a9cc: 2b09 cmp r3, #9
800a9ce: d94b bls.n 800aa68 <_svfiprintf_r+0x17c>
800a9d0: b1b0 cbz r0, 800aa00 <_svfiprintf_r+0x114>
800a9d2: 9207 str r2, [sp, #28]
800a9d4: e014 b.n 800aa00 <_svfiprintf_r+0x114>
800a9d6: eba0 0308 sub.w r3, r0, r8
800a9da: fa09 f303 lsl.w r3, r9, r3
800a9de: 4313 orrs r3, r2
800a9e0: 46a2 mov sl, r4
800a9e2: 9304 str r3, [sp, #16]
800a9e4: e7d2 b.n 800a98c <_svfiprintf_r+0xa0>
800a9e6: 9b03 ldr r3, [sp, #12]
800a9e8: 1d19 adds r1, r3, #4
800a9ea: 681b ldr r3, [r3, #0]
800a9ec: 9103 str r1, [sp, #12]
800a9ee: 2b00 cmp r3, #0
800a9f0: bfbb ittet lt
800a9f2: 425b neglt r3, r3
800a9f4: f042 0202 orrlt.w r2, r2, #2
800a9f8: 9307 strge r3, [sp, #28]
800a9fa: 9307 strlt r3, [sp, #28]
800a9fc: bfb8 it lt
800a9fe: 9204 strlt r2, [sp, #16]
800aa00: 7823 ldrb r3, [r4, #0]
800aa02: 2b2e cmp r3, #46 @ 0x2e
800aa04: d10a bne.n 800aa1c <_svfiprintf_r+0x130>
800aa06: 7863 ldrb r3, [r4, #1]
800aa08: 2b2a cmp r3, #42 @ 0x2a
800aa0a: d132 bne.n 800aa72 <_svfiprintf_r+0x186>
800aa0c: 9b03 ldr r3, [sp, #12]
800aa0e: 3402 adds r4, #2
800aa10: 1d1a adds r2, r3, #4
800aa12: 681b ldr r3, [r3, #0]
800aa14: 9203 str r2, [sp, #12]
800aa16: ea43 73e3 orr.w r3, r3, r3, asr #31
800aa1a: 9305 str r3, [sp, #20]
800aa1c: f8df a0b4 ldr.w sl, [pc, #180] @ 800aad4 <_svfiprintf_r+0x1e8>
800aa20: 2203 movs r2, #3
800aa22: 4650 mov r0, sl
800aa24: 7821 ldrb r1, [r4, #0]
800aa26: f000 fa17 bl 800ae58 <memchr>
800aa2a: b138 cbz r0, 800aa3c <_svfiprintf_r+0x150>
800aa2c: 2240 movs r2, #64 @ 0x40
800aa2e: 9b04 ldr r3, [sp, #16]
800aa30: eba0 000a sub.w r0, r0, sl
800aa34: 4082 lsls r2, r0
800aa36: 4313 orrs r3, r2
800aa38: 3401 adds r4, #1
800aa3a: 9304 str r3, [sp, #16]
800aa3c: f814 1b01 ldrb.w r1, [r4], #1
800aa40: 2206 movs r2, #6
800aa42: 4825 ldr r0, [pc, #148] @ (800aad8 <_svfiprintf_r+0x1ec>)
800aa44: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800aa48: f000 fa06 bl 800ae58 <memchr>
800aa4c: 2800 cmp r0, #0
800aa4e: d036 beq.n 800aabe <_svfiprintf_r+0x1d2>
800aa50: 4b22 ldr r3, [pc, #136] @ (800aadc <_svfiprintf_r+0x1f0>)
800aa52: bb1b cbnz r3, 800aa9c <_svfiprintf_r+0x1b0>
800aa54: 9b03 ldr r3, [sp, #12]
800aa56: 3307 adds r3, #7
800aa58: f023 0307 bic.w r3, r3, #7
800aa5c: 3308 adds r3, #8
800aa5e: 9303 str r3, [sp, #12]
800aa60: 9b09 ldr r3, [sp, #36] @ 0x24
800aa62: 4433 add r3, r6
800aa64: 9309 str r3, [sp, #36] @ 0x24
800aa66: e76a b.n 800a93e <_svfiprintf_r+0x52>
800aa68: 460c mov r4, r1
800aa6a: 2001 movs r0, #1
800aa6c: fb0c 3202 mla r2, ip, r2, r3
800aa70: e7a8 b.n 800a9c4 <_svfiprintf_r+0xd8>
800aa72: 2300 movs r3, #0
800aa74: f04f 0c0a mov.w ip, #10
800aa78: 4619 mov r1, r3
800aa7a: 3401 adds r4, #1
800aa7c: 9305 str r3, [sp, #20]
800aa7e: 4620 mov r0, r4
800aa80: f810 2b01 ldrb.w r2, [r0], #1
800aa84: 3a30 subs r2, #48 @ 0x30
800aa86: 2a09 cmp r2, #9
800aa88: d903 bls.n 800aa92 <_svfiprintf_r+0x1a6>
800aa8a: 2b00 cmp r3, #0
800aa8c: d0c6 beq.n 800aa1c <_svfiprintf_r+0x130>
800aa8e: 9105 str r1, [sp, #20]
800aa90: e7c4 b.n 800aa1c <_svfiprintf_r+0x130>
800aa92: 4604 mov r4, r0
800aa94: 2301 movs r3, #1
800aa96: fb0c 2101 mla r1, ip, r1, r2
800aa9a: e7f0 b.n 800aa7e <_svfiprintf_r+0x192>
800aa9c: ab03 add r3, sp, #12
800aa9e: 9300 str r3, [sp, #0]
800aaa0: 462a mov r2, r5
800aaa2: 4638 mov r0, r7
800aaa4: 4b0e ldr r3, [pc, #56] @ (800aae0 <_svfiprintf_r+0x1f4>)
800aaa6: a904 add r1, sp, #16
800aaa8: f3af 8000 nop.w
800aaac: 1c42 adds r2, r0, #1
800aaae: 4606 mov r6, r0
800aab0: d1d6 bne.n 800aa60 <_svfiprintf_r+0x174>
800aab2: 89ab ldrh r3, [r5, #12]
800aab4: 065b lsls r3, r3, #25
800aab6: f53f af2d bmi.w 800a914 <_svfiprintf_r+0x28>
800aaba: 9809 ldr r0, [sp, #36] @ 0x24
800aabc: e72c b.n 800a918 <_svfiprintf_r+0x2c>
800aabe: ab03 add r3, sp, #12
800aac0: 9300 str r3, [sp, #0]
800aac2: 462a mov r2, r5
800aac4: 4638 mov r0, r7
800aac6: 4b06 ldr r3, [pc, #24] @ (800aae0 <_svfiprintf_r+0x1f4>)
800aac8: a904 add r1, sp, #16
800aaca: f000 f87d bl 800abc8 <_printf_i>
800aace: e7ed b.n 800aaac <_svfiprintf_r+0x1c0>
800aad0: 0800b102 .word 0x0800b102
800aad4: 0800b108 .word 0x0800b108
800aad8: 0800b10c .word 0x0800b10c
800aadc: 00000000 .word 0x00000000
800aae0: 0800a835 .word 0x0800a835
0800aae4 <_printf_common>:
800aae4: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800aae8: 4616 mov r6, r2
800aaea: 4698 mov r8, r3
800aaec: 688a ldr r2, [r1, #8]
800aaee: 690b ldr r3, [r1, #16]
800aaf0: 4607 mov r7, r0
800aaf2: 4293 cmp r3, r2
800aaf4: bfb8 it lt
800aaf6: 4613 movlt r3, r2
800aaf8: 6033 str r3, [r6, #0]
800aafa: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800aafe: 460c mov r4, r1
800ab00: f8dd 9020 ldr.w r9, [sp, #32]
800ab04: b10a cbz r2, 800ab0a <_printf_common+0x26>
800ab06: 3301 adds r3, #1
800ab08: 6033 str r3, [r6, #0]
800ab0a: 6823 ldr r3, [r4, #0]
800ab0c: 0699 lsls r1, r3, #26
800ab0e: bf42 ittt mi
800ab10: 6833 ldrmi r3, [r6, #0]
800ab12: 3302 addmi r3, #2
800ab14: 6033 strmi r3, [r6, #0]
800ab16: 6825 ldr r5, [r4, #0]
800ab18: f015 0506 ands.w r5, r5, #6
800ab1c: d106 bne.n 800ab2c <_printf_common+0x48>
800ab1e: f104 0a19 add.w sl, r4, #25
800ab22: 68e3 ldr r3, [r4, #12]
800ab24: 6832 ldr r2, [r6, #0]
800ab26: 1a9b subs r3, r3, r2
800ab28: 42ab cmp r3, r5
800ab2a: dc2b bgt.n 800ab84 <_printf_common+0xa0>
800ab2c: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800ab30: 6822 ldr r2, [r4, #0]
800ab32: 3b00 subs r3, #0
800ab34: bf18 it ne
800ab36: 2301 movne r3, #1
800ab38: 0692 lsls r2, r2, #26
800ab3a: d430 bmi.n 800ab9e <_printf_common+0xba>
800ab3c: 4641 mov r1, r8
800ab3e: 4638 mov r0, r7
800ab40: f104 0243 add.w r2, r4, #67 @ 0x43
800ab44: 47c8 blx r9
800ab46: 3001 adds r0, #1
800ab48: d023 beq.n 800ab92 <_printf_common+0xae>
800ab4a: 6823 ldr r3, [r4, #0]
800ab4c: 6922 ldr r2, [r4, #16]
800ab4e: f003 0306 and.w r3, r3, #6
800ab52: 2b04 cmp r3, #4
800ab54: bf14 ite ne
800ab56: 2500 movne r5, #0
800ab58: 6833 ldreq r3, [r6, #0]
800ab5a: f04f 0600 mov.w r6, #0
800ab5e: bf08 it eq
800ab60: 68e5 ldreq r5, [r4, #12]
800ab62: f104 041a add.w r4, r4, #26
800ab66: bf08 it eq
800ab68: 1aed subeq r5, r5, r3
800ab6a: f854 3c12 ldr.w r3, [r4, #-18]
800ab6e: bf08 it eq
800ab70: ea25 75e5 biceq.w r5, r5, r5, asr #31
800ab74: 4293 cmp r3, r2
800ab76: bfc4 itt gt
800ab78: 1a9b subgt r3, r3, r2
800ab7a: 18ed addgt r5, r5, r3
800ab7c: 42b5 cmp r5, r6
800ab7e: d11a bne.n 800abb6 <_printf_common+0xd2>
800ab80: 2000 movs r0, #0
800ab82: e008 b.n 800ab96 <_printf_common+0xb2>
800ab84: 2301 movs r3, #1
800ab86: 4652 mov r2, sl
800ab88: 4641 mov r1, r8
800ab8a: 4638 mov r0, r7
800ab8c: 47c8 blx r9
800ab8e: 3001 adds r0, #1
800ab90: d103 bne.n 800ab9a <_printf_common+0xb6>
800ab92: f04f 30ff mov.w r0, #4294967295
800ab96: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800ab9a: 3501 adds r5, #1
800ab9c: e7c1 b.n 800ab22 <_printf_common+0x3e>
800ab9e: 2030 movs r0, #48 @ 0x30
800aba0: 18e1 adds r1, r4, r3
800aba2: f881 0043 strb.w r0, [r1, #67] @ 0x43
800aba6: 1c5a adds r2, r3, #1
800aba8: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800abac: 4422 add r2, r4
800abae: 3302 adds r3, #2
800abb0: f882 1043 strb.w r1, [r2, #67] @ 0x43
800abb4: e7c2 b.n 800ab3c <_printf_common+0x58>
800abb6: 2301 movs r3, #1
800abb8: 4622 mov r2, r4
800abba: 4641 mov r1, r8
800abbc: 4638 mov r0, r7
800abbe: 47c8 blx r9
800abc0: 3001 adds r0, #1
800abc2: d0e6 beq.n 800ab92 <_printf_common+0xae>
800abc4: 3601 adds r6, #1
800abc6: e7d9 b.n 800ab7c <_printf_common+0x98>
0800abc8 <_printf_i>:
800abc8: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800abcc: 7e0f ldrb r7, [r1, #24]
800abce: 4691 mov r9, r2
800abd0: 2f78 cmp r7, #120 @ 0x78
800abd2: 4680 mov r8, r0
800abd4: 460c mov r4, r1
800abd6: 469a mov sl, r3
800abd8: 9e0c ldr r6, [sp, #48] @ 0x30
800abda: f101 0243 add.w r2, r1, #67 @ 0x43
800abde: d807 bhi.n 800abf0 <_printf_i+0x28>
800abe0: 2f62 cmp r7, #98 @ 0x62
800abe2: d80a bhi.n 800abfa <_printf_i+0x32>
800abe4: 2f00 cmp r7, #0
800abe6: f000 80d1 beq.w 800ad8c <_printf_i+0x1c4>
800abea: 2f58 cmp r7, #88 @ 0x58
800abec: f000 80b8 beq.w 800ad60 <_printf_i+0x198>
800abf0: f104 0642 add.w r6, r4, #66 @ 0x42
800abf4: f884 7042 strb.w r7, [r4, #66] @ 0x42
800abf8: e03a b.n 800ac70 <_printf_i+0xa8>
800abfa: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800abfe: 2b15 cmp r3, #21
800ac00: d8f6 bhi.n 800abf0 <_printf_i+0x28>
800ac02: a101 add r1, pc, #4 @ (adr r1, 800ac08 <_printf_i+0x40>)
800ac04: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800ac08: 0800ac61 .word 0x0800ac61
800ac0c: 0800ac75 .word 0x0800ac75
800ac10: 0800abf1 .word 0x0800abf1
800ac14: 0800abf1 .word 0x0800abf1
800ac18: 0800abf1 .word 0x0800abf1
800ac1c: 0800abf1 .word 0x0800abf1
800ac20: 0800ac75 .word 0x0800ac75
800ac24: 0800abf1 .word 0x0800abf1
800ac28: 0800abf1 .word 0x0800abf1
800ac2c: 0800abf1 .word 0x0800abf1
800ac30: 0800abf1 .word 0x0800abf1
800ac34: 0800ad73 .word 0x0800ad73
800ac38: 0800ac9f .word 0x0800ac9f
800ac3c: 0800ad2d .word 0x0800ad2d
800ac40: 0800abf1 .word 0x0800abf1
800ac44: 0800abf1 .word 0x0800abf1
800ac48: 0800ad95 .word 0x0800ad95
800ac4c: 0800abf1 .word 0x0800abf1
800ac50: 0800ac9f .word 0x0800ac9f
800ac54: 0800abf1 .word 0x0800abf1
800ac58: 0800abf1 .word 0x0800abf1
800ac5c: 0800ad35 .word 0x0800ad35
800ac60: 6833 ldr r3, [r6, #0]
800ac62: 1d1a adds r2, r3, #4
800ac64: 681b ldr r3, [r3, #0]
800ac66: 6032 str r2, [r6, #0]
800ac68: f104 0642 add.w r6, r4, #66 @ 0x42
800ac6c: f884 3042 strb.w r3, [r4, #66] @ 0x42
800ac70: 2301 movs r3, #1
800ac72: e09c b.n 800adae <_printf_i+0x1e6>
800ac74: 6833 ldr r3, [r6, #0]
800ac76: 6820 ldr r0, [r4, #0]
800ac78: 1d19 adds r1, r3, #4
800ac7a: 6031 str r1, [r6, #0]
800ac7c: 0606 lsls r6, r0, #24
800ac7e: d501 bpl.n 800ac84 <_printf_i+0xbc>
800ac80: 681d ldr r5, [r3, #0]
800ac82: e003 b.n 800ac8c <_printf_i+0xc4>
800ac84: 0645 lsls r5, r0, #25
800ac86: d5fb bpl.n 800ac80 <_printf_i+0xb8>
800ac88: f9b3 5000 ldrsh.w r5, [r3]
800ac8c: 2d00 cmp r5, #0
800ac8e: da03 bge.n 800ac98 <_printf_i+0xd0>
800ac90: 232d movs r3, #45 @ 0x2d
800ac92: 426d negs r5, r5
800ac94: f884 3043 strb.w r3, [r4, #67] @ 0x43
800ac98: 230a movs r3, #10
800ac9a: 4858 ldr r0, [pc, #352] @ (800adfc <_printf_i+0x234>)
800ac9c: e011 b.n 800acc2 <_printf_i+0xfa>
800ac9e: 6821 ldr r1, [r4, #0]
800aca0: 6833 ldr r3, [r6, #0]
800aca2: 0608 lsls r0, r1, #24
800aca4: f853 5b04 ldr.w r5, [r3], #4
800aca8: d402 bmi.n 800acb0 <_printf_i+0xe8>
800acaa: 0649 lsls r1, r1, #25
800acac: bf48 it mi
800acae: b2ad uxthmi r5, r5
800acb0: 2f6f cmp r7, #111 @ 0x6f
800acb2: 6033 str r3, [r6, #0]
800acb4: bf14 ite ne
800acb6: 230a movne r3, #10
800acb8: 2308 moveq r3, #8
800acba: 4850 ldr r0, [pc, #320] @ (800adfc <_printf_i+0x234>)
800acbc: 2100 movs r1, #0
800acbe: f884 1043 strb.w r1, [r4, #67] @ 0x43
800acc2: 6866 ldr r6, [r4, #4]
800acc4: 2e00 cmp r6, #0
800acc6: 60a6 str r6, [r4, #8]
800acc8: db05 blt.n 800acd6 <_printf_i+0x10e>
800acca: 6821 ldr r1, [r4, #0]
800accc: 432e orrs r6, r5
800acce: f021 0104 bic.w r1, r1, #4
800acd2: 6021 str r1, [r4, #0]
800acd4: d04b beq.n 800ad6e <_printf_i+0x1a6>
800acd6: 4616 mov r6, r2
800acd8: fbb5 f1f3 udiv r1, r5, r3
800acdc: fb03 5711 mls r7, r3, r1, r5
800ace0: 5dc7 ldrb r7, [r0, r7]
800ace2: f806 7d01 strb.w r7, [r6, #-1]!
800ace6: 462f mov r7, r5
800ace8: 42bb cmp r3, r7
800acea: 460d mov r5, r1
800acec: d9f4 bls.n 800acd8 <_printf_i+0x110>
800acee: 2b08 cmp r3, #8
800acf0: d10b bne.n 800ad0a <_printf_i+0x142>
800acf2: 6823 ldr r3, [r4, #0]
800acf4: 07df lsls r7, r3, #31
800acf6: d508 bpl.n 800ad0a <_printf_i+0x142>
800acf8: 6923 ldr r3, [r4, #16]
800acfa: 6861 ldr r1, [r4, #4]
800acfc: 4299 cmp r1, r3
800acfe: bfde ittt le
800ad00: 2330 movle r3, #48 @ 0x30
800ad02: f806 3c01 strble.w r3, [r6, #-1]
800ad06: f106 36ff addle.w r6, r6, #4294967295
800ad0a: 1b92 subs r2, r2, r6
800ad0c: 6122 str r2, [r4, #16]
800ad0e: 464b mov r3, r9
800ad10: 4621 mov r1, r4
800ad12: 4640 mov r0, r8
800ad14: f8cd a000 str.w sl, [sp]
800ad18: aa03 add r2, sp, #12
800ad1a: f7ff fee3 bl 800aae4 <_printf_common>
800ad1e: 3001 adds r0, #1
800ad20: d14a bne.n 800adb8 <_printf_i+0x1f0>
800ad22: f04f 30ff mov.w r0, #4294967295
800ad26: b004 add sp, #16
800ad28: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800ad2c: 6823 ldr r3, [r4, #0]
800ad2e: f043 0320 orr.w r3, r3, #32
800ad32: 6023 str r3, [r4, #0]
800ad34: 2778 movs r7, #120 @ 0x78
800ad36: 4832 ldr r0, [pc, #200] @ (800ae00 <_printf_i+0x238>)
800ad38: f884 7045 strb.w r7, [r4, #69] @ 0x45
800ad3c: 6823 ldr r3, [r4, #0]
800ad3e: 6831 ldr r1, [r6, #0]
800ad40: 061f lsls r7, r3, #24
800ad42: f851 5b04 ldr.w r5, [r1], #4
800ad46: d402 bmi.n 800ad4e <_printf_i+0x186>
800ad48: 065f lsls r7, r3, #25
800ad4a: bf48 it mi
800ad4c: b2ad uxthmi r5, r5
800ad4e: 6031 str r1, [r6, #0]
800ad50: 07d9 lsls r1, r3, #31
800ad52: bf44 itt mi
800ad54: f043 0320 orrmi.w r3, r3, #32
800ad58: 6023 strmi r3, [r4, #0]
800ad5a: b11d cbz r5, 800ad64 <_printf_i+0x19c>
800ad5c: 2310 movs r3, #16
800ad5e: e7ad b.n 800acbc <_printf_i+0xf4>
800ad60: 4826 ldr r0, [pc, #152] @ (800adfc <_printf_i+0x234>)
800ad62: e7e9 b.n 800ad38 <_printf_i+0x170>
800ad64: 6823 ldr r3, [r4, #0]
800ad66: f023 0320 bic.w r3, r3, #32
800ad6a: 6023 str r3, [r4, #0]
800ad6c: e7f6 b.n 800ad5c <_printf_i+0x194>
800ad6e: 4616 mov r6, r2
800ad70: e7bd b.n 800acee <_printf_i+0x126>
800ad72: 6833 ldr r3, [r6, #0]
800ad74: 6825 ldr r5, [r4, #0]
800ad76: 1d18 adds r0, r3, #4
800ad78: 6961 ldr r1, [r4, #20]
800ad7a: 6030 str r0, [r6, #0]
800ad7c: 062e lsls r6, r5, #24
800ad7e: 681b ldr r3, [r3, #0]
800ad80: d501 bpl.n 800ad86 <_printf_i+0x1be>
800ad82: 6019 str r1, [r3, #0]
800ad84: e002 b.n 800ad8c <_printf_i+0x1c4>
800ad86: 0668 lsls r0, r5, #25
800ad88: d5fb bpl.n 800ad82 <_printf_i+0x1ba>
800ad8a: 8019 strh r1, [r3, #0]
800ad8c: 2300 movs r3, #0
800ad8e: 4616 mov r6, r2
800ad90: 6123 str r3, [r4, #16]
800ad92: e7bc b.n 800ad0e <_printf_i+0x146>
800ad94: 6833 ldr r3, [r6, #0]
800ad96: 2100 movs r1, #0
800ad98: 1d1a adds r2, r3, #4
800ad9a: 6032 str r2, [r6, #0]
800ad9c: 681e ldr r6, [r3, #0]
800ad9e: 6862 ldr r2, [r4, #4]
800ada0: 4630 mov r0, r6
800ada2: f000 f859 bl 800ae58 <memchr>
800ada6: b108 cbz r0, 800adac <_printf_i+0x1e4>
800ada8: 1b80 subs r0, r0, r6
800adaa: 6060 str r0, [r4, #4]
800adac: 6863 ldr r3, [r4, #4]
800adae: 6123 str r3, [r4, #16]
800adb0: 2300 movs r3, #0
800adb2: f884 3043 strb.w r3, [r4, #67] @ 0x43
800adb6: e7aa b.n 800ad0e <_printf_i+0x146>
800adb8: 4632 mov r2, r6
800adba: 4649 mov r1, r9
800adbc: 4640 mov r0, r8
800adbe: 6923 ldr r3, [r4, #16]
800adc0: 47d0 blx sl
800adc2: 3001 adds r0, #1
800adc4: d0ad beq.n 800ad22 <_printf_i+0x15a>
800adc6: 6823 ldr r3, [r4, #0]
800adc8: 079b lsls r3, r3, #30
800adca: d413 bmi.n 800adf4 <_printf_i+0x22c>
800adcc: 68e0 ldr r0, [r4, #12]
800adce: 9b03 ldr r3, [sp, #12]
800add0: 4298 cmp r0, r3
800add2: bfb8 it lt
800add4: 4618 movlt r0, r3
800add6: e7a6 b.n 800ad26 <_printf_i+0x15e>
800add8: 2301 movs r3, #1
800adda: 4632 mov r2, r6
800addc: 4649 mov r1, r9
800adde: 4640 mov r0, r8
800ade0: 47d0 blx sl
800ade2: 3001 adds r0, #1
800ade4: d09d beq.n 800ad22 <_printf_i+0x15a>
800ade6: 3501 adds r5, #1
800ade8: 68e3 ldr r3, [r4, #12]
800adea: 9903 ldr r1, [sp, #12]
800adec: 1a5b subs r3, r3, r1
800adee: 42ab cmp r3, r5
800adf0: dcf2 bgt.n 800add8 <_printf_i+0x210>
800adf2: e7eb b.n 800adcc <_printf_i+0x204>
800adf4: 2500 movs r5, #0
800adf6: f104 0619 add.w r6, r4, #25
800adfa: e7f5 b.n 800ade8 <_printf_i+0x220>
800adfc: 0800b113 .word 0x0800b113
800ae00: 0800b124 .word 0x0800b124
0800ae04 <memmove>:
800ae04: 4288 cmp r0, r1
800ae06: b510 push {r4, lr}
800ae08: eb01 0402 add.w r4, r1, r2
800ae0c: d902 bls.n 800ae14 <memmove+0x10>
800ae0e: 4284 cmp r4, r0
800ae10: 4623 mov r3, r4
800ae12: d807 bhi.n 800ae24 <memmove+0x20>
800ae14: 1e43 subs r3, r0, #1
800ae16: 42a1 cmp r1, r4
800ae18: d008 beq.n 800ae2c <memmove+0x28>
800ae1a: f811 2b01 ldrb.w r2, [r1], #1
800ae1e: f803 2f01 strb.w r2, [r3, #1]!
800ae22: e7f8 b.n 800ae16 <memmove+0x12>
800ae24: 4601 mov r1, r0
800ae26: 4402 add r2, r0
800ae28: 428a cmp r2, r1
800ae2a: d100 bne.n 800ae2e <memmove+0x2a>
800ae2c: bd10 pop {r4, pc}
800ae2e: f813 4d01 ldrb.w r4, [r3, #-1]!
800ae32: f802 4d01 strb.w r4, [r2, #-1]!
800ae36: e7f7 b.n 800ae28 <memmove+0x24>
0800ae38 <_sbrk_r>:
800ae38: b538 push {r3, r4, r5, lr}
800ae3a: 2300 movs r3, #0
800ae3c: 4d05 ldr r5, [pc, #20] @ (800ae54 <_sbrk_r+0x1c>)
800ae3e: 4604 mov r4, r0
800ae40: 4608 mov r0, r1
800ae42: 602b str r3, [r5, #0]
800ae44: f7f6 fe7c bl 8001b40 <_sbrk>
800ae48: 1c43 adds r3, r0, #1
800ae4a: d102 bne.n 800ae52 <_sbrk_r+0x1a>
800ae4c: 682b ldr r3, [r5, #0]
800ae4e: b103 cbz r3, 800ae52 <_sbrk_r+0x1a>
800ae50: 6023 str r3, [r4, #0]
800ae52: bd38 pop {r3, r4, r5, pc}
800ae54: 200017cc .word 0x200017cc
0800ae58 <memchr>:
800ae58: 4603 mov r3, r0
800ae5a: b510 push {r4, lr}
800ae5c: b2c9 uxtb r1, r1
800ae5e: 4402 add r2, r0
800ae60: 4293 cmp r3, r2
800ae62: 4618 mov r0, r3
800ae64: d101 bne.n 800ae6a <memchr+0x12>
800ae66: 2000 movs r0, #0
800ae68: e003 b.n 800ae72 <memchr+0x1a>
800ae6a: 7804 ldrb r4, [r0, #0]
800ae6c: 3301 adds r3, #1
800ae6e: 428c cmp r4, r1
800ae70: d1f6 bne.n 800ae60 <memchr+0x8>
800ae72: bd10 pop {r4, pc}
0800ae74 <memcpy>:
800ae74: 440a add r2, r1
800ae76: 4291 cmp r1, r2
800ae78: f100 33ff add.w r3, r0, #4294967295
800ae7c: d100 bne.n 800ae80 <memcpy+0xc>
800ae7e: 4770 bx lr
800ae80: b510 push {r4, lr}
800ae82: f811 4b01 ldrb.w r4, [r1], #1
800ae86: 4291 cmp r1, r2
800ae88: f803 4f01 strb.w r4, [r3, #1]!
800ae8c: d1f9 bne.n 800ae82 <memcpy+0xe>
800ae8e: bd10 pop {r4, pc}
0800ae90 <_realloc_r>:
800ae90: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800ae94: 4607 mov r7, r0
800ae96: 4614 mov r4, r2
800ae98: 460d mov r5, r1
800ae9a: b921 cbnz r1, 800aea6 <_realloc_r+0x16>
800ae9c: 4611 mov r1, r2
800ae9e: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800aea2: f7ff bc3b b.w 800a71c <_malloc_r>
800aea6: b92a cbnz r2, 800aeb4 <_realloc_r+0x24>
800aea8: f7ff fbce bl 800a648 <_free_r>
800aeac: 4625 mov r5, r4
800aeae: 4628 mov r0, r5
800aeb0: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800aeb4: f000 f81a bl 800aeec <_malloc_usable_size_r>
800aeb8: 4284 cmp r4, r0
800aeba: 4606 mov r6, r0
800aebc: d802 bhi.n 800aec4 <_realloc_r+0x34>
800aebe: ebb4 0f50 cmp.w r4, r0, lsr #1
800aec2: d8f4 bhi.n 800aeae <_realloc_r+0x1e>
800aec4: 4621 mov r1, r4
800aec6: 4638 mov r0, r7
800aec8: f7ff fc28 bl 800a71c <_malloc_r>
800aecc: 4680 mov r8, r0
800aece: b908 cbnz r0, 800aed4 <_realloc_r+0x44>
800aed0: 4645 mov r5, r8
800aed2: e7ec b.n 800aeae <_realloc_r+0x1e>
800aed4: 42b4 cmp r4, r6
800aed6: 4622 mov r2, r4
800aed8: 4629 mov r1, r5
800aeda: bf28 it cs
800aedc: 4632 movcs r2, r6
800aede: f7ff ffc9 bl 800ae74 <memcpy>
800aee2: 4629 mov r1, r5
800aee4: 4638 mov r0, r7
800aee6: f7ff fbaf bl 800a648 <_free_r>
800aeea: e7f1 b.n 800aed0 <_realloc_r+0x40>
0800aeec <_malloc_usable_size_r>:
800aeec: f851 3c04 ldr.w r3, [r1, #-4]
800aef0: 1f18 subs r0, r3, #4
800aef2: 2b00 cmp r3, #0
800aef4: bfbc itt lt
800aef6: 580b ldrlt r3, [r1, r0]
800aef8: 18c0 addlt r0, r0, r3
800aefa: 4770 bx lr
0800aefc <_init>:
800aefc: b5f8 push {r3, r4, r5, r6, r7, lr}
800aefe: bf00 nop
800af00: bcf8 pop {r3, r4, r5, r6, r7}
800af02: bc08 pop {r3}
800af04: 469e mov lr, r3
800af06: 4770 bx lr
0800af08 <_fini>:
800af08: b5f8 push {r3, r4, r5, r6, r7, lr}
800af0a: bf00 nop
800af0c: bcf8 pop {r3, r4, r5, r6, r7}
800af0e: bc08 pop {r3}
800af10: 469e mov lr, r3
800af12: 4770 bx lr
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