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7eb7af3218a8877b89d9f5e0f18d1e1d3592cf34
AUTOM/workspace/AUTOM7/Debug/AUTOM7.list
andrea 53391bffc6 wip
2025-08-27 23:29:38 +02:00

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AUTOM7.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 00009080 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000000b0 0800918c 0800918c 0000a18c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800923c 0800923c 0000b1cc 2**0
CONTENTS, READONLY
4 .ARM 00000000 0800923c 0800923c 0000b1cc 2**0
CONTENTS, READONLY
5 .preinit_array 00000000 0800923c 0800923c 0000b1cc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800923c 0800923c 0000a23c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 08009240 08009240 0000a240 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001cc 20000000 08009244 0000b000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 00001508 200001cc 08009410 0000b1cc 2**2
ALLOC
10 ._user_heap_stack 00000604 200016d4 08009410 0000b6d4 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 0000b1cc 2**0
CONTENTS, READONLY
12 .debug_info 00010d1f 00000000 00000000 0000b1f5 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00003119 00000000 00000000 0001bf14 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 00001010 00000000 00000000 0001f030 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00000c27 00000000 00000000 00020040 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001a248 00000000 00000000 00020c67 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 00013e43 00000000 00000000 0003aeaf 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 0008d17e 00000000 00000000 0004ecf2 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 000dbe70 2**0
CONTENTS, READONLY
20 .debug_frame 000046b4 00000000 00000000 000dbeb4 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 000e0568 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001cc .word 0x200001cc
8000128: 00000000 .word 0x00000000
800012c: 08009174 .word 0x08009174
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001d0 .word 0x200001d0
8000148: 08009174 .word 0x08009174
0800014c <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
800014c: b580 push {r7, lr}
800014e: b09a sub sp, #104 @ 0x68
8000150: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8000152: f000 fc79 bl 8000a48 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8000156: f000 f861 bl 800021c <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
800015a: f000 fa99 bl 8000690 <MX_GPIO_Init>
MX_TIM2_Init();
800015e: f000 f8b7 bl 80002d0 <MX_TIM2_Init>
MX_TIM4_Init();
8000162: f000 f9f3 bl 800054c <MX_TIM4_Init>
MX_TIM3_Init();
8000166: f000 f94f bl 8000408 <MX_TIM3_Init>
MX_USB_DEVICE_Init();
800016a: f007 fe39 bl 8007de0 <MX_USB_DEVICE_Init>
/* USER CODE BEGIN 2 */
//Force_TIM_GPIO_AFPP();
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_1);
800016e: 2100 movs r1, #0
8000170: 4825 ldr r0, [pc, #148] @ (8000208 <main+0xbc>)
8000172: f003 f9f9 bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_2);
8000176: 2104 movs r1, #4
8000178: 4823 ldr r0, [pc, #140] @ (8000208 <main+0xbc>)
800017a: f003 f9f5 bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_3);
800017e: 2108 movs r1, #8
8000180: 4821 ldr r0, [pc, #132] @ (8000208 <main+0xbc>)
8000182: f003 f9f1 bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim2, TIM_CHANNEL_4);
8000186: 210c movs r1, #12
8000188: 481f ldr r0, [pc, #124] @ (8000208 <main+0xbc>)
800018a: f003 f9ed bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_1);
800018e: 2100 movs r1, #0
8000190: 481e ldr r0, [pc, #120] @ (800020c <main+0xc0>)
8000192: f003 f9e9 bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_2);
8000196: 2104 movs r1, #4
8000198: 481c ldr r0, [pc, #112] @ (800020c <main+0xc0>)
800019a: f003 f9e5 bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_3);
800019e: 2108 movs r1, #8
80001a0: 481a ldr r0, [pc, #104] @ (800020c <main+0xc0>)
80001a2: f003 f9e1 bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim3, TIM_CHANNEL_4);
80001a6: 210c movs r1, #12
80001a8: 4818 ldr r0, [pc, #96] @ (800020c <main+0xc0>)
80001aa: f003 f9dd bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_1);
80001ae: 2100 movs r1, #0
80001b0: 4817 ldr r0, [pc, #92] @ (8000210 <main+0xc4>)
80001b2: f003 f9d9 bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_2);
80001b6: 2104 movs r1, #4
80001b8: 4815 ldr r0, [pc, #84] @ (8000210 <main+0xc4>)
80001ba: f003 f9d5 bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_3);
80001be: 2108 movs r1, #8
80001c0: 4813 ldr r0, [pc, #76] @ (8000210 <main+0xc4>)
80001c2: f003 f9d1 bl 8003568 <HAL_TIM_PWM_Start>
HAL_TIM_PWM_Start(&htim4, TIM_CHANNEL_4);
80001c6: 210c movs r1, #12
80001c8: 4811 ldr r0, [pc, #68] @ (8000210 <main+0xc4>)
80001ca: f003 f9cd bl 8003568 <HAL_TIM_PWM_Start>
CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
80001ce: 2107 movs r1, #7
80001d0: 4810 ldr r0, [pc, #64] @ (8000214 <main+0xc8>)
80001d2: f007 ff41 bl 8008058 <CDC_Transmit_FS>
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
while (CDC_Available()) {
80001d6: e011 b.n 80001fc <main+0xb0>
int c = CDC_ReadByte();
80001d8: f007 fe7c bl 8007ed4 <CDC_ReadByte>
80001dc: 6678 str r0, [r7, #100] @ 0x64
// uint8_t out = (uint8_t)c;
// if (out >= 'a' && out <= 'z') out -= 32; // to upper
unsigned char s[100];
sprintf((char*)s,"\nc=%03d",c);
80001de: 463b mov r3, r7
80001e0: 6e7a ldr r2, [r7, #100] @ 0x64
80001e2: 490d ldr r1, [pc, #52] @ (8000218 <main+0xcc>)
80001e4: 4618 mov r0, r3
80001e6: f008 fb15 bl 8008814 <siprintf>
while (CDC_Transmit_FS(s, 6) == USBD_BUSY) {
80001ea: bf00 nop
80001ec: 463b mov r3, r7
80001ee: 2106 movs r1, #6
80001f0: 4618 mov r0, r3
80001f2: f007 ff31 bl 8008058 <CDC_Transmit_FS>
80001f6: 4603 mov r3, r0
80001f8: 2b01 cmp r3, #1
80001fa: d0f7 beq.n 80001ec <main+0xa0>
while (CDC_Available()) {
80001fc: f007 fe56 bl 8007eac <CDC_Available>
8000200: 4603 mov r3, r0
8000202: 2b00 cmp r3, #0
8000204: d1e8 bne.n 80001d8 <main+0x8c>
8000206: e7f9 b.n 80001fc <main+0xb0>
8000208: 200001e8 .word 0x200001e8
800020c: 20000230 .word 0x20000230
8000210: 20000278 .word 0x20000278
8000214: 0800918c .word 0x0800918c
8000218: 08009194 .word 0x08009194
0800021c <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
800021c: b580 push {r7, lr}
800021e: b094 sub sp, #80 @ 0x50
8000220: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8000222: f107 0328 add.w r3, r7, #40 @ 0x28
8000226: 2228 movs r2, #40 @ 0x28
8000228: 2100 movs r1, #0
800022a: 4618 mov r0, r3
800022c: f008 fb14 bl 8008858 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8000230: f107 0314 add.w r3, r7, #20
8000234: 2200 movs r2, #0
8000236: 601a str r2, [r3, #0]
8000238: 605a str r2, [r3, #4]
800023a: 609a str r2, [r3, #8]
800023c: 60da str r2, [r3, #12]
800023e: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
8000240: 1d3b adds r3, r7, #4
8000242: 2200 movs r2, #0
8000244: 601a str r2, [r3, #0]
8000246: 605a str r2, [r3, #4]
8000248: 609a str r2, [r3, #8]
800024a: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
800024c: 2301 movs r3, #1
800024e: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8000250: f44f 3380 mov.w r3, #65536 @ 0x10000
8000254: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
8000256: 2300 movs r3, #0
8000258: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
800025a: 2301 movs r3, #1
800025c: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
800025e: 2302 movs r3, #2
8000260: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8000262: f44f 3380 mov.w r3, #65536 @ 0x10000
8000266: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
8000268: f44f 13e0 mov.w r3, #1835008 @ 0x1c0000
800026c: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
800026e: f107 0328 add.w r3, r7, #40 @ 0x28
8000272: 4618 mov r0, r3
8000274: f002 fc3c bl 8002af0 <HAL_RCC_OscConfig>
8000278: 4603 mov r3, r0
800027a: 2b00 cmp r3, #0
800027c: d001 beq.n 8000282 <SystemClock_Config+0x66>
{
Error_Handler();
800027e: f000 fa47 bl 8000710 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8000282: 230f movs r3, #15
8000284: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8000286: 2302 movs r3, #2
8000288: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
800028a: 2300 movs r3, #0
800028c: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
800028e: f44f 6380 mov.w r3, #1024 @ 0x400
8000292: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8000294: 2300 movs r3, #0
8000296: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
8000298: f107 0314 add.w r3, r7, #20
800029c: 2102 movs r1, #2
800029e: 4618 mov r0, r3
80002a0: f002 fea8 bl 8002ff4 <HAL_RCC_ClockConfig>
80002a4: 4603 mov r3, r0
80002a6: 2b00 cmp r3, #0
80002a8: d001 beq.n 80002ae <SystemClock_Config+0x92>
{
Error_Handler();
80002aa: f000 fa31 bl 8000710 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
80002ae: 2310 movs r3, #16
80002b0: 607b str r3, [r7, #4]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
80002b2: 2300 movs r3, #0
80002b4: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
80002b6: 1d3b adds r3, r7, #4
80002b8: 4618 mov r0, r3
80002ba: f002 fff7 bl 80032ac <HAL_RCCEx_PeriphCLKConfig>
80002be: 4603 mov r3, r0
80002c0: 2b00 cmp r3, #0
80002c2: d001 beq.n 80002c8 <SystemClock_Config+0xac>
{
Error_Handler();
80002c4: f000 fa24 bl 8000710 <Error_Handler>
}
}
80002c8: bf00 nop
80002ca: 3750 adds r7, #80 @ 0x50
80002cc: 46bd mov sp, r7
80002ce: bd80 pop {r7, pc}
080002d0 <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
80002d0: b580 push {r7, lr}
80002d2: b08e sub sp, #56 @ 0x38
80002d4: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
80002d6: f107 0328 add.w r3, r7, #40 @ 0x28
80002da: 2200 movs r2, #0
80002dc: 601a str r2, [r3, #0]
80002de: 605a str r2, [r3, #4]
80002e0: 609a str r2, [r3, #8]
80002e2: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
80002e4: f107 0320 add.w r3, r7, #32
80002e8: 2200 movs r2, #0
80002ea: 601a str r2, [r3, #0]
80002ec: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
80002ee: 1d3b adds r3, r7, #4
80002f0: 2200 movs r2, #0
80002f2: 601a str r2, [r3, #0]
80002f4: 605a str r2, [r3, #4]
80002f6: 609a str r2, [r3, #8]
80002f8: 60da str r2, [r3, #12]
80002fa: 611a str r2, [r3, #16]
80002fc: 615a str r2, [r3, #20]
80002fe: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8000300: 4b40 ldr r3, [pc, #256] @ (8000404 <MX_TIM2_Init+0x134>)
8000302: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8000306: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 71;
8000308: 4b3e ldr r3, [pc, #248] @ (8000404 <MX_TIM2_Init+0x134>)
800030a: 2247 movs r2, #71 @ 0x47
800030c: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
800030e: 4b3d ldr r3, [pc, #244] @ (8000404 <MX_TIM2_Init+0x134>)
8000310: 2200 movs r2, #0
8000312: 609a str r2, [r3, #8]
htim2.Init.Period = 249;
8000314: 4b3b ldr r3, [pc, #236] @ (8000404 <MX_TIM2_Init+0x134>)
8000316: 22f9 movs r2, #249 @ 0xf9
8000318: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
800031a: 4b3a ldr r3, [pc, #232] @ (8000404 <MX_TIM2_Init+0x134>)
800031c: 2200 movs r2, #0
800031e: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8000320: 4b38 ldr r3, [pc, #224] @ (8000404 <MX_TIM2_Init+0x134>)
8000322: 2200 movs r2, #0
8000324: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
8000326: 4837 ldr r0, [pc, #220] @ (8000404 <MX_TIM2_Init+0x134>)
8000328: f003 f876 bl 8003418 <HAL_TIM_Base_Init>
800032c: 4603 mov r3, r0
800032e: 2b00 cmp r3, #0
8000330: d001 beq.n 8000336 <MX_TIM2_Init+0x66>
{
Error_Handler();
8000332: f000 f9ed bl 8000710 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8000336: f44f 5380 mov.w r3, #4096 @ 0x1000
800033a: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
800033c: f107 0328 add.w r3, r7, #40 @ 0x28
8000340: 4619 mov r1, r3
8000342: 4830 ldr r0, [pc, #192] @ (8000404 <MX_TIM2_Init+0x134>)
8000344: f003 fa74 bl 8003830 <HAL_TIM_ConfigClockSource>
8000348: 4603 mov r3, r0
800034a: 2b00 cmp r3, #0
800034c: d001 beq.n 8000352 <MX_TIM2_Init+0x82>
{
Error_Handler();
800034e: f000 f9df bl 8000710 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
8000352: 482c ldr r0, [pc, #176] @ (8000404 <MX_TIM2_Init+0x134>)
8000354: f003 f8af bl 80034b6 <HAL_TIM_PWM_Init>
8000358: 4603 mov r3, r0
800035a: 2b00 cmp r3, #0
800035c: d001 beq.n 8000362 <MX_TIM2_Init+0x92>
{
Error_Handler();
800035e: f000 f9d7 bl 8000710 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8000362: 2300 movs r3, #0
8000364: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8000366: 2300 movs r3, #0
8000368: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
800036a: f107 0320 add.w r3, r7, #32
800036e: 4619 mov r1, r3
8000370: 4824 ldr r0, [pc, #144] @ (8000404 <MX_TIM2_Init+0x134>)
8000372: f003 fdd5 bl 8003f20 <HAL_TIMEx_MasterConfigSynchronization>
8000376: 4603 mov r3, r0
8000378: 2b00 cmp r3, #0
800037a: d001 beq.n 8000380 <MX_TIM2_Init+0xb0>
{
Error_Handler();
800037c: f000 f9c8 bl 8000710 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8000380: 2360 movs r3, #96 @ 0x60
8000382: 607b str r3, [r7, #4]
sConfigOC.Pulse = 180;
8000384: 23b4 movs r3, #180 @ 0xb4
8000386: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8000388: 2300 movs r3, #0
800038a: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800038c: 2304 movs r3, #4
800038e: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8000390: 1d3b adds r3, r7, #4
8000392: 2200 movs r2, #0
8000394: 4619 mov r1, r3
8000396: 481b ldr r0, [pc, #108] @ (8000404 <MX_TIM2_Init+0x134>)
8000398: f003 f988 bl 80036ac <HAL_TIM_PWM_ConfigChannel>
800039c: 4603 mov r3, r0
800039e: 2b00 cmp r3, #0
80003a0: d001 beq.n 80003a6 <MX_TIM2_Init+0xd6>
{
Error_Handler();
80003a2: f000 f9b5 bl 8000710 <Error_Handler>
}
sConfigOC.Pulse = 200;
80003a6: 23c8 movs r3, #200 @ 0xc8
80003a8: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
80003aa: 1d3b adds r3, r7, #4
80003ac: 2204 movs r2, #4
80003ae: 4619 mov r1, r3
80003b0: 4814 ldr r0, [pc, #80] @ (8000404 <MX_TIM2_Init+0x134>)
80003b2: f003 f97b bl 80036ac <HAL_TIM_PWM_ConfigChannel>
80003b6: 4603 mov r3, r0
80003b8: 2b00 cmp r3, #0
80003ba: d001 beq.n 80003c0 <MX_TIM2_Init+0xf0>
{
Error_Handler();
80003bc: f000 f9a8 bl 8000710 <Error_Handler>
}
sConfigOC.Pulse = 25;
80003c0: 2319 movs r3, #25
80003c2: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
80003c4: 1d3b adds r3, r7, #4
80003c6: 2208 movs r2, #8
80003c8: 4619 mov r1, r3
80003ca: 480e ldr r0, [pc, #56] @ (8000404 <MX_TIM2_Init+0x134>)
80003cc: f003 f96e bl 80036ac <HAL_TIM_PWM_ConfigChannel>
80003d0: 4603 mov r3, r0
80003d2: 2b00 cmp r3, #0
80003d4: d001 beq.n 80003da <MX_TIM2_Init+0x10a>
{
Error_Handler();
80003d6: f000 f99b bl 8000710 <Error_Handler>
}
sConfigOC.Pulse = 50;
80003da: 2332 movs r3, #50 @ 0x32
80003dc: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
80003de: 1d3b adds r3, r7, #4
80003e0: 220c movs r2, #12
80003e2: 4619 mov r1, r3
80003e4: 4807 ldr r0, [pc, #28] @ (8000404 <MX_TIM2_Init+0x134>)
80003e6: f003 f961 bl 80036ac <HAL_TIM_PWM_ConfigChannel>
80003ea: 4603 mov r3, r0
80003ec: 2b00 cmp r3, #0
80003ee: d001 beq.n 80003f4 <MX_TIM2_Init+0x124>
{
Error_Handler();
80003f0: f000 f98e bl 8000710 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
80003f4: 4803 ldr r0, [pc, #12] @ (8000404 <MX_TIM2_Init+0x134>)
80003f6: f000 fa07 bl 8000808 <HAL_TIM_MspPostInit>
}
80003fa: bf00 nop
80003fc: 3738 adds r7, #56 @ 0x38
80003fe: 46bd mov sp, r7
8000400: bd80 pop {r7, pc}
8000402: bf00 nop
8000404: 200001e8 .word 0x200001e8
08000408 <MX_TIM3_Init>:
* @brief TIM3 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM3_Init(void)
{
8000408: b580 push {r7, lr}
800040a: b08e sub sp, #56 @ 0x38
800040c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM3_Init 0 */
/* USER CODE END TIM3_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
800040e: f107 0328 add.w r3, r7, #40 @ 0x28
8000412: 2200 movs r2, #0
8000414: 601a str r2, [r3, #0]
8000416: 605a str r2, [r3, #4]
8000418: 609a str r2, [r3, #8]
800041a: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
800041c: f107 0320 add.w r3, r7, #32
8000420: 2200 movs r2, #0
8000422: 601a str r2, [r3, #0]
8000424: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
8000426: 1d3b adds r3, r7, #4
8000428: 2200 movs r2, #0
800042a: 601a str r2, [r3, #0]
800042c: 605a str r2, [r3, #4]
800042e: 609a str r2, [r3, #8]
8000430: 60da str r2, [r3, #12]
8000432: 611a str r2, [r3, #16]
8000434: 615a str r2, [r3, #20]
8000436: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM3_Init 1 */
/* USER CODE END TIM3_Init 1 */
htim3.Instance = TIM3;
8000438: 4b42 ldr r3, [pc, #264] @ (8000544 <MX_TIM3_Init+0x13c>)
800043a: 4a43 ldr r2, [pc, #268] @ (8000548 <MX_TIM3_Init+0x140>)
800043c: 601a str r2, [r3, #0]
htim3.Init.Prescaler = 0;
800043e: 4b41 ldr r3, [pc, #260] @ (8000544 <MX_TIM3_Init+0x13c>)
8000440: 2200 movs r2, #0
8000442: 605a str r2, [r3, #4]
htim3.Init.CounterMode = TIM_COUNTERMODE_UP;
8000444: 4b3f ldr r3, [pc, #252] @ (8000544 <MX_TIM3_Init+0x13c>)
8000446: 2200 movs r2, #0
8000448: 609a str r2, [r3, #8]
htim3.Init.Period = 17999;
800044a: 4b3e ldr r3, [pc, #248] @ (8000544 <MX_TIM3_Init+0x13c>)
800044c: f244 624f movw r2, #17999 @ 0x464f
8000450: 60da str r2, [r3, #12]
htim3.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8000452: 4b3c ldr r3, [pc, #240] @ (8000544 <MX_TIM3_Init+0x13c>)
8000454: 2200 movs r2, #0
8000456: 611a str r2, [r3, #16]
htim3.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8000458: 4b3a ldr r3, [pc, #232] @ (8000544 <MX_TIM3_Init+0x13c>)
800045a: 2200 movs r2, #0
800045c: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim3) != HAL_OK)
800045e: 4839 ldr r0, [pc, #228] @ (8000544 <MX_TIM3_Init+0x13c>)
8000460: f002 ffda bl 8003418 <HAL_TIM_Base_Init>
8000464: 4603 mov r3, r0
8000466: 2b00 cmp r3, #0
8000468: d001 beq.n 800046e <MX_TIM3_Init+0x66>
{
Error_Handler();
800046a: f000 f951 bl 8000710 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
800046e: f44f 5380 mov.w r3, #4096 @ 0x1000
8000472: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim3, &sClockSourceConfig) != HAL_OK)
8000474: f107 0328 add.w r3, r7, #40 @ 0x28
8000478: 4619 mov r1, r3
800047a: 4832 ldr r0, [pc, #200] @ (8000544 <MX_TIM3_Init+0x13c>)
800047c: f003 f9d8 bl 8003830 <HAL_TIM_ConfigClockSource>
8000480: 4603 mov r3, r0
8000482: 2b00 cmp r3, #0
8000484: d001 beq.n 800048a <MX_TIM3_Init+0x82>
{
Error_Handler();
8000486: f000 f943 bl 8000710 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim3) != HAL_OK)
800048a: 482e ldr r0, [pc, #184] @ (8000544 <MX_TIM3_Init+0x13c>)
800048c: f003 f813 bl 80034b6 <HAL_TIM_PWM_Init>
8000490: 4603 mov r3, r0
8000492: 2b00 cmp r3, #0
8000494: d001 beq.n 800049a <MX_TIM3_Init+0x92>
{
Error_Handler();
8000496: f000 f93b bl 8000710 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
800049a: 2300 movs r3, #0
800049c: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
800049e: 2300 movs r3, #0
80004a0: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim3, &sMasterConfig) != HAL_OK)
80004a2: f107 0320 add.w r3, r7, #32
80004a6: 4619 mov r1, r3
80004a8: 4826 ldr r0, [pc, #152] @ (8000544 <MX_TIM3_Init+0x13c>)
80004aa: f003 fd39 bl 8003f20 <HAL_TIMEx_MasterConfigSynchronization>
80004ae: 4603 mov r3, r0
80004b0: 2b00 cmp r3, #0
80004b2: d001 beq.n 80004b8 <MX_TIM3_Init+0xb0>
{
Error_Handler();
80004b4: f000 f92c bl 8000710 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
80004b8: 2360 movs r3, #96 @ 0x60
80004ba: 607b str r3, [r7, #4]
sConfigOC.Pulse = 2000;
80004bc: f44f 63fa mov.w r3, #2000 @ 0x7d0
80004c0: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
80004c2: 2300 movs r3, #0
80004c4: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80004c6: 2304 movs r3, #4
80004c8: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
80004ca: 1d3b adds r3, r7, #4
80004cc: 2200 movs r2, #0
80004ce: 4619 mov r1, r3
80004d0: 481c ldr r0, [pc, #112] @ (8000544 <MX_TIM3_Init+0x13c>)
80004d2: f003 f8eb bl 80036ac <HAL_TIM_PWM_ConfigChannel>
80004d6: 4603 mov r3, r0
80004d8: 2b00 cmp r3, #0
80004da: d001 beq.n 80004e0 <MX_TIM3_Init+0xd8>
{
Error_Handler();
80004dc: f000 f918 bl 8000710 <Error_Handler>
}
sConfigOC.Pulse = 3000;
80004e0: f640 33b8 movw r3, #3000 @ 0xbb8
80004e4: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
80004e6: 1d3b adds r3, r7, #4
80004e8: 2204 movs r2, #4
80004ea: 4619 mov r1, r3
80004ec: 4815 ldr r0, [pc, #84] @ (8000544 <MX_TIM3_Init+0x13c>)
80004ee: f003 f8dd bl 80036ac <HAL_TIM_PWM_ConfigChannel>
80004f2: 4603 mov r3, r0
80004f4: 2b00 cmp r3, #0
80004f6: d001 beq.n 80004fc <MX_TIM3_Init+0xf4>
{
Error_Handler();
80004f8: f000 f90a bl 8000710 <Error_Handler>
}
sConfigOC.Pulse = 5000;
80004fc: f241 3388 movw r3, #5000 @ 0x1388
8000500: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8000502: 1d3b adds r3, r7, #4
8000504: 2208 movs r2, #8
8000506: 4619 mov r1, r3
8000508: 480e ldr r0, [pc, #56] @ (8000544 <MX_TIM3_Init+0x13c>)
800050a: f003 f8cf bl 80036ac <HAL_TIM_PWM_ConfigChannel>
800050e: 4603 mov r3, r0
8000510: 2b00 cmp r3, #0
8000512: d001 beq.n 8000518 <MX_TIM3_Init+0x110>
{
Error_Handler();
8000514: f000 f8fc bl 8000710 <Error_Handler>
}
sConfigOC.Pulse = 7000;
8000518: f641 3358 movw r3, #7000 @ 0x1b58
800051c: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim3, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
800051e: 1d3b adds r3, r7, #4
8000520: 220c movs r2, #12
8000522: 4619 mov r1, r3
8000524: 4807 ldr r0, [pc, #28] @ (8000544 <MX_TIM3_Init+0x13c>)
8000526: f003 f8c1 bl 80036ac <HAL_TIM_PWM_ConfigChannel>
800052a: 4603 mov r3, r0
800052c: 2b00 cmp r3, #0
800052e: d001 beq.n 8000534 <MX_TIM3_Init+0x12c>
{
Error_Handler();
8000530: f000 f8ee bl 8000710 <Error_Handler>
}
/* USER CODE BEGIN TIM3_Init 2 */
/* USER CODE END TIM3_Init 2 */
HAL_TIM_MspPostInit(&htim3);
8000534: 4803 ldr r0, [pc, #12] @ (8000544 <MX_TIM3_Init+0x13c>)
8000536: f000 f967 bl 8000808 <HAL_TIM_MspPostInit>
}
800053a: bf00 nop
800053c: 3738 adds r7, #56 @ 0x38
800053e: 46bd mov sp, r7
8000540: bd80 pop {r7, pc}
8000542: bf00 nop
8000544: 20000230 .word 0x20000230
8000548: 40000400 .word 0x40000400
0800054c <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
800054c: b580 push {r7, lr}
800054e: b08e sub sp, #56 @ 0x38
8000550: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8000552: f107 0328 add.w r3, r7, #40 @ 0x28
8000556: 2200 movs r2, #0
8000558: 601a str r2, [r3, #0]
800055a: 605a str r2, [r3, #4]
800055c: 609a str r2, [r3, #8]
800055e: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8000560: f107 0320 add.w r3, r7, #32
8000564: 2200 movs r2, #0
8000566: 601a str r2, [r3, #0]
8000568: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
800056a: 1d3b adds r3, r7, #4
800056c: 2200 movs r2, #0
800056e: 601a str r2, [r3, #0]
8000570: 605a str r2, [r3, #4]
8000572: 609a str r2, [r3, #8]
8000574: 60da str r2, [r3, #12]
8000576: 611a str r2, [r3, #16]
8000578: 615a str r2, [r3, #20]
800057a: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
800057c: 4b42 ldr r3, [pc, #264] @ (8000688 <MX_TIM4_Init+0x13c>)
800057e: 4a43 ldr r2, [pc, #268] @ (800068c <MX_TIM4_Init+0x140>)
8000580: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
8000582: 4b41 ldr r3, [pc, #260] @ (8000688 <MX_TIM4_Init+0x13c>)
8000584: 2200 movs r2, #0
8000586: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
8000588: 4b3f ldr r3, [pc, #252] @ (8000688 <MX_TIM4_Init+0x13c>)
800058a: 2200 movs r2, #0
800058c: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
800058e: 4b3e ldr r3, [pc, #248] @ (8000688 <MX_TIM4_Init+0x13c>)
8000590: f244 624f movw r2, #17999 @ 0x464f
8000594: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8000596: 4b3c ldr r3, [pc, #240] @ (8000688 <MX_TIM4_Init+0x13c>)
8000598: 2200 movs r2, #0
800059a: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
800059c: 4b3a ldr r3, [pc, #232] @ (8000688 <MX_TIM4_Init+0x13c>)
800059e: 2200 movs r2, #0
80005a0: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
80005a2: 4839 ldr r0, [pc, #228] @ (8000688 <MX_TIM4_Init+0x13c>)
80005a4: f002 ff38 bl 8003418 <HAL_TIM_Base_Init>
80005a8: 4603 mov r3, r0
80005aa: 2b00 cmp r3, #0
80005ac: d001 beq.n 80005b2 <MX_TIM4_Init+0x66>
{
Error_Handler();
80005ae: f000 f8af bl 8000710 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
80005b2: f44f 5380 mov.w r3, #4096 @ 0x1000
80005b6: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
80005b8: f107 0328 add.w r3, r7, #40 @ 0x28
80005bc: 4619 mov r1, r3
80005be: 4832 ldr r0, [pc, #200] @ (8000688 <MX_TIM4_Init+0x13c>)
80005c0: f003 f936 bl 8003830 <HAL_TIM_ConfigClockSource>
80005c4: 4603 mov r3, r0
80005c6: 2b00 cmp r3, #0
80005c8: d001 beq.n 80005ce <MX_TIM4_Init+0x82>
{
Error_Handler();
80005ca: f000 f8a1 bl 8000710 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
80005ce: 482e ldr r0, [pc, #184] @ (8000688 <MX_TIM4_Init+0x13c>)
80005d0: f002 ff71 bl 80034b6 <HAL_TIM_PWM_Init>
80005d4: 4603 mov r3, r0
80005d6: 2b00 cmp r3, #0
80005d8: d001 beq.n 80005de <MX_TIM4_Init+0x92>
{
Error_Handler();
80005da: f000 f899 bl 8000710 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80005de: 2300 movs r3, #0
80005e0: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80005e2: 2300 movs r3, #0
80005e4: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
80005e6: f107 0320 add.w r3, r7, #32
80005ea: 4619 mov r1, r3
80005ec: 4826 ldr r0, [pc, #152] @ (8000688 <MX_TIM4_Init+0x13c>)
80005ee: f003 fc97 bl 8003f20 <HAL_TIMEx_MasterConfigSynchronization>
80005f2: 4603 mov r3, r0
80005f4: 2b00 cmp r3, #0
80005f6: d001 beq.n 80005fc <MX_TIM4_Init+0xb0>
{
Error_Handler();
80005f8: f000 f88a bl 8000710 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
80005fc: 2360 movs r3, #96 @ 0x60
80005fe: 607b str r3, [r7, #4]
sConfigOC.Pulse = 7000;
8000600: f641 3358 movw r3, #7000 @ 0x1b58
8000604: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8000606: 2300 movs r3, #0
8000608: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800060a: 2304 movs r3, #4
800060c: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
800060e: 1d3b adds r3, r7, #4
8000610: 2200 movs r2, #0
8000612: 4619 mov r1, r3
8000614: 481c ldr r0, [pc, #112] @ (8000688 <MX_TIM4_Init+0x13c>)
8000616: f003 f849 bl 80036ac <HAL_TIM_PWM_ConfigChannel>
800061a: 4603 mov r3, r0
800061c: 2b00 cmp r3, #0
800061e: d001 beq.n 8000624 <MX_TIM4_Init+0xd8>
{
Error_Handler();
8000620: f000 f876 bl 8000710 <Error_Handler>
}
sConfigOC.Pulse = 10000;
8000624: f242 7310 movw r3, #10000 @ 0x2710
8000628: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
800062a: 1d3b adds r3, r7, #4
800062c: 2204 movs r2, #4
800062e: 4619 mov r1, r3
8000630: 4815 ldr r0, [pc, #84] @ (8000688 <MX_TIM4_Init+0x13c>)
8000632: f003 f83b bl 80036ac <HAL_TIM_PWM_ConfigChannel>
8000636: 4603 mov r3, r0
8000638: 2b00 cmp r3, #0
800063a: d001 beq.n 8000640 <MX_TIM4_Init+0xf4>
{
Error_Handler();
800063c: f000 f868 bl 8000710 <Error_Handler>
}
sConfigOC.Pulse = 3000;
8000640: f640 33b8 movw r3, #3000 @ 0xbb8
8000644: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8000646: 1d3b adds r3, r7, #4
8000648: 2208 movs r2, #8
800064a: 4619 mov r1, r3
800064c: 480e ldr r0, [pc, #56] @ (8000688 <MX_TIM4_Init+0x13c>)
800064e: f003 f82d bl 80036ac <HAL_TIM_PWM_ConfigChannel>
8000652: 4603 mov r3, r0
8000654: 2b00 cmp r3, #0
8000656: d001 beq.n 800065c <MX_TIM4_Init+0x110>
{
Error_Handler();
8000658: f000 f85a bl 8000710 <Error_Handler>
}
sConfigOC.Pulse = 12000;
800065c: f642 63e0 movw r3, #12000 @ 0x2ee0
8000660: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8000662: 1d3b adds r3, r7, #4
8000664: 220c movs r2, #12
8000666: 4619 mov r1, r3
8000668: 4807 ldr r0, [pc, #28] @ (8000688 <MX_TIM4_Init+0x13c>)
800066a: f003 f81f bl 80036ac <HAL_TIM_PWM_ConfigChannel>
800066e: 4603 mov r3, r0
8000670: 2b00 cmp r3, #0
8000672: d001 beq.n 8000678 <MX_TIM4_Init+0x12c>
{
Error_Handler();
8000674: f000 f84c bl 8000710 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
8000678: 4803 ldr r0, [pc, #12] @ (8000688 <MX_TIM4_Init+0x13c>)
800067a: f000 f8c5 bl 8000808 <HAL_TIM_MspPostInit>
}
800067e: bf00 nop
8000680: 3738 adds r7, #56 @ 0x38
8000682: 46bd mov sp, r7
8000684: bd80 pop {r7, pc}
8000686: bf00 nop
8000688: 20000278 .word 0x20000278
800068c: 40000800 .word 0x40000800
08000690 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8000690: b580 push {r7, lr}
8000692: b088 sub sp, #32
8000694: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000696: f107 0310 add.w r3, r7, #16
800069a: 2200 movs r2, #0
800069c: 601a str r2, [r3, #0]
800069e: 605a str r2, [r3, #4]
80006a0: 609a str r2, [r3, #8]
80006a2: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOD_CLK_ENABLE();
80006a4: 4b18 ldr r3, [pc, #96] @ (8000708 <MX_GPIO_Init+0x78>)
80006a6: 699b ldr r3, [r3, #24]
80006a8: 4a17 ldr r2, [pc, #92] @ (8000708 <MX_GPIO_Init+0x78>)
80006aa: f043 0320 orr.w r3, r3, #32
80006ae: 6193 str r3, [r2, #24]
80006b0: 4b15 ldr r3, [pc, #84] @ (8000708 <MX_GPIO_Init+0x78>)
80006b2: 699b ldr r3, [r3, #24]
80006b4: f003 0320 and.w r3, r3, #32
80006b8: 60fb str r3, [r7, #12]
80006ba: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
80006bc: 4b12 ldr r3, [pc, #72] @ (8000708 <MX_GPIO_Init+0x78>)
80006be: 699b ldr r3, [r3, #24]
80006c0: 4a11 ldr r2, [pc, #68] @ (8000708 <MX_GPIO_Init+0x78>)
80006c2: f043 0304 orr.w r3, r3, #4
80006c6: 6193 str r3, [r2, #24]
80006c8: 4b0f ldr r3, [pc, #60] @ (8000708 <MX_GPIO_Init+0x78>)
80006ca: 699b ldr r3, [r3, #24]
80006cc: f003 0304 and.w r3, r3, #4
80006d0: 60bb str r3, [r7, #8]
80006d2: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOB_CLK_ENABLE();
80006d4: 4b0c ldr r3, [pc, #48] @ (8000708 <MX_GPIO_Init+0x78>)
80006d6: 699b ldr r3, [r3, #24]
80006d8: 4a0b ldr r2, [pc, #44] @ (8000708 <MX_GPIO_Init+0x78>)
80006da: f043 0308 orr.w r3, r3, #8
80006de: 6193 str r3, [r2, #24]
80006e0: 4b09 ldr r3, [pc, #36] @ (8000708 <MX_GPIO_Init+0x78>)
80006e2: 699b ldr r3, [r3, #24]
80006e4: f003 0308 and.w r3, r3, #8
80006e8: 607b str r3, [r7, #4]
80006ea: 687b ldr r3, [r7, #4]
/*Configure GPIO pins : PA4 PA5 PA6 PA7 */
GPIO_InitStruct.Pin = GPIO_PIN_4|GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7;
80006ec: 23f0 movs r3, #240 @ 0xf0
80006ee: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
80006f0: 2303 movs r3, #3
80006f2: 617b str r3, [r7, #20]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80006f4: f107 0310 add.w r3, r7, #16
80006f8: 4619 mov r1, r3
80006fa: 4804 ldr r0, [pc, #16] @ (800070c <MX_GPIO_Init+0x7c>)
80006fc: f000 fb14 bl 8000d28 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
8000700: bf00 nop
8000702: 3720 adds r7, #32
8000704: 46bd mov sp, r7
8000706: bd80 pop {r7, pc}
8000708: 40021000 .word 0x40021000
800070c: 40010800 .word 0x40010800
08000710 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8000710: b480 push {r7}
8000712: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8000714: b672 cpsid i
}
8000716: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
8000718: bf00 nop
800071a: e7fd b.n 8000718 <Error_Handler+0x8>
0800071c <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
800071c: b480 push {r7}
800071e: b085 sub sp, #20
8000720: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8000722: 4b15 ldr r3, [pc, #84] @ (8000778 <HAL_MspInit+0x5c>)
8000724: 699b ldr r3, [r3, #24]
8000726: 4a14 ldr r2, [pc, #80] @ (8000778 <HAL_MspInit+0x5c>)
8000728: f043 0301 orr.w r3, r3, #1
800072c: 6193 str r3, [r2, #24]
800072e: 4b12 ldr r3, [pc, #72] @ (8000778 <HAL_MspInit+0x5c>)
8000730: 699b ldr r3, [r3, #24]
8000732: f003 0301 and.w r3, r3, #1
8000736: 60bb str r3, [r7, #8]
8000738: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
800073a: 4b0f ldr r3, [pc, #60] @ (8000778 <HAL_MspInit+0x5c>)
800073c: 69db ldr r3, [r3, #28]
800073e: 4a0e ldr r2, [pc, #56] @ (8000778 <HAL_MspInit+0x5c>)
8000740: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8000744: 61d3 str r3, [r2, #28]
8000746: 4b0c ldr r3, [pc, #48] @ (8000778 <HAL_MspInit+0x5c>)
8000748: 69db ldr r3, [r3, #28]
800074a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800074e: 607b str r3, [r7, #4]
8000750: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** DISABLE: JTAG-DP Disabled and SW-DP Disabled
*/
__HAL_AFIO_REMAP_SWJ_DISABLE();
8000752: 4b0a ldr r3, [pc, #40] @ (800077c <HAL_MspInit+0x60>)
8000754: 685b ldr r3, [r3, #4]
8000756: 60fb str r3, [r7, #12]
8000758: 68fb ldr r3, [r7, #12]
800075a: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
800075e: 60fb str r3, [r7, #12]
8000760: 68fb ldr r3, [r7, #12]
8000762: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000
8000766: 60fb str r3, [r7, #12]
8000768: 4a04 ldr r2, [pc, #16] @ (800077c <HAL_MspInit+0x60>)
800076a: 68fb ldr r3, [r7, #12]
800076c: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
800076e: bf00 nop
8000770: 3714 adds r7, #20
8000772: 46bd mov sp, r7
8000774: bc80 pop {r7}
8000776: 4770 bx lr
8000778: 40021000 .word 0x40021000
800077c: 40010000 .word 0x40010000
08000780 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8000780: b480 push {r7}
8000782: b087 sub sp, #28
8000784: af00 add r7, sp, #0
8000786: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
8000788: 687b ldr r3, [r7, #4]
800078a: 681b ldr r3, [r3, #0]
800078c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8000790: d10c bne.n 80007ac <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
8000792: 4b1a ldr r3, [pc, #104] @ (80007fc <HAL_TIM_Base_MspInit+0x7c>)
8000794: 69db ldr r3, [r3, #28]
8000796: 4a19 ldr r2, [pc, #100] @ (80007fc <HAL_TIM_Base_MspInit+0x7c>)
8000798: f043 0301 orr.w r3, r3, #1
800079c: 61d3 str r3, [r2, #28]
800079e: 4b17 ldr r3, [pc, #92] @ (80007fc <HAL_TIM_Base_MspInit+0x7c>)
80007a0: 69db ldr r3, [r3, #28]
80007a2: f003 0301 and.w r3, r3, #1
80007a6: 617b str r3, [r7, #20]
80007a8: 697b ldr r3, [r7, #20]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
80007aa: e022 b.n 80007f2 <HAL_TIM_Base_MspInit+0x72>
else if(htim_base->Instance==TIM3)
80007ac: 687b ldr r3, [r7, #4]
80007ae: 681b ldr r3, [r3, #0]
80007b0: 4a13 ldr r2, [pc, #76] @ (8000800 <HAL_TIM_Base_MspInit+0x80>)
80007b2: 4293 cmp r3, r2
80007b4: d10c bne.n 80007d0 <HAL_TIM_Base_MspInit+0x50>
__HAL_RCC_TIM3_CLK_ENABLE();
80007b6: 4b11 ldr r3, [pc, #68] @ (80007fc <HAL_TIM_Base_MspInit+0x7c>)
80007b8: 69db ldr r3, [r3, #28]
80007ba: 4a10 ldr r2, [pc, #64] @ (80007fc <HAL_TIM_Base_MspInit+0x7c>)
80007bc: f043 0302 orr.w r3, r3, #2
80007c0: 61d3 str r3, [r2, #28]
80007c2: 4b0e ldr r3, [pc, #56] @ (80007fc <HAL_TIM_Base_MspInit+0x7c>)
80007c4: 69db ldr r3, [r3, #28]
80007c6: f003 0302 and.w r3, r3, #2
80007ca: 613b str r3, [r7, #16]
80007cc: 693b ldr r3, [r7, #16]
}
80007ce: e010 b.n 80007f2 <HAL_TIM_Base_MspInit+0x72>
else if(htim_base->Instance==TIM4)
80007d0: 687b ldr r3, [r7, #4]
80007d2: 681b ldr r3, [r3, #0]
80007d4: 4a0b ldr r2, [pc, #44] @ (8000804 <HAL_TIM_Base_MspInit+0x84>)
80007d6: 4293 cmp r3, r2
80007d8: d10b bne.n 80007f2 <HAL_TIM_Base_MspInit+0x72>
__HAL_RCC_TIM4_CLK_ENABLE();
80007da: 4b08 ldr r3, [pc, #32] @ (80007fc <HAL_TIM_Base_MspInit+0x7c>)
80007dc: 69db ldr r3, [r3, #28]
80007de: 4a07 ldr r2, [pc, #28] @ (80007fc <HAL_TIM_Base_MspInit+0x7c>)
80007e0: f043 0304 orr.w r3, r3, #4
80007e4: 61d3 str r3, [r2, #28]
80007e6: 4b05 ldr r3, [pc, #20] @ (80007fc <HAL_TIM_Base_MspInit+0x7c>)
80007e8: 69db ldr r3, [r3, #28]
80007ea: f003 0304 and.w r3, r3, #4
80007ee: 60fb str r3, [r7, #12]
80007f0: 68fb ldr r3, [r7, #12]
}
80007f2: bf00 nop
80007f4: 371c adds r7, #28
80007f6: 46bd mov sp, r7
80007f8: bc80 pop {r7}
80007fa: 4770 bx lr
80007fc: 40021000 .word 0x40021000
8000800: 40000400 .word 0x40000400
8000804: 40000800 .word 0x40000800
08000808 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8000808: b580 push {r7, lr}
800080a: b08a sub sp, #40 @ 0x28
800080c: af00 add r7, sp, #0
800080e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8000810: f107 0314 add.w r3, r7, #20
8000814: 2200 movs r2, #0
8000816: 601a str r2, [r3, #0]
8000818: 605a str r2, [r3, #4]
800081a: 609a str r2, [r3, #8]
800081c: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
800081e: 687b ldr r3, [r7, #4]
8000820: 681b ldr r3, [r3, #0]
8000822: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8000826: d118 bne.n 800085a <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8000828: 4b35 ldr r3, [pc, #212] @ (8000900 <HAL_TIM_MspPostInit+0xf8>)
800082a: 699b ldr r3, [r3, #24]
800082c: 4a34 ldr r2, [pc, #208] @ (8000900 <HAL_TIM_MspPostInit+0xf8>)
800082e: f043 0304 orr.w r3, r3, #4
8000832: 6193 str r3, [r2, #24]
8000834: 4b32 ldr r3, [pc, #200] @ (8000900 <HAL_TIM_MspPostInit+0xf8>)
8000836: 699b ldr r3, [r3, #24]
8000838: f003 0304 and.w r3, r3, #4
800083c: 613b str r3, [r7, #16]
800083e: 693b ldr r3, [r7, #16]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_2|GPIO_PIN_3;
8000840: 230f movs r3, #15
8000842: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000844: 2302 movs r3, #2
8000846: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8000848: 2303 movs r3, #3
800084a: 623b str r3, [r7, #32]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800084c: f107 0314 add.w r3, r7, #20
8000850: 4619 mov r1, r3
8000852: 482c ldr r0, [pc, #176] @ (8000904 <HAL_TIM_MspPostInit+0xfc>)
8000854: f000 fa68 bl 8000d28 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
8000858: e04d b.n 80008f6 <HAL_TIM_MspPostInit+0xee>
else if(htim->Instance==TIM3)
800085a: 687b ldr r3, [r7, #4]
800085c: 681b ldr r3, [r3, #0]
800085e: 4a2a ldr r2, [pc, #168] @ (8000908 <HAL_TIM_MspPostInit+0x100>)
8000860: 4293 cmp r3, r2
8000862: d12a bne.n 80008ba <HAL_TIM_MspPostInit+0xb2>
__HAL_RCC_GPIOB_CLK_ENABLE();
8000864: 4b26 ldr r3, [pc, #152] @ (8000900 <HAL_TIM_MspPostInit+0xf8>)
8000866: 699b ldr r3, [r3, #24]
8000868: 4a25 ldr r2, [pc, #148] @ (8000900 <HAL_TIM_MspPostInit+0xf8>)
800086a: f043 0308 orr.w r3, r3, #8
800086e: 6193 str r3, [r2, #24]
8000870: 4b23 ldr r3, [pc, #140] @ (8000900 <HAL_TIM_MspPostInit+0xf8>)
8000872: 699b ldr r3, [r3, #24]
8000874: f003 0308 and.w r3, r3, #8
8000878: 60fb str r3, [r7, #12]
800087a: 68fb ldr r3, [r7, #12]
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_4|GPIO_PIN_5;
800087c: 2333 movs r3, #51 @ 0x33
800087e: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8000880: 2302 movs r3, #2
8000882: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8000884: 2302 movs r3, #2
8000886: 623b str r3, [r7, #32]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8000888: f107 0314 add.w r3, r7, #20
800088c: 4619 mov r1, r3
800088e: 481f ldr r0, [pc, #124] @ (800090c <HAL_TIM_MspPostInit+0x104>)
8000890: f000 fa4a bl 8000d28 <HAL_GPIO_Init>
__HAL_AFIO_REMAP_TIM3_PARTIAL();
8000894: 4b1e ldr r3, [pc, #120] @ (8000910 <HAL_TIM_MspPostInit+0x108>)
8000896: 685b ldr r3, [r3, #4]
8000898: 627b str r3, [r7, #36] @ 0x24
800089a: 6a7b ldr r3, [r7, #36] @ 0x24
800089c: f423 6340 bic.w r3, r3, #3072 @ 0xc00
80008a0: 627b str r3, [r7, #36] @ 0x24
80008a2: 6a7b ldr r3, [r7, #36] @ 0x24
80008a4: f043 63e0 orr.w r3, r3, #117440512 @ 0x7000000
80008a8: 627b str r3, [r7, #36] @ 0x24
80008aa: 6a7b ldr r3, [r7, #36] @ 0x24
80008ac: f443 6300 orr.w r3, r3, #2048 @ 0x800
80008b0: 627b str r3, [r7, #36] @ 0x24
80008b2: 4a17 ldr r2, [pc, #92] @ (8000910 <HAL_TIM_MspPostInit+0x108>)
80008b4: 6a7b ldr r3, [r7, #36] @ 0x24
80008b6: 6053 str r3, [r2, #4]
}
80008b8: e01d b.n 80008f6 <HAL_TIM_MspPostInit+0xee>
else if(htim->Instance==TIM4)
80008ba: 687b ldr r3, [r7, #4]
80008bc: 681b ldr r3, [r3, #0]
80008be: 4a15 ldr r2, [pc, #84] @ (8000914 <HAL_TIM_MspPostInit+0x10c>)
80008c0: 4293 cmp r3, r2
80008c2: d118 bne.n 80008f6 <HAL_TIM_MspPostInit+0xee>
__HAL_RCC_GPIOB_CLK_ENABLE();
80008c4: 4b0e ldr r3, [pc, #56] @ (8000900 <HAL_TIM_MspPostInit+0xf8>)
80008c6: 699b ldr r3, [r3, #24]
80008c8: 4a0d ldr r2, [pc, #52] @ (8000900 <HAL_TIM_MspPostInit+0xf8>)
80008ca: f043 0308 orr.w r3, r3, #8
80008ce: 6193 str r3, [r2, #24]
80008d0: 4b0b ldr r3, [pc, #44] @ (8000900 <HAL_TIM_MspPostInit+0xf8>)
80008d2: 699b ldr r3, [r3, #24]
80008d4: f003 0308 and.w r3, r3, #8
80008d8: 60bb str r3, [r7, #8]
80008da: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7|GPIO_PIN_8|GPIO_PIN_9;
80008dc: f44f 7370 mov.w r3, #960 @ 0x3c0
80008e0: 617b str r3, [r7, #20]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80008e2: 2302 movs r3, #2
80008e4: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
80008e6: 2303 movs r3, #3
80008e8: 623b str r3, [r7, #32]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80008ea: f107 0314 add.w r3, r7, #20
80008ee: 4619 mov r1, r3
80008f0: 4806 ldr r0, [pc, #24] @ (800090c <HAL_TIM_MspPostInit+0x104>)
80008f2: f000 fa19 bl 8000d28 <HAL_GPIO_Init>
}
80008f6: bf00 nop
80008f8: 3728 adds r7, #40 @ 0x28
80008fa: 46bd mov sp, r7
80008fc: bd80 pop {r7, pc}
80008fe: bf00 nop
8000900: 40021000 .word 0x40021000
8000904: 40010800 .word 0x40010800
8000908: 40000400 .word 0x40000400
800090c: 40010c00 .word 0x40010c00
8000910: 40010000 .word 0x40010000
8000914: 40000800 .word 0x40000800
08000918 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8000918: b480 push {r7}
800091a: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
800091c: bf00 nop
800091e: e7fd b.n 800091c <NMI_Handler+0x4>
08000920 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8000920: b480 push {r7}
8000922: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8000924: bf00 nop
8000926: e7fd b.n 8000924 <HardFault_Handler+0x4>
08000928 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8000928: b480 push {r7}
800092a: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
800092c: bf00 nop
800092e: e7fd b.n 800092c <MemManage_Handler+0x4>
08000930 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8000930: b480 push {r7}
8000932: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8000934: bf00 nop
8000936: e7fd b.n 8000934 <BusFault_Handler+0x4>
08000938 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8000938: b480 push {r7}
800093a: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
800093c: bf00 nop
800093e: e7fd b.n 800093c <UsageFault_Handler+0x4>
08000940 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8000940: b480 push {r7}
8000942: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8000944: bf00 nop
8000946: 46bd mov sp, r7
8000948: bc80 pop {r7}
800094a: 4770 bx lr
0800094c <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
800094c: b480 push {r7}
800094e: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8000950: bf00 nop
8000952: 46bd mov sp, r7
8000954: bc80 pop {r7}
8000956: 4770 bx lr
08000958 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8000958: b480 push {r7}
800095a: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
800095c: bf00 nop
800095e: 46bd mov sp, r7
8000960: bc80 pop {r7}
8000962: 4770 bx lr
08000964 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8000964: b580 push {r7, lr}
8000966: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8000968: f000 f8b4 bl 8000ad4 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
800096c: bf00 nop
800096e: bd80 pop {r7, pc}
08000970 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8000970: b580 push {r7, lr}
8000972: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8000974: 4802 ldr r0, [pc, #8] @ (8000980 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8000976: f000 fc77 bl 8001268 <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
800097a: bf00 nop
800097c: bd80 pop {r7, pc}
800097e: bf00 nop
8000980: 20001094 .word 0x20001094
08000984 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8000984: b580 push {r7, lr}
8000986: b086 sub sp, #24
8000988: af00 add r7, sp, #0
800098a: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
800098c: 4a14 ldr r2, [pc, #80] @ (80009e0 <_sbrk+0x5c>)
800098e: 4b15 ldr r3, [pc, #84] @ (80009e4 <_sbrk+0x60>)
8000990: 1ad3 subs r3, r2, r3
8000992: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8000994: 697b ldr r3, [r7, #20]
8000996: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8000998: 4b13 ldr r3, [pc, #76] @ (80009e8 <_sbrk+0x64>)
800099a: 681b ldr r3, [r3, #0]
800099c: 2b00 cmp r3, #0
800099e: d102 bne.n 80009a6 <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
80009a0: 4b11 ldr r3, [pc, #68] @ (80009e8 <_sbrk+0x64>)
80009a2: 4a12 ldr r2, [pc, #72] @ (80009ec <_sbrk+0x68>)
80009a4: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
80009a6: 4b10 ldr r3, [pc, #64] @ (80009e8 <_sbrk+0x64>)
80009a8: 681a ldr r2, [r3, #0]
80009aa: 687b ldr r3, [r7, #4]
80009ac: 4413 add r3, r2
80009ae: 693a ldr r2, [r7, #16]
80009b0: 429a cmp r2, r3
80009b2: d207 bcs.n 80009c4 <_sbrk+0x40>
{
errno = ENOMEM;
80009b4: f007 ff58 bl 8008868 <__errno>
80009b8: 4603 mov r3, r0
80009ba: 220c movs r2, #12
80009bc: 601a str r2, [r3, #0]
return (void *)-1;
80009be: f04f 33ff mov.w r3, #4294967295
80009c2: e009 b.n 80009d8 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
80009c4: 4b08 ldr r3, [pc, #32] @ (80009e8 <_sbrk+0x64>)
80009c6: 681b ldr r3, [r3, #0]
80009c8: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
80009ca: 4b07 ldr r3, [pc, #28] @ (80009e8 <_sbrk+0x64>)
80009cc: 681a ldr r2, [r3, #0]
80009ce: 687b ldr r3, [r7, #4]
80009d0: 4413 add r3, r2
80009d2: 4a05 ldr r2, [pc, #20] @ (80009e8 <_sbrk+0x64>)
80009d4: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
80009d6: 68fb ldr r3, [r7, #12]
}
80009d8: 4618 mov r0, r3
80009da: 3718 adds r7, #24
80009dc: 46bd mov sp, r7
80009de: bd80 pop {r7, pc}
80009e0: 20005000 .word 0x20005000
80009e4: 00000400 .word 0x00000400
80009e8: 200002c0 .word 0x200002c0
80009ec: 200016d8 .word 0x200016d8
080009f0 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
80009f0: b480 push {r7}
80009f2: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
80009f4: bf00 nop
80009f6: 46bd mov sp, r7
80009f8: bc80 pop {r7}
80009fa: 4770 bx lr
080009fc <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
80009fc: f7ff fff8 bl 80009f0 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8000a00: 480b ldr r0, [pc, #44] @ (8000a30 <LoopFillZerobss+0xe>)
ldr r1, =_edata
8000a02: 490c ldr r1, [pc, #48] @ (8000a34 <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8000a04: 4a0c ldr r2, [pc, #48] @ (8000a38 <LoopFillZerobss+0x16>)
movs r3, #0
8000a06: 2300 movs r3, #0
b LoopCopyDataInit
8000a08: e002 b.n 8000a10 <LoopCopyDataInit>
08000a0a <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8000a0a: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8000a0c: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8000a0e: 3304 adds r3, #4
08000a10 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8000a10: 18c4 adds r4, r0, r3
cmp r4, r1
8000a12: 428c cmp r4, r1
bcc CopyDataInit
8000a14: d3f9 bcc.n 8000a0a <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8000a16: 4a09 ldr r2, [pc, #36] @ (8000a3c <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8000a18: 4c09 ldr r4, [pc, #36] @ (8000a40 <LoopFillZerobss+0x1e>)
movs r3, #0
8000a1a: 2300 movs r3, #0
b LoopFillZerobss
8000a1c: e001 b.n 8000a22 <LoopFillZerobss>
08000a1e <FillZerobss>:
FillZerobss:
str r3, [r2]
8000a1e: 6013 str r3, [r2, #0]
adds r2, r2, #4
8000a20: 3204 adds r2, #4
08000a22 <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8000a22: 42a2 cmp r2, r4
bcc FillZerobss
8000a24: d3fb bcc.n 8000a1e <FillZerobss>
/* Call static constructors */
bl __libc_init_array
8000a26: f007 ff25 bl 8008874 <__libc_init_array>
/* Call the application's entry point.*/
bl main
8000a2a: f7ff fb8f bl 800014c <main>
bx lr
8000a2e: 4770 bx lr
ldr r0, =_sdata
8000a30: 20000000 .word 0x20000000
ldr r1, =_edata
8000a34: 200001cc .word 0x200001cc
ldr r2, =_sidata
8000a38: 08009244 .word 0x08009244
ldr r2, =_sbss
8000a3c: 200001cc .word 0x200001cc
ldr r4, =_ebss
8000a40: 200016d4 .word 0x200016d4
08000a44 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8000a44: e7fe b.n 8000a44 <ADC1_2_IRQHandler>
...
08000a48 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8000a48: b580 push {r7, lr}
8000a4a: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8000a4c: 4b08 ldr r3, [pc, #32] @ (8000a70 <HAL_Init+0x28>)
8000a4e: 681b ldr r3, [r3, #0]
8000a50: 4a07 ldr r2, [pc, #28] @ (8000a70 <HAL_Init+0x28>)
8000a52: f043 0310 orr.w r3, r3, #16
8000a56: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8000a58: 2003 movs r0, #3
8000a5a: f000 f923 bl 8000ca4 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8000a5e: 200f movs r0, #15
8000a60: f000 f808 bl 8000a74 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8000a64: f7ff fe5a bl 800071c <HAL_MspInit>
/* Return function status */
return HAL_OK;
8000a68: 2300 movs r3, #0
}
8000a6a: 4618 mov r0, r3
8000a6c: bd80 pop {r7, pc}
8000a6e: bf00 nop
8000a70: 40022000 .word 0x40022000
08000a74 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8000a74: b580 push {r7, lr}
8000a76: b082 sub sp, #8
8000a78: af00 add r7, sp, #0
8000a7a: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8000a7c: 4b12 ldr r3, [pc, #72] @ (8000ac8 <HAL_InitTick+0x54>)
8000a7e: 681a ldr r2, [r3, #0]
8000a80: 4b12 ldr r3, [pc, #72] @ (8000acc <HAL_InitTick+0x58>)
8000a82: 781b ldrb r3, [r3, #0]
8000a84: 4619 mov r1, r3
8000a86: f44f 737a mov.w r3, #1000 @ 0x3e8
8000a8a: fbb3 f3f1 udiv r3, r3, r1
8000a8e: fbb2 f3f3 udiv r3, r2, r3
8000a92: 4618 mov r0, r3
8000a94: f000 f93b bl 8000d0e <HAL_SYSTICK_Config>
8000a98: 4603 mov r3, r0
8000a9a: 2b00 cmp r3, #0
8000a9c: d001 beq.n 8000aa2 <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8000a9e: 2301 movs r3, #1
8000aa0: e00e b.n 8000ac0 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8000aa2: 687b ldr r3, [r7, #4]
8000aa4: 2b0f cmp r3, #15
8000aa6: d80a bhi.n 8000abe <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8000aa8: 2200 movs r2, #0
8000aaa: 6879 ldr r1, [r7, #4]
8000aac: f04f 30ff mov.w r0, #4294967295
8000ab0: f000 f903 bl 8000cba <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8000ab4: 4a06 ldr r2, [pc, #24] @ (8000ad0 <HAL_InitTick+0x5c>)
8000ab6: 687b ldr r3, [r7, #4]
8000ab8: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8000aba: 2300 movs r3, #0
8000abc: e000 b.n 8000ac0 <HAL_InitTick+0x4c>
return HAL_ERROR;
8000abe: 2301 movs r3, #1
}
8000ac0: 4618 mov r0, r3
8000ac2: 3708 adds r7, #8
8000ac4: 46bd mov sp, r7
8000ac6: bd80 pop {r7, pc}
8000ac8: 20000000 .word 0x20000000
8000acc: 20000008 .word 0x20000008
8000ad0: 20000004 .word 0x20000004
08000ad4 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8000ad4: b480 push {r7}
8000ad6: af00 add r7, sp, #0
uwTick += uwTickFreq;
8000ad8: 4b05 ldr r3, [pc, #20] @ (8000af0 <HAL_IncTick+0x1c>)
8000ada: 781b ldrb r3, [r3, #0]
8000adc: 461a mov r2, r3
8000ade: 4b05 ldr r3, [pc, #20] @ (8000af4 <HAL_IncTick+0x20>)
8000ae0: 681b ldr r3, [r3, #0]
8000ae2: 4413 add r3, r2
8000ae4: 4a03 ldr r2, [pc, #12] @ (8000af4 <HAL_IncTick+0x20>)
8000ae6: 6013 str r3, [r2, #0]
}
8000ae8: bf00 nop
8000aea: 46bd mov sp, r7
8000aec: bc80 pop {r7}
8000aee: 4770 bx lr
8000af0: 20000008 .word 0x20000008
8000af4: 200002c4 .word 0x200002c4
08000af8 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8000af8: b480 push {r7}
8000afa: af00 add r7, sp, #0
return uwTick;
8000afc: 4b02 ldr r3, [pc, #8] @ (8000b08 <HAL_GetTick+0x10>)
8000afe: 681b ldr r3, [r3, #0]
}
8000b00: 4618 mov r0, r3
8000b02: 46bd mov sp, r7
8000b04: bc80 pop {r7}
8000b06: 4770 bx lr
8000b08: 200002c4 .word 0x200002c4
08000b0c <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8000b0c: b480 push {r7}
8000b0e: b085 sub sp, #20
8000b10: af00 add r7, sp, #0
8000b12: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8000b14: 687b ldr r3, [r7, #4]
8000b16: f003 0307 and.w r3, r3, #7
8000b1a: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8000b1c: 4b0c ldr r3, [pc, #48] @ (8000b50 <__NVIC_SetPriorityGrouping+0x44>)
8000b1e: 68db ldr r3, [r3, #12]
8000b20: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8000b22: 68ba ldr r2, [r7, #8]
8000b24: f64f 03ff movw r3, #63743 @ 0xf8ff
8000b28: 4013 ands r3, r2
8000b2a: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8000b2c: 68fb ldr r3, [r7, #12]
8000b2e: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8000b30: 68bb ldr r3, [r7, #8]
8000b32: 4313 orrs r3, r2
reg_value = (reg_value |
8000b34: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8000b38: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8000b3c: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8000b3e: 4a04 ldr r2, [pc, #16] @ (8000b50 <__NVIC_SetPriorityGrouping+0x44>)
8000b40: 68bb ldr r3, [r7, #8]
8000b42: 60d3 str r3, [r2, #12]
}
8000b44: bf00 nop
8000b46: 3714 adds r7, #20
8000b48: 46bd mov sp, r7
8000b4a: bc80 pop {r7}
8000b4c: 4770 bx lr
8000b4e: bf00 nop
8000b50: e000ed00 .word 0xe000ed00
08000b54 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8000b54: b480 push {r7}
8000b56: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8000b58: 4b04 ldr r3, [pc, #16] @ (8000b6c <__NVIC_GetPriorityGrouping+0x18>)
8000b5a: 68db ldr r3, [r3, #12]
8000b5c: 0a1b lsrs r3, r3, #8
8000b5e: f003 0307 and.w r3, r3, #7
}
8000b62: 4618 mov r0, r3
8000b64: 46bd mov sp, r7
8000b66: bc80 pop {r7}
8000b68: 4770 bx lr
8000b6a: bf00 nop
8000b6c: e000ed00 .word 0xe000ed00
08000b70 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8000b70: b480 push {r7}
8000b72: b083 sub sp, #12
8000b74: af00 add r7, sp, #0
8000b76: 4603 mov r3, r0
8000b78: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8000b7a: f997 3007 ldrsb.w r3, [r7, #7]
8000b7e: 2b00 cmp r3, #0
8000b80: db0b blt.n 8000b9a <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8000b82: 79fb ldrb r3, [r7, #7]
8000b84: f003 021f and.w r2, r3, #31
8000b88: 4906 ldr r1, [pc, #24] @ (8000ba4 <__NVIC_EnableIRQ+0x34>)
8000b8a: f997 3007 ldrsb.w r3, [r7, #7]
8000b8e: 095b lsrs r3, r3, #5
8000b90: 2001 movs r0, #1
8000b92: fa00 f202 lsl.w r2, r0, r2
8000b96: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8000b9a: bf00 nop
8000b9c: 370c adds r7, #12
8000b9e: 46bd mov sp, r7
8000ba0: bc80 pop {r7}
8000ba2: 4770 bx lr
8000ba4: e000e100 .word 0xe000e100
08000ba8 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8000ba8: b480 push {r7}
8000baa: b083 sub sp, #12
8000bac: af00 add r7, sp, #0
8000bae: 4603 mov r3, r0
8000bb0: 6039 str r1, [r7, #0]
8000bb2: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8000bb4: f997 3007 ldrsb.w r3, [r7, #7]
8000bb8: 2b00 cmp r3, #0
8000bba: db0a blt.n 8000bd2 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8000bbc: 683b ldr r3, [r7, #0]
8000bbe: b2da uxtb r2, r3
8000bc0: 490c ldr r1, [pc, #48] @ (8000bf4 <__NVIC_SetPriority+0x4c>)
8000bc2: f997 3007 ldrsb.w r3, [r7, #7]
8000bc6: 0112 lsls r2, r2, #4
8000bc8: b2d2 uxtb r2, r2
8000bca: 440b add r3, r1
8000bcc: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8000bd0: e00a b.n 8000be8 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8000bd2: 683b ldr r3, [r7, #0]
8000bd4: b2da uxtb r2, r3
8000bd6: 4908 ldr r1, [pc, #32] @ (8000bf8 <__NVIC_SetPriority+0x50>)
8000bd8: 79fb ldrb r3, [r7, #7]
8000bda: f003 030f and.w r3, r3, #15
8000bde: 3b04 subs r3, #4
8000be0: 0112 lsls r2, r2, #4
8000be2: b2d2 uxtb r2, r2
8000be4: 440b add r3, r1
8000be6: 761a strb r2, [r3, #24]
}
8000be8: bf00 nop
8000bea: 370c adds r7, #12
8000bec: 46bd mov sp, r7
8000bee: bc80 pop {r7}
8000bf0: 4770 bx lr
8000bf2: bf00 nop
8000bf4: e000e100 .word 0xe000e100
8000bf8: e000ed00 .word 0xe000ed00
08000bfc <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8000bfc: b480 push {r7}
8000bfe: b089 sub sp, #36 @ 0x24
8000c00: af00 add r7, sp, #0
8000c02: 60f8 str r0, [r7, #12]
8000c04: 60b9 str r1, [r7, #8]
8000c06: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8000c08: 68fb ldr r3, [r7, #12]
8000c0a: f003 0307 and.w r3, r3, #7
8000c0e: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8000c10: 69fb ldr r3, [r7, #28]
8000c12: f1c3 0307 rsb r3, r3, #7
8000c16: 2b04 cmp r3, #4
8000c18: bf28 it cs
8000c1a: 2304 movcs r3, #4
8000c1c: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8000c1e: 69fb ldr r3, [r7, #28]
8000c20: 3304 adds r3, #4
8000c22: 2b06 cmp r3, #6
8000c24: d902 bls.n 8000c2c <NVIC_EncodePriority+0x30>
8000c26: 69fb ldr r3, [r7, #28]
8000c28: 3b03 subs r3, #3
8000c2a: e000 b.n 8000c2e <NVIC_EncodePriority+0x32>
8000c2c: 2300 movs r3, #0
8000c2e: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8000c30: f04f 32ff mov.w r2, #4294967295
8000c34: 69bb ldr r3, [r7, #24]
8000c36: fa02 f303 lsl.w r3, r2, r3
8000c3a: 43da mvns r2, r3
8000c3c: 68bb ldr r3, [r7, #8]
8000c3e: 401a ands r2, r3
8000c40: 697b ldr r3, [r7, #20]
8000c42: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8000c44: f04f 31ff mov.w r1, #4294967295
8000c48: 697b ldr r3, [r7, #20]
8000c4a: fa01 f303 lsl.w r3, r1, r3
8000c4e: 43d9 mvns r1, r3
8000c50: 687b ldr r3, [r7, #4]
8000c52: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8000c54: 4313 orrs r3, r2
);
}
8000c56: 4618 mov r0, r3
8000c58: 3724 adds r7, #36 @ 0x24
8000c5a: 46bd mov sp, r7
8000c5c: bc80 pop {r7}
8000c5e: 4770 bx lr
08000c60 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8000c60: b580 push {r7, lr}
8000c62: b082 sub sp, #8
8000c64: af00 add r7, sp, #0
8000c66: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8000c68: 687b ldr r3, [r7, #4]
8000c6a: 3b01 subs r3, #1
8000c6c: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
8000c70: d301 bcc.n 8000c76 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8000c72: 2301 movs r3, #1
8000c74: e00f b.n 8000c96 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8000c76: 4a0a ldr r2, [pc, #40] @ (8000ca0 <SysTick_Config+0x40>)
8000c78: 687b ldr r3, [r7, #4]
8000c7a: 3b01 subs r3, #1
8000c7c: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8000c7e: 210f movs r1, #15
8000c80: f04f 30ff mov.w r0, #4294967295
8000c84: f7ff ff90 bl 8000ba8 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8000c88: 4b05 ldr r3, [pc, #20] @ (8000ca0 <SysTick_Config+0x40>)
8000c8a: 2200 movs r2, #0
8000c8c: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8000c8e: 4b04 ldr r3, [pc, #16] @ (8000ca0 <SysTick_Config+0x40>)
8000c90: 2207 movs r2, #7
8000c92: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8000c94: 2300 movs r3, #0
}
8000c96: 4618 mov r0, r3
8000c98: 3708 adds r7, #8
8000c9a: 46bd mov sp, r7
8000c9c: bd80 pop {r7, pc}
8000c9e: bf00 nop
8000ca0: e000e010 .word 0xe000e010
08000ca4 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8000ca4: b580 push {r7, lr}
8000ca6: b082 sub sp, #8
8000ca8: af00 add r7, sp, #0
8000caa: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8000cac: 6878 ldr r0, [r7, #4]
8000cae: f7ff ff2d bl 8000b0c <__NVIC_SetPriorityGrouping>
}
8000cb2: bf00 nop
8000cb4: 3708 adds r7, #8
8000cb6: 46bd mov sp, r7
8000cb8: bd80 pop {r7, pc}
08000cba <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8000cba: b580 push {r7, lr}
8000cbc: b086 sub sp, #24
8000cbe: af00 add r7, sp, #0
8000cc0: 4603 mov r3, r0
8000cc2: 60b9 str r1, [r7, #8]
8000cc4: 607a str r2, [r7, #4]
8000cc6: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8000cc8: 2300 movs r3, #0
8000cca: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8000ccc: f7ff ff42 bl 8000b54 <__NVIC_GetPriorityGrouping>
8000cd0: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8000cd2: 687a ldr r2, [r7, #4]
8000cd4: 68b9 ldr r1, [r7, #8]
8000cd6: 6978 ldr r0, [r7, #20]
8000cd8: f7ff ff90 bl 8000bfc <NVIC_EncodePriority>
8000cdc: 4602 mov r2, r0
8000cde: f997 300f ldrsb.w r3, [r7, #15]
8000ce2: 4611 mov r1, r2
8000ce4: 4618 mov r0, r3
8000ce6: f7ff ff5f bl 8000ba8 <__NVIC_SetPriority>
}
8000cea: bf00 nop
8000cec: 3718 adds r7, #24
8000cee: 46bd mov sp, r7
8000cf0: bd80 pop {r7, pc}
08000cf2 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8000cf2: b580 push {r7, lr}
8000cf4: b082 sub sp, #8
8000cf6: af00 add r7, sp, #0
8000cf8: 4603 mov r3, r0
8000cfa: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8000cfc: f997 3007 ldrsb.w r3, [r7, #7]
8000d00: 4618 mov r0, r3
8000d02: f7ff ff35 bl 8000b70 <__NVIC_EnableIRQ>
}
8000d06: bf00 nop
8000d08: 3708 adds r7, #8
8000d0a: 46bd mov sp, r7
8000d0c: bd80 pop {r7, pc}
08000d0e <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8000d0e: b580 push {r7, lr}
8000d10: b082 sub sp, #8
8000d12: af00 add r7, sp, #0
8000d14: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8000d16: 6878 ldr r0, [r7, #4]
8000d18: f7ff ffa2 bl 8000c60 <SysTick_Config>
8000d1c: 4603 mov r3, r0
}
8000d1e: 4618 mov r0, r3
8000d20: 3708 adds r7, #8
8000d22: 46bd mov sp, r7
8000d24: bd80 pop {r7, pc}
...
08000d28 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8000d28: b480 push {r7}
8000d2a: b08b sub sp, #44 @ 0x2c
8000d2c: af00 add r7, sp, #0
8000d2e: 6078 str r0, [r7, #4]
8000d30: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8000d32: 2300 movs r3, #0
8000d34: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
8000d36: 2300 movs r3, #0
8000d38: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8000d3a: e169 b.n 8001010 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8000d3c: 2201 movs r2, #1
8000d3e: 6a7b ldr r3, [r7, #36] @ 0x24
8000d40: fa02 f303 lsl.w r3, r2, r3
8000d44: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8000d46: 683b ldr r3, [r7, #0]
8000d48: 681b ldr r3, [r3, #0]
8000d4a: 69fa ldr r2, [r7, #28]
8000d4c: 4013 ands r3, r2
8000d4e: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8000d50: 69ba ldr r2, [r7, #24]
8000d52: 69fb ldr r3, [r7, #28]
8000d54: 429a cmp r2, r3
8000d56: f040 8158 bne.w 800100a <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
8000d5a: 683b ldr r3, [r7, #0]
8000d5c: 685b ldr r3, [r3, #4]
8000d5e: 4a9a ldr r2, [pc, #616] @ (8000fc8 <HAL_GPIO_Init+0x2a0>)
8000d60: 4293 cmp r3, r2
8000d62: d05e beq.n 8000e22 <HAL_GPIO_Init+0xfa>
8000d64: 4a98 ldr r2, [pc, #608] @ (8000fc8 <HAL_GPIO_Init+0x2a0>)
8000d66: 4293 cmp r3, r2
8000d68: d875 bhi.n 8000e56 <HAL_GPIO_Init+0x12e>
8000d6a: 4a98 ldr r2, [pc, #608] @ (8000fcc <HAL_GPIO_Init+0x2a4>)
8000d6c: 4293 cmp r3, r2
8000d6e: d058 beq.n 8000e22 <HAL_GPIO_Init+0xfa>
8000d70: 4a96 ldr r2, [pc, #600] @ (8000fcc <HAL_GPIO_Init+0x2a4>)
8000d72: 4293 cmp r3, r2
8000d74: d86f bhi.n 8000e56 <HAL_GPIO_Init+0x12e>
8000d76: 4a96 ldr r2, [pc, #600] @ (8000fd0 <HAL_GPIO_Init+0x2a8>)
8000d78: 4293 cmp r3, r2
8000d7a: d052 beq.n 8000e22 <HAL_GPIO_Init+0xfa>
8000d7c: 4a94 ldr r2, [pc, #592] @ (8000fd0 <HAL_GPIO_Init+0x2a8>)
8000d7e: 4293 cmp r3, r2
8000d80: d869 bhi.n 8000e56 <HAL_GPIO_Init+0x12e>
8000d82: 4a94 ldr r2, [pc, #592] @ (8000fd4 <HAL_GPIO_Init+0x2ac>)
8000d84: 4293 cmp r3, r2
8000d86: d04c beq.n 8000e22 <HAL_GPIO_Init+0xfa>
8000d88: 4a92 ldr r2, [pc, #584] @ (8000fd4 <HAL_GPIO_Init+0x2ac>)
8000d8a: 4293 cmp r3, r2
8000d8c: d863 bhi.n 8000e56 <HAL_GPIO_Init+0x12e>
8000d8e: 4a92 ldr r2, [pc, #584] @ (8000fd8 <HAL_GPIO_Init+0x2b0>)
8000d90: 4293 cmp r3, r2
8000d92: d046 beq.n 8000e22 <HAL_GPIO_Init+0xfa>
8000d94: 4a90 ldr r2, [pc, #576] @ (8000fd8 <HAL_GPIO_Init+0x2b0>)
8000d96: 4293 cmp r3, r2
8000d98: d85d bhi.n 8000e56 <HAL_GPIO_Init+0x12e>
8000d9a: 2b12 cmp r3, #18
8000d9c: d82a bhi.n 8000df4 <HAL_GPIO_Init+0xcc>
8000d9e: 2b12 cmp r3, #18
8000da0: d859 bhi.n 8000e56 <HAL_GPIO_Init+0x12e>
8000da2: a201 add r2, pc, #4 @ (adr r2, 8000da8 <HAL_GPIO_Init+0x80>)
8000da4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000da8: 08000e23 .word 0x08000e23
8000dac: 08000dfd .word 0x08000dfd
8000db0: 08000e0f .word 0x08000e0f
8000db4: 08000e51 .word 0x08000e51
8000db8: 08000e57 .word 0x08000e57
8000dbc: 08000e57 .word 0x08000e57
8000dc0: 08000e57 .word 0x08000e57
8000dc4: 08000e57 .word 0x08000e57
8000dc8: 08000e57 .word 0x08000e57
8000dcc: 08000e57 .word 0x08000e57
8000dd0: 08000e57 .word 0x08000e57
8000dd4: 08000e57 .word 0x08000e57
8000dd8: 08000e57 .word 0x08000e57
8000ddc: 08000e57 .word 0x08000e57
8000de0: 08000e57 .word 0x08000e57
8000de4: 08000e57 .word 0x08000e57
8000de8: 08000e57 .word 0x08000e57
8000dec: 08000e05 .word 0x08000e05
8000df0: 08000e19 .word 0x08000e19
8000df4: 4a79 ldr r2, [pc, #484] @ (8000fdc <HAL_GPIO_Init+0x2b4>)
8000df6: 4293 cmp r3, r2
8000df8: d013 beq.n 8000e22 <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8000dfa: e02c b.n 8000e56 <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8000dfc: 683b ldr r3, [r7, #0]
8000dfe: 68db ldr r3, [r3, #12]
8000e00: 623b str r3, [r7, #32]
break;
8000e02: e029 b.n 8000e58 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
8000e04: 683b ldr r3, [r7, #0]
8000e06: 68db ldr r3, [r3, #12]
8000e08: 3304 adds r3, #4
8000e0a: 623b str r3, [r7, #32]
break;
8000e0c: e024 b.n 8000e58 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
8000e0e: 683b ldr r3, [r7, #0]
8000e10: 68db ldr r3, [r3, #12]
8000e12: 3308 adds r3, #8
8000e14: 623b str r3, [r7, #32]
break;
8000e16: e01f b.n 8000e58 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8000e18: 683b ldr r3, [r7, #0]
8000e1a: 68db ldr r3, [r3, #12]
8000e1c: 330c adds r3, #12
8000e1e: 623b str r3, [r7, #32]
break;
8000e20: e01a b.n 8000e58 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
8000e22: 683b ldr r3, [r7, #0]
8000e24: 689b ldr r3, [r3, #8]
8000e26: 2b00 cmp r3, #0
8000e28: d102 bne.n 8000e30 <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8000e2a: 2304 movs r3, #4
8000e2c: 623b str r3, [r7, #32]
break;
8000e2e: e013 b.n 8000e58 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8000e30: 683b ldr r3, [r7, #0]
8000e32: 689b ldr r3, [r3, #8]
8000e34: 2b01 cmp r3, #1
8000e36: d105 bne.n 8000e44 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8000e38: 2308 movs r3, #8
8000e3a: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8000e3c: 687b ldr r3, [r7, #4]
8000e3e: 69fa ldr r2, [r7, #28]
8000e40: 611a str r2, [r3, #16]
break;
8000e42: e009 b.n 8000e58 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8000e44: 2308 movs r3, #8
8000e46: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
8000e48: 687b ldr r3, [r7, #4]
8000e4a: 69fa ldr r2, [r7, #28]
8000e4c: 615a str r2, [r3, #20]
break;
8000e4e: e003 b.n 8000e58 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8000e50: 2300 movs r3, #0
8000e52: 623b str r3, [r7, #32]
break;
8000e54: e000 b.n 8000e58 <HAL_GPIO_Init+0x130>
break;
8000e56: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8000e58: 69bb ldr r3, [r7, #24]
8000e5a: 2bff cmp r3, #255 @ 0xff
8000e5c: d801 bhi.n 8000e62 <HAL_GPIO_Init+0x13a>
8000e5e: 687b ldr r3, [r7, #4]
8000e60: e001 b.n 8000e66 <HAL_GPIO_Init+0x13e>
8000e62: 687b ldr r3, [r7, #4]
8000e64: 3304 adds r3, #4
8000e66: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8000e68: 69bb ldr r3, [r7, #24]
8000e6a: 2bff cmp r3, #255 @ 0xff
8000e6c: d802 bhi.n 8000e74 <HAL_GPIO_Init+0x14c>
8000e6e: 6a7b ldr r3, [r7, #36] @ 0x24
8000e70: 009b lsls r3, r3, #2
8000e72: e002 b.n 8000e7a <HAL_GPIO_Init+0x152>
8000e74: 6a7b ldr r3, [r7, #36] @ 0x24
8000e76: 3b08 subs r3, #8
8000e78: 009b lsls r3, r3, #2
8000e7a: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8000e7c: 697b ldr r3, [r7, #20]
8000e7e: 681a ldr r2, [r3, #0]
8000e80: 210f movs r1, #15
8000e82: 693b ldr r3, [r7, #16]
8000e84: fa01 f303 lsl.w r3, r1, r3
8000e88: 43db mvns r3, r3
8000e8a: 401a ands r2, r3
8000e8c: 6a39 ldr r1, [r7, #32]
8000e8e: 693b ldr r3, [r7, #16]
8000e90: fa01 f303 lsl.w r3, r1, r3
8000e94: 431a orrs r2, r3
8000e96: 697b ldr r3, [r7, #20]
8000e98: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8000e9a: 683b ldr r3, [r7, #0]
8000e9c: 685b ldr r3, [r3, #4]
8000e9e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8000ea2: 2b00 cmp r3, #0
8000ea4: f000 80b1 beq.w 800100a <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8000ea8: 4b4d ldr r3, [pc, #308] @ (8000fe0 <HAL_GPIO_Init+0x2b8>)
8000eaa: 699b ldr r3, [r3, #24]
8000eac: 4a4c ldr r2, [pc, #304] @ (8000fe0 <HAL_GPIO_Init+0x2b8>)
8000eae: f043 0301 orr.w r3, r3, #1
8000eb2: 6193 str r3, [r2, #24]
8000eb4: 4b4a ldr r3, [pc, #296] @ (8000fe0 <HAL_GPIO_Init+0x2b8>)
8000eb6: 699b ldr r3, [r3, #24]
8000eb8: f003 0301 and.w r3, r3, #1
8000ebc: 60bb str r3, [r7, #8]
8000ebe: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8000ec0: 4a48 ldr r2, [pc, #288] @ (8000fe4 <HAL_GPIO_Init+0x2bc>)
8000ec2: 6a7b ldr r3, [r7, #36] @ 0x24
8000ec4: 089b lsrs r3, r3, #2
8000ec6: 3302 adds r3, #2
8000ec8: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8000ecc: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
8000ece: 6a7b ldr r3, [r7, #36] @ 0x24
8000ed0: f003 0303 and.w r3, r3, #3
8000ed4: 009b lsls r3, r3, #2
8000ed6: 220f movs r2, #15
8000ed8: fa02 f303 lsl.w r3, r2, r3
8000edc: 43db mvns r3, r3
8000ede: 68fa ldr r2, [r7, #12]
8000ee0: 4013 ands r3, r2
8000ee2: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
8000ee4: 687b ldr r3, [r7, #4]
8000ee6: 4a40 ldr r2, [pc, #256] @ (8000fe8 <HAL_GPIO_Init+0x2c0>)
8000ee8: 4293 cmp r3, r2
8000eea: d013 beq.n 8000f14 <HAL_GPIO_Init+0x1ec>
8000eec: 687b ldr r3, [r7, #4]
8000eee: 4a3f ldr r2, [pc, #252] @ (8000fec <HAL_GPIO_Init+0x2c4>)
8000ef0: 4293 cmp r3, r2
8000ef2: d00d beq.n 8000f10 <HAL_GPIO_Init+0x1e8>
8000ef4: 687b ldr r3, [r7, #4]
8000ef6: 4a3e ldr r2, [pc, #248] @ (8000ff0 <HAL_GPIO_Init+0x2c8>)
8000ef8: 4293 cmp r3, r2
8000efa: d007 beq.n 8000f0c <HAL_GPIO_Init+0x1e4>
8000efc: 687b ldr r3, [r7, #4]
8000efe: 4a3d ldr r2, [pc, #244] @ (8000ff4 <HAL_GPIO_Init+0x2cc>)
8000f00: 4293 cmp r3, r2
8000f02: d101 bne.n 8000f08 <HAL_GPIO_Init+0x1e0>
8000f04: 2303 movs r3, #3
8000f06: e006 b.n 8000f16 <HAL_GPIO_Init+0x1ee>
8000f08: 2304 movs r3, #4
8000f0a: e004 b.n 8000f16 <HAL_GPIO_Init+0x1ee>
8000f0c: 2302 movs r3, #2
8000f0e: e002 b.n 8000f16 <HAL_GPIO_Init+0x1ee>
8000f10: 2301 movs r3, #1
8000f12: e000 b.n 8000f16 <HAL_GPIO_Init+0x1ee>
8000f14: 2300 movs r3, #0
8000f16: 6a7a ldr r2, [r7, #36] @ 0x24
8000f18: f002 0203 and.w r2, r2, #3
8000f1c: 0092 lsls r2, r2, #2
8000f1e: 4093 lsls r3, r2
8000f20: 68fa ldr r2, [r7, #12]
8000f22: 4313 orrs r3, r2
8000f24: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
8000f26: 492f ldr r1, [pc, #188] @ (8000fe4 <HAL_GPIO_Init+0x2bc>)
8000f28: 6a7b ldr r3, [r7, #36] @ 0x24
8000f2a: 089b lsrs r3, r3, #2
8000f2c: 3302 adds r3, #2
8000f2e: 68fa ldr r2, [r7, #12]
8000f30: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8000f34: 683b ldr r3, [r7, #0]
8000f36: 685b ldr r3, [r3, #4]
8000f38: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8000f3c: 2b00 cmp r3, #0
8000f3e: d006 beq.n 8000f4e <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
8000f40: 4b2d ldr r3, [pc, #180] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f42: 689a ldr r2, [r3, #8]
8000f44: 492c ldr r1, [pc, #176] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f46: 69bb ldr r3, [r7, #24]
8000f48: 4313 orrs r3, r2
8000f4a: 608b str r3, [r1, #8]
8000f4c: e006 b.n 8000f5c <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
8000f4e: 4b2a ldr r3, [pc, #168] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f50: 689a ldr r2, [r3, #8]
8000f52: 69bb ldr r3, [r7, #24]
8000f54: 43db mvns r3, r3
8000f56: 4928 ldr r1, [pc, #160] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f58: 4013 ands r3, r2
8000f5a: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8000f5c: 683b ldr r3, [r7, #0]
8000f5e: 685b ldr r3, [r3, #4]
8000f60: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8000f64: 2b00 cmp r3, #0
8000f66: d006 beq.n 8000f76 <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
8000f68: 4b23 ldr r3, [pc, #140] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f6a: 68da ldr r2, [r3, #12]
8000f6c: 4922 ldr r1, [pc, #136] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f6e: 69bb ldr r3, [r7, #24]
8000f70: 4313 orrs r3, r2
8000f72: 60cb str r3, [r1, #12]
8000f74: e006 b.n 8000f84 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
8000f76: 4b20 ldr r3, [pc, #128] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f78: 68da ldr r2, [r3, #12]
8000f7a: 69bb ldr r3, [r7, #24]
8000f7c: 43db mvns r3, r3
8000f7e: 491e ldr r1, [pc, #120] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f80: 4013 ands r3, r2
8000f82: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8000f84: 683b ldr r3, [r7, #0]
8000f86: 685b ldr r3, [r3, #4]
8000f88: f403 3300 and.w r3, r3, #131072 @ 0x20000
8000f8c: 2b00 cmp r3, #0
8000f8e: d006 beq.n 8000f9e <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
8000f90: 4b19 ldr r3, [pc, #100] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f92: 685a ldr r2, [r3, #4]
8000f94: 4918 ldr r1, [pc, #96] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000f96: 69bb ldr r3, [r7, #24]
8000f98: 4313 orrs r3, r2
8000f9a: 604b str r3, [r1, #4]
8000f9c: e006 b.n 8000fac <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
8000f9e: 4b16 ldr r3, [pc, #88] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000fa0: 685a ldr r2, [r3, #4]
8000fa2: 69bb ldr r3, [r7, #24]
8000fa4: 43db mvns r3, r3
8000fa6: 4914 ldr r1, [pc, #80] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000fa8: 4013 ands r3, r2
8000faa: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8000fac: 683b ldr r3, [r7, #0]
8000fae: 685b ldr r3, [r3, #4]
8000fb0: f403 3380 and.w r3, r3, #65536 @ 0x10000
8000fb4: 2b00 cmp r3, #0
8000fb6: d021 beq.n 8000ffc <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
8000fb8: 4b0f ldr r3, [pc, #60] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000fba: 681a ldr r2, [r3, #0]
8000fbc: 490e ldr r1, [pc, #56] @ (8000ff8 <HAL_GPIO_Init+0x2d0>)
8000fbe: 69bb ldr r3, [r7, #24]
8000fc0: 4313 orrs r3, r2
8000fc2: 600b str r3, [r1, #0]
8000fc4: e021 b.n 800100a <HAL_GPIO_Init+0x2e2>
8000fc6: bf00 nop
8000fc8: 10320000 .word 0x10320000
8000fcc: 10310000 .word 0x10310000
8000fd0: 10220000 .word 0x10220000
8000fd4: 10210000 .word 0x10210000
8000fd8: 10120000 .word 0x10120000
8000fdc: 10110000 .word 0x10110000
8000fe0: 40021000 .word 0x40021000
8000fe4: 40010000 .word 0x40010000
8000fe8: 40010800 .word 0x40010800
8000fec: 40010c00 .word 0x40010c00
8000ff0: 40011000 .word 0x40011000
8000ff4: 40011400 .word 0x40011400
8000ff8: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8000ffc: 4b0b ldr r3, [pc, #44] @ (800102c <HAL_GPIO_Init+0x304>)
8000ffe: 681a ldr r2, [r3, #0]
8001000: 69bb ldr r3, [r7, #24]
8001002: 43db mvns r3, r3
8001004: 4909 ldr r1, [pc, #36] @ (800102c <HAL_GPIO_Init+0x304>)
8001006: 4013 ands r3, r2
8001008: 600b str r3, [r1, #0]
}
}
}
position++;
800100a: 6a7b ldr r3, [r7, #36] @ 0x24
800100c: 3301 adds r3, #1
800100e: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
8001010: 683b ldr r3, [r7, #0]
8001012: 681a ldr r2, [r3, #0]
8001014: 6a7b ldr r3, [r7, #36] @ 0x24
8001016: fa22 f303 lsr.w r3, r2, r3
800101a: 2b00 cmp r3, #0
800101c: f47f ae8e bne.w 8000d3c <HAL_GPIO_Init+0x14>
}
}
8001020: bf00 nop
8001022: bf00 nop
8001024: 372c adds r7, #44 @ 0x2c
8001026: 46bd mov sp, r7
8001028: bc80 pop {r7}
800102a: 4770 bx lr
800102c: 40010400 .word 0x40010400
08001030 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8001030: b580 push {r7, lr}
8001032: b084 sub sp, #16
8001034: af00 add r7, sp, #0
8001036: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8001038: 687b ldr r3, [r7, #4]
800103a: 2b00 cmp r3, #0
800103c: d101 bne.n 8001042 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
800103e: 2301 movs r3, #1
8001040: e0e8 b.n 8001214 <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8001042: 687b ldr r3, [r7, #4]
8001044: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
8001048: b2db uxtb r3, r3
800104a: 2b00 cmp r3, #0
800104c: d106 bne.n 800105c <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
800104e: 687b ldr r3, [r7, #4]
8001050: 2200 movs r2, #0
8001052: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8001056: 6878 ldr r0, [r7, #4]
8001058: f007 f932 bl 80082c0 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
800105c: 687b ldr r3, [r7, #4]
800105e: 2203 movs r2, #3
8001060: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8001064: 687b ldr r3, [r7, #4]
8001066: 2200 movs r2, #0
8001068: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
800106a: 687b ldr r3, [r7, #4]
800106c: 681b ldr r3, [r3, #0]
800106e: 4618 mov r0, r3
8001070: f002 ffd7 bl 8004022 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8001074: 687b ldr r3, [r7, #4]
8001076: 6818 ldr r0, [r3, #0]
8001078: 687b ldr r3, [r7, #4]
800107a: 3304 adds r3, #4
800107c: cb0e ldmia r3, {r1, r2, r3}
800107e: f002 ffad bl 8003fdc <USB_CoreInit>
8001082: 4603 mov r3, r0
8001084: 2b00 cmp r3, #0
8001086: d005 beq.n 8001094 <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8001088: 687b ldr r3, [r7, #4]
800108a: 2202 movs r2, #2
800108c: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8001090: 2301 movs r3, #1
8001092: e0bf b.n 8001214 <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
8001094: 687b ldr r3, [r7, #4]
8001096: 681b ldr r3, [r3, #0]
8001098: 2100 movs r1, #0
800109a: 4618 mov r0, r3
800109c: f002 ffdb bl 8004056 <USB_SetCurrentMode>
80010a0: 4603 mov r3, r0
80010a2: 2b00 cmp r3, #0
80010a4: d005 beq.n 80010b2 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80010a6: 687b ldr r3, [r7, #4]
80010a8: 2202 movs r2, #2
80010aa: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80010ae: 2301 movs r3, #1
80010b0: e0b0 b.n 8001214 <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80010b2: 2300 movs r3, #0
80010b4: 73fb strb r3, [r7, #15]
80010b6: e03e b.n 8001136 <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
80010b8: 7bfa ldrb r2, [r7, #15]
80010ba: 6879 ldr r1, [r7, #4]
80010bc: 4613 mov r3, r2
80010be: 009b lsls r3, r3, #2
80010c0: 4413 add r3, r2
80010c2: 00db lsls r3, r3, #3
80010c4: 440b add r3, r1
80010c6: 3311 adds r3, #17
80010c8: 2201 movs r2, #1
80010ca: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
80010cc: 7bfa ldrb r2, [r7, #15]
80010ce: 6879 ldr r1, [r7, #4]
80010d0: 4613 mov r3, r2
80010d2: 009b lsls r3, r3, #2
80010d4: 4413 add r3, r2
80010d6: 00db lsls r3, r3, #3
80010d8: 440b add r3, r1
80010da: 3310 adds r3, #16
80010dc: 7bfa ldrb r2, [r7, #15]
80010de: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
80010e0: 7bfa ldrb r2, [r7, #15]
80010e2: 6879 ldr r1, [r7, #4]
80010e4: 4613 mov r3, r2
80010e6: 009b lsls r3, r3, #2
80010e8: 4413 add r3, r2
80010ea: 00db lsls r3, r3, #3
80010ec: 440b add r3, r1
80010ee: 3313 adds r3, #19
80010f0: 2200 movs r2, #0
80010f2: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
80010f4: 7bfa ldrb r2, [r7, #15]
80010f6: 6879 ldr r1, [r7, #4]
80010f8: 4613 mov r3, r2
80010fa: 009b lsls r3, r3, #2
80010fc: 4413 add r3, r2
80010fe: 00db lsls r3, r3, #3
8001100: 440b add r3, r1
8001102: 3320 adds r3, #32
8001104: 2200 movs r2, #0
8001106: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8001108: 7bfa ldrb r2, [r7, #15]
800110a: 6879 ldr r1, [r7, #4]
800110c: 4613 mov r3, r2
800110e: 009b lsls r3, r3, #2
8001110: 4413 add r3, r2
8001112: 00db lsls r3, r3, #3
8001114: 440b add r3, r1
8001116: 3324 adds r3, #36 @ 0x24
8001118: 2200 movs r2, #0
800111a: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
800111c: 7bfb ldrb r3, [r7, #15]
800111e: 6879 ldr r1, [r7, #4]
8001120: 1c5a adds r2, r3, #1
8001122: 4613 mov r3, r2
8001124: 009b lsls r3, r3, #2
8001126: 4413 add r3, r2
8001128: 00db lsls r3, r3, #3
800112a: 440b add r3, r1
800112c: 2200 movs r2, #0
800112e: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001130: 7bfb ldrb r3, [r7, #15]
8001132: 3301 adds r3, #1
8001134: 73fb strb r3, [r7, #15]
8001136: 687b ldr r3, [r7, #4]
8001138: 791b ldrb r3, [r3, #4]
800113a: 7bfa ldrb r2, [r7, #15]
800113c: 429a cmp r2, r3
800113e: d3bb bcc.n 80010b8 <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8001140: 2300 movs r3, #0
8001142: 73fb strb r3, [r7, #15]
8001144: e044 b.n 80011d0 <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
8001146: 7bfa ldrb r2, [r7, #15]
8001148: 6879 ldr r1, [r7, #4]
800114a: 4613 mov r3, r2
800114c: 009b lsls r3, r3, #2
800114e: 4413 add r3, r2
8001150: 00db lsls r3, r3, #3
8001152: 440b add r3, r1
8001154: f203 1351 addw r3, r3, #337 @ 0x151
8001158: 2200 movs r2, #0
800115a: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
800115c: 7bfa ldrb r2, [r7, #15]
800115e: 6879 ldr r1, [r7, #4]
8001160: 4613 mov r3, r2
8001162: 009b lsls r3, r3, #2
8001164: 4413 add r3, r2
8001166: 00db lsls r3, r3, #3
8001168: 440b add r3, r1
800116a: f503 73a8 add.w r3, r3, #336 @ 0x150
800116e: 7bfa ldrb r2, [r7, #15]
8001170: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8001172: 7bfa ldrb r2, [r7, #15]
8001174: 6879 ldr r1, [r7, #4]
8001176: 4613 mov r3, r2
8001178: 009b lsls r3, r3, #2
800117a: 4413 add r3, r2
800117c: 00db lsls r3, r3, #3
800117e: 440b add r3, r1
8001180: f203 1353 addw r3, r3, #339 @ 0x153
8001184: 2200 movs r2, #0
8001186: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
8001188: 7bfa ldrb r2, [r7, #15]
800118a: 6879 ldr r1, [r7, #4]
800118c: 4613 mov r3, r2
800118e: 009b lsls r3, r3, #2
8001190: 4413 add r3, r2
8001192: 00db lsls r3, r3, #3
8001194: 440b add r3, r1
8001196: f503 73b0 add.w r3, r3, #352 @ 0x160
800119a: 2200 movs r2, #0
800119c: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
800119e: 7bfa ldrb r2, [r7, #15]
80011a0: 6879 ldr r1, [r7, #4]
80011a2: 4613 mov r3, r2
80011a4: 009b lsls r3, r3, #2
80011a6: 4413 add r3, r2
80011a8: 00db lsls r3, r3, #3
80011aa: 440b add r3, r1
80011ac: f503 73b2 add.w r3, r3, #356 @ 0x164
80011b0: 2200 movs r2, #0
80011b2: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
80011b4: 7bfa ldrb r2, [r7, #15]
80011b6: 6879 ldr r1, [r7, #4]
80011b8: 4613 mov r3, r2
80011ba: 009b lsls r3, r3, #2
80011bc: 4413 add r3, r2
80011be: 00db lsls r3, r3, #3
80011c0: 440b add r3, r1
80011c2: f503 73b4 add.w r3, r3, #360 @ 0x168
80011c6: 2200 movs r2, #0
80011c8: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80011ca: 7bfb ldrb r3, [r7, #15]
80011cc: 3301 adds r3, #1
80011ce: 73fb strb r3, [r7, #15]
80011d0: 687b ldr r3, [r7, #4]
80011d2: 791b ldrb r3, [r3, #4]
80011d4: 7bfa ldrb r2, [r7, #15]
80011d6: 429a cmp r2, r3
80011d8: d3b5 bcc.n 8001146 <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
80011da: 687b ldr r3, [r7, #4]
80011dc: 6818 ldr r0, [r3, #0]
80011de: 687b ldr r3, [r7, #4]
80011e0: 3304 adds r3, #4
80011e2: cb0e ldmia r3, {r1, r2, r3}
80011e4: f002 ff43 bl 800406e <USB_DevInit>
80011e8: 4603 mov r3, r0
80011ea: 2b00 cmp r3, #0
80011ec: d005 beq.n 80011fa <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80011ee: 687b ldr r3, [r7, #4]
80011f0: 2202 movs r2, #2
80011f2: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80011f6: 2301 movs r3, #1
80011f8: e00c b.n 8001214 <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
80011fa: 687b ldr r3, [r7, #4]
80011fc: 2200 movs r2, #0
80011fe: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
8001200: 687b ldr r3, [r7, #4]
8001202: 2201 movs r2, #1
8001204: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
8001208: 687b ldr r3, [r7, #4]
800120a: 681b ldr r3, [r3, #0]
800120c: 4618 mov r0, r3
800120e: f005 f9c2 bl 8006596 <USB_DevDisconnect>
return HAL_OK;
8001212: 2300 movs r3, #0
}
8001214: 4618 mov r0, r3
8001216: 3710 adds r7, #16
8001218: 46bd mov sp, r7
800121a: bd80 pop {r7, pc}
0800121c <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
800121c: b580 push {r7, lr}
800121e: b082 sub sp, #8
8001220: af00 add r7, sp, #0
8001222: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8001224: 687b ldr r3, [r7, #4]
8001226: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
800122a: 2b01 cmp r3, #1
800122c: d101 bne.n 8001232 <HAL_PCD_Start+0x16>
800122e: 2302 movs r3, #2
8001230: e016 b.n 8001260 <HAL_PCD_Start+0x44>
8001232: 687b ldr r3, [r7, #4]
8001234: 2201 movs r2, #1
8001236: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
800123a: 687b ldr r3, [r7, #4]
800123c: 681b ldr r3, [r3, #0]
800123e: 4618 mov r0, r3
8001240: f002 fed9 bl 8003ff6 <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8001244: 2101 movs r1, #1
8001246: 6878 ldr r0, [r7, #4]
8001248: f007 faad bl 80087a6 <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
800124c: 687b ldr r3, [r7, #4]
800124e: 681b ldr r3, [r3, #0]
8001250: 4618 mov r0, r3
8001252: f005 f996 bl 8006582 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8001256: 687b ldr r3, [r7, #4]
8001258: 2200 movs r2, #0
800125a: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
800125e: 2300 movs r3, #0
}
8001260: 4618 mov r0, r3
8001262: 3708 adds r7, #8
8001264: 46bd mov sp, r7
8001266: bd80 pop {r7, pc}
08001268 <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8001268: b580 push {r7, lr}
800126a: b088 sub sp, #32
800126c: af00 add r7, sp, #0
800126e: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
8001270: 687b ldr r3, [r7, #4]
8001272: 681b ldr r3, [r3, #0]
8001274: 4618 mov r0, r3
8001276: f005 f998 bl 80065aa <USB_ReadInterrupts>
800127a: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
800127c: 69bb ldr r3, [r7, #24]
800127e: f403 4300 and.w r3, r3, #32768 @ 0x8000
8001282: 2b00 cmp r3, #0
8001284: d003 beq.n 800128e <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
8001286: 6878 ldr r0, [r7, #4]
8001288: f000 fb1a bl 80018c0 <PCD_EP_ISR_Handler>
return;
800128c: e119 b.n 80014c2 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
800128e: 69bb ldr r3, [r7, #24]
8001290: f403 6380 and.w r3, r3, #1024 @ 0x400
8001294: 2b00 cmp r3, #0
8001296: d013 beq.n 80012c0 <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8001298: 687b ldr r3, [r7, #4]
800129a: 681b ldr r3, [r3, #0]
800129c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80012a0: b29a uxth r2, r3
80012a2: 687b ldr r3, [r7, #4]
80012a4: 681b ldr r3, [r3, #0]
80012a6: f422 6280 bic.w r2, r2, #1024 @ 0x400
80012aa: b292 uxth r2, r2
80012ac: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
80012b0: 6878 ldr r0, [r7, #4]
80012b2: f007 f880 bl 80083b6 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
80012b6: 2100 movs r1, #0
80012b8: 6878 ldr r0, [r7, #4]
80012ba: f000 f905 bl 80014c8 <HAL_PCD_SetAddress>
return;
80012be: e100 b.n 80014c2 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
80012c0: 69bb ldr r3, [r7, #24]
80012c2: f403 4380 and.w r3, r3, #16384 @ 0x4000
80012c6: 2b00 cmp r3, #0
80012c8: d00c beq.n 80012e4 <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
80012ca: 687b ldr r3, [r7, #4]
80012cc: 681b ldr r3, [r3, #0]
80012ce: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80012d2: b29a uxth r2, r3
80012d4: 687b ldr r3, [r7, #4]
80012d6: 681b ldr r3, [r3, #0]
80012d8: f422 4280 bic.w r2, r2, #16384 @ 0x4000
80012dc: b292 uxth r2, r2
80012de: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
80012e2: e0ee b.n 80014c2 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
80012e4: 69bb ldr r3, [r7, #24]
80012e6: f403 5300 and.w r3, r3, #8192 @ 0x2000
80012ea: 2b00 cmp r3, #0
80012ec: d00c beq.n 8001308 <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
80012ee: 687b ldr r3, [r7, #4]
80012f0: 681b ldr r3, [r3, #0]
80012f2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80012f6: b29a uxth r2, r3
80012f8: 687b ldr r3, [r7, #4]
80012fa: 681b ldr r3, [r3, #0]
80012fc: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8001300: b292 uxth r2, r2
8001302: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001306: e0dc b.n 80014c2 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
8001308: 69bb ldr r3, [r7, #24]
800130a: f403 5380 and.w r3, r3, #4096 @ 0x1000
800130e: 2b00 cmp r3, #0
8001310: d027 beq.n 8001362 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8001312: 687b ldr r3, [r7, #4]
8001314: 681b ldr r3, [r3, #0]
8001316: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800131a: b29a uxth r2, r3
800131c: 687b ldr r3, [r7, #4]
800131e: 681b ldr r3, [r3, #0]
8001320: f022 0204 bic.w r2, r2, #4
8001324: b292 uxth r2, r2
8001326: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
800132a: 687b ldr r3, [r7, #4]
800132c: 681b ldr r3, [r3, #0]
800132e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8001332: b29a uxth r2, r3
8001334: 687b ldr r3, [r7, #4]
8001336: 681b ldr r3, [r3, #0]
8001338: f022 0208 bic.w r2, r2, #8
800133c: b292 uxth r2, r2
800133e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8001342: 6878 ldr r0, [r7, #4]
8001344: f007 f870 bl 8008428 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8001348: 687b ldr r3, [r7, #4]
800134a: 681b ldr r3, [r3, #0]
800134c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001350: b29a uxth r2, r3
8001352: 687b ldr r3, [r7, #4]
8001354: 681b ldr r3, [r3, #0]
8001356: f422 5280 bic.w r2, r2, #4096 @ 0x1000
800135a: b292 uxth r2, r2
800135c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8001360: e0af b.n 80014c2 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8001362: 69bb ldr r3, [r7, #24]
8001364: f403 6300 and.w r3, r3, #2048 @ 0x800
8001368: 2b00 cmp r3, #0
800136a: f000 8083 beq.w 8001474 <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
800136e: 2300 movs r3, #0
8001370: 77fb strb r3, [r7, #31]
8001372: e010 b.n 8001396 <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8001374: 687b ldr r3, [r7, #4]
8001376: 681b ldr r3, [r3, #0]
8001378: 461a mov r2, r3
800137a: 7ffb ldrb r3, [r7, #31]
800137c: 009b lsls r3, r3, #2
800137e: 441a add r2, r3
8001380: 7ffb ldrb r3, [r7, #31]
8001382: 8812 ldrh r2, [r2, #0]
8001384: b292 uxth r2, r2
8001386: 005b lsls r3, r3, #1
8001388: 3320 adds r3, #32
800138a: 443b add r3, r7
800138c: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8001390: 7ffb ldrb r3, [r7, #31]
8001392: 3301 adds r3, #1
8001394: 77fb strb r3, [r7, #31]
8001396: 7ffb ldrb r3, [r7, #31]
8001398: 2b07 cmp r3, #7
800139a: d9eb bls.n 8001374 <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
800139c: 687b ldr r3, [r7, #4]
800139e: 681b ldr r3, [r3, #0]
80013a0: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80013a4: b29a uxth r2, r3
80013a6: 687b ldr r3, [r7, #4]
80013a8: 681b ldr r3, [r3, #0]
80013aa: f042 0201 orr.w r2, r2, #1
80013ae: b292 uxth r2, r2
80013b0: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
80013b4: 687b ldr r3, [r7, #4]
80013b6: 681b ldr r3, [r3, #0]
80013b8: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80013bc: b29a uxth r2, r3
80013be: 687b ldr r3, [r7, #4]
80013c0: 681b ldr r3, [r3, #0]
80013c2: f022 0201 bic.w r2, r2, #1
80013c6: b292 uxth r2, r2
80013c8: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
80013cc: bf00 nop
80013ce: 687b ldr r3, [r7, #4]
80013d0: 681b ldr r3, [r3, #0]
80013d2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80013d6: b29b uxth r3, r3
80013d8: f403 6380 and.w r3, r3, #1024 @ 0x400
80013dc: 2b00 cmp r3, #0
80013de: d0f6 beq.n 80013ce <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
80013e0: 687b ldr r3, [r7, #4]
80013e2: 681b ldr r3, [r3, #0]
80013e4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80013e8: b29a uxth r2, r3
80013ea: 687b ldr r3, [r7, #4]
80013ec: 681b ldr r3, [r3, #0]
80013ee: f422 6280 bic.w r2, r2, #1024 @ 0x400
80013f2: b292 uxth r2, r2
80013f4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
80013f8: 2300 movs r3, #0
80013fa: 77fb strb r3, [r7, #31]
80013fc: e00f b.n 800141e <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
80013fe: 7ffb ldrb r3, [r7, #31]
8001400: 687a ldr r2, [r7, #4]
8001402: 6812 ldr r2, [r2, #0]
8001404: 4611 mov r1, r2
8001406: 7ffa ldrb r2, [r7, #31]
8001408: 0092 lsls r2, r2, #2
800140a: 440a add r2, r1
800140c: 005b lsls r3, r3, #1
800140e: 3320 adds r3, #32
8001410: 443b add r3, r7
8001412: f833 3c18 ldrh.w r3, [r3, #-24]
8001416: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8001418: 7ffb ldrb r3, [r7, #31]
800141a: 3301 adds r3, #1
800141c: 77fb strb r3, [r7, #31]
800141e: 7ffb ldrb r3, [r7, #31]
8001420: 2b07 cmp r3, #7
8001422: d9ec bls.n 80013fe <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8001424: 687b ldr r3, [r7, #4]
8001426: 681b ldr r3, [r3, #0]
8001428: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800142c: b29a uxth r2, r3
800142e: 687b ldr r3, [r7, #4]
8001430: 681b ldr r3, [r3, #0]
8001432: f042 0208 orr.w r2, r2, #8
8001436: b292 uxth r2, r2
8001438: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
800143c: 687b ldr r3, [r7, #4]
800143e: 681b ldr r3, [r3, #0]
8001440: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001444: b29a uxth r2, r3
8001446: 687b ldr r3, [r7, #4]
8001448: 681b ldr r3, [r3, #0]
800144a: f422 6200 bic.w r2, r2, #2048 @ 0x800
800144e: b292 uxth r2, r2
8001450: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8001454: 687b ldr r3, [r7, #4]
8001456: 681b ldr r3, [r3, #0]
8001458: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800145c: b29a uxth r2, r3
800145e: 687b ldr r3, [r7, #4]
8001460: 681b ldr r3, [r3, #0]
8001462: f042 0204 orr.w r2, r2, #4
8001466: b292 uxth r2, r2
8001468: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
800146c: 6878 ldr r0, [r7, #4]
800146e: f006 ffc1 bl 80083f4 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8001472: e026 b.n 80014c2 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8001474: 69bb ldr r3, [r7, #24]
8001476: f403 7300 and.w r3, r3, #512 @ 0x200
800147a: 2b00 cmp r3, #0
800147c: d00f beq.n 800149e <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
800147e: 687b ldr r3, [r7, #4]
8001480: 681b ldr r3, [r3, #0]
8001482: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8001486: b29a uxth r2, r3
8001488: 687b ldr r3, [r7, #4]
800148a: 681b ldr r3, [r3, #0]
800148c: f422 7200 bic.w r2, r2, #512 @ 0x200
8001490: b292 uxth r2, r2
8001492: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8001496: 6878 ldr r0, [r7, #4]
8001498: f006 ff7f bl 800839a <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
800149c: e011 b.n 80014c2 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
800149e: 69bb ldr r3, [r7, #24]
80014a0: f403 7380 and.w r3, r3, #256 @ 0x100
80014a4: 2b00 cmp r3, #0
80014a6: d00c beq.n 80014c2 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
80014a8: 687b ldr r3, [r7, #4]
80014aa: 681b ldr r3, [r3, #0]
80014ac: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80014b0: b29a uxth r2, r3
80014b2: 687b ldr r3, [r7, #4]
80014b4: 681b ldr r3, [r3, #0]
80014b6: f422 7280 bic.w r2, r2, #256 @ 0x100
80014ba: b292 uxth r2, r2
80014bc: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
80014c0: bf00 nop
}
}
80014c2: 3720 adds r7, #32
80014c4: 46bd mov sp, r7
80014c6: bd80 pop {r7, pc}
080014c8 <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
80014c8: b580 push {r7, lr}
80014ca: b082 sub sp, #8
80014cc: af00 add r7, sp, #0
80014ce: 6078 str r0, [r7, #4]
80014d0: 460b mov r3, r1
80014d2: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
80014d4: 687b ldr r3, [r7, #4]
80014d6: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80014da: 2b01 cmp r3, #1
80014dc: d101 bne.n 80014e2 <HAL_PCD_SetAddress+0x1a>
80014de: 2302 movs r3, #2
80014e0: e012 b.n 8001508 <HAL_PCD_SetAddress+0x40>
80014e2: 687b ldr r3, [r7, #4]
80014e4: 2201 movs r2, #1
80014e6: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
80014ea: 687b ldr r3, [r7, #4]
80014ec: 78fa ldrb r2, [r7, #3]
80014ee: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
80014f0: 687b ldr r3, [r7, #4]
80014f2: 681b ldr r3, [r3, #0]
80014f4: 78fa ldrb r2, [r7, #3]
80014f6: 4611 mov r1, r2
80014f8: 4618 mov r0, r3
80014fa: f005 f82f bl 800655c <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
80014fe: 687b ldr r3, [r7, #4]
8001500: 2200 movs r2, #0
8001502: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8001506: 2300 movs r3, #0
}
8001508: 4618 mov r0, r3
800150a: 3708 adds r7, #8
800150c: 46bd mov sp, r7
800150e: bd80 pop {r7, pc}
08001510 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8001510: b580 push {r7, lr}
8001512: b084 sub sp, #16
8001514: af00 add r7, sp, #0
8001516: 6078 str r0, [r7, #4]
8001518: 4608 mov r0, r1
800151a: 4611 mov r1, r2
800151c: 461a mov r2, r3
800151e: 4603 mov r3, r0
8001520: 70fb strb r3, [r7, #3]
8001522: 460b mov r3, r1
8001524: 803b strh r3, [r7, #0]
8001526: 4613 mov r3, r2
8001528: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
800152a: 2300 movs r3, #0
800152c: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
800152e: f997 3003 ldrsb.w r3, [r7, #3]
8001532: 2b00 cmp r3, #0
8001534: da0e bge.n 8001554 <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8001536: 78fb ldrb r3, [r7, #3]
8001538: f003 0207 and.w r2, r3, #7
800153c: 4613 mov r3, r2
800153e: 009b lsls r3, r3, #2
8001540: 4413 add r3, r2
8001542: 00db lsls r3, r3, #3
8001544: 3310 adds r3, #16
8001546: 687a ldr r2, [r7, #4]
8001548: 4413 add r3, r2
800154a: 60fb str r3, [r7, #12]
ep->is_in = 1U;
800154c: 68fb ldr r3, [r7, #12]
800154e: 2201 movs r2, #1
8001550: 705a strb r2, [r3, #1]
8001552: e00e b.n 8001572 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8001554: 78fb ldrb r3, [r7, #3]
8001556: f003 0207 and.w r2, r3, #7
800155a: 4613 mov r3, r2
800155c: 009b lsls r3, r3, #2
800155e: 4413 add r3, r2
8001560: 00db lsls r3, r3, #3
8001562: f503 73a8 add.w r3, r3, #336 @ 0x150
8001566: 687a ldr r2, [r7, #4]
8001568: 4413 add r3, r2
800156a: 60fb str r3, [r7, #12]
ep->is_in = 0U;
800156c: 68fb ldr r3, [r7, #12]
800156e: 2200 movs r2, #0
8001570: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8001572: 78fb ldrb r3, [r7, #3]
8001574: f003 0307 and.w r3, r3, #7
8001578: b2da uxtb r2, r3
800157a: 68fb ldr r3, [r7, #12]
800157c: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
800157e: 883a ldrh r2, [r7, #0]
8001580: 68fb ldr r3, [r7, #12]
8001582: 611a str r2, [r3, #16]
ep->type = ep_type;
8001584: 68fb ldr r3, [r7, #12]
8001586: 78ba ldrb r2, [r7, #2]
8001588: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
800158a: 78bb ldrb r3, [r7, #2]
800158c: 2b02 cmp r3, #2
800158e: d102 bne.n 8001596 <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8001590: 68fb ldr r3, [r7, #12]
8001592: 2200 movs r2, #0
8001594: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8001596: 687b ldr r3, [r7, #4]
8001598: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
800159c: 2b01 cmp r3, #1
800159e: d101 bne.n 80015a4 <HAL_PCD_EP_Open+0x94>
80015a0: 2302 movs r3, #2
80015a2: e00e b.n 80015c2 <HAL_PCD_EP_Open+0xb2>
80015a4: 687b ldr r3, [r7, #4]
80015a6: 2201 movs r2, #1
80015a8: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
80015ac: 687b ldr r3, [r7, #4]
80015ae: 681b ldr r3, [r3, #0]
80015b0: 68f9 ldr r1, [r7, #12]
80015b2: 4618 mov r0, r3
80015b4: f002 fd78 bl 80040a8 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
80015b8: 687b ldr r3, [r7, #4]
80015ba: 2200 movs r2, #0
80015bc: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
80015c0: 7afb ldrb r3, [r7, #11]
}
80015c2: 4618 mov r0, r3
80015c4: 3710 adds r7, #16
80015c6: 46bd mov sp, r7
80015c8: bd80 pop {r7, pc}
080015ca <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80015ca: b580 push {r7, lr}
80015cc: b084 sub sp, #16
80015ce: af00 add r7, sp, #0
80015d0: 6078 str r0, [r7, #4]
80015d2: 460b mov r3, r1
80015d4: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
80015d6: f997 3003 ldrsb.w r3, [r7, #3]
80015da: 2b00 cmp r3, #0
80015dc: da0e bge.n 80015fc <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80015de: 78fb ldrb r3, [r7, #3]
80015e0: f003 0207 and.w r2, r3, #7
80015e4: 4613 mov r3, r2
80015e6: 009b lsls r3, r3, #2
80015e8: 4413 add r3, r2
80015ea: 00db lsls r3, r3, #3
80015ec: 3310 adds r3, #16
80015ee: 687a ldr r2, [r7, #4]
80015f0: 4413 add r3, r2
80015f2: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80015f4: 68fb ldr r3, [r7, #12]
80015f6: 2201 movs r2, #1
80015f8: 705a strb r2, [r3, #1]
80015fa: e00e b.n 800161a <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80015fc: 78fb ldrb r3, [r7, #3]
80015fe: f003 0207 and.w r2, r3, #7
8001602: 4613 mov r3, r2
8001604: 009b lsls r3, r3, #2
8001606: 4413 add r3, r2
8001608: 00db lsls r3, r3, #3
800160a: f503 73a8 add.w r3, r3, #336 @ 0x150
800160e: 687a ldr r2, [r7, #4]
8001610: 4413 add r3, r2
8001612: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001614: 68fb ldr r3, [r7, #12]
8001616: 2200 movs r2, #0
8001618: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
800161a: 78fb ldrb r3, [r7, #3]
800161c: f003 0307 and.w r3, r3, #7
8001620: b2da uxtb r2, r3
8001622: 68fb ldr r3, [r7, #12]
8001624: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8001626: 687b ldr r3, [r7, #4]
8001628: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
800162c: 2b01 cmp r3, #1
800162e: d101 bne.n 8001634 <HAL_PCD_EP_Close+0x6a>
8001630: 2302 movs r3, #2
8001632: e00e b.n 8001652 <HAL_PCD_EP_Close+0x88>
8001634: 687b ldr r3, [r7, #4]
8001636: 2201 movs r2, #1
8001638: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
800163c: 687b ldr r3, [r7, #4]
800163e: 681b ldr r3, [r3, #0]
8001640: 68f9 ldr r1, [r7, #12]
8001642: 4618 mov r0, r3
8001644: f003 f8f0 bl 8004828 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8001648: 687b ldr r3, [r7, #4]
800164a: 2200 movs r2, #0
800164c: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8001650: 2300 movs r3, #0
}
8001652: 4618 mov r0, r3
8001654: 3710 adds r7, #16
8001656: 46bd mov sp, r7
8001658: bd80 pop {r7, pc}
0800165a <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
800165a: b580 push {r7, lr}
800165c: b086 sub sp, #24
800165e: af00 add r7, sp, #0
8001660: 60f8 str r0, [r7, #12]
8001662: 607a str r2, [r7, #4]
8001664: 603b str r3, [r7, #0]
8001666: 460b mov r3, r1
8001668: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
800166a: 7afb ldrb r3, [r7, #11]
800166c: f003 0207 and.w r2, r3, #7
8001670: 4613 mov r3, r2
8001672: 009b lsls r3, r3, #2
8001674: 4413 add r3, r2
8001676: 00db lsls r3, r3, #3
8001678: f503 73a8 add.w r3, r3, #336 @ 0x150
800167c: 68fa ldr r2, [r7, #12]
800167e: 4413 add r3, r2
8001680: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001682: 697b ldr r3, [r7, #20]
8001684: 687a ldr r2, [r7, #4]
8001686: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001688: 697b ldr r3, [r7, #20]
800168a: 683a ldr r2, [r7, #0]
800168c: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
800168e: 697b ldr r3, [r7, #20]
8001690: 2200 movs r2, #0
8001692: 61da str r2, [r3, #28]
ep->is_in = 0U;
8001694: 697b ldr r3, [r7, #20]
8001696: 2200 movs r2, #0
8001698: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
800169a: 7afb ldrb r3, [r7, #11]
800169c: f003 0307 and.w r3, r3, #7
80016a0: b2da uxtb r2, r3
80016a2: 697b ldr r3, [r7, #20]
80016a4: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
80016a6: 68fb ldr r3, [r7, #12]
80016a8: 681b ldr r3, [r3, #0]
80016aa: 6979 ldr r1, [r7, #20]
80016ac: 4618 mov r0, r3
80016ae: f003 faa7 bl 8004c00 <USB_EPStartXfer>
return HAL_OK;
80016b2: 2300 movs r3, #0
}
80016b4: 4618 mov r0, r3
80016b6: 3718 adds r7, #24
80016b8: 46bd mov sp, r7
80016ba: bd80 pop {r7, pc}
080016bc <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
80016bc: b480 push {r7}
80016be: b083 sub sp, #12
80016c0: af00 add r7, sp, #0
80016c2: 6078 str r0, [r7, #4]
80016c4: 460b mov r3, r1
80016c6: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
80016c8: 78fb ldrb r3, [r7, #3]
80016ca: f003 0207 and.w r2, r3, #7
80016ce: 6879 ldr r1, [r7, #4]
80016d0: 4613 mov r3, r2
80016d2: 009b lsls r3, r3, #2
80016d4: 4413 add r3, r2
80016d6: 00db lsls r3, r3, #3
80016d8: 440b add r3, r1
80016da: f503 73b6 add.w r3, r3, #364 @ 0x16c
80016de: 681b ldr r3, [r3, #0]
}
80016e0: 4618 mov r0, r3
80016e2: 370c adds r7, #12
80016e4: 46bd mov sp, r7
80016e6: bc80 pop {r7}
80016e8: 4770 bx lr
080016ea <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
80016ea: b580 push {r7, lr}
80016ec: b086 sub sp, #24
80016ee: af00 add r7, sp, #0
80016f0: 60f8 str r0, [r7, #12]
80016f2: 607a str r2, [r7, #4]
80016f4: 603b str r3, [r7, #0]
80016f6: 460b mov r3, r1
80016f8: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80016fa: 7afb ldrb r3, [r7, #11]
80016fc: f003 0207 and.w r2, r3, #7
8001700: 4613 mov r3, r2
8001702: 009b lsls r3, r3, #2
8001704: 4413 add r3, r2
8001706: 00db lsls r3, r3, #3
8001708: 3310 adds r3, #16
800170a: 68fa ldr r2, [r7, #12]
800170c: 4413 add r3, r2
800170e: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8001710: 697b ldr r3, [r7, #20]
8001712: 687a ldr r2, [r7, #4]
8001714: 615a str r2, [r3, #20]
ep->xfer_len = len;
8001716: 697b ldr r3, [r7, #20]
8001718: 683a ldr r2, [r7, #0]
800171a: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
800171c: 697b ldr r3, [r7, #20]
800171e: 2201 movs r2, #1
8001720: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
8001724: 697b ldr r3, [r7, #20]
8001726: 683a ldr r2, [r7, #0]
8001728: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
800172a: 697b ldr r3, [r7, #20]
800172c: 2200 movs r2, #0
800172e: 61da str r2, [r3, #28]
ep->is_in = 1U;
8001730: 697b ldr r3, [r7, #20]
8001732: 2201 movs r2, #1
8001734: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8001736: 7afb ldrb r3, [r7, #11]
8001738: f003 0307 and.w r3, r3, #7
800173c: b2da uxtb r2, r3
800173e: 697b ldr r3, [r7, #20]
8001740: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001742: 68fb ldr r3, [r7, #12]
8001744: 681b ldr r3, [r3, #0]
8001746: 6979 ldr r1, [r7, #20]
8001748: 4618 mov r0, r3
800174a: f003 fa59 bl 8004c00 <USB_EPStartXfer>
return HAL_OK;
800174e: 2300 movs r3, #0
}
8001750: 4618 mov r0, r3
8001752: 3718 adds r7, #24
8001754: 46bd mov sp, r7
8001756: bd80 pop {r7, pc}
08001758 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001758: b580 push {r7, lr}
800175a: b084 sub sp, #16
800175c: af00 add r7, sp, #0
800175e: 6078 str r0, [r7, #4]
8001760: 460b mov r3, r1
8001762: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8001764: 78fb ldrb r3, [r7, #3]
8001766: f003 0307 and.w r3, r3, #7
800176a: 687a ldr r2, [r7, #4]
800176c: 7912 ldrb r2, [r2, #4]
800176e: 4293 cmp r3, r2
8001770: d901 bls.n 8001776 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8001772: 2301 movs r3, #1
8001774: e04c b.n 8001810 <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8001776: f997 3003 ldrsb.w r3, [r7, #3]
800177a: 2b00 cmp r3, #0
800177c: da0e bge.n 800179c <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800177e: 78fb ldrb r3, [r7, #3]
8001780: f003 0207 and.w r2, r3, #7
8001784: 4613 mov r3, r2
8001786: 009b lsls r3, r3, #2
8001788: 4413 add r3, r2
800178a: 00db lsls r3, r3, #3
800178c: 3310 adds r3, #16
800178e: 687a ldr r2, [r7, #4]
8001790: 4413 add r3, r2
8001792: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001794: 68fb ldr r3, [r7, #12]
8001796: 2201 movs r2, #1
8001798: 705a strb r2, [r3, #1]
800179a: e00c b.n 80017b6 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
800179c: 78fa ldrb r2, [r7, #3]
800179e: 4613 mov r3, r2
80017a0: 009b lsls r3, r3, #2
80017a2: 4413 add r3, r2
80017a4: 00db lsls r3, r3, #3
80017a6: f503 73a8 add.w r3, r3, #336 @ 0x150
80017aa: 687a ldr r2, [r7, #4]
80017ac: 4413 add r3, r2
80017ae: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80017b0: 68fb ldr r3, [r7, #12]
80017b2: 2200 movs r2, #0
80017b4: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
80017b6: 68fb ldr r3, [r7, #12]
80017b8: 2201 movs r2, #1
80017ba: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
80017bc: 78fb ldrb r3, [r7, #3]
80017be: f003 0307 and.w r3, r3, #7
80017c2: b2da uxtb r2, r3
80017c4: 68fb ldr r3, [r7, #12]
80017c6: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80017c8: 687b ldr r3, [r7, #4]
80017ca: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80017ce: 2b01 cmp r3, #1
80017d0: d101 bne.n 80017d6 <HAL_PCD_EP_SetStall+0x7e>
80017d2: 2302 movs r3, #2
80017d4: e01c b.n 8001810 <HAL_PCD_EP_SetStall+0xb8>
80017d6: 687b ldr r3, [r7, #4]
80017d8: 2201 movs r2, #1
80017da: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
80017de: 687b ldr r3, [r7, #4]
80017e0: 681b ldr r3, [r3, #0]
80017e2: 68f9 ldr r1, [r7, #12]
80017e4: 4618 mov r0, r3
80017e6: f004 fdbc bl 8006362 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
80017ea: 78fb ldrb r3, [r7, #3]
80017ec: f003 0307 and.w r3, r3, #7
80017f0: 2b00 cmp r3, #0
80017f2: d108 bne.n 8001806 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
80017f4: 687b ldr r3, [r7, #4]
80017f6: 681a ldr r2, [r3, #0]
80017f8: 687b ldr r3, [r7, #4]
80017fa: f503 7326 add.w r3, r3, #664 @ 0x298
80017fe: 4619 mov r1, r3
8001800: 4610 mov r0, r2
8001802: f004 fee1 bl 80065c8 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8001806: 687b ldr r3, [r7, #4]
8001808: 2200 movs r2, #0
800180a: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
800180e: 2300 movs r3, #0
}
8001810: 4618 mov r0, r3
8001812: 3710 adds r7, #16
8001814: 46bd mov sp, r7
8001816: bd80 pop {r7, pc}
08001818 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8001818: b580 push {r7, lr}
800181a: b084 sub sp, #16
800181c: af00 add r7, sp, #0
800181e: 6078 str r0, [r7, #4]
8001820: 460b mov r3, r1
8001822: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8001824: 78fb ldrb r3, [r7, #3]
8001826: f003 030f and.w r3, r3, #15
800182a: 687a ldr r2, [r7, #4]
800182c: 7912 ldrb r2, [r2, #4]
800182e: 4293 cmp r3, r2
8001830: d901 bls.n 8001836 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8001832: 2301 movs r3, #1
8001834: e040 b.n 80018b8 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8001836: f997 3003 ldrsb.w r3, [r7, #3]
800183a: 2b00 cmp r3, #0
800183c: da0e bge.n 800185c <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800183e: 78fb ldrb r3, [r7, #3]
8001840: f003 0207 and.w r2, r3, #7
8001844: 4613 mov r3, r2
8001846: 009b lsls r3, r3, #2
8001848: 4413 add r3, r2
800184a: 00db lsls r3, r3, #3
800184c: 3310 adds r3, #16
800184e: 687a ldr r2, [r7, #4]
8001850: 4413 add r3, r2
8001852: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8001854: 68fb ldr r3, [r7, #12]
8001856: 2201 movs r2, #1
8001858: 705a strb r2, [r3, #1]
800185a: e00e b.n 800187a <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
800185c: 78fb ldrb r3, [r7, #3]
800185e: f003 0207 and.w r2, r3, #7
8001862: 4613 mov r3, r2
8001864: 009b lsls r3, r3, #2
8001866: 4413 add r3, r2
8001868: 00db lsls r3, r3, #3
800186a: f503 73a8 add.w r3, r3, #336 @ 0x150
800186e: 687a ldr r2, [r7, #4]
8001870: 4413 add r3, r2
8001872: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8001874: 68fb ldr r3, [r7, #12]
8001876: 2200 movs r2, #0
8001878: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
800187a: 68fb ldr r3, [r7, #12]
800187c: 2200 movs r2, #0
800187e: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8001880: 78fb ldrb r3, [r7, #3]
8001882: f003 0307 and.w r3, r3, #7
8001886: b2da uxtb r2, r3
8001888: 68fb ldr r3, [r7, #12]
800188a: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
800188c: 687b ldr r3, [r7, #4]
800188e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8001892: 2b01 cmp r3, #1
8001894: d101 bne.n 800189a <HAL_PCD_EP_ClrStall+0x82>
8001896: 2302 movs r3, #2
8001898: e00e b.n 80018b8 <HAL_PCD_EP_ClrStall+0xa0>
800189a: 687b ldr r3, [r7, #4]
800189c: 2201 movs r2, #1
800189e: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
80018a2: 687b ldr r3, [r7, #4]
80018a4: 681b ldr r3, [r3, #0]
80018a6: 68f9 ldr r1, [r7, #12]
80018a8: 4618 mov r0, r3
80018aa: f004 fdaa bl 8006402 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
80018ae: 687b ldr r3, [r7, #4]
80018b0: 2200 movs r2, #0
80018b2: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80018b6: 2300 movs r3, #0
}
80018b8: 4618 mov r0, r3
80018ba: 3710 adds r7, #16
80018bc: 46bd mov sp, r7
80018be: bd80 pop {r7, pc}
080018c0 <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
80018c0: b580 push {r7, lr}
80018c2: b096 sub sp, #88 @ 0x58
80018c4: af00 add r7, sp, #0
80018c6: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
80018c8: e3bb b.n 8002042 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
80018ca: 687b ldr r3, [r7, #4]
80018cc: 681b ldr r3, [r3, #0]
80018ce: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80018d2: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
80018d6: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80018da: b2db uxtb r3, r3
80018dc: f003 030f and.w r3, r3, #15
80018e0: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
80018e4: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80018e8: 2b00 cmp r3, #0
80018ea: f040 8175 bne.w 8001bd8 <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
80018ee: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80018f2: f003 0310 and.w r3, r3, #16
80018f6: 2b00 cmp r3, #0
80018f8: d14e bne.n 8001998 <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80018fa: 687b ldr r3, [r7, #4]
80018fc: 681b ldr r3, [r3, #0]
80018fe: 881b ldrh r3, [r3, #0]
8001900: b29b uxth r3, r3
8001902: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8001906: f023 0370 bic.w r3, r3, #112 @ 0x70
800190a: 81fb strh r3, [r7, #14]
800190c: 687b ldr r3, [r7, #4]
800190e: 681a ldr r2, [r3, #0]
8001910: 89fb ldrh r3, [r7, #14]
8001912: ea6f 4343 mvn.w r3, r3, lsl #17
8001916: ea6f 4353 mvn.w r3, r3, lsr #17
800191a: b29b uxth r3, r3
800191c: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
800191e: 687b ldr r3, [r7, #4]
8001920: 3310 adds r3, #16
8001922: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8001924: 687b ldr r3, [r7, #4]
8001926: 681b ldr r3, [r3, #0]
8001928: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800192c: b29b uxth r3, r3
800192e: 461a mov r2, r3
8001930: 6d7b ldr r3, [r7, #84] @ 0x54
8001932: 781b ldrb r3, [r3, #0]
8001934: 00db lsls r3, r3, #3
8001936: 4413 add r3, r2
8001938: 3302 adds r3, #2
800193a: 005b lsls r3, r3, #1
800193c: 687a ldr r2, [r7, #4]
800193e: 6812 ldr r2, [r2, #0]
8001940: 4413 add r3, r2
8001942: f503 6380 add.w r3, r3, #1024 @ 0x400
8001946: 881b ldrh r3, [r3, #0]
8001948: f3c3 0209 ubfx r2, r3, #0, #10
800194c: 6d7b ldr r3, [r7, #84] @ 0x54
800194e: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
8001950: 6d7b ldr r3, [r7, #84] @ 0x54
8001952: 695a ldr r2, [r3, #20]
8001954: 6d7b ldr r3, [r7, #84] @ 0x54
8001956: 69db ldr r3, [r3, #28]
8001958: 441a add r2, r3
800195a: 6d7b ldr r3, [r7, #84] @ 0x54
800195c: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
800195e: 2100 movs r1, #0
8001960: 6878 ldr r0, [r7, #4]
8001962: f006 fd00 bl 8008366 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
8001966: 687b ldr r3, [r7, #4]
8001968: 7b5b ldrb r3, [r3, #13]
800196a: b2db uxtb r3, r3
800196c: 2b00 cmp r3, #0
800196e: f000 8368 beq.w 8002042 <PCD_EP_ISR_Handler+0x782>
8001972: 6d7b ldr r3, [r7, #84] @ 0x54
8001974: 699b ldr r3, [r3, #24]
8001976: 2b00 cmp r3, #0
8001978: f040 8363 bne.w 8002042 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
800197c: 687b ldr r3, [r7, #4]
800197e: 7b5b ldrb r3, [r3, #13]
8001980: b2db uxtb r3, r3
8001982: f063 037f orn r3, r3, #127 @ 0x7f
8001986: b2da uxtb r2, r3
8001988: 687b ldr r3, [r7, #4]
800198a: 681b ldr r3, [r3, #0]
800198c: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
8001990: 687b ldr r3, [r7, #4]
8001992: 2200 movs r2, #0
8001994: 735a strb r2, [r3, #13]
8001996: e354 b.n 8002042 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
8001998: 687b ldr r3, [r7, #4]
800199a: f503 73a8 add.w r3, r3, #336 @ 0x150
800199e: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
80019a0: 687b ldr r3, [r7, #4]
80019a2: 681b ldr r3, [r3, #0]
80019a4: 881b ldrh r3, [r3, #0]
80019a6: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
80019aa: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80019ae: f403 6300 and.w r3, r3, #2048 @ 0x800
80019b2: 2b00 cmp r3, #0
80019b4: d034 beq.n 8001a20 <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80019b6: 687b ldr r3, [r7, #4]
80019b8: 681b ldr r3, [r3, #0]
80019ba: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80019be: b29b uxth r3, r3
80019c0: 461a mov r2, r3
80019c2: 6d7b ldr r3, [r7, #84] @ 0x54
80019c4: 781b ldrb r3, [r3, #0]
80019c6: 00db lsls r3, r3, #3
80019c8: 4413 add r3, r2
80019ca: 3306 adds r3, #6
80019cc: 005b lsls r3, r3, #1
80019ce: 687a ldr r2, [r7, #4]
80019d0: 6812 ldr r2, [r2, #0]
80019d2: 4413 add r3, r2
80019d4: f503 6380 add.w r3, r3, #1024 @ 0x400
80019d8: 881b ldrh r3, [r3, #0]
80019da: f3c3 0209 ubfx r2, r3, #0, #10
80019de: 6d7b ldr r3, [r7, #84] @ 0x54
80019e0: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80019e2: 687b ldr r3, [r7, #4]
80019e4: 6818 ldr r0, [r3, #0]
80019e6: 687b ldr r3, [r7, #4]
80019e8: f503 7126 add.w r1, r3, #664 @ 0x298
80019ec: 6d7b ldr r3, [r7, #84] @ 0x54
80019ee: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
80019f0: 6d7b ldr r3, [r7, #84] @ 0x54
80019f2: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80019f4: b29b uxth r3, r3
80019f6: f004 fe38 bl 800666a <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80019fa: 687b ldr r3, [r7, #4]
80019fc: 681b ldr r3, [r3, #0]
80019fe: 881b ldrh r3, [r3, #0]
8001a00: b29a uxth r2, r3
8001a02: f640 738f movw r3, #3983 @ 0xf8f
8001a06: 4013 ands r3, r2
8001a08: 823b strh r3, [r7, #16]
8001a0a: 687b ldr r3, [r7, #4]
8001a0c: 681b ldr r3, [r3, #0]
8001a0e: 8a3a ldrh r2, [r7, #16]
8001a10: f042 0280 orr.w r2, r2, #128 @ 0x80
8001a14: b292 uxth r2, r2
8001a16: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8001a18: 6878 ldr r0, [r7, #4]
8001a1a: f006 fc77 bl 800830c <HAL_PCD_SetupStageCallback>
8001a1e: e310 b.n 8002042 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
8001a20: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8001a24: 2b00 cmp r3, #0
8001a26: f280 830c bge.w 8002042 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8001a2a: 687b ldr r3, [r7, #4]
8001a2c: 681b ldr r3, [r3, #0]
8001a2e: 881b ldrh r3, [r3, #0]
8001a30: b29a uxth r2, r3
8001a32: f640 738f movw r3, #3983 @ 0xf8f
8001a36: 4013 ands r3, r2
8001a38: 83fb strh r3, [r7, #30]
8001a3a: 687b ldr r3, [r7, #4]
8001a3c: 681b ldr r3, [r3, #0]
8001a3e: 8bfa ldrh r2, [r7, #30]
8001a40: f042 0280 orr.w r2, r2, #128 @ 0x80
8001a44: b292 uxth r2, r2
8001a46: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8001a48: 687b ldr r3, [r7, #4]
8001a4a: 681b ldr r3, [r3, #0]
8001a4c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001a50: b29b uxth r3, r3
8001a52: 461a mov r2, r3
8001a54: 6d7b ldr r3, [r7, #84] @ 0x54
8001a56: 781b ldrb r3, [r3, #0]
8001a58: 00db lsls r3, r3, #3
8001a5a: 4413 add r3, r2
8001a5c: 3306 adds r3, #6
8001a5e: 005b lsls r3, r3, #1
8001a60: 687a ldr r2, [r7, #4]
8001a62: 6812 ldr r2, [r2, #0]
8001a64: 4413 add r3, r2
8001a66: f503 6380 add.w r3, r3, #1024 @ 0x400
8001a6a: 881b ldrh r3, [r3, #0]
8001a6c: f3c3 0209 ubfx r2, r3, #0, #10
8001a70: 6d7b ldr r3, [r7, #84] @ 0x54
8001a72: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
8001a74: 6d7b ldr r3, [r7, #84] @ 0x54
8001a76: 69db ldr r3, [r3, #28]
8001a78: 2b00 cmp r3, #0
8001a7a: d019 beq.n 8001ab0 <PCD_EP_ISR_Handler+0x1f0>
8001a7c: 6d7b ldr r3, [r7, #84] @ 0x54
8001a7e: 695b ldr r3, [r3, #20]
8001a80: 2b00 cmp r3, #0
8001a82: d015 beq.n 8001ab0 <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8001a84: 687b ldr r3, [r7, #4]
8001a86: 6818 ldr r0, [r3, #0]
8001a88: 6d7b ldr r3, [r7, #84] @ 0x54
8001a8a: 6959 ldr r1, [r3, #20]
8001a8c: 6d7b ldr r3, [r7, #84] @ 0x54
8001a8e: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8001a90: 6d7b ldr r3, [r7, #84] @ 0x54
8001a92: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8001a94: b29b uxth r3, r3
8001a96: f004 fde8 bl 800666a <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
8001a9a: 6d7b ldr r3, [r7, #84] @ 0x54
8001a9c: 695a ldr r2, [r3, #20]
8001a9e: 6d7b ldr r3, [r7, #84] @ 0x54
8001aa0: 69db ldr r3, [r3, #28]
8001aa2: 441a add r2, r3
8001aa4: 6d7b ldr r3, [r7, #84] @ 0x54
8001aa6: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
8001aa8: 2100 movs r1, #0
8001aaa: 6878 ldr r0, [r7, #4]
8001aac: f006 fc40 bl 8008330 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8001ab0: 687b ldr r3, [r7, #4]
8001ab2: 681b ldr r3, [r3, #0]
8001ab4: 881b ldrh r3, [r3, #0]
8001ab6: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8001aba: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8001abe: f403 6300 and.w r3, r3, #2048 @ 0x800
8001ac2: 2b00 cmp r3, #0
8001ac4: f040 82bd bne.w 8002042 <PCD_EP_ISR_Handler+0x782>
8001ac8: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8001acc: f403 5340 and.w r3, r3, #12288 @ 0x3000
8001ad0: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
8001ad4: f000 82b5 beq.w 8002042 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
8001ad8: 687b ldr r3, [r7, #4]
8001ada: 681b ldr r3, [r3, #0]
8001adc: 61bb str r3, [r7, #24]
8001ade: 687b ldr r3, [r7, #4]
8001ae0: 681b ldr r3, [r3, #0]
8001ae2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001ae6: b29b uxth r3, r3
8001ae8: 461a mov r2, r3
8001aea: 69bb ldr r3, [r7, #24]
8001aec: 4413 add r3, r2
8001aee: 61bb str r3, [r7, #24]
8001af0: 69bb ldr r3, [r7, #24]
8001af2: f203 430c addw r3, r3, #1036 @ 0x40c
8001af6: 617b str r3, [r7, #20]
8001af8: 697b ldr r3, [r7, #20]
8001afa: 881b ldrh r3, [r3, #0]
8001afc: b29b uxth r3, r3
8001afe: f3c3 0309 ubfx r3, r3, #0, #10
8001b02: b29a uxth r2, r3
8001b04: 697b ldr r3, [r7, #20]
8001b06: 801a strh r2, [r3, #0]
8001b08: 6d7b ldr r3, [r7, #84] @ 0x54
8001b0a: 691b ldr r3, [r3, #16]
8001b0c: 2b3e cmp r3, #62 @ 0x3e
8001b0e: d91d bls.n 8001b4c <PCD_EP_ISR_Handler+0x28c>
8001b10: 6d7b ldr r3, [r7, #84] @ 0x54
8001b12: 691b ldr r3, [r3, #16]
8001b14: 095b lsrs r3, r3, #5
8001b16: 647b str r3, [r7, #68] @ 0x44
8001b18: 6d7b ldr r3, [r7, #84] @ 0x54
8001b1a: 691b ldr r3, [r3, #16]
8001b1c: f003 031f and.w r3, r3, #31
8001b20: 2b00 cmp r3, #0
8001b22: d102 bne.n 8001b2a <PCD_EP_ISR_Handler+0x26a>
8001b24: 6c7b ldr r3, [r7, #68] @ 0x44
8001b26: 3b01 subs r3, #1
8001b28: 647b str r3, [r7, #68] @ 0x44
8001b2a: 697b ldr r3, [r7, #20]
8001b2c: 881b ldrh r3, [r3, #0]
8001b2e: b29a uxth r2, r3
8001b30: 6c7b ldr r3, [r7, #68] @ 0x44
8001b32: b29b uxth r3, r3
8001b34: 029b lsls r3, r3, #10
8001b36: b29b uxth r3, r3
8001b38: 4313 orrs r3, r2
8001b3a: b29b uxth r3, r3
8001b3c: ea6f 4343 mvn.w r3, r3, lsl #17
8001b40: ea6f 4353 mvn.w r3, r3, lsr #17
8001b44: b29a uxth r2, r3
8001b46: 697b ldr r3, [r7, #20]
8001b48: 801a strh r2, [r3, #0]
8001b4a: e026 b.n 8001b9a <PCD_EP_ISR_Handler+0x2da>
8001b4c: 6d7b ldr r3, [r7, #84] @ 0x54
8001b4e: 691b ldr r3, [r3, #16]
8001b50: 2b00 cmp r3, #0
8001b52: d10a bne.n 8001b6a <PCD_EP_ISR_Handler+0x2aa>
8001b54: 697b ldr r3, [r7, #20]
8001b56: 881b ldrh r3, [r3, #0]
8001b58: b29b uxth r3, r3
8001b5a: ea6f 4343 mvn.w r3, r3, lsl #17
8001b5e: ea6f 4353 mvn.w r3, r3, lsr #17
8001b62: b29a uxth r2, r3
8001b64: 697b ldr r3, [r7, #20]
8001b66: 801a strh r2, [r3, #0]
8001b68: e017 b.n 8001b9a <PCD_EP_ISR_Handler+0x2da>
8001b6a: 6d7b ldr r3, [r7, #84] @ 0x54
8001b6c: 691b ldr r3, [r3, #16]
8001b6e: 085b lsrs r3, r3, #1
8001b70: 647b str r3, [r7, #68] @ 0x44
8001b72: 6d7b ldr r3, [r7, #84] @ 0x54
8001b74: 691b ldr r3, [r3, #16]
8001b76: f003 0301 and.w r3, r3, #1
8001b7a: 2b00 cmp r3, #0
8001b7c: d002 beq.n 8001b84 <PCD_EP_ISR_Handler+0x2c4>
8001b7e: 6c7b ldr r3, [r7, #68] @ 0x44
8001b80: 3301 adds r3, #1
8001b82: 647b str r3, [r7, #68] @ 0x44
8001b84: 697b ldr r3, [r7, #20]
8001b86: 881b ldrh r3, [r3, #0]
8001b88: b29a uxth r2, r3
8001b8a: 6c7b ldr r3, [r7, #68] @ 0x44
8001b8c: b29b uxth r3, r3
8001b8e: 029b lsls r3, r3, #10
8001b90: b29b uxth r3, r3
8001b92: 4313 orrs r3, r2
8001b94: b29a uxth r2, r3
8001b96: 697b ldr r3, [r7, #20]
8001b98: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8001b9a: 687b ldr r3, [r7, #4]
8001b9c: 681b ldr r3, [r3, #0]
8001b9e: 881b ldrh r3, [r3, #0]
8001ba0: b29b uxth r3, r3
8001ba2: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8001ba6: f023 0370 bic.w r3, r3, #112 @ 0x70
8001baa: 827b strh r3, [r7, #18]
8001bac: 8a7b ldrh r3, [r7, #18]
8001bae: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8001bb2: 827b strh r3, [r7, #18]
8001bb4: 8a7b ldrh r3, [r7, #18]
8001bb6: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8001bba: 827b strh r3, [r7, #18]
8001bbc: 687b ldr r3, [r7, #4]
8001bbe: 681a ldr r2, [r3, #0]
8001bc0: 8a7b ldrh r3, [r7, #18]
8001bc2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8001bc6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8001bca: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8001bce: f043 0380 orr.w r3, r3, #128 @ 0x80
8001bd2: b29b uxth r3, r3
8001bd4: 8013 strh r3, [r2, #0]
8001bd6: e234 b.n 8002042 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
8001bd8: 687b ldr r3, [r7, #4]
8001bda: 681b ldr r3, [r3, #0]
8001bdc: 461a mov r2, r3
8001bde: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8001be2: 009b lsls r3, r3, #2
8001be4: 4413 add r3, r2
8001be6: 881b ldrh r3, [r3, #0]
8001be8: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
8001bec: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8001bf0: 2b00 cmp r3, #0
8001bf2: f280 80fc bge.w 8001dee <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
8001bf6: 687b ldr r3, [r7, #4]
8001bf8: 681b ldr r3, [r3, #0]
8001bfa: 461a mov r2, r3
8001bfc: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8001c00: 009b lsls r3, r3, #2
8001c02: 4413 add r3, r2
8001c04: 881b ldrh r3, [r3, #0]
8001c06: b29a uxth r2, r3
8001c08: f640 738f movw r3, #3983 @ 0xf8f
8001c0c: 4013 ands r3, r2
8001c0e: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8001c12: 687b ldr r3, [r7, #4]
8001c14: 681b ldr r3, [r3, #0]
8001c16: 461a mov r2, r3
8001c18: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8001c1c: 009b lsls r3, r3, #2
8001c1e: 4413 add r3, r2
8001c20: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
8001c24: f042 0280 orr.w r2, r2, #128 @ 0x80
8001c28: b292 uxth r2, r2
8001c2a: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
8001c2c: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8001c30: 4613 mov r3, r2
8001c32: 009b lsls r3, r3, #2
8001c34: 4413 add r3, r2
8001c36: 00db lsls r3, r3, #3
8001c38: f503 73a8 add.w r3, r3, #336 @ 0x150
8001c3c: 687a ldr r2, [r7, #4]
8001c3e: 4413 add r3, r2
8001c40: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8001c42: 6d7b ldr r3, [r7, #84] @ 0x54
8001c44: 7b1b ldrb r3, [r3, #12]
8001c46: 2b00 cmp r3, #0
8001c48: d125 bne.n 8001c96 <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8001c4a: 687b ldr r3, [r7, #4]
8001c4c: 681b ldr r3, [r3, #0]
8001c4e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001c52: b29b uxth r3, r3
8001c54: 461a mov r2, r3
8001c56: 6d7b ldr r3, [r7, #84] @ 0x54
8001c58: 781b ldrb r3, [r3, #0]
8001c5a: 00db lsls r3, r3, #3
8001c5c: 4413 add r3, r2
8001c5e: 3306 adds r3, #6
8001c60: 005b lsls r3, r3, #1
8001c62: 687a ldr r2, [r7, #4]
8001c64: 6812 ldr r2, [r2, #0]
8001c66: 4413 add r3, r2
8001c68: f503 6380 add.w r3, r3, #1024 @ 0x400
8001c6c: 881b ldrh r3, [r3, #0]
8001c6e: f3c3 0309 ubfx r3, r3, #0, #10
8001c72: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8001c76: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8001c7a: 2b00 cmp r3, #0
8001c7c: f000 8092 beq.w 8001da4 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
8001c80: 687b ldr r3, [r7, #4]
8001c82: 6818 ldr r0, [r3, #0]
8001c84: 6d7b ldr r3, [r7, #84] @ 0x54
8001c86: 6959 ldr r1, [r3, #20]
8001c88: 6d7b ldr r3, [r7, #84] @ 0x54
8001c8a: 88da ldrh r2, [r3, #6]
8001c8c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8001c90: f004 fceb bl 800666a <USB_ReadPMA>
8001c94: e086 b.n 8001da4 <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
8001c96: 6d7b ldr r3, [r7, #84] @ 0x54
8001c98: 78db ldrb r3, [r3, #3]
8001c9a: 2b02 cmp r3, #2
8001c9c: d10a bne.n 8001cb4 <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
8001c9e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8001ca2: 461a mov r2, r3
8001ca4: 6d79 ldr r1, [r7, #84] @ 0x54
8001ca6: 6878 ldr r0, [r7, #4]
8001ca8: f000 f9d9 bl 800205e <HAL_PCD_EP_DB_Receive>
8001cac: 4603 mov r3, r0
8001cae: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
8001cb2: e077 b.n 8001da4 <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8001cb4: 687b ldr r3, [r7, #4]
8001cb6: 681b ldr r3, [r3, #0]
8001cb8: 461a mov r2, r3
8001cba: 6d7b ldr r3, [r7, #84] @ 0x54
8001cbc: 781b ldrb r3, [r3, #0]
8001cbe: 009b lsls r3, r3, #2
8001cc0: 4413 add r3, r2
8001cc2: 881b ldrh r3, [r3, #0]
8001cc4: b29b uxth r3, r3
8001cc6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8001cca: f023 0370 bic.w r3, r3, #112 @ 0x70
8001cce: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
8001cd2: 687b ldr r3, [r7, #4]
8001cd4: 681b ldr r3, [r3, #0]
8001cd6: 461a mov r2, r3
8001cd8: 6d7b ldr r3, [r7, #84] @ 0x54
8001cda: 781b ldrb r3, [r3, #0]
8001cdc: 009b lsls r3, r3, #2
8001cde: 441a add r2, r3
8001ce0: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
8001ce4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8001ce8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8001cec: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8001cf0: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8001cf4: b29b uxth r3, r3
8001cf6: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
8001cf8: 687b ldr r3, [r7, #4]
8001cfa: 681b ldr r3, [r3, #0]
8001cfc: 461a mov r2, r3
8001cfe: 6d7b ldr r3, [r7, #84] @ 0x54
8001d00: 781b ldrb r3, [r3, #0]
8001d02: 009b lsls r3, r3, #2
8001d04: 4413 add r3, r2
8001d06: 881b ldrh r3, [r3, #0]
8001d08: b29b uxth r3, r3
8001d0a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8001d0e: 2b00 cmp r3, #0
8001d10: d024 beq.n 8001d5c <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8001d12: 687b ldr r3, [r7, #4]
8001d14: 681b ldr r3, [r3, #0]
8001d16: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001d1a: b29b uxth r3, r3
8001d1c: 461a mov r2, r3
8001d1e: 6d7b ldr r3, [r7, #84] @ 0x54
8001d20: 781b ldrb r3, [r3, #0]
8001d22: 00db lsls r3, r3, #3
8001d24: 4413 add r3, r2
8001d26: 3302 adds r3, #2
8001d28: 005b lsls r3, r3, #1
8001d2a: 687a ldr r2, [r7, #4]
8001d2c: 6812 ldr r2, [r2, #0]
8001d2e: 4413 add r3, r2
8001d30: f503 6380 add.w r3, r3, #1024 @ 0x400
8001d34: 881b ldrh r3, [r3, #0]
8001d36: f3c3 0309 ubfx r3, r3, #0, #10
8001d3a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8001d3e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8001d42: 2b00 cmp r3, #0
8001d44: d02e beq.n 8001da4 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8001d46: 687b ldr r3, [r7, #4]
8001d48: 6818 ldr r0, [r3, #0]
8001d4a: 6d7b ldr r3, [r7, #84] @ 0x54
8001d4c: 6959 ldr r1, [r3, #20]
8001d4e: 6d7b ldr r3, [r7, #84] @ 0x54
8001d50: 891a ldrh r2, [r3, #8]
8001d52: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8001d56: f004 fc88 bl 800666a <USB_ReadPMA>
8001d5a: e023 b.n 8001da4 <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8001d5c: 687b ldr r3, [r7, #4]
8001d5e: 681b ldr r3, [r3, #0]
8001d60: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001d64: b29b uxth r3, r3
8001d66: 461a mov r2, r3
8001d68: 6d7b ldr r3, [r7, #84] @ 0x54
8001d6a: 781b ldrb r3, [r3, #0]
8001d6c: 00db lsls r3, r3, #3
8001d6e: 4413 add r3, r2
8001d70: 3306 adds r3, #6
8001d72: 005b lsls r3, r3, #1
8001d74: 687a ldr r2, [r7, #4]
8001d76: 6812 ldr r2, [r2, #0]
8001d78: 4413 add r3, r2
8001d7a: f503 6380 add.w r3, r3, #1024 @ 0x400
8001d7e: 881b ldrh r3, [r3, #0]
8001d80: f3c3 0309 ubfx r3, r3, #0, #10
8001d84: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8001d88: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8001d8c: 2b00 cmp r3, #0
8001d8e: d009 beq.n 8001da4 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8001d90: 687b ldr r3, [r7, #4]
8001d92: 6818 ldr r0, [r3, #0]
8001d94: 6d7b ldr r3, [r7, #84] @ 0x54
8001d96: 6959 ldr r1, [r3, #20]
8001d98: 6d7b ldr r3, [r7, #84] @ 0x54
8001d9a: 895a ldrh r2, [r3, #10]
8001d9c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8001da0: f004 fc63 bl 800666a <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
8001da4: 6d7b ldr r3, [r7, #84] @ 0x54
8001da6: 69da ldr r2, [r3, #28]
8001da8: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8001dac: 441a add r2, r3
8001dae: 6d7b ldr r3, [r7, #84] @ 0x54
8001db0: 61da str r2, [r3, #28]
ep->xfer_buff += count;
8001db2: 6d7b ldr r3, [r7, #84] @ 0x54
8001db4: 695a ldr r2, [r3, #20]
8001db6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8001dba: 441a add r2, r3
8001dbc: 6d7b ldr r3, [r7, #84] @ 0x54
8001dbe: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
8001dc0: 6d7b ldr r3, [r7, #84] @ 0x54
8001dc2: 699b ldr r3, [r3, #24]
8001dc4: 2b00 cmp r3, #0
8001dc6: d005 beq.n 8001dd4 <PCD_EP_ISR_Handler+0x514>
8001dc8: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
8001dcc: 6d7b ldr r3, [r7, #84] @ 0x54
8001dce: 691b ldr r3, [r3, #16]
8001dd0: 429a cmp r2, r3
8001dd2: d206 bcs.n 8001de2 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
8001dd4: 6d7b ldr r3, [r7, #84] @ 0x54
8001dd6: 781b ldrb r3, [r3, #0]
8001dd8: 4619 mov r1, r3
8001dda: 6878 ldr r0, [r7, #4]
8001ddc: f006 faa8 bl 8008330 <HAL_PCD_DataOutStageCallback>
8001de0: e005 b.n 8001dee <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8001de2: 687b ldr r3, [r7, #4]
8001de4: 681b ldr r3, [r3, #0]
8001de6: 6d79 ldr r1, [r7, #84] @ 0x54
8001de8: 4618 mov r0, r3
8001dea: f002 ff09 bl 8004c00 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
8001dee: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8001df2: f003 0380 and.w r3, r3, #128 @ 0x80
8001df6: 2b00 cmp r3, #0
8001df8: f000 8123 beq.w 8002042 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
8001dfc: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8001e00: 4613 mov r3, r2
8001e02: 009b lsls r3, r3, #2
8001e04: 4413 add r3, r2
8001e06: 00db lsls r3, r3, #3
8001e08: 3310 adds r3, #16
8001e0a: 687a ldr r2, [r7, #4]
8001e0c: 4413 add r3, r2
8001e0e: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
8001e10: 687b ldr r3, [r7, #4]
8001e12: 681b ldr r3, [r3, #0]
8001e14: 461a mov r2, r3
8001e16: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8001e1a: 009b lsls r3, r3, #2
8001e1c: 4413 add r3, r2
8001e1e: 881b ldrh r3, [r3, #0]
8001e20: b29b uxth r3, r3
8001e22: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8001e26: f023 0370 bic.w r3, r3, #112 @ 0x70
8001e2a: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
8001e2e: 687b ldr r3, [r7, #4]
8001e30: 681b ldr r3, [r3, #0]
8001e32: 461a mov r2, r3
8001e34: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8001e38: 009b lsls r3, r3, #2
8001e3a: 441a add r2, r3
8001e3c: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8001e40: ea6f 4343 mvn.w r3, r3, lsl #17
8001e44: ea6f 4353 mvn.w r3, r3, lsr #17
8001e48: b29b uxth r3, r3
8001e4a: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
8001e4c: 6d7b ldr r3, [r7, #84] @ 0x54
8001e4e: 78db ldrb r3, [r3, #3]
8001e50: 2b01 cmp r3, #1
8001e52: f040 80a2 bne.w 8001f9a <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
8001e56: 6d7b ldr r3, [r7, #84] @ 0x54
8001e58: 2200 movs r2, #0
8001e5a: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
8001e5c: 6d7b ldr r3, [r7, #84] @ 0x54
8001e5e: 7b1b ldrb r3, [r3, #12]
8001e60: 2b00 cmp r3, #0
8001e62: f000 8093 beq.w 8001f8c <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8001e66: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8001e6a: f003 0340 and.w r3, r3, #64 @ 0x40
8001e6e: 2b00 cmp r3, #0
8001e70: d046 beq.n 8001f00 <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8001e72: 6d7b ldr r3, [r7, #84] @ 0x54
8001e74: 785b ldrb r3, [r3, #1]
8001e76: 2b00 cmp r3, #0
8001e78: d126 bne.n 8001ec8 <PCD_EP_ISR_Handler+0x608>
8001e7a: 687b ldr r3, [r7, #4]
8001e7c: 681b ldr r3, [r3, #0]
8001e7e: 627b str r3, [r7, #36] @ 0x24
8001e80: 687b ldr r3, [r7, #4]
8001e82: 681b ldr r3, [r3, #0]
8001e84: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001e88: b29b uxth r3, r3
8001e8a: 461a mov r2, r3
8001e8c: 6a7b ldr r3, [r7, #36] @ 0x24
8001e8e: 4413 add r3, r2
8001e90: 627b str r3, [r7, #36] @ 0x24
8001e92: 6d7b ldr r3, [r7, #84] @ 0x54
8001e94: 781b ldrb r3, [r3, #0]
8001e96: 011a lsls r2, r3, #4
8001e98: 6a7b ldr r3, [r7, #36] @ 0x24
8001e9a: 4413 add r3, r2
8001e9c: f203 4304 addw r3, r3, #1028 @ 0x404
8001ea0: 623b str r3, [r7, #32]
8001ea2: 6a3b ldr r3, [r7, #32]
8001ea4: 881b ldrh r3, [r3, #0]
8001ea6: b29b uxth r3, r3
8001ea8: f3c3 0309 ubfx r3, r3, #0, #10
8001eac: b29a uxth r2, r3
8001eae: 6a3b ldr r3, [r7, #32]
8001eb0: 801a strh r2, [r3, #0]
8001eb2: 6a3b ldr r3, [r7, #32]
8001eb4: 881b ldrh r3, [r3, #0]
8001eb6: b29b uxth r3, r3
8001eb8: ea6f 4343 mvn.w r3, r3, lsl #17
8001ebc: ea6f 4353 mvn.w r3, r3, lsr #17
8001ec0: b29a uxth r2, r3
8001ec2: 6a3b ldr r3, [r7, #32]
8001ec4: 801a strh r2, [r3, #0]
8001ec6: e061 b.n 8001f8c <PCD_EP_ISR_Handler+0x6cc>
8001ec8: 6d7b ldr r3, [r7, #84] @ 0x54
8001eca: 785b ldrb r3, [r3, #1]
8001ecc: 2b01 cmp r3, #1
8001ece: d15d bne.n 8001f8c <PCD_EP_ISR_Handler+0x6cc>
8001ed0: 687b ldr r3, [r7, #4]
8001ed2: 681b ldr r3, [r3, #0]
8001ed4: 62fb str r3, [r7, #44] @ 0x2c
8001ed6: 687b ldr r3, [r7, #4]
8001ed8: 681b ldr r3, [r3, #0]
8001eda: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001ede: b29b uxth r3, r3
8001ee0: 461a mov r2, r3
8001ee2: 6afb ldr r3, [r7, #44] @ 0x2c
8001ee4: 4413 add r3, r2
8001ee6: 62fb str r3, [r7, #44] @ 0x2c
8001ee8: 6d7b ldr r3, [r7, #84] @ 0x54
8001eea: 781b ldrb r3, [r3, #0]
8001eec: 011a lsls r2, r3, #4
8001eee: 6afb ldr r3, [r7, #44] @ 0x2c
8001ef0: 4413 add r3, r2
8001ef2: f203 4304 addw r3, r3, #1028 @ 0x404
8001ef6: 62bb str r3, [r7, #40] @ 0x28
8001ef8: 6abb ldr r3, [r7, #40] @ 0x28
8001efa: 2200 movs r2, #0
8001efc: 801a strh r2, [r3, #0]
8001efe: e045 b.n 8001f8c <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8001f00: 687b ldr r3, [r7, #4]
8001f02: 681b ldr r3, [r3, #0]
8001f04: 63fb str r3, [r7, #60] @ 0x3c
8001f06: 6d7b ldr r3, [r7, #84] @ 0x54
8001f08: 785b ldrb r3, [r3, #1]
8001f0a: 2b00 cmp r3, #0
8001f0c: d126 bne.n 8001f5c <PCD_EP_ISR_Handler+0x69c>
8001f0e: 687b ldr r3, [r7, #4]
8001f10: 681b ldr r3, [r3, #0]
8001f12: 637b str r3, [r7, #52] @ 0x34
8001f14: 687b ldr r3, [r7, #4]
8001f16: 681b ldr r3, [r3, #0]
8001f18: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001f1c: b29b uxth r3, r3
8001f1e: 461a mov r2, r3
8001f20: 6b7b ldr r3, [r7, #52] @ 0x34
8001f22: 4413 add r3, r2
8001f24: 637b str r3, [r7, #52] @ 0x34
8001f26: 6d7b ldr r3, [r7, #84] @ 0x54
8001f28: 781b ldrb r3, [r3, #0]
8001f2a: 011a lsls r2, r3, #4
8001f2c: 6b7b ldr r3, [r7, #52] @ 0x34
8001f2e: 4413 add r3, r2
8001f30: f203 430c addw r3, r3, #1036 @ 0x40c
8001f34: 633b str r3, [r7, #48] @ 0x30
8001f36: 6b3b ldr r3, [r7, #48] @ 0x30
8001f38: 881b ldrh r3, [r3, #0]
8001f3a: b29b uxth r3, r3
8001f3c: f3c3 0309 ubfx r3, r3, #0, #10
8001f40: b29a uxth r2, r3
8001f42: 6b3b ldr r3, [r7, #48] @ 0x30
8001f44: 801a strh r2, [r3, #0]
8001f46: 6b3b ldr r3, [r7, #48] @ 0x30
8001f48: 881b ldrh r3, [r3, #0]
8001f4a: b29b uxth r3, r3
8001f4c: ea6f 4343 mvn.w r3, r3, lsl #17
8001f50: ea6f 4353 mvn.w r3, r3, lsr #17
8001f54: b29a uxth r2, r3
8001f56: 6b3b ldr r3, [r7, #48] @ 0x30
8001f58: 801a strh r2, [r3, #0]
8001f5a: e017 b.n 8001f8c <PCD_EP_ISR_Handler+0x6cc>
8001f5c: 6d7b ldr r3, [r7, #84] @ 0x54
8001f5e: 785b ldrb r3, [r3, #1]
8001f60: 2b01 cmp r3, #1
8001f62: d113 bne.n 8001f8c <PCD_EP_ISR_Handler+0x6cc>
8001f64: 687b ldr r3, [r7, #4]
8001f66: 681b ldr r3, [r3, #0]
8001f68: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001f6c: b29b uxth r3, r3
8001f6e: 461a mov r2, r3
8001f70: 6bfb ldr r3, [r7, #60] @ 0x3c
8001f72: 4413 add r3, r2
8001f74: 63fb str r3, [r7, #60] @ 0x3c
8001f76: 6d7b ldr r3, [r7, #84] @ 0x54
8001f78: 781b ldrb r3, [r3, #0]
8001f7a: 011a lsls r2, r3, #4
8001f7c: 6bfb ldr r3, [r7, #60] @ 0x3c
8001f7e: 4413 add r3, r2
8001f80: f203 430c addw r3, r3, #1036 @ 0x40c
8001f84: 63bb str r3, [r7, #56] @ 0x38
8001f86: 6bbb ldr r3, [r7, #56] @ 0x38
8001f88: 2200 movs r2, #0
8001f8a: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8001f8c: 6d7b ldr r3, [r7, #84] @ 0x54
8001f8e: 781b ldrb r3, [r3, #0]
8001f90: 4619 mov r1, r3
8001f92: 6878 ldr r0, [r7, #4]
8001f94: f006 f9e7 bl 8008366 <HAL_PCD_DataInStageCallback>
8001f98: e053 b.n 8002042 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
8001f9a: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8001f9e: f403 7380 and.w r3, r3, #256 @ 0x100
8001fa2: 2b00 cmp r3, #0
8001fa4: d146 bne.n 8002034 <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8001fa6: 687b ldr r3, [r7, #4]
8001fa8: 681b ldr r3, [r3, #0]
8001faa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8001fae: b29b uxth r3, r3
8001fb0: 461a mov r2, r3
8001fb2: 6d7b ldr r3, [r7, #84] @ 0x54
8001fb4: 781b ldrb r3, [r3, #0]
8001fb6: 00db lsls r3, r3, #3
8001fb8: 4413 add r3, r2
8001fba: 3302 adds r3, #2
8001fbc: 005b lsls r3, r3, #1
8001fbe: 687a ldr r2, [r7, #4]
8001fc0: 6812 ldr r2, [r2, #0]
8001fc2: 4413 add r3, r2
8001fc4: f503 6380 add.w r3, r3, #1024 @ 0x400
8001fc8: 881b ldrh r3, [r3, #0]
8001fca: f3c3 0309 ubfx r3, r3, #0, #10
8001fce: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8001fd2: 6d7b ldr r3, [r7, #84] @ 0x54
8001fd4: 699a ldr r2, [r3, #24]
8001fd6: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8001fda: 429a cmp r2, r3
8001fdc: d907 bls.n 8001fee <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
8001fde: 6d7b ldr r3, [r7, #84] @ 0x54
8001fe0: 699a ldr r2, [r3, #24]
8001fe2: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8001fe6: 1ad2 subs r2, r2, r3
8001fe8: 6d7b ldr r3, [r7, #84] @ 0x54
8001fea: 619a str r2, [r3, #24]
8001fec: e002 b.n 8001ff4 <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
8001fee: 6d7b ldr r3, [r7, #84] @ 0x54
8001ff0: 2200 movs r2, #0
8001ff2: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8001ff4: 6d7b ldr r3, [r7, #84] @ 0x54
8001ff6: 699b ldr r3, [r3, #24]
8001ff8: 2b00 cmp r3, #0
8001ffa: d106 bne.n 800200a <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8001ffc: 6d7b ldr r3, [r7, #84] @ 0x54
8001ffe: 781b ldrb r3, [r3, #0]
8002000: 4619 mov r1, r3
8002002: 6878 ldr r0, [r7, #4]
8002004: f006 f9af bl 8008366 <HAL_PCD_DataInStageCallback>
8002008: e01b b.n 8002042 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
800200a: 6d7b ldr r3, [r7, #84] @ 0x54
800200c: 695a ldr r2, [r3, #20]
800200e: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8002012: 441a add r2, r3
8002014: 6d7b ldr r3, [r7, #84] @ 0x54
8002016: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8002018: 6d7b ldr r3, [r7, #84] @ 0x54
800201a: 69da ldr r2, [r3, #28]
800201c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8002020: 441a add r2, r3
8002022: 6d7b ldr r3, [r7, #84] @ 0x54
8002024: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8002026: 687b ldr r3, [r7, #4]
8002028: 681b ldr r3, [r3, #0]
800202a: 6d79 ldr r1, [r7, #84] @ 0x54
800202c: 4618 mov r0, r3
800202e: f002 fde7 bl 8004c00 <USB_EPStartXfer>
8002032: e006 b.n 8002042 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8002034: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8002038: 461a mov r2, r3
800203a: 6d79 ldr r1, [r7, #84] @ 0x54
800203c: 6878 ldr r0, [r7, #4]
800203e: f000 f91b bl 8002278 <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8002042: 687b ldr r3, [r7, #4]
8002044: 681b ldr r3, [r3, #0]
8002046: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800204a: b29b uxth r3, r3
800204c: b21b sxth r3, r3
800204e: 2b00 cmp r3, #0
8002050: f6ff ac3b blt.w 80018ca <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8002054: 2300 movs r3, #0
}
8002056: 4618 mov r0, r3
8002058: 3758 adds r7, #88 @ 0x58
800205a: 46bd mov sp, r7
800205c: bd80 pop {r7, pc}
0800205e <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
800205e: b580 push {r7, lr}
8002060: b088 sub sp, #32
8002062: af00 add r7, sp, #0
8002064: 60f8 str r0, [r7, #12]
8002066: 60b9 str r1, [r7, #8]
8002068: 4613 mov r3, r2
800206a: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
800206c: 88fb ldrh r3, [r7, #6]
800206e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002072: 2b00 cmp r3, #0
8002074: d07e beq.n 8002174 <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8002076: 68fb ldr r3, [r7, #12]
8002078: 681b ldr r3, [r3, #0]
800207a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800207e: b29b uxth r3, r3
8002080: 461a mov r2, r3
8002082: 68bb ldr r3, [r7, #8]
8002084: 781b ldrb r3, [r3, #0]
8002086: 00db lsls r3, r3, #3
8002088: 4413 add r3, r2
800208a: 3302 adds r3, #2
800208c: 005b lsls r3, r3, #1
800208e: 68fa ldr r2, [r7, #12]
8002090: 6812 ldr r2, [r2, #0]
8002092: 4413 add r3, r2
8002094: f503 6380 add.w r3, r3, #1024 @ 0x400
8002098: 881b ldrh r3, [r3, #0]
800209a: f3c3 0309 ubfx r3, r3, #0, #10
800209e: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
80020a0: 68bb ldr r3, [r7, #8]
80020a2: 699a ldr r2, [r3, #24]
80020a4: 8b7b ldrh r3, [r7, #26]
80020a6: 429a cmp r2, r3
80020a8: d306 bcc.n 80020b8 <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
80020aa: 68bb ldr r3, [r7, #8]
80020ac: 699a ldr r2, [r3, #24]
80020ae: 8b7b ldrh r3, [r7, #26]
80020b0: 1ad2 subs r2, r2, r3
80020b2: 68bb ldr r3, [r7, #8]
80020b4: 619a str r2, [r3, #24]
80020b6: e002 b.n 80020be <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
80020b8: 68bb ldr r3, [r7, #8]
80020ba: 2200 movs r2, #0
80020bc: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80020be: 68bb ldr r3, [r7, #8]
80020c0: 699b ldr r3, [r3, #24]
80020c2: 2b00 cmp r3, #0
80020c4: d123 bne.n 800210e <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80020c6: 68fb ldr r3, [r7, #12]
80020c8: 681b ldr r3, [r3, #0]
80020ca: 461a mov r2, r3
80020cc: 68bb ldr r3, [r7, #8]
80020ce: 781b ldrb r3, [r3, #0]
80020d0: 009b lsls r3, r3, #2
80020d2: 4413 add r3, r2
80020d4: 881b ldrh r3, [r3, #0]
80020d6: b29b uxth r3, r3
80020d8: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80020dc: f023 0370 bic.w r3, r3, #112 @ 0x70
80020e0: 833b strh r3, [r7, #24]
80020e2: 8b3b ldrh r3, [r7, #24]
80020e4: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80020e8: 833b strh r3, [r7, #24]
80020ea: 68fb ldr r3, [r7, #12]
80020ec: 681b ldr r3, [r3, #0]
80020ee: 461a mov r2, r3
80020f0: 68bb ldr r3, [r7, #8]
80020f2: 781b ldrb r3, [r3, #0]
80020f4: 009b lsls r3, r3, #2
80020f6: 441a add r2, r3
80020f8: 8b3b ldrh r3, [r7, #24]
80020fa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80020fe: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002102: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8002106: f043 0380 orr.w r3, r3, #128 @ 0x80
800210a: b29b uxth r3, r3
800210c: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
800210e: 88fb ldrh r3, [r7, #6]
8002110: f003 0340 and.w r3, r3, #64 @ 0x40
8002114: 2b00 cmp r3, #0
8002116: d01f beq.n 8002158 <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8002118: 68fb ldr r3, [r7, #12]
800211a: 681b ldr r3, [r3, #0]
800211c: 461a mov r2, r3
800211e: 68bb ldr r3, [r7, #8]
8002120: 781b ldrb r3, [r3, #0]
8002122: 009b lsls r3, r3, #2
8002124: 4413 add r3, r2
8002126: 881b ldrh r3, [r3, #0]
8002128: b29b uxth r3, r3
800212a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800212e: f023 0370 bic.w r3, r3, #112 @ 0x70
8002132: 82fb strh r3, [r7, #22]
8002134: 68fb ldr r3, [r7, #12]
8002136: 681b ldr r3, [r3, #0]
8002138: 461a mov r2, r3
800213a: 68bb ldr r3, [r7, #8]
800213c: 781b ldrb r3, [r3, #0]
800213e: 009b lsls r3, r3, #2
8002140: 441a add r2, r3
8002142: 8afb ldrh r3, [r7, #22]
8002144: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002148: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800214c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8002150: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8002154: b29b uxth r3, r3
8002156: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8002158: 8b7b ldrh r3, [r7, #26]
800215a: 2b00 cmp r3, #0
800215c: f000 8087 beq.w 800226e <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8002160: 68fb ldr r3, [r7, #12]
8002162: 6818 ldr r0, [r3, #0]
8002164: 68bb ldr r3, [r7, #8]
8002166: 6959 ldr r1, [r3, #20]
8002168: 68bb ldr r3, [r7, #8]
800216a: 891a ldrh r2, [r3, #8]
800216c: 8b7b ldrh r3, [r7, #26]
800216e: f004 fa7c bl 800666a <USB_ReadPMA>
8002172: e07c b.n 800226e <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8002174: 68fb ldr r3, [r7, #12]
8002176: 681b ldr r3, [r3, #0]
8002178: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800217c: b29b uxth r3, r3
800217e: 461a mov r2, r3
8002180: 68bb ldr r3, [r7, #8]
8002182: 781b ldrb r3, [r3, #0]
8002184: 00db lsls r3, r3, #3
8002186: 4413 add r3, r2
8002188: 3306 adds r3, #6
800218a: 005b lsls r3, r3, #1
800218c: 68fa ldr r2, [r7, #12]
800218e: 6812 ldr r2, [r2, #0]
8002190: 4413 add r3, r2
8002192: f503 6380 add.w r3, r3, #1024 @ 0x400
8002196: 881b ldrh r3, [r3, #0]
8002198: f3c3 0309 ubfx r3, r3, #0, #10
800219c: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
800219e: 68bb ldr r3, [r7, #8]
80021a0: 699a ldr r2, [r3, #24]
80021a2: 8b7b ldrh r3, [r7, #26]
80021a4: 429a cmp r2, r3
80021a6: d306 bcc.n 80021b6 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
80021a8: 68bb ldr r3, [r7, #8]
80021aa: 699a ldr r2, [r3, #24]
80021ac: 8b7b ldrh r3, [r7, #26]
80021ae: 1ad2 subs r2, r2, r3
80021b0: 68bb ldr r3, [r7, #8]
80021b2: 619a str r2, [r3, #24]
80021b4: e002 b.n 80021bc <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
80021b6: 68bb ldr r3, [r7, #8]
80021b8: 2200 movs r2, #0
80021ba: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80021bc: 68bb ldr r3, [r7, #8]
80021be: 699b ldr r3, [r3, #24]
80021c0: 2b00 cmp r3, #0
80021c2: d123 bne.n 800220c <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80021c4: 68fb ldr r3, [r7, #12]
80021c6: 681b ldr r3, [r3, #0]
80021c8: 461a mov r2, r3
80021ca: 68bb ldr r3, [r7, #8]
80021cc: 781b ldrb r3, [r3, #0]
80021ce: 009b lsls r3, r3, #2
80021d0: 4413 add r3, r2
80021d2: 881b ldrh r3, [r3, #0]
80021d4: b29b uxth r3, r3
80021d6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80021da: f023 0370 bic.w r3, r3, #112 @ 0x70
80021de: 83fb strh r3, [r7, #30]
80021e0: 8bfb ldrh r3, [r7, #30]
80021e2: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80021e6: 83fb strh r3, [r7, #30]
80021e8: 68fb ldr r3, [r7, #12]
80021ea: 681b ldr r3, [r3, #0]
80021ec: 461a mov r2, r3
80021ee: 68bb ldr r3, [r7, #8]
80021f0: 781b ldrb r3, [r3, #0]
80021f2: 009b lsls r3, r3, #2
80021f4: 441a add r2, r3
80021f6: 8bfb ldrh r3, [r7, #30]
80021f8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80021fc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002200: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8002204: f043 0380 orr.w r3, r3, #128 @ 0x80
8002208: b29b uxth r3, r3
800220a: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
800220c: 88fb ldrh r3, [r7, #6]
800220e: f003 0340 and.w r3, r3, #64 @ 0x40
8002212: 2b00 cmp r3, #0
8002214: d11f bne.n 8002256 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8002216: 68fb ldr r3, [r7, #12]
8002218: 681b ldr r3, [r3, #0]
800221a: 461a mov r2, r3
800221c: 68bb ldr r3, [r7, #8]
800221e: 781b ldrb r3, [r3, #0]
8002220: 009b lsls r3, r3, #2
8002222: 4413 add r3, r2
8002224: 881b ldrh r3, [r3, #0]
8002226: b29b uxth r3, r3
8002228: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800222c: f023 0370 bic.w r3, r3, #112 @ 0x70
8002230: 83bb strh r3, [r7, #28]
8002232: 68fb ldr r3, [r7, #12]
8002234: 681b ldr r3, [r3, #0]
8002236: 461a mov r2, r3
8002238: 68bb ldr r3, [r7, #8]
800223a: 781b ldrb r3, [r3, #0]
800223c: 009b lsls r3, r3, #2
800223e: 441a add r2, r3
8002240: 8bbb ldrh r3, [r7, #28]
8002242: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002246: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800224a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800224e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8002252: b29b uxth r3, r3
8002254: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8002256: 8b7b ldrh r3, [r7, #26]
8002258: 2b00 cmp r3, #0
800225a: d008 beq.n 800226e <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
800225c: 68fb ldr r3, [r7, #12]
800225e: 6818 ldr r0, [r3, #0]
8002260: 68bb ldr r3, [r7, #8]
8002262: 6959 ldr r1, [r3, #20]
8002264: 68bb ldr r3, [r7, #8]
8002266: 895a ldrh r2, [r3, #10]
8002268: 8b7b ldrh r3, [r7, #26]
800226a: f004 f9fe bl 800666a <USB_ReadPMA>
}
}
return count;
800226e: 8b7b ldrh r3, [r7, #26]
}
8002270: 4618 mov r0, r3
8002272: 3720 adds r7, #32
8002274: 46bd mov sp, r7
8002276: bd80 pop {r7, pc}
08002278 <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8002278: b580 push {r7, lr}
800227a: b0a4 sub sp, #144 @ 0x90
800227c: af00 add r7, sp, #0
800227e: 60f8 str r0, [r7, #12]
8002280: 60b9 str r1, [r7, #8]
8002282: 4613 mov r3, r2
8002284: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8002286: 88fb ldrh r3, [r7, #6]
8002288: f003 0340 and.w r3, r3, #64 @ 0x40
800228c: 2b00 cmp r3, #0
800228e: f000 81dd beq.w 800264c <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8002292: 68fb ldr r3, [r7, #12]
8002294: 681b ldr r3, [r3, #0]
8002296: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800229a: b29b uxth r3, r3
800229c: 461a mov r2, r3
800229e: 68bb ldr r3, [r7, #8]
80022a0: 781b ldrb r3, [r3, #0]
80022a2: 00db lsls r3, r3, #3
80022a4: 4413 add r3, r2
80022a6: 3302 adds r3, #2
80022a8: 005b lsls r3, r3, #1
80022aa: 68fa ldr r2, [r7, #12]
80022ac: 6812 ldr r2, [r2, #0]
80022ae: 4413 add r3, r2
80022b0: f503 6380 add.w r3, r3, #1024 @ 0x400
80022b4: 881b ldrh r3, [r3, #0]
80022b6: f3c3 0309 ubfx r3, r3, #0, #10
80022ba: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
80022be: 68bb ldr r3, [r7, #8]
80022c0: 699a ldr r2, [r3, #24]
80022c2: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80022c6: 429a cmp r2, r3
80022c8: d907 bls.n 80022da <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
80022ca: 68bb ldr r3, [r7, #8]
80022cc: 699a ldr r2, [r3, #24]
80022ce: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80022d2: 1ad2 subs r2, r2, r3
80022d4: 68bb ldr r3, [r7, #8]
80022d6: 619a str r2, [r3, #24]
80022d8: e002 b.n 80022e0 <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
80022da: 68bb ldr r3, [r7, #8]
80022dc: 2200 movs r2, #0
80022de: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
80022e0: 68bb ldr r3, [r7, #8]
80022e2: 699b ldr r3, [r3, #24]
80022e4: 2b00 cmp r3, #0
80022e6: f040 80b9 bne.w 800245c <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80022ea: 68bb ldr r3, [r7, #8]
80022ec: 785b ldrb r3, [r3, #1]
80022ee: 2b00 cmp r3, #0
80022f0: d126 bne.n 8002340 <HAL_PCD_EP_DB_Transmit+0xc8>
80022f2: 68fb ldr r3, [r7, #12]
80022f4: 681b ldr r3, [r3, #0]
80022f6: 62fb str r3, [r7, #44] @ 0x2c
80022f8: 68fb ldr r3, [r7, #12]
80022fa: 681b ldr r3, [r3, #0]
80022fc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002300: b29b uxth r3, r3
8002302: 461a mov r2, r3
8002304: 6afb ldr r3, [r7, #44] @ 0x2c
8002306: 4413 add r3, r2
8002308: 62fb str r3, [r7, #44] @ 0x2c
800230a: 68bb ldr r3, [r7, #8]
800230c: 781b ldrb r3, [r3, #0]
800230e: 011a lsls r2, r3, #4
8002310: 6afb ldr r3, [r7, #44] @ 0x2c
8002312: 4413 add r3, r2
8002314: f203 4304 addw r3, r3, #1028 @ 0x404
8002318: 62bb str r3, [r7, #40] @ 0x28
800231a: 6abb ldr r3, [r7, #40] @ 0x28
800231c: 881b ldrh r3, [r3, #0]
800231e: b29b uxth r3, r3
8002320: f3c3 0309 ubfx r3, r3, #0, #10
8002324: b29a uxth r2, r3
8002326: 6abb ldr r3, [r7, #40] @ 0x28
8002328: 801a strh r2, [r3, #0]
800232a: 6abb ldr r3, [r7, #40] @ 0x28
800232c: 881b ldrh r3, [r3, #0]
800232e: b29b uxth r3, r3
8002330: ea6f 4343 mvn.w r3, r3, lsl #17
8002334: ea6f 4353 mvn.w r3, r3, lsr #17
8002338: b29a uxth r2, r3
800233a: 6abb ldr r3, [r7, #40] @ 0x28
800233c: 801a strh r2, [r3, #0]
800233e: e01a b.n 8002376 <HAL_PCD_EP_DB_Transmit+0xfe>
8002340: 68bb ldr r3, [r7, #8]
8002342: 785b ldrb r3, [r3, #1]
8002344: 2b01 cmp r3, #1
8002346: d116 bne.n 8002376 <HAL_PCD_EP_DB_Transmit+0xfe>
8002348: 68fb ldr r3, [r7, #12]
800234a: 681b ldr r3, [r3, #0]
800234c: 637b str r3, [r7, #52] @ 0x34
800234e: 68fb ldr r3, [r7, #12]
8002350: 681b ldr r3, [r3, #0]
8002352: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002356: b29b uxth r3, r3
8002358: 461a mov r2, r3
800235a: 6b7b ldr r3, [r7, #52] @ 0x34
800235c: 4413 add r3, r2
800235e: 637b str r3, [r7, #52] @ 0x34
8002360: 68bb ldr r3, [r7, #8]
8002362: 781b ldrb r3, [r3, #0]
8002364: 011a lsls r2, r3, #4
8002366: 6b7b ldr r3, [r7, #52] @ 0x34
8002368: 4413 add r3, r2
800236a: f203 4304 addw r3, r3, #1028 @ 0x404
800236e: 633b str r3, [r7, #48] @ 0x30
8002370: 6b3b ldr r3, [r7, #48] @ 0x30
8002372: 2200 movs r2, #0
8002374: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002376: 68fb ldr r3, [r7, #12]
8002378: 681b ldr r3, [r3, #0]
800237a: 627b str r3, [r7, #36] @ 0x24
800237c: 68bb ldr r3, [r7, #8]
800237e: 785b ldrb r3, [r3, #1]
8002380: 2b00 cmp r3, #0
8002382: d126 bne.n 80023d2 <HAL_PCD_EP_DB_Transmit+0x15a>
8002384: 68fb ldr r3, [r7, #12]
8002386: 681b ldr r3, [r3, #0]
8002388: 61fb str r3, [r7, #28]
800238a: 68fb ldr r3, [r7, #12]
800238c: 681b ldr r3, [r3, #0]
800238e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002392: b29b uxth r3, r3
8002394: 461a mov r2, r3
8002396: 69fb ldr r3, [r7, #28]
8002398: 4413 add r3, r2
800239a: 61fb str r3, [r7, #28]
800239c: 68bb ldr r3, [r7, #8]
800239e: 781b ldrb r3, [r3, #0]
80023a0: 011a lsls r2, r3, #4
80023a2: 69fb ldr r3, [r7, #28]
80023a4: 4413 add r3, r2
80023a6: f203 430c addw r3, r3, #1036 @ 0x40c
80023aa: 61bb str r3, [r7, #24]
80023ac: 69bb ldr r3, [r7, #24]
80023ae: 881b ldrh r3, [r3, #0]
80023b0: b29b uxth r3, r3
80023b2: f3c3 0309 ubfx r3, r3, #0, #10
80023b6: b29a uxth r2, r3
80023b8: 69bb ldr r3, [r7, #24]
80023ba: 801a strh r2, [r3, #0]
80023bc: 69bb ldr r3, [r7, #24]
80023be: 881b ldrh r3, [r3, #0]
80023c0: b29b uxth r3, r3
80023c2: ea6f 4343 mvn.w r3, r3, lsl #17
80023c6: ea6f 4353 mvn.w r3, r3, lsr #17
80023ca: b29a uxth r2, r3
80023cc: 69bb ldr r3, [r7, #24]
80023ce: 801a strh r2, [r3, #0]
80023d0: e017 b.n 8002402 <HAL_PCD_EP_DB_Transmit+0x18a>
80023d2: 68bb ldr r3, [r7, #8]
80023d4: 785b ldrb r3, [r3, #1]
80023d6: 2b01 cmp r3, #1
80023d8: d113 bne.n 8002402 <HAL_PCD_EP_DB_Transmit+0x18a>
80023da: 68fb ldr r3, [r7, #12]
80023dc: 681b ldr r3, [r3, #0]
80023de: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80023e2: b29b uxth r3, r3
80023e4: 461a mov r2, r3
80023e6: 6a7b ldr r3, [r7, #36] @ 0x24
80023e8: 4413 add r3, r2
80023ea: 627b str r3, [r7, #36] @ 0x24
80023ec: 68bb ldr r3, [r7, #8]
80023ee: 781b ldrb r3, [r3, #0]
80023f0: 011a lsls r2, r3, #4
80023f2: 6a7b ldr r3, [r7, #36] @ 0x24
80023f4: 4413 add r3, r2
80023f6: f203 430c addw r3, r3, #1036 @ 0x40c
80023fa: 623b str r3, [r7, #32]
80023fc: 6a3b ldr r3, [r7, #32]
80023fe: 2200 movs r2, #0
8002400: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8002402: 68bb ldr r3, [r7, #8]
8002404: 781b ldrb r3, [r3, #0]
8002406: 4619 mov r1, r3
8002408: 68f8 ldr r0, [r7, #12]
800240a: f005 ffac bl 8008366 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
800240e: 88fb ldrh r3, [r7, #6]
8002410: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002414: 2b00 cmp r3, #0
8002416: f000 82fc beq.w 8002a12 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
800241a: 68fb ldr r3, [r7, #12]
800241c: 681b ldr r3, [r3, #0]
800241e: 461a mov r2, r3
8002420: 68bb ldr r3, [r7, #8]
8002422: 781b ldrb r3, [r3, #0]
8002424: 009b lsls r3, r3, #2
8002426: 4413 add r3, r2
8002428: 881b ldrh r3, [r3, #0]
800242a: b29b uxth r3, r3
800242c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002430: f023 0370 bic.w r3, r3, #112 @ 0x70
8002434: 82fb strh r3, [r7, #22]
8002436: 68fb ldr r3, [r7, #12]
8002438: 681b ldr r3, [r3, #0]
800243a: 461a mov r2, r3
800243c: 68bb ldr r3, [r7, #8]
800243e: 781b ldrb r3, [r3, #0]
8002440: 009b lsls r3, r3, #2
8002442: 441a add r2, r3
8002444: 8afb ldrh r3, [r7, #22]
8002446: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800244a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800244e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8002452: f043 0380 orr.w r3, r3, #128 @ 0x80
8002456: b29b uxth r3, r3
8002458: 8013 strh r3, [r2, #0]
800245a: e2da b.n 8002a12 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
800245c: 88fb ldrh r3, [r7, #6]
800245e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8002462: 2b00 cmp r3, #0
8002464: d021 beq.n 80024aa <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8002466: 68fb ldr r3, [r7, #12]
8002468: 681b ldr r3, [r3, #0]
800246a: 461a mov r2, r3
800246c: 68bb ldr r3, [r7, #8]
800246e: 781b ldrb r3, [r3, #0]
8002470: 009b lsls r3, r3, #2
8002472: 4413 add r3, r2
8002474: 881b ldrh r3, [r3, #0]
8002476: b29b uxth r3, r3
8002478: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800247c: f023 0370 bic.w r3, r3, #112 @ 0x70
8002480: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8002484: 68fb ldr r3, [r7, #12]
8002486: 681b ldr r3, [r3, #0]
8002488: 461a mov r2, r3
800248a: 68bb ldr r3, [r7, #8]
800248c: 781b ldrb r3, [r3, #0]
800248e: 009b lsls r3, r3, #2
8002490: 441a add r2, r3
8002492: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8002496: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800249a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800249e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80024a2: f043 0380 orr.w r3, r3, #128 @ 0x80
80024a6: b29b uxth r3, r3
80024a8: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
80024aa: 68bb ldr r3, [r7, #8]
80024ac: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
80024b0: 2b01 cmp r3, #1
80024b2: f040 82ae bne.w 8002a12 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
80024b6: 68bb ldr r3, [r7, #8]
80024b8: 695a ldr r2, [r3, #20]
80024ba: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80024be: 441a add r2, r3
80024c0: 68bb ldr r3, [r7, #8]
80024c2: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
80024c4: 68bb ldr r3, [r7, #8]
80024c6: 69da ldr r2, [r3, #28]
80024c8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80024cc: 441a add r2, r3
80024ce: 68bb ldr r3, [r7, #8]
80024d0: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
80024d2: 68bb ldr r3, [r7, #8]
80024d4: 6a1a ldr r2, [r3, #32]
80024d6: 68bb ldr r3, [r7, #8]
80024d8: 691b ldr r3, [r3, #16]
80024da: 429a cmp r2, r3
80024dc: d30b bcc.n 80024f6 <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
80024de: 68bb ldr r3, [r7, #8]
80024e0: 691b ldr r3, [r3, #16]
80024e2: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
80024e6: 68bb ldr r3, [r7, #8]
80024e8: 6a1a ldr r2, [r3, #32]
80024ea: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80024ee: 1ad2 subs r2, r2, r3
80024f0: 68bb ldr r3, [r7, #8]
80024f2: 621a str r2, [r3, #32]
80024f4: e017 b.n 8002526 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
80024f6: 68bb ldr r3, [r7, #8]
80024f8: 6a1b ldr r3, [r3, #32]
80024fa: 2b00 cmp r3, #0
80024fc: d108 bne.n 8002510 <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
80024fe: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002502: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8002506: 68bb ldr r3, [r7, #8]
8002508: 2200 movs r2, #0
800250a: f883 2024 strb.w r2, [r3, #36] @ 0x24
800250e: e00a b.n 8002526 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8002510: 68bb ldr r3, [r7, #8]
8002512: 2200 movs r2, #0
8002514: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8002518: 68bb ldr r3, [r7, #8]
800251a: 6a1b ldr r3, [r3, #32]
800251c: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8002520: 68bb ldr r3, [r7, #8]
8002522: 2200 movs r2, #0
8002524: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8002526: 68bb ldr r3, [r7, #8]
8002528: 785b ldrb r3, [r3, #1]
800252a: 2b00 cmp r3, #0
800252c: d165 bne.n 80025fa <HAL_PCD_EP_DB_Transmit+0x382>
800252e: 68fb ldr r3, [r7, #12]
8002530: 681b ldr r3, [r3, #0]
8002532: 63fb str r3, [r7, #60] @ 0x3c
8002534: 68fb ldr r3, [r7, #12]
8002536: 681b ldr r3, [r3, #0]
8002538: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800253c: b29b uxth r3, r3
800253e: 461a mov r2, r3
8002540: 6bfb ldr r3, [r7, #60] @ 0x3c
8002542: 4413 add r3, r2
8002544: 63fb str r3, [r7, #60] @ 0x3c
8002546: 68bb ldr r3, [r7, #8]
8002548: 781b ldrb r3, [r3, #0]
800254a: 011a lsls r2, r3, #4
800254c: 6bfb ldr r3, [r7, #60] @ 0x3c
800254e: 4413 add r3, r2
8002550: f203 4304 addw r3, r3, #1028 @ 0x404
8002554: 63bb str r3, [r7, #56] @ 0x38
8002556: 6bbb ldr r3, [r7, #56] @ 0x38
8002558: 881b ldrh r3, [r3, #0]
800255a: b29b uxth r3, r3
800255c: f3c3 0309 ubfx r3, r3, #0, #10
8002560: b29a uxth r2, r3
8002562: 6bbb ldr r3, [r7, #56] @ 0x38
8002564: 801a strh r2, [r3, #0]
8002566: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800256a: 2b3e cmp r3, #62 @ 0x3e
800256c: d91d bls.n 80025aa <HAL_PCD_EP_DB_Transmit+0x332>
800256e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002572: 095b lsrs r3, r3, #5
8002574: 64bb str r3, [r7, #72] @ 0x48
8002576: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800257a: f003 031f and.w r3, r3, #31
800257e: 2b00 cmp r3, #0
8002580: d102 bne.n 8002588 <HAL_PCD_EP_DB_Transmit+0x310>
8002582: 6cbb ldr r3, [r7, #72] @ 0x48
8002584: 3b01 subs r3, #1
8002586: 64bb str r3, [r7, #72] @ 0x48
8002588: 6bbb ldr r3, [r7, #56] @ 0x38
800258a: 881b ldrh r3, [r3, #0]
800258c: b29a uxth r2, r3
800258e: 6cbb ldr r3, [r7, #72] @ 0x48
8002590: b29b uxth r3, r3
8002592: 029b lsls r3, r3, #10
8002594: b29b uxth r3, r3
8002596: 4313 orrs r3, r2
8002598: b29b uxth r3, r3
800259a: ea6f 4343 mvn.w r3, r3, lsl #17
800259e: ea6f 4353 mvn.w r3, r3, lsr #17
80025a2: b29a uxth r2, r3
80025a4: 6bbb ldr r3, [r7, #56] @ 0x38
80025a6: 801a strh r2, [r3, #0]
80025a8: e044 b.n 8002634 <HAL_PCD_EP_DB_Transmit+0x3bc>
80025aa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80025ae: 2b00 cmp r3, #0
80025b0: d10a bne.n 80025c8 <HAL_PCD_EP_DB_Transmit+0x350>
80025b2: 6bbb ldr r3, [r7, #56] @ 0x38
80025b4: 881b ldrh r3, [r3, #0]
80025b6: b29b uxth r3, r3
80025b8: ea6f 4343 mvn.w r3, r3, lsl #17
80025bc: ea6f 4353 mvn.w r3, r3, lsr #17
80025c0: b29a uxth r2, r3
80025c2: 6bbb ldr r3, [r7, #56] @ 0x38
80025c4: 801a strh r2, [r3, #0]
80025c6: e035 b.n 8002634 <HAL_PCD_EP_DB_Transmit+0x3bc>
80025c8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80025cc: 085b lsrs r3, r3, #1
80025ce: 64bb str r3, [r7, #72] @ 0x48
80025d0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80025d4: f003 0301 and.w r3, r3, #1
80025d8: 2b00 cmp r3, #0
80025da: d002 beq.n 80025e2 <HAL_PCD_EP_DB_Transmit+0x36a>
80025dc: 6cbb ldr r3, [r7, #72] @ 0x48
80025de: 3301 adds r3, #1
80025e0: 64bb str r3, [r7, #72] @ 0x48
80025e2: 6bbb ldr r3, [r7, #56] @ 0x38
80025e4: 881b ldrh r3, [r3, #0]
80025e6: b29a uxth r2, r3
80025e8: 6cbb ldr r3, [r7, #72] @ 0x48
80025ea: b29b uxth r3, r3
80025ec: 029b lsls r3, r3, #10
80025ee: b29b uxth r3, r3
80025f0: 4313 orrs r3, r2
80025f2: b29a uxth r2, r3
80025f4: 6bbb ldr r3, [r7, #56] @ 0x38
80025f6: 801a strh r2, [r3, #0]
80025f8: e01c b.n 8002634 <HAL_PCD_EP_DB_Transmit+0x3bc>
80025fa: 68bb ldr r3, [r7, #8]
80025fc: 785b ldrb r3, [r3, #1]
80025fe: 2b01 cmp r3, #1
8002600: d118 bne.n 8002634 <HAL_PCD_EP_DB_Transmit+0x3bc>
8002602: 68fb ldr r3, [r7, #12]
8002604: 681b ldr r3, [r3, #0]
8002606: 647b str r3, [r7, #68] @ 0x44
8002608: 68fb ldr r3, [r7, #12]
800260a: 681b ldr r3, [r3, #0]
800260c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002610: b29b uxth r3, r3
8002612: 461a mov r2, r3
8002614: 6c7b ldr r3, [r7, #68] @ 0x44
8002616: 4413 add r3, r2
8002618: 647b str r3, [r7, #68] @ 0x44
800261a: 68bb ldr r3, [r7, #8]
800261c: 781b ldrb r3, [r3, #0]
800261e: 011a lsls r2, r3, #4
8002620: 6c7b ldr r3, [r7, #68] @ 0x44
8002622: 4413 add r3, r2
8002624: f203 4304 addw r3, r3, #1028 @ 0x404
8002628: 643b str r3, [r7, #64] @ 0x40
800262a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800262e: b29a uxth r2, r3
8002630: 6c3b ldr r3, [r7, #64] @ 0x40
8002632: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8002634: 68fb ldr r3, [r7, #12]
8002636: 6818 ldr r0, [r3, #0]
8002638: 68bb ldr r3, [r7, #8]
800263a: 6959 ldr r1, [r3, #20]
800263c: 68bb ldr r3, [r7, #8]
800263e: 891a ldrh r2, [r3, #8]
8002640: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002644: b29b uxth r3, r3
8002646: f003 ffca bl 80065de <USB_WritePMA>
800264a: e1e2 b.n 8002a12 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800264c: 68fb ldr r3, [r7, #12]
800264e: 681b ldr r3, [r3, #0]
8002650: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002654: b29b uxth r3, r3
8002656: 461a mov r2, r3
8002658: 68bb ldr r3, [r7, #8]
800265a: 781b ldrb r3, [r3, #0]
800265c: 00db lsls r3, r3, #3
800265e: 4413 add r3, r2
8002660: 3306 adds r3, #6
8002662: 005b lsls r3, r3, #1
8002664: 68fa ldr r2, [r7, #12]
8002666: 6812 ldr r2, [r2, #0]
8002668: 4413 add r3, r2
800266a: f503 6380 add.w r3, r3, #1024 @ 0x400
800266e: 881b ldrh r3, [r3, #0]
8002670: f3c3 0309 ubfx r3, r3, #0, #10
8002674: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
8002678: 68bb ldr r3, [r7, #8]
800267a: 699a ldr r2, [r3, #24]
800267c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002680: 429a cmp r2, r3
8002682: d307 bcc.n 8002694 <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
8002684: 68bb ldr r3, [r7, #8]
8002686: 699a ldr r2, [r3, #24]
8002688: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800268c: 1ad2 subs r2, r2, r3
800268e: 68bb ldr r3, [r7, #8]
8002690: 619a str r2, [r3, #24]
8002692: e002 b.n 800269a <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
8002694: 68bb ldr r3, [r7, #8]
8002696: 2200 movs r2, #0
8002698: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
800269a: 68bb ldr r3, [r7, #8]
800269c: 699b ldr r3, [r3, #24]
800269e: 2b00 cmp r3, #0
80026a0: f040 80c0 bne.w 8002824 <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80026a4: 68bb ldr r3, [r7, #8]
80026a6: 785b ldrb r3, [r3, #1]
80026a8: 2b00 cmp r3, #0
80026aa: d126 bne.n 80026fa <HAL_PCD_EP_DB_Transmit+0x482>
80026ac: 68fb ldr r3, [r7, #12]
80026ae: 681b ldr r3, [r3, #0]
80026b0: 67fb str r3, [r7, #124] @ 0x7c
80026b2: 68fb ldr r3, [r7, #12]
80026b4: 681b ldr r3, [r3, #0]
80026b6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80026ba: b29b uxth r3, r3
80026bc: 461a mov r2, r3
80026be: 6ffb ldr r3, [r7, #124] @ 0x7c
80026c0: 4413 add r3, r2
80026c2: 67fb str r3, [r7, #124] @ 0x7c
80026c4: 68bb ldr r3, [r7, #8]
80026c6: 781b ldrb r3, [r3, #0]
80026c8: 011a lsls r2, r3, #4
80026ca: 6ffb ldr r3, [r7, #124] @ 0x7c
80026cc: 4413 add r3, r2
80026ce: f203 4304 addw r3, r3, #1028 @ 0x404
80026d2: 67bb str r3, [r7, #120] @ 0x78
80026d4: 6fbb ldr r3, [r7, #120] @ 0x78
80026d6: 881b ldrh r3, [r3, #0]
80026d8: b29b uxth r3, r3
80026da: f3c3 0309 ubfx r3, r3, #0, #10
80026de: b29a uxth r2, r3
80026e0: 6fbb ldr r3, [r7, #120] @ 0x78
80026e2: 801a strh r2, [r3, #0]
80026e4: 6fbb ldr r3, [r7, #120] @ 0x78
80026e6: 881b ldrh r3, [r3, #0]
80026e8: b29b uxth r3, r3
80026ea: ea6f 4343 mvn.w r3, r3, lsl #17
80026ee: ea6f 4353 mvn.w r3, r3, lsr #17
80026f2: b29a uxth r2, r3
80026f4: 6fbb ldr r3, [r7, #120] @ 0x78
80026f6: 801a strh r2, [r3, #0]
80026f8: e01a b.n 8002730 <HAL_PCD_EP_DB_Transmit+0x4b8>
80026fa: 68bb ldr r3, [r7, #8]
80026fc: 785b ldrb r3, [r3, #1]
80026fe: 2b01 cmp r3, #1
8002700: d116 bne.n 8002730 <HAL_PCD_EP_DB_Transmit+0x4b8>
8002702: 68fb ldr r3, [r7, #12]
8002704: 681b ldr r3, [r3, #0]
8002706: 667b str r3, [r7, #100] @ 0x64
8002708: 68fb ldr r3, [r7, #12]
800270a: 681b ldr r3, [r3, #0]
800270c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8002710: b29b uxth r3, r3
8002712: 461a mov r2, r3
8002714: 6e7b ldr r3, [r7, #100] @ 0x64
8002716: 4413 add r3, r2
8002718: 667b str r3, [r7, #100] @ 0x64
800271a: 68bb ldr r3, [r7, #8]
800271c: 781b ldrb r3, [r3, #0]
800271e: 011a lsls r2, r3, #4
8002720: 6e7b ldr r3, [r7, #100] @ 0x64
8002722: 4413 add r3, r2
8002724: f203 4304 addw r3, r3, #1028 @ 0x404
8002728: 663b str r3, [r7, #96] @ 0x60
800272a: 6e3b ldr r3, [r7, #96] @ 0x60
800272c: 2200 movs r2, #0
800272e: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8002730: 68fb ldr r3, [r7, #12]
8002732: 681b ldr r3, [r3, #0]
8002734: 677b str r3, [r7, #116] @ 0x74
8002736: 68bb ldr r3, [r7, #8]
8002738: 785b ldrb r3, [r3, #1]
800273a: 2b00 cmp r3, #0
800273c: d12b bne.n 8002796 <HAL_PCD_EP_DB_Transmit+0x51e>
800273e: 68fb ldr r3, [r7, #12]
8002740: 681b ldr r3, [r3, #0]
8002742: 66fb str r3, [r7, #108] @ 0x6c
8002744: 68fb ldr r3, [r7, #12]
8002746: 681b ldr r3, [r3, #0]
8002748: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800274c: b29b uxth r3, r3
800274e: 461a mov r2, r3
8002750: 6efb ldr r3, [r7, #108] @ 0x6c
8002752: 4413 add r3, r2
8002754: 66fb str r3, [r7, #108] @ 0x6c
8002756: 68bb ldr r3, [r7, #8]
8002758: 781b ldrb r3, [r3, #0]
800275a: 011a lsls r2, r3, #4
800275c: 6efb ldr r3, [r7, #108] @ 0x6c
800275e: 4413 add r3, r2
8002760: f203 430c addw r3, r3, #1036 @ 0x40c
8002764: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8002768: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800276c: 881b ldrh r3, [r3, #0]
800276e: b29b uxth r3, r3
8002770: f3c3 0309 ubfx r3, r3, #0, #10
8002774: b29a uxth r2, r3
8002776: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800277a: 801a strh r2, [r3, #0]
800277c: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002780: 881b ldrh r3, [r3, #0]
8002782: b29b uxth r3, r3
8002784: ea6f 4343 mvn.w r3, r3, lsl #17
8002788: ea6f 4353 mvn.w r3, r3, lsr #17
800278c: b29a uxth r2, r3
800278e: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8002792: 801a strh r2, [r3, #0]
8002794: e017 b.n 80027c6 <HAL_PCD_EP_DB_Transmit+0x54e>
8002796: 68bb ldr r3, [r7, #8]
8002798: 785b ldrb r3, [r3, #1]
800279a: 2b01 cmp r3, #1
800279c: d113 bne.n 80027c6 <HAL_PCD_EP_DB_Transmit+0x54e>
800279e: 68fb ldr r3, [r7, #12]
80027a0: 681b ldr r3, [r3, #0]
80027a2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80027a6: b29b uxth r3, r3
80027a8: 461a mov r2, r3
80027aa: 6f7b ldr r3, [r7, #116] @ 0x74
80027ac: 4413 add r3, r2
80027ae: 677b str r3, [r7, #116] @ 0x74
80027b0: 68bb ldr r3, [r7, #8]
80027b2: 781b ldrb r3, [r3, #0]
80027b4: 011a lsls r2, r3, #4
80027b6: 6f7b ldr r3, [r7, #116] @ 0x74
80027b8: 4413 add r3, r2
80027ba: f203 430c addw r3, r3, #1036 @ 0x40c
80027be: 673b str r3, [r7, #112] @ 0x70
80027c0: 6f3b ldr r3, [r7, #112] @ 0x70
80027c2: 2200 movs r2, #0
80027c4: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80027c6: 68bb ldr r3, [r7, #8]
80027c8: 781b ldrb r3, [r3, #0]
80027ca: 4619 mov r1, r3
80027cc: 68f8 ldr r0, [r7, #12]
80027ce: f005 fdca bl 8008366 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
80027d2: 88fb ldrh r3, [r7, #6]
80027d4: f403 4380 and.w r3, r3, #16384 @ 0x4000
80027d8: 2b00 cmp r3, #0
80027da: f040 811a bne.w 8002a12 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
80027de: 68fb ldr r3, [r7, #12]
80027e0: 681b ldr r3, [r3, #0]
80027e2: 461a mov r2, r3
80027e4: 68bb ldr r3, [r7, #8]
80027e6: 781b ldrb r3, [r3, #0]
80027e8: 009b lsls r3, r3, #2
80027ea: 4413 add r3, r2
80027ec: 881b ldrh r3, [r3, #0]
80027ee: b29b uxth r3, r3
80027f0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80027f4: f023 0370 bic.w r3, r3, #112 @ 0x70
80027f8: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
80027fc: 68fb ldr r3, [r7, #12]
80027fe: 681b ldr r3, [r3, #0]
8002800: 461a mov r2, r3
8002802: 68bb ldr r3, [r7, #8]
8002804: 781b ldrb r3, [r3, #0]
8002806: 009b lsls r3, r3, #2
8002808: 441a add r2, r3
800280a: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
800280e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002812: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002816: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800281a: f043 0380 orr.w r3, r3, #128 @ 0x80
800281e: b29b uxth r3, r3
8002820: 8013 strh r3, [r2, #0]
8002822: e0f6 b.n 8002a12 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8002824: 88fb ldrh r3, [r7, #6]
8002826: f403 4380 and.w r3, r3, #16384 @ 0x4000
800282a: 2b00 cmp r3, #0
800282c: d121 bne.n 8002872 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
800282e: 68fb ldr r3, [r7, #12]
8002830: 681b ldr r3, [r3, #0]
8002832: 461a mov r2, r3
8002834: 68bb ldr r3, [r7, #8]
8002836: 781b ldrb r3, [r3, #0]
8002838: 009b lsls r3, r3, #2
800283a: 4413 add r3, r2
800283c: 881b ldrh r3, [r3, #0]
800283e: b29b uxth r3, r3
8002840: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002844: f023 0370 bic.w r3, r3, #112 @ 0x70
8002848: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
800284c: 68fb ldr r3, [r7, #12]
800284e: 681b ldr r3, [r3, #0]
8002850: 461a mov r2, r3
8002852: 68bb ldr r3, [r7, #8]
8002854: 781b ldrb r3, [r3, #0]
8002856: 009b lsls r3, r3, #2
8002858: 441a add r2, r3
800285a: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800285e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002862: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002866: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800286a: f043 0380 orr.w r3, r3, #128 @ 0x80
800286e: b29b uxth r3, r3
8002870: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8002872: 68bb ldr r3, [r7, #8]
8002874: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8002878: 2b01 cmp r3, #1
800287a: f040 80ca bne.w 8002a12 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
800287e: 68bb ldr r3, [r7, #8]
8002880: 695a ldr r2, [r3, #20]
8002882: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002886: 441a add r2, r3
8002888: 68bb ldr r3, [r7, #8]
800288a: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
800288c: 68bb ldr r3, [r7, #8]
800288e: 69da ldr r2, [r3, #28]
8002890: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8002894: 441a add r2, r3
8002896: 68bb ldr r3, [r7, #8]
8002898: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
800289a: 68bb ldr r3, [r7, #8]
800289c: 6a1a ldr r2, [r3, #32]
800289e: 68bb ldr r3, [r7, #8]
80028a0: 691b ldr r3, [r3, #16]
80028a2: 429a cmp r2, r3
80028a4: d30b bcc.n 80028be <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
80028a6: 68bb ldr r3, [r7, #8]
80028a8: 691b ldr r3, [r3, #16]
80028aa: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
80028ae: 68bb ldr r3, [r7, #8]
80028b0: 6a1a ldr r2, [r3, #32]
80028b2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80028b6: 1ad2 subs r2, r2, r3
80028b8: 68bb ldr r3, [r7, #8]
80028ba: 621a str r2, [r3, #32]
80028bc: e017 b.n 80028ee <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
80028be: 68bb ldr r3, [r7, #8]
80028c0: 6a1b ldr r3, [r3, #32]
80028c2: 2b00 cmp r3, #0
80028c4: d108 bne.n 80028d8 <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
80028c6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80028ca: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
80028ce: 68bb ldr r3, [r7, #8]
80028d0: 2200 movs r2, #0
80028d2: f883 2024 strb.w r2, [r3, #36] @ 0x24
80028d6: e00a b.n 80028ee <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
80028d8: 68bb ldr r3, [r7, #8]
80028da: 6a1b ldr r3, [r3, #32]
80028dc: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
80028e0: 68bb ldr r3, [r7, #8]
80028e2: 2200 movs r2, #0
80028e4: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
80028e6: 68bb ldr r3, [r7, #8]
80028e8: 2200 movs r2, #0
80028ea: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
80028ee: 68fb ldr r3, [r7, #12]
80028f0: 681b ldr r3, [r3, #0]
80028f2: 657b str r3, [r7, #84] @ 0x54
80028f4: 68bb ldr r3, [r7, #8]
80028f6: 785b ldrb r3, [r3, #1]
80028f8: 2b00 cmp r3, #0
80028fa: d165 bne.n 80029c8 <HAL_PCD_EP_DB_Transmit+0x750>
80028fc: 68fb ldr r3, [r7, #12]
80028fe: 681b ldr r3, [r3, #0]
8002900: 65fb str r3, [r7, #92] @ 0x5c
8002902: 68fb ldr r3, [r7, #12]
8002904: 681b ldr r3, [r3, #0]
8002906: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800290a: b29b uxth r3, r3
800290c: 461a mov r2, r3
800290e: 6dfb ldr r3, [r7, #92] @ 0x5c
8002910: 4413 add r3, r2
8002912: 65fb str r3, [r7, #92] @ 0x5c
8002914: 68bb ldr r3, [r7, #8]
8002916: 781b ldrb r3, [r3, #0]
8002918: 011a lsls r2, r3, #4
800291a: 6dfb ldr r3, [r7, #92] @ 0x5c
800291c: 4413 add r3, r2
800291e: f203 430c addw r3, r3, #1036 @ 0x40c
8002922: 65bb str r3, [r7, #88] @ 0x58
8002924: 6dbb ldr r3, [r7, #88] @ 0x58
8002926: 881b ldrh r3, [r3, #0]
8002928: b29b uxth r3, r3
800292a: f3c3 0309 ubfx r3, r3, #0, #10
800292e: b29a uxth r2, r3
8002930: 6dbb ldr r3, [r7, #88] @ 0x58
8002932: 801a strh r2, [r3, #0]
8002934: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002938: 2b3e cmp r3, #62 @ 0x3e
800293a: d91d bls.n 8002978 <HAL_PCD_EP_DB_Transmit+0x700>
800293c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002940: 095b lsrs r3, r3, #5
8002942: 66bb str r3, [r7, #104] @ 0x68
8002944: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002948: f003 031f and.w r3, r3, #31
800294c: 2b00 cmp r3, #0
800294e: d102 bne.n 8002956 <HAL_PCD_EP_DB_Transmit+0x6de>
8002950: 6ebb ldr r3, [r7, #104] @ 0x68
8002952: 3b01 subs r3, #1
8002954: 66bb str r3, [r7, #104] @ 0x68
8002956: 6dbb ldr r3, [r7, #88] @ 0x58
8002958: 881b ldrh r3, [r3, #0]
800295a: b29a uxth r2, r3
800295c: 6ebb ldr r3, [r7, #104] @ 0x68
800295e: b29b uxth r3, r3
8002960: 029b lsls r3, r3, #10
8002962: b29b uxth r3, r3
8002964: 4313 orrs r3, r2
8002966: b29b uxth r3, r3
8002968: ea6f 4343 mvn.w r3, r3, lsl #17
800296c: ea6f 4353 mvn.w r3, r3, lsr #17
8002970: b29a uxth r2, r3
8002972: 6dbb ldr r3, [r7, #88] @ 0x58
8002974: 801a strh r2, [r3, #0]
8002976: e041 b.n 80029fc <HAL_PCD_EP_DB_Transmit+0x784>
8002978: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800297c: 2b00 cmp r3, #0
800297e: d10a bne.n 8002996 <HAL_PCD_EP_DB_Transmit+0x71e>
8002980: 6dbb ldr r3, [r7, #88] @ 0x58
8002982: 881b ldrh r3, [r3, #0]
8002984: b29b uxth r3, r3
8002986: ea6f 4343 mvn.w r3, r3, lsl #17
800298a: ea6f 4353 mvn.w r3, r3, lsr #17
800298e: b29a uxth r2, r3
8002990: 6dbb ldr r3, [r7, #88] @ 0x58
8002992: 801a strh r2, [r3, #0]
8002994: e032 b.n 80029fc <HAL_PCD_EP_DB_Transmit+0x784>
8002996: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800299a: 085b lsrs r3, r3, #1
800299c: 66bb str r3, [r7, #104] @ 0x68
800299e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80029a2: f003 0301 and.w r3, r3, #1
80029a6: 2b00 cmp r3, #0
80029a8: d002 beq.n 80029b0 <HAL_PCD_EP_DB_Transmit+0x738>
80029aa: 6ebb ldr r3, [r7, #104] @ 0x68
80029ac: 3301 adds r3, #1
80029ae: 66bb str r3, [r7, #104] @ 0x68
80029b0: 6dbb ldr r3, [r7, #88] @ 0x58
80029b2: 881b ldrh r3, [r3, #0]
80029b4: b29a uxth r2, r3
80029b6: 6ebb ldr r3, [r7, #104] @ 0x68
80029b8: b29b uxth r3, r3
80029ba: 029b lsls r3, r3, #10
80029bc: b29b uxth r3, r3
80029be: 4313 orrs r3, r2
80029c0: b29a uxth r2, r3
80029c2: 6dbb ldr r3, [r7, #88] @ 0x58
80029c4: 801a strh r2, [r3, #0]
80029c6: e019 b.n 80029fc <HAL_PCD_EP_DB_Transmit+0x784>
80029c8: 68bb ldr r3, [r7, #8]
80029ca: 785b ldrb r3, [r3, #1]
80029cc: 2b01 cmp r3, #1
80029ce: d115 bne.n 80029fc <HAL_PCD_EP_DB_Transmit+0x784>
80029d0: 68fb ldr r3, [r7, #12]
80029d2: 681b ldr r3, [r3, #0]
80029d4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80029d8: b29b uxth r3, r3
80029da: 461a mov r2, r3
80029dc: 6d7b ldr r3, [r7, #84] @ 0x54
80029de: 4413 add r3, r2
80029e0: 657b str r3, [r7, #84] @ 0x54
80029e2: 68bb ldr r3, [r7, #8]
80029e4: 781b ldrb r3, [r3, #0]
80029e6: 011a lsls r2, r3, #4
80029e8: 6d7b ldr r3, [r7, #84] @ 0x54
80029ea: 4413 add r3, r2
80029ec: f203 430c addw r3, r3, #1036 @ 0x40c
80029f0: 653b str r3, [r7, #80] @ 0x50
80029f2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80029f6: b29a uxth r2, r3
80029f8: 6d3b ldr r3, [r7, #80] @ 0x50
80029fa: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
80029fc: 68fb ldr r3, [r7, #12]
80029fe: 6818 ldr r0, [r3, #0]
8002a00: 68bb ldr r3, [r7, #8]
8002a02: 6959 ldr r1, [r3, #20]
8002a04: 68bb ldr r3, [r7, #8]
8002a06: 895a ldrh r2, [r3, #10]
8002a08: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8002a0c: b29b uxth r3, r3
8002a0e: f003 fde6 bl 80065de <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
8002a12: 68fb ldr r3, [r7, #12]
8002a14: 681b ldr r3, [r3, #0]
8002a16: 461a mov r2, r3
8002a18: 68bb ldr r3, [r7, #8]
8002a1a: 781b ldrb r3, [r3, #0]
8002a1c: 009b lsls r3, r3, #2
8002a1e: 4413 add r3, r2
8002a20: 881b ldrh r3, [r3, #0]
8002a22: b29b uxth r3, r3
8002a24: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8002a28: f023 0340 bic.w r3, r3, #64 @ 0x40
8002a2c: 82bb strh r3, [r7, #20]
8002a2e: 8abb ldrh r3, [r7, #20]
8002a30: f083 0310 eor.w r3, r3, #16
8002a34: 82bb strh r3, [r7, #20]
8002a36: 8abb ldrh r3, [r7, #20]
8002a38: f083 0320 eor.w r3, r3, #32
8002a3c: 82bb strh r3, [r7, #20]
8002a3e: 68fb ldr r3, [r7, #12]
8002a40: 681b ldr r3, [r3, #0]
8002a42: 461a mov r2, r3
8002a44: 68bb ldr r3, [r7, #8]
8002a46: 781b ldrb r3, [r3, #0]
8002a48: 009b lsls r3, r3, #2
8002a4a: 441a add r2, r3
8002a4c: 8abb ldrh r3, [r7, #20]
8002a4e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8002a52: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8002a56: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8002a5a: f043 0380 orr.w r3, r3, #128 @ 0x80
8002a5e: b29b uxth r3, r3
8002a60: 8013 strh r3, [r2, #0]
return HAL_OK;
8002a62: 2300 movs r3, #0
}
8002a64: 4618 mov r0, r3
8002a66: 3790 adds r7, #144 @ 0x90
8002a68: 46bd mov sp, r7
8002a6a: bd80 pop {r7, pc}
08002a6c <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
8002a6c: b480 push {r7}
8002a6e: b087 sub sp, #28
8002a70: af00 add r7, sp, #0
8002a72: 60f8 str r0, [r7, #12]
8002a74: 607b str r3, [r7, #4]
8002a76: 460b mov r3, r1
8002a78: 817b strh r3, [r7, #10]
8002a7a: 4613 mov r3, r2
8002a7c: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8002a7e: 897b ldrh r3, [r7, #10]
8002a80: f003 0380 and.w r3, r3, #128 @ 0x80
8002a84: b29b uxth r3, r3
8002a86: 2b00 cmp r3, #0
8002a88: d00b beq.n 8002aa2 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8002a8a: 897b ldrh r3, [r7, #10]
8002a8c: f003 0207 and.w r2, r3, #7
8002a90: 4613 mov r3, r2
8002a92: 009b lsls r3, r3, #2
8002a94: 4413 add r3, r2
8002a96: 00db lsls r3, r3, #3
8002a98: 3310 adds r3, #16
8002a9a: 68fa ldr r2, [r7, #12]
8002a9c: 4413 add r3, r2
8002a9e: 617b str r3, [r7, #20]
8002aa0: e009 b.n 8002ab6 <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8002aa2: 897a ldrh r2, [r7, #10]
8002aa4: 4613 mov r3, r2
8002aa6: 009b lsls r3, r3, #2
8002aa8: 4413 add r3, r2
8002aaa: 00db lsls r3, r3, #3
8002aac: f503 73a8 add.w r3, r3, #336 @ 0x150
8002ab0: 68fa ldr r2, [r7, #12]
8002ab2: 4413 add r3, r2
8002ab4: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8002ab6: 893b ldrh r3, [r7, #8]
8002ab8: 2b00 cmp r3, #0
8002aba: d107 bne.n 8002acc <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8002abc: 697b ldr r3, [r7, #20]
8002abe: 2200 movs r2, #0
8002ac0: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8002ac2: 687b ldr r3, [r7, #4]
8002ac4: b29a uxth r2, r3
8002ac6: 697b ldr r3, [r7, #20]
8002ac8: 80da strh r2, [r3, #6]
8002aca: e00b b.n 8002ae4 <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8002acc: 697b ldr r3, [r7, #20]
8002ace: 2201 movs r2, #1
8002ad0: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8002ad2: 687b ldr r3, [r7, #4]
8002ad4: b29a uxth r2, r3
8002ad6: 697b ldr r3, [r7, #20]
8002ad8: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8002ada: 687b ldr r3, [r7, #4]
8002adc: 0c1b lsrs r3, r3, #16
8002ade: b29a uxth r2, r3
8002ae0: 697b ldr r3, [r7, #20]
8002ae2: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8002ae4: 2300 movs r3, #0
}
8002ae6: 4618 mov r0, r3
8002ae8: 371c adds r7, #28
8002aea: 46bd mov sp, r7
8002aec: bc80 pop {r7}
8002aee: 4770 bx lr
08002af0 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8002af0: b580 push {r7, lr}
8002af2: b086 sub sp, #24
8002af4: af00 add r7, sp, #0
8002af6: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8002af8: 687b ldr r3, [r7, #4]
8002afa: 2b00 cmp r3, #0
8002afc: d101 bne.n 8002b02 <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8002afe: 2301 movs r3, #1
8002b00: e272 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8002b02: 687b ldr r3, [r7, #4]
8002b04: 681b ldr r3, [r3, #0]
8002b06: f003 0301 and.w r3, r3, #1
8002b0a: 2b00 cmp r3, #0
8002b0c: f000 8087 beq.w 8002c1e <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8002b10: 4b92 ldr r3, [pc, #584] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b12: 685b ldr r3, [r3, #4]
8002b14: f003 030c and.w r3, r3, #12
8002b18: 2b04 cmp r3, #4
8002b1a: d00c beq.n 8002b36 <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
8002b1c: 4b8f ldr r3, [pc, #572] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b1e: 685b ldr r3, [r3, #4]
8002b20: f003 030c and.w r3, r3, #12
8002b24: 2b08 cmp r3, #8
8002b26: d112 bne.n 8002b4e <HAL_RCC_OscConfig+0x5e>
8002b28: 4b8c ldr r3, [pc, #560] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b2a: 685b ldr r3, [r3, #4]
8002b2c: f403 3380 and.w r3, r3, #65536 @ 0x10000
8002b30: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8002b34: d10b bne.n 8002b4e <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8002b36: 4b89 ldr r3, [pc, #548] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b38: 681b ldr r3, [r3, #0]
8002b3a: f403 3300 and.w r3, r3, #131072 @ 0x20000
8002b3e: 2b00 cmp r3, #0
8002b40: d06c beq.n 8002c1c <HAL_RCC_OscConfig+0x12c>
8002b42: 687b ldr r3, [r7, #4]
8002b44: 685b ldr r3, [r3, #4]
8002b46: 2b00 cmp r3, #0
8002b48: d168 bne.n 8002c1c <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
8002b4a: 2301 movs r3, #1
8002b4c: e24c b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8002b4e: 687b ldr r3, [r7, #4]
8002b50: 685b ldr r3, [r3, #4]
8002b52: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8002b56: d106 bne.n 8002b66 <HAL_RCC_OscConfig+0x76>
8002b58: 4b80 ldr r3, [pc, #512] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b5a: 681b ldr r3, [r3, #0]
8002b5c: 4a7f ldr r2, [pc, #508] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b5e: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8002b62: 6013 str r3, [r2, #0]
8002b64: e02e b.n 8002bc4 <HAL_RCC_OscConfig+0xd4>
8002b66: 687b ldr r3, [r7, #4]
8002b68: 685b ldr r3, [r3, #4]
8002b6a: 2b00 cmp r3, #0
8002b6c: d10c bne.n 8002b88 <HAL_RCC_OscConfig+0x98>
8002b6e: 4b7b ldr r3, [pc, #492] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b70: 681b ldr r3, [r3, #0]
8002b72: 4a7a ldr r2, [pc, #488] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b74: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8002b78: 6013 str r3, [r2, #0]
8002b7a: 4b78 ldr r3, [pc, #480] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b7c: 681b ldr r3, [r3, #0]
8002b7e: 4a77 ldr r2, [pc, #476] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b80: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8002b84: 6013 str r3, [r2, #0]
8002b86: e01d b.n 8002bc4 <HAL_RCC_OscConfig+0xd4>
8002b88: 687b ldr r3, [r7, #4]
8002b8a: 685b ldr r3, [r3, #4]
8002b8c: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
8002b90: d10c bne.n 8002bac <HAL_RCC_OscConfig+0xbc>
8002b92: 4b72 ldr r3, [pc, #456] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b94: 681b ldr r3, [r3, #0]
8002b96: 4a71 ldr r2, [pc, #452] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002b98: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8002b9c: 6013 str r3, [r2, #0]
8002b9e: 4b6f ldr r3, [pc, #444] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002ba0: 681b ldr r3, [r3, #0]
8002ba2: 4a6e ldr r2, [pc, #440] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002ba4: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8002ba8: 6013 str r3, [r2, #0]
8002baa: e00b b.n 8002bc4 <HAL_RCC_OscConfig+0xd4>
8002bac: 4b6b ldr r3, [pc, #428] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002bae: 681b ldr r3, [r3, #0]
8002bb0: 4a6a ldr r2, [pc, #424] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002bb2: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8002bb6: 6013 str r3, [r2, #0]
8002bb8: 4b68 ldr r3, [pc, #416] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002bba: 681b ldr r3, [r3, #0]
8002bbc: 4a67 ldr r2, [pc, #412] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002bbe: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8002bc2: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8002bc4: 687b ldr r3, [r7, #4]
8002bc6: 685b ldr r3, [r3, #4]
8002bc8: 2b00 cmp r3, #0
8002bca: d013 beq.n 8002bf4 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002bcc: f7fd ff94 bl 8000af8 <HAL_GetTick>
8002bd0: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002bd2: e008 b.n 8002be6 <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8002bd4: f7fd ff90 bl 8000af8 <HAL_GetTick>
8002bd8: 4602 mov r2, r0
8002bda: 693b ldr r3, [r7, #16]
8002bdc: 1ad3 subs r3, r2, r3
8002bde: 2b64 cmp r3, #100 @ 0x64
8002be0: d901 bls.n 8002be6 <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
8002be2: 2303 movs r3, #3
8002be4: e200 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8002be6: 4b5d ldr r3, [pc, #372] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002be8: 681b ldr r3, [r3, #0]
8002bea: f403 3300 and.w r3, r3, #131072 @ 0x20000
8002bee: 2b00 cmp r3, #0
8002bf0: d0f0 beq.n 8002bd4 <HAL_RCC_OscConfig+0xe4>
8002bf2: e014 b.n 8002c1e <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002bf4: f7fd ff80 bl 8000af8 <HAL_GetTick>
8002bf8: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8002bfa: e008 b.n 8002c0e <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8002bfc: f7fd ff7c bl 8000af8 <HAL_GetTick>
8002c00: 4602 mov r2, r0
8002c02: 693b ldr r3, [r7, #16]
8002c04: 1ad3 subs r3, r2, r3
8002c06: 2b64 cmp r3, #100 @ 0x64
8002c08: d901 bls.n 8002c0e <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
8002c0a: 2303 movs r3, #3
8002c0c: e1ec b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8002c0e: 4b53 ldr r3, [pc, #332] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002c10: 681b ldr r3, [r3, #0]
8002c12: f403 3300 and.w r3, r3, #131072 @ 0x20000
8002c16: 2b00 cmp r3, #0
8002c18: d1f0 bne.n 8002bfc <HAL_RCC_OscConfig+0x10c>
8002c1a: e000 b.n 8002c1e <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8002c1c: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8002c1e: 687b ldr r3, [r7, #4]
8002c20: 681b ldr r3, [r3, #0]
8002c22: f003 0302 and.w r3, r3, #2
8002c26: 2b00 cmp r3, #0
8002c28: d063 beq.n 8002cf2 <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
8002c2a: 4b4c ldr r3, [pc, #304] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002c2c: 685b ldr r3, [r3, #4]
8002c2e: f003 030c and.w r3, r3, #12
8002c32: 2b00 cmp r3, #0
8002c34: d00b beq.n 8002c4e <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
8002c36: 4b49 ldr r3, [pc, #292] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002c38: 685b ldr r3, [r3, #4]
8002c3a: f003 030c and.w r3, r3, #12
8002c3e: 2b08 cmp r3, #8
8002c40: d11c bne.n 8002c7c <HAL_RCC_OscConfig+0x18c>
8002c42: 4b46 ldr r3, [pc, #280] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002c44: 685b ldr r3, [r3, #4]
8002c46: f403 3380 and.w r3, r3, #65536 @ 0x10000
8002c4a: 2b00 cmp r3, #0
8002c4c: d116 bne.n 8002c7c <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8002c4e: 4b43 ldr r3, [pc, #268] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002c50: 681b ldr r3, [r3, #0]
8002c52: f003 0302 and.w r3, r3, #2
8002c56: 2b00 cmp r3, #0
8002c58: d005 beq.n 8002c66 <HAL_RCC_OscConfig+0x176>
8002c5a: 687b ldr r3, [r7, #4]
8002c5c: 691b ldr r3, [r3, #16]
8002c5e: 2b01 cmp r3, #1
8002c60: d001 beq.n 8002c66 <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
8002c62: 2301 movs r3, #1
8002c64: e1c0 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8002c66: 4b3d ldr r3, [pc, #244] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002c68: 681b ldr r3, [r3, #0]
8002c6a: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8002c6e: 687b ldr r3, [r7, #4]
8002c70: 695b ldr r3, [r3, #20]
8002c72: 00db lsls r3, r3, #3
8002c74: 4939 ldr r1, [pc, #228] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002c76: 4313 orrs r3, r2
8002c78: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8002c7a: e03a b.n 8002cf2 <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8002c7c: 687b ldr r3, [r7, #4]
8002c7e: 691b ldr r3, [r3, #16]
8002c80: 2b00 cmp r3, #0
8002c82: d020 beq.n 8002cc6 <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8002c84: 4b36 ldr r3, [pc, #216] @ (8002d60 <HAL_RCC_OscConfig+0x270>)
8002c86: 2201 movs r2, #1
8002c88: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002c8a: f7fd ff35 bl 8000af8 <HAL_GetTick>
8002c8e: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8002c90: e008 b.n 8002ca4 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8002c92: f7fd ff31 bl 8000af8 <HAL_GetTick>
8002c96: 4602 mov r2, r0
8002c98: 693b ldr r3, [r7, #16]
8002c9a: 1ad3 subs r3, r2, r3
8002c9c: 2b02 cmp r3, #2
8002c9e: d901 bls.n 8002ca4 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
8002ca0: 2303 movs r3, #3
8002ca2: e1a1 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8002ca4: 4b2d ldr r3, [pc, #180] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002ca6: 681b ldr r3, [r3, #0]
8002ca8: f003 0302 and.w r3, r3, #2
8002cac: 2b00 cmp r3, #0
8002cae: d0f0 beq.n 8002c92 <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8002cb0: 4b2a ldr r3, [pc, #168] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002cb2: 681b ldr r3, [r3, #0]
8002cb4: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8002cb8: 687b ldr r3, [r7, #4]
8002cba: 695b ldr r3, [r3, #20]
8002cbc: 00db lsls r3, r3, #3
8002cbe: 4927 ldr r1, [pc, #156] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002cc0: 4313 orrs r3, r2
8002cc2: 600b str r3, [r1, #0]
8002cc4: e015 b.n 8002cf2 <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8002cc6: 4b26 ldr r3, [pc, #152] @ (8002d60 <HAL_RCC_OscConfig+0x270>)
8002cc8: 2200 movs r2, #0
8002cca: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002ccc: f7fd ff14 bl 8000af8 <HAL_GetTick>
8002cd0: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8002cd2: e008 b.n 8002ce6 <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8002cd4: f7fd ff10 bl 8000af8 <HAL_GetTick>
8002cd8: 4602 mov r2, r0
8002cda: 693b ldr r3, [r7, #16]
8002cdc: 1ad3 subs r3, r2, r3
8002cde: 2b02 cmp r3, #2
8002ce0: d901 bls.n 8002ce6 <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
8002ce2: 2303 movs r3, #3
8002ce4: e180 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8002ce6: 4b1d ldr r3, [pc, #116] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002ce8: 681b ldr r3, [r3, #0]
8002cea: f003 0302 and.w r3, r3, #2
8002cee: 2b00 cmp r3, #0
8002cf0: d1f0 bne.n 8002cd4 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8002cf2: 687b ldr r3, [r7, #4]
8002cf4: 681b ldr r3, [r3, #0]
8002cf6: f003 0308 and.w r3, r3, #8
8002cfa: 2b00 cmp r3, #0
8002cfc: d03a beq.n 8002d74 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8002cfe: 687b ldr r3, [r7, #4]
8002d00: 699b ldr r3, [r3, #24]
8002d02: 2b00 cmp r3, #0
8002d04: d019 beq.n 8002d3a <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8002d06: 4b17 ldr r3, [pc, #92] @ (8002d64 <HAL_RCC_OscConfig+0x274>)
8002d08: 2201 movs r2, #1
8002d0a: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002d0c: f7fd fef4 bl 8000af8 <HAL_GetTick>
8002d10: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8002d12: e008 b.n 8002d26 <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8002d14: f7fd fef0 bl 8000af8 <HAL_GetTick>
8002d18: 4602 mov r2, r0
8002d1a: 693b ldr r3, [r7, #16]
8002d1c: 1ad3 subs r3, r2, r3
8002d1e: 2b02 cmp r3, #2
8002d20: d901 bls.n 8002d26 <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
8002d22: 2303 movs r3, #3
8002d24: e160 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8002d26: 4b0d ldr r3, [pc, #52] @ (8002d5c <HAL_RCC_OscConfig+0x26c>)
8002d28: 6a5b ldr r3, [r3, #36] @ 0x24
8002d2a: f003 0302 and.w r3, r3, #2
8002d2e: 2b00 cmp r3, #0
8002d30: d0f0 beq.n 8002d14 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
8002d32: 2001 movs r0, #1
8002d34: f000 fa9c bl 8003270 <RCC_Delay>
8002d38: e01c b.n 8002d74 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8002d3a: 4b0a ldr r3, [pc, #40] @ (8002d64 <HAL_RCC_OscConfig+0x274>)
8002d3c: 2200 movs r2, #0
8002d3e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002d40: f7fd feda bl 8000af8 <HAL_GetTick>
8002d44: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8002d46: e00f b.n 8002d68 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8002d48: f7fd fed6 bl 8000af8 <HAL_GetTick>
8002d4c: 4602 mov r2, r0
8002d4e: 693b ldr r3, [r7, #16]
8002d50: 1ad3 subs r3, r2, r3
8002d52: 2b02 cmp r3, #2
8002d54: d908 bls.n 8002d68 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
8002d56: 2303 movs r3, #3
8002d58: e146 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
8002d5a: bf00 nop
8002d5c: 40021000 .word 0x40021000
8002d60: 42420000 .word 0x42420000
8002d64: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8002d68: 4b92 ldr r3, [pc, #584] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002d6a: 6a5b ldr r3, [r3, #36] @ 0x24
8002d6c: f003 0302 and.w r3, r3, #2
8002d70: 2b00 cmp r3, #0
8002d72: d1e9 bne.n 8002d48 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8002d74: 687b ldr r3, [r7, #4]
8002d76: 681b ldr r3, [r3, #0]
8002d78: f003 0304 and.w r3, r3, #4
8002d7c: 2b00 cmp r3, #0
8002d7e: f000 80a6 beq.w 8002ece <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
8002d82: 2300 movs r3, #0
8002d84: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8002d86: 4b8b ldr r3, [pc, #556] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002d88: 69db ldr r3, [r3, #28]
8002d8a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8002d8e: 2b00 cmp r3, #0
8002d90: d10d bne.n 8002dae <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
8002d92: 4b88 ldr r3, [pc, #544] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002d94: 69db ldr r3, [r3, #28]
8002d96: 4a87 ldr r2, [pc, #540] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002d98: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8002d9c: 61d3 str r3, [r2, #28]
8002d9e: 4b85 ldr r3, [pc, #532] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002da0: 69db ldr r3, [r3, #28]
8002da2: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8002da6: 60bb str r3, [r7, #8]
8002da8: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8002daa: 2301 movs r3, #1
8002dac: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002dae: 4b82 ldr r3, [pc, #520] @ (8002fb8 <HAL_RCC_OscConfig+0x4c8>)
8002db0: 681b ldr r3, [r3, #0]
8002db2: f403 7380 and.w r3, r3, #256 @ 0x100
8002db6: 2b00 cmp r3, #0
8002db8: d118 bne.n 8002dec <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8002dba: 4b7f ldr r3, [pc, #508] @ (8002fb8 <HAL_RCC_OscConfig+0x4c8>)
8002dbc: 681b ldr r3, [r3, #0]
8002dbe: 4a7e ldr r2, [pc, #504] @ (8002fb8 <HAL_RCC_OscConfig+0x4c8>)
8002dc0: f443 7380 orr.w r3, r3, #256 @ 0x100
8002dc4: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8002dc6: f7fd fe97 bl 8000af8 <HAL_GetTick>
8002dca: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002dcc: e008 b.n 8002de0 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8002dce: f7fd fe93 bl 8000af8 <HAL_GetTick>
8002dd2: 4602 mov r2, r0
8002dd4: 693b ldr r3, [r7, #16]
8002dd6: 1ad3 subs r3, r2, r3
8002dd8: 2b64 cmp r3, #100 @ 0x64
8002dda: d901 bls.n 8002de0 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8002ddc: 2303 movs r3, #3
8002dde: e103 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8002de0: 4b75 ldr r3, [pc, #468] @ (8002fb8 <HAL_RCC_OscConfig+0x4c8>)
8002de2: 681b ldr r3, [r3, #0]
8002de4: f403 7380 and.w r3, r3, #256 @ 0x100
8002de8: 2b00 cmp r3, #0
8002dea: d0f0 beq.n 8002dce <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8002dec: 687b ldr r3, [r7, #4]
8002dee: 68db ldr r3, [r3, #12]
8002df0: 2b01 cmp r3, #1
8002df2: d106 bne.n 8002e02 <HAL_RCC_OscConfig+0x312>
8002df4: 4b6f ldr r3, [pc, #444] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002df6: 6a1b ldr r3, [r3, #32]
8002df8: 4a6e ldr r2, [pc, #440] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002dfa: f043 0301 orr.w r3, r3, #1
8002dfe: 6213 str r3, [r2, #32]
8002e00: e02d b.n 8002e5e <HAL_RCC_OscConfig+0x36e>
8002e02: 687b ldr r3, [r7, #4]
8002e04: 68db ldr r3, [r3, #12]
8002e06: 2b00 cmp r3, #0
8002e08: d10c bne.n 8002e24 <HAL_RCC_OscConfig+0x334>
8002e0a: 4b6a ldr r3, [pc, #424] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e0c: 6a1b ldr r3, [r3, #32]
8002e0e: 4a69 ldr r2, [pc, #420] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e10: f023 0301 bic.w r3, r3, #1
8002e14: 6213 str r3, [r2, #32]
8002e16: 4b67 ldr r3, [pc, #412] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e18: 6a1b ldr r3, [r3, #32]
8002e1a: 4a66 ldr r2, [pc, #408] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e1c: f023 0304 bic.w r3, r3, #4
8002e20: 6213 str r3, [r2, #32]
8002e22: e01c b.n 8002e5e <HAL_RCC_OscConfig+0x36e>
8002e24: 687b ldr r3, [r7, #4]
8002e26: 68db ldr r3, [r3, #12]
8002e28: 2b05 cmp r3, #5
8002e2a: d10c bne.n 8002e46 <HAL_RCC_OscConfig+0x356>
8002e2c: 4b61 ldr r3, [pc, #388] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e2e: 6a1b ldr r3, [r3, #32]
8002e30: 4a60 ldr r2, [pc, #384] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e32: f043 0304 orr.w r3, r3, #4
8002e36: 6213 str r3, [r2, #32]
8002e38: 4b5e ldr r3, [pc, #376] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e3a: 6a1b ldr r3, [r3, #32]
8002e3c: 4a5d ldr r2, [pc, #372] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e3e: f043 0301 orr.w r3, r3, #1
8002e42: 6213 str r3, [r2, #32]
8002e44: e00b b.n 8002e5e <HAL_RCC_OscConfig+0x36e>
8002e46: 4b5b ldr r3, [pc, #364] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e48: 6a1b ldr r3, [r3, #32]
8002e4a: 4a5a ldr r2, [pc, #360] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e4c: f023 0301 bic.w r3, r3, #1
8002e50: 6213 str r3, [r2, #32]
8002e52: 4b58 ldr r3, [pc, #352] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e54: 6a1b ldr r3, [r3, #32]
8002e56: 4a57 ldr r2, [pc, #348] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e58: f023 0304 bic.w r3, r3, #4
8002e5c: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8002e5e: 687b ldr r3, [r7, #4]
8002e60: 68db ldr r3, [r3, #12]
8002e62: 2b00 cmp r3, #0
8002e64: d015 beq.n 8002e92 <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002e66: f7fd fe47 bl 8000af8 <HAL_GetTick>
8002e6a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8002e6c: e00a b.n 8002e84 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8002e6e: f7fd fe43 bl 8000af8 <HAL_GetTick>
8002e72: 4602 mov r2, r0
8002e74: 693b ldr r3, [r7, #16]
8002e76: 1ad3 subs r3, r2, r3
8002e78: f241 3288 movw r2, #5000 @ 0x1388
8002e7c: 4293 cmp r3, r2
8002e7e: d901 bls.n 8002e84 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8002e80: 2303 movs r3, #3
8002e82: e0b1 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8002e84: 4b4b ldr r3, [pc, #300] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002e86: 6a1b ldr r3, [r3, #32]
8002e88: f003 0302 and.w r3, r3, #2
8002e8c: 2b00 cmp r3, #0
8002e8e: d0ee beq.n 8002e6e <HAL_RCC_OscConfig+0x37e>
8002e90: e014 b.n 8002ebc <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8002e92: f7fd fe31 bl 8000af8 <HAL_GetTick>
8002e96: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8002e98: e00a b.n 8002eb0 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8002e9a: f7fd fe2d bl 8000af8 <HAL_GetTick>
8002e9e: 4602 mov r2, r0
8002ea0: 693b ldr r3, [r7, #16]
8002ea2: 1ad3 subs r3, r2, r3
8002ea4: f241 3288 movw r2, #5000 @ 0x1388
8002ea8: 4293 cmp r3, r2
8002eaa: d901 bls.n 8002eb0 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8002eac: 2303 movs r3, #3
8002eae: e09b b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8002eb0: 4b40 ldr r3, [pc, #256] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002eb2: 6a1b ldr r3, [r3, #32]
8002eb4: f003 0302 and.w r3, r3, #2
8002eb8: 2b00 cmp r3, #0
8002eba: d1ee bne.n 8002e9a <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8002ebc: 7dfb ldrb r3, [r7, #23]
8002ebe: 2b01 cmp r3, #1
8002ec0: d105 bne.n 8002ece <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
8002ec2: 4b3c ldr r3, [pc, #240] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002ec4: 69db ldr r3, [r3, #28]
8002ec6: 4a3b ldr r2, [pc, #236] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002ec8: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8002ecc: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8002ece: 687b ldr r3, [r7, #4]
8002ed0: 69db ldr r3, [r3, #28]
8002ed2: 2b00 cmp r3, #0
8002ed4: f000 8087 beq.w 8002fe6 <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8002ed8: 4b36 ldr r3, [pc, #216] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002eda: 685b ldr r3, [r3, #4]
8002edc: f003 030c and.w r3, r3, #12
8002ee0: 2b08 cmp r3, #8
8002ee2: d061 beq.n 8002fa8 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8002ee4: 687b ldr r3, [r7, #4]
8002ee6: 69db ldr r3, [r3, #28]
8002ee8: 2b02 cmp r3, #2
8002eea: d146 bne.n 8002f7a <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8002eec: 4b33 ldr r3, [pc, #204] @ (8002fbc <HAL_RCC_OscConfig+0x4cc>)
8002eee: 2200 movs r2, #0
8002ef0: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002ef2: f7fd fe01 bl 8000af8 <HAL_GetTick>
8002ef6: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002ef8: e008 b.n 8002f0c <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8002efa: f7fd fdfd bl 8000af8 <HAL_GetTick>
8002efe: 4602 mov r2, r0
8002f00: 693b ldr r3, [r7, #16]
8002f02: 1ad3 subs r3, r2, r3
8002f04: 2b02 cmp r3, #2
8002f06: d901 bls.n 8002f0c <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
8002f08: 2303 movs r3, #3
8002f0a: e06d b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002f0c: 4b29 ldr r3, [pc, #164] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002f0e: 681b ldr r3, [r3, #0]
8002f10: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8002f14: 2b00 cmp r3, #0
8002f16: d1f0 bne.n 8002efa <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
8002f18: 687b ldr r3, [r7, #4]
8002f1a: 6a1b ldr r3, [r3, #32]
8002f1c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8002f20: d108 bne.n 8002f34 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
8002f22: 4b24 ldr r3, [pc, #144] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002f24: 685b ldr r3, [r3, #4]
8002f26: f423 3200 bic.w r2, r3, #131072 @ 0x20000
8002f2a: 687b ldr r3, [r7, #4]
8002f2c: 689b ldr r3, [r3, #8]
8002f2e: 4921 ldr r1, [pc, #132] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002f30: 4313 orrs r3, r2
8002f32: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
8002f34: 4b1f ldr r3, [pc, #124] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002f36: 685b ldr r3, [r3, #4]
8002f38: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
8002f3c: 687b ldr r3, [r7, #4]
8002f3e: 6a19 ldr r1, [r3, #32]
8002f40: 687b ldr r3, [r7, #4]
8002f42: 6a5b ldr r3, [r3, #36] @ 0x24
8002f44: 430b orrs r3, r1
8002f46: 491b ldr r1, [pc, #108] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002f48: 4313 orrs r3, r2
8002f4a: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8002f4c: 4b1b ldr r3, [pc, #108] @ (8002fbc <HAL_RCC_OscConfig+0x4cc>)
8002f4e: 2201 movs r2, #1
8002f50: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002f52: f7fd fdd1 bl 8000af8 <HAL_GetTick>
8002f56: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8002f58: e008 b.n 8002f6c <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8002f5a: f7fd fdcd bl 8000af8 <HAL_GetTick>
8002f5e: 4602 mov r2, r0
8002f60: 693b ldr r3, [r7, #16]
8002f62: 1ad3 subs r3, r2, r3
8002f64: 2b02 cmp r3, #2
8002f66: d901 bls.n 8002f6c <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8002f68: 2303 movs r3, #3
8002f6a: e03d b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8002f6c: 4b11 ldr r3, [pc, #68] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002f6e: 681b ldr r3, [r3, #0]
8002f70: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8002f74: 2b00 cmp r3, #0
8002f76: d0f0 beq.n 8002f5a <HAL_RCC_OscConfig+0x46a>
8002f78: e035 b.n 8002fe6 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8002f7a: 4b10 ldr r3, [pc, #64] @ (8002fbc <HAL_RCC_OscConfig+0x4cc>)
8002f7c: 2200 movs r2, #0
8002f7e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8002f80: f7fd fdba bl 8000af8 <HAL_GetTick>
8002f84: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002f86: e008 b.n 8002f9a <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8002f88: f7fd fdb6 bl 8000af8 <HAL_GetTick>
8002f8c: 4602 mov r2, r0
8002f8e: 693b ldr r3, [r7, #16]
8002f90: 1ad3 subs r3, r2, r3
8002f92: 2b02 cmp r3, #2
8002f94: d901 bls.n 8002f9a <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
8002f96: 2303 movs r3, #3
8002f98: e026 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8002f9a: 4b06 ldr r3, [pc, #24] @ (8002fb4 <HAL_RCC_OscConfig+0x4c4>)
8002f9c: 681b ldr r3, [r3, #0]
8002f9e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8002fa2: 2b00 cmp r3, #0
8002fa4: d1f0 bne.n 8002f88 <HAL_RCC_OscConfig+0x498>
8002fa6: e01e b.n 8002fe6 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8002fa8: 687b ldr r3, [r7, #4]
8002faa: 69db ldr r3, [r3, #28]
8002fac: 2b01 cmp r3, #1
8002fae: d107 bne.n 8002fc0 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8002fb0: 2301 movs r3, #1
8002fb2: e019 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
8002fb4: 40021000 .word 0x40021000
8002fb8: 40007000 .word 0x40007000
8002fbc: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8002fc0: 4b0b ldr r3, [pc, #44] @ (8002ff0 <HAL_RCC_OscConfig+0x500>)
8002fc2: 685b ldr r3, [r3, #4]
8002fc4: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8002fc6: 68fb ldr r3, [r7, #12]
8002fc8: f403 3280 and.w r2, r3, #65536 @ 0x10000
8002fcc: 687b ldr r3, [r7, #4]
8002fce: 6a1b ldr r3, [r3, #32]
8002fd0: 429a cmp r2, r3
8002fd2: d106 bne.n 8002fe2 <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8002fd4: 68fb ldr r3, [r7, #12]
8002fd6: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
8002fda: 687b ldr r3, [r7, #4]
8002fdc: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8002fde: 429a cmp r2, r3
8002fe0: d001 beq.n 8002fe6 <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
8002fe2: 2301 movs r3, #1
8002fe4: e000 b.n 8002fe8 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
8002fe6: 2300 movs r3, #0
}
8002fe8: 4618 mov r0, r3
8002fea: 3718 adds r7, #24
8002fec: 46bd mov sp, r7
8002fee: bd80 pop {r7, pc}
8002ff0: 40021000 .word 0x40021000
08002ff4 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8002ff4: b580 push {r7, lr}
8002ff6: b084 sub sp, #16
8002ff8: af00 add r7, sp, #0
8002ffa: 6078 str r0, [r7, #4]
8002ffc: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8002ffe: 687b ldr r3, [r7, #4]
8003000: 2b00 cmp r3, #0
8003002: d101 bne.n 8003008 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8003004: 2301 movs r3, #1
8003006: e0d0 b.n 80031aa <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8003008: 4b6a ldr r3, [pc, #424] @ (80031b4 <HAL_RCC_ClockConfig+0x1c0>)
800300a: 681b ldr r3, [r3, #0]
800300c: f003 0307 and.w r3, r3, #7
8003010: 683a ldr r2, [r7, #0]
8003012: 429a cmp r2, r3
8003014: d910 bls.n 8003038 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8003016: 4b67 ldr r3, [pc, #412] @ (80031b4 <HAL_RCC_ClockConfig+0x1c0>)
8003018: 681b ldr r3, [r3, #0]
800301a: f023 0207 bic.w r2, r3, #7
800301e: 4965 ldr r1, [pc, #404] @ (80031b4 <HAL_RCC_ClockConfig+0x1c0>)
8003020: 683b ldr r3, [r7, #0]
8003022: 4313 orrs r3, r2
8003024: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8003026: 4b63 ldr r3, [pc, #396] @ (80031b4 <HAL_RCC_ClockConfig+0x1c0>)
8003028: 681b ldr r3, [r3, #0]
800302a: f003 0307 and.w r3, r3, #7
800302e: 683a ldr r2, [r7, #0]
8003030: 429a cmp r2, r3
8003032: d001 beq.n 8003038 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8003034: 2301 movs r3, #1
8003036: e0b8 b.n 80031aa <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8003038: 687b ldr r3, [r7, #4]
800303a: 681b ldr r3, [r3, #0]
800303c: f003 0302 and.w r3, r3, #2
8003040: 2b00 cmp r3, #0
8003042: d020 beq.n 8003086 <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8003044: 687b ldr r3, [r7, #4]
8003046: 681b ldr r3, [r3, #0]
8003048: f003 0304 and.w r3, r3, #4
800304c: 2b00 cmp r3, #0
800304e: d005 beq.n 800305c <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8003050: 4b59 ldr r3, [pc, #356] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
8003052: 685b ldr r3, [r3, #4]
8003054: 4a58 ldr r2, [pc, #352] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
8003056: f443 63e0 orr.w r3, r3, #1792 @ 0x700
800305a: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
800305c: 687b ldr r3, [r7, #4]
800305e: 681b ldr r3, [r3, #0]
8003060: f003 0308 and.w r3, r3, #8
8003064: 2b00 cmp r3, #0
8003066: d005 beq.n 8003074 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8003068: 4b53 ldr r3, [pc, #332] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
800306a: 685b ldr r3, [r3, #4]
800306c: 4a52 ldr r2, [pc, #328] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
800306e: f443 5360 orr.w r3, r3, #14336 @ 0x3800
8003072: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8003074: 4b50 ldr r3, [pc, #320] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
8003076: 685b ldr r3, [r3, #4]
8003078: f023 02f0 bic.w r2, r3, #240 @ 0xf0
800307c: 687b ldr r3, [r7, #4]
800307e: 689b ldr r3, [r3, #8]
8003080: 494d ldr r1, [pc, #308] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
8003082: 4313 orrs r3, r2
8003084: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8003086: 687b ldr r3, [r7, #4]
8003088: 681b ldr r3, [r3, #0]
800308a: f003 0301 and.w r3, r3, #1
800308e: 2b00 cmp r3, #0
8003090: d040 beq.n 8003114 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8003092: 687b ldr r3, [r7, #4]
8003094: 685b ldr r3, [r3, #4]
8003096: 2b01 cmp r3, #1
8003098: d107 bne.n 80030aa <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800309a: 4b47 ldr r3, [pc, #284] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
800309c: 681b ldr r3, [r3, #0]
800309e: f403 3300 and.w r3, r3, #131072 @ 0x20000
80030a2: 2b00 cmp r3, #0
80030a4: d115 bne.n 80030d2 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80030a6: 2301 movs r3, #1
80030a8: e07f b.n 80031aa <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
80030aa: 687b ldr r3, [r7, #4]
80030ac: 685b ldr r3, [r3, #4]
80030ae: 2b02 cmp r3, #2
80030b0: d107 bne.n 80030c2 <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80030b2: 4b41 ldr r3, [pc, #260] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
80030b4: 681b ldr r3, [r3, #0]
80030b6: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80030ba: 2b00 cmp r3, #0
80030bc: d109 bne.n 80030d2 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80030be: 2301 movs r3, #1
80030c0: e073 b.n 80031aa <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80030c2: 4b3d ldr r3, [pc, #244] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
80030c4: 681b ldr r3, [r3, #0]
80030c6: f003 0302 and.w r3, r3, #2
80030ca: 2b00 cmp r3, #0
80030cc: d101 bne.n 80030d2 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80030ce: 2301 movs r3, #1
80030d0: e06b b.n 80031aa <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
80030d2: 4b39 ldr r3, [pc, #228] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
80030d4: 685b ldr r3, [r3, #4]
80030d6: f023 0203 bic.w r2, r3, #3
80030da: 687b ldr r3, [r7, #4]
80030dc: 685b ldr r3, [r3, #4]
80030de: 4936 ldr r1, [pc, #216] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
80030e0: 4313 orrs r3, r2
80030e2: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
80030e4: f7fd fd08 bl 8000af8 <HAL_GetTick>
80030e8: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80030ea: e00a b.n 8003102 <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
80030ec: f7fd fd04 bl 8000af8 <HAL_GetTick>
80030f0: 4602 mov r2, r0
80030f2: 68fb ldr r3, [r7, #12]
80030f4: 1ad3 subs r3, r2, r3
80030f6: f241 3288 movw r2, #5000 @ 0x1388
80030fa: 4293 cmp r3, r2
80030fc: d901 bls.n 8003102 <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
80030fe: 2303 movs r3, #3
8003100: e053 b.n 80031aa <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8003102: 4b2d ldr r3, [pc, #180] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
8003104: 685b ldr r3, [r3, #4]
8003106: f003 020c and.w r2, r3, #12
800310a: 687b ldr r3, [r7, #4]
800310c: 685b ldr r3, [r3, #4]
800310e: 009b lsls r3, r3, #2
8003110: 429a cmp r2, r3
8003112: d1eb bne.n 80030ec <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8003114: 4b27 ldr r3, [pc, #156] @ (80031b4 <HAL_RCC_ClockConfig+0x1c0>)
8003116: 681b ldr r3, [r3, #0]
8003118: f003 0307 and.w r3, r3, #7
800311c: 683a ldr r2, [r7, #0]
800311e: 429a cmp r2, r3
8003120: d210 bcs.n 8003144 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8003122: 4b24 ldr r3, [pc, #144] @ (80031b4 <HAL_RCC_ClockConfig+0x1c0>)
8003124: 681b ldr r3, [r3, #0]
8003126: f023 0207 bic.w r2, r3, #7
800312a: 4922 ldr r1, [pc, #136] @ (80031b4 <HAL_RCC_ClockConfig+0x1c0>)
800312c: 683b ldr r3, [r7, #0]
800312e: 4313 orrs r3, r2
8003130: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8003132: 4b20 ldr r3, [pc, #128] @ (80031b4 <HAL_RCC_ClockConfig+0x1c0>)
8003134: 681b ldr r3, [r3, #0]
8003136: f003 0307 and.w r3, r3, #7
800313a: 683a ldr r2, [r7, #0]
800313c: 429a cmp r2, r3
800313e: d001 beq.n 8003144 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8003140: 2301 movs r3, #1
8003142: e032 b.n 80031aa <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8003144: 687b ldr r3, [r7, #4]
8003146: 681b ldr r3, [r3, #0]
8003148: f003 0304 and.w r3, r3, #4
800314c: 2b00 cmp r3, #0
800314e: d008 beq.n 8003162 <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8003150: 4b19 ldr r3, [pc, #100] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
8003152: 685b ldr r3, [r3, #4]
8003154: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8003158: 687b ldr r3, [r7, #4]
800315a: 68db ldr r3, [r3, #12]
800315c: 4916 ldr r1, [pc, #88] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
800315e: 4313 orrs r3, r2
8003160: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8003162: 687b ldr r3, [r7, #4]
8003164: 681b ldr r3, [r3, #0]
8003166: f003 0308 and.w r3, r3, #8
800316a: 2b00 cmp r3, #0
800316c: d009 beq.n 8003182 <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
800316e: 4b12 ldr r3, [pc, #72] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
8003170: 685b ldr r3, [r3, #4]
8003172: f423 5260 bic.w r2, r3, #14336 @ 0x3800
8003176: 687b ldr r3, [r7, #4]
8003178: 691b ldr r3, [r3, #16]
800317a: 00db lsls r3, r3, #3
800317c: 490e ldr r1, [pc, #56] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
800317e: 4313 orrs r3, r2
8003180: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
8003182: f000 f821 bl 80031c8 <HAL_RCC_GetSysClockFreq>
8003186: 4602 mov r2, r0
8003188: 4b0b ldr r3, [pc, #44] @ (80031b8 <HAL_RCC_ClockConfig+0x1c4>)
800318a: 685b ldr r3, [r3, #4]
800318c: 091b lsrs r3, r3, #4
800318e: f003 030f and.w r3, r3, #15
8003192: 490a ldr r1, [pc, #40] @ (80031bc <HAL_RCC_ClockConfig+0x1c8>)
8003194: 5ccb ldrb r3, [r1, r3]
8003196: fa22 f303 lsr.w r3, r2, r3
800319a: 4a09 ldr r2, [pc, #36] @ (80031c0 <HAL_RCC_ClockConfig+0x1cc>)
800319c: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
800319e: 4b09 ldr r3, [pc, #36] @ (80031c4 <HAL_RCC_ClockConfig+0x1d0>)
80031a0: 681b ldr r3, [r3, #0]
80031a2: 4618 mov r0, r3
80031a4: f7fd fc66 bl 8000a74 <HAL_InitTick>
return HAL_OK;
80031a8: 2300 movs r3, #0
}
80031aa: 4618 mov r0, r3
80031ac: 3710 adds r7, #16
80031ae: 46bd mov sp, r7
80031b0: bd80 pop {r7, pc}
80031b2: bf00 nop
80031b4: 40022000 .word 0x40022000
80031b8: 40021000 .word 0x40021000
80031bc: 080091e4 .word 0x080091e4
80031c0: 20000000 .word 0x20000000
80031c4: 20000004 .word 0x20000004
080031c8 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
80031c8: b480 push {r7}
80031ca: b087 sub sp, #28
80031cc: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
80031ce: 2300 movs r3, #0
80031d0: 60fb str r3, [r7, #12]
80031d2: 2300 movs r3, #0
80031d4: 60bb str r3, [r7, #8]
80031d6: 2300 movs r3, #0
80031d8: 617b str r3, [r7, #20]
80031da: 2300 movs r3, #0
80031dc: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
80031de: 2300 movs r3, #0
80031e0: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
80031e2: 4b1e ldr r3, [pc, #120] @ (800325c <HAL_RCC_GetSysClockFreq+0x94>)
80031e4: 685b ldr r3, [r3, #4]
80031e6: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
80031e8: 68fb ldr r3, [r7, #12]
80031ea: f003 030c and.w r3, r3, #12
80031ee: 2b04 cmp r3, #4
80031f0: d002 beq.n 80031f8 <HAL_RCC_GetSysClockFreq+0x30>
80031f2: 2b08 cmp r3, #8
80031f4: d003 beq.n 80031fe <HAL_RCC_GetSysClockFreq+0x36>
80031f6: e027 b.n 8003248 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
80031f8: 4b19 ldr r3, [pc, #100] @ (8003260 <HAL_RCC_GetSysClockFreq+0x98>)
80031fa: 613b str r3, [r7, #16]
break;
80031fc: e027 b.n 800324e <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
80031fe: 68fb ldr r3, [r7, #12]
8003200: 0c9b lsrs r3, r3, #18
8003202: f003 030f and.w r3, r3, #15
8003206: 4a17 ldr r2, [pc, #92] @ (8003264 <HAL_RCC_GetSysClockFreq+0x9c>)
8003208: 5cd3 ldrb r3, [r2, r3]
800320a: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
800320c: 68fb ldr r3, [r7, #12]
800320e: f403 3380 and.w r3, r3, #65536 @ 0x10000
8003212: 2b00 cmp r3, #0
8003214: d010 beq.n 8003238 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
8003216: 4b11 ldr r3, [pc, #68] @ (800325c <HAL_RCC_GetSysClockFreq+0x94>)
8003218: 685b ldr r3, [r3, #4]
800321a: 0c5b lsrs r3, r3, #17
800321c: f003 0301 and.w r3, r3, #1
8003220: 4a11 ldr r2, [pc, #68] @ (8003268 <HAL_RCC_GetSysClockFreq+0xa0>)
8003222: 5cd3 ldrb r3, [r2, r3]
8003224: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
8003226: 687b ldr r3, [r7, #4]
8003228: 4a0d ldr r2, [pc, #52] @ (8003260 <HAL_RCC_GetSysClockFreq+0x98>)
800322a: fb03 f202 mul.w r2, r3, r2
800322e: 68bb ldr r3, [r7, #8]
8003230: fbb2 f3f3 udiv r3, r2, r3
8003234: 617b str r3, [r7, #20]
8003236: e004 b.n 8003242 <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8003238: 687b ldr r3, [r7, #4]
800323a: 4a0c ldr r2, [pc, #48] @ (800326c <HAL_RCC_GetSysClockFreq+0xa4>)
800323c: fb02 f303 mul.w r3, r2, r3
8003240: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
8003242: 697b ldr r3, [r7, #20]
8003244: 613b str r3, [r7, #16]
break;
8003246: e002 b.n 800324e <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8003248: 4b05 ldr r3, [pc, #20] @ (8003260 <HAL_RCC_GetSysClockFreq+0x98>)
800324a: 613b str r3, [r7, #16]
break;
800324c: bf00 nop
}
}
return sysclockfreq;
800324e: 693b ldr r3, [r7, #16]
}
8003250: 4618 mov r0, r3
8003252: 371c adds r7, #28
8003254: 46bd mov sp, r7
8003256: bc80 pop {r7}
8003258: 4770 bx lr
800325a: bf00 nop
800325c: 40021000 .word 0x40021000
8003260: 007a1200 .word 0x007a1200
8003264: 080091f4 .word 0x080091f4
8003268: 08009204 .word 0x08009204
800326c: 003d0900 .word 0x003d0900
08003270 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8003270: b480 push {r7}
8003272: b085 sub sp, #20
8003274: af00 add r7, sp, #0
8003276: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8003278: 4b0a ldr r3, [pc, #40] @ (80032a4 <RCC_Delay+0x34>)
800327a: 681b ldr r3, [r3, #0]
800327c: 4a0a ldr r2, [pc, #40] @ (80032a8 <RCC_Delay+0x38>)
800327e: fba2 2303 umull r2, r3, r2, r3
8003282: 0a5b lsrs r3, r3, #9
8003284: 687a ldr r2, [r7, #4]
8003286: fb02 f303 mul.w r3, r2, r3
800328a: 60fb str r3, [r7, #12]
do
{
__NOP();
800328c: bf00 nop
}
while (Delay --);
800328e: 68fb ldr r3, [r7, #12]
8003290: 1e5a subs r2, r3, #1
8003292: 60fa str r2, [r7, #12]
8003294: 2b00 cmp r3, #0
8003296: d1f9 bne.n 800328c <RCC_Delay+0x1c>
}
8003298: bf00 nop
800329a: bf00 nop
800329c: 3714 adds r7, #20
800329e: 46bd mov sp, r7
80032a0: bc80 pop {r7}
80032a2: 4770 bx lr
80032a4: 20000000 .word 0x20000000
80032a8: 10624dd3 .word 0x10624dd3
080032ac <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
80032ac: b580 push {r7, lr}
80032ae: b086 sub sp, #24
80032b0: af00 add r7, sp, #0
80032b2: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
80032b4: 2300 movs r3, #0
80032b6: 613b str r3, [r7, #16]
80032b8: 2300 movs r3, #0
80032ba: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
80032bc: 687b ldr r3, [r7, #4]
80032be: 681b ldr r3, [r3, #0]
80032c0: f003 0301 and.w r3, r3, #1
80032c4: 2b00 cmp r3, #0
80032c6: d07d beq.n 80033c4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
80032c8: 2300 movs r3, #0
80032ca: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
80032cc: 4b4f ldr r3, [pc, #316] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80032ce: 69db ldr r3, [r3, #28]
80032d0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80032d4: 2b00 cmp r3, #0
80032d6: d10d bne.n 80032f4 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
80032d8: 4b4c ldr r3, [pc, #304] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80032da: 69db ldr r3, [r3, #28]
80032dc: 4a4b ldr r2, [pc, #300] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80032de: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80032e2: 61d3 str r3, [r2, #28]
80032e4: 4b49 ldr r3, [pc, #292] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80032e6: 69db ldr r3, [r3, #28]
80032e8: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80032ec: 60bb str r3, [r7, #8]
80032ee: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
80032f0: 2301 movs r3, #1
80032f2: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80032f4: 4b46 ldr r3, [pc, #280] @ (8003410 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80032f6: 681b ldr r3, [r3, #0]
80032f8: f403 7380 and.w r3, r3, #256 @ 0x100
80032fc: 2b00 cmp r3, #0
80032fe: d118 bne.n 8003332 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8003300: 4b43 ldr r3, [pc, #268] @ (8003410 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003302: 681b ldr r3, [r3, #0]
8003304: 4a42 ldr r2, [pc, #264] @ (8003410 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003306: f443 7380 orr.w r3, r3, #256 @ 0x100
800330a: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800330c: f7fd fbf4 bl 8000af8 <HAL_GetTick>
8003310: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003312: e008 b.n 8003326 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8003314: f7fd fbf0 bl 8000af8 <HAL_GetTick>
8003318: 4602 mov r2, r0
800331a: 693b ldr r3, [r7, #16]
800331c: 1ad3 subs r3, r2, r3
800331e: 2b64 cmp r3, #100 @ 0x64
8003320: d901 bls.n 8003326 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8003322: 2303 movs r3, #3
8003324: e06d b.n 8003402 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8003326: 4b3a ldr r3, [pc, #232] @ (8003410 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8003328: 681b ldr r3, [r3, #0]
800332a: f403 7380 and.w r3, r3, #256 @ 0x100
800332e: 2b00 cmp r3, #0
8003330: d0f0 beq.n 8003314 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8003332: 4b36 ldr r3, [pc, #216] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003334: 6a1b ldr r3, [r3, #32]
8003336: f403 7340 and.w r3, r3, #768 @ 0x300
800333a: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
800333c: 68fb ldr r3, [r7, #12]
800333e: 2b00 cmp r3, #0
8003340: d02e beq.n 80033a0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8003342: 687b ldr r3, [r7, #4]
8003344: 685b ldr r3, [r3, #4]
8003346: f403 7340 and.w r3, r3, #768 @ 0x300
800334a: 68fa ldr r2, [r7, #12]
800334c: 429a cmp r2, r3
800334e: d027 beq.n 80033a0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8003350: 4b2e ldr r3, [pc, #184] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003352: 6a1b ldr r3, [r3, #32]
8003354: f423 7340 bic.w r3, r3, #768 @ 0x300
8003358: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
800335a: 4b2e ldr r3, [pc, #184] @ (8003414 <HAL_RCCEx_PeriphCLKConfig+0x168>)
800335c: 2201 movs r2, #1
800335e: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8003360: 4b2c ldr r3, [pc, #176] @ (8003414 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8003362: 2200 movs r2, #0
8003364: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8003366: 4a29 ldr r2, [pc, #164] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003368: 68fb ldr r3, [r7, #12]
800336a: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
800336c: 68fb ldr r3, [r7, #12]
800336e: f003 0301 and.w r3, r3, #1
8003372: 2b00 cmp r3, #0
8003374: d014 beq.n 80033a0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8003376: f7fd fbbf bl 8000af8 <HAL_GetTick>
800337a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800337c: e00a b.n 8003394 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800337e: f7fd fbbb bl 8000af8 <HAL_GetTick>
8003382: 4602 mov r2, r0
8003384: 693b ldr r3, [r7, #16]
8003386: 1ad3 subs r3, r2, r3
8003388: f241 3288 movw r2, #5000 @ 0x1388
800338c: 4293 cmp r3, r2
800338e: d901 bls.n 8003394 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8003390: 2303 movs r3, #3
8003392: e036 b.n 8003402 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8003394: 4b1d ldr r3, [pc, #116] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8003396: 6a1b ldr r3, [r3, #32]
8003398: f003 0302 and.w r3, r3, #2
800339c: 2b00 cmp r3, #0
800339e: d0ee beq.n 800337e <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
80033a0: 4b1a ldr r3, [pc, #104] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80033a2: 6a1b ldr r3, [r3, #32]
80033a4: f423 7240 bic.w r2, r3, #768 @ 0x300
80033a8: 687b ldr r3, [r7, #4]
80033aa: 685b ldr r3, [r3, #4]
80033ac: 4917 ldr r1, [pc, #92] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80033ae: 4313 orrs r3, r2
80033b0: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
80033b2: 7dfb ldrb r3, [r7, #23]
80033b4: 2b01 cmp r3, #1
80033b6: d105 bne.n 80033c4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
80033b8: 4b14 ldr r3, [pc, #80] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80033ba: 69db ldr r3, [r3, #28]
80033bc: 4a13 ldr r2, [pc, #76] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80033be: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
80033c2: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
80033c4: 687b ldr r3, [r7, #4]
80033c6: 681b ldr r3, [r3, #0]
80033c8: f003 0302 and.w r3, r3, #2
80033cc: 2b00 cmp r3, #0
80033ce: d008 beq.n 80033e2 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
80033d0: 4b0e ldr r3, [pc, #56] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80033d2: 685b ldr r3, [r3, #4]
80033d4: f423 4240 bic.w r2, r3, #49152 @ 0xc000
80033d8: 687b ldr r3, [r7, #4]
80033da: 689b ldr r3, [r3, #8]
80033dc: 490b ldr r1, [pc, #44] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80033de: 4313 orrs r3, r2
80033e0: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
80033e2: 687b ldr r3, [r7, #4]
80033e4: 681b ldr r3, [r3, #0]
80033e6: f003 0310 and.w r3, r3, #16
80033ea: 2b00 cmp r3, #0
80033ec: d008 beq.n 8003400 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
80033ee: 4b07 ldr r3, [pc, #28] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80033f0: 685b ldr r3, [r3, #4]
80033f2: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
80033f6: 687b ldr r3, [r7, #4]
80033f8: 68db ldr r3, [r3, #12]
80033fa: 4904 ldr r1, [pc, #16] @ (800340c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80033fc: 4313 orrs r3, r2
80033fe: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8003400: 2300 movs r3, #0
}
8003402: 4618 mov r0, r3
8003404: 3718 adds r7, #24
8003406: 46bd mov sp, r7
8003408: bd80 pop {r7, pc}
800340a: bf00 nop
800340c: 40021000 .word 0x40021000
8003410: 40007000 .word 0x40007000
8003414: 42420440 .word 0x42420440
08003418 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8003418: b580 push {r7, lr}
800341a: b082 sub sp, #8
800341c: af00 add r7, sp, #0
800341e: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8003420: 687b ldr r3, [r7, #4]
8003422: 2b00 cmp r3, #0
8003424: d101 bne.n 800342a <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8003426: 2301 movs r3, #1
8003428: e041 b.n 80034ae <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
800342a: 687b ldr r3, [r7, #4]
800342c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8003430: b2db uxtb r3, r3
8003432: 2b00 cmp r3, #0
8003434: d106 bne.n 8003444 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8003436: 687b ldr r3, [r7, #4]
8003438: 2200 movs r2, #0
800343a: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
800343e: 6878 ldr r0, [r7, #4]
8003440: f7fd f99e bl 8000780 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8003444: 687b ldr r3, [r7, #4]
8003446: 2202 movs r2, #2
8003448: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
800344c: 687b ldr r3, [r7, #4]
800344e: 681a ldr r2, [r3, #0]
8003450: 687b ldr r3, [r7, #4]
8003452: 3304 adds r3, #4
8003454: 4619 mov r1, r3
8003456: 4610 mov r0, r2
8003458: f000 fab2 bl 80039c0 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
800345c: 687b ldr r3, [r7, #4]
800345e: 2201 movs r2, #1
8003460: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003464: 687b ldr r3, [r7, #4]
8003466: 2201 movs r2, #1
8003468: f883 203e strb.w r2, [r3, #62] @ 0x3e
800346c: 687b ldr r3, [r7, #4]
800346e: 2201 movs r2, #1
8003470: f883 203f strb.w r2, [r3, #63] @ 0x3f
8003474: 687b ldr r3, [r7, #4]
8003476: 2201 movs r2, #1
8003478: f883 2040 strb.w r2, [r3, #64] @ 0x40
800347c: 687b ldr r3, [r7, #4]
800347e: 2201 movs r2, #1
8003480: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003484: 687b ldr r3, [r7, #4]
8003486: 2201 movs r2, #1
8003488: f883 2042 strb.w r2, [r3, #66] @ 0x42
800348c: 687b ldr r3, [r7, #4]
800348e: 2201 movs r2, #1
8003490: f883 2043 strb.w r2, [r3, #67] @ 0x43
8003494: 687b ldr r3, [r7, #4]
8003496: 2201 movs r2, #1
8003498: f883 2044 strb.w r2, [r3, #68] @ 0x44
800349c: 687b ldr r3, [r7, #4]
800349e: 2201 movs r2, #1
80034a0: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
80034a4: 687b ldr r3, [r7, #4]
80034a6: 2201 movs r2, #1
80034a8: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
80034ac: 2300 movs r3, #0
}
80034ae: 4618 mov r0, r3
80034b0: 3708 adds r7, #8
80034b2: 46bd mov sp, r7
80034b4: bd80 pop {r7, pc}
080034b6 <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
80034b6: b580 push {r7, lr}
80034b8: b082 sub sp, #8
80034ba: af00 add r7, sp, #0
80034bc: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
80034be: 687b ldr r3, [r7, #4]
80034c0: 2b00 cmp r3, #0
80034c2: d101 bne.n 80034c8 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
80034c4: 2301 movs r3, #1
80034c6: e041 b.n 800354c <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
80034c8: 687b ldr r3, [r7, #4]
80034ca: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
80034ce: b2db uxtb r3, r3
80034d0: 2b00 cmp r3, #0
80034d2: d106 bne.n 80034e2 <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
80034d4: 687b ldr r3, [r7, #4]
80034d6: 2200 movs r2, #0
80034d8: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
80034dc: 6878 ldr r0, [r7, #4]
80034de: f000 f839 bl 8003554 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
80034e2: 687b ldr r3, [r7, #4]
80034e4: 2202 movs r2, #2
80034e6: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
80034ea: 687b ldr r3, [r7, #4]
80034ec: 681a ldr r2, [r3, #0]
80034ee: 687b ldr r3, [r7, #4]
80034f0: 3304 adds r3, #4
80034f2: 4619 mov r1, r3
80034f4: 4610 mov r0, r2
80034f6: f000 fa63 bl 80039c0 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
80034fa: 687b ldr r3, [r7, #4]
80034fc: 2201 movs r2, #1
80034fe: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003502: 687b ldr r3, [r7, #4]
8003504: 2201 movs r2, #1
8003506: f883 203e strb.w r2, [r3, #62] @ 0x3e
800350a: 687b ldr r3, [r7, #4]
800350c: 2201 movs r2, #1
800350e: f883 203f strb.w r2, [r3, #63] @ 0x3f
8003512: 687b ldr r3, [r7, #4]
8003514: 2201 movs r2, #1
8003516: f883 2040 strb.w r2, [r3, #64] @ 0x40
800351a: 687b ldr r3, [r7, #4]
800351c: 2201 movs r2, #1
800351e: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8003522: 687b ldr r3, [r7, #4]
8003524: 2201 movs r2, #1
8003526: f883 2042 strb.w r2, [r3, #66] @ 0x42
800352a: 687b ldr r3, [r7, #4]
800352c: 2201 movs r2, #1
800352e: f883 2043 strb.w r2, [r3, #67] @ 0x43
8003532: 687b ldr r3, [r7, #4]
8003534: 2201 movs r2, #1
8003536: f883 2044 strb.w r2, [r3, #68] @ 0x44
800353a: 687b ldr r3, [r7, #4]
800353c: 2201 movs r2, #1
800353e: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8003542: 687b ldr r3, [r7, #4]
8003544: 2201 movs r2, #1
8003546: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800354a: 2300 movs r3, #0
}
800354c: 4618 mov r0, r3
800354e: 3708 adds r7, #8
8003550: 46bd mov sp, r7
8003552: bd80 pop {r7, pc}
08003554 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8003554: b480 push {r7}
8003556: b083 sub sp, #12
8003558: af00 add r7, sp, #0
800355a: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
800355c: bf00 nop
800355e: 370c adds r7, #12
8003560: 46bd mov sp, r7
8003562: bc80 pop {r7}
8003564: 4770 bx lr
...
08003568 <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8003568: b580 push {r7, lr}
800356a: b084 sub sp, #16
800356c: af00 add r7, sp, #0
800356e: 6078 str r0, [r7, #4]
8003570: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8003572: 683b ldr r3, [r7, #0]
8003574: 2b00 cmp r3, #0
8003576: d109 bne.n 800358c <HAL_TIM_PWM_Start+0x24>
8003578: 687b ldr r3, [r7, #4]
800357a: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
800357e: b2db uxtb r3, r3
8003580: 2b01 cmp r3, #1
8003582: bf14 ite ne
8003584: 2301 movne r3, #1
8003586: 2300 moveq r3, #0
8003588: b2db uxtb r3, r3
800358a: e022 b.n 80035d2 <HAL_TIM_PWM_Start+0x6a>
800358c: 683b ldr r3, [r7, #0]
800358e: 2b04 cmp r3, #4
8003590: d109 bne.n 80035a6 <HAL_TIM_PWM_Start+0x3e>
8003592: 687b ldr r3, [r7, #4]
8003594: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8003598: b2db uxtb r3, r3
800359a: 2b01 cmp r3, #1
800359c: bf14 ite ne
800359e: 2301 movne r3, #1
80035a0: 2300 moveq r3, #0
80035a2: b2db uxtb r3, r3
80035a4: e015 b.n 80035d2 <HAL_TIM_PWM_Start+0x6a>
80035a6: 683b ldr r3, [r7, #0]
80035a8: 2b08 cmp r3, #8
80035aa: d109 bne.n 80035c0 <HAL_TIM_PWM_Start+0x58>
80035ac: 687b ldr r3, [r7, #4]
80035ae: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
80035b2: b2db uxtb r3, r3
80035b4: 2b01 cmp r3, #1
80035b6: bf14 ite ne
80035b8: 2301 movne r3, #1
80035ba: 2300 moveq r3, #0
80035bc: b2db uxtb r3, r3
80035be: e008 b.n 80035d2 <HAL_TIM_PWM_Start+0x6a>
80035c0: 687b ldr r3, [r7, #4]
80035c2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80035c6: b2db uxtb r3, r3
80035c8: 2b01 cmp r3, #1
80035ca: bf14 ite ne
80035cc: 2301 movne r3, #1
80035ce: 2300 moveq r3, #0
80035d0: b2db uxtb r3, r3
80035d2: 2b00 cmp r3, #0
80035d4: d001 beq.n 80035da <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
80035d6: 2301 movs r3, #1
80035d8: e05e b.n 8003698 <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
80035da: 683b ldr r3, [r7, #0]
80035dc: 2b00 cmp r3, #0
80035de: d104 bne.n 80035ea <HAL_TIM_PWM_Start+0x82>
80035e0: 687b ldr r3, [r7, #4]
80035e2: 2202 movs r2, #2
80035e4: f883 203e strb.w r2, [r3, #62] @ 0x3e
80035e8: e013 b.n 8003612 <HAL_TIM_PWM_Start+0xaa>
80035ea: 683b ldr r3, [r7, #0]
80035ec: 2b04 cmp r3, #4
80035ee: d104 bne.n 80035fa <HAL_TIM_PWM_Start+0x92>
80035f0: 687b ldr r3, [r7, #4]
80035f2: 2202 movs r2, #2
80035f4: f883 203f strb.w r2, [r3, #63] @ 0x3f
80035f8: e00b b.n 8003612 <HAL_TIM_PWM_Start+0xaa>
80035fa: 683b ldr r3, [r7, #0]
80035fc: 2b08 cmp r3, #8
80035fe: d104 bne.n 800360a <HAL_TIM_PWM_Start+0xa2>
8003600: 687b ldr r3, [r7, #4]
8003602: 2202 movs r2, #2
8003604: f883 2040 strb.w r2, [r3, #64] @ 0x40
8003608: e003 b.n 8003612 <HAL_TIM_PWM_Start+0xaa>
800360a: 687b ldr r3, [r7, #4]
800360c: 2202 movs r2, #2
800360e: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
8003612: 687b ldr r3, [r7, #4]
8003614: 681b ldr r3, [r3, #0]
8003616: 2201 movs r2, #1
8003618: 6839 ldr r1, [r7, #0]
800361a: 4618 mov r0, r3
800361c: f000 fc5c bl 8003ed8 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8003620: 687b ldr r3, [r7, #4]
8003622: 681b ldr r3, [r3, #0]
8003624: 4a1e ldr r2, [pc, #120] @ (80036a0 <HAL_TIM_PWM_Start+0x138>)
8003626: 4293 cmp r3, r2
8003628: d107 bne.n 800363a <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
800362a: 687b ldr r3, [r7, #4]
800362c: 681b ldr r3, [r3, #0]
800362e: 6c5a ldr r2, [r3, #68] @ 0x44
8003630: 687b ldr r3, [r7, #4]
8003632: 681b ldr r3, [r3, #0]
8003634: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8003638: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
800363a: 687b ldr r3, [r7, #4]
800363c: 681b ldr r3, [r3, #0]
800363e: 4a18 ldr r2, [pc, #96] @ (80036a0 <HAL_TIM_PWM_Start+0x138>)
8003640: 4293 cmp r3, r2
8003642: d00e beq.n 8003662 <HAL_TIM_PWM_Start+0xfa>
8003644: 687b ldr r3, [r7, #4]
8003646: 681b ldr r3, [r3, #0]
8003648: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800364c: d009 beq.n 8003662 <HAL_TIM_PWM_Start+0xfa>
800364e: 687b ldr r3, [r7, #4]
8003650: 681b ldr r3, [r3, #0]
8003652: 4a14 ldr r2, [pc, #80] @ (80036a4 <HAL_TIM_PWM_Start+0x13c>)
8003654: 4293 cmp r3, r2
8003656: d004 beq.n 8003662 <HAL_TIM_PWM_Start+0xfa>
8003658: 687b ldr r3, [r7, #4]
800365a: 681b ldr r3, [r3, #0]
800365c: 4a12 ldr r2, [pc, #72] @ (80036a8 <HAL_TIM_PWM_Start+0x140>)
800365e: 4293 cmp r3, r2
8003660: d111 bne.n 8003686 <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8003662: 687b ldr r3, [r7, #4]
8003664: 681b ldr r3, [r3, #0]
8003666: 689b ldr r3, [r3, #8]
8003668: f003 0307 and.w r3, r3, #7
800366c: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
800366e: 68fb ldr r3, [r7, #12]
8003670: 2b06 cmp r3, #6
8003672: d010 beq.n 8003696 <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8003674: 687b ldr r3, [r7, #4]
8003676: 681b ldr r3, [r3, #0]
8003678: 681a ldr r2, [r3, #0]
800367a: 687b ldr r3, [r7, #4]
800367c: 681b ldr r3, [r3, #0]
800367e: f042 0201 orr.w r2, r2, #1
8003682: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8003684: e007 b.n 8003696 <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8003686: 687b ldr r3, [r7, #4]
8003688: 681b ldr r3, [r3, #0]
800368a: 681a ldr r2, [r3, #0]
800368c: 687b ldr r3, [r7, #4]
800368e: 681b ldr r3, [r3, #0]
8003690: f042 0201 orr.w r2, r2, #1
8003694: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8003696: 2300 movs r3, #0
}
8003698: 4618 mov r0, r3
800369a: 3710 adds r7, #16
800369c: 46bd mov sp, r7
800369e: bd80 pop {r7, pc}
80036a0: 40012c00 .word 0x40012c00
80036a4: 40000400 .word 0x40000400
80036a8: 40000800 .word 0x40000800
080036ac <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
80036ac: b580 push {r7, lr}
80036ae: b086 sub sp, #24
80036b0: af00 add r7, sp, #0
80036b2: 60f8 str r0, [r7, #12]
80036b4: 60b9 str r1, [r7, #8]
80036b6: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
80036b8: 2300 movs r3, #0
80036ba: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
80036bc: 68fb ldr r3, [r7, #12]
80036be: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
80036c2: 2b01 cmp r3, #1
80036c4: d101 bne.n 80036ca <HAL_TIM_PWM_ConfigChannel+0x1e>
80036c6: 2302 movs r3, #2
80036c8: e0ae b.n 8003828 <HAL_TIM_PWM_ConfigChannel+0x17c>
80036ca: 68fb ldr r3, [r7, #12]
80036cc: 2201 movs r2, #1
80036ce: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
80036d2: 687b ldr r3, [r7, #4]
80036d4: 2b0c cmp r3, #12
80036d6: f200 809f bhi.w 8003818 <HAL_TIM_PWM_ConfigChannel+0x16c>
80036da: a201 add r2, pc, #4 @ (adr r2, 80036e0 <HAL_TIM_PWM_ConfigChannel+0x34>)
80036dc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80036e0: 08003715 .word 0x08003715
80036e4: 08003819 .word 0x08003819
80036e8: 08003819 .word 0x08003819
80036ec: 08003819 .word 0x08003819
80036f0: 08003755 .word 0x08003755
80036f4: 08003819 .word 0x08003819
80036f8: 08003819 .word 0x08003819
80036fc: 08003819 .word 0x08003819
8003700: 08003797 .word 0x08003797
8003704: 08003819 .word 0x08003819
8003708: 08003819 .word 0x08003819
800370c: 08003819 .word 0x08003819
8003710: 080037d7 .word 0x080037d7
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
8003714: 68fb ldr r3, [r7, #12]
8003716: 681b ldr r3, [r3, #0]
8003718: 68b9 ldr r1, [r7, #8]
800371a: 4618 mov r0, r3
800371c: f000 f9be bl 8003a9c <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
8003720: 68fb ldr r3, [r7, #12]
8003722: 681b ldr r3, [r3, #0]
8003724: 699a ldr r2, [r3, #24]
8003726: 68fb ldr r3, [r7, #12]
8003728: 681b ldr r3, [r3, #0]
800372a: f042 0208 orr.w r2, r2, #8
800372e: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
8003730: 68fb ldr r3, [r7, #12]
8003732: 681b ldr r3, [r3, #0]
8003734: 699a ldr r2, [r3, #24]
8003736: 68fb ldr r3, [r7, #12]
8003738: 681b ldr r3, [r3, #0]
800373a: f022 0204 bic.w r2, r2, #4
800373e: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
8003740: 68fb ldr r3, [r7, #12]
8003742: 681b ldr r3, [r3, #0]
8003744: 6999 ldr r1, [r3, #24]
8003746: 68bb ldr r3, [r7, #8]
8003748: 691a ldr r2, [r3, #16]
800374a: 68fb ldr r3, [r7, #12]
800374c: 681b ldr r3, [r3, #0]
800374e: 430a orrs r2, r1
8003750: 619a str r2, [r3, #24]
break;
8003752: e064 b.n 800381e <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
8003754: 68fb ldr r3, [r7, #12]
8003756: 681b ldr r3, [r3, #0]
8003758: 68b9 ldr r1, [r7, #8]
800375a: 4618 mov r0, r3
800375c: f000 fa04 bl 8003b68 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8003760: 68fb ldr r3, [r7, #12]
8003762: 681b ldr r3, [r3, #0]
8003764: 699a ldr r2, [r3, #24]
8003766: 68fb ldr r3, [r7, #12]
8003768: 681b ldr r3, [r3, #0]
800376a: f442 6200 orr.w r2, r2, #2048 @ 0x800
800376e: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8003770: 68fb ldr r3, [r7, #12]
8003772: 681b ldr r3, [r3, #0]
8003774: 699a ldr r2, [r3, #24]
8003776: 68fb ldr r3, [r7, #12]
8003778: 681b ldr r3, [r3, #0]
800377a: f422 6280 bic.w r2, r2, #1024 @ 0x400
800377e: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8003780: 68fb ldr r3, [r7, #12]
8003782: 681b ldr r3, [r3, #0]
8003784: 6999 ldr r1, [r3, #24]
8003786: 68bb ldr r3, [r7, #8]
8003788: 691b ldr r3, [r3, #16]
800378a: 021a lsls r2, r3, #8
800378c: 68fb ldr r3, [r7, #12]
800378e: 681b ldr r3, [r3, #0]
8003790: 430a orrs r2, r1
8003792: 619a str r2, [r3, #24]
break;
8003794: e043 b.n 800381e <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8003796: 68fb ldr r3, [r7, #12]
8003798: 681b ldr r3, [r3, #0]
800379a: 68b9 ldr r1, [r7, #8]
800379c: 4618 mov r0, r3
800379e: f000 fa4d bl 8003c3c <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
80037a2: 68fb ldr r3, [r7, #12]
80037a4: 681b ldr r3, [r3, #0]
80037a6: 69da ldr r2, [r3, #28]
80037a8: 68fb ldr r3, [r7, #12]
80037aa: 681b ldr r3, [r3, #0]
80037ac: f042 0208 orr.w r2, r2, #8
80037b0: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
80037b2: 68fb ldr r3, [r7, #12]
80037b4: 681b ldr r3, [r3, #0]
80037b6: 69da ldr r2, [r3, #28]
80037b8: 68fb ldr r3, [r7, #12]
80037ba: 681b ldr r3, [r3, #0]
80037bc: f022 0204 bic.w r2, r2, #4
80037c0: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
80037c2: 68fb ldr r3, [r7, #12]
80037c4: 681b ldr r3, [r3, #0]
80037c6: 69d9 ldr r1, [r3, #28]
80037c8: 68bb ldr r3, [r7, #8]
80037ca: 691a ldr r2, [r3, #16]
80037cc: 68fb ldr r3, [r7, #12]
80037ce: 681b ldr r3, [r3, #0]
80037d0: 430a orrs r2, r1
80037d2: 61da str r2, [r3, #28]
break;
80037d4: e023 b.n 800381e <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
80037d6: 68fb ldr r3, [r7, #12]
80037d8: 681b ldr r3, [r3, #0]
80037da: 68b9 ldr r1, [r7, #8]
80037dc: 4618 mov r0, r3
80037de: f000 fa97 bl 8003d10 <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
80037e2: 68fb ldr r3, [r7, #12]
80037e4: 681b ldr r3, [r3, #0]
80037e6: 69da ldr r2, [r3, #28]
80037e8: 68fb ldr r3, [r7, #12]
80037ea: 681b ldr r3, [r3, #0]
80037ec: f442 6200 orr.w r2, r2, #2048 @ 0x800
80037f0: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
80037f2: 68fb ldr r3, [r7, #12]
80037f4: 681b ldr r3, [r3, #0]
80037f6: 69da ldr r2, [r3, #28]
80037f8: 68fb ldr r3, [r7, #12]
80037fa: 681b ldr r3, [r3, #0]
80037fc: f422 6280 bic.w r2, r2, #1024 @ 0x400
8003800: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
8003802: 68fb ldr r3, [r7, #12]
8003804: 681b ldr r3, [r3, #0]
8003806: 69d9 ldr r1, [r3, #28]
8003808: 68bb ldr r3, [r7, #8]
800380a: 691b ldr r3, [r3, #16]
800380c: 021a lsls r2, r3, #8
800380e: 68fb ldr r3, [r7, #12]
8003810: 681b ldr r3, [r3, #0]
8003812: 430a orrs r2, r1
8003814: 61da str r2, [r3, #28]
break;
8003816: e002 b.n 800381e <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
8003818: 2301 movs r3, #1
800381a: 75fb strb r3, [r7, #23]
break;
800381c: bf00 nop
}
__HAL_UNLOCK(htim);
800381e: 68fb ldr r3, [r7, #12]
8003820: 2200 movs r2, #0
8003822: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8003826: 7dfb ldrb r3, [r7, #23]
}
8003828: 4618 mov r0, r3
800382a: 3718 adds r7, #24
800382c: 46bd mov sp, r7
800382e: bd80 pop {r7, pc}
08003830 <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
8003830: b580 push {r7, lr}
8003832: b084 sub sp, #16
8003834: af00 add r7, sp, #0
8003836: 6078 str r0, [r7, #4]
8003838: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
800383a: 2300 movs r3, #0
800383c: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
800383e: 687b ldr r3, [r7, #4]
8003840: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8003844: 2b01 cmp r3, #1
8003846: d101 bne.n 800384c <HAL_TIM_ConfigClockSource+0x1c>
8003848: 2302 movs r3, #2
800384a: e0b4 b.n 80039b6 <HAL_TIM_ConfigClockSource+0x186>
800384c: 687b ldr r3, [r7, #4]
800384e: 2201 movs r2, #1
8003850: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
8003854: 687b ldr r3, [r7, #4]
8003856: 2202 movs r2, #2
8003858: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
800385c: 687b ldr r3, [r7, #4]
800385e: 681b ldr r3, [r3, #0]
8003860: 689b ldr r3, [r3, #8]
8003862: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
8003864: 68bb ldr r3, [r7, #8]
8003866: f023 0377 bic.w r3, r3, #119 @ 0x77
800386a: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
800386c: 68bb ldr r3, [r7, #8]
800386e: f423 437f bic.w r3, r3, #65280 @ 0xff00
8003872: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
8003874: 687b ldr r3, [r7, #4]
8003876: 681b ldr r3, [r3, #0]
8003878: 68ba ldr r2, [r7, #8]
800387a: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
800387c: 683b ldr r3, [r7, #0]
800387e: 681b ldr r3, [r3, #0]
8003880: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8003884: d03e beq.n 8003904 <HAL_TIM_ConfigClockSource+0xd4>
8003886: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
800388a: f200 8087 bhi.w 800399c <HAL_TIM_ConfigClockSource+0x16c>
800388e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8003892: f000 8086 beq.w 80039a2 <HAL_TIM_ConfigClockSource+0x172>
8003896: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800389a: d87f bhi.n 800399c <HAL_TIM_ConfigClockSource+0x16c>
800389c: 2b70 cmp r3, #112 @ 0x70
800389e: d01a beq.n 80038d6 <HAL_TIM_ConfigClockSource+0xa6>
80038a0: 2b70 cmp r3, #112 @ 0x70
80038a2: d87b bhi.n 800399c <HAL_TIM_ConfigClockSource+0x16c>
80038a4: 2b60 cmp r3, #96 @ 0x60
80038a6: d050 beq.n 800394a <HAL_TIM_ConfigClockSource+0x11a>
80038a8: 2b60 cmp r3, #96 @ 0x60
80038aa: d877 bhi.n 800399c <HAL_TIM_ConfigClockSource+0x16c>
80038ac: 2b50 cmp r3, #80 @ 0x50
80038ae: d03c beq.n 800392a <HAL_TIM_ConfigClockSource+0xfa>
80038b0: 2b50 cmp r3, #80 @ 0x50
80038b2: d873 bhi.n 800399c <HAL_TIM_ConfigClockSource+0x16c>
80038b4: 2b40 cmp r3, #64 @ 0x40
80038b6: d058 beq.n 800396a <HAL_TIM_ConfigClockSource+0x13a>
80038b8: 2b40 cmp r3, #64 @ 0x40
80038ba: d86f bhi.n 800399c <HAL_TIM_ConfigClockSource+0x16c>
80038bc: 2b30 cmp r3, #48 @ 0x30
80038be: d064 beq.n 800398a <HAL_TIM_ConfigClockSource+0x15a>
80038c0: 2b30 cmp r3, #48 @ 0x30
80038c2: d86b bhi.n 800399c <HAL_TIM_ConfigClockSource+0x16c>
80038c4: 2b20 cmp r3, #32
80038c6: d060 beq.n 800398a <HAL_TIM_ConfigClockSource+0x15a>
80038c8: 2b20 cmp r3, #32
80038ca: d867 bhi.n 800399c <HAL_TIM_ConfigClockSource+0x16c>
80038cc: 2b00 cmp r3, #0
80038ce: d05c beq.n 800398a <HAL_TIM_ConfigClockSource+0x15a>
80038d0: 2b10 cmp r3, #16
80038d2: d05a beq.n 800398a <HAL_TIM_ConfigClockSource+0x15a>
80038d4: e062 b.n 800399c <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
80038d6: 687b ldr r3, [r7, #4]
80038d8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
80038da: 683b ldr r3, [r7, #0]
80038dc: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
80038de: 683b ldr r3, [r7, #0]
80038e0: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
80038e2: 683b ldr r3, [r7, #0]
80038e4: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80038e6: f000 fad8 bl 8003e9a <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
80038ea: 687b ldr r3, [r7, #4]
80038ec: 681b ldr r3, [r3, #0]
80038ee: 689b ldr r3, [r3, #8]
80038f0: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
80038f2: 68bb ldr r3, [r7, #8]
80038f4: f043 0377 orr.w r3, r3, #119 @ 0x77
80038f8: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80038fa: 687b ldr r3, [r7, #4]
80038fc: 681b ldr r3, [r3, #0]
80038fe: 68ba ldr r2, [r7, #8]
8003900: 609a str r2, [r3, #8]
break;
8003902: e04f b.n 80039a4 <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8003904: 687b ldr r3, [r7, #4]
8003906: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8003908: 683b ldr r3, [r7, #0]
800390a: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
800390c: 683b ldr r3, [r7, #0]
800390e: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8003910: 683b ldr r3, [r7, #0]
8003912: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8003914: f000 fac1 bl 8003e9a <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
8003918: 687b ldr r3, [r7, #4]
800391a: 681b ldr r3, [r3, #0]
800391c: 689a ldr r2, [r3, #8]
800391e: 687b ldr r3, [r7, #4]
8003920: 681b ldr r3, [r3, #0]
8003922: f442 4280 orr.w r2, r2, #16384 @ 0x4000
8003926: 609a str r2, [r3, #8]
break;
8003928: e03c b.n 80039a4 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
800392a: 687b ldr r3, [r7, #4]
800392c: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
800392e: 683b ldr r3, [r7, #0]
8003930: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8003932: 683b ldr r3, [r7, #0]
8003934: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8003936: 461a mov r2, r3
8003938: f000 fa38 bl 8003dac <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
800393c: 687b ldr r3, [r7, #4]
800393e: 681b ldr r3, [r3, #0]
8003940: 2150 movs r1, #80 @ 0x50
8003942: 4618 mov r0, r3
8003944: f000 fa8f bl 8003e66 <TIM_ITRx_SetConfig>
break;
8003948: e02c b.n 80039a4 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
800394a: 687b ldr r3, [r7, #4]
800394c: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
800394e: 683b ldr r3, [r7, #0]
8003950: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8003952: 683b ldr r3, [r7, #0]
8003954: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
8003956: 461a mov r2, r3
8003958: f000 fa56 bl 8003e08 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
800395c: 687b ldr r3, [r7, #4]
800395e: 681b ldr r3, [r3, #0]
8003960: 2160 movs r1, #96 @ 0x60
8003962: 4618 mov r0, r3
8003964: f000 fa7f bl 8003e66 <TIM_ITRx_SetConfig>
break;
8003968: e01c b.n 80039a4 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
800396a: 687b ldr r3, [r7, #4]
800396c: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
800396e: 683b ldr r3, [r7, #0]
8003970: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8003972: 683b ldr r3, [r7, #0]
8003974: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8003976: 461a mov r2, r3
8003978: f000 fa18 bl 8003dac <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
800397c: 687b ldr r3, [r7, #4]
800397e: 681b ldr r3, [r3, #0]
8003980: 2140 movs r1, #64 @ 0x40
8003982: 4618 mov r0, r3
8003984: f000 fa6f bl 8003e66 <TIM_ITRx_SetConfig>
break;
8003988: e00c b.n 80039a4 <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
800398a: 687b ldr r3, [r7, #4]
800398c: 681a ldr r2, [r3, #0]
800398e: 683b ldr r3, [r7, #0]
8003990: 681b ldr r3, [r3, #0]
8003992: 4619 mov r1, r3
8003994: 4610 mov r0, r2
8003996: f000 fa66 bl 8003e66 <TIM_ITRx_SetConfig>
break;
800399a: e003 b.n 80039a4 <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
800399c: 2301 movs r3, #1
800399e: 73fb strb r3, [r7, #15]
break;
80039a0: e000 b.n 80039a4 <HAL_TIM_ConfigClockSource+0x174>
break;
80039a2: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
80039a4: 687b ldr r3, [r7, #4]
80039a6: 2201 movs r2, #1
80039a8: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
80039ac: 687b ldr r3, [r7, #4]
80039ae: 2200 movs r2, #0
80039b0: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
80039b4: 7bfb ldrb r3, [r7, #15]
}
80039b6: 4618 mov r0, r3
80039b8: 3710 adds r7, #16
80039ba: 46bd mov sp, r7
80039bc: bd80 pop {r7, pc}
...
080039c0 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
80039c0: b480 push {r7}
80039c2: b085 sub sp, #20
80039c4: af00 add r7, sp, #0
80039c6: 6078 str r0, [r7, #4]
80039c8: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
80039ca: 687b ldr r3, [r7, #4]
80039cc: 681b ldr r3, [r3, #0]
80039ce: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
80039d0: 687b ldr r3, [r7, #4]
80039d2: 4a2f ldr r2, [pc, #188] @ (8003a90 <TIM_Base_SetConfig+0xd0>)
80039d4: 4293 cmp r3, r2
80039d6: d00b beq.n 80039f0 <TIM_Base_SetConfig+0x30>
80039d8: 687b ldr r3, [r7, #4]
80039da: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80039de: d007 beq.n 80039f0 <TIM_Base_SetConfig+0x30>
80039e0: 687b ldr r3, [r7, #4]
80039e2: 4a2c ldr r2, [pc, #176] @ (8003a94 <TIM_Base_SetConfig+0xd4>)
80039e4: 4293 cmp r3, r2
80039e6: d003 beq.n 80039f0 <TIM_Base_SetConfig+0x30>
80039e8: 687b ldr r3, [r7, #4]
80039ea: 4a2b ldr r2, [pc, #172] @ (8003a98 <TIM_Base_SetConfig+0xd8>)
80039ec: 4293 cmp r3, r2
80039ee: d108 bne.n 8003a02 <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
80039f0: 68fb ldr r3, [r7, #12]
80039f2: f023 0370 bic.w r3, r3, #112 @ 0x70
80039f6: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
80039f8: 683b ldr r3, [r7, #0]
80039fa: 685b ldr r3, [r3, #4]
80039fc: 68fa ldr r2, [r7, #12]
80039fe: 4313 orrs r3, r2
8003a00: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
8003a02: 687b ldr r3, [r7, #4]
8003a04: 4a22 ldr r2, [pc, #136] @ (8003a90 <TIM_Base_SetConfig+0xd0>)
8003a06: 4293 cmp r3, r2
8003a08: d00b beq.n 8003a22 <TIM_Base_SetConfig+0x62>
8003a0a: 687b ldr r3, [r7, #4]
8003a0c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8003a10: d007 beq.n 8003a22 <TIM_Base_SetConfig+0x62>
8003a12: 687b ldr r3, [r7, #4]
8003a14: 4a1f ldr r2, [pc, #124] @ (8003a94 <TIM_Base_SetConfig+0xd4>)
8003a16: 4293 cmp r3, r2
8003a18: d003 beq.n 8003a22 <TIM_Base_SetConfig+0x62>
8003a1a: 687b ldr r3, [r7, #4]
8003a1c: 4a1e ldr r2, [pc, #120] @ (8003a98 <TIM_Base_SetConfig+0xd8>)
8003a1e: 4293 cmp r3, r2
8003a20: d108 bne.n 8003a34 <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
8003a22: 68fb ldr r3, [r7, #12]
8003a24: f423 7340 bic.w r3, r3, #768 @ 0x300
8003a28: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8003a2a: 683b ldr r3, [r7, #0]
8003a2c: 68db ldr r3, [r3, #12]
8003a2e: 68fa ldr r2, [r7, #12]
8003a30: 4313 orrs r3, r2
8003a32: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8003a34: 68fb ldr r3, [r7, #12]
8003a36: f023 0280 bic.w r2, r3, #128 @ 0x80
8003a3a: 683b ldr r3, [r7, #0]
8003a3c: 695b ldr r3, [r3, #20]
8003a3e: 4313 orrs r3, r2
8003a40: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
8003a42: 687b ldr r3, [r7, #4]
8003a44: 68fa ldr r2, [r7, #12]
8003a46: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8003a48: 683b ldr r3, [r7, #0]
8003a4a: 689a ldr r2, [r3, #8]
8003a4c: 687b ldr r3, [r7, #4]
8003a4e: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8003a50: 683b ldr r3, [r7, #0]
8003a52: 681a ldr r2, [r3, #0]
8003a54: 687b ldr r3, [r7, #4]
8003a56: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8003a58: 687b ldr r3, [r7, #4]
8003a5a: 4a0d ldr r2, [pc, #52] @ (8003a90 <TIM_Base_SetConfig+0xd0>)
8003a5c: 4293 cmp r3, r2
8003a5e: d103 bne.n 8003a68 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8003a60: 683b ldr r3, [r7, #0]
8003a62: 691a ldr r2, [r3, #16]
8003a64: 687b ldr r3, [r7, #4]
8003a66: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8003a68: 687b ldr r3, [r7, #4]
8003a6a: 2201 movs r2, #1
8003a6c: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
8003a6e: 687b ldr r3, [r7, #4]
8003a70: 691b ldr r3, [r3, #16]
8003a72: f003 0301 and.w r3, r3, #1
8003a76: 2b00 cmp r3, #0
8003a78: d005 beq.n 8003a86 <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
8003a7a: 687b ldr r3, [r7, #4]
8003a7c: 691b ldr r3, [r3, #16]
8003a7e: f023 0201 bic.w r2, r3, #1
8003a82: 687b ldr r3, [r7, #4]
8003a84: 611a str r2, [r3, #16]
}
}
8003a86: bf00 nop
8003a88: 3714 adds r7, #20
8003a8a: 46bd mov sp, r7
8003a8c: bc80 pop {r7}
8003a8e: 4770 bx lr
8003a90: 40012c00 .word 0x40012c00
8003a94: 40000400 .word 0x40000400
8003a98: 40000800 .word 0x40000800
08003a9c <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8003a9c: b480 push {r7}
8003a9e: b087 sub sp, #28
8003aa0: af00 add r7, sp, #0
8003aa2: 6078 str r0, [r7, #4]
8003aa4: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8003aa6: 687b ldr r3, [r7, #4]
8003aa8: 6a1b ldr r3, [r3, #32]
8003aaa: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
8003aac: 687b ldr r3, [r7, #4]
8003aae: 6a1b ldr r3, [r3, #32]
8003ab0: f023 0201 bic.w r2, r3, #1
8003ab4: 687b ldr r3, [r7, #4]
8003ab6: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8003ab8: 687b ldr r3, [r7, #4]
8003aba: 685b ldr r3, [r3, #4]
8003abc: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8003abe: 687b ldr r3, [r7, #4]
8003ac0: 699b ldr r3, [r3, #24]
8003ac2: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
8003ac4: 68fb ldr r3, [r7, #12]
8003ac6: f023 0370 bic.w r3, r3, #112 @ 0x70
8003aca: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
8003acc: 68fb ldr r3, [r7, #12]
8003ace: f023 0303 bic.w r3, r3, #3
8003ad2: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8003ad4: 683b ldr r3, [r7, #0]
8003ad6: 681b ldr r3, [r3, #0]
8003ad8: 68fa ldr r2, [r7, #12]
8003ada: 4313 orrs r3, r2
8003adc: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
8003ade: 697b ldr r3, [r7, #20]
8003ae0: f023 0302 bic.w r3, r3, #2
8003ae4: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
8003ae6: 683b ldr r3, [r7, #0]
8003ae8: 689b ldr r3, [r3, #8]
8003aea: 697a ldr r2, [r7, #20]
8003aec: 4313 orrs r3, r2
8003aee: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
8003af0: 687b ldr r3, [r7, #4]
8003af2: 4a1c ldr r2, [pc, #112] @ (8003b64 <TIM_OC1_SetConfig+0xc8>)
8003af4: 4293 cmp r3, r2
8003af6: d10c bne.n 8003b12 <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
8003af8: 697b ldr r3, [r7, #20]
8003afa: f023 0308 bic.w r3, r3, #8
8003afe: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
8003b00: 683b ldr r3, [r7, #0]
8003b02: 68db ldr r3, [r3, #12]
8003b04: 697a ldr r2, [r7, #20]
8003b06: 4313 orrs r3, r2
8003b08: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
8003b0a: 697b ldr r3, [r7, #20]
8003b0c: f023 0304 bic.w r3, r3, #4
8003b10: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8003b12: 687b ldr r3, [r7, #4]
8003b14: 4a13 ldr r2, [pc, #76] @ (8003b64 <TIM_OC1_SetConfig+0xc8>)
8003b16: 4293 cmp r3, r2
8003b18: d111 bne.n 8003b3e <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
8003b1a: 693b ldr r3, [r7, #16]
8003b1c: f423 7380 bic.w r3, r3, #256 @ 0x100
8003b20: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
8003b22: 693b ldr r3, [r7, #16]
8003b24: f423 7300 bic.w r3, r3, #512 @ 0x200
8003b28: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
8003b2a: 683b ldr r3, [r7, #0]
8003b2c: 695b ldr r3, [r3, #20]
8003b2e: 693a ldr r2, [r7, #16]
8003b30: 4313 orrs r3, r2
8003b32: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
8003b34: 683b ldr r3, [r7, #0]
8003b36: 699b ldr r3, [r3, #24]
8003b38: 693a ldr r2, [r7, #16]
8003b3a: 4313 orrs r3, r2
8003b3c: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8003b3e: 687b ldr r3, [r7, #4]
8003b40: 693a ldr r2, [r7, #16]
8003b42: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8003b44: 687b ldr r3, [r7, #4]
8003b46: 68fa ldr r2, [r7, #12]
8003b48: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8003b4a: 683b ldr r3, [r7, #0]
8003b4c: 685a ldr r2, [r3, #4]
8003b4e: 687b ldr r3, [r7, #4]
8003b50: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8003b52: 687b ldr r3, [r7, #4]
8003b54: 697a ldr r2, [r7, #20]
8003b56: 621a str r2, [r3, #32]
}
8003b58: bf00 nop
8003b5a: 371c adds r7, #28
8003b5c: 46bd mov sp, r7
8003b5e: bc80 pop {r7}
8003b60: 4770 bx lr
8003b62: bf00 nop
8003b64: 40012c00 .word 0x40012c00
08003b68 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8003b68: b480 push {r7}
8003b6a: b087 sub sp, #28
8003b6c: af00 add r7, sp, #0
8003b6e: 6078 str r0, [r7, #4]
8003b70: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8003b72: 687b ldr r3, [r7, #4]
8003b74: 6a1b ldr r3, [r3, #32]
8003b76: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
8003b78: 687b ldr r3, [r7, #4]
8003b7a: 6a1b ldr r3, [r3, #32]
8003b7c: f023 0210 bic.w r2, r3, #16
8003b80: 687b ldr r3, [r7, #4]
8003b82: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8003b84: 687b ldr r3, [r7, #4]
8003b86: 685b ldr r3, [r3, #4]
8003b88: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8003b8a: 687b ldr r3, [r7, #4]
8003b8c: 699b ldr r3, [r3, #24]
8003b8e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
8003b90: 68fb ldr r3, [r7, #12]
8003b92: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003b96: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
8003b98: 68fb ldr r3, [r7, #12]
8003b9a: f423 7340 bic.w r3, r3, #768 @ 0x300
8003b9e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8003ba0: 683b ldr r3, [r7, #0]
8003ba2: 681b ldr r3, [r3, #0]
8003ba4: 021b lsls r3, r3, #8
8003ba6: 68fa ldr r2, [r7, #12]
8003ba8: 4313 orrs r3, r2
8003baa: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
8003bac: 697b ldr r3, [r7, #20]
8003bae: f023 0320 bic.w r3, r3, #32
8003bb2: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
8003bb4: 683b ldr r3, [r7, #0]
8003bb6: 689b ldr r3, [r3, #8]
8003bb8: 011b lsls r3, r3, #4
8003bba: 697a ldr r2, [r7, #20]
8003bbc: 4313 orrs r3, r2
8003bbe: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
8003bc0: 687b ldr r3, [r7, #4]
8003bc2: 4a1d ldr r2, [pc, #116] @ (8003c38 <TIM_OC2_SetConfig+0xd0>)
8003bc4: 4293 cmp r3, r2
8003bc6: d10d bne.n 8003be4 <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
8003bc8: 697b ldr r3, [r7, #20]
8003bca: f023 0380 bic.w r3, r3, #128 @ 0x80
8003bce: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
8003bd0: 683b ldr r3, [r7, #0]
8003bd2: 68db ldr r3, [r3, #12]
8003bd4: 011b lsls r3, r3, #4
8003bd6: 697a ldr r2, [r7, #20]
8003bd8: 4313 orrs r3, r2
8003bda: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
8003bdc: 697b ldr r3, [r7, #20]
8003bde: f023 0340 bic.w r3, r3, #64 @ 0x40
8003be2: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8003be4: 687b ldr r3, [r7, #4]
8003be6: 4a14 ldr r2, [pc, #80] @ (8003c38 <TIM_OC2_SetConfig+0xd0>)
8003be8: 4293 cmp r3, r2
8003bea: d113 bne.n 8003c14 <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
8003bec: 693b ldr r3, [r7, #16]
8003bee: f423 6380 bic.w r3, r3, #1024 @ 0x400
8003bf2: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
8003bf4: 693b ldr r3, [r7, #16]
8003bf6: f423 6300 bic.w r3, r3, #2048 @ 0x800
8003bfa: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8003bfc: 683b ldr r3, [r7, #0]
8003bfe: 695b ldr r3, [r3, #20]
8003c00: 009b lsls r3, r3, #2
8003c02: 693a ldr r2, [r7, #16]
8003c04: 4313 orrs r3, r2
8003c06: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
8003c08: 683b ldr r3, [r7, #0]
8003c0a: 699b ldr r3, [r3, #24]
8003c0c: 009b lsls r3, r3, #2
8003c0e: 693a ldr r2, [r7, #16]
8003c10: 4313 orrs r3, r2
8003c12: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8003c14: 687b ldr r3, [r7, #4]
8003c16: 693a ldr r2, [r7, #16]
8003c18: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8003c1a: 687b ldr r3, [r7, #4]
8003c1c: 68fa ldr r2, [r7, #12]
8003c1e: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
8003c20: 683b ldr r3, [r7, #0]
8003c22: 685a ldr r2, [r3, #4]
8003c24: 687b ldr r3, [r7, #4]
8003c26: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8003c28: 687b ldr r3, [r7, #4]
8003c2a: 697a ldr r2, [r7, #20]
8003c2c: 621a str r2, [r3, #32]
}
8003c2e: bf00 nop
8003c30: 371c adds r7, #28
8003c32: 46bd mov sp, r7
8003c34: bc80 pop {r7}
8003c36: 4770 bx lr
8003c38: 40012c00 .word 0x40012c00
08003c3c <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8003c3c: b480 push {r7}
8003c3e: b087 sub sp, #28
8003c40: af00 add r7, sp, #0
8003c42: 6078 str r0, [r7, #4]
8003c44: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8003c46: 687b ldr r3, [r7, #4]
8003c48: 6a1b ldr r3, [r3, #32]
8003c4a: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8003c4c: 687b ldr r3, [r7, #4]
8003c4e: 6a1b ldr r3, [r3, #32]
8003c50: f423 7280 bic.w r2, r3, #256 @ 0x100
8003c54: 687b ldr r3, [r7, #4]
8003c56: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8003c58: 687b ldr r3, [r7, #4]
8003c5a: 685b ldr r3, [r3, #4]
8003c5c: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8003c5e: 687b ldr r3, [r7, #4]
8003c60: 69db ldr r3, [r3, #28]
8003c62: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
8003c64: 68fb ldr r3, [r7, #12]
8003c66: f023 0370 bic.w r3, r3, #112 @ 0x70
8003c6a: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8003c6c: 68fb ldr r3, [r7, #12]
8003c6e: f023 0303 bic.w r3, r3, #3
8003c72: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8003c74: 683b ldr r3, [r7, #0]
8003c76: 681b ldr r3, [r3, #0]
8003c78: 68fa ldr r2, [r7, #12]
8003c7a: 4313 orrs r3, r2
8003c7c: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
8003c7e: 697b ldr r3, [r7, #20]
8003c80: f423 7300 bic.w r3, r3, #512 @ 0x200
8003c84: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
8003c86: 683b ldr r3, [r7, #0]
8003c88: 689b ldr r3, [r3, #8]
8003c8a: 021b lsls r3, r3, #8
8003c8c: 697a ldr r2, [r7, #20]
8003c8e: 4313 orrs r3, r2
8003c90: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
8003c92: 687b ldr r3, [r7, #4]
8003c94: 4a1d ldr r2, [pc, #116] @ (8003d0c <TIM_OC3_SetConfig+0xd0>)
8003c96: 4293 cmp r3, r2
8003c98: d10d bne.n 8003cb6 <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
8003c9a: 697b ldr r3, [r7, #20]
8003c9c: f423 6300 bic.w r3, r3, #2048 @ 0x800
8003ca0: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
8003ca2: 683b ldr r3, [r7, #0]
8003ca4: 68db ldr r3, [r3, #12]
8003ca6: 021b lsls r3, r3, #8
8003ca8: 697a ldr r2, [r7, #20]
8003caa: 4313 orrs r3, r2
8003cac: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
8003cae: 697b ldr r3, [r7, #20]
8003cb0: f423 6380 bic.w r3, r3, #1024 @ 0x400
8003cb4: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8003cb6: 687b ldr r3, [r7, #4]
8003cb8: 4a14 ldr r2, [pc, #80] @ (8003d0c <TIM_OC3_SetConfig+0xd0>)
8003cba: 4293 cmp r3, r2
8003cbc: d113 bne.n 8003ce6 <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
8003cbe: 693b ldr r3, [r7, #16]
8003cc0: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8003cc4: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
8003cc6: 693b ldr r3, [r7, #16]
8003cc8: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8003ccc: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
8003cce: 683b ldr r3, [r7, #0]
8003cd0: 695b ldr r3, [r3, #20]
8003cd2: 011b lsls r3, r3, #4
8003cd4: 693a ldr r2, [r7, #16]
8003cd6: 4313 orrs r3, r2
8003cd8: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
8003cda: 683b ldr r3, [r7, #0]
8003cdc: 699b ldr r3, [r3, #24]
8003cde: 011b lsls r3, r3, #4
8003ce0: 693a ldr r2, [r7, #16]
8003ce2: 4313 orrs r3, r2
8003ce4: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8003ce6: 687b ldr r3, [r7, #4]
8003ce8: 693a ldr r2, [r7, #16]
8003cea: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8003cec: 687b ldr r3, [r7, #4]
8003cee: 68fa ldr r2, [r7, #12]
8003cf0: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
8003cf2: 683b ldr r3, [r7, #0]
8003cf4: 685a ldr r2, [r3, #4]
8003cf6: 687b ldr r3, [r7, #4]
8003cf8: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8003cfa: 687b ldr r3, [r7, #4]
8003cfc: 697a ldr r2, [r7, #20]
8003cfe: 621a str r2, [r3, #32]
}
8003d00: bf00 nop
8003d02: 371c adds r7, #28
8003d04: 46bd mov sp, r7
8003d06: bc80 pop {r7}
8003d08: 4770 bx lr
8003d0a: bf00 nop
8003d0c: 40012c00 .word 0x40012c00
08003d10 <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8003d10: b480 push {r7}
8003d12: b087 sub sp, #28
8003d14: af00 add r7, sp, #0
8003d16: 6078 str r0, [r7, #4]
8003d18: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8003d1a: 687b ldr r3, [r7, #4]
8003d1c: 6a1b ldr r3, [r3, #32]
8003d1e: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
8003d20: 687b ldr r3, [r7, #4]
8003d22: 6a1b ldr r3, [r3, #32]
8003d24: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8003d28: 687b ldr r3, [r7, #4]
8003d2a: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8003d2c: 687b ldr r3, [r7, #4]
8003d2e: 685b ldr r3, [r3, #4]
8003d30: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8003d32: 687b ldr r3, [r7, #4]
8003d34: 69db ldr r3, [r3, #28]
8003d36: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8003d38: 68fb ldr r3, [r7, #12]
8003d3a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8003d3e: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
8003d40: 68fb ldr r3, [r7, #12]
8003d42: f423 7340 bic.w r3, r3, #768 @ 0x300
8003d46: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8003d48: 683b ldr r3, [r7, #0]
8003d4a: 681b ldr r3, [r3, #0]
8003d4c: 021b lsls r3, r3, #8
8003d4e: 68fa ldr r2, [r7, #12]
8003d50: 4313 orrs r3, r2
8003d52: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8003d54: 693b ldr r3, [r7, #16]
8003d56: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8003d5a: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8003d5c: 683b ldr r3, [r7, #0]
8003d5e: 689b ldr r3, [r3, #8]
8003d60: 031b lsls r3, r3, #12
8003d62: 693a ldr r2, [r7, #16]
8003d64: 4313 orrs r3, r2
8003d66: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
8003d68: 687b ldr r3, [r7, #4]
8003d6a: 4a0f ldr r2, [pc, #60] @ (8003da8 <TIM_OC4_SetConfig+0x98>)
8003d6c: 4293 cmp r3, r2
8003d6e: d109 bne.n 8003d84 <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
8003d70: 697b ldr r3, [r7, #20]
8003d72: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8003d76: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
8003d78: 683b ldr r3, [r7, #0]
8003d7a: 695b ldr r3, [r3, #20]
8003d7c: 019b lsls r3, r3, #6
8003d7e: 697a ldr r2, [r7, #20]
8003d80: 4313 orrs r3, r2
8003d82: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8003d84: 687b ldr r3, [r7, #4]
8003d86: 697a ldr r2, [r7, #20]
8003d88: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8003d8a: 687b ldr r3, [r7, #4]
8003d8c: 68fa ldr r2, [r7, #12]
8003d8e: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
8003d90: 683b ldr r3, [r7, #0]
8003d92: 685a ldr r2, [r3, #4]
8003d94: 687b ldr r3, [r7, #4]
8003d96: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8003d98: 687b ldr r3, [r7, #4]
8003d9a: 693a ldr r2, [r7, #16]
8003d9c: 621a str r2, [r3, #32]
}
8003d9e: bf00 nop
8003da0: 371c adds r7, #28
8003da2: 46bd mov sp, r7
8003da4: bc80 pop {r7}
8003da6: 4770 bx lr
8003da8: 40012c00 .word 0x40012c00
08003dac <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8003dac: b480 push {r7}
8003dae: b087 sub sp, #28
8003db0: af00 add r7, sp, #0
8003db2: 60f8 str r0, [r7, #12]
8003db4: 60b9 str r1, [r7, #8]
8003db6: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
8003db8: 68fb ldr r3, [r7, #12]
8003dba: 6a1b ldr r3, [r3, #32]
8003dbc: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
8003dbe: 68fb ldr r3, [r7, #12]
8003dc0: 6a1b ldr r3, [r3, #32]
8003dc2: f023 0201 bic.w r2, r3, #1
8003dc6: 68fb ldr r3, [r7, #12]
8003dc8: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8003dca: 68fb ldr r3, [r7, #12]
8003dcc: 699b ldr r3, [r3, #24]
8003dce: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
8003dd0: 693b ldr r3, [r7, #16]
8003dd2: f023 03f0 bic.w r3, r3, #240 @ 0xf0
8003dd6: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
8003dd8: 687b ldr r3, [r7, #4]
8003dda: 011b lsls r3, r3, #4
8003ddc: 693a ldr r2, [r7, #16]
8003dde: 4313 orrs r3, r2
8003de0: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
8003de2: 697b ldr r3, [r7, #20]
8003de4: f023 030a bic.w r3, r3, #10
8003de8: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
8003dea: 697a ldr r2, [r7, #20]
8003dec: 68bb ldr r3, [r7, #8]
8003dee: 4313 orrs r3, r2
8003df0: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
8003df2: 68fb ldr r3, [r7, #12]
8003df4: 693a ldr r2, [r7, #16]
8003df6: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8003df8: 68fb ldr r3, [r7, #12]
8003dfa: 697a ldr r2, [r7, #20]
8003dfc: 621a str r2, [r3, #32]
}
8003dfe: bf00 nop
8003e00: 371c adds r7, #28
8003e02: 46bd mov sp, r7
8003e04: bc80 pop {r7}
8003e06: 4770 bx lr
08003e08 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8003e08: b480 push {r7}
8003e0a: b087 sub sp, #28
8003e0c: af00 add r7, sp, #0
8003e0e: 60f8 str r0, [r7, #12]
8003e10: 60b9 str r1, [r7, #8]
8003e12: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
8003e14: 68fb ldr r3, [r7, #12]
8003e16: 6a1b ldr r3, [r3, #32]
8003e18: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
8003e1a: 68fb ldr r3, [r7, #12]
8003e1c: 6a1b ldr r3, [r3, #32]
8003e1e: f023 0210 bic.w r2, r3, #16
8003e22: 68fb ldr r3, [r7, #12]
8003e24: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8003e26: 68fb ldr r3, [r7, #12]
8003e28: 699b ldr r3, [r3, #24]
8003e2a: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
8003e2c: 693b ldr r3, [r7, #16]
8003e2e: f423 4370 bic.w r3, r3, #61440 @ 0xf000
8003e32: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
8003e34: 687b ldr r3, [r7, #4]
8003e36: 031b lsls r3, r3, #12
8003e38: 693a ldr r2, [r7, #16]
8003e3a: 4313 orrs r3, r2
8003e3c: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8003e3e: 697b ldr r3, [r7, #20]
8003e40: f023 03a0 bic.w r3, r3, #160 @ 0xa0
8003e44: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
8003e46: 68bb ldr r3, [r7, #8]
8003e48: 011b lsls r3, r3, #4
8003e4a: 697a ldr r2, [r7, #20]
8003e4c: 4313 orrs r3, r2
8003e4e: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8003e50: 68fb ldr r3, [r7, #12]
8003e52: 693a ldr r2, [r7, #16]
8003e54: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8003e56: 68fb ldr r3, [r7, #12]
8003e58: 697a ldr r2, [r7, #20]
8003e5a: 621a str r2, [r3, #32]
}
8003e5c: bf00 nop
8003e5e: 371c adds r7, #28
8003e60: 46bd mov sp, r7
8003e62: bc80 pop {r7}
8003e64: 4770 bx lr
08003e66 <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
8003e66: b480 push {r7}
8003e68: b085 sub sp, #20
8003e6a: af00 add r7, sp, #0
8003e6c: 6078 str r0, [r7, #4]
8003e6e: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8003e70: 687b ldr r3, [r7, #4]
8003e72: 689b ldr r3, [r3, #8]
8003e74: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
8003e76: 68fb ldr r3, [r7, #12]
8003e78: f023 0370 bic.w r3, r3, #112 @ 0x70
8003e7c: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
8003e7e: 683a ldr r2, [r7, #0]
8003e80: 68fb ldr r3, [r7, #12]
8003e82: 4313 orrs r3, r2
8003e84: f043 0307 orr.w r3, r3, #7
8003e88: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8003e8a: 687b ldr r3, [r7, #4]
8003e8c: 68fa ldr r2, [r7, #12]
8003e8e: 609a str r2, [r3, #8]
}
8003e90: bf00 nop
8003e92: 3714 adds r7, #20
8003e94: 46bd mov sp, r7
8003e96: bc80 pop {r7}
8003e98: 4770 bx lr
08003e9a <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
8003e9a: b480 push {r7}
8003e9c: b087 sub sp, #28
8003e9e: af00 add r7, sp, #0
8003ea0: 60f8 str r0, [r7, #12]
8003ea2: 60b9 str r1, [r7, #8]
8003ea4: 607a str r2, [r7, #4]
8003ea6: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
8003ea8: 68fb ldr r3, [r7, #12]
8003eaa: 689b ldr r3, [r3, #8]
8003eac: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8003eae: 697b ldr r3, [r7, #20]
8003eb0: f423 437f bic.w r3, r3, #65280 @ 0xff00
8003eb4: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
8003eb6: 683b ldr r3, [r7, #0]
8003eb8: 021a lsls r2, r3, #8
8003eba: 687b ldr r3, [r7, #4]
8003ebc: 431a orrs r2, r3
8003ebe: 68bb ldr r3, [r7, #8]
8003ec0: 4313 orrs r3, r2
8003ec2: 697a ldr r2, [r7, #20]
8003ec4: 4313 orrs r3, r2
8003ec6: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8003ec8: 68fb ldr r3, [r7, #12]
8003eca: 697a ldr r2, [r7, #20]
8003ecc: 609a str r2, [r3, #8]
}
8003ece: bf00 nop
8003ed0: 371c adds r7, #28
8003ed2: 46bd mov sp, r7
8003ed4: bc80 pop {r7}
8003ed6: 4770 bx lr
08003ed8 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8003ed8: b480 push {r7}
8003eda: b087 sub sp, #28
8003edc: af00 add r7, sp, #0
8003ede: 60f8 str r0, [r7, #12]
8003ee0: 60b9 str r1, [r7, #8]
8003ee2: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
8003ee4: 68bb ldr r3, [r7, #8]
8003ee6: f003 031f and.w r3, r3, #31
8003eea: 2201 movs r2, #1
8003eec: fa02 f303 lsl.w r3, r2, r3
8003ef0: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
8003ef2: 68fb ldr r3, [r7, #12]
8003ef4: 6a1a ldr r2, [r3, #32]
8003ef6: 697b ldr r3, [r7, #20]
8003ef8: 43db mvns r3, r3
8003efa: 401a ands r2, r3
8003efc: 68fb ldr r3, [r7, #12]
8003efe: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8003f00: 68fb ldr r3, [r7, #12]
8003f02: 6a1a ldr r2, [r3, #32]
8003f04: 68bb ldr r3, [r7, #8]
8003f06: f003 031f and.w r3, r3, #31
8003f0a: 6879 ldr r1, [r7, #4]
8003f0c: fa01 f303 lsl.w r3, r1, r3
8003f10: 431a orrs r2, r3
8003f12: 68fb ldr r3, [r7, #12]
8003f14: 621a str r2, [r3, #32]
}
8003f16: bf00 nop
8003f18: 371c adds r7, #28
8003f1a: 46bd mov sp, r7
8003f1c: bc80 pop {r7}
8003f1e: 4770 bx lr
08003f20 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8003f20: b480 push {r7}
8003f22: b085 sub sp, #20
8003f24: af00 add r7, sp, #0
8003f26: 6078 str r0, [r7, #4]
8003f28: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8003f2a: 687b ldr r3, [r7, #4]
8003f2c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8003f30: 2b01 cmp r3, #1
8003f32: d101 bne.n 8003f38 <HAL_TIMEx_MasterConfigSynchronization+0x18>
8003f34: 2302 movs r3, #2
8003f36: e046 b.n 8003fc6 <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8003f38: 687b ldr r3, [r7, #4]
8003f3a: 2201 movs r2, #1
8003f3c: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8003f40: 687b ldr r3, [r7, #4]
8003f42: 2202 movs r2, #2
8003f44: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8003f48: 687b ldr r3, [r7, #4]
8003f4a: 681b ldr r3, [r3, #0]
8003f4c: 685b ldr r3, [r3, #4]
8003f4e: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8003f50: 687b ldr r3, [r7, #4]
8003f52: 681b ldr r3, [r3, #0]
8003f54: 689b ldr r3, [r3, #8]
8003f56: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8003f58: 68fb ldr r3, [r7, #12]
8003f5a: f023 0370 bic.w r3, r3, #112 @ 0x70
8003f5e: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8003f60: 683b ldr r3, [r7, #0]
8003f62: 681b ldr r3, [r3, #0]
8003f64: 68fa ldr r2, [r7, #12]
8003f66: 4313 orrs r3, r2
8003f68: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8003f6a: 687b ldr r3, [r7, #4]
8003f6c: 681b ldr r3, [r3, #0]
8003f6e: 68fa ldr r2, [r7, #12]
8003f70: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8003f72: 687b ldr r3, [r7, #4]
8003f74: 681b ldr r3, [r3, #0]
8003f76: 4a16 ldr r2, [pc, #88] @ (8003fd0 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8003f78: 4293 cmp r3, r2
8003f7a: d00e beq.n 8003f9a <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8003f7c: 687b ldr r3, [r7, #4]
8003f7e: 681b ldr r3, [r3, #0]
8003f80: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8003f84: d009 beq.n 8003f9a <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8003f86: 687b ldr r3, [r7, #4]
8003f88: 681b ldr r3, [r3, #0]
8003f8a: 4a12 ldr r2, [pc, #72] @ (8003fd4 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
8003f8c: 4293 cmp r3, r2
8003f8e: d004 beq.n 8003f9a <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8003f90: 687b ldr r3, [r7, #4]
8003f92: 681b ldr r3, [r3, #0]
8003f94: 4a10 ldr r2, [pc, #64] @ (8003fd8 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
8003f96: 4293 cmp r3, r2
8003f98: d10c bne.n 8003fb4 <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8003f9a: 68bb ldr r3, [r7, #8]
8003f9c: f023 0380 bic.w r3, r3, #128 @ 0x80
8003fa0: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8003fa2: 683b ldr r3, [r7, #0]
8003fa4: 685b ldr r3, [r3, #4]
8003fa6: 68ba ldr r2, [r7, #8]
8003fa8: 4313 orrs r3, r2
8003faa: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8003fac: 687b ldr r3, [r7, #4]
8003fae: 681b ldr r3, [r3, #0]
8003fb0: 68ba ldr r2, [r7, #8]
8003fb2: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8003fb4: 687b ldr r3, [r7, #4]
8003fb6: 2201 movs r2, #1
8003fb8: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8003fbc: 687b ldr r3, [r7, #4]
8003fbe: 2200 movs r2, #0
8003fc0: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
8003fc4: 2300 movs r3, #0
}
8003fc6: 4618 mov r0, r3
8003fc8: 3714 adds r7, #20
8003fca: 46bd mov sp, r7
8003fcc: bc80 pop {r7}
8003fce: 4770 bx lr
8003fd0: 40012c00 .word 0x40012c00
8003fd4: 40000400 .word 0x40000400
8003fd8: 40000800 .word 0x40000800
08003fdc <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8003fdc: b480 push {r7}
8003fde: b085 sub sp, #20
8003fe0: af00 add r7, sp, #0
8003fe2: 60f8 str r0, [r7, #12]
8003fe4: 4638 mov r0, r7
8003fe6: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8003fea: 2300 movs r3, #0
}
8003fec: 4618 mov r0, r3
8003fee: 3714 adds r7, #20
8003ff0: 46bd mov sp, r7
8003ff2: bc80 pop {r7}
8003ff4: 4770 bx lr
08003ff6 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8003ff6: b480 push {r7}
8003ff8: b085 sub sp, #20
8003ffa: af00 add r7, sp, #0
8003ffc: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8003ffe: 687b ldr r3, [r7, #4]
8004000: 2200 movs r2, #0
8004002: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8004006: f44f 433f mov.w r3, #48896 @ 0xbf00
800400a: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
800400c: 68fb ldr r3, [r7, #12]
800400e: b29a uxth r2, r3
8004010: 687b ldr r3, [r7, #4]
8004012: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8004016: 2300 movs r3, #0
}
8004018: 4618 mov r0, r3
800401a: 3714 adds r7, #20
800401c: 46bd mov sp, r7
800401e: bc80 pop {r7}
8004020: 4770 bx lr
08004022 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8004022: b480 push {r7}
8004024: b085 sub sp, #20
8004026: af00 add r7, sp, #0
8004028: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
800402a: f44f 433f mov.w r3, #48896 @ 0xbf00
800402e: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8004030: 687b ldr r3, [r7, #4]
8004032: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8004036: b29a uxth r2, r3
8004038: 68fb ldr r3, [r7, #12]
800403a: b29b uxth r3, r3
800403c: 43db mvns r3, r3
800403e: b29b uxth r3, r3
8004040: 4013 ands r3, r2
8004042: b29a uxth r2, r3
8004044: 687b ldr r3, [r7, #4]
8004046: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
800404a: 2300 movs r3, #0
}
800404c: 4618 mov r0, r3
800404e: 3714 adds r7, #20
8004050: 46bd mov sp, r7
8004052: bc80 pop {r7}
8004054: 4770 bx lr
08004056 <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8004056: b480 push {r7}
8004058: b083 sub sp, #12
800405a: af00 add r7, sp, #0
800405c: 6078 str r0, [r7, #4]
800405e: 460b mov r3, r1
8004060: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8004062: 2300 movs r3, #0
}
8004064: 4618 mov r0, r3
8004066: 370c adds r7, #12
8004068: 46bd mov sp, r7
800406a: bc80 pop {r7}
800406c: 4770 bx lr
0800406e <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
800406e: b480 push {r7}
8004070: b085 sub sp, #20
8004072: af00 add r7, sp, #0
8004074: 60f8 str r0, [r7, #12]
8004076: 4638 mov r0, r7
8004078: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
800407c: 68fb ldr r3, [r7, #12]
800407e: 2201 movs r2, #1
8004080: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
8004084: 68fb ldr r3, [r7, #12]
8004086: 2200 movs r2, #0
8004088: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
800408c: 68fb ldr r3, [r7, #12]
800408e: 2200 movs r2, #0
8004090: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
8004094: 68fb ldr r3, [r7, #12]
8004096: 2200 movs r2, #0
8004098: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
800409c: 2300 movs r3, #0
}
800409e: 4618 mov r0, r3
80040a0: 3714 adds r7, #20
80040a2: 46bd mov sp, r7
80040a4: bc80 pop {r7}
80040a6: 4770 bx lr
080040a8 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80040a8: b480 push {r7}
80040aa: b09d sub sp, #116 @ 0x74
80040ac: af00 add r7, sp, #0
80040ae: 6078 str r0, [r7, #4]
80040b0: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
80040b2: 2300 movs r3, #0
80040b4: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
80040b8: 687a ldr r2, [r7, #4]
80040ba: 683b ldr r3, [r7, #0]
80040bc: 781b ldrb r3, [r3, #0]
80040be: 009b lsls r3, r3, #2
80040c0: 4413 add r3, r2
80040c2: 881b ldrh r3, [r3, #0]
80040c4: b29b uxth r3, r3
80040c6: f423 43ec bic.w r3, r3, #30208 @ 0x7600
80040ca: f023 0370 bic.w r3, r3, #112 @ 0x70
80040ce: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
80040d2: 683b ldr r3, [r7, #0]
80040d4: 78db ldrb r3, [r3, #3]
80040d6: 2b03 cmp r3, #3
80040d8: d81f bhi.n 800411a <USB_ActivateEndpoint+0x72>
80040da: a201 add r2, pc, #4 @ (adr r2, 80040e0 <USB_ActivateEndpoint+0x38>)
80040dc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80040e0: 080040f1 .word 0x080040f1
80040e4: 0800410d .word 0x0800410d
80040e8: 08004123 .word 0x08004123
80040ec: 080040ff .word 0x080040ff
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
80040f0: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
80040f4: f443 7300 orr.w r3, r3, #512 @ 0x200
80040f8: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
80040fc: e012 b.n 8004124 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
80040fe: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8004102: f443 63c0 orr.w r3, r3, #1536 @ 0x600
8004106: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
800410a: e00b b.n 8004124 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
800410c: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8004110: f443 6380 orr.w r3, r3, #1024 @ 0x400
8004114: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8004118: e004 b.n 8004124 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
800411a: 2301 movs r3, #1
800411c: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8004120: e000 b.n 8004124 <USB_ActivateEndpoint+0x7c>
break;
8004122: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8004124: 687a ldr r2, [r7, #4]
8004126: 683b ldr r3, [r7, #0]
8004128: 781b ldrb r3, [r3, #0]
800412a: 009b lsls r3, r3, #2
800412c: 441a add r2, r3
800412e: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8004132: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004136: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800413a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800413e: f043 0380 orr.w r3, r3, #128 @ 0x80
8004142: b29b uxth r3, r3
8004144: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8004146: 687a ldr r2, [r7, #4]
8004148: 683b ldr r3, [r7, #0]
800414a: 781b ldrb r3, [r3, #0]
800414c: 009b lsls r3, r3, #2
800414e: 4413 add r3, r2
8004150: 881b ldrh r3, [r3, #0]
8004152: b29b uxth r3, r3
8004154: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004158: f023 0370 bic.w r3, r3, #112 @ 0x70
800415c: b29b uxth r3, r3
800415e: 683a ldr r2, [r7, #0]
8004160: 7812 ldrb r2, [r2, #0]
8004162: 4313 orrs r3, r2
8004164: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
8004168: 687a ldr r2, [r7, #4]
800416a: 683b ldr r3, [r7, #0]
800416c: 781b ldrb r3, [r3, #0]
800416e: 009b lsls r3, r3, #2
8004170: 441a add r2, r3
8004172: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
8004176: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800417a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800417e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004182: f043 0380 orr.w r3, r3, #128 @ 0x80
8004186: b29b uxth r3, r3
8004188: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
800418a: 683b ldr r3, [r7, #0]
800418c: 7b1b ldrb r3, [r3, #12]
800418e: 2b00 cmp r3, #0
8004190: f040 8178 bne.w 8004484 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8004194: 683b ldr r3, [r7, #0]
8004196: 785b ldrb r3, [r3, #1]
8004198: 2b00 cmp r3, #0
800419a: f000 8084 beq.w 80042a6 <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
800419e: 687b ldr r3, [r7, #4]
80041a0: 61bb str r3, [r7, #24]
80041a2: 687b ldr r3, [r7, #4]
80041a4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80041a8: b29b uxth r3, r3
80041aa: 461a mov r2, r3
80041ac: 69bb ldr r3, [r7, #24]
80041ae: 4413 add r3, r2
80041b0: 61bb str r3, [r7, #24]
80041b2: 683b ldr r3, [r7, #0]
80041b4: 781b ldrb r3, [r3, #0]
80041b6: 011a lsls r2, r3, #4
80041b8: 69bb ldr r3, [r7, #24]
80041ba: 4413 add r3, r2
80041bc: f503 6380 add.w r3, r3, #1024 @ 0x400
80041c0: 617b str r3, [r7, #20]
80041c2: 683b ldr r3, [r7, #0]
80041c4: 88db ldrh r3, [r3, #6]
80041c6: 085b lsrs r3, r3, #1
80041c8: b29b uxth r3, r3
80041ca: 005b lsls r3, r3, #1
80041cc: b29a uxth r2, r3
80041ce: 697b ldr r3, [r7, #20]
80041d0: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80041d2: 687a ldr r2, [r7, #4]
80041d4: 683b ldr r3, [r7, #0]
80041d6: 781b ldrb r3, [r3, #0]
80041d8: 009b lsls r3, r3, #2
80041da: 4413 add r3, r2
80041dc: 881b ldrh r3, [r3, #0]
80041de: 827b strh r3, [r7, #18]
80041e0: 8a7b ldrh r3, [r7, #18]
80041e2: f003 0340 and.w r3, r3, #64 @ 0x40
80041e6: 2b00 cmp r3, #0
80041e8: d01b beq.n 8004222 <USB_ActivateEndpoint+0x17a>
80041ea: 687a ldr r2, [r7, #4]
80041ec: 683b ldr r3, [r7, #0]
80041ee: 781b ldrb r3, [r3, #0]
80041f0: 009b lsls r3, r3, #2
80041f2: 4413 add r3, r2
80041f4: 881b ldrh r3, [r3, #0]
80041f6: b29b uxth r3, r3
80041f8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80041fc: f023 0370 bic.w r3, r3, #112 @ 0x70
8004200: 823b strh r3, [r7, #16]
8004202: 687a ldr r2, [r7, #4]
8004204: 683b ldr r3, [r7, #0]
8004206: 781b ldrb r3, [r3, #0]
8004208: 009b lsls r3, r3, #2
800420a: 441a add r2, r3
800420c: 8a3b ldrh r3, [r7, #16]
800420e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004212: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004216: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800421a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800421e: b29b uxth r3, r3
8004220: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8004222: 683b ldr r3, [r7, #0]
8004224: 78db ldrb r3, [r3, #3]
8004226: 2b01 cmp r3, #1
8004228: d020 beq.n 800426c <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800422a: 687a ldr r2, [r7, #4]
800422c: 683b ldr r3, [r7, #0]
800422e: 781b ldrb r3, [r3, #0]
8004230: 009b lsls r3, r3, #2
8004232: 4413 add r3, r2
8004234: 881b ldrh r3, [r3, #0]
8004236: b29b uxth r3, r3
8004238: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800423c: f023 0340 bic.w r3, r3, #64 @ 0x40
8004240: 81bb strh r3, [r7, #12]
8004242: 89bb ldrh r3, [r7, #12]
8004244: f083 0320 eor.w r3, r3, #32
8004248: 81bb strh r3, [r7, #12]
800424a: 687a ldr r2, [r7, #4]
800424c: 683b ldr r3, [r7, #0]
800424e: 781b ldrb r3, [r3, #0]
8004250: 009b lsls r3, r3, #2
8004252: 441a add r2, r3
8004254: 89bb ldrh r3, [r7, #12]
8004256: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800425a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800425e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004262: f043 0380 orr.w r3, r3, #128 @ 0x80
8004266: b29b uxth r3, r3
8004268: 8013 strh r3, [r2, #0]
800426a: e2d5 b.n 8004818 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800426c: 687a ldr r2, [r7, #4]
800426e: 683b ldr r3, [r7, #0]
8004270: 781b ldrb r3, [r3, #0]
8004272: 009b lsls r3, r3, #2
8004274: 4413 add r3, r2
8004276: 881b ldrh r3, [r3, #0]
8004278: b29b uxth r3, r3
800427a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800427e: f023 0340 bic.w r3, r3, #64 @ 0x40
8004282: 81fb strh r3, [r7, #14]
8004284: 687a ldr r2, [r7, #4]
8004286: 683b ldr r3, [r7, #0]
8004288: 781b ldrb r3, [r3, #0]
800428a: 009b lsls r3, r3, #2
800428c: 441a add r2, r3
800428e: 89fb ldrh r3, [r7, #14]
8004290: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004294: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004298: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800429c: f043 0380 orr.w r3, r3, #128 @ 0x80
80042a0: b29b uxth r3, r3
80042a2: 8013 strh r3, [r2, #0]
80042a4: e2b8 b.n 8004818 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
80042a6: 687b ldr r3, [r7, #4]
80042a8: 633b str r3, [r7, #48] @ 0x30
80042aa: 687b ldr r3, [r7, #4]
80042ac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80042b0: b29b uxth r3, r3
80042b2: 461a mov r2, r3
80042b4: 6b3b ldr r3, [r7, #48] @ 0x30
80042b6: 4413 add r3, r2
80042b8: 633b str r3, [r7, #48] @ 0x30
80042ba: 683b ldr r3, [r7, #0]
80042bc: 781b ldrb r3, [r3, #0]
80042be: 011a lsls r2, r3, #4
80042c0: 6b3b ldr r3, [r7, #48] @ 0x30
80042c2: 4413 add r3, r2
80042c4: f503 6381 add.w r3, r3, #1032 @ 0x408
80042c8: 62fb str r3, [r7, #44] @ 0x2c
80042ca: 683b ldr r3, [r7, #0]
80042cc: 88db ldrh r3, [r3, #6]
80042ce: 085b lsrs r3, r3, #1
80042d0: b29b uxth r3, r3
80042d2: 005b lsls r3, r3, #1
80042d4: b29a uxth r2, r3
80042d6: 6afb ldr r3, [r7, #44] @ 0x2c
80042d8: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
80042da: 687b ldr r3, [r7, #4]
80042dc: 62bb str r3, [r7, #40] @ 0x28
80042de: 687b ldr r3, [r7, #4]
80042e0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80042e4: b29b uxth r3, r3
80042e6: 461a mov r2, r3
80042e8: 6abb ldr r3, [r7, #40] @ 0x28
80042ea: 4413 add r3, r2
80042ec: 62bb str r3, [r7, #40] @ 0x28
80042ee: 683b ldr r3, [r7, #0]
80042f0: 781b ldrb r3, [r3, #0]
80042f2: 011a lsls r2, r3, #4
80042f4: 6abb ldr r3, [r7, #40] @ 0x28
80042f6: 4413 add r3, r2
80042f8: f203 430c addw r3, r3, #1036 @ 0x40c
80042fc: 627b str r3, [r7, #36] @ 0x24
80042fe: 6a7b ldr r3, [r7, #36] @ 0x24
8004300: 881b ldrh r3, [r3, #0]
8004302: b29b uxth r3, r3
8004304: f3c3 0309 ubfx r3, r3, #0, #10
8004308: b29a uxth r2, r3
800430a: 6a7b ldr r3, [r7, #36] @ 0x24
800430c: 801a strh r2, [r3, #0]
800430e: 683b ldr r3, [r7, #0]
8004310: 691b ldr r3, [r3, #16]
8004312: 2b3e cmp r3, #62 @ 0x3e
8004314: d91d bls.n 8004352 <USB_ActivateEndpoint+0x2aa>
8004316: 683b ldr r3, [r7, #0]
8004318: 691b ldr r3, [r3, #16]
800431a: 095b lsrs r3, r3, #5
800431c: 66bb str r3, [r7, #104] @ 0x68
800431e: 683b ldr r3, [r7, #0]
8004320: 691b ldr r3, [r3, #16]
8004322: f003 031f and.w r3, r3, #31
8004326: 2b00 cmp r3, #0
8004328: d102 bne.n 8004330 <USB_ActivateEndpoint+0x288>
800432a: 6ebb ldr r3, [r7, #104] @ 0x68
800432c: 3b01 subs r3, #1
800432e: 66bb str r3, [r7, #104] @ 0x68
8004330: 6a7b ldr r3, [r7, #36] @ 0x24
8004332: 881b ldrh r3, [r3, #0]
8004334: b29a uxth r2, r3
8004336: 6ebb ldr r3, [r7, #104] @ 0x68
8004338: b29b uxth r3, r3
800433a: 029b lsls r3, r3, #10
800433c: b29b uxth r3, r3
800433e: 4313 orrs r3, r2
8004340: b29b uxth r3, r3
8004342: ea6f 4343 mvn.w r3, r3, lsl #17
8004346: ea6f 4353 mvn.w r3, r3, lsr #17
800434a: b29a uxth r2, r3
800434c: 6a7b ldr r3, [r7, #36] @ 0x24
800434e: 801a strh r2, [r3, #0]
8004350: e026 b.n 80043a0 <USB_ActivateEndpoint+0x2f8>
8004352: 683b ldr r3, [r7, #0]
8004354: 691b ldr r3, [r3, #16]
8004356: 2b00 cmp r3, #0
8004358: d10a bne.n 8004370 <USB_ActivateEndpoint+0x2c8>
800435a: 6a7b ldr r3, [r7, #36] @ 0x24
800435c: 881b ldrh r3, [r3, #0]
800435e: b29b uxth r3, r3
8004360: ea6f 4343 mvn.w r3, r3, lsl #17
8004364: ea6f 4353 mvn.w r3, r3, lsr #17
8004368: b29a uxth r2, r3
800436a: 6a7b ldr r3, [r7, #36] @ 0x24
800436c: 801a strh r2, [r3, #0]
800436e: e017 b.n 80043a0 <USB_ActivateEndpoint+0x2f8>
8004370: 683b ldr r3, [r7, #0]
8004372: 691b ldr r3, [r3, #16]
8004374: 085b lsrs r3, r3, #1
8004376: 66bb str r3, [r7, #104] @ 0x68
8004378: 683b ldr r3, [r7, #0]
800437a: 691b ldr r3, [r3, #16]
800437c: f003 0301 and.w r3, r3, #1
8004380: 2b00 cmp r3, #0
8004382: d002 beq.n 800438a <USB_ActivateEndpoint+0x2e2>
8004384: 6ebb ldr r3, [r7, #104] @ 0x68
8004386: 3301 adds r3, #1
8004388: 66bb str r3, [r7, #104] @ 0x68
800438a: 6a7b ldr r3, [r7, #36] @ 0x24
800438c: 881b ldrh r3, [r3, #0]
800438e: b29a uxth r2, r3
8004390: 6ebb ldr r3, [r7, #104] @ 0x68
8004392: b29b uxth r3, r3
8004394: 029b lsls r3, r3, #10
8004396: b29b uxth r3, r3
8004398: 4313 orrs r3, r2
800439a: b29a uxth r2, r3
800439c: 6a7b ldr r3, [r7, #36] @ 0x24
800439e: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80043a0: 687a ldr r2, [r7, #4]
80043a2: 683b ldr r3, [r7, #0]
80043a4: 781b ldrb r3, [r3, #0]
80043a6: 009b lsls r3, r3, #2
80043a8: 4413 add r3, r2
80043aa: 881b ldrh r3, [r3, #0]
80043ac: 847b strh r3, [r7, #34] @ 0x22
80043ae: 8c7b ldrh r3, [r7, #34] @ 0x22
80043b0: f403 4380 and.w r3, r3, #16384 @ 0x4000
80043b4: 2b00 cmp r3, #0
80043b6: d01b beq.n 80043f0 <USB_ActivateEndpoint+0x348>
80043b8: 687a ldr r2, [r7, #4]
80043ba: 683b ldr r3, [r7, #0]
80043bc: 781b ldrb r3, [r3, #0]
80043be: 009b lsls r3, r3, #2
80043c0: 4413 add r3, r2
80043c2: 881b ldrh r3, [r3, #0]
80043c4: b29b uxth r3, r3
80043c6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80043ca: f023 0370 bic.w r3, r3, #112 @ 0x70
80043ce: 843b strh r3, [r7, #32]
80043d0: 687a ldr r2, [r7, #4]
80043d2: 683b ldr r3, [r7, #0]
80043d4: 781b ldrb r3, [r3, #0]
80043d6: 009b lsls r3, r3, #2
80043d8: 441a add r2, r3
80043da: 8c3b ldrh r3, [r7, #32]
80043dc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80043e0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80043e4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80043e8: f043 0380 orr.w r3, r3, #128 @ 0x80
80043ec: b29b uxth r3, r3
80043ee: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
80043f0: 683b ldr r3, [r7, #0]
80043f2: 781b ldrb r3, [r3, #0]
80043f4: 2b00 cmp r3, #0
80043f6: d124 bne.n 8004442 <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80043f8: 687a ldr r2, [r7, #4]
80043fa: 683b ldr r3, [r7, #0]
80043fc: 781b ldrb r3, [r3, #0]
80043fe: 009b lsls r3, r3, #2
8004400: 4413 add r3, r2
8004402: 881b ldrh r3, [r3, #0]
8004404: b29b uxth r3, r3
8004406: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800440a: f023 0370 bic.w r3, r3, #112 @ 0x70
800440e: 83bb strh r3, [r7, #28]
8004410: 8bbb ldrh r3, [r7, #28]
8004412: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8004416: 83bb strh r3, [r7, #28]
8004418: 8bbb ldrh r3, [r7, #28]
800441a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800441e: 83bb strh r3, [r7, #28]
8004420: 687a ldr r2, [r7, #4]
8004422: 683b ldr r3, [r7, #0]
8004424: 781b ldrb r3, [r3, #0]
8004426: 009b lsls r3, r3, #2
8004428: 441a add r2, r3
800442a: 8bbb ldrh r3, [r7, #28]
800442c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004430: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004434: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004438: f043 0380 orr.w r3, r3, #128 @ 0x80
800443c: b29b uxth r3, r3
800443e: 8013 strh r3, [r2, #0]
8004440: e1ea b.n 8004818 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
8004442: 687a ldr r2, [r7, #4]
8004444: 683b ldr r3, [r7, #0]
8004446: 781b ldrb r3, [r3, #0]
8004448: 009b lsls r3, r3, #2
800444a: 4413 add r3, r2
800444c: 881b ldrh r3, [r3, #0]
800444e: b29b uxth r3, r3
8004450: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004454: f023 0370 bic.w r3, r3, #112 @ 0x70
8004458: 83fb strh r3, [r7, #30]
800445a: 8bfb ldrh r3, [r7, #30]
800445c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8004460: 83fb strh r3, [r7, #30]
8004462: 687a ldr r2, [r7, #4]
8004464: 683b ldr r3, [r7, #0]
8004466: 781b ldrb r3, [r3, #0]
8004468: 009b lsls r3, r3, #2
800446a: 441a add r2, r3
800446c: 8bfb ldrh r3, [r7, #30]
800446e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004472: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004476: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800447a: f043 0380 orr.w r3, r3, #128 @ 0x80
800447e: b29b uxth r3, r3
8004480: 8013 strh r3, [r2, #0]
8004482: e1c9 b.n 8004818 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
8004484: 683b ldr r3, [r7, #0]
8004486: 78db ldrb r3, [r3, #3]
8004488: 2b02 cmp r3, #2
800448a: d11e bne.n 80044ca <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800448c: 687a ldr r2, [r7, #4]
800448e: 683b ldr r3, [r7, #0]
8004490: 781b ldrb r3, [r3, #0]
8004492: 009b lsls r3, r3, #2
8004494: 4413 add r3, r2
8004496: 881b ldrh r3, [r3, #0]
8004498: b29b uxth r3, r3
800449a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800449e: f023 0370 bic.w r3, r3, #112 @ 0x70
80044a2: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
80044a6: 687a ldr r2, [r7, #4]
80044a8: 683b ldr r3, [r7, #0]
80044aa: 781b ldrb r3, [r3, #0]
80044ac: 009b lsls r3, r3, #2
80044ae: 441a add r2, r3
80044b0: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
80044b4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80044b8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80044bc: f443 4301 orr.w r3, r3, #33024 @ 0x8100
80044c0: f043 0380 orr.w r3, r3, #128 @ 0x80
80044c4: b29b uxth r3, r3
80044c6: 8013 strh r3, [r2, #0]
80044c8: e01d b.n 8004506 <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
80044ca: 687a ldr r2, [r7, #4]
80044cc: 683b ldr r3, [r7, #0]
80044ce: 781b ldrb r3, [r3, #0]
80044d0: 009b lsls r3, r3, #2
80044d2: 4413 add r3, r2
80044d4: 881b ldrh r3, [r3, #0]
80044d6: b29b uxth r3, r3
80044d8: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
80044dc: f023 0370 bic.w r3, r3, #112 @ 0x70
80044e0: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
80044e4: 687a ldr r2, [r7, #4]
80044e6: 683b ldr r3, [r7, #0]
80044e8: 781b ldrb r3, [r3, #0]
80044ea: 009b lsls r3, r3, #2
80044ec: 441a add r2, r3
80044ee: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
80044f2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80044f6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80044fa: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80044fe: f043 0380 orr.w r3, r3, #128 @ 0x80
8004502: b29b uxth r3, r3
8004504: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
8004506: 687b ldr r3, [r7, #4]
8004508: 65fb str r3, [r7, #92] @ 0x5c
800450a: 687b ldr r3, [r7, #4]
800450c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004510: b29b uxth r3, r3
8004512: 461a mov r2, r3
8004514: 6dfb ldr r3, [r7, #92] @ 0x5c
8004516: 4413 add r3, r2
8004518: 65fb str r3, [r7, #92] @ 0x5c
800451a: 683b ldr r3, [r7, #0]
800451c: 781b ldrb r3, [r3, #0]
800451e: 011a lsls r2, r3, #4
8004520: 6dfb ldr r3, [r7, #92] @ 0x5c
8004522: 4413 add r3, r2
8004524: f503 6380 add.w r3, r3, #1024 @ 0x400
8004528: 65bb str r3, [r7, #88] @ 0x58
800452a: 683b ldr r3, [r7, #0]
800452c: 891b ldrh r3, [r3, #8]
800452e: 085b lsrs r3, r3, #1
8004530: b29b uxth r3, r3
8004532: 005b lsls r3, r3, #1
8004534: b29a uxth r2, r3
8004536: 6dbb ldr r3, [r7, #88] @ 0x58
8004538: 801a strh r2, [r3, #0]
800453a: 687b ldr r3, [r7, #4]
800453c: 657b str r3, [r7, #84] @ 0x54
800453e: 687b ldr r3, [r7, #4]
8004540: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004544: b29b uxth r3, r3
8004546: 461a mov r2, r3
8004548: 6d7b ldr r3, [r7, #84] @ 0x54
800454a: 4413 add r3, r2
800454c: 657b str r3, [r7, #84] @ 0x54
800454e: 683b ldr r3, [r7, #0]
8004550: 781b ldrb r3, [r3, #0]
8004552: 011a lsls r2, r3, #4
8004554: 6d7b ldr r3, [r7, #84] @ 0x54
8004556: 4413 add r3, r2
8004558: f503 6381 add.w r3, r3, #1032 @ 0x408
800455c: 653b str r3, [r7, #80] @ 0x50
800455e: 683b ldr r3, [r7, #0]
8004560: 895b ldrh r3, [r3, #10]
8004562: 085b lsrs r3, r3, #1
8004564: b29b uxth r3, r3
8004566: 005b lsls r3, r3, #1
8004568: b29a uxth r2, r3
800456a: 6d3b ldr r3, [r7, #80] @ 0x50
800456c: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
800456e: 683b ldr r3, [r7, #0]
8004570: 785b ldrb r3, [r3, #1]
8004572: 2b00 cmp r3, #0
8004574: f040 8093 bne.w 800469e <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004578: 687a ldr r2, [r7, #4]
800457a: 683b ldr r3, [r7, #0]
800457c: 781b ldrb r3, [r3, #0]
800457e: 009b lsls r3, r3, #2
8004580: 4413 add r3, r2
8004582: 881b ldrh r3, [r3, #0]
8004584: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
8004588: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
800458c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004590: 2b00 cmp r3, #0
8004592: d01b beq.n 80045cc <USB_ActivateEndpoint+0x524>
8004594: 687a ldr r2, [r7, #4]
8004596: 683b ldr r3, [r7, #0]
8004598: 781b ldrb r3, [r3, #0]
800459a: 009b lsls r3, r3, #2
800459c: 4413 add r3, r2
800459e: 881b ldrh r3, [r3, #0]
80045a0: b29b uxth r3, r3
80045a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80045a6: f023 0370 bic.w r3, r3, #112 @ 0x70
80045aa: 87fb strh r3, [r7, #62] @ 0x3e
80045ac: 687a ldr r2, [r7, #4]
80045ae: 683b ldr r3, [r7, #0]
80045b0: 781b ldrb r3, [r3, #0]
80045b2: 009b lsls r3, r3, #2
80045b4: 441a add r2, r3
80045b6: 8ffb ldrh r3, [r7, #62] @ 0x3e
80045b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80045bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80045c0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80045c4: f043 0380 orr.w r3, r3, #128 @ 0x80
80045c8: b29b uxth r3, r3
80045ca: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80045cc: 687a ldr r2, [r7, #4]
80045ce: 683b ldr r3, [r7, #0]
80045d0: 781b ldrb r3, [r3, #0]
80045d2: 009b lsls r3, r3, #2
80045d4: 4413 add r3, r2
80045d6: 881b ldrh r3, [r3, #0]
80045d8: 87bb strh r3, [r7, #60] @ 0x3c
80045da: 8fbb ldrh r3, [r7, #60] @ 0x3c
80045dc: f003 0340 and.w r3, r3, #64 @ 0x40
80045e0: 2b00 cmp r3, #0
80045e2: d01b beq.n 800461c <USB_ActivateEndpoint+0x574>
80045e4: 687a ldr r2, [r7, #4]
80045e6: 683b ldr r3, [r7, #0]
80045e8: 781b ldrb r3, [r3, #0]
80045ea: 009b lsls r3, r3, #2
80045ec: 4413 add r3, r2
80045ee: 881b ldrh r3, [r3, #0]
80045f0: b29b uxth r3, r3
80045f2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80045f6: f023 0370 bic.w r3, r3, #112 @ 0x70
80045fa: 877b strh r3, [r7, #58] @ 0x3a
80045fc: 687a ldr r2, [r7, #4]
80045fe: 683b ldr r3, [r7, #0]
8004600: 781b ldrb r3, [r3, #0]
8004602: 009b lsls r3, r3, #2
8004604: 441a add r2, r3
8004606: 8f7b ldrh r3, [r7, #58] @ 0x3a
8004608: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800460c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004610: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004614: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004618: b29b uxth r3, r3
800461a: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800461c: 687a ldr r2, [r7, #4]
800461e: 683b ldr r3, [r7, #0]
8004620: 781b ldrb r3, [r3, #0]
8004622: 009b lsls r3, r3, #2
8004624: 4413 add r3, r2
8004626: 881b ldrh r3, [r3, #0]
8004628: b29b uxth r3, r3
800462a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800462e: f023 0370 bic.w r3, r3, #112 @ 0x70
8004632: 873b strh r3, [r7, #56] @ 0x38
8004634: 8f3b ldrh r3, [r7, #56] @ 0x38
8004636: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800463a: 873b strh r3, [r7, #56] @ 0x38
800463c: 8f3b ldrh r3, [r7, #56] @ 0x38
800463e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8004642: 873b strh r3, [r7, #56] @ 0x38
8004644: 687a ldr r2, [r7, #4]
8004646: 683b ldr r3, [r7, #0]
8004648: 781b ldrb r3, [r3, #0]
800464a: 009b lsls r3, r3, #2
800464c: 441a add r2, r3
800464e: 8f3b ldrh r3, [r7, #56] @ 0x38
8004650: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004654: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004658: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800465c: f043 0380 orr.w r3, r3, #128 @ 0x80
8004660: b29b uxth r3, r3
8004662: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004664: 687a ldr r2, [r7, #4]
8004666: 683b ldr r3, [r7, #0]
8004668: 781b ldrb r3, [r3, #0]
800466a: 009b lsls r3, r3, #2
800466c: 4413 add r3, r2
800466e: 881b ldrh r3, [r3, #0]
8004670: b29b uxth r3, r3
8004672: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004676: f023 0340 bic.w r3, r3, #64 @ 0x40
800467a: 86fb strh r3, [r7, #54] @ 0x36
800467c: 687a ldr r2, [r7, #4]
800467e: 683b ldr r3, [r7, #0]
8004680: 781b ldrb r3, [r3, #0]
8004682: 009b lsls r3, r3, #2
8004684: 441a add r2, r3
8004686: 8efb ldrh r3, [r7, #54] @ 0x36
8004688: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800468c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004690: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004694: f043 0380 orr.w r3, r3, #128 @ 0x80
8004698: b29b uxth r3, r3
800469a: 8013 strh r3, [r2, #0]
800469c: e0bc b.n 8004818 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800469e: 687a ldr r2, [r7, #4]
80046a0: 683b ldr r3, [r7, #0]
80046a2: 781b ldrb r3, [r3, #0]
80046a4: 009b lsls r3, r3, #2
80046a6: 4413 add r3, r2
80046a8: 881b ldrh r3, [r3, #0]
80046aa: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
80046ae: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80046b2: f403 4380 and.w r3, r3, #16384 @ 0x4000
80046b6: 2b00 cmp r3, #0
80046b8: d01d beq.n 80046f6 <USB_ActivateEndpoint+0x64e>
80046ba: 687a ldr r2, [r7, #4]
80046bc: 683b ldr r3, [r7, #0]
80046be: 781b ldrb r3, [r3, #0]
80046c0: 009b lsls r3, r3, #2
80046c2: 4413 add r3, r2
80046c4: 881b ldrh r3, [r3, #0]
80046c6: b29b uxth r3, r3
80046c8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80046cc: f023 0370 bic.w r3, r3, #112 @ 0x70
80046d0: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
80046d4: 687a ldr r2, [r7, #4]
80046d6: 683b ldr r3, [r7, #0]
80046d8: 781b ldrb r3, [r3, #0]
80046da: 009b lsls r3, r3, #2
80046dc: 441a add r2, r3
80046de: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
80046e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80046e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80046ea: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80046ee: f043 0380 orr.w r3, r3, #128 @ 0x80
80046f2: b29b uxth r3, r3
80046f4: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80046f6: 687a ldr r2, [r7, #4]
80046f8: 683b ldr r3, [r7, #0]
80046fa: 781b ldrb r3, [r3, #0]
80046fc: 009b lsls r3, r3, #2
80046fe: 4413 add r3, r2
8004700: 881b ldrh r3, [r3, #0]
8004702: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
8004706: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800470a: f003 0340 and.w r3, r3, #64 @ 0x40
800470e: 2b00 cmp r3, #0
8004710: d01d beq.n 800474e <USB_ActivateEndpoint+0x6a6>
8004712: 687a ldr r2, [r7, #4]
8004714: 683b ldr r3, [r7, #0]
8004716: 781b ldrb r3, [r3, #0]
8004718: 009b lsls r3, r3, #2
800471a: 4413 add r3, r2
800471c: 881b ldrh r3, [r3, #0]
800471e: b29b uxth r3, r3
8004720: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004724: f023 0370 bic.w r3, r3, #112 @ 0x70
8004728: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
800472c: 687a ldr r2, [r7, #4]
800472e: 683b ldr r3, [r7, #0]
8004730: 781b ldrb r3, [r3, #0]
8004732: 009b lsls r3, r3, #2
8004734: 441a add r2, r3
8004736: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
800473a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800473e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004742: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004746: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800474a: b29b uxth r3, r3
800474c: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800474e: 683b ldr r3, [r7, #0]
8004750: 78db ldrb r3, [r3, #3]
8004752: 2b01 cmp r3, #1
8004754: d024 beq.n 80047a0 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8004756: 687a ldr r2, [r7, #4]
8004758: 683b ldr r3, [r7, #0]
800475a: 781b ldrb r3, [r3, #0]
800475c: 009b lsls r3, r3, #2
800475e: 4413 add r3, r2
8004760: 881b ldrh r3, [r3, #0]
8004762: b29b uxth r3, r3
8004764: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004768: f023 0340 bic.w r3, r3, #64 @ 0x40
800476c: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8004770: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8004774: f083 0320 eor.w r3, r3, #32
8004778: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800477c: 687a ldr r2, [r7, #4]
800477e: 683b ldr r3, [r7, #0]
8004780: 781b ldrb r3, [r3, #0]
8004782: 009b lsls r3, r3, #2
8004784: 441a add r2, r3
8004786: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800478a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800478e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004792: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004796: f043 0380 orr.w r3, r3, #128 @ 0x80
800479a: b29b uxth r3, r3
800479c: 8013 strh r3, [r2, #0]
800479e: e01d b.n 80047dc <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
80047a0: 687a ldr r2, [r7, #4]
80047a2: 683b ldr r3, [r7, #0]
80047a4: 781b ldrb r3, [r3, #0]
80047a6: 009b lsls r3, r3, #2
80047a8: 4413 add r3, r2
80047aa: 881b ldrh r3, [r3, #0]
80047ac: b29b uxth r3, r3
80047ae: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80047b2: f023 0340 bic.w r3, r3, #64 @ 0x40
80047b6: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
80047ba: 687a ldr r2, [r7, #4]
80047bc: 683b ldr r3, [r7, #0]
80047be: 781b ldrb r3, [r3, #0]
80047c0: 009b lsls r3, r3, #2
80047c2: 441a add r2, r3
80047c4: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
80047c8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80047cc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80047d0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80047d4: f043 0380 orr.w r3, r3, #128 @ 0x80
80047d8: b29b uxth r3, r3
80047da: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
80047dc: 687a ldr r2, [r7, #4]
80047de: 683b ldr r3, [r7, #0]
80047e0: 781b ldrb r3, [r3, #0]
80047e2: 009b lsls r3, r3, #2
80047e4: 4413 add r3, r2
80047e6: 881b ldrh r3, [r3, #0]
80047e8: b29b uxth r3, r3
80047ea: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80047ee: f023 0370 bic.w r3, r3, #112 @ 0x70
80047f2: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80047f6: 687a ldr r2, [r7, #4]
80047f8: 683b ldr r3, [r7, #0]
80047fa: 781b ldrb r3, [r3, #0]
80047fc: 009b lsls r3, r3, #2
80047fe: 441a add r2, r3
8004800: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8004804: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004808: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800480c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004810: f043 0380 orr.w r3, r3, #128 @ 0x80
8004814: b29b uxth r3, r3
8004816: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
8004818: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
800481c: 4618 mov r0, r3
800481e: 3774 adds r7, #116 @ 0x74
8004820: 46bd mov sp, r7
8004822: bc80 pop {r7}
8004824: 4770 bx lr
8004826: bf00 nop
08004828 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8004828: b480 push {r7}
800482a: b08d sub sp, #52 @ 0x34
800482c: af00 add r7, sp, #0
800482e: 6078 str r0, [r7, #4]
8004830: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8004832: 683b ldr r3, [r7, #0]
8004834: 7b1b ldrb r3, [r3, #12]
8004836: 2b00 cmp r3, #0
8004838: f040 808e bne.w 8004958 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
800483c: 683b ldr r3, [r7, #0]
800483e: 785b ldrb r3, [r3, #1]
8004840: 2b00 cmp r3, #0
8004842: d044 beq.n 80048ce <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8004844: 687a ldr r2, [r7, #4]
8004846: 683b ldr r3, [r7, #0]
8004848: 781b ldrb r3, [r3, #0]
800484a: 009b lsls r3, r3, #2
800484c: 4413 add r3, r2
800484e: 881b ldrh r3, [r3, #0]
8004850: 81bb strh r3, [r7, #12]
8004852: 89bb ldrh r3, [r7, #12]
8004854: f003 0340 and.w r3, r3, #64 @ 0x40
8004858: 2b00 cmp r3, #0
800485a: d01b beq.n 8004894 <USB_DeactivateEndpoint+0x6c>
800485c: 687a ldr r2, [r7, #4]
800485e: 683b ldr r3, [r7, #0]
8004860: 781b ldrb r3, [r3, #0]
8004862: 009b lsls r3, r3, #2
8004864: 4413 add r3, r2
8004866: 881b ldrh r3, [r3, #0]
8004868: b29b uxth r3, r3
800486a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800486e: f023 0370 bic.w r3, r3, #112 @ 0x70
8004872: 817b strh r3, [r7, #10]
8004874: 687a ldr r2, [r7, #4]
8004876: 683b ldr r3, [r7, #0]
8004878: 781b ldrb r3, [r3, #0]
800487a: 009b lsls r3, r3, #2
800487c: 441a add r2, r3
800487e: 897b ldrh r3, [r7, #10]
8004880: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004884: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004888: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800488c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004890: b29b uxth r3, r3
8004892: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004894: 687a ldr r2, [r7, #4]
8004896: 683b ldr r3, [r7, #0]
8004898: 781b ldrb r3, [r3, #0]
800489a: 009b lsls r3, r3, #2
800489c: 4413 add r3, r2
800489e: 881b ldrh r3, [r3, #0]
80048a0: b29b uxth r3, r3
80048a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80048a6: f023 0340 bic.w r3, r3, #64 @ 0x40
80048aa: 813b strh r3, [r7, #8]
80048ac: 687a ldr r2, [r7, #4]
80048ae: 683b ldr r3, [r7, #0]
80048b0: 781b ldrb r3, [r3, #0]
80048b2: 009b lsls r3, r3, #2
80048b4: 441a add r2, r3
80048b6: 893b ldrh r3, [r7, #8]
80048b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80048bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80048c0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80048c4: f043 0380 orr.w r3, r3, #128 @ 0x80
80048c8: b29b uxth r3, r3
80048ca: 8013 strh r3, [r2, #0]
80048cc: e192 b.n 8004bf4 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80048ce: 687a ldr r2, [r7, #4]
80048d0: 683b ldr r3, [r7, #0]
80048d2: 781b ldrb r3, [r3, #0]
80048d4: 009b lsls r3, r3, #2
80048d6: 4413 add r3, r2
80048d8: 881b ldrh r3, [r3, #0]
80048da: 827b strh r3, [r7, #18]
80048dc: 8a7b ldrh r3, [r7, #18]
80048de: f403 4380 and.w r3, r3, #16384 @ 0x4000
80048e2: 2b00 cmp r3, #0
80048e4: d01b beq.n 800491e <USB_DeactivateEndpoint+0xf6>
80048e6: 687a ldr r2, [r7, #4]
80048e8: 683b ldr r3, [r7, #0]
80048ea: 781b ldrb r3, [r3, #0]
80048ec: 009b lsls r3, r3, #2
80048ee: 4413 add r3, r2
80048f0: 881b ldrh r3, [r3, #0]
80048f2: b29b uxth r3, r3
80048f4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80048f8: f023 0370 bic.w r3, r3, #112 @ 0x70
80048fc: 823b strh r3, [r7, #16]
80048fe: 687a ldr r2, [r7, #4]
8004900: 683b ldr r3, [r7, #0]
8004902: 781b ldrb r3, [r3, #0]
8004904: 009b lsls r3, r3, #2
8004906: 441a add r2, r3
8004908: 8a3b ldrh r3, [r7, #16]
800490a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800490e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004912: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004916: f043 0380 orr.w r3, r3, #128 @ 0x80
800491a: b29b uxth r3, r3
800491c: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800491e: 687a ldr r2, [r7, #4]
8004920: 683b ldr r3, [r7, #0]
8004922: 781b ldrb r3, [r3, #0]
8004924: 009b lsls r3, r3, #2
8004926: 4413 add r3, r2
8004928: 881b ldrh r3, [r3, #0]
800492a: b29b uxth r3, r3
800492c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004930: f023 0370 bic.w r3, r3, #112 @ 0x70
8004934: 81fb strh r3, [r7, #14]
8004936: 687a ldr r2, [r7, #4]
8004938: 683b ldr r3, [r7, #0]
800493a: 781b ldrb r3, [r3, #0]
800493c: 009b lsls r3, r3, #2
800493e: 441a add r2, r3
8004940: 89fb ldrh r3, [r7, #14]
8004942: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004946: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800494a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800494e: f043 0380 orr.w r3, r3, #128 @ 0x80
8004952: b29b uxth r3, r3
8004954: 8013 strh r3, [r2, #0]
8004956: e14d b.n 8004bf4 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
8004958: 683b ldr r3, [r7, #0]
800495a: 785b ldrb r3, [r3, #1]
800495c: 2b00 cmp r3, #0
800495e: f040 80a5 bne.w 8004aac <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004962: 687a ldr r2, [r7, #4]
8004964: 683b ldr r3, [r7, #0]
8004966: 781b ldrb r3, [r3, #0]
8004968: 009b lsls r3, r3, #2
800496a: 4413 add r3, r2
800496c: 881b ldrh r3, [r3, #0]
800496e: 843b strh r3, [r7, #32]
8004970: 8c3b ldrh r3, [r7, #32]
8004972: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004976: 2b00 cmp r3, #0
8004978: d01b beq.n 80049b2 <USB_DeactivateEndpoint+0x18a>
800497a: 687a ldr r2, [r7, #4]
800497c: 683b ldr r3, [r7, #0]
800497e: 781b ldrb r3, [r3, #0]
8004980: 009b lsls r3, r3, #2
8004982: 4413 add r3, r2
8004984: 881b ldrh r3, [r3, #0]
8004986: b29b uxth r3, r3
8004988: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800498c: f023 0370 bic.w r3, r3, #112 @ 0x70
8004990: 83fb strh r3, [r7, #30]
8004992: 687a ldr r2, [r7, #4]
8004994: 683b ldr r3, [r7, #0]
8004996: 781b ldrb r3, [r3, #0]
8004998: 009b lsls r3, r3, #2
800499a: 441a add r2, r3
800499c: 8bfb ldrh r3, [r7, #30]
800499e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80049a2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80049a6: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80049aa: f043 0380 orr.w r3, r3, #128 @ 0x80
80049ae: b29b uxth r3, r3
80049b0: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80049b2: 687a ldr r2, [r7, #4]
80049b4: 683b ldr r3, [r7, #0]
80049b6: 781b ldrb r3, [r3, #0]
80049b8: 009b lsls r3, r3, #2
80049ba: 4413 add r3, r2
80049bc: 881b ldrh r3, [r3, #0]
80049be: 83bb strh r3, [r7, #28]
80049c0: 8bbb ldrh r3, [r7, #28]
80049c2: f003 0340 and.w r3, r3, #64 @ 0x40
80049c6: 2b00 cmp r3, #0
80049c8: d01b beq.n 8004a02 <USB_DeactivateEndpoint+0x1da>
80049ca: 687a ldr r2, [r7, #4]
80049cc: 683b ldr r3, [r7, #0]
80049ce: 781b ldrb r3, [r3, #0]
80049d0: 009b lsls r3, r3, #2
80049d2: 4413 add r3, r2
80049d4: 881b ldrh r3, [r3, #0]
80049d6: b29b uxth r3, r3
80049d8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80049dc: f023 0370 bic.w r3, r3, #112 @ 0x70
80049e0: 837b strh r3, [r7, #26]
80049e2: 687a ldr r2, [r7, #4]
80049e4: 683b ldr r3, [r7, #0]
80049e6: 781b ldrb r3, [r3, #0]
80049e8: 009b lsls r3, r3, #2
80049ea: 441a add r2, r3
80049ec: 8b7b ldrh r3, [r7, #26]
80049ee: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80049f2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80049f6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80049fa: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80049fe: b29b uxth r3, r3
8004a00: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
8004a02: 687a ldr r2, [r7, #4]
8004a04: 683b ldr r3, [r7, #0]
8004a06: 781b ldrb r3, [r3, #0]
8004a08: 009b lsls r3, r3, #2
8004a0a: 4413 add r3, r2
8004a0c: 881b ldrh r3, [r3, #0]
8004a0e: b29b uxth r3, r3
8004a10: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004a14: f023 0370 bic.w r3, r3, #112 @ 0x70
8004a18: 833b strh r3, [r7, #24]
8004a1a: 687a ldr r2, [r7, #4]
8004a1c: 683b ldr r3, [r7, #0]
8004a1e: 781b ldrb r3, [r3, #0]
8004a20: 009b lsls r3, r3, #2
8004a22: 441a add r2, r3
8004a24: 8b3b ldrh r3, [r7, #24]
8004a26: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004a2a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004a2e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004a32: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004a36: b29b uxth r3, r3
8004a38: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8004a3a: 687a ldr r2, [r7, #4]
8004a3c: 683b ldr r3, [r7, #0]
8004a3e: 781b ldrb r3, [r3, #0]
8004a40: 009b lsls r3, r3, #2
8004a42: 4413 add r3, r2
8004a44: 881b ldrh r3, [r3, #0]
8004a46: b29b uxth r3, r3
8004a48: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004a4c: f023 0370 bic.w r3, r3, #112 @ 0x70
8004a50: 82fb strh r3, [r7, #22]
8004a52: 687a ldr r2, [r7, #4]
8004a54: 683b ldr r3, [r7, #0]
8004a56: 781b ldrb r3, [r3, #0]
8004a58: 009b lsls r3, r3, #2
8004a5a: 441a add r2, r3
8004a5c: 8afb ldrh r3, [r7, #22]
8004a5e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004a62: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004a66: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004a6a: f043 0380 orr.w r3, r3, #128 @ 0x80
8004a6e: b29b uxth r3, r3
8004a70: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004a72: 687a ldr r2, [r7, #4]
8004a74: 683b ldr r3, [r7, #0]
8004a76: 781b ldrb r3, [r3, #0]
8004a78: 009b lsls r3, r3, #2
8004a7a: 4413 add r3, r2
8004a7c: 881b ldrh r3, [r3, #0]
8004a7e: b29b uxth r3, r3
8004a80: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004a84: f023 0340 bic.w r3, r3, #64 @ 0x40
8004a88: 82bb strh r3, [r7, #20]
8004a8a: 687a ldr r2, [r7, #4]
8004a8c: 683b ldr r3, [r7, #0]
8004a8e: 781b ldrb r3, [r3, #0]
8004a90: 009b lsls r3, r3, #2
8004a92: 441a add r2, r3
8004a94: 8abb ldrh r3, [r7, #20]
8004a96: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004a9a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004a9e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004aa2: f043 0380 orr.w r3, r3, #128 @ 0x80
8004aa6: b29b uxth r3, r3
8004aa8: 8013 strh r3, [r2, #0]
8004aaa: e0a3 b.n 8004bf4 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8004aac: 687a ldr r2, [r7, #4]
8004aae: 683b ldr r3, [r7, #0]
8004ab0: 781b ldrb r3, [r3, #0]
8004ab2: 009b lsls r3, r3, #2
8004ab4: 4413 add r3, r2
8004ab6: 881b ldrh r3, [r3, #0]
8004ab8: 85fb strh r3, [r7, #46] @ 0x2e
8004aba: 8dfb ldrh r3, [r7, #46] @ 0x2e
8004abc: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004ac0: 2b00 cmp r3, #0
8004ac2: d01b beq.n 8004afc <USB_DeactivateEndpoint+0x2d4>
8004ac4: 687a ldr r2, [r7, #4]
8004ac6: 683b ldr r3, [r7, #0]
8004ac8: 781b ldrb r3, [r3, #0]
8004aca: 009b lsls r3, r3, #2
8004acc: 4413 add r3, r2
8004ace: 881b ldrh r3, [r3, #0]
8004ad0: b29b uxth r3, r3
8004ad2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004ad6: f023 0370 bic.w r3, r3, #112 @ 0x70
8004ada: 85bb strh r3, [r7, #44] @ 0x2c
8004adc: 687a ldr r2, [r7, #4]
8004ade: 683b ldr r3, [r7, #0]
8004ae0: 781b ldrb r3, [r3, #0]
8004ae2: 009b lsls r3, r3, #2
8004ae4: 441a add r2, r3
8004ae6: 8dbb ldrh r3, [r7, #44] @ 0x2c
8004ae8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004aec: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004af0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004af4: f043 0380 orr.w r3, r3, #128 @ 0x80
8004af8: b29b uxth r3, r3
8004afa: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8004afc: 687a ldr r2, [r7, #4]
8004afe: 683b ldr r3, [r7, #0]
8004b00: 781b ldrb r3, [r3, #0]
8004b02: 009b lsls r3, r3, #2
8004b04: 4413 add r3, r2
8004b06: 881b ldrh r3, [r3, #0]
8004b08: 857b strh r3, [r7, #42] @ 0x2a
8004b0a: 8d7b ldrh r3, [r7, #42] @ 0x2a
8004b0c: f003 0340 and.w r3, r3, #64 @ 0x40
8004b10: 2b00 cmp r3, #0
8004b12: d01b beq.n 8004b4c <USB_DeactivateEndpoint+0x324>
8004b14: 687a ldr r2, [r7, #4]
8004b16: 683b ldr r3, [r7, #0]
8004b18: 781b ldrb r3, [r3, #0]
8004b1a: 009b lsls r3, r3, #2
8004b1c: 4413 add r3, r2
8004b1e: 881b ldrh r3, [r3, #0]
8004b20: b29b uxth r3, r3
8004b22: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004b26: f023 0370 bic.w r3, r3, #112 @ 0x70
8004b2a: 853b strh r3, [r7, #40] @ 0x28
8004b2c: 687a ldr r2, [r7, #4]
8004b2e: 683b ldr r3, [r7, #0]
8004b30: 781b ldrb r3, [r3, #0]
8004b32: 009b lsls r3, r3, #2
8004b34: 441a add r2, r3
8004b36: 8d3b ldrh r3, [r7, #40] @ 0x28
8004b38: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004b3c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004b40: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004b44: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8004b48: b29b uxth r3, r3
8004b4a: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
8004b4c: 687a ldr r2, [r7, #4]
8004b4e: 683b ldr r3, [r7, #0]
8004b50: 781b ldrb r3, [r3, #0]
8004b52: 009b lsls r3, r3, #2
8004b54: 4413 add r3, r2
8004b56: 881b ldrh r3, [r3, #0]
8004b58: b29b uxth r3, r3
8004b5a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004b5e: f023 0370 bic.w r3, r3, #112 @ 0x70
8004b62: 84fb strh r3, [r7, #38] @ 0x26
8004b64: 687a ldr r2, [r7, #4]
8004b66: 683b ldr r3, [r7, #0]
8004b68: 781b ldrb r3, [r3, #0]
8004b6a: 009b lsls r3, r3, #2
8004b6c: 441a add r2, r3
8004b6e: 8cfb ldrh r3, [r7, #38] @ 0x26
8004b70: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004b74: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004b78: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8004b7c: f043 0380 orr.w r3, r3, #128 @ 0x80
8004b80: b29b uxth r3, r3
8004b82: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8004b84: 687a ldr r2, [r7, #4]
8004b86: 683b ldr r3, [r7, #0]
8004b88: 781b ldrb r3, [r3, #0]
8004b8a: 009b lsls r3, r3, #2
8004b8c: 4413 add r3, r2
8004b8e: 881b ldrh r3, [r3, #0]
8004b90: b29b uxth r3, r3
8004b92: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004b96: f023 0340 bic.w r3, r3, #64 @ 0x40
8004b9a: 84bb strh r3, [r7, #36] @ 0x24
8004b9c: 687a ldr r2, [r7, #4]
8004b9e: 683b ldr r3, [r7, #0]
8004ba0: 781b ldrb r3, [r3, #0]
8004ba2: 009b lsls r3, r3, #2
8004ba4: 441a add r2, r3
8004ba6: 8cbb ldrh r3, [r7, #36] @ 0x24
8004ba8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004bac: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004bb0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004bb4: f043 0380 orr.w r3, r3, #128 @ 0x80
8004bb8: b29b uxth r3, r3
8004bba: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8004bbc: 687a ldr r2, [r7, #4]
8004bbe: 683b ldr r3, [r7, #0]
8004bc0: 781b ldrb r3, [r3, #0]
8004bc2: 009b lsls r3, r3, #2
8004bc4: 4413 add r3, r2
8004bc6: 881b ldrh r3, [r3, #0]
8004bc8: b29b uxth r3, r3
8004bca: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8004bce: f023 0370 bic.w r3, r3, #112 @ 0x70
8004bd2: 847b strh r3, [r7, #34] @ 0x22
8004bd4: 687a ldr r2, [r7, #4]
8004bd6: 683b ldr r3, [r7, #0]
8004bd8: 781b ldrb r3, [r3, #0]
8004bda: 009b lsls r3, r3, #2
8004bdc: 441a add r2, r3
8004bde: 8c7b ldrh r3, [r7, #34] @ 0x22
8004be0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004be4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004be8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8004bec: f043 0380 orr.w r3, r3, #128 @ 0x80
8004bf0: b29b uxth r3, r3
8004bf2: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8004bf4: 2300 movs r3, #0
}
8004bf6: 4618 mov r0, r3
8004bf8: 3734 adds r7, #52 @ 0x34
8004bfa: 46bd mov sp, r7
8004bfc: bc80 pop {r7}
8004bfe: 4770 bx lr
08004c00 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8004c00: b580 push {r7, lr}
8004c02: b0c2 sub sp, #264 @ 0x108
8004c04: af00 add r7, sp, #0
8004c06: f507 7384 add.w r3, r7, #264 @ 0x108
8004c0a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004c0e: 6018 str r0, [r3, #0]
8004c10: f507 7384 add.w r3, r7, #264 @ 0x108
8004c14: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004c18: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
8004c1a: f507 7384 add.w r3, r7, #264 @ 0x108
8004c1e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004c22: 681b ldr r3, [r3, #0]
8004c24: 785b ldrb r3, [r3, #1]
8004c26: 2b01 cmp r3, #1
8004c28: f040 86b7 bne.w 800599a <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
8004c2c: f507 7384 add.w r3, r7, #264 @ 0x108
8004c30: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004c34: 681b ldr r3, [r3, #0]
8004c36: 699a ldr r2, [r3, #24]
8004c38: f507 7384 add.w r3, r7, #264 @ 0x108
8004c3c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004c40: 681b ldr r3, [r3, #0]
8004c42: 691b ldr r3, [r3, #16]
8004c44: 429a cmp r2, r3
8004c46: d908 bls.n 8004c5a <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
8004c48: f507 7384 add.w r3, r7, #264 @ 0x108
8004c4c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004c50: 681b ldr r3, [r3, #0]
8004c52: 691b ldr r3, [r3, #16]
8004c54: f8c7 3104 str.w r3, [r7, #260] @ 0x104
8004c58: e007 b.n 8004c6a <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
8004c5a: f507 7384 add.w r3, r7, #264 @ 0x108
8004c5e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004c62: 681b ldr r3, [r3, #0]
8004c64: 699b ldr r3, [r3, #24]
8004c66: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
8004c6a: f507 7384 add.w r3, r7, #264 @ 0x108
8004c6e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004c72: 681b ldr r3, [r3, #0]
8004c74: 7b1b ldrb r3, [r3, #12]
8004c76: 2b00 cmp r3, #0
8004c78: d13a bne.n 8004cf0 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8004c7a: f507 7384 add.w r3, r7, #264 @ 0x108
8004c7e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004c82: 681b ldr r3, [r3, #0]
8004c84: 6959 ldr r1, [r3, #20]
8004c86: f507 7384 add.w r3, r7, #264 @ 0x108
8004c8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004c8e: 681b ldr r3, [r3, #0]
8004c90: 88da ldrh r2, [r3, #6]
8004c92: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004c96: b29b uxth r3, r3
8004c98: f507 7084 add.w r0, r7, #264 @ 0x108
8004c9c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8004ca0: 6800 ldr r0, [r0, #0]
8004ca2: f001 fc9c bl 80065de <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8004ca6: f507 7384 add.w r3, r7, #264 @ 0x108
8004caa: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004cae: 681b ldr r3, [r3, #0]
8004cb0: 613b str r3, [r7, #16]
8004cb2: f507 7384 add.w r3, r7, #264 @ 0x108
8004cb6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004cba: 681b ldr r3, [r3, #0]
8004cbc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004cc0: b29b uxth r3, r3
8004cc2: 461a mov r2, r3
8004cc4: 693b ldr r3, [r7, #16]
8004cc6: 4413 add r3, r2
8004cc8: 613b str r3, [r7, #16]
8004cca: f507 7384 add.w r3, r7, #264 @ 0x108
8004cce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004cd2: 681b ldr r3, [r3, #0]
8004cd4: 781b ldrb r3, [r3, #0]
8004cd6: 011a lsls r2, r3, #4
8004cd8: 693b ldr r3, [r7, #16]
8004cda: 4413 add r3, r2
8004cdc: f203 4304 addw r3, r3, #1028 @ 0x404
8004ce0: 60fb str r3, [r7, #12]
8004ce2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004ce6: b29a uxth r2, r3
8004ce8: 68fb ldr r3, [r7, #12]
8004cea: 801a strh r2, [r3, #0]
8004cec: f000 be1f b.w 800592e <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
8004cf0: f507 7384 add.w r3, r7, #264 @ 0x108
8004cf4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004cf8: 681b ldr r3, [r3, #0]
8004cfa: 78db ldrb r3, [r3, #3]
8004cfc: 2b02 cmp r3, #2
8004cfe: f040 8462 bne.w 80055c6 <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
8004d02: f507 7384 add.w r3, r7, #264 @ 0x108
8004d06: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004d0a: 681b ldr r3, [r3, #0]
8004d0c: 6a1a ldr r2, [r3, #32]
8004d0e: f507 7384 add.w r3, r7, #264 @ 0x108
8004d12: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004d16: 681b ldr r3, [r3, #0]
8004d18: 691b ldr r3, [r3, #16]
8004d1a: 429a cmp r2, r3
8004d1c: f240 83df bls.w 80054de <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8004d20: f507 7384 add.w r3, r7, #264 @ 0x108
8004d24: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004d28: 681a ldr r2, [r3, #0]
8004d2a: f507 7384 add.w r3, r7, #264 @ 0x108
8004d2e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004d32: 681b ldr r3, [r3, #0]
8004d34: 781b ldrb r3, [r3, #0]
8004d36: 009b lsls r3, r3, #2
8004d38: 4413 add r3, r2
8004d3a: 881b ldrh r3, [r3, #0]
8004d3c: b29b uxth r3, r3
8004d3e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8004d42: f023 0370 bic.w r3, r3, #112 @ 0x70
8004d46: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
8004d4a: f507 7384 add.w r3, r7, #264 @ 0x108
8004d4e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004d52: 681a ldr r2, [r3, #0]
8004d54: f507 7384 add.w r3, r7, #264 @ 0x108
8004d58: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004d5c: 681b ldr r3, [r3, #0]
8004d5e: 781b ldrb r3, [r3, #0]
8004d60: 009b lsls r3, r3, #2
8004d62: 441a add r2, r3
8004d64: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
8004d68: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8004d6c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8004d70: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8004d74: f043 0380 orr.w r3, r3, #128 @ 0x80
8004d78: b29b uxth r3, r3
8004d7a: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8004d7c: f507 7384 add.w r3, r7, #264 @ 0x108
8004d80: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004d84: 681b ldr r3, [r3, #0]
8004d86: 6a1a ldr r2, [r3, #32]
8004d88: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004d8c: 1ad2 subs r2, r2, r3
8004d8e: f507 7384 add.w r3, r7, #264 @ 0x108
8004d92: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004d96: 681b ldr r3, [r3, #0]
8004d98: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8004d9a: f507 7384 add.w r3, r7, #264 @ 0x108
8004d9e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004da2: 681a ldr r2, [r3, #0]
8004da4: f507 7384 add.w r3, r7, #264 @ 0x108
8004da8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004dac: 681b ldr r3, [r3, #0]
8004dae: 781b ldrb r3, [r3, #0]
8004db0: 009b lsls r3, r3, #2
8004db2: 4413 add r3, r2
8004db4: 881b ldrh r3, [r3, #0]
8004db6: b29b uxth r3, r3
8004db8: f003 0340 and.w r3, r3, #64 @ 0x40
8004dbc: 2b00 cmp r3, #0
8004dbe: f000 81c7 beq.w 8005150 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8004dc2: f507 7384 add.w r3, r7, #264 @ 0x108
8004dc6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004dca: 681b ldr r3, [r3, #0]
8004dcc: 633b str r3, [r7, #48] @ 0x30
8004dce: f507 7384 add.w r3, r7, #264 @ 0x108
8004dd2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004dd6: 681b ldr r3, [r3, #0]
8004dd8: 785b ldrb r3, [r3, #1]
8004dda: 2b00 cmp r3, #0
8004ddc: d177 bne.n 8004ece <USB_EPStartXfer+0x2ce>
8004dde: f507 7384 add.w r3, r7, #264 @ 0x108
8004de2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004de6: 681b ldr r3, [r3, #0]
8004de8: 62bb str r3, [r7, #40] @ 0x28
8004dea: f507 7384 add.w r3, r7, #264 @ 0x108
8004dee: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004df2: 681b ldr r3, [r3, #0]
8004df4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004df8: b29b uxth r3, r3
8004dfa: 461a mov r2, r3
8004dfc: 6abb ldr r3, [r7, #40] @ 0x28
8004dfe: 4413 add r3, r2
8004e00: 62bb str r3, [r7, #40] @ 0x28
8004e02: f507 7384 add.w r3, r7, #264 @ 0x108
8004e06: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004e0a: 681b ldr r3, [r3, #0]
8004e0c: 781b ldrb r3, [r3, #0]
8004e0e: 011a lsls r2, r3, #4
8004e10: 6abb ldr r3, [r7, #40] @ 0x28
8004e12: 4413 add r3, r2
8004e14: f203 430c addw r3, r3, #1036 @ 0x40c
8004e18: 627b str r3, [r7, #36] @ 0x24
8004e1a: 6a7b ldr r3, [r7, #36] @ 0x24
8004e1c: 881b ldrh r3, [r3, #0]
8004e1e: b29b uxth r3, r3
8004e20: f3c3 0309 ubfx r3, r3, #0, #10
8004e24: b29a uxth r2, r3
8004e26: 6a7b ldr r3, [r7, #36] @ 0x24
8004e28: 801a strh r2, [r3, #0]
8004e2a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004e2e: 2b3e cmp r3, #62 @ 0x3e
8004e30: d921 bls.n 8004e76 <USB_EPStartXfer+0x276>
8004e32: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004e36: 095b lsrs r3, r3, #5
8004e38: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8004e3c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004e40: f003 031f and.w r3, r3, #31
8004e44: 2b00 cmp r3, #0
8004e46: d104 bne.n 8004e52 <USB_EPStartXfer+0x252>
8004e48: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8004e4c: 3b01 subs r3, #1
8004e4e: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8004e52: 6a7b ldr r3, [r7, #36] @ 0x24
8004e54: 881b ldrh r3, [r3, #0]
8004e56: b29a uxth r2, r3
8004e58: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8004e5c: b29b uxth r3, r3
8004e5e: 029b lsls r3, r3, #10
8004e60: b29b uxth r3, r3
8004e62: 4313 orrs r3, r2
8004e64: b29b uxth r3, r3
8004e66: ea6f 4343 mvn.w r3, r3, lsl #17
8004e6a: ea6f 4353 mvn.w r3, r3, lsr #17
8004e6e: b29a uxth r2, r3
8004e70: 6a7b ldr r3, [r7, #36] @ 0x24
8004e72: 801a strh r2, [r3, #0]
8004e74: e050 b.n 8004f18 <USB_EPStartXfer+0x318>
8004e76: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004e7a: 2b00 cmp r3, #0
8004e7c: d10a bne.n 8004e94 <USB_EPStartXfer+0x294>
8004e7e: 6a7b ldr r3, [r7, #36] @ 0x24
8004e80: 881b ldrh r3, [r3, #0]
8004e82: b29b uxth r3, r3
8004e84: ea6f 4343 mvn.w r3, r3, lsl #17
8004e88: ea6f 4353 mvn.w r3, r3, lsr #17
8004e8c: b29a uxth r2, r3
8004e8e: 6a7b ldr r3, [r7, #36] @ 0x24
8004e90: 801a strh r2, [r3, #0]
8004e92: e041 b.n 8004f18 <USB_EPStartXfer+0x318>
8004e94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004e98: 085b lsrs r3, r3, #1
8004e9a: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8004e9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004ea2: f003 0301 and.w r3, r3, #1
8004ea6: 2b00 cmp r3, #0
8004ea8: d004 beq.n 8004eb4 <USB_EPStartXfer+0x2b4>
8004eaa: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8004eae: 3301 adds r3, #1
8004eb0: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8004eb4: 6a7b ldr r3, [r7, #36] @ 0x24
8004eb6: 881b ldrh r3, [r3, #0]
8004eb8: b29a uxth r2, r3
8004eba: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8004ebe: b29b uxth r3, r3
8004ec0: 029b lsls r3, r3, #10
8004ec2: b29b uxth r3, r3
8004ec4: 4313 orrs r3, r2
8004ec6: b29a uxth r2, r3
8004ec8: 6a7b ldr r3, [r7, #36] @ 0x24
8004eca: 801a strh r2, [r3, #0]
8004ecc: e024 b.n 8004f18 <USB_EPStartXfer+0x318>
8004ece: f507 7384 add.w r3, r7, #264 @ 0x108
8004ed2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004ed6: 681b ldr r3, [r3, #0]
8004ed8: 785b ldrb r3, [r3, #1]
8004eda: 2b01 cmp r3, #1
8004edc: d11c bne.n 8004f18 <USB_EPStartXfer+0x318>
8004ede: f507 7384 add.w r3, r7, #264 @ 0x108
8004ee2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004ee6: 681b ldr r3, [r3, #0]
8004ee8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004eec: b29b uxth r3, r3
8004eee: 461a mov r2, r3
8004ef0: 6b3b ldr r3, [r7, #48] @ 0x30
8004ef2: 4413 add r3, r2
8004ef4: 633b str r3, [r7, #48] @ 0x30
8004ef6: f507 7384 add.w r3, r7, #264 @ 0x108
8004efa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004efe: 681b ldr r3, [r3, #0]
8004f00: 781b ldrb r3, [r3, #0]
8004f02: 011a lsls r2, r3, #4
8004f04: 6b3b ldr r3, [r7, #48] @ 0x30
8004f06: 4413 add r3, r2
8004f08: f203 430c addw r3, r3, #1036 @ 0x40c
8004f0c: 62fb str r3, [r7, #44] @ 0x2c
8004f0e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004f12: b29a uxth r2, r3
8004f14: 6afb ldr r3, [r7, #44] @ 0x2c
8004f16: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8004f18: f507 7384 add.w r3, r7, #264 @ 0x108
8004f1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004f20: 681b ldr r3, [r3, #0]
8004f22: 895b ldrh r3, [r3, #10]
8004f24: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8004f28: f507 7384 add.w r3, r7, #264 @ 0x108
8004f2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004f30: 681b ldr r3, [r3, #0]
8004f32: 6959 ldr r1, [r3, #20]
8004f34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004f38: b29b uxth r3, r3
8004f3a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8004f3e: f507 7084 add.w r0, r7, #264 @ 0x108
8004f42: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8004f46: 6800 ldr r0, [r0, #0]
8004f48: f001 fb49 bl 80065de <USB_WritePMA>
ep->xfer_buff += len;
8004f4c: f507 7384 add.w r3, r7, #264 @ 0x108
8004f50: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004f54: 681b ldr r3, [r3, #0]
8004f56: 695a ldr r2, [r3, #20]
8004f58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004f5c: 441a add r2, r3
8004f5e: f507 7384 add.w r3, r7, #264 @ 0x108
8004f62: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004f66: 681b ldr r3, [r3, #0]
8004f68: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8004f6a: f507 7384 add.w r3, r7, #264 @ 0x108
8004f6e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004f72: 681b ldr r3, [r3, #0]
8004f74: 6a1a ldr r2, [r3, #32]
8004f76: f507 7384 add.w r3, r7, #264 @ 0x108
8004f7a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004f7e: 681b ldr r3, [r3, #0]
8004f80: 691b ldr r3, [r3, #16]
8004f82: 429a cmp r2, r3
8004f84: d90f bls.n 8004fa6 <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
8004f86: f507 7384 add.w r3, r7, #264 @ 0x108
8004f8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004f8e: 681b ldr r3, [r3, #0]
8004f90: 6a1a ldr r2, [r3, #32]
8004f92: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8004f96: 1ad2 subs r2, r2, r3
8004f98: f507 7384 add.w r3, r7, #264 @ 0x108
8004f9c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004fa0: 681b ldr r3, [r3, #0]
8004fa2: 621a str r2, [r3, #32]
8004fa4: e00e b.n 8004fc4 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
8004fa6: f507 7384 add.w r3, r7, #264 @ 0x108
8004faa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004fae: 681b ldr r3, [r3, #0]
8004fb0: 6a1b ldr r3, [r3, #32]
8004fb2: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8004fb6: f507 7384 add.w r3, r7, #264 @ 0x108
8004fba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004fbe: 681b ldr r3, [r3, #0]
8004fc0: 2200 movs r2, #0
8004fc2: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8004fc4: f507 7384 add.w r3, r7, #264 @ 0x108
8004fc8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8004fcc: 681b ldr r3, [r3, #0]
8004fce: 785b ldrb r3, [r3, #1]
8004fd0: 2b00 cmp r3, #0
8004fd2: d177 bne.n 80050c4 <USB_EPStartXfer+0x4c4>
8004fd4: f507 7384 add.w r3, r7, #264 @ 0x108
8004fd8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004fdc: 681b ldr r3, [r3, #0]
8004fde: 61bb str r3, [r7, #24]
8004fe0: f507 7384 add.w r3, r7, #264 @ 0x108
8004fe4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8004fe8: 681b ldr r3, [r3, #0]
8004fea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8004fee: b29b uxth r3, r3
8004ff0: 461a mov r2, r3
8004ff2: 69bb ldr r3, [r7, #24]
8004ff4: 4413 add r3, r2
8004ff6: 61bb str r3, [r7, #24]
8004ff8: f507 7384 add.w r3, r7, #264 @ 0x108
8004ffc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005000: 681b ldr r3, [r3, #0]
8005002: 781b ldrb r3, [r3, #0]
8005004: 011a lsls r2, r3, #4
8005006: 69bb ldr r3, [r7, #24]
8005008: 4413 add r3, r2
800500a: f203 4304 addw r3, r3, #1028 @ 0x404
800500e: 617b str r3, [r7, #20]
8005010: 697b ldr r3, [r7, #20]
8005012: 881b ldrh r3, [r3, #0]
8005014: b29b uxth r3, r3
8005016: f3c3 0309 ubfx r3, r3, #0, #10
800501a: b29a uxth r2, r3
800501c: 697b ldr r3, [r7, #20]
800501e: 801a strh r2, [r3, #0]
8005020: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005024: 2b3e cmp r3, #62 @ 0x3e
8005026: d921 bls.n 800506c <USB_EPStartXfer+0x46c>
8005028: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800502c: 095b lsrs r3, r3, #5
800502e: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8005032: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005036: f003 031f and.w r3, r3, #31
800503a: 2b00 cmp r3, #0
800503c: d104 bne.n 8005048 <USB_EPStartXfer+0x448>
800503e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8005042: 3b01 subs r3, #1
8005044: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8005048: 697b ldr r3, [r7, #20]
800504a: 881b ldrh r3, [r3, #0]
800504c: b29a uxth r2, r3
800504e: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
8005052: b29b uxth r3, r3
8005054: 029b lsls r3, r3, #10
8005056: b29b uxth r3, r3
8005058: 4313 orrs r3, r2
800505a: b29b uxth r3, r3
800505c: ea6f 4343 mvn.w r3, r3, lsl #17
8005060: ea6f 4353 mvn.w r3, r3, lsr #17
8005064: b29a uxth r2, r3
8005066: 697b ldr r3, [r7, #20]
8005068: 801a strh r2, [r3, #0]
800506a: e056 b.n 800511a <USB_EPStartXfer+0x51a>
800506c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005070: 2b00 cmp r3, #0
8005072: d10a bne.n 800508a <USB_EPStartXfer+0x48a>
8005074: 697b ldr r3, [r7, #20]
8005076: 881b ldrh r3, [r3, #0]
8005078: b29b uxth r3, r3
800507a: ea6f 4343 mvn.w r3, r3, lsl #17
800507e: ea6f 4353 mvn.w r3, r3, lsr #17
8005082: b29a uxth r2, r3
8005084: 697b ldr r3, [r7, #20]
8005086: 801a strh r2, [r3, #0]
8005088: e047 b.n 800511a <USB_EPStartXfer+0x51a>
800508a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800508e: 085b lsrs r3, r3, #1
8005090: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
8005094: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005098: f003 0301 and.w r3, r3, #1
800509c: 2b00 cmp r3, #0
800509e: d004 beq.n 80050aa <USB_EPStartXfer+0x4aa>
80050a0: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
80050a4: 3301 adds r3, #1
80050a6: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
80050aa: 697b ldr r3, [r7, #20]
80050ac: 881b ldrh r3, [r3, #0]
80050ae: b29a uxth r2, r3
80050b0: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
80050b4: b29b uxth r3, r3
80050b6: 029b lsls r3, r3, #10
80050b8: b29b uxth r3, r3
80050ba: 4313 orrs r3, r2
80050bc: b29a uxth r2, r3
80050be: 697b ldr r3, [r7, #20]
80050c0: 801a strh r2, [r3, #0]
80050c2: e02a b.n 800511a <USB_EPStartXfer+0x51a>
80050c4: f507 7384 add.w r3, r7, #264 @ 0x108
80050c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80050cc: 681b ldr r3, [r3, #0]
80050ce: 785b ldrb r3, [r3, #1]
80050d0: 2b01 cmp r3, #1
80050d2: d122 bne.n 800511a <USB_EPStartXfer+0x51a>
80050d4: f507 7384 add.w r3, r7, #264 @ 0x108
80050d8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80050dc: 681b ldr r3, [r3, #0]
80050de: 623b str r3, [r7, #32]
80050e0: f507 7384 add.w r3, r7, #264 @ 0x108
80050e4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80050e8: 681b ldr r3, [r3, #0]
80050ea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80050ee: b29b uxth r3, r3
80050f0: 461a mov r2, r3
80050f2: 6a3b ldr r3, [r7, #32]
80050f4: 4413 add r3, r2
80050f6: 623b str r3, [r7, #32]
80050f8: f507 7384 add.w r3, r7, #264 @ 0x108
80050fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005100: 681b ldr r3, [r3, #0]
8005102: 781b ldrb r3, [r3, #0]
8005104: 011a lsls r2, r3, #4
8005106: 6a3b ldr r3, [r7, #32]
8005108: 4413 add r3, r2
800510a: f203 4304 addw r3, r3, #1028 @ 0x404
800510e: 61fb str r3, [r7, #28]
8005110: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005114: b29a uxth r2, r3
8005116: 69fb ldr r3, [r7, #28]
8005118: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800511a: f507 7384 add.w r3, r7, #264 @ 0x108
800511e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005122: 681b ldr r3, [r3, #0]
8005124: 891b ldrh r3, [r3, #8]
8005126: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800512a: f507 7384 add.w r3, r7, #264 @ 0x108
800512e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005132: 681b ldr r3, [r3, #0]
8005134: 6959 ldr r1, [r3, #20]
8005136: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800513a: b29b uxth r3, r3
800513c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005140: f507 7084 add.w r0, r7, #264 @ 0x108
8005144: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005148: 6800 ldr r0, [r0, #0]
800514a: f001 fa48 bl 80065de <USB_WritePMA>
800514e: e3ee b.n 800592e <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8005150: f507 7384 add.w r3, r7, #264 @ 0x108
8005154: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005158: 681b ldr r3, [r3, #0]
800515a: 785b ldrb r3, [r3, #1]
800515c: 2b00 cmp r3, #0
800515e: d177 bne.n 8005250 <USB_EPStartXfer+0x650>
8005160: f507 7384 add.w r3, r7, #264 @ 0x108
8005164: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005168: 681b ldr r3, [r3, #0]
800516a: 64bb str r3, [r7, #72] @ 0x48
800516c: f507 7384 add.w r3, r7, #264 @ 0x108
8005170: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005174: 681b ldr r3, [r3, #0]
8005176: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800517a: b29b uxth r3, r3
800517c: 461a mov r2, r3
800517e: 6cbb ldr r3, [r7, #72] @ 0x48
8005180: 4413 add r3, r2
8005182: 64bb str r3, [r7, #72] @ 0x48
8005184: f507 7384 add.w r3, r7, #264 @ 0x108
8005188: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800518c: 681b ldr r3, [r3, #0]
800518e: 781b ldrb r3, [r3, #0]
8005190: 011a lsls r2, r3, #4
8005192: 6cbb ldr r3, [r7, #72] @ 0x48
8005194: 4413 add r3, r2
8005196: f203 4304 addw r3, r3, #1028 @ 0x404
800519a: 647b str r3, [r7, #68] @ 0x44
800519c: 6c7b ldr r3, [r7, #68] @ 0x44
800519e: 881b ldrh r3, [r3, #0]
80051a0: b29b uxth r3, r3
80051a2: f3c3 0309 ubfx r3, r3, #0, #10
80051a6: b29a uxth r2, r3
80051a8: 6c7b ldr r3, [r7, #68] @ 0x44
80051aa: 801a strh r2, [r3, #0]
80051ac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80051b0: 2b3e cmp r3, #62 @ 0x3e
80051b2: d921 bls.n 80051f8 <USB_EPStartXfer+0x5f8>
80051b4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80051b8: 095b lsrs r3, r3, #5
80051ba: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
80051be: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80051c2: f003 031f and.w r3, r3, #31
80051c6: 2b00 cmp r3, #0
80051c8: d104 bne.n 80051d4 <USB_EPStartXfer+0x5d4>
80051ca: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
80051ce: 3b01 subs r3, #1
80051d0: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
80051d4: 6c7b ldr r3, [r7, #68] @ 0x44
80051d6: 881b ldrh r3, [r3, #0]
80051d8: b29a uxth r2, r3
80051da: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
80051de: b29b uxth r3, r3
80051e0: 029b lsls r3, r3, #10
80051e2: b29b uxth r3, r3
80051e4: 4313 orrs r3, r2
80051e6: b29b uxth r3, r3
80051e8: ea6f 4343 mvn.w r3, r3, lsl #17
80051ec: ea6f 4353 mvn.w r3, r3, lsr #17
80051f0: b29a uxth r2, r3
80051f2: 6c7b ldr r3, [r7, #68] @ 0x44
80051f4: 801a strh r2, [r3, #0]
80051f6: e056 b.n 80052a6 <USB_EPStartXfer+0x6a6>
80051f8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80051fc: 2b00 cmp r3, #0
80051fe: d10a bne.n 8005216 <USB_EPStartXfer+0x616>
8005200: 6c7b ldr r3, [r7, #68] @ 0x44
8005202: 881b ldrh r3, [r3, #0]
8005204: b29b uxth r3, r3
8005206: ea6f 4343 mvn.w r3, r3, lsl #17
800520a: ea6f 4353 mvn.w r3, r3, lsr #17
800520e: b29a uxth r2, r3
8005210: 6c7b ldr r3, [r7, #68] @ 0x44
8005212: 801a strh r2, [r3, #0]
8005214: e047 b.n 80052a6 <USB_EPStartXfer+0x6a6>
8005216: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800521a: 085b lsrs r3, r3, #1
800521c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8005220: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005224: f003 0301 and.w r3, r3, #1
8005228: 2b00 cmp r3, #0
800522a: d004 beq.n 8005236 <USB_EPStartXfer+0x636>
800522c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8005230: 3301 adds r3, #1
8005232: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
8005236: 6c7b ldr r3, [r7, #68] @ 0x44
8005238: 881b ldrh r3, [r3, #0]
800523a: b29a uxth r2, r3
800523c: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
8005240: b29b uxth r3, r3
8005242: 029b lsls r3, r3, #10
8005244: b29b uxth r3, r3
8005246: 4313 orrs r3, r2
8005248: b29a uxth r2, r3
800524a: 6c7b ldr r3, [r7, #68] @ 0x44
800524c: 801a strh r2, [r3, #0]
800524e: e02a b.n 80052a6 <USB_EPStartXfer+0x6a6>
8005250: f507 7384 add.w r3, r7, #264 @ 0x108
8005254: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005258: 681b ldr r3, [r3, #0]
800525a: 785b ldrb r3, [r3, #1]
800525c: 2b01 cmp r3, #1
800525e: d122 bne.n 80052a6 <USB_EPStartXfer+0x6a6>
8005260: f507 7384 add.w r3, r7, #264 @ 0x108
8005264: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005268: 681b ldr r3, [r3, #0]
800526a: 653b str r3, [r7, #80] @ 0x50
800526c: f507 7384 add.w r3, r7, #264 @ 0x108
8005270: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005274: 681b ldr r3, [r3, #0]
8005276: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800527a: b29b uxth r3, r3
800527c: 461a mov r2, r3
800527e: 6d3b ldr r3, [r7, #80] @ 0x50
8005280: 4413 add r3, r2
8005282: 653b str r3, [r7, #80] @ 0x50
8005284: f507 7384 add.w r3, r7, #264 @ 0x108
8005288: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800528c: 681b ldr r3, [r3, #0]
800528e: 781b ldrb r3, [r3, #0]
8005290: 011a lsls r2, r3, #4
8005292: 6d3b ldr r3, [r7, #80] @ 0x50
8005294: 4413 add r3, r2
8005296: f203 4304 addw r3, r3, #1028 @ 0x404
800529a: 64fb str r3, [r7, #76] @ 0x4c
800529c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80052a0: b29a uxth r2, r3
80052a2: 6cfb ldr r3, [r7, #76] @ 0x4c
80052a4: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
80052a6: f507 7384 add.w r3, r7, #264 @ 0x108
80052aa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80052ae: 681b ldr r3, [r3, #0]
80052b0: 891b ldrh r3, [r3, #8]
80052b2: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80052b6: f507 7384 add.w r3, r7, #264 @ 0x108
80052ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80052be: 681b ldr r3, [r3, #0]
80052c0: 6959 ldr r1, [r3, #20]
80052c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80052c6: b29b uxth r3, r3
80052c8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80052cc: f507 7084 add.w r0, r7, #264 @ 0x108
80052d0: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80052d4: 6800 ldr r0, [r0, #0]
80052d6: f001 f982 bl 80065de <USB_WritePMA>
ep->xfer_buff += len;
80052da: f507 7384 add.w r3, r7, #264 @ 0x108
80052de: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80052e2: 681b ldr r3, [r3, #0]
80052e4: 695a ldr r2, [r3, #20]
80052e6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80052ea: 441a add r2, r3
80052ec: f507 7384 add.w r3, r7, #264 @ 0x108
80052f0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80052f4: 681b ldr r3, [r3, #0]
80052f6: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
80052f8: f507 7384 add.w r3, r7, #264 @ 0x108
80052fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005300: 681b ldr r3, [r3, #0]
8005302: 6a1a ldr r2, [r3, #32]
8005304: f507 7384 add.w r3, r7, #264 @ 0x108
8005308: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800530c: 681b ldr r3, [r3, #0]
800530e: 691b ldr r3, [r3, #16]
8005310: 429a cmp r2, r3
8005312: d90f bls.n 8005334 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
8005314: f507 7384 add.w r3, r7, #264 @ 0x108
8005318: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800531c: 681b ldr r3, [r3, #0]
800531e: 6a1a ldr r2, [r3, #32]
8005320: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005324: 1ad2 subs r2, r2, r3
8005326: f507 7384 add.w r3, r7, #264 @ 0x108
800532a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800532e: 681b ldr r3, [r3, #0]
8005330: 621a str r2, [r3, #32]
8005332: e00e b.n 8005352 <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
8005334: f507 7384 add.w r3, r7, #264 @ 0x108
8005338: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800533c: 681b ldr r3, [r3, #0]
800533e: 6a1b ldr r3, [r3, #32]
8005340: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
8005344: f507 7384 add.w r3, r7, #264 @ 0x108
8005348: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800534c: 681b ldr r3, [r3, #0]
800534e: 2200 movs r2, #0
8005350: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8005352: f507 7384 add.w r3, r7, #264 @ 0x108
8005356: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800535a: 681b ldr r3, [r3, #0]
800535c: 643b str r3, [r7, #64] @ 0x40
800535e: f507 7384 add.w r3, r7, #264 @ 0x108
8005362: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005366: 681b ldr r3, [r3, #0]
8005368: 785b ldrb r3, [r3, #1]
800536a: 2b00 cmp r3, #0
800536c: d177 bne.n 800545e <USB_EPStartXfer+0x85e>
800536e: f507 7384 add.w r3, r7, #264 @ 0x108
8005372: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005376: 681b ldr r3, [r3, #0]
8005378: 63bb str r3, [r7, #56] @ 0x38
800537a: f507 7384 add.w r3, r7, #264 @ 0x108
800537e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005382: 681b ldr r3, [r3, #0]
8005384: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005388: b29b uxth r3, r3
800538a: 461a mov r2, r3
800538c: 6bbb ldr r3, [r7, #56] @ 0x38
800538e: 4413 add r3, r2
8005390: 63bb str r3, [r7, #56] @ 0x38
8005392: f507 7384 add.w r3, r7, #264 @ 0x108
8005396: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800539a: 681b ldr r3, [r3, #0]
800539c: 781b ldrb r3, [r3, #0]
800539e: 011a lsls r2, r3, #4
80053a0: 6bbb ldr r3, [r7, #56] @ 0x38
80053a2: 4413 add r3, r2
80053a4: f203 430c addw r3, r3, #1036 @ 0x40c
80053a8: 637b str r3, [r7, #52] @ 0x34
80053aa: 6b7b ldr r3, [r7, #52] @ 0x34
80053ac: 881b ldrh r3, [r3, #0]
80053ae: b29b uxth r3, r3
80053b0: f3c3 0309 ubfx r3, r3, #0, #10
80053b4: b29a uxth r2, r3
80053b6: 6b7b ldr r3, [r7, #52] @ 0x34
80053b8: 801a strh r2, [r3, #0]
80053ba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80053be: 2b3e cmp r3, #62 @ 0x3e
80053c0: d921 bls.n 8005406 <USB_EPStartXfer+0x806>
80053c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80053c6: 095b lsrs r3, r3, #5
80053c8: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
80053cc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80053d0: f003 031f and.w r3, r3, #31
80053d4: 2b00 cmp r3, #0
80053d6: d104 bne.n 80053e2 <USB_EPStartXfer+0x7e2>
80053d8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
80053dc: 3b01 subs r3, #1
80053de: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
80053e2: 6b7b ldr r3, [r7, #52] @ 0x34
80053e4: 881b ldrh r3, [r3, #0]
80053e6: b29a uxth r2, r3
80053e8: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
80053ec: b29b uxth r3, r3
80053ee: 029b lsls r3, r3, #10
80053f0: b29b uxth r3, r3
80053f2: 4313 orrs r3, r2
80053f4: b29b uxth r3, r3
80053f6: ea6f 4343 mvn.w r3, r3, lsl #17
80053fa: ea6f 4353 mvn.w r3, r3, lsr #17
80053fe: b29a uxth r2, r3
8005400: 6b7b ldr r3, [r7, #52] @ 0x34
8005402: 801a strh r2, [r3, #0]
8005404: e050 b.n 80054a8 <USB_EPStartXfer+0x8a8>
8005406: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800540a: 2b00 cmp r3, #0
800540c: d10a bne.n 8005424 <USB_EPStartXfer+0x824>
800540e: 6b7b ldr r3, [r7, #52] @ 0x34
8005410: 881b ldrh r3, [r3, #0]
8005412: b29b uxth r3, r3
8005414: ea6f 4343 mvn.w r3, r3, lsl #17
8005418: ea6f 4353 mvn.w r3, r3, lsr #17
800541c: b29a uxth r2, r3
800541e: 6b7b ldr r3, [r7, #52] @ 0x34
8005420: 801a strh r2, [r3, #0]
8005422: e041 b.n 80054a8 <USB_EPStartXfer+0x8a8>
8005424: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005428: 085b lsrs r3, r3, #1
800542a: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800542e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005432: f003 0301 and.w r3, r3, #1
8005436: 2b00 cmp r3, #0
8005438: d004 beq.n 8005444 <USB_EPStartXfer+0x844>
800543a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800543e: 3301 adds r3, #1
8005440: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
8005444: 6b7b ldr r3, [r7, #52] @ 0x34
8005446: 881b ldrh r3, [r3, #0]
8005448: b29a uxth r2, r3
800544a: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800544e: b29b uxth r3, r3
8005450: 029b lsls r3, r3, #10
8005452: b29b uxth r3, r3
8005454: 4313 orrs r3, r2
8005456: b29a uxth r2, r3
8005458: 6b7b ldr r3, [r7, #52] @ 0x34
800545a: 801a strh r2, [r3, #0]
800545c: e024 b.n 80054a8 <USB_EPStartXfer+0x8a8>
800545e: f507 7384 add.w r3, r7, #264 @ 0x108
8005462: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005466: 681b ldr r3, [r3, #0]
8005468: 785b ldrb r3, [r3, #1]
800546a: 2b01 cmp r3, #1
800546c: d11c bne.n 80054a8 <USB_EPStartXfer+0x8a8>
800546e: f507 7384 add.w r3, r7, #264 @ 0x108
8005472: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005476: 681b ldr r3, [r3, #0]
8005478: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800547c: b29b uxth r3, r3
800547e: 461a mov r2, r3
8005480: 6c3b ldr r3, [r7, #64] @ 0x40
8005482: 4413 add r3, r2
8005484: 643b str r3, [r7, #64] @ 0x40
8005486: f507 7384 add.w r3, r7, #264 @ 0x108
800548a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800548e: 681b ldr r3, [r3, #0]
8005490: 781b ldrb r3, [r3, #0]
8005492: 011a lsls r2, r3, #4
8005494: 6c3b ldr r3, [r7, #64] @ 0x40
8005496: 4413 add r3, r2
8005498: f203 430c addw r3, r3, #1036 @ 0x40c
800549c: 63fb str r3, [r7, #60] @ 0x3c
800549e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80054a2: b29a uxth r2, r3
80054a4: 6bfb ldr r3, [r7, #60] @ 0x3c
80054a6: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
80054a8: f507 7384 add.w r3, r7, #264 @ 0x108
80054ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80054b0: 681b ldr r3, [r3, #0]
80054b2: 895b ldrh r3, [r3, #10]
80054b4: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80054b8: f507 7384 add.w r3, r7, #264 @ 0x108
80054bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80054c0: 681b ldr r3, [r3, #0]
80054c2: 6959 ldr r1, [r3, #20]
80054c4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80054c8: b29b uxth r3, r3
80054ca: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80054ce: f507 7084 add.w r0, r7, #264 @ 0x108
80054d2: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80054d6: 6800 ldr r0, [r0, #0]
80054d8: f001 f881 bl 80065de <USB_WritePMA>
80054dc: e227 b.n 800592e <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
80054de: f507 7384 add.w r3, r7, #264 @ 0x108
80054e2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80054e6: 681b ldr r3, [r3, #0]
80054e8: 6a1b ldr r3, [r3, #32]
80054ea: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
80054ee: f507 7384 add.w r3, r7, #264 @ 0x108
80054f2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80054f6: 681a ldr r2, [r3, #0]
80054f8: f507 7384 add.w r3, r7, #264 @ 0x108
80054fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005500: 681b ldr r3, [r3, #0]
8005502: 781b ldrb r3, [r3, #0]
8005504: 009b lsls r3, r3, #2
8005506: 4413 add r3, r2
8005508: 881b ldrh r3, [r3, #0]
800550a: b29b uxth r3, r3
800550c: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8005510: f023 0370 bic.w r3, r3, #112 @ 0x70
8005514: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
8005518: f507 7384 add.w r3, r7, #264 @ 0x108
800551c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005520: 681a ldr r2, [r3, #0]
8005522: f507 7384 add.w r3, r7, #264 @ 0x108
8005526: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800552a: 681b ldr r3, [r3, #0]
800552c: 781b ldrb r3, [r3, #0]
800552e: 009b lsls r3, r3, #2
8005530: 441a add r2, r3
8005532: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8005536: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800553a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800553e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005542: f043 0380 orr.w r3, r3, #128 @ 0x80
8005546: b29b uxth r3, r3
8005548: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800554a: f507 7384 add.w r3, r7, #264 @ 0x108
800554e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005552: 681b ldr r3, [r3, #0]
8005554: 65fb str r3, [r7, #92] @ 0x5c
8005556: f507 7384 add.w r3, r7, #264 @ 0x108
800555a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800555e: 681b ldr r3, [r3, #0]
8005560: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005564: b29b uxth r3, r3
8005566: 461a mov r2, r3
8005568: 6dfb ldr r3, [r7, #92] @ 0x5c
800556a: 4413 add r3, r2
800556c: 65fb str r3, [r7, #92] @ 0x5c
800556e: f507 7384 add.w r3, r7, #264 @ 0x108
8005572: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005576: 681b ldr r3, [r3, #0]
8005578: 781b ldrb r3, [r3, #0]
800557a: 011a lsls r2, r3, #4
800557c: 6dfb ldr r3, [r7, #92] @ 0x5c
800557e: 4413 add r3, r2
8005580: f203 4304 addw r3, r3, #1028 @ 0x404
8005584: 65bb str r3, [r7, #88] @ 0x58
8005586: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800558a: b29a uxth r2, r3
800558c: 6dbb ldr r3, [r7, #88] @ 0x58
800558e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
8005590: f507 7384 add.w r3, r7, #264 @ 0x108
8005594: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005598: 681b ldr r3, [r3, #0]
800559a: 891b ldrh r3, [r3, #8]
800559c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
80055a0: f507 7384 add.w r3, r7, #264 @ 0x108
80055a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055a8: 681b ldr r3, [r3, #0]
80055aa: 6959 ldr r1, [r3, #20]
80055ac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80055b0: b29b uxth r3, r3
80055b2: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
80055b6: f507 7084 add.w r0, r7, #264 @ 0x108
80055ba: f5a0 7082 sub.w r0, r0, #260 @ 0x104
80055be: 6800 ldr r0, [r0, #0]
80055c0: f001 f80d bl 80065de <USB_WritePMA>
80055c4: e1b3 b.n 800592e <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
80055c6: f507 7384 add.w r3, r7, #264 @ 0x108
80055ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055ce: 681b ldr r3, [r3, #0]
80055d0: 6a1a ldr r2, [r3, #32]
80055d2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80055d6: 1ad2 subs r2, r2, r3
80055d8: f507 7384 add.w r3, r7, #264 @ 0x108
80055dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055e0: 681b ldr r3, [r3, #0]
80055e2: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
80055e4: f507 7384 add.w r3, r7, #264 @ 0x108
80055e8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80055ec: 681a ldr r2, [r3, #0]
80055ee: f507 7384 add.w r3, r7, #264 @ 0x108
80055f2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80055f6: 681b ldr r3, [r3, #0]
80055f8: 781b ldrb r3, [r3, #0]
80055fa: 009b lsls r3, r3, #2
80055fc: 4413 add r3, r2
80055fe: 881b ldrh r3, [r3, #0]
8005600: b29b uxth r3, r3
8005602: f003 0340 and.w r3, r3, #64 @ 0x40
8005606: 2b00 cmp r3, #0
8005608: f000 80c6 beq.w 8005798 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800560c: f507 7384 add.w r3, r7, #264 @ 0x108
8005610: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005614: 681b ldr r3, [r3, #0]
8005616: 673b str r3, [r7, #112] @ 0x70
8005618: f507 7384 add.w r3, r7, #264 @ 0x108
800561c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005620: 681b ldr r3, [r3, #0]
8005622: 785b ldrb r3, [r3, #1]
8005624: 2b00 cmp r3, #0
8005626: d177 bne.n 8005718 <USB_EPStartXfer+0xb18>
8005628: f507 7384 add.w r3, r7, #264 @ 0x108
800562c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005630: 681b ldr r3, [r3, #0]
8005632: 66bb str r3, [r7, #104] @ 0x68
8005634: f507 7384 add.w r3, r7, #264 @ 0x108
8005638: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800563c: 681b ldr r3, [r3, #0]
800563e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005642: b29b uxth r3, r3
8005644: 461a mov r2, r3
8005646: 6ebb ldr r3, [r7, #104] @ 0x68
8005648: 4413 add r3, r2
800564a: 66bb str r3, [r7, #104] @ 0x68
800564c: f507 7384 add.w r3, r7, #264 @ 0x108
8005650: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005654: 681b ldr r3, [r3, #0]
8005656: 781b ldrb r3, [r3, #0]
8005658: 011a lsls r2, r3, #4
800565a: 6ebb ldr r3, [r7, #104] @ 0x68
800565c: 4413 add r3, r2
800565e: f203 430c addw r3, r3, #1036 @ 0x40c
8005662: 667b str r3, [r7, #100] @ 0x64
8005664: 6e7b ldr r3, [r7, #100] @ 0x64
8005666: 881b ldrh r3, [r3, #0]
8005668: b29b uxth r3, r3
800566a: f3c3 0309 ubfx r3, r3, #0, #10
800566e: b29a uxth r2, r3
8005670: 6e7b ldr r3, [r7, #100] @ 0x64
8005672: 801a strh r2, [r3, #0]
8005674: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005678: 2b3e cmp r3, #62 @ 0x3e
800567a: d921 bls.n 80056c0 <USB_EPStartXfer+0xac0>
800567c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005680: 095b lsrs r3, r3, #5
8005682: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
8005686: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800568a: f003 031f and.w r3, r3, #31
800568e: 2b00 cmp r3, #0
8005690: d104 bne.n 800569c <USB_EPStartXfer+0xa9c>
8005692: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005696: 3b01 subs r3, #1
8005698: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800569c: 6e7b ldr r3, [r7, #100] @ 0x64
800569e: 881b ldrh r3, [r3, #0]
80056a0: b29a uxth r2, r3
80056a2: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
80056a6: b29b uxth r3, r3
80056a8: 029b lsls r3, r3, #10
80056aa: b29b uxth r3, r3
80056ac: 4313 orrs r3, r2
80056ae: b29b uxth r3, r3
80056b0: ea6f 4343 mvn.w r3, r3, lsl #17
80056b4: ea6f 4353 mvn.w r3, r3, lsr #17
80056b8: b29a uxth r2, r3
80056ba: 6e7b ldr r3, [r7, #100] @ 0x64
80056bc: 801a strh r2, [r3, #0]
80056be: e050 b.n 8005762 <USB_EPStartXfer+0xb62>
80056c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80056c4: 2b00 cmp r3, #0
80056c6: d10a bne.n 80056de <USB_EPStartXfer+0xade>
80056c8: 6e7b ldr r3, [r7, #100] @ 0x64
80056ca: 881b ldrh r3, [r3, #0]
80056cc: b29b uxth r3, r3
80056ce: ea6f 4343 mvn.w r3, r3, lsl #17
80056d2: ea6f 4353 mvn.w r3, r3, lsr #17
80056d6: b29a uxth r2, r3
80056d8: 6e7b ldr r3, [r7, #100] @ 0x64
80056da: 801a strh r2, [r3, #0]
80056dc: e041 b.n 8005762 <USB_EPStartXfer+0xb62>
80056de: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80056e2: 085b lsrs r3, r3, #1
80056e4: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
80056e8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80056ec: f003 0301 and.w r3, r3, #1
80056f0: 2b00 cmp r3, #0
80056f2: d004 beq.n 80056fe <USB_EPStartXfer+0xafe>
80056f4: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
80056f8: 3301 adds r3, #1
80056fa: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
80056fe: 6e7b ldr r3, [r7, #100] @ 0x64
8005700: 881b ldrh r3, [r3, #0]
8005702: b29a uxth r2, r3
8005704: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
8005708: b29b uxth r3, r3
800570a: 029b lsls r3, r3, #10
800570c: b29b uxth r3, r3
800570e: 4313 orrs r3, r2
8005710: b29a uxth r2, r3
8005712: 6e7b ldr r3, [r7, #100] @ 0x64
8005714: 801a strh r2, [r3, #0]
8005716: e024 b.n 8005762 <USB_EPStartXfer+0xb62>
8005718: f507 7384 add.w r3, r7, #264 @ 0x108
800571c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005720: 681b ldr r3, [r3, #0]
8005722: 785b ldrb r3, [r3, #1]
8005724: 2b01 cmp r3, #1
8005726: d11c bne.n 8005762 <USB_EPStartXfer+0xb62>
8005728: f507 7384 add.w r3, r7, #264 @ 0x108
800572c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005730: 681b ldr r3, [r3, #0]
8005732: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005736: b29b uxth r3, r3
8005738: 461a mov r2, r3
800573a: 6f3b ldr r3, [r7, #112] @ 0x70
800573c: 4413 add r3, r2
800573e: 673b str r3, [r7, #112] @ 0x70
8005740: f507 7384 add.w r3, r7, #264 @ 0x108
8005744: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005748: 681b ldr r3, [r3, #0]
800574a: 781b ldrb r3, [r3, #0]
800574c: 011a lsls r2, r3, #4
800574e: 6f3b ldr r3, [r7, #112] @ 0x70
8005750: 4413 add r3, r2
8005752: f203 430c addw r3, r3, #1036 @ 0x40c
8005756: 66fb str r3, [r7, #108] @ 0x6c
8005758: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800575c: b29a uxth r2, r3
800575e: 6efb ldr r3, [r7, #108] @ 0x6c
8005760: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8005762: f507 7384 add.w r3, r7, #264 @ 0x108
8005766: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800576a: 681b ldr r3, [r3, #0]
800576c: 895b ldrh r3, [r3, #10]
800576e: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8005772: f507 7384 add.w r3, r7, #264 @ 0x108
8005776: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800577a: 681b ldr r3, [r3, #0]
800577c: 6959 ldr r1, [r3, #20]
800577e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005782: b29b uxth r3, r3
8005784: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005788: f507 7084 add.w r0, r7, #264 @ 0x108
800578c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005790: 6800 ldr r0, [r0, #0]
8005792: f000 ff24 bl 80065de <USB_WritePMA>
8005796: e0ca b.n 800592e <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
8005798: f507 7384 add.w r3, r7, #264 @ 0x108
800579c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80057a0: 681b ldr r3, [r3, #0]
80057a2: 785b ldrb r3, [r3, #1]
80057a4: 2b00 cmp r3, #0
80057a6: d177 bne.n 8005898 <USB_EPStartXfer+0xc98>
80057a8: f507 7384 add.w r3, r7, #264 @ 0x108
80057ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80057b0: 681b ldr r3, [r3, #0]
80057b2: 67fb str r3, [r7, #124] @ 0x7c
80057b4: f507 7384 add.w r3, r7, #264 @ 0x108
80057b8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80057bc: 681b ldr r3, [r3, #0]
80057be: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80057c2: b29b uxth r3, r3
80057c4: 461a mov r2, r3
80057c6: 6ffb ldr r3, [r7, #124] @ 0x7c
80057c8: 4413 add r3, r2
80057ca: 67fb str r3, [r7, #124] @ 0x7c
80057cc: f507 7384 add.w r3, r7, #264 @ 0x108
80057d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80057d4: 681b ldr r3, [r3, #0]
80057d6: 781b ldrb r3, [r3, #0]
80057d8: 011a lsls r2, r3, #4
80057da: 6ffb ldr r3, [r7, #124] @ 0x7c
80057dc: 4413 add r3, r2
80057de: f203 4304 addw r3, r3, #1028 @ 0x404
80057e2: 67bb str r3, [r7, #120] @ 0x78
80057e4: 6fbb ldr r3, [r7, #120] @ 0x78
80057e6: 881b ldrh r3, [r3, #0]
80057e8: b29b uxth r3, r3
80057ea: f3c3 0309 ubfx r3, r3, #0, #10
80057ee: b29a uxth r2, r3
80057f0: 6fbb ldr r3, [r7, #120] @ 0x78
80057f2: 801a strh r2, [r3, #0]
80057f4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80057f8: 2b3e cmp r3, #62 @ 0x3e
80057fa: d921 bls.n 8005840 <USB_EPStartXfer+0xc40>
80057fc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005800: 095b lsrs r3, r3, #5
8005802: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8005806: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800580a: f003 031f and.w r3, r3, #31
800580e: 2b00 cmp r3, #0
8005810: d104 bne.n 800581c <USB_EPStartXfer+0xc1c>
8005812: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8005816: 3b01 subs r3, #1
8005818: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800581c: 6fbb ldr r3, [r7, #120] @ 0x78
800581e: 881b ldrh r3, [r3, #0]
8005820: b29a uxth r2, r3
8005822: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8005826: b29b uxth r3, r3
8005828: 029b lsls r3, r3, #10
800582a: b29b uxth r3, r3
800582c: 4313 orrs r3, r2
800582e: b29b uxth r3, r3
8005830: ea6f 4343 mvn.w r3, r3, lsl #17
8005834: ea6f 4353 mvn.w r3, r3, lsr #17
8005838: b29a uxth r2, r3
800583a: 6fbb ldr r3, [r7, #120] @ 0x78
800583c: 801a strh r2, [r3, #0]
800583e: e05c b.n 80058fa <USB_EPStartXfer+0xcfa>
8005840: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005844: 2b00 cmp r3, #0
8005846: d10a bne.n 800585e <USB_EPStartXfer+0xc5e>
8005848: 6fbb ldr r3, [r7, #120] @ 0x78
800584a: 881b ldrh r3, [r3, #0]
800584c: b29b uxth r3, r3
800584e: ea6f 4343 mvn.w r3, r3, lsl #17
8005852: ea6f 4353 mvn.w r3, r3, lsr #17
8005856: b29a uxth r2, r3
8005858: 6fbb ldr r3, [r7, #120] @ 0x78
800585a: 801a strh r2, [r3, #0]
800585c: e04d b.n 80058fa <USB_EPStartXfer+0xcfa>
800585e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005862: 085b lsrs r3, r3, #1
8005864: f8c7 30ec str.w r3, [r7, #236] @ 0xec
8005868: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800586c: f003 0301 and.w r3, r3, #1
8005870: 2b00 cmp r3, #0
8005872: d004 beq.n 800587e <USB_EPStartXfer+0xc7e>
8005874: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8005878: 3301 adds r3, #1
800587a: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800587e: 6fbb ldr r3, [r7, #120] @ 0x78
8005880: 881b ldrh r3, [r3, #0]
8005882: b29a uxth r2, r3
8005884: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
8005888: b29b uxth r3, r3
800588a: 029b lsls r3, r3, #10
800588c: b29b uxth r3, r3
800588e: 4313 orrs r3, r2
8005890: b29a uxth r2, r3
8005892: 6fbb ldr r3, [r7, #120] @ 0x78
8005894: 801a strh r2, [r3, #0]
8005896: e030 b.n 80058fa <USB_EPStartXfer+0xcfa>
8005898: f507 7384 add.w r3, r7, #264 @ 0x108
800589c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80058a0: 681b ldr r3, [r3, #0]
80058a2: 785b ldrb r3, [r3, #1]
80058a4: 2b01 cmp r3, #1
80058a6: d128 bne.n 80058fa <USB_EPStartXfer+0xcfa>
80058a8: f507 7384 add.w r3, r7, #264 @ 0x108
80058ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80058b0: 681b ldr r3, [r3, #0]
80058b2: f8c7 3084 str.w r3, [r7, #132] @ 0x84
80058b6: f507 7384 add.w r3, r7, #264 @ 0x108
80058ba: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80058be: 681b ldr r3, [r3, #0]
80058c0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80058c4: b29b uxth r3, r3
80058c6: 461a mov r2, r3
80058c8: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
80058cc: 4413 add r3, r2
80058ce: f8c7 3084 str.w r3, [r7, #132] @ 0x84
80058d2: f507 7384 add.w r3, r7, #264 @ 0x108
80058d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80058da: 681b ldr r3, [r3, #0]
80058dc: 781b ldrb r3, [r3, #0]
80058de: 011a lsls r2, r3, #4
80058e0: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
80058e4: 4413 add r3, r2
80058e6: f203 4304 addw r3, r3, #1028 @ 0x404
80058ea: f8c7 3080 str.w r3, [r7, #128] @ 0x80
80058ee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80058f2: b29a uxth r2, r3
80058f4: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80058f8: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
80058fa: f507 7384 add.w r3, r7, #264 @ 0x108
80058fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005902: 681b ldr r3, [r3, #0]
8005904: 891b ldrh r3, [r3, #8]
8005906: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800590a: f507 7384 add.w r3, r7, #264 @ 0x108
800590e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005912: 681b ldr r3, [r3, #0]
8005914: 6959 ldr r1, [r3, #20]
8005916: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800591a: b29b uxth r3, r3
800591c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8005920: f507 7084 add.w r0, r7, #264 @ 0x108
8005924: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8005928: 6800 ldr r0, [r0, #0]
800592a: f000 fe58 bl 80065de <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
800592e: f507 7384 add.w r3, r7, #264 @ 0x108
8005932: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005936: 681a ldr r2, [r3, #0]
8005938: f507 7384 add.w r3, r7, #264 @ 0x108
800593c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005940: 681b ldr r3, [r3, #0]
8005942: 781b ldrb r3, [r3, #0]
8005944: 009b lsls r3, r3, #2
8005946: 4413 add r3, r2
8005948: 881b ldrh r3, [r3, #0]
800594a: b29b uxth r3, r3
800594c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005950: f023 0340 bic.w r3, r3, #64 @ 0x40
8005954: 817b strh r3, [r7, #10]
8005956: 897b ldrh r3, [r7, #10]
8005958: f083 0310 eor.w r3, r3, #16
800595c: 817b strh r3, [r7, #10]
800595e: 897b ldrh r3, [r7, #10]
8005960: f083 0320 eor.w r3, r3, #32
8005964: 817b strh r3, [r7, #10]
8005966: f507 7384 add.w r3, r7, #264 @ 0x108
800596a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800596e: 681a ldr r2, [r3, #0]
8005970: f507 7384 add.w r3, r7, #264 @ 0x108
8005974: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005978: 681b ldr r3, [r3, #0]
800597a: 781b ldrb r3, [r3, #0]
800597c: 009b lsls r3, r3, #2
800597e: 441a add r2, r3
8005980: 897b ldrh r3, [r7, #10]
8005982: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005986: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800598a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800598e: f043 0380 orr.w r3, r3, #128 @ 0x80
8005992: b29b uxth r3, r3
8005994: 8013 strh r3, [r2, #0]
8005996: f000 bcde b.w 8006356 <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800599a: f507 7384 add.w r3, r7, #264 @ 0x108
800599e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059a2: 681b ldr r3, [r3, #0]
80059a4: 7b1b ldrb r3, [r3, #12]
80059a6: 2b00 cmp r3, #0
80059a8: f040 80bb bne.w 8005b22 <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
80059ac: f507 7384 add.w r3, r7, #264 @ 0x108
80059b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059b4: 681b ldr r3, [r3, #0]
80059b6: 699a ldr r2, [r3, #24]
80059b8: f507 7384 add.w r3, r7, #264 @ 0x108
80059bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059c0: 681b ldr r3, [r3, #0]
80059c2: 691b ldr r3, [r3, #16]
80059c4: 429a cmp r2, r3
80059c6: d917 bls.n 80059f8 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
80059c8: f507 7384 add.w r3, r7, #264 @ 0x108
80059cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059d0: 681b ldr r3, [r3, #0]
80059d2: 691b ldr r3, [r3, #16]
80059d4: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
80059d8: f507 7384 add.w r3, r7, #264 @ 0x108
80059dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059e0: 681b ldr r3, [r3, #0]
80059e2: 699a ldr r2, [r3, #24]
80059e4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80059e8: 1ad2 subs r2, r2, r3
80059ea: f507 7384 add.w r3, r7, #264 @ 0x108
80059ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80059f2: 681b ldr r3, [r3, #0]
80059f4: 619a str r2, [r3, #24]
80059f6: e00e b.n 8005a16 <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
80059f8: f507 7384 add.w r3, r7, #264 @ 0x108
80059fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a00: 681b ldr r3, [r3, #0]
8005a02: 699b ldr r3, [r3, #24]
8005a04: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
8005a08: f507 7384 add.w r3, r7, #264 @ 0x108
8005a0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a10: 681b ldr r3, [r3, #0]
8005a12: 2200 movs r2, #0
8005a14: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
8005a16: f507 7384 add.w r3, r7, #264 @ 0x108
8005a1a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005a1e: 681b ldr r3, [r3, #0]
8005a20: f8c7 3090 str.w r3, [r7, #144] @ 0x90
8005a24: f507 7384 add.w r3, r7, #264 @ 0x108
8005a28: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005a2c: 681b ldr r3, [r3, #0]
8005a2e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005a32: b29b uxth r3, r3
8005a34: 461a mov r2, r3
8005a36: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
8005a3a: 4413 add r3, r2
8005a3c: f8c7 3090 str.w r3, [r7, #144] @ 0x90
8005a40: f507 7384 add.w r3, r7, #264 @ 0x108
8005a44: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005a48: 681b ldr r3, [r3, #0]
8005a4a: 781b ldrb r3, [r3, #0]
8005a4c: 011a lsls r2, r3, #4
8005a4e: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
8005a52: 4413 add r3, r2
8005a54: f203 430c addw r3, r3, #1036 @ 0x40c
8005a58: f8c7 308c str.w r3, [r7, #140] @ 0x8c
8005a5c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005a60: 881b ldrh r3, [r3, #0]
8005a62: b29b uxth r3, r3
8005a64: f3c3 0309 ubfx r3, r3, #0, #10
8005a68: b29a uxth r2, r3
8005a6a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005a6e: 801a strh r2, [r3, #0]
8005a70: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005a74: 2b3e cmp r3, #62 @ 0x3e
8005a76: d924 bls.n 8005ac2 <USB_EPStartXfer+0xec2>
8005a78: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005a7c: 095b lsrs r3, r3, #5
8005a7e: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8005a82: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005a86: f003 031f and.w r3, r3, #31
8005a8a: 2b00 cmp r3, #0
8005a8c: d104 bne.n 8005a98 <USB_EPStartXfer+0xe98>
8005a8e: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8005a92: 3b01 subs r3, #1
8005a94: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8005a98: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005a9c: 881b ldrh r3, [r3, #0]
8005a9e: b29a uxth r2, r3
8005aa0: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8005aa4: b29b uxth r3, r3
8005aa6: 029b lsls r3, r3, #10
8005aa8: b29b uxth r3, r3
8005aaa: 4313 orrs r3, r2
8005aac: b29b uxth r3, r3
8005aae: ea6f 4343 mvn.w r3, r3, lsl #17
8005ab2: ea6f 4353 mvn.w r3, r3, lsr #17
8005ab6: b29a uxth r2, r3
8005ab8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005abc: 801a strh r2, [r3, #0]
8005abe: f000 bc10 b.w 80062e2 <USB_EPStartXfer+0x16e2>
8005ac2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ac6: 2b00 cmp r3, #0
8005ac8: d10c bne.n 8005ae4 <USB_EPStartXfer+0xee4>
8005aca: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005ace: 881b ldrh r3, [r3, #0]
8005ad0: b29b uxth r3, r3
8005ad2: ea6f 4343 mvn.w r3, r3, lsl #17
8005ad6: ea6f 4353 mvn.w r3, r3, lsr #17
8005ada: b29a uxth r2, r3
8005adc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005ae0: 801a strh r2, [r3, #0]
8005ae2: e3fe b.n 80062e2 <USB_EPStartXfer+0x16e2>
8005ae4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005ae8: 085b lsrs r3, r3, #1
8005aea: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8005aee: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005af2: f003 0301 and.w r3, r3, #1
8005af6: 2b00 cmp r3, #0
8005af8: d004 beq.n 8005b04 <USB_EPStartXfer+0xf04>
8005afa: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8005afe: 3301 adds r3, #1
8005b00: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
8005b04: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005b08: 881b ldrh r3, [r3, #0]
8005b0a: b29a uxth r2, r3
8005b0c: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
8005b10: b29b uxth r3, r3
8005b12: 029b lsls r3, r3, #10
8005b14: b29b uxth r3, r3
8005b16: 4313 orrs r3, r2
8005b18: b29a uxth r2, r3
8005b1a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8005b1e: 801a strh r2, [r3, #0]
8005b20: e3df b.n 80062e2 <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
8005b22: f507 7384 add.w r3, r7, #264 @ 0x108
8005b26: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b2a: 681b ldr r3, [r3, #0]
8005b2c: 78db ldrb r3, [r3, #3]
8005b2e: 2b02 cmp r3, #2
8005b30: f040 8218 bne.w 8005f64 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
8005b34: f507 7384 add.w r3, r7, #264 @ 0x108
8005b38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b3c: 681b ldr r3, [r3, #0]
8005b3e: 785b ldrb r3, [r3, #1]
8005b40: 2b00 cmp r3, #0
8005b42: f040 809d bne.w 8005c80 <USB_EPStartXfer+0x1080>
8005b46: f507 7384 add.w r3, r7, #264 @ 0x108
8005b4a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005b4e: 681b ldr r3, [r3, #0]
8005b50: f8c7 30ac str.w r3, [r7, #172] @ 0xac
8005b54: f507 7384 add.w r3, r7, #264 @ 0x108
8005b58: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005b5c: 681b ldr r3, [r3, #0]
8005b5e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005b62: b29b uxth r3, r3
8005b64: 461a mov r2, r3
8005b66: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8005b6a: 4413 add r3, r2
8005b6c: f8c7 30ac str.w r3, [r7, #172] @ 0xac
8005b70: f507 7384 add.w r3, r7, #264 @ 0x108
8005b74: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005b78: 681b ldr r3, [r3, #0]
8005b7a: 781b ldrb r3, [r3, #0]
8005b7c: 011a lsls r2, r3, #4
8005b7e: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
8005b82: 4413 add r3, r2
8005b84: f203 4304 addw r3, r3, #1028 @ 0x404
8005b88: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
8005b8c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8005b90: 881b ldrh r3, [r3, #0]
8005b92: b29b uxth r3, r3
8005b94: f3c3 0309 ubfx r3, r3, #0, #10
8005b98: b29a uxth r2, r3
8005b9a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8005b9e: 801a strh r2, [r3, #0]
8005ba0: f507 7384 add.w r3, r7, #264 @ 0x108
8005ba4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005ba8: 681b ldr r3, [r3, #0]
8005baa: 691b ldr r3, [r3, #16]
8005bac: 2b3e cmp r3, #62 @ 0x3e
8005bae: d92b bls.n 8005c08 <USB_EPStartXfer+0x1008>
8005bb0: f507 7384 add.w r3, r7, #264 @ 0x108
8005bb4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005bb8: 681b ldr r3, [r3, #0]
8005bba: 691b ldr r3, [r3, #16]
8005bbc: 095b lsrs r3, r3, #5
8005bbe: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8005bc2: f507 7384 add.w r3, r7, #264 @ 0x108
8005bc6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005bca: 681b ldr r3, [r3, #0]
8005bcc: 691b ldr r3, [r3, #16]
8005bce: f003 031f and.w r3, r3, #31
8005bd2: 2b00 cmp r3, #0
8005bd4: d104 bne.n 8005be0 <USB_EPStartXfer+0xfe0>
8005bd6: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8005bda: 3b01 subs r3, #1
8005bdc: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8005be0: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8005be4: 881b ldrh r3, [r3, #0]
8005be6: b29a uxth r2, r3
8005be8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8005bec: b29b uxth r3, r3
8005bee: 029b lsls r3, r3, #10
8005bf0: b29b uxth r3, r3
8005bf2: 4313 orrs r3, r2
8005bf4: b29b uxth r3, r3
8005bf6: ea6f 4343 mvn.w r3, r3, lsl #17
8005bfa: ea6f 4353 mvn.w r3, r3, lsr #17
8005bfe: b29a uxth r2, r3
8005c00: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8005c04: 801a strh r2, [r3, #0]
8005c06: e070 b.n 8005cea <USB_EPStartXfer+0x10ea>
8005c08: f507 7384 add.w r3, r7, #264 @ 0x108
8005c0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c10: 681b ldr r3, [r3, #0]
8005c12: 691b ldr r3, [r3, #16]
8005c14: 2b00 cmp r3, #0
8005c16: d10c bne.n 8005c32 <USB_EPStartXfer+0x1032>
8005c18: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8005c1c: 881b ldrh r3, [r3, #0]
8005c1e: b29b uxth r3, r3
8005c20: ea6f 4343 mvn.w r3, r3, lsl #17
8005c24: ea6f 4353 mvn.w r3, r3, lsr #17
8005c28: b29a uxth r2, r3
8005c2a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8005c2e: 801a strh r2, [r3, #0]
8005c30: e05b b.n 8005cea <USB_EPStartXfer+0x10ea>
8005c32: f507 7384 add.w r3, r7, #264 @ 0x108
8005c36: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c3a: 681b ldr r3, [r3, #0]
8005c3c: 691b ldr r3, [r3, #16]
8005c3e: 085b lsrs r3, r3, #1
8005c40: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8005c44: f507 7384 add.w r3, r7, #264 @ 0x108
8005c48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c4c: 681b ldr r3, [r3, #0]
8005c4e: 691b ldr r3, [r3, #16]
8005c50: f003 0301 and.w r3, r3, #1
8005c54: 2b00 cmp r3, #0
8005c56: d004 beq.n 8005c62 <USB_EPStartXfer+0x1062>
8005c58: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8005c5c: 3301 adds r3, #1
8005c5e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
8005c62: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8005c66: 881b ldrh r3, [r3, #0]
8005c68: b29a uxth r2, r3
8005c6a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
8005c6e: b29b uxth r3, r3
8005c70: 029b lsls r3, r3, #10
8005c72: b29b uxth r3, r3
8005c74: 4313 orrs r3, r2
8005c76: b29a uxth r2, r3
8005c78: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
8005c7c: 801a strh r2, [r3, #0]
8005c7e: e034 b.n 8005cea <USB_EPStartXfer+0x10ea>
8005c80: f507 7384 add.w r3, r7, #264 @ 0x108
8005c84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005c88: 681b ldr r3, [r3, #0]
8005c8a: 785b ldrb r3, [r3, #1]
8005c8c: 2b01 cmp r3, #1
8005c8e: d12c bne.n 8005cea <USB_EPStartXfer+0x10ea>
8005c90: f507 7384 add.w r3, r7, #264 @ 0x108
8005c94: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005c98: 681b ldr r3, [r3, #0]
8005c9a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8005c9e: f507 7384 add.w r3, r7, #264 @ 0x108
8005ca2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005ca6: 681b ldr r3, [r3, #0]
8005ca8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005cac: b29b uxth r3, r3
8005cae: 461a mov r2, r3
8005cb0: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8005cb4: 4413 add r3, r2
8005cb6: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
8005cba: f507 7384 add.w r3, r7, #264 @ 0x108
8005cbe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005cc2: 681b ldr r3, [r3, #0]
8005cc4: 781b ldrb r3, [r3, #0]
8005cc6: 011a lsls r2, r3, #4
8005cc8: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
8005ccc: 4413 add r3, r2
8005cce: f203 4304 addw r3, r3, #1028 @ 0x404
8005cd2: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
8005cd6: f507 7384 add.w r3, r7, #264 @ 0x108
8005cda: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005cde: 681b ldr r3, [r3, #0]
8005ce0: 691b ldr r3, [r3, #16]
8005ce2: b29a uxth r2, r3
8005ce4: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
8005ce8: 801a strh r2, [r3, #0]
8005cea: f507 7384 add.w r3, r7, #264 @ 0x108
8005cee: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005cf2: 681b ldr r3, [r3, #0]
8005cf4: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
8005cf8: f507 7384 add.w r3, r7, #264 @ 0x108
8005cfc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d00: 681b ldr r3, [r3, #0]
8005d02: 785b ldrb r3, [r3, #1]
8005d04: 2b00 cmp r3, #0
8005d06: f040 809d bne.w 8005e44 <USB_EPStartXfer+0x1244>
8005d0a: f507 7384 add.w r3, r7, #264 @ 0x108
8005d0e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005d12: 681b ldr r3, [r3, #0]
8005d14: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8005d18: f507 7384 add.w r3, r7, #264 @ 0x108
8005d1c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005d20: 681b ldr r3, [r3, #0]
8005d22: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005d26: b29b uxth r3, r3
8005d28: 461a mov r2, r3
8005d2a: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8005d2e: 4413 add r3, r2
8005d30: f8c7 309c str.w r3, [r7, #156] @ 0x9c
8005d34: f507 7384 add.w r3, r7, #264 @ 0x108
8005d38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d3c: 681b ldr r3, [r3, #0]
8005d3e: 781b ldrb r3, [r3, #0]
8005d40: 011a lsls r2, r3, #4
8005d42: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
8005d46: 4413 add r3, r2
8005d48: f203 430c addw r3, r3, #1036 @ 0x40c
8005d4c: f8c7 3098 str.w r3, [r7, #152] @ 0x98
8005d50: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8005d54: 881b ldrh r3, [r3, #0]
8005d56: b29b uxth r3, r3
8005d58: f3c3 0309 ubfx r3, r3, #0, #10
8005d5c: b29a uxth r2, r3
8005d5e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8005d62: 801a strh r2, [r3, #0]
8005d64: f507 7384 add.w r3, r7, #264 @ 0x108
8005d68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d6c: 681b ldr r3, [r3, #0]
8005d6e: 691b ldr r3, [r3, #16]
8005d70: 2b3e cmp r3, #62 @ 0x3e
8005d72: d92b bls.n 8005dcc <USB_EPStartXfer+0x11cc>
8005d74: f507 7384 add.w r3, r7, #264 @ 0x108
8005d78: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d7c: 681b ldr r3, [r3, #0]
8005d7e: 691b ldr r3, [r3, #16]
8005d80: 095b lsrs r3, r3, #5
8005d82: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8005d86: f507 7384 add.w r3, r7, #264 @ 0x108
8005d8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005d8e: 681b ldr r3, [r3, #0]
8005d90: 691b ldr r3, [r3, #16]
8005d92: f003 031f and.w r3, r3, #31
8005d96: 2b00 cmp r3, #0
8005d98: d104 bne.n 8005da4 <USB_EPStartXfer+0x11a4>
8005d9a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8005d9e: 3b01 subs r3, #1
8005da0: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8005da4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8005da8: 881b ldrh r3, [r3, #0]
8005daa: b29a uxth r2, r3
8005dac: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8005db0: b29b uxth r3, r3
8005db2: 029b lsls r3, r3, #10
8005db4: b29b uxth r3, r3
8005db6: 4313 orrs r3, r2
8005db8: b29b uxth r3, r3
8005dba: ea6f 4343 mvn.w r3, r3, lsl #17
8005dbe: ea6f 4353 mvn.w r3, r3, lsr #17
8005dc2: b29a uxth r2, r3
8005dc4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8005dc8: 801a strh r2, [r3, #0]
8005dca: e069 b.n 8005ea0 <USB_EPStartXfer+0x12a0>
8005dcc: f507 7384 add.w r3, r7, #264 @ 0x108
8005dd0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005dd4: 681b ldr r3, [r3, #0]
8005dd6: 691b ldr r3, [r3, #16]
8005dd8: 2b00 cmp r3, #0
8005dda: d10c bne.n 8005df6 <USB_EPStartXfer+0x11f6>
8005ddc: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8005de0: 881b ldrh r3, [r3, #0]
8005de2: b29b uxth r3, r3
8005de4: ea6f 4343 mvn.w r3, r3, lsl #17
8005de8: ea6f 4353 mvn.w r3, r3, lsr #17
8005dec: b29a uxth r2, r3
8005dee: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8005df2: 801a strh r2, [r3, #0]
8005df4: e054 b.n 8005ea0 <USB_EPStartXfer+0x12a0>
8005df6: f507 7384 add.w r3, r7, #264 @ 0x108
8005dfa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005dfe: 681b ldr r3, [r3, #0]
8005e00: 691b ldr r3, [r3, #16]
8005e02: 085b lsrs r3, r3, #1
8005e04: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8005e08: f507 7384 add.w r3, r7, #264 @ 0x108
8005e0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e10: 681b ldr r3, [r3, #0]
8005e12: 691b ldr r3, [r3, #16]
8005e14: f003 0301 and.w r3, r3, #1
8005e18: 2b00 cmp r3, #0
8005e1a: d004 beq.n 8005e26 <USB_EPStartXfer+0x1226>
8005e1c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8005e20: 3301 adds r3, #1
8005e22: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
8005e26: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8005e2a: 881b ldrh r3, [r3, #0]
8005e2c: b29a uxth r2, r3
8005e2e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8005e32: b29b uxth r3, r3
8005e34: 029b lsls r3, r3, #10
8005e36: b29b uxth r3, r3
8005e38: 4313 orrs r3, r2
8005e3a: b29a uxth r2, r3
8005e3c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
8005e40: 801a strh r2, [r3, #0]
8005e42: e02d b.n 8005ea0 <USB_EPStartXfer+0x12a0>
8005e44: f507 7384 add.w r3, r7, #264 @ 0x108
8005e48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e4c: 681b ldr r3, [r3, #0]
8005e4e: 785b ldrb r3, [r3, #1]
8005e50: 2b01 cmp r3, #1
8005e52: d125 bne.n 8005ea0 <USB_EPStartXfer+0x12a0>
8005e54: f507 7384 add.w r3, r7, #264 @ 0x108
8005e58: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005e5c: 681b ldr r3, [r3, #0]
8005e5e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8005e62: b29b uxth r3, r3
8005e64: 461a mov r2, r3
8005e66: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8005e6a: 4413 add r3, r2
8005e6c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
8005e70: f507 7384 add.w r3, r7, #264 @ 0x108
8005e74: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e78: 681b ldr r3, [r3, #0]
8005e7a: 781b ldrb r3, [r3, #0]
8005e7c: 011a lsls r2, r3, #4
8005e7e: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
8005e82: 4413 add r3, r2
8005e84: f203 430c addw r3, r3, #1036 @ 0x40c
8005e88: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
8005e8c: f507 7384 add.w r3, r7, #264 @ 0x108
8005e90: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005e94: 681b ldr r3, [r3, #0]
8005e96: 691b ldr r3, [r3, #16]
8005e98: b29a uxth r2, r3
8005e9a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
8005e9e: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
8005ea0: f507 7384 add.w r3, r7, #264 @ 0x108
8005ea4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005ea8: 681b ldr r3, [r3, #0]
8005eaa: 69db ldr r3, [r3, #28]
8005eac: 2b00 cmp r3, #0
8005eae: f000 8218 beq.w 80062e2 <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
8005eb2: f507 7384 add.w r3, r7, #264 @ 0x108
8005eb6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005eba: 681a ldr r2, [r3, #0]
8005ebc: f507 7384 add.w r3, r7, #264 @ 0x108
8005ec0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005ec4: 681b ldr r3, [r3, #0]
8005ec6: 781b ldrb r3, [r3, #0]
8005ec8: 009b lsls r3, r3, #2
8005eca: 4413 add r3, r2
8005ecc: 881b ldrh r3, [r3, #0]
8005ece: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8005ed2: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8005ed6: f403 4380 and.w r3, r3, #16384 @ 0x4000
8005eda: 2b00 cmp r3, #0
8005edc: d005 beq.n 8005eea <USB_EPStartXfer+0x12ea>
8005ede: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8005ee2: f003 0340 and.w r3, r3, #64 @ 0x40
8005ee6: 2b00 cmp r3, #0
8005ee8: d10d bne.n 8005f06 <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8005eea: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8005eee: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
8005ef2: 2b00 cmp r3, #0
8005ef4: f040 81f5 bne.w 80062e2 <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
8005ef8: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
8005efc: f003 0340 and.w r3, r3, #64 @ 0x40
8005f00: 2b00 cmp r3, #0
8005f02: f040 81ee bne.w 80062e2 <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
8005f06: f507 7384 add.w r3, r7, #264 @ 0x108
8005f0a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005f0e: 681a ldr r2, [r3, #0]
8005f10: f507 7384 add.w r3, r7, #264 @ 0x108
8005f14: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005f18: 681b ldr r3, [r3, #0]
8005f1a: 781b ldrb r3, [r3, #0]
8005f1c: 009b lsls r3, r3, #2
8005f1e: 4413 add r3, r2
8005f20: 881b ldrh r3, [r3, #0]
8005f22: b29b uxth r3, r3
8005f24: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8005f28: f023 0370 bic.w r3, r3, #112 @ 0x70
8005f2c: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
8005f30: f507 7384 add.w r3, r7, #264 @ 0x108
8005f34: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005f38: 681a ldr r2, [r3, #0]
8005f3a: f507 7384 add.w r3, r7, #264 @ 0x108
8005f3e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005f42: 681b ldr r3, [r3, #0]
8005f44: 781b ldrb r3, [r3, #0]
8005f46: 009b lsls r3, r3, #2
8005f48: 441a add r2, r3
8005f4a: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
8005f4e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8005f52: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8005f56: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8005f5a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8005f5e: b29b uxth r3, r3
8005f60: 8013 strh r3, [r2, #0]
8005f62: e1be b.n 80062e2 <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
8005f64: f507 7384 add.w r3, r7, #264 @ 0x108
8005f68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005f6c: 681b ldr r3, [r3, #0]
8005f6e: 78db ldrb r3, [r3, #3]
8005f70: 2b01 cmp r3, #1
8005f72: f040 81b4 bne.w 80062de <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
8005f76: f507 7384 add.w r3, r7, #264 @ 0x108
8005f7a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005f7e: 681b ldr r3, [r3, #0]
8005f80: 699a ldr r2, [r3, #24]
8005f82: f507 7384 add.w r3, r7, #264 @ 0x108
8005f86: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005f8a: 681b ldr r3, [r3, #0]
8005f8c: 691b ldr r3, [r3, #16]
8005f8e: 429a cmp r2, r3
8005f90: d917 bls.n 8005fc2 <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
8005f92: f507 7384 add.w r3, r7, #264 @ 0x108
8005f96: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005f9a: 681b ldr r3, [r3, #0]
8005f9c: 691b ldr r3, [r3, #16]
8005f9e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
8005fa2: f507 7384 add.w r3, r7, #264 @ 0x108
8005fa6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005faa: 681b ldr r3, [r3, #0]
8005fac: 699a ldr r2, [r3, #24]
8005fae: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8005fb2: 1ad2 subs r2, r2, r3
8005fb4: f507 7384 add.w r3, r7, #264 @ 0x108
8005fb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005fbc: 681b ldr r3, [r3, #0]
8005fbe: 619a str r2, [r3, #24]
8005fc0: e00e b.n 8005fe0 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
8005fc2: f507 7384 add.w r3, r7, #264 @ 0x108
8005fc6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005fca: 681b ldr r3, [r3, #0]
8005fcc: 699b ldr r3, [r3, #24]
8005fce: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
8005fd2: f507 7384 add.w r3, r7, #264 @ 0x108
8005fd6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005fda: 681b ldr r3, [r3, #0]
8005fdc: 2200 movs r2, #0
8005fde: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
8005fe0: f507 7384 add.w r3, r7, #264 @ 0x108
8005fe4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8005fe8: 681b ldr r3, [r3, #0]
8005fea: 785b ldrb r3, [r3, #1]
8005fec: 2b00 cmp r3, #0
8005fee: f040 8085 bne.w 80060fc <USB_EPStartXfer+0x14fc>
8005ff2: f507 7384 add.w r3, r7, #264 @ 0x108
8005ff6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8005ffa: 681b ldr r3, [r3, #0]
8005ffc: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
8006000: f507 7384 add.w r3, r7, #264 @ 0x108
8006004: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006008: 681b ldr r3, [r3, #0]
800600a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800600e: b29b uxth r3, r3
8006010: 461a mov r2, r3
8006012: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
8006016: 4413 add r3, r2
8006018: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800601c: f507 7384 add.w r3, r7, #264 @ 0x108
8006020: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006024: 681b ldr r3, [r3, #0]
8006026: 781b ldrb r3, [r3, #0]
8006028: 011a lsls r2, r3, #4
800602a: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800602e: 4413 add r3, r2
8006030: f203 4304 addw r3, r3, #1028 @ 0x404
8006034: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
8006038: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800603c: 881b ldrh r3, [r3, #0]
800603e: b29b uxth r3, r3
8006040: f3c3 0309 ubfx r3, r3, #0, #10
8006044: b29a uxth r2, r3
8006046: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800604a: 801a strh r2, [r3, #0]
800604c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006050: 2b3e cmp r3, #62 @ 0x3e
8006052: d923 bls.n 800609c <USB_EPStartXfer+0x149c>
8006054: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006058: 095b lsrs r3, r3, #5
800605a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800605e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006062: f003 031f and.w r3, r3, #31
8006066: 2b00 cmp r3, #0
8006068: d104 bne.n 8006074 <USB_EPStartXfer+0x1474>
800606a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800606e: 3b01 subs r3, #1
8006070: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
8006074: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006078: 881b ldrh r3, [r3, #0]
800607a: b29a uxth r2, r3
800607c: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
8006080: b29b uxth r3, r3
8006082: 029b lsls r3, r3, #10
8006084: b29b uxth r3, r3
8006086: 4313 orrs r3, r2
8006088: b29b uxth r3, r3
800608a: ea6f 4343 mvn.w r3, r3, lsl #17
800608e: ea6f 4353 mvn.w r3, r3, lsr #17
8006092: b29a uxth r2, r3
8006094: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
8006098: 801a strh r2, [r3, #0]
800609a: e060 b.n 800615e <USB_EPStartXfer+0x155e>
800609c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80060a0: 2b00 cmp r3, #0
80060a2: d10c bne.n 80060be <USB_EPStartXfer+0x14be>
80060a4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
80060a8: 881b ldrh r3, [r3, #0]
80060aa: b29b uxth r3, r3
80060ac: ea6f 4343 mvn.w r3, r3, lsl #17
80060b0: ea6f 4353 mvn.w r3, r3, lsr #17
80060b4: b29a uxth r2, r3
80060b6: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
80060ba: 801a strh r2, [r3, #0]
80060bc: e04f b.n 800615e <USB_EPStartXfer+0x155e>
80060be: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80060c2: 085b lsrs r3, r3, #1
80060c4: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
80060c8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80060cc: f003 0301 and.w r3, r3, #1
80060d0: 2b00 cmp r3, #0
80060d2: d004 beq.n 80060de <USB_EPStartXfer+0x14de>
80060d4: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
80060d8: 3301 adds r3, #1
80060da: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
80060de: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
80060e2: 881b ldrh r3, [r3, #0]
80060e4: b29a uxth r2, r3
80060e6: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
80060ea: b29b uxth r3, r3
80060ec: 029b lsls r3, r3, #10
80060ee: b29b uxth r3, r3
80060f0: 4313 orrs r3, r2
80060f2: b29a uxth r2, r3
80060f4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
80060f8: 801a strh r2, [r3, #0]
80060fa: e030 b.n 800615e <USB_EPStartXfer+0x155e>
80060fc: f507 7384 add.w r3, r7, #264 @ 0x108
8006100: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006104: 681b ldr r3, [r3, #0]
8006106: 785b ldrb r3, [r3, #1]
8006108: 2b01 cmp r3, #1
800610a: d128 bne.n 800615e <USB_EPStartXfer+0x155e>
800610c: f507 7384 add.w r3, r7, #264 @ 0x108
8006110: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006114: 681b ldr r3, [r3, #0]
8006116: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800611a: f507 7384 add.w r3, r7, #264 @ 0x108
800611e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006122: 681b ldr r3, [r3, #0]
8006124: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006128: b29b uxth r3, r3
800612a: 461a mov r2, r3
800612c: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8006130: 4413 add r3, r2
8006132: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
8006136: f507 7384 add.w r3, r7, #264 @ 0x108
800613a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800613e: 681b ldr r3, [r3, #0]
8006140: 781b ldrb r3, [r3, #0]
8006142: 011a lsls r2, r3, #4
8006144: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
8006148: 4413 add r3, r2
800614a: f203 4304 addw r3, r3, #1028 @ 0x404
800614e: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
8006152: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006156: b29a uxth r2, r3
8006158: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
800615c: 801a strh r2, [r3, #0]
800615e: f507 7384 add.w r3, r7, #264 @ 0x108
8006162: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006166: 681b ldr r3, [r3, #0]
8006168: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800616c: f507 7384 add.w r3, r7, #264 @ 0x108
8006170: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006174: 681b ldr r3, [r3, #0]
8006176: 785b ldrb r3, [r3, #1]
8006178: 2b00 cmp r3, #0
800617a: f040 8085 bne.w 8006288 <USB_EPStartXfer+0x1688>
800617e: f507 7384 add.w r3, r7, #264 @ 0x108
8006182: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006186: 681b ldr r3, [r3, #0]
8006188: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800618c: f507 7384 add.w r3, r7, #264 @ 0x108
8006190: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8006194: 681b ldr r3, [r3, #0]
8006196: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800619a: b29b uxth r3, r3
800619c: 461a mov r2, r3
800619e: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
80061a2: 4413 add r3, r2
80061a4: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
80061a8: f507 7384 add.w r3, r7, #264 @ 0x108
80061ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80061b0: 681b ldr r3, [r3, #0]
80061b2: 781b ldrb r3, [r3, #0]
80061b4: 011a lsls r2, r3, #4
80061b6: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
80061ba: 4413 add r3, r2
80061bc: f203 430c addw r3, r3, #1036 @ 0x40c
80061c0: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
80061c4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
80061c8: 881b ldrh r3, [r3, #0]
80061ca: b29b uxth r3, r3
80061cc: f3c3 0309 ubfx r3, r3, #0, #10
80061d0: b29a uxth r2, r3
80061d2: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
80061d6: 801a strh r2, [r3, #0]
80061d8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80061dc: 2b3e cmp r3, #62 @ 0x3e
80061de: d923 bls.n 8006228 <USB_EPStartXfer+0x1628>
80061e0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80061e4: 095b lsrs r3, r3, #5
80061e6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
80061ea: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80061ee: f003 031f and.w r3, r3, #31
80061f2: 2b00 cmp r3, #0
80061f4: d104 bne.n 8006200 <USB_EPStartXfer+0x1600>
80061f6: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
80061fa: 3b01 subs r3, #1
80061fc: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8006200: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006204: 881b ldrh r3, [r3, #0]
8006206: b29a uxth r2, r3
8006208: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800620c: b29b uxth r3, r3
800620e: 029b lsls r3, r3, #10
8006210: b29b uxth r3, r3
8006212: 4313 orrs r3, r2
8006214: b29b uxth r3, r3
8006216: ea6f 4343 mvn.w r3, r3, lsl #17
800621a: ea6f 4353 mvn.w r3, r3, lsr #17
800621e: b29a uxth r2, r3
8006220: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006224: 801a strh r2, [r3, #0]
8006226: e05c b.n 80062e2 <USB_EPStartXfer+0x16e2>
8006228: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800622c: 2b00 cmp r3, #0
800622e: d10c bne.n 800624a <USB_EPStartXfer+0x164a>
8006230: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006234: 881b ldrh r3, [r3, #0]
8006236: b29b uxth r3, r3
8006238: ea6f 4343 mvn.w r3, r3, lsl #17
800623c: ea6f 4353 mvn.w r3, r3, lsr #17
8006240: b29a uxth r2, r3
8006242: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006246: 801a strh r2, [r3, #0]
8006248: e04b b.n 80062e2 <USB_EPStartXfer+0x16e2>
800624a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800624e: 085b lsrs r3, r3, #1
8006250: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
8006254: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8006258: f003 0301 and.w r3, r3, #1
800625c: 2b00 cmp r3, #0
800625e: d004 beq.n 800626a <USB_EPStartXfer+0x166a>
8006260: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8006264: 3301 adds r3, #1
8006266: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800626a: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800626e: 881b ldrh r3, [r3, #0]
8006270: b29a uxth r2, r3
8006272: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
8006276: b29b uxth r3, r3
8006278: 029b lsls r3, r3, #10
800627a: b29b uxth r3, r3
800627c: 4313 orrs r3, r2
800627e: b29a uxth r2, r3
8006280: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
8006284: 801a strh r2, [r3, #0]
8006286: e02c b.n 80062e2 <USB_EPStartXfer+0x16e2>
8006288: f507 7384 add.w r3, r7, #264 @ 0x108
800628c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006290: 681b ldr r3, [r3, #0]
8006292: 785b ldrb r3, [r3, #1]
8006294: 2b01 cmp r3, #1
8006296: d124 bne.n 80062e2 <USB_EPStartXfer+0x16e2>
8006298: f507 7384 add.w r3, r7, #264 @ 0x108
800629c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80062a0: 681b ldr r3, [r3, #0]
80062a2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80062a6: b29b uxth r3, r3
80062a8: 461a mov r2, r3
80062aa: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
80062ae: 4413 add r3, r2
80062b0: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
80062b4: f507 7384 add.w r3, r7, #264 @ 0x108
80062b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80062bc: 681b ldr r3, [r3, #0]
80062be: 781b ldrb r3, [r3, #0]
80062c0: 011a lsls r2, r3, #4
80062c2: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
80062c6: 4413 add r3, r2
80062c8: f203 430c addw r3, r3, #1036 @ 0x40c
80062cc: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
80062d0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
80062d4: b29a uxth r2, r3
80062d6: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
80062da: 801a strh r2, [r3, #0]
80062dc: e001 b.n 80062e2 <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
80062de: 2301 movs r3, #1
80062e0: e03a b.n 8006358 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
80062e2: f507 7384 add.w r3, r7, #264 @ 0x108
80062e6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
80062ea: 681a ldr r2, [r3, #0]
80062ec: f507 7384 add.w r3, r7, #264 @ 0x108
80062f0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
80062f4: 681b ldr r3, [r3, #0]
80062f6: 781b ldrb r3, [r3, #0]
80062f8: 009b lsls r3, r3, #2
80062fa: 4413 add r3, r2
80062fc: 881b ldrh r3, [r3, #0]
80062fe: b29b uxth r3, r3
8006300: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006304: f023 0370 bic.w r3, r3, #112 @ 0x70
8006308: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800630c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8006310: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8006314: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8006318: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800631c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006320: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8006324: f507 7384 add.w r3, r7, #264 @ 0x108
8006328: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800632c: 681a ldr r2, [r3, #0]
800632e: f507 7384 add.w r3, r7, #264 @ 0x108
8006332: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8006336: 681b ldr r3, [r3, #0]
8006338: 781b ldrb r3, [r3, #0]
800633a: 009b lsls r3, r3, #2
800633c: 441a add r2, r3
800633e: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8006342: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006346: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800634a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800634e: f043 0380 orr.w r3, r3, #128 @ 0x80
8006352: b29b uxth r3, r3
8006354: 8013 strh r3, [r2, #0]
}
return HAL_OK;
8006356: 2300 movs r3, #0
}
8006358: 4618 mov r0, r3
800635a: f507 7784 add.w r7, r7, #264 @ 0x108
800635e: 46bd mov sp, r7
8006360: bd80 pop {r7, pc}
08006362 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8006362: b480 push {r7}
8006364: b085 sub sp, #20
8006366: af00 add r7, sp, #0
8006368: 6078 str r0, [r7, #4]
800636a: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
800636c: 683b ldr r3, [r7, #0]
800636e: 785b ldrb r3, [r3, #1]
8006370: 2b00 cmp r3, #0
8006372: d020 beq.n 80063b6 <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
8006374: 687a ldr r2, [r7, #4]
8006376: 683b ldr r3, [r7, #0]
8006378: 781b ldrb r3, [r3, #0]
800637a: 009b lsls r3, r3, #2
800637c: 4413 add r3, r2
800637e: 881b ldrh r3, [r3, #0]
8006380: b29b uxth r3, r3
8006382: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006386: f023 0340 bic.w r3, r3, #64 @ 0x40
800638a: 81bb strh r3, [r7, #12]
800638c: 89bb ldrh r3, [r7, #12]
800638e: f083 0310 eor.w r3, r3, #16
8006392: 81bb strh r3, [r7, #12]
8006394: 687a ldr r2, [r7, #4]
8006396: 683b ldr r3, [r7, #0]
8006398: 781b ldrb r3, [r3, #0]
800639a: 009b lsls r3, r3, #2
800639c: 441a add r2, r3
800639e: 89bb ldrh r3, [r7, #12]
80063a0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80063a4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80063a8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80063ac: f043 0380 orr.w r3, r3, #128 @ 0x80
80063b0: b29b uxth r3, r3
80063b2: 8013 strh r3, [r2, #0]
80063b4: e01f b.n 80063f6 <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
80063b6: 687a ldr r2, [r7, #4]
80063b8: 683b ldr r3, [r7, #0]
80063ba: 781b ldrb r3, [r3, #0]
80063bc: 009b lsls r3, r3, #2
80063be: 4413 add r3, r2
80063c0: 881b ldrh r3, [r3, #0]
80063c2: b29b uxth r3, r3
80063c4: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80063c8: f023 0370 bic.w r3, r3, #112 @ 0x70
80063cc: 81fb strh r3, [r7, #14]
80063ce: 89fb ldrh r3, [r7, #14]
80063d0: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80063d4: 81fb strh r3, [r7, #14]
80063d6: 687a ldr r2, [r7, #4]
80063d8: 683b ldr r3, [r7, #0]
80063da: 781b ldrb r3, [r3, #0]
80063dc: 009b lsls r3, r3, #2
80063de: 441a add r2, r3
80063e0: 89fb ldrh r3, [r7, #14]
80063e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80063e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80063ea: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80063ee: f043 0380 orr.w r3, r3, #128 @ 0x80
80063f2: b29b uxth r3, r3
80063f4: 8013 strh r3, [r2, #0]
}
return HAL_OK;
80063f6: 2300 movs r3, #0
}
80063f8: 4618 mov r0, r3
80063fa: 3714 adds r7, #20
80063fc: 46bd mov sp, r7
80063fe: bc80 pop {r7}
8006400: 4770 bx lr
08006402 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8006402: b480 push {r7}
8006404: b087 sub sp, #28
8006406: af00 add r7, sp, #0
8006408: 6078 str r0, [r7, #4]
800640a: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800640c: 683b ldr r3, [r7, #0]
800640e: 7b1b ldrb r3, [r3, #12]
8006410: 2b00 cmp r3, #0
8006412: f040 809d bne.w 8006550 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
8006416: 683b ldr r3, [r7, #0]
8006418: 785b ldrb r3, [r3, #1]
800641a: 2b00 cmp r3, #0
800641c: d04c beq.n 80064b8 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800641e: 687a ldr r2, [r7, #4]
8006420: 683b ldr r3, [r7, #0]
8006422: 781b ldrb r3, [r3, #0]
8006424: 009b lsls r3, r3, #2
8006426: 4413 add r3, r2
8006428: 881b ldrh r3, [r3, #0]
800642a: 823b strh r3, [r7, #16]
800642c: 8a3b ldrh r3, [r7, #16]
800642e: f003 0340 and.w r3, r3, #64 @ 0x40
8006432: 2b00 cmp r3, #0
8006434: d01b beq.n 800646e <USB_EPClearStall+0x6c>
8006436: 687a ldr r2, [r7, #4]
8006438: 683b ldr r3, [r7, #0]
800643a: 781b ldrb r3, [r3, #0]
800643c: 009b lsls r3, r3, #2
800643e: 4413 add r3, r2
8006440: 881b ldrh r3, [r3, #0]
8006442: b29b uxth r3, r3
8006444: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006448: f023 0370 bic.w r3, r3, #112 @ 0x70
800644c: 81fb strh r3, [r7, #14]
800644e: 687a ldr r2, [r7, #4]
8006450: 683b ldr r3, [r7, #0]
8006452: 781b ldrb r3, [r3, #0]
8006454: 009b lsls r3, r3, #2
8006456: 441a add r2, r3
8006458: 89fb ldrh r3, [r7, #14]
800645a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800645e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006462: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006466: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800646a: b29b uxth r3, r3
800646c: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800646e: 683b ldr r3, [r7, #0]
8006470: 78db ldrb r3, [r3, #3]
8006472: 2b01 cmp r3, #1
8006474: d06c beq.n 8006550 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8006476: 687a ldr r2, [r7, #4]
8006478: 683b ldr r3, [r7, #0]
800647a: 781b ldrb r3, [r3, #0]
800647c: 009b lsls r3, r3, #2
800647e: 4413 add r3, r2
8006480: 881b ldrh r3, [r3, #0]
8006482: b29b uxth r3, r3
8006484: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006488: f023 0340 bic.w r3, r3, #64 @ 0x40
800648c: 81bb strh r3, [r7, #12]
800648e: 89bb ldrh r3, [r7, #12]
8006490: f083 0320 eor.w r3, r3, #32
8006494: 81bb strh r3, [r7, #12]
8006496: 687a ldr r2, [r7, #4]
8006498: 683b ldr r3, [r7, #0]
800649a: 781b ldrb r3, [r3, #0]
800649c: 009b lsls r3, r3, #2
800649e: 441a add r2, r3
80064a0: 89bb ldrh r3, [r7, #12]
80064a2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80064a6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80064aa: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80064ae: f043 0380 orr.w r3, r3, #128 @ 0x80
80064b2: b29b uxth r3, r3
80064b4: 8013 strh r3, [r2, #0]
80064b6: e04b b.n 8006550 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80064b8: 687a ldr r2, [r7, #4]
80064ba: 683b ldr r3, [r7, #0]
80064bc: 781b ldrb r3, [r3, #0]
80064be: 009b lsls r3, r3, #2
80064c0: 4413 add r3, r2
80064c2: 881b ldrh r3, [r3, #0]
80064c4: 82fb strh r3, [r7, #22]
80064c6: 8afb ldrh r3, [r7, #22]
80064c8: f403 4380 and.w r3, r3, #16384 @ 0x4000
80064cc: 2b00 cmp r3, #0
80064ce: d01b beq.n 8006508 <USB_EPClearStall+0x106>
80064d0: 687a ldr r2, [r7, #4]
80064d2: 683b ldr r3, [r7, #0]
80064d4: 781b ldrb r3, [r3, #0]
80064d6: 009b lsls r3, r3, #2
80064d8: 4413 add r3, r2
80064da: 881b ldrh r3, [r3, #0]
80064dc: b29b uxth r3, r3
80064de: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80064e2: f023 0370 bic.w r3, r3, #112 @ 0x70
80064e6: 82bb strh r3, [r7, #20]
80064e8: 687a ldr r2, [r7, #4]
80064ea: 683b ldr r3, [r7, #0]
80064ec: 781b ldrb r3, [r3, #0]
80064ee: 009b lsls r3, r3, #2
80064f0: 441a add r2, r3
80064f2: 8abb ldrh r3, [r7, #20]
80064f4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80064f8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80064fc: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006500: f043 0380 orr.w r3, r3, #128 @ 0x80
8006504: b29b uxth r3, r3
8006506: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8006508: 687a ldr r2, [r7, #4]
800650a: 683b ldr r3, [r7, #0]
800650c: 781b ldrb r3, [r3, #0]
800650e: 009b lsls r3, r3, #2
8006510: 4413 add r3, r2
8006512: 881b ldrh r3, [r3, #0]
8006514: b29b uxth r3, r3
8006516: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800651a: f023 0370 bic.w r3, r3, #112 @ 0x70
800651e: 827b strh r3, [r7, #18]
8006520: 8a7b ldrh r3, [r7, #18]
8006522: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8006526: 827b strh r3, [r7, #18]
8006528: 8a7b ldrh r3, [r7, #18]
800652a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800652e: 827b strh r3, [r7, #18]
8006530: 687a ldr r2, [r7, #4]
8006532: 683b ldr r3, [r7, #0]
8006534: 781b ldrb r3, [r3, #0]
8006536: 009b lsls r3, r3, #2
8006538: 441a add r2, r3
800653a: 8a7b ldrh r3, [r7, #18]
800653c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006540: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006544: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006548: f043 0380 orr.w r3, r3, #128 @ 0x80
800654c: b29b uxth r3, r3
800654e: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
8006550: 2300 movs r3, #0
}
8006552: 4618 mov r0, r3
8006554: 371c adds r7, #28
8006556: 46bd mov sp, r7
8006558: bc80 pop {r7}
800655a: 4770 bx lr
0800655c <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
800655c: b480 push {r7}
800655e: b083 sub sp, #12
8006560: af00 add r7, sp, #0
8006562: 6078 str r0, [r7, #4]
8006564: 460b mov r3, r1
8006566: 70fb strb r3, [r7, #3]
if (address == 0U)
8006568: 78fb ldrb r3, [r7, #3]
800656a: 2b00 cmp r3, #0
800656c: d103 bne.n 8006576 <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800656e: 687b ldr r3, [r7, #4]
8006570: 2280 movs r2, #128 @ 0x80
8006572: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
8006576: 2300 movs r3, #0
}
8006578: 4618 mov r0, r3
800657a: 370c adds r7, #12
800657c: 46bd mov sp, r7
800657e: bc80 pop {r7}
8006580: 4770 bx lr
08006582 <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
8006582: b480 push {r7}
8006584: b083 sub sp, #12
8006586: af00 add r7, sp, #0
8006588: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800658a: 2300 movs r3, #0
}
800658c: 4618 mov r0, r3
800658e: 370c adds r7, #12
8006590: 46bd mov sp, r7
8006592: bc80 pop {r7}
8006594: 4770 bx lr
08006596 <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
8006596: b480 push {r7}
8006598: b083 sub sp, #12
800659a: af00 add r7, sp, #0
800659c: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800659e: 2300 movs r3, #0
}
80065a0: 4618 mov r0, r3
80065a2: 370c adds r7, #12
80065a4: 46bd mov sp, r7
80065a6: bc80 pop {r7}
80065a8: 4770 bx lr
080065aa <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
80065aa: b480 push {r7}
80065ac: b085 sub sp, #20
80065ae: af00 add r7, sp, #0
80065b0: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
80065b2: 687b ldr r3, [r7, #4]
80065b4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80065b8: b29b uxth r3, r3
80065ba: 60fb str r3, [r7, #12]
return tmpreg;
80065bc: 68fb ldr r3, [r7, #12]
}
80065be: 4618 mov r0, r3
80065c0: 3714 adds r7, #20
80065c2: 46bd mov sp, r7
80065c4: bc80 pop {r7}
80065c6: 4770 bx lr
080065c8 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
80065c8: b480 push {r7}
80065ca: b083 sub sp, #12
80065cc: af00 add r7, sp, #0
80065ce: 6078 str r0, [r7, #4]
80065d0: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80065d2: 2300 movs r3, #0
}
80065d4: 4618 mov r0, r3
80065d6: 370c adds r7, #12
80065d8: 46bd mov sp, r7
80065da: bc80 pop {r7}
80065dc: 4770 bx lr
080065de <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
80065de: b480 push {r7}
80065e0: b08b sub sp, #44 @ 0x2c
80065e2: af00 add r7, sp, #0
80065e4: 60f8 str r0, [r7, #12]
80065e6: 60b9 str r1, [r7, #8]
80065e8: 4611 mov r1, r2
80065ea: 461a mov r2, r3
80065ec: 460b mov r3, r1
80065ee: 80fb strh r3, [r7, #6]
80065f0: 4613 mov r3, r2
80065f2: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
80065f4: 88bb ldrh r3, [r7, #4]
80065f6: 3301 adds r3, #1
80065f8: 085b lsrs r3, r3, #1
80065fa: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
80065fc: 68fb ldr r3, [r7, #12]
80065fe: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
8006600: 68bb ldr r3, [r7, #8]
8006602: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8006604: 88fb ldrh r3, [r7, #6]
8006606: 005a lsls r2, r3, #1
8006608: 697b ldr r3, [r7, #20]
800660a: 4413 add r3, r2
800660c: f503 6380 add.w r3, r3, #1024 @ 0x400
8006610: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
8006612: 69bb ldr r3, [r7, #24]
8006614: 627b str r3, [r7, #36] @ 0x24
8006616: e01f b.n 8006658 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
8006618: 69fb ldr r3, [r7, #28]
800661a: 781b ldrb r3, [r3, #0]
800661c: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
800661e: 69fb ldr r3, [r7, #28]
8006620: 3301 adds r3, #1
8006622: 781b ldrb r3, [r3, #0]
8006624: b21b sxth r3, r3
8006626: 021b lsls r3, r3, #8
8006628: b21a sxth r2, r3
800662a: f9b7 3012 ldrsh.w r3, [r7, #18]
800662e: 4313 orrs r3, r2
8006630: b21b sxth r3, r3
8006632: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
8006634: 6a3b ldr r3, [r7, #32]
8006636: 8a7a ldrh r2, [r7, #18]
8006638: 801a strh r2, [r3, #0]
pdwVal++;
800663a: 6a3b ldr r3, [r7, #32]
800663c: 3302 adds r3, #2
800663e: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
8006640: 6a3b ldr r3, [r7, #32]
8006642: 3302 adds r3, #2
8006644: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
8006646: 69fb ldr r3, [r7, #28]
8006648: 3301 adds r3, #1
800664a: 61fb str r3, [r7, #28]
pBuf++;
800664c: 69fb ldr r3, [r7, #28]
800664e: 3301 adds r3, #1
8006650: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
8006652: 6a7b ldr r3, [r7, #36] @ 0x24
8006654: 3b01 subs r3, #1
8006656: 627b str r3, [r7, #36] @ 0x24
8006658: 6a7b ldr r3, [r7, #36] @ 0x24
800665a: 2b00 cmp r3, #0
800665c: d1dc bne.n 8006618 <USB_WritePMA+0x3a>
}
}
800665e: bf00 nop
8006660: bf00 nop
8006662: 372c adds r7, #44 @ 0x2c
8006664: 46bd mov sp, r7
8006666: bc80 pop {r7}
8006668: 4770 bx lr
0800666a <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800666a: b480 push {r7}
800666c: b08b sub sp, #44 @ 0x2c
800666e: af00 add r7, sp, #0
8006670: 60f8 str r0, [r7, #12]
8006672: 60b9 str r1, [r7, #8]
8006674: 4611 mov r1, r2
8006676: 461a mov r2, r3
8006678: 460b mov r3, r1
800667a: 80fb strh r3, [r7, #6]
800667c: 4613 mov r3, r2
800667e: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
8006680: 88bb ldrh r3, [r7, #4]
8006682: 085b lsrs r3, r3, #1
8006684: b29b uxth r3, r3
8006686: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
8006688: 68fb ldr r3, [r7, #12]
800668a: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800668c: 68bb ldr r3, [r7, #8]
800668e: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
8006690: 88fb ldrh r3, [r7, #6]
8006692: 005a lsls r2, r3, #1
8006694: 697b ldr r3, [r7, #20]
8006696: 4413 add r3, r2
8006698: f503 6380 add.w r3, r3, #1024 @ 0x400
800669c: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800669e: 69bb ldr r3, [r7, #24]
80066a0: 627b str r3, [r7, #36] @ 0x24
80066a2: e01b b.n 80066dc <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
80066a4: 6a3b ldr r3, [r7, #32]
80066a6: 881b ldrh r3, [r3, #0]
80066a8: b29b uxth r3, r3
80066aa: 613b str r3, [r7, #16]
pdwVal++;
80066ac: 6a3b ldr r3, [r7, #32]
80066ae: 3302 adds r3, #2
80066b0: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
80066b2: 693b ldr r3, [r7, #16]
80066b4: b2da uxtb r2, r3
80066b6: 69fb ldr r3, [r7, #28]
80066b8: 701a strb r2, [r3, #0]
pBuf++;
80066ba: 69fb ldr r3, [r7, #28]
80066bc: 3301 adds r3, #1
80066be: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
80066c0: 693b ldr r3, [r7, #16]
80066c2: 0a1b lsrs r3, r3, #8
80066c4: b2da uxtb r2, r3
80066c6: 69fb ldr r3, [r7, #28]
80066c8: 701a strb r2, [r3, #0]
pBuf++;
80066ca: 69fb ldr r3, [r7, #28]
80066cc: 3301 adds r3, #1
80066ce: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
80066d0: 6a3b ldr r3, [r7, #32]
80066d2: 3302 adds r3, #2
80066d4: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
80066d6: 6a7b ldr r3, [r7, #36] @ 0x24
80066d8: 3b01 subs r3, #1
80066da: 627b str r3, [r7, #36] @ 0x24
80066dc: 6a7b ldr r3, [r7, #36] @ 0x24
80066de: 2b00 cmp r3, #0
80066e0: d1e0 bne.n 80066a4 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
80066e2: 88bb ldrh r3, [r7, #4]
80066e4: f003 0301 and.w r3, r3, #1
80066e8: b29b uxth r3, r3
80066ea: 2b00 cmp r3, #0
80066ec: d007 beq.n 80066fe <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
80066ee: 6a3b ldr r3, [r7, #32]
80066f0: 881b ldrh r3, [r3, #0]
80066f2: b29b uxth r3, r3
80066f4: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
80066f6: 693b ldr r3, [r7, #16]
80066f8: b2da uxtb r2, r3
80066fa: 69fb ldr r3, [r7, #28]
80066fc: 701a strb r2, [r3, #0]
}
}
80066fe: bf00 nop
8006700: 372c adds r7, #44 @ 0x2c
8006702: 46bd mov sp, r7
8006704: bc80 pop {r7}
8006706: 4770 bx lr
08006708 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8006708: b580 push {r7, lr}
800670a: b084 sub sp, #16
800670c: af00 add r7, sp, #0
800670e: 6078 str r0, [r7, #4]
8006710: 460b mov r3, r1
8006712: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
8006714: 2300 movs r3, #0
8006716: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
8006718: 687b ldr r3, [r7, #4]
800671a: 7c1b ldrb r3, [r3, #16]
800671c: 2b00 cmp r3, #0
800671e: d115 bne.n 800674c <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
8006720: f44f 7300 mov.w r3, #512 @ 0x200
8006724: 2202 movs r2, #2
8006726: 2181 movs r1, #129 @ 0x81
8006728: 6878 ldr r0, [r7, #4]
800672a: f001 ff00 bl 800852e <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800672e: 687b ldr r3, [r7, #4]
8006730: 2201 movs r2, #1
8006732: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
8006734: f44f 7300 mov.w r3, #512 @ 0x200
8006738: 2202 movs r2, #2
800673a: 2101 movs r1, #1
800673c: 6878 ldr r0, [r7, #4]
800673e: f001 fef6 bl 800852e <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
8006742: 687b ldr r3, [r7, #4]
8006744: 2201 movs r2, #1
8006746: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800674a: e012 b.n 8006772 <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800674c: 2340 movs r3, #64 @ 0x40
800674e: 2202 movs r2, #2
8006750: 2181 movs r1, #129 @ 0x81
8006752: 6878 ldr r0, [r7, #4]
8006754: f001 feeb bl 800852e <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
8006758: 687b ldr r3, [r7, #4]
800675a: 2201 movs r2, #1
800675c: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800675e: 2340 movs r3, #64 @ 0x40
8006760: 2202 movs r2, #2
8006762: 2101 movs r1, #1
8006764: 6878 ldr r0, [r7, #4]
8006766: f001 fee2 bl 800852e <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800676a: 687b ldr r3, [r7, #4]
800676c: 2201 movs r2, #1
800676e: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
8006772: 2308 movs r3, #8
8006774: 2203 movs r2, #3
8006776: 2182 movs r1, #130 @ 0x82
8006778: 6878 ldr r0, [r7, #4]
800677a: f001 fed8 bl 800852e <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800677e: 687b ldr r3, [r7, #4]
8006780: 2201 movs r2, #1
8006782: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
8006784: f44f 7007 mov.w r0, #540 @ 0x21c
8006788: f001 fff8 bl 800877c <USBD_static_malloc>
800678c: 4602 mov r2, r0
800678e: 687b ldr r3, [r7, #4]
8006790: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
8006794: 687b ldr r3, [r7, #4]
8006796: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800679a: 2b00 cmp r3, #0
800679c: d102 bne.n 80067a4 <USBD_CDC_Init+0x9c>
{
ret = 1U;
800679e: 2301 movs r3, #1
80067a0: 73fb strb r3, [r7, #15]
80067a2: e026 b.n 80067f2 <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
80067a4: 687b ldr r3, [r7, #4]
80067a6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80067aa: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
80067ac: 687b ldr r3, [r7, #4]
80067ae: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
80067b2: 681b ldr r3, [r3, #0]
80067b4: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
80067b6: 68bb ldr r3, [r7, #8]
80067b8: 2200 movs r2, #0
80067ba: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
80067be: 68bb ldr r3, [r7, #8]
80067c0: 2200 movs r2, #0
80067c2: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
80067c6: 687b ldr r3, [r7, #4]
80067c8: 7c1b ldrb r3, [r3, #16]
80067ca: 2b00 cmp r3, #0
80067cc: d109 bne.n 80067e2 <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
80067ce: 68bb ldr r3, [r7, #8]
80067d0: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
80067d4: f44f 7300 mov.w r3, #512 @ 0x200
80067d8: 2101 movs r1, #1
80067da: 6878 ldr r0, [r7, #4]
80067dc: f001 ff97 bl 800870e <USBD_LL_PrepareReceive>
80067e0: e007 b.n 80067f2 <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
80067e2: 68bb ldr r3, [r7, #8]
80067e4: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
80067e8: 2340 movs r3, #64 @ 0x40
80067ea: 2101 movs r1, #1
80067ec: 6878 ldr r0, [r7, #4]
80067ee: f001 ff8e bl 800870e <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
80067f2: 7bfb ldrb r3, [r7, #15]
}
80067f4: 4618 mov r0, r3
80067f6: 3710 adds r7, #16
80067f8: 46bd mov sp, r7
80067fa: bd80 pop {r7, pc}
080067fc <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
80067fc: b580 push {r7, lr}
80067fe: b084 sub sp, #16
8006800: af00 add r7, sp, #0
8006802: 6078 str r0, [r7, #4]
8006804: 460b mov r3, r1
8006806: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
8006808: 2300 movs r3, #0
800680a: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
800680c: 2181 movs r1, #129 @ 0x81
800680e: 6878 ldr r0, [r7, #4]
8006810: f001 feb3 bl 800857a <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
8006814: 687b ldr r3, [r7, #4]
8006816: 2200 movs r2, #0
8006818: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
800681a: 2101 movs r1, #1
800681c: 6878 ldr r0, [r7, #4]
800681e: f001 feac bl 800857a <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
8006822: 687b ldr r3, [r7, #4]
8006824: 2200 movs r2, #0
8006826: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
800682a: 2182 movs r1, #130 @ 0x82
800682c: 6878 ldr r0, [r7, #4]
800682e: f001 fea4 bl 800857a <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
8006832: 687b ldr r3, [r7, #4]
8006834: 2200 movs r2, #0
8006836: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
8006838: 687b ldr r3, [r7, #4]
800683a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800683e: 2b00 cmp r3, #0
8006840: d00e beq.n 8006860 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
8006842: 687b ldr r3, [r7, #4]
8006844: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8006848: 685b ldr r3, [r3, #4]
800684a: 4798 blx r3
USBD_free(pdev->pClassData);
800684c: 687b ldr r3, [r7, #4]
800684e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006852: 4618 mov r0, r3
8006854: f001 ff9e bl 8008794 <USBD_static_free>
pdev->pClassData = NULL;
8006858: 687b ldr r3, [r7, #4]
800685a: 2200 movs r2, #0
800685c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
8006860: 7bfb ldrb r3, [r7, #15]
}
8006862: 4618 mov r0, r3
8006864: 3710 adds r7, #16
8006866: 46bd mov sp, r7
8006868: bd80 pop {r7, pc}
0800686a <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800686a: b580 push {r7, lr}
800686c: b086 sub sp, #24
800686e: af00 add r7, sp, #0
8006870: 6078 str r0, [r7, #4]
8006872: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8006874: 687b ldr r3, [r7, #4]
8006876: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800687a: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
800687c: 2300 movs r3, #0
800687e: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
8006880: 2300 movs r3, #0
8006882: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
8006884: 2300 movs r3, #0
8006886: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8006888: 683b ldr r3, [r7, #0]
800688a: 781b ldrb r3, [r3, #0]
800688c: f003 0360 and.w r3, r3, #96 @ 0x60
8006890: 2b00 cmp r3, #0
8006892: d039 beq.n 8006908 <USBD_CDC_Setup+0x9e>
8006894: 2b20 cmp r3, #32
8006896: d17f bne.n 8006998 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
8006898: 683b ldr r3, [r7, #0]
800689a: 88db ldrh r3, [r3, #6]
800689c: 2b00 cmp r3, #0
800689e: d029 beq.n 80068f4 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
80068a0: 683b ldr r3, [r7, #0]
80068a2: 781b ldrb r3, [r3, #0]
80068a4: b25b sxtb r3, r3
80068a6: 2b00 cmp r3, #0
80068a8: da11 bge.n 80068ce <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
80068aa: 687b ldr r3, [r7, #4]
80068ac: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
80068b0: 689b ldr r3, [r3, #8]
80068b2: 683a ldr r2, [r7, #0]
80068b4: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
80068b6: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
80068b8: 683a ldr r2, [r7, #0]
80068ba: 88d2 ldrh r2, [r2, #6]
80068bc: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
80068be: 6939 ldr r1, [r7, #16]
80068c0: 683b ldr r3, [r7, #0]
80068c2: 88db ldrh r3, [r3, #6]
80068c4: 461a mov r2, r3
80068c6: 6878 ldr r0, [r7, #4]
80068c8: f001 fa06 bl 8007cd8 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
80068cc: e06b b.n 80069a6 <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
80068ce: 683b ldr r3, [r7, #0]
80068d0: 785a ldrb r2, [r3, #1]
80068d2: 693b ldr r3, [r7, #16]
80068d4: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
80068d8: 683b ldr r3, [r7, #0]
80068da: 88db ldrh r3, [r3, #6]
80068dc: b2da uxtb r2, r3
80068de: 693b ldr r3, [r7, #16]
80068e0: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
80068e4: 6939 ldr r1, [r7, #16]
80068e6: 683b ldr r3, [r7, #0]
80068e8: 88db ldrh r3, [r3, #6]
80068ea: 461a mov r2, r3
80068ec: 6878 ldr r0, [r7, #4]
80068ee: f001 fa21 bl 8007d34 <USBD_CtlPrepareRx>
break;
80068f2: e058 b.n 80069a6 <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
80068f4: 687b ldr r3, [r7, #4]
80068f6: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
80068fa: 689b ldr r3, [r3, #8]
80068fc: 683a ldr r2, [r7, #0]
80068fe: 7850 ldrb r0, [r2, #1]
8006900: 2200 movs r2, #0
8006902: 6839 ldr r1, [r7, #0]
8006904: 4798 blx r3
break;
8006906: e04e b.n 80069a6 <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
8006908: 683b ldr r3, [r7, #0]
800690a: 785b ldrb r3, [r3, #1]
800690c: 2b0b cmp r3, #11
800690e: d02e beq.n 800696e <USBD_CDC_Setup+0x104>
8006910: 2b0b cmp r3, #11
8006912: dc38 bgt.n 8006986 <USBD_CDC_Setup+0x11c>
8006914: 2b00 cmp r3, #0
8006916: d002 beq.n 800691e <USBD_CDC_Setup+0xb4>
8006918: 2b0a cmp r3, #10
800691a: d014 beq.n 8006946 <USBD_CDC_Setup+0xdc>
800691c: e033 b.n 8006986 <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800691e: 687b ldr r3, [r7, #4]
8006920: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8006924: 2b03 cmp r3, #3
8006926: d107 bne.n 8006938 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
8006928: f107 030c add.w r3, r7, #12
800692c: 2202 movs r2, #2
800692e: 4619 mov r1, r3
8006930: 6878 ldr r0, [r7, #4]
8006932: f001 f9d1 bl 8007cd8 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
8006936: e02e b.n 8006996 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
8006938: 6839 ldr r1, [r7, #0]
800693a: 6878 ldr r0, [r7, #4]
800693c: f001 f962 bl 8007c04 <USBD_CtlError>
ret = USBD_FAIL;
8006940: 2302 movs r3, #2
8006942: 75fb strb r3, [r7, #23]
break;
8006944: e027 b.n 8006996 <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8006946: 687b ldr r3, [r7, #4]
8006948: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800694c: 2b03 cmp r3, #3
800694e: d107 bne.n 8006960 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
8006950: f107 030f add.w r3, r7, #15
8006954: 2201 movs r2, #1
8006956: 4619 mov r1, r3
8006958: 6878 ldr r0, [r7, #4]
800695a: f001 f9bd bl 8007cd8 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800695e: e01a b.n 8006996 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
8006960: 6839 ldr r1, [r7, #0]
8006962: 6878 ldr r0, [r7, #4]
8006964: f001 f94e bl 8007c04 <USBD_CtlError>
ret = USBD_FAIL;
8006968: 2302 movs r3, #2
800696a: 75fb strb r3, [r7, #23]
break;
800696c: e013 b.n 8006996 <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800696e: 687b ldr r3, [r7, #4]
8006970: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8006974: 2b03 cmp r3, #3
8006976: d00d beq.n 8006994 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
8006978: 6839 ldr r1, [r7, #0]
800697a: 6878 ldr r0, [r7, #4]
800697c: f001 f942 bl 8007c04 <USBD_CtlError>
ret = USBD_FAIL;
8006980: 2302 movs r3, #2
8006982: 75fb strb r3, [r7, #23]
}
break;
8006984: e006 b.n 8006994 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
8006986: 6839 ldr r1, [r7, #0]
8006988: 6878 ldr r0, [r7, #4]
800698a: f001 f93b bl 8007c04 <USBD_CtlError>
ret = USBD_FAIL;
800698e: 2302 movs r3, #2
8006990: 75fb strb r3, [r7, #23]
break;
8006992: e000 b.n 8006996 <USBD_CDC_Setup+0x12c>
break;
8006994: bf00 nop
}
break;
8006996: e006 b.n 80069a6 <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
8006998: 6839 ldr r1, [r7, #0]
800699a: 6878 ldr r0, [r7, #4]
800699c: f001 f932 bl 8007c04 <USBD_CtlError>
ret = USBD_FAIL;
80069a0: 2302 movs r3, #2
80069a2: 75fb strb r3, [r7, #23]
break;
80069a4: bf00 nop
}
return ret;
80069a6: 7dfb ldrb r3, [r7, #23]
}
80069a8: 4618 mov r0, r3
80069aa: 3718 adds r7, #24
80069ac: 46bd mov sp, r7
80069ae: bd80 pop {r7, pc}
080069b0 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
80069b0: b580 push {r7, lr}
80069b2: b084 sub sp, #16
80069b4: af00 add r7, sp, #0
80069b6: 6078 str r0, [r7, #4]
80069b8: 460b mov r3, r1
80069ba: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
80069bc: 687b ldr r3, [r7, #4]
80069be: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80069c2: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
80069c4: 687b ldr r3, [r7, #4]
80069c6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
80069ca: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
80069cc: 687b ldr r3, [r7, #4]
80069ce: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80069d2: 2b00 cmp r3, #0
80069d4: d03a beq.n 8006a4c <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
80069d6: 78fa ldrb r2, [r7, #3]
80069d8: 6879 ldr r1, [r7, #4]
80069da: 4613 mov r3, r2
80069dc: 009b lsls r3, r3, #2
80069de: 4413 add r3, r2
80069e0: 009b lsls r3, r3, #2
80069e2: 440b add r3, r1
80069e4: 331c adds r3, #28
80069e6: 681b ldr r3, [r3, #0]
80069e8: 2b00 cmp r3, #0
80069ea: d029 beq.n 8006a40 <USBD_CDC_DataIn+0x90>
80069ec: 78fa ldrb r2, [r7, #3]
80069ee: 6879 ldr r1, [r7, #4]
80069f0: 4613 mov r3, r2
80069f2: 009b lsls r3, r3, #2
80069f4: 4413 add r3, r2
80069f6: 009b lsls r3, r3, #2
80069f8: 440b add r3, r1
80069fa: 331c adds r3, #28
80069fc: 681a ldr r2, [r3, #0]
80069fe: 78f9 ldrb r1, [r7, #3]
8006a00: 68b8 ldr r0, [r7, #8]
8006a02: 460b mov r3, r1
8006a04: 009b lsls r3, r3, #2
8006a06: 440b add r3, r1
8006a08: 00db lsls r3, r3, #3
8006a0a: 4403 add r3, r0
8006a0c: 3320 adds r3, #32
8006a0e: 681b ldr r3, [r3, #0]
8006a10: fbb2 f1f3 udiv r1, r2, r3
8006a14: fb01 f303 mul.w r3, r1, r3
8006a18: 1ad3 subs r3, r2, r3
8006a1a: 2b00 cmp r3, #0
8006a1c: d110 bne.n 8006a40 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
8006a1e: 78fa ldrb r2, [r7, #3]
8006a20: 6879 ldr r1, [r7, #4]
8006a22: 4613 mov r3, r2
8006a24: 009b lsls r3, r3, #2
8006a26: 4413 add r3, r2
8006a28: 009b lsls r3, r3, #2
8006a2a: 440b add r3, r1
8006a2c: 331c adds r3, #28
8006a2e: 2200 movs r2, #0
8006a30: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
8006a32: 78f9 ldrb r1, [r7, #3]
8006a34: 2300 movs r3, #0
8006a36: 2200 movs r2, #0
8006a38: 6878 ldr r0, [r7, #4]
8006a3a: f001 fe45 bl 80086c8 <USBD_LL_Transmit>
8006a3e: e003 b.n 8006a48 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
8006a40: 68fb ldr r3, [r7, #12]
8006a42: 2200 movs r2, #0
8006a44: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
8006a48: 2300 movs r3, #0
8006a4a: e000 b.n 8006a4e <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
8006a4c: 2302 movs r3, #2
}
}
8006a4e: 4618 mov r0, r3
8006a50: 3710 adds r7, #16
8006a52: 46bd mov sp, r7
8006a54: bd80 pop {r7, pc}
08006a56 <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
8006a56: b580 push {r7, lr}
8006a58: b084 sub sp, #16
8006a5a: af00 add r7, sp, #0
8006a5c: 6078 str r0, [r7, #4]
8006a5e: 460b mov r3, r1
8006a60: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8006a62: 687b ldr r3, [r7, #4]
8006a64: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006a68: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
8006a6a: 78fb ldrb r3, [r7, #3]
8006a6c: 4619 mov r1, r3
8006a6e: 6878 ldr r0, [r7, #4]
8006a70: f001 fe70 bl 8008754 <USBD_LL_GetRxDataSize>
8006a74: 4602 mov r2, r0
8006a76: 68fb ldr r3, [r7, #12]
8006a78: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
8006a7c: 687b ldr r3, [r7, #4]
8006a7e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006a82: 2b00 cmp r3, #0
8006a84: d00d beq.n 8006aa2 <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
8006a86: 687b ldr r3, [r7, #4]
8006a88: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8006a8c: 68db ldr r3, [r3, #12]
8006a8e: 68fa ldr r2, [r7, #12]
8006a90: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
8006a94: 68fa ldr r2, [r7, #12]
8006a96: f502 7203 add.w r2, r2, #524 @ 0x20c
8006a9a: 4611 mov r1, r2
8006a9c: 4798 blx r3
return USBD_OK;
8006a9e: 2300 movs r3, #0
8006aa0: e000 b.n 8006aa4 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
8006aa2: 2302 movs r3, #2
}
}
8006aa4: 4618 mov r0, r3
8006aa6: 3710 adds r7, #16
8006aa8: 46bd mov sp, r7
8006aaa: bd80 pop {r7, pc}
08006aac <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
8006aac: b580 push {r7, lr}
8006aae: b084 sub sp, #16
8006ab0: af00 add r7, sp, #0
8006ab2: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8006ab4: 687b ldr r3, [r7, #4]
8006ab6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006aba: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
8006abc: 687b ldr r3, [r7, #4]
8006abe: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8006ac2: 2b00 cmp r3, #0
8006ac4: d014 beq.n 8006af0 <USBD_CDC_EP0_RxReady+0x44>
8006ac6: 68fb ldr r3, [r7, #12]
8006ac8: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
8006acc: 2bff cmp r3, #255 @ 0xff
8006ace: d00f beq.n 8006af0 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
8006ad0: 687b ldr r3, [r7, #4]
8006ad2: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
8006ad6: 689b ldr r3, [r3, #8]
8006ad8: 68fa ldr r2, [r7, #12]
8006ada: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
8006ade: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
8006ae0: 68fa ldr r2, [r7, #12]
8006ae2: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
8006ae6: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
8006ae8: 68fb ldr r3, [r7, #12]
8006aea: 22ff movs r2, #255 @ 0xff
8006aec: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
8006af0: 2300 movs r3, #0
}
8006af2: 4618 mov r0, r3
8006af4: 3710 adds r7, #16
8006af6: 46bd mov sp, r7
8006af8: bd80 pop {r7, pc}
...
08006afc <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
8006afc: b480 push {r7}
8006afe: b083 sub sp, #12
8006b00: af00 add r7, sp, #0
8006b02: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
8006b04: 687b ldr r3, [r7, #4]
8006b06: 2243 movs r2, #67 @ 0x43
8006b08: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
8006b0a: 4b03 ldr r3, [pc, #12] @ (8006b18 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
8006b0c: 4618 mov r0, r3
8006b0e: 370c adds r7, #12
8006b10: 46bd mov sp, r7
8006b12: bc80 pop {r7}
8006b14: 4770 bx lr
8006b16: bf00 nop
8006b18: 20000094 .word 0x20000094
08006b1c <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
8006b1c: b480 push {r7}
8006b1e: b083 sub sp, #12
8006b20: af00 add r7, sp, #0
8006b22: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
8006b24: 687b ldr r3, [r7, #4]
8006b26: 2243 movs r2, #67 @ 0x43
8006b28: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
8006b2a: 4b03 ldr r3, [pc, #12] @ (8006b38 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
8006b2c: 4618 mov r0, r3
8006b2e: 370c adds r7, #12
8006b30: 46bd mov sp, r7
8006b32: bc80 pop {r7}
8006b34: 4770 bx lr
8006b36: bf00 nop
8006b38: 20000050 .word 0x20000050
08006b3c <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
8006b3c: b480 push {r7}
8006b3e: b083 sub sp, #12
8006b40: af00 add r7, sp, #0
8006b42: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
8006b44: 687b ldr r3, [r7, #4]
8006b46: 2243 movs r2, #67 @ 0x43
8006b48: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
8006b4a: 4b03 ldr r3, [pc, #12] @ (8006b58 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
8006b4c: 4618 mov r0, r3
8006b4e: 370c adds r7, #12
8006b50: 46bd mov sp, r7
8006b52: bc80 pop {r7}
8006b54: 4770 bx lr
8006b56: bf00 nop
8006b58: 200000d8 .word 0x200000d8
08006b5c <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
8006b5c: b480 push {r7}
8006b5e: b083 sub sp, #12
8006b60: af00 add r7, sp, #0
8006b62: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
8006b64: 687b ldr r3, [r7, #4]
8006b66: 220a movs r2, #10
8006b68: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
8006b6a: 4b03 ldr r3, [pc, #12] @ (8006b78 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
8006b6c: 4618 mov r0, r3
8006b6e: 370c adds r7, #12
8006b70: 46bd mov sp, r7
8006b72: bc80 pop {r7}
8006b74: 4770 bx lr
8006b76: bf00 nop
8006b78: 2000000c .word 0x2000000c
08006b7c <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
8006b7c: b480 push {r7}
8006b7e: b085 sub sp, #20
8006b80: af00 add r7, sp, #0
8006b82: 6078 str r0, [r7, #4]
8006b84: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
8006b86: 2302 movs r3, #2
8006b88: 73fb strb r3, [r7, #15]
if (fops != NULL)
8006b8a: 683b ldr r3, [r7, #0]
8006b8c: 2b00 cmp r3, #0
8006b8e: d005 beq.n 8006b9c <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
8006b90: 687b ldr r3, [r7, #4]
8006b92: 683a ldr r2, [r7, #0]
8006b94: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
8006b98: 2300 movs r3, #0
8006b9a: 73fb strb r3, [r7, #15]
}
return ret;
8006b9c: 7bfb ldrb r3, [r7, #15]
}
8006b9e: 4618 mov r0, r3
8006ba0: 3714 adds r7, #20
8006ba2: 46bd mov sp, r7
8006ba4: bc80 pop {r7}
8006ba6: 4770 bx lr
08006ba8 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
8006ba8: b480 push {r7}
8006baa: b087 sub sp, #28
8006bac: af00 add r7, sp, #0
8006bae: 60f8 str r0, [r7, #12]
8006bb0: 60b9 str r1, [r7, #8]
8006bb2: 4613 mov r3, r2
8006bb4: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8006bb6: 68fb ldr r3, [r7, #12]
8006bb8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006bbc: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
8006bbe: 697b ldr r3, [r7, #20]
8006bc0: 68ba ldr r2, [r7, #8]
8006bc2: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
8006bc6: 88fa ldrh r2, [r7, #6]
8006bc8: 697b ldr r3, [r7, #20]
8006bca: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
8006bce: 2300 movs r3, #0
}
8006bd0: 4618 mov r0, r3
8006bd2: 371c adds r7, #28
8006bd4: 46bd mov sp, r7
8006bd6: bc80 pop {r7}
8006bd8: 4770 bx lr
08006bda <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
8006bda: b480 push {r7}
8006bdc: b085 sub sp, #20
8006bde: af00 add r7, sp, #0
8006be0: 6078 str r0, [r7, #4]
8006be2: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8006be4: 687b ldr r3, [r7, #4]
8006be6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006bea: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
8006bec: 68fb ldr r3, [r7, #12]
8006bee: 683a ldr r2, [r7, #0]
8006bf0: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
8006bf4: 2300 movs r3, #0
}
8006bf6: 4618 mov r0, r3
8006bf8: 3714 adds r7, #20
8006bfa: 46bd mov sp, r7
8006bfc: bc80 pop {r7}
8006bfe: 4770 bx lr
08006c00 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
8006c00: b580 push {r7, lr}
8006c02: b084 sub sp, #16
8006c04: af00 add r7, sp, #0
8006c06: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8006c08: 687b ldr r3, [r7, #4]
8006c0a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006c0e: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
8006c10: 687b ldr r3, [r7, #4]
8006c12: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006c16: 2b00 cmp r3, #0
8006c18: d01c beq.n 8006c54 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
8006c1a: 68fb ldr r3, [r7, #12]
8006c1c: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
8006c20: 2b00 cmp r3, #0
8006c22: d115 bne.n 8006c50 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
8006c24: 68fb ldr r3, [r7, #12]
8006c26: 2201 movs r2, #1
8006c28: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
8006c2c: 68fb ldr r3, [r7, #12]
8006c2e: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
8006c32: 687b ldr r3, [r7, #4]
8006c34: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
8006c36: 68fb ldr r3, [r7, #12]
8006c38: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
8006c3c: 68fb ldr r3, [r7, #12]
8006c3e: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
8006c42: b29b uxth r3, r3
8006c44: 2181 movs r1, #129 @ 0x81
8006c46: 6878 ldr r0, [r7, #4]
8006c48: f001 fd3e bl 80086c8 <USBD_LL_Transmit>
return USBD_OK;
8006c4c: 2300 movs r3, #0
8006c4e: e002 b.n 8006c56 <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
8006c50: 2301 movs r3, #1
8006c52: e000 b.n 8006c56 <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
8006c54: 2302 movs r3, #2
}
}
8006c56: 4618 mov r0, r3
8006c58: 3710 adds r7, #16
8006c5a: 46bd mov sp, r7
8006c5c: bd80 pop {r7, pc}
08006c5e <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
8006c5e: b580 push {r7, lr}
8006c60: b084 sub sp, #16
8006c62: af00 add r7, sp, #0
8006c64: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
8006c66: 687b ldr r3, [r7, #4]
8006c68: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006c6c: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
8006c6e: 687b ldr r3, [r7, #4]
8006c70: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
8006c74: 2b00 cmp r3, #0
8006c76: d017 beq.n 8006ca8 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
8006c78: 687b ldr r3, [r7, #4]
8006c7a: 7c1b ldrb r3, [r3, #16]
8006c7c: 2b00 cmp r3, #0
8006c7e: d109 bne.n 8006c94 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
8006c80: 68fb ldr r3, [r7, #12]
8006c82: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8006c86: f44f 7300 mov.w r3, #512 @ 0x200
8006c8a: 2101 movs r1, #1
8006c8c: 6878 ldr r0, [r7, #4]
8006c8e: f001 fd3e bl 800870e <USBD_LL_PrepareReceive>
8006c92: e007 b.n 8006ca4 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
8006c94: 68fb ldr r3, [r7, #12]
8006c96: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
8006c9a: 2340 movs r3, #64 @ 0x40
8006c9c: 2101 movs r1, #1
8006c9e: 6878 ldr r0, [r7, #4]
8006ca0: f001 fd35 bl 800870e <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
8006ca4: 2300 movs r3, #0
8006ca6: e000 b.n 8006caa <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
8006ca8: 2302 movs r3, #2
}
}
8006caa: 4618 mov r0, r3
8006cac: 3710 adds r7, #16
8006cae: 46bd mov sp, r7
8006cb0: bd80 pop {r7, pc}
08006cb2 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
8006cb2: b580 push {r7, lr}
8006cb4: b084 sub sp, #16
8006cb6: af00 add r7, sp, #0
8006cb8: 60f8 str r0, [r7, #12]
8006cba: 60b9 str r1, [r7, #8]
8006cbc: 4613 mov r3, r2
8006cbe: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
8006cc0: 68fb ldr r3, [r7, #12]
8006cc2: 2b00 cmp r3, #0
8006cc4: d101 bne.n 8006cca <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
8006cc6: 2302 movs r3, #2
8006cc8: e01a b.n 8006d00 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
8006cca: 68fb ldr r3, [r7, #12]
8006ccc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8006cd0: 2b00 cmp r3, #0
8006cd2: d003 beq.n 8006cdc <USBD_Init+0x2a>
{
pdev->pClass = NULL;
8006cd4: 68fb ldr r3, [r7, #12]
8006cd6: 2200 movs r2, #0
8006cd8: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
8006cdc: 68bb ldr r3, [r7, #8]
8006cde: 2b00 cmp r3, #0
8006ce0: d003 beq.n 8006cea <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
8006ce2: 68fb ldr r3, [r7, #12]
8006ce4: 68ba ldr r2, [r7, #8]
8006ce6: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
8006cea: 68fb ldr r3, [r7, #12]
8006cec: 2201 movs r2, #1
8006cee: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
8006cf2: 68fb ldr r3, [r7, #12]
8006cf4: 79fa ldrb r2, [r7, #7]
8006cf6: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
8006cf8: 68f8 ldr r0, [r7, #12]
8006cfa: f001 fba3 bl 8008444 <USBD_LL_Init>
return USBD_OK;
8006cfe: 2300 movs r3, #0
}
8006d00: 4618 mov r0, r3
8006d02: 3710 adds r7, #16
8006d04: 46bd mov sp, r7
8006d06: bd80 pop {r7, pc}
08006d08 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
8006d08: b480 push {r7}
8006d0a: b085 sub sp, #20
8006d0c: af00 add r7, sp, #0
8006d0e: 6078 str r0, [r7, #4]
8006d10: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
8006d12: 2300 movs r3, #0
8006d14: 73fb strb r3, [r7, #15]
if (pclass != NULL)
8006d16: 683b ldr r3, [r7, #0]
8006d18: 2b00 cmp r3, #0
8006d1a: d006 beq.n 8006d2a <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
8006d1c: 687b ldr r3, [r7, #4]
8006d1e: 683a ldr r2, [r7, #0]
8006d20: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
8006d24: 2300 movs r3, #0
8006d26: 73fb strb r3, [r7, #15]
8006d28: e001 b.n 8006d2e <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
8006d2a: 2302 movs r3, #2
8006d2c: 73fb strb r3, [r7, #15]
}
return status;
8006d2e: 7bfb ldrb r3, [r7, #15]
}
8006d30: 4618 mov r0, r3
8006d32: 3714 adds r7, #20
8006d34: 46bd mov sp, r7
8006d36: bc80 pop {r7}
8006d38: 4770 bx lr
08006d3a <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
8006d3a: b580 push {r7, lr}
8006d3c: b082 sub sp, #8
8006d3e: af00 add r7, sp, #0
8006d40: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
8006d42: 6878 ldr r0, [r7, #4]
8006d44: f001 fbd8 bl 80084f8 <USBD_LL_Start>
return USBD_OK;
8006d48: 2300 movs r3, #0
}
8006d4a: 4618 mov r0, r3
8006d4c: 3708 adds r7, #8
8006d4e: 46bd mov sp, r7
8006d50: bd80 pop {r7, pc}
08006d52 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
8006d52: b480 push {r7}
8006d54: b083 sub sp, #12
8006d56: af00 add r7, sp, #0
8006d58: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
8006d5a: 2300 movs r3, #0
}
8006d5c: 4618 mov r0, r3
8006d5e: 370c adds r7, #12
8006d60: 46bd mov sp, r7
8006d62: bc80 pop {r7}
8006d64: 4770 bx lr
08006d66 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8006d66: b580 push {r7, lr}
8006d68: b084 sub sp, #16
8006d6a: af00 add r7, sp, #0
8006d6c: 6078 str r0, [r7, #4]
8006d6e: 460b mov r3, r1
8006d70: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
8006d72: 2302 movs r3, #2
8006d74: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
8006d76: 687b ldr r3, [r7, #4]
8006d78: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8006d7c: 2b00 cmp r3, #0
8006d7e: d00c beq.n 8006d9a <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
8006d80: 687b ldr r3, [r7, #4]
8006d82: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8006d86: 681b ldr r3, [r3, #0]
8006d88: 78fa ldrb r2, [r7, #3]
8006d8a: 4611 mov r1, r2
8006d8c: 6878 ldr r0, [r7, #4]
8006d8e: 4798 blx r3
8006d90: 4603 mov r3, r0
8006d92: 2b00 cmp r3, #0
8006d94: d101 bne.n 8006d9a <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
8006d96: 2300 movs r3, #0
8006d98: 73fb strb r3, [r7, #15]
}
}
return ret;
8006d9a: 7bfb ldrb r3, [r7, #15]
}
8006d9c: 4618 mov r0, r3
8006d9e: 3710 adds r7, #16
8006da0: 46bd mov sp, r7
8006da2: bd80 pop {r7, pc}
08006da4 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
8006da4: b580 push {r7, lr}
8006da6: b082 sub sp, #8
8006da8: af00 add r7, sp, #0
8006daa: 6078 str r0, [r7, #4]
8006dac: 460b mov r3, r1
8006dae: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
8006db0: 687b ldr r3, [r7, #4]
8006db2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8006db6: 685b ldr r3, [r3, #4]
8006db8: 78fa ldrb r2, [r7, #3]
8006dba: 4611 mov r1, r2
8006dbc: 6878 ldr r0, [r7, #4]
8006dbe: 4798 blx r3
return USBD_OK;
8006dc0: 2300 movs r3, #0
}
8006dc2: 4618 mov r0, r3
8006dc4: 3708 adds r7, #8
8006dc6: 46bd mov sp, r7
8006dc8: bd80 pop {r7, pc}
08006dca <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
8006dca: b580 push {r7, lr}
8006dcc: b082 sub sp, #8
8006dce: af00 add r7, sp, #0
8006dd0: 6078 str r0, [r7, #4]
8006dd2: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
8006dd4: 687b ldr r3, [r7, #4]
8006dd6: f503 732a add.w r3, r3, #680 @ 0x2a8
8006dda: 6839 ldr r1, [r7, #0]
8006ddc: 4618 mov r0, r3
8006dde: f000 fed8 bl 8007b92 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
8006de2: 687b ldr r3, [r7, #4]
8006de4: 2201 movs r2, #1
8006de6: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
8006dea: 687b ldr r3, [r7, #4]
8006dec: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
8006df0: 461a mov r2, r3
8006df2: 687b ldr r3, [r7, #4]
8006df4: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
8006df8: 687b ldr r3, [r7, #4]
8006dfa: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
8006dfe: f003 031f and.w r3, r3, #31
8006e02: 2b02 cmp r3, #2
8006e04: d016 beq.n 8006e34 <USBD_LL_SetupStage+0x6a>
8006e06: 2b02 cmp r3, #2
8006e08: d81c bhi.n 8006e44 <USBD_LL_SetupStage+0x7a>
8006e0a: 2b00 cmp r3, #0
8006e0c: d002 beq.n 8006e14 <USBD_LL_SetupStage+0x4a>
8006e0e: 2b01 cmp r3, #1
8006e10: d008 beq.n 8006e24 <USBD_LL_SetupStage+0x5a>
8006e12: e017 b.n 8006e44 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
8006e14: 687b ldr r3, [r7, #4]
8006e16: f503 732a add.w r3, r3, #680 @ 0x2a8
8006e1a: 4619 mov r1, r3
8006e1c: 6878 ldr r0, [r7, #4]
8006e1e: f000 f9cb bl 80071b8 <USBD_StdDevReq>
break;
8006e22: e01a b.n 8006e5a <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
8006e24: 687b ldr r3, [r7, #4]
8006e26: f503 732a add.w r3, r3, #680 @ 0x2a8
8006e2a: 4619 mov r1, r3
8006e2c: 6878 ldr r0, [r7, #4]
8006e2e: f000 fa2d bl 800728c <USBD_StdItfReq>
break;
8006e32: e012 b.n 8006e5a <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
8006e34: 687b ldr r3, [r7, #4]
8006e36: f503 732a add.w r3, r3, #680 @ 0x2a8
8006e3a: 4619 mov r1, r3
8006e3c: 6878 ldr r0, [r7, #4]
8006e3e: f000 fa6d bl 800731c <USBD_StdEPReq>
break;
8006e42: e00a b.n 8006e5a <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
8006e44: 687b ldr r3, [r7, #4]
8006e46: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
8006e4a: f023 037f bic.w r3, r3, #127 @ 0x7f
8006e4e: b2db uxtb r3, r3
8006e50: 4619 mov r1, r3
8006e52: 6878 ldr r0, [r7, #4]
8006e54: f001 fbb0 bl 80085b8 <USBD_LL_StallEP>
break;
8006e58: bf00 nop
}
return USBD_OK;
8006e5a: 2300 movs r3, #0
}
8006e5c: 4618 mov r0, r3
8006e5e: 3708 adds r7, #8
8006e60: 46bd mov sp, r7
8006e62: bd80 pop {r7, pc}
08006e64 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8006e64: b580 push {r7, lr}
8006e66: b086 sub sp, #24
8006e68: af00 add r7, sp, #0
8006e6a: 60f8 str r0, [r7, #12]
8006e6c: 460b mov r3, r1
8006e6e: 607a str r2, [r7, #4]
8006e70: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8006e72: 7afb ldrb r3, [r7, #11]
8006e74: 2b00 cmp r3, #0
8006e76: d14b bne.n 8006f10 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
8006e78: 68fb ldr r3, [r7, #12]
8006e7a: f503 73aa add.w r3, r3, #340 @ 0x154
8006e7e: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
8006e80: 68fb ldr r3, [r7, #12]
8006e82: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8006e86: 2b03 cmp r3, #3
8006e88: d134 bne.n 8006ef4 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
8006e8a: 697b ldr r3, [r7, #20]
8006e8c: 68da ldr r2, [r3, #12]
8006e8e: 697b ldr r3, [r7, #20]
8006e90: 691b ldr r3, [r3, #16]
8006e92: 429a cmp r2, r3
8006e94: d919 bls.n 8006eca <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
8006e96: 697b ldr r3, [r7, #20]
8006e98: 68da ldr r2, [r3, #12]
8006e9a: 697b ldr r3, [r7, #20]
8006e9c: 691b ldr r3, [r3, #16]
8006e9e: 1ad2 subs r2, r2, r3
8006ea0: 697b ldr r3, [r7, #20]
8006ea2: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8006ea4: 697b ldr r3, [r7, #20]
8006ea6: 68da ldr r2, [r3, #12]
8006ea8: 697b ldr r3, [r7, #20]
8006eaa: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8006eac: 429a cmp r2, r3
8006eae: d203 bcs.n 8006eb8 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8006eb0: 697b ldr r3, [r7, #20]
8006eb2: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
8006eb4: b29b uxth r3, r3
8006eb6: e002 b.n 8006ebe <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
8006eb8: 697b ldr r3, [r7, #20]
8006eba: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
8006ebc: b29b uxth r3, r3
8006ebe: 461a mov r2, r3
8006ec0: 6879 ldr r1, [r7, #4]
8006ec2: 68f8 ldr r0, [r7, #12]
8006ec4: f000 ff54 bl 8007d70 <USBD_CtlContinueRx>
8006ec8: e038 b.n 8006f3c <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
8006eca: 68fb ldr r3, [r7, #12]
8006ecc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8006ed0: 691b ldr r3, [r3, #16]
8006ed2: 2b00 cmp r3, #0
8006ed4: d00a beq.n 8006eec <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8006ed6: 68fb ldr r3, [r7, #12]
8006ed8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
8006edc: 2b03 cmp r3, #3
8006ede: d105 bne.n 8006eec <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
8006ee0: 68fb ldr r3, [r7, #12]
8006ee2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8006ee6: 691b ldr r3, [r3, #16]
8006ee8: 68f8 ldr r0, [r7, #12]
8006eea: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
8006eec: 68f8 ldr r0, [r7, #12]
8006eee: f000 ff51 bl 8007d94 <USBD_CtlSendStatus>
8006ef2: e023 b.n 8006f3c <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
8006ef4: 68fb ldr r3, [r7, #12]
8006ef6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8006efa: 2b05 cmp r3, #5
8006efc: d11e bne.n 8006f3c <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
8006efe: 68fb ldr r3, [r7, #12]
8006f00: 2200 movs r2, #0
8006f02: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
8006f06: 2100 movs r1, #0
8006f08: 68f8 ldr r0, [r7, #12]
8006f0a: f001 fb55 bl 80085b8 <USBD_LL_StallEP>
8006f0e: e015 b.n 8006f3c <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
8006f10: 68fb ldr r3, [r7, #12]
8006f12: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8006f16: 699b ldr r3, [r3, #24]
8006f18: 2b00 cmp r3, #0
8006f1a: d00d beq.n 8006f38 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8006f1c: 68fb ldr r3, [r7, #12]
8006f1e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
8006f22: 2b03 cmp r3, #3
8006f24: d108 bne.n 8006f38 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
8006f26: 68fb ldr r3, [r7, #12]
8006f28: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8006f2c: 699b ldr r3, [r3, #24]
8006f2e: 7afa ldrb r2, [r7, #11]
8006f30: 4611 mov r1, r2
8006f32: 68f8 ldr r0, [r7, #12]
8006f34: 4798 blx r3
8006f36: e001 b.n 8006f3c <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8006f38: 2302 movs r3, #2
8006f3a: e000 b.n 8006f3e <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
8006f3c: 2300 movs r3, #0
}
8006f3e: 4618 mov r0, r3
8006f40: 3718 adds r7, #24
8006f42: 46bd mov sp, r7
8006f44: bd80 pop {r7, pc}
08006f46 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
8006f46: b580 push {r7, lr}
8006f48: b086 sub sp, #24
8006f4a: af00 add r7, sp, #0
8006f4c: 60f8 str r0, [r7, #12]
8006f4e: 460b mov r3, r1
8006f50: 607a str r2, [r7, #4]
8006f52: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
8006f54: 7afb ldrb r3, [r7, #11]
8006f56: 2b00 cmp r3, #0
8006f58: d17f bne.n 800705a <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
8006f5a: 68fb ldr r3, [r7, #12]
8006f5c: 3314 adds r3, #20
8006f5e: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
8006f60: 68fb ldr r3, [r7, #12]
8006f62: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
8006f66: 2b02 cmp r3, #2
8006f68: d15c bne.n 8007024 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
8006f6a: 697b ldr r3, [r7, #20]
8006f6c: 68da ldr r2, [r3, #12]
8006f6e: 697b ldr r3, [r7, #20]
8006f70: 691b ldr r3, [r3, #16]
8006f72: 429a cmp r2, r3
8006f74: d915 bls.n 8006fa2 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
8006f76: 697b ldr r3, [r7, #20]
8006f78: 68da ldr r2, [r3, #12]
8006f7a: 697b ldr r3, [r7, #20]
8006f7c: 691b ldr r3, [r3, #16]
8006f7e: 1ad2 subs r2, r2, r3
8006f80: 697b ldr r3, [r7, #20]
8006f82: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
8006f84: 697b ldr r3, [r7, #20]
8006f86: 68db ldr r3, [r3, #12]
8006f88: b29b uxth r3, r3
8006f8a: 461a mov r2, r3
8006f8c: 6879 ldr r1, [r7, #4]
8006f8e: 68f8 ldr r0, [r7, #12]
8006f90: f000 febe bl 8007d10 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8006f94: 2300 movs r3, #0
8006f96: 2200 movs r2, #0
8006f98: 2100 movs r1, #0
8006f9a: 68f8 ldr r0, [r7, #12]
8006f9c: f001 fbb7 bl 800870e <USBD_LL_PrepareReceive>
8006fa0: e04e b.n 8007040 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
8006fa2: 697b ldr r3, [r7, #20]
8006fa4: 689b ldr r3, [r3, #8]
8006fa6: 697a ldr r2, [r7, #20]
8006fa8: 6912 ldr r2, [r2, #16]
8006faa: fbb3 f1f2 udiv r1, r3, r2
8006fae: fb01 f202 mul.w r2, r1, r2
8006fb2: 1a9b subs r3, r3, r2
8006fb4: 2b00 cmp r3, #0
8006fb6: d11c bne.n 8006ff2 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
8006fb8: 697b ldr r3, [r7, #20]
8006fba: 689a ldr r2, [r3, #8]
8006fbc: 697b ldr r3, [r7, #20]
8006fbe: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
8006fc0: 429a cmp r2, r3
8006fc2: d316 bcc.n 8006ff2 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
8006fc4: 697b ldr r3, [r7, #20]
8006fc6: 689a ldr r2, [r3, #8]
8006fc8: 68fb ldr r3, [r7, #12]
8006fca: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
8006fce: 429a cmp r2, r3
8006fd0: d20f bcs.n 8006ff2 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
8006fd2: 2200 movs r2, #0
8006fd4: 2100 movs r1, #0
8006fd6: 68f8 ldr r0, [r7, #12]
8006fd8: f000 fe9a bl 8007d10 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
8006fdc: 68fb ldr r3, [r7, #12]
8006fde: 2200 movs r2, #0
8006fe0: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8006fe4: 2300 movs r3, #0
8006fe6: 2200 movs r2, #0
8006fe8: 2100 movs r1, #0
8006fea: 68f8 ldr r0, [r7, #12]
8006fec: f001 fb8f bl 800870e <USBD_LL_PrepareReceive>
8006ff0: e026 b.n 8007040 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
8006ff2: 68fb ldr r3, [r7, #12]
8006ff4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8006ff8: 68db ldr r3, [r3, #12]
8006ffa: 2b00 cmp r3, #0
8006ffc: d00a beq.n 8007014 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8006ffe: 68fb ldr r3, [r7, #12]
8007000: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
8007004: 2b03 cmp r3, #3
8007006: d105 bne.n 8007014 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
8007008: 68fb ldr r3, [r7, #12]
800700a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800700e: 68db ldr r3, [r3, #12]
8007010: 68f8 ldr r0, [r7, #12]
8007012: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
8007014: 2180 movs r1, #128 @ 0x80
8007016: 68f8 ldr r0, [r7, #12]
8007018: f001 face bl 80085b8 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800701c: 68f8 ldr r0, [r7, #12]
800701e: f000 fecc bl 8007dba <USBD_CtlReceiveStatus>
8007022: e00d b.n 8007040 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8007024: 68fb ldr r3, [r7, #12]
8007026: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800702a: 2b04 cmp r3, #4
800702c: d004 beq.n 8007038 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
800702e: 68fb ldr r3, [r7, #12]
8007030: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
8007034: 2b00 cmp r3, #0
8007036: d103 bne.n 8007040 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
8007038: 2180 movs r1, #128 @ 0x80
800703a: 68f8 ldr r0, [r7, #12]
800703c: f001 fabc bl 80085b8 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
8007040: 68fb ldr r3, [r7, #12]
8007042: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
8007046: 2b01 cmp r3, #1
8007048: d11d bne.n 8007086 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800704a: 68f8 ldr r0, [r7, #12]
800704c: f7ff fe81 bl 8006d52 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
8007050: 68fb ldr r3, [r7, #12]
8007052: 2200 movs r2, #0
8007054: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
8007058: e015 b.n 8007086 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800705a: 68fb ldr r3, [r7, #12]
800705c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007060: 695b ldr r3, [r3, #20]
8007062: 2b00 cmp r3, #0
8007064: d00d beq.n 8007082 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
8007066: 68fb ldr r3, [r7, #12]
8007068: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800706c: 2b03 cmp r3, #3
800706e: d108 bne.n 8007082 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
8007070: 68fb ldr r3, [r7, #12]
8007072: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007076: 695b ldr r3, [r3, #20]
8007078: 7afa ldrb r2, [r7, #11]
800707a: 4611 mov r1, r2
800707c: 68f8 ldr r0, [r7, #12]
800707e: 4798 blx r3
8007080: e001 b.n 8007086 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
8007082: 2302 movs r3, #2
8007084: e000 b.n 8007088 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
8007086: 2300 movs r3, #0
}
8007088: 4618 mov r0, r3
800708a: 3718 adds r7, #24
800708c: 46bd mov sp, r7
800708e: bd80 pop {r7, pc}
08007090 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
8007090: b580 push {r7, lr}
8007092: b082 sub sp, #8
8007094: af00 add r7, sp, #0
8007096: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
8007098: 2340 movs r3, #64 @ 0x40
800709a: 2200 movs r2, #0
800709c: 2100 movs r1, #0
800709e: 6878 ldr r0, [r7, #4]
80070a0: f001 fa45 bl 800852e <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
80070a4: 687b ldr r3, [r7, #4]
80070a6: 2201 movs r2, #1
80070a8: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
80070ac: 687b ldr r3, [r7, #4]
80070ae: 2240 movs r2, #64 @ 0x40
80070b0: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
80070b4: 2340 movs r3, #64 @ 0x40
80070b6: 2200 movs r2, #0
80070b8: 2180 movs r1, #128 @ 0x80
80070ba: 6878 ldr r0, [r7, #4]
80070bc: f001 fa37 bl 800852e <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
80070c0: 687b ldr r3, [r7, #4]
80070c2: 2201 movs r2, #1
80070c4: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
80070c6: 687b ldr r3, [r7, #4]
80070c8: 2240 movs r2, #64 @ 0x40
80070ca: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
80070cc: 687b ldr r3, [r7, #4]
80070ce: 2201 movs r2, #1
80070d0: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
80070d4: 687b ldr r3, [r7, #4]
80070d6: 2200 movs r2, #0
80070d8: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
80070dc: 687b ldr r3, [r7, #4]
80070de: 2200 movs r2, #0
80070e0: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
80070e2: 687b ldr r3, [r7, #4]
80070e4: 2200 movs r2, #0
80070e6: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
80070ea: 687b ldr r3, [r7, #4]
80070ec: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
80070f0: 2b00 cmp r3, #0
80070f2: d009 beq.n 8007108 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
80070f4: 687b ldr r3, [r7, #4]
80070f6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80070fa: 685b ldr r3, [r3, #4]
80070fc: 687a ldr r2, [r7, #4]
80070fe: 6852 ldr r2, [r2, #4]
8007100: b2d2 uxtb r2, r2
8007102: 4611 mov r1, r2
8007104: 6878 ldr r0, [r7, #4]
8007106: 4798 blx r3
}
return USBD_OK;
8007108: 2300 movs r3, #0
}
800710a: 4618 mov r0, r3
800710c: 3708 adds r7, #8
800710e: 46bd mov sp, r7
8007110: bd80 pop {r7, pc}
08007112 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
8007112: b480 push {r7}
8007114: b083 sub sp, #12
8007116: af00 add r7, sp, #0
8007118: 6078 str r0, [r7, #4]
800711a: 460b mov r3, r1
800711c: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800711e: 687b ldr r3, [r7, #4]
8007120: 78fa ldrb r2, [r7, #3]
8007122: 741a strb r2, [r3, #16]
return USBD_OK;
8007124: 2300 movs r3, #0
}
8007126: 4618 mov r0, r3
8007128: 370c adds r7, #12
800712a: 46bd mov sp, r7
800712c: bc80 pop {r7}
800712e: 4770 bx lr
08007130 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
8007130: b480 push {r7}
8007132: b083 sub sp, #12
8007134: af00 add r7, sp, #0
8007136: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
8007138: 687b ldr r3, [r7, #4]
800713a: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
800713e: 687b ldr r3, [r7, #4]
8007140: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
8007144: 687b ldr r3, [r7, #4]
8007146: 2204 movs r2, #4
8007148: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800714c: 2300 movs r3, #0
}
800714e: 4618 mov r0, r3
8007150: 370c adds r7, #12
8007152: 46bd mov sp, r7
8007154: bc80 pop {r7}
8007156: 4770 bx lr
08007158 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
8007158: b480 push {r7}
800715a: b083 sub sp, #12
800715c: af00 add r7, sp, #0
800715e: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
8007160: 687b ldr r3, [r7, #4]
8007162: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007166: 2b04 cmp r3, #4
8007168: d105 bne.n 8007176 <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800716a: 687b ldr r3, [r7, #4]
800716c: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
8007170: 687b ldr r3, [r7, #4]
8007172: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
8007176: 2300 movs r3, #0
}
8007178: 4618 mov r0, r3
800717a: 370c adds r7, #12
800717c: 46bd mov sp, r7
800717e: bc80 pop {r7}
8007180: 4770 bx lr
08007182 <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
8007182: b580 push {r7, lr}
8007184: b082 sub sp, #8
8007186: af00 add r7, sp, #0
8007188: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800718a: 687b ldr r3, [r7, #4]
800718c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007190: 2b03 cmp r3, #3
8007192: d10b bne.n 80071ac <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
8007194: 687b ldr r3, [r7, #4]
8007196: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800719a: 69db ldr r3, [r3, #28]
800719c: 2b00 cmp r3, #0
800719e: d005 beq.n 80071ac <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
80071a0: 687b ldr r3, [r7, #4]
80071a2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80071a6: 69db ldr r3, [r3, #28]
80071a8: 6878 ldr r0, [r7, #4]
80071aa: 4798 blx r3
}
}
return USBD_OK;
80071ac: 2300 movs r3, #0
}
80071ae: 4618 mov r0, r3
80071b0: 3708 adds r7, #8
80071b2: 46bd mov sp, r7
80071b4: bd80 pop {r7, pc}
...
080071b8 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80071b8: b580 push {r7, lr}
80071ba: b084 sub sp, #16
80071bc: af00 add r7, sp, #0
80071be: 6078 str r0, [r7, #4]
80071c0: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
80071c2: 2300 movs r3, #0
80071c4: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
80071c6: 683b ldr r3, [r7, #0]
80071c8: 781b ldrb r3, [r3, #0]
80071ca: f003 0360 and.w r3, r3, #96 @ 0x60
80071ce: 2b40 cmp r3, #64 @ 0x40
80071d0: d005 beq.n 80071de <USBD_StdDevReq+0x26>
80071d2: 2b40 cmp r3, #64 @ 0x40
80071d4: d84f bhi.n 8007276 <USBD_StdDevReq+0xbe>
80071d6: 2b00 cmp r3, #0
80071d8: d009 beq.n 80071ee <USBD_StdDevReq+0x36>
80071da: 2b20 cmp r3, #32
80071dc: d14b bne.n 8007276 <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
80071de: 687b ldr r3, [r7, #4]
80071e0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80071e4: 689b ldr r3, [r3, #8]
80071e6: 6839 ldr r1, [r7, #0]
80071e8: 6878 ldr r0, [r7, #4]
80071ea: 4798 blx r3
break;
80071ec: e048 b.n 8007280 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
80071ee: 683b ldr r3, [r7, #0]
80071f0: 785b ldrb r3, [r3, #1]
80071f2: 2b09 cmp r3, #9
80071f4: d839 bhi.n 800726a <USBD_StdDevReq+0xb2>
80071f6: a201 add r2, pc, #4 @ (adr r2, 80071fc <USBD_StdDevReq+0x44>)
80071f8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80071fc: 0800724d .word 0x0800724d
8007200: 08007261 .word 0x08007261
8007204: 0800726b .word 0x0800726b
8007208: 08007257 .word 0x08007257
800720c: 0800726b .word 0x0800726b
8007210: 0800722f .word 0x0800722f
8007214: 08007225 .word 0x08007225
8007218: 0800726b .word 0x0800726b
800721c: 08007243 .word 0x08007243
8007220: 08007239 .word 0x08007239
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
8007224: 6839 ldr r1, [r7, #0]
8007226: 6878 ldr r0, [r7, #4]
8007228: f000 f9dc bl 80075e4 <USBD_GetDescriptor>
break;
800722c: e022 b.n 8007274 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800722e: 6839 ldr r1, [r7, #0]
8007230: 6878 ldr r0, [r7, #4]
8007232: f000 fb3f bl 80078b4 <USBD_SetAddress>
break;
8007236: e01d b.n 8007274 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
8007238: 6839 ldr r1, [r7, #0]
800723a: 6878 ldr r0, [r7, #4]
800723c: f000 fb7e bl 800793c <USBD_SetConfig>
break;
8007240: e018 b.n 8007274 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
8007242: 6839 ldr r1, [r7, #0]
8007244: 6878 ldr r0, [r7, #4]
8007246: f000 fc07 bl 8007a58 <USBD_GetConfig>
break;
800724a: e013 b.n 8007274 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800724c: 6839 ldr r1, [r7, #0]
800724e: 6878 ldr r0, [r7, #4]
8007250: f000 fc37 bl 8007ac2 <USBD_GetStatus>
break;
8007254: e00e b.n 8007274 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
8007256: 6839 ldr r1, [r7, #0]
8007258: 6878 ldr r0, [r7, #4]
800725a: f000 fc65 bl 8007b28 <USBD_SetFeature>
break;
800725e: e009 b.n 8007274 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
8007260: 6839 ldr r1, [r7, #0]
8007262: 6878 ldr r0, [r7, #4]
8007264: f000 fc74 bl 8007b50 <USBD_ClrFeature>
break;
8007268: e004 b.n 8007274 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800726a: 6839 ldr r1, [r7, #0]
800726c: 6878 ldr r0, [r7, #4]
800726e: f000 fcc9 bl 8007c04 <USBD_CtlError>
break;
8007272: bf00 nop
}
break;
8007274: e004 b.n 8007280 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
8007276: 6839 ldr r1, [r7, #0]
8007278: 6878 ldr r0, [r7, #4]
800727a: f000 fcc3 bl 8007c04 <USBD_CtlError>
break;
800727e: bf00 nop
}
return ret;
8007280: 7bfb ldrb r3, [r7, #15]
}
8007282: 4618 mov r0, r3
8007284: 3710 adds r7, #16
8007286: 46bd mov sp, r7
8007288: bd80 pop {r7, pc}
800728a: bf00 nop
0800728c <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800728c: b580 push {r7, lr}
800728e: b084 sub sp, #16
8007290: af00 add r7, sp, #0
8007292: 6078 str r0, [r7, #4]
8007294: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
8007296: 2300 movs r3, #0
8007298: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800729a: 683b ldr r3, [r7, #0]
800729c: 781b ldrb r3, [r3, #0]
800729e: f003 0360 and.w r3, r3, #96 @ 0x60
80072a2: 2b40 cmp r3, #64 @ 0x40
80072a4: d005 beq.n 80072b2 <USBD_StdItfReq+0x26>
80072a6: 2b40 cmp r3, #64 @ 0x40
80072a8: d82e bhi.n 8007308 <USBD_StdItfReq+0x7c>
80072aa: 2b00 cmp r3, #0
80072ac: d001 beq.n 80072b2 <USBD_StdItfReq+0x26>
80072ae: 2b20 cmp r3, #32
80072b0: d12a bne.n 8007308 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
80072b2: 687b ldr r3, [r7, #4]
80072b4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80072b8: 3b01 subs r3, #1
80072ba: 2b02 cmp r3, #2
80072bc: d81d bhi.n 80072fa <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
80072be: 683b ldr r3, [r7, #0]
80072c0: 889b ldrh r3, [r3, #4]
80072c2: b2db uxtb r3, r3
80072c4: 2b01 cmp r3, #1
80072c6: d813 bhi.n 80072f0 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
80072c8: 687b ldr r3, [r7, #4]
80072ca: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
80072ce: 689b ldr r3, [r3, #8]
80072d0: 6839 ldr r1, [r7, #0]
80072d2: 6878 ldr r0, [r7, #4]
80072d4: 4798 blx r3
80072d6: 4603 mov r3, r0
80072d8: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
80072da: 683b ldr r3, [r7, #0]
80072dc: 88db ldrh r3, [r3, #6]
80072de: 2b00 cmp r3, #0
80072e0: d110 bne.n 8007304 <USBD_StdItfReq+0x78>
80072e2: 7bfb ldrb r3, [r7, #15]
80072e4: 2b00 cmp r3, #0
80072e6: d10d bne.n 8007304 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
80072e8: 6878 ldr r0, [r7, #4]
80072ea: f000 fd53 bl 8007d94 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
80072ee: e009 b.n 8007304 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
80072f0: 6839 ldr r1, [r7, #0]
80072f2: 6878 ldr r0, [r7, #4]
80072f4: f000 fc86 bl 8007c04 <USBD_CtlError>
break;
80072f8: e004 b.n 8007304 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
80072fa: 6839 ldr r1, [r7, #0]
80072fc: 6878 ldr r0, [r7, #4]
80072fe: f000 fc81 bl 8007c04 <USBD_CtlError>
break;
8007302: e000 b.n 8007306 <USBD_StdItfReq+0x7a>
break;
8007304: bf00 nop
}
break;
8007306: e004 b.n 8007312 <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
8007308: 6839 ldr r1, [r7, #0]
800730a: 6878 ldr r0, [r7, #4]
800730c: f000 fc7a bl 8007c04 <USBD_CtlError>
break;
8007310: bf00 nop
}
return USBD_OK;
8007312: 2300 movs r3, #0
}
8007314: 4618 mov r0, r3
8007316: 3710 adds r7, #16
8007318: 46bd mov sp, r7
800731a: bd80 pop {r7, pc}
0800731c <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800731c: b580 push {r7, lr}
800731e: b084 sub sp, #16
8007320: af00 add r7, sp, #0
8007322: 6078 str r0, [r7, #4]
8007324: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
8007326: 2300 movs r3, #0
8007328: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800732a: 683b ldr r3, [r7, #0]
800732c: 889b ldrh r3, [r3, #4]
800732e: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
8007330: 683b ldr r3, [r7, #0]
8007332: 781b ldrb r3, [r3, #0]
8007334: f003 0360 and.w r3, r3, #96 @ 0x60
8007338: 2b40 cmp r3, #64 @ 0x40
800733a: d007 beq.n 800734c <USBD_StdEPReq+0x30>
800733c: 2b40 cmp r3, #64 @ 0x40
800733e: f200 8146 bhi.w 80075ce <USBD_StdEPReq+0x2b2>
8007342: 2b00 cmp r3, #0
8007344: d00a beq.n 800735c <USBD_StdEPReq+0x40>
8007346: 2b20 cmp r3, #32
8007348: f040 8141 bne.w 80075ce <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800734c: 687b ldr r3, [r7, #4]
800734e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007352: 689b ldr r3, [r3, #8]
8007354: 6839 ldr r1, [r7, #0]
8007356: 6878 ldr r0, [r7, #4]
8007358: 4798 blx r3
break;
800735a: e13d b.n 80075d8 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
800735c: 683b ldr r3, [r7, #0]
800735e: 781b ldrb r3, [r3, #0]
8007360: f003 0360 and.w r3, r3, #96 @ 0x60
8007364: 2b20 cmp r3, #32
8007366: d10a bne.n 800737e <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
8007368: 687b ldr r3, [r7, #4]
800736a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800736e: 689b ldr r3, [r3, #8]
8007370: 6839 ldr r1, [r7, #0]
8007372: 6878 ldr r0, [r7, #4]
8007374: 4798 blx r3
8007376: 4603 mov r3, r0
8007378: 73fb strb r3, [r7, #15]
return ret;
800737a: 7bfb ldrb r3, [r7, #15]
800737c: e12d b.n 80075da <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
800737e: 683b ldr r3, [r7, #0]
8007380: 785b ldrb r3, [r3, #1]
8007382: 2b03 cmp r3, #3
8007384: d007 beq.n 8007396 <USBD_StdEPReq+0x7a>
8007386: 2b03 cmp r3, #3
8007388: f300 811b bgt.w 80075c2 <USBD_StdEPReq+0x2a6>
800738c: 2b00 cmp r3, #0
800738e: d072 beq.n 8007476 <USBD_StdEPReq+0x15a>
8007390: 2b01 cmp r3, #1
8007392: d03a beq.n 800740a <USBD_StdEPReq+0xee>
8007394: e115 b.n 80075c2 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
8007396: 687b ldr r3, [r7, #4]
8007398: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800739c: 2b02 cmp r3, #2
800739e: d002 beq.n 80073a6 <USBD_StdEPReq+0x8a>
80073a0: 2b03 cmp r3, #3
80073a2: d015 beq.n 80073d0 <USBD_StdEPReq+0xb4>
80073a4: e02b b.n 80073fe <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
80073a6: 7bbb ldrb r3, [r7, #14]
80073a8: 2b00 cmp r3, #0
80073aa: d00c beq.n 80073c6 <USBD_StdEPReq+0xaa>
80073ac: 7bbb ldrb r3, [r7, #14]
80073ae: 2b80 cmp r3, #128 @ 0x80
80073b0: d009 beq.n 80073c6 <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
80073b2: 7bbb ldrb r3, [r7, #14]
80073b4: 4619 mov r1, r3
80073b6: 6878 ldr r0, [r7, #4]
80073b8: f001 f8fe bl 80085b8 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
80073bc: 2180 movs r1, #128 @ 0x80
80073be: 6878 ldr r0, [r7, #4]
80073c0: f001 f8fa bl 80085b8 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
80073c4: e020 b.n 8007408 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
80073c6: 6839 ldr r1, [r7, #0]
80073c8: 6878 ldr r0, [r7, #4]
80073ca: f000 fc1b bl 8007c04 <USBD_CtlError>
break;
80073ce: e01b b.n 8007408 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
80073d0: 683b ldr r3, [r7, #0]
80073d2: 885b ldrh r3, [r3, #2]
80073d4: 2b00 cmp r3, #0
80073d6: d10e bne.n 80073f6 <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
80073d8: 7bbb ldrb r3, [r7, #14]
80073da: 2b00 cmp r3, #0
80073dc: d00b beq.n 80073f6 <USBD_StdEPReq+0xda>
80073de: 7bbb ldrb r3, [r7, #14]
80073e0: 2b80 cmp r3, #128 @ 0x80
80073e2: d008 beq.n 80073f6 <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
80073e4: 683b ldr r3, [r7, #0]
80073e6: 88db ldrh r3, [r3, #6]
80073e8: 2b00 cmp r3, #0
80073ea: d104 bne.n 80073f6 <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
80073ec: 7bbb ldrb r3, [r7, #14]
80073ee: 4619 mov r1, r3
80073f0: 6878 ldr r0, [r7, #4]
80073f2: f001 f8e1 bl 80085b8 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
80073f6: 6878 ldr r0, [r7, #4]
80073f8: f000 fccc bl 8007d94 <USBD_CtlSendStatus>
break;
80073fc: e004 b.n 8007408 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
80073fe: 6839 ldr r1, [r7, #0]
8007400: 6878 ldr r0, [r7, #4]
8007402: f000 fbff bl 8007c04 <USBD_CtlError>
break;
8007406: bf00 nop
}
break;
8007408: e0e0 b.n 80075cc <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800740a: 687b ldr r3, [r7, #4]
800740c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007410: 2b02 cmp r3, #2
8007412: d002 beq.n 800741a <USBD_StdEPReq+0xfe>
8007414: 2b03 cmp r3, #3
8007416: d015 beq.n 8007444 <USBD_StdEPReq+0x128>
8007418: e026 b.n 8007468 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800741a: 7bbb ldrb r3, [r7, #14]
800741c: 2b00 cmp r3, #0
800741e: d00c beq.n 800743a <USBD_StdEPReq+0x11e>
8007420: 7bbb ldrb r3, [r7, #14]
8007422: 2b80 cmp r3, #128 @ 0x80
8007424: d009 beq.n 800743a <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
8007426: 7bbb ldrb r3, [r7, #14]
8007428: 4619 mov r1, r3
800742a: 6878 ldr r0, [r7, #4]
800742c: f001 f8c4 bl 80085b8 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
8007430: 2180 movs r1, #128 @ 0x80
8007432: 6878 ldr r0, [r7, #4]
8007434: f001 f8c0 bl 80085b8 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
8007438: e01c b.n 8007474 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
800743a: 6839 ldr r1, [r7, #0]
800743c: 6878 ldr r0, [r7, #4]
800743e: f000 fbe1 bl 8007c04 <USBD_CtlError>
break;
8007442: e017 b.n 8007474 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
8007444: 683b ldr r3, [r7, #0]
8007446: 885b ldrh r3, [r3, #2]
8007448: 2b00 cmp r3, #0
800744a: d112 bne.n 8007472 <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
800744c: 7bbb ldrb r3, [r7, #14]
800744e: f003 037f and.w r3, r3, #127 @ 0x7f
8007452: 2b00 cmp r3, #0
8007454: d004 beq.n 8007460 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
8007456: 7bbb ldrb r3, [r7, #14]
8007458: 4619 mov r1, r3
800745a: 6878 ldr r0, [r7, #4]
800745c: f001 f8cb bl 80085f6 <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
8007460: 6878 ldr r0, [r7, #4]
8007462: f000 fc97 bl 8007d94 <USBD_CtlSendStatus>
}
break;
8007466: e004 b.n 8007472 <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
8007468: 6839 ldr r1, [r7, #0]
800746a: 6878 ldr r0, [r7, #4]
800746c: f000 fbca bl 8007c04 <USBD_CtlError>
break;
8007470: e000 b.n 8007474 <USBD_StdEPReq+0x158>
break;
8007472: bf00 nop
}
break;
8007474: e0aa b.n 80075cc <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
8007476: 687b ldr r3, [r7, #4]
8007478: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800747c: 2b02 cmp r3, #2
800747e: d002 beq.n 8007486 <USBD_StdEPReq+0x16a>
8007480: 2b03 cmp r3, #3
8007482: d032 beq.n 80074ea <USBD_StdEPReq+0x1ce>
8007484: e097 b.n 80075b6 <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
8007486: 7bbb ldrb r3, [r7, #14]
8007488: 2b00 cmp r3, #0
800748a: d007 beq.n 800749c <USBD_StdEPReq+0x180>
800748c: 7bbb ldrb r3, [r7, #14]
800748e: 2b80 cmp r3, #128 @ 0x80
8007490: d004 beq.n 800749c <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
8007492: 6839 ldr r1, [r7, #0]
8007494: 6878 ldr r0, [r7, #4]
8007496: f000 fbb5 bl 8007c04 <USBD_CtlError>
break;
800749a: e091 b.n 80075c0 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800749c: f997 300e ldrsb.w r3, [r7, #14]
80074a0: 2b00 cmp r3, #0
80074a2: da0b bge.n 80074bc <USBD_StdEPReq+0x1a0>
80074a4: 7bbb ldrb r3, [r7, #14]
80074a6: f003 027f and.w r2, r3, #127 @ 0x7f
80074aa: 4613 mov r3, r2
80074ac: 009b lsls r3, r3, #2
80074ae: 4413 add r3, r2
80074b0: 009b lsls r3, r3, #2
80074b2: 3310 adds r3, #16
80074b4: 687a ldr r2, [r7, #4]
80074b6: 4413 add r3, r2
80074b8: 3304 adds r3, #4
80074ba: e00b b.n 80074d4 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
80074bc: 7bbb ldrb r3, [r7, #14]
80074be: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
80074c2: 4613 mov r3, r2
80074c4: 009b lsls r3, r3, #2
80074c6: 4413 add r3, r2
80074c8: 009b lsls r3, r3, #2
80074ca: f503 73a8 add.w r3, r3, #336 @ 0x150
80074ce: 687a ldr r2, [r7, #4]
80074d0: 4413 add r3, r2
80074d2: 3304 adds r3, #4
80074d4: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
80074d6: 68bb ldr r3, [r7, #8]
80074d8: 2200 movs r2, #0
80074da: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
80074dc: 68bb ldr r3, [r7, #8]
80074de: 2202 movs r2, #2
80074e0: 4619 mov r1, r3
80074e2: 6878 ldr r0, [r7, #4]
80074e4: f000 fbf8 bl 8007cd8 <USBD_CtlSendData>
break;
80074e8: e06a b.n 80075c0 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
80074ea: f997 300e ldrsb.w r3, [r7, #14]
80074ee: 2b00 cmp r3, #0
80074f0: da11 bge.n 8007516 <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
80074f2: 7bbb ldrb r3, [r7, #14]
80074f4: f003 020f and.w r2, r3, #15
80074f8: 6879 ldr r1, [r7, #4]
80074fa: 4613 mov r3, r2
80074fc: 009b lsls r3, r3, #2
80074fe: 4413 add r3, r2
8007500: 009b lsls r3, r3, #2
8007502: 440b add r3, r1
8007504: 3318 adds r3, #24
8007506: 681b ldr r3, [r3, #0]
8007508: 2b00 cmp r3, #0
800750a: d117 bne.n 800753c <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800750c: 6839 ldr r1, [r7, #0]
800750e: 6878 ldr r0, [r7, #4]
8007510: f000 fb78 bl 8007c04 <USBD_CtlError>
break;
8007514: e054 b.n 80075c0 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
8007516: 7bbb ldrb r3, [r7, #14]
8007518: f003 020f and.w r2, r3, #15
800751c: 6879 ldr r1, [r7, #4]
800751e: 4613 mov r3, r2
8007520: 009b lsls r3, r3, #2
8007522: 4413 add r3, r2
8007524: 009b lsls r3, r3, #2
8007526: 440b add r3, r1
8007528: f503 73ac add.w r3, r3, #344 @ 0x158
800752c: 681b ldr r3, [r3, #0]
800752e: 2b00 cmp r3, #0
8007530: d104 bne.n 800753c <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
8007532: 6839 ldr r1, [r7, #0]
8007534: 6878 ldr r0, [r7, #4]
8007536: f000 fb65 bl 8007c04 <USBD_CtlError>
break;
800753a: e041 b.n 80075c0 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800753c: f997 300e ldrsb.w r3, [r7, #14]
8007540: 2b00 cmp r3, #0
8007542: da0b bge.n 800755c <USBD_StdEPReq+0x240>
8007544: 7bbb ldrb r3, [r7, #14]
8007546: f003 027f and.w r2, r3, #127 @ 0x7f
800754a: 4613 mov r3, r2
800754c: 009b lsls r3, r3, #2
800754e: 4413 add r3, r2
8007550: 009b lsls r3, r3, #2
8007552: 3310 adds r3, #16
8007554: 687a ldr r2, [r7, #4]
8007556: 4413 add r3, r2
8007558: 3304 adds r3, #4
800755a: e00b b.n 8007574 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
800755c: 7bbb ldrb r3, [r7, #14]
800755e: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
8007562: 4613 mov r3, r2
8007564: 009b lsls r3, r3, #2
8007566: 4413 add r3, r2
8007568: 009b lsls r3, r3, #2
800756a: f503 73a8 add.w r3, r3, #336 @ 0x150
800756e: 687a ldr r2, [r7, #4]
8007570: 4413 add r3, r2
8007572: 3304 adds r3, #4
8007574: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
8007576: 7bbb ldrb r3, [r7, #14]
8007578: 2b00 cmp r3, #0
800757a: d002 beq.n 8007582 <USBD_StdEPReq+0x266>
800757c: 7bbb ldrb r3, [r7, #14]
800757e: 2b80 cmp r3, #128 @ 0x80
8007580: d103 bne.n 800758a <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
8007582: 68bb ldr r3, [r7, #8]
8007584: 2200 movs r2, #0
8007586: 601a str r2, [r3, #0]
8007588: e00e b.n 80075a8 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800758a: 7bbb ldrb r3, [r7, #14]
800758c: 4619 mov r1, r3
800758e: 6878 ldr r0, [r7, #4]
8007590: f001 f850 bl 8008634 <USBD_LL_IsStallEP>
8007594: 4603 mov r3, r0
8007596: 2b00 cmp r3, #0
8007598: d003 beq.n 80075a2 <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800759a: 68bb ldr r3, [r7, #8]
800759c: 2201 movs r2, #1
800759e: 601a str r2, [r3, #0]
80075a0: e002 b.n 80075a8 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
80075a2: 68bb ldr r3, [r7, #8]
80075a4: 2200 movs r2, #0
80075a6: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
80075a8: 68bb ldr r3, [r7, #8]
80075aa: 2202 movs r2, #2
80075ac: 4619 mov r1, r3
80075ae: 6878 ldr r0, [r7, #4]
80075b0: f000 fb92 bl 8007cd8 <USBD_CtlSendData>
break;
80075b4: e004 b.n 80075c0 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
80075b6: 6839 ldr r1, [r7, #0]
80075b8: 6878 ldr r0, [r7, #4]
80075ba: f000 fb23 bl 8007c04 <USBD_CtlError>
break;
80075be: bf00 nop
}
break;
80075c0: e004 b.n 80075cc <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
80075c2: 6839 ldr r1, [r7, #0]
80075c4: 6878 ldr r0, [r7, #4]
80075c6: f000 fb1d bl 8007c04 <USBD_CtlError>
break;
80075ca: bf00 nop
}
break;
80075cc: e004 b.n 80075d8 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
80075ce: 6839 ldr r1, [r7, #0]
80075d0: 6878 ldr r0, [r7, #4]
80075d2: f000 fb17 bl 8007c04 <USBD_CtlError>
break;
80075d6: bf00 nop
}
return ret;
80075d8: 7bfb ldrb r3, [r7, #15]
}
80075da: 4618 mov r0, r3
80075dc: 3710 adds r7, #16
80075de: 46bd mov sp, r7
80075e0: bd80 pop {r7, pc}
...
080075e4 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80075e4: b580 push {r7, lr}
80075e6: b084 sub sp, #16
80075e8: af00 add r7, sp, #0
80075ea: 6078 str r0, [r7, #4]
80075ec: 6039 str r1, [r7, #0]
uint16_t len = 0U;
80075ee: 2300 movs r3, #0
80075f0: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
80075f2: 2300 movs r3, #0
80075f4: 60fb str r3, [r7, #12]
uint8_t err = 0U;
80075f6: 2300 movs r3, #0
80075f8: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
80075fa: 683b ldr r3, [r7, #0]
80075fc: 885b ldrh r3, [r3, #2]
80075fe: 0a1b lsrs r3, r3, #8
8007600: b29b uxth r3, r3
8007602: 3b01 subs r3, #1
8007604: 2b06 cmp r3, #6
8007606: f200 8128 bhi.w 800785a <USBD_GetDescriptor+0x276>
800760a: a201 add r2, pc, #4 @ (adr r2, 8007610 <USBD_GetDescriptor+0x2c>)
800760c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007610: 0800762d .word 0x0800762d
8007614: 08007645 .word 0x08007645
8007618: 08007685 .word 0x08007685
800761c: 0800785b .word 0x0800785b
8007620: 0800785b .word 0x0800785b
8007624: 080077fb .word 0x080077fb
8007628: 08007827 .word 0x08007827
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800762c: 687b ldr r3, [r7, #4]
800762e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007632: 681b ldr r3, [r3, #0]
8007634: 687a ldr r2, [r7, #4]
8007636: 7c12 ldrb r2, [r2, #16]
8007638: f107 0108 add.w r1, r7, #8
800763c: 4610 mov r0, r2
800763e: 4798 blx r3
8007640: 60f8 str r0, [r7, #12]
break;
8007642: e112 b.n 800786a <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007644: 687b ldr r3, [r7, #4]
8007646: 7c1b ldrb r3, [r3, #16]
8007648: 2b00 cmp r3, #0
800764a: d10d bne.n 8007668 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
800764c: 687b ldr r3, [r7, #4]
800764e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007652: 6a9b ldr r3, [r3, #40] @ 0x28
8007654: f107 0208 add.w r2, r7, #8
8007658: 4610 mov r0, r2
800765a: 4798 blx r3
800765c: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800765e: 68fb ldr r3, [r7, #12]
8007660: 3301 adds r3, #1
8007662: 2202 movs r2, #2
8007664: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
8007666: e100 b.n 800786a <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
8007668: 687b ldr r3, [r7, #4]
800766a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800766e: 6adb ldr r3, [r3, #44] @ 0x2c
8007670: f107 0208 add.w r2, r7, #8
8007674: 4610 mov r0, r2
8007676: 4798 blx r3
8007678: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800767a: 68fb ldr r3, [r7, #12]
800767c: 3301 adds r3, #1
800767e: 2202 movs r2, #2
8007680: 701a strb r2, [r3, #0]
break;
8007682: e0f2 b.n 800786a <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
8007684: 683b ldr r3, [r7, #0]
8007686: 885b ldrh r3, [r3, #2]
8007688: b2db uxtb r3, r3
800768a: 2b05 cmp r3, #5
800768c: f200 80ac bhi.w 80077e8 <USBD_GetDescriptor+0x204>
8007690: a201 add r2, pc, #4 @ (adr r2, 8007698 <USBD_GetDescriptor+0xb4>)
8007692: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007696: bf00 nop
8007698: 080076b1 .word 0x080076b1
800769c: 080076e5 .word 0x080076e5
80076a0: 08007719 .word 0x08007719
80076a4: 0800774d .word 0x0800774d
80076a8: 08007781 .word 0x08007781
80076ac: 080077b5 .word 0x080077b5
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
80076b0: 687b ldr r3, [r7, #4]
80076b2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80076b6: 685b ldr r3, [r3, #4]
80076b8: 2b00 cmp r3, #0
80076ba: d00b beq.n 80076d4 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
80076bc: 687b ldr r3, [r7, #4]
80076be: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80076c2: 685b ldr r3, [r3, #4]
80076c4: 687a ldr r2, [r7, #4]
80076c6: 7c12 ldrb r2, [r2, #16]
80076c8: f107 0108 add.w r1, r7, #8
80076cc: 4610 mov r0, r2
80076ce: 4798 blx r3
80076d0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80076d2: e091 b.n 80077f8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
80076d4: 6839 ldr r1, [r7, #0]
80076d6: 6878 ldr r0, [r7, #4]
80076d8: f000 fa94 bl 8007c04 <USBD_CtlError>
err++;
80076dc: 7afb ldrb r3, [r7, #11]
80076de: 3301 adds r3, #1
80076e0: 72fb strb r3, [r7, #11]
break;
80076e2: e089 b.n 80077f8 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
80076e4: 687b ldr r3, [r7, #4]
80076e6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80076ea: 689b ldr r3, [r3, #8]
80076ec: 2b00 cmp r3, #0
80076ee: d00b beq.n 8007708 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
80076f0: 687b ldr r3, [r7, #4]
80076f2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80076f6: 689b ldr r3, [r3, #8]
80076f8: 687a ldr r2, [r7, #4]
80076fa: 7c12 ldrb r2, [r2, #16]
80076fc: f107 0108 add.w r1, r7, #8
8007700: 4610 mov r0, r2
8007702: 4798 blx r3
8007704: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007706: e077 b.n 80077f8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007708: 6839 ldr r1, [r7, #0]
800770a: 6878 ldr r0, [r7, #4]
800770c: f000 fa7a bl 8007c04 <USBD_CtlError>
err++;
8007710: 7afb ldrb r3, [r7, #11]
8007712: 3301 adds r3, #1
8007714: 72fb strb r3, [r7, #11]
break;
8007716: e06f b.n 80077f8 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
8007718: 687b ldr r3, [r7, #4]
800771a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800771e: 68db ldr r3, [r3, #12]
8007720: 2b00 cmp r3, #0
8007722: d00b beq.n 800773c <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
8007724: 687b ldr r3, [r7, #4]
8007726: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800772a: 68db ldr r3, [r3, #12]
800772c: 687a ldr r2, [r7, #4]
800772e: 7c12 ldrb r2, [r2, #16]
8007730: f107 0108 add.w r1, r7, #8
8007734: 4610 mov r0, r2
8007736: 4798 blx r3
8007738: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800773a: e05d b.n 80077f8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800773c: 6839 ldr r1, [r7, #0]
800773e: 6878 ldr r0, [r7, #4]
8007740: f000 fa60 bl 8007c04 <USBD_CtlError>
err++;
8007744: 7afb ldrb r3, [r7, #11]
8007746: 3301 adds r3, #1
8007748: 72fb strb r3, [r7, #11]
break;
800774a: e055 b.n 80077f8 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800774c: 687b ldr r3, [r7, #4]
800774e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007752: 691b ldr r3, [r3, #16]
8007754: 2b00 cmp r3, #0
8007756: d00b beq.n 8007770 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
8007758: 687b ldr r3, [r7, #4]
800775a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800775e: 691b ldr r3, [r3, #16]
8007760: 687a ldr r2, [r7, #4]
8007762: 7c12 ldrb r2, [r2, #16]
8007764: f107 0108 add.w r1, r7, #8
8007768: 4610 mov r0, r2
800776a: 4798 blx r3
800776c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800776e: e043 b.n 80077f8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
8007770: 6839 ldr r1, [r7, #0]
8007772: 6878 ldr r0, [r7, #4]
8007774: f000 fa46 bl 8007c04 <USBD_CtlError>
err++;
8007778: 7afb ldrb r3, [r7, #11]
800777a: 3301 adds r3, #1
800777c: 72fb strb r3, [r7, #11]
break;
800777e: e03b b.n 80077f8 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
8007780: 687b ldr r3, [r7, #4]
8007782: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007786: 695b ldr r3, [r3, #20]
8007788: 2b00 cmp r3, #0
800778a: d00b beq.n 80077a4 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800778c: 687b ldr r3, [r7, #4]
800778e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
8007792: 695b ldr r3, [r3, #20]
8007794: 687a ldr r2, [r7, #4]
8007796: 7c12 ldrb r2, [r2, #16]
8007798: f107 0108 add.w r1, r7, #8
800779c: 4610 mov r0, r2
800779e: 4798 blx r3
80077a0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80077a2: e029 b.n 80077f8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
80077a4: 6839 ldr r1, [r7, #0]
80077a6: 6878 ldr r0, [r7, #4]
80077a8: f000 fa2c bl 8007c04 <USBD_CtlError>
err++;
80077ac: 7afb ldrb r3, [r7, #11]
80077ae: 3301 adds r3, #1
80077b0: 72fb strb r3, [r7, #11]
break;
80077b2: e021 b.n 80077f8 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
80077b4: 687b ldr r3, [r7, #4]
80077b6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80077ba: 699b ldr r3, [r3, #24]
80077bc: 2b00 cmp r3, #0
80077be: d00b beq.n 80077d8 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
80077c0: 687b ldr r3, [r7, #4]
80077c2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
80077c6: 699b ldr r3, [r3, #24]
80077c8: 687a ldr r2, [r7, #4]
80077ca: 7c12 ldrb r2, [r2, #16]
80077cc: f107 0108 add.w r1, r7, #8
80077d0: 4610 mov r0, r2
80077d2: 4798 blx r3
80077d4: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
80077d6: e00f b.n 80077f8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
80077d8: 6839 ldr r1, [r7, #0]
80077da: 6878 ldr r0, [r7, #4]
80077dc: f000 fa12 bl 8007c04 <USBD_CtlError>
err++;
80077e0: 7afb ldrb r3, [r7, #11]
80077e2: 3301 adds r3, #1
80077e4: 72fb strb r3, [r7, #11]
break;
80077e6: e007 b.n 80077f8 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
80077e8: 6839 ldr r1, [r7, #0]
80077ea: 6878 ldr r0, [r7, #4]
80077ec: f000 fa0a bl 8007c04 <USBD_CtlError>
err++;
80077f0: 7afb ldrb r3, [r7, #11]
80077f2: 3301 adds r3, #1
80077f4: 72fb strb r3, [r7, #11]
#endif
}
break;
80077f6: e038 b.n 800786a <USBD_GetDescriptor+0x286>
80077f8: e037 b.n 800786a <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
80077fa: 687b ldr r3, [r7, #4]
80077fc: 7c1b ldrb r3, [r3, #16]
80077fe: 2b00 cmp r3, #0
8007800: d109 bne.n 8007816 <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
8007802: 687b ldr r3, [r7, #4]
8007804: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007808: 6b5b ldr r3, [r3, #52] @ 0x34
800780a: f107 0208 add.w r2, r7, #8
800780e: 4610 mov r0, r2
8007810: 4798 blx r3
8007812: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007814: e029 b.n 800786a <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
8007816: 6839 ldr r1, [r7, #0]
8007818: 6878 ldr r0, [r7, #4]
800781a: f000 f9f3 bl 8007c04 <USBD_CtlError>
err++;
800781e: 7afb ldrb r3, [r7, #11]
8007820: 3301 adds r3, #1
8007822: 72fb strb r3, [r7, #11]
break;
8007824: e021 b.n 800786a <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
8007826: 687b ldr r3, [r7, #4]
8007828: 7c1b ldrb r3, [r3, #16]
800782a: 2b00 cmp r3, #0
800782c: d10d bne.n 800784a <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
800782e: 687b ldr r3, [r7, #4]
8007830: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
8007834: 6b1b ldr r3, [r3, #48] @ 0x30
8007836: f107 0208 add.w r2, r7, #8
800783a: 4610 mov r0, r2
800783c: 4798 blx r3
800783e: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
8007840: 68fb ldr r3, [r7, #12]
8007842: 3301 adds r3, #1
8007844: 2207 movs r2, #7
8007846: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
8007848: e00f b.n 800786a <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800784a: 6839 ldr r1, [r7, #0]
800784c: 6878 ldr r0, [r7, #4]
800784e: f000 f9d9 bl 8007c04 <USBD_CtlError>
err++;
8007852: 7afb ldrb r3, [r7, #11]
8007854: 3301 adds r3, #1
8007856: 72fb strb r3, [r7, #11]
break;
8007858: e007 b.n 800786a <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800785a: 6839 ldr r1, [r7, #0]
800785c: 6878 ldr r0, [r7, #4]
800785e: f000 f9d1 bl 8007c04 <USBD_CtlError>
err++;
8007862: 7afb ldrb r3, [r7, #11]
8007864: 3301 adds r3, #1
8007866: 72fb strb r3, [r7, #11]
break;
8007868: bf00 nop
}
if (err != 0U)
800786a: 7afb ldrb r3, [r7, #11]
800786c: 2b00 cmp r3, #0
800786e: d11c bne.n 80078aa <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
8007870: 893b ldrh r3, [r7, #8]
8007872: 2b00 cmp r3, #0
8007874: d011 beq.n 800789a <USBD_GetDescriptor+0x2b6>
8007876: 683b ldr r3, [r7, #0]
8007878: 88db ldrh r3, [r3, #6]
800787a: 2b00 cmp r3, #0
800787c: d00d beq.n 800789a <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800787e: 683b ldr r3, [r7, #0]
8007880: 88da ldrh r2, [r3, #6]
8007882: 893b ldrh r3, [r7, #8]
8007884: 4293 cmp r3, r2
8007886: bf28 it cs
8007888: 4613 movcs r3, r2
800788a: b29b uxth r3, r3
800788c: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800788e: 893b ldrh r3, [r7, #8]
8007890: 461a mov r2, r3
8007892: 68f9 ldr r1, [r7, #12]
8007894: 6878 ldr r0, [r7, #4]
8007896: f000 fa1f bl 8007cd8 <USBD_CtlSendData>
}
if (req->wLength == 0U)
800789a: 683b ldr r3, [r7, #0]
800789c: 88db ldrh r3, [r3, #6]
800789e: 2b00 cmp r3, #0
80078a0: d104 bne.n 80078ac <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
80078a2: 6878 ldr r0, [r7, #4]
80078a4: f000 fa76 bl 8007d94 <USBD_CtlSendStatus>
80078a8: e000 b.n 80078ac <USBD_GetDescriptor+0x2c8>
return;
80078aa: bf00 nop
}
}
}
80078ac: 3710 adds r7, #16
80078ae: 46bd mov sp, r7
80078b0: bd80 pop {r7, pc}
80078b2: bf00 nop
080078b4 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
80078b4: b580 push {r7, lr}
80078b6: b084 sub sp, #16
80078b8: af00 add r7, sp, #0
80078ba: 6078 str r0, [r7, #4]
80078bc: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
80078be: 683b ldr r3, [r7, #0]
80078c0: 889b ldrh r3, [r3, #4]
80078c2: 2b00 cmp r3, #0
80078c4: d130 bne.n 8007928 <USBD_SetAddress+0x74>
80078c6: 683b ldr r3, [r7, #0]
80078c8: 88db ldrh r3, [r3, #6]
80078ca: 2b00 cmp r3, #0
80078cc: d12c bne.n 8007928 <USBD_SetAddress+0x74>
80078ce: 683b ldr r3, [r7, #0]
80078d0: 885b ldrh r3, [r3, #2]
80078d2: 2b7f cmp r3, #127 @ 0x7f
80078d4: d828 bhi.n 8007928 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
80078d6: 683b ldr r3, [r7, #0]
80078d8: 885b ldrh r3, [r3, #2]
80078da: b2db uxtb r3, r3
80078dc: f003 037f and.w r3, r3, #127 @ 0x7f
80078e0: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80078e2: 687b ldr r3, [r7, #4]
80078e4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
80078e8: 2b03 cmp r3, #3
80078ea: d104 bne.n 80078f6 <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
80078ec: 6839 ldr r1, [r7, #0]
80078ee: 6878 ldr r0, [r7, #4]
80078f0: f000 f988 bl 8007c04 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
80078f4: e01d b.n 8007932 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
80078f6: 687b ldr r3, [r7, #4]
80078f8: 7bfa ldrb r2, [r7, #15]
80078fa: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
80078fe: 7bfb ldrb r3, [r7, #15]
8007900: 4619 mov r1, r3
8007902: 6878 ldr r0, [r7, #4]
8007904: f000 fec1 bl 800868a <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
8007908: 6878 ldr r0, [r7, #4]
800790a: f000 fa43 bl 8007d94 <USBD_CtlSendStatus>
if (dev_addr != 0U)
800790e: 7bfb ldrb r3, [r7, #15]
8007910: 2b00 cmp r3, #0
8007912: d004 beq.n 800791e <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
8007914: 687b ldr r3, [r7, #4]
8007916: 2202 movs r2, #2
8007918: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800791c: e009 b.n 8007932 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800791e: 687b ldr r3, [r7, #4]
8007920: 2201 movs r2, #1
8007922: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
8007926: e004 b.n 8007932 <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
8007928: 6839 ldr r1, [r7, #0]
800792a: 6878 ldr r0, [r7, #4]
800792c: f000 f96a bl 8007c04 <USBD_CtlError>
}
}
8007930: bf00 nop
8007932: bf00 nop
8007934: 3710 adds r7, #16
8007936: 46bd mov sp, r7
8007938: bd80 pop {r7, pc}
...
0800793c <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800793c: b580 push {r7, lr}
800793e: b082 sub sp, #8
8007940: af00 add r7, sp, #0
8007942: 6078 str r0, [r7, #4]
8007944: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
8007946: 683b ldr r3, [r7, #0]
8007948: 885b ldrh r3, [r3, #2]
800794a: b2da uxtb r2, r3
800794c: 4b41 ldr r3, [pc, #260] @ (8007a54 <USBD_SetConfig+0x118>)
800794e: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
8007950: 4b40 ldr r3, [pc, #256] @ (8007a54 <USBD_SetConfig+0x118>)
8007952: 781b ldrb r3, [r3, #0]
8007954: 2b01 cmp r3, #1
8007956: d904 bls.n 8007962 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
8007958: 6839 ldr r1, [r7, #0]
800795a: 6878 ldr r0, [r7, #4]
800795c: f000 f952 bl 8007c04 <USBD_CtlError>
8007960: e075 b.n 8007a4e <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
8007962: 687b ldr r3, [r7, #4]
8007964: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007968: 2b02 cmp r3, #2
800796a: d002 beq.n 8007972 <USBD_SetConfig+0x36>
800796c: 2b03 cmp r3, #3
800796e: d023 beq.n 80079b8 <USBD_SetConfig+0x7c>
8007970: e062 b.n 8007a38 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
8007972: 4b38 ldr r3, [pc, #224] @ (8007a54 <USBD_SetConfig+0x118>)
8007974: 781b ldrb r3, [r3, #0]
8007976: 2b00 cmp r3, #0
8007978: d01a beq.n 80079b0 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800797a: 4b36 ldr r3, [pc, #216] @ (8007a54 <USBD_SetConfig+0x118>)
800797c: 781b ldrb r3, [r3, #0]
800797e: 461a mov r2, r3
8007980: 687b ldr r3, [r7, #4]
8007982: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
8007984: 687b ldr r3, [r7, #4]
8007986: 2203 movs r2, #3
8007988: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800798c: 4b31 ldr r3, [pc, #196] @ (8007a54 <USBD_SetConfig+0x118>)
800798e: 781b ldrb r3, [r3, #0]
8007990: 4619 mov r1, r3
8007992: 6878 ldr r0, [r7, #4]
8007994: f7ff f9e7 bl 8006d66 <USBD_SetClassConfig>
8007998: 4603 mov r3, r0
800799a: 2b02 cmp r3, #2
800799c: d104 bne.n 80079a8 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800799e: 6839 ldr r1, [r7, #0]
80079a0: 6878 ldr r0, [r7, #4]
80079a2: f000 f92f bl 8007c04 <USBD_CtlError>
return;
80079a6: e052 b.n 8007a4e <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
80079a8: 6878 ldr r0, [r7, #4]
80079aa: f000 f9f3 bl 8007d94 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
80079ae: e04e b.n 8007a4e <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
80079b0: 6878 ldr r0, [r7, #4]
80079b2: f000 f9ef bl 8007d94 <USBD_CtlSendStatus>
break;
80079b6: e04a b.n 8007a4e <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
80079b8: 4b26 ldr r3, [pc, #152] @ (8007a54 <USBD_SetConfig+0x118>)
80079ba: 781b ldrb r3, [r3, #0]
80079bc: 2b00 cmp r3, #0
80079be: d112 bne.n 80079e6 <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
80079c0: 687b ldr r3, [r7, #4]
80079c2: 2202 movs r2, #2
80079c4: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
80079c8: 4b22 ldr r3, [pc, #136] @ (8007a54 <USBD_SetConfig+0x118>)
80079ca: 781b ldrb r3, [r3, #0]
80079cc: 461a mov r2, r3
80079ce: 687b ldr r3, [r7, #4]
80079d0: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
80079d2: 4b20 ldr r3, [pc, #128] @ (8007a54 <USBD_SetConfig+0x118>)
80079d4: 781b ldrb r3, [r3, #0]
80079d6: 4619 mov r1, r3
80079d8: 6878 ldr r0, [r7, #4]
80079da: f7ff f9e3 bl 8006da4 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
80079de: 6878 ldr r0, [r7, #4]
80079e0: f000 f9d8 bl 8007d94 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
80079e4: e033 b.n 8007a4e <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
80079e6: 4b1b ldr r3, [pc, #108] @ (8007a54 <USBD_SetConfig+0x118>)
80079e8: 781b ldrb r3, [r3, #0]
80079ea: 461a mov r2, r3
80079ec: 687b ldr r3, [r7, #4]
80079ee: 685b ldr r3, [r3, #4]
80079f0: 429a cmp r2, r3
80079f2: d01d beq.n 8007a30 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
80079f4: 687b ldr r3, [r7, #4]
80079f6: 685b ldr r3, [r3, #4]
80079f8: b2db uxtb r3, r3
80079fa: 4619 mov r1, r3
80079fc: 6878 ldr r0, [r7, #4]
80079fe: f7ff f9d1 bl 8006da4 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
8007a02: 4b14 ldr r3, [pc, #80] @ (8007a54 <USBD_SetConfig+0x118>)
8007a04: 781b ldrb r3, [r3, #0]
8007a06: 461a mov r2, r3
8007a08: 687b ldr r3, [r7, #4]
8007a0a: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
8007a0c: 4b11 ldr r3, [pc, #68] @ (8007a54 <USBD_SetConfig+0x118>)
8007a0e: 781b ldrb r3, [r3, #0]
8007a10: 4619 mov r1, r3
8007a12: 6878 ldr r0, [r7, #4]
8007a14: f7ff f9a7 bl 8006d66 <USBD_SetClassConfig>
8007a18: 4603 mov r3, r0
8007a1a: 2b02 cmp r3, #2
8007a1c: d104 bne.n 8007a28 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
8007a1e: 6839 ldr r1, [r7, #0]
8007a20: 6878 ldr r0, [r7, #4]
8007a22: f000 f8ef bl 8007c04 <USBD_CtlError>
return;
8007a26: e012 b.n 8007a4e <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8007a28: 6878 ldr r0, [r7, #4]
8007a2a: f000 f9b3 bl 8007d94 <USBD_CtlSendStatus>
break;
8007a2e: e00e b.n 8007a4e <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
8007a30: 6878 ldr r0, [r7, #4]
8007a32: f000 f9af bl 8007d94 <USBD_CtlSendStatus>
break;
8007a36: e00a b.n 8007a4e <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
8007a38: 6839 ldr r1, [r7, #0]
8007a3a: 6878 ldr r0, [r7, #4]
8007a3c: f000 f8e2 bl 8007c04 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
8007a40: 4b04 ldr r3, [pc, #16] @ (8007a54 <USBD_SetConfig+0x118>)
8007a42: 781b ldrb r3, [r3, #0]
8007a44: 4619 mov r1, r3
8007a46: 6878 ldr r0, [r7, #4]
8007a48: f7ff f9ac bl 8006da4 <USBD_ClrClassConfig>
break;
8007a4c: bf00 nop
}
}
}
8007a4e: 3708 adds r7, #8
8007a50: 46bd mov sp, r7
8007a52: bd80 pop {r7, pc}
8007a54: 200002c8 .word 0x200002c8
08007a58 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007a58: b580 push {r7, lr}
8007a5a: b082 sub sp, #8
8007a5c: af00 add r7, sp, #0
8007a5e: 6078 str r0, [r7, #4]
8007a60: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
8007a62: 683b ldr r3, [r7, #0]
8007a64: 88db ldrh r3, [r3, #6]
8007a66: 2b01 cmp r3, #1
8007a68: d004 beq.n 8007a74 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
8007a6a: 6839 ldr r1, [r7, #0]
8007a6c: 6878 ldr r0, [r7, #4]
8007a6e: f000 f8c9 bl 8007c04 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
8007a72: e022 b.n 8007aba <USBD_GetConfig+0x62>
switch (pdev->dev_state)
8007a74: 687b ldr r3, [r7, #4]
8007a76: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007a7a: 2b02 cmp r3, #2
8007a7c: dc02 bgt.n 8007a84 <USBD_GetConfig+0x2c>
8007a7e: 2b00 cmp r3, #0
8007a80: dc03 bgt.n 8007a8a <USBD_GetConfig+0x32>
8007a82: e015 b.n 8007ab0 <USBD_GetConfig+0x58>
8007a84: 2b03 cmp r3, #3
8007a86: d00b beq.n 8007aa0 <USBD_GetConfig+0x48>
8007a88: e012 b.n 8007ab0 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
8007a8a: 687b ldr r3, [r7, #4]
8007a8c: 2200 movs r2, #0
8007a8e: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
8007a90: 687b ldr r3, [r7, #4]
8007a92: 3308 adds r3, #8
8007a94: 2201 movs r2, #1
8007a96: 4619 mov r1, r3
8007a98: 6878 ldr r0, [r7, #4]
8007a9a: f000 f91d bl 8007cd8 <USBD_CtlSendData>
break;
8007a9e: e00c b.n 8007aba <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
8007aa0: 687b ldr r3, [r7, #4]
8007aa2: 3304 adds r3, #4
8007aa4: 2201 movs r2, #1
8007aa6: 4619 mov r1, r3
8007aa8: 6878 ldr r0, [r7, #4]
8007aaa: f000 f915 bl 8007cd8 <USBD_CtlSendData>
break;
8007aae: e004 b.n 8007aba <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
8007ab0: 6839 ldr r1, [r7, #0]
8007ab2: 6878 ldr r0, [r7, #4]
8007ab4: f000 f8a6 bl 8007c04 <USBD_CtlError>
break;
8007ab8: bf00 nop
}
8007aba: bf00 nop
8007abc: 3708 adds r7, #8
8007abe: 46bd mov sp, r7
8007ac0: bd80 pop {r7, pc}
08007ac2 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
8007ac2: b580 push {r7, lr}
8007ac4: b082 sub sp, #8
8007ac6: af00 add r7, sp, #0
8007ac8: 6078 str r0, [r7, #4]
8007aca: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8007acc: 687b ldr r3, [r7, #4]
8007ace: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007ad2: 3b01 subs r3, #1
8007ad4: 2b02 cmp r3, #2
8007ad6: d81e bhi.n 8007b16 <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
8007ad8: 683b ldr r3, [r7, #0]
8007ada: 88db ldrh r3, [r3, #6]
8007adc: 2b02 cmp r3, #2
8007ade: d004 beq.n 8007aea <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
8007ae0: 6839 ldr r1, [r7, #0]
8007ae2: 6878 ldr r0, [r7, #4]
8007ae4: f000 f88e bl 8007c04 <USBD_CtlError>
break;
8007ae8: e01a b.n 8007b20 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
8007aea: 687b ldr r3, [r7, #4]
8007aec: 2201 movs r2, #1
8007aee: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
8007af0: 687b ldr r3, [r7, #4]
8007af2: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
8007af6: 2b00 cmp r3, #0
8007af8: d005 beq.n 8007b06 <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
8007afa: 687b ldr r3, [r7, #4]
8007afc: 68db ldr r3, [r3, #12]
8007afe: f043 0202 orr.w r2, r3, #2
8007b02: 687b ldr r3, [r7, #4]
8007b04: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
8007b06: 687b ldr r3, [r7, #4]
8007b08: 330c adds r3, #12
8007b0a: 2202 movs r2, #2
8007b0c: 4619 mov r1, r3
8007b0e: 6878 ldr r0, [r7, #4]
8007b10: f000 f8e2 bl 8007cd8 <USBD_CtlSendData>
break;
8007b14: e004 b.n 8007b20 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
8007b16: 6839 ldr r1, [r7, #0]
8007b18: 6878 ldr r0, [r7, #4]
8007b1a: f000 f873 bl 8007c04 <USBD_CtlError>
break;
8007b1e: bf00 nop
}
}
8007b20: bf00 nop
8007b22: 3708 adds r7, #8
8007b24: 46bd mov sp, r7
8007b26: bd80 pop {r7, pc}
08007b28 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007b28: b580 push {r7, lr}
8007b2a: b082 sub sp, #8
8007b2c: af00 add r7, sp, #0
8007b2e: 6078 str r0, [r7, #4]
8007b30: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
8007b32: 683b ldr r3, [r7, #0]
8007b34: 885b ldrh r3, [r3, #2]
8007b36: 2b01 cmp r3, #1
8007b38: d106 bne.n 8007b48 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
8007b3a: 687b ldr r3, [r7, #4]
8007b3c: 2201 movs r2, #1
8007b3e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
8007b42: 6878 ldr r0, [r7, #4]
8007b44: f000 f926 bl 8007d94 <USBD_CtlSendStatus>
}
}
8007b48: bf00 nop
8007b4a: 3708 adds r7, #8
8007b4c: 46bd mov sp, r7
8007b4e: bd80 pop {r7, pc}
08007b50 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007b50: b580 push {r7, lr}
8007b52: b082 sub sp, #8
8007b54: af00 add r7, sp, #0
8007b56: 6078 str r0, [r7, #4]
8007b58: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
8007b5a: 687b ldr r3, [r7, #4]
8007b5c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
8007b60: 3b01 subs r3, #1
8007b62: 2b02 cmp r3, #2
8007b64: d80b bhi.n 8007b7e <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
8007b66: 683b ldr r3, [r7, #0]
8007b68: 885b ldrh r3, [r3, #2]
8007b6a: 2b01 cmp r3, #1
8007b6c: d10c bne.n 8007b88 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
8007b6e: 687b ldr r3, [r7, #4]
8007b70: 2200 movs r2, #0
8007b72: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
8007b76: 6878 ldr r0, [r7, #4]
8007b78: f000 f90c bl 8007d94 <USBD_CtlSendStatus>
}
break;
8007b7c: e004 b.n 8007b88 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
8007b7e: 6839 ldr r1, [r7, #0]
8007b80: 6878 ldr r0, [r7, #4]
8007b82: f000 f83f bl 8007c04 <USBD_CtlError>
break;
8007b86: e000 b.n 8007b8a <USBD_ClrFeature+0x3a>
break;
8007b88: bf00 nop
}
}
8007b8a: bf00 nop
8007b8c: 3708 adds r7, #8
8007b8e: 46bd mov sp, r7
8007b90: bd80 pop {r7, pc}
08007b92 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
8007b92: b480 push {r7}
8007b94: b083 sub sp, #12
8007b96: af00 add r7, sp, #0
8007b98: 6078 str r0, [r7, #4]
8007b9a: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
8007b9c: 683b ldr r3, [r7, #0]
8007b9e: 781a ldrb r2, [r3, #0]
8007ba0: 687b ldr r3, [r7, #4]
8007ba2: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
8007ba4: 683b ldr r3, [r7, #0]
8007ba6: 785a ldrb r2, [r3, #1]
8007ba8: 687b ldr r3, [r7, #4]
8007baa: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
8007bac: 683b ldr r3, [r7, #0]
8007bae: 3302 adds r3, #2
8007bb0: 781b ldrb r3, [r3, #0]
8007bb2: 461a mov r2, r3
8007bb4: 683b ldr r3, [r7, #0]
8007bb6: 3303 adds r3, #3
8007bb8: 781b ldrb r3, [r3, #0]
8007bba: 021b lsls r3, r3, #8
8007bbc: b29b uxth r3, r3
8007bbe: 4413 add r3, r2
8007bc0: b29a uxth r2, r3
8007bc2: 687b ldr r3, [r7, #4]
8007bc4: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
8007bc6: 683b ldr r3, [r7, #0]
8007bc8: 3304 adds r3, #4
8007bca: 781b ldrb r3, [r3, #0]
8007bcc: 461a mov r2, r3
8007bce: 683b ldr r3, [r7, #0]
8007bd0: 3305 adds r3, #5
8007bd2: 781b ldrb r3, [r3, #0]
8007bd4: 021b lsls r3, r3, #8
8007bd6: b29b uxth r3, r3
8007bd8: 4413 add r3, r2
8007bda: b29a uxth r2, r3
8007bdc: 687b ldr r3, [r7, #4]
8007bde: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
8007be0: 683b ldr r3, [r7, #0]
8007be2: 3306 adds r3, #6
8007be4: 781b ldrb r3, [r3, #0]
8007be6: 461a mov r2, r3
8007be8: 683b ldr r3, [r7, #0]
8007bea: 3307 adds r3, #7
8007bec: 781b ldrb r3, [r3, #0]
8007bee: 021b lsls r3, r3, #8
8007bf0: b29b uxth r3, r3
8007bf2: 4413 add r3, r2
8007bf4: b29a uxth r2, r3
8007bf6: 687b ldr r3, [r7, #4]
8007bf8: 80da strh r2, [r3, #6]
}
8007bfa: bf00 nop
8007bfc: 370c adds r7, #12
8007bfe: 46bd mov sp, r7
8007c00: bc80 pop {r7}
8007c02: 4770 bx lr
08007c04 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
8007c04: b580 push {r7, lr}
8007c06: b082 sub sp, #8
8007c08: af00 add r7, sp, #0
8007c0a: 6078 str r0, [r7, #4]
8007c0c: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
8007c0e: 2180 movs r1, #128 @ 0x80
8007c10: 6878 ldr r0, [r7, #4]
8007c12: f000 fcd1 bl 80085b8 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
8007c16: 2100 movs r1, #0
8007c18: 6878 ldr r0, [r7, #4]
8007c1a: f000 fccd bl 80085b8 <USBD_LL_StallEP>
}
8007c1e: bf00 nop
8007c20: 3708 adds r7, #8
8007c22: 46bd mov sp, r7
8007c24: bd80 pop {r7, pc}
08007c26 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
8007c26: b580 push {r7, lr}
8007c28: b086 sub sp, #24
8007c2a: af00 add r7, sp, #0
8007c2c: 60f8 str r0, [r7, #12]
8007c2e: 60b9 str r1, [r7, #8]
8007c30: 607a str r2, [r7, #4]
uint8_t idx = 0U;
8007c32: 2300 movs r3, #0
8007c34: 75fb strb r3, [r7, #23]
if (desc != NULL)
8007c36: 68fb ldr r3, [r7, #12]
8007c38: 2b00 cmp r3, #0
8007c3a: d032 beq.n 8007ca2 <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
8007c3c: 68f8 ldr r0, [r7, #12]
8007c3e: f000 f834 bl 8007caa <USBD_GetLen>
8007c42: 4603 mov r3, r0
8007c44: 3301 adds r3, #1
8007c46: b29b uxth r3, r3
8007c48: 005b lsls r3, r3, #1
8007c4a: b29a uxth r2, r3
8007c4c: 687b ldr r3, [r7, #4]
8007c4e: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
8007c50: 7dfb ldrb r3, [r7, #23]
8007c52: 1c5a adds r2, r3, #1
8007c54: 75fa strb r2, [r7, #23]
8007c56: 461a mov r2, r3
8007c58: 68bb ldr r3, [r7, #8]
8007c5a: 4413 add r3, r2
8007c5c: 687a ldr r2, [r7, #4]
8007c5e: 7812 ldrb r2, [r2, #0]
8007c60: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
8007c62: 7dfb ldrb r3, [r7, #23]
8007c64: 1c5a adds r2, r3, #1
8007c66: 75fa strb r2, [r7, #23]
8007c68: 461a mov r2, r3
8007c6a: 68bb ldr r3, [r7, #8]
8007c6c: 4413 add r3, r2
8007c6e: 2203 movs r2, #3
8007c70: 701a strb r2, [r3, #0]
while (*desc != '\0')
8007c72: e012 b.n 8007c9a <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
8007c74: 68fb ldr r3, [r7, #12]
8007c76: 1c5a adds r2, r3, #1
8007c78: 60fa str r2, [r7, #12]
8007c7a: 7dfa ldrb r2, [r7, #23]
8007c7c: 1c51 adds r1, r2, #1
8007c7e: 75f9 strb r1, [r7, #23]
8007c80: 4611 mov r1, r2
8007c82: 68ba ldr r2, [r7, #8]
8007c84: 440a add r2, r1
8007c86: 781b ldrb r3, [r3, #0]
8007c88: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
8007c8a: 7dfb ldrb r3, [r7, #23]
8007c8c: 1c5a adds r2, r3, #1
8007c8e: 75fa strb r2, [r7, #23]
8007c90: 461a mov r2, r3
8007c92: 68bb ldr r3, [r7, #8]
8007c94: 4413 add r3, r2
8007c96: 2200 movs r2, #0
8007c98: 701a strb r2, [r3, #0]
while (*desc != '\0')
8007c9a: 68fb ldr r3, [r7, #12]
8007c9c: 781b ldrb r3, [r3, #0]
8007c9e: 2b00 cmp r3, #0
8007ca0: d1e8 bne.n 8007c74 <USBD_GetString+0x4e>
}
}
}
8007ca2: bf00 nop
8007ca4: 3718 adds r7, #24
8007ca6: 46bd mov sp, r7
8007ca8: bd80 pop {r7, pc}
08007caa <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
8007caa: b480 push {r7}
8007cac: b085 sub sp, #20
8007cae: af00 add r7, sp, #0
8007cb0: 6078 str r0, [r7, #4]
uint8_t len = 0U;
8007cb2: 2300 movs r3, #0
8007cb4: 73fb strb r3, [r7, #15]
while (*buf != '\0')
8007cb6: e005 b.n 8007cc4 <USBD_GetLen+0x1a>
{
len++;
8007cb8: 7bfb ldrb r3, [r7, #15]
8007cba: 3301 adds r3, #1
8007cbc: 73fb strb r3, [r7, #15]
buf++;
8007cbe: 687b ldr r3, [r7, #4]
8007cc0: 3301 adds r3, #1
8007cc2: 607b str r3, [r7, #4]
while (*buf != '\0')
8007cc4: 687b ldr r3, [r7, #4]
8007cc6: 781b ldrb r3, [r3, #0]
8007cc8: 2b00 cmp r3, #0
8007cca: d1f5 bne.n 8007cb8 <USBD_GetLen+0xe>
}
return len;
8007ccc: 7bfb ldrb r3, [r7, #15]
}
8007cce: 4618 mov r0, r3
8007cd0: 3714 adds r7, #20
8007cd2: 46bd mov sp, r7
8007cd4: bc80 pop {r7}
8007cd6: 4770 bx lr
08007cd8 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8007cd8: b580 push {r7, lr}
8007cda: b084 sub sp, #16
8007cdc: af00 add r7, sp, #0
8007cde: 60f8 str r0, [r7, #12]
8007ce0: 60b9 str r1, [r7, #8]
8007ce2: 4613 mov r3, r2
8007ce4: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
8007ce6: 68fb ldr r3, [r7, #12]
8007ce8: 2202 movs r2, #2
8007cea: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
8007cee: 88fa ldrh r2, [r7, #6]
8007cf0: 68fb ldr r3, [r7, #12]
8007cf2: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
8007cf4: 88fa ldrh r2, [r7, #6]
8007cf6: 68fb ldr r3, [r7, #12]
8007cf8: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8007cfa: 88fb ldrh r3, [r7, #6]
8007cfc: 68ba ldr r2, [r7, #8]
8007cfe: 2100 movs r1, #0
8007d00: 68f8 ldr r0, [r7, #12]
8007d02: f000 fce1 bl 80086c8 <USBD_LL_Transmit>
return USBD_OK;
8007d06: 2300 movs r3, #0
}
8007d08: 4618 mov r0, r3
8007d0a: 3710 adds r7, #16
8007d0c: 46bd mov sp, r7
8007d0e: bd80 pop {r7, pc}
08007d10 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8007d10: b580 push {r7, lr}
8007d12: b084 sub sp, #16
8007d14: af00 add r7, sp, #0
8007d16: 60f8 str r0, [r7, #12]
8007d18: 60b9 str r1, [r7, #8]
8007d1a: 4613 mov r3, r2
8007d1c: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
8007d1e: 88fb ldrh r3, [r7, #6]
8007d20: 68ba ldr r2, [r7, #8]
8007d22: 2100 movs r1, #0
8007d24: 68f8 ldr r0, [r7, #12]
8007d26: f000 fccf bl 80086c8 <USBD_LL_Transmit>
return USBD_OK;
8007d2a: 2300 movs r3, #0
}
8007d2c: 4618 mov r0, r3
8007d2e: 3710 adds r7, #16
8007d30: 46bd mov sp, r7
8007d32: bd80 pop {r7, pc}
08007d34 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8007d34: b580 push {r7, lr}
8007d36: b084 sub sp, #16
8007d38: af00 add r7, sp, #0
8007d3a: 60f8 str r0, [r7, #12]
8007d3c: 60b9 str r1, [r7, #8]
8007d3e: 4613 mov r3, r2
8007d40: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
8007d42: 68fb ldr r3, [r7, #12]
8007d44: 2203 movs r2, #3
8007d46: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
8007d4a: 88fa ldrh r2, [r7, #6]
8007d4c: 68fb ldr r3, [r7, #12]
8007d4e: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
8007d52: 88fa ldrh r2, [r7, #6]
8007d54: 68fb ldr r3, [r7, #12]
8007d56: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8007d5a: 88fb ldrh r3, [r7, #6]
8007d5c: 68ba ldr r2, [r7, #8]
8007d5e: 2100 movs r1, #0
8007d60: 68f8 ldr r0, [r7, #12]
8007d62: f000 fcd4 bl 800870e <USBD_LL_PrepareReceive>
return USBD_OK;
8007d66: 2300 movs r3, #0
}
8007d68: 4618 mov r0, r3
8007d6a: 3710 adds r7, #16
8007d6c: 46bd mov sp, r7
8007d6e: bd80 pop {r7, pc}
08007d70 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
8007d70: b580 push {r7, lr}
8007d72: b084 sub sp, #16
8007d74: af00 add r7, sp, #0
8007d76: 60f8 str r0, [r7, #12]
8007d78: 60b9 str r1, [r7, #8]
8007d7a: 4613 mov r3, r2
8007d7c: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
8007d7e: 88fb ldrh r3, [r7, #6]
8007d80: 68ba ldr r2, [r7, #8]
8007d82: 2100 movs r1, #0
8007d84: 68f8 ldr r0, [r7, #12]
8007d86: f000 fcc2 bl 800870e <USBD_LL_PrepareReceive>
return USBD_OK;
8007d8a: 2300 movs r3, #0
}
8007d8c: 4618 mov r0, r3
8007d8e: 3710 adds r7, #16
8007d90: 46bd mov sp, r7
8007d92: bd80 pop {r7, pc}
08007d94 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
8007d94: b580 push {r7, lr}
8007d96: b082 sub sp, #8
8007d98: af00 add r7, sp, #0
8007d9a: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
8007d9c: 687b ldr r3, [r7, #4]
8007d9e: 2204 movs r2, #4
8007da0: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
8007da4: 2300 movs r3, #0
8007da6: 2200 movs r2, #0
8007da8: 2100 movs r1, #0
8007daa: 6878 ldr r0, [r7, #4]
8007dac: f000 fc8c bl 80086c8 <USBD_LL_Transmit>
return USBD_OK;
8007db0: 2300 movs r3, #0
}
8007db2: 4618 mov r0, r3
8007db4: 3708 adds r7, #8
8007db6: 46bd mov sp, r7
8007db8: bd80 pop {r7, pc}
08007dba <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
8007dba: b580 push {r7, lr}
8007dbc: b082 sub sp, #8
8007dbe: af00 add r7, sp, #0
8007dc0: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
8007dc2: 687b ldr r3, [r7, #4]
8007dc4: 2205 movs r2, #5
8007dc6: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
8007dca: 2300 movs r3, #0
8007dcc: 2200 movs r2, #0
8007dce: 2100 movs r1, #0
8007dd0: 6878 ldr r0, [r7, #4]
8007dd2: f000 fc9c bl 800870e <USBD_LL_PrepareReceive>
return USBD_OK;
8007dd6: 2300 movs r3, #0
}
8007dd8: 4618 mov r0, r3
8007dda: 3708 adds r7, #8
8007ddc: 46bd mov sp, r7
8007dde: bd80 pop {r7, pc}
08007de0 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
8007de0: b580 push {r7, lr}
8007de2: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
8007de4: 2200 movs r2, #0
8007de6: 4912 ldr r1, [pc, #72] @ (8007e30 <MX_USB_DEVICE_Init+0x50>)
8007de8: 4812 ldr r0, [pc, #72] @ (8007e34 <MX_USB_DEVICE_Init+0x54>)
8007dea: f7fe ff62 bl 8006cb2 <USBD_Init>
8007dee: 4603 mov r3, r0
8007df0: 2b00 cmp r3, #0
8007df2: d001 beq.n 8007df8 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
8007df4: f7f8 fc8c bl 8000710 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
8007df8: 490f ldr r1, [pc, #60] @ (8007e38 <MX_USB_DEVICE_Init+0x58>)
8007dfa: 480e ldr r0, [pc, #56] @ (8007e34 <MX_USB_DEVICE_Init+0x54>)
8007dfc: f7fe ff84 bl 8006d08 <USBD_RegisterClass>
8007e00: 4603 mov r3, r0
8007e02: 2b00 cmp r3, #0
8007e04: d001 beq.n 8007e0a <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
8007e06: f7f8 fc83 bl 8000710 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
8007e0a: 490c ldr r1, [pc, #48] @ (8007e3c <MX_USB_DEVICE_Init+0x5c>)
8007e0c: 4809 ldr r0, [pc, #36] @ (8007e34 <MX_USB_DEVICE_Init+0x54>)
8007e0e: f7fe feb5 bl 8006b7c <USBD_CDC_RegisterInterface>
8007e12: 4603 mov r3, r0
8007e14: 2b00 cmp r3, #0
8007e16: d001 beq.n 8007e1c <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
8007e18: f7f8 fc7a bl 8000710 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
8007e1c: 4805 ldr r0, [pc, #20] @ (8007e34 <MX_USB_DEVICE_Init+0x54>)
8007e1e: f7fe ff8c bl 8006d3a <USBD_Start>
8007e22: 4603 mov r3, r0
8007e24: 2b00 cmp r3, #0
8007e26: d001 beq.n 8007e2c <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
8007e28: f7f8 fc72 bl 8000710 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
8007e2c: bf00 nop
8007e2e: bd80 pop {r7, pc}
8007e30: 2000012c .word 0x2000012c
8007e34: 200002cc .word 0x200002cc
8007e38: 20000018 .word 0x20000018
8007e3c: 2000011c .word 0x2000011c
08007e40 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
8007e40: b480 push {r7}
8007e42: b085 sub sp, #20
8007e44: af00 add r7, sp, #0
8007e46: 6078 str r0, [r7, #4]
8007e48: 6039 str r1, [r7, #0]
while (len--) {
8007e4a: e01e b.n 8007e8a <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
8007e4c: 4b14 ldr r3, [pc, #80] @ (8007ea0 <fifo_push+0x60>)
8007e4e: 881b ldrh r3, [r3, #0]
8007e50: b29b uxth r3, r3
8007e52: 3301 adds r3, #1
8007e54: b29b uxth r3, r3
8007e56: b2db uxtb r3, r3
8007e58: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
8007e5a: 89fa ldrh r2, [r7, #14]
8007e5c: 4b11 ldr r3, [pc, #68] @ (8007ea4 <fifo_push+0x64>)
8007e5e: 881b ldrh r3, [r3, #0]
8007e60: b29b uxth r3, r3
8007e62: b2db uxtb r3, r3
8007e64: 429a cmp r2, r3
8007e66: d103 bne.n 8007e70 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
8007e68: 687b ldr r3, [r7, #4]
8007e6a: 3301 adds r3, #1
8007e6c: 607b str r3, [r7, #4]
continue;
8007e6e: e00c b.n 8007e8a <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
8007e70: 687b ldr r3, [r7, #4]
8007e72: 1c5a adds r2, r3, #1
8007e74: 607a str r2, [r7, #4]
8007e76: 4a0a ldr r2, [pc, #40] @ (8007ea0 <fifo_push+0x60>)
8007e78: 8812 ldrh r2, [r2, #0]
8007e7a: b292 uxth r2, r2
8007e7c: b2d2 uxtb r2, r2
8007e7e: 7819 ldrb r1, [r3, #0]
8007e80: 4b09 ldr r3, [pc, #36] @ (8007ea8 <fifo_push+0x68>)
8007e82: 5499 strb r1, [r3, r2]
rx_head = next;
8007e84: 4a06 ldr r2, [pc, #24] @ (8007ea0 <fifo_push+0x60>)
8007e86: 89fb ldrh r3, [r7, #14]
8007e88: 8013 strh r3, [r2, #0]
while (len--) {
8007e8a: 683b ldr r3, [r7, #0]
8007e8c: 1e5a subs r2, r3, #1
8007e8e: 603a str r2, [r7, #0]
8007e90: 2b00 cmp r3, #0
8007e92: d1db bne.n 8007e4c <fifo_push+0xc>
}
}
8007e94: bf00 nop
8007e96: bf00 nop
8007e98: 3714 adds r7, #20
8007e9a: 46bd mov sp, r7
8007e9c: bc80 pop {r7}
8007e9e: 4770 bx lr
8007ea0: 20000e90 .word 0x20000e90
8007ea4: 20000e92 .word 0x20000e92
8007ea8: 20000d90 .word 0x20000d90
08007eac <CDC_Available>:
uint32_t CDC_Available(void) {
8007eac: b480 push {r7}
8007eae: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
8007eb0: 4b06 ldr r3, [pc, #24] @ (8007ecc <CDC_Available+0x20>)
8007eb2: 881b ldrh r3, [r3, #0]
8007eb4: b29a uxth r2, r3
8007eb6: 4b06 ldr r3, [pc, #24] @ (8007ed0 <CDC_Available+0x24>)
8007eb8: 881b ldrh r3, [r3, #0]
8007eba: b29b uxth r3, r3
8007ebc: 1ad3 subs r3, r2, r3
8007ebe: b29b uxth r3, r3
8007ec0: b2db uxtb r3, r3
}
8007ec2: 4618 mov r0, r3
8007ec4: 46bd mov sp, r7
8007ec6: bc80 pop {r7}
8007ec8: 4770 bx lr
8007eca: bf00 nop
8007ecc: 20000e90 .word 0x20000e90
8007ed0: 20000e92 .word 0x20000e92
08007ed4 <CDC_ReadByte>:
int CDC_ReadByte(void) {
8007ed4: b480 push {r7}
8007ed6: b083 sub sp, #12
8007ed8: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
8007eda: 4b10 ldr r3, [pc, #64] @ (8007f1c <CDC_ReadByte+0x48>)
8007edc: 881b ldrh r3, [r3, #0]
8007ede: b29a uxth r2, r3
8007ee0: 4b0f ldr r3, [pc, #60] @ (8007f20 <CDC_ReadByte+0x4c>)
8007ee2: 881b ldrh r3, [r3, #0]
8007ee4: b29b uxth r3, r3
8007ee6: 429a cmp r2, r3
8007ee8: d102 bne.n 8007ef0 <CDC_ReadByte+0x1c>
8007eea: f04f 33ff mov.w r3, #4294967295
8007eee: e010 b.n 8007f12 <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
8007ef0: 4b0a ldr r3, [pc, #40] @ (8007f1c <CDC_ReadByte+0x48>)
8007ef2: 881b ldrh r3, [r3, #0]
8007ef4: b29b uxth r3, r3
8007ef6: b2db uxtb r3, r3
8007ef8: 4a0a ldr r2, [pc, #40] @ (8007f24 <CDC_ReadByte+0x50>)
8007efa: 5cd3 ldrb r3, [r2, r3]
8007efc: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
8007efe: 4b07 ldr r3, [pc, #28] @ (8007f1c <CDC_ReadByte+0x48>)
8007f00: 881b ldrh r3, [r3, #0]
8007f02: b29b uxth r3, r3
8007f04: 3301 adds r3, #1
8007f06: b29b uxth r3, r3
8007f08: b2db uxtb r3, r3
8007f0a: b29a uxth r2, r3
8007f0c: 4b03 ldr r3, [pc, #12] @ (8007f1c <CDC_ReadByte+0x48>)
8007f0e: 801a strh r2, [r3, #0]
return b;
8007f10: 687b ldr r3, [r7, #4]
}
8007f12: 4618 mov r0, r3
8007f14: 370c adds r7, #12
8007f16: 46bd mov sp, r7
8007f18: bc80 pop {r7}
8007f1a: 4770 bx lr
8007f1c: 20000e92 .word 0x20000e92
8007f20: 20000e90 .word 0x20000e90
8007f24: 20000d90 .word 0x20000d90
08007f28 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
8007f28: b580 push {r7, lr}
8007f2a: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
8007f2c: 2200 movs r2, #0
8007f2e: 4905 ldr r1, [pc, #20] @ (8007f44 <CDC_Init_FS+0x1c>)
8007f30: 4805 ldr r0, [pc, #20] @ (8007f48 <CDC_Init_FS+0x20>)
8007f32: f7fe fe39 bl 8006ba8 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
8007f36: 4905 ldr r1, [pc, #20] @ (8007f4c <CDC_Init_FS+0x24>)
8007f38: 4803 ldr r0, [pc, #12] @ (8007f48 <CDC_Init_FS+0x20>)
8007f3a: f7fe fe4e bl 8006bda <USBD_CDC_SetRxBuffer>
return (USBD_OK);
8007f3e: 2300 movs r3, #0
/* USER CODE END 3 */
}
8007f40: 4618 mov r0, r3
8007f42: bd80 pop {r7, pc}
8007f44: 20000990 .word 0x20000990
8007f48: 200002cc .word 0x200002cc
8007f4c: 20000590 .word 0x20000590
08007f50 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
8007f50: b480 push {r7}
8007f52: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
8007f54: 2300 movs r3, #0
/* USER CODE END 4 */
}
8007f56: 4618 mov r0, r3
8007f58: 46bd mov sp, r7
8007f5a: bc80 pop {r7}
8007f5c: 4770 bx lr
...
08007f60 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
8007f60: b480 push {r7}
8007f62: b083 sub sp, #12
8007f64: af00 add r7, sp, #0
8007f66: 4603 mov r3, r0
8007f68: 6039 str r1, [r7, #0]
8007f6a: 71fb strb r3, [r7, #7]
8007f6c: 4613 mov r3, r2
8007f6e: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
8007f70: 79fb ldrb r3, [r7, #7]
8007f72: 2b23 cmp r3, #35 @ 0x23
8007f74: d84a bhi.n 800800c <CDC_Control_FS+0xac>
8007f76: a201 add r2, pc, #4 @ (adr r2, 8007f7c <CDC_Control_FS+0x1c>)
8007f78: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8007f7c: 0800800d .word 0x0800800d
8007f80: 0800800d .word 0x0800800d
8007f84: 0800800d .word 0x0800800d
8007f88: 0800800d .word 0x0800800d
8007f8c: 0800800d .word 0x0800800d
8007f90: 0800800d .word 0x0800800d
8007f94: 0800800d .word 0x0800800d
8007f98: 0800800d .word 0x0800800d
8007f9c: 0800800d .word 0x0800800d
8007fa0: 0800800d .word 0x0800800d
8007fa4: 0800800d .word 0x0800800d
8007fa8: 0800800d .word 0x0800800d
8007fac: 0800800d .word 0x0800800d
8007fb0: 0800800d .word 0x0800800d
8007fb4: 0800800d .word 0x0800800d
8007fb8: 0800800d .word 0x0800800d
8007fbc: 0800800d .word 0x0800800d
8007fc0: 0800800d .word 0x0800800d
8007fc4: 0800800d .word 0x0800800d
8007fc8: 0800800d .word 0x0800800d
8007fcc: 0800800d .word 0x0800800d
8007fd0: 0800800d .word 0x0800800d
8007fd4: 0800800d .word 0x0800800d
8007fd8: 0800800d .word 0x0800800d
8007fdc: 0800800d .word 0x0800800d
8007fe0: 0800800d .word 0x0800800d
8007fe4: 0800800d .word 0x0800800d
8007fe8: 0800800d .word 0x0800800d
8007fec: 0800800d .word 0x0800800d
8007ff0: 0800800d .word 0x0800800d
8007ff4: 0800800d .word 0x0800800d
8007ff8: 0800800d .word 0x0800800d
8007ffc: 0800800d .word 0x0800800d
8008000: 0800800d .word 0x0800800d
8008004: 0800800d .word 0x0800800d
8008008: 0800800d .word 0x0800800d
case CDC_SEND_BREAK:
break;
default:
break;
800800c: bf00 nop
}
return (USBD_OK);
800800e: 2300 movs r3, #0
/* USER CODE END 5 */
}
8008010: 4618 mov r0, r3
8008012: 370c adds r7, #12
8008014: 46bd mov sp, r7
8008016: bc80 pop {r7}
8008018: 4770 bx lr
800801a: bf00 nop
0800801c <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
800801c: b580 push {r7, lr}
800801e: b082 sub sp, #8
8008020: af00 add r7, sp, #0
8008022: 6078 str r0, [r7, #4]
8008024: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
8008026: 683b ldr r3, [r7, #0]
8008028: 681b ldr r3, [r3, #0]
800802a: 2b00 cmp r3, #0
800802c: d005 beq.n 800803a <CDC_Receive_FS+0x1e>
800802e: 683b ldr r3, [r7, #0]
8008030: 681b ldr r3, [r3, #0]
8008032: 4619 mov r1, r3
8008034: 6878 ldr r0, [r7, #4]
8008036: f7ff ff03 bl 8007e40 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
800803a: 6879 ldr r1, [r7, #4]
800803c: 4805 ldr r0, [pc, #20] @ (8008054 <CDC_Receive_FS+0x38>)
800803e: f7fe fdcc bl 8006bda <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
8008042: 4804 ldr r0, [pc, #16] @ (8008054 <CDC_Receive_FS+0x38>)
8008044: f7fe fe0b bl 8006c5e <USBD_CDC_ReceivePacket>
return (USBD_OK);
8008048: 2300 movs r3, #0
/* USER CODE END 6 */
}
800804a: 4618 mov r0, r3
800804c: 3708 adds r7, #8
800804e: 46bd mov sp, r7
8008050: bd80 pop {r7, pc}
8008052: bf00 nop
8008054: 200002cc .word 0x200002cc
08008058 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
8008058: b580 push {r7, lr}
800805a: b084 sub sp, #16
800805c: af00 add r7, sp, #0
800805e: 6078 str r0, [r7, #4]
8008060: 460b mov r3, r1
8008062: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
8008064: 2300 movs r3, #0
8008066: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
8008068: 4b0d ldr r3, [pc, #52] @ (80080a0 <CDC_Transmit_FS+0x48>)
800806a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800806e: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
8008070: 68bb ldr r3, [r7, #8]
8008072: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
8008076: 2b00 cmp r3, #0
8008078: d001 beq.n 800807e <CDC_Transmit_FS+0x26>
return USBD_BUSY;
800807a: 2301 movs r3, #1
800807c: e00b b.n 8008096 <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800807e: 887b ldrh r3, [r7, #2]
8008080: 461a mov r2, r3
8008082: 6879 ldr r1, [r7, #4]
8008084: 4806 ldr r0, [pc, #24] @ (80080a0 <CDC_Transmit_FS+0x48>)
8008086: f7fe fd8f bl 8006ba8 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800808a: 4805 ldr r0, [pc, #20] @ (80080a0 <CDC_Transmit_FS+0x48>)
800808c: f7fe fdb8 bl 8006c00 <USBD_CDC_TransmitPacket>
8008090: 4603 mov r3, r0
8008092: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
8008094: 7bfb ldrb r3, [r7, #15]
}
8008096: 4618 mov r0, r3
8008098: 3710 adds r7, #16
800809a: 46bd mov sp, r7
800809c: bd80 pop {r7, pc}
800809e: bf00 nop
80080a0: 200002cc .word 0x200002cc
080080a4 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80080a4: b480 push {r7}
80080a6: b083 sub sp, #12
80080a8: af00 add r7, sp, #0
80080aa: 4603 mov r3, r0
80080ac: 6039 str r1, [r7, #0]
80080ae: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
80080b0: 683b ldr r3, [r7, #0]
80080b2: 2212 movs r2, #18
80080b4: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
80080b6: 4b03 ldr r3, [pc, #12] @ (80080c4 <USBD_FS_DeviceDescriptor+0x20>)
}
80080b8: 4618 mov r0, r3
80080ba: 370c adds r7, #12
80080bc: 46bd mov sp, r7
80080be: bc80 pop {r7}
80080c0: 4770 bx lr
80080c2: bf00 nop
80080c4: 20000148 .word 0x20000148
080080c8 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80080c8: b480 push {r7}
80080ca: b083 sub sp, #12
80080cc: af00 add r7, sp, #0
80080ce: 4603 mov r3, r0
80080d0: 6039 str r1, [r7, #0]
80080d2: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
80080d4: 683b ldr r3, [r7, #0]
80080d6: 2204 movs r2, #4
80080d8: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
80080da: 4b03 ldr r3, [pc, #12] @ (80080e8 <USBD_FS_LangIDStrDescriptor+0x20>)
}
80080dc: 4618 mov r0, r3
80080de: 370c adds r7, #12
80080e0: 46bd mov sp, r7
80080e2: bc80 pop {r7}
80080e4: 4770 bx lr
80080e6: bf00 nop
80080e8: 2000015c .word 0x2000015c
080080ec <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80080ec: b580 push {r7, lr}
80080ee: b082 sub sp, #8
80080f0: af00 add r7, sp, #0
80080f2: 4603 mov r3, r0
80080f4: 6039 str r1, [r7, #0]
80080f6: 71fb strb r3, [r7, #7]
if(speed == 0)
80080f8: 79fb ldrb r3, [r7, #7]
80080fa: 2b00 cmp r3, #0
80080fc: d105 bne.n 800810a <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
80080fe: 683a ldr r2, [r7, #0]
8008100: 4907 ldr r1, [pc, #28] @ (8008120 <USBD_FS_ProductStrDescriptor+0x34>)
8008102: 4808 ldr r0, [pc, #32] @ (8008124 <USBD_FS_ProductStrDescriptor+0x38>)
8008104: f7ff fd8f bl 8007c26 <USBD_GetString>
8008108: e004 b.n 8008114 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800810a: 683a ldr r2, [r7, #0]
800810c: 4904 ldr r1, [pc, #16] @ (8008120 <USBD_FS_ProductStrDescriptor+0x34>)
800810e: 4805 ldr r0, [pc, #20] @ (8008124 <USBD_FS_ProductStrDescriptor+0x38>)
8008110: f7ff fd89 bl 8007c26 <USBD_GetString>
}
return USBD_StrDesc;
8008114: 4b02 ldr r3, [pc, #8] @ (8008120 <USBD_FS_ProductStrDescriptor+0x34>)
}
8008116: 4618 mov r0, r3
8008118: 3708 adds r7, #8
800811a: 46bd mov sp, r7
800811c: bd80 pop {r7, pc}
800811e: bf00 nop
8008120: 20000e94 .word 0x20000e94
8008124: 0800919c .word 0x0800919c
08008128 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008128: b580 push {r7, lr}
800812a: b082 sub sp, #8
800812c: af00 add r7, sp, #0
800812e: 4603 mov r3, r0
8008130: 6039 str r1, [r7, #0]
8008132: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
8008134: 683a ldr r2, [r7, #0]
8008136: 4904 ldr r1, [pc, #16] @ (8008148 <USBD_FS_ManufacturerStrDescriptor+0x20>)
8008138: 4804 ldr r0, [pc, #16] @ (800814c <USBD_FS_ManufacturerStrDescriptor+0x24>)
800813a: f7ff fd74 bl 8007c26 <USBD_GetString>
return USBD_StrDesc;
800813e: 4b02 ldr r3, [pc, #8] @ (8008148 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
8008140: 4618 mov r0, r3
8008142: 3708 adds r7, #8
8008144: 46bd mov sp, r7
8008146: bd80 pop {r7, pc}
8008148: 20000e94 .word 0x20000e94
800814c: 080091b4 .word 0x080091b4
08008150 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008150: b580 push {r7, lr}
8008152: b082 sub sp, #8
8008154: af00 add r7, sp, #0
8008156: 4603 mov r3, r0
8008158: 6039 str r1, [r7, #0]
800815a: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800815c: 683b ldr r3, [r7, #0]
800815e: 221a movs r2, #26
8008160: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
8008162: f000 f843 bl 80081ec <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
8008166: 4b02 ldr r3, [pc, #8] @ (8008170 <USBD_FS_SerialStrDescriptor+0x20>)
}
8008168: 4618 mov r0, r3
800816a: 3708 adds r7, #8
800816c: 46bd mov sp, r7
800816e: bd80 pop {r7, pc}
8008170: 20000160 .word 0x20000160
08008174 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
8008174: b580 push {r7, lr}
8008176: b082 sub sp, #8
8008178: af00 add r7, sp, #0
800817a: 4603 mov r3, r0
800817c: 6039 str r1, [r7, #0]
800817e: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
8008180: 79fb ldrb r3, [r7, #7]
8008182: 2b00 cmp r3, #0
8008184: d105 bne.n 8008192 <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
8008186: 683a ldr r2, [r7, #0]
8008188: 4907 ldr r1, [pc, #28] @ (80081a8 <USBD_FS_ConfigStrDescriptor+0x34>)
800818a: 4808 ldr r0, [pc, #32] @ (80081ac <USBD_FS_ConfigStrDescriptor+0x38>)
800818c: f7ff fd4b bl 8007c26 <USBD_GetString>
8008190: e004 b.n 800819c <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
8008192: 683a ldr r2, [r7, #0]
8008194: 4904 ldr r1, [pc, #16] @ (80081a8 <USBD_FS_ConfigStrDescriptor+0x34>)
8008196: 4805 ldr r0, [pc, #20] @ (80081ac <USBD_FS_ConfigStrDescriptor+0x38>)
8008198: f7ff fd45 bl 8007c26 <USBD_GetString>
}
return USBD_StrDesc;
800819c: 4b02 ldr r3, [pc, #8] @ (80081a8 <USBD_FS_ConfigStrDescriptor+0x34>)
}
800819e: 4618 mov r0, r3
80081a0: 3708 adds r7, #8
80081a2: 46bd mov sp, r7
80081a4: bd80 pop {r7, pc}
80081a6: bf00 nop
80081a8: 20000e94 .word 0x20000e94
80081ac: 080091c8 .word 0x080091c8
080081b0 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
80081b0: b580 push {r7, lr}
80081b2: b082 sub sp, #8
80081b4: af00 add r7, sp, #0
80081b6: 4603 mov r3, r0
80081b8: 6039 str r1, [r7, #0]
80081ba: 71fb strb r3, [r7, #7]
if(speed == 0)
80081bc: 79fb ldrb r3, [r7, #7]
80081be: 2b00 cmp r3, #0
80081c0: d105 bne.n 80081ce <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
80081c2: 683a ldr r2, [r7, #0]
80081c4: 4907 ldr r1, [pc, #28] @ (80081e4 <USBD_FS_InterfaceStrDescriptor+0x34>)
80081c6: 4808 ldr r0, [pc, #32] @ (80081e8 <USBD_FS_InterfaceStrDescriptor+0x38>)
80081c8: f7ff fd2d bl 8007c26 <USBD_GetString>
80081cc: e004 b.n 80081d8 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
80081ce: 683a ldr r2, [r7, #0]
80081d0: 4904 ldr r1, [pc, #16] @ (80081e4 <USBD_FS_InterfaceStrDescriptor+0x34>)
80081d2: 4805 ldr r0, [pc, #20] @ (80081e8 <USBD_FS_InterfaceStrDescriptor+0x38>)
80081d4: f7ff fd27 bl 8007c26 <USBD_GetString>
}
return USBD_StrDesc;
80081d8: 4b02 ldr r3, [pc, #8] @ (80081e4 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
80081da: 4618 mov r0, r3
80081dc: 3708 adds r7, #8
80081de: 46bd mov sp, r7
80081e0: bd80 pop {r7, pc}
80081e2: bf00 nop
80081e4: 20000e94 .word 0x20000e94
80081e8: 080091d4 .word 0x080091d4
080081ec <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
80081ec: b580 push {r7, lr}
80081ee: b084 sub sp, #16
80081f0: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
80081f2: 4b0f ldr r3, [pc, #60] @ (8008230 <Get_SerialNum+0x44>)
80081f4: 681b ldr r3, [r3, #0]
80081f6: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
80081f8: 4b0e ldr r3, [pc, #56] @ (8008234 <Get_SerialNum+0x48>)
80081fa: 681b ldr r3, [r3, #0]
80081fc: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
80081fe: 4b0e ldr r3, [pc, #56] @ (8008238 <Get_SerialNum+0x4c>)
8008200: 681b ldr r3, [r3, #0]
8008202: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
8008204: 68fa ldr r2, [r7, #12]
8008206: 687b ldr r3, [r7, #4]
8008208: 4413 add r3, r2
800820a: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800820c: 68fb ldr r3, [r7, #12]
800820e: 2b00 cmp r3, #0
8008210: d009 beq.n 8008226 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
8008212: 2208 movs r2, #8
8008214: 4909 ldr r1, [pc, #36] @ (800823c <Get_SerialNum+0x50>)
8008216: 68f8 ldr r0, [r7, #12]
8008218: f000 f814 bl 8008244 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800821c: 2204 movs r2, #4
800821e: 4908 ldr r1, [pc, #32] @ (8008240 <Get_SerialNum+0x54>)
8008220: 68b8 ldr r0, [r7, #8]
8008222: f000 f80f bl 8008244 <IntToUnicode>
}
}
8008226: bf00 nop
8008228: 3710 adds r7, #16
800822a: 46bd mov sp, r7
800822c: bd80 pop {r7, pc}
800822e: bf00 nop
8008230: 1ffff7e8 .word 0x1ffff7e8
8008234: 1ffff7ec .word 0x1ffff7ec
8008238: 1ffff7f0 .word 0x1ffff7f0
800823c: 20000162 .word 0x20000162
8008240: 20000172 .word 0x20000172
08008244 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
8008244: b480 push {r7}
8008246: b087 sub sp, #28
8008248: af00 add r7, sp, #0
800824a: 60f8 str r0, [r7, #12]
800824c: 60b9 str r1, [r7, #8]
800824e: 4613 mov r3, r2
8008250: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
8008252: 2300 movs r3, #0
8008254: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
8008256: 2300 movs r3, #0
8008258: 75fb strb r3, [r7, #23]
800825a: e027 b.n 80082ac <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800825c: 68fb ldr r3, [r7, #12]
800825e: 0f1b lsrs r3, r3, #28
8008260: 2b09 cmp r3, #9
8008262: d80b bhi.n 800827c <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
8008264: 68fb ldr r3, [r7, #12]
8008266: 0f1b lsrs r3, r3, #28
8008268: b2da uxtb r2, r3
800826a: 7dfb ldrb r3, [r7, #23]
800826c: 005b lsls r3, r3, #1
800826e: 4619 mov r1, r3
8008270: 68bb ldr r3, [r7, #8]
8008272: 440b add r3, r1
8008274: 3230 adds r2, #48 @ 0x30
8008276: b2d2 uxtb r2, r2
8008278: 701a strb r2, [r3, #0]
800827a: e00a b.n 8008292 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800827c: 68fb ldr r3, [r7, #12]
800827e: 0f1b lsrs r3, r3, #28
8008280: b2da uxtb r2, r3
8008282: 7dfb ldrb r3, [r7, #23]
8008284: 005b lsls r3, r3, #1
8008286: 4619 mov r1, r3
8008288: 68bb ldr r3, [r7, #8]
800828a: 440b add r3, r1
800828c: 3237 adds r2, #55 @ 0x37
800828e: b2d2 uxtb r2, r2
8008290: 701a strb r2, [r3, #0]
}
value = value << 4;
8008292: 68fb ldr r3, [r7, #12]
8008294: 011b lsls r3, r3, #4
8008296: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
8008298: 7dfb ldrb r3, [r7, #23]
800829a: 005b lsls r3, r3, #1
800829c: 3301 adds r3, #1
800829e: 68ba ldr r2, [r7, #8]
80082a0: 4413 add r3, r2
80082a2: 2200 movs r2, #0
80082a4: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
80082a6: 7dfb ldrb r3, [r7, #23]
80082a8: 3301 adds r3, #1
80082aa: 75fb strb r3, [r7, #23]
80082ac: 7dfa ldrb r2, [r7, #23]
80082ae: 79fb ldrb r3, [r7, #7]
80082b0: 429a cmp r2, r3
80082b2: d3d3 bcc.n 800825c <IntToUnicode+0x18>
}
}
80082b4: bf00 nop
80082b6: bf00 nop
80082b8: 371c adds r7, #28
80082ba: 46bd mov sp, r7
80082bc: bc80 pop {r7}
80082be: 4770 bx lr
080082c0 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
80082c0: b580 push {r7, lr}
80082c2: b084 sub sp, #16
80082c4: af00 add r7, sp, #0
80082c6: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
80082c8: 687b ldr r3, [r7, #4]
80082ca: 681b ldr r3, [r3, #0]
80082cc: 4a0d ldr r2, [pc, #52] @ (8008304 <HAL_PCD_MspInit+0x44>)
80082ce: 4293 cmp r3, r2
80082d0: d113 bne.n 80082fa <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
80082d2: 4b0d ldr r3, [pc, #52] @ (8008308 <HAL_PCD_MspInit+0x48>)
80082d4: 69db ldr r3, [r3, #28]
80082d6: 4a0c ldr r2, [pc, #48] @ (8008308 <HAL_PCD_MspInit+0x48>)
80082d8: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
80082dc: 61d3 str r3, [r2, #28]
80082de: 4b0a ldr r3, [pc, #40] @ (8008308 <HAL_PCD_MspInit+0x48>)
80082e0: 69db ldr r3, [r3, #28]
80082e2: f403 0300 and.w r3, r3, #8388608 @ 0x800000
80082e6: 60fb str r3, [r7, #12]
80082e8: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
80082ea: 2200 movs r2, #0
80082ec: 2100 movs r1, #0
80082ee: 2014 movs r0, #20
80082f0: f7f8 fce3 bl 8000cba <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
80082f4: 2014 movs r0, #20
80082f6: f7f8 fcfc bl 8000cf2 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
80082fa: bf00 nop
80082fc: 3710 adds r7, #16
80082fe: 46bd mov sp, r7
8008300: bd80 pop {r7, pc}
8008302: bf00 nop
8008304: 40005c00 .word 0x40005c00
8008308: 40021000 .word 0x40021000
0800830c <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800830c: b580 push {r7, lr}
800830e: b082 sub sp, #8
8008310: af00 add r7, sp, #0
8008312: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
8008314: 687b ldr r3, [r7, #4]
8008316: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800831a: 687b ldr r3, [r7, #4]
800831c: f503 7326 add.w r3, r3, #664 @ 0x298
8008320: 4619 mov r1, r3
8008322: 4610 mov r0, r2
8008324: f7fe fd51 bl 8006dca <USBD_LL_SetupStage>
}
8008328: bf00 nop
800832a: 3708 adds r7, #8
800832c: 46bd mov sp, r7
800832e: bd80 pop {r7, pc}
08008330 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008330: b580 push {r7, lr}
8008332: b082 sub sp, #8
8008334: af00 add r7, sp, #0
8008336: 6078 str r0, [r7, #4]
8008338: 460b mov r3, r1
800833a: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800833c: 687b ldr r3, [r7, #4]
800833e: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
8008342: 78fa ldrb r2, [r7, #3]
8008344: 6879 ldr r1, [r7, #4]
8008346: 4613 mov r3, r2
8008348: 009b lsls r3, r3, #2
800834a: 4413 add r3, r2
800834c: 00db lsls r3, r3, #3
800834e: 440b add r3, r1
8008350: f503 73b2 add.w r3, r3, #356 @ 0x164
8008354: 681a ldr r2, [r3, #0]
8008356: 78fb ldrb r3, [r7, #3]
8008358: 4619 mov r1, r3
800835a: f7fe fd83 bl 8006e64 <USBD_LL_DataOutStage>
}
800835e: bf00 nop
8008360: 3708 adds r7, #8
8008362: 46bd mov sp, r7
8008364: bd80 pop {r7, pc}
08008366 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008366: b580 push {r7, lr}
8008368: b082 sub sp, #8
800836a: af00 add r7, sp, #0
800836c: 6078 str r0, [r7, #4]
800836e: 460b mov r3, r1
8008370: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
8008372: 687b ldr r3, [r7, #4]
8008374: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
8008378: 78fa ldrb r2, [r7, #3]
800837a: 6879 ldr r1, [r7, #4]
800837c: 4613 mov r3, r2
800837e: 009b lsls r3, r3, #2
8008380: 4413 add r3, r2
8008382: 00db lsls r3, r3, #3
8008384: 440b add r3, r1
8008386: 3324 adds r3, #36 @ 0x24
8008388: 681a ldr r2, [r3, #0]
800838a: 78fb ldrb r3, [r7, #3]
800838c: 4619 mov r1, r3
800838e: f7fe fdda bl 8006f46 <USBD_LL_DataInStage>
}
8008392: bf00 nop
8008394: 3708 adds r7, #8
8008396: 46bd mov sp, r7
8008398: bd80 pop {r7, pc}
0800839a <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800839a: b580 push {r7, lr}
800839c: b082 sub sp, #8
800839e: af00 add r7, sp, #0
80083a0: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
80083a2: 687b ldr r3, [r7, #4]
80083a4: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
80083a8: 4618 mov r0, r3
80083aa: f7fe feea bl 8007182 <USBD_LL_SOF>
}
80083ae: bf00 nop
80083b0: 3708 adds r7, #8
80083b2: 46bd mov sp, r7
80083b4: bd80 pop {r7, pc}
080083b6 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80083b6: b580 push {r7, lr}
80083b8: b084 sub sp, #16
80083ba: af00 add r7, sp, #0
80083bc: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
80083be: 2301 movs r3, #1
80083c0: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
80083c2: 687b ldr r3, [r7, #4]
80083c4: 799b ldrb r3, [r3, #6]
80083c6: 2b02 cmp r3, #2
80083c8: d001 beq.n 80083ce <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
80083ca: f7f8 f9a1 bl 8000710 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
80083ce: 687b ldr r3, [r7, #4]
80083d0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
80083d4: 7bfa ldrb r2, [r7, #15]
80083d6: 4611 mov r1, r2
80083d8: 4618 mov r0, r3
80083da: f7fe fe9a bl 8007112 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
80083de: 687b ldr r3, [r7, #4]
80083e0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
80083e4: 4618 mov r0, r3
80083e6: f7fe fe53 bl 8007090 <USBD_LL_Reset>
}
80083ea: bf00 nop
80083ec: 3710 adds r7, #16
80083ee: 46bd mov sp, r7
80083f0: bd80 pop {r7, pc}
...
080083f4 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80083f4: b580 push {r7, lr}
80083f6: b082 sub sp, #8
80083f8: af00 add r7, sp, #0
80083fa: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
80083fc: 687b ldr r3, [r7, #4]
80083fe: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008402: 4618 mov r0, r3
8008404: f7fe fe94 bl 8007130 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
8008408: 687b ldr r3, [r7, #4]
800840a: 7a9b ldrb r3, [r3, #10]
800840c: 2b00 cmp r3, #0
800840e: d005 beq.n 800841c <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
8008410: 4b04 ldr r3, [pc, #16] @ (8008424 <HAL_PCD_SuspendCallback+0x30>)
8008412: 691b ldr r3, [r3, #16]
8008414: 4a03 ldr r2, [pc, #12] @ (8008424 <HAL_PCD_SuspendCallback+0x30>)
8008416: f043 0306 orr.w r3, r3, #6
800841a: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800841c: bf00 nop
800841e: 3708 adds r7, #8
8008420: 46bd mov sp, r7
8008422: bd80 pop {r7, pc}
8008424: e000ed00 .word 0xe000ed00
08008428 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
8008428: b580 push {r7, lr}
800842a: b082 sub sp, #8
800842c: af00 add r7, sp, #0
800842e: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
8008430: 687b ldr r3, [r7, #4]
8008432: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
8008436: 4618 mov r0, r3
8008438: f7fe fe8e bl 8007158 <USBD_LL_Resume>
}
800843c: bf00 nop
800843e: 3708 adds r7, #8
8008440: 46bd mov sp, r7
8008442: bd80 pop {r7, pc}
08008444 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
8008444: b580 push {r7, lr}
8008446: b082 sub sp, #8
8008448: af00 add r7, sp, #0
800844a: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800844c: 4a28 ldr r2, [pc, #160] @ (80084f0 <USBD_LL_Init+0xac>)
800844e: 687b ldr r3, [r7, #4]
8008450: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
8008454: 687b ldr r3, [r7, #4]
8008456: 4a26 ldr r2, [pc, #152] @ (80084f0 <USBD_LL_Init+0xac>)
8008458: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800845c: 4b24 ldr r3, [pc, #144] @ (80084f0 <USBD_LL_Init+0xac>)
800845e: 4a25 ldr r2, [pc, #148] @ (80084f4 <USBD_LL_Init+0xb0>)
8008460: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
8008462: 4b23 ldr r3, [pc, #140] @ (80084f0 <USBD_LL_Init+0xac>)
8008464: 2208 movs r2, #8
8008466: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
8008468: 4b21 ldr r3, [pc, #132] @ (80084f0 <USBD_LL_Init+0xac>)
800846a: 2202 movs r2, #2
800846c: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800846e: 4b20 ldr r3, [pc, #128] @ (80084f0 <USBD_LL_Init+0xac>)
8008470: 2200 movs r2, #0
8008472: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
8008474: 4b1e ldr r3, [pc, #120] @ (80084f0 <USBD_LL_Init+0xac>)
8008476: 2200 movs r2, #0
8008478: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800847a: 4b1d ldr r3, [pc, #116] @ (80084f0 <USBD_LL_Init+0xac>)
800847c: 2200 movs r2, #0
800847e: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
8008480: 481b ldr r0, [pc, #108] @ (80084f0 <USBD_LL_Init+0xac>)
8008482: f7f8 fdd5 bl 8001030 <HAL_PCD_Init>
8008486: 4603 mov r3, r0
8008488: 2b00 cmp r3, #0
800848a: d001 beq.n 8008490 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800848c: f7f8 f940 bl 8000710 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
8008490: 687b ldr r3, [r7, #4]
8008492: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008496: 2318 movs r3, #24
8008498: 2200 movs r2, #0
800849a: 2100 movs r1, #0
800849c: f7fa fae6 bl 8002a6c <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
80084a0: 687b ldr r3, [r7, #4]
80084a2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
80084a6: 2358 movs r3, #88 @ 0x58
80084a8: 2200 movs r2, #0
80084aa: 2180 movs r1, #128 @ 0x80
80084ac: f7fa fade bl 8002a6c <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
80084b0: 687b ldr r3, [r7, #4]
80084b2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
80084b6: 23c0 movs r3, #192 @ 0xc0
80084b8: 2200 movs r2, #0
80084ba: 2181 movs r1, #129 @ 0x81
80084bc: f7fa fad6 bl 8002a6c <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
80084c0: 687b ldr r3, [r7, #4]
80084c2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
80084c6: f44f 7388 mov.w r3, #272 @ 0x110
80084ca: 2200 movs r2, #0
80084cc: 2101 movs r1, #1
80084ce: f7fa facd bl 8002a6c <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
80084d2: 687b ldr r3, [r7, #4]
80084d4: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
80084d8: f44f 7380 mov.w r3, #256 @ 0x100
80084dc: 2200 movs r2, #0
80084de: 2182 movs r1, #130 @ 0x82
80084e0: f7fa fac4 bl 8002a6c <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
80084e4: 2300 movs r3, #0
}
80084e6: 4618 mov r0, r3
80084e8: 3708 adds r7, #8
80084ea: 46bd mov sp, r7
80084ec: bd80 pop {r7, pc}
80084ee: bf00 nop
80084f0: 20001094 .word 0x20001094
80084f4: 40005c00 .word 0x40005c00
080084f8 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
80084f8: b580 push {r7, lr}
80084fa: b084 sub sp, #16
80084fc: af00 add r7, sp, #0
80084fe: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
8008500: 2300 movs r3, #0
8008502: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008504: 2300 movs r3, #0
8008506: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
8008508: 687b ldr r3, [r7, #4]
800850a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800850e: 4618 mov r0, r3
8008510: f7f8 fe84 bl 800121c <HAL_PCD_Start>
8008514: 4603 mov r3, r0
8008516: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008518: 7bfb ldrb r3, [r7, #15]
800851a: 4618 mov r0, r3
800851c: f000 f94e bl 80087bc <USBD_Get_USB_Status>
8008520: 4603 mov r3, r0
8008522: 73bb strb r3, [r7, #14]
return usb_status;
8008524: 7bbb ldrb r3, [r7, #14]
}
8008526: 4618 mov r0, r3
8008528: 3710 adds r7, #16
800852a: 46bd mov sp, r7
800852c: bd80 pop {r7, pc}
0800852e <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800852e: b580 push {r7, lr}
8008530: b084 sub sp, #16
8008532: af00 add r7, sp, #0
8008534: 6078 str r0, [r7, #4]
8008536: 4608 mov r0, r1
8008538: 4611 mov r1, r2
800853a: 461a mov r2, r3
800853c: 4603 mov r3, r0
800853e: 70fb strb r3, [r7, #3]
8008540: 460b mov r3, r1
8008542: 70bb strb r3, [r7, #2]
8008544: 4613 mov r3, r2
8008546: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
8008548: 2300 movs r3, #0
800854a: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800854c: 2300 movs r3, #0
800854e: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
8008550: 687b ldr r3, [r7, #4]
8008552: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008556: 78bb ldrb r3, [r7, #2]
8008558: 883a ldrh r2, [r7, #0]
800855a: 78f9 ldrb r1, [r7, #3]
800855c: f7f8 ffd8 bl 8001510 <HAL_PCD_EP_Open>
8008560: 4603 mov r3, r0
8008562: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
8008564: 7bfb ldrb r3, [r7, #15]
8008566: 4618 mov r0, r3
8008568: f000 f928 bl 80087bc <USBD_Get_USB_Status>
800856c: 4603 mov r3, r0
800856e: 73bb strb r3, [r7, #14]
return usb_status;
8008570: 7bbb ldrb r3, [r7, #14]
}
8008572: 4618 mov r0, r3
8008574: 3710 adds r7, #16
8008576: 46bd mov sp, r7
8008578: bd80 pop {r7, pc}
0800857a <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800857a: b580 push {r7, lr}
800857c: b084 sub sp, #16
800857e: af00 add r7, sp, #0
8008580: 6078 str r0, [r7, #4]
8008582: 460b mov r3, r1
8008584: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008586: 2300 movs r3, #0
8008588: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800858a: 2300 movs r3, #0
800858c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800858e: 687b ldr r3, [r7, #4]
8008590: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008594: 78fa ldrb r2, [r7, #3]
8008596: 4611 mov r1, r2
8008598: 4618 mov r0, r3
800859a: f7f9 f816 bl 80015ca <HAL_PCD_EP_Close>
800859e: 4603 mov r3, r0
80085a0: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
80085a2: 7bfb ldrb r3, [r7, #15]
80085a4: 4618 mov r0, r3
80085a6: f000 f909 bl 80087bc <USBD_Get_USB_Status>
80085aa: 4603 mov r3, r0
80085ac: 73bb strb r3, [r7, #14]
return usb_status;
80085ae: 7bbb ldrb r3, [r7, #14]
}
80085b0: 4618 mov r0, r3
80085b2: 3710 adds r7, #16
80085b4: 46bd mov sp, r7
80085b6: bd80 pop {r7, pc}
080085b8 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
80085b8: b580 push {r7, lr}
80085ba: b084 sub sp, #16
80085bc: af00 add r7, sp, #0
80085be: 6078 str r0, [r7, #4]
80085c0: 460b mov r3, r1
80085c2: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
80085c4: 2300 movs r3, #0
80085c6: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
80085c8: 2300 movs r3, #0
80085ca: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
80085cc: 687b ldr r3, [r7, #4]
80085ce: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
80085d2: 78fa ldrb r2, [r7, #3]
80085d4: 4611 mov r1, r2
80085d6: 4618 mov r0, r3
80085d8: f7f9 f8be bl 8001758 <HAL_PCD_EP_SetStall>
80085dc: 4603 mov r3, r0
80085de: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
80085e0: 7bfb ldrb r3, [r7, #15]
80085e2: 4618 mov r0, r3
80085e4: f000 f8ea bl 80087bc <USBD_Get_USB_Status>
80085e8: 4603 mov r3, r0
80085ea: 73bb strb r3, [r7, #14]
return usb_status;
80085ec: 7bbb ldrb r3, [r7, #14]
}
80085ee: 4618 mov r0, r3
80085f0: 3710 adds r7, #16
80085f2: 46bd mov sp, r7
80085f4: bd80 pop {r7, pc}
080085f6 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
80085f6: b580 push {r7, lr}
80085f8: b084 sub sp, #16
80085fa: af00 add r7, sp, #0
80085fc: 6078 str r0, [r7, #4]
80085fe: 460b mov r3, r1
8008600: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008602: 2300 movs r3, #0
8008604: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
8008606: 2300 movs r3, #0
8008608: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800860a: 687b ldr r3, [r7, #4]
800860c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008610: 78fa ldrb r2, [r7, #3]
8008612: 4611 mov r1, r2
8008614: 4618 mov r0, r3
8008616: f7f9 f8ff bl 8001818 <HAL_PCD_EP_ClrStall>
800861a: 4603 mov r3, r0
800861c: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800861e: 7bfb ldrb r3, [r7, #15]
8008620: 4618 mov r0, r3
8008622: f000 f8cb bl 80087bc <USBD_Get_USB_Status>
8008626: 4603 mov r3, r0
8008628: 73bb strb r3, [r7, #14]
return usb_status;
800862a: 7bbb ldrb r3, [r7, #14]
}
800862c: 4618 mov r0, r3
800862e: 3710 adds r7, #16
8008630: 46bd mov sp, r7
8008632: bd80 pop {r7, pc}
08008634 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008634: b480 push {r7}
8008636: b085 sub sp, #20
8008638: af00 add r7, sp, #0
800863a: 6078 str r0, [r7, #4]
800863c: 460b mov r3, r1
800863e: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
8008640: 687b ldr r3, [r7, #4]
8008642: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008646: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
8008648: f997 3003 ldrsb.w r3, [r7, #3]
800864c: 2b00 cmp r3, #0
800864e: da0b bge.n 8008668 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
8008650: 78fb ldrb r3, [r7, #3]
8008652: f003 027f and.w r2, r3, #127 @ 0x7f
8008656: 68f9 ldr r1, [r7, #12]
8008658: 4613 mov r3, r2
800865a: 009b lsls r3, r3, #2
800865c: 4413 add r3, r2
800865e: 00db lsls r3, r3, #3
8008660: 440b add r3, r1
8008662: 3312 adds r3, #18
8008664: 781b ldrb r3, [r3, #0]
8008666: e00b b.n 8008680 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
8008668: 78fb ldrb r3, [r7, #3]
800866a: f003 027f and.w r2, r3, #127 @ 0x7f
800866e: 68f9 ldr r1, [r7, #12]
8008670: 4613 mov r3, r2
8008672: 009b lsls r3, r3, #2
8008674: 4413 add r3, r2
8008676: 00db lsls r3, r3, #3
8008678: 440b add r3, r1
800867a: f503 73a9 add.w r3, r3, #338 @ 0x152
800867e: 781b ldrb r3, [r3, #0]
}
}
8008680: 4618 mov r0, r3
8008682: 3714 adds r7, #20
8008684: 46bd mov sp, r7
8008686: bc80 pop {r7}
8008688: 4770 bx lr
0800868a <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800868a: b580 push {r7, lr}
800868c: b084 sub sp, #16
800868e: af00 add r7, sp, #0
8008690: 6078 str r0, [r7, #4]
8008692: 460b mov r3, r1
8008694: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
8008696: 2300 movs r3, #0
8008698: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800869a: 2300 movs r3, #0
800869c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800869e: 687b ldr r3, [r7, #4]
80086a0: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
80086a4: 78fa ldrb r2, [r7, #3]
80086a6: 4611 mov r1, r2
80086a8: 4618 mov r0, r3
80086aa: f7f8 ff0d bl 80014c8 <HAL_PCD_SetAddress>
80086ae: 4603 mov r3, r0
80086b0: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
80086b2: 7bfb ldrb r3, [r7, #15]
80086b4: 4618 mov r0, r3
80086b6: f000 f881 bl 80087bc <USBD_Get_USB_Status>
80086ba: 4603 mov r3, r0
80086bc: 73bb strb r3, [r7, #14]
return usb_status;
80086be: 7bbb ldrb r3, [r7, #14]
}
80086c0: 4618 mov r0, r3
80086c2: 3710 adds r7, #16
80086c4: 46bd mov sp, r7
80086c6: bd80 pop {r7, pc}
080086c8 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
80086c8: b580 push {r7, lr}
80086ca: b086 sub sp, #24
80086cc: af00 add r7, sp, #0
80086ce: 60f8 str r0, [r7, #12]
80086d0: 607a str r2, [r7, #4]
80086d2: 461a mov r2, r3
80086d4: 460b mov r3, r1
80086d6: 72fb strb r3, [r7, #11]
80086d8: 4613 mov r3, r2
80086da: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
80086dc: 2300 movs r3, #0
80086de: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
80086e0: 2300 movs r3, #0
80086e2: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
80086e4: 68fb ldr r3, [r7, #12]
80086e6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
80086ea: 893b ldrh r3, [r7, #8]
80086ec: 7af9 ldrb r1, [r7, #11]
80086ee: 687a ldr r2, [r7, #4]
80086f0: f7f8 fffb bl 80016ea <HAL_PCD_EP_Transmit>
80086f4: 4603 mov r3, r0
80086f6: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
80086f8: 7dfb ldrb r3, [r7, #23]
80086fa: 4618 mov r0, r3
80086fc: f000 f85e bl 80087bc <USBD_Get_USB_Status>
8008700: 4603 mov r3, r0
8008702: 75bb strb r3, [r7, #22]
return usb_status;
8008704: 7dbb ldrb r3, [r7, #22]
}
8008706: 4618 mov r0, r3
8008708: 3718 adds r7, #24
800870a: 46bd mov sp, r7
800870c: bd80 pop {r7, pc}
0800870e <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800870e: b580 push {r7, lr}
8008710: b086 sub sp, #24
8008712: af00 add r7, sp, #0
8008714: 60f8 str r0, [r7, #12]
8008716: 607a str r2, [r7, #4]
8008718: 461a mov r2, r3
800871a: 460b mov r3, r1
800871c: 72fb strb r3, [r7, #11]
800871e: 4613 mov r3, r2
8008720: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
8008722: 2300 movs r3, #0
8008724: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
8008726: 2300 movs r3, #0
8008728: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800872a: 68fb ldr r3, [r7, #12]
800872c: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
8008730: 893b ldrh r3, [r7, #8]
8008732: 7af9 ldrb r1, [r7, #11]
8008734: 687a ldr r2, [r7, #4]
8008736: f7f8 ff90 bl 800165a <HAL_PCD_EP_Receive>
800873a: 4603 mov r3, r0
800873c: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800873e: 7dfb ldrb r3, [r7, #23]
8008740: 4618 mov r0, r3
8008742: f000 f83b bl 80087bc <USBD_Get_USB_Status>
8008746: 4603 mov r3, r0
8008748: 75bb strb r3, [r7, #22]
return usb_status;
800874a: 7dbb ldrb r3, [r7, #22]
}
800874c: 4618 mov r0, r3
800874e: 3718 adds r7, #24
8008750: 46bd mov sp, r7
8008752: bd80 pop {r7, pc}
08008754 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
8008754: b580 push {r7, lr}
8008756: b082 sub sp, #8
8008758: af00 add r7, sp, #0
800875a: 6078 str r0, [r7, #4]
800875c: 460b mov r3, r1
800875e: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
8008760: 687b ldr r3, [r7, #4]
8008762: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
8008766: 78fa ldrb r2, [r7, #3]
8008768: 4611 mov r1, r2
800876a: 4618 mov r0, r3
800876c: f7f8 ffa6 bl 80016bc <HAL_PCD_EP_GetRxCount>
8008770: 4603 mov r3, r0
}
8008772: 4618 mov r0, r3
8008774: 3708 adds r7, #8
8008776: 46bd mov sp, r7
8008778: bd80 pop {r7, pc}
...
0800877c <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800877c: b480 push {r7}
800877e: b083 sub sp, #12
8008780: af00 add r7, sp, #0
8008782: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
8008784: 4b02 ldr r3, [pc, #8] @ (8008790 <USBD_static_malloc+0x14>)
}
8008786: 4618 mov r0, r3
8008788: 370c adds r7, #12
800878a: 46bd mov sp, r7
800878c: bc80 pop {r7}
800878e: 4770 bx lr
8008790: 2000136c .word 0x2000136c
08008794 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
8008794: b480 push {r7}
8008796: b083 sub sp, #12
8008798: af00 add r7, sp, #0
800879a: 6078 str r0, [r7, #4]
}
800879c: bf00 nop
800879e: 370c adds r7, #12
80087a0: 46bd mov sp, r7
80087a2: bc80 pop {r7}
80087a4: 4770 bx lr
080087a6 <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
80087a6: b480 push {r7}
80087a8: b083 sub sp, #12
80087aa: af00 add r7, sp, #0
80087ac: 6078 str r0, [r7, #4]
80087ae: 460b mov r3, r1
80087b0: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
80087b2: bf00 nop
80087b4: 370c adds r7, #12
80087b6: 46bd mov sp, r7
80087b8: bc80 pop {r7}
80087ba: 4770 bx lr
080087bc <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
80087bc: b480 push {r7}
80087be: b085 sub sp, #20
80087c0: af00 add r7, sp, #0
80087c2: 4603 mov r3, r0
80087c4: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
80087c6: 2300 movs r3, #0
80087c8: 73fb strb r3, [r7, #15]
switch (hal_status)
80087ca: 79fb ldrb r3, [r7, #7]
80087cc: 2b03 cmp r3, #3
80087ce: d817 bhi.n 8008800 <USBD_Get_USB_Status+0x44>
80087d0: a201 add r2, pc, #4 @ (adr r2, 80087d8 <USBD_Get_USB_Status+0x1c>)
80087d2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80087d6: bf00 nop
80087d8: 080087e9 .word 0x080087e9
80087dc: 080087ef .word 0x080087ef
80087e0: 080087f5 .word 0x080087f5
80087e4: 080087fb .word 0x080087fb
{
case HAL_OK :
usb_status = USBD_OK;
80087e8: 2300 movs r3, #0
80087ea: 73fb strb r3, [r7, #15]
break;
80087ec: e00b b.n 8008806 <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
80087ee: 2302 movs r3, #2
80087f0: 73fb strb r3, [r7, #15]
break;
80087f2: e008 b.n 8008806 <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
80087f4: 2301 movs r3, #1
80087f6: 73fb strb r3, [r7, #15]
break;
80087f8: e005 b.n 8008806 <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
80087fa: 2302 movs r3, #2
80087fc: 73fb strb r3, [r7, #15]
break;
80087fe: e002 b.n 8008806 <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
8008800: 2302 movs r3, #2
8008802: 73fb strb r3, [r7, #15]
break;
8008804: bf00 nop
}
return usb_status;
8008806: 7bfb ldrb r3, [r7, #15]
}
8008808: 4618 mov r0, r3
800880a: 3714 adds r7, #20
800880c: 46bd mov sp, r7
800880e: bc80 pop {r7}
8008810: 4770 bx lr
8008812: bf00 nop
08008814 <siprintf>:
8008814: b40e push {r1, r2, r3}
8008816: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800881a: b510 push {r4, lr}
800881c: 2400 movs r4, #0
800881e: b09d sub sp, #116 @ 0x74
8008820: ab1f add r3, sp, #124 @ 0x7c
8008822: 9002 str r0, [sp, #8]
8008824: 9006 str r0, [sp, #24]
8008826: 9107 str r1, [sp, #28]
8008828: 9104 str r1, [sp, #16]
800882a: 4809 ldr r0, [pc, #36] @ (8008850 <siprintf+0x3c>)
800882c: 4909 ldr r1, [pc, #36] @ (8008854 <siprintf+0x40>)
800882e: f853 2b04 ldr.w r2, [r3], #4
8008832: 9105 str r1, [sp, #20]
8008834: 6800 ldr r0, [r0, #0]
8008836: a902 add r1, sp, #8
8008838: 9301 str r3, [sp, #4]
800883a: 941b str r4, [sp, #108] @ 0x6c
800883c: f000 f992 bl 8008b64 <_svfiprintf_r>
8008840: 9b02 ldr r3, [sp, #8]
8008842: 701c strb r4, [r3, #0]
8008844: b01d add sp, #116 @ 0x74
8008846: e8bd 4010 ldmia.w sp!, {r4, lr}
800884a: b003 add sp, #12
800884c: 4770 bx lr
800884e: bf00 nop
8008850: 2000017c .word 0x2000017c
8008854: ffff0208 .word 0xffff0208
08008858 <memset>:
8008858: 4603 mov r3, r0
800885a: 4402 add r2, r0
800885c: 4293 cmp r3, r2
800885e: d100 bne.n 8008862 <memset+0xa>
8008860: 4770 bx lr
8008862: f803 1b01 strb.w r1, [r3], #1
8008866: e7f9 b.n 800885c <memset+0x4>
08008868 <__errno>:
8008868: 4b01 ldr r3, [pc, #4] @ (8008870 <__errno+0x8>)
800886a: 6818 ldr r0, [r3, #0]
800886c: 4770 bx lr
800886e: bf00 nop
8008870: 2000017c .word 0x2000017c
08008874 <__libc_init_array>:
8008874: b570 push {r4, r5, r6, lr}
8008876: 2600 movs r6, #0
8008878: 4d0c ldr r5, [pc, #48] @ (80088ac <__libc_init_array+0x38>)
800887a: 4c0d ldr r4, [pc, #52] @ (80088b0 <__libc_init_array+0x3c>)
800887c: 1b64 subs r4, r4, r5
800887e: 10a4 asrs r4, r4, #2
8008880: 42a6 cmp r6, r4
8008882: d109 bne.n 8008898 <__libc_init_array+0x24>
8008884: f000 fc76 bl 8009174 <_init>
8008888: 2600 movs r6, #0
800888a: 4d0a ldr r5, [pc, #40] @ (80088b4 <__libc_init_array+0x40>)
800888c: 4c0a ldr r4, [pc, #40] @ (80088b8 <__libc_init_array+0x44>)
800888e: 1b64 subs r4, r4, r5
8008890: 10a4 asrs r4, r4, #2
8008892: 42a6 cmp r6, r4
8008894: d105 bne.n 80088a2 <__libc_init_array+0x2e>
8008896: bd70 pop {r4, r5, r6, pc}
8008898: f855 3b04 ldr.w r3, [r5], #4
800889c: 4798 blx r3
800889e: 3601 adds r6, #1
80088a0: e7ee b.n 8008880 <__libc_init_array+0xc>
80088a2: f855 3b04 ldr.w r3, [r5], #4
80088a6: 4798 blx r3
80088a8: 3601 adds r6, #1
80088aa: e7f2 b.n 8008892 <__libc_init_array+0x1e>
80088ac: 0800923c .word 0x0800923c
80088b0: 0800923c .word 0x0800923c
80088b4: 0800923c .word 0x0800923c
80088b8: 08009240 .word 0x08009240
080088bc <__retarget_lock_acquire_recursive>:
80088bc: 4770 bx lr
080088be <__retarget_lock_release_recursive>:
80088be: 4770 bx lr
080088c0 <_free_r>:
80088c0: b538 push {r3, r4, r5, lr}
80088c2: 4605 mov r5, r0
80088c4: 2900 cmp r1, #0
80088c6: d040 beq.n 800894a <_free_r+0x8a>
80088c8: f851 3c04 ldr.w r3, [r1, #-4]
80088cc: 1f0c subs r4, r1, #4
80088ce: 2b00 cmp r3, #0
80088d0: bfb8 it lt
80088d2: 18e4 addlt r4, r4, r3
80088d4: f000 f8de bl 8008a94 <__malloc_lock>
80088d8: 4a1c ldr r2, [pc, #112] @ (800894c <_free_r+0x8c>)
80088da: 6813 ldr r3, [r2, #0]
80088dc: b933 cbnz r3, 80088ec <_free_r+0x2c>
80088de: 6063 str r3, [r4, #4]
80088e0: 6014 str r4, [r2, #0]
80088e2: 4628 mov r0, r5
80088e4: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
80088e8: f000 b8da b.w 8008aa0 <__malloc_unlock>
80088ec: 42a3 cmp r3, r4
80088ee: d908 bls.n 8008902 <_free_r+0x42>
80088f0: 6820 ldr r0, [r4, #0]
80088f2: 1821 adds r1, r4, r0
80088f4: 428b cmp r3, r1
80088f6: bf01 itttt eq
80088f8: 6819 ldreq r1, [r3, #0]
80088fa: 685b ldreq r3, [r3, #4]
80088fc: 1809 addeq r1, r1, r0
80088fe: 6021 streq r1, [r4, #0]
8008900: e7ed b.n 80088de <_free_r+0x1e>
8008902: 461a mov r2, r3
8008904: 685b ldr r3, [r3, #4]
8008906: b10b cbz r3, 800890c <_free_r+0x4c>
8008908: 42a3 cmp r3, r4
800890a: d9fa bls.n 8008902 <_free_r+0x42>
800890c: 6811 ldr r1, [r2, #0]
800890e: 1850 adds r0, r2, r1
8008910: 42a0 cmp r0, r4
8008912: d10b bne.n 800892c <_free_r+0x6c>
8008914: 6820 ldr r0, [r4, #0]
8008916: 4401 add r1, r0
8008918: 1850 adds r0, r2, r1
800891a: 4283 cmp r3, r0
800891c: 6011 str r1, [r2, #0]
800891e: d1e0 bne.n 80088e2 <_free_r+0x22>
8008920: 6818 ldr r0, [r3, #0]
8008922: 685b ldr r3, [r3, #4]
8008924: 4408 add r0, r1
8008926: 6010 str r0, [r2, #0]
8008928: 6053 str r3, [r2, #4]
800892a: e7da b.n 80088e2 <_free_r+0x22>
800892c: d902 bls.n 8008934 <_free_r+0x74>
800892e: 230c movs r3, #12
8008930: 602b str r3, [r5, #0]
8008932: e7d6 b.n 80088e2 <_free_r+0x22>
8008934: 6820 ldr r0, [r4, #0]
8008936: 1821 adds r1, r4, r0
8008938: 428b cmp r3, r1
800893a: bf01 itttt eq
800893c: 6819 ldreq r1, [r3, #0]
800893e: 685b ldreq r3, [r3, #4]
8008940: 1809 addeq r1, r1, r0
8008942: 6021 streq r1, [r4, #0]
8008944: 6063 str r3, [r4, #4]
8008946: 6054 str r4, [r2, #4]
8008948: e7cb b.n 80088e2 <_free_r+0x22>
800894a: bd38 pop {r3, r4, r5, pc}
800894c: 200016d0 .word 0x200016d0
08008950 <sbrk_aligned>:
8008950: b570 push {r4, r5, r6, lr}
8008952: 4e0f ldr r6, [pc, #60] @ (8008990 <sbrk_aligned+0x40>)
8008954: 460c mov r4, r1
8008956: 6831 ldr r1, [r6, #0]
8008958: 4605 mov r5, r0
800895a: b911 cbnz r1, 8008962 <sbrk_aligned+0x12>
800895c: f000 fba8 bl 80090b0 <_sbrk_r>
8008960: 6030 str r0, [r6, #0]
8008962: 4621 mov r1, r4
8008964: 4628 mov r0, r5
8008966: f000 fba3 bl 80090b0 <_sbrk_r>
800896a: 1c43 adds r3, r0, #1
800896c: d103 bne.n 8008976 <sbrk_aligned+0x26>
800896e: f04f 34ff mov.w r4, #4294967295
8008972: 4620 mov r0, r4
8008974: bd70 pop {r4, r5, r6, pc}
8008976: 1cc4 adds r4, r0, #3
8008978: f024 0403 bic.w r4, r4, #3
800897c: 42a0 cmp r0, r4
800897e: d0f8 beq.n 8008972 <sbrk_aligned+0x22>
8008980: 1a21 subs r1, r4, r0
8008982: 4628 mov r0, r5
8008984: f000 fb94 bl 80090b0 <_sbrk_r>
8008988: 3001 adds r0, #1
800898a: d1f2 bne.n 8008972 <sbrk_aligned+0x22>
800898c: e7ef b.n 800896e <sbrk_aligned+0x1e>
800898e: bf00 nop
8008990: 200016cc .word 0x200016cc
08008994 <_malloc_r>:
8008994: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
8008998: 1ccd adds r5, r1, #3
800899a: f025 0503 bic.w r5, r5, #3
800899e: 3508 adds r5, #8
80089a0: 2d0c cmp r5, #12
80089a2: bf38 it cc
80089a4: 250c movcc r5, #12
80089a6: 2d00 cmp r5, #0
80089a8: 4606 mov r6, r0
80089aa: db01 blt.n 80089b0 <_malloc_r+0x1c>
80089ac: 42a9 cmp r1, r5
80089ae: d904 bls.n 80089ba <_malloc_r+0x26>
80089b0: 230c movs r3, #12
80089b2: 6033 str r3, [r6, #0]
80089b4: 2000 movs r0, #0
80089b6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
80089ba: f8df 80d4 ldr.w r8, [pc, #212] @ 8008a90 <_malloc_r+0xfc>
80089be: f000 f869 bl 8008a94 <__malloc_lock>
80089c2: f8d8 3000 ldr.w r3, [r8]
80089c6: 461c mov r4, r3
80089c8: bb44 cbnz r4, 8008a1c <_malloc_r+0x88>
80089ca: 4629 mov r1, r5
80089cc: 4630 mov r0, r6
80089ce: f7ff ffbf bl 8008950 <sbrk_aligned>
80089d2: 1c43 adds r3, r0, #1
80089d4: 4604 mov r4, r0
80089d6: d158 bne.n 8008a8a <_malloc_r+0xf6>
80089d8: f8d8 4000 ldr.w r4, [r8]
80089dc: 4627 mov r7, r4
80089de: 2f00 cmp r7, #0
80089e0: d143 bne.n 8008a6a <_malloc_r+0xd6>
80089e2: 2c00 cmp r4, #0
80089e4: d04b beq.n 8008a7e <_malloc_r+0xea>
80089e6: 6823 ldr r3, [r4, #0]
80089e8: 4639 mov r1, r7
80089ea: 4630 mov r0, r6
80089ec: eb04 0903 add.w r9, r4, r3
80089f0: f000 fb5e bl 80090b0 <_sbrk_r>
80089f4: 4581 cmp r9, r0
80089f6: d142 bne.n 8008a7e <_malloc_r+0xea>
80089f8: 6821 ldr r1, [r4, #0]
80089fa: 4630 mov r0, r6
80089fc: 1a6d subs r5, r5, r1
80089fe: 4629 mov r1, r5
8008a00: f7ff ffa6 bl 8008950 <sbrk_aligned>
8008a04: 3001 adds r0, #1
8008a06: d03a beq.n 8008a7e <_malloc_r+0xea>
8008a08: 6823 ldr r3, [r4, #0]
8008a0a: 442b add r3, r5
8008a0c: 6023 str r3, [r4, #0]
8008a0e: f8d8 3000 ldr.w r3, [r8]
8008a12: 685a ldr r2, [r3, #4]
8008a14: bb62 cbnz r2, 8008a70 <_malloc_r+0xdc>
8008a16: f8c8 7000 str.w r7, [r8]
8008a1a: e00f b.n 8008a3c <_malloc_r+0xa8>
8008a1c: 6822 ldr r2, [r4, #0]
8008a1e: 1b52 subs r2, r2, r5
8008a20: d420 bmi.n 8008a64 <_malloc_r+0xd0>
8008a22: 2a0b cmp r2, #11
8008a24: d917 bls.n 8008a56 <_malloc_r+0xc2>
8008a26: 1961 adds r1, r4, r5
8008a28: 42a3 cmp r3, r4
8008a2a: 6025 str r5, [r4, #0]
8008a2c: bf18 it ne
8008a2e: 6059 strne r1, [r3, #4]
8008a30: 6863 ldr r3, [r4, #4]
8008a32: bf08 it eq
8008a34: f8c8 1000 streq.w r1, [r8]
8008a38: 5162 str r2, [r4, r5]
8008a3a: 604b str r3, [r1, #4]
8008a3c: 4630 mov r0, r6
8008a3e: f000 f82f bl 8008aa0 <__malloc_unlock>
8008a42: f104 000b add.w r0, r4, #11
8008a46: 1d23 adds r3, r4, #4
8008a48: f020 0007 bic.w r0, r0, #7
8008a4c: 1ac2 subs r2, r0, r3
8008a4e: bf1c itt ne
8008a50: 1a1b subne r3, r3, r0
8008a52: 50a3 strne r3, [r4, r2]
8008a54: e7af b.n 80089b6 <_malloc_r+0x22>
8008a56: 6862 ldr r2, [r4, #4]
8008a58: 42a3 cmp r3, r4
8008a5a: bf0c ite eq
8008a5c: f8c8 2000 streq.w r2, [r8]
8008a60: 605a strne r2, [r3, #4]
8008a62: e7eb b.n 8008a3c <_malloc_r+0xa8>
8008a64: 4623 mov r3, r4
8008a66: 6864 ldr r4, [r4, #4]
8008a68: e7ae b.n 80089c8 <_malloc_r+0x34>
8008a6a: 463c mov r4, r7
8008a6c: 687f ldr r7, [r7, #4]
8008a6e: e7b6 b.n 80089de <_malloc_r+0x4a>
8008a70: 461a mov r2, r3
8008a72: 685b ldr r3, [r3, #4]
8008a74: 42a3 cmp r3, r4
8008a76: d1fb bne.n 8008a70 <_malloc_r+0xdc>
8008a78: 2300 movs r3, #0
8008a7a: 6053 str r3, [r2, #4]
8008a7c: e7de b.n 8008a3c <_malloc_r+0xa8>
8008a7e: 230c movs r3, #12
8008a80: 4630 mov r0, r6
8008a82: 6033 str r3, [r6, #0]
8008a84: f000 f80c bl 8008aa0 <__malloc_unlock>
8008a88: e794 b.n 80089b4 <_malloc_r+0x20>
8008a8a: 6005 str r5, [r0, #0]
8008a8c: e7d6 b.n 8008a3c <_malloc_r+0xa8>
8008a8e: bf00 nop
8008a90: 200016d0 .word 0x200016d0
08008a94 <__malloc_lock>:
8008a94: 4801 ldr r0, [pc, #4] @ (8008a9c <__malloc_lock+0x8>)
8008a96: f7ff bf11 b.w 80088bc <__retarget_lock_acquire_recursive>
8008a9a: bf00 nop
8008a9c: 200016c8 .word 0x200016c8
08008aa0 <__malloc_unlock>:
8008aa0: 4801 ldr r0, [pc, #4] @ (8008aa8 <__malloc_unlock+0x8>)
8008aa2: f7ff bf0c b.w 80088be <__retarget_lock_release_recursive>
8008aa6: bf00 nop
8008aa8: 200016c8 .word 0x200016c8
08008aac <__ssputs_r>:
8008aac: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
8008ab0: 461f mov r7, r3
8008ab2: 688e ldr r6, [r1, #8]
8008ab4: 4682 mov sl, r0
8008ab6: 42be cmp r6, r7
8008ab8: 460c mov r4, r1
8008aba: 4690 mov r8, r2
8008abc: 680b ldr r3, [r1, #0]
8008abe: d82d bhi.n 8008b1c <__ssputs_r+0x70>
8008ac0: f9b1 200c ldrsh.w r2, [r1, #12]
8008ac4: f412 6f90 tst.w r2, #1152 @ 0x480
8008ac8: d026 beq.n 8008b18 <__ssputs_r+0x6c>
8008aca: 6965 ldr r5, [r4, #20]
8008acc: 6909 ldr r1, [r1, #16]
8008ace: eb05 0545 add.w r5, r5, r5, lsl #1
8008ad2: eba3 0901 sub.w r9, r3, r1
8008ad6: eb05 75d5 add.w r5, r5, r5, lsr #31
8008ada: 1c7b adds r3, r7, #1
8008adc: 444b add r3, r9
8008ade: 106d asrs r5, r5, #1
8008ae0: 429d cmp r5, r3
8008ae2: bf38 it cc
8008ae4: 461d movcc r5, r3
8008ae6: 0553 lsls r3, r2, #21
8008ae8: d527 bpl.n 8008b3a <__ssputs_r+0x8e>
8008aea: 4629 mov r1, r5
8008aec: f7ff ff52 bl 8008994 <_malloc_r>
8008af0: 4606 mov r6, r0
8008af2: b360 cbz r0, 8008b4e <__ssputs_r+0xa2>
8008af4: 464a mov r2, r9
8008af6: 6921 ldr r1, [r4, #16]
8008af8: f000 faf8 bl 80090ec <memcpy>
8008afc: 89a3 ldrh r3, [r4, #12]
8008afe: f423 6390 bic.w r3, r3, #1152 @ 0x480
8008b02: f043 0380 orr.w r3, r3, #128 @ 0x80
8008b06: 81a3 strh r3, [r4, #12]
8008b08: 6126 str r6, [r4, #16]
8008b0a: 444e add r6, r9
8008b0c: 6026 str r6, [r4, #0]
8008b0e: 463e mov r6, r7
8008b10: 6165 str r5, [r4, #20]
8008b12: eba5 0509 sub.w r5, r5, r9
8008b16: 60a5 str r5, [r4, #8]
8008b18: 42be cmp r6, r7
8008b1a: d900 bls.n 8008b1e <__ssputs_r+0x72>
8008b1c: 463e mov r6, r7
8008b1e: 4632 mov r2, r6
8008b20: 4641 mov r1, r8
8008b22: 6820 ldr r0, [r4, #0]
8008b24: f000 faaa bl 800907c <memmove>
8008b28: 2000 movs r0, #0
8008b2a: 68a3 ldr r3, [r4, #8]
8008b2c: 1b9b subs r3, r3, r6
8008b2e: 60a3 str r3, [r4, #8]
8008b30: 6823 ldr r3, [r4, #0]
8008b32: 4433 add r3, r6
8008b34: 6023 str r3, [r4, #0]
8008b36: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8008b3a: 462a mov r2, r5
8008b3c: f000 fae4 bl 8009108 <_realloc_r>
8008b40: 4606 mov r6, r0
8008b42: 2800 cmp r0, #0
8008b44: d1e0 bne.n 8008b08 <__ssputs_r+0x5c>
8008b46: 4650 mov r0, sl
8008b48: 6921 ldr r1, [r4, #16]
8008b4a: f7ff feb9 bl 80088c0 <_free_r>
8008b4e: 230c movs r3, #12
8008b50: f8ca 3000 str.w r3, [sl]
8008b54: 89a3 ldrh r3, [r4, #12]
8008b56: f04f 30ff mov.w r0, #4294967295
8008b5a: f043 0340 orr.w r3, r3, #64 @ 0x40
8008b5e: 81a3 strh r3, [r4, #12]
8008b60: e7e9 b.n 8008b36 <__ssputs_r+0x8a>
...
08008b64 <_svfiprintf_r>:
8008b64: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
8008b68: 4698 mov r8, r3
8008b6a: 898b ldrh r3, [r1, #12]
8008b6c: 4607 mov r7, r0
8008b6e: 061b lsls r3, r3, #24
8008b70: 460d mov r5, r1
8008b72: 4614 mov r4, r2
8008b74: b09d sub sp, #116 @ 0x74
8008b76: d510 bpl.n 8008b9a <_svfiprintf_r+0x36>
8008b78: 690b ldr r3, [r1, #16]
8008b7a: b973 cbnz r3, 8008b9a <_svfiprintf_r+0x36>
8008b7c: 2140 movs r1, #64 @ 0x40
8008b7e: f7ff ff09 bl 8008994 <_malloc_r>
8008b82: 6028 str r0, [r5, #0]
8008b84: 6128 str r0, [r5, #16]
8008b86: b930 cbnz r0, 8008b96 <_svfiprintf_r+0x32>
8008b88: 230c movs r3, #12
8008b8a: 603b str r3, [r7, #0]
8008b8c: f04f 30ff mov.w r0, #4294967295
8008b90: b01d add sp, #116 @ 0x74
8008b92: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
8008b96: 2340 movs r3, #64 @ 0x40
8008b98: 616b str r3, [r5, #20]
8008b9a: 2300 movs r3, #0
8008b9c: 9309 str r3, [sp, #36] @ 0x24
8008b9e: 2320 movs r3, #32
8008ba0: f88d 3029 strb.w r3, [sp, #41] @ 0x29
8008ba4: 2330 movs r3, #48 @ 0x30
8008ba6: f04f 0901 mov.w r9, #1
8008baa: f8cd 800c str.w r8, [sp, #12]
8008bae: f8df 8198 ldr.w r8, [pc, #408] @ 8008d48 <_svfiprintf_r+0x1e4>
8008bb2: f88d 302a strb.w r3, [sp, #42] @ 0x2a
8008bb6: 4623 mov r3, r4
8008bb8: 469a mov sl, r3
8008bba: f813 2b01 ldrb.w r2, [r3], #1
8008bbe: b10a cbz r2, 8008bc4 <_svfiprintf_r+0x60>
8008bc0: 2a25 cmp r2, #37 @ 0x25
8008bc2: d1f9 bne.n 8008bb8 <_svfiprintf_r+0x54>
8008bc4: ebba 0b04 subs.w fp, sl, r4
8008bc8: d00b beq.n 8008be2 <_svfiprintf_r+0x7e>
8008bca: 465b mov r3, fp
8008bcc: 4622 mov r2, r4
8008bce: 4629 mov r1, r5
8008bd0: 4638 mov r0, r7
8008bd2: f7ff ff6b bl 8008aac <__ssputs_r>
8008bd6: 3001 adds r0, #1
8008bd8: f000 80a7 beq.w 8008d2a <_svfiprintf_r+0x1c6>
8008bdc: 9a09 ldr r2, [sp, #36] @ 0x24
8008bde: 445a add r2, fp
8008be0: 9209 str r2, [sp, #36] @ 0x24
8008be2: f89a 3000 ldrb.w r3, [sl]
8008be6: 2b00 cmp r3, #0
8008be8: f000 809f beq.w 8008d2a <_svfiprintf_r+0x1c6>
8008bec: 2300 movs r3, #0
8008bee: f04f 32ff mov.w r2, #4294967295
8008bf2: e9cd 2305 strd r2, r3, [sp, #20]
8008bf6: f10a 0a01 add.w sl, sl, #1
8008bfa: 9304 str r3, [sp, #16]
8008bfc: 9307 str r3, [sp, #28]
8008bfe: f88d 3053 strb.w r3, [sp, #83] @ 0x53
8008c02: 931a str r3, [sp, #104] @ 0x68
8008c04: 4654 mov r4, sl
8008c06: 2205 movs r2, #5
8008c08: f814 1b01 ldrb.w r1, [r4], #1
8008c0c: 484e ldr r0, [pc, #312] @ (8008d48 <_svfiprintf_r+0x1e4>)
8008c0e: f000 fa5f bl 80090d0 <memchr>
8008c12: 9a04 ldr r2, [sp, #16]
8008c14: b9d8 cbnz r0, 8008c4e <_svfiprintf_r+0xea>
8008c16: 06d0 lsls r0, r2, #27
8008c18: bf44 itt mi
8008c1a: 2320 movmi r3, #32
8008c1c: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
8008c20: 0711 lsls r1, r2, #28
8008c22: bf44 itt mi
8008c24: 232b movmi r3, #43 @ 0x2b
8008c26: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
8008c2a: f89a 3000 ldrb.w r3, [sl]
8008c2e: 2b2a cmp r3, #42 @ 0x2a
8008c30: d015 beq.n 8008c5e <_svfiprintf_r+0xfa>
8008c32: 4654 mov r4, sl
8008c34: 2000 movs r0, #0
8008c36: f04f 0c0a mov.w ip, #10
8008c3a: 9a07 ldr r2, [sp, #28]
8008c3c: 4621 mov r1, r4
8008c3e: f811 3b01 ldrb.w r3, [r1], #1
8008c42: 3b30 subs r3, #48 @ 0x30
8008c44: 2b09 cmp r3, #9
8008c46: d94b bls.n 8008ce0 <_svfiprintf_r+0x17c>
8008c48: b1b0 cbz r0, 8008c78 <_svfiprintf_r+0x114>
8008c4a: 9207 str r2, [sp, #28]
8008c4c: e014 b.n 8008c78 <_svfiprintf_r+0x114>
8008c4e: eba0 0308 sub.w r3, r0, r8
8008c52: fa09 f303 lsl.w r3, r9, r3
8008c56: 4313 orrs r3, r2
8008c58: 46a2 mov sl, r4
8008c5a: 9304 str r3, [sp, #16]
8008c5c: e7d2 b.n 8008c04 <_svfiprintf_r+0xa0>
8008c5e: 9b03 ldr r3, [sp, #12]
8008c60: 1d19 adds r1, r3, #4
8008c62: 681b ldr r3, [r3, #0]
8008c64: 9103 str r1, [sp, #12]
8008c66: 2b00 cmp r3, #0
8008c68: bfbb ittet lt
8008c6a: 425b neglt r3, r3
8008c6c: f042 0202 orrlt.w r2, r2, #2
8008c70: 9307 strge r3, [sp, #28]
8008c72: 9307 strlt r3, [sp, #28]
8008c74: bfb8 it lt
8008c76: 9204 strlt r2, [sp, #16]
8008c78: 7823 ldrb r3, [r4, #0]
8008c7a: 2b2e cmp r3, #46 @ 0x2e
8008c7c: d10a bne.n 8008c94 <_svfiprintf_r+0x130>
8008c7e: 7863 ldrb r3, [r4, #1]
8008c80: 2b2a cmp r3, #42 @ 0x2a
8008c82: d132 bne.n 8008cea <_svfiprintf_r+0x186>
8008c84: 9b03 ldr r3, [sp, #12]
8008c86: 3402 adds r4, #2
8008c88: 1d1a adds r2, r3, #4
8008c8a: 681b ldr r3, [r3, #0]
8008c8c: 9203 str r2, [sp, #12]
8008c8e: ea43 73e3 orr.w r3, r3, r3, asr #31
8008c92: 9305 str r3, [sp, #20]
8008c94: f8df a0b4 ldr.w sl, [pc, #180] @ 8008d4c <_svfiprintf_r+0x1e8>
8008c98: 2203 movs r2, #3
8008c9a: 4650 mov r0, sl
8008c9c: 7821 ldrb r1, [r4, #0]
8008c9e: f000 fa17 bl 80090d0 <memchr>
8008ca2: b138 cbz r0, 8008cb4 <_svfiprintf_r+0x150>
8008ca4: 2240 movs r2, #64 @ 0x40
8008ca6: 9b04 ldr r3, [sp, #16]
8008ca8: eba0 000a sub.w r0, r0, sl
8008cac: 4082 lsls r2, r0
8008cae: 4313 orrs r3, r2
8008cb0: 3401 adds r4, #1
8008cb2: 9304 str r3, [sp, #16]
8008cb4: f814 1b01 ldrb.w r1, [r4], #1
8008cb8: 2206 movs r2, #6
8008cba: 4825 ldr r0, [pc, #148] @ (8008d50 <_svfiprintf_r+0x1ec>)
8008cbc: f88d 1028 strb.w r1, [sp, #40] @ 0x28
8008cc0: f000 fa06 bl 80090d0 <memchr>
8008cc4: 2800 cmp r0, #0
8008cc6: d036 beq.n 8008d36 <_svfiprintf_r+0x1d2>
8008cc8: 4b22 ldr r3, [pc, #136] @ (8008d54 <_svfiprintf_r+0x1f0>)
8008cca: bb1b cbnz r3, 8008d14 <_svfiprintf_r+0x1b0>
8008ccc: 9b03 ldr r3, [sp, #12]
8008cce: 3307 adds r3, #7
8008cd0: f023 0307 bic.w r3, r3, #7
8008cd4: 3308 adds r3, #8
8008cd6: 9303 str r3, [sp, #12]
8008cd8: 9b09 ldr r3, [sp, #36] @ 0x24
8008cda: 4433 add r3, r6
8008cdc: 9309 str r3, [sp, #36] @ 0x24
8008cde: e76a b.n 8008bb6 <_svfiprintf_r+0x52>
8008ce0: 460c mov r4, r1
8008ce2: 2001 movs r0, #1
8008ce4: fb0c 3202 mla r2, ip, r2, r3
8008ce8: e7a8 b.n 8008c3c <_svfiprintf_r+0xd8>
8008cea: 2300 movs r3, #0
8008cec: f04f 0c0a mov.w ip, #10
8008cf0: 4619 mov r1, r3
8008cf2: 3401 adds r4, #1
8008cf4: 9305 str r3, [sp, #20]
8008cf6: 4620 mov r0, r4
8008cf8: f810 2b01 ldrb.w r2, [r0], #1
8008cfc: 3a30 subs r2, #48 @ 0x30
8008cfe: 2a09 cmp r2, #9
8008d00: d903 bls.n 8008d0a <_svfiprintf_r+0x1a6>
8008d02: 2b00 cmp r3, #0
8008d04: d0c6 beq.n 8008c94 <_svfiprintf_r+0x130>
8008d06: 9105 str r1, [sp, #20]
8008d08: e7c4 b.n 8008c94 <_svfiprintf_r+0x130>
8008d0a: 4604 mov r4, r0
8008d0c: 2301 movs r3, #1
8008d0e: fb0c 2101 mla r1, ip, r1, r2
8008d12: e7f0 b.n 8008cf6 <_svfiprintf_r+0x192>
8008d14: ab03 add r3, sp, #12
8008d16: 9300 str r3, [sp, #0]
8008d18: 462a mov r2, r5
8008d1a: 4638 mov r0, r7
8008d1c: 4b0e ldr r3, [pc, #56] @ (8008d58 <_svfiprintf_r+0x1f4>)
8008d1e: a904 add r1, sp, #16
8008d20: f3af 8000 nop.w
8008d24: 1c42 adds r2, r0, #1
8008d26: 4606 mov r6, r0
8008d28: d1d6 bne.n 8008cd8 <_svfiprintf_r+0x174>
8008d2a: 89ab ldrh r3, [r5, #12]
8008d2c: 065b lsls r3, r3, #25
8008d2e: f53f af2d bmi.w 8008b8c <_svfiprintf_r+0x28>
8008d32: 9809 ldr r0, [sp, #36] @ 0x24
8008d34: e72c b.n 8008b90 <_svfiprintf_r+0x2c>
8008d36: ab03 add r3, sp, #12
8008d38: 9300 str r3, [sp, #0]
8008d3a: 462a mov r2, r5
8008d3c: 4638 mov r0, r7
8008d3e: 4b06 ldr r3, [pc, #24] @ (8008d58 <_svfiprintf_r+0x1f4>)
8008d40: a904 add r1, sp, #16
8008d42: f000 f87d bl 8008e40 <_printf_i>
8008d46: e7ed b.n 8008d24 <_svfiprintf_r+0x1c0>
8008d48: 08009206 .word 0x08009206
8008d4c: 0800920c .word 0x0800920c
8008d50: 08009210 .word 0x08009210
8008d54: 00000000 .word 0x00000000
8008d58: 08008aad .word 0x08008aad
08008d5c <_printf_common>:
8008d5c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
8008d60: 4616 mov r6, r2
8008d62: 4698 mov r8, r3
8008d64: 688a ldr r2, [r1, #8]
8008d66: 690b ldr r3, [r1, #16]
8008d68: 4607 mov r7, r0
8008d6a: 4293 cmp r3, r2
8008d6c: bfb8 it lt
8008d6e: 4613 movlt r3, r2
8008d70: 6033 str r3, [r6, #0]
8008d72: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
8008d76: 460c mov r4, r1
8008d78: f8dd 9020 ldr.w r9, [sp, #32]
8008d7c: b10a cbz r2, 8008d82 <_printf_common+0x26>
8008d7e: 3301 adds r3, #1
8008d80: 6033 str r3, [r6, #0]
8008d82: 6823 ldr r3, [r4, #0]
8008d84: 0699 lsls r1, r3, #26
8008d86: bf42 ittt mi
8008d88: 6833 ldrmi r3, [r6, #0]
8008d8a: 3302 addmi r3, #2
8008d8c: 6033 strmi r3, [r6, #0]
8008d8e: 6825 ldr r5, [r4, #0]
8008d90: f015 0506 ands.w r5, r5, #6
8008d94: d106 bne.n 8008da4 <_printf_common+0x48>
8008d96: f104 0a19 add.w sl, r4, #25
8008d9a: 68e3 ldr r3, [r4, #12]
8008d9c: 6832 ldr r2, [r6, #0]
8008d9e: 1a9b subs r3, r3, r2
8008da0: 42ab cmp r3, r5
8008da2: dc2b bgt.n 8008dfc <_printf_common+0xa0>
8008da4: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
8008da8: 6822 ldr r2, [r4, #0]
8008daa: 3b00 subs r3, #0
8008dac: bf18 it ne
8008dae: 2301 movne r3, #1
8008db0: 0692 lsls r2, r2, #26
8008db2: d430 bmi.n 8008e16 <_printf_common+0xba>
8008db4: 4641 mov r1, r8
8008db6: 4638 mov r0, r7
8008db8: f104 0243 add.w r2, r4, #67 @ 0x43
8008dbc: 47c8 blx r9
8008dbe: 3001 adds r0, #1
8008dc0: d023 beq.n 8008e0a <_printf_common+0xae>
8008dc2: 6823 ldr r3, [r4, #0]
8008dc4: 6922 ldr r2, [r4, #16]
8008dc6: f003 0306 and.w r3, r3, #6
8008dca: 2b04 cmp r3, #4
8008dcc: bf14 ite ne
8008dce: 2500 movne r5, #0
8008dd0: 6833 ldreq r3, [r6, #0]
8008dd2: f04f 0600 mov.w r6, #0
8008dd6: bf08 it eq
8008dd8: 68e5 ldreq r5, [r4, #12]
8008dda: f104 041a add.w r4, r4, #26
8008dde: bf08 it eq
8008de0: 1aed subeq r5, r5, r3
8008de2: f854 3c12 ldr.w r3, [r4, #-18]
8008de6: bf08 it eq
8008de8: ea25 75e5 biceq.w r5, r5, r5, asr #31
8008dec: 4293 cmp r3, r2
8008dee: bfc4 itt gt
8008df0: 1a9b subgt r3, r3, r2
8008df2: 18ed addgt r5, r5, r3
8008df4: 42b5 cmp r5, r6
8008df6: d11a bne.n 8008e2e <_printf_common+0xd2>
8008df8: 2000 movs r0, #0
8008dfa: e008 b.n 8008e0e <_printf_common+0xb2>
8008dfc: 2301 movs r3, #1
8008dfe: 4652 mov r2, sl
8008e00: 4641 mov r1, r8
8008e02: 4638 mov r0, r7
8008e04: 47c8 blx r9
8008e06: 3001 adds r0, #1
8008e08: d103 bne.n 8008e12 <_printf_common+0xb6>
8008e0a: f04f 30ff mov.w r0, #4294967295
8008e0e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8008e12: 3501 adds r5, #1
8008e14: e7c1 b.n 8008d9a <_printf_common+0x3e>
8008e16: 2030 movs r0, #48 @ 0x30
8008e18: 18e1 adds r1, r4, r3
8008e1a: f881 0043 strb.w r0, [r1, #67] @ 0x43
8008e1e: 1c5a adds r2, r3, #1
8008e20: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
8008e24: 4422 add r2, r4
8008e26: 3302 adds r3, #2
8008e28: f882 1043 strb.w r1, [r2, #67] @ 0x43
8008e2c: e7c2 b.n 8008db4 <_printf_common+0x58>
8008e2e: 2301 movs r3, #1
8008e30: 4622 mov r2, r4
8008e32: 4641 mov r1, r8
8008e34: 4638 mov r0, r7
8008e36: 47c8 blx r9
8008e38: 3001 adds r0, #1
8008e3a: d0e6 beq.n 8008e0a <_printf_common+0xae>
8008e3c: 3601 adds r6, #1
8008e3e: e7d9 b.n 8008df4 <_printf_common+0x98>
08008e40 <_printf_i>:
8008e40: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
8008e44: 7e0f ldrb r7, [r1, #24]
8008e46: 4691 mov r9, r2
8008e48: 2f78 cmp r7, #120 @ 0x78
8008e4a: 4680 mov r8, r0
8008e4c: 460c mov r4, r1
8008e4e: 469a mov sl, r3
8008e50: 9e0c ldr r6, [sp, #48] @ 0x30
8008e52: f101 0243 add.w r2, r1, #67 @ 0x43
8008e56: d807 bhi.n 8008e68 <_printf_i+0x28>
8008e58: 2f62 cmp r7, #98 @ 0x62
8008e5a: d80a bhi.n 8008e72 <_printf_i+0x32>
8008e5c: 2f00 cmp r7, #0
8008e5e: f000 80d1 beq.w 8009004 <_printf_i+0x1c4>
8008e62: 2f58 cmp r7, #88 @ 0x58
8008e64: f000 80b8 beq.w 8008fd8 <_printf_i+0x198>
8008e68: f104 0642 add.w r6, r4, #66 @ 0x42
8008e6c: f884 7042 strb.w r7, [r4, #66] @ 0x42
8008e70: e03a b.n 8008ee8 <_printf_i+0xa8>
8008e72: f1a7 0363 sub.w r3, r7, #99 @ 0x63
8008e76: 2b15 cmp r3, #21
8008e78: d8f6 bhi.n 8008e68 <_printf_i+0x28>
8008e7a: a101 add r1, pc, #4 @ (adr r1, 8008e80 <_printf_i+0x40>)
8008e7c: f851 f023 ldr.w pc, [r1, r3, lsl #2]
8008e80: 08008ed9 .word 0x08008ed9
8008e84: 08008eed .word 0x08008eed
8008e88: 08008e69 .word 0x08008e69
8008e8c: 08008e69 .word 0x08008e69
8008e90: 08008e69 .word 0x08008e69
8008e94: 08008e69 .word 0x08008e69
8008e98: 08008eed .word 0x08008eed
8008e9c: 08008e69 .word 0x08008e69
8008ea0: 08008e69 .word 0x08008e69
8008ea4: 08008e69 .word 0x08008e69
8008ea8: 08008e69 .word 0x08008e69
8008eac: 08008feb .word 0x08008feb
8008eb0: 08008f17 .word 0x08008f17
8008eb4: 08008fa5 .word 0x08008fa5
8008eb8: 08008e69 .word 0x08008e69
8008ebc: 08008e69 .word 0x08008e69
8008ec0: 0800900d .word 0x0800900d
8008ec4: 08008e69 .word 0x08008e69
8008ec8: 08008f17 .word 0x08008f17
8008ecc: 08008e69 .word 0x08008e69
8008ed0: 08008e69 .word 0x08008e69
8008ed4: 08008fad .word 0x08008fad
8008ed8: 6833 ldr r3, [r6, #0]
8008eda: 1d1a adds r2, r3, #4
8008edc: 681b ldr r3, [r3, #0]
8008ede: 6032 str r2, [r6, #0]
8008ee0: f104 0642 add.w r6, r4, #66 @ 0x42
8008ee4: f884 3042 strb.w r3, [r4, #66] @ 0x42
8008ee8: 2301 movs r3, #1
8008eea: e09c b.n 8009026 <_printf_i+0x1e6>
8008eec: 6833 ldr r3, [r6, #0]
8008eee: 6820 ldr r0, [r4, #0]
8008ef0: 1d19 adds r1, r3, #4
8008ef2: 6031 str r1, [r6, #0]
8008ef4: 0606 lsls r6, r0, #24
8008ef6: d501 bpl.n 8008efc <_printf_i+0xbc>
8008ef8: 681d ldr r5, [r3, #0]
8008efa: e003 b.n 8008f04 <_printf_i+0xc4>
8008efc: 0645 lsls r5, r0, #25
8008efe: d5fb bpl.n 8008ef8 <_printf_i+0xb8>
8008f00: f9b3 5000 ldrsh.w r5, [r3]
8008f04: 2d00 cmp r5, #0
8008f06: da03 bge.n 8008f10 <_printf_i+0xd0>
8008f08: 232d movs r3, #45 @ 0x2d
8008f0a: 426d negs r5, r5
8008f0c: f884 3043 strb.w r3, [r4, #67] @ 0x43
8008f10: 230a movs r3, #10
8008f12: 4858 ldr r0, [pc, #352] @ (8009074 <_printf_i+0x234>)
8008f14: e011 b.n 8008f3a <_printf_i+0xfa>
8008f16: 6821 ldr r1, [r4, #0]
8008f18: 6833 ldr r3, [r6, #0]
8008f1a: 0608 lsls r0, r1, #24
8008f1c: f853 5b04 ldr.w r5, [r3], #4
8008f20: d402 bmi.n 8008f28 <_printf_i+0xe8>
8008f22: 0649 lsls r1, r1, #25
8008f24: bf48 it mi
8008f26: b2ad uxthmi r5, r5
8008f28: 2f6f cmp r7, #111 @ 0x6f
8008f2a: 6033 str r3, [r6, #0]
8008f2c: bf14 ite ne
8008f2e: 230a movne r3, #10
8008f30: 2308 moveq r3, #8
8008f32: 4850 ldr r0, [pc, #320] @ (8009074 <_printf_i+0x234>)
8008f34: 2100 movs r1, #0
8008f36: f884 1043 strb.w r1, [r4, #67] @ 0x43
8008f3a: 6866 ldr r6, [r4, #4]
8008f3c: 2e00 cmp r6, #0
8008f3e: 60a6 str r6, [r4, #8]
8008f40: db05 blt.n 8008f4e <_printf_i+0x10e>
8008f42: 6821 ldr r1, [r4, #0]
8008f44: 432e orrs r6, r5
8008f46: f021 0104 bic.w r1, r1, #4
8008f4a: 6021 str r1, [r4, #0]
8008f4c: d04b beq.n 8008fe6 <_printf_i+0x1a6>
8008f4e: 4616 mov r6, r2
8008f50: fbb5 f1f3 udiv r1, r5, r3
8008f54: fb03 5711 mls r7, r3, r1, r5
8008f58: 5dc7 ldrb r7, [r0, r7]
8008f5a: f806 7d01 strb.w r7, [r6, #-1]!
8008f5e: 462f mov r7, r5
8008f60: 42bb cmp r3, r7
8008f62: 460d mov r5, r1
8008f64: d9f4 bls.n 8008f50 <_printf_i+0x110>
8008f66: 2b08 cmp r3, #8
8008f68: d10b bne.n 8008f82 <_printf_i+0x142>
8008f6a: 6823 ldr r3, [r4, #0]
8008f6c: 07df lsls r7, r3, #31
8008f6e: d508 bpl.n 8008f82 <_printf_i+0x142>
8008f70: 6923 ldr r3, [r4, #16]
8008f72: 6861 ldr r1, [r4, #4]
8008f74: 4299 cmp r1, r3
8008f76: bfde ittt le
8008f78: 2330 movle r3, #48 @ 0x30
8008f7a: f806 3c01 strble.w r3, [r6, #-1]
8008f7e: f106 36ff addle.w r6, r6, #4294967295
8008f82: 1b92 subs r2, r2, r6
8008f84: 6122 str r2, [r4, #16]
8008f86: 464b mov r3, r9
8008f88: 4621 mov r1, r4
8008f8a: 4640 mov r0, r8
8008f8c: f8cd a000 str.w sl, [sp]
8008f90: aa03 add r2, sp, #12
8008f92: f7ff fee3 bl 8008d5c <_printf_common>
8008f96: 3001 adds r0, #1
8008f98: d14a bne.n 8009030 <_printf_i+0x1f0>
8008f9a: f04f 30ff mov.w r0, #4294967295
8008f9e: b004 add sp, #16
8008fa0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
8008fa4: 6823 ldr r3, [r4, #0]
8008fa6: f043 0320 orr.w r3, r3, #32
8008faa: 6023 str r3, [r4, #0]
8008fac: 2778 movs r7, #120 @ 0x78
8008fae: 4832 ldr r0, [pc, #200] @ (8009078 <_printf_i+0x238>)
8008fb0: f884 7045 strb.w r7, [r4, #69] @ 0x45
8008fb4: 6823 ldr r3, [r4, #0]
8008fb6: 6831 ldr r1, [r6, #0]
8008fb8: 061f lsls r7, r3, #24
8008fba: f851 5b04 ldr.w r5, [r1], #4
8008fbe: d402 bmi.n 8008fc6 <_printf_i+0x186>
8008fc0: 065f lsls r7, r3, #25
8008fc2: bf48 it mi
8008fc4: b2ad uxthmi r5, r5
8008fc6: 6031 str r1, [r6, #0]
8008fc8: 07d9 lsls r1, r3, #31
8008fca: bf44 itt mi
8008fcc: f043 0320 orrmi.w r3, r3, #32
8008fd0: 6023 strmi r3, [r4, #0]
8008fd2: b11d cbz r5, 8008fdc <_printf_i+0x19c>
8008fd4: 2310 movs r3, #16
8008fd6: e7ad b.n 8008f34 <_printf_i+0xf4>
8008fd8: 4826 ldr r0, [pc, #152] @ (8009074 <_printf_i+0x234>)
8008fda: e7e9 b.n 8008fb0 <_printf_i+0x170>
8008fdc: 6823 ldr r3, [r4, #0]
8008fde: f023 0320 bic.w r3, r3, #32
8008fe2: 6023 str r3, [r4, #0]
8008fe4: e7f6 b.n 8008fd4 <_printf_i+0x194>
8008fe6: 4616 mov r6, r2
8008fe8: e7bd b.n 8008f66 <_printf_i+0x126>
8008fea: 6833 ldr r3, [r6, #0]
8008fec: 6825 ldr r5, [r4, #0]
8008fee: 1d18 adds r0, r3, #4
8008ff0: 6961 ldr r1, [r4, #20]
8008ff2: 6030 str r0, [r6, #0]
8008ff4: 062e lsls r6, r5, #24
8008ff6: 681b ldr r3, [r3, #0]
8008ff8: d501 bpl.n 8008ffe <_printf_i+0x1be>
8008ffa: 6019 str r1, [r3, #0]
8008ffc: e002 b.n 8009004 <_printf_i+0x1c4>
8008ffe: 0668 lsls r0, r5, #25
8009000: d5fb bpl.n 8008ffa <_printf_i+0x1ba>
8009002: 8019 strh r1, [r3, #0]
8009004: 2300 movs r3, #0
8009006: 4616 mov r6, r2
8009008: 6123 str r3, [r4, #16]
800900a: e7bc b.n 8008f86 <_printf_i+0x146>
800900c: 6833 ldr r3, [r6, #0]
800900e: 2100 movs r1, #0
8009010: 1d1a adds r2, r3, #4
8009012: 6032 str r2, [r6, #0]
8009014: 681e ldr r6, [r3, #0]
8009016: 6862 ldr r2, [r4, #4]
8009018: 4630 mov r0, r6
800901a: f000 f859 bl 80090d0 <memchr>
800901e: b108 cbz r0, 8009024 <_printf_i+0x1e4>
8009020: 1b80 subs r0, r0, r6
8009022: 6060 str r0, [r4, #4]
8009024: 6863 ldr r3, [r4, #4]
8009026: 6123 str r3, [r4, #16]
8009028: 2300 movs r3, #0
800902a: f884 3043 strb.w r3, [r4, #67] @ 0x43
800902e: e7aa b.n 8008f86 <_printf_i+0x146>
8009030: 4632 mov r2, r6
8009032: 4649 mov r1, r9
8009034: 4640 mov r0, r8
8009036: 6923 ldr r3, [r4, #16]
8009038: 47d0 blx sl
800903a: 3001 adds r0, #1
800903c: d0ad beq.n 8008f9a <_printf_i+0x15a>
800903e: 6823 ldr r3, [r4, #0]
8009040: 079b lsls r3, r3, #30
8009042: d413 bmi.n 800906c <_printf_i+0x22c>
8009044: 68e0 ldr r0, [r4, #12]
8009046: 9b03 ldr r3, [sp, #12]
8009048: 4298 cmp r0, r3
800904a: bfb8 it lt
800904c: 4618 movlt r0, r3
800904e: e7a6 b.n 8008f9e <_printf_i+0x15e>
8009050: 2301 movs r3, #1
8009052: 4632 mov r2, r6
8009054: 4649 mov r1, r9
8009056: 4640 mov r0, r8
8009058: 47d0 blx sl
800905a: 3001 adds r0, #1
800905c: d09d beq.n 8008f9a <_printf_i+0x15a>
800905e: 3501 adds r5, #1
8009060: 68e3 ldr r3, [r4, #12]
8009062: 9903 ldr r1, [sp, #12]
8009064: 1a5b subs r3, r3, r1
8009066: 42ab cmp r3, r5
8009068: dcf2 bgt.n 8009050 <_printf_i+0x210>
800906a: e7eb b.n 8009044 <_printf_i+0x204>
800906c: 2500 movs r5, #0
800906e: f104 0619 add.w r6, r4, #25
8009072: e7f5 b.n 8009060 <_printf_i+0x220>
8009074: 08009217 .word 0x08009217
8009078: 08009228 .word 0x08009228
0800907c <memmove>:
800907c: 4288 cmp r0, r1
800907e: b510 push {r4, lr}
8009080: eb01 0402 add.w r4, r1, r2
8009084: d902 bls.n 800908c <memmove+0x10>
8009086: 4284 cmp r4, r0
8009088: 4623 mov r3, r4
800908a: d807 bhi.n 800909c <memmove+0x20>
800908c: 1e43 subs r3, r0, #1
800908e: 42a1 cmp r1, r4
8009090: d008 beq.n 80090a4 <memmove+0x28>
8009092: f811 2b01 ldrb.w r2, [r1], #1
8009096: f803 2f01 strb.w r2, [r3, #1]!
800909a: e7f8 b.n 800908e <memmove+0x12>
800909c: 4601 mov r1, r0
800909e: 4402 add r2, r0
80090a0: 428a cmp r2, r1
80090a2: d100 bne.n 80090a6 <memmove+0x2a>
80090a4: bd10 pop {r4, pc}
80090a6: f813 4d01 ldrb.w r4, [r3, #-1]!
80090aa: f802 4d01 strb.w r4, [r2, #-1]!
80090ae: e7f7 b.n 80090a0 <memmove+0x24>
080090b0 <_sbrk_r>:
80090b0: b538 push {r3, r4, r5, lr}
80090b2: 2300 movs r3, #0
80090b4: 4d05 ldr r5, [pc, #20] @ (80090cc <_sbrk_r+0x1c>)
80090b6: 4604 mov r4, r0
80090b8: 4608 mov r0, r1
80090ba: 602b str r3, [r5, #0]
80090bc: f7f7 fc62 bl 8000984 <_sbrk>
80090c0: 1c43 adds r3, r0, #1
80090c2: d102 bne.n 80090ca <_sbrk_r+0x1a>
80090c4: 682b ldr r3, [r5, #0]
80090c6: b103 cbz r3, 80090ca <_sbrk_r+0x1a>
80090c8: 6023 str r3, [r4, #0]
80090ca: bd38 pop {r3, r4, r5, pc}
80090cc: 200016c4 .word 0x200016c4
080090d0 <memchr>:
80090d0: 4603 mov r3, r0
80090d2: b510 push {r4, lr}
80090d4: b2c9 uxtb r1, r1
80090d6: 4402 add r2, r0
80090d8: 4293 cmp r3, r2
80090da: 4618 mov r0, r3
80090dc: d101 bne.n 80090e2 <memchr+0x12>
80090de: 2000 movs r0, #0
80090e0: e003 b.n 80090ea <memchr+0x1a>
80090e2: 7804 ldrb r4, [r0, #0]
80090e4: 3301 adds r3, #1
80090e6: 428c cmp r4, r1
80090e8: d1f6 bne.n 80090d8 <memchr+0x8>
80090ea: bd10 pop {r4, pc}
080090ec <memcpy>:
80090ec: 440a add r2, r1
80090ee: 4291 cmp r1, r2
80090f0: f100 33ff add.w r3, r0, #4294967295
80090f4: d100 bne.n 80090f8 <memcpy+0xc>
80090f6: 4770 bx lr
80090f8: b510 push {r4, lr}
80090fa: f811 4b01 ldrb.w r4, [r1], #1
80090fe: 4291 cmp r1, r2
8009100: f803 4f01 strb.w r4, [r3, #1]!
8009104: d1f9 bne.n 80090fa <memcpy+0xe>
8009106: bd10 pop {r4, pc}
08009108 <_realloc_r>:
8009108: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800910c: 4607 mov r7, r0
800910e: 4614 mov r4, r2
8009110: 460d mov r5, r1
8009112: b921 cbnz r1, 800911e <_realloc_r+0x16>
8009114: 4611 mov r1, r2
8009116: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800911a: f7ff bc3b b.w 8008994 <_malloc_r>
800911e: b92a cbnz r2, 800912c <_realloc_r+0x24>
8009120: f7ff fbce bl 80088c0 <_free_r>
8009124: 4625 mov r5, r4
8009126: 4628 mov r0, r5
8009128: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800912c: f000 f81a bl 8009164 <_malloc_usable_size_r>
8009130: 4284 cmp r4, r0
8009132: 4606 mov r6, r0
8009134: d802 bhi.n 800913c <_realloc_r+0x34>
8009136: ebb4 0f50 cmp.w r4, r0, lsr #1
800913a: d8f4 bhi.n 8009126 <_realloc_r+0x1e>
800913c: 4621 mov r1, r4
800913e: 4638 mov r0, r7
8009140: f7ff fc28 bl 8008994 <_malloc_r>
8009144: 4680 mov r8, r0
8009146: b908 cbnz r0, 800914c <_realloc_r+0x44>
8009148: 4645 mov r5, r8
800914a: e7ec b.n 8009126 <_realloc_r+0x1e>
800914c: 42b4 cmp r4, r6
800914e: 4622 mov r2, r4
8009150: 4629 mov r1, r5
8009152: bf28 it cs
8009154: 4632 movcs r2, r6
8009156: f7ff ffc9 bl 80090ec <memcpy>
800915a: 4629 mov r1, r5
800915c: 4638 mov r0, r7
800915e: f7ff fbaf bl 80088c0 <_free_r>
8009162: e7f1 b.n 8009148 <_realloc_r+0x40>
08009164 <_malloc_usable_size_r>:
8009164: f851 3c04 ldr.w r3, [r1, #-4]
8009168: 1f18 subs r0, r3, #4
800916a: 2b00 cmp r3, #0
800916c: bfbc itt lt
800916e: 580b ldrlt r3, [r1, r0]
8009170: 18c0 addlt r0, r0, r3
8009172: 4770 bx lr
08009174 <_init>:
8009174: b5f8 push {r3, r4, r5, r6, r7, lr}
8009176: bf00 nop
8009178: bcf8 pop {r3, r4, r5, r6, r7}
800917a: bc08 pop {r3}
800917c: 469e mov lr, r3
800917e: 4770 bx lr
08009180 <_fini>:
8009180: b5f8 push {r3, r4, r5, r6, r7, lr}
8009182: bf00 nop
8009184: bcf8 pop {r3, r4, r5, r6, r7}
8009186: bc08 pop {r3}
8009188: 469e mov lr, r3
800918a: 4770 bx lr
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