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8eef06c31c690885ad06e55793d5fc1cb69d4100
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
andrea 8eef06c31c wip
2026-05-27 22:25:12 +02:00

35824 lines
1.3 MiB
Raw Blame History

AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000ec00 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000007ec 0800ed0c 0800ed0c 0000fd0c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800f4f8 0800f4f8 000111dc 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800f4f8 0800f4f8 000104f8 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800f500 0800f500 000111dc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800f500 0800f500 00010500 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800f504 0800f504 00010504 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001dc 20000000 0800f508 00011000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 000016c4 200001e0 0800f6e4 000111e0 2**3
ALLOC
10 ._user_heap_stack 00000604 200018a4 0800f6e4 000118a4 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 000111dc 2**0
CONTENTS, READONLY
12 .debug_info 0001a747 00000000 00000000 00011205 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00004a0d 00000000 00000000 0002b94c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 000016b0 00000000 00000000 00030360 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00001168 00000000 00000000 00031a10 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001d2ac 00000000 00000000 00032b78 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001f15b 00000000 00000000 0004fe24 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 00095e7a 00000000 00000000 0006ef7f 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 00104df9 2**0
CONTENTS, READONLY
20 .debug_frame 000061b8 00000000 00000000 00104e3c 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 0010aff4 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001e0 .word 0x200001e0
8000128: 00000000 .word 0x00000000
800012c: 0800ecf4 .word 0x0800ecf4
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001e4 .word 0x200001e4
8000148: 0800ecf4 .word 0x0800ecf4
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <manageAdc>:
uint16_t ch5 ;
uint16_t ch6 ;
uint16_t ch7 ;
uint16_t ch8 ;
void manageAdc(void){
800015c: b480 push {r7}
800015e: af00 add r7, sp, #0
if (adc_avg_ready)
8000160: 4b12 ldr r3, [pc, #72] @ (80001ac <manageAdc+0x50>)
8000162: 781b ldrb r3, [r3, #0]
8000164: b2db uxtb r3, r3
8000166: 2b00 cmp r3, #0
8000168: d01b beq.n 80001a2 <manageAdc+0x46>
{
adc_avg_ready = 0;
800016a: 4b10 ldr r3, [pc, #64] @ (80001ac <manageAdc+0x50>)
800016c: 2200 movs r2, #0
800016e: 701a strb r2, [r3, #0]
// Read averaged channels (example mapping)
ch4 = adc_avg[0];
8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 <manageAdc+0x54>)
8000172: 881b ldrh r3, [r3, #0]
8000174: b29a uxth r2, r3
8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 <manageAdc+0x58>)
8000178: 801a strh r2, [r3, #0]
ch5 = adc_avg[1];
800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 <manageAdc+0x54>)
800017c: 885b ldrh r3, [r3, #2]
800017e: b29a uxth r2, r3
8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 <manageAdc+0x5c>)
8000182: 801a strh r2, [r3, #0]
ch6 = adc_avg[2];
8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 <manageAdc+0x54>)
8000186: 889b ldrh r3, [r3, #4]
8000188: b29a uxth r2, r3
800018a: 4b0c ldr r3, [pc, #48] @ (80001bc <manageAdc+0x60>)
800018c: 801a strh r2, [r3, #0]
ch7 = adc_avg[3];
800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 <manageAdc+0x54>)
8000190: 88db ldrh r3, [r3, #6]
8000192: b29a uxth r2, r3
8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 <manageAdc+0x64>)
8000196: 801a strh r2, [r3, #0]
ch8 = adc_avg[4];
8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 <manageAdc+0x54>)
800019a: 891b ldrh r3, [r3, #8]
800019c: b29a uxth r2, r3
800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 <manageAdc+0x68>)
80001a0: 801a strh r2, [r3, #0]
// Use them (convert to volts, control, etc.)
// float v4 = (3.3f * ch4) / 4095.0f;
}
}
80001a2: bf00 nop
80001a4: 46bd mov sp, r7
80001a6: bc80 pop {r7}
80001a8: 4770 bx lr
80001aa: bf00 nop
80001ac: 20000229 .word 0x20000229
80001b0: 20000208 .word 0x20000208
80001b4: 2000022a .word 0x2000022a
80001b8: 2000022c .word 0x2000022c
80001bc: 2000022e .word 0x2000022e
80001c0: 20000230 .word 0x20000230
80001c4: 20000232 .word 0x20000232
080001c8 <readAdc>:
void readAdc(void){
80001c8: b480 push {r7}
80001ca: b083 sub sp, #12
80001cc: af00 add r7, sp, #0
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001ce: 2300 movs r3, #0
80001d0: 71fb strb r3, [r7, #7]
80001d2: e010 b.n 80001f6 <readAdc+0x2e>
{
adc_sum[i] += adc_dma_buf[i];
80001d4: 79fb ldrb r3, [r7, #7]
80001d6: 4a21 ldr r2, [pc, #132] @ (800025c <readAdc+0x94>)
80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80001dc: b299 uxth r1, r3
80001de: 79fb ldrb r3, [r7, #7]
80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 <readAdc+0x98>)
80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2]
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 440a add r2, r1
80001ea: 491d ldr r1, [pc, #116] @ (8000260 <readAdc+0x98>)
80001ec: f841 2023 str.w r2, [r1, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001f0: 79fb ldrb r3, [r7, #7]
80001f2: 3301 adds r3, #1
80001f4: 71fb strb r3, [r7, #7]
80001f6: 79fb ldrb r3, [r7, #7]
80001f8: 2b04 cmp r3, #4
80001fa: d9eb bls.n 80001d4 <readAdc+0xc>
}
adc_sum_count++;
80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 <readAdc+0x9c>)
80001fe: 781b ldrb r3, [r3, #0]
8000200: 3301 adds r3, #1
8000202: b2da uxtb r2, r3
8000204: 4b17 ldr r3, [pc, #92] @ (8000264 <readAdc+0x9c>)
8000206: 701a strb r2, [r3, #0]
/* When we collected ADC_AVG_WINDOW samples → compute average */
if (adc_sum_count >= ADC_AVG_WINDOW)
8000208: 4b16 ldr r3, [pc, #88] @ (8000264 <readAdc+0x9c>)
800020a: 781b ldrb r3, [r3, #0]
800020c: 2b04 cmp r3, #4
800020e: d920 bls.n 8000252 <readAdc+0x8a>
{
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
8000210: 2300 movs r3, #0
8000212: 71bb strb r3, [r7, #6]
8000214: e014 b.n 8000240 <readAdc+0x78>
{
adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW);
8000216: 79bb ldrb r3, [r7, #6]
8000218: 4a11 ldr r2, [pc, #68] @ (8000260 <readAdc+0x98>)
800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800021e: 4a12 ldr r2, [pc, #72] @ (8000268 <readAdc+0xa0>)
8000220: fba2 2303 umull r2, r3, r2, r3
8000224: 089a lsrs r2, r3, #2
8000226: 79bb ldrb r3, [r7, #6]
8000228: b291 uxth r1, r2
800022a: 4a10 ldr r2, [pc, #64] @ (800026c <readAdc+0xa4>)
800022c: f822 1013 strh.w r1, [r2, r3, lsl #1]
adc_sum[i] = 0;
8000230: 79bb ldrb r3, [r7, #6]
8000232: 4a0b ldr r2, [pc, #44] @ (8000260 <readAdc+0x98>)
8000234: 2100 movs r1, #0
8000236: f842 1023 str.w r1, [r2, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
800023a: 79bb ldrb r3, [r7, #6]
800023c: 3301 adds r3, #1
800023e: 71bb strb r3, [r7, #6]
8000240: 79bb ldrb r3, [r7, #6]
8000242: 2b04 cmp r3, #4
8000244: d9e7 bls.n 8000216 <readAdc+0x4e>
}
adc_sum_count = 0;
8000246: 4b07 ldr r3, [pc, #28] @ (8000264 <readAdc+0x9c>)
8000248: 2200 movs r2, #0
800024a: 701a strb r2, [r3, #0]
adc_avg_ready = 1; // tell main loop new data is ready
800024c: 4b08 ldr r3, [pc, #32] @ (8000270 <readAdc+0xa8>)
800024e: 2201 movs r2, #1
8000250: 701a strb r2, [r3, #0]
}
}
8000252: bf00 nop
8000254: 370c adds r7, #12
8000256: 46bd mov sp, r7
8000258: bc80 pop {r7}
800025a: 4770 bx lr
800025c: 200001fc .word 0x200001fc
8000260: 20000214 .word 0x20000214
8000264: 20000228 .word 0x20000228
8000268: cccccccd .word 0xcccccccd
800026c: 20000208 .word 0x20000208
8000270: 20000229 .word 0x20000229
08000274 <EEW_Read>:
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
void loadEE(void);
void loadDefault(void);
/* Pseudo-array accessor EEW[idx] */
static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value)
{
8000274: b580 push {r7, lr}
8000276: b082 sub sp, #8
8000278: af00 add r7, sp, #0
800027a: 4603 mov r3, r0
800027c: 6039 str r1, [r7, #0]
800027e: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000280: 79fb ldrb r3, [r7, #7]
8000282: b29b uxth r3, r3
8000284: 3301 adds r3, #1
8000286: b29b uxth r3, r3
8000288: 6839 ldr r1, [r7, #0]
800028a: 4618 mov r0, r3
800028c: f001 f9e4 bl 8001658 <EE_ReadVariable>
8000290: 4603 mov r3, r0
}
8000292: 4618 mov r0, r3
8000294: 3708 adds r7, #8
8000296: 46bd mov sp, r7
8000298: bd80 pop {r7, pc}
0800029a <EEW_Write>:
static inline uint16_t EEW_Write(uint8_t idx, uint16_t value)
{
800029a: b580 push {r7, lr}
800029c: b082 sub sp, #8
800029e: af00 add r7, sp, #0
80002a0: 4603 mov r3, r0
80002a2: 460a mov r2, r1
80002a4: 71fb strb r3, [r7, #7]
80002a6: 4613 mov r3, r2
80002a8: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80002aa: 79fb ldrb r3, [r7, #7]
80002ac: b29b uxth r3, r3
80002ae: 3301 adds r3, #1
80002b0: b29b uxth r3, r3
80002b2: 88ba ldrh r2, [r7, #4]
80002b4: 4611 mov r1, r2
80002b6: 4618 mov r0, r3
80002b8: f001 f9ea bl 8001690 <EE_WriteVariable>
80002bc: 4603 mov r3, r0
}
80002be: 4618 mov r0, r3
80002c0: 3708 adds r7, #8
80002c2: 46bd mov sp, r7
80002c4: bd80 pop {r7, pc}
080002c6 <toHex>:
extern uint16_t tramp;
extern uint16_t tanem;
extern uint16_t thanem;
extern uint16_t trampman;
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80002c6: b490 push {r4, r7}
80002c8: b082 sub sp, #8
80002ca: af00 add r7, sp, #0
80002cc: 4604 mov r4, r0
80002ce: 4608 mov r0, r1
80002d0: 4611 mov r1, r2
80002d2: 461a mov r2, r3
80002d4: 4623 mov r3, r4
80002d6: 71fb strb r3, [r7, #7]
80002d8: 4603 mov r3, r0
80002da: 71bb strb r3, [r7, #6]
80002dc: 460b mov r3, r1
80002de: 717b strb r3, [r7, #5]
80002e0: 4613 mov r3, r2
80002e2: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80002e4: 79fb ldrb r3, [r7, #7]
80002e6: 2b2f cmp r3, #47 @ 0x2f
80002e8: d906 bls.n 80002f8 <toHex+0x32>
80002ea: 79fb ldrb r3, [r7, #7]
80002ec: 2b39 cmp r3, #57 @ 0x39
80002ee: d803 bhi.n 80002f8 <toHex+0x32>
c1-='0';
80002f0: 79fb ldrb r3, [r7, #7]
80002f2: 3b30 subs r3, #48 @ 0x30
80002f4: 71fb strb r3, [r7, #7]
80002f6: e00b b.n 8000310 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80002f8: 79fb ldrb r3, [r7, #7]
80002fa: 2b60 cmp r3, #96 @ 0x60
80002fc: d906 bls.n 800030c <toHex+0x46>
80002fe: 79fb ldrb r3, [r7, #7]
8000300: 2b66 cmp r3, #102 @ 0x66
8000302: d803 bhi.n 800030c <toHex+0x46>
c1=(c1-'a')+10;
8000304: 79fb ldrb r3, [r7, #7]
8000306: 3b57 subs r3, #87 @ 0x57
8000308: 71fb strb r3, [r7, #7]
800030a: e001 b.n 8000310 <toHex+0x4a>
}else return false;
800030c: 2300 movs r3, #0
800030e: e070 b.n 80003f2 <toHex+0x12c>
if((c2>='0')&&(c2<='9')){
8000310: 79bb ldrb r3, [r7, #6]
8000312: 2b2f cmp r3, #47 @ 0x2f
8000314: d906 bls.n 8000324 <toHex+0x5e>
8000316: 79bb ldrb r3, [r7, #6]
8000318: 2b39 cmp r3, #57 @ 0x39
800031a: d803 bhi.n 8000324 <toHex+0x5e>
c2-='0';
800031c: 79bb ldrb r3, [r7, #6]
800031e: 3b30 subs r3, #48 @ 0x30
8000320: 71bb strb r3, [r7, #6]
8000322: e00b b.n 800033c <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
8000324: 79bb ldrb r3, [r7, #6]
8000326: 2b60 cmp r3, #96 @ 0x60
8000328: d906 bls.n 8000338 <toHex+0x72>
800032a: 79bb ldrb r3, [r7, #6]
800032c: 2b66 cmp r3, #102 @ 0x66
800032e: d803 bhi.n 8000338 <toHex+0x72>
c2=(c2-'a')+10;
8000330: 79bb ldrb r3, [r7, #6]
8000332: 3b57 subs r3, #87 @ 0x57
8000334: 71bb strb r3, [r7, #6]
8000336: e001 b.n 800033c <toHex+0x76>
}else return false;
8000338: 2300 movs r3, #0
800033a: e05a b.n 80003f2 <toHex+0x12c>
if((c3>='0')&&(c3<='9')){
800033c: 797b ldrb r3, [r7, #5]
800033e: 2b2f cmp r3, #47 @ 0x2f
8000340: d906 bls.n 8000350 <toHex+0x8a>
8000342: 797b ldrb r3, [r7, #5]
8000344: 2b39 cmp r3, #57 @ 0x39
8000346: d803 bhi.n 8000350 <toHex+0x8a>
c3-='0';
8000348: 797b ldrb r3, [r7, #5]
800034a: 3b30 subs r3, #48 @ 0x30
800034c: 717b strb r3, [r7, #5]
800034e: e00b b.n 8000368 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000350: 797b ldrb r3, [r7, #5]
8000352: 2b60 cmp r3, #96 @ 0x60
8000354: d906 bls.n 8000364 <toHex+0x9e>
8000356: 797b ldrb r3, [r7, #5]
8000358: 2b66 cmp r3, #102 @ 0x66
800035a: d803 bhi.n 8000364 <toHex+0x9e>
c3=(c3-'a')+10;
800035c: 797b ldrb r3, [r7, #5]
800035e: 3b57 subs r3, #87 @ 0x57
8000360: 717b strb r3, [r7, #5]
8000362: e001 b.n 8000368 <toHex+0xa2>
}else return false;
8000364: 2300 movs r3, #0
8000366: e044 b.n 80003f2 <toHex+0x12c>
if((c4>='0')&&(c4<='9')){
8000368: 793b ldrb r3, [r7, #4]
800036a: 2b2f cmp r3, #47 @ 0x2f
800036c: d906 bls.n 800037c <toHex+0xb6>
800036e: 793b ldrb r3, [r7, #4]
8000370: 2b39 cmp r3, #57 @ 0x39
8000372: d803 bhi.n 800037c <toHex+0xb6>
c4-='0';
8000374: 793b ldrb r3, [r7, #4]
8000376: 3b30 subs r3, #48 @ 0x30
8000378: 713b strb r3, [r7, #4]
800037a: e00b b.n 8000394 <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
800037c: 793b ldrb r3, [r7, #4]
800037e: 2b60 cmp r3, #96 @ 0x60
8000380: d906 bls.n 8000390 <toHex+0xca>
8000382: 793b ldrb r3, [r7, #4]
8000384: 2b66 cmp r3, #102 @ 0x66
8000386: d803 bhi.n 8000390 <toHex+0xca>
c4=(c4-'a')+10;
8000388: 793b ldrb r3, [r7, #4]
800038a: 3b57 subs r3, #87 @ 0x57
800038c: 713b strb r3, [r7, #4]
800038e: e001 b.n 8000394 <toHex+0xce>
}else return false;
8000390: 2300 movs r3, #0
8000392: e02e b.n 80003f2 <toHex+0x12c>
*retval=c1;
8000394: 79fb ldrb r3, [r7, #7]
8000396: b29a uxth r2, r3
8000398: 693b ldr r3, [r7, #16]
800039a: 801a strh r2, [r3, #0]
*retval*=16;
800039c: 693b ldr r3, [r7, #16]
800039e: 881b ldrh r3, [r3, #0]
80003a0: 011b lsls r3, r3, #4
80003a2: b29a uxth r2, r3
80003a4: 693b ldr r3, [r7, #16]
80003a6: 801a strh r2, [r3, #0]
*retval+=c2;
80003a8: 693b ldr r3, [r7, #16]
80003aa: 881a ldrh r2, [r3, #0]
80003ac: 79bb ldrb r3, [r7, #6]
80003ae: b29b uxth r3, r3
80003b0: 4413 add r3, r2
80003b2: b29a uxth r2, r3
80003b4: 693b ldr r3, [r7, #16]
80003b6: 801a strh r2, [r3, #0]
*retval*=16;
80003b8: 693b ldr r3, [r7, #16]
80003ba: 881b ldrh r3, [r3, #0]
80003bc: 011b lsls r3, r3, #4
80003be: b29a uxth r2, r3
80003c0: 693b ldr r3, [r7, #16]
80003c2: 801a strh r2, [r3, #0]
*retval+=c3;
80003c4: 693b ldr r3, [r7, #16]
80003c6: 881a ldrh r2, [r3, #0]
80003c8: 797b ldrb r3, [r7, #5]
80003ca: b29b uxth r3, r3
80003cc: 4413 add r3, r2
80003ce: b29a uxth r2, r3
80003d0: 693b ldr r3, [r7, #16]
80003d2: 801a strh r2, [r3, #0]
*retval*=16;
80003d4: 693b ldr r3, [r7, #16]
80003d6: 881b ldrh r3, [r3, #0]
80003d8: 011b lsls r3, r3, #4
80003da: b29a uxth r2, r3
80003dc: 693b ldr r3, [r7, #16]
80003de: 801a strh r2, [r3, #0]
*retval+=c4;
80003e0: 693b ldr r3, [r7, #16]
80003e2: 881a ldrh r2, [r3, #0]
80003e4: 793b ldrb r3, [r7, #4]
80003e6: b29b uxth r3, r3
80003e8: 4413 add r3, r2
80003ea: b29a uxth r2, r3
80003ec: 693b ldr r3, [r7, #16]
80003ee: 801a strh r2, [r3, #0]
return true;
80003f0: 2301 movs r3, #1
}
80003f2: 4618 mov r0, r3
80003f4: 3708 adds r7, #8
80003f6: 46bd mov sp, r7
80003f8: bc90 pop {r4, r7}
80003fa: 4770 bx lr
080003fc <manageCDC>:
void manageCDC(void){
80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
8000400: b0c1 sub sp, #260 @ 0x104
8000402: af06 add r7, sp, #24
uint16_t val;
uint16_t st;
uint16_t eeadd;
uint8_t i;
if (CDC_Available()) {
8000404: f00d fb12 bl 800da2c <CDC_Available>
8000408: 4603 mov r3, r0
800040a: 2b00 cmp r3, #0
800040c: f000 86c8 beq.w 80011a0 <manageCDC+0xda4>
int rx = CDC_ReadByte();
8000410: f00d fb20 bl 800da54 <CDC_ReadByte>
8000414: f8c7 00e0 str.w r0, [r7, #224] @ 0xe0
if (rx < 0) return;
8000418: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800041c: 2b00 cmp r3, #0
800041e: f2c0 86be blt.w 800119e <manageCDC+0xda2>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
8000422: 4bbd ldr r3, [pc, #756] @ (8000718 <manageCDC+0x31c>)
8000424: 781b ldrb r3, [r3, #0]
8000426: 461a mov r2, r3
8000428: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800042c: b2d9 uxtb r1, r3
800042e: 4bbb ldr r3, [pc, #748] @ (800071c <manageCDC+0x320>)
8000430: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
8000432: bf00 nop
8000434: 4bb8 ldr r3, [pc, #736] @ (8000718 <manageCDC+0x31c>)
8000436: 781b ldrb r3, [r3, #0]
8000438: 461a mov r2, r3
800043a: 4bb8 ldr r3, [pc, #736] @ (800071c <manageCDC+0x320>)
800043c: 4413 add r3, r2
800043e: 2101 movs r1, #1
8000440: 4618 mov r0, r3
8000442: f00d fbc9 bl 800dbd8 <CDC_Transmit_FS>
8000446: 4603 mov r3, r0
8000448: 2b01 cmp r3, #1
800044a: d0f3 beq.n 8000434 <manageCDC+0x38>
if((rx==0x0d)||(rx==0x0a)){
800044c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8000450: 2b0d cmp r3, #13
8000452: d004 beq.n 800045e <manageCDC+0x62>
8000454: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8000458: 2b0a cmp r3, #10
800045a: f040 8699 bne.w 8001190 <manageCDC+0xd94>
if(rxidx){
800045e: 4bae ldr r3, [pc, #696] @ (8000718 <manageCDC+0x31c>)
8000460: 781b ldrb r3, [r3, #0]
8000462: 2b00 cmp r3, #0
8000464: f000 8690 beq.w 8001188 <manageCDC+0xd8c>
switch(rxbuf[0]){
8000468: 4bac ldr r3, [pc, #688] @ (800071c <manageCDC+0x320>)
800046a: 781b ldrb r3, [r3, #0]
800046c: 3b49 subs r3, #73 @ 0x49
800046e: 2b24 cmp r3, #36 @ 0x24
8000470: f200 8678 bhi.w 8001164 <manageCDC+0xd68>
8000474: a201 add r2, pc, #4 @ (adr r2, 800047c <manageCDC+0x80>)
8000476: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800047a: bf00 nop
800047c: 080006c7 .word 0x080006c7
8000480: 08001165 .word 0x08001165
8000484: 08001165 .word 0x08001165
8000488: 08001165 .word 0x08001165
800048c: 08001165 .word 0x08001165
8000490: 08001165 .word 0x08001165
8000494: 08001165 .word 0x08001165
8000498: 08001165 .word 0x08001165
800049c: 08001165 .word 0x08001165
80004a0: 08001165 .word 0x08001165
80004a4: 08001165 .word 0x08001165
80004a8: 08001165 .word 0x08001165
80004ac: 08001165 .word 0x08001165
80004b0: 08001165 .word 0x08001165
80004b4: 08001165 .word 0x08001165
80004b8: 08001165 .word 0x08001165
80004bc: 08001165 .word 0x08001165
80004c0: 08001165 .word 0x08001165
80004c4: 08001165 .word 0x08001165
80004c8: 08001165 .word 0x08001165
80004cc: 08001165 .word 0x08001165
80004d0: 08001165 .word 0x08001165
80004d4: 08001165 .word 0x08001165
80004d8: 08001165 .word 0x08001165
80004dc: 08001165 .word 0x08001165
80004e0: 080006eb .word 0x080006eb
80004e4: 08001165 .word 0x08001165
80004e8: 08001165 .word 0x08001165
80004ec: 080009f5 .word 0x080009f5
80004f0: 08001165 .word 0x08001165
80004f4: 08001165 .word 0x08001165
80004f8: 08001165 .word 0x08001165
80004fc: 08000511 .word 0x08000511
8000500: 08001165 .word 0x08001165
8000504: 08001165 .word 0x08001165
8000508: 08001165 .word 0x08001165
800050c: 080007ad .word 0x080007ad
case 'i':
sprintf((char*)s,"info\n");
8000510: f107 0310 add.w r3, r7, #16
8000514: 4982 ldr r1, [pc, #520] @ (8000720 <manageCDC+0x324>)
8000516: 4618 mov r0, r3
8000518: f00d ff3c bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
800051c: bf00 nop
800051e: f107 0310 add.w r3, r7, #16
8000522: 2105 movs r1, #5
8000524: 4618 mov r0, r3
8000526: f00d fb57 bl 800dbd8 <CDC_Transmit_FS>
800052a: 4603 mov r3, r0
800052c: 2b01 cmp r3, #1
800052e: d0f6 beq.n 800051e <manageCDC+0x122>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
8000530: 2100 movs r1, #0
8000532: 487c ldr r0, [pc, #496] @ (8000724 <manageCDC+0x328>)
8000534: f003 ff28 bl 8004388 <IsPwmRunning>
8000538: 4603 mov r3, r0
800053a: 4698 mov r8, r3
800053c: 2104 movs r1, #4
800053e: 4879 ldr r0, [pc, #484] @ (8000724 <manageCDC+0x328>)
8000540: f003 ff22 bl 8004388 <IsPwmRunning>
8000544: 4603 mov r3, r0
8000546: 4699 mov r9, r3
8000548: 2108 movs r1, #8
800054a: 4876 ldr r0, [pc, #472] @ (8000724 <manageCDC+0x328>)
800054c: f003 ff1c bl 8004388 <IsPwmRunning>
8000550: 4603 mov r3, r0
8000552: 461c mov r4, r3
8000554: 210c movs r1, #12
8000556: 4873 ldr r0, [pc, #460] @ (8000724 <manageCDC+0x328>)
8000558: f003 ff16 bl 8004388 <IsPwmRunning>
800055c: 4603 mov r3, r0
800055e: 461d mov r5, r3
8000560: 2100 movs r1, #0
8000562: 4871 ldr r0, [pc, #452] @ (8000728 <manageCDC+0x32c>)
8000564: f003 ff10 bl 8004388 <IsPwmRunning>
8000568: 4603 mov r3, r0
800056a: 461e mov r6, r3
800056c: 2104 movs r1, #4
800056e: 486e ldr r0, [pc, #440] @ (8000728 <manageCDC+0x32c>)
8000570: f003 ff0a bl 8004388 <IsPwmRunning>
8000574: 4603 mov r3, r0
8000576: 607b str r3, [r7, #4]
8000578: 2108 movs r1, #8
800057a: 486b ldr r0, [pc, #428] @ (8000728 <manageCDC+0x32c>)
800057c: f003 ff04 bl 8004388 <IsPwmRunning>
8000580: 4603 mov r3, r0
8000582: 603b str r3, [r7, #0]
8000584: 210c movs r1, #12
8000586: 4868 ldr r0, [pc, #416] @ (8000728 <manageCDC+0x32c>)
8000588: f003 fefe bl 8004388 <IsPwmRunning>
800058c: 4603 mov r3, r0
800058e: f107 0010 add.w r0, r7, #16
8000592: 9305 str r3, [sp, #20]
8000594: 683a ldr r2, [r7, #0]
8000596: 9204 str r2, [sp, #16]
8000598: 687b ldr r3, [r7, #4]
800059a: 9303 str r3, [sp, #12]
800059c: 9602 str r6, [sp, #8]
800059e: 9501 str r5, [sp, #4]
80005a0: 9400 str r4, [sp, #0]
80005a2: 464b mov r3, r9
80005a4: 4642 mov r2, r8
80005a6: 4961 ldr r1, [pc, #388] @ (800072c <manageCDC+0x330>)
80005a8: f00d fef4 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80005ac: bf00 nop
80005ae: f107 0310 add.w r3, r7, #16
80005b2: 4618 mov r0, r3
80005b4: f7ff fdca bl 800014c <strlen>
80005b8: 4603 mov r3, r0
80005ba: b29a uxth r2, r3
80005bc: f107 0310 add.w r3, r7, #16
80005c0: 4611 mov r1, r2
80005c2: 4618 mov r0, r3
80005c4: f00d fb08 bl 800dbd8 <CDC_Transmit_FS>
80005c8: 4603 mov r3, r0
80005ca: 2b01 cmp r3, #1
80005cc: d0ef beq.n 80005ae <manageCDC+0x1b2>
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
80005ce: 4b55 ldr r3, [pc, #340] @ (8000724 <manageCDC+0x328>)
80005d0: 681b ldr r3, [r3, #0]
80005d2: 6b5b ldr r3, [r3, #52] @ 0x34
80005d4: 607b str r3, [r7, #4]
80005d6: 4b53 ldr r3, [pc, #332] @ (8000724 <manageCDC+0x328>)
80005d8: 681b ldr r3, [r3, #0]
80005da: 6b99 ldr r1, [r3, #56] @ 0x38
80005dc: 6039 str r1, [r7, #0]
80005de: 4b51 ldr r3, [pc, #324] @ (8000724 <manageCDC+0x328>)
80005e0: 681b ldr r3, [r3, #0]
80005e2: 6bdb ldr r3, [r3, #60] @ 0x3c
80005e4: 4a4f ldr r2, [pc, #316] @ (8000724 <manageCDC+0x328>)
80005e6: 6812 ldr r2, [r2, #0]
80005e8: 6c12 ldr r2, [r2, #64] @ 0x40
80005ea: 494f ldr r1, [pc, #316] @ (8000728 <manageCDC+0x32c>)
80005ec: 6809 ldr r1, [r1, #0]
80005ee: 6b49 ldr r1, [r1, #52] @ 0x34
80005f0: 484d ldr r0, [pc, #308] @ (8000728 <manageCDC+0x32c>)
80005f2: 6800 ldr r0, [r0, #0]
80005f4: 6b80 ldr r0, [r0, #56] @ 0x38
80005f6: 4c4c ldr r4, [pc, #304] @ (8000728 <manageCDC+0x32c>)
80005f8: 6824 ldr r4, [r4, #0]
80005fa: 6be4 ldr r4, [r4, #60] @ 0x3c
80005fc: 4d4a ldr r5, [pc, #296] @ (8000728 <manageCDC+0x32c>)
80005fe: 682d ldr r5, [r5, #0]
8000600: 6c2d ldr r5, [r5, #64] @ 0x40
8000602: f107 0610 add.w r6, r7, #16
8000606: 9505 str r5, [sp, #20]
8000608: 9404 str r4, [sp, #16]
800060a: 9003 str r0, [sp, #12]
800060c: 9102 str r1, [sp, #8]
800060e: 9201 str r2, [sp, #4]
8000610: 9300 str r3, [sp, #0]
8000612: 683b ldr r3, [r7, #0]
8000614: 687a ldr r2, [r7, #4]
8000616: 4946 ldr r1, [pc, #280] @ (8000730 <manageCDC+0x334>)
8000618: 4630 mov r0, r6
800061a: f00d febb bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800061e: bf00 nop
8000620: f107 0310 add.w r3, r7, #16
8000624: 4618 mov r0, r3
8000626: f7ff fd91 bl 800014c <strlen>
800062a: 4603 mov r3, r0
800062c: b29a uxth r2, r3
800062e: f107 0310 add.w r3, r7, #16
8000632: 4611 mov r1, r2
8000634: 4618 mov r0, r3
8000636: f00d facf bl 800dbd8 <CDC_Transmit_FS>
800063a: 4603 mov r3, r0
800063c: 2b01 cmp r3, #1
800063e: d0ef beq.n 8000620 <manageCDC+0x224>
sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8);
8000640: 4b3c ldr r3, [pc, #240] @ (8000734 <manageCDC+0x338>)
8000642: 781b ldrb r3, [r3, #0]
8000644: 461d mov r5, r3
8000646: 4b3c ldr r3, [pc, #240] @ (8000738 <manageCDC+0x33c>)
8000648: 881b ldrh r3, [r3, #0]
800064a: 461e mov r6, r3
800064c: 4b3b ldr r3, [pc, #236] @ (800073c <manageCDC+0x340>)
800064e: 881b ldrh r3, [r3, #0]
8000650: 461a mov r2, r3
8000652: 4b3b ldr r3, [pc, #236] @ (8000740 <manageCDC+0x344>)
8000654: 881b ldrh r3, [r3, #0]
8000656: 4619 mov r1, r3
8000658: 4b3a ldr r3, [pc, #232] @ (8000744 <manageCDC+0x348>)
800065a: 881b ldrh r3, [r3, #0]
800065c: 461c mov r4, r3
800065e: 4b3a ldr r3, [pc, #232] @ (8000748 <manageCDC+0x34c>)
8000660: 881b ldrh r3, [r3, #0]
8000662: f107 0010 add.w r0, r7, #16
8000666: 9303 str r3, [sp, #12]
8000668: 9402 str r4, [sp, #8]
800066a: 9101 str r1, [sp, #4]
800066c: 9200 str r2, [sp, #0]
800066e: 4633 mov r3, r6
8000670: 462a mov r2, r5
8000672: 4936 ldr r1, [pc, #216] @ (800074c <manageCDC+0x350>)
8000674: f00d fe8e bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000678: bf00 nop
800067a: f107 0310 add.w r3, r7, #16
800067e: 4618 mov r0, r3
8000680: f7ff fd64 bl 800014c <strlen>
8000684: 4603 mov r3, r0
8000686: b29a uxth r2, r3
8000688: f107 0310 add.w r3, r7, #16
800068c: 4611 mov r1, r2
800068e: 4618 mov r0, r3
8000690: f00d faa2 bl 800dbd8 <CDC_Transmit_FS>
8000694: 4603 mov r3, r0
8000696: 2b01 cmp r3, #1
8000698: d0ef beq.n 800067a <manageCDC+0x27e>
sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti);
800069a: 4b2d ldr r3, [pc, #180] @ (8000750 <manageCDC+0x354>)
800069c: 781b ldrb r3, [r3, #0]
800069e: 461a mov r2, r3
80006a0: 4b2c ldr r3, [pc, #176] @ (8000754 <manageCDC+0x358>)
80006a2: 781b ldrb r3, [r3, #0]
80006a4: f107 0010 add.w r0, r7, #16
80006a8: 492b ldr r1, [pc, #172] @ (8000758 <manageCDC+0x35c>)
80006aa: f00d fe73 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 31) == USBD_BUSY);
80006ae: bf00 nop
80006b0: f107 0310 add.w r3, r7, #16
80006b4: 211f movs r1, #31
80006b6: 4618 mov r0, r3
80006b8: f00d fa8e bl 800dbd8 <CDC_Transmit_FS>
80006bc: 4603 mov r3, r0
80006be: 2b01 cmp r3, #1
80006c0: d0f6 beq.n 80006b0 <manageCDC+0x2b4>
break;
80006c2: f000 bd61 b.w 8001188 <manageCDC+0xd8c>
case 'I':
sprintf((char*)s,"\nID000000");
80006c6: f107 0310 add.w r3, r7, #16
80006ca: 4924 ldr r1, [pc, #144] @ (800075c <manageCDC+0x360>)
80006cc: 4618 mov r0, r3
80006ce: f00d fe61 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 9) == USBD_BUSY);
80006d2: bf00 nop
80006d4: f107 0310 add.w r3, r7, #16
80006d8: 2109 movs r1, #9
80006da: 4618 mov r0, r3
80006dc: f00d fa7c bl 800dbd8 <CDC_Transmit_FS>
80006e0: 4603 mov r3, r0
80006e2: 2b01 cmp r3, #1
80006e4: d0f6 beq.n 80006d4 <manageCDC+0x2d8>
break;
80006e6: f000 bd4f b.w 8001188 <manageCDC+0xd8c>
case 'b':
if(rxidx==2){
80006ea: 4b0b ldr r3, [pc, #44] @ (8000718 <manageCDC+0x31c>)
80006ec: 781b ldrb r3, [r3, #0]
80006ee: 2b02 cmp r3, #2
80006f0: d14a bne.n 8000788 <manageCDC+0x38c>
if(rxbuf[1]=='0'){
80006f2: 4b0a ldr r3, [pc, #40] @ (800071c <manageCDC+0x320>)
80006f4: 785b ldrb r3, [r3, #1]
80006f6: 2b30 cmp r3, #48 @ 0x30
80006f8: d104 bne.n 8000704 <manageCDC+0x308>
nobuz=false;
80006fa: 4b19 ldr r3, [pc, #100] @ (8000760 <manageCDC+0x364>)
80006fc: 2200 movs r2, #0
80006fe: 701a strb r2, [r3, #0]
}
}else{
sprintf((char*)s,"\nb0|1");
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
}
break;
8000700: f000 bd42 b.w 8001188 <manageCDC+0xd8c>
}else if(rxbuf[1]=='1'){
8000704: 4b05 ldr r3, [pc, #20] @ (800071c <manageCDC+0x320>)
8000706: 785b ldrb r3, [r3, #1]
8000708: 2b31 cmp r3, #49 @ 0x31
800070a: d12b bne.n 8000764 <manageCDC+0x368>
nobuz=true;
800070c: 4b14 ldr r3, [pc, #80] @ (8000760 <manageCDC+0x364>)
800070e: 2201 movs r2, #1
8000710: 701a strb r2, [r3, #0]
break;
8000712: f000 bd39 b.w 8001188 <manageCDC+0xd8c>
8000716: bf00 nop
8000718: 20000234 .word 0x20000234
800071c: 20000238 .word 0x20000238
8000720: 0800ed0c .word 0x0800ed0c
8000724: 20000318 .word 0x20000318
8000728: 20000360 .word 0x20000360
800072c: 0800ed14 .word 0x0800ed14
8000730: 0800ed2c .word 0x0800ed2c
8000734: 200003f0 .word 0x200003f0
8000738: 2000022a .word 0x2000022a
800073c: 2000022c .word 0x2000022c
8000740: 2000022e .word 0x2000022e
8000744: 20000230 .word 0x20000230
8000748: 20000232 .word 0x20000232
800074c: 0800ed60 .word 0x0800ed60
8000750: 20000456 .word 0x20000456
8000754: 20000454 .word 0x20000454
8000758: 0800ed98 .word 0x0800ed98
800075c: 0800edb8 .word 0x0800edb8
8000760: 20000458 .word 0x20000458
sprintf((char*)s,"\nb0|1");
8000764: f107 0310 add.w r3, r7, #16
8000768: 499b ldr r1, [pc, #620] @ (80009d8 <manageCDC+0x5dc>)
800076a: 4618 mov r0, r3
800076c: f00d fe12 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000770: bf00 nop
8000772: f107 0310 add.w r3, r7, #16
8000776: 2105 movs r1, #5
8000778: 4618 mov r0, r3
800077a: f00d fa2d bl 800dbd8 <CDC_Transmit_FS>
800077e: 4603 mov r3, r0
8000780: 2b01 cmp r3, #1
8000782: d0f6 beq.n 8000772 <manageCDC+0x376>
break;
8000784: f000 bd00 b.w 8001188 <manageCDC+0xd8c>
sprintf((char*)s,"\nb0|1");
8000788: f107 0310 add.w r3, r7, #16
800078c: 4992 ldr r1, [pc, #584] @ (80009d8 <manageCDC+0x5dc>)
800078e: 4618 mov r0, r3
8000790: f00d fe00 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000794: bf00 nop
8000796: f107 0310 add.w r3, r7, #16
800079a: 2105 movs r1, #5
800079c: 4618 mov r0, r3
800079e: f00d fa1b bl 800dbd8 <CDC_Transmit_FS>
80007a2: 4603 mov r3, r0
80007a4: 2b01 cmp r3, #1
80007a6: d0f6 beq.n 8000796 <manageCDC+0x39a>
break;
80007a8: f000 bcee b.w 8001188 <manageCDC+0xd8c>
case 'm':
if(rxidx==8){
80007ac: 4b8b ldr r3, [pc, #556] @ (80009dc <manageCDC+0x5e0>)
80007ae: 781b ldrb r3, [r3, #0]
80007b0: 2b08 cmp r3, #8
80007b2: f040 80fe bne.w 80009b2 <manageCDC+0x5b6>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
80007b6: 4b8a ldr r3, [pc, #552] @ (80009e0 <manageCDC+0x5e4>)
80007b8: 785b ldrb r3, [r3, #1]
80007ba: 2b30 cmp r3, #48 @ 0x30
80007bc: f240 80e8 bls.w 8000990 <manageCDC+0x594>
80007c0: 4b87 ldr r3, [pc, #540] @ (80009e0 <manageCDC+0x5e4>)
80007c2: 785b ldrb r3, [r3, #1]
80007c4: 2b34 cmp r3, #52 @ 0x34
80007c6: f200 80e3 bhi.w 8000990 <manageCDC+0x594>
mot=rxbuf[1]-='0';
80007ca: 4b85 ldr r3, [pc, #532] @ (80009e0 <manageCDC+0x5e4>)
80007cc: 785b ldrb r3, [r3, #1]
80007ce: 3b30 subs r3, #48 @ 0x30
80007d0: b2da uxtb r2, r3
80007d2: 4b83 ldr r3, [pc, #524] @ (80009e0 <manageCDC+0x5e4>)
80007d4: 705a strb r2, [r3, #1]
80007d6: 4b82 ldr r3, [pc, #520] @ (80009e0 <manageCDC+0x5e4>)
80007d8: 785b ldrb r3, [r3, #1]
80007da: f887 30df strb.w r3, [r7, #223] @ 0xdf
if(rxbuf[2]=='f'){
80007de: 4b80 ldr r3, [pc, #512] @ (80009e0 <manageCDC+0x5e4>)
80007e0: 789b ldrb r3, [r3, #2]
80007e2: 2b66 cmp r3, #102 @ 0x66
80007e4: d103 bne.n 80007ee <manageCDC+0x3f2>
dir=FW;
80007e6: 2300 movs r3, #0
80007e8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7
80007ec: e019 b.n 8000822 <manageCDC+0x426>
}else if(rxbuf[2]=='b'){
80007ee: 4b7c ldr r3, [pc, #496] @ (80009e0 <manageCDC+0x5e4>)
80007f0: 789b ldrb r3, [r3, #2]
80007f2: 2b62 cmp r3, #98 @ 0x62
80007f4: d103 bne.n 80007fe <manageCDC+0x402>
dir=BW;
80007f6: 2301 movs r3, #1
80007f8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7
80007fc: e011 b.n 8000822 <manageCDC+0x426>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
80007fe: f107 0310 add.w r3, r7, #16
8000802: 4978 ldr r1, [pc, #480] @ (80009e4 <manageCDC+0x5e8>)
8000804: 4618 mov r0, r3
8000806: f00d fdc5 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
800080a: bf00 nop
800080c: f107 0310 add.w r3, r7, #16
8000810: 2110 movs r1, #16
8000812: 4618 mov r0, r3
8000814: f00d f9e0 bl 800dbd8 <CDC_Transmit_FS>
8000818: 4603 mov r3, r0
800081a: 2b01 cmp r3, #1
800081c: d0f6 beq.n 800080c <manageCDC+0x410>
break;
800081e: f000 bcb3 b.w 8001188 <manageCDC+0xd8c>
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000822: 4b6f ldr r3, [pc, #444] @ (80009e0 <manageCDC+0x5e4>)
8000824: 78db ldrb r3, [r3, #3]
8000826: 2b2f cmp r3, #47 @ 0x2f
8000828: f240 80a1 bls.w 800096e <manageCDC+0x572>
800082c: 4b6c ldr r3, [pc, #432] @ (80009e0 <manageCDC+0x5e4>)
800082e: 78db ldrb r3, [r3, #3]
8000830: 2b39 cmp r3, #57 @ 0x39
8000832: f200 809c bhi.w 800096e <manageCDC+0x572>
8000836: 4b6a ldr r3, [pc, #424] @ (80009e0 <manageCDC+0x5e4>)
8000838: 791b ldrb r3, [r3, #4]
800083a: 2b2f cmp r3, #47 @ 0x2f
800083c: f240 8097 bls.w 800096e <manageCDC+0x572>
8000840: 4b67 ldr r3, [pc, #412] @ (80009e0 <manageCDC+0x5e4>)
8000842: 791b ldrb r3, [r3, #4]
8000844: 2b39 cmp r3, #57 @ 0x39
8000846: f200 8092 bhi.w 800096e <manageCDC+0x572>
800084a: 4b65 ldr r3, [pc, #404] @ (80009e0 <manageCDC+0x5e4>)
800084c: 795b ldrb r3, [r3, #5]
800084e: 2b2f cmp r3, #47 @ 0x2f
8000850: f240 808d bls.w 800096e <manageCDC+0x572>
8000854: 4b62 ldr r3, [pc, #392] @ (80009e0 <manageCDC+0x5e4>)
8000856: 795b ldrb r3, [r3, #5]
8000858: 2b39 cmp r3, #57 @ 0x39
800085a: f200 8088 bhi.w 800096e <manageCDC+0x572>
800085e: 4b60 ldr r3, [pc, #384] @ (80009e0 <manageCDC+0x5e4>)
8000860: 799b ldrb r3, [r3, #6]
8000862: 2b2f cmp r3, #47 @ 0x2f
8000864: f240 8083 bls.w 800096e <manageCDC+0x572>
8000868: 4b5d ldr r3, [pc, #372] @ (80009e0 <manageCDC+0x5e4>)
800086a: 799b ldrb r3, [r3, #6]
800086c: 2b39 cmp r3, #57 @ 0x39
800086e: d87e bhi.n 800096e <manageCDC+0x572>
8000870: 4b5b ldr r3, [pc, #364] @ (80009e0 <manageCDC+0x5e4>)
8000872: 79db ldrb r3, [r3, #7]
8000874: 2b2f cmp r3, #47 @ 0x2f
8000876: d97a bls.n 800096e <manageCDC+0x572>
8000878: 4b59 ldr r3, [pc, #356] @ (80009e0 <manageCDC+0x5e4>)
800087a: 79db ldrb r3, [r3, #7]
800087c: 2b39 cmp r3, #57 @ 0x39
800087e: d876 bhi.n 800096e <manageCDC+0x572>
dm=rxbuf[3]-='0';
8000880: 4b57 ldr r3, [pc, #348] @ (80009e0 <manageCDC+0x5e4>)
8000882: 78db ldrb r3, [r3, #3]
8000884: 3b30 subs r3, #48 @ 0x30
8000886: b2da uxtb r2, r3
8000888: 4b55 ldr r3, [pc, #340] @ (80009e0 <manageCDC+0x5e4>)
800088a: 70da strb r2, [r3, #3]
800088c: 4b54 ldr r3, [pc, #336] @ (80009e0 <manageCDC+0x5e4>)
800088e: 78db ldrb r3, [r3, #3]
8000890: f887 30de strb.w r3, [r7, #222] @ 0xde
m=rxbuf[4]-='0';
8000894: 4b52 ldr r3, [pc, #328] @ (80009e0 <manageCDC+0x5e4>)
8000896: 791b ldrb r3, [r3, #4]
8000898: 3b30 subs r3, #48 @ 0x30
800089a: b2da uxtb r2, r3
800089c: 4b50 ldr r3, [pc, #320] @ (80009e0 <manageCDC+0x5e4>)
800089e: 711a strb r2, [r3, #4]
80008a0: 4b4f ldr r3, [pc, #316] @ (80009e0 <manageCDC+0x5e4>)
80008a2: 791b ldrb r3, [r3, #4]
80008a4: f887 30dd strb.w r3, [r7, #221] @ 0xdd
c=rxbuf[5]-='0';
80008a8: 4b4d ldr r3, [pc, #308] @ (80009e0 <manageCDC+0x5e4>)
80008aa: 795b ldrb r3, [r3, #5]
80008ac: 3b30 subs r3, #48 @ 0x30
80008ae: b2da uxtb r2, r3
80008b0: 4b4b ldr r3, [pc, #300] @ (80009e0 <manageCDC+0x5e4>)
80008b2: 715a strb r2, [r3, #5]
80008b4: 4b4a ldr r3, [pc, #296] @ (80009e0 <manageCDC+0x5e4>)
80008b6: 795b ldrb r3, [r3, #5]
80008b8: f887 30dc strb.w r3, [r7, #220] @ 0xdc
d=rxbuf[6]-='0';
80008bc: 4b48 ldr r3, [pc, #288] @ (80009e0 <manageCDC+0x5e4>)
80008be: 799b ldrb r3, [r3, #6]
80008c0: 3b30 subs r3, #48 @ 0x30
80008c2: b2da uxtb r2, r3
80008c4: 4b46 ldr r3, [pc, #280] @ (80009e0 <manageCDC+0x5e4>)
80008c6: 719a strb r2, [r3, #6]
80008c8: 4b45 ldr r3, [pc, #276] @ (80009e0 <manageCDC+0x5e4>)
80008ca: 799b ldrb r3, [r3, #6]
80008cc: f887 30db strb.w r3, [r7, #219] @ 0xdb
u=rxbuf[7]-='0';
80008d0: 4b43 ldr r3, [pc, #268] @ (80009e0 <manageCDC+0x5e4>)
80008d2: 79db ldrb r3, [r3, #7]
80008d4: 3b30 subs r3, #48 @ 0x30
80008d6: b2da uxtb r2, r3
80008d8: 4b41 ldr r3, [pc, #260] @ (80009e0 <manageCDC+0x5e4>)
80008da: 71da strb r2, [r3, #7]
80008dc: 4b40 ldr r3, [pc, #256] @ (80009e0 <manageCDC+0x5e4>)
80008de: 79db ldrb r3, [r3, #7]
80008e0: f887 30da strb.w r3, [r7, #218] @ 0xda
val=dm;
80008e4: f897 30de ldrb.w r3, [r7, #222] @ 0xde
80008e8: b29b uxth r3, r3
80008ea: 81fb strh r3, [r7, #14]
val*=10;
80008ec: 89fb ldrh r3, [r7, #14]
80008ee: 461a mov r2, r3
80008f0: 0092 lsls r2, r2, #2
80008f2: 4413 add r3, r2
80008f4: 005b lsls r3, r3, #1
80008f6: b29b uxth r3, r3
80008f8: 81fb strh r3, [r7, #14]
val+=m;
80008fa: f897 30dd ldrb.w r3, [r7, #221] @ 0xdd
80008fe: b29a uxth r2, r3
8000900: 89fb ldrh r3, [r7, #14]
8000902: 4413 add r3, r2
8000904: b29b uxth r3, r3
8000906: 81fb strh r3, [r7, #14]
val*=10;
8000908: 89fb ldrh r3, [r7, #14]
800090a: 461a mov r2, r3
800090c: 0092 lsls r2, r2, #2
800090e: 4413 add r3, r2
8000910: 005b lsls r3, r3, #1
8000912: b29b uxth r3, r3
8000914: 81fb strh r3, [r7, #14]
val+=c;
8000916: f897 30dc ldrb.w r3, [r7, #220] @ 0xdc
800091a: b29a uxth r2, r3
800091c: 89fb ldrh r3, [r7, #14]
800091e: 4413 add r3, r2
8000920: b29b uxth r3, r3
8000922: 81fb strh r3, [r7, #14]
val*=10;
8000924: 89fb ldrh r3, [r7, #14]
8000926: 461a mov r2, r3
8000928: 0092 lsls r2, r2, #2
800092a: 4413 add r3, r2
800092c: 005b lsls r3, r3, #1
800092e: b29b uxth r3, r3
8000930: 81fb strh r3, [r7, #14]
val+=d;
8000932: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
8000936: b29a uxth r2, r3
8000938: 89fb ldrh r3, [r7, #14]
800093a: 4413 add r3, r2
800093c: b29b uxth r3, r3
800093e: 81fb strh r3, [r7, #14]
val*=10;
8000940: 89fb ldrh r3, [r7, #14]
8000942: 461a mov r2, r3
8000944: 0092 lsls r2, r2, #2
8000946: 4413 add r3, r2
8000948: 005b lsls r3, r3, #1
800094a: b29b uxth r3, r3
800094c: 81fb strh r3, [r7, #14]
val+=u;
800094e: f897 30da ldrb.w r3, [r7, #218] @ 0xda
8000952: b29a uxth r2, r3
8000954: 89fb ldrh r3, [r7, #14]
8000956: 4413 add r3, r2
8000958: b29b uxth r3, r3
800095a: 81fb strh r3, [r7, #14]
SetMot(mot,dir,val);
800095c: 89fa ldrh r2, [r7, #14]
800095e: f897 10e7 ldrb.w r1, [r7, #231] @ 0xe7
8000962: f897 30df ldrb.w r3, [r7, #223] @ 0xdf
8000966: 4618 mov r0, r3
8000968: f003 fd84 bl 8004474 <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800096c: e032 b.n 80009d4 <manageCDC+0x5d8>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
800096e: f107 0310 add.w r3, r7, #16
8000972: 491d ldr r1, [pc, #116] @ (80009e8 <manageCDC+0x5ec>)
8000974: 4618 mov r0, r3
8000976: f00d fd0d bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800097a: bf00 nop
800097c: f107 0310 add.w r3, r7, #16
8000980: 2113 movs r1, #19
8000982: 4618 mov r0, r3
8000984: f00d f928 bl 800dbd8 <CDC_Transmit_FS>
8000988: 4603 mov r3, r0
800098a: 2b01 cmp r3, #1
800098c: d0f6 beq.n 800097c <manageCDC+0x580>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800098e: e021 b.n 80009d4 <manageCDC+0x5d8>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
8000990: f107 0310 add.w r3, r7, #16
8000994: 4915 ldr r1, [pc, #84] @ (80009ec <manageCDC+0x5f0>)
8000996: 4618 mov r0, r3
8000998: f00d fcfc bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800099c: bf00 nop
800099e: f107 0310 add.w r3, r7, #16
80009a2: 2113 movs r1, #19
80009a4: 4618 mov r0, r3
80009a6: f00d f917 bl 800dbd8 <CDC_Transmit_FS>
80009aa: 4603 mov r3, r0
80009ac: 2b01 cmp r3, #1
80009ae: d0f6 beq.n 800099e <manageCDC+0x5a2>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
80009b0: e3ea b.n 8001188 <manageCDC+0xd8c>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
80009b2: f107 0310 add.w r3, r7, #16
80009b6: 490e ldr r1, [pc, #56] @ (80009f0 <manageCDC+0x5f4>)
80009b8: 4618 mov r0, r3
80009ba: f00d fceb bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80009be: bf00 nop
80009c0: f107 0310 add.w r3, r7, #16
80009c4: 210a movs r1, #10
80009c6: 4618 mov r0, r3
80009c8: f00d f906 bl 800dbd8 <CDC_Transmit_FS>
80009cc: 4603 mov r3, r0
80009ce: 2b01 cmp r3, #1
80009d0: d0f6 beq.n 80009c0 <manageCDC+0x5c4>
break;
80009d2: e3d9 b.n 8001188 <manageCDC+0xd8c>
80009d4: e3d8 b.n 8001188 <manageCDC+0xd8c>
80009d6: bf00 nop
80009d8: 0800edc4 .word 0x0800edc4
80009dc: 20000234 .word 0x20000234
80009e0: 20000238 .word 0x20000238
80009e4: 0800edcc .word 0x0800edcc
80009e8: 0800ede0 .word 0x0800ede0
80009ec: 0800ee00 .word 0x0800ee00
80009f0: 0800ee14 .word 0x0800ee14
case 'e':
if(rxidx>1){
80009f4: 4bbb ldr r3, [pc, #748] @ (8000ce4 <manageCDC+0x8e8>)
80009f6: 781b ldrb r3, [r3, #0]
80009f8: 2b01 cmp r3, #1
80009fa: f240 839b bls.w 8001134 <manageCDC+0xd38>
if(rxbuf[1]=='r'){
80009fe: 4bba ldr r3, [pc, #744] @ (8000ce8 <manageCDC+0x8ec>)
8000a00: 785b ldrb r3, [r3, #1]
8000a02: 2b72 cmp r3, #114 @ 0x72
8000a04: f040 8086 bne.w 8000b14 <manageCDC+0x718>
if(rxidx==4){
8000a08: 4bb6 ldr r3, [pc, #728] @ (8000ce4 <manageCDC+0x8e8>)
8000a0a: 781b ldrb r3, [r3, #0]
8000a0c: 2b04 cmp r3, #4
8000a0e: d169 bne.n 8000ae4 <manageCDC+0x6e8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000a10: 4bb5 ldr r3, [pc, #724] @ (8000ce8 <manageCDC+0x8ec>)
8000a12: 789a ldrb r2, [r3, #2]
8000a14: 4bb4 ldr r3, [pc, #720] @ (8000ce8 <manageCDC+0x8ec>)
8000a16: 78d9 ldrb r1, [r3, #3]
8000a18: f107 030c add.w r3, r7, #12
8000a1c: 9300 str r3, [sp, #0]
8000a1e: 460b mov r3, r1
8000a20: 2130 movs r1, #48 @ 0x30
8000a22: 2030 movs r0, #48 @ 0x30
8000a24: f7ff fc4f bl 80002c6 <toHex>
8000a28: 4603 mov r3, r0
8000a2a: 2b00 cmp r3, #0
8000a2c: d042 beq.n 8000ab4 <manageCDC+0x6b8>
st=EEW_Read(eeadd, &val);
8000a2e: 89bb ldrh r3, [r7, #12]
8000a30: b2db uxtb r3, r3
8000a32: f107 020e add.w r2, r7, #14
8000a36: 4611 mov r1, r2
8000a38: 4618 mov r0, r3
8000a3a: f7ff fc1b bl 8000274 <EEW_Read>
8000a3e: 4603 mov r3, r0
8000a40: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK){
8000a44: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000a48: 2b00 cmp r3, #0
8000a4a: d119 bne.n 8000a80 <manageCDC+0x684>
sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val);
8000a4c: 89bb ldrh r3, [r7, #12]
8000a4e: 461a mov r2, r3
8000a50: 89fb ldrh r3, [r7, #14]
8000a52: f107 0010 add.w r0, r7, #16
8000a56: 49a5 ldr r1, [pc, #660] @ (8000cec <manageCDC+0x8f0>)
8000a58: f00d fc9c bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a5c: bf00 nop
8000a5e: f107 0310 add.w r3, r7, #16
8000a62: 4618 mov r0, r3
8000a64: f7ff fb72 bl 800014c <strlen>
8000a68: 4603 mov r3, r0
8000a6a: b29a uxth r2, r3
8000a6c: f107 0310 add.w r3, r7, #16
8000a70: 4611 mov r1, r2
8000a72: 4618 mov r0, r3
8000a74: f00d f8b0 bl 800dbd8 <CDC_Transmit_FS>
8000a78: 4603 mov r3, r0
8000a7a: 2b01 cmp r3, #1
8000a7c: d0ef beq.n 8000a5e <manageCDC+0x662>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
8000a7e: e382 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\nee read error %d",st);
8000a80: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000a84: f107 0310 add.w r3, r7, #16
8000a88: 4999 ldr r1, [pc, #612] @ (8000cf0 <manageCDC+0x8f4>)
8000a8a: 4618 mov r0, r3
8000a8c: f00d fc82 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a90: bf00 nop
8000a92: f107 0310 add.w r3, r7, #16
8000a96: 4618 mov r0, r3
8000a98: f7ff fb58 bl 800014c <strlen>
8000a9c: 4603 mov r3, r0
8000a9e: b29a uxth r2, r3
8000aa0: f107 0310 add.w r3, r7, #16
8000aa4: 4611 mov r1, r2
8000aa6: 4618 mov r0, r3
8000aa8: f00d f896 bl 800dbd8 <CDC_Transmit_FS>
8000aac: 4603 mov r3, r0
8000aae: 2b01 cmp r3, #1
8000ab0: d0ef beq.n 8000a92 <manageCDC+0x696>
break;
8000ab2: e368 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?eraa hex values");
8000ab4: f107 0310 add.w r3, r7, #16
8000ab8: 498e ldr r1, [pc, #568] @ (8000cf4 <manageCDC+0x8f8>)
8000aba: 4618 mov r0, r3
8000abc: f00d fc6a bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ac0: bf00 nop
8000ac2: f107 0310 add.w r3, r7, #16
8000ac6: 4618 mov r0, r3
8000ac8: f7ff fb40 bl 800014c <strlen>
8000acc: 4603 mov r3, r0
8000ace: b29a uxth r2, r3
8000ad0: f107 0310 add.w r3, r7, #16
8000ad4: 4611 mov r1, r2
8000ad6: 4618 mov r0, r3
8000ad8: f00d f87e bl 800dbd8 <CDC_Transmit_FS>
8000adc: 4603 mov r3, r0
8000ade: 2b01 cmp r3, #1
8000ae0: d0ef beq.n 8000ac2 <manageCDC+0x6c6>
break;
8000ae2: e350 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?eraa");
8000ae4: f107 0310 add.w r3, r7, #16
8000ae8: 4983 ldr r1, [pc, #524] @ (8000cf8 <manageCDC+0x8fc>)
8000aea: 4618 mov r0, r3
8000aec: f00d fc52 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000af0: bf00 nop
8000af2: f107 0310 add.w r3, r7, #16
8000af6: 4618 mov r0, r3
8000af8: f7ff fb28 bl 800014c <strlen>
8000afc: 4603 mov r3, r0
8000afe: b29a uxth r2, r3
8000b00: f107 0310 add.w r3, r7, #16
8000b04: 4611 mov r1, r2
8000b06: 4618 mov r0, r3
8000b08: f00d f866 bl 800dbd8 <CDC_Transmit_FS>
8000b0c: 4603 mov r3, r0
8000b0e: 2b01 cmp r3, #1
8000b10: d0ef beq.n 8000af2 <manageCDC+0x6f6>
break;
8000b12: e338 b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='w'){
8000b14: 4b74 ldr r3, [pc, #464] @ (8000ce8 <manageCDC+0x8ec>)
8000b16: 785b ldrb r3, [r3, #1]
8000b18: 2b77 cmp r3, #119 @ 0x77
8000b1a: d169 bne.n 8000bf0 <manageCDC+0x7f4>
if(rxidx==8){
8000b1c: 4b71 ldr r3, [pc, #452] @ (8000ce4 <manageCDC+0x8e8>)
8000b1e: 781b ldrb r3, [r3, #0]
8000b20: 2b08 cmp r3, #8
8000b22: d14d bne.n 8000bc0 <manageCDC+0x7c4>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000b24: 4b70 ldr r3, [pc, #448] @ (8000ce8 <manageCDC+0x8ec>)
8000b26: 789a ldrb r2, [r3, #2]
8000b28: 4b6f ldr r3, [pc, #444] @ (8000ce8 <manageCDC+0x8ec>)
8000b2a: 78d9 ldrb r1, [r3, #3]
8000b2c: f107 030c add.w r3, r7, #12
8000b30: 9300 str r3, [sp, #0]
8000b32: 460b mov r3, r1
8000b34: 2130 movs r1, #48 @ 0x30
8000b36: 2030 movs r0, #48 @ 0x30
8000b38: f7ff fbc5 bl 80002c6 <toHex>
8000b3c: 4603 mov r3, r0
8000b3e: 2b00 cmp r3, #0
8000b40: d037 beq.n 8000bb2 <manageCDC+0x7b6>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
8000b42: 4b69 ldr r3, [pc, #420] @ (8000ce8 <manageCDC+0x8ec>)
8000b44: 7918 ldrb r0, [r3, #4]
8000b46: 4b68 ldr r3, [pc, #416] @ (8000ce8 <manageCDC+0x8ec>)
8000b48: 7959 ldrb r1, [r3, #5]
8000b4a: 4b67 ldr r3, [pc, #412] @ (8000ce8 <manageCDC+0x8ec>)
8000b4c: 799a ldrb r2, [r3, #6]
8000b4e: 4b66 ldr r3, [pc, #408] @ (8000ce8 <manageCDC+0x8ec>)
8000b50: 79dc ldrb r4, [r3, #7]
8000b52: f107 030e add.w r3, r7, #14
8000b56: 9300 str r3, [sp, #0]
8000b58: 4623 mov r3, r4
8000b5a: f7ff fbb4 bl 80002c6 <toHex>
8000b5e: 4603 mov r3, r0
8000b60: 2b00 cmp r3, #0
8000b62: d01f beq.n 8000ba4 <manageCDC+0x7a8>
st=EEW_Write(eeadd, val);
8000b64: 89bb ldrh r3, [r7, #12]
8000b66: b2db uxtb r3, r3
8000b68: 89fa ldrh r2, [r7, #14]
8000b6a: 4611 mov r1, r2
8000b6c: 4618 mov r0, r3
8000b6e: f7ff fb94 bl 800029a <EEW_Write>
8000b72: 4603 mov r3, r0
8000b74: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val);
8000b78: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000b7c: 2b00 cmp r3, #0
8000b7e: d108 bne.n 8000b92 <manageCDC+0x796>
8000b80: 89bb ldrh r3, [r7, #12]
8000b82: 461a mov r2, r3
8000b84: 89fb ldrh r3, [r7, #14]
8000b86: f107 0010 add.w r0, r7, #16
8000b8a: 495c ldr r1, [pc, #368] @ (8000cfc <manageCDC+0x900>)
8000b8c: f00d fc02 bl 800e394 <siprintf>
8000b90: e01c b.n 8000bcc <manageCDC+0x7d0>
else sprintf((char*)s,"\nee write error %d", st);
8000b92: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000b96: f107 0310 add.w r3, r7, #16
8000b9a: 4959 ldr r1, [pc, #356] @ (8000d00 <manageCDC+0x904>)
8000b9c: 4618 mov r0, r3
8000b9e: f00d fbf9 bl 800e394 <siprintf>
8000ba2: e013 b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaavvvv hex values");
8000ba4: f107 0310 add.w r3, r7, #16
8000ba8: 4956 ldr r1, [pc, #344] @ (8000d04 <manageCDC+0x908>)
8000baa: 4618 mov r0, r3
8000bac: f00d fbf2 bl 800e394 <siprintf>
8000bb0: e00c b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaa hex values");
8000bb2: f107 0310 add.w r3, r7, #16
8000bb6: 4954 ldr r1, [pc, #336] @ (8000d08 <manageCDC+0x90c>)
8000bb8: 4618 mov r0, r3
8000bba: f00d fbeb bl 800e394 <siprintf>
8000bbe: e005 b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaavvvv");
8000bc0: f107 0310 add.w r3, r7, #16
8000bc4: 4951 ldr r1, [pc, #324] @ (8000d0c <manageCDC+0x910>)
8000bc6: 4618 mov r0, r3
8000bc8: f00d fbe4 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bcc: bf00 nop
8000bce: f107 0310 add.w r3, r7, #16
8000bd2: 4618 mov r0, r3
8000bd4: f7ff faba bl 800014c <strlen>
8000bd8: 4603 mov r3, r0
8000bda: b29a uxth r2, r3
8000bdc: f107 0310 add.w r3, r7, #16
8000be0: 4611 mov r1, r2
8000be2: 4618 mov r0, r3
8000be4: f00c fff8 bl 800dbd8 <CDC_Transmit_FS>
8000be8: 4603 mov r3, r0
8000bea: 2b01 cmp r3, #1
8000bec: d0ef beq.n 8000bce <manageCDC+0x7d2>
break;
8000bee: e2ca b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='d'){
8000bf0: 4b3d ldr r3, [pc, #244] @ (8000ce8 <manageCDC+0x8ec>)
8000bf2: 785b ldrb r3, [r3, #1]
8000bf4: 2b64 cmp r3, #100 @ 0x64
8000bf6: f040 80a9 bne.w 8000d4c <manageCDC+0x950>
if(rxidx==2){
8000bfa: 4b3a ldr r3, [pc, #232] @ (8000ce4 <manageCDC+0x8e8>)
8000bfc: 781b ldrb r3, [r3, #0]
8000bfe: 2b02 cmp r3, #2
8000c00: f040 808c bne.w 8000d1c <manageCDC+0x920>
for(i=0;i<32;i++){
8000c04: 2300 movs r3, #0
8000c06: f887 30e6 strb.w r3, [r7, #230] @ 0xe6
8000c0a: e046 b.n 8000c9a <manageCDC+0x89e>
st=EEW_Read(i, &val);
8000c0c: f107 020e add.w r2, r7, #14
8000c10: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c14: 4611 mov r1, r2
8000c16: 4618 mov r0, r3
8000c18: f7ff fb2c bl 8000274 <EEW_Read>
8000c1c: 4603 mov r3, r0
8000c1e: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK){
8000c22: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000c26: 2b00 cmp r3, #0
8000c28: d119 bne.n 8000c5e <manageCDC+0x862>
sprintf((char*)s,"\n0x%02x=%5d ",i,val);
8000c2a: f897 20e6 ldrb.w r2, [r7, #230] @ 0xe6
8000c2e: 89fb ldrh r3, [r7, #14]
8000c30: f107 0010 add.w r0, r7, #16
8000c34: 4936 ldr r1, [pc, #216] @ (8000d10 <manageCDC+0x914>)
8000c36: f00d fbad bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c3a: bf00 nop
8000c3c: f107 0310 add.w r3, r7, #16
8000c40: 4618 mov r0, r3
8000c42: f7ff fa83 bl 800014c <strlen>
8000c46: 4603 mov r3, r0
8000c48: b29a uxth r2, r3
8000c4a: f107 0310 add.w r3, r7, #16
8000c4e: 4611 mov r1, r2
8000c50: 4618 mov r0, r3
8000c52: f00c ffc1 bl 800dbd8 <CDC_Transmit_FS>
8000c56: 4603 mov r3, r0
8000c58: 2b01 cmp r3, #1
8000c5a: d0ef beq.n 8000c3c <manageCDC+0x840>
8000c5c: e018 b.n 8000c90 <manageCDC+0x894>
sprintf((char*)s,"rderr %d ",st);
8000c5e: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000c62: f107 0310 add.w r3, r7, #16
8000c66: 492b ldr r1, [pc, #172] @ (8000d14 <manageCDC+0x918>)
8000c68: 4618 mov r0, r3
8000c6a: f00d fb93 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c6e: bf00 nop
8000c70: f107 0310 add.w r3, r7, #16
8000c74: 4618 mov r0, r3
8000c76: f7ff fa69 bl 800014c <strlen>
8000c7a: 4603 mov r3, r0
8000c7c: b29a uxth r2, r3
8000c7e: f107 0310 add.w r3, r7, #16
8000c82: 4611 mov r1, r2
8000c84: 4618 mov r0, r3
8000c86: f00c ffa7 bl 800dbd8 <CDC_Transmit_FS>
8000c8a: 4603 mov r3, r0
8000c8c: 2b01 cmp r3, #1
8000c8e: d0ef beq.n 8000c70 <manageCDC+0x874>
for(i=0;i<32;i++){
8000c90: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c94: 3301 adds r3, #1
8000c96: f887 30e6 strb.w r3, [r7, #230] @ 0xe6
8000c9a: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c9e: 2b1f cmp r3, #31
8000ca0: d9b4 bls.n 8000c0c <manageCDC+0x810>
if((i%4)==0){
8000ca2: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000ca6: f003 0303 and.w r3, r3, #3
8000caa: b2db uxtb r3, r3
8000cac: 2b00 cmp r3, #0
8000cae: f040 826a bne.w 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n");
8000cb2: f107 0310 add.w r3, r7, #16
8000cb6: 4918 ldr r1, [pc, #96] @ (8000d18 <manageCDC+0x91c>)
8000cb8: 4618 mov r0, r3
8000cba: f00d fb6b bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000cbe: bf00 nop
8000cc0: f107 0310 add.w r3, r7, #16
8000cc4: 4618 mov r0, r3
8000cc6: f7ff fa41 bl 800014c <strlen>
8000cca: 4603 mov r3, r0
8000ccc: b29a uxth r2, r3
8000cce: f107 0310 add.w r3, r7, #16
8000cd2: 4611 mov r1, r2
8000cd4: 4618 mov r0, r3
8000cd6: f00c ff7f bl 800dbd8 <CDC_Transmit_FS>
8000cda: 4603 mov r3, r0
8000cdc: 2b01 cmp r3, #1
8000cde: d0ef beq.n 8000cc0 <manageCDC+0x8c4>
break;
8000ce0: e251 b.n 8001186 <manageCDC+0xd8a>
8000ce2: bf00 nop
8000ce4: 20000234 .word 0x20000234
8000ce8: 20000238 .word 0x20000238
8000cec: 0800ee20 .word 0x0800ee20
8000cf0: 0800ee34 .word 0x0800ee34
8000cf4: 0800ee48 .word 0x0800ee48
8000cf8: 0800ee5c .word 0x0800ee5c
8000cfc: 0800ee64 .word 0x0800ee64
8000d00: 0800ee78 .word 0x0800ee78
8000d04: 0800ee8c .word 0x0800ee8c
8000d08: 0800eea4 .word 0x0800eea4
8000d0c: 0800eeb8 .word 0x0800eeb8
8000d10: 0800eec4 .word 0x0800eec4
8000d14: 0800eed4 .word 0x0800eed4
8000d18: 0800eee0 .word 0x0800eee0
sprintf((char*)s,"\n?ed");
8000d1c: f107 0310 add.w r3, r7, #16
8000d20: 491d ldr r1, [pc, #116] @ (8000d98 <manageCDC+0x99c>)
8000d22: 4618 mov r0, r3
8000d24: f00d fb36 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d28: bf00 nop
8000d2a: f107 0310 add.w r3, r7, #16
8000d2e: 4618 mov r0, r3
8000d30: f7ff fa0c bl 800014c <strlen>
8000d34: 4603 mov r3, r0
8000d36: b29a uxth r2, r3
8000d38: f107 0310 add.w r3, r7, #16
8000d3c: 4611 mov r1, r2
8000d3e: 4618 mov r0, r3
8000d40: f00c ff4a bl 800dbd8 <CDC_Transmit_FS>
8000d44: 4603 mov r3, r0
8000d46: 2b01 cmp r3, #1
8000d48: d0ef beq.n 8000d2a <manageCDC+0x92e>
break;
8000d4a: e21c b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='x'){
8000d4c: 4b13 ldr r3, [pc, #76] @ (8000d9c <manageCDC+0x9a0>)
8000d4e: 785b ldrb r3, [r3, #1]
8000d50: 2b78 cmp r3, #120 @ 0x78
8000d52: d129 bne.n 8000da8 <manageCDC+0x9ac>
if(rxidx==2){
8000d54: 4b12 ldr r3, [pc, #72] @ (8000da0 <manageCDC+0x9a4>)
8000d56: 781b ldrb r3, [r3, #0]
8000d58: 2b02 cmp r3, #2
8000d5a: d104 bne.n 8000d66 <manageCDC+0x96a>
loadDefault();
8000d5c: f000 fcd2 bl 8001704 <loadDefault>
loadEE();
8000d60: f000 fd1e bl 80017a0 <loadEE>
break;
8000d64: e20f b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?ex");
8000d66: f107 0310 add.w r3, r7, #16
8000d6a: 490e ldr r1, [pc, #56] @ (8000da4 <manageCDC+0x9a8>)
8000d6c: 4618 mov r0, r3
8000d6e: f00d fb11 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d72: bf00 nop
8000d74: f107 0310 add.w r3, r7, #16
8000d78: 4618 mov r0, r3
8000d7a: f7ff f9e7 bl 800014c <strlen>
8000d7e: 4603 mov r3, r0
8000d80: b29a uxth r2, r3
8000d82: f107 0310 add.w r3, r7, #16
8000d86: 4611 mov r1, r2
8000d88: 4618 mov r0, r3
8000d8a: f00c ff25 bl 800dbd8 <CDC_Transmit_FS>
8000d8e: 4603 mov r3, r0
8000d90: 2b01 cmp r3, #1
8000d92: d0ef beq.n 8000d74 <manageCDC+0x978>
break;
8000d94: e1f7 b.n 8001186 <manageCDC+0xd8a>
8000d96: bf00 nop
8000d98: 0800eee4 .word 0x0800eee4
8000d9c: 20000238 .word 0x20000238
8000da0: 20000234 .word 0x20000234
8000da4: 0800eeec .word 0x0800eeec
}else if(rxbuf[1]=='v'){
8000da8: 4bb4 ldr r3, [pc, #720] @ (800107c <manageCDC+0xc80>)
8000daa: 785b ldrb r3, [r3, #1]
8000dac: 2b76 cmp r3, #118 @ 0x76
8000dae: f040 814c bne.w 800104a <manageCDC+0xc4e>
if(rxidx==2){
8000db2: 4bb3 ldr r3, [pc, #716] @ (8001080 <manageCDC+0xc84>)
8000db4: 781b ldrb r3, [r3, #0]
8000db6: 2b02 cmp r3, #2
8000db8: f040 812f bne.w 800101a <manageCDC+0xc1e>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8000dbc: 4bb1 ldr r3, [pc, #708] @ (8001084 <manageCDC+0xc88>)
8000dbe: 881b ldrh r3, [r3, #0]
8000dc0: 469c mov ip, r3
8000dc2: 4bb1 ldr r3, [pc, #708] @ (8001088 <manageCDC+0xc8c>)
8000dc4: 881b ldrh r3, [r3, #0]
8000dc6: 469e mov lr, r3
8000dc8: 4bb0 ldr r3, [pc, #704] @ (800108c <manageCDC+0xc90>)
8000dca: 881b ldrh r3, [r3, #0]
8000dcc: 461a mov r2, r3
8000dce: 4bb0 ldr r3, [pc, #704] @ (8001090 <manageCDC+0xc94>)
8000dd0: 881b ldrh r3, [r3, #0]
8000dd2: 4619 mov r1, r3
8000dd4: 4baf ldr r3, [pc, #700] @ (8001094 <manageCDC+0xc98>)
8000dd6: 881b ldrh r3, [r3, #0]
8000dd8: 461c mov r4, r3
8000dda: 4baf ldr r3, [pc, #700] @ (8001098 <manageCDC+0xc9c>)
8000ddc: 881b ldrh r3, [r3, #0]
8000dde: 461d mov r5, r3
8000de0: 4bae ldr r3, [pc, #696] @ (800109c <manageCDC+0xca0>)
8000de2: 881b ldrh r3, [r3, #0]
8000de4: 461e mov r6, r3
8000de6: 4bae ldr r3, [pc, #696] @ (80010a0 <manageCDC+0xca4>)
8000de8: 881b ldrh r3, [r3, #0]
8000dea: f107 0010 add.w r0, r7, #16
8000dee: 9305 str r3, [sp, #20]
8000df0: 9604 str r6, [sp, #16]
8000df2: 9503 str r5, [sp, #12]
8000df4: 9402 str r4, [sp, #8]
8000df6: 9101 str r1, [sp, #4]
8000df8: 9200 str r2, [sp, #0]
8000dfa: 4673 mov r3, lr
8000dfc: 4662 mov r2, ip
8000dfe: 49a9 ldr r1, [pc, #676] @ (80010a4 <manageCDC+0xca8>)
8000e00: f00d fac8 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e04: bf00 nop
8000e06: f107 0310 add.w r3, r7, #16
8000e0a: 4618 mov r0, r3
8000e0c: f7ff f99e bl 800014c <strlen>
8000e10: 4603 mov r3, r0
8000e12: b29a uxth r2, r3
8000e14: f107 0310 add.w r3, r7, #16
8000e18: 4611 mov r1, r2
8000e1a: 4618 mov r0, r3
8000e1c: f00c fedc bl 800dbd8 <CDC_Transmit_FS>
8000e20: 4603 mov r3, r0
8000e22: 2b01 cmp r3, #1
8000e24: d0ef beq.n 8000e06 <manageCDC+0xa0a>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
8000e26: 4ba0 ldr r3, [pc, #640] @ (80010a8 <manageCDC+0xcac>)
8000e28: 881b ldrh r3, [r3, #0]
8000e2a: 4619 mov r1, r3
8000e2c: 4b9f ldr r3, [pc, #636] @ (80010ac <manageCDC+0xcb0>)
8000e2e: 881b ldrh r3, [r3, #0]
8000e30: 461c mov r4, r3
8000e32: 4b9f ldr r3, [pc, #636] @ (80010b0 <manageCDC+0xcb4>)
8000e34: 881b ldrh r3, [r3, #0]
8000e36: 461a mov r2, r3
8000e38: 4b9e ldr r3, [pc, #632] @ (80010b4 <manageCDC+0xcb8>)
8000e3a: 881b ldrh r3, [r3, #0]
8000e3c: f107 0010 add.w r0, r7, #16
8000e40: 9301 str r3, [sp, #4]
8000e42: 9200 str r2, [sp, #0]
8000e44: 4623 mov r3, r4
8000e46: 460a mov r2, r1
8000e48: 499b ldr r1, [pc, #620] @ (80010b8 <manageCDC+0xcbc>)
8000e4a: f00d faa3 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e4e: bf00 nop
8000e50: f107 0310 add.w r3, r7, #16
8000e54: 4618 mov r0, r3
8000e56: f7ff f979 bl 800014c <strlen>
8000e5a: 4603 mov r3, r0
8000e5c: b29a uxth r2, r3
8000e5e: f107 0310 add.w r3, r7, #16
8000e62: 4611 mov r1, r2
8000e64: 4618 mov r0, r3
8000e66: f00c feb7 bl 800dbd8 <CDC_Transmit_FS>
8000e6a: 4603 mov r3, r0
8000e6c: 2b01 cmp r3, #1
8000e6e: d0ef beq.n 8000e50 <manageCDC+0xa54>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
8000e70: 4b92 ldr r3, [pc, #584] @ (80010bc <manageCDC+0xcc0>)
8000e72: 881b ldrh r3, [r3, #0]
8000e74: 461a mov r2, r3
8000e76: 4b92 ldr r3, [pc, #584] @ (80010c0 <manageCDC+0xcc4>)
8000e78: 881b ldrh r3, [r3, #0]
8000e7a: f107 0010 add.w r0, r7, #16
8000e7e: 4991 ldr r1, [pc, #580] @ (80010c4 <manageCDC+0xcc8>)
8000e80: f00d fa88 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e84: bf00 nop
8000e86: f107 0310 add.w r3, r7, #16
8000e8a: 4618 mov r0, r3
8000e8c: f7ff f95e bl 800014c <strlen>
8000e90: 4603 mov r3, r0
8000e92: b29a uxth r2, r3
8000e94: f107 0310 add.w r3, r7, #16
8000e98: 4611 mov r1, r2
8000e9a: 4618 mov r0, r3
8000e9c: f00c fe9c bl 800dbd8 <CDC_Transmit_FS>
8000ea0: 4603 mov r3, r0
8000ea2: 2b01 cmp r3, #1
8000ea4: d0ef beq.n 8000e86 <manageCDC+0xa8a>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
8000ea6: 4b88 ldr r3, [pc, #544] @ (80010c8 <manageCDC+0xccc>)
8000ea8: 881b ldrh r3, [r3, #0]
8000eaa: 4619 mov r1, r3
8000eac: 4b87 ldr r3, [pc, #540] @ (80010cc <manageCDC+0xcd0>)
8000eae: 881b ldrh r3, [r3, #0]
8000eb0: 461c mov r4, r3
8000eb2: 4b87 ldr r3, [pc, #540] @ (80010d0 <manageCDC+0xcd4>)
8000eb4: 881b ldrh r3, [r3, #0]
8000eb6: 461a mov r2, r3
8000eb8: 4b86 ldr r3, [pc, #536] @ (80010d4 <manageCDC+0xcd8>)
8000eba: 881b ldrh r3, [r3, #0]
8000ebc: f107 0010 add.w r0, r7, #16
8000ec0: 9301 str r3, [sp, #4]
8000ec2: 9200 str r2, [sp, #0]
8000ec4: 4623 mov r3, r4
8000ec6: 460a mov r2, r1
8000ec8: 4983 ldr r1, [pc, #524] @ (80010d8 <manageCDC+0xcdc>)
8000eca: f00d fa63 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ece: bf00 nop
8000ed0: f107 0310 add.w r3, r7, #16
8000ed4: 4618 mov r0, r3
8000ed6: f7ff f939 bl 800014c <strlen>
8000eda: 4603 mov r3, r0
8000edc: b29a uxth r2, r3
8000ede: f107 0310 add.w r3, r7, #16
8000ee2: 4611 mov r1, r2
8000ee4: 4618 mov r0, r3
8000ee6: f00c fe77 bl 800dbd8 <CDC_Transmit_FS>
8000eea: 4603 mov r3, r0
8000eec: 2b01 cmp r3, #1
8000eee: d0ef beq.n 8000ed0 <manageCDC+0xad4>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
8000ef0: 4b7a ldr r3, [pc, #488] @ (80010dc <manageCDC+0xce0>)
8000ef2: 881b ldrh r3, [r3, #0]
8000ef4: 4619 mov r1, r3
8000ef6: 4b7a ldr r3, [pc, #488] @ (80010e0 <manageCDC+0xce4>)
8000ef8: 881b ldrh r3, [r3, #0]
8000efa: 461c mov r4, r3
8000efc: 4b79 ldr r3, [pc, #484] @ (80010e4 <manageCDC+0xce8>)
8000efe: 881b ldrh r3, [r3, #0]
8000f00: 461a mov r2, r3
8000f02: 4b79 ldr r3, [pc, #484] @ (80010e8 <manageCDC+0xcec>)
8000f04: 881b ldrh r3, [r3, #0]
8000f06: f107 0010 add.w r0, r7, #16
8000f0a: 9301 str r3, [sp, #4]
8000f0c: 9200 str r2, [sp, #0]
8000f0e: 4623 mov r3, r4
8000f10: 460a mov r2, r1
8000f12: 4976 ldr r1, [pc, #472] @ (80010ec <manageCDC+0xcf0>)
8000f14: f00d fa3e bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000f18: bf00 nop
8000f1a: f107 0310 add.w r3, r7, #16
8000f1e: 4618 mov r0, r3
8000f20: f7ff f914 bl 800014c <strlen>
8000f24: 4603 mov r3, r0
8000f26: b29a uxth r2, r3
8000f28: f107 0310 add.w r3, r7, #16
8000f2c: 4611 mov r1, r2
8000f2e: 4618 mov r0, r3
8000f30: f00c fe52 bl 800dbd8 <CDC_Transmit_FS>
8000f34: 4603 mov r3, r0
8000f36: 2b01 cmp r3, #1
8000f38: d0ef beq.n 8000f1a <manageCDC+0xb1e>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
8000f3a: 4b6d ldr r3, [pc, #436] @ (80010f0 <manageCDC+0xcf4>)
8000f3c: 881b ldrh r3, [r3, #0]
8000f3e: 4619 mov r1, r3
8000f40: 4b6c ldr r3, [pc, #432] @ (80010f4 <manageCDC+0xcf8>)
8000f42: 881b ldrh r3, [r3, #0]
8000f44: 461c mov r4, r3
8000f46: 4b6c ldr r3, [pc, #432] @ (80010f8 <manageCDC+0xcfc>)
8000f48: 881b ldrh r3, [r3, #0]
8000f4a: 461a mov r2, r3
8000f4c: 4b6b ldr r3, [pc, #428] @ (80010fc <manageCDC+0xd00>)
8000f4e: 881b ldrh r3, [r3, #0]
8000f50: f107 0010 add.w r0, r7, #16
8000f54: 9301 str r3, [sp, #4]
8000f56: 9200 str r2, [sp, #0]
8000f58: 4623 mov r3, r4
8000f5a: 460a mov r2, r1
8000f5c: 4968 ldr r1, [pc, #416] @ (8001100 <manageCDC+0xd04>)
8000f5e: f00d fa19 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000f62: bf00 nop
8000f64: f107 0310 add.w r3, r7, #16
8000f68: 4618 mov r0, r3
8000f6a: f7ff f8ef bl 800014c <strlen>
8000f6e: 4603 mov r3, r0
8000f70: b29a uxth r2, r3
8000f72: f107 0310 add.w r3, r7, #16
8000f76: 4611 mov r1, r2
8000f78: 4618 mov r0, r3
8000f7a: f00c fe2d bl 800dbd8 <CDC_Transmit_FS>
8000f7e: 4603 mov r3, r0
8000f80: 2b01 cmp r3, #1
8000f82: d0ef beq.n 8000f64 <manageCDC+0xb68>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
8000f84: 4b5f ldr r3, [pc, #380] @ (8001104 <manageCDC+0xd08>)
8000f86: 881b ldrh r3, [r3, #0]
8000f88: 4619 mov r1, r3
8000f8a: 4b5f ldr r3, [pc, #380] @ (8001108 <manageCDC+0xd0c>)
8000f8c: 881b ldrh r3, [r3, #0]
8000f8e: 461c mov r4, r3
8000f90: 4b5e ldr r3, [pc, #376] @ (800110c <manageCDC+0xd10>)
8000f92: 881b ldrh r3, [r3, #0]
8000f94: 461a mov r2, r3
8000f96: 4b5e ldr r3, [pc, #376] @ (8001110 <manageCDC+0xd14>)
8000f98: 881b ldrh r3, [r3, #0]
8000f9a: f107 0010 add.w r0, r7, #16
8000f9e: 9301 str r3, [sp, #4]
8000fa0: 9200 str r2, [sp, #0]
8000fa2: 4623 mov r3, r4
8000fa4: 460a mov r2, r1
8000fa6: 495b ldr r1, [pc, #364] @ (8001114 <manageCDC+0xd18>)
8000fa8: f00d f9f4 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000fac: bf00 nop
8000fae: f107 0310 add.w r3, r7, #16
8000fb2: 4618 mov r0, r3
8000fb4: f7ff f8ca bl 800014c <strlen>
8000fb8: 4603 mov r3, r0
8000fba: b29a uxth r2, r3
8000fbc: f107 0310 add.w r3, r7, #16
8000fc0: 4611 mov r1, r2
8000fc2: 4618 mov r0, r3
8000fc4: f00c fe08 bl 800dbd8 <CDC_Transmit_FS>
8000fc8: 4603 mov r3, r0
8000fca: 2b01 cmp r3, #1
8000fcc: d0ef beq.n 8000fae <manageCDC+0xbb2>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
8000fce: 4b52 ldr r3, [pc, #328] @ (8001118 <manageCDC+0xd1c>)
8000fd0: 881b ldrh r3, [r3, #0]
8000fd2: 4619 mov r1, r3
8000fd4: 4b51 ldr r3, [pc, #324] @ (800111c <manageCDC+0xd20>)
8000fd6: 881b ldrh r3, [r3, #0]
8000fd8: 461c mov r4, r3
8000fda: 4b51 ldr r3, [pc, #324] @ (8001120 <manageCDC+0xd24>)
8000fdc: 881b ldrh r3, [r3, #0]
8000fde: 461a mov r2, r3
8000fe0: 4b50 ldr r3, [pc, #320] @ (8001124 <manageCDC+0xd28>)
8000fe2: 881b ldrh r3, [r3, #0]
8000fe4: f107 0010 add.w r0, r7, #16
8000fe8: 9301 str r3, [sp, #4]
8000fea: 9200 str r2, [sp, #0]
8000fec: 4623 mov r3, r4
8000fee: 460a mov r2, r1
8000ff0: 494d ldr r1, [pc, #308] @ (8001128 <manageCDC+0xd2c>)
8000ff2: f00d f9cf bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ff6: bf00 nop
8000ff8: f107 0310 add.w r3, r7, #16
8000ffc: 4618 mov r0, r3
8000ffe: f7ff f8a5 bl 800014c <strlen>
8001002: 4603 mov r3, r0
8001004: b29a uxth r2, r3
8001006: f107 0310 add.w r3, r7, #16
800100a: 4611 mov r1, r2
800100c: 4618 mov r0, r3
800100e: f00c fde3 bl 800dbd8 <CDC_Transmit_FS>
8001012: 4603 mov r3, r0
8001014: 2b01 cmp r3, #1
8001016: d0ef beq.n 8000ff8 <manageCDC+0xbfc>
break;
8001018: e0b5 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?ev");
800101a: f107 0310 add.w r3, r7, #16
800101e: 4943 ldr r1, [pc, #268] @ (800112c <manageCDC+0xd30>)
8001020: 4618 mov r0, r3
8001022: f00d f9b7 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001026: bf00 nop
8001028: f107 0310 add.w r3, r7, #16
800102c: 4618 mov r0, r3
800102e: f7ff f88d bl 800014c <strlen>
8001032: 4603 mov r3, r0
8001034: b29a uxth r2, r3
8001036: f107 0310 add.w r3, r7, #16
800103a: 4611 mov r1, r2
800103c: 4618 mov r0, r3
800103e: f00c fdcb bl 800dbd8 <CDC_Transmit_FS>
8001042: 4603 mov r3, r0
8001044: 2b01 cmp r3, #1
8001046: d0ef beq.n 8001028 <manageCDC+0xc2c>
break;
8001048: e09d b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?er|w|d|x|v");
800104a: f107 0310 add.w r3, r7, #16
800104e: 4938 ldr r1, [pc, #224] @ (8001130 <manageCDC+0xd34>)
8001050: 4618 mov r0, r3
8001052: f00d f99f bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001056: bf00 nop
8001058: f107 0310 add.w r3, r7, #16
800105c: 4618 mov r0, r3
800105e: f7ff f875 bl 800014c <strlen>
8001062: 4603 mov r3, r0
8001064: b29a uxth r2, r3
8001066: f107 0310 add.w r3, r7, #16
800106a: 4611 mov r1, r2
800106c: 4618 mov r0, r3
800106e: f00c fdb3 bl 800dbd8 <CDC_Transmit_FS>
8001072: 4603 mov r3, r0
8001074: 2b01 cmp r3, #1
8001076: d0ef beq.n 8001058 <manageCDC+0xc5c>
break;
8001078: e085 b.n 8001186 <manageCDC+0xd8a>
800107a: bf00 nop
800107c: 20000238 .word 0x20000238
8001080: 20000234 .word 0x20000234
8001084: 20000400 .word 0x20000400
8001088: 20000402 .word 0x20000402
800108c: 20000404 .word 0x20000404
8001090: 20000406 .word 0x20000406
8001094: 20000408 .word 0x20000408
8001098: 2000040a .word 0x2000040a
800109c: 2000040c .word 0x2000040c
80010a0: 2000040e .word 0x2000040e
80010a4: 0800eef4 .word 0x0800eef4
80010a8: 20000410 .word 0x20000410
80010ac: 20000412 .word 0x20000412
80010b0: 20000414 .word 0x20000414
80010b4: 20000416 .word 0x20000416
80010b8: 0800ef50 .word 0x0800ef50
80010bc: 20000418 .word 0x20000418
80010c0: 2000041e .word 0x2000041e
80010c4: 0800ef94 .word 0x0800ef94
80010c8: 20000420 .word 0x20000420
80010cc: 20000422 .word 0x20000422
80010d0: 20000424 .word 0x20000424
80010d4: 20000426 .word 0x20000426
80010d8: 0800efac .word 0x0800efac
80010dc: 20000428 .word 0x20000428
80010e0: 2000042a .word 0x2000042a
80010e4: 20000438 .word 0x20000438
80010e8: 2000043a .word 0x2000043a
80010ec: 0800efe0 .word 0x0800efe0
80010f0: 2000042c .word 0x2000042c
80010f4: 2000042e .word 0x2000042e
80010f8: 2000043c .word 0x2000043c
80010fc: 2000043e .word 0x2000043e
8001100: 0800f014 .word 0x0800f014
8001104: 20000430 .word 0x20000430
8001108: 20000432 .word 0x20000432
800110c: 20000440 .word 0x20000440
8001110: 20000442 .word 0x20000442
8001114: 0800f048 .word 0x0800f048
8001118: 20000434 .word 0x20000434
800111c: 20000436 .word 0x20000436
8001120: 20000444 .word 0x20000444
8001124: 20000446 .word 0x20000446
8001128: 0800f07c .word 0x0800f07c
800112c: 0800f0b0 .word 0x0800f0b0
8001130: 0800f0b8 .word 0x0800f0b8
sprintf((char*)s,"\n?eraa | ewaavvvv");
8001134: f107 0310 add.w r3, r7, #16
8001138: 491b ldr r1, [pc, #108] @ (80011a8 <manageCDC+0xdac>)
800113a: 4618 mov r0, r3
800113c: f00d f92a bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001140: bf00 nop
8001142: f107 0310 add.w r3, r7, #16
8001146: 4618 mov r0, r3
8001148: f7ff f800 bl 800014c <strlen>
800114c: 4603 mov r3, r0
800114e: b29a uxth r2, r3
8001150: f107 0310 add.w r3, r7, #16
8001154: 4611 mov r1, r2
8001156: 4618 mov r0, r3
8001158: f00c fd3e bl 800dbd8 <CDC_Transmit_FS>
800115c: 4603 mov r3, r0
800115e: 2b01 cmp r3, #1
8001160: d0ef beq.n 8001142 <manageCDC+0xd46>
break;
8001162: e010 b.n 8001186 <manageCDC+0xd8a>
default:
sprintf((char*)s,"\n?");
8001164: f107 0310 add.w r3, r7, #16
8001168: 4910 ldr r1, [pc, #64] @ (80011ac <manageCDC+0xdb0>)
800116a: 4618 mov r0, r3
800116c: f00d f912 bl 800e394 <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8001170: bf00 nop
8001172: f107 0310 add.w r3, r7, #16
8001176: 2102 movs r1, #2
8001178: 4618 mov r0, r3
800117a: f00c fd2d bl 800dbd8 <CDC_Transmit_FS>
800117e: 4603 mov r3, r0
8001180: 2b01 cmp r3, #1
8001182: d0f6 beq.n 8001172 <manageCDC+0xd76>
break;
8001184: e000 b.n 8001188 <manageCDC+0xd8c>
break;
8001186: bf00 nop
}
}
rxidx=0;
8001188: 4b09 ldr r3, [pc, #36] @ (80011b0 <manageCDC+0xdb4>)
800118a: 2200 movs r2, #0
800118c: 701a strb r2, [r3, #0]
800118e: e007 b.n 80011a0 <manageCDC+0xda4>
}else rxidx++;
8001190: 4b07 ldr r3, [pc, #28] @ (80011b0 <manageCDC+0xdb4>)
8001192: 781b ldrb r3, [r3, #0]
8001194: 3301 adds r3, #1
8001196: b2da uxtb r2, r3
8001198: 4b05 ldr r3, [pc, #20] @ (80011b0 <manageCDC+0xdb4>)
800119a: 701a strb r2, [r3, #0]
800119c: e000 b.n 80011a0 <manageCDC+0xda4>
if (rx < 0) return;
800119e: bf00 nop
// tiny spin or yield
}
}
80011a0: 37ec adds r7, #236 @ 0xec
80011a2: 46bd mov sp, r7
80011a4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
80011a8: 0800f0c8 .word 0x0800f0c8
80011ac: 0800f0dc .word 0x0800f0dc
80011b0: 20000234 .word 0x20000234
080011b4 <debug>:
extern UART_HandleTypeDef huart1;
extern uint8_t pulsanti;
extern uint16_t stPulsanti;
extern omCiclo_st stCiclo;
void debug(void){
80011b4: b580 push {r7, lr}
80011b6: b09a sub sp, #104 @ 0x68
80011b8: af00 add r7, sp, #0
static uint8_t mempulsanti=0;
static uint16_t memstPulsanti=0;
static omCiclo_st memstCiclo=omchiuso;
char s [100];
if(mempulsanti!=pulsanti){
80011ba: 4b2f ldr r3, [pc, #188] @ (8001278 <debug+0xc4>)
80011bc: 781a ldrb r2, [r3, #0]
80011be: 4b2f ldr r3, [pc, #188] @ (800127c <debug+0xc8>)
80011c0: 781b ldrb r3, [r3, #0]
80011c2: 429a cmp r2, r3
80011c4: d017 beq.n 80011f6 <debug+0x42>
mempulsanti=pulsanti;
80011c6: 4b2d ldr r3, [pc, #180] @ (800127c <debug+0xc8>)
80011c8: 781a ldrb r2, [r3, #0]
80011ca: 4b2b ldr r3, [pc, #172] @ (8001278 <debug+0xc4>)
80011cc: 701a strb r2, [r3, #0]
sprintf(s,"\npulsanti=%X",pulsanti);
80011ce: 4b2b ldr r3, [pc, #172] @ (800127c <debug+0xc8>)
80011d0: 781b ldrb r3, [r3, #0]
80011d2: 461a mov r2, r3
80011d4: 1d3b adds r3, r7, #4
80011d6: 492a ldr r1, [pc, #168] @ (8001280 <debug+0xcc>)
80011d8: 4618 mov r0, r3
80011da: f00d f8db bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80011de: 1d3b adds r3, r7, #4
80011e0: 4618 mov r0, r3
80011e2: f7fe ffb3 bl 800014c <strlen>
80011e6: 4603 mov r3, r0
80011e8: b29a uxth r2, r3
80011ea: 1d39 adds r1, r7, #4
80011ec: f04f 33ff mov.w r3, #4294967295
80011f0: 4824 ldr r0, [pc, #144] @ (8001284 <debug+0xd0>)
80011f2: f008 fadf bl 80097b4 <HAL_UART_Transmit>
}
if(memstPulsanti!=stPulsanti){
80011f6: 4b24 ldr r3, [pc, #144] @ (8001288 <debug+0xd4>)
80011f8: 881a ldrh r2, [r3, #0]
80011fa: 4b24 ldr r3, [pc, #144] @ (800128c <debug+0xd8>)
80011fc: 881b ldrh r3, [r3, #0]
80011fe: 429a cmp r2, r3
8001200: d017 beq.n 8001232 <debug+0x7e>
memstPulsanti=stPulsanti;
8001202: 4b22 ldr r3, [pc, #136] @ (800128c <debug+0xd8>)
8001204: 881a ldrh r2, [r3, #0]
8001206: 4b20 ldr r3, [pc, #128] @ (8001288 <debug+0xd4>)
8001208: 801a strh r2, [r3, #0]
sprintf(s,"\nstpulsanti=%X",stPulsanti);
800120a: 4b20 ldr r3, [pc, #128] @ (800128c <debug+0xd8>)
800120c: 881b ldrh r3, [r3, #0]
800120e: 461a mov r2, r3
8001210: 1d3b adds r3, r7, #4
8001212: 491f ldr r1, [pc, #124] @ (8001290 <debug+0xdc>)
8001214: 4618 mov r0, r3
8001216: f00d f8bd bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800121a: 1d3b adds r3, r7, #4
800121c: 4618 mov r0, r3
800121e: f7fe ff95 bl 800014c <strlen>
8001222: 4603 mov r3, r0
8001224: b29a uxth r2, r3
8001226: 1d39 adds r1, r7, #4
8001228: f04f 33ff mov.w r3, #4294967295
800122c: 4815 ldr r0, [pc, #84] @ (8001284 <debug+0xd0>)
800122e: f008 fac1 bl 80097b4 <HAL_UART_Transmit>
}
if(memstCiclo!=stCiclo){
8001232: 4b18 ldr r3, [pc, #96] @ (8001294 <debug+0xe0>)
8001234: 781a ldrb r2, [r3, #0]
8001236: 4b18 ldr r3, [pc, #96] @ (8001298 <debug+0xe4>)
8001238: 781b ldrb r3, [r3, #0]
800123a: 429a cmp r2, r3
800123c: d017 beq.n 800126e <debug+0xba>
memstCiclo=stCiclo;
800123e: 4b16 ldr r3, [pc, #88] @ (8001298 <debug+0xe4>)
8001240: 781a ldrb r2, [r3, #0]
8001242: 4b14 ldr r3, [pc, #80] @ (8001294 <debug+0xe0>)
8001244: 701a strb r2, [r3, #0]
sprintf(s,"\nstCiclo=%d",stCiclo);
8001246: 4b14 ldr r3, [pc, #80] @ (8001298 <debug+0xe4>)
8001248: 781b ldrb r3, [r3, #0]
800124a: 461a mov r2, r3
800124c: 1d3b adds r3, r7, #4
800124e: 4913 ldr r1, [pc, #76] @ (800129c <debug+0xe8>)
8001250: 4618 mov r0, r3
8001252: f00d f89f bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001256: 1d3b adds r3, r7, #4
8001258: 4618 mov r0, r3
800125a: f7fe ff77 bl 800014c <strlen>
800125e: 4603 mov r3, r0
8001260: b29a uxth r2, r3
8001262: 1d39 adds r1, r7, #4
8001264: f04f 33ff mov.w r3, #4294967295
8001268: 4806 ldr r0, [pc, #24] @ (8001284 <debug+0xd0>)
800126a: f008 faa3 bl 80097b4 <HAL_UART_Transmit>
}
}
800126e: bf00 nop
8001270: 3768 adds r7, #104 @ 0x68
8001272: 46bd mov sp, r7
8001274: bd80 pop {r7, pc}
8001276: bf00 nop
8001278: 2000029c .word 0x2000029c
800127c: 200003f0 .word 0x200003f0
8001280: 0800f0e0 .word 0x0800f0e0
8001284: 200003a8 .word 0x200003a8
8001288: 2000029e .word 0x2000029e
800128c: 20000454 .word 0x20000454
8001290: 0800f0f0 .word 0x0800f0f0
8001294: 200002a0 .word 0x200002a0
8001298: 20000456 .word 0x20000456
800129c: 0800f100 .word 0x0800f100
080012a0 <EEW_Read>:
{
80012a0: b580 push {r7, lr}
80012a2: b082 sub sp, #8
80012a4: af00 add r7, sp, #0
80012a6: 4603 mov r3, r0
80012a8: 6039 str r1, [r7, #0]
80012aa: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
80012ac: 79fb ldrb r3, [r7, #7]
80012ae: b29b uxth r3, r3
80012b0: 3301 adds r3, #1
80012b2: b29b uxth r3, r3
80012b4: 6839 ldr r1, [r7, #0]
80012b6: 4618 mov r0, r3
80012b8: f000 f9ce bl 8001658 <EE_ReadVariable>
80012bc: 4603 mov r3, r0
}
80012be: 4618 mov r0, r3
80012c0: 3708 adds r7, #8
80012c2: 46bd mov sp, r7
80012c4: bd80 pop {r7, pc}
080012c6 <EEW_Write>:
{
80012c6: b580 push {r7, lr}
80012c8: b082 sub sp, #8
80012ca: af00 add r7, sp, #0
80012cc: 4603 mov r3, r0
80012ce: 460a mov r2, r1
80012d0: 71fb strb r3, [r7, #7]
80012d2: 4613 mov r3, r2
80012d4: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80012d6: 79fb ldrb r3, [r7, #7]
80012d8: b29b uxth r3, r3
80012da: 3301 adds r3, #1
80012dc: b29b uxth r3, r3
80012de: 88ba ldrh r2, [r7, #4]
80012e0: 4611 mov r1, r2
80012e2: 4618 mov r0, r3
80012e4: f000 f9d4 bl 8001690 <EE_WriteVariable>
80012e8: 4603 mov r3, r0
}
80012ea: 4618 mov r0, r3
80012ec: 3708 adds r7, #8
80012ee: 46bd mov sp, r7
80012f0: bd80 pop {r7, pc}
080012f2 <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
80012f2: b480 push {r7}
80012f4: b083 sub sp, #12
80012f6: af00 add r7, sp, #0
80012f8: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
80012fa: 687b ldr r3, [r7, #4]
80012fc: 881b ldrh r3, [r3, #0]
80012fe: b29b uxth r3, r3
}
8001300: 4618 mov r0, r3
8001302: 370c adds r7, #12
8001304: 46bd mov sp, r7
8001306: bc80 pop {r7}
8001308: 4770 bx lr
0800130a <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
800130a: b5b0 push {r4, r5, r7, lr}
800130c: b084 sub sp, #16
800130e: af00 add r7, sp, #0
8001310: 6078 str r0, [r7, #4]
8001312: 460b mov r3, r1
8001314: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
8001316: f004 fe23 bl 8005f60 <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
800131a: 887b ldrh r3, [r7, #2]
800131c: 2200 movs r2, #0
800131e: 461c mov r4, r3
8001320: 4615 mov r5, r2
8001322: 4622 mov r2, r4
8001324: 462b mov r3, r5
8001326: 6879 ldr r1, [r7, #4]
8001328: 2001 movs r0, #1
800132a: f004 fda9 bl 8005e80 <HAL_FLASH_Program>
800132e: 4603 mov r3, r0
8001330: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
8001332: f004 fe3b bl 8005fac <HAL_FLASH_Lock>
return status;
8001336: 7bfb ldrb r3, [r7, #15]
}
8001338: 4618 mov r0, r3
800133a: 3710 adds r7, #16
800133c: 46bd mov sp, r7
800133e: bdb0 pop {r4, r5, r7, pc}
08001340 <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
8001340: b580 push {r7, lr}
8001342: b088 sub sp, #32
8001344: af00 add r7, sp, #0
8001346: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8001348: 2300 movs r3, #0
800134a: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
800134c: f004 fe08 bl 8005f60 <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
8001350: 2300 movs r3, #0
8001352: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
8001354: 687b ldr r3, [r7, #4]
8001356: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8001358: 2301 movs r3, #1
800135a: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
800135c: f107 0208 add.w r2, r7, #8
8001360: f107 030c add.w r3, r7, #12
8001364: 4611 mov r1, r2
8001366: 4618 mov r0, r3
8001368: f004 fee2 bl 8006130 <HAL_FLASHEx_Erase>
800136c: 4603 mov r3, r0
800136e: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
8001370: f004 fe1c bl 8005fac <HAL_FLASH_Lock>
return status;
8001374: 7ffb ldrb r3, [r7, #31]
}
8001376: 4618 mov r0, r3
8001378: 3720 adds r7, #32
800137a: 46bd mov sp, r7
800137c: bd80 pop {r7, pc}
0800137e <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
800137e: b480 push {r7}
8001380: b087 sub sp, #28
8001382: af00 add r7, sp, #0
8001384: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8001386: 687b ldr r3, [r7, #4]
8001388: 3302 adds r3, #2
800138a: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
800138c: 687b ldr r3, [r7, #4]
800138e: f503 6380 add.w r3, r3, #1024 @ 0x400
8001392: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8001394: e00c b.n 80013b0 <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8001396: 697b ldr r3, [r7, #20]
8001398: 881b ldrh r3, [r3, #0]
800139a: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
800139c: 89fb ldrh r3, [r7, #14]
800139e: f64f 72ff movw r2, #65535 @ 0xffff
80013a2: 4293 cmp r3, r2
80013a4: d101 bne.n 80013aa <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
80013a6: 697b ldr r3, [r7, #20]
80013a8: e008 b.n 80013bc <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
80013aa: 697b ldr r3, [r7, #20]
80013ac: 3304 adds r3, #4
80013ae: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
80013b0: 693b ldr r3, [r7, #16]
80013b2: 3b03 subs r3, #3
80013b4: 697a ldr r2, [r7, #20]
80013b6: 429a cmp r2, r3
80013b8: d3ed bcc.n 8001396 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
80013ba: 2300 movs r3, #0
}
80013bc: 4618 mov r0, r3
80013be: 371c adds r7, #28
80013c0: 46bd mov sp, r7
80013c2: bc80 pop {r7}
80013c4: 4770 bx lr
080013c6 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */
/* Find latest value of VirtAddress in a specific page (scan forward) */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
80013c6: b480 push {r7}
80013c8: b089 sub sp, #36 @ 0x24
80013ca: af00 add r7, sp, #0
80013cc: 60f8 str r0, [r7, #12]
80013ce: 460b mov r3, r1
80013d0: 607a str r2, [r7, #4]
80013d2: 817b strh r3, [r7, #10]
uint32_t addr = pageBase + 2U; // skip status halfword
80013d4: 68fb ldr r3, [r7, #12]
80013d6: 3302 adds r3, #2
80013d8: 61fb str r3, [r7, #28]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
80013da: 68fb ldr r3, [r7, #12]
80013dc: f503 6380 add.w r3, r3, #1024 @ 0x400
80013e0: 617b str r3, [r7, #20]
EE_Status result = EE_NOT_FOUND;
80013e2: 2302 movs r3, #2
80013e4: 76fb strb r3, [r7, #27]
uint16_t lastVal = 0;
80013e6: 2300 movs r3, #0
80013e8: 833b strh r3, [r7, #24]
if (Data == NULL)
80013ea: 687b ldr r3, [r7, #4]
80013ec: 2b00 cmp r3, #0
80013ee: d118 bne.n 8001422 <EE_FindInPage+0x5c>
return EE_ERROR;
80013f0: 2301 movs r3, #1
80013f2: e024 b.n 800143e <EE_FindInPage+0x78>
while (addr <= (pageEnd - sizeof(EE_Record_t)))
{
uint16_t vaddr = *(__IO uint16_t *)addr;
80013f4: 69fb ldr r3, [r7, #28]
80013f6: 881b ldrh r3, [r3, #0]
80013f8: 827b strh r3, [r7, #18]
if (vaddr == 0xFFFFU)
80013fa: 8a7b ldrh r3, [r7, #18]
80013fc: f64f 72ff movw r2, #65535 @ 0xffff
8001400: 4293 cmp r3, r2
8001402: d014 beq.n 800142e <EE_FindInPage+0x68>
{
// First empty slot => no more records in this page
break;
}
uint16_t value = *(__IO uint16_t *)(addr + 2U);
8001404: 69fb ldr r3, [r7, #28]
8001406: 3302 adds r3, #2
8001408: 881b ldrh r3, [r3, #0]
800140a: 823b strh r3, [r7, #16]
if (vaddr == VirtAddress)
800140c: 8a7a ldrh r2, [r7, #18]
800140e: 897b ldrh r3, [r7, #10]
8001410: 429a cmp r2, r3
8001412: d103 bne.n 800141c <EE_FindInPage+0x56>
{
lastVal = value; // keep most recent
8001414: 8a3b ldrh r3, [r7, #16]
8001416: 833b strh r3, [r7, #24]
result = EE_OK;
8001418: 2300 movs r3, #0
800141a: 76fb strb r3, [r7, #27]
}
addr += sizeof(EE_Record_t); // move 4 bytes forward
800141c: 69fb ldr r3, [r7, #28]
800141e: 3304 adds r3, #4
8001420: 61fb str r3, [r7, #28]
while (addr <= (pageEnd - sizeof(EE_Record_t)))
8001422: 697b ldr r3, [r7, #20]
8001424: 3b04 subs r3, #4
8001426: 69fa ldr r2, [r7, #28]
8001428: 429a cmp r2, r3
800142a: d9e3 bls.n 80013f4 <EE_FindInPage+0x2e>
800142c: e000 b.n 8001430 <EE_FindInPage+0x6a>
break;
800142e: bf00 nop
}
if (result == EE_OK)
8001430: 7efb ldrb r3, [r7, #27]
8001432: 2b00 cmp r3, #0
8001434: d102 bne.n 800143c <EE_FindInPage+0x76>
*Data = lastVal;
8001436: 687b ldr r3, [r7, #4]
8001438: 8b3a ldrh r2, [r7, #24]
800143a: 801a strh r2, [r3, #0]
return result;
800143c: 7efb ldrb r3, [r7, #27]
}
800143e: 4618 mov r0, r3
8001440: 3724 adds r7, #36 @ 0x24
8001442: 46bd mov sp, r7
8001444: bc80 pop {r7}
8001446: 4770 bx lr
08001448 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8001448: b580 push {r7, lr}
800144a: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
800144c: 480f ldr r0, [pc, #60] @ (800148c <EE_Format+0x44>)
800144e: f7ff ff77 bl 8001340 <EE_FlashErasePage>
8001452: 4603 mov r3, r0
8001454: 2b00 cmp r3, #0
8001456: d001 beq.n 800145c <EE_Format+0x14>
return EE_STATUS_ERROR;
8001458: 2301 movs r3, #1
800145a: e015 b.n 8001488 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
800145c: 480c ldr r0, [pc, #48] @ (8001490 <EE_Format+0x48>)
800145e: f7ff ff6f bl 8001340 <EE_FlashErasePage>
8001462: 4603 mov r3, r0
8001464: 2b00 cmp r3, #0
8001466: d001 beq.n 800146c <EE_Format+0x24>
return EE_STATUS_ERROR;
8001468: 2301 movs r3, #1
800146a: e00d b.n 8001488 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
800146c: f64a 21aa movw r1, #43690 @ 0xaaaa
8001470: 4806 ldr r0, [pc, #24] @ (800148c <EE_Format+0x44>)
8001472: f7ff ff4a bl 800130a <EE_FlashProgramHalfWord>
8001476: 4603 mov r3, r0
8001478: 2b00 cmp r3, #0
800147a: d001 beq.n 8001480 <EE_Format+0x38>
return EE_STATUS_ERROR;
800147c: 2301 movs r3, #1
800147e: e003 b.n 8001488 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
8001480: 4b04 ldr r3, [pc, #16] @ (8001494 <EE_Format+0x4c>)
8001482: 4a02 ldr r2, [pc, #8] @ (800148c <EE_Format+0x44>)
8001484: 601a str r2, [r3, #0]
return EE_STATUS_OK;
8001486: 2300 movs r3, #0
}
8001488: 4618 mov r0, r3
800148a: bd80 pop {r7, pc}
800148c: 0800f800 .word 0x0800f800
8001490: 0800fc00 .word 0x0800fc00
8001494: 20000000 .word 0x20000000
08001498 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8001498: b480 push {r7}
800149a: b083 sub sp, #12
800149c: af00 add r7, sp, #0
800149e: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
80014a0: 687b ldr r3, [r7, #4]
80014a2: 4a05 ldr r2, [pc, #20] @ (80014b8 <EE_GetOtherPageBase+0x20>)
80014a4: 4293 cmp r3, r2
80014a6: d101 bne.n 80014ac <EE_GetOtherPageBase+0x14>
80014a8: 4b04 ldr r3, [pc, #16] @ (80014bc <EE_GetOtherPageBase+0x24>)
80014aa: e000 b.n 80014ae <EE_GetOtherPageBase+0x16>
80014ac: 4b02 ldr r3, [pc, #8] @ (80014b8 <EE_GetOtherPageBase+0x20>)
}
80014ae: 4618 mov r0, r3
80014b0: 370c adds r7, #12
80014b2: 46bd mov sp, r7
80014b4: bc80 pop {r7}
80014b6: 4770 bx lr
80014b8: 0800f800 .word 0x0800f800
80014bc: 0800fc00 .word 0x0800fc00
080014c0 <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
80014c0: b580 push {r7, lr}
80014c2: b088 sub sp, #32
80014c4: af00 add r7, sp, #0
80014c6: 4603 mov r3, r0
80014c8: 460a mov r2, r1
80014ca: 80fb strh r3, [r7, #6]
80014cc: 4613 mov r3, r2
80014ce: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
80014d0: 4b3c ldr r3, [pc, #240] @ (80015c4 <EE_PageTransfer+0x104>)
80014d2: 681b ldr r3, [r3, #0]
80014d4: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
80014d6: 6978 ldr r0, [r7, #20]
80014d8: f7ff ffde bl 8001498 <EE_GetOtherPageBase>
80014dc: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
80014de: 6938 ldr r0, [r7, #16]
80014e0: f7ff ff2e bl 8001340 <EE_FlashErasePage>
80014e4: 4603 mov r3, r0
80014e6: 2b00 cmp r3, #0
80014e8: d001 beq.n 80014ee <EE_PageTransfer+0x2e>
return EE_STATUS_ERROR;
80014ea: 2301 movs r3, #1
80014ec: e065 b.n 80015ba <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
80014ee: f245 5155 movw r1, #21845 @ 0x5555
80014f2: 6938 ldr r0, [r7, #16]
80014f4: f7ff ff09 bl 800130a <EE_FlashProgramHalfWord>
80014f8: 4603 mov r3, r0
80014fa: 2b00 cmp r3, #0
80014fc: d001 beq.n 8001502 <EE_PageTransfer+0x42>
return EE_STATUS_ERROR;
80014fe: 2301 movs r3, #1
8001500: e05b b.n 80015ba <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
8001502: 693b ldr r3, [r7, #16]
8001504: 3302 adds r3, #2
8001506: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8001508: 2300 movs r3, #0
800150a: 837b strh r3, [r7, #26]
800150c: e03c b.n 8001588 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
800150e: 8b7b ldrh r3, [r7, #26]
8001510: 4a2d ldr r2, [pc, #180] @ (80015c8 <EE_PageTransfer+0x108>)
8001512: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001516: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
8001518: 89fa ldrh r2, [r7, #14]
800151a: 88fb ldrh r3, [r7, #6]
800151c: 429a cmp r2, r3
800151e: d102 bne.n 8001526 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
8001520: 88bb ldrh r3, [r7, #4]
8001522: 817b strh r3, [r7, #10]
8001524: e00b b.n 800153e <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8001526: f107 020a add.w r2, r7, #10
800152a: 89fb ldrh r3, [r7, #14]
800152c: 4619 mov r1, r3
800152e: 6978 ldr r0, [r7, #20]
8001530: f7ff ff49 bl 80013c6 <EE_FindInPage>
8001534: 4603 mov r3, r0
8001536: 737b strb r3, [r7, #13]
if (st != EE_STATUS_OK)
8001538: 7b7b ldrb r3, [r7, #13]
800153a: 2b00 cmp r3, #0
800153c: d120 bne.n 8001580 <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
800153e: 89fb ldrh r3, [r7, #14]
8001540: 4619 mov r1, r3
8001542: 69f8 ldr r0, [r7, #28]
8001544: f7ff fee1 bl 800130a <EE_FlashProgramHalfWord>
8001548: 4603 mov r3, r0
800154a: 2b00 cmp r3, #0
800154c: d001 beq.n 8001552 <EE_PageTransfer+0x92>
return EE_STATUS_ERROR;
800154e: 2301 movs r3, #1
8001550: e033 b.n 80015ba <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
8001552: 69fb ldr r3, [r7, #28]
8001554: 3302 adds r3, #2
8001556: 897a ldrh r2, [r7, #10]
8001558: 4611 mov r1, r2
800155a: 4618 mov r0, r3
800155c: f7ff fed5 bl 800130a <EE_FlashProgramHalfWord>
8001560: 4603 mov r3, r0
8001562: 2b00 cmp r3, #0
8001564: d001 beq.n 800156a <EE_PageTransfer+0xaa>
return EE_STATUS_ERROR;
8001566: 2301 movs r3, #1
8001568: e027 b.n 80015ba <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
800156a: 69fb ldr r3, [r7, #28]
800156c: 3304 adds r3, #4
800156e: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
8001570: 693b ldr r3, [r7, #16]
8001572: f503 6380 add.w r3, r3, #1024 @ 0x400
8001576: 69fa ldr r2, [r7, #28]
8001578: 429a cmp r2, r3
800157a: d302 bcc.n 8001582 <EE_PageTransfer+0xc2>
return EE_STATUS_NO_SPACE;
800157c: 2303 movs r3, #3
800157e: e01c b.n 80015ba <EE_PageTransfer+0xfa>
continue;
8001580: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8001582: 8b7b ldrh r3, [r7, #26]
8001584: 3301 adds r3, #1
8001586: 837b strh r3, [r7, #26]
8001588: 8b7b ldrh r3, [r7, #26]
800158a: 2b3f cmp r3, #63 @ 0x3f
800158c: d9bf bls.n 800150e <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
800158e: 6978 ldr r0, [r7, #20]
8001590: f7ff fed6 bl 8001340 <EE_FlashErasePage>
8001594: 4603 mov r3, r0
8001596: 2b00 cmp r3, #0
8001598: d001 beq.n 800159e <EE_PageTransfer+0xde>
return EE_STATUS_ERROR;
800159a: 2301 movs r3, #1
800159c: e00d b.n 80015ba <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
800159e: f64a 21aa movw r1, #43690 @ 0xaaaa
80015a2: 6938 ldr r0, [r7, #16]
80015a4: f7ff feb1 bl 800130a <EE_FlashProgramHalfWord>
80015a8: 4603 mov r3, r0
80015aa: 2b00 cmp r3, #0
80015ac: d001 beq.n 80015b2 <EE_PageTransfer+0xf2>
return EE_STATUS_ERROR;
80015ae: 2301 movs r3, #1
80015b0: e003 b.n 80015ba <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
80015b2: 4a04 ldr r2, [pc, #16] @ (80015c4 <EE_PageTransfer+0x104>)
80015b4: 693b ldr r3, [r7, #16]
80015b6: 6013 str r3, [r2, #0]
return EE_STATUS_OK;
80015b8: 2300 movs r3, #0
}
80015ba: 4618 mov r0, r3
80015bc: 3720 adds r7, #32
80015be: 46bd mov sp, r7
80015c0: bd80 pop {r7, pc}
80015c2: bf00 nop
80015c4: 20000000 .word 0x20000000
80015c8: 0800f418 .word 0x0800f418
080015cc <EE_Init>:
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
* PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...)
*/
uint16_t EE_Init(void)
{
80015cc: b580 push {r7, lr}
80015ce: b082 sub sp, #8
80015d0: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
80015d2: 481e ldr r0, [pc, #120] @ (800164c <EE_Init+0x80>)
80015d4: f7ff fe8d bl 80012f2 <EE_GetPageStatus>
80015d8: 4603 mov r3, r0
80015da: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
80015dc: 481c ldr r0, [pc, #112] @ (8001650 <EE_Init+0x84>)
80015de: f7ff fe88 bl 80012f2 <EE_GetPageStatus>
80015e2: 4603 mov r3, r0
80015e4: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
80015e6: 88fb ldrh r3, [r7, #6]
80015e8: f64f 72ff movw r2, #65535 @ 0xffff
80015ec: 4293 cmp r3, r2
80015ee: d108 bne.n 8001602 <EE_Init+0x36>
80015f0: 88bb ldrh r3, [r7, #4]
80015f2: f64f 72ff movw r2, #65535 @ 0xffff
80015f6: 4293 cmp r3, r2
80015f8: d103 bne.n 8001602 <EE_Init+0x36>
{
/* Fresh device -> format */
return (uint16_t)EE_Format();
80015fa: f7ff ff25 bl 8001448 <EE_Format>
80015fe: 4603 mov r3, r0
8001600: e020 b.n 8001644 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
8001602: 88fb ldrh r3, [r7, #6]
8001604: f64a 22aa movw r2, #43690 @ 0xaaaa
8001608: 4293 cmp r3, r2
800160a: d109 bne.n 8001620 <EE_Init+0x54>
800160c: 88bb ldrh r3, [r7, #4]
800160e: f64f 72ff movw r2, #65535 @ 0xffff
8001612: 4293 cmp r3, r2
8001614: d104 bne.n 8001620 <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
8001616: 4b0f ldr r3, [pc, #60] @ (8001654 <EE_Init+0x88>)
8001618: 4a0c ldr r2, [pc, #48] @ (800164c <EE_Init+0x80>)
800161a: 601a str r2, [r3, #0]
return EE_OK;
800161c: 2300 movs r3, #0
800161e: e011 b.n 8001644 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
8001620: 88bb ldrh r3, [r7, #4]
8001622: f64a 22aa movw r2, #43690 @ 0xaaaa
8001626: 4293 cmp r3, r2
8001628: d109 bne.n 800163e <EE_Init+0x72>
800162a: 88fb ldrh r3, [r7, #6]
800162c: f64f 72ff movw r2, #65535 @ 0xffff
8001630: 4293 cmp r3, r2
8001632: d104 bne.n 800163e <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8001634: 4b07 ldr r3, [pc, #28] @ (8001654 <EE_Init+0x88>)
8001636: 4a06 ldr r2, [pc, #24] @ (8001650 <EE_Init+0x84>)
8001638: 601a str r2, [r3, #0]
return EE_OK;
800163a: 2300 movs r3, #0
800163c: e002 b.n 8001644 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return (uint16_t)EE_Format();
800163e: f7ff ff03 bl 8001448 <EE_Format>
8001642: 4603 mov r3, r0
}
}
8001644: 4618 mov r0, r3
8001646: 3708 adds r7, #8
8001648: 46bd mov sp, r7
800164a: bd80 pop {r7, pc}
800164c: 0800f800 .word 0x0800f800
8001650: 0800fc00 .word 0x0800fc00
8001654: 20000000 .word 0x20000000
08001658 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
* PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t)
*/
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8001658: b580 push {r7, lr}
800165a: b084 sub sp, #16
800165c: af00 add r7, sp, #0
800165e: 4603 mov r3, r0
8001660: 6039 str r1, [r7, #0]
8001662: 80fb strh r3, [r7, #6]
EE_Status st;
if (Data == NULL)
8001664: 683b ldr r3, [r7, #0]
8001666: 2b00 cmp r3, #0
8001668: d101 bne.n 800166e <EE_ReadVariable+0x16>
return EE_ERROR;
800166a: 2301 movs r3, #1
800166c: e00a b.n 8001684 <EE_ReadVariable+0x2c>
st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
800166e: 4b07 ldr r3, [pc, #28] @ (800168c <EE_ReadVariable+0x34>)
8001670: 681b ldr r3, [r3, #0]
8001672: 88f9 ldrh r1, [r7, #6]
8001674: 683a ldr r2, [r7, #0]
8001676: 4618 mov r0, r3
8001678: f7ff fea5 bl 80013c6 <EE_FindInPage>
800167c: 4603 mov r3, r0
800167e: 73fb strb r3, [r7, #15]
return (uint16_t)st;
8001680: 7bfb ldrb r3, [r7, #15]
8001682: b29b uxth r3, r3
}
8001684: 4618 mov r0, r3
8001686: 3710 adds r7, #16
8001688: 46bd mov sp, r7
800168a: bd80 pop {r7, pc}
800168c: 20000000 .word 0x20000000
08001690 <EE_WriteVariable>:
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
* PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t)
*/
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
8001690: b580 push {r7, lr}
8001692: b084 sub sp, #16
8001694: af00 add r7, sp, #0
8001696: 4603 mov r3, r0
8001698: 460a mov r2, r1
800169a: 80fb strh r3, [r7, #6]
800169c: 4613 mov r3, r2
800169e: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
80016a0: 4b17 ldr r3, [pc, #92] @ (8001700 <EE_WriteVariable+0x70>)
80016a2: 681b ldr r3, [r3, #0]
80016a4: 4618 mov r0, r3
80016a6: f7ff fe6a bl 800137e <EE_FindFreeAddress>
80016aa: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
80016ac: 68fb ldr r3, [r7, #12]
80016ae: 2b00 cmp r3, #0
80016b0: d017 beq.n 80016e2 <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
80016b2: 88fb ldrh r3, [r7, #6]
80016b4: 4619 mov r1, r3
80016b6: 68f8 ldr r0, [r7, #12]
80016b8: f7ff fe27 bl 800130a <EE_FlashProgramHalfWord>
80016bc: 4603 mov r3, r0
80016be: 2b00 cmp r3, #0
80016c0: d001 beq.n 80016c6 <EE_WriteVariable+0x36>
return EE_ERROR;
80016c2: 2301 movs r3, #1
80016c4: e017 b.n 80016f6 <EE_WriteVariable+0x66>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
80016c6: 68fb ldr r3, [r7, #12]
80016c8: 3302 adds r3, #2
80016ca: 88ba ldrh r2, [r7, #4]
80016cc: 4611 mov r1, r2
80016ce: 4618 mov r0, r3
80016d0: f7ff fe1b bl 800130a <EE_FlashProgramHalfWord>
80016d4: 4603 mov r3, r0
80016d6: 2b00 cmp r3, #0
80016d8: d001 beq.n 80016de <EE_WriteVariable+0x4e>
return EE_ERROR;
80016da: 2301 movs r3, #1
80016dc: e00b b.n 80016f6 <EE_WriteVariable+0x66>
return EE_OK;
80016de: 2300 movs r3, #0
80016e0: e009 b.n 80016f6 <EE_WriteVariable+0x66>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
80016e2: 88ba ldrh r2, [r7, #4]
80016e4: 88fb ldrh r3, [r7, #6]
80016e6: 4611 mov r1, r2
80016e8: 4618 mov r0, r3
80016ea: f7ff fee9 bl 80014c0 <EE_PageTransfer>
80016ee: 4603 mov r3, r0
80016f0: 72fb strb r3, [r7, #11]
return (uint16_t)st;
80016f2: 7afb ldrb r3, [r7, #11]
80016f4: b29b uxth r3, r3
}
80016f6: 4618 mov r0, r3
80016f8: 3710 adds r7, #16
80016fa: 46bd mov sp, r7
80016fc: bd80 pop {r7, pc}
80016fe: bf00 nop
8001700: 20000000 .word 0x20000000
08001704 <loadDefault>:
void loadDefault(void){
8001704: b580 push {r7, lr}
8001706: b09a sub sp, #104 @ 0x68
8001708: af00 add r7, sp, #0
uint8_t i;
char s[100];
uint16_t st;
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
800170a: 2300 movs r3, #0
800170c: f887 3067 strb.w r3, [r7, #103] @ 0x67
8001710: e035 b.n 800177e <loadDefault+0x7a>
st=EEW_Write(i,deftab[i]);
8001712: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001716: 4a1e ldr r2, [pc, #120] @ (8001790 <loadDefault+0x8c>)
8001718: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
800171c: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001720: 4611 mov r1, r2
8001722: 4618 mov r0, r3
8001724: f7ff fdcf bl 80012c6 <EEW_Write>
8001728: 4603 mov r3, r0
800172a: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
if (st == EE_OK)sprintf((char*)s,"\ndone %d=%d",i,deftab[i]);
800172e: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
8001732: 2b00 cmp r3, #0
8001734: d10b bne.n 800174e <loadDefault+0x4a>
8001736: f897 2067 ldrb.w r2, [r7, #103] @ 0x67
800173a: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
800173e: 4914 ldr r1, [pc, #80] @ (8001790 <loadDefault+0x8c>)
8001740: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8001744: 4638 mov r0, r7
8001746: 4913 ldr r1, [pc, #76] @ (8001794 <loadDefault+0x90>)
8001748: f00c fe24 bl 800e394 <siprintf>
800174c: e006 b.n 800175c <loadDefault+0x58>
else sprintf((char*)s,"\nee write error %d", st);
800174e: f8b7 2064 ldrh.w r2, [r7, #100] @ 0x64
8001752: 463b mov r3, r7
8001754: 4910 ldr r1, [pc, #64] @ (8001798 <loadDefault+0x94>)
8001756: 4618 mov r0, r3
8001758: f00c fe1c bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800175c: 463b mov r3, r7
800175e: 4618 mov r0, r3
8001760: f7fe fcf4 bl 800014c <strlen>
8001764: 4603 mov r3, r0
8001766: b29a uxth r2, r3
8001768: 4639 mov r1, r7
800176a: f04f 33ff mov.w r3, #4294967295
800176e: 480b ldr r0, [pc, #44] @ (800179c <loadDefault+0x98>)
8001770: f008 f820 bl 80097b4 <HAL_UART_Transmit>
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
8001774: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001778: 3301 adds r3, #1
800177a: f887 3067 strb.w r3, [r7, #103] @ 0x67
800177e: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001782: 2b3f cmp r3, #63 @ 0x3f
8001784: d9c5 bls.n 8001712 <loadDefault+0xe>
}
}
8001786: bf00 nop
8001788: bf00 nop
800178a: 3768 adds r7, #104 @ 0x68
800178c: 46bd mov sp, r7
800178e: bd80 pop {r7, pc}
8001790: 0800f398 .word 0x0800f398
8001794: 0800f10c .word 0x0800f10c
8001798: 0800f118 .word 0x0800f118
800179c: 200003a8 .word 0x200003a8
080017a0 <loadEE>:
void loadEE(void){
80017a0: b5f0 push {r4, r5, r6, r7, lr}
80017a2: b0b9 sub sp, #228 @ 0xe4
80017a4: af06 add r7, sp, #24
char s [200];
EEW_Read(M1PWMAP, &m1pwmap);
80017a6: 49bc ldr r1, [pc, #752] @ (8001a98 <loadEE+0x2f8>)
80017a8: 2000 movs r0, #0
80017aa: f7ff fd79 bl 80012a0 <EEW_Read>
EEW_Read(M1PWMCH, &m1pwmch);
80017ae: 49bb ldr r1, [pc, #748] @ (8001a9c <loadEE+0x2fc>)
80017b0: 2001 movs r0, #1
80017b2: f7ff fd75 bl 80012a0 <EEW_Read>
EEW_Read(M2PWMAP, &m2pwmap);
80017b6: 49ba ldr r1, [pc, #744] @ (8001aa0 <loadEE+0x300>)
80017b8: 2002 movs r0, #2
80017ba: f7ff fd71 bl 80012a0 <EEW_Read>
EEW_Read(M2PWMCH, &m2pwmch);
80017be: 49b9 ldr r1, [pc, #740] @ (8001aa4 <loadEE+0x304>)
80017c0: 2003 movs r0, #3
80017c2: f7ff fd6d bl 80012a0 <EEW_Read>
EEW_Read(M3PWMAP, &m3pwmap);
80017c6: 49b8 ldr r1, [pc, #736] @ (8001aa8 <loadEE+0x308>)
80017c8: 2004 movs r0, #4
80017ca: f7ff fd69 bl 80012a0 <EEW_Read>
EEW_Read(M3PWMCH, &m3pwmch);
80017ce: 49b7 ldr r1, [pc, #732] @ (8001aac <loadEE+0x30c>)
80017d0: 2005 movs r0, #5
80017d2: f7ff fd65 bl 80012a0 <EEW_Read>
EEW_Read(M4PWMAP, &m4pwmap);
80017d6: 49b6 ldr r1, [pc, #728] @ (8001ab0 <loadEE+0x310>)
80017d8: 2006 movs r0, #6
80017da: f7ff fd61 bl 80012a0 <EEW_Read>
EEW_Read(M4PWMCH, &m4pwmch);
80017de: 49b5 ldr r1, [pc, #724] @ (8001ab4 <loadEE+0x314>)
80017e0: 2007 movs r0, #7
80017e2: f7ff fd5d bl 80012a0 <EEW_Read>
EEW_Read(M1RAMPSTART, &mrampstart[M1-1]);
80017e6: 49b4 ldr r1, [pc, #720] @ (8001ab8 <loadEE+0x318>)
80017e8: 2008 movs r0, #8
80017ea: f7ff fd59 bl 80012a0 <EEW_Read>
EEW_Read(M2RAMPSTART, &mrampstart[M2-1]);
80017ee: 49b3 ldr r1, [pc, #716] @ (8001abc <loadEE+0x31c>)
80017f0: 2009 movs r0, #9
80017f2: f7ff fd55 bl 80012a0 <EEW_Read>
EEW_Read(M3RAMPSTART, &mrampstart[M3-1]);
80017f6: 49b2 ldr r1, [pc, #712] @ (8001ac0 <loadEE+0x320>)
80017f8: 200a movs r0, #10
80017fa: f7ff fd51 bl 80012a0 <EEW_Read>
EEW_Read(M4RAMPSTART, &mrampstart[M4-1]);
80017fe: 49b1 ldr r1, [pc, #708] @ (8001ac4 <loadEE+0x324>)
8001800: 200b movs r0, #11
8001802: f7ff fd4d bl 80012a0 <EEW_Read>
EEW_Read(M1TIMEOUTMAN, &m1TimeoutMan);
8001806: 49b0 ldr r1, [pc, #704] @ (8001ac8 <loadEE+0x328>)
8001808: 200c movs r0, #12
800180a: f7ff fd49 bl 80012a0 <EEW_Read>
EEW_Read(M2TIMEOUTMAN, &m2TimeoutMan);
800180e: 49af ldr r1, [pc, #700] @ (8001acc <loadEE+0x32c>)
8001810: 200d movs r0, #13
8001812: f7ff fd45 bl 80012a0 <EEW_Read>
EEW_Read(M3TIMEOUTMAN, &m3TimeoutMan);
8001816: 49ae ldr r1, [pc, #696] @ (8001ad0 <loadEE+0x330>)
8001818: 200e movs r0, #14
800181a: f7ff fd41 bl 80012a0 <EEW_Read>
EEW_Read(M4TIMEOUTMAN, &m4TimeoutMan);
800181e: 49ad ldr r1, [pc, #692] @ (8001ad4 <loadEE+0x334>)
8001820: 200f movs r0, #15
8001822: f7ff fd3d bl 80012a0 <EEW_Read>
EEW_Read(THANEM, &thanem);
8001826: 49ac ldr r1, [pc, #688] @ (8001ad8 <loadEE+0x338>)
8001828: 2018 movs r0, #24
800182a: f7ff fd39 bl 80012a0 <EEW_Read>
EEW_Read(TANEM, &tanem);
800182e: 49ab ldr r1, [pc, #684] @ (8001adc <loadEE+0x33c>)
8001830: 2019 movs r0, #25
8001832: f7ff fd35 bl 80012a0 <EEW_Read>
EEW_Read(M1PWMMAN, &m1pwmMan);
8001836: 49aa ldr r1, [pc, #680] @ (8001ae0 <loadEE+0x340>)
8001838: 201a movs r0, #26
800183a: f7ff fd31 bl 80012a0 <EEW_Read>
EEW_Read(M2PWMMAN, &m2pwmMan);
800183e: 49a9 ldr r1, [pc, #676] @ (8001ae4 <loadEE+0x344>)
8001840: 201b movs r0, #27
8001842: f7ff fd2d bl 80012a0 <EEW_Read>
EEW_Read(M3PWMMAN, &m3pwmMan);
8001846: 49a8 ldr r1, [pc, #672] @ (8001ae8 <loadEE+0x348>)
8001848: 201c movs r0, #28
800184a: f7ff fd29 bl 80012a0 <EEW_Read>
EEW_Read(M4PWMMAN, &m4pwmMan);
800184e: 49a7 ldr r1, [pc, #668] @ (8001aec <loadEE+0x34c>)
8001850: 201d movs r0, #29
8001852: f7ff fd25 bl 80012a0 <EEW_Read>
EEW_Read(TRAMPMAN, &trampman);
8001856: 49a6 ldr r1, [pc, #664] @ (8001af0 <loadEE+0x350>)
8001858: 201e movs r0, #30
800185a: f7ff fd21 bl 80012a0 <EEW_Read>
EEW_Read(TRAMP, &tramp);
800185e: 49a5 ldr r1, [pc, #660] @ (8001af4 <loadEE+0x354>)
8001860: 201f movs r0, #31
8001862: f7ff fd1d bl 80012a0 <EEW_Read>
EEW_Read(APM1START,&apM1start);
8001866: 49a4 ldr r1, [pc, #656] @ (8001af8 <loadEE+0x358>)
8001868: 2020 movs r0, #32
800186a: f7ff fd19 bl 80012a0 <EEW_Read>
EEW_Read(APM1STOP ,&apM1stop);
800186e: 49a3 ldr r1, [pc, #652] @ (8001afc <loadEE+0x35c>)
8001870: 2021 movs r0, #33 @ 0x21
8001872: f7ff fd15 bl 80012a0 <EEW_Read>
EEW_Read(APM2START,&apM2start);
8001876: 49a2 ldr r1, [pc, #648] @ (8001b00 <loadEE+0x360>)
8001878: 2022 movs r0, #34 @ 0x22
800187a: f7ff fd11 bl 80012a0 <EEW_Read>
EEW_Read(APM2STOP ,&apM2stop);
800187e: 49a1 ldr r1, [pc, #644] @ (8001b04 <loadEE+0x364>)
8001880: 2023 movs r0, #35 @ 0x23
8001882: f7ff fd0d bl 80012a0 <EEW_Read>
EEW_Read(APM3START,&apM3start);
8001886: 49a0 ldr r1, [pc, #640] @ (8001b08 <loadEE+0x368>)
8001888: 2024 movs r0, #36 @ 0x24
800188a: f7ff fd09 bl 80012a0 <EEW_Read>
EEW_Read(APM3STOP ,&apM3stop);
800188e: 499f ldr r1, [pc, #636] @ (8001b0c <loadEE+0x36c>)
8001890: 2025 movs r0, #37 @ 0x25
8001892: f7ff fd05 bl 80012a0 <EEW_Read>
EEW_Read(APM4START,&apM4start);
8001896: 499e ldr r1, [pc, #632] @ (8001b10 <loadEE+0x370>)
8001898: 2026 movs r0, #38 @ 0x26
800189a: f7ff fd01 bl 80012a0 <EEW_Read>
EEW_Read(APM4STOP ,&apM4stop);
800189e: 499d ldr r1, [pc, #628] @ (8001b14 <loadEE+0x374>)
80018a0: 2027 movs r0, #39 @ 0x27
80018a2: f7ff fcfd bl 80012a0 <EEW_Read>
EEW_Read(CHM1START,&chM1start);
80018a6: 499c ldr r1, [pc, #624] @ (8001b18 <loadEE+0x378>)
80018a8: 2028 movs r0, #40 @ 0x28
80018aa: f7ff fcf9 bl 80012a0 <EEW_Read>
EEW_Read(CHM1STOP ,&chM1stop);
80018ae: 499b ldr r1, [pc, #620] @ (8001b1c <loadEE+0x37c>)
80018b0: 2029 movs r0, #41 @ 0x29
80018b2: f7ff fcf5 bl 80012a0 <EEW_Read>
EEW_Read(CHM2START,&chM2start);
80018b6: 499a ldr r1, [pc, #616] @ (8001b20 <loadEE+0x380>)
80018b8: 202a movs r0, #42 @ 0x2a
80018ba: f7ff fcf1 bl 80012a0 <EEW_Read>
EEW_Read(CHM2STOP ,&chM2stop);
80018be: 4999 ldr r1, [pc, #612] @ (8001b24 <loadEE+0x384>)
80018c0: 202b movs r0, #43 @ 0x2b
80018c2: f7ff fced bl 80012a0 <EEW_Read>
EEW_Read(CHM3START,&chM3start);
80018c6: 4998 ldr r1, [pc, #608] @ (8001b28 <loadEE+0x388>)
80018c8: 202c movs r0, #44 @ 0x2c
80018ca: f7ff fce9 bl 80012a0 <EEW_Read>
EEW_Read(CHM3STOP ,&chM3stop);
80018ce: 4997 ldr r1, [pc, #604] @ (8001b2c <loadEE+0x38c>)
80018d0: 202d movs r0, #45 @ 0x2d
80018d2: f7ff fce5 bl 80012a0 <EEW_Read>
EEW_Read(CHM4START,&chM4start);
80018d6: 4996 ldr r1, [pc, #600] @ (8001b30 <loadEE+0x390>)
80018d8: 202e movs r0, #46 @ 0x2e
80018da: f7ff fce1 bl 80012a0 <EEW_Read>
EEW_Read(CHM4STOP ,&chM4stop);
80018de: 4995 ldr r1, [pc, #596] @ (8001b34 <loadEE+0x394>)
80018e0: 202f movs r0, #47 @ 0x2f
80018e2: f7ff fcdd bl 80012a0 <EEW_Read>
EEW_Read(FLAGPAR ,&flagPar);
80018e6: 4994 ldr r1, [pc, #592] @ (8001b38 <loadEE+0x398>)
80018e8: 203f movs r0, #63 @ 0x3f
80018ea: f7ff fcd9 bl 80012a0 <EEW_Read>
sprintf((char*)s,"LoadEE\n");
80018ee: 463b mov r3, r7
80018f0: 4992 ldr r1, [pc, #584] @ (8001b3c <loadEE+0x39c>)
80018f2: 4618 mov r0, r3
80018f4: f00c fd4e bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80018f8: 463b mov r3, r7
80018fa: 4618 mov r0, r3
80018fc: f7fe fc26 bl 800014c <strlen>
8001900: 4603 mov r3, r0
8001902: b29a uxth r2, r3
8001904: 4639 mov r1, r7
8001906: f04f 33ff mov.w r3, #4294967295
800190a: 488d ldr r0, [pc, #564] @ (8001b40 <loadEE+0x3a0>)
800190c: f007 ff52 bl 80097b4 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8001910: 4b61 ldr r3, [pc, #388] @ (8001a98 <loadEE+0x2f8>)
8001912: 881b ldrh r3, [r3, #0]
8001914: 469c mov ip, r3
8001916: 4b61 ldr r3, [pc, #388] @ (8001a9c <loadEE+0x2fc>)
8001918: 881b ldrh r3, [r3, #0]
800191a: 469e mov lr, r3
800191c: 4b60 ldr r3, [pc, #384] @ (8001aa0 <loadEE+0x300>)
800191e: 881b ldrh r3, [r3, #0]
8001920: 461a mov r2, r3
8001922: 4b60 ldr r3, [pc, #384] @ (8001aa4 <loadEE+0x304>)
8001924: 881b ldrh r3, [r3, #0]
8001926: 4619 mov r1, r3
8001928: 4b5f ldr r3, [pc, #380] @ (8001aa8 <loadEE+0x308>)
800192a: 881b ldrh r3, [r3, #0]
800192c: 461c mov r4, r3
800192e: 4b5f ldr r3, [pc, #380] @ (8001aac <loadEE+0x30c>)
8001930: 881b ldrh r3, [r3, #0]
8001932: 461d mov r5, r3
8001934: 4b5e ldr r3, [pc, #376] @ (8001ab0 <loadEE+0x310>)
8001936: 881b ldrh r3, [r3, #0]
8001938: 461e mov r6, r3
800193a: 4b5e ldr r3, [pc, #376] @ (8001ab4 <loadEE+0x314>)
800193c: 881b ldrh r3, [r3, #0]
800193e: 4638 mov r0, r7
8001940: 9305 str r3, [sp, #20]
8001942: 9604 str r6, [sp, #16]
8001944: 9503 str r5, [sp, #12]
8001946: 9402 str r4, [sp, #8]
8001948: 9101 str r1, [sp, #4]
800194a: 9200 str r2, [sp, #0]
800194c: 4673 mov r3, lr
800194e: 4662 mov r2, ip
8001950: 497c ldr r1, [pc, #496] @ (8001b44 <loadEE+0x3a4>)
8001952: f00c fd1f bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001956: 463b mov r3, r7
8001958: 4618 mov r0, r3
800195a: f7fe fbf7 bl 800014c <strlen>
800195e: 4603 mov r3, r0
8001960: b29a uxth r2, r3
8001962: 4639 mov r1, r7
8001964: f04f 33ff mov.w r3, #4294967295
8001968: 4875 ldr r0, [pc, #468] @ (8001b40 <loadEE+0x3a0>)
800196a: f007 ff23 bl 80097b4 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
800196e: 4b56 ldr r3, [pc, #344] @ (8001ac8 <loadEE+0x328>)
8001970: 881b ldrh r3, [r3, #0]
8001972: 4619 mov r1, r3
8001974: 4b55 ldr r3, [pc, #340] @ (8001acc <loadEE+0x32c>)
8001976: 881b ldrh r3, [r3, #0]
8001978: 461c mov r4, r3
800197a: 4b55 ldr r3, [pc, #340] @ (8001ad0 <loadEE+0x330>)
800197c: 881b ldrh r3, [r3, #0]
800197e: 461a mov r2, r3
8001980: 4b54 ldr r3, [pc, #336] @ (8001ad4 <loadEE+0x334>)
8001982: 881b ldrh r3, [r3, #0]
8001984: 4638 mov r0, r7
8001986: 9301 str r3, [sp, #4]
8001988: 9200 str r2, [sp, #0]
800198a: 4623 mov r3, r4
800198c: 460a mov r2, r1
800198e: 496e ldr r1, [pc, #440] @ (8001b48 <loadEE+0x3a8>)
8001990: f00c fd00 bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001994: 463b mov r3, r7
8001996: 4618 mov r0, r3
8001998: f7fe fbd8 bl 800014c <strlen>
800199c: 4603 mov r3, r0
800199e: b29a uxth r2, r3
80019a0: 4639 mov r1, r7
80019a2: f04f 33ff mov.w r3, #4294967295
80019a6: 4866 ldr r0, [pc, #408] @ (8001b40 <loadEE+0x3a0>)
80019a8: f007 ff04 bl 80097b4 <HAL_UART_Transmit>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
80019ac: 4b51 ldr r3, [pc, #324] @ (8001af4 <loadEE+0x354>)
80019ae: 881b ldrh r3, [r3, #0]
80019b0: 461a mov r2, r3
80019b2: 4b4f ldr r3, [pc, #316] @ (8001af0 <loadEE+0x350>)
80019b4: 881b ldrh r3, [r3, #0]
80019b6: 4638 mov r0, r7
80019b8: 4964 ldr r1, [pc, #400] @ (8001b4c <loadEE+0x3ac>)
80019ba: f00c fceb bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80019be: 463b mov r3, r7
80019c0: 4618 mov r0, r3
80019c2: f7fe fbc3 bl 800014c <strlen>
80019c6: 4603 mov r3, r0
80019c8: b29a uxth r2, r3
80019ca: 4639 mov r1, r7
80019cc: f04f 33ff mov.w r3, #4294967295
80019d0: 485b ldr r0, [pc, #364] @ (8001b40 <loadEE+0x3a0>)
80019d2: f007 feef bl 80097b4 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
80019d6: 4b42 ldr r3, [pc, #264] @ (8001ae0 <loadEE+0x340>)
80019d8: 881b ldrh r3, [r3, #0]
80019da: 4619 mov r1, r3
80019dc: 4b41 ldr r3, [pc, #260] @ (8001ae4 <loadEE+0x344>)
80019de: 881b ldrh r3, [r3, #0]
80019e0: 461c mov r4, r3
80019e2: 4b41 ldr r3, [pc, #260] @ (8001ae8 <loadEE+0x348>)
80019e4: 881b ldrh r3, [r3, #0]
80019e6: 461a mov r2, r3
80019e8: 4b40 ldr r3, [pc, #256] @ (8001aec <loadEE+0x34c>)
80019ea: 881b ldrh r3, [r3, #0]
80019ec: 4638 mov r0, r7
80019ee: 9301 str r3, [sp, #4]
80019f0: 9200 str r2, [sp, #0]
80019f2: 4623 mov r3, r4
80019f4: 460a mov r2, r1
80019f6: 4956 ldr r1, [pc, #344] @ (8001b50 <loadEE+0x3b0>)
80019f8: f00c fccc bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80019fc: 463b mov r3, r7
80019fe: 4618 mov r0, r3
8001a00: f7fe fba4 bl 800014c <strlen>
8001a04: 4603 mov r3, r0
8001a06: b29a uxth r2, r3
8001a08: 4639 mov r1, r7
8001a0a: f04f 33ff mov.w r3, #4294967295
8001a0e: 484c ldr r0, [pc, #304] @ (8001b40 <loadEE+0x3a0>)
8001a10: f007 fed0 bl 80097b4 <HAL_UART_Transmit>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
8001a14: 4b38 ldr r3, [pc, #224] @ (8001af8 <loadEE+0x358>)
8001a16: 881b ldrh r3, [r3, #0]
8001a18: 4619 mov r1, r3
8001a1a: 4b38 ldr r3, [pc, #224] @ (8001afc <loadEE+0x35c>)
8001a1c: 881b ldrh r3, [r3, #0]
8001a1e: 461c mov r4, r3
8001a20: 4b3d ldr r3, [pc, #244] @ (8001b18 <loadEE+0x378>)
8001a22: 881b ldrh r3, [r3, #0]
8001a24: 461a mov r2, r3
8001a26: 4b3d ldr r3, [pc, #244] @ (8001b1c <loadEE+0x37c>)
8001a28: 881b ldrh r3, [r3, #0]
8001a2a: 4638 mov r0, r7
8001a2c: 9301 str r3, [sp, #4]
8001a2e: 9200 str r2, [sp, #0]
8001a30: 4623 mov r3, r4
8001a32: 460a mov r2, r1
8001a34: 4947 ldr r1, [pc, #284] @ (8001b54 <loadEE+0x3b4>)
8001a36: f00c fcad bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001a3a: 463b mov r3, r7
8001a3c: 4618 mov r0, r3
8001a3e: f7fe fb85 bl 800014c <strlen>
8001a42: 4603 mov r3, r0
8001a44: b29a uxth r2, r3
8001a46: 4639 mov r1, r7
8001a48: f04f 33ff mov.w r3, #4294967295
8001a4c: 483c ldr r0, [pc, #240] @ (8001b40 <loadEE+0x3a0>)
8001a4e: f007 feb1 bl 80097b4 <HAL_UART_Transmit>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
8001a52: 4b2b ldr r3, [pc, #172] @ (8001b00 <loadEE+0x360>)
8001a54: 881b ldrh r3, [r3, #0]
8001a56: 4619 mov r1, r3
8001a58: 4b2a ldr r3, [pc, #168] @ (8001b04 <loadEE+0x364>)
8001a5a: 881b ldrh r3, [r3, #0]
8001a5c: 461c mov r4, r3
8001a5e: 4b30 ldr r3, [pc, #192] @ (8001b20 <loadEE+0x380>)
8001a60: 881b ldrh r3, [r3, #0]
8001a62: 461a mov r2, r3
8001a64: 4b2f ldr r3, [pc, #188] @ (8001b24 <loadEE+0x384>)
8001a66: 881b ldrh r3, [r3, #0]
8001a68: 4638 mov r0, r7
8001a6a: 9301 str r3, [sp, #4]
8001a6c: 9200 str r2, [sp, #0]
8001a6e: 4623 mov r3, r4
8001a70: 460a mov r2, r1
8001a72: 4939 ldr r1, [pc, #228] @ (8001b58 <loadEE+0x3b8>)
8001a74: f00c fc8e bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001a78: 463b mov r3, r7
8001a7a: 4618 mov r0, r3
8001a7c: f7fe fb66 bl 800014c <strlen>
8001a80: 4603 mov r3, r0
8001a82: b29a uxth r2, r3
8001a84: 4639 mov r1, r7
8001a86: f04f 33ff mov.w r3, #4294967295
8001a8a: 482d ldr r0, [pc, #180] @ (8001b40 <loadEE+0x3a0>)
8001a8c: f007 fe92 bl 80097b4 <HAL_UART_Transmit>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
8001a90: 4b1d ldr r3, [pc, #116] @ (8001b08 <loadEE+0x368>)
8001a92: 881b ldrh r3, [r3, #0]
8001a94: 4619 mov r1, r3
8001a96: e061 b.n 8001b5c <loadEE+0x3bc>
8001a98: 20000400 .word 0x20000400
8001a9c: 20000402 .word 0x20000402
8001aa0: 20000404 .word 0x20000404
8001aa4: 20000406 .word 0x20000406
8001aa8: 20000408 .word 0x20000408
8001aac: 2000040a .word 0x2000040a
8001ab0: 2000040c .word 0x2000040c
8001ab4: 2000040e .word 0x2000040e
8001ab8: 2000044c .word 0x2000044c
8001abc: 2000044e .word 0x2000044e
8001ac0: 20000450 .word 0x20000450
8001ac4: 20000452 .word 0x20000452
8001ac8: 20000410 .word 0x20000410
8001acc: 20000412 .word 0x20000412
8001ad0: 20000414 .word 0x20000414
8001ad4: 20000416 .word 0x20000416
8001ad8: 2000041c .word 0x2000041c
8001adc: 2000041a .word 0x2000041a
8001ae0: 20000420 .word 0x20000420
8001ae4: 20000422 .word 0x20000422
8001ae8: 20000424 .word 0x20000424
8001aec: 20000426 .word 0x20000426
8001af0: 2000041e .word 0x2000041e
8001af4: 20000418 .word 0x20000418
8001af8: 20000428 .word 0x20000428
8001afc: 2000042a .word 0x2000042a
8001b00: 2000042c .word 0x2000042c
8001b04: 2000042e .word 0x2000042e
8001b08: 20000430 .word 0x20000430
8001b0c: 20000432 .word 0x20000432
8001b10: 20000434 .word 0x20000434
8001b14: 20000436 .word 0x20000436
8001b18: 20000438 .word 0x20000438
8001b1c: 2000043a .word 0x2000043a
8001b20: 2000043c .word 0x2000043c
8001b24: 2000043e .word 0x2000043e
8001b28: 20000440 .word 0x20000440
8001b2c: 20000442 .word 0x20000442
8001b30: 20000444 .word 0x20000444
8001b34: 20000446 .word 0x20000446
8001b38: 20000448 .word 0x20000448
8001b3c: 0800f12c .word 0x0800f12c
8001b40: 200003a8 .word 0x200003a8
8001b44: 0800f134 .word 0x0800f134
8001b48: 0800f190 .word 0x0800f190
8001b4c: 0800f1d4 .word 0x0800f1d4
8001b50: 0800f1ec .word 0x0800f1ec
8001b54: 0800f220 .word 0x0800f220
8001b58: 0800f254 .word 0x0800f254
8001b5c: 4b1f ldr r3, [pc, #124] @ (8001bdc <loadEE+0x43c>)
8001b5e: 881b ldrh r3, [r3, #0]
8001b60: 461c mov r4, r3
8001b62: 4b1f ldr r3, [pc, #124] @ (8001be0 <loadEE+0x440>)
8001b64: 881b ldrh r3, [r3, #0]
8001b66: 461a mov r2, r3
8001b68: 4b1e ldr r3, [pc, #120] @ (8001be4 <loadEE+0x444>)
8001b6a: 881b ldrh r3, [r3, #0]
8001b6c: 4638 mov r0, r7
8001b6e: 9301 str r3, [sp, #4]
8001b70: 9200 str r2, [sp, #0]
8001b72: 4623 mov r3, r4
8001b74: 460a mov r2, r1
8001b76: 491c ldr r1, [pc, #112] @ (8001be8 <loadEE+0x448>)
8001b78: f00c fc0c bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001b7c: 463b mov r3, r7
8001b7e: 4618 mov r0, r3
8001b80: f7fe fae4 bl 800014c <strlen>
8001b84: 4603 mov r3, r0
8001b86: b29a uxth r2, r3
8001b88: 4639 mov r1, r7
8001b8a: f04f 33ff mov.w r3, #4294967295
8001b8e: 4817 ldr r0, [pc, #92] @ (8001bec <loadEE+0x44c>)
8001b90: f007 fe10 bl 80097b4 <HAL_UART_Transmit>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
8001b94: 4b16 ldr r3, [pc, #88] @ (8001bf0 <loadEE+0x450>)
8001b96: 881b ldrh r3, [r3, #0]
8001b98: 4619 mov r1, r3
8001b9a: 4b16 ldr r3, [pc, #88] @ (8001bf4 <loadEE+0x454>)
8001b9c: 881b ldrh r3, [r3, #0]
8001b9e: 461c mov r4, r3
8001ba0: 4b15 ldr r3, [pc, #84] @ (8001bf8 <loadEE+0x458>)
8001ba2: 881b ldrh r3, [r3, #0]
8001ba4: 461a mov r2, r3
8001ba6: 4b15 ldr r3, [pc, #84] @ (8001bfc <loadEE+0x45c>)
8001ba8: 881b ldrh r3, [r3, #0]
8001baa: 4638 mov r0, r7
8001bac: 9301 str r3, [sp, #4]
8001bae: 9200 str r2, [sp, #0]
8001bb0: 4623 mov r3, r4
8001bb2: 460a mov r2, r1
8001bb4: 4912 ldr r1, [pc, #72] @ (8001c00 <loadEE+0x460>)
8001bb6: f00c fbed bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001bba: 463b mov r3, r7
8001bbc: 4618 mov r0, r3
8001bbe: f7fe fac5 bl 800014c <strlen>
8001bc2: 4603 mov r3, r0
8001bc4: b29a uxth r2, r3
8001bc6: 4639 mov r1, r7
8001bc8: f04f 33ff mov.w r3, #4294967295
8001bcc: 4807 ldr r0, [pc, #28] @ (8001bec <loadEE+0x44c>)
8001bce: f007 fdf1 bl 80097b4 <HAL_UART_Transmit>
}
8001bd2: bf00 nop
8001bd4: 37cc adds r7, #204 @ 0xcc
8001bd6: 46bd mov sp, r7
8001bd8: bdf0 pop {r4, r5, r6, r7, pc}
8001bda: bf00 nop
8001bdc: 20000432 .word 0x20000432
8001be0: 20000440 .word 0x20000440
8001be4: 20000442 .word 0x20000442
8001be8: 0800f288 .word 0x0800f288
8001bec: 200003a8 .word 0x200003a8
8001bf0: 20000434 .word 0x20000434
8001bf4: 20000436 .word 0x20000436
8001bf8: 20000444 .word 0x20000444
8001bfc: 20000446 .word 0x20000446
8001c00: 0800f2bc .word 0x0800f2bc
08001c04 <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void) {
8001c04: b580 push {r7, lr}
8001c06: b082 sub sp, #8
8001c08: af00 add r7, sp, #0
static uint8_t c1s = 0;
static uint8_t inidx = 0;
static uint8_t inbuf[4];
uint8_t i;
if (++c10ms >= 10) { // 10 ms
8001c0a: 4b7c ldr r3, [pc, #496] @ (8001dfc <HAL_SYSTICK_Callback+0x1f8>)
8001c0c: 781b ldrb r3, [r3, #0]
8001c0e: 3301 adds r3, #1
8001c10: b2da uxtb r2, r3
8001c12: 4b7a ldr r3, [pc, #488] @ (8001dfc <HAL_SYSTICK_Callback+0x1f8>)
8001c14: 701a strb r2, [r3, #0]
8001c16: 4b79 ldr r3, [pc, #484] @ (8001dfc <HAL_SYSTICK_Callback+0x1f8>)
8001c18: 781b ldrb r3, [r3, #0]
8001c1a: 2b09 cmp r3, #9
8001c1c: f240 81e7 bls.w 8001fee <HAL_SYSTICK_Callback+0x3ea>
c10ms = 0;
8001c20: 4b76 ldr r3, [pc, #472] @ (8001dfc <HAL_SYSTICK_Callback+0x1f8>)
8001c22: 2200 movs r2, #0
8001c24: 701a strb r2, [r3, #0]
if (rtP1)
8001c26: 4b76 ldr r3, [pc, #472] @ (8001e00 <HAL_SYSTICK_Callback+0x1fc>)
8001c28: 781b ldrb r3, [r3, #0]
8001c2a: b2db uxtb r3, r3
8001c2c: 2b00 cmp r3, #0
8001c2e: d006 beq.n 8001c3e <HAL_SYSTICK_Callback+0x3a>
rtP1--;
8001c30: 4b73 ldr r3, [pc, #460] @ (8001e00 <HAL_SYSTICK_Callback+0x1fc>)
8001c32: 781b ldrb r3, [r3, #0]
8001c34: b2db uxtb r3, r3
8001c36: 3b01 subs r3, #1
8001c38: b2da uxtb r2, r3
8001c3a: 4b71 ldr r3, [pc, #452] @ (8001e00 <HAL_SYSTICK_Callback+0x1fc>)
8001c3c: 701a strb r2, [r3, #0]
if (rtP2)
8001c3e: 4b71 ldr r3, [pc, #452] @ (8001e04 <HAL_SYSTICK_Callback+0x200>)
8001c40: 781b ldrb r3, [r3, #0]
8001c42: b2db uxtb r3, r3
8001c44: 2b00 cmp r3, #0
8001c46: d006 beq.n 8001c56 <HAL_SYSTICK_Callback+0x52>
rtP2--;
8001c48: 4b6e ldr r3, [pc, #440] @ (8001e04 <HAL_SYSTICK_Callback+0x200>)
8001c4a: 781b ldrb r3, [r3, #0]
8001c4c: b2db uxtb r3, r3
8001c4e: 3b01 subs r3, #1
8001c50: b2da uxtb r2, r3
8001c52: 4b6c ldr r3, [pc, #432] @ (8001e04 <HAL_SYSTICK_Callback+0x200>)
8001c54: 701a strb r2, [r3, #0]
if (rtTLC)
8001c56: 4b6c ldr r3, [pc, #432] @ (8001e08 <HAL_SYSTICK_Callback+0x204>)
8001c58: 781b ldrb r3, [r3, #0]
8001c5a: b2db uxtb r3, r3
8001c5c: 2b00 cmp r3, #0
8001c5e: d006 beq.n 8001c6e <HAL_SYSTICK_Callback+0x6a>
rtTLC--;
8001c60: 4b69 ldr r3, [pc, #420] @ (8001e08 <HAL_SYSTICK_Callback+0x204>)
8001c62: 781b ldrb r3, [r3, #0]
8001c64: b2db uxtb r3, r3
8001c66: 3b01 subs r3, #1
8001c68: b2da uxtb r2, r3
8001c6a: 4b67 ldr r3, [pc, #412] @ (8001e08 <HAL_SYSTICK_Callback+0x204>)
8001c6c: 701a strb r2, [r3, #0]
//**** legge i tasti********************************************************************************
inidx++;
8001c6e: 4b67 ldr r3, [pc, #412] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c70: 781b ldrb r3, [r3, #0]
8001c72: 3301 adds r3, #1
8001c74: b2da uxtb r2, r3
8001c76: 4b65 ldr r3, [pc, #404] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c78: 701a strb r2, [r3, #0]
inidx &= 0x03;
8001c7a: 4b64 ldr r3, [pc, #400] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c7c: 781b ldrb r3, [r3, #0]
8001c7e: f003 0303 and.w r3, r3, #3
8001c82: b2da uxtb r2, r3
8001c84: 4b61 ldr r3, [pc, #388] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c86: 701a strb r2, [r3, #0]
if (HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin) == GPIO_PIN_RESET)
8001c88: f44f 4180 mov.w r1, #16384 @ 0x4000
8001c8c: 4860 ldr r0, [pc, #384] @ (8001e10 <HAL_SYSTICK_Callback+0x20c>)
8001c8e: f004 fc7b bl 8006588 <HAL_GPIO_ReadPin>
8001c92: 4603 mov r3, r0
8001c94: 2b00 cmp r3, #0
8001c96: d10c bne.n 8001cb2 <HAL_SYSTICK_Callback+0xae>
inbuf[inidx] |= INP1;
8001c98: 4b5c ldr r3, [pc, #368] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001c9a: 781b ldrb r3, [r3, #0]
8001c9c: 461a mov r2, r3
8001c9e: 4b5d ldr r3, [pc, #372] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001ca0: 5c9b ldrb r3, [r3, r2]
8001ca2: 4a5a ldr r2, [pc, #360] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001ca4: 7812 ldrb r2, [r2, #0]
8001ca6: f043 0301 orr.w r3, r3, #1
8001caa: b2d9 uxtb r1, r3
8001cac: 4b59 ldr r3, [pc, #356] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cae: 5499 strb r1, [r3, r2]
8001cb0: e00b b.n 8001cca <HAL_SYSTICK_Callback+0xc6>
else
inbuf[inidx] &= (~INP1);
8001cb2: 4b56 ldr r3, [pc, #344] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001cb4: 781b ldrb r3, [r3, #0]
8001cb6: 461a mov r2, r3
8001cb8: 4b56 ldr r3, [pc, #344] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cba: 5c9b ldrb r3, [r3, r2]
8001cbc: 4a53 ldr r2, [pc, #332] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001cbe: 7812 ldrb r2, [r2, #0]
8001cc0: f023 0301 bic.w r3, r3, #1
8001cc4: b2d9 uxtb r1, r3
8001cc6: 4b53 ldr r3, [pc, #332] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cc8: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin) == GPIO_PIN_RESET)
8001cca: f44f 4100 mov.w r1, #32768 @ 0x8000
8001cce: 4850 ldr r0, [pc, #320] @ (8001e10 <HAL_SYSTICK_Callback+0x20c>)
8001cd0: f004 fc5a bl 8006588 <HAL_GPIO_ReadPin>
8001cd4: 4603 mov r3, r0
8001cd6: 2b00 cmp r3, #0
8001cd8: d10c bne.n 8001cf4 <HAL_SYSTICK_Callback+0xf0>
inbuf[inidx] |= INP2;
8001cda: 4b4c ldr r3, [pc, #304] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001cdc: 781b ldrb r3, [r3, #0]
8001cde: 461a mov r2, r3
8001ce0: 4b4c ldr r3, [pc, #304] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001ce2: 5c9b ldrb r3, [r3, r2]
8001ce4: 4a49 ldr r2, [pc, #292] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001ce6: 7812 ldrb r2, [r2, #0]
8001ce8: f043 0302 orr.w r3, r3, #2
8001cec: b2d9 uxtb r1, r3
8001cee: 4b49 ldr r3, [pc, #292] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cf0: 5499 strb r1, [r3, r2]
8001cf2: e00b b.n 8001d0c <HAL_SYSTICK_Callback+0x108>
else
inbuf[inidx] &= (~INP2);
8001cf4: 4b45 ldr r3, [pc, #276] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001cf6: 781b ldrb r3, [r3, #0]
8001cf8: 461a mov r2, r3
8001cfa: 4b46 ldr r3, [pc, #280] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001cfc: 5c9b ldrb r3, [r3, r2]
8001cfe: 4a43 ldr r2, [pc, #268] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d00: 7812 ldrb r2, [r2, #0]
8001d02: f023 0302 bic.w r3, r3, #2
8001d06: b2d9 uxtb r1, r3
8001d08: 4b42 ldr r3, [pc, #264] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d0a: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin) == GPIO_PIN_RESET)
8001d0c: f44f 5180 mov.w r1, #4096 @ 0x1000
8001d10: 4841 ldr r0, [pc, #260] @ (8001e18 <HAL_SYSTICK_Callback+0x214>)
8001d12: f004 fc39 bl 8006588 <HAL_GPIO_ReadPin>
8001d16: 4603 mov r3, r0
8001d18: 2b00 cmp r3, #0
8001d1a: d10c bne.n 8001d36 <HAL_SYSTICK_Callback+0x132>
inbuf[inidx] |= INCH1;
8001d1c: 4b3b ldr r3, [pc, #236] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d1e: 781b ldrb r3, [r3, #0]
8001d20: 461a mov r2, r3
8001d22: 4b3c ldr r3, [pc, #240] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d24: 5c9b ldrb r3, [r3, r2]
8001d26: 4a39 ldr r2, [pc, #228] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d28: 7812 ldrb r2, [r2, #0]
8001d2a: f043 0304 orr.w r3, r3, #4
8001d2e: b2d9 uxtb r1, r3
8001d30: 4b38 ldr r3, [pc, #224] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d32: 5499 strb r1, [r3, r2]
8001d34: e00b b.n 8001d4e <HAL_SYSTICK_Callback+0x14a>
else
inbuf[inidx] &= (~INCH1);
8001d36: 4b35 ldr r3, [pc, #212] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d38: 781b ldrb r3, [r3, #0]
8001d3a: 461a mov r2, r3
8001d3c: 4b35 ldr r3, [pc, #212] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d3e: 5c9b ldrb r3, [r3, r2]
8001d40: 4a32 ldr r2, [pc, #200] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d42: 7812 ldrb r2, [r2, #0]
8001d44: f023 0304 bic.w r3, r3, #4
8001d48: b2d9 uxtb r1, r3
8001d4a: 4b32 ldr r3, [pc, #200] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d4c: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin) == GPIO_PIN_RESET)
8001d4e: f44f 5100 mov.w r1, #8192 @ 0x2000
8001d52: 4831 ldr r0, [pc, #196] @ (8001e18 <HAL_SYSTICK_Callback+0x214>)
8001d54: f004 fc18 bl 8006588 <HAL_GPIO_ReadPin>
8001d58: 4603 mov r3, r0
8001d5a: 2b00 cmp r3, #0
8001d5c: d10c bne.n 8001d78 <HAL_SYSTICK_Callback+0x174>
inbuf[inidx] |= INCH2;
8001d5e: 4b2b ldr r3, [pc, #172] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d60: 781b ldrb r3, [r3, #0]
8001d62: 461a mov r2, r3
8001d64: 4b2b ldr r3, [pc, #172] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d66: 5c9b ldrb r3, [r3, r2]
8001d68: 4a28 ldr r2, [pc, #160] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d6a: 7812 ldrb r2, [r2, #0]
8001d6c: f043 0308 orr.w r3, r3, #8
8001d70: b2d9 uxtb r1, r3
8001d72: 4b28 ldr r3, [pc, #160] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d74: 5499 strb r1, [r3, r2]
8001d76: e00b b.n 8001d90 <HAL_SYSTICK_Callback+0x18c>
else
inbuf[inidx] &= (~INCH2);
8001d78: 4b24 ldr r3, [pc, #144] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d7a: 781b ldrb r3, [r3, #0]
8001d7c: 461a mov r2, r3
8001d7e: 4b25 ldr r3, [pc, #148] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d80: 5c9b ldrb r3, [r3, r2]
8001d82: 4a22 ldr r2, [pc, #136] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001d84: 7812 ldrb r2, [r2, #0]
8001d86: f023 0308 bic.w r3, r3, #8
8001d8a: b2d9 uxtb r1, r3
8001d8c: 4b21 ldr r3, [pc, #132] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001d8e: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin) == GPIO_PIN_RESET)
8001d90: f44f 4180 mov.w r1, #16384 @ 0x4000
8001d94: 4820 ldr r0, [pc, #128] @ (8001e18 <HAL_SYSTICK_Callback+0x214>)
8001d96: f004 fbf7 bl 8006588 <HAL_GPIO_ReadPin>
8001d9a: 4603 mov r3, r0
8001d9c: 2b00 cmp r3, #0
8001d9e: d10c bne.n 8001dba <HAL_SYSTICK_Callback+0x1b6>
inbuf[inidx] |= INCH3;
8001da0: 4b1a ldr r3, [pc, #104] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001da2: 781b ldrb r3, [r3, #0]
8001da4: 461a mov r2, r3
8001da6: 4b1b ldr r3, [pc, #108] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001da8: 5c9b ldrb r3, [r3, r2]
8001daa: 4a18 ldr r2, [pc, #96] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001dac: 7812 ldrb r2, [r2, #0]
8001dae: f043 0310 orr.w r3, r3, #16
8001db2: b2d9 uxtb r1, r3
8001db4: 4b17 ldr r3, [pc, #92] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001db6: 5499 strb r1, [r3, r2]
8001db8: e00b b.n 8001dd2 <HAL_SYSTICK_Callback+0x1ce>
else
inbuf[inidx] &= (~INCH3);
8001dba: 4b14 ldr r3, [pc, #80] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001dbc: 781b ldrb r3, [r3, #0]
8001dbe: 461a mov r2, r3
8001dc0: 4b14 ldr r3, [pc, #80] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001dc2: 5c9b ldrb r3, [r3, r2]
8001dc4: 4a11 ldr r2, [pc, #68] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001dc6: 7812 ldrb r2, [r2, #0]
8001dc8: f023 0310 bic.w r3, r3, #16
8001dcc: b2d9 uxtb r1, r3
8001dce: 4b11 ldr r3, [pc, #68] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001dd0: 5499 strb r1, [r3, r2]
if (HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin) == GPIO_PIN_RESET)
8001dd2: f44f 4100 mov.w r1, #32768 @ 0x8000
8001dd6: 4810 ldr r0, [pc, #64] @ (8001e18 <HAL_SYSTICK_Callback+0x214>)
8001dd8: f004 fbd6 bl 8006588 <HAL_GPIO_ReadPin>
8001ddc: 4603 mov r3, r0
8001dde: 2b00 cmp r3, #0
8001de0: d11c bne.n 8001e1c <HAL_SYSTICK_Callback+0x218>
inbuf[inidx] |= INCH4;
8001de2: 4b0a ldr r3, [pc, #40] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001de4: 781b ldrb r3, [r3, #0]
8001de6: 461a mov r2, r3
8001de8: 4b0a ldr r3, [pc, #40] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001dea: 5c9b ldrb r3, [r3, r2]
8001dec: 4a07 ldr r2, [pc, #28] @ (8001e0c <HAL_SYSTICK_Callback+0x208>)
8001dee: 7812 ldrb r2, [r2, #0]
8001df0: f043 0320 orr.w r3, r3, #32
8001df4: b2d9 uxtb r1, r3
8001df6: 4b07 ldr r3, [pc, #28] @ (8001e14 <HAL_SYSTICK_Callback+0x210>)
8001df8: 5499 strb r1, [r3, r2]
8001dfa: e01b b.n 8001e34 <HAL_SYSTICK_Callback+0x230>
8001dfc: 2000045a .word 0x2000045a
8001e00: 20000004 .word 0x20000004
8001e04: 20000005 .word 0x20000005
8001e08: 20000006 .word 0x20000006
8001e0c: 2000045b .word 0x2000045b
8001e10: 40011000 .word 0x40011000
8001e14: 2000045c .word 0x2000045c
8001e18: 40010c00 .word 0x40010c00
else
inbuf[inidx] &= (~INCH4);
8001e1c: 4b76 ldr r3, [pc, #472] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f4>)
8001e1e: 781b ldrb r3, [r3, #0]
8001e20: 461a mov r2, r3
8001e22: 4b76 ldr r3, [pc, #472] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e24: 5c9b ldrb r3, [r3, r2]
8001e26: 4a74 ldr r2, [pc, #464] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f4>)
8001e28: 7812 ldrb r2, [r2, #0]
8001e2a: f023 0320 bic.w r3, r3, #32
8001e2e: b2d9 uxtb r1, r3
8001e30: 4b72 ldr r3, [pc, #456] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e32: 5499 strb r1, [r3, r2]
pulsanti |= (inbuf[0] & inbuf[1] & inbuf[2] & inbuf[3]);
8001e34: 4b71 ldr r3, [pc, #452] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e36: 781a ldrb r2, [r3, #0]
8001e38: 4b70 ldr r3, [pc, #448] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e3a: 785b ldrb r3, [r3, #1]
8001e3c: 4013 ands r3, r2
8001e3e: b2da uxtb r2, r3
8001e40: 4b6e ldr r3, [pc, #440] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e42: 789b ldrb r3, [r3, #2]
8001e44: 4013 ands r3, r2
8001e46: b2da uxtb r2, r3
8001e48: 4b6c ldr r3, [pc, #432] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e4a: 78db ldrb r3, [r3, #3]
8001e4c: 4013 ands r3, r2
8001e4e: b2da uxtb r2, r3
8001e50: 4b6b ldr r3, [pc, #428] @ (8002000 <HAL_SYSTICK_Callback+0x3fc>)
8001e52: 781b ldrb r3, [r3, #0]
8001e54: 4313 orrs r3, r2
8001e56: b2da uxtb r2, r3
8001e58: 4b69 ldr r3, [pc, #420] @ (8002000 <HAL_SYSTICK_Callback+0x3fc>)
8001e5a: 701a strb r2, [r3, #0]
pulsanti &= (inbuf[0] | inbuf[1] | inbuf[2] | inbuf[3]);
8001e5c: 4b67 ldr r3, [pc, #412] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e5e: 781a ldrb r2, [r3, #0]
8001e60: 4b66 ldr r3, [pc, #408] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e62: 785b ldrb r3, [r3, #1]
8001e64: 4313 orrs r3, r2
8001e66: b2da uxtb r2, r3
8001e68: 4b64 ldr r3, [pc, #400] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e6a: 789b ldrb r3, [r3, #2]
8001e6c: 4313 orrs r3, r2
8001e6e: b2da uxtb r2, r3
8001e70: 4b62 ldr r3, [pc, #392] @ (8001ffc <HAL_SYSTICK_Callback+0x3f8>)
8001e72: 78db ldrb r3, [r3, #3]
8001e74: 4313 orrs r3, r2
8001e76: b2da uxtb r2, r3
8001e78: 4b61 ldr r3, [pc, #388] @ (8002000 <HAL_SYSTICK_Callback+0x3fc>)
8001e7a: 781b ldrb r3, [r3, #0]
8001e7c: 4013 ands r3, r2
8001e7e: b2da uxtb r2, r3
8001e80: 4b5f ldr r3, [pc, #380] @ (8002000 <HAL_SYSTICK_Callback+0x3fc>)
8001e82: 701a strb r2, [r3, #0]
//**** legge adc ***********************************************************************************
readAdc();
8001e84: f7fe f9a0 bl 80001c8 <readAdc>
if (++c100ms >= 10) { // 10 ms
8001e88: 4b5e ldr r3, [pc, #376] @ (8002004 <HAL_SYSTICK_Callback+0x400>)
8001e8a: 781b ldrb r3, [r3, #0]
8001e8c: 3301 adds r3, #1
8001e8e: b2da uxtb r2, r3
8001e90: 4b5c ldr r3, [pc, #368] @ (8002004 <HAL_SYSTICK_Callback+0x400>)
8001e92: 701a strb r2, [r3, #0]
8001e94: 4b5b ldr r3, [pc, #364] @ (8002004 <HAL_SYSTICK_Callback+0x400>)
8001e96: 781b ldrb r3, [r3, #0]
8001e98: 2b09 cmp r3, #9
8001e9a: f240 80a8 bls.w 8001fee <HAL_SYSTICK_Callback+0x3ea>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8001e9e: 4b59 ldr r3, [pc, #356] @ (8002004 <HAL_SYSTICK_Callback+0x400>)
8001ea0: 2200 movs r2, #0
8001ea2: 701a strb r2, [r3, #0]
for (i = 0; i < 4; i++) {
8001ea4: 2300 movs r3, #0
8001ea6: 71fb strb r3, [r7, #7]
8001ea8: e013 b.n 8001ed2 <HAL_SYSTICK_Callback+0x2ce>
if (rtramp[i])
8001eaa: 79fb ldrb r3, [r7, #7]
8001eac: 4a56 ldr r2, [pc, #344] @ (8002008 <HAL_SYSTICK_Callback+0x404>)
8001eae: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001eb2: b29b uxth r3, r3
8001eb4: 2b00 cmp r3, #0
8001eb6: d009 beq.n 8001ecc <HAL_SYSTICK_Callback+0x2c8>
rtramp[i]--;
8001eb8: 79fb ldrb r3, [r7, #7]
8001eba: 4a53 ldr r2, [pc, #332] @ (8002008 <HAL_SYSTICK_Callback+0x404>)
8001ebc: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
8001ec0: b292 uxth r2, r2
8001ec2: 3a01 subs r2, #1
8001ec4: b291 uxth r1, r2
8001ec6: 4a50 ldr r2, [pc, #320] @ (8002008 <HAL_SYSTICK_Callback+0x404>)
8001ec8: f822 1013 strh.w r1, [r2, r3, lsl #1]
for (i = 0; i < 4; i++) {
8001ecc: 79fb ldrb r3, [r7, #7]
8001ece: 3301 adds r3, #1
8001ed0: 71fb strb r3, [r7, #7]
8001ed2: 79fb ldrb r3, [r7, #7]
8001ed4: 2b03 cmp r3, #3
8001ed6: d9e8 bls.n 8001eaa <HAL_SYSTICK_Callback+0x2a6>
}
if (rtCiclo < 0xffff)rtCiclo++;
8001ed8: 4b4c ldr r3, [pc, #304] @ (800200c <HAL_SYSTICK_Callback+0x408>)
8001eda: 881b ldrh r3, [r3, #0]
8001edc: b29b uxth r3, r3
8001ede: f64f 72ff movw r2, #65535 @ 0xffff
8001ee2: 4293 cmp r3, r2
8001ee4: d006 beq.n 8001ef4 <HAL_SYSTICK_Callback+0x2f0>
8001ee6: 4b49 ldr r3, [pc, #292] @ (800200c <HAL_SYSTICK_Callback+0x408>)
8001ee8: 881b ldrh r3, [r3, #0]
8001eea: b29b uxth r3, r3
8001eec: 3301 adds r3, #1
8001eee: b29a uxth r2, r3
8001ef0: 4b46 ldr r3, [pc, #280] @ (800200c <HAL_SYSTICK_Callback+0x408>)
8001ef2: 801a strh r2, [r3, #0]
if (rtAnem)rtAnem--;
8001ef4: 4b46 ldr r3, [pc, #280] @ (8002010 <HAL_SYSTICK_Callback+0x40c>)
8001ef6: 881b ldrh r3, [r3, #0]
8001ef8: b29b uxth r3, r3
8001efa: 2b00 cmp r3, #0
8001efc: d006 beq.n 8001f0c <HAL_SYSTICK_Callback+0x308>
8001efe: 4b44 ldr r3, [pc, #272] @ (8002010 <HAL_SYSTICK_Callback+0x40c>)
8001f00: 881b ldrh r3, [r3, #0]
8001f02: b29b uxth r3, r3
8001f04: 3b01 subs r3, #1
8001f06: b29a uxth r2, r3
8001f08: 4b41 ldr r3, [pc, #260] @ (8002010 <HAL_SYSTICK_Callback+0x40c>)
8001f0a: 801a strh r2, [r3, #0]
//**** gestione buzzer *****************************************************************************
if (stBuz == bzmoving) {
8001f0c: 4b41 ldr r3, [pc, #260] @ (8002014 <HAL_SYSTICK_Callback+0x410>)
8001f0e: 781b ldrb r3, [r3, #0]
8001f10: b2db uxtb r3, r3
8001f12: 2b01 cmp r3, #1
8001f14: d127 bne.n 8001f66 <HAL_SYSTICK_Callback+0x362>
if (nobuz) {
8001f16: 4b40 ldr r3, [pc, #256] @ (8002018 <HAL_SYSTICK_Callback+0x414>)
8001f18: 781b ldrb r3, [r3, #0]
8001f1a: 2b00 cmp r3, #0
8001f1c: d011 beq.n 8001f42 <HAL_SYSTICK_Callback+0x33e>
if (c1s >= 5)
8001f1e: 4b3f ldr r3, [pc, #252] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001f20: 781b ldrb r3, [r3, #0]
8001f22: 2b04 cmp r3, #4
8001f24: d906 bls.n 8001f34 <HAL_SYSTICK_Callback+0x330>
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f26: 2200 movs r2, #0
8001f28: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f2c: 483c ldr r0, [pc, #240] @ (8002020 <HAL_SYSTICK_Callback+0x41c>)
8001f2e: f004 fb42 bl 80065b6 <HAL_GPIO_WritePin>
8001f32: e04f b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_RESET);
else
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f34: 2201 movs r2, #1
8001f36: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f3a: 4839 ldr r0, [pc, #228] @ (8002020 <HAL_SYSTICK_Callback+0x41c>)
8001f3c: f004 fb3b bl 80065b6 <HAL_GPIO_WritePin>
8001f40: e048 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_SET);
} else {
if (c1s >= 5)
8001f42: 4b36 ldr r3, [pc, #216] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001f44: 781b ldrb r3, [r3, #0]
8001f46: 2b04 cmp r3, #4
8001f48: d906 bls.n 8001f58 <HAL_SYSTICK_Callback+0x354>
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001f4a: 2200 movs r2, #0
8001f4c: f44f 7180 mov.w r1, #256 @ 0x100
8001f50: 4834 ldr r0, [pc, #208] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001f52: f004 fb30 bl 80065b6 <HAL_GPIO_WritePin>
8001f56: e03d b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
else
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001f58: 2201 movs r2, #1
8001f5a: f44f 7180 mov.w r1, #256 @ 0x100
8001f5e: 4831 ldr r0, [pc, #196] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001f60: f004 fb29 bl 80065b6 <HAL_GPIO_WritePin>
8001f64: e036 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
}
} else if (stBuz == bzwarning) {
8001f66: 4b2b ldr r3, [pc, #172] @ (8002014 <HAL_SYSTICK_Callback+0x410>)
8001f68: 781b ldrb r3, [r3, #0]
8001f6a: b2db uxtb r3, r3
8001f6c: 2b02 cmp r3, #2
8001f6e: d12b bne.n 8001fc8 <HAL_SYSTICK_Callback+0x3c4>
if (nobuz) {
8001f70: 4b29 ldr r3, [pc, #164] @ (8002018 <HAL_SYSTICK_Callback+0x414>)
8001f72: 781b ldrb r3, [r3, #0]
8001f74: 2b00 cmp r3, #0
8001f76: d013 beq.n 8001fa0 <HAL_SYSTICK_Callback+0x39c>
if (c1s & 2)
8001f78: 4b28 ldr r3, [pc, #160] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001f7a: 781b ldrb r3, [r3, #0]
8001f7c: f003 0302 and.w r3, r3, #2
8001f80: 2b00 cmp r3, #0
8001f82: d006 beq.n 8001f92 <HAL_SYSTICK_Callback+0x38e>
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f84: 2200 movs r2, #0
8001f86: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f8a: 4825 ldr r0, [pc, #148] @ (8002020 <HAL_SYSTICK_Callback+0x41c>)
8001f8c: f004 fb13 bl 80065b6 <HAL_GPIO_WritePin>
8001f90: e020 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_RESET);
else
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin,
8001f92: 2201 movs r2, #1
8001f94: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f98: 4821 ldr r0, [pc, #132] @ (8002020 <HAL_SYSTICK_Callback+0x41c>)
8001f9a: f004 fb0c bl 80065b6 <HAL_GPIO_WritePin>
8001f9e: e019 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
GPIO_PIN_SET);
} else {
if (c1s & 2)
8001fa0: 4b1e ldr r3, [pc, #120] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fa2: 781b ldrb r3, [r3, #0]
8001fa4: f003 0302 and.w r3, r3, #2
8001fa8: 2b00 cmp r3, #0
8001faa: d006 beq.n 8001fba <HAL_SYSTICK_Callback+0x3b6>
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001fac: 2200 movs r2, #0
8001fae: f44f 7180 mov.w r1, #256 @ 0x100
8001fb2: 481c ldr r0, [pc, #112] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001fb4: f004 faff bl 80065b6 <HAL_GPIO_WritePin>
8001fb8: e00c b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
else
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001fba: 2201 movs r2, #1
8001fbc: f44f 7180 mov.w r1, #256 @ 0x100
8001fc0: 4818 ldr r0, [pc, #96] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001fc2: f004 faf8 bl 80065b6 <HAL_GPIO_WritePin>
8001fc6: e005 b.n 8001fd4 <HAL_SYSTICK_Callback+0x3d0>
}
} else { //bzoff
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001fc8: 2200 movs r2, #0
8001fca: f44f 7180 mov.w r1, #256 @ 0x100
8001fce: 4815 ldr r0, [pc, #84] @ (8002024 <HAL_SYSTICK_Callback+0x420>)
8001fd0: f004 faf1 bl 80065b6 <HAL_GPIO_WritePin>
}
//**************************************************************************************************
if (++c1s >= 10) { // 1 s
8001fd4: 4b11 ldr r3, [pc, #68] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fd6: 781b ldrb r3, [r3, #0]
8001fd8: 3301 adds r3, #1
8001fda: b2da uxtb r2, r3
8001fdc: 4b0f ldr r3, [pc, #60] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fde: 701a strb r2, [r3, #0]
8001fe0: 4b0e ldr r3, [pc, #56] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fe2: 781b ldrb r3, [r3, #0]
8001fe4: 2b09 cmp r3, #9
8001fe6: d902 bls.n 8001fee <HAL_SYSTICK_Callback+0x3ea>
c1s = 0;
8001fe8: 4b0c ldr r3, [pc, #48] @ (800201c <HAL_SYSTICK_Callback+0x418>)
8001fea: 2200 movs r2, #0
8001fec: 701a strb r2, [r3, #0]
//HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
}
}
}
}
8001fee: bf00 nop
8001ff0: 3708 adds r7, #8
8001ff2: 46bd mov sp, r7
8001ff4: bd80 pop {r7, pc}
8001ff6: bf00 nop
8001ff8: 2000045b .word 0x2000045b
8001ffc: 2000045c .word 0x2000045c
8002000: 200003f0 .word 0x200003f0
8002004: 20000460 .word 0x20000460
8002008: 200003f4 .word 0x200003f4
800200c: 200003fc .word 0x200003fc
8002010: 200003fe .word 0x200003fe
8002014: 20000457 .word 0x20000457
8002018: 20000458 .word 0x20000458
800201c: 20000461 .word 0x20000461
8002020: 40011000 .word 0x40011000
8002024: 40010800 .word 0x40010800
08002028 <managePulsanti>:
void managePulsanti(void) {
8002028: b580 push {r7, lr}
800202a: af00 add r7, sp, #0
if (pulsanti & INP1) {
800202c: 4baa ldr r3, [pc, #680] @ (80022d8 <managePulsanti+0x2b0>)
800202e: 781b ldrb r3, [r3, #0]
8002030: f003 0301 and.w r3, r3, #1
8002034: 2b00 cmp r3, #0
8002036: d013 beq.n 8002060 <managePulsanti+0x38>
if (rtP1 == 0)
8002038: 4ba8 ldr r3, [pc, #672] @ (80022dc <managePulsanti+0x2b4>)
800203a: 781b ldrb r3, [r3, #0]
800203c: b2db uxtb r3, r3
800203e: 2b00 cmp r3, #0
8002040: d107 bne.n 8002052 <managePulsanti+0x2a>
stPulsanti |= P1START;
8002042: 4ba7 ldr r3, [pc, #668] @ (80022e0 <managePulsanti+0x2b8>)
8002044: 881b ldrh r3, [r3, #0]
8002046: f043 0301 orr.w r3, r3, #1
800204a: b29a uxth r2, r3
800204c: 4ba4 ldr r3, [pc, #656] @ (80022e0 <managePulsanti+0x2b8>)
800204e: 801a strh r2, [r3, #0]
8002050: e02f b.n 80020b2 <managePulsanti+0x8a>
else {
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET);
8002052: 2201 movs r2, #1
8002054: f44f 5100 mov.w r1, #8192 @ 0x2000
8002058: 48a2 ldr r0, [pc, #648] @ (80022e4 <managePulsanti+0x2bc>)
800205a: f004 faac bl 80065b6 <HAL_GPIO_WritePin>
800205e: e028 b.n 80020b2 <managePulsanti+0x8a>
}
} else {
if (stPulsanti & P1START) {
8002060: 4b9f ldr r3, [pc, #636] @ (80022e0 <managePulsanti+0x2b8>)
8002062: 881b ldrh r3, [r3, #0]
8002064: f003 0301 and.w r3, r3, #1
8002068: 2b00 cmp r3, #0
800206a: d00d beq.n 8002088 <managePulsanti+0x60>
stPulsanti &= (~P1START);
800206c: 4b9c ldr r3, [pc, #624] @ (80022e0 <managePulsanti+0x2b8>)
800206e: 881b ldrh r3, [r3, #0]
8002070: f023 0301 bic.w r3, r3, #1
8002074: b29a uxth r2, r3
8002076: 4b9a ldr r3, [pc, #616] @ (80022e0 <managePulsanti+0x2b8>)
8002078: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
800207a: 2200 movs r2, #0
800207c: f44f 5100 mov.w r1, #8192 @ 0x2000
8002080: 4898 ldr r0, [pc, #608] @ (80022e4 <managePulsanti+0x2bc>)
8002082: f004 fa98 bl 80065b6 <HAL_GPIO_WritePin>
8002086: e011 b.n 80020ac <managePulsanti+0x84>
} else if (rtP1 <= 190) {
8002088: 4b94 ldr r3, [pc, #592] @ (80022dc <managePulsanti+0x2b4>)
800208a: 781b ldrb r3, [r3, #0]
800208c: b2db uxtb r3, r3
800208e: 2bbe cmp r3, #190 @ 0xbe
8002090: d80c bhi.n 80020ac <managePulsanti+0x84>
stPulsanti |= P1STOP;
8002092: 4b93 ldr r3, [pc, #588] @ (80022e0 <managePulsanti+0x2b8>)
8002094: 881b ldrh r3, [r3, #0]
8002096: f043 0302 orr.w r3, r3, #2
800209a: b29a uxth r2, r3
800209c: 4b90 ldr r3, [pc, #576] @ (80022e0 <managePulsanti+0x2b8>)
800209e: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
80020a0: 2200 movs r2, #0
80020a2: f44f 5100 mov.w r1, #8192 @ 0x2000
80020a6: 488f ldr r0, [pc, #572] @ (80022e4 <managePulsanti+0x2bc>)
80020a8: f004 fa85 bl 80065b6 <HAL_GPIO_WritePin>
}
rtP1 = 200;
80020ac: 4b8b ldr r3, [pc, #556] @ (80022dc <managePulsanti+0x2b4>)
80020ae: 22c8 movs r2, #200 @ 0xc8
80020b0: 701a strb r2, [r3, #0]
}
if (pulsanti & INP2) {
80020b2: 4b89 ldr r3, [pc, #548] @ (80022d8 <managePulsanti+0x2b0>)
80020b4: 781b ldrb r3, [r3, #0]
80020b6: f003 0302 and.w r3, r3, #2
80020ba: 2b00 cmp r3, #0
80020bc: d00c beq.n 80020d8 <managePulsanti+0xb0>
if (rtP2 == 0)
80020be: 4b8a ldr r3, [pc, #552] @ (80022e8 <managePulsanti+0x2c0>)
80020c0: 781b ldrb r3, [r3, #0]
80020c2: b2db uxtb r3, r3
80020c4: 2b00 cmp r3, #0
80020c6: d124 bne.n 8002112 <managePulsanti+0xea>
stPulsanti |= P2START;
80020c8: 4b85 ldr r3, [pc, #532] @ (80022e0 <managePulsanti+0x2b8>)
80020ca: 881b ldrh r3, [r3, #0]
80020cc: f043 0304 orr.w r3, r3, #4
80020d0: b29a uxth r2, r3
80020d2: 4b83 ldr r3, [pc, #524] @ (80022e0 <managePulsanti+0x2b8>)
80020d4: 801a strh r2, [r3, #0]
80020d6: e01c b.n 8002112 <managePulsanti+0xea>
} else {
if (stPulsanti & P2START)
80020d8: 4b81 ldr r3, [pc, #516] @ (80022e0 <managePulsanti+0x2b8>)
80020da: 881b ldrh r3, [r3, #0]
80020dc: f003 0304 and.w r3, r3, #4
80020e0: 2b00 cmp r3, #0
80020e2: d007 beq.n 80020f4 <managePulsanti+0xcc>
stPulsanti &= (~P2START);
80020e4: 4b7e ldr r3, [pc, #504] @ (80022e0 <managePulsanti+0x2b8>)
80020e6: 881b ldrh r3, [r3, #0]
80020e8: f023 0304 bic.w r3, r3, #4
80020ec: b29a uxth r2, r3
80020ee: 4b7c ldr r3, [pc, #496] @ (80022e0 <managePulsanti+0x2b8>)
80020f0: 801a strh r2, [r3, #0]
80020f2: e00b b.n 800210c <managePulsanti+0xe4>
else if (rtP2 <= 190)
80020f4: 4b7c ldr r3, [pc, #496] @ (80022e8 <managePulsanti+0x2c0>)
80020f6: 781b ldrb r3, [r3, #0]
80020f8: b2db uxtb r3, r3
80020fa: 2bbe cmp r3, #190 @ 0xbe
80020fc: d806 bhi.n 800210c <managePulsanti+0xe4>
stPulsanti |= P2STOP;
80020fe: 4b78 ldr r3, [pc, #480] @ (80022e0 <managePulsanti+0x2b8>)
8002100: 881b ldrh r3, [r3, #0]
8002102: f043 0308 orr.w r3, r3, #8
8002106: b29a uxth r2, r3
8002108: 4b75 ldr r3, [pc, #468] @ (80022e0 <managePulsanti+0x2b8>)
800210a: 801a strh r2, [r3, #0]
rtP2 = 200;
800210c: 4b76 ldr r3, [pc, #472] @ (80022e8 <managePulsanti+0x2c0>)
800210e: 22c8 movs r2, #200 @ 0xc8
8002110: 701a strb r2, [r3, #0]
}
stPulsanti &= (P1START | P1STOP | P2START | P2STOP);
8002112: 4b73 ldr r3, [pc, #460] @ (80022e0 <managePulsanti+0x2b8>)
8002114: 881b ldrh r3, [r3, #0]
8002116: f003 030f and.w r3, r3, #15
800211a: b29a uxth r2, r3
800211c: 4b70 ldr r3, [pc, #448] @ (80022e0 <managePulsanti+0x2b8>)
800211e: 801a strh r2, [r3, #0]
if (stPulsanti == 0) {
8002120: 4b6f ldr r3, [pc, #444] @ (80022e0 <managePulsanti+0x2b8>)
8002122: 881b ldrh r3, [r3, #0]
8002124: 2b00 cmp r3, #0
8002126: f040 80d4 bne.w 80022d2 <managePulsanti+0x2aa>
switch (pulsanti & 0x3c) {
800212a: 4b6b ldr r3, [pc, #428] @ (80022d8 <managePulsanti+0x2b0>)
800212c: 781b ldrb r3, [r3, #0]
800212e: f003 033c and.w r3, r3, #60 @ 0x3c
8002132: 2b30 cmp r3, #48 @ 0x30
8002134: f200 80bb bhi.w 80022ae <managePulsanti+0x286>
8002138: a201 add r2, pc, #4 @ (adr r2, 8002140 <managePulsanti+0x118>)
800213a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800213e: bf00 nop
8002140: 08002205 .word 0x08002205
8002144: 080022af .word 0x080022af
8002148: 080022af .word 0x080022af
800214c: 080022af .word 0x080022af
8002150: 08002261 .word 0x08002261
8002154: 080022af .word 0x080022af
8002158: 080022af .word 0x080022af
800215c: 080022af .word 0x080022af
8002160: 08002213 .word 0x08002213
8002164: 080022af .word 0x080022af
8002168: 080022af .word 0x080022af
800216c: 080022af .word 0x080022af
8002170: 08002295 .word 0x08002295
8002174: 080022af .word 0x080022af
8002178: 080022af .word 0x080022af
800217c: 080022af .word 0x080022af
8002180: 0800222d .word 0x0800222d
8002184: 080022af .word 0x080022af
8002188: 080022af .word 0x080022af
800218c: 080022af .word 0x080022af
8002190: 080022af .word 0x080022af
8002194: 080022af .word 0x080022af
8002198: 080022af .word 0x080022af
800219c: 080022af .word 0x080022af
80021a0: 080022af .word 0x080022af
80021a4: 080022af .word 0x080022af
80021a8: 080022af .word 0x080022af
80021ac: 080022af .word 0x080022af
80021b0: 080022af .word 0x080022af
80021b4: 080022af .word 0x080022af
80021b8: 080022af .word 0x080022af
80021bc: 080022af .word 0x080022af
80021c0: 08002247 .word 0x08002247
80021c4: 080022af .word 0x080022af
80021c8: 080022af .word 0x080022af
80021cc: 080022af .word 0x080022af
80021d0: 080022af .word 0x080022af
80021d4: 080022af .word 0x080022af
80021d8: 080022af .word 0x080022af
80021dc: 080022af .word 0x080022af
80021e0: 080022af .word 0x080022af
80021e4: 080022af .word 0x080022af
80021e8: 080022af .word 0x080022af
80021ec: 080022af .word 0x080022af
80021f0: 080022af .word 0x080022af
80021f4: 080022af .word 0x080022af
80021f8: 080022af .word 0x080022af
80021fc: 080022af .word 0x080022af
8002200: 0800227b .word 0x0800227b
case 0x00:
rtTLC = 100;
8002204: 4b39 ldr r3, [pc, #228] @ (80022ec <managePulsanti+0x2c4>)
8002206: 2264 movs r2, #100 @ 0x64
8002208: 701a strb r2, [r3, #0]
stPulsanti &= (!(M1FW | M1BW | M3FW | M3BW | M4FW | M4BW));
800220a: 4b35 ldr r3, [pc, #212] @ (80022e0 <managePulsanti+0x2b8>)
800220c: 2200 movs r2, #0
800220e: 801a strh r2, [r3, #0]
break;
8002210: e05f b.n 80022d2 <managePulsanti+0x2aa>
case 0x08: //tlc1
if (rtTLC == 0)
8002212: 4b36 ldr r3, [pc, #216] @ (80022ec <managePulsanti+0x2c4>)
8002214: 781b ldrb r3, [r3, #0]
8002216: b2db uxtb r3, r3
8002218: 2b00 cmp r3, #0
800221a: d14f bne.n 80022bc <managePulsanti+0x294>
stPulsanti |= M1FW;
800221c: 4b30 ldr r3, [pc, #192] @ (80022e0 <managePulsanti+0x2b8>)
800221e: 881b ldrh r3, [r3, #0]
8002220: f043 0310 orr.w r3, r3, #16
8002224: b29a uxth r2, r3
8002226: 4b2e ldr r3, [pc, #184] @ (80022e0 <managePulsanti+0x2b8>)
8002228: 801a strh r2, [r3, #0]
break;
800222a: e047 b.n 80022bc <managePulsanti+0x294>
case 0x10: //tlc2
if (rtTLC == 0)
800222c: 4b2f ldr r3, [pc, #188] @ (80022ec <managePulsanti+0x2c4>)
800222e: 781b ldrb r3, [r3, #0]
8002230: b2db uxtb r3, r3
8002232: 2b00 cmp r3, #0
8002234: d144 bne.n 80022c0 <managePulsanti+0x298>
stPulsanti |= M1BW;
8002236: 4b2a ldr r3, [pc, #168] @ (80022e0 <managePulsanti+0x2b8>)
8002238: 881b ldrh r3, [r3, #0]
800223a: f043 0320 orr.w r3, r3, #32
800223e: b29a uxth r2, r3
8002240: 4b27 ldr r3, [pc, #156] @ (80022e0 <managePulsanti+0x2b8>)
8002242: 801a strh r2, [r3, #0]
break;
8002244: e03c b.n 80022c0 <managePulsanti+0x298>
case 0x20: //tlc3
if (rtTLC == 0)
8002246: 4b29 ldr r3, [pc, #164] @ (80022ec <managePulsanti+0x2c4>)
8002248: 781b ldrb r3, [r3, #0]
800224a: b2db uxtb r3, r3
800224c: 2b00 cmp r3, #0
800224e: d139 bne.n 80022c4 <managePulsanti+0x29c>
stPulsanti |= M3FW;
8002250: 4b23 ldr r3, [pc, #140] @ (80022e0 <managePulsanti+0x2b8>)
8002252: 881b ldrh r3, [r3, #0]
8002254: f443 7380 orr.w r3, r3, #256 @ 0x100
8002258: b29a uxth r2, r3
800225a: 4b21 ldr r3, [pc, #132] @ (80022e0 <managePulsanti+0x2b8>)
800225c: 801a strh r2, [r3, #0]
break;
800225e: e031 b.n 80022c4 <managePulsanti+0x29c>
case 0x04: //tlc4
if (rtTLC == 0)
8002260: 4b22 ldr r3, [pc, #136] @ (80022ec <managePulsanti+0x2c4>)
8002262: 781b ldrb r3, [r3, #0]
8002264: b2db uxtb r3, r3
8002266: 2b00 cmp r3, #0
8002268: d12e bne.n 80022c8 <managePulsanti+0x2a0>
stPulsanti |= M3BW;
800226a: 4b1d ldr r3, [pc, #116] @ (80022e0 <managePulsanti+0x2b8>)
800226c: 881b ldrh r3, [r3, #0]
800226e: f443 7300 orr.w r3, r3, #512 @ 0x200
8002272: b29a uxth r2, r3
8002274: 4b1a ldr r3, [pc, #104] @ (80022e0 <managePulsanti+0x2b8>)
8002276: 801a strh r2, [r3, #0]
break;
8002278: e026 b.n 80022c8 <managePulsanti+0x2a0>
case 0x30: //tlc5
if (rtTLC == 0)
800227a: 4b1c ldr r3, [pc, #112] @ (80022ec <managePulsanti+0x2c4>)
800227c: 781b ldrb r3, [r3, #0]
800227e: b2db uxtb r3, r3
8002280: 2b00 cmp r3, #0
8002282: d123 bne.n 80022cc <managePulsanti+0x2a4>
stPulsanti |= M4FW;
8002284: 4b16 ldr r3, [pc, #88] @ (80022e0 <managePulsanti+0x2b8>)
8002286: 881b ldrh r3, [r3, #0]
8002288: f443 6380 orr.w r3, r3, #1024 @ 0x400
800228c: b29a uxth r2, r3
800228e: 4b14 ldr r3, [pc, #80] @ (80022e0 <managePulsanti+0x2b8>)
8002290: 801a strh r2, [r3, #0]
break;
8002292: e01b b.n 80022cc <managePulsanti+0x2a4>
case 0x0c: //tlc6
if (rtTLC == 0)
8002294: 4b15 ldr r3, [pc, #84] @ (80022ec <managePulsanti+0x2c4>)
8002296: 781b ldrb r3, [r3, #0]
8002298: b2db uxtb r3, r3
800229a: 2b00 cmp r3, #0
800229c: d118 bne.n 80022d0 <managePulsanti+0x2a8>
stPulsanti |= M4BW;
800229e: 4b10 ldr r3, [pc, #64] @ (80022e0 <managePulsanti+0x2b8>)
80022a0: 881b ldrh r3, [r3, #0]
80022a2: f443 6300 orr.w r3, r3, #2048 @ 0x800
80022a6: b29a uxth r2, r3
80022a8: 4b0d ldr r3, [pc, #52] @ (80022e0 <managePulsanti+0x2b8>)
80022aa: 801a strh r2, [r3, #0]
break;
80022ac: e010 b.n 80022d0 <managePulsanti+0x2a8>
default:
rtTLC = 100;
80022ae: 4b0f ldr r3, [pc, #60] @ (80022ec <managePulsanti+0x2c4>)
80022b0: 2264 movs r2, #100 @ 0x64
80022b2: 701a strb r2, [r3, #0]
stPulsanti &= (!(M1FW | M1BW | M3FW | M3BW | M4FW | M4BW));
80022b4: 4b0a ldr r3, [pc, #40] @ (80022e0 <managePulsanti+0x2b8>)
80022b6: 2200 movs r2, #0
80022b8: 801a strh r2, [r3, #0]
break;
80022ba: e00a b.n 80022d2 <managePulsanti+0x2aa>
break;
80022bc: bf00 nop
80022be: e008 b.n 80022d2 <managePulsanti+0x2aa>
break;
80022c0: bf00 nop
80022c2: e006 b.n 80022d2 <managePulsanti+0x2aa>
break;
80022c4: bf00 nop
80022c6: e004 b.n 80022d2 <managePulsanti+0x2aa>
break;
80022c8: bf00 nop
80022ca: e002 b.n 80022d2 <managePulsanti+0x2aa>
break;
80022cc: bf00 nop
80022ce: e000 b.n 80022d2 <managePulsanti+0x2aa>
break;
80022d0: bf00 nop
}
}
}
80022d2: bf00 nop
80022d4: bd80 pop {r7, pc}
80022d6: bf00 nop
80022d8: 200003f0 .word 0x200003f0
80022dc: 20000004 .word 0x20000004
80022e0: 20000454 .word 0x20000454
80022e4: 40011000 .word 0x40011000
80022e8: 20000005 .word 0x20000005
80022ec: 20000006 .word 0x20000006
080022f0 <manageCiclo>:
void manageCiclo(void) {
80022f0: b580 push {r7, lr}
80022f2: b084 sub sp, #16
80022f4: af02 add r7, sp, #8
motMov_st m1, m2, m3, m4;
switch (stCiclo) {
80022f6: 4ba8 ldr r3, [pc, #672] @ (8002598 <manageCiclo+0x2a8>)
80022f8: 781b ldrb r3, [r3, #0]
80022fa: 2b18 cmp r3, #24
80022fc: f200 8623 bhi.w 8002f46 <manageCiclo+0xc56>
8002300: a201 add r2, pc, #4 @ (adr r2, 8002308 <manageCiclo+0x18>)
8002302: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002306: bf00 nop
8002308: 0800236d .word 0x0800236d
800230c: 08002425 .word 0x08002425
8002310: 0800246f .word 0x0800246f
8002314: 080024b9 .word 0x080024b9
8002318: 08002503 .word 0x08002503
800231c: 0800254d .word 0x0800254d
8002320: 080025dd .word 0x080025dd
8002324: 08002627 .word 0x08002627
8002328: 08002671 .word 0x08002671
800232c: 080026bb .word 0x080026bb
8002330: 08002705 .word 0x08002705
8002334: 0800274d .word 0x0800274d
8002338: 08002795 .word 0x08002795
800233c: 080027dd .word 0x080027dd
8002340: 08002851 .word 0x08002851
8002344: 08002899 .word 0x08002899
8002348: 080028e1 .word 0x080028e1
800234c: 08002929 .word 0x08002929
8002350: 08002991 .word 0x08002991
8002354: 080029fb .word 0x080029fb
8002358: 08002a71 .word 0x08002a71
800235c: 08002e13 .word 0x08002e13
8002360: 08002af9 .word 0x08002af9
8002364: 08002da9 .word 0x08002da9
8002368: 08002e75 .word 0x08002e75
case omchiuso:
if (stPulsanti & P1START) {
800236c: 4b8b ldr r3, [pc, #556] @ (800259c <manageCiclo+0x2ac>)
800236e: 881b ldrh r3, [r3, #0]
8002370: f003 0301 and.w r3, r3, #1
8002374: 2b00 cmp r3, #0
8002376: d014 beq.n 80023a2 <manageCiclo+0xb2>
stBuz = bzwarning;
8002378: 4b89 ldr r3, [pc, #548] @ (80025a0 <manageCiclo+0x2b0>)
800237a: 2202 movs r2, #2
800237c: 701a strb r2, [r3, #0]
rtCiclo = 0;
800237e: 4b89 ldr r3, [pc, #548] @ (80025a4 <manageCiclo+0x2b4>)
8002380: 2200 movs r2, #0
8002382: 801a strh r2, [r3, #0]
stCiclo = omapertura0;
8002384: 4b84 ldr r3, [pc, #528] @ (8002598 <manageCiclo+0x2a8>)
8002386: 2212 movs r2, #18
8002388: 701a strb r2, [r3, #0]
fchiuso = false;
800238a: 4b87 ldr r3, [pc, #540] @ (80025a8 <manageCiclo+0x2b8>)
800238c: 2200 movs r2, #0
800238e: 701a strb r2, [r3, #0]
(void) m1ap();
8002390: f001 f964 bl 800365c <m1ap>
(void) m2ap();
8002394: f001 fa34 bl 8003800 <m2ap>
(void) m3ap();
8002398: f001 fb04 bl 80039a4 <m3ap>
(void) m4ap();
800239c: f001 fbd6 bl 8003b4c <m4ap>
80023a0: e00b b.n 80023ba <manageCiclo+0xca>
} else if (stPulsanti & P1STOP) {
80023a2: 4b7e ldr r3, [pc, #504] @ (800259c <manageCiclo+0x2ac>)
80023a4: 881b ldrh r3, [r3, #0]
80023a6: f003 0302 and.w r3, r3, #2
80023aa: 2b00 cmp r3, #0
80023ac: d005 beq.n 80023ba <manageCiclo+0xca>
fchiuso = false;
80023ae: 4b7e ldr r3, [pc, #504] @ (80025a8 <manageCiclo+0x2b8>)
80023b0: 2200 movs r2, #0
80023b2: 701a strb r2, [r3, #0]
stCiclo = omstopapertura;
80023b4: 4b78 ldr r3, [pc, #480] @ (8002598 <manageCiclo+0x2a8>)
80023b6: 2213 movs r2, #19
80023b8: 701a strb r2, [r3, #0]
}
if ((ch8 > thanem) && (fchiuso == false)) {
80023ba: 4b7c ldr r3, [pc, #496] @ (80025ac <manageCiclo+0x2bc>)
80023bc: 881a ldrh r2, [r3, #0]
80023be: 4b7c ldr r3, [pc, #496] @ (80025b0 <manageCiclo+0x2c0>)
80023c0: 881b ldrh r3, [r3, #0]
80023c2: 429a cmp r2, r3
80023c4: d920 bls.n 8002408 <manageCiclo+0x118>
80023c6: 4b78 ldr r3, [pc, #480] @ (80025a8 <manageCiclo+0x2b8>)
80023c8: 781b ldrb r3, [r3, #0]
80023ca: f083 0301 eor.w r3, r3, #1
80023ce: b2db uxtb r3, r3
80023d0: 2b00 cmp r3, #0
80023d2: d019 beq.n 8002408 <manageCiclo+0x118>
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET);
80023d4: 2201 movs r2, #1
80023d6: f44f 4100 mov.w r1, #32768 @ 0x8000
80023da: 4876 ldr r0, [pc, #472] @ (80025b4 <manageCiclo+0x2c4>)
80023dc: f004 f8eb bl 80065b6 <HAL_GPIO_WritePin>
if (rtAnem == 0) {
80023e0: 4b75 ldr r3, [pc, #468] @ (80025b8 <manageCiclo+0x2c8>)
80023e2: 881b ldrh r3, [r3, #0]
80023e4: b29b uxth r3, r3
80023e6: 2b00 cmp r3, #0
80023e8: d11a bne.n 8002420 <manageCiclo+0x130>
stBuz = bzmoving;
80023ea: 4b6d ldr r3, [pc, #436] @ (80025a0 <manageCiclo+0x2b0>)
80023ec: 2201 movs r2, #1
80023ee: 701a strb r2, [r3, #0]
stCiclo = omchiusura1;
80023f0: 4b69 ldr r3, [pc, #420] @ (8002598 <manageCiclo+0x2a8>)
80023f2: 2217 movs r2, #23
80023f4: 701a strb r2, [r3, #0]
(void) m1ch();
80023f6: f001 fc7d bl 8003cf4 <m1ch>
(void) m2ch();
80023fa: f001 fd4d bl 8003e98 <m2ch>
(void) m3ch();
80023fe: f001 fe1d bl 800403c <m3ch>
(void) m4ch();
8002402: f001 feef bl 80041e4 <m4ch>
if (rtAnem == 0) {
8002406: e00b b.n 8002420 <manageCiclo+0x130>
}
} else{
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET);
8002408: 2200 movs r2, #0
800240a: f44f 4100 mov.w r1, #32768 @ 0x8000
800240e: 4869 ldr r0, [pc, #420] @ (80025b4 <manageCiclo+0x2c4>)
8002410: f004 f8d1 bl 80065b6 <HAL_GPIO_WritePin>
rtAnem = tanem;
8002414: 4b69 ldr r3, [pc, #420] @ (80025bc <manageCiclo+0x2cc>)
8002416: 881a ldrh r2, [r3, #0]
8002418: 4b67 ldr r3, [pc, #412] @ (80025b8 <manageCiclo+0x2c8>)
800241a: 801a strh r2, [r3, #0]
}
break;
800241c: f000 bd93 b.w 8002f46 <manageCiclo+0xc56>
8002420: f000 bd91 b.w 8002f46 <manageCiclo+0xc56>
case omM1fw1:
(void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
8002424: 4b66 ldr r3, [pc, #408] @ (80025c0 <manageCiclo+0x2d0>)
8002426: 881b ldrh r3, [r3, #0]
8002428: b2da uxtb r2, r3
800242a: 4b66 ldr r3, [pc, #408] @ (80025c4 <manageCiclo+0x2d4>)
800242c: 881b ldrh r3, [r3, #0]
800242e: b2d9 uxtb r1, r3
8002430: 4b65 ldr r3, [pc, #404] @ (80025c8 <manageCiclo+0x2d8>)
8002432: 881b ldrh r3, [r3, #0]
8002434: b2db uxtb r3, r3
8002436: 200a movs r0, #10
8002438: 9001 str r0, [sp, #4]
800243a: 9300 str r3, [sp, #0]
800243c: 460b mov r3, r1
800243e: 2100 movs r1, #0
8002440: 2001 movs r0, #1
8002442: f002 fb09 bl 8004a58 <ramp>
if (rtCiclo >= m1TimeoutMan)
8002446: 4b57 ldr r3, [pc, #348] @ (80025a4 <manageCiclo+0x2b4>)
8002448: 881b ldrh r3, [r3, #0]
800244a: b29a uxth r2, r3
800244c: 4b5f ldr r3, [pc, #380] @ (80025cc <manageCiclo+0x2dc>)
800244e: 881b ldrh r3, [r3, #0]
8002450: 429a cmp r2, r3
8002452: d302 bcc.n 800245a <manageCiclo+0x16a>
stCiclo = omStopMan;
8002454: 4b50 ldr r3, [pc, #320] @ (8002598 <manageCiclo+0x2a8>)
8002456: 2211 movs r2, #17
8002458: 701a strb r2, [r3, #0]
if (pulsanti == 0)
800245a: 4b5d ldr r3, [pc, #372] @ (80025d0 <manageCiclo+0x2e0>)
800245c: 781b ldrb r3, [r3, #0]
800245e: 2b00 cmp r3, #0
8002460: f040 8542 bne.w 8002ee8 <manageCiclo+0xbf8>
stCiclo = omM1fw2;
8002464: 4b4c ldr r3, [pc, #304] @ (8002598 <manageCiclo+0x2a8>)
8002466: 2202 movs r2, #2
8002468: 701a strb r2, [r3, #0]
break;
800246a: f000 bd3d b.w 8002ee8 <manageCiclo+0xbf8>
case omM1fw2:
(void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
800246e: 4b54 ldr r3, [pc, #336] @ (80025c0 <manageCiclo+0x2d0>)
8002470: 881b ldrh r3, [r3, #0]
8002472: b2da uxtb r2, r3
8002474: 4b53 ldr r3, [pc, #332] @ (80025c4 <manageCiclo+0x2d4>)
8002476: 881b ldrh r3, [r3, #0]
8002478: b2d9 uxtb r1, r3
800247a: 4b53 ldr r3, [pc, #332] @ (80025c8 <manageCiclo+0x2d8>)
800247c: 881b ldrh r3, [r3, #0]
800247e: b2db uxtb r3, r3
8002480: 200a movs r0, #10
8002482: 9001 str r0, [sp, #4]
8002484: 9300 str r3, [sp, #0]
8002486: 460b mov r3, r1
8002488: 2100 movs r1, #0
800248a: 2001 movs r0, #1
800248c: f002 fae4 bl 8004a58 <ramp>
if (rtCiclo >= m1TimeoutMan)
8002490: 4b44 ldr r3, [pc, #272] @ (80025a4 <manageCiclo+0x2b4>)
8002492: 881b ldrh r3, [r3, #0]
8002494: b29a uxth r2, r3
8002496: 4b4d ldr r3, [pc, #308] @ (80025cc <manageCiclo+0x2dc>)
8002498: 881b ldrh r3, [r3, #0]
800249a: 429a cmp r2, r3
800249c: d302 bcc.n 80024a4 <manageCiclo+0x1b4>
stCiclo = omStopMan;
800249e: 4b3e ldr r3, [pc, #248] @ (8002598 <manageCiclo+0x2a8>)
80024a0: 2211 movs r2, #17
80024a2: 701a strb r2, [r3, #0]
if (pulsanti)
80024a4: 4b4a ldr r3, [pc, #296] @ (80025d0 <manageCiclo+0x2e0>)
80024a6: 781b ldrb r3, [r3, #0]
80024a8: 2b00 cmp r3, #0
80024aa: f000 851f beq.w 8002eec <manageCiclo+0xbfc>
stCiclo = omStopMan;
80024ae: 4b3a ldr r3, [pc, #232] @ (8002598 <manageCiclo+0x2a8>)
80024b0: 2211 movs r2, #17
80024b2: 701a strb r2, [r3, #0]
break;
80024b4: f000 bd1a b.w 8002eec <manageCiclo+0xbfc>
case omM1bw1:
(void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
80024b8: 4b41 ldr r3, [pc, #260] @ (80025c0 <manageCiclo+0x2d0>)
80024ba: 881b ldrh r3, [r3, #0]
80024bc: b2da uxtb r2, r3
80024be: 4b41 ldr r3, [pc, #260] @ (80025c4 <manageCiclo+0x2d4>)
80024c0: 881b ldrh r3, [r3, #0]
80024c2: b2d9 uxtb r1, r3
80024c4: 4b40 ldr r3, [pc, #256] @ (80025c8 <manageCiclo+0x2d8>)
80024c6: 881b ldrh r3, [r3, #0]
80024c8: b2db uxtb r3, r3
80024ca: 200a movs r0, #10
80024cc: 9001 str r0, [sp, #4]
80024ce: 9300 str r3, [sp, #0]
80024d0: 460b mov r3, r1
80024d2: 2101 movs r1, #1
80024d4: 2001 movs r0, #1
80024d6: f002 fabf bl 8004a58 <ramp>
if (rtCiclo >= m1TimeoutMan)
80024da: 4b32 ldr r3, [pc, #200] @ (80025a4 <manageCiclo+0x2b4>)
80024dc: 881b ldrh r3, [r3, #0]
80024de: b29a uxth r2, r3
80024e0: 4b3a ldr r3, [pc, #232] @ (80025cc <manageCiclo+0x2dc>)
80024e2: 881b ldrh r3, [r3, #0]
80024e4: 429a cmp r2, r3
80024e6: d302 bcc.n 80024ee <manageCiclo+0x1fe>
stCiclo = omStopMan;
80024e8: 4b2b ldr r3, [pc, #172] @ (8002598 <manageCiclo+0x2a8>)
80024ea: 2211 movs r2, #17
80024ec: 701a strb r2, [r3, #0]
if (pulsanti == 0)
80024ee: 4b38 ldr r3, [pc, #224] @ (80025d0 <manageCiclo+0x2e0>)
80024f0: 781b ldrb r3, [r3, #0]
80024f2: 2b00 cmp r3, #0
80024f4: f040 84fc bne.w 8002ef0 <manageCiclo+0xc00>
stCiclo = omM1bw2;
80024f8: 4b27 ldr r3, [pc, #156] @ (8002598 <manageCiclo+0x2a8>)
80024fa: 2204 movs r2, #4
80024fc: 701a strb r2, [r3, #0]
break;
80024fe: f000 bcf7 b.w 8002ef0 <manageCiclo+0xc00>
case omM1bw2:
(void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman, RAMPRUN);
8002502: 4b2f ldr r3, [pc, #188] @ (80025c0 <manageCiclo+0x2d0>)
8002504: 881b ldrh r3, [r3, #0]
8002506: b2da uxtb r2, r3
8002508: 4b2e ldr r3, [pc, #184] @ (80025c4 <manageCiclo+0x2d4>)
800250a: 881b ldrh r3, [r3, #0]
800250c: b2d9 uxtb r1, r3
800250e: 4b2e ldr r3, [pc, #184] @ (80025c8 <manageCiclo+0x2d8>)
8002510: 881b ldrh r3, [r3, #0]
8002512: b2db uxtb r3, r3
8002514: 200a movs r0, #10
8002516: 9001 str r0, [sp, #4]
8002518: 9300 str r3, [sp, #0]
800251a: 460b mov r3, r1
800251c: 2101 movs r1, #1
800251e: 2001 movs r0, #1
8002520: f002 fa9a bl 8004a58 <ramp>
if (rtCiclo >= m1TimeoutMan)
8002524: 4b1f ldr r3, [pc, #124] @ (80025a4 <manageCiclo+0x2b4>)
8002526: 881b ldrh r3, [r3, #0]
8002528: b29a uxth r2, r3
800252a: 4b28 ldr r3, [pc, #160] @ (80025cc <manageCiclo+0x2dc>)
800252c: 881b ldrh r3, [r3, #0]
800252e: 429a cmp r2, r3
8002530: d302 bcc.n 8002538 <manageCiclo+0x248>
stCiclo = omStopMan;
8002532: 4b19 ldr r3, [pc, #100] @ (8002598 <manageCiclo+0x2a8>)
8002534: 2211 movs r2, #17
8002536: 701a strb r2, [r3, #0]
if (pulsanti)
8002538: 4b25 ldr r3, [pc, #148] @ (80025d0 <manageCiclo+0x2e0>)
800253a: 781b ldrb r3, [r3, #0]
800253c: 2b00 cmp r3, #0
800253e: f000 84d9 beq.w 8002ef4 <manageCiclo+0xc04>
stCiclo = omStopMan;
8002542: 4b15 ldr r3, [pc, #84] @ (8002598 <manageCiclo+0x2a8>)
8002544: 2211 movs r2, #17
8002546: 701a strb r2, [r3, #0]
break;
8002548: f000 bcd4 b.w 8002ef4 <manageCiclo+0xc04>
case omM2fw1:
(void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
800254c: 4b1c ldr r3, [pc, #112] @ (80025c0 <manageCiclo+0x2d0>)
800254e: 885b ldrh r3, [r3, #2]
8002550: b2da uxtb r2, r3
8002552: 4b20 ldr r3, [pc, #128] @ (80025d4 <manageCiclo+0x2e4>)
8002554: 881b ldrh r3, [r3, #0]
8002556: b2d9 uxtb r1, r3
8002558: 4b1b ldr r3, [pc, #108] @ (80025c8 <manageCiclo+0x2d8>)
800255a: 881b ldrh r3, [r3, #0]
800255c: b2db uxtb r3, r3
800255e: 200a movs r0, #10
8002560: 9001 str r0, [sp, #4]
8002562: 9300 str r3, [sp, #0]
8002564: 460b mov r3, r1
8002566: 2100 movs r1, #0
8002568: 2002 movs r0, #2
800256a: f002 fa75 bl 8004a58 <ramp>
if (rtCiclo >= m2TimeoutMan)
800256e: 4b0d ldr r3, [pc, #52] @ (80025a4 <manageCiclo+0x2b4>)
8002570: 881b ldrh r3, [r3, #0]
8002572: b29a uxth r2, r3
8002574: 4b18 ldr r3, [pc, #96] @ (80025d8 <manageCiclo+0x2e8>)
8002576: 881b ldrh r3, [r3, #0]
8002578: 429a cmp r2, r3
800257a: d302 bcc.n 8002582 <manageCiclo+0x292>
stCiclo = omStopMan;
800257c: 4b06 ldr r3, [pc, #24] @ (8002598 <manageCiclo+0x2a8>)
800257e: 2211 movs r2, #17
8002580: 701a strb r2, [r3, #0]
if (pulsanti == 0)
8002582: 4b13 ldr r3, [pc, #76] @ (80025d0 <manageCiclo+0x2e0>)
8002584: 781b ldrb r3, [r3, #0]
8002586: 2b00 cmp r3, #0
8002588: f040 84b6 bne.w 8002ef8 <manageCiclo+0xc08>
stCiclo = omM2fw2;
800258c: 4b02 ldr r3, [pc, #8] @ (8002598 <manageCiclo+0x2a8>)
800258e: 2206 movs r2, #6
8002590: 701a strb r2, [r3, #0]
break;
8002592: f000 bcb1 b.w 8002ef8 <manageCiclo+0xc08>
8002596: bf00 nop
8002598: 20000456 .word 0x20000456
800259c: 20000454 .word 0x20000454
80025a0: 20000457 .word 0x20000457
80025a4: 200003fc .word 0x200003fc
80025a8: 20000459 .word 0x20000459
80025ac: 20000232 .word 0x20000232
80025b0: 2000041c .word 0x2000041c
80025b4: 40010800 .word 0x40010800
80025b8: 200003fe .word 0x200003fe
80025bc: 2000041a .word 0x2000041a
80025c0: 2000044c .word 0x2000044c
80025c4: 20000420 .word 0x20000420
80025c8: 2000041e .word 0x2000041e
80025cc: 20000410 .word 0x20000410
80025d0: 200003f0 .word 0x200003f0
80025d4: 20000422 .word 0x20000422
80025d8: 20000412 .word 0x20000412
case omM2fw2:
(void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
80025dc: 4b91 ldr r3, [pc, #580] @ (8002824 <manageCiclo+0x534>)
80025de: 885b ldrh r3, [r3, #2]
80025e0: b2da uxtb r2, r3
80025e2: 4b91 ldr r3, [pc, #580] @ (8002828 <manageCiclo+0x538>)
80025e4: 881b ldrh r3, [r3, #0]
80025e6: b2d9 uxtb r1, r3
80025e8: 4b90 ldr r3, [pc, #576] @ (800282c <manageCiclo+0x53c>)
80025ea: 881b ldrh r3, [r3, #0]
80025ec: b2db uxtb r3, r3
80025ee: 200a movs r0, #10
80025f0: 9001 str r0, [sp, #4]
80025f2: 9300 str r3, [sp, #0]
80025f4: 460b mov r3, r1
80025f6: 2100 movs r1, #0
80025f8: 2002 movs r0, #2
80025fa: f002 fa2d bl 8004a58 <ramp>
if (rtCiclo >= m2TimeoutMan)
80025fe: 4b8c ldr r3, [pc, #560] @ (8002830 <manageCiclo+0x540>)
8002600: 881b ldrh r3, [r3, #0]
8002602: b29a uxth r2, r3
8002604: 4b8b ldr r3, [pc, #556] @ (8002834 <manageCiclo+0x544>)
8002606: 881b ldrh r3, [r3, #0]
8002608: 429a cmp r2, r3
800260a: d302 bcc.n 8002612 <manageCiclo+0x322>
stCiclo = omStopMan;
800260c: 4b8a ldr r3, [pc, #552] @ (8002838 <manageCiclo+0x548>)
800260e: 2211 movs r2, #17
8002610: 701a strb r2, [r3, #0]
if (pulsanti)
8002612: 4b8a ldr r3, [pc, #552] @ (800283c <manageCiclo+0x54c>)
8002614: 781b ldrb r3, [r3, #0]
8002616: 2b00 cmp r3, #0
8002618: f000 8470 beq.w 8002efc <manageCiclo+0xc0c>
stCiclo = omStopMan;
800261c: 4b86 ldr r3, [pc, #536] @ (8002838 <manageCiclo+0x548>)
800261e: 2211 movs r2, #17
8002620: 701a strb r2, [r3, #0]
break;
8002622: f000 bc6b b.w 8002efc <manageCiclo+0xc0c>
case omM2bw1:
(void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
8002626: 4b7f ldr r3, [pc, #508] @ (8002824 <manageCiclo+0x534>)
8002628: 885b ldrh r3, [r3, #2]
800262a: b2da uxtb r2, r3
800262c: 4b7e ldr r3, [pc, #504] @ (8002828 <manageCiclo+0x538>)
800262e: 881b ldrh r3, [r3, #0]
8002630: b2d9 uxtb r1, r3
8002632: 4b7e ldr r3, [pc, #504] @ (800282c <manageCiclo+0x53c>)
8002634: 881b ldrh r3, [r3, #0]
8002636: b2db uxtb r3, r3
8002638: 200a movs r0, #10
800263a: 9001 str r0, [sp, #4]
800263c: 9300 str r3, [sp, #0]
800263e: 460b mov r3, r1
8002640: 2101 movs r1, #1
8002642: 2002 movs r0, #2
8002644: f002 fa08 bl 8004a58 <ramp>
if (rtCiclo >= m2TimeoutMan)
8002648: 4b79 ldr r3, [pc, #484] @ (8002830 <manageCiclo+0x540>)
800264a: 881b ldrh r3, [r3, #0]
800264c: b29a uxth r2, r3
800264e: 4b79 ldr r3, [pc, #484] @ (8002834 <manageCiclo+0x544>)
8002650: 881b ldrh r3, [r3, #0]
8002652: 429a cmp r2, r3
8002654: d302 bcc.n 800265c <manageCiclo+0x36c>
stCiclo = omStopMan;
8002656: 4b78 ldr r3, [pc, #480] @ (8002838 <manageCiclo+0x548>)
8002658: 2211 movs r2, #17
800265a: 701a strb r2, [r3, #0]
if (pulsanti == 0)
800265c: 4b77 ldr r3, [pc, #476] @ (800283c <manageCiclo+0x54c>)
800265e: 781b ldrb r3, [r3, #0]
8002660: 2b00 cmp r3, #0
8002662: f040 844d bne.w 8002f00 <manageCiclo+0xc10>
stCiclo = omM2bw2;
8002666: 4b74 ldr r3, [pc, #464] @ (8002838 <manageCiclo+0x548>)
8002668: 2208 movs r2, #8
800266a: 701a strb r2, [r3, #0]
break;
800266c: f000 bc48 b.w 8002f00 <manageCiclo+0xc10>
case omM2bw2:
(void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman, RAMPRUN);
8002670: 4b6c ldr r3, [pc, #432] @ (8002824 <manageCiclo+0x534>)
8002672: 885b ldrh r3, [r3, #2]
8002674: b2da uxtb r2, r3
8002676: 4b6c ldr r3, [pc, #432] @ (8002828 <manageCiclo+0x538>)
8002678: 881b ldrh r3, [r3, #0]
800267a: b2d9 uxtb r1, r3
800267c: 4b6b ldr r3, [pc, #428] @ (800282c <manageCiclo+0x53c>)
800267e: 881b ldrh r3, [r3, #0]
8002680: b2db uxtb r3, r3
8002682: 200a movs r0, #10
8002684: 9001 str r0, [sp, #4]
8002686: 9300 str r3, [sp, #0]
8002688: 460b mov r3, r1
800268a: 2101 movs r1, #1
800268c: 2002 movs r0, #2
800268e: f002 f9e3 bl 8004a58 <ramp>
if (rtCiclo >= m2TimeoutMan)
8002692: 4b67 ldr r3, [pc, #412] @ (8002830 <manageCiclo+0x540>)
8002694: 881b ldrh r3, [r3, #0]
8002696: b29a uxth r2, r3
8002698: 4b66 ldr r3, [pc, #408] @ (8002834 <manageCiclo+0x544>)
800269a: 881b ldrh r3, [r3, #0]
800269c: 429a cmp r2, r3
800269e: d302 bcc.n 80026a6 <manageCiclo+0x3b6>
stCiclo = omStopMan;
80026a0: 4b65 ldr r3, [pc, #404] @ (8002838 <manageCiclo+0x548>)
80026a2: 2211 movs r2, #17
80026a4: 701a strb r2, [r3, #0]
if (pulsanti)
80026a6: 4b65 ldr r3, [pc, #404] @ (800283c <manageCiclo+0x54c>)
80026a8: 781b ldrb r3, [r3, #0]
80026aa: 2b00 cmp r3, #0
80026ac: f000 842a beq.w 8002f04 <manageCiclo+0xc14>
stCiclo = omStopMan;
80026b0: 4b61 ldr r3, [pc, #388] @ (8002838 <manageCiclo+0x548>)
80026b2: 2211 movs r2, #17
80026b4: 701a strb r2, [r3, #0]
break;
80026b6: f000 bc25 b.w 8002f04 <manageCiclo+0xc14>
case omM3fw1:
(void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
80026ba: 4b5a ldr r3, [pc, #360] @ (8002824 <manageCiclo+0x534>)
80026bc: 889b ldrh r3, [r3, #4]
80026be: b2da uxtb r2, r3
80026c0: 4b5f ldr r3, [pc, #380] @ (8002840 <manageCiclo+0x550>)
80026c2: 881b ldrh r3, [r3, #0]
80026c4: b2d9 uxtb r1, r3
80026c6: 4b59 ldr r3, [pc, #356] @ (800282c <manageCiclo+0x53c>)
80026c8: 881b ldrh r3, [r3, #0]
80026ca: b2db uxtb r3, r3
80026cc: 200a movs r0, #10
80026ce: 9001 str r0, [sp, #4]
80026d0: 9300 str r3, [sp, #0]
80026d2: 460b mov r3, r1
80026d4: 2100 movs r1, #0
80026d6: 2003 movs r0, #3
80026d8: f002 f9be bl 8004a58 <ramp>
if (rtCiclo >= m3TimeoutMan)
80026dc: 4b54 ldr r3, [pc, #336] @ (8002830 <manageCiclo+0x540>)
80026de: 881b ldrh r3, [r3, #0]
80026e0: b29a uxth r2, r3
80026e2: 4b58 ldr r3, [pc, #352] @ (8002844 <manageCiclo+0x554>)
80026e4: 881b ldrh r3, [r3, #0]
80026e6: 429a cmp r2, r3
80026e8: d302 bcc.n 80026f0 <manageCiclo+0x400>
stCiclo = omStopMan;
80026ea: 4b53 ldr r3, [pc, #332] @ (8002838 <manageCiclo+0x548>)
80026ec: 2211 movs r2, #17
80026ee: 701a strb r2, [r3, #0]
if (pulsanti == 0)
80026f0: 4b52 ldr r3, [pc, #328] @ (800283c <manageCiclo+0x54c>)
80026f2: 781b ldrb r3, [r3, #0]
80026f4: 2b00 cmp r3, #0
80026f6: f040 8407 bne.w 8002f08 <manageCiclo+0xc18>
stCiclo = omM3fw2;
80026fa: 4b4f ldr r3, [pc, #316] @ (8002838 <manageCiclo+0x548>)
80026fc: 220a movs r2, #10
80026fe: 701a strb r2, [r3, #0]
break;
8002700: f000 bc02 b.w 8002f08 <manageCiclo+0xc18>
case omM3fw2:
(void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
8002704: 4b47 ldr r3, [pc, #284] @ (8002824 <manageCiclo+0x534>)
8002706: 889b ldrh r3, [r3, #4]
8002708: b2da uxtb r2, r3
800270a: 4b4d ldr r3, [pc, #308] @ (8002840 <manageCiclo+0x550>)
800270c: 881b ldrh r3, [r3, #0]
800270e: b2d9 uxtb r1, r3
8002710: 4b46 ldr r3, [pc, #280] @ (800282c <manageCiclo+0x53c>)
8002712: 881b ldrh r3, [r3, #0]
8002714: b2db uxtb r3, r3
8002716: 200a movs r0, #10
8002718: 9001 str r0, [sp, #4]
800271a: 9300 str r3, [sp, #0]
800271c: 460b mov r3, r1
800271e: 2100 movs r1, #0
8002720: 2003 movs r0, #3
8002722: f002 f999 bl 8004a58 <ramp>
if (rtCiclo >= m3TimeoutMan)
8002726: 4b42 ldr r3, [pc, #264] @ (8002830 <manageCiclo+0x540>)
8002728: 881b ldrh r3, [r3, #0]
800272a: b29a uxth r2, r3
800272c: 4b45 ldr r3, [pc, #276] @ (8002844 <manageCiclo+0x554>)
800272e: 881b ldrh r3, [r3, #0]
8002730: 429a cmp r2, r3
8002732: d302 bcc.n 800273a <manageCiclo+0x44a>
stCiclo = omStopMan;
8002734: 4b40 ldr r3, [pc, #256] @ (8002838 <manageCiclo+0x548>)
8002736: 2211 movs r2, #17
8002738: 701a strb r2, [r3, #0]
if (pulsanti)
800273a: 4b40 ldr r3, [pc, #256] @ (800283c <manageCiclo+0x54c>)
800273c: 781b ldrb r3, [r3, #0]
800273e: 2b00 cmp r3, #0
8002740: f000 83e4 beq.w 8002f0c <manageCiclo+0xc1c>
stCiclo = omStopMan;
8002744: 4b3c ldr r3, [pc, #240] @ (8002838 <manageCiclo+0x548>)
8002746: 2211 movs r2, #17
8002748: 701a strb r2, [r3, #0]
break;
800274a: e3df b.n 8002f0c <manageCiclo+0xc1c>
case omM3bw1:
(void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
800274c: 4b35 ldr r3, [pc, #212] @ (8002824 <manageCiclo+0x534>)
800274e: 889b ldrh r3, [r3, #4]
8002750: b2da uxtb r2, r3
8002752: 4b3b ldr r3, [pc, #236] @ (8002840 <manageCiclo+0x550>)
8002754: 881b ldrh r3, [r3, #0]
8002756: b2d9 uxtb r1, r3
8002758: 4b34 ldr r3, [pc, #208] @ (800282c <manageCiclo+0x53c>)
800275a: 881b ldrh r3, [r3, #0]
800275c: b2db uxtb r3, r3
800275e: 200a movs r0, #10
8002760: 9001 str r0, [sp, #4]
8002762: 9300 str r3, [sp, #0]
8002764: 460b mov r3, r1
8002766: 2101 movs r1, #1
8002768: 2003 movs r0, #3
800276a: f002 f975 bl 8004a58 <ramp>
if (rtCiclo >= m3TimeoutMan)
800276e: 4b30 ldr r3, [pc, #192] @ (8002830 <manageCiclo+0x540>)
8002770: 881b ldrh r3, [r3, #0]
8002772: b29a uxth r2, r3
8002774: 4b33 ldr r3, [pc, #204] @ (8002844 <manageCiclo+0x554>)
8002776: 881b ldrh r3, [r3, #0]
8002778: 429a cmp r2, r3
800277a: d302 bcc.n 8002782 <manageCiclo+0x492>
stCiclo = omStopMan;
800277c: 4b2e ldr r3, [pc, #184] @ (8002838 <manageCiclo+0x548>)
800277e: 2211 movs r2, #17
8002780: 701a strb r2, [r3, #0]
if (pulsanti == 0)
8002782: 4b2e ldr r3, [pc, #184] @ (800283c <manageCiclo+0x54c>)
8002784: 781b ldrb r3, [r3, #0]
8002786: 2b00 cmp r3, #0
8002788: f040 83c2 bne.w 8002f10 <manageCiclo+0xc20>
stCiclo = omM3bw2;
800278c: 4b2a ldr r3, [pc, #168] @ (8002838 <manageCiclo+0x548>)
800278e: 220c movs r2, #12
8002790: 701a strb r2, [r3, #0]
break;
8002792: e3bd b.n 8002f10 <manageCiclo+0xc20>
case omM3bw2:
(void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman, RAMPRUN);
8002794: 4b23 ldr r3, [pc, #140] @ (8002824 <manageCiclo+0x534>)
8002796: 889b ldrh r3, [r3, #4]
8002798: b2da uxtb r2, r3
800279a: 4b29 ldr r3, [pc, #164] @ (8002840 <manageCiclo+0x550>)
800279c: 881b ldrh r3, [r3, #0]
800279e: b2d9 uxtb r1, r3
80027a0: 4b22 ldr r3, [pc, #136] @ (800282c <manageCiclo+0x53c>)
80027a2: 881b ldrh r3, [r3, #0]
80027a4: b2db uxtb r3, r3
80027a6: 200a movs r0, #10
80027a8: 9001 str r0, [sp, #4]
80027aa: 9300 str r3, [sp, #0]
80027ac: 460b mov r3, r1
80027ae: 2101 movs r1, #1
80027b0: 2003 movs r0, #3
80027b2: f002 f951 bl 8004a58 <ramp>
if (rtCiclo >= m3TimeoutMan)
80027b6: 4b1e ldr r3, [pc, #120] @ (8002830 <manageCiclo+0x540>)
80027b8: 881b ldrh r3, [r3, #0]
80027ba: b29a uxth r2, r3
80027bc: 4b21 ldr r3, [pc, #132] @ (8002844 <manageCiclo+0x554>)
80027be: 881b ldrh r3, [r3, #0]
80027c0: 429a cmp r2, r3
80027c2: d302 bcc.n 80027ca <manageCiclo+0x4da>
stCiclo = omStopMan;
80027c4: 4b1c ldr r3, [pc, #112] @ (8002838 <manageCiclo+0x548>)
80027c6: 2211 movs r2, #17
80027c8: 701a strb r2, [r3, #0]
if (pulsanti)
80027ca: 4b1c ldr r3, [pc, #112] @ (800283c <manageCiclo+0x54c>)
80027cc: 781b ldrb r3, [r3, #0]
80027ce: 2b00 cmp r3, #0
80027d0: f000 83a0 beq.w 8002f14 <manageCiclo+0xc24>
stCiclo = omStopMan;
80027d4: 4b18 ldr r3, [pc, #96] @ (8002838 <manageCiclo+0x548>)
80027d6: 2211 movs r2, #17
80027d8: 701a strb r2, [r3, #0]
break;
80027da: e39b b.n 8002f14 <manageCiclo+0xc24>
case omM4fw1:
(void) ramp(M4, FW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
80027dc: 4b11 ldr r3, [pc, #68] @ (8002824 <manageCiclo+0x534>)
80027de: 88db ldrh r3, [r3, #6]
80027e0: b2da uxtb r2, r3
80027e2: 4b19 ldr r3, [pc, #100] @ (8002848 <manageCiclo+0x558>)
80027e4: 881b ldrh r3, [r3, #0]
80027e6: b2d9 uxtb r1, r3
80027e8: 4b10 ldr r3, [pc, #64] @ (800282c <manageCiclo+0x53c>)
80027ea: 881b ldrh r3, [r3, #0]
80027ec: b2db uxtb r3, r3
80027ee: 200a movs r0, #10
80027f0: 9001 str r0, [sp, #4]
80027f2: 9300 str r3, [sp, #0]
80027f4: 460b mov r3, r1
80027f6: 2100 movs r1, #0
80027f8: 2004 movs r0, #4
80027fa: f002 f92d bl 8004a58 <ramp>
if (rtCiclo >= m4TimeoutMan)
80027fe: 4b0c ldr r3, [pc, #48] @ (8002830 <manageCiclo+0x540>)
8002800: 881b ldrh r3, [r3, #0]
8002802: b29a uxth r2, r3
8002804: 4b11 ldr r3, [pc, #68] @ (800284c <manageCiclo+0x55c>)
8002806: 881b ldrh r3, [r3, #0]
8002808: 429a cmp r2, r3
800280a: d302 bcc.n 8002812 <manageCiclo+0x522>
stCiclo = omStopMan;
800280c: 4b0a ldr r3, [pc, #40] @ (8002838 <manageCiclo+0x548>)
800280e: 2211 movs r2, #17
8002810: 701a strb r2, [r3, #0]
if (pulsanti == 0)
8002812: 4b0a ldr r3, [pc, #40] @ (800283c <manageCiclo+0x54c>)
8002814: 781b ldrb r3, [r3, #0]
8002816: 2b00 cmp r3, #0
8002818: f040 837e bne.w 8002f18 <manageCiclo+0xc28>
stCiclo = omM4fw2;
800281c: 4b06 ldr r3, [pc, #24] @ (8002838 <manageCiclo+0x548>)
800281e: 220e movs r2, #14
8002820: 701a strb r2, [r3, #0]
break;
8002822: e379 b.n 8002f18 <manageCiclo+0xc28>
8002824: 2000044c .word 0x2000044c
8002828: 20000422 .word 0x20000422
800282c: 2000041e .word 0x2000041e
8002830: 200003fc .word 0x200003fc
8002834: 20000412 .word 0x20000412
8002838: 20000456 .word 0x20000456
800283c: 200003f0 .word 0x200003f0
8002840: 20000424 .word 0x20000424
8002844: 20000414 .word 0x20000414
8002848: 20000426 .word 0x20000426
800284c: 20000416 .word 0x20000416
case omM4fw2:
(void) ramp(M4, FW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
8002850: 4ba0 ldr r3, [pc, #640] @ (8002ad4 <manageCiclo+0x7e4>)
8002852: 88db ldrh r3, [r3, #6]
8002854: b2da uxtb r2, r3
8002856: 4ba0 ldr r3, [pc, #640] @ (8002ad8 <manageCiclo+0x7e8>)
8002858: 881b ldrh r3, [r3, #0]
800285a: b2d9 uxtb r1, r3
800285c: 4b9f ldr r3, [pc, #636] @ (8002adc <manageCiclo+0x7ec>)
800285e: 881b ldrh r3, [r3, #0]
8002860: b2db uxtb r3, r3
8002862: 200a movs r0, #10
8002864: 9001 str r0, [sp, #4]
8002866: 9300 str r3, [sp, #0]
8002868: 460b mov r3, r1
800286a: 2100 movs r1, #0
800286c: 2004 movs r0, #4
800286e: f002 f8f3 bl 8004a58 <ramp>
if (rtCiclo >= m4TimeoutMan)
8002872: 4b9b ldr r3, [pc, #620] @ (8002ae0 <manageCiclo+0x7f0>)
8002874: 881b ldrh r3, [r3, #0]
8002876: b29a uxth r2, r3
8002878: 4b9a ldr r3, [pc, #616] @ (8002ae4 <manageCiclo+0x7f4>)
800287a: 881b ldrh r3, [r3, #0]
800287c: 429a cmp r2, r3
800287e: d302 bcc.n 8002886 <manageCiclo+0x596>
stCiclo = omStopMan;
8002880: 4b99 ldr r3, [pc, #612] @ (8002ae8 <manageCiclo+0x7f8>)
8002882: 2211 movs r2, #17
8002884: 701a strb r2, [r3, #0]
if (pulsanti)
8002886: 4b99 ldr r3, [pc, #612] @ (8002aec <manageCiclo+0x7fc>)
8002888: 781b ldrb r3, [r3, #0]
800288a: 2b00 cmp r3, #0
800288c: f000 8346 beq.w 8002f1c <manageCiclo+0xc2c>
stCiclo = omStopMan;
8002890: 4b95 ldr r3, [pc, #596] @ (8002ae8 <manageCiclo+0x7f8>)
8002892: 2211 movs r2, #17
8002894: 701a strb r2, [r3, #0]
break;
8002896: e341 b.n 8002f1c <manageCiclo+0xc2c>
case omM4bw1:
(void) ramp(M4, BW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
8002898: 4b8e ldr r3, [pc, #568] @ (8002ad4 <manageCiclo+0x7e4>)
800289a: 88db ldrh r3, [r3, #6]
800289c: b2da uxtb r2, r3
800289e: 4b8e ldr r3, [pc, #568] @ (8002ad8 <manageCiclo+0x7e8>)
80028a0: 881b ldrh r3, [r3, #0]
80028a2: b2d9 uxtb r1, r3
80028a4: 4b8d ldr r3, [pc, #564] @ (8002adc <manageCiclo+0x7ec>)
80028a6: 881b ldrh r3, [r3, #0]
80028a8: b2db uxtb r3, r3
80028aa: 200a movs r0, #10
80028ac: 9001 str r0, [sp, #4]
80028ae: 9300 str r3, [sp, #0]
80028b0: 460b mov r3, r1
80028b2: 2101 movs r1, #1
80028b4: 2004 movs r0, #4
80028b6: f002 f8cf bl 8004a58 <ramp>
if (rtCiclo >= m4TimeoutMan)
80028ba: 4b89 ldr r3, [pc, #548] @ (8002ae0 <manageCiclo+0x7f0>)
80028bc: 881b ldrh r3, [r3, #0]
80028be: b29a uxth r2, r3
80028c0: 4b88 ldr r3, [pc, #544] @ (8002ae4 <manageCiclo+0x7f4>)
80028c2: 881b ldrh r3, [r3, #0]
80028c4: 429a cmp r2, r3
80028c6: d302 bcc.n 80028ce <manageCiclo+0x5de>
stCiclo = omStopMan;
80028c8: 4b87 ldr r3, [pc, #540] @ (8002ae8 <manageCiclo+0x7f8>)
80028ca: 2211 movs r2, #17
80028cc: 701a strb r2, [r3, #0]
if (pulsanti == 0)
80028ce: 4b87 ldr r3, [pc, #540] @ (8002aec <manageCiclo+0x7fc>)
80028d0: 781b ldrb r3, [r3, #0]
80028d2: 2b00 cmp r3, #0
80028d4: f040 8324 bne.w 8002f20 <manageCiclo+0xc30>
stCiclo = omM4bw2;
80028d8: 4b83 ldr r3, [pc, #524] @ (8002ae8 <manageCiclo+0x7f8>)
80028da: 2210 movs r2, #16
80028dc: 701a strb r2, [r3, #0]
break;
80028de: e31f b.n 8002f20 <manageCiclo+0xc30>
case omM4bw2:
(void) ramp(M4, BW, mrampstart[M4 - 1], m4pwmMan, trampman, RAMPRUN);
80028e0: 4b7c ldr r3, [pc, #496] @ (8002ad4 <manageCiclo+0x7e4>)
80028e2: 88db ldrh r3, [r3, #6]
80028e4: b2da uxtb r2, r3
80028e6: 4b7c ldr r3, [pc, #496] @ (8002ad8 <manageCiclo+0x7e8>)
80028e8: 881b ldrh r3, [r3, #0]
80028ea: b2d9 uxtb r1, r3
80028ec: 4b7b ldr r3, [pc, #492] @ (8002adc <manageCiclo+0x7ec>)
80028ee: 881b ldrh r3, [r3, #0]
80028f0: b2db uxtb r3, r3
80028f2: 200a movs r0, #10
80028f4: 9001 str r0, [sp, #4]
80028f6: 9300 str r3, [sp, #0]
80028f8: 460b mov r3, r1
80028fa: 2101 movs r1, #1
80028fc: 2004 movs r0, #4
80028fe: f002 f8ab bl 8004a58 <ramp>
if (rtCiclo >= m4TimeoutMan)
8002902: 4b77 ldr r3, [pc, #476] @ (8002ae0 <manageCiclo+0x7f0>)
8002904: 881b ldrh r3, [r3, #0]
8002906: b29a uxth r2, r3
8002908: 4b76 ldr r3, [pc, #472] @ (8002ae4 <manageCiclo+0x7f4>)
800290a: 881b ldrh r3, [r3, #0]
800290c: 429a cmp r2, r3
800290e: d302 bcc.n 8002916 <manageCiclo+0x626>
stCiclo = omStopMan;
8002910: 4b75 ldr r3, [pc, #468] @ (8002ae8 <manageCiclo+0x7f8>)
8002912: 2211 movs r2, #17
8002914: 701a strb r2, [r3, #0]
if (pulsanti)
8002916: 4b75 ldr r3, [pc, #468] @ (8002aec <manageCiclo+0x7fc>)
8002918: 781b ldrb r3, [r3, #0]
800291a: 2b00 cmp r3, #0
800291c: f000 8302 beq.w 8002f24 <manageCiclo+0xc34>
stCiclo = omStopMan;
8002920: 4b71 ldr r3, [pc, #452] @ (8002ae8 <manageCiclo+0x7f8>)
8002922: 2211 movs r2, #17
8002924: 701a strb r2, [r3, #0]
break;
8002926: e2fd b.n 8002f24 <manageCiclo+0xc34>
case omStopMan:
SetMotPerc(M1, FW, 0);
8002928: 2200 movs r2, #0
800292a: 2100 movs r1, #0
800292c: 2001 movs r0, #1
800292e: f001 ff13 bl 8004758 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002932: 2200 movs r2, #0
8002934: 2100 movs r1, #0
8002936: 2002 movs r0, #2
8002938: f001 ff0e bl 8004758 <SetMotPerc>
SetMotPerc(M3, FW, 0);
800293c: 2200 movs r2, #0
800293e: 2100 movs r1, #0
8002940: 2003 movs r0, #3
8002942: f001 ff09 bl 8004758 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002946: 2200 movs r2, #0
8002948: 2100 movs r1, #0
800294a: 2004 movs r0, #4
800294c: f001 ff04 bl 8004758 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002950: 2200 movs r2, #0
8002952: 2101 movs r1, #1
8002954: 2001 movs r0, #1
8002956: f001 feff bl 8004758 <SetMotPerc>
SetMotPerc(M2, BW, 0);
800295a: 2200 movs r2, #0
800295c: 2101 movs r1, #1
800295e: 2002 movs r0, #2
8002960: f001 fefa bl 8004758 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002964: 2200 movs r2, #0
8002966: 2101 movs r1, #1
8002968: 2003 movs r0, #3
800296a: f001 fef5 bl 8004758 <SetMotPerc>
SetMotPerc(M4, BW, 0);
800296e: 2200 movs r2, #0
8002970: 2101 movs r1, #1
8002972: 2004 movs r0, #4
8002974: f001 fef0 bl 8004758 <SetMotPerc>
if (pulsanti == 0) {
8002978: 4b5c ldr r3, [pc, #368] @ (8002aec <manageCiclo+0x7fc>)
800297a: 781b ldrb r3, [r3, #0]
800297c: 2b00 cmp r3, #0
800297e: f040 82d3 bne.w 8002f28 <manageCiclo+0xc38>
stBuz = bzoff;
8002982: 4b5b ldr r3, [pc, #364] @ (8002af0 <manageCiclo+0x800>)
8002984: 2200 movs r2, #0
8002986: 701a strb r2, [r3, #0]
stCiclo = omaperto;
8002988: 4b57 ldr r3, [pc, #348] @ (8002ae8 <manageCiclo+0x7f8>)
800298a: 2216 movs r2, #22
800298c: 701a strb r2, [r3, #0]
}
break;
800298e: e2cb b.n 8002f28 <manageCiclo+0xc38>
case omapertura0:
if (rtCiclo >= 30) { //dopo 3 secondi
8002990: 4b53 ldr r3, [pc, #332] @ (8002ae0 <manageCiclo+0x7f0>)
8002992: 881b ldrh r3, [r3, #0]
8002994: b29b uxth r3, r3
8002996: 2b1d cmp r3, #29
8002998: d924 bls.n 80029e4 <manageCiclo+0x6f4>
stBuz = bzmoving;
800299a: 4b55 ldr r3, [pc, #340] @ (8002af0 <manageCiclo+0x800>)
800299c: 2201 movs r2, #1
800299e: 701a strb r2, [r3, #0]
m1 = m1ap();
80029a0: f000 fe5c bl 800365c <m1ap>
80029a4: 4603 mov r3, r0
80029a6: 71fb strb r3, [r7, #7]
m2 = m2ap();
80029a8: f000 ff2a bl 8003800 <m2ap>
80029ac: 4603 mov r3, r0
80029ae: 71bb strb r3, [r7, #6]
m3 = m3ap();
80029b0: f000 fff8 bl 80039a4 <m3ap>
80029b4: 4603 mov r3, r0
80029b6: 717b strb r3, [r7, #5]
m4 = m4ap();
80029b8: f001 f8c8 bl 8003b4c <m4ap>
80029bc: 4603 mov r3, r0
80029be: 713b strb r3, [r7, #4]
if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop)
80029c0: 79fb ldrb r3, [r7, #7]
80029c2: 2b04 cmp r3, #4
80029c4: d10e bne.n 80029e4 <manageCiclo+0x6f4>
80029c6: 79bb ldrb r3, [r7, #6]
80029c8: 2b04 cmp r3, #4
80029ca: d10b bne.n 80029e4 <manageCiclo+0x6f4>
80029cc: 797b ldrb r3, [r7, #5]
80029ce: 2b04 cmp r3, #4
80029d0: d108 bne.n 80029e4 <manageCiclo+0x6f4>
&& (m4 == motStop)) {
80029d2: 793b ldrb r3, [r7, #4]
80029d4: 2b04 cmp r3, #4
80029d6: d105 bne.n 80029e4 <manageCiclo+0x6f4>
stBuz = bzoff;
80029d8: 4b45 ldr r3, [pc, #276] @ (8002af0 <manageCiclo+0x800>)
80029da: 2200 movs r2, #0
80029dc: 701a strb r2, [r3, #0]
stCiclo = omaperto;
80029de: 4b42 ldr r3, [pc, #264] @ (8002ae8 <manageCiclo+0x7f8>)
80029e0: 2216 movs r2, #22
80029e2: 701a strb r2, [r3, #0]
}
}
if (stPulsanti & P1STOP)
80029e4: 4b43 ldr r3, [pc, #268] @ (8002af4 <manageCiclo+0x804>)
80029e6: 881b ldrh r3, [r3, #0]
80029e8: f003 0302 and.w r3, r3, #2
80029ec: 2b00 cmp r3, #0
80029ee: f000 829d beq.w 8002f2c <manageCiclo+0xc3c>
stCiclo = omstopapertura;
80029f2: 4b3d ldr r3, [pc, #244] @ (8002ae8 <manageCiclo+0x7f8>)
80029f4: 2213 movs r2, #19
80029f6: 701a strb r2, [r3, #0]
// if (stPulsanti & P1START) {
// stCiclo = omstoprestartchiusura;
// rtCiclo = 0;
// }
break;
80029f8: e298 b.n 8002f2c <manageCiclo+0xc3c>
case omstopapertura:
SetMotPerc(M1, FW, 0);
80029fa: 2200 movs r2, #0
80029fc: 2100 movs r1, #0
80029fe: 2001 movs r0, #1
8002a00: f001 feaa bl 8004758 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002a04: 2200 movs r2, #0
8002a06: 2100 movs r1, #0
8002a08: 2002 movs r0, #2
8002a0a: f001 fea5 bl 8004758 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002a0e: 2200 movs r2, #0
8002a10: 2100 movs r1, #0
8002a12: 2003 movs r0, #3
8002a14: f001 fea0 bl 8004758 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002a18: 2200 movs r2, #0
8002a1a: 2100 movs r1, #0
8002a1c: 2004 movs r0, #4
8002a1e: f001 fe9b bl 8004758 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002a22: 2200 movs r2, #0
8002a24: 2101 movs r1, #1
8002a26: 2001 movs r0, #1
8002a28: f001 fe96 bl 8004758 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002a2c: 2200 movs r2, #0
8002a2e: 2101 movs r1, #1
8002a30: 2002 movs r0, #2
8002a32: f001 fe91 bl 8004758 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002a36: 2200 movs r2, #0
8002a38: 2101 movs r1, #1
8002a3a: 2003 movs r0, #3
8002a3c: f001 fe8c bl 8004758 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002a40: 2200 movs r2, #0
8002a42: 2101 movs r1, #1
8002a44: 2004 movs r0, #4
8002a46: f001 fe87 bl 8004758 <SetMotPerc>
if (pulsanti == 0) {
8002a4a: 4b28 ldr r3, [pc, #160] @ (8002aec <manageCiclo+0x7fc>)
8002a4c: 781b ldrb r3, [r3, #0]
8002a4e: 2b00 cmp r3, #0
8002a50: f040 826e bne.w 8002f30 <manageCiclo+0xc40>
stBuz = bzoff;
8002a54: 4b26 ldr r3, [pc, #152] @ (8002af0 <manageCiclo+0x800>)
8002a56: 2200 movs r2, #0
8002a58: 701a strb r2, [r3, #0]
stCiclo = omchiuso;
8002a5a: 4b23 ldr r3, [pc, #140] @ (8002ae8 <manageCiclo+0x7f8>)
8002a5c: 2200 movs r2, #0
8002a5e: 701a strb r2, [r3, #0]
stPulsanti &= (~P1STOP);
8002a60: 4b24 ldr r3, [pc, #144] @ (8002af4 <manageCiclo+0x804>)
8002a62: 881b ldrh r3, [r3, #0]
8002a64: f023 0302 bic.w r3, r3, #2
8002a68: b29a uxth r2, r3
8002a6a: 4b22 ldr r3, [pc, #136] @ (8002af4 <manageCiclo+0x804>)
8002a6c: 801a strh r2, [r3, #0]
}
break;
8002a6e: e25f b.n 8002f30 <manageCiclo+0xc40>
case omstoprestartchiusura:
SetMotPerc(M1, FW, 0);
8002a70: 2200 movs r2, #0
8002a72: 2100 movs r1, #0
8002a74: 2001 movs r0, #1
8002a76: f001 fe6f bl 8004758 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002a7a: 2200 movs r2, #0
8002a7c: 2100 movs r1, #0
8002a7e: 2002 movs r0, #2
8002a80: f001 fe6a bl 8004758 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002a84: 2200 movs r2, #0
8002a86: 2100 movs r1, #0
8002a88: 2003 movs r0, #3
8002a8a: f001 fe65 bl 8004758 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002a8e: 2200 movs r2, #0
8002a90: 2100 movs r1, #0
8002a92: 2004 movs r0, #4
8002a94: f001 fe60 bl 8004758 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002a98: 2200 movs r2, #0
8002a9a: 2101 movs r1, #1
8002a9c: 2001 movs r0, #1
8002a9e: f001 fe5b bl 8004758 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002aa2: 2200 movs r2, #0
8002aa4: 2101 movs r1, #1
8002aa6: 2002 movs r0, #2
8002aa8: f001 fe56 bl 8004758 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002aac: 2200 movs r2, #0
8002aae: 2101 movs r1, #1
8002ab0: 2003 movs r0, #3
8002ab2: f001 fe51 bl 8004758 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002ab6: 2200 movs r2, #0
8002ab8: 2101 movs r1, #1
8002aba: 2004 movs r0, #4
8002abc: f001 fe4c bl 8004758 <SetMotPerc>
if (rtCiclo >= 20)
8002ac0: 4b07 ldr r3, [pc, #28] @ (8002ae0 <manageCiclo+0x7f0>)
8002ac2: 881b ldrh r3, [r3, #0]
8002ac4: b29b uxth r3, r3
8002ac6: 2b13 cmp r3, #19
8002ac8: f240 8234 bls.w 8002f34 <manageCiclo+0xc44>
stCiclo = omaperto;
8002acc: 4b06 ldr r3, [pc, #24] @ (8002ae8 <manageCiclo+0x7f8>)
8002ace: 2216 movs r2, #22
8002ad0: 701a strb r2, [r3, #0]
break;
8002ad2: e22f b.n 8002f34 <manageCiclo+0xc44>
8002ad4: 2000044c .word 0x2000044c
8002ad8: 20000426 .word 0x20000426
8002adc: 2000041e .word 0x2000041e
8002ae0: 200003fc .word 0x200003fc
8002ae4: 20000416 .word 0x20000416
8002ae8: 20000456 .word 0x20000456
8002aec: 200003f0 .word 0x200003f0
8002af0: 20000457 .word 0x20000457
8002af4: 20000454 .word 0x20000454
case omaperto:
rtCiclo = 0;
8002af8: 4b9d ldr r3, [pc, #628] @ (8002d70 <manageCiclo+0xa80>)
8002afa: 2200 movs r2, #0
8002afc: 801a strh r2, [r3, #0]
if (stPulsanti & P1START) {
8002afe: 4b9d ldr r3, [pc, #628] @ (8002d74 <manageCiclo+0xa84>)
8002b00: 881b ldrh r3, [r3, #0]
8002b02: f003 0301 and.w r3, r3, #1
8002b06: 2b00 cmp r3, #0
8002b08: d00d beq.n 8002b26 <manageCiclo+0x836>
stBuz = bzmoving;
8002b0a: 4b9b ldr r3, [pc, #620] @ (8002d78 <manageCiclo+0xa88>)
8002b0c: 2201 movs r2, #1
8002b0e: 701a strb r2, [r3, #0]
//(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
stCiclo = omchiusura1;
8002b10: 4b9a ldr r3, [pc, #616] @ (8002d7c <manageCiclo+0xa8c>)
8002b12: 2217 movs r2, #23
8002b14: 701a strb r2, [r3, #0]
(void) m1ch();
8002b16: f001 f8ed bl 8003cf4 <m1ch>
(void) m2ch();
8002b1a: f001 f9bd bl 8003e98 <m2ch>
(void) m3ch();
8002b1e: f001 fa8d bl 800403c <m3ch>
(void) m4ch();
8002b22: f001 fb5f bl 80041e4 <m4ch>
}
if (ch8 > thanem) {
8002b26: 4b96 ldr r3, [pc, #600] @ (8002d80 <manageCiclo+0xa90>)
8002b28: 881a ldrh r2, [r3, #0]
8002b2a: 4b96 ldr r3, [pc, #600] @ (8002d84 <manageCiclo+0xa94>)
8002b2c: 881b ldrh r3, [r3, #0]
8002b2e: 429a cmp r2, r3
8002b30: d919 bls.n 8002b66 <manageCiclo+0x876>
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_SET);
8002b32: 2201 movs r2, #1
8002b34: f44f 4100 mov.w r1, #32768 @ 0x8000
8002b38: 4893 ldr r0, [pc, #588] @ (8002d88 <manageCiclo+0xa98>)
8002b3a: f003 fd3c bl 80065b6 <HAL_GPIO_WritePin>
if (rtAnem == 0) {
8002b3e: 4b93 ldr r3, [pc, #588] @ (8002d8c <manageCiclo+0xa9c>)
8002b40: 881b ldrh r3, [r3, #0]
8002b42: b29b uxth r3, r3
8002b44: 2b00 cmp r3, #0
8002b46: d118 bne.n 8002b7a <manageCiclo+0x88a>
stBuz = bzmoving;
8002b48: 4b8b ldr r3, [pc, #556] @ (8002d78 <manageCiclo+0xa88>)
8002b4a: 2201 movs r2, #1
8002b4c: 701a strb r2, [r3, #0]
stCiclo = omchiusura1;
8002b4e: 4b8b ldr r3, [pc, #556] @ (8002d7c <manageCiclo+0xa8c>)
8002b50: 2217 movs r2, #23
8002b52: 701a strb r2, [r3, #0]
(void) m1ch();
8002b54: f001 f8ce bl 8003cf4 <m1ch>
(void) m2ch();
8002b58: f001 f99e bl 8003e98 <m2ch>
(void) m3ch();
8002b5c: f001 fa6e bl 800403c <m3ch>
(void) m4ch();
8002b60: f001 fb40 bl 80041e4 <m4ch>
8002b64: e009 b.n 8002b7a <manageCiclo+0x88a>
}
} else{
HAL_GPIO_WritePin(LED1_GPIO_Port, LED1_Pin, GPIO_PIN_RESET);
8002b66: 2200 movs r2, #0
8002b68: f44f 4100 mov.w r1, #32768 @ 0x8000
8002b6c: 4886 ldr r0, [pc, #536] @ (8002d88 <manageCiclo+0xa98>)
8002b6e: f003 fd22 bl 80065b6 <HAL_GPIO_WritePin>
rtAnem = tanem;
8002b72: 4b87 ldr r3, [pc, #540] @ (8002d90 <manageCiclo+0xaa0>)
8002b74: 881a ldrh r2, [r3, #0]
8002b76: 4b85 ldr r3, [pc, #532] @ (8002d8c <manageCiclo+0xa9c>)
8002b78: 801a strh r2, [r3, #0]
}
if (stPulsanti & P1STOP)
8002b7a: 4b7e ldr r3, [pc, #504] @ (8002d74 <manageCiclo+0xa84>)
8002b7c: 881b ldrh r3, [r3, #0]
8002b7e: f003 0302 and.w r3, r3, #2
8002b82: 2b00 cmp r3, #0
8002b84: d003 beq.n 8002b8e <manageCiclo+0x89e>
stCiclo = omstopchiusura;
8002b86: 4b7d ldr r3, [pc, #500] @ (8002d7c <manageCiclo+0xa8c>)
8002b88: 2218 movs r2, #24
8002b8a: 701a strb r2, [r3, #0]
stBuz = bzmoving;
(void) ramp(M4, BW, mrampstart[M4 - 1], m3pwmMan, trampman,
RAMPINIT);
stCiclo = omM4bw1;
}
break;
8002b8c: e1d4 b.n 8002f38 <manageCiclo+0xc48>
else if (stPulsanti & M1FW) {
8002b8e: 4b79 ldr r3, [pc, #484] @ (8002d74 <manageCiclo+0xa84>)
8002b90: 881b ldrh r3, [r3, #0]
8002b92: f003 0310 and.w r3, r3, #16
8002b96: 2b00 cmp r3, #0
8002b98: d017 beq.n 8002bca <manageCiclo+0x8da>
stBuz = bzmoving;
8002b9a: 4b77 ldr r3, [pc, #476] @ (8002d78 <manageCiclo+0xa88>)
8002b9c: 2201 movs r2, #1
8002b9e: 701a strb r2, [r3, #0]
(void) ramp(M1, FW, mrampstart[M1 - 1], m1pwmMan, trampman,
8002ba0: 4b7c ldr r3, [pc, #496] @ (8002d94 <manageCiclo+0xaa4>)
8002ba2: 881b ldrh r3, [r3, #0]
8002ba4: b2da uxtb r2, r3
8002ba6: 4b7c ldr r3, [pc, #496] @ (8002d98 <manageCiclo+0xaa8>)
8002ba8: 881b ldrh r3, [r3, #0]
8002baa: b2d9 uxtb r1, r3
8002bac: 4b7b ldr r3, [pc, #492] @ (8002d9c <manageCiclo+0xaac>)
8002bae: 881b ldrh r3, [r3, #0]
8002bb0: b2db uxtb r3, r3
8002bb2: 2000 movs r0, #0
8002bb4: 9001 str r0, [sp, #4]
8002bb6: 9300 str r3, [sp, #0]
8002bb8: 460b mov r3, r1
8002bba: 2100 movs r1, #0
8002bbc: 2001 movs r0, #1
8002bbe: f001 ff4b bl 8004a58 <ramp>
stCiclo = omM1fw1;
8002bc2: 4b6e ldr r3, [pc, #440] @ (8002d7c <manageCiclo+0xa8c>)
8002bc4: 2201 movs r2, #1
8002bc6: 701a strb r2, [r3, #0]
break;
8002bc8: e1b6 b.n 8002f38 <manageCiclo+0xc48>
} else if (stPulsanti & M1BW) {
8002bca: 4b6a ldr r3, [pc, #424] @ (8002d74 <manageCiclo+0xa84>)
8002bcc: 881b ldrh r3, [r3, #0]
8002bce: f003 0320 and.w r3, r3, #32
8002bd2: 2b00 cmp r3, #0
8002bd4: d017 beq.n 8002c06 <manageCiclo+0x916>
stBuz = bzmoving;
8002bd6: 4b68 ldr r3, [pc, #416] @ (8002d78 <manageCiclo+0xa88>)
8002bd8: 2201 movs r2, #1
8002bda: 701a strb r2, [r3, #0]
(void) ramp(M1, BW, mrampstart[M1 - 1], m1pwmMan, trampman,
8002bdc: 4b6d ldr r3, [pc, #436] @ (8002d94 <manageCiclo+0xaa4>)
8002bde: 881b ldrh r3, [r3, #0]
8002be0: b2da uxtb r2, r3
8002be2: 4b6d ldr r3, [pc, #436] @ (8002d98 <manageCiclo+0xaa8>)
8002be4: 881b ldrh r3, [r3, #0]
8002be6: b2d9 uxtb r1, r3
8002be8: 4b6c ldr r3, [pc, #432] @ (8002d9c <manageCiclo+0xaac>)
8002bea: 881b ldrh r3, [r3, #0]
8002bec: b2db uxtb r3, r3
8002bee: 2000 movs r0, #0
8002bf0: 9001 str r0, [sp, #4]
8002bf2: 9300 str r3, [sp, #0]
8002bf4: 460b mov r3, r1
8002bf6: 2101 movs r1, #1
8002bf8: 2001 movs r0, #1
8002bfa: f001 ff2d bl 8004a58 <ramp>
stCiclo = omM1bw1;
8002bfe: 4b5f ldr r3, [pc, #380] @ (8002d7c <manageCiclo+0xa8c>)
8002c00: 2203 movs r2, #3
8002c02: 701a strb r2, [r3, #0]
break;
8002c04: e198 b.n 8002f38 <manageCiclo+0xc48>
} else if (stPulsanti & M2FW) {
8002c06: 4b5b ldr r3, [pc, #364] @ (8002d74 <manageCiclo+0xa84>)
8002c08: 881b ldrh r3, [r3, #0]
8002c0a: f003 0340 and.w r3, r3, #64 @ 0x40
8002c0e: 2b00 cmp r3, #0
8002c10: d017 beq.n 8002c42 <manageCiclo+0x952>
stBuz = bzmoving;
8002c12: 4b59 ldr r3, [pc, #356] @ (8002d78 <manageCiclo+0xa88>)
8002c14: 2201 movs r2, #1
8002c16: 701a strb r2, [r3, #0]
(void) ramp(M2, FW, mrampstart[M2 - 1], m2pwmMan, trampman,
8002c18: 4b5e ldr r3, [pc, #376] @ (8002d94 <manageCiclo+0xaa4>)
8002c1a: 885b ldrh r3, [r3, #2]
8002c1c: b2da uxtb r2, r3
8002c1e: 4b60 ldr r3, [pc, #384] @ (8002da0 <manageCiclo+0xab0>)
8002c20: 881b ldrh r3, [r3, #0]
8002c22: b2d9 uxtb r1, r3
8002c24: 4b5d ldr r3, [pc, #372] @ (8002d9c <manageCiclo+0xaac>)
8002c26: 881b ldrh r3, [r3, #0]
8002c28: b2db uxtb r3, r3
8002c2a: 2000 movs r0, #0
8002c2c: 9001 str r0, [sp, #4]
8002c2e: 9300 str r3, [sp, #0]
8002c30: 460b mov r3, r1
8002c32: 2100 movs r1, #0
8002c34: 2002 movs r0, #2
8002c36: f001 ff0f bl 8004a58 <ramp>
stCiclo = omM2fw1;
8002c3a: 4b50 ldr r3, [pc, #320] @ (8002d7c <manageCiclo+0xa8c>)
8002c3c: 2205 movs r2, #5
8002c3e: 701a strb r2, [r3, #0]
break;
8002c40: e17a b.n 8002f38 <manageCiclo+0xc48>
} else if (stPulsanti & M2BW) {
8002c42: 4b4c ldr r3, [pc, #304] @ (8002d74 <manageCiclo+0xa84>)
8002c44: 881b ldrh r3, [r3, #0]
8002c46: f003 0380 and.w r3, r3, #128 @ 0x80
8002c4a: 2b00 cmp r3, #0
8002c4c: d017 beq.n 8002c7e <manageCiclo+0x98e>
stBuz = bzmoving;
8002c4e: 4b4a ldr r3, [pc, #296] @ (8002d78 <manageCiclo+0xa88>)
8002c50: 2201 movs r2, #1
8002c52: 701a strb r2, [r3, #0]
(void) ramp(M2, BW, mrampstart[M2 - 1], m2pwmMan, trampman,
8002c54: 4b4f ldr r3, [pc, #316] @ (8002d94 <manageCiclo+0xaa4>)
8002c56: 885b ldrh r3, [r3, #2]
8002c58: b2da uxtb r2, r3
8002c5a: 4b51 ldr r3, [pc, #324] @ (8002da0 <manageCiclo+0xab0>)
8002c5c: 881b ldrh r3, [r3, #0]
8002c5e: b2d9 uxtb r1, r3
8002c60: 4b4e ldr r3, [pc, #312] @ (8002d9c <manageCiclo+0xaac>)
8002c62: 881b ldrh r3, [r3, #0]
8002c64: b2db uxtb r3, r3
8002c66: 2000 movs r0, #0
8002c68: 9001 str r0, [sp, #4]
8002c6a: 9300 str r3, [sp, #0]
8002c6c: 460b mov r3, r1
8002c6e: 2101 movs r1, #1
8002c70: 2002 movs r0, #2
8002c72: f001 fef1 bl 8004a58 <ramp>
stCiclo = omM2bw1;
8002c76: 4b41 ldr r3, [pc, #260] @ (8002d7c <manageCiclo+0xa8c>)
8002c78: 2207 movs r2, #7
8002c7a: 701a strb r2, [r3, #0]
break;
8002c7c: e15c b.n 8002f38 <manageCiclo+0xc48>
} else if (stPulsanti & M3FW) {
8002c7e: 4b3d ldr r3, [pc, #244] @ (8002d74 <manageCiclo+0xa84>)
8002c80: 881b ldrh r3, [r3, #0]
8002c82: f403 7380 and.w r3, r3, #256 @ 0x100
8002c86: 2b00 cmp r3, #0
8002c88: d017 beq.n 8002cba <manageCiclo+0x9ca>
stBuz = bzmoving;
8002c8a: 4b3b ldr r3, [pc, #236] @ (8002d78 <manageCiclo+0xa88>)
8002c8c: 2201 movs r2, #1
8002c8e: 701a strb r2, [r3, #0]
(void) ramp(M3, FW, mrampstart[M3 - 1], m3pwmMan, trampman,
8002c90: 4b40 ldr r3, [pc, #256] @ (8002d94 <manageCiclo+0xaa4>)
8002c92: 889b ldrh r3, [r3, #4]
8002c94: b2da uxtb r2, r3
8002c96: 4b43 ldr r3, [pc, #268] @ (8002da4 <manageCiclo+0xab4>)
8002c98: 881b ldrh r3, [r3, #0]
8002c9a: b2d9 uxtb r1, r3
8002c9c: 4b3f ldr r3, [pc, #252] @ (8002d9c <manageCiclo+0xaac>)
8002c9e: 881b ldrh r3, [r3, #0]
8002ca0: b2db uxtb r3, r3
8002ca2: 2000 movs r0, #0
8002ca4: 9001 str r0, [sp, #4]
8002ca6: 9300 str r3, [sp, #0]
8002ca8: 460b mov r3, r1
8002caa: 2100 movs r1, #0
8002cac: 2003 movs r0, #3
8002cae: f001 fed3 bl 8004a58 <ramp>
stCiclo = omM3fw1;
8002cb2: 4b32 ldr r3, [pc, #200] @ (8002d7c <manageCiclo+0xa8c>)
8002cb4: 2209 movs r2, #9
8002cb6: 701a strb r2, [r3, #0]
break;
8002cb8: e13e b.n 8002f38 <manageCiclo+0xc48>
} else if (stPulsanti & M3BW) {
8002cba: 4b2e ldr r3, [pc, #184] @ (8002d74 <manageCiclo+0xa84>)
8002cbc: 881b ldrh r3, [r3, #0]
8002cbe: f403 7300 and.w r3, r3, #512 @ 0x200
8002cc2: 2b00 cmp r3, #0
8002cc4: d017 beq.n 8002cf6 <manageCiclo+0xa06>
stBuz = bzmoving;
8002cc6: 4b2c ldr r3, [pc, #176] @ (8002d78 <manageCiclo+0xa88>)
8002cc8: 2201 movs r2, #1
8002cca: 701a strb r2, [r3, #0]
(void) ramp(M3, BW, mrampstart[M3 - 1], m3pwmMan, trampman,
8002ccc: 4b31 ldr r3, [pc, #196] @ (8002d94 <manageCiclo+0xaa4>)
8002cce: 889b ldrh r3, [r3, #4]
8002cd0: b2da uxtb r2, r3
8002cd2: 4b34 ldr r3, [pc, #208] @ (8002da4 <manageCiclo+0xab4>)
8002cd4: 881b ldrh r3, [r3, #0]
8002cd6: b2d9 uxtb r1, r3
8002cd8: 4b30 ldr r3, [pc, #192] @ (8002d9c <manageCiclo+0xaac>)
8002cda: 881b ldrh r3, [r3, #0]
8002cdc: b2db uxtb r3, r3
8002cde: 2000 movs r0, #0
8002ce0: 9001 str r0, [sp, #4]
8002ce2: 9300 str r3, [sp, #0]
8002ce4: 460b mov r3, r1
8002ce6: 2101 movs r1, #1
8002ce8: 2003 movs r0, #3
8002cea: f001 feb5 bl 8004a58 <ramp>
stCiclo = omM3bw1;
8002cee: 4b23 ldr r3, [pc, #140] @ (8002d7c <manageCiclo+0xa8c>)
8002cf0: 220b movs r2, #11
8002cf2: 701a strb r2, [r3, #0]
break;
8002cf4: e120 b.n 8002f38 <manageCiclo+0xc48>
} else if (stPulsanti & M4FW) {
8002cf6: 4b1f ldr r3, [pc, #124] @ (8002d74 <manageCiclo+0xa84>)
8002cf8: 881b ldrh r3, [r3, #0]
8002cfa: f403 6380 and.w r3, r3, #1024 @ 0x400
8002cfe: 2b00 cmp r3, #0
8002d00: d017 beq.n 8002d32 <manageCiclo+0xa42>
stBuz = bzmoving;
8002d02: 4b1d ldr r3, [pc, #116] @ (8002d78 <manageCiclo+0xa88>)
8002d04: 2201 movs r2, #1
8002d06: 701a strb r2, [r3, #0]
(void) ramp(M4, FW, mrampstart[M4 - 1], m3pwmMan, trampman,
8002d08: 4b22 ldr r3, [pc, #136] @ (8002d94 <manageCiclo+0xaa4>)
8002d0a: 88db ldrh r3, [r3, #6]
8002d0c: b2da uxtb r2, r3
8002d0e: 4b25 ldr r3, [pc, #148] @ (8002da4 <manageCiclo+0xab4>)
8002d10: 881b ldrh r3, [r3, #0]
8002d12: b2d9 uxtb r1, r3
8002d14: 4b21 ldr r3, [pc, #132] @ (8002d9c <manageCiclo+0xaac>)
8002d16: 881b ldrh r3, [r3, #0]
8002d18: b2db uxtb r3, r3
8002d1a: 2000 movs r0, #0
8002d1c: 9001 str r0, [sp, #4]
8002d1e: 9300 str r3, [sp, #0]
8002d20: 460b mov r3, r1
8002d22: 2100 movs r1, #0
8002d24: 2004 movs r0, #4
8002d26: f001 fe97 bl 8004a58 <ramp>
stCiclo = omM4fw1;
8002d2a: 4b14 ldr r3, [pc, #80] @ (8002d7c <manageCiclo+0xa8c>)
8002d2c: 220d movs r2, #13
8002d2e: 701a strb r2, [r3, #0]
break;
8002d30: e102 b.n 8002f38 <manageCiclo+0xc48>
} else if (stPulsanti & M4BW) {
8002d32: 4b10 ldr r3, [pc, #64] @ (8002d74 <manageCiclo+0xa84>)
8002d34: 881b ldrh r3, [r3, #0]
8002d36: f403 6300 and.w r3, r3, #2048 @ 0x800
8002d3a: 2b00 cmp r3, #0
8002d3c: f000 80fc beq.w 8002f38 <manageCiclo+0xc48>
stBuz = bzmoving;
8002d40: 4b0d ldr r3, [pc, #52] @ (8002d78 <manageCiclo+0xa88>)
8002d42: 2201 movs r2, #1
8002d44: 701a strb r2, [r3, #0]
(void) ramp(M4, BW, mrampstart[M4 - 1], m3pwmMan, trampman,
8002d46: 4b13 ldr r3, [pc, #76] @ (8002d94 <manageCiclo+0xaa4>)
8002d48: 88db ldrh r3, [r3, #6]
8002d4a: b2da uxtb r2, r3
8002d4c: 4b15 ldr r3, [pc, #84] @ (8002da4 <manageCiclo+0xab4>)
8002d4e: 881b ldrh r3, [r3, #0]
8002d50: b2d9 uxtb r1, r3
8002d52: 4b12 ldr r3, [pc, #72] @ (8002d9c <manageCiclo+0xaac>)
8002d54: 881b ldrh r3, [r3, #0]
8002d56: b2db uxtb r3, r3
8002d58: 2000 movs r0, #0
8002d5a: 9001 str r0, [sp, #4]
8002d5c: 9300 str r3, [sp, #0]
8002d5e: 460b mov r3, r1
8002d60: 2101 movs r1, #1
8002d62: 2004 movs r0, #4
8002d64: f001 fe78 bl 8004a58 <ramp>
stCiclo = omM4bw1;
8002d68: 4b04 ldr r3, [pc, #16] @ (8002d7c <manageCiclo+0xa8c>)
8002d6a: 220f movs r2, #15
8002d6c: 701a strb r2, [r3, #0]
break;
8002d6e: e0e3 b.n 8002f38 <manageCiclo+0xc48>
8002d70: 200003fc .word 0x200003fc
8002d74: 20000454 .word 0x20000454
8002d78: 20000457 .word 0x20000457
8002d7c: 20000456 .word 0x20000456
8002d80: 20000232 .word 0x20000232
8002d84: 2000041c .word 0x2000041c
8002d88: 40010800 .word 0x40010800
8002d8c: 200003fe .word 0x200003fe
8002d90: 2000041a .word 0x2000041a
8002d94: 2000044c .word 0x2000044c
8002d98: 20000420 .word 0x20000420
8002d9c: 2000041e .word 0x2000041e
8002da0: 20000422 .word 0x20000422
8002da4: 20000424 .word 0x20000424
case omchiusura1:
if (rtCiclo >= 10) { //doppo 1 secondi
8002da8: 4b69 ldr r3, [pc, #420] @ (8002f50 <manageCiclo+0xc60>)
8002daa: 881b ldrh r3, [r3, #0]
8002dac: b29b uxth r3, r3
8002dae: 2b09 cmp r3, #9
8002db0: d924 bls.n 8002dfc <manageCiclo+0xb0c>
m1 = m1ch();
8002db2: f000 ff9f bl 8003cf4 <m1ch>
8002db6: 4603 mov r3, r0
8002db8: 71fb strb r3, [r7, #7]
m2 = m2ch();
8002dba: f001 f86d bl 8003e98 <m2ch>
8002dbe: 4603 mov r3, r0
8002dc0: 71bb strb r3, [r7, #6]
m3 = m3ch();
8002dc2: f001 f93b bl 800403c <m3ch>
8002dc6: 4603 mov r3, r0
8002dc8: 717b strb r3, [r7, #5]
m4 = m4ch();
8002dca: f001 fa0b bl 80041e4 <m4ch>
8002dce: 4603 mov r3, r0
8002dd0: 713b strb r3, [r7, #4]
if ((m1 == motStop) && (m2 == motStop) && (m3 == motStop)
8002dd2: 79fb ldrb r3, [r7, #7]
8002dd4: 2b04 cmp r3, #4
8002dd6: d111 bne.n 8002dfc <manageCiclo+0xb0c>
8002dd8: 79bb ldrb r3, [r7, #6]
8002dda: 2b04 cmp r3, #4
8002ddc: d10e bne.n 8002dfc <manageCiclo+0xb0c>
8002dde: 797b ldrb r3, [r7, #5]
8002de0: 2b04 cmp r3, #4
8002de2: d10b bne.n 8002dfc <manageCiclo+0xb0c>
&& (m4 == motStop)) {
8002de4: 793b ldrb r3, [r7, #4]
8002de6: 2b04 cmp r3, #4
8002de8: d108 bne.n 8002dfc <manageCiclo+0xb0c>
stBuz = bzoff;
8002dea: 4b5a ldr r3, [pc, #360] @ (8002f54 <manageCiclo+0xc64>)
8002dec: 2200 movs r2, #0
8002dee: 701a strb r2, [r3, #0]
stCiclo = omchiuso;
8002df0: 4b59 ldr r3, [pc, #356] @ (8002f58 <manageCiclo+0xc68>)
8002df2: 2200 movs r2, #0
8002df4: 701a strb r2, [r3, #0]
fchiuso = true;
8002df6: 4b59 ldr r3, [pc, #356] @ (8002f5c <manageCiclo+0xc6c>)
8002df8: 2201 movs r2, #1
8002dfa: 701a strb r2, [r3, #0]
}
}
if (stPulsanti & P1STOP)
8002dfc: 4b58 ldr r3, [pc, #352] @ (8002f60 <manageCiclo+0xc70>)
8002dfe: 881b ldrh r3, [r3, #0]
8002e00: f003 0302 and.w r3, r3, #2
8002e04: 2b00 cmp r3, #0
8002e06: f000 8099 beq.w 8002f3c <manageCiclo+0xc4c>
stCiclo = omstopchiusura;
8002e0a: 4b53 ldr r3, [pc, #332] @ (8002f58 <manageCiclo+0xc68>)
8002e0c: 2218 movs r2, #24
8002e0e: 701a strb r2, [r3, #0]
// if (stPulsanti & P1START) {
// stCiclo = omstoprestartapertura;
// rtCiclo = 0;
// }
break;
8002e10: e094 b.n 8002f3c <manageCiclo+0xc4c>
case omstoprestartapertura:
SetMotPerc(M1, FW, 0);
8002e12: 2200 movs r2, #0
8002e14: 2100 movs r1, #0
8002e16: 2001 movs r0, #1
8002e18: f001 fc9e bl 8004758 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002e1c: 2200 movs r2, #0
8002e1e: 2100 movs r1, #0
8002e20: 2002 movs r0, #2
8002e22: f001 fc99 bl 8004758 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002e26: 2200 movs r2, #0
8002e28: 2100 movs r1, #0
8002e2a: 2003 movs r0, #3
8002e2c: f001 fc94 bl 8004758 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002e30: 2200 movs r2, #0
8002e32: 2100 movs r1, #0
8002e34: 2004 movs r0, #4
8002e36: f001 fc8f bl 8004758 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002e3a: 2200 movs r2, #0
8002e3c: 2101 movs r1, #1
8002e3e: 2001 movs r0, #1
8002e40: f001 fc8a bl 8004758 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002e44: 2200 movs r2, #0
8002e46: 2101 movs r1, #1
8002e48: 2002 movs r0, #2
8002e4a: f001 fc85 bl 8004758 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002e4e: 2200 movs r2, #0
8002e50: 2101 movs r1, #1
8002e52: 2003 movs r0, #3
8002e54: f001 fc80 bl 8004758 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002e58: 2200 movs r2, #0
8002e5a: 2101 movs r1, #1
8002e5c: 2004 movs r0, #4
8002e5e: f001 fc7b bl 8004758 <SetMotPerc>
if (rtCiclo >= 20)
8002e62: 4b3b ldr r3, [pc, #236] @ (8002f50 <manageCiclo+0xc60>)
8002e64: 881b ldrh r3, [r3, #0]
8002e66: b29b uxth r3, r3
8002e68: 2b13 cmp r3, #19
8002e6a: d969 bls.n 8002f40 <manageCiclo+0xc50>
stCiclo = omchiuso;
8002e6c: 4b3a ldr r3, [pc, #232] @ (8002f58 <manageCiclo+0xc68>)
8002e6e: 2200 movs r2, #0
8002e70: 701a strb r2, [r3, #0]
break;
8002e72: e065 b.n 8002f40 <manageCiclo+0xc50>
case omstopchiusura:
SetMotPerc(M1, FW, 0);
8002e74: 2200 movs r2, #0
8002e76: 2100 movs r1, #0
8002e78: 2001 movs r0, #1
8002e7a: f001 fc6d bl 8004758 <SetMotPerc>
SetMotPerc(M2, FW, 0);
8002e7e: 2200 movs r2, #0
8002e80: 2100 movs r1, #0
8002e82: 2002 movs r0, #2
8002e84: f001 fc68 bl 8004758 <SetMotPerc>
SetMotPerc(M3, FW, 0);
8002e88: 2200 movs r2, #0
8002e8a: 2100 movs r1, #0
8002e8c: 2003 movs r0, #3
8002e8e: f001 fc63 bl 8004758 <SetMotPerc>
SetMotPerc(M4, FW, 0);
8002e92: 2200 movs r2, #0
8002e94: 2100 movs r1, #0
8002e96: 2004 movs r0, #4
8002e98: f001 fc5e bl 8004758 <SetMotPerc>
SetMotPerc(M1, BW, 0);
8002e9c: 2200 movs r2, #0
8002e9e: 2101 movs r1, #1
8002ea0: 2001 movs r0, #1
8002ea2: f001 fc59 bl 8004758 <SetMotPerc>
SetMotPerc(M2, BW, 0);
8002ea6: 2200 movs r2, #0
8002ea8: 2101 movs r1, #1
8002eaa: 2002 movs r0, #2
8002eac: f001 fc54 bl 8004758 <SetMotPerc>
SetMotPerc(M3, BW, 0);
8002eb0: 2200 movs r2, #0
8002eb2: 2101 movs r1, #1
8002eb4: 2003 movs r0, #3
8002eb6: f001 fc4f bl 8004758 <SetMotPerc>
SetMotPerc(M4, BW, 0);
8002eba: 2200 movs r2, #0
8002ebc: 2101 movs r1, #1
8002ebe: 2004 movs r0, #4
8002ec0: f001 fc4a bl 8004758 <SetMotPerc>
if (pulsanti == 0) {
8002ec4: 4b27 ldr r3, [pc, #156] @ (8002f64 <manageCiclo+0xc74>)
8002ec6: 781b ldrb r3, [r3, #0]
8002ec8: 2b00 cmp r3, #0
8002eca: d13b bne.n 8002f44 <manageCiclo+0xc54>
stBuz = bzoff;
8002ecc: 4b21 ldr r3, [pc, #132] @ (8002f54 <manageCiclo+0xc64>)
8002ece: 2200 movs r2, #0
8002ed0: 701a strb r2, [r3, #0]
stCiclo = omaperto;
8002ed2: 4b21 ldr r3, [pc, #132] @ (8002f58 <manageCiclo+0xc68>)
8002ed4: 2216 movs r2, #22
8002ed6: 701a strb r2, [r3, #0]
stPulsanti &= (~P1STOP);
8002ed8: 4b21 ldr r3, [pc, #132] @ (8002f60 <manageCiclo+0xc70>)
8002eda: 881b ldrh r3, [r3, #0]
8002edc: f023 0302 bic.w r3, r3, #2
8002ee0: b29a uxth r2, r3
8002ee2: 4b1f ldr r3, [pc, #124] @ (8002f60 <manageCiclo+0xc70>)
8002ee4: 801a strh r2, [r3, #0]
}
break;
8002ee6: e02d b.n 8002f44 <manageCiclo+0xc54>
break;
8002ee8: bf00 nop
8002eea: e02c b.n 8002f46 <manageCiclo+0xc56>
break;
8002eec: bf00 nop
8002eee: e02a b.n 8002f46 <manageCiclo+0xc56>
break;
8002ef0: bf00 nop
8002ef2: e028 b.n 8002f46 <manageCiclo+0xc56>
break;
8002ef4: bf00 nop
8002ef6: e026 b.n 8002f46 <manageCiclo+0xc56>
break;
8002ef8: bf00 nop
8002efa: e024 b.n 8002f46 <manageCiclo+0xc56>
break;
8002efc: bf00 nop
8002efe: e022 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f00: bf00 nop
8002f02: e020 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f04: bf00 nop
8002f06: e01e b.n 8002f46 <manageCiclo+0xc56>
break;
8002f08: bf00 nop
8002f0a: e01c b.n 8002f46 <manageCiclo+0xc56>
break;
8002f0c: bf00 nop
8002f0e: e01a b.n 8002f46 <manageCiclo+0xc56>
break;
8002f10: bf00 nop
8002f12: e018 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f14: bf00 nop
8002f16: e016 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f18: bf00 nop
8002f1a: e014 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f1c: bf00 nop
8002f1e: e012 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f20: bf00 nop
8002f22: e010 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f24: bf00 nop
8002f26: e00e b.n 8002f46 <manageCiclo+0xc56>
break;
8002f28: bf00 nop
8002f2a: e00c b.n 8002f46 <manageCiclo+0xc56>
break;
8002f2c: bf00 nop
8002f2e: e00a b.n 8002f46 <manageCiclo+0xc56>
break;
8002f30: bf00 nop
8002f32: e008 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f34: bf00 nop
8002f36: e006 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f38: bf00 nop
8002f3a: e004 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f3c: bf00 nop
8002f3e: e002 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f40: bf00 nop
8002f42: e000 b.n 8002f46 <manageCiclo+0xc56>
break;
8002f44: bf00 nop
}
}
8002f46: bf00 nop
8002f48: 3708 adds r7, #8
8002f4a: 46bd mov sp, r7
8002f4c: bd80 pop {r7, pc}
8002f4e: bf00 nop
8002f50: 200003fc .word 0x200003fc
8002f54: 20000457 .word 0x20000457
8002f58: 20000456 .word 0x20000456
8002f5c: 20000459 .word 0x20000459
8002f60: 20000454 .word 0x20000454
8002f64: 200003f0 .word 0x200003f0
08002f68 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void) {
8002f68: b580 push {r7, lr}
8002f6a: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8002f6c: f002 f858 bl 8005020 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8002f70: f000 f860 bl 8003034 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8002f74: f000 fac2 bl 80034fc <MX_GPIO_Init>
MX_DMA_Init();
8002f78: f000 faa2 bl 80034c0 <MX_DMA_Init>
MX_USB_DEVICE_Init();
8002f7c: f00a fcf0 bl 800d960 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
8002f80: f000 f92e bl 80031e0 <MX_TIM2_Init>
MX_TIM4_Init();
8002f84: f000 f9d0 bl 8003328 <MX_TIM4_Init>
MX_ADC1_Init();
8002f88: f000 f8b2 bl 80030f0 <MX_ADC1_Init>
MX_USART1_UART_Init();
8002f8c: f000 fa6e bl 800346c <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
HAL_ADC_Start_DMA(&hadc1, (uint32_t*) adc_dma_buf, ADC_NUM_CHANNELS);
8002f90: 2205 movs r2, #5
8002f92: 4922 ldr r1, [pc, #136] @ (800301c <main+0xb4>)
8002f94: 4822 ldr r0, [pc, #136] @ (8003020 <main+0xb8>)
8002f96: f002 f97d bl 8005294 <HAL_ADC_Start_DMA>
StopMot(timMot1, FWMot1);
8002f9a: 2100 movs r1, #0
8002f9c: 4821 ldr r0, [pc, #132] @ (8003024 <main+0xbc>)
8002f9e: f001 fa08 bl 80043b2 <StopMot>
StopMot(timMot1, BWMot1);
8002fa2: 2104 movs r1, #4
8002fa4: 481f ldr r0, [pc, #124] @ (8003024 <main+0xbc>)
8002fa6: f001 fa04 bl 80043b2 <StopMot>
StopMot(timMot2, FWMot2);
8002faa: 2108 movs r1, #8
8002fac: 481d ldr r0, [pc, #116] @ (8003024 <main+0xbc>)
8002fae: f001 fa00 bl 80043b2 <StopMot>
StopMot(timMot2, BWMot2);
8002fb2: 210c movs r1, #12
8002fb4: 481b ldr r0, [pc, #108] @ (8003024 <main+0xbc>)
8002fb6: f001 f9fc bl 80043b2 <StopMot>
StopMot(timMot3, FWMot3);
8002fba: 2100 movs r1, #0
8002fbc: 481a ldr r0, [pc, #104] @ (8003028 <main+0xc0>)
8002fbe: f001 f9f8 bl 80043b2 <StopMot>
StopMot(timMot3, BWMot3);
8002fc2: 2104 movs r1, #4
8002fc4: 4818 ldr r0, [pc, #96] @ (8003028 <main+0xc0>)
8002fc6: f001 f9f4 bl 80043b2 <StopMot>
StopMot(timMot4, FWMot4);
8002fca: 2108 movs r1, #8
8002fcc: 4816 ldr r0, [pc, #88] @ (8003028 <main+0xc0>)
8002fce: f001 f9f0 bl 80043b2 <StopMot>
StopMot(timMot4, BWMot4);
8002fd2: 210c movs r1, #12
8002fd4: 4814 ldr r0, [pc, #80] @ (8003028 <main+0xc0>)
8002fd6: f001 f9ec bl 80043b2 <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
//while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
if (EE_Init() != EE_OK) {
8002fda: f7fe faf7 bl 80015cc <EE_Init>
8002fde: 4603 mov r3, r0
8002fe0: 2b00 cmp r3, #0
8002fe2: d001 beq.n 8002fe8 <main+0x80>
for (;;)
8002fe4: bf00 nop
8002fe6: e7fd b.n 8002fe4 <main+0x7c>
; //errore eeprom
}
loadEE();
8002fe8: f7fe fbda bl 80017a0 <loadEE>
if (flagPar != VERSIONE) {
8002fec: 4b0f ldr r3, [pc, #60] @ (800302c <main+0xc4>)
8002fee: 881b ldrh r3, [r3, #0]
8002ff0: 2b08 cmp r3, #8
8002ff2: d003 beq.n 8002ffc <main+0x94>
loadDefault();
8002ff4: f7fe fb86 bl 8001704 <loadDefault>
loadEE();
8002ff8: f7fe fbd2 bl 80017a0 <loadEE>
}
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
fchiuso = false;
8002ffc: 4b0c ldr r3, [pc, #48] @ (8003030 <main+0xc8>)
8002ffe: 2200 movs r2, #0
8003000: 701a strb r2, [r3, #0]
while (1) {
manageCDC();
8003002: f7fd f9fb bl 80003fc <manageCDC>
manageAdc();
8003006: f7fd f8a9 bl 800015c <manageAdc>
managePulsanti();
800300a: f7ff f80d bl 8002028 <managePulsanti>
manageCiclo();
800300e: f7ff f96f bl 80022f0 <manageCiclo>
debug();
8003012: f7fe f8cf bl 80011b4 <debug>
manageCDC();
8003016: bf00 nop
8003018: e7f3 b.n 8003002 <main+0x9a>
800301a: bf00 nop
800301c: 200001fc .word 0x200001fc
8003020: 200002a4 .word 0x200002a4
8003024: 20000318 .word 0x20000318
8003028: 20000360 .word 0x20000360
800302c: 20000448 .word 0x20000448
8003030: 20000459 .word 0x20000459
08003034 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void) {
8003034: b580 push {r7, lr}
8003036: b094 sub sp, #80 @ 0x50
8003038: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
800303a: f107 0328 add.w r3, r7, #40 @ 0x28
800303e: 2228 movs r2, #40 @ 0x28
8003040: 2100 movs r1, #0
8003042: 4618 mov r0, r3
8003044: f00b f9c8 bl 800e3d8 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
8003048: f107 0314 add.w r3, r7, #20
800304c: 2200 movs r2, #0
800304e: 601a str r2, [r3, #0]
8003050: 605a str r2, [r3, #4]
8003052: 609a str r2, [r3, #8]
8003054: 60da str r2, [r3, #12]
8003056: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = { 0 };
8003058: 1d3b adds r3, r7, #4
800305a: 2200 movs r2, #0
800305c: 601a str r2, [r3, #0]
800305e: 605a str r2, [r3, #4]
8003060: 609a str r2, [r3, #8]
8003062: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8003064: 2301 movs r3, #1
8003066: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8003068: f44f 3380 mov.w r3, #65536 @ 0x10000
800306c: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
800306e: 2300 movs r3, #0
8003070: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
8003072: 2301 movs r3, #1
8003074: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8003076: 2302 movs r3, #2
8003078: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
800307a: f44f 3380 mov.w r3, #65536 @ 0x10000
800307e: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
8003080: f44f 1380 mov.w r3, #1048576 @ 0x100000
8003084: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
8003086: f107 0328 add.w r3, r7, #40 @ 0x28
800308a: 4618 mov r0, r3
800308c: f005 f80c bl 80080a8 <HAL_RCC_OscConfig>
8003090: 4603 mov r3, r0
8003092: 2b00 cmp r3, #0
8003094: d001 beq.n 800309a <SystemClock_Config+0x66>
Error_Handler();
8003096: f000 fadb bl 8003650 <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
800309a: 230f movs r3, #15
800309c: 617b str r3, [r7, #20]
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
800309e: 2302 movs r3, #2
80030a0: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
80030a2: 2300 movs r3, #0
80030a4: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
80030a6: f44f 6380 mov.w r3, #1024 @ 0x400
80030aa: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
80030ac: 2300 movs r3, #0
80030ae: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
80030b0: f107 0314 add.w r3, r7, #20
80030b4: 2102 movs r1, #2
80030b6: 4618 mov r0, r3
80030b8: f005 fa78 bl 80085ac <HAL_RCC_ClockConfig>
80030bc: 4603 mov r3, r0
80030be: 2b00 cmp r3, #0
80030c0: d001 beq.n 80030c6 <SystemClock_Config+0x92>
Error_Handler();
80030c2: f000 fac5 bl 8003650 <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC | RCC_PERIPHCLK_USB;
80030c6: 2312 movs r3, #18
80030c8: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
80030ca: f44f 4300 mov.w r3, #32768 @ 0x8000
80030ce: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
80030d0: 2300 movs r3, #0
80030d2: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
80030d4: 1d3b adds r3, r7, #4
80030d6: 4618 mov r0, r3
80030d8: f005 fbf8 bl 80088cc <HAL_RCCEx_PeriphCLKConfig>
80030dc: 4603 mov r3, r0
80030de: 2b00 cmp r3, #0
80030e0: d001 beq.n 80030e6 <SystemClock_Config+0xb2>
Error_Handler();
80030e2: f000 fab5 bl 8003650 <Error_Handler>
}
}
80030e6: bf00 nop
80030e8: 3750 adds r7, #80 @ 0x50
80030ea: 46bd mov sp, r7
80030ec: bd80 pop {r7, pc}
...
080030f0 <MX_ADC1_Init>:
/**
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void) {
80030f0: b580 push {r7, lr}
80030f2: b084 sub sp, #16
80030f4: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = { 0 };
80030f6: 1d3b adds r3, r7, #4
80030f8: 2200 movs r2, #0
80030fa: 601a str r2, [r3, #0]
80030fc: 605a str r2, [r3, #4]
80030fe: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
8003100: 4b35 ldr r3, [pc, #212] @ (80031d8 <MX_ADC1_Init+0xe8>)
8003102: 4a36 ldr r2, [pc, #216] @ (80031dc <MX_ADC1_Init+0xec>)
8003104: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
8003106: 4b34 ldr r3, [pc, #208] @ (80031d8 <MX_ADC1_Init+0xe8>)
8003108: f44f 7280 mov.w r2, #256 @ 0x100
800310c: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = ENABLE;
800310e: 4b32 ldr r3, [pc, #200] @ (80031d8 <MX_ADC1_Init+0xe8>)
8003110: 2201 movs r2, #1
8003112: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
8003114: 4b30 ldr r3, [pc, #192] @ (80031d8 <MX_ADC1_Init+0xe8>)
8003116: 2200 movs r2, #0
8003118: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
800311a: 4b2f ldr r3, [pc, #188] @ (80031d8 <MX_ADC1_Init+0xe8>)
800311c: f44f 2260 mov.w r2, #917504 @ 0xe0000
8003120: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
8003122: 4b2d ldr r3, [pc, #180] @ (80031d8 <MX_ADC1_Init+0xe8>)
8003124: 2200 movs r2, #0
8003126: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 5;
8003128: 4b2b ldr r3, [pc, #172] @ (80031d8 <MX_ADC1_Init+0xe8>)
800312a: 2205 movs r2, #5
800312c: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK) {
800312e: 482a ldr r0, [pc, #168] @ (80031d8 <MX_ADC1_Init+0xe8>)
8003130: f001 ffd8 bl 80050e4 <HAL_ADC_Init>
8003134: 4603 mov r3, r0
8003136: 2b00 cmp r3, #0
8003138: d001 beq.n 800313e <MX_ADC1_Init+0x4e>
Error_Handler();
800313a: f000 fa89 bl 8003650 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
800313e: 2304 movs r3, #4
8003140: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
8003142: 2301 movs r3, #1
8003144: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5;
8003146: 2303 movs r3, #3
8003148: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
800314a: 1d3b adds r3, r7, #4
800314c: 4619 mov r1, r3
800314e: 4822 ldr r0, [pc, #136] @ (80031d8 <MX_ADC1_Init+0xe8>)
8003150: f002 f99a bl 8005488 <HAL_ADC_ConfigChannel>
8003154: 4603 mov r3, r0
8003156: 2b00 cmp r3, #0
8003158: d001 beq.n 800315e <MX_ADC1_Init+0x6e>
Error_Handler();
800315a: f000 fa79 bl 8003650 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_5;
800315e: 2305 movs r3, #5
8003160: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_2;
8003162: 2302 movs r3, #2
8003164: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
8003166: 1d3b adds r3, r7, #4
8003168: 4619 mov r1, r3
800316a: 481b ldr r0, [pc, #108] @ (80031d8 <MX_ADC1_Init+0xe8>)
800316c: f002 f98c bl 8005488 <HAL_ADC_ConfigChannel>
8003170: 4603 mov r3, r0
8003172: 2b00 cmp r3, #0
8003174: d001 beq.n 800317a <MX_ADC1_Init+0x8a>
Error_Handler();
8003176: f000 fa6b bl 8003650 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_6;
800317a: 2306 movs r3, #6
800317c: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_3;
800317e: 2303 movs r3, #3
8003180: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
8003182: 1d3b adds r3, r7, #4
8003184: 4619 mov r1, r3
8003186: 4814 ldr r0, [pc, #80] @ (80031d8 <MX_ADC1_Init+0xe8>)
8003188: f002 f97e bl 8005488 <HAL_ADC_ConfigChannel>
800318c: 4603 mov r3, r0
800318e: 2b00 cmp r3, #0
8003190: d001 beq.n 8003196 <MX_ADC1_Init+0xa6>
Error_Handler();
8003192: f000 fa5d bl 8003650 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_7;
8003196: 2307 movs r3, #7
8003198: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_4;
800319a: 2304 movs r3, #4
800319c: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
800319e: 1d3b adds r3, r7, #4
80031a0: 4619 mov r1, r3
80031a2: 480d ldr r0, [pc, #52] @ (80031d8 <MX_ADC1_Init+0xe8>)
80031a4: f002 f970 bl 8005488 <HAL_ADC_ConfigChannel>
80031a8: 4603 mov r3, r0
80031aa: 2b00 cmp r3, #0
80031ac: d001 beq.n 80031b2 <MX_ADC1_Init+0xc2>
Error_Handler();
80031ae: f000 fa4f bl 8003650 <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
80031b2: 2308 movs r3, #8
80031b4: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_5;
80031b6: 2305 movs r3, #5
80031b8: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
80031ba: 1d3b adds r3, r7, #4
80031bc: 4619 mov r1, r3
80031be: 4806 ldr r0, [pc, #24] @ (80031d8 <MX_ADC1_Init+0xe8>)
80031c0: f002 f962 bl 8005488 <HAL_ADC_ConfigChannel>
80031c4: 4603 mov r3, r0
80031c6: 2b00 cmp r3, #0
80031c8: d001 beq.n 80031ce <MX_ADC1_Init+0xde>
Error_Handler();
80031ca: f000 fa41 bl 8003650 <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
80031ce: bf00 nop
80031d0: 3710 adds r7, #16
80031d2: 46bd mov sp, r7
80031d4: bd80 pop {r7, pc}
80031d6: bf00 nop
80031d8: 200002a4 .word 0x200002a4
80031dc: 40012400 .word 0x40012400
080031e0 <MX_TIM2_Init>:
/**
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void) {
80031e0: b580 push {r7, lr}
80031e2: b08e sub sp, #56 @ 0x38
80031e4: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
80031e6: f107 0328 add.w r3, r7, #40 @ 0x28
80031ea: 2200 movs r2, #0
80031ec: 601a str r2, [r3, #0]
80031ee: 605a str r2, [r3, #4]
80031f0: 609a str r2, [r3, #8]
80031f2: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = { 0 };
80031f4: f107 0320 add.w r3, r7, #32
80031f8: 2200 movs r2, #0
80031fa: 601a str r2, [r3, #0]
80031fc: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = { 0 };
80031fe: 1d3b adds r3, r7, #4
8003200: 2200 movs r2, #0
8003202: 601a str r2, [r3, #0]
8003204: 605a str r2, [r3, #4]
8003206: 609a str r2, [r3, #8]
8003208: 60da str r2, [r3, #12]
800320a: 611a str r2, [r3, #16]
800320c: 615a str r2, [r3, #20]
800320e: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8003210: 4b44 ldr r3, [pc, #272] @ (8003324 <MX_TIM2_Init+0x144>)
8003212: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8003216: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8003218: 4b42 ldr r3, [pc, #264] @ (8003324 <MX_TIM2_Init+0x144>)
800321a: 2200 movs r2, #0
800321c: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
800321e: 4b41 ldr r3, [pc, #260] @ (8003324 <MX_TIM2_Init+0x144>)
8003220: 2200 movs r2, #0
8003222: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
8003224: 4b3f ldr r3, [pc, #252] @ (8003324 <MX_TIM2_Init+0x144>)
8003226: f244 624f movw r2, #17999 @ 0x464f
800322a: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
800322c: 4b3d ldr r3, [pc, #244] @ (8003324 <MX_TIM2_Init+0x144>)
800322e: 2200 movs r2, #0
8003230: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8003232: 4b3c ldr r3, [pc, #240] @ (8003324 <MX_TIM2_Init+0x144>)
8003234: 2200 movs r2, #0
8003236: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK) {
8003238: 483a ldr r0, [pc, #232] @ (8003324 <MX_TIM2_Init+0x144>)
800323a: f005 fbfd bl 8008a38 <HAL_TIM_Base_Init>
800323e: 4603 mov r3, r0
8003240: 2b00 cmp r3, #0
8003242: d001 beq.n 8003248 <MX_TIM2_Init+0x68>
Error_Handler();
8003244: f000 fa04 bl 8003650 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8003248: f44f 5380 mov.w r3, #4096 @ 0x1000
800324c: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK) {
800324e: f107 0328 add.w r3, r7, #40 @ 0x28
8003252: 4619 mov r1, r3
8003254: 4833 ldr r0, [pc, #204] @ (8003324 <MX_TIM2_Init+0x144>)
8003256: f005 fe5f bl 8008f18 <HAL_TIM_ConfigClockSource>
800325a: 4603 mov r3, r0
800325c: 2b00 cmp r3, #0
800325e: d001 beq.n 8003264 <MX_TIM2_Init+0x84>
Error_Handler();
8003260: f000 f9f6 bl 8003650 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK) {
8003264: 482f ldr r0, [pc, #188] @ (8003324 <MX_TIM2_Init+0x144>)
8003266: f005 fc36 bl 8008ad6 <HAL_TIM_PWM_Init>
800326a: 4603 mov r3, r0
800326c: 2b00 cmp r3, #0
800326e: d001 beq.n 8003274 <MX_TIM2_Init+0x94>
Error_Handler();
8003270: f000 f9ee bl 8003650 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8003274: 2300 movs r3, #0
8003276: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8003278: 2300 movs r3, #0
800327a: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig)
800327c: f107 0320 add.w r3, r7, #32
8003280: 4619 mov r1, r3
8003282: 4828 ldr r0, [pc, #160] @ (8003324 <MX_TIM2_Init+0x144>)
8003284: f006 f9e8 bl 8009658 <HAL_TIMEx_MasterConfigSynchronization>
8003288: 4603 mov r3, r0
800328a: 2b00 cmp r3, #0
800328c: d001 beq.n 8003292 <MX_TIM2_Init+0xb2>
!= HAL_OK) {
Error_Handler();
800328e: f000 f9df bl 8003650 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8003292: 2360 movs r3, #96 @ 0x60
8003294: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
8003296: f44f 737a mov.w r3, #1000 @ 0x3e8
800329a: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
800329c: 2300 movs r3, #0
800329e: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80032a0: 2304 movs r3, #4
80032a2: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1)
80032a4: 1d3b adds r3, r7, #4
80032a6: 2200 movs r2, #0
80032a8: 4619 mov r1, r3
80032aa: 481e ldr r0, [pc, #120] @ (8003324 <MX_TIM2_Init+0x144>)
80032ac: f005 fd72 bl 8008d94 <HAL_TIM_PWM_ConfigChannel>
80032b0: 4603 mov r3, r0
80032b2: 2b00 cmp r3, #0
80032b4: d001 beq.n 80032ba <MX_TIM2_Init+0xda>
!= HAL_OK) {
Error_Handler();
80032b6: f000 f9cb bl 8003650 <Error_Handler>
}
sConfigOC.Pulse = 2000;
80032ba: f44f 63fa mov.w r3, #2000 @ 0x7d0
80032be: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2)
80032c0: 1d3b adds r3, r7, #4
80032c2: 2204 movs r2, #4
80032c4: 4619 mov r1, r3
80032c6: 4817 ldr r0, [pc, #92] @ (8003324 <MX_TIM2_Init+0x144>)
80032c8: f005 fd64 bl 8008d94 <HAL_TIM_PWM_ConfigChannel>
80032cc: 4603 mov r3, r0
80032ce: 2b00 cmp r3, #0
80032d0: d001 beq.n 80032d6 <MX_TIM2_Init+0xf6>
!= HAL_OK) {
Error_Handler();
80032d2: f000 f9bd bl 8003650 <Error_Handler>
}
sConfigOC.Pulse = 3000;
80032d6: f640 33b8 movw r3, #3000 @ 0xbb8
80032da: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
80032dc: 2300 movs r3, #0
80032de: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3)
80032e0: 1d3b adds r3, r7, #4
80032e2: 2208 movs r2, #8
80032e4: 4619 mov r1, r3
80032e6: 480f ldr r0, [pc, #60] @ (8003324 <MX_TIM2_Init+0x144>)
80032e8: f005 fd54 bl 8008d94 <HAL_TIM_PWM_ConfigChannel>
80032ec: 4603 mov r3, r0
80032ee: 2b00 cmp r3, #0
80032f0: d001 beq.n 80032f6 <MX_TIM2_Init+0x116>
!= HAL_OK) {
Error_Handler();
80032f2: f000 f9ad bl 8003650 <Error_Handler>
}
sConfigOC.Pulse = 4000;
80032f6: f44f 637a mov.w r3, #4000 @ 0xfa0
80032fa: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80032fc: 2304 movs r3, #4
80032fe: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4)
8003300: 1d3b adds r3, r7, #4
8003302: 220c movs r2, #12
8003304: 4619 mov r1, r3
8003306: 4807 ldr r0, [pc, #28] @ (8003324 <MX_TIM2_Init+0x144>)
8003308: f005 fd44 bl 8008d94 <HAL_TIM_PWM_ConfigChannel>
800330c: 4603 mov r3, r0
800330e: 2b00 cmp r3, #0
8003310: d001 beq.n 8003316 <MX_TIM2_Init+0x136>
!= HAL_OK) {
Error_Handler();
8003312: f000 f99d bl 8003650 <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
8003316: 4803 ldr r0, [pc, #12] @ (8003324 <MX_TIM2_Init+0x144>)
8003318: f001 fd3e bl 8004d98 <HAL_TIM_MspPostInit>
}
800331c: bf00 nop
800331e: 3738 adds r7, #56 @ 0x38
8003320: 46bd mov sp, r7
8003322: bd80 pop {r7, pc}
8003324: 20000318 .word 0x20000318
08003328 <MX_TIM4_Init>:
/**
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void) {
8003328: b580 push {r7, lr}
800332a: b08e sub sp, #56 @ 0x38
800332c: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = { 0 };
800332e: f107 0328 add.w r3, r7, #40 @ 0x28
8003332: 2200 movs r2, #0
8003334: 601a str r2, [r3, #0]
8003336: 605a str r2, [r3, #4]
8003338: 609a str r2, [r3, #8]
800333a: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = { 0 };
800333c: f107 0320 add.w r3, r7, #32
8003340: 2200 movs r2, #0
8003342: 601a str r2, [r3, #0]
8003344: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = { 0 };
8003346: 1d3b adds r3, r7, #4
8003348: 2200 movs r2, #0
800334a: 601a str r2, [r3, #0]
800334c: 605a str r2, [r3, #4]
800334e: 609a str r2, [r3, #8]
8003350: 60da str r2, [r3, #12]
8003352: 611a str r2, [r3, #16]
8003354: 615a str r2, [r3, #20]
8003356: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
8003358: 4b42 ldr r3, [pc, #264] @ (8003464 <MX_TIM4_Init+0x13c>)
800335a: 4a43 ldr r2, [pc, #268] @ (8003468 <MX_TIM4_Init+0x140>)
800335c: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
800335e: 4b41 ldr r3, [pc, #260] @ (8003464 <MX_TIM4_Init+0x13c>)
8003360: 2200 movs r2, #0
8003362: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
8003364: 4b3f ldr r3, [pc, #252] @ (8003464 <MX_TIM4_Init+0x13c>)
8003366: 2200 movs r2, #0
8003368: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
800336a: 4b3e ldr r3, [pc, #248] @ (8003464 <MX_TIM4_Init+0x13c>)
800336c: f244 624f movw r2, #17999 @ 0x464f
8003370: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8003372: 4b3c ldr r3, [pc, #240] @ (8003464 <MX_TIM4_Init+0x13c>)
8003374: 2200 movs r2, #0
8003376: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8003378: 4b3a ldr r3, [pc, #232] @ (8003464 <MX_TIM4_Init+0x13c>)
800337a: 2200 movs r2, #0
800337c: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK) {
800337e: 4839 ldr r0, [pc, #228] @ (8003464 <MX_TIM4_Init+0x13c>)
8003380: f005 fb5a bl 8008a38 <HAL_TIM_Base_Init>
8003384: 4603 mov r3, r0
8003386: 2b00 cmp r3, #0
8003388: d001 beq.n 800338e <MX_TIM4_Init+0x66>
Error_Handler();
800338a: f000 f961 bl 8003650 <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
800338e: f44f 5380 mov.w r3, #4096 @ 0x1000
8003392: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK) {
8003394: f107 0328 add.w r3, r7, #40 @ 0x28
8003398: 4619 mov r1, r3
800339a: 4832 ldr r0, [pc, #200] @ (8003464 <MX_TIM4_Init+0x13c>)
800339c: f005 fdbc bl 8008f18 <HAL_TIM_ConfigClockSource>
80033a0: 4603 mov r3, r0
80033a2: 2b00 cmp r3, #0
80033a4: d001 beq.n 80033aa <MX_TIM4_Init+0x82>
Error_Handler();
80033a6: f000 f953 bl 8003650 <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK) {
80033aa: 482e ldr r0, [pc, #184] @ (8003464 <MX_TIM4_Init+0x13c>)
80033ac: f005 fb93 bl 8008ad6 <HAL_TIM_PWM_Init>
80033b0: 4603 mov r3, r0
80033b2: 2b00 cmp r3, #0
80033b4: d001 beq.n 80033ba <MX_TIM4_Init+0x92>
Error_Handler();
80033b6: f000 f94b bl 8003650 <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80033ba: 2300 movs r3, #0
80033bc: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80033be: 2300 movs r3, #0
80033c0: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig)
80033c2: f107 0320 add.w r3, r7, #32
80033c6: 4619 mov r1, r3
80033c8: 4826 ldr r0, [pc, #152] @ (8003464 <MX_TIM4_Init+0x13c>)
80033ca: f006 f945 bl 8009658 <HAL_TIMEx_MasterConfigSynchronization>
80033ce: 4603 mov r3, r0
80033d0: 2b00 cmp r3, #0
80033d2: d001 beq.n 80033d8 <MX_TIM4_Init+0xb0>
!= HAL_OK) {
Error_Handler();
80033d4: f000 f93c bl 8003650 <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
80033d8: 2360 movs r3, #96 @ 0x60
80033da: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
80033dc: f241 3388 movw r3, #5000 @ 0x1388
80033e0: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
80033e2: 2300 movs r3, #0
80033e4: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80033e6: 2304 movs r3, #4
80033e8: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1)
80033ea: 1d3b adds r3, r7, #4
80033ec: 2200 movs r2, #0
80033ee: 4619 mov r1, r3
80033f0: 481c ldr r0, [pc, #112] @ (8003464 <MX_TIM4_Init+0x13c>)
80033f2: f005 fccf bl 8008d94 <HAL_TIM_PWM_ConfigChannel>
80033f6: 4603 mov r3, r0
80033f8: 2b00 cmp r3, #0
80033fa: d001 beq.n 8003400 <MX_TIM4_Init+0xd8>
!= HAL_OK) {
Error_Handler();
80033fc: f000 f928 bl 8003650 <Error_Handler>
}
sConfigOC.Pulse = 6000;
8003400: f241 7370 movw r3, #6000 @ 0x1770
8003404: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2)
8003406: 1d3b adds r3, r7, #4
8003408: 2204 movs r2, #4
800340a: 4619 mov r1, r3
800340c: 4815 ldr r0, [pc, #84] @ (8003464 <MX_TIM4_Init+0x13c>)
800340e: f005 fcc1 bl 8008d94 <HAL_TIM_PWM_ConfigChannel>
8003412: 4603 mov r3, r0
8003414: 2b00 cmp r3, #0
8003416: d001 beq.n 800341c <MX_TIM4_Init+0xf4>
!= HAL_OK) {
Error_Handler();
8003418: f000 f91a bl 8003650 <Error_Handler>
}
sConfigOC.Pulse = 7000;
800341c: f641 3358 movw r3, #7000 @ 0x1b58
8003420: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3)
8003422: 1d3b adds r3, r7, #4
8003424: 2208 movs r2, #8
8003426: 4619 mov r1, r3
8003428: 480e ldr r0, [pc, #56] @ (8003464 <MX_TIM4_Init+0x13c>)
800342a: f005 fcb3 bl 8008d94 <HAL_TIM_PWM_ConfigChannel>
800342e: 4603 mov r3, r0
8003430: 2b00 cmp r3, #0
8003432: d001 beq.n 8003438 <MX_TIM4_Init+0x110>
!= HAL_OK) {
Error_Handler();
8003434: f000 f90c bl 8003650 <Error_Handler>
}
sConfigOC.Pulse = 8000;
8003438: f44f 53fa mov.w r3, #8000 @ 0x1f40
800343c: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4)
800343e: 1d3b adds r3, r7, #4
8003440: 220c movs r2, #12
8003442: 4619 mov r1, r3
8003444: 4807 ldr r0, [pc, #28] @ (8003464 <MX_TIM4_Init+0x13c>)
8003446: f005 fca5 bl 8008d94 <HAL_TIM_PWM_ConfigChannel>
800344a: 4603 mov r3, r0
800344c: 2b00 cmp r3, #0
800344e: d001 beq.n 8003454 <MX_TIM4_Init+0x12c>
!= HAL_OK) {
Error_Handler();
8003450: f000 f8fe bl 8003650 <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
8003454: 4803 ldr r0, [pc, #12] @ (8003464 <MX_TIM4_Init+0x13c>)
8003456: f001 fc9f bl 8004d98 <HAL_TIM_MspPostInit>
}
800345a: bf00 nop
800345c: 3738 adds r7, #56 @ 0x38
800345e: 46bd mov sp, r7
8003460: bd80 pop {r7, pc}
8003462: bf00 nop
8003464: 20000360 .word 0x20000360
8003468: 40000800 .word 0x40000800
0800346c <MX_USART1_UART_Init>:
/**
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void) {
800346c: b580 push {r7, lr}
800346e: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
8003470: 4b11 ldr r3, [pc, #68] @ (80034b8 <MX_USART1_UART_Init+0x4c>)
8003472: 4a12 ldr r2, [pc, #72] @ (80034bc <MX_USART1_UART_Init+0x50>)
8003474: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
8003476: 4b10 ldr r3, [pc, #64] @ (80034b8 <MX_USART1_UART_Init+0x4c>)
8003478: f44f 32e1 mov.w r2, #115200 @ 0x1c200
800347c: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
800347e: 4b0e ldr r3, [pc, #56] @ (80034b8 <MX_USART1_UART_Init+0x4c>)
8003480: 2200 movs r2, #0
8003482: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8003484: 4b0c ldr r3, [pc, #48] @ (80034b8 <MX_USART1_UART_Init+0x4c>)
8003486: 2200 movs r2, #0
8003488: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
800348a: 4b0b ldr r3, [pc, #44] @ (80034b8 <MX_USART1_UART_Init+0x4c>)
800348c: 2200 movs r2, #0
800348e: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8003490: 4b09 ldr r3, [pc, #36] @ (80034b8 <MX_USART1_UART_Init+0x4c>)
8003492: 220c movs r2, #12
8003494: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8003496: 4b08 ldr r3, [pc, #32] @ (80034b8 <MX_USART1_UART_Init+0x4c>)
8003498: 2200 movs r2, #0
800349a: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
800349c: 4b06 ldr r3, [pc, #24] @ (80034b8 <MX_USART1_UART_Init+0x4c>)
800349e: 2200 movs r2, #0
80034a0: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK) {
80034a2: 4805 ldr r0, [pc, #20] @ (80034b8 <MX_USART1_UART_Init+0x4c>)
80034a4: f006 f936 bl 8009714 <HAL_UART_Init>
80034a8: 4603 mov r3, r0
80034aa: 2b00 cmp r3, #0
80034ac: d001 beq.n 80034b2 <MX_USART1_UART_Init+0x46>
Error_Handler();
80034ae: f000 f8cf bl 8003650 <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
80034b2: bf00 nop
80034b4: bd80 pop {r7, pc}
80034b6: bf00 nop
80034b8: 200003a8 .word 0x200003a8
80034bc: 40013800 .word 0x40013800
080034c0 <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void) {
80034c0: b580 push {r7, lr}
80034c2: b082 sub sp, #8
80034c4: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
80034c6: 4b0c ldr r3, [pc, #48] @ (80034f8 <MX_DMA_Init+0x38>)
80034c8: 695b ldr r3, [r3, #20]
80034ca: 4a0b ldr r2, [pc, #44] @ (80034f8 <MX_DMA_Init+0x38>)
80034cc: f043 0301 orr.w r3, r3, #1
80034d0: 6153 str r3, [r2, #20]
80034d2: 4b09 ldr r3, [pc, #36] @ (80034f8 <MX_DMA_Init+0x38>)
80034d4: 695b ldr r3, [r3, #20]
80034d6: f003 0301 and.w r3, r3, #1
80034da: 607b str r3, [r7, #4]
80034dc: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
80034de: 2200 movs r2, #0
80034e0: 2100 movs r1, #0
80034e2: 200b movs r0, #11
80034e4: f002 faa1 bl 8005a2a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
80034e8: 200b movs r0, #11
80034ea: f002 faba bl 8005a62 <HAL_NVIC_EnableIRQ>
}
80034ee: bf00 nop
80034f0: 3708 adds r7, #8
80034f2: 46bd mov sp, r7
80034f4: bd80 pop {r7, pc}
80034f6: bf00 nop
80034f8: 40021000 .word 0x40021000
080034fc <MX_GPIO_Init>:
/**
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void) {
80034fc: b580 push {r7, lr}
80034fe: b088 sub sp, #32
8003500: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = { 0 };
8003502: f107 0310 add.w r3, r7, #16
8003506: 2200 movs r2, #0
8003508: 601a str r2, [r3, #0]
800350a: 605a str r2, [r3, #4]
800350c: 609a str r2, [r3, #8]
800350e: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
8003510: 4b4b ldr r3, [pc, #300] @ (8003640 <MX_GPIO_Init+0x144>)
8003512: 699b ldr r3, [r3, #24]
8003514: 4a4a ldr r2, [pc, #296] @ (8003640 <MX_GPIO_Init+0x144>)
8003516: f043 0310 orr.w r3, r3, #16
800351a: 6193 str r3, [r2, #24]
800351c: 4b48 ldr r3, [pc, #288] @ (8003640 <MX_GPIO_Init+0x144>)
800351e: 699b ldr r3, [r3, #24]
8003520: f003 0310 and.w r3, r3, #16
8003524: 60fb str r3, [r7, #12]
8003526: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
8003528: 4b45 ldr r3, [pc, #276] @ (8003640 <MX_GPIO_Init+0x144>)
800352a: 699b ldr r3, [r3, #24]
800352c: 4a44 ldr r2, [pc, #272] @ (8003640 <MX_GPIO_Init+0x144>)
800352e: f043 0320 orr.w r3, r3, #32
8003532: 6193 str r3, [r2, #24]
8003534: 4b42 ldr r3, [pc, #264] @ (8003640 <MX_GPIO_Init+0x144>)
8003536: 699b ldr r3, [r3, #24]
8003538: f003 0320 and.w r3, r3, #32
800353c: 60bb str r3, [r7, #8]
800353e: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
8003540: 4b3f ldr r3, [pc, #252] @ (8003640 <MX_GPIO_Init+0x144>)
8003542: 699b ldr r3, [r3, #24]
8003544: 4a3e ldr r2, [pc, #248] @ (8003640 <MX_GPIO_Init+0x144>)
8003546: f043 0304 orr.w r3, r3, #4
800354a: 6193 str r3, [r2, #24]
800354c: 4b3c ldr r3, [pc, #240] @ (8003640 <MX_GPIO_Init+0x144>)
800354e: 699b ldr r3, [r3, #24]
8003550: f003 0304 and.w r3, r3, #4
8003554: 607b str r3, [r7, #4]
8003556: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
8003558: 4b39 ldr r3, [pc, #228] @ (8003640 <MX_GPIO_Init+0x144>)
800355a: 699b ldr r3, [r3, #24]
800355c: 4a38 ldr r2, [pc, #224] @ (8003640 <MX_GPIO_Init+0x144>)
800355e: f043 0308 orr.w r3, r3, #8
8003562: 6193 str r3, [r2, #24]
8003564: 4b36 ldr r3, [pc, #216] @ (8003640 <MX_GPIO_Init+0x144>)
8003566: 699b ldr r3, [r3, #24]
8003568: f003 0308 and.w r3, r3, #8
800356c: 603b str r3, [r7, #0]
800356e: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8003570: 2200 movs r2, #0
8003572: f44f 5100 mov.w r1, #8192 @ 0x2000
8003576: 4833 ldr r0, [pc, #204] @ (8003644 <MX_GPIO_Init+0x148>)
8003578: f003 f81d bl 80065b6 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB,
800357c: 2200 movs r2, #0
800357e: f640 413e movw r1, #3134 @ 0xc3e
8003582: 4831 ldr r0, [pc, #196] @ (8003648 <MX_GPIO_Init+0x14c>)
8003584: f003 f817 bl 80065b6 <HAL_GPIO_WritePin>
INH1_Pin | INH2_Pin | INH3_Pin | INH4_Pin | EXP1_Pin | EXP2_Pin
| EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin | LED1_Pin, GPIO_PIN_RESET);
8003588: 2200 movs r2, #0
800358a: f44f 4101 mov.w r1, #33024 @ 0x8100
800358e: 482f ldr r0, [pc, #188] @ (800364c <MX_GPIO_Init+0x150>)
8003590: f003 f811 bl 80065b6 <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
8003594: f44f 5300 mov.w r3, #8192 @ 0x2000
8003598: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800359a: 2301 movs r3, #1
800359c: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800359e: 2300 movs r3, #0
80035a0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80035a2: 2302 movs r3, #2
80035a4: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
80035a6: f107 0310 add.w r3, r7, #16
80035aa: 4619 mov r1, r3
80035ac: 4825 ldr r0, [pc, #148] @ (8003644 <MX_GPIO_Init+0x148>)
80035ae: f002 fe67 bl 8006280 <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin | P2_Pin;
80035b2: f44f 4340 mov.w r3, #49152 @ 0xc000
80035b6: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
80035b8: 2300 movs r3, #0
80035ba: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80035bc: 2300 movs r3, #0
80035be: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
80035c0: f107 0310 add.w r3, r7, #16
80035c4: 4619 mov r1, r3
80035c6: 481f ldr r0, [pc, #124] @ (8003644 <MX_GPIO_Init+0x148>)
80035c8: f002 fe5a bl 8006280 <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
80035cc: 2310 movs r3, #16
80035ce: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
80035d0: 2303 movs r3, #3
80035d2: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
80035d4: f107 0310 add.w r3, r7, #16
80035d8: 4619 mov r1, r3
80035da: 481c ldr r0, [pc, #112] @ (800364c <MX_GPIO_Init+0x150>)
80035dc: f002 fe50 bl 8006280 <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin | INH2_Pin | INH3_Pin | INH4_Pin | EXP1_Pin
80035e0: f640 433e movw r3, #3134 @ 0xc3e
80035e4: 613b str r3, [r7, #16]
| EXP2_Pin | EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
80035e6: 2301 movs r3, #1
80035e8: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
80035ea: 2300 movs r3, #0
80035ec: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80035ee: 2302 movs r3, #2
80035f0: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80035f2: f107 0310 add.w r3, r7, #16
80035f6: 4619 mov r1, r3
80035f8: 4813 ldr r0, [pc, #76] @ (8003648 <MX_GPIO_Init+0x14c>)
80035fa: f002 fe41 bl 8006280 <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin | CH2_Pin | CH3_Pin | CH4_Pin;
80035fe: f44f 4370 mov.w r3, #61440 @ 0xf000
8003602: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8003604: 2300 movs r3, #0
8003606: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003608: 2300 movs r3, #0
800360a: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
800360c: f107 0310 add.w r3, r7, #16
8003610: 4619 mov r1, r3
8003612: 480d ldr r0, [pc, #52] @ (8003648 <MX_GPIO_Init+0x14c>)
8003614: f002 fe34 bl 8006280 <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin | LED1_Pin;
8003618: f44f 4301 mov.w r3, #33024 @ 0x8100
800361c: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800361e: 2301 movs r3, #1
8003620: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003622: 2300 movs r3, #0
8003624: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8003626: 2302 movs r3, #2
8003628: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800362a: f107 0310 add.w r3, r7, #16
800362e: 4619 mov r1, r3
8003630: 4806 ldr r0, [pc, #24] @ (800364c <MX_GPIO_Init+0x150>)
8003632: f002 fe25 bl 8006280 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
8003636: bf00 nop
8003638: 3720 adds r7, #32
800363a: 46bd mov sp, r7
800363c: bd80 pop {r7, pc}
800363e: bf00 nop
8003640: 40021000 .word 0x40021000
8003644: 40011000 .word 0x40011000
8003648: 40010c00 .word 0x40010c00
800364c: 40010800 .word 0x40010800
08003650 <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void) {
8003650: b480 push {r7}
8003652: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8003654: b672 cpsid i
}
8003656: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1) {
8003658: bf00 nop
800365a: e7fd b.n 8003658 <Error_Handler+0x8>
0800365c <m1ap>:
extern uint16_t mrampstart[4];
extern uint16_t tramp;
extern UART_HandleTypeDef huart1;
motMov_st m1ap(void){
800365c: b580 push {r7, lr}
800365e: b09c sub sp, #112 @ 0x70
8003660: af02 add r7, sp, #8
static motMov_st m1st=motWaiting;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
8003662: 4b5d ldr r3, [pc, #372] @ (80037d8 <m1ap+0x17c>)
8003664: 781a ldrb r2, [r3, #0]
8003666: 4b5d ldr r3, [pc, #372] @ (80037dc <m1ap+0x180>)
8003668: 781b ldrb r3, [r3, #0]
800366a: 429a cmp r2, r3
800366c: d017 beq.n 800369e <m1ap+0x42>
memm1st=m1st;
800366e: 4b5b ldr r3, [pc, #364] @ (80037dc <m1ap+0x180>)
8003670: 781a ldrb r2, [r3, #0]
8003672: 4b59 ldr r3, [pc, #356] @ (80037d8 <m1ap+0x17c>)
8003674: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ap=%d",m1st);
8003676: 4b59 ldr r3, [pc, #356] @ (80037dc <m1ap+0x180>)
8003678: 781b ldrb r3, [r3, #0]
800367a: 461a mov r2, r3
800367c: 1d3b adds r3, r7, #4
800367e: 4958 ldr r1, [pc, #352] @ (80037e0 <m1ap+0x184>)
8003680: 4618 mov r0, r3
8003682: f00a fe87 bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003686: 1d3b adds r3, r7, #4
8003688: 4618 mov r0, r3
800368a: f7fc fd5f bl 800014c <strlen>
800368e: 4603 mov r3, r0
8003690: b29a uxth r2, r3
8003692: 1d39 adds r1, r7, #4
8003694: f04f 33ff mov.w r3, #4294967295
8003698: 4852 ldr r0, [pc, #328] @ (80037e4 <m1ap+0x188>)
800369a: f006 f88b bl 80097b4 <HAL_UART_Transmit>
}
if(rtCiclo<apM1start)m1st=motWaiting;
800369e: 4b52 ldr r3, [pc, #328] @ (80037e8 <m1ap+0x18c>)
80036a0: 881b ldrh r3, [r3, #0]
80036a2: b29a uxth r2, r3
80036a4: 4b51 ldr r3, [pc, #324] @ (80037ec <m1ap+0x190>)
80036a6: 881b ldrh r3, [r3, #0]
80036a8: 429a cmp r2, r3
80036aa: d202 bcs.n 80036b2 <m1ap+0x56>
80036ac: 4b4b ldr r3, [pc, #300] @ (80037dc <m1ap+0x180>)
80036ae: 2200 movs r2, #0
80036b0: 701a strb r2, [r3, #0]
switch(m1st){
80036b2: 4b4a ldr r3, [pc, #296] @ (80037dc <m1ap+0x180>)
80036b4: 781b ldrb r3, [r3, #0]
80036b6: 2b03 cmp r3, #3
80036b8: d876 bhi.n 80037a8 <m1ap+0x14c>
80036ba: a201 add r2, pc, #4 @ (adr r2, 80036c0 <m1ap+0x64>)
80036bc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80036c0: 080036d1 .word 0x080036d1
80036c4: 0800371d .word 0x0800371d
80036c8: 0800374d .word 0x0800374d
80036cc: 0800377f .word 0x0800377f
case motWaiting:
SetMotPerc(M1,FW,0);
80036d0: 2200 movs r2, #0
80036d2: 2100 movs r1, #0
80036d4: 2001 movs r0, #1
80036d6: f001 f83f bl 8004758 <SetMotPerc>
SetMotPerc(M1,BW,0);
80036da: 2200 movs r2, #0
80036dc: 2101 movs r1, #1
80036de: 2001 movs r0, #1
80036e0: f001 f83a bl 8004758 <SetMotPerc>
if(rtCiclo>=apM1start){
80036e4: 4b40 ldr r3, [pc, #256] @ (80037e8 <m1ap+0x18c>)
80036e6: 881b ldrh r3, [r3, #0]
80036e8: b29a uxth r2, r3
80036ea: 4b40 ldr r3, [pc, #256] @ (80037ec <m1ap+0x190>)
80036ec: 881b ldrh r3, [r3, #0]
80036ee: 429a cmp r2, r3
80036f0: d365 bcc.n 80037be <m1ap+0x162>
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT);
80036f2: 4b3f ldr r3, [pc, #252] @ (80037f0 <m1ap+0x194>)
80036f4: 881b ldrh r3, [r3, #0]
80036f6: b2da uxtb r2, r3
80036f8: 4b3e ldr r3, [pc, #248] @ (80037f4 <m1ap+0x198>)
80036fa: 881b ldrh r3, [r3, #0]
80036fc: b2d9 uxtb r1, r3
80036fe: 4b3e ldr r3, [pc, #248] @ (80037f8 <m1ap+0x19c>)
8003700: 881b ldrh r3, [r3, #0]
8003702: b2db uxtb r3, r3
8003704: 2000 movs r0, #0
8003706: 9001 str r0, [sp, #4]
8003708: 9300 str r3, [sp, #0]
800370a: 460b mov r3, r1
800370c: 2100 movs r1, #0
800370e: 2001 movs r0, #1
8003710: f001 f9a2 bl 8004a58 <ramp>
m1st=motStartRamp;
8003714: 4b31 ldr r3, [pc, #196] @ (80037dc <m1ap+0x180>)
8003716: 2201 movs r2, #1
8003718: 701a strb r2, [r3, #0]
}
break;
800371a: e050 b.n 80037be <m1ap+0x162>
case motStartRamp:
if(ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){
800371c: 4b34 ldr r3, [pc, #208] @ (80037f0 <m1ap+0x194>)
800371e: 881b ldrh r3, [r3, #0]
8003720: b2da uxtb r2, r3
8003722: 4b34 ldr r3, [pc, #208] @ (80037f4 <m1ap+0x198>)
8003724: 881b ldrh r3, [r3, #0]
8003726: b2d9 uxtb r1, r3
8003728: 4b33 ldr r3, [pc, #204] @ (80037f8 <m1ap+0x19c>)
800372a: 881b ldrh r3, [r3, #0]
800372c: b2db uxtb r3, r3
800372e: 200a movs r0, #10
8003730: 9001 str r0, [sp, #4]
8003732: 9300 str r3, [sp, #0]
8003734: 460b mov r3, r1
8003736: 2100 movs r1, #0
8003738: 2001 movs r0, #1
800373a: f001 f98d bl 8004a58 <ramp>
800373e: 4603 mov r3, r0
8003740: 2b00 cmp r3, #0
8003742: d13e bne.n 80037c2 <m1ap+0x166>
m1st=motWaitingTime;
8003744: 4b25 ldr r3, [pc, #148] @ (80037dc <m1ap+0x180>)
8003746: 2202 movs r2, #2
8003748: 701a strb r2, [r3, #0]
}
break;
800374a: e03a b.n 80037c2 <m1ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM1stop){
800374c: 4b26 ldr r3, [pc, #152] @ (80037e8 <m1ap+0x18c>)
800374e: 881b ldrh r3, [r3, #0]
8003750: b29a uxth r2, r3
8003752: 4b2a ldr r3, [pc, #168] @ (80037fc <m1ap+0x1a0>)
8003754: 881b ldrh r3, [r3, #0]
8003756: 429a cmp r2, r3
8003758: d335 bcc.n 80037c6 <m1ap+0x16a>
(void)ramp(M1,FW,m1pwmap,0,tramp,RAMPINIT);
800375a: 4b26 ldr r3, [pc, #152] @ (80037f4 <m1ap+0x198>)
800375c: 881b ldrh r3, [r3, #0]
800375e: b2da uxtb r2, r3
8003760: 4b25 ldr r3, [pc, #148] @ (80037f8 <m1ap+0x19c>)
8003762: 881b ldrh r3, [r3, #0]
8003764: b2db uxtb r3, r3
8003766: 2100 movs r1, #0
8003768: 9101 str r1, [sp, #4]
800376a: 9300 str r3, [sp, #0]
800376c: 2300 movs r3, #0
800376e: 2100 movs r1, #0
8003770: 2001 movs r0, #1
8003772: f001 f971 bl 8004a58 <ramp>
m1st=motStopRamp;
8003776: 4b19 ldr r3, [pc, #100] @ (80037dc <m1ap+0x180>)
8003778: 2203 movs r2, #3
800377a: 701a strb r2, [r3, #0]
}
break;
800377c: e023 b.n 80037c6 <m1ap+0x16a>
case motStopRamp:
if(ramp(M1,FW,m1pwmap,0,tramp,RAMPRUN)==DONE){
800377e: 4b1d ldr r3, [pc, #116] @ (80037f4 <m1ap+0x198>)
8003780: 881b ldrh r3, [r3, #0]
8003782: b2da uxtb r2, r3
8003784: 4b1c ldr r3, [pc, #112] @ (80037f8 <m1ap+0x19c>)
8003786: 881b ldrh r3, [r3, #0]
8003788: b2db uxtb r3, r3
800378a: 210a movs r1, #10
800378c: 9101 str r1, [sp, #4]
800378e: 9300 str r3, [sp, #0]
8003790: 2300 movs r3, #0
8003792: 2100 movs r1, #0
8003794: 2001 movs r0, #1
8003796: f001 f95f bl 8004a58 <ramp>
800379a: 4603 mov r3, r0
800379c: 2b00 cmp r3, #0
800379e: d114 bne.n 80037ca <m1ap+0x16e>
m1st=motStop;
80037a0: 4b0e ldr r3, [pc, #56] @ (80037dc <m1ap+0x180>)
80037a2: 2204 movs r2, #4
80037a4: 701a strb r2, [r3, #0]
}
break;
80037a6: e010 b.n 80037ca <m1ap+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
80037a8: 2200 movs r2, #0
80037aa: 2100 movs r1, #0
80037ac: 2001 movs r0, #1
80037ae: f000 ffd3 bl 8004758 <SetMotPerc>
SetMotPerc(M1,BW,0);
80037b2: 2200 movs r2, #0
80037b4: 2101 movs r1, #1
80037b6: 2001 movs r0, #1
80037b8: f000 ffce bl 8004758 <SetMotPerc>
break;
80037bc: e006 b.n 80037cc <m1ap+0x170>
break;
80037be: bf00 nop
80037c0: e004 b.n 80037cc <m1ap+0x170>
break;
80037c2: bf00 nop
80037c4: e002 b.n 80037cc <m1ap+0x170>
break;
80037c6: bf00 nop
80037c8: e000 b.n 80037cc <m1ap+0x170>
break;
80037ca: bf00 nop
}
return m1st;
80037cc: 4b03 ldr r3, [pc, #12] @ (80037dc <m1ap+0x180>)
80037ce: 781b ldrb r3, [r3, #0]
}
80037d0: 4618 mov r0, r3
80037d2: 3768 adds r7, #104 @ 0x68
80037d4: 46bd mov sp, r7
80037d6: bd80 pop {r7, pc}
80037d8: 20000007 .word 0x20000007
80037dc: 20000462 .word 0x20000462
80037e0: 0800f2f0 .word 0x0800f2f0
80037e4: 200003a8 .word 0x200003a8
80037e8: 200003fc .word 0x200003fc
80037ec: 20000428 .word 0x20000428
80037f0: 2000044c .word 0x2000044c
80037f4: 20000400 .word 0x20000400
80037f8: 20000418 .word 0x20000418
80037fc: 2000042a .word 0x2000042a
08003800 <m2ap>:
motMov_st m2ap(void){
8003800: b580 push {r7, lr}
8003802: b09c sub sp, #112 @ 0x70
8003804: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
8003806: 4b5d ldr r3, [pc, #372] @ (800397c <m2ap+0x17c>)
8003808: 781a ldrb r2, [r3, #0]
800380a: 4b5d ldr r3, [pc, #372] @ (8003980 <m2ap+0x180>)
800380c: 781b ldrb r3, [r3, #0]
800380e: 429a cmp r2, r3
8003810: d017 beq.n 8003842 <m2ap+0x42>
memm2st=m2st;
8003812: 4b5b ldr r3, [pc, #364] @ (8003980 <m2ap+0x180>)
8003814: 781a ldrb r2, [r3, #0]
8003816: 4b59 ldr r3, [pc, #356] @ (800397c <m2ap+0x17c>)
8003818: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ap=%d",m2st);
800381a: 4b59 ldr r3, [pc, #356] @ (8003980 <m2ap+0x180>)
800381c: 781b ldrb r3, [r3, #0]
800381e: 461a mov r2, r3
8003820: 1d3b adds r3, r7, #4
8003822: 4958 ldr r1, [pc, #352] @ (8003984 <m2ap+0x184>)
8003824: 4618 mov r0, r3
8003826: f00a fdb5 bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800382a: 1d3b adds r3, r7, #4
800382c: 4618 mov r0, r3
800382e: f7fc fc8d bl 800014c <strlen>
8003832: 4603 mov r3, r0
8003834: b29a uxth r2, r3
8003836: 1d39 adds r1, r7, #4
8003838: f04f 33ff mov.w r3, #4294967295
800383c: 4852 ldr r0, [pc, #328] @ (8003988 <m2ap+0x188>)
800383e: f005 ffb9 bl 80097b4 <HAL_UART_Transmit>
}
if(rtCiclo<apM2start)m2st=motWaiting;
8003842: 4b52 ldr r3, [pc, #328] @ (800398c <m2ap+0x18c>)
8003844: 881b ldrh r3, [r3, #0]
8003846: b29a uxth r2, r3
8003848: 4b51 ldr r3, [pc, #324] @ (8003990 <m2ap+0x190>)
800384a: 881b ldrh r3, [r3, #0]
800384c: 429a cmp r2, r3
800384e: d202 bcs.n 8003856 <m2ap+0x56>
8003850: 4b4b ldr r3, [pc, #300] @ (8003980 <m2ap+0x180>)
8003852: 2200 movs r2, #0
8003854: 701a strb r2, [r3, #0]
switch(m2st){
8003856: 4b4a ldr r3, [pc, #296] @ (8003980 <m2ap+0x180>)
8003858: 781b ldrb r3, [r3, #0]
800385a: 2b03 cmp r3, #3
800385c: d876 bhi.n 800394c <m2ap+0x14c>
800385e: a201 add r2, pc, #4 @ (adr r2, 8003864 <m2ap+0x64>)
8003860: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003864: 08003875 .word 0x08003875
8003868: 080038c1 .word 0x080038c1
800386c: 080038f1 .word 0x080038f1
8003870: 08003923 .word 0x08003923
case motWaiting:
SetMotPerc(M2,FW,0);
8003874: 2200 movs r2, #0
8003876: 2100 movs r1, #0
8003878: 2002 movs r0, #2
800387a: f000 ff6d bl 8004758 <SetMotPerc>
SetMotPerc(M2,BW,0);
800387e: 2200 movs r2, #0
8003880: 2101 movs r1, #1
8003882: 2002 movs r0, #2
8003884: f000 ff68 bl 8004758 <SetMotPerc>
if(rtCiclo>=apM2start){
8003888: 4b40 ldr r3, [pc, #256] @ (800398c <m2ap+0x18c>)
800388a: 881b ldrh r3, [r3, #0]
800388c: b29a uxth r2, r3
800388e: 4b40 ldr r3, [pc, #256] @ (8003990 <m2ap+0x190>)
8003890: 881b ldrh r3, [r3, #0]
8003892: 429a cmp r2, r3
8003894: d365 bcc.n 8003962 <m2ap+0x162>
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT);
8003896: 4b3f ldr r3, [pc, #252] @ (8003994 <m2ap+0x194>)
8003898: 885b ldrh r3, [r3, #2]
800389a: b2da uxtb r2, r3
800389c: 4b3e ldr r3, [pc, #248] @ (8003998 <m2ap+0x198>)
800389e: 881b ldrh r3, [r3, #0]
80038a0: b2d9 uxtb r1, r3
80038a2: 4b3e ldr r3, [pc, #248] @ (800399c <m2ap+0x19c>)
80038a4: 881b ldrh r3, [r3, #0]
80038a6: b2db uxtb r3, r3
80038a8: 2000 movs r0, #0
80038aa: 9001 str r0, [sp, #4]
80038ac: 9300 str r3, [sp, #0]
80038ae: 460b mov r3, r1
80038b0: 2101 movs r1, #1
80038b2: 2002 movs r0, #2
80038b4: f001 f8d0 bl 8004a58 <ramp>
m2st=motStartRamp;
80038b8: 4b31 ldr r3, [pc, #196] @ (8003980 <m2ap+0x180>)
80038ba: 2201 movs r2, #1
80038bc: 701a strb r2, [r3, #0]
}
break;
80038be: e050 b.n 8003962 <m2ap+0x162>
case motStartRamp:
if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){
80038c0: 4b34 ldr r3, [pc, #208] @ (8003994 <m2ap+0x194>)
80038c2: 885b ldrh r3, [r3, #2]
80038c4: b2da uxtb r2, r3
80038c6: 4b34 ldr r3, [pc, #208] @ (8003998 <m2ap+0x198>)
80038c8: 881b ldrh r3, [r3, #0]
80038ca: b2d9 uxtb r1, r3
80038cc: 4b33 ldr r3, [pc, #204] @ (800399c <m2ap+0x19c>)
80038ce: 881b ldrh r3, [r3, #0]
80038d0: b2db uxtb r3, r3
80038d2: 200a movs r0, #10
80038d4: 9001 str r0, [sp, #4]
80038d6: 9300 str r3, [sp, #0]
80038d8: 460b mov r3, r1
80038da: 2101 movs r1, #1
80038dc: 2002 movs r0, #2
80038de: f001 f8bb bl 8004a58 <ramp>
80038e2: 4603 mov r3, r0
80038e4: 2b00 cmp r3, #0
80038e6: d13e bne.n 8003966 <m2ap+0x166>
m2st=motWaitingTime;
80038e8: 4b25 ldr r3, [pc, #148] @ (8003980 <m2ap+0x180>)
80038ea: 2202 movs r2, #2
80038ec: 701a strb r2, [r3, #0]
}
break;
80038ee: e03a b.n 8003966 <m2ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM2stop){
80038f0: 4b26 ldr r3, [pc, #152] @ (800398c <m2ap+0x18c>)
80038f2: 881b ldrh r3, [r3, #0]
80038f4: b29a uxth r2, r3
80038f6: 4b2a ldr r3, [pc, #168] @ (80039a0 <m2ap+0x1a0>)
80038f8: 881b ldrh r3, [r3, #0]
80038fa: 429a cmp r2, r3
80038fc: d335 bcc.n 800396a <m2ap+0x16a>
(void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT);
80038fe: 4b26 ldr r3, [pc, #152] @ (8003998 <m2ap+0x198>)
8003900: 881b ldrh r3, [r3, #0]
8003902: b2da uxtb r2, r3
8003904: 4b25 ldr r3, [pc, #148] @ (800399c <m2ap+0x19c>)
8003906: 881b ldrh r3, [r3, #0]
8003908: b2db uxtb r3, r3
800390a: 2100 movs r1, #0
800390c: 9101 str r1, [sp, #4]
800390e: 9300 str r3, [sp, #0]
8003910: 2300 movs r3, #0
8003912: 2101 movs r1, #1
8003914: 2002 movs r0, #2
8003916: f001 f89f bl 8004a58 <ramp>
m2st=motStopRamp;
800391a: 4b19 ldr r3, [pc, #100] @ (8003980 <m2ap+0x180>)
800391c: 2203 movs r2, #3
800391e: 701a strb r2, [r3, #0]
}
break;
8003920: e023 b.n 800396a <m2ap+0x16a>
case motStopRamp:
if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){
8003922: 4b1d ldr r3, [pc, #116] @ (8003998 <m2ap+0x198>)
8003924: 881b ldrh r3, [r3, #0]
8003926: b2da uxtb r2, r3
8003928: 4b1c ldr r3, [pc, #112] @ (800399c <m2ap+0x19c>)
800392a: 881b ldrh r3, [r3, #0]
800392c: b2db uxtb r3, r3
800392e: 210a movs r1, #10
8003930: 9101 str r1, [sp, #4]
8003932: 9300 str r3, [sp, #0]
8003934: 2300 movs r3, #0
8003936: 2101 movs r1, #1
8003938: 2002 movs r0, #2
800393a: f001 f88d bl 8004a58 <ramp>
800393e: 4603 mov r3, r0
8003940: 2b00 cmp r3, #0
8003942: d114 bne.n 800396e <m2ap+0x16e>
m2st=motStop;
8003944: 4b0e ldr r3, [pc, #56] @ (8003980 <m2ap+0x180>)
8003946: 2204 movs r2, #4
8003948: 701a strb r2, [r3, #0]
}
break;
800394a: e010 b.n 800396e <m2ap+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
800394c: 2200 movs r2, #0
800394e: 2100 movs r1, #0
8003950: 2002 movs r0, #2
8003952: f000 ff01 bl 8004758 <SetMotPerc>
SetMotPerc(M2,BW,0);
8003956: 2200 movs r2, #0
8003958: 2101 movs r1, #1
800395a: 2002 movs r0, #2
800395c: f000 fefc bl 8004758 <SetMotPerc>
break;
8003960: e006 b.n 8003970 <m2ap+0x170>
break;
8003962: bf00 nop
8003964: e004 b.n 8003970 <m2ap+0x170>
break;
8003966: bf00 nop
8003968: e002 b.n 8003970 <m2ap+0x170>
break;
800396a: bf00 nop
800396c: e000 b.n 8003970 <m2ap+0x170>
break;
800396e: bf00 nop
}
return m2st;
8003970: 4b03 ldr r3, [pc, #12] @ (8003980 <m2ap+0x180>)
8003972: 781b ldrb r3, [r3, #0]
}
8003974: 4618 mov r0, r3
8003976: 3768 adds r7, #104 @ 0x68
8003978: 46bd mov sp, r7
800397a: bd80 pop {r7, pc}
800397c: 20000008 .word 0x20000008
8003980: 20000463 .word 0x20000463
8003984: 0800f2fc .word 0x0800f2fc
8003988: 200003a8 .word 0x200003a8
800398c: 200003fc .word 0x200003fc
8003990: 2000042c .word 0x2000042c
8003994: 2000044c .word 0x2000044c
8003998: 20000404 .word 0x20000404
800399c: 20000418 .word 0x20000418
80039a0: 2000042e .word 0x2000042e
080039a4 <m3ap>:
motMov_st m3ap(void){
80039a4: b580 push {r7, lr}
80039a6: b09c sub sp, #112 @ 0x70
80039a8: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
80039aa: 4b5d ldr r3, [pc, #372] @ (8003b20 <m3ap+0x17c>)
80039ac: 781a ldrb r2, [r3, #0]
80039ae: 4b5d ldr r3, [pc, #372] @ (8003b24 <m3ap+0x180>)
80039b0: 781b ldrb r3, [r3, #0]
80039b2: 429a cmp r2, r3
80039b4: d017 beq.n 80039e6 <m3ap+0x42>
memm3st=m3st;
80039b6: 4b5b ldr r3, [pc, #364] @ (8003b24 <m3ap+0x180>)
80039b8: 781a ldrb r2, [r3, #0]
80039ba: 4b59 ldr r3, [pc, #356] @ (8003b20 <m3ap+0x17c>)
80039bc: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ap=%d",m3st);
80039be: 4b59 ldr r3, [pc, #356] @ (8003b24 <m3ap+0x180>)
80039c0: 781b ldrb r3, [r3, #0]
80039c2: 461a mov r2, r3
80039c4: 1d3b adds r3, r7, #4
80039c6: 4958 ldr r1, [pc, #352] @ (8003b28 <m3ap+0x184>)
80039c8: 4618 mov r0, r3
80039ca: f00a fce3 bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80039ce: 1d3b adds r3, r7, #4
80039d0: 4618 mov r0, r3
80039d2: f7fc fbbb bl 800014c <strlen>
80039d6: 4603 mov r3, r0
80039d8: b29a uxth r2, r3
80039da: 1d39 adds r1, r7, #4
80039dc: f04f 33ff mov.w r3, #4294967295
80039e0: 4852 ldr r0, [pc, #328] @ (8003b2c <m3ap+0x188>)
80039e2: f005 fee7 bl 80097b4 <HAL_UART_Transmit>
}
if(rtCiclo<apM3start)m3st=motWaiting;
80039e6: 4b52 ldr r3, [pc, #328] @ (8003b30 <m3ap+0x18c>)
80039e8: 881b ldrh r3, [r3, #0]
80039ea: b29a uxth r2, r3
80039ec: 4b51 ldr r3, [pc, #324] @ (8003b34 <m3ap+0x190>)
80039ee: 881b ldrh r3, [r3, #0]
80039f0: 429a cmp r2, r3
80039f2: d202 bcs.n 80039fa <m3ap+0x56>
80039f4: 4b4b ldr r3, [pc, #300] @ (8003b24 <m3ap+0x180>)
80039f6: 2200 movs r2, #0
80039f8: 701a strb r2, [r3, #0]
switch(m3st){
80039fa: 4b4a ldr r3, [pc, #296] @ (8003b24 <m3ap+0x180>)
80039fc: 781b ldrb r3, [r3, #0]
80039fe: 2b03 cmp r3, #3
8003a00: d876 bhi.n 8003af0 <m3ap+0x14c>
8003a02: a201 add r2, pc, #4 @ (adr r2, 8003a08 <m3ap+0x64>)
8003a04: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003a08: 08003a19 .word 0x08003a19
8003a0c: 08003a65 .word 0x08003a65
8003a10: 08003a95 .word 0x08003a95
8003a14: 08003ac7 .word 0x08003ac7
case motWaiting:
SetMotPerc(M3,FW,0);
8003a18: 2200 movs r2, #0
8003a1a: 2100 movs r1, #0
8003a1c: 2003 movs r0, #3
8003a1e: f000 fe9b bl 8004758 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003a22: 2200 movs r2, #0
8003a24: 2101 movs r1, #1
8003a26: 2003 movs r0, #3
8003a28: f000 fe96 bl 8004758 <SetMotPerc>
if(rtCiclo>=apM3start){
8003a2c: 4b40 ldr r3, [pc, #256] @ (8003b30 <m3ap+0x18c>)
8003a2e: 881b ldrh r3, [r3, #0]
8003a30: b29a uxth r2, r3
8003a32: 4b40 ldr r3, [pc, #256] @ (8003b34 <m3ap+0x190>)
8003a34: 881b ldrh r3, [r3, #0]
8003a36: 429a cmp r2, r3
8003a38: d365 bcc.n 8003b06 <m3ap+0x162>
(void)ramp(M3,FW,mrampstart[M3-1],m2pwmap,tramp,RAMPINIT);
8003a3a: 4b3f ldr r3, [pc, #252] @ (8003b38 <m3ap+0x194>)
8003a3c: 889b ldrh r3, [r3, #4]
8003a3e: b2da uxtb r2, r3
8003a40: 4b3e ldr r3, [pc, #248] @ (8003b3c <m3ap+0x198>)
8003a42: 881b ldrh r3, [r3, #0]
8003a44: b2d9 uxtb r1, r3
8003a46: 4b3e ldr r3, [pc, #248] @ (8003b40 <m3ap+0x19c>)
8003a48: 881b ldrh r3, [r3, #0]
8003a4a: b2db uxtb r3, r3
8003a4c: 2000 movs r0, #0
8003a4e: 9001 str r0, [sp, #4]
8003a50: 9300 str r3, [sp, #0]
8003a52: 460b mov r3, r1
8003a54: 2100 movs r1, #0
8003a56: 2003 movs r0, #3
8003a58: f000 fffe bl 8004a58 <ramp>
m3st=motStartRamp;
8003a5c: 4b31 ldr r3, [pc, #196] @ (8003b24 <m3ap+0x180>)
8003a5e: 2201 movs r2, #1
8003a60: 701a strb r2, [r3, #0]
}
break;
8003a62: e050 b.n 8003b06 <m3ap+0x162>
case motStartRamp:
if(ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){
8003a64: 4b34 ldr r3, [pc, #208] @ (8003b38 <m3ap+0x194>)
8003a66: 889b ldrh r3, [r3, #4]
8003a68: b2da uxtb r2, r3
8003a6a: 4b36 ldr r3, [pc, #216] @ (8003b44 <m3ap+0x1a0>)
8003a6c: 881b ldrh r3, [r3, #0]
8003a6e: b2d9 uxtb r1, r3
8003a70: 4b33 ldr r3, [pc, #204] @ (8003b40 <m3ap+0x19c>)
8003a72: 881b ldrh r3, [r3, #0]
8003a74: b2db uxtb r3, r3
8003a76: 200a movs r0, #10
8003a78: 9001 str r0, [sp, #4]
8003a7a: 9300 str r3, [sp, #0]
8003a7c: 460b mov r3, r1
8003a7e: 2100 movs r1, #0
8003a80: 2003 movs r0, #3
8003a82: f000 ffe9 bl 8004a58 <ramp>
8003a86: 4603 mov r3, r0
8003a88: 2b00 cmp r3, #0
8003a8a: d13e bne.n 8003b0a <m3ap+0x166>
m3st=motWaitingTime;
8003a8c: 4b25 ldr r3, [pc, #148] @ (8003b24 <m3ap+0x180>)
8003a8e: 2202 movs r2, #2
8003a90: 701a strb r2, [r3, #0]
}
break;
8003a92: e03a b.n 8003b0a <m3ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM3stop){
8003a94: 4b26 ldr r3, [pc, #152] @ (8003b30 <m3ap+0x18c>)
8003a96: 881b ldrh r3, [r3, #0]
8003a98: b29a uxth r2, r3
8003a9a: 4b2b ldr r3, [pc, #172] @ (8003b48 <m3ap+0x1a4>)
8003a9c: 881b ldrh r3, [r3, #0]
8003a9e: 429a cmp r2, r3
8003aa0: d335 bcc.n 8003b0e <m3ap+0x16a>
(void)ramp(M3,FW,m3pwmap,0,tramp,RAMPINIT);
8003aa2: 4b28 ldr r3, [pc, #160] @ (8003b44 <m3ap+0x1a0>)
8003aa4: 881b ldrh r3, [r3, #0]
8003aa6: b2da uxtb r2, r3
8003aa8: 4b25 ldr r3, [pc, #148] @ (8003b40 <m3ap+0x19c>)
8003aaa: 881b ldrh r3, [r3, #0]
8003aac: b2db uxtb r3, r3
8003aae: 2100 movs r1, #0
8003ab0: 9101 str r1, [sp, #4]
8003ab2: 9300 str r3, [sp, #0]
8003ab4: 2300 movs r3, #0
8003ab6: 2100 movs r1, #0
8003ab8: 2003 movs r0, #3
8003aba: f000 ffcd bl 8004a58 <ramp>
m3st=motStopRamp;
8003abe: 4b19 ldr r3, [pc, #100] @ (8003b24 <m3ap+0x180>)
8003ac0: 2203 movs r2, #3
8003ac2: 701a strb r2, [r3, #0]
}
break;
8003ac4: e023 b.n 8003b0e <m3ap+0x16a>
case motStopRamp:
if(ramp(M3,FW,m3pwmap,0,tramp,RAMPRUN)==DONE){
8003ac6: 4b1f ldr r3, [pc, #124] @ (8003b44 <m3ap+0x1a0>)
8003ac8: 881b ldrh r3, [r3, #0]
8003aca: b2da uxtb r2, r3
8003acc: 4b1c ldr r3, [pc, #112] @ (8003b40 <m3ap+0x19c>)
8003ace: 881b ldrh r3, [r3, #0]
8003ad0: b2db uxtb r3, r3
8003ad2: 210a movs r1, #10
8003ad4: 9101 str r1, [sp, #4]
8003ad6: 9300 str r3, [sp, #0]
8003ad8: 2300 movs r3, #0
8003ada: 2100 movs r1, #0
8003adc: 2003 movs r0, #3
8003ade: f000 ffbb bl 8004a58 <ramp>
8003ae2: 4603 mov r3, r0
8003ae4: 2b00 cmp r3, #0
8003ae6: d114 bne.n 8003b12 <m3ap+0x16e>
m3st=motStop;
8003ae8: 4b0e ldr r3, [pc, #56] @ (8003b24 <m3ap+0x180>)
8003aea: 2204 movs r2, #4
8003aec: 701a strb r2, [r3, #0]
}
break;
8003aee: e010 b.n 8003b12 <m3ap+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8003af0: 2200 movs r2, #0
8003af2: 2100 movs r1, #0
8003af4: 2003 movs r0, #3
8003af6: f000 fe2f bl 8004758 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003afa: 2200 movs r2, #0
8003afc: 2101 movs r1, #1
8003afe: 2003 movs r0, #3
8003b00: f000 fe2a bl 8004758 <SetMotPerc>
break;
8003b04: e006 b.n 8003b14 <m3ap+0x170>
break;
8003b06: bf00 nop
8003b08: e004 b.n 8003b14 <m3ap+0x170>
break;
8003b0a: bf00 nop
8003b0c: e002 b.n 8003b14 <m3ap+0x170>
break;
8003b0e: bf00 nop
8003b10: e000 b.n 8003b14 <m3ap+0x170>
break;
8003b12: bf00 nop
}
return m3st;
8003b14: 4b03 ldr r3, [pc, #12] @ (8003b24 <m3ap+0x180>)
8003b16: 781b ldrb r3, [r3, #0]
}
8003b18: 4618 mov r0, r3
8003b1a: 3768 adds r7, #104 @ 0x68
8003b1c: 46bd mov sp, r7
8003b1e: bd80 pop {r7, pc}
8003b20: 20000009 .word 0x20000009
8003b24: 20000464 .word 0x20000464
8003b28: 0800f308 .word 0x0800f308
8003b2c: 200003a8 .word 0x200003a8
8003b30: 200003fc .word 0x200003fc
8003b34: 20000430 .word 0x20000430
8003b38: 2000044c .word 0x2000044c
8003b3c: 20000404 .word 0x20000404
8003b40: 20000418 .word 0x20000418
8003b44: 20000408 .word 0x20000408
8003b48: 20000432 .word 0x20000432
08003b4c <m4ap>:
motMov_st m4ap(void){
8003b4c: b580 push {r7, lr}
8003b4e: b09c sub sp, #112 @ 0x70
8003b50: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
8003b52: 4b5d ldr r3, [pc, #372] @ (8003cc8 <m4ap+0x17c>)
8003b54: 781a ldrb r2, [r3, #0]
8003b56: 4b5d ldr r3, [pc, #372] @ (8003ccc <m4ap+0x180>)
8003b58: 781b ldrb r3, [r3, #0]
8003b5a: 429a cmp r2, r3
8003b5c: d017 beq.n 8003b8e <m4ap+0x42>
memm4st=m4st;
8003b5e: 4b5b ldr r3, [pc, #364] @ (8003ccc <m4ap+0x180>)
8003b60: 781a ldrb r2, [r3, #0]
8003b62: 4b59 ldr r3, [pc, #356] @ (8003cc8 <m4ap+0x17c>)
8003b64: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ap=%d",m4st);
8003b66: 4b59 ldr r3, [pc, #356] @ (8003ccc <m4ap+0x180>)
8003b68: 781b ldrb r3, [r3, #0]
8003b6a: 461a mov r2, r3
8003b6c: 1d3b adds r3, r7, #4
8003b6e: 4958 ldr r1, [pc, #352] @ (8003cd0 <m4ap+0x184>)
8003b70: 4618 mov r0, r3
8003b72: f00a fc0f bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003b76: 1d3b adds r3, r7, #4
8003b78: 4618 mov r0, r3
8003b7a: f7fc fae7 bl 800014c <strlen>
8003b7e: 4603 mov r3, r0
8003b80: b29a uxth r2, r3
8003b82: 1d39 adds r1, r7, #4
8003b84: f04f 33ff mov.w r3, #4294967295
8003b88: 4852 ldr r0, [pc, #328] @ (8003cd4 <m4ap+0x188>)
8003b8a: f005 fe13 bl 80097b4 <HAL_UART_Transmit>
}
if(rtCiclo<apM4start)m4st=motWaiting;
8003b8e: 4b52 ldr r3, [pc, #328] @ (8003cd8 <m4ap+0x18c>)
8003b90: 881b ldrh r3, [r3, #0]
8003b92: b29a uxth r2, r3
8003b94: 4b51 ldr r3, [pc, #324] @ (8003cdc <m4ap+0x190>)
8003b96: 881b ldrh r3, [r3, #0]
8003b98: 429a cmp r2, r3
8003b9a: d202 bcs.n 8003ba2 <m4ap+0x56>
8003b9c: 4b4b ldr r3, [pc, #300] @ (8003ccc <m4ap+0x180>)
8003b9e: 2200 movs r2, #0
8003ba0: 701a strb r2, [r3, #0]
switch(m4st){
8003ba2: 4b4a ldr r3, [pc, #296] @ (8003ccc <m4ap+0x180>)
8003ba4: 781b ldrb r3, [r3, #0]
8003ba6: 2b03 cmp r3, #3
8003ba8: d876 bhi.n 8003c98 <m4ap+0x14c>
8003baa: a201 add r2, pc, #4 @ (adr r2, 8003bb0 <m4ap+0x64>)
8003bac: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003bb0: 08003bc1 .word 0x08003bc1
8003bb4: 08003c0d .word 0x08003c0d
8003bb8: 08003c3d .word 0x08003c3d
8003bbc: 08003c6f .word 0x08003c6f
case motWaiting:
SetMotPerc(M4,FW,0);
8003bc0: 2200 movs r2, #0
8003bc2: 2100 movs r1, #0
8003bc4: 2004 movs r0, #4
8003bc6: f000 fdc7 bl 8004758 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003bca: 2200 movs r2, #0
8003bcc: 2101 movs r1, #1
8003bce: 2004 movs r0, #4
8003bd0: f000 fdc2 bl 8004758 <SetMotPerc>
if(rtCiclo>=apM4start){
8003bd4: 4b40 ldr r3, [pc, #256] @ (8003cd8 <m4ap+0x18c>)
8003bd6: 881b ldrh r3, [r3, #0]
8003bd8: b29a uxth r2, r3
8003bda: 4b40 ldr r3, [pc, #256] @ (8003cdc <m4ap+0x190>)
8003bdc: 881b ldrh r3, [r3, #0]
8003bde: 429a cmp r2, r3
8003be0: d365 bcc.n 8003cae <m4ap+0x162>
(void)ramp(M4,FW,mrampstart[M4-1],m2pwmap,tramp,RAMPINIT);
8003be2: 4b3f ldr r3, [pc, #252] @ (8003ce0 <m4ap+0x194>)
8003be4: 88db ldrh r3, [r3, #6]
8003be6: b2da uxtb r2, r3
8003be8: 4b3e ldr r3, [pc, #248] @ (8003ce4 <m4ap+0x198>)
8003bea: 881b ldrh r3, [r3, #0]
8003bec: b2d9 uxtb r1, r3
8003bee: 4b3e ldr r3, [pc, #248] @ (8003ce8 <m4ap+0x19c>)
8003bf0: 881b ldrh r3, [r3, #0]
8003bf2: b2db uxtb r3, r3
8003bf4: 2000 movs r0, #0
8003bf6: 9001 str r0, [sp, #4]
8003bf8: 9300 str r3, [sp, #0]
8003bfa: 460b mov r3, r1
8003bfc: 2100 movs r1, #0
8003bfe: 2004 movs r0, #4
8003c00: f000 ff2a bl 8004a58 <ramp>
m4st=motStartRamp;
8003c04: 4b31 ldr r3, [pc, #196] @ (8003ccc <m4ap+0x180>)
8003c06: 2201 movs r2, #1
8003c08: 701a strb r2, [r3, #0]
}
break;
8003c0a: e050 b.n 8003cae <m4ap+0x162>
case motStartRamp:
if(ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){
8003c0c: 4b34 ldr r3, [pc, #208] @ (8003ce0 <m4ap+0x194>)
8003c0e: 88db ldrh r3, [r3, #6]
8003c10: b2da uxtb r2, r3
8003c12: 4b36 ldr r3, [pc, #216] @ (8003cec <m4ap+0x1a0>)
8003c14: 881b ldrh r3, [r3, #0]
8003c16: b2d9 uxtb r1, r3
8003c18: 4b33 ldr r3, [pc, #204] @ (8003ce8 <m4ap+0x19c>)
8003c1a: 881b ldrh r3, [r3, #0]
8003c1c: b2db uxtb r3, r3
8003c1e: 200a movs r0, #10
8003c20: 9001 str r0, [sp, #4]
8003c22: 9300 str r3, [sp, #0]
8003c24: 460b mov r3, r1
8003c26: 2100 movs r1, #0
8003c28: 2004 movs r0, #4
8003c2a: f000 ff15 bl 8004a58 <ramp>
8003c2e: 4603 mov r3, r0
8003c30: 2b00 cmp r3, #0
8003c32: d13e bne.n 8003cb2 <m4ap+0x166>
m4st=motWaitingTime;
8003c34: 4b25 ldr r3, [pc, #148] @ (8003ccc <m4ap+0x180>)
8003c36: 2202 movs r2, #2
8003c38: 701a strb r2, [r3, #0]
}
break;
8003c3a: e03a b.n 8003cb2 <m4ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM4stop){
8003c3c: 4b26 ldr r3, [pc, #152] @ (8003cd8 <m4ap+0x18c>)
8003c3e: 881b ldrh r3, [r3, #0]
8003c40: b29a uxth r2, r3
8003c42: 4b2b ldr r3, [pc, #172] @ (8003cf0 <m4ap+0x1a4>)
8003c44: 881b ldrh r3, [r3, #0]
8003c46: 429a cmp r2, r3
8003c48: d335 bcc.n 8003cb6 <m4ap+0x16a>
(void)ramp(M4,FW,m4pwmap,0,tramp,RAMPINIT);
8003c4a: 4b28 ldr r3, [pc, #160] @ (8003cec <m4ap+0x1a0>)
8003c4c: 881b ldrh r3, [r3, #0]
8003c4e: b2da uxtb r2, r3
8003c50: 4b25 ldr r3, [pc, #148] @ (8003ce8 <m4ap+0x19c>)
8003c52: 881b ldrh r3, [r3, #0]
8003c54: b2db uxtb r3, r3
8003c56: 2100 movs r1, #0
8003c58: 9101 str r1, [sp, #4]
8003c5a: 9300 str r3, [sp, #0]
8003c5c: 2300 movs r3, #0
8003c5e: 2100 movs r1, #0
8003c60: 2004 movs r0, #4
8003c62: f000 fef9 bl 8004a58 <ramp>
m4st=motStopRamp;
8003c66: 4b19 ldr r3, [pc, #100] @ (8003ccc <m4ap+0x180>)
8003c68: 2203 movs r2, #3
8003c6a: 701a strb r2, [r3, #0]
}
break;
8003c6c: e023 b.n 8003cb6 <m4ap+0x16a>
case motStopRamp:
if(ramp(M4,FW,m4pwmap,0,tramp,RAMPRUN)==DONE){
8003c6e: 4b1f ldr r3, [pc, #124] @ (8003cec <m4ap+0x1a0>)
8003c70: 881b ldrh r3, [r3, #0]
8003c72: b2da uxtb r2, r3
8003c74: 4b1c ldr r3, [pc, #112] @ (8003ce8 <m4ap+0x19c>)
8003c76: 881b ldrh r3, [r3, #0]
8003c78: b2db uxtb r3, r3
8003c7a: 210a movs r1, #10
8003c7c: 9101 str r1, [sp, #4]
8003c7e: 9300 str r3, [sp, #0]
8003c80: 2300 movs r3, #0
8003c82: 2100 movs r1, #0
8003c84: 2004 movs r0, #4
8003c86: f000 fee7 bl 8004a58 <ramp>
8003c8a: 4603 mov r3, r0
8003c8c: 2b00 cmp r3, #0
8003c8e: d114 bne.n 8003cba <m4ap+0x16e>
m4st=motStop;
8003c90: 4b0e ldr r3, [pc, #56] @ (8003ccc <m4ap+0x180>)
8003c92: 2204 movs r2, #4
8003c94: 701a strb r2, [r3, #0]
}
break;
8003c96: e010 b.n 8003cba <m4ap+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8003c98: 2200 movs r2, #0
8003c9a: 2100 movs r1, #0
8003c9c: 2004 movs r0, #4
8003c9e: f000 fd5b bl 8004758 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003ca2: 2200 movs r2, #0
8003ca4: 2101 movs r1, #1
8003ca6: 2004 movs r0, #4
8003ca8: f000 fd56 bl 8004758 <SetMotPerc>
break;
8003cac: e006 b.n 8003cbc <m4ap+0x170>
break;
8003cae: bf00 nop
8003cb0: e004 b.n 8003cbc <m4ap+0x170>
break;
8003cb2: bf00 nop
8003cb4: e002 b.n 8003cbc <m4ap+0x170>
break;
8003cb6: bf00 nop
8003cb8: e000 b.n 8003cbc <m4ap+0x170>
break;
8003cba: bf00 nop
}
return m4st;
8003cbc: 4b03 ldr r3, [pc, #12] @ (8003ccc <m4ap+0x180>)
8003cbe: 781b ldrb r3, [r3, #0]
}
8003cc0: 4618 mov r0, r3
8003cc2: 3768 adds r7, #104 @ 0x68
8003cc4: 46bd mov sp, r7
8003cc6: bd80 pop {r7, pc}
8003cc8: 2000000a .word 0x2000000a
8003ccc: 20000465 .word 0x20000465
8003cd0: 0800f314 .word 0x0800f314
8003cd4: 200003a8 .word 0x200003a8
8003cd8: 200003fc .word 0x200003fc
8003cdc: 20000434 .word 0x20000434
8003ce0: 2000044c .word 0x2000044c
8003ce4: 20000404 .word 0x20000404
8003ce8: 20000418 .word 0x20000418
8003cec: 2000040c .word 0x2000040c
8003cf0: 20000436 .word 0x20000436
08003cf4 <m1ch>:
motMov_st m1ch(void){
8003cf4: b580 push {r7, lr}
8003cf6: b09c sub sp, #112 @ 0x70
8003cf8: af02 add r7, sp, #8
static motMov_st m1st;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
8003cfa: 4b5d ldr r3, [pc, #372] @ (8003e70 <m1ch+0x17c>)
8003cfc: 781a ldrb r2, [r3, #0]
8003cfe: 4b5d ldr r3, [pc, #372] @ (8003e74 <m1ch+0x180>)
8003d00: 781b ldrb r3, [r3, #0]
8003d02: 429a cmp r2, r3
8003d04: d017 beq.n 8003d36 <m1ch+0x42>
memm1st=m1st;
8003d06: 4b5b ldr r3, [pc, #364] @ (8003e74 <m1ch+0x180>)
8003d08: 781a ldrb r2, [r3, #0]
8003d0a: 4b59 ldr r3, [pc, #356] @ (8003e70 <m1ch+0x17c>)
8003d0c: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ch=%d",m1st);
8003d0e: 4b59 ldr r3, [pc, #356] @ (8003e74 <m1ch+0x180>)
8003d10: 781b ldrb r3, [r3, #0]
8003d12: 461a mov r2, r3
8003d14: 1d3b adds r3, r7, #4
8003d16: 4958 ldr r1, [pc, #352] @ (8003e78 <m1ch+0x184>)
8003d18: 4618 mov r0, r3
8003d1a: f00a fb3b bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003d1e: 1d3b adds r3, r7, #4
8003d20: 4618 mov r0, r3
8003d22: f7fc fa13 bl 800014c <strlen>
8003d26: 4603 mov r3, r0
8003d28: b29a uxth r2, r3
8003d2a: 1d39 adds r1, r7, #4
8003d2c: f04f 33ff mov.w r3, #4294967295
8003d30: 4852 ldr r0, [pc, #328] @ (8003e7c <m1ch+0x188>)
8003d32: f005 fd3f bl 80097b4 <HAL_UART_Transmit>
}
if(rtCiclo<chM1start)m1st=motWaiting;
8003d36: 4b52 ldr r3, [pc, #328] @ (8003e80 <m1ch+0x18c>)
8003d38: 881b ldrh r3, [r3, #0]
8003d3a: b29a uxth r2, r3
8003d3c: 4b51 ldr r3, [pc, #324] @ (8003e84 <m1ch+0x190>)
8003d3e: 881b ldrh r3, [r3, #0]
8003d40: 429a cmp r2, r3
8003d42: d202 bcs.n 8003d4a <m1ch+0x56>
8003d44: 4b4b ldr r3, [pc, #300] @ (8003e74 <m1ch+0x180>)
8003d46: 2200 movs r2, #0
8003d48: 701a strb r2, [r3, #0]
switch(m1st){
8003d4a: 4b4a ldr r3, [pc, #296] @ (8003e74 <m1ch+0x180>)
8003d4c: 781b ldrb r3, [r3, #0]
8003d4e: 2b03 cmp r3, #3
8003d50: d876 bhi.n 8003e40 <m1ch+0x14c>
8003d52: a201 add r2, pc, #4 @ (adr r2, 8003d58 <m1ch+0x64>)
8003d54: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003d58: 08003d69 .word 0x08003d69
8003d5c: 08003db5 .word 0x08003db5
8003d60: 08003de5 .word 0x08003de5
8003d64: 08003e17 .word 0x08003e17
case motWaiting:
SetMotPerc(M1,FW,0);
8003d68: 2200 movs r2, #0
8003d6a: 2100 movs r1, #0
8003d6c: 2001 movs r0, #1
8003d6e: f000 fcf3 bl 8004758 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003d72: 2200 movs r2, #0
8003d74: 2101 movs r1, #1
8003d76: 2001 movs r0, #1
8003d78: f000 fcee bl 8004758 <SetMotPerc>
if(rtCiclo>=chM1start){
8003d7c: 4b40 ldr r3, [pc, #256] @ (8003e80 <m1ch+0x18c>)
8003d7e: 881b ldrh r3, [r3, #0]
8003d80: b29a uxth r2, r3
8003d82: 4b40 ldr r3, [pc, #256] @ (8003e84 <m1ch+0x190>)
8003d84: 881b ldrh r3, [r3, #0]
8003d86: 429a cmp r2, r3
8003d88: d365 bcc.n 8003e56 <m1ch+0x162>
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
8003d8a: 4b3f ldr r3, [pc, #252] @ (8003e88 <m1ch+0x194>)
8003d8c: 881b ldrh r3, [r3, #0]
8003d8e: b2da uxtb r2, r3
8003d90: 4b3e ldr r3, [pc, #248] @ (8003e8c <m1ch+0x198>)
8003d92: 881b ldrh r3, [r3, #0]
8003d94: b2d9 uxtb r1, r3
8003d96: 4b3e ldr r3, [pc, #248] @ (8003e90 <m1ch+0x19c>)
8003d98: 881b ldrh r3, [r3, #0]
8003d9a: b2db uxtb r3, r3
8003d9c: 2000 movs r0, #0
8003d9e: 9001 str r0, [sp, #4]
8003da0: 9300 str r3, [sp, #0]
8003da2: 460b mov r3, r1
8003da4: 2101 movs r1, #1
8003da6: 2001 movs r0, #1
8003da8: f000 fe56 bl 8004a58 <ramp>
m1st=motStartRamp;
8003dac: 4b31 ldr r3, [pc, #196] @ (8003e74 <m1ch+0x180>)
8003dae: 2201 movs r2, #1
8003db0: 701a strb r2, [r3, #0]
}
break;
8003db2: e050 b.n 8003e56 <m1ch+0x162>
case motStartRamp:
if(ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){
8003db4: 4b34 ldr r3, [pc, #208] @ (8003e88 <m1ch+0x194>)
8003db6: 881b ldrh r3, [r3, #0]
8003db8: b2da uxtb r2, r3
8003dba: 4b34 ldr r3, [pc, #208] @ (8003e8c <m1ch+0x198>)
8003dbc: 881b ldrh r3, [r3, #0]
8003dbe: b2d9 uxtb r1, r3
8003dc0: 4b33 ldr r3, [pc, #204] @ (8003e90 <m1ch+0x19c>)
8003dc2: 881b ldrh r3, [r3, #0]
8003dc4: b2db uxtb r3, r3
8003dc6: 200a movs r0, #10
8003dc8: 9001 str r0, [sp, #4]
8003dca: 9300 str r3, [sp, #0]
8003dcc: 460b mov r3, r1
8003dce: 2101 movs r1, #1
8003dd0: 2001 movs r0, #1
8003dd2: f000 fe41 bl 8004a58 <ramp>
8003dd6: 4603 mov r3, r0
8003dd8: 2b00 cmp r3, #0
8003dda: d13e bne.n 8003e5a <m1ch+0x166>
m1st=motWaitingTime;
8003ddc: 4b25 ldr r3, [pc, #148] @ (8003e74 <m1ch+0x180>)
8003dde: 2202 movs r2, #2
8003de0: 701a strb r2, [r3, #0]
}
break;
8003de2: e03a b.n 8003e5a <m1ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM1stop){
8003de4: 4b26 ldr r3, [pc, #152] @ (8003e80 <m1ch+0x18c>)
8003de6: 881b ldrh r3, [r3, #0]
8003de8: b29a uxth r2, r3
8003dea: 4b2a ldr r3, [pc, #168] @ (8003e94 <m1ch+0x1a0>)
8003dec: 881b ldrh r3, [r3, #0]
8003dee: 429a cmp r2, r3
8003df0: d335 bcc.n 8003e5e <m1ch+0x16a>
(void)ramp(M1,BW,m1pwmch,0,tramp,RAMPINIT);
8003df2: 4b26 ldr r3, [pc, #152] @ (8003e8c <m1ch+0x198>)
8003df4: 881b ldrh r3, [r3, #0]
8003df6: b2da uxtb r2, r3
8003df8: 4b25 ldr r3, [pc, #148] @ (8003e90 <m1ch+0x19c>)
8003dfa: 881b ldrh r3, [r3, #0]
8003dfc: b2db uxtb r3, r3
8003dfe: 2100 movs r1, #0
8003e00: 9101 str r1, [sp, #4]
8003e02: 9300 str r3, [sp, #0]
8003e04: 2300 movs r3, #0
8003e06: 2101 movs r1, #1
8003e08: 2001 movs r0, #1
8003e0a: f000 fe25 bl 8004a58 <ramp>
m1st=motStopRamp;
8003e0e: 4b19 ldr r3, [pc, #100] @ (8003e74 <m1ch+0x180>)
8003e10: 2203 movs r2, #3
8003e12: 701a strb r2, [r3, #0]
}
break;
8003e14: e023 b.n 8003e5e <m1ch+0x16a>
case motStopRamp:
if(ramp(M1,BW,m1pwmch,0,tramp,RAMPRUN)==DONE){
8003e16: 4b1d ldr r3, [pc, #116] @ (8003e8c <m1ch+0x198>)
8003e18: 881b ldrh r3, [r3, #0]
8003e1a: b2da uxtb r2, r3
8003e1c: 4b1c ldr r3, [pc, #112] @ (8003e90 <m1ch+0x19c>)
8003e1e: 881b ldrh r3, [r3, #0]
8003e20: b2db uxtb r3, r3
8003e22: 210a movs r1, #10
8003e24: 9101 str r1, [sp, #4]
8003e26: 9300 str r3, [sp, #0]
8003e28: 2300 movs r3, #0
8003e2a: 2101 movs r1, #1
8003e2c: 2001 movs r0, #1
8003e2e: f000 fe13 bl 8004a58 <ramp>
8003e32: 4603 mov r3, r0
8003e34: 2b00 cmp r3, #0
8003e36: d114 bne.n 8003e62 <m1ch+0x16e>
m1st=motStop;
8003e38: 4b0e ldr r3, [pc, #56] @ (8003e74 <m1ch+0x180>)
8003e3a: 2204 movs r2, #4
8003e3c: 701a strb r2, [r3, #0]
}
break;
8003e3e: e010 b.n 8003e62 <m1ch+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
8003e40: 2200 movs r2, #0
8003e42: 2100 movs r1, #0
8003e44: 2001 movs r0, #1
8003e46: f000 fc87 bl 8004758 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003e4a: 2200 movs r2, #0
8003e4c: 2101 movs r1, #1
8003e4e: 2001 movs r0, #1
8003e50: f000 fc82 bl 8004758 <SetMotPerc>
break;
8003e54: e006 b.n 8003e64 <m1ch+0x170>
break;
8003e56: bf00 nop
8003e58: e004 b.n 8003e64 <m1ch+0x170>
break;
8003e5a: bf00 nop
8003e5c: e002 b.n 8003e64 <m1ch+0x170>
break;
8003e5e: bf00 nop
8003e60: e000 b.n 8003e64 <m1ch+0x170>
break;
8003e62: bf00 nop
}
return m1st;
8003e64: 4b03 ldr r3, [pc, #12] @ (8003e74 <m1ch+0x180>)
8003e66: 781b ldrb r3, [r3, #0]
}
8003e68: 4618 mov r0, r3
8003e6a: 3768 adds r7, #104 @ 0x68
8003e6c: 46bd mov sp, r7
8003e6e: bd80 pop {r7, pc}
8003e70: 2000000b .word 0x2000000b
8003e74: 20000466 .word 0x20000466
8003e78: 0800f320 .word 0x0800f320
8003e7c: 200003a8 .word 0x200003a8
8003e80: 200003fc .word 0x200003fc
8003e84: 20000438 .word 0x20000438
8003e88: 2000044c .word 0x2000044c
8003e8c: 20000402 .word 0x20000402
8003e90: 20000418 .word 0x20000418
8003e94: 2000043a .word 0x2000043a
08003e98 <m2ch>:
motMov_st m2ch(void){
8003e98: b580 push {r7, lr}
8003e9a: b09c sub sp, #112 @ 0x70
8003e9c: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
8003e9e: 4b5d ldr r3, [pc, #372] @ (8004014 <m2ch+0x17c>)
8003ea0: 781a ldrb r2, [r3, #0]
8003ea2: 4b5d ldr r3, [pc, #372] @ (8004018 <m2ch+0x180>)
8003ea4: 781b ldrb r3, [r3, #0]
8003ea6: 429a cmp r2, r3
8003ea8: d017 beq.n 8003eda <m2ch+0x42>
memm2st=m2st;
8003eaa: 4b5b ldr r3, [pc, #364] @ (8004018 <m2ch+0x180>)
8003eac: 781a ldrb r2, [r3, #0]
8003eae: 4b59 ldr r3, [pc, #356] @ (8004014 <m2ch+0x17c>)
8003eb0: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ch=%d",m2st);
8003eb2: 4b59 ldr r3, [pc, #356] @ (8004018 <m2ch+0x180>)
8003eb4: 781b ldrb r3, [r3, #0]
8003eb6: 461a mov r2, r3
8003eb8: 1d3b adds r3, r7, #4
8003eba: 4958 ldr r1, [pc, #352] @ (800401c <m2ch+0x184>)
8003ebc: 4618 mov r0, r3
8003ebe: f00a fa69 bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003ec2: 1d3b adds r3, r7, #4
8003ec4: 4618 mov r0, r3
8003ec6: f7fc f941 bl 800014c <strlen>
8003eca: 4603 mov r3, r0
8003ecc: b29a uxth r2, r3
8003ece: 1d39 adds r1, r7, #4
8003ed0: f04f 33ff mov.w r3, #4294967295
8003ed4: 4852 ldr r0, [pc, #328] @ (8004020 <m2ch+0x188>)
8003ed6: f005 fc6d bl 80097b4 <HAL_UART_Transmit>
}
if(rtCiclo<chM2start)m2st=motWaiting;
8003eda: 4b52 ldr r3, [pc, #328] @ (8004024 <m2ch+0x18c>)
8003edc: 881b ldrh r3, [r3, #0]
8003ede: b29a uxth r2, r3
8003ee0: 4b51 ldr r3, [pc, #324] @ (8004028 <m2ch+0x190>)
8003ee2: 881b ldrh r3, [r3, #0]
8003ee4: 429a cmp r2, r3
8003ee6: d202 bcs.n 8003eee <m2ch+0x56>
8003ee8: 4b4b ldr r3, [pc, #300] @ (8004018 <m2ch+0x180>)
8003eea: 2200 movs r2, #0
8003eec: 701a strb r2, [r3, #0]
switch(m2st){
8003eee: 4b4a ldr r3, [pc, #296] @ (8004018 <m2ch+0x180>)
8003ef0: 781b ldrb r3, [r3, #0]
8003ef2: 2b03 cmp r3, #3
8003ef4: d876 bhi.n 8003fe4 <m2ch+0x14c>
8003ef6: a201 add r2, pc, #4 @ (adr r2, 8003efc <m2ch+0x64>)
8003ef8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003efc: 08003f0d .word 0x08003f0d
8003f00: 08003f59 .word 0x08003f59
8003f04: 08003f89 .word 0x08003f89
8003f08: 08003fbb .word 0x08003fbb
case motWaiting:
SetMotPerc(M2,FW,0);
8003f0c: 2200 movs r2, #0
8003f0e: 2100 movs r1, #0
8003f10: 2002 movs r0, #2
8003f12: f000 fc21 bl 8004758 <SetMotPerc>
SetMotPerc(M2,BW,0);
8003f16: 2200 movs r2, #0
8003f18: 2101 movs r1, #1
8003f1a: 2002 movs r0, #2
8003f1c: f000 fc1c bl 8004758 <SetMotPerc>
if(rtCiclo>=chM2start){
8003f20: 4b40 ldr r3, [pc, #256] @ (8004024 <m2ch+0x18c>)
8003f22: 881b ldrh r3, [r3, #0]
8003f24: b29a uxth r2, r3
8003f26: 4b40 ldr r3, [pc, #256] @ (8004028 <m2ch+0x190>)
8003f28: 881b ldrh r3, [r3, #0]
8003f2a: 429a cmp r2, r3
8003f2c: d365 bcc.n 8003ffa <m2ch+0x162>
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT);
8003f2e: 4b3f ldr r3, [pc, #252] @ (800402c <m2ch+0x194>)
8003f30: 885b ldrh r3, [r3, #2]
8003f32: b2da uxtb r2, r3
8003f34: 4b3e ldr r3, [pc, #248] @ (8004030 <m2ch+0x198>)
8003f36: 881b ldrh r3, [r3, #0]
8003f38: b2d9 uxtb r1, r3
8003f3a: 4b3e ldr r3, [pc, #248] @ (8004034 <m2ch+0x19c>)
8003f3c: 881b ldrh r3, [r3, #0]
8003f3e: b2db uxtb r3, r3
8003f40: 2000 movs r0, #0
8003f42: 9001 str r0, [sp, #4]
8003f44: 9300 str r3, [sp, #0]
8003f46: 460b mov r3, r1
8003f48: 2100 movs r1, #0
8003f4a: 2002 movs r0, #2
8003f4c: f000 fd84 bl 8004a58 <ramp>
m2st=motStartRamp;
8003f50: 4b31 ldr r3, [pc, #196] @ (8004018 <m2ch+0x180>)
8003f52: 2201 movs r2, #1
8003f54: 701a strb r2, [r3, #0]
}
break;
8003f56: e050 b.n 8003ffa <m2ch+0x162>
case motStartRamp:
if(ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE){
8003f58: 4b34 ldr r3, [pc, #208] @ (800402c <m2ch+0x194>)
8003f5a: 885b ldrh r3, [r3, #2]
8003f5c: b2da uxtb r2, r3
8003f5e: 4b34 ldr r3, [pc, #208] @ (8004030 <m2ch+0x198>)
8003f60: 881b ldrh r3, [r3, #0]
8003f62: b2d9 uxtb r1, r3
8003f64: 4b33 ldr r3, [pc, #204] @ (8004034 <m2ch+0x19c>)
8003f66: 881b ldrh r3, [r3, #0]
8003f68: b2db uxtb r3, r3
8003f6a: 200a movs r0, #10
8003f6c: 9001 str r0, [sp, #4]
8003f6e: 9300 str r3, [sp, #0]
8003f70: 460b mov r3, r1
8003f72: 2100 movs r1, #0
8003f74: 2002 movs r0, #2
8003f76: f000 fd6f bl 8004a58 <ramp>
8003f7a: 4603 mov r3, r0
8003f7c: 2b00 cmp r3, #0
8003f7e: d13e bne.n 8003ffe <m2ch+0x166>
m2st=motWaitingTime;
8003f80: 4b25 ldr r3, [pc, #148] @ (8004018 <m2ch+0x180>)
8003f82: 2202 movs r2, #2
8003f84: 701a strb r2, [r3, #0]
}
break;
8003f86: e03a b.n 8003ffe <m2ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM2stop){
8003f88: 4b26 ldr r3, [pc, #152] @ (8004024 <m2ch+0x18c>)
8003f8a: 881b ldrh r3, [r3, #0]
8003f8c: b29a uxth r2, r3
8003f8e: 4b2a ldr r3, [pc, #168] @ (8004038 <m2ch+0x1a0>)
8003f90: 881b ldrh r3, [r3, #0]
8003f92: 429a cmp r2, r3
8003f94: d335 bcc.n 8004002 <m2ch+0x16a>
(void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT);
8003f96: 4b26 ldr r3, [pc, #152] @ (8004030 <m2ch+0x198>)
8003f98: 881b ldrh r3, [r3, #0]
8003f9a: b2da uxtb r2, r3
8003f9c: 4b25 ldr r3, [pc, #148] @ (8004034 <m2ch+0x19c>)
8003f9e: 881b ldrh r3, [r3, #0]
8003fa0: b2db uxtb r3, r3
8003fa2: 2100 movs r1, #0
8003fa4: 9101 str r1, [sp, #4]
8003fa6: 9300 str r3, [sp, #0]
8003fa8: 2300 movs r3, #0
8003faa: 2100 movs r1, #0
8003fac: 2002 movs r0, #2
8003fae: f000 fd53 bl 8004a58 <ramp>
m2st=motStopRamp;
8003fb2: 4b19 ldr r3, [pc, #100] @ (8004018 <m2ch+0x180>)
8003fb4: 2203 movs r2, #3
8003fb6: 701a strb r2, [r3, #0]
}
break;
8003fb8: e023 b.n 8004002 <m2ch+0x16a>
case motStopRamp:
if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){
8003fba: 4b1d ldr r3, [pc, #116] @ (8004030 <m2ch+0x198>)
8003fbc: 881b ldrh r3, [r3, #0]
8003fbe: b2da uxtb r2, r3
8003fc0: 4b1c ldr r3, [pc, #112] @ (8004034 <m2ch+0x19c>)
8003fc2: 881b ldrh r3, [r3, #0]
8003fc4: b2db uxtb r3, r3
8003fc6: 210a movs r1, #10
8003fc8: 9101 str r1, [sp, #4]
8003fca: 9300 str r3, [sp, #0]
8003fcc: 2300 movs r3, #0
8003fce: 2100 movs r1, #0
8003fd0: 2002 movs r0, #2
8003fd2: f000 fd41 bl 8004a58 <ramp>
8003fd6: 4603 mov r3, r0
8003fd8: 2b00 cmp r3, #0
8003fda: d114 bne.n 8004006 <m2ch+0x16e>
m2st=motStop;
8003fdc: 4b0e ldr r3, [pc, #56] @ (8004018 <m2ch+0x180>)
8003fde: 2204 movs r2, #4
8003fe0: 701a strb r2, [r3, #0]
}
break;
8003fe2: e010 b.n 8004006 <m2ch+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
8003fe4: 2200 movs r2, #0
8003fe6: 2100 movs r1, #0
8003fe8: 2002 movs r0, #2
8003fea: f000 fbb5 bl 8004758 <SetMotPerc>
SetMotPerc(M2,BW,0);
8003fee: 2200 movs r2, #0
8003ff0: 2101 movs r1, #1
8003ff2: 2002 movs r0, #2
8003ff4: f000 fbb0 bl 8004758 <SetMotPerc>
break;
8003ff8: e006 b.n 8004008 <m2ch+0x170>
break;
8003ffa: bf00 nop
8003ffc: e004 b.n 8004008 <m2ch+0x170>
break;
8003ffe: bf00 nop
8004000: e002 b.n 8004008 <m2ch+0x170>
break;
8004002: bf00 nop
8004004: e000 b.n 8004008 <m2ch+0x170>
break;
8004006: bf00 nop
}
return m2st;
8004008: 4b03 ldr r3, [pc, #12] @ (8004018 <m2ch+0x180>)
800400a: 781b ldrb r3, [r3, #0]
}
800400c: 4618 mov r0, r3
800400e: 3768 adds r7, #104 @ 0x68
8004010: 46bd mov sp, r7
8004012: bd80 pop {r7, pc}
8004014: 2000000c .word 0x2000000c
8004018: 20000467 .word 0x20000467
800401c: 0800f32c .word 0x0800f32c
8004020: 200003a8 .word 0x200003a8
8004024: 200003fc .word 0x200003fc
8004028: 2000043c .word 0x2000043c
800402c: 2000044c .word 0x2000044c
8004030: 20000406 .word 0x20000406
8004034: 20000418 .word 0x20000418
8004038: 2000043e .word 0x2000043e
0800403c <m3ch>:
motMov_st m3ch(void){
800403c: b580 push {r7, lr}
800403e: b09c sub sp, #112 @ 0x70
8004040: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
8004042: 4b5d ldr r3, [pc, #372] @ (80041b8 <m3ch+0x17c>)
8004044: 781a ldrb r2, [r3, #0]
8004046: 4b5d ldr r3, [pc, #372] @ (80041bc <m3ch+0x180>)
8004048: 781b ldrb r3, [r3, #0]
800404a: 429a cmp r2, r3
800404c: d017 beq.n 800407e <m3ch+0x42>
memm3st=m3st;
800404e: 4b5b ldr r3, [pc, #364] @ (80041bc <m3ch+0x180>)
8004050: 781a ldrb r2, [r3, #0]
8004052: 4b59 ldr r3, [pc, #356] @ (80041b8 <m3ch+0x17c>)
8004054: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ch=%d",m3st);
8004056: 4b59 ldr r3, [pc, #356] @ (80041bc <m3ch+0x180>)
8004058: 781b ldrb r3, [r3, #0]
800405a: 461a mov r2, r3
800405c: 1d3b adds r3, r7, #4
800405e: 4958 ldr r1, [pc, #352] @ (80041c0 <m3ch+0x184>)
8004060: 4618 mov r0, r3
8004062: f00a f997 bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8004066: 1d3b adds r3, r7, #4
8004068: 4618 mov r0, r3
800406a: f7fc f86f bl 800014c <strlen>
800406e: 4603 mov r3, r0
8004070: b29a uxth r2, r3
8004072: 1d39 adds r1, r7, #4
8004074: f04f 33ff mov.w r3, #4294967295
8004078: 4852 ldr r0, [pc, #328] @ (80041c4 <m3ch+0x188>)
800407a: f005 fb9b bl 80097b4 <HAL_UART_Transmit>
}
if(rtCiclo<chM3start)m3st=motWaiting;
800407e: 4b52 ldr r3, [pc, #328] @ (80041c8 <m3ch+0x18c>)
8004080: 881b ldrh r3, [r3, #0]
8004082: b29a uxth r2, r3
8004084: 4b51 ldr r3, [pc, #324] @ (80041cc <m3ch+0x190>)
8004086: 881b ldrh r3, [r3, #0]
8004088: 429a cmp r2, r3
800408a: d202 bcs.n 8004092 <m3ch+0x56>
800408c: 4b4b ldr r3, [pc, #300] @ (80041bc <m3ch+0x180>)
800408e: 2200 movs r2, #0
8004090: 701a strb r2, [r3, #0]
switch(m3st){
8004092: 4b4a ldr r3, [pc, #296] @ (80041bc <m3ch+0x180>)
8004094: 781b ldrb r3, [r3, #0]
8004096: 2b03 cmp r3, #3
8004098: d876 bhi.n 8004188 <m3ch+0x14c>
800409a: a201 add r2, pc, #4 @ (adr r2, 80040a0 <m3ch+0x64>)
800409c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80040a0: 080040b1 .word 0x080040b1
80040a4: 080040fd .word 0x080040fd
80040a8: 0800412d .word 0x0800412d
80040ac: 0800415f .word 0x0800415f
case motWaiting:
SetMotPerc(M3,FW,0);
80040b0: 2200 movs r2, #0
80040b2: 2100 movs r1, #0
80040b4: 2003 movs r0, #3
80040b6: f000 fb4f bl 8004758 <SetMotPerc>
SetMotPerc(M3,BW,0);
80040ba: 2200 movs r2, #0
80040bc: 2101 movs r1, #1
80040be: 2003 movs r0, #3
80040c0: f000 fb4a bl 8004758 <SetMotPerc>
if(rtCiclo>=chM3start){
80040c4: 4b40 ldr r3, [pc, #256] @ (80041c8 <m3ch+0x18c>)
80040c6: 881b ldrh r3, [r3, #0]
80040c8: b29a uxth r2, r3
80040ca: 4b40 ldr r3, [pc, #256] @ (80041cc <m3ch+0x190>)
80040cc: 881b ldrh r3, [r3, #0]
80040ce: 429a cmp r2, r3
80040d0: d365 bcc.n 800419e <m3ch+0x162>
(void)ramp(M3,BW,mrampstart[M3-1],m2pwmch,tramp,RAMPINIT);
80040d2: 4b3f ldr r3, [pc, #252] @ (80041d0 <m3ch+0x194>)
80040d4: 889b ldrh r3, [r3, #4]
80040d6: b2da uxtb r2, r3
80040d8: 4b3e ldr r3, [pc, #248] @ (80041d4 <m3ch+0x198>)
80040da: 881b ldrh r3, [r3, #0]
80040dc: b2d9 uxtb r1, r3
80040de: 4b3e ldr r3, [pc, #248] @ (80041d8 <m3ch+0x19c>)
80040e0: 881b ldrh r3, [r3, #0]
80040e2: b2db uxtb r3, r3
80040e4: 2000 movs r0, #0
80040e6: 9001 str r0, [sp, #4]
80040e8: 9300 str r3, [sp, #0]
80040ea: 460b mov r3, r1
80040ec: 2101 movs r1, #1
80040ee: 2003 movs r0, #3
80040f0: f000 fcb2 bl 8004a58 <ramp>
m3st=motStartRamp;
80040f4: 4b31 ldr r3, [pc, #196] @ (80041bc <m3ch+0x180>)
80040f6: 2201 movs r2, #1
80040f8: 701a strb r2, [r3, #0]
}
break;
80040fa: e050 b.n 800419e <m3ch+0x162>
case motStartRamp:
if(ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){
80040fc: 4b34 ldr r3, [pc, #208] @ (80041d0 <m3ch+0x194>)
80040fe: 889b ldrh r3, [r3, #4]
8004100: b2da uxtb r2, r3
8004102: 4b36 ldr r3, [pc, #216] @ (80041dc <m3ch+0x1a0>)
8004104: 881b ldrh r3, [r3, #0]
8004106: b2d9 uxtb r1, r3
8004108: 4b33 ldr r3, [pc, #204] @ (80041d8 <m3ch+0x19c>)
800410a: 881b ldrh r3, [r3, #0]
800410c: b2db uxtb r3, r3
800410e: 200a movs r0, #10
8004110: 9001 str r0, [sp, #4]
8004112: 9300 str r3, [sp, #0]
8004114: 460b mov r3, r1
8004116: 2101 movs r1, #1
8004118: 2003 movs r0, #3
800411a: f000 fc9d bl 8004a58 <ramp>
800411e: 4603 mov r3, r0
8004120: 2b00 cmp r3, #0
8004122: d13e bne.n 80041a2 <m3ch+0x166>
m3st=motWaitingTime;
8004124: 4b25 ldr r3, [pc, #148] @ (80041bc <m3ch+0x180>)
8004126: 2202 movs r2, #2
8004128: 701a strb r2, [r3, #0]
}
break;
800412a: e03a b.n 80041a2 <m3ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM3stop){
800412c: 4b26 ldr r3, [pc, #152] @ (80041c8 <m3ch+0x18c>)
800412e: 881b ldrh r3, [r3, #0]
8004130: b29a uxth r2, r3
8004132: 4b2b ldr r3, [pc, #172] @ (80041e0 <m3ch+0x1a4>)
8004134: 881b ldrh r3, [r3, #0]
8004136: 429a cmp r2, r3
8004138: d335 bcc.n 80041a6 <m3ch+0x16a>
(void)ramp(M3,BW,m3pwmch,0,tramp,RAMPINIT);
800413a: 4b28 ldr r3, [pc, #160] @ (80041dc <m3ch+0x1a0>)
800413c: 881b ldrh r3, [r3, #0]
800413e: b2da uxtb r2, r3
8004140: 4b25 ldr r3, [pc, #148] @ (80041d8 <m3ch+0x19c>)
8004142: 881b ldrh r3, [r3, #0]
8004144: b2db uxtb r3, r3
8004146: 2100 movs r1, #0
8004148: 9101 str r1, [sp, #4]
800414a: 9300 str r3, [sp, #0]
800414c: 2300 movs r3, #0
800414e: 2101 movs r1, #1
8004150: 2003 movs r0, #3
8004152: f000 fc81 bl 8004a58 <ramp>
m3st=motStopRamp;
8004156: 4b19 ldr r3, [pc, #100] @ (80041bc <m3ch+0x180>)
8004158: 2203 movs r2, #3
800415a: 701a strb r2, [r3, #0]
}
break;
800415c: e023 b.n 80041a6 <m3ch+0x16a>
case motStopRamp:
if(ramp(M3,BW,m3pwmch,0,tramp,RAMPRUN)==DONE){
800415e: 4b1f ldr r3, [pc, #124] @ (80041dc <m3ch+0x1a0>)
8004160: 881b ldrh r3, [r3, #0]
8004162: b2da uxtb r2, r3
8004164: 4b1c ldr r3, [pc, #112] @ (80041d8 <m3ch+0x19c>)
8004166: 881b ldrh r3, [r3, #0]
8004168: b2db uxtb r3, r3
800416a: 210a movs r1, #10
800416c: 9101 str r1, [sp, #4]
800416e: 9300 str r3, [sp, #0]
8004170: 2300 movs r3, #0
8004172: 2101 movs r1, #1
8004174: 2003 movs r0, #3
8004176: f000 fc6f bl 8004a58 <ramp>
800417a: 4603 mov r3, r0
800417c: 2b00 cmp r3, #0
800417e: d114 bne.n 80041aa <m3ch+0x16e>
m3st=motStop;
8004180: 4b0e ldr r3, [pc, #56] @ (80041bc <m3ch+0x180>)
8004182: 2204 movs r2, #4
8004184: 701a strb r2, [r3, #0]
}
break;
8004186: e010 b.n 80041aa <m3ch+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8004188: 2200 movs r2, #0
800418a: 2100 movs r1, #0
800418c: 2003 movs r0, #3
800418e: f000 fae3 bl 8004758 <SetMotPerc>
SetMotPerc(M3,BW,0);
8004192: 2200 movs r2, #0
8004194: 2101 movs r1, #1
8004196: 2003 movs r0, #3
8004198: f000 fade bl 8004758 <SetMotPerc>
break;
800419c: e006 b.n 80041ac <m3ch+0x170>
break;
800419e: bf00 nop
80041a0: e004 b.n 80041ac <m3ch+0x170>
break;
80041a2: bf00 nop
80041a4: e002 b.n 80041ac <m3ch+0x170>
break;
80041a6: bf00 nop
80041a8: e000 b.n 80041ac <m3ch+0x170>
break;
80041aa: bf00 nop
}
return m3st;
80041ac: 4b03 ldr r3, [pc, #12] @ (80041bc <m3ch+0x180>)
80041ae: 781b ldrb r3, [r3, #0]
}
80041b0: 4618 mov r0, r3
80041b2: 3768 adds r7, #104 @ 0x68
80041b4: 46bd mov sp, r7
80041b6: bd80 pop {r7, pc}
80041b8: 2000000d .word 0x2000000d
80041bc: 20000468 .word 0x20000468
80041c0: 0800f338 .word 0x0800f338
80041c4: 200003a8 .word 0x200003a8
80041c8: 200003fc .word 0x200003fc
80041cc: 20000440 .word 0x20000440
80041d0: 2000044c .word 0x2000044c
80041d4: 20000406 .word 0x20000406
80041d8: 20000418 .word 0x20000418
80041dc: 2000040a .word 0x2000040a
80041e0: 20000442 .word 0x20000442
080041e4 <m4ch>:
motMov_st m4ch(void){
80041e4: b580 push {r7, lr}
80041e6: b09c sub sp, #112 @ 0x70
80041e8: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
80041ea: 4b5d ldr r3, [pc, #372] @ (8004360 <m4ch+0x17c>)
80041ec: 781a ldrb r2, [r3, #0]
80041ee: 4b5d ldr r3, [pc, #372] @ (8004364 <m4ch+0x180>)
80041f0: 781b ldrb r3, [r3, #0]
80041f2: 429a cmp r2, r3
80041f4: d017 beq.n 8004226 <m4ch+0x42>
memm4st=m4st;
80041f6: 4b5b ldr r3, [pc, #364] @ (8004364 <m4ch+0x180>)
80041f8: 781a ldrb r2, [r3, #0]
80041fa: 4b59 ldr r3, [pc, #356] @ (8004360 <m4ch+0x17c>)
80041fc: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ch=%d",m4st);
80041fe: 4b59 ldr r3, [pc, #356] @ (8004364 <m4ch+0x180>)
8004200: 781b ldrb r3, [r3, #0]
8004202: 461a mov r2, r3
8004204: 1d3b adds r3, r7, #4
8004206: 4958 ldr r1, [pc, #352] @ (8004368 <m4ch+0x184>)
8004208: 4618 mov r0, r3
800420a: f00a f8c3 bl 800e394 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800420e: 1d3b adds r3, r7, #4
8004210: 4618 mov r0, r3
8004212: f7fb ff9b bl 800014c <strlen>
8004216: 4603 mov r3, r0
8004218: b29a uxth r2, r3
800421a: 1d39 adds r1, r7, #4
800421c: f04f 33ff mov.w r3, #4294967295
8004220: 4852 ldr r0, [pc, #328] @ (800436c <m4ch+0x188>)
8004222: f005 fac7 bl 80097b4 <HAL_UART_Transmit>
}
if(rtCiclo<chM4start)m4st=motWaiting;
8004226: 4b52 ldr r3, [pc, #328] @ (8004370 <m4ch+0x18c>)
8004228: 881b ldrh r3, [r3, #0]
800422a: b29a uxth r2, r3
800422c: 4b51 ldr r3, [pc, #324] @ (8004374 <m4ch+0x190>)
800422e: 881b ldrh r3, [r3, #0]
8004230: 429a cmp r2, r3
8004232: d202 bcs.n 800423a <m4ch+0x56>
8004234: 4b4b ldr r3, [pc, #300] @ (8004364 <m4ch+0x180>)
8004236: 2200 movs r2, #0
8004238: 701a strb r2, [r3, #0]
switch(m4st){
800423a: 4b4a ldr r3, [pc, #296] @ (8004364 <m4ch+0x180>)
800423c: 781b ldrb r3, [r3, #0]
800423e: 2b03 cmp r3, #3
8004240: d876 bhi.n 8004330 <m4ch+0x14c>
8004242: a201 add r2, pc, #4 @ (adr r2, 8004248 <m4ch+0x64>)
8004244: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004248: 08004259 .word 0x08004259
800424c: 080042a5 .word 0x080042a5
8004250: 080042d5 .word 0x080042d5
8004254: 08004307 .word 0x08004307
case motWaiting:
SetMotPerc(M4,FW,0);
8004258: 2200 movs r2, #0
800425a: 2100 movs r1, #0
800425c: 2004 movs r0, #4
800425e: f000 fa7b bl 8004758 <SetMotPerc>
SetMotPerc(M4,BW,0);
8004262: 2200 movs r2, #0
8004264: 2101 movs r1, #1
8004266: 2004 movs r0, #4
8004268: f000 fa76 bl 8004758 <SetMotPerc>
if(rtCiclo>=chM4start){
800426c: 4b40 ldr r3, [pc, #256] @ (8004370 <m4ch+0x18c>)
800426e: 881b ldrh r3, [r3, #0]
8004270: b29a uxth r2, r3
8004272: 4b40 ldr r3, [pc, #256] @ (8004374 <m4ch+0x190>)
8004274: 881b ldrh r3, [r3, #0]
8004276: 429a cmp r2, r3
8004278: d365 bcc.n 8004346 <m4ch+0x162>
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPINIT);
800427a: 4b3f ldr r3, [pc, #252] @ (8004378 <m4ch+0x194>)
800427c: 88db ldrh r3, [r3, #6]
800427e: b2da uxtb r2, r3
8004280: 4b3e ldr r3, [pc, #248] @ (800437c <m4ch+0x198>)
8004282: 881b ldrh r3, [r3, #0]
8004284: b2d9 uxtb r1, r3
8004286: 4b3e ldr r3, [pc, #248] @ (8004380 <m4ch+0x19c>)
8004288: 881b ldrh r3, [r3, #0]
800428a: b2db uxtb r3, r3
800428c: 2000 movs r0, #0
800428e: 9001 str r0, [sp, #4]
8004290: 9300 str r3, [sp, #0]
8004292: 460b mov r3, r1
8004294: 2101 movs r1, #1
8004296: 2004 movs r0, #4
8004298: f000 fbde bl 8004a58 <ramp>
m4st=motStartRamp;
800429c: 4b31 ldr r3, [pc, #196] @ (8004364 <m4ch+0x180>)
800429e: 2201 movs r2, #1
80042a0: 701a strb r2, [r3, #0]
}
break;
80042a2: e050 b.n 8004346 <m4ch+0x162>
case motStartRamp:
if(ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE){
80042a4: 4b34 ldr r3, [pc, #208] @ (8004378 <m4ch+0x194>)
80042a6: 88db ldrh r3, [r3, #6]
80042a8: b2da uxtb r2, r3
80042aa: 4b34 ldr r3, [pc, #208] @ (800437c <m4ch+0x198>)
80042ac: 881b ldrh r3, [r3, #0]
80042ae: b2d9 uxtb r1, r3
80042b0: 4b33 ldr r3, [pc, #204] @ (8004380 <m4ch+0x19c>)
80042b2: 881b ldrh r3, [r3, #0]
80042b4: b2db uxtb r3, r3
80042b6: 200a movs r0, #10
80042b8: 9001 str r0, [sp, #4]
80042ba: 9300 str r3, [sp, #0]
80042bc: 460b mov r3, r1
80042be: 2101 movs r1, #1
80042c0: 2004 movs r0, #4
80042c2: f000 fbc9 bl 8004a58 <ramp>
80042c6: 4603 mov r3, r0
80042c8: 2b00 cmp r3, #0
80042ca: d13e bne.n 800434a <m4ch+0x166>
m4st=motWaitingTime;
80042cc: 4b25 ldr r3, [pc, #148] @ (8004364 <m4ch+0x180>)
80042ce: 2202 movs r2, #2
80042d0: 701a strb r2, [r3, #0]
}
break;
80042d2: e03a b.n 800434a <m4ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM4stop){
80042d4: 4b26 ldr r3, [pc, #152] @ (8004370 <m4ch+0x18c>)
80042d6: 881b ldrh r3, [r3, #0]
80042d8: b29a uxth r2, r3
80042da: 4b2a ldr r3, [pc, #168] @ (8004384 <m4ch+0x1a0>)
80042dc: 881b ldrh r3, [r3, #0]
80042de: 429a cmp r2, r3
80042e0: d335 bcc.n 800434e <m4ch+0x16a>
(void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT);
80042e2: 4b26 ldr r3, [pc, #152] @ (800437c <m4ch+0x198>)
80042e4: 881b ldrh r3, [r3, #0]
80042e6: b2da uxtb r2, r3
80042e8: 4b25 ldr r3, [pc, #148] @ (8004380 <m4ch+0x19c>)
80042ea: 881b ldrh r3, [r3, #0]
80042ec: b2db uxtb r3, r3
80042ee: 2100 movs r1, #0
80042f0: 9101 str r1, [sp, #4]
80042f2: 9300 str r3, [sp, #0]
80042f4: 2300 movs r3, #0
80042f6: 2101 movs r1, #1
80042f8: 2004 movs r0, #4
80042fa: f000 fbad bl 8004a58 <ramp>
m4st=motStopRamp;
80042fe: 4b19 ldr r3, [pc, #100] @ (8004364 <m4ch+0x180>)
8004300: 2203 movs r2, #3
8004302: 701a strb r2, [r3, #0]
}
break;
8004304: e023 b.n 800434e <m4ch+0x16a>
case motStopRamp:
if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){
8004306: 4b1d ldr r3, [pc, #116] @ (800437c <m4ch+0x198>)
8004308: 881b ldrh r3, [r3, #0]
800430a: b2da uxtb r2, r3
800430c: 4b1c ldr r3, [pc, #112] @ (8004380 <m4ch+0x19c>)
800430e: 881b ldrh r3, [r3, #0]
8004310: b2db uxtb r3, r3
8004312: 210a movs r1, #10
8004314: 9101 str r1, [sp, #4]
8004316: 9300 str r3, [sp, #0]
8004318: 2300 movs r3, #0
800431a: 2101 movs r1, #1
800431c: 2004 movs r0, #4
800431e: f000 fb9b bl 8004a58 <ramp>
8004322: 4603 mov r3, r0
8004324: 2b00 cmp r3, #0
8004326: d114 bne.n 8004352 <m4ch+0x16e>
m4st=motStop;
8004328: 4b0e ldr r3, [pc, #56] @ (8004364 <m4ch+0x180>)
800432a: 2204 movs r2, #4
800432c: 701a strb r2, [r3, #0]
}
break;
800432e: e010 b.n 8004352 <m4ch+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8004330: 2200 movs r2, #0
8004332: 2100 movs r1, #0
8004334: 2004 movs r0, #4
8004336: f000 fa0f bl 8004758 <SetMotPerc>
SetMotPerc(M4,BW,0);
800433a: 2200 movs r2, #0
800433c: 2101 movs r1, #1
800433e: 2004 movs r0, #4
8004340: f000 fa0a bl 8004758 <SetMotPerc>
break;
8004344: e006 b.n 8004354 <m4ch+0x170>
break;
8004346: bf00 nop
8004348: e004 b.n 8004354 <m4ch+0x170>
break;
800434a: bf00 nop
800434c: e002 b.n 8004354 <m4ch+0x170>
break;
800434e: bf00 nop
8004350: e000 b.n 8004354 <m4ch+0x170>
break;
8004352: bf00 nop
}
return m4st;
8004354: 4b03 ldr r3, [pc, #12] @ (8004364 <m4ch+0x180>)
8004356: 781b ldrb r3, [r3, #0]
}
8004358: 4618 mov r0, r3
800435a: 3768 adds r7, #104 @ 0x68
800435c: 46bd mov sp, r7
800435e: bd80 pop {r7, pc}
8004360: 2000000e .word 0x2000000e
8004364: 20000469 .word 0x20000469
8004368: 0800f344 .word 0x0800f344
800436c: 200003a8 .word 0x200003a8
8004370: 200003fc .word 0x200003fc
8004374: 20000444 .word 0x20000444
8004378: 2000044c .word 0x2000044c
800437c: 2000040e .word 0x2000040e
8004380: 20000418 .word 0x20000418
8004384: 20000446 .word 0x20000446
08004388 <IsPwmRunning>:
extern volatile uint16_t rtramp[4];
extern uint16_t mrampstart[4];
extern UART_HandleTypeDef huart1;
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8004388: b580 push {r7, lr}
800438a: b084 sub sp, #16
800438c: af00 add r7, sp, #0
800438e: 6078 str r0, [r7, #4]
8004390: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
8004392: 6839 ldr r1, [r7, #0]
8004394: 6878 ldr r0, [r7, #4]
8004396: f004 fe86 bl 80090a6 <HAL_TIM_GetChannelState>
800439a: 4603 mov r3, r0
800439c: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
800439e: 7bfb ldrb r3, [r7, #15]
80043a0: 2b02 cmp r3, #2
80043a2: bf0c ite eq
80043a4: 2301 moveq r3, #1
80043a6: 2300 movne r3, #0
80043a8: b2db uxtb r3, r3
}
80043aa: 4618 mov r0, r3
80043ac: 3710 adds r7, #16
80043ae: 46bd mov sp, r7
80043b0: bd80 pop {r7, pc}
080043b2 <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
80043b2: b580 push {r7, lr}
80043b4: b082 sub sp, #8
80043b6: af00 add r7, sp, #0
80043b8: 6078 str r0, [r7, #4]
80043ba: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
80043bc: 6839 ldr r1, [r7, #0]
80043be: 6878 ldr r0, [r7, #4]
80043c0: f004 fc84 bl 8008ccc <HAL_TIM_PWM_Stop>
}
80043c4: bf00 nop
80043c6: 3708 adds r7, #8
80043c8: 46bd mov sp, r7
80043ca: bd80 pop {r7, pc}
080043cc <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
80043cc: b580 push {r7, lr}
80043ce: b084 sub sp, #16
80043d0: af00 add r7, sp, #0
80043d2: 60f8 str r0, [r7, #12]
80043d4: 60b9 str r1, [r7, #8]
80043d6: 4613 mov r3, r2
80043d8: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80043da: 68bb ldr r3, [r7, #8]
80043dc: 2b00 cmp r3, #0
80043de: d104 bne.n 80043ea <StartMot+0x1e>
80043e0: 68fb ldr r3, [r7, #12]
80043e2: 681b ldr r3, [r3, #0]
80043e4: 88fa ldrh r2, [r7, #6]
80043e6: 635a str r2, [r3, #52] @ 0x34
80043e8: e013 b.n 8004412 <StartMot+0x46>
80043ea: 68bb ldr r3, [r7, #8]
80043ec: 2b04 cmp r3, #4
80043ee: d104 bne.n 80043fa <StartMot+0x2e>
80043f0: 68fb ldr r3, [r7, #12]
80043f2: 681a ldr r2, [r3, #0]
80043f4: 88fb ldrh r3, [r7, #6]
80043f6: 6393 str r3, [r2, #56] @ 0x38
80043f8: e00b b.n 8004412 <StartMot+0x46>
80043fa: 68bb ldr r3, [r7, #8]
80043fc: 2b08 cmp r3, #8
80043fe: d104 bne.n 800440a <StartMot+0x3e>
8004400: 68fb ldr r3, [r7, #12]
8004402: 681a ldr r2, [r3, #0]
8004404: 88fb ldrh r3, [r7, #6]
8004406: 63d3 str r3, [r2, #60] @ 0x3c
8004408: e003 b.n 8004412 <StartMot+0x46>
800440a: 68fb ldr r3, [r7, #12]
800440c: 681a ldr r2, [r3, #0]
800440e: 88fb ldrh r3, [r7, #6]
8004410: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
8004412: 68b9 ldr r1, [r7, #8]
8004414: 68f8 ldr r0, [r7, #12]
8004416: f004 fbb7 bl 8008b88 <HAL_TIM_PWM_Start>
}
800441a: bf00 nop
800441c: 3710 adds r7, #16
800441e: 46bd mov sp, r7
8004420: bd80 pop {r7, pc}
08004422 <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8004422: b480 push {r7}
8004424: b085 sub sp, #20
8004426: af00 add r7, sp, #0
8004428: 60f8 str r0, [r7, #12]
800442a: 60b9 str r1, [r7, #8]
800442c: 4613 mov r3, r2
800442e: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004430: 68bb ldr r3, [r7, #8]
8004432: 2b00 cmp r3, #0
8004434: d104 bne.n 8004440 <SetMotPwm+0x1e>
8004436: 68fb ldr r3, [r7, #12]
8004438: 681b ldr r3, [r3, #0]
800443a: 88fa ldrh r2, [r7, #6]
800443c: 635a str r2, [r3, #52] @ 0x34
}
800443e: e013 b.n 8004468 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004440: 68bb ldr r3, [r7, #8]
8004442: 2b04 cmp r3, #4
8004444: d104 bne.n 8004450 <SetMotPwm+0x2e>
8004446: 68fb ldr r3, [r7, #12]
8004448: 681a ldr r2, [r3, #0]
800444a: 88fb ldrh r3, [r7, #6]
800444c: 6393 str r3, [r2, #56] @ 0x38
}
800444e: e00b b.n 8004468 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004450: 68bb ldr r3, [r7, #8]
8004452: 2b08 cmp r3, #8
8004454: d104 bne.n 8004460 <SetMotPwm+0x3e>
8004456: 68fb ldr r3, [r7, #12]
8004458: 681a ldr r2, [r3, #0]
800445a: 88fb ldrh r3, [r7, #6]
800445c: 63d3 str r3, [r2, #60] @ 0x3c
}
800445e: e003 b.n 8004468 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004460: 68fb ldr r3, [r7, #12]
8004462: 681a ldr r2, [r3, #0]
8004464: 88fb ldrh r3, [r7, #6]
8004466: 6413 str r3, [r2, #64] @ 0x40
}
8004468: bf00 nop
800446a: 3714 adds r7, #20
800446c: 46bd mov sp, r7
800446e: bc80 pop {r7}
8004470: 4770 bx lr
...
08004474 <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
8004474: b580 push {r7, lr}
8004476: b082 sub sp, #8
8004478: af00 add r7, sp, #0
800447a: 4603 mov r3, r0
800447c: 71fb strb r3, [r7, #7]
800447e: 460b mov r3, r1
8004480: 71bb strb r3, [r7, #6]
8004482: 4613 mov r3, r2
8004484: 80bb strh r3, [r7, #4]
switch(mot){
8004486: 79fb ldrb r3, [r7, #7]
8004488: 3b01 subs r3, #1
800448a: 2b03 cmp r3, #3
800448c: f200 8158 bhi.w 8004740 <SetMot+0x2cc>
8004490: a201 add r2, pc, #4 @ (adr r2, 8004498 <SetMot+0x24>)
8004492: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004496: bf00 nop
8004498: 080044a9 .word 0x080044a9
800449c: 0800454b .word 0x0800454b
80044a0: 080045ed .word 0x080045ed
80044a4: 08004697 .word 0x08004697
case 1:
if(dir==FW){
80044a8: 79bb ldrb r3, [r7, #6]
80044aa: 2b00 cmp r3, #0
80044ac: d126 bne.n 80044fc <SetMot+0x88>
if(pwmval==0){
80044ae: 88bb ldrh r3, [r7, #4]
80044b0: 2b00 cmp r3, #0
80044b2: d109 bne.n 80044c8 <SetMot+0x54>
StopMot(timMot1,FWMot1);
80044b4: 2100 movs r1, #0
80044b6: 48a5 ldr r0, [pc, #660] @ (800474c <SetMot+0x2d8>)
80044b8: f7ff ff7b bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
80044bc: 2200 movs r2, #0
80044be: 2102 movs r1, #2
80044c0: 48a3 ldr r0, [pc, #652] @ (8004750 <SetMot+0x2dc>)
80044c2: f002 f878 bl 80065b6 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
80044c6: e13c b.n 8004742 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
80044c8: 2100 movs r1, #0
80044ca: 48a0 ldr r0, [pc, #640] @ (800474c <SetMot+0x2d8>)
80044cc: f7ff ff5c bl 8004388 <IsPwmRunning>
80044d0: 4603 mov r3, r0
80044d2: 2b00 cmp r3, #0
80044d4: d006 beq.n 80044e4 <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
80044d6: 88bb ldrh r3, [r7, #4]
80044d8: 461a mov r2, r3
80044da: 2100 movs r1, #0
80044dc: 489b ldr r0, [pc, #620] @ (800474c <SetMot+0x2d8>)
80044de: f7ff ffa0 bl 8004422 <SetMotPwm>
break;
80044e2: e12e b.n 8004742 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80044e4: 2201 movs r2, #1
80044e6: 2102 movs r1, #2
80044e8: 4899 ldr r0, [pc, #612] @ (8004750 <SetMot+0x2dc>)
80044ea: f002 f864 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
80044ee: 88bb ldrh r3, [r7, #4]
80044f0: 461a mov r2, r3
80044f2: 2100 movs r1, #0
80044f4: 4895 ldr r0, [pc, #596] @ (800474c <SetMot+0x2d8>)
80044f6: f7ff ff69 bl 80043cc <StartMot>
break;
80044fa: e122 b.n 8004742 <SetMot+0x2ce>
if(pwmval==0){
80044fc: 88bb ldrh r3, [r7, #4]
80044fe: 2b00 cmp r3, #0
8004500: d109 bne.n 8004516 <SetMot+0xa2>
StopMot(timMot1,BWMot1);
8004502: 2104 movs r1, #4
8004504: 4891 ldr r0, [pc, #580] @ (800474c <SetMot+0x2d8>)
8004506: f7ff ff54 bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
800450a: 2200 movs r2, #0
800450c: 2102 movs r1, #2
800450e: 4890 ldr r0, [pc, #576] @ (8004750 <SetMot+0x2dc>)
8004510: f002 f851 bl 80065b6 <HAL_GPIO_WritePin>
break;
8004514: e115 b.n 8004742 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
8004516: 2104 movs r1, #4
8004518: 488c ldr r0, [pc, #560] @ (800474c <SetMot+0x2d8>)
800451a: f7ff ff35 bl 8004388 <IsPwmRunning>
800451e: 4603 mov r3, r0
8004520: 2b00 cmp r3, #0
8004522: d006 beq.n 8004532 <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
8004524: 88bb ldrh r3, [r7, #4]
8004526: 461a mov r2, r3
8004528: 2104 movs r1, #4
800452a: 4888 ldr r0, [pc, #544] @ (800474c <SetMot+0x2d8>)
800452c: f7ff ff79 bl 8004422 <SetMotPwm>
break;
8004530: e107 b.n 8004742 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8004532: 2201 movs r2, #1
8004534: 2102 movs r1, #2
8004536: 4886 ldr r0, [pc, #536] @ (8004750 <SetMot+0x2dc>)
8004538: f002 f83d bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
800453c: 88bb ldrh r3, [r7, #4]
800453e: 461a mov r2, r3
8004540: 2104 movs r1, #4
8004542: 4882 ldr r0, [pc, #520] @ (800474c <SetMot+0x2d8>)
8004544: f7ff ff42 bl 80043cc <StartMot>
break;
8004548: e0fb b.n 8004742 <SetMot+0x2ce>
case 2:
if(dir==FW){
800454a: 79bb ldrb r3, [r7, #6]
800454c: 2b00 cmp r3, #0
800454e: d126 bne.n 800459e <SetMot+0x12a>
if(pwmval==0){
8004550: 88bb ldrh r3, [r7, #4]
8004552: 2b00 cmp r3, #0
8004554: d109 bne.n 800456a <SetMot+0xf6>
StopMot(timMot2,FWMot2);
8004556: 2108 movs r1, #8
8004558: 487c ldr r0, [pc, #496] @ (800474c <SetMot+0x2d8>)
800455a: f7ff ff2a bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
800455e: 2200 movs r2, #0
8004560: 2104 movs r1, #4
8004562: 487b ldr r0, [pc, #492] @ (8004750 <SetMot+0x2dc>)
8004564: f002 f827 bl 80065b6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8004568: e0eb b.n 8004742 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
800456a: 2108 movs r1, #8
800456c: 4877 ldr r0, [pc, #476] @ (800474c <SetMot+0x2d8>)
800456e: f7ff ff0b bl 8004388 <IsPwmRunning>
8004572: 4603 mov r3, r0
8004574: 2b00 cmp r3, #0
8004576: d006 beq.n 8004586 <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
8004578: 88bb ldrh r3, [r7, #4]
800457a: 461a mov r2, r3
800457c: 2108 movs r1, #8
800457e: 4873 ldr r0, [pc, #460] @ (800474c <SetMot+0x2d8>)
8004580: f7ff ff4f bl 8004422 <SetMotPwm>
break;
8004584: e0dd b.n 8004742 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004586: 2201 movs r2, #1
8004588: 2104 movs r1, #4
800458a: 4871 ldr r0, [pc, #452] @ (8004750 <SetMot+0x2dc>)
800458c: f002 f813 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8004590: 88bb ldrh r3, [r7, #4]
8004592: 461a mov r2, r3
8004594: 2108 movs r1, #8
8004596: 486d ldr r0, [pc, #436] @ (800474c <SetMot+0x2d8>)
8004598: f7ff ff18 bl 80043cc <StartMot>
break;
800459c: e0d1 b.n 8004742 <SetMot+0x2ce>
if(pwmval==0){
800459e: 88bb ldrh r3, [r7, #4]
80045a0: 2b00 cmp r3, #0
80045a2: d109 bne.n 80045b8 <SetMot+0x144>
StopMot(timMot2,BWMot2);
80045a4: 210c movs r1, #12
80045a6: 4869 ldr r0, [pc, #420] @ (800474c <SetMot+0x2d8>)
80045a8: f7ff ff03 bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80045ac: 2200 movs r2, #0
80045ae: 2104 movs r1, #4
80045b0: 4867 ldr r0, [pc, #412] @ (8004750 <SetMot+0x2dc>)
80045b2: f002 f800 bl 80065b6 <HAL_GPIO_WritePin>
break;
80045b6: e0c4 b.n 8004742 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
80045b8: 210c movs r1, #12
80045ba: 4864 ldr r0, [pc, #400] @ (800474c <SetMot+0x2d8>)
80045bc: f7ff fee4 bl 8004388 <IsPwmRunning>
80045c0: 4603 mov r3, r0
80045c2: 2b00 cmp r3, #0
80045c4: d006 beq.n 80045d4 <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
80045c6: 88bb ldrh r3, [r7, #4]
80045c8: 461a mov r2, r3
80045ca: 210c movs r1, #12
80045cc: 485f ldr r0, [pc, #380] @ (800474c <SetMot+0x2d8>)
80045ce: f7ff ff28 bl 8004422 <SetMotPwm>
break;
80045d2: e0b6 b.n 8004742 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
80045d4: 2201 movs r2, #1
80045d6: 2104 movs r1, #4
80045d8: 485d ldr r0, [pc, #372] @ (8004750 <SetMot+0x2dc>)
80045da: f001 ffec bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
80045de: 88bb ldrh r3, [r7, #4]
80045e0: 461a mov r2, r3
80045e2: 210c movs r1, #12
80045e4: 4859 ldr r0, [pc, #356] @ (800474c <SetMot+0x2d8>)
80045e6: f7ff fef1 bl 80043cc <StartMot>
break;
80045ea: e0aa b.n 8004742 <SetMot+0x2ce>
case 3:
if(dir==FW){
80045ec: 79bb ldrb r3, [r7, #6]
80045ee: 2b00 cmp r3, #0
80045f0: d128 bne.n 8004644 <SetMot+0x1d0>
if(pwmval==0){
80045f2: 88bb ldrh r3, [r7, #4]
80045f4: 2b00 cmp r3, #0
80045f6: d10a bne.n 800460e <SetMot+0x19a>
StopMot(timMot3,FWMot3);
80045f8: 2100 movs r1, #0
80045fa: 4856 ldr r0, [pc, #344] @ (8004754 <SetMot+0x2e0>)
80045fc: f7ff fed9 bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004600: 2200 movs r2, #0
8004602: f44f 6180 mov.w r1, #1024 @ 0x400
8004606: 4852 ldr r0, [pc, #328] @ (8004750 <SetMot+0x2dc>)
8004608: f001 ffd5 bl 80065b6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
800460c: e099 b.n 8004742 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
800460e: 2100 movs r1, #0
8004610: 4850 ldr r0, [pc, #320] @ (8004754 <SetMot+0x2e0>)
8004612: f7ff feb9 bl 8004388 <IsPwmRunning>
8004616: 4603 mov r3, r0
8004618: 2b00 cmp r3, #0
800461a: d006 beq.n 800462a <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
800461c: 88bb ldrh r3, [r7, #4]
800461e: 461a mov r2, r3
8004620: 2100 movs r1, #0
8004622: 484c ldr r0, [pc, #304] @ (8004754 <SetMot+0x2e0>)
8004624: f7ff fefd bl 8004422 <SetMotPwm>
break;
8004628: e08b b.n 8004742 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
800462a: 2201 movs r2, #1
800462c: f44f 6180 mov.w r1, #1024 @ 0x400
8004630: 4847 ldr r0, [pc, #284] @ (8004750 <SetMot+0x2dc>)
8004632: f001 ffc0 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8004636: 88bb ldrh r3, [r7, #4]
8004638: 461a mov r2, r3
800463a: 2100 movs r1, #0
800463c: 4845 ldr r0, [pc, #276] @ (8004754 <SetMot+0x2e0>)
800463e: f7ff fec5 bl 80043cc <StartMot>
break;
8004642: e07e b.n 8004742 <SetMot+0x2ce>
if(pwmval==0){
8004644: 88bb ldrh r3, [r7, #4]
8004646: 2b00 cmp r3, #0
8004648: d10a bne.n 8004660 <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
800464a: 2104 movs r1, #4
800464c: 4841 ldr r0, [pc, #260] @ (8004754 <SetMot+0x2e0>)
800464e: f7ff feb0 bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004652: 2200 movs r2, #0
8004654: f44f 6180 mov.w r1, #1024 @ 0x400
8004658: 483d ldr r0, [pc, #244] @ (8004750 <SetMot+0x2dc>)
800465a: f001 ffac bl 80065b6 <HAL_GPIO_WritePin>
break;
800465e: e070 b.n 8004742 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
8004660: 2104 movs r1, #4
8004662: 483c ldr r0, [pc, #240] @ (8004754 <SetMot+0x2e0>)
8004664: f7ff fe90 bl 8004388 <IsPwmRunning>
8004668: 4603 mov r3, r0
800466a: 2b00 cmp r3, #0
800466c: d006 beq.n 800467c <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
800466e: 88bb ldrh r3, [r7, #4]
8004670: 461a mov r2, r3
8004672: 2104 movs r1, #4
8004674: 4837 ldr r0, [pc, #220] @ (8004754 <SetMot+0x2e0>)
8004676: f7ff fed4 bl 8004422 <SetMotPwm>
break;
800467a: e062 b.n 8004742 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
800467c: 2201 movs r2, #1
800467e: f44f 6180 mov.w r1, #1024 @ 0x400
8004682: 4833 ldr r0, [pc, #204] @ (8004750 <SetMot+0x2dc>)
8004684: f001 ff97 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004688: 88bb ldrh r3, [r7, #4]
800468a: 461a mov r2, r3
800468c: 2104 movs r1, #4
800468e: 4831 ldr r0, [pc, #196] @ (8004754 <SetMot+0x2e0>)
8004690: f7ff fe9c bl 80043cc <StartMot>
break;
8004694: e055 b.n 8004742 <SetMot+0x2ce>
case 4:
if(dir==FW){
8004696: 79bb ldrb r3, [r7, #6]
8004698: 2b00 cmp r3, #0
800469a: d128 bne.n 80046ee <SetMot+0x27a>
if(pwmval==0){
800469c: 88bb ldrh r3, [r7, #4]
800469e: 2b00 cmp r3, #0
80046a0: d10a bne.n 80046b8 <SetMot+0x244>
StopMot(timMot4,FWMot4);
80046a2: 2108 movs r1, #8
80046a4: 482b ldr r0, [pc, #172] @ (8004754 <SetMot+0x2e0>)
80046a6: f7ff fe84 bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
80046aa: 2200 movs r2, #0
80046ac: f44f 6100 mov.w r1, #2048 @ 0x800
80046b0: 4827 ldr r0, [pc, #156] @ (8004750 <SetMot+0x2dc>)
80046b2: f001 ff80 bl 80065b6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
80046b6: e044 b.n 8004742 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
80046b8: 2108 movs r1, #8
80046ba: 4826 ldr r0, [pc, #152] @ (8004754 <SetMot+0x2e0>)
80046bc: f7ff fe64 bl 8004388 <IsPwmRunning>
80046c0: 4603 mov r3, r0
80046c2: 2b00 cmp r3, #0
80046c4: d006 beq.n 80046d4 <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
80046c6: 88bb ldrh r3, [r7, #4]
80046c8: 461a mov r2, r3
80046ca: 2108 movs r1, #8
80046cc: 4821 ldr r0, [pc, #132] @ (8004754 <SetMot+0x2e0>)
80046ce: f7ff fea8 bl 8004422 <SetMotPwm>
break;
80046d2: e036 b.n 8004742 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80046d4: 2201 movs r2, #1
80046d6: f44f 6100 mov.w r1, #2048 @ 0x800
80046da: 481d ldr r0, [pc, #116] @ (8004750 <SetMot+0x2dc>)
80046dc: f001 ff6b bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
80046e0: 88bb ldrh r3, [r7, #4]
80046e2: 461a mov r2, r3
80046e4: 2108 movs r1, #8
80046e6: 481b ldr r0, [pc, #108] @ (8004754 <SetMot+0x2e0>)
80046e8: f7ff fe70 bl 80043cc <StartMot>
break;
80046ec: e029 b.n 8004742 <SetMot+0x2ce>
if(pwmval==0){
80046ee: 88bb ldrh r3, [r7, #4]
80046f0: 2b00 cmp r3, #0
80046f2: d10a bne.n 800470a <SetMot+0x296>
StopMot(timMot4,BWMot4);
80046f4: 210c movs r1, #12
80046f6: 4817 ldr r0, [pc, #92] @ (8004754 <SetMot+0x2e0>)
80046f8: f7ff fe5b bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
80046fc: 2200 movs r2, #0
80046fe: f44f 6100 mov.w r1, #2048 @ 0x800
8004702: 4813 ldr r0, [pc, #76] @ (8004750 <SetMot+0x2dc>)
8004704: f001 ff57 bl 80065b6 <HAL_GPIO_WritePin>
break;
8004708: e01b b.n 8004742 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
800470a: 210c movs r1, #12
800470c: 4811 ldr r0, [pc, #68] @ (8004754 <SetMot+0x2e0>)
800470e: f7ff fe3b bl 8004388 <IsPwmRunning>
8004712: 4603 mov r3, r0
8004714: 2b00 cmp r3, #0
8004716: d006 beq.n 8004726 <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
8004718: 88bb ldrh r3, [r7, #4]
800471a: 461a mov r2, r3
800471c: 210c movs r1, #12
800471e: 480d ldr r0, [pc, #52] @ (8004754 <SetMot+0x2e0>)
8004720: f7ff fe7f bl 8004422 <SetMotPwm>
break;
8004724: e00d b.n 8004742 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004726: 2201 movs r2, #1
8004728: f44f 6100 mov.w r1, #2048 @ 0x800
800472c: 4808 ldr r0, [pc, #32] @ (8004750 <SetMot+0x2dc>)
800472e: f001 ff42 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
8004732: 88bb ldrh r3, [r7, #4]
8004734: 461a mov r2, r3
8004736: 210c movs r1, #12
8004738: 4806 ldr r0, [pc, #24] @ (8004754 <SetMot+0x2e0>)
800473a: f7ff fe47 bl 80043cc <StartMot>
break;
800473e: e000 b.n 8004742 <SetMot+0x2ce>
default:
break;
8004740: bf00 nop
}
}
8004742: bf00 nop
8004744: 3708 adds r7, #8
8004746: 46bd mov sp, r7
8004748: bd80 pop {r7, pc}
800474a: bf00 nop
800474c: 20000318 .word 0x20000318
8004750: 40010c00 .word 0x40010c00
8004754: 20000360 .word 0x20000360
08004758 <SetMotPerc>:
void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){
8004758: b580 push {r7, lr}
800475a: b084 sub sp, #16
800475c: af00 add r7, sp, #0
800475e: 4603 mov r3, r0
8004760: 71fb strb r3, [r7, #7]
8004762: 460b mov r3, r1
8004764: 71bb strb r3, [r7, #6]
8004766: 4613 mov r3, r2
8004768: 717b strb r3, [r7, #5]
uint16_t pwmval;
uint32_t tempval;
tempval=perc;
800476a: 797b ldrb r3, [r7, #5]
800476c: 60fb str r3, [r7, #12]
tempval*=16384;
800476e: 68fb ldr r3, [r7, #12]
8004770: 039b lsls r3, r3, #14
8004772: 60fb str r3, [r7, #12]
tempval/=100;
8004774: 68fb ldr r3, [r7, #12]
8004776: 4ab4 ldr r2, [pc, #720] @ (8004a48 <SetMotPerc+0x2f0>)
8004778: fba2 2303 umull r2, r3, r2, r3
800477c: 095b lsrs r3, r3, #5
800477e: 60fb str r3, [r7, #12]
pwmval=(uint16_t)tempval;
8004780: 68fb ldr r3, [r7, #12]
8004782: 817b strh r3, [r7, #10]
switch(mot){
8004784: 79fb ldrb r3, [r7, #7]
8004786: 3b01 subs r3, #1
8004788: 2b03 cmp r3, #3
800478a: f200 8157 bhi.w 8004a3c <SetMotPerc+0x2e4>
800478e: a201 add r2, pc, #4 @ (adr r2, 8004794 <SetMotPerc+0x3c>)
8004790: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004794: 080047a5 .word 0x080047a5
8004798: 08004847 .word 0x08004847
800479c: 080048e9 .word 0x080048e9
80047a0: 08004993 .word 0x08004993
case 1:
if(dir==FW){
80047a4: 79bb ldrb r3, [r7, #6]
80047a6: 2b00 cmp r3, #0
80047a8: d126 bne.n 80047f8 <SetMotPerc+0xa0>
if(pwmval==0){
80047aa: 897b ldrh r3, [r7, #10]
80047ac: 2b00 cmp r3, #0
80047ae: d109 bne.n 80047c4 <SetMotPerc+0x6c>
StopMot(timMot1,FWMot1);
80047b0: 2100 movs r1, #0
80047b2: 48a6 ldr r0, [pc, #664] @ (8004a4c <SetMotPerc+0x2f4>)
80047b4: f7ff fdfd bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
80047b8: 2200 movs r2, #0
80047ba: 2102 movs r1, #2
80047bc: 48a4 ldr r0, [pc, #656] @ (8004a50 <SetMotPerc+0x2f8>)
80047be: f001 fefa bl 80065b6 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
80047c2: e13c b.n 8004a3e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, FWMot1)){
80047c4: 2100 movs r1, #0
80047c6: 48a1 ldr r0, [pc, #644] @ (8004a4c <SetMotPerc+0x2f4>)
80047c8: f7ff fdde bl 8004388 <IsPwmRunning>
80047cc: 4603 mov r3, r0
80047ce: 2b00 cmp r3, #0
80047d0: d006 beq.n 80047e0 <SetMotPerc+0x88>
SetMotPwm(timMot1,FWMot1,pwmval);
80047d2: 897b ldrh r3, [r7, #10]
80047d4: 461a mov r2, r3
80047d6: 2100 movs r1, #0
80047d8: 489c ldr r0, [pc, #624] @ (8004a4c <SetMotPerc+0x2f4>)
80047da: f7ff fe22 bl 8004422 <SetMotPwm>
break;
80047de: e12e b.n 8004a3e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80047e0: 2201 movs r2, #1
80047e2: 2102 movs r1, #2
80047e4: 489a ldr r0, [pc, #616] @ (8004a50 <SetMotPerc+0x2f8>)
80047e6: f001 fee6 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
80047ea: 897b ldrh r3, [r7, #10]
80047ec: 461a mov r2, r3
80047ee: 2100 movs r1, #0
80047f0: 4896 ldr r0, [pc, #600] @ (8004a4c <SetMotPerc+0x2f4>)
80047f2: f7ff fdeb bl 80043cc <StartMot>
break;
80047f6: e122 b.n 8004a3e <SetMotPerc+0x2e6>
if(pwmval==0){
80047f8: 897b ldrh r3, [r7, #10]
80047fa: 2b00 cmp r3, #0
80047fc: d109 bne.n 8004812 <SetMotPerc+0xba>
StopMot(timMot1,BWMot1);
80047fe: 2104 movs r1, #4
8004800: 4892 ldr r0, [pc, #584] @ (8004a4c <SetMotPerc+0x2f4>)
8004802: f7ff fdd6 bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004806: 2200 movs r2, #0
8004808: 2102 movs r1, #2
800480a: 4891 ldr r0, [pc, #580] @ (8004a50 <SetMotPerc+0x2f8>)
800480c: f001 fed3 bl 80065b6 <HAL_GPIO_WritePin>
break;
8004810: e115 b.n 8004a3e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, BWMot1)){
8004812: 2104 movs r1, #4
8004814: 488d ldr r0, [pc, #564] @ (8004a4c <SetMotPerc+0x2f4>)
8004816: f7ff fdb7 bl 8004388 <IsPwmRunning>
800481a: 4603 mov r3, r0
800481c: 2b00 cmp r3, #0
800481e: d006 beq.n 800482e <SetMotPerc+0xd6>
SetMotPwm(timMot1,BWMot1,pwmval);
8004820: 897b ldrh r3, [r7, #10]
8004822: 461a mov r2, r3
8004824: 2104 movs r1, #4
8004826: 4889 ldr r0, [pc, #548] @ (8004a4c <SetMotPerc+0x2f4>)
8004828: f7ff fdfb bl 8004422 <SetMotPwm>
break;
800482c: e107 b.n 8004a3e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
800482e: 2201 movs r2, #1
8004830: 2102 movs r1, #2
8004832: 4887 ldr r0, [pc, #540] @ (8004a50 <SetMotPerc+0x2f8>)
8004834: f001 febf bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
8004838: 897b ldrh r3, [r7, #10]
800483a: 461a mov r2, r3
800483c: 2104 movs r1, #4
800483e: 4883 ldr r0, [pc, #524] @ (8004a4c <SetMotPerc+0x2f4>)
8004840: f7ff fdc4 bl 80043cc <StartMot>
break;
8004844: e0fb b.n 8004a3e <SetMotPerc+0x2e6>
case 2:
if(dir==FW){
8004846: 79bb ldrb r3, [r7, #6]
8004848: 2b00 cmp r3, #0
800484a: d126 bne.n 800489a <SetMotPerc+0x142>
if(pwmval==0){
800484c: 897b ldrh r3, [r7, #10]
800484e: 2b00 cmp r3, #0
8004850: d109 bne.n 8004866 <SetMotPerc+0x10e>
StopMot(timMot2,FWMot2);
8004852: 2108 movs r1, #8
8004854: 487d ldr r0, [pc, #500] @ (8004a4c <SetMotPerc+0x2f4>)
8004856: f7ff fdac bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
800485a: 2200 movs r2, #0
800485c: 2104 movs r1, #4
800485e: 487c ldr r0, [pc, #496] @ (8004a50 <SetMotPerc+0x2f8>)
8004860: f001 fea9 bl 80065b6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8004864: e0eb b.n 8004a3e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, FWMot2)){
8004866: 2108 movs r1, #8
8004868: 4878 ldr r0, [pc, #480] @ (8004a4c <SetMotPerc+0x2f4>)
800486a: f7ff fd8d bl 8004388 <IsPwmRunning>
800486e: 4603 mov r3, r0
8004870: 2b00 cmp r3, #0
8004872: d006 beq.n 8004882 <SetMotPerc+0x12a>
SetMotPwm(timMot2,FWMot2,pwmval);
8004874: 897b ldrh r3, [r7, #10]
8004876: 461a mov r2, r3
8004878: 2108 movs r1, #8
800487a: 4874 ldr r0, [pc, #464] @ (8004a4c <SetMotPerc+0x2f4>)
800487c: f7ff fdd1 bl 8004422 <SetMotPwm>
break;
8004880: e0dd b.n 8004a3e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004882: 2201 movs r2, #1
8004884: 2104 movs r1, #4
8004886: 4872 ldr r0, [pc, #456] @ (8004a50 <SetMotPerc+0x2f8>)
8004888: f001 fe95 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
800488c: 897b ldrh r3, [r7, #10]
800488e: 461a mov r2, r3
8004890: 2108 movs r1, #8
8004892: 486e ldr r0, [pc, #440] @ (8004a4c <SetMotPerc+0x2f4>)
8004894: f7ff fd9a bl 80043cc <StartMot>
break;
8004898: e0d1 b.n 8004a3e <SetMotPerc+0x2e6>
if(pwmval==0){
800489a: 897b ldrh r3, [r7, #10]
800489c: 2b00 cmp r3, #0
800489e: d109 bne.n 80048b4 <SetMotPerc+0x15c>
StopMot(timMot2,BWMot2);
80048a0: 210c movs r1, #12
80048a2: 486a ldr r0, [pc, #424] @ (8004a4c <SetMotPerc+0x2f4>)
80048a4: f7ff fd85 bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80048a8: 2200 movs r2, #0
80048aa: 2104 movs r1, #4
80048ac: 4868 ldr r0, [pc, #416] @ (8004a50 <SetMotPerc+0x2f8>)
80048ae: f001 fe82 bl 80065b6 <HAL_GPIO_WritePin>
break;
80048b2: e0c4 b.n 8004a3e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, BWMot2)){
80048b4: 210c movs r1, #12
80048b6: 4865 ldr r0, [pc, #404] @ (8004a4c <SetMotPerc+0x2f4>)
80048b8: f7ff fd66 bl 8004388 <IsPwmRunning>
80048bc: 4603 mov r3, r0
80048be: 2b00 cmp r3, #0
80048c0: d006 beq.n 80048d0 <SetMotPerc+0x178>
SetMotPwm(timMot2,BWMot2,pwmval);
80048c2: 897b ldrh r3, [r7, #10]
80048c4: 461a mov r2, r3
80048c6: 210c movs r1, #12
80048c8: 4860 ldr r0, [pc, #384] @ (8004a4c <SetMotPerc+0x2f4>)
80048ca: f7ff fdaa bl 8004422 <SetMotPwm>
break;
80048ce: e0b6 b.n 8004a3e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
80048d0: 2201 movs r2, #1
80048d2: 2104 movs r1, #4
80048d4: 485e ldr r0, [pc, #376] @ (8004a50 <SetMotPerc+0x2f8>)
80048d6: f001 fe6e bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
80048da: 897b ldrh r3, [r7, #10]
80048dc: 461a mov r2, r3
80048de: 210c movs r1, #12
80048e0: 485a ldr r0, [pc, #360] @ (8004a4c <SetMotPerc+0x2f4>)
80048e2: f7ff fd73 bl 80043cc <StartMot>
break;
80048e6: e0aa b.n 8004a3e <SetMotPerc+0x2e6>
case 3:
if(dir==FW){
80048e8: 79bb ldrb r3, [r7, #6]
80048ea: 2b00 cmp r3, #0
80048ec: d128 bne.n 8004940 <SetMotPerc+0x1e8>
if(pwmval==0){
80048ee: 897b ldrh r3, [r7, #10]
80048f0: 2b00 cmp r3, #0
80048f2: d10a bne.n 800490a <SetMotPerc+0x1b2>
StopMot(timMot3,FWMot3);
80048f4: 2100 movs r1, #0
80048f6: 4857 ldr r0, [pc, #348] @ (8004a54 <SetMotPerc+0x2fc>)
80048f8: f7ff fd5b bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
80048fc: 2200 movs r2, #0
80048fe: f44f 6180 mov.w r1, #1024 @ 0x400
8004902: 4853 ldr r0, [pc, #332] @ (8004a50 <SetMotPerc+0x2f8>)
8004904: f001 fe57 bl 80065b6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8004908: e099 b.n 8004a3e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, FWMot3)){
800490a: 2100 movs r1, #0
800490c: 4851 ldr r0, [pc, #324] @ (8004a54 <SetMotPerc+0x2fc>)
800490e: f7ff fd3b bl 8004388 <IsPwmRunning>
8004912: 4603 mov r3, r0
8004914: 2b00 cmp r3, #0
8004916: d006 beq.n 8004926 <SetMotPerc+0x1ce>
SetMotPwm(timMot3,FWMot3,pwmval);
8004918: 897b ldrh r3, [r7, #10]
800491a: 461a mov r2, r3
800491c: 2100 movs r1, #0
800491e: 484d ldr r0, [pc, #308] @ (8004a54 <SetMotPerc+0x2fc>)
8004920: f7ff fd7f bl 8004422 <SetMotPwm>
break;
8004924: e08b b.n 8004a3e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8004926: 2201 movs r2, #1
8004928: f44f 6180 mov.w r1, #1024 @ 0x400
800492c: 4848 ldr r0, [pc, #288] @ (8004a50 <SetMotPerc+0x2f8>)
800492e: f001 fe42 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8004932: 897b ldrh r3, [r7, #10]
8004934: 461a mov r2, r3
8004936: 2100 movs r1, #0
8004938: 4846 ldr r0, [pc, #280] @ (8004a54 <SetMotPerc+0x2fc>)
800493a: f7ff fd47 bl 80043cc <StartMot>
break;
800493e: e07e b.n 8004a3e <SetMotPerc+0x2e6>
if(pwmval==0){
8004940: 897b ldrh r3, [r7, #10]
8004942: 2b00 cmp r3, #0
8004944: d10a bne.n 800495c <SetMotPerc+0x204>
StopMot(timMot3,BWMot3);
8004946: 2104 movs r1, #4
8004948: 4842 ldr r0, [pc, #264] @ (8004a54 <SetMotPerc+0x2fc>)
800494a: f7ff fd32 bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
800494e: 2200 movs r2, #0
8004950: f44f 6180 mov.w r1, #1024 @ 0x400
8004954: 483e ldr r0, [pc, #248] @ (8004a50 <SetMotPerc+0x2f8>)
8004956: f001 fe2e bl 80065b6 <HAL_GPIO_WritePin>
break;
800495a: e070 b.n 8004a3e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, BWMot3)){
800495c: 2104 movs r1, #4
800495e: 483d ldr r0, [pc, #244] @ (8004a54 <SetMotPerc+0x2fc>)
8004960: f7ff fd12 bl 8004388 <IsPwmRunning>
8004964: 4603 mov r3, r0
8004966: 2b00 cmp r3, #0
8004968: d006 beq.n 8004978 <SetMotPerc+0x220>
SetMotPwm(timMot3,BWMot3,pwmval);
800496a: 897b ldrh r3, [r7, #10]
800496c: 461a mov r2, r3
800496e: 2104 movs r1, #4
8004970: 4838 ldr r0, [pc, #224] @ (8004a54 <SetMotPerc+0x2fc>)
8004972: f7ff fd56 bl 8004422 <SetMotPwm>
break;
8004976: e062 b.n 8004a3e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8004978: 2201 movs r2, #1
800497a: f44f 6180 mov.w r1, #1024 @ 0x400
800497e: 4834 ldr r0, [pc, #208] @ (8004a50 <SetMotPerc+0x2f8>)
8004980: f001 fe19 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004984: 897b ldrh r3, [r7, #10]
8004986: 461a mov r2, r3
8004988: 2104 movs r1, #4
800498a: 4832 ldr r0, [pc, #200] @ (8004a54 <SetMotPerc+0x2fc>)
800498c: f7ff fd1e bl 80043cc <StartMot>
break;
8004990: e055 b.n 8004a3e <SetMotPerc+0x2e6>
case 4:
if(dir==FW){
8004992: 79bb ldrb r3, [r7, #6]
8004994: 2b00 cmp r3, #0
8004996: d128 bne.n 80049ea <SetMotPerc+0x292>
if(pwmval==0){
8004998: 897b ldrh r3, [r7, #10]
800499a: 2b00 cmp r3, #0
800499c: d10a bne.n 80049b4 <SetMotPerc+0x25c>
StopMot(timMot4,FWMot4);
800499e: 2108 movs r1, #8
80049a0: 482c ldr r0, [pc, #176] @ (8004a54 <SetMotPerc+0x2fc>)
80049a2: f7ff fd06 bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
80049a6: 2200 movs r2, #0
80049a8: f44f 6100 mov.w r1, #2048 @ 0x800
80049ac: 4828 ldr r0, [pc, #160] @ (8004a50 <SetMotPerc+0x2f8>)
80049ae: f001 fe02 bl 80065b6 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
80049b2: e044 b.n 8004a3e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, FWMot4)){
80049b4: 2108 movs r1, #8
80049b6: 4827 ldr r0, [pc, #156] @ (8004a54 <SetMotPerc+0x2fc>)
80049b8: f7ff fce6 bl 8004388 <IsPwmRunning>
80049bc: 4603 mov r3, r0
80049be: 2b00 cmp r3, #0
80049c0: d006 beq.n 80049d0 <SetMotPerc+0x278>
SetMotPwm(timMot4,FWMot4,pwmval);
80049c2: 897b ldrh r3, [r7, #10]
80049c4: 461a mov r2, r3
80049c6: 2108 movs r1, #8
80049c8: 4822 ldr r0, [pc, #136] @ (8004a54 <SetMotPerc+0x2fc>)
80049ca: f7ff fd2a bl 8004422 <SetMotPwm>
break;
80049ce: e036 b.n 8004a3e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80049d0: 2201 movs r2, #1
80049d2: f44f 6100 mov.w r1, #2048 @ 0x800
80049d6: 481e ldr r0, [pc, #120] @ (8004a50 <SetMotPerc+0x2f8>)
80049d8: f001 fded bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
80049dc: 897b ldrh r3, [r7, #10]
80049de: 461a mov r2, r3
80049e0: 2108 movs r1, #8
80049e2: 481c ldr r0, [pc, #112] @ (8004a54 <SetMotPerc+0x2fc>)
80049e4: f7ff fcf2 bl 80043cc <StartMot>
break;
80049e8: e029 b.n 8004a3e <SetMotPerc+0x2e6>
if(pwmval==0){
80049ea: 897b ldrh r3, [r7, #10]
80049ec: 2b00 cmp r3, #0
80049ee: d10a bne.n 8004a06 <SetMotPerc+0x2ae>
StopMot(timMot4,BWMot4);
80049f0: 210c movs r1, #12
80049f2: 4818 ldr r0, [pc, #96] @ (8004a54 <SetMotPerc+0x2fc>)
80049f4: f7ff fcdd bl 80043b2 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
80049f8: 2200 movs r2, #0
80049fa: f44f 6100 mov.w r1, #2048 @ 0x800
80049fe: 4814 ldr r0, [pc, #80] @ (8004a50 <SetMotPerc+0x2f8>)
8004a00: f001 fdd9 bl 80065b6 <HAL_GPIO_WritePin>
break;
8004a04: e01b b.n 8004a3e <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, BWMot4)){
8004a06: 210c movs r1, #12
8004a08: 4812 ldr r0, [pc, #72] @ (8004a54 <SetMotPerc+0x2fc>)
8004a0a: f7ff fcbd bl 8004388 <IsPwmRunning>
8004a0e: 4603 mov r3, r0
8004a10: 2b00 cmp r3, #0
8004a12: d006 beq.n 8004a22 <SetMotPerc+0x2ca>
SetMotPwm(timMot4,BWMot4,pwmval);
8004a14: 897b ldrh r3, [r7, #10]
8004a16: 461a mov r2, r3
8004a18: 210c movs r1, #12
8004a1a: 480e ldr r0, [pc, #56] @ (8004a54 <SetMotPerc+0x2fc>)
8004a1c: f7ff fd01 bl 8004422 <SetMotPwm>
break;
8004a20: e00d b.n 8004a3e <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004a22: 2201 movs r2, #1
8004a24: f44f 6100 mov.w r1, #2048 @ 0x800
8004a28: 4809 ldr r0, [pc, #36] @ (8004a50 <SetMotPerc+0x2f8>)
8004a2a: f001 fdc4 bl 80065b6 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
8004a2e: 897b ldrh r3, [r7, #10]
8004a30: 461a mov r2, r3
8004a32: 210c movs r1, #12
8004a34: 4807 ldr r0, [pc, #28] @ (8004a54 <SetMotPerc+0x2fc>)
8004a36: f7ff fcc9 bl 80043cc <StartMot>
break;
8004a3a: e000 b.n 8004a3e <SetMotPerc+0x2e6>
default:
break;
8004a3c: bf00 nop
}
}
8004a3e: bf00 nop
8004a40: 3710 adds r7, #16
8004a42: 46bd mov sp, r7
8004a44: bd80 pop {r7, pc}
8004a46: bf00 nop
8004a48: 51eb851f .word 0x51eb851f
8004a4c: 20000318 .word 0x20000318
8004a50: 40010c00 .word 0x40010c00
8004a54: 20000360 .word 0x20000360
08004a58 <ramp>:
uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){
8004a58: b590 push {r4, r7, lr}
8004a5a: b085 sub sp, #20
8004a5c: af00 add r7, sp, #0
8004a5e: 4604 mov r4, r0
8004a60: 4608 mov r0, r1
8004a62: 4611 mov r1, r2
8004a64: 461a mov r2, r3
8004a66: 4623 mov r3, r4
8004a68: 71fb strb r3, [r7, #7]
8004a6a: 4603 mov r3, r0
8004a6c: 71bb strb r3, [r7, #6]
8004a6e: 460b mov r3, r1
8004a70: 717b strb r3, [r7, #5]
8004a72: 4613 mov r3, r2
8004a74: 713b strb r3, [r7, #4]
static uint8_t memrtramp[4];
// char s[10];
uint16_t delta;
switch(mode){
8004a76: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
8004a7a: 2b00 cmp r3, #0
8004a7c: d002 beq.n 8004a84 <ramp+0x2c>
8004a7e: 2b0a cmp r3, #10
8004a80: d016 beq.n 8004ab0 <ramp+0x58>
8004a82: e09d b.n 8004bc0 <ramp+0x168>
case RAMPINIT:
memrtramp[mot-1]=rtramp[mot-1]=tr;
8004a84: 79fb ldrb r3, [r7, #7]
8004a86: 3b01 subs r3, #1
8004a88: f897 2020 ldrb.w r2, [r7, #32]
8004a8c: b291 uxth r1, r2
8004a8e: 4a4f ldr r2, [pc, #316] @ (8004bcc <ramp+0x174>)
8004a90: 4608 mov r0, r1
8004a92: f822 0013 strh.w r0, [r2, r3, lsl #1]
8004a96: 79fb ldrb r3, [r7, #7]
8004a98: 3b01 subs r3, #1
8004a9a: b2c9 uxtb r1, r1
8004a9c: 4a4c ldr r2, [pc, #304] @ (8004bd0 <ramp+0x178>)
8004a9e: 54d1 strb r1, [r2, r3]
SetMotPerc(mot,dir,percStart);
8004aa0: 797a ldrb r2, [r7, #5]
8004aa2: 79b9 ldrb r1, [r7, #6]
8004aa4: 79fb ldrb r3, [r7, #7]
8004aa6: 4618 mov r0, r3
8004aa8: f7ff fe56 bl 8004758 <SetMotPerc>
return DONE;
8004aac: 2300 movs r3, #0
8004aae: e088 b.n 8004bc2 <ramp+0x16a>
case RAMPRUN:
if(memrtramp[mot-1]!=rtramp[mot-1]){
8004ab0: 79fb ldrb r3, [r7, #7]
8004ab2: 3b01 subs r3, #1
8004ab4: 4a46 ldr r2, [pc, #280] @ (8004bd0 <ramp+0x178>)
8004ab6: 5cd3 ldrb r3, [r2, r3]
8004ab8: 4619 mov r1, r3
8004aba: 79fb ldrb r3, [r7, #7]
8004abc: 3b01 subs r3, #1
8004abe: 4a43 ldr r2, [pc, #268] @ (8004bcc <ramp+0x174>)
8004ac0: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004ac4: b29b uxth r3, r3
8004ac6: 4299 cmp r1, r3
8004ac8: d078 beq.n 8004bbc <ramp+0x164>
memrtramp[mot-1]=rtramp[mot-1];
8004aca: 79fb ldrb r3, [r7, #7]
8004acc: 3b01 subs r3, #1
8004ace: 4a3f ldr r2, [pc, #252] @ (8004bcc <ramp+0x174>)
8004ad0: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004ad4: b29a uxth r2, r3
8004ad6: 79fb ldrb r3, [r7, #7]
8004ad8: 3b01 subs r3, #1
8004ada: b2d1 uxtb r1, r2
8004adc: 4a3c ldr r2, [pc, #240] @ (8004bd0 <ramp+0x178>)
8004ade: 54d1 strb r1, [r2, r3]
if(rtramp[mot-1]){
8004ae0: 79fb ldrb r3, [r7, #7]
8004ae2: 3b01 subs r3, #1
8004ae4: 4a39 ldr r2, [pc, #228] @ (8004bcc <ramp+0x174>)
8004ae6: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004aea: b29b uxth r3, r3
8004aec: 2b00 cmp r3, #0
8004aee: d05d beq.n 8004bac <ramp+0x154>
if(percStart>percEnd){
8004af0: 797a ldrb r2, [r7, #5]
8004af2: 793b ldrb r3, [r7, #4]
8004af4: 429a cmp r2, r3
8004af6: d926 bls.n 8004b46 <ramp+0xee>
delta=percStart-percEnd;
8004af8: 797b ldrb r3, [r7, #5]
8004afa: b29a uxth r2, r3
8004afc: 793b ldrb r3, [r7, #4]
8004afe: b29b uxth r3, r3
8004b00: 1ad3 subs r3, r2, r3
8004b02: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004b04: f897 3020 ldrb.w r3, [r7, #32]
8004b08: b29a uxth r2, r3
8004b0a: 79fb ldrb r3, [r7, #7]
8004b0c: 3b01 subs r3, #1
8004b0e: 492f ldr r1, [pc, #188] @ (8004bcc <ramp+0x174>)
8004b10: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8004b14: b29b uxth r3, r3
8004b16: 1ad3 subs r3, r2, r3
8004b18: b29b uxth r3, r3
8004b1a: 89fa ldrh r2, [r7, #14]
8004b1c: fb02 f303 mul.w r3, r2, r3
8004b20: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004b22: 89fa ldrh r2, [r7, #14]
8004b24: f897 3020 ldrb.w r3, [r7, #32]
8004b28: fb92 f3f3 sdiv r3, r2, r3
8004b2c: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart-delta);
8004b2e: 89fb ldrh r3, [r7, #14]
8004b30: b2db uxtb r3, r3
8004b32: 797a ldrb r2, [r7, #5]
8004b34: 1ad3 subs r3, r2, r3
8004b36: b2da uxtb r2, r3
8004b38: 79b9 ldrb r1, [r7, #6]
8004b3a: 79fb ldrb r3, [r7, #7]
8004b3c: 4618 mov r0, r3
8004b3e: f7ff fe0b bl 8004758 <SetMotPerc>
return RUNNING;
8004b42: 2301 movs r3, #1
8004b44: e03d b.n 8004bc2 <ramp+0x16a>
}else if(percStart<percEnd){
8004b46: 797a ldrb r2, [r7, #5]
8004b48: 793b ldrb r3, [r7, #4]
8004b4a: 429a cmp r2, r3
8004b4c: d226 bcs.n 8004b9c <ramp+0x144>
delta=percEnd-percStart;
8004b4e: 793b ldrb r3, [r7, #4]
8004b50: b29a uxth r2, r3
8004b52: 797b ldrb r3, [r7, #5]
8004b54: b29b uxth r3, r3
8004b56: 1ad3 subs r3, r2, r3
8004b58: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004b5a: f897 3020 ldrb.w r3, [r7, #32]
8004b5e: b29a uxth r2, r3
8004b60: 79fb ldrb r3, [r7, #7]
8004b62: 3b01 subs r3, #1
8004b64: 4919 ldr r1, [pc, #100] @ (8004bcc <ramp+0x174>)
8004b66: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8004b6a: b29b uxth r3, r3
8004b6c: 1ad3 subs r3, r2, r3
8004b6e: b29b uxth r3, r3
8004b70: 89fa ldrh r2, [r7, #14]
8004b72: fb02 f303 mul.w r3, r2, r3
8004b76: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004b78: 89fa ldrh r2, [r7, #14]
8004b7a: f897 3020 ldrb.w r3, [r7, #32]
8004b7e: fb92 f3f3 sdiv r3, r2, r3
8004b82: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart+delta);
8004b84: 89fb ldrh r3, [r7, #14]
8004b86: b2da uxtb r2, r3
8004b88: 797b ldrb r3, [r7, #5]
8004b8a: 4413 add r3, r2
8004b8c: b2da uxtb r2, r3
8004b8e: 79b9 ldrb r1, [r7, #6]
8004b90: 79fb ldrb r3, [r7, #7]
8004b92: 4618 mov r0, r3
8004b94: f7ff fde0 bl 8004758 <SetMotPerc>
// sprintf((char*)s,"\n%d",percStart+delta);
// HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
return RUNNING;
8004b98: 2301 movs r3, #1
8004b9a: e012 b.n 8004bc2 <ramp+0x16a>
}else{
SetMotPerc(mot,dir,percEnd);
8004b9c: 793a ldrb r2, [r7, #4]
8004b9e: 79b9 ldrb r1, [r7, #6]
8004ba0: 79fb ldrb r3, [r7, #7]
8004ba2: 4618 mov r0, r3
8004ba4: f7ff fdd8 bl 8004758 <SetMotPerc>
return DONE;
8004ba8: 2300 movs r3, #0
8004baa: e00a b.n 8004bc2 <ramp+0x16a>
}
}else{
SetMotPerc(mot,dir,percEnd);
8004bac: 793a ldrb r2, [r7, #4]
8004bae: 79b9 ldrb r1, [r7, #6]
8004bb0: 79fb ldrb r3, [r7, #7]
8004bb2: 4618 mov r0, r3
8004bb4: f7ff fdd0 bl 8004758 <SetMotPerc>
return DONE;
8004bb8: 2300 movs r3, #0
8004bba: e002 b.n 8004bc2 <ramp+0x16a>
}
}else return RUNNING;
8004bbc: 2301 movs r3, #1
8004bbe: e000 b.n 8004bc2 <ramp+0x16a>
break;
}
return DONE;
8004bc0: 2300 movs r3, #0
}
8004bc2: 4618 mov r0, r3
8004bc4: 3714 adds r7, #20
8004bc6: 46bd mov sp, r7
8004bc8: bd90 pop {r4, r7, pc}
8004bca: bf00 nop
8004bcc: 200003f4 .word 0x200003f4
8004bd0: 2000046c .word 0x2000046c
08004bd4 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8004bd4: b480 push {r7}
8004bd6: b085 sub sp, #20
8004bd8: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8004bda: 4b15 ldr r3, [pc, #84] @ (8004c30 <HAL_MspInit+0x5c>)
8004bdc: 699b ldr r3, [r3, #24]
8004bde: 4a14 ldr r2, [pc, #80] @ (8004c30 <HAL_MspInit+0x5c>)
8004be0: f043 0301 orr.w r3, r3, #1
8004be4: 6193 str r3, [r2, #24]
8004be6: 4b12 ldr r3, [pc, #72] @ (8004c30 <HAL_MspInit+0x5c>)
8004be8: 699b ldr r3, [r3, #24]
8004bea: f003 0301 and.w r3, r3, #1
8004bee: 60bb str r3, [r7, #8]
8004bf0: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
8004bf2: 4b0f ldr r3, [pc, #60] @ (8004c30 <HAL_MspInit+0x5c>)
8004bf4: 69db ldr r3, [r3, #28]
8004bf6: 4a0e ldr r2, [pc, #56] @ (8004c30 <HAL_MspInit+0x5c>)
8004bf8: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8004bfc: 61d3 str r3, [r2, #28]
8004bfe: 4b0c ldr r3, [pc, #48] @ (8004c30 <HAL_MspInit+0x5c>)
8004c00: 69db ldr r3, [r3, #28]
8004c02: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8004c06: 607b str r3, [r7, #4]
8004c08: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
8004c0a: 4b0a ldr r3, [pc, #40] @ (8004c34 <HAL_MspInit+0x60>)
8004c0c: 685b ldr r3, [r3, #4]
8004c0e: 60fb str r3, [r7, #12]
8004c10: 68fb ldr r3, [r7, #12]
8004c12: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
8004c16: 60fb str r3, [r7, #12]
8004c18: 68fb ldr r3, [r7, #12]
8004c1a: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
8004c1e: 60fb str r3, [r7, #12]
8004c20: 4a04 ldr r2, [pc, #16] @ (8004c34 <HAL_MspInit+0x60>)
8004c22: 68fb ldr r3, [r7, #12]
8004c24: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8004c26: bf00 nop
8004c28: 3714 adds r7, #20
8004c2a: 46bd mov sp, r7
8004c2c: bc80 pop {r7}
8004c2e: 4770 bx lr
8004c30: 40021000 .word 0x40021000
8004c34: 40010000 .word 0x40010000
08004c38 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
8004c38: b580 push {r7, lr}
8004c3a: b08a sub sp, #40 @ 0x28
8004c3c: af00 add r7, sp, #0
8004c3e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004c40: f107 0318 add.w r3, r7, #24
8004c44: 2200 movs r2, #0
8004c46: 601a str r2, [r3, #0]
8004c48: 605a str r2, [r3, #4]
8004c4a: 609a str r2, [r3, #8]
8004c4c: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
8004c4e: 687b ldr r3, [r7, #4]
8004c50: 681b ldr r3, [r3, #0]
8004c52: 4a33 ldr r2, [pc, #204] @ (8004d20 <HAL_ADC_MspInit+0xe8>)
8004c54: 4293 cmp r3, r2
8004c56: d15f bne.n 8004d18 <HAL_ADC_MspInit+0xe0>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
8004c58: 4b32 ldr r3, [pc, #200] @ (8004d24 <HAL_ADC_MspInit+0xec>)
8004c5a: 699b ldr r3, [r3, #24]
8004c5c: 4a31 ldr r2, [pc, #196] @ (8004d24 <HAL_ADC_MspInit+0xec>)
8004c5e: f443 7300 orr.w r3, r3, #512 @ 0x200
8004c62: 6193 str r3, [r2, #24]
8004c64: 4b2f ldr r3, [pc, #188] @ (8004d24 <HAL_ADC_MspInit+0xec>)
8004c66: 699b ldr r3, [r3, #24]
8004c68: f403 7300 and.w r3, r3, #512 @ 0x200
8004c6c: 617b str r3, [r7, #20]
8004c6e: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004c70: 4b2c ldr r3, [pc, #176] @ (8004d24 <HAL_ADC_MspInit+0xec>)
8004c72: 699b ldr r3, [r3, #24]
8004c74: 4a2b ldr r2, [pc, #172] @ (8004d24 <HAL_ADC_MspInit+0xec>)
8004c76: f043 0304 orr.w r3, r3, #4
8004c7a: 6193 str r3, [r2, #24]
8004c7c: 4b29 ldr r3, [pc, #164] @ (8004d24 <HAL_ADC_MspInit+0xec>)
8004c7e: 699b ldr r3, [r3, #24]
8004c80: f003 0304 and.w r3, r3, #4
8004c84: 613b str r3, [r7, #16]
8004c86: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
8004c88: 4b26 ldr r3, [pc, #152] @ (8004d24 <HAL_ADC_MspInit+0xec>)
8004c8a: 699b ldr r3, [r3, #24]
8004c8c: 4a25 ldr r2, [pc, #148] @ (8004d24 <HAL_ADC_MspInit+0xec>)
8004c8e: f043 0308 orr.w r3, r3, #8
8004c92: 6193 str r3, [r2, #24]
8004c94: 4b23 ldr r3, [pc, #140] @ (8004d24 <HAL_ADC_MspInit+0xec>)
8004c96: 699b ldr r3, [r3, #24]
8004c98: f003 0308 and.w r3, r3, #8
8004c9c: 60fb str r3, [r7, #12]
8004c9e: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
8004ca0: 23f0 movs r3, #240 @ 0xf0
8004ca2: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004ca4: 2303 movs r3, #3
8004ca6: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004ca8: f107 0318 add.w r3, r7, #24
8004cac: 4619 mov r1, r3
8004cae: 481e ldr r0, [pc, #120] @ (8004d28 <HAL_ADC_MspInit+0xf0>)
8004cb0: f001 fae6 bl 8006280 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8004cb4: 2301 movs r3, #1
8004cb6: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004cb8: 2303 movs r3, #3
8004cba: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
8004cbc: f107 0318 add.w r3, r7, #24
8004cc0: 4619 mov r1, r3
8004cc2: 481a ldr r0, [pc, #104] @ (8004d2c <HAL_ADC_MspInit+0xf4>)
8004cc4: f001 fadc bl 8006280 <HAL_GPIO_Init>
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
8004cc8: 4b19 ldr r3, [pc, #100] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004cca: 4a1a ldr r2, [pc, #104] @ (8004d34 <HAL_ADC_MspInit+0xfc>)
8004ccc: 601a str r2, [r3, #0]
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
8004cce: 4b18 ldr r3, [pc, #96] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004cd0: 2200 movs r2, #0
8004cd2: 605a str r2, [r3, #4]
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
8004cd4: 4b16 ldr r3, [pc, #88] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004cd6: 2200 movs r2, #0
8004cd8: 609a str r2, [r3, #8]
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
8004cda: 4b15 ldr r3, [pc, #84] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004cdc: 2280 movs r2, #128 @ 0x80
8004cde: 60da str r2, [r3, #12]
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
8004ce0: 4b13 ldr r3, [pc, #76] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004ce2: f44f 7280 mov.w r2, #256 @ 0x100
8004ce6: 611a str r2, [r3, #16]
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
8004ce8: 4b11 ldr r3, [pc, #68] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004cea: f44f 6280 mov.w r2, #1024 @ 0x400
8004cee: 615a str r2, [r3, #20]
hdma_adc1.Init.Mode = DMA_CIRCULAR;
8004cf0: 4b0f ldr r3, [pc, #60] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004cf2: 2220 movs r2, #32
8004cf4: 619a str r2, [r3, #24]
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
8004cf6: 4b0e ldr r3, [pc, #56] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004cf8: 2200 movs r2, #0
8004cfa: 61da str r2, [r3, #28]
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
8004cfc: 480c ldr r0, [pc, #48] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004cfe: f000 fed1 bl 8005aa4 <HAL_DMA_Init>
8004d02: 4603 mov r3, r0
8004d04: 2b00 cmp r3, #0
8004d06: d001 beq.n 8004d0c <HAL_ADC_MspInit+0xd4>
{
Error_Handler();
8004d08: f7fe fca2 bl 8003650 <Error_Handler>
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
8004d0c: 687b ldr r3, [r7, #4]
8004d0e: 4a08 ldr r2, [pc, #32] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004d10: 621a str r2, [r3, #32]
8004d12: 4a07 ldr r2, [pc, #28] @ (8004d30 <HAL_ADC_MspInit+0xf8>)
8004d14: 687b ldr r3, [r7, #4]
8004d16: 6253 str r3, [r2, #36] @ 0x24
/* USER CODE END ADC1_MspInit 1 */
}
}
8004d18: bf00 nop
8004d1a: 3728 adds r7, #40 @ 0x28
8004d1c: 46bd mov sp, r7
8004d1e: bd80 pop {r7, pc}
8004d20: 40012400 .word 0x40012400
8004d24: 40021000 .word 0x40021000
8004d28: 40010800 .word 0x40010800
8004d2c: 40010c00 .word 0x40010c00
8004d30: 200002d4 .word 0x200002d4
8004d34: 40020008 .word 0x40020008
08004d38 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8004d38: b480 push {r7}
8004d3a: b085 sub sp, #20
8004d3c: af00 add r7, sp, #0
8004d3e: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
8004d40: 687b ldr r3, [r7, #4]
8004d42: 681b ldr r3, [r3, #0]
8004d44: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004d48: d10c bne.n 8004d64 <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
8004d4a: 4b11 ldr r3, [pc, #68] @ (8004d90 <HAL_TIM_Base_MspInit+0x58>)
8004d4c: 69db ldr r3, [r3, #28]
8004d4e: 4a10 ldr r2, [pc, #64] @ (8004d90 <HAL_TIM_Base_MspInit+0x58>)
8004d50: f043 0301 orr.w r3, r3, #1
8004d54: 61d3 str r3, [r2, #28]
8004d56: 4b0e ldr r3, [pc, #56] @ (8004d90 <HAL_TIM_Base_MspInit+0x58>)
8004d58: 69db ldr r3, [r3, #28]
8004d5a: f003 0301 and.w r3, r3, #1
8004d5e: 60fb str r3, [r7, #12]
8004d60: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8004d62: e010 b.n 8004d86 <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
8004d64: 687b ldr r3, [r7, #4]
8004d66: 681b ldr r3, [r3, #0]
8004d68: 4a0a ldr r2, [pc, #40] @ (8004d94 <HAL_TIM_Base_MspInit+0x5c>)
8004d6a: 4293 cmp r3, r2
8004d6c: d10b bne.n 8004d86 <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
8004d6e: 4b08 ldr r3, [pc, #32] @ (8004d90 <HAL_TIM_Base_MspInit+0x58>)
8004d70: 69db ldr r3, [r3, #28]
8004d72: 4a07 ldr r2, [pc, #28] @ (8004d90 <HAL_TIM_Base_MspInit+0x58>)
8004d74: f043 0304 orr.w r3, r3, #4
8004d78: 61d3 str r3, [r2, #28]
8004d7a: 4b05 ldr r3, [pc, #20] @ (8004d90 <HAL_TIM_Base_MspInit+0x58>)
8004d7c: 69db ldr r3, [r3, #28]
8004d7e: f003 0304 and.w r3, r3, #4
8004d82: 60bb str r3, [r7, #8]
8004d84: 68bb ldr r3, [r7, #8]
}
8004d86: bf00 nop
8004d88: 3714 adds r7, #20
8004d8a: 46bd mov sp, r7
8004d8c: bc80 pop {r7}
8004d8e: 4770 bx lr
8004d90: 40021000 .word 0x40021000
8004d94: 40000800 .word 0x40000800
08004d98 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8004d98: b580 push {r7, lr}
8004d9a: b088 sub sp, #32
8004d9c: af00 add r7, sp, #0
8004d9e: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004da0: f107 0310 add.w r3, r7, #16
8004da4: 2200 movs r2, #0
8004da6: 601a str r2, [r3, #0]
8004da8: 605a str r2, [r3, #4]
8004daa: 609a str r2, [r3, #8]
8004dac: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
8004dae: 687b ldr r3, [r7, #4]
8004db0: 681b ldr r3, [r3, #0]
8004db2: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004db6: d118 bne.n 8004dea <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8004db8: 4b1d ldr r3, [pc, #116] @ (8004e30 <HAL_TIM_MspPostInit+0x98>)
8004dba: 699b ldr r3, [r3, #24]
8004dbc: 4a1c ldr r2, [pc, #112] @ (8004e30 <HAL_TIM_MspPostInit+0x98>)
8004dbe: f043 0304 orr.w r3, r3, #4
8004dc2: 6193 str r3, [r2, #24]
8004dc4: 4b1a ldr r3, [pc, #104] @ (8004e30 <HAL_TIM_MspPostInit+0x98>)
8004dc6: 699b ldr r3, [r3, #24]
8004dc8: f003 0304 and.w r3, r3, #4
8004dcc: 60fb str r3, [r7, #12]
8004dce: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
8004dd0: 230f movs r3, #15
8004dd2: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004dd4: 2302 movs r3, #2
8004dd6: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8004dd8: 2302 movs r3, #2
8004dda: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004ddc: f107 0310 add.w r3, r7, #16
8004de0: 4619 mov r1, r3
8004de2: 4814 ldr r0, [pc, #80] @ (8004e34 <HAL_TIM_MspPostInit+0x9c>)
8004de4: f001 fa4c bl 8006280 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
8004de8: e01d b.n 8004e26 <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
8004dea: 687b ldr r3, [r7, #4]
8004dec: 681b ldr r3, [r3, #0]
8004dee: 4a12 ldr r2, [pc, #72] @ (8004e38 <HAL_TIM_MspPostInit+0xa0>)
8004df0: 4293 cmp r3, r2
8004df2: d118 bne.n 8004e26 <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
8004df4: 4b0e ldr r3, [pc, #56] @ (8004e30 <HAL_TIM_MspPostInit+0x98>)
8004df6: 699b ldr r3, [r3, #24]
8004df8: 4a0d ldr r2, [pc, #52] @ (8004e30 <HAL_TIM_MspPostInit+0x98>)
8004dfa: f043 0308 orr.w r3, r3, #8
8004dfe: 6193 str r3, [r2, #24]
8004e00: 4b0b ldr r3, [pc, #44] @ (8004e30 <HAL_TIM_MspPostInit+0x98>)
8004e02: 699b ldr r3, [r3, #24]
8004e04: f003 0308 and.w r3, r3, #8
8004e08: 60bb str r3, [r7, #8]
8004e0a: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
8004e0c: f44f 7370 mov.w r3, #960 @ 0x3c0
8004e10: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004e12: 2302 movs r3, #2
8004e14: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8004e16: 2302 movs r3, #2
8004e18: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8004e1a: f107 0310 add.w r3, r7, #16
8004e1e: 4619 mov r1, r3
8004e20: 4806 ldr r0, [pc, #24] @ (8004e3c <HAL_TIM_MspPostInit+0xa4>)
8004e22: f001 fa2d bl 8006280 <HAL_GPIO_Init>
}
8004e26: bf00 nop
8004e28: 3720 adds r7, #32
8004e2a: 46bd mov sp, r7
8004e2c: bd80 pop {r7, pc}
8004e2e: bf00 nop
8004e30: 40021000 .word 0x40021000
8004e34: 40010800 .word 0x40010800
8004e38: 40000800 .word 0x40000800
8004e3c: 40010c00 .word 0x40010c00
08004e40 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8004e40: b580 push {r7, lr}
8004e42: b088 sub sp, #32
8004e44: af00 add r7, sp, #0
8004e46: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004e48: f107 0310 add.w r3, r7, #16
8004e4c: 2200 movs r2, #0
8004e4e: 601a str r2, [r3, #0]
8004e50: 605a str r2, [r3, #4]
8004e52: 609a str r2, [r3, #8]
8004e54: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
8004e56: 687b ldr r3, [r7, #4]
8004e58: 681b ldr r3, [r3, #0]
8004e5a: 4a1c ldr r2, [pc, #112] @ (8004ecc <HAL_UART_MspInit+0x8c>)
8004e5c: 4293 cmp r3, r2
8004e5e: d131 bne.n 8004ec4 <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8004e60: 4b1b ldr r3, [pc, #108] @ (8004ed0 <HAL_UART_MspInit+0x90>)
8004e62: 699b ldr r3, [r3, #24]
8004e64: 4a1a ldr r2, [pc, #104] @ (8004ed0 <HAL_UART_MspInit+0x90>)
8004e66: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8004e6a: 6193 str r3, [r2, #24]
8004e6c: 4b18 ldr r3, [pc, #96] @ (8004ed0 <HAL_UART_MspInit+0x90>)
8004e6e: 699b ldr r3, [r3, #24]
8004e70: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004e74: 60fb str r3, [r7, #12]
8004e76: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004e78: 4b15 ldr r3, [pc, #84] @ (8004ed0 <HAL_UART_MspInit+0x90>)
8004e7a: 699b ldr r3, [r3, #24]
8004e7c: 4a14 ldr r2, [pc, #80] @ (8004ed0 <HAL_UART_MspInit+0x90>)
8004e7e: f043 0304 orr.w r3, r3, #4
8004e82: 6193 str r3, [r2, #24]
8004e84: 4b12 ldr r3, [pc, #72] @ (8004ed0 <HAL_UART_MspInit+0x90>)
8004e86: 699b ldr r3, [r3, #24]
8004e88: f003 0304 and.w r3, r3, #4
8004e8c: 60bb str r3, [r7, #8]
8004e8e: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
8004e90: f44f 7300 mov.w r3, #512 @ 0x200
8004e94: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004e96: 2302 movs r3, #2
8004e98: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8004e9a: 2303 movs r3, #3
8004e9c: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004e9e: f107 0310 add.w r3, r7, #16
8004ea2: 4619 mov r1, r3
8004ea4: 480b ldr r0, [pc, #44] @ (8004ed4 <HAL_UART_MspInit+0x94>)
8004ea6: f001 f9eb bl 8006280 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
8004eaa: f44f 6380 mov.w r3, #1024 @ 0x400
8004eae: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8004eb0: 2300 movs r3, #0
8004eb2: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8004eb4: 2300 movs r3, #0
8004eb6: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004eb8: f107 0310 add.w r3, r7, #16
8004ebc: 4619 mov r1, r3
8004ebe: 4805 ldr r0, [pc, #20] @ (8004ed4 <HAL_UART_MspInit+0x94>)
8004ec0: f001 f9de bl 8006280 <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8004ec4: bf00 nop
8004ec6: 3720 adds r7, #32
8004ec8: 46bd mov sp, r7
8004eca: bd80 pop {r7, pc}
8004ecc: 40013800 .word 0x40013800
8004ed0: 40021000 .word 0x40021000
8004ed4: 40010800 .word 0x40010800
08004ed8 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8004ed8: b480 push {r7}
8004eda: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8004edc: bf00 nop
8004ede: e7fd b.n 8004edc <NMI_Handler+0x4>
08004ee0 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8004ee0: b480 push {r7}
8004ee2: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8004ee4: bf00 nop
8004ee6: e7fd b.n 8004ee4 <HardFault_Handler+0x4>
08004ee8 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8004ee8: b480 push {r7}
8004eea: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8004eec: bf00 nop
8004eee: e7fd b.n 8004eec <MemManage_Handler+0x4>
08004ef0 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8004ef0: b480 push {r7}
8004ef2: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8004ef4: bf00 nop
8004ef6: e7fd b.n 8004ef4 <BusFault_Handler+0x4>
08004ef8 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8004ef8: b480 push {r7}
8004efa: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8004efc: bf00 nop
8004efe: e7fd b.n 8004efc <UsageFault_Handler+0x4>
08004f00 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8004f00: b480 push {r7}
8004f02: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8004f04: bf00 nop
8004f06: 46bd mov sp, r7
8004f08: bc80 pop {r7}
8004f0a: 4770 bx lr
08004f0c <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8004f0c: b480 push {r7}
8004f0e: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8004f10: bf00 nop
8004f12: 46bd mov sp, r7
8004f14: bc80 pop {r7}
8004f16: 4770 bx lr
08004f18 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8004f18: b480 push {r7}
8004f1a: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8004f1c: bf00 nop
8004f1e: 46bd mov sp, r7
8004f20: bc80 pop {r7}
8004f22: 4770 bx lr
08004f24 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8004f24: b580 push {r7, lr}
8004f26: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8004f28: f000 f8c0 bl 80050ac <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
8004f2c: f000 fdb3 bl 8005a96 <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
8004f30: bf00 nop
8004f32: bd80 pop {r7, pc}
08004f34 <DMA1_Channel1_IRQHandler>:
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
8004f34: b580 push {r7, lr}
8004f36: af00 add r7, sp, #0
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
8004f38: 4802 ldr r0, [pc, #8] @ (8004f44 <DMA1_Channel1_IRQHandler+0x10>)
8004f3a: f000 fe6d bl 8005c18 <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
8004f3e: bf00 nop
8004f40: bd80 pop {r7, pc}
8004f42: bf00 nop
8004f44: 200002d4 .word 0x200002d4
08004f48 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8004f48: b580 push {r7, lr}
8004f4a: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8004f4c: 4802 ldr r0, [pc, #8] @ (8004f58 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8004f4e: f001 fc66 bl 800681e <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8004f52: bf00 nop
8004f54: bd80 pop {r7, pc}
8004f56: bf00 nop
8004f58: 20001264 .word 0x20001264
08004f5c <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8004f5c: b580 push {r7, lr}
8004f5e: b086 sub sp, #24
8004f60: af00 add r7, sp, #0
8004f62: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8004f64: 4a14 ldr r2, [pc, #80] @ (8004fb8 <_sbrk+0x5c>)
8004f66: 4b15 ldr r3, [pc, #84] @ (8004fbc <_sbrk+0x60>)
8004f68: 1ad3 subs r3, r2, r3
8004f6a: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8004f6c: 697b ldr r3, [r7, #20]
8004f6e: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8004f70: 4b13 ldr r3, [pc, #76] @ (8004fc0 <_sbrk+0x64>)
8004f72: 681b ldr r3, [r3, #0]
8004f74: 2b00 cmp r3, #0
8004f76: d102 bne.n 8004f7e <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8004f78: 4b11 ldr r3, [pc, #68] @ (8004fc0 <_sbrk+0x64>)
8004f7a: 4a12 ldr r2, [pc, #72] @ (8004fc4 <_sbrk+0x68>)
8004f7c: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8004f7e: 4b10 ldr r3, [pc, #64] @ (8004fc0 <_sbrk+0x64>)
8004f80: 681a ldr r2, [r3, #0]
8004f82: 687b ldr r3, [r7, #4]
8004f84: 4413 add r3, r2
8004f86: 693a ldr r2, [r7, #16]
8004f88: 429a cmp r2, r3
8004f8a: d207 bcs.n 8004f9c <_sbrk+0x40>
{
errno = ENOMEM;
8004f8c: f009 fa2c bl 800e3e8 <__errno>
8004f90: 4603 mov r3, r0
8004f92: 220c movs r2, #12
8004f94: 601a str r2, [r3, #0]
return (void *)-1;
8004f96: f04f 33ff mov.w r3, #4294967295
8004f9a: e009 b.n 8004fb0 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8004f9c: 4b08 ldr r3, [pc, #32] @ (8004fc0 <_sbrk+0x64>)
8004f9e: 681b ldr r3, [r3, #0]
8004fa0: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8004fa2: 4b07 ldr r3, [pc, #28] @ (8004fc0 <_sbrk+0x64>)
8004fa4: 681a ldr r2, [r3, #0]
8004fa6: 687b ldr r3, [r7, #4]
8004fa8: 4413 add r3, r2
8004faa: 4a05 ldr r2, [pc, #20] @ (8004fc0 <_sbrk+0x64>)
8004fac: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8004fae: 68fb ldr r3, [r7, #12]
}
8004fb0: 4618 mov r0, r3
8004fb2: 3718 adds r7, #24
8004fb4: 46bd mov sp, r7
8004fb6: bd80 pop {r7, pc}
8004fb8: 20005000 .word 0x20005000
8004fbc: 00000400 .word 0x00000400
8004fc0: 20000470 .word 0x20000470
8004fc4: 200018a8 .word 0x200018a8
08004fc8 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8004fc8: b480 push {r7}
8004fca: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8004fcc: bf00 nop
8004fce: 46bd mov sp, r7
8004fd0: bc80 pop {r7}
8004fd2: 4770 bx lr
08004fd4 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8004fd4: f7ff fff8 bl 8004fc8 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8004fd8: 480b ldr r0, [pc, #44] @ (8005008 <LoopFillZerobss+0xe>)
ldr r1, =_edata
8004fda: 490c ldr r1, [pc, #48] @ (800500c <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8004fdc: 4a0c ldr r2, [pc, #48] @ (8005010 <LoopFillZerobss+0x16>)
movs r3, #0
8004fde: 2300 movs r3, #0
b LoopCopyDataInit
8004fe0: e002 b.n 8004fe8 <LoopCopyDataInit>
08004fe2 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8004fe2: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8004fe4: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8004fe6: 3304 adds r3, #4
08004fe8 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8004fe8: 18c4 adds r4, r0, r3
cmp r4, r1
8004fea: 428c cmp r4, r1
bcc CopyDataInit
8004fec: d3f9 bcc.n 8004fe2 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8004fee: 4a09 ldr r2, [pc, #36] @ (8005014 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8004ff0: 4c09 ldr r4, [pc, #36] @ (8005018 <LoopFillZerobss+0x1e>)
movs r3, #0
8004ff2: 2300 movs r3, #0
b LoopFillZerobss
8004ff4: e001 b.n 8004ffa <LoopFillZerobss>
08004ff6 <FillZerobss>:
FillZerobss:
str r3, [r2]
8004ff6: 6013 str r3, [r2, #0]
adds r2, r2, #4
8004ff8: 3204 adds r2, #4
08004ffa <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8004ffa: 42a2 cmp r2, r4
bcc FillZerobss
8004ffc: d3fb bcc.n 8004ff6 <FillZerobss>
/* Call static constructors */
bl __libc_init_array
8004ffe: f009 f9f9 bl 800e3f4 <__libc_init_array>
/* Call the application's entry point.*/
bl main
8005002: f7fd ffb1 bl 8002f68 <main>
bx lr
8005006: 4770 bx lr
ldr r0, =_sdata
8005008: 20000000 .word 0x20000000
ldr r1, =_edata
800500c: 200001dc .word 0x200001dc
ldr r2, =_sidata
8005010: 0800f508 .word 0x0800f508
ldr r2, =_sbss
8005014: 200001e0 .word 0x200001e0
ldr r4, =_ebss
8005018: 200018a4 .word 0x200018a4
0800501c <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
800501c: e7fe b.n 800501c <ADC1_2_IRQHandler>
...
08005020 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8005020: b580 push {r7, lr}
8005022: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8005024: 4b08 ldr r3, [pc, #32] @ (8005048 <HAL_Init+0x28>)
8005026: 681b ldr r3, [r3, #0]
8005028: 4a07 ldr r2, [pc, #28] @ (8005048 <HAL_Init+0x28>)
800502a: f043 0310 orr.w r3, r3, #16
800502e: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8005030: 2003 movs r0, #3
8005032: f000 fcef bl 8005a14 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8005036: 200f movs r0, #15
8005038: f000 f808 bl 800504c <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
800503c: f7ff fdca bl 8004bd4 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8005040: 2300 movs r3, #0
}
8005042: 4618 mov r0, r3
8005044: bd80 pop {r7, pc}
8005046: bf00 nop
8005048: 40022000 .word 0x40022000
0800504c <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
800504c: b580 push {r7, lr}
800504e: b082 sub sp, #8
8005050: af00 add r7, sp, #0
8005052: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8005054: 4b12 ldr r3, [pc, #72] @ (80050a0 <HAL_InitTick+0x54>)
8005056: 681a ldr r2, [r3, #0]
8005058: 4b12 ldr r3, [pc, #72] @ (80050a4 <HAL_InitTick+0x58>)
800505a: 781b ldrb r3, [r3, #0]
800505c: 4619 mov r1, r3
800505e: f44f 737a mov.w r3, #1000 @ 0x3e8
8005062: fbb3 f3f1 udiv r3, r3, r1
8005066: fbb2 f3f3 udiv r3, r2, r3
800506a: 4618 mov r0, r3
800506c: f000 fd07 bl 8005a7e <HAL_SYSTICK_Config>
8005070: 4603 mov r3, r0
8005072: 2b00 cmp r3, #0
8005074: d001 beq.n 800507a <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8005076: 2301 movs r3, #1
8005078: e00e b.n 8005098 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
800507a: 687b ldr r3, [r7, #4]
800507c: 2b0f cmp r3, #15
800507e: d80a bhi.n 8005096 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8005080: 2200 movs r2, #0
8005082: 6879 ldr r1, [r7, #4]
8005084: f04f 30ff mov.w r0, #4294967295
8005088: f000 fccf bl 8005a2a <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
800508c: 4a06 ldr r2, [pc, #24] @ (80050a8 <HAL_InitTick+0x5c>)
800508e: 687b ldr r3, [r7, #4]
8005090: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8005092: 2300 movs r3, #0
8005094: e000 b.n 8005098 <HAL_InitTick+0x4c>
return HAL_ERROR;
8005096: 2301 movs r3, #1
}
8005098: 4618 mov r0, r3
800509a: 3708 adds r7, #8
800509c: 46bd mov sp, r7
800509e: bd80 pop {r7, pc}
80050a0: 20000010 .word 0x20000010
80050a4: 20000018 .word 0x20000018
80050a8: 20000014 .word 0x20000014
080050ac <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
80050ac: b480 push {r7}
80050ae: af00 add r7, sp, #0
uwTick += uwTickFreq;
80050b0: 4b05 ldr r3, [pc, #20] @ (80050c8 <HAL_IncTick+0x1c>)
80050b2: 781b ldrb r3, [r3, #0]
80050b4: 461a mov r2, r3
80050b6: 4b05 ldr r3, [pc, #20] @ (80050cc <HAL_IncTick+0x20>)
80050b8: 681b ldr r3, [r3, #0]
80050ba: 4413 add r3, r2
80050bc: 4a03 ldr r2, [pc, #12] @ (80050cc <HAL_IncTick+0x20>)
80050be: 6013 str r3, [r2, #0]
}
80050c0: bf00 nop
80050c2: 46bd mov sp, r7
80050c4: bc80 pop {r7}
80050c6: 4770 bx lr
80050c8: 20000018 .word 0x20000018
80050cc: 20000474 .word 0x20000474
080050d0 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
80050d0: b480 push {r7}
80050d2: af00 add r7, sp, #0
return uwTick;
80050d4: 4b02 ldr r3, [pc, #8] @ (80050e0 <HAL_GetTick+0x10>)
80050d6: 681b ldr r3, [r3, #0]
}
80050d8: 4618 mov r0, r3
80050da: 46bd mov sp, r7
80050dc: bc80 pop {r7}
80050de: 4770 bx lr
80050e0: 20000474 .word 0x20000474
080050e4 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
80050e4: b580 push {r7, lr}
80050e6: b086 sub sp, #24
80050e8: af00 add r7, sp, #0
80050ea: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
80050ec: 2300 movs r3, #0
80050ee: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
80050f0: 2300 movs r3, #0
80050f2: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
80050f4: 2300 movs r3, #0
80050f6: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
80050f8: 2300 movs r3, #0
80050fa: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
80050fc: 687b ldr r3, [r7, #4]
80050fe: 2b00 cmp r3, #0
8005100: d101 bne.n 8005106 <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
8005102: 2301 movs r3, #1
8005104: e0be b.n 8005284 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8005106: 687b ldr r3, [r7, #4]
8005108: 689b ldr r3, [r3, #8]
800510a: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
800510c: 687b ldr r3, [r7, #4]
800510e: 6a9b ldr r3, [r3, #40] @ 0x28
8005110: 2b00 cmp r3, #0
8005112: d109 bne.n 8005128 <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8005114: 687b ldr r3, [r7, #4]
8005116: 2200 movs r2, #0
8005118: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
800511a: 687b ldr r3, [r7, #4]
800511c: 2200 movs r2, #0
800511e: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8005122: 6878 ldr r0, [r7, #4]
8005124: f7ff fd88 bl 8004c38 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
8005128: 6878 ldr r0, [r7, #4]
800512a: f000 faff bl 800572c <ADC_ConversionStop_Disable>
800512e: 4603 mov r3, r0
8005130: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8005132: 687b ldr r3, [r7, #4]
8005134: 6a9b ldr r3, [r3, #40] @ 0x28
8005136: f003 0310 and.w r3, r3, #16
800513a: 2b00 cmp r3, #0
800513c: f040 8099 bne.w 8005272 <HAL_ADC_Init+0x18e>
8005140: 7dfb ldrb r3, [r7, #23]
8005142: 2b00 cmp r3, #0
8005144: f040 8095 bne.w 8005272 <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8005148: 687b ldr r3, [r7, #4]
800514a: 6a9b ldr r3, [r3, #40] @ 0x28
800514c: f423 5388 bic.w r3, r3, #4352 @ 0x1100
8005150: f023 0302 bic.w r3, r3, #2
8005154: f043 0202 orr.w r2, r3, #2
8005158: 687b ldr r3, [r7, #4]
800515a: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
800515c: 687b ldr r3, [r7, #4]
800515e: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8005160: 687b ldr r3, [r7, #4]
8005162: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8005164: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8005166: 687b ldr r3, [r7, #4]
8005168: 7b1b ldrb r3, [r3, #12]
800516a: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
800516c: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
800516e: 68ba ldr r2, [r7, #8]
8005170: 4313 orrs r3, r2
8005172: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8005174: 687b ldr r3, [r7, #4]
8005176: 689b ldr r3, [r3, #8]
8005178: f5b3 7f80 cmp.w r3, #256 @ 0x100
800517c: d003 beq.n 8005186 <HAL_ADC_Init+0xa2>
800517e: 687b ldr r3, [r7, #4]
8005180: 689b ldr r3, [r3, #8]
8005182: 2b01 cmp r3, #1
8005184: d102 bne.n 800518c <HAL_ADC_Init+0xa8>
8005186: f44f 7380 mov.w r3, #256 @ 0x100
800518a: e000 b.n 800518e <HAL_ADC_Init+0xaa>
800518c: 2300 movs r3, #0
800518e: 693a ldr r2, [r7, #16]
8005190: 4313 orrs r3, r2
8005192: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8005194: 687b ldr r3, [r7, #4]
8005196: 7d1b ldrb r3, [r3, #20]
8005198: 2b01 cmp r3, #1
800519a: d119 bne.n 80051d0 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
800519c: 687b ldr r3, [r7, #4]
800519e: 7b1b ldrb r3, [r3, #12]
80051a0: 2b00 cmp r3, #0
80051a2: d109 bne.n 80051b8 <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
80051a4: 687b ldr r3, [r7, #4]
80051a6: 699b ldr r3, [r3, #24]
80051a8: 3b01 subs r3, #1
80051aa: 035a lsls r2, r3, #13
80051ac: 693b ldr r3, [r7, #16]
80051ae: 4313 orrs r3, r2
80051b0: f443 6300 orr.w r3, r3, #2048 @ 0x800
80051b4: 613b str r3, [r7, #16]
80051b6: e00b b.n 80051d0 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
80051b8: 687b ldr r3, [r7, #4]
80051ba: 6a9b ldr r3, [r3, #40] @ 0x28
80051bc: f043 0220 orr.w r2, r3, #32
80051c0: 687b ldr r3, [r7, #4]
80051c2: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80051c4: 687b ldr r3, [r7, #4]
80051c6: 6adb ldr r3, [r3, #44] @ 0x2c
80051c8: f043 0201 orr.w r2, r3, #1
80051cc: 687b ldr r3, [r7, #4]
80051ce: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
80051d0: 687b ldr r3, [r7, #4]
80051d2: 681b ldr r3, [r3, #0]
80051d4: 685b ldr r3, [r3, #4]
80051d6: f423 4169 bic.w r1, r3, #59648 @ 0xe900
80051da: 687b ldr r3, [r7, #4]
80051dc: 681b ldr r3, [r3, #0]
80051de: 693a ldr r2, [r7, #16]
80051e0: 430a orrs r2, r1
80051e2: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
80051e4: 687b ldr r3, [r7, #4]
80051e6: 681b ldr r3, [r3, #0]
80051e8: 689a ldr r2, [r3, #8]
80051ea: 4b28 ldr r3, [pc, #160] @ (800528c <HAL_ADC_Init+0x1a8>)
80051ec: 4013 ands r3, r2
80051ee: 687a ldr r2, [r7, #4]
80051f0: 6812 ldr r2, [r2, #0]
80051f2: 68b9 ldr r1, [r7, #8]
80051f4: 430b orrs r3, r1
80051f6: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
80051f8: 687b ldr r3, [r7, #4]
80051fa: 689b ldr r3, [r3, #8]
80051fc: f5b3 7f80 cmp.w r3, #256 @ 0x100
8005200: d003 beq.n 800520a <HAL_ADC_Init+0x126>
8005202: 687b ldr r3, [r7, #4]
8005204: 689b ldr r3, [r3, #8]
8005206: 2b01 cmp r3, #1
8005208: d104 bne.n 8005214 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
800520a: 687b ldr r3, [r7, #4]
800520c: 691b ldr r3, [r3, #16]
800520e: 3b01 subs r3, #1
8005210: 051b lsls r3, r3, #20
8005212: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
8005214: 687b ldr r3, [r7, #4]
8005216: 681b ldr r3, [r3, #0]
8005218: 6adb ldr r3, [r3, #44] @ 0x2c
800521a: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
800521e: 687b ldr r3, [r7, #4]
8005220: 681b ldr r3, [r3, #0]
8005222: 68fa ldr r2, [r7, #12]
8005224: 430a orrs r2, r1
8005226: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8005228: 687b ldr r3, [r7, #4]
800522a: 681b ldr r3, [r3, #0]
800522c: 689a ldr r2, [r3, #8]
800522e: 4b18 ldr r3, [pc, #96] @ (8005290 <HAL_ADC_Init+0x1ac>)
8005230: 4013 ands r3, r2
8005232: 68ba ldr r2, [r7, #8]
8005234: 429a cmp r2, r3
8005236: d10b bne.n 8005250 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8005238: 687b ldr r3, [r7, #4]
800523a: 2200 movs r2, #0
800523c: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
800523e: 687b ldr r3, [r7, #4]
8005240: 6a9b ldr r3, [r3, #40] @ 0x28
8005242: f023 0303 bic.w r3, r3, #3
8005246: f043 0201 orr.w r2, r3, #1
800524a: 687b ldr r3, [r7, #4]
800524c: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
800524e: e018 b.n 8005282 <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8005250: 687b ldr r3, [r7, #4]
8005252: 6a9b ldr r3, [r3, #40] @ 0x28
8005254: f023 0312 bic.w r3, r3, #18
8005258: f043 0210 orr.w r2, r3, #16
800525c: 687b ldr r3, [r7, #4]
800525e: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8005260: 687b ldr r3, [r7, #4]
8005262: 6adb ldr r3, [r3, #44] @ 0x2c
8005264: f043 0201 orr.w r2, r3, #1
8005268: 687b ldr r3, [r7, #4]
800526a: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
800526c: 2301 movs r3, #1
800526e: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8005270: e007 b.n 8005282 <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8005272: 687b ldr r3, [r7, #4]
8005274: 6a9b ldr r3, [r3, #40] @ 0x28
8005276: f043 0210 orr.w r2, r3, #16
800527a: 687b ldr r3, [r7, #4]
800527c: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
800527e: 2301 movs r3, #1
8005280: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8005282: 7dfb ldrb r3, [r7, #23]
}
8005284: 4618 mov r0, r3
8005286: 3718 adds r7, #24
8005288: 46bd mov sp, r7
800528a: bd80 pop {r7, pc}
800528c: ffe1f7fd .word 0xffe1f7fd
8005290: ff1f0efe .word 0xff1f0efe
08005294 <HAL_ADC_Start_DMA>:
* @param pData: The destination Buffer address.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @retval None
*/
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
{
8005294: b580 push {r7, lr}
8005296: b086 sub sp, #24
8005298: af00 add r7, sp, #0
800529a: 60f8 str r0, [r7, #12]
800529c: 60b9 str r1, [r7, #8]
800529e: 607a str r2, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
80052a0: 2300 movs r3, #0
80052a2: 75fb strb r3, [r7, #23]
assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
/* Verification if multimode is disabled (for devices with several ADC) */
/* If multimode is enabled, dedicated function multimode conversion */
/* start DMA must be used. */
if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
80052a4: 68fb ldr r3, [r7, #12]
80052a6: 681b ldr r3, [r3, #0]
80052a8: 4a64 ldr r2, [pc, #400] @ (800543c <HAL_ADC_Start_DMA+0x1a8>)
80052aa: 4293 cmp r3, r2
80052ac: d004 beq.n 80052b8 <HAL_ADC_Start_DMA+0x24>
80052ae: 68fb ldr r3, [r7, #12]
80052b0: 681b ldr r3, [r3, #0]
80052b2: 4a63 ldr r2, [pc, #396] @ (8005440 <HAL_ADC_Start_DMA+0x1ac>)
80052b4: 4293 cmp r3, r2
80052b6: d106 bne.n 80052c6 <HAL_ADC_Start_DMA+0x32>
80052b8: 4b60 ldr r3, [pc, #384] @ (800543c <HAL_ADC_Start_DMA+0x1a8>)
80052ba: 685b ldr r3, [r3, #4]
80052bc: f403 2370 and.w r3, r3, #983040 @ 0xf0000
80052c0: 2b00 cmp r3, #0
80052c2: f040 80b3 bne.w 800542c <HAL_ADC_Start_DMA+0x198>
{
/* Process locked */
__HAL_LOCK(hadc);
80052c6: 68fb ldr r3, [r7, #12]
80052c8: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
80052cc: 2b01 cmp r3, #1
80052ce: d101 bne.n 80052d4 <HAL_ADC_Start_DMA+0x40>
80052d0: 2302 movs r3, #2
80052d2: e0ae b.n 8005432 <HAL_ADC_Start_DMA+0x19e>
80052d4: 68fb ldr r3, [r7, #12]
80052d6: 2201 movs r2, #1
80052d8: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Enable the ADC peripheral */
tmp_hal_status = ADC_Enable(hadc);
80052dc: 68f8 ldr r0, [r7, #12]
80052de: f000 f9cb bl 8005678 <ADC_Enable>
80052e2: 4603 mov r3, r0
80052e4: 75fb strb r3, [r7, #23]
/* Start conversion if ADC is effectively enabled */
if (tmp_hal_status == HAL_OK)
80052e6: 7dfb ldrb r3, [r7, #23]
80052e8: 2b00 cmp r3, #0
80052ea: f040 809a bne.w 8005422 <HAL_ADC_Start_DMA+0x18e>
{
/* Set ADC state */
/* - Clear state bitfield related to regular group conversion results */
/* - Set state bitfield related to regular operation */
ADC_STATE_CLR_SET(hadc->State,
80052ee: 68fb ldr r3, [r7, #12]
80052f0: 6a9b ldr r3, [r3, #40] @ 0x28
80052f2: f423 6370 bic.w r3, r3, #3840 @ 0xf00
80052f6: f023 0301 bic.w r3, r3, #1
80052fa: f443 7280 orr.w r2, r3, #256 @ 0x100
80052fe: 68fb ldr r3, [r7, #12]
8005300: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_REG_BUSY);
/* Set group injected state (from auto-injection) and multimode state */
/* for all cases of multimode: independent mode, multimode ADC master */
/* or multimode ADC slave (for devices with several ADCs): */
if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
8005302: 68fb ldr r3, [r7, #12]
8005304: 681b ldr r3, [r3, #0]
8005306: 4a4e ldr r2, [pc, #312] @ (8005440 <HAL_ADC_Start_DMA+0x1ac>)
8005308: 4293 cmp r3, r2
800530a: d105 bne.n 8005318 <HAL_ADC_Start_DMA+0x84>
800530c: 4b4b ldr r3, [pc, #300] @ (800543c <HAL_ADC_Start_DMA+0x1a8>)
800530e: 685b ldr r3, [r3, #4]
8005310: f403 2370 and.w r3, r3, #983040 @ 0xf0000
8005314: 2b00 cmp r3, #0
8005316: d115 bne.n 8005344 <HAL_ADC_Start_DMA+0xb0>
{
/* Set ADC state (ADC independent or master) */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8005318: 68fb ldr r3, [r7, #12]
800531a: 6a9b ldr r3, [r3, #40] @ 0x28
800531c: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
8005320: 68fb ldr r3, [r7, #12]
8005322: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8005324: 68fb ldr r3, [r7, #12]
8005326: 681b ldr r3, [r3, #0]
8005328: 685b ldr r3, [r3, #4]
800532a: f403 6380 and.w r3, r3, #1024 @ 0x400
800532e: 2b00 cmp r3, #0
8005330: d026 beq.n 8005380 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8005332: 68fb ldr r3, [r7, #12]
8005334: 6a9b ldr r3, [r3, #40] @ 0x28
8005336: f423 5340 bic.w r3, r3, #12288 @ 0x3000
800533a: f443 5280 orr.w r2, r3, #4096 @ 0x1000
800533e: 68fb ldr r3, [r7, #12]
8005340: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8005342: e01d b.n 8005380 <HAL_ADC_Start_DMA+0xec>
}
}
else
{
/* Set ADC state (ADC slave) */
SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8005344: 68fb ldr r3, [r7, #12]
8005346: 6a9b ldr r3, [r3, #40] @ 0x28
8005348: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
800534c: 68fb ldr r3, [r7, #12]
800534e: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
8005350: 68fb ldr r3, [r7, #12]
8005352: 681b ldr r3, [r3, #0]
8005354: 4a39 ldr r2, [pc, #228] @ (800543c <HAL_ADC_Start_DMA+0x1a8>)
8005356: 4293 cmp r3, r2
8005358: d004 beq.n 8005364 <HAL_ADC_Start_DMA+0xd0>
800535a: 68fb ldr r3, [r7, #12]
800535c: 681b ldr r3, [r3, #0]
800535e: 4a38 ldr r2, [pc, #224] @ (8005440 <HAL_ADC_Start_DMA+0x1ac>)
8005360: 4293 cmp r3, r2
8005362: d10d bne.n 8005380 <HAL_ADC_Start_DMA+0xec>
8005364: 4b35 ldr r3, [pc, #212] @ (800543c <HAL_ADC_Start_DMA+0x1a8>)
8005366: 685b ldr r3, [r3, #4]
8005368: f403 6380 and.w r3, r3, #1024 @ 0x400
800536c: 2b00 cmp r3, #0
800536e: d007 beq.n 8005380 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8005370: 68fb ldr r3, [r7, #12]
8005372: 6a9b ldr r3, [r3, #40] @ 0x28
8005374: f423 5340 bic.w r3, r3, #12288 @ 0x3000
8005378: f443 5280 orr.w r2, r3, #4096 @ 0x1000
800537c: 68fb ldr r3, [r7, #12]
800537e: 629a str r2, [r3, #40] @ 0x28
}
}
/* State machine update: Check if an injected conversion is ongoing */
if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8005380: 68fb ldr r3, [r7, #12]
8005382: 6a9b ldr r3, [r3, #40] @ 0x28
8005384: f403 5380 and.w r3, r3, #4096 @ 0x1000
8005388: 2b00 cmp r3, #0
800538a: d006 beq.n 800539a <HAL_ADC_Start_DMA+0x106>
{
/* Reset ADC error code fields related to conversions on group regular */
CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
800538c: 68fb ldr r3, [r7, #12]
800538e: 6adb ldr r3, [r3, #44] @ 0x2c
8005390: f023 0206 bic.w r2, r3, #6
8005394: 68fb ldr r3, [r7, #12]
8005396: 62da str r2, [r3, #44] @ 0x2c
8005398: e002 b.n 80053a0 <HAL_ADC_Start_DMA+0x10c>
}
else
{
/* Reset ADC all error code fields */
ADC_CLEAR_ERRORCODE(hadc);
800539a: 68fb ldr r3, [r7, #12]
800539c: 2200 movs r2, #0
800539e: 62da str r2, [r3, #44] @ 0x2c
}
/* Process unlocked */
/* Unlock before starting ADC conversions: in case of potential */
/* interruption, to let the process to ADC IRQ Handler. */
__HAL_UNLOCK(hadc);
80053a0: 68fb ldr r3, [r7, #12]
80053a2: 2200 movs r2, #0
80053a4: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Set the DMA transfer complete callback */
hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
80053a8: 68fb ldr r3, [r7, #12]
80053aa: 6a1b ldr r3, [r3, #32]
80053ac: 4a25 ldr r2, [pc, #148] @ (8005444 <HAL_ADC_Start_DMA+0x1b0>)
80053ae: 629a str r2, [r3, #40] @ 0x28
/* Set the DMA half transfer complete callback */
hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
80053b0: 68fb ldr r3, [r7, #12]
80053b2: 6a1b ldr r3, [r3, #32]
80053b4: 4a24 ldr r2, [pc, #144] @ (8005448 <HAL_ADC_Start_DMA+0x1b4>)
80053b6: 62da str r2, [r3, #44] @ 0x2c
/* Set the DMA error callback */
hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
80053b8: 68fb ldr r3, [r7, #12]
80053ba: 6a1b ldr r3, [r3, #32]
80053bc: 4a23 ldr r2, [pc, #140] @ (800544c <HAL_ADC_Start_DMA+0x1b8>)
80053be: 631a str r2, [r3, #48] @ 0x30
/* start (in case of SW start): */
/* Clear regular group conversion flag and overrun flag */
/* (To ensure of no unknown state from potential previous ADC */
/* operations) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
80053c0: 68fb ldr r3, [r7, #12]
80053c2: 681b ldr r3, [r3, #0]
80053c4: f06f 0202 mvn.w r2, #2
80053c8: 601a str r2, [r3, #0]
/* Enable ADC DMA mode */
SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
80053ca: 68fb ldr r3, [r7, #12]
80053cc: 681b ldr r3, [r3, #0]
80053ce: 689a ldr r2, [r3, #8]
80053d0: 68fb ldr r3, [r7, #12]
80053d2: 681b ldr r3, [r3, #0]
80053d4: f442 7280 orr.w r2, r2, #256 @ 0x100
80053d8: 609a str r2, [r3, #8]
/* Start the DMA channel */
HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
80053da: 68fb ldr r3, [r7, #12]
80053dc: 6a18 ldr r0, [r3, #32]
80053de: 68fb ldr r3, [r7, #12]
80053e0: 681b ldr r3, [r3, #0]
80053e2: 334c adds r3, #76 @ 0x4c
80053e4: 4619 mov r1, r3
80053e6: 68ba ldr r2, [r7, #8]
80053e8: 687b ldr r3, [r7, #4]
80053ea: f000 fbb5 bl 8005b58 <HAL_DMA_Start_IT>
/* Enable conversion of regular group. */
/* If software start has been selected, conversion starts immediately. */
/* If external trigger has been selected, conversion will start at next */
/* trigger event. */
if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
80053ee: 68fb ldr r3, [r7, #12]
80053f0: 681b ldr r3, [r3, #0]
80053f2: 689b ldr r3, [r3, #8]
80053f4: f403 2360 and.w r3, r3, #917504 @ 0xe0000
80053f8: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
80053fc: d108 bne.n 8005410 <HAL_ADC_Start_DMA+0x17c>
{
/* Start ADC conversion on regular group with SW start */
SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
80053fe: 68fb ldr r3, [r7, #12]
8005400: 681b ldr r3, [r3, #0]
8005402: 689a ldr r2, [r3, #8]
8005404: 68fb ldr r3, [r7, #12]
8005406: 681b ldr r3, [r3, #0]
8005408: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000
800540c: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
800540e: e00f b.n 8005430 <HAL_ADC_Start_DMA+0x19c>
}
else
{
/* Start ADC conversion on regular group with external trigger */
SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
8005410: 68fb ldr r3, [r7, #12]
8005412: 681b ldr r3, [r3, #0]
8005414: 689a ldr r2, [r3, #8]
8005416: 68fb ldr r3, [r7, #12]
8005418: 681b ldr r3, [r3, #0]
800541a: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
800541e: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
8005420: e006 b.n 8005430 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hadc);
8005422: 68fb ldr r3, [r7, #12]
8005424: 2200 movs r2, #0
8005426: f883 2024 strb.w r2, [r3, #36] @ 0x24
if (tmp_hal_status == HAL_OK)
800542a: e001 b.n 8005430 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
tmp_hal_status = HAL_ERROR;
800542c: 2301 movs r3, #1
800542e: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8005430: 7dfb ldrb r3, [r7, #23]
}
8005432: 4618 mov r0, r3
8005434: 3718 adds r7, #24
8005436: 46bd mov sp, r7
8005438: bd80 pop {r7, pc}
800543a: bf00 nop
800543c: 40012400 .word 0x40012400
8005440: 40012800 .word 0x40012800
8005444: 080057af .word 0x080057af
8005448: 0800582b .word 0x0800582b
800544c: 08005847 .word 0x08005847
08005450 <HAL_ADC_ConvCpltCallback>:
* @brief Conversion complete callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
8005450: b480 push {r7}
8005452: b083 sub sp, #12
8005454: af00 add r7, sp, #0
8005456: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvCpltCallback must be implemented in the user file.
*/
}
8005458: bf00 nop
800545a: 370c adds r7, #12
800545c: 46bd mov sp, r7
800545e: bc80 pop {r7}
8005460: 4770 bx lr
08005462 <HAL_ADC_ConvHalfCpltCallback>:
* @brief Conversion DMA half-transfer callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
{
8005462: b480 push {r7}
8005464: b083 sub sp, #12
8005466: af00 add r7, sp, #0
8005468: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
*/
}
800546a: bf00 nop
800546c: 370c adds r7, #12
800546e: 46bd mov sp, r7
8005470: bc80 pop {r7}
8005472: 4770 bx lr
08005474 <HAL_ADC_ErrorCallback>:
* (ADC conversion with interruption or transfer by DMA)
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
8005474: b480 push {r7}
8005476: b083 sub sp, #12
8005478: af00 add r7, sp, #0
800547a: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ErrorCallback must be implemented in the user file.
*/
}
800547c: bf00 nop
800547e: 370c adds r7, #12
8005480: 46bd mov sp, r7
8005482: bc80 pop {r7}
8005484: 4770 bx lr
...
08005488 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8005488: b480 push {r7}
800548a: b085 sub sp, #20
800548c: af00 add r7, sp, #0
800548e: 6078 str r0, [r7, #4]
8005490: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8005492: 2300 movs r3, #0
8005494: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
8005496: 2300 movs r3, #0
8005498: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
800549a: 687b ldr r3, [r7, #4]
800549c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
80054a0: 2b01 cmp r3, #1
80054a2: d101 bne.n 80054a8 <HAL_ADC_ConfigChannel+0x20>
80054a4: 2302 movs r3, #2
80054a6: e0dc b.n 8005662 <HAL_ADC_ConfigChannel+0x1da>
80054a8: 687b ldr r3, [r7, #4]
80054aa: 2201 movs r2, #1
80054ac: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
80054b0: 683b ldr r3, [r7, #0]
80054b2: 685b ldr r3, [r3, #4]
80054b4: 2b06 cmp r3, #6
80054b6: d81c bhi.n 80054f2 <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
80054b8: 687b ldr r3, [r7, #4]
80054ba: 681b ldr r3, [r3, #0]
80054bc: 6b59 ldr r1, [r3, #52] @ 0x34
80054be: 683b ldr r3, [r7, #0]
80054c0: 685a ldr r2, [r3, #4]
80054c2: 4613 mov r3, r2
80054c4: 009b lsls r3, r3, #2
80054c6: 4413 add r3, r2
80054c8: 3b05 subs r3, #5
80054ca: 221f movs r2, #31
80054cc: fa02 f303 lsl.w r3, r2, r3
80054d0: 43db mvns r3, r3
80054d2: 4019 ands r1, r3
80054d4: 683b ldr r3, [r7, #0]
80054d6: 6818 ldr r0, [r3, #0]
80054d8: 683b ldr r3, [r7, #0]
80054da: 685a ldr r2, [r3, #4]
80054dc: 4613 mov r3, r2
80054de: 009b lsls r3, r3, #2
80054e0: 4413 add r3, r2
80054e2: 3b05 subs r3, #5
80054e4: fa00 f203 lsl.w r2, r0, r3
80054e8: 687b ldr r3, [r7, #4]
80054ea: 681b ldr r3, [r3, #0]
80054ec: 430a orrs r2, r1
80054ee: 635a str r2, [r3, #52] @ 0x34
80054f0: e03c b.n 800556c <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
80054f2: 683b ldr r3, [r7, #0]
80054f4: 685b ldr r3, [r3, #4]
80054f6: 2b0c cmp r3, #12
80054f8: d81c bhi.n 8005534 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
80054fa: 687b ldr r3, [r7, #4]
80054fc: 681b ldr r3, [r3, #0]
80054fe: 6b19 ldr r1, [r3, #48] @ 0x30
8005500: 683b ldr r3, [r7, #0]
8005502: 685a ldr r2, [r3, #4]
8005504: 4613 mov r3, r2
8005506: 009b lsls r3, r3, #2
8005508: 4413 add r3, r2
800550a: 3b23 subs r3, #35 @ 0x23
800550c: 221f movs r2, #31
800550e: fa02 f303 lsl.w r3, r2, r3
8005512: 43db mvns r3, r3
8005514: 4019 ands r1, r3
8005516: 683b ldr r3, [r7, #0]
8005518: 6818 ldr r0, [r3, #0]
800551a: 683b ldr r3, [r7, #0]
800551c: 685a ldr r2, [r3, #4]
800551e: 4613 mov r3, r2
8005520: 009b lsls r3, r3, #2
8005522: 4413 add r3, r2
8005524: 3b23 subs r3, #35 @ 0x23
8005526: fa00 f203 lsl.w r2, r0, r3
800552a: 687b ldr r3, [r7, #4]
800552c: 681b ldr r3, [r3, #0]
800552e: 430a orrs r2, r1
8005530: 631a str r2, [r3, #48] @ 0x30
8005532: e01b b.n 800556c <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
8005534: 687b ldr r3, [r7, #4]
8005536: 681b ldr r3, [r3, #0]
8005538: 6ad9 ldr r1, [r3, #44] @ 0x2c
800553a: 683b ldr r3, [r7, #0]
800553c: 685a ldr r2, [r3, #4]
800553e: 4613 mov r3, r2
8005540: 009b lsls r3, r3, #2
8005542: 4413 add r3, r2
8005544: 3b41 subs r3, #65 @ 0x41
8005546: 221f movs r2, #31
8005548: fa02 f303 lsl.w r3, r2, r3
800554c: 43db mvns r3, r3
800554e: 4019 ands r1, r3
8005550: 683b ldr r3, [r7, #0]
8005552: 6818 ldr r0, [r3, #0]
8005554: 683b ldr r3, [r7, #0]
8005556: 685a ldr r2, [r3, #4]
8005558: 4613 mov r3, r2
800555a: 009b lsls r3, r3, #2
800555c: 4413 add r3, r2
800555e: 3b41 subs r3, #65 @ 0x41
8005560: fa00 f203 lsl.w r2, r0, r3
8005564: 687b ldr r3, [r7, #4]
8005566: 681b ldr r3, [r3, #0]
8005568: 430a orrs r2, r1
800556a: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
800556c: 683b ldr r3, [r7, #0]
800556e: 681b ldr r3, [r3, #0]
8005570: 2b09 cmp r3, #9
8005572: d91c bls.n 80055ae <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
8005574: 687b ldr r3, [r7, #4]
8005576: 681b ldr r3, [r3, #0]
8005578: 68d9 ldr r1, [r3, #12]
800557a: 683b ldr r3, [r7, #0]
800557c: 681a ldr r2, [r3, #0]
800557e: 4613 mov r3, r2
8005580: 005b lsls r3, r3, #1
8005582: 4413 add r3, r2
8005584: 3b1e subs r3, #30
8005586: 2207 movs r2, #7
8005588: fa02 f303 lsl.w r3, r2, r3
800558c: 43db mvns r3, r3
800558e: 4019 ands r1, r3
8005590: 683b ldr r3, [r7, #0]
8005592: 6898 ldr r0, [r3, #8]
8005594: 683b ldr r3, [r7, #0]
8005596: 681a ldr r2, [r3, #0]
8005598: 4613 mov r3, r2
800559a: 005b lsls r3, r3, #1
800559c: 4413 add r3, r2
800559e: 3b1e subs r3, #30
80055a0: fa00 f203 lsl.w r2, r0, r3
80055a4: 687b ldr r3, [r7, #4]
80055a6: 681b ldr r3, [r3, #0]
80055a8: 430a orrs r2, r1
80055aa: 60da str r2, [r3, #12]
80055ac: e019 b.n 80055e2 <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
80055ae: 687b ldr r3, [r7, #4]
80055b0: 681b ldr r3, [r3, #0]
80055b2: 6919 ldr r1, [r3, #16]
80055b4: 683b ldr r3, [r7, #0]
80055b6: 681a ldr r2, [r3, #0]
80055b8: 4613 mov r3, r2
80055ba: 005b lsls r3, r3, #1
80055bc: 4413 add r3, r2
80055be: 2207 movs r2, #7
80055c0: fa02 f303 lsl.w r3, r2, r3
80055c4: 43db mvns r3, r3
80055c6: 4019 ands r1, r3
80055c8: 683b ldr r3, [r7, #0]
80055ca: 6898 ldr r0, [r3, #8]
80055cc: 683b ldr r3, [r7, #0]
80055ce: 681a ldr r2, [r3, #0]
80055d0: 4613 mov r3, r2
80055d2: 005b lsls r3, r3, #1
80055d4: 4413 add r3, r2
80055d6: fa00 f203 lsl.w r2, r0, r3
80055da: 687b ldr r3, [r7, #4]
80055dc: 681b ldr r3, [r3, #0]
80055de: 430a orrs r2, r1
80055e0: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
80055e2: 683b ldr r3, [r7, #0]
80055e4: 681b ldr r3, [r3, #0]
80055e6: 2b10 cmp r3, #16
80055e8: d003 beq.n 80055f2 <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
80055ea: 683b ldr r3, [r7, #0]
80055ec: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
80055ee: 2b11 cmp r3, #17
80055f0: d132 bne.n 8005658 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
80055f2: 687b ldr r3, [r7, #4]
80055f4: 681b ldr r3, [r3, #0]
80055f6: 4a1d ldr r2, [pc, #116] @ (800566c <HAL_ADC_ConfigChannel+0x1e4>)
80055f8: 4293 cmp r3, r2
80055fa: d125 bne.n 8005648 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
80055fc: 687b ldr r3, [r7, #4]
80055fe: 681b ldr r3, [r3, #0]
8005600: 689b ldr r3, [r3, #8]
8005602: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8005606: 2b00 cmp r3, #0
8005608: d126 bne.n 8005658 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
800560a: 687b ldr r3, [r7, #4]
800560c: 681b ldr r3, [r3, #0]
800560e: 689a ldr r2, [r3, #8]
8005610: 687b ldr r3, [r7, #4]
8005612: 681b ldr r3, [r3, #0]
8005614: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8005618: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
800561a: 683b ldr r3, [r7, #0]
800561c: 681b ldr r3, [r3, #0]
800561e: 2b10 cmp r3, #16
8005620: d11a bne.n 8005658 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
8005622: 4b13 ldr r3, [pc, #76] @ (8005670 <HAL_ADC_ConfigChannel+0x1e8>)
8005624: 681b ldr r3, [r3, #0]
8005626: 4a13 ldr r2, [pc, #76] @ (8005674 <HAL_ADC_ConfigChannel+0x1ec>)
8005628: fba2 2303 umull r2, r3, r2, r3
800562c: 0c9a lsrs r2, r3, #18
800562e: 4613 mov r3, r2
8005630: 009b lsls r3, r3, #2
8005632: 4413 add r3, r2
8005634: 005b lsls r3, r3, #1
8005636: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005638: e002 b.n 8005640 <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
800563a: 68bb ldr r3, [r7, #8]
800563c: 3b01 subs r3, #1
800563e: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005640: 68bb ldr r3, [r7, #8]
8005642: 2b00 cmp r3, #0
8005644: d1f9 bne.n 800563a <HAL_ADC_ConfigChannel+0x1b2>
8005646: e007 b.n 8005658 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8005648: 687b ldr r3, [r7, #4]
800564a: 6a9b ldr r3, [r3, #40] @ 0x28
800564c: f043 0220 orr.w r2, r3, #32
8005650: 687b ldr r3, [r7, #4]
8005652: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8005654: 2301 movs r3, #1
8005656: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8005658: 687b ldr r3, [r7, #4]
800565a: 2200 movs r2, #0
800565c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
8005660: 7bfb ldrb r3, [r7, #15]
}
8005662: 4618 mov r0, r3
8005664: 3714 adds r7, #20
8005666: 46bd mov sp, r7
8005668: bc80 pop {r7}
800566a: 4770 bx lr
800566c: 40012400 .word 0x40012400
8005670: 20000010 .word 0x20000010
8005674: 431bde83 .word 0x431bde83
08005678 <ADC_Enable>:
* and voltage regulator must be enabled (done into HAL_ADC_Init()).
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
{
8005678: b580 push {r7, lr}
800567a: b084 sub sp, #16
800567c: af00 add r7, sp, #0
800567e: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8005680: 2300 movs r3, #0
8005682: 60fb str r3, [r7, #12]
__IO uint32_t wait_loop_index = 0U;
8005684: 2300 movs r3, #0
8005686: 60bb str r3, [r7, #8]
/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
/* enabling phase not yet completed: flag ADC ready not yet set). */
/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
/* causes: ADC clock not running, ...). */
if (ADC_IS_ENABLE(hadc) == RESET)
8005688: 687b ldr r3, [r7, #4]
800568a: 681b ldr r3, [r3, #0]
800568c: 689b ldr r3, [r3, #8]
800568e: f003 0301 and.w r3, r3, #1
8005692: 2b01 cmp r3, #1
8005694: d040 beq.n 8005718 <ADC_Enable+0xa0>
{
/* Enable the Peripheral */
__HAL_ADC_ENABLE(hadc);
8005696: 687b ldr r3, [r7, #4]
8005698: 681b ldr r3, [r3, #0]
800569a: 689a ldr r2, [r3, #8]
800569c: 687b ldr r3, [r7, #4]
800569e: 681b ldr r3, [r3, #0]
80056a0: f042 0201 orr.w r2, r2, #1
80056a4: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
80056a6: 4b1f ldr r3, [pc, #124] @ (8005724 <ADC_Enable+0xac>)
80056a8: 681b ldr r3, [r3, #0]
80056aa: 4a1f ldr r2, [pc, #124] @ (8005728 <ADC_Enable+0xb0>)
80056ac: fba2 2303 umull r2, r3, r2, r3
80056b0: 0c9b lsrs r3, r3, #18
80056b2: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80056b4: e002 b.n 80056bc <ADC_Enable+0x44>
{
wait_loop_index--;
80056b6: 68bb ldr r3, [r7, #8]
80056b8: 3b01 subs r3, #1
80056ba: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80056bc: 68bb ldr r3, [r7, #8]
80056be: 2b00 cmp r3, #0
80056c0: d1f9 bne.n 80056b6 <ADC_Enable+0x3e>
}
/* Get tick count */
tickstart = HAL_GetTick();
80056c2: f7ff fd05 bl 80050d0 <HAL_GetTick>
80056c6: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively enabled */
while(ADC_IS_ENABLE(hadc) == RESET)
80056c8: e01f b.n 800570a <ADC_Enable+0x92>
{
if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
80056ca: f7ff fd01 bl 80050d0 <HAL_GetTick>
80056ce: 4602 mov r2, r0
80056d0: 68fb ldr r3, [r7, #12]
80056d2: 1ad3 subs r3, r2, r3
80056d4: 2b02 cmp r3, #2
80056d6: d918 bls.n 800570a <ADC_Enable+0x92>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) == RESET)
80056d8: 687b ldr r3, [r7, #4]
80056da: 681b ldr r3, [r3, #0]
80056dc: 689b ldr r3, [r3, #8]
80056de: f003 0301 and.w r3, r3, #1
80056e2: 2b01 cmp r3, #1
80056e4: d011 beq.n 800570a <ADC_Enable+0x92>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80056e6: 687b ldr r3, [r7, #4]
80056e8: 6a9b ldr r3, [r3, #40] @ 0x28
80056ea: f043 0210 orr.w r2, r3, #16
80056ee: 687b ldr r3, [r7, #4]
80056f0: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80056f2: 687b ldr r3, [r7, #4]
80056f4: 6adb ldr r3, [r3, #44] @ 0x2c
80056f6: f043 0201 orr.w r2, r3, #1
80056fa: 687b ldr r3, [r7, #4]
80056fc: 62da str r2, [r3, #44] @ 0x2c
/* Process unlocked */
__HAL_UNLOCK(hadc);
80056fe: 687b ldr r3, [r7, #4]
8005700: 2200 movs r2, #0
8005702: f883 2024 strb.w r2, [r3, #36] @ 0x24
return HAL_ERROR;
8005706: 2301 movs r3, #1
8005708: e007 b.n 800571a <ADC_Enable+0xa2>
while(ADC_IS_ENABLE(hadc) == RESET)
800570a: 687b ldr r3, [r7, #4]
800570c: 681b ldr r3, [r3, #0]
800570e: 689b ldr r3, [r3, #8]
8005710: f003 0301 and.w r3, r3, #1
8005714: 2b01 cmp r3, #1
8005716: d1d8 bne.n 80056ca <ADC_Enable+0x52>
}
}
}
/* Return HAL status */
return HAL_OK;
8005718: 2300 movs r3, #0
}
800571a: 4618 mov r0, r3
800571c: 3710 adds r7, #16
800571e: 46bd mov sp, r7
8005720: bd80 pop {r7, pc}
8005722: bf00 nop
8005724: 20000010 .word 0x20000010
8005728: 431bde83 .word 0x431bde83
0800572c <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
800572c: b580 push {r7, lr}
800572e: b084 sub sp, #16
8005730: af00 add r7, sp, #0
8005732: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8005734: 2300 movs r3, #0
8005736: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
8005738: 687b ldr r3, [r7, #4]
800573a: 681b ldr r3, [r3, #0]
800573c: 689b ldr r3, [r3, #8]
800573e: f003 0301 and.w r3, r3, #1
8005742: 2b01 cmp r3, #1
8005744: d12e bne.n 80057a4 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
8005746: 687b ldr r3, [r7, #4]
8005748: 681b ldr r3, [r3, #0]
800574a: 689a ldr r2, [r3, #8]
800574c: 687b ldr r3, [r7, #4]
800574e: 681b ldr r3, [r3, #0]
8005750: f022 0201 bic.w r2, r2, #1
8005754: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
8005756: f7ff fcbb bl 80050d0 <HAL_GetTick>
800575a: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
800575c: e01b b.n 8005796 <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
800575e: f7ff fcb7 bl 80050d0 <HAL_GetTick>
8005762: 4602 mov r2, r0
8005764: 68fb ldr r3, [r7, #12]
8005766: 1ad3 subs r3, r2, r3
8005768: 2b02 cmp r3, #2
800576a: d914 bls.n 8005796 <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
800576c: 687b ldr r3, [r7, #4]
800576e: 681b ldr r3, [r3, #0]
8005770: 689b ldr r3, [r3, #8]
8005772: f003 0301 and.w r3, r3, #1
8005776: 2b01 cmp r3, #1
8005778: d10d bne.n 8005796 <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
800577a: 687b ldr r3, [r7, #4]
800577c: 6a9b ldr r3, [r3, #40] @ 0x28
800577e: f043 0210 orr.w r2, r3, #16
8005782: 687b ldr r3, [r7, #4]
8005784: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8005786: 687b ldr r3, [r7, #4]
8005788: 6adb ldr r3, [r3, #44] @ 0x2c
800578a: f043 0201 orr.w r2, r3, #1
800578e: 687b ldr r3, [r7, #4]
8005790: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
8005792: 2301 movs r3, #1
8005794: e007 b.n 80057a6 <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
8005796: 687b ldr r3, [r7, #4]
8005798: 681b ldr r3, [r3, #0]
800579a: 689b ldr r3, [r3, #8]
800579c: f003 0301 and.w r3, r3, #1
80057a0: 2b01 cmp r3, #1
80057a2: d0dc beq.n 800575e <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
80057a4: 2300 movs r3, #0
}
80057a6: 4618 mov r0, r3
80057a8: 3710 adds r7, #16
80057aa: 46bd mov sp, r7
80057ac: bd80 pop {r7, pc}
080057ae <ADC_DMAConvCplt>:
* @brief DMA transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
80057ae: b580 push {r7, lr}
80057b0: b084 sub sp, #16
80057b2: af00 add r7, sp, #0
80057b4: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
80057b6: 687b ldr r3, [r7, #4]
80057b8: 6a5b ldr r3, [r3, #36] @ 0x24
80057ba: 60fb str r3, [r7, #12]
/* Update state machine on conversion status if not in error state */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
80057bc: 68fb ldr r3, [r7, #12]
80057be: 6a9b ldr r3, [r3, #40] @ 0x28
80057c0: f003 0350 and.w r3, r3, #80 @ 0x50
80057c4: 2b00 cmp r3, #0
80057c6: d127 bne.n 8005818 <ADC_DMAConvCplt+0x6a>
{
/* Update ADC state machine */
SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
80057c8: 68fb ldr r3, [r7, #12]
80057ca: 6a9b ldr r3, [r3, #40] @ 0x28
80057cc: f443 7200 orr.w r2, r3, #512 @ 0x200
80057d0: 68fb ldr r3, [r7, #12]
80057d2: 629a str r2, [r3, #40] @ 0x28
/* Determine whether any further conversion upcoming on group regular */
/* by external trigger, continuous mode or scan sequence on going. */
/* Note: On STM32F1 devices, in case of sequencer enabled */
/* (several ranks selected), end of conversion flag is raised */
/* at the end of the sequence. */
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
80057d4: 68fb ldr r3, [r7, #12]
80057d6: 681b ldr r3, [r3, #0]
80057d8: 689b ldr r3, [r3, #8]
80057da: f403 2360 and.w r3, r3, #917504 @ 0xe0000
80057de: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
80057e2: d115 bne.n 8005810 <ADC_DMAConvCplt+0x62>
(hadc->Init.ContinuousConvMode == DISABLE) )
80057e4: 68fb ldr r3, [r7, #12]
80057e6: 7b1b ldrb r3, [r3, #12]
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
80057e8: 2b00 cmp r3, #0
80057ea: d111 bne.n 8005810 <ADC_DMAConvCplt+0x62>
{
/* Set ADC state */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
80057ec: 68fb ldr r3, [r7, #12]
80057ee: 6a9b ldr r3, [r3, #40] @ 0x28
80057f0: f423 7280 bic.w r2, r3, #256 @ 0x100
80057f4: 68fb ldr r3, [r7, #12]
80057f6: 629a str r2, [r3, #40] @ 0x28
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
80057f8: 68fb ldr r3, [r7, #12]
80057fa: 6a9b ldr r3, [r3, #40] @ 0x28
80057fc: f403 5380 and.w r3, r3, #4096 @ 0x1000
8005800: 2b00 cmp r3, #0
8005802: d105 bne.n 8005810 <ADC_DMAConvCplt+0x62>
{
SET_BIT(hadc->State, HAL_ADC_STATE_READY);
8005804: 68fb ldr r3, [r7, #12]
8005806: 6a9b ldr r3, [r3, #40] @ 0x28
8005808: f043 0201 orr.w r2, r3, #1
800580c: 68fb ldr r3, [r7, #12]
800580e: 629a str r2, [r3, #40] @ 0x28
/* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvCpltCallback(hadc);
#else
HAL_ADC_ConvCpltCallback(hadc);
8005810: 68f8 ldr r0, [r7, #12]
8005812: f7ff fe1d bl 8005450 <HAL_ADC_ConvCpltCallback>
else
{
/* Call DMA error callback */
hadc->DMA_Handle->XferErrorCallback(hdma);
}
}
8005816: e004 b.n 8005822 <ADC_DMAConvCplt+0x74>
hadc->DMA_Handle->XferErrorCallback(hdma);
8005818: 68fb ldr r3, [r7, #12]
800581a: 6a1b ldr r3, [r3, #32]
800581c: 6b1b ldr r3, [r3, #48] @ 0x30
800581e: 6878 ldr r0, [r7, #4]
8005820: 4798 blx r3
}
8005822: bf00 nop
8005824: 3710 adds r7, #16
8005826: 46bd mov sp, r7
8005828: bd80 pop {r7, pc}
0800582a <ADC_DMAHalfConvCplt>:
* @brief DMA half transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
{
800582a: b580 push {r7, lr}
800582c: b084 sub sp, #16
800582e: af00 add r7, sp, #0
8005830: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8005832: 687b ldr r3, [r7, #4]
8005834: 6a5b ldr r3, [r3, #36] @ 0x24
8005836: 60fb str r3, [r7, #12]
/* Half conversion callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvHalfCpltCallback(hadc);
#else
HAL_ADC_ConvHalfCpltCallback(hadc);
8005838: 68f8 ldr r0, [r7, #12]
800583a: f7ff fe12 bl 8005462 <HAL_ADC_ConvHalfCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
800583e: bf00 nop
8005840: 3710 adds r7, #16
8005842: 46bd mov sp, r7
8005844: bd80 pop {r7, pc}
08005846 <ADC_DMAError>:
* @brief DMA error callback
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAError(DMA_HandleTypeDef *hdma)
{
8005846: b580 push {r7, lr}
8005848: b084 sub sp, #16
800584a: af00 add r7, sp, #0
800584c: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
800584e: 687b ldr r3, [r7, #4]
8005850: 6a5b ldr r3, [r3, #36] @ 0x24
8005852: 60fb str r3, [r7, #12]
/* Set ADC state */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
8005854: 68fb ldr r3, [r7, #12]
8005856: 6a9b ldr r3, [r3, #40] @ 0x28
8005858: f043 0240 orr.w r2, r3, #64 @ 0x40
800585c: 68fb ldr r3, [r7, #12]
800585e: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to DMA error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
8005860: 68fb ldr r3, [r7, #12]
8005862: 6adb ldr r3, [r3, #44] @ 0x2c
8005864: f043 0204 orr.w r2, r3, #4
8005868: 68fb ldr r3, [r7, #12]
800586a: 62da str r2, [r3, #44] @ 0x2c
/* Error callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ErrorCallback(hadc);
#else
HAL_ADC_ErrorCallback(hadc);
800586c: 68f8 ldr r0, [r7, #12]
800586e: f7ff fe01 bl 8005474 <HAL_ADC_ErrorCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
8005872: bf00 nop
8005874: 3710 adds r7, #16
8005876: 46bd mov sp, r7
8005878: bd80 pop {r7, pc}
...
0800587c <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
800587c: b480 push {r7}
800587e: b085 sub sp, #20
8005880: af00 add r7, sp, #0
8005882: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005884: 687b ldr r3, [r7, #4]
8005886: f003 0307 and.w r3, r3, #7
800588a: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
800588c: 4b0c ldr r3, [pc, #48] @ (80058c0 <__NVIC_SetPriorityGrouping+0x44>)
800588e: 68db ldr r3, [r3, #12]
8005890: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8005892: 68ba ldr r2, [r7, #8]
8005894: f64f 03ff movw r3, #63743 @ 0xf8ff
8005898: 4013 ands r3, r2
800589a: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
800589c: 68fb ldr r3, [r7, #12]
800589e: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
80058a0: 68bb ldr r3, [r7, #8]
80058a2: 4313 orrs r3, r2
reg_value = (reg_value |
80058a4: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
80058a8: f443 3300 orr.w r3, r3, #131072 @ 0x20000
80058ac: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
80058ae: 4a04 ldr r2, [pc, #16] @ (80058c0 <__NVIC_SetPriorityGrouping+0x44>)
80058b0: 68bb ldr r3, [r7, #8]
80058b2: 60d3 str r3, [r2, #12]
}
80058b4: bf00 nop
80058b6: 3714 adds r7, #20
80058b8: 46bd mov sp, r7
80058ba: bc80 pop {r7}
80058bc: 4770 bx lr
80058be: bf00 nop
80058c0: e000ed00 .word 0xe000ed00
080058c4 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
80058c4: b480 push {r7}
80058c6: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
80058c8: 4b04 ldr r3, [pc, #16] @ (80058dc <__NVIC_GetPriorityGrouping+0x18>)
80058ca: 68db ldr r3, [r3, #12]
80058cc: 0a1b lsrs r3, r3, #8
80058ce: f003 0307 and.w r3, r3, #7
}
80058d2: 4618 mov r0, r3
80058d4: 46bd mov sp, r7
80058d6: bc80 pop {r7}
80058d8: 4770 bx lr
80058da: bf00 nop
80058dc: e000ed00 .word 0xe000ed00
080058e0 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
80058e0: b480 push {r7}
80058e2: b083 sub sp, #12
80058e4: af00 add r7, sp, #0
80058e6: 4603 mov r3, r0
80058e8: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80058ea: f997 3007 ldrsb.w r3, [r7, #7]
80058ee: 2b00 cmp r3, #0
80058f0: db0b blt.n 800590a <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
80058f2: 79fb ldrb r3, [r7, #7]
80058f4: f003 021f and.w r2, r3, #31
80058f8: 4906 ldr r1, [pc, #24] @ (8005914 <__NVIC_EnableIRQ+0x34>)
80058fa: f997 3007 ldrsb.w r3, [r7, #7]
80058fe: 095b lsrs r3, r3, #5
8005900: 2001 movs r0, #1
8005902: fa00 f202 lsl.w r2, r0, r2
8005906: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
800590a: bf00 nop
800590c: 370c adds r7, #12
800590e: 46bd mov sp, r7
8005910: bc80 pop {r7}
8005912: 4770 bx lr
8005914: e000e100 .word 0xe000e100
08005918 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8005918: b480 push {r7}
800591a: b083 sub sp, #12
800591c: af00 add r7, sp, #0
800591e: 4603 mov r3, r0
8005920: 6039 str r1, [r7, #0]
8005922: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8005924: f997 3007 ldrsb.w r3, [r7, #7]
8005928: 2b00 cmp r3, #0
800592a: db0a blt.n 8005942 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
800592c: 683b ldr r3, [r7, #0]
800592e: b2da uxtb r2, r3
8005930: 490c ldr r1, [pc, #48] @ (8005964 <__NVIC_SetPriority+0x4c>)
8005932: f997 3007 ldrsb.w r3, [r7, #7]
8005936: 0112 lsls r2, r2, #4
8005938: b2d2 uxtb r2, r2
800593a: 440b add r3, r1
800593c: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8005940: e00a b.n 8005958 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8005942: 683b ldr r3, [r7, #0]
8005944: b2da uxtb r2, r3
8005946: 4908 ldr r1, [pc, #32] @ (8005968 <__NVIC_SetPriority+0x50>)
8005948: 79fb ldrb r3, [r7, #7]
800594a: f003 030f and.w r3, r3, #15
800594e: 3b04 subs r3, #4
8005950: 0112 lsls r2, r2, #4
8005952: b2d2 uxtb r2, r2
8005954: 440b add r3, r1
8005956: 761a strb r2, [r3, #24]
}
8005958: bf00 nop
800595a: 370c adds r7, #12
800595c: 46bd mov sp, r7
800595e: bc80 pop {r7}
8005960: 4770 bx lr
8005962: bf00 nop
8005964: e000e100 .word 0xe000e100
8005968: e000ed00 .word 0xe000ed00
0800596c <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
800596c: b480 push {r7}
800596e: b089 sub sp, #36 @ 0x24
8005970: af00 add r7, sp, #0
8005972: 60f8 str r0, [r7, #12]
8005974: 60b9 str r1, [r7, #8]
8005976: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005978: 68fb ldr r3, [r7, #12]
800597a: f003 0307 and.w r3, r3, #7
800597e: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8005980: 69fb ldr r3, [r7, #28]
8005982: f1c3 0307 rsb r3, r3, #7
8005986: 2b04 cmp r3, #4
8005988: bf28 it cs
800598a: 2304 movcs r3, #4
800598c: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
800598e: 69fb ldr r3, [r7, #28]
8005990: 3304 adds r3, #4
8005992: 2b06 cmp r3, #6
8005994: d902 bls.n 800599c <NVIC_EncodePriority+0x30>
8005996: 69fb ldr r3, [r7, #28]
8005998: 3b03 subs r3, #3
800599a: e000 b.n 800599e <NVIC_EncodePriority+0x32>
800599c: 2300 movs r3, #0
800599e: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
80059a0: f04f 32ff mov.w r2, #4294967295
80059a4: 69bb ldr r3, [r7, #24]
80059a6: fa02 f303 lsl.w r3, r2, r3
80059aa: 43da mvns r2, r3
80059ac: 68bb ldr r3, [r7, #8]
80059ae: 401a ands r2, r3
80059b0: 697b ldr r3, [r7, #20]
80059b2: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
80059b4: f04f 31ff mov.w r1, #4294967295
80059b8: 697b ldr r3, [r7, #20]
80059ba: fa01 f303 lsl.w r3, r1, r3
80059be: 43d9 mvns r1, r3
80059c0: 687b ldr r3, [r7, #4]
80059c2: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
80059c4: 4313 orrs r3, r2
);
}
80059c6: 4618 mov r0, r3
80059c8: 3724 adds r7, #36 @ 0x24
80059ca: 46bd mov sp, r7
80059cc: bc80 pop {r7}
80059ce: 4770 bx lr
080059d0 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
80059d0: b580 push {r7, lr}
80059d2: b082 sub sp, #8
80059d4: af00 add r7, sp, #0
80059d6: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
80059d8: 687b ldr r3, [r7, #4]
80059da: 3b01 subs r3, #1
80059dc: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
80059e0: d301 bcc.n 80059e6 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
80059e2: 2301 movs r3, #1
80059e4: e00f b.n 8005a06 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
80059e6: 4a0a ldr r2, [pc, #40] @ (8005a10 <SysTick_Config+0x40>)
80059e8: 687b ldr r3, [r7, #4]
80059ea: 3b01 subs r3, #1
80059ec: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
80059ee: 210f movs r1, #15
80059f0: f04f 30ff mov.w r0, #4294967295
80059f4: f7ff ff90 bl 8005918 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
80059f8: 4b05 ldr r3, [pc, #20] @ (8005a10 <SysTick_Config+0x40>)
80059fa: 2200 movs r2, #0
80059fc: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
80059fe: 4b04 ldr r3, [pc, #16] @ (8005a10 <SysTick_Config+0x40>)
8005a00: 2207 movs r2, #7
8005a02: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8005a04: 2300 movs r3, #0
}
8005a06: 4618 mov r0, r3
8005a08: 3708 adds r7, #8
8005a0a: 46bd mov sp, r7
8005a0c: bd80 pop {r7, pc}
8005a0e: bf00 nop
8005a10: e000e010 .word 0xe000e010
08005a14 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8005a14: b580 push {r7, lr}
8005a16: b082 sub sp, #8
8005a18: af00 add r7, sp, #0
8005a1a: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8005a1c: 6878 ldr r0, [r7, #4]
8005a1e: f7ff ff2d bl 800587c <__NVIC_SetPriorityGrouping>
}
8005a22: bf00 nop
8005a24: 3708 adds r7, #8
8005a26: 46bd mov sp, r7
8005a28: bd80 pop {r7, pc}
08005a2a <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8005a2a: b580 push {r7, lr}
8005a2c: b086 sub sp, #24
8005a2e: af00 add r7, sp, #0
8005a30: 4603 mov r3, r0
8005a32: 60b9 str r1, [r7, #8]
8005a34: 607a str r2, [r7, #4]
8005a36: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8005a38: 2300 movs r3, #0
8005a3a: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8005a3c: f7ff ff42 bl 80058c4 <__NVIC_GetPriorityGrouping>
8005a40: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8005a42: 687a ldr r2, [r7, #4]
8005a44: 68b9 ldr r1, [r7, #8]
8005a46: 6978 ldr r0, [r7, #20]
8005a48: f7ff ff90 bl 800596c <NVIC_EncodePriority>
8005a4c: 4602 mov r2, r0
8005a4e: f997 300f ldrsb.w r3, [r7, #15]
8005a52: 4611 mov r1, r2
8005a54: 4618 mov r0, r3
8005a56: f7ff ff5f bl 8005918 <__NVIC_SetPriority>
}
8005a5a: bf00 nop
8005a5c: 3718 adds r7, #24
8005a5e: 46bd mov sp, r7
8005a60: bd80 pop {r7, pc}
08005a62 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8005a62: b580 push {r7, lr}
8005a64: b082 sub sp, #8
8005a66: af00 add r7, sp, #0
8005a68: 4603 mov r3, r0
8005a6a: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8005a6c: f997 3007 ldrsb.w r3, [r7, #7]
8005a70: 4618 mov r0, r3
8005a72: f7ff ff35 bl 80058e0 <__NVIC_EnableIRQ>
}
8005a76: bf00 nop
8005a78: 3708 adds r7, #8
8005a7a: 46bd mov sp, r7
8005a7c: bd80 pop {r7, pc}
08005a7e <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8005a7e: b580 push {r7, lr}
8005a80: b082 sub sp, #8
8005a82: af00 add r7, sp, #0
8005a84: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8005a86: 6878 ldr r0, [r7, #4]
8005a88: f7ff ffa2 bl 80059d0 <SysTick_Config>
8005a8c: 4603 mov r3, r0
}
8005a8e: 4618 mov r0, r3
8005a90: 3708 adds r7, #8
8005a92: 46bd mov sp, r7
8005a94: bd80 pop {r7, pc}
08005a96 <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8005a96: b580 push {r7, lr}
8005a98: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
8005a9a: f7fc f8b3 bl 8001c04 <HAL_SYSTICK_Callback>
}
8005a9e: bf00 nop
8005aa0: bd80 pop {r7, pc}
...
08005aa4 <HAL_DMA_Init>:
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8005aa4: b480 push {r7}
8005aa6: b085 sub sp, #20
8005aa8: af00 add r7, sp, #0
8005aaa: 6078 str r0, [r7, #4]
uint32_t tmp = 0U;
8005aac: 2300 movs r3, #0
8005aae: 60fb str r3, [r7, #12]
/* Check the DMA handle allocation */
if(hdma == NULL)
8005ab0: 687b ldr r3, [r7, #4]
8005ab2: 2b00 cmp r3, #0
8005ab4: d101 bne.n 8005aba <HAL_DMA_Init+0x16>
{
return HAL_ERROR;
8005ab6: 2301 movs r3, #1
8005ab8: e043 b.n 8005b42 <HAL_DMA_Init+0x9e>
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
hdma->DmaBaseAddress = DMA2;
}
#else
/* DMA1 */
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
8005aba: 687b ldr r3, [r7, #4]
8005abc: 681b ldr r3, [r3, #0]
8005abe: 461a mov r2, r3
8005ac0: 4b22 ldr r3, [pc, #136] @ (8005b4c <HAL_DMA_Init+0xa8>)
8005ac2: 4413 add r3, r2
8005ac4: 4a22 ldr r2, [pc, #136] @ (8005b50 <HAL_DMA_Init+0xac>)
8005ac6: fba2 2303 umull r2, r3, r2, r3
8005aca: 091b lsrs r3, r3, #4
8005acc: 009a lsls r2, r3, #2
8005ace: 687b ldr r3, [r7, #4]
8005ad0: 641a str r2, [r3, #64] @ 0x40
hdma->DmaBaseAddress = DMA1;
8005ad2: 687b ldr r3, [r7, #4]
8005ad4: 4a1f ldr r2, [pc, #124] @ (8005b54 <HAL_DMA_Init+0xb0>)
8005ad6: 63da str r2, [r3, #60] @ 0x3c
#endif /* DMA2 */
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005ad8: 687b ldr r3, [r7, #4]
8005ada: 2202 movs r2, #2
8005adc: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Get the CR register value */
tmp = hdma->Instance->CCR;
8005ae0: 687b ldr r3, [r7, #4]
8005ae2: 681b ldr r3, [r3, #0]
8005ae4: 681b ldr r3, [r3, #0]
8005ae6: 60fb str r3, [r7, #12]
/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
8005ae8: 68fb ldr r3, [r7, #12]
8005aea: f423 537f bic.w r3, r3, #16320 @ 0x3fc0
8005aee: f023 0330 bic.w r3, r3, #48 @ 0x30
8005af2: 60fb str r3, [r7, #12]
DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
DMA_CCR_DIR));
/* Prepare the DMA Channel configuration */
tmp |= hdma->Init.Direction |
8005af4: 687b ldr r3, [r7, #4]
8005af6: 685a ldr r2, [r3, #4]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005af8: 687b ldr r3, [r7, #4]
8005afa: 689b ldr r3, [r3, #8]
tmp |= hdma->Init.Direction |
8005afc: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005afe: 687b ldr r3, [r7, #4]
8005b00: 68db ldr r3, [r3, #12]
8005b02: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005b04: 687b ldr r3, [r7, #4]
8005b06: 691b ldr r3, [r3, #16]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005b08: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005b0a: 687b ldr r3, [r7, #4]
8005b0c: 695b ldr r3, [r3, #20]
8005b0e: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8005b10: 687b ldr r3, [r7, #4]
8005b12: 699b ldr r3, [r3, #24]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005b14: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8005b16: 687b ldr r3, [r7, #4]
8005b18: 69db ldr r3, [r3, #28]
8005b1a: 4313 orrs r3, r2
tmp |= hdma->Init.Direction |
8005b1c: 68fa ldr r2, [r7, #12]
8005b1e: 4313 orrs r3, r2
8005b20: 60fb str r3, [r7, #12]
/* Write to DMA Channel CR register */
hdma->Instance->CCR = tmp;
8005b22: 687b ldr r3, [r7, #4]
8005b24: 681b ldr r3, [r3, #0]
8005b26: 68fa ldr r2, [r7, #12]
8005b28: 601a str r2, [r3, #0]
/* Initialise the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005b2a: 687b ldr r3, [r7, #4]
8005b2c: 2200 movs r2, #0
8005b2e: 639a str r2, [r3, #56] @ 0x38
/* Initialize the DMA state*/
hdma->State = HAL_DMA_STATE_READY;
8005b30: 687b ldr r3, [r7, #4]
8005b32: 2201 movs r2, #1
8005b34: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Allocate lock resource and initialize it */
hdma->Lock = HAL_UNLOCKED;
8005b38: 687b ldr r3, [r7, #4]
8005b3a: 2200 movs r2, #0
8005b3c: f883 2020 strb.w r2, [r3, #32]
return HAL_OK;
8005b40: 2300 movs r3, #0
}
8005b42: 4618 mov r0, r3
8005b44: 3714 adds r7, #20
8005b46: 46bd mov sp, r7
8005b48: bc80 pop {r7}
8005b4a: 4770 bx lr
8005b4c: bffdfff8 .word 0xbffdfff8
8005b50: cccccccd .word 0xcccccccd
8005b54: 40020000 .word 0x40020000
08005b58 <HAL_DMA_Start_IT>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8005b58: b580 push {r7, lr}
8005b5a: b086 sub sp, #24
8005b5c: af00 add r7, sp, #0
8005b5e: 60f8 str r0, [r7, #12]
8005b60: 60b9 str r1, [r7, #8]
8005b62: 607a str r2, [r7, #4]
8005b64: 603b str r3, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8005b66: 2300 movs r3, #0
8005b68: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
8005b6a: 68fb ldr r3, [r7, #12]
8005b6c: f893 3020 ldrb.w r3, [r3, #32]
8005b70: 2b01 cmp r3, #1
8005b72: d101 bne.n 8005b78 <HAL_DMA_Start_IT+0x20>
8005b74: 2302 movs r3, #2
8005b76: e04b b.n 8005c10 <HAL_DMA_Start_IT+0xb8>
8005b78: 68fb ldr r3, [r7, #12]
8005b7a: 2201 movs r2, #1
8005b7c: f883 2020 strb.w r2, [r3, #32]
if(HAL_DMA_STATE_READY == hdma->State)
8005b80: 68fb ldr r3, [r7, #12]
8005b82: f893 3021 ldrb.w r3, [r3, #33] @ 0x21
8005b86: b2db uxtb r3, r3
8005b88: 2b01 cmp r3, #1
8005b8a: d13a bne.n 8005c02 <HAL_DMA_Start_IT+0xaa>
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005b8c: 68fb ldr r3, [r7, #12]
8005b8e: 2202 movs r2, #2
8005b90: f883 2021 strb.w r2, [r3, #33] @ 0x21
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005b94: 68fb ldr r3, [r7, #12]
8005b96: 2200 movs r2, #0
8005b98: 639a str r2, [r3, #56] @ 0x38
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
8005b9a: 68fb ldr r3, [r7, #12]
8005b9c: 681b ldr r3, [r3, #0]
8005b9e: 681a ldr r2, [r3, #0]
8005ba0: 68fb ldr r3, [r7, #12]
8005ba2: 681b ldr r3, [r3, #0]
8005ba4: f022 0201 bic.w r2, r2, #1
8005ba8: 601a str r2, [r3, #0]
/* Configure the source, destination address and the data length & clear flags*/
DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
8005baa: 683b ldr r3, [r7, #0]
8005bac: 687a ldr r2, [r7, #4]
8005bae: 68b9 ldr r1, [r7, #8]
8005bb0: 68f8 ldr r0, [r7, #12]
8005bb2: f000 f937 bl 8005e24 <DMA_SetConfig>
/* Enable the transfer complete interrupt */
/* Enable the transfer Error interrupt */
if(NULL != hdma->XferHalfCpltCallback)
8005bb6: 68fb ldr r3, [r7, #12]
8005bb8: 6adb ldr r3, [r3, #44] @ 0x2c
8005bba: 2b00 cmp r3, #0
8005bbc: d008 beq.n 8005bd0 <HAL_DMA_Start_IT+0x78>
{
/* Enable the Half transfer complete interrupt as well */
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005bbe: 68fb ldr r3, [r7, #12]
8005bc0: 681b ldr r3, [r3, #0]
8005bc2: 681a ldr r2, [r3, #0]
8005bc4: 68fb ldr r3, [r7, #12]
8005bc6: 681b ldr r3, [r3, #0]
8005bc8: f042 020e orr.w r2, r2, #14
8005bcc: 601a str r2, [r3, #0]
8005bce: e00f b.n 8005bf0 <HAL_DMA_Start_IT+0x98>
}
else
{
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005bd0: 68fb ldr r3, [r7, #12]
8005bd2: 681b ldr r3, [r3, #0]
8005bd4: 681a ldr r2, [r3, #0]
8005bd6: 68fb ldr r3, [r7, #12]
8005bd8: 681b ldr r3, [r3, #0]
8005bda: f022 0204 bic.w r2, r2, #4
8005bde: 601a str r2, [r3, #0]
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
8005be0: 68fb ldr r3, [r7, #12]
8005be2: 681b ldr r3, [r3, #0]
8005be4: 681a ldr r2, [r3, #0]
8005be6: 68fb ldr r3, [r7, #12]
8005be8: 681b ldr r3, [r3, #0]
8005bea: f042 020a orr.w r2, r2, #10
8005bee: 601a str r2, [r3, #0]
}
/* Enable the Peripheral */
__HAL_DMA_ENABLE(hdma);
8005bf0: 68fb ldr r3, [r7, #12]
8005bf2: 681b ldr r3, [r3, #0]
8005bf4: 681a ldr r2, [r3, #0]
8005bf6: 68fb ldr r3, [r7, #12]
8005bf8: 681b ldr r3, [r3, #0]
8005bfa: f042 0201 orr.w r2, r2, #1
8005bfe: 601a str r2, [r3, #0]
8005c00: e005 b.n 8005c0e <HAL_DMA_Start_IT+0xb6>
}
else
{
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005c02: 68fb ldr r3, [r7, #12]
8005c04: 2200 movs r2, #0
8005c06: f883 2020 strb.w r2, [r3, #32]
/* Remain BUSY */
status = HAL_BUSY;
8005c0a: 2302 movs r3, #2
8005c0c: 75fb strb r3, [r7, #23]
}
return status;
8005c0e: 7dfb ldrb r3, [r7, #23]
}
8005c10: 4618 mov r0, r3
8005c12: 3718 adds r7, #24
8005c14: 46bd mov sp, r7
8005c16: bd80 pop {r7, pc}
08005c18 <HAL_DMA_IRQHandler>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
8005c18: b580 push {r7, lr}
8005c1a: b084 sub sp, #16
8005c1c: af00 add r7, sp, #0
8005c1e: 6078 str r0, [r7, #4]
uint32_t flag_it = hdma->DmaBaseAddress->ISR;
8005c20: 687b ldr r3, [r7, #4]
8005c22: 6bdb ldr r3, [r3, #60] @ 0x3c
8005c24: 681b ldr r3, [r3, #0]
8005c26: 60fb str r3, [r7, #12]
uint32_t source_it = hdma->Instance->CCR;
8005c28: 687b ldr r3, [r7, #4]
8005c2a: 681b ldr r3, [r3, #0]
8005c2c: 681b ldr r3, [r3, #0]
8005c2e: 60bb str r3, [r7, #8]
/* Half Transfer Complete Interrupt management ******************************/
if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
8005c30: 687b ldr r3, [r7, #4]
8005c32: 6c1b ldr r3, [r3, #64] @ 0x40
8005c34: 2204 movs r2, #4
8005c36: 409a lsls r2, r3
8005c38: 68fb ldr r3, [r7, #12]
8005c3a: 4013 ands r3, r2
8005c3c: 2b00 cmp r3, #0
8005c3e: d04f beq.n 8005ce0 <HAL_DMA_IRQHandler+0xc8>
8005c40: 68bb ldr r3, [r7, #8]
8005c42: f003 0304 and.w r3, r3, #4
8005c46: 2b00 cmp r3, #0
8005c48: d04a beq.n 8005ce0 <HAL_DMA_IRQHandler+0xc8>
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
8005c4a: 687b ldr r3, [r7, #4]
8005c4c: 681b ldr r3, [r3, #0]
8005c4e: 681b ldr r3, [r3, #0]
8005c50: f003 0320 and.w r3, r3, #32
8005c54: 2b00 cmp r3, #0
8005c56: d107 bne.n 8005c68 <HAL_DMA_IRQHandler+0x50>
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005c58: 687b ldr r3, [r7, #4]
8005c5a: 681b ldr r3, [r3, #0]
8005c5c: 681a ldr r2, [r3, #0]
8005c5e: 687b ldr r3, [r7, #4]
8005c60: 681b ldr r3, [r3, #0]
8005c62: f022 0204 bic.w r2, r2, #4
8005c66: 601a str r2, [r3, #0]
}
/* Clear the half transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
8005c68: 687b ldr r3, [r7, #4]
8005c6a: 681b ldr r3, [r3, #0]
8005c6c: 4a66 ldr r2, [pc, #408] @ (8005e08 <HAL_DMA_IRQHandler+0x1f0>)
8005c6e: 4293 cmp r3, r2
8005c70: d029 beq.n 8005cc6 <HAL_DMA_IRQHandler+0xae>
8005c72: 687b ldr r3, [r7, #4]
8005c74: 681b ldr r3, [r3, #0]
8005c76: 4a65 ldr r2, [pc, #404] @ (8005e0c <HAL_DMA_IRQHandler+0x1f4>)
8005c78: 4293 cmp r3, r2
8005c7a: d022 beq.n 8005cc2 <HAL_DMA_IRQHandler+0xaa>
8005c7c: 687b ldr r3, [r7, #4]
8005c7e: 681b ldr r3, [r3, #0]
8005c80: 4a63 ldr r2, [pc, #396] @ (8005e10 <HAL_DMA_IRQHandler+0x1f8>)
8005c82: 4293 cmp r3, r2
8005c84: d01a beq.n 8005cbc <HAL_DMA_IRQHandler+0xa4>
8005c86: 687b ldr r3, [r7, #4]
8005c88: 681b ldr r3, [r3, #0]
8005c8a: 4a62 ldr r2, [pc, #392] @ (8005e14 <HAL_DMA_IRQHandler+0x1fc>)
8005c8c: 4293 cmp r3, r2
8005c8e: d012 beq.n 8005cb6 <HAL_DMA_IRQHandler+0x9e>
8005c90: 687b ldr r3, [r7, #4]
8005c92: 681b ldr r3, [r3, #0]
8005c94: 4a60 ldr r2, [pc, #384] @ (8005e18 <HAL_DMA_IRQHandler+0x200>)
8005c96: 4293 cmp r3, r2
8005c98: d00a beq.n 8005cb0 <HAL_DMA_IRQHandler+0x98>
8005c9a: 687b ldr r3, [r7, #4]
8005c9c: 681b ldr r3, [r3, #0]
8005c9e: 4a5f ldr r2, [pc, #380] @ (8005e1c <HAL_DMA_IRQHandler+0x204>)
8005ca0: 4293 cmp r3, r2
8005ca2: d102 bne.n 8005caa <HAL_DMA_IRQHandler+0x92>
8005ca4: f44f 0380 mov.w r3, #4194304 @ 0x400000
8005ca8: e00e b.n 8005cc8 <HAL_DMA_IRQHandler+0xb0>
8005caa: f04f 6380 mov.w r3, #67108864 @ 0x4000000
8005cae: e00b b.n 8005cc8 <HAL_DMA_IRQHandler+0xb0>
8005cb0: f44f 2380 mov.w r3, #262144 @ 0x40000
8005cb4: e008 b.n 8005cc8 <HAL_DMA_IRQHandler+0xb0>
8005cb6: f44f 4380 mov.w r3, #16384 @ 0x4000
8005cba: e005 b.n 8005cc8 <HAL_DMA_IRQHandler+0xb0>
8005cbc: f44f 6380 mov.w r3, #1024 @ 0x400
8005cc0: e002 b.n 8005cc8 <HAL_DMA_IRQHandler+0xb0>
8005cc2: 2340 movs r3, #64 @ 0x40
8005cc4: e000 b.n 8005cc8 <HAL_DMA_IRQHandler+0xb0>
8005cc6: 2304 movs r3, #4
8005cc8: 4a55 ldr r2, [pc, #340] @ (8005e20 <HAL_DMA_IRQHandler+0x208>)
8005cca: 6053 str r3, [r2, #4]
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
8005ccc: 687b ldr r3, [r7, #4]
8005cce: 6adb ldr r3, [r3, #44] @ 0x2c
8005cd0: 2b00 cmp r3, #0
8005cd2: f000 8094 beq.w 8005dfe <HAL_DMA_IRQHandler+0x1e6>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
8005cd6: 687b ldr r3, [r7, #4]
8005cd8: 6adb ldr r3, [r3, #44] @ 0x2c
8005cda: 6878 ldr r0, [r7, #4]
8005cdc: 4798 blx r3
if(hdma->XferHalfCpltCallback != NULL)
8005cde: e08e b.n 8005dfe <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Complete Interrupt management ***********************************/
else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
8005ce0: 687b ldr r3, [r7, #4]
8005ce2: 6c1b ldr r3, [r3, #64] @ 0x40
8005ce4: 2202 movs r2, #2
8005ce6: 409a lsls r2, r3
8005ce8: 68fb ldr r3, [r7, #12]
8005cea: 4013 ands r3, r2
8005cec: 2b00 cmp r3, #0
8005cee: d056 beq.n 8005d9e <HAL_DMA_IRQHandler+0x186>
8005cf0: 68bb ldr r3, [r7, #8]
8005cf2: f003 0302 and.w r3, r3, #2
8005cf6: 2b00 cmp r3, #0
8005cf8: d051 beq.n 8005d9e <HAL_DMA_IRQHandler+0x186>
{
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
8005cfa: 687b ldr r3, [r7, #4]
8005cfc: 681b ldr r3, [r3, #0]
8005cfe: 681b ldr r3, [r3, #0]
8005d00: f003 0320 and.w r3, r3, #32
8005d04: 2b00 cmp r3, #0
8005d06: d10b bne.n 8005d20 <HAL_DMA_IRQHandler+0x108>
{
/* Disable the transfer complete and error interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
8005d08: 687b ldr r3, [r7, #4]
8005d0a: 681b ldr r3, [r3, #0]
8005d0c: 681a ldr r2, [r3, #0]
8005d0e: 687b ldr r3, [r7, #4]
8005d10: 681b ldr r3, [r3, #0]
8005d12: f022 020a bic.w r2, r2, #10
8005d16: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8005d18: 687b ldr r3, [r7, #4]
8005d1a: 2201 movs r2, #1
8005d1c: f883 2021 strb.w r2, [r3, #33] @ 0x21
}
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
8005d20: 687b ldr r3, [r7, #4]
8005d22: 681b ldr r3, [r3, #0]
8005d24: 4a38 ldr r2, [pc, #224] @ (8005e08 <HAL_DMA_IRQHandler+0x1f0>)
8005d26: 4293 cmp r3, r2
8005d28: d029 beq.n 8005d7e <HAL_DMA_IRQHandler+0x166>
8005d2a: 687b ldr r3, [r7, #4]
8005d2c: 681b ldr r3, [r3, #0]
8005d2e: 4a37 ldr r2, [pc, #220] @ (8005e0c <HAL_DMA_IRQHandler+0x1f4>)
8005d30: 4293 cmp r3, r2
8005d32: d022 beq.n 8005d7a <HAL_DMA_IRQHandler+0x162>
8005d34: 687b ldr r3, [r7, #4]
8005d36: 681b ldr r3, [r3, #0]
8005d38: 4a35 ldr r2, [pc, #212] @ (8005e10 <HAL_DMA_IRQHandler+0x1f8>)
8005d3a: 4293 cmp r3, r2
8005d3c: d01a beq.n 8005d74 <HAL_DMA_IRQHandler+0x15c>
8005d3e: 687b ldr r3, [r7, #4]
8005d40: 681b ldr r3, [r3, #0]
8005d42: 4a34 ldr r2, [pc, #208] @ (8005e14 <HAL_DMA_IRQHandler+0x1fc>)
8005d44: 4293 cmp r3, r2
8005d46: d012 beq.n 8005d6e <HAL_DMA_IRQHandler+0x156>
8005d48: 687b ldr r3, [r7, #4]
8005d4a: 681b ldr r3, [r3, #0]
8005d4c: 4a32 ldr r2, [pc, #200] @ (8005e18 <HAL_DMA_IRQHandler+0x200>)
8005d4e: 4293 cmp r3, r2
8005d50: d00a beq.n 8005d68 <HAL_DMA_IRQHandler+0x150>
8005d52: 687b ldr r3, [r7, #4]
8005d54: 681b ldr r3, [r3, #0]
8005d56: 4a31 ldr r2, [pc, #196] @ (8005e1c <HAL_DMA_IRQHandler+0x204>)
8005d58: 4293 cmp r3, r2
8005d5a: d102 bne.n 8005d62 <HAL_DMA_IRQHandler+0x14a>
8005d5c: f44f 1300 mov.w r3, #2097152 @ 0x200000
8005d60: e00e b.n 8005d80 <HAL_DMA_IRQHandler+0x168>
8005d62: f04f 7300 mov.w r3, #33554432 @ 0x2000000
8005d66: e00b b.n 8005d80 <HAL_DMA_IRQHandler+0x168>
8005d68: f44f 3300 mov.w r3, #131072 @ 0x20000
8005d6c: e008 b.n 8005d80 <HAL_DMA_IRQHandler+0x168>
8005d6e: f44f 5300 mov.w r3, #8192 @ 0x2000
8005d72: e005 b.n 8005d80 <HAL_DMA_IRQHandler+0x168>
8005d74: f44f 7300 mov.w r3, #512 @ 0x200
8005d78: e002 b.n 8005d80 <HAL_DMA_IRQHandler+0x168>
8005d7a: 2320 movs r3, #32
8005d7c: e000 b.n 8005d80 <HAL_DMA_IRQHandler+0x168>
8005d7e: 2302 movs r3, #2
8005d80: 4a27 ldr r2, [pc, #156] @ (8005e20 <HAL_DMA_IRQHandler+0x208>)
8005d82: 6053 str r3, [r2, #4]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005d84: 687b ldr r3, [r7, #4]
8005d86: 2200 movs r2, #0
8005d88: f883 2020 strb.w r2, [r3, #32]
if(hdma->XferCpltCallback != NULL)
8005d8c: 687b ldr r3, [r7, #4]
8005d8e: 6a9b ldr r3, [r3, #40] @ 0x28
8005d90: 2b00 cmp r3, #0
8005d92: d034 beq.n 8005dfe <HAL_DMA_IRQHandler+0x1e6>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8005d94: 687b ldr r3, [r7, #4]
8005d96: 6a9b ldr r3, [r3, #40] @ 0x28
8005d98: 6878 ldr r0, [r7, #4]
8005d9a: 4798 blx r3
if(hdma->XferCpltCallback != NULL)
8005d9c: e02f b.n 8005dfe <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Error Interrupt management **************************************/
else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
8005d9e: 687b ldr r3, [r7, #4]
8005da0: 6c1b ldr r3, [r3, #64] @ 0x40
8005da2: 2208 movs r2, #8
8005da4: 409a lsls r2, r3
8005da6: 68fb ldr r3, [r7, #12]
8005da8: 4013 ands r3, r2
8005daa: 2b00 cmp r3, #0
8005dac: d028 beq.n 8005e00 <HAL_DMA_IRQHandler+0x1e8>
8005dae: 68bb ldr r3, [r7, #8]
8005db0: f003 0308 and.w r3, r3, #8
8005db4: 2b00 cmp r3, #0
8005db6: d023 beq.n 8005e00 <HAL_DMA_IRQHandler+0x1e8>
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
/* Disable ALL DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005db8: 687b ldr r3, [r7, #4]
8005dba: 681b ldr r3, [r3, #0]
8005dbc: 681a ldr r2, [r3, #0]
8005dbe: 687b ldr r3, [r7, #4]
8005dc0: 681b ldr r3, [r3, #0]
8005dc2: f022 020e bic.w r2, r2, #14
8005dc6: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8005dc8: 687b ldr r3, [r7, #4]
8005dca: 6c1a ldr r2, [r3, #64] @ 0x40
8005dcc: 687b ldr r3, [r7, #4]
8005dce: 6bdb ldr r3, [r3, #60] @ 0x3c
8005dd0: 2101 movs r1, #1
8005dd2: fa01 f202 lsl.w r2, r1, r2
8005dd6: 605a str r2, [r3, #4]
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
8005dd8: 687b ldr r3, [r7, #4]
8005dda: 2201 movs r2, #1
8005ddc: 639a str r2, [r3, #56] @ 0x38
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8005dde: 687b ldr r3, [r7, #4]
8005de0: 2201 movs r2, #1
8005de2: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005de6: 687b ldr r3, [r7, #4]
8005de8: 2200 movs r2, #0
8005dea: f883 2020 strb.w r2, [r3, #32]
if (hdma->XferErrorCallback != NULL)
8005dee: 687b ldr r3, [r7, #4]
8005df0: 6b1b ldr r3, [r3, #48] @ 0x30
8005df2: 2b00 cmp r3, #0
8005df4: d004 beq.n 8005e00 <HAL_DMA_IRQHandler+0x1e8>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
8005df6: 687b ldr r3, [r7, #4]
8005df8: 6b1b ldr r3, [r3, #48] @ 0x30
8005dfa: 6878 ldr r0, [r7, #4]
8005dfc: 4798 blx r3
}
}
return;
8005dfe: bf00 nop
8005e00: bf00 nop
}
8005e02: 3710 adds r7, #16
8005e04: 46bd mov sp, r7
8005e06: bd80 pop {r7, pc}
8005e08: 40020008 .word 0x40020008
8005e0c: 4002001c .word 0x4002001c
8005e10: 40020030 .word 0x40020030
8005e14: 40020044 .word 0x40020044
8005e18: 40020058 .word 0x40020058
8005e1c: 4002006c .word 0x4002006c
8005e20: 40020000 .word 0x40020000
08005e24 <DMA_SetConfig>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8005e24: b480 push {r7}
8005e26: b085 sub sp, #20
8005e28: af00 add r7, sp, #0
8005e2a: 60f8 str r0, [r7, #12]
8005e2c: 60b9 str r1, [r7, #8]
8005e2e: 607a str r2, [r7, #4]
8005e30: 603b str r3, [r7, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8005e32: 68fb ldr r3, [r7, #12]
8005e34: 6c1a ldr r2, [r3, #64] @ 0x40
8005e36: 68fb ldr r3, [r7, #12]
8005e38: 6bdb ldr r3, [r3, #60] @ 0x3c
8005e3a: 2101 movs r1, #1
8005e3c: fa01 f202 lsl.w r2, r1, r2
8005e40: 605a str r2, [r3, #4]
/* Configure DMA Channel data length */
hdma->Instance->CNDTR = DataLength;
8005e42: 68fb ldr r3, [r7, #12]
8005e44: 681b ldr r3, [r3, #0]
8005e46: 683a ldr r2, [r7, #0]
8005e48: 605a str r2, [r3, #4]
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
8005e4a: 68fb ldr r3, [r7, #12]
8005e4c: 685b ldr r3, [r3, #4]
8005e4e: 2b10 cmp r3, #16
8005e50: d108 bne.n 8005e64 <DMA_SetConfig+0x40>
{
/* Configure DMA Channel destination address */
hdma->Instance->CPAR = DstAddress;
8005e52: 68fb ldr r3, [r7, #12]
8005e54: 681b ldr r3, [r3, #0]
8005e56: 687a ldr r2, [r7, #4]
8005e58: 609a str r2, [r3, #8]
/* Configure DMA Channel source address */
hdma->Instance->CMAR = SrcAddress;
8005e5a: 68fb ldr r3, [r7, #12]
8005e5c: 681b ldr r3, [r3, #0]
8005e5e: 68ba ldr r2, [r7, #8]
8005e60: 60da str r2, [r3, #12]
hdma->Instance->CPAR = SrcAddress;
/* Configure DMA Channel destination address */
hdma->Instance->CMAR = DstAddress;
}
}
8005e62: e007 b.n 8005e74 <DMA_SetConfig+0x50>
hdma->Instance->CPAR = SrcAddress;
8005e64: 68fb ldr r3, [r7, #12]
8005e66: 681b ldr r3, [r3, #0]
8005e68: 68ba ldr r2, [r7, #8]
8005e6a: 609a str r2, [r3, #8]
hdma->Instance->CMAR = DstAddress;
8005e6c: 68fb ldr r3, [r7, #12]
8005e6e: 681b ldr r3, [r3, #0]
8005e70: 687a ldr r2, [r7, #4]
8005e72: 60da str r2, [r3, #12]
}
8005e74: bf00 nop
8005e76: 3714 adds r7, #20
8005e78: 46bd mov sp, r7
8005e7a: bc80 pop {r7}
8005e7c: 4770 bx lr
...
08005e80 <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
8005e80: b5f0 push {r4, r5, r6, r7, lr}
8005e82: b087 sub sp, #28
8005e84: af00 add r7, sp, #0
8005e86: 60f8 str r0, [r7, #12]
8005e88: 60b9 str r1, [r7, #8]
8005e8a: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
8005e8e: 2301 movs r3, #1
8005e90: 75fb strb r3, [r7, #23]
uint8_t index = 0;
8005e92: 2300 movs r3, #0
8005e94: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
8005e96: 2300 movs r3, #0
8005e98: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
8005e9a: 4b2f ldr r3, [pc, #188] @ (8005f58 <HAL_FLASH_Program+0xd8>)
8005e9c: 7e1b ldrb r3, [r3, #24]
8005e9e: 2b01 cmp r3, #1
8005ea0: d101 bne.n 8005ea6 <HAL_FLASH_Program+0x26>
8005ea2: 2302 movs r3, #2
8005ea4: e054 b.n 8005f50 <HAL_FLASH_Program+0xd0>
8005ea6: 4b2c ldr r3, [pc, #176] @ (8005f58 <HAL_FLASH_Program+0xd8>)
8005ea8: 2201 movs r2, #1
8005eaa: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8005eac: f24c 3050 movw r0, #50000 @ 0xc350
8005eb0: f000 f8a8 bl 8006004 <FLASH_WaitForLastOperation>
8005eb4: 4603 mov r3, r0
8005eb6: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
8005eb8: 7dfb ldrb r3, [r7, #23]
8005eba: 2b00 cmp r3, #0
8005ebc: d144 bne.n 8005f48 <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
8005ebe: 68fb ldr r3, [r7, #12]
8005ec0: 2b01 cmp r3, #1
8005ec2: d102 bne.n 8005eca <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8005ec4: 2301 movs r3, #1
8005ec6: 757b strb r3, [r7, #21]
8005ec8: e007 b.n 8005eda <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
8005eca: 68fb ldr r3, [r7, #12]
8005ecc: 2b02 cmp r3, #2
8005ece: d102 bne.n 8005ed6 <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
8005ed0: 2302 movs r3, #2
8005ed2: 757b strb r3, [r7, #21]
8005ed4: e001 b.n 8005eda <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
8005ed6: 2304 movs r3, #4
8005ed8: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
8005eda: 2300 movs r3, #0
8005edc: 75bb strb r3, [r7, #22]
8005ede: e02d b.n 8005f3c <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
8005ee0: 7dbb ldrb r3, [r7, #22]
8005ee2: 005a lsls r2, r3, #1
8005ee4: 68bb ldr r3, [r7, #8]
8005ee6: eb02 0c03 add.w ip, r2, r3
8005eea: 7dbb ldrb r3, [r7, #22]
8005eec: 0119 lsls r1, r3, #4
8005eee: e9d7 2300 ldrd r2, r3, [r7]
8005ef2: f1c1 0620 rsb r6, r1, #32
8005ef6: f1a1 0020 sub.w r0, r1, #32
8005efa: fa22 f401 lsr.w r4, r2, r1
8005efe: fa03 f606 lsl.w r6, r3, r6
8005f02: 4334 orrs r4, r6
8005f04: fa23 f000 lsr.w r0, r3, r0
8005f08: 4304 orrs r4, r0
8005f0a: fa23 f501 lsr.w r5, r3, r1
8005f0e: b2a3 uxth r3, r4
8005f10: 4619 mov r1, r3
8005f12: 4660 mov r0, ip
8005f14: f000 f85a bl 8005fcc <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8005f18: f24c 3050 movw r0, #50000 @ 0xc350
8005f1c: f000 f872 bl 8006004 <FLASH_WaitForLastOperation>
8005f20: 4603 mov r3, r0
8005f22: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
8005f24: 4b0d ldr r3, [pc, #52] @ (8005f5c <HAL_FLASH_Program+0xdc>)
8005f26: 691b ldr r3, [r3, #16]
8005f28: 4a0c ldr r2, [pc, #48] @ (8005f5c <HAL_FLASH_Program+0xdc>)
8005f2a: f023 0301 bic.w r3, r3, #1
8005f2e: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
8005f30: 7dfb ldrb r3, [r7, #23]
8005f32: 2b00 cmp r3, #0
8005f34: d107 bne.n 8005f46 <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
8005f36: 7dbb ldrb r3, [r7, #22]
8005f38: 3301 adds r3, #1
8005f3a: 75bb strb r3, [r7, #22]
8005f3c: 7dba ldrb r2, [r7, #22]
8005f3e: 7d7b ldrb r3, [r7, #21]
8005f40: 429a cmp r2, r3
8005f42: d3cd bcc.n 8005ee0 <HAL_FLASH_Program+0x60>
8005f44: e000 b.n 8005f48 <HAL_FLASH_Program+0xc8>
{
break;
8005f46: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8005f48: 4b03 ldr r3, [pc, #12] @ (8005f58 <HAL_FLASH_Program+0xd8>)
8005f4a: 2200 movs r2, #0
8005f4c: 761a strb r2, [r3, #24]
return status;
8005f4e: 7dfb ldrb r3, [r7, #23]
}
8005f50: 4618 mov r0, r3
8005f52: 371c adds r7, #28
8005f54: 46bd mov sp, r7
8005f56: bdf0 pop {r4, r5, r6, r7, pc}
8005f58: 20000478 .word 0x20000478
8005f5c: 40022000 .word 0x40022000
08005f60 <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
8005f60: b480 push {r7}
8005f62: b083 sub sp, #12
8005f64: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
8005f66: 2300 movs r3, #0
8005f68: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8005f6a: 4b0d ldr r3, [pc, #52] @ (8005fa0 <HAL_FLASH_Unlock+0x40>)
8005f6c: 691b ldr r3, [r3, #16]
8005f6e: f003 0380 and.w r3, r3, #128 @ 0x80
8005f72: 2b00 cmp r3, #0
8005f74: d00d beq.n 8005f92 <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
8005f76: 4b0a ldr r3, [pc, #40] @ (8005fa0 <HAL_FLASH_Unlock+0x40>)
8005f78: 4a0a ldr r2, [pc, #40] @ (8005fa4 <HAL_FLASH_Unlock+0x44>)
8005f7a: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
8005f7c: 4b08 ldr r3, [pc, #32] @ (8005fa0 <HAL_FLASH_Unlock+0x40>)
8005f7e: 4a0a ldr r2, [pc, #40] @ (8005fa8 <HAL_FLASH_Unlock+0x48>)
8005f80: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8005f82: 4b07 ldr r3, [pc, #28] @ (8005fa0 <HAL_FLASH_Unlock+0x40>)
8005f84: 691b ldr r3, [r3, #16]
8005f86: f003 0380 and.w r3, r3, #128 @ 0x80
8005f8a: 2b00 cmp r3, #0
8005f8c: d001 beq.n 8005f92 <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
8005f8e: 2301 movs r3, #1
8005f90: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
8005f92: 79fb ldrb r3, [r7, #7]
}
8005f94: 4618 mov r0, r3
8005f96: 370c adds r7, #12
8005f98: 46bd mov sp, r7
8005f9a: bc80 pop {r7}
8005f9c: 4770 bx lr
8005f9e: bf00 nop
8005fa0: 40022000 .word 0x40022000
8005fa4: 45670123 .word 0x45670123
8005fa8: cdef89ab .word 0xcdef89ab
08005fac <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
8005fac: b480 push {r7}
8005fae: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
8005fb0: 4b05 ldr r3, [pc, #20] @ (8005fc8 <HAL_FLASH_Lock+0x1c>)
8005fb2: 691b ldr r3, [r3, #16]
8005fb4: 4a04 ldr r2, [pc, #16] @ (8005fc8 <HAL_FLASH_Lock+0x1c>)
8005fb6: f043 0380 orr.w r3, r3, #128 @ 0x80
8005fba: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
8005fbc: 2300 movs r3, #0
}
8005fbe: 4618 mov r0, r3
8005fc0: 46bd mov sp, r7
8005fc2: bc80 pop {r7}
8005fc4: 4770 bx lr
8005fc6: bf00 nop
8005fc8: 40022000 .word 0x40022000
08005fcc <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
8005fcc: b480 push {r7}
8005fce: b083 sub sp, #12
8005fd0: af00 add r7, sp, #0
8005fd2: 6078 str r0, [r7, #4]
8005fd4: 460b mov r3, r1
8005fd6: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8005fd8: 4b08 ldr r3, [pc, #32] @ (8005ffc <FLASH_Program_HalfWord+0x30>)
8005fda: 2200 movs r2, #0
8005fdc: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
8005fde: 4b08 ldr r3, [pc, #32] @ (8006000 <FLASH_Program_HalfWord+0x34>)
8005fe0: 691b ldr r3, [r3, #16]
8005fe2: 4a07 ldr r2, [pc, #28] @ (8006000 <FLASH_Program_HalfWord+0x34>)
8005fe4: f043 0301 orr.w r3, r3, #1
8005fe8: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
8005fea: 687b ldr r3, [r7, #4]
8005fec: 887a ldrh r2, [r7, #2]
8005fee: 801a strh r2, [r3, #0]
}
8005ff0: bf00 nop
8005ff2: 370c adds r7, #12
8005ff4: 46bd mov sp, r7
8005ff6: bc80 pop {r7}
8005ff8: 4770 bx lr
8005ffa: bf00 nop
8005ffc: 20000478 .word 0x20000478
8006000: 40022000 .word 0x40022000
08006004 <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
8006004: b580 push {r7, lr}
8006006: b084 sub sp, #16
8006008: af00 add r7, sp, #0
800600a: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
800600c: f7ff f860 bl 80050d0 <HAL_GetTick>
8006010: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
8006012: e010 b.n 8006036 <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
8006014: 687b ldr r3, [r7, #4]
8006016: f1b3 3fff cmp.w r3, #4294967295
800601a: d00c beq.n 8006036 <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
800601c: 687b ldr r3, [r7, #4]
800601e: 2b00 cmp r3, #0
8006020: d007 beq.n 8006032 <FLASH_WaitForLastOperation+0x2e>
8006022: f7ff f855 bl 80050d0 <HAL_GetTick>
8006026: 4602 mov r2, r0
8006028: 68fb ldr r3, [r7, #12]
800602a: 1ad3 subs r3, r2, r3
800602c: 687a ldr r2, [r7, #4]
800602e: 429a cmp r2, r3
8006030: d201 bcs.n 8006036 <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
8006032: 2303 movs r3, #3
8006034: e025 b.n 8006082 <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
8006036: 4b15 ldr r3, [pc, #84] @ (800608c <FLASH_WaitForLastOperation+0x88>)
8006038: 68db ldr r3, [r3, #12]
800603a: f003 0301 and.w r3, r3, #1
800603e: 2b00 cmp r3, #0
8006040: d1e8 bne.n 8006014 <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
8006042: 4b12 ldr r3, [pc, #72] @ (800608c <FLASH_WaitForLastOperation+0x88>)
8006044: 68db ldr r3, [r3, #12]
8006046: f003 0320 and.w r3, r3, #32
800604a: 2b00 cmp r3, #0
800604c: d002 beq.n 8006054 <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
800604e: 4b0f ldr r3, [pc, #60] @ (800608c <FLASH_WaitForLastOperation+0x88>)
8006050: 2220 movs r2, #32
8006052: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8006054: 4b0d ldr r3, [pc, #52] @ (800608c <FLASH_WaitForLastOperation+0x88>)
8006056: 68db ldr r3, [r3, #12]
8006058: f003 0310 and.w r3, r3, #16
800605c: 2b00 cmp r3, #0
800605e: d10b bne.n 8006078 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8006060: 4b0a ldr r3, [pc, #40] @ (800608c <FLASH_WaitForLastOperation+0x88>)
8006062: 69db ldr r3, [r3, #28]
8006064: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8006068: 2b00 cmp r3, #0
800606a: d105 bne.n 8006078 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
800606c: 4b07 ldr r3, [pc, #28] @ (800608c <FLASH_WaitForLastOperation+0x88>)
800606e: 68db ldr r3, [r3, #12]
8006070: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8006074: 2b00 cmp r3, #0
8006076: d003 beq.n 8006080 <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
8006078: f000 f80a bl 8006090 <FLASH_SetErrorCode>
return HAL_ERROR;
800607c: 2301 movs r3, #1
800607e: e000 b.n 8006082 <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
8006080: 2300 movs r3, #0
}
8006082: 4618 mov r0, r3
8006084: 3710 adds r7, #16
8006086: 46bd mov sp, r7
8006088: bd80 pop {r7, pc}
800608a: bf00 nop
800608c: 40022000 .word 0x40022000
08006090 <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
8006090: b480 push {r7}
8006092: b083 sub sp, #12
8006094: af00 add r7, sp, #0
uint32_t flags = 0U;
8006096: 2300 movs r3, #0
8006098: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
800609a: 4b23 ldr r3, [pc, #140] @ (8006128 <FLASH_SetErrorCode+0x98>)
800609c: 68db ldr r3, [r3, #12]
800609e: f003 0310 and.w r3, r3, #16
80060a2: 2b00 cmp r3, #0
80060a4: d009 beq.n 80060ba <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
80060a6: 4b21 ldr r3, [pc, #132] @ (800612c <FLASH_SetErrorCode+0x9c>)
80060a8: 69db ldr r3, [r3, #28]
80060aa: f043 0302 orr.w r3, r3, #2
80060ae: 4a1f ldr r2, [pc, #124] @ (800612c <FLASH_SetErrorCode+0x9c>)
80060b0: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
80060b2: 687b ldr r3, [r7, #4]
80060b4: f043 0310 orr.w r3, r3, #16
80060b8: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
80060ba: 4b1b ldr r3, [pc, #108] @ (8006128 <FLASH_SetErrorCode+0x98>)
80060bc: 68db ldr r3, [r3, #12]
80060be: f003 0304 and.w r3, r3, #4
80060c2: 2b00 cmp r3, #0
80060c4: d009 beq.n 80060da <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
80060c6: 4b19 ldr r3, [pc, #100] @ (800612c <FLASH_SetErrorCode+0x9c>)
80060c8: 69db ldr r3, [r3, #28]
80060ca: f043 0301 orr.w r3, r3, #1
80060ce: 4a17 ldr r2, [pc, #92] @ (800612c <FLASH_SetErrorCode+0x9c>)
80060d0: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
80060d2: 687b ldr r3, [r7, #4]
80060d4: f043 0304 orr.w r3, r3, #4
80060d8: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
80060da: 4b13 ldr r3, [pc, #76] @ (8006128 <FLASH_SetErrorCode+0x98>)
80060dc: 69db ldr r3, [r3, #28]
80060de: f003 0301 and.w r3, r3, #1
80060e2: 2b00 cmp r3, #0
80060e4: d00b beq.n 80060fe <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
80060e6: 4b11 ldr r3, [pc, #68] @ (800612c <FLASH_SetErrorCode+0x9c>)
80060e8: 69db ldr r3, [r3, #28]
80060ea: f043 0304 orr.w r3, r3, #4
80060ee: 4a0f ldr r2, [pc, #60] @ (800612c <FLASH_SetErrorCode+0x9c>)
80060f0: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
80060f2: 4b0d ldr r3, [pc, #52] @ (8006128 <FLASH_SetErrorCode+0x98>)
80060f4: 69db ldr r3, [r3, #28]
80060f6: 4a0c ldr r2, [pc, #48] @ (8006128 <FLASH_SetErrorCode+0x98>)
80060f8: f023 0301 bic.w r3, r3, #1
80060fc: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
80060fe: 687b ldr r3, [r7, #4]
8006100: f240 1201 movw r2, #257 @ 0x101
8006104: 4293 cmp r3, r2
8006106: d106 bne.n 8006116 <FLASH_SetErrorCode+0x86>
8006108: 4b07 ldr r3, [pc, #28] @ (8006128 <FLASH_SetErrorCode+0x98>)
800610a: 69db ldr r3, [r3, #28]
800610c: 4a06 ldr r2, [pc, #24] @ (8006128 <FLASH_SetErrorCode+0x98>)
800610e: f023 0301 bic.w r3, r3, #1
8006112: 61d3 str r3, [r2, #28]
}
8006114: e002 b.n 800611c <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
8006116: 4a04 ldr r2, [pc, #16] @ (8006128 <FLASH_SetErrorCode+0x98>)
8006118: 687b ldr r3, [r7, #4]
800611a: 60d3 str r3, [r2, #12]
}
800611c: bf00 nop
800611e: 370c adds r7, #12
8006120: 46bd mov sp, r7
8006122: bc80 pop {r7}
8006124: 4770 bx lr
8006126: bf00 nop
8006128: 40022000 .word 0x40022000
800612c: 20000478 .word 0x20000478
08006130 <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
8006130: b580 push {r7, lr}
8006132: b084 sub sp, #16
8006134: af00 add r7, sp, #0
8006136: 6078 str r0, [r7, #4]
8006138: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
800613a: 2301 movs r3, #1
800613c: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
800613e: 2300 movs r3, #0
8006140: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
8006142: 4b2f ldr r3, [pc, #188] @ (8006200 <HAL_FLASHEx_Erase+0xd0>)
8006144: 7e1b ldrb r3, [r3, #24]
8006146: 2b01 cmp r3, #1
8006148: d101 bne.n 800614e <HAL_FLASHEx_Erase+0x1e>
800614a: 2302 movs r3, #2
800614c: e053 b.n 80061f6 <HAL_FLASHEx_Erase+0xc6>
800614e: 4b2c ldr r3, [pc, #176] @ (8006200 <HAL_FLASHEx_Erase+0xd0>)
8006150: 2201 movs r2, #1
8006152: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
8006154: 687b ldr r3, [r7, #4]
8006156: 681b ldr r3, [r3, #0]
8006158: 2b02 cmp r3, #2
800615a: d116 bne.n 800618a <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
800615c: f24c 3050 movw r0, #50000 @ 0xc350
8006160: f7ff ff50 bl 8006004 <FLASH_WaitForLastOperation>
8006164: 4603 mov r3, r0
8006166: 2b00 cmp r3, #0
8006168: d141 bne.n 80061ee <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
800616a: 2001 movs r0, #1
800616c: f000 f84c bl 8006208 <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8006170: f24c 3050 movw r0, #50000 @ 0xc350
8006174: f7ff ff46 bl 8006004 <FLASH_WaitForLastOperation>
8006178: 4603 mov r3, r0
800617a: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
800617c: 4b21 ldr r3, [pc, #132] @ (8006204 <HAL_FLASHEx_Erase+0xd4>)
800617e: 691b ldr r3, [r3, #16]
8006180: 4a20 ldr r2, [pc, #128] @ (8006204 <HAL_FLASHEx_Erase+0xd4>)
8006182: f023 0304 bic.w r3, r3, #4
8006186: 6113 str r3, [r2, #16]
8006188: e031 b.n 80061ee <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
800618a: f24c 3050 movw r0, #50000 @ 0xc350
800618e: f7ff ff39 bl 8006004 <FLASH_WaitForLastOperation>
8006192: 4603 mov r3, r0
8006194: 2b00 cmp r3, #0
8006196: d12a bne.n 80061ee <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
8006198: 683b ldr r3, [r7, #0]
800619a: f04f 32ff mov.w r2, #4294967295
800619e: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
80061a0: 687b ldr r3, [r7, #4]
80061a2: 689b ldr r3, [r3, #8]
80061a4: 60bb str r3, [r7, #8]
80061a6: e019 b.n 80061dc <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
80061a8: 68b8 ldr r0, [r7, #8]
80061aa: f000 f849 bl 8006240 <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
80061ae: f24c 3050 movw r0, #50000 @ 0xc350
80061b2: f7ff ff27 bl 8006004 <FLASH_WaitForLastOperation>
80061b6: 4603 mov r3, r0
80061b8: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
80061ba: 4b12 ldr r3, [pc, #72] @ (8006204 <HAL_FLASHEx_Erase+0xd4>)
80061bc: 691b ldr r3, [r3, #16]
80061be: 4a11 ldr r2, [pc, #68] @ (8006204 <HAL_FLASHEx_Erase+0xd4>)
80061c0: f023 0302 bic.w r3, r3, #2
80061c4: 6113 str r3, [r2, #16]
if (status != HAL_OK)
80061c6: 7bfb ldrb r3, [r7, #15]
80061c8: 2b00 cmp r3, #0
80061ca: d003 beq.n 80061d4 <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
80061cc: 683b ldr r3, [r7, #0]
80061ce: 68ba ldr r2, [r7, #8]
80061d0: 601a str r2, [r3, #0]
break;
80061d2: e00c b.n 80061ee <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
80061d4: 68bb ldr r3, [r7, #8]
80061d6: f503 6380 add.w r3, r3, #1024 @ 0x400
80061da: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
80061dc: 687b ldr r3, [r7, #4]
80061de: 68db ldr r3, [r3, #12]
80061e0: 029a lsls r2, r3, #10
80061e2: 687b ldr r3, [r7, #4]
80061e4: 689b ldr r3, [r3, #8]
80061e6: 4413 add r3, r2
80061e8: 68ba ldr r2, [r7, #8]
80061ea: 429a cmp r2, r3
80061ec: d3dc bcc.n 80061a8 <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
80061ee: 4b04 ldr r3, [pc, #16] @ (8006200 <HAL_FLASHEx_Erase+0xd0>)
80061f0: 2200 movs r2, #0
80061f2: 761a strb r2, [r3, #24]
return status;
80061f4: 7bfb ldrb r3, [r7, #15]
}
80061f6: 4618 mov r0, r3
80061f8: 3710 adds r7, #16
80061fa: 46bd mov sp, r7
80061fc: bd80 pop {r7, pc}
80061fe: bf00 nop
8006200: 20000478 .word 0x20000478
8006204: 40022000 .word 0x40022000
08006208 <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
8006208: b480 push {r7}
800620a: b083 sub sp, #12
800620c: af00 add r7, sp, #0
800620e: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8006210: 4b09 ldr r3, [pc, #36] @ (8006238 <FLASH_MassErase+0x30>)
8006212: 2200 movs r2, #0
8006214: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
8006216: 4b09 ldr r3, [pc, #36] @ (800623c <FLASH_MassErase+0x34>)
8006218: 691b ldr r3, [r3, #16]
800621a: 4a08 ldr r2, [pc, #32] @ (800623c <FLASH_MassErase+0x34>)
800621c: f043 0304 orr.w r3, r3, #4
8006220: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8006222: 4b06 ldr r3, [pc, #24] @ (800623c <FLASH_MassErase+0x34>)
8006224: 691b ldr r3, [r3, #16]
8006226: 4a05 ldr r2, [pc, #20] @ (800623c <FLASH_MassErase+0x34>)
8006228: f043 0340 orr.w r3, r3, #64 @ 0x40
800622c: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
800622e: bf00 nop
8006230: 370c adds r7, #12
8006232: 46bd mov sp, r7
8006234: bc80 pop {r7}
8006236: 4770 bx lr
8006238: 20000478 .word 0x20000478
800623c: 40022000 .word 0x40022000
08006240 <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
8006240: b480 push {r7}
8006242: b083 sub sp, #12
8006244: af00 add r7, sp, #0
8006246: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8006248: 4b0b ldr r3, [pc, #44] @ (8006278 <FLASH_PageErase+0x38>)
800624a: 2200 movs r2, #0
800624c: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
800624e: 4b0b ldr r3, [pc, #44] @ (800627c <FLASH_PageErase+0x3c>)
8006250: 691b ldr r3, [r3, #16]
8006252: 4a0a ldr r2, [pc, #40] @ (800627c <FLASH_PageErase+0x3c>)
8006254: f043 0302 orr.w r3, r3, #2
8006258: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
800625a: 4a08 ldr r2, [pc, #32] @ (800627c <FLASH_PageErase+0x3c>)
800625c: 687b ldr r3, [r7, #4]
800625e: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8006260: 4b06 ldr r3, [pc, #24] @ (800627c <FLASH_PageErase+0x3c>)
8006262: 691b ldr r3, [r3, #16]
8006264: 4a05 ldr r2, [pc, #20] @ (800627c <FLASH_PageErase+0x3c>)
8006266: f043 0340 orr.w r3, r3, #64 @ 0x40
800626a: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
800626c: bf00 nop
800626e: 370c adds r7, #12
8006270: 46bd mov sp, r7
8006272: bc80 pop {r7}
8006274: 4770 bx lr
8006276: bf00 nop
8006278: 20000478 .word 0x20000478
800627c: 40022000 .word 0x40022000
08006280 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8006280: b480 push {r7}
8006282: b08b sub sp, #44 @ 0x2c
8006284: af00 add r7, sp, #0
8006286: 6078 str r0, [r7, #4]
8006288: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
800628a: 2300 movs r3, #0
800628c: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
800628e: 2300 movs r3, #0
8006290: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8006292: e169 b.n 8006568 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8006294: 2201 movs r2, #1
8006296: 6a7b ldr r3, [r7, #36] @ 0x24
8006298: fa02 f303 lsl.w r3, r2, r3
800629c: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
800629e: 683b ldr r3, [r7, #0]
80062a0: 681b ldr r3, [r3, #0]
80062a2: 69fa ldr r2, [r7, #28]
80062a4: 4013 ands r3, r2
80062a6: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
80062a8: 69ba ldr r2, [r7, #24]
80062aa: 69fb ldr r3, [r7, #28]
80062ac: 429a cmp r2, r3
80062ae: f040 8158 bne.w 8006562 <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
80062b2: 683b ldr r3, [r7, #0]
80062b4: 685b ldr r3, [r3, #4]
80062b6: 4a9a ldr r2, [pc, #616] @ (8006520 <HAL_GPIO_Init+0x2a0>)
80062b8: 4293 cmp r3, r2
80062ba: d05e beq.n 800637a <HAL_GPIO_Init+0xfa>
80062bc: 4a98 ldr r2, [pc, #608] @ (8006520 <HAL_GPIO_Init+0x2a0>)
80062be: 4293 cmp r3, r2
80062c0: d875 bhi.n 80063ae <HAL_GPIO_Init+0x12e>
80062c2: 4a98 ldr r2, [pc, #608] @ (8006524 <HAL_GPIO_Init+0x2a4>)
80062c4: 4293 cmp r3, r2
80062c6: d058 beq.n 800637a <HAL_GPIO_Init+0xfa>
80062c8: 4a96 ldr r2, [pc, #600] @ (8006524 <HAL_GPIO_Init+0x2a4>)
80062ca: 4293 cmp r3, r2
80062cc: d86f bhi.n 80063ae <HAL_GPIO_Init+0x12e>
80062ce: 4a96 ldr r2, [pc, #600] @ (8006528 <HAL_GPIO_Init+0x2a8>)
80062d0: 4293 cmp r3, r2
80062d2: d052 beq.n 800637a <HAL_GPIO_Init+0xfa>
80062d4: 4a94 ldr r2, [pc, #592] @ (8006528 <HAL_GPIO_Init+0x2a8>)
80062d6: 4293 cmp r3, r2
80062d8: d869 bhi.n 80063ae <HAL_GPIO_Init+0x12e>
80062da: 4a94 ldr r2, [pc, #592] @ (800652c <HAL_GPIO_Init+0x2ac>)
80062dc: 4293 cmp r3, r2
80062de: d04c beq.n 800637a <HAL_GPIO_Init+0xfa>
80062e0: 4a92 ldr r2, [pc, #584] @ (800652c <HAL_GPIO_Init+0x2ac>)
80062e2: 4293 cmp r3, r2
80062e4: d863 bhi.n 80063ae <HAL_GPIO_Init+0x12e>
80062e6: 4a92 ldr r2, [pc, #584] @ (8006530 <HAL_GPIO_Init+0x2b0>)
80062e8: 4293 cmp r3, r2
80062ea: d046 beq.n 800637a <HAL_GPIO_Init+0xfa>
80062ec: 4a90 ldr r2, [pc, #576] @ (8006530 <HAL_GPIO_Init+0x2b0>)
80062ee: 4293 cmp r3, r2
80062f0: d85d bhi.n 80063ae <HAL_GPIO_Init+0x12e>
80062f2: 2b12 cmp r3, #18
80062f4: d82a bhi.n 800634c <HAL_GPIO_Init+0xcc>
80062f6: 2b12 cmp r3, #18
80062f8: d859 bhi.n 80063ae <HAL_GPIO_Init+0x12e>
80062fa: a201 add r2, pc, #4 @ (adr r2, 8006300 <HAL_GPIO_Init+0x80>)
80062fc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8006300: 0800637b .word 0x0800637b
8006304: 08006355 .word 0x08006355
8006308: 08006367 .word 0x08006367
800630c: 080063a9 .word 0x080063a9
8006310: 080063af .word 0x080063af
8006314: 080063af .word 0x080063af
8006318: 080063af .word 0x080063af
800631c: 080063af .word 0x080063af
8006320: 080063af .word 0x080063af
8006324: 080063af .word 0x080063af
8006328: 080063af .word 0x080063af
800632c: 080063af .word 0x080063af
8006330: 080063af .word 0x080063af
8006334: 080063af .word 0x080063af
8006338: 080063af .word 0x080063af
800633c: 080063af .word 0x080063af
8006340: 080063af .word 0x080063af
8006344: 0800635d .word 0x0800635d
8006348: 08006371 .word 0x08006371
800634c: 4a79 ldr r2, [pc, #484] @ (8006534 <HAL_GPIO_Init+0x2b4>)
800634e: 4293 cmp r3, r2
8006350: d013 beq.n 800637a <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8006352: e02c b.n 80063ae <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8006354: 683b ldr r3, [r7, #0]
8006356: 68db ldr r3, [r3, #12]
8006358: 623b str r3, [r7, #32]
break;
800635a: e029 b.n 80063b0 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
800635c: 683b ldr r3, [r7, #0]
800635e: 68db ldr r3, [r3, #12]
8006360: 3304 adds r3, #4
8006362: 623b str r3, [r7, #32]
break;
8006364: e024 b.n 80063b0 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
8006366: 683b ldr r3, [r7, #0]
8006368: 68db ldr r3, [r3, #12]
800636a: 3308 adds r3, #8
800636c: 623b str r3, [r7, #32]
break;
800636e: e01f b.n 80063b0 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8006370: 683b ldr r3, [r7, #0]
8006372: 68db ldr r3, [r3, #12]
8006374: 330c adds r3, #12
8006376: 623b str r3, [r7, #32]
break;
8006378: e01a b.n 80063b0 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
800637a: 683b ldr r3, [r7, #0]
800637c: 689b ldr r3, [r3, #8]
800637e: 2b00 cmp r3, #0
8006380: d102 bne.n 8006388 <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8006382: 2304 movs r3, #4
8006384: 623b str r3, [r7, #32]
break;
8006386: e013 b.n 80063b0 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8006388: 683b ldr r3, [r7, #0]
800638a: 689b ldr r3, [r3, #8]
800638c: 2b01 cmp r3, #1
800638e: d105 bne.n 800639c <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8006390: 2308 movs r3, #8
8006392: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8006394: 687b ldr r3, [r7, #4]
8006396: 69fa ldr r2, [r7, #28]
8006398: 611a str r2, [r3, #16]
break;
800639a: e009 b.n 80063b0 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
800639c: 2308 movs r3, #8
800639e: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
80063a0: 687b ldr r3, [r7, #4]
80063a2: 69fa ldr r2, [r7, #28]
80063a4: 615a str r2, [r3, #20]
break;
80063a6: e003 b.n 80063b0 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
80063a8: 2300 movs r3, #0
80063aa: 623b str r3, [r7, #32]
break;
80063ac: e000 b.n 80063b0 <HAL_GPIO_Init+0x130>
break;
80063ae: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
80063b0: 69bb ldr r3, [r7, #24]
80063b2: 2bff cmp r3, #255 @ 0xff
80063b4: d801 bhi.n 80063ba <HAL_GPIO_Init+0x13a>
80063b6: 687b ldr r3, [r7, #4]
80063b8: e001 b.n 80063be <HAL_GPIO_Init+0x13e>
80063ba: 687b ldr r3, [r7, #4]
80063bc: 3304 adds r3, #4
80063be: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
80063c0: 69bb ldr r3, [r7, #24]
80063c2: 2bff cmp r3, #255 @ 0xff
80063c4: d802 bhi.n 80063cc <HAL_GPIO_Init+0x14c>
80063c6: 6a7b ldr r3, [r7, #36] @ 0x24
80063c8: 009b lsls r3, r3, #2
80063ca: e002 b.n 80063d2 <HAL_GPIO_Init+0x152>
80063cc: 6a7b ldr r3, [r7, #36] @ 0x24
80063ce: 3b08 subs r3, #8
80063d0: 009b lsls r3, r3, #2
80063d2: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
80063d4: 697b ldr r3, [r7, #20]
80063d6: 681a ldr r2, [r3, #0]
80063d8: 210f movs r1, #15
80063da: 693b ldr r3, [r7, #16]
80063dc: fa01 f303 lsl.w r3, r1, r3
80063e0: 43db mvns r3, r3
80063e2: 401a ands r2, r3
80063e4: 6a39 ldr r1, [r7, #32]
80063e6: 693b ldr r3, [r7, #16]
80063e8: fa01 f303 lsl.w r3, r1, r3
80063ec: 431a orrs r2, r3
80063ee: 697b ldr r3, [r7, #20]
80063f0: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
80063f2: 683b ldr r3, [r7, #0]
80063f4: 685b ldr r3, [r3, #4]
80063f6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80063fa: 2b00 cmp r3, #0
80063fc: f000 80b1 beq.w 8006562 <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8006400: 4b4d ldr r3, [pc, #308] @ (8006538 <HAL_GPIO_Init+0x2b8>)
8006402: 699b ldr r3, [r3, #24]
8006404: 4a4c ldr r2, [pc, #304] @ (8006538 <HAL_GPIO_Init+0x2b8>)
8006406: f043 0301 orr.w r3, r3, #1
800640a: 6193 str r3, [r2, #24]
800640c: 4b4a ldr r3, [pc, #296] @ (8006538 <HAL_GPIO_Init+0x2b8>)
800640e: 699b ldr r3, [r3, #24]
8006410: f003 0301 and.w r3, r3, #1
8006414: 60bb str r3, [r7, #8]
8006416: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8006418: 4a48 ldr r2, [pc, #288] @ (800653c <HAL_GPIO_Init+0x2bc>)
800641a: 6a7b ldr r3, [r7, #36] @ 0x24
800641c: 089b lsrs r3, r3, #2
800641e: 3302 adds r3, #2
8006420: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8006424: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
8006426: 6a7b ldr r3, [r7, #36] @ 0x24
8006428: f003 0303 and.w r3, r3, #3
800642c: 009b lsls r3, r3, #2
800642e: 220f movs r2, #15
8006430: fa02 f303 lsl.w r3, r2, r3
8006434: 43db mvns r3, r3
8006436: 68fa ldr r2, [r7, #12]
8006438: 4013 ands r3, r2
800643a: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
800643c: 687b ldr r3, [r7, #4]
800643e: 4a40 ldr r2, [pc, #256] @ (8006540 <HAL_GPIO_Init+0x2c0>)
8006440: 4293 cmp r3, r2
8006442: d013 beq.n 800646c <HAL_GPIO_Init+0x1ec>
8006444: 687b ldr r3, [r7, #4]
8006446: 4a3f ldr r2, [pc, #252] @ (8006544 <HAL_GPIO_Init+0x2c4>)
8006448: 4293 cmp r3, r2
800644a: d00d beq.n 8006468 <HAL_GPIO_Init+0x1e8>
800644c: 687b ldr r3, [r7, #4]
800644e: 4a3e ldr r2, [pc, #248] @ (8006548 <HAL_GPIO_Init+0x2c8>)
8006450: 4293 cmp r3, r2
8006452: d007 beq.n 8006464 <HAL_GPIO_Init+0x1e4>
8006454: 687b ldr r3, [r7, #4]
8006456: 4a3d ldr r2, [pc, #244] @ (800654c <HAL_GPIO_Init+0x2cc>)
8006458: 4293 cmp r3, r2
800645a: d101 bne.n 8006460 <HAL_GPIO_Init+0x1e0>
800645c: 2303 movs r3, #3
800645e: e006 b.n 800646e <HAL_GPIO_Init+0x1ee>
8006460: 2304 movs r3, #4
8006462: e004 b.n 800646e <HAL_GPIO_Init+0x1ee>
8006464: 2302 movs r3, #2
8006466: e002 b.n 800646e <HAL_GPIO_Init+0x1ee>
8006468: 2301 movs r3, #1
800646a: e000 b.n 800646e <HAL_GPIO_Init+0x1ee>
800646c: 2300 movs r3, #0
800646e: 6a7a ldr r2, [r7, #36] @ 0x24
8006470: f002 0203 and.w r2, r2, #3
8006474: 0092 lsls r2, r2, #2
8006476: 4093 lsls r3, r2
8006478: 68fa ldr r2, [r7, #12]
800647a: 4313 orrs r3, r2
800647c: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
800647e: 492f ldr r1, [pc, #188] @ (800653c <HAL_GPIO_Init+0x2bc>)
8006480: 6a7b ldr r3, [r7, #36] @ 0x24
8006482: 089b lsrs r3, r3, #2
8006484: 3302 adds r3, #2
8006486: 68fa ldr r2, [r7, #12]
8006488: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
800648c: 683b ldr r3, [r7, #0]
800648e: 685b ldr r3, [r3, #4]
8006490: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8006494: 2b00 cmp r3, #0
8006496: d006 beq.n 80064a6 <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
8006498: 4b2d ldr r3, [pc, #180] @ (8006550 <HAL_GPIO_Init+0x2d0>)
800649a: 689a ldr r2, [r3, #8]
800649c: 492c ldr r1, [pc, #176] @ (8006550 <HAL_GPIO_Init+0x2d0>)
800649e: 69bb ldr r3, [r7, #24]
80064a0: 4313 orrs r3, r2
80064a2: 608b str r3, [r1, #8]
80064a4: e006 b.n 80064b4 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
80064a6: 4b2a ldr r3, [pc, #168] @ (8006550 <HAL_GPIO_Init+0x2d0>)
80064a8: 689a ldr r2, [r3, #8]
80064aa: 69bb ldr r3, [r7, #24]
80064ac: 43db mvns r3, r3
80064ae: 4928 ldr r1, [pc, #160] @ (8006550 <HAL_GPIO_Init+0x2d0>)
80064b0: 4013 ands r3, r2
80064b2: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
80064b4: 683b ldr r3, [r7, #0]
80064b6: 685b ldr r3, [r3, #4]
80064b8: f403 1300 and.w r3, r3, #2097152 @ 0x200000
80064bc: 2b00 cmp r3, #0
80064be: d006 beq.n 80064ce <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
80064c0: 4b23 ldr r3, [pc, #140] @ (8006550 <HAL_GPIO_Init+0x2d0>)
80064c2: 68da ldr r2, [r3, #12]
80064c4: 4922 ldr r1, [pc, #136] @ (8006550 <HAL_GPIO_Init+0x2d0>)
80064c6: 69bb ldr r3, [r7, #24]
80064c8: 4313 orrs r3, r2
80064ca: 60cb str r3, [r1, #12]
80064cc: e006 b.n 80064dc <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
80064ce: 4b20 ldr r3, [pc, #128] @ (8006550 <HAL_GPIO_Init+0x2d0>)
80064d0: 68da ldr r2, [r3, #12]
80064d2: 69bb ldr r3, [r7, #24]
80064d4: 43db mvns r3, r3
80064d6: 491e ldr r1, [pc, #120] @ (8006550 <HAL_GPIO_Init+0x2d0>)
80064d8: 4013 ands r3, r2
80064da: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
80064dc: 683b ldr r3, [r7, #0]
80064de: 685b ldr r3, [r3, #4]
80064e0: f403 3300 and.w r3, r3, #131072 @ 0x20000
80064e4: 2b00 cmp r3, #0
80064e6: d006 beq.n 80064f6 <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
80064e8: 4b19 ldr r3, [pc, #100] @ (8006550 <HAL_GPIO_Init+0x2d0>)
80064ea: 685a ldr r2, [r3, #4]
80064ec: 4918 ldr r1, [pc, #96] @ (8006550 <HAL_GPIO_Init+0x2d0>)
80064ee: 69bb ldr r3, [r7, #24]
80064f0: 4313 orrs r3, r2
80064f2: 604b str r3, [r1, #4]
80064f4: e006 b.n 8006504 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
80064f6: 4b16 ldr r3, [pc, #88] @ (8006550 <HAL_GPIO_Init+0x2d0>)
80064f8: 685a ldr r2, [r3, #4]
80064fa: 69bb ldr r3, [r7, #24]
80064fc: 43db mvns r3, r3
80064fe: 4914 ldr r1, [pc, #80] @ (8006550 <HAL_GPIO_Init+0x2d0>)
8006500: 4013 ands r3, r2
8006502: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8006504: 683b ldr r3, [r7, #0]
8006506: 685b ldr r3, [r3, #4]
8006508: f403 3380 and.w r3, r3, #65536 @ 0x10000
800650c: 2b00 cmp r3, #0
800650e: d021 beq.n 8006554 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
8006510: 4b0f ldr r3, [pc, #60] @ (8006550 <HAL_GPIO_Init+0x2d0>)
8006512: 681a ldr r2, [r3, #0]
8006514: 490e ldr r1, [pc, #56] @ (8006550 <HAL_GPIO_Init+0x2d0>)
8006516: 69bb ldr r3, [r7, #24]
8006518: 4313 orrs r3, r2
800651a: 600b str r3, [r1, #0]
800651c: e021 b.n 8006562 <HAL_GPIO_Init+0x2e2>
800651e: bf00 nop
8006520: 10320000 .word 0x10320000
8006524: 10310000 .word 0x10310000
8006528: 10220000 .word 0x10220000
800652c: 10210000 .word 0x10210000
8006530: 10120000 .word 0x10120000
8006534: 10110000 .word 0x10110000
8006538: 40021000 .word 0x40021000
800653c: 40010000 .word 0x40010000
8006540: 40010800 .word 0x40010800
8006544: 40010c00 .word 0x40010c00
8006548: 40011000 .word 0x40011000
800654c: 40011400 .word 0x40011400
8006550: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8006554: 4b0b ldr r3, [pc, #44] @ (8006584 <HAL_GPIO_Init+0x304>)
8006556: 681a ldr r2, [r3, #0]
8006558: 69bb ldr r3, [r7, #24]
800655a: 43db mvns r3, r3
800655c: 4909 ldr r1, [pc, #36] @ (8006584 <HAL_GPIO_Init+0x304>)
800655e: 4013 ands r3, r2
8006560: 600b str r3, [r1, #0]
}
}
}
position++;
8006562: 6a7b ldr r3, [r7, #36] @ 0x24
8006564: 3301 adds r3, #1
8006566: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
8006568: 683b ldr r3, [r7, #0]
800656a: 681a ldr r2, [r3, #0]
800656c: 6a7b ldr r3, [r7, #36] @ 0x24
800656e: fa22 f303 lsr.w r3, r2, r3
8006572: 2b00 cmp r3, #0
8006574: f47f ae8e bne.w 8006294 <HAL_GPIO_Init+0x14>
}
}
8006578: bf00 nop
800657a: bf00 nop
800657c: 372c adds r7, #44 @ 0x2c
800657e: 46bd mov sp, r7
8006580: bc80 pop {r7}
8006582: 4770 bx lr
8006584: 40010400 .word 0x40010400
08006588 <HAL_GPIO_ReadPin>:
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8006588: b480 push {r7}
800658a: b085 sub sp, #20
800658c: af00 add r7, sp, #0
800658e: 6078 str r0, [r7, #4]
8006590: 460b mov r3, r1
8006592: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8006594: 687b ldr r3, [r7, #4]
8006596: 689a ldr r2, [r3, #8]
8006598: 887b ldrh r3, [r7, #2]
800659a: 4013 ands r3, r2
800659c: 2b00 cmp r3, #0
800659e: d002 beq.n 80065a6 <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
80065a0: 2301 movs r3, #1
80065a2: 73fb strb r3, [r7, #15]
80065a4: e001 b.n 80065aa <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
80065a6: 2300 movs r3, #0
80065a8: 73fb strb r3, [r7, #15]
}
return bitstatus;
80065aa: 7bfb ldrb r3, [r7, #15]
}
80065ac: 4618 mov r0, r3
80065ae: 3714 adds r7, #20
80065b0: 46bd mov sp, r7
80065b2: bc80 pop {r7}
80065b4: 4770 bx lr
080065b6 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
80065b6: b480 push {r7}
80065b8: b083 sub sp, #12
80065ba: af00 add r7, sp, #0
80065bc: 6078 str r0, [r7, #4]
80065be: 460b mov r3, r1
80065c0: 807b strh r3, [r7, #2]
80065c2: 4613 mov r3, r2
80065c4: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
80065c6: 787b ldrb r3, [r7, #1]
80065c8: 2b00 cmp r3, #0
80065ca: d003 beq.n 80065d4 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
80065cc: 887a ldrh r2, [r7, #2]
80065ce: 687b ldr r3, [r7, #4]
80065d0: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
80065d2: e003 b.n 80065dc <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
80065d4: 887b ldrh r3, [r7, #2]
80065d6: 041a lsls r2, r3, #16
80065d8: 687b ldr r3, [r7, #4]
80065da: 611a str r2, [r3, #16]
}
80065dc: bf00 nop
80065de: 370c adds r7, #12
80065e0: 46bd mov sp, r7
80065e2: bc80 pop {r7}
80065e4: 4770 bx lr
080065e6 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
80065e6: b580 push {r7, lr}
80065e8: b084 sub sp, #16
80065ea: af00 add r7, sp, #0
80065ec: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
80065ee: 687b ldr r3, [r7, #4]
80065f0: 2b00 cmp r3, #0
80065f2: d101 bne.n 80065f8 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
80065f4: 2301 movs r3, #1
80065f6: e0e8 b.n 80067ca <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
80065f8: 687b ldr r3, [r7, #4]
80065fa: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
80065fe: b2db uxtb r3, r3
8006600: 2b00 cmp r3, #0
8006602: d106 bne.n 8006612 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8006604: 687b ldr r3, [r7, #4]
8006606: 2200 movs r2, #0
8006608: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
800660c: 6878 ldr r0, [r7, #4]
800660e: f007 fc17 bl 800de40 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8006612: 687b ldr r3, [r7, #4]
8006614: 2203 movs r2, #3
8006616: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
800661a: 687b ldr r3, [r7, #4]
800661c: 2200 movs r2, #0
800661e: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8006620: 687b ldr r3, [r7, #4]
8006622: 681b ldr r3, [r3, #0]
8006624: 4618 mov r0, r3
8006626: f003 fabc bl 8009ba2 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
800662a: 687b ldr r3, [r7, #4]
800662c: 6818 ldr r0, [r3, #0]
800662e: 687b ldr r3, [r7, #4]
8006630: 3304 adds r3, #4
8006632: cb0e ldmia r3, {r1, r2, r3}
8006634: f003 fa92 bl 8009b5c <USB_CoreInit>
8006638: 4603 mov r3, r0
800663a: 2b00 cmp r3, #0
800663c: d005 beq.n 800664a <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800663e: 687b ldr r3, [r7, #4]
8006640: 2202 movs r2, #2
8006642: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006646: 2301 movs r3, #1
8006648: e0bf b.n 80067ca <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
800664a: 687b ldr r3, [r7, #4]
800664c: 681b ldr r3, [r3, #0]
800664e: 2100 movs r1, #0
8006650: 4618 mov r0, r3
8006652: f003 fac0 bl 8009bd6 <USB_SetCurrentMode>
8006656: 4603 mov r3, r0
8006658: 2b00 cmp r3, #0
800665a: d005 beq.n 8006668 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
800665c: 687b ldr r3, [r7, #4]
800665e: 2202 movs r2, #2
8006660: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006664: 2301 movs r3, #1
8006666: e0b0 b.n 80067ca <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006668: 2300 movs r3, #0
800666a: 73fb strb r3, [r7, #15]
800666c: e03e b.n 80066ec <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
800666e: 7bfa ldrb r2, [r7, #15]
8006670: 6879 ldr r1, [r7, #4]
8006672: 4613 mov r3, r2
8006674: 009b lsls r3, r3, #2
8006676: 4413 add r3, r2
8006678: 00db lsls r3, r3, #3
800667a: 440b add r3, r1
800667c: 3311 adds r3, #17
800667e: 2201 movs r2, #1
8006680: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8006682: 7bfa ldrb r2, [r7, #15]
8006684: 6879 ldr r1, [r7, #4]
8006686: 4613 mov r3, r2
8006688: 009b lsls r3, r3, #2
800668a: 4413 add r3, r2
800668c: 00db lsls r3, r3, #3
800668e: 440b add r3, r1
8006690: 3310 adds r3, #16
8006692: 7bfa ldrb r2, [r7, #15]
8006694: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8006696: 7bfa ldrb r2, [r7, #15]
8006698: 6879 ldr r1, [r7, #4]
800669a: 4613 mov r3, r2
800669c: 009b lsls r3, r3, #2
800669e: 4413 add r3, r2
80066a0: 00db lsls r3, r3, #3
80066a2: 440b add r3, r1
80066a4: 3313 adds r3, #19
80066a6: 2200 movs r2, #0
80066a8: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
80066aa: 7bfa ldrb r2, [r7, #15]
80066ac: 6879 ldr r1, [r7, #4]
80066ae: 4613 mov r3, r2
80066b0: 009b lsls r3, r3, #2
80066b2: 4413 add r3, r2
80066b4: 00db lsls r3, r3, #3
80066b6: 440b add r3, r1
80066b8: 3320 adds r3, #32
80066ba: 2200 movs r2, #0
80066bc: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
80066be: 7bfa ldrb r2, [r7, #15]
80066c0: 6879 ldr r1, [r7, #4]
80066c2: 4613 mov r3, r2
80066c4: 009b lsls r3, r3, #2
80066c6: 4413 add r3, r2
80066c8: 00db lsls r3, r3, #3
80066ca: 440b add r3, r1
80066cc: 3324 adds r3, #36 @ 0x24
80066ce: 2200 movs r2, #0
80066d0: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
80066d2: 7bfb ldrb r3, [r7, #15]
80066d4: 6879 ldr r1, [r7, #4]
80066d6: 1c5a adds r2, r3, #1
80066d8: 4613 mov r3, r2
80066da: 009b lsls r3, r3, #2
80066dc: 4413 add r3, r2
80066de: 00db lsls r3, r3, #3
80066e0: 440b add r3, r1
80066e2: 2200 movs r2, #0
80066e4: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80066e6: 7bfb ldrb r3, [r7, #15]
80066e8: 3301 adds r3, #1
80066ea: 73fb strb r3, [r7, #15]
80066ec: 687b ldr r3, [r7, #4]
80066ee: 791b ldrb r3, [r3, #4]
80066f0: 7bfa ldrb r2, [r7, #15]
80066f2: 429a cmp r2, r3
80066f4: d3bb bcc.n 800666e <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80066f6: 2300 movs r3, #0
80066f8: 73fb strb r3, [r7, #15]
80066fa: e044 b.n 8006786 <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
80066fc: 7bfa ldrb r2, [r7, #15]
80066fe: 6879 ldr r1, [r7, #4]
8006700: 4613 mov r3, r2
8006702: 009b lsls r3, r3, #2
8006704: 4413 add r3, r2
8006706: 00db lsls r3, r3, #3
8006708: 440b add r3, r1
800670a: f203 1351 addw r3, r3, #337 @ 0x151
800670e: 2200 movs r2, #0
8006710: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
8006712: 7bfa ldrb r2, [r7, #15]
8006714: 6879 ldr r1, [r7, #4]
8006716: 4613 mov r3, r2
8006718: 009b lsls r3, r3, #2
800671a: 4413 add r3, r2
800671c: 00db lsls r3, r3, #3
800671e: 440b add r3, r1
8006720: f503 73a8 add.w r3, r3, #336 @ 0x150
8006724: 7bfa ldrb r2, [r7, #15]
8006726: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8006728: 7bfa ldrb r2, [r7, #15]
800672a: 6879 ldr r1, [r7, #4]
800672c: 4613 mov r3, r2
800672e: 009b lsls r3, r3, #2
8006730: 4413 add r3, r2
8006732: 00db lsls r3, r3, #3
8006734: 440b add r3, r1
8006736: f203 1353 addw r3, r3, #339 @ 0x153
800673a: 2200 movs r2, #0
800673c: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
800673e: 7bfa ldrb r2, [r7, #15]
8006740: 6879 ldr r1, [r7, #4]
8006742: 4613 mov r3, r2
8006744: 009b lsls r3, r3, #2
8006746: 4413 add r3, r2
8006748: 00db lsls r3, r3, #3
800674a: 440b add r3, r1
800674c: f503 73b0 add.w r3, r3, #352 @ 0x160
8006750: 2200 movs r2, #0
8006752: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8006754: 7bfa ldrb r2, [r7, #15]
8006756: 6879 ldr r1, [r7, #4]
8006758: 4613 mov r3, r2
800675a: 009b lsls r3, r3, #2
800675c: 4413 add r3, r2
800675e: 00db lsls r3, r3, #3
8006760: 440b add r3, r1
8006762: f503 73b2 add.w r3, r3, #356 @ 0x164
8006766: 2200 movs r2, #0
8006768: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
800676a: 7bfa ldrb r2, [r7, #15]
800676c: 6879 ldr r1, [r7, #4]
800676e: 4613 mov r3, r2
8006770: 009b lsls r3, r3, #2
8006772: 4413 add r3, r2
8006774: 00db lsls r3, r3, #3
8006776: 440b add r3, r1
8006778: f503 73b4 add.w r3, r3, #360 @ 0x168
800677c: 2200 movs r2, #0
800677e: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006780: 7bfb ldrb r3, [r7, #15]
8006782: 3301 adds r3, #1
8006784: 73fb strb r3, [r7, #15]
8006786: 687b ldr r3, [r7, #4]
8006788: 791b ldrb r3, [r3, #4]
800678a: 7bfa ldrb r2, [r7, #15]
800678c: 429a cmp r2, r3
800678e: d3b5 bcc.n 80066fc <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8006790: 687b ldr r3, [r7, #4]
8006792: 6818 ldr r0, [r3, #0]
8006794: 687b ldr r3, [r7, #4]
8006796: 3304 adds r3, #4
8006798: cb0e ldmia r3, {r1, r2, r3}
800679a: f003 fa28 bl 8009bee <USB_DevInit>
800679e: 4603 mov r3, r0
80067a0: 2b00 cmp r3, #0
80067a2: d005 beq.n 80067b0 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80067a4: 687b ldr r3, [r7, #4]
80067a6: 2202 movs r2, #2
80067a8: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80067ac: 2301 movs r3, #1
80067ae: e00c b.n 80067ca <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
80067b0: 687b ldr r3, [r7, #4]
80067b2: 2200 movs r2, #0
80067b4: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
80067b6: 687b ldr r3, [r7, #4]
80067b8: 2201 movs r2, #1
80067ba: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
80067be: 687b ldr r3, [r7, #4]
80067c0: 681b ldr r3, [r3, #0]
80067c2: 4618 mov r0, r3
80067c4: f005 fca7 bl 800c116 <USB_DevDisconnect>
return HAL_OK;
80067c8: 2300 movs r3, #0
}
80067ca: 4618 mov r0, r3
80067cc: 3710 adds r7, #16
80067ce: 46bd mov sp, r7
80067d0: bd80 pop {r7, pc}
080067d2 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
80067d2: b580 push {r7, lr}
80067d4: b082 sub sp, #8
80067d6: af00 add r7, sp, #0
80067d8: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
80067da: 687b ldr r3, [r7, #4]
80067dc: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80067e0: 2b01 cmp r3, #1
80067e2: d101 bne.n 80067e8 <HAL_PCD_Start+0x16>
80067e4: 2302 movs r3, #2
80067e6: e016 b.n 8006816 <HAL_PCD_Start+0x44>
80067e8: 687b ldr r3, [r7, #4]
80067ea: 2201 movs r2, #1
80067ec: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
80067f0: 687b ldr r3, [r7, #4]
80067f2: 681b ldr r3, [r3, #0]
80067f4: 4618 mov r0, r3
80067f6: f003 f9be bl 8009b76 <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
80067fa: 2101 movs r1, #1
80067fc: 6878 ldr r0, [r7, #4]
80067fe: f007 fd92 bl 800e326 <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
8006802: 687b ldr r3, [r7, #4]
8006804: 681b ldr r3, [r3, #0]
8006806: 4618 mov r0, r3
8006808: f005 fc7b bl 800c102 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
800680c: 687b ldr r3, [r7, #4]
800680e: 2200 movs r2, #0
8006810: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006814: 2300 movs r3, #0
}
8006816: 4618 mov r0, r3
8006818: 3708 adds r7, #8
800681a: 46bd mov sp, r7
800681c: bd80 pop {r7, pc}
0800681e <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
800681e: b580 push {r7, lr}
8006820: b088 sub sp, #32
8006822: af00 add r7, sp, #0
8006824: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
8006826: 687b ldr r3, [r7, #4]
8006828: 681b ldr r3, [r3, #0]
800682a: 4618 mov r0, r3
800682c: f005 fc7d bl 800c12a <USB_ReadInterrupts>
8006830: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
8006832: 69bb ldr r3, [r7, #24]
8006834: f403 4300 and.w r3, r3, #32768 @ 0x8000
8006838: 2b00 cmp r3, #0
800683a: d003 beq.n 8006844 <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
800683c: 6878 ldr r0, [r7, #4]
800683e: f000 fb1a bl 8006e76 <PCD_EP_ISR_Handler>
return;
8006842: e119 b.n 8006a78 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
8006844: 69bb ldr r3, [r7, #24]
8006846: f403 6380 and.w r3, r3, #1024 @ 0x400
800684a: 2b00 cmp r3, #0
800684c: d013 beq.n 8006876 <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
800684e: 687b ldr r3, [r7, #4]
8006850: 681b ldr r3, [r3, #0]
8006852: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006856: b29a uxth r2, r3
8006858: 687b ldr r3, [r7, #4]
800685a: 681b ldr r3, [r3, #0]
800685c: f422 6280 bic.w r2, r2, #1024 @ 0x400
8006860: b292 uxth r2, r2
8006862: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8006866: 6878 ldr r0, [r7, #4]
8006868: f007 fb65 bl 800df36 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
800686c: 2100 movs r1, #0
800686e: 6878 ldr r0, [r7, #4]
8006870: f000 f905 bl 8006a7e <HAL_PCD_SetAddress>
return;
8006874: e100 b.n 8006a78 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
8006876: 69bb ldr r3, [r7, #24]
8006878: f403 4380 and.w r3, r3, #16384 @ 0x4000
800687c: 2b00 cmp r3, #0
800687e: d00c beq.n 800689a <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8006880: 687b ldr r3, [r7, #4]
8006882: 681b ldr r3, [r3, #0]
8006884: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006888: b29a uxth r2, r3
800688a: 687b ldr r3, [r7, #4]
800688c: 681b ldr r3, [r3, #0]
800688e: f422 4280 bic.w r2, r2, #16384 @ 0x4000
8006892: b292 uxth r2, r2
8006894: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006898: e0ee b.n 8006a78 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
800689a: 69bb ldr r3, [r7, #24]
800689c: f403 5300 and.w r3, r3, #8192 @ 0x2000
80068a0: 2b00 cmp r3, #0
80068a2: d00c beq.n 80068be <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
80068a4: 687b ldr r3, [r7, #4]
80068a6: 681b ldr r3, [r3, #0]
80068a8: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80068ac: b29a uxth r2, r3
80068ae: 687b ldr r3, [r7, #4]
80068b0: 681b ldr r3, [r3, #0]
80068b2: f422 5200 bic.w r2, r2, #8192 @ 0x2000
80068b6: b292 uxth r2, r2
80068b8: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
80068bc: e0dc b.n 8006a78 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
80068be: 69bb ldr r3, [r7, #24]
80068c0: f403 5380 and.w r3, r3, #4096 @ 0x1000
80068c4: 2b00 cmp r3, #0
80068c6: d027 beq.n 8006918 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
80068c8: 687b ldr r3, [r7, #4]
80068ca: 681b ldr r3, [r3, #0]
80068cc: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80068d0: b29a uxth r2, r3
80068d2: 687b ldr r3, [r7, #4]
80068d4: 681b ldr r3, [r3, #0]
80068d6: f022 0204 bic.w r2, r2, #4
80068da: b292 uxth r2, r2
80068dc: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
80068e0: 687b ldr r3, [r7, #4]
80068e2: 681b ldr r3, [r3, #0]
80068e4: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80068e8: b29a uxth r2, r3
80068ea: 687b ldr r3, [r7, #4]
80068ec: 681b ldr r3, [r3, #0]
80068ee: f022 0208 bic.w r2, r2, #8
80068f2: b292 uxth r2, r2
80068f4: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
80068f8: 6878 ldr r0, [r7, #4]
80068fa: f007 fb55 bl 800dfa8 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
80068fe: 687b ldr r3, [r7, #4]
8006900: 681b ldr r3, [r3, #0]
8006902: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006906: b29a uxth r2, r3
8006908: 687b ldr r3, [r7, #4]
800690a: 681b ldr r3, [r3, #0]
800690c: f422 5280 bic.w r2, r2, #4096 @ 0x1000
8006910: b292 uxth r2, r2
8006912: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006916: e0af b.n 8006a78 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8006918: 69bb ldr r3, [r7, #24]
800691a: f403 6300 and.w r3, r3, #2048 @ 0x800
800691e: 2b00 cmp r3, #0
8006920: f000 8083 beq.w 8006a2a <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
8006924: 2300 movs r3, #0
8006926: 77fb strb r3, [r7, #31]
8006928: e010 b.n 800694c <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
800692a: 687b ldr r3, [r7, #4]
800692c: 681b ldr r3, [r3, #0]
800692e: 461a mov r2, r3
8006930: 7ffb ldrb r3, [r7, #31]
8006932: 009b lsls r3, r3, #2
8006934: 441a add r2, r3
8006936: 7ffb ldrb r3, [r7, #31]
8006938: 8812 ldrh r2, [r2, #0]
800693a: b292 uxth r2, r2
800693c: 005b lsls r3, r3, #1
800693e: 3320 adds r3, #32
8006940: 443b add r3, r7
8006942: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8006946: 7ffb ldrb r3, [r7, #31]
8006948: 3301 adds r3, #1
800694a: 77fb strb r3, [r7, #31]
800694c: 7ffb ldrb r3, [r7, #31]
800694e: 2b07 cmp r3, #7
8006950: d9eb bls.n 800692a <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8006952: 687b ldr r3, [r7, #4]
8006954: 681b ldr r3, [r3, #0]
8006956: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800695a: b29a uxth r2, r3
800695c: 687b ldr r3, [r7, #4]
800695e: 681b ldr r3, [r3, #0]
8006960: f042 0201 orr.w r2, r2, #1
8006964: b292 uxth r2, r2
8006966: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
800696a: 687b ldr r3, [r7, #4]
800696c: 681b ldr r3, [r3, #0]
800696e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006972: b29a uxth r2, r3
8006974: 687b ldr r3, [r7, #4]
8006976: 681b ldr r3, [r3, #0]
8006978: f022 0201 bic.w r2, r2, #1
800697c: b292 uxth r2, r2
800697e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8006982: bf00 nop
8006984: 687b ldr r3, [r7, #4]
8006986: 681b ldr r3, [r3, #0]
8006988: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800698c: b29b uxth r3, r3
800698e: f403 6380 and.w r3, r3, #1024 @ 0x400
8006992: 2b00 cmp r3, #0
8006994: d0f6 beq.n 8006984 <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8006996: 687b ldr r3, [r7, #4]
8006998: 681b ldr r3, [r3, #0]
800699a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800699e: b29a uxth r2, r3
80069a0: 687b ldr r3, [r7, #4]
80069a2: 681b ldr r3, [r3, #0]
80069a4: f422 6280 bic.w r2, r2, #1024 @ 0x400
80069a8: b292 uxth r2, r2
80069aa: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
80069ae: 2300 movs r3, #0
80069b0: 77fb strb r3, [r7, #31]
80069b2: e00f b.n 80069d4 <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
80069b4: 7ffb ldrb r3, [r7, #31]
80069b6: 687a ldr r2, [r7, #4]
80069b8: 6812 ldr r2, [r2, #0]
80069ba: 4611 mov r1, r2
80069bc: 7ffa ldrb r2, [r7, #31]
80069be: 0092 lsls r2, r2, #2
80069c0: 440a add r2, r1
80069c2: 005b lsls r3, r3, #1
80069c4: 3320 adds r3, #32
80069c6: 443b add r3, r7
80069c8: f833 3c18 ldrh.w r3, [r3, #-24]
80069cc: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
80069ce: 7ffb ldrb r3, [r7, #31]
80069d0: 3301 adds r3, #1
80069d2: 77fb strb r3, [r7, #31]
80069d4: 7ffb ldrb r3, [r7, #31]
80069d6: 2b07 cmp r3, #7
80069d8: d9ec bls.n 80069b4 <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
80069da: 687b ldr r3, [r7, #4]
80069dc: 681b ldr r3, [r3, #0]
80069de: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80069e2: b29a uxth r2, r3
80069e4: 687b ldr r3, [r7, #4]
80069e6: 681b ldr r3, [r3, #0]
80069e8: f042 0208 orr.w r2, r2, #8
80069ec: b292 uxth r2, r2
80069ee: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
80069f2: 687b ldr r3, [r7, #4]
80069f4: 681b ldr r3, [r3, #0]
80069f6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80069fa: b29a uxth r2, r3
80069fc: 687b ldr r3, [r7, #4]
80069fe: 681b ldr r3, [r3, #0]
8006a00: f422 6200 bic.w r2, r2, #2048 @ 0x800
8006a04: b292 uxth r2, r2
8006a06: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8006a0a: 687b ldr r3, [r7, #4]
8006a0c: 681b ldr r3, [r3, #0]
8006a0e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006a12: b29a uxth r2, r3
8006a14: 687b ldr r3, [r7, #4]
8006a16: 681b ldr r3, [r3, #0]
8006a18: f042 0204 orr.w r2, r2, #4
8006a1c: b292 uxth r2, r2
8006a1e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8006a22: 6878 ldr r0, [r7, #4]
8006a24: f007 faa6 bl 800df74 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8006a28: e026 b.n 8006a78 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8006a2a: 69bb ldr r3, [r7, #24]
8006a2c: f403 7300 and.w r3, r3, #512 @ 0x200
8006a30: 2b00 cmp r3, #0
8006a32: d00f beq.n 8006a54 <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8006a34: 687b ldr r3, [r7, #4]
8006a36: 681b ldr r3, [r3, #0]
8006a38: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006a3c: b29a uxth r2, r3
8006a3e: 687b ldr r3, [r7, #4]
8006a40: 681b ldr r3, [r3, #0]
8006a42: f422 7200 bic.w r2, r2, #512 @ 0x200
8006a46: b292 uxth r2, r2
8006a48: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8006a4c: 6878 ldr r0, [r7, #4]
8006a4e: f007 fa64 bl 800df1a <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8006a52: e011 b.n 8006a78 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8006a54: 69bb ldr r3, [r7, #24]
8006a56: f403 7380 and.w r3, r3, #256 @ 0x100
8006a5a: 2b00 cmp r3, #0
8006a5c: d00c beq.n 8006a78 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8006a5e: 687b ldr r3, [r7, #4]
8006a60: 681b ldr r3, [r3, #0]
8006a62: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006a66: b29a uxth r2, r3
8006a68: 687b ldr r3, [r7, #4]
8006a6a: 681b ldr r3, [r3, #0]
8006a6c: f422 7280 bic.w r2, r2, #256 @ 0x100
8006a70: b292 uxth r2, r2
8006a72: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006a76: bf00 nop
}
}
8006a78: 3720 adds r7, #32
8006a7a: 46bd mov sp, r7
8006a7c: bd80 pop {r7, pc}
08006a7e <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8006a7e: b580 push {r7, lr}
8006a80: b082 sub sp, #8
8006a82: af00 add r7, sp, #0
8006a84: 6078 str r0, [r7, #4]
8006a86: 460b mov r3, r1
8006a88: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8006a8a: 687b ldr r3, [r7, #4]
8006a8c: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006a90: 2b01 cmp r3, #1
8006a92: d101 bne.n 8006a98 <HAL_PCD_SetAddress+0x1a>
8006a94: 2302 movs r3, #2
8006a96: e012 b.n 8006abe <HAL_PCD_SetAddress+0x40>
8006a98: 687b ldr r3, [r7, #4]
8006a9a: 2201 movs r2, #1
8006a9c: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8006aa0: 687b ldr r3, [r7, #4]
8006aa2: 78fa ldrb r2, [r7, #3]
8006aa4: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8006aa6: 687b ldr r3, [r7, #4]
8006aa8: 681b ldr r3, [r3, #0]
8006aaa: 78fa ldrb r2, [r7, #3]
8006aac: 4611 mov r1, r2
8006aae: 4618 mov r0, r3
8006ab0: f005 fb14 bl 800c0dc <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8006ab4: 687b ldr r3, [r7, #4]
8006ab6: 2200 movs r2, #0
8006ab8: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006abc: 2300 movs r3, #0
}
8006abe: 4618 mov r0, r3
8006ac0: 3708 adds r7, #8
8006ac2: 46bd mov sp, r7
8006ac4: bd80 pop {r7, pc}
08006ac6 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8006ac6: b580 push {r7, lr}
8006ac8: b084 sub sp, #16
8006aca: af00 add r7, sp, #0
8006acc: 6078 str r0, [r7, #4]
8006ace: 4608 mov r0, r1
8006ad0: 4611 mov r1, r2
8006ad2: 461a mov r2, r3
8006ad4: 4603 mov r3, r0
8006ad6: 70fb strb r3, [r7, #3]
8006ad8: 460b mov r3, r1
8006ada: 803b strh r3, [r7, #0]
8006adc: 4613 mov r3, r2
8006ade: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8006ae0: 2300 movs r3, #0
8006ae2: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006ae4: f997 3003 ldrsb.w r3, [r7, #3]
8006ae8: 2b00 cmp r3, #0
8006aea: da0e bge.n 8006b0a <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006aec: 78fb ldrb r3, [r7, #3]
8006aee: f003 0207 and.w r2, r3, #7
8006af2: 4613 mov r3, r2
8006af4: 009b lsls r3, r3, #2
8006af6: 4413 add r3, r2
8006af8: 00db lsls r3, r3, #3
8006afa: 3310 adds r3, #16
8006afc: 687a ldr r2, [r7, #4]
8006afe: 4413 add r3, r2
8006b00: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006b02: 68fb ldr r3, [r7, #12]
8006b04: 2201 movs r2, #1
8006b06: 705a strb r2, [r3, #1]
8006b08: e00e b.n 8006b28 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006b0a: 78fb ldrb r3, [r7, #3]
8006b0c: f003 0207 and.w r2, r3, #7
8006b10: 4613 mov r3, r2
8006b12: 009b lsls r3, r3, #2
8006b14: 4413 add r3, r2
8006b16: 00db lsls r3, r3, #3
8006b18: f503 73a8 add.w r3, r3, #336 @ 0x150
8006b1c: 687a ldr r2, [r7, #4]
8006b1e: 4413 add r3, r2
8006b20: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006b22: 68fb ldr r3, [r7, #12]
8006b24: 2200 movs r2, #0
8006b26: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006b28: 78fb ldrb r3, [r7, #3]
8006b2a: f003 0307 and.w r3, r3, #7
8006b2e: b2da uxtb r2, r3
8006b30: 68fb ldr r3, [r7, #12]
8006b32: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8006b34: 883a ldrh r2, [r7, #0]
8006b36: 68fb ldr r3, [r7, #12]
8006b38: 611a str r2, [r3, #16]
ep->type = ep_type;
8006b3a: 68fb ldr r3, [r7, #12]
8006b3c: 78ba ldrb r2, [r7, #2]
8006b3e: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8006b40: 78bb ldrb r3, [r7, #2]
8006b42: 2b02 cmp r3, #2
8006b44: d102 bne.n 8006b4c <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8006b46: 68fb ldr r3, [r7, #12]
8006b48: 2200 movs r2, #0
8006b4a: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8006b4c: 687b ldr r3, [r7, #4]
8006b4e: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006b52: 2b01 cmp r3, #1
8006b54: d101 bne.n 8006b5a <HAL_PCD_EP_Open+0x94>
8006b56: 2302 movs r3, #2
8006b58: e00e b.n 8006b78 <HAL_PCD_EP_Open+0xb2>
8006b5a: 687b ldr r3, [r7, #4]
8006b5c: 2201 movs r2, #1
8006b5e: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8006b62: 687b ldr r3, [r7, #4]
8006b64: 681b ldr r3, [r3, #0]
8006b66: 68f9 ldr r1, [r7, #12]
8006b68: 4618 mov r0, r3
8006b6a: f003 f85d bl 8009c28 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8006b6e: 687b ldr r3, [r7, #4]
8006b70: 2200 movs r2, #0
8006b72: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
8006b76: 7afb ldrb r3, [r7, #11]
}
8006b78: 4618 mov r0, r3
8006b7a: 3710 adds r7, #16
8006b7c: 46bd mov sp, r7
8006b7e: bd80 pop {r7, pc}
08006b80 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006b80: b580 push {r7, lr}
8006b82: b084 sub sp, #16
8006b84: af00 add r7, sp, #0
8006b86: 6078 str r0, [r7, #4]
8006b88: 460b mov r3, r1
8006b8a: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006b8c: f997 3003 ldrsb.w r3, [r7, #3]
8006b90: 2b00 cmp r3, #0
8006b92: da0e bge.n 8006bb2 <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006b94: 78fb ldrb r3, [r7, #3]
8006b96: f003 0207 and.w r2, r3, #7
8006b9a: 4613 mov r3, r2
8006b9c: 009b lsls r3, r3, #2
8006b9e: 4413 add r3, r2
8006ba0: 00db lsls r3, r3, #3
8006ba2: 3310 adds r3, #16
8006ba4: 687a ldr r2, [r7, #4]
8006ba6: 4413 add r3, r2
8006ba8: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006baa: 68fb ldr r3, [r7, #12]
8006bac: 2201 movs r2, #1
8006bae: 705a strb r2, [r3, #1]
8006bb0: e00e b.n 8006bd0 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006bb2: 78fb ldrb r3, [r7, #3]
8006bb4: f003 0207 and.w r2, r3, #7
8006bb8: 4613 mov r3, r2
8006bba: 009b lsls r3, r3, #2
8006bbc: 4413 add r3, r2
8006bbe: 00db lsls r3, r3, #3
8006bc0: f503 73a8 add.w r3, r3, #336 @ 0x150
8006bc4: 687a ldr r2, [r7, #4]
8006bc6: 4413 add r3, r2
8006bc8: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006bca: 68fb ldr r3, [r7, #12]
8006bcc: 2200 movs r2, #0
8006bce: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006bd0: 78fb ldrb r3, [r7, #3]
8006bd2: f003 0307 and.w r3, r3, #7
8006bd6: b2da uxtb r2, r3
8006bd8: 68fb ldr r3, [r7, #12]
8006bda: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006bdc: 687b ldr r3, [r7, #4]
8006bde: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006be2: 2b01 cmp r3, #1
8006be4: d101 bne.n 8006bea <HAL_PCD_EP_Close+0x6a>
8006be6: 2302 movs r3, #2
8006be8: e00e b.n 8006c08 <HAL_PCD_EP_Close+0x88>
8006bea: 687b ldr r3, [r7, #4]
8006bec: 2201 movs r2, #1
8006bee: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8006bf2: 687b ldr r3, [r7, #4]
8006bf4: 681b ldr r3, [r3, #0]
8006bf6: 68f9 ldr r1, [r7, #12]
8006bf8: 4618 mov r0, r3
8006bfa: f003 fbd5 bl 800a3a8 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8006bfe: 687b ldr r3, [r7, #4]
8006c00: 2200 movs r2, #0
8006c02: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006c06: 2300 movs r3, #0
}
8006c08: 4618 mov r0, r3
8006c0a: 3710 adds r7, #16
8006c0c: 46bd mov sp, r7
8006c0e: bd80 pop {r7, pc}
08006c10 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006c10: b580 push {r7, lr}
8006c12: b086 sub sp, #24
8006c14: af00 add r7, sp, #0
8006c16: 60f8 str r0, [r7, #12]
8006c18: 607a str r2, [r7, #4]
8006c1a: 603b str r3, [r7, #0]
8006c1c: 460b mov r3, r1
8006c1e: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006c20: 7afb ldrb r3, [r7, #11]
8006c22: f003 0207 and.w r2, r3, #7
8006c26: 4613 mov r3, r2
8006c28: 009b lsls r3, r3, #2
8006c2a: 4413 add r3, r2
8006c2c: 00db lsls r3, r3, #3
8006c2e: f503 73a8 add.w r3, r3, #336 @ 0x150
8006c32: 68fa ldr r2, [r7, #12]
8006c34: 4413 add r3, r2
8006c36: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8006c38: 697b ldr r3, [r7, #20]
8006c3a: 687a ldr r2, [r7, #4]
8006c3c: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006c3e: 697b ldr r3, [r7, #20]
8006c40: 683a ldr r2, [r7, #0]
8006c42: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8006c44: 697b ldr r3, [r7, #20]
8006c46: 2200 movs r2, #0
8006c48: 61da str r2, [r3, #28]
ep->is_in = 0U;
8006c4a: 697b ldr r3, [r7, #20]
8006c4c: 2200 movs r2, #0
8006c4e: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006c50: 7afb ldrb r3, [r7, #11]
8006c52: f003 0307 and.w r3, r3, #7
8006c56: b2da uxtb r2, r3
8006c58: 697b ldr r3, [r7, #20]
8006c5a: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006c5c: 68fb ldr r3, [r7, #12]
8006c5e: 681b ldr r3, [r3, #0]
8006c60: 6979 ldr r1, [r7, #20]
8006c62: 4618 mov r0, r3
8006c64: f003 fd8c bl 800a780 <USB_EPStartXfer>
return HAL_OK;
8006c68: 2300 movs r3, #0
}
8006c6a: 4618 mov r0, r3
8006c6c: 3718 adds r7, #24
8006c6e: 46bd mov sp, r7
8006c70: bd80 pop {r7, pc}
08006c72 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8006c72: b480 push {r7}
8006c74: b083 sub sp, #12
8006c76: af00 add r7, sp, #0
8006c78: 6078 str r0, [r7, #4]
8006c7a: 460b mov r3, r1
8006c7c: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8006c7e: 78fb ldrb r3, [r7, #3]
8006c80: f003 0207 and.w r2, r3, #7
8006c84: 6879 ldr r1, [r7, #4]
8006c86: 4613 mov r3, r2
8006c88: 009b lsls r3, r3, #2
8006c8a: 4413 add r3, r2
8006c8c: 00db lsls r3, r3, #3
8006c8e: 440b add r3, r1
8006c90: f503 73b6 add.w r3, r3, #364 @ 0x16c
8006c94: 681b ldr r3, [r3, #0]
}
8006c96: 4618 mov r0, r3
8006c98: 370c adds r7, #12
8006c9a: 46bd mov sp, r7
8006c9c: bc80 pop {r7}
8006c9e: 4770 bx lr
08006ca0 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006ca0: b580 push {r7, lr}
8006ca2: b086 sub sp, #24
8006ca4: af00 add r7, sp, #0
8006ca6: 60f8 str r0, [r7, #12]
8006ca8: 607a str r2, [r7, #4]
8006caa: 603b str r3, [r7, #0]
8006cac: 460b mov r3, r1
8006cae: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006cb0: 7afb ldrb r3, [r7, #11]
8006cb2: f003 0207 and.w r2, r3, #7
8006cb6: 4613 mov r3, r2
8006cb8: 009b lsls r3, r3, #2
8006cba: 4413 add r3, r2
8006cbc: 00db lsls r3, r3, #3
8006cbe: 3310 adds r3, #16
8006cc0: 68fa ldr r2, [r7, #12]
8006cc2: 4413 add r3, r2
8006cc4: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8006cc6: 697b ldr r3, [r7, #20]
8006cc8: 687a ldr r2, [r7, #4]
8006cca: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006ccc: 697b ldr r3, [r7, #20]
8006cce: 683a ldr r2, [r7, #0]
8006cd0: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8006cd2: 697b ldr r3, [r7, #20]
8006cd4: 2201 movs r2, #1
8006cd6: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
8006cda: 697b ldr r3, [r7, #20]
8006cdc: 683a ldr r2, [r7, #0]
8006cde: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8006ce0: 697b ldr r3, [r7, #20]
8006ce2: 2200 movs r2, #0
8006ce4: 61da str r2, [r3, #28]
ep->is_in = 1U;
8006ce6: 697b ldr r3, [r7, #20]
8006ce8: 2201 movs r2, #1
8006cea: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006cec: 7afb ldrb r3, [r7, #11]
8006cee: f003 0307 and.w r3, r3, #7
8006cf2: b2da uxtb r2, r3
8006cf4: 697b ldr r3, [r7, #20]
8006cf6: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006cf8: 68fb ldr r3, [r7, #12]
8006cfa: 681b ldr r3, [r3, #0]
8006cfc: 6979 ldr r1, [r7, #20]
8006cfe: 4618 mov r0, r3
8006d00: f003 fd3e bl 800a780 <USB_EPStartXfer>
return HAL_OK;
8006d04: 2300 movs r3, #0
}
8006d06: 4618 mov r0, r3
8006d08: 3718 adds r7, #24
8006d0a: 46bd mov sp, r7
8006d0c: bd80 pop {r7, pc}
08006d0e <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006d0e: b580 push {r7, lr}
8006d10: b084 sub sp, #16
8006d12: af00 add r7, sp, #0
8006d14: 6078 str r0, [r7, #4]
8006d16: 460b mov r3, r1
8006d18: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8006d1a: 78fb ldrb r3, [r7, #3]
8006d1c: f003 0307 and.w r3, r3, #7
8006d20: 687a ldr r2, [r7, #4]
8006d22: 7912 ldrb r2, [r2, #4]
8006d24: 4293 cmp r3, r2
8006d26: d901 bls.n 8006d2c <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8006d28: 2301 movs r3, #1
8006d2a: e04c b.n 8006dc6 <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8006d2c: f997 3003 ldrsb.w r3, [r7, #3]
8006d30: 2b00 cmp r3, #0
8006d32: da0e bge.n 8006d52 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006d34: 78fb ldrb r3, [r7, #3]
8006d36: f003 0207 and.w r2, r3, #7
8006d3a: 4613 mov r3, r2
8006d3c: 009b lsls r3, r3, #2
8006d3e: 4413 add r3, r2
8006d40: 00db lsls r3, r3, #3
8006d42: 3310 adds r3, #16
8006d44: 687a ldr r2, [r7, #4]
8006d46: 4413 add r3, r2
8006d48: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006d4a: 68fb ldr r3, [r7, #12]
8006d4c: 2201 movs r2, #1
8006d4e: 705a strb r2, [r3, #1]
8006d50: e00c b.n 8006d6c <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8006d52: 78fa ldrb r2, [r7, #3]
8006d54: 4613 mov r3, r2
8006d56: 009b lsls r3, r3, #2
8006d58: 4413 add r3, r2
8006d5a: 00db lsls r3, r3, #3
8006d5c: f503 73a8 add.w r3, r3, #336 @ 0x150
8006d60: 687a ldr r2, [r7, #4]
8006d62: 4413 add r3, r2
8006d64: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006d66: 68fb ldr r3, [r7, #12]
8006d68: 2200 movs r2, #0
8006d6a: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8006d6c: 68fb ldr r3, [r7, #12]
8006d6e: 2201 movs r2, #1
8006d70: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006d72: 78fb ldrb r3, [r7, #3]
8006d74: f003 0307 and.w r3, r3, #7
8006d78: b2da uxtb r2, r3
8006d7a: 68fb ldr r3, [r7, #12]
8006d7c: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006d7e: 687b ldr r3, [r7, #4]
8006d80: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006d84: 2b01 cmp r3, #1
8006d86: d101 bne.n 8006d8c <HAL_PCD_EP_SetStall+0x7e>
8006d88: 2302 movs r3, #2
8006d8a: e01c b.n 8006dc6 <HAL_PCD_EP_SetStall+0xb8>
8006d8c: 687b ldr r3, [r7, #4]
8006d8e: 2201 movs r2, #1
8006d90: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8006d94: 687b ldr r3, [r7, #4]
8006d96: 681b ldr r3, [r3, #0]
8006d98: 68f9 ldr r1, [r7, #12]
8006d9a: 4618 mov r0, r3
8006d9c: f005 f8a1 bl 800bee2 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8006da0: 78fb ldrb r3, [r7, #3]
8006da2: f003 0307 and.w r3, r3, #7
8006da6: 2b00 cmp r3, #0
8006da8: d108 bne.n 8006dbc <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
8006daa: 687b ldr r3, [r7, #4]
8006dac: 681a ldr r2, [r3, #0]
8006dae: 687b ldr r3, [r7, #4]
8006db0: f503 7326 add.w r3, r3, #664 @ 0x298
8006db4: 4619 mov r1, r3
8006db6: 4610 mov r0, r2
8006db8: f005 f9c6 bl 800c148 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8006dbc: 687b ldr r3, [r7, #4]
8006dbe: 2200 movs r2, #0
8006dc0: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006dc4: 2300 movs r3, #0
}
8006dc6: 4618 mov r0, r3
8006dc8: 3710 adds r7, #16
8006dca: 46bd mov sp, r7
8006dcc: bd80 pop {r7, pc}
08006dce <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006dce: b580 push {r7, lr}
8006dd0: b084 sub sp, #16
8006dd2: af00 add r7, sp, #0
8006dd4: 6078 str r0, [r7, #4]
8006dd6: 460b mov r3, r1
8006dd8: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8006dda: 78fb ldrb r3, [r7, #3]
8006ddc: f003 030f and.w r3, r3, #15
8006de0: 687a ldr r2, [r7, #4]
8006de2: 7912 ldrb r2, [r2, #4]
8006de4: 4293 cmp r3, r2
8006de6: d901 bls.n 8006dec <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8006de8: 2301 movs r3, #1
8006dea: e040 b.n 8006e6e <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8006dec: f997 3003 ldrsb.w r3, [r7, #3]
8006df0: 2b00 cmp r3, #0
8006df2: da0e bge.n 8006e12 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006df4: 78fb ldrb r3, [r7, #3]
8006df6: f003 0207 and.w r2, r3, #7
8006dfa: 4613 mov r3, r2
8006dfc: 009b lsls r3, r3, #2
8006dfe: 4413 add r3, r2
8006e00: 00db lsls r3, r3, #3
8006e02: 3310 adds r3, #16
8006e04: 687a ldr r2, [r7, #4]
8006e06: 4413 add r3, r2
8006e08: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006e0a: 68fb ldr r3, [r7, #12]
8006e0c: 2201 movs r2, #1
8006e0e: 705a strb r2, [r3, #1]
8006e10: e00e b.n 8006e30 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006e12: 78fb ldrb r3, [r7, #3]
8006e14: f003 0207 and.w r2, r3, #7
8006e18: 4613 mov r3, r2
8006e1a: 009b lsls r3, r3, #2
8006e1c: 4413 add r3, r2
8006e1e: 00db lsls r3, r3, #3
8006e20: f503 73a8 add.w r3, r3, #336 @ 0x150
8006e24: 687a ldr r2, [r7, #4]
8006e26: 4413 add r3, r2
8006e28: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006e2a: 68fb ldr r3, [r7, #12]
8006e2c: 2200 movs r2, #0
8006e2e: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8006e30: 68fb ldr r3, [r7, #12]
8006e32: 2200 movs r2, #0
8006e34: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006e36: 78fb ldrb r3, [r7, #3]
8006e38: f003 0307 and.w r3, r3, #7
8006e3c: b2da uxtb r2, r3
8006e3e: 68fb ldr r3, [r7, #12]
8006e40: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006e42: 687b ldr r3, [r7, #4]
8006e44: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006e48: 2b01 cmp r3, #1
8006e4a: d101 bne.n 8006e50 <HAL_PCD_EP_ClrStall+0x82>
8006e4c: 2302 movs r3, #2
8006e4e: e00e b.n 8006e6e <HAL_PCD_EP_ClrStall+0xa0>
8006e50: 687b ldr r3, [r7, #4]
8006e52: 2201 movs r2, #1
8006e54: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
8006e58: 687b ldr r3, [r7, #4]
8006e5a: 681b ldr r3, [r3, #0]
8006e5c: 68f9 ldr r1, [r7, #12]
8006e5e: 4618 mov r0, r3
8006e60: f005 f88f bl 800bf82 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8006e64: 687b ldr r3, [r7, #4]
8006e66: 2200 movs r2, #0
8006e68: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006e6c: 2300 movs r3, #0
}
8006e6e: 4618 mov r0, r3
8006e70: 3710 adds r7, #16
8006e72: 46bd mov sp, r7
8006e74: bd80 pop {r7, pc}
08006e76 <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
8006e76: b580 push {r7, lr}
8006e78: b096 sub sp, #88 @ 0x58
8006e7a: af00 add r7, sp, #0
8006e7c: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8006e7e: e3bb b.n 80075f8 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8006e80: 687b ldr r3, [r7, #4]
8006e82: 681b ldr r3, [r3, #0]
8006e84: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006e88: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
8006e8c: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006e90: b2db uxtb r3, r3
8006e92: f003 030f and.w r3, r3, #15
8006e96: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
8006e9a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006e9e: 2b00 cmp r3, #0
8006ea0: f040 8175 bne.w 800718e <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8006ea4: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006ea8: f003 0310 and.w r3, r3, #16
8006eac: 2b00 cmp r3, #0
8006eae: d14e bne.n 8006f4e <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006eb0: 687b ldr r3, [r7, #4]
8006eb2: 681b ldr r3, [r3, #0]
8006eb4: 881b ldrh r3, [r3, #0]
8006eb6: b29b uxth r3, r3
8006eb8: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8006ebc: f023 0370 bic.w r3, r3, #112 @ 0x70
8006ec0: 81fb strh r3, [r7, #14]
8006ec2: 687b ldr r3, [r7, #4]
8006ec4: 681a ldr r2, [r3, #0]
8006ec6: 89fb ldrh r3, [r7, #14]
8006ec8: ea6f 4343 mvn.w r3, r3, lsl #17
8006ecc: ea6f 4353 mvn.w r3, r3, lsr #17
8006ed0: b29b uxth r3, r3
8006ed2: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
8006ed4: 687b ldr r3, [r7, #4]
8006ed6: 3310 adds r3, #16
8006ed8: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8006eda: 687b ldr r3, [r7, #4]
8006edc: 681b ldr r3, [r3, #0]
8006ede: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006ee2: b29b uxth r3, r3
8006ee4: 461a mov r2, r3
8006ee6: 6d7b ldr r3, [r7, #84] @ 0x54
8006ee8: 781b ldrb r3, [r3, #0]
8006eea: 00db lsls r3, r3, #3
8006eec: 4413 add r3, r2
8006eee: 3302 adds r3, #2
8006ef0: 005b lsls r3, r3, #1
8006ef2: 687a ldr r2, [r7, #4]
8006ef4: 6812 ldr r2, [r2, #0]
8006ef6: 4413 add r3, r2
8006ef8: f503 6380 add.w r3, r3, #1024 @ 0x400
8006efc: 881b ldrh r3, [r3, #0]
8006efe: f3c3 0209 ubfx r2, r3, #0, #10
8006f02: 6d7b ldr r3, [r7, #84] @ 0x54
8006f04: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
8006f06: 6d7b ldr r3, [r7, #84] @ 0x54
8006f08: 695a ldr r2, [r3, #20]
8006f0a: 6d7b ldr r3, [r7, #84] @ 0x54
8006f0c: 69db ldr r3, [r3, #28]
8006f0e: 441a add r2, r3
8006f10: 6d7b ldr r3, [r7, #84] @ 0x54
8006f12: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
8006f14: 2100 movs r1, #0
8006f16: 6878 ldr r0, [r7, #4]
8006f18: f006 ffe5 bl 800dee6 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
8006f1c: 687b ldr r3, [r7, #4]
8006f1e: 7b5b ldrb r3, [r3, #13]
8006f20: b2db uxtb r3, r3
8006f22: 2b00 cmp r3, #0
8006f24: f000 8368 beq.w 80075f8 <PCD_EP_ISR_Handler+0x782>
8006f28: 6d7b ldr r3, [r7, #84] @ 0x54
8006f2a: 699b ldr r3, [r3, #24]
8006f2c: 2b00 cmp r3, #0
8006f2e: f040 8363 bne.w 80075f8 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8006f32: 687b ldr r3, [r7, #4]
8006f34: 7b5b ldrb r3, [r3, #13]
8006f36: b2db uxtb r3, r3
8006f38: f063 037f orn r3, r3, #127 @ 0x7f
8006f3c: b2da uxtb r2, r3
8006f3e: 687b ldr r3, [r7, #4]
8006f40: 681b ldr r3, [r3, #0]
8006f42: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
8006f46: 687b ldr r3, [r7, #4]
8006f48: 2200 movs r2, #0
8006f4a: 735a strb r2, [r3, #13]
8006f4c: e354 b.n 80075f8 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
8006f4e: 687b ldr r3, [r7, #4]
8006f50: f503 73a8 add.w r3, r3, #336 @ 0x150
8006f54: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8006f56: 687b ldr r3, [r7, #4]
8006f58: 681b ldr r3, [r3, #0]
8006f5a: 881b ldrh r3, [r3, #0]
8006f5c: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
8006f60: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006f64: f403 6300 and.w r3, r3, #2048 @ 0x800
8006f68: 2b00 cmp r3, #0
8006f6a: d034 beq.n 8006fd6 <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8006f6c: 687b ldr r3, [r7, #4]
8006f6e: 681b ldr r3, [r3, #0]
8006f70: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006f74: b29b uxth r3, r3
8006f76: 461a mov r2, r3
8006f78: 6d7b ldr r3, [r7, #84] @ 0x54
8006f7a: 781b ldrb r3, [r3, #0]
8006f7c: 00db lsls r3, r3, #3
8006f7e: 4413 add r3, r2
8006f80: 3306 adds r3, #6
8006f82: 005b lsls r3, r3, #1
8006f84: 687a ldr r2, [r7, #4]
8006f86: 6812 ldr r2, [r2, #0]
8006f88: 4413 add r3, r2
8006f8a: f503 6380 add.w r3, r3, #1024 @ 0x400
8006f8e: 881b ldrh r3, [r3, #0]
8006f90: f3c3 0209 ubfx r2, r3, #0, #10
8006f94: 6d7b ldr r3, [r7, #84] @ 0x54
8006f96: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8006f98: 687b ldr r3, [r7, #4]
8006f9a: 6818 ldr r0, [r3, #0]
8006f9c: 687b ldr r3, [r7, #4]
8006f9e: f503 7126 add.w r1, r3, #664 @ 0x298
8006fa2: 6d7b ldr r3, [r7, #84] @ 0x54
8006fa4: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8006fa6: 6d7b ldr r3, [r7, #84] @ 0x54
8006fa8: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8006faa: b29b uxth r3, r3
8006fac: f005 f91d bl 800c1ea <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006fb0: 687b ldr r3, [r7, #4]
8006fb2: 681b ldr r3, [r3, #0]
8006fb4: 881b ldrh r3, [r3, #0]
8006fb6: b29a uxth r2, r3
8006fb8: f640 738f movw r3, #3983 @ 0xf8f
8006fbc: 4013 ands r3, r2
8006fbe: 823b strh r3, [r7, #16]
8006fc0: 687b ldr r3, [r7, #4]
8006fc2: 681b ldr r3, [r3, #0]
8006fc4: 8a3a ldrh r2, [r7, #16]
8006fc6: f042 0280 orr.w r2, r2, #128 @ 0x80
8006fca: b292 uxth r2, r2
8006fcc: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8006fce: 6878 ldr r0, [r7, #4]
8006fd0: f006 ff5c bl 800de8c <HAL_PCD_SetupStageCallback>
8006fd4: e310 b.n 80075f8 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
8006fd6: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8006fda: 2b00 cmp r3, #0
8006fdc: f280 830c bge.w 80075f8 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006fe0: 687b ldr r3, [r7, #4]
8006fe2: 681b ldr r3, [r3, #0]
8006fe4: 881b ldrh r3, [r3, #0]
8006fe6: b29a uxth r2, r3
8006fe8: f640 738f movw r3, #3983 @ 0xf8f
8006fec: 4013 ands r3, r2
8006fee: 83fb strh r3, [r7, #30]
8006ff0: 687b ldr r3, [r7, #4]
8006ff2: 681b ldr r3, [r3, #0]
8006ff4: 8bfa ldrh r2, [r7, #30]
8006ff6: f042 0280 orr.w r2, r2, #128 @ 0x80
8006ffa: b292 uxth r2, r2
8006ffc: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8006ffe: 687b ldr r3, [r7, #4]
8007000: 681b ldr r3, [r3, #0]
8007002: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007006: b29b uxth r3, r3
8007008: 461a mov r2, r3
800700a: 6d7b ldr r3, [r7, #84] @ 0x54
800700c: 781b ldrb r3, [r3, #0]
800700e: 00db lsls r3, r3, #3
8007010: 4413 add r3, r2
8007012: 3306 adds r3, #6
8007014: 005b lsls r3, r3, #1
8007016: 687a ldr r2, [r7, #4]
8007018: 6812 ldr r2, [r2, #0]
800701a: 4413 add r3, r2
800701c: f503 6380 add.w r3, r3, #1024 @ 0x400
8007020: 881b ldrh r3, [r3, #0]
8007022: f3c3 0209 ubfx r2, r3, #0, #10
8007026: 6d7b ldr r3, [r7, #84] @ 0x54
8007028: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
800702a: 6d7b ldr r3, [r7, #84] @ 0x54
800702c: 69db ldr r3, [r3, #28]
800702e: 2b00 cmp r3, #0
8007030: d019 beq.n 8007066 <PCD_EP_ISR_Handler+0x1f0>
8007032: 6d7b ldr r3, [r7, #84] @ 0x54
8007034: 695b ldr r3, [r3, #20]
8007036: 2b00 cmp r3, #0
8007038: d015 beq.n 8007066 <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
800703a: 687b ldr r3, [r7, #4]
800703c: 6818 ldr r0, [r3, #0]
800703e: 6d7b ldr r3, [r7, #84] @ 0x54
8007040: 6959 ldr r1, [r3, #20]
8007042: 6d7b ldr r3, [r7, #84] @ 0x54
8007044: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8007046: 6d7b ldr r3, [r7, #84] @ 0x54
8007048: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
800704a: b29b uxth r3, r3
800704c: f005 f8cd bl 800c1ea <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
8007050: 6d7b ldr r3, [r7, #84] @ 0x54
8007052: 695a ldr r2, [r3, #20]
8007054: 6d7b ldr r3, [r7, #84] @ 0x54
8007056: 69db ldr r3, [r3, #28]
8007058: 441a add r2, r3
800705a: 6d7b ldr r3, [r7, #84] @ 0x54
800705c: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
800705e: 2100 movs r1, #0
8007060: 6878 ldr r0, [r7, #4]
8007062: f006 ff25 bl 800deb0 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8007066: 687b ldr r3, [r7, #4]
8007068: 681b ldr r3, [r3, #0]
800706a: 881b ldrh r3, [r3, #0]
800706c: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8007070: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007074: f403 6300 and.w r3, r3, #2048 @ 0x800
8007078: 2b00 cmp r3, #0
800707a: f040 82bd bne.w 80075f8 <PCD_EP_ISR_Handler+0x782>
800707e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007082: f403 5340 and.w r3, r3, #12288 @ 0x3000
8007086: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
800708a: f000 82b5 beq.w 80075f8 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
800708e: 687b ldr r3, [r7, #4]
8007090: 681b ldr r3, [r3, #0]
8007092: 61bb str r3, [r7, #24]
8007094: 687b ldr r3, [r7, #4]
8007096: 681b ldr r3, [r3, #0]
8007098: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800709c: b29b uxth r3, r3
800709e: 461a mov r2, r3
80070a0: 69bb ldr r3, [r7, #24]
80070a2: 4413 add r3, r2
80070a4: 61bb str r3, [r7, #24]
80070a6: 69bb ldr r3, [r7, #24]
80070a8: f203 430c addw r3, r3, #1036 @ 0x40c
80070ac: 617b str r3, [r7, #20]
80070ae: 697b ldr r3, [r7, #20]
80070b0: 881b ldrh r3, [r3, #0]
80070b2: b29b uxth r3, r3
80070b4: f3c3 0309 ubfx r3, r3, #0, #10
80070b8: b29a uxth r2, r3
80070ba: 697b ldr r3, [r7, #20]
80070bc: 801a strh r2, [r3, #0]
80070be: 6d7b ldr r3, [r7, #84] @ 0x54
80070c0: 691b ldr r3, [r3, #16]
80070c2: 2b3e cmp r3, #62 @ 0x3e
80070c4: d91d bls.n 8007102 <PCD_EP_ISR_Handler+0x28c>
80070c6: 6d7b ldr r3, [r7, #84] @ 0x54
80070c8: 691b ldr r3, [r3, #16]
80070ca: 095b lsrs r3, r3, #5
80070cc: 647b str r3, [r7, #68] @ 0x44
80070ce: 6d7b ldr r3, [r7, #84] @ 0x54
80070d0: 691b ldr r3, [r3, #16]
80070d2: f003 031f and.w r3, r3, #31
80070d6: 2b00 cmp r3, #0
80070d8: d102 bne.n 80070e0 <PCD_EP_ISR_Handler+0x26a>
80070da: 6c7b ldr r3, [r7, #68] @ 0x44
80070dc: 3b01 subs r3, #1
80070de: 647b str r3, [r7, #68] @ 0x44
80070e0: 697b ldr r3, [r7, #20]
80070e2: 881b ldrh r3, [r3, #0]
80070e4: b29a uxth r2, r3
80070e6: 6c7b ldr r3, [r7, #68] @ 0x44
80070e8: b29b uxth r3, r3
80070ea: 029b lsls r3, r3, #10
80070ec: b29b uxth r3, r3
80070ee: 4313 orrs r3, r2
80070f0: b29b uxth r3, r3
80070f2: ea6f 4343 mvn.w r3, r3, lsl #17
80070f6: ea6f 4353 mvn.w r3, r3, lsr #17
80070fa: b29a uxth r2, r3
80070fc: 697b ldr r3, [r7, #20]
80070fe: 801a strh r2, [r3, #0]
8007100: e026 b.n 8007150 <PCD_EP_ISR_Handler+0x2da>
8007102: 6d7b ldr r3, [r7, #84] @ 0x54
8007104: 691b ldr r3, [r3, #16]
8007106: 2b00 cmp r3, #0
8007108: d10a bne.n 8007120 <PCD_EP_ISR_Handler+0x2aa>
800710a: 697b ldr r3, [r7, #20]
800710c: 881b ldrh r3, [r3, #0]
800710e: b29b uxth r3, r3
8007110: ea6f 4343 mvn.w r3, r3, lsl #17
8007114: ea6f 4353 mvn.w r3, r3, lsr #17
8007118: b29a uxth r2, r3
800711a: 697b ldr r3, [r7, #20]
800711c: 801a strh r2, [r3, #0]
800711e: e017 b.n 8007150 <PCD_EP_ISR_Handler+0x2da>
8007120: 6d7b ldr r3, [r7, #84] @ 0x54
8007122: 691b ldr r3, [r3, #16]
8007124: 085b lsrs r3, r3, #1
8007126: 647b str r3, [r7, #68] @ 0x44
8007128: 6d7b ldr r3, [r7, #84] @ 0x54
800712a: 691b ldr r3, [r3, #16]
800712c: f003 0301 and.w r3, r3, #1
8007130: 2b00 cmp r3, #0
8007132: d002 beq.n 800713a <PCD_EP_ISR_Handler+0x2c4>
8007134: 6c7b ldr r3, [r7, #68] @ 0x44
8007136: 3301 adds r3, #1
8007138: 647b str r3, [r7, #68] @ 0x44
800713a: 697b ldr r3, [r7, #20]
800713c: 881b ldrh r3, [r3, #0]
800713e: b29a uxth r2, r3
8007140: 6c7b ldr r3, [r7, #68] @ 0x44
8007142: b29b uxth r3, r3
8007144: 029b lsls r3, r3, #10
8007146: b29b uxth r3, r3
8007148: 4313 orrs r3, r2
800714a: b29a uxth r2, r3
800714c: 697b ldr r3, [r7, #20]
800714e: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8007150: 687b ldr r3, [r7, #4]
8007152: 681b ldr r3, [r3, #0]
8007154: 881b ldrh r3, [r3, #0]
8007156: b29b uxth r3, r3
8007158: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800715c: f023 0370 bic.w r3, r3, #112 @ 0x70
8007160: 827b strh r3, [r7, #18]
8007162: 8a7b ldrh r3, [r7, #18]
8007164: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8007168: 827b strh r3, [r7, #18]
800716a: 8a7b ldrh r3, [r7, #18]
800716c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8007170: 827b strh r3, [r7, #18]
8007172: 687b ldr r3, [r7, #4]
8007174: 681a ldr r2, [r3, #0]
8007176: 8a7b ldrh r3, [r7, #18]
8007178: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800717c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007180: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007184: f043 0380 orr.w r3, r3, #128 @ 0x80
8007188: b29b uxth r3, r3
800718a: 8013 strh r3, [r2, #0]
800718c: e234 b.n 80075f8 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
800718e: 687b ldr r3, [r7, #4]
8007190: 681b ldr r3, [r3, #0]
8007192: 461a mov r2, r3
8007194: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8007198: 009b lsls r3, r3, #2
800719a: 4413 add r3, r2
800719c: 881b ldrh r3, [r3, #0]
800719e: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
80071a2: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
80071a6: 2b00 cmp r3, #0
80071a8: f280 80fc bge.w 80073a4 <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
80071ac: 687b ldr r3, [r7, #4]
80071ae: 681b ldr r3, [r3, #0]
80071b0: 461a mov r2, r3
80071b2: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80071b6: 009b lsls r3, r3, #2
80071b8: 4413 add r3, r2
80071ba: 881b ldrh r3, [r3, #0]
80071bc: b29a uxth r2, r3
80071be: f640 738f movw r3, #3983 @ 0xf8f
80071c2: 4013 ands r3, r2
80071c4: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80071c8: 687b ldr r3, [r7, #4]
80071ca: 681b ldr r3, [r3, #0]
80071cc: 461a mov r2, r3
80071ce: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80071d2: 009b lsls r3, r3, #2
80071d4: 4413 add r3, r2
80071d6: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
80071da: f042 0280 orr.w r2, r2, #128 @ 0x80
80071de: b292 uxth r2, r2
80071e0: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
80071e2: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80071e6: 4613 mov r3, r2
80071e8: 009b lsls r3, r3, #2
80071ea: 4413 add r3, r2
80071ec: 00db lsls r3, r3, #3
80071ee: f503 73a8 add.w r3, r3, #336 @ 0x150
80071f2: 687a ldr r2, [r7, #4]
80071f4: 4413 add r3, r2
80071f6: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
80071f8: 6d7b ldr r3, [r7, #84] @ 0x54
80071fa: 7b1b ldrb r3, [r3, #12]
80071fc: 2b00 cmp r3, #0
80071fe: d125 bne.n 800724c <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8007200: 687b ldr r3, [r7, #4]
8007202: 681b ldr r3, [r3, #0]
8007204: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007208: b29b uxth r3, r3
800720a: 461a mov r2, r3
800720c: 6d7b ldr r3, [r7, #84] @ 0x54
800720e: 781b ldrb r3, [r3, #0]
8007210: 00db lsls r3, r3, #3
8007212: 4413 add r3, r2
8007214: 3306 adds r3, #6
8007216: 005b lsls r3, r3, #1
8007218: 687a ldr r2, [r7, #4]
800721a: 6812 ldr r2, [r2, #0]
800721c: 4413 add r3, r2
800721e: f503 6380 add.w r3, r3, #1024 @ 0x400
8007222: 881b ldrh r3, [r3, #0]
8007224: f3c3 0309 ubfx r3, r3, #0, #10
8007228: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800722c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007230: 2b00 cmp r3, #0
8007232: f000 8092 beq.w 800735a <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
8007236: 687b ldr r3, [r7, #4]
8007238: 6818 ldr r0, [r3, #0]
800723a: 6d7b ldr r3, [r7, #84] @ 0x54
800723c: 6959 ldr r1, [r3, #20]
800723e: 6d7b ldr r3, [r7, #84] @ 0x54
8007240: 88da ldrh r2, [r3, #6]
8007242: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007246: f004 ffd0 bl 800c1ea <USB_ReadPMA>
800724a: e086 b.n 800735a <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
800724c: 6d7b ldr r3, [r7, #84] @ 0x54
800724e: 78db ldrb r3, [r3, #3]
8007250: 2b02 cmp r3, #2
8007252: d10a bne.n 800726a <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
8007254: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007258: 461a mov r2, r3
800725a: 6d79 ldr r1, [r7, #84] @ 0x54
800725c: 6878 ldr r0, [r7, #4]
800725e: f000 f9d9 bl 8007614 <HAL_PCD_EP_DB_Receive>
8007262: 4603 mov r3, r0
8007264: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
8007268: e077 b.n 800735a <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
800726a: 687b ldr r3, [r7, #4]
800726c: 681b ldr r3, [r3, #0]
800726e: 461a mov r2, r3
8007270: 6d7b ldr r3, [r7, #84] @ 0x54
8007272: 781b ldrb r3, [r3, #0]
8007274: 009b lsls r3, r3, #2
8007276: 4413 add r3, r2
8007278: 881b ldrh r3, [r3, #0]
800727a: b29b uxth r3, r3
800727c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007280: f023 0370 bic.w r3, r3, #112 @ 0x70
8007284: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
8007288: 687b ldr r3, [r7, #4]
800728a: 681b ldr r3, [r3, #0]
800728c: 461a mov r2, r3
800728e: 6d7b ldr r3, [r7, #84] @ 0x54
8007290: 781b ldrb r3, [r3, #0]
8007292: 009b lsls r3, r3, #2
8007294: 441a add r2, r3
8007296: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
800729a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800729e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80072a2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80072a6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80072aa: b29b uxth r3, r3
80072ac: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
80072ae: 687b ldr r3, [r7, #4]
80072b0: 681b ldr r3, [r3, #0]
80072b2: 461a mov r2, r3
80072b4: 6d7b ldr r3, [r7, #84] @ 0x54
80072b6: 781b ldrb r3, [r3, #0]
80072b8: 009b lsls r3, r3, #2
80072ba: 4413 add r3, r2
80072bc: 881b ldrh r3, [r3, #0]
80072be: b29b uxth r3, r3
80072c0: f403 4380 and.w r3, r3, #16384 @ 0x4000
80072c4: 2b00 cmp r3, #0
80072c6: d024 beq.n 8007312 <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80072c8: 687b ldr r3, [r7, #4]
80072ca: 681b ldr r3, [r3, #0]
80072cc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80072d0: b29b uxth r3, r3
80072d2: 461a mov r2, r3
80072d4: 6d7b ldr r3, [r7, #84] @ 0x54
80072d6: 781b ldrb r3, [r3, #0]
80072d8: 00db lsls r3, r3, #3
80072da: 4413 add r3, r2
80072dc: 3302 adds r3, #2
80072de: 005b lsls r3, r3, #1
80072e0: 687a ldr r2, [r7, #4]
80072e2: 6812 ldr r2, [r2, #0]
80072e4: 4413 add r3, r2
80072e6: f503 6380 add.w r3, r3, #1024 @ 0x400
80072ea: 881b ldrh r3, [r3, #0]
80072ec: f3c3 0309 ubfx r3, r3, #0, #10
80072f0: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80072f4: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80072f8: 2b00 cmp r3, #0
80072fa: d02e beq.n 800735a <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
80072fc: 687b ldr r3, [r7, #4]
80072fe: 6818 ldr r0, [r3, #0]
8007300: 6d7b ldr r3, [r7, #84] @ 0x54
8007302: 6959 ldr r1, [r3, #20]
8007304: 6d7b ldr r3, [r7, #84] @ 0x54
8007306: 891a ldrh r2, [r3, #8]
8007308: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800730c: f004 ff6d bl 800c1ea <USB_ReadPMA>
8007310: e023 b.n 800735a <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8007312: 687b ldr r3, [r7, #4]
8007314: 681b ldr r3, [r3, #0]
8007316: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800731a: b29b uxth r3, r3
800731c: 461a mov r2, r3
800731e: 6d7b ldr r3, [r7, #84] @ 0x54
8007320: 781b ldrb r3, [r3, #0]
8007322: 00db lsls r3, r3, #3
8007324: 4413 add r3, r2
8007326: 3306 adds r3, #6
8007328: 005b lsls r3, r3, #1
800732a: 687a ldr r2, [r7, #4]
800732c: 6812 ldr r2, [r2, #0]
800732e: 4413 add r3, r2
8007330: f503 6380 add.w r3, r3, #1024 @ 0x400
8007334: 881b ldrh r3, [r3, #0]
8007336: f3c3 0309 ubfx r3, r3, #0, #10
800733a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
800733e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007342: 2b00 cmp r3, #0
8007344: d009 beq.n 800735a <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8007346: 687b ldr r3, [r7, #4]
8007348: 6818 ldr r0, [r3, #0]
800734a: 6d7b ldr r3, [r7, #84] @ 0x54
800734c: 6959 ldr r1, [r3, #20]
800734e: 6d7b ldr r3, [r7, #84] @ 0x54
8007350: 895a ldrh r2, [r3, #10]
8007352: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007356: f004 ff48 bl 800c1ea <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
800735a: 6d7b ldr r3, [r7, #84] @ 0x54
800735c: 69da ldr r2, [r3, #28]
800735e: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007362: 441a add r2, r3
8007364: 6d7b ldr r3, [r7, #84] @ 0x54
8007366: 61da str r2, [r3, #28]
ep->xfer_buff += count;
8007368: 6d7b ldr r3, [r7, #84] @ 0x54
800736a: 695a ldr r2, [r3, #20]
800736c: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007370: 441a add r2, r3
8007372: 6d7b ldr r3, [r7, #84] @ 0x54
8007374: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
8007376: 6d7b ldr r3, [r7, #84] @ 0x54
8007378: 699b ldr r3, [r3, #24]
800737a: 2b00 cmp r3, #0
800737c: d005 beq.n 800738a <PCD_EP_ISR_Handler+0x514>
800737e: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
8007382: 6d7b ldr r3, [r7, #84] @ 0x54
8007384: 691b ldr r3, [r3, #16]
8007386: 429a cmp r2, r3
8007388: d206 bcs.n 8007398 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
800738a: 6d7b ldr r3, [r7, #84] @ 0x54
800738c: 781b ldrb r3, [r3, #0]
800738e: 4619 mov r1, r3
8007390: 6878 ldr r0, [r7, #4]
8007392: f006 fd8d bl 800deb0 <HAL_PCD_DataOutStageCallback>
8007396: e005 b.n 80073a4 <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8007398: 687b ldr r3, [r7, #4]
800739a: 681b ldr r3, [r3, #0]
800739c: 6d79 ldr r1, [r7, #84] @ 0x54
800739e: 4618 mov r0, r3
80073a0: f003 f9ee bl 800a780 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
80073a4: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80073a8: f003 0380 and.w r3, r3, #128 @ 0x80
80073ac: 2b00 cmp r3, #0
80073ae: f000 8123 beq.w 80075f8 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
80073b2: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80073b6: 4613 mov r3, r2
80073b8: 009b lsls r3, r3, #2
80073ba: 4413 add r3, r2
80073bc: 00db lsls r3, r3, #3
80073be: 3310 adds r3, #16
80073c0: 687a ldr r2, [r7, #4]
80073c2: 4413 add r3, r2
80073c4: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
80073c6: 687b ldr r3, [r7, #4]
80073c8: 681b ldr r3, [r3, #0]
80073ca: 461a mov r2, r3
80073cc: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80073d0: 009b lsls r3, r3, #2
80073d2: 4413 add r3, r2
80073d4: 881b ldrh r3, [r3, #0]
80073d6: b29b uxth r3, r3
80073d8: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
80073dc: f023 0370 bic.w r3, r3, #112 @ 0x70
80073e0: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80073e4: 687b ldr r3, [r7, #4]
80073e6: 681b ldr r3, [r3, #0]
80073e8: 461a mov r2, r3
80073ea: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80073ee: 009b lsls r3, r3, #2
80073f0: 441a add r2, r3
80073f2: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
80073f6: ea6f 4343 mvn.w r3, r3, lsl #17
80073fa: ea6f 4353 mvn.w r3, r3, lsr #17
80073fe: b29b uxth r3, r3
8007400: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
8007402: 6d7b ldr r3, [r7, #84] @ 0x54
8007404: 78db ldrb r3, [r3, #3]
8007406: 2b01 cmp r3, #1
8007408: f040 80a2 bne.w 8007550 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
800740c: 6d7b ldr r3, [r7, #84] @ 0x54
800740e: 2200 movs r2, #0
8007410: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
8007412: 6d7b ldr r3, [r7, #84] @ 0x54
8007414: 7b1b ldrb r3, [r3, #12]
8007416: 2b00 cmp r3, #0
8007418: f000 8093 beq.w 8007542 <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
800741c: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007420: f003 0340 and.w r3, r3, #64 @ 0x40
8007424: 2b00 cmp r3, #0
8007426: d046 beq.n 80074b6 <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007428: 6d7b ldr r3, [r7, #84] @ 0x54
800742a: 785b ldrb r3, [r3, #1]
800742c: 2b00 cmp r3, #0
800742e: d126 bne.n 800747e <PCD_EP_ISR_Handler+0x608>
8007430: 687b ldr r3, [r7, #4]
8007432: 681b ldr r3, [r3, #0]
8007434: 627b str r3, [r7, #36] @ 0x24
8007436: 687b ldr r3, [r7, #4]
8007438: 681b ldr r3, [r3, #0]
800743a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800743e: b29b uxth r3, r3
8007440: 461a mov r2, r3
8007442: 6a7b ldr r3, [r7, #36] @ 0x24
8007444: 4413 add r3, r2
8007446: 627b str r3, [r7, #36] @ 0x24
8007448: 6d7b ldr r3, [r7, #84] @ 0x54
800744a: 781b ldrb r3, [r3, #0]
800744c: 011a lsls r2, r3, #4
800744e: 6a7b ldr r3, [r7, #36] @ 0x24
8007450: 4413 add r3, r2
8007452: f203 4304 addw r3, r3, #1028 @ 0x404
8007456: 623b str r3, [r7, #32]
8007458: 6a3b ldr r3, [r7, #32]
800745a: 881b ldrh r3, [r3, #0]
800745c: b29b uxth r3, r3
800745e: f3c3 0309 ubfx r3, r3, #0, #10
8007462: b29a uxth r2, r3
8007464: 6a3b ldr r3, [r7, #32]
8007466: 801a strh r2, [r3, #0]
8007468: 6a3b ldr r3, [r7, #32]
800746a: 881b ldrh r3, [r3, #0]
800746c: b29b uxth r3, r3
800746e: ea6f 4343 mvn.w r3, r3, lsl #17
8007472: ea6f 4353 mvn.w r3, r3, lsr #17
8007476: b29a uxth r2, r3
8007478: 6a3b ldr r3, [r7, #32]
800747a: 801a strh r2, [r3, #0]
800747c: e061 b.n 8007542 <PCD_EP_ISR_Handler+0x6cc>
800747e: 6d7b ldr r3, [r7, #84] @ 0x54
8007480: 785b ldrb r3, [r3, #1]
8007482: 2b01 cmp r3, #1
8007484: d15d bne.n 8007542 <PCD_EP_ISR_Handler+0x6cc>
8007486: 687b ldr r3, [r7, #4]
8007488: 681b ldr r3, [r3, #0]
800748a: 62fb str r3, [r7, #44] @ 0x2c
800748c: 687b ldr r3, [r7, #4]
800748e: 681b ldr r3, [r3, #0]
8007490: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007494: b29b uxth r3, r3
8007496: 461a mov r2, r3
8007498: 6afb ldr r3, [r7, #44] @ 0x2c
800749a: 4413 add r3, r2
800749c: 62fb str r3, [r7, #44] @ 0x2c
800749e: 6d7b ldr r3, [r7, #84] @ 0x54
80074a0: 781b ldrb r3, [r3, #0]
80074a2: 011a lsls r2, r3, #4
80074a4: 6afb ldr r3, [r7, #44] @ 0x2c
80074a6: 4413 add r3, r2
80074a8: f203 4304 addw r3, r3, #1028 @ 0x404
80074ac: 62bb str r3, [r7, #40] @ 0x28
80074ae: 6abb ldr r3, [r7, #40] @ 0x28
80074b0: 2200 movs r2, #0
80074b2: 801a strh r2, [r3, #0]
80074b4: e045 b.n 8007542 <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80074b6: 687b ldr r3, [r7, #4]
80074b8: 681b ldr r3, [r3, #0]
80074ba: 63fb str r3, [r7, #60] @ 0x3c
80074bc: 6d7b ldr r3, [r7, #84] @ 0x54
80074be: 785b ldrb r3, [r3, #1]
80074c0: 2b00 cmp r3, #0
80074c2: d126 bne.n 8007512 <PCD_EP_ISR_Handler+0x69c>
80074c4: 687b ldr r3, [r7, #4]
80074c6: 681b ldr r3, [r3, #0]
80074c8: 637b str r3, [r7, #52] @ 0x34
80074ca: 687b ldr r3, [r7, #4]
80074cc: 681b ldr r3, [r3, #0]
80074ce: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80074d2: b29b uxth r3, r3
80074d4: 461a mov r2, r3
80074d6: 6b7b ldr r3, [r7, #52] @ 0x34
80074d8: 4413 add r3, r2
80074da: 637b str r3, [r7, #52] @ 0x34
80074dc: 6d7b ldr r3, [r7, #84] @ 0x54
80074de: 781b ldrb r3, [r3, #0]
80074e0: 011a lsls r2, r3, #4
80074e2: 6b7b ldr r3, [r7, #52] @ 0x34
80074e4: 4413 add r3, r2
80074e6: f203 430c addw r3, r3, #1036 @ 0x40c
80074ea: 633b str r3, [r7, #48] @ 0x30
80074ec: 6b3b ldr r3, [r7, #48] @ 0x30
80074ee: 881b ldrh r3, [r3, #0]
80074f0: b29b uxth r3, r3
80074f2: f3c3 0309 ubfx r3, r3, #0, #10
80074f6: b29a uxth r2, r3
80074f8: 6b3b ldr r3, [r7, #48] @ 0x30
80074fa: 801a strh r2, [r3, #0]
80074fc: 6b3b ldr r3, [r7, #48] @ 0x30
80074fe: 881b ldrh r3, [r3, #0]
8007500: b29b uxth r3, r3
8007502: ea6f 4343 mvn.w r3, r3, lsl #17
8007506: ea6f 4353 mvn.w r3, r3, lsr #17
800750a: b29a uxth r2, r3
800750c: 6b3b ldr r3, [r7, #48] @ 0x30
800750e: 801a strh r2, [r3, #0]
8007510: e017 b.n 8007542 <PCD_EP_ISR_Handler+0x6cc>
8007512: 6d7b ldr r3, [r7, #84] @ 0x54
8007514: 785b ldrb r3, [r3, #1]
8007516: 2b01 cmp r3, #1
8007518: d113 bne.n 8007542 <PCD_EP_ISR_Handler+0x6cc>
800751a: 687b ldr r3, [r7, #4]
800751c: 681b ldr r3, [r3, #0]
800751e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007522: b29b uxth r3, r3
8007524: 461a mov r2, r3
8007526: 6bfb ldr r3, [r7, #60] @ 0x3c
8007528: 4413 add r3, r2
800752a: 63fb str r3, [r7, #60] @ 0x3c
800752c: 6d7b ldr r3, [r7, #84] @ 0x54
800752e: 781b ldrb r3, [r3, #0]
8007530: 011a lsls r2, r3, #4
8007532: 6bfb ldr r3, [r7, #60] @ 0x3c
8007534: 4413 add r3, r2
8007536: f203 430c addw r3, r3, #1036 @ 0x40c
800753a: 63bb str r3, [r7, #56] @ 0x38
800753c: 6bbb ldr r3, [r7, #56] @ 0x38
800753e: 2200 movs r2, #0
8007540: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007542: 6d7b ldr r3, [r7, #84] @ 0x54
8007544: 781b ldrb r3, [r3, #0]
8007546: 4619 mov r1, r3
8007548: 6878 ldr r0, [r7, #4]
800754a: f006 fccc bl 800dee6 <HAL_PCD_DataInStageCallback>
800754e: e053 b.n 80075f8 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
8007550: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007554: f403 7380 and.w r3, r3, #256 @ 0x100
8007558: 2b00 cmp r3, #0
800755a: d146 bne.n 80075ea <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
800755c: 687b ldr r3, [r7, #4]
800755e: 681b ldr r3, [r3, #0]
8007560: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007564: b29b uxth r3, r3
8007566: 461a mov r2, r3
8007568: 6d7b ldr r3, [r7, #84] @ 0x54
800756a: 781b ldrb r3, [r3, #0]
800756c: 00db lsls r3, r3, #3
800756e: 4413 add r3, r2
8007570: 3302 adds r3, #2
8007572: 005b lsls r3, r3, #1
8007574: 687a ldr r2, [r7, #4]
8007576: 6812 ldr r2, [r2, #0]
8007578: 4413 add r3, r2
800757a: f503 6380 add.w r3, r3, #1024 @ 0x400
800757e: 881b ldrh r3, [r3, #0]
8007580: f3c3 0309 ubfx r3, r3, #0, #10
8007584: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8007588: 6d7b ldr r3, [r7, #84] @ 0x54
800758a: 699a ldr r2, [r3, #24]
800758c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8007590: 429a cmp r2, r3
8007592: d907 bls.n 80075a4 <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
8007594: 6d7b ldr r3, [r7, #84] @ 0x54
8007596: 699a ldr r2, [r3, #24]
8007598: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
800759c: 1ad2 subs r2, r2, r3
800759e: 6d7b ldr r3, [r7, #84] @ 0x54
80075a0: 619a str r2, [r3, #24]
80075a2: e002 b.n 80075aa <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
80075a4: 6d7b ldr r3, [r7, #84] @ 0x54
80075a6: 2200 movs r2, #0
80075a8: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
80075aa: 6d7b ldr r3, [r7, #84] @ 0x54
80075ac: 699b ldr r3, [r3, #24]
80075ae: 2b00 cmp r3, #0
80075b0: d106 bne.n 80075c0 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80075b2: 6d7b ldr r3, [r7, #84] @ 0x54
80075b4: 781b ldrb r3, [r3, #0]
80075b6: 4619 mov r1, r3
80075b8: 6878 ldr r0, [r7, #4]
80075ba: f006 fc94 bl 800dee6 <HAL_PCD_DataInStageCallback>
80075be: e01b b.n 80075f8 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
80075c0: 6d7b ldr r3, [r7, #84] @ 0x54
80075c2: 695a ldr r2, [r3, #20]
80075c4: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80075c8: 441a add r2, r3
80075ca: 6d7b ldr r3, [r7, #84] @ 0x54
80075cc: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
80075ce: 6d7b ldr r3, [r7, #84] @ 0x54
80075d0: 69da ldr r2, [r3, #28]
80075d2: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
80075d6: 441a add r2, r3
80075d8: 6d7b ldr r3, [r7, #84] @ 0x54
80075da: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
80075dc: 687b ldr r3, [r7, #4]
80075de: 681b ldr r3, [r3, #0]
80075e0: 6d79 ldr r1, [r7, #84] @ 0x54
80075e2: 4618 mov r0, r3
80075e4: f003 f8cc bl 800a780 <USB_EPStartXfer>
80075e8: e006 b.n 80075f8 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
80075ea: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80075ee: 461a mov r2, r3
80075f0: 6d79 ldr r1, [r7, #84] @ 0x54
80075f2: 6878 ldr r0, [r7, #4]
80075f4: f000 f91b bl 800782e <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
80075f8: 687b ldr r3, [r7, #4]
80075fa: 681b ldr r3, [r3, #0]
80075fc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8007600: b29b uxth r3, r3
8007602: b21b sxth r3, r3
8007604: 2b00 cmp r3, #0
8007606: f6ff ac3b blt.w 8006e80 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
800760a: 2300 movs r3, #0
}
800760c: 4618 mov r0, r3
800760e: 3758 adds r7, #88 @ 0x58
8007610: 46bd mov sp, r7
8007612: bd80 pop {r7, pc}
08007614 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8007614: b580 push {r7, lr}
8007616: b088 sub sp, #32
8007618: af00 add r7, sp, #0
800761a: 60f8 str r0, [r7, #12]
800761c: 60b9 str r1, [r7, #8]
800761e: 4613 mov r3, r2
8007620: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007622: 88fb ldrh r3, [r7, #6]
8007624: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007628: 2b00 cmp r3, #0
800762a: d07e beq.n 800772a <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
800762c: 68fb ldr r3, [r7, #12]
800762e: 681b ldr r3, [r3, #0]
8007630: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007634: b29b uxth r3, r3
8007636: 461a mov r2, r3
8007638: 68bb ldr r3, [r7, #8]
800763a: 781b ldrb r3, [r3, #0]
800763c: 00db lsls r3, r3, #3
800763e: 4413 add r3, r2
8007640: 3302 adds r3, #2
8007642: 005b lsls r3, r3, #1
8007644: 68fa ldr r2, [r7, #12]
8007646: 6812 ldr r2, [r2, #0]
8007648: 4413 add r3, r2
800764a: f503 6380 add.w r3, r3, #1024 @ 0x400
800764e: 881b ldrh r3, [r3, #0]
8007650: f3c3 0309 ubfx r3, r3, #0, #10
8007654: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8007656: 68bb ldr r3, [r7, #8]
8007658: 699a ldr r2, [r3, #24]
800765a: 8b7b ldrh r3, [r7, #26]
800765c: 429a cmp r2, r3
800765e: d306 bcc.n 800766e <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8007660: 68bb ldr r3, [r7, #8]
8007662: 699a ldr r2, [r3, #24]
8007664: 8b7b ldrh r3, [r7, #26]
8007666: 1ad2 subs r2, r2, r3
8007668: 68bb ldr r3, [r7, #8]
800766a: 619a str r2, [r3, #24]
800766c: e002 b.n 8007674 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
800766e: 68bb ldr r3, [r7, #8]
8007670: 2200 movs r2, #0
8007672: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8007674: 68bb ldr r3, [r7, #8]
8007676: 699b ldr r3, [r3, #24]
8007678: 2b00 cmp r3, #0
800767a: d123 bne.n 80076c4 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
800767c: 68fb ldr r3, [r7, #12]
800767e: 681b ldr r3, [r3, #0]
8007680: 461a mov r2, r3
8007682: 68bb ldr r3, [r7, #8]
8007684: 781b ldrb r3, [r3, #0]
8007686: 009b lsls r3, r3, #2
8007688: 4413 add r3, r2
800768a: 881b ldrh r3, [r3, #0]
800768c: b29b uxth r3, r3
800768e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8007692: f023 0370 bic.w r3, r3, #112 @ 0x70
8007696: 833b strh r3, [r7, #24]
8007698: 8b3b ldrh r3, [r7, #24]
800769a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800769e: 833b strh r3, [r7, #24]
80076a0: 68fb ldr r3, [r7, #12]
80076a2: 681b ldr r3, [r3, #0]
80076a4: 461a mov r2, r3
80076a6: 68bb ldr r3, [r7, #8]
80076a8: 781b ldrb r3, [r3, #0]
80076aa: 009b lsls r3, r3, #2
80076ac: 441a add r2, r3
80076ae: 8b3b ldrh r3, [r7, #24]
80076b0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80076b4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80076b8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80076bc: f043 0380 orr.w r3, r3, #128 @ 0x80
80076c0: b29b uxth r3, r3
80076c2: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80076c4: 88fb ldrh r3, [r7, #6]
80076c6: f003 0340 and.w r3, r3, #64 @ 0x40
80076ca: 2b00 cmp r3, #0
80076cc: d01f beq.n 800770e <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
80076ce: 68fb ldr r3, [r7, #12]
80076d0: 681b ldr r3, [r3, #0]
80076d2: 461a mov r2, r3
80076d4: 68bb ldr r3, [r7, #8]
80076d6: 781b ldrb r3, [r3, #0]
80076d8: 009b lsls r3, r3, #2
80076da: 4413 add r3, r2
80076dc: 881b ldrh r3, [r3, #0]
80076de: b29b uxth r3, r3
80076e0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80076e4: f023 0370 bic.w r3, r3, #112 @ 0x70
80076e8: 82fb strh r3, [r7, #22]
80076ea: 68fb ldr r3, [r7, #12]
80076ec: 681b ldr r3, [r3, #0]
80076ee: 461a mov r2, r3
80076f0: 68bb ldr r3, [r7, #8]
80076f2: 781b ldrb r3, [r3, #0]
80076f4: 009b lsls r3, r3, #2
80076f6: 441a add r2, r3
80076f8: 8afb ldrh r3, [r7, #22]
80076fa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80076fe: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007702: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007706: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800770a: b29b uxth r3, r3
800770c: 8013 strh r3, [r2, #0]
}
if (count != 0U)
800770e: 8b7b ldrh r3, [r7, #26]
8007710: 2b00 cmp r3, #0
8007712: f000 8087 beq.w 8007824 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8007716: 68fb ldr r3, [r7, #12]
8007718: 6818 ldr r0, [r3, #0]
800771a: 68bb ldr r3, [r7, #8]
800771c: 6959 ldr r1, [r3, #20]
800771e: 68bb ldr r3, [r7, #8]
8007720: 891a ldrh r2, [r3, #8]
8007722: 8b7b ldrh r3, [r7, #26]
8007724: f004 fd61 bl 800c1ea <USB_ReadPMA>
8007728: e07c b.n 8007824 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800772a: 68fb ldr r3, [r7, #12]
800772c: 681b ldr r3, [r3, #0]
800772e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007732: b29b uxth r3, r3
8007734: 461a mov r2, r3
8007736: 68bb ldr r3, [r7, #8]
8007738: 781b ldrb r3, [r3, #0]
800773a: 00db lsls r3, r3, #3
800773c: 4413 add r3, r2
800773e: 3306 adds r3, #6
8007740: 005b lsls r3, r3, #1
8007742: 68fa ldr r2, [r7, #12]
8007744: 6812 ldr r2, [r2, #0]
8007746: 4413 add r3, r2
8007748: f503 6380 add.w r3, r3, #1024 @ 0x400
800774c: 881b ldrh r3, [r3, #0]
800774e: f3c3 0309 ubfx r3, r3, #0, #10
8007752: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8007754: 68bb ldr r3, [r7, #8]
8007756: 699a ldr r2, [r3, #24]
8007758: 8b7b ldrh r3, [r7, #26]
800775a: 429a cmp r2, r3
800775c: d306 bcc.n 800776c <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
800775e: 68bb ldr r3, [r7, #8]
8007760: 699a ldr r2, [r3, #24]
8007762: 8b7b ldrh r3, [r7, #26]
8007764: 1ad2 subs r2, r2, r3
8007766: 68bb ldr r3, [r7, #8]
8007768: 619a str r2, [r3, #24]
800776a: e002 b.n 8007772 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
800776c: 68bb ldr r3, [r7, #8]
800776e: 2200 movs r2, #0
8007770: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8007772: 68bb ldr r3, [r7, #8]
8007774: 699b ldr r3, [r3, #24]
8007776: 2b00 cmp r3, #0
8007778: d123 bne.n 80077c2 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
800777a: 68fb ldr r3, [r7, #12]
800777c: 681b ldr r3, [r3, #0]
800777e: 461a mov r2, r3
8007780: 68bb ldr r3, [r7, #8]
8007782: 781b ldrb r3, [r3, #0]
8007784: 009b lsls r3, r3, #2
8007786: 4413 add r3, r2
8007788: 881b ldrh r3, [r3, #0]
800778a: b29b uxth r3, r3
800778c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8007790: f023 0370 bic.w r3, r3, #112 @ 0x70
8007794: 83fb strh r3, [r7, #30]
8007796: 8bfb ldrh r3, [r7, #30]
8007798: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800779c: 83fb strh r3, [r7, #30]
800779e: 68fb ldr r3, [r7, #12]
80077a0: 681b ldr r3, [r3, #0]
80077a2: 461a mov r2, r3
80077a4: 68bb ldr r3, [r7, #8]
80077a6: 781b ldrb r3, [r3, #0]
80077a8: 009b lsls r3, r3, #2
80077aa: 441a add r2, r3
80077ac: 8bfb ldrh r3, [r7, #30]
80077ae: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80077b2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80077b6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80077ba: f043 0380 orr.w r3, r3, #128 @ 0x80
80077be: b29b uxth r3, r3
80077c0: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
80077c2: 88fb ldrh r3, [r7, #6]
80077c4: f003 0340 and.w r3, r3, #64 @ 0x40
80077c8: 2b00 cmp r3, #0
80077ca: d11f bne.n 800780c <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
80077cc: 68fb ldr r3, [r7, #12]
80077ce: 681b ldr r3, [r3, #0]
80077d0: 461a mov r2, r3
80077d2: 68bb ldr r3, [r7, #8]
80077d4: 781b ldrb r3, [r3, #0]
80077d6: 009b lsls r3, r3, #2
80077d8: 4413 add r3, r2
80077da: 881b ldrh r3, [r3, #0]
80077dc: b29b uxth r3, r3
80077de: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80077e2: f023 0370 bic.w r3, r3, #112 @ 0x70
80077e6: 83bb strh r3, [r7, #28]
80077e8: 68fb ldr r3, [r7, #12]
80077ea: 681b ldr r3, [r3, #0]
80077ec: 461a mov r2, r3
80077ee: 68bb ldr r3, [r7, #8]
80077f0: 781b ldrb r3, [r3, #0]
80077f2: 009b lsls r3, r3, #2
80077f4: 441a add r2, r3
80077f6: 8bbb ldrh r3, [r7, #28]
80077f8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80077fc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007800: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007804: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007808: b29b uxth r3, r3
800780a: 8013 strh r3, [r2, #0]
}
if (count != 0U)
800780c: 8b7b ldrh r3, [r7, #26]
800780e: 2b00 cmp r3, #0
8007810: d008 beq.n 8007824 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8007812: 68fb ldr r3, [r7, #12]
8007814: 6818 ldr r0, [r3, #0]
8007816: 68bb ldr r3, [r7, #8]
8007818: 6959 ldr r1, [r3, #20]
800781a: 68bb ldr r3, [r7, #8]
800781c: 895a ldrh r2, [r3, #10]
800781e: 8b7b ldrh r3, [r7, #26]
8007820: f004 fce3 bl 800c1ea <USB_ReadPMA>
}
}
return count;
8007824: 8b7b ldrh r3, [r7, #26]
}
8007826: 4618 mov r0, r3
8007828: 3720 adds r7, #32
800782a: 46bd mov sp, r7
800782c: bd80 pop {r7, pc}
0800782e <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
800782e: b580 push {r7, lr}
8007830: b0a4 sub sp, #144 @ 0x90
8007832: af00 add r7, sp, #0
8007834: 60f8 str r0, [r7, #12]
8007836: 60b9 str r1, [r7, #8]
8007838: 4613 mov r3, r2
800783a: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
800783c: 88fb ldrh r3, [r7, #6]
800783e: f003 0340 and.w r3, r3, #64 @ 0x40
8007842: 2b00 cmp r3, #0
8007844: f000 81dd beq.w 8007c02 <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8007848: 68fb ldr r3, [r7, #12]
800784a: 681b ldr r3, [r3, #0]
800784c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007850: b29b uxth r3, r3
8007852: 461a mov r2, r3
8007854: 68bb ldr r3, [r7, #8]
8007856: 781b ldrb r3, [r3, #0]
8007858: 00db lsls r3, r3, #3
800785a: 4413 add r3, r2
800785c: 3302 adds r3, #2
800785e: 005b lsls r3, r3, #1
8007860: 68fa ldr r2, [r7, #12]
8007862: 6812 ldr r2, [r2, #0]
8007864: 4413 add r3, r2
8007866: f503 6380 add.w r3, r3, #1024 @ 0x400
800786a: 881b ldrh r3, [r3, #0]
800786c: f3c3 0309 ubfx r3, r3, #0, #10
8007870: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8007874: 68bb ldr r3, [r7, #8]
8007876: 699a ldr r2, [r3, #24]
8007878: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800787c: 429a cmp r2, r3
800787e: d907 bls.n 8007890 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8007880: 68bb ldr r3, [r7, #8]
8007882: 699a ldr r2, [r3, #24]
8007884: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007888: 1ad2 subs r2, r2, r3
800788a: 68bb ldr r3, [r7, #8]
800788c: 619a str r2, [r3, #24]
800788e: e002 b.n 8007896 <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8007890: 68bb ldr r3, [r7, #8]
8007892: 2200 movs r2, #0
8007894: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8007896: 68bb ldr r3, [r7, #8]
8007898: 699b ldr r3, [r3, #24]
800789a: 2b00 cmp r3, #0
800789c: f040 80b9 bne.w 8007a12 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80078a0: 68bb ldr r3, [r7, #8]
80078a2: 785b ldrb r3, [r3, #1]
80078a4: 2b00 cmp r3, #0
80078a6: d126 bne.n 80078f6 <HAL_PCD_EP_DB_Transmit+0xc8>
80078a8: 68fb ldr r3, [r7, #12]
80078aa: 681b ldr r3, [r3, #0]
80078ac: 62fb str r3, [r7, #44] @ 0x2c
80078ae: 68fb ldr r3, [r7, #12]
80078b0: 681b ldr r3, [r3, #0]
80078b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80078b6: b29b uxth r3, r3
80078b8: 461a mov r2, r3
80078ba: 6afb ldr r3, [r7, #44] @ 0x2c
80078bc: 4413 add r3, r2
80078be: 62fb str r3, [r7, #44] @ 0x2c
80078c0: 68bb ldr r3, [r7, #8]
80078c2: 781b ldrb r3, [r3, #0]
80078c4: 011a lsls r2, r3, #4
80078c6: 6afb ldr r3, [r7, #44] @ 0x2c
80078c8: 4413 add r3, r2
80078ca: f203 4304 addw r3, r3, #1028 @ 0x404
80078ce: 62bb str r3, [r7, #40] @ 0x28
80078d0: 6abb ldr r3, [r7, #40] @ 0x28
80078d2: 881b ldrh r3, [r3, #0]
80078d4: b29b uxth r3, r3
80078d6: f3c3 0309 ubfx r3, r3, #0, #10
80078da: b29a uxth r2, r3
80078dc: 6abb ldr r3, [r7, #40] @ 0x28
80078de: 801a strh r2, [r3, #0]
80078e0: 6abb ldr r3, [r7, #40] @ 0x28
80078e2: 881b ldrh r3, [r3, #0]
80078e4: b29b uxth r3, r3
80078e6: ea6f 4343 mvn.w r3, r3, lsl #17
80078ea: ea6f 4353 mvn.w r3, r3, lsr #17
80078ee: b29a uxth r2, r3
80078f0: 6abb ldr r3, [r7, #40] @ 0x28
80078f2: 801a strh r2, [r3, #0]
80078f4: e01a b.n 800792c <HAL_PCD_EP_DB_Transmit+0xfe>
80078f6: 68bb ldr r3, [r7, #8]
80078f8: 785b ldrb r3, [r3, #1]
80078fa: 2b01 cmp r3, #1
80078fc: d116 bne.n 800792c <HAL_PCD_EP_DB_Transmit+0xfe>
80078fe: 68fb ldr r3, [r7, #12]
8007900: 681b ldr r3, [r3, #0]
8007902: 637b str r3, [r7, #52] @ 0x34
8007904: 68fb ldr r3, [r7, #12]
8007906: 681b ldr r3, [r3, #0]
8007908: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800790c: b29b uxth r3, r3
800790e: 461a mov r2, r3
8007910: 6b7b ldr r3, [r7, #52] @ 0x34
8007912: 4413 add r3, r2
8007914: 637b str r3, [r7, #52] @ 0x34
8007916: 68bb ldr r3, [r7, #8]
8007918: 781b ldrb r3, [r3, #0]
800791a: 011a lsls r2, r3, #4
800791c: 6b7b ldr r3, [r7, #52] @ 0x34
800791e: 4413 add r3, r2
8007920: f203 4304 addw r3, r3, #1028 @ 0x404
8007924: 633b str r3, [r7, #48] @ 0x30
8007926: 6b3b ldr r3, [r7, #48] @ 0x30
8007928: 2200 movs r2, #0
800792a: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800792c: 68fb ldr r3, [r7, #12]
800792e: 681b ldr r3, [r3, #0]
8007930: 627b str r3, [r7, #36] @ 0x24
8007932: 68bb ldr r3, [r7, #8]
8007934: 785b ldrb r3, [r3, #1]
8007936: 2b00 cmp r3, #0
8007938: d126 bne.n 8007988 <HAL_PCD_EP_DB_Transmit+0x15a>
800793a: 68fb ldr r3, [r7, #12]
800793c: 681b ldr r3, [r3, #0]
800793e: 61fb str r3, [r7, #28]
8007940: 68fb ldr r3, [r7, #12]
8007942: 681b ldr r3, [r3, #0]
8007944: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007948: b29b uxth r3, r3
800794a: 461a mov r2, r3
800794c: 69fb ldr r3, [r7, #28]
800794e: 4413 add r3, r2
8007950: 61fb str r3, [r7, #28]
8007952: 68bb ldr r3, [r7, #8]
8007954: 781b ldrb r3, [r3, #0]
8007956: 011a lsls r2, r3, #4
8007958: 69fb ldr r3, [r7, #28]
800795a: 4413 add r3, r2
800795c: f203 430c addw r3, r3, #1036 @ 0x40c
8007960: 61bb str r3, [r7, #24]
8007962: 69bb ldr r3, [r7, #24]
8007964: 881b ldrh r3, [r3, #0]
8007966: b29b uxth r3, r3
8007968: f3c3 0309 ubfx r3, r3, #0, #10
800796c: b29a uxth r2, r3
800796e: 69bb ldr r3, [r7, #24]
8007970: 801a strh r2, [r3, #0]
8007972: 69bb ldr r3, [r7, #24]
8007974: 881b ldrh r3, [r3, #0]
8007976: b29b uxth r3, r3
8007978: ea6f 4343 mvn.w r3, r3, lsl #17
800797c: ea6f 4353 mvn.w r3, r3, lsr #17
8007980: b29a uxth r2, r3
8007982: 69bb ldr r3, [r7, #24]
8007984: 801a strh r2, [r3, #0]
8007986: e017 b.n 80079b8 <HAL_PCD_EP_DB_Transmit+0x18a>
8007988: 68bb ldr r3, [r7, #8]
800798a: 785b ldrb r3, [r3, #1]
800798c: 2b01 cmp r3, #1
800798e: d113 bne.n 80079b8 <HAL_PCD_EP_DB_Transmit+0x18a>
8007990: 68fb ldr r3, [r7, #12]
8007992: 681b ldr r3, [r3, #0]
8007994: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007998: b29b uxth r3, r3
800799a: 461a mov r2, r3
800799c: 6a7b ldr r3, [r7, #36] @ 0x24
800799e: 4413 add r3, r2
80079a0: 627b str r3, [r7, #36] @ 0x24
80079a2: 68bb ldr r3, [r7, #8]
80079a4: 781b ldrb r3, [r3, #0]
80079a6: 011a lsls r2, r3, #4
80079a8: 6a7b ldr r3, [r7, #36] @ 0x24
80079aa: 4413 add r3, r2
80079ac: f203 430c addw r3, r3, #1036 @ 0x40c
80079b0: 623b str r3, [r7, #32]
80079b2: 6a3b ldr r3, [r7, #32]
80079b4: 2200 movs r2, #0
80079b6: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80079b8: 68bb ldr r3, [r7, #8]
80079ba: 781b ldrb r3, [r3, #0]
80079bc: 4619 mov r1, r3
80079be: 68f8 ldr r0, [r7, #12]
80079c0: f006 fa91 bl 800dee6 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
80079c4: 88fb ldrh r3, [r7, #6]
80079c6: f403 4380 and.w r3, r3, #16384 @ 0x4000
80079ca: 2b00 cmp r3, #0
80079cc: f000 82fc beq.w 8007fc8 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
80079d0: 68fb ldr r3, [r7, #12]
80079d2: 681b ldr r3, [r3, #0]
80079d4: 461a mov r2, r3
80079d6: 68bb ldr r3, [r7, #8]
80079d8: 781b ldrb r3, [r3, #0]
80079da: 009b lsls r3, r3, #2
80079dc: 4413 add r3, r2
80079de: 881b ldrh r3, [r3, #0]
80079e0: b29b uxth r3, r3
80079e2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80079e6: f023 0370 bic.w r3, r3, #112 @ 0x70
80079ea: 82fb strh r3, [r7, #22]
80079ec: 68fb ldr r3, [r7, #12]
80079ee: 681b ldr r3, [r3, #0]
80079f0: 461a mov r2, r3
80079f2: 68bb ldr r3, [r7, #8]
80079f4: 781b ldrb r3, [r3, #0]
80079f6: 009b lsls r3, r3, #2
80079f8: 441a add r2, r3
80079fa: 8afb ldrh r3, [r7, #22]
80079fc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007a00: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007a04: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007a08: f043 0380 orr.w r3, r3, #128 @ 0x80
8007a0c: b29b uxth r3, r3
8007a0e: 8013 strh r3, [r2, #0]
8007a10: e2da b.n 8007fc8 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007a12: 88fb ldrh r3, [r7, #6]
8007a14: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007a18: 2b00 cmp r3, #0
8007a1a: d021 beq.n 8007a60 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007a1c: 68fb ldr r3, [r7, #12]
8007a1e: 681b ldr r3, [r3, #0]
8007a20: 461a mov r2, r3
8007a22: 68bb ldr r3, [r7, #8]
8007a24: 781b ldrb r3, [r3, #0]
8007a26: 009b lsls r3, r3, #2
8007a28: 4413 add r3, r2
8007a2a: 881b ldrh r3, [r3, #0]
8007a2c: b29b uxth r3, r3
8007a2e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007a32: f023 0370 bic.w r3, r3, #112 @ 0x70
8007a36: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8007a3a: 68fb ldr r3, [r7, #12]
8007a3c: 681b ldr r3, [r3, #0]
8007a3e: 461a mov r2, r3
8007a40: 68bb ldr r3, [r7, #8]
8007a42: 781b ldrb r3, [r3, #0]
8007a44: 009b lsls r3, r3, #2
8007a46: 441a add r2, r3
8007a48: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8007a4c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007a50: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007a54: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007a58: f043 0380 orr.w r3, r3, #128 @ 0x80
8007a5c: b29b uxth r3, r3
8007a5e: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8007a60: 68bb ldr r3, [r7, #8]
8007a62: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8007a66: 2b01 cmp r3, #1
8007a68: f040 82ae bne.w 8007fc8 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8007a6c: 68bb ldr r3, [r7, #8]
8007a6e: 695a ldr r2, [r3, #20]
8007a70: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007a74: 441a add r2, r3
8007a76: 68bb ldr r3, [r7, #8]
8007a78: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007a7a: 68bb ldr r3, [r7, #8]
8007a7c: 69da ldr r2, [r3, #28]
8007a7e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007a82: 441a add r2, r3
8007a84: 68bb ldr r3, [r7, #8]
8007a86: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007a88: 68bb ldr r3, [r7, #8]
8007a8a: 6a1a ldr r2, [r3, #32]
8007a8c: 68bb ldr r3, [r7, #8]
8007a8e: 691b ldr r3, [r3, #16]
8007a90: 429a cmp r2, r3
8007a92: d30b bcc.n 8007aac <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8007a94: 68bb ldr r3, [r7, #8]
8007a96: 691b ldr r3, [r3, #16]
8007a98: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007a9c: 68bb ldr r3, [r7, #8]
8007a9e: 6a1a ldr r2, [r3, #32]
8007aa0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007aa4: 1ad2 subs r2, r2, r3
8007aa6: 68bb ldr r3, [r7, #8]
8007aa8: 621a str r2, [r3, #32]
8007aaa: e017 b.n 8007adc <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8007aac: 68bb ldr r3, [r7, #8]
8007aae: 6a1b ldr r3, [r3, #32]
8007ab0: 2b00 cmp r3, #0
8007ab2: d108 bne.n 8007ac6 <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8007ab4: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007ab8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007abc: 68bb ldr r3, [r7, #8]
8007abe: 2200 movs r2, #0
8007ac0: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007ac4: e00a b.n 8007adc <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8007ac6: 68bb ldr r3, [r7, #8]
8007ac8: 2200 movs r2, #0
8007aca: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8007ace: 68bb ldr r3, [r7, #8]
8007ad0: 6a1b ldr r3, [r3, #32]
8007ad2: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007ad6: 68bb ldr r3, [r7, #8]
8007ad8: 2200 movs r2, #0
8007ada: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007adc: 68bb ldr r3, [r7, #8]
8007ade: 785b ldrb r3, [r3, #1]
8007ae0: 2b00 cmp r3, #0
8007ae2: d165 bne.n 8007bb0 <HAL_PCD_EP_DB_Transmit+0x382>
8007ae4: 68fb ldr r3, [r7, #12]
8007ae6: 681b ldr r3, [r3, #0]
8007ae8: 63fb str r3, [r7, #60] @ 0x3c
8007aea: 68fb ldr r3, [r7, #12]
8007aec: 681b ldr r3, [r3, #0]
8007aee: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007af2: b29b uxth r3, r3
8007af4: 461a mov r2, r3
8007af6: 6bfb ldr r3, [r7, #60] @ 0x3c
8007af8: 4413 add r3, r2
8007afa: 63fb str r3, [r7, #60] @ 0x3c
8007afc: 68bb ldr r3, [r7, #8]
8007afe: 781b ldrb r3, [r3, #0]
8007b00: 011a lsls r2, r3, #4
8007b02: 6bfb ldr r3, [r7, #60] @ 0x3c
8007b04: 4413 add r3, r2
8007b06: f203 4304 addw r3, r3, #1028 @ 0x404
8007b0a: 63bb str r3, [r7, #56] @ 0x38
8007b0c: 6bbb ldr r3, [r7, #56] @ 0x38
8007b0e: 881b ldrh r3, [r3, #0]
8007b10: b29b uxth r3, r3
8007b12: f3c3 0309 ubfx r3, r3, #0, #10
8007b16: b29a uxth r2, r3
8007b18: 6bbb ldr r3, [r7, #56] @ 0x38
8007b1a: 801a strh r2, [r3, #0]
8007b1c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b20: 2b3e cmp r3, #62 @ 0x3e
8007b22: d91d bls.n 8007b60 <HAL_PCD_EP_DB_Transmit+0x332>
8007b24: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b28: 095b lsrs r3, r3, #5
8007b2a: 64bb str r3, [r7, #72] @ 0x48
8007b2c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b30: f003 031f and.w r3, r3, #31
8007b34: 2b00 cmp r3, #0
8007b36: d102 bne.n 8007b3e <HAL_PCD_EP_DB_Transmit+0x310>
8007b38: 6cbb ldr r3, [r7, #72] @ 0x48
8007b3a: 3b01 subs r3, #1
8007b3c: 64bb str r3, [r7, #72] @ 0x48
8007b3e: 6bbb ldr r3, [r7, #56] @ 0x38
8007b40: 881b ldrh r3, [r3, #0]
8007b42: b29a uxth r2, r3
8007b44: 6cbb ldr r3, [r7, #72] @ 0x48
8007b46: b29b uxth r3, r3
8007b48: 029b lsls r3, r3, #10
8007b4a: b29b uxth r3, r3
8007b4c: 4313 orrs r3, r2
8007b4e: b29b uxth r3, r3
8007b50: ea6f 4343 mvn.w r3, r3, lsl #17
8007b54: ea6f 4353 mvn.w r3, r3, lsr #17
8007b58: b29a uxth r2, r3
8007b5a: 6bbb ldr r3, [r7, #56] @ 0x38
8007b5c: 801a strh r2, [r3, #0]
8007b5e: e044 b.n 8007bea <HAL_PCD_EP_DB_Transmit+0x3bc>
8007b60: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b64: 2b00 cmp r3, #0
8007b66: d10a bne.n 8007b7e <HAL_PCD_EP_DB_Transmit+0x350>
8007b68: 6bbb ldr r3, [r7, #56] @ 0x38
8007b6a: 881b ldrh r3, [r3, #0]
8007b6c: b29b uxth r3, r3
8007b6e: ea6f 4343 mvn.w r3, r3, lsl #17
8007b72: ea6f 4353 mvn.w r3, r3, lsr #17
8007b76: b29a uxth r2, r3
8007b78: 6bbb ldr r3, [r7, #56] @ 0x38
8007b7a: 801a strh r2, [r3, #0]
8007b7c: e035 b.n 8007bea <HAL_PCD_EP_DB_Transmit+0x3bc>
8007b7e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b82: 085b lsrs r3, r3, #1
8007b84: 64bb str r3, [r7, #72] @ 0x48
8007b86: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b8a: f003 0301 and.w r3, r3, #1
8007b8e: 2b00 cmp r3, #0
8007b90: d002 beq.n 8007b98 <HAL_PCD_EP_DB_Transmit+0x36a>
8007b92: 6cbb ldr r3, [r7, #72] @ 0x48
8007b94: 3301 adds r3, #1
8007b96: 64bb str r3, [r7, #72] @ 0x48
8007b98: 6bbb ldr r3, [r7, #56] @ 0x38
8007b9a: 881b ldrh r3, [r3, #0]
8007b9c: b29a uxth r2, r3
8007b9e: 6cbb ldr r3, [r7, #72] @ 0x48
8007ba0: b29b uxth r3, r3
8007ba2: 029b lsls r3, r3, #10
8007ba4: b29b uxth r3, r3
8007ba6: 4313 orrs r3, r2
8007ba8: b29a uxth r2, r3
8007baa: 6bbb ldr r3, [r7, #56] @ 0x38
8007bac: 801a strh r2, [r3, #0]
8007bae: e01c b.n 8007bea <HAL_PCD_EP_DB_Transmit+0x3bc>
8007bb0: 68bb ldr r3, [r7, #8]
8007bb2: 785b ldrb r3, [r3, #1]
8007bb4: 2b01 cmp r3, #1
8007bb6: d118 bne.n 8007bea <HAL_PCD_EP_DB_Transmit+0x3bc>
8007bb8: 68fb ldr r3, [r7, #12]
8007bba: 681b ldr r3, [r3, #0]
8007bbc: 647b str r3, [r7, #68] @ 0x44
8007bbe: 68fb ldr r3, [r7, #12]
8007bc0: 681b ldr r3, [r3, #0]
8007bc2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007bc6: b29b uxth r3, r3
8007bc8: 461a mov r2, r3
8007bca: 6c7b ldr r3, [r7, #68] @ 0x44
8007bcc: 4413 add r3, r2
8007bce: 647b str r3, [r7, #68] @ 0x44
8007bd0: 68bb ldr r3, [r7, #8]
8007bd2: 781b ldrb r3, [r3, #0]
8007bd4: 011a lsls r2, r3, #4
8007bd6: 6c7b ldr r3, [r7, #68] @ 0x44
8007bd8: 4413 add r3, r2
8007bda: f203 4304 addw r3, r3, #1028 @ 0x404
8007bde: 643b str r3, [r7, #64] @ 0x40
8007be0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007be4: b29a uxth r2, r3
8007be6: 6c3b ldr r3, [r7, #64] @ 0x40
8007be8: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8007bea: 68fb ldr r3, [r7, #12]
8007bec: 6818 ldr r0, [r3, #0]
8007bee: 68bb ldr r3, [r7, #8]
8007bf0: 6959 ldr r1, [r3, #20]
8007bf2: 68bb ldr r3, [r7, #8]
8007bf4: 891a ldrh r2, [r3, #8]
8007bf6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007bfa: b29b uxth r3, r3
8007bfc: f004 faaf bl 800c15e <USB_WritePMA>
8007c00: e1e2 b.n 8007fc8 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8007c02: 68fb ldr r3, [r7, #12]
8007c04: 681b ldr r3, [r3, #0]
8007c06: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007c0a: b29b uxth r3, r3
8007c0c: 461a mov r2, r3
8007c0e: 68bb ldr r3, [r7, #8]
8007c10: 781b ldrb r3, [r3, #0]
8007c12: 00db lsls r3, r3, #3
8007c14: 4413 add r3, r2
8007c16: 3306 adds r3, #6
8007c18: 005b lsls r3, r3, #1
8007c1a: 68fa ldr r2, [r7, #12]
8007c1c: 6812 ldr r2, [r2, #0]
8007c1e: 4413 add r3, r2
8007c20: f503 6380 add.w r3, r3, #1024 @ 0x400
8007c24: 881b ldrh r3, [r3, #0]
8007c26: f3c3 0309 ubfx r3, r3, #0, #10
8007c2a: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
8007c2e: 68bb ldr r3, [r7, #8]
8007c30: 699a ldr r2, [r3, #24]
8007c32: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007c36: 429a cmp r2, r3
8007c38: d307 bcc.n 8007c4a <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
8007c3a: 68bb ldr r3, [r7, #8]
8007c3c: 699a ldr r2, [r3, #24]
8007c3e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007c42: 1ad2 subs r2, r2, r3
8007c44: 68bb ldr r3, [r7, #8]
8007c46: 619a str r2, [r3, #24]
8007c48: e002 b.n 8007c50 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
8007c4a: 68bb ldr r3, [r7, #8]
8007c4c: 2200 movs r2, #0
8007c4e: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8007c50: 68bb ldr r3, [r7, #8]
8007c52: 699b ldr r3, [r3, #24]
8007c54: 2b00 cmp r3, #0
8007c56: f040 80c0 bne.w 8007dda <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007c5a: 68bb ldr r3, [r7, #8]
8007c5c: 785b ldrb r3, [r3, #1]
8007c5e: 2b00 cmp r3, #0
8007c60: d126 bne.n 8007cb0 <HAL_PCD_EP_DB_Transmit+0x482>
8007c62: 68fb ldr r3, [r7, #12]
8007c64: 681b ldr r3, [r3, #0]
8007c66: 67fb str r3, [r7, #124] @ 0x7c
8007c68: 68fb ldr r3, [r7, #12]
8007c6a: 681b ldr r3, [r3, #0]
8007c6c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007c70: b29b uxth r3, r3
8007c72: 461a mov r2, r3
8007c74: 6ffb ldr r3, [r7, #124] @ 0x7c
8007c76: 4413 add r3, r2
8007c78: 67fb str r3, [r7, #124] @ 0x7c
8007c7a: 68bb ldr r3, [r7, #8]
8007c7c: 781b ldrb r3, [r3, #0]
8007c7e: 011a lsls r2, r3, #4
8007c80: 6ffb ldr r3, [r7, #124] @ 0x7c
8007c82: 4413 add r3, r2
8007c84: f203 4304 addw r3, r3, #1028 @ 0x404
8007c88: 67bb str r3, [r7, #120] @ 0x78
8007c8a: 6fbb ldr r3, [r7, #120] @ 0x78
8007c8c: 881b ldrh r3, [r3, #0]
8007c8e: b29b uxth r3, r3
8007c90: f3c3 0309 ubfx r3, r3, #0, #10
8007c94: b29a uxth r2, r3
8007c96: 6fbb ldr r3, [r7, #120] @ 0x78
8007c98: 801a strh r2, [r3, #0]
8007c9a: 6fbb ldr r3, [r7, #120] @ 0x78
8007c9c: 881b ldrh r3, [r3, #0]
8007c9e: b29b uxth r3, r3
8007ca0: ea6f 4343 mvn.w r3, r3, lsl #17
8007ca4: ea6f 4353 mvn.w r3, r3, lsr #17
8007ca8: b29a uxth r2, r3
8007caa: 6fbb ldr r3, [r7, #120] @ 0x78
8007cac: 801a strh r2, [r3, #0]
8007cae: e01a b.n 8007ce6 <HAL_PCD_EP_DB_Transmit+0x4b8>
8007cb0: 68bb ldr r3, [r7, #8]
8007cb2: 785b ldrb r3, [r3, #1]
8007cb4: 2b01 cmp r3, #1
8007cb6: d116 bne.n 8007ce6 <HAL_PCD_EP_DB_Transmit+0x4b8>
8007cb8: 68fb ldr r3, [r7, #12]
8007cba: 681b ldr r3, [r3, #0]
8007cbc: 667b str r3, [r7, #100] @ 0x64
8007cbe: 68fb ldr r3, [r7, #12]
8007cc0: 681b ldr r3, [r3, #0]
8007cc2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007cc6: b29b uxth r3, r3
8007cc8: 461a mov r2, r3
8007cca: 6e7b ldr r3, [r7, #100] @ 0x64
8007ccc: 4413 add r3, r2
8007cce: 667b str r3, [r7, #100] @ 0x64
8007cd0: 68bb ldr r3, [r7, #8]
8007cd2: 781b ldrb r3, [r3, #0]
8007cd4: 011a lsls r2, r3, #4
8007cd6: 6e7b ldr r3, [r7, #100] @ 0x64
8007cd8: 4413 add r3, r2
8007cda: f203 4304 addw r3, r3, #1028 @ 0x404
8007cde: 663b str r3, [r7, #96] @ 0x60
8007ce0: 6e3b ldr r3, [r7, #96] @ 0x60
8007ce2: 2200 movs r2, #0
8007ce4: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007ce6: 68fb ldr r3, [r7, #12]
8007ce8: 681b ldr r3, [r3, #0]
8007cea: 677b str r3, [r7, #116] @ 0x74
8007cec: 68bb ldr r3, [r7, #8]
8007cee: 785b ldrb r3, [r3, #1]
8007cf0: 2b00 cmp r3, #0
8007cf2: d12b bne.n 8007d4c <HAL_PCD_EP_DB_Transmit+0x51e>
8007cf4: 68fb ldr r3, [r7, #12]
8007cf6: 681b ldr r3, [r3, #0]
8007cf8: 66fb str r3, [r7, #108] @ 0x6c
8007cfa: 68fb ldr r3, [r7, #12]
8007cfc: 681b ldr r3, [r3, #0]
8007cfe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007d02: b29b uxth r3, r3
8007d04: 461a mov r2, r3
8007d06: 6efb ldr r3, [r7, #108] @ 0x6c
8007d08: 4413 add r3, r2
8007d0a: 66fb str r3, [r7, #108] @ 0x6c
8007d0c: 68bb ldr r3, [r7, #8]
8007d0e: 781b ldrb r3, [r3, #0]
8007d10: 011a lsls r2, r3, #4
8007d12: 6efb ldr r3, [r7, #108] @ 0x6c
8007d14: 4413 add r3, r2
8007d16: f203 430c addw r3, r3, #1036 @ 0x40c
8007d1a: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8007d1e: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007d22: 881b ldrh r3, [r3, #0]
8007d24: b29b uxth r3, r3
8007d26: f3c3 0309 ubfx r3, r3, #0, #10
8007d2a: b29a uxth r2, r3
8007d2c: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007d30: 801a strh r2, [r3, #0]
8007d32: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007d36: 881b ldrh r3, [r3, #0]
8007d38: b29b uxth r3, r3
8007d3a: ea6f 4343 mvn.w r3, r3, lsl #17
8007d3e: ea6f 4353 mvn.w r3, r3, lsr #17
8007d42: b29a uxth r2, r3
8007d44: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007d48: 801a strh r2, [r3, #0]
8007d4a: e017 b.n 8007d7c <HAL_PCD_EP_DB_Transmit+0x54e>
8007d4c: 68bb ldr r3, [r7, #8]
8007d4e: 785b ldrb r3, [r3, #1]
8007d50: 2b01 cmp r3, #1
8007d52: d113 bne.n 8007d7c <HAL_PCD_EP_DB_Transmit+0x54e>
8007d54: 68fb ldr r3, [r7, #12]
8007d56: 681b ldr r3, [r3, #0]
8007d58: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007d5c: b29b uxth r3, r3
8007d5e: 461a mov r2, r3
8007d60: 6f7b ldr r3, [r7, #116] @ 0x74
8007d62: 4413 add r3, r2
8007d64: 677b str r3, [r7, #116] @ 0x74
8007d66: 68bb ldr r3, [r7, #8]
8007d68: 781b ldrb r3, [r3, #0]
8007d6a: 011a lsls r2, r3, #4
8007d6c: 6f7b ldr r3, [r7, #116] @ 0x74
8007d6e: 4413 add r3, r2
8007d70: f203 430c addw r3, r3, #1036 @ 0x40c
8007d74: 673b str r3, [r7, #112] @ 0x70
8007d76: 6f3b ldr r3, [r7, #112] @ 0x70
8007d78: 2200 movs r2, #0
8007d7a: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007d7c: 68bb ldr r3, [r7, #8]
8007d7e: 781b ldrb r3, [r3, #0]
8007d80: 4619 mov r1, r3
8007d82: 68f8 ldr r0, [r7, #12]
8007d84: f006 f8af bl 800dee6 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8007d88: 88fb ldrh r3, [r7, #6]
8007d8a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007d8e: 2b00 cmp r3, #0
8007d90: f040 811a bne.w 8007fc8 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007d94: 68fb ldr r3, [r7, #12]
8007d96: 681b ldr r3, [r3, #0]
8007d98: 461a mov r2, r3
8007d9a: 68bb ldr r3, [r7, #8]
8007d9c: 781b ldrb r3, [r3, #0]
8007d9e: 009b lsls r3, r3, #2
8007da0: 4413 add r3, r2
8007da2: 881b ldrh r3, [r3, #0]
8007da4: b29b uxth r3, r3
8007da6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007daa: f023 0370 bic.w r3, r3, #112 @ 0x70
8007dae: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8007db2: 68fb ldr r3, [r7, #12]
8007db4: 681b ldr r3, [r3, #0]
8007db6: 461a mov r2, r3
8007db8: 68bb ldr r3, [r7, #8]
8007dba: 781b ldrb r3, [r3, #0]
8007dbc: 009b lsls r3, r3, #2
8007dbe: 441a add r2, r3
8007dc0: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
8007dc4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007dc8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007dcc: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007dd0: f043 0380 orr.w r3, r3, #128 @ 0x80
8007dd4: b29b uxth r3, r3
8007dd6: 8013 strh r3, [r2, #0]
8007dd8: e0f6 b.n 8007fc8 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8007dda: 88fb ldrh r3, [r7, #6]
8007ddc: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007de0: 2b00 cmp r3, #0
8007de2: d121 bne.n 8007e28 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007de4: 68fb ldr r3, [r7, #12]
8007de6: 681b ldr r3, [r3, #0]
8007de8: 461a mov r2, r3
8007dea: 68bb ldr r3, [r7, #8]
8007dec: 781b ldrb r3, [r3, #0]
8007dee: 009b lsls r3, r3, #2
8007df0: 4413 add r3, r2
8007df2: 881b ldrh r3, [r3, #0]
8007df4: b29b uxth r3, r3
8007df6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007dfa: f023 0370 bic.w r3, r3, #112 @ 0x70
8007dfe: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8007e02: 68fb ldr r3, [r7, #12]
8007e04: 681b ldr r3, [r3, #0]
8007e06: 461a mov r2, r3
8007e08: 68bb ldr r3, [r7, #8]
8007e0a: 781b ldrb r3, [r3, #0]
8007e0c: 009b lsls r3, r3, #2
8007e0e: 441a add r2, r3
8007e10: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8007e14: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007e18: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007e1c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007e20: f043 0380 orr.w r3, r3, #128 @ 0x80
8007e24: b29b uxth r3, r3
8007e26: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8007e28: 68bb ldr r3, [r7, #8]
8007e2a: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8007e2e: 2b01 cmp r3, #1
8007e30: f040 80ca bne.w 8007fc8 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8007e34: 68bb ldr r3, [r7, #8]
8007e36: 695a ldr r2, [r3, #20]
8007e38: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007e3c: 441a add r2, r3
8007e3e: 68bb ldr r3, [r7, #8]
8007e40: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007e42: 68bb ldr r3, [r7, #8]
8007e44: 69da ldr r2, [r3, #28]
8007e46: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007e4a: 441a add r2, r3
8007e4c: 68bb ldr r3, [r7, #8]
8007e4e: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007e50: 68bb ldr r3, [r7, #8]
8007e52: 6a1a ldr r2, [r3, #32]
8007e54: 68bb ldr r3, [r7, #8]
8007e56: 691b ldr r3, [r3, #16]
8007e58: 429a cmp r2, r3
8007e5a: d30b bcc.n 8007e74 <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
8007e5c: 68bb ldr r3, [r7, #8]
8007e5e: 691b ldr r3, [r3, #16]
8007e60: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007e64: 68bb ldr r3, [r7, #8]
8007e66: 6a1a ldr r2, [r3, #32]
8007e68: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007e6c: 1ad2 subs r2, r2, r3
8007e6e: 68bb ldr r3, [r7, #8]
8007e70: 621a str r2, [r3, #32]
8007e72: e017 b.n 8007ea4 <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
8007e74: 68bb ldr r3, [r7, #8]
8007e76: 6a1b ldr r3, [r3, #32]
8007e78: 2b00 cmp r3, #0
8007e7a: d108 bne.n 8007e8e <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
8007e7c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007e80: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007e84: 68bb ldr r3, [r7, #8]
8007e86: 2200 movs r2, #0
8007e88: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007e8c: e00a b.n 8007ea4 <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
8007e8e: 68bb ldr r3, [r7, #8]
8007e90: 6a1b ldr r3, [r3, #32]
8007e92: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007e96: 68bb ldr r3, [r7, #8]
8007e98: 2200 movs r2, #0
8007e9a: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8007e9c: 68bb ldr r3, [r7, #8]
8007e9e: 2200 movs r2, #0
8007ea0: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007ea4: 68fb ldr r3, [r7, #12]
8007ea6: 681b ldr r3, [r3, #0]
8007ea8: 657b str r3, [r7, #84] @ 0x54
8007eaa: 68bb ldr r3, [r7, #8]
8007eac: 785b ldrb r3, [r3, #1]
8007eae: 2b00 cmp r3, #0
8007eb0: d165 bne.n 8007f7e <HAL_PCD_EP_DB_Transmit+0x750>
8007eb2: 68fb ldr r3, [r7, #12]
8007eb4: 681b ldr r3, [r3, #0]
8007eb6: 65fb str r3, [r7, #92] @ 0x5c
8007eb8: 68fb ldr r3, [r7, #12]
8007eba: 681b ldr r3, [r3, #0]
8007ebc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007ec0: b29b uxth r3, r3
8007ec2: 461a mov r2, r3
8007ec4: 6dfb ldr r3, [r7, #92] @ 0x5c
8007ec6: 4413 add r3, r2
8007ec8: 65fb str r3, [r7, #92] @ 0x5c
8007eca: 68bb ldr r3, [r7, #8]
8007ecc: 781b ldrb r3, [r3, #0]
8007ece: 011a lsls r2, r3, #4
8007ed0: 6dfb ldr r3, [r7, #92] @ 0x5c
8007ed2: 4413 add r3, r2
8007ed4: f203 430c addw r3, r3, #1036 @ 0x40c
8007ed8: 65bb str r3, [r7, #88] @ 0x58
8007eda: 6dbb ldr r3, [r7, #88] @ 0x58
8007edc: 881b ldrh r3, [r3, #0]
8007ede: b29b uxth r3, r3
8007ee0: f3c3 0309 ubfx r3, r3, #0, #10
8007ee4: b29a uxth r2, r3
8007ee6: 6dbb ldr r3, [r7, #88] @ 0x58
8007ee8: 801a strh r2, [r3, #0]
8007eea: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007eee: 2b3e cmp r3, #62 @ 0x3e
8007ef0: d91d bls.n 8007f2e <HAL_PCD_EP_DB_Transmit+0x700>
8007ef2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007ef6: 095b lsrs r3, r3, #5
8007ef8: 66bb str r3, [r7, #104] @ 0x68
8007efa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007efe: f003 031f and.w r3, r3, #31
8007f02: 2b00 cmp r3, #0
8007f04: d102 bne.n 8007f0c <HAL_PCD_EP_DB_Transmit+0x6de>
8007f06: 6ebb ldr r3, [r7, #104] @ 0x68
8007f08: 3b01 subs r3, #1
8007f0a: 66bb str r3, [r7, #104] @ 0x68
8007f0c: 6dbb ldr r3, [r7, #88] @ 0x58
8007f0e: 881b ldrh r3, [r3, #0]
8007f10: b29a uxth r2, r3
8007f12: 6ebb ldr r3, [r7, #104] @ 0x68
8007f14: b29b uxth r3, r3
8007f16: 029b lsls r3, r3, #10
8007f18: b29b uxth r3, r3
8007f1a: 4313 orrs r3, r2
8007f1c: b29b uxth r3, r3
8007f1e: ea6f 4343 mvn.w r3, r3, lsl #17
8007f22: ea6f 4353 mvn.w r3, r3, lsr #17
8007f26: b29a uxth r2, r3
8007f28: 6dbb ldr r3, [r7, #88] @ 0x58
8007f2a: 801a strh r2, [r3, #0]
8007f2c: e041 b.n 8007fb2 <HAL_PCD_EP_DB_Transmit+0x784>
8007f2e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007f32: 2b00 cmp r3, #0
8007f34: d10a bne.n 8007f4c <HAL_PCD_EP_DB_Transmit+0x71e>
8007f36: 6dbb ldr r3, [r7, #88] @ 0x58
8007f38: 881b ldrh r3, [r3, #0]
8007f3a: b29b uxth r3, r3
8007f3c: ea6f 4343 mvn.w r3, r3, lsl #17
8007f40: ea6f 4353 mvn.w r3, r3, lsr #17
8007f44: b29a uxth r2, r3
8007f46: 6dbb ldr r3, [r7, #88] @ 0x58
8007f48: 801a strh r2, [r3, #0]
8007f4a: e032 b.n 8007fb2 <HAL_PCD_EP_DB_Transmit+0x784>
8007f4c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007f50: 085b lsrs r3, r3, #1
8007f52: 66bb str r3, [r7, #104] @ 0x68
8007f54: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007f58: f003 0301 and.w r3, r3, #1
8007f5c: 2b00 cmp r3, #0
8007f5e: d002 beq.n 8007f66 <HAL_PCD_EP_DB_Transmit+0x738>
8007f60: 6ebb ldr r3, [r7, #104] @ 0x68
8007f62: 3301 adds r3, #1
8007f64: 66bb str r3, [r7, #104] @ 0x68
8007f66: 6dbb ldr r3, [r7, #88] @ 0x58
8007f68: 881b ldrh r3, [r3, #0]
8007f6a: b29a uxth r2, r3
8007f6c: 6ebb ldr r3, [r7, #104] @ 0x68
8007f6e: b29b uxth r3, r3
8007f70: 029b lsls r3, r3, #10
8007f72: b29b uxth r3, r3
8007f74: 4313 orrs r3, r2
8007f76: b29a uxth r2, r3
8007f78: 6dbb ldr r3, [r7, #88] @ 0x58
8007f7a: 801a strh r2, [r3, #0]
8007f7c: e019 b.n 8007fb2 <HAL_PCD_EP_DB_Transmit+0x784>
8007f7e: 68bb ldr r3, [r7, #8]
8007f80: 785b ldrb r3, [r3, #1]
8007f82: 2b01 cmp r3, #1
8007f84: d115 bne.n 8007fb2 <HAL_PCD_EP_DB_Transmit+0x784>
8007f86: 68fb ldr r3, [r7, #12]
8007f88: 681b ldr r3, [r3, #0]
8007f8a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007f8e: b29b uxth r3, r3
8007f90: 461a mov r2, r3
8007f92: 6d7b ldr r3, [r7, #84] @ 0x54
8007f94: 4413 add r3, r2
8007f96: 657b str r3, [r7, #84] @ 0x54
8007f98: 68bb ldr r3, [r7, #8]
8007f9a: 781b ldrb r3, [r3, #0]
8007f9c: 011a lsls r2, r3, #4
8007f9e: 6d7b ldr r3, [r7, #84] @ 0x54
8007fa0: 4413 add r3, r2
8007fa2: f203 430c addw r3, r3, #1036 @ 0x40c
8007fa6: 653b str r3, [r7, #80] @ 0x50
8007fa8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007fac: b29a uxth r2, r3
8007fae: 6d3b ldr r3, [r7, #80] @ 0x50
8007fb0: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8007fb2: 68fb ldr r3, [r7, #12]
8007fb4: 6818 ldr r0, [r3, #0]
8007fb6: 68bb ldr r3, [r7, #8]
8007fb8: 6959 ldr r1, [r3, #20]
8007fba: 68bb ldr r3, [r7, #8]
8007fbc: 895a ldrh r2, [r3, #10]
8007fbe: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007fc2: b29b uxth r3, r3
8007fc4: f004 f8cb bl 800c15e <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
8007fc8: 68fb ldr r3, [r7, #12]
8007fca: 681b ldr r3, [r3, #0]
8007fcc: 461a mov r2, r3
8007fce: 68bb ldr r3, [r7, #8]
8007fd0: 781b ldrb r3, [r3, #0]
8007fd2: 009b lsls r3, r3, #2
8007fd4: 4413 add r3, r2
8007fd6: 881b ldrh r3, [r3, #0]
8007fd8: b29b uxth r3, r3
8007fda: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007fde: f023 0340 bic.w r3, r3, #64 @ 0x40
8007fe2: 82bb strh r3, [r7, #20]
8007fe4: 8abb ldrh r3, [r7, #20]
8007fe6: f083 0310 eor.w r3, r3, #16
8007fea: 82bb strh r3, [r7, #20]
8007fec: 8abb ldrh r3, [r7, #20]
8007fee: f083 0320 eor.w r3, r3, #32
8007ff2: 82bb strh r3, [r7, #20]
8007ff4: 68fb ldr r3, [r7, #12]
8007ff6: 681b ldr r3, [r3, #0]
8007ff8: 461a mov r2, r3
8007ffa: 68bb ldr r3, [r7, #8]
8007ffc: 781b ldrb r3, [r3, #0]
8007ffe: 009b lsls r3, r3, #2
8008000: 441a add r2, r3
8008002: 8abb ldrh r3, [r7, #20]
8008004: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8008008: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800800c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8008010: f043 0380 orr.w r3, r3, #128 @ 0x80
8008014: b29b uxth r3, r3
8008016: 8013 strh r3, [r2, #0]
return HAL_OK;
8008018: 2300 movs r3, #0
}
800801a: 4618 mov r0, r3
800801c: 3790 adds r7, #144 @ 0x90
800801e: 46bd mov sp, r7
8008020: bd80 pop {r7, pc}
08008022 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
8008022: b480 push {r7}
8008024: b087 sub sp, #28
8008026: af00 add r7, sp, #0
8008028: 60f8 str r0, [r7, #12]
800802a: 607b str r3, [r7, #4]
800802c: 460b mov r3, r1
800802e: 817b strh r3, [r7, #10]
8008030: 4613 mov r3, r2
8008032: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8008034: 897b ldrh r3, [r7, #10]
8008036: f003 0380 and.w r3, r3, #128 @ 0x80
800803a: b29b uxth r3, r3
800803c: 2b00 cmp r3, #0
800803e: d00b beq.n 8008058 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8008040: 897b ldrh r3, [r7, #10]
8008042: f003 0207 and.w r2, r3, #7
8008046: 4613 mov r3, r2
8008048: 009b lsls r3, r3, #2
800804a: 4413 add r3, r2
800804c: 00db lsls r3, r3, #3
800804e: 3310 adds r3, #16
8008050: 68fa ldr r2, [r7, #12]
8008052: 4413 add r3, r2
8008054: 617b str r3, [r7, #20]
8008056: e009 b.n 800806c <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8008058: 897a ldrh r2, [r7, #10]
800805a: 4613 mov r3, r2
800805c: 009b lsls r3, r3, #2
800805e: 4413 add r3, r2
8008060: 00db lsls r3, r3, #3
8008062: f503 73a8 add.w r3, r3, #336 @ 0x150
8008066: 68fa ldr r2, [r7, #12]
8008068: 4413 add r3, r2
800806a: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
800806c: 893b ldrh r3, [r7, #8]
800806e: 2b00 cmp r3, #0
8008070: d107 bne.n 8008082 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8008072: 697b ldr r3, [r7, #20]
8008074: 2200 movs r2, #0
8008076: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8008078: 687b ldr r3, [r7, #4]
800807a: b29a uxth r2, r3
800807c: 697b ldr r3, [r7, #20]
800807e: 80da strh r2, [r3, #6]
8008080: e00b b.n 800809a <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8008082: 697b ldr r3, [r7, #20]
8008084: 2201 movs r2, #1
8008086: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8008088: 687b ldr r3, [r7, #4]
800808a: b29a uxth r2, r3
800808c: 697b ldr r3, [r7, #20]
800808e: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8008090: 687b ldr r3, [r7, #4]
8008092: 0c1b lsrs r3, r3, #16
8008094: b29a uxth r2, r3
8008096: 697b ldr r3, [r7, #20]
8008098: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
800809a: 2300 movs r3, #0
}
800809c: 4618 mov r0, r3
800809e: 371c adds r7, #28
80080a0: 46bd mov sp, r7
80080a2: bc80 pop {r7}
80080a4: 4770 bx lr
...
080080a8 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
80080a8: b580 push {r7, lr}
80080aa: b086 sub sp, #24
80080ac: af00 add r7, sp, #0
80080ae: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
80080b0: 687b ldr r3, [r7, #4]
80080b2: 2b00 cmp r3, #0
80080b4: d101 bne.n 80080ba <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
80080b6: 2301 movs r3, #1
80080b8: e272 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
80080ba: 687b ldr r3, [r7, #4]
80080bc: 681b ldr r3, [r3, #0]
80080be: f003 0301 and.w r3, r3, #1
80080c2: 2b00 cmp r3, #0
80080c4: f000 8087 beq.w 80081d6 <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
80080c8: 4b92 ldr r3, [pc, #584] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80080ca: 685b ldr r3, [r3, #4]
80080cc: f003 030c and.w r3, r3, #12
80080d0: 2b04 cmp r3, #4
80080d2: d00c beq.n 80080ee <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
80080d4: 4b8f ldr r3, [pc, #572] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80080d6: 685b ldr r3, [r3, #4]
80080d8: f003 030c and.w r3, r3, #12
80080dc: 2b08 cmp r3, #8
80080de: d112 bne.n 8008106 <HAL_RCC_OscConfig+0x5e>
80080e0: 4b8c ldr r3, [pc, #560] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80080e2: 685b ldr r3, [r3, #4]
80080e4: f403 3380 and.w r3, r3, #65536 @ 0x10000
80080e8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80080ec: d10b bne.n 8008106 <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80080ee: 4b89 ldr r3, [pc, #548] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80080f0: 681b ldr r3, [r3, #0]
80080f2: f403 3300 and.w r3, r3, #131072 @ 0x20000
80080f6: 2b00 cmp r3, #0
80080f8: d06c beq.n 80081d4 <HAL_RCC_OscConfig+0x12c>
80080fa: 687b ldr r3, [r7, #4]
80080fc: 685b ldr r3, [r3, #4]
80080fe: 2b00 cmp r3, #0
8008100: d168 bne.n 80081d4 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
8008102: 2301 movs r3, #1
8008104: e24c b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8008106: 687b ldr r3, [r7, #4]
8008108: 685b ldr r3, [r3, #4]
800810a: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800810e: d106 bne.n 800811e <HAL_RCC_OscConfig+0x76>
8008110: 4b80 ldr r3, [pc, #512] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008112: 681b ldr r3, [r3, #0]
8008114: 4a7f ldr r2, [pc, #508] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008116: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800811a: 6013 str r3, [r2, #0]
800811c: e02e b.n 800817c <HAL_RCC_OscConfig+0xd4>
800811e: 687b ldr r3, [r7, #4]
8008120: 685b ldr r3, [r3, #4]
8008122: 2b00 cmp r3, #0
8008124: d10c bne.n 8008140 <HAL_RCC_OscConfig+0x98>
8008126: 4b7b ldr r3, [pc, #492] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008128: 681b ldr r3, [r3, #0]
800812a: 4a7a ldr r2, [pc, #488] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
800812c: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8008130: 6013 str r3, [r2, #0]
8008132: 4b78 ldr r3, [pc, #480] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008134: 681b ldr r3, [r3, #0]
8008136: 4a77 ldr r2, [pc, #476] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008138: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800813c: 6013 str r3, [r2, #0]
800813e: e01d b.n 800817c <HAL_RCC_OscConfig+0xd4>
8008140: 687b ldr r3, [r7, #4]
8008142: 685b ldr r3, [r3, #4]
8008144: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
8008148: d10c bne.n 8008164 <HAL_RCC_OscConfig+0xbc>
800814a: 4b72 ldr r3, [pc, #456] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
800814c: 681b ldr r3, [r3, #0]
800814e: 4a71 ldr r2, [pc, #452] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008150: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8008154: 6013 str r3, [r2, #0]
8008156: 4b6f ldr r3, [pc, #444] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008158: 681b ldr r3, [r3, #0]
800815a: 4a6e ldr r2, [pc, #440] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
800815c: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8008160: 6013 str r3, [r2, #0]
8008162: e00b b.n 800817c <HAL_RCC_OscConfig+0xd4>
8008164: 4b6b ldr r3, [pc, #428] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008166: 681b ldr r3, [r3, #0]
8008168: 4a6a ldr r2, [pc, #424] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
800816a: f423 3380 bic.w r3, r3, #65536 @ 0x10000
800816e: 6013 str r3, [r2, #0]
8008170: 4b68 ldr r3, [pc, #416] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008172: 681b ldr r3, [r3, #0]
8008174: 4a67 ldr r2, [pc, #412] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008176: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800817a: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
800817c: 687b ldr r3, [r7, #4]
800817e: 685b ldr r3, [r3, #4]
8008180: 2b00 cmp r3, #0
8008182: d013 beq.n 80081ac <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008184: f7fc ffa4 bl 80050d0 <HAL_GetTick>
8008188: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800818a: e008 b.n 800819e <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
800818c: f7fc ffa0 bl 80050d0 <HAL_GetTick>
8008190: 4602 mov r2, r0
8008192: 693b ldr r3, [r7, #16]
8008194: 1ad3 subs r3, r2, r3
8008196: 2b64 cmp r3, #100 @ 0x64
8008198: d901 bls.n 800819e <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
800819a: 2303 movs r3, #3
800819c: e200 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800819e: 4b5d ldr r3, [pc, #372] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80081a0: 681b ldr r3, [r3, #0]
80081a2: f403 3300 and.w r3, r3, #131072 @ 0x20000
80081a6: 2b00 cmp r3, #0
80081a8: d0f0 beq.n 800818c <HAL_RCC_OscConfig+0xe4>
80081aa: e014 b.n 80081d6 <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80081ac: f7fc ff90 bl 80050d0 <HAL_GetTick>
80081b0: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80081b2: e008 b.n 80081c6 <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
80081b4: f7fc ff8c bl 80050d0 <HAL_GetTick>
80081b8: 4602 mov r2, r0
80081ba: 693b ldr r3, [r7, #16]
80081bc: 1ad3 subs r3, r2, r3
80081be: 2b64 cmp r3, #100 @ 0x64
80081c0: d901 bls.n 80081c6 <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
80081c2: 2303 movs r3, #3
80081c4: e1ec b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80081c6: 4b53 ldr r3, [pc, #332] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80081c8: 681b ldr r3, [r3, #0]
80081ca: f403 3300 and.w r3, r3, #131072 @ 0x20000
80081ce: 2b00 cmp r3, #0
80081d0: d1f0 bne.n 80081b4 <HAL_RCC_OscConfig+0x10c>
80081d2: e000 b.n 80081d6 <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80081d4: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
80081d6: 687b ldr r3, [r7, #4]
80081d8: 681b ldr r3, [r3, #0]
80081da: f003 0302 and.w r3, r3, #2
80081de: 2b00 cmp r3, #0
80081e0: d063 beq.n 80082aa <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
80081e2: 4b4c ldr r3, [pc, #304] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80081e4: 685b ldr r3, [r3, #4]
80081e6: f003 030c and.w r3, r3, #12
80081ea: 2b00 cmp r3, #0
80081ec: d00b beq.n 8008206 <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
80081ee: 4b49 ldr r3, [pc, #292] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80081f0: 685b ldr r3, [r3, #4]
80081f2: f003 030c and.w r3, r3, #12
80081f6: 2b08 cmp r3, #8
80081f8: d11c bne.n 8008234 <HAL_RCC_OscConfig+0x18c>
80081fa: 4b46 ldr r3, [pc, #280] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80081fc: 685b ldr r3, [r3, #4]
80081fe: f403 3380 and.w r3, r3, #65536 @ 0x10000
8008202: 2b00 cmp r3, #0
8008204: d116 bne.n 8008234 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8008206: 4b43 ldr r3, [pc, #268] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008208: 681b ldr r3, [r3, #0]
800820a: f003 0302 and.w r3, r3, #2
800820e: 2b00 cmp r3, #0
8008210: d005 beq.n 800821e <HAL_RCC_OscConfig+0x176>
8008212: 687b ldr r3, [r7, #4]
8008214: 691b ldr r3, [r3, #16]
8008216: 2b01 cmp r3, #1
8008218: d001 beq.n 800821e <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
800821a: 2301 movs r3, #1
800821c: e1c0 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800821e: 4b3d ldr r3, [pc, #244] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008220: 681b ldr r3, [r3, #0]
8008222: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8008226: 687b ldr r3, [r7, #4]
8008228: 695b ldr r3, [r3, #20]
800822a: 00db lsls r3, r3, #3
800822c: 4939 ldr r1, [pc, #228] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
800822e: 4313 orrs r3, r2
8008230: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8008232: e03a b.n 80082aa <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8008234: 687b ldr r3, [r7, #4]
8008236: 691b ldr r3, [r3, #16]
8008238: 2b00 cmp r3, #0
800823a: d020 beq.n 800827e <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
800823c: 4b36 ldr r3, [pc, #216] @ (8008318 <HAL_RCC_OscConfig+0x270>)
800823e: 2201 movs r2, #1
8008240: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008242: f7fc ff45 bl 80050d0 <HAL_GetTick>
8008246: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8008248: e008 b.n 800825c <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800824a: f7fc ff41 bl 80050d0 <HAL_GetTick>
800824e: 4602 mov r2, r0
8008250: 693b ldr r3, [r7, #16]
8008252: 1ad3 subs r3, r2, r3
8008254: 2b02 cmp r3, #2
8008256: d901 bls.n 800825c <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
8008258: 2303 movs r3, #3
800825a: e1a1 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800825c: 4b2d ldr r3, [pc, #180] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
800825e: 681b ldr r3, [r3, #0]
8008260: f003 0302 and.w r3, r3, #2
8008264: 2b00 cmp r3, #0
8008266: d0f0 beq.n 800824a <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8008268: 4b2a ldr r3, [pc, #168] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
800826a: 681b ldr r3, [r3, #0]
800826c: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8008270: 687b ldr r3, [r7, #4]
8008272: 695b ldr r3, [r3, #20]
8008274: 00db lsls r3, r3, #3
8008276: 4927 ldr r1, [pc, #156] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
8008278: 4313 orrs r3, r2
800827a: 600b str r3, [r1, #0]
800827c: e015 b.n 80082aa <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
800827e: 4b26 ldr r3, [pc, #152] @ (8008318 <HAL_RCC_OscConfig+0x270>)
8008280: 2200 movs r2, #0
8008282: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008284: f7fc ff24 bl 80050d0 <HAL_GetTick>
8008288: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800828a: e008 b.n 800829e <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800828c: f7fc ff20 bl 80050d0 <HAL_GetTick>
8008290: 4602 mov r2, r0
8008292: 693b ldr r3, [r7, #16]
8008294: 1ad3 subs r3, r2, r3
8008296: 2b02 cmp r3, #2
8008298: d901 bls.n 800829e <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
800829a: 2303 movs r3, #3
800829c: e180 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800829e: 4b1d ldr r3, [pc, #116] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80082a0: 681b ldr r3, [r3, #0]
80082a2: f003 0302 and.w r3, r3, #2
80082a6: 2b00 cmp r3, #0
80082a8: d1f0 bne.n 800828c <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
80082aa: 687b ldr r3, [r7, #4]
80082ac: 681b ldr r3, [r3, #0]
80082ae: f003 0308 and.w r3, r3, #8
80082b2: 2b00 cmp r3, #0
80082b4: d03a beq.n 800832c <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
80082b6: 687b ldr r3, [r7, #4]
80082b8: 699b ldr r3, [r3, #24]
80082ba: 2b00 cmp r3, #0
80082bc: d019 beq.n 80082f2 <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
80082be: 4b17 ldr r3, [pc, #92] @ (800831c <HAL_RCC_OscConfig+0x274>)
80082c0: 2201 movs r2, #1
80082c2: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80082c4: f7fc ff04 bl 80050d0 <HAL_GetTick>
80082c8: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80082ca: e008 b.n 80082de <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80082cc: f7fc ff00 bl 80050d0 <HAL_GetTick>
80082d0: 4602 mov r2, r0
80082d2: 693b ldr r3, [r7, #16]
80082d4: 1ad3 subs r3, r2, r3
80082d6: 2b02 cmp r3, #2
80082d8: d901 bls.n 80082de <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
80082da: 2303 movs r3, #3
80082dc: e160 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80082de: 4b0d ldr r3, [pc, #52] @ (8008314 <HAL_RCC_OscConfig+0x26c>)
80082e0: 6a5b ldr r3, [r3, #36] @ 0x24
80082e2: f003 0302 and.w r3, r3, #2
80082e6: 2b00 cmp r3, #0
80082e8: d0f0 beq.n 80082cc <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
80082ea: 2001 movs r0, #1
80082ec: f000 fad0 bl 8008890 <RCC_Delay>
80082f0: e01c b.n 800832c <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
80082f2: 4b0a ldr r3, [pc, #40] @ (800831c <HAL_RCC_OscConfig+0x274>)
80082f4: 2200 movs r2, #0
80082f6: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80082f8: f7fc feea bl 80050d0 <HAL_GetTick>
80082fc: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80082fe: e00f b.n 8008320 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8008300: f7fc fee6 bl 80050d0 <HAL_GetTick>
8008304: 4602 mov r2, r0
8008306: 693b ldr r3, [r7, #16]
8008308: 1ad3 subs r3, r2, r3
800830a: 2b02 cmp r3, #2
800830c: d908 bls.n 8008320 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
800830e: 2303 movs r3, #3
8008310: e146 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
8008312: bf00 nop
8008314: 40021000 .word 0x40021000
8008318: 42420000 .word 0x42420000
800831c: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8008320: 4b92 ldr r3, [pc, #584] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008322: 6a5b ldr r3, [r3, #36] @ 0x24
8008324: f003 0302 and.w r3, r3, #2
8008328: 2b00 cmp r3, #0
800832a: d1e9 bne.n 8008300 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
800832c: 687b ldr r3, [r7, #4]
800832e: 681b ldr r3, [r3, #0]
8008330: f003 0304 and.w r3, r3, #4
8008334: 2b00 cmp r3, #0
8008336: f000 80a6 beq.w 8008486 <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
800833a: 2300 movs r3, #0
800833c: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
800833e: 4b8b ldr r3, [pc, #556] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008340: 69db ldr r3, [r3, #28]
8008342: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8008346: 2b00 cmp r3, #0
8008348: d10d bne.n 8008366 <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
800834a: 4b88 ldr r3, [pc, #544] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
800834c: 69db ldr r3, [r3, #28]
800834e: 4a87 ldr r2, [pc, #540] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008350: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8008354: 61d3 str r3, [r2, #28]
8008356: 4b85 ldr r3, [pc, #532] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008358: 69db ldr r3, [r3, #28]
800835a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800835e: 60bb str r3, [r7, #8]
8008360: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8008362: 2301 movs r3, #1
8008364: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008366: 4b82 ldr r3, [pc, #520] @ (8008570 <HAL_RCC_OscConfig+0x4c8>)
8008368: 681b ldr r3, [r3, #0]
800836a: f403 7380 and.w r3, r3, #256 @ 0x100
800836e: 2b00 cmp r3, #0
8008370: d118 bne.n 80083a4 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8008372: 4b7f ldr r3, [pc, #508] @ (8008570 <HAL_RCC_OscConfig+0x4c8>)
8008374: 681b ldr r3, [r3, #0]
8008376: 4a7e ldr r2, [pc, #504] @ (8008570 <HAL_RCC_OscConfig+0x4c8>)
8008378: f443 7380 orr.w r3, r3, #256 @ 0x100
800837c: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800837e: f7fc fea7 bl 80050d0 <HAL_GetTick>
8008382: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008384: e008 b.n 8008398 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8008386: f7fc fea3 bl 80050d0 <HAL_GetTick>
800838a: 4602 mov r2, r0
800838c: 693b ldr r3, [r7, #16]
800838e: 1ad3 subs r3, r2, r3
8008390: 2b64 cmp r3, #100 @ 0x64
8008392: d901 bls.n 8008398 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8008394: 2303 movs r3, #3
8008396: e103 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008398: 4b75 ldr r3, [pc, #468] @ (8008570 <HAL_RCC_OscConfig+0x4c8>)
800839a: 681b ldr r3, [r3, #0]
800839c: f403 7380 and.w r3, r3, #256 @ 0x100
80083a0: 2b00 cmp r3, #0
80083a2: d0f0 beq.n 8008386 <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
80083a4: 687b ldr r3, [r7, #4]
80083a6: 68db ldr r3, [r3, #12]
80083a8: 2b01 cmp r3, #1
80083aa: d106 bne.n 80083ba <HAL_RCC_OscConfig+0x312>
80083ac: 4b6f ldr r3, [pc, #444] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083ae: 6a1b ldr r3, [r3, #32]
80083b0: 4a6e ldr r2, [pc, #440] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083b2: f043 0301 orr.w r3, r3, #1
80083b6: 6213 str r3, [r2, #32]
80083b8: e02d b.n 8008416 <HAL_RCC_OscConfig+0x36e>
80083ba: 687b ldr r3, [r7, #4]
80083bc: 68db ldr r3, [r3, #12]
80083be: 2b00 cmp r3, #0
80083c0: d10c bne.n 80083dc <HAL_RCC_OscConfig+0x334>
80083c2: 4b6a ldr r3, [pc, #424] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083c4: 6a1b ldr r3, [r3, #32]
80083c6: 4a69 ldr r2, [pc, #420] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083c8: f023 0301 bic.w r3, r3, #1
80083cc: 6213 str r3, [r2, #32]
80083ce: 4b67 ldr r3, [pc, #412] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083d0: 6a1b ldr r3, [r3, #32]
80083d2: 4a66 ldr r2, [pc, #408] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083d4: f023 0304 bic.w r3, r3, #4
80083d8: 6213 str r3, [r2, #32]
80083da: e01c b.n 8008416 <HAL_RCC_OscConfig+0x36e>
80083dc: 687b ldr r3, [r7, #4]
80083de: 68db ldr r3, [r3, #12]
80083e0: 2b05 cmp r3, #5
80083e2: d10c bne.n 80083fe <HAL_RCC_OscConfig+0x356>
80083e4: 4b61 ldr r3, [pc, #388] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083e6: 6a1b ldr r3, [r3, #32]
80083e8: 4a60 ldr r2, [pc, #384] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083ea: f043 0304 orr.w r3, r3, #4
80083ee: 6213 str r3, [r2, #32]
80083f0: 4b5e ldr r3, [pc, #376] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083f2: 6a1b ldr r3, [r3, #32]
80083f4: 4a5d ldr r2, [pc, #372] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80083f6: f043 0301 orr.w r3, r3, #1
80083fa: 6213 str r3, [r2, #32]
80083fc: e00b b.n 8008416 <HAL_RCC_OscConfig+0x36e>
80083fe: 4b5b ldr r3, [pc, #364] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008400: 6a1b ldr r3, [r3, #32]
8008402: 4a5a ldr r2, [pc, #360] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008404: f023 0301 bic.w r3, r3, #1
8008408: 6213 str r3, [r2, #32]
800840a: 4b58 ldr r3, [pc, #352] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
800840c: 6a1b ldr r3, [r3, #32]
800840e: 4a57 ldr r2, [pc, #348] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008410: f023 0304 bic.w r3, r3, #4
8008414: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8008416: 687b ldr r3, [r7, #4]
8008418: 68db ldr r3, [r3, #12]
800841a: 2b00 cmp r3, #0
800841c: d015 beq.n 800844a <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800841e: f7fc fe57 bl 80050d0 <HAL_GetTick>
8008422: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008424: e00a b.n 800843c <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8008426: f7fc fe53 bl 80050d0 <HAL_GetTick>
800842a: 4602 mov r2, r0
800842c: 693b ldr r3, [r7, #16]
800842e: 1ad3 subs r3, r2, r3
8008430: f241 3288 movw r2, #5000 @ 0x1388
8008434: 4293 cmp r3, r2
8008436: d901 bls.n 800843c <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8008438: 2303 movs r3, #3
800843a: e0b1 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800843c: 4b4b ldr r3, [pc, #300] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
800843e: 6a1b ldr r3, [r3, #32]
8008440: f003 0302 and.w r3, r3, #2
8008444: 2b00 cmp r3, #0
8008446: d0ee beq.n 8008426 <HAL_RCC_OscConfig+0x37e>
8008448: e014 b.n 8008474 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800844a: f7fc fe41 bl 80050d0 <HAL_GetTick>
800844e: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8008450: e00a b.n 8008468 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8008452: f7fc fe3d bl 80050d0 <HAL_GetTick>
8008456: 4602 mov r2, r0
8008458: 693b ldr r3, [r7, #16]
800845a: 1ad3 subs r3, r2, r3
800845c: f241 3288 movw r2, #5000 @ 0x1388
8008460: 4293 cmp r3, r2
8008462: d901 bls.n 8008468 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8008464: 2303 movs r3, #3
8008466: e09b b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8008468: 4b40 ldr r3, [pc, #256] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
800846a: 6a1b ldr r3, [r3, #32]
800846c: f003 0302 and.w r3, r3, #2
8008470: 2b00 cmp r3, #0
8008472: d1ee bne.n 8008452 <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8008474: 7dfb ldrb r3, [r7, #23]
8008476: 2b01 cmp r3, #1
8008478: d105 bne.n 8008486 <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
800847a: 4b3c ldr r3, [pc, #240] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
800847c: 69db ldr r3, [r3, #28]
800847e: 4a3b ldr r2, [pc, #236] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008480: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8008484: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8008486: 687b ldr r3, [r7, #4]
8008488: 69db ldr r3, [r3, #28]
800848a: 2b00 cmp r3, #0
800848c: f000 8087 beq.w 800859e <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8008490: 4b36 ldr r3, [pc, #216] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008492: 685b ldr r3, [r3, #4]
8008494: f003 030c and.w r3, r3, #12
8008498: 2b08 cmp r3, #8
800849a: d061 beq.n 8008560 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
800849c: 687b ldr r3, [r7, #4]
800849e: 69db ldr r3, [r3, #28]
80084a0: 2b02 cmp r3, #2
80084a2: d146 bne.n 8008532 <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80084a4: 4b33 ldr r3, [pc, #204] @ (8008574 <HAL_RCC_OscConfig+0x4cc>)
80084a6: 2200 movs r2, #0
80084a8: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80084aa: f7fc fe11 bl 80050d0 <HAL_GetTick>
80084ae: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80084b0: e008 b.n 80084c4 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80084b2: f7fc fe0d bl 80050d0 <HAL_GetTick>
80084b6: 4602 mov r2, r0
80084b8: 693b ldr r3, [r7, #16]
80084ba: 1ad3 subs r3, r2, r3
80084bc: 2b02 cmp r3, #2
80084be: d901 bls.n 80084c4 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
80084c0: 2303 movs r3, #3
80084c2: e06d b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80084c4: 4b29 ldr r3, [pc, #164] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80084c6: 681b ldr r3, [r3, #0]
80084c8: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80084cc: 2b00 cmp r3, #0
80084ce: d1f0 bne.n 80084b2 <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
80084d0: 687b ldr r3, [r7, #4]
80084d2: 6a1b ldr r3, [r3, #32]
80084d4: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80084d8: d108 bne.n 80084ec <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
80084da: 4b24 ldr r3, [pc, #144] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80084dc: 685b ldr r3, [r3, #4]
80084de: f423 3200 bic.w r2, r3, #131072 @ 0x20000
80084e2: 687b ldr r3, [r7, #4]
80084e4: 689b ldr r3, [r3, #8]
80084e6: 4921 ldr r1, [pc, #132] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80084e8: 4313 orrs r3, r2
80084ea: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
80084ec: 4b1f ldr r3, [pc, #124] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
80084ee: 685b ldr r3, [r3, #4]
80084f0: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
80084f4: 687b ldr r3, [r7, #4]
80084f6: 6a19 ldr r1, [r3, #32]
80084f8: 687b ldr r3, [r7, #4]
80084fa: 6a5b ldr r3, [r3, #36] @ 0x24
80084fc: 430b orrs r3, r1
80084fe: 491b ldr r1, [pc, #108] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008500: 4313 orrs r3, r2
8008502: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8008504: 4b1b ldr r3, [pc, #108] @ (8008574 <HAL_RCC_OscConfig+0x4cc>)
8008506: 2201 movs r2, #1
8008508: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800850a: f7fc fde1 bl 80050d0 <HAL_GetTick>
800850e: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8008510: e008 b.n 8008524 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8008512: f7fc fddd bl 80050d0 <HAL_GetTick>
8008516: 4602 mov r2, r0
8008518: 693b ldr r3, [r7, #16]
800851a: 1ad3 subs r3, r2, r3
800851c: 2b02 cmp r3, #2
800851e: d901 bls.n 8008524 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8008520: 2303 movs r3, #3
8008522: e03d b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8008524: 4b11 ldr r3, [pc, #68] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008526: 681b ldr r3, [r3, #0]
8008528: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800852c: 2b00 cmp r3, #0
800852e: d0f0 beq.n 8008512 <HAL_RCC_OscConfig+0x46a>
8008530: e035 b.n 800859e <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8008532: 4b10 ldr r3, [pc, #64] @ (8008574 <HAL_RCC_OscConfig+0x4cc>)
8008534: 2200 movs r2, #0
8008536: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008538: f7fc fdca bl 80050d0 <HAL_GetTick>
800853c: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800853e: e008 b.n 8008552 <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8008540: f7fc fdc6 bl 80050d0 <HAL_GetTick>
8008544: 4602 mov r2, r0
8008546: 693b ldr r3, [r7, #16]
8008548: 1ad3 subs r3, r2, r3
800854a: 2b02 cmp r3, #2
800854c: d901 bls.n 8008552 <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
800854e: 2303 movs r3, #3
8008550: e026 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8008552: 4b06 ldr r3, [pc, #24] @ (800856c <HAL_RCC_OscConfig+0x4c4>)
8008554: 681b ldr r3, [r3, #0]
8008556: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
800855a: 2b00 cmp r3, #0
800855c: d1f0 bne.n 8008540 <HAL_RCC_OscConfig+0x498>
800855e: e01e b.n 800859e <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8008560: 687b ldr r3, [r7, #4]
8008562: 69db ldr r3, [r3, #28]
8008564: 2b01 cmp r3, #1
8008566: d107 bne.n 8008578 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8008568: 2301 movs r3, #1
800856a: e019 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
800856c: 40021000 .word 0x40021000
8008570: 40007000 .word 0x40007000
8008574: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8008578: 4b0b ldr r3, [pc, #44] @ (80085a8 <HAL_RCC_OscConfig+0x500>)
800857a: 685b ldr r3, [r3, #4]
800857c: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
800857e: 68fb ldr r3, [r7, #12]
8008580: f403 3280 and.w r2, r3, #65536 @ 0x10000
8008584: 687b ldr r3, [r7, #4]
8008586: 6a1b ldr r3, [r3, #32]
8008588: 429a cmp r2, r3
800858a: d106 bne.n 800859a <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
800858c: 68fb ldr r3, [r7, #12]
800858e: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
8008592: 687b ldr r3, [r7, #4]
8008594: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8008596: 429a cmp r2, r3
8008598: d001 beq.n 800859e <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
800859a: 2301 movs r3, #1
800859c: e000 b.n 80085a0 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
800859e: 2300 movs r3, #0
}
80085a0: 4618 mov r0, r3
80085a2: 3718 adds r7, #24
80085a4: 46bd mov sp, r7
80085a6: bd80 pop {r7, pc}
80085a8: 40021000 .word 0x40021000
080085ac <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
80085ac: b580 push {r7, lr}
80085ae: b084 sub sp, #16
80085b0: af00 add r7, sp, #0
80085b2: 6078 str r0, [r7, #4]
80085b4: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
80085b6: 687b ldr r3, [r7, #4]
80085b8: 2b00 cmp r3, #0
80085ba: d101 bne.n 80085c0 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
80085bc: 2301 movs r3, #1
80085be: e0d0 b.n 8008762 <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
80085c0: 4b6a ldr r3, [pc, #424] @ (800876c <HAL_RCC_ClockConfig+0x1c0>)
80085c2: 681b ldr r3, [r3, #0]
80085c4: f003 0307 and.w r3, r3, #7
80085c8: 683a ldr r2, [r7, #0]
80085ca: 429a cmp r2, r3
80085cc: d910 bls.n 80085f0 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80085ce: 4b67 ldr r3, [pc, #412] @ (800876c <HAL_RCC_ClockConfig+0x1c0>)
80085d0: 681b ldr r3, [r3, #0]
80085d2: f023 0207 bic.w r2, r3, #7
80085d6: 4965 ldr r1, [pc, #404] @ (800876c <HAL_RCC_ClockConfig+0x1c0>)
80085d8: 683b ldr r3, [r7, #0]
80085da: 4313 orrs r3, r2
80085dc: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80085de: 4b63 ldr r3, [pc, #396] @ (800876c <HAL_RCC_ClockConfig+0x1c0>)
80085e0: 681b ldr r3, [r3, #0]
80085e2: f003 0307 and.w r3, r3, #7
80085e6: 683a ldr r2, [r7, #0]
80085e8: 429a cmp r2, r3
80085ea: d001 beq.n 80085f0 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
80085ec: 2301 movs r3, #1
80085ee: e0b8 b.n 8008762 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
80085f0: 687b ldr r3, [r7, #4]
80085f2: 681b ldr r3, [r3, #0]
80085f4: f003 0302 and.w r3, r3, #2
80085f8: 2b00 cmp r3, #0
80085fa: d020 beq.n 800863e <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80085fc: 687b ldr r3, [r7, #4]
80085fe: 681b ldr r3, [r3, #0]
8008600: f003 0304 and.w r3, r3, #4
8008604: 2b00 cmp r3, #0
8008606: d005 beq.n 8008614 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8008608: 4b59 ldr r3, [pc, #356] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
800860a: 685b ldr r3, [r3, #4]
800860c: 4a58 ldr r2, [pc, #352] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
800860e: f443 63e0 orr.w r3, r3, #1792 @ 0x700
8008612: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8008614: 687b ldr r3, [r7, #4]
8008616: 681b ldr r3, [r3, #0]
8008618: f003 0308 and.w r3, r3, #8
800861c: 2b00 cmp r3, #0
800861e: d005 beq.n 800862c <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8008620: 4b53 ldr r3, [pc, #332] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
8008622: 685b ldr r3, [r3, #4]
8008624: 4a52 ldr r2, [pc, #328] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
8008626: f443 5360 orr.w r3, r3, #14336 @ 0x3800
800862a: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
800862c: 4b50 ldr r3, [pc, #320] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
800862e: 685b ldr r3, [r3, #4]
8008630: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8008634: 687b ldr r3, [r7, #4]
8008636: 689b ldr r3, [r3, #8]
8008638: 494d ldr r1, [pc, #308] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
800863a: 4313 orrs r3, r2
800863c: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
800863e: 687b ldr r3, [r7, #4]
8008640: 681b ldr r3, [r3, #0]
8008642: f003 0301 and.w r3, r3, #1
8008646: 2b00 cmp r3, #0
8008648: d040 beq.n 80086cc <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
800864a: 687b ldr r3, [r7, #4]
800864c: 685b ldr r3, [r3, #4]
800864e: 2b01 cmp r3, #1
8008650: d107 bne.n 8008662 <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8008652: 4b47 ldr r3, [pc, #284] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
8008654: 681b ldr r3, [r3, #0]
8008656: f403 3300 and.w r3, r3, #131072 @ 0x20000
800865a: 2b00 cmp r3, #0
800865c: d115 bne.n 800868a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800865e: 2301 movs r3, #1
8008660: e07f b.n 8008762 <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8008662: 687b ldr r3, [r7, #4]
8008664: 685b ldr r3, [r3, #4]
8008666: 2b02 cmp r3, #2
8008668: d107 bne.n 800867a <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800866a: 4b41 ldr r3, [pc, #260] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
800866c: 681b ldr r3, [r3, #0]
800866e: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8008672: 2b00 cmp r3, #0
8008674: d109 bne.n 800868a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8008676: 2301 movs r3, #1
8008678: e073 b.n 8008762 <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800867a: 4b3d ldr r3, [pc, #244] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
800867c: 681b ldr r3, [r3, #0]
800867e: f003 0302 and.w r3, r3, #2
8008682: 2b00 cmp r3, #0
8008684: d101 bne.n 800868a <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8008686: 2301 movs r3, #1
8008688: e06b b.n 8008762 <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
800868a: 4b39 ldr r3, [pc, #228] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
800868c: 685b ldr r3, [r3, #4]
800868e: f023 0203 bic.w r2, r3, #3
8008692: 687b ldr r3, [r7, #4]
8008694: 685b ldr r3, [r3, #4]
8008696: 4936 ldr r1, [pc, #216] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
8008698: 4313 orrs r3, r2
800869a: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
800869c: f7fc fd18 bl 80050d0 <HAL_GetTick>
80086a0: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80086a2: e00a b.n 80086ba <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
80086a4: f7fc fd14 bl 80050d0 <HAL_GetTick>
80086a8: 4602 mov r2, r0
80086aa: 68fb ldr r3, [r7, #12]
80086ac: 1ad3 subs r3, r2, r3
80086ae: f241 3288 movw r2, #5000 @ 0x1388
80086b2: 4293 cmp r3, r2
80086b4: d901 bls.n 80086ba <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
80086b6: 2303 movs r3, #3
80086b8: e053 b.n 8008762 <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
80086ba: 4b2d ldr r3, [pc, #180] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
80086bc: 685b ldr r3, [r3, #4]
80086be: f003 020c and.w r2, r3, #12
80086c2: 687b ldr r3, [r7, #4]
80086c4: 685b ldr r3, [r3, #4]
80086c6: 009b lsls r3, r3, #2
80086c8: 429a cmp r2, r3
80086ca: d1eb bne.n 80086a4 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
80086cc: 4b27 ldr r3, [pc, #156] @ (800876c <HAL_RCC_ClockConfig+0x1c0>)
80086ce: 681b ldr r3, [r3, #0]
80086d0: f003 0307 and.w r3, r3, #7
80086d4: 683a ldr r2, [r7, #0]
80086d6: 429a cmp r2, r3
80086d8: d210 bcs.n 80086fc <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
80086da: 4b24 ldr r3, [pc, #144] @ (800876c <HAL_RCC_ClockConfig+0x1c0>)
80086dc: 681b ldr r3, [r3, #0]
80086de: f023 0207 bic.w r2, r3, #7
80086e2: 4922 ldr r1, [pc, #136] @ (800876c <HAL_RCC_ClockConfig+0x1c0>)
80086e4: 683b ldr r3, [r7, #0]
80086e6: 4313 orrs r3, r2
80086e8: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
80086ea: 4b20 ldr r3, [pc, #128] @ (800876c <HAL_RCC_ClockConfig+0x1c0>)
80086ec: 681b ldr r3, [r3, #0]
80086ee: f003 0307 and.w r3, r3, #7
80086f2: 683a ldr r2, [r7, #0]
80086f4: 429a cmp r2, r3
80086f6: d001 beq.n 80086fc <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
80086f8: 2301 movs r3, #1
80086fa: e032 b.n 8008762 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80086fc: 687b ldr r3, [r7, #4]
80086fe: 681b ldr r3, [r3, #0]
8008700: f003 0304 and.w r3, r3, #4
8008704: 2b00 cmp r3, #0
8008706: d008 beq.n 800871a <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8008708: 4b19 ldr r3, [pc, #100] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
800870a: 685b ldr r3, [r3, #4]
800870c: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8008710: 687b ldr r3, [r7, #4]
8008712: 68db ldr r3, [r3, #12]
8008714: 4916 ldr r1, [pc, #88] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
8008716: 4313 orrs r3, r2
8008718: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
800871a: 687b ldr r3, [r7, #4]
800871c: 681b ldr r3, [r3, #0]
800871e: f003 0308 and.w r3, r3, #8
8008722: 2b00 cmp r3, #0
8008724: d009 beq.n 800873a <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8008726: 4b12 ldr r3, [pc, #72] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
8008728: 685b ldr r3, [r3, #4]
800872a: f423 5260 bic.w r2, r3, #14336 @ 0x3800
800872e: 687b ldr r3, [r7, #4]
8008730: 691b ldr r3, [r3, #16]
8008732: 00db lsls r3, r3, #3
8008734: 490e ldr r1, [pc, #56] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
8008736: 4313 orrs r3, r2
8008738: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
800873a: f000 f821 bl 8008780 <HAL_RCC_GetSysClockFreq>
800873e: 4602 mov r2, r0
8008740: 4b0b ldr r3, [pc, #44] @ (8008770 <HAL_RCC_ClockConfig+0x1c4>)
8008742: 685b ldr r3, [r3, #4]
8008744: 091b lsrs r3, r3, #4
8008746: f003 030f and.w r3, r3, #15
800874a: 490a ldr r1, [pc, #40] @ (8008774 <HAL_RCC_ClockConfig+0x1c8>)
800874c: 5ccb ldrb r3, [r1, r3]
800874e: fa22 f303 lsr.w r3, r2, r3
8008752: 4a09 ldr r2, [pc, #36] @ (8008778 <HAL_RCC_ClockConfig+0x1cc>)
8008754: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
8008756: 4b09 ldr r3, [pc, #36] @ (800877c <HAL_RCC_ClockConfig+0x1d0>)
8008758: 681b ldr r3, [r3, #0]
800875a: 4618 mov r0, r3
800875c: f7fc fc76 bl 800504c <HAL_InitTick>
return HAL_OK;
8008760: 2300 movs r3, #0
}
8008762: 4618 mov r0, r3
8008764: 3710 adds r7, #16
8008766: 46bd mov sp, r7
8008768: bd80 pop {r7, pc}
800876a: bf00 nop
800876c: 40022000 .word 0x40022000
8008770: 40021000 .word 0x40021000
8008774: 0800f498 .word 0x0800f498
8008778: 20000010 .word 0x20000010
800877c: 20000014 .word 0x20000014
08008780 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8008780: b480 push {r7}
8008782: b087 sub sp, #28
8008784: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8008786: 2300 movs r3, #0
8008788: 60fb str r3, [r7, #12]
800878a: 2300 movs r3, #0
800878c: 60bb str r3, [r7, #8]
800878e: 2300 movs r3, #0
8008790: 617b str r3, [r7, #20]
8008792: 2300 movs r3, #0
8008794: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
8008796: 2300 movs r3, #0
8008798: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
800879a: 4b1e ldr r3, [pc, #120] @ (8008814 <HAL_RCC_GetSysClockFreq+0x94>)
800879c: 685b ldr r3, [r3, #4]
800879e: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
80087a0: 68fb ldr r3, [r7, #12]
80087a2: f003 030c and.w r3, r3, #12
80087a6: 2b04 cmp r3, #4
80087a8: d002 beq.n 80087b0 <HAL_RCC_GetSysClockFreq+0x30>
80087aa: 2b08 cmp r3, #8
80087ac: d003 beq.n 80087b6 <HAL_RCC_GetSysClockFreq+0x36>
80087ae: e027 b.n 8008800 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
80087b0: 4b19 ldr r3, [pc, #100] @ (8008818 <HAL_RCC_GetSysClockFreq+0x98>)
80087b2: 613b str r3, [r7, #16]
break;
80087b4: e027 b.n 8008806 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
80087b6: 68fb ldr r3, [r7, #12]
80087b8: 0c9b lsrs r3, r3, #18
80087ba: f003 030f and.w r3, r3, #15
80087be: 4a17 ldr r2, [pc, #92] @ (800881c <HAL_RCC_GetSysClockFreq+0x9c>)
80087c0: 5cd3 ldrb r3, [r2, r3]
80087c2: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
80087c4: 68fb ldr r3, [r7, #12]
80087c6: f403 3380 and.w r3, r3, #65536 @ 0x10000
80087ca: 2b00 cmp r3, #0
80087cc: d010 beq.n 80087f0 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
80087ce: 4b11 ldr r3, [pc, #68] @ (8008814 <HAL_RCC_GetSysClockFreq+0x94>)
80087d0: 685b ldr r3, [r3, #4]
80087d2: 0c5b lsrs r3, r3, #17
80087d4: f003 0301 and.w r3, r3, #1
80087d8: 4a11 ldr r2, [pc, #68] @ (8008820 <HAL_RCC_GetSysClockFreq+0xa0>)
80087da: 5cd3 ldrb r3, [r2, r3]
80087dc: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
80087de: 687b ldr r3, [r7, #4]
80087e0: 4a0d ldr r2, [pc, #52] @ (8008818 <HAL_RCC_GetSysClockFreq+0x98>)
80087e2: fb03 f202 mul.w r2, r3, r2
80087e6: 68bb ldr r3, [r7, #8]
80087e8: fbb2 f3f3 udiv r3, r2, r3
80087ec: 617b str r3, [r7, #20]
80087ee: e004 b.n 80087fa <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
80087f0: 687b ldr r3, [r7, #4]
80087f2: 4a0c ldr r2, [pc, #48] @ (8008824 <HAL_RCC_GetSysClockFreq+0xa4>)
80087f4: fb02 f303 mul.w r3, r2, r3
80087f8: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
80087fa: 697b ldr r3, [r7, #20]
80087fc: 613b str r3, [r7, #16]
break;
80087fe: e002 b.n 8008806 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8008800: 4b09 ldr r3, [pc, #36] @ (8008828 <HAL_RCC_GetSysClockFreq+0xa8>)
8008802: 613b str r3, [r7, #16]
break;
8008804: bf00 nop
}
}
return sysclockfreq;
8008806: 693b ldr r3, [r7, #16]
}
8008808: 4618 mov r0, r3
800880a: 371c adds r7, #28
800880c: 46bd mov sp, r7
800880e: bc80 pop {r7}
8008810: 4770 bx lr
8008812: bf00 nop
8008814: 40021000 .word 0x40021000
8008818: 00b71b00 .word 0x00b71b00
800881c: 0800f4b0 .word 0x0800f4b0
8008820: 0800f4c0 .word 0x0800f4c0
8008824: 003d0900 .word 0x003d0900
8008828: 007a1200 .word 0x007a1200
0800882c <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
800882c: b480 push {r7}
800882e: af00 add r7, sp, #0
return SystemCoreClock;
8008830: 4b02 ldr r3, [pc, #8] @ (800883c <HAL_RCC_GetHCLKFreq+0x10>)
8008832: 681b ldr r3, [r3, #0]
}
8008834: 4618 mov r0, r3
8008836: 46bd mov sp, r7
8008838: bc80 pop {r7}
800883a: 4770 bx lr
800883c: 20000010 .word 0x20000010
08008840 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8008840: b580 push {r7, lr}
8008842: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
8008844: f7ff fff2 bl 800882c <HAL_RCC_GetHCLKFreq>
8008848: 4602 mov r2, r0
800884a: 4b05 ldr r3, [pc, #20] @ (8008860 <HAL_RCC_GetPCLK1Freq+0x20>)
800884c: 685b ldr r3, [r3, #4]
800884e: 0a1b lsrs r3, r3, #8
8008850: f003 0307 and.w r3, r3, #7
8008854: 4903 ldr r1, [pc, #12] @ (8008864 <HAL_RCC_GetPCLK1Freq+0x24>)
8008856: 5ccb ldrb r3, [r1, r3]
8008858: fa22 f303 lsr.w r3, r2, r3
}
800885c: 4618 mov r0, r3
800885e: bd80 pop {r7, pc}
8008860: 40021000 .word 0x40021000
8008864: 0800f4a8 .word 0x0800f4a8
08008868 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8008868: b580 push {r7, lr}
800886a: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
800886c: f7ff ffde bl 800882c <HAL_RCC_GetHCLKFreq>
8008870: 4602 mov r2, r0
8008872: 4b05 ldr r3, [pc, #20] @ (8008888 <HAL_RCC_GetPCLK2Freq+0x20>)
8008874: 685b ldr r3, [r3, #4]
8008876: 0adb lsrs r3, r3, #11
8008878: f003 0307 and.w r3, r3, #7
800887c: 4903 ldr r1, [pc, #12] @ (800888c <HAL_RCC_GetPCLK2Freq+0x24>)
800887e: 5ccb ldrb r3, [r1, r3]
8008880: fa22 f303 lsr.w r3, r2, r3
}
8008884: 4618 mov r0, r3
8008886: bd80 pop {r7, pc}
8008888: 40021000 .word 0x40021000
800888c: 0800f4a8 .word 0x0800f4a8
08008890 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8008890: b480 push {r7}
8008892: b085 sub sp, #20
8008894: af00 add r7, sp, #0
8008896: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8008898: 4b0a ldr r3, [pc, #40] @ (80088c4 <RCC_Delay+0x34>)
800889a: 681b ldr r3, [r3, #0]
800889c: 4a0a ldr r2, [pc, #40] @ (80088c8 <RCC_Delay+0x38>)
800889e: fba2 2303 umull r2, r3, r2, r3
80088a2: 0a5b lsrs r3, r3, #9
80088a4: 687a ldr r2, [r7, #4]
80088a6: fb02 f303 mul.w r3, r2, r3
80088aa: 60fb str r3, [r7, #12]
do
{
__NOP();
80088ac: bf00 nop
}
while (Delay --);
80088ae: 68fb ldr r3, [r7, #12]
80088b0: 1e5a subs r2, r3, #1
80088b2: 60fa str r2, [r7, #12]
80088b4: 2b00 cmp r3, #0
80088b6: d1f9 bne.n 80088ac <RCC_Delay+0x1c>
}
80088b8: bf00 nop
80088ba: bf00 nop
80088bc: 3714 adds r7, #20
80088be: 46bd mov sp, r7
80088c0: bc80 pop {r7}
80088c2: 4770 bx lr
80088c4: 20000010 .word 0x20000010
80088c8: 10624dd3 .word 0x10624dd3
080088cc <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
80088cc: b580 push {r7, lr}
80088ce: b086 sub sp, #24
80088d0: af00 add r7, sp, #0
80088d2: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
80088d4: 2300 movs r3, #0
80088d6: 613b str r3, [r7, #16]
80088d8: 2300 movs r3, #0
80088da: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
80088dc: 687b ldr r3, [r7, #4]
80088de: 681b ldr r3, [r3, #0]
80088e0: f003 0301 and.w r3, r3, #1
80088e4: 2b00 cmp r3, #0
80088e6: d07d beq.n 80089e4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
80088e8: 2300 movs r3, #0
80088ea: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
80088ec: 4b4f ldr r3, [pc, #316] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80088ee: 69db ldr r3, [r3, #28]
80088f0: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80088f4: 2b00 cmp r3, #0
80088f6: d10d bne.n 8008914 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
80088f8: 4b4c ldr r3, [pc, #304] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80088fa: 69db ldr r3, [r3, #28]
80088fc: 4a4b ldr r2, [pc, #300] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80088fe: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8008902: 61d3 str r3, [r2, #28]
8008904: 4b49 ldr r3, [pc, #292] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008906: 69db ldr r3, [r3, #28]
8008908: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800890c: 60bb str r3, [r7, #8]
800890e: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8008910: 2301 movs r3, #1
8008912: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008914: 4b46 ldr r3, [pc, #280] @ (8008a30 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008916: 681b ldr r3, [r3, #0]
8008918: f403 7380 and.w r3, r3, #256 @ 0x100
800891c: 2b00 cmp r3, #0
800891e: d118 bne.n 8008952 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8008920: 4b43 ldr r3, [pc, #268] @ (8008a30 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008922: 681b ldr r3, [r3, #0]
8008924: 4a42 ldr r2, [pc, #264] @ (8008a30 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008926: f443 7380 orr.w r3, r3, #256 @ 0x100
800892a: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
800892c: f7fc fbd0 bl 80050d0 <HAL_GetTick>
8008930: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008932: e008 b.n 8008946 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8008934: f7fc fbcc bl 80050d0 <HAL_GetTick>
8008938: 4602 mov r2, r0
800893a: 693b ldr r3, [r7, #16]
800893c: 1ad3 subs r3, r2, r3
800893e: 2b64 cmp r3, #100 @ 0x64
8008940: d901 bls.n 8008946 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8008942: 2303 movs r3, #3
8008944: e06d b.n 8008a22 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008946: 4b3a ldr r3, [pc, #232] @ (8008a30 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008948: 681b ldr r3, [r3, #0]
800894a: f403 7380 and.w r3, r3, #256 @ 0x100
800894e: 2b00 cmp r3, #0
8008950: d0f0 beq.n 8008934 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8008952: 4b36 ldr r3, [pc, #216] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008954: 6a1b ldr r3, [r3, #32]
8008956: f403 7340 and.w r3, r3, #768 @ 0x300
800895a: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
800895c: 68fb ldr r3, [r7, #12]
800895e: 2b00 cmp r3, #0
8008960: d02e beq.n 80089c0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8008962: 687b ldr r3, [r7, #4]
8008964: 685b ldr r3, [r3, #4]
8008966: f403 7340 and.w r3, r3, #768 @ 0x300
800896a: 68fa ldr r2, [r7, #12]
800896c: 429a cmp r2, r3
800896e: d027 beq.n 80089c0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8008970: 4b2e ldr r3, [pc, #184] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008972: 6a1b ldr r3, [r3, #32]
8008974: f423 7340 bic.w r3, r3, #768 @ 0x300
8008978: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
800897a: 4b2e ldr r3, [pc, #184] @ (8008a34 <HAL_RCCEx_PeriphCLKConfig+0x168>)
800897c: 2201 movs r2, #1
800897e: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8008980: 4b2c ldr r3, [pc, #176] @ (8008a34 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8008982: 2200 movs r2, #0
8008984: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8008986: 4a29 ldr r2, [pc, #164] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008988: 68fb ldr r3, [r7, #12]
800898a: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
800898c: 68fb ldr r3, [r7, #12]
800898e: f003 0301 and.w r3, r3, #1
8008992: 2b00 cmp r3, #0
8008994: d014 beq.n 80089c0 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008996: f7fc fb9b bl 80050d0 <HAL_GetTick>
800899a: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
800899c: e00a b.n 80089b4 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800899e: f7fc fb97 bl 80050d0 <HAL_GetTick>
80089a2: 4602 mov r2, r0
80089a4: 693b ldr r3, [r7, #16]
80089a6: 1ad3 subs r3, r2, r3
80089a8: f241 3288 movw r2, #5000 @ 0x1388
80089ac: 4293 cmp r3, r2
80089ae: d901 bls.n 80089b4 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
80089b0: 2303 movs r3, #3
80089b2: e036 b.n 8008a22 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80089b4: 4b1d ldr r3, [pc, #116] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089b6: 6a1b ldr r3, [r3, #32]
80089b8: f003 0302 and.w r3, r3, #2
80089bc: 2b00 cmp r3, #0
80089be: d0ee beq.n 800899e <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
80089c0: 4b1a ldr r3, [pc, #104] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089c2: 6a1b ldr r3, [r3, #32]
80089c4: f423 7240 bic.w r2, r3, #768 @ 0x300
80089c8: 687b ldr r3, [r7, #4]
80089ca: 685b ldr r3, [r3, #4]
80089cc: 4917 ldr r1, [pc, #92] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089ce: 4313 orrs r3, r2
80089d0: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
80089d2: 7dfb ldrb r3, [r7, #23]
80089d4: 2b01 cmp r3, #1
80089d6: d105 bne.n 80089e4 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
80089d8: 4b14 ldr r3, [pc, #80] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089da: 69db ldr r3, [r3, #28]
80089dc: 4a13 ldr r2, [pc, #76] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089de: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
80089e2: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
80089e4: 687b ldr r3, [r7, #4]
80089e6: 681b ldr r3, [r3, #0]
80089e8: f003 0302 and.w r3, r3, #2
80089ec: 2b00 cmp r3, #0
80089ee: d008 beq.n 8008a02 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
80089f0: 4b0e ldr r3, [pc, #56] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089f2: 685b ldr r3, [r3, #4]
80089f4: f423 4240 bic.w r2, r3, #49152 @ 0xc000
80089f8: 687b ldr r3, [r7, #4]
80089fa: 689b ldr r3, [r3, #8]
80089fc: 490b ldr r1, [pc, #44] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
80089fe: 4313 orrs r3, r2
8008a00: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8008a02: 687b ldr r3, [r7, #4]
8008a04: 681b ldr r3, [r3, #0]
8008a06: f003 0310 and.w r3, r3, #16
8008a0a: 2b00 cmp r3, #0
8008a0c: d008 beq.n 8008a20 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8008a0e: 4b07 ldr r3, [pc, #28] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a10: 685b ldr r3, [r3, #4]
8008a12: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8008a16: 687b ldr r3, [r7, #4]
8008a18: 68db ldr r3, [r3, #12]
8008a1a: 4904 ldr r1, [pc, #16] @ (8008a2c <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008a1c: 4313 orrs r3, r2
8008a1e: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8008a20: 2300 movs r3, #0
}
8008a22: 4618 mov r0, r3
8008a24: 3718 adds r7, #24
8008a26: 46bd mov sp, r7
8008a28: bd80 pop {r7, pc}
8008a2a: bf00 nop
8008a2c: 40021000 .word 0x40021000
8008a30: 40007000 .word 0x40007000
8008a34: 42420440 .word 0x42420440
08008a38 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8008a38: b580 push {r7, lr}
8008a3a: b082 sub sp, #8
8008a3c: af00 add r7, sp, #0
8008a3e: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8008a40: 687b ldr r3, [r7, #4]
8008a42: 2b00 cmp r3, #0
8008a44: d101 bne.n 8008a4a <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8008a46: 2301 movs r3, #1
8008a48: e041 b.n 8008ace <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8008a4a: 687b ldr r3, [r7, #4]
8008a4c: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8008a50: b2db uxtb r3, r3
8008a52: 2b00 cmp r3, #0
8008a54: d106 bne.n 8008a64 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8008a56: 687b ldr r3, [r7, #4]
8008a58: 2200 movs r2, #0
8008a5a: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8008a5e: 6878 ldr r0, [r7, #4]
8008a60: f7fc f96a bl 8004d38 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8008a64: 687b ldr r3, [r7, #4]
8008a66: 2202 movs r2, #2
8008a68: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8008a6c: 687b ldr r3, [r7, #4]
8008a6e: 681a ldr r2, [r3, #0]
8008a70: 687b ldr r3, [r7, #4]
8008a72: 3304 adds r3, #4
8008a74: 4619 mov r1, r3
8008a76: 4610 mov r0, r2
8008a78: f000 fb3e bl 80090f8 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8008a7c: 687b ldr r3, [r7, #4]
8008a7e: 2201 movs r2, #1
8008a80: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008a84: 687b ldr r3, [r7, #4]
8008a86: 2201 movs r2, #1
8008a88: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008a8c: 687b ldr r3, [r7, #4]
8008a8e: 2201 movs r2, #1
8008a90: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008a94: 687b ldr r3, [r7, #4]
8008a96: 2201 movs r2, #1
8008a98: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008a9c: 687b ldr r3, [r7, #4]
8008a9e: 2201 movs r2, #1
8008aa0: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008aa4: 687b ldr r3, [r7, #4]
8008aa6: 2201 movs r2, #1
8008aa8: f883 2042 strb.w r2, [r3, #66] @ 0x42
8008aac: 687b ldr r3, [r7, #4]
8008aae: 2201 movs r2, #1
8008ab0: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008ab4: 687b ldr r3, [r7, #4]
8008ab6: 2201 movs r2, #1
8008ab8: f883 2044 strb.w r2, [r3, #68] @ 0x44
8008abc: 687b ldr r3, [r7, #4]
8008abe: 2201 movs r2, #1
8008ac0: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008ac4: 687b ldr r3, [r7, #4]
8008ac6: 2201 movs r2, #1
8008ac8: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8008acc: 2300 movs r3, #0
}
8008ace: 4618 mov r0, r3
8008ad0: 3708 adds r7, #8
8008ad2: 46bd mov sp, r7
8008ad4: bd80 pop {r7, pc}
08008ad6 <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8008ad6: b580 push {r7, lr}
8008ad8: b082 sub sp, #8
8008ada: af00 add r7, sp, #0
8008adc: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8008ade: 687b ldr r3, [r7, #4]
8008ae0: 2b00 cmp r3, #0
8008ae2: d101 bne.n 8008ae8 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8008ae4: 2301 movs r3, #1
8008ae6: e041 b.n 8008b6c <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8008ae8: 687b ldr r3, [r7, #4]
8008aea: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8008aee: b2db uxtb r3, r3
8008af0: 2b00 cmp r3, #0
8008af2: d106 bne.n 8008b02 <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8008af4: 687b ldr r3, [r7, #4]
8008af6: 2200 movs r2, #0
8008af8: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
8008afc: 6878 ldr r0, [r7, #4]
8008afe: f000 f839 bl 8008b74 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8008b02: 687b ldr r3, [r7, #4]
8008b04: 2202 movs r2, #2
8008b06: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8008b0a: 687b ldr r3, [r7, #4]
8008b0c: 681a ldr r2, [r3, #0]
8008b0e: 687b ldr r3, [r7, #4]
8008b10: 3304 adds r3, #4
8008b12: 4619 mov r1, r3
8008b14: 4610 mov r0, r2
8008b16: f000 faef bl 80090f8 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8008b1a: 687b ldr r3, [r7, #4]
8008b1c: 2201 movs r2, #1
8008b1e: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008b22: 687b ldr r3, [r7, #4]
8008b24: 2201 movs r2, #1
8008b26: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008b2a: 687b ldr r3, [r7, #4]
8008b2c: 2201 movs r2, #1
8008b2e: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008b32: 687b ldr r3, [r7, #4]
8008b34: 2201 movs r2, #1
8008b36: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008b3a: 687b ldr r3, [r7, #4]
8008b3c: 2201 movs r2, #1
8008b3e: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008b42: 687b ldr r3, [r7, #4]
8008b44: 2201 movs r2, #1
8008b46: f883 2042 strb.w r2, [r3, #66] @ 0x42
8008b4a: 687b ldr r3, [r7, #4]
8008b4c: 2201 movs r2, #1
8008b4e: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008b52: 687b ldr r3, [r7, #4]
8008b54: 2201 movs r2, #1
8008b56: f883 2044 strb.w r2, [r3, #68] @ 0x44
8008b5a: 687b ldr r3, [r7, #4]
8008b5c: 2201 movs r2, #1
8008b5e: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008b62: 687b ldr r3, [r7, #4]
8008b64: 2201 movs r2, #1
8008b66: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8008b6a: 2300 movs r3, #0
}
8008b6c: 4618 mov r0, r3
8008b6e: 3708 adds r7, #8
8008b70: 46bd mov sp, r7
8008b72: bd80 pop {r7, pc}
08008b74 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8008b74: b480 push {r7}
8008b76: b083 sub sp, #12
8008b78: af00 add r7, sp, #0
8008b7a: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8008b7c: bf00 nop
8008b7e: 370c adds r7, #12
8008b80: 46bd mov sp, r7
8008b82: bc80 pop {r7}
8008b84: 4770 bx lr
...
08008b88 <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008b88: b580 push {r7, lr}
8008b8a: b084 sub sp, #16
8008b8c: af00 add r7, sp, #0
8008b8e: 6078 str r0, [r7, #4]
8008b90: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8008b92: 683b ldr r3, [r7, #0]
8008b94: 2b00 cmp r3, #0
8008b96: d109 bne.n 8008bac <HAL_TIM_PWM_Start+0x24>
8008b98: 687b ldr r3, [r7, #4]
8008b9a: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8008b9e: b2db uxtb r3, r3
8008ba0: 2b01 cmp r3, #1
8008ba2: bf14 ite ne
8008ba4: 2301 movne r3, #1
8008ba6: 2300 moveq r3, #0
8008ba8: b2db uxtb r3, r3
8008baa: e022 b.n 8008bf2 <HAL_TIM_PWM_Start+0x6a>
8008bac: 683b ldr r3, [r7, #0]
8008bae: 2b04 cmp r3, #4
8008bb0: d109 bne.n 8008bc6 <HAL_TIM_PWM_Start+0x3e>
8008bb2: 687b ldr r3, [r7, #4]
8008bb4: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8008bb8: b2db uxtb r3, r3
8008bba: 2b01 cmp r3, #1
8008bbc: bf14 ite ne
8008bbe: 2301 movne r3, #1
8008bc0: 2300 moveq r3, #0
8008bc2: b2db uxtb r3, r3
8008bc4: e015 b.n 8008bf2 <HAL_TIM_PWM_Start+0x6a>
8008bc6: 683b ldr r3, [r7, #0]
8008bc8: 2b08 cmp r3, #8
8008bca: d109 bne.n 8008be0 <HAL_TIM_PWM_Start+0x58>
8008bcc: 687b ldr r3, [r7, #4]
8008bce: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8008bd2: b2db uxtb r3, r3
8008bd4: 2b01 cmp r3, #1
8008bd6: bf14 ite ne
8008bd8: 2301 movne r3, #1
8008bda: 2300 moveq r3, #0
8008bdc: b2db uxtb r3, r3
8008bde: e008 b.n 8008bf2 <HAL_TIM_PWM_Start+0x6a>
8008be0: 687b ldr r3, [r7, #4]
8008be2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8008be6: b2db uxtb r3, r3
8008be8: 2b01 cmp r3, #1
8008bea: bf14 ite ne
8008bec: 2301 movne r3, #1
8008bee: 2300 moveq r3, #0
8008bf0: b2db uxtb r3, r3
8008bf2: 2b00 cmp r3, #0
8008bf4: d001 beq.n 8008bfa <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
8008bf6: 2301 movs r3, #1
8008bf8: e05e b.n 8008cb8 <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
8008bfa: 683b ldr r3, [r7, #0]
8008bfc: 2b00 cmp r3, #0
8008bfe: d104 bne.n 8008c0a <HAL_TIM_PWM_Start+0x82>
8008c00: 687b ldr r3, [r7, #4]
8008c02: 2202 movs r2, #2
8008c04: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008c08: e013 b.n 8008c32 <HAL_TIM_PWM_Start+0xaa>
8008c0a: 683b ldr r3, [r7, #0]
8008c0c: 2b04 cmp r3, #4
8008c0e: d104 bne.n 8008c1a <HAL_TIM_PWM_Start+0x92>
8008c10: 687b ldr r3, [r7, #4]
8008c12: 2202 movs r2, #2
8008c14: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008c18: e00b b.n 8008c32 <HAL_TIM_PWM_Start+0xaa>
8008c1a: 683b ldr r3, [r7, #0]
8008c1c: 2b08 cmp r3, #8
8008c1e: d104 bne.n 8008c2a <HAL_TIM_PWM_Start+0xa2>
8008c20: 687b ldr r3, [r7, #4]
8008c22: 2202 movs r2, #2
8008c24: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008c28: e003 b.n 8008c32 <HAL_TIM_PWM_Start+0xaa>
8008c2a: 687b ldr r3, [r7, #4]
8008c2c: 2202 movs r2, #2
8008c2e: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
8008c32: 687b ldr r3, [r7, #4]
8008c34: 681b ldr r3, [r3, #0]
8008c36: 2201 movs r2, #1
8008c38: 6839 ldr r1, [r7, #0]
8008c3a: 4618 mov r0, r3
8008c3c: f000 fce8 bl 8009610 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008c40: 687b ldr r3, [r7, #4]
8008c42: 681b ldr r3, [r3, #0]
8008c44: 4a1e ldr r2, [pc, #120] @ (8008cc0 <HAL_TIM_PWM_Start+0x138>)
8008c46: 4293 cmp r3, r2
8008c48: d107 bne.n 8008c5a <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
8008c4a: 687b ldr r3, [r7, #4]
8008c4c: 681b ldr r3, [r3, #0]
8008c4e: 6c5a ldr r2, [r3, #68] @ 0x44
8008c50: 687b ldr r3, [r7, #4]
8008c52: 681b ldr r3, [r3, #0]
8008c54: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8008c58: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8008c5a: 687b ldr r3, [r7, #4]
8008c5c: 681b ldr r3, [r3, #0]
8008c5e: 4a18 ldr r2, [pc, #96] @ (8008cc0 <HAL_TIM_PWM_Start+0x138>)
8008c60: 4293 cmp r3, r2
8008c62: d00e beq.n 8008c82 <HAL_TIM_PWM_Start+0xfa>
8008c64: 687b ldr r3, [r7, #4]
8008c66: 681b ldr r3, [r3, #0]
8008c68: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008c6c: d009 beq.n 8008c82 <HAL_TIM_PWM_Start+0xfa>
8008c6e: 687b ldr r3, [r7, #4]
8008c70: 681b ldr r3, [r3, #0]
8008c72: 4a14 ldr r2, [pc, #80] @ (8008cc4 <HAL_TIM_PWM_Start+0x13c>)
8008c74: 4293 cmp r3, r2
8008c76: d004 beq.n 8008c82 <HAL_TIM_PWM_Start+0xfa>
8008c78: 687b ldr r3, [r7, #4]
8008c7a: 681b ldr r3, [r3, #0]
8008c7c: 4a12 ldr r2, [pc, #72] @ (8008cc8 <HAL_TIM_PWM_Start+0x140>)
8008c7e: 4293 cmp r3, r2
8008c80: d111 bne.n 8008ca6 <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8008c82: 687b ldr r3, [r7, #4]
8008c84: 681b ldr r3, [r3, #0]
8008c86: 689b ldr r3, [r3, #8]
8008c88: f003 0307 and.w r3, r3, #7
8008c8c: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008c8e: 68fb ldr r3, [r7, #12]
8008c90: 2b06 cmp r3, #6
8008c92: d010 beq.n 8008cb6 <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8008c94: 687b ldr r3, [r7, #4]
8008c96: 681b ldr r3, [r3, #0]
8008c98: 681a ldr r2, [r3, #0]
8008c9a: 687b ldr r3, [r7, #4]
8008c9c: 681b ldr r3, [r3, #0]
8008c9e: f042 0201 orr.w r2, r2, #1
8008ca2: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008ca4: e007 b.n 8008cb6 <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8008ca6: 687b ldr r3, [r7, #4]
8008ca8: 681b ldr r3, [r3, #0]
8008caa: 681a ldr r2, [r3, #0]
8008cac: 687b ldr r3, [r7, #4]
8008cae: 681b ldr r3, [r3, #0]
8008cb0: f042 0201 orr.w r2, r2, #1
8008cb4: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8008cb6: 2300 movs r3, #0
}
8008cb8: 4618 mov r0, r3
8008cba: 3710 adds r7, #16
8008cbc: 46bd mov sp, r7
8008cbe: bd80 pop {r7, pc}
8008cc0: 40012c00 .word 0x40012c00
8008cc4: 40000400 .word 0x40000400
8008cc8: 40000800 .word 0x40000800
08008ccc <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008ccc: b580 push {r7, lr}
8008cce: b082 sub sp, #8
8008cd0: af00 add r7, sp, #0
8008cd2: 6078 str r0, [r7, #4]
8008cd4: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
8008cd6: 687b ldr r3, [r7, #4]
8008cd8: 681b ldr r3, [r3, #0]
8008cda: 2200 movs r2, #0
8008cdc: 6839 ldr r1, [r7, #0]
8008cde: 4618 mov r0, r3
8008ce0: f000 fc96 bl 8009610 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008ce4: 687b ldr r3, [r7, #4]
8008ce6: 681b ldr r3, [r3, #0]
8008ce8: 4a29 ldr r2, [pc, #164] @ (8008d90 <HAL_TIM_PWM_Stop+0xc4>)
8008cea: 4293 cmp r3, r2
8008cec: d117 bne.n 8008d1e <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
8008cee: 687b ldr r3, [r7, #4]
8008cf0: 681b ldr r3, [r3, #0]
8008cf2: 6a1a ldr r2, [r3, #32]
8008cf4: f241 1311 movw r3, #4369 @ 0x1111
8008cf8: 4013 ands r3, r2
8008cfa: 2b00 cmp r3, #0
8008cfc: d10f bne.n 8008d1e <HAL_TIM_PWM_Stop+0x52>
8008cfe: 687b ldr r3, [r7, #4]
8008d00: 681b ldr r3, [r3, #0]
8008d02: 6a1a ldr r2, [r3, #32]
8008d04: f240 4344 movw r3, #1092 @ 0x444
8008d08: 4013 ands r3, r2
8008d0a: 2b00 cmp r3, #0
8008d0c: d107 bne.n 8008d1e <HAL_TIM_PWM_Stop+0x52>
8008d0e: 687b ldr r3, [r7, #4]
8008d10: 681b ldr r3, [r3, #0]
8008d12: 6c5a ldr r2, [r3, #68] @ 0x44
8008d14: 687b ldr r3, [r7, #4]
8008d16: 681b ldr r3, [r3, #0]
8008d18: f422 4200 bic.w r2, r2, #32768 @ 0x8000
8008d1c: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
8008d1e: 687b ldr r3, [r7, #4]
8008d20: 681b ldr r3, [r3, #0]
8008d22: 6a1a ldr r2, [r3, #32]
8008d24: f241 1311 movw r3, #4369 @ 0x1111
8008d28: 4013 ands r3, r2
8008d2a: 2b00 cmp r3, #0
8008d2c: d10f bne.n 8008d4e <HAL_TIM_PWM_Stop+0x82>
8008d2e: 687b ldr r3, [r7, #4]
8008d30: 681b ldr r3, [r3, #0]
8008d32: 6a1a ldr r2, [r3, #32]
8008d34: f240 4344 movw r3, #1092 @ 0x444
8008d38: 4013 ands r3, r2
8008d3a: 2b00 cmp r3, #0
8008d3c: d107 bne.n 8008d4e <HAL_TIM_PWM_Stop+0x82>
8008d3e: 687b ldr r3, [r7, #4]
8008d40: 681b ldr r3, [r3, #0]
8008d42: 681a ldr r2, [r3, #0]
8008d44: 687b ldr r3, [r7, #4]
8008d46: 681b ldr r3, [r3, #0]
8008d48: f022 0201 bic.w r2, r2, #1
8008d4c: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
8008d4e: 683b ldr r3, [r7, #0]
8008d50: 2b00 cmp r3, #0
8008d52: d104 bne.n 8008d5e <HAL_TIM_PWM_Stop+0x92>
8008d54: 687b ldr r3, [r7, #4]
8008d56: 2201 movs r2, #1
8008d58: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008d5c: e013 b.n 8008d86 <HAL_TIM_PWM_Stop+0xba>
8008d5e: 683b ldr r3, [r7, #0]
8008d60: 2b04 cmp r3, #4
8008d62: d104 bne.n 8008d6e <HAL_TIM_PWM_Stop+0xa2>
8008d64: 687b ldr r3, [r7, #4]
8008d66: 2201 movs r2, #1
8008d68: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008d6c: e00b b.n 8008d86 <HAL_TIM_PWM_Stop+0xba>
8008d6e: 683b ldr r3, [r7, #0]
8008d70: 2b08 cmp r3, #8
8008d72: d104 bne.n 8008d7e <HAL_TIM_PWM_Stop+0xb2>
8008d74: 687b ldr r3, [r7, #4]
8008d76: 2201 movs r2, #1
8008d78: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008d7c: e003 b.n 8008d86 <HAL_TIM_PWM_Stop+0xba>
8008d7e: 687b ldr r3, [r7, #4]
8008d80: 2201 movs r2, #1
8008d82: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
8008d86: 2300 movs r3, #0
}
8008d88: 4618 mov r0, r3
8008d8a: 3708 adds r7, #8
8008d8c: 46bd mov sp, r7
8008d8e: bd80 pop {r7, pc}
8008d90: 40012c00 .word 0x40012c00
08008d94 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8008d94: b580 push {r7, lr}
8008d96: b086 sub sp, #24
8008d98: af00 add r7, sp, #0
8008d9a: 60f8 str r0, [r7, #12]
8008d9c: 60b9 str r1, [r7, #8]
8008d9e: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8008da0: 2300 movs r3, #0
8008da2: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8008da4: 68fb ldr r3, [r7, #12]
8008da6: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8008daa: 2b01 cmp r3, #1
8008dac: d101 bne.n 8008db2 <HAL_TIM_PWM_ConfigChannel+0x1e>
8008dae: 2302 movs r3, #2
8008db0: e0ae b.n 8008f10 <HAL_TIM_PWM_ConfigChannel+0x17c>
8008db2: 68fb ldr r3, [r7, #12]
8008db4: 2201 movs r2, #1
8008db6: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
8008dba: 687b ldr r3, [r7, #4]
8008dbc: 2b0c cmp r3, #12
8008dbe: f200 809f bhi.w 8008f00 <HAL_TIM_PWM_ConfigChannel+0x16c>
8008dc2: a201 add r2, pc, #4 @ (adr r2, 8008dc8 <HAL_TIM_PWM_ConfigChannel+0x34>)
8008dc4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008dc8: 08008dfd .word 0x08008dfd
8008dcc: 08008f01 .word 0x08008f01
8008dd0: 08008f01 .word 0x08008f01
8008dd4: 08008f01 .word 0x08008f01
8008dd8: 08008e3d .word 0x08008e3d
8008ddc: 08008f01 .word 0x08008f01
8008de0: 08008f01 .word 0x08008f01
8008de4: 08008f01 .word 0x08008f01
8008de8: 08008e7f .word 0x08008e7f
8008dec: 08008f01 .word 0x08008f01
8008df0: 08008f01 .word 0x08008f01
8008df4: 08008f01 .word 0x08008f01
8008df8: 08008ebf .word 0x08008ebf
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
8008dfc: 68fb ldr r3, [r7, #12]
8008dfe: 681b ldr r3, [r3, #0]
8008e00: 68b9 ldr r1, [r7, #8]
8008e02: 4618 mov r0, r3
8008e04: f000 f9e6 bl 80091d4 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
8008e08: 68fb ldr r3, [r7, #12]
8008e0a: 681b ldr r3, [r3, #0]
8008e0c: 699a ldr r2, [r3, #24]
8008e0e: 68fb ldr r3, [r7, #12]
8008e10: 681b ldr r3, [r3, #0]
8008e12: f042 0208 orr.w r2, r2, #8
8008e16: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
8008e18: 68fb ldr r3, [r7, #12]
8008e1a: 681b ldr r3, [r3, #0]
8008e1c: 699a ldr r2, [r3, #24]
8008e1e: 68fb ldr r3, [r7, #12]
8008e20: 681b ldr r3, [r3, #0]
8008e22: f022 0204 bic.w r2, r2, #4
8008e26: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
8008e28: 68fb ldr r3, [r7, #12]
8008e2a: 681b ldr r3, [r3, #0]
8008e2c: 6999 ldr r1, [r3, #24]
8008e2e: 68bb ldr r3, [r7, #8]
8008e30: 691a ldr r2, [r3, #16]
8008e32: 68fb ldr r3, [r7, #12]
8008e34: 681b ldr r3, [r3, #0]
8008e36: 430a orrs r2, r1
8008e38: 619a str r2, [r3, #24]
break;
8008e3a: e064 b.n 8008f06 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
8008e3c: 68fb ldr r3, [r7, #12]
8008e3e: 681b ldr r3, [r3, #0]
8008e40: 68b9 ldr r1, [r7, #8]
8008e42: 4618 mov r0, r3
8008e44: f000 fa2c bl 80092a0 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8008e48: 68fb ldr r3, [r7, #12]
8008e4a: 681b ldr r3, [r3, #0]
8008e4c: 699a ldr r2, [r3, #24]
8008e4e: 68fb ldr r3, [r7, #12]
8008e50: 681b ldr r3, [r3, #0]
8008e52: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008e56: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8008e58: 68fb ldr r3, [r7, #12]
8008e5a: 681b ldr r3, [r3, #0]
8008e5c: 699a ldr r2, [r3, #24]
8008e5e: 68fb ldr r3, [r7, #12]
8008e60: 681b ldr r3, [r3, #0]
8008e62: f422 6280 bic.w r2, r2, #1024 @ 0x400
8008e66: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8008e68: 68fb ldr r3, [r7, #12]
8008e6a: 681b ldr r3, [r3, #0]
8008e6c: 6999 ldr r1, [r3, #24]
8008e6e: 68bb ldr r3, [r7, #8]
8008e70: 691b ldr r3, [r3, #16]
8008e72: 021a lsls r2, r3, #8
8008e74: 68fb ldr r3, [r7, #12]
8008e76: 681b ldr r3, [r3, #0]
8008e78: 430a orrs r2, r1
8008e7a: 619a str r2, [r3, #24]
break;
8008e7c: e043 b.n 8008f06 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8008e7e: 68fb ldr r3, [r7, #12]
8008e80: 681b ldr r3, [r3, #0]
8008e82: 68b9 ldr r1, [r7, #8]
8008e84: 4618 mov r0, r3
8008e86: f000 fa75 bl 8009374 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
8008e8a: 68fb ldr r3, [r7, #12]
8008e8c: 681b ldr r3, [r3, #0]
8008e8e: 69da ldr r2, [r3, #28]
8008e90: 68fb ldr r3, [r7, #12]
8008e92: 681b ldr r3, [r3, #0]
8008e94: f042 0208 orr.w r2, r2, #8
8008e98: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
8008e9a: 68fb ldr r3, [r7, #12]
8008e9c: 681b ldr r3, [r3, #0]
8008e9e: 69da ldr r2, [r3, #28]
8008ea0: 68fb ldr r3, [r7, #12]
8008ea2: 681b ldr r3, [r3, #0]
8008ea4: f022 0204 bic.w r2, r2, #4
8008ea8: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
8008eaa: 68fb ldr r3, [r7, #12]
8008eac: 681b ldr r3, [r3, #0]
8008eae: 69d9 ldr r1, [r3, #28]
8008eb0: 68bb ldr r3, [r7, #8]
8008eb2: 691a ldr r2, [r3, #16]
8008eb4: 68fb ldr r3, [r7, #12]
8008eb6: 681b ldr r3, [r3, #0]
8008eb8: 430a orrs r2, r1
8008eba: 61da str r2, [r3, #28]
break;
8008ebc: e023 b.n 8008f06 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
8008ebe: 68fb ldr r3, [r7, #12]
8008ec0: 681b ldr r3, [r3, #0]
8008ec2: 68b9 ldr r1, [r7, #8]
8008ec4: 4618 mov r0, r3
8008ec6: f000 fabf bl 8009448 <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
8008eca: 68fb ldr r3, [r7, #12]
8008ecc: 681b ldr r3, [r3, #0]
8008ece: 69da ldr r2, [r3, #28]
8008ed0: 68fb ldr r3, [r7, #12]
8008ed2: 681b ldr r3, [r3, #0]
8008ed4: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008ed8: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
8008eda: 68fb ldr r3, [r7, #12]
8008edc: 681b ldr r3, [r3, #0]
8008ede: 69da ldr r2, [r3, #28]
8008ee0: 68fb ldr r3, [r7, #12]
8008ee2: 681b ldr r3, [r3, #0]
8008ee4: f422 6280 bic.w r2, r2, #1024 @ 0x400
8008ee8: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
8008eea: 68fb ldr r3, [r7, #12]
8008eec: 681b ldr r3, [r3, #0]
8008eee: 69d9 ldr r1, [r3, #28]
8008ef0: 68bb ldr r3, [r7, #8]
8008ef2: 691b ldr r3, [r3, #16]
8008ef4: 021a lsls r2, r3, #8
8008ef6: 68fb ldr r3, [r7, #12]
8008ef8: 681b ldr r3, [r3, #0]
8008efa: 430a orrs r2, r1
8008efc: 61da str r2, [r3, #28]
break;
8008efe: e002 b.n 8008f06 <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
8008f00: 2301 movs r3, #1
8008f02: 75fb strb r3, [r7, #23]
break;
8008f04: bf00 nop
}
__HAL_UNLOCK(htim);
8008f06: 68fb ldr r3, [r7, #12]
8008f08: 2200 movs r2, #0
8008f0a: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8008f0e: 7dfb ldrb r3, [r7, #23]
}
8008f10: 4618 mov r0, r3
8008f12: 3718 adds r7, #24
8008f14: 46bd mov sp, r7
8008f16: bd80 pop {r7, pc}
08008f18 <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
8008f18: b580 push {r7, lr}
8008f1a: b084 sub sp, #16
8008f1c: af00 add r7, sp, #0
8008f1e: 6078 str r0, [r7, #4]
8008f20: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8008f22: 2300 movs r3, #0
8008f24: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
8008f26: 687b ldr r3, [r7, #4]
8008f28: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8008f2c: 2b01 cmp r3, #1
8008f2e: d101 bne.n 8008f34 <HAL_TIM_ConfigClockSource+0x1c>
8008f30: 2302 movs r3, #2
8008f32: e0b4 b.n 800909e <HAL_TIM_ConfigClockSource+0x186>
8008f34: 687b ldr r3, [r7, #4]
8008f36: 2201 movs r2, #1
8008f38: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
8008f3c: 687b ldr r3, [r7, #4]
8008f3e: 2202 movs r2, #2
8008f40: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8008f44: 687b ldr r3, [r7, #4]
8008f46: 681b ldr r3, [r3, #0]
8008f48: 689b ldr r3, [r3, #8]
8008f4a: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
8008f4c: 68bb ldr r3, [r7, #8]
8008f4e: f023 0377 bic.w r3, r3, #119 @ 0x77
8008f52: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8008f54: 68bb ldr r3, [r7, #8]
8008f56: f423 437f bic.w r3, r3, #65280 @ 0xff00
8008f5a: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
8008f5c: 687b ldr r3, [r7, #4]
8008f5e: 681b ldr r3, [r3, #0]
8008f60: 68ba ldr r2, [r7, #8]
8008f62: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8008f64: 683b ldr r3, [r7, #0]
8008f66: 681b ldr r3, [r3, #0]
8008f68: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008f6c: d03e beq.n 8008fec <HAL_TIM_ConfigClockSource+0xd4>
8008f6e: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008f72: f200 8087 bhi.w 8009084 <HAL_TIM_ConfigClockSource+0x16c>
8008f76: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008f7a: f000 8086 beq.w 800908a <HAL_TIM_ConfigClockSource+0x172>
8008f7e: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008f82: d87f bhi.n 8009084 <HAL_TIM_ConfigClockSource+0x16c>
8008f84: 2b70 cmp r3, #112 @ 0x70
8008f86: d01a beq.n 8008fbe <HAL_TIM_ConfigClockSource+0xa6>
8008f88: 2b70 cmp r3, #112 @ 0x70
8008f8a: d87b bhi.n 8009084 <HAL_TIM_ConfigClockSource+0x16c>
8008f8c: 2b60 cmp r3, #96 @ 0x60
8008f8e: d050 beq.n 8009032 <HAL_TIM_ConfigClockSource+0x11a>
8008f90: 2b60 cmp r3, #96 @ 0x60
8008f92: d877 bhi.n 8009084 <HAL_TIM_ConfigClockSource+0x16c>
8008f94: 2b50 cmp r3, #80 @ 0x50
8008f96: d03c beq.n 8009012 <HAL_TIM_ConfigClockSource+0xfa>
8008f98: 2b50 cmp r3, #80 @ 0x50
8008f9a: d873 bhi.n 8009084 <HAL_TIM_ConfigClockSource+0x16c>
8008f9c: 2b40 cmp r3, #64 @ 0x40
8008f9e: d058 beq.n 8009052 <HAL_TIM_ConfigClockSource+0x13a>
8008fa0: 2b40 cmp r3, #64 @ 0x40
8008fa2: d86f bhi.n 8009084 <HAL_TIM_ConfigClockSource+0x16c>
8008fa4: 2b30 cmp r3, #48 @ 0x30
8008fa6: d064 beq.n 8009072 <HAL_TIM_ConfigClockSource+0x15a>
8008fa8: 2b30 cmp r3, #48 @ 0x30
8008faa: d86b bhi.n 8009084 <HAL_TIM_ConfigClockSource+0x16c>
8008fac: 2b20 cmp r3, #32
8008fae: d060 beq.n 8009072 <HAL_TIM_ConfigClockSource+0x15a>
8008fb0: 2b20 cmp r3, #32
8008fb2: d867 bhi.n 8009084 <HAL_TIM_ConfigClockSource+0x16c>
8008fb4: 2b00 cmp r3, #0
8008fb6: d05c beq.n 8009072 <HAL_TIM_ConfigClockSource+0x15a>
8008fb8: 2b10 cmp r3, #16
8008fba: d05a beq.n 8009072 <HAL_TIM_ConfigClockSource+0x15a>
8008fbc: e062 b.n 8009084 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8008fbe: 687b ldr r3, [r7, #4]
8008fc0: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8008fc2: 683b ldr r3, [r7, #0]
8008fc4: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8008fc6: 683b ldr r3, [r7, #0]
8008fc8: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8008fca: 683b ldr r3, [r7, #0]
8008fcc: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8008fce: f000 fb00 bl 80095d2 <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
8008fd2: 687b ldr r3, [r7, #4]
8008fd4: 681b ldr r3, [r3, #0]
8008fd6: 689b ldr r3, [r3, #8]
8008fd8: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
8008fda: 68bb ldr r3, [r7, #8]
8008fdc: f043 0377 orr.w r3, r3, #119 @ 0x77
8008fe0: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8008fe2: 687b ldr r3, [r7, #4]
8008fe4: 681b ldr r3, [r3, #0]
8008fe6: 68ba ldr r2, [r7, #8]
8008fe8: 609a str r2, [r3, #8]
break;
8008fea: e04f b.n 800908c <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8008fec: 687b ldr r3, [r7, #4]
8008fee: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8008ff0: 683b ldr r3, [r7, #0]
8008ff2: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8008ff4: 683b ldr r3, [r7, #0]
8008ff6: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8008ff8: 683b ldr r3, [r7, #0]
8008ffa: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8008ffc: f000 fae9 bl 80095d2 <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
8009000: 687b ldr r3, [r7, #4]
8009002: 681b ldr r3, [r3, #0]
8009004: 689a ldr r2, [r3, #8]
8009006: 687b ldr r3, [r7, #4]
8009008: 681b ldr r3, [r3, #0]
800900a: f442 4280 orr.w r2, r2, #16384 @ 0x4000
800900e: 609a str r2, [r3, #8]
break;
8009010: e03c b.n 800908c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8009012: 687b ldr r3, [r7, #4]
8009014: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8009016: 683b ldr r3, [r7, #0]
8009018: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800901a: 683b ldr r3, [r7, #0]
800901c: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
800901e: 461a mov r2, r3
8009020: f000 fa60 bl 80094e4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
8009024: 687b ldr r3, [r7, #4]
8009026: 681b ldr r3, [r3, #0]
8009028: 2150 movs r1, #80 @ 0x50
800902a: 4618 mov r0, r3
800902c: f000 fab7 bl 800959e <TIM_ITRx_SetConfig>
break;
8009030: e02c b.n 800908c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
8009032: 687b ldr r3, [r7, #4]
8009034: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8009036: 683b ldr r3, [r7, #0]
8009038: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800903a: 683b ldr r3, [r7, #0]
800903c: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
800903e: 461a mov r2, r3
8009040: f000 fa7e bl 8009540 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
8009044: 687b ldr r3, [r7, #4]
8009046: 681b ldr r3, [r3, #0]
8009048: 2160 movs r1, #96 @ 0x60
800904a: 4618 mov r0, r3
800904c: f000 faa7 bl 800959e <TIM_ITRx_SetConfig>
break;
8009050: e01c b.n 800908c <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8009052: 687b ldr r3, [r7, #4]
8009054: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8009056: 683b ldr r3, [r7, #0]
8009058: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800905a: 683b ldr r3, [r7, #0]
800905c: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
800905e: 461a mov r2, r3
8009060: f000 fa40 bl 80094e4 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8009064: 687b ldr r3, [r7, #4]
8009066: 681b ldr r3, [r3, #0]
8009068: 2140 movs r1, #64 @ 0x40
800906a: 4618 mov r0, r3
800906c: f000 fa97 bl 800959e <TIM_ITRx_SetConfig>
break;
8009070: e00c b.n 800908c <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
8009072: 687b ldr r3, [r7, #4]
8009074: 681a ldr r2, [r3, #0]
8009076: 683b ldr r3, [r7, #0]
8009078: 681b ldr r3, [r3, #0]
800907a: 4619 mov r1, r3
800907c: 4610 mov r0, r2
800907e: f000 fa8e bl 800959e <TIM_ITRx_SetConfig>
break;
8009082: e003 b.n 800908c <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8009084: 2301 movs r3, #1
8009086: 73fb strb r3, [r7, #15]
break;
8009088: e000 b.n 800908c <HAL_TIM_ConfigClockSource+0x174>
break;
800908a: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
800908c: 687b ldr r3, [r7, #4]
800908e: 2201 movs r2, #1
8009090: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8009094: 687b ldr r3, [r7, #4]
8009096: 2200 movs r2, #0
8009098: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
800909c: 7bfb ldrb r3, [r7, #15]
}
800909e: 4618 mov r0, r3
80090a0: 3710 adds r7, #16
80090a2: 46bd mov sp, r7
80090a4: bd80 pop {r7, pc}
080090a6 <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
80090a6: b480 push {r7}
80090a8: b085 sub sp, #20
80090aa: af00 add r7, sp, #0
80090ac: 6078 str r0, [r7, #4]
80090ae: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
80090b0: 683b ldr r3, [r7, #0]
80090b2: 2b00 cmp r3, #0
80090b4: d104 bne.n 80090c0 <HAL_TIM_GetChannelState+0x1a>
80090b6: 687b ldr r3, [r7, #4]
80090b8: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
80090bc: b2db uxtb r3, r3
80090be: e013 b.n 80090e8 <HAL_TIM_GetChannelState+0x42>
80090c0: 683b ldr r3, [r7, #0]
80090c2: 2b04 cmp r3, #4
80090c4: d104 bne.n 80090d0 <HAL_TIM_GetChannelState+0x2a>
80090c6: 687b ldr r3, [r7, #4]
80090c8: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
80090cc: b2db uxtb r3, r3
80090ce: e00b b.n 80090e8 <HAL_TIM_GetChannelState+0x42>
80090d0: 683b ldr r3, [r7, #0]
80090d2: 2b08 cmp r3, #8
80090d4: d104 bne.n 80090e0 <HAL_TIM_GetChannelState+0x3a>
80090d6: 687b ldr r3, [r7, #4]
80090d8: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
80090dc: b2db uxtb r3, r3
80090de: e003 b.n 80090e8 <HAL_TIM_GetChannelState+0x42>
80090e0: 687b ldr r3, [r7, #4]
80090e2: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80090e6: b2db uxtb r3, r3
80090e8: 73fb strb r3, [r7, #15]
return channel_state;
80090ea: 7bfb ldrb r3, [r7, #15]
}
80090ec: 4618 mov r0, r3
80090ee: 3714 adds r7, #20
80090f0: 46bd mov sp, r7
80090f2: bc80 pop {r7}
80090f4: 4770 bx lr
...
080090f8 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
80090f8: b480 push {r7}
80090fa: b085 sub sp, #20
80090fc: af00 add r7, sp, #0
80090fe: 6078 str r0, [r7, #4]
8009100: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8009102: 687b ldr r3, [r7, #4]
8009104: 681b ldr r3, [r3, #0]
8009106: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8009108: 687b ldr r3, [r7, #4]
800910a: 4a2f ldr r2, [pc, #188] @ (80091c8 <TIM_Base_SetConfig+0xd0>)
800910c: 4293 cmp r3, r2
800910e: d00b beq.n 8009128 <TIM_Base_SetConfig+0x30>
8009110: 687b ldr r3, [r7, #4]
8009112: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8009116: d007 beq.n 8009128 <TIM_Base_SetConfig+0x30>
8009118: 687b ldr r3, [r7, #4]
800911a: 4a2c ldr r2, [pc, #176] @ (80091cc <TIM_Base_SetConfig+0xd4>)
800911c: 4293 cmp r3, r2
800911e: d003 beq.n 8009128 <TIM_Base_SetConfig+0x30>
8009120: 687b ldr r3, [r7, #4]
8009122: 4a2b ldr r2, [pc, #172] @ (80091d0 <TIM_Base_SetConfig+0xd8>)
8009124: 4293 cmp r3, r2
8009126: d108 bne.n 800913a <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8009128: 68fb ldr r3, [r7, #12]
800912a: f023 0370 bic.w r3, r3, #112 @ 0x70
800912e: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8009130: 683b ldr r3, [r7, #0]
8009132: 685b ldr r3, [r3, #4]
8009134: 68fa ldr r2, [r7, #12]
8009136: 4313 orrs r3, r2
8009138: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
800913a: 687b ldr r3, [r7, #4]
800913c: 4a22 ldr r2, [pc, #136] @ (80091c8 <TIM_Base_SetConfig+0xd0>)
800913e: 4293 cmp r3, r2
8009140: d00b beq.n 800915a <TIM_Base_SetConfig+0x62>
8009142: 687b ldr r3, [r7, #4]
8009144: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8009148: d007 beq.n 800915a <TIM_Base_SetConfig+0x62>
800914a: 687b ldr r3, [r7, #4]
800914c: 4a1f ldr r2, [pc, #124] @ (80091cc <TIM_Base_SetConfig+0xd4>)
800914e: 4293 cmp r3, r2
8009150: d003 beq.n 800915a <TIM_Base_SetConfig+0x62>
8009152: 687b ldr r3, [r7, #4]
8009154: 4a1e ldr r2, [pc, #120] @ (80091d0 <TIM_Base_SetConfig+0xd8>)
8009156: 4293 cmp r3, r2
8009158: d108 bne.n 800916c <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
800915a: 68fb ldr r3, [r7, #12]
800915c: f423 7340 bic.w r3, r3, #768 @ 0x300
8009160: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8009162: 683b ldr r3, [r7, #0]
8009164: 68db ldr r3, [r3, #12]
8009166: 68fa ldr r2, [r7, #12]
8009168: 4313 orrs r3, r2
800916a: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
800916c: 68fb ldr r3, [r7, #12]
800916e: f023 0280 bic.w r2, r3, #128 @ 0x80
8009172: 683b ldr r3, [r7, #0]
8009174: 695b ldr r3, [r3, #20]
8009176: 4313 orrs r3, r2
8009178: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
800917a: 687b ldr r3, [r7, #4]
800917c: 68fa ldr r2, [r7, #12]
800917e: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8009180: 683b ldr r3, [r7, #0]
8009182: 689a ldr r2, [r3, #8]
8009184: 687b ldr r3, [r7, #4]
8009186: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8009188: 683b ldr r3, [r7, #0]
800918a: 681a ldr r2, [r3, #0]
800918c: 687b ldr r3, [r7, #4]
800918e: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8009190: 687b ldr r3, [r7, #4]
8009192: 4a0d ldr r2, [pc, #52] @ (80091c8 <TIM_Base_SetConfig+0xd0>)
8009194: 4293 cmp r3, r2
8009196: d103 bne.n 80091a0 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8009198: 683b ldr r3, [r7, #0]
800919a: 691a ldr r2, [r3, #16]
800919c: 687b ldr r3, [r7, #4]
800919e: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
80091a0: 687b ldr r3, [r7, #4]
80091a2: 2201 movs r2, #1
80091a4: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
80091a6: 687b ldr r3, [r7, #4]
80091a8: 691b ldr r3, [r3, #16]
80091aa: f003 0301 and.w r3, r3, #1
80091ae: 2b00 cmp r3, #0
80091b0: d005 beq.n 80091be <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
80091b2: 687b ldr r3, [r7, #4]
80091b4: 691b ldr r3, [r3, #16]
80091b6: f023 0201 bic.w r2, r3, #1
80091ba: 687b ldr r3, [r7, #4]
80091bc: 611a str r2, [r3, #16]
}
}
80091be: bf00 nop
80091c0: 3714 adds r7, #20
80091c2: 46bd mov sp, r7
80091c4: bc80 pop {r7}
80091c6: 4770 bx lr
80091c8: 40012c00 .word 0x40012c00
80091cc: 40000400 .word 0x40000400
80091d0: 40000800 .word 0x40000800
080091d4 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80091d4: b480 push {r7}
80091d6: b087 sub sp, #28
80091d8: af00 add r7, sp, #0
80091da: 6078 str r0, [r7, #4]
80091dc: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80091de: 687b ldr r3, [r7, #4]
80091e0: 6a1b ldr r3, [r3, #32]
80091e2: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
80091e4: 687b ldr r3, [r7, #4]
80091e6: 6a1b ldr r3, [r3, #32]
80091e8: f023 0201 bic.w r2, r3, #1
80091ec: 687b ldr r3, [r7, #4]
80091ee: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80091f0: 687b ldr r3, [r7, #4]
80091f2: 685b ldr r3, [r3, #4]
80091f4: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
80091f6: 687b ldr r3, [r7, #4]
80091f8: 699b ldr r3, [r3, #24]
80091fa: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
80091fc: 68fb ldr r3, [r7, #12]
80091fe: f023 0370 bic.w r3, r3, #112 @ 0x70
8009202: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
8009204: 68fb ldr r3, [r7, #12]
8009206: f023 0303 bic.w r3, r3, #3
800920a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
800920c: 683b ldr r3, [r7, #0]
800920e: 681b ldr r3, [r3, #0]
8009210: 68fa ldr r2, [r7, #12]
8009212: 4313 orrs r3, r2
8009214: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
8009216: 697b ldr r3, [r7, #20]
8009218: f023 0302 bic.w r3, r3, #2
800921c: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
800921e: 683b ldr r3, [r7, #0]
8009220: 689b ldr r3, [r3, #8]
8009222: 697a ldr r2, [r7, #20]
8009224: 4313 orrs r3, r2
8009226: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
8009228: 687b ldr r3, [r7, #4]
800922a: 4a1c ldr r2, [pc, #112] @ (800929c <TIM_OC1_SetConfig+0xc8>)
800922c: 4293 cmp r3, r2
800922e: d10c bne.n 800924a <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
8009230: 697b ldr r3, [r7, #20]
8009232: f023 0308 bic.w r3, r3, #8
8009236: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
8009238: 683b ldr r3, [r7, #0]
800923a: 68db ldr r3, [r3, #12]
800923c: 697a ldr r2, [r7, #20]
800923e: 4313 orrs r3, r2
8009240: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
8009242: 697b ldr r3, [r7, #20]
8009244: f023 0304 bic.w r3, r3, #4
8009248: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
800924a: 687b ldr r3, [r7, #4]
800924c: 4a13 ldr r2, [pc, #76] @ (800929c <TIM_OC1_SetConfig+0xc8>)
800924e: 4293 cmp r3, r2
8009250: d111 bne.n 8009276 <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
8009252: 693b ldr r3, [r7, #16]
8009254: f423 7380 bic.w r3, r3, #256 @ 0x100
8009258: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
800925a: 693b ldr r3, [r7, #16]
800925c: f423 7300 bic.w r3, r3, #512 @ 0x200
8009260: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
8009262: 683b ldr r3, [r7, #0]
8009264: 695b ldr r3, [r3, #20]
8009266: 693a ldr r2, [r7, #16]
8009268: 4313 orrs r3, r2
800926a: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
800926c: 683b ldr r3, [r7, #0]
800926e: 699b ldr r3, [r3, #24]
8009270: 693a ldr r2, [r7, #16]
8009272: 4313 orrs r3, r2
8009274: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8009276: 687b ldr r3, [r7, #4]
8009278: 693a ldr r2, [r7, #16]
800927a: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
800927c: 687b ldr r3, [r7, #4]
800927e: 68fa ldr r2, [r7, #12]
8009280: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8009282: 683b ldr r3, [r7, #0]
8009284: 685a ldr r2, [r3, #4]
8009286: 687b ldr r3, [r7, #4]
8009288: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800928a: 687b ldr r3, [r7, #4]
800928c: 697a ldr r2, [r7, #20]
800928e: 621a str r2, [r3, #32]
}
8009290: bf00 nop
8009292: 371c adds r7, #28
8009294: 46bd mov sp, r7
8009296: bc80 pop {r7}
8009298: 4770 bx lr
800929a: bf00 nop
800929c: 40012c00 .word 0x40012c00
080092a0 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80092a0: b480 push {r7}
80092a2: b087 sub sp, #28
80092a4: af00 add r7, sp, #0
80092a6: 6078 str r0, [r7, #4]
80092a8: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80092aa: 687b ldr r3, [r7, #4]
80092ac: 6a1b ldr r3, [r3, #32]
80092ae: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
80092b0: 687b ldr r3, [r7, #4]
80092b2: 6a1b ldr r3, [r3, #32]
80092b4: f023 0210 bic.w r2, r3, #16
80092b8: 687b ldr r3, [r7, #4]
80092ba: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80092bc: 687b ldr r3, [r7, #4]
80092be: 685b ldr r3, [r3, #4]
80092c0: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
80092c2: 687b ldr r3, [r7, #4]
80092c4: 699b ldr r3, [r3, #24]
80092c6: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
80092c8: 68fb ldr r3, [r7, #12]
80092ca: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80092ce: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
80092d0: 68fb ldr r3, [r7, #12]
80092d2: f423 7340 bic.w r3, r3, #768 @ 0x300
80092d6: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
80092d8: 683b ldr r3, [r7, #0]
80092da: 681b ldr r3, [r3, #0]
80092dc: 021b lsls r3, r3, #8
80092de: 68fa ldr r2, [r7, #12]
80092e0: 4313 orrs r3, r2
80092e2: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
80092e4: 697b ldr r3, [r7, #20]
80092e6: f023 0320 bic.w r3, r3, #32
80092ea: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
80092ec: 683b ldr r3, [r7, #0]
80092ee: 689b ldr r3, [r3, #8]
80092f0: 011b lsls r3, r3, #4
80092f2: 697a ldr r2, [r7, #20]
80092f4: 4313 orrs r3, r2
80092f6: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
80092f8: 687b ldr r3, [r7, #4]
80092fa: 4a1d ldr r2, [pc, #116] @ (8009370 <TIM_OC2_SetConfig+0xd0>)
80092fc: 4293 cmp r3, r2
80092fe: d10d bne.n 800931c <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
8009300: 697b ldr r3, [r7, #20]
8009302: f023 0380 bic.w r3, r3, #128 @ 0x80
8009306: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
8009308: 683b ldr r3, [r7, #0]
800930a: 68db ldr r3, [r3, #12]
800930c: 011b lsls r3, r3, #4
800930e: 697a ldr r2, [r7, #20]
8009310: 4313 orrs r3, r2
8009312: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
8009314: 697b ldr r3, [r7, #20]
8009316: f023 0340 bic.w r3, r3, #64 @ 0x40
800931a: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
800931c: 687b ldr r3, [r7, #4]
800931e: 4a14 ldr r2, [pc, #80] @ (8009370 <TIM_OC2_SetConfig+0xd0>)
8009320: 4293 cmp r3, r2
8009322: d113 bne.n 800934c <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
8009324: 693b ldr r3, [r7, #16]
8009326: f423 6380 bic.w r3, r3, #1024 @ 0x400
800932a: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
800932c: 693b ldr r3, [r7, #16]
800932e: f423 6300 bic.w r3, r3, #2048 @ 0x800
8009332: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8009334: 683b ldr r3, [r7, #0]
8009336: 695b ldr r3, [r3, #20]
8009338: 009b lsls r3, r3, #2
800933a: 693a ldr r2, [r7, #16]
800933c: 4313 orrs r3, r2
800933e: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
8009340: 683b ldr r3, [r7, #0]
8009342: 699b ldr r3, [r3, #24]
8009344: 009b lsls r3, r3, #2
8009346: 693a ldr r2, [r7, #16]
8009348: 4313 orrs r3, r2
800934a: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800934c: 687b ldr r3, [r7, #4]
800934e: 693a ldr r2, [r7, #16]
8009350: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8009352: 687b ldr r3, [r7, #4]
8009354: 68fa ldr r2, [r7, #12]
8009356: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
8009358: 683b ldr r3, [r7, #0]
800935a: 685a ldr r2, [r3, #4]
800935c: 687b ldr r3, [r7, #4]
800935e: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8009360: 687b ldr r3, [r7, #4]
8009362: 697a ldr r2, [r7, #20]
8009364: 621a str r2, [r3, #32]
}
8009366: bf00 nop
8009368: 371c adds r7, #28
800936a: 46bd mov sp, r7
800936c: bc80 pop {r7}
800936e: 4770 bx lr
8009370: 40012c00 .word 0x40012c00
08009374 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8009374: b480 push {r7}
8009376: b087 sub sp, #28
8009378: af00 add r7, sp, #0
800937a: 6078 str r0, [r7, #4]
800937c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800937e: 687b ldr r3, [r7, #4]
8009380: 6a1b ldr r3, [r3, #32]
8009382: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8009384: 687b ldr r3, [r7, #4]
8009386: 6a1b ldr r3, [r3, #32]
8009388: f423 7280 bic.w r2, r3, #256 @ 0x100
800938c: 687b ldr r3, [r7, #4]
800938e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8009390: 687b ldr r3, [r7, #4]
8009392: 685b ldr r3, [r3, #4]
8009394: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8009396: 687b ldr r3, [r7, #4]
8009398: 69db ldr r3, [r3, #28]
800939a: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
800939c: 68fb ldr r3, [r7, #12]
800939e: f023 0370 bic.w r3, r3, #112 @ 0x70
80093a2: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
80093a4: 68fb ldr r3, [r7, #12]
80093a6: f023 0303 bic.w r3, r3, #3
80093aa: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
80093ac: 683b ldr r3, [r7, #0]
80093ae: 681b ldr r3, [r3, #0]
80093b0: 68fa ldr r2, [r7, #12]
80093b2: 4313 orrs r3, r2
80093b4: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
80093b6: 697b ldr r3, [r7, #20]
80093b8: f423 7300 bic.w r3, r3, #512 @ 0x200
80093bc: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
80093be: 683b ldr r3, [r7, #0]
80093c0: 689b ldr r3, [r3, #8]
80093c2: 021b lsls r3, r3, #8
80093c4: 697a ldr r2, [r7, #20]
80093c6: 4313 orrs r3, r2
80093c8: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
80093ca: 687b ldr r3, [r7, #4]
80093cc: 4a1d ldr r2, [pc, #116] @ (8009444 <TIM_OC3_SetConfig+0xd0>)
80093ce: 4293 cmp r3, r2
80093d0: d10d bne.n 80093ee <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
80093d2: 697b ldr r3, [r7, #20]
80093d4: f423 6300 bic.w r3, r3, #2048 @ 0x800
80093d8: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
80093da: 683b ldr r3, [r7, #0]
80093dc: 68db ldr r3, [r3, #12]
80093de: 021b lsls r3, r3, #8
80093e0: 697a ldr r2, [r7, #20]
80093e2: 4313 orrs r3, r2
80093e4: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
80093e6: 697b ldr r3, [r7, #20]
80093e8: f423 6380 bic.w r3, r3, #1024 @ 0x400
80093ec: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80093ee: 687b ldr r3, [r7, #4]
80093f0: 4a14 ldr r2, [pc, #80] @ (8009444 <TIM_OC3_SetConfig+0xd0>)
80093f2: 4293 cmp r3, r2
80093f4: d113 bne.n 800941e <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
80093f6: 693b ldr r3, [r7, #16]
80093f8: f423 5380 bic.w r3, r3, #4096 @ 0x1000
80093fc: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
80093fe: 693b ldr r3, [r7, #16]
8009400: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8009404: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
8009406: 683b ldr r3, [r7, #0]
8009408: 695b ldr r3, [r3, #20]
800940a: 011b lsls r3, r3, #4
800940c: 693a ldr r2, [r7, #16]
800940e: 4313 orrs r3, r2
8009410: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
8009412: 683b ldr r3, [r7, #0]
8009414: 699b ldr r3, [r3, #24]
8009416: 011b lsls r3, r3, #4
8009418: 693a ldr r2, [r7, #16]
800941a: 4313 orrs r3, r2
800941c: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800941e: 687b ldr r3, [r7, #4]
8009420: 693a ldr r2, [r7, #16]
8009422: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8009424: 687b ldr r3, [r7, #4]
8009426: 68fa ldr r2, [r7, #12]
8009428: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
800942a: 683b ldr r3, [r7, #0]
800942c: 685a ldr r2, [r3, #4]
800942e: 687b ldr r3, [r7, #4]
8009430: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8009432: 687b ldr r3, [r7, #4]
8009434: 697a ldr r2, [r7, #20]
8009436: 621a str r2, [r3, #32]
}
8009438: bf00 nop
800943a: 371c adds r7, #28
800943c: 46bd mov sp, r7
800943e: bc80 pop {r7}
8009440: 4770 bx lr
8009442: bf00 nop
8009444: 40012c00 .word 0x40012c00
08009448 <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8009448: b480 push {r7}
800944a: b087 sub sp, #28
800944c: af00 add r7, sp, #0
800944e: 6078 str r0, [r7, #4]
8009450: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8009452: 687b ldr r3, [r7, #4]
8009454: 6a1b ldr r3, [r3, #32]
8009456: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
8009458: 687b ldr r3, [r7, #4]
800945a: 6a1b ldr r3, [r3, #32]
800945c: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8009460: 687b ldr r3, [r7, #4]
8009462: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8009464: 687b ldr r3, [r7, #4]
8009466: 685b ldr r3, [r3, #4]
8009468: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
800946a: 687b ldr r3, [r7, #4]
800946c: 69db ldr r3, [r3, #28]
800946e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8009470: 68fb ldr r3, [r7, #12]
8009472: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009476: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
8009478: 68fb ldr r3, [r7, #12]
800947a: f423 7340 bic.w r3, r3, #768 @ 0x300
800947e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8009480: 683b ldr r3, [r7, #0]
8009482: 681b ldr r3, [r3, #0]
8009484: 021b lsls r3, r3, #8
8009486: 68fa ldr r2, [r7, #12]
8009488: 4313 orrs r3, r2
800948a: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
800948c: 693b ldr r3, [r7, #16]
800948e: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8009492: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8009494: 683b ldr r3, [r7, #0]
8009496: 689b ldr r3, [r3, #8]
8009498: 031b lsls r3, r3, #12
800949a: 693a ldr r2, [r7, #16]
800949c: 4313 orrs r3, r2
800949e: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
80094a0: 687b ldr r3, [r7, #4]
80094a2: 4a0f ldr r2, [pc, #60] @ (80094e0 <TIM_OC4_SetConfig+0x98>)
80094a4: 4293 cmp r3, r2
80094a6: d109 bne.n 80094bc <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
80094a8: 697b ldr r3, [r7, #20]
80094aa: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80094ae: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
80094b0: 683b ldr r3, [r7, #0]
80094b2: 695b ldr r3, [r3, #20]
80094b4: 019b lsls r3, r3, #6
80094b6: 697a ldr r2, [r7, #20]
80094b8: 4313 orrs r3, r2
80094ba: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80094bc: 687b ldr r3, [r7, #4]
80094be: 697a ldr r2, [r7, #20]
80094c0: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
80094c2: 687b ldr r3, [r7, #4]
80094c4: 68fa ldr r2, [r7, #12]
80094c6: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
80094c8: 683b ldr r3, [r7, #0]
80094ca: 685a ldr r2, [r3, #4]
80094cc: 687b ldr r3, [r7, #4]
80094ce: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80094d0: 687b ldr r3, [r7, #4]
80094d2: 693a ldr r2, [r7, #16]
80094d4: 621a str r2, [r3, #32]
}
80094d6: bf00 nop
80094d8: 371c adds r7, #28
80094da: 46bd mov sp, r7
80094dc: bc80 pop {r7}
80094de: 4770 bx lr
80094e0: 40012c00 .word 0x40012c00
080094e4 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
80094e4: b480 push {r7}
80094e6: b087 sub sp, #28
80094e8: af00 add r7, sp, #0
80094ea: 60f8 str r0, [r7, #12]
80094ec: 60b9 str r1, [r7, #8]
80094ee: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
80094f0: 68fb ldr r3, [r7, #12]
80094f2: 6a1b ldr r3, [r3, #32]
80094f4: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
80094f6: 68fb ldr r3, [r7, #12]
80094f8: 6a1b ldr r3, [r3, #32]
80094fa: f023 0201 bic.w r2, r3, #1
80094fe: 68fb ldr r3, [r7, #12]
8009500: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8009502: 68fb ldr r3, [r7, #12]
8009504: 699b ldr r3, [r3, #24]
8009506: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
8009508: 693b ldr r3, [r7, #16]
800950a: f023 03f0 bic.w r3, r3, #240 @ 0xf0
800950e: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
8009510: 687b ldr r3, [r7, #4]
8009512: 011b lsls r3, r3, #4
8009514: 693a ldr r2, [r7, #16]
8009516: 4313 orrs r3, r2
8009518: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
800951a: 697b ldr r3, [r7, #20]
800951c: f023 030a bic.w r3, r3, #10
8009520: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
8009522: 697a ldr r2, [r7, #20]
8009524: 68bb ldr r3, [r7, #8]
8009526: 4313 orrs r3, r2
8009528: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
800952a: 68fb ldr r3, [r7, #12]
800952c: 693a ldr r2, [r7, #16]
800952e: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8009530: 68fb ldr r3, [r7, #12]
8009532: 697a ldr r2, [r7, #20]
8009534: 621a str r2, [r3, #32]
}
8009536: bf00 nop
8009538: 371c adds r7, #28
800953a: 46bd mov sp, r7
800953c: bc80 pop {r7}
800953e: 4770 bx lr
08009540 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8009540: b480 push {r7}
8009542: b087 sub sp, #28
8009544: af00 add r7, sp, #0
8009546: 60f8 str r0, [r7, #12]
8009548: 60b9 str r1, [r7, #8]
800954a: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
800954c: 68fb ldr r3, [r7, #12]
800954e: 6a1b ldr r3, [r3, #32]
8009550: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
8009552: 68fb ldr r3, [r7, #12]
8009554: 6a1b ldr r3, [r3, #32]
8009556: f023 0210 bic.w r2, r3, #16
800955a: 68fb ldr r3, [r7, #12]
800955c: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
800955e: 68fb ldr r3, [r7, #12]
8009560: 699b ldr r3, [r3, #24]
8009562: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
8009564: 693b ldr r3, [r7, #16]
8009566: f423 4370 bic.w r3, r3, #61440 @ 0xf000
800956a: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
800956c: 687b ldr r3, [r7, #4]
800956e: 031b lsls r3, r3, #12
8009570: 693a ldr r2, [r7, #16]
8009572: 4313 orrs r3, r2
8009574: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8009576: 697b ldr r3, [r7, #20]
8009578: f023 03a0 bic.w r3, r3, #160 @ 0xa0
800957c: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
800957e: 68bb ldr r3, [r7, #8]
8009580: 011b lsls r3, r3, #4
8009582: 697a ldr r2, [r7, #20]
8009584: 4313 orrs r3, r2
8009586: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8009588: 68fb ldr r3, [r7, #12]
800958a: 693a ldr r2, [r7, #16]
800958c: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
800958e: 68fb ldr r3, [r7, #12]
8009590: 697a ldr r2, [r7, #20]
8009592: 621a str r2, [r3, #32]
}
8009594: bf00 nop
8009596: 371c adds r7, #28
8009598: 46bd mov sp, r7
800959a: bc80 pop {r7}
800959c: 4770 bx lr
0800959e <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
800959e: b480 push {r7}
80095a0: b085 sub sp, #20
80095a2: af00 add r7, sp, #0
80095a4: 6078 str r0, [r7, #4]
80095a6: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
80095a8: 687b ldr r3, [r7, #4]
80095aa: 689b ldr r3, [r3, #8]
80095ac: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
80095ae: 68fb ldr r3, [r7, #12]
80095b0: f023 0370 bic.w r3, r3, #112 @ 0x70
80095b4: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
80095b6: 683a ldr r2, [r7, #0]
80095b8: 68fb ldr r3, [r7, #12]
80095ba: 4313 orrs r3, r2
80095bc: f043 0307 orr.w r3, r3, #7
80095c0: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
80095c2: 687b ldr r3, [r7, #4]
80095c4: 68fa ldr r2, [r7, #12]
80095c6: 609a str r2, [r3, #8]
}
80095c8: bf00 nop
80095ca: 3714 adds r7, #20
80095cc: 46bd mov sp, r7
80095ce: bc80 pop {r7}
80095d0: 4770 bx lr
080095d2 <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
80095d2: b480 push {r7}
80095d4: b087 sub sp, #28
80095d6: af00 add r7, sp, #0
80095d8: 60f8 str r0, [r7, #12]
80095da: 60b9 str r1, [r7, #8]
80095dc: 607a str r2, [r7, #4]
80095de: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
80095e0: 68fb ldr r3, [r7, #12]
80095e2: 689b ldr r3, [r3, #8]
80095e4: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
80095e6: 697b ldr r3, [r7, #20]
80095e8: f423 437f bic.w r3, r3, #65280 @ 0xff00
80095ec: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
80095ee: 683b ldr r3, [r7, #0]
80095f0: 021a lsls r2, r3, #8
80095f2: 687b ldr r3, [r7, #4]
80095f4: 431a orrs r2, r3
80095f6: 68bb ldr r3, [r7, #8]
80095f8: 4313 orrs r3, r2
80095fa: 697a ldr r2, [r7, #20]
80095fc: 4313 orrs r3, r2
80095fe: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8009600: 68fb ldr r3, [r7, #12]
8009602: 697a ldr r2, [r7, #20]
8009604: 609a str r2, [r3, #8]
}
8009606: bf00 nop
8009608: 371c adds r7, #28
800960a: 46bd mov sp, r7
800960c: bc80 pop {r7}
800960e: 4770 bx lr
08009610 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8009610: b480 push {r7}
8009612: b087 sub sp, #28
8009614: af00 add r7, sp, #0
8009616: 60f8 str r0, [r7, #12]
8009618: 60b9 str r1, [r7, #8]
800961a: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
800961c: 68bb ldr r3, [r7, #8]
800961e: f003 031f and.w r3, r3, #31
8009622: 2201 movs r2, #1
8009624: fa02 f303 lsl.w r3, r2, r3
8009628: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
800962a: 68fb ldr r3, [r7, #12]
800962c: 6a1a ldr r2, [r3, #32]
800962e: 697b ldr r3, [r7, #20]
8009630: 43db mvns r3, r3
8009632: 401a ands r2, r3
8009634: 68fb ldr r3, [r7, #12]
8009636: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8009638: 68fb ldr r3, [r7, #12]
800963a: 6a1a ldr r2, [r3, #32]
800963c: 68bb ldr r3, [r7, #8]
800963e: f003 031f and.w r3, r3, #31
8009642: 6879 ldr r1, [r7, #4]
8009644: fa01 f303 lsl.w r3, r1, r3
8009648: 431a orrs r2, r3
800964a: 68fb ldr r3, [r7, #12]
800964c: 621a str r2, [r3, #32]
}
800964e: bf00 nop
8009650: 371c adds r7, #28
8009652: 46bd mov sp, r7
8009654: bc80 pop {r7}
8009656: 4770 bx lr
08009658 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8009658: b480 push {r7}
800965a: b085 sub sp, #20
800965c: af00 add r7, sp, #0
800965e: 6078 str r0, [r7, #4]
8009660: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8009662: 687b ldr r3, [r7, #4]
8009664: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8009668: 2b01 cmp r3, #1
800966a: d101 bne.n 8009670 <HAL_TIMEx_MasterConfigSynchronization+0x18>
800966c: 2302 movs r3, #2
800966e: e046 b.n 80096fe <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8009670: 687b ldr r3, [r7, #4]
8009672: 2201 movs r2, #1
8009674: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8009678: 687b ldr r3, [r7, #4]
800967a: 2202 movs r2, #2
800967c: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8009680: 687b ldr r3, [r7, #4]
8009682: 681b ldr r3, [r3, #0]
8009684: 685b ldr r3, [r3, #4]
8009686: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8009688: 687b ldr r3, [r7, #4]
800968a: 681b ldr r3, [r3, #0]
800968c: 689b ldr r3, [r3, #8]
800968e: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8009690: 68fb ldr r3, [r7, #12]
8009692: f023 0370 bic.w r3, r3, #112 @ 0x70
8009696: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8009698: 683b ldr r3, [r7, #0]
800969a: 681b ldr r3, [r3, #0]
800969c: 68fa ldr r2, [r7, #12]
800969e: 4313 orrs r3, r2
80096a0: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
80096a2: 687b ldr r3, [r7, #4]
80096a4: 681b ldr r3, [r3, #0]
80096a6: 68fa ldr r2, [r7, #12]
80096a8: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
80096aa: 687b ldr r3, [r7, #4]
80096ac: 681b ldr r3, [r3, #0]
80096ae: 4a16 ldr r2, [pc, #88] @ (8009708 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
80096b0: 4293 cmp r3, r2
80096b2: d00e beq.n 80096d2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80096b4: 687b ldr r3, [r7, #4]
80096b6: 681b ldr r3, [r3, #0]
80096b8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80096bc: d009 beq.n 80096d2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80096be: 687b ldr r3, [r7, #4]
80096c0: 681b ldr r3, [r3, #0]
80096c2: 4a12 ldr r2, [pc, #72] @ (800970c <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
80096c4: 4293 cmp r3, r2
80096c6: d004 beq.n 80096d2 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
80096c8: 687b ldr r3, [r7, #4]
80096ca: 681b ldr r3, [r3, #0]
80096cc: 4a10 ldr r2, [pc, #64] @ (8009710 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
80096ce: 4293 cmp r3, r2
80096d0: d10c bne.n 80096ec <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
80096d2: 68bb ldr r3, [r7, #8]
80096d4: f023 0380 bic.w r3, r3, #128 @ 0x80
80096d8: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
80096da: 683b ldr r3, [r7, #0]
80096dc: 685b ldr r3, [r3, #4]
80096de: 68ba ldr r2, [r7, #8]
80096e0: 4313 orrs r3, r2
80096e2: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80096e4: 687b ldr r3, [r7, #4]
80096e6: 681b ldr r3, [r3, #0]
80096e8: 68ba ldr r2, [r7, #8]
80096ea: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
80096ec: 687b ldr r3, [r7, #4]
80096ee: 2201 movs r2, #1
80096f0: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
80096f4: 687b ldr r3, [r7, #4]
80096f6: 2200 movs r2, #0
80096f8: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
80096fc: 2300 movs r3, #0
}
80096fe: 4618 mov r0, r3
8009700: 3714 adds r7, #20
8009702: 46bd mov sp, r7
8009704: bc80 pop {r7}
8009706: 4770 bx lr
8009708: 40012c00 .word 0x40012c00
800970c: 40000400 .word 0x40000400
8009710: 40000800 .word 0x40000800
08009714 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8009714: b580 push {r7, lr}
8009716: b082 sub sp, #8
8009718: af00 add r7, sp, #0
800971a: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
800971c: 687b ldr r3, [r7, #4]
800971e: 2b00 cmp r3, #0
8009720: d101 bne.n 8009726 <HAL_UART_Init+0x12>
{
return HAL_ERROR;
8009722: 2301 movs r3, #1
8009724: e042 b.n 80097ac <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
8009726: 687b ldr r3, [r7, #4]
8009728: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
800972c: b2db uxtb r3, r3
800972e: 2b00 cmp r3, #0
8009730: d106 bne.n 8009740 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
8009732: 687b ldr r3, [r7, #4]
8009734: 2200 movs r2, #0
8009736: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
800973a: 6878 ldr r0, [r7, #4]
800973c: f7fb fb80 bl 8004e40 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8009740: 687b ldr r3, [r7, #4]
8009742: 2224 movs r2, #36 @ 0x24
8009744: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
8009748: 687b ldr r3, [r7, #4]
800974a: 681b ldr r3, [r3, #0]
800974c: 68da ldr r2, [r3, #12]
800974e: 687b ldr r3, [r7, #4]
8009750: 681b ldr r3, [r3, #0]
8009752: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8009756: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
8009758: 6878 ldr r0, [r7, #4]
800975a: f000 f971 bl 8009a40 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
800975e: 687b ldr r3, [r7, #4]
8009760: 681b ldr r3, [r3, #0]
8009762: 691a ldr r2, [r3, #16]
8009764: 687b ldr r3, [r7, #4]
8009766: 681b ldr r3, [r3, #0]
8009768: f422 4290 bic.w r2, r2, #18432 @ 0x4800
800976c: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
800976e: 687b ldr r3, [r7, #4]
8009770: 681b ldr r3, [r3, #0]
8009772: 695a ldr r2, [r3, #20]
8009774: 687b ldr r3, [r7, #4]
8009776: 681b ldr r3, [r3, #0]
8009778: f022 022a bic.w r2, r2, #42 @ 0x2a
800977c: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
800977e: 687b ldr r3, [r7, #4]
8009780: 681b ldr r3, [r3, #0]
8009782: 68da ldr r2, [r3, #12]
8009784: 687b ldr r3, [r7, #4]
8009786: 681b ldr r3, [r3, #0]
8009788: f442 5200 orr.w r2, r2, #8192 @ 0x2000
800978c: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
800978e: 687b ldr r3, [r7, #4]
8009790: 2200 movs r2, #0
8009792: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
8009794: 687b ldr r3, [r7, #4]
8009796: 2220 movs r2, #32
8009798: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
800979c: 687b ldr r3, [r7, #4]
800979e: 2220 movs r2, #32
80097a0: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
80097a4: 687b ldr r3, [r7, #4]
80097a6: 2200 movs r2, #0
80097a8: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
80097aa: 2300 movs r3, #0
}
80097ac: 4618 mov r0, r3
80097ae: 3708 adds r7, #8
80097b0: 46bd mov sp, r7
80097b2: bd80 pop {r7, pc}
080097b4 <HAL_UART_Transmit>:
* @param Size Amount of data elements (u8 or u16) to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
80097b4: b580 push {r7, lr}
80097b6: b08a sub sp, #40 @ 0x28
80097b8: af02 add r7, sp, #8
80097ba: 60f8 str r0, [r7, #12]
80097bc: 60b9 str r1, [r7, #8]
80097be: 603b str r3, [r7, #0]
80097c0: 4613 mov r3, r2
80097c2: 80fb strh r3, [r7, #6]
const uint8_t *pdata8bits;
const uint16_t *pdata16bits;
uint32_t tickstart = 0U;
80097c4: 2300 movs r3, #0
80097c6: 617b str r3, [r7, #20]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
80097c8: 68fb ldr r3, [r7, #12]
80097ca: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80097ce: b2db uxtb r3, r3
80097d0: 2b20 cmp r3, #32
80097d2: d175 bne.n 80098c0 <HAL_UART_Transmit+0x10c>
{
if ((pData == NULL) || (Size == 0U))
80097d4: 68bb ldr r3, [r7, #8]
80097d6: 2b00 cmp r3, #0
80097d8: d002 beq.n 80097e0 <HAL_UART_Transmit+0x2c>
80097da: 88fb ldrh r3, [r7, #6]
80097dc: 2b00 cmp r3, #0
80097de: d101 bne.n 80097e4 <HAL_UART_Transmit+0x30>
{
return HAL_ERROR;
80097e0: 2301 movs r3, #1
80097e2: e06e b.n 80098c2 <HAL_UART_Transmit+0x10e>
}
huart->ErrorCode = HAL_UART_ERROR_NONE;
80097e4: 68fb ldr r3, [r7, #12]
80097e6: 2200 movs r2, #0
80097e8: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_BUSY_TX;
80097ea: 68fb ldr r3, [r7, #12]
80097ec: 2221 movs r2, #33 @ 0x21
80097ee: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
80097f2: f7fb fc6d bl 80050d0 <HAL_GetTick>
80097f6: 6178 str r0, [r7, #20]
huart->TxXferSize = Size;
80097f8: 68fb ldr r3, [r7, #12]
80097fa: 88fa ldrh r2, [r7, #6]
80097fc: 849a strh r2, [r3, #36] @ 0x24
huart->TxXferCount = Size;
80097fe: 68fb ldr r3, [r7, #12]
8009800: 88fa ldrh r2, [r7, #6]
8009802: 84da strh r2, [r3, #38] @ 0x26
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
8009804: 68fb ldr r3, [r7, #12]
8009806: 689b ldr r3, [r3, #8]
8009808: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800980c: d108 bne.n 8009820 <HAL_UART_Transmit+0x6c>
800980e: 68fb ldr r3, [r7, #12]
8009810: 691b ldr r3, [r3, #16]
8009812: 2b00 cmp r3, #0
8009814: d104 bne.n 8009820 <HAL_UART_Transmit+0x6c>
{
pdata8bits = NULL;
8009816: 2300 movs r3, #0
8009818: 61fb str r3, [r7, #28]
pdata16bits = (const uint16_t *) pData;
800981a: 68bb ldr r3, [r7, #8]
800981c: 61bb str r3, [r7, #24]
800981e: e003 b.n 8009828 <HAL_UART_Transmit+0x74>
}
else
{
pdata8bits = pData;
8009820: 68bb ldr r3, [r7, #8]
8009822: 61fb str r3, [r7, #28]
pdata16bits = NULL;
8009824: 2300 movs r3, #0
8009826: 61bb str r3, [r7, #24]
}
while (huart->TxXferCount > 0U)
8009828: e02e b.n 8009888 <HAL_UART_Transmit+0xd4>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
800982a: 683b ldr r3, [r7, #0]
800982c: 9300 str r3, [sp, #0]
800982e: 697b ldr r3, [r7, #20]
8009830: 2200 movs r2, #0
8009832: 2180 movs r1, #128 @ 0x80
8009834: 68f8 ldr r0, [r7, #12]
8009836: f000 f848 bl 80098ca <UART_WaitOnFlagUntilTimeout>
800983a: 4603 mov r3, r0
800983c: 2b00 cmp r3, #0
800983e: d005 beq.n 800984c <HAL_UART_Transmit+0x98>
{
huart->gState = HAL_UART_STATE_READY;
8009840: 68fb ldr r3, [r7, #12]
8009842: 2220 movs r2, #32
8009844: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
8009848: 2303 movs r3, #3
800984a: e03a b.n 80098c2 <HAL_UART_Transmit+0x10e>
}
if (pdata8bits == NULL)
800984c: 69fb ldr r3, [r7, #28]
800984e: 2b00 cmp r3, #0
8009850: d10b bne.n 800986a <HAL_UART_Transmit+0xb6>
{
huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
8009852: 69bb ldr r3, [r7, #24]
8009854: 881b ldrh r3, [r3, #0]
8009856: 461a mov r2, r3
8009858: 68fb ldr r3, [r7, #12]
800985a: 681b ldr r3, [r3, #0]
800985c: f3c2 0208 ubfx r2, r2, #0, #9
8009860: 605a str r2, [r3, #4]
pdata16bits++;
8009862: 69bb ldr r3, [r7, #24]
8009864: 3302 adds r3, #2
8009866: 61bb str r3, [r7, #24]
8009868: e007 b.n 800987a <HAL_UART_Transmit+0xc6>
}
else
{
huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
800986a: 69fb ldr r3, [r7, #28]
800986c: 781a ldrb r2, [r3, #0]
800986e: 68fb ldr r3, [r7, #12]
8009870: 681b ldr r3, [r3, #0]
8009872: 605a str r2, [r3, #4]
pdata8bits++;
8009874: 69fb ldr r3, [r7, #28]
8009876: 3301 adds r3, #1
8009878: 61fb str r3, [r7, #28]
}
huart->TxXferCount--;
800987a: 68fb ldr r3, [r7, #12]
800987c: 8cdb ldrh r3, [r3, #38] @ 0x26
800987e: b29b uxth r3, r3
8009880: 3b01 subs r3, #1
8009882: b29a uxth r2, r3
8009884: 68fb ldr r3, [r7, #12]
8009886: 84da strh r2, [r3, #38] @ 0x26
while (huart->TxXferCount > 0U)
8009888: 68fb ldr r3, [r7, #12]
800988a: 8cdb ldrh r3, [r3, #38] @ 0x26
800988c: b29b uxth r3, r3
800988e: 2b00 cmp r3, #0
8009890: d1cb bne.n 800982a <HAL_UART_Transmit+0x76>
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
8009892: 683b ldr r3, [r7, #0]
8009894: 9300 str r3, [sp, #0]
8009896: 697b ldr r3, [r7, #20]
8009898: 2200 movs r2, #0
800989a: 2140 movs r1, #64 @ 0x40
800989c: 68f8 ldr r0, [r7, #12]
800989e: f000 f814 bl 80098ca <UART_WaitOnFlagUntilTimeout>
80098a2: 4603 mov r3, r0
80098a4: 2b00 cmp r3, #0
80098a6: d005 beq.n 80098b4 <HAL_UART_Transmit+0x100>
{
huart->gState = HAL_UART_STATE_READY;
80098a8: 68fb ldr r3, [r7, #12]
80098aa: 2220 movs r2, #32
80098ac: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
80098b0: 2303 movs r3, #3
80098b2: e006 b.n 80098c2 <HAL_UART_Transmit+0x10e>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
80098b4: 68fb ldr r3, [r7, #12]
80098b6: 2220 movs r2, #32
80098b8: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_OK;
80098bc: 2300 movs r3, #0
80098be: e000 b.n 80098c2 <HAL_UART_Transmit+0x10e>
}
else
{
return HAL_BUSY;
80098c0: 2302 movs r3, #2
}
}
80098c2: 4618 mov r0, r3
80098c4: 3720 adds r7, #32
80098c6: 46bd mov sp, r7
80098c8: bd80 pop {r7, pc}
080098ca <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
80098ca: b580 push {r7, lr}
80098cc: b086 sub sp, #24
80098ce: af00 add r7, sp, #0
80098d0: 60f8 str r0, [r7, #12]
80098d2: 60b9 str r1, [r7, #8]
80098d4: 603b str r3, [r7, #0]
80098d6: 4613 mov r3, r2
80098d8: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
80098da: e03b b.n 8009954 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
80098dc: 6a3b ldr r3, [r7, #32]
80098de: f1b3 3fff cmp.w r3, #4294967295
80098e2: d037 beq.n 8009954 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
80098e4: f7fb fbf4 bl 80050d0 <HAL_GetTick>
80098e8: 4602 mov r2, r0
80098ea: 683b ldr r3, [r7, #0]
80098ec: 1ad3 subs r3, r2, r3
80098ee: 6a3a ldr r2, [r7, #32]
80098f0: 429a cmp r2, r3
80098f2: d302 bcc.n 80098fa <UART_WaitOnFlagUntilTimeout+0x30>
80098f4: 6a3b ldr r3, [r7, #32]
80098f6: 2b00 cmp r3, #0
80098f8: d101 bne.n 80098fe <UART_WaitOnFlagUntilTimeout+0x34>
{
return HAL_TIMEOUT;
80098fa: 2303 movs r3, #3
80098fc: e03a b.n 8009974 <UART_WaitOnFlagUntilTimeout+0xaa>
}
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
80098fe: 68fb ldr r3, [r7, #12]
8009900: 681b ldr r3, [r3, #0]
8009902: 68db ldr r3, [r3, #12]
8009904: f003 0304 and.w r3, r3, #4
8009908: 2b00 cmp r3, #0
800990a: d023 beq.n 8009954 <UART_WaitOnFlagUntilTimeout+0x8a>
800990c: 68bb ldr r3, [r7, #8]
800990e: 2b80 cmp r3, #128 @ 0x80
8009910: d020 beq.n 8009954 <UART_WaitOnFlagUntilTimeout+0x8a>
8009912: 68bb ldr r3, [r7, #8]
8009914: 2b40 cmp r3, #64 @ 0x40
8009916: d01d beq.n 8009954 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
8009918: 68fb ldr r3, [r7, #12]
800991a: 681b ldr r3, [r3, #0]
800991c: 681b ldr r3, [r3, #0]
800991e: f003 0308 and.w r3, r3, #8
8009922: 2b08 cmp r3, #8
8009924: d116 bne.n 8009954 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Clear Overrun Error flag*/
__HAL_UART_CLEAR_OREFLAG(huart);
8009926: 2300 movs r3, #0
8009928: 617b str r3, [r7, #20]
800992a: 68fb ldr r3, [r7, #12]
800992c: 681b ldr r3, [r3, #0]
800992e: 681b ldr r3, [r3, #0]
8009930: 617b str r3, [r7, #20]
8009932: 68fb ldr r3, [r7, #12]
8009934: 681b ldr r3, [r3, #0]
8009936: 685b ldr r3, [r3, #4]
8009938: 617b str r3, [r7, #20]
800993a: 697b ldr r3, [r7, #20]
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
800993c: 68f8 ldr r0, [r7, #12]
800993e: f000 f81d bl 800997c <UART_EndRxTransfer>
huart->ErrorCode = HAL_UART_ERROR_ORE;
8009942: 68fb ldr r3, [r7, #12]
8009944: 2208 movs r2, #8
8009946: 645a str r2, [r3, #68] @ 0x44
/* Process Unlocked */
__HAL_UNLOCK(huart);
8009948: 68fb ldr r3, [r7, #12]
800994a: 2200 movs r2, #0
800994c: f883 2040 strb.w r2, [r3, #64] @ 0x40
return HAL_ERROR;
8009950: 2301 movs r3, #1
8009952: e00f b.n 8009974 <UART_WaitOnFlagUntilTimeout+0xaa>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8009954: 68fb ldr r3, [r7, #12]
8009956: 681b ldr r3, [r3, #0]
8009958: 681a ldr r2, [r3, #0]
800995a: 68bb ldr r3, [r7, #8]
800995c: 4013 ands r3, r2
800995e: 68ba ldr r2, [r7, #8]
8009960: 429a cmp r2, r3
8009962: bf0c ite eq
8009964: 2301 moveq r3, #1
8009966: 2300 movne r3, #0
8009968: b2db uxtb r3, r3
800996a: 461a mov r2, r3
800996c: 79fb ldrb r3, [r7, #7]
800996e: 429a cmp r2, r3
8009970: d0b4 beq.n 80098dc <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
8009972: 2300 movs r3, #0
}
8009974: 4618 mov r0, r3
8009976: 3718 adds r7, #24
8009978: 46bd mov sp, r7
800997a: bd80 pop {r7, pc}
0800997c <UART_EndRxTransfer>:
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
* @param huart UART handle.
* @retval None
*/
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
800997c: b480 push {r7}
800997e: b095 sub sp, #84 @ 0x54
8009980: af00 add r7, sp, #0
8009982: 6078 str r0, [r7, #4]
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
8009984: 687b ldr r3, [r7, #4]
8009986: 681b ldr r3, [r3, #0]
8009988: 330c adds r3, #12
800998a: 637b str r3, [r7, #52] @ 0x34
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800998c: 6b7b ldr r3, [r7, #52] @ 0x34
800998e: e853 3f00 ldrex r3, [r3]
8009992: 633b str r3, [r7, #48] @ 0x30
return(result);
8009994: 6b3b ldr r3, [r7, #48] @ 0x30
8009996: f423 7390 bic.w r3, r3, #288 @ 0x120
800999a: 64fb str r3, [r7, #76] @ 0x4c
800999c: 687b ldr r3, [r7, #4]
800999e: 681b ldr r3, [r3, #0]
80099a0: 330c adds r3, #12
80099a2: 6cfa ldr r2, [r7, #76] @ 0x4c
80099a4: 643a str r2, [r7, #64] @ 0x40
80099a6: 63fb str r3, [r7, #60] @ 0x3c
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
80099a8: 6bf9 ldr r1, [r7, #60] @ 0x3c
80099aa: 6c3a ldr r2, [r7, #64] @ 0x40
80099ac: e841 2300 strex r3, r2, [r1]
80099b0: 63bb str r3, [r7, #56] @ 0x38
return(result);
80099b2: 6bbb ldr r3, [r7, #56] @ 0x38
80099b4: 2b00 cmp r3, #0
80099b6: d1e5 bne.n 8009984 <UART_EndRxTransfer+0x8>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
80099b8: 687b ldr r3, [r7, #4]
80099ba: 681b ldr r3, [r3, #0]
80099bc: 3314 adds r3, #20
80099be: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
80099c0: 6a3b ldr r3, [r7, #32]
80099c2: e853 3f00 ldrex r3, [r3]
80099c6: 61fb str r3, [r7, #28]
return(result);
80099c8: 69fb ldr r3, [r7, #28]
80099ca: f023 0301 bic.w r3, r3, #1
80099ce: 64bb str r3, [r7, #72] @ 0x48
80099d0: 687b ldr r3, [r7, #4]
80099d2: 681b ldr r3, [r3, #0]
80099d4: 3314 adds r3, #20
80099d6: 6cba ldr r2, [r7, #72] @ 0x48
80099d8: 62fa str r2, [r7, #44] @ 0x2c
80099da: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
80099dc: 6ab9 ldr r1, [r7, #40] @ 0x28
80099de: 6afa ldr r2, [r7, #44] @ 0x2c
80099e0: e841 2300 strex r3, r2, [r1]
80099e4: 627b str r3, [r7, #36] @ 0x24
return(result);
80099e6: 6a7b ldr r3, [r7, #36] @ 0x24
80099e8: 2b00 cmp r3, #0
80099ea: d1e5 bne.n 80099b8 <UART_EndRxTransfer+0x3c>
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
80099ec: 687b ldr r3, [r7, #4]
80099ee: 6b1b ldr r3, [r3, #48] @ 0x30
80099f0: 2b01 cmp r3, #1
80099f2: d119 bne.n 8009a28 <UART_EndRxTransfer+0xac>
{
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
80099f4: 687b ldr r3, [r7, #4]
80099f6: 681b ldr r3, [r3, #0]
80099f8: 330c adds r3, #12
80099fa: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
80099fc: 68fb ldr r3, [r7, #12]
80099fe: e853 3f00 ldrex r3, [r3]
8009a02: 60bb str r3, [r7, #8]
return(result);
8009a04: 68bb ldr r3, [r7, #8]
8009a06: f023 0310 bic.w r3, r3, #16
8009a0a: 647b str r3, [r7, #68] @ 0x44
8009a0c: 687b ldr r3, [r7, #4]
8009a0e: 681b ldr r3, [r3, #0]
8009a10: 330c adds r3, #12
8009a12: 6c7a ldr r2, [r7, #68] @ 0x44
8009a14: 61ba str r2, [r7, #24]
8009a16: 617b str r3, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009a18: 6979 ldr r1, [r7, #20]
8009a1a: 69ba ldr r2, [r7, #24]
8009a1c: e841 2300 strex r3, r2, [r1]
8009a20: 613b str r3, [r7, #16]
return(result);
8009a22: 693b ldr r3, [r7, #16]
8009a24: 2b00 cmp r3, #0
8009a26: d1e5 bne.n 80099f4 <UART_EndRxTransfer+0x78>
}
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
8009a28: 687b ldr r3, [r7, #4]
8009a2a: 2220 movs r2, #32
8009a2c: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8009a30: 687b ldr r3, [r7, #4]
8009a32: 2200 movs r2, #0
8009a34: 631a str r2, [r3, #48] @ 0x30
}
8009a36: bf00 nop
8009a38: 3754 adds r7, #84 @ 0x54
8009a3a: 46bd mov sp, r7
8009a3c: bc80 pop {r7}
8009a3e: 4770 bx lr
08009a40 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
8009a40: b580 push {r7, lr}
8009a42: b084 sub sp, #16
8009a44: af00 add r7, sp, #0
8009a46: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8009a48: 687b ldr r3, [r7, #4]
8009a4a: 681b ldr r3, [r3, #0]
8009a4c: 691b ldr r3, [r3, #16]
8009a4e: f423 5140 bic.w r1, r3, #12288 @ 0x3000
8009a52: 687b ldr r3, [r7, #4]
8009a54: 68da ldr r2, [r3, #12]
8009a56: 687b ldr r3, [r7, #4]
8009a58: 681b ldr r3, [r3, #0]
8009a5a: 430a orrs r2, r1
8009a5c: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
8009a5e: 687b ldr r3, [r7, #4]
8009a60: 689a ldr r2, [r3, #8]
8009a62: 687b ldr r3, [r7, #4]
8009a64: 691b ldr r3, [r3, #16]
8009a66: 431a orrs r2, r3
8009a68: 687b ldr r3, [r7, #4]
8009a6a: 695b ldr r3, [r3, #20]
8009a6c: 4313 orrs r3, r2
8009a6e: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8009a70: 687b ldr r3, [r7, #4]
8009a72: 681b ldr r3, [r3, #0]
8009a74: 68db ldr r3, [r3, #12]
8009a76: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
8009a7a: f023 030c bic.w r3, r3, #12
8009a7e: 687a ldr r2, [r7, #4]
8009a80: 6812 ldr r2, [r2, #0]
8009a82: 68b9 ldr r1, [r7, #8]
8009a84: 430b orrs r3, r1
8009a86: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8009a88: 687b ldr r3, [r7, #4]
8009a8a: 681b ldr r3, [r3, #0]
8009a8c: 695b ldr r3, [r3, #20]
8009a8e: f423 7140 bic.w r1, r3, #768 @ 0x300
8009a92: 687b ldr r3, [r7, #4]
8009a94: 699a ldr r2, [r3, #24]
8009a96: 687b ldr r3, [r7, #4]
8009a98: 681b ldr r3, [r3, #0]
8009a9a: 430a orrs r2, r1
8009a9c: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8009a9e: 687b ldr r3, [r7, #4]
8009aa0: 681b ldr r3, [r3, #0]
8009aa2: 4a2c ldr r2, [pc, #176] @ (8009b54 <UART_SetConfig+0x114>)
8009aa4: 4293 cmp r3, r2
8009aa6: d103 bne.n 8009ab0 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8009aa8: f7fe fede bl 8008868 <HAL_RCC_GetPCLK2Freq>
8009aac: 60f8 str r0, [r7, #12]
8009aae: e002 b.n 8009ab6 <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8009ab0: f7fe fec6 bl 8008840 <HAL_RCC_GetPCLK1Freq>
8009ab4: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8009ab6: 68fa ldr r2, [r7, #12]
8009ab8: 4613 mov r3, r2
8009aba: 009b lsls r3, r3, #2
8009abc: 4413 add r3, r2
8009abe: 009a lsls r2, r3, #2
8009ac0: 441a add r2, r3
8009ac2: 687b ldr r3, [r7, #4]
8009ac4: 685b ldr r3, [r3, #4]
8009ac6: 009b lsls r3, r3, #2
8009ac8: fbb2 f3f3 udiv r3, r2, r3
8009acc: 4a22 ldr r2, [pc, #136] @ (8009b58 <UART_SetConfig+0x118>)
8009ace: fba2 2303 umull r2, r3, r2, r3
8009ad2: 095b lsrs r3, r3, #5
8009ad4: 0119 lsls r1, r3, #4
8009ad6: 68fa ldr r2, [r7, #12]
8009ad8: 4613 mov r3, r2
8009ada: 009b lsls r3, r3, #2
8009adc: 4413 add r3, r2
8009ade: 009a lsls r2, r3, #2
8009ae0: 441a add r2, r3
8009ae2: 687b ldr r3, [r7, #4]
8009ae4: 685b ldr r3, [r3, #4]
8009ae6: 009b lsls r3, r3, #2
8009ae8: fbb2 f2f3 udiv r2, r2, r3
8009aec: 4b1a ldr r3, [pc, #104] @ (8009b58 <UART_SetConfig+0x118>)
8009aee: fba3 0302 umull r0, r3, r3, r2
8009af2: 095b lsrs r3, r3, #5
8009af4: 2064 movs r0, #100 @ 0x64
8009af6: fb00 f303 mul.w r3, r0, r3
8009afa: 1ad3 subs r3, r2, r3
8009afc: 011b lsls r3, r3, #4
8009afe: 3332 adds r3, #50 @ 0x32
8009b00: 4a15 ldr r2, [pc, #84] @ (8009b58 <UART_SetConfig+0x118>)
8009b02: fba2 2303 umull r2, r3, r2, r3
8009b06: 095b lsrs r3, r3, #5
8009b08: f003 03f0 and.w r3, r3, #240 @ 0xf0
8009b0c: 4419 add r1, r3
8009b0e: 68fa ldr r2, [r7, #12]
8009b10: 4613 mov r3, r2
8009b12: 009b lsls r3, r3, #2
8009b14: 4413 add r3, r2
8009b16: 009a lsls r2, r3, #2
8009b18: 441a add r2, r3
8009b1a: 687b ldr r3, [r7, #4]
8009b1c: 685b ldr r3, [r3, #4]
8009b1e: 009b lsls r3, r3, #2
8009b20: fbb2 f2f3 udiv r2, r2, r3
8009b24: 4b0c ldr r3, [pc, #48] @ (8009b58 <UART_SetConfig+0x118>)
8009b26: fba3 0302 umull r0, r3, r3, r2
8009b2a: 095b lsrs r3, r3, #5
8009b2c: 2064 movs r0, #100 @ 0x64
8009b2e: fb00 f303 mul.w r3, r0, r3
8009b32: 1ad3 subs r3, r2, r3
8009b34: 011b lsls r3, r3, #4
8009b36: 3332 adds r3, #50 @ 0x32
8009b38: 4a07 ldr r2, [pc, #28] @ (8009b58 <UART_SetConfig+0x118>)
8009b3a: fba2 2303 umull r2, r3, r2, r3
8009b3e: 095b lsrs r3, r3, #5
8009b40: f003 020f and.w r2, r3, #15
8009b44: 687b ldr r3, [r7, #4]
8009b46: 681b ldr r3, [r3, #0]
8009b48: 440a add r2, r1
8009b4a: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
8009b4c: bf00 nop
8009b4e: 3710 adds r7, #16
8009b50: 46bd mov sp, r7
8009b52: bd80 pop {r7, pc}
8009b54: 40013800 .word 0x40013800
8009b58: 51eb851f .word 0x51eb851f
08009b5c <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009b5c: b480 push {r7}
8009b5e: b085 sub sp, #20
8009b60: af00 add r7, sp, #0
8009b62: 60f8 str r0, [r7, #12]
8009b64: 4638 mov r0, r7
8009b66: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8009b6a: 2300 movs r3, #0
}
8009b6c: 4618 mov r0, r3
8009b6e: 3714 adds r7, #20
8009b70: 46bd mov sp, r7
8009b72: bc80 pop {r7}
8009b74: 4770 bx lr
08009b76 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8009b76: b480 push {r7}
8009b78: b085 sub sp, #20
8009b7a: af00 add r7, sp, #0
8009b7c: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009b7e: 687b ldr r3, [r7, #4]
8009b80: 2200 movs r2, #0
8009b82: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8009b86: f44f 433f mov.w r3, #48896 @ 0xbf00
8009b8a: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8009b8c: 68fb ldr r3, [r7, #12]
8009b8e: b29a uxth r2, r3
8009b90: 687b ldr r3, [r7, #4]
8009b92: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8009b96: 2300 movs r3, #0
}
8009b98: 4618 mov r0, r3
8009b9a: 3714 adds r7, #20
8009b9c: 46bd mov sp, r7
8009b9e: bc80 pop {r7}
8009ba0: 4770 bx lr
08009ba2 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8009ba2: b480 push {r7}
8009ba4: b085 sub sp, #20
8009ba6: af00 add r7, sp, #0
8009ba8: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8009baa: f44f 433f mov.w r3, #48896 @ 0xbf00
8009bae: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8009bb0: 687b ldr r3, [r7, #4]
8009bb2: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8009bb6: b29a uxth r2, r3
8009bb8: 68fb ldr r3, [r7, #12]
8009bba: b29b uxth r3, r3
8009bbc: 43db mvns r3, r3
8009bbe: b29b uxth r3, r3
8009bc0: 4013 ands r3, r2
8009bc2: b29a uxth r2, r3
8009bc4: 687b ldr r3, [r7, #4]
8009bc6: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8009bca: 2300 movs r3, #0
}
8009bcc: 4618 mov r0, r3
8009bce: 3714 adds r7, #20
8009bd0: 46bd mov sp, r7
8009bd2: bc80 pop {r7}
8009bd4: 4770 bx lr
08009bd6 <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8009bd6: b480 push {r7}
8009bd8: b083 sub sp, #12
8009bda: af00 add r7, sp, #0
8009bdc: 6078 str r0, [r7, #4]
8009bde: 460b mov r3, r1
8009be0: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8009be2: 2300 movs r3, #0
}
8009be4: 4618 mov r0, r3
8009be6: 370c adds r7, #12
8009be8: 46bd mov sp, r7
8009bea: bc80 pop {r7}
8009bec: 4770 bx lr
08009bee <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009bee: b480 push {r7}
8009bf0: b085 sub sp, #20
8009bf2: af00 add r7, sp, #0
8009bf4: 60f8 str r0, [r7, #12]
8009bf6: 4638 mov r0, r7
8009bf8: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8009bfc: 68fb ldr r3, [r7, #12]
8009bfe: 2201 movs r2, #1
8009c00: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
8009c04: 68fb ldr r3, [r7, #12]
8009c06: 2200 movs r2, #0
8009c08: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009c0c: 68fb ldr r3, [r7, #12]
8009c0e: 2200 movs r2, #0
8009c10: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
8009c14: 68fb ldr r3, [r7, #12]
8009c16: 2200 movs r2, #0
8009c18: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8009c1c: 2300 movs r3, #0
}
8009c1e: 4618 mov r0, r3
8009c20: 3714 adds r7, #20
8009c22: 46bd mov sp, r7
8009c24: bc80 pop {r7}
8009c26: 4770 bx lr
08009c28 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8009c28: b480 push {r7}
8009c2a: b09d sub sp, #116 @ 0x74
8009c2c: af00 add r7, sp, #0
8009c2e: 6078 str r0, [r7, #4]
8009c30: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
8009c32: 2300 movs r3, #0
8009c34: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
8009c38: 687a ldr r2, [r7, #4]
8009c3a: 683b ldr r3, [r7, #0]
8009c3c: 781b ldrb r3, [r3, #0]
8009c3e: 009b lsls r3, r3, #2
8009c40: 4413 add r3, r2
8009c42: 881b ldrh r3, [r3, #0]
8009c44: b29b uxth r3, r3
8009c46: f423 43ec bic.w r3, r3, #30208 @ 0x7600
8009c4a: f023 0370 bic.w r3, r3, #112 @ 0x70
8009c4e: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
8009c52: 683b ldr r3, [r7, #0]
8009c54: 78db ldrb r3, [r3, #3]
8009c56: 2b03 cmp r3, #3
8009c58: d81f bhi.n 8009c9a <USB_ActivateEndpoint+0x72>
8009c5a: a201 add r2, pc, #4 @ (adr r2, 8009c60 <USB_ActivateEndpoint+0x38>)
8009c5c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009c60: 08009c71 .word 0x08009c71
8009c64: 08009c8d .word 0x08009c8d
8009c68: 08009ca3 .word 0x08009ca3
8009c6c: 08009c7f .word 0x08009c7f
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8009c70: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009c74: f443 7300 orr.w r3, r3, #512 @ 0x200
8009c78: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009c7c: e012 b.n 8009ca4 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8009c7e: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009c82: f443 63c0 orr.w r3, r3, #1536 @ 0x600
8009c86: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009c8a: e00b b.n 8009ca4 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8009c8c: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009c90: f443 6380 orr.w r3, r3, #1024 @ 0x400
8009c94: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009c98: e004 b.n 8009ca4 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
8009c9a: 2301 movs r3, #1
8009c9c: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8009ca0: e000 b.n 8009ca4 <USB_ActivateEndpoint+0x7c>
break;
8009ca2: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8009ca4: 687a ldr r2, [r7, #4]
8009ca6: 683b ldr r3, [r7, #0]
8009ca8: 781b ldrb r3, [r3, #0]
8009caa: 009b lsls r3, r3, #2
8009cac: 441a add r2, r3
8009cae: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009cb2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009cb6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009cba: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009cbe: f043 0380 orr.w r3, r3, #128 @ 0x80
8009cc2: b29b uxth r3, r3
8009cc4: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8009cc6: 687a ldr r2, [r7, #4]
8009cc8: 683b ldr r3, [r7, #0]
8009cca: 781b ldrb r3, [r3, #0]
8009ccc: 009b lsls r3, r3, #2
8009cce: 4413 add r3, r2
8009cd0: 881b ldrh r3, [r3, #0]
8009cd2: b29b uxth r3, r3
8009cd4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009cd8: f023 0370 bic.w r3, r3, #112 @ 0x70
8009cdc: b29b uxth r3, r3
8009cde: 683a ldr r2, [r7, #0]
8009ce0: 7812 ldrb r2, [r2, #0]
8009ce2: 4313 orrs r3, r2
8009ce4: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
8009ce8: 687a ldr r2, [r7, #4]
8009cea: 683b ldr r3, [r7, #0]
8009cec: 781b ldrb r3, [r3, #0]
8009cee: 009b lsls r3, r3, #2
8009cf0: 441a add r2, r3
8009cf2: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
8009cf6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009cfa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009cfe: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d02: f043 0380 orr.w r3, r3, #128 @ 0x80
8009d06: b29b uxth r3, r3
8009d08: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
8009d0a: 683b ldr r3, [r7, #0]
8009d0c: 7b1b ldrb r3, [r3, #12]
8009d0e: 2b00 cmp r3, #0
8009d10: f040 8178 bne.w 800a004 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8009d14: 683b ldr r3, [r7, #0]
8009d16: 785b ldrb r3, [r3, #1]
8009d18: 2b00 cmp r3, #0
8009d1a: f000 8084 beq.w 8009e26 <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8009d1e: 687b ldr r3, [r7, #4]
8009d20: 61bb str r3, [r7, #24]
8009d22: 687b ldr r3, [r7, #4]
8009d24: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009d28: b29b uxth r3, r3
8009d2a: 461a mov r2, r3
8009d2c: 69bb ldr r3, [r7, #24]
8009d2e: 4413 add r3, r2
8009d30: 61bb str r3, [r7, #24]
8009d32: 683b ldr r3, [r7, #0]
8009d34: 781b ldrb r3, [r3, #0]
8009d36: 011a lsls r2, r3, #4
8009d38: 69bb ldr r3, [r7, #24]
8009d3a: 4413 add r3, r2
8009d3c: f503 6380 add.w r3, r3, #1024 @ 0x400
8009d40: 617b str r3, [r7, #20]
8009d42: 683b ldr r3, [r7, #0]
8009d44: 88db ldrh r3, [r3, #6]
8009d46: 085b lsrs r3, r3, #1
8009d48: b29b uxth r3, r3
8009d4a: 005b lsls r3, r3, #1
8009d4c: b29a uxth r2, r3
8009d4e: 697b ldr r3, [r7, #20]
8009d50: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009d52: 687a ldr r2, [r7, #4]
8009d54: 683b ldr r3, [r7, #0]
8009d56: 781b ldrb r3, [r3, #0]
8009d58: 009b lsls r3, r3, #2
8009d5a: 4413 add r3, r2
8009d5c: 881b ldrh r3, [r3, #0]
8009d5e: 827b strh r3, [r7, #18]
8009d60: 8a7b ldrh r3, [r7, #18]
8009d62: f003 0340 and.w r3, r3, #64 @ 0x40
8009d66: 2b00 cmp r3, #0
8009d68: d01b beq.n 8009da2 <USB_ActivateEndpoint+0x17a>
8009d6a: 687a ldr r2, [r7, #4]
8009d6c: 683b ldr r3, [r7, #0]
8009d6e: 781b ldrb r3, [r3, #0]
8009d70: 009b lsls r3, r3, #2
8009d72: 4413 add r3, r2
8009d74: 881b ldrh r3, [r3, #0]
8009d76: b29b uxth r3, r3
8009d78: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009d7c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009d80: 823b strh r3, [r7, #16]
8009d82: 687a ldr r2, [r7, #4]
8009d84: 683b ldr r3, [r7, #0]
8009d86: 781b ldrb r3, [r3, #0]
8009d88: 009b lsls r3, r3, #2
8009d8a: 441a add r2, r3
8009d8c: 8a3b ldrh r3, [r7, #16]
8009d8e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d92: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d96: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d9a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009d9e: b29b uxth r3, r3
8009da0: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8009da2: 683b ldr r3, [r7, #0]
8009da4: 78db ldrb r3, [r3, #3]
8009da6: 2b01 cmp r3, #1
8009da8: d020 beq.n 8009dec <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8009daa: 687a ldr r2, [r7, #4]
8009dac: 683b ldr r3, [r7, #0]
8009dae: 781b ldrb r3, [r3, #0]
8009db0: 009b lsls r3, r3, #2
8009db2: 4413 add r3, r2
8009db4: 881b ldrh r3, [r3, #0]
8009db6: b29b uxth r3, r3
8009db8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009dbc: f023 0340 bic.w r3, r3, #64 @ 0x40
8009dc0: 81bb strh r3, [r7, #12]
8009dc2: 89bb ldrh r3, [r7, #12]
8009dc4: f083 0320 eor.w r3, r3, #32
8009dc8: 81bb strh r3, [r7, #12]
8009dca: 687a ldr r2, [r7, #4]
8009dcc: 683b ldr r3, [r7, #0]
8009dce: 781b ldrb r3, [r3, #0]
8009dd0: 009b lsls r3, r3, #2
8009dd2: 441a add r2, r3
8009dd4: 89bb ldrh r3, [r7, #12]
8009dd6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009dda: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009dde: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009de2: f043 0380 orr.w r3, r3, #128 @ 0x80
8009de6: b29b uxth r3, r3
8009de8: 8013 strh r3, [r2, #0]
8009dea: e2d5 b.n 800a398 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009dec: 687a ldr r2, [r7, #4]
8009dee: 683b ldr r3, [r7, #0]
8009df0: 781b ldrb r3, [r3, #0]
8009df2: 009b lsls r3, r3, #2
8009df4: 4413 add r3, r2
8009df6: 881b ldrh r3, [r3, #0]
8009df8: b29b uxth r3, r3
8009dfa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009dfe: f023 0340 bic.w r3, r3, #64 @ 0x40
8009e02: 81fb strh r3, [r7, #14]
8009e04: 687a ldr r2, [r7, #4]
8009e06: 683b ldr r3, [r7, #0]
8009e08: 781b ldrb r3, [r3, #0]
8009e0a: 009b lsls r3, r3, #2
8009e0c: 441a add r2, r3
8009e0e: 89fb ldrh r3, [r7, #14]
8009e10: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009e14: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e18: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009e1c: f043 0380 orr.w r3, r3, #128 @ 0x80
8009e20: b29b uxth r3, r3
8009e22: 8013 strh r3, [r2, #0]
8009e24: e2b8 b.n 800a398 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
8009e26: 687b ldr r3, [r7, #4]
8009e28: 633b str r3, [r7, #48] @ 0x30
8009e2a: 687b ldr r3, [r7, #4]
8009e2c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009e30: b29b uxth r3, r3
8009e32: 461a mov r2, r3
8009e34: 6b3b ldr r3, [r7, #48] @ 0x30
8009e36: 4413 add r3, r2
8009e38: 633b str r3, [r7, #48] @ 0x30
8009e3a: 683b ldr r3, [r7, #0]
8009e3c: 781b ldrb r3, [r3, #0]
8009e3e: 011a lsls r2, r3, #4
8009e40: 6b3b ldr r3, [r7, #48] @ 0x30
8009e42: 4413 add r3, r2
8009e44: f503 6381 add.w r3, r3, #1032 @ 0x408
8009e48: 62fb str r3, [r7, #44] @ 0x2c
8009e4a: 683b ldr r3, [r7, #0]
8009e4c: 88db ldrh r3, [r3, #6]
8009e4e: 085b lsrs r3, r3, #1
8009e50: b29b uxth r3, r3
8009e52: 005b lsls r3, r3, #1
8009e54: b29a uxth r2, r3
8009e56: 6afb ldr r3, [r7, #44] @ 0x2c
8009e58: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
8009e5a: 687b ldr r3, [r7, #4]
8009e5c: 62bb str r3, [r7, #40] @ 0x28
8009e5e: 687b ldr r3, [r7, #4]
8009e60: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009e64: b29b uxth r3, r3
8009e66: 461a mov r2, r3
8009e68: 6abb ldr r3, [r7, #40] @ 0x28
8009e6a: 4413 add r3, r2
8009e6c: 62bb str r3, [r7, #40] @ 0x28
8009e6e: 683b ldr r3, [r7, #0]
8009e70: 781b ldrb r3, [r3, #0]
8009e72: 011a lsls r2, r3, #4
8009e74: 6abb ldr r3, [r7, #40] @ 0x28
8009e76: 4413 add r3, r2
8009e78: f203 430c addw r3, r3, #1036 @ 0x40c
8009e7c: 627b str r3, [r7, #36] @ 0x24
8009e7e: 6a7b ldr r3, [r7, #36] @ 0x24
8009e80: 881b ldrh r3, [r3, #0]
8009e82: b29b uxth r3, r3
8009e84: f3c3 0309 ubfx r3, r3, #0, #10
8009e88: b29a uxth r2, r3
8009e8a: 6a7b ldr r3, [r7, #36] @ 0x24
8009e8c: 801a strh r2, [r3, #0]
8009e8e: 683b ldr r3, [r7, #0]
8009e90: 691b ldr r3, [r3, #16]
8009e92: 2b3e cmp r3, #62 @ 0x3e
8009e94: d91d bls.n 8009ed2 <USB_ActivateEndpoint+0x2aa>
8009e96: 683b ldr r3, [r7, #0]
8009e98: 691b ldr r3, [r3, #16]
8009e9a: 095b lsrs r3, r3, #5
8009e9c: 66bb str r3, [r7, #104] @ 0x68
8009e9e: 683b ldr r3, [r7, #0]
8009ea0: 691b ldr r3, [r3, #16]
8009ea2: f003 031f and.w r3, r3, #31
8009ea6: 2b00 cmp r3, #0
8009ea8: d102 bne.n 8009eb0 <USB_ActivateEndpoint+0x288>
8009eaa: 6ebb ldr r3, [r7, #104] @ 0x68
8009eac: 3b01 subs r3, #1
8009eae: 66bb str r3, [r7, #104] @ 0x68
8009eb0: 6a7b ldr r3, [r7, #36] @ 0x24
8009eb2: 881b ldrh r3, [r3, #0]
8009eb4: b29a uxth r2, r3
8009eb6: 6ebb ldr r3, [r7, #104] @ 0x68
8009eb8: b29b uxth r3, r3
8009eba: 029b lsls r3, r3, #10
8009ebc: b29b uxth r3, r3
8009ebe: 4313 orrs r3, r2
8009ec0: b29b uxth r3, r3
8009ec2: ea6f 4343 mvn.w r3, r3, lsl #17
8009ec6: ea6f 4353 mvn.w r3, r3, lsr #17
8009eca: b29a uxth r2, r3
8009ecc: 6a7b ldr r3, [r7, #36] @ 0x24
8009ece: 801a strh r2, [r3, #0]
8009ed0: e026 b.n 8009f20 <USB_ActivateEndpoint+0x2f8>
8009ed2: 683b ldr r3, [r7, #0]
8009ed4: 691b ldr r3, [r3, #16]
8009ed6: 2b00 cmp r3, #0
8009ed8: d10a bne.n 8009ef0 <USB_ActivateEndpoint+0x2c8>
8009eda: 6a7b ldr r3, [r7, #36] @ 0x24
8009edc: 881b ldrh r3, [r3, #0]
8009ede: b29b uxth r3, r3
8009ee0: ea6f 4343 mvn.w r3, r3, lsl #17
8009ee4: ea6f 4353 mvn.w r3, r3, lsr #17
8009ee8: b29a uxth r2, r3
8009eea: 6a7b ldr r3, [r7, #36] @ 0x24
8009eec: 801a strh r2, [r3, #0]
8009eee: e017 b.n 8009f20 <USB_ActivateEndpoint+0x2f8>
8009ef0: 683b ldr r3, [r7, #0]
8009ef2: 691b ldr r3, [r3, #16]
8009ef4: 085b lsrs r3, r3, #1
8009ef6: 66bb str r3, [r7, #104] @ 0x68
8009ef8: 683b ldr r3, [r7, #0]
8009efa: 691b ldr r3, [r3, #16]
8009efc: f003 0301 and.w r3, r3, #1
8009f00: 2b00 cmp r3, #0
8009f02: d002 beq.n 8009f0a <USB_ActivateEndpoint+0x2e2>
8009f04: 6ebb ldr r3, [r7, #104] @ 0x68
8009f06: 3301 adds r3, #1
8009f08: 66bb str r3, [r7, #104] @ 0x68
8009f0a: 6a7b ldr r3, [r7, #36] @ 0x24
8009f0c: 881b ldrh r3, [r3, #0]
8009f0e: b29a uxth r2, r3
8009f10: 6ebb ldr r3, [r7, #104] @ 0x68
8009f12: b29b uxth r3, r3
8009f14: 029b lsls r3, r3, #10
8009f16: b29b uxth r3, r3
8009f18: 4313 orrs r3, r2
8009f1a: b29a uxth r2, r3
8009f1c: 6a7b ldr r3, [r7, #36] @ 0x24
8009f1e: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009f20: 687a ldr r2, [r7, #4]
8009f22: 683b ldr r3, [r7, #0]
8009f24: 781b ldrb r3, [r3, #0]
8009f26: 009b lsls r3, r3, #2
8009f28: 4413 add r3, r2
8009f2a: 881b ldrh r3, [r3, #0]
8009f2c: 847b strh r3, [r7, #34] @ 0x22
8009f2e: 8c7b ldrh r3, [r7, #34] @ 0x22
8009f30: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009f34: 2b00 cmp r3, #0
8009f36: d01b beq.n 8009f70 <USB_ActivateEndpoint+0x348>
8009f38: 687a ldr r2, [r7, #4]
8009f3a: 683b ldr r3, [r7, #0]
8009f3c: 781b ldrb r3, [r3, #0]
8009f3e: 009b lsls r3, r3, #2
8009f40: 4413 add r3, r2
8009f42: 881b ldrh r3, [r3, #0]
8009f44: b29b uxth r3, r3
8009f46: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009f4a: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f4e: 843b strh r3, [r7, #32]
8009f50: 687a ldr r2, [r7, #4]
8009f52: 683b ldr r3, [r7, #0]
8009f54: 781b ldrb r3, [r3, #0]
8009f56: 009b lsls r3, r3, #2
8009f58: 441a add r2, r3
8009f5a: 8c3b ldrh r3, [r7, #32]
8009f5c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009f60: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009f64: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009f68: f043 0380 orr.w r3, r3, #128 @ 0x80
8009f6c: b29b uxth r3, r3
8009f6e: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
8009f70: 683b ldr r3, [r7, #0]
8009f72: 781b ldrb r3, [r3, #0]
8009f74: 2b00 cmp r3, #0
8009f76: d124 bne.n 8009fc2 <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8009f78: 687a ldr r2, [r7, #4]
8009f7a: 683b ldr r3, [r7, #0]
8009f7c: 781b ldrb r3, [r3, #0]
8009f7e: 009b lsls r3, r3, #2
8009f80: 4413 add r3, r2
8009f82: 881b ldrh r3, [r3, #0]
8009f84: b29b uxth r3, r3
8009f86: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009f8a: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f8e: 83bb strh r3, [r7, #28]
8009f90: 8bbb ldrh r3, [r7, #28]
8009f92: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8009f96: 83bb strh r3, [r7, #28]
8009f98: 8bbb ldrh r3, [r7, #28]
8009f9a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8009f9e: 83bb strh r3, [r7, #28]
8009fa0: 687a ldr r2, [r7, #4]
8009fa2: 683b ldr r3, [r7, #0]
8009fa4: 781b ldrb r3, [r3, #0]
8009fa6: 009b lsls r3, r3, #2
8009fa8: 441a add r2, r3
8009faa: 8bbb ldrh r3, [r7, #28]
8009fac: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009fb0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009fb4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009fb8: f043 0380 orr.w r3, r3, #128 @ 0x80
8009fbc: b29b uxth r3, r3
8009fbe: 8013 strh r3, [r2, #0]
8009fc0: e1ea b.n 800a398 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
8009fc2: 687a ldr r2, [r7, #4]
8009fc4: 683b ldr r3, [r7, #0]
8009fc6: 781b ldrb r3, [r3, #0]
8009fc8: 009b lsls r3, r3, #2
8009fca: 4413 add r3, r2
8009fcc: 881b ldrh r3, [r3, #0]
8009fce: b29b uxth r3, r3
8009fd0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009fd4: f023 0370 bic.w r3, r3, #112 @ 0x70
8009fd8: 83fb strh r3, [r7, #30]
8009fda: 8bfb ldrh r3, [r7, #30]
8009fdc: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8009fe0: 83fb strh r3, [r7, #30]
8009fe2: 687a ldr r2, [r7, #4]
8009fe4: 683b ldr r3, [r7, #0]
8009fe6: 781b ldrb r3, [r3, #0]
8009fe8: 009b lsls r3, r3, #2
8009fea: 441a add r2, r3
8009fec: 8bfb ldrh r3, [r7, #30]
8009fee: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009ff2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009ff6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009ffa: f043 0380 orr.w r3, r3, #128 @ 0x80
8009ffe: b29b uxth r3, r3
800a000: 8013 strh r3, [r2, #0]
800a002: e1c9 b.n 800a398 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
800a004: 683b ldr r3, [r7, #0]
800a006: 78db ldrb r3, [r3, #3]
800a008: 2b02 cmp r3, #2
800a00a: d11e bne.n 800a04a <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800a00c: 687a ldr r2, [r7, #4]
800a00e: 683b ldr r3, [r7, #0]
800a010: 781b ldrb r3, [r3, #0]
800a012: 009b lsls r3, r3, #2
800a014: 4413 add r3, r2
800a016: 881b ldrh r3, [r3, #0]
800a018: b29b uxth r3, r3
800a01a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a01e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a022: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800a026: 687a ldr r2, [r7, #4]
800a028: 683b ldr r3, [r7, #0]
800a02a: 781b ldrb r3, [r3, #0]
800a02c: 009b lsls r3, r3, #2
800a02e: 441a add r2, r3
800a030: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800a034: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a038: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a03c: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800a040: f043 0380 orr.w r3, r3, #128 @ 0x80
800a044: b29b uxth r3, r3
800a046: 8013 strh r3, [r2, #0]
800a048: e01d b.n 800a086 <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
800a04a: 687a ldr r2, [r7, #4]
800a04c: 683b ldr r3, [r7, #0]
800a04e: 781b ldrb r3, [r3, #0]
800a050: 009b lsls r3, r3, #2
800a052: 4413 add r3, r2
800a054: 881b ldrh r3, [r3, #0]
800a056: b29b uxth r3, r3
800a058: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800a05c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a060: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
800a064: 687a ldr r2, [r7, #4]
800a066: 683b ldr r3, [r7, #0]
800a068: 781b ldrb r3, [r3, #0]
800a06a: 009b lsls r3, r3, #2
800a06c: 441a add r2, r3
800a06e: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
800a072: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a076: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a07a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a07e: f043 0380 orr.w r3, r3, #128 @ 0x80
800a082: b29b uxth r3, r3
800a084: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
800a086: 687b ldr r3, [r7, #4]
800a088: 65fb str r3, [r7, #92] @ 0x5c
800a08a: 687b ldr r3, [r7, #4]
800a08c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a090: b29b uxth r3, r3
800a092: 461a mov r2, r3
800a094: 6dfb ldr r3, [r7, #92] @ 0x5c
800a096: 4413 add r3, r2
800a098: 65fb str r3, [r7, #92] @ 0x5c
800a09a: 683b ldr r3, [r7, #0]
800a09c: 781b ldrb r3, [r3, #0]
800a09e: 011a lsls r2, r3, #4
800a0a0: 6dfb ldr r3, [r7, #92] @ 0x5c
800a0a2: 4413 add r3, r2
800a0a4: f503 6380 add.w r3, r3, #1024 @ 0x400
800a0a8: 65bb str r3, [r7, #88] @ 0x58
800a0aa: 683b ldr r3, [r7, #0]
800a0ac: 891b ldrh r3, [r3, #8]
800a0ae: 085b lsrs r3, r3, #1
800a0b0: b29b uxth r3, r3
800a0b2: 005b lsls r3, r3, #1
800a0b4: b29a uxth r2, r3
800a0b6: 6dbb ldr r3, [r7, #88] @ 0x58
800a0b8: 801a strh r2, [r3, #0]
800a0ba: 687b ldr r3, [r7, #4]
800a0bc: 657b str r3, [r7, #84] @ 0x54
800a0be: 687b ldr r3, [r7, #4]
800a0c0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a0c4: b29b uxth r3, r3
800a0c6: 461a mov r2, r3
800a0c8: 6d7b ldr r3, [r7, #84] @ 0x54
800a0ca: 4413 add r3, r2
800a0cc: 657b str r3, [r7, #84] @ 0x54
800a0ce: 683b ldr r3, [r7, #0]
800a0d0: 781b ldrb r3, [r3, #0]
800a0d2: 011a lsls r2, r3, #4
800a0d4: 6d7b ldr r3, [r7, #84] @ 0x54
800a0d6: 4413 add r3, r2
800a0d8: f503 6381 add.w r3, r3, #1032 @ 0x408
800a0dc: 653b str r3, [r7, #80] @ 0x50
800a0de: 683b ldr r3, [r7, #0]
800a0e0: 895b ldrh r3, [r3, #10]
800a0e2: 085b lsrs r3, r3, #1
800a0e4: b29b uxth r3, r3
800a0e6: 005b lsls r3, r3, #1
800a0e8: b29a uxth r2, r3
800a0ea: 6d3b ldr r3, [r7, #80] @ 0x50
800a0ec: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
800a0ee: 683b ldr r3, [r7, #0]
800a0f0: 785b ldrb r3, [r3, #1]
800a0f2: 2b00 cmp r3, #0
800a0f4: f040 8093 bne.w 800a21e <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a0f8: 687a ldr r2, [r7, #4]
800a0fa: 683b ldr r3, [r7, #0]
800a0fc: 781b ldrb r3, [r3, #0]
800a0fe: 009b lsls r3, r3, #2
800a100: 4413 add r3, r2
800a102: 881b ldrh r3, [r3, #0]
800a104: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
800a108: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
800a10c: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a110: 2b00 cmp r3, #0
800a112: d01b beq.n 800a14c <USB_ActivateEndpoint+0x524>
800a114: 687a ldr r2, [r7, #4]
800a116: 683b ldr r3, [r7, #0]
800a118: 781b ldrb r3, [r3, #0]
800a11a: 009b lsls r3, r3, #2
800a11c: 4413 add r3, r2
800a11e: 881b ldrh r3, [r3, #0]
800a120: b29b uxth r3, r3
800a122: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a126: f023 0370 bic.w r3, r3, #112 @ 0x70
800a12a: 87fb strh r3, [r7, #62] @ 0x3e
800a12c: 687a ldr r2, [r7, #4]
800a12e: 683b ldr r3, [r7, #0]
800a130: 781b ldrb r3, [r3, #0]
800a132: 009b lsls r3, r3, #2
800a134: 441a add r2, r3
800a136: 8ffb ldrh r3, [r7, #62] @ 0x3e
800a138: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a13c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a140: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a144: f043 0380 orr.w r3, r3, #128 @ 0x80
800a148: b29b uxth r3, r3
800a14a: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a14c: 687a ldr r2, [r7, #4]
800a14e: 683b ldr r3, [r7, #0]
800a150: 781b ldrb r3, [r3, #0]
800a152: 009b lsls r3, r3, #2
800a154: 4413 add r3, r2
800a156: 881b ldrh r3, [r3, #0]
800a158: 87bb strh r3, [r7, #60] @ 0x3c
800a15a: 8fbb ldrh r3, [r7, #60] @ 0x3c
800a15c: f003 0340 and.w r3, r3, #64 @ 0x40
800a160: 2b00 cmp r3, #0
800a162: d01b beq.n 800a19c <USB_ActivateEndpoint+0x574>
800a164: 687a ldr r2, [r7, #4]
800a166: 683b ldr r3, [r7, #0]
800a168: 781b ldrb r3, [r3, #0]
800a16a: 009b lsls r3, r3, #2
800a16c: 4413 add r3, r2
800a16e: 881b ldrh r3, [r3, #0]
800a170: b29b uxth r3, r3
800a172: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a176: f023 0370 bic.w r3, r3, #112 @ 0x70
800a17a: 877b strh r3, [r7, #58] @ 0x3a
800a17c: 687a ldr r2, [r7, #4]
800a17e: 683b ldr r3, [r7, #0]
800a180: 781b ldrb r3, [r3, #0]
800a182: 009b lsls r3, r3, #2
800a184: 441a add r2, r3
800a186: 8f7b ldrh r3, [r7, #58] @ 0x3a
800a188: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a18c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a190: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a194: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a198: b29b uxth r3, r3
800a19a: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800a19c: 687a ldr r2, [r7, #4]
800a19e: 683b ldr r3, [r7, #0]
800a1a0: 781b ldrb r3, [r3, #0]
800a1a2: 009b lsls r3, r3, #2
800a1a4: 4413 add r3, r2
800a1a6: 881b ldrh r3, [r3, #0]
800a1a8: b29b uxth r3, r3
800a1aa: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a1ae: f023 0370 bic.w r3, r3, #112 @ 0x70
800a1b2: 873b strh r3, [r7, #56] @ 0x38
800a1b4: 8f3b ldrh r3, [r7, #56] @ 0x38
800a1b6: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800a1ba: 873b strh r3, [r7, #56] @ 0x38
800a1bc: 8f3b ldrh r3, [r7, #56] @ 0x38
800a1be: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a1c2: 873b strh r3, [r7, #56] @ 0x38
800a1c4: 687a ldr r2, [r7, #4]
800a1c6: 683b ldr r3, [r7, #0]
800a1c8: 781b ldrb r3, [r3, #0]
800a1ca: 009b lsls r3, r3, #2
800a1cc: 441a add r2, r3
800a1ce: 8f3b ldrh r3, [r7, #56] @ 0x38
800a1d0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a1d4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a1d8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a1dc: f043 0380 orr.w r3, r3, #128 @ 0x80
800a1e0: b29b uxth r3, r3
800a1e2: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a1e4: 687a ldr r2, [r7, #4]
800a1e6: 683b ldr r3, [r7, #0]
800a1e8: 781b ldrb r3, [r3, #0]
800a1ea: 009b lsls r3, r3, #2
800a1ec: 4413 add r3, r2
800a1ee: 881b ldrh r3, [r3, #0]
800a1f0: b29b uxth r3, r3
800a1f2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a1f6: f023 0340 bic.w r3, r3, #64 @ 0x40
800a1fa: 86fb strh r3, [r7, #54] @ 0x36
800a1fc: 687a ldr r2, [r7, #4]
800a1fe: 683b ldr r3, [r7, #0]
800a200: 781b ldrb r3, [r3, #0]
800a202: 009b lsls r3, r3, #2
800a204: 441a add r2, r3
800a206: 8efb ldrh r3, [r7, #54] @ 0x36
800a208: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a20c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a210: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a214: f043 0380 orr.w r3, r3, #128 @ 0x80
800a218: b29b uxth r3, r3
800a21a: 8013 strh r3, [r2, #0]
800a21c: e0bc b.n 800a398 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a21e: 687a ldr r2, [r7, #4]
800a220: 683b ldr r3, [r7, #0]
800a222: 781b ldrb r3, [r3, #0]
800a224: 009b lsls r3, r3, #2
800a226: 4413 add r3, r2
800a228: 881b ldrh r3, [r3, #0]
800a22a: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
800a22e: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800a232: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a236: 2b00 cmp r3, #0
800a238: d01d beq.n 800a276 <USB_ActivateEndpoint+0x64e>
800a23a: 687a ldr r2, [r7, #4]
800a23c: 683b ldr r3, [r7, #0]
800a23e: 781b ldrb r3, [r3, #0]
800a240: 009b lsls r3, r3, #2
800a242: 4413 add r3, r2
800a244: 881b ldrh r3, [r3, #0]
800a246: b29b uxth r3, r3
800a248: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a24c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a250: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
800a254: 687a ldr r2, [r7, #4]
800a256: 683b ldr r3, [r7, #0]
800a258: 781b ldrb r3, [r3, #0]
800a25a: 009b lsls r3, r3, #2
800a25c: 441a add r2, r3
800a25e: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
800a262: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a266: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a26a: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a26e: f043 0380 orr.w r3, r3, #128 @ 0x80
800a272: b29b uxth r3, r3
800a274: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a276: 687a ldr r2, [r7, #4]
800a278: 683b ldr r3, [r7, #0]
800a27a: 781b ldrb r3, [r3, #0]
800a27c: 009b lsls r3, r3, #2
800a27e: 4413 add r3, r2
800a280: 881b ldrh r3, [r3, #0]
800a282: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
800a286: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800a28a: f003 0340 and.w r3, r3, #64 @ 0x40
800a28e: 2b00 cmp r3, #0
800a290: d01d beq.n 800a2ce <USB_ActivateEndpoint+0x6a6>
800a292: 687a ldr r2, [r7, #4]
800a294: 683b ldr r3, [r7, #0]
800a296: 781b ldrb r3, [r3, #0]
800a298: 009b lsls r3, r3, #2
800a29a: 4413 add r3, r2
800a29c: 881b ldrh r3, [r3, #0]
800a29e: b29b uxth r3, r3
800a2a0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a2a4: f023 0370 bic.w r3, r3, #112 @ 0x70
800a2a8: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
800a2ac: 687a ldr r2, [r7, #4]
800a2ae: 683b ldr r3, [r7, #0]
800a2b0: 781b ldrb r3, [r3, #0]
800a2b2: 009b lsls r3, r3, #2
800a2b4: 441a add r2, r3
800a2b6: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
800a2ba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a2be: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a2c2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a2c6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a2ca: b29b uxth r3, r3
800a2cc: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800a2ce: 683b ldr r3, [r7, #0]
800a2d0: 78db ldrb r3, [r3, #3]
800a2d2: 2b01 cmp r3, #1
800a2d4: d024 beq.n 800a320 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800a2d6: 687a ldr r2, [r7, #4]
800a2d8: 683b ldr r3, [r7, #0]
800a2da: 781b ldrb r3, [r3, #0]
800a2dc: 009b lsls r3, r3, #2
800a2de: 4413 add r3, r2
800a2e0: 881b ldrh r3, [r3, #0]
800a2e2: b29b uxth r3, r3
800a2e4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a2e8: f023 0340 bic.w r3, r3, #64 @ 0x40
800a2ec: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800a2f0: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800a2f4: f083 0320 eor.w r3, r3, #32
800a2f8: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800a2fc: 687a ldr r2, [r7, #4]
800a2fe: 683b ldr r3, [r7, #0]
800a300: 781b ldrb r3, [r3, #0]
800a302: 009b lsls r3, r3, #2
800a304: 441a add r2, r3
800a306: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800a30a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a30e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a312: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a316: f043 0380 orr.w r3, r3, #128 @ 0x80
800a31a: b29b uxth r3, r3
800a31c: 8013 strh r3, [r2, #0]
800a31e: e01d b.n 800a35c <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a320: 687a ldr r2, [r7, #4]
800a322: 683b ldr r3, [r7, #0]
800a324: 781b ldrb r3, [r3, #0]
800a326: 009b lsls r3, r3, #2
800a328: 4413 add r3, r2
800a32a: 881b ldrh r3, [r3, #0]
800a32c: b29b uxth r3, r3
800a32e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a332: f023 0340 bic.w r3, r3, #64 @ 0x40
800a336: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
800a33a: 687a ldr r2, [r7, #4]
800a33c: 683b ldr r3, [r7, #0]
800a33e: 781b ldrb r3, [r3, #0]
800a340: 009b lsls r3, r3, #2
800a342: 441a add r2, r3
800a344: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800a348: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a34c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a350: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a354: f043 0380 orr.w r3, r3, #128 @ 0x80
800a358: b29b uxth r3, r3
800a35a: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a35c: 687a ldr r2, [r7, #4]
800a35e: 683b ldr r3, [r7, #0]
800a360: 781b ldrb r3, [r3, #0]
800a362: 009b lsls r3, r3, #2
800a364: 4413 add r3, r2
800a366: 881b ldrh r3, [r3, #0]
800a368: b29b uxth r3, r3
800a36a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a36e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a372: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
800a376: 687a ldr r2, [r7, #4]
800a378: 683b ldr r3, [r7, #0]
800a37a: 781b ldrb r3, [r3, #0]
800a37c: 009b lsls r3, r3, #2
800a37e: 441a add r2, r3
800a380: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
800a384: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a388: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a38c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a390: f043 0380 orr.w r3, r3, #128 @ 0x80
800a394: b29b uxth r3, r3
800a396: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
800a398: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
800a39c: 4618 mov r0, r3
800a39e: 3774 adds r7, #116 @ 0x74
800a3a0: 46bd mov sp, r7
800a3a2: bc80 pop {r7}
800a3a4: 4770 bx lr
800a3a6: bf00 nop
0800a3a8 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a3a8: b480 push {r7}
800a3aa: b08d sub sp, #52 @ 0x34
800a3ac: af00 add r7, sp, #0
800a3ae: 6078 str r0, [r7, #4]
800a3b0: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800a3b2: 683b ldr r3, [r7, #0]
800a3b4: 7b1b ldrb r3, [r3, #12]
800a3b6: 2b00 cmp r3, #0
800a3b8: f040 808e bne.w 800a4d8 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
800a3bc: 683b ldr r3, [r7, #0]
800a3be: 785b ldrb r3, [r3, #1]
800a3c0: 2b00 cmp r3, #0
800a3c2: d044 beq.n 800a44e <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a3c4: 687a ldr r2, [r7, #4]
800a3c6: 683b ldr r3, [r7, #0]
800a3c8: 781b ldrb r3, [r3, #0]
800a3ca: 009b lsls r3, r3, #2
800a3cc: 4413 add r3, r2
800a3ce: 881b ldrh r3, [r3, #0]
800a3d0: 81bb strh r3, [r7, #12]
800a3d2: 89bb ldrh r3, [r7, #12]
800a3d4: f003 0340 and.w r3, r3, #64 @ 0x40
800a3d8: 2b00 cmp r3, #0
800a3da: d01b beq.n 800a414 <USB_DeactivateEndpoint+0x6c>
800a3dc: 687a ldr r2, [r7, #4]
800a3de: 683b ldr r3, [r7, #0]
800a3e0: 781b ldrb r3, [r3, #0]
800a3e2: 009b lsls r3, r3, #2
800a3e4: 4413 add r3, r2
800a3e6: 881b ldrh r3, [r3, #0]
800a3e8: b29b uxth r3, r3
800a3ea: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a3ee: f023 0370 bic.w r3, r3, #112 @ 0x70
800a3f2: 817b strh r3, [r7, #10]
800a3f4: 687a ldr r2, [r7, #4]
800a3f6: 683b ldr r3, [r7, #0]
800a3f8: 781b ldrb r3, [r3, #0]
800a3fa: 009b lsls r3, r3, #2
800a3fc: 441a add r2, r3
800a3fe: 897b ldrh r3, [r7, #10]
800a400: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a404: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a408: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a40c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a410: b29b uxth r3, r3
800a412: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a414: 687a ldr r2, [r7, #4]
800a416: 683b ldr r3, [r7, #0]
800a418: 781b ldrb r3, [r3, #0]
800a41a: 009b lsls r3, r3, #2
800a41c: 4413 add r3, r2
800a41e: 881b ldrh r3, [r3, #0]
800a420: b29b uxth r3, r3
800a422: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a426: f023 0340 bic.w r3, r3, #64 @ 0x40
800a42a: 813b strh r3, [r7, #8]
800a42c: 687a ldr r2, [r7, #4]
800a42e: 683b ldr r3, [r7, #0]
800a430: 781b ldrb r3, [r3, #0]
800a432: 009b lsls r3, r3, #2
800a434: 441a add r2, r3
800a436: 893b ldrh r3, [r7, #8]
800a438: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a43c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a440: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a444: f043 0380 orr.w r3, r3, #128 @ 0x80
800a448: b29b uxth r3, r3
800a44a: 8013 strh r3, [r2, #0]
800a44c: e192 b.n 800a774 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a44e: 687a ldr r2, [r7, #4]
800a450: 683b ldr r3, [r7, #0]
800a452: 781b ldrb r3, [r3, #0]
800a454: 009b lsls r3, r3, #2
800a456: 4413 add r3, r2
800a458: 881b ldrh r3, [r3, #0]
800a45a: 827b strh r3, [r7, #18]
800a45c: 8a7b ldrh r3, [r7, #18]
800a45e: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a462: 2b00 cmp r3, #0
800a464: d01b beq.n 800a49e <USB_DeactivateEndpoint+0xf6>
800a466: 687a ldr r2, [r7, #4]
800a468: 683b ldr r3, [r7, #0]
800a46a: 781b ldrb r3, [r3, #0]
800a46c: 009b lsls r3, r3, #2
800a46e: 4413 add r3, r2
800a470: 881b ldrh r3, [r3, #0]
800a472: b29b uxth r3, r3
800a474: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a478: f023 0370 bic.w r3, r3, #112 @ 0x70
800a47c: 823b strh r3, [r7, #16]
800a47e: 687a ldr r2, [r7, #4]
800a480: 683b ldr r3, [r7, #0]
800a482: 781b ldrb r3, [r3, #0]
800a484: 009b lsls r3, r3, #2
800a486: 441a add r2, r3
800a488: 8a3b ldrh r3, [r7, #16]
800a48a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a48e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a492: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a496: f043 0380 orr.w r3, r3, #128 @ 0x80
800a49a: b29b uxth r3, r3
800a49c: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a49e: 687a ldr r2, [r7, #4]
800a4a0: 683b ldr r3, [r7, #0]
800a4a2: 781b ldrb r3, [r3, #0]
800a4a4: 009b lsls r3, r3, #2
800a4a6: 4413 add r3, r2
800a4a8: 881b ldrh r3, [r3, #0]
800a4aa: b29b uxth r3, r3
800a4ac: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a4b0: f023 0370 bic.w r3, r3, #112 @ 0x70
800a4b4: 81fb strh r3, [r7, #14]
800a4b6: 687a ldr r2, [r7, #4]
800a4b8: 683b ldr r3, [r7, #0]
800a4ba: 781b ldrb r3, [r3, #0]
800a4bc: 009b lsls r3, r3, #2
800a4be: 441a add r2, r3
800a4c0: 89fb ldrh r3, [r7, #14]
800a4c2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a4c6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a4ca: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a4ce: f043 0380 orr.w r3, r3, #128 @ 0x80
800a4d2: b29b uxth r3, r3
800a4d4: 8013 strh r3, [r2, #0]
800a4d6: e14d b.n 800a774 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
800a4d8: 683b ldr r3, [r7, #0]
800a4da: 785b ldrb r3, [r3, #1]
800a4dc: 2b00 cmp r3, #0
800a4de: f040 80a5 bne.w 800a62c <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a4e2: 687a ldr r2, [r7, #4]
800a4e4: 683b ldr r3, [r7, #0]
800a4e6: 781b ldrb r3, [r3, #0]
800a4e8: 009b lsls r3, r3, #2
800a4ea: 4413 add r3, r2
800a4ec: 881b ldrh r3, [r3, #0]
800a4ee: 843b strh r3, [r7, #32]
800a4f0: 8c3b ldrh r3, [r7, #32]
800a4f2: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a4f6: 2b00 cmp r3, #0
800a4f8: d01b beq.n 800a532 <USB_DeactivateEndpoint+0x18a>
800a4fa: 687a ldr r2, [r7, #4]
800a4fc: 683b ldr r3, [r7, #0]
800a4fe: 781b ldrb r3, [r3, #0]
800a500: 009b lsls r3, r3, #2
800a502: 4413 add r3, r2
800a504: 881b ldrh r3, [r3, #0]
800a506: b29b uxth r3, r3
800a508: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a50c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a510: 83fb strh r3, [r7, #30]
800a512: 687a ldr r2, [r7, #4]
800a514: 683b ldr r3, [r7, #0]
800a516: 781b ldrb r3, [r3, #0]
800a518: 009b lsls r3, r3, #2
800a51a: 441a add r2, r3
800a51c: 8bfb ldrh r3, [r7, #30]
800a51e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a522: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a526: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a52a: f043 0380 orr.w r3, r3, #128 @ 0x80
800a52e: b29b uxth r3, r3
800a530: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a532: 687a ldr r2, [r7, #4]
800a534: 683b ldr r3, [r7, #0]
800a536: 781b ldrb r3, [r3, #0]
800a538: 009b lsls r3, r3, #2
800a53a: 4413 add r3, r2
800a53c: 881b ldrh r3, [r3, #0]
800a53e: 83bb strh r3, [r7, #28]
800a540: 8bbb ldrh r3, [r7, #28]
800a542: f003 0340 and.w r3, r3, #64 @ 0x40
800a546: 2b00 cmp r3, #0
800a548: d01b beq.n 800a582 <USB_DeactivateEndpoint+0x1da>
800a54a: 687a ldr r2, [r7, #4]
800a54c: 683b ldr r3, [r7, #0]
800a54e: 781b ldrb r3, [r3, #0]
800a550: 009b lsls r3, r3, #2
800a552: 4413 add r3, r2
800a554: 881b ldrh r3, [r3, #0]
800a556: b29b uxth r3, r3
800a558: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a55c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a560: 837b strh r3, [r7, #26]
800a562: 687a ldr r2, [r7, #4]
800a564: 683b ldr r3, [r7, #0]
800a566: 781b ldrb r3, [r3, #0]
800a568: 009b lsls r3, r3, #2
800a56a: 441a add r2, r3
800a56c: 8b7b ldrh r3, [r7, #26]
800a56e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a572: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a576: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a57a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a57e: b29b uxth r3, r3
800a580: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
800a582: 687a ldr r2, [r7, #4]
800a584: 683b ldr r3, [r7, #0]
800a586: 781b ldrb r3, [r3, #0]
800a588: 009b lsls r3, r3, #2
800a58a: 4413 add r3, r2
800a58c: 881b ldrh r3, [r3, #0]
800a58e: b29b uxth r3, r3
800a590: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a594: f023 0370 bic.w r3, r3, #112 @ 0x70
800a598: 833b strh r3, [r7, #24]
800a59a: 687a ldr r2, [r7, #4]
800a59c: 683b ldr r3, [r7, #0]
800a59e: 781b ldrb r3, [r3, #0]
800a5a0: 009b lsls r3, r3, #2
800a5a2: 441a add r2, r3
800a5a4: 8b3b ldrh r3, [r7, #24]
800a5a6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a5aa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a5ae: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a5b2: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a5b6: b29b uxth r3, r3
800a5b8: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a5ba: 687a ldr r2, [r7, #4]
800a5bc: 683b ldr r3, [r7, #0]
800a5be: 781b ldrb r3, [r3, #0]
800a5c0: 009b lsls r3, r3, #2
800a5c2: 4413 add r3, r2
800a5c4: 881b ldrh r3, [r3, #0]
800a5c6: b29b uxth r3, r3
800a5c8: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a5cc: f023 0370 bic.w r3, r3, #112 @ 0x70
800a5d0: 82fb strh r3, [r7, #22]
800a5d2: 687a ldr r2, [r7, #4]
800a5d4: 683b ldr r3, [r7, #0]
800a5d6: 781b ldrb r3, [r3, #0]
800a5d8: 009b lsls r3, r3, #2
800a5da: 441a add r2, r3
800a5dc: 8afb ldrh r3, [r7, #22]
800a5de: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a5e2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a5e6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a5ea: f043 0380 orr.w r3, r3, #128 @ 0x80
800a5ee: b29b uxth r3, r3
800a5f0: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a5f2: 687a ldr r2, [r7, #4]
800a5f4: 683b ldr r3, [r7, #0]
800a5f6: 781b ldrb r3, [r3, #0]
800a5f8: 009b lsls r3, r3, #2
800a5fa: 4413 add r3, r2
800a5fc: 881b ldrh r3, [r3, #0]
800a5fe: b29b uxth r3, r3
800a600: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a604: f023 0340 bic.w r3, r3, #64 @ 0x40
800a608: 82bb strh r3, [r7, #20]
800a60a: 687a ldr r2, [r7, #4]
800a60c: 683b ldr r3, [r7, #0]
800a60e: 781b ldrb r3, [r3, #0]
800a610: 009b lsls r3, r3, #2
800a612: 441a add r2, r3
800a614: 8abb ldrh r3, [r7, #20]
800a616: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a61a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a61e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a622: f043 0380 orr.w r3, r3, #128 @ 0x80
800a626: b29b uxth r3, r3
800a628: 8013 strh r3, [r2, #0]
800a62a: e0a3 b.n 800a774 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a62c: 687a ldr r2, [r7, #4]
800a62e: 683b ldr r3, [r7, #0]
800a630: 781b ldrb r3, [r3, #0]
800a632: 009b lsls r3, r3, #2
800a634: 4413 add r3, r2
800a636: 881b ldrh r3, [r3, #0]
800a638: 85fb strh r3, [r7, #46] @ 0x2e
800a63a: 8dfb ldrh r3, [r7, #46] @ 0x2e
800a63c: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a640: 2b00 cmp r3, #0
800a642: d01b beq.n 800a67c <USB_DeactivateEndpoint+0x2d4>
800a644: 687a ldr r2, [r7, #4]
800a646: 683b ldr r3, [r7, #0]
800a648: 781b ldrb r3, [r3, #0]
800a64a: 009b lsls r3, r3, #2
800a64c: 4413 add r3, r2
800a64e: 881b ldrh r3, [r3, #0]
800a650: b29b uxth r3, r3
800a652: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a656: f023 0370 bic.w r3, r3, #112 @ 0x70
800a65a: 85bb strh r3, [r7, #44] @ 0x2c
800a65c: 687a ldr r2, [r7, #4]
800a65e: 683b ldr r3, [r7, #0]
800a660: 781b ldrb r3, [r3, #0]
800a662: 009b lsls r3, r3, #2
800a664: 441a add r2, r3
800a666: 8dbb ldrh r3, [r7, #44] @ 0x2c
800a668: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a66c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a670: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a674: f043 0380 orr.w r3, r3, #128 @ 0x80
800a678: b29b uxth r3, r3
800a67a: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a67c: 687a ldr r2, [r7, #4]
800a67e: 683b ldr r3, [r7, #0]
800a680: 781b ldrb r3, [r3, #0]
800a682: 009b lsls r3, r3, #2
800a684: 4413 add r3, r2
800a686: 881b ldrh r3, [r3, #0]
800a688: 857b strh r3, [r7, #42] @ 0x2a
800a68a: 8d7b ldrh r3, [r7, #42] @ 0x2a
800a68c: f003 0340 and.w r3, r3, #64 @ 0x40
800a690: 2b00 cmp r3, #0
800a692: d01b beq.n 800a6cc <USB_DeactivateEndpoint+0x324>
800a694: 687a ldr r2, [r7, #4]
800a696: 683b ldr r3, [r7, #0]
800a698: 781b ldrb r3, [r3, #0]
800a69a: 009b lsls r3, r3, #2
800a69c: 4413 add r3, r2
800a69e: 881b ldrh r3, [r3, #0]
800a6a0: b29b uxth r3, r3
800a6a2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a6a6: f023 0370 bic.w r3, r3, #112 @ 0x70
800a6aa: 853b strh r3, [r7, #40] @ 0x28
800a6ac: 687a ldr r2, [r7, #4]
800a6ae: 683b ldr r3, [r7, #0]
800a6b0: 781b ldrb r3, [r3, #0]
800a6b2: 009b lsls r3, r3, #2
800a6b4: 441a add r2, r3
800a6b6: 8d3b ldrh r3, [r7, #40] @ 0x28
800a6b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a6bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a6c0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a6c4: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a6c8: b29b uxth r3, r3
800a6ca: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
800a6cc: 687a ldr r2, [r7, #4]
800a6ce: 683b ldr r3, [r7, #0]
800a6d0: 781b ldrb r3, [r3, #0]
800a6d2: 009b lsls r3, r3, #2
800a6d4: 4413 add r3, r2
800a6d6: 881b ldrh r3, [r3, #0]
800a6d8: b29b uxth r3, r3
800a6da: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a6de: f023 0370 bic.w r3, r3, #112 @ 0x70
800a6e2: 84fb strh r3, [r7, #38] @ 0x26
800a6e4: 687a ldr r2, [r7, #4]
800a6e6: 683b ldr r3, [r7, #0]
800a6e8: 781b ldrb r3, [r3, #0]
800a6ea: 009b lsls r3, r3, #2
800a6ec: 441a add r2, r3
800a6ee: 8cfb ldrh r3, [r7, #38] @ 0x26
800a6f0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a6f4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a6f8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a6fc: f043 0380 orr.w r3, r3, #128 @ 0x80
800a700: b29b uxth r3, r3
800a702: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a704: 687a ldr r2, [r7, #4]
800a706: 683b ldr r3, [r7, #0]
800a708: 781b ldrb r3, [r3, #0]
800a70a: 009b lsls r3, r3, #2
800a70c: 4413 add r3, r2
800a70e: 881b ldrh r3, [r3, #0]
800a710: b29b uxth r3, r3
800a712: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a716: f023 0340 bic.w r3, r3, #64 @ 0x40
800a71a: 84bb strh r3, [r7, #36] @ 0x24
800a71c: 687a ldr r2, [r7, #4]
800a71e: 683b ldr r3, [r7, #0]
800a720: 781b ldrb r3, [r3, #0]
800a722: 009b lsls r3, r3, #2
800a724: 441a add r2, r3
800a726: 8cbb ldrh r3, [r7, #36] @ 0x24
800a728: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a72c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a730: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a734: f043 0380 orr.w r3, r3, #128 @ 0x80
800a738: b29b uxth r3, r3
800a73a: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a73c: 687a ldr r2, [r7, #4]
800a73e: 683b ldr r3, [r7, #0]
800a740: 781b ldrb r3, [r3, #0]
800a742: 009b lsls r3, r3, #2
800a744: 4413 add r3, r2
800a746: 881b ldrh r3, [r3, #0]
800a748: b29b uxth r3, r3
800a74a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a74e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a752: 847b strh r3, [r7, #34] @ 0x22
800a754: 687a ldr r2, [r7, #4]
800a756: 683b ldr r3, [r7, #0]
800a758: 781b ldrb r3, [r3, #0]
800a75a: 009b lsls r3, r3, #2
800a75c: 441a add r2, r3
800a75e: 8c7b ldrh r3, [r7, #34] @ 0x22
800a760: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a764: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a768: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a76c: f043 0380 orr.w r3, r3, #128 @ 0x80
800a770: b29b uxth r3, r3
800a772: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
800a774: 2300 movs r3, #0
}
800a776: 4618 mov r0, r3
800a778: 3734 adds r7, #52 @ 0x34
800a77a: 46bd mov sp, r7
800a77c: bc80 pop {r7}
800a77e: 4770 bx lr
0800a780 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a780: b580 push {r7, lr}
800a782: b0c2 sub sp, #264 @ 0x108
800a784: af00 add r7, sp, #0
800a786: f507 7384 add.w r3, r7, #264 @ 0x108
800a78a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a78e: 6018 str r0, [r3, #0]
800a790: f507 7384 add.w r3, r7, #264 @ 0x108
800a794: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a798: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
800a79a: f507 7384 add.w r3, r7, #264 @ 0x108
800a79e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7a2: 681b ldr r3, [r3, #0]
800a7a4: 785b ldrb r3, [r3, #1]
800a7a6: 2b01 cmp r3, #1
800a7a8: f040 86b7 bne.w 800b51a <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
800a7ac: f507 7384 add.w r3, r7, #264 @ 0x108
800a7b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7b4: 681b ldr r3, [r3, #0]
800a7b6: 699a ldr r2, [r3, #24]
800a7b8: f507 7384 add.w r3, r7, #264 @ 0x108
800a7bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7c0: 681b ldr r3, [r3, #0]
800a7c2: 691b ldr r3, [r3, #16]
800a7c4: 429a cmp r2, r3
800a7c6: d908 bls.n 800a7da <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
800a7c8: f507 7384 add.w r3, r7, #264 @ 0x108
800a7cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7d0: 681b ldr r3, [r3, #0]
800a7d2: 691b ldr r3, [r3, #16]
800a7d4: f8c7 3104 str.w r3, [r7, #260] @ 0x104
800a7d8: e007 b.n 800a7ea <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
800a7da: f507 7384 add.w r3, r7, #264 @ 0x108
800a7de: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7e2: 681b ldr r3, [r3, #0]
800a7e4: 699b ldr r3, [r3, #24]
800a7e6: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
800a7ea: f507 7384 add.w r3, r7, #264 @ 0x108
800a7ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7f2: 681b ldr r3, [r3, #0]
800a7f4: 7b1b ldrb r3, [r3, #12]
800a7f6: 2b00 cmp r3, #0
800a7f8: d13a bne.n 800a870 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
800a7fa: f507 7384 add.w r3, r7, #264 @ 0x108
800a7fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a802: 681b ldr r3, [r3, #0]
800a804: 6959 ldr r1, [r3, #20]
800a806: f507 7384 add.w r3, r7, #264 @ 0x108
800a80a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a80e: 681b ldr r3, [r3, #0]
800a810: 88da ldrh r2, [r3, #6]
800a812: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a816: b29b uxth r3, r3
800a818: f507 7084 add.w r0, r7, #264 @ 0x108
800a81c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a820: 6800 ldr r0, [r0, #0]
800a822: f001 fc9c bl 800c15e <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800a826: f507 7384 add.w r3, r7, #264 @ 0x108
800a82a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a82e: 681b ldr r3, [r3, #0]
800a830: 613b str r3, [r7, #16]
800a832: f507 7384 add.w r3, r7, #264 @ 0x108
800a836: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a83a: 681b ldr r3, [r3, #0]
800a83c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a840: b29b uxth r3, r3
800a842: 461a mov r2, r3
800a844: 693b ldr r3, [r7, #16]
800a846: 4413 add r3, r2
800a848: 613b str r3, [r7, #16]
800a84a: f507 7384 add.w r3, r7, #264 @ 0x108
800a84e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a852: 681b ldr r3, [r3, #0]
800a854: 781b ldrb r3, [r3, #0]
800a856: 011a lsls r2, r3, #4
800a858: 693b ldr r3, [r7, #16]
800a85a: 4413 add r3, r2
800a85c: f203 4304 addw r3, r3, #1028 @ 0x404
800a860: 60fb str r3, [r7, #12]
800a862: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a866: b29a uxth r2, r3
800a868: 68fb ldr r3, [r7, #12]
800a86a: 801a strh r2, [r3, #0]
800a86c: f000 be1f b.w 800b4ae <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
800a870: f507 7384 add.w r3, r7, #264 @ 0x108
800a874: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a878: 681b ldr r3, [r3, #0]
800a87a: 78db ldrb r3, [r3, #3]
800a87c: 2b02 cmp r3, #2
800a87e: f040 8462 bne.w 800b146 <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
800a882: f507 7384 add.w r3, r7, #264 @ 0x108
800a886: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a88a: 681b ldr r3, [r3, #0]
800a88c: 6a1a ldr r2, [r3, #32]
800a88e: f507 7384 add.w r3, r7, #264 @ 0x108
800a892: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a896: 681b ldr r3, [r3, #0]
800a898: 691b ldr r3, [r3, #16]
800a89a: 429a cmp r2, r3
800a89c: f240 83df bls.w 800b05e <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800a8a0: f507 7384 add.w r3, r7, #264 @ 0x108
800a8a4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8a8: 681a ldr r2, [r3, #0]
800a8aa: f507 7384 add.w r3, r7, #264 @ 0x108
800a8ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8b2: 681b ldr r3, [r3, #0]
800a8b4: 781b ldrb r3, [r3, #0]
800a8b6: 009b lsls r3, r3, #2
800a8b8: 4413 add r3, r2
800a8ba: 881b ldrh r3, [r3, #0]
800a8bc: b29b uxth r3, r3
800a8be: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a8c2: f023 0370 bic.w r3, r3, #112 @ 0x70
800a8c6: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
800a8ca: f507 7384 add.w r3, r7, #264 @ 0x108
800a8ce: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8d2: 681a ldr r2, [r3, #0]
800a8d4: f507 7384 add.w r3, r7, #264 @ 0x108
800a8d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8dc: 681b ldr r3, [r3, #0]
800a8de: 781b ldrb r3, [r3, #0]
800a8e0: 009b lsls r3, r3, #2
800a8e2: 441a add r2, r3
800a8e4: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
800a8e8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a8ec: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a8f0: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800a8f4: f043 0380 orr.w r3, r3, #128 @ 0x80
800a8f8: b29b uxth r3, r3
800a8fa: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800a8fc: f507 7384 add.w r3, r7, #264 @ 0x108
800a900: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a904: 681b ldr r3, [r3, #0]
800a906: 6a1a ldr r2, [r3, #32]
800a908: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a90c: 1ad2 subs r2, r2, r3
800a90e: f507 7384 add.w r3, r7, #264 @ 0x108
800a912: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a916: 681b ldr r3, [r3, #0]
800a918: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800a91a: f507 7384 add.w r3, r7, #264 @ 0x108
800a91e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a922: 681a ldr r2, [r3, #0]
800a924: f507 7384 add.w r3, r7, #264 @ 0x108
800a928: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a92c: 681b ldr r3, [r3, #0]
800a92e: 781b ldrb r3, [r3, #0]
800a930: 009b lsls r3, r3, #2
800a932: 4413 add r3, r2
800a934: 881b ldrh r3, [r3, #0]
800a936: b29b uxth r3, r3
800a938: f003 0340 and.w r3, r3, #64 @ 0x40
800a93c: 2b00 cmp r3, #0
800a93e: f000 81c7 beq.w 800acd0 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800a942: f507 7384 add.w r3, r7, #264 @ 0x108
800a946: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a94a: 681b ldr r3, [r3, #0]
800a94c: 633b str r3, [r7, #48] @ 0x30
800a94e: f507 7384 add.w r3, r7, #264 @ 0x108
800a952: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a956: 681b ldr r3, [r3, #0]
800a958: 785b ldrb r3, [r3, #1]
800a95a: 2b00 cmp r3, #0
800a95c: d177 bne.n 800aa4e <USB_EPStartXfer+0x2ce>
800a95e: f507 7384 add.w r3, r7, #264 @ 0x108
800a962: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a966: 681b ldr r3, [r3, #0]
800a968: 62bb str r3, [r7, #40] @ 0x28
800a96a: f507 7384 add.w r3, r7, #264 @ 0x108
800a96e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a972: 681b ldr r3, [r3, #0]
800a974: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a978: b29b uxth r3, r3
800a97a: 461a mov r2, r3
800a97c: 6abb ldr r3, [r7, #40] @ 0x28
800a97e: 4413 add r3, r2
800a980: 62bb str r3, [r7, #40] @ 0x28
800a982: f507 7384 add.w r3, r7, #264 @ 0x108
800a986: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a98a: 681b ldr r3, [r3, #0]
800a98c: 781b ldrb r3, [r3, #0]
800a98e: 011a lsls r2, r3, #4
800a990: 6abb ldr r3, [r7, #40] @ 0x28
800a992: 4413 add r3, r2
800a994: f203 430c addw r3, r3, #1036 @ 0x40c
800a998: 627b str r3, [r7, #36] @ 0x24
800a99a: 6a7b ldr r3, [r7, #36] @ 0x24
800a99c: 881b ldrh r3, [r3, #0]
800a99e: b29b uxth r3, r3
800a9a0: f3c3 0309 ubfx r3, r3, #0, #10
800a9a4: b29a uxth r2, r3
800a9a6: 6a7b ldr r3, [r7, #36] @ 0x24
800a9a8: 801a strh r2, [r3, #0]
800a9aa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a9ae: 2b3e cmp r3, #62 @ 0x3e
800a9b0: d921 bls.n 800a9f6 <USB_EPStartXfer+0x276>
800a9b2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a9b6: 095b lsrs r3, r3, #5
800a9b8: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a9bc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a9c0: f003 031f and.w r3, r3, #31
800a9c4: 2b00 cmp r3, #0
800a9c6: d104 bne.n 800a9d2 <USB_EPStartXfer+0x252>
800a9c8: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a9cc: 3b01 subs r3, #1
800a9ce: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a9d2: 6a7b ldr r3, [r7, #36] @ 0x24
800a9d4: 881b ldrh r3, [r3, #0]
800a9d6: b29a uxth r2, r3
800a9d8: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a9dc: b29b uxth r3, r3
800a9de: 029b lsls r3, r3, #10
800a9e0: b29b uxth r3, r3
800a9e2: 4313 orrs r3, r2
800a9e4: b29b uxth r3, r3
800a9e6: ea6f 4343 mvn.w r3, r3, lsl #17
800a9ea: ea6f 4353 mvn.w r3, r3, lsr #17
800a9ee: b29a uxth r2, r3
800a9f0: 6a7b ldr r3, [r7, #36] @ 0x24
800a9f2: 801a strh r2, [r3, #0]
800a9f4: e050 b.n 800aa98 <USB_EPStartXfer+0x318>
800a9f6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a9fa: 2b00 cmp r3, #0
800a9fc: d10a bne.n 800aa14 <USB_EPStartXfer+0x294>
800a9fe: 6a7b ldr r3, [r7, #36] @ 0x24
800aa00: 881b ldrh r3, [r3, #0]
800aa02: b29b uxth r3, r3
800aa04: ea6f 4343 mvn.w r3, r3, lsl #17
800aa08: ea6f 4353 mvn.w r3, r3, lsr #17
800aa0c: b29a uxth r2, r3
800aa0e: 6a7b ldr r3, [r7, #36] @ 0x24
800aa10: 801a strh r2, [r3, #0]
800aa12: e041 b.n 800aa98 <USB_EPStartXfer+0x318>
800aa14: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa18: 085b lsrs r3, r3, #1
800aa1a: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800aa1e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa22: f003 0301 and.w r3, r3, #1
800aa26: 2b00 cmp r3, #0
800aa28: d004 beq.n 800aa34 <USB_EPStartXfer+0x2b4>
800aa2a: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800aa2e: 3301 adds r3, #1
800aa30: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800aa34: 6a7b ldr r3, [r7, #36] @ 0x24
800aa36: 881b ldrh r3, [r3, #0]
800aa38: b29a uxth r2, r3
800aa3a: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800aa3e: b29b uxth r3, r3
800aa40: 029b lsls r3, r3, #10
800aa42: b29b uxth r3, r3
800aa44: 4313 orrs r3, r2
800aa46: b29a uxth r2, r3
800aa48: 6a7b ldr r3, [r7, #36] @ 0x24
800aa4a: 801a strh r2, [r3, #0]
800aa4c: e024 b.n 800aa98 <USB_EPStartXfer+0x318>
800aa4e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa52: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa56: 681b ldr r3, [r3, #0]
800aa58: 785b ldrb r3, [r3, #1]
800aa5a: 2b01 cmp r3, #1
800aa5c: d11c bne.n 800aa98 <USB_EPStartXfer+0x318>
800aa5e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa62: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa66: 681b ldr r3, [r3, #0]
800aa68: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800aa6c: b29b uxth r3, r3
800aa6e: 461a mov r2, r3
800aa70: 6b3b ldr r3, [r7, #48] @ 0x30
800aa72: 4413 add r3, r2
800aa74: 633b str r3, [r7, #48] @ 0x30
800aa76: f507 7384 add.w r3, r7, #264 @ 0x108
800aa7a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa7e: 681b ldr r3, [r3, #0]
800aa80: 781b ldrb r3, [r3, #0]
800aa82: 011a lsls r2, r3, #4
800aa84: 6b3b ldr r3, [r7, #48] @ 0x30
800aa86: 4413 add r3, r2
800aa88: f203 430c addw r3, r3, #1036 @ 0x40c
800aa8c: 62fb str r3, [r7, #44] @ 0x2c
800aa8e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa92: b29a uxth r2, r3
800aa94: 6afb ldr r3, [r7, #44] @ 0x2c
800aa96: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800aa98: f507 7384 add.w r3, r7, #264 @ 0x108
800aa9c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aaa0: 681b ldr r3, [r3, #0]
800aaa2: 895b ldrh r3, [r3, #10]
800aaa4: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800aaa8: f507 7384 add.w r3, r7, #264 @ 0x108
800aaac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aab0: 681b ldr r3, [r3, #0]
800aab2: 6959 ldr r1, [r3, #20]
800aab4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aab8: b29b uxth r3, r3
800aaba: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800aabe: f507 7084 add.w r0, r7, #264 @ 0x108
800aac2: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800aac6: 6800 ldr r0, [r0, #0]
800aac8: f001 fb49 bl 800c15e <USB_WritePMA>
ep->xfer_buff += len;
800aacc: f507 7384 add.w r3, r7, #264 @ 0x108
800aad0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aad4: 681b ldr r3, [r3, #0]
800aad6: 695a ldr r2, [r3, #20]
800aad8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aadc: 441a add r2, r3
800aade: f507 7384 add.w r3, r7, #264 @ 0x108
800aae2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aae6: 681b ldr r3, [r3, #0]
800aae8: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800aaea: f507 7384 add.w r3, r7, #264 @ 0x108
800aaee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aaf2: 681b ldr r3, [r3, #0]
800aaf4: 6a1a ldr r2, [r3, #32]
800aaf6: f507 7384 add.w r3, r7, #264 @ 0x108
800aafa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aafe: 681b ldr r3, [r3, #0]
800ab00: 691b ldr r3, [r3, #16]
800ab02: 429a cmp r2, r3
800ab04: d90f bls.n 800ab26 <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
800ab06: f507 7384 add.w r3, r7, #264 @ 0x108
800ab0a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab0e: 681b ldr r3, [r3, #0]
800ab10: 6a1a ldr r2, [r3, #32]
800ab12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab16: 1ad2 subs r2, r2, r3
800ab18: f507 7384 add.w r3, r7, #264 @ 0x108
800ab1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab20: 681b ldr r3, [r3, #0]
800ab22: 621a str r2, [r3, #32]
800ab24: e00e b.n 800ab44 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
800ab26: f507 7384 add.w r3, r7, #264 @ 0x108
800ab2a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab2e: 681b ldr r3, [r3, #0]
800ab30: 6a1b ldr r3, [r3, #32]
800ab32: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800ab36: f507 7384 add.w r3, r7, #264 @ 0x108
800ab3a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab3e: 681b ldr r3, [r3, #0]
800ab40: 2200 movs r2, #0
800ab42: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800ab44: f507 7384 add.w r3, r7, #264 @ 0x108
800ab48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab4c: 681b ldr r3, [r3, #0]
800ab4e: 785b ldrb r3, [r3, #1]
800ab50: 2b00 cmp r3, #0
800ab52: d177 bne.n 800ac44 <USB_EPStartXfer+0x4c4>
800ab54: f507 7384 add.w r3, r7, #264 @ 0x108
800ab58: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab5c: 681b ldr r3, [r3, #0]
800ab5e: 61bb str r3, [r7, #24]
800ab60: f507 7384 add.w r3, r7, #264 @ 0x108
800ab64: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab68: 681b ldr r3, [r3, #0]
800ab6a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ab6e: b29b uxth r3, r3
800ab70: 461a mov r2, r3
800ab72: 69bb ldr r3, [r7, #24]
800ab74: 4413 add r3, r2
800ab76: 61bb str r3, [r7, #24]
800ab78: f507 7384 add.w r3, r7, #264 @ 0x108
800ab7c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab80: 681b ldr r3, [r3, #0]
800ab82: 781b ldrb r3, [r3, #0]
800ab84: 011a lsls r2, r3, #4
800ab86: 69bb ldr r3, [r7, #24]
800ab88: 4413 add r3, r2
800ab8a: f203 4304 addw r3, r3, #1028 @ 0x404
800ab8e: 617b str r3, [r7, #20]
800ab90: 697b ldr r3, [r7, #20]
800ab92: 881b ldrh r3, [r3, #0]
800ab94: b29b uxth r3, r3
800ab96: f3c3 0309 ubfx r3, r3, #0, #10
800ab9a: b29a uxth r2, r3
800ab9c: 697b ldr r3, [r7, #20]
800ab9e: 801a strh r2, [r3, #0]
800aba0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aba4: 2b3e cmp r3, #62 @ 0x3e
800aba6: d921 bls.n 800abec <USB_EPStartXfer+0x46c>
800aba8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abac: 095b lsrs r3, r3, #5
800abae: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800abb2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abb6: f003 031f and.w r3, r3, #31
800abba: 2b00 cmp r3, #0
800abbc: d104 bne.n 800abc8 <USB_EPStartXfer+0x448>
800abbe: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800abc2: 3b01 subs r3, #1
800abc4: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800abc8: 697b ldr r3, [r7, #20]
800abca: 881b ldrh r3, [r3, #0]
800abcc: b29a uxth r2, r3
800abce: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800abd2: b29b uxth r3, r3
800abd4: 029b lsls r3, r3, #10
800abd6: b29b uxth r3, r3
800abd8: 4313 orrs r3, r2
800abda: b29b uxth r3, r3
800abdc: ea6f 4343 mvn.w r3, r3, lsl #17
800abe0: ea6f 4353 mvn.w r3, r3, lsr #17
800abe4: b29a uxth r2, r3
800abe6: 697b ldr r3, [r7, #20]
800abe8: 801a strh r2, [r3, #0]
800abea: e056 b.n 800ac9a <USB_EPStartXfer+0x51a>
800abec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abf0: 2b00 cmp r3, #0
800abf2: d10a bne.n 800ac0a <USB_EPStartXfer+0x48a>
800abf4: 697b ldr r3, [r7, #20]
800abf6: 881b ldrh r3, [r3, #0]
800abf8: b29b uxth r3, r3
800abfa: ea6f 4343 mvn.w r3, r3, lsl #17
800abfe: ea6f 4353 mvn.w r3, r3, lsr #17
800ac02: b29a uxth r2, r3
800ac04: 697b ldr r3, [r7, #20]
800ac06: 801a strh r2, [r3, #0]
800ac08: e047 b.n 800ac9a <USB_EPStartXfer+0x51a>
800ac0a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac0e: 085b lsrs r3, r3, #1
800ac10: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ac14: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac18: f003 0301 and.w r3, r3, #1
800ac1c: 2b00 cmp r3, #0
800ac1e: d004 beq.n 800ac2a <USB_EPStartXfer+0x4aa>
800ac20: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ac24: 3301 adds r3, #1
800ac26: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ac2a: 697b ldr r3, [r7, #20]
800ac2c: 881b ldrh r3, [r3, #0]
800ac2e: b29a uxth r2, r3
800ac30: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ac34: b29b uxth r3, r3
800ac36: 029b lsls r3, r3, #10
800ac38: b29b uxth r3, r3
800ac3a: 4313 orrs r3, r2
800ac3c: b29a uxth r2, r3
800ac3e: 697b ldr r3, [r7, #20]
800ac40: 801a strh r2, [r3, #0]
800ac42: e02a b.n 800ac9a <USB_EPStartXfer+0x51a>
800ac44: f507 7384 add.w r3, r7, #264 @ 0x108
800ac48: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac4c: 681b ldr r3, [r3, #0]
800ac4e: 785b ldrb r3, [r3, #1]
800ac50: 2b01 cmp r3, #1
800ac52: d122 bne.n 800ac9a <USB_EPStartXfer+0x51a>
800ac54: f507 7384 add.w r3, r7, #264 @ 0x108
800ac58: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ac5c: 681b ldr r3, [r3, #0]
800ac5e: 623b str r3, [r7, #32]
800ac60: f507 7384 add.w r3, r7, #264 @ 0x108
800ac64: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ac68: 681b ldr r3, [r3, #0]
800ac6a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ac6e: b29b uxth r3, r3
800ac70: 461a mov r2, r3
800ac72: 6a3b ldr r3, [r7, #32]
800ac74: 4413 add r3, r2
800ac76: 623b str r3, [r7, #32]
800ac78: f507 7384 add.w r3, r7, #264 @ 0x108
800ac7c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac80: 681b ldr r3, [r3, #0]
800ac82: 781b ldrb r3, [r3, #0]
800ac84: 011a lsls r2, r3, #4
800ac86: 6a3b ldr r3, [r7, #32]
800ac88: 4413 add r3, r2
800ac8a: f203 4304 addw r3, r3, #1028 @ 0x404
800ac8e: 61fb str r3, [r7, #28]
800ac90: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac94: b29a uxth r2, r3
800ac96: 69fb ldr r3, [r7, #28]
800ac98: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800ac9a: f507 7384 add.w r3, r7, #264 @ 0x108
800ac9e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aca2: 681b ldr r3, [r3, #0]
800aca4: 891b ldrh r3, [r3, #8]
800aca6: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800acaa: f507 7384 add.w r3, r7, #264 @ 0x108
800acae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acb2: 681b ldr r3, [r3, #0]
800acb4: 6959 ldr r1, [r3, #20]
800acb6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800acba: b29b uxth r3, r3
800acbc: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800acc0: f507 7084 add.w r0, r7, #264 @ 0x108
800acc4: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800acc8: 6800 ldr r0, [r0, #0]
800acca: f001 fa48 bl 800c15e <USB_WritePMA>
800acce: e3ee b.n 800b4ae <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800acd0: f507 7384 add.w r3, r7, #264 @ 0x108
800acd4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acd8: 681b ldr r3, [r3, #0]
800acda: 785b ldrb r3, [r3, #1]
800acdc: 2b00 cmp r3, #0
800acde: d177 bne.n 800add0 <USB_EPStartXfer+0x650>
800ace0: f507 7384 add.w r3, r7, #264 @ 0x108
800ace4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ace8: 681b ldr r3, [r3, #0]
800acea: 64bb str r3, [r7, #72] @ 0x48
800acec: f507 7384 add.w r3, r7, #264 @ 0x108
800acf0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800acf4: 681b ldr r3, [r3, #0]
800acf6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800acfa: b29b uxth r3, r3
800acfc: 461a mov r2, r3
800acfe: 6cbb ldr r3, [r7, #72] @ 0x48
800ad00: 4413 add r3, r2
800ad02: 64bb str r3, [r7, #72] @ 0x48
800ad04: f507 7384 add.w r3, r7, #264 @ 0x108
800ad08: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad0c: 681b ldr r3, [r3, #0]
800ad0e: 781b ldrb r3, [r3, #0]
800ad10: 011a lsls r2, r3, #4
800ad12: 6cbb ldr r3, [r7, #72] @ 0x48
800ad14: 4413 add r3, r2
800ad16: f203 4304 addw r3, r3, #1028 @ 0x404
800ad1a: 647b str r3, [r7, #68] @ 0x44
800ad1c: 6c7b ldr r3, [r7, #68] @ 0x44
800ad1e: 881b ldrh r3, [r3, #0]
800ad20: b29b uxth r3, r3
800ad22: f3c3 0309 ubfx r3, r3, #0, #10
800ad26: b29a uxth r2, r3
800ad28: 6c7b ldr r3, [r7, #68] @ 0x44
800ad2a: 801a strh r2, [r3, #0]
800ad2c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad30: 2b3e cmp r3, #62 @ 0x3e
800ad32: d921 bls.n 800ad78 <USB_EPStartXfer+0x5f8>
800ad34: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad38: 095b lsrs r3, r3, #5
800ad3a: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ad3e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad42: f003 031f and.w r3, r3, #31
800ad46: 2b00 cmp r3, #0
800ad48: d104 bne.n 800ad54 <USB_EPStartXfer+0x5d4>
800ad4a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800ad4e: 3b01 subs r3, #1
800ad50: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ad54: 6c7b ldr r3, [r7, #68] @ 0x44
800ad56: 881b ldrh r3, [r3, #0]
800ad58: b29a uxth r2, r3
800ad5a: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800ad5e: b29b uxth r3, r3
800ad60: 029b lsls r3, r3, #10
800ad62: b29b uxth r3, r3
800ad64: 4313 orrs r3, r2
800ad66: b29b uxth r3, r3
800ad68: ea6f 4343 mvn.w r3, r3, lsl #17
800ad6c: ea6f 4353 mvn.w r3, r3, lsr #17
800ad70: b29a uxth r2, r3
800ad72: 6c7b ldr r3, [r7, #68] @ 0x44
800ad74: 801a strh r2, [r3, #0]
800ad76: e056 b.n 800ae26 <USB_EPStartXfer+0x6a6>
800ad78: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad7c: 2b00 cmp r3, #0
800ad7e: d10a bne.n 800ad96 <USB_EPStartXfer+0x616>
800ad80: 6c7b ldr r3, [r7, #68] @ 0x44
800ad82: 881b ldrh r3, [r3, #0]
800ad84: b29b uxth r3, r3
800ad86: ea6f 4343 mvn.w r3, r3, lsl #17
800ad8a: ea6f 4353 mvn.w r3, r3, lsr #17
800ad8e: b29a uxth r2, r3
800ad90: 6c7b ldr r3, [r7, #68] @ 0x44
800ad92: 801a strh r2, [r3, #0]
800ad94: e047 b.n 800ae26 <USB_EPStartXfer+0x6a6>
800ad96: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad9a: 085b lsrs r3, r3, #1
800ad9c: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ada0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ada4: f003 0301 and.w r3, r3, #1
800ada8: 2b00 cmp r3, #0
800adaa: d004 beq.n 800adb6 <USB_EPStartXfer+0x636>
800adac: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800adb0: 3301 adds r3, #1
800adb2: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800adb6: 6c7b ldr r3, [r7, #68] @ 0x44
800adb8: 881b ldrh r3, [r3, #0]
800adba: b29a uxth r2, r3
800adbc: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800adc0: b29b uxth r3, r3
800adc2: 029b lsls r3, r3, #10
800adc4: b29b uxth r3, r3
800adc6: 4313 orrs r3, r2
800adc8: b29a uxth r2, r3
800adca: 6c7b ldr r3, [r7, #68] @ 0x44
800adcc: 801a strh r2, [r3, #0]
800adce: e02a b.n 800ae26 <USB_EPStartXfer+0x6a6>
800add0: f507 7384 add.w r3, r7, #264 @ 0x108
800add4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800add8: 681b ldr r3, [r3, #0]
800adda: 785b ldrb r3, [r3, #1]
800addc: 2b01 cmp r3, #1
800adde: d122 bne.n 800ae26 <USB_EPStartXfer+0x6a6>
800ade0: f507 7384 add.w r3, r7, #264 @ 0x108
800ade4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ade8: 681b ldr r3, [r3, #0]
800adea: 653b str r3, [r7, #80] @ 0x50
800adec: f507 7384 add.w r3, r7, #264 @ 0x108
800adf0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800adf4: 681b ldr r3, [r3, #0]
800adf6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800adfa: b29b uxth r3, r3
800adfc: 461a mov r2, r3
800adfe: 6d3b ldr r3, [r7, #80] @ 0x50
800ae00: 4413 add r3, r2
800ae02: 653b str r3, [r7, #80] @ 0x50
800ae04: f507 7384 add.w r3, r7, #264 @ 0x108
800ae08: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae0c: 681b ldr r3, [r3, #0]
800ae0e: 781b ldrb r3, [r3, #0]
800ae10: 011a lsls r2, r3, #4
800ae12: 6d3b ldr r3, [r7, #80] @ 0x50
800ae14: 4413 add r3, r2
800ae16: f203 4304 addw r3, r3, #1028 @ 0x404
800ae1a: 64fb str r3, [r7, #76] @ 0x4c
800ae1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae20: b29a uxth r2, r3
800ae22: 6cfb ldr r3, [r7, #76] @ 0x4c
800ae24: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800ae26: f507 7384 add.w r3, r7, #264 @ 0x108
800ae2a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae2e: 681b ldr r3, [r3, #0]
800ae30: 891b ldrh r3, [r3, #8]
800ae32: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800ae36: f507 7384 add.w r3, r7, #264 @ 0x108
800ae3a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae3e: 681b ldr r3, [r3, #0]
800ae40: 6959 ldr r1, [r3, #20]
800ae42: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae46: b29b uxth r3, r3
800ae48: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800ae4c: f507 7084 add.w r0, r7, #264 @ 0x108
800ae50: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800ae54: 6800 ldr r0, [r0, #0]
800ae56: f001 f982 bl 800c15e <USB_WritePMA>
ep->xfer_buff += len;
800ae5a: f507 7384 add.w r3, r7, #264 @ 0x108
800ae5e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae62: 681b ldr r3, [r3, #0]
800ae64: 695a ldr r2, [r3, #20]
800ae66: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae6a: 441a add r2, r3
800ae6c: f507 7384 add.w r3, r7, #264 @ 0x108
800ae70: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae74: 681b ldr r3, [r3, #0]
800ae76: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800ae78: f507 7384 add.w r3, r7, #264 @ 0x108
800ae7c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae80: 681b ldr r3, [r3, #0]
800ae82: 6a1a ldr r2, [r3, #32]
800ae84: f507 7384 add.w r3, r7, #264 @ 0x108
800ae88: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae8c: 681b ldr r3, [r3, #0]
800ae8e: 691b ldr r3, [r3, #16]
800ae90: 429a cmp r2, r3
800ae92: d90f bls.n 800aeb4 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
800ae94: f507 7384 add.w r3, r7, #264 @ 0x108
800ae98: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae9c: 681b ldr r3, [r3, #0]
800ae9e: 6a1a ldr r2, [r3, #32]
800aea0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aea4: 1ad2 subs r2, r2, r3
800aea6: f507 7384 add.w r3, r7, #264 @ 0x108
800aeaa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aeae: 681b ldr r3, [r3, #0]
800aeb0: 621a str r2, [r3, #32]
800aeb2: e00e b.n 800aed2 <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
800aeb4: f507 7384 add.w r3, r7, #264 @ 0x108
800aeb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aebc: 681b ldr r3, [r3, #0]
800aebe: 6a1b ldr r3, [r3, #32]
800aec0: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800aec4: f507 7384 add.w r3, r7, #264 @ 0x108
800aec8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aecc: 681b ldr r3, [r3, #0]
800aece: 2200 movs r2, #0
800aed0: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800aed2: f507 7384 add.w r3, r7, #264 @ 0x108
800aed6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aeda: 681b ldr r3, [r3, #0]
800aedc: 643b str r3, [r7, #64] @ 0x40
800aede: f507 7384 add.w r3, r7, #264 @ 0x108
800aee2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aee6: 681b ldr r3, [r3, #0]
800aee8: 785b ldrb r3, [r3, #1]
800aeea: 2b00 cmp r3, #0
800aeec: d177 bne.n 800afde <USB_EPStartXfer+0x85e>
800aeee: f507 7384 add.w r3, r7, #264 @ 0x108
800aef2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aef6: 681b ldr r3, [r3, #0]
800aef8: 63bb str r3, [r7, #56] @ 0x38
800aefa: f507 7384 add.w r3, r7, #264 @ 0x108
800aefe: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af02: 681b ldr r3, [r3, #0]
800af04: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800af08: b29b uxth r3, r3
800af0a: 461a mov r2, r3
800af0c: 6bbb ldr r3, [r7, #56] @ 0x38
800af0e: 4413 add r3, r2
800af10: 63bb str r3, [r7, #56] @ 0x38
800af12: f507 7384 add.w r3, r7, #264 @ 0x108
800af16: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af1a: 681b ldr r3, [r3, #0]
800af1c: 781b ldrb r3, [r3, #0]
800af1e: 011a lsls r2, r3, #4
800af20: 6bbb ldr r3, [r7, #56] @ 0x38
800af22: 4413 add r3, r2
800af24: f203 430c addw r3, r3, #1036 @ 0x40c
800af28: 637b str r3, [r7, #52] @ 0x34
800af2a: 6b7b ldr r3, [r7, #52] @ 0x34
800af2c: 881b ldrh r3, [r3, #0]
800af2e: b29b uxth r3, r3
800af30: f3c3 0309 ubfx r3, r3, #0, #10
800af34: b29a uxth r2, r3
800af36: 6b7b ldr r3, [r7, #52] @ 0x34
800af38: 801a strh r2, [r3, #0]
800af3a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af3e: 2b3e cmp r3, #62 @ 0x3e
800af40: d921 bls.n 800af86 <USB_EPStartXfer+0x806>
800af42: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af46: 095b lsrs r3, r3, #5
800af48: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800af4c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af50: f003 031f and.w r3, r3, #31
800af54: 2b00 cmp r3, #0
800af56: d104 bne.n 800af62 <USB_EPStartXfer+0x7e2>
800af58: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800af5c: 3b01 subs r3, #1
800af5e: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800af62: 6b7b ldr r3, [r7, #52] @ 0x34
800af64: 881b ldrh r3, [r3, #0]
800af66: b29a uxth r2, r3
800af68: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800af6c: b29b uxth r3, r3
800af6e: 029b lsls r3, r3, #10
800af70: b29b uxth r3, r3
800af72: 4313 orrs r3, r2
800af74: b29b uxth r3, r3
800af76: ea6f 4343 mvn.w r3, r3, lsl #17
800af7a: ea6f 4353 mvn.w r3, r3, lsr #17
800af7e: b29a uxth r2, r3
800af80: 6b7b ldr r3, [r7, #52] @ 0x34
800af82: 801a strh r2, [r3, #0]
800af84: e050 b.n 800b028 <USB_EPStartXfer+0x8a8>
800af86: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af8a: 2b00 cmp r3, #0
800af8c: d10a bne.n 800afa4 <USB_EPStartXfer+0x824>
800af8e: 6b7b ldr r3, [r7, #52] @ 0x34
800af90: 881b ldrh r3, [r3, #0]
800af92: b29b uxth r3, r3
800af94: ea6f 4343 mvn.w r3, r3, lsl #17
800af98: ea6f 4353 mvn.w r3, r3, lsr #17
800af9c: b29a uxth r2, r3
800af9e: 6b7b ldr r3, [r7, #52] @ 0x34
800afa0: 801a strh r2, [r3, #0]
800afa2: e041 b.n 800b028 <USB_EPStartXfer+0x8a8>
800afa4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afa8: 085b lsrs r3, r3, #1
800afaa: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800afae: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afb2: f003 0301 and.w r3, r3, #1
800afb6: 2b00 cmp r3, #0
800afb8: d004 beq.n 800afc4 <USB_EPStartXfer+0x844>
800afba: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800afbe: 3301 adds r3, #1
800afc0: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800afc4: 6b7b ldr r3, [r7, #52] @ 0x34
800afc6: 881b ldrh r3, [r3, #0]
800afc8: b29a uxth r2, r3
800afca: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800afce: b29b uxth r3, r3
800afd0: 029b lsls r3, r3, #10
800afd2: b29b uxth r3, r3
800afd4: 4313 orrs r3, r2
800afd6: b29a uxth r2, r3
800afd8: 6b7b ldr r3, [r7, #52] @ 0x34
800afda: 801a strh r2, [r3, #0]
800afdc: e024 b.n 800b028 <USB_EPStartXfer+0x8a8>
800afde: f507 7384 add.w r3, r7, #264 @ 0x108
800afe2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afe6: 681b ldr r3, [r3, #0]
800afe8: 785b ldrb r3, [r3, #1]
800afea: 2b01 cmp r3, #1
800afec: d11c bne.n 800b028 <USB_EPStartXfer+0x8a8>
800afee: f507 7384 add.w r3, r7, #264 @ 0x108
800aff2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aff6: 681b ldr r3, [r3, #0]
800aff8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800affc: b29b uxth r3, r3
800affe: 461a mov r2, r3
800b000: 6c3b ldr r3, [r7, #64] @ 0x40
800b002: 4413 add r3, r2
800b004: 643b str r3, [r7, #64] @ 0x40
800b006: f507 7384 add.w r3, r7, #264 @ 0x108
800b00a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b00e: 681b ldr r3, [r3, #0]
800b010: 781b ldrb r3, [r3, #0]
800b012: 011a lsls r2, r3, #4
800b014: 6c3b ldr r3, [r7, #64] @ 0x40
800b016: 4413 add r3, r2
800b018: f203 430c addw r3, r3, #1036 @ 0x40c
800b01c: 63fb str r3, [r7, #60] @ 0x3c
800b01e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b022: b29a uxth r2, r3
800b024: 6bfb ldr r3, [r7, #60] @ 0x3c
800b026: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800b028: f507 7384 add.w r3, r7, #264 @ 0x108
800b02c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b030: 681b ldr r3, [r3, #0]
800b032: 895b ldrh r3, [r3, #10]
800b034: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b038: f507 7384 add.w r3, r7, #264 @ 0x108
800b03c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b040: 681b ldr r3, [r3, #0]
800b042: 6959 ldr r1, [r3, #20]
800b044: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b048: b29b uxth r3, r3
800b04a: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b04e: f507 7084 add.w r0, r7, #264 @ 0x108
800b052: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b056: 6800 ldr r0, [r0, #0]
800b058: f001 f881 bl 800c15e <USB_WritePMA>
800b05c: e227 b.n 800b4ae <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
800b05e: f507 7384 add.w r3, r7, #264 @ 0x108
800b062: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b066: 681b ldr r3, [r3, #0]
800b068: 6a1b ldr r3, [r3, #32]
800b06a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
800b06e: f507 7384 add.w r3, r7, #264 @ 0x108
800b072: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b076: 681a ldr r2, [r3, #0]
800b078: f507 7384 add.w r3, r7, #264 @ 0x108
800b07c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b080: 681b ldr r3, [r3, #0]
800b082: 781b ldrb r3, [r3, #0]
800b084: 009b lsls r3, r3, #2
800b086: 4413 add r3, r2
800b088: 881b ldrh r3, [r3, #0]
800b08a: b29b uxth r3, r3
800b08c: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800b090: f023 0370 bic.w r3, r3, #112 @ 0x70
800b094: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800b098: f507 7384 add.w r3, r7, #264 @ 0x108
800b09c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b0a0: 681a ldr r2, [r3, #0]
800b0a2: f507 7384 add.w r3, r7, #264 @ 0x108
800b0a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0aa: 681b ldr r3, [r3, #0]
800b0ac: 781b ldrb r3, [r3, #0]
800b0ae: 009b lsls r3, r3, #2
800b0b0: 441a add r2, r3
800b0b2: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800b0b6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b0ba: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b0be: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b0c2: f043 0380 orr.w r3, r3, #128 @ 0x80
800b0c6: b29b uxth r3, r3
800b0c8: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800b0ca: f507 7384 add.w r3, r7, #264 @ 0x108
800b0ce: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b0d2: 681b ldr r3, [r3, #0]
800b0d4: 65fb str r3, [r7, #92] @ 0x5c
800b0d6: f507 7384 add.w r3, r7, #264 @ 0x108
800b0da: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b0de: 681b ldr r3, [r3, #0]
800b0e0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b0e4: b29b uxth r3, r3
800b0e6: 461a mov r2, r3
800b0e8: 6dfb ldr r3, [r7, #92] @ 0x5c
800b0ea: 4413 add r3, r2
800b0ec: 65fb str r3, [r7, #92] @ 0x5c
800b0ee: f507 7384 add.w r3, r7, #264 @ 0x108
800b0f2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0f6: 681b ldr r3, [r3, #0]
800b0f8: 781b ldrb r3, [r3, #0]
800b0fa: 011a lsls r2, r3, #4
800b0fc: 6dfb ldr r3, [r7, #92] @ 0x5c
800b0fe: 4413 add r3, r2
800b100: f203 4304 addw r3, r3, #1028 @ 0x404
800b104: 65bb str r3, [r7, #88] @ 0x58
800b106: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b10a: b29a uxth r2, r3
800b10c: 6dbb ldr r3, [r7, #88] @ 0x58
800b10e: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800b110: f507 7384 add.w r3, r7, #264 @ 0x108
800b114: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b118: 681b ldr r3, [r3, #0]
800b11a: 891b ldrh r3, [r3, #8]
800b11c: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b120: f507 7384 add.w r3, r7, #264 @ 0x108
800b124: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b128: 681b ldr r3, [r3, #0]
800b12a: 6959 ldr r1, [r3, #20]
800b12c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b130: b29b uxth r3, r3
800b132: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b136: f507 7084 add.w r0, r7, #264 @ 0x108
800b13a: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b13e: 6800 ldr r0, [r0, #0]
800b140: f001 f80d bl 800c15e <USB_WritePMA>
800b144: e1b3 b.n 800b4ae <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800b146: f507 7384 add.w r3, r7, #264 @ 0x108
800b14a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b14e: 681b ldr r3, [r3, #0]
800b150: 6a1a ldr r2, [r3, #32]
800b152: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b156: 1ad2 subs r2, r2, r3
800b158: f507 7384 add.w r3, r7, #264 @ 0x108
800b15c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b160: 681b ldr r3, [r3, #0]
800b162: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800b164: f507 7384 add.w r3, r7, #264 @ 0x108
800b168: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b16c: 681a ldr r2, [r3, #0]
800b16e: f507 7384 add.w r3, r7, #264 @ 0x108
800b172: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b176: 681b ldr r3, [r3, #0]
800b178: 781b ldrb r3, [r3, #0]
800b17a: 009b lsls r3, r3, #2
800b17c: 4413 add r3, r2
800b17e: 881b ldrh r3, [r3, #0]
800b180: b29b uxth r3, r3
800b182: f003 0340 and.w r3, r3, #64 @ 0x40
800b186: 2b00 cmp r3, #0
800b188: f000 80c6 beq.w 800b318 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800b18c: f507 7384 add.w r3, r7, #264 @ 0x108
800b190: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b194: 681b ldr r3, [r3, #0]
800b196: 673b str r3, [r7, #112] @ 0x70
800b198: f507 7384 add.w r3, r7, #264 @ 0x108
800b19c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1a0: 681b ldr r3, [r3, #0]
800b1a2: 785b ldrb r3, [r3, #1]
800b1a4: 2b00 cmp r3, #0
800b1a6: d177 bne.n 800b298 <USB_EPStartXfer+0xb18>
800b1a8: f507 7384 add.w r3, r7, #264 @ 0x108
800b1ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1b0: 681b ldr r3, [r3, #0]
800b1b2: 66bb str r3, [r7, #104] @ 0x68
800b1b4: f507 7384 add.w r3, r7, #264 @ 0x108
800b1b8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1bc: 681b ldr r3, [r3, #0]
800b1be: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b1c2: b29b uxth r3, r3
800b1c4: 461a mov r2, r3
800b1c6: 6ebb ldr r3, [r7, #104] @ 0x68
800b1c8: 4413 add r3, r2
800b1ca: 66bb str r3, [r7, #104] @ 0x68
800b1cc: f507 7384 add.w r3, r7, #264 @ 0x108
800b1d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1d4: 681b ldr r3, [r3, #0]
800b1d6: 781b ldrb r3, [r3, #0]
800b1d8: 011a lsls r2, r3, #4
800b1da: 6ebb ldr r3, [r7, #104] @ 0x68
800b1dc: 4413 add r3, r2
800b1de: f203 430c addw r3, r3, #1036 @ 0x40c
800b1e2: 667b str r3, [r7, #100] @ 0x64
800b1e4: 6e7b ldr r3, [r7, #100] @ 0x64
800b1e6: 881b ldrh r3, [r3, #0]
800b1e8: b29b uxth r3, r3
800b1ea: f3c3 0309 ubfx r3, r3, #0, #10
800b1ee: b29a uxth r2, r3
800b1f0: 6e7b ldr r3, [r7, #100] @ 0x64
800b1f2: 801a strh r2, [r3, #0]
800b1f4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b1f8: 2b3e cmp r3, #62 @ 0x3e
800b1fa: d921 bls.n 800b240 <USB_EPStartXfer+0xac0>
800b1fc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b200: 095b lsrs r3, r3, #5
800b202: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b206: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b20a: f003 031f and.w r3, r3, #31
800b20e: 2b00 cmp r3, #0
800b210: d104 bne.n 800b21c <USB_EPStartXfer+0xa9c>
800b212: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b216: 3b01 subs r3, #1
800b218: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b21c: 6e7b ldr r3, [r7, #100] @ 0x64
800b21e: 881b ldrh r3, [r3, #0]
800b220: b29a uxth r2, r3
800b222: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b226: b29b uxth r3, r3
800b228: 029b lsls r3, r3, #10
800b22a: b29b uxth r3, r3
800b22c: 4313 orrs r3, r2
800b22e: b29b uxth r3, r3
800b230: ea6f 4343 mvn.w r3, r3, lsl #17
800b234: ea6f 4353 mvn.w r3, r3, lsr #17
800b238: b29a uxth r2, r3
800b23a: 6e7b ldr r3, [r7, #100] @ 0x64
800b23c: 801a strh r2, [r3, #0]
800b23e: e050 b.n 800b2e2 <USB_EPStartXfer+0xb62>
800b240: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b244: 2b00 cmp r3, #0
800b246: d10a bne.n 800b25e <USB_EPStartXfer+0xade>
800b248: 6e7b ldr r3, [r7, #100] @ 0x64
800b24a: 881b ldrh r3, [r3, #0]
800b24c: b29b uxth r3, r3
800b24e: ea6f 4343 mvn.w r3, r3, lsl #17
800b252: ea6f 4353 mvn.w r3, r3, lsr #17
800b256: b29a uxth r2, r3
800b258: 6e7b ldr r3, [r7, #100] @ 0x64
800b25a: 801a strh r2, [r3, #0]
800b25c: e041 b.n 800b2e2 <USB_EPStartXfer+0xb62>
800b25e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b262: 085b lsrs r3, r3, #1
800b264: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b268: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b26c: f003 0301 and.w r3, r3, #1
800b270: 2b00 cmp r3, #0
800b272: d004 beq.n 800b27e <USB_EPStartXfer+0xafe>
800b274: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b278: 3301 adds r3, #1
800b27a: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b27e: 6e7b ldr r3, [r7, #100] @ 0x64
800b280: 881b ldrh r3, [r3, #0]
800b282: b29a uxth r2, r3
800b284: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b288: b29b uxth r3, r3
800b28a: 029b lsls r3, r3, #10
800b28c: b29b uxth r3, r3
800b28e: 4313 orrs r3, r2
800b290: b29a uxth r2, r3
800b292: 6e7b ldr r3, [r7, #100] @ 0x64
800b294: 801a strh r2, [r3, #0]
800b296: e024 b.n 800b2e2 <USB_EPStartXfer+0xb62>
800b298: f507 7384 add.w r3, r7, #264 @ 0x108
800b29c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2a0: 681b ldr r3, [r3, #0]
800b2a2: 785b ldrb r3, [r3, #1]
800b2a4: 2b01 cmp r3, #1
800b2a6: d11c bne.n 800b2e2 <USB_EPStartXfer+0xb62>
800b2a8: f507 7384 add.w r3, r7, #264 @ 0x108
800b2ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b2b0: 681b ldr r3, [r3, #0]
800b2b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b2b6: b29b uxth r3, r3
800b2b8: 461a mov r2, r3
800b2ba: 6f3b ldr r3, [r7, #112] @ 0x70
800b2bc: 4413 add r3, r2
800b2be: 673b str r3, [r7, #112] @ 0x70
800b2c0: f507 7384 add.w r3, r7, #264 @ 0x108
800b2c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2c8: 681b ldr r3, [r3, #0]
800b2ca: 781b ldrb r3, [r3, #0]
800b2cc: 011a lsls r2, r3, #4
800b2ce: 6f3b ldr r3, [r7, #112] @ 0x70
800b2d0: 4413 add r3, r2
800b2d2: f203 430c addw r3, r3, #1036 @ 0x40c
800b2d6: 66fb str r3, [r7, #108] @ 0x6c
800b2d8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b2dc: b29a uxth r2, r3
800b2de: 6efb ldr r3, [r7, #108] @ 0x6c
800b2e0: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800b2e2: f507 7384 add.w r3, r7, #264 @ 0x108
800b2e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2ea: 681b ldr r3, [r3, #0]
800b2ec: 895b ldrh r3, [r3, #10]
800b2ee: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b2f2: f507 7384 add.w r3, r7, #264 @ 0x108
800b2f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2fa: 681b ldr r3, [r3, #0]
800b2fc: 6959 ldr r1, [r3, #20]
800b2fe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b302: b29b uxth r3, r3
800b304: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b308: f507 7084 add.w r0, r7, #264 @ 0x108
800b30c: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b310: 6800 ldr r0, [r0, #0]
800b312: f000 ff24 bl 800c15e <USB_WritePMA>
800b316: e0ca b.n 800b4ae <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800b318: f507 7384 add.w r3, r7, #264 @ 0x108
800b31c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b320: 681b ldr r3, [r3, #0]
800b322: 785b ldrb r3, [r3, #1]
800b324: 2b00 cmp r3, #0
800b326: d177 bne.n 800b418 <USB_EPStartXfer+0xc98>
800b328: f507 7384 add.w r3, r7, #264 @ 0x108
800b32c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b330: 681b ldr r3, [r3, #0]
800b332: 67fb str r3, [r7, #124] @ 0x7c
800b334: f507 7384 add.w r3, r7, #264 @ 0x108
800b338: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b33c: 681b ldr r3, [r3, #0]
800b33e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b342: b29b uxth r3, r3
800b344: 461a mov r2, r3
800b346: 6ffb ldr r3, [r7, #124] @ 0x7c
800b348: 4413 add r3, r2
800b34a: 67fb str r3, [r7, #124] @ 0x7c
800b34c: f507 7384 add.w r3, r7, #264 @ 0x108
800b350: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b354: 681b ldr r3, [r3, #0]
800b356: 781b ldrb r3, [r3, #0]
800b358: 011a lsls r2, r3, #4
800b35a: 6ffb ldr r3, [r7, #124] @ 0x7c
800b35c: 4413 add r3, r2
800b35e: f203 4304 addw r3, r3, #1028 @ 0x404
800b362: 67bb str r3, [r7, #120] @ 0x78
800b364: 6fbb ldr r3, [r7, #120] @ 0x78
800b366: 881b ldrh r3, [r3, #0]
800b368: b29b uxth r3, r3
800b36a: f3c3 0309 ubfx r3, r3, #0, #10
800b36e: b29a uxth r2, r3
800b370: 6fbb ldr r3, [r7, #120] @ 0x78
800b372: 801a strh r2, [r3, #0]
800b374: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b378: 2b3e cmp r3, #62 @ 0x3e
800b37a: d921 bls.n 800b3c0 <USB_EPStartXfer+0xc40>
800b37c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b380: 095b lsrs r3, r3, #5
800b382: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b386: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b38a: f003 031f and.w r3, r3, #31
800b38e: 2b00 cmp r3, #0
800b390: d104 bne.n 800b39c <USB_EPStartXfer+0xc1c>
800b392: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b396: 3b01 subs r3, #1
800b398: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b39c: 6fbb ldr r3, [r7, #120] @ 0x78
800b39e: 881b ldrh r3, [r3, #0]
800b3a0: b29a uxth r2, r3
800b3a2: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b3a6: b29b uxth r3, r3
800b3a8: 029b lsls r3, r3, #10
800b3aa: b29b uxth r3, r3
800b3ac: 4313 orrs r3, r2
800b3ae: b29b uxth r3, r3
800b3b0: ea6f 4343 mvn.w r3, r3, lsl #17
800b3b4: ea6f 4353 mvn.w r3, r3, lsr #17
800b3b8: b29a uxth r2, r3
800b3ba: 6fbb ldr r3, [r7, #120] @ 0x78
800b3bc: 801a strh r2, [r3, #0]
800b3be: e05c b.n 800b47a <USB_EPStartXfer+0xcfa>
800b3c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b3c4: 2b00 cmp r3, #0
800b3c6: d10a bne.n 800b3de <USB_EPStartXfer+0xc5e>
800b3c8: 6fbb ldr r3, [r7, #120] @ 0x78
800b3ca: 881b ldrh r3, [r3, #0]
800b3cc: b29b uxth r3, r3
800b3ce: ea6f 4343 mvn.w r3, r3, lsl #17
800b3d2: ea6f 4353 mvn.w r3, r3, lsr #17
800b3d6: b29a uxth r2, r3
800b3d8: 6fbb ldr r3, [r7, #120] @ 0x78
800b3da: 801a strh r2, [r3, #0]
800b3dc: e04d b.n 800b47a <USB_EPStartXfer+0xcfa>
800b3de: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b3e2: 085b lsrs r3, r3, #1
800b3e4: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b3e8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b3ec: f003 0301 and.w r3, r3, #1
800b3f0: 2b00 cmp r3, #0
800b3f2: d004 beq.n 800b3fe <USB_EPStartXfer+0xc7e>
800b3f4: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b3f8: 3301 adds r3, #1
800b3fa: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b3fe: 6fbb ldr r3, [r7, #120] @ 0x78
800b400: 881b ldrh r3, [r3, #0]
800b402: b29a uxth r2, r3
800b404: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b408: b29b uxth r3, r3
800b40a: 029b lsls r3, r3, #10
800b40c: b29b uxth r3, r3
800b40e: 4313 orrs r3, r2
800b410: b29a uxth r2, r3
800b412: 6fbb ldr r3, [r7, #120] @ 0x78
800b414: 801a strh r2, [r3, #0]
800b416: e030 b.n 800b47a <USB_EPStartXfer+0xcfa>
800b418: f507 7384 add.w r3, r7, #264 @ 0x108
800b41c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b420: 681b ldr r3, [r3, #0]
800b422: 785b ldrb r3, [r3, #1]
800b424: 2b01 cmp r3, #1
800b426: d128 bne.n 800b47a <USB_EPStartXfer+0xcfa>
800b428: f507 7384 add.w r3, r7, #264 @ 0x108
800b42c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b430: 681b ldr r3, [r3, #0]
800b432: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800b436: f507 7384 add.w r3, r7, #264 @ 0x108
800b43a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b43e: 681b ldr r3, [r3, #0]
800b440: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b444: b29b uxth r3, r3
800b446: 461a mov r2, r3
800b448: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800b44c: 4413 add r3, r2
800b44e: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800b452: f507 7384 add.w r3, r7, #264 @ 0x108
800b456: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b45a: 681b ldr r3, [r3, #0]
800b45c: 781b ldrb r3, [r3, #0]
800b45e: 011a lsls r2, r3, #4
800b460: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800b464: 4413 add r3, r2
800b466: f203 4304 addw r3, r3, #1028 @ 0x404
800b46a: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800b46e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b472: b29a uxth r2, r3
800b474: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800b478: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800b47a: f507 7384 add.w r3, r7, #264 @ 0x108
800b47e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b482: 681b ldr r3, [r3, #0]
800b484: 891b ldrh r3, [r3, #8]
800b486: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b48a: f507 7384 add.w r3, r7, #264 @ 0x108
800b48e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b492: 681b ldr r3, [r3, #0]
800b494: 6959 ldr r1, [r3, #20]
800b496: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b49a: b29b uxth r3, r3
800b49c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b4a0: f507 7084 add.w r0, r7, #264 @ 0x108
800b4a4: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b4a8: 6800 ldr r0, [r0, #0]
800b4aa: f000 fe58 bl 800c15e <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
800b4ae: f507 7384 add.w r3, r7, #264 @ 0x108
800b4b2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b4b6: 681a ldr r2, [r3, #0]
800b4b8: f507 7384 add.w r3, r7, #264 @ 0x108
800b4bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4c0: 681b ldr r3, [r3, #0]
800b4c2: 781b ldrb r3, [r3, #0]
800b4c4: 009b lsls r3, r3, #2
800b4c6: 4413 add r3, r2
800b4c8: 881b ldrh r3, [r3, #0]
800b4ca: b29b uxth r3, r3
800b4cc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b4d0: f023 0340 bic.w r3, r3, #64 @ 0x40
800b4d4: 817b strh r3, [r7, #10]
800b4d6: 897b ldrh r3, [r7, #10]
800b4d8: f083 0310 eor.w r3, r3, #16
800b4dc: 817b strh r3, [r7, #10]
800b4de: 897b ldrh r3, [r7, #10]
800b4e0: f083 0320 eor.w r3, r3, #32
800b4e4: 817b strh r3, [r7, #10]
800b4e6: f507 7384 add.w r3, r7, #264 @ 0x108
800b4ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b4ee: 681a ldr r2, [r3, #0]
800b4f0: f507 7384 add.w r3, r7, #264 @ 0x108
800b4f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4f8: 681b ldr r3, [r3, #0]
800b4fa: 781b ldrb r3, [r3, #0]
800b4fc: 009b lsls r3, r3, #2
800b4fe: 441a add r2, r3
800b500: 897b ldrh r3, [r7, #10]
800b502: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b506: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b50a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b50e: f043 0380 orr.w r3, r3, #128 @ 0x80
800b512: b29b uxth r3, r3
800b514: 8013 strh r3, [r2, #0]
800b516: f000 bcde b.w 800bed6 <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800b51a: f507 7384 add.w r3, r7, #264 @ 0x108
800b51e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b522: 681b ldr r3, [r3, #0]
800b524: 7b1b ldrb r3, [r3, #12]
800b526: 2b00 cmp r3, #0
800b528: f040 80bb bne.w 800b6a2 <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800b52c: f507 7384 add.w r3, r7, #264 @ 0x108
800b530: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b534: 681b ldr r3, [r3, #0]
800b536: 699a ldr r2, [r3, #24]
800b538: f507 7384 add.w r3, r7, #264 @ 0x108
800b53c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b540: 681b ldr r3, [r3, #0]
800b542: 691b ldr r3, [r3, #16]
800b544: 429a cmp r2, r3
800b546: d917 bls.n 800b578 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
800b548: f507 7384 add.w r3, r7, #264 @ 0x108
800b54c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b550: 681b ldr r3, [r3, #0]
800b552: 691b ldr r3, [r3, #16]
800b554: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800b558: f507 7384 add.w r3, r7, #264 @ 0x108
800b55c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b560: 681b ldr r3, [r3, #0]
800b562: 699a ldr r2, [r3, #24]
800b564: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b568: 1ad2 subs r2, r2, r3
800b56a: f507 7384 add.w r3, r7, #264 @ 0x108
800b56e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b572: 681b ldr r3, [r3, #0]
800b574: 619a str r2, [r3, #24]
800b576: e00e b.n 800b596 <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
800b578: f507 7384 add.w r3, r7, #264 @ 0x108
800b57c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b580: 681b ldr r3, [r3, #0]
800b582: 699b ldr r3, [r3, #24]
800b584: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800b588: f507 7384 add.w r3, r7, #264 @ 0x108
800b58c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b590: 681b ldr r3, [r3, #0]
800b592: 2200 movs r2, #0
800b594: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
800b596: f507 7384 add.w r3, r7, #264 @ 0x108
800b59a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b59e: 681b ldr r3, [r3, #0]
800b5a0: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800b5a4: f507 7384 add.w r3, r7, #264 @ 0x108
800b5a8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b5ac: 681b ldr r3, [r3, #0]
800b5ae: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b5b2: b29b uxth r3, r3
800b5b4: 461a mov r2, r3
800b5b6: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800b5ba: 4413 add r3, r2
800b5bc: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800b5c0: f507 7384 add.w r3, r7, #264 @ 0x108
800b5c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b5c8: 681b ldr r3, [r3, #0]
800b5ca: 781b ldrb r3, [r3, #0]
800b5cc: 011a lsls r2, r3, #4
800b5ce: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800b5d2: 4413 add r3, r2
800b5d4: f203 430c addw r3, r3, #1036 @ 0x40c
800b5d8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800b5dc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b5e0: 881b ldrh r3, [r3, #0]
800b5e2: b29b uxth r3, r3
800b5e4: f3c3 0309 ubfx r3, r3, #0, #10
800b5e8: b29a uxth r2, r3
800b5ea: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b5ee: 801a strh r2, [r3, #0]
800b5f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5f4: 2b3e cmp r3, #62 @ 0x3e
800b5f6: d924 bls.n 800b642 <USB_EPStartXfer+0xec2>
800b5f8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5fc: 095b lsrs r3, r3, #5
800b5fe: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b602: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b606: f003 031f and.w r3, r3, #31
800b60a: 2b00 cmp r3, #0
800b60c: d104 bne.n 800b618 <USB_EPStartXfer+0xe98>
800b60e: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b612: 3b01 subs r3, #1
800b614: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b618: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b61c: 881b ldrh r3, [r3, #0]
800b61e: b29a uxth r2, r3
800b620: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b624: b29b uxth r3, r3
800b626: 029b lsls r3, r3, #10
800b628: b29b uxth r3, r3
800b62a: 4313 orrs r3, r2
800b62c: b29b uxth r3, r3
800b62e: ea6f 4343 mvn.w r3, r3, lsl #17
800b632: ea6f 4353 mvn.w r3, r3, lsr #17
800b636: b29a uxth r2, r3
800b638: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b63c: 801a strh r2, [r3, #0]
800b63e: f000 bc10 b.w 800be62 <USB_EPStartXfer+0x16e2>
800b642: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b646: 2b00 cmp r3, #0
800b648: d10c bne.n 800b664 <USB_EPStartXfer+0xee4>
800b64a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b64e: 881b ldrh r3, [r3, #0]
800b650: b29b uxth r3, r3
800b652: ea6f 4343 mvn.w r3, r3, lsl #17
800b656: ea6f 4353 mvn.w r3, r3, lsr #17
800b65a: b29a uxth r2, r3
800b65c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b660: 801a strh r2, [r3, #0]
800b662: e3fe b.n 800be62 <USB_EPStartXfer+0x16e2>
800b664: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b668: 085b lsrs r3, r3, #1
800b66a: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b66e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b672: f003 0301 and.w r3, r3, #1
800b676: 2b00 cmp r3, #0
800b678: d004 beq.n 800b684 <USB_EPStartXfer+0xf04>
800b67a: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b67e: 3301 adds r3, #1
800b680: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b684: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b688: 881b ldrh r3, [r3, #0]
800b68a: b29a uxth r2, r3
800b68c: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b690: b29b uxth r3, r3
800b692: 029b lsls r3, r3, #10
800b694: b29b uxth r3, r3
800b696: 4313 orrs r3, r2
800b698: b29a uxth r2, r3
800b69a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b69e: 801a strh r2, [r3, #0]
800b6a0: e3df b.n 800be62 <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
800b6a2: f507 7384 add.w r3, r7, #264 @ 0x108
800b6a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6aa: 681b ldr r3, [r3, #0]
800b6ac: 78db ldrb r3, [r3, #3]
800b6ae: 2b02 cmp r3, #2
800b6b0: f040 8218 bne.w 800bae4 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
800b6b4: f507 7384 add.w r3, r7, #264 @ 0x108
800b6b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6bc: 681b ldr r3, [r3, #0]
800b6be: 785b ldrb r3, [r3, #1]
800b6c0: 2b00 cmp r3, #0
800b6c2: f040 809d bne.w 800b800 <USB_EPStartXfer+0x1080>
800b6c6: f507 7384 add.w r3, r7, #264 @ 0x108
800b6ca: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b6ce: 681b ldr r3, [r3, #0]
800b6d0: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b6d4: f507 7384 add.w r3, r7, #264 @ 0x108
800b6d8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b6dc: 681b ldr r3, [r3, #0]
800b6de: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b6e2: b29b uxth r3, r3
800b6e4: 461a mov r2, r3
800b6e6: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b6ea: 4413 add r3, r2
800b6ec: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b6f0: f507 7384 add.w r3, r7, #264 @ 0x108
800b6f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6f8: 681b ldr r3, [r3, #0]
800b6fa: 781b ldrb r3, [r3, #0]
800b6fc: 011a lsls r2, r3, #4
800b6fe: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b702: 4413 add r3, r2
800b704: f203 4304 addw r3, r3, #1028 @ 0x404
800b708: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
800b70c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b710: 881b ldrh r3, [r3, #0]
800b712: b29b uxth r3, r3
800b714: f3c3 0309 ubfx r3, r3, #0, #10
800b718: b29a uxth r2, r3
800b71a: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b71e: 801a strh r2, [r3, #0]
800b720: f507 7384 add.w r3, r7, #264 @ 0x108
800b724: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b728: 681b ldr r3, [r3, #0]
800b72a: 691b ldr r3, [r3, #16]
800b72c: 2b3e cmp r3, #62 @ 0x3e
800b72e: d92b bls.n 800b788 <USB_EPStartXfer+0x1008>
800b730: f507 7384 add.w r3, r7, #264 @ 0x108
800b734: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b738: 681b ldr r3, [r3, #0]
800b73a: 691b ldr r3, [r3, #16]
800b73c: 095b lsrs r3, r3, #5
800b73e: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b742: f507 7384 add.w r3, r7, #264 @ 0x108
800b746: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b74a: 681b ldr r3, [r3, #0]
800b74c: 691b ldr r3, [r3, #16]
800b74e: f003 031f and.w r3, r3, #31
800b752: 2b00 cmp r3, #0
800b754: d104 bne.n 800b760 <USB_EPStartXfer+0xfe0>
800b756: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b75a: 3b01 subs r3, #1
800b75c: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b760: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b764: 881b ldrh r3, [r3, #0]
800b766: b29a uxth r2, r3
800b768: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b76c: b29b uxth r3, r3
800b76e: 029b lsls r3, r3, #10
800b770: b29b uxth r3, r3
800b772: 4313 orrs r3, r2
800b774: b29b uxth r3, r3
800b776: ea6f 4343 mvn.w r3, r3, lsl #17
800b77a: ea6f 4353 mvn.w r3, r3, lsr #17
800b77e: b29a uxth r2, r3
800b780: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b784: 801a strh r2, [r3, #0]
800b786: e070 b.n 800b86a <USB_EPStartXfer+0x10ea>
800b788: f507 7384 add.w r3, r7, #264 @ 0x108
800b78c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b790: 681b ldr r3, [r3, #0]
800b792: 691b ldr r3, [r3, #16]
800b794: 2b00 cmp r3, #0
800b796: d10c bne.n 800b7b2 <USB_EPStartXfer+0x1032>
800b798: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b79c: 881b ldrh r3, [r3, #0]
800b79e: b29b uxth r3, r3
800b7a0: ea6f 4343 mvn.w r3, r3, lsl #17
800b7a4: ea6f 4353 mvn.w r3, r3, lsr #17
800b7a8: b29a uxth r2, r3
800b7aa: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b7ae: 801a strh r2, [r3, #0]
800b7b0: e05b b.n 800b86a <USB_EPStartXfer+0x10ea>
800b7b2: f507 7384 add.w r3, r7, #264 @ 0x108
800b7b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7ba: 681b ldr r3, [r3, #0]
800b7bc: 691b ldr r3, [r3, #16]
800b7be: 085b lsrs r3, r3, #1
800b7c0: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b7c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b7c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7cc: 681b ldr r3, [r3, #0]
800b7ce: 691b ldr r3, [r3, #16]
800b7d0: f003 0301 and.w r3, r3, #1
800b7d4: 2b00 cmp r3, #0
800b7d6: d004 beq.n 800b7e2 <USB_EPStartXfer+0x1062>
800b7d8: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b7dc: 3301 adds r3, #1
800b7de: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b7e2: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b7e6: 881b ldrh r3, [r3, #0]
800b7e8: b29a uxth r2, r3
800b7ea: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b7ee: b29b uxth r3, r3
800b7f0: 029b lsls r3, r3, #10
800b7f2: b29b uxth r3, r3
800b7f4: 4313 orrs r3, r2
800b7f6: b29a uxth r2, r3
800b7f8: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b7fc: 801a strh r2, [r3, #0]
800b7fe: e034 b.n 800b86a <USB_EPStartXfer+0x10ea>
800b800: f507 7384 add.w r3, r7, #264 @ 0x108
800b804: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b808: 681b ldr r3, [r3, #0]
800b80a: 785b ldrb r3, [r3, #1]
800b80c: 2b01 cmp r3, #1
800b80e: d12c bne.n 800b86a <USB_EPStartXfer+0x10ea>
800b810: f507 7384 add.w r3, r7, #264 @ 0x108
800b814: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b818: 681b ldr r3, [r3, #0]
800b81a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b81e: f507 7384 add.w r3, r7, #264 @ 0x108
800b822: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b826: 681b ldr r3, [r3, #0]
800b828: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b82c: b29b uxth r3, r3
800b82e: 461a mov r2, r3
800b830: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b834: 4413 add r3, r2
800b836: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b83a: f507 7384 add.w r3, r7, #264 @ 0x108
800b83e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b842: 681b ldr r3, [r3, #0]
800b844: 781b ldrb r3, [r3, #0]
800b846: 011a lsls r2, r3, #4
800b848: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b84c: 4413 add r3, r2
800b84e: f203 4304 addw r3, r3, #1028 @ 0x404
800b852: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
800b856: f507 7384 add.w r3, r7, #264 @ 0x108
800b85a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b85e: 681b ldr r3, [r3, #0]
800b860: 691b ldr r3, [r3, #16]
800b862: b29a uxth r2, r3
800b864: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
800b868: 801a strh r2, [r3, #0]
800b86a: f507 7384 add.w r3, r7, #264 @ 0x108
800b86e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b872: 681b ldr r3, [r3, #0]
800b874: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b878: f507 7384 add.w r3, r7, #264 @ 0x108
800b87c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b880: 681b ldr r3, [r3, #0]
800b882: 785b ldrb r3, [r3, #1]
800b884: 2b00 cmp r3, #0
800b886: f040 809d bne.w 800b9c4 <USB_EPStartXfer+0x1244>
800b88a: f507 7384 add.w r3, r7, #264 @ 0x108
800b88e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b892: 681b ldr r3, [r3, #0]
800b894: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b898: f507 7384 add.w r3, r7, #264 @ 0x108
800b89c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b8a0: 681b ldr r3, [r3, #0]
800b8a2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b8a6: b29b uxth r3, r3
800b8a8: 461a mov r2, r3
800b8aa: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b8ae: 4413 add r3, r2
800b8b0: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b8b4: f507 7384 add.w r3, r7, #264 @ 0x108
800b8b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8bc: 681b ldr r3, [r3, #0]
800b8be: 781b ldrb r3, [r3, #0]
800b8c0: 011a lsls r2, r3, #4
800b8c2: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b8c6: 4413 add r3, r2
800b8c8: f203 430c addw r3, r3, #1036 @ 0x40c
800b8cc: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800b8d0: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b8d4: 881b ldrh r3, [r3, #0]
800b8d6: b29b uxth r3, r3
800b8d8: f3c3 0309 ubfx r3, r3, #0, #10
800b8dc: b29a uxth r2, r3
800b8de: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b8e2: 801a strh r2, [r3, #0]
800b8e4: f507 7384 add.w r3, r7, #264 @ 0x108
800b8e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8ec: 681b ldr r3, [r3, #0]
800b8ee: 691b ldr r3, [r3, #16]
800b8f0: 2b3e cmp r3, #62 @ 0x3e
800b8f2: d92b bls.n 800b94c <USB_EPStartXfer+0x11cc>
800b8f4: f507 7384 add.w r3, r7, #264 @ 0x108
800b8f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8fc: 681b ldr r3, [r3, #0]
800b8fe: 691b ldr r3, [r3, #16]
800b900: 095b lsrs r3, r3, #5
800b902: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b906: f507 7384 add.w r3, r7, #264 @ 0x108
800b90a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b90e: 681b ldr r3, [r3, #0]
800b910: 691b ldr r3, [r3, #16]
800b912: f003 031f and.w r3, r3, #31
800b916: 2b00 cmp r3, #0
800b918: d104 bne.n 800b924 <USB_EPStartXfer+0x11a4>
800b91a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b91e: 3b01 subs r3, #1
800b920: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b924: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b928: 881b ldrh r3, [r3, #0]
800b92a: b29a uxth r2, r3
800b92c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b930: b29b uxth r3, r3
800b932: 029b lsls r3, r3, #10
800b934: b29b uxth r3, r3
800b936: 4313 orrs r3, r2
800b938: b29b uxth r3, r3
800b93a: ea6f 4343 mvn.w r3, r3, lsl #17
800b93e: ea6f 4353 mvn.w r3, r3, lsr #17
800b942: b29a uxth r2, r3
800b944: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b948: 801a strh r2, [r3, #0]
800b94a: e069 b.n 800ba20 <USB_EPStartXfer+0x12a0>
800b94c: f507 7384 add.w r3, r7, #264 @ 0x108
800b950: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b954: 681b ldr r3, [r3, #0]
800b956: 691b ldr r3, [r3, #16]
800b958: 2b00 cmp r3, #0
800b95a: d10c bne.n 800b976 <USB_EPStartXfer+0x11f6>
800b95c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b960: 881b ldrh r3, [r3, #0]
800b962: b29b uxth r3, r3
800b964: ea6f 4343 mvn.w r3, r3, lsl #17
800b968: ea6f 4353 mvn.w r3, r3, lsr #17
800b96c: b29a uxth r2, r3
800b96e: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b972: 801a strh r2, [r3, #0]
800b974: e054 b.n 800ba20 <USB_EPStartXfer+0x12a0>
800b976: f507 7384 add.w r3, r7, #264 @ 0x108
800b97a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b97e: 681b ldr r3, [r3, #0]
800b980: 691b ldr r3, [r3, #16]
800b982: 085b lsrs r3, r3, #1
800b984: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b988: f507 7384 add.w r3, r7, #264 @ 0x108
800b98c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b990: 681b ldr r3, [r3, #0]
800b992: 691b ldr r3, [r3, #16]
800b994: f003 0301 and.w r3, r3, #1
800b998: 2b00 cmp r3, #0
800b99a: d004 beq.n 800b9a6 <USB_EPStartXfer+0x1226>
800b99c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b9a0: 3301 adds r3, #1
800b9a2: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b9a6: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b9aa: 881b ldrh r3, [r3, #0]
800b9ac: b29a uxth r2, r3
800b9ae: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b9b2: b29b uxth r3, r3
800b9b4: 029b lsls r3, r3, #10
800b9b6: b29b uxth r3, r3
800b9b8: 4313 orrs r3, r2
800b9ba: b29a uxth r2, r3
800b9bc: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b9c0: 801a strh r2, [r3, #0]
800b9c2: e02d b.n 800ba20 <USB_EPStartXfer+0x12a0>
800b9c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b9c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b9cc: 681b ldr r3, [r3, #0]
800b9ce: 785b ldrb r3, [r3, #1]
800b9d0: 2b01 cmp r3, #1
800b9d2: d125 bne.n 800ba20 <USB_EPStartXfer+0x12a0>
800b9d4: f507 7384 add.w r3, r7, #264 @ 0x108
800b9d8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b9dc: 681b ldr r3, [r3, #0]
800b9de: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b9e2: b29b uxth r3, r3
800b9e4: 461a mov r2, r3
800b9e6: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800b9ea: 4413 add r3, r2
800b9ec: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b9f0: f507 7384 add.w r3, r7, #264 @ 0x108
800b9f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b9f8: 681b ldr r3, [r3, #0]
800b9fa: 781b ldrb r3, [r3, #0]
800b9fc: 011a lsls r2, r3, #4
800b9fe: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800ba02: 4413 add r3, r2
800ba04: f203 430c addw r3, r3, #1036 @ 0x40c
800ba08: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
800ba0c: f507 7384 add.w r3, r7, #264 @ 0x108
800ba10: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba14: 681b ldr r3, [r3, #0]
800ba16: 691b ldr r3, [r3, #16]
800ba18: b29a uxth r2, r3
800ba1a: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800ba1e: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
800ba20: f507 7384 add.w r3, r7, #264 @ 0x108
800ba24: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba28: 681b ldr r3, [r3, #0]
800ba2a: 69db ldr r3, [r3, #28]
800ba2c: 2b00 cmp r3, #0
800ba2e: f000 8218 beq.w 800be62 <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
800ba32: f507 7384 add.w r3, r7, #264 @ 0x108
800ba36: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ba3a: 681a ldr r2, [r3, #0]
800ba3c: f507 7384 add.w r3, r7, #264 @ 0x108
800ba40: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba44: 681b ldr r3, [r3, #0]
800ba46: 781b ldrb r3, [r3, #0]
800ba48: 009b lsls r3, r3, #2
800ba4a: 4413 add r3, r2
800ba4c: 881b ldrh r3, [r3, #0]
800ba4e: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800ba52: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800ba56: f403 4380 and.w r3, r3, #16384 @ 0x4000
800ba5a: 2b00 cmp r3, #0
800ba5c: d005 beq.n 800ba6a <USB_EPStartXfer+0x12ea>
800ba5e: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800ba62: f003 0340 and.w r3, r3, #64 @ 0x40
800ba66: 2b00 cmp r3, #0
800ba68: d10d bne.n 800ba86 <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800ba6a: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800ba6e: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800ba72: 2b00 cmp r3, #0
800ba74: f040 81f5 bne.w 800be62 <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800ba78: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800ba7c: f003 0340 and.w r3, r3, #64 @ 0x40
800ba80: 2b00 cmp r3, #0
800ba82: f040 81ee bne.w 800be62 <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
800ba86: f507 7384 add.w r3, r7, #264 @ 0x108
800ba8a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ba8e: 681a ldr r2, [r3, #0]
800ba90: f507 7384 add.w r3, r7, #264 @ 0x108
800ba94: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba98: 681b ldr r3, [r3, #0]
800ba9a: 781b ldrb r3, [r3, #0]
800ba9c: 009b lsls r3, r3, #2
800ba9e: 4413 add r3, r2
800baa0: 881b ldrh r3, [r3, #0]
800baa2: b29b uxth r3, r3
800baa4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800baa8: f023 0370 bic.w r3, r3, #112 @ 0x70
800baac: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
800bab0: f507 7384 add.w r3, r7, #264 @ 0x108
800bab4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bab8: 681a ldr r2, [r3, #0]
800baba: f507 7384 add.w r3, r7, #264 @ 0x108
800babe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bac2: 681b ldr r3, [r3, #0]
800bac4: 781b ldrb r3, [r3, #0]
800bac6: 009b lsls r3, r3, #2
800bac8: 441a add r2, r3
800baca: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
800bace: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bad2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bad6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bada: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800bade: b29b uxth r3, r3
800bae0: 8013 strh r3, [r2, #0]
800bae2: e1be b.n 800be62 <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800bae4: f507 7384 add.w r3, r7, #264 @ 0x108
800bae8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800baec: 681b ldr r3, [r3, #0]
800baee: 78db ldrb r3, [r3, #3]
800baf0: 2b01 cmp r3, #1
800baf2: f040 81b4 bne.w 800be5e <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800baf6: f507 7384 add.w r3, r7, #264 @ 0x108
800bafa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bafe: 681b ldr r3, [r3, #0]
800bb00: 699a ldr r2, [r3, #24]
800bb02: f507 7384 add.w r3, r7, #264 @ 0x108
800bb06: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb0a: 681b ldr r3, [r3, #0]
800bb0c: 691b ldr r3, [r3, #16]
800bb0e: 429a cmp r2, r3
800bb10: d917 bls.n 800bb42 <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
800bb12: f507 7384 add.w r3, r7, #264 @ 0x108
800bb16: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb1a: 681b ldr r3, [r3, #0]
800bb1c: 691b ldr r3, [r3, #16]
800bb1e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800bb22: f507 7384 add.w r3, r7, #264 @ 0x108
800bb26: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb2a: 681b ldr r3, [r3, #0]
800bb2c: 699a ldr r2, [r3, #24]
800bb2e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bb32: 1ad2 subs r2, r2, r3
800bb34: f507 7384 add.w r3, r7, #264 @ 0x108
800bb38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb3c: 681b ldr r3, [r3, #0]
800bb3e: 619a str r2, [r3, #24]
800bb40: e00e b.n 800bb60 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
800bb42: f507 7384 add.w r3, r7, #264 @ 0x108
800bb46: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb4a: 681b ldr r3, [r3, #0]
800bb4c: 699b ldr r3, [r3, #24]
800bb4e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800bb52: f507 7384 add.w r3, r7, #264 @ 0x108
800bb56: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb5a: 681b ldr r3, [r3, #0]
800bb5c: 2200 movs r2, #0
800bb5e: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
800bb60: f507 7384 add.w r3, r7, #264 @ 0x108
800bb64: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb68: 681b ldr r3, [r3, #0]
800bb6a: 785b ldrb r3, [r3, #1]
800bb6c: 2b00 cmp r3, #0
800bb6e: f040 8085 bne.w 800bc7c <USB_EPStartXfer+0x14fc>
800bb72: f507 7384 add.w r3, r7, #264 @ 0x108
800bb76: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bb7a: 681b ldr r3, [r3, #0]
800bb7c: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800bb80: f507 7384 add.w r3, r7, #264 @ 0x108
800bb84: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bb88: 681b ldr r3, [r3, #0]
800bb8a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bb8e: b29b uxth r3, r3
800bb90: 461a mov r2, r3
800bb92: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800bb96: 4413 add r3, r2
800bb98: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800bb9c: f507 7384 add.w r3, r7, #264 @ 0x108
800bba0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bba4: 681b ldr r3, [r3, #0]
800bba6: 781b ldrb r3, [r3, #0]
800bba8: 011a lsls r2, r3, #4
800bbaa: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800bbae: 4413 add r3, r2
800bbb0: f203 4304 addw r3, r3, #1028 @ 0x404
800bbb4: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
800bbb8: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bbbc: 881b ldrh r3, [r3, #0]
800bbbe: b29b uxth r3, r3
800bbc0: f3c3 0309 ubfx r3, r3, #0, #10
800bbc4: b29a uxth r2, r3
800bbc6: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bbca: 801a strh r2, [r3, #0]
800bbcc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bbd0: 2b3e cmp r3, #62 @ 0x3e
800bbd2: d923 bls.n 800bc1c <USB_EPStartXfer+0x149c>
800bbd4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bbd8: 095b lsrs r3, r3, #5
800bbda: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bbde: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bbe2: f003 031f and.w r3, r3, #31
800bbe6: 2b00 cmp r3, #0
800bbe8: d104 bne.n 800bbf4 <USB_EPStartXfer+0x1474>
800bbea: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bbee: 3b01 subs r3, #1
800bbf0: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bbf4: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bbf8: 881b ldrh r3, [r3, #0]
800bbfa: b29a uxth r2, r3
800bbfc: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bc00: b29b uxth r3, r3
800bc02: 029b lsls r3, r3, #10
800bc04: b29b uxth r3, r3
800bc06: 4313 orrs r3, r2
800bc08: b29b uxth r3, r3
800bc0a: ea6f 4343 mvn.w r3, r3, lsl #17
800bc0e: ea6f 4353 mvn.w r3, r3, lsr #17
800bc12: b29a uxth r2, r3
800bc14: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bc18: 801a strh r2, [r3, #0]
800bc1a: e060 b.n 800bcde <USB_EPStartXfer+0x155e>
800bc1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bc20: 2b00 cmp r3, #0
800bc22: d10c bne.n 800bc3e <USB_EPStartXfer+0x14be>
800bc24: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bc28: 881b ldrh r3, [r3, #0]
800bc2a: b29b uxth r3, r3
800bc2c: ea6f 4343 mvn.w r3, r3, lsl #17
800bc30: ea6f 4353 mvn.w r3, r3, lsr #17
800bc34: b29a uxth r2, r3
800bc36: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bc3a: 801a strh r2, [r3, #0]
800bc3c: e04f b.n 800bcde <USB_EPStartXfer+0x155e>
800bc3e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bc42: 085b lsrs r3, r3, #1
800bc44: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bc48: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bc4c: f003 0301 and.w r3, r3, #1
800bc50: 2b00 cmp r3, #0
800bc52: d004 beq.n 800bc5e <USB_EPStartXfer+0x14de>
800bc54: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bc58: 3301 adds r3, #1
800bc5a: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bc5e: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bc62: 881b ldrh r3, [r3, #0]
800bc64: b29a uxth r2, r3
800bc66: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bc6a: b29b uxth r3, r3
800bc6c: 029b lsls r3, r3, #10
800bc6e: b29b uxth r3, r3
800bc70: 4313 orrs r3, r2
800bc72: b29a uxth r2, r3
800bc74: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bc78: 801a strh r2, [r3, #0]
800bc7a: e030 b.n 800bcde <USB_EPStartXfer+0x155e>
800bc7c: f507 7384 add.w r3, r7, #264 @ 0x108
800bc80: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc84: 681b ldr r3, [r3, #0]
800bc86: 785b ldrb r3, [r3, #1]
800bc88: 2b01 cmp r3, #1
800bc8a: d128 bne.n 800bcde <USB_EPStartXfer+0x155e>
800bc8c: f507 7384 add.w r3, r7, #264 @ 0x108
800bc90: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bc94: 681b ldr r3, [r3, #0]
800bc96: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800bc9a: f507 7384 add.w r3, r7, #264 @ 0x108
800bc9e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bca2: 681b ldr r3, [r3, #0]
800bca4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bca8: b29b uxth r3, r3
800bcaa: 461a mov r2, r3
800bcac: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800bcb0: 4413 add r3, r2
800bcb2: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800bcb6: f507 7384 add.w r3, r7, #264 @ 0x108
800bcba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bcbe: 681b ldr r3, [r3, #0]
800bcc0: 781b ldrb r3, [r3, #0]
800bcc2: 011a lsls r2, r3, #4
800bcc4: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800bcc8: 4413 add r3, r2
800bcca: f203 4304 addw r3, r3, #1028 @ 0x404
800bcce: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800bcd2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bcd6: b29a uxth r2, r3
800bcd8: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
800bcdc: 801a strh r2, [r3, #0]
800bcde: f507 7384 add.w r3, r7, #264 @ 0x108
800bce2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bce6: 681b ldr r3, [r3, #0]
800bce8: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800bcec: f507 7384 add.w r3, r7, #264 @ 0x108
800bcf0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bcf4: 681b ldr r3, [r3, #0]
800bcf6: 785b ldrb r3, [r3, #1]
800bcf8: 2b00 cmp r3, #0
800bcfa: f040 8085 bne.w 800be08 <USB_EPStartXfer+0x1688>
800bcfe: f507 7384 add.w r3, r7, #264 @ 0x108
800bd02: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bd06: 681b ldr r3, [r3, #0]
800bd08: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800bd0c: f507 7384 add.w r3, r7, #264 @ 0x108
800bd10: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bd14: 681b ldr r3, [r3, #0]
800bd16: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bd1a: b29b uxth r3, r3
800bd1c: 461a mov r2, r3
800bd1e: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800bd22: 4413 add r3, r2
800bd24: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800bd28: f507 7384 add.w r3, r7, #264 @ 0x108
800bd2c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bd30: 681b ldr r3, [r3, #0]
800bd32: 781b ldrb r3, [r3, #0]
800bd34: 011a lsls r2, r3, #4
800bd36: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800bd3a: 4413 add r3, r2
800bd3c: f203 430c addw r3, r3, #1036 @ 0x40c
800bd40: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
800bd44: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bd48: 881b ldrh r3, [r3, #0]
800bd4a: b29b uxth r3, r3
800bd4c: f3c3 0309 ubfx r3, r3, #0, #10
800bd50: b29a uxth r2, r3
800bd52: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bd56: 801a strh r2, [r3, #0]
800bd58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd5c: 2b3e cmp r3, #62 @ 0x3e
800bd5e: d923 bls.n 800bda8 <USB_EPStartXfer+0x1628>
800bd60: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd64: 095b lsrs r3, r3, #5
800bd66: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bd6a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd6e: f003 031f and.w r3, r3, #31
800bd72: 2b00 cmp r3, #0
800bd74: d104 bne.n 800bd80 <USB_EPStartXfer+0x1600>
800bd76: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bd7a: 3b01 subs r3, #1
800bd7c: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bd80: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bd84: 881b ldrh r3, [r3, #0]
800bd86: b29a uxth r2, r3
800bd88: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bd8c: b29b uxth r3, r3
800bd8e: 029b lsls r3, r3, #10
800bd90: b29b uxth r3, r3
800bd92: 4313 orrs r3, r2
800bd94: b29b uxth r3, r3
800bd96: ea6f 4343 mvn.w r3, r3, lsl #17
800bd9a: ea6f 4353 mvn.w r3, r3, lsr #17
800bd9e: b29a uxth r2, r3
800bda0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bda4: 801a strh r2, [r3, #0]
800bda6: e05c b.n 800be62 <USB_EPStartXfer+0x16e2>
800bda8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bdac: 2b00 cmp r3, #0
800bdae: d10c bne.n 800bdca <USB_EPStartXfer+0x164a>
800bdb0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bdb4: 881b ldrh r3, [r3, #0]
800bdb6: b29b uxth r3, r3
800bdb8: ea6f 4343 mvn.w r3, r3, lsl #17
800bdbc: ea6f 4353 mvn.w r3, r3, lsr #17
800bdc0: b29a uxth r2, r3
800bdc2: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bdc6: 801a strh r2, [r3, #0]
800bdc8: e04b b.n 800be62 <USB_EPStartXfer+0x16e2>
800bdca: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bdce: 085b lsrs r3, r3, #1
800bdd0: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bdd4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bdd8: f003 0301 and.w r3, r3, #1
800bddc: 2b00 cmp r3, #0
800bdde: d004 beq.n 800bdea <USB_EPStartXfer+0x166a>
800bde0: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bde4: 3301 adds r3, #1
800bde6: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bdea: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bdee: 881b ldrh r3, [r3, #0]
800bdf0: b29a uxth r2, r3
800bdf2: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bdf6: b29b uxth r3, r3
800bdf8: 029b lsls r3, r3, #10
800bdfa: b29b uxth r3, r3
800bdfc: 4313 orrs r3, r2
800bdfe: b29a uxth r2, r3
800be00: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800be04: 801a strh r2, [r3, #0]
800be06: e02c b.n 800be62 <USB_EPStartXfer+0x16e2>
800be08: f507 7384 add.w r3, r7, #264 @ 0x108
800be0c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800be10: 681b ldr r3, [r3, #0]
800be12: 785b ldrb r3, [r3, #1]
800be14: 2b01 cmp r3, #1
800be16: d124 bne.n 800be62 <USB_EPStartXfer+0x16e2>
800be18: f507 7384 add.w r3, r7, #264 @ 0x108
800be1c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800be20: 681b ldr r3, [r3, #0]
800be22: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800be26: b29b uxth r3, r3
800be28: 461a mov r2, r3
800be2a: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800be2e: 4413 add r3, r2
800be30: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800be34: f507 7384 add.w r3, r7, #264 @ 0x108
800be38: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800be3c: 681b ldr r3, [r3, #0]
800be3e: 781b ldrb r3, [r3, #0]
800be40: 011a lsls r2, r3, #4
800be42: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800be46: 4413 add r3, r2
800be48: f203 430c addw r3, r3, #1036 @ 0x40c
800be4c: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800be50: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800be54: b29a uxth r2, r3
800be56: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800be5a: 801a strh r2, [r3, #0]
800be5c: e001 b.n 800be62 <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
800be5e: 2301 movs r3, #1
800be60: e03a b.n 800bed8 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800be62: f507 7384 add.w r3, r7, #264 @ 0x108
800be66: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800be6a: 681a ldr r2, [r3, #0]
800be6c: f507 7384 add.w r3, r7, #264 @ 0x108
800be70: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800be74: 681b ldr r3, [r3, #0]
800be76: 781b ldrb r3, [r3, #0]
800be78: 009b lsls r3, r3, #2
800be7a: 4413 add r3, r2
800be7c: 881b ldrh r3, [r3, #0]
800be7e: b29b uxth r3, r3
800be80: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800be84: f023 0370 bic.w r3, r3, #112 @ 0x70
800be88: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800be8c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800be90: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800be94: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800be98: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800be9c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800bea0: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800bea4: f507 7384 add.w r3, r7, #264 @ 0x108
800bea8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800beac: 681a ldr r2, [r3, #0]
800beae: f507 7384 add.w r3, r7, #264 @ 0x108
800beb2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800beb6: 681b ldr r3, [r3, #0]
800beb8: 781b ldrb r3, [r3, #0]
800beba: 009b lsls r3, r3, #2
800bebc: 441a add r2, r3
800bebe: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800bec2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bec6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800beca: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bece: f043 0380 orr.w r3, r3, #128 @ 0x80
800bed2: b29b uxth r3, r3
800bed4: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800bed6: 2300 movs r3, #0
}
800bed8: 4618 mov r0, r3
800beda: f507 7784 add.w r7, r7, #264 @ 0x108
800bede: 46bd mov sp, r7
800bee0: bd80 pop {r7, pc}
0800bee2 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800bee2: b480 push {r7}
800bee4: b085 sub sp, #20
800bee6: af00 add r7, sp, #0
800bee8: 6078 str r0, [r7, #4]
800beea: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
800beec: 683b ldr r3, [r7, #0]
800beee: 785b ldrb r3, [r3, #1]
800bef0: 2b00 cmp r3, #0
800bef2: d020 beq.n 800bf36 <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
800bef4: 687a ldr r2, [r7, #4]
800bef6: 683b ldr r3, [r7, #0]
800bef8: 781b ldrb r3, [r3, #0]
800befa: 009b lsls r3, r3, #2
800befc: 4413 add r3, r2
800befe: 881b ldrh r3, [r3, #0]
800bf00: b29b uxth r3, r3
800bf02: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800bf06: f023 0340 bic.w r3, r3, #64 @ 0x40
800bf0a: 81bb strh r3, [r7, #12]
800bf0c: 89bb ldrh r3, [r7, #12]
800bf0e: f083 0310 eor.w r3, r3, #16
800bf12: 81bb strh r3, [r7, #12]
800bf14: 687a ldr r2, [r7, #4]
800bf16: 683b ldr r3, [r7, #0]
800bf18: 781b ldrb r3, [r3, #0]
800bf1a: 009b lsls r3, r3, #2
800bf1c: 441a add r2, r3
800bf1e: 89bb ldrh r3, [r7, #12]
800bf20: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bf24: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bf28: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bf2c: f043 0380 orr.w r3, r3, #128 @ 0x80
800bf30: b29b uxth r3, r3
800bf32: 8013 strh r3, [r2, #0]
800bf34: e01f b.n 800bf76 <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800bf36: 687a ldr r2, [r7, #4]
800bf38: 683b ldr r3, [r7, #0]
800bf3a: 781b ldrb r3, [r3, #0]
800bf3c: 009b lsls r3, r3, #2
800bf3e: 4413 add r3, r2
800bf40: 881b ldrh r3, [r3, #0]
800bf42: b29b uxth r3, r3
800bf44: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800bf48: f023 0370 bic.w r3, r3, #112 @ 0x70
800bf4c: 81fb strh r3, [r7, #14]
800bf4e: 89fb ldrh r3, [r7, #14]
800bf50: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800bf54: 81fb strh r3, [r7, #14]
800bf56: 687a ldr r2, [r7, #4]
800bf58: 683b ldr r3, [r7, #0]
800bf5a: 781b ldrb r3, [r3, #0]
800bf5c: 009b lsls r3, r3, #2
800bf5e: 441a add r2, r3
800bf60: 89fb ldrh r3, [r7, #14]
800bf62: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bf66: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bf6a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bf6e: f043 0380 orr.w r3, r3, #128 @ 0x80
800bf72: b29b uxth r3, r3
800bf74: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800bf76: 2300 movs r3, #0
}
800bf78: 4618 mov r0, r3
800bf7a: 3714 adds r7, #20
800bf7c: 46bd mov sp, r7
800bf7e: bc80 pop {r7}
800bf80: 4770 bx lr
0800bf82 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800bf82: b480 push {r7}
800bf84: b087 sub sp, #28
800bf86: af00 add r7, sp, #0
800bf88: 6078 str r0, [r7, #4]
800bf8a: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800bf8c: 683b ldr r3, [r7, #0]
800bf8e: 7b1b ldrb r3, [r3, #12]
800bf90: 2b00 cmp r3, #0
800bf92: f040 809d bne.w 800c0d0 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800bf96: 683b ldr r3, [r7, #0]
800bf98: 785b ldrb r3, [r3, #1]
800bf9a: 2b00 cmp r3, #0
800bf9c: d04c beq.n 800c038 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800bf9e: 687a ldr r2, [r7, #4]
800bfa0: 683b ldr r3, [r7, #0]
800bfa2: 781b ldrb r3, [r3, #0]
800bfa4: 009b lsls r3, r3, #2
800bfa6: 4413 add r3, r2
800bfa8: 881b ldrh r3, [r3, #0]
800bfaa: 823b strh r3, [r7, #16]
800bfac: 8a3b ldrh r3, [r7, #16]
800bfae: f003 0340 and.w r3, r3, #64 @ 0x40
800bfb2: 2b00 cmp r3, #0
800bfb4: d01b beq.n 800bfee <USB_EPClearStall+0x6c>
800bfb6: 687a ldr r2, [r7, #4]
800bfb8: 683b ldr r3, [r7, #0]
800bfba: 781b ldrb r3, [r3, #0]
800bfbc: 009b lsls r3, r3, #2
800bfbe: 4413 add r3, r2
800bfc0: 881b ldrh r3, [r3, #0]
800bfc2: b29b uxth r3, r3
800bfc4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800bfc8: f023 0370 bic.w r3, r3, #112 @ 0x70
800bfcc: 81fb strh r3, [r7, #14]
800bfce: 687a ldr r2, [r7, #4]
800bfd0: 683b ldr r3, [r7, #0]
800bfd2: 781b ldrb r3, [r3, #0]
800bfd4: 009b lsls r3, r3, #2
800bfd6: 441a add r2, r3
800bfd8: 89fb ldrh r3, [r7, #14]
800bfda: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bfde: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bfe2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bfe6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800bfea: b29b uxth r3, r3
800bfec: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800bfee: 683b ldr r3, [r7, #0]
800bff0: 78db ldrb r3, [r3, #3]
800bff2: 2b01 cmp r3, #1
800bff4: d06c beq.n 800c0d0 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800bff6: 687a ldr r2, [r7, #4]
800bff8: 683b ldr r3, [r7, #0]
800bffa: 781b ldrb r3, [r3, #0]
800bffc: 009b lsls r3, r3, #2
800bffe: 4413 add r3, r2
800c000: 881b ldrh r3, [r3, #0]
800c002: b29b uxth r3, r3
800c004: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800c008: f023 0340 bic.w r3, r3, #64 @ 0x40
800c00c: 81bb strh r3, [r7, #12]
800c00e: 89bb ldrh r3, [r7, #12]
800c010: f083 0320 eor.w r3, r3, #32
800c014: 81bb strh r3, [r7, #12]
800c016: 687a ldr r2, [r7, #4]
800c018: 683b ldr r3, [r7, #0]
800c01a: 781b ldrb r3, [r3, #0]
800c01c: 009b lsls r3, r3, #2
800c01e: 441a add r2, r3
800c020: 89bb ldrh r3, [r7, #12]
800c022: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c026: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c02a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c02e: f043 0380 orr.w r3, r3, #128 @ 0x80
800c032: b29b uxth r3, r3
800c034: 8013 strh r3, [r2, #0]
800c036: e04b b.n 800c0d0 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800c038: 687a ldr r2, [r7, #4]
800c03a: 683b ldr r3, [r7, #0]
800c03c: 781b ldrb r3, [r3, #0]
800c03e: 009b lsls r3, r3, #2
800c040: 4413 add r3, r2
800c042: 881b ldrh r3, [r3, #0]
800c044: 82fb strh r3, [r7, #22]
800c046: 8afb ldrh r3, [r7, #22]
800c048: f403 4380 and.w r3, r3, #16384 @ 0x4000
800c04c: 2b00 cmp r3, #0
800c04e: d01b beq.n 800c088 <USB_EPClearStall+0x106>
800c050: 687a ldr r2, [r7, #4]
800c052: 683b ldr r3, [r7, #0]
800c054: 781b ldrb r3, [r3, #0]
800c056: 009b lsls r3, r3, #2
800c058: 4413 add r3, r2
800c05a: 881b ldrh r3, [r3, #0]
800c05c: b29b uxth r3, r3
800c05e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800c062: f023 0370 bic.w r3, r3, #112 @ 0x70
800c066: 82bb strh r3, [r7, #20]
800c068: 687a ldr r2, [r7, #4]
800c06a: 683b ldr r3, [r7, #0]
800c06c: 781b ldrb r3, [r3, #0]
800c06e: 009b lsls r3, r3, #2
800c070: 441a add r2, r3
800c072: 8abb ldrh r3, [r7, #20]
800c074: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c078: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c07c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800c080: f043 0380 orr.w r3, r3, #128 @ 0x80
800c084: b29b uxth r3, r3
800c086: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800c088: 687a ldr r2, [r7, #4]
800c08a: 683b ldr r3, [r7, #0]
800c08c: 781b ldrb r3, [r3, #0]
800c08e: 009b lsls r3, r3, #2
800c090: 4413 add r3, r2
800c092: 881b ldrh r3, [r3, #0]
800c094: b29b uxth r3, r3
800c096: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800c09a: f023 0370 bic.w r3, r3, #112 @ 0x70
800c09e: 827b strh r3, [r7, #18]
800c0a0: 8a7b ldrh r3, [r7, #18]
800c0a2: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800c0a6: 827b strh r3, [r7, #18]
800c0a8: 8a7b ldrh r3, [r7, #18]
800c0aa: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800c0ae: 827b strh r3, [r7, #18]
800c0b0: 687a ldr r2, [r7, #4]
800c0b2: 683b ldr r3, [r7, #0]
800c0b4: 781b ldrb r3, [r3, #0]
800c0b6: 009b lsls r3, r3, #2
800c0b8: 441a add r2, r3
800c0ba: 8a7b ldrh r3, [r7, #18]
800c0bc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c0c0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c0c4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c0c8: f043 0380 orr.w r3, r3, #128 @ 0x80
800c0cc: b29b uxth r3, r3
800c0ce: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800c0d0: 2300 movs r3, #0
}
800c0d2: 4618 mov r0, r3
800c0d4: 371c adds r7, #28
800c0d6: 46bd mov sp, r7
800c0d8: bc80 pop {r7}
800c0da: 4770 bx lr
0800c0dc <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
800c0dc: b480 push {r7}
800c0de: b083 sub sp, #12
800c0e0: af00 add r7, sp, #0
800c0e2: 6078 str r0, [r7, #4]
800c0e4: 460b mov r3, r1
800c0e6: 70fb strb r3, [r7, #3]
if (address == 0U)
800c0e8: 78fb ldrb r3, [r7, #3]
800c0ea: 2b00 cmp r3, #0
800c0ec: d103 bne.n 800c0f6 <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800c0ee: 687b ldr r3, [r7, #4]
800c0f0: 2280 movs r2, #128 @ 0x80
800c0f2: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
800c0f6: 2300 movs r3, #0
}
800c0f8: 4618 mov r0, r3
800c0fa: 370c adds r7, #12
800c0fc: 46bd mov sp, r7
800c0fe: bc80 pop {r7}
800c100: 4770 bx lr
0800c102 <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
800c102: b480 push {r7}
800c104: b083 sub sp, #12
800c106: af00 add r7, sp, #0
800c108: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c10a: 2300 movs r3, #0
}
800c10c: 4618 mov r0, r3
800c10e: 370c adds r7, #12
800c110: 46bd mov sp, r7
800c112: bc80 pop {r7}
800c114: 4770 bx lr
0800c116 <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800c116: b480 push {r7}
800c118: b083 sub sp, #12
800c11a: af00 add r7, sp, #0
800c11c: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c11e: 2300 movs r3, #0
}
800c120: 4618 mov r0, r3
800c122: 370c adds r7, #12
800c124: 46bd mov sp, r7
800c126: bc80 pop {r7}
800c128: 4770 bx lr
0800c12a <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
800c12a: b480 push {r7}
800c12c: b085 sub sp, #20
800c12e: af00 add r7, sp, #0
800c130: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
800c132: 687b ldr r3, [r7, #4]
800c134: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800c138: b29b uxth r3, r3
800c13a: 60fb str r3, [r7, #12]
return tmpreg;
800c13c: 68fb ldr r3, [r7, #12]
}
800c13e: 4618 mov r0, r3
800c140: 3714 adds r7, #20
800c142: 46bd mov sp, r7
800c144: bc80 pop {r7}
800c146: 4770 bx lr
0800c148 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
800c148: b480 push {r7}
800c14a: b083 sub sp, #12
800c14c: af00 add r7, sp, #0
800c14e: 6078 str r0, [r7, #4]
800c150: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c152: 2300 movs r3, #0
}
800c154: 4618 mov r0, r3
800c156: 370c adds r7, #12
800c158: 46bd mov sp, r7
800c15a: bc80 pop {r7}
800c15c: 4770 bx lr
0800c15e <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800c15e: b480 push {r7}
800c160: b08b sub sp, #44 @ 0x2c
800c162: af00 add r7, sp, #0
800c164: 60f8 str r0, [r7, #12]
800c166: 60b9 str r1, [r7, #8]
800c168: 4611 mov r1, r2
800c16a: 461a mov r2, r3
800c16c: 460b mov r3, r1
800c16e: 80fb strh r3, [r7, #6]
800c170: 4613 mov r3, r2
800c172: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
800c174: 88bb ldrh r3, [r7, #4]
800c176: 3301 adds r3, #1
800c178: 085b lsrs r3, r3, #1
800c17a: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800c17c: 68fb ldr r3, [r7, #12]
800c17e: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800c180: 68bb ldr r3, [r7, #8]
800c182: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800c184: 88fb ldrh r3, [r7, #6]
800c186: 005a lsls r2, r3, #1
800c188: 697b ldr r3, [r7, #20]
800c18a: 4413 add r3, r2
800c18c: f503 6380 add.w r3, r3, #1024 @ 0x400
800c190: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c192: 69bb ldr r3, [r7, #24]
800c194: 627b str r3, [r7, #36] @ 0x24
800c196: e01f b.n 800c1d8 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
800c198: 69fb ldr r3, [r7, #28]
800c19a: 781b ldrb r3, [r3, #0]
800c19c: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
800c19e: 69fb ldr r3, [r7, #28]
800c1a0: 3301 adds r3, #1
800c1a2: 781b ldrb r3, [r3, #0]
800c1a4: b21b sxth r3, r3
800c1a6: 021b lsls r3, r3, #8
800c1a8: b21a sxth r2, r3
800c1aa: f9b7 3012 ldrsh.w r3, [r7, #18]
800c1ae: 4313 orrs r3, r2
800c1b0: b21b sxth r3, r3
800c1b2: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
800c1b4: 6a3b ldr r3, [r7, #32]
800c1b6: 8a7a ldrh r2, [r7, #18]
800c1b8: 801a strh r2, [r3, #0]
pdwVal++;
800c1ba: 6a3b ldr r3, [r7, #32]
800c1bc: 3302 adds r3, #2
800c1be: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
800c1c0: 6a3b ldr r3, [r7, #32]
800c1c2: 3302 adds r3, #2
800c1c4: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
800c1c6: 69fb ldr r3, [r7, #28]
800c1c8: 3301 adds r3, #1
800c1ca: 61fb str r3, [r7, #28]
pBuf++;
800c1cc: 69fb ldr r3, [r7, #28]
800c1ce: 3301 adds r3, #1
800c1d0: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
800c1d2: 6a7b ldr r3, [r7, #36] @ 0x24
800c1d4: 3b01 subs r3, #1
800c1d6: 627b str r3, [r7, #36] @ 0x24
800c1d8: 6a7b ldr r3, [r7, #36] @ 0x24
800c1da: 2b00 cmp r3, #0
800c1dc: d1dc bne.n 800c198 <USB_WritePMA+0x3a>
}
}
800c1de: bf00 nop
800c1e0: bf00 nop
800c1e2: 372c adds r7, #44 @ 0x2c
800c1e4: 46bd mov sp, r7
800c1e6: bc80 pop {r7}
800c1e8: 4770 bx lr
0800c1ea <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800c1ea: b480 push {r7}
800c1ec: b08b sub sp, #44 @ 0x2c
800c1ee: af00 add r7, sp, #0
800c1f0: 60f8 str r0, [r7, #12]
800c1f2: 60b9 str r1, [r7, #8]
800c1f4: 4611 mov r1, r2
800c1f6: 461a mov r2, r3
800c1f8: 460b mov r3, r1
800c1fa: 80fb strh r3, [r7, #6]
800c1fc: 4613 mov r3, r2
800c1fe: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
800c200: 88bb ldrh r3, [r7, #4]
800c202: 085b lsrs r3, r3, #1
800c204: b29b uxth r3, r3
800c206: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800c208: 68fb ldr r3, [r7, #12]
800c20a: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800c20c: 68bb ldr r3, [r7, #8]
800c20e: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800c210: 88fb ldrh r3, [r7, #6]
800c212: 005a lsls r2, r3, #1
800c214: 697b ldr r3, [r7, #20]
800c216: 4413 add r3, r2
800c218: f503 6380 add.w r3, r3, #1024 @ 0x400
800c21c: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c21e: 69bb ldr r3, [r7, #24]
800c220: 627b str r3, [r7, #36] @ 0x24
800c222: e01b b.n 800c25c <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
800c224: 6a3b ldr r3, [r7, #32]
800c226: 881b ldrh r3, [r3, #0]
800c228: b29b uxth r3, r3
800c22a: 613b str r3, [r7, #16]
pdwVal++;
800c22c: 6a3b ldr r3, [r7, #32]
800c22e: 3302 adds r3, #2
800c230: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800c232: 693b ldr r3, [r7, #16]
800c234: b2da uxtb r2, r3
800c236: 69fb ldr r3, [r7, #28]
800c238: 701a strb r2, [r3, #0]
pBuf++;
800c23a: 69fb ldr r3, [r7, #28]
800c23c: 3301 adds r3, #1
800c23e: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
800c240: 693b ldr r3, [r7, #16]
800c242: 0a1b lsrs r3, r3, #8
800c244: b2da uxtb r2, r3
800c246: 69fb ldr r3, [r7, #28]
800c248: 701a strb r2, [r3, #0]
pBuf++;
800c24a: 69fb ldr r3, [r7, #28]
800c24c: 3301 adds r3, #1
800c24e: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
800c250: 6a3b ldr r3, [r7, #32]
800c252: 3302 adds r3, #2
800c254: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c256: 6a7b ldr r3, [r7, #36] @ 0x24
800c258: 3b01 subs r3, #1
800c25a: 627b str r3, [r7, #36] @ 0x24
800c25c: 6a7b ldr r3, [r7, #36] @ 0x24
800c25e: 2b00 cmp r3, #0
800c260: d1e0 bne.n 800c224 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
800c262: 88bb ldrh r3, [r7, #4]
800c264: f003 0301 and.w r3, r3, #1
800c268: b29b uxth r3, r3
800c26a: 2b00 cmp r3, #0
800c26c: d007 beq.n 800c27e <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
800c26e: 6a3b ldr r3, [r7, #32]
800c270: 881b ldrh r3, [r3, #0]
800c272: b29b uxth r3, r3
800c274: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800c276: 693b ldr r3, [r7, #16]
800c278: b2da uxtb r2, r3
800c27a: 69fb ldr r3, [r7, #28]
800c27c: 701a strb r2, [r3, #0]
}
}
800c27e: bf00 nop
800c280: 372c adds r7, #44 @ 0x2c
800c282: 46bd mov sp, r7
800c284: bc80 pop {r7}
800c286: 4770 bx lr
0800c288 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c288: b580 push {r7, lr}
800c28a: b084 sub sp, #16
800c28c: af00 add r7, sp, #0
800c28e: 6078 str r0, [r7, #4]
800c290: 460b mov r3, r1
800c292: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800c294: 2300 movs r3, #0
800c296: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c298: 687b ldr r3, [r7, #4]
800c29a: 7c1b ldrb r3, [r3, #16]
800c29c: 2b00 cmp r3, #0
800c29e: d115 bne.n 800c2cc <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800c2a0: f44f 7300 mov.w r3, #512 @ 0x200
800c2a4: 2202 movs r2, #2
800c2a6: 2181 movs r1, #129 @ 0x81
800c2a8: 6878 ldr r0, [r7, #4]
800c2aa: f001 ff00 bl 800e0ae <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800c2ae: 687b ldr r3, [r7, #4]
800c2b0: 2201 movs r2, #1
800c2b2: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800c2b4: f44f 7300 mov.w r3, #512 @ 0x200
800c2b8: 2202 movs r2, #2
800c2ba: 2101 movs r1, #1
800c2bc: 6878 ldr r0, [r7, #4]
800c2be: f001 fef6 bl 800e0ae <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800c2c2: 687b ldr r3, [r7, #4]
800c2c4: 2201 movs r2, #1
800c2c6: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800c2ca: e012 b.n 800c2f2 <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800c2cc: 2340 movs r3, #64 @ 0x40
800c2ce: 2202 movs r2, #2
800c2d0: 2181 movs r1, #129 @ 0x81
800c2d2: 6878 ldr r0, [r7, #4]
800c2d4: f001 feeb bl 800e0ae <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800c2d8: 687b ldr r3, [r7, #4]
800c2da: 2201 movs r2, #1
800c2dc: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800c2de: 2340 movs r3, #64 @ 0x40
800c2e0: 2202 movs r2, #2
800c2e2: 2101 movs r1, #1
800c2e4: 6878 ldr r0, [r7, #4]
800c2e6: f001 fee2 bl 800e0ae <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800c2ea: 687b ldr r3, [r7, #4]
800c2ec: 2201 movs r2, #1
800c2ee: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
800c2f2: 2308 movs r3, #8
800c2f4: 2203 movs r2, #3
800c2f6: 2182 movs r1, #130 @ 0x82
800c2f8: 6878 ldr r0, [r7, #4]
800c2fa: f001 fed8 bl 800e0ae <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800c2fe: 687b ldr r3, [r7, #4]
800c300: 2201 movs r2, #1
800c302: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
800c304: f44f 7007 mov.w r0, #540 @ 0x21c
800c308: f001 fff8 bl 800e2fc <USBD_static_malloc>
800c30c: 4602 mov r2, r0
800c30e: 687b ldr r3, [r7, #4]
800c310: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
800c314: 687b ldr r3, [r7, #4]
800c316: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c31a: 2b00 cmp r3, #0
800c31c: d102 bne.n 800c324 <USBD_CDC_Init+0x9c>
{
ret = 1U;
800c31e: 2301 movs r3, #1
800c320: 73fb strb r3, [r7, #15]
800c322: e026 b.n 800c372 <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c324: 687b ldr r3, [r7, #4]
800c326: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c32a: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
800c32c: 687b ldr r3, [r7, #4]
800c32e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c332: 681b ldr r3, [r3, #0]
800c334: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800c336: 68bb ldr r3, [r7, #8]
800c338: 2200 movs r2, #0
800c33a: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
800c33e: 68bb ldr r3, [r7, #8]
800c340: 2200 movs r2, #0
800c342: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c346: 687b ldr r3, [r7, #4]
800c348: 7c1b ldrb r3, [r3, #16]
800c34a: 2b00 cmp r3, #0
800c34c: d109 bne.n 800c362 <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800c34e: 68bb ldr r3, [r7, #8]
800c350: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c354: f44f 7300 mov.w r3, #512 @ 0x200
800c358: 2101 movs r1, #1
800c35a: 6878 ldr r0, [r7, #4]
800c35c: f001 ff97 bl 800e28e <USBD_LL_PrepareReceive>
800c360: e007 b.n 800c372 <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800c362: 68bb ldr r3, [r7, #8]
800c364: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c368: 2340 movs r3, #64 @ 0x40
800c36a: 2101 movs r1, #1
800c36c: 6878 ldr r0, [r7, #4]
800c36e: f001 ff8e bl 800e28e <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
800c372: 7bfb ldrb r3, [r7, #15]
}
800c374: 4618 mov r0, r3
800c376: 3710 adds r7, #16
800c378: 46bd mov sp, r7
800c37a: bd80 pop {r7, pc}
0800c37c <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c37c: b580 push {r7, lr}
800c37e: b084 sub sp, #16
800c380: af00 add r7, sp, #0
800c382: 6078 str r0, [r7, #4]
800c384: 460b mov r3, r1
800c386: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800c388: 2300 movs r3, #0
800c38a: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
800c38c: 2181 movs r1, #129 @ 0x81
800c38e: 6878 ldr r0, [r7, #4]
800c390: f001 feb3 bl 800e0fa <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
800c394: 687b ldr r3, [r7, #4]
800c396: 2200 movs r2, #0
800c398: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
800c39a: 2101 movs r1, #1
800c39c: 6878 ldr r0, [r7, #4]
800c39e: f001 feac bl 800e0fa <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
800c3a2: 687b ldr r3, [r7, #4]
800c3a4: 2200 movs r2, #0
800c3a6: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
800c3aa: 2182 movs r1, #130 @ 0x82
800c3ac: 6878 ldr r0, [r7, #4]
800c3ae: f001 fea4 bl 800e0fa <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
800c3b2: 687b ldr r3, [r7, #4]
800c3b4: 2200 movs r2, #0
800c3b6: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
800c3b8: 687b ldr r3, [r7, #4]
800c3ba: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c3be: 2b00 cmp r3, #0
800c3c0: d00e beq.n 800c3e0 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
800c3c2: 687b ldr r3, [r7, #4]
800c3c4: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c3c8: 685b ldr r3, [r3, #4]
800c3ca: 4798 blx r3
USBD_free(pdev->pClassData);
800c3cc: 687b ldr r3, [r7, #4]
800c3ce: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c3d2: 4618 mov r0, r3
800c3d4: f001 ff9e bl 800e314 <USBD_static_free>
pdev->pClassData = NULL;
800c3d8: 687b ldr r3, [r7, #4]
800c3da: 2200 movs r2, #0
800c3dc: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
800c3e0: 7bfb ldrb r3, [r7, #15]
}
800c3e2: 4618 mov r0, r3
800c3e4: 3710 adds r7, #16
800c3e6: 46bd mov sp, r7
800c3e8: bd80 pop {r7, pc}
0800c3ea <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c3ea: b580 push {r7, lr}
800c3ec: b086 sub sp, #24
800c3ee: af00 add r7, sp, #0
800c3f0: 6078 str r0, [r7, #4]
800c3f2: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c3f4: 687b ldr r3, [r7, #4]
800c3f6: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c3fa: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
800c3fc: 2300 movs r3, #0
800c3fe: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
800c400: 2300 movs r3, #0
800c402: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
800c404: 2300 movs r3, #0
800c406: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c408: 683b ldr r3, [r7, #0]
800c40a: 781b ldrb r3, [r3, #0]
800c40c: f003 0360 and.w r3, r3, #96 @ 0x60
800c410: 2b00 cmp r3, #0
800c412: d039 beq.n 800c488 <USBD_CDC_Setup+0x9e>
800c414: 2b20 cmp r3, #32
800c416: d17f bne.n 800c518 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
800c418: 683b ldr r3, [r7, #0]
800c41a: 88db ldrh r3, [r3, #6]
800c41c: 2b00 cmp r3, #0
800c41e: d029 beq.n 800c474 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
800c420: 683b ldr r3, [r7, #0]
800c422: 781b ldrb r3, [r3, #0]
800c424: b25b sxtb r3, r3
800c426: 2b00 cmp r3, #0
800c428: da11 bge.n 800c44e <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c42a: 687b ldr r3, [r7, #4]
800c42c: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c430: 689b ldr r3, [r3, #8]
800c432: 683a ldr r2, [r7, #0]
800c434: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800c436: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c438: 683a ldr r2, [r7, #0]
800c43a: 88d2 ldrh r2, [r2, #6]
800c43c: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800c43e: 6939 ldr r1, [r7, #16]
800c440: 683b ldr r3, [r7, #0]
800c442: 88db ldrh r3, [r3, #6]
800c444: 461a mov r2, r3
800c446: 6878 ldr r0, [r7, #4]
800c448: f001 fa06 bl 800d858 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
800c44c: e06b b.n 800c526 <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
800c44e: 683b ldr r3, [r7, #0]
800c450: 785a ldrb r2, [r3, #1]
800c452: 693b ldr r3, [r7, #16]
800c454: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
800c458: 683b ldr r3, [r7, #0]
800c45a: 88db ldrh r3, [r3, #6]
800c45c: b2da uxtb r2, r3
800c45e: 693b ldr r3, [r7, #16]
800c460: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800c464: 6939 ldr r1, [r7, #16]
800c466: 683b ldr r3, [r7, #0]
800c468: 88db ldrh r3, [r3, #6]
800c46a: 461a mov r2, r3
800c46c: 6878 ldr r0, [r7, #4]
800c46e: f001 fa21 bl 800d8b4 <USBD_CtlPrepareRx>
break;
800c472: e058 b.n 800c526 <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c474: 687b ldr r3, [r7, #4]
800c476: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c47a: 689b ldr r3, [r3, #8]
800c47c: 683a ldr r2, [r7, #0]
800c47e: 7850 ldrb r0, [r2, #1]
800c480: 2200 movs r2, #0
800c482: 6839 ldr r1, [r7, #0]
800c484: 4798 blx r3
break;
800c486: e04e b.n 800c526 <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800c488: 683b ldr r3, [r7, #0]
800c48a: 785b ldrb r3, [r3, #1]
800c48c: 2b0b cmp r3, #11
800c48e: d02e beq.n 800c4ee <USBD_CDC_Setup+0x104>
800c490: 2b0b cmp r3, #11
800c492: dc38 bgt.n 800c506 <USBD_CDC_Setup+0x11c>
800c494: 2b00 cmp r3, #0
800c496: d002 beq.n 800c49e <USBD_CDC_Setup+0xb4>
800c498: 2b0a cmp r3, #10
800c49a: d014 beq.n 800c4c6 <USBD_CDC_Setup+0xdc>
800c49c: e033 b.n 800c506 <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c49e: 687b ldr r3, [r7, #4]
800c4a0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c4a4: 2b03 cmp r3, #3
800c4a6: d107 bne.n 800c4b8 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
800c4a8: f107 030c add.w r3, r7, #12
800c4ac: 2202 movs r2, #2
800c4ae: 4619 mov r1, r3
800c4b0: 6878 ldr r0, [r7, #4]
800c4b2: f001 f9d1 bl 800d858 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800c4b6: e02e b.n 800c516 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800c4b8: 6839 ldr r1, [r7, #0]
800c4ba: 6878 ldr r0, [r7, #4]
800c4bc: f001 f962 bl 800d784 <USBD_CtlError>
ret = USBD_FAIL;
800c4c0: 2302 movs r3, #2
800c4c2: 75fb strb r3, [r7, #23]
break;
800c4c4: e027 b.n 800c516 <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c4c6: 687b ldr r3, [r7, #4]
800c4c8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c4cc: 2b03 cmp r3, #3
800c4ce: d107 bne.n 800c4e0 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
800c4d0: f107 030f add.w r3, r7, #15
800c4d4: 2201 movs r2, #1
800c4d6: 4619 mov r1, r3
800c4d8: 6878 ldr r0, [r7, #4]
800c4da: f001 f9bd bl 800d858 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800c4de: e01a b.n 800c516 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800c4e0: 6839 ldr r1, [r7, #0]
800c4e2: 6878 ldr r0, [r7, #4]
800c4e4: f001 f94e bl 800d784 <USBD_CtlError>
ret = USBD_FAIL;
800c4e8: 2302 movs r3, #2
800c4ea: 75fb strb r3, [r7, #23]
break;
800c4ec: e013 b.n 800c516 <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800c4ee: 687b ldr r3, [r7, #4]
800c4f0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c4f4: 2b03 cmp r3, #3
800c4f6: d00d beq.n 800c514 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
800c4f8: 6839 ldr r1, [r7, #0]
800c4fa: 6878 ldr r0, [r7, #4]
800c4fc: f001 f942 bl 800d784 <USBD_CtlError>
ret = USBD_FAIL;
800c500: 2302 movs r3, #2
800c502: 75fb strb r3, [r7, #23]
}
break;
800c504: e006 b.n 800c514 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800c506: 6839 ldr r1, [r7, #0]
800c508: 6878 ldr r0, [r7, #4]
800c50a: f001 f93b bl 800d784 <USBD_CtlError>
ret = USBD_FAIL;
800c50e: 2302 movs r3, #2
800c510: 75fb strb r3, [r7, #23]
break;
800c512: e000 b.n 800c516 <USBD_CDC_Setup+0x12c>
break;
800c514: bf00 nop
}
break;
800c516: e006 b.n 800c526 <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
800c518: 6839 ldr r1, [r7, #0]
800c51a: 6878 ldr r0, [r7, #4]
800c51c: f001 f932 bl 800d784 <USBD_CtlError>
ret = USBD_FAIL;
800c520: 2302 movs r3, #2
800c522: 75fb strb r3, [r7, #23]
break;
800c524: bf00 nop
}
return ret;
800c526: 7dfb ldrb r3, [r7, #23]
}
800c528: 4618 mov r0, r3
800c52a: 3718 adds r7, #24
800c52c: 46bd mov sp, r7
800c52e: bd80 pop {r7, pc}
0800c530 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800c530: b580 push {r7, lr}
800c532: b084 sub sp, #16
800c534: af00 add r7, sp, #0
800c536: 6078 str r0, [r7, #4]
800c538: 460b mov r3, r1
800c53a: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
800c53c: 687b ldr r3, [r7, #4]
800c53e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c542: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
800c544: 687b ldr r3, [r7, #4]
800c546: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c54a: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
800c54c: 687b ldr r3, [r7, #4]
800c54e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c552: 2b00 cmp r3, #0
800c554: d03a beq.n 800c5cc <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800c556: 78fa ldrb r2, [r7, #3]
800c558: 6879 ldr r1, [r7, #4]
800c55a: 4613 mov r3, r2
800c55c: 009b lsls r3, r3, #2
800c55e: 4413 add r3, r2
800c560: 009b lsls r3, r3, #2
800c562: 440b add r3, r1
800c564: 331c adds r3, #28
800c566: 681b ldr r3, [r3, #0]
800c568: 2b00 cmp r3, #0
800c56a: d029 beq.n 800c5c0 <USBD_CDC_DataIn+0x90>
800c56c: 78fa ldrb r2, [r7, #3]
800c56e: 6879 ldr r1, [r7, #4]
800c570: 4613 mov r3, r2
800c572: 009b lsls r3, r3, #2
800c574: 4413 add r3, r2
800c576: 009b lsls r3, r3, #2
800c578: 440b add r3, r1
800c57a: 331c adds r3, #28
800c57c: 681a ldr r2, [r3, #0]
800c57e: 78f9 ldrb r1, [r7, #3]
800c580: 68b8 ldr r0, [r7, #8]
800c582: 460b mov r3, r1
800c584: 009b lsls r3, r3, #2
800c586: 440b add r3, r1
800c588: 00db lsls r3, r3, #3
800c58a: 4403 add r3, r0
800c58c: 3320 adds r3, #32
800c58e: 681b ldr r3, [r3, #0]
800c590: fbb2 f1f3 udiv r1, r2, r3
800c594: fb01 f303 mul.w r3, r1, r3
800c598: 1ad3 subs r3, r2, r3
800c59a: 2b00 cmp r3, #0
800c59c: d110 bne.n 800c5c0 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
800c59e: 78fa ldrb r2, [r7, #3]
800c5a0: 6879 ldr r1, [r7, #4]
800c5a2: 4613 mov r3, r2
800c5a4: 009b lsls r3, r3, #2
800c5a6: 4413 add r3, r2
800c5a8: 009b lsls r3, r3, #2
800c5aa: 440b add r3, r1
800c5ac: 331c adds r3, #28
800c5ae: 2200 movs r2, #0
800c5b0: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
800c5b2: 78f9 ldrb r1, [r7, #3]
800c5b4: 2300 movs r3, #0
800c5b6: 2200 movs r2, #0
800c5b8: 6878 ldr r0, [r7, #4]
800c5ba: f001 fe45 bl 800e248 <USBD_LL_Transmit>
800c5be: e003 b.n 800c5c8 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
800c5c0: 68fb ldr r3, [r7, #12]
800c5c2: 2200 movs r2, #0
800c5c4: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
800c5c8: 2300 movs r3, #0
800c5ca: e000 b.n 800c5ce <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
800c5cc: 2302 movs r3, #2
}
}
800c5ce: 4618 mov r0, r3
800c5d0: 3710 adds r7, #16
800c5d2: 46bd mov sp, r7
800c5d4: bd80 pop {r7, pc}
0800c5d6 <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800c5d6: b580 push {r7, lr}
800c5d8: b084 sub sp, #16
800c5da: af00 add r7, sp, #0
800c5dc: 6078 str r0, [r7, #4]
800c5de: 460b mov r3, r1
800c5e0: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c5e2: 687b ldr r3, [r7, #4]
800c5e4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c5e8: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
800c5ea: 78fb ldrb r3, [r7, #3]
800c5ec: 4619 mov r1, r3
800c5ee: 6878 ldr r0, [r7, #4]
800c5f0: f001 fe70 bl 800e2d4 <USBD_LL_GetRxDataSize>
800c5f4: 4602 mov r2, r0
800c5f6: 68fb ldr r3, [r7, #12]
800c5f8: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
800c5fc: 687b ldr r3, [r7, #4]
800c5fe: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c602: 2b00 cmp r3, #0
800c604: d00d beq.n 800c622 <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800c606: 687b ldr r3, [r7, #4]
800c608: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c60c: 68db ldr r3, [r3, #12]
800c60e: 68fa ldr r2, [r7, #12]
800c610: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800c614: 68fa ldr r2, [r7, #12]
800c616: f502 7203 add.w r2, r2, #524 @ 0x20c
800c61a: 4611 mov r1, r2
800c61c: 4798 blx r3
return USBD_OK;
800c61e: 2300 movs r3, #0
800c620: e000 b.n 800c624 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800c622: 2302 movs r3, #2
}
}
800c624: 4618 mov r0, r3
800c626: 3710 adds r7, #16
800c628: 46bd mov sp, r7
800c62a: bd80 pop {r7, pc}
0800c62c <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
800c62c: b580 push {r7, lr}
800c62e: b084 sub sp, #16
800c630: af00 add r7, sp, #0
800c632: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c634: 687b ldr r3, [r7, #4]
800c636: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c63a: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
800c63c: 687b ldr r3, [r7, #4]
800c63e: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c642: 2b00 cmp r3, #0
800c644: d014 beq.n 800c670 <USBD_CDC_EP0_RxReady+0x44>
800c646: 68fb ldr r3, [r7, #12]
800c648: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
800c64c: 2bff cmp r3, #255 @ 0xff
800c64e: d00f beq.n 800c670 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c650: 687b ldr r3, [r7, #4]
800c652: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c656: 689b ldr r3, [r3, #8]
800c658: 68fa ldr r2, [r7, #12]
800c65a: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
800c65e: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
800c660: 68fa ldr r2, [r7, #12]
800c662: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c666: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
800c668: 68fb ldr r3, [r7, #12]
800c66a: 22ff movs r2, #255 @ 0xff
800c66c: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
800c670: 2300 movs r3, #0
}
800c672: 4618 mov r0, r3
800c674: 3710 adds r7, #16
800c676: 46bd mov sp, r7
800c678: bd80 pop {r7, pc}
...
0800c67c <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
800c67c: b480 push {r7}
800c67e: b083 sub sp, #12
800c680: af00 add r7, sp, #0
800c682: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
800c684: 687b ldr r3, [r7, #4]
800c686: 2243 movs r2, #67 @ 0x43
800c688: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
800c68a: 4b03 ldr r3, [pc, #12] @ (800c698 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
800c68c: 4618 mov r0, r3
800c68e: 370c adds r7, #12
800c690: 46bd mov sp, r7
800c692: bc80 pop {r7}
800c694: 4770 bx lr
800c696: bf00 nop
800c698: 200000a4 .word 0x200000a4
0800c69c <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
800c69c: b480 push {r7}
800c69e: b083 sub sp, #12
800c6a0: af00 add r7, sp, #0
800c6a2: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
800c6a4: 687b ldr r3, [r7, #4]
800c6a6: 2243 movs r2, #67 @ 0x43
800c6a8: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
800c6aa: 4b03 ldr r3, [pc, #12] @ (800c6b8 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
800c6ac: 4618 mov r0, r3
800c6ae: 370c adds r7, #12
800c6b0: 46bd mov sp, r7
800c6b2: bc80 pop {r7}
800c6b4: 4770 bx lr
800c6b6: bf00 nop
800c6b8: 20000060 .word 0x20000060
0800c6bc <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
800c6bc: b480 push {r7}
800c6be: b083 sub sp, #12
800c6c0: af00 add r7, sp, #0
800c6c2: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800c6c4: 687b ldr r3, [r7, #4]
800c6c6: 2243 movs r2, #67 @ 0x43
800c6c8: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
800c6ca: 4b03 ldr r3, [pc, #12] @ (800c6d8 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
800c6cc: 4618 mov r0, r3
800c6ce: 370c adds r7, #12
800c6d0: 46bd mov sp, r7
800c6d2: bc80 pop {r7}
800c6d4: 4770 bx lr
800c6d6: bf00 nop
800c6d8: 200000e8 .word 0x200000e8
0800c6dc <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
800c6dc: b480 push {r7}
800c6de: b083 sub sp, #12
800c6e0: af00 add r7, sp, #0
800c6e2: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800c6e4: 687b ldr r3, [r7, #4]
800c6e6: 220a movs r2, #10
800c6e8: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
800c6ea: 4b03 ldr r3, [pc, #12] @ (800c6f8 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
800c6ec: 4618 mov r0, r3
800c6ee: 370c adds r7, #12
800c6f0: 46bd mov sp, r7
800c6f2: bc80 pop {r7}
800c6f4: 4770 bx lr
800c6f6: bf00 nop
800c6f8: 2000001c .word 0x2000001c
0800c6fc <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
800c6fc: b480 push {r7}
800c6fe: b085 sub sp, #20
800c700: af00 add r7, sp, #0
800c702: 6078 str r0, [r7, #4]
800c704: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800c706: 2302 movs r3, #2
800c708: 73fb strb r3, [r7, #15]
if (fops != NULL)
800c70a: 683b ldr r3, [r7, #0]
800c70c: 2b00 cmp r3, #0
800c70e: d005 beq.n 800c71c <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
800c710: 687b ldr r3, [r7, #4]
800c712: 683a ldr r2, [r7, #0]
800c714: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
800c718: 2300 movs r3, #0
800c71a: 73fb strb r3, [r7, #15]
}
return ret;
800c71c: 7bfb ldrb r3, [r7, #15]
}
800c71e: 4618 mov r0, r3
800c720: 3714 adds r7, #20
800c722: 46bd mov sp, r7
800c724: bc80 pop {r7}
800c726: 4770 bx lr
0800c728 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
800c728: b480 push {r7}
800c72a: b087 sub sp, #28
800c72c: af00 add r7, sp, #0
800c72e: 60f8 str r0, [r7, #12]
800c730: 60b9 str r1, [r7, #8]
800c732: 4613 mov r3, r2
800c734: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c736: 68fb ldr r3, [r7, #12]
800c738: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c73c: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
800c73e: 697b ldr r3, [r7, #20]
800c740: 68ba ldr r2, [r7, #8]
800c742: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
800c746: 88fa ldrh r2, [r7, #6]
800c748: 697b ldr r3, [r7, #20]
800c74a: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
800c74e: 2300 movs r3, #0
}
800c750: 4618 mov r0, r3
800c752: 371c adds r7, #28
800c754: 46bd mov sp, r7
800c756: bc80 pop {r7}
800c758: 4770 bx lr
0800c75a <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
800c75a: b480 push {r7}
800c75c: b085 sub sp, #20
800c75e: af00 add r7, sp, #0
800c760: 6078 str r0, [r7, #4]
800c762: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c764: 687b ldr r3, [r7, #4]
800c766: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c76a: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
800c76c: 68fb ldr r3, [r7, #12]
800c76e: 683a ldr r2, [r7, #0]
800c770: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
800c774: 2300 movs r3, #0
}
800c776: 4618 mov r0, r3
800c778: 3714 adds r7, #20
800c77a: 46bd mov sp, r7
800c77c: bc80 pop {r7}
800c77e: 4770 bx lr
0800c780 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
800c780: b580 push {r7, lr}
800c782: b084 sub sp, #16
800c784: af00 add r7, sp, #0
800c786: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c788: 687b ldr r3, [r7, #4]
800c78a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c78e: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
800c790: 687b ldr r3, [r7, #4]
800c792: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c796: 2b00 cmp r3, #0
800c798: d01c beq.n 800c7d4 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
800c79a: 68fb ldr r3, [r7, #12]
800c79c: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800c7a0: 2b00 cmp r3, #0
800c7a2: d115 bne.n 800c7d0 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
800c7a4: 68fb ldr r3, [r7, #12]
800c7a6: 2201 movs r2, #1
800c7a8: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
800c7ac: 68fb ldr r3, [r7, #12]
800c7ae: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
800c7b2: 687b ldr r3, [r7, #4]
800c7b4: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c7b6: 68fb ldr r3, [r7, #12]
800c7b8: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
800c7bc: 68fb ldr r3, [r7, #12]
800c7be: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c7c2: b29b uxth r3, r3
800c7c4: 2181 movs r1, #129 @ 0x81
800c7c6: 6878 ldr r0, [r7, #4]
800c7c8: f001 fd3e bl 800e248 <USBD_LL_Transmit>
return USBD_OK;
800c7cc: 2300 movs r3, #0
800c7ce: e002 b.n 800c7d6 <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800c7d0: 2301 movs r3, #1
800c7d2: e000 b.n 800c7d6 <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
800c7d4: 2302 movs r3, #2
}
}
800c7d6: 4618 mov r0, r3
800c7d8: 3710 adds r7, #16
800c7da: 46bd mov sp, r7
800c7dc: bd80 pop {r7, pc}
0800c7de <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800c7de: b580 push {r7, lr}
800c7e0: b084 sub sp, #16
800c7e2: af00 add r7, sp, #0
800c7e4: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c7e6: 687b ldr r3, [r7, #4]
800c7e8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c7ec: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800c7ee: 687b ldr r3, [r7, #4]
800c7f0: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c7f4: 2b00 cmp r3, #0
800c7f6: d017 beq.n 800c828 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c7f8: 687b ldr r3, [r7, #4]
800c7fa: 7c1b ldrb r3, [r3, #16]
800c7fc: 2b00 cmp r3, #0
800c7fe: d109 bne.n 800c814 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c800: 68fb ldr r3, [r7, #12]
800c802: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c806: f44f 7300 mov.w r3, #512 @ 0x200
800c80a: 2101 movs r1, #1
800c80c: 6878 ldr r0, [r7, #4]
800c80e: f001 fd3e bl 800e28e <USBD_LL_PrepareReceive>
800c812: e007 b.n 800c824 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c814: 68fb ldr r3, [r7, #12]
800c816: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c81a: 2340 movs r3, #64 @ 0x40
800c81c: 2101 movs r1, #1
800c81e: 6878 ldr r0, [r7, #4]
800c820: f001 fd35 bl 800e28e <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
800c824: 2300 movs r3, #0
800c826: e000 b.n 800c82a <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
800c828: 2302 movs r3, #2
}
}
800c82a: 4618 mov r0, r3
800c82c: 3710 adds r7, #16
800c82e: 46bd mov sp, r7
800c830: bd80 pop {r7, pc}
0800c832 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800c832: b580 push {r7, lr}
800c834: b084 sub sp, #16
800c836: af00 add r7, sp, #0
800c838: 60f8 str r0, [r7, #12]
800c83a: 60b9 str r1, [r7, #8]
800c83c: 4613 mov r3, r2
800c83e: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800c840: 68fb ldr r3, [r7, #12]
800c842: 2b00 cmp r3, #0
800c844: d101 bne.n 800c84a <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
800c846: 2302 movs r3, #2
800c848: e01a b.n 800c880 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
800c84a: 68fb ldr r3, [r7, #12]
800c84c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c850: 2b00 cmp r3, #0
800c852: d003 beq.n 800c85c <USBD_Init+0x2a>
{
pdev->pClass = NULL;
800c854: 68fb ldr r3, [r7, #12]
800c856: 2200 movs r2, #0
800c858: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
800c85c: 68bb ldr r3, [r7, #8]
800c85e: 2b00 cmp r3, #0
800c860: d003 beq.n 800c86a <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
800c862: 68fb ldr r3, [r7, #12]
800c864: 68ba ldr r2, [r7, #8]
800c866: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
800c86a: 68fb ldr r3, [r7, #12]
800c86c: 2201 movs r2, #1
800c86e: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
800c872: 68fb ldr r3, [r7, #12]
800c874: 79fa ldrb r2, [r7, #7]
800c876: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
800c878: 68f8 ldr r0, [r7, #12]
800c87a: f001 fba3 bl 800dfc4 <USBD_LL_Init>
return USBD_OK;
800c87e: 2300 movs r3, #0
}
800c880: 4618 mov r0, r3
800c882: 3710 adds r7, #16
800c884: 46bd mov sp, r7
800c886: bd80 pop {r7, pc}
0800c888 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800c888: b480 push {r7}
800c88a: b085 sub sp, #20
800c88c: af00 add r7, sp, #0
800c88e: 6078 str r0, [r7, #4]
800c890: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
800c892: 2300 movs r3, #0
800c894: 73fb strb r3, [r7, #15]
if (pclass != NULL)
800c896: 683b ldr r3, [r7, #0]
800c898: 2b00 cmp r3, #0
800c89a: d006 beq.n 800c8aa <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
800c89c: 687b ldr r3, [r7, #4]
800c89e: 683a ldr r2, [r7, #0]
800c8a0: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
800c8a4: 2300 movs r3, #0
800c8a6: 73fb strb r3, [r7, #15]
800c8a8: e001 b.n 800c8ae <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
800c8aa: 2302 movs r3, #2
800c8ac: 73fb strb r3, [r7, #15]
}
return status;
800c8ae: 7bfb ldrb r3, [r7, #15]
}
800c8b0: 4618 mov r0, r3
800c8b2: 3714 adds r7, #20
800c8b4: 46bd mov sp, r7
800c8b6: bc80 pop {r7}
800c8b8: 4770 bx lr
0800c8ba <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800c8ba: b580 push {r7, lr}
800c8bc: b082 sub sp, #8
800c8be: af00 add r7, sp, #0
800c8c0: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
800c8c2: 6878 ldr r0, [r7, #4]
800c8c4: f001 fbd8 bl 800e078 <USBD_LL_Start>
return USBD_OK;
800c8c8: 2300 movs r3, #0
}
800c8ca: 4618 mov r0, r3
800c8cc: 3708 adds r7, #8
800c8ce: 46bd mov sp, r7
800c8d0: bd80 pop {r7, pc}
0800c8d2 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800c8d2: b480 push {r7}
800c8d4: b083 sub sp, #12
800c8d6: af00 add r7, sp, #0
800c8d8: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800c8da: 2300 movs r3, #0
}
800c8dc: 4618 mov r0, r3
800c8de: 370c adds r7, #12
800c8e0: 46bd mov sp, r7
800c8e2: bc80 pop {r7}
800c8e4: 4770 bx lr
0800c8e6 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c8e6: b580 push {r7, lr}
800c8e8: b084 sub sp, #16
800c8ea: af00 add r7, sp, #0
800c8ec: 6078 str r0, [r7, #4]
800c8ee: 460b mov r3, r1
800c8f0: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800c8f2: 2302 movs r3, #2
800c8f4: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
800c8f6: 687b ldr r3, [r7, #4]
800c8f8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c8fc: 2b00 cmp r3, #0
800c8fe: d00c beq.n 800c91a <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
800c900: 687b ldr r3, [r7, #4]
800c902: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c906: 681b ldr r3, [r3, #0]
800c908: 78fa ldrb r2, [r7, #3]
800c90a: 4611 mov r1, r2
800c90c: 6878 ldr r0, [r7, #4]
800c90e: 4798 blx r3
800c910: 4603 mov r3, r0
800c912: 2b00 cmp r3, #0
800c914: d101 bne.n 800c91a <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
800c916: 2300 movs r3, #0
800c918: 73fb strb r3, [r7, #15]
}
}
return ret;
800c91a: 7bfb ldrb r3, [r7, #15]
}
800c91c: 4618 mov r0, r3
800c91e: 3710 adds r7, #16
800c920: 46bd mov sp, r7
800c922: bd80 pop {r7, pc}
0800c924 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c924: b580 push {r7, lr}
800c926: b082 sub sp, #8
800c928: af00 add r7, sp, #0
800c92a: 6078 str r0, [r7, #4]
800c92c: 460b mov r3, r1
800c92e: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
800c930: 687b ldr r3, [r7, #4]
800c932: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c936: 685b ldr r3, [r3, #4]
800c938: 78fa ldrb r2, [r7, #3]
800c93a: 4611 mov r1, r2
800c93c: 6878 ldr r0, [r7, #4]
800c93e: 4798 blx r3
return USBD_OK;
800c940: 2300 movs r3, #0
}
800c942: 4618 mov r0, r3
800c944: 3708 adds r7, #8
800c946: 46bd mov sp, r7
800c948: bd80 pop {r7, pc}
0800c94a <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800c94a: b580 push {r7, lr}
800c94c: b082 sub sp, #8
800c94e: af00 add r7, sp, #0
800c950: 6078 str r0, [r7, #4]
800c952: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
800c954: 687b ldr r3, [r7, #4]
800c956: f503 732a add.w r3, r3, #680 @ 0x2a8
800c95a: 6839 ldr r1, [r7, #0]
800c95c: 4618 mov r0, r3
800c95e: f000 fed8 bl 800d712 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800c962: 687b ldr r3, [r7, #4]
800c964: 2201 movs r2, #1
800c966: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
800c96a: 687b ldr r3, [r7, #4]
800c96c: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800c970: 461a mov r2, r3
800c972: 687b ldr r3, [r7, #4]
800c974: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
800c978: 687b ldr r3, [r7, #4]
800c97a: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800c97e: f003 031f and.w r3, r3, #31
800c982: 2b02 cmp r3, #2
800c984: d016 beq.n 800c9b4 <USBD_LL_SetupStage+0x6a>
800c986: 2b02 cmp r3, #2
800c988: d81c bhi.n 800c9c4 <USBD_LL_SetupStage+0x7a>
800c98a: 2b00 cmp r3, #0
800c98c: d002 beq.n 800c994 <USBD_LL_SetupStage+0x4a>
800c98e: 2b01 cmp r3, #1
800c990: d008 beq.n 800c9a4 <USBD_LL_SetupStage+0x5a>
800c992: e017 b.n 800c9c4 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
800c994: 687b ldr r3, [r7, #4]
800c996: f503 732a add.w r3, r3, #680 @ 0x2a8
800c99a: 4619 mov r1, r3
800c99c: 6878 ldr r0, [r7, #4]
800c99e: f000 f9cb bl 800cd38 <USBD_StdDevReq>
break;
800c9a2: e01a b.n 800c9da <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
800c9a4: 687b ldr r3, [r7, #4]
800c9a6: f503 732a add.w r3, r3, #680 @ 0x2a8
800c9aa: 4619 mov r1, r3
800c9ac: 6878 ldr r0, [r7, #4]
800c9ae: f000 fa2d bl 800ce0c <USBD_StdItfReq>
break;
800c9b2: e012 b.n 800c9da <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
800c9b4: 687b ldr r3, [r7, #4]
800c9b6: f503 732a add.w r3, r3, #680 @ 0x2a8
800c9ba: 4619 mov r1, r3
800c9bc: 6878 ldr r0, [r7, #4]
800c9be: f000 fa6d bl 800ce9c <USBD_StdEPReq>
break;
800c9c2: e00a b.n 800c9da <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800c9c4: 687b ldr r3, [r7, #4]
800c9c6: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800c9ca: f023 037f bic.w r3, r3, #127 @ 0x7f
800c9ce: b2db uxtb r3, r3
800c9d0: 4619 mov r1, r3
800c9d2: 6878 ldr r0, [r7, #4]
800c9d4: f001 fbb0 bl 800e138 <USBD_LL_StallEP>
break;
800c9d8: bf00 nop
}
return USBD_OK;
800c9da: 2300 movs r3, #0
}
800c9dc: 4618 mov r0, r3
800c9de: 3708 adds r7, #8
800c9e0: 46bd mov sp, r7
800c9e2: bd80 pop {r7, pc}
0800c9e4 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800c9e4: b580 push {r7, lr}
800c9e6: b086 sub sp, #24
800c9e8: af00 add r7, sp, #0
800c9ea: 60f8 str r0, [r7, #12]
800c9ec: 460b mov r3, r1
800c9ee: 607a str r2, [r7, #4]
800c9f0: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800c9f2: 7afb ldrb r3, [r7, #11]
800c9f4: 2b00 cmp r3, #0
800c9f6: d14b bne.n 800ca90 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
800c9f8: 68fb ldr r3, [r7, #12]
800c9fa: f503 73aa add.w r3, r3, #340 @ 0x154
800c9fe: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800ca00: 68fb ldr r3, [r7, #12]
800ca02: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800ca06: 2b03 cmp r3, #3
800ca08: d134 bne.n 800ca74 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
800ca0a: 697b ldr r3, [r7, #20]
800ca0c: 68da ldr r2, [r3, #12]
800ca0e: 697b ldr r3, [r7, #20]
800ca10: 691b ldr r3, [r3, #16]
800ca12: 429a cmp r2, r3
800ca14: d919 bls.n 800ca4a <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
800ca16: 697b ldr r3, [r7, #20]
800ca18: 68da ldr r2, [r3, #12]
800ca1a: 697b ldr r3, [r7, #20]
800ca1c: 691b ldr r3, [r3, #16]
800ca1e: 1ad2 subs r2, r2, r3
800ca20: 697b ldr r3, [r7, #20]
800ca22: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800ca24: 697b ldr r3, [r7, #20]
800ca26: 68da ldr r2, [r3, #12]
800ca28: 697b ldr r3, [r7, #20]
800ca2a: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800ca2c: 429a cmp r2, r3
800ca2e: d203 bcs.n 800ca38 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800ca30: 697b ldr r3, [r7, #20]
800ca32: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
800ca34: b29b uxth r3, r3
800ca36: e002 b.n 800ca3e <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800ca38: 697b ldr r3, [r7, #20]
800ca3a: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800ca3c: b29b uxth r3, r3
800ca3e: 461a mov r2, r3
800ca40: 6879 ldr r1, [r7, #4]
800ca42: 68f8 ldr r0, [r7, #12]
800ca44: f000 ff54 bl 800d8f0 <USBD_CtlContinueRx>
800ca48: e038 b.n 800cabc <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800ca4a: 68fb ldr r3, [r7, #12]
800ca4c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ca50: 691b ldr r3, [r3, #16]
800ca52: 2b00 cmp r3, #0
800ca54: d00a beq.n 800ca6c <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800ca56: 68fb ldr r3, [r7, #12]
800ca58: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
800ca5c: 2b03 cmp r3, #3
800ca5e: d105 bne.n 800ca6c <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
800ca60: 68fb ldr r3, [r7, #12]
800ca62: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ca66: 691b ldr r3, [r3, #16]
800ca68: 68f8 ldr r0, [r7, #12]
800ca6a: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
800ca6c: 68f8 ldr r0, [r7, #12]
800ca6e: f000 ff51 bl 800d914 <USBD_CtlSendStatus>
800ca72: e023 b.n 800cabc <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
800ca74: 68fb ldr r3, [r7, #12]
800ca76: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800ca7a: 2b05 cmp r3, #5
800ca7c: d11e bne.n 800cabc <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
800ca7e: 68fb ldr r3, [r7, #12]
800ca80: 2200 movs r2, #0
800ca82: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
800ca86: 2100 movs r1, #0
800ca88: 68f8 ldr r0, [r7, #12]
800ca8a: f001 fb55 bl 800e138 <USBD_LL_StallEP>
800ca8e: e015 b.n 800cabc <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
800ca90: 68fb ldr r3, [r7, #12]
800ca92: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ca96: 699b ldr r3, [r3, #24]
800ca98: 2b00 cmp r3, #0
800ca9a: d00d beq.n 800cab8 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800ca9c: 68fb ldr r3, [r7, #12]
800ca9e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
800caa2: 2b03 cmp r3, #3
800caa4: d108 bne.n 800cab8 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
800caa6: 68fb ldr r3, [r7, #12]
800caa8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800caac: 699b ldr r3, [r3, #24]
800caae: 7afa ldrb r2, [r7, #11]
800cab0: 4611 mov r1, r2
800cab2: 68f8 ldr r0, [r7, #12]
800cab4: 4798 blx r3
800cab6: e001 b.n 800cabc <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800cab8: 2302 movs r3, #2
800caba: e000 b.n 800cabe <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800cabc: 2300 movs r3, #0
}
800cabe: 4618 mov r0, r3
800cac0: 3718 adds r7, #24
800cac2: 46bd mov sp, r7
800cac4: bd80 pop {r7, pc}
0800cac6 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800cac6: b580 push {r7, lr}
800cac8: b086 sub sp, #24
800caca: af00 add r7, sp, #0
800cacc: 60f8 str r0, [r7, #12]
800cace: 460b mov r3, r1
800cad0: 607a str r2, [r7, #4]
800cad2: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800cad4: 7afb ldrb r3, [r7, #11]
800cad6: 2b00 cmp r3, #0
800cad8: d17f bne.n 800cbda <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
800cada: 68fb ldr r3, [r7, #12]
800cadc: 3314 adds r3, #20
800cade: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800cae0: 68fb ldr r3, [r7, #12]
800cae2: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800cae6: 2b02 cmp r3, #2
800cae8: d15c bne.n 800cba4 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
800caea: 697b ldr r3, [r7, #20]
800caec: 68da ldr r2, [r3, #12]
800caee: 697b ldr r3, [r7, #20]
800caf0: 691b ldr r3, [r3, #16]
800caf2: 429a cmp r2, r3
800caf4: d915 bls.n 800cb22 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
800caf6: 697b ldr r3, [r7, #20]
800caf8: 68da ldr r2, [r3, #12]
800cafa: 697b ldr r3, [r7, #20]
800cafc: 691b ldr r3, [r3, #16]
800cafe: 1ad2 subs r2, r2, r3
800cb00: 697b ldr r3, [r7, #20]
800cb02: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
800cb04: 697b ldr r3, [r7, #20]
800cb06: 68db ldr r3, [r3, #12]
800cb08: b29b uxth r3, r3
800cb0a: 461a mov r2, r3
800cb0c: 6879 ldr r1, [r7, #4]
800cb0e: 68f8 ldr r0, [r7, #12]
800cb10: f000 febe bl 800d890 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800cb14: 2300 movs r3, #0
800cb16: 2200 movs r2, #0
800cb18: 2100 movs r1, #0
800cb1a: 68f8 ldr r0, [r7, #12]
800cb1c: f001 fbb7 bl 800e28e <USBD_LL_PrepareReceive>
800cb20: e04e b.n 800cbc0 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800cb22: 697b ldr r3, [r7, #20]
800cb24: 689b ldr r3, [r3, #8]
800cb26: 697a ldr r2, [r7, #20]
800cb28: 6912 ldr r2, [r2, #16]
800cb2a: fbb3 f1f2 udiv r1, r3, r2
800cb2e: fb01 f202 mul.w r2, r1, r2
800cb32: 1a9b subs r3, r3, r2
800cb34: 2b00 cmp r3, #0
800cb36: d11c bne.n 800cb72 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800cb38: 697b ldr r3, [r7, #20]
800cb3a: 689a ldr r2, [r3, #8]
800cb3c: 697b ldr r3, [r7, #20]
800cb3e: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
800cb40: 429a cmp r2, r3
800cb42: d316 bcc.n 800cb72 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
800cb44: 697b ldr r3, [r7, #20]
800cb46: 689a ldr r2, [r3, #8]
800cb48: 68fb ldr r3, [r7, #12]
800cb4a: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800cb4e: 429a cmp r2, r3
800cb50: d20f bcs.n 800cb72 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
800cb52: 2200 movs r2, #0
800cb54: 2100 movs r1, #0
800cb56: 68f8 ldr r0, [r7, #12]
800cb58: f000 fe9a bl 800d890 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800cb5c: 68fb ldr r3, [r7, #12]
800cb5e: 2200 movs r2, #0
800cb60: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800cb64: 2300 movs r3, #0
800cb66: 2200 movs r2, #0
800cb68: 2100 movs r1, #0
800cb6a: 68f8 ldr r0, [r7, #12]
800cb6c: f001 fb8f bl 800e28e <USBD_LL_PrepareReceive>
800cb70: e026 b.n 800cbc0 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
800cb72: 68fb ldr r3, [r7, #12]
800cb74: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb78: 68db ldr r3, [r3, #12]
800cb7a: 2b00 cmp r3, #0
800cb7c: d00a beq.n 800cb94 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cb7e: 68fb ldr r3, [r7, #12]
800cb80: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
800cb84: 2b03 cmp r3, #3
800cb86: d105 bne.n 800cb94 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
800cb88: 68fb ldr r3, [r7, #12]
800cb8a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb8e: 68db ldr r3, [r3, #12]
800cb90: 68f8 ldr r0, [r7, #12]
800cb92: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
800cb94: 2180 movs r1, #128 @ 0x80
800cb96: 68f8 ldr r0, [r7, #12]
800cb98: f001 face bl 800e138 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800cb9c: 68f8 ldr r0, [r7, #12]
800cb9e: f000 fecc bl 800d93a <USBD_CtlReceiveStatus>
800cba2: e00d b.n 800cbc0 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800cba4: 68fb ldr r3, [r7, #12]
800cba6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800cbaa: 2b04 cmp r3, #4
800cbac: d004 beq.n 800cbb8 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
800cbae: 68fb ldr r3, [r7, #12]
800cbb0: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800cbb4: 2b00 cmp r3, #0
800cbb6: d103 bne.n 800cbc0 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800cbb8: 2180 movs r1, #128 @ 0x80
800cbba: 68f8 ldr r0, [r7, #12]
800cbbc: f001 fabc bl 800e138 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
800cbc0: 68fb ldr r3, [r7, #12]
800cbc2: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800cbc6: 2b01 cmp r3, #1
800cbc8: d11d bne.n 800cc06 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800cbca: 68f8 ldr r0, [r7, #12]
800cbcc: f7ff fe81 bl 800c8d2 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800cbd0: 68fb ldr r3, [r7, #12]
800cbd2: 2200 movs r2, #0
800cbd4: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
800cbd8: e015 b.n 800cc06 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800cbda: 68fb ldr r3, [r7, #12]
800cbdc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cbe0: 695b ldr r3, [r3, #20]
800cbe2: 2b00 cmp r3, #0
800cbe4: d00d beq.n 800cc02 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cbe6: 68fb ldr r3, [r7, #12]
800cbe8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800cbec: 2b03 cmp r3, #3
800cbee: d108 bne.n 800cc02 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
800cbf0: 68fb ldr r3, [r7, #12]
800cbf2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cbf6: 695b ldr r3, [r3, #20]
800cbf8: 7afa ldrb r2, [r7, #11]
800cbfa: 4611 mov r1, r2
800cbfc: 68f8 ldr r0, [r7, #12]
800cbfe: 4798 blx r3
800cc00: e001 b.n 800cc06 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800cc02: 2302 movs r3, #2
800cc04: e000 b.n 800cc08 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
800cc06: 2300 movs r3, #0
}
800cc08: 4618 mov r0, r3
800cc0a: 3718 adds r7, #24
800cc0c: 46bd mov sp, r7
800cc0e: bd80 pop {r7, pc}
0800cc10 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800cc10: b580 push {r7, lr}
800cc12: b082 sub sp, #8
800cc14: af00 add r7, sp, #0
800cc16: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800cc18: 2340 movs r3, #64 @ 0x40
800cc1a: 2200 movs r2, #0
800cc1c: 2100 movs r1, #0
800cc1e: 6878 ldr r0, [r7, #4]
800cc20: f001 fa45 bl 800e0ae <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800cc24: 687b ldr r3, [r7, #4]
800cc26: 2201 movs r2, #1
800cc28: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800cc2c: 687b ldr r3, [r7, #4]
800cc2e: 2240 movs r2, #64 @ 0x40
800cc30: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800cc34: 2340 movs r3, #64 @ 0x40
800cc36: 2200 movs r2, #0
800cc38: 2180 movs r1, #128 @ 0x80
800cc3a: 6878 ldr r0, [r7, #4]
800cc3c: f001 fa37 bl 800e0ae <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800cc40: 687b ldr r3, [r7, #4]
800cc42: 2201 movs r2, #1
800cc44: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
800cc46: 687b ldr r3, [r7, #4]
800cc48: 2240 movs r2, #64 @ 0x40
800cc4a: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800cc4c: 687b ldr r3, [r7, #4]
800cc4e: 2201 movs r2, #1
800cc50: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
800cc54: 687b ldr r3, [r7, #4]
800cc56: 2200 movs r2, #0
800cc58: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
800cc5c: 687b ldr r3, [r7, #4]
800cc5e: 2200 movs r2, #0
800cc60: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800cc62: 687b ldr r3, [r7, #4]
800cc64: 2200 movs r2, #0
800cc66: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
800cc6a: 687b ldr r3, [r7, #4]
800cc6c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800cc70: 2b00 cmp r3, #0
800cc72: d009 beq.n 800cc88 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
800cc74: 687b ldr r3, [r7, #4]
800cc76: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cc7a: 685b ldr r3, [r3, #4]
800cc7c: 687a ldr r2, [r7, #4]
800cc7e: 6852 ldr r2, [r2, #4]
800cc80: b2d2 uxtb r2, r2
800cc82: 4611 mov r1, r2
800cc84: 6878 ldr r0, [r7, #4]
800cc86: 4798 blx r3
}
return USBD_OK;
800cc88: 2300 movs r3, #0
}
800cc8a: 4618 mov r0, r3
800cc8c: 3708 adds r7, #8
800cc8e: 46bd mov sp, r7
800cc90: bd80 pop {r7, pc}
0800cc92 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
800cc92: b480 push {r7}
800cc94: b083 sub sp, #12
800cc96: af00 add r7, sp, #0
800cc98: 6078 str r0, [r7, #4]
800cc9a: 460b mov r3, r1
800cc9c: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800cc9e: 687b ldr r3, [r7, #4]
800cca0: 78fa ldrb r2, [r7, #3]
800cca2: 741a strb r2, [r3, #16]
return USBD_OK;
800cca4: 2300 movs r3, #0
}
800cca6: 4618 mov r0, r3
800cca8: 370c adds r7, #12
800ccaa: 46bd mov sp, r7
800ccac: bc80 pop {r7}
800ccae: 4770 bx lr
0800ccb0 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
800ccb0: b480 push {r7}
800ccb2: b083 sub sp, #12
800ccb4: af00 add r7, sp, #0
800ccb6: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
800ccb8: 687b ldr r3, [r7, #4]
800ccba: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
800ccbe: 687b ldr r3, [r7, #4]
800ccc0: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
800ccc4: 687b ldr r3, [r7, #4]
800ccc6: 2204 movs r2, #4
800ccc8: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800cccc: 2300 movs r3, #0
}
800ccce: 4618 mov r0, r3
800ccd0: 370c adds r7, #12
800ccd2: 46bd mov sp, r7
800ccd4: bc80 pop {r7}
800ccd6: 4770 bx lr
0800ccd8 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800ccd8: b480 push {r7}
800ccda: b083 sub sp, #12
800ccdc: af00 add r7, sp, #0
800ccde: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
800cce0: 687b ldr r3, [r7, #4]
800cce2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cce6: 2b04 cmp r3, #4
800cce8: d105 bne.n 800ccf6 <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800ccea: 687b ldr r3, [r7, #4]
800ccec: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
800ccf0: 687b ldr r3, [r7, #4]
800ccf2: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800ccf6: 2300 movs r3, #0
}
800ccf8: 4618 mov r0, r3
800ccfa: 370c adds r7, #12
800ccfc: 46bd mov sp, r7
800ccfe: bc80 pop {r7}
800cd00: 4770 bx lr
0800cd02 <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800cd02: b580 push {r7, lr}
800cd04: b082 sub sp, #8
800cd06: af00 add r7, sp, #0
800cd08: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800cd0a: 687b ldr r3, [r7, #4]
800cd0c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cd10: 2b03 cmp r3, #3
800cd12: d10b bne.n 800cd2c <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800cd14: 687b ldr r3, [r7, #4]
800cd16: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd1a: 69db ldr r3, [r3, #28]
800cd1c: 2b00 cmp r3, #0
800cd1e: d005 beq.n 800cd2c <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
800cd20: 687b ldr r3, [r7, #4]
800cd22: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd26: 69db ldr r3, [r3, #28]
800cd28: 6878 ldr r0, [r7, #4]
800cd2a: 4798 blx r3
}
}
return USBD_OK;
800cd2c: 2300 movs r3, #0
}
800cd2e: 4618 mov r0, r3
800cd30: 3708 adds r7, #8
800cd32: 46bd mov sp, r7
800cd34: bd80 pop {r7, pc}
...
0800cd38 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cd38: b580 push {r7, lr}
800cd3a: b084 sub sp, #16
800cd3c: af00 add r7, sp, #0
800cd3e: 6078 str r0, [r7, #4]
800cd40: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800cd42: 2300 movs r3, #0
800cd44: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800cd46: 683b ldr r3, [r7, #0]
800cd48: 781b ldrb r3, [r3, #0]
800cd4a: f003 0360 and.w r3, r3, #96 @ 0x60
800cd4e: 2b40 cmp r3, #64 @ 0x40
800cd50: d005 beq.n 800cd5e <USBD_StdDevReq+0x26>
800cd52: 2b40 cmp r3, #64 @ 0x40
800cd54: d84f bhi.n 800cdf6 <USBD_StdDevReq+0xbe>
800cd56: 2b00 cmp r3, #0
800cd58: d009 beq.n 800cd6e <USBD_StdDevReq+0x36>
800cd5a: 2b20 cmp r3, #32
800cd5c: d14b bne.n 800cdf6 <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800cd5e: 687b ldr r3, [r7, #4]
800cd60: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd64: 689b ldr r3, [r3, #8]
800cd66: 6839 ldr r1, [r7, #0]
800cd68: 6878 ldr r0, [r7, #4]
800cd6a: 4798 blx r3
break;
800cd6c: e048 b.n 800ce00 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800cd6e: 683b ldr r3, [r7, #0]
800cd70: 785b ldrb r3, [r3, #1]
800cd72: 2b09 cmp r3, #9
800cd74: d839 bhi.n 800cdea <USBD_StdDevReq+0xb2>
800cd76: a201 add r2, pc, #4 @ (adr r2, 800cd7c <USBD_StdDevReq+0x44>)
800cd78: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800cd7c: 0800cdcd .word 0x0800cdcd
800cd80: 0800cde1 .word 0x0800cde1
800cd84: 0800cdeb .word 0x0800cdeb
800cd88: 0800cdd7 .word 0x0800cdd7
800cd8c: 0800cdeb .word 0x0800cdeb
800cd90: 0800cdaf .word 0x0800cdaf
800cd94: 0800cda5 .word 0x0800cda5
800cd98: 0800cdeb .word 0x0800cdeb
800cd9c: 0800cdc3 .word 0x0800cdc3
800cda0: 0800cdb9 .word 0x0800cdb9
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800cda4: 6839 ldr r1, [r7, #0]
800cda6: 6878 ldr r0, [r7, #4]
800cda8: f000 f9dc bl 800d164 <USBD_GetDescriptor>
break;
800cdac: e022 b.n 800cdf4 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800cdae: 6839 ldr r1, [r7, #0]
800cdb0: 6878 ldr r0, [r7, #4]
800cdb2: f000 fb3f bl 800d434 <USBD_SetAddress>
break;
800cdb6: e01d b.n 800cdf4 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
800cdb8: 6839 ldr r1, [r7, #0]
800cdba: 6878 ldr r0, [r7, #4]
800cdbc: f000 fb7e bl 800d4bc <USBD_SetConfig>
break;
800cdc0: e018 b.n 800cdf4 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800cdc2: 6839 ldr r1, [r7, #0]
800cdc4: 6878 ldr r0, [r7, #4]
800cdc6: f000 fc07 bl 800d5d8 <USBD_GetConfig>
break;
800cdca: e013 b.n 800cdf4 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800cdcc: 6839 ldr r1, [r7, #0]
800cdce: 6878 ldr r0, [r7, #4]
800cdd0: f000 fc37 bl 800d642 <USBD_GetStatus>
break;
800cdd4: e00e b.n 800cdf4 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800cdd6: 6839 ldr r1, [r7, #0]
800cdd8: 6878 ldr r0, [r7, #4]
800cdda: f000 fc65 bl 800d6a8 <USBD_SetFeature>
break;
800cdde: e009 b.n 800cdf4 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
800cde0: 6839 ldr r1, [r7, #0]
800cde2: 6878 ldr r0, [r7, #4]
800cde4: f000 fc74 bl 800d6d0 <USBD_ClrFeature>
break;
800cde8: e004 b.n 800cdf4 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800cdea: 6839 ldr r1, [r7, #0]
800cdec: 6878 ldr r0, [r7, #4]
800cdee: f000 fcc9 bl 800d784 <USBD_CtlError>
break;
800cdf2: bf00 nop
}
break;
800cdf4: e004 b.n 800ce00 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800cdf6: 6839 ldr r1, [r7, #0]
800cdf8: 6878 ldr r0, [r7, #4]
800cdfa: f000 fcc3 bl 800d784 <USBD_CtlError>
break;
800cdfe: bf00 nop
}
return ret;
800ce00: 7bfb ldrb r3, [r7, #15]
}
800ce02: 4618 mov r0, r3
800ce04: 3710 adds r7, #16
800ce06: 46bd mov sp, r7
800ce08: bd80 pop {r7, pc}
800ce0a: bf00 nop
0800ce0c <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800ce0c: b580 push {r7, lr}
800ce0e: b084 sub sp, #16
800ce10: af00 add r7, sp, #0
800ce12: 6078 str r0, [r7, #4]
800ce14: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800ce16: 2300 movs r3, #0
800ce18: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800ce1a: 683b ldr r3, [r7, #0]
800ce1c: 781b ldrb r3, [r3, #0]
800ce1e: f003 0360 and.w r3, r3, #96 @ 0x60
800ce22: 2b40 cmp r3, #64 @ 0x40
800ce24: d005 beq.n 800ce32 <USBD_StdItfReq+0x26>
800ce26: 2b40 cmp r3, #64 @ 0x40
800ce28: d82e bhi.n 800ce88 <USBD_StdItfReq+0x7c>
800ce2a: 2b00 cmp r3, #0
800ce2c: d001 beq.n 800ce32 <USBD_StdItfReq+0x26>
800ce2e: 2b20 cmp r3, #32
800ce30: d12a bne.n 800ce88 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800ce32: 687b ldr r3, [r7, #4]
800ce34: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800ce38: 3b01 subs r3, #1
800ce3a: 2b02 cmp r3, #2
800ce3c: d81d bhi.n 800ce7a <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
800ce3e: 683b ldr r3, [r7, #0]
800ce40: 889b ldrh r3, [r3, #4]
800ce42: b2db uxtb r3, r3
800ce44: 2b01 cmp r3, #1
800ce46: d813 bhi.n 800ce70 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800ce48: 687b ldr r3, [r7, #4]
800ce4a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ce4e: 689b ldr r3, [r3, #8]
800ce50: 6839 ldr r1, [r7, #0]
800ce52: 6878 ldr r0, [r7, #4]
800ce54: 4798 blx r3
800ce56: 4603 mov r3, r0
800ce58: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800ce5a: 683b ldr r3, [r7, #0]
800ce5c: 88db ldrh r3, [r3, #6]
800ce5e: 2b00 cmp r3, #0
800ce60: d110 bne.n 800ce84 <USBD_StdItfReq+0x78>
800ce62: 7bfb ldrb r3, [r7, #15]
800ce64: 2b00 cmp r3, #0
800ce66: d10d bne.n 800ce84 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
800ce68: 6878 ldr r0, [r7, #4]
800ce6a: f000 fd53 bl 800d914 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800ce6e: e009 b.n 800ce84 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
800ce70: 6839 ldr r1, [r7, #0]
800ce72: 6878 ldr r0, [r7, #4]
800ce74: f000 fc86 bl 800d784 <USBD_CtlError>
break;
800ce78: e004 b.n 800ce84 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
800ce7a: 6839 ldr r1, [r7, #0]
800ce7c: 6878 ldr r0, [r7, #4]
800ce7e: f000 fc81 bl 800d784 <USBD_CtlError>
break;
800ce82: e000 b.n 800ce86 <USBD_StdItfReq+0x7a>
break;
800ce84: bf00 nop
}
break;
800ce86: e004 b.n 800ce92 <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
800ce88: 6839 ldr r1, [r7, #0]
800ce8a: 6878 ldr r0, [r7, #4]
800ce8c: f000 fc7a bl 800d784 <USBD_CtlError>
break;
800ce90: bf00 nop
}
return USBD_OK;
800ce92: 2300 movs r3, #0
}
800ce94: 4618 mov r0, r3
800ce96: 3710 adds r7, #16
800ce98: 46bd mov sp, r7
800ce9a: bd80 pop {r7, pc}
0800ce9c <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800ce9c: b580 push {r7, lr}
800ce9e: b084 sub sp, #16
800cea0: af00 add r7, sp, #0
800cea2: 6078 str r0, [r7, #4]
800cea4: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
800cea6: 2300 movs r3, #0
800cea8: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800ceaa: 683b ldr r3, [r7, #0]
800ceac: 889b ldrh r3, [r3, #4]
800ceae: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800ceb0: 683b ldr r3, [r7, #0]
800ceb2: 781b ldrb r3, [r3, #0]
800ceb4: f003 0360 and.w r3, r3, #96 @ 0x60
800ceb8: 2b40 cmp r3, #64 @ 0x40
800ceba: d007 beq.n 800cecc <USBD_StdEPReq+0x30>
800cebc: 2b40 cmp r3, #64 @ 0x40
800cebe: f200 8146 bhi.w 800d14e <USBD_StdEPReq+0x2b2>
800cec2: 2b00 cmp r3, #0
800cec4: d00a beq.n 800cedc <USBD_StdEPReq+0x40>
800cec6: 2b20 cmp r3, #32
800cec8: f040 8141 bne.w 800d14e <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800cecc: 687b ldr r3, [r7, #4]
800cece: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ced2: 689b ldr r3, [r3, #8]
800ced4: 6839 ldr r1, [r7, #0]
800ced6: 6878 ldr r0, [r7, #4]
800ced8: 4798 blx r3
break;
800ceda: e13d b.n 800d158 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
800cedc: 683b ldr r3, [r7, #0]
800cede: 781b ldrb r3, [r3, #0]
800cee0: f003 0360 and.w r3, r3, #96 @ 0x60
800cee4: 2b20 cmp r3, #32
800cee6: d10a bne.n 800cefe <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800cee8: 687b ldr r3, [r7, #4]
800ceea: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ceee: 689b ldr r3, [r3, #8]
800cef0: 6839 ldr r1, [r7, #0]
800cef2: 6878 ldr r0, [r7, #4]
800cef4: 4798 blx r3
800cef6: 4603 mov r3, r0
800cef8: 73fb strb r3, [r7, #15]
return ret;
800cefa: 7bfb ldrb r3, [r7, #15]
800cefc: e12d b.n 800d15a <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
800cefe: 683b ldr r3, [r7, #0]
800cf00: 785b ldrb r3, [r3, #1]
800cf02: 2b03 cmp r3, #3
800cf04: d007 beq.n 800cf16 <USBD_StdEPReq+0x7a>
800cf06: 2b03 cmp r3, #3
800cf08: f300 811b bgt.w 800d142 <USBD_StdEPReq+0x2a6>
800cf0c: 2b00 cmp r3, #0
800cf0e: d072 beq.n 800cff6 <USBD_StdEPReq+0x15a>
800cf10: 2b01 cmp r3, #1
800cf12: d03a beq.n 800cf8a <USBD_StdEPReq+0xee>
800cf14: e115 b.n 800d142 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800cf16: 687b ldr r3, [r7, #4]
800cf18: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cf1c: 2b02 cmp r3, #2
800cf1e: d002 beq.n 800cf26 <USBD_StdEPReq+0x8a>
800cf20: 2b03 cmp r3, #3
800cf22: d015 beq.n 800cf50 <USBD_StdEPReq+0xb4>
800cf24: e02b b.n 800cf7e <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800cf26: 7bbb ldrb r3, [r7, #14]
800cf28: 2b00 cmp r3, #0
800cf2a: d00c beq.n 800cf46 <USBD_StdEPReq+0xaa>
800cf2c: 7bbb ldrb r3, [r7, #14]
800cf2e: 2b80 cmp r3, #128 @ 0x80
800cf30: d009 beq.n 800cf46 <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800cf32: 7bbb ldrb r3, [r7, #14]
800cf34: 4619 mov r1, r3
800cf36: 6878 ldr r0, [r7, #4]
800cf38: f001 f8fe bl 800e138 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800cf3c: 2180 movs r1, #128 @ 0x80
800cf3e: 6878 ldr r0, [r7, #4]
800cf40: f001 f8fa bl 800e138 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800cf44: e020 b.n 800cf88 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800cf46: 6839 ldr r1, [r7, #0]
800cf48: 6878 ldr r0, [r7, #4]
800cf4a: f000 fc1b bl 800d784 <USBD_CtlError>
break;
800cf4e: e01b b.n 800cf88 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800cf50: 683b ldr r3, [r7, #0]
800cf52: 885b ldrh r3, [r3, #2]
800cf54: 2b00 cmp r3, #0
800cf56: d10e bne.n 800cf76 <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
800cf58: 7bbb ldrb r3, [r7, #14]
800cf5a: 2b00 cmp r3, #0
800cf5c: d00b beq.n 800cf76 <USBD_StdEPReq+0xda>
800cf5e: 7bbb ldrb r3, [r7, #14]
800cf60: 2b80 cmp r3, #128 @ 0x80
800cf62: d008 beq.n 800cf76 <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800cf64: 683b ldr r3, [r7, #0]
800cf66: 88db ldrh r3, [r3, #6]
800cf68: 2b00 cmp r3, #0
800cf6a: d104 bne.n 800cf76 <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
800cf6c: 7bbb ldrb r3, [r7, #14]
800cf6e: 4619 mov r1, r3
800cf70: 6878 ldr r0, [r7, #4]
800cf72: f001 f8e1 bl 800e138 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800cf76: 6878 ldr r0, [r7, #4]
800cf78: f000 fccc bl 800d914 <USBD_CtlSendStatus>
break;
800cf7c: e004 b.n 800cf88 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
800cf7e: 6839 ldr r1, [r7, #0]
800cf80: 6878 ldr r0, [r7, #4]
800cf82: f000 fbff bl 800d784 <USBD_CtlError>
break;
800cf86: bf00 nop
}
break;
800cf88: e0e0 b.n 800d14c <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800cf8a: 687b ldr r3, [r7, #4]
800cf8c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cf90: 2b02 cmp r3, #2
800cf92: d002 beq.n 800cf9a <USBD_StdEPReq+0xfe>
800cf94: 2b03 cmp r3, #3
800cf96: d015 beq.n 800cfc4 <USBD_StdEPReq+0x128>
800cf98: e026 b.n 800cfe8 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800cf9a: 7bbb ldrb r3, [r7, #14]
800cf9c: 2b00 cmp r3, #0
800cf9e: d00c beq.n 800cfba <USBD_StdEPReq+0x11e>
800cfa0: 7bbb ldrb r3, [r7, #14]
800cfa2: 2b80 cmp r3, #128 @ 0x80
800cfa4: d009 beq.n 800cfba <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
800cfa6: 7bbb ldrb r3, [r7, #14]
800cfa8: 4619 mov r1, r3
800cfaa: 6878 ldr r0, [r7, #4]
800cfac: f001 f8c4 bl 800e138 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800cfb0: 2180 movs r1, #128 @ 0x80
800cfb2: 6878 ldr r0, [r7, #4]
800cfb4: f001 f8c0 bl 800e138 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800cfb8: e01c b.n 800cff4 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
800cfba: 6839 ldr r1, [r7, #0]
800cfbc: 6878 ldr r0, [r7, #4]
800cfbe: f000 fbe1 bl 800d784 <USBD_CtlError>
break;
800cfc2: e017 b.n 800cff4 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800cfc4: 683b ldr r3, [r7, #0]
800cfc6: 885b ldrh r3, [r3, #2]
800cfc8: 2b00 cmp r3, #0
800cfca: d112 bne.n 800cff2 <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
800cfcc: 7bbb ldrb r3, [r7, #14]
800cfce: f003 037f and.w r3, r3, #127 @ 0x7f
800cfd2: 2b00 cmp r3, #0
800cfd4: d004 beq.n 800cfe0 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
800cfd6: 7bbb ldrb r3, [r7, #14]
800cfd8: 4619 mov r1, r3
800cfda: 6878 ldr r0, [r7, #4]
800cfdc: f001 f8cb bl 800e176 <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
800cfe0: 6878 ldr r0, [r7, #4]
800cfe2: f000 fc97 bl 800d914 <USBD_CtlSendStatus>
}
break;
800cfe6: e004 b.n 800cff2 <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
800cfe8: 6839 ldr r1, [r7, #0]
800cfea: 6878 ldr r0, [r7, #4]
800cfec: f000 fbca bl 800d784 <USBD_CtlError>
break;
800cff0: e000 b.n 800cff4 <USBD_StdEPReq+0x158>
break;
800cff2: bf00 nop
}
break;
800cff4: e0aa b.n 800d14c <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800cff6: 687b ldr r3, [r7, #4]
800cff8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cffc: 2b02 cmp r3, #2
800cffe: d002 beq.n 800d006 <USBD_StdEPReq+0x16a>
800d000: 2b03 cmp r3, #3
800d002: d032 beq.n 800d06a <USBD_StdEPReq+0x1ce>
800d004: e097 b.n 800d136 <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800d006: 7bbb ldrb r3, [r7, #14]
800d008: 2b00 cmp r3, #0
800d00a: d007 beq.n 800d01c <USBD_StdEPReq+0x180>
800d00c: 7bbb ldrb r3, [r7, #14]
800d00e: 2b80 cmp r3, #128 @ 0x80
800d010: d004 beq.n 800d01c <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
800d012: 6839 ldr r1, [r7, #0]
800d014: 6878 ldr r0, [r7, #4]
800d016: f000 fbb5 bl 800d784 <USBD_CtlError>
break;
800d01a: e091 b.n 800d140 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d01c: f997 300e ldrsb.w r3, [r7, #14]
800d020: 2b00 cmp r3, #0
800d022: da0b bge.n 800d03c <USBD_StdEPReq+0x1a0>
800d024: 7bbb ldrb r3, [r7, #14]
800d026: f003 027f and.w r2, r3, #127 @ 0x7f
800d02a: 4613 mov r3, r2
800d02c: 009b lsls r3, r3, #2
800d02e: 4413 add r3, r2
800d030: 009b lsls r3, r3, #2
800d032: 3310 adds r3, #16
800d034: 687a ldr r2, [r7, #4]
800d036: 4413 add r3, r2
800d038: 3304 adds r3, #4
800d03a: e00b b.n 800d054 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
800d03c: 7bbb ldrb r3, [r7, #14]
800d03e: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d042: 4613 mov r3, r2
800d044: 009b lsls r3, r3, #2
800d046: 4413 add r3, r2
800d048: 009b lsls r3, r3, #2
800d04a: f503 73a8 add.w r3, r3, #336 @ 0x150
800d04e: 687a ldr r2, [r7, #4]
800d050: 4413 add r3, r2
800d052: 3304 adds r3, #4
800d054: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800d056: 68bb ldr r3, [r7, #8]
800d058: 2200 movs r2, #0
800d05a: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800d05c: 68bb ldr r3, [r7, #8]
800d05e: 2202 movs r2, #2
800d060: 4619 mov r1, r3
800d062: 6878 ldr r0, [r7, #4]
800d064: f000 fbf8 bl 800d858 <USBD_CtlSendData>
break;
800d068: e06a b.n 800d140 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800d06a: f997 300e ldrsb.w r3, [r7, #14]
800d06e: 2b00 cmp r3, #0
800d070: da11 bge.n 800d096 <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800d072: 7bbb ldrb r3, [r7, #14]
800d074: f003 020f and.w r2, r3, #15
800d078: 6879 ldr r1, [r7, #4]
800d07a: 4613 mov r3, r2
800d07c: 009b lsls r3, r3, #2
800d07e: 4413 add r3, r2
800d080: 009b lsls r3, r3, #2
800d082: 440b add r3, r1
800d084: 3318 adds r3, #24
800d086: 681b ldr r3, [r3, #0]
800d088: 2b00 cmp r3, #0
800d08a: d117 bne.n 800d0bc <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800d08c: 6839 ldr r1, [r7, #0]
800d08e: 6878 ldr r0, [r7, #4]
800d090: f000 fb78 bl 800d784 <USBD_CtlError>
break;
800d094: e054 b.n 800d140 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800d096: 7bbb ldrb r3, [r7, #14]
800d098: f003 020f and.w r2, r3, #15
800d09c: 6879 ldr r1, [r7, #4]
800d09e: 4613 mov r3, r2
800d0a0: 009b lsls r3, r3, #2
800d0a2: 4413 add r3, r2
800d0a4: 009b lsls r3, r3, #2
800d0a6: 440b add r3, r1
800d0a8: f503 73ac add.w r3, r3, #344 @ 0x158
800d0ac: 681b ldr r3, [r3, #0]
800d0ae: 2b00 cmp r3, #0
800d0b0: d104 bne.n 800d0bc <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800d0b2: 6839 ldr r1, [r7, #0]
800d0b4: 6878 ldr r0, [r7, #4]
800d0b6: f000 fb65 bl 800d784 <USBD_CtlError>
break;
800d0ba: e041 b.n 800d140 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d0bc: f997 300e ldrsb.w r3, [r7, #14]
800d0c0: 2b00 cmp r3, #0
800d0c2: da0b bge.n 800d0dc <USBD_StdEPReq+0x240>
800d0c4: 7bbb ldrb r3, [r7, #14]
800d0c6: f003 027f and.w r2, r3, #127 @ 0x7f
800d0ca: 4613 mov r3, r2
800d0cc: 009b lsls r3, r3, #2
800d0ce: 4413 add r3, r2
800d0d0: 009b lsls r3, r3, #2
800d0d2: 3310 adds r3, #16
800d0d4: 687a ldr r2, [r7, #4]
800d0d6: 4413 add r3, r2
800d0d8: 3304 adds r3, #4
800d0da: e00b b.n 800d0f4 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
800d0dc: 7bbb ldrb r3, [r7, #14]
800d0de: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d0e2: 4613 mov r3, r2
800d0e4: 009b lsls r3, r3, #2
800d0e6: 4413 add r3, r2
800d0e8: 009b lsls r3, r3, #2
800d0ea: f503 73a8 add.w r3, r3, #336 @ 0x150
800d0ee: 687a ldr r2, [r7, #4]
800d0f0: 4413 add r3, r2
800d0f2: 3304 adds r3, #4
800d0f4: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800d0f6: 7bbb ldrb r3, [r7, #14]
800d0f8: 2b00 cmp r3, #0
800d0fa: d002 beq.n 800d102 <USBD_StdEPReq+0x266>
800d0fc: 7bbb ldrb r3, [r7, #14]
800d0fe: 2b80 cmp r3, #128 @ 0x80
800d100: d103 bne.n 800d10a <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
800d102: 68bb ldr r3, [r7, #8]
800d104: 2200 movs r2, #0
800d106: 601a str r2, [r3, #0]
800d108: e00e b.n 800d128 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800d10a: 7bbb ldrb r3, [r7, #14]
800d10c: 4619 mov r1, r3
800d10e: 6878 ldr r0, [r7, #4]
800d110: f001 f850 bl 800e1b4 <USBD_LL_IsStallEP>
800d114: 4603 mov r3, r0
800d116: 2b00 cmp r3, #0
800d118: d003 beq.n 800d122 <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800d11a: 68bb ldr r3, [r7, #8]
800d11c: 2201 movs r2, #1
800d11e: 601a str r2, [r3, #0]
800d120: e002 b.n 800d128 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
800d122: 68bb ldr r3, [r7, #8]
800d124: 2200 movs r2, #0
800d126: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800d128: 68bb ldr r3, [r7, #8]
800d12a: 2202 movs r2, #2
800d12c: 4619 mov r1, r3
800d12e: 6878 ldr r0, [r7, #4]
800d130: f000 fb92 bl 800d858 <USBD_CtlSendData>
break;
800d134: e004 b.n 800d140 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800d136: 6839 ldr r1, [r7, #0]
800d138: 6878 ldr r0, [r7, #4]
800d13a: f000 fb23 bl 800d784 <USBD_CtlError>
break;
800d13e: bf00 nop
}
break;
800d140: e004 b.n 800d14c <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
800d142: 6839 ldr r1, [r7, #0]
800d144: 6878 ldr r0, [r7, #4]
800d146: f000 fb1d bl 800d784 <USBD_CtlError>
break;
800d14a: bf00 nop
}
break;
800d14c: e004 b.n 800d158 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
800d14e: 6839 ldr r1, [r7, #0]
800d150: 6878 ldr r0, [r7, #4]
800d152: f000 fb17 bl 800d784 <USBD_CtlError>
break;
800d156: bf00 nop
}
return ret;
800d158: 7bfb ldrb r3, [r7, #15]
}
800d15a: 4618 mov r0, r3
800d15c: 3710 adds r7, #16
800d15e: 46bd mov sp, r7
800d160: bd80 pop {r7, pc}
...
0800d164 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d164: b580 push {r7, lr}
800d166: b084 sub sp, #16
800d168: af00 add r7, sp, #0
800d16a: 6078 str r0, [r7, #4]
800d16c: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800d16e: 2300 movs r3, #0
800d170: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800d172: 2300 movs r3, #0
800d174: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800d176: 2300 movs r3, #0
800d178: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
800d17a: 683b ldr r3, [r7, #0]
800d17c: 885b ldrh r3, [r3, #2]
800d17e: 0a1b lsrs r3, r3, #8
800d180: b29b uxth r3, r3
800d182: 3b01 subs r3, #1
800d184: 2b06 cmp r3, #6
800d186: f200 8128 bhi.w 800d3da <USBD_GetDescriptor+0x276>
800d18a: a201 add r2, pc, #4 @ (adr r2, 800d190 <USBD_GetDescriptor+0x2c>)
800d18c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d190: 0800d1ad .word 0x0800d1ad
800d194: 0800d1c5 .word 0x0800d1c5
800d198: 0800d205 .word 0x0800d205
800d19c: 0800d3db .word 0x0800d3db
800d1a0: 0800d3db .word 0x0800d3db
800d1a4: 0800d37b .word 0x0800d37b
800d1a8: 0800d3a7 .word 0x0800d3a7
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800d1ac: 687b ldr r3, [r7, #4]
800d1ae: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d1b2: 681b ldr r3, [r3, #0]
800d1b4: 687a ldr r2, [r7, #4]
800d1b6: 7c12 ldrb r2, [r2, #16]
800d1b8: f107 0108 add.w r1, r7, #8
800d1bc: 4610 mov r0, r2
800d1be: 4798 blx r3
800d1c0: 60f8 str r0, [r7, #12]
break;
800d1c2: e112 b.n 800d3ea <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d1c4: 687b ldr r3, [r7, #4]
800d1c6: 7c1b ldrb r3, [r3, #16]
800d1c8: 2b00 cmp r3, #0
800d1ca: d10d bne.n 800d1e8 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
800d1cc: 687b ldr r3, [r7, #4]
800d1ce: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d1d2: 6a9b ldr r3, [r3, #40] @ 0x28
800d1d4: f107 0208 add.w r2, r7, #8
800d1d8: 4610 mov r0, r2
800d1da: 4798 blx r3
800d1dc: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800d1de: 68fb ldr r3, [r7, #12]
800d1e0: 3301 adds r3, #1
800d1e2: 2202 movs r2, #2
800d1e4: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800d1e6: e100 b.n 800d3ea <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
800d1e8: 687b ldr r3, [r7, #4]
800d1ea: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d1ee: 6adb ldr r3, [r3, #44] @ 0x2c
800d1f0: f107 0208 add.w r2, r7, #8
800d1f4: 4610 mov r0, r2
800d1f6: 4798 blx r3
800d1f8: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800d1fa: 68fb ldr r3, [r7, #12]
800d1fc: 3301 adds r3, #1
800d1fe: 2202 movs r2, #2
800d200: 701a strb r2, [r3, #0]
break;
800d202: e0f2 b.n 800d3ea <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800d204: 683b ldr r3, [r7, #0]
800d206: 885b ldrh r3, [r3, #2]
800d208: b2db uxtb r3, r3
800d20a: 2b05 cmp r3, #5
800d20c: f200 80ac bhi.w 800d368 <USBD_GetDescriptor+0x204>
800d210: a201 add r2, pc, #4 @ (adr r2, 800d218 <USBD_GetDescriptor+0xb4>)
800d212: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d216: bf00 nop
800d218: 0800d231 .word 0x0800d231
800d21c: 0800d265 .word 0x0800d265
800d220: 0800d299 .word 0x0800d299
800d224: 0800d2cd .word 0x0800d2cd
800d228: 0800d301 .word 0x0800d301
800d22c: 0800d335 .word 0x0800d335
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
800d230: 687b ldr r3, [r7, #4]
800d232: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d236: 685b ldr r3, [r3, #4]
800d238: 2b00 cmp r3, #0
800d23a: d00b beq.n 800d254 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800d23c: 687b ldr r3, [r7, #4]
800d23e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d242: 685b ldr r3, [r3, #4]
800d244: 687a ldr r2, [r7, #4]
800d246: 7c12 ldrb r2, [r2, #16]
800d248: f107 0108 add.w r1, r7, #8
800d24c: 4610 mov r0, r2
800d24e: 4798 blx r3
800d250: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d252: e091 b.n 800d378 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d254: 6839 ldr r1, [r7, #0]
800d256: 6878 ldr r0, [r7, #4]
800d258: f000 fa94 bl 800d784 <USBD_CtlError>
err++;
800d25c: 7afb ldrb r3, [r7, #11]
800d25e: 3301 adds r3, #1
800d260: 72fb strb r3, [r7, #11]
break;
800d262: e089 b.n 800d378 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800d264: 687b ldr r3, [r7, #4]
800d266: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d26a: 689b ldr r3, [r3, #8]
800d26c: 2b00 cmp r3, #0
800d26e: d00b beq.n 800d288 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
800d270: 687b ldr r3, [r7, #4]
800d272: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d276: 689b ldr r3, [r3, #8]
800d278: 687a ldr r2, [r7, #4]
800d27a: 7c12 ldrb r2, [r2, #16]
800d27c: f107 0108 add.w r1, r7, #8
800d280: 4610 mov r0, r2
800d282: 4798 blx r3
800d284: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d286: e077 b.n 800d378 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d288: 6839 ldr r1, [r7, #0]
800d28a: 6878 ldr r0, [r7, #4]
800d28c: f000 fa7a bl 800d784 <USBD_CtlError>
err++;
800d290: 7afb ldrb r3, [r7, #11]
800d292: 3301 adds r3, #1
800d294: 72fb strb r3, [r7, #11]
break;
800d296: e06f b.n 800d378 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
800d298: 687b ldr r3, [r7, #4]
800d29a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d29e: 68db ldr r3, [r3, #12]
800d2a0: 2b00 cmp r3, #0
800d2a2: d00b beq.n 800d2bc <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
800d2a4: 687b ldr r3, [r7, #4]
800d2a6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2aa: 68db ldr r3, [r3, #12]
800d2ac: 687a ldr r2, [r7, #4]
800d2ae: 7c12 ldrb r2, [r2, #16]
800d2b0: f107 0108 add.w r1, r7, #8
800d2b4: 4610 mov r0, r2
800d2b6: 4798 blx r3
800d2b8: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d2ba: e05d b.n 800d378 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d2bc: 6839 ldr r1, [r7, #0]
800d2be: 6878 ldr r0, [r7, #4]
800d2c0: f000 fa60 bl 800d784 <USBD_CtlError>
err++;
800d2c4: 7afb ldrb r3, [r7, #11]
800d2c6: 3301 adds r3, #1
800d2c8: 72fb strb r3, [r7, #11]
break;
800d2ca: e055 b.n 800d378 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800d2cc: 687b ldr r3, [r7, #4]
800d2ce: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2d2: 691b ldr r3, [r3, #16]
800d2d4: 2b00 cmp r3, #0
800d2d6: d00b beq.n 800d2f0 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800d2d8: 687b ldr r3, [r7, #4]
800d2da: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2de: 691b ldr r3, [r3, #16]
800d2e0: 687a ldr r2, [r7, #4]
800d2e2: 7c12 ldrb r2, [r2, #16]
800d2e4: f107 0108 add.w r1, r7, #8
800d2e8: 4610 mov r0, r2
800d2ea: 4798 blx r3
800d2ec: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d2ee: e043 b.n 800d378 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d2f0: 6839 ldr r1, [r7, #0]
800d2f2: 6878 ldr r0, [r7, #4]
800d2f4: f000 fa46 bl 800d784 <USBD_CtlError>
err++;
800d2f8: 7afb ldrb r3, [r7, #11]
800d2fa: 3301 adds r3, #1
800d2fc: 72fb strb r3, [r7, #11]
break;
800d2fe: e03b b.n 800d378 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800d300: 687b ldr r3, [r7, #4]
800d302: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d306: 695b ldr r3, [r3, #20]
800d308: 2b00 cmp r3, #0
800d30a: d00b beq.n 800d324 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800d30c: 687b ldr r3, [r7, #4]
800d30e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d312: 695b ldr r3, [r3, #20]
800d314: 687a ldr r2, [r7, #4]
800d316: 7c12 ldrb r2, [r2, #16]
800d318: f107 0108 add.w r1, r7, #8
800d31c: 4610 mov r0, r2
800d31e: 4798 blx r3
800d320: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d322: e029 b.n 800d378 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d324: 6839 ldr r1, [r7, #0]
800d326: 6878 ldr r0, [r7, #4]
800d328: f000 fa2c bl 800d784 <USBD_CtlError>
err++;
800d32c: 7afb ldrb r3, [r7, #11]
800d32e: 3301 adds r3, #1
800d330: 72fb strb r3, [r7, #11]
break;
800d332: e021 b.n 800d378 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800d334: 687b ldr r3, [r7, #4]
800d336: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d33a: 699b ldr r3, [r3, #24]
800d33c: 2b00 cmp r3, #0
800d33e: d00b beq.n 800d358 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800d340: 687b ldr r3, [r7, #4]
800d342: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d346: 699b ldr r3, [r3, #24]
800d348: 687a ldr r2, [r7, #4]
800d34a: 7c12 ldrb r2, [r2, #16]
800d34c: f107 0108 add.w r1, r7, #8
800d350: 4610 mov r0, r2
800d352: 4798 blx r3
800d354: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d356: e00f b.n 800d378 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d358: 6839 ldr r1, [r7, #0]
800d35a: 6878 ldr r0, [r7, #4]
800d35c: f000 fa12 bl 800d784 <USBD_CtlError>
err++;
800d360: 7afb ldrb r3, [r7, #11]
800d362: 3301 adds r3, #1
800d364: 72fb strb r3, [r7, #11]
break;
800d366: e007 b.n 800d378 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
800d368: 6839 ldr r1, [r7, #0]
800d36a: 6878 ldr r0, [r7, #4]
800d36c: f000 fa0a bl 800d784 <USBD_CtlError>
err++;
800d370: 7afb ldrb r3, [r7, #11]
800d372: 3301 adds r3, #1
800d374: 72fb strb r3, [r7, #11]
#endif
}
break;
800d376: e038 b.n 800d3ea <USBD_GetDescriptor+0x286>
800d378: e037 b.n 800d3ea <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d37a: 687b ldr r3, [r7, #4]
800d37c: 7c1b ldrb r3, [r3, #16]
800d37e: 2b00 cmp r3, #0
800d380: d109 bne.n 800d396 <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800d382: 687b ldr r3, [r7, #4]
800d384: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d388: 6b5b ldr r3, [r3, #52] @ 0x34
800d38a: f107 0208 add.w r2, r7, #8
800d38e: 4610 mov r0, r2
800d390: 4798 blx r3
800d392: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d394: e029 b.n 800d3ea <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800d396: 6839 ldr r1, [r7, #0]
800d398: 6878 ldr r0, [r7, #4]
800d39a: f000 f9f3 bl 800d784 <USBD_CtlError>
err++;
800d39e: 7afb ldrb r3, [r7, #11]
800d3a0: 3301 adds r3, #1
800d3a2: 72fb strb r3, [r7, #11]
break;
800d3a4: e021 b.n 800d3ea <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d3a6: 687b ldr r3, [r7, #4]
800d3a8: 7c1b ldrb r3, [r3, #16]
800d3aa: 2b00 cmp r3, #0
800d3ac: d10d bne.n 800d3ca <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
800d3ae: 687b ldr r3, [r7, #4]
800d3b0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d3b4: 6b1b ldr r3, [r3, #48] @ 0x30
800d3b6: f107 0208 add.w r2, r7, #8
800d3ba: 4610 mov r0, r2
800d3bc: 4798 blx r3
800d3be: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
800d3c0: 68fb ldr r3, [r7, #12]
800d3c2: 3301 adds r3, #1
800d3c4: 2207 movs r2, #7
800d3c6: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d3c8: e00f b.n 800d3ea <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800d3ca: 6839 ldr r1, [r7, #0]
800d3cc: 6878 ldr r0, [r7, #4]
800d3ce: f000 f9d9 bl 800d784 <USBD_CtlError>
err++;
800d3d2: 7afb ldrb r3, [r7, #11]
800d3d4: 3301 adds r3, #1
800d3d6: 72fb strb r3, [r7, #11]
break;
800d3d8: e007 b.n 800d3ea <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800d3da: 6839 ldr r1, [r7, #0]
800d3dc: 6878 ldr r0, [r7, #4]
800d3de: f000 f9d1 bl 800d784 <USBD_CtlError>
err++;
800d3e2: 7afb ldrb r3, [r7, #11]
800d3e4: 3301 adds r3, #1
800d3e6: 72fb strb r3, [r7, #11]
break;
800d3e8: bf00 nop
}
if (err != 0U)
800d3ea: 7afb ldrb r3, [r7, #11]
800d3ec: 2b00 cmp r3, #0
800d3ee: d11c bne.n 800d42a <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
800d3f0: 893b ldrh r3, [r7, #8]
800d3f2: 2b00 cmp r3, #0
800d3f4: d011 beq.n 800d41a <USBD_GetDescriptor+0x2b6>
800d3f6: 683b ldr r3, [r7, #0]
800d3f8: 88db ldrh r3, [r3, #6]
800d3fa: 2b00 cmp r3, #0
800d3fc: d00d beq.n 800d41a <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800d3fe: 683b ldr r3, [r7, #0]
800d400: 88da ldrh r2, [r3, #6]
800d402: 893b ldrh r3, [r7, #8]
800d404: 4293 cmp r3, r2
800d406: bf28 it cs
800d408: 4613 movcs r3, r2
800d40a: b29b uxth r3, r3
800d40c: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800d40e: 893b ldrh r3, [r7, #8]
800d410: 461a mov r2, r3
800d412: 68f9 ldr r1, [r7, #12]
800d414: 6878 ldr r0, [r7, #4]
800d416: f000 fa1f bl 800d858 <USBD_CtlSendData>
}
if (req->wLength == 0U)
800d41a: 683b ldr r3, [r7, #0]
800d41c: 88db ldrh r3, [r3, #6]
800d41e: 2b00 cmp r3, #0
800d420: d104 bne.n 800d42c <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800d422: 6878 ldr r0, [r7, #4]
800d424: f000 fa76 bl 800d914 <USBD_CtlSendStatus>
800d428: e000 b.n 800d42c <USBD_GetDescriptor+0x2c8>
return;
800d42a: bf00 nop
}
}
}
800d42c: 3710 adds r7, #16
800d42e: 46bd mov sp, r7
800d430: bd80 pop {r7, pc}
800d432: bf00 nop
0800d434 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d434: b580 push {r7, lr}
800d436: b084 sub sp, #16
800d438: af00 add r7, sp, #0
800d43a: 6078 str r0, [r7, #4]
800d43c: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800d43e: 683b ldr r3, [r7, #0]
800d440: 889b ldrh r3, [r3, #4]
800d442: 2b00 cmp r3, #0
800d444: d130 bne.n 800d4a8 <USBD_SetAddress+0x74>
800d446: 683b ldr r3, [r7, #0]
800d448: 88db ldrh r3, [r3, #6]
800d44a: 2b00 cmp r3, #0
800d44c: d12c bne.n 800d4a8 <USBD_SetAddress+0x74>
800d44e: 683b ldr r3, [r7, #0]
800d450: 885b ldrh r3, [r3, #2]
800d452: 2b7f cmp r3, #127 @ 0x7f
800d454: d828 bhi.n 800d4a8 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800d456: 683b ldr r3, [r7, #0]
800d458: 885b ldrh r3, [r3, #2]
800d45a: b2db uxtb r3, r3
800d45c: f003 037f and.w r3, r3, #127 @ 0x7f
800d460: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d462: 687b ldr r3, [r7, #4]
800d464: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d468: 2b03 cmp r3, #3
800d46a: d104 bne.n 800d476 <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
800d46c: 6839 ldr r1, [r7, #0]
800d46e: 6878 ldr r0, [r7, #4]
800d470: f000 f988 bl 800d784 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d474: e01d b.n 800d4b2 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800d476: 687b ldr r3, [r7, #4]
800d478: 7bfa ldrb r2, [r7, #15]
800d47a: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
800d47e: 7bfb ldrb r3, [r7, #15]
800d480: 4619 mov r1, r3
800d482: 6878 ldr r0, [r7, #4]
800d484: f000 fec1 bl 800e20a <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
800d488: 6878 ldr r0, [r7, #4]
800d48a: f000 fa43 bl 800d914 <USBD_CtlSendStatus>
if (dev_addr != 0U)
800d48e: 7bfb ldrb r3, [r7, #15]
800d490: 2b00 cmp r3, #0
800d492: d004 beq.n 800d49e <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800d494: 687b ldr r3, [r7, #4]
800d496: 2202 movs r2, #2
800d498: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d49c: e009 b.n 800d4b2 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800d49e: 687b ldr r3, [r7, #4]
800d4a0: 2201 movs r2, #1
800d4a2: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d4a6: e004 b.n 800d4b2 <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
800d4a8: 6839 ldr r1, [r7, #0]
800d4aa: 6878 ldr r0, [r7, #4]
800d4ac: f000 f96a bl 800d784 <USBD_CtlError>
}
}
800d4b0: bf00 nop
800d4b2: bf00 nop
800d4b4: 3710 adds r7, #16
800d4b6: 46bd mov sp, r7
800d4b8: bd80 pop {r7, pc}
...
0800d4bc <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d4bc: b580 push {r7, lr}
800d4be: b082 sub sp, #8
800d4c0: af00 add r7, sp, #0
800d4c2: 6078 str r0, [r7, #4]
800d4c4: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800d4c6: 683b ldr r3, [r7, #0]
800d4c8: 885b ldrh r3, [r3, #2]
800d4ca: b2da uxtb r2, r3
800d4cc: 4b41 ldr r3, [pc, #260] @ (800d5d4 <USBD_SetConfig+0x118>)
800d4ce: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800d4d0: 4b40 ldr r3, [pc, #256] @ (800d5d4 <USBD_SetConfig+0x118>)
800d4d2: 781b ldrb r3, [r3, #0]
800d4d4: 2b01 cmp r3, #1
800d4d6: d904 bls.n 800d4e2 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
800d4d8: 6839 ldr r1, [r7, #0]
800d4da: 6878 ldr r0, [r7, #4]
800d4dc: f000 f952 bl 800d784 <USBD_CtlError>
800d4e0: e075 b.n 800d5ce <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800d4e2: 687b ldr r3, [r7, #4]
800d4e4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d4e8: 2b02 cmp r3, #2
800d4ea: d002 beq.n 800d4f2 <USBD_SetConfig+0x36>
800d4ec: 2b03 cmp r3, #3
800d4ee: d023 beq.n 800d538 <USBD_SetConfig+0x7c>
800d4f0: e062 b.n 800d5b8 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800d4f2: 4b38 ldr r3, [pc, #224] @ (800d5d4 <USBD_SetConfig+0x118>)
800d4f4: 781b ldrb r3, [r3, #0]
800d4f6: 2b00 cmp r3, #0
800d4f8: d01a beq.n 800d530 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800d4fa: 4b36 ldr r3, [pc, #216] @ (800d5d4 <USBD_SetConfig+0x118>)
800d4fc: 781b ldrb r3, [r3, #0]
800d4fe: 461a mov r2, r3
800d500: 687b ldr r3, [r7, #4]
800d502: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800d504: 687b ldr r3, [r7, #4]
800d506: 2203 movs r2, #3
800d508: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800d50c: 4b31 ldr r3, [pc, #196] @ (800d5d4 <USBD_SetConfig+0x118>)
800d50e: 781b ldrb r3, [r3, #0]
800d510: 4619 mov r1, r3
800d512: 6878 ldr r0, [r7, #4]
800d514: f7ff f9e7 bl 800c8e6 <USBD_SetClassConfig>
800d518: 4603 mov r3, r0
800d51a: 2b02 cmp r3, #2
800d51c: d104 bne.n 800d528 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800d51e: 6839 ldr r1, [r7, #0]
800d520: 6878 ldr r0, [r7, #4]
800d522: f000 f92f bl 800d784 <USBD_CtlError>
return;
800d526: e052 b.n 800d5ce <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800d528: 6878 ldr r0, [r7, #4]
800d52a: f000 f9f3 bl 800d914 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800d52e: e04e b.n 800d5ce <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d530: 6878 ldr r0, [r7, #4]
800d532: f000 f9ef bl 800d914 <USBD_CtlSendStatus>
break;
800d536: e04a b.n 800d5ce <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800d538: 4b26 ldr r3, [pc, #152] @ (800d5d4 <USBD_SetConfig+0x118>)
800d53a: 781b ldrb r3, [r3, #0]
800d53c: 2b00 cmp r3, #0
800d53e: d112 bne.n 800d566 <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800d540: 687b ldr r3, [r7, #4]
800d542: 2202 movs r2, #2
800d544: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800d548: 4b22 ldr r3, [pc, #136] @ (800d5d4 <USBD_SetConfig+0x118>)
800d54a: 781b ldrb r3, [r3, #0]
800d54c: 461a mov r2, r3
800d54e: 687b ldr r3, [r7, #4]
800d550: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800d552: 4b20 ldr r3, [pc, #128] @ (800d5d4 <USBD_SetConfig+0x118>)
800d554: 781b ldrb r3, [r3, #0]
800d556: 4619 mov r1, r3
800d558: 6878 ldr r0, [r7, #4]
800d55a: f7ff f9e3 bl 800c924 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
800d55e: 6878 ldr r0, [r7, #4]
800d560: f000 f9d8 bl 800d914 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800d564: e033 b.n 800d5ce <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800d566: 4b1b ldr r3, [pc, #108] @ (800d5d4 <USBD_SetConfig+0x118>)
800d568: 781b ldrb r3, [r3, #0]
800d56a: 461a mov r2, r3
800d56c: 687b ldr r3, [r7, #4]
800d56e: 685b ldr r3, [r3, #4]
800d570: 429a cmp r2, r3
800d572: d01d beq.n 800d5b0 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800d574: 687b ldr r3, [r7, #4]
800d576: 685b ldr r3, [r3, #4]
800d578: b2db uxtb r3, r3
800d57a: 4619 mov r1, r3
800d57c: 6878 ldr r0, [r7, #4]
800d57e: f7ff f9d1 bl 800c924 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800d582: 4b14 ldr r3, [pc, #80] @ (800d5d4 <USBD_SetConfig+0x118>)
800d584: 781b ldrb r3, [r3, #0]
800d586: 461a mov r2, r3
800d588: 687b ldr r3, [r7, #4]
800d58a: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800d58c: 4b11 ldr r3, [pc, #68] @ (800d5d4 <USBD_SetConfig+0x118>)
800d58e: 781b ldrb r3, [r3, #0]
800d590: 4619 mov r1, r3
800d592: 6878 ldr r0, [r7, #4]
800d594: f7ff f9a7 bl 800c8e6 <USBD_SetClassConfig>
800d598: 4603 mov r3, r0
800d59a: 2b02 cmp r3, #2
800d59c: d104 bne.n 800d5a8 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
800d59e: 6839 ldr r1, [r7, #0]
800d5a0: 6878 ldr r0, [r7, #4]
800d5a2: f000 f8ef bl 800d784 <USBD_CtlError>
return;
800d5a6: e012 b.n 800d5ce <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d5a8: 6878 ldr r0, [r7, #4]
800d5aa: f000 f9b3 bl 800d914 <USBD_CtlSendStatus>
break;
800d5ae: e00e b.n 800d5ce <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d5b0: 6878 ldr r0, [r7, #4]
800d5b2: f000 f9af bl 800d914 <USBD_CtlSendStatus>
break;
800d5b6: e00a b.n 800d5ce <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
800d5b8: 6839 ldr r1, [r7, #0]
800d5ba: 6878 ldr r0, [r7, #4]
800d5bc: f000 f8e2 bl 800d784 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
800d5c0: 4b04 ldr r3, [pc, #16] @ (800d5d4 <USBD_SetConfig+0x118>)
800d5c2: 781b ldrb r3, [r3, #0]
800d5c4: 4619 mov r1, r3
800d5c6: 6878 ldr r0, [r7, #4]
800d5c8: f7ff f9ac bl 800c924 <USBD_ClrClassConfig>
break;
800d5cc: bf00 nop
}
}
}
800d5ce: 3708 adds r7, #8
800d5d0: 46bd mov sp, r7
800d5d2: bd80 pop {r7, pc}
800d5d4: 20000498 .word 0x20000498
0800d5d8 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d5d8: b580 push {r7, lr}
800d5da: b082 sub sp, #8
800d5dc: af00 add r7, sp, #0
800d5de: 6078 str r0, [r7, #4]
800d5e0: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800d5e2: 683b ldr r3, [r7, #0]
800d5e4: 88db ldrh r3, [r3, #6]
800d5e6: 2b01 cmp r3, #1
800d5e8: d004 beq.n 800d5f4 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800d5ea: 6839 ldr r1, [r7, #0]
800d5ec: 6878 ldr r0, [r7, #4]
800d5ee: f000 f8c9 bl 800d784 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800d5f2: e022 b.n 800d63a <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800d5f4: 687b ldr r3, [r7, #4]
800d5f6: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d5fa: 2b02 cmp r3, #2
800d5fc: dc02 bgt.n 800d604 <USBD_GetConfig+0x2c>
800d5fe: 2b00 cmp r3, #0
800d600: dc03 bgt.n 800d60a <USBD_GetConfig+0x32>
800d602: e015 b.n 800d630 <USBD_GetConfig+0x58>
800d604: 2b03 cmp r3, #3
800d606: d00b beq.n 800d620 <USBD_GetConfig+0x48>
800d608: e012 b.n 800d630 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800d60a: 687b ldr r3, [r7, #4]
800d60c: 2200 movs r2, #0
800d60e: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
800d610: 687b ldr r3, [r7, #4]
800d612: 3308 adds r3, #8
800d614: 2201 movs r2, #1
800d616: 4619 mov r1, r3
800d618: 6878 ldr r0, [r7, #4]
800d61a: f000 f91d bl 800d858 <USBD_CtlSendData>
break;
800d61e: e00c b.n 800d63a <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
800d620: 687b ldr r3, [r7, #4]
800d622: 3304 adds r3, #4
800d624: 2201 movs r2, #1
800d626: 4619 mov r1, r3
800d628: 6878 ldr r0, [r7, #4]
800d62a: f000 f915 bl 800d858 <USBD_CtlSendData>
break;
800d62e: e004 b.n 800d63a <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
800d630: 6839 ldr r1, [r7, #0]
800d632: 6878 ldr r0, [r7, #4]
800d634: f000 f8a6 bl 800d784 <USBD_CtlError>
break;
800d638: bf00 nop
}
800d63a: bf00 nop
800d63c: 3708 adds r7, #8
800d63e: 46bd mov sp, r7
800d640: bd80 pop {r7, pc}
0800d642 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d642: b580 push {r7, lr}
800d644: b082 sub sp, #8
800d646: af00 add r7, sp, #0
800d648: 6078 str r0, [r7, #4]
800d64a: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d64c: 687b ldr r3, [r7, #4]
800d64e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d652: 3b01 subs r3, #1
800d654: 2b02 cmp r3, #2
800d656: d81e bhi.n 800d696 <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800d658: 683b ldr r3, [r7, #0]
800d65a: 88db ldrh r3, [r3, #6]
800d65c: 2b02 cmp r3, #2
800d65e: d004 beq.n 800d66a <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
800d660: 6839 ldr r1, [r7, #0]
800d662: 6878 ldr r0, [r7, #4]
800d664: f000 f88e bl 800d784 <USBD_CtlError>
break;
800d668: e01a b.n 800d6a0 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800d66a: 687b ldr r3, [r7, #4]
800d66c: 2201 movs r2, #1
800d66e: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
800d670: 687b ldr r3, [r7, #4]
800d672: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800d676: 2b00 cmp r3, #0
800d678: d005 beq.n 800d686 <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800d67a: 687b ldr r3, [r7, #4]
800d67c: 68db ldr r3, [r3, #12]
800d67e: f043 0202 orr.w r2, r3, #2
800d682: 687b ldr r3, [r7, #4]
800d684: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800d686: 687b ldr r3, [r7, #4]
800d688: 330c adds r3, #12
800d68a: 2202 movs r2, #2
800d68c: 4619 mov r1, r3
800d68e: 6878 ldr r0, [r7, #4]
800d690: f000 f8e2 bl 800d858 <USBD_CtlSendData>
break;
800d694: e004 b.n 800d6a0 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800d696: 6839 ldr r1, [r7, #0]
800d698: 6878 ldr r0, [r7, #4]
800d69a: f000 f873 bl 800d784 <USBD_CtlError>
break;
800d69e: bf00 nop
}
}
800d6a0: bf00 nop
800d6a2: 3708 adds r7, #8
800d6a4: 46bd mov sp, r7
800d6a6: bd80 pop {r7, pc}
0800d6a8 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d6a8: b580 push {r7, lr}
800d6aa: b082 sub sp, #8
800d6ac: af00 add r7, sp, #0
800d6ae: 6078 str r0, [r7, #4]
800d6b0: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d6b2: 683b ldr r3, [r7, #0]
800d6b4: 885b ldrh r3, [r3, #2]
800d6b6: 2b01 cmp r3, #1
800d6b8: d106 bne.n 800d6c8 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
800d6ba: 687b ldr r3, [r7, #4]
800d6bc: 2201 movs r2, #1
800d6be: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d6c2: 6878 ldr r0, [r7, #4]
800d6c4: f000 f926 bl 800d914 <USBD_CtlSendStatus>
}
}
800d6c8: bf00 nop
800d6ca: 3708 adds r7, #8
800d6cc: 46bd mov sp, r7
800d6ce: bd80 pop {r7, pc}
0800d6d0 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d6d0: b580 push {r7, lr}
800d6d2: b082 sub sp, #8
800d6d4: af00 add r7, sp, #0
800d6d6: 6078 str r0, [r7, #4]
800d6d8: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d6da: 687b ldr r3, [r7, #4]
800d6dc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d6e0: 3b01 subs r3, #1
800d6e2: 2b02 cmp r3, #2
800d6e4: d80b bhi.n 800d6fe <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d6e6: 683b ldr r3, [r7, #0]
800d6e8: 885b ldrh r3, [r3, #2]
800d6ea: 2b01 cmp r3, #1
800d6ec: d10c bne.n 800d708 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
800d6ee: 687b ldr r3, [r7, #4]
800d6f0: 2200 movs r2, #0
800d6f2: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d6f6: 6878 ldr r0, [r7, #4]
800d6f8: f000 f90c bl 800d914 <USBD_CtlSendStatus>
}
break;
800d6fc: e004 b.n 800d708 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
800d6fe: 6839 ldr r1, [r7, #0]
800d700: 6878 ldr r0, [r7, #4]
800d702: f000 f83f bl 800d784 <USBD_CtlError>
break;
800d706: e000 b.n 800d70a <USBD_ClrFeature+0x3a>
break;
800d708: bf00 nop
}
}
800d70a: bf00 nop
800d70c: 3708 adds r7, #8
800d70e: 46bd mov sp, r7
800d710: bd80 pop {r7, pc}
0800d712 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800d712: b480 push {r7}
800d714: b083 sub sp, #12
800d716: af00 add r7, sp, #0
800d718: 6078 str r0, [r7, #4]
800d71a: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
800d71c: 683b ldr r3, [r7, #0]
800d71e: 781a ldrb r2, [r3, #0]
800d720: 687b ldr r3, [r7, #4]
800d722: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800d724: 683b ldr r3, [r7, #0]
800d726: 785a ldrb r2, [r3, #1]
800d728: 687b ldr r3, [r7, #4]
800d72a: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
800d72c: 683b ldr r3, [r7, #0]
800d72e: 3302 adds r3, #2
800d730: 781b ldrb r3, [r3, #0]
800d732: 461a mov r2, r3
800d734: 683b ldr r3, [r7, #0]
800d736: 3303 adds r3, #3
800d738: 781b ldrb r3, [r3, #0]
800d73a: 021b lsls r3, r3, #8
800d73c: b29b uxth r3, r3
800d73e: 4413 add r3, r2
800d740: b29a uxth r2, r3
800d742: 687b ldr r3, [r7, #4]
800d744: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800d746: 683b ldr r3, [r7, #0]
800d748: 3304 adds r3, #4
800d74a: 781b ldrb r3, [r3, #0]
800d74c: 461a mov r2, r3
800d74e: 683b ldr r3, [r7, #0]
800d750: 3305 adds r3, #5
800d752: 781b ldrb r3, [r3, #0]
800d754: 021b lsls r3, r3, #8
800d756: b29b uxth r3, r3
800d758: 4413 add r3, r2
800d75a: b29a uxth r2, r3
800d75c: 687b ldr r3, [r7, #4]
800d75e: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
800d760: 683b ldr r3, [r7, #0]
800d762: 3306 adds r3, #6
800d764: 781b ldrb r3, [r3, #0]
800d766: 461a mov r2, r3
800d768: 683b ldr r3, [r7, #0]
800d76a: 3307 adds r3, #7
800d76c: 781b ldrb r3, [r3, #0]
800d76e: 021b lsls r3, r3, #8
800d770: b29b uxth r3, r3
800d772: 4413 add r3, r2
800d774: b29a uxth r2, r3
800d776: 687b ldr r3, [r7, #4]
800d778: 80da strh r2, [r3, #6]
}
800d77a: bf00 nop
800d77c: 370c adds r7, #12
800d77e: 46bd mov sp, r7
800d780: bc80 pop {r7}
800d782: 4770 bx lr
0800d784 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d784: b580 push {r7, lr}
800d786: b082 sub sp, #8
800d788: af00 add r7, sp, #0
800d78a: 6078 str r0, [r7, #4]
800d78c: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
800d78e: 2180 movs r1, #128 @ 0x80
800d790: 6878 ldr r0, [r7, #4]
800d792: f000 fcd1 bl 800e138 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
800d796: 2100 movs r1, #0
800d798: 6878 ldr r0, [r7, #4]
800d79a: f000 fccd bl 800e138 <USBD_LL_StallEP>
}
800d79e: bf00 nop
800d7a0: 3708 adds r7, #8
800d7a2: 46bd mov sp, r7
800d7a4: bd80 pop {r7, pc}
0800d7a6 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800d7a6: b580 push {r7, lr}
800d7a8: b086 sub sp, #24
800d7aa: af00 add r7, sp, #0
800d7ac: 60f8 str r0, [r7, #12]
800d7ae: 60b9 str r1, [r7, #8]
800d7b0: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800d7b2: 2300 movs r3, #0
800d7b4: 75fb strb r3, [r7, #23]
if (desc != NULL)
800d7b6: 68fb ldr r3, [r7, #12]
800d7b8: 2b00 cmp r3, #0
800d7ba: d032 beq.n 800d822 <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
800d7bc: 68f8 ldr r0, [r7, #12]
800d7be: f000 f834 bl 800d82a <USBD_GetLen>
800d7c2: 4603 mov r3, r0
800d7c4: 3301 adds r3, #1
800d7c6: b29b uxth r3, r3
800d7c8: 005b lsls r3, r3, #1
800d7ca: b29a uxth r2, r3
800d7cc: 687b ldr r3, [r7, #4]
800d7ce: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
800d7d0: 7dfb ldrb r3, [r7, #23]
800d7d2: 1c5a adds r2, r3, #1
800d7d4: 75fa strb r2, [r7, #23]
800d7d6: 461a mov r2, r3
800d7d8: 68bb ldr r3, [r7, #8]
800d7da: 4413 add r3, r2
800d7dc: 687a ldr r2, [r7, #4]
800d7de: 7812 ldrb r2, [r2, #0]
800d7e0: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800d7e2: 7dfb ldrb r3, [r7, #23]
800d7e4: 1c5a adds r2, r3, #1
800d7e6: 75fa strb r2, [r7, #23]
800d7e8: 461a mov r2, r3
800d7ea: 68bb ldr r3, [r7, #8]
800d7ec: 4413 add r3, r2
800d7ee: 2203 movs r2, #3
800d7f0: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d7f2: e012 b.n 800d81a <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
800d7f4: 68fb ldr r3, [r7, #12]
800d7f6: 1c5a adds r2, r3, #1
800d7f8: 60fa str r2, [r7, #12]
800d7fa: 7dfa ldrb r2, [r7, #23]
800d7fc: 1c51 adds r1, r2, #1
800d7fe: 75f9 strb r1, [r7, #23]
800d800: 4611 mov r1, r2
800d802: 68ba ldr r2, [r7, #8]
800d804: 440a add r2, r1
800d806: 781b ldrb r3, [r3, #0]
800d808: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
800d80a: 7dfb ldrb r3, [r7, #23]
800d80c: 1c5a adds r2, r3, #1
800d80e: 75fa strb r2, [r7, #23]
800d810: 461a mov r2, r3
800d812: 68bb ldr r3, [r7, #8]
800d814: 4413 add r3, r2
800d816: 2200 movs r2, #0
800d818: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d81a: 68fb ldr r3, [r7, #12]
800d81c: 781b ldrb r3, [r3, #0]
800d81e: 2b00 cmp r3, #0
800d820: d1e8 bne.n 800d7f4 <USBD_GetString+0x4e>
}
}
}
800d822: bf00 nop
800d824: 3718 adds r7, #24
800d826: 46bd mov sp, r7
800d828: bd80 pop {r7, pc}
0800d82a <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800d82a: b480 push {r7}
800d82c: b085 sub sp, #20
800d82e: af00 add r7, sp, #0
800d830: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800d832: 2300 movs r3, #0
800d834: 73fb strb r3, [r7, #15]
while (*buf != '\0')
800d836: e005 b.n 800d844 <USBD_GetLen+0x1a>
{
len++;
800d838: 7bfb ldrb r3, [r7, #15]
800d83a: 3301 adds r3, #1
800d83c: 73fb strb r3, [r7, #15]
buf++;
800d83e: 687b ldr r3, [r7, #4]
800d840: 3301 adds r3, #1
800d842: 607b str r3, [r7, #4]
while (*buf != '\0')
800d844: 687b ldr r3, [r7, #4]
800d846: 781b ldrb r3, [r3, #0]
800d848: 2b00 cmp r3, #0
800d84a: d1f5 bne.n 800d838 <USBD_GetLen+0xe>
}
return len;
800d84c: 7bfb ldrb r3, [r7, #15]
}
800d84e: 4618 mov r0, r3
800d850: 3714 adds r7, #20
800d852: 46bd mov sp, r7
800d854: bc80 pop {r7}
800d856: 4770 bx lr
0800d858 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d858: b580 push {r7, lr}
800d85a: b084 sub sp, #16
800d85c: af00 add r7, sp, #0
800d85e: 60f8 str r0, [r7, #12]
800d860: 60b9 str r1, [r7, #8]
800d862: 4613 mov r3, r2
800d864: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
800d866: 68fb ldr r3, [r7, #12]
800d868: 2202 movs r2, #2
800d86a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800d86e: 88fa ldrh r2, [r7, #6]
800d870: 68fb ldr r3, [r7, #12]
800d872: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
800d874: 88fa ldrh r2, [r7, #6]
800d876: 68fb ldr r3, [r7, #12]
800d878: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d87a: 88fb ldrh r3, [r7, #6]
800d87c: 68ba ldr r2, [r7, #8]
800d87e: 2100 movs r1, #0
800d880: 68f8 ldr r0, [r7, #12]
800d882: f000 fce1 bl 800e248 <USBD_LL_Transmit>
return USBD_OK;
800d886: 2300 movs r3, #0
}
800d888: 4618 mov r0, r3
800d88a: 3710 adds r7, #16
800d88c: 46bd mov sp, r7
800d88e: bd80 pop {r7, pc}
0800d890 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d890: b580 push {r7, lr}
800d892: b084 sub sp, #16
800d894: af00 add r7, sp, #0
800d896: 60f8 str r0, [r7, #12]
800d898: 60b9 str r1, [r7, #8]
800d89a: 4613 mov r3, r2
800d89c: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d89e: 88fb ldrh r3, [r7, #6]
800d8a0: 68ba ldr r2, [r7, #8]
800d8a2: 2100 movs r1, #0
800d8a4: 68f8 ldr r0, [r7, #12]
800d8a6: f000 fccf bl 800e248 <USBD_LL_Transmit>
return USBD_OK;
800d8aa: 2300 movs r3, #0
}
800d8ac: 4618 mov r0, r3
800d8ae: 3710 adds r7, #16
800d8b0: 46bd mov sp, r7
800d8b2: bd80 pop {r7, pc}
0800d8b4 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d8b4: b580 push {r7, lr}
800d8b6: b084 sub sp, #16
800d8b8: af00 add r7, sp, #0
800d8ba: 60f8 str r0, [r7, #12]
800d8bc: 60b9 str r1, [r7, #8]
800d8be: 4613 mov r3, r2
800d8c0: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
800d8c2: 68fb ldr r3, [r7, #12]
800d8c4: 2203 movs r2, #3
800d8c6: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
800d8ca: 88fa ldrh r2, [r7, #6]
800d8cc: 68fb ldr r3, [r7, #12]
800d8ce: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800d8d2: 88fa ldrh r2, [r7, #6]
800d8d4: 68fb ldr r3, [r7, #12]
800d8d6: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d8da: 88fb ldrh r3, [r7, #6]
800d8dc: 68ba ldr r2, [r7, #8]
800d8de: 2100 movs r1, #0
800d8e0: 68f8 ldr r0, [r7, #12]
800d8e2: f000 fcd4 bl 800e28e <USBD_LL_PrepareReceive>
return USBD_OK;
800d8e6: 2300 movs r3, #0
}
800d8e8: 4618 mov r0, r3
800d8ea: 3710 adds r7, #16
800d8ec: 46bd mov sp, r7
800d8ee: bd80 pop {r7, pc}
0800d8f0 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d8f0: b580 push {r7, lr}
800d8f2: b084 sub sp, #16
800d8f4: af00 add r7, sp, #0
800d8f6: 60f8 str r0, [r7, #12]
800d8f8: 60b9 str r1, [r7, #8]
800d8fa: 4613 mov r3, r2
800d8fc: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d8fe: 88fb ldrh r3, [r7, #6]
800d900: 68ba ldr r2, [r7, #8]
800d902: 2100 movs r1, #0
800d904: 68f8 ldr r0, [r7, #12]
800d906: f000 fcc2 bl 800e28e <USBD_LL_PrepareReceive>
return USBD_OK;
800d90a: 2300 movs r3, #0
}
800d90c: 4618 mov r0, r3
800d90e: 3710 adds r7, #16
800d910: 46bd mov sp, r7
800d912: bd80 pop {r7, pc}
0800d914 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800d914: b580 push {r7, lr}
800d916: b082 sub sp, #8
800d918: af00 add r7, sp, #0
800d91a: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800d91c: 687b ldr r3, [r7, #4]
800d91e: 2204 movs r2, #4
800d920: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800d924: 2300 movs r3, #0
800d926: 2200 movs r2, #0
800d928: 2100 movs r1, #0
800d92a: 6878 ldr r0, [r7, #4]
800d92c: f000 fc8c bl 800e248 <USBD_LL_Transmit>
return USBD_OK;
800d930: 2300 movs r3, #0
}
800d932: 4618 mov r0, r3
800d934: 3708 adds r7, #8
800d936: 46bd mov sp, r7
800d938: bd80 pop {r7, pc}
0800d93a <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800d93a: b580 push {r7, lr}
800d93c: b082 sub sp, #8
800d93e: af00 add r7, sp, #0
800d940: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800d942: 687b ldr r3, [r7, #4]
800d944: 2205 movs r2, #5
800d946: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800d94a: 2300 movs r3, #0
800d94c: 2200 movs r2, #0
800d94e: 2100 movs r1, #0
800d950: 6878 ldr r0, [r7, #4]
800d952: f000 fc9c bl 800e28e <USBD_LL_PrepareReceive>
return USBD_OK;
800d956: 2300 movs r3, #0
}
800d958: 4618 mov r0, r3
800d95a: 3708 adds r7, #8
800d95c: 46bd mov sp, r7
800d95e: bd80 pop {r7, pc}
0800d960 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800d960: b580 push {r7, lr}
800d962: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
800d964: 2200 movs r2, #0
800d966: 4912 ldr r1, [pc, #72] @ (800d9b0 <MX_USB_DEVICE_Init+0x50>)
800d968: 4812 ldr r0, [pc, #72] @ (800d9b4 <MX_USB_DEVICE_Init+0x54>)
800d96a: f7fe ff62 bl 800c832 <USBD_Init>
800d96e: 4603 mov r3, r0
800d970: 2b00 cmp r3, #0
800d972: d001 beq.n 800d978 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
800d974: f7f5 fe6c bl 8003650 <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
800d978: 490f ldr r1, [pc, #60] @ (800d9b8 <MX_USB_DEVICE_Init+0x58>)
800d97a: 480e ldr r0, [pc, #56] @ (800d9b4 <MX_USB_DEVICE_Init+0x54>)
800d97c: f7fe ff84 bl 800c888 <USBD_RegisterClass>
800d980: 4603 mov r3, r0
800d982: 2b00 cmp r3, #0
800d984: d001 beq.n 800d98a <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
800d986: f7f5 fe63 bl 8003650 <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
800d98a: 490c ldr r1, [pc, #48] @ (800d9bc <MX_USB_DEVICE_Init+0x5c>)
800d98c: 4809 ldr r0, [pc, #36] @ (800d9b4 <MX_USB_DEVICE_Init+0x54>)
800d98e: f7fe feb5 bl 800c6fc <USBD_CDC_RegisterInterface>
800d992: 4603 mov r3, r0
800d994: 2b00 cmp r3, #0
800d996: d001 beq.n 800d99c <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
800d998: f7f5 fe5a bl 8003650 <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
800d99c: 4805 ldr r0, [pc, #20] @ (800d9b4 <MX_USB_DEVICE_Init+0x54>)
800d99e: f7fe ff8c bl 800c8ba <USBD_Start>
800d9a2: 4603 mov r3, r0
800d9a4: 2b00 cmp r3, #0
800d9a6: d001 beq.n 800d9ac <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
800d9a8: f7f5 fe52 bl 8003650 <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
800d9ac: bf00 nop
800d9ae: bd80 pop {r7, pc}
800d9b0: 2000013c .word 0x2000013c
800d9b4: 2000049c .word 0x2000049c
800d9b8: 20000028 .word 0x20000028
800d9bc: 2000012c .word 0x2000012c
0800d9c0 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
800d9c0: b480 push {r7}
800d9c2: b085 sub sp, #20
800d9c4: af00 add r7, sp, #0
800d9c6: 6078 str r0, [r7, #4]
800d9c8: 6039 str r1, [r7, #0]
while (len--) {
800d9ca: e01e b.n 800da0a <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
800d9cc: 4b14 ldr r3, [pc, #80] @ (800da20 <fifo_push+0x60>)
800d9ce: 881b ldrh r3, [r3, #0]
800d9d0: b29b uxth r3, r3
800d9d2: 3301 adds r3, #1
800d9d4: b29b uxth r3, r3
800d9d6: b2db uxtb r3, r3
800d9d8: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
800d9da: 89fa ldrh r2, [r7, #14]
800d9dc: 4b11 ldr r3, [pc, #68] @ (800da24 <fifo_push+0x64>)
800d9de: 881b ldrh r3, [r3, #0]
800d9e0: b29b uxth r3, r3
800d9e2: b2db uxtb r3, r3
800d9e4: 429a cmp r2, r3
800d9e6: d103 bne.n 800d9f0 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
800d9e8: 687b ldr r3, [r7, #4]
800d9ea: 3301 adds r3, #1
800d9ec: 607b str r3, [r7, #4]
continue;
800d9ee: e00c b.n 800da0a <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
800d9f0: 687b ldr r3, [r7, #4]
800d9f2: 1c5a adds r2, r3, #1
800d9f4: 607a str r2, [r7, #4]
800d9f6: 4a0a ldr r2, [pc, #40] @ (800da20 <fifo_push+0x60>)
800d9f8: 8812 ldrh r2, [r2, #0]
800d9fa: b292 uxth r2, r2
800d9fc: b2d2 uxtb r2, r2
800d9fe: 7819 ldrb r1, [r3, #0]
800da00: 4b09 ldr r3, [pc, #36] @ (800da28 <fifo_push+0x68>)
800da02: 5499 strb r1, [r3, r2]
rx_head = next;
800da04: 4a06 ldr r2, [pc, #24] @ (800da20 <fifo_push+0x60>)
800da06: 89fb ldrh r3, [r7, #14]
800da08: 8013 strh r3, [r2, #0]
while (len--) {
800da0a: 683b ldr r3, [r7, #0]
800da0c: 1e5a subs r2, r3, #1
800da0e: 603a str r2, [r7, #0]
800da10: 2b00 cmp r3, #0
800da12: d1db bne.n 800d9cc <fifo_push+0xc>
}
}
800da14: bf00 nop
800da16: bf00 nop
800da18: 3714 adds r7, #20
800da1a: 46bd mov sp, r7
800da1c: bc80 pop {r7}
800da1e: 4770 bx lr
800da20: 20001060 .word 0x20001060
800da24: 20001062 .word 0x20001062
800da28: 20000f60 .word 0x20000f60
0800da2c <CDC_Available>:
uint32_t CDC_Available(void) {
800da2c: b480 push {r7}
800da2e: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
800da30: 4b06 ldr r3, [pc, #24] @ (800da4c <CDC_Available+0x20>)
800da32: 881b ldrh r3, [r3, #0]
800da34: b29a uxth r2, r3
800da36: 4b06 ldr r3, [pc, #24] @ (800da50 <CDC_Available+0x24>)
800da38: 881b ldrh r3, [r3, #0]
800da3a: b29b uxth r3, r3
800da3c: 1ad3 subs r3, r2, r3
800da3e: b29b uxth r3, r3
800da40: b2db uxtb r3, r3
}
800da42: 4618 mov r0, r3
800da44: 46bd mov sp, r7
800da46: bc80 pop {r7}
800da48: 4770 bx lr
800da4a: bf00 nop
800da4c: 20001060 .word 0x20001060
800da50: 20001062 .word 0x20001062
0800da54 <CDC_ReadByte>:
int CDC_ReadByte(void) {
800da54: b480 push {r7}
800da56: b083 sub sp, #12
800da58: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
800da5a: 4b10 ldr r3, [pc, #64] @ (800da9c <CDC_ReadByte+0x48>)
800da5c: 881b ldrh r3, [r3, #0]
800da5e: b29a uxth r2, r3
800da60: 4b0f ldr r3, [pc, #60] @ (800daa0 <CDC_ReadByte+0x4c>)
800da62: 881b ldrh r3, [r3, #0]
800da64: b29b uxth r3, r3
800da66: 429a cmp r2, r3
800da68: d102 bne.n 800da70 <CDC_ReadByte+0x1c>
800da6a: f04f 33ff mov.w r3, #4294967295
800da6e: e010 b.n 800da92 <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
800da70: 4b0a ldr r3, [pc, #40] @ (800da9c <CDC_ReadByte+0x48>)
800da72: 881b ldrh r3, [r3, #0]
800da74: b29b uxth r3, r3
800da76: b2db uxtb r3, r3
800da78: 4a0a ldr r2, [pc, #40] @ (800daa4 <CDC_ReadByte+0x50>)
800da7a: 5cd3 ldrb r3, [r2, r3]
800da7c: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
800da7e: 4b07 ldr r3, [pc, #28] @ (800da9c <CDC_ReadByte+0x48>)
800da80: 881b ldrh r3, [r3, #0]
800da82: b29b uxth r3, r3
800da84: 3301 adds r3, #1
800da86: b29b uxth r3, r3
800da88: b2db uxtb r3, r3
800da8a: b29a uxth r2, r3
800da8c: 4b03 ldr r3, [pc, #12] @ (800da9c <CDC_ReadByte+0x48>)
800da8e: 801a strh r2, [r3, #0]
return b;
800da90: 687b ldr r3, [r7, #4]
}
800da92: 4618 mov r0, r3
800da94: 370c adds r7, #12
800da96: 46bd mov sp, r7
800da98: bc80 pop {r7}
800da9a: 4770 bx lr
800da9c: 20001062 .word 0x20001062
800daa0: 20001060 .word 0x20001060
800daa4: 20000f60 .word 0x20000f60
0800daa8 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
800daa8: b580 push {r7, lr}
800daaa: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
800daac: 2200 movs r2, #0
800daae: 4905 ldr r1, [pc, #20] @ (800dac4 <CDC_Init_FS+0x1c>)
800dab0: 4805 ldr r0, [pc, #20] @ (800dac8 <CDC_Init_FS+0x20>)
800dab2: f7fe fe39 bl 800c728 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
800dab6: 4905 ldr r1, [pc, #20] @ (800dacc <CDC_Init_FS+0x24>)
800dab8: 4803 ldr r0, [pc, #12] @ (800dac8 <CDC_Init_FS+0x20>)
800daba: f7fe fe4e bl 800c75a <USBD_CDC_SetRxBuffer>
return (USBD_OK);
800dabe: 2300 movs r3, #0
/* USER CODE END 3 */
}
800dac0: 4618 mov r0, r3
800dac2: bd80 pop {r7, pc}
800dac4: 20000b60 .word 0x20000b60
800dac8: 2000049c .word 0x2000049c
800dacc: 20000760 .word 0x20000760
0800dad0 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
800dad0: b480 push {r7}
800dad2: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
800dad4: 2300 movs r3, #0
/* USER CODE END 4 */
}
800dad6: 4618 mov r0, r3
800dad8: 46bd mov sp, r7
800dada: bc80 pop {r7}
800dadc: 4770 bx lr
...
0800dae0 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800dae0: b480 push {r7}
800dae2: b083 sub sp, #12
800dae4: af00 add r7, sp, #0
800dae6: 4603 mov r3, r0
800dae8: 6039 str r1, [r7, #0]
800daea: 71fb strb r3, [r7, #7]
800daec: 4613 mov r3, r2
800daee: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800daf0: 79fb ldrb r3, [r7, #7]
800daf2: 2b23 cmp r3, #35 @ 0x23
800daf4: d84a bhi.n 800db8c <CDC_Control_FS+0xac>
800daf6: a201 add r2, pc, #4 @ (adr r2, 800dafc <CDC_Control_FS+0x1c>)
800daf8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800dafc: 0800db8d .word 0x0800db8d
800db00: 0800db8d .word 0x0800db8d
800db04: 0800db8d .word 0x0800db8d
800db08: 0800db8d .word 0x0800db8d
800db0c: 0800db8d .word 0x0800db8d
800db10: 0800db8d .word 0x0800db8d
800db14: 0800db8d .word 0x0800db8d
800db18: 0800db8d .word 0x0800db8d
800db1c: 0800db8d .word 0x0800db8d
800db20: 0800db8d .word 0x0800db8d
800db24: 0800db8d .word 0x0800db8d
800db28: 0800db8d .word 0x0800db8d
800db2c: 0800db8d .word 0x0800db8d
800db30: 0800db8d .word 0x0800db8d
800db34: 0800db8d .word 0x0800db8d
800db38: 0800db8d .word 0x0800db8d
800db3c: 0800db8d .word 0x0800db8d
800db40: 0800db8d .word 0x0800db8d
800db44: 0800db8d .word 0x0800db8d
800db48: 0800db8d .word 0x0800db8d
800db4c: 0800db8d .word 0x0800db8d
800db50: 0800db8d .word 0x0800db8d
800db54: 0800db8d .word 0x0800db8d
800db58: 0800db8d .word 0x0800db8d
800db5c: 0800db8d .word 0x0800db8d
800db60: 0800db8d .word 0x0800db8d
800db64: 0800db8d .word 0x0800db8d
800db68: 0800db8d .word 0x0800db8d
800db6c: 0800db8d .word 0x0800db8d
800db70: 0800db8d .word 0x0800db8d
800db74: 0800db8d .word 0x0800db8d
800db78: 0800db8d .word 0x0800db8d
800db7c: 0800db8d .word 0x0800db8d
800db80: 0800db8d .word 0x0800db8d
800db84: 0800db8d .word 0x0800db8d
800db88: 0800db8d .word 0x0800db8d
case CDC_SEND_BREAK:
break;
default:
break;
800db8c: bf00 nop
}
return (USBD_OK);
800db8e: 2300 movs r3, #0
/* USER CODE END 5 */
}
800db90: 4618 mov r0, r3
800db92: 370c adds r7, #12
800db94: 46bd mov sp, r7
800db96: bc80 pop {r7}
800db98: 4770 bx lr
800db9a: bf00 nop
0800db9c <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
800db9c: b580 push {r7, lr}
800db9e: b082 sub sp, #8
800dba0: af00 add r7, sp, #0
800dba2: 6078 str r0, [r7, #4]
800dba4: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
800dba6: 683b ldr r3, [r7, #0]
800dba8: 681b ldr r3, [r3, #0]
800dbaa: 2b00 cmp r3, #0
800dbac: d005 beq.n 800dbba <CDC_Receive_FS+0x1e>
800dbae: 683b ldr r3, [r7, #0]
800dbb0: 681b ldr r3, [r3, #0]
800dbb2: 4619 mov r1, r3
800dbb4: 6878 ldr r0, [r7, #4]
800dbb6: f7ff ff03 bl 800d9c0 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
800dbba: 6879 ldr r1, [r7, #4]
800dbbc: 4805 ldr r0, [pc, #20] @ (800dbd4 <CDC_Receive_FS+0x38>)
800dbbe: f7fe fdcc bl 800c75a <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
800dbc2: 4804 ldr r0, [pc, #16] @ (800dbd4 <CDC_Receive_FS+0x38>)
800dbc4: f7fe fe0b bl 800c7de <USBD_CDC_ReceivePacket>
return (USBD_OK);
800dbc8: 2300 movs r3, #0
/* USER CODE END 6 */
}
800dbca: 4618 mov r0, r3
800dbcc: 3708 adds r7, #8
800dbce: 46bd mov sp, r7
800dbd0: bd80 pop {r7, pc}
800dbd2: bf00 nop
800dbd4: 2000049c .word 0x2000049c
0800dbd8 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
800dbd8: b580 push {r7, lr}
800dbda: b084 sub sp, #16
800dbdc: af00 add r7, sp, #0
800dbde: 6078 str r0, [r7, #4]
800dbe0: 460b mov r3, r1
800dbe2: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
800dbe4: 2300 movs r3, #0
800dbe6: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
800dbe8: 4b0d ldr r3, [pc, #52] @ (800dc20 <CDC_Transmit_FS+0x48>)
800dbea: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800dbee: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
800dbf0: 68bb ldr r3, [r7, #8]
800dbf2: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800dbf6: 2b00 cmp r3, #0
800dbf8: d001 beq.n 800dbfe <CDC_Transmit_FS+0x26>
return USBD_BUSY;
800dbfa: 2301 movs r3, #1
800dbfc: e00b b.n 800dc16 <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800dbfe: 887b ldrh r3, [r7, #2]
800dc00: 461a mov r2, r3
800dc02: 6879 ldr r1, [r7, #4]
800dc04: 4806 ldr r0, [pc, #24] @ (800dc20 <CDC_Transmit_FS+0x48>)
800dc06: f7fe fd8f bl 800c728 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800dc0a: 4805 ldr r0, [pc, #20] @ (800dc20 <CDC_Transmit_FS+0x48>)
800dc0c: f7fe fdb8 bl 800c780 <USBD_CDC_TransmitPacket>
800dc10: 4603 mov r3, r0
800dc12: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
800dc14: 7bfb ldrb r3, [r7, #15]
}
800dc16: 4618 mov r0, r3
800dc18: 3710 adds r7, #16
800dc1a: 46bd mov sp, r7
800dc1c: bd80 pop {r7, pc}
800dc1e: bf00 nop
800dc20: 2000049c .word 0x2000049c
0800dc24 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dc24: b480 push {r7}
800dc26: b083 sub sp, #12
800dc28: af00 add r7, sp, #0
800dc2a: 4603 mov r3, r0
800dc2c: 6039 str r1, [r7, #0]
800dc2e: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800dc30: 683b ldr r3, [r7, #0]
800dc32: 2212 movs r2, #18
800dc34: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
800dc36: 4b03 ldr r3, [pc, #12] @ (800dc44 <USBD_FS_DeviceDescriptor+0x20>)
}
800dc38: 4618 mov r0, r3
800dc3a: 370c adds r7, #12
800dc3c: 46bd mov sp, r7
800dc3e: bc80 pop {r7}
800dc40: 4770 bx lr
800dc42: bf00 nop
800dc44: 20000158 .word 0x20000158
0800dc48 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dc48: b480 push {r7}
800dc4a: b083 sub sp, #12
800dc4c: af00 add r7, sp, #0
800dc4e: 4603 mov r3, r0
800dc50: 6039 str r1, [r7, #0]
800dc52: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
800dc54: 683b ldr r3, [r7, #0]
800dc56: 2204 movs r2, #4
800dc58: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
800dc5a: 4b03 ldr r3, [pc, #12] @ (800dc68 <USBD_FS_LangIDStrDescriptor+0x20>)
}
800dc5c: 4618 mov r0, r3
800dc5e: 370c adds r7, #12
800dc60: 46bd mov sp, r7
800dc62: bc80 pop {r7}
800dc64: 4770 bx lr
800dc66: bf00 nop
800dc68: 2000016c .word 0x2000016c
0800dc6c <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dc6c: b580 push {r7, lr}
800dc6e: b082 sub sp, #8
800dc70: af00 add r7, sp, #0
800dc72: 4603 mov r3, r0
800dc74: 6039 str r1, [r7, #0]
800dc76: 71fb strb r3, [r7, #7]
if(speed == 0)
800dc78: 79fb ldrb r3, [r7, #7]
800dc7a: 2b00 cmp r3, #0
800dc7c: d105 bne.n 800dc8a <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800dc7e: 683a ldr r2, [r7, #0]
800dc80: 4907 ldr r1, [pc, #28] @ (800dca0 <USBD_FS_ProductStrDescriptor+0x34>)
800dc82: 4808 ldr r0, [pc, #32] @ (800dca4 <USBD_FS_ProductStrDescriptor+0x38>)
800dc84: f7ff fd8f bl 800d7a6 <USBD_GetString>
800dc88: e004 b.n 800dc94 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800dc8a: 683a ldr r2, [r7, #0]
800dc8c: 4904 ldr r1, [pc, #16] @ (800dca0 <USBD_FS_ProductStrDescriptor+0x34>)
800dc8e: 4805 ldr r0, [pc, #20] @ (800dca4 <USBD_FS_ProductStrDescriptor+0x38>)
800dc90: f7ff fd89 bl 800d7a6 <USBD_GetString>
}
return USBD_StrDesc;
800dc94: 4b02 ldr r3, [pc, #8] @ (800dca0 <USBD_FS_ProductStrDescriptor+0x34>)
}
800dc96: 4618 mov r0, r3
800dc98: 3708 adds r7, #8
800dc9a: 46bd mov sp, r7
800dc9c: bd80 pop {r7, pc}
800dc9e: bf00 nop
800dca0: 20001064 .word 0x20001064
800dca4: 0800f350 .word 0x0800f350
0800dca8 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dca8: b580 push {r7, lr}
800dcaa: b082 sub sp, #8
800dcac: af00 add r7, sp, #0
800dcae: 4603 mov r3, r0
800dcb0: 6039 str r1, [r7, #0]
800dcb2: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800dcb4: 683a ldr r2, [r7, #0]
800dcb6: 4904 ldr r1, [pc, #16] @ (800dcc8 <USBD_FS_ManufacturerStrDescriptor+0x20>)
800dcb8: 4804 ldr r0, [pc, #16] @ (800dccc <USBD_FS_ManufacturerStrDescriptor+0x24>)
800dcba: f7ff fd74 bl 800d7a6 <USBD_GetString>
return USBD_StrDesc;
800dcbe: 4b02 ldr r3, [pc, #8] @ (800dcc8 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800dcc0: 4618 mov r0, r3
800dcc2: 3708 adds r7, #8
800dcc4: 46bd mov sp, r7
800dcc6: bd80 pop {r7, pc}
800dcc8: 20001064 .word 0x20001064
800dccc: 0800f368 .word 0x0800f368
0800dcd0 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dcd0: b580 push {r7, lr}
800dcd2: b082 sub sp, #8
800dcd4: af00 add r7, sp, #0
800dcd6: 4603 mov r3, r0
800dcd8: 6039 str r1, [r7, #0]
800dcda: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800dcdc: 683b ldr r3, [r7, #0]
800dcde: 221a movs r2, #26
800dce0: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800dce2: f000 f843 bl 800dd6c <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800dce6: 4b02 ldr r3, [pc, #8] @ (800dcf0 <USBD_FS_SerialStrDescriptor+0x20>)
}
800dce8: 4618 mov r0, r3
800dcea: 3708 adds r7, #8
800dcec: 46bd mov sp, r7
800dcee: bd80 pop {r7, pc}
800dcf0: 20000170 .word 0x20000170
0800dcf4 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dcf4: b580 push {r7, lr}
800dcf6: b082 sub sp, #8
800dcf8: af00 add r7, sp, #0
800dcfa: 4603 mov r3, r0
800dcfc: 6039 str r1, [r7, #0]
800dcfe: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800dd00: 79fb ldrb r3, [r7, #7]
800dd02: 2b00 cmp r3, #0
800dd04: d105 bne.n 800dd12 <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800dd06: 683a ldr r2, [r7, #0]
800dd08: 4907 ldr r1, [pc, #28] @ (800dd28 <USBD_FS_ConfigStrDescriptor+0x34>)
800dd0a: 4808 ldr r0, [pc, #32] @ (800dd2c <USBD_FS_ConfigStrDescriptor+0x38>)
800dd0c: f7ff fd4b bl 800d7a6 <USBD_GetString>
800dd10: e004 b.n 800dd1c <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800dd12: 683a ldr r2, [r7, #0]
800dd14: 4904 ldr r1, [pc, #16] @ (800dd28 <USBD_FS_ConfigStrDescriptor+0x34>)
800dd16: 4805 ldr r0, [pc, #20] @ (800dd2c <USBD_FS_ConfigStrDescriptor+0x38>)
800dd18: f7ff fd45 bl 800d7a6 <USBD_GetString>
}
return USBD_StrDesc;
800dd1c: 4b02 ldr r3, [pc, #8] @ (800dd28 <USBD_FS_ConfigStrDescriptor+0x34>)
}
800dd1e: 4618 mov r0, r3
800dd20: 3708 adds r7, #8
800dd22: 46bd mov sp, r7
800dd24: bd80 pop {r7, pc}
800dd26: bf00 nop
800dd28: 20001064 .word 0x20001064
800dd2c: 0800f37c .word 0x0800f37c
0800dd30 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dd30: b580 push {r7, lr}
800dd32: b082 sub sp, #8
800dd34: af00 add r7, sp, #0
800dd36: 4603 mov r3, r0
800dd38: 6039 str r1, [r7, #0]
800dd3a: 71fb strb r3, [r7, #7]
if(speed == 0)
800dd3c: 79fb ldrb r3, [r7, #7]
800dd3e: 2b00 cmp r3, #0
800dd40: d105 bne.n 800dd4e <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800dd42: 683a ldr r2, [r7, #0]
800dd44: 4907 ldr r1, [pc, #28] @ (800dd64 <USBD_FS_InterfaceStrDescriptor+0x34>)
800dd46: 4808 ldr r0, [pc, #32] @ (800dd68 <USBD_FS_InterfaceStrDescriptor+0x38>)
800dd48: f7ff fd2d bl 800d7a6 <USBD_GetString>
800dd4c: e004 b.n 800dd58 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800dd4e: 683a ldr r2, [r7, #0]
800dd50: 4904 ldr r1, [pc, #16] @ (800dd64 <USBD_FS_InterfaceStrDescriptor+0x34>)
800dd52: 4805 ldr r0, [pc, #20] @ (800dd68 <USBD_FS_InterfaceStrDescriptor+0x38>)
800dd54: f7ff fd27 bl 800d7a6 <USBD_GetString>
}
return USBD_StrDesc;
800dd58: 4b02 ldr r3, [pc, #8] @ (800dd64 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
800dd5a: 4618 mov r0, r3
800dd5c: 3708 adds r7, #8
800dd5e: 46bd mov sp, r7
800dd60: bd80 pop {r7, pc}
800dd62: bf00 nop
800dd64: 20001064 .word 0x20001064
800dd68: 0800f388 .word 0x0800f388
0800dd6c <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
800dd6c: b580 push {r7, lr}
800dd6e: b084 sub sp, #16
800dd70: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800dd72: 4b0f ldr r3, [pc, #60] @ (800ddb0 <Get_SerialNum+0x44>)
800dd74: 681b ldr r3, [r3, #0]
800dd76: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
800dd78: 4b0e ldr r3, [pc, #56] @ (800ddb4 <Get_SerialNum+0x48>)
800dd7a: 681b ldr r3, [r3, #0]
800dd7c: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800dd7e: 4b0e ldr r3, [pc, #56] @ (800ddb8 <Get_SerialNum+0x4c>)
800dd80: 681b ldr r3, [r3, #0]
800dd82: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800dd84: 68fa ldr r2, [r7, #12]
800dd86: 687b ldr r3, [r7, #4]
800dd88: 4413 add r3, r2
800dd8a: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800dd8c: 68fb ldr r3, [r7, #12]
800dd8e: 2b00 cmp r3, #0
800dd90: d009 beq.n 800dda6 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800dd92: 2208 movs r2, #8
800dd94: 4909 ldr r1, [pc, #36] @ (800ddbc <Get_SerialNum+0x50>)
800dd96: 68f8 ldr r0, [r7, #12]
800dd98: f000 f814 bl 800ddc4 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800dd9c: 2204 movs r2, #4
800dd9e: 4908 ldr r1, [pc, #32] @ (800ddc0 <Get_SerialNum+0x54>)
800dda0: 68b8 ldr r0, [r7, #8]
800dda2: f000 f80f bl 800ddc4 <IntToUnicode>
}
}
800dda6: bf00 nop
800dda8: 3710 adds r7, #16
800ddaa: 46bd mov sp, r7
800ddac: bd80 pop {r7, pc}
800ddae: bf00 nop
800ddb0: 1ffff7e8 .word 0x1ffff7e8
800ddb4: 1ffff7ec .word 0x1ffff7ec
800ddb8: 1ffff7f0 .word 0x1ffff7f0
800ddbc: 20000172 .word 0x20000172
800ddc0: 20000182 .word 0x20000182
0800ddc4 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800ddc4: b480 push {r7}
800ddc6: b087 sub sp, #28
800ddc8: af00 add r7, sp, #0
800ddca: 60f8 str r0, [r7, #12]
800ddcc: 60b9 str r1, [r7, #8]
800ddce: 4613 mov r3, r2
800ddd0: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800ddd2: 2300 movs r3, #0
800ddd4: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800ddd6: 2300 movs r3, #0
800ddd8: 75fb strb r3, [r7, #23]
800ddda: e027 b.n 800de2c <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800dddc: 68fb ldr r3, [r7, #12]
800ddde: 0f1b lsrs r3, r3, #28
800dde0: 2b09 cmp r3, #9
800dde2: d80b bhi.n 800ddfc <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800dde4: 68fb ldr r3, [r7, #12]
800dde6: 0f1b lsrs r3, r3, #28
800dde8: b2da uxtb r2, r3
800ddea: 7dfb ldrb r3, [r7, #23]
800ddec: 005b lsls r3, r3, #1
800ddee: 4619 mov r1, r3
800ddf0: 68bb ldr r3, [r7, #8]
800ddf2: 440b add r3, r1
800ddf4: 3230 adds r2, #48 @ 0x30
800ddf6: b2d2 uxtb r2, r2
800ddf8: 701a strb r2, [r3, #0]
800ddfa: e00a b.n 800de12 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800ddfc: 68fb ldr r3, [r7, #12]
800ddfe: 0f1b lsrs r3, r3, #28
800de00: b2da uxtb r2, r3
800de02: 7dfb ldrb r3, [r7, #23]
800de04: 005b lsls r3, r3, #1
800de06: 4619 mov r1, r3
800de08: 68bb ldr r3, [r7, #8]
800de0a: 440b add r3, r1
800de0c: 3237 adds r2, #55 @ 0x37
800de0e: b2d2 uxtb r2, r2
800de10: 701a strb r2, [r3, #0]
}
value = value << 4;
800de12: 68fb ldr r3, [r7, #12]
800de14: 011b lsls r3, r3, #4
800de16: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800de18: 7dfb ldrb r3, [r7, #23]
800de1a: 005b lsls r3, r3, #1
800de1c: 3301 adds r3, #1
800de1e: 68ba ldr r2, [r7, #8]
800de20: 4413 add r3, r2
800de22: 2200 movs r2, #0
800de24: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800de26: 7dfb ldrb r3, [r7, #23]
800de28: 3301 adds r3, #1
800de2a: 75fb strb r3, [r7, #23]
800de2c: 7dfa ldrb r2, [r7, #23]
800de2e: 79fb ldrb r3, [r7, #7]
800de30: 429a cmp r2, r3
800de32: d3d3 bcc.n 800dddc <IntToUnicode+0x18>
}
}
800de34: bf00 nop
800de36: bf00 nop
800de38: 371c adds r7, #28
800de3a: 46bd mov sp, r7
800de3c: bc80 pop {r7}
800de3e: 4770 bx lr
0800de40 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800de40: b580 push {r7, lr}
800de42: b084 sub sp, #16
800de44: af00 add r7, sp, #0
800de46: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800de48: 687b ldr r3, [r7, #4]
800de4a: 681b ldr r3, [r3, #0]
800de4c: 4a0d ldr r2, [pc, #52] @ (800de84 <HAL_PCD_MspInit+0x44>)
800de4e: 4293 cmp r3, r2
800de50: d113 bne.n 800de7a <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800de52: 4b0d ldr r3, [pc, #52] @ (800de88 <HAL_PCD_MspInit+0x48>)
800de54: 69db ldr r3, [r3, #28]
800de56: 4a0c ldr r2, [pc, #48] @ (800de88 <HAL_PCD_MspInit+0x48>)
800de58: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800de5c: 61d3 str r3, [r2, #28]
800de5e: 4b0a ldr r3, [pc, #40] @ (800de88 <HAL_PCD_MspInit+0x48>)
800de60: 69db ldr r3, [r3, #28]
800de62: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800de66: 60fb str r3, [r7, #12]
800de68: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800de6a: 2200 movs r2, #0
800de6c: 2100 movs r1, #0
800de6e: 2014 movs r0, #20
800de70: f7f7 fddb bl 8005a2a <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800de74: 2014 movs r0, #20
800de76: f7f7 fdf4 bl 8005a62 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800de7a: bf00 nop
800de7c: 3710 adds r7, #16
800de7e: 46bd mov sp, r7
800de80: bd80 pop {r7, pc}
800de82: bf00 nop
800de84: 40005c00 .word 0x40005c00
800de88: 40021000 .word 0x40021000
0800de8c <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800de8c: b580 push {r7, lr}
800de8e: b082 sub sp, #8
800de90: af00 add r7, sp, #0
800de92: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800de94: 687b ldr r3, [r7, #4]
800de96: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800de9a: 687b ldr r3, [r7, #4]
800de9c: f503 7326 add.w r3, r3, #664 @ 0x298
800dea0: 4619 mov r1, r3
800dea2: 4610 mov r0, r2
800dea4: f7fe fd51 bl 800c94a <USBD_LL_SetupStage>
}
800dea8: bf00 nop
800deaa: 3708 adds r7, #8
800deac: 46bd mov sp, r7
800deae: bd80 pop {r7, pc}
0800deb0 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800deb0: b580 push {r7, lr}
800deb2: b082 sub sp, #8
800deb4: af00 add r7, sp, #0
800deb6: 6078 str r0, [r7, #4]
800deb8: 460b mov r3, r1
800deba: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800debc: 687b ldr r3, [r7, #4]
800debe: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800dec2: 78fa ldrb r2, [r7, #3]
800dec4: 6879 ldr r1, [r7, #4]
800dec6: 4613 mov r3, r2
800dec8: 009b lsls r3, r3, #2
800deca: 4413 add r3, r2
800decc: 00db lsls r3, r3, #3
800dece: 440b add r3, r1
800ded0: f503 73b2 add.w r3, r3, #356 @ 0x164
800ded4: 681a ldr r2, [r3, #0]
800ded6: 78fb ldrb r3, [r7, #3]
800ded8: 4619 mov r1, r3
800deda: f7fe fd83 bl 800c9e4 <USBD_LL_DataOutStage>
}
800dede: bf00 nop
800dee0: 3708 adds r7, #8
800dee2: 46bd mov sp, r7
800dee4: bd80 pop {r7, pc}
0800dee6 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800dee6: b580 push {r7, lr}
800dee8: b082 sub sp, #8
800deea: af00 add r7, sp, #0
800deec: 6078 str r0, [r7, #4]
800deee: 460b mov r3, r1
800def0: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800def2: 687b ldr r3, [r7, #4]
800def4: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800def8: 78fa ldrb r2, [r7, #3]
800defa: 6879 ldr r1, [r7, #4]
800defc: 4613 mov r3, r2
800defe: 009b lsls r3, r3, #2
800df00: 4413 add r3, r2
800df02: 00db lsls r3, r3, #3
800df04: 440b add r3, r1
800df06: 3324 adds r3, #36 @ 0x24
800df08: 681a ldr r2, [r3, #0]
800df0a: 78fb ldrb r3, [r7, #3]
800df0c: 4619 mov r1, r3
800df0e: f7fe fdda bl 800cac6 <USBD_LL_DataInStage>
}
800df12: bf00 nop
800df14: 3708 adds r7, #8
800df16: 46bd mov sp, r7
800df18: bd80 pop {r7, pc}
0800df1a <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800df1a: b580 push {r7, lr}
800df1c: b082 sub sp, #8
800df1e: af00 add r7, sp, #0
800df20: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800df22: 687b ldr r3, [r7, #4]
800df24: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800df28: 4618 mov r0, r3
800df2a: f7fe feea bl 800cd02 <USBD_LL_SOF>
}
800df2e: bf00 nop
800df30: 3708 adds r7, #8
800df32: 46bd mov sp, r7
800df34: bd80 pop {r7, pc}
0800df36 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800df36: b580 push {r7, lr}
800df38: b084 sub sp, #16
800df3a: af00 add r7, sp, #0
800df3c: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800df3e: 2301 movs r3, #1
800df40: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800df42: 687b ldr r3, [r7, #4]
800df44: 799b ldrb r3, [r3, #6]
800df46: 2b02 cmp r3, #2
800df48: d001 beq.n 800df4e <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800df4a: f7f5 fb81 bl 8003650 <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800df4e: 687b ldr r3, [r7, #4]
800df50: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800df54: 7bfa ldrb r2, [r7, #15]
800df56: 4611 mov r1, r2
800df58: 4618 mov r0, r3
800df5a: f7fe fe9a bl 800cc92 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800df5e: 687b ldr r3, [r7, #4]
800df60: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800df64: 4618 mov r0, r3
800df66: f7fe fe53 bl 800cc10 <USBD_LL_Reset>
}
800df6a: bf00 nop
800df6c: 3710 adds r7, #16
800df6e: 46bd mov sp, r7
800df70: bd80 pop {r7, pc}
...
0800df74 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800df74: b580 push {r7, lr}
800df76: b082 sub sp, #8
800df78: af00 add r7, sp, #0
800df7a: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800df7c: 687b ldr r3, [r7, #4]
800df7e: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800df82: 4618 mov r0, r3
800df84: f7fe fe94 bl 800ccb0 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800df88: 687b ldr r3, [r7, #4]
800df8a: 7a9b ldrb r3, [r3, #10]
800df8c: 2b00 cmp r3, #0
800df8e: d005 beq.n 800df9c <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800df90: 4b04 ldr r3, [pc, #16] @ (800dfa4 <HAL_PCD_SuspendCallback+0x30>)
800df92: 691b ldr r3, [r3, #16]
800df94: 4a03 ldr r2, [pc, #12] @ (800dfa4 <HAL_PCD_SuspendCallback+0x30>)
800df96: f043 0306 orr.w r3, r3, #6
800df9a: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800df9c: bf00 nop
800df9e: 3708 adds r7, #8
800dfa0: 46bd mov sp, r7
800dfa2: bd80 pop {r7, pc}
800dfa4: e000ed00 .word 0xe000ed00
0800dfa8 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800dfa8: b580 push {r7, lr}
800dfaa: b082 sub sp, #8
800dfac: af00 add r7, sp, #0
800dfae: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800dfb0: 687b ldr r3, [r7, #4]
800dfb2: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800dfb6: 4618 mov r0, r3
800dfb8: f7fe fe8e bl 800ccd8 <USBD_LL_Resume>
}
800dfbc: bf00 nop
800dfbe: 3708 adds r7, #8
800dfc0: 46bd mov sp, r7
800dfc2: bd80 pop {r7, pc}
0800dfc4 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800dfc4: b580 push {r7, lr}
800dfc6: b082 sub sp, #8
800dfc8: af00 add r7, sp, #0
800dfca: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800dfcc: 4a28 ldr r2, [pc, #160] @ (800e070 <USBD_LL_Init+0xac>)
800dfce: 687b ldr r3, [r7, #4]
800dfd0: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800dfd4: 687b ldr r3, [r7, #4]
800dfd6: 4a26 ldr r2, [pc, #152] @ (800e070 <USBD_LL_Init+0xac>)
800dfd8: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800dfdc: 4b24 ldr r3, [pc, #144] @ (800e070 <USBD_LL_Init+0xac>)
800dfde: 4a25 ldr r2, [pc, #148] @ (800e074 <USBD_LL_Init+0xb0>)
800dfe0: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800dfe2: 4b23 ldr r3, [pc, #140] @ (800e070 <USBD_LL_Init+0xac>)
800dfe4: 2208 movs r2, #8
800dfe6: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800dfe8: 4b21 ldr r3, [pc, #132] @ (800e070 <USBD_LL_Init+0xac>)
800dfea: 2202 movs r2, #2
800dfec: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800dfee: 4b20 ldr r3, [pc, #128] @ (800e070 <USBD_LL_Init+0xac>)
800dff0: 2200 movs r2, #0
800dff2: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800dff4: 4b1e ldr r3, [pc, #120] @ (800e070 <USBD_LL_Init+0xac>)
800dff6: 2200 movs r2, #0
800dff8: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800dffa: 4b1d ldr r3, [pc, #116] @ (800e070 <USBD_LL_Init+0xac>)
800dffc: 2200 movs r2, #0
800dffe: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800e000: 481b ldr r0, [pc, #108] @ (800e070 <USBD_LL_Init+0xac>)
800e002: f7f8 faf0 bl 80065e6 <HAL_PCD_Init>
800e006: 4603 mov r3, r0
800e008: 2b00 cmp r3, #0
800e00a: d001 beq.n 800e010 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800e00c: f7f5 fb20 bl 8003650 <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800e010: 687b ldr r3, [r7, #4]
800e012: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e016: 2318 movs r3, #24
800e018: 2200 movs r2, #0
800e01a: 2100 movs r1, #0
800e01c: f7fa f801 bl 8008022 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800e020: 687b ldr r3, [r7, #4]
800e022: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e026: 2358 movs r3, #88 @ 0x58
800e028: 2200 movs r2, #0
800e02a: 2180 movs r1, #128 @ 0x80
800e02c: f7f9 fff9 bl 8008022 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800e030: 687b ldr r3, [r7, #4]
800e032: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e036: 23c0 movs r3, #192 @ 0xc0
800e038: 2200 movs r2, #0
800e03a: 2181 movs r1, #129 @ 0x81
800e03c: f7f9 fff1 bl 8008022 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800e040: 687b ldr r3, [r7, #4]
800e042: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e046: f44f 7388 mov.w r3, #272 @ 0x110
800e04a: 2200 movs r2, #0
800e04c: 2101 movs r1, #1
800e04e: f7f9 ffe8 bl 8008022 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800e052: 687b ldr r3, [r7, #4]
800e054: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e058: f44f 7380 mov.w r3, #256 @ 0x100
800e05c: 2200 movs r2, #0
800e05e: 2182 movs r1, #130 @ 0x82
800e060: f7f9 ffdf bl 8008022 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800e064: 2300 movs r3, #0
}
800e066: 4618 mov r0, r3
800e068: 3708 adds r7, #8
800e06a: 46bd mov sp, r7
800e06c: bd80 pop {r7, pc}
800e06e: bf00 nop
800e070: 20001264 .word 0x20001264
800e074: 40005c00 .word 0x40005c00
0800e078 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800e078: b580 push {r7, lr}
800e07a: b084 sub sp, #16
800e07c: af00 add r7, sp, #0
800e07e: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800e080: 2300 movs r3, #0
800e082: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e084: 2300 movs r3, #0
800e086: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800e088: 687b ldr r3, [r7, #4]
800e08a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e08e: 4618 mov r0, r3
800e090: f7f8 fb9f bl 80067d2 <HAL_PCD_Start>
800e094: 4603 mov r3, r0
800e096: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e098: 7bfb ldrb r3, [r7, #15]
800e09a: 4618 mov r0, r3
800e09c: f000 f94e bl 800e33c <USBD_Get_USB_Status>
800e0a0: 4603 mov r3, r0
800e0a2: 73bb strb r3, [r7, #14]
return usb_status;
800e0a4: 7bbb ldrb r3, [r7, #14]
}
800e0a6: 4618 mov r0, r3
800e0a8: 3710 adds r7, #16
800e0aa: 46bd mov sp, r7
800e0ac: bd80 pop {r7, pc}
0800e0ae <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800e0ae: b580 push {r7, lr}
800e0b0: b084 sub sp, #16
800e0b2: af00 add r7, sp, #0
800e0b4: 6078 str r0, [r7, #4]
800e0b6: 4608 mov r0, r1
800e0b8: 4611 mov r1, r2
800e0ba: 461a mov r2, r3
800e0bc: 4603 mov r3, r0
800e0be: 70fb strb r3, [r7, #3]
800e0c0: 460b mov r3, r1
800e0c2: 70bb strb r3, [r7, #2]
800e0c4: 4613 mov r3, r2
800e0c6: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800e0c8: 2300 movs r3, #0
800e0ca: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e0cc: 2300 movs r3, #0
800e0ce: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800e0d0: 687b ldr r3, [r7, #4]
800e0d2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e0d6: 78bb ldrb r3, [r7, #2]
800e0d8: 883a ldrh r2, [r7, #0]
800e0da: 78f9 ldrb r1, [r7, #3]
800e0dc: f7f8 fcf3 bl 8006ac6 <HAL_PCD_EP_Open>
800e0e0: 4603 mov r3, r0
800e0e2: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e0e4: 7bfb ldrb r3, [r7, #15]
800e0e6: 4618 mov r0, r3
800e0e8: f000 f928 bl 800e33c <USBD_Get_USB_Status>
800e0ec: 4603 mov r3, r0
800e0ee: 73bb strb r3, [r7, #14]
return usb_status;
800e0f0: 7bbb ldrb r3, [r7, #14]
}
800e0f2: 4618 mov r0, r3
800e0f4: 3710 adds r7, #16
800e0f6: 46bd mov sp, r7
800e0f8: bd80 pop {r7, pc}
0800e0fa <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e0fa: b580 push {r7, lr}
800e0fc: b084 sub sp, #16
800e0fe: af00 add r7, sp, #0
800e100: 6078 str r0, [r7, #4]
800e102: 460b mov r3, r1
800e104: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e106: 2300 movs r3, #0
800e108: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e10a: 2300 movs r3, #0
800e10c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800e10e: 687b ldr r3, [r7, #4]
800e110: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e114: 78fa ldrb r2, [r7, #3]
800e116: 4611 mov r1, r2
800e118: 4618 mov r0, r3
800e11a: f7f8 fd31 bl 8006b80 <HAL_PCD_EP_Close>
800e11e: 4603 mov r3, r0
800e120: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e122: 7bfb ldrb r3, [r7, #15]
800e124: 4618 mov r0, r3
800e126: f000 f909 bl 800e33c <USBD_Get_USB_Status>
800e12a: 4603 mov r3, r0
800e12c: 73bb strb r3, [r7, #14]
return usb_status;
800e12e: 7bbb ldrb r3, [r7, #14]
}
800e130: 4618 mov r0, r3
800e132: 3710 adds r7, #16
800e134: 46bd mov sp, r7
800e136: bd80 pop {r7, pc}
0800e138 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e138: b580 push {r7, lr}
800e13a: b084 sub sp, #16
800e13c: af00 add r7, sp, #0
800e13e: 6078 str r0, [r7, #4]
800e140: 460b mov r3, r1
800e142: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e144: 2300 movs r3, #0
800e146: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e148: 2300 movs r3, #0
800e14a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800e14c: 687b ldr r3, [r7, #4]
800e14e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e152: 78fa ldrb r2, [r7, #3]
800e154: 4611 mov r1, r2
800e156: 4618 mov r0, r3
800e158: f7f8 fdd9 bl 8006d0e <HAL_PCD_EP_SetStall>
800e15c: 4603 mov r3, r0
800e15e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e160: 7bfb ldrb r3, [r7, #15]
800e162: 4618 mov r0, r3
800e164: f000 f8ea bl 800e33c <USBD_Get_USB_Status>
800e168: 4603 mov r3, r0
800e16a: 73bb strb r3, [r7, #14]
return usb_status;
800e16c: 7bbb ldrb r3, [r7, #14]
}
800e16e: 4618 mov r0, r3
800e170: 3710 adds r7, #16
800e172: 46bd mov sp, r7
800e174: bd80 pop {r7, pc}
0800e176 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e176: b580 push {r7, lr}
800e178: b084 sub sp, #16
800e17a: af00 add r7, sp, #0
800e17c: 6078 str r0, [r7, #4]
800e17e: 460b mov r3, r1
800e180: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e182: 2300 movs r3, #0
800e184: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e186: 2300 movs r3, #0
800e188: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800e18a: 687b ldr r3, [r7, #4]
800e18c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e190: 78fa ldrb r2, [r7, #3]
800e192: 4611 mov r1, r2
800e194: 4618 mov r0, r3
800e196: f7f8 fe1a bl 8006dce <HAL_PCD_EP_ClrStall>
800e19a: 4603 mov r3, r0
800e19c: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e19e: 7bfb ldrb r3, [r7, #15]
800e1a0: 4618 mov r0, r3
800e1a2: f000 f8cb bl 800e33c <USBD_Get_USB_Status>
800e1a6: 4603 mov r3, r0
800e1a8: 73bb strb r3, [r7, #14]
return usb_status;
800e1aa: 7bbb ldrb r3, [r7, #14]
}
800e1ac: 4618 mov r0, r3
800e1ae: 3710 adds r7, #16
800e1b0: 46bd mov sp, r7
800e1b2: bd80 pop {r7, pc}
0800e1b4 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e1b4: b480 push {r7}
800e1b6: b085 sub sp, #20
800e1b8: af00 add r7, sp, #0
800e1ba: 6078 str r0, [r7, #4]
800e1bc: 460b mov r3, r1
800e1be: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800e1c0: 687b ldr r3, [r7, #4]
800e1c2: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e1c6: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800e1c8: f997 3003 ldrsb.w r3, [r7, #3]
800e1cc: 2b00 cmp r3, #0
800e1ce: da0b bge.n 800e1e8 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800e1d0: 78fb ldrb r3, [r7, #3]
800e1d2: f003 027f and.w r2, r3, #127 @ 0x7f
800e1d6: 68f9 ldr r1, [r7, #12]
800e1d8: 4613 mov r3, r2
800e1da: 009b lsls r3, r3, #2
800e1dc: 4413 add r3, r2
800e1de: 00db lsls r3, r3, #3
800e1e0: 440b add r3, r1
800e1e2: 3312 adds r3, #18
800e1e4: 781b ldrb r3, [r3, #0]
800e1e6: e00b b.n 800e200 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800e1e8: 78fb ldrb r3, [r7, #3]
800e1ea: f003 027f and.w r2, r3, #127 @ 0x7f
800e1ee: 68f9 ldr r1, [r7, #12]
800e1f0: 4613 mov r3, r2
800e1f2: 009b lsls r3, r3, #2
800e1f4: 4413 add r3, r2
800e1f6: 00db lsls r3, r3, #3
800e1f8: 440b add r3, r1
800e1fa: f503 73a9 add.w r3, r3, #338 @ 0x152
800e1fe: 781b ldrb r3, [r3, #0]
}
}
800e200: 4618 mov r0, r3
800e202: 3714 adds r7, #20
800e204: 46bd mov sp, r7
800e206: bc80 pop {r7}
800e208: 4770 bx lr
0800e20a <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800e20a: b580 push {r7, lr}
800e20c: b084 sub sp, #16
800e20e: af00 add r7, sp, #0
800e210: 6078 str r0, [r7, #4]
800e212: 460b mov r3, r1
800e214: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e216: 2300 movs r3, #0
800e218: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e21a: 2300 movs r3, #0
800e21c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800e21e: 687b ldr r3, [r7, #4]
800e220: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e224: 78fa ldrb r2, [r7, #3]
800e226: 4611 mov r1, r2
800e228: 4618 mov r0, r3
800e22a: f7f8 fc28 bl 8006a7e <HAL_PCD_SetAddress>
800e22e: 4603 mov r3, r0
800e230: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e232: 7bfb ldrb r3, [r7, #15]
800e234: 4618 mov r0, r3
800e236: f000 f881 bl 800e33c <USBD_Get_USB_Status>
800e23a: 4603 mov r3, r0
800e23c: 73bb strb r3, [r7, #14]
return usb_status;
800e23e: 7bbb ldrb r3, [r7, #14]
}
800e240: 4618 mov r0, r3
800e242: 3710 adds r7, #16
800e244: 46bd mov sp, r7
800e246: bd80 pop {r7, pc}
0800e248 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800e248: b580 push {r7, lr}
800e24a: b086 sub sp, #24
800e24c: af00 add r7, sp, #0
800e24e: 60f8 str r0, [r7, #12]
800e250: 607a str r2, [r7, #4]
800e252: 461a mov r2, r3
800e254: 460b mov r3, r1
800e256: 72fb strb r3, [r7, #11]
800e258: 4613 mov r3, r2
800e25a: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800e25c: 2300 movs r3, #0
800e25e: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800e260: 2300 movs r3, #0
800e262: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800e264: 68fb ldr r3, [r7, #12]
800e266: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e26a: 893b ldrh r3, [r7, #8]
800e26c: 7af9 ldrb r1, [r7, #11]
800e26e: 687a ldr r2, [r7, #4]
800e270: f7f8 fd16 bl 8006ca0 <HAL_PCD_EP_Transmit>
800e274: 4603 mov r3, r0
800e276: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800e278: 7dfb ldrb r3, [r7, #23]
800e27a: 4618 mov r0, r3
800e27c: f000 f85e bl 800e33c <USBD_Get_USB_Status>
800e280: 4603 mov r3, r0
800e282: 75bb strb r3, [r7, #22]
return usb_status;
800e284: 7dbb ldrb r3, [r7, #22]
}
800e286: 4618 mov r0, r3
800e288: 3718 adds r7, #24
800e28a: 46bd mov sp, r7
800e28c: bd80 pop {r7, pc}
0800e28e <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800e28e: b580 push {r7, lr}
800e290: b086 sub sp, #24
800e292: af00 add r7, sp, #0
800e294: 60f8 str r0, [r7, #12]
800e296: 607a str r2, [r7, #4]
800e298: 461a mov r2, r3
800e29a: 460b mov r3, r1
800e29c: 72fb strb r3, [r7, #11]
800e29e: 4613 mov r3, r2
800e2a0: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800e2a2: 2300 movs r3, #0
800e2a4: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800e2a6: 2300 movs r3, #0
800e2a8: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800e2aa: 68fb ldr r3, [r7, #12]
800e2ac: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e2b0: 893b ldrh r3, [r7, #8]
800e2b2: 7af9 ldrb r1, [r7, #11]
800e2b4: 687a ldr r2, [r7, #4]
800e2b6: f7f8 fcab bl 8006c10 <HAL_PCD_EP_Receive>
800e2ba: 4603 mov r3, r0
800e2bc: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800e2be: 7dfb ldrb r3, [r7, #23]
800e2c0: 4618 mov r0, r3
800e2c2: f000 f83b bl 800e33c <USBD_Get_USB_Status>
800e2c6: 4603 mov r3, r0
800e2c8: 75bb strb r3, [r7, #22]
return usb_status;
800e2ca: 7dbb ldrb r3, [r7, #22]
}
800e2cc: 4618 mov r0, r3
800e2ce: 3718 adds r7, #24
800e2d0: 46bd mov sp, r7
800e2d2: bd80 pop {r7, pc}
0800e2d4 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e2d4: b580 push {r7, lr}
800e2d6: b082 sub sp, #8
800e2d8: af00 add r7, sp, #0
800e2da: 6078 str r0, [r7, #4]
800e2dc: 460b mov r3, r1
800e2de: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800e2e0: 687b ldr r3, [r7, #4]
800e2e2: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e2e6: 78fa ldrb r2, [r7, #3]
800e2e8: 4611 mov r1, r2
800e2ea: 4618 mov r0, r3
800e2ec: f7f8 fcc1 bl 8006c72 <HAL_PCD_EP_GetRxCount>
800e2f0: 4603 mov r3, r0
}
800e2f2: 4618 mov r0, r3
800e2f4: 3708 adds r7, #8
800e2f6: 46bd mov sp, r7
800e2f8: bd80 pop {r7, pc}
...
0800e2fc <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800e2fc: b480 push {r7}
800e2fe: b083 sub sp, #12
800e300: af00 add r7, sp, #0
800e302: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800e304: 4b02 ldr r3, [pc, #8] @ (800e310 <USBD_static_malloc+0x14>)
}
800e306: 4618 mov r0, r3
800e308: 370c adds r7, #12
800e30a: 46bd mov sp, r7
800e30c: bc80 pop {r7}
800e30e: 4770 bx lr
800e310: 2000153c .word 0x2000153c
0800e314 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800e314: b480 push {r7}
800e316: b083 sub sp, #12
800e318: af00 add r7, sp, #0
800e31a: 6078 str r0, [r7, #4]
}
800e31c: bf00 nop
800e31e: 370c adds r7, #12
800e320: 46bd mov sp, r7
800e322: bc80 pop {r7}
800e324: 4770 bx lr
0800e326 <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800e326: b480 push {r7}
800e328: b083 sub sp, #12
800e32a: af00 add r7, sp, #0
800e32c: 6078 str r0, [r7, #4]
800e32e: 460b mov r3, r1
800e330: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800e332: bf00 nop
800e334: 370c adds r7, #12
800e336: 46bd mov sp, r7
800e338: bc80 pop {r7}
800e33a: 4770 bx lr
0800e33c <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800e33c: b480 push {r7}
800e33e: b085 sub sp, #20
800e340: af00 add r7, sp, #0
800e342: 4603 mov r3, r0
800e344: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800e346: 2300 movs r3, #0
800e348: 73fb strb r3, [r7, #15]
switch (hal_status)
800e34a: 79fb ldrb r3, [r7, #7]
800e34c: 2b03 cmp r3, #3
800e34e: d817 bhi.n 800e380 <USBD_Get_USB_Status+0x44>
800e350: a201 add r2, pc, #4 @ (adr r2, 800e358 <USBD_Get_USB_Status+0x1c>)
800e352: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e356: bf00 nop
800e358: 0800e369 .word 0x0800e369
800e35c: 0800e36f .word 0x0800e36f
800e360: 0800e375 .word 0x0800e375
800e364: 0800e37b .word 0x0800e37b
{
case HAL_OK :
usb_status = USBD_OK;
800e368: 2300 movs r3, #0
800e36a: 73fb strb r3, [r7, #15]
break;
800e36c: e00b b.n 800e386 <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800e36e: 2302 movs r3, #2
800e370: 73fb strb r3, [r7, #15]
break;
800e372: e008 b.n 800e386 <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800e374: 2301 movs r3, #1
800e376: 73fb strb r3, [r7, #15]
break;
800e378: e005 b.n 800e386 <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800e37a: 2302 movs r3, #2
800e37c: 73fb strb r3, [r7, #15]
break;
800e37e: e002 b.n 800e386 <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800e380: 2302 movs r3, #2
800e382: 73fb strb r3, [r7, #15]
break;
800e384: bf00 nop
}
return usb_status;
800e386: 7bfb ldrb r3, [r7, #15]
}
800e388: 4618 mov r0, r3
800e38a: 3714 adds r7, #20
800e38c: 46bd mov sp, r7
800e38e: bc80 pop {r7}
800e390: 4770 bx lr
800e392: bf00 nop
0800e394 <siprintf>:
800e394: b40e push {r1, r2, r3}
800e396: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800e39a: b510 push {r4, lr}
800e39c: 2400 movs r4, #0
800e39e: b09d sub sp, #116 @ 0x74
800e3a0: ab1f add r3, sp, #124 @ 0x7c
800e3a2: 9002 str r0, [sp, #8]
800e3a4: 9006 str r0, [sp, #24]
800e3a6: 9107 str r1, [sp, #28]
800e3a8: 9104 str r1, [sp, #16]
800e3aa: 4809 ldr r0, [pc, #36] @ (800e3d0 <siprintf+0x3c>)
800e3ac: 4909 ldr r1, [pc, #36] @ (800e3d4 <siprintf+0x40>)
800e3ae: f853 2b04 ldr.w r2, [r3], #4
800e3b2: 9105 str r1, [sp, #20]
800e3b4: 6800 ldr r0, [r0, #0]
800e3b6: a902 add r1, sp, #8
800e3b8: 9301 str r3, [sp, #4]
800e3ba: 941b str r4, [sp, #108] @ 0x6c
800e3bc: f000 f992 bl 800e6e4 <_svfiprintf_r>
800e3c0: 9b02 ldr r3, [sp, #8]
800e3c2: 701c strb r4, [r3, #0]
800e3c4: b01d add sp, #116 @ 0x74
800e3c6: e8bd 4010 ldmia.w sp!, {r4, lr}
800e3ca: b003 add sp, #12
800e3cc: 4770 bx lr
800e3ce: bf00 nop
800e3d0: 2000018c .word 0x2000018c
800e3d4: ffff0208 .word 0xffff0208
0800e3d8 <memset>:
800e3d8: 4603 mov r3, r0
800e3da: 4402 add r2, r0
800e3dc: 4293 cmp r3, r2
800e3de: d100 bne.n 800e3e2 <memset+0xa>
800e3e0: 4770 bx lr
800e3e2: f803 1b01 strb.w r1, [r3], #1
800e3e6: e7f9 b.n 800e3dc <memset+0x4>
0800e3e8 <__errno>:
800e3e8: 4b01 ldr r3, [pc, #4] @ (800e3f0 <__errno+0x8>)
800e3ea: 6818 ldr r0, [r3, #0]
800e3ec: 4770 bx lr
800e3ee: bf00 nop
800e3f0: 2000018c .word 0x2000018c
0800e3f4 <__libc_init_array>:
800e3f4: b570 push {r4, r5, r6, lr}
800e3f6: 2600 movs r6, #0
800e3f8: 4d0c ldr r5, [pc, #48] @ (800e42c <__libc_init_array+0x38>)
800e3fa: 4c0d ldr r4, [pc, #52] @ (800e430 <__libc_init_array+0x3c>)
800e3fc: 1b64 subs r4, r4, r5
800e3fe: 10a4 asrs r4, r4, #2
800e400: 42a6 cmp r6, r4
800e402: d109 bne.n 800e418 <__libc_init_array+0x24>
800e404: f000 fc76 bl 800ecf4 <_init>
800e408: 2600 movs r6, #0
800e40a: 4d0a ldr r5, [pc, #40] @ (800e434 <__libc_init_array+0x40>)
800e40c: 4c0a ldr r4, [pc, #40] @ (800e438 <__libc_init_array+0x44>)
800e40e: 1b64 subs r4, r4, r5
800e410: 10a4 asrs r4, r4, #2
800e412: 42a6 cmp r6, r4
800e414: d105 bne.n 800e422 <__libc_init_array+0x2e>
800e416: bd70 pop {r4, r5, r6, pc}
800e418: f855 3b04 ldr.w r3, [r5], #4
800e41c: 4798 blx r3
800e41e: 3601 adds r6, #1
800e420: e7ee b.n 800e400 <__libc_init_array+0xc>
800e422: f855 3b04 ldr.w r3, [r5], #4
800e426: 4798 blx r3
800e428: 3601 adds r6, #1
800e42a: e7f2 b.n 800e412 <__libc_init_array+0x1e>
800e42c: 0800f500 .word 0x0800f500
800e430: 0800f500 .word 0x0800f500
800e434: 0800f500 .word 0x0800f500
800e438: 0800f504 .word 0x0800f504
0800e43c <__retarget_lock_acquire_recursive>:
800e43c: 4770 bx lr
0800e43e <__retarget_lock_release_recursive>:
800e43e: 4770 bx lr
0800e440 <_free_r>:
800e440: b538 push {r3, r4, r5, lr}
800e442: 4605 mov r5, r0
800e444: 2900 cmp r1, #0
800e446: d040 beq.n 800e4ca <_free_r+0x8a>
800e448: f851 3c04 ldr.w r3, [r1, #-4]
800e44c: 1f0c subs r4, r1, #4
800e44e: 2b00 cmp r3, #0
800e450: bfb8 it lt
800e452: 18e4 addlt r4, r4, r3
800e454: f000 f8de bl 800e614 <__malloc_lock>
800e458: 4a1c ldr r2, [pc, #112] @ (800e4cc <_free_r+0x8c>)
800e45a: 6813 ldr r3, [r2, #0]
800e45c: b933 cbnz r3, 800e46c <_free_r+0x2c>
800e45e: 6063 str r3, [r4, #4]
800e460: 6014 str r4, [r2, #0]
800e462: 4628 mov r0, r5
800e464: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800e468: f000 b8da b.w 800e620 <__malloc_unlock>
800e46c: 42a3 cmp r3, r4
800e46e: d908 bls.n 800e482 <_free_r+0x42>
800e470: 6820 ldr r0, [r4, #0]
800e472: 1821 adds r1, r4, r0
800e474: 428b cmp r3, r1
800e476: bf01 itttt eq
800e478: 6819 ldreq r1, [r3, #0]
800e47a: 685b ldreq r3, [r3, #4]
800e47c: 1809 addeq r1, r1, r0
800e47e: 6021 streq r1, [r4, #0]
800e480: e7ed b.n 800e45e <_free_r+0x1e>
800e482: 461a mov r2, r3
800e484: 685b ldr r3, [r3, #4]
800e486: b10b cbz r3, 800e48c <_free_r+0x4c>
800e488: 42a3 cmp r3, r4
800e48a: d9fa bls.n 800e482 <_free_r+0x42>
800e48c: 6811 ldr r1, [r2, #0]
800e48e: 1850 adds r0, r2, r1
800e490: 42a0 cmp r0, r4
800e492: d10b bne.n 800e4ac <_free_r+0x6c>
800e494: 6820 ldr r0, [r4, #0]
800e496: 4401 add r1, r0
800e498: 1850 adds r0, r2, r1
800e49a: 4283 cmp r3, r0
800e49c: 6011 str r1, [r2, #0]
800e49e: d1e0 bne.n 800e462 <_free_r+0x22>
800e4a0: 6818 ldr r0, [r3, #0]
800e4a2: 685b ldr r3, [r3, #4]
800e4a4: 4408 add r0, r1
800e4a6: 6010 str r0, [r2, #0]
800e4a8: 6053 str r3, [r2, #4]
800e4aa: e7da b.n 800e462 <_free_r+0x22>
800e4ac: d902 bls.n 800e4b4 <_free_r+0x74>
800e4ae: 230c movs r3, #12
800e4b0: 602b str r3, [r5, #0]
800e4b2: e7d6 b.n 800e462 <_free_r+0x22>
800e4b4: 6820 ldr r0, [r4, #0]
800e4b6: 1821 adds r1, r4, r0
800e4b8: 428b cmp r3, r1
800e4ba: bf01 itttt eq
800e4bc: 6819 ldreq r1, [r3, #0]
800e4be: 685b ldreq r3, [r3, #4]
800e4c0: 1809 addeq r1, r1, r0
800e4c2: 6021 streq r1, [r4, #0]
800e4c4: 6063 str r3, [r4, #4]
800e4c6: 6054 str r4, [r2, #4]
800e4c8: e7cb b.n 800e462 <_free_r+0x22>
800e4ca: bd38 pop {r3, r4, r5, pc}
800e4cc: 200018a0 .word 0x200018a0
0800e4d0 <sbrk_aligned>:
800e4d0: b570 push {r4, r5, r6, lr}
800e4d2: 4e0f ldr r6, [pc, #60] @ (800e510 <sbrk_aligned+0x40>)
800e4d4: 460c mov r4, r1
800e4d6: 6831 ldr r1, [r6, #0]
800e4d8: 4605 mov r5, r0
800e4da: b911 cbnz r1, 800e4e2 <sbrk_aligned+0x12>
800e4dc: f000 fba8 bl 800ec30 <_sbrk_r>
800e4e0: 6030 str r0, [r6, #0]
800e4e2: 4621 mov r1, r4
800e4e4: 4628 mov r0, r5
800e4e6: f000 fba3 bl 800ec30 <_sbrk_r>
800e4ea: 1c43 adds r3, r0, #1
800e4ec: d103 bne.n 800e4f6 <sbrk_aligned+0x26>
800e4ee: f04f 34ff mov.w r4, #4294967295
800e4f2: 4620 mov r0, r4
800e4f4: bd70 pop {r4, r5, r6, pc}
800e4f6: 1cc4 adds r4, r0, #3
800e4f8: f024 0403 bic.w r4, r4, #3
800e4fc: 42a0 cmp r0, r4
800e4fe: d0f8 beq.n 800e4f2 <sbrk_aligned+0x22>
800e500: 1a21 subs r1, r4, r0
800e502: 4628 mov r0, r5
800e504: f000 fb94 bl 800ec30 <_sbrk_r>
800e508: 3001 adds r0, #1
800e50a: d1f2 bne.n 800e4f2 <sbrk_aligned+0x22>
800e50c: e7ef b.n 800e4ee <sbrk_aligned+0x1e>
800e50e: bf00 nop
800e510: 2000189c .word 0x2000189c
0800e514 <_malloc_r>:
800e514: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800e518: 1ccd adds r5, r1, #3
800e51a: f025 0503 bic.w r5, r5, #3
800e51e: 3508 adds r5, #8
800e520: 2d0c cmp r5, #12
800e522: bf38 it cc
800e524: 250c movcc r5, #12
800e526: 2d00 cmp r5, #0
800e528: 4606 mov r6, r0
800e52a: db01 blt.n 800e530 <_malloc_r+0x1c>
800e52c: 42a9 cmp r1, r5
800e52e: d904 bls.n 800e53a <_malloc_r+0x26>
800e530: 230c movs r3, #12
800e532: 6033 str r3, [r6, #0]
800e534: 2000 movs r0, #0
800e536: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800e53a: f8df 80d4 ldr.w r8, [pc, #212] @ 800e610 <_malloc_r+0xfc>
800e53e: f000 f869 bl 800e614 <__malloc_lock>
800e542: f8d8 3000 ldr.w r3, [r8]
800e546: 461c mov r4, r3
800e548: bb44 cbnz r4, 800e59c <_malloc_r+0x88>
800e54a: 4629 mov r1, r5
800e54c: 4630 mov r0, r6
800e54e: f7ff ffbf bl 800e4d0 <sbrk_aligned>
800e552: 1c43 adds r3, r0, #1
800e554: 4604 mov r4, r0
800e556: d158 bne.n 800e60a <_malloc_r+0xf6>
800e558: f8d8 4000 ldr.w r4, [r8]
800e55c: 4627 mov r7, r4
800e55e: 2f00 cmp r7, #0
800e560: d143 bne.n 800e5ea <_malloc_r+0xd6>
800e562: 2c00 cmp r4, #0
800e564: d04b beq.n 800e5fe <_malloc_r+0xea>
800e566: 6823 ldr r3, [r4, #0]
800e568: 4639 mov r1, r7
800e56a: 4630 mov r0, r6
800e56c: eb04 0903 add.w r9, r4, r3
800e570: f000 fb5e bl 800ec30 <_sbrk_r>
800e574: 4581 cmp r9, r0
800e576: d142 bne.n 800e5fe <_malloc_r+0xea>
800e578: 6821 ldr r1, [r4, #0]
800e57a: 4630 mov r0, r6
800e57c: 1a6d subs r5, r5, r1
800e57e: 4629 mov r1, r5
800e580: f7ff ffa6 bl 800e4d0 <sbrk_aligned>
800e584: 3001 adds r0, #1
800e586: d03a beq.n 800e5fe <_malloc_r+0xea>
800e588: 6823 ldr r3, [r4, #0]
800e58a: 442b add r3, r5
800e58c: 6023 str r3, [r4, #0]
800e58e: f8d8 3000 ldr.w r3, [r8]
800e592: 685a ldr r2, [r3, #4]
800e594: bb62 cbnz r2, 800e5f0 <_malloc_r+0xdc>
800e596: f8c8 7000 str.w r7, [r8]
800e59a: e00f b.n 800e5bc <_malloc_r+0xa8>
800e59c: 6822 ldr r2, [r4, #0]
800e59e: 1b52 subs r2, r2, r5
800e5a0: d420 bmi.n 800e5e4 <_malloc_r+0xd0>
800e5a2: 2a0b cmp r2, #11
800e5a4: d917 bls.n 800e5d6 <_malloc_r+0xc2>
800e5a6: 1961 adds r1, r4, r5
800e5a8: 42a3 cmp r3, r4
800e5aa: 6025 str r5, [r4, #0]
800e5ac: bf18 it ne
800e5ae: 6059 strne r1, [r3, #4]
800e5b0: 6863 ldr r3, [r4, #4]
800e5b2: bf08 it eq
800e5b4: f8c8 1000 streq.w r1, [r8]
800e5b8: 5162 str r2, [r4, r5]
800e5ba: 604b str r3, [r1, #4]
800e5bc: 4630 mov r0, r6
800e5be: f000 f82f bl 800e620 <__malloc_unlock>
800e5c2: f104 000b add.w r0, r4, #11
800e5c6: 1d23 adds r3, r4, #4
800e5c8: f020 0007 bic.w r0, r0, #7
800e5cc: 1ac2 subs r2, r0, r3
800e5ce: bf1c itt ne
800e5d0: 1a1b subne r3, r3, r0
800e5d2: 50a3 strne r3, [r4, r2]
800e5d4: e7af b.n 800e536 <_malloc_r+0x22>
800e5d6: 6862 ldr r2, [r4, #4]
800e5d8: 42a3 cmp r3, r4
800e5da: bf0c ite eq
800e5dc: f8c8 2000 streq.w r2, [r8]
800e5e0: 605a strne r2, [r3, #4]
800e5e2: e7eb b.n 800e5bc <_malloc_r+0xa8>
800e5e4: 4623 mov r3, r4
800e5e6: 6864 ldr r4, [r4, #4]
800e5e8: e7ae b.n 800e548 <_malloc_r+0x34>
800e5ea: 463c mov r4, r7
800e5ec: 687f ldr r7, [r7, #4]
800e5ee: e7b6 b.n 800e55e <_malloc_r+0x4a>
800e5f0: 461a mov r2, r3
800e5f2: 685b ldr r3, [r3, #4]
800e5f4: 42a3 cmp r3, r4
800e5f6: d1fb bne.n 800e5f0 <_malloc_r+0xdc>
800e5f8: 2300 movs r3, #0
800e5fa: 6053 str r3, [r2, #4]
800e5fc: e7de b.n 800e5bc <_malloc_r+0xa8>
800e5fe: 230c movs r3, #12
800e600: 4630 mov r0, r6
800e602: 6033 str r3, [r6, #0]
800e604: f000 f80c bl 800e620 <__malloc_unlock>
800e608: e794 b.n 800e534 <_malloc_r+0x20>
800e60a: 6005 str r5, [r0, #0]
800e60c: e7d6 b.n 800e5bc <_malloc_r+0xa8>
800e60e: bf00 nop
800e610: 200018a0 .word 0x200018a0
0800e614 <__malloc_lock>:
800e614: 4801 ldr r0, [pc, #4] @ (800e61c <__malloc_lock+0x8>)
800e616: f7ff bf11 b.w 800e43c <__retarget_lock_acquire_recursive>
800e61a: bf00 nop
800e61c: 20001898 .word 0x20001898
0800e620 <__malloc_unlock>:
800e620: 4801 ldr r0, [pc, #4] @ (800e628 <__malloc_unlock+0x8>)
800e622: f7ff bf0c b.w 800e43e <__retarget_lock_release_recursive>
800e626: bf00 nop
800e628: 20001898 .word 0x20001898
0800e62c <__ssputs_r>:
800e62c: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e630: 461f mov r7, r3
800e632: 688e ldr r6, [r1, #8]
800e634: 4682 mov sl, r0
800e636: 42be cmp r6, r7
800e638: 460c mov r4, r1
800e63a: 4690 mov r8, r2
800e63c: 680b ldr r3, [r1, #0]
800e63e: d82d bhi.n 800e69c <__ssputs_r+0x70>
800e640: f9b1 200c ldrsh.w r2, [r1, #12]
800e644: f412 6f90 tst.w r2, #1152 @ 0x480
800e648: d026 beq.n 800e698 <__ssputs_r+0x6c>
800e64a: 6965 ldr r5, [r4, #20]
800e64c: 6909 ldr r1, [r1, #16]
800e64e: eb05 0545 add.w r5, r5, r5, lsl #1
800e652: eba3 0901 sub.w r9, r3, r1
800e656: eb05 75d5 add.w r5, r5, r5, lsr #31
800e65a: 1c7b adds r3, r7, #1
800e65c: 444b add r3, r9
800e65e: 106d asrs r5, r5, #1
800e660: 429d cmp r5, r3
800e662: bf38 it cc
800e664: 461d movcc r5, r3
800e666: 0553 lsls r3, r2, #21
800e668: d527 bpl.n 800e6ba <__ssputs_r+0x8e>
800e66a: 4629 mov r1, r5
800e66c: f7ff ff52 bl 800e514 <_malloc_r>
800e670: 4606 mov r6, r0
800e672: b360 cbz r0, 800e6ce <__ssputs_r+0xa2>
800e674: 464a mov r2, r9
800e676: 6921 ldr r1, [r4, #16]
800e678: f000 faf8 bl 800ec6c <memcpy>
800e67c: 89a3 ldrh r3, [r4, #12]
800e67e: f423 6390 bic.w r3, r3, #1152 @ 0x480
800e682: f043 0380 orr.w r3, r3, #128 @ 0x80
800e686: 81a3 strh r3, [r4, #12]
800e688: 6126 str r6, [r4, #16]
800e68a: 444e add r6, r9
800e68c: 6026 str r6, [r4, #0]
800e68e: 463e mov r6, r7
800e690: 6165 str r5, [r4, #20]
800e692: eba5 0509 sub.w r5, r5, r9
800e696: 60a5 str r5, [r4, #8]
800e698: 42be cmp r6, r7
800e69a: d900 bls.n 800e69e <__ssputs_r+0x72>
800e69c: 463e mov r6, r7
800e69e: 4632 mov r2, r6
800e6a0: 4641 mov r1, r8
800e6a2: 6820 ldr r0, [r4, #0]
800e6a4: f000 faaa bl 800ebfc <memmove>
800e6a8: 2000 movs r0, #0
800e6aa: 68a3 ldr r3, [r4, #8]
800e6ac: 1b9b subs r3, r3, r6
800e6ae: 60a3 str r3, [r4, #8]
800e6b0: 6823 ldr r3, [r4, #0]
800e6b2: 4433 add r3, r6
800e6b4: 6023 str r3, [r4, #0]
800e6b6: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e6ba: 462a mov r2, r5
800e6bc: f000 fae4 bl 800ec88 <_realloc_r>
800e6c0: 4606 mov r6, r0
800e6c2: 2800 cmp r0, #0
800e6c4: d1e0 bne.n 800e688 <__ssputs_r+0x5c>
800e6c6: 4650 mov r0, sl
800e6c8: 6921 ldr r1, [r4, #16]
800e6ca: f7ff feb9 bl 800e440 <_free_r>
800e6ce: 230c movs r3, #12
800e6d0: f8ca 3000 str.w r3, [sl]
800e6d4: 89a3 ldrh r3, [r4, #12]
800e6d6: f04f 30ff mov.w r0, #4294967295
800e6da: f043 0340 orr.w r3, r3, #64 @ 0x40
800e6de: 81a3 strh r3, [r4, #12]
800e6e0: e7e9 b.n 800e6b6 <__ssputs_r+0x8a>
...
0800e6e4 <_svfiprintf_r>:
800e6e4: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800e6e8: 4698 mov r8, r3
800e6ea: 898b ldrh r3, [r1, #12]
800e6ec: 4607 mov r7, r0
800e6ee: 061b lsls r3, r3, #24
800e6f0: 460d mov r5, r1
800e6f2: 4614 mov r4, r2
800e6f4: b09d sub sp, #116 @ 0x74
800e6f6: d510 bpl.n 800e71a <_svfiprintf_r+0x36>
800e6f8: 690b ldr r3, [r1, #16]
800e6fa: b973 cbnz r3, 800e71a <_svfiprintf_r+0x36>
800e6fc: 2140 movs r1, #64 @ 0x40
800e6fe: f7ff ff09 bl 800e514 <_malloc_r>
800e702: 6028 str r0, [r5, #0]
800e704: 6128 str r0, [r5, #16]
800e706: b930 cbnz r0, 800e716 <_svfiprintf_r+0x32>
800e708: 230c movs r3, #12
800e70a: 603b str r3, [r7, #0]
800e70c: f04f 30ff mov.w r0, #4294967295
800e710: b01d add sp, #116 @ 0x74
800e712: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800e716: 2340 movs r3, #64 @ 0x40
800e718: 616b str r3, [r5, #20]
800e71a: 2300 movs r3, #0
800e71c: 9309 str r3, [sp, #36] @ 0x24
800e71e: 2320 movs r3, #32
800e720: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800e724: 2330 movs r3, #48 @ 0x30
800e726: f04f 0901 mov.w r9, #1
800e72a: f8cd 800c str.w r8, [sp, #12]
800e72e: f8df 8198 ldr.w r8, [pc, #408] @ 800e8c8 <_svfiprintf_r+0x1e4>
800e732: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800e736: 4623 mov r3, r4
800e738: 469a mov sl, r3
800e73a: f813 2b01 ldrb.w r2, [r3], #1
800e73e: b10a cbz r2, 800e744 <_svfiprintf_r+0x60>
800e740: 2a25 cmp r2, #37 @ 0x25
800e742: d1f9 bne.n 800e738 <_svfiprintf_r+0x54>
800e744: ebba 0b04 subs.w fp, sl, r4
800e748: d00b beq.n 800e762 <_svfiprintf_r+0x7e>
800e74a: 465b mov r3, fp
800e74c: 4622 mov r2, r4
800e74e: 4629 mov r1, r5
800e750: 4638 mov r0, r7
800e752: f7ff ff6b bl 800e62c <__ssputs_r>
800e756: 3001 adds r0, #1
800e758: f000 80a7 beq.w 800e8aa <_svfiprintf_r+0x1c6>
800e75c: 9a09 ldr r2, [sp, #36] @ 0x24
800e75e: 445a add r2, fp
800e760: 9209 str r2, [sp, #36] @ 0x24
800e762: f89a 3000 ldrb.w r3, [sl]
800e766: 2b00 cmp r3, #0
800e768: f000 809f beq.w 800e8aa <_svfiprintf_r+0x1c6>
800e76c: 2300 movs r3, #0
800e76e: f04f 32ff mov.w r2, #4294967295
800e772: e9cd 2305 strd r2, r3, [sp, #20]
800e776: f10a 0a01 add.w sl, sl, #1
800e77a: 9304 str r3, [sp, #16]
800e77c: 9307 str r3, [sp, #28]
800e77e: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800e782: 931a str r3, [sp, #104] @ 0x68
800e784: 4654 mov r4, sl
800e786: 2205 movs r2, #5
800e788: f814 1b01 ldrb.w r1, [r4], #1
800e78c: 484e ldr r0, [pc, #312] @ (800e8c8 <_svfiprintf_r+0x1e4>)
800e78e: f000 fa5f bl 800ec50 <memchr>
800e792: 9a04 ldr r2, [sp, #16]
800e794: b9d8 cbnz r0, 800e7ce <_svfiprintf_r+0xea>
800e796: 06d0 lsls r0, r2, #27
800e798: bf44 itt mi
800e79a: 2320 movmi r3, #32
800e79c: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e7a0: 0711 lsls r1, r2, #28
800e7a2: bf44 itt mi
800e7a4: 232b movmi r3, #43 @ 0x2b
800e7a6: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e7aa: f89a 3000 ldrb.w r3, [sl]
800e7ae: 2b2a cmp r3, #42 @ 0x2a
800e7b0: d015 beq.n 800e7de <_svfiprintf_r+0xfa>
800e7b2: 4654 mov r4, sl
800e7b4: 2000 movs r0, #0
800e7b6: f04f 0c0a mov.w ip, #10
800e7ba: 9a07 ldr r2, [sp, #28]
800e7bc: 4621 mov r1, r4
800e7be: f811 3b01 ldrb.w r3, [r1], #1
800e7c2: 3b30 subs r3, #48 @ 0x30
800e7c4: 2b09 cmp r3, #9
800e7c6: d94b bls.n 800e860 <_svfiprintf_r+0x17c>
800e7c8: b1b0 cbz r0, 800e7f8 <_svfiprintf_r+0x114>
800e7ca: 9207 str r2, [sp, #28]
800e7cc: e014 b.n 800e7f8 <_svfiprintf_r+0x114>
800e7ce: eba0 0308 sub.w r3, r0, r8
800e7d2: fa09 f303 lsl.w r3, r9, r3
800e7d6: 4313 orrs r3, r2
800e7d8: 46a2 mov sl, r4
800e7da: 9304 str r3, [sp, #16]
800e7dc: e7d2 b.n 800e784 <_svfiprintf_r+0xa0>
800e7de: 9b03 ldr r3, [sp, #12]
800e7e0: 1d19 adds r1, r3, #4
800e7e2: 681b ldr r3, [r3, #0]
800e7e4: 9103 str r1, [sp, #12]
800e7e6: 2b00 cmp r3, #0
800e7e8: bfbb ittet lt
800e7ea: 425b neglt r3, r3
800e7ec: f042 0202 orrlt.w r2, r2, #2
800e7f0: 9307 strge r3, [sp, #28]
800e7f2: 9307 strlt r3, [sp, #28]
800e7f4: bfb8 it lt
800e7f6: 9204 strlt r2, [sp, #16]
800e7f8: 7823 ldrb r3, [r4, #0]
800e7fa: 2b2e cmp r3, #46 @ 0x2e
800e7fc: d10a bne.n 800e814 <_svfiprintf_r+0x130>
800e7fe: 7863 ldrb r3, [r4, #1]
800e800: 2b2a cmp r3, #42 @ 0x2a
800e802: d132 bne.n 800e86a <_svfiprintf_r+0x186>
800e804: 9b03 ldr r3, [sp, #12]
800e806: 3402 adds r4, #2
800e808: 1d1a adds r2, r3, #4
800e80a: 681b ldr r3, [r3, #0]
800e80c: 9203 str r2, [sp, #12]
800e80e: ea43 73e3 orr.w r3, r3, r3, asr #31
800e812: 9305 str r3, [sp, #20]
800e814: f8df a0b4 ldr.w sl, [pc, #180] @ 800e8cc <_svfiprintf_r+0x1e8>
800e818: 2203 movs r2, #3
800e81a: 4650 mov r0, sl
800e81c: 7821 ldrb r1, [r4, #0]
800e81e: f000 fa17 bl 800ec50 <memchr>
800e822: b138 cbz r0, 800e834 <_svfiprintf_r+0x150>
800e824: 2240 movs r2, #64 @ 0x40
800e826: 9b04 ldr r3, [sp, #16]
800e828: eba0 000a sub.w r0, r0, sl
800e82c: 4082 lsls r2, r0
800e82e: 4313 orrs r3, r2
800e830: 3401 adds r4, #1
800e832: 9304 str r3, [sp, #16]
800e834: f814 1b01 ldrb.w r1, [r4], #1
800e838: 2206 movs r2, #6
800e83a: 4825 ldr r0, [pc, #148] @ (800e8d0 <_svfiprintf_r+0x1ec>)
800e83c: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800e840: f000 fa06 bl 800ec50 <memchr>
800e844: 2800 cmp r0, #0
800e846: d036 beq.n 800e8b6 <_svfiprintf_r+0x1d2>
800e848: 4b22 ldr r3, [pc, #136] @ (800e8d4 <_svfiprintf_r+0x1f0>)
800e84a: bb1b cbnz r3, 800e894 <_svfiprintf_r+0x1b0>
800e84c: 9b03 ldr r3, [sp, #12]
800e84e: 3307 adds r3, #7
800e850: f023 0307 bic.w r3, r3, #7
800e854: 3308 adds r3, #8
800e856: 9303 str r3, [sp, #12]
800e858: 9b09 ldr r3, [sp, #36] @ 0x24
800e85a: 4433 add r3, r6
800e85c: 9309 str r3, [sp, #36] @ 0x24
800e85e: e76a b.n 800e736 <_svfiprintf_r+0x52>
800e860: 460c mov r4, r1
800e862: 2001 movs r0, #1
800e864: fb0c 3202 mla r2, ip, r2, r3
800e868: e7a8 b.n 800e7bc <_svfiprintf_r+0xd8>
800e86a: 2300 movs r3, #0
800e86c: f04f 0c0a mov.w ip, #10
800e870: 4619 mov r1, r3
800e872: 3401 adds r4, #1
800e874: 9305 str r3, [sp, #20]
800e876: 4620 mov r0, r4
800e878: f810 2b01 ldrb.w r2, [r0], #1
800e87c: 3a30 subs r2, #48 @ 0x30
800e87e: 2a09 cmp r2, #9
800e880: d903 bls.n 800e88a <_svfiprintf_r+0x1a6>
800e882: 2b00 cmp r3, #0
800e884: d0c6 beq.n 800e814 <_svfiprintf_r+0x130>
800e886: 9105 str r1, [sp, #20]
800e888: e7c4 b.n 800e814 <_svfiprintf_r+0x130>
800e88a: 4604 mov r4, r0
800e88c: 2301 movs r3, #1
800e88e: fb0c 2101 mla r1, ip, r1, r2
800e892: e7f0 b.n 800e876 <_svfiprintf_r+0x192>
800e894: ab03 add r3, sp, #12
800e896: 9300 str r3, [sp, #0]
800e898: 462a mov r2, r5
800e89a: 4638 mov r0, r7
800e89c: 4b0e ldr r3, [pc, #56] @ (800e8d8 <_svfiprintf_r+0x1f4>)
800e89e: a904 add r1, sp, #16
800e8a0: f3af 8000 nop.w
800e8a4: 1c42 adds r2, r0, #1
800e8a6: 4606 mov r6, r0
800e8a8: d1d6 bne.n 800e858 <_svfiprintf_r+0x174>
800e8aa: 89ab ldrh r3, [r5, #12]
800e8ac: 065b lsls r3, r3, #25
800e8ae: f53f af2d bmi.w 800e70c <_svfiprintf_r+0x28>
800e8b2: 9809 ldr r0, [sp, #36] @ 0x24
800e8b4: e72c b.n 800e710 <_svfiprintf_r+0x2c>
800e8b6: ab03 add r3, sp, #12
800e8b8: 9300 str r3, [sp, #0]
800e8ba: 462a mov r2, r5
800e8bc: 4638 mov r0, r7
800e8be: 4b06 ldr r3, [pc, #24] @ (800e8d8 <_svfiprintf_r+0x1f4>)
800e8c0: a904 add r1, sp, #16
800e8c2: f000 f87d bl 800e9c0 <_printf_i>
800e8c6: e7ed b.n 800e8a4 <_svfiprintf_r+0x1c0>
800e8c8: 0800f4c2 .word 0x0800f4c2
800e8cc: 0800f4c8 .word 0x0800f4c8
800e8d0: 0800f4cc .word 0x0800f4cc
800e8d4: 00000000 .word 0x00000000
800e8d8: 0800e62d .word 0x0800e62d
0800e8dc <_printf_common>:
800e8dc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e8e0: 4616 mov r6, r2
800e8e2: 4698 mov r8, r3
800e8e4: 688a ldr r2, [r1, #8]
800e8e6: 690b ldr r3, [r1, #16]
800e8e8: 4607 mov r7, r0
800e8ea: 4293 cmp r3, r2
800e8ec: bfb8 it lt
800e8ee: 4613 movlt r3, r2
800e8f0: 6033 str r3, [r6, #0]
800e8f2: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800e8f6: 460c mov r4, r1
800e8f8: f8dd 9020 ldr.w r9, [sp, #32]
800e8fc: b10a cbz r2, 800e902 <_printf_common+0x26>
800e8fe: 3301 adds r3, #1
800e900: 6033 str r3, [r6, #0]
800e902: 6823 ldr r3, [r4, #0]
800e904: 0699 lsls r1, r3, #26
800e906: bf42 ittt mi
800e908: 6833 ldrmi r3, [r6, #0]
800e90a: 3302 addmi r3, #2
800e90c: 6033 strmi r3, [r6, #0]
800e90e: 6825 ldr r5, [r4, #0]
800e910: f015 0506 ands.w r5, r5, #6
800e914: d106 bne.n 800e924 <_printf_common+0x48>
800e916: f104 0a19 add.w sl, r4, #25
800e91a: 68e3 ldr r3, [r4, #12]
800e91c: 6832 ldr r2, [r6, #0]
800e91e: 1a9b subs r3, r3, r2
800e920: 42ab cmp r3, r5
800e922: dc2b bgt.n 800e97c <_printf_common+0xa0>
800e924: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800e928: 6822 ldr r2, [r4, #0]
800e92a: 3b00 subs r3, #0
800e92c: bf18 it ne
800e92e: 2301 movne r3, #1
800e930: 0692 lsls r2, r2, #26
800e932: d430 bmi.n 800e996 <_printf_common+0xba>
800e934: 4641 mov r1, r8
800e936: 4638 mov r0, r7
800e938: f104 0243 add.w r2, r4, #67 @ 0x43
800e93c: 47c8 blx r9
800e93e: 3001 adds r0, #1
800e940: d023 beq.n 800e98a <_printf_common+0xae>
800e942: 6823 ldr r3, [r4, #0]
800e944: 6922 ldr r2, [r4, #16]
800e946: f003 0306 and.w r3, r3, #6
800e94a: 2b04 cmp r3, #4
800e94c: bf14 ite ne
800e94e: 2500 movne r5, #0
800e950: 6833 ldreq r3, [r6, #0]
800e952: f04f 0600 mov.w r6, #0
800e956: bf08 it eq
800e958: 68e5 ldreq r5, [r4, #12]
800e95a: f104 041a add.w r4, r4, #26
800e95e: bf08 it eq
800e960: 1aed subeq r5, r5, r3
800e962: f854 3c12 ldr.w r3, [r4, #-18]
800e966: bf08 it eq
800e968: ea25 75e5 biceq.w r5, r5, r5, asr #31
800e96c: 4293 cmp r3, r2
800e96e: bfc4 itt gt
800e970: 1a9b subgt r3, r3, r2
800e972: 18ed addgt r5, r5, r3
800e974: 42b5 cmp r5, r6
800e976: d11a bne.n 800e9ae <_printf_common+0xd2>
800e978: 2000 movs r0, #0
800e97a: e008 b.n 800e98e <_printf_common+0xb2>
800e97c: 2301 movs r3, #1
800e97e: 4652 mov r2, sl
800e980: 4641 mov r1, r8
800e982: 4638 mov r0, r7
800e984: 47c8 blx r9
800e986: 3001 adds r0, #1
800e988: d103 bne.n 800e992 <_printf_common+0xb6>
800e98a: f04f 30ff mov.w r0, #4294967295
800e98e: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e992: 3501 adds r5, #1
800e994: e7c1 b.n 800e91a <_printf_common+0x3e>
800e996: 2030 movs r0, #48 @ 0x30
800e998: 18e1 adds r1, r4, r3
800e99a: f881 0043 strb.w r0, [r1, #67] @ 0x43
800e99e: 1c5a adds r2, r3, #1
800e9a0: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800e9a4: 4422 add r2, r4
800e9a6: 3302 adds r3, #2
800e9a8: f882 1043 strb.w r1, [r2, #67] @ 0x43
800e9ac: e7c2 b.n 800e934 <_printf_common+0x58>
800e9ae: 2301 movs r3, #1
800e9b0: 4622 mov r2, r4
800e9b2: 4641 mov r1, r8
800e9b4: 4638 mov r0, r7
800e9b6: 47c8 blx r9
800e9b8: 3001 adds r0, #1
800e9ba: d0e6 beq.n 800e98a <_printf_common+0xae>
800e9bc: 3601 adds r6, #1
800e9be: e7d9 b.n 800e974 <_printf_common+0x98>
0800e9c0 <_printf_i>:
800e9c0: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800e9c4: 7e0f ldrb r7, [r1, #24]
800e9c6: 4691 mov r9, r2
800e9c8: 2f78 cmp r7, #120 @ 0x78
800e9ca: 4680 mov r8, r0
800e9cc: 460c mov r4, r1
800e9ce: 469a mov sl, r3
800e9d0: 9e0c ldr r6, [sp, #48] @ 0x30
800e9d2: f101 0243 add.w r2, r1, #67 @ 0x43
800e9d6: d807 bhi.n 800e9e8 <_printf_i+0x28>
800e9d8: 2f62 cmp r7, #98 @ 0x62
800e9da: d80a bhi.n 800e9f2 <_printf_i+0x32>
800e9dc: 2f00 cmp r7, #0
800e9de: f000 80d1 beq.w 800eb84 <_printf_i+0x1c4>
800e9e2: 2f58 cmp r7, #88 @ 0x58
800e9e4: f000 80b8 beq.w 800eb58 <_printf_i+0x198>
800e9e8: f104 0642 add.w r6, r4, #66 @ 0x42
800e9ec: f884 7042 strb.w r7, [r4, #66] @ 0x42
800e9f0: e03a b.n 800ea68 <_printf_i+0xa8>
800e9f2: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800e9f6: 2b15 cmp r3, #21
800e9f8: d8f6 bhi.n 800e9e8 <_printf_i+0x28>
800e9fa: a101 add r1, pc, #4 @ (adr r1, 800ea00 <_printf_i+0x40>)
800e9fc: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800ea00: 0800ea59 .word 0x0800ea59
800ea04: 0800ea6d .word 0x0800ea6d
800ea08: 0800e9e9 .word 0x0800e9e9
800ea0c: 0800e9e9 .word 0x0800e9e9
800ea10: 0800e9e9 .word 0x0800e9e9
800ea14: 0800e9e9 .word 0x0800e9e9
800ea18: 0800ea6d .word 0x0800ea6d
800ea1c: 0800e9e9 .word 0x0800e9e9
800ea20: 0800e9e9 .word 0x0800e9e9
800ea24: 0800e9e9 .word 0x0800e9e9
800ea28: 0800e9e9 .word 0x0800e9e9
800ea2c: 0800eb6b .word 0x0800eb6b
800ea30: 0800ea97 .word 0x0800ea97
800ea34: 0800eb25 .word 0x0800eb25
800ea38: 0800e9e9 .word 0x0800e9e9
800ea3c: 0800e9e9 .word 0x0800e9e9
800ea40: 0800eb8d .word 0x0800eb8d
800ea44: 0800e9e9 .word 0x0800e9e9
800ea48: 0800ea97 .word 0x0800ea97
800ea4c: 0800e9e9 .word 0x0800e9e9
800ea50: 0800e9e9 .word 0x0800e9e9
800ea54: 0800eb2d .word 0x0800eb2d
800ea58: 6833 ldr r3, [r6, #0]
800ea5a: 1d1a adds r2, r3, #4
800ea5c: 681b ldr r3, [r3, #0]
800ea5e: 6032 str r2, [r6, #0]
800ea60: f104 0642 add.w r6, r4, #66 @ 0x42
800ea64: f884 3042 strb.w r3, [r4, #66] @ 0x42
800ea68: 2301 movs r3, #1
800ea6a: e09c b.n 800eba6 <_printf_i+0x1e6>
800ea6c: 6833 ldr r3, [r6, #0]
800ea6e: 6820 ldr r0, [r4, #0]
800ea70: 1d19 adds r1, r3, #4
800ea72: 6031 str r1, [r6, #0]
800ea74: 0606 lsls r6, r0, #24
800ea76: d501 bpl.n 800ea7c <_printf_i+0xbc>
800ea78: 681d ldr r5, [r3, #0]
800ea7a: e003 b.n 800ea84 <_printf_i+0xc4>
800ea7c: 0645 lsls r5, r0, #25
800ea7e: d5fb bpl.n 800ea78 <_printf_i+0xb8>
800ea80: f9b3 5000 ldrsh.w r5, [r3]
800ea84: 2d00 cmp r5, #0
800ea86: da03 bge.n 800ea90 <_printf_i+0xd0>
800ea88: 232d movs r3, #45 @ 0x2d
800ea8a: 426d negs r5, r5
800ea8c: f884 3043 strb.w r3, [r4, #67] @ 0x43
800ea90: 230a movs r3, #10
800ea92: 4858 ldr r0, [pc, #352] @ (800ebf4 <_printf_i+0x234>)
800ea94: e011 b.n 800eaba <_printf_i+0xfa>
800ea96: 6821 ldr r1, [r4, #0]
800ea98: 6833 ldr r3, [r6, #0]
800ea9a: 0608 lsls r0, r1, #24
800ea9c: f853 5b04 ldr.w r5, [r3], #4
800eaa0: d402 bmi.n 800eaa8 <_printf_i+0xe8>
800eaa2: 0649 lsls r1, r1, #25
800eaa4: bf48 it mi
800eaa6: b2ad uxthmi r5, r5
800eaa8: 2f6f cmp r7, #111 @ 0x6f
800eaaa: 6033 str r3, [r6, #0]
800eaac: bf14 ite ne
800eaae: 230a movne r3, #10
800eab0: 2308 moveq r3, #8
800eab2: 4850 ldr r0, [pc, #320] @ (800ebf4 <_printf_i+0x234>)
800eab4: 2100 movs r1, #0
800eab6: f884 1043 strb.w r1, [r4, #67] @ 0x43
800eaba: 6866 ldr r6, [r4, #4]
800eabc: 2e00 cmp r6, #0
800eabe: 60a6 str r6, [r4, #8]
800eac0: db05 blt.n 800eace <_printf_i+0x10e>
800eac2: 6821 ldr r1, [r4, #0]
800eac4: 432e orrs r6, r5
800eac6: f021 0104 bic.w r1, r1, #4
800eaca: 6021 str r1, [r4, #0]
800eacc: d04b beq.n 800eb66 <_printf_i+0x1a6>
800eace: 4616 mov r6, r2
800ead0: fbb5 f1f3 udiv r1, r5, r3
800ead4: fb03 5711 mls r7, r3, r1, r5
800ead8: 5dc7 ldrb r7, [r0, r7]
800eada: f806 7d01 strb.w r7, [r6, #-1]!
800eade: 462f mov r7, r5
800eae0: 42bb cmp r3, r7
800eae2: 460d mov r5, r1
800eae4: d9f4 bls.n 800ead0 <_printf_i+0x110>
800eae6: 2b08 cmp r3, #8
800eae8: d10b bne.n 800eb02 <_printf_i+0x142>
800eaea: 6823 ldr r3, [r4, #0]
800eaec: 07df lsls r7, r3, #31
800eaee: d508 bpl.n 800eb02 <_printf_i+0x142>
800eaf0: 6923 ldr r3, [r4, #16]
800eaf2: 6861 ldr r1, [r4, #4]
800eaf4: 4299 cmp r1, r3
800eaf6: bfde ittt le
800eaf8: 2330 movle r3, #48 @ 0x30
800eafa: f806 3c01 strble.w r3, [r6, #-1]
800eafe: f106 36ff addle.w r6, r6, #4294967295
800eb02: 1b92 subs r2, r2, r6
800eb04: 6122 str r2, [r4, #16]
800eb06: 464b mov r3, r9
800eb08: 4621 mov r1, r4
800eb0a: 4640 mov r0, r8
800eb0c: f8cd a000 str.w sl, [sp]
800eb10: aa03 add r2, sp, #12
800eb12: f7ff fee3 bl 800e8dc <_printf_common>
800eb16: 3001 adds r0, #1
800eb18: d14a bne.n 800ebb0 <_printf_i+0x1f0>
800eb1a: f04f 30ff mov.w r0, #4294967295
800eb1e: b004 add sp, #16
800eb20: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800eb24: 6823 ldr r3, [r4, #0]
800eb26: f043 0320 orr.w r3, r3, #32
800eb2a: 6023 str r3, [r4, #0]
800eb2c: 2778 movs r7, #120 @ 0x78
800eb2e: 4832 ldr r0, [pc, #200] @ (800ebf8 <_printf_i+0x238>)
800eb30: f884 7045 strb.w r7, [r4, #69] @ 0x45
800eb34: 6823 ldr r3, [r4, #0]
800eb36: 6831 ldr r1, [r6, #0]
800eb38: 061f lsls r7, r3, #24
800eb3a: f851 5b04 ldr.w r5, [r1], #4
800eb3e: d402 bmi.n 800eb46 <_printf_i+0x186>
800eb40: 065f lsls r7, r3, #25
800eb42: bf48 it mi
800eb44: b2ad uxthmi r5, r5
800eb46: 6031 str r1, [r6, #0]
800eb48: 07d9 lsls r1, r3, #31
800eb4a: bf44 itt mi
800eb4c: f043 0320 orrmi.w r3, r3, #32
800eb50: 6023 strmi r3, [r4, #0]
800eb52: b11d cbz r5, 800eb5c <_printf_i+0x19c>
800eb54: 2310 movs r3, #16
800eb56: e7ad b.n 800eab4 <_printf_i+0xf4>
800eb58: 4826 ldr r0, [pc, #152] @ (800ebf4 <_printf_i+0x234>)
800eb5a: e7e9 b.n 800eb30 <_printf_i+0x170>
800eb5c: 6823 ldr r3, [r4, #0]
800eb5e: f023 0320 bic.w r3, r3, #32
800eb62: 6023 str r3, [r4, #0]
800eb64: e7f6 b.n 800eb54 <_printf_i+0x194>
800eb66: 4616 mov r6, r2
800eb68: e7bd b.n 800eae6 <_printf_i+0x126>
800eb6a: 6833 ldr r3, [r6, #0]
800eb6c: 6825 ldr r5, [r4, #0]
800eb6e: 1d18 adds r0, r3, #4
800eb70: 6961 ldr r1, [r4, #20]
800eb72: 6030 str r0, [r6, #0]
800eb74: 062e lsls r6, r5, #24
800eb76: 681b ldr r3, [r3, #0]
800eb78: d501 bpl.n 800eb7e <_printf_i+0x1be>
800eb7a: 6019 str r1, [r3, #0]
800eb7c: e002 b.n 800eb84 <_printf_i+0x1c4>
800eb7e: 0668 lsls r0, r5, #25
800eb80: d5fb bpl.n 800eb7a <_printf_i+0x1ba>
800eb82: 8019 strh r1, [r3, #0]
800eb84: 2300 movs r3, #0
800eb86: 4616 mov r6, r2
800eb88: 6123 str r3, [r4, #16]
800eb8a: e7bc b.n 800eb06 <_printf_i+0x146>
800eb8c: 6833 ldr r3, [r6, #0]
800eb8e: 2100 movs r1, #0
800eb90: 1d1a adds r2, r3, #4
800eb92: 6032 str r2, [r6, #0]
800eb94: 681e ldr r6, [r3, #0]
800eb96: 6862 ldr r2, [r4, #4]
800eb98: 4630 mov r0, r6
800eb9a: f000 f859 bl 800ec50 <memchr>
800eb9e: b108 cbz r0, 800eba4 <_printf_i+0x1e4>
800eba0: 1b80 subs r0, r0, r6
800eba2: 6060 str r0, [r4, #4]
800eba4: 6863 ldr r3, [r4, #4]
800eba6: 6123 str r3, [r4, #16]
800eba8: 2300 movs r3, #0
800ebaa: f884 3043 strb.w r3, [r4, #67] @ 0x43
800ebae: e7aa b.n 800eb06 <_printf_i+0x146>
800ebb0: 4632 mov r2, r6
800ebb2: 4649 mov r1, r9
800ebb4: 4640 mov r0, r8
800ebb6: 6923 ldr r3, [r4, #16]
800ebb8: 47d0 blx sl
800ebba: 3001 adds r0, #1
800ebbc: d0ad beq.n 800eb1a <_printf_i+0x15a>
800ebbe: 6823 ldr r3, [r4, #0]
800ebc0: 079b lsls r3, r3, #30
800ebc2: d413 bmi.n 800ebec <_printf_i+0x22c>
800ebc4: 68e0 ldr r0, [r4, #12]
800ebc6: 9b03 ldr r3, [sp, #12]
800ebc8: 4298 cmp r0, r3
800ebca: bfb8 it lt
800ebcc: 4618 movlt r0, r3
800ebce: e7a6 b.n 800eb1e <_printf_i+0x15e>
800ebd0: 2301 movs r3, #1
800ebd2: 4632 mov r2, r6
800ebd4: 4649 mov r1, r9
800ebd6: 4640 mov r0, r8
800ebd8: 47d0 blx sl
800ebda: 3001 adds r0, #1
800ebdc: d09d beq.n 800eb1a <_printf_i+0x15a>
800ebde: 3501 adds r5, #1
800ebe0: 68e3 ldr r3, [r4, #12]
800ebe2: 9903 ldr r1, [sp, #12]
800ebe4: 1a5b subs r3, r3, r1
800ebe6: 42ab cmp r3, r5
800ebe8: dcf2 bgt.n 800ebd0 <_printf_i+0x210>
800ebea: e7eb b.n 800ebc4 <_printf_i+0x204>
800ebec: 2500 movs r5, #0
800ebee: f104 0619 add.w r6, r4, #25
800ebf2: e7f5 b.n 800ebe0 <_printf_i+0x220>
800ebf4: 0800f4d3 .word 0x0800f4d3
800ebf8: 0800f4e4 .word 0x0800f4e4
0800ebfc <memmove>:
800ebfc: 4288 cmp r0, r1
800ebfe: b510 push {r4, lr}
800ec00: eb01 0402 add.w r4, r1, r2
800ec04: d902 bls.n 800ec0c <memmove+0x10>
800ec06: 4284 cmp r4, r0
800ec08: 4623 mov r3, r4
800ec0a: d807 bhi.n 800ec1c <memmove+0x20>
800ec0c: 1e43 subs r3, r0, #1
800ec0e: 42a1 cmp r1, r4
800ec10: d008 beq.n 800ec24 <memmove+0x28>
800ec12: f811 2b01 ldrb.w r2, [r1], #1
800ec16: f803 2f01 strb.w r2, [r3, #1]!
800ec1a: e7f8 b.n 800ec0e <memmove+0x12>
800ec1c: 4601 mov r1, r0
800ec1e: 4402 add r2, r0
800ec20: 428a cmp r2, r1
800ec22: d100 bne.n 800ec26 <memmove+0x2a>
800ec24: bd10 pop {r4, pc}
800ec26: f813 4d01 ldrb.w r4, [r3, #-1]!
800ec2a: f802 4d01 strb.w r4, [r2, #-1]!
800ec2e: e7f7 b.n 800ec20 <memmove+0x24>
0800ec30 <_sbrk_r>:
800ec30: b538 push {r3, r4, r5, lr}
800ec32: 2300 movs r3, #0
800ec34: 4d05 ldr r5, [pc, #20] @ (800ec4c <_sbrk_r+0x1c>)
800ec36: 4604 mov r4, r0
800ec38: 4608 mov r0, r1
800ec3a: 602b str r3, [r5, #0]
800ec3c: f7f6 f98e bl 8004f5c <_sbrk>
800ec40: 1c43 adds r3, r0, #1
800ec42: d102 bne.n 800ec4a <_sbrk_r+0x1a>
800ec44: 682b ldr r3, [r5, #0]
800ec46: b103 cbz r3, 800ec4a <_sbrk_r+0x1a>
800ec48: 6023 str r3, [r4, #0]
800ec4a: bd38 pop {r3, r4, r5, pc}
800ec4c: 20001894 .word 0x20001894
0800ec50 <memchr>:
800ec50: 4603 mov r3, r0
800ec52: b510 push {r4, lr}
800ec54: b2c9 uxtb r1, r1
800ec56: 4402 add r2, r0
800ec58: 4293 cmp r3, r2
800ec5a: 4618 mov r0, r3
800ec5c: d101 bne.n 800ec62 <memchr+0x12>
800ec5e: 2000 movs r0, #0
800ec60: e003 b.n 800ec6a <memchr+0x1a>
800ec62: 7804 ldrb r4, [r0, #0]
800ec64: 3301 adds r3, #1
800ec66: 428c cmp r4, r1
800ec68: d1f6 bne.n 800ec58 <memchr+0x8>
800ec6a: bd10 pop {r4, pc}
0800ec6c <memcpy>:
800ec6c: 440a add r2, r1
800ec6e: 4291 cmp r1, r2
800ec70: f100 33ff add.w r3, r0, #4294967295
800ec74: d100 bne.n 800ec78 <memcpy+0xc>
800ec76: 4770 bx lr
800ec78: b510 push {r4, lr}
800ec7a: f811 4b01 ldrb.w r4, [r1], #1
800ec7e: 4291 cmp r1, r2
800ec80: f803 4f01 strb.w r4, [r3, #1]!
800ec84: d1f9 bne.n 800ec7a <memcpy+0xe>
800ec86: bd10 pop {r4, pc}
0800ec88 <_realloc_r>:
800ec88: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800ec8c: 4607 mov r7, r0
800ec8e: 4614 mov r4, r2
800ec90: 460d mov r5, r1
800ec92: b921 cbnz r1, 800ec9e <_realloc_r+0x16>
800ec94: 4611 mov r1, r2
800ec96: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800ec9a: f7ff bc3b b.w 800e514 <_malloc_r>
800ec9e: b92a cbnz r2, 800ecac <_realloc_r+0x24>
800eca0: f7ff fbce bl 800e440 <_free_r>
800eca4: 4625 mov r5, r4
800eca6: 4628 mov r0, r5
800eca8: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800ecac: f000 f81a bl 800ece4 <_malloc_usable_size_r>
800ecb0: 4284 cmp r4, r0
800ecb2: 4606 mov r6, r0
800ecb4: d802 bhi.n 800ecbc <_realloc_r+0x34>
800ecb6: ebb4 0f50 cmp.w r4, r0, lsr #1
800ecba: d8f4 bhi.n 800eca6 <_realloc_r+0x1e>
800ecbc: 4621 mov r1, r4
800ecbe: 4638 mov r0, r7
800ecc0: f7ff fc28 bl 800e514 <_malloc_r>
800ecc4: 4680 mov r8, r0
800ecc6: b908 cbnz r0, 800eccc <_realloc_r+0x44>
800ecc8: 4645 mov r5, r8
800ecca: e7ec b.n 800eca6 <_realloc_r+0x1e>
800eccc: 42b4 cmp r4, r6
800ecce: 4622 mov r2, r4
800ecd0: 4629 mov r1, r5
800ecd2: bf28 it cs
800ecd4: 4632 movcs r2, r6
800ecd6: f7ff ffc9 bl 800ec6c <memcpy>
800ecda: 4629 mov r1, r5
800ecdc: 4638 mov r0, r7
800ecde: f7ff fbaf bl 800e440 <_free_r>
800ece2: e7f1 b.n 800ecc8 <_realloc_r+0x40>
0800ece4 <_malloc_usable_size_r>:
800ece4: f851 3c04 ldr.w r3, [r1, #-4]
800ece8: 1f18 subs r0, r3, #4
800ecea: 2b00 cmp r3, #0
800ecec: bfbc itt lt
800ecee: 580b ldrlt r3, [r1, r0]
800ecf0: 18c0 addlt r0, r0, r3
800ecf2: 4770 bx lr
0800ecf4 <_init>:
800ecf4: b5f8 push {r3, r4, r5, r6, r7, lr}
800ecf6: bf00 nop
800ecf8: bcf8 pop {r3, r4, r5, r6, r7}
800ecfa: bc08 pop {r3}
800ecfc: 469e mov lr, r3
800ecfe: 4770 bx lr
0800ed00 <_fini>:
800ed00: b5f8 push {r3, r4, r5, r6, r7, lr}
800ed02: bf00 nop
800ed04: bcf8 pop {r3, r4, r5, r6, r7}
800ed06: bc08 pop {r3}
800ed08: 469e mov lr, r3
800ed0a: 4770 bx lr
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