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e38f1455efea514f9b483a0b7a911aa7df6d07b8
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
andrea e38f1455ef wip
2026-05-14 18:40:43 +02:00

35001 lines
1.3 MiB
Raw Blame History

AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000e5a4 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 00000610 0800e6b0 0800e6b0 0000f6b0 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800ecc0 0800ecc0 000101dc 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800ecc0 0800ecc0 0000fcc0 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800ecc8 0800ecc8 000101dc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800ecc8 0800ecc8 0000fcc8 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800eccc 0800eccc 0000fccc 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001dc 20000000 0800ecd0 00010000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 000016bc 200001e0 0800eeac 000101e0 2**3
ALLOC
10 ._user_heap_stack 00000604 2000189c 0800eeac 0001089c 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 000101dc 2**0
CONTENTS, READONLY
12 .debug_info 0001a4c2 00000000 00000000 00010205 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 000049f6 00000000 00000000 0002a6c7 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 000016a0 00000000 00000000 0002f0c0 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 0000115b 00000000 00000000 00030760 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001d16a 00000000 00000000 000318bb 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001ef9e 00000000 00000000 0004ea25 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 00095e03 00000000 00000000 0006d9c3 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 001037c6 2**0
CONTENTS, READONLY
20 .debug_frame 00006170 00000000 00000000 0010380c 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 0010997c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001e0 .word 0x200001e0
8000128: 00000000 .word 0x00000000
800012c: 0800e698 .word 0x0800e698
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001e4 .word 0x200001e4
8000148: 0800e698 .word 0x0800e698
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <manageAdc>:
uint16_t ch5 ;
uint16_t ch6 ;
uint16_t ch7 ;
uint16_t ch8 ;
void manageAdc(void){
800015c: b480 push {r7}
800015e: af00 add r7, sp, #0
if (adc_avg_ready)
8000160: 4b12 ldr r3, [pc, #72] @ (80001ac <manageAdc+0x50>)
8000162: 781b ldrb r3, [r3, #0]
8000164: b2db uxtb r3, r3
8000166: 2b00 cmp r3, #0
8000168: d01b beq.n 80001a2 <manageAdc+0x46>
{
adc_avg_ready = 0;
800016a: 4b10 ldr r3, [pc, #64] @ (80001ac <manageAdc+0x50>)
800016c: 2200 movs r2, #0
800016e: 701a strb r2, [r3, #0]
// Read averaged channels (example mapping)
ch4 = adc_avg[0];
8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 <manageAdc+0x54>)
8000172: 881b ldrh r3, [r3, #0]
8000174: b29a uxth r2, r3
8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 <manageAdc+0x58>)
8000178: 801a strh r2, [r3, #0]
ch5 = adc_avg[1];
800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 <manageAdc+0x54>)
800017c: 885b ldrh r3, [r3, #2]
800017e: b29a uxth r2, r3
8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 <manageAdc+0x5c>)
8000182: 801a strh r2, [r3, #0]
ch6 = adc_avg[2];
8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 <manageAdc+0x54>)
8000186: 889b ldrh r3, [r3, #4]
8000188: b29a uxth r2, r3
800018a: 4b0c ldr r3, [pc, #48] @ (80001bc <manageAdc+0x60>)
800018c: 801a strh r2, [r3, #0]
ch7 = adc_avg[3];
800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 <manageAdc+0x54>)
8000190: 88db ldrh r3, [r3, #6]
8000192: b29a uxth r2, r3
8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 <manageAdc+0x64>)
8000196: 801a strh r2, [r3, #0]
ch8 = adc_avg[4];
8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 <manageAdc+0x54>)
800019a: 891b ldrh r3, [r3, #8]
800019c: b29a uxth r2, r3
800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 <manageAdc+0x68>)
80001a0: 801a strh r2, [r3, #0]
// Use them (convert to volts, control, etc.)
// float v4 = (3.3f * ch4) / 4095.0f;
}
}
80001a2: bf00 nop
80001a4: 46bd mov sp, r7
80001a6: bc80 pop {r7}
80001a8: 4770 bx lr
80001aa: bf00 nop
80001ac: 20000229 .word 0x20000229
80001b0: 20000208 .word 0x20000208
80001b4: 2000022a .word 0x2000022a
80001b8: 2000022c .word 0x2000022c
80001bc: 2000022e .word 0x2000022e
80001c0: 20000230 .word 0x20000230
80001c4: 20000232 .word 0x20000232
080001c8 <readAdc>:
void readAdc(void){
80001c8: b480 push {r7}
80001ca: b083 sub sp, #12
80001cc: af00 add r7, sp, #0
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001ce: 2300 movs r3, #0
80001d0: 71fb strb r3, [r7, #7]
80001d2: e010 b.n 80001f6 <readAdc+0x2e>
{
adc_sum[i] += adc_dma_buf[i];
80001d4: 79fb ldrb r3, [r7, #7]
80001d6: 4a21 ldr r2, [pc, #132] @ (800025c <readAdc+0x94>)
80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80001dc: b299 uxth r1, r3
80001de: 79fb ldrb r3, [r7, #7]
80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 <readAdc+0x98>)
80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2]
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 440a add r2, r1
80001ea: 491d ldr r1, [pc, #116] @ (8000260 <readAdc+0x98>)
80001ec: f841 2023 str.w r2, [r1, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001f0: 79fb ldrb r3, [r7, #7]
80001f2: 3301 adds r3, #1
80001f4: 71fb strb r3, [r7, #7]
80001f6: 79fb ldrb r3, [r7, #7]
80001f8: 2b04 cmp r3, #4
80001fa: d9eb bls.n 80001d4 <readAdc+0xc>
}
adc_sum_count++;
80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 <readAdc+0x9c>)
80001fe: 781b ldrb r3, [r3, #0]
8000200: 3301 adds r3, #1
8000202: b2da uxtb r2, r3
8000204: 4b17 ldr r3, [pc, #92] @ (8000264 <readAdc+0x9c>)
8000206: 701a strb r2, [r3, #0]
/* When we collected ADC_AVG_WINDOW samples → compute average */
if (adc_sum_count >= ADC_AVG_WINDOW)
8000208: 4b16 ldr r3, [pc, #88] @ (8000264 <readAdc+0x9c>)
800020a: 781b ldrb r3, [r3, #0]
800020c: 2b04 cmp r3, #4
800020e: d920 bls.n 8000252 <readAdc+0x8a>
{
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
8000210: 2300 movs r3, #0
8000212: 71bb strb r3, [r7, #6]
8000214: e014 b.n 8000240 <readAdc+0x78>
{
adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW);
8000216: 79bb ldrb r3, [r7, #6]
8000218: 4a11 ldr r2, [pc, #68] @ (8000260 <readAdc+0x98>)
800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800021e: 4a12 ldr r2, [pc, #72] @ (8000268 <readAdc+0xa0>)
8000220: fba2 2303 umull r2, r3, r2, r3
8000224: 089a lsrs r2, r3, #2
8000226: 79bb ldrb r3, [r7, #6]
8000228: b291 uxth r1, r2
800022a: 4a10 ldr r2, [pc, #64] @ (800026c <readAdc+0xa4>)
800022c: f822 1013 strh.w r1, [r2, r3, lsl #1]
adc_sum[i] = 0;
8000230: 79bb ldrb r3, [r7, #6]
8000232: 4a0b ldr r2, [pc, #44] @ (8000260 <readAdc+0x98>)
8000234: 2100 movs r1, #0
8000236: f842 1023 str.w r1, [r2, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
800023a: 79bb ldrb r3, [r7, #6]
800023c: 3301 adds r3, #1
800023e: 71bb strb r3, [r7, #6]
8000240: 79bb ldrb r3, [r7, #6]
8000242: 2b04 cmp r3, #4
8000244: d9e7 bls.n 8000216 <readAdc+0x4e>
}
adc_sum_count = 0;
8000246: 4b07 ldr r3, [pc, #28] @ (8000264 <readAdc+0x9c>)
8000248: 2200 movs r2, #0
800024a: 701a strb r2, [r3, #0]
adc_avg_ready = 1; // tell main loop new data is ready
800024c: 4b08 ldr r3, [pc, #32] @ (8000270 <readAdc+0xa8>)
800024e: 2201 movs r2, #1
8000250: 701a strb r2, [r3, #0]
}
}
8000252: bf00 nop
8000254: 370c adds r7, #12
8000256: 46bd mov sp, r7
8000258: bc80 pop {r7}
800025a: 4770 bx lr
800025c: 200001fc .word 0x200001fc
8000260: 20000214 .word 0x20000214
8000264: 20000228 .word 0x20000228
8000268: cccccccd .word 0xcccccccd
800026c: 20000208 .word 0x20000208
8000270: 20000229 .word 0x20000229
08000274 <EEW_Read>:
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data);
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
void loadEE(void);
/* Pseudo-array accessor EEW[idx] */
static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value)
{
8000274: b580 push {r7, lr}
8000276: b082 sub sp, #8
8000278: af00 add r7, sp, #0
800027a: 4603 mov r3, r0
800027c: 6039 str r1, [r7, #0]
800027e: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000280: 79fb ldrb r3, [r7, #7]
8000282: b29b uxth r3, r3
8000284: 3301 adds r3, #1
8000286: b29b uxth r3, r3
8000288: 6839 ldr r1, [r7, #0]
800028a: 4618 mov r0, r3
800028c: f001 f85a bl 8001344 <EE_ReadVariable>
8000290: 4603 mov r3, r0
}
8000292: 4618 mov r0, r3
8000294: 3708 adds r7, #8
8000296: 46bd mov sp, r7
8000298: bd80 pop {r7, pc}
0800029a <EEW_Write>:
static inline uint16_t EEW_Write(uint8_t idx, uint16_t value)
{
800029a: b580 push {r7, lr}
800029c: b082 sub sp, #8
800029e: af00 add r7, sp, #0
80002a0: 4603 mov r3, r0
80002a2: 460a mov r2, r1
80002a4: 71fb strb r3, [r7, #7]
80002a6: 4613 mov r3, r2
80002a8: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80002aa: 79fb ldrb r3, [r7, #7]
80002ac: b29b uxth r3, r3
80002ae: 3301 adds r3, #1
80002b0: b29b uxth r3, r3
80002b2: 88ba ldrh r2, [r7, #4]
80002b4: 4611 mov r1, r2
80002b6: 4618 mov r0, r3
80002b8: f001 f860 bl 800137c <EE_WriteVariable>
80002bc: 4603 mov r3, r0
}
80002be: 4618 mov r0, r3
80002c0: 3708 adds r7, #8
80002c2: 46bd mov sp, r7
80002c4: bd80 pop {r7, pc}
080002c6 <toHex>:
extern omCiclo_st stCiclo;
extern omCiclo_st memstCiclo;
extern uint8_t stPulsanti;
extern bool nobuz;
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80002c6: b490 push {r4, r7}
80002c8: b082 sub sp, #8
80002ca: af00 add r7, sp, #0
80002cc: 4604 mov r4, r0
80002ce: 4608 mov r0, r1
80002d0: 4611 mov r1, r2
80002d2: 461a mov r2, r3
80002d4: 4623 mov r3, r4
80002d6: 71fb strb r3, [r7, #7]
80002d8: 4603 mov r3, r0
80002da: 71bb strb r3, [r7, #6]
80002dc: 460b mov r3, r1
80002de: 717b strb r3, [r7, #5]
80002e0: 4613 mov r3, r2
80002e2: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80002e4: 79fb ldrb r3, [r7, #7]
80002e6: 2b2f cmp r3, #47 @ 0x2f
80002e8: d906 bls.n 80002f8 <toHex+0x32>
80002ea: 79fb ldrb r3, [r7, #7]
80002ec: 2b39 cmp r3, #57 @ 0x39
80002ee: d803 bhi.n 80002f8 <toHex+0x32>
c1-='0';
80002f0: 79fb ldrb r3, [r7, #7]
80002f2: 3b30 subs r3, #48 @ 0x30
80002f4: 71fb strb r3, [r7, #7]
80002f6: e00b b.n 8000310 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80002f8: 79fb ldrb r3, [r7, #7]
80002fa: 2b60 cmp r3, #96 @ 0x60
80002fc: d906 bls.n 800030c <toHex+0x46>
80002fe: 79fb ldrb r3, [r7, #7]
8000300: 2b66 cmp r3, #102 @ 0x66
8000302: d803 bhi.n 800030c <toHex+0x46>
c1=(c1-'a')+10;
8000304: 79fb ldrb r3, [r7, #7]
8000306: 3b57 subs r3, #87 @ 0x57
8000308: 71fb strb r3, [r7, #7]
800030a: e001 b.n 8000310 <toHex+0x4a>
}else return false;
800030c: 2300 movs r3, #0
800030e: e070 b.n 80003f2 <toHex+0x12c>
if((c2>='0')&&(c2<='9')){
8000310: 79bb ldrb r3, [r7, #6]
8000312: 2b2f cmp r3, #47 @ 0x2f
8000314: d906 bls.n 8000324 <toHex+0x5e>
8000316: 79bb ldrb r3, [r7, #6]
8000318: 2b39 cmp r3, #57 @ 0x39
800031a: d803 bhi.n 8000324 <toHex+0x5e>
c2-='0';
800031c: 79bb ldrb r3, [r7, #6]
800031e: 3b30 subs r3, #48 @ 0x30
8000320: 71bb strb r3, [r7, #6]
8000322: e00b b.n 800033c <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
8000324: 79bb ldrb r3, [r7, #6]
8000326: 2b60 cmp r3, #96 @ 0x60
8000328: d906 bls.n 8000338 <toHex+0x72>
800032a: 79bb ldrb r3, [r7, #6]
800032c: 2b66 cmp r3, #102 @ 0x66
800032e: d803 bhi.n 8000338 <toHex+0x72>
c2=(c2-'a')+10;
8000330: 79bb ldrb r3, [r7, #6]
8000332: 3b57 subs r3, #87 @ 0x57
8000334: 71bb strb r3, [r7, #6]
8000336: e001 b.n 800033c <toHex+0x76>
}else return false;
8000338: 2300 movs r3, #0
800033a: e05a b.n 80003f2 <toHex+0x12c>
if((c3>='0')&&(c3<='9')){
800033c: 797b ldrb r3, [r7, #5]
800033e: 2b2f cmp r3, #47 @ 0x2f
8000340: d906 bls.n 8000350 <toHex+0x8a>
8000342: 797b ldrb r3, [r7, #5]
8000344: 2b39 cmp r3, #57 @ 0x39
8000346: d803 bhi.n 8000350 <toHex+0x8a>
c3-='0';
8000348: 797b ldrb r3, [r7, #5]
800034a: 3b30 subs r3, #48 @ 0x30
800034c: 717b strb r3, [r7, #5]
800034e: e00b b.n 8000368 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000350: 797b ldrb r3, [r7, #5]
8000352: 2b60 cmp r3, #96 @ 0x60
8000354: d906 bls.n 8000364 <toHex+0x9e>
8000356: 797b ldrb r3, [r7, #5]
8000358: 2b66 cmp r3, #102 @ 0x66
800035a: d803 bhi.n 8000364 <toHex+0x9e>
c3=(c3-'a')+10;
800035c: 797b ldrb r3, [r7, #5]
800035e: 3b57 subs r3, #87 @ 0x57
8000360: 717b strb r3, [r7, #5]
8000362: e001 b.n 8000368 <toHex+0xa2>
}else return false;
8000364: 2300 movs r3, #0
8000366: e044 b.n 80003f2 <toHex+0x12c>
if((c4>='0')&&(c4<='9')){
8000368: 793b ldrb r3, [r7, #4]
800036a: 2b2f cmp r3, #47 @ 0x2f
800036c: d906 bls.n 800037c <toHex+0xb6>
800036e: 793b ldrb r3, [r7, #4]
8000370: 2b39 cmp r3, #57 @ 0x39
8000372: d803 bhi.n 800037c <toHex+0xb6>
c4-='0';
8000374: 793b ldrb r3, [r7, #4]
8000376: 3b30 subs r3, #48 @ 0x30
8000378: 713b strb r3, [r7, #4]
800037a: e00b b.n 8000394 <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
800037c: 793b ldrb r3, [r7, #4]
800037e: 2b60 cmp r3, #96 @ 0x60
8000380: d906 bls.n 8000390 <toHex+0xca>
8000382: 793b ldrb r3, [r7, #4]
8000384: 2b66 cmp r3, #102 @ 0x66
8000386: d803 bhi.n 8000390 <toHex+0xca>
c4=(c4-'a')+10;
8000388: 793b ldrb r3, [r7, #4]
800038a: 3b57 subs r3, #87 @ 0x57
800038c: 713b strb r3, [r7, #4]
800038e: e001 b.n 8000394 <toHex+0xce>
}else return false;
8000390: 2300 movs r3, #0
8000392: e02e b.n 80003f2 <toHex+0x12c>
*retval=c1;
8000394: 79fb ldrb r3, [r7, #7]
8000396: b29a uxth r2, r3
8000398: 693b ldr r3, [r7, #16]
800039a: 801a strh r2, [r3, #0]
*retval*=16;
800039c: 693b ldr r3, [r7, #16]
800039e: 881b ldrh r3, [r3, #0]
80003a0: 011b lsls r3, r3, #4
80003a2: b29a uxth r2, r3
80003a4: 693b ldr r3, [r7, #16]
80003a6: 801a strh r2, [r3, #0]
*retval+=c2;
80003a8: 693b ldr r3, [r7, #16]
80003aa: 881a ldrh r2, [r3, #0]
80003ac: 79bb ldrb r3, [r7, #6]
80003ae: b29b uxth r3, r3
80003b0: 4413 add r3, r2
80003b2: b29a uxth r2, r3
80003b4: 693b ldr r3, [r7, #16]
80003b6: 801a strh r2, [r3, #0]
*retval*=16;
80003b8: 693b ldr r3, [r7, #16]
80003ba: 881b ldrh r3, [r3, #0]
80003bc: 011b lsls r3, r3, #4
80003be: b29a uxth r2, r3
80003c0: 693b ldr r3, [r7, #16]
80003c2: 801a strh r2, [r3, #0]
*retval+=c3;
80003c4: 693b ldr r3, [r7, #16]
80003c6: 881a ldrh r2, [r3, #0]
80003c8: 797b ldrb r3, [r7, #5]
80003ca: b29b uxth r3, r3
80003cc: 4413 add r3, r2
80003ce: b29a uxth r2, r3
80003d0: 693b ldr r3, [r7, #16]
80003d2: 801a strh r2, [r3, #0]
*retval*=16;
80003d4: 693b ldr r3, [r7, #16]
80003d6: 881b ldrh r3, [r3, #0]
80003d8: 011b lsls r3, r3, #4
80003da: b29a uxth r2, r3
80003dc: 693b ldr r3, [r7, #16]
80003de: 801a strh r2, [r3, #0]
*retval+=c4;
80003e0: 693b ldr r3, [r7, #16]
80003e2: 881a ldrh r2, [r3, #0]
80003e4: 793b ldrb r3, [r7, #4]
80003e6: b29b uxth r3, r3
80003e8: 4413 add r3, r2
80003ea: b29a uxth r2, r3
80003ec: 693b ldr r3, [r7, #16]
80003ee: 801a strh r2, [r3, #0]
return true;
80003f0: 2301 movs r3, #1
}
80003f2: 4618 mov r0, r3
80003f4: 3708 adds r7, #8
80003f6: 46bd mov sp, r7
80003f8: bc90 pop {r4, r7}
80003fa: 4770 bx lr
080003fc <manageCDC>:
void manageCDC(void){
80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
8000400: b0a7 sub sp, #156 @ 0x9c
8000402: af06 add r7, sp, #24
uint16_t val;
uint16_t st;
uint16_t eeadd;
uint8_t i;
if (CDC_Available()) {
8000404: f00c ffe4 bl 800d3d0 <CDC_Available>
8000408: 4603 mov r3, r0
800040a: 2b00 cmp r3, #0
800040c: f000 8546 beq.w 8000e9c <manageCDC+0xaa0>
int rx = CDC_ReadByte();
8000410: f00c fff2 bl 800d3f8 <CDC_ReadByte>
8000414: 67b8 str r0, [r7, #120] @ 0x78
if (rx < 0) return;
8000416: 6fbb ldr r3, [r7, #120] @ 0x78
8000418: 2b00 cmp r3, #0
800041a: f2c0 853e blt.w 8000e9a <manageCDC+0xa9e>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
800041e: 4bb9 ldr r3, [pc, #740] @ (8000704 <manageCDC+0x308>)
8000420: 781b ldrb r3, [r3, #0]
8000422: 461a mov r2, r3
8000424: 6fbb ldr r3, [r7, #120] @ 0x78
8000426: b2d9 uxtb r1, r3
8000428: 4bb7 ldr r3, [pc, #732] @ (8000708 <manageCDC+0x30c>)
800042a: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
800042c: bf00 nop
800042e: 4bb5 ldr r3, [pc, #724] @ (8000704 <manageCDC+0x308>)
8000430: 781b ldrb r3, [r3, #0]
8000432: 461a mov r2, r3
8000434: 4bb4 ldr r3, [pc, #720] @ (8000708 <manageCDC+0x30c>)
8000436: 4413 add r3, r2
8000438: 2101 movs r1, #1
800043a: 4618 mov r0, r3
800043c: f00d f89e bl 800d57c <CDC_Transmit_FS>
8000440: 4603 mov r3, r0
8000442: 2b01 cmp r3, #1
8000444: d0f3 beq.n 800042e <manageCDC+0x32>
if((rx==0x0d)||(rx==0x0a)){
8000446: 6fbb ldr r3, [r7, #120] @ 0x78
8000448: 2b0d cmp r3, #13
800044a: d003 beq.n 8000454 <manageCDC+0x58>
800044c: 6fbb ldr r3, [r7, #120] @ 0x78
800044e: 2b0a cmp r3, #10
8000450: f040 851c bne.w 8000e8c <manageCDC+0xa90>
if(rxidx){
8000454: 4bab ldr r3, [pc, #684] @ (8000704 <manageCDC+0x308>)
8000456: 781b ldrb r3, [r3, #0]
8000458: 2b00 cmp r3, #0
800045a: f000 8513 beq.w 8000e84 <manageCDC+0xa88>
switch(rxbuf[0]){
800045e: 4baa ldr r3, [pc, #680] @ (8000708 <manageCDC+0x30c>)
8000460: 781b ldrb r3, [r3, #0]
8000462: 3b49 subs r3, #73 @ 0x49
8000464: 2b24 cmp r3, #36 @ 0x24
8000466: f200 84fb bhi.w 8000e60 <manageCDC+0xa64>
800046a: a201 add r2, pc, #4 @ (adr r2, 8000470 <manageCDC+0x74>)
800046c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8000470: 080006b9 .word 0x080006b9
8000474: 08000e61 .word 0x08000e61
8000478: 08000e61 .word 0x08000e61
800047c: 08000e61 .word 0x08000e61
8000480: 08000e61 .word 0x08000e61
8000484: 08000e61 .word 0x08000e61
8000488: 08000e61 .word 0x08000e61
800048c: 08000e61 .word 0x08000e61
8000490: 08000e61 .word 0x08000e61
8000494: 08000e61 .word 0x08000e61
8000498: 08000e61 .word 0x08000e61
800049c: 08000e61 .word 0x08000e61
80004a0: 08000e61 .word 0x08000e61
80004a4: 08000e61 .word 0x08000e61
80004a8: 08000e61 .word 0x08000e61
80004ac: 08000e61 .word 0x08000e61
80004b0: 08000e61 .word 0x08000e61
80004b4: 08000e61 .word 0x08000e61
80004b8: 08000e61 .word 0x08000e61
80004bc: 08000e61 .word 0x08000e61
80004c0: 08000e61 .word 0x08000e61
80004c4: 08000e61 .word 0x08000e61
80004c8: 08000e61 .word 0x08000e61
80004cc: 08000e61 .word 0x08000e61
80004d0: 08000e61 .word 0x08000e61
80004d4: 080006db .word 0x080006db
80004d8: 08000e61 .word 0x08000e61
80004dc: 08000e61 .word 0x08000e61
80004e0: 080009d9 .word 0x080009d9
80004e4: 08000e61 .word 0x08000e61
80004e8: 08000e61 .word 0x08000e61
80004ec: 08000e61 .word 0x08000e61
80004f0: 08000505 .word 0x08000505
80004f4: 08000e61 .word 0x08000e61
80004f8: 08000e61 .word 0x08000e61
80004fc: 08000e61 .word 0x08000e61
8000500: 08000795 .word 0x08000795
case 'i':
sprintf((char*)s,"info\n");
8000504: f107 030c add.w r3, r7, #12
8000508: 4980 ldr r1, [pc, #512] @ (800070c <manageCDC+0x310>)
800050a: 4618 mov r0, r3
800050c: f00d fc14 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000510: bf00 nop
8000512: f107 030c add.w r3, r7, #12
8000516: 2105 movs r1, #5
8000518: 4618 mov r0, r3
800051a: f00d f82f bl 800d57c <CDC_Transmit_FS>
800051e: 4603 mov r3, r0
8000520: 2b01 cmp r3, #1
8000522: d0f6 beq.n 8000512 <manageCDC+0x116>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
8000524: 2100 movs r1, #0
8000526: 487a ldr r0, [pc, #488] @ (8000710 <manageCDC+0x314>)
8000528: f003 fbf6 bl 8003d18 <IsPwmRunning>
800052c: 4603 mov r3, r0
800052e: 4698 mov r8, r3
8000530: 2104 movs r1, #4
8000532: 4877 ldr r0, [pc, #476] @ (8000710 <manageCDC+0x314>)
8000534: f003 fbf0 bl 8003d18 <IsPwmRunning>
8000538: 4603 mov r3, r0
800053a: 4699 mov r9, r3
800053c: 2108 movs r1, #8
800053e: 4874 ldr r0, [pc, #464] @ (8000710 <manageCDC+0x314>)
8000540: f003 fbea bl 8003d18 <IsPwmRunning>
8000544: 4603 mov r3, r0
8000546: 461c mov r4, r3
8000548: 210c movs r1, #12
800054a: 4871 ldr r0, [pc, #452] @ (8000710 <manageCDC+0x314>)
800054c: f003 fbe4 bl 8003d18 <IsPwmRunning>
8000550: 4603 mov r3, r0
8000552: 461d mov r5, r3
8000554: 2100 movs r1, #0
8000556: 486f ldr r0, [pc, #444] @ (8000714 <manageCDC+0x318>)
8000558: f003 fbde bl 8003d18 <IsPwmRunning>
800055c: 4603 mov r3, r0
800055e: 461e mov r6, r3
8000560: 2104 movs r1, #4
8000562: 486c ldr r0, [pc, #432] @ (8000714 <manageCDC+0x318>)
8000564: f003 fbd8 bl 8003d18 <IsPwmRunning>
8000568: 4603 mov r3, r0
800056a: 607b str r3, [r7, #4]
800056c: 2108 movs r1, #8
800056e: 4869 ldr r0, [pc, #420] @ (8000714 <manageCDC+0x318>)
8000570: f003 fbd2 bl 8003d18 <IsPwmRunning>
8000574: 4603 mov r3, r0
8000576: 603b str r3, [r7, #0]
8000578: 210c movs r1, #12
800057a: 4866 ldr r0, [pc, #408] @ (8000714 <manageCDC+0x318>)
800057c: f003 fbcc bl 8003d18 <IsPwmRunning>
8000580: 4603 mov r3, r0
8000582: f107 000c add.w r0, r7, #12
8000586: 9305 str r3, [sp, #20]
8000588: 683a ldr r2, [r7, #0]
800058a: 9204 str r2, [sp, #16]
800058c: 687b ldr r3, [r7, #4]
800058e: 9303 str r3, [sp, #12]
8000590: 9602 str r6, [sp, #8]
8000592: 9501 str r5, [sp, #4]
8000594: 9400 str r4, [sp, #0]
8000596: 464b mov r3, r9
8000598: 4642 mov r2, r8
800059a: 495f ldr r1, [pc, #380] @ (8000718 <manageCDC+0x31c>)
800059c: f00d fbcc bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80005a0: bf00 nop
80005a2: f107 030c add.w r3, r7, #12
80005a6: 4618 mov r0, r3
80005a8: f7ff fdd0 bl 800014c <strlen>
80005ac: 4603 mov r3, r0
80005ae: b29a uxth r2, r3
80005b0: f107 030c add.w r3, r7, #12
80005b4: 4611 mov r1, r2
80005b6: 4618 mov r0, r3
80005b8: f00c ffe0 bl 800d57c <CDC_Transmit_FS>
80005bc: 4603 mov r3, r0
80005be: 2b01 cmp r3, #1
80005c0: d0ef beq.n 80005a2 <manageCDC+0x1a6>
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
80005c2: 4b53 ldr r3, [pc, #332] @ (8000710 <manageCDC+0x314>)
80005c4: 681b ldr r3, [r3, #0]
80005c6: 6b5b ldr r3, [r3, #52] @ 0x34
80005c8: 607b str r3, [r7, #4]
80005ca: 4b51 ldr r3, [pc, #324] @ (8000710 <manageCDC+0x314>)
80005cc: 681b ldr r3, [r3, #0]
80005ce: 6b99 ldr r1, [r3, #56] @ 0x38
80005d0: 6039 str r1, [r7, #0]
80005d2: 4b4f ldr r3, [pc, #316] @ (8000710 <manageCDC+0x314>)
80005d4: 681b ldr r3, [r3, #0]
80005d6: 6bdb ldr r3, [r3, #60] @ 0x3c
80005d8: 4a4d ldr r2, [pc, #308] @ (8000710 <manageCDC+0x314>)
80005da: 6812 ldr r2, [r2, #0]
80005dc: 6c12 ldr r2, [r2, #64] @ 0x40
80005de: 494d ldr r1, [pc, #308] @ (8000714 <manageCDC+0x318>)
80005e0: 6809 ldr r1, [r1, #0]
80005e2: 6b49 ldr r1, [r1, #52] @ 0x34
80005e4: 484b ldr r0, [pc, #300] @ (8000714 <manageCDC+0x318>)
80005e6: 6800 ldr r0, [r0, #0]
80005e8: 6b80 ldr r0, [r0, #56] @ 0x38
80005ea: 4c4a ldr r4, [pc, #296] @ (8000714 <manageCDC+0x318>)
80005ec: 6824 ldr r4, [r4, #0]
80005ee: 6be4 ldr r4, [r4, #60] @ 0x3c
80005f0: 4d48 ldr r5, [pc, #288] @ (8000714 <manageCDC+0x318>)
80005f2: 682d ldr r5, [r5, #0]
80005f4: 6c2d ldr r5, [r5, #64] @ 0x40
80005f6: f107 060c add.w r6, r7, #12
80005fa: 9505 str r5, [sp, #20]
80005fc: 9404 str r4, [sp, #16]
80005fe: 9003 str r0, [sp, #12]
8000600: 9102 str r1, [sp, #8]
8000602: 9201 str r2, [sp, #4]
8000604: 9300 str r3, [sp, #0]
8000606: 683b ldr r3, [r7, #0]
8000608: 687a ldr r2, [r7, #4]
800060a: 4944 ldr r1, [pc, #272] @ (800071c <manageCDC+0x320>)
800060c: 4630 mov r0, r6
800060e: f00d fb93 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000612: bf00 nop
8000614: f107 030c add.w r3, r7, #12
8000618: 4618 mov r0, r3
800061a: f7ff fd97 bl 800014c <strlen>
800061e: 4603 mov r3, r0
8000620: b29a uxth r2, r3
8000622: f107 030c add.w r3, r7, #12
8000626: 4611 mov r1, r2
8000628: 4618 mov r0, r3
800062a: f00c ffa7 bl 800d57c <CDC_Transmit_FS>
800062e: 4603 mov r3, r0
8000630: 2b01 cmp r3, #1
8000632: d0ef beq.n 8000614 <manageCDC+0x218>
sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8);
8000634: 4b3a ldr r3, [pc, #232] @ (8000720 <manageCDC+0x324>)
8000636: 781b ldrb r3, [r3, #0]
8000638: 461d mov r5, r3
800063a: 4b3a ldr r3, [pc, #232] @ (8000724 <manageCDC+0x328>)
800063c: 881b ldrh r3, [r3, #0]
800063e: 461e mov r6, r3
8000640: 4b39 ldr r3, [pc, #228] @ (8000728 <manageCDC+0x32c>)
8000642: 881b ldrh r3, [r3, #0]
8000644: 461a mov r2, r3
8000646: 4b39 ldr r3, [pc, #228] @ (800072c <manageCDC+0x330>)
8000648: 881b ldrh r3, [r3, #0]
800064a: 4619 mov r1, r3
800064c: 4b38 ldr r3, [pc, #224] @ (8000730 <manageCDC+0x334>)
800064e: 881b ldrh r3, [r3, #0]
8000650: 461c mov r4, r3
8000652: 4b38 ldr r3, [pc, #224] @ (8000734 <manageCDC+0x338>)
8000654: 881b ldrh r3, [r3, #0]
8000656: f107 000c add.w r0, r7, #12
800065a: 9303 str r3, [sp, #12]
800065c: 9402 str r4, [sp, #8]
800065e: 9101 str r1, [sp, #4]
8000660: 9200 str r2, [sp, #0]
8000662: 4633 mov r3, r6
8000664: 462a mov r2, r5
8000666: 4934 ldr r1, [pc, #208] @ (8000738 <manageCDC+0x33c>)
8000668: f00d fb66 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800066c: bf00 nop
800066e: f107 030c add.w r3, r7, #12
8000672: 4618 mov r0, r3
8000674: f7ff fd6a bl 800014c <strlen>
8000678: 4603 mov r3, r0
800067a: b29a uxth r2, r3
800067c: f107 030c add.w r3, r7, #12
8000680: 4611 mov r1, r2
8000682: 4618 mov r0, r3
8000684: f00c ff7a bl 800d57c <CDC_Transmit_FS>
8000688: 4603 mov r3, r0
800068a: 2b01 cmp r3, #1
800068c: d0ef beq.n 800066e <manageCDC+0x272>
sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti);
800068e: 4b2b ldr r3, [pc, #172] @ (800073c <manageCDC+0x340>)
8000690: 781b ldrb r3, [r3, #0]
8000692: 461a mov r2, r3
8000694: 4b2a ldr r3, [pc, #168] @ (8000740 <manageCDC+0x344>)
8000696: 781b ldrb r3, [r3, #0]
8000698: f107 000c add.w r0, r7, #12
800069c: 4929 ldr r1, [pc, #164] @ (8000744 <manageCDC+0x348>)
800069e: f00d fb4b bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 31) == USBD_BUSY);
80006a2: bf00 nop
80006a4: f107 030c add.w r3, r7, #12
80006a8: 211f movs r1, #31
80006aa: 4618 mov r0, r3
80006ac: f00c ff66 bl 800d57c <CDC_Transmit_FS>
80006b0: 4603 mov r3, r0
80006b2: 2b01 cmp r3, #1
80006b4: d0f6 beq.n 80006a4 <manageCDC+0x2a8>
break;
80006b6: e3e5 b.n 8000e84 <manageCDC+0xa88>
case 'I':
sprintf((char*)s,"\nID000000");
80006b8: f107 030c add.w r3, r7, #12
80006bc: 4922 ldr r1, [pc, #136] @ (8000748 <manageCDC+0x34c>)
80006be: 4618 mov r0, r3
80006c0: f00d fb3a bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 9) == USBD_BUSY);
80006c4: bf00 nop
80006c6: f107 030c add.w r3, r7, #12
80006ca: 2109 movs r1, #9
80006cc: 4618 mov r0, r3
80006ce: f00c ff55 bl 800d57c <CDC_Transmit_FS>
80006d2: 4603 mov r3, r0
80006d4: 2b01 cmp r3, #1
80006d6: d0f6 beq.n 80006c6 <manageCDC+0x2ca>
break;
80006d8: e3d4 b.n 8000e84 <manageCDC+0xa88>
case 'b':
if(rxidx==2){
80006da: 4b0a ldr r3, [pc, #40] @ (8000704 <manageCDC+0x308>)
80006dc: 781b ldrb r3, [r3, #0]
80006de: 2b02 cmp r3, #2
80006e0: d147 bne.n 8000772 <manageCDC+0x376>
if(rxbuf[1]=='0'){
80006e2: 4b09 ldr r3, [pc, #36] @ (8000708 <manageCDC+0x30c>)
80006e4: 785b ldrb r3, [r3, #1]
80006e6: 2b30 cmp r3, #48 @ 0x30
80006e8: d103 bne.n 80006f2 <manageCDC+0x2f6>
nobuz=false;
80006ea: 4b18 ldr r3, [pc, #96] @ (800074c <manageCDC+0x350>)
80006ec: 2200 movs r2, #0
80006ee: 701a strb r2, [r3, #0]
}
}else{
sprintf((char*)s,"\nb0|1");
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
}
break;
80006f0: e3c8 b.n 8000e84 <manageCDC+0xa88>
}else if(rxbuf[1]=='1'){
80006f2: 4b05 ldr r3, [pc, #20] @ (8000708 <manageCDC+0x30c>)
80006f4: 785b ldrb r3, [r3, #1]
80006f6: 2b31 cmp r3, #49 @ 0x31
80006f8: d12a bne.n 8000750 <manageCDC+0x354>
nobuz=true;
80006fa: 4b14 ldr r3, [pc, #80] @ (800074c <manageCDC+0x350>)
80006fc: 2201 movs r2, #1
80006fe: 701a strb r2, [r3, #0]
break;
8000700: e3c0 b.n 8000e84 <manageCDC+0xa88>
8000702: bf00 nop
8000704: 20000234 .word 0x20000234
8000708: 20000238 .word 0x20000238
800070c: 0800e6b0 .word 0x0800e6b0
8000710: 20000318 .word 0x20000318
8000714: 20000360 .word 0x20000360
8000718: 0800e6b8 .word 0x0800e6b8
800071c: 0800e6d0 .word 0x0800e6d0
8000720: 200003f0 .word 0x200003f0
8000724: 2000022a .word 0x2000022a
8000728: 2000022c .word 0x2000022c
800072c: 2000022e .word 0x2000022e
8000730: 20000230 .word 0x20000230
8000734: 20000232 .word 0x20000232
8000738: 0800e704 .word 0x0800e704
800073c: 2000044e .word 0x2000044e
8000740: 2000044c .word 0x2000044c
8000744: 0800e73c .word 0x0800e73c
8000748: 0800e75c .word 0x0800e75c
800074c: 20000450 .word 0x20000450
sprintf((char*)s,"\nb0|1");
8000750: f107 030c add.w r3, r7, #12
8000754: 4999 ldr r1, [pc, #612] @ (80009bc <manageCDC+0x5c0>)
8000756: 4618 mov r0, r3
8000758: f00d faee bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
800075c: bf00 nop
800075e: f107 030c add.w r3, r7, #12
8000762: 2105 movs r1, #5
8000764: 4618 mov r0, r3
8000766: f00c ff09 bl 800d57c <CDC_Transmit_FS>
800076a: 4603 mov r3, r0
800076c: 2b01 cmp r3, #1
800076e: d0f6 beq.n 800075e <manageCDC+0x362>
break;
8000770: e388 b.n 8000e84 <manageCDC+0xa88>
sprintf((char*)s,"\nb0|1");
8000772: f107 030c add.w r3, r7, #12
8000776: 4991 ldr r1, [pc, #580] @ (80009bc <manageCDC+0x5c0>)
8000778: 4618 mov r0, r3
800077a: f00d fadd bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
800077e: bf00 nop
8000780: f107 030c add.w r3, r7, #12
8000784: 2105 movs r1, #5
8000786: 4618 mov r0, r3
8000788: f00c fef8 bl 800d57c <CDC_Transmit_FS>
800078c: 4603 mov r3, r0
800078e: 2b01 cmp r3, #1
8000790: d0f6 beq.n 8000780 <manageCDC+0x384>
break;
8000792: e377 b.n 8000e84 <manageCDC+0xa88>
case 'm':
if(rxidx==8){
8000794: 4b8a ldr r3, [pc, #552] @ (80009c0 <manageCDC+0x5c4>)
8000796: 781b ldrb r3, [r3, #0]
8000798: 2b08 cmp r3, #8
800079a: f040 80fd bne.w 8000998 <manageCDC+0x59c>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
800079e: 4b89 ldr r3, [pc, #548] @ (80009c4 <manageCDC+0x5c8>)
80007a0: 785b ldrb r3, [r3, #1]
80007a2: 2b30 cmp r3, #48 @ 0x30
80007a4: f240 80e7 bls.w 8000976 <manageCDC+0x57a>
80007a8: 4b86 ldr r3, [pc, #536] @ (80009c4 <manageCDC+0x5c8>)
80007aa: 785b ldrb r3, [r3, #1]
80007ac: 2b34 cmp r3, #52 @ 0x34
80007ae: f200 80e2 bhi.w 8000976 <manageCDC+0x57a>
mot=rxbuf[1]-='0';
80007b2: 4b84 ldr r3, [pc, #528] @ (80009c4 <manageCDC+0x5c8>)
80007b4: 785b ldrb r3, [r3, #1]
80007b6: 3b30 subs r3, #48 @ 0x30
80007b8: b2da uxtb r2, r3
80007ba: 4b82 ldr r3, [pc, #520] @ (80009c4 <manageCDC+0x5c8>)
80007bc: 705a strb r2, [r3, #1]
80007be: 4b81 ldr r3, [pc, #516] @ (80009c4 <manageCDC+0x5c8>)
80007c0: 785b ldrb r3, [r3, #1]
80007c2: f887 3077 strb.w r3, [r7, #119] @ 0x77
if(rxbuf[2]=='f'){
80007c6: 4b7f ldr r3, [pc, #508] @ (80009c4 <manageCDC+0x5c8>)
80007c8: 789b ldrb r3, [r3, #2]
80007ca: 2b66 cmp r3, #102 @ 0x66
80007cc: d103 bne.n 80007d6 <manageCDC+0x3da>
dir=FW;
80007ce: 2300 movs r3, #0
80007d0: f887 307f strb.w r3, [r7, #127] @ 0x7f
80007d4: e018 b.n 8000808 <manageCDC+0x40c>
}else if(rxbuf[2]=='b'){
80007d6: 4b7b ldr r3, [pc, #492] @ (80009c4 <manageCDC+0x5c8>)
80007d8: 789b ldrb r3, [r3, #2]
80007da: 2b62 cmp r3, #98 @ 0x62
80007dc: d103 bne.n 80007e6 <manageCDC+0x3ea>
dir=BW;
80007de: 2301 movs r3, #1
80007e0: f887 307f strb.w r3, [r7, #127] @ 0x7f
80007e4: e010 b.n 8000808 <manageCDC+0x40c>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
80007e6: f107 030c add.w r3, r7, #12
80007ea: 4977 ldr r1, [pc, #476] @ (80009c8 <manageCDC+0x5cc>)
80007ec: 4618 mov r0, r3
80007ee: f00d faa3 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
80007f2: bf00 nop
80007f4: f107 030c add.w r3, r7, #12
80007f8: 2110 movs r1, #16
80007fa: 4618 mov r0, r3
80007fc: f00c febe bl 800d57c <CDC_Transmit_FS>
8000800: 4603 mov r3, r0
8000802: 2b01 cmp r3, #1
8000804: d0f6 beq.n 80007f4 <manageCDC+0x3f8>
break;
8000806: e33d b.n 8000e84 <manageCDC+0xa88>
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000808: 4b6e ldr r3, [pc, #440] @ (80009c4 <manageCDC+0x5c8>)
800080a: 78db ldrb r3, [r3, #3]
800080c: 2b2f cmp r3, #47 @ 0x2f
800080e: f240 80a1 bls.w 8000954 <manageCDC+0x558>
8000812: 4b6c ldr r3, [pc, #432] @ (80009c4 <manageCDC+0x5c8>)
8000814: 78db ldrb r3, [r3, #3]
8000816: 2b39 cmp r3, #57 @ 0x39
8000818: f200 809c bhi.w 8000954 <manageCDC+0x558>
800081c: 4b69 ldr r3, [pc, #420] @ (80009c4 <manageCDC+0x5c8>)
800081e: 791b ldrb r3, [r3, #4]
8000820: 2b2f cmp r3, #47 @ 0x2f
8000822: f240 8097 bls.w 8000954 <manageCDC+0x558>
8000826: 4b67 ldr r3, [pc, #412] @ (80009c4 <manageCDC+0x5c8>)
8000828: 791b ldrb r3, [r3, #4]
800082a: 2b39 cmp r3, #57 @ 0x39
800082c: f200 8092 bhi.w 8000954 <manageCDC+0x558>
8000830: 4b64 ldr r3, [pc, #400] @ (80009c4 <manageCDC+0x5c8>)
8000832: 795b ldrb r3, [r3, #5]
8000834: 2b2f cmp r3, #47 @ 0x2f
8000836: f240 808d bls.w 8000954 <manageCDC+0x558>
800083a: 4b62 ldr r3, [pc, #392] @ (80009c4 <manageCDC+0x5c8>)
800083c: 795b ldrb r3, [r3, #5]
800083e: 2b39 cmp r3, #57 @ 0x39
8000840: f200 8088 bhi.w 8000954 <manageCDC+0x558>
8000844: 4b5f ldr r3, [pc, #380] @ (80009c4 <manageCDC+0x5c8>)
8000846: 799b ldrb r3, [r3, #6]
8000848: 2b2f cmp r3, #47 @ 0x2f
800084a: f240 8083 bls.w 8000954 <manageCDC+0x558>
800084e: 4b5d ldr r3, [pc, #372] @ (80009c4 <manageCDC+0x5c8>)
8000850: 799b ldrb r3, [r3, #6]
8000852: 2b39 cmp r3, #57 @ 0x39
8000854: d87e bhi.n 8000954 <manageCDC+0x558>
8000856: 4b5b ldr r3, [pc, #364] @ (80009c4 <manageCDC+0x5c8>)
8000858: 79db ldrb r3, [r3, #7]
800085a: 2b2f cmp r3, #47 @ 0x2f
800085c: d97a bls.n 8000954 <manageCDC+0x558>
800085e: 4b59 ldr r3, [pc, #356] @ (80009c4 <manageCDC+0x5c8>)
8000860: 79db ldrb r3, [r3, #7]
8000862: 2b39 cmp r3, #57 @ 0x39
8000864: d876 bhi.n 8000954 <manageCDC+0x558>
dm=rxbuf[3]-='0';
8000866: 4b57 ldr r3, [pc, #348] @ (80009c4 <manageCDC+0x5c8>)
8000868: 78db ldrb r3, [r3, #3]
800086a: 3b30 subs r3, #48 @ 0x30
800086c: b2da uxtb r2, r3
800086e: 4b55 ldr r3, [pc, #340] @ (80009c4 <manageCDC+0x5c8>)
8000870: 70da strb r2, [r3, #3]
8000872: 4b54 ldr r3, [pc, #336] @ (80009c4 <manageCDC+0x5c8>)
8000874: 78db ldrb r3, [r3, #3]
8000876: f887 3076 strb.w r3, [r7, #118] @ 0x76
m=rxbuf[4]-='0';
800087a: 4b52 ldr r3, [pc, #328] @ (80009c4 <manageCDC+0x5c8>)
800087c: 791b ldrb r3, [r3, #4]
800087e: 3b30 subs r3, #48 @ 0x30
8000880: b2da uxtb r2, r3
8000882: 4b50 ldr r3, [pc, #320] @ (80009c4 <manageCDC+0x5c8>)
8000884: 711a strb r2, [r3, #4]
8000886: 4b4f ldr r3, [pc, #316] @ (80009c4 <manageCDC+0x5c8>)
8000888: 791b ldrb r3, [r3, #4]
800088a: f887 3075 strb.w r3, [r7, #117] @ 0x75
c=rxbuf[5]-='0';
800088e: 4b4d ldr r3, [pc, #308] @ (80009c4 <manageCDC+0x5c8>)
8000890: 795b ldrb r3, [r3, #5]
8000892: 3b30 subs r3, #48 @ 0x30
8000894: b2da uxtb r2, r3
8000896: 4b4b ldr r3, [pc, #300] @ (80009c4 <manageCDC+0x5c8>)
8000898: 715a strb r2, [r3, #5]
800089a: 4b4a ldr r3, [pc, #296] @ (80009c4 <manageCDC+0x5c8>)
800089c: 795b ldrb r3, [r3, #5]
800089e: f887 3074 strb.w r3, [r7, #116] @ 0x74
d=rxbuf[6]-='0';
80008a2: 4b48 ldr r3, [pc, #288] @ (80009c4 <manageCDC+0x5c8>)
80008a4: 799b ldrb r3, [r3, #6]
80008a6: 3b30 subs r3, #48 @ 0x30
80008a8: b2da uxtb r2, r3
80008aa: 4b46 ldr r3, [pc, #280] @ (80009c4 <manageCDC+0x5c8>)
80008ac: 719a strb r2, [r3, #6]
80008ae: 4b45 ldr r3, [pc, #276] @ (80009c4 <manageCDC+0x5c8>)
80008b0: 799b ldrb r3, [r3, #6]
80008b2: f887 3073 strb.w r3, [r7, #115] @ 0x73
u=rxbuf[7]-='0';
80008b6: 4b43 ldr r3, [pc, #268] @ (80009c4 <manageCDC+0x5c8>)
80008b8: 79db ldrb r3, [r3, #7]
80008ba: 3b30 subs r3, #48 @ 0x30
80008bc: b2da uxtb r2, r3
80008be: 4b41 ldr r3, [pc, #260] @ (80009c4 <manageCDC+0x5c8>)
80008c0: 71da strb r2, [r3, #7]
80008c2: 4b40 ldr r3, [pc, #256] @ (80009c4 <manageCDC+0x5c8>)
80008c4: 79db ldrb r3, [r3, #7]
80008c6: f887 3072 strb.w r3, [r7, #114] @ 0x72
val=dm;
80008ca: f897 3076 ldrb.w r3, [r7, #118] @ 0x76
80008ce: b29b uxth r3, r3
80008d0: 817b strh r3, [r7, #10]
val*=10;
80008d2: 897b ldrh r3, [r7, #10]
80008d4: 461a mov r2, r3
80008d6: 0092 lsls r2, r2, #2
80008d8: 4413 add r3, r2
80008da: 005b lsls r3, r3, #1
80008dc: b29b uxth r3, r3
80008de: 817b strh r3, [r7, #10]
val+=m;
80008e0: f897 3075 ldrb.w r3, [r7, #117] @ 0x75
80008e4: b29a uxth r2, r3
80008e6: 897b ldrh r3, [r7, #10]
80008e8: 4413 add r3, r2
80008ea: b29b uxth r3, r3
80008ec: 817b strh r3, [r7, #10]
val*=10;
80008ee: 897b ldrh r3, [r7, #10]
80008f0: 461a mov r2, r3
80008f2: 0092 lsls r2, r2, #2
80008f4: 4413 add r3, r2
80008f6: 005b lsls r3, r3, #1
80008f8: b29b uxth r3, r3
80008fa: 817b strh r3, [r7, #10]
val+=c;
80008fc: f897 3074 ldrb.w r3, [r7, #116] @ 0x74
8000900: b29a uxth r2, r3
8000902: 897b ldrh r3, [r7, #10]
8000904: 4413 add r3, r2
8000906: b29b uxth r3, r3
8000908: 817b strh r3, [r7, #10]
val*=10;
800090a: 897b ldrh r3, [r7, #10]
800090c: 461a mov r2, r3
800090e: 0092 lsls r2, r2, #2
8000910: 4413 add r3, r2
8000912: 005b lsls r3, r3, #1
8000914: b29b uxth r3, r3
8000916: 817b strh r3, [r7, #10]
val+=d;
8000918: f897 3073 ldrb.w r3, [r7, #115] @ 0x73
800091c: b29a uxth r2, r3
800091e: 897b ldrh r3, [r7, #10]
8000920: 4413 add r3, r2
8000922: b29b uxth r3, r3
8000924: 817b strh r3, [r7, #10]
val*=10;
8000926: 897b ldrh r3, [r7, #10]
8000928: 461a mov r2, r3
800092a: 0092 lsls r2, r2, #2
800092c: 4413 add r3, r2
800092e: 005b lsls r3, r3, #1
8000930: b29b uxth r3, r3
8000932: 817b strh r3, [r7, #10]
val+=u;
8000934: f897 3072 ldrb.w r3, [r7, #114] @ 0x72
8000938: b29a uxth r2, r3
800093a: 897b ldrh r3, [r7, #10]
800093c: 4413 add r3, r2
800093e: b29b uxth r3, r3
8000940: 817b strh r3, [r7, #10]
SetMot(mot,dir,val);
8000942: 897a ldrh r2, [r7, #10]
8000944: f897 107f ldrb.w r1, [r7, #127] @ 0x7f
8000948: f897 3077 ldrb.w r3, [r7, #119] @ 0x77
800094c: 4618 mov r0, r3
800094e: f003 fa59 bl 8003e04 <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000952: e032 b.n 80009ba <manageCDC+0x5be>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
8000954: f107 030c add.w r3, r7, #12
8000958: 491c ldr r1, [pc, #112] @ (80009cc <manageCDC+0x5d0>)
800095a: 4618 mov r0, r3
800095c: f00d f9ec bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
8000960: bf00 nop
8000962: f107 030c add.w r3, r7, #12
8000966: 2113 movs r1, #19
8000968: 4618 mov r0, r3
800096a: f00c fe07 bl 800d57c <CDC_Transmit_FS>
800096e: 4603 mov r3, r0
8000970: 2b01 cmp r3, #1
8000972: d0f6 beq.n 8000962 <manageCDC+0x566>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000974: e021 b.n 80009ba <manageCDC+0x5be>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
8000976: f107 030c add.w r3, r7, #12
800097a: 4915 ldr r1, [pc, #84] @ (80009d0 <manageCDC+0x5d4>)
800097c: 4618 mov r0, r3
800097e: f00d f9db bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
8000982: bf00 nop
8000984: f107 030c add.w r3, r7, #12
8000988: 2113 movs r1, #19
800098a: 4618 mov r0, r3
800098c: f00c fdf6 bl 800d57c <CDC_Transmit_FS>
8000990: 4603 mov r3, r0
8000992: 2b01 cmp r3, #1
8000994: d0f6 beq.n 8000984 <manageCDC+0x588>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
8000996: e275 b.n 8000e84 <manageCDC+0xa88>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
8000998: f107 030c add.w r3, r7, #12
800099c: 490d ldr r1, [pc, #52] @ (80009d4 <manageCDC+0x5d8>)
800099e: 4618 mov r0, r3
80009a0: f00d f9ca bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80009a4: bf00 nop
80009a6: f107 030c add.w r3, r7, #12
80009aa: 210a movs r1, #10
80009ac: 4618 mov r0, r3
80009ae: f00c fde5 bl 800d57c <CDC_Transmit_FS>
80009b2: 4603 mov r3, r0
80009b4: 2b01 cmp r3, #1
80009b6: d0f6 beq.n 80009a6 <manageCDC+0x5aa>
break;
80009b8: e264 b.n 8000e84 <manageCDC+0xa88>
80009ba: e263 b.n 8000e84 <manageCDC+0xa88>
80009bc: 0800e768 .word 0x0800e768
80009c0: 20000234 .word 0x20000234
80009c4: 20000238 .word 0x20000238
80009c8: 0800e770 .word 0x0800e770
80009cc: 0800e784 .word 0x0800e784
80009d0: 0800e7a4 .word 0x0800e7a4
80009d4: 0800e7b8 .word 0x0800e7b8
case 'e':
if(rxidx>1){
80009d8: 4bbb ldr r3, [pc, #748] @ (8000cc8 <manageCDC+0x8cc>)
80009da: 781b ldrb r3, [r3, #0]
80009dc: 2b01 cmp r3, #1
80009de: f240 8227 bls.w 8000e30 <manageCDC+0xa34>
if(rxbuf[1]=='r'){
80009e2: 4bba ldr r3, [pc, #744] @ (8000ccc <manageCDC+0x8d0>)
80009e4: 785b ldrb r3, [r3, #1]
80009e6: 2b72 cmp r3, #114 @ 0x72
80009e8: f040 8086 bne.w 8000af8 <manageCDC+0x6fc>
if(rxidx==4){
80009ec: 4bb6 ldr r3, [pc, #728] @ (8000cc8 <manageCDC+0x8cc>)
80009ee: 781b ldrb r3, [r3, #0]
80009f0: 2b04 cmp r3, #4
80009f2: d169 bne.n 8000ac8 <manageCDC+0x6cc>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
80009f4: 4bb5 ldr r3, [pc, #724] @ (8000ccc <manageCDC+0x8d0>)
80009f6: 789a ldrb r2, [r3, #2]
80009f8: 4bb4 ldr r3, [pc, #720] @ (8000ccc <manageCDC+0x8d0>)
80009fa: 78d9 ldrb r1, [r3, #3]
80009fc: f107 0308 add.w r3, r7, #8
8000a00: 9300 str r3, [sp, #0]
8000a02: 460b mov r3, r1
8000a04: 2130 movs r1, #48 @ 0x30
8000a06: 2030 movs r0, #48 @ 0x30
8000a08: f7ff fc5d bl 80002c6 <toHex>
8000a0c: 4603 mov r3, r0
8000a0e: 2b00 cmp r3, #0
8000a10: d042 beq.n 8000a98 <manageCDC+0x69c>
st=EEW_Read(eeadd, &val);
8000a12: 893b ldrh r3, [r7, #8]
8000a14: b2db uxtb r3, r3
8000a16: f107 020a add.w r2, r7, #10
8000a1a: 4611 mov r1, r2
8000a1c: 4618 mov r0, r3
8000a1e: f7ff fc29 bl 8000274 <EEW_Read>
8000a22: 4603 mov r3, r0
8000a24: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000a28: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000a2c: 2b00 cmp r3, #0
8000a2e: d119 bne.n 8000a64 <manageCDC+0x668>
sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val);
8000a30: 893b ldrh r3, [r7, #8]
8000a32: 461a mov r2, r3
8000a34: 897b ldrh r3, [r7, #10]
8000a36: f107 000c add.w r0, r7, #12
8000a3a: 49a5 ldr r1, [pc, #660] @ (8000cd0 <manageCDC+0x8d4>)
8000a3c: f00d f97c bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a40: bf00 nop
8000a42: f107 030c add.w r3, r7, #12
8000a46: 4618 mov r0, r3
8000a48: f7ff fb80 bl 800014c <strlen>
8000a4c: 4603 mov r3, r0
8000a4e: b29a uxth r2, r3
8000a50: f107 030c add.w r3, r7, #12
8000a54: 4611 mov r1, r2
8000a56: 4618 mov r0, r3
8000a58: f00c fd90 bl 800d57c <CDC_Transmit_FS>
8000a5c: 4603 mov r3, r0
8000a5e: 2b01 cmp r3, #1
8000a60: d0ef beq.n 8000a42 <manageCDC+0x646>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
8000a62: e20e b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\nee read error %d",st);
8000a64: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000a68: f107 030c add.w r3, r7, #12
8000a6c: 4999 ldr r1, [pc, #612] @ (8000cd4 <manageCDC+0x8d8>)
8000a6e: 4618 mov r0, r3
8000a70: f00d f962 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a74: bf00 nop
8000a76: f107 030c add.w r3, r7, #12
8000a7a: 4618 mov r0, r3
8000a7c: f7ff fb66 bl 800014c <strlen>
8000a80: 4603 mov r3, r0
8000a82: b29a uxth r2, r3
8000a84: f107 030c add.w r3, r7, #12
8000a88: 4611 mov r1, r2
8000a8a: 4618 mov r0, r3
8000a8c: f00c fd76 bl 800d57c <CDC_Transmit_FS>
8000a90: 4603 mov r3, r0
8000a92: 2b01 cmp r3, #1
8000a94: d0ef beq.n 8000a76 <manageCDC+0x67a>
break;
8000a96: e1f4 b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?eraa hex values");
8000a98: f107 030c add.w r3, r7, #12
8000a9c: 498e ldr r1, [pc, #568] @ (8000cd8 <manageCDC+0x8dc>)
8000a9e: 4618 mov r0, r3
8000aa0: f00d f94a bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000aa4: bf00 nop
8000aa6: f107 030c add.w r3, r7, #12
8000aaa: 4618 mov r0, r3
8000aac: f7ff fb4e bl 800014c <strlen>
8000ab0: 4603 mov r3, r0
8000ab2: b29a uxth r2, r3
8000ab4: f107 030c add.w r3, r7, #12
8000ab8: 4611 mov r1, r2
8000aba: 4618 mov r0, r3
8000abc: f00c fd5e bl 800d57c <CDC_Transmit_FS>
8000ac0: 4603 mov r3, r0
8000ac2: 2b01 cmp r3, #1
8000ac4: d0ef beq.n 8000aa6 <manageCDC+0x6aa>
break;
8000ac6: e1dc b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?eraa");
8000ac8: f107 030c add.w r3, r7, #12
8000acc: 4983 ldr r1, [pc, #524] @ (8000cdc <manageCDC+0x8e0>)
8000ace: 4618 mov r0, r3
8000ad0: f00d f932 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ad4: bf00 nop
8000ad6: f107 030c add.w r3, r7, #12
8000ada: 4618 mov r0, r3
8000adc: f7ff fb36 bl 800014c <strlen>
8000ae0: 4603 mov r3, r0
8000ae2: b29a uxth r2, r3
8000ae4: f107 030c add.w r3, r7, #12
8000ae8: 4611 mov r1, r2
8000aea: 4618 mov r0, r3
8000aec: f00c fd46 bl 800d57c <CDC_Transmit_FS>
8000af0: 4603 mov r3, r0
8000af2: 2b01 cmp r3, #1
8000af4: d0ef beq.n 8000ad6 <manageCDC+0x6da>
break;
8000af6: e1c4 b.n 8000e82 <manageCDC+0xa86>
}else if(rxbuf[1]=='w'){
8000af8: 4b74 ldr r3, [pc, #464] @ (8000ccc <manageCDC+0x8d0>)
8000afa: 785b ldrb r3, [r3, #1]
8000afc: 2b77 cmp r3, #119 @ 0x77
8000afe: d169 bne.n 8000bd4 <manageCDC+0x7d8>
if(rxidx==8){
8000b00: 4b71 ldr r3, [pc, #452] @ (8000cc8 <manageCDC+0x8cc>)
8000b02: 781b ldrb r3, [r3, #0]
8000b04: 2b08 cmp r3, #8
8000b06: d14d bne.n 8000ba4 <manageCDC+0x7a8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000b08: 4b70 ldr r3, [pc, #448] @ (8000ccc <manageCDC+0x8d0>)
8000b0a: 789a ldrb r2, [r3, #2]
8000b0c: 4b6f ldr r3, [pc, #444] @ (8000ccc <manageCDC+0x8d0>)
8000b0e: 78d9 ldrb r1, [r3, #3]
8000b10: f107 0308 add.w r3, r7, #8
8000b14: 9300 str r3, [sp, #0]
8000b16: 460b mov r3, r1
8000b18: 2130 movs r1, #48 @ 0x30
8000b1a: 2030 movs r0, #48 @ 0x30
8000b1c: f7ff fbd3 bl 80002c6 <toHex>
8000b20: 4603 mov r3, r0
8000b22: 2b00 cmp r3, #0
8000b24: d037 beq.n 8000b96 <manageCDC+0x79a>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
8000b26: 4b69 ldr r3, [pc, #420] @ (8000ccc <manageCDC+0x8d0>)
8000b28: 7918 ldrb r0, [r3, #4]
8000b2a: 4b68 ldr r3, [pc, #416] @ (8000ccc <manageCDC+0x8d0>)
8000b2c: 7959 ldrb r1, [r3, #5]
8000b2e: 4b67 ldr r3, [pc, #412] @ (8000ccc <manageCDC+0x8d0>)
8000b30: 799a ldrb r2, [r3, #6]
8000b32: 4b66 ldr r3, [pc, #408] @ (8000ccc <manageCDC+0x8d0>)
8000b34: 79dc ldrb r4, [r3, #7]
8000b36: f107 030a add.w r3, r7, #10
8000b3a: 9300 str r3, [sp, #0]
8000b3c: 4623 mov r3, r4
8000b3e: f7ff fbc2 bl 80002c6 <toHex>
8000b42: 4603 mov r3, r0
8000b44: 2b00 cmp r3, #0
8000b46: d01f beq.n 8000b88 <manageCDC+0x78c>
st=EEW_Write(eeadd, val);
8000b48: 893b ldrh r3, [r7, #8]
8000b4a: b2db uxtb r3, r3
8000b4c: 897a ldrh r2, [r7, #10]
8000b4e: 4611 mov r1, r2
8000b50: 4618 mov r0, r3
8000b52: f7ff fba2 bl 800029a <EEW_Write>
8000b56: 4603 mov r3, r0
8000b58: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val);
8000b5c: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000b60: 2b00 cmp r3, #0
8000b62: d108 bne.n 8000b76 <manageCDC+0x77a>
8000b64: 893b ldrh r3, [r7, #8]
8000b66: 461a mov r2, r3
8000b68: 897b ldrh r3, [r7, #10]
8000b6a: f107 000c add.w r0, r7, #12
8000b6e: 495c ldr r1, [pc, #368] @ (8000ce0 <manageCDC+0x8e4>)
8000b70: f00d f8e2 bl 800dd38 <siprintf>
8000b74: e01c b.n 8000bb0 <manageCDC+0x7b4>
else sprintf((char*)s,"\nee write error %d", st);
8000b76: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000b7a: f107 030c add.w r3, r7, #12
8000b7e: 4959 ldr r1, [pc, #356] @ (8000ce4 <manageCDC+0x8e8>)
8000b80: 4618 mov r0, r3
8000b82: f00d f8d9 bl 800dd38 <siprintf>
8000b86: e013 b.n 8000bb0 <manageCDC+0x7b4>
}else sprintf((char*)s,"\n?ewaavvvv hex values");
8000b88: f107 030c add.w r3, r7, #12
8000b8c: 4956 ldr r1, [pc, #344] @ (8000ce8 <manageCDC+0x8ec>)
8000b8e: 4618 mov r0, r3
8000b90: f00d f8d2 bl 800dd38 <siprintf>
8000b94: e00c b.n 8000bb0 <manageCDC+0x7b4>
}else sprintf((char*)s,"\n?ewaa hex values");
8000b96: f107 030c add.w r3, r7, #12
8000b9a: 4954 ldr r1, [pc, #336] @ (8000cec <manageCDC+0x8f0>)
8000b9c: 4618 mov r0, r3
8000b9e: f00d f8cb bl 800dd38 <siprintf>
8000ba2: e005 b.n 8000bb0 <manageCDC+0x7b4>
}else sprintf((char*)s,"\n?ewaavvvv");
8000ba4: f107 030c add.w r3, r7, #12
8000ba8: 4951 ldr r1, [pc, #324] @ (8000cf0 <manageCDC+0x8f4>)
8000baa: 4618 mov r0, r3
8000bac: f00d f8c4 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bb0: bf00 nop
8000bb2: f107 030c add.w r3, r7, #12
8000bb6: 4618 mov r0, r3
8000bb8: f7ff fac8 bl 800014c <strlen>
8000bbc: 4603 mov r3, r0
8000bbe: b29a uxth r2, r3
8000bc0: f107 030c add.w r3, r7, #12
8000bc4: 4611 mov r1, r2
8000bc6: 4618 mov r0, r3
8000bc8: f00c fcd8 bl 800d57c <CDC_Transmit_FS>
8000bcc: 4603 mov r3, r0
8000bce: 2b01 cmp r3, #1
8000bd0: d0ef beq.n 8000bb2 <manageCDC+0x7b6>
break;
8000bd2: e156 b.n 8000e82 <manageCDC+0xa86>
}else if(rxbuf[1]=='d'){
8000bd4: 4b3d ldr r3, [pc, #244] @ (8000ccc <manageCDC+0x8d0>)
8000bd6: 785b ldrb r3, [r3, #1]
8000bd8: 2b64 cmp r3, #100 @ 0x64
8000bda: f040 80a9 bne.w 8000d30 <manageCDC+0x934>
if(rxidx==2){
8000bde: 4b3a ldr r3, [pc, #232] @ (8000cc8 <manageCDC+0x8cc>)
8000be0: 781b ldrb r3, [r3, #0]
8000be2: 2b02 cmp r3, #2
8000be4: f040 808c bne.w 8000d00 <manageCDC+0x904>
for(i=0;i<32;i++){
8000be8: 2300 movs r3, #0
8000bea: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000bee: e046 b.n 8000c7e <manageCDC+0x882>
st=EEW_Read(i, &val);
8000bf0: f107 020a add.w r2, r7, #10
8000bf4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000bf8: 4611 mov r1, r2
8000bfa: 4618 mov r0, r3
8000bfc: f7ff fb3a bl 8000274 <EEW_Read>
8000c00: 4603 mov r3, r0
8000c02: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000c06: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000c0a: 2b00 cmp r3, #0
8000c0c: d119 bne.n 8000c42 <manageCDC+0x846>
sprintf((char*)s,"\n0x%02x=%5d ",i,val);
8000c0e: f897 207e ldrb.w r2, [r7, #126] @ 0x7e
8000c12: 897b ldrh r3, [r7, #10]
8000c14: f107 000c add.w r0, r7, #12
8000c18: 4936 ldr r1, [pc, #216] @ (8000cf4 <manageCDC+0x8f8>)
8000c1a: f00d f88d bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c1e: bf00 nop
8000c20: f107 030c add.w r3, r7, #12
8000c24: 4618 mov r0, r3
8000c26: f7ff fa91 bl 800014c <strlen>
8000c2a: 4603 mov r3, r0
8000c2c: b29a uxth r2, r3
8000c2e: f107 030c add.w r3, r7, #12
8000c32: 4611 mov r1, r2
8000c34: 4618 mov r0, r3
8000c36: f00c fca1 bl 800d57c <CDC_Transmit_FS>
8000c3a: 4603 mov r3, r0
8000c3c: 2b01 cmp r3, #1
8000c3e: d0ef beq.n 8000c20 <manageCDC+0x824>
8000c40: e018 b.n 8000c74 <manageCDC+0x878>
sprintf((char*)s,"rderr %d ",st);
8000c42: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000c46: f107 030c add.w r3, r7, #12
8000c4a: 492b ldr r1, [pc, #172] @ (8000cf8 <manageCDC+0x8fc>)
8000c4c: 4618 mov r0, r3
8000c4e: f00d f873 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c52: bf00 nop
8000c54: f107 030c add.w r3, r7, #12
8000c58: 4618 mov r0, r3
8000c5a: f7ff fa77 bl 800014c <strlen>
8000c5e: 4603 mov r3, r0
8000c60: b29a uxth r2, r3
8000c62: f107 030c add.w r3, r7, #12
8000c66: 4611 mov r1, r2
8000c68: 4618 mov r0, r3
8000c6a: f00c fc87 bl 800d57c <CDC_Transmit_FS>
8000c6e: 4603 mov r3, r0
8000c70: 2b01 cmp r3, #1
8000c72: d0ef beq.n 8000c54 <manageCDC+0x858>
for(i=0;i<32;i++){
8000c74: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c78: 3301 adds r3, #1
8000c7a: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000c7e: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c82: 2b1f cmp r3, #31
8000c84: d9b4 bls.n 8000bf0 <manageCDC+0x7f4>
if((i%4)==0){
8000c86: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c8a: f003 0303 and.w r3, r3, #3
8000c8e: b2db uxtb r3, r3
8000c90: 2b00 cmp r3, #0
8000c92: f040 80f6 bne.w 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n");
8000c96: f107 030c add.w r3, r7, #12
8000c9a: 4918 ldr r1, [pc, #96] @ (8000cfc <manageCDC+0x900>)
8000c9c: 4618 mov r0, r3
8000c9e: f00d f84b bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ca2: bf00 nop
8000ca4: f107 030c add.w r3, r7, #12
8000ca8: 4618 mov r0, r3
8000caa: f7ff fa4f bl 800014c <strlen>
8000cae: 4603 mov r3, r0
8000cb0: b29a uxth r2, r3
8000cb2: f107 030c add.w r3, r7, #12
8000cb6: 4611 mov r1, r2
8000cb8: 4618 mov r0, r3
8000cba: f00c fc5f bl 800d57c <CDC_Transmit_FS>
8000cbe: 4603 mov r3, r0
8000cc0: 2b01 cmp r3, #1
8000cc2: d0ef beq.n 8000ca4 <manageCDC+0x8a8>
break;
8000cc4: e0dd b.n 8000e82 <manageCDC+0xa86>
8000cc6: bf00 nop
8000cc8: 20000234 .word 0x20000234
8000ccc: 20000238 .word 0x20000238
8000cd0: 0800e7c4 .word 0x0800e7c4
8000cd4: 0800e7d8 .word 0x0800e7d8
8000cd8: 0800e7ec .word 0x0800e7ec
8000cdc: 0800e800 .word 0x0800e800
8000ce0: 0800e808 .word 0x0800e808
8000ce4: 0800e81c .word 0x0800e81c
8000ce8: 0800e830 .word 0x0800e830
8000cec: 0800e848 .word 0x0800e848
8000cf0: 0800e85c .word 0x0800e85c
8000cf4: 0800e868 .word 0x0800e868
8000cf8: 0800e878 .word 0x0800e878
8000cfc: 0800e884 .word 0x0800e884
sprintf((char*)s,"\n?ed");
8000d00: f107 030c add.w r3, r7, #12
8000d04: 4967 ldr r1, [pc, #412] @ (8000ea4 <manageCDC+0xaa8>)
8000d06: 4618 mov r0, r3
8000d08: f00d f816 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d0c: bf00 nop
8000d0e: f107 030c add.w r3, r7, #12
8000d12: 4618 mov r0, r3
8000d14: f7ff fa1a bl 800014c <strlen>
8000d18: 4603 mov r3, r0
8000d1a: b29a uxth r2, r3
8000d1c: f107 030c add.w r3, r7, #12
8000d20: 4611 mov r1, r2
8000d22: 4618 mov r0, r3
8000d24: f00c fc2a bl 800d57c <CDC_Transmit_FS>
8000d28: 4603 mov r3, r0
8000d2a: 2b01 cmp r3, #1
8000d2c: d0ef beq.n 8000d0e <manageCDC+0x912>
break;
8000d2e: e0a8 b.n 8000e82 <manageCDC+0xa86>
}else if(rxbuf[1]=='x'){
8000d30: 4b5d ldr r3, [pc, #372] @ (8000ea8 <manageCDC+0xaac>)
8000d32: 785b ldrb r3, [r3, #1]
8000d34: 2b78 cmp r3, #120 @ 0x78
8000d36: d163 bne.n 8000e00 <manageCDC+0xa04>
if(rxidx==2){
8000d38: 4b5c ldr r3, [pc, #368] @ (8000eac <manageCDC+0xab0>)
8000d3a: 781b ldrb r3, [r3, #0]
8000d3c: 2b02 cmp r3, #2
8000d3e: d147 bne.n 8000dd0 <manageCDC+0x9d4>
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
8000d40: 2300 movs r3, #0
8000d42: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000d46: e03c b.n 8000dc2 <manageCDC+0x9c6>
st=EEW_Write(i,deftab[i]);
8000d48: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000d4c: 4a58 ldr r2, [pc, #352] @ (8000eb0 <manageCDC+0xab4>)
8000d4e: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
8000d52: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000d56: 4611 mov r1, r2
8000d58: 4618 mov r0, r3
8000d5a: f7ff fa9e bl 800029a <EEW_Write>
8000d5e: 4603 mov r3, r0
8000d60: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK)sprintf((char*)s,"\ndone %d=%d",i,deftab[i]);
8000d64: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000d68: 2b00 cmp r3, #0
8000d6a: d10c bne.n 8000d86 <manageCDC+0x98a>
8000d6c: f897 207e ldrb.w r2, [r7, #126] @ 0x7e
8000d70: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000d74: 494e ldr r1, [pc, #312] @ (8000eb0 <manageCDC+0xab4>)
8000d76: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8000d7a: f107 000c add.w r0, r7, #12
8000d7e: 494d ldr r1, [pc, #308] @ (8000eb4 <manageCDC+0xab8>)
8000d80: f00c ffda bl 800dd38 <siprintf>
8000d84: e007 b.n 8000d96 <manageCDC+0x99a>
else sprintf((char*)s,"\nee write error %d", st);
8000d86: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000d8a: f107 030c add.w r3, r7, #12
8000d8e: 494a ldr r1, [pc, #296] @ (8000eb8 <manageCDC+0xabc>)
8000d90: 4618 mov r0, r3
8000d92: f00c ffd1 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d96: bf00 nop
8000d98: f107 030c add.w r3, r7, #12
8000d9c: 4618 mov r0, r3
8000d9e: f7ff f9d5 bl 800014c <strlen>
8000da2: 4603 mov r3, r0
8000da4: b29a uxth r2, r3
8000da6: f107 030c add.w r3, r7, #12
8000daa: 4611 mov r1, r2
8000dac: 4618 mov r0, r3
8000dae: f00c fbe5 bl 800d57c <CDC_Transmit_FS>
8000db2: 4603 mov r3, r0
8000db4: 2b01 cmp r3, #1
8000db6: d0ef beq.n 8000d98 <manageCDC+0x99c>
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
8000db8: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000dbc: 3301 adds r3, #1
8000dbe: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000dc2: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000dc6: 2b3f cmp r3, #63 @ 0x3f
8000dc8: d9be bls.n 8000d48 <manageCDC+0x94c>
loadEE();
8000dca: f000 fb11 bl 80013f0 <loadEE>
break;
8000dce: e058 b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?ex");
8000dd0: f107 030c add.w r3, r7, #12
8000dd4: 4939 ldr r1, [pc, #228] @ (8000ebc <manageCDC+0xac0>)
8000dd6: 4618 mov r0, r3
8000dd8: f00c ffae bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ddc: bf00 nop
8000dde: f107 030c add.w r3, r7, #12
8000de2: 4618 mov r0, r3
8000de4: f7ff f9b2 bl 800014c <strlen>
8000de8: 4603 mov r3, r0
8000dea: b29a uxth r2, r3
8000dec: f107 030c add.w r3, r7, #12
8000df0: 4611 mov r1, r2
8000df2: 4618 mov r0, r3
8000df4: f00c fbc2 bl 800d57c <CDC_Transmit_FS>
8000df8: 4603 mov r3, r0
8000dfa: 2b01 cmp r3, #1
8000dfc: d0ef beq.n 8000dde <manageCDC+0x9e2>
break;
8000dfe: e040 b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?er|w|d|x");
8000e00: f107 030c add.w r3, r7, #12
8000e04: 492e ldr r1, [pc, #184] @ (8000ec0 <manageCDC+0xac4>)
8000e06: 4618 mov r0, r3
8000e08: f00c ff96 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e0c: bf00 nop
8000e0e: f107 030c add.w r3, r7, #12
8000e12: 4618 mov r0, r3
8000e14: f7ff f99a bl 800014c <strlen>
8000e18: 4603 mov r3, r0
8000e1a: b29a uxth r2, r3
8000e1c: f107 030c add.w r3, r7, #12
8000e20: 4611 mov r1, r2
8000e22: 4618 mov r0, r3
8000e24: f00c fbaa bl 800d57c <CDC_Transmit_FS>
8000e28: 4603 mov r3, r0
8000e2a: 2b01 cmp r3, #1
8000e2c: d0ef beq.n 8000e0e <manageCDC+0xa12>
break;
8000e2e: e028 b.n 8000e82 <manageCDC+0xa86>
sprintf((char*)s,"\n?eraa | ewaavvvv");
8000e30: f107 030c add.w r3, r7, #12
8000e34: 4923 ldr r1, [pc, #140] @ (8000ec4 <manageCDC+0xac8>)
8000e36: 4618 mov r0, r3
8000e38: f00c ff7e bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e3c: bf00 nop
8000e3e: f107 030c add.w r3, r7, #12
8000e42: 4618 mov r0, r3
8000e44: f7ff f982 bl 800014c <strlen>
8000e48: 4603 mov r3, r0
8000e4a: b29a uxth r2, r3
8000e4c: f107 030c add.w r3, r7, #12
8000e50: 4611 mov r1, r2
8000e52: 4618 mov r0, r3
8000e54: f00c fb92 bl 800d57c <CDC_Transmit_FS>
8000e58: 4603 mov r3, r0
8000e5a: 2b01 cmp r3, #1
8000e5c: d0ef beq.n 8000e3e <manageCDC+0xa42>
break;
8000e5e: e010 b.n 8000e82 <manageCDC+0xa86>
default:
sprintf((char*)s,"\n?");
8000e60: f107 030c add.w r3, r7, #12
8000e64: 4918 ldr r1, [pc, #96] @ (8000ec8 <manageCDC+0xacc>)
8000e66: 4618 mov r0, r3
8000e68: f00c ff66 bl 800dd38 <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8000e6c: bf00 nop
8000e6e: f107 030c add.w r3, r7, #12
8000e72: 2102 movs r1, #2
8000e74: 4618 mov r0, r3
8000e76: f00c fb81 bl 800d57c <CDC_Transmit_FS>
8000e7a: 4603 mov r3, r0
8000e7c: 2b01 cmp r3, #1
8000e7e: d0f6 beq.n 8000e6e <manageCDC+0xa72>
break;
8000e80: e000 b.n 8000e84 <manageCDC+0xa88>
break;
8000e82: bf00 nop
}
}
rxidx=0;
8000e84: 4b09 ldr r3, [pc, #36] @ (8000eac <manageCDC+0xab0>)
8000e86: 2200 movs r2, #0
8000e88: 701a strb r2, [r3, #0]
8000e8a: e007 b.n 8000e9c <manageCDC+0xaa0>
}else rxidx++;
8000e8c: 4b07 ldr r3, [pc, #28] @ (8000eac <manageCDC+0xab0>)
8000e8e: 781b ldrb r3, [r3, #0]
8000e90: 3301 adds r3, #1
8000e92: b2da uxtb r2, r3
8000e94: 4b05 ldr r3, [pc, #20] @ (8000eac <manageCDC+0xab0>)
8000e96: 701a strb r2, [r3, #0]
8000e98: e000 b.n 8000e9c <manageCDC+0xaa0>
if (rx < 0) return;
8000e9a: bf00 nop
// tiny spin or yield
}
}
8000e9c: 3784 adds r7, #132 @ 0x84
8000e9e: 46bd mov sp, r7
8000ea0: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
8000ea4: 0800e888 .word 0x0800e888
8000ea8: 20000238 .word 0x20000238
8000eac: 20000234 .word 0x20000234
8000eb0: 0800eb60 .word 0x0800eb60
8000eb4: 0800e890 .word 0x0800e890
8000eb8: 0800e81c .word 0x0800e81c
8000ebc: 0800e89c .word 0x0800e89c
8000ec0: 0800e8a4 .word 0x0800e8a4
8000ec4: 0800e8b0 .word 0x0800e8b0
8000ec8: 0800e8c4 .word 0x0800e8c4
08000ecc <debug>:
extern UART_HandleTypeDef huart1;
extern uint8_t pulsanti;
extern uint16_t stPulsanti;
extern omCiclo_st stCiclo;
void debug(void){
8000ecc: b580 push {r7, lr}
8000ece: b09a sub sp, #104 @ 0x68
8000ed0: af00 add r7, sp, #0
static uint8_t mempulsanti=0;
static uint16_t memstPulsanti=0;
static omCiclo_st memstCiclo=omchiuso;
char s [100];
if(mempulsanti!=pulsanti){
8000ed2: 4b2f ldr r3, [pc, #188] @ (8000f90 <debug+0xc4>)
8000ed4: 781a ldrb r2, [r3, #0]
8000ed6: 4b2f ldr r3, [pc, #188] @ (8000f94 <debug+0xc8>)
8000ed8: 781b ldrb r3, [r3, #0]
8000eda: 429a cmp r2, r3
8000edc: d017 beq.n 8000f0e <debug+0x42>
mempulsanti=pulsanti;
8000ede: 4b2d ldr r3, [pc, #180] @ (8000f94 <debug+0xc8>)
8000ee0: 781a ldrb r2, [r3, #0]
8000ee2: 4b2b ldr r3, [pc, #172] @ (8000f90 <debug+0xc4>)
8000ee4: 701a strb r2, [r3, #0]
sprintf(s,"\npulsanti=%X",pulsanti);
8000ee6: 4b2b ldr r3, [pc, #172] @ (8000f94 <debug+0xc8>)
8000ee8: 781b ldrb r3, [r3, #0]
8000eea: 461a mov r2, r3
8000eec: 1d3b adds r3, r7, #4
8000eee: 492a ldr r1, [pc, #168] @ (8000f98 <debug+0xcc>)
8000ef0: 4618 mov r0, r3
8000ef2: f00c ff21 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8000ef6: 1d3b adds r3, r7, #4
8000ef8: 4618 mov r0, r3
8000efa: f7ff f927 bl 800014c <strlen>
8000efe: 4603 mov r3, r0
8000f00: b29a uxth r2, r3
8000f02: 1d39 adds r1, r7, #4
8000f04: f04f 33ff mov.w r3, #4294967295
8000f08: 4824 ldr r0, [pc, #144] @ (8000f9c <debug+0xd0>)
8000f0a: f008 f925 bl 8009158 <HAL_UART_Transmit>
}
if(memstPulsanti!=stPulsanti){
8000f0e: 4b24 ldr r3, [pc, #144] @ (8000fa0 <debug+0xd4>)
8000f10: 881a ldrh r2, [r3, #0]
8000f12: 4b24 ldr r3, [pc, #144] @ (8000fa4 <debug+0xd8>)
8000f14: 881b ldrh r3, [r3, #0]
8000f16: 429a cmp r2, r3
8000f18: d017 beq.n 8000f4a <debug+0x7e>
memstPulsanti=stPulsanti;
8000f1a: 4b22 ldr r3, [pc, #136] @ (8000fa4 <debug+0xd8>)
8000f1c: 881a ldrh r2, [r3, #0]
8000f1e: 4b20 ldr r3, [pc, #128] @ (8000fa0 <debug+0xd4>)
8000f20: 801a strh r2, [r3, #0]
sprintf(s,"\nstpulsanti=%X",stPulsanti);
8000f22: 4b20 ldr r3, [pc, #128] @ (8000fa4 <debug+0xd8>)
8000f24: 881b ldrh r3, [r3, #0]
8000f26: 461a mov r2, r3
8000f28: 1d3b adds r3, r7, #4
8000f2a: 491f ldr r1, [pc, #124] @ (8000fa8 <debug+0xdc>)
8000f2c: 4618 mov r0, r3
8000f2e: f00c ff03 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8000f32: 1d3b adds r3, r7, #4
8000f34: 4618 mov r0, r3
8000f36: f7ff f909 bl 800014c <strlen>
8000f3a: 4603 mov r3, r0
8000f3c: b29a uxth r2, r3
8000f3e: 1d39 adds r1, r7, #4
8000f40: f04f 33ff mov.w r3, #4294967295
8000f44: 4815 ldr r0, [pc, #84] @ (8000f9c <debug+0xd0>)
8000f46: f008 f907 bl 8009158 <HAL_UART_Transmit>
}
if(memstCiclo!=stCiclo){
8000f4a: 4b18 ldr r3, [pc, #96] @ (8000fac <debug+0xe0>)
8000f4c: 781a ldrb r2, [r3, #0]
8000f4e: 4b18 ldr r3, [pc, #96] @ (8000fb0 <debug+0xe4>)
8000f50: 781b ldrb r3, [r3, #0]
8000f52: 429a cmp r2, r3
8000f54: d017 beq.n 8000f86 <debug+0xba>
memstCiclo=stCiclo;
8000f56: 4b16 ldr r3, [pc, #88] @ (8000fb0 <debug+0xe4>)
8000f58: 781a ldrb r2, [r3, #0]
8000f5a: 4b14 ldr r3, [pc, #80] @ (8000fac <debug+0xe0>)
8000f5c: 701a strb r2, [r3, #0]
sprintf(s,"\nstCiclo=%d",stCiclo);
8000f5e: 4b14 ldr r3, [pc, #80] @ (8000fb0 <debug+0xe4>)
8000f60: 781b ldrb r3, [r3, #0]
8000f62: 461a mov r2, r3
8000f64: 1d3b adds r3, r7, #4
8000f66: 4913 ldr r1, [pc, #76] @ (8000fb4 <debug+0xe8>)
8000f68: 4618 mov r0, r3
8000f6a: f00c fee5 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8000f6e: 1d3b adds r3, r7, #4
8000f70: 4618 mov r0, r3
8000f72: f7ff f8eb bl 800014c <strlen>
8000f76: 4603 mov r3, r0
8000f78: b29a uxth r2, r3
8000f7a: 1d39 adds r1, r7, #4
8000f7c: f04f 33ff mov.w r3, #4294967295
8000f80: 4806 ldr r0, [pc, #24] @ (8000f9c <debug+0xd0>)
8000f82: f008 f8e9 bl 8009158 <HAL_UART_Transmit>
}
}
8000f86: bf00 nop
8000f88: 3768 adds r7, #104 @ 0x68
8000f8a: 46bd mov sp, r7
8000f8c: bd80 pop {r7, pc}
8000f8e: bf00 nop
8000f90: 2000029c .word 0x2000029c
8000f94: 200003f0 .word 0x200003f0
8000f98: 0800e8c8 .word 0x0800e8c8
8000f9c: 200003a8 .word 0x200003a8
8000fa0: 2000029e .word 0x2000029e
8000fa4: 2000044c .word 0x2000044c
8000fa8: 0800e8d8 .word 0x0800e8d8
8000fac: 200002a0 .word 0x200002a0
8000fb0: 2000044e .word 0x2000044e
8000fb4: 0800e8e8 .word 0x0800e8e8
08000fb8 <EEW_Read>:
{
8000fb8: b580 push {r7, lr}
8000fba: b082 sub sp, #8
8000fbc: af00 add r7, sp, #0
8000fbe: 4603 mov r3, r0
8000fc0: 6039 str r1, [r7, #0]
8000fc2: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000fc4: 79fb ldrb r3, [r7, #7]
8000fc6: b29b uxth r3, r3
8000fc8: 3301 adds r3, #1
8000fca: b29b uxth r3, r3
8000fcc: 6839 ldr r1, [r7, #0]
8000fce: 4618 mov r0, r3
8000fd0: f000 f9b8 bl 8001344 <EE_ReadVariable>
8000fd4: 4603 mov r3, r0
}
8000fd6: 4618 mov r0, r3
8000fd8: 3708 adds r7, #8
8000fda: 46bd mov sp, r7
8000fdc: bd80 pop {r7, pc}
08000fde <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
8000fde: b480 push {r7}
8000fe0: b083 sub sp, #12
8000fe2: af00 add r7, sp, #0
8000fe4: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
8000fe6: 687b ldr r3, [r7, #4]
8000fe8: 881b ldrh r3, [r3, #0]
8000fea: b29b uxth r3, r3
}
8000fec: 4618 mov r0, r3
8000fee: 370c adds r7, #12
8000ff0: 46bd mov sp, r7
8000ff2: bc80 pop {r7}
8000ff4: 4770 bx lr
08000ff6 <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
8000ff6: b5b0 push {r4, r5, r7, lr}
8000ff8: b084 sub sp, #16
8000ffa: af00 add r7, sp, #0
8000ffc: 6078 str r0, [r7, #4]
8000ffe: 460b mov r3, r1
8001000: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
8001002: f004 fc7f bl 8005904 <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
8001006: 887b ldrh r3, [r7, #2]
8001008: 2200 movs r2, #0
800100a: 461c mov r4, r3
800100c: 4615 mov r5, r2
800100e: 4622 mov r2, r4
8001010: 462b mov r3, r5
8001012: 6879 ldr r1, [r7, #4]
8001014: 2001 movs r0, #1
8001016: f004 fc05 bl 8005824 <HAL_FLASH_Program>
800101a: 4603 mov r3, r0
800101c: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
800101e: f004 fc97 bl 8005950 <HAL_FLASH_Lock>
return status;
8001022: 7bfb ldrb r3, [r7, #15]
}
8001024: 4618 mov r0, r3
8001026: 3710 adds r7, #16
8001028: 46bd mov sp, r7
800102a: bdb0 pop {r4, r5, r7, pc}
0800102c <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
800102c: b580 push {r7, lr}
800102e: b088 sub sp, #32
8001030: af00 add r7, sp, #0
8001032: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8001034: 2300 movs r3, #0
8001036: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
8001038: f004 fc64 bl 8005904 <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
800103c: 2300 movs r3, #0
800103e: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
8001040: 687b ldr r3, [r7, #4]
8001042: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8001044: 2301 movs r3, #1
8001046: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
8001048: f107 0208 add.w r2, r7, #8
800104c: f107 030c add.w r3, r7, #12
8001050: 4611 mov r1, r2
8001052: 4618 mov r0, r3
8001054: f004 fd3e bl 8005ad4 <HAL_FLASHEx_Erase>
8001058: 4603 mov r3, r0
800105a: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
800105c: f004 fc78 bl 8005950 <HAL_FLASH_Lock>
return status;
8001060: 7ffb ldrb r3, [r7, #31]
}
8001062: 4618 mov r0, r3
8001064: 3720 adds r7, #32
8001066: 46bd mov sp, r7
8001068: bd80 pop {r7, pc}
0800106a <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
800106a: b480 push {r7}
800106c: b087 sub sp, #28
800106e: af00 add r7, sp, #0
8001070: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8001072: 687b ldr r3, [r7, #4]
8001074: 3302 adds r3, #2
8001076: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8001078: 687b ldr r3, [r7, #4]
800107a: f503 6380 add.w r3, r3, #1024 @ 0x400
800107e: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8001080: e00c b.n 800109c <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8001082: 697b ldr r3, [r7, #20]
8001084: 881b ldrh r3, [r3, #0]
8001086: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
8001088: 89fb ldrh r3, [r7, #14]
800108a: f64f 72ff movw r2, #65535 @ 0xffff
800108e: 4293 cmp r3, r2
8001090: d101 bne.n 8001096 <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
8001092: 697b ldr r3, [r7, #20]
8001094: e008 b.n 80010a8 <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
8001096: 697b ldr r3, [r7, #20]
8001098: 3304 adds r3, #4
800109a: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
800109c: 693b ldr r3, [r7, #16]
800109e: 3b03 subs r3, #3
80010a0: 697a ldr r2, [r7, #20]
80010a2: 429a cmp r2, r3
80010a4: d3ed bcc.n 8001082 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
80010a6: 2300 movs r3, #0
}
80010a8: 4618 mov r0, r3
80010aa: 371c adds r7, #28
80010ac: 46bd mov sp, r7
80010ae: bc80 pop {r7}
80010b0: 4770 bx lr
080010b2 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */
/* Find latest value of VirtAddress in a specific page (scan forward) */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
80010b2: b480 push {r7}
80010b4: b089 sub sp, #36 @ 0x24
80010b6: af00 add r7, sp, #0
80010b8: 60f8 str r0, [r7, #12]
80010ba: 460b mov r3, r1
80010bc: 607a str r2, [r7, #4]
80010be: 817b strh r3, [r7, #10]
uint32_t addr = pageBase + 2U; // skip status halfword
80010c0: 68fb ldr r3, [r7, #12]
80010c2: 3302 adds r3, #2
80010c4: 61fb str r3, [r7, #28]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
80010c6: 68fb ldr r3, [r7, #12]
80010c8: f503 6380 add.w r3, r3, #1024 @ 0x400
80010cc: 617b str r3, [r7, #20]
EE_Status result = EE_NOT_FOUND;
80010ce: 2302 movs r3, #2
80010d0: 76fb strb r3, [r7, #27]
uint16_t lastVal = 0;
80010d2: 2300 movs r3, #0
80010d4: 833b strh r3, [r7, #24]
if (Data == NULL)
80010d6: 687b ldr r3, [r7, #4]
80010d8: 2b00 cmp r3, #0
80010da: d118 bne.n 800110e <EE_FindInPage+0x5c>
return EE_ERROR;
80010dc: 2301 movs r3, #1
80010de: e024 b.n 800112a <EE_FindInPage+0x78>
while (addr <= (pageEnd - sizeof(EE_Record_t)))
{
uint16_t vaddr = *(__IO uint16_t *)addr;
80010e0: 69fb ldr r3, [r7, #28]
80010e2: 881b ldrh r3, [r3, #0]
80010e4: 827b strh r3, [r7, #18]
if (vaddr == 0xFFFFU)
80010e6: 8a7b ldrh r3, [r7, #18]
80010e8: f64f 72ff movw r2, #65535 @ 0xffff
80010ec: 4293 cmp r3, r2
80010ee: d014 beq.n 800111a <EE_FindInPage+0x68>
{
// First empty slot => no more records in this page
break;
}
uint16_t value = *(__IO uint16_t *)(addr + 2U);
80010f0: 69fb ldr r3, [r7, #28]
80010f2: 3302 adds r3, #2
80010f4: 881b ldrh r3, [r3, #0]
80010f6: 823b strh r3, [r7, #16]
if (vaddr == VirtAddress)
80010f8: 8a7a ldrh r2, [r7, #18]
80010fa: 897b ldrh r3, [r7, #10]
80010fc: 429a cmp r2, r3
80010fe: d103 bne.n 8001108 <EE_FindInPage+0x56>
{
lastVal = value; // keep most recent
8001100: 8a3b ldrh r3, [r7, #16]
8001102: 833b strh r3, [r7, #24]
result = EE_OK;
8001104: 2300 movs r3, #0
8001106: 76fb strb r3, [r7, #27]
}
addr += sizeof(EE_Record_t); // move 4 bytes forward
8001108: 69fb ldr r3, [r7, #28]
800110a: 3304 adds r3, #4
800110c: 61fb str r3, [r7, #28]
while (addr <= (pageEnd - sizeof(EE_Record_t)))
800110e: 697b ldr r3, [r7, #20]
8001110: 3b04 subs r3, #4
8001112: 69fa ldr r2, [r7, #28]
8001114: 429a cmp r2, r3
8001116: d9e3 bls.n 80010e0 <EE_FindInPage+0x2e>
8001118: e000 b.n 800111c <EE_FindInPage+0x6a>
break;
800111a: bf00 nop
}
if (result == EE_OK)
800111c: 7efb ldrb r3, [r7, #27]
800111e: 2b00 cmp r3, #0
8001120: d102 bne.n 8001128 <EE_FindInPage+0x76>
*Data = lastVal;
8001122: 687b ldr r3, [r7, #4]
8001124: 8b3a ldrh r2, [r7, #24]
8001126: 801a strh r2, [r3, #0]
return result;
8001128: 7efb ldrb r3, [r7, #27]
}
800112a: 4618 mov r0, r3
800112c: 3724 adds r7, #36 @ 0x24
800112e: 46bd mov sp, r7
8001130: bc80 pop {r7}
8001132: 4770 bx lr
08001134 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8001134: b580 push {r7, lr}
8001136: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
8001138: 480f ldr r0, [pc, #60] @ (8001178 <EE_Format+0x44>)
800113a: f7ff ff77 bl 800102c <EE_FlashErasePage>
800113e: 4603 mov r3, r0
8001140: 2b00 cmp r3, #0
8001142: d001 beq.n 8001148 <EE_Format+0x14>
return EE_STATUS_ERROR;
8001144: 2301 movs r3, #1
8001146: e015 b.n 8001174 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
8001148: 480c ldr r0, [pc, #48] @ (800117c <EE_Format+0x48>)
800114a: f7ff ff6f bl 800102c <EE_FlashErasePage>
800114e: 4603 mov r3, r0
8001150: 2b00 cmp r3, #0
8001152: d001 beq.n 8001158 <EE_Format+0x24>
return EE_STATUS_ERROR;
8001154: 2301 movs r3, #1
8001156: e00d b.n 8001174 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
8001158: f64a 21aa movw r1, #43690 @ 0xaaaa
800115c: 4806 ldr r0, [pc, #24] @ (8001178 <EE_Format+0x44>)
800115e: f7ff ff4a bl 8000ff6 <EE_FlashProgramHalfWord>
8001162: 4603 mov r3, r0
8001164: 2b00 cmp r3, #0
8001166: d001 beq.n 800116c <EE_Format+0x38>
return EE_STATUS_ERROR;
8001168: 2301 movs r3, #1
800116a: e003 b.n 8001174 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
800116c: 4b04 ldr r3, [pc, #16] @ (8001180 <EE_Format+0x4c>)
800116e: 4a02 ldr r2, [pc, #8] @ (8001178 <EE_Format+0x44>)
8001170: 601a str r2, [r3, #0]
return EE_STATUS_OK;
8001172: 2300 movs r3, #0
}
8001174: 4618 mov r0, r3
8001176: bd80 pop {r7, pc}
8001178: 0800f800 .word 0x0800f800
800117c: 0800fc00 .word 0x0800fc00
8001180: 20000000 .word 0x20000000
08001184 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8001184: b480 push {r7}
8001186: b083 sub sp, #12
8001188: af00 add r7, sp, #0
800118a: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
800118c: 687b ldr r3, [r7, #4]
800118e: 4a05 ldr r2, [pc, #20] @ (80011a4 <EE_GetOtherPageBase+0x20>)
8001190: 4293 cmp r3, r2
8001192: d101 bne.n 8001198 <EE_GetOtherPageBase+0x14>
8001194: 4b04 ldr r3, [pc, #16] @ (80011a8 <EE_GetOtherPageBase+0x24>)
8001196: e000 b.n 800119a <EE_GetOtherPageBase+0x16>
8001198: 4b02 ldr r3, [pc, #8] @ (80011a4 <EE_GetOtherPageBase+0x20>)
}
800119a: 4618 mov r0, r3
800119c: 370c adds r7, #12
800119e: 46bd mov sp, r7
80011a0: bc80 pop {r7}
80011a2: 4770 bx lr
80011a4: 0800f800 .word 0x0800f800
80011a8: 0800fc00 .word 0x0800fc00
080011ac <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
80011ac: b580 push {r7, lr}
80011ae: b088 sub sp, #32
80011b0: af00 add r7, sp, #0
80011b2: 4603 mov r3, r0
80011b4: 460a mov r2, r1
80011b6: 80fb strh r3, [r7, #6]
80011b8: 4613 mov r3, r2
80011ba: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
80011bc: 4b3c ldr r3, [pc, #240] @ (80012b0 <EE_PageTransfer+0x104>)
80011be: 681b ldr r3, [r3, #0]
80011c0: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
80011c2: 6978 ldr r0, [r7, #20]
80011c4: f7ff ffde bl 8001184 <EE_GetOtherPageBase>
80011c8: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
80011ca: 6938 ldr r0, [r7, #16]
80011cc: f7ff ff2e bl 800102c <EE_FlashErasePage>
80011d0: 4603 mov r3, r0
80011d2: 2b00 cmp r3, #0
80011d4: d001 beq.n 80011da <EE_PageTransfer+0x2e>
return EE_STATUS_ERROR;
80011d6: 2301 movs r3, #1
80011d8: e065 b.n 80012a6 <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
80011da: f245 5155 movw r1, #21845 @ 0x5555
80011de: 6938 ldr r0, [r7, #16]
80011e0: f7ff ff09 bl 8000ff6 <EE_FlashProgramHalfWord>
80011e4: 4603 mov r3, r0
80011e6: 2b00 cmp r3, #0
80011e8: d001 beq.n 80011ee <EE_PageTransfer+0x42>
return EE_STATUS_ERROR;
80011ea: 2301 movs r3, #1
80011ec: e05b b.n 80012a6 <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
80011ee: 693b ldr r3, [r7, #16]
80011f0: 3302 adds r3, #2
80011f2: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
80011f4: 2300 movs r3, #0
80011f6: 837b strh r3, [r7, #26]
80011f8: e03c b.n 8001274 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
80011fa: 8b7b ldrh r3, [r7, #26]
80011fc: 4a2d ldr r2, [pc, #180] @ (80012b4 <EE_PageTransfer+0x108>)
80011fe: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001202: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
8001204: 89fa ldrh r2, [r7, #14]
8001206: 88fb ldrh r3, [r7, #6]
8001208: 429a cmp r2, r3
800120a: d102 bne.n 8001212 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
800120c: 88bb ldrh r3, [r7, #4]
800120e: 817b strh r3, [r7, #10]
8001210: e00b b.n 800122a <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8001212: f107 020a add.w r2, r7, #10
8001216: 89fb ldrh r3, [r7, #14]
8001218: 4619 mov r1, r3
800121a: 6978 ldr r0, [r7, #20]
800121c: f7ff ff49 bl 80010b2 <EE_FindInPage>
8001220: 4603 mov r3, r0
8001222: 737b strb r3, [r7, #13]
if (st != EE_STATUS_OK)
8001224: 7b7b ldrb r3, [r7, #13]
8001226: 2b00 cmp r3, #0
8001228: d120 bne.n 800126c <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
800122a: 89fb ldrh r3, [r7, #14]
800122c: 4619 mov r1, r3
800122e: 69f8 ldr r0, [r7, #28]
8001230: f7ff fee1 bl 8000ff6 <EE_FlashProgramHalfWord>
8001234: 4603 mov r3, r0
8001236: 2b00 cmp r3, #0
8001238: d001 beq.n 800123e <EE_PageTransfer+0x92>
return EE_STATUS_ERROR;
800123a: 2301 movs r3, #1
800123c: e033 b.n 80012a6 <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
800123e: 69fb ldr r3, [r7, #28]
8001240: 3302 adds r3, #2
8001242: 897a ldrh r2, [r7, #10]
8001244: 4611 mov r1, r2
8001246: 4618 mov r0, r3
8001248: f7ff fed5 bl 8000ff6 <EE_FlashProgramHalfWord>
800124c: 4603 mov r3, r0
800124e: 2b00 cmp r3, #0
8001250: d001 beq.n 8001256 <EE_PageTransfer+0xaa>
return EE_STATUS_ERROR;
8001252: 2301 movs r3, #1
8001254: e027 b.n 80012a6 <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
8001256: 69fb ldr r3, [r7, #28]
8001258: 3304 adds r3, #4
800125a: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
800125c: 693b ldr r3, [r7, #16]
800125e: f503 6380 add.w r3, r3, #1024 @ 0x400
8001262: 69fa ldr r2, [r7, #28]
8001264: 429a cmp r2, r3
8001266: d302 bcc.n 800126e <EE_PageTransfer+0xc2>
return EE_STATUS_NO_SPACE;
8001268: 2303 movs r3, #3
800126a: e01c b.n 80012a6 <EE_PageTransfer+0xfa>
continue;
800126c: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
800126e: 8b7b ldrh r3, [r7, #26]
8001270: 3301 adds r3, #1
8001272: 837b strh r3, [r7, #26]
8001274: 8b7b ldrh r3, [r7, #26]
8001276: 2b3f cmp r3, #63 @ 0x3f
8001278: d9bf bls.n 80011fa <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
800127a: 6978 ldr r0, [r7, #20]
800127c: f7ff fed6 bl 800102c <EE_FlashErasePage>
8001280: 4603 mov r3, r0
8001282: 2b00 cmp r3, #0
8001284: d001 beq.n 800128a <EE_PageTransfer+0xde>
return EE_STATUS_ERROR;
8001286: 2301 movs r3, #1
8001288: e00d b.n 80012a6 <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
800128a: f64a 21aa movw r1, #43690 @ 0xaaaa
800128e: 6938 ldr r0, [r7, #16]
8001290: f7ff feb1 bl 8000ff6 <EE_FlashProgramHalfWord>
8001294: 4603 mov r3, r0
8001296: 2b00 cmp r3, #0
8001298: d001 beq.n 800129e <EE_PageTransfer+0xf2>
return EE_STATUS_ERROR;
800129a: 2301 movs r3, #1
800129c: e003 b.n 80012a6 <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
800129e: 4a04 ldr r2, [pc, #16] @ (80012b0 <EE_PageTransfer+0x104>)
80012a0: 693b ldr r3, [r7, #16]
80012a2: 6013 str r3, [r2, #0]
return EE_STATUS_OK;
80012a4: 2300 movs r3, #0
}
80012a6: 4618 mov r0, r3
80012a8: 3720 adds r7, #32
80012aa: 46bd mov sp, r7
80012ac: bd80 pop {r7, pc}
80012ae: bf00 nop
80012b0: 20000000 .word 0x20000000
80012b4: 0800ebe0 .word 0x0800ebe0
080012b8 <EE_Init>:
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
* PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...)
*/
uint16_t EE_Init(void)
{
80012b8: b580 push {r7, lr}
80012ba: b082 sub sp, #8
80012bc: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
80012be: 481e ldr r0, [pc, #120] @ (8001338 <EE_Init+0x80>)
80012c0: f7ff fe8d bl 8000fde <EE_GetPageStatus>
80012c4: 4603 mov r3, r0
80012c6: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
80012c8: 481c ldr r0, [pc, #112] @ (800133c <EE_Init+0x84>)
80012ca: f7ff fe88 bl 8000fde <EE_GetPageStatus>
80012ce: 4603 mov r3, r0
80012d0: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
80012d2: 88fb ldrh r3, [r7, #6]
80012d4: f64f 72ff movw r2, #65535 @ 0xffff
80012d8: 4293 cmp r3, r2
80012da: d108 bne.n 80012ee <EE_Init+0x36>
80012dc: 88bb ldrh r3, [r7, #4]
80012de: f64f 72ff movw r2, #65535 @ 0xffff
80012e2: 4293 cmp r3, r2
80012e4: d103 bne.n 80012ee <EE_Init+0x36>
{
/* Fresh device -> format */
return (uint16_t)EE_Format();
80012e6: f7ff ff25 bl 8001134 <EE_Format>
80012ea: 4603 mov r3, r0
80012ec: e020 b.n 8001330 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
80012ee: 88fb ldrh r3, [r7, #6]
80012f0: f64a 22aa movw r2, #43690 @ 0xaaaa
80012f4: 4293 cmp r3, r2
80012f6: d109 bne.n 800130c <EE_Init+0x54>
80012f8: 88bb ldrh r3, [r7, #4]
80012fa: f64f 72ff movw r2, #65535 @ 0xffff
80012fe: 4293 cmp r3, r2
8001300: d104 bne.n 800130c <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
8001302: 4b0f ldr r3, [pc, #60] @ (8001340 <EE_Init+0x88>)
8001304: 4a0c ldr r2, [pc, #48] @ (8001338 <EE_Init+0x80>)
8001306: 601a str r2, [r3, #0]
return EE_OK;
8001308: 2300 movs r3, #0
800130a: e011 b.n 8001330 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
800130c: 88bb ldrh r3, [r7, #4]
800130e: f64a 22aa movw r2, #43690 @ 0xaaaa
8001312: 4293 cmp r3, r2
8001314: d109 bne.n 800132a <EE_Init+0x72>
8001316: 88fb ldrh r3, [r7, #6]
8001318: f64f 72ff movw r2, #65535 @ 0xffff
800131c: 4293 cmp r3, r2
800131e: d104 bne.n 800132a <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8001320: 4b07 ldr r3, [pc, #28] @ (8001340 <EE_Init+0x88>)
8001322: 4a06 ldr r2, [pc, #24] @ (800133c <EE_Init+0x84>)
8001324: 601a str r2, [r3, #0]
return EE_OK;
8001326: 2300 movs r3, #0
8001328: e002 b.n 8001330 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return (uint16_t)EE_Format();
800132a: f7ff ff03 bl 8001134 <EE_Format>
800132e: 4603 mov r3, r0
}
}
8001330: 4618 mov r0, r3
8001332: 3708 adds r7, #8
8001334: 46bd mov sp, r7
8001336: bd80 pop {r7, pc}
8001338: 0800f800 .word 0x0800f800
800133c: 0800fc00 .word 0x0800fc00
8001340: 20000000 .word 0x20000000
08001344 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
* PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t)
*/
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8001344: b580 push {r7, lr}
8001346: b084 sub sp, #16
8001348: af00 add r7, sp, #0
800134a: 4603 mov r3, r0
800134c: 6039 str r1, [r7, #0]
800134e: 80fb strh r3, [r7, #6]
EE_Status st;
if (Data == NULL)
8001350: 683b ldr r3, [r7, #0]
8001352: 2b00 cmp r3, #0
8001354: d101 bne.n 800135a <EE_ReadVariable+0x16>
return EE_ERROR;
8001356: 2301 movs r3, #1
8001358: e00a b.n 8001370 <EE_ReadVariable+0x2c>
st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
800135a: 4b07 ldr r3, [pc, #28] @ (8001378 <EE_ReadVariable+0x34>)
800135c: 681b ldr r3, [r3, #0]
800135e: 88f9 ldrh r1, [r7, #6]
8001360: 683a ldr r2, [r7, #0]
8001362: 4618 mov r0, r3
8001364: f7ff fea5 bl 80010b2 <EE_FindInPage>
8001368: 4603 mov r3, r0
800136a: 73fb strb r3, [r7, #15]
return (uint16_t)st;
800136c: 7bfb ldrb r3, [r7, #15]
800136e: b29b uxth r3, r3
}
8001370: 4618 mov r0, r3
8001372: 3710 adds r7, #16
8001374: 46bd mov sp, r7
8001376: bd80 pop {r7, pc}
8001378: 20000000 .word 0x20000000
0800137c <EE_WriteVariable>:
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
* PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t)
*/
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
800137c: b580 push {r7, lr}
800137e: b084 sub sp, #16
8001380: af00 add r7, sp, #0
8001382: 4603 mov r3, r0
8001384: 460a mov r2, r1
8001386: 80fb strh r3, [r7, #6]
8001388: 4613 mov r3, r2
800138a: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
800138c: 4b17 ldr r3, [pc, #92] @ (80013ec <EE_WriteVariable+0x70>)
800138e: 681b ldr r3, [r3, #0]
8001390: 4618 mov r0, r3
8001392: f7ff fe6a bl 800106a <EE_FindFreeAddress>
8001396: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
8001398: 68fb ldr r3, [r7, #12]
800139a: 2b00 cmp r3, #0
800139c: d017 beq.n 80013ce <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
800139e: 88fb ldrh r3, [r7, #6]
80013a0: 4619 mov r1, r3
80013a2: 68f8 ldr r0, [r7, #12]
80013a4: f7ff fe27 bl 8000ff6 <EE_FlashProgramHalfWord>
80013a8: 4603 mov r3, r0
80013aa: 2b00 cmp r3, #0
80013ac: d001 beq.n 80013b2 <EE_WriteVariable+0x36>
return EE_ERROR;
80013ae: 2301 movs r3, #1
80013b0: e017 b.n 80013e2 <EE_WriteVariable+0x66>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
80013b2: 68fb ldr r3, [r7, #12]
80013b4: 3302 adds r3, #2
80013b6: 88ba ldrh r2, [r7, #4]
80013b8: 4611 mov r1, r2
80013ba: 4618 mov r0, r3
80013bc: f7ff fe1b bl 8000ff6 <EE_FlashProgramHalfWord>
80013c0: 4603 mov r3, r0
80013c2: 2b00 cmp r3, #0
80013c4: d001 beq.n 80013ca <EE_WriteVariable+0x4e>
return EE_ERROR;
80013c6: 2301 movs r3, #1
80013c8: e00b b.n 80013e2 <EE_WriteVariable+0x66>
return EE_OK;
80013ca: 2300 movs r3, #0
80013cc: e009 b.n 80013e2 <EE_WriteVariable+0x66>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
80013ce: 88ba ldrh r2, [r7, #4]
80013d0: 88fb ldrh r3, [r7, #6]
80013d2: 4611 mov r1, r2
80013d4: 4618 mov r0, r3
80013d6: f7ff fee9 bl 80011ac <EE_PageTransfer>
80013da: 4603 mov r3, r0
80013dc: 72fb strb r3, [r7, #11]
return (uint16_t)st;
80013de: 7afb ldrb r3, [r7, #11]
80013e0: b29b uxth r3, r3
}
80013e2: 4618 mov r0, r3
80013e4: 3710 adds r7, #16
80013e6: 46bd mov sp, r7
80013e8: bd80 pop {r7, pc}
80013ea: bf00 nop
80013ec: 20000000 .word 0x20000000
080013f0 <loadEE>:
void loadEE(void){
80013f0: b5f0 push {r4, r5, r6, r7, lr}
80013f2: b0b9 sub sp, #228 @ 0xe4
80013f4: af06 add r7, sp, #24
char s [200];
EEW_Read(M1PWMAP, &m1pwmap);
80013f6: 49bb ldr r1, [pc, #748] @ (80016e4 <loadEE+0x2f4>)
80013f8: 2000 movs r0, #0
80013fa: f7ff fddd bl 8000fb8 <EEW_Read>
EEW_Read(M1PWMCH, &m1pwmch);
80013fe: 49ba ldr r1, [pc, #744] @ (80016e8 <loadEE+0x2f8>)
8001400: 2001 movs r0, #1
8001402: f7ff fdd9 bl 8000fb8 <EEW_Read>
EEW_Read(M2PWMAP, &m2pwmap);
8001406: 49b9 ldr r1, [pc, #740] @ (80016ec <loadEE+0x2fc>)
8001408: 2002 movs r0, #2
800140a: f7ff fdd5 bl 8000fb8 <EEW_Read>
EEW_Read(M2PWMCH, &m2pwmch);
800140e: 49b8 ldr r1, [pc, #736] @ (80016f0 <loadEE+0x300>)
8001410: 2003 movs r0, #3
8001412: f7ff fdd1 bl 8000fb8 <EEW_Read>
EEW_Read(M3PWMAP, &m3pwmap);
8001416: 49b7 ldr r1, [pc, #732] @ (80016f4 <loadEE+0x304>)
8001418: 2004 movs r0, #4
800141a: f7ff fdcd bl 8000fb8 <EEW_Read>
EEW_Read(M3PWMCH, &m3pwmch);
800141e: 49b6 ldr r1, [pc, #728] @ (80016f8 <loadEE+0x308>)
8001420: 2005 movs r0, #5
8001422: f7ff fdc9 bl 8000fb8 <EEW_Read>
EEW_Read(M4PWMAP, &m4pwmap);
8001426: 49b5 ldr r1, [pc, #724] @ (80016fc <loadEE+0x30c>)
8001428: 2006 movs r0, #6
800142a: f7ff fdc5 bl 8000fb8 <EEW_Read>
EEW_Read(M4PWMCH, &m4pwmch);
800142e: 49b4 ldr r1, [pc, #720] @ (8001700 <loadEE+0x310>)
8001430: 2007 movs r0, #7
8001432: f7ff fdc1 bl 8000fb8 <EEW_Read>
EEW_Read(M1TIMEOUTMAN, &m1TimeoutMan);
8001436: 49b3 ldr r1, [pc, #716] @ (8001704 <loadEE+0x314>)
8001438: 200c movs r0, #12
800143a: f7ff fdbd bl 8000fb8 <EEW_Read>
EEW_Read(M2TIMEOUTMAN, &m2TimeoutMan);
800143e: 49b2 ldr r1, [pc, #712] @ (8001708 <loadEE+0x318>)
8001440: 200d movs r0, #13
8001442: f7ff fdb9 bl 8000fb8 <EEW_Read>
EEW_Read(M3TIMEOUTMAN, &m3TimeoutMan);
8001446: 49b1 ldr r1, [pc, #708] @ (800170c <loadEE+0x31c>)
8001448: 200e movs r0, #14
800144a: f7ff fdb5 bl 8000fb8 <EEW_Read>
EEW_Read(M4TIMEOUTMAN, &m4TimeoutMan);
800144e: 49b0 ldr r1, [pc, #704] @ (8001710 <loadEE+0x320>)
8001450: 200f movs r0, #15
8001452: f7ff fdb1 bl 8000fb8 <EEW_Read>
EEW_Read(TRAMP1, &tramp1);
8001456: 49af ldr r1, [pc, #700] @ (8001714 <loadEE+0x324>)
8001458: 2019 movs r0, #25
800145a: f7ff fdad bl 8000fb8 <EEW_Read>
EEW_Read(M1PWMMAN, &m1pwmMan);
800145e: 49ae ldr r1, [pc, #696] @ (8001718 <loadEE+0x328>)
8001460: 201a movs r0, #26
8001462: f7ff fda9 bl 8000fb8 <EEW_Read>
EEW_Read(M2PWMMAN, &m2pwmMan);
8001466: 49ad ldr r1, [pc, #692] @ (800171c <loadEE+0x32c>)
8001468: 201b movs r0, #27
800146a: f7ff fda5 bl 8000fb8 <EEW_Read>
EEW_Read(M3PWMMAN, &m3pwmMan);
800146e: 49ac ldr r1, [pc, #688] @ (8001720 <loadEE+0x330>)
8001470: 201c movs r0, #28
8001472: f7ff fda1 bl 8000fb8 <EEW_Read>
EEW_Read(M4PWMMAN, &m4pwmMan);
8001476: 49ab ldr r1, [pc, #684] @ (8001724 <loadEE+0x334>)
8001478: 201d movs r0, #29
800147a: f7ff fd9d bl 8000fb8 <EEW_Read>
EEW_Read(TRAMPMAN, &trampman);
800147e: 49aa ldr r1, [pc, #680] @ (8001728 <loadEE+0x338>)
8001480: 201e movs r0, #30
8001482: f7ff fd99 bl 8000fb8 <EEW_Read>
EEW_Read(TRAMP, &tramp);
8001486: 49a9 ldr r1, [pc, #676] @ (800172c <loadEE+0x33c>)
8001488: 201f movs r0, #31
800148a: f7ff fd95 bl 8000fb8 <EEW_Read>
EEW_Read(APM1START,&apM1start);
800148e: 49a8 ldr r1, [pc, #672] @ (8001730 <loadEE+0x340>)
8001490: 2020 movs r0, #32
8001492: f7ff fd91 bl 8000fb8 <EEW_Read>
EEW_Read(APM1STOP ,&apM1stop);
8001496: 49a7 ldr r1, [pc, #668] @ (8001734 <loadEE+0x344>)
8001498: 2021 movs r0, #33 @ 0x21
800149a: f7ff fd8d bl 8000fb8 <EEW_Read>
EEW_Read(APM2START,&apM2start);
800149e: 49a6 ldr r1, [pc, #664] @ (8001738 <loadEE+0x348>)
80014a0: 2022 movs r0, #34 @ 0x22
80014a2: f7ff fd89 bl 8000fb8 <EEW_Read>
EEW_Read(APM2STOP ,&apM2stop);
80014a6: 49a5 ldr r1, [pc, #660] @ (800173c <loadEE+0x34c>)
80014a8: 2023 movs r0, #35 @ 0x23
80014aa: f7ff fd85 bl 8000fb8 <EEW_Read>
EEW_Read(APM3START,&apM3start);
80014ae: 49a4 ldr r1, [pc, #656] @ (8001740 <loadEE+0x350>)
80014b0: 2024 movs r0, #36 @ 0x24
80014b2: f7ff fd81 bl 8000fb8 <EEW_Read>
EEW_Read(APM3STOP ,&apM3stop);
80014b6: 49a3 ldr r1, [pc, #652] @ (8001744 <loadEE+0x354>)
80014b8: 2025 movs r0, #37 @ 0x25
80014ba: f7ff fd7d bl 8000fb8 <EEW_Read>
EEW_Read(APM4START,&apM4start);
80014be: 49a2 ldr r1, [pc, #648] @ (8001748 <loadEE+0x358>)
80014c0: 2026 movs r0, #38 @ 0x26
80014c2: f7ff fd79 bl 8000fb8 <EEW_Read>
EEW_Read(APM4STOP ,&apM4stop);
80014c6: 49a1 ldr r1, [pc, #644] @ (800174c <loadEE+0x35c>)
80014c8: 2027 movs r0, #39 @ 0x27
80014ca: f7ff fd75 bl 8000fb8 <EEW_Read>
EEW_Read(CHM1START,&chM1start);
80014ce: 49a0 ldr r1, [pc, #640] @ (8001750 <loadEE+0x360>)
80014d0: 2028 movs r0, #40 @ 0x28
80014d2: f7ff fd71 bl 8000fb8 <EEW_Read>
EEW_Read(CHM1STOP ,&chM1stop);
80014d6: 499f ldr r1, [pc, #636] @ (8001754 <loadEE+0x364>)
80014d8: 2029 movs r0, #41 @ 0x29
80014da: f7ff fd6d bl 8000fb8 <EEW_Read>
EEW_Read(CHM2START,&chM2start);
80014de: 499e ldr r1, [pc, #632] @ (8001758 <loadEE+0x368>)
80014e0: 202a movs r0, #42 @ 0x2a
80014e2: f7ff fd69 bl 8000fb8 <EEW_Read>
EEW_Read(CHM2STOP ,&chM2stop);
80014e6: 499d ldr r1, [pc, #628] @ (800175c <loadEE+0x36c>)
80014e8: 202b movs r0, #43 @ 0x2b
80014ea: f7ff fd65 bl 8000fb8 <EEW_Read>
EEW_Read(CHM3START,&chM3start);
80014ee: 499c ldr r1, [pc, #624] @ (8001760 <loadEE+0x370>)
80014f0: 202c movs r0, #44 @ 0x2c
80014f2: f7ff fd61 bl 8000fb8 <EEW_Read>
EEW_Read(CHM3STOP ,&chM3stop);
80014f6: 499b ldr r1, [pc, #620] @ (8001764 <loadEE+0x374>)
80014f8: 202d movs r0, #45 @ 0x2d
80014fa: f7ff fd5d bl 8000fb8 <EEW_Read>
EEW_Read(CHM4START,&chM4start);
80014fe: 499a ldr r1, [pc, #616] @ (8001768 <loadEE+0x378>)
8001500: 202e movs r0, #46 @ 0x2e
8001502: f7ff fd59 bl 8000fb8 <EEW_Read>
EEW_Read(CHM4STOP ,&chM4stop);
8001506: 4999 ldr r1, [pc, #612] @ (800176c <loadEE+0x37c>)
8001508: 202f movs r0, #47 @ 0x2f
800150a: f7ff fd55 bl 8000fb8 <EEW_Read>
sprintf((char*)s,"LoadEE\n");
800150e: 463b mov r3, r7
8001510: 4997 ldr r1, [pc, #604] @ (8001770 <loadEE+0x380>)
8001512: 4618 mov r0, r3
8001514: f00c fc10 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001518: 463b mov r3, r7
800151a: 4618 mov r0, r3
800151c: f7fe fe16 bl 800014c <strlen>
8001520: 4603 mov r3, r0
8001522: b29a uxth r2, r3
8001524: 4639 mov r1, r7
8001526: f04f 33ff mov.w r3, #4294967295
800152a: 4892 ldr r0, [pc, #584] @ (8001774 <loadEE+0x384>)
800152c: f007 fe14 bl 8009158 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8001530: 4b6c ldr r3, [pc, #432] @ (80016e4 <loadEE+0x2f4>)
8001532: 881b ldrh r3, [r3, #0]
8001534: 469c mov ip, r3
8001536: 4b6c ldr r3, [pc, #432] @ (80016e8 <loadEE+0x2f8>)
8001538: 881b ldrh r3, [r3, #0]
800153a: 469e mov lr, r3
800153c: 4b6b ldr r3, [pc, #428] @ (80016ec <loadEE+0x2fc>)
800153e: 881b ldrh r3, [r3, #0]
8001540: 461a mov r2, r3
8001542: 4b6b ldr r3, [pc, #428] @ (80016f0 <loadEE+0x300>)
8001544: 881b ldrh r3, [r3, #0]
8001546: 4619 mov r1, r3
8001548: 4b6a ldr r3, [pc, #424] @ (80016f4 <loadEE+0x304>)
800154a: 881b ldrh r3, [r3, #0]
800154c: 461c mov r4, r3
800154e: 4b6a ldr r3, [pc, #424] @ (80016f8 <loadEE+0x308>)
8001550: 881b ldrh r3, [r3, #0]
8001552: 461d mov r5, r3
8001554: 4b69 ldr r3, [pc, #420] @ (80016fc <loadEE+0x30c>)
8001556: 881b ldrh r3, [r3, #0]
8001558: 461e mov r6, r3
800155a: 4b69 ldr r3, [pc, #420] @ (8001700 <loadEE+0x310>)
800155c: 881b ldrh r3, [r3, #0]
800155e: 4638 mov r0, r7
8001560: 9305 str r3, [sp, #20]
8001562: 9604 str r6, [sp, #16]
8001564: 9503 str r5, [sp, #12]
8001566: 9402 str r4, [sp, #8]
8001568: 9101 str r1, [sp, #4]
800156a: 9200 str r2, [sp, #0]
800156c: 4673 mov r3, lr
800156e: 4662 mov r2, ip
8001570: 4981 ldr r1, [pc, #516] @ (8001778 <loadEE+0x388>)
8001572: f00c fbe1 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001576: 463b mov r3, r7
8001578: 4618 mov r0, r3
800157a: f7fe fde7 bl 800014c <strlen>
800157e: 4603 mov r3, r0
8001580: b29a uxth r2, r3
8001582: 4639 mov r1, r7
8001584: f04f 33ff mov.w r3, #4294967295
8001588: 487a ldr r0, [pc, #488] @ (8001774 <loadEE+0x384>)
800158a: f007 fde5 bl 8009158 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
800158e: 4b5d ldr r3, [pc, #372] @ (8001704 <loadEE+0x314>)
8001590: 881b ldrh r3, [r3, #0]
8001592: 4619 mov r1, r3
8001594: 4b5c ldr r3, [pc, #368] @ (8001708 <loadEE+0x318>)
8001596: 881b ldrh r3, [r3, #0]
8001598: 461c mov r4, r3
800159a: 4b5c ldr r3, [pc, #368] @ (800170c <loadEE+0x31c>)
800159c: 881b ldrh r3, [r3, #0]
800159e: 461a mov r2, r3
80015a0: 4b5b ldr r3, [pc, #364] @ (8001710 <loadEE+0x320>)
80015a2: 881b ldrh r3, [r3, #0]
80015a4: 4638 mov r0, r7
80015a6: 9301 str r3, [sp, #4]
80015a8: 9200 str r2, [sp, #0]
80015aa: 4623 mov r3, r4
80015ac: 460a mov r2, r1
80015ae: 4973 ldr r1, [pc, #460] @ (800177c <loadEE+0x38c>)
80015b0: f00c fbc2 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80015b4: 463b mov r3, r7
80015b6: 4618 mov r0, r3
80015b8: f7fe fdc8 bl 800014c <strlen>
80015bc: 4603 mov r3, r0
80015be: b29a uxth r2, r3
80015c0: 4639 mov r1, r7
80015c2: f04f 33ff mov.w r3, #4294967295
80015c6: 486b ldr r0, [pc, #428] @ (8001774 <loadEE+0x384>)
80015c8: f007 fdc6 bl 8009158 <HAL_UART_Transmit>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
80015cc: 4b57 ldr r3, [pc, #348] @ (800172c <loadEE+0x33c>)
80015ce: 881b ldrh r3, [r3, #0]
80015d0: 461a mov r2, r3
80015d2: 4b55 ldr r3, [pc, #340] @ (8001728 <loadEE+0x338>)
80015d4: 881b ldrh r3, [r3, #0]
80015d6: 4638 mov r0, r7
80015d8: 4969 ldr r1, [pc, #420] @ (8001780 <loadEE+0x390>)
80015da: f00c fbad bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80015de: 463b mov r3, r7
80015e0: 4618 mov r0, r3
80015e2: f7fe fdb3 bl 800014c <strlen>
80015e6: 4603 mov r3, r0
80015e8: b29a uxth r2, r3
80015ea: 4639 mov r1, r7
80015ec: f04f 33ff mov.w r3, #4294967295
80015f0: 4860 ldr r0, [pc, #384] @ (8001774 <loadEE+0x384>)
80015f2: f007 fdb1 bl 8009158 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
80015f6: 4b48 ldr r3, [pc, #288] @ (8001718 <loadEE+0x328>)
80015f8: 881b ldrh r3, [r3, #0]
80015fa: 4619 mov r1, r3
80015fc: 4b47 ldr r3, [pc, #284] @ (800171c <loadEE+0x32c>)
80015fe: 881b ldrh r3, [r3, #0]
8001600: 461c mov r4, r3
8001602: 4b47 ldr r3, [pc, #284] @ (8001720 <loadEE+0x330>)
8001604: 881b ldrh r3, [r3, #0]
8001606: 461a mov r2, r3
8001608: 4b46 ldr r3, [pc, #280] @ (8001724 <loadEE+0x334>)
800160a: 881b ldrh r3, [r3, #0]
800160c: 4638 mov r0, r7
800160e: 9301 str r3, [sp, #4]
8001610: 9200 str r2, [sp, #0]
8001612: 4623 mov r3, r4
8001614: 460a mov r2, r1
8001616: 495b ldr r1, [pc, #364] @ (8001784 <loadEE+0x394>)
8001618: f00c fb8e bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800161c: 463b mov r3, r7
800161e: 4618 mov r0, r3
8001620: f7fe fd94 bl 800014c <strlen>
8001624: 4603 mov r3, r0
8001626: b29a uxth r2, r3
8001628: 4639 mov r1, r7
800162a: f04f 33ff mov.w r3, #4294967295
800162e: 4851 ldr r0, [pc, #324] @ (8001774 <loadEE+0x384>)
8001630: f007 fd92 bl 8009158 <HAL_UART_Transmit>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
8001634: 4b3e ldr r3, [pc, #248] @ (8001730 <loadEE+0x340>)
8001636: 881b ldrh r3, [r3, #0]
8001638: 4619 mov r1, r3
800163a: 4b3e ldr r3, [pc, #248] @ (8001734 <loadEE+0x344>)
800163c: 881b ldrh r3, [r3, #0]
800163e: 461c mov r4, r3
8001640: 4b43 ldr r3, [pc, #268] @ (8001750 <loadEE+0x360>)
8001642: 881b ldrh r3, [r3, #0]
8001644: 461a mov r2, r3
8001646: 4b43 ldr r3, [pc, #268] @ (8001754 <loadEE+0x364>)
8001648: 881b ldrh r3, [r3, #0]
800164a: 4638 mov r0, r7
800164c: 9301 str r3, [sp, #4]
800164e: 9200 str r2, [sp, #0]
8001650: 4623 mov r3, r4
8001652: 460a mov r2, r1
8001654: 494c ldr r1, [pc, #304] @ (8001788 <loadEE+0x398>)
8001656: f00c fb6f bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800165a: 463b mov r3, r7
800165c: 4618 mov r0, r3
800165e: f7fe fd75 bl 800014c <strlen>
8001662: 4603 mov r3, r0
8001664: b29a uxth r2, r3
8001666: 4639 mov r1, r7
8001668: f04f 33ff mov.w r3, #4294967295
800166c: 4841 ldr r0, [pc, #260] @ (8001774 <loadEE+0x384>)
800166e: f007 fd73 bl 8009158 <HAL_UART_Transmit>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
8001672: 4b31 ldr r3, [pc, #196] @ (8001738 <loadEE+0x348>)
8001674: 881b ldrh r3, [r3, #0]
8001676: 4619 mov r1, r3
8001678: 4b30 ldr r3, [pc, #192] @ (800173c <loadEE+0x34c>)
800167a: 881b ldrh r3, [r3, #0]
800167c: 461c mov r4, r3
800167e: 4b36 ldr r3, [pc, #216] @ (8001758 <loadEE+0x368>)
8001680: 881b ldrh r3, [r3, #0]
8001682: 461a mov r2, r3
8001684: 4b35 ldr r3, [pc, #212] @ (800175c <loadEE+0x36c>)
8001686: 881b ldrh r3, [r3, #0]
8001688: 4638 mov r0, r7
800168a: 9301 str r3, [sp, #4]
800168c: 9200 str r2, [sp, #0]
800168e: 4623 mov r3, r4
8001690: 460a mov r2, r1
8001692: 493e ldr r1, [pc, #248] @ (800178c <loadEE+0x39c>)
8001694: f00c fb50 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001698: 463b mov r3, r7
800169a: 4618 mov r0, r3
800169c: f7fe fd56 bl 800014c <strlen>
80016a0: 4603 mov r3, r0
80016a2: b29a uxth r2, r3
80016a4: 4639 mov r1, r7
80016a6: f04f 33ff mov.w r3, #4294967295
80016aa: 4832 ldr r0, [pc, #200] @ (8001774 <loadEE+0x384>)
80016ac: f007 fd54 bl 8009158 <HAL_UART_Transmit>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
80016b0: 4b23 ldr r3, [pc, #140] @ (8001740 <loadEE+0x350>)
80016b2: 881b ldrh r3, [r3, #0]
80016b4: 4619 mov r1, r3
80016b6: 4b23 ldr r3, [pc, #140] @ (8001744 <loadEE+0x354>)
80016b8: 881b ldrh r3, [r3, #0]
80016ba: 461c mov r4, r3
80016bc: 4b28 ldr r3, [pc, #160] @ (8001760 <loadEE+0x370>)
80016be: 881b ldrh r3, [r3, #0]
80016c0: 461a mov r2, r3
80016c2: 4b28 ldr r3, [pc, #160] @ (8001764 <loadEE+0x374>)
80016c4: 881b ldrh r3, [r3, #0]
80016c6: 4638 mov r0, r7
80016c8: 9301 str r3, [sp, #4]
80016ca: 9200 str r2, [sp, #0]
80016cc: 4623 mov r3, r4
80016ce: 460a mov r2, r1
80016d0: 492f ldr r1, [pc, #188] @ (8001790 <loadEE+0x3a0>)
80016d2: f00c fb31 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80016d6: 463b mov r3, r7
80016d8: 4618 mov r0, r3
80016da: f7fe fd37 bl 800014c <strlen>
80016de: 4603 mov r3, r0
80016e0: b29a uxth r2, r3
80016e2: e057 b.n 8001794 <loadEE+0x3a4>
80016e4: 200003fe .word 0x200003fe
80016e8: 20000400 .word 0x20000400
80016ec: 20000402 .word 0x20000402
80016f0: 20000404 .word 0x20000404
80016f4: 20000406 .word 0x20000406
80016f8: 20000408 .word 0x20000408
80016fc: 2000040a .word 0x2000040a
8001700: 2000040c .word 0x2000040c
8001704: 2000040e .word 0x2000040e
8001708: 20000410 .word 0x20000410
800170c: 20000412 .word 0x20000412
8001710: 20000414 .word 0x20000414
8001714: 20000418 .word 0x20000418
8001718: 2000041c .word 0x2000041c
800171c: 2000041e .word 0x2000041e
8001720: 20000420 .word 0x20000420
8001724: 20000422 .word 0x20000422
8001728: 2000041a .word 0x2000041a
800172c: 20000416 .word 0x20000416
8001730: 20000424 .word 0x20000424
8001734: 20000426 .word 0x20000426
8001738: 20000428 .word 0x20000428
800173c: 2000042a .word 0x2000042a
8001740: 2000042c .word 0x2000042c
8001744: 2000042e .word 0x2000042e
8001748: 20000430 .word 0x20000430
800174c: 20000432 .word 0x20000432
8001750: 20000434 .word 0x20000434
8001754: 20000436 .word 0x20000436
8001758: 20000438 .word 0x20000438
800175c: 2000043a .word 0x2000043a
8001760: 2000043c .word 0x2000043c
8001764: 2000043e .word 0x2000043e
8001768: 20000440 .word 0x20000440
800176c: 20000442 .word 0x20000442
8001770: 0800e8f4 .word 0x0800e8f4
8001774: 200003a8 .word 0x200003a8
8001778: 0800e8fc .word 0x0800e8fc
800177c: 0800e958 .word 0x0800e958
8001780: 0800e99c .word 0x0800e99c
8001784: 0800e9b4 .word 0x0800e9b4
8001788: 0800e9e8 .word 0x0800e9e8
800178c: 0800ea1c .word 0x0800ea1c
8001790: 0800ea50 .word 0x0800ea50
8001794: 4639 mov r1, r7
8001796: f04f 33ff mov.w r3, #4294967295
800179a: 4813 ldr r0, [pc, #76] @ (80017e8 <loadEE+0x3f8>)
800179c: f007 fcdc bl 8009158 <HAL_UART_Transmit>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
80017a0: 4b12 ldr r3, [pc, #72] @ (80017ec <loadEE+0x3fc>)
80017a2: 881b ldrh r3, [r3, #0]
80017a4: 4619 mov r1, r3
80017a6: 4b12 ldr r3, [pc, #72] @ (80017f0 <loadEE+0x400>)
80017a8: 881b ldrh r3, [r3, #0]
80017aa: 461c mov r4, r3
80017ac: 4b11 ldr r3, [pc, #68] @ (80017f4 <loadEE+0x404>)
80017ae: 881b ldrh r3, [r3, #0]
80017b0: 461a mov r2, r3
80017b2: 4b11 ldr r3, [pc, #68] @ (80017f8 <loadEE+0x408>)
80017b4: 881b ldrh r3, [r3, #0]
80017b6: 4638 mov r0, r7
80017b8: 9301 str r3, [sp, #4]
80017ba: 9200 str r2, [sp, #0]
80017bc: 4623 mov r3, r4
80017be: 460a mov r2, r1
80017c0: 490e ldr r1, [pc, #56] @ (80017fc <loadEE+0x40c>)
80017c2: f00c fab9 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80017c6: 463b mov r3, r7
80017c8: 4618 mov r0, r3
80017ca: f7fe fcbf bl 800014c <strlen>
80017ce: 4603 mov r3, r0
80017d0: b29a uxth r2, r3
80017d2: 4639 mov r1, r7
80017d4: f04f 33ff mov.w r3, #4294967295
80017d8: 4803 ldr r0, [pc, #12] @ (80017e8 <loadEE+0x3f8>)
80017da: f007 fcbd bl 8009158 <HAL_UART_Transmit>
}
80017de: bf00 nop
80017e0: 37cc adds r7, #204 @ 0xcc
80017e2: 46bd mov sp, r7
80017e4: bdf0 pop {r4, r5, r6, r7, pc}
80017e6: bf00 nop
80017e8: 200003a8 .word 0x200003a8
80017ec: 20000430 .word 0x20000430
80017f0: 20000432 .word 0x20000432
80017f4: 20000440 .word 0x20000440
80017f8: 20000442 .word 0x20000442
80017fc: 0800ea84 .word 0x0800ea84
08001800 <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void){
8001800: b580 push {r7, lr}
8001802: b082 sub sp, #8
8001804: af00 add r7, sp, #0
static uint8_t c1s = 0;
static uint8_t inidx=0;
static uint8_t inbuf[4];
uint8_t i;
if (++c10ms >= 10) { // 10 ms
8001806: 4b7c ldr r3, [pc, #496] @ (80019f8 <HAL_SYSTICK_Callback+0x1f8>)
8001808: 781b ldrb r3, [r3, #0]
800180a: 3301 adds r3, #1
800180c: b2da uxtb r2, r3
800180e: 4b7a ldr r3, [pc, #488] @ (80019f8 <HAL_SYSTICK_Callback+0x1f8>)
8001810: 701a strb r2, [r3, #0]
8001812: 4b79 ldr r3, [pc, #484] @ (80019f8 <HAL_SYSTICK_Callback+0x1f8>)
8001814: 781b ldrb r3, [r3, #0]
8001816: 2b09 cmp r3, #9
8001818: f240 81db bls.w 8001bd2 <HAL_SYSTICK_Callback+0x3d2>
c10ms = 0;
800181c: 4b76 ldr r3, [pc, #472] @ (80019f8 <HAL_SYSTICK_Callback+0x1f8>)
800181e: 2200 movs r2, #0
8001820: 701a strb r2, [r3, #0]
if(rtP1)rtP1--;
8001822: 4b76 ldr r3, [pc, #472] @ (80019fc <HAL_SYSTICK_Callback+0x1fc>)
8001824: 781b ldrb r3, [r3, #0]
8001826: b2db uxtb r3, r3
8001828: 2b00 cmp r3, #0
800182a: d006 beq.n 800183a <HAL_SYSTICK_Callback+0x3a>
800182c: 4b73 ldr r3, [pc, #460] @ (80019fc <HAL_SYSTICK_Callback+0x1fc>)
800182e: 781b ldrb r3, [r3, #0]
8001830: b2db uxtb r3, r3
8001832: 3b01 subs r3, #1
8001834: b2da uxtb r2, r3
8001836: 4b71 ldr r3, [pc, #452] @ (80019fc <HAL_SYSTICK_Callback+0x1fc>)
8001838: 701a strb r2, [r3, #0]
if(rtP2)rtP2--;
800183a: 4b71 ldr r3, [pc, #452] @ (8001a00 <HAL_SYSTICK_Callback+0x200>)
800183c: 781b ldrb r3, [r3, #0]
800183e: b2db uxtb r3, r3
8001840: 2b00 cmp r3, #0
8001842: d006 beq.n 8001852 <HAL_SYSTICK_Callback+0x52>
8001844: 4b6e ldr r3, [pc, #440] @ (8001a00 <HAL_SYSTICK_Callback+0x200>)
8001846: 781b ldrb r3, [r3, #0]
8001848: b2db uxtb r3, r3
800184a: 3b01 subs r3, #1
800184c: b2da uxtb r2, r3
800184e: 4b6c ldr r3, [pc, #432] @ (8001a00 <HAL_SYSTICK_Callback+0x200>)
8001850: 701a strb r2, [r3, #0]
if(rtTLC)rtTLC--;
8001852: 4b6c ldr r3, [pc, #432] @ (8001a04 <HAL_SYSTICK_Callback+0x204>)
8001854: 781b ldrb r3, [r3, #0]
8001856: b2db uxtb r3, r3
8001858: 2b00 cmp r3, #0
800185a: d006 beq.n 800186a <HAL_SYSTICK_Callback+0x6a>
800185c: 4b69 ldr r3, [pc, #420] @ (8001a04 <HAL_SYSTICK_Callback+0x204>)
800185e: 781b ldrb r3, [r3, #0]
8001860: b2db uxtb r3, r3
8001862: 3b01 subs r3, #1
8001864: b2da uxtb r2, r3
8001866: 4b67 ldr r3, [pc, #412] @ (8001a04 <HAL_SYSTICK_Callback+0x204>)
8001868: 701a strb r2, [r3, #0]
//**** legge i tasti********************************************************************************
inidx++;
800186a: 4b67 ldr r3, [pc, #412] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
800186c: 781b ldrb r3, [r3, #0]
800186e: 3301 adds r3, #1
8001870: b2da uxtb r2, r3
8001872: 4b65 ldr r3, [pc, #404] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
8001874: 701a strb r2, [r3, #0]
inidx&=0x03;
8001876: 4b64 ldr r3, [pc, #400] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
8001878: 781b ldrb r3, [r3, #0]
800187a: f003 0303 and.w r3, r3, #3
800187e: b2da uxtb r2, r3
8001880: 4b61 ldr r3, [pc, #388] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
8001882: 701a strb r2, [r3, #0]
if(HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP1;else inbuf[inidx]&=(~INP1);
8001884: f44f 4180 mov.w r1, #16384 @ 0x4000
8001888: 4860 ldr r0, [pc, #384] @ (8001a0c <HAL_SYSTICK_Callback+0x20c>)
800188a: f004 fb4f bl 8005f2c <HAL_GPIO_ReadPin>
800188e: 4603 mov r3, r0
8001890: 2b00 cmp r3, #0
8001892: d10c bne.n 80018ae <HAL_SYSTICK_Callback+0xae>
8001894: 4b5c ldr r3, [pc, #368] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
8001896: 781b ldrb r3, [r3, #0]
8001898: 461a mov r2, r3
800189a: 4b5d ldr r3, [pc, #372] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
800189c: 5c9b ldrb r3, [r3, r2]
800189e: 4a5a ldr r2, [pc, #360] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80018a0: 7812 ldrb r2, [r2, #0]
80018a2: f043 0301 orr.w r3, r3, #1
80018a6: b2d9 uxtb r1, r3
80018a8: 4b59 ldr r3, [pc, #356] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80018aa: 5499 strb r1, [r3, r2]
80018ac: e00b b.n 80018c6 <HAL_SYSTICK_Callback+0xc6>
80018ae: 4b56 ldr r3, [pc, #344] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80018b0: 781b ldrb r3, [r3, #0]
80018b2: 461a mov r2, r3
80018b4: 4b56 ldr r3, [pc, #344] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80018b6: 5c9b ldrb r3, [r3, r2]
80018b8: 4a53 ldr r2, [pc, #332] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80018ba: 7812 ldrb r2, [r2, #0]
80018bc: f023 0301 bic.w r3, r3, #1
80018c0: b2d9 uxtb r1, r3
80018c2: 4b53 ldr r3, [pc, #332] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80018c4: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP2;else inbuf[inidx]&=(~INP2);
80018c6: f44f 4100 mov.w r1, #32768 @ 0x8000
80018ca: 4850 ldr r0, [pc, #320] @ (8001a0c <HAL_SYSTICK_Callback+0x20c>)
80018cc: f004 fb2e bl 8005f2c <HAL_GPIO_ReadPin>
80018d0: 4603 mov r3, r0
80018d2: 2b00 cmp r3, #0
80018d4: d10c bne.n 80018f0 <HAL_SYSTICK_Callback+0xf0>
80018d6: 4b4c ldr r3, [pc, #304] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80018d8: 781b ldrb r3, [r3, #0]
80018da: 461a mov r2, r3
80018dc: 4b4c ldr r3, [pc, #304] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80018de: 5c9b ldrb r3, [r3, r2]
80018e0: 4a49 ldr r2, [pc, #292] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80018e2: 7812 ldrb r2, [r2, #0]
80018e4: f043 0302 orr.w r3, r3, #2
80018e8: b2d9 uxtb r1, r3
80018ea: 4b49 ldr r3, [pc, #292] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80018ec: 5499 strb r1, [r3, r2]
80018ee: e00b b.n 8001908 <HAL_SYSTICK_Callback+0x108>
80018f0: 4b45 ldr r3, [pc, #276] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80018f2: 781b ldrb r3, [r3, #0]
80018f4: 461a mov r2, r3
80018f6: 4b46 ldr r3, [pc, #280] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80018f8: 5c9b ldrb r3, [r3, r2]
80018fa: 4a43 ldr r2, [pc, #268] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80018fc: 7812 ldrb r2, [r2, #0]
80018fe: f023 0302 bic.w r3, r3, #2
8001902: b2d9 uxtb r1, r3
8001904: 4b42 ldr r3, [pc, #264] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
8001906: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH1;else inbuf[inidx]&=(~INCH1);
8001908: f44f 5180 mov.w r1, #4096 @ 0x1000
800190c: 4841 ldr r0, [pc, #260] @ (8001a14 <HAL_SYSTICK_Callback+0x214>)
800190e: f004 fb0d bl 8005f2c <HAL_GPIO_ReadPin>
8001912: 4603 mov r3, r0
8001914: 2b00 cmp r3, #0
8001916: d10c bne.n 8001932 <HAL_SYSTICK_Callback+0x132>
8001918: 4b3b ldr r3, [pc, #236] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
800191a: 781b ldrb r3, [r3, #0]
800191c: 461a mov r2, r3
800191e: 4b3c ldr r3, [pc, #240] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
8001920: 5c9b ldrb r3, [r3, r2]
8001922: 4a39 ldr r2, [pc, #228] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
8001924: 7812 ldrb r2, [r2, #0]
8001926: f043 0304 orr.w r3, r3, #4
800192a: b2d9 uxtb r1, r3
800192c: 4b38 ldr r3, [pc, #224] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
800192e: 5499 strb r1, [r3, r2]
8001930: e00b b.n 800194a <HAL_SYSTICK_Callback+0x14a>
8001932: 4b35 ldr r3, [pc, #212] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
8001934: 781b ldrb r3, [r3, #0]
8001936: 461a mov r2, r3
8001938: 4b35 ldr r3, [pc, #212] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
800193a: 5c9b ldrb r3, [r3, r2]
800193c: 4a32 ldr r2, [pc, #200] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
800193e: 7812 ldrb r2, [r2, #0]
8001940: f023 0304 bic.w r3, r3, #4
8001944: b2d9 uxtb r1, r3
8001946: 4b32 ldr r3, [pc, #200] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
8001948: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH2;else inbuf[inidx]&=(~INCH2);
800194a: f44f 5100 mov.w r1, #8192 @ 0x2000
800194e: 4831 ldr r0, [pc, #196] @ (8001a14 <HAL_SYSTICK_Callback+0x214>)
8001950: f004 faec bl 8005f2c <HAL_GPIO_ReadPin>
8001954: 4603 mov r3, r0
8001956: 2b00 cmp r3, #0
8001958: d10c bne.n 8001974 <HAL_SYSTICK_Callback+0x174>
800195a: 4b2b ldr r3, [pc, #172] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
800195c: 781b ldrb r3, [r3, #0]
800195e: 461a mov r2, r3
8001960: 4b2b ldr r3, [pc, #172] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
8001962: 5c9b ldrb r3, [r3, r2]
8001964: 4a28 ldr r2, [pc, #160] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
8001966: 7812 ldrb r2, [r2, #0]
8001968: f043 0308 orr.w r3, r3, #8
800196c: b2d9 uxtb r1, r3
800196e: 4b28 ldr r3, [pc, #160] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
8001970: 5499 strb r1, [r3, r2]
8001972: e00b b.n 800198c <HAL_SYSTICK_Callback+0x18c>
8001974: 4b24 ldr r3, [pc, #144] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
8001976: 781b ldrb r3, [r3, #0]
8001978: 461a mov r2, r3
800197a: 4b25 ldr r3, [pc, #148] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
800197c: 5c9b ldrb r3, [r3, r2]
800197e: 4a22 ldr r2, [pc, #136] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
8001980: 7812 ldrb r2, [r2, #0]
8001982: f023 0308 bic.w r3, r3, #8
8001986: b2d9 uxtb r1, r3
8001988: 4b21 ldr r3, [pc, #132] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
800198a: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH3;else inbuf[inidx]&=(~INCH3);
800198c: f44f 4180 mov.w r1, #16384 @ 0x4000
8001990: 4820 ldr r0, [pc, #128] @ (8001a14 <HAL_SYSTICK_Callback+0x214>)
8001992: f004 facb bl 8005f2c <HAL_GPIO_ReadPin>
8001996: 4603 mov r3, r0
8001998: 2b00 cmp r3, #0
800199a: d10c bne.n 80019b6 <HAL_SYSTICK_Callback+0x1b6>
800199c: 4b1a ldr r3, [pc, #104] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
800199e: 781b ldrb r3, [r3, #0]
80019a0: 461a mov r2, r3
80019a2: 4b1b ldr r3, [pc, #108] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80019a4: 5c9b ldrb r3, [r3, r2]
80019a6: 4a18 ldr r2, [pc, #96] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80019a8: 7812 ldrb r2, [r2, #0]
80019aa: f043 0310 orr.w r3, r3, #16
80019ae: b2d9 uxtb r1, r3
80019b0: 4b17 ldr r3, [pc, #92] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80019b2: 5499 strb r1, [r3, r2]
80019b4: e00b b.n 80019ce <HAL_SYSTICK_Callback+0x1ce>
80019b6: 4b14 ldr r3, [pc, #80] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80019b8: 781b ldrb r3, [r3, #0]
80019ba: 461a mov r2, r3
80019bc: 4b14 ldr r3, [pc, #80] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80019be: 5c9b ldrb r3, [r3, r2]
80019c0: 4a11 ldr r2, [pc, #68] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80019c2: 7812 ldrb r2, [r2, #0]
80019c4: f023 0310 bic.w r3, r3, #16
80019c8: b2d9 uxtb r1, r3
80019ca: 4b11 ldr r3, [pc, #68] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80019cc: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH4;else inbuf[inidx]&=(~INCH4);
80019ce: f44f 4100 mov.w r1, #32768 @ 0x8000
80019d2: 4810 ldr r0, [pc, #64] @ (8001a14 <HAL_SYSTICK_Callback+0x214>)
80019d4: f004 faaa bl 8005f2c <HAL_GPIO_ReadPin>
80019d8: 4603 mov r3, r0
80019da: 2b00 cmp r3, #0
80019dc: d11c bne.n 8001a18 <HAL_SYSTICK_Callback+0x218>
80019de: 4b0a ldr r3, [pc, #40] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80019e0: 781b ldrb r3, [r3, #0]
80019e2: 461a mov r2, r3
80019e4: 4b0a ldr r3, [pc, #40] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80019e6: 5c9b ldrb r3, [r3, r2]
80019e8: 4a07 ldr r2, [pc, #28] @ (8001a08 <HAL_SYSTICK_Callback+0x208>)
80019ea: 7812 ldrb r2, [r2, #0]
80019ec: f043 0320 orr.w r3, r3, #32
80019f0: b2d9 uxtb r1, r3
80019f2: 4b07 ldr r3, [pc, #28] @ (8001a10 <HAL_SYSTICK_Callback+0x210>)
80019f4: 5499 strb r1, [r3, r2]
80019f6: e01b b.n 8001a30 <HAL_SYSTICK_Callback+0x230>
80019f8: 20000451 .word 0x20000451
80019fc: 20000004 .word 0x20000004
8001a00: 20000005 .word 0x20000005
8001a04: 20000006 .word 0x20000006
8001a08: 20000452 .word 0x20000452
8001a0c: 40011000 .word 0x40011000
8001a10: 20000454 .word 0x20000454
8001a14: 40010c00 .word 0x40010c00
8001a18: 4b70 ldr r3, [pc, #448] @ (8001bdc <HAL_SYSTICK_Callback+0x3dc>)
8001a1a: 781b ldrb r3, [r3, #0]
8001a1c: 461a mov r2, r3
8001a1e: 4b70 ldr r3, [pc, #448] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a20: 5c9b ldrb r3, [r3, r2]
8001a22: 4a6e ldr r2, [pc, #440] @ (8001bdc <HAL_SYSTICK_Callback+0x3dc>)
8001a24: 7812 ldrb r2, [r2, #0]
8001a26: f023 0320 bic.w r3, r3, #32
8001a2a: b2d9 uxtb r1, r3
8001a2c: 4b6c ldr r3, [pc, #432] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a2e: 5499 strb r1, [r3, r2]
pulsanti|=(inbuf[0]&inbuf[1]&inbuf[2]&inbuf[3]);
8001a30: 4b6b ldr r3, [pc, #428] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a32: 781a ldrb r2, [r3, #0]
8001a34: 4b6a ldr r3, [pc, #424] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a36: 785b ldrb r3, [r3, #1]
8001a38: 4013 ands r3, r2
8001a3a: b2da uxtb r2, r3
8001a3c: 4b68 ldr r3, [pc, #416] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a3e: 789b ldrb r3, [r3, #2]
8001a40: 4013 ands r3, r2
8001a42: b2da uxtb r2, r3
8001a44: 4b66 ldr r3, [pc, #408] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a46: 78db ldrb r3, [r3, #3]
8001a48: 4013 ands r3, r2
8001a4a: b2da uxtb r2, r3
8001a4c: 4b65 ldr r3, [pc, #404] @ (8001be4 <HAL_SYSTICK_Callback+0x3e4>)
8001a4e: 781b ldrb r3, [r3, #0]
8001a50: 4313 orrs r3, r2
8001a52: b2da uxtb r2, r3
8001a54: 4b63 ldr r3, [pc, #396] @ (8001be4 <HAL_SYSTICK_Callback+0x3e4>)
8001a56: 701a strb r2, [r3, #0]
pulsanti&=(inbuf[0]|inbuf[1]|inbuf[2]|inbuf[3]);
8001a58: 4b61 ldr r3, [pc, #388] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a5a: 781a ldrb r2, [r3, #0]
8001a5c: 4b60 ldr r3, [pc, #384] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a5e: 785b ldrb r3, [r3, #1]
8001a60: 4313 orrs r3, r2
8001a62: b2da uxtb r2, r3
8001a64: 4b5e ldr r3, [pc, #376] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a66: 789b ldrb r3, [r3, #2]
8001a68: 4313 orrs r3, r2
8001a6a: b2da uxtb r2, r3
8001a6c: 4b5c ldr r3, [pc, #368] @ (8001be0 <HAL_SYSTICK_Callback+0x3e0>)
8001a6e: 78db ldrb r3, [r3, #3]
8001a70: 4313 orrs r3, r2
8001a72: b2da uxtb r2, r3
8001a74: 4b5b ldr r3, [pc, #364] @ (8001be4 <HAL_SYSTICK_Callback+0x3e4>)
8001a76: 781b ldrb r3, [r3, #0]
8001a78: 4013 ands r3, r2
8001a7a: b2da uxtb r2, r3
8001a7c: 4b59 ldr r3, [pc, #356] @ (8001be4 <HAL_SYSTICK_Callback+0x3e4>)
8001a7e: 701a strb r2, [r3, #0]
//**** legge adc ***********************************************************************************
readAdc();
8001a80: f7fe fba2 bl 80001c8 <readAdc>
if (++c100ms >= 10) { // 10 ms
8001a84: 4b58 ldr r3, [pc, #352] @ (8001be8 <HAL_SYSTICK_Callback+0x3e8>)
8001a86: 781b ldrb r3, [r3, #0]
8001a88: 3301 adds r3, #1
8001a8a: b2da uxtb r2, r3
8001a8c: 4b56 ldr r3, [pc, #344] @ (8001be8 <HAL_SYSTICK_Callback+0x3e8>)
8001a8e: 701a strb r2, [r3, #0]
8001a90: 4b55 ldr r3, [pc, #340] @ (8001be8 <HAL_SYSTICK_Callback+0x3e8>)
8001a92: 781b ldrb r3, [r3, #0]
8001a94: 2b09 cmp r3, #9
8001a96: f240 809c bls.w 8001bd2 <HAL_SYSTICK_Callback+0x3d2>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8001a9a: 4b53 ldr r3, [pc, #332] @ (8001be8 <HAL_SYSTICK_Callback+0x3e8>)
8001a9c: 2200 movs r2, #0
8001a9e: 701a strb r2, [r3, #0]
for(i=0;i<4;i++){
8001aa0: 2300 movs r3, #0
8001aa2: 71fb strb r3, [r7, #7]
8001aa4: e013 b.n 8001ace <HAL_SYSTICK_Callback+0x2ce>
if(rtramp[i])rtramp[i]--;
8001aa6: 79fb ldrb r3, [r7, #7]
8001aa8: 4a50 ldr r2, [pc, #320] @ (8001bec <HAL_SYSTICK_Callback+0x3ec>)
8001aaa: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001aae: b29b uxth r3, r3
8001ab0: 2b00 cmp r3, #0
8001ab2: d009 beq.n 8001ac8 <HAL_SYSTICK_Callback+0x2c8>
8001ab4: 79fb ldrb r3, [r7, #7]
8001ab6: 4a4d ldr r2, [pc, #308] @ (8001bec <HAL_SYSTICK_Callback+0x3ec>)
8001ab8: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
8001abc: b292 uxth r2, r2
8001abe: 3a01 subs r2, #1
8001ac0: b291 uxth r1, r2
8001ac2: 4a4a ldr r2, [pc, #296] @ (8001bec <HAL_SYSTICK_Callback+0x3ec>)
8001ac4: f822 1013 strh.w r1, [r2, r3, lsl #1]
for(i=0;i<4;i++){
8001ac8: 79fb ldrb r3, [r7, #7]
8001aca: 3301 adds r3, #1
8001acc: 71fb strb r3, [r7, #7]
8001ace: 79fb ldrb r3, [r7, #7]
8001ad0: 2b03 cmp r3, #3
8001ad2: d9e8 bls.n 8001aa6 <HAL_SYSTICK_Callback+0x2a6>
}
if(rtCiclo<0xffff)rtCiclo++;
8001ad4: 4b46 ldr r3, [pc, #280] @ (8001bf0 <HAL_SYSTICK_Callback+0x3f0>)
8001ad6: 881b ldrh r3, [r3, #0]
8001ad8: b29b uxth r3, r3
8001ada: f64f 72ff movw r2, #65535 @ 0xffff
8001ade: 4293 cmp r3, r2
8001ae0: d006 beq.n 8001af0 <HAL_SYSTICK_Callback+0x2f0>
8001ae2: 4b43 ldr r3, [pc, #268] @ (8001bf0 <HAL_SYSTICK_Callback+0x3f0>)
8001ae4: 881b ldrh r3, [r3, #0]
8001ae6: b29b uxth r3, r3
8001ae8: 3301 adds r3, #1
8001aea: b29a uxth r2, r3
8001aec: 4b40 ldr r3, [pc, #256] @ (8001bf0 <HAL_SYSTICK_Callback+0x3f0>)
8001aee: 801a strh r2, [r3, #0]
//**** gestione buzzer *****************************************************************************
if(stBuz==bzmoving){
8001af0: 4b40 ldr r3, [pc, #256] @ (8001bf4 <HAL_SYSTICK_Callback+0x3f4>)
8001af2: 781b ldrb r3, [r3, #0]
8001af4: b2db uxtb r3, r3
8001af6: 2b01 cmp r3, #1
8001af8: d127 bne.n 8001b4a <HAL_SYSTICK_Callback+0x34a>
if(nobuz){
8001afa: 4b3f ldr r3, [pc, #252] @ (8001bf8 <HAL_SYSTICK_Callback+0x3f8>)
8001afc: 781b ldrb r3, [r3, #0]
8001afe: 2b00 cmp r3, #0
8001b00: d011 beq.n 8001b26 <HAL_SYSTICK_Callback+0x326>
if(c1s>=5)HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET);
8001b02: 4b3e ldr r3, [pc, #248] @ (8001bfc <HAL_SYSTICK_Callback+0x3fc>)
8001b04: 781b ldrb r3, [r3, #0]
8001b06: 2b04 cmp r3, #4
8001b08: d906 bls.n 8001b18 <HAL_SYSTICK_Callback+0x318>
8001b0a: 2200 movs r2, #0
8001b0c: f44f 5100 mov.w r1, #8192 @ 0x2000
8001b10: 483b ldr r0, [pc, #236] @ (8001c00 <HAL_SYSTICK_Callback+0x400>)
8001b12: f004 fa22 bl 8005f5a <HAL_GPIO_WritePin>
8001b16: e04f b.n 8001bb8 <HAL_SYSTICK_Callback+0x3b8>
8001b18: 2201 movs r2, #1
8001b1a: f44f 5100 mov.w r1, #8192 @ 0x2000
8001b1e: 4838 ldr r0, [pc, #224] @ (8001c00 <HAL_SYSTICK_Callback+0x400>)
8001b20: f004 fa1b bl 8005f5a <HAL_GPIO_WritePin>
8001b24: e048 b.n 8001bb8 <HAL_SYSTICK_Callback+0x3b8>
}else{
if(c1s>=5)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001b26: 4b35 ldr r3, [pc, #212] @ (8001bfc <HAL_SYSTICK_Callback+0x3fc>)
8001b28: 781b ldrb r3, [r3, #0]
8001b2a: 2b04 cmp r3, #4
8001b2c: d906 bls.n 8001b3c <HAL_SYSTICK_Callback+0x33c>
8001b2e: 2200 movs r2, #0
8001b30: f44f 7180 mov.w r1, #256 @ 0x100
8001b34: 4833 ldr r0, [pc, #204] @ (8001c04 <HAL_SYSTICK_Callback+0x404>)
8001b36: f004 fa10 bl 8005f5a <HAL_GPIO_WritePin>
8001b3a: e03d b.n 8001bb8 <HAL_SYSTICK_Callback+0x3b8>
8001b3c: 2201 movs r2, #1
8001b3e: f44f 7180 mov.w r1, #256 @ 0x100
8001b42: 4830 ldr r0, [pc, #192] @ (8001c04 <HAL_SYSTICK_Callback+0x404>)
8001b44: f004 fa09 bl 8005f5a <HAL_GPIO_WritePin>
8001b48: e036 b.n 8001bb8 <HAL_SYSTICK_Callback+0x3b8>
}
}else if(stBuz==bzwarning){
8001b4a: 4b2a ldr r3, [pc, #168] @ (8001bf4 <HAL_SYSTICK_Callback+0x3f4>)
8001b4c: 781b ldrb r3, [r3, #0]
8001b4e: b2db uxtb r3, r3
8001b50: 2b02 cmp r3, #2
8001b52: d12b bne.n 8001bac <HAL_SYSTICK_Callback+0x3ac>
if(nobuz){
8001b54: 4b28 ldr r3, [pc, #160] @ (8001bf8 <HAL_SYSTICK_Callback+0x3f8>)
8001b56: 781b ldrb r3, [r3, #0]
8001b58: 2b00 cmp r3, #0
8001b5a: d013 beq.n 8001b84 <HAL_SYSTICK_Callback+0x384>
if(c1s&2)HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET);
8001b5c: 4b27 ldr r3, [pc, #156] @ (8001bfc <HAL_SYSTICK_Callback+0x3fc>)
8001b5e: 781b ldrb r3, [r3, #0]
8001b60: f003 0302 and.w r3, r3, #2
8001b64: 2b00 cmp r3, #0
8001b66: d006 beq.n 8001b76 <HAL_SYSTICK_Callback+0x376>
8001b68: 2200 movs r2, #0
8001b6a: f44f 5100 mov.w r1, #8192 @ 0x2000
8001b6e: 4824 ldr r0, [pc, #144] @ (8001c00 <HAL_SYSTICK_Callback+0x400>)
8001b70: f004 f9f3 bl 8005f5a <HAL_GPIO_WritePin>
8001b74: e020 b.n 8001bb8 <HAL_SYSTICK_Callback+0x3b8>
8001b76: 2201 movs r2, #1
8001b78: f44f 5100 mov.w r1, #8192 @ 0x2000
8001b7c: 4820 ldr r0, [pc, #128] @ (8001c00 <HAL_SYSTICK_Callback+0x400>)
8001b7e: f004 f9ec bl 8005f5a <HAL_GPIO_WritePin>
8001b82: e019 b.n 8001bb8 <HAL_SYSTICK_Callback+0x3b8>
}else{
if(c1s&2)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001b84: 4b1d ldr r3, [pc, #116] @ (8001bfc <HAL_SYSTICK_Callback+0x3fc>)
8001b86: 781b ldrb r3, [r3, #0]
8001b88: f003 0302 and.w r3, r3, #2
8001b8c: 2b00 cmp r3, #0
8001b8e: d006 beq.n 8001b9e <HAL_SYSTICK_Callback+0x39e>
8001b90: 2200 movs r2, #0
8001b92: f44f 7180 mov.w r1, #256 @ 0x100
8001b96: 481b ldr r0, [pc, #108] @ (8001c04 <HAL_SYSTICK_Callback+0x404>)
8001b98: f004 f9df bl 8005f5a <HAL_GPIO_WritePin>
8001b9c: e00c b.n 8001bb8 <HAL_SYSTICK_Callback+0x3b8>
8001b9e: 2201 movs r2, #1
8001ba0: f44f 7180 mov.w r1, #256 @ 0x100
8001ba4: 4817 ldr r0, [pc, #92] @ (8001c04 <HAL_SYSTICK_Callback+0x404>)
8001ba6: f004 f9d8 bl 8005f5a <HAL_GPIO_WritePin>
8001baa: e005 b.n 8001bb8 <HAL_SYSTICK_Callback+0x3b8>
}
}else{//bzoff
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001bac: 2200 movs r2, #0
8001bae: f44f 7180 mov.w r1, #256 @ 0x100
8001bb2: 4814 ldr r0, [pc, #80] @ (8001c04 <HAL_SYSTICK_Callback+0x404>)
8001bb4: f004 f9d1 bl 8005f5a <HAL_GPIO_WritePin>
}
//**************************************************************************************************
if (++c1s >= 10) { // 1 s
8001bb8: 4b10 ldr r3, [pc, #64] @ (8001bfc <HAL_SYSTICK_Callback+0x3fc>)
8001bba: 781b ldrb r3, [r3, #0]
8001bbc: 3301 adds r3, #1
8001bbe: b2da uxtb r2, r3
8001bc0: 4b0e ldr r3, [pc, #56] @ (8001bfc <HAL_SYSTICK_Callback+0x3fc>)
8001bc2: 701a strb r2, [r3, #0]
8001bc4: 4b0d ldr r3, [pc, #52] @ (8001bfc <HAL_SYSTICK_Callback+0x3fc>)
8001bc6: 781b ldrb r3, [r3, #0]
8001bc8: 2b09 cmp r3, #9
8001bca: d902 bls.n 8001bd2 <HAL_SYSTICK_Callback+0x3d2>
c1s = 0;
8001bcc: 4b0b ldr r3, [pc, #44] @ (8001bfc <HAL_SYSTICK_Callback+0x3fc>)
8001bce: 2200 movs r2, #0
8001bd0: 701a strb r2, [r3, #0]
//HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
}
}
}
}
8001bd2: bf00 nop
8001bd4: 3708 adds r7, #8
8001bd6: 46bd mov sp, r7
8001bd8: bd80 pop {r7, pc}
8001bda: bf00 nop
8001bdc: 20000452 .word 0x20000452
8001be0: 20000454 .word 0x20000454
8001be4: 200003f0 .word 0x200003f0
8001be8: 20000458 .word 0x20000458
8001bec: 200003f4 .word 0x200003f4
8001bf0: 200003fc .word 0x200003fc
8001bf4: 2000044f .word 0x2000044f
8001bf8: 20000450 .word 0x20000450
8001bfc: 20000459 .word 0x20000459
8001c00: 40011000 .word 0x40011000
8001c04: 40010800 .word 0x40010800
08001c08 <managePulsanti>:
void managePulsanti(void){
8001c08: b580 push {r7, lr}
8001c0a: af00 add r7, sp, #0
if(pulsanti&INP1){
8001c0c: 4baa ldr r3, [pc, #680] @ (8001eb8 <managePulsanti+0x2b0>)
8001c0e: 781b ldrb r3, [r3, #0]
8001c10: f003 0301 and.w r3, r3, #1
8001c14: 2b00 cmp r3, #0
8001c16: d013 beq.n 8001c40 <managePulsanti+0x38>
if(rtP1==0)stPulsanti|=P1START;
8001c18: 4ba8 ldr r3, [pc, #672] @ (8001ebc <managePulsanti+0x2b4>)
8001c1a: 781b ldrb r3, [r3, #0]
8001c1c: b2db uxtb r3, r3
8001c1e: 2b00 cmp r3, #0
8001c20: d107 bne.n 8001c32 <managePulsanti+0x2a>
8001c22: 4ba7 ldr r3, [pc, #668] @ (8001ec0 <managePulsanti+0x2b8>)
8001c24: 881b ldrh r3, [r3, #0]
8001c26: f043 0301 orr.w r3, r3, #1
8001c2a: b29a uxth r2, r3
8001c2c: 4ba4 ldr r3, [pc, #656] @ (8001ec0 <managePulsanti+0x2b8>)
8001c2e: 801a strh r2, [r3, #0]
8001c30: e02f b.n 8001c92 <managePulsanti+0x8a>
else{
HAL_GPIO_WritePin(LED2_GPIO_Port,LED2_Pin, GPIO_PIN_SET);
8001c32: 2201 movs r2, #1
8001c34: f44f 5100 mov.w r1, #8192 @ 0x2000
8001c38: 48a2 ldr r0, [pc, #648] @ (8001ec4 <managePulsanti+0x2bc>)
8001c3a: f004 f98e bl 8005f5a <HAL_GPIO_WritePin>
8001c3e: e028 b.n 8001c92 <managePulsanti+0x8a>
}
}else{
if(stPulsanti&P1START){
8001c40: 4b9f ldr r3, [pc, #636] @ (8001ec0 <managePulsanti+0x2b8>)
8001c42: 881b ldrh r3, [r3, #0]
8001c44: f003 0301 and.w r3, r3, #1
8001c48: 2b00 cmp r3, #0
8001c4a: d00d beq.n 8001c68 <managePulsanti+0x60>
stPulsanti&=(~P1START);
8001c4c: 4b9c ldr r3, [pc, #624] @ (8001ec0 <managePulsanti+0x2b8>)
8001c4e: 881b ldrh r3, [r3, #0]
8001c50: f023 0301 bic.w r3, r3, #1
8001c54: b29a uxth r2, r3
8001c56: 4b9a ldr r3, [pc, #616] @ (8001ec0 <managePulsanti+0x2b8>)
8001c58: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port,LED2_Pin, GPIO_PIN_RESET);
8001c5a: 2200 movs r2, #0
8001c5c: f44f 5100 mov.w r1, #8192 @ 0x2000
8001c60: 4898 ldr r0, [pc, #608] @ (8001ec4 <managePulsanti+0x2bc>)
8001c62: f004 f97a bl 8005f5a <HAL_GPIO_WritePin>
8001c66: e011 b.n 8001c8c <managePulsanti+0x84>
}else if(rtP1<=190){
8001c68: 4b94 ldr r3, [pc, #592] @ (8001ebc <managePulsanti+0x2b4>)
8001c6a: 781b ldrb r3, [r3, #0]
8001c6c: b2db uxtb r3, r3
8001c6e: 2bbe cmp r3, #190 @ 0xbe
8001c70: d80c bhi.n 8001c8c <managePulsanti+0x84>
stPulsanti|=P1STOP;
8001c72: 4b93 ldr r3, [pc, #588] @ (8001ec0 <managePulsanti+0x2b8>)
8001c74: 881b ldrh r3, [r3, #0]
8001c76: f043 0302 orr.w r3, r3, #2
8001c7a: b29a uxth r2, r3
8001c7c: 4b90 ldr r3, [pc, #576] @ (8001ec0 <managePulsanti+0x2b8>)
8001c7e: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port,LED2_Pin, GPIO_PIN_RESET);
8001c80: 2200 movs r2, #0
8001c82: f44f 5100 mov.w r1, #8192 @ 0x2000
8001c86: 488f ldr r0, [pc, #572] @ (8001ec4 <managePulsanti+0x2bc>)
8001c88: f004 f967 bl 8005f5a <HAL_GPIO_WritePin>
}
rtP1=200;
8001c8c: 4b8b ldr r3, [pc, #556] @ (8001ebc <managePulsanti+0x2b4>)
8001c8e: 22c8 movs r2, #200 @ 0xc8
8001c90: 701a strb r2, [r3, #0]
}
if(pulsanti&INP2){
8001c92: 4b89 ldr r3, [pc, #548] @ (8001eb8 <managePulsanti+0x2b0>)
8001c94: 781b ldrb r3, [r3, #0]
8001c96: f003 0302 and.w r3, r3, #2
8001c9a: 2b00 cmp r3, #0
8001c9c: d00c beq.n 8001cb8 <managePulsanti+0xb0>
if(rtP2==0)stPulsanti|=P2START;
8001c9e: 4b8a ldr r3, [pc, #552] @ (8001ec8 <managePulsanti+0x2c0>)
8001ca0: 781b ldrb r3, [r3, #0]
8001ca2: b2db uxtb r3, r3
8001ca4: 2b00 cmp r3, #0
8001ca6: d124 bne.n 8001cf2 <managePulsanti+0xea>
8001ca8: 4b85 ldr r3, [pc, #532] @ (8001ec0 <managePulsanti+0x2b8>)
8001caa: 881b ldrh r3, [r3, #0]
8001cac: f043 0304 orr.w r3, r3, #4
8001cb0: b29a uxth r2, r3
8001cb2: 4b83 ldr r3, [pc, #524] @ (8001ec0 <managePulsanti+0x2b8>)
8001cb4: 801a strh r2, [r3, #0]
8001cb6: e01c b.n 8001cf2 <managePulsanti+0xea>
}else{
if(stPulsanti&P2START)stPulsanti&=(~P2START);
8001cb8: 4b81 ldr r3, [pc, #516] @ (8001ec0 <managePulsanti+0x2b8>)
8001cba: 881b ldrh r3, [r3, #0]
8001cbc: f003 0304 and.w r3, r3, #4
8001cc0: 2b00 cmp r3, #0
8001cc2: d007 beq.n 8001cd4 <managePulsanti+0xcc>
8001cc4: 4b7e ldr r3, [pc, #504] @ (8001ec0 <managePulsanti+0x2b8>)
8001cc6: 881b ldrh r3, [r3, #0]
8001cc8: f023 0304 bic.w r3, r3, #4
8001ccc: b29a uxth r2, r3
8001cce: 4b7c ldr r3, [pc, #496] @ (8001ec0 <managePulsanti+0x2b8>)
8001cd0: 801a strh r2, [r3, #0]
8001cd2: e00b b.n 8001cec <managePulsanti+0xe4>
else if(rtP2<=190)stPulsanti|=P2STOP;
8001cd4: 4b7c ldr r3, [pc, #496] @ (8001ec8 <managePulsanti+0x2c0>)
8001cd6: 781b ldrb r3, [r3, #0]
8001cd8: b2db uxtb r3, r3
8001cda: 2bbe cmp r3, #190 @ 0xbe
8001cdc: d806 bhi.n 8001cec <managePulsanti+0xe4>
8001cde: 4b78 ldr r3, [pc, #480] @ (8001ec0 <managePulsanti+0x2b8>)
8001ce0: 881b ldrh r3, [r3, #0]
8001ce2: f043 0308 orr.w r3, r3, #8
8001ce6: b29a uxth r2, r3
8001ce8: 4b75 ldr r3, [pc, #468] @ (8001ec0 <managePulsanti+0x2b8>)
8001cea: 801a strh r2, [r3, #0]
rtP2=200;
8001cec: 4b76 ldr r3, [pc, #472] @ (8001ec8 <managePulsanti+0x2c0>)
8001cee: 22c8 movs r2, #200 @ 0xc8
8001cf0: 701a strb r2, [r3, #0]
}
stPulsanti&=(P1START|P1STOP|P2START|P2STOP);
8001cf2: 4b73 ldr r3, [pc, #460] @ (8001ec0 <managePulsanti+0x2b8>)
8001cf4: 881b ldrh r3, [r3, #0]
8001cf6: f003 030f and.w r3, r3, #15
8001cfa: b29a uxth r2, r3
8001cfc: 4b70 ldr r3, [pc, #448] @ (8001ec0 <managePulsanti+0x2b8>)
8001cfe: 801a strh r2, [r3, #0]
if(stPulsanti==0){
8001d00: 4b6f ldr r3, [pc, #444] @ (8001ec0 <managePulsanti+0x2b8>)
8001d02: 881b ldrh r3, [r3, #0]
8001d04: 2b00 cmp r3, #0
8001d06: f040 80d4 bne.w 8001eb2 <managePulsanti+0x2aa>
switch(pulsanti&0x3c){
8001d0a: 4b6b ldr r3, [pc, #428] @ (8001eb8 <managePulsanti+0x2b0>)
8001d0c: 781b ldrb r3, [r3, #0]
8001d0e: f003 033c and.w r3, r3, #60 @ 0x3c
8001d12: 2b30 cmp r3, #48 @ 0x30
8001d14: f200 80bb bhi.w 8001e8e <managePulsanti+0x286>
8001d18: a201 add r2, pc, #4 @ (adr r2, 8001d20 <managePulsanti+0x118>)
8001d1a: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001d1e: bf00 nop
8001d20: 08001de5 .word 0x08001de5
8001d24: 08001e8f .word 0x08001e8f
8001d28: 08001e8f .word 0x08001e8f
8001d2c: 08001e8f .word 0x08001e8f
8001d30: 08001e41 .word 0x08001e41
8001d34: 08001e8f .word 0x08001e8f
8001d38: 08001e8f .word 0x08001e8f
8001d3c: 08001e8f .word 0x08001e8f
8001d40: 08001df3 .word 0x08001df3
8001d44: 08001e8f .word 0x08001e8f
8001d48: 08001e8f .word 0x08001e8f
8001d4c: 08001e8f .word 0x08001e8f
8001d50: 08001e75 .word 0x08001e75
8001d54: 08001e8f .word 0x08001e8f
8001d58: 08001e8f .word 0x08001e8f
8001d5c: 08001e8f .word 0x08001e8f
8001d60: 08001e0d .word 0x08001e0d
8001d64: 08001e8f .word 0x08001e8f
8001d68: 08001e8f .word 0x08001e8f
8001d6c: 08001e8f .word 0x08001e8f
8001d70: 08001e8f .word 0x08001e8f
8001d74: 08001e8f .word 0x08001e8f
8001d78: 08001e8f .word 0x08001e8f
8001d7c: 08001e8f .word 0x08001e8f
8001d80: 08001e8f .word 0x08001e8f
8001d84: 08001e8f .word 0x08001e8f
8001d88: 08001e8f .word 0x08001e8f
8001d8c: 08001e8f .word 0x08001e8f
8001d90: 08001e8f .word 0x08001e8f
8001d94: 08001e8f .word 0x08001e8f
8001d98: 08001e8f .word 0x08001e8f
8001d9c: 08001e8f .word 0x08001e8f
8001da0: 08001e27 .word 0x08001e27
8001da4: 08001e8f .word 0x08001e8f
8001da8: 08001e8f .word 0x08001e8f
8001dac: 08001e8f .word 0x08001e8f
8001db0: 08001e8f .word 0x08001e8f
8001db4: 08001e8f .word 0x08001e8f
8001db8: 08001e8f .word 0x08001e8f
8001dbc: 08001e8f .word 0x08001e8f
8001dc0: 08001e8f .word 0x08001e8f
8001dc4: 08001e8f .word 0x08001e8f
8001dc8: 08001e8f .word 0x08001e8f
8001dcc: 08001e8f .word 0x08001e8f
8001dd0: 08001e8f .word 0x08001e8f
8001dd4: 08001e8f .word 0x08001e8f
8001dd8: 08001e8f .word 0x08001e8f
8001ddc: 08001e8f .word 0x08001e8f
8001de0: 08001e5b .word 0x08001e5b
case 0x00:
rtTLC=100;
8001de4: 4b39 ldr r3, [pc, #228] @ (8001ecc <managePulsanti+0x2c4>)
8001de6: 2264 movs r2, #100 @ 0x64
8001de8: 701a strb r2, [r3, #0]
stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW));
8001dea: 4b35 ldr r3, [pc, #212] @ (8001ec0 <managePulsanti+0x2b8>)
8001dec: 2200 movs r2, #0
8001dee: 801a strh r2, [r3, #0]
break;
8001df0: e05f b.n 8001eb2 <managePulsanti+0x2aa>
case 0x08://tlc1
if(rtTLC==0)stPulsanti|=M1FW;
8001df2: 4b36 ldr r3, [pc, #216] @ (8001ecc <managePulsanti+0x2c4>)
8001df4: 781b ldrb r3, [r3, #0]
8001df6: b2db uxtb r3, r3
8001df8: 2b00 cmp r3, #0
8001dfa: d14f bne.n 8001e9c <managePulsanti+0x294>
8001dfc: 4b30 ldr r3, [pc, #192] @ (8001ec0 <managePulsanti+0x2b8>)
8001dfe: 881b ldrh r3, [r3, #0]
8001e00: f043 0310 orr.w r3, r3, #16
8001e04: b29a uxth r2, r3
8001e06: 4b2e ldr r3, [pc, #184] @ (8001ec0 <managePulsanti+0x2b8>)
8001e08: 801a strh r2, [r3, #0]
break;
8001e0a: e047 b.n 8001e9c <managePulsanti+0x294>
case 0x10://tlc2
if(rtTLC==0)stPulsanti|=M1BW;
8001e0c: 4b2f ldr r3, [pc, #188] @ (8001ecc <managePulsanti+0x2c4>)
8001e0e: 781b ldrb r3, [r3, #0]
8001e10: b2db uxtb r3, r3
8001e12: 2b00 cmp r3, #0
8001e14: d144 bne.n 8001ea0 <managePulsanti+0x298>
8001e16: 4b2a ldr r3, [pc, #168] @ (8001ec0 <managePulsanti+0x2b8>)
8001e18: 881b ldrh r3, [r3, #0]
8001e1a: f043 0320 orr.w r3, r3, #32
8001e1e: b29a uxth r2, r3
8001e20: 4b27 ldr r3, [pc, #156] @ (8001ec0 <managePulsanti+0x2b8>)
8001e22: 801a strh r2, [r3, #0]
break;
8001e24: e03c b.n 8001ea0 <managePulsanti+0x298>
case 0x20://tlc3
if(rtTLC==0)stPulsanti|=M3FW;
8001e26: 4b29 ldr r3, [pc, #164] @ (8001ecc <managePulsanti+0x2c4>)
8001e28: 781b ldrb r3, [r3, #0]
8001e2a: b2db uxtb r3, r3
8001e2c: 2b00 cmp r3, #0
8001e2e: d139 bne.n 8001ea4 <managePulsanti+0x29c>
8001e30: 4b23 ldr r3, [pc, #140] @ (8001ec0 <managePulsanti+0x2b8>)
8001e32: 881b ldrh r3, [r3, #0]
8001e34: f443 7380 orr.w r3, r3, #256 @ 0x100
8001e38: b29a uxth r2, r3
8001e3a: 4b21 ldr r3, [pc, #132] @ (8001ec0 <managePulsanti+0x2b8>)
8001e3c: 801a strh r2, [r3, #0]
break;
8001e3e: e031 b.n 8001ea4 <managePulsanti+0x29c>
case 0x04://tlc4
if(rtTLC==0)stPulsanti|=M3BW;
8001e40: 4b22 ldr r3, [pc, #136] @ (8001ecc <managePulsanti+0x2c4>)
8001e42: 781b ldrb r3, [r3, #0]
8001e44: b2db uxtb r3, r3
8001e46: 2b00 cmp r3, #0
8001e48: d12e bne.n 8001ea8 <managePulsanti+0x2a0>
8001e4a: 4b1d ldr r3, [pc, #116] @ (8001ec0 <managePulsanti+0x2b8>)
8001e4c: 881b ldrh r3, [r3, #0]
8001e4e: f443 7300 orr.w r3, r3, #512 @ 0x200
8001e52: b29a uxth r2, r3
8001e54: 4b1a ldr r3, [pc, #104] @ (8001ec0 <managePulsanti+0x2b8>)
8001e56: 801a strh r2, [r3, #0]
break;
8001e58: e026 b.n 8001ea8 <managePulsanti+0x2a0>
case 0x30://tlc5
if(rtTLC==0)stPulsanti|=M4FW;
8001e5a: 4b1c ldr r3, [pc, #112] @ (8001ecc <managePulsanti+0x2c4>)
8001e5c: 781b ldrb r3, [r3, #0]
8001e5e: b2db uxtb r3, r3
8001e60: 2b00 cmp r3, #0
8001e62: d123 bne.n 8001eac <managePulsanti+0x2a4>
8001e64: 4b16 ldr r3, [pc, #88] @ (8001ec0 <managePulsanti+0x2b8>)
8001e66: 881b ldrh r3, [r3, #0]
8001e68: f443 6380 orr.w r3, r3, #1024 @ 0x400
8001e6c: b29a uxth r2, r3
8001e6e: 4b14 ldr r3, [pc, #80] @ (8001ec0 <managePulsanti+0x2b8>)
8001e70: 801a strh r2, [r3, #0]
break;
8001e72: e01b b.n 8001eac <managePulsanti+0x2a4>
case 0x0c://tlc6
if(rtTLC==0)stPulsanti|=M4BW;
8001e74: 4b15 ldr r3, [pc, #84] @ (8001ecc <managePulsanti+0x2c4>)
8001e76: 781b ldrb r3, [r3, #0]
8001e78: b2db uxtb r3, r3
8001e7a: 2b00 cmp r3, #0
8001e7c: d118 bne.n 8001eb0 <managePulsanti+0x2a8>
8001e7e: 4b10 ldr r3, [pc, #64] @ (8001ec0 <managePulsanti+0x2b8>)
8001e80: 881b ldrh r3, [r3, #0]
8001e82: f443 6300 orr.w r3, r3, #2048 @ 0x800
8001e86: b29a uxth r2, r3
8001e88: 4b0d ldr r3, [pc, #52] @ (8001ec0 <managePulsanti+0x2b8>)
8001e8a: 801a strh r2, [r3, #0]
break;
8001e8c: e010 b.n 8001eb0 <managePulsanti+0x2a8>
default:
rtTLC=100;
8001e8e: 4b0f ldr r3, [pc, #60] @ (8001ecc <managePulsanti+0x2c4>)
8001e90: 2264 movs r2, #100 @ 0x64
8001e92: 701a strb r2, [r3, #0]
stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW));
8001e94: 4b0a ldr r3, [pc, #40] @ (8001ec0 <managePulsanti+0x2b8>)
8001e96: 2200 movs r2, #0
8001e98: 801a strh r2, [r3, #0]
break;
8001e9a: e00a b.n 8001eb2 <managePulsanti+0x2aa>
break;
8001e9c: bf00 nop
8001e9e: e008 b.n 8001eb2 <managePulsanti+0x2aa>
break;
8001ea0: bf00 nop
8001ea2: e006 b.n 8001eb2 <managePulsanti+0x2aa>
break;
8001ea4: bf00 nop
8001ea6: e004 b.n 8001eb2 <managePulsanti+0x2aa>
break;
8001ea8: bf00 nop
8001eaa: e002 b.n 8001eb2 <managePulsanti+0x2aa>
break;
8001eac: bf00 nop
8001eae: e000 b.n 8001eb2 <managePulsanti+0x2aa>
break;
8001eb0: bf00 nop
}
}
}
8001eb2: bf00 nop
8001eb4: bd80 pop {r7, pc}
8001eb6: bf00 nop
8001eb8: 200003f0 .word 0x200003f0
8001ebc: 20000004 .word 0x20000004
8001ec0: 2000044c .word 0x2000044c
8001ec4: 40011000 .word 0x40011000
8001ec8: 20000005 .word 0x20000005
8001ecc: 20000006 .word 0x20000006
08001ed0 <manageCiclo>:
void manageCiclo(void){
8001ed0: b580 push {r7, lr}
8001ed2: b084 sub sp, #16
8001ed4: af02 add r7, sp, #8
motMov_st m1,m2,m3,m4;
switch(stCiclo){
8001ed6: 4b9b ldr r3, [pc, #620] @ (8002144 <manageCiclo+0x274>)
8001ed8: 781b ldrb r3, [r3, #0]
8001eda: 2b16 cmp r3, #22
8001edc: f200 8503 bhi.w 80028e6 <manageCiclo+0xa16>
8001ee0: a201 add r2, pc, #4 @ (adr r2, 8001ee8 <manageCiclo+0x18>)
8001ee2: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001ee6: bf00 nop
8001ee8: 08001f45 .word 0x08001f45
8001eec: 08001f8f .word 0x08001f8f
8001ef0: 08001fd9 .word 0x08001fd9
8001ef4: 08002023 .word 0x08002023
8001ef8: 0800206d .word 0x0800206d
8001efc: 080020b5 .word 0x080020b5
8001f00: 080020fd .word 0x080020fd
8001f04: 08002171 .word 0x08002171
8001f08: 080021b9 .word 0x080021b9
8001f0c: 08002201 .word 0x08002201
8001f10: 08002249 .word 0x08002249
8001f14: 08002291 .word 0x08002291
8001f18: 080022d9 .word 0x080022d9
8001f1c: 08002321 .word 0x08002321
8001f20: 08002369 .word 0x08002369
8001f24: 080023dd .word 0x080023dd
8001f28: 08002425 .word 0x08002425
8001f2c: 0800246d .word 0x0800246d
8001f30: 080024d5 .word 0x080024d5
8001f34: 0800253f .word 0x0800253f
8001f38: 0800258d .word 0x0800258d
8001f3c: 080027df .word 0x080027df
8001f40: 08002841 .word 0x08002841
case omchiuso:
if(stPulsanti&P1START){
8001f44: 4b80 ldr r3, [pc, #512] @ (8002148 <manageCiclo+0x278>)
8001f46: 881b ldrh r3, [r3, #0]
8001f48: f003 0301 and.w r3, r3, #1
8001f4c: 2b00 cmp r3, #0
8001f4e: d012 beq.n 8001f76 <manageCiclo+0xa6>
stBuz=bzwarning;
8001f50: 4b7e ldr r3, [pc, #504] @ (800214c <manageCiclo+0x27c>)
8001f52: 2202 movs r2, #2
8001f54: 701a strb r2, [r3, #0]
rtCiclo=0;
8001f56: 4b7e ldr r3, [pc, #504] @ (8002150 <manageCiclo+0x280>)
8001f58: 2200 movs r2, #0
8001f5a: 801a strh r2, [r3, #0]
stCiclo=omapertura0;
8001f5c: 4b79 ldr r3, [pc, #484] @ (8002144 <manageCiclo+0x274>)
8001f5e: 2212 movs r2, #18
8001f60: 701a strb r2, [r3, #0]
(void)m1ap();(void)m2ap();(void)m3ap();(void)m4ap();
8001f62: f001 f841 bl 8002fe8 <m1ap>
8001f66: f001 f911 bl 800318c <m2ap>
8001f6a: f001 f9e1 bl 8003330 <m3ap>
8001f6e: f001 fab3 bl 80034d8 <m4ap>
}else if(stPulsanti&P1STOP)stCiclo=omstopapertura;
break;
8001f72: f000 bc8b b.w 800288c <manageCiclo+0x9bc>
}else if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001f76: 4b74 ldr r3, [pc, #464] @ (8002148 <manageCiclo+0x278>)
8001f78: 881b ldrh r3, [r3, #0]
8001f7a: f003 0302 and.w r3, r3, #2
8001f7e: 2b00 cmp r3, #0
8001f80: f000 8484 beq.w 800288c <manageCiclo+0x9bc>
8001f84: 4b6f ldr r3, [pc, #444] @ (8002144 <manageCiclo+0x274>)
8001f86: 2213 movs r2, #19
8001f88: 701a strb r2, [r3, #0]
break;
8001f8a: f000 bc7f b.w 800288c <manageCiclo+0x9bc>
case omM1fw1:
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8001f8e: 4b71 ldr r3, [pc, #452] @ (8002154 <manageCiclo+0x284>)
8001f90: 881b ldrh r3, [r3, #0]
8001f92: b2da uxtb r2, r3
8001f94: 4b70 ldr r3, [pc, #448] @ (8002158 <manageCiclo+0x288>)
8001f96: 881b ldrh r3, [r3, #0]
8001f98: b2d9 uxtb r1, r3
8001f9a: 4b70 ldr r3, [pc, #448] @ (800215c <manageCiclo+0x28c>)
8001f9c: 881b ldrh r3, [r3, #0]
8001f9e: b2db uxtb r3, r3
8001fa0: 200a movs r0, #10
8001fa2: 9001 str r0, [sp, #4]
8001fa4: 9300 str r3, [sp, #0]
8001fa6: 460b mov r3, r1
8001fa8: 2100 movs r1, #0
8001faa: 2001 movs r0, #1
8001fac: f002 fa1c bl 80043e8 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8001fb0: 4b67 ldr r3, [pc, #412] @ (8002150 <manageCiclo+0x280>)
8001fb2: 881b ldrh r3, [r3, #0]
8001fb4: b29a uxth r2, r3
8001fb6: 4b6a ldr r3, [pc, #424] @ (8002160 <manageCiclo+0x290>)
8001fb8: 881b ldrh r3, [r3, #0]
8001fba: 429a cmp r2, r3
8001fbc: d302 bcc.n 8001fc4 <manageCiclo+0xf4>
8001fbe: 4b61 ldr r3, [pc, #388] @ (8002144 <manageCiclo+0x274>)
8001fc0: 2211 movs r2, #17
8001fc2: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM1fw2;
8001fc4: 4b67 ldr r3, [pc, #412] @ (8002164 <manageCiclo+0x294>)
8001fc6: 781b ldrb r3, [r3, #0]
8001fc8: 2b00 cmp r3, #0
8001fca: f040 8461 bne.w 8002890 <manageCiclo+0x9c0>
8001fce: 4b5d ldr r3, [pc, #372] @ (8002144 <manageCiclo+0x274>)
8001fd0: 2202 movs r2, #2
8001fd2: 701a strb r2, [r3, #0]
break;
8001fd4: f000 bc5c b.w 8002890 <manageCiclo+0x9c0>
case omM1fw2:
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8001fd8: 4b5e ldr r3, [pc, #376] @ (8002154 <manageCiclo+0x284>)
8001fda: 881b ldrh r3, [r3, #0]
8001fdc: b2da uxtb r2, r3
8001fde: 4b5e ldr r3, [pc, #376] @ (8002158 <manageCiclo+0x288>)
8001fe0: 881b ldrh r3, [r3, #0]
8001fe2: b2d9 uxtb r1, r3
8001fe4: 4b5d ldr r3, [pc, #372] @ (800215c <manageCiclo+0x28c>)
8001fe6: 881b ldrh r3, [r3, #0]
8001fe8: b2db uxtb r3, r3
8001fea: 200a movs r0, #10
8001fec: 9001 str r0, [sp, #4]
8001fee: 9300 str r3, [sp, #0]
8001ff0: 460b mov r3, r1
8001ff2: 2100 movs r1, #0
8001ff4: 2001 movs r0, #1
8001ff6: f002 f9f7 bl 80043e8 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8001ffa: 4b55 ldr r3, [pc, #340] @ (8002150 <manageCiclo+0x280>)
8001ffc: 881b ldrh r3, [r3, #0]
8001ffe: b29a uxth r2, r3
8002000: 4b57 ldr r3, [pc, #348] @ (8002160 <manageCiclo+0x290>)
8002002: 881b ldrh r3, [r3, #0]
8002004: 429a cmp r2, r3
8002006: d302 bcc.n 800200e <manageCiclo+0x13e>
8002008: 4b4e ldr r3, [pc, #312] @ (8002144 <manageCiclo+0x274>)
800200a: 2211 movs r2, #17
800200c: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800200e: 4b55 ldr r3, [pc, #340] @ (8002164 <manageCiclo+0x294>)
8002010: 781b ldrb r3, [r3, #0]
8002012: 2b00 cmp r3, #0
8002014: f000 843e beq.w 8002894 <manageCiclo+0x9c4>
8002018: 4b4a ldr r3, [pc, #296] @ (8002144 <manageCiclo+0x274>)
800201a: 2211 movs r2, #17
800201c: 701a strb r2, [r3, #0]
break;
800201e: f000 bc39 b.w 8002894 <manageCiclo+0x9c4>
case omM1bw1:
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8002022: 4b4c ldr r3, [pc, #304] @ (8002154 <manageCiclo+0x284>)
8002024: 881b ldrh r3, [r3, #0]
8002026: b2da uxtb r2, r3
8002028: 4b4b ldr r3, [pc, #300] @ (8002158 <manageCiclo+0x288>)
800202a: 881b ldrh r3, [r3, #0]
800202c: b2d9 uxtb r1, r3
800202e: 4b4b ldr r3, [pc, #300] @ (800215c <manageCiclo+0x28c>)
8002030: 881b ldrh r3, [r3, #0]
8002032: b2db uxtb r3, r3
8002034: 200a movs r0, #10
8002036: 9001 str r0, [sp, #4]
8002038: 9300 str r3, [sp, #0]
800203a: 460b mov r3, r1
800203c: 2101 movs r1, #1
800203e: 2001 movs r0, #1
8002040: f002 f9d2 bl 80043e8 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8002044: 4b42 ldr r3, [pc, #264] @ (8002150 <manageCiclo+0x280>)
8002046: 881b ldrh r3, [r3, #0]
8002048: b29a uxth r2, r3
800204a: 4b45 ldr r3, [pc, #276] @ (8002160 <manageCiclo+0x290>)
800204c: 881b ldrh r3, [r3, #0]
800204e: 429a cmp r2, r3
8002050: d302 bcc.n 8002058 <manageCiclo+0x188>
8002052: 4b3c ldr r3, [pc, #240] @ (8002144 <manageCiclo+0x274>)
8002054: 2211 movs r2, #17
8002056: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM1bw2;
8002058: 4b42 ldr r3, [pc, #264] @ (8002164 <manageCiclo+0x294>)
800205a: 781b ldrb r3, [r3, #0]
800205c: 2b00 cmp r3, #0
800205e: f040 841b bne.w 8002898 <manageCiclo+0x9c8>
8002062: 4b38 ldr r3, [pc, #224] @ (8002144 <manageCiclo+0x274>)
8002064: 2204 movs r2, #4
8002066: 701a strb r2, [r3, #0]
break;
8002068: f000 bc16 b.w 8002898 <manageCiclo+0x9c8>
case omM1bw2:
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
800206c: 4b39 ldr r3, [pc, #228] @ (8002154 <manageCiclo+0x284>)
800206e: 881b ldrh r3, [r3, #0]
8002070: b2da uxtb r2, r3
8002072: 4b39 ldr r3, [pc, #228] @ (8002158 <manageCiclo+0x288>)
8002074: 881b ldrh r3, [r3, #0]
8002076: b2d9 uxtb r1, r3
8002078: 4b38 ldr r3, [pc, #224] @ (800215c <manageCiclo+0x28c>)
800207a: 881b ldrh r3, [r3, #0]
800207c: b2db uxtb r3, r3
800207e: 200a movs r0, #10
8002080: 9001 str r0, [sp, #4]
8002082: 9300 str r3, [sp, #0]
8002084: 460b mov r3, r1
8002086: 2101 movs r1, #1
8002088: 2001 movs r0, #1
800208a: f002 f9ad bl 80043e8 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
800208e: 4b30 ldr r3, [pc, #192] @ (8002150 <manageCiclo+0x280>)
8002090: 881b ldrh r3, [r3, #0]
8002092: b29a uxth r2, r3
8002094: 4b32 ldr r3, [pc, #200] @ (8002160 <manageCiclo+0x290>)
8002096: 881b ldrh r3, [r3, #0]
8002098: 429a cmp r2, r3
800209a: d302 bcc.n 80020a2 <manageCiclo+0x1d2>
800209c: 4b29 ldr r3, [pc, #164] @ (8002144 <manageCiclo+0x274>)
800209e: 2211 movs r2, #17
80020a0: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80020a2: 4b30 ldr r3, [pc, #192] @ (8002164 <manageCiclo+0x294>)
80020a4: 781b ldrb r3, [r3, #0]
80020a6: 2b00 cmp r3, #0
80020a8: f000 83f8 beq.w 800289c <manageCiclo+0x9cc>
80020ac: 4b25 ldr r3, [pc, #148] @ (8002144 <manageCiclo+0x274>)
80020ae: 2211 movs r2, #17
80020b0: 701a strb r2, [r3, #0]
break;
80020b2: e3f3 b.n 800289c <manageCiclo+0x9cc>
case omM2fw1:
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
80020b4: 4b27 ldr r3, [pc, #156] @ (8002154 <manageCiclo+0x284>)
80020b6: 885b ldrh r3, [r3, #2]
80020b8: b2da uxtb r2, r3
80020ba: 4b2b ldr r3, [pc, #172] @ (8002168 <manageCiclo+0x298>)
80020bc: 881b ldrh r3, [r3, #0]
80020be: b2d9 uxtb r1, r3
80020c0: 4b26 ldr r3, [pc, #152] @ (800215c <manageCiclo+0x28c>)
80020c2: 881b ldrh r3, [r3, #0]
80020c4: b2db uxtb r3, r3
80020c6: 200a movs r0, #10
80020c8: 9001 str r0, [sp, #4]
80020ca: 9300 str r3, [sp, #0]
80020cc: 460b mov r3, r1
80020ce: 2100 movs r1, #0
80020d0: 2002 movs r0, #2
80020d2: f002 f989 bl 80043e8 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
80020d6: 4b1e ldr r3, [pc, #120] @ (8002150 <manageCiclo+0x280>)
80020d8: 881b ldrh r3, [r3, #0]
80020da: b29a uxth r2, r3
80020dc: 4b23 ldr r3, [pc, #140] @ (800216c <manageCiclo+0x29c>)
80020de: 881b ldrh r3, [r3, #0]
80020e0: 429a cmp r2, r3
80020e2: d302 bcc.n 80020ea <manageCiclo+0x21a>
80020e4: 4b17 ldr r3, [pc, #92] @ (8002144 <manageCiclo+0x274>)
80020e6: 2211 movs r2, #17
80020e8: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM2fw2;
80020ea: 4b1e ldr r3, [pc, #120] @ (8002164 <manageCiclo+0x294>)
80020ec: 781b ldrb r3, [r3, #0]
80020ee: 2b00 cmp r3, #0
80020f0: f040 83d6 bne.w 80028a0 <manageCiclo+0x9d0>
80020f4: 4b13 ldr r3, [pc, #76] @ (8002144 <manageCiclo+0x274>)
80020f6: 2206 movs r2, #6
80020f8: 701a strb r2, [r3, #0]
break;
80020fa: e3d1 b.n 80028a0 <manageCiclo+0x9d0>
case omM2fw2:
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
80020fc: 4b15 ldr r3, [pc, #84] @ (8002154 <manageCiclo+0x284>)
80020fe: 885b ldrh r3, [r3, #2]
8002100: b2da uxtb r2, r3
8002102: 4b19 ldr r3, [pc, #100] @ (8002168 <manageCiclo+0x298>)
8002104: 881b ldrh r3, [r3, #0]
8002106: b2d9 uxtb r1, r3
8002108: 4b14 ldr r3, [pc, #80] @ (800215c <manageCiclo+0x28c>)
800210a: 881b ldrh r3, [r3, #0]
800210c: b2db uxtb r3, r3
800210e: 200a movs r0, #10
8002110: 9001 str r0, [sp, #4]
8002112: 9300 str r3, [sp, #0]
8002114: 460b mov r3, r1
8002116: 2100 movs r1, #0
8002118: 2002 movs r0, #2
800211a: f002 f965 bl 80043e8 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
800211e: 4b0c ldr r3, [pc, #48] @ (8002150 <manageCiclo+0x280>)
8002120: 881b ldrh r3, [r3, #0]
8002122: b29a uxth r2, r3
8002124: 4b11 ldr r3, [pc, #68] @ (800216c <manageCiclo+0x29c>)
8002126: 881b ldrh r3, [r3, #0]
8002128: 429a cmp r2, r3
800212a: d302 bcc.n 8002132 <manageCiclo+0x262>
800212c: 4b05 ldr r3, [pc, #20] @ (8002144 <manageCiclo+0x274>)
800212e: 2211 movs r2, #17
8002130: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8002132: 4b0c ldr r3, [pc, #48] @ (8002164 <manageCiclo+0x294>)
8002134: 781b ldrb r3, [r3, #0]
8002136: 2b00 cmp r3, #0
8002138: f000 83b4 beq.w 80028a4 <manageCiclo+0x9d4>
800213c: 4b01 ldr r3, [pc, #4] @ (8002144 <manageCiclo+0x274>)
800213e: 2211 movs r2, #17
8002140: 701a strb r2, [r3, #0]
break;
8002142: e3af b.n 80028a4 <manageCiclo+0x9d4>
8002144: 2000044e .word 0x2000044e
8002148: 2000044c .word 0x2000044c
800214c: 2000044f .word 0x2000044f
8002150: 200003fc .word 0x200003fc
8002154: 20000444 .word 0x20000444
8002158: 2000041c .word 0x2000041c
800215c: 2000041a .word 0x2000041a
8002160: 2000040e .word 0x2000040e
8002164: 200003f0 .word 0x200003f0
8002168: 2000041e .word 0x2000041e
800216c: 20000410 .word 0x20000410
case omM2bw1:
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
8002170: 4b8f ldr r3, [pc, #572] @ (80023b0 <manageCiclo+0x4e0>)
8002172: 885b ldrh r3, [r3, #2]
8002174: b2da uxtb r2, r3
8002176: 4b8f ldr r3, [pc, #572] @ (80023b4 <manageCiclo+0x4e4>)
8002178: 881b ldrh r3, [r3, #0]
800217a: b2d9 uxtb r1, r3
800217c: 4b8e ldr r3, [pc, #568] @ (80023b8 <manageCiclo+0x4e8>)
800217e: 881b ldrh r3, [r3, #0]
8002180: b2db uxtb r3, r3
8002182: 200a movs r0, #10
8002184: 9001 str r0, [sp, #4]
8002186: 9300 str r3, [sp, #0]
8002188: 460b mov r3, r1
800218a: 2101 movs r1, #1
800218c: 2002 movs r0, #2
800218e: f002 f92b bl 80043e8 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
8002192: 4b8a ldr r3, [pc, #552] @ (80023bc <manageCiclo+0x4ec>)
8002194: 881b ldrh r3, [r3, #0]
8002196: b29a uxth r2, r3
8002198: 4b89 ldr r3, [pc, #548] @ (80023c0 <manageCiclo+0x4f0>)
800219a: 881b ldrh r3, [r3, #0]
800219c: 429a cmp r2, r3
800219e: d302 bcc.n 80021a6 <manageCiclo+0x2d6>
80021a0: 4b88 ldr r3, [pc, #544] @ (80023c4 <manageCiclo+0x4f4>)
80021a2: 2211 movs r2, #17
80021a4: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM2bw2;
80021a6: 4b88 ldr r3, [pc, #544] @ (80023c8 <manageCiclo+0x4f8>)
80021a8: 781b ldrb r3, [r3, #0]
80021aa: 2b00 cmp r3, #0
80021ac: f040 837c bne.w 80028a8 <manageCiclo+0x9d8>
80021b0: 4b84 ldr r3, [pc, #528] @ (80023c4 <manageCiclo+0x4f4>)
80021b2: 2208 movs r2, #8
80021b4: 701a strb r2, [r3, #0]
break;
80021b6: e377 b.n 80028a8 <manageCiclo+0x9d8>
case omM2bw2:
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
80021b8: 4b7d ldr r3, [pc, #500] @ (80023b0 <manageCiclo+0x4e0>)
80021ba: 885b ldrh r3, [r3, #2]
80021bc: b2da uxtb r2, r3
80021be: 4b7d ldr r3, [pc, #500] @ (80023b4 <manageCiclo+0x4e4>)
80021c0: 881b ldrh r3, [r3, #0]
80021c2: b2d9 uxtb r1, r3
80021c4: 4b7c ldr r3, [pc, #496] @ (80023b8 <manageCiclo+0x4e8>)
80021c6: 881b ldrh r3, [r3, #0]
80021c8: b2db uxtb r3, r3
80021ca: 200a movs r0, #10
80021cc: 9001 str r0, [sp, #4]
80021ce: 9300 str r3, [sp, #0]
80021d0: 460b mov r3, r1
80021d2: 2101 movs r1, #1
80021d4: 2002 movs r0, #2
80021d6: f002 f907 bl 80043e8 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
80021da: 4b78 ldr r3, [pc, #480] @ (80023bc <manageCiclo+0x4ec>)
80021dc: 881b ldrh r3, [r3, #0]
80021de: b29a uxth r2, r3
80021e0: 4b77 ldr r3, [pc, #476] @ (80023c0 <manageCiclo+0x4f0>)
80021e2: 881b ldrh r3, [r3, #0]
80021e4: 429a cmp r2, r3
80021e6: d302 bcc.n 80021ee <manageCiclo+0x31e>
80021e8: 4b76 ldr r3, [pc, #472] @ (80023c4 <manageCiclo+0x4f4>)
80021ea: 2211 movs r2, #17
80021ec: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80021ee: 4b76 ldr r3, [pc, #472] @ (80023c8 <manageCiclo+0x4f8>)
80021f0: 781b ldrb r3, [r3, #0]
80021f2: 2b00 cmp r3, #0
80021f4: f000 835a beq.w 80028ac <manageCiclo+0x9dc>
80021f8: 4b72 ldr r3, [pc, #456] @ (80023c4 <manageCiclo+0x4f4>)
80021fa: 2211 movs r2, #17
80021fc: 701a strb r2, [r3, #0]
break;
80021fe: e355 b.n 80028ac <manageCiclo+0x9dc>
case omM3fw1:
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
8002200: 4b6b ldr r3, [pc, #428] @ (80023b0 <manageCiclo+0x4e0>)
8002202: 889b ldrh r3, [r3, #4]
8002204: b2da uxtb r2, r3
8002206: 4b71 ldr r3, [pc, #452] @ (80023cc <manageCiclo+0x4fc>)
8002208: 881b ldrh r3, [r3, #0]
800220a: b2d9 uxtb r1, r3
800220c: 4b6a ldr r3, [pc, #424] @ (80023b8 <manageCiclo+0x4e8>)
800220e: 881b ldrh r3, [r3, #0]
8002210: b2db uxtb r3, r3
8002212: 200a movs r0, #10
8002214: 9001 str r0, [sp, #4]
8002216: 9300 str r3, [sp, #0]
8002218: 460b mov r3, r1
800221a: 2100 movs r1, #0
800221c: 2003 movs r0, #3
800221e: f002 f8e3 bl 80043e8 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
8002222: 4b66 ldr r3, [pc, #408] @ (80023bc <manageCiclo+0x4ec>)
8002224: 881b ldrh r3, [r3, #0]
8002226: b29a uxth r2, r3
8002228: 4b69 ldr r3, [pc, #420] @ (80023d0 <manageCiclo+0x500>)
800222a: 881b ldrh r3, [r3, #0]
800222c: 429a cmp r2, r3
800222e: d302 bcc.n 8002236 <manageCiclo+0x366>
8002230: 4b64 ldr r3, [pc, #400] @ (80023c4 <manageCiclo+0x4f4>)
8002232: 2211 movs r2, #17
8002234: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM3fw2;
8002236: 4b64 ldr r3, [pc, #400] @ (80023c8 <manageCiclo+0x4f8>)
8002238: 781b ldrb r3, [r3, #0]
800223a: 2b00 cmp r3, #0
800223c: f040 8338 bne.w 80028b0 <manageCiclo+0x9e0>
8002240: 4b60 ldr r3, [pc, #384] @ (80023c4 <manageCiclo+0x4f4>)
8002242: 220a movs r2, #10
8002244: 701a strb r2, [r3, #0]
break;
8002246: e333 b.n 80028b0 <manageCiclo+0x9e0>
case omM3fw2:
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
8002248: 4b59 ldr r3, [pc, #356] @ (80023b0 <manageCiclo+0x4e0>)
800224a: 889b ldrh r3, [r3, #4]
800224c: b2da uxtb r2, r3
800224e: 4b5f ldr r3, [pc, #380] @ (80023cc <manageCiclo+0x4fc>)
8002250: 881b ldrh r3, [r3, #0]
8002252: b2d9 uxtb r1, r3
8002254: 4b58 ldr r3, [pc, #352] @ (80023b8 <manageCiclo+0x4e8>)
8002256: 881b ldrh r3, [r3, #0]
8002258: b2db uxtb r3, r3
800225a: 200a movs r0, #10
800225c: 9001 str r0, [sp, #4]
800225e: 9300 str r3, [sp, #0]
8002260: 460b mov r3, r1
8002262: 2100 movs r1, #0
8002264: 2003 movs r0, #3
8002266: f002 f8bf bl 80043e8 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
800226a: 4b54 ldr r3, [pc, #336] @ (80023bc <manageCiclo+0x4ec>)
800226c: 881b ldrh r3, [r3, #0]
800226e: b29a uxth r2, r3
8002270: 4b57 ldr r3, [pc, #348] @ (80023d0 <manageCiclo+0x500>)
8002272: 881b ldrh r3, [r3, #0]
8002274: 429a cmp r2, r3
8002276: d302 bcc.n 800227e <manageCiclo+0x3ae>
8002278: 4b52 ldr r3, [pc, #328] @ (80023c4 <manageCiclo+0x4f4>)
800227a: 2211 movs r2, #17
800227c: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800227e: 4b52 ldr r3, [pc, #328] @ (80023c8 <manageCiclo+0x4f8>)
8002280: 781b ldrb r3, [r3, #0]
8002282: 2b00 cmp r3, #0
8002284: f000 8316 beq.w 80028b4 <manageCiclo+0x9e4>
8002288: 4b4e ldr r3, [pc, #312] @ (80023c4 <manageCiclo+0x4f4>)
800228a: 2211 movs r2, #17
800228c: 701a strb r2, [r3, #0]
break;
800228e: e311 b.n 80028b4 <manageCiclo+0x9e4>
case omM3bw1:
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
8002290: 4b47 ldr r3, [pc, #284] @ (80023b0 <manageCiclo+0x4e0>)
8002292: 889b ldrh r3, [r3, #4]
8002294: b2da uxtb r2, r3
8002296: 4b4d ldr r3, [pc, #308] @ (80023cc <manageCiclo+0x4fc>)
8002298: 881b ldrh r3, [r3, #0]
800229a: b2d9 uxtb r1, r3
800229c: 4b46 ldr r3, [pc, #280] @ (80023b8 <manageCiclo+0x4e8>)
800229e: 881b ldrh r3, [r3, #0]
80022a0: b2db uxtb r3, r3
80022a2: 200a movs r0, #10
80022a4: 9001 str r0, [sp, #4]
80022a6: 9300 str r3, [sp, #0]
80022a8: 460b mov r3, r1
80022aa: 2101 movs r1, #1
80022ac: 2003 movs r0, #3
80022ae: f002 f89b bl 80043e8 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
80022b2: 4b42 ldr r3, [pc, #264] @ (80023bc <manageCiclo+0x4ec>)
80022b4: 881b ldrh r3, [r3, #0]
80022b6: b29a uxth r2, r3
80022b8: 4b45 ldr r3, [pc, #276] @ (80023d0 <manageCiclo+0x500>)
80022ba: 881b ldrh r3, [r3, #0]
80022bc: 429a cmp r2, r3
80022be: d302 bcc.n 80022c6 <manageCiclo+0x3f6>
80022c0: 4b40 ldr r3, [pc, #256] @ (80023c4 <manageCiclo+0x4f4>)
80022c2: 2211 movs r2, #17
80022c4: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM3bw2;
80022c6: 4b40 ldr r3, [pc, #256] @ (80023c8 <manageCiclo+0x4f8>)
80022c8: 781b ldrb r3, [r3, #0]
80022ca: 2b00 cmp r3, #0
80022cc: f040 82f4 bne.w 80028b8 <manageCiclo+0x9e8>
80022d0: 4b3c ldr r3, [pc, #240] @ (80023c4 <manageCiclo+0x4f4>)
80022d2: 220c movs r2, #12
80022d4: 701a strb r2, [r3, #0]
break;
80022d6: e2ef b.n 80028b8 <manageCiclo+0x9e8>
case omM3bw2:
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
80022d8: 4b35 ldr r3, [pc, #212] @ (80023b0 <manageCiclo+0x4e0>)
80022da: 889b ldrh r3, [r3, #4]
80022dc: b2da uxtb r2, r3
80022de: 4b3b ldr r3, [pc, #236] @ (80023cc <manageCiclo+0x4fc>)
80022e0: 881b ldrh r3, [r3, #0]
80022e2: b2d9 uxtb r1, r3
80022e4: 4b34 ldr r3, [pc, #208] @ (80023b8 <manageCiclo+0x4e8>)
80022e6: 881b ldrh r3, [r3, #0]
80022e8: b2db uxtb r3, r3
80022ea: 200a movs r0, #10
80022ec: 9001 str r0, [sp, #4]
80022ee: 9300 str r3, [sp, #0]
80022f0: 460b mov r3, r1
80022f2: 2101 movs r1, #1
80022f4: 2003 movs r0, #3
80022f6: f002 f877 bl 80043e8 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
80022fa: 4b30 ldr r3, [pc, #192] @ (80023bc <manageCiclo+0x4ec>)
80022fc: 881b ldrh r3, [r3, #0]
80022fe: b29a uxth r2, r3
8002300: 4b33 ldr r3, [pc, #204] @ (80023d0 <manageCiclo+0x500>)
8002302: 881b ldrh r3, [r3, #0]
8002304: 429a cmp r2, r3
8002306: d302 bcc.n 800230e <manageCiclo+0x43e>
8002308: 4b2e ldr r3, [pc, #184] @ (80023c4 <manageCiclo+0x4f4>)
800230a: 2211 movs r2, #17
800230c: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800230e: 4b2e ldr r3, [pc, #184] @ (80023c8 <manageCiclo+0x4f8>)
8002310: 781b ldrb r3, [r3, #0]
8002312: 2b00 cmp r3, #0
8002314: f000 82d2 beq.w 80028bc <manageCiclo+0x9ec>
8002318: 4b2a ldr r3, [pc, #168] @ (80023c4 <manageCiclo+0x4f4>)
800231a: 2211 movs r2, #17
800231c: 701a strb r2, [r3, #0]
break;
800231e: e2cd b.n 80028bc <manageCiclo+0x9ec>
case omM4fw1:
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002320: 4b23 ldr r3, [pc, #140] @ (80023b0 <manageCiclo+0x4e0>)
8002322: 88db ldrh r3, [r3, #6]
8002324: b2da uxtb r2, r3
8002326: 4b2b ldr r3, [pc, #172] @ (80023d4 <manageCiclo+0x504>)
8002328: 881b ldrh r3, [r3, #0]
800232a: b2d9 uxtb r1, r3
800232c: 4b22 ldr r3, [pc, #136] @ (80023b8 <manageCiclo+0x4e8>)
800232e: 881b ldrh r3, [r3, #0]
8002330: b2db uxtb r3, r3
8002332: 200a movs r0, #10
8002334: 9001 str r0, [sp, #4]
8002336: 9300 str r3, [sp, #0]
8002338: 460b mov r3, r1
800233a: 2100 movs r1, #0
800233c: 2004 movs r0, #4
800233e: f002 f853 bl 80043e8 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
8002342: 4b1e ldr r3, [pc, #120] @ (80023bc <manageCiclo+0x4ec>)
8002344: 881b ldrh r3, [r3, #0]
8002346: b29a uxth r2, r3
8002348: 4b23 ldr r3, [pc, #140] @ (80023d8 <manageCiclo+0x508>)
800234a: 881b ldrh r3, [r3, #0]
800234c: 429a cmp r2, r3
800234e: d302 bcc.n 8002356 <manageCiclo+0x486>
8002350: 4b1c ldr r3, [pc, #112] @ (80023c4 <manageCiclo+0x4f4>)
8002352: 2211 movs r2, #17
8002354: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM4fw2;
8002356: 4b1c ldr r3, [pc, #112] @ (80023c8 <manageCiclo+0x4f8>)
8002358: 781b ldrb r3, [r3, #0]
800235a: 2b00 cmp r3, #0
800235c: f040 82b0 bne.w 80028c0 <manageCiclo+0x9f0>
8002360: 4b18 ldr r3, [pc, #96] @ (80023c4 <manageCiclo+0x4f4>)
8002362: 220e movs r2, #14
8002364: 701a strb r2, [r3, #0]
break;
8002366: e2ab b.n 80028c0 <manageCiclo+0x9f0>
case omM4fw2:
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002368: 4b11 ldr r3, [pc, #68] @ (80023b0 <manageCiclo+0x4e0>)
800236a: 88db ldrh r3, [r3, #6]
800236c: b2da uxtb r2, r3
800236e: 4b19 ldr r3, [pc, #100] @ (80023d4 <manageCiclo+0x504>)
8002370: 881b ldrh r3, [r3, #0]
8002372: b2d9 uxtb r1, r3
8002374: 4b10 ldr r3, [pc, #64] @ (80023b8 <manageCiclo+0x4e8>)
8002376: 881b ldrh r3, [r3, #0]
8002378: b2db uxtb r3, r3
800237a: 200a movs r0, #10
800237c: 9001 str r0, [sp, #4]
800237e: 9300 str r3, [sp, #0]
8002380: 460b mov r3, r1
8002382: 2100 movs r1, #0
8002384: 2004 movs r0, #4
8002386: f002 f82f bl 80043e8 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
800238a: 4b0c ldr r3, [pc, #48] @ (80023bc <manageCiclo+0x4ec>)
800238c: 881b ldrh r3, [r3, #0]
800238e: b29a uxth r2, r3
8002390: 4b11 ldr r3, [pc, #68] @ (80023d8 <manageCiclo+0x508>)
8002392: 881b ldrh r3, [r3, #0]
8002394: 429a cmp r2, r3
8002396: d302 bcc.n 800239e <manageCiclo+0x4ce>
8002398: 4b0a ldr r3, [pc, #40] @ (80023c4 <manageCiclo+0x4f4>)
800239a: 2211 movs r2, #17
800239c: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800239e: 4b0a ldr r3, [pc, #40] @ (80023c8 <manageCiclo+0x4f8>)
80023a0: 781b ldrb r3, [r3, #0]
80023a2: 2b00 cmp r3, #0
80023a4: f000 828e beq.w 80028c4 <manageCiclo+0x9f4>
80023a8: 4b06 ldr r3, [pc, #24] @ (80023c4 <manageCiclo+0x4f4>)
80023aa: 2211 movs r2, #17
80023ac: 701a strb r2, [r3, #0]
break;
80023ae: e289 b.n 80028c4 <manageCiclo+0x9f4>
80023b0: 20000444 .word 0x20000444
80023b4: 2000041e .word 0x2000041e
80023b8: 2000041a .word 0x2000041a
80023bc: 200003fc .word 0x200003fc
80023c0: 20000410 .word 0x20000410
80023c4: 2000044e .word 0x2000044e
80023c8: 200003f0 .word 0x200003f0
80023cc: 20000420 .word 0x20000420
80023d0: 20000412 .word 0x20000412
80023d4: 20000422 .word 0x20000422
80023d8: 20000414 .word 0x20000414
case omM4bw1:
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
80023dc: 4ba9 ldr r3, [pc, #676] @ (8002684 <manageCiclo+0x7b4>)
80023de: 88db ldrh r3, [r3, #6]
80023e0: b2da uxtb r2, r3
80023e2: 4ba9 ldr r3, [pc, #676] @ (8002688 <manageCiclo+0x7b8>)
80023e4: 881b ldrh r3, [r3, #0]
80023e6: b2d9 uxtb r1, r3
80023e8: 4ba8 ldr r3, [pc, #672] @ (800268c <manageCiclo+0x7bc>)
80023ea: 881b ldrh r3, [r3, #0]
80023ec: b2db uxtb r3, r3
80023ee: 200a movs r0, #10
80023f0: 9001 str r0, [sp, #4]
80023f2: 9300 str r3, [sp, #0]
80023f4: 460b mov r3, r1
80023f6: 2101 movs r1, #1
80023f8: 2004 movs r0, #4
80023fa: f001 fff5 bl 80043e8 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
80023fe: 4ba4 ldr r3, [pc, #656] @ (8002690 <manageCiclo+0x7c0>)
8002400: 881b ldrh r3, [r3, #0]
8002402: b29a uxth r2, r3
8002404: 4ba3 ldr r3, [pc, #652] @ (8002694 <manageCiclo+0x7c4>)
8002406: 881b ldrh r3, [r3, #0]
8002408: 429a cmp r2, r3
800240a: d302 bcc.n 8002412 <manageCiclo+0x542>
800240c: 4ba2 ldr r3, [pc, #648] @ (8002698 <manageCiclo+0x7c8>)
800240e: 2211 movs r2, #17
8002410: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM4bw2;
8002412: 4ba2 ldr r3, [pc, #648] @ (800269c <manageCiclo+0x7cc>)
8002414: 781b ldrb r3, [r3, #0]
8002416: 2b00 cmp r3, #0
8002418: f040 8256 bne.w 80028c8 <manageCiclo+0x9f8>
800241c: 4b9e ldr r3, [pc, #632] @ (8002698 <manageCiclo+0x7c8>)
800241e: 2210 movs r2, #16
8002420: 701a strb r2, [r3, #0]
break;
8002422: e251 b.n 80028c8 <manageCiclo+0x9f8>
case omM4bw2:
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002424: 4b97 ldr r3, [pc, #604] @ (8002684 <manageCiclo+0x7b4>)
8002426: 88db ldrh r3, [r3, #6]
8002428: b2da uxtb r2, r3
800242a: 4b97 ldr r3, [pc, #604] @ (8002688 <manageCiclo+0x7b8>)
800242c: 881b ldrh r3, [r3, #0]
800242e: b2d9 uxtb r1, r3
8002430: 4b96 ldr r3, [pc, #600] @ (800268c <manageCiclo+0x7bc>)
8002432: 881b ldrh r3, [r3, #0]
8002434: b2db uxtb r3, r3
8002436: 200a movs r0, #10
8002438: 9001 str r0, [sp, #4]
800243a: 9300 str r3, [sp, #0]
800243c: 460b mov r3, r1
800243e: 2101 movs r1, #1
8002440: 2004 movs r0, #4
8002442: f001 ffd1 bl 80043e8 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
8002446: 4b92 ldr r3, [pc, #584] @ (8002690 <manageCiclo+0x7c0>)
8002448: 881b ldrh r3, [r3, #0]
800244a: b29a uxth r2, r3
800244c: 4b91 ldr r3, [pc, #580] @ (8002694 <manageCiclo+0x7c4>)
800244e: 881b ldrh r3, [r3, #0]
8002450: 429a cmp r2, r3
8002452: d302 bcc.n 800245a <manageCiclo+0x58a>
8002454: 4b90 ldr r3, [pc, #576] @ (8002698 <manageCiclo+0x7c8>)
8002456: 2211 movs r2, #17
8002458: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800245a: 4b90 ldr r3, [pc, #576] @ (800269c <manageCiclo+0x7cc>)
800245c: 781b ldrb r3, [r3, #0]
800245e: 2b00 cmp r3, #0
8002460: f000 8234 beq.w 80028cc <manageCiclo+0x9fc>
8002464: 4b8c ldr r3, [pc, #560] @ (8002698 <manageCiclo+0x7c8>)
8002466: 2211 movs r2, #17
8002468: 701a strb r2, [r3, #0]
break;
800246a: e22f b.n 80028cc <manageCiclo+0x9fc>
case omStopMan:
SetMotPerc(M1,FW,0);
800246c: 2200 movs r2, #0
800246e: 2100 movs r1, #0
8002470: 2001 movs r0, #1
8002472: f001 fe39 bl 80040e8 <SetMotPerc>
SetMotPerc(M2,FW,0);
8002476: 2200 movs r2, #0
8002478: 2100 movs r1, #0
800247a: 2002 movs r0, #2
800247c: f001 fe34 bl 80040e8 <SetMotPerc>
SetMotPerc(M3,FW,0);
8002480: 2200 movs r2, #0
8002482: 2100 movs r1, #0
8002484: 2003 movs r0, #3
8002486: f001 fe2f bl 80040e8 <SetMotPerc>
SetMotPerc(M4,FW,0);
800248a: 2200 movs r2, #0
800248c: 2100 movs r1, #0
800248e: 2004 movs r0, #4
8002490: f001 fe2a bl 80040e8 <SetMotPerc>
SetMotPerc(M1,BW,0);
8002494: 2200 movs r2, #0
8002496: 2101 movs r1, #1
8002498: 2001 movs r0, #1
800249a: f001 fe25 bl 80040e8 <SetMotPerc>
SetMotPerc(M2,BW,0);
800249e: 2200 movs r2, #0
80024a0: 2101 movs r1, #1
80024a2: 2002 movs r0, #2
80024a4: f001 fe20 bl 80040e8 <SetMotPerc>
SetMotPerc(M3,BW,0);
80024a8: 2200 movs r2, #0
80024aa: 2101 movs r1, #1
80024ac: 2003 movs r0, #3
80024ae: f001 fe1b bl 80040e8 <SetMotPerc>
SetMotPerc(M4,BW,0);
80024b2: 2200 movs r2, #0
80024b4: 2101 movs r1, #1
80024b6: 2004 movs r0, #4
80024b8: f001 fe16 bl 80040e8 <SetMotPerc>
if(pulsanti==0){
80024bc: 4b77 ldr r3, [pc, #476] @ (800269c <manageCiclo+0x7cc>)
80024be: 781b ldrb r3, [r3, #0]
80024c0: 2b00 cmp r3, #0
80024c2: f040 8205 bne.w 80028d0 <manageCiclo+0xa00>
stBuz=bzoff;
80024c6: 4b76 ldr r3, [pc, #472] @ (80026a0 <manageCiclo+0x7d0>)
80024c8: 2200 movs r2, #0
80024ca: 701a strb r2, [r3, #0]
stCiclo=omaperto;
80024cc: 4b72 ldr r3, [pc, #456] @ (8002698 <manageCiclo+0x7c8>)
80024ce: 2214 movs r2, #20
80024d0: 701a strb r2, [r3, #0]
}
break;
80024d2: e1fd b.n 80028d0 <manageCiclo+0xa00>
case omapertura0:
if(rtCiclo>=30){//doppo 3 secondi
80024d4: 4b6e ldr r3, [pc, #440] @ (8002690 <manageCiclo+0x7c0>)
80024d6: 881b ldrh r3, [r3, #0]
80024d8: b29b uxth r3, r3
80024da: 2b1d cmp r3, #29
80024dc: d924 bls.n 8002528 <manageCiclo+0x658>
stBuz=bzmoving;
80024de: 4b70 ldr r3, [pc, #448] @ (80026a0 <manageCiclo+0x7d0>)
80024e0: 2201 movs r2, #1
80024e2: 701a strb r2, [r3, #0]
m1=m1ap();m2=m2ap();m3=m3ap();m4=m4ap();
80024e4: f000 fd80 bl 8002fe8 <m1ap>
80024e8: 4603 mov r3, r0
80024ea: 71fb strb r3, [r7, #7]
80024ec: f000 fe4e bl 800318c <m2ap>
80024f0: 4603 mov r3, r0
80024f2: 71bb strb r3, [r7, #6]
80024f4: f000 ff1c bl 8003330 <m3ap>
80024f8: 4603 mov r3, r0
80024fa: 717b strb r3, [r7, #5]
80024fc: f000 ffec bl 80034d8 <m4ap>
8002500: 4603 mov r3, r0
8002502: 713b strb r3, [r7, #4]
if((m1==motStop)&&(m2==motStop)&&(m3==motStop)&&(m4==motStop)){
8002504: 79fb ldrb r3, [r7, #7]
8002506: 2b04 cmp r3, #4
8002508: d10e bne.n 8002528 <manageCiclo+0x658>
800250a: 79bb ldrb r3, [r7, #6]
800250c: 2b04 cmp r3, #4
800250e: d10b bne.n 8002528 <manageCiclo+0x658>
8002510: 797b ldrb r3, [r7, #5]
8002512: 2b04 cmp r3, #4
8002514: d108 bne.n 8002528 <manageCiclo+0x658>
8002516: 793b ldrb r3, [r7, #4]
8002518: 2b04 cmp r3, #4
800251a: d105 bne.n 8002528 <manageCiclo+0x658>
stBuz=bzoff;
800251c: 4b60 ldr r3, [pc, #384] @ (80026a0 <manageCiclo+0x7d0>)
800251e: 2200 movs r2, #0
8002520: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8002522: 4b5d ldr r3, [pc, #372] @ (8002698 <manageCiclo+0x7c8>)
8002524: 2214 movs r2, #20
8002526: 701a strb r2, [r3, #0]
}
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8002528: 4b5e ldr r3, [pc, #376] @ (80026a4 <manageCiclo+0x7d4>)
800252a: 881b ldrh r3, [r3, #0]
800252c: f003 0302 and.w r3, r3, #2
8002530: 2b00 cmp r3, #0
8002532: f000 81cf beq.w 80028d4 <manageCiclo+0xa04>
8002536: 4b58 ldr r3, [pc, #352] @ (8002698 <manageCiclo+0x7c8>)
8002538: 2213 movs r2, #19
800253a: 701a strb r2, [r3, #0]
break;
800253c: e1ca b.n 80028d4 <manageCiclo+0xa04>
case omstopapertura:
SetMotPerc(M1,FW,0);
800253e: 2200 movs r2, #0
8002540: 2100 movs r1, #0
8002542: 2001 movs r0, #1
8002544: f001 fdd0 bl 80040e8 <SetMotPerc>
SetMotPerc(M2,FW,0);
8002548: 2200 movs r2, #0
800254a: 2100 movs r1, #0
800254c: 2002 movs r0, #2
800254e: f001 fdcb bl 80040e8 <SetMotPerc>
SetMotPerc(M3,FW,0);
8002552: 2200 movs r2, #0
8002554: 2100 movs r1, #0
8002556: 2003 movs r0, #3
8002558: f001 fdc6 bl 80040e8 <SetMotPerc>
SetMotPerc(M4,FW,0);
800255c: 2200 movs r2, #0
800255e: 2100 movs r1, #0
8002560: 2004 movs r0, #4
8002562: f001 fdc1 bl 80040e8 <SetMotPerc>
if(pulsanti==0){
8002566: 4b4d ldr r3, [pc, #308] @ (800269c <manageCiclo+0x7cc>)
8002568: 781b ldrb r3, [r3, #0]
800256a: 2b00 cmp r3, #0
800256c: f040 81b4 bne.w 80028d8 <manageCiclo+0xa08>
stBuz=bzoff;
8002570: 4b4b ldr r3, [pc, #300] @ (80026a0 <manageCiclo+0x7d0>)
8002572: 2200 movs r2, #0
8002574: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
8002576: 4b48 ldr r3, [pc, #288] @ (8002698 <manageCiclo+0x7c8>)
8002578: 2200 movs r2, #0
800257a: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
800257c: 4b49 ldr r3, [pc, #292] @ (80026a4 <manageCiclo+0x7d4>)
800257e: 881b ldrh r3, [r3, #0]
8002580: f023 0302 bic.w r3, r3, #2
8002584: b29a uxth r2, r3
8002586: 4b47 ldr r3, [pc, #284] @ (80026a4 <manageCiclo+0x7d4>)
8002588: 801a strh r2, [r3, #0]
}
break;
800258a: e1a5 b.n 80028d8 <manageCiclo+0xa08>
case omaperto:
rtCiclo=0;
800258c: 4b40 ldr r3, [pc, #256] @ (8002690 <manageCiclo+0x7c0>)
800258e: 2200 movs r2, #0
8002590: 801a strh r2, [r3, #0]
if(stPulsanti&P1START){
8002592: 4b44 ldr r3, [pc, #272] @ (80026a4 <manageCiclo+0x7d4>)
8002594: 881b ldrh r3, [r3, #0]
8002596: f003 0301 and.w r3, r3, #1
800259a: 2b00 cmp r3, #0
800259c: d00d beq.n 80025ba <manageCiclo+0x6ea>
stBuz=bzmoving;
800259e: 4b40 ldr r3, [pc, #256] @ (80026a0 <manageCiclo+0x7d0>)
80025a0: 2201 movs r2, #1
80025a2: 701a strb r2, [r3, #0]
//(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
stCiclo=omchiusura1;
80025a4: 4b3c ldr r3, [pc, #240] @ (8002698 <manageCiclo+0x7c8>)
80025a6: 2215 movs r2, #21
80025a8: 701a strb r2, [r3, #0]
(void)m1ch();(void)m2ch();(void)m3ch();(void)m4ch();
80025aa: f001 f869 bl 8003680 <m1ch>
80025ae: f001 f939 bl 8003824 <m2ch>
80025b2: f001 fa09 bl 80039c8 <m3ch>
80025b6: f001 fadb bl 8003b70 <m4ch>
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
80025ba: 4b3a ldr r3, [pc, #232] @ (80026a4 <manageCiclo+0x7d4>)
80025bc: 881b ldrh r3, [r3, #0]
80025be: f003 0302 and.w r3, r3, #2
80025c2: 2b00 cmp r3, #0
80025c4: d003 beq.n 80025ce <manageCiclo+0x6fe>
80025c6: 4b34 ldr r3, [pc, #208] @ (8002698 <manageCiclo+0x7c8>)
80025c8: 2216 movs r2, #22
80025ca: 701a strb r2, [r3, #0]
}else if(stPulsanti&M4BW){
stBuz=bzmoving;
(void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
stCiclo=omM4bw1;
}
break;
80025cc: e186 b.n 80028dc <manageCiclo+0xa0c>
else if(stPulsanti&M1FW){
80025ce: 4b35 ldr r3, [pc, #212] @ (80026a4 <manageCiclo+0x7d4>)
80025d0: 881b ldrh r3, [r3, #0]
80025d2: f003 0310 and.w r3, r3, #16
80025d6: 2b00 cmp r3, #0
80025d8: d017 beq.n 800260a <manageCiclo+0x73a>
stBuz=bzmoving;
80025da: 4b31 ldr r3, [pc, #196] @ (80026a0 <manageCiclo+0x7d0>)
80025dc: 2201 movs r2, #1
80025de: 701a strb r2, [r3, #0]
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT);
80025e0: 4b28 ldr r3, [pc, #160] @ (8002684 <manageCiclo+0x7b4>)
80025e2: 881b ldrh r3, [r3, #0]
80025e4: b2da uxtb r2, r3
80025e6: 4b30 ldr r3, [pc, #192] @ (80026a8 <manageCiclo+0x7d8>)
80025e8: 881b ldrh r3, [r3, #0]
80025ea: b2d9 uxtb r1, r3
80025ec: 4b27 ldr r3, [pc, #156] @ (800268c <manageCiclo+0x7bc>)
80025ee: 881b ldrh r3, [r3, #0]
80025f0: b2db uxtb r3, r3
80025f2: 2000 movs r0, #0
80025f4: 9001 str r0, [sp, #4]
80025f6: 9300 str r3, [sp, #0]
80025f8: 460b mov r3, r1
80025fa: 2100 movs r1, #0
80025fc: 2001 movs r0, #1
80025fe: f001 fef3 bl 80043e8 <ramp>
stCiclo=omM1fw1;
8002602: 4b25 ldr r3, [pc, #148] @ (8002698 <manageCiclo+0x7c8>)
8002604: 2201 movs r2, #1
8002606: 701a strb r2, [r3, #0]
break;
8002608: e168 b.n 80028dc <manageCiclo+0xa0c>
}else if(stPulsanti&M1BW){
800260a: 4b26 ldr r3, [pc, #152] @ (80026a4 <manageCiclo+0x7d4>)
800260c: 881b ldrh r3, [r3, #0]
800260e: f003 0320 and.w r3, r3, #32
8002612: 2b00 cmp r3, #0
8002614: d017 beq.n 8002646 <manageCiclo+0x776>
stBuz=bzmoving;
8002616: 4b22 ldr r3, [pc, #136] @ (80026a0 <manageCiclo+0x7d0>)
8002618: 2201 movs r2, #1
800261a: 701a strb r2, [r3, #0]
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT);
800261c: 4b19 ldr r3, [pc, #100] @ (8002684 <manageCiclo+0x7b4>)
800261e: 881b ldrh r3, [r3, #0]
8002620: b2da uxtb r2, r3
8002622: 4b21 ldr r3, [pc, #132] @ (80026a8 <manageCiclo+0x7d8>)
8002624: 881b ldrh r3, [r3, #0]
8002626: b2d9 uxtb r1, r3
8002628: 4b18 ldr r3, [pc, #96] @ (800268c <manageCiclo+0x7bc>)
800262a: 881b ldrh r3, [r3, #0]
800262c: b2db uxtb r3, r3
800262e: 2000 movs r0, #0
8002630: 9001 str r0, [sp, #4]
8002632: 9300 str r3, [sp, #0]
8002634: 460b mov r3, r1
8002636: 2101 movs r1, #1
8002638: 2001 movs r0, #1
800263a: f001 fed5 bl 80043e8 <ramp>
stCiclo=omM1bw1;
800263e: 4b16 ldr r3, [pc, #88] @ (8002698 <manageCiclo+0x7c8>)
8002640: 2203 movs r2, #3
8002642: 701a strb r2, [r3, #0]
break;
8002644: e14a b.n 80028dc <manageCiclo+0xa0c>
}else if(stPulsanti&M2FW){
8002646: 4b17 ldr r3, [pc, #92] @ (80026a4 <manageCiclo+0x7d4>)
8002648: 881b ldrh r3, [r3, #0]
800264a: f003 0340 and.w r3, r3, #64 @ 0x40
800264e: 2b00 cmp r3, #0
8002650: d02e beq.n 80026b0 <manageCiclo+0x7e0>
stBuz=bzmoving;
8002652: 4b13 ldr r3, [pc, #76] @ (80026a0 <manageCiclo+0x7d0>)
8002654: 2201 movs r2, #1
8002656: 701a strb r2, [r3, #0]
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT);
8002658: 4b0a ldr r3, [pc, #40] @ (8002684 <manageCiclo+0x7b4>)
800265a: 885b ldrh r3, [r3, #2]
800265c: b2da uxtb r2, r3
800265e: 4b13 ldr r3, [pc, #76] @ (80026ac <manageCiclo+0x7dc>)
8002660: 881b ldrh r3, [r3, #0]
8002662: b2d9 uxtb r1, r3
8002664: 4b09 ldr r3, [pc, #36] @ (800268c <manageCiclo+0x7bc>)
8002666: 881b ldrh r3, [r3, #0]
8002668: b2db uxtb r3, r3
800266a: 2000 movs r0, #0
800266c: 9001 str r0, [sp, #4]
800266e: 9300 str r3, [sp, #0]
8002670: 460b mov r3, r1
8002672: 2100 movs r1, #0
8002674: 2002 movs r0, #2
8002676: f001 feb7 bl 80043e8 <ramp>
stCiclo=omM2fw1;
800267a: 4b07 ldr r3, [pc, #28] @ (8002698 <manageCiclo+0x7c8>)
800267c: 2205 movs r2, #5
800267e: 701a strb r2, [r3, #0]
break;
8002680: e12c b.n 80028dc <manageCiclo+0xa0c>
8002682: bf00 nop
8002684: 20000444 .word 0x20000444
8002688: 20000422 .word 0x20000422
800268c: 2000041a .word 0x2000041a
8002690: 200003fc .word 0x200003fc
8002694: 20000414 .word 0x20000414
8002698: 2000044e .word 0x2000044e
800269c: 200003f0 .word 0x200003f0
80026a0: 2000044f .word 0x2000044f
80026a4: 2000044c .word 0x2000044c
80026a8: 2000041c .word 0x2000041c
80026ac: 2000041e .word 0x2000041e
}else if(stPulsanti&M2BW){
80026b0: 4b8f ldr r3, [pc, #572] @ (80028f0 <manageCiclo+0xa20>)
80026b2: 881b ldrh r3, [r3, #0]
80026b4: f003 0380 and.w r3, r3, #128 @ 0x80
80026b8: 2b00 cmp r3, #0
80026ba: d017 beq.n 80026ec <manageCiclo+0x81c>
stBuz=bzmoving;
80026bc: 4b8d ldr r3, [pc, #564] @ (80028f4 <manageCiclo+0xa24>)
80026be: 2201 movs r2, #1
80026c0: 701a strb r2, [r3, #0]
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT);
80026c2: 4b8d ldr r3, [pc, #564] @ (80028f8 <manageCiclo+0xa28>)
80026c4: 885b ldrh r3, [r3, #2]
80026c6: b2da uxtb r2, r3
80026c8: 4b8c ldr r3, [pc, #560] @ (80028fc <manageCiclo+0xa2c>)
80026ca: 881b ldrh r3, [r3, #0]
80026cc: b2d9 uxtb r1, r3
80026ce: 4b8c ldr r3, [pc, #560] @ (8002900 <manageCiclo+0xa30>)
80026d0: 881b ldrh r3, [r3, #0]
80026d2: b2db uxtb r3, r3
80026d4: 2000 movs r0, #0
80026d6: 9001 str r0, [sp, #4]
80026d8: 9300 str r3, [sp, #0]
80026da: 460b mov r3, r1
80026dc: 2101 movs r1, #1
80026de: 2002 movs r0, #2
80026e0: f001 fe82 bl 80043e8 <ramp>
stCiclo=omM2bw1;
80026e4: 4b87 ldr r3, [pc, #540] @ (8002904 <manageCiclo+0xa34>)
80026e6: 2207 movs r2, #7
80026e8: 701a strb r2, [r3, #0]
break;
80026ea: e0f7 b.n 80028dc <manageCiclo+0xa0c>
}else if(stPulsanti&M3FW){
80026ec: 4b80 ldr r3, [pc, #512] @ (80028f0 <manageCiclo+0xa20>)
80026ee: 881b ldrh r3, [r3, #0]
80026f0: f403 7380 and.w r3, r3, #256 @ 0x100
80026f4: 2b00 cmp r3, #0
80026f6: d017 beq.n 8002728 <manageCiclo+0x858>
stBuz=bzmoving;
80026f8: 4b7e ldr r3, [pc, #504] @ (80028f4 <manageCiclo+0xa24>)
80026fa: 2201 movs r2, #1
80026fc: 701a strb r2, [r3, #0]
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT);
80026fe: 4b7e ldr r3, [pc, #504] @ (80028f8 <manageCiclo+0xa28>)
8002700: 889b ldrh r3, [r3, #4]
8002702: b2da uxtb r2, r3
8002704: 4b80 ldr r3, [pc, #512] @ (8002908 <manageCiclo+0xa38>)
8002706: 881b ldrh r3, [r3, #0]
8002708: b2d9 uxtb r1, r3
800270a: 4b7d ldr r3, [pc, #500] @ (8002900 <manageCiclo+0xa30>)
800270c: 881b ldrh r3, [r3, #0]
800270e: b2db uxtb r3, r3
8002710: 2000 movs r0, #0
8002712: 9001 str r0, [sp, #4]
8002714: 9300 str r3, [sp, #0]
8002716: 460b mov r3, r1
8002718: 2100 movs r1, #0
800271a: 2003 movs r0, #3
800271c: f001 fe64 bl 80043e8 <ramp>
stCiclo=omM3fw1;
8002720: 4b78 ldr r3, [pc, #480] @ (8002904 <manageCiclo+0xa34>)
8002722: 2209 movs r2, #9
8002724: 701a strb r2, [r3, #0]
break;
8002726: e0d9 b.n 80028dc <manageCiclo+0xa0c>
}else if(stPulsanti&M3BW){
8002728: 4b71 ldr r3, [pc, #452] @ (80028f0 <manageCiclo+0xa20>)
800272a: 881b ldrh r3, [r3, #0]
800272c: f403 7300 and.w r3, r3, #512 @ 0x200
8002730: 2b00 cmp r3, #0
8002732: d017 beq.n 8002764 <manageCiclo+0x894>
stBuz=bzmoving;
8002734: 4b6f ldr r3, [pc, #444] @ (80028f4 <manageCiclo+0xa24>)
8002736: 2201 movs r2, #1
8002738: 701a strb r2, [r3, #0]
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT);
800273a: 4b6f ldr r3, [pc, #444] @ (80028f8 <manageCiclo+0xa28>)
800273c: 889b ldrh r3, [r3, #4]
800273e: b2da uxtb r2, r3
8002740: 4b71 ldr r3, [pc, #452] @ (8002908 <manageCiclo+0xa38>)
8002742: 881b ldrh r3, [r3, #0]
8002744: b2d9 uxtb r1, r3
8002746: 4b6e ldr r3, [pc, #440] @ (8002900 <manageCiclo+0xa30>)
8002748: 881b ldrh r3, [r3, #0]
800274a: b2db uxtb r3, r3
800274c: 2000 movs r0, #0
800274e: 9001 str r0, [sp, #4]
8002750: 9300 str r3, [sp, #0]
8002752: 460b mov r3, r1
8002754: 2101 movs r1, #1
8002756: 2003 movs r0, #3
8002758: f001 fe46 bl 80043e8 <ramp>
stCiclo=omM3bw1;
800275c: 4b69 ldr r3, [pc, #420] @ (8002904 <manageCiclo+0xa34>)
800275e: 220b movs r2, #11
8002760: 701a strb r2, [r3, #0]
break;
8002762: e0bb b.n 80028dc <manageCiclo+0xa0c>
}else if(stPulsanti&M4FW){
8002764: 4b62 ldr r3, [pc, #392] @ (80028f0 <manageCiclo+0xa20>)
8002766: 881b ldrh r3, [r3, #0]
8002768: f403 6380 and.w r3, r3, #1024 @ 0x400
800276c: 2b00 cmp r3, #0
800276e: d017 beq.n 80027a0 <manageCiclo+0x8d0>
stBuz=bzmoving;
8002770: 4b60 ldr r3, [pc, #384] @ (80028f4 <manageCiclo+0xa24>)
8002772: 2201 movs r2, #1
8002774: 701a strb r2, [r3, #0]
(void)ramp(M4,FW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
8002776: 4b60 ldr r3, [pc, #384] @ (80028f8 <manageCiclo+0xa28>)
8002778: 88db ldrh r3, [r3, #6]
800277a: b2da uxtb r2, r3
800277c: 4b62 ldr r3, [pc, #392] @ (8002908 <manageCiclo+0xa38>)
800277e: 881b ldrh r3, [r3, #0]
8002780: b2d9 uxtb r1, r3
8002782: 4b5f ldr r3, [pc, #380] @ (8002900 <manageCiclo+0xa30>)
8002784: 881b ldrh r3, [r3, #0]
8002786: b2db uxtb r3, r3
8002788: 2000 movs r0, #0
800278a: 9001 str r0, [sp, #4]
800278c: 9300 str r3, [sp, #0]
800278e: 460b mov r3, r1
8002790: 2100 movs r1, #0
8002792: 2004 movs r0, #4
8002794: f001 fe28 bl 80043e8 <ramp>
stCiclo=omM4fw1;
8002798: 4b5a ldr r3, [pc, #360] @ (8002904 <manageCiclo+0xa34>)
800279a: 220d movs r2, #13
800279c: 701a strb r2, [r3, #0]
break;
800279e: e09d b.n 80028dc <manageCiclo+0xa0c>
}else if(stPulsanti&M4BW){
80027a0: 4b53 ldr r3, [pc, #332] @ (80028f0 <manageCiclo+0xa20>)
80027a2: 881b ldrh r3, [r3, #0]
80027a4: f403 6300 and.w r3, r3, #2048 @ 0x800
80027a8: 2b00 cmp r3, #0
80027aa: f000 8097 beq.w 80028dc <manageCiclo+0xa0c>
stBuz=bzmoving;
80027ae: 4b51 ldr r3, [pc, #324] @ (80028f4 <manageCiclo+0xa24>)
80027b0: 2201 movs r2, #1
80027b2: 701a strb r2, [r3, #0]
(void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
80027b4: 4b50 ldr r3, [pc, #320] @ (80028f8 <manageCiclo+0xa28>)
80027b6: 88db ldrh r3, [r3, #6]
80027b8: b2da uxtb r2, r3
80027ba: 4b53 ldr r3, [pc, #332] @ (8002908 <manageCiclo+0xa38>)
80027bc: 881b ldrh r3, [r3, #0]
80027be: b2d9 uxtb r1, r3
80027c0: 4b4f ldr r3, [pc, #316] @ (8002900 <manageCiclo+0xa30>)
80027c2: 881b ldrh r3, [r3, #0]
80027c4: b2db uxtb r3, r3
80027c6: 2000 movs r0, #0
80027c8: 9001 str r0, [sp, #4]
80027ca: 9300 str r3, [sp, #0]
80027cc: 460b mov r3, r1
80027ce: 2101 movs r1, #1
80027d0: 2004 movs r0, #4
80027d2: f001 fe09 bl 80043e8 <ramp>
stCiclo=omM4bw1;
80027d6: 4b4b ldr r3, [pc, #300] @ (8002904 <manageCiclo+0xa34>)
80027d8: 220f movs r2, #15
80027da: 701a strb r2, [r3, #0]
break;
80027dc: e07e b.n 80028dc <manageCiclo+0xa0c>
case omchiusura1:
if(rtCiclo>=10){//doppo 1 secondi
80027de: 4b4b ldr r3, [pc, #300] @ (800290c <manageCiclo+0xa3c>)
80027e0: 881b ldrh r3, [r3, #0]
80027e2: b29b uxth r3, r3
80027e4: 2b09 cmp r3, #9
80027e6: d921 bls.n 800282c <manageCiclo+0x95c>
m1=m1ch();m2=m2ch();m3=m3ch();m4=m4ch();
80027e8: f000 ff4a bl 8003680 <m1ch>
80027ec: 4603 mov r3, r0
80027ee: 71fb strb r3, [r7, #7]
80027f0: f001 f818 bl 8003824 <m2ch>
80027f4: 4603 mov r3, r0
80027f6: 71bb strb r3, [r7, #6]
80027f8: f001 f8e6 bl 80039c8 <m3ch>
80027fc: 4603 mov r3, r0
80027fe: 717b strb r3, [r7, #5]
8002800: f001 f9b6 bl 8003b70 <m4ch>
8002804: 4603 mov r3, r0
8002806: 713b strb r3, [r7, #4]
if((m1==motStop)&&(m2==motStop)&&(m3==motStop)&&(m4==motStop)){
8002808: 79fb ldrb r3, [r7, #7]
800280a: 2b04 cmp r3, #4
800280c: d10e bne.n 800282c <manageCiclo+0x95c>
800280e: 79bb ldrb r3, [r7, #6]
8002810: 2b04 cmp r3, #4
8002812: d10b bne.n 800282c <manageCiclo+0x95c>
8002814: 797b ldrb r3, [r7, #5]
8002816: 2b04 cmp r3, #4
8002818: d108 bne.n 800282c <manageCiclo+0x95c>
800281a: 793b ldrb r3, [r7, #4]
800281c: 2b04 cmp r3, #4
800281e: d105 bne.n 800282c <manageCiclo+0x95c>
stBuz=bzoff;
8002820: 4b34 ldr r3, [pc, #208] @ (80028f4 <manageCiclo+0xa24>)
8002822: 2200 movs r2, #0
8002824: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
8002826: 4b37 ldr r3, [pc, #220] @ (8002904 <manageCiclo+0xa34>)
8002828: 2200 movs r2, #0
800282a: 701a strb r2, [r3, #0]
}
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
800282c: 4b30 ldr r3, [pc, #192] @ (80028f0 <manageCiclo+0xa20>)
800282e: 881b ldrh r3, [r3, #0]
8002830: f003 0302 and.w r3, r3, #2
8002834: 2b00 cmp r3, #0
8002836: d053 beq.n 80028e0 <manageCiclo+0xa10>
8002838: 4b32 ldr r3, [pc, #200] @ (8002904 <manageCiclo+0xa34>)
800283a: 2216 movs r2, #22
800283c: 701a strb r2, [r3, #0]
break;
800283e: e04f b.n 80028e0 <manageCiclo+0xa10>
case omstopchiusura:
SetMotPerc(M1,FW,0);
8002840: 2200 movs r2, #0
8002842: 2100 movs r1, #0
8002844: 2001 movs r0, #1
8002846: f001 fc4f bl 80040e8 <SetMotPerc>
SetMotPerc(M2,FW,0);
800284a: 2200 movs r2, #0
800284c: 2100 movs r1, #0
800284e: 2002 movs r0, #2
8002850: f001 fc4a bl 80040e8 <SetMotPerc>
SetMotPerc(M3,FW,0);
8002854: 2200 movs r2, #0
8002856: 2100 movs r1, #0
8002858: 2003 movs r0, #3
800285a: f001 fc45 bl 80040e8 <SetMotPerc>
SetMotPerc(M4,FW,0);
800285e: 2200 movs r2, #0
8002860: 2100 movs r1, #0
8002862: 2004 movs r0, #4
8002864: f001 fc40 bl 80040e8 <SetMotPerc>
if(pulsanti==0){
8002868: 4b29 ldr r3, [pc, #164] @ (8002910 <manageCiclo+0xa40>)
800286a: 781b ldrb r3, [r3, #0]
800286c: 2b00 cmp r3, #0
800286e: d139 bne.n 80028e4 <manageCiclo+0xa14>
stBuz=bzoff;
8002870: 4b20 ldr r3, [pc, #128] @ (80028f4 <manageCiclo+0xa24>)
8002872: 2200 movs r2, #0
8002874: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8002876: 4b23 ldr r3, [pc, #140] @ (8002904 <manageCiclo+0xa34>)
8002878: 2214 movs r2, #20
800287a: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
800287c: 4b1c ldr r3, [pc, #112] @ (80028f0 <manageCiclo+0xa20>)
800287e: 881b ldrh r3, [r3, #0]
8002880: f023 0302 bic.w r3, r3, #2
8002884: b29a uxth r2, r3
8002886: 4b1a ldr r3, [pc, #104] @ (80028f0 <manageCiclo+0xa20>)
8002888: 801a strh r2, [r3, #0]
}
break;
800288a: e02b b.n 80028e4 <manageCiclo+0xa14>
break;
800288c: bf00 nop
800288e: e02a b.n 80028e6 <manageCiclo+0xa16>
break;
8002890: bf00 nop
8002892: e028 b.n 80028e6 <manageCiclo+0xa16>
break;
8002894: bf00 nop
8002896: e026 b.n 80028e6 <manageCiclo+0xa16>
break;
8002898: bf00 nop
800289a: e024 b.n 80028e6 <manageCiclo+0xa16>
break;
800289c: bf00 nop
800289e: e022 b.n 80028e6 <manageCiclo+0xa16>
break;
80028a0: bf00 nop
80028a2: e020 b.n 80028e6 <manageCiclo+0xa16>
break;
80028a4: bf00 nop
80028a6: e01e b.n 80028e6 <manageCiclo+0xa16>
break;
80028a8: bf00 nop
80028aa: e01c b.n 80028e6 <manageCiclo+0xa16>
break;
80028ac: bf00 nop
80028ae: e01a b.n 80028e6 <manageCiclo+0xa16>
break;
80028b0: bf00 nop
80028b2: e018 b.n 80028e6 <manageCiclo+0xa16>
break;
80028b4: bf00 nop
80028b6: e016 b.n 80028e6 <manageCiclo+0xa16>
break;
80028b8: bf00 nop
80028ba: e014 b.n 80028e6 <manageCiclo+0xa16>
break;
80028bc: bf00 nop
80028be: e012 b.n 80028e6 <manageCiclo+0xa16>
break;
80028c0: bf00 nop
80028c2: e010 b.n 80028e6 <manageCiclo+0xa16>
break;
80028c4: bf00 nop
80028c6: e00e b.n 80028e6 <manageCiclo+0xa16>
break;
80028c8: bf00 nop
80028ca: e00c b.n 80028e6 <manageCiclo+0xa16>
break;
80028cc: bf00 nop
80028ce: e00a b.n 80028e6 <manageCiclo+0xa16>
break;
80028d0: bf00 nop
80028d2: e008 b.n 80028e6 <manageCiclo+0xa16>
break;
80028d4: bf00 nop
80028d6: e006 b.n 80028e6 <manageCiclo+0xa16>
break;
80028d8: bf00 nop
80028da: e004 b.n 80028e6 <manageCiclo+0xa16>
break;
80028dc: bf00 nop
80028de: e002 b.n 80028e6 <manageCiclo+0xa16>
break;
80028e0: bf00 nop
80028e2: e000 b.n 80028e6 <manageCiclo+0xa16>
break;
80028e4: bf00 nop
}
}
80028e6: bf00 nop
80028e8: 3708 adds r7, #8
80028ea: 46bd mov sp, r7
80028ec: bd80 pop {r7, pc}
80028ee: bf00 nop
80028f0: 2000044c .word 0x2000044c
80028f4: 2000044f .word 0x2000044f
80028f8: 20000444 .word 0x20000444
80028fc: 2000041e .word 0x2000041e
8002900: 2000041a .word 0x2000041a
8002904: 2000044e .word 0x2000044e
8002908: 20000420 .word 0x20000420
800290c: 200003fc .word 0x200003fc
8002910: 200003f0 .word 0x200003f0
08002914 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8002914: b580 push {r7, lr}
8002916: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8002918: f002 f854 bl 80049c4 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
800291c: f000 f850 bl 80029c0 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8002920: f000 fab2 bl 8002e88 <MX_GPIO_Init>
MX_DMA_Init();
8002924: f000 fa92 bl 8002e4c <MX_DMA_Init>
MX_USB_DEVICE_Init();
8002928: f00a fcec bl 800d304 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
800292c: f000 f91e bl 8002b6c <MX_TIM2_Init>
MX_TIM4_Init();
8002930: f000 f9c0 bl 8002cb4 <MX_TIM4_Init>
MX_ADC1_Init();
8002934: f000 f8a2 bl 8002a7c <MX_ADC1_Init>
MX_USART1_UART_Init();
8002938: f000 fa5e bl 8002df8 <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_buf, ADC_NUM_CHANNELS);
800293c: 2205 movs r2, #5
800293e: 491c ldr r1, [pc, #112] @ (80029b0 <main+0x9c>)
8002940: 481c ldr r0, [pc, #112] @ (80029b4 <main+0xa0>)
8002942: f002 f979 bl 8004c38 <HAL_ADC_Start_DMA>
StopMot(timMot1,FWMot1);
8002946: 2100 movs r1, #0
8002948: 481b ldr r0, [pc, #108] @ (80029b8 <main+0xa4>)
800294a: f001 f9fa bl 8003d42 <StopMot>
StopMot(timMot1,BWMot1);
800294e: 2104 movs r1, #4
8002950: 4819 ldr r0, [pc, #100] @ (80029b8 <main+0xa4>)
8002952: f001 f9f6 bl 8003d42 <StopMot>
StopMot(timMot2,FWMot2);
8002956: 2108 movs r1, #8
8002958: 4817 ldr r0, [pc, #92] @ (80029b8 <main+0xa4>)
800295a: f001 f9f2 bl 8003d42 <StopMot>
StopMot(timMot2,BWMot2);
800295e: 210c movs r1, #12
8002960: 4815 ldr r0, [pc, #84] @ (80029b8 <main+0xa4>)
8002962: f001 f9ee bl 8003d42 <StopMot>
StopMot(timMot3,FWMot3);
8002966: 2100 movs r1, #0
8002968: 4814 ldr r0, [pc, #80] @ (80029bc <main+0xa8>)
800296a: f001 f9ea bl 8003d42 <StopMot>
StopMot(timMot3,BWMot3);
800296e: 2104 movs r1, #4
8002970: 4812 ldr r0, [pc, #72] @ (80029bc <main+0xa8>)
8002972: f001 f9e6 bl 8003d42 <StopMot>
StopMot(timMot4,FWMot4);
8002976: 2108 movs r1, #8
8002978: 4810 ldr r0, [pc, #64] @ (80029bc <main+0xa8>)
800297a: f001 f9e2 bl 8003d42 <StopMot>
StopMot(timMot4,BWMot4);
800297e: 210c movs r1, #12
8002980: 480e ldr r0, [pc, #56] @ (80029bc <main+0xa8>)
8002982: f001 f9de bl 8003d42 <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
//while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
if (EE_Init() != EE_OK){
8002986: f7fe fc97 bl 80012b8 <EE_Init>
800298a: 4603 mov r3, r0
800298c: 2b00 cmp r3, #0
800298e: d001 beq.n 8002994 <main+0x80>
for(;;);//errore eeprom
8002990: bf00 nop
8002992: e7fd b.n 8002990 <main+0x7c>
}
loadEE();
8002994: f7fe fd2c bl 80013f0 <loadEE>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
manageCDC();
8002998: f7fd fd30 bl 80003fc <manageCDC>
manageAdc();
800299c: f7fd fbde bl 800015c <manageAdc>
managePulsanti();
80029a0: f7ff f932 bl 8001c08 <managePulsanti>
manageCiclo();
80029a4: f7ff fa94 bl 8001ed0 <manageCiclo>
debug();
80029a8: f7fe fa90 bl 8000ecc <debug>
manageCDC();
80029ac: bf00 nop
80029ae: e7f3 b.n 8002998 <main+0x84>
80029b0: 200001fc .word 0x200001fc
80029b4: 200002a4 .word 0x200002a4
80029b8: 20000318 .word 0x20000318
80029bc: 20000360 .word 0x20000360
080029c0 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
80029c0: b580 push {r7, lr}
80029c2: b094 sub sp, #80 @ 0x50
80029c4: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
80029c6: f107 0328 add.w r3, r7, #40 @ 0x28
80029ca: 2228 movs r2, #40 @ 0x28
80029cc: 2100 movs r1, #0
80029ce: 4618 mov r0, r3
80029d0: f00b f9d4 bl 800dd7c <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
80029d4: f107 0314 add.w r3, r7, #20
80029d8: 2200 movs r2, #0
80029da: 601a str r2, [r3, #0]
80029dc: 605a str r2, [r3, #4]
80029de: 609a str r2, [r3, #8]
80029e0: 60da str r2, [r3, #12]
80029e2: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
80029e4: 1d3b adds r3, r7, #4
80029e6: 2200 movs r2, #0
80029e8: 601a str r2, [r3, #0]
80029ea: 605a str r2, [r3, #4]
80029ec: 609a str r2, [r3, #8]
80029ee: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
80029f0: 2301 movs r3, #1
80029f2: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
80029f4: f44f 3380 mov.w r3, #65536 @ 0x10000
80029f8: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
80029fa: 2300 movs r3, #0
80029fc: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
80029fe: 2301 movs r3, #1
8002a00: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8002a02: 2302 movs r3, #2
8002a04: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8002a06: f44f 3380 mov.w r3, #65536 @ 0x10000
8002a0a: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
8002a0c: f44f 1380 mov.w r3, #1048576 @ 0x100000
8002a10: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8002a12: f107 0328 add.w r3, r7, #40 @ 0x28
8002a16: 4618 mov r0, r3
8002a18: f005 f818 bl 8007a4c <HAL_RCC_OscConfig>
8002a1c: 4603 mov r3, r0
8002a1e: 2b00 cmp r3, #0
8002a20: d001 beq.n 8002a26 <SystemClock_Config+0x66>
{
Error_Handler();
8002a22: f000 fadb bl 8002fdc <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8002a26: 230f movs r3, #15
8002a28: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
8002a2a: 2302 movs r3, #2
8002a2c: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
8002a2e: 2300 movs r3, #0
8002a30: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
8002a32: f44f 6380 mov.w r3, #1024 @ 0x400
8002a36: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8002a38: 2300 movs r3, #0
8002a3a: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
8002a3c: f107 0314 add.w r3, r7, #20
8002a40: 2102 movs r1, #2
8002a42: 4618 mov r0, r3
8002a44: f005 fa84 bl 8007f50 <HAL_RCC_ClockConfig>
8002a48: 4603 mov r3, r0
8002a4a: 2b00 cmp r3, #0
8002a4c: d001 beq.n 8002a52 <SystemClock_Config+0x92>
{
Error_Handler();
8002a4e: f000 fac5 bl 8002fdc <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
8002a52: 2312 movs r3, #18
8002a54: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
8002a56: f44f 4300 mov.w r3, #32768 @ 0x8000
8002a5a: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
8002a5c: 2300 movs r3, #0
8002a5e: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
8002a60: 1d3b adds r3, r7, #4
8002a62: 4618 mov r0, r3
8002a64: f005 fc04 bl 8008270 <HAL_RCCEx_PeriphCLKConfig>
8002a68: 4603 mov r3, r0
8002a6a: 2b00 cmp r3, #0
8002a6c: d001 beq.n 8002a72 <SystemClock_Config+0xb2>
{
Error_Handler();
8002a6e: f000 fab5 bl 8002fdc <Error_Handler>
}
}
8002a72: bf00 nop
8002a74: 3750 adds r7, #80 @ 0x50
8002a76: 46bd mov sp, r7
8002a78: bd80 pop {r7, pc}
...
08002a7c <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
8002a7c: b580 push {r7, lr}
8002a7e: b084 sub sp, #16
8002a80: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
8002a82: 1d3b adds r3, r7, #4
8002a84: 2200 movs r2, #0
8002a86: 601a str r2, [r3, #0]
8002a88: 605a str r2, [r3, #4]
8002a8a: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
8002a8c: 4b35 ldr r3, [pc, #212] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002a8e: 4a36 ldr r2, [pc, #216] @ (8002b68 <MX_ADC1_Init+0xec>)
8002a90: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
8002a92: 4b34 ldr r3, [pc, #208] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002a94: f44f 7280 mov.w r2, #256 @ 0x100
8002a98: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = ENABLE;
8002a9a: 4b32 ldr r3, [pc, #200] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002a9c: 2201 movs r2, #1
8002a9e: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
8002aa0: 4b30 ldr r3, [pc, #192] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002aa2: 2200 movs r2, #0
8002aa4: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8002aa6: 4b2f ldr r3, [pc, #188] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002aa8: f44f 2260 mov.w r2, #917504 @ 0xe0000
8002aac: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
8002aae: 4b2d ldr r3, [pc, #180] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002ab0: 2200 movs r2, #0
8002ab2: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 5;
8002ab4: 4b2b ldr r3, [pc, #172] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002ab6: 2205 movs r2, #5
8002ab8: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
8002aba: 482a ldr r0, [pc, #168] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002abc: f001 ffe4 bl 8004a88 <HAL_ADC_Init>
8002ac0: 4603 mov r3, r0
8002ac2: 2b00 cmp r3, #0
8002ac4: d001 beq.n 8002aca <MX_ADC1_Init+0x4e>
{
Error_Handler();
8002ac6: f000 fa89 bl 8002fdc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
8002aca: 2304 movs r3, #4
8002acc: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
8002ace: 2301 movs r3, #1
8002ad0: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5;
8002ad2: 2303 movs r3, #3
8002ad4: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002ad6: 1d3b adds r3, r7, #4
8002ad8: 4619 mov r1, r3
8002ada: 4822 ldr r0, [pc, #136] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002adc: f002 f9a6 bl 8004e2c <HAL_ADC_ConfigChannel>
8002ae0: 4603 mov r3, r0
8002ae2: 2b00 cmp r3, #0
8002ae4: d001 beq.n 8002aea <MX_ADC1_Init+0x6e>
{
Error_Handler();
8002ae6: f000 fa79 bl 8002fdc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_5;
8002aea: 2305 movs r3, #5
8002aec: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_2;
8002aee: 2302 movs r3, #2
8002af0: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002af2: 1d3b adds r3, r7, #4
8002af4: 4619 mov r1, r3
8002af6: 481b ldr r0, [pc, #108] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002af8: f002 f998 bl 8004e2c <HAL_ADC_ConfigChannel>
8002afc: 4603 mov r3, r0
8002afe: 2b00 cmp r3, #0
8002b00: d001 beq.n 8002b06 <MX_ADC1_Init+0x8a>
{
Error_Handler();
8002b02: f000 fa6b bl 8002fdc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_6;
8002b06: 2306 movs r3, #6
8002b08: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_3;
8002b0a: 2303 movs r3, #3
8002b0c: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002b0e: 1d3b adds r3, r7, #4
8002b10: 4619 mov r1, r3
8002b12: 4814 ldr r0, [pc, #80] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002b14: f002 f98a bl 8004e2c <HAL_ADC_ConfigChannel>
8002b18: 4603 mov r3, r0
8002b1a: 2b00 cmp r3, #0
8002b1c: d001 beq.n 8002b22 <MX_ADC1_Init+0xa6>
{
Error_Handler();
8002b1e: f000 fa5d bl 8002fdc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_7;
8002b22: 2307 movs r3, #7
8002b24: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_4;
8002b26: 2304 movs r3, #4
8002b28: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002b2a: 1d3b adds r3, r7, #4
8002b2c: 4619 mov r1, r3
8002b2e: 480d ldr r0, [pc, #52] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002b30: f002 f97c bl 8004e2c <HAL_ADC_ConfigChannel>
8002b34: 4603 mov r3, r0
8002b36: 2b00 cmp r3, #0
8002b38: d001 beq.n 8002b3e <MX_ADC1_Init+0xc2>
{
Error_Handler();
8002b3a: f000 fa4f bl 8002fdc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
8002b3e: 2308 movs r3, #8
8002b40: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_5;
8002b42: 2305 movs r3, #5
8002b44: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002b46: 1d3b adds r3, r7, #4
8002b48: 4619 mov r1, r3
8002b4a: 4806 ldr r0, [pc, #24] @ (8002b64 <MX_ADC1_Init+0xe8>)
8002b4c: f002 f96e bl 8004e2c <HAL_ADC_ConfigChannel>
8002b50: 4603 mov r3, r0
8002b52: 2b00 cmp r3, #0
8002b54: d001 beq.n 8002b5a <MX_ADC1_Init+0xde>
{
Error_Handler();
8002b56: f000 fa41 bl 8002fdc <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
8002b5a: bf00 nop
8002b5c: 3710 adds r7, #16
8002b5e: 46bd mov sp, r7
8002b60: bd80 pop {r7, pc}
8002b62: bf00 nop
8002b64: 200002a4 .word 0x200002a4
8002b68: 40012400 .word 0x40012400
08002b6c <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
8002b6c: b580 push {r7, lr}
8002b6e: b08e sub sp, #56 @ 0x38
8002b70: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8002b72: f107 0328 add.w r3, r7, #40 @ 0x28
8002b76: 2200 movs r2, #0
8002b78: 601a str r2, [r3, #0]
8002b7a: 605a str r2, [r3, #4]
8002b7c: 609a str r2, [r3, #8]
8002b7e: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8002b80: f107 0320 add.w r3, r7, #32
8002b84: 2200 movs r2, #0
8002b86: 601a str r2, [r3, #0]
8002b88: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
8002b8a: 1d3b adds r3, r7, #4
8002b8c: 2200 movs r2, #0
8002b8e: 601a str r2, [r3, #0]
8002b90: 605a str r2, [r3, #4]
8002b92: 609a str r2, [r3, #8]
8002b94: 60da str r2, [r3, #12]
8002b96: 611a str r2, [r3, #16]
8002b98: 615a str r2, [r3, #20]
8002b9a: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
8002b9c: 4b44 ldr r3, [pc, #272] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002b9e: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8002ba2: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8002ba4: 4b42 ldr r3, [pc, #264] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002ba6: 2200 movs r2, #0
8002ba8: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
8002baa: 4b41 ldr r3, [pc, #260] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002bac: 2200 movs r2, #0
8002bae: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
8002bb0: 4b3f ldr r3, [pc, #252] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002bb2: f244 624f movw r2, #17999 @ 0x464f
8002bb6: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8002bb8: 4b3d ldr r3, [pc, #244] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002bba: 2200 movs r2, #0
8002bbc: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8002bbe: 4b3c ldr r3, [pc, #240] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002bc0: 2200 movs r2, #0
8002bc2: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
8002bc4: 483a ldr r0, [pc, #232] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002bc6: f005 fc09 bl 80083dc <HAL_TIM_Base_Init>
8002bca: 4603 mov r3, r0
8002bcc: 2b00 cmp r3, #0
8002bce: d001 beq.n 8002bd4 <MX_TIM2_Init+0x68>
{
Error_Handler();
8002bd0: f000 fa04 bl 8002fdc <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8002bd4: f44f 5380 mov.w r3, #4096 @ 0x1000
8002bd8: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
8002bda: f107 0328 add.w r3, r7, #40 @ 0x28
8002bde: 4619 mov r1, r3
8002be0: 4833 ldr r0, [pc, #204] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002be2: f005 fe6b bl 80088bc <HAL_TIM_ConfigClockSource>
8002be6: 4603 mov r3, r0
8002be8: 2b00 cmp r3, #0
8002bea: d001 beq.n 8002bf0 <MX_TIM2_Init+0x84>
{
Error_Handler();
8002bec: f000 f9f6 bl 8002fdc <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
8002bf0: 482f ldr r0, [pc, #188] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002bf2: f005 fc42 bl 800847a <HAL_TIM_PWM_Init>
8002bf6: 4603 mov r3, r0
8002bf8: 2b00 cmp r3, #0
8002bfa: d001 beq.n 8002c00 <MX_TIM2_Init+0x94>
{
Error_Handler();
8002bfc: f000 f9ee bl 8002fdc <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8002c00: 2300 movs r3, #0
8002c02: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8002c04: 2300 movs r3, #0
8002c06: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
8002c08: f107 0320 add.w r3, r7, #32
8002c0c: 4619 mov r1, r3
8002c0e: 4828 ldr r0, [pc, #160] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002c10: f006 f9f4 bl 8008ffc <HAL_TIMEx_MasterConfigSynchronization>
8002c14: 4603 mov r3, r0
8002c16: 2b00 cmp r3, #0
8002c18: d001 beq.n 8002c1e <MX_TIM2_Init+0xb2>
{
Error_Handler();
8002c1a: f000 f9df bl 8002fdc <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8002c1e: 2360 movs r3, #96 @ 0x60
8002c20: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
8002c22: f44f 737a mov.w r3, #1000 @ 0x3e8
8002c26: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8002c28: 2300 movs r3, #0
8002c2a: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8002c2c: 2304 movs r3, #4
8002c2e: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8002c30: 1d3b adds r3, r7, #4
8002c32: 2200 movs r2, #0
8002c34: 4619 mov r1, r3
8002c36: 481e ldr r0, [pc, #120] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002c38: f005 fd7e bl 8008738 <HAL_TIM_PWM_ConfigChannel>
8002c3c: 4603 mov r3, r0
8002c3e: 2b00 cmp r3, #0
8002c40: d001 beq.n 8002c46 <MX_TIM2_Init+0xda>
{
Error_Handler();
8002c42: f000 f9cb bl 8002fdc <Error_Handler>
}
sConfigOC.Pulse = 2000;
8002c46: f44f 63fa mov.w r3, #2000 @ 0x7d0
8002c4a: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8002c4c: 1d3b adds r3, r7, #4
8002c4e: 2204 movs r2, #4
8002c50: 4619 mov r1, r3
8002c52: 4817 ldr r0, [pc, #92] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002c54: f005 fd70 bl 8008738 <HAL_TIM_PWM_ConfigChannel>
8002c58: 4603 mov r3, r0
8002c5a: 2b00 cmp r3, #0
8002c5c: d001 beq.n 8002c62 <MX_TIM2_Init+0xf6>
{
Error_Handler();
8002c5e: f000 f9bd bl 8002fdc <Error_Handler>
}
sConfigOC.Pulse = 3000;
8002c62: f640 33b8 movw r3, #3000 @ 0xbb8
8002c66: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
8002c68: 2300 movs r3, #0
8002c6a: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8002c6c: 1d3b adds r3, r7, #4
8002c6e: 2208 movs r2, #8
8002c70: 4619 mov r1, r3
8002c72: 480f ldr r0, [pc, #60] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002c74: f005 fd60 bl 8008738 <HAL_TIM_PWM_ConfigChannel>
8002c78: 4603 mov r3, r0
8002c7a: 2b00 cmp r3, #0
8002c7c: d001 beq.n 8002c82 <MX_TIM2_Init+0x116>
{
Error_Handler();
8002c7e: f000 f9ad bl 8002fdc <Error_Handler>
}
sConfigOC.Pulse = 4000;
8002c82: f44f 637a mov.w r3, #4000 @ 0xfa0
8002c86: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8002c88: 2304 movs r3, #4
8002c8a: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8002c8c: 1d3b adds r3, r7, #4
8002c8e: 220c movs r2, #12
8002c90: 4619 mov r1, r3
8002c92: 4807 ldr r0, [pc, #28] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002c94: f005 fd50 bl 8008738 <HAL_TIM_PWM_ConfigChannel>
8002c98: 4603 mov r3, r0
8002c9a: 2b00 cmp r3, #0
8002c9c: d001 beq.n 8002ca2 <MX_TIM2_Init+0x136>
{
Error_Handler();
8002c9e: f000 f99d bl 8002fdc <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
8002ca2: 4803 ldr r0, [pc, #12] @ (8002cb0 <MX_TIM2_Init+0x144>)
8002ca4: f001 fd4a bl 800473c <HAL_TIM_MspPostInit>
}
8002ca8: bf00 nop
8002caa: 3738 adds r7, #56 @ 0x38
8002cac: 46bd mov sp, r7
8002cae: bd80 pop {r7, pc}
8002cb0: 20000318 .word 0x20000318
08002cb4 <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
8002cb4: b580 push {r7, lr}
8002cb6: b08e sub sp, #56 @ 0x38
8002cb8: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8002cba: f107 0328 add.w r3, r7, #40 @ 0x28
8002cbe: 2200 movs r2, #0
8002cc0: 601a str r2, [r3, #0]
8002cc2: 605a str r2, [r3, #4]
8002cc4: 609a str r2, [r3, #8]
8002cc6: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8002cc8: f107 0320 add.w r3, r7, #32
8002ccc: 2200 movs r2, #0
8002cce: 601a str r2, [r3, #0]
8002cd0: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
8002cd2: 1d3b adds r3, r7, #4
8002cd4: 2200 movs r2, #0
8002cd6: 601a str r2, [r3, #0]
8002cd8: 605a str r2, [r3, #4]
8002cda: 609a str r2, [r3, #8]
8002cdc: 60da str r2, [r3, #12]
8002cde: 611a str r2, [r3, #16]
8002ce0: 615a str r2, [r3, #20]
8002ce2: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
8002ce4: 4b42 ldr r3, [pc, #264] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002ce6: 4a43 ldr r2, [pc, #268] @ (8002df4 <MX_TIM4_Init+0x140>)
8002ce8: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
8002cea: 4b41 ldr r3, [pc, #260] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002cec: 2200 movs r2, #0
8002cee: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
8002cf0: 4b3f ldr r3, [pc, #252] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002cf2: 2200 movs r2, #0
8002cf4: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
8002cf6: 4b3e ldr r3, [pc, #248] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002cf8: f244 624f movw r2, #17999 @ 0x464f
8002cfc: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8002cfe: 4b3c ldr r3, [pc, #240] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002d00: 2200 movs r2, #0
8002d02: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8002d04: 4b3a ldr r3, [pc, #232] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002d06: 2200 movs r2, #0
8002d08: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
8002d0a: 4839 ldr r0, [pc, #228] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002d0c: f005 fb66 bl 80083dc <HAL_TIM_Base_Init>
8002d10: 4603 mov r3, r0
8002d12: 2b00 cmp r3, #0
8002d14: d001 beq.n 8002d1a <MX_TIM4_Init+0x66>
{
Error_Handler();
8002d16: f000 f961 bl 8002fdc <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8002d1a: f44f 5380 mov.w r3, #4096 @ 0x1000
8002d1e: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
8002d20: f107 0328 add.w r3, r7, #40 @ 0x28
8002d24: 4619 mov r1, r3
8002d26: 4832 ldr r0, [pc, #200] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002d28: f005 fdc8 bl 80088bc <HAL_TIM_ConfigClockSource>
8002d2c: 4603 mov r3, r0
8002d2e: 2b00 cmp r3, #0
8002d30: d001 beq.n 8002d36 <MX_TIM4_Init+0x82>
{
Error_Handler();
8002d32: f000 f953 bl 8002fdc <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
8002d36: 482e ldr r0, [pc, #184] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002d38: f005 fb9f bl 800847a <HAL_TIM_PWM_Init>
8002d3c: 4603 mov r3, r0
8002d3e: 2b00 cmp r3, #0
8002d40: d001 beq.n 8002d46 <MX_TIM4_Init+0x92>
{
Error_Handler();
8002d42: f000 f94b bl 8002fdc <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8002d46: 2300 movs r3, #0
8002d48: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8002d4a: 2300 movs r3, #0
8002d4c: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
8002d4e: f107 0320 add.w r3, r7, #32
8002d52: 4619 mov r1, r3
8002d54: 4826 ldr r0, [pc, #152] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002d56: f006 f951 bl 8008ffc <HAL_TIMEx_MasterConfigSynchronization>
8002d5a: 4603 mov r3, r0
8002d5c: 2b00 cmp r3, #0
8002d5e: d001 beq.n 8002d64 <MX_TIM4_Init+0xb0>
{
Error_Handler();
8002d60: f000 f93c bl 8002fdc <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8002d64: 2360 movs r3, #96 @ 0x60
8002d66: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
8002d68: f241 3388 movw r3, #5000 @ 0x1388
8002d6c: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8002d6e: 2300 movs r3, #0
8002d70: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8002d72: 2304 movs r3, #4
8002d74: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8002d76: 1d3b adds r3, r7, #4
8002d78: 2200 movs r2, #0
8002d7a: 4619 mov r1, r3
8002d7c: 481c ldr r0, [pc, #112] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002d7e: f005 fcdb bl 8008738 <HAL_TIM_PWM_ConfigChannel>
8002d82: 4603 mov r3, r0
8002d84: 2b00 cmp r3, #0
8002d86: d001 beq.n 8002d8c <MX_TIM4_Init+0xd8>
{
Error_Handler();
8002d88: f000 f928 bl 8002fdc <Error_Handler>
}
sConfigOC.Pulse = 6000;
8002d8c: f241 7370 movw r3, #6000 @ 0x1770
8002d90: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8002d92: 1d3b adds r3, r7, #4
8002d94: 2204 movs r2, #4
8002d96: 4619 mov r1, r3
8002d98: 4815 ldr r0, [pc, #84] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002d9a: f005 fccd bl 8008738 <HAL_TIM_PWM_ConfigChannel>
8002d9e: 4603 mov r3, r0
8002da0: 2b00 cmp r3, #0
8002da2: d001 beq.n 8002da8 <MX_TIM4_Init+0xf4>
{
Error_Handler();
8002da4: f000 f91a bl 8002fdc <Error_Handler>
}
sConfigOC.Pulse = 7000;
8002da8: f641 3358 movw r3, #7000 @ 0x1b58
8002dac: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8002dae: 1d3b adds r3, r7, #4
8002db0: 2208 movs r2, #8
8002db2: 4619 mov r1, r3
8002db4: 480e ldr r0, [pc, #56] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002db6: f005 fcbf bl 8008738 <HAL_TIM_PWM_ConfigChannel>
8002dba: 4603 mov r3, r0
8002dbc: 2b00 cmp r3, #0
8002dbe: d001 beq.n 8002dc4 <MX_TIM4_Init+0x110>
{
Error_Handler();
8002dc0: f000 f90c bl 8002fdc <Error_Handler>
}
sConfigOC.Pulse = 8000;
8002dc4: f44f 53fa mov.w r3, #8000 @ 0x1f40
8002dc8: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8002dca: 1d3b adds r3, r7, #4
8002dcc: 220c movs r2, #12
8002dce: 4619 mov r1, r3
8002dd0: 4807 ldr r0, [pc, #28] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002dd2: f005 fcb1 bl 8008738 <HAL_TIM_PWM_ConfigChannel>
8002dd6: 4603 mov r3, r0
8002dd8: 2b00 cmp r3, #0
8002dda: d001 beq.n 8002de0 <MX_TIM4_Init+0x12c>
{
Error_Handler();
8002ddc: f000 f8fe bl 8002fdc <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
8002de0: 4803 ldr r0, [pc, #12] @ (8002df0 <MX_TIM4_Init+0x13c>)
8002de2: f001 fcab bl 800473c <HAL_TIM_MspPostInit>
}
8002de6: bf00 nop
8002de8: 3738 adds r7, #56 @ 0x38
8002dea: 46bd mov sp, r7
8002dec: bd80 pop {r7, pc}
8002dee: bf00 nop
8002df0: 20000360 .word 0x20000360
8002df4: 40000800 .word 0x40000800
08002df8 <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
8002df8: b580 push {r7, lr}
8002dfa: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
8002dfc: 4b11 ldr r3, [pc, #68] @ (8002e44 <MX_USART1_UART_Init+0x4c>)
8002dfe: 4a12 ldr r2, [pc, #72] @ (8002e48 <MX_USART1_UART_Init+0x50>)
8002e00: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
8002e02: 4b10 ldr r3, [pc, #64] @ (8002e44 <MX_USART1_UART_Init+0x4c>)
8002e04: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8002e08: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
8002e0a: 4b0e ldr r3, [pc, #56] @ (8002e44 <MX_USART1_UART_Init+0x4c>)
8002e0c: 2200 movs r2, #0
8002e0e: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8002e10: 4b0c ldr r3, [pc, #48] @ (8002e44 <MX_USART1_UART_Init+0x4c>)
8002e12: 2200 movs r2, #0
8002e14: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
8002e16: 4b0b ldr r3, [pc, #44] @ (8002e44 <MX_USART1_UART_Init+0x4c>)
8002e18: 2200 movs r2, #0
8002e1a: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8002e1c: 4b09 ldr r3, [pc, #36] @ (8002e44 <MX_USART1_UART_Init+0x4c>)
8002e1e: 220c movs r2, #12
8002e20: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8002e22: 4b08 ldr r3, [pc, #32] @ (8002e44 <MX_USART1_UART_Init+0x4c>)
8002e24: 2200 movs r2, #0
8002e26: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8002e28: 4b06 ldr r3, [pc, #24] @ (8002e44 <MX_USART1_UART_Init+0x4c>)
8002e2a: 2200 movs r2, #0
8002e2c: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK)
8002e2e: 4805 ldr r0, [pc, #20] @ (8002e44 <MX_USART1_UART_Init+0x4c>)
8002e30: f006 f942 bl 80090b8 <HAL_UART_Init>
8002e34: 4603 mov r3, r0
8002e36: 2b00 cmp r3, #0
8002e38: d001 beq.n 8002e3e <MX_USART1_UART_Init+0x46>
{
Error_Handler();
8002e3a: f000 f8cf bl 8002fdc <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
8002e3e: bf00 nop
8002e40: bd80 pop {r7, pc}
8002e42: bf00 nop
8002e44: 200003a8 .word 0x200003a8
8002e48: 40013800 .word 0x40013800
08002e4c <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
8002e4c: b580 push {r7, lr}
8002e4e: b082 sub sp, #8
8002e50: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
8002e52: 4b0c ldr r3, [pc, #48] @ (8002e84 <MX_DMA_Init+0x38>)
8002e54: 695b ldr r3, [r3, #20]
8002e56: 4a0b ldr r2, [pc, #44] @ (8002e84 <MX_DMA_Init+0x38>)
8002e58: f043 0301 orr.w r3, r3, #1
8002e5c: 6153 str r3, [r2, #20]
8002e5e: 4b09 ldr r3, [pc, #36] @ (8002e84 <MX_DMA_Init+0x38>)
8002e60: 695b ldr r3, [r3, #20]
8002e62: f003 0301 and.w r3, r3, #1
8002e66: 607b str r3, [r7, #4]
8002e68: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
8002e6a: 2200 movs r2, #0
8002e6c: 2100 movs r1, #0
8002e6e: 200b movs r0, #11
8002e70: f002 faad bl 80053ce <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
8002e74: 200b movs r0, #11
8002e76: f002 fac6 bl 8005406 <HAL_NVIC_EnableIRQ>
}
8002e7a: bf00 nop
8002e7c: 3708 adds r7, #8
8002e7e: 46bd mov sp, r7
8002e80: bd80 pop {r7, pc}
8002e82: bf00 nop
8002e84: 40021000 .word 0x40021000
08002e88 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8002e88: b580 push {r7, lr}
8002e8a: b088 sub sp, #32
8002e8c: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8002e8e: f107 0310 add.w r3, r7, #16
8002e92: 2200 movs r2, #0
8002e94: 601a str r2, [r3, #0]
8002e96: 605a str r2, [r3, #4]
8002e98: 609a str r2, [r3, #8]
8002e9a: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
8002e9c: 4b4b ldr r3, [pc, #300] @ (8002fcc <MX_GPIO_Init+0x144>)
8002e9e: 699b ldr r3, [r3, #24]
8002ea0: 4a4a ldr r2, [pc, #296] @ (8002fcc <MX_GPIO_Init+0x144>)
8002ea2: f043 0310 orr.w r3, r3, #16
8002ea6: 6193 str r3, [r2, #24]
8002ea8: 4b48 ldr r3, [pc, #288] @ (8002fcc <MX_GPIO_Init+0x144>)
8002eaa: 699b ldr r3, [r3, #24]
8002eac: f003 0310 and.w r3, r3, #16
8002eb0: 60fb str r3, [r7, #12]
8002eb2: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
8002eb4: 4b45 ldr r3, [pc, #276] @ (8002fcc <MX_GPIO_Init+0x144>)
8002eb6: 699b ldr r3, [r3, #24]
8002eb8: 4a44 ldr r2, [pc, #272] @ (8002fcc <MX_GPIO_Init+0x144>)
8002eba: f043 0320 orr.w r3, r3, #32
8002ebe: 6193 str r3, [r2, #24]
8002ec0: 4b42 ldr r3, [pc, #264] @ (8002fcc <MX_GPIO_Init+0x144>)
8002ec2: 699b ldr r3, [r3, #24]
8002ec4: f003 0320 and.w r3, r3, #32
8002ec8: 60bb str r3, [r7, #8]
8002eca: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
8002ecc: 4b3f ldr r3, [pc, #252] @ (8002fcc <MX_GPIO_Init+0x144>)
8002ece: 699b ldr r3, [r3, #24]
8002ed0: 4a3e ldr r2, [pc, #248] @ (8002fcc <MX_GPIO_Init+0x144>)
8002ed2: f043 0304 orr.w r3, r3, #4
8002ed6: 6193 str r3, [r2, #24]
8002ed8: 4b3c ldr r3, [pc, #240] @ (8002fcc <MX_GPIO_Init+0x144>)
8002eda: 699b ldr r3, [r3, #24]
8002edc: f003 0304 and.w r3, r3, #4
8002ee0: 607b str r3, [r7, #4]
8002ee2: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
8002ee4: 4b39 ldr r3, [pc, #228] @ (8002fcc <MX_GPIO_Init+0x144>)
8002ee6: 699b ldr r3, [r3, #24]
8002ee8: 4a38 ldr r2, [pc, #224] @ (8002fcc <MX_GPIO_Init+0x144>)
8002eea: f043 0308 orr.w r3, r3, #8
8002eee: 6193 str r3, [r2, #24]
8002ef0: 4b36 ldr r3, [pc, #216] @ (8002fcc <MX_GPIO_Init+0x144>)
8002ef2: 699b ldr r3, [r3, #24]
8002ef4: f003 0308 and.w r3, r3, #8
8002ef8: 603b str r3, [r7, #0]
8002efa: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8002efc: 2200 movs r2, #0
8002efe: f44f 5100 mov.w r1, #8192 @ 0x2000
8002f02: 4833 ldr r0, [pc, #204] @ (8002fd0 <MX_GPIO_Init+0x148>)
8002f04: f003 f829 bl 8005f5a <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
8002f08: 2200 movs r2, #0
8002f0a: f640 413e movw r1, #3134 @ 0xc3e
8002f0e: 4831 ldr r0, [pc, #196] @ (8002fd4 <MX_GPIO_Init+0x14c>)
8002f10: f003 f823 bl 8005f5a <HAL_GPIO_WritePin>
|EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET);
8002f14: 2200 movs r2, #0
8002f16: f44f 4101 mov.w r1, #33024 @ 0x8100
8002f1a: 482f ldr r0, [pc, #188] @ (8002fd8 <MX_GPIO_Init+0x150>)
8002f1c: f003 f81d bl 8005f5a <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
8002f20: f44f 5300 mov.w r3, #8192 @ 0x2000
8002f24: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8002f26: 2301 movs r3, #1
8002f28: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002f2a: 2300 movs r3, #0
8002f2c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002f2e: 2302 movs r3, #2
8002f30: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
8002f32: f107 0310 add.w r3, r7, #16
8002f36: 4619 mov r1, r3
8002f38: 4825 ldr r0, [pc, #148] @ (8002fd0 <MX_GPIO_Init+0x148>)
8002f3a: f002 fe73 bl 8005c24 <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin|P2_Pin;
8002f3e: f44f 4340 mov.w r3, #49152 @ 0xc000
8002f42: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8002f44: 2300 movs r3, #0
8002f46: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002f48: 2300 movs r3, #0
8002f4a: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8002f4c: f107 0310 add.w r3, r7, #16
8002f50: 4619 mov r1, r3
8002f52: 481f ldr r0, [pc, #124] @ (8002fd0 <MX_GPIO_Init+0x148>)
8002f54: f002 fe66 bl 8005c24 <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
8002f58: 2310 movs r3, #16
8002f5a: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8002f5c: 2303 movs r3, #3
8002f5e: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
8002f60: f107 0310 add.w r3, r7, #16
8002f64: 4619 mov r1, r3
8002f66: 481c ldr r0, [pc, #112] @ (8002fd8 <MX_GPIO_Init+0x150>)
8002f68: f002 fe5c bl 8005c24 <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
8002f6c: f640 433e movw r3, #3134 @ 0xc3e
8002f70: 613b str r3, [r7, #16]
|EXP1_Pin|EXP2_Pin|EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8002f72: 2301 movs r3, #1
8002f74: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002f76: 2300 movs r3, #0
8002f78: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002f7a: 2302 movs r3, #2
8002f7c: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8002f7e: f107 0310 add.w r3, r7, #16
8002f82: 4619 mov r1, r3
8002f84: 4813 ldr r0, [pc, #76] @ (8002fd4 <MX_GPIO_Init+0x14c>)
8002f86: f002 fe4d bl 8005c24 <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin;
8002f8a: f44f 4370 mov.w r3, #61440 @ 0xf000
8002f8e: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8002f90: 2300 movs r3, #0
8002f92: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002f94: 2300 movs r3, #0
8002f96: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8002f98: f107 0310 add.w r3, r7, #16
8002f9c: 4619 mov r1, r3
8002f9e: 480d ldr r0, [pc, #52] @ (8002fd4 <MX_GPIO_Init+0x14c>)
8002fa0: f002 fe40 bl 8005c24 <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin;
8002fa4: f44f 4301 mov.w r3, #33024 @ 0x8100
8002fa8: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8002faa: 2301 movs r3, #1
8002fac: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002fae: 2300 movs r3, #0
8002fb0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002fb2: 2302 movs r3, #2
8002fb4: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8002fb6: f107 0310 add.w r3, r7, #16
8002fba: 4619 mov r1, r3
8002fbc: 4806 ldr r0, [pc, #24] @ (8002fd8 <MX_GPIO_Init+0x150>)
8002fbe: f002 fe31 bl 8005c24 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
8002fc2: bf00 nop
8002fc4: 3720 adds r7, #32
8002fc6: 46bd mov sp, r7
8002fc8: bd80 pop {r7, pc}
8002fca: bf00 nop
8002fcc: 40021000 .word 0x40021000
8002fd0: 40011000 .word 0x40011000
8002fd4: 40010c00 .word 0x40010c00
8002fd8: 40010800 .word 0x40010800
08002fdc <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8002fdc: b480 push {r7}
8002fde: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8002fe0: b672 cpsid i
}
8002fe2: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
8002fe4: bf00 nop
8002fe6: e7fd b.n 8002fe4 <Error_Handler+0x8>
08002fe8 <m1ap>:
extern uint16_t mrampstart[4];
extern uint16_t tramp;
extern UART_HandleTypeDef huart1;
motMov_st m1ap(void){
8002fe8: b580 push {r7, lr}
8002fea: b09c sub sp, #112 @ 0x70
8002fec: af02 add r7, sp, #8
static motMov_st m1st=motWaiting;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
8002fee: 4b5d ldr r3, [pc, #372] @ (8003164 <m1ap+0x17c>)
8002ff0: 781a ldrb r2, [r3, #0]
8002ff2: 4b5d ldr r3, [pc, #372] @ (8003168 <m1ap+0x180>)
8002ff4: 781b ldrb r3, [r3, #0]
8002ff6: 429a cmp r2, r3
8002ff8: d017 beq.n 800302a <m1ap+0x42>
memm1st=m1st;
8002ffa: 4b5b ldr r3, [pc, #364] @ (8003168 <m1ap+0x180>)
8002ffc: 781a ldrb r2, [r3, #0]
8002ffe: 4b59 ldr r3, [pc, #356] @ (8003164 <m1ap+0x17c>)
8003000: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ap=%d",m1st);
8003002: 4b59 ldr r3, [pc, #356] @ (8003168 <m1ap+0x180>)
8003004: 781b ldrb r3, [r3, #0]
8003006: 461a mov r2, r3
8003008: 1d3b adds r3, r7, #4
800300a: 4958 ldr r1, [pc, #352] @ (800316c <m1ap+0x184>)
800300c: 4618 mov r0, r3
800300e: f00a fe93 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003012: 1d3b adds r3, r7, #4
8003014: 4618 mov r0, r3
8003016: f7fd f899 bl 800014c <strlen>
800301a: 4603 mov r3, r0
800301c: b29a uxth r2, r3
800301e: 1d39 adds r1, r7, #4
8003020: f04f 33ff mov.w r3, #4294967295
8003024: 4852 ldr r0, [pc, #328] @ (8003170 <m1ap+0x188>)
8003026: f006 f897 bl 8009158 <HAL_UART_Transmit>
}
if(rtCiclo<apM1start)m1st=motWaiting;
800302a: 4b52 ldr r3, [pc, #328] @ (8003174 <m1ap+0x18c>)
800302c: 881b ldrh r3, [r3, #0]
800302e: b29a uxth r2, r3
8003030: 4b51 ldr r3, [pc, #324] @ (8003178 <m1ap+0x190>)
8003032: 881b ldrh r3, [r3, #0]
8003034: 429a cmp r2, r3
8003036: d202 bcs.n 800303e <m1ap+0x56>
8003038: 4b4b ldr r3, [pc, #300] @ (8003168 <m1ap+0x180>)
800303a: 2200 movs r2, #0
800303c: 701a strb r2, [r3, #0]
switch(m1st){
800303e: 4b4a ldr r3, [pc, #296] @ (8003168 <m1ap+0x180>)
8003040: 781b ldrb r3, [r3, #0]
8003042: 2b03 cmp r3, #3
8003044: d876 bhi.n 8003134 <m1ap+0x14c>
8003046: a201 add r2, pc, #4 @ (adr r2, 800304c <m1ap+0x64>)
8003048: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800304c: 0800305d .word 0x0800305d
8003050: 080030a9 .word 0x080030a9
8003054: 080030d9 .word 0x080030d9
8003058: 0800310b .word 0x0800310b
case motWaiting:
SetMotPerc(M1,FW,0);
800305c: 2200 movs r2, #0
800305e: 2100 movs r1, #0
8003060: 2001 movs r0, #1
8003062: f001 f841 bl 80040e8 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003066: 2200 movs r2, #0
8003068: 2101 movs r1, #1
800306a: 2001 movs r0, #1
800306c: f001 f83c bl 80040e8 <SetMotPerc>
if(rtCiclo>=apM1start){
8003070: 4b40 ldr r3, [pc, #256] @ (8003174 <m1ap+0x18c>)
8003072: 881b ldrh r3, [r3, #0]
8003074: b29a uxth r2, r3
8003076: 4b40 ldr r3, [pc, #256] @ (8003178 <m1ap+0x190>)
8003078: 881b ldrh r3, [r3, #0]
800307a: 429a cmp r2, r3
800307c: d365 bcc.n 800314a <m1ap+0x162>
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT);
800307e: 4b3f ldr r3, [pc, #252] @ (800317c <m1ap+0x194>)
8003080: 881b ldrh r3, [r3, #0]
8003082: b2da uxtb r2, r3
8003084: 4b3e ldr r3, [pc, #248] @ (8003180 <m1ap+0x198>)
8003086: 881b ldrh r3, [r3, #0]
8003088: b2d9 uxtb r1, r3
800308a: 4b3e ldr r3, [pc, #248] @ (8003184 <m1ap+0x19c>)
800308c: 881b ldrh r3, [r3, #0]
800308e: b2db uxtb r3, r3
8003090: 2000 movs r0, #0
8003092: 9001 str r0, [sp, #4]
8003094: 9300 str r3, [sp, #0]
8003096: 460b mov r3, r1
8003098: 2101 movs r1, #1
800309a: 2001 movs r0, #1
800309c: f001 f9a4 bl 80043e8 <ramp>
m1st=motStartRamp;
80030a0: 4b31 ldr r3, [pc, #196] @ (8003168 <m1ap+0x180>)
80030a2: 2201 movs r2, #1
80030a4: 701a strb r2, [r3, #0]
}
break;
80030a6: e050 b.n 800314a <m1ap+0x162>
case motStartRamp:
if(ramp(M1,BW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){
80030a8: 4b34 ldr r3, [pc, #208] @ (800317c <m1ap+0x194>)
80030aa: 881b ldrh r3, [r3, #0]
80030ac: b2da uxtb r2, r3
80030ae: 4b34 ldr r3, [pc, #208] @ (8003180 <m1ap+0x198>)
80030b0: 881b ldrh r3, [r3, #0]
80030b2: b2d9 uxtb r1, r3
80030b4: 4b33 ldr r3, [pc, #204] @ (8003184 <m1ap+0x19c>)
80030b6: 881b ldrh r3, [r3, #0]
80030b8: b2db uxtb r3, r3
80030ba: 200a movs r0, #10
80030bc: 9001 str r0, [sp, #4]
80030be: 9300 str r3, [sp, #0]
80030c0: 460b mov r3, r1
80030c2: 2101 movs r1, #1
80030c4: 2001 movs r0, #1
80030c6: f001 f98f bl 80043e8 <ramp>
80030ca: 4603 mov r3, r0
80030cc: 2b00 cmp r3, #0
80030ce: d13e bne.n 800314e <m1ap+0x166>
m1st=motWaitingTime;
80030d0: 4b25 ldr r3, [pc, #148] @ (8003168 <m1ap+0x180>)
80030d2: 2202 movs r2, #2
80030d4: 701a strb r2, [r3, #0]
}
break;
80030d6: e03a b.n 800314e <m1ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM1stop){
80030d8: 4b26 ldr r3, [pc, #152] @ (8003174 <m1ap+0x18c>)
80030da: 881b ldrh r3, [r3, #0]
80030dc: b29a uxth r2, r3
80030de: 4b2a ldr r3, [pc, #168] @ (8003188 <m1ap+0x1a0>)
80030e0: 881b ldrh r3, [r3, #0]
80030e2: 429a cmp r2, r3
80030e4: d335 bcc.n 8003152 <m1ap+0x16a>
(void)ramp(M1,BW,m1pwmap,0,tramp,RAMPINIT);
80030e6: 4b26 ldr r3, [pc, #152] @ (8003180 <m1ap+0x198>)
80030e8: 881b ldrh r3, [r3, #0]
80030ea: b2da uxtb r2, r3
80030ec: 4b25 ldr r3, [pc, #148] @ (8003184 <m1ap+0x19c>)
80030ee: 881b ldrh r3, [r3, #0]
80030f0: b2db uxtb r3, r3
80030f2: 2100 movs r1, #0
80030f4: 9101 str r1, [sp, #4]
80030f6: 9300 str r3, [sp, #0]
80030f8: 2300 movs r3, #0
80030fa: 2101 movs r1, #1
80030fc: 2001 movs r0, #1
80030fe: f001 f973 bl 80043e8 <ramp>
m1st=motStopRamp;
8003102: 4b19 ldr r3, [pc, #100] @ (8003168 <m1ap+0x180>)
8003104: 2203 movs r2, #3
8003106: 701a strb r2, [r3, #0]
}
break;
8003108: e023 b.n 8003152 <m1ap+0x16a>
case motStopRamp:
if(ramp(M1,BW,m1pwmap,0,tramp,RAMPRUN)==DONE){
800310a: 4b1d ldr r3, [pc, #116] @ (8003180 <m1ap+0x198>)
800310c: 881b ldrh r3, [r3, #0]
800310e: b2da uxtb r2, r3
8003110: 4b1c ldr r3, [pc, #112] @ (8003184 <m1ap+0x19c>)
8003112: 881b ldrh r3, [r3, #0]
8003114: b2db uxtb r3, r3
8003116: 210a movs r1, #10
8003118: 9101 str r1, [sp, #4]
800311a: 9300 str r3, [sp, #0]
800311c: 2300 movs r3, #0
800311e: 2101 movs r1, #1
8003120: 2001 movs r0, #1
8003122: f001 f961 bl 80043e8 <ramp>
8003126: 4603 mov r3, r0
8003128: 2b00 cmp r3, #0
800312a: d114 bne.n 8003156 <m1ap+0x16e>
m1st=motStop;
800312c: 4b0e ldr r3, [pc, #56] @ (8003168 <m1ap+0x180>)
800312e: 2204 movs r2, #4
8003130: 701a strb r2, [r3, #0]
}
break;
8003132: e010 b.n 8003156 <m1ap+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
8003134: 2200 movs r2, #0
8003136: 2100 movs r1, #0
8003138: 2001 movs r0, #1
800313a: f000 ffd5 bl 80040e8 <SetMotPerc>
SetMotPerc(M1,BW,0);
800313e: 2200 movs r2, #0
8003140: 2101 movs r1, #1
8003142: 2001 movs r0, #1
8003144: f000 ffd0 bl 80040e8 <SetMotPerc>
break;
8003148: e006 b.n 8003158 <m1ap+0x170>
break;
800314a: bf00 nop
800314c: e004 b.n 8003158 <m1ap+0x170>
break;
800314e: bf00 nop
8003150: e002 b.n 8003158 <m1ap+0x170>
break;
8003152: bf00 nop
8003154: e000 b.n 8003158 <m1ap+0x170>
break;
8003156: bf00 nop
}
return m1st;
8003158: 4b03 ldr r3, [pc, #12] @ (8003168 <m1ap+0x180>)
800315a: 781b ldrb r3, [r3, #0]
}
800315c: 4618 mov r0, r3
800315e: 3768 adds r7, #104 @ 0x68
8003160: 46bd mov sp, r7
8003162: bd80 pop {r7, pc}
8003164: 20000007 .word 0x20000007
8003168: 2000045a .word 0x2000045a
800316c: 0800eab8 .word 0x0800eab8
8003170: 200003a8 .word 0x200003a8
8003174: 200003fc .word 0x200003fc
8003178: 20000424 .word 0x20000424
800317c: 20000444 .word 0x20000444
8003180: 200003fe .word 0x200003fe
8003184: 20000416 .word 0x20000416
8003188: 20000426 .word 0x20000426
0800318c <m2ap>:
motMov_st m2ap(void){
800318c: b580 push {r7, lr}
800318e: b09c sub sp, #112 @ 0x70
8003190: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
8003192: 4b5d ldr r3, [pc, #372] @ (8003308 <m2ap+0x17c>)
8003194: 781a ldrb r2, [r3, #0]
8003196: 4b5d ldr r3, [pc, #372] @ (800330c <m2ap+0x180>)
8003198: 781b ldrb r3, [r3, #0]
800319a: 429a cmp r2, r3
800319c: d017 beq.n 80031ce <m2ap+0x42>
memm2st=m2st;
800319e: 4b5b ldr r3, [pc, #364] @ (800330c <m2ap+0x180>)
80031a0: 781a ldrb r2, [r3, #0]
80031a2: 4b59 ldr r3, [pc, #356] @ (8003308 <m2ap+0x17c>)
80031a4: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ap=%d",m2st);
80031a6: 4b59 ldr r3, [pc, #356] @ (800330c <m2ap+0x180>)
80031a8: 781b ldrb r3, [r3, #0]
80031aa: 461a mov r2, r3
80031ac: 1d3b adds r3, r7, #4
80031ae: 4958 ldr r1, [pc, #352] @ (8003310 <m2ap+0x184>)
80031b0: 4618 mov r0, r3
80031b2: f00a fdc1 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80031b6: 1d3b adds r3, r7, #4
80031b8: 4618 mov r0, r3
80031ba: f7fc ffc7 bl 800014c <strlen>
80031be: 4603 mov r3, r0
80031c0: b29a uxth r2, r3
80031c2: 1d39 adds r1, r7, #4
80031c4: f04f 33ff mov.w r3, #4294967295
80031c8: 4852 ldr r0, [pc, #328] @ (8003314 <m2ap+0x188>)
80031ca: f005 ffc5 bl 8009158 <HAL_UART_Transmit>
}
if(rtCiclo<apM2start)m2st=motWaiting;
80031ce: 4b52 ldr r3, [pc, #328] @ (8003318 <m2ap+0x18c>)
80031d0: 881b ldrh r3, [r3, #0]
80031d2: b29a uxth r2, r3
80031d4: 4b51 ldr r3, [pc, #324] @ (800331c <m2ap+0x190>)
80031d6: 881b ldrh r3, [r3, #0]
80031d8: 429a cmp r2, r3
80031da: d202 bcs.n 80031e2 <m2ap+0x56>
80031dc: 4b4b ldr r3, [pc, #300] @ (800330c <m2ap+0x180>)
80031de: 2200 movs r2, #0
80031e0: 701a strb r2, [r3, #0]
switch(m2st){
80031e2: 4b4a ldr r3, [pc, #296] @ (800330c <m2ap+0x180>)
80031e4: 781b ldrb r3, [r3, #0]
80031e6: 2b03 cmp r3, #3
80031e8: d876 bhi.n 80032d8 <m2ap+0x14c>
80031ea: a201 add r2, pc, #4 @ (adr r2, 80031f0 <m2ap+0x64>)
80031ec: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80031f0: 08003201 .word 0x08003201
80031f4: 0800324d .word 0x0800324d
80031f8: 0800327d .word 0x0800327d
80031fc: 080032af .word 0x080032af
case motWaiting:
SetMotPerc(M2,FW,0);
8003200: 2200 movs r2, #0
8003202: 2100 movs r1, #0
8003204: 2002 movs r0, #2
8003206: f000 ff6f bl 80040e8 <SetMotPerc>
SetMotPerc(M2,BW,0);
800320a: 2200 movs r2, #0
800320c: 2101 movs r1, #1
800320e: 2002 movs r0, #2
8003210: f000 ff6a bl 80040e8 <SetMotPerc>
if(rtCiclo>=apM2start){
8003214: 4b40 ldr r3, [pc, #256] @ (8003318 <m2ap+0x18c>)
8003216: 881b ldrh r3, [r3, #0]
8003218: b29a uxth r2, r3
800321a: 4b40 ldr r3, [pc, #256] @ (800331c <m2ap+0x190>)
800321c: 881b ldrh r3, [r3, #0]
800321e: 429a cmp r2, r3
8003220: d365 bcc.n 80032ee <m2ap+0x162>
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT);
8003222: 4b3f ldr r3, [pc, #252] @ (8003320 <m2ap+0x194>)
8003224: 885b ldrh r3, [r3, #2]
8003226: b2da uxtb r2, r3
8003228: 4b3e ldr r3, [pc, #248] @ (8003324 <m2ap+0x198>)
800322a: 881b ldrh r3, [r3, #0]
800322c: b2d9 uxtb r1, r3
800322e: 4b3e ldr r3, [pc, #248] @ (8003328 <m2ap+0x19c>)
8003230: 881b ldrh r3, [r3, #0]
8003232: b2db uxtb r3, r3
8003234: 2000 movs r0, #0
8003236: 9001 str r0, [sp, #4]
8003238: 9300 str r3, [sp, #0]
800323a: 460b mov r3, r1
800323c: 2101 movs r1, #1
800323e: 2002 movs r0, #2
8003240: f001 f8d2 bl 80043e8 <ramp>
m2st=motStartRamp;
8003244: 4b31 ldr r3, [pc, #196] @ (800330c <m2ap+0x180>)
8003246: 2201 movs r2, #1
8003248: 701a strb r2, [r3, #0]
}
break;
800324a: e050 b.n 80032ee <m2ap+0x162>
case motStartRamp:
if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){
800324c: 4b34 ldr r3, [pc, #208] @ (8003320 <m2ap+0x194>)
800324e: 885b ldrh r3, [r3, #2]
8003250: b2da uxtb r2, r3
8003252: 4b34 ldr r3, [pc, #208] @ (8003324 <m2ap+0x198>)
8003254: 881b ldrh r3, [r3, #0]
8003256: b2d9 uxtb r1, r3
8003258: 4b33 ldr r3, [pc, #204] @ (8003328 <m2ap+0x19c>)
800325a: 881b ldrh r3, [r3, #0]
800325c: b2db uxtb r3, r3
800325e: 200a movs r0, #10
8003260: 9001 str r0, [sp, #4]
8003262: 9300 str r3, [sp, #0]
8003264: 460b mov r3, r1
8003266: 2101 movs r1, #1
8003268: 2002 movs r0, #2
800326a: f001 f8bd bl 80043e8 <ramp>
800326e: 4603 mov r3, r0
8003270: 2b00 cmp r3, #0
8003272: d13e bne.n 80032f2 <m2ap+0x166>
m2st=motWaitingTime;
8003274: 4b25 ldr r3, [pc, #148] @ (800330c <m2ap+0x180>)
8003276: 2202 movs r2, #2
8003278: 701a strb r2, [r3, #0]
}
break;
800327a: e03a b.n 80032f2 <m2ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM2stop){
800327c: 4b26 ldr r3, [pc, #152] @ (8003318 <m2ap+0x18c>)
800327e: 881b ldrh r3, [r3, #0]
8003280: b29a uxth r2, r3
8003282: 4b2a ldr r3, [pc, #168] @ (800332c <m2ap+0x1a0>)
8003284: 881b ldrh r3, [r3, #0]
8003286: 429a cmp r2, r3
8003288: d335 bcc.n 80032f6 <m2ap+0x16a>
(void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT);
800328a: 4b26 ldr r3, [pc, #152] @ (8003324 <m2ap+0x198>)
800328c: 881b ldrh r3, [r3, #0]
800328e: b2da uxtb r2, r3
8003290: 4b25 ldr r3, [pc, #148] @ (8003328 <m2ap+0x19c>)
8003292: 881b ldrh r3, [r3, #0]
8003294: b2db uxtb r3, r3
8003296: 2100 movs r1, #0
8003298: 9101 str r1, [sp, #4]
800329a: 9300 str r3, [sp, #0]
800329c: 2300 movs r3, #0
800329e: 2101 movs r1, #1
80032a0: 2002 movs r0, #2
80032a2: f001 f8a1 bl 80043e8 <ramp>
m2st=motStopRamp;
80032a6: 4b19 ldr r3, [pc, #100] @ (800330c <m2ap+0x180>)
80032a8: 2203 movs r2, #3
80032aa: 701a strb r2, [r3, #0]
}
break;
80032ac: e023 b.n 80032f6 <m2ap+0x16a>
case motStopRamp:
if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){
80032ae: 4b1d ldr r3, [pc, #116] @ (8003324 <m2ap+0x198>)
80032b0: 881b ldrh r3, [r3, #0]
80032b2: b2da uxtb r2, r3
80032b4: 4b1c ldr r3, [pc, #112] @ (8003328 <m2ap+0x19c>)
80032b6: 881b ldrh r3, [r3, #0]
80032b8: b2db uxtb r3, r3
80032ba: 210a movs r1, #10
80032bc: 9101 str r1, [sp, #4]
80032be: 9300 str r3, [sp, #0]
80032c0: 2300 movs r3, #0
80032c2: 2101 movs r1, #1
80032c4: 2002 movs r0, #2
80032c6: f001 f88f bl 80043e8 <ramp>
80032ca: 4603 mov r3, r0
80032cc: 2b00 cmp r3, #0
80032ce: d114 bne.n 80032fa <m2ap+0x16e>
m2st=motStop;
80032d0: 4b0e ldr r3, [pc, #56] @ (800330c <m2ap+0x180>)
80032d2: 2204 movs r2, #4
80032d4: 701a strb r2, [r3, #0]
}
break;
80032d6: e010 b.n 80032fa <m2ap+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
80032d8: 2200 movs r2, #0
80032da: 2100 movs r1, #0
80032dc: 2002 movs r0, #2
80032de: f000 ff03 bl 80040e8 <SetMotPerc>
SetMotPerc(M2,BW,0);
80032e2: 2200 movs r2, #0
80032e4: 2101 movs r1, #1
80032e6: 2002 movs r0, #2
80032e8: f000 fefe bl 80040e8 <SetMotPerc>
break;
80032ec: e006 b.n 80032fc <m2ap+0x170>
break;
80032ee: bf00 nop
80032f0: e004 b.n 80032fc <m2ap+0x170>
break;
80032f2: bf00 nop
80032f4: e002 b.n 80032fc <m2ap+0x170>
break;
80032f6: bf00 nop
80032f8: e000 b.n 80032fc <m2ap+0x170>
break;
80032fa: bf00 nop
}
return m2st;
80032fc: 4b03 ldr r3, [pc, #12] @ (800330c <m2ap+0x180>)
80032fe: 781b ldrb r3, [r3, #0]
}
8003300: 4618 mov r0, r3
8003302: 3768 adds r7, #104 @ 0x68
8003304: 46bd mov sp, r7
8003306: bd80 pop {r7, pc}
8003308: 20000008 .word 0x20000008
800330c: 2000045b .word 0x2000045b
8003310: 0800eac4 .word 0x0800eac4
8003314: 200003a8 .word 0x200003a8
8003318: 200003fc .word 0x200003fc
800331c: 20000428 .word 0x20000428
8003320: 20000444 .word 0x20000444
8003324: 20000402 .word 0x20000402
8003328: 20000416 .word 0x20000416
800332c: 2000042a .word 0x2000042a
08003330 <m3ap>:
motMov_st m3ap(void){
8003330: b580 push {r7, lr}
8003332: b09c sub sp, #112 @ 0x70
8003334: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
8003336: 4b5d ldr r3, [pc, #372] @ (80034ac <m3ap+0x17c>)
8003338: 781a ldrb r2, [r3, #0]
800333a: 4b5d ldr r3, [pc, #372] @ (80034b0 <m3ap+0x180>)
800333c: 781b ldrb r3, [r3, #0]
800333e: 429a cmp r2, r3
8003340: d017 beq.n 8003372 <m3ap+0x42>
memm3st=m3st;
8003342: 4b5b ldr r3, [pc, #364] @ (80034b0 <m3ap+0x180>)
8003344: 781a ldrb r2, [r3, #0]
8003346: 4b59 ldr r3, [pc, #356] @ (80034ac <m3ap+0x17c>)
8003348: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ap=%d",m3st);
800334a: 4b59 ldr r3, [pc, #356] @ (80034b0 <m3ap+0x180>)
800334c: 781b ldrb r3, [r3, #0]
800334e: 461a mov r2, r3
8003350: 1d3b adds r3, r7, #4
8003352: 4958 ldr r1, [pc, #352] @ (80034b4 <m3ap+0x184>)
8003354: 4618 mov r0, r3
8003356: f00a fcef bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800335a: 1d3b adds r3, r7, #4
800335c: 4618 mov r0, r3
800335e: f7fc fef5 bl 800014c <strlen>
8003362: 4603 mov r3, r0
8003364: b29a uxth r2, r3
8003366: 1d39 adds r1, r7, #4
8003368: f04f 33ff mov.w r3, #4294967295
800336c: 4852 ldr r0, [pc, #328] @ (80034b8 <m3ap+0x188>)
800336e: f005 fef3 bl 8009158 <HAL_UART_Transmit>
}
if(rtCiclo<apM3start)m3st=motWaiting;
8003372: 4b52 ldr r3, [pc, #328] @ (80034bc <m3ap+0x18c>)
8003374: 881b ldrh r3, [r3, #0]
8003376: b29a uxth r2, r3
8003378: 4b51 ldr r3, [pc, #324] @ (80034c0 <m3ap+0x190>)
800337a: 881b ldrh r3, [r3, #0]
800337c: 429a cmp r2, r3
800337e: d202 bcs.n 8003386 <m3ap+0x56>
8003380: 4b4b ldr r3, [pc, #300] @ (80034b0 <m3ap+0x180>)
8003382: 2200 movs r2, #0
8003384: 701a strb r2, [r3, #0]
switch(m3st){
8003386: 4b4a ldr r3, [pc, #296] @ (80034b0 <m3ap+0x180>)
8003388: 781b ldrb r3, [r3, #0]
800338a: 2b03 cmp r3, #3
800338c: d876 bhi.n 800347c <m3ap+0x14c>
800338e: a201 add r2, pc, #4 @ (adr r2, 8003394 <m3ap+0x64>)
8003390: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003394: 080033a5 .word 0x080033a5
8003398: 080033f1 .word 0x080033f1
800339c: 08003421 .word 0x08003421
80033a0: 08003453 .word 0x08003453
case motWaiting:
SetMotPerc(M3,FW,0);
80033a4: 2200 movs r2, #0
80033a6: 2100 movs r1, #0
80033a8: 2003 movs r0, #3
80033aa: f000 fe9d bl 80040e8 <SetMotPerc>
SetMotPerc(M3,BW,0);
80033ae: 2200 movs r2, #0
80033b0: 2101 movs r1, #1
80033b2: 2003 movs r0, #3
80033b4: f000 fe98 bl 80040e8 <SetMotPerc>
if(rtCiclo>=apM3start){
80033b8: 4b40 ldr r3, [pc, #256] @ (80034bc <m3ap+0x18c>)
80033ba: 881b ldrh r3, [r3, #0]
80033bc: b29a uxth r2, r3
80033be: 4b40 ldr r3, [pc, #256] @ (80034c0 <m3ap+0x190>)
80033c0: 881b ldrh r3, [r3, #0]
80033c2: 429a cmp r2, r3
80033c4: d365 bcc.n 8003492 <m3ap+0x162>
(void)ramp(M3,BW,mrampstart[M3-1],m2pwmap,tramp,RAMPINIT);
80033c6: 4b3f ldr r3, [pc, #252] @ (80034c4 <m3ap+0x194>)
80033c8: 889b ldrh r3, [r3, #4]
80033ca: b2da uxtb r2, r3
80033cc: 4b3e ldr r3, [pc, #248] @ (80034c8 <m3ap+0x198>)
80033ce: 881b ldrh r3, [r3, #0]
80033d0: b2d9 uxtb r1, r3
80033d2: 4b3e ldr r3, [pc, #248] @ (80034cc <m3ap+0x19c>)
80033d4: 881b ldrh r3, [r3, #0]
80033d6: b2db uxtb r3, r3
80033d8: 2000 movs r0, #0
80033da: 9001 str r0, [sp, #4]
80033dc: 9300 str r3, [sp, #0]
80033de: 460b mov r3, r1
80033e0: 2101 movs r1, #1
80033e2: 2003 movs r0, #3
80033e4: f001 f800 bl 80043e8 <ramp>
m3st=motStartRamp;
80033e8: 4b31 ldr r3, [pc, #196] @ (80034b0 <m3ap+0x180>)
80033ea: 2201 movs r2, #1
80033ec: 701a strb r2, [r3, #0]
}
break;
80033ee: e050 b.n 8003492 <m3ap+0x162>
case motStartRamp:
if(ramp(M3,BW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){
80033f0: 4b34 ldr r3, [pc, #208] @ (80034c4 <m3ap+0x194>)
80033f2: 889b ldrh r3, [r3, #4]
80033f4: b2da uxtb r2, r3
80033f6: 4b36 ldr r3, [pc, #216] @ (80034d0 <m3ap+0x1a0>)
80033f8: 881b ldrh r3, [r3, #0]
80033fa: b2d9 uxtb r1, r3
80033fc: 4b33 ldr r3, [pc, #204] @ (80034cc <m3ap+0x19c>)
80033fe: 881b ldrh r3, [r3, #0]
8003400: b2db uxtb r3, r3
8003402: 200a movs r0, #10
8003404: 9001 str r0, [sp, #4]
8003406: 9300 str r3, [sp, #0]
8003408: 460b mov r3, r1
800340a: 2101 movs r1, #1
800340c: 2003 movs r0, #3
800340e: f000 ffeb bl 80043e8 <ramp>
8003412: 4603 mov r3, r0
8003414: 2b00 cmp r3, #0
8003416: d13e bne.n 8003496 <m3ap+0x166>
m3st=motWaitingTime;
8003418: 4b25 ldr r3, [pc, #148] @ (80034b0 <m3ap+0x180>)
800341a: 2202 movs r2, #2
800341c: 701a strb r2, [r3, #0]
}
break;
800341e: e03a b.n 8003496 <m3ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM3stop){
8003420: 4b26 ldr r3, [pc, #152] @ (80034bc <m3ap+0x18c>)
8003422: 881b ldrh r3, [r3, #0]
8003424: b29a uxth r2, r3
8003426: 4b2b ldr r3, [pc, #172] @ (80034d4 <m3ap+0x1a4>)
8003428: 881b ldrh r3, [r3, #0]
800342a: 429a cmp r2, r3
800342c: d335 bcc.n 800349a <m3ap+0x16a>
(void)ramp(M3,BW,m3pwmap,0,tramp,RAMPINIT);
800342e: 4b28 ldr r3, [pc, #160] @ (80034d0 <m3ap+0x1a0>)
8003430: 881b ldrh r3, [r3, #0]
8003432: b2da uxtb r2, r3
8003434: 4b25 ldr r3, [pc, #148] @ (80034cc <m3ap+0x19c>)
8003436: 881b ldrh r3, [r3, #0]
8003438: b2db uxtb r3, r3
800343a: 2100 movs r1, #0
800343c: 9101 str r1, [sp, #4]
800343e: 9300 str r3, [sp, #0]
8003440: 2300 movs r3, #0
8003442: 2101 movs r1, #1
8003444: 2003 movs r0, #3
8003446: f000 ffcf bl 80043e8 <ramp>
m3st=motStopRamp;
800344a: 4b19 ldr r3, [pc, #100] @ (80034b0 <m3ap+0x180>)
800344c: 2203 movs r2, #3
800344e: 701a strb r2, [r3, #0]
}
break;
8003450: e023 b.n 800349a <m3ap+0x16a>
case motStopRamp:
if(ramp(M3,BW,m3pwmap,0,tramp,RAMPRUN)==DONE){
8003452: 4b1f ldr r3, [pc, #124] @ (80034d0 <m3ap+0x1a0>)
8003454: 881b ldrh r3, [r3, #0]
8003456: b2da uxtb r2, r3
8003458: 4b1c ldr r3, [pc, #112] @ (80034cc <m3ap+0x19c>)
800345a: 881b ldrh r3, [r3, #0]
800345c: b2db uxtb r3, r3
800345e: 210a movs r1, #10
8003460: 9101 str r1, [sp, #4]
8003462: 9300 str r3, [sp, #0]
8003464: 2300 movs r3, #0
8003466: 2101 movs r1, #1
8003468: 2003 movs r0, #3
800346a: f000 ffbd bl 80043e8 <ramp>
800346e: 4603 mov r3, r0
8003470: 2b00 cmp r3, #0
8003472: d114 bne.n 800349e <m3ap+0x16e>
m3st=motStop;
8003474: 4b0e ldr r3, [pc, #56] @ (80034b0 <m3ap+0x180>)
8003476: 2204 movs r2, #4
8003478: 701a strb r2, [r3, #0]
}
break;
800347a: e010 b.n 800349e <m3ap+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
800347c: 2200 movs r2, #0
800347e: 2100 movs r1, #0
8003480: 2003 movs r0, #3
8003482: f000 fe31 bl 80040e8 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003486: 2200 movs r2, #0
8003488: 2101 movs r1, #1
800348a: 2003 movs r0, #3
800348c: f000 fe2c bl 80040e8 <SetMotPerc>
break;
8003490: e006 b.n 80034a0 <m3ap+0x170>
break;
8003492: bf00 nop
8003494: e004 b.n 80034a0 <m3ap+0x170>
break;
8003496: bf00 nop
8003498: e002 b.n 80034a0 <m3ap+0x170>
break;
800349a: bf00 nop
800349c: e000 b.n 80034a0 <m3ap+0x170>
break;
800349e: bf00 nop
}
return m3st;
80034a0: 4b03 ldr r3, [pc, #12] @ (80034b0 <m3ap+0x180>)
80034a2: 781b ldrb r3, [r3, #0]
}
80034a4: 4618 mov r0, r3
80034a6: 3768 adds r7, #104 @ 0x68
80034a8: 46bd mov sp, r7
80034aa: bd80 pop {r7, pc}
80034ac: 20000009 .word 0x20000009
80034b0: 2000045c .word 0x2000045c
80034b4: 0800ead0 .word 0x0800ead0
80034b8: 200003a8 .word 0x200003a8
80034bc: 200003fc .word 0x200003fc
80034c0: 2000042c .word 0x2000042c
80034c4: 20000444 .word 0x20000444
80034c8: 20000402 .word 0x20000402
80034cc: 20000416 .word 0x20000416
80034d0: 20000406 .word 0x20000406
80034d4: 2000042e .word 0x2000042e
080034d8 <m4ap>:
motMov_st m4ap(void){
80034d8: b580 push {r7, lr}
80034da: b09c sub sp, #112 @ 0x70
80034dc: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
80034de: 4b5d ldr r3, [pc, #372] @ (8003654 <m4ap+0x17c>)
80034e0: 781a ldrb r2, [r3, #0]
80034e2: 4b5d ldr r3, [pc, #372] @ (8003658 <m4ap+0x180>)
80034e4: 781b ldrb r3, [r3, #0]
80034e6: 429a cmp r2, r3
80034e8: d017 beq.n 800351a <m4ap+0x42>
memm4st=m4st;
80034ea: 4b5b ldr r3, [pc, #364] @ (8003658 <m4ap+0x180>)
80034ec: 781a ldrb r2, [r3, #0]
80034ee: 4b59 ldr r3, [pc, #356] @ (8003654 <m4ap+0x17c>)
80034f0: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ap=%d",m4st);
80034f2: 4b59 ldr r3, [pc, #356] @ (8003658 <m4ap+0x180>)
80034f4: 781b ldrb r3, [r3, #0]
80034f6: 461a mov r2, r3
80034f8: 1d3b adds r3, r7, #4
80034fa: 4958 ldr r1, [pc, #352] @ (800365c <m4ap+0x184>)
80034fc: 4618 mov r0, r3
80034fe: f00a fc1b bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003502: 1d3b adds r3, r7, #4
8003504: 4618 mov r0, r3
8003506: f7fc fe21 bl 800014c <strlen>
800350a: 4603 mov r3, r0
800350c: b29a uxth r2, r3
800350e: 1d39 adds r1, r7, #4
8003510: f04f 33ff mov.w r3, #4294967295
8003514: 4852 ldr r0, [pc, #328] @ (8003660 <m4ap+0x188>)
8003516: f005 fe1f bl 8009158 <HAL_UART_Transmit>
}
if(rtCiclo<apM4start)m4st=motWaiting;
800351a: 4b52 ldr r3, [pc, #328] @ (8003664 <m4ap+0x18c>)
800351c: 881b ldrh r3, [r3, #0]
800351e: b29a uxth r2, r3
8003520: 4b51 ldr r3, [pc, #324] @ (8003668 <m4ap+0x190>)
8003522: 881b ldrh r3, [r3, #0]
8003524: 429a cmp r2, r3
8003526: d202 bcs.n 800352e <m4ap+0x56>
8003528: 4b4b ldr r3, [pc, #300] @ (8003658 <m4ap+0x180>)
800352a: 2200 movs r2, #0
800352c: 701a strb r2, [r3, #0]
switch(m4st){
800352e: 4b4a ldr r3, [pc, #296] @ (8003658 <m4ap+0x180>)
8003530: 781b ldrb r3, [r3, #0]
8003532: 2b03 cmp r3, #3
8003534: d876 bhi.n 8003624 <m4ap+0x14c>
8003536: a201 add r2, pc, #4 @ (adr r2, 800353c <m4ap+0x64>)
8003538: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800353c: 0800354d .word 0x0800354d
8003540: 08003599 .word 0x08003599
8003544: 080035c9 .word 0x080035c9
8003548: 080035fb .word 0x080035fb
case motWaiting:
SetMotPerc(M4,FW,0);
800354c: 2200 movs r2, #0
800354e: 2100 movs r1, #0
8003550: 2004 movs r0, #4
8003552: f000 fdc9 bl 80040e8 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003556: 2200 movs r2, #0
8003558: 2101 movs r1, #1
800355a: 2004 movs r0, #4
800355c: f000 fdc4 bl 80040e8 <SetMotPerc>
if(rtCiclo>=apM4start){
8003560: 4b40 ldr r3, [pc, #256] @ (8003664 <m4ap+0x18c>)
8003562: 881b ldrh r3, [r3, #0]
8003564: b29a uxth r2, r3
8003566: 4b40 ldr r3, [pc, #256] @ (8003668 <m4ap+0x190>)
8003568: 881b ldrh r3, [r3, #0]
800356a: 429a cmp r2, r3
800356c: d365 bcc.n 800363a <m4ap+0x162>
(void)ramp(M4,BW,mrampstart[M4-1],m2pwmap,tramp,RAMPINIT);
800356e: 4b3f ldr r3, [pc, #252] @ (800366c <m4ap+0x194>)
8003570: 88db ldrh r3, [r3, #6]
8003572: b2da uxtb r2, r3
8003574: 4b3e ldr r3, [pc, #248] @ (8003670 <m4ap+0x198>)
8003576: 881b ldrh r3, [r3, #0]
8003578: b2d9 uxtb r1, r3
800357a: 4b3e ldr r3, [pc, #248] @ (8003674 <m4ap+0x19c>)
800357c: 881b ldrh r3, [r3, #0]
800357e: b2db uxtb r3, r3
8003580: 2000 movs r0, #0
8003582: 9001 str r0, [sp, #4]
8003584: 9300 str r3, [sp, #0]
8003586: 460b mov r3, r1
8003588: 2101 movs r1, #1
800358a: 2004 movs r0, #4
800358c: f000 ff2c bl 80043e8 <ramp>
m4st=motStartRamp;
8003590: 4b31 ldr r3, [pc, #196] @ (8003658 <m4ap+0x180>)
8003592: 2201 movs r2, #1
8003594: 701a strb r2, [r3, #0]
}
break;
8003596: e050 b.n 800363a <m4ap+0x162>
case motStartRamp:
if(ramp(M4,BW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){
8003598: 4b34 ldr r3, [pc, #208] @ (800366c <m4ap+0x194>)
800359a: 88db ldrh r3, [r3, #6]
800359c: b2da uxtb r2, r3
800359e: 4b36 ldr r3, [pc, #216] @ (8003678 <m4ap+0x1a0>)
80035a0: 881b ldrh r3, [r3, #0]
80035a2: b2d9 uxtb r1, r3
80035a4: 4b33 ldr r3, [pc, #204] @ (8003674 <m4ap+0x19c>)
80035a6: 881b ldrh r3, [r3, #0]
80035a8: b2db uxtb r3, r3
80035aa: 200a movs r0, #10
80035ac: 9001 str r0, [sp, #4]
80035ae: 9300 str r3, [sp, #0]
80035b0: 460b mov r3, r1
80035b2: 2101 movs r1, #1
80035b4: 2004 movs r0, #4
80035b6: f000 ff17 bl 80043e8 <ramp>
80035ba: 4603 mov r3, r0
80035bc: 2b00 cmp r3, #0
80035be: d13e bne.n 800363e <m4ap+0x166>
m4st=motWaitingTime;
80035c0: 4b25 ldr r3, [pc, #148] @ (8003658 <m4ap+0x180>)
80035c2: 2202 movs r2, #2
80035c4: 701a strb r2, [r3, #0]
}
break;
80035c6: e03a b.n 800363e <m4ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM4stop){
80035c8: 4b26 ldr r3, [pc, #152] @ (8003664 <m4ap+0x18c>)
80035ca: 881b ldrh r3, [r3, #0]
80035cc: b29a uxth r2, r3
80035ce: 4b2b ldr r3, [pc, #172] @ (800367c <m4ap+0x1a4>)
80035d0: 881b ldrh r3, [r3, #0]
80035d2: 429a cmp r2, r3
80035d4: d335 bcc.n 8003642 <m4ap+0x16a>
(void)ramp(M4,BW,m4pwmap,0,tramp,RAMPINIT);
80035d6: 4b28 ldr r3, [pc, #160] @ (8003678 <m4ap+0x1a0>)
80035d8: 881b ldrh r3, [r3, #0]
80035da: b2da uxtb r2, r3
80035dc: 4b25 ldr r3, [pc, #148] @ (8003674 <m4ap+0x19c>)
80035de: 881b ldrh r3, [r3, #0]
80035e0: b2db uxtb r3, r3
80035e2: 2100 movs r1, #0
80035e4: 9101 str r1, [sp, #4]
80035e6: 9300 str r3, [sp, #0]
80035e8: 2300 movs r3, #0
80035ea: 2101 movs r1, #1
80035ec: 2004 movs r0, #4
80035ee: f000 fefb bl 80043e8 <ramp>
m4st=motStopRamp;
80035f2: 4b19 ldr r3, [pc, #100] @ (8003658 <m4ap+0x180>)
80035f4: 2203 movs r2, #3
80035f6: 701a strb r2, [r3, #0]
}
break;
80035f8: e023 b.n 8003642 <m4ap+0x16a>
case motStopRamp:
if(ramp(M4,BW,m4pwmap,0,tramp,RAMPRUN)==DONE){
80035fa: 4b1f ldr r3, [pc, #124] @ (8003678 <m4ap+0x1a0>)
80035fc: 881b ldrh r3, [r3, #0]
80035fe: b2da uxtb r2, r3
8003600: 4b1c ldr r3, [pc, #112] @ (8003674 <m4ap+0x19c>)
8003602: 881b ldrh r3, [r3, #0]
8003604: b2db uxtb r3, r3
8003606: 210a movs r1, #10
8003608: 9101 str r1, [sp, #4]
800360a: 9300 str r3, [sp, #0]
800360c: 2300 movs r3, #0
800360e: 2101 movs r1, #1
8003610: 2004 movs r0, #4
8003612: f000 fee9 bl 80043e8 <ramp>
8003616: 4603 mov r3, r0
8003618: 2b00 cmp r3, #0
800361a: d114 bne.n 8003646 <m4ap+0x16e>
m4st=motStop;
800361c: 4b0e ldr r3, [pc, #56] @ (8003658 <m4ap+0x180>)
800361e: 2204 movs r2, #4
8003620: 701a strb r2, [r3, #0]
}
break;
8003622: e010 b.n 8003646 <m4ap+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8003624: 2200 movs r2, #0
8003626: 2100 movs r1, #0
8003628: 2004 movs r0, #4
800362a: f000 fd5d bl 80040e8 <SetMotPerc>
SetMotPerc(M4,BW,0);
800362e: 2200 movs r2, #0
8003630: 2101 movs r1, #1
8003632: 2004 movs r0, #4
8003634: f000 fd58 bl 80040e8 <SetMotPerc>
break;
8003638: e006 b.n 8003648 <m4ap+0x170>
break;
800363a: bf00 nop
800363c: e004 b.n 8003648 <m4ap+0x170>
break;
800363e: bf00 nop
8003640: e002 b.n 8003648 <m4ap+0x170>
break;
8003642: bf00 nop
8003644: e000 b.n 8003648 <m4ap+0x170>
break;
8003646: bf00 nop
}
return m4st;
8003648: 4b03 ldr r3, [pc, #12] @ (8003658 <m4ap+0x180>)
800364a: 781b ldrb r3, [r3, #0]
}
800364c: 4618 mov r0, r3
800364e: 3768 adds r7, #104 @ 0x68
8003650: 46bd mov sp, r7
8003652: bd80 pop {r7, pc}
8003654: 2000000a .word 0x2000000a
8003658: 2000045d .word 0x2000045d
800365c: 0800eadc .word 0x0800eadc
8003660: 200003a8 .word 0x200003a8
8003664: 200003fc .word 0x200003fc
8003668: 20000430 .word 0x20000430
800366c: 20000444 .word 0x20000444
8003670: 20000402 .word 0x20000402
8003674: 20000416 .word 0x20000416
8003678: 2000040a .word 0x2000040a
800367c: 20000432 .word 0x20000432
08003680 <m1ch>:
motMov_st m1ch(void){
8003680: b580 push {r7, lr}
8003682: b09c sub sp, #112 @ 0x70
8003684: af02 add r7, sp, #8
static motMov_st m1st;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
8003686: 4b5d ldr r3, [pc, #372] @ (80037fc <m1ch+0x17c>)
8003688: 781a ldrb r2, [r3, #0]
800368a: 4b5d ldr r3, [pc, #372] @ (8003800 <m1ch+0x180>)
800368c: 781b ldrb r3, [r3, #0]
800368e: 429a cmp r2, r3
8003690: d017 beq.n 80036c2 <m1ch+0x42>
memm1st=m1st;
8003692: 4b5b ldr r3, [pc, #364] @ (8003800 <m1ch+0x180>)
8003694: 781a ldrb r2, [r3, #0]
8003696: 4b59 ldr r3, [pc, #356] @ (80037fc <m1ch+0x17c>)
8003698: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ch=%d",m1st);
800369a: 4b59 ldr r3, [pc, #356] @ (8003800 <m1ch+0x180>)
800369c: 781b ldrb r3, [r3, #0]
800369e: 461a mov r2, r3
80036a0: 1d3b adds r3, r7, #4
80036a2: 4958 ldr r1, [pc, #352] @ (8003804 <m1ch+0x184>)
80036a4: 4618 mov r0, r3
80036a6: f00a fb47 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80036aa: 1d3b adds r3, r7, #4
80036ac: 4618 mov r0, r3
80036ae: f7fc fd4d bl 800014c <strlen>
80036b2: 4603 mov r3, r0
80036b4: b29a uxth r2, r3
80036b6: 1d39 adds r1, r7, #4
80036b8: f04f 33ff mov.w r3, #4294967295
80036bc: 4852 ldr r0, [pc, #328] @ (8003808 <m1ch+0x188>)
80036be: f005 fd4b bl 8009158 <HAL_UART_Transmit>
}
if(rtCiclo<chM1start)m1st=motWaiting;
80036c2: 4b52 ldr r3, [pc, #328] @ (800380c <m1ch+0x18c>)
80036c4: 881b ldrh r3, [r3, #0]
80036c6: b29a uxth r2, r3
80036c8: 4b51 ldr r3, [pc, #324] @ (8003810 <m1ch+0x190>)
80036ca: 881b ldrh r3, [r3, #0]
80036cc: 429a cmp r2, r3
80036ce: d202 bcs.n 80036d6 <m1ch+0x56>
80036d0: 4b4b ldr r3, [pc, #300] @ (8003800 <m1ch+0x180>)
80036d2: 2200 movs r2, #0
80036d4: 701a strb r2, [r3, #0]
switch(m1st){
80036d6: 4b4a ldr r3, [pc, #296] @ (8003800 <m1ch+0x180>)
80036d8: 781b ldrb r3, [r3, #0]
80036da: 2b03 cmp r3, #3
80036dc: d876 bhi.n 80037cc <m1ch+0x14c>
80036de: a201 add r2, pc, #4 @ (adr r2, 80036e4 <m1ch+0x64>)
80036e0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80036e4: 080036f5 .word 0x080036f5
80036e8: 08003741 .word 0x08003741
80036ec: 08003771 .word 0x08003771
80036f0: 080037a3 .word 0x080037a3
case motWaiting:
SetMotPerc(M1,FW,0);
80036f4: 2200 movs r2, #0
80036f6: 2100 movs r1, #0
80036f8: 2001 movs r0, #1
80036fa: f000 fcf5 bl 80040e8 <SetMotPerc>
SetMotPerc(M1,BW,0);
80036fe: 2200 movs r2, #0
8003700: 2101 movs r1, #1
8003702: 2001 movs r0, #1
8003704: f000 fcf0 bl 80040e8 <SetMotPerc>
if(rtCiclo>=chM1start){
8003708: 4b40 ldr r3, [pc, #256] @ (800380c <m1ch+0x18c>)
800370a: 881b ldrh r3, [r3, #0]
800370c: b29a uxth r2, r3
800370e: 4b40 ldr r3, [pc, #256] @ (8003810 <m1ch+0x190>)
8003710: 881b ldrh r3, [r3, #0]
8003712: 429a cmp r2, r3
8003714: d365 bcc.n 80037e2 <m1ch+0x162>
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
8003716: 4b3f ldr r3, [pc, #252] @ (8003814 <m1ch+0x194>)
8003718: 881b ldrh r3, [r3, #0]
800371a: b2da uxtb r2, r3
800371c: 4b3e ldr r3, [pc, #248] @ (8003818 <m1ch+0x198>)
800371e: 881b ldrh r3, [r3, #0]
8003720: b2d9 uxtb r1, r3
8003722: 4b3e ldr r3, [pc, #248] @ (800381c <m1ch+0x19c>)
8003724: 881b ldrh r3, [r3, #0]
8003726: b2db uxtb r3, r3
8003728: 2000 movs r0, #0
800372a: 9001 str r0, [sp, #4]
800372c: 9300 str r3, [sp, #0]
800372e: 460b mov r3, r1
8003730: 2100 movs r1, #0
8003732: 2001 movs r0, #1
8003734: f000 fe58 bl 80043e8 <ramp>
m1st=motStartRamp;
8003738: 4b31 ldr r3, [pc, #196] @ (8003800 <m1ch+0x180>)
800373a: 2201 movs r2, #1
800373c: 701a strb r2, [r3, #0]
}
break;
800373e: e050 b.n 80037e2 <m1ch+0x162>
case motStartRamp:
if(ramp(M1,FW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){
8003740: 4b34 ldr r3, [pc, #208] @ (8003814 <m1ch+0x194>)
8003742: 881b ldrh r3, [r3, #0]
8003744: b2da uxtb r2, r3
8003746: 4b34 ldr r3, [pc, #208] @ (8003818 <m1ch+0x198>)
8003748: 881b ldrh r3, [r3, #0]
800374a: b2d9 uxtb r1, r3
800374c: 4b33 ldr r3, [pc, #204] @ (800381c <m1ch+0x19c>)
800374e: 881b ldrh r3, [r3, #0]
8003750: b2db uxtb r3, r3
8003752: 200a movs r0, #10
8003754: 9001 str r0, [sp, #4]
8003756: 9300 str r3, [sp, #0]
8003758: 460b mov r3, r1
800375a: 2100 movs r1, #0
800375c: 2001 movs r0, #1
800375e: f000 fe43 bl 80043e8 <ramp>
8003762: 4603 mov r3, r0
8003764: 2b00 cmp r3, #0
8003766: d13e bne.n 80037e6 <m1ch+0x166>
m1st=motWaitingTime;
8003768: 4b25 ldr r3, [pc, #148] @ (8003800 <m1ch+0x180>)
800376a: 2202 movs r2, #2
800376c: 701a strb r2, [r3, #0]
}
break;
800376e: e03a b.n 80037e6 <m1ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM1stop){
8003770: 4b26 ldr r3, [pc, #152] @ (800380c <m1ch+0x18c>)
8003772: 881b ldrh r3, [r3, #0]
8003774: b29a uxth r2, r3
8003776: 4b2a ldr r3, [pc, #168] @ (8003820 <m1ch+0x1a0>)
8003778: 881b ldrh r3, [r3, #0]
800377a: 429a cmp r2, r3
800377c: d335 bcc.n 80037ea <m1ch+0x16a>
(void)ramp(M1,FW,m1pwmch,0,tramp,RAMPINIT);
800377e: 4b26 ldr r3, [pc, #152] @ (8003818 <m1ch+0x198>)
8003780: 881b ldrh r3, [r3, #0]
8003782: b2da uxtb r2, r3
8003784: 4b25 ldr r3, [pc, #148] @ (800381c <m1ch+0x19c>)
8003786: 881b ldrh r3, [r3, #0]
8003788: b2db uxtb r3, r3
800378a: 2100 movs r1, #0
800378c: 9101 str r1, [sp, #4]
800378e: 9300 str r3, [sp, #0]
8003790: 2300 movs r3, #0
8003792: 2100 movs r1, #0
8003794: 2001 movs r0, #1
8003796: f000 fe27 bl 80043e8 <ramp>
m1st=motStopRamp;
800379a: 4b19 ldr r3, [pc, #100] @ (8003800 <m1ch+0x180>)
800379c: 2203 movs r2, #3
800379e: 701a strb r2, [r3, #0]
}
break;
80037a0: e023 b.n 80037ea <m1ch+0x16a>
case motStopRamp:
if(ramp(M1,FW,m1pwmch,0,tramp,RAMPRUN)==DONE){
80037a2: 4b1d ldr r3, [pc, #116] @ (8003818 <m1ch+0x198>)
80037a4: 881b ldrh r3, [r3, #0]
80037a6: b2da uxtb r2, r3
80037a8: 4b1c ldr r3, [pc, #112] @ (800381c <m1ch+0x19c>)
80037aa: 881b ldrh r3, [r3, #0]
80037ac: b2db uxtb r3, r3
80037ae: 210a movs r1, #10
80037b0: 9101 str r1, [sp, #4]
80037b2: 9300 str r3, [sp, #0]
80037b4: 2300 movs r3, #0
80037b6: 2100 movs r1, #0
80037b8: 2001 movs r0, #1
80037ba: f000 fe15 bl 80043e8 <ramp>
80037be: 4603 mov r3, r0
80037c0: 2b00 cmp r3, #0
80037c2: d114 bne.n 80037ee <m1ch+0x16e>
m1st=motStop;
80037c4: 4b0e ldr r3, [pc, #56] @ (8003800 <m1ch+0x180>)
80037c6: 2204 movs r2, #4
80037c8: 701a strb r2, [r3, #0]
}
break;
80037ca: e010 b.n 80037ee <m1ch+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
80037cc: 2200 movs r2, #0
80037ce: 2100 movs r1, #0
80037d0: 2001 movs r0, #1
80037d2: f000 fc89 bl 80040e8 <SetMotPerc>
SetMotPerc(M1,BW,0);
80037d6: 2200 movs r2, #0
80037d8: 2101 movs r1, #1
80037da: 2001 movs r0, #1
80037dc: f000 fc84 bl 80040e8 <SetMotPerc>
break;
80037e0: e006 b.n 80037f0 <m1ch+0x170>
break;
80037e2: bf00 nop
80037e4: e004 b.n 80037f0 <m1ch+0x170>
break;
80037e6: bf00 nop
80037e8: e002 b.n 80037f0 <m1ch+0x170>
break;
80037ea: bf00 nop
80037ec: e000 b.n 80037f0 <m1ch+0x170>
break;
80037ee: bf00 nop
}
return m1st;
80037f0: 4b03 ldr r3, [pc, #12] @ (8003800 <m1ch+0x180>)
80037f2: 781b ldrb r3, [r3, #0]
}
80037f4: 4618 mov r0, r3
80037f6: 3768 adds r7, #104 @ 0x68
80037f8: 46bd mov sp, r7
80037fa: bd80 pop {r7, pc}
80037fc: 2000000b .word 0x2000000b
8003800: 2000045e .word 0x2000045e
8003804: 0800eae8 .word 0x0800eae8
8003808: 200003a8 .word 0x200003a8
800380c: 200003fc .word 0x200003fc
8003810: 20000434 .word 0x20000434
8003814: 20000444 .word 0x20000444
8003818: 20000400 .word 0x20000400
800381c: 20000416 .word 0x20000416
8003820: 20000436 .word 0x20000436
08003824 <m2ch>:
motMov_st m2ch(void){
8003824: b580 push {r7, lr}
8003826: b09c sub sp, #112 @ 0x70
8003828: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
800382a: 4b5d ldr r3, [pc, #372] @ (80039a0 <m2ch+0x17c>)
800382c: 781a ldrb r2, [r3, #0]
800382e: 4b5d ldr r3, [pc, #372] @ (80039a4 <m2ch+0x180>)
8003830: 781b ldrb r3, [r3, #0]
8003832: 429a cmp r2, r3
8003834: d017 beq.n 8003866 <m2ch+0x42>
memm2st=m2st;
8003836: 4b5b ldr r3, [pc, #364] @ (80039a4 <m2ch+0x180>)
8003838: 781a ldrb r2, [r3, #0]
800383a: 4b59 ldr r3, [pc, #356] @ (80039a0 <m2ch+0x17c>)
800383c: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ch=%d",m2st);
800383e: 4b59 ldr r3, [pc, #356] @ (80039a4 <m2ch+0x180>)
8003840: 781b ldrb r3, [r3, #0]
8003842: 461a mov r2, r3
8003844: 1d3b adds r3, r7, #4
8003846: 4958 ldr r1, [pc, #352] @ (80039a8 <m2ch+0x184>)
8003848: 4618 mov r0, r3
800384a: f00a fa75 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800384e: 1d3b adds r3, r7, #4
8003850: 4618 mov r0, r3
8003852: f7fc fc7b bl 800014c <strlen>
8003856: 4603 mov r3, r0
8003858: b29a uxth r2, r3
800385a: 1d39 adds r1, r7, #4
800385c: f04f 33ff mov.w r3, #4294967295
8003860: 4852 ldr r0, [pc, #328] @ (80039ac <m2ch+0x188>)
8003862: f005 fc79 bl 8009158 <HAL_UART_Transmit>
}
if(rtCiclo<chM2start)m2st=motWaiting;
8003866: 4b52 ldr r3, [pc, #328] @ (80039b0 <m2ch+0x18c>)
8003868: 881b ldrh r3, [r3, #0]
800386a: b29a uxth r2, r3
800386c: 4b51 ldr r3, [pc, #324] @ (80039b4 <m2ch+0x190>)
800386e: 881b ldrh r3, [r3, #0]
8003870: 429a cmp r2, r3
8003872: d202 bcs.n 800387a <m2ch+0x56>
8003874: 4b4b ldr r3, [pc, #300] @ (80039a4 <m2ch+0x180>)
8003876: 2200 movs r2, #0
8003878: 701a strb r2, [r3, #0]
switch(m2st){
800387a: 4b4a ldr r3, [pc, #296] @ (80039a4 <m2ch+0x180>)
800387c: 781b ldrb r3, [r3, #0]
800387e: 2b03 cmp r3, #3
8003880: d876 bhi.n 8003970 <m2ch+0x14c>
8003882: a201 add r2, pc, #4 @ (adr r2, 8003888 <m2ch+0x64>)
8003884: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003888: 08003899 .word 0x08003899
800388c: 080038e5 .word 0x080038e5
8003890: 08003915 .word 0x08003915
8003894: 08003947 .word 0x08003947
case motWaiting:
SetMotPerc(M2,FW,0);
8003898: 2200 movs r2, #0
800389a: 2100 movs r1, #0
800389c: 2002 movs r0, #2
800389e: f000 fc23 bl 80040e8 <SetMotPerc>
SetMotPerc(M2,BW,0);
80038a2: 2200 movs r2, #0
80038a4: 2101 movs r1, #1
80038a6: 2002 movs r0, #2
80038a8: f000 fc1e bl 80040e8 <SetMotPerc>
if(rtCiclo>=chM2start){
80038ac: 4b40 ldr r3, [pc, #256] @ (80039b0 <m2ch+0x18c>)
80038ae: 881b ldrh r3, [r3, #0]
80038b0: b29a uxth r2, r3
80038b2: 4b40 ldr r3, [pc, #256] @ (80039b4 <m2ch+0x190>)
80038b4: 881b ldrh r3, [r3, #0]
80038b6: 429a cmp r2, r3
80038b8: d365 bcc.n 8003986 <m2ch+0x162>
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT);
80038ba: 4b3f ldr r3, [pc, #252] @ (80039b8 <m2ch+0x194>)
80038bc: 885b ldrh r3, [r3, #2]
80038be: b2da uxtb r2, r3
80038c0: 4b3e ldr r3, [pc, #248] @ (80039bc <m2ch+0x198>)
80038c2: 881b ldrh r3, [r3, #0]
80038c4: b2d9 uxtb r1, r3
80038c6: 4b3e ldr r3, [pc, #248] @ (80039c0 <m2ch+0x19c>)
80038c8: 881b ldrh r3, [r3, #0]
80038ca: b2db uxtb r3, r3
80038cc: 2000 movs r0, #0
80038ce: 9001 str r0, [sp, #4]
80038d0: 9300 str r3, [sp, #0]
80038d2: 460b mov r3, r1
80038d4: 2100 movs r1, #0
80038d6: 2002 movs r0, #2
80038d8: f000 fd86 bl 80043e8 <ramp>
m2st=motStartRamp;
80038dc: 4b31 ldr r3, [pc, #196] @ (80039a4 <m2ch+0x180>)
80038de: 2201 movs r2, #1
80038e0: 701a strb r2, [r3, #0]
}
break;
80038e2: e050 b.n 8003986 <m2ch+0x162>
case motStartRamp:
if(ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE){
80038e4: 4b34 ldr r3, [pc, #208] @ (80039b8 <m2ch+0x194>)
80038e6: 885b ldrh r3, [r3, #2]
80038e8: b2da uxtb r2, r3
80038ea: 4b34 ldr r3, [pc, #208] @ (80039bc <m2ch+0x198>)
80038ec: 881b ldrh r3, [r3, #0]
80038ee: b2d9 uxtb r1, r3
80038f0: 4b33 ldr r3, [pc, #204] @ (80039c0 <m2ch+0x19c>)
80038f2: 881b ldrh r3, [r3, #0]
80038f4: b2db uxtb r3, r3
80038f6: 200a movs r0, #10
80038f8: 9001 str r0, [sp, #4]
80038fa: 9300 str r3, [sp, #0]
80038fc: 460b mov r3, r1
80038fe: 2100 movs r1, #0
8003900: 2002 movs r0, #2
8003902: f000 fd71 bl 80043e8 <ramp>
8003906: 4603 mov r3, r0
8003908: 2b00 cmp r3, #0
800390a: d13e bne.n 800398a <m2ch+0x166>
m2st=motWaitingTime;
800390c: 4b25 ldr r3, [pc, #148] @ (80039a4 <m2ch+0x180>)
800390e: 2202 movs r2, #2
8003910: 701a strb r2, [r3, #0]
}
break;
8003912: e03a b.n 800398a <m2ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM2stop){
8003914: 4b26 ldr r3, [pc, #152] @ (80039b0 <m2ch+0x18c>)
8003916: 881b ldrh r3, [r3, #0]
8003918: b29a uxth r2, r3
800391a: 4b2a ldr r3, [pc, #168] @ (80039c4 <m2ch+0x1a0>)
800391c: 881b ldrh r3, [r3, #0]
800391e: 429a cmp r2, r3
8003920: d335 bcc.n 800398e <m2ch+0x16a>
(void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT);
8003922: 4b26 ldr r3, [pc, #152] @ (80039bc <m2ch+0x198>)
8003924: 881b ldrh r3, [r3, #0]
8003926: b2da uxtb r2, r3
8003928: 4b25 ldr r3, [pc, #148] @ (80039c0 <m2ch+0x19c>)
800392a: 881b ldrh r3, [r3, #0]
800392c: b2db uxtb r3, r3
800392e: 2100 movs r1, #0
8003930: 9101 str r1, [sp, #4]
8003932: 9300 str r3, [sp, #0]
8003934: 2300 movs r3, #0
8003936: 2100 movs r1, #0
8003938: 2002 movs r0, #2
800393a: f000 fd55 bl 80043e8 <ramp>
m2st=motStopRamp;
800393e: 4b19 ldr r3, [pc, #100] @ (80039a4 <m2ch+0x180>)
8003940: 2203 movs r2, #3
8003942: 701a strb r2, [r3, #0]
}
break;
8003944: e023 b.n 800398e <m2ch+0x16a>
case motStopRamp:
if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){
8003946: 4b1d ldr r3, [pc, #116] @ (80039bc <m2ch+0x198>)
8003948: 881b ldrh r3, [r3, #0]
800394a: b2da uxtb r2, r3
800394c: 4b1c ldr r3, [pc, #112] @ (80039c0 <m2ch+0x19c>)
800394e: 881b ldrh r3, [r3, #0]
8003950: b2db uxtb r3, r3
8003952: 210a movs r1, #10
8003954: 9101 str r1, [sp, #4]
8003956: 9300 str r3, [sp, #0]
8003958: 2300 movs r3, #0
800395a: 2100 movs r1, #0
800395c: 2002 movs r0, #2
800395e: f000 fd43 bl 80043e8 <ramp>
8003962: 4603 mov r3, r0
8003964: 2b00 cmp r3, #0
8003966: d114 bne.n 8003992 <m2ch+0x16e>
m2st=motStop;
8003968: 4b0e ldr r3, [pc, #56] @ (80039a4 <m2ch+0x180>)
800396a: 2204 movs r2, #4
800396c: 701a strb r2, [r3, #0]
}
break;
800396e: e010 b.n 8003992 <m2ch+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
8003970: 2200 movs r2, #0
8003972: 2100 movs r1, #0
8003974: 2002 movs r0, #2
8003976: f000 fbb7 bl 80040e8 <SetMotPerc>
SetMotPerc(M2,BW,0);
800397a: 2200 movs r2, #0
800397c: 2101 movs r1, #1
800397e: 2002 movs r0, #2
8003980: f000 fbb2 bl 80040e8 <SetMotPerc>
break;
8003984: e006 b.n 8003994 <m2ch+0x170>
break;
8003986: bf00 nop
8003988: e004 b.n 8003994 <m2ch+0x170>
break;
800398a: bf00 nop
800398c: e002 b.n 8003994 <m2ch+0x170>
break;
800398e: bf00 nop
8003990: e000 b.n 8003994 <m2ch+0x170>
break;
8003992: bf00 nop
}
return m2st;
8003994: 4b03 ldr r3, [pc, #12] @ (80039a4 <m2ch+0x180>)
8003996: 781b ldrb r3, [r3, #0]
}
8003998: 4618 mov r0, r3
800399a: 3768 adds r7, #104 @ 0x68
800399c: 46bd mov sp, r7
800399e: bd80 pop {r7, pc}
80039a0: 2000000c .word 0x2000000c
80039a4: 2000045f .word 0x2000045f
80039a8: 0800eaf4 .word 0x0800eaf4
80039ac: 200003a8 .word 0x200003a8
80039b0: 200003fc .word 0x200003fc
80039b4: 20000438 .word 0x20000438
80039b8: 20000444 .word 0x20000444
80039bc: 20000404 .word 0x20000404
80039c0: 20000416 .word 0x20000416
80039c4: 2000043a .word 0x2000043a
080039c8 <m3ch>:
motMov_st m3ch(void){
80039c8: b580 push {r7, lr}
80039ca: b09c sub sp, #112 @ 0x70
80039cc: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
80039ce: 4b5d ldr r3, [pc, #372] @ (8003b44 <m3ch+0x17c>)
80039d0: 781a ldrb r2, [r3, #0]
80039d2: 4b5d ldr r3, [pc, #372] @ (8003b48 <m3ch+0x180>)
80039d4: 781b ldrb r3, [r3, #0]
80039d6: 429a cmp r2, r3
80039d8: d017 beq.n 8003a0a <m3ch+0x42>
memm3st=m3st;
80039da: 4b5b ldr r3, [pc, #364] @ (8003b48 <m3ch+0x180>)
80039dc: 781a ldrb r2, [r3, #0]
80039de: 4b59 ldr r3, [pc, #356] @ (8003b44 <m3ch+0x17c>)
80039e0: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ch=%d",m3st);
80039e2: 4b59 ldr r3, [pc, #356] @ (8003b48 <m3ch+0x180>)
80039e4: 781b ldrb r3, [r3, #0]
80039e6: 461a mov r2, r3
80039e8: 1d3b adds r3, r7, #4
80039ea: 4958 ldr r1, [pc, #352] @ (8003b4c <m3ch+0x184>)
80039ec: 4618 mov r0, r3
80039ee: f00a f9a3 bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80039f2: 1d3b adds r3, r7, #4
80039f4: 4618 mov r0, r3
80039f6: f7fc fba9 bl 800014c <strlen>
80039fa: 4603 mov r3, r0
80039fc: b29a uxth r2, r3
80039fe: 1d39 adds r1, r7, #4
8003a00: f04f 33ff mov.w r3, #4294967295
8003a04: 4852 ldr r0, [pc, #328] @ (8003b50 <m3ch+0x188>)
8003a06: f005 fba7 bl 8009158 <HAL_UART_Transmit>
}
if(rtCiclo<chM3start)m3st=motWaiting;
8003a0a: 4b52 ldr r3, [pc, #328] @ (8003b54 <m3ch+0x18c>)
8003a0c: 881b ldrh r3, [r3, #0]
8003a0e: b29a uxth r2, r3
8003a10: 4b51 ldr r3, [pc, #324] @ (8003b58 <m3ch+0x190>)
8003a12: 881b ldrh r3, [r3, #0]
8003a14: 429a cmp r2, r3
8003a16: d202 bcs.n 8003a1e <m3ch+0x56>
8003a18: 4b4b ldr r3, [pc, #300] @ (8003b48 <m3ch+0x180>)
8003a1a: 2200 movs r2, #0
8003a1c: 701a strb r2, [r3, #0]
switch(m3st){
8003a1e: 4b4a ldr r3, [pc, #296] @ (8003b48 <m3ch+0x180>)
8003a20: 781b ldrb r3, [r3, #0]
8003a22: 2b03 cmp r3, #3
8003a24: d876 bhi.n 8003b14 <m3ch+0x14c>
8003a26: a201 add r2, pc, #4 @ (adr r2, 8003a2c <m3ch+0x64>)
8003a28: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003a2c: 08003a3d .word 0x08003a3d
8003a30: 08003a89 .word 0x08003a89
8003a34: 08003ab9 .word 0x08003ab9
8003a38: 08003aeb .word 0x08003aeb
case motWaiting:
SetMotPerc(M3,FW,0);
8003a3c: 2200 movs r2, #0
8003a3e: 2100 movs r1, #0
8003a40: 2003 movs r0, #3
8003a42: f000 fb51 bl 80040e8 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003a46: 2200 movs r2, #0
8003a48: 2101 movs r1, #1
8003a4a: 2003 movs r0, #3
8003a4c: f000 fb4c bl 80040e8 <SetMotPerc>
if(rtCiclo>=chM3start){
8003a50: 4b40 ldr r3, [pc, #256] @ (8003b54 <m3ch+0x18c>)
8003a52: 881b ldrh r3, [r3, #0]
8003a54: b29a uxth r2, r3
8003a56: 4b40 ldr r3, [pc, #256] @ (8003b58 <m3ch+0x190>)
8003a58: 881b ldrh r3, [r3, #0]
8003a5a: 429a cmp r2, r3
8003a5c: d365 bcc.n 8003b2a <m3ch+0x162>
(void)ramp(M3,FW,mrampstart[M3-1],m2pwmch,tramp,RAMPINIT);
8003a5e: 4b3f ldr r3, [pc, #252] @ (8003b5c <m3ch+0x194>)
8003a60: 889b ldrh r3, [r3, #4]
8003a62: b2da uxtb r2, r3
8003a64: 4b3e ldr r3, [pc, #248] @ (8003b60 <m3ch+0x198>)
8003a66: 881b ldrh r3, [r3, #0]
8003a68: b2d9 uxtb r1, r3
8003a6a: 4b3e ldr r3, [pc, #248] @ (8003b64 <m3ch+0x19c>)
8003a6c: 881b ldrh r3, [r3, #0]
8003a6e: b2db uxtb r3, r3
8003a70: 2000 movs r0, #0
8003a72: 9001 str r0, [sp, #4]
8003a74: 9300 str r3, [sp, #0]
8003a76: 460b mov r3, r1
8003a78: 2100 movs r1, #0
8003a7a: 2003 movs r0, #3
8003a7c: f000 fcb4 bl 80043e8 <ramp>
m3st=motStartRamp;
8003a80: 4b31 ldr r3, [pc, #196] @ (8003b48 <m3ch+0x180>)
8003a82: 2201 movs r2, #1
8003a84: 701a strb r2, [r3, #0]
}
break;
8003a86: e050 b.n 8003b2a <m3ch+0x162>
case motStartRamp:
if(ramp(M3,FW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){
8003a88: 4b34 ldr r3, [pc, #208] @ (8003b5c <m3ch+0x194>)
8003a8a: 889b ldrh r3, [r3, #4]
8003a8c: b2da uxtb r2, r3
8003a8e: 4b36 ldr r3, [pc, #216] @ (8003b68 <m3ch+0x1a0>)
8003a90: 881b ldrh r3, [r3, #0]
8003a92: b2d9 uxtb r1, r3
8003a94: 4b33 ldr r3, [pc, #204] @ (8003b64 <m3ch+0x19c>)
8003a96: 881b ldrh r3, [r3, #0]
8003a98: b2db uxtb r3, r3
8003a9a: 200a movs r0, #10
8003a9c: 9001 str r0, [sp, #4]
8003a9e: 9300 str r3, [sp, #0]
8003aa0: 460b mov r3, r1
8003aa2: 2100 movs r1, #0
8003aa4: 2003 movs r0, #3
8003aa6: f000 fc9f bl 80043e8 <ramp>
8003aaa: 4603 mov r3, r0
8003aac: 2b00 cmp r3, #0
8003aae: d13e bne.n 8003b2e <m3ch+0x166>
m3st=motWaitingTime;
8003ab0: 4b25 ldr r3, [pc, #148] @ (8003b48 <m3ch+0x180>)
8003ab2: 2202 movs r2, #2
8003ab4: 701a strb r2, [r3, #0]
}
break;
8003ab6: e03a b.n 8003b2e <m3ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM3stop){
8003ab8: 4b26 ldr r3, [pc, #152] @ (8003b54 <m3ch+0x18c>)
8003aba: 881b ldrh r3, [r3, #0]
8003abc: b29a uxth r2, r3
8003abe: 4b2b ldr r3, [pc, #172] @ (8003b6c <m3ch+0x1a4>)
8003ac0: 881b ldrh r3, [r3, #0]
8003ac2: 429a cmp r2, r3
8003ac4: d335 bcc.n 8003b32 <m3ch+0x16a>
(void)ramp(M3,FW,m3pwmch,0,tramp,RAMPINIT);
8003ac6: 4b28 ldr r3, [pc, #160] @ (8003b68 <m3ch+0x1a0>)
8003ac8: 881b ldrh r3, [r3, #0]
8003aca: b2da uxtb r2, r3
8003acc: 4b25 ldr r3, [pc, #148] @ (8003b64 <m3ch+0x19c>)
8003ace: 881b ldrh r3, [r3, #0]
8003ad0: b2db uxtb r3, r3
8003ad2: 2100 movs r1, #0
8003ad4: 9101 str r1, [sp, #4]
8003ad6: 9300 str r3, [sp, #0]
8003ad8: 2300 movs r3, #0
8003ada: 2100 movs r1, #0
8003adc: 2003 movs r0, #3
8003ade: f000 fc83 bl 80043e8 <ramp>
m3st=motStopRamp;
8003ae2: 4b19 ldr r3, [pc, #100] @ (8003b48 <m3ch+0x180>)
8003ae4: 2203 movs r2, #3
8003ae6: 701a strb r2, [r3, #0]
}
break;
8003ae8: e023 b.n 8003b32 <m3ch+0x16a>
case motStopRamp:
if(ramp(M3,FW,m3pwmch,0,tramp,RAMPRUN)==DONE){
8003aea: 4b1f ldr r3, [pc, #124] @ (8003b68 <m3ch+0x1a0>)
8003aec: 881b ldrh r3, [r3, #0]
8003aee: b2da uxtb r2, r3
8003af0: 4b1c ldr r3, [pc, #112] @ (8003b64 <m3ch+0x19c>)
8003af2: 881b ldrh r3, [r3, #0]
8003af4: b2db uxtb r3, r3
8003af6: 210a movs r1, #10
8003af8: 9101 str r1, [sp, #4]
8003afa: 9300 str r3, [sp, #0]
8003afc: 2300 movs r3, #0
8003afe: 2100 movs r1, #0
8003b00: 2003 movs r0, #3
8003b02: f000 fc71 bl 80043e8 <ramp>
8003b06: 4603 mov r3, r0
8003b08: 2b00 cmp r3, #0
8003b0a: d114 bne.n 8003b36 <m3ch+0x16e>
m3st=motStop;
8003b0c: 4b0e ldr r3, [pc, #56] @ (8003b48 <m3ch+0x180>)
8003b0e: 2204 movs r2, #4
8003b10: 701a strb r2, [r3, #0]
}
break;
8003b12: e010 b.n 8003b36 <m3ch+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8003b14: 2200 movs r2, #0
8003b16: 2100 movs r1, #0
8003b18: 2003 movs r0, #3
8003b1a: f000 fae5 bl 80040e8 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003b1e: 2200 movs r2, #0
8003b20: 2101 movs r1, #1
8003b22: 2003 movs r0, #3
8003b24: f000 fae0 bl 80040e8 <SetMotPerc>
break;
8003b28: e006 b.n 8003b38 <m3ch+0x170>
break;
8003b2a: bf00 nop
8003b2c: e004 b.n 8003b38 <m3ch+0x170>
break;
8003b2e: bf00 nop
8003b30: e002 b.n 8003b38 <m3ch+0x170>
break;
8003b32: bf00 nop
8003b34: e000 b.n 8003b38 <m3ch+0x170>
break;
8003b36: bf00 nop
}
return m3st;
8003b38: 4b03 ldr r3, [pc, #12] @ (8003b48 <m3ch+0x180>)
8003b3a: 781b ldrb r3, [r3, #0]
}
8003b3c: 4618 mov r0, r3
8003b3e: 3768 adds r7, #104 @ 0x68
8003b40: 46bd mov sp, r7
8003b42: bd80 pop {r7, pc}
8003b44: 2000000d .word 0x2000000d
8003b48: 20000460 .word 0x20000460
8003b4c: 0800eb00 .word 0x0800eb00
8003b50: 200003a8 .word 0x200003a8
8003b54: 200003fc .word 0x200003fc
8003b58: 2000043c .word 0x2000043c
8003b5c: 20000444 .word 0x20000444
8003b60: 20000404 .word 0x20000404
8003b64: 20000416 .word 0x20000416
8003b68: 20000408 .word 0x20000408
8003b6c: 2000043e .word 0x2000043e
08003b70 <m4ch>:
motMov_st m4ch(void){
8003b70: b580 push {r7, lr}
8003b72: b09c sub sp, #112 @ 0x70
8003b74: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
8003b76: 4b5d ldr r3, [pc, #372] @ (8003cec <m4ch+0x17c>)
8003b78: 781a ldrb r2, [r3, #0]
8003b7a: 4b5d ldr r3, [pc, #372] @ (8003cf0 <m4ch+0x180>)
8003b7c: 781b ldrb r3, [r3, #0]
8003b7e: 429a cmp r2, r3
8003b80: d017 beq.n 8003bb2 <m4ch+0x42>
memm4st=m4st;
8003b82: 4b5b ldr r3, [pc, #364] @ (8003cf0 <m4ch+0x180>)
8003b84: 781a ldrb r2, [r3, #0]
8003b86: 4b59 ldr r3, [pc, #356] @ (8003cec <m4ch+0x17c>)
8003b88: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ch=%d",m4st);
8003b8a: 4b59 ldr r3, [pc, #356] @ (8003cf0 <m4ch+0x180>)
8003b8c: 781b ldrb r3, [r3, #0]
8003b8e: 461a mov r2, r3
8003b90: 1d3b adds r3, r7, #4
8003b92: 4958 ldr r1, [pc, #352] @ (8003cf4 <m4ch+0x184>)
8003b94: 4618 mov r0, r3
8003b96: f00a f8cf bl 800dd38 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003b9a: 1d3b adds r3, r7, #4
8003b9c: 4618 mov r0, r3
8003b9e: f7fc fad5 bl 800014c <strlen>
8003ba2: 4603 mov r3, r0
8003ba4: b29a uxth r2, r3
8003ba6: 1d39 adds r1, r7, #4
8003ba8: f04f 33ff mov.w r3, #4294967295
8003bac: 4852 ldr r0, [pc, #328] @ (8003cf8 <m4ch+0x188>)
8003bae: f005 fad3 bl 8009158 <HAL_UART_Transmit>
}
if(rtCiclo<chM4start)m4st=motWaiting;
8003bb2: 4b52 ldr r3, [pc, #328] @ (8003cfc <m4ch+0x18c>)
8003bb4: 881b ldrh r3, [r3, #0]
8003bb6: b29a uxth r2, r3
8003bb8: 4b51 ldr r3, [pc, #324] @ (8003d00 <m4ch+0x190>)
8003bba: 881b ldrh r3, [r3, #0]
8003bbc: 429a cmp r2, r3
8003bbe: d202 bcs.n 8003bc6 <m4ch+0x56>
8003bc0: 4b4b ldr r3, [pc, #300] @ (8003cf0 <m4ch+0x180>)
8003bc2: 2200 movs r2, #0
8003bc4: 701a strb r2, [r3, #0]
switch(m4st){
8003bc6: 4b4a ldr r3, [pc, #296] @ (8003cf0 <m4ch+0x180>)
8003bc8: 781b ldrb r3, [r3, #0]
8003bca: 2b03 cmp r3, #3
8003bcc: d876 bhi.n 8003cbc <m4ch+0x14c>
8003bce: a201 add r2, pc, #4 @ (adr r2, 8003bd4 <m4ch+0x64>)
8003bd0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003bd4: 08003be5 .word 0x08003be5
8003bd8: 08003c31 .word 0x08003c31
8003bdc: 08003c61 .word 0x08003c61
8003be0: 08003c93 .word 0x08003c93
case motWaiting:
SetMotPerc(M4,FW,0);
8003be4: 2200 movs r2, #0
8003be6: 2100 movs r1, #0
8003be8: 2004 movs r0, #4
8003bea: f000 fa7d bl 80040e8 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003bee: 2200 movs r2, #0
8003bf0: 2101 movs r1, #1
8003bf2: 2004 movs r0, #4
8003bf4: f000 fa78 bl 80040e8 <SetMotPerc>
if(rtCiclo>=chM4start){
8003bf8: 4b40 ldr r3, [pc, #256] @ (8003cfc <m4ch+0x18c>)
8003bfa: 881b ldrh r3, [r3, #0]
8003bfc: b29a uxth r2, r3
8003bfe: 4b40 ldr r3, [pc, #256] @ (8003d00 <m4ch+0x190>)
8003c00: 881b ldrh r3, [r3, #0]
8003c02: 429a cmp r2, r3
8003c04: d365 bcc.n 8003cd2 <m4ch+0x162>
(void)ramp(M4,FW,mrampstart[M4-1],m2pwmch,tramp,RAMPINIT);
8003c06: 4b3f ldr r3, [pc, #252] @ (8003d04 <m4ch+0x194>)
8003c08: 88db ldrh r3, [r3, #6]
8003c0a: b2da uxtb r2, r3
8003c0c: 4b3e ldr r3, [pc, #248] @ (8003d08 <m4ch+0x198>)
8003c0e: 881b ldrh r3, [r3, #0]
8003c10: b2d9 uxtb r1, r3
8003c12: 4b3e ldr r3, [pc, #248] @ (8003d0c <m4ch+0x19c>)
8003c14: 881b ldrh r3, [r3, #0]
8003c16: b2db uxtb r3, r3
8003c18: 2000 movs r0, #0
8003c1a: 9001 str r0, [sp, #4]
8003c1c: 9300 str r3, [sp, #0]
8003c1e: 460b mov r3, r1
8003c20: 2100 movs r1, #0
8003c22: 2004 movs r0, #4
8003c24: f000 fbe0 bl 80043e8 <ramp>
m4st=motStartRamp;
8003c28: 4b31 ldr r3, [pc, #196] @ (8003cf0 <m4ch+0x180>)
8003c2a: 2201 movs r2, #1
8003c2c: 701a strb r2, [r3, #0]
}
break;
8003c2e: e050 b.n 8003cd2 <m4ch+0x162>
case motStartRamp:
if(ramp(M4,FW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE){
8003c30: 4b34 ldr r3, [pc, #208] @ (8003d04 <m4ch+0x194>)
8003c32: 88db ldrh r3, [r3, #6]
8003c34: b2da uxtb r2, r3
8003c36: 4b36 ldr r3, [pc, #216] @ (8003d10 <m4ch+0x1a0>)
8003c38: 881b ldrh r3, [r3, #0]
8003c3a: b2d9 uxtb r1, r3
8003c3c: 4b33 ldr r3, [pc, #204] @ (8003d0c <m4ch+0x19c>)
8003c3e: 881b ldrh r3, [r3, #0]
8003c40: b2db uxtb r3, r3
8003c42: 200a movs r0, #10
8003c44: 9001 str r0, [sp, #4]
8003c46: 9300 str r3, [sp, #0]
8003c48: 460b mov r3, r1
8003c4a: 2100 movs r1, #0
8003c4c: 2004 movs r0, #4
8003c4e: f000 fbcb bl 80043e8 <ramp>
8003c52: 4603 mov r3, r0
8003c54: 2b00 cmp r3, #0
8003c56: d13e bne.n 8003cd6 <m4ch+0x166>
m4st=motWaitingTime;
8003c58: 4b25 ldr r3, [pc, #148] @ (8003cf0 <m4ch+0x180>)
8003c5a: 2202 movs r2, #2
8003c5c: 701a strb r2, [r3, #0]
}
break;
8003c5e: e03a b.n 8003cd6 <m4ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM4stop){
8003c60: 4b26 ldr r3, [pc, #152] @ (8003cfc <m4ch+0x18c>)
8003c62: 881b ldrh r3, [r3, #0]
8003c64: b29a uxth r2, r3
8003c66: 4b2b ldr r3, [pc, #172] @ (8003d14 <m4ch+0x1a4>)
8003c68: 881b ldrh r3, [r3, #0]
8003c6a: 429a cmp r2, r3
8003c6c: d335 bcc.n 8003cda <m4ch+0x16a>
(void)ramp(M4,FW,m4pwmch,0,tramp,RAMPINIT);
8003c6e: 4b28 ldr r3, [pc, #160] @ (8003d10 <m4ch+0x1a0>)
8003c70: 881b ldrh r3, [r3, #0]
8003c72: b2da uxtb r2, r3
8003c74: 4b25 ldr r3, [pc, #148] @ (8003d0c <m4ch+0x19c>)
8003c76: 881b ldrh r3, [r3, #0]
8003c78: b2db uxtb r3, r3
8003c7a: 2100 movs r1, #0
8003c7c: 9101 str r1, [sp, #4]
8003c7e: 9300 str r3, [sp, #0]
8003c80: 2300 movs r3, #0
8003c82: 2100 movs r1, #0
8003c84: 2004 movs r0, #4
8003c86: f000 fbaf bl 80043e8 <ramp>
m4st=motStopRamp;
8003c8a: 4b19 ldr r3, [pc, #100] @ (8003cf0 <m4ch+0x180>)
8003c8c: 2203 movs r2, #3
8003c8e: 701a strb r2, [r3, #0]
}
break;
8003c90: e023 b.n 8003cda <m4ch+0x16a>
case motStopRamp:
if(ramp(M4,FW,m4pwmch,0,tramp,RAMPRUN)==DONE){
8003c92: 4b1f ldr r3, [pc, #124] @ (8003d10 <m4ch+0x1a0>)
8003c94: 881b ldrh r3, [r3, #0]
8003c96: b2da uxtb r2, r3
8003c98: 4b1c ldr r3, [pc, #112] @ (8003d0c <m4ch+0x19c>)
8003c9a: 881b ldrh r3, [r3, #0]
8003c9c: b2db uxtb r3, r3
8003c9e: 210a movs r1, #10
8003ca0: 9101 str r1, [sp, #4]
8003ca2: 9300 str r3, [sp, #0]
8003ca4: 2300 movs r3, #0
8003ca6: 2100 movs r1, #0
8003ca8: 2004 movs r0, #4
8003caa: f000 fb9d bl 80043e8 <ramp>
8003cae: 4603 mov r3, r0
8003cb0: 2b00 cmp r3, #0
8003cb2: d114 bne.n 8003cde <m4ch+0x16e>
m4st=motStop;
8003cb4: 4b0e ldr r3, [pc, #56] @ (8003cf0 <m4ch+0x180>)
8003cb6: 2204 movs r2, #4
8003cb8: 701a strb r2, [r3, #0]
}
break;
8003cba: e010 b.n 8003cde <m4ch+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8003cbc: 2200 movs r2, #0
8003cbe: 2100 movs r1, #0
8003cc0: 2004 movs r0, #4
8003cc2: f000 fa11 bl 80040e8 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003cc6: 2200 movs r2, #0
8003cc8: 2101 movs r1, #1
8003cca: 2004 movs r0, #4
8003ccc: f000 fa0c bl 80040e8 <SetMotPerc>
break;
8003cd0: e006 b.n 8003ce0 <m4ch+0x170>
break;
8003cd2: bf00 nop
8003cd4: e004 b.n 8003ce0 <m4ch+0x170>
break;
8003cd6: bf00 nop
8003cd8: e002 b.n 8003ce0 <m4ch+0x170>
break;
8003cda: bf00 nop
8003cdc: e000 b.n 8003ce0 <m4ch+0x170>
break;
8003cde: bf00 nop
}
return m4st;
8003ce0: 4b03 ldr r3, [pc, #12] @ (8003cf0 <m4ch+0x180>)
8003ce2: 781b ldrb r3, [r3, #0]
}
8003ce4: 4618 mov r0, r3
8003ce6: 3768 adds r7, #104 @ 0x68
8003ce8: 46bd mov sp, r7
8003cea: bd80 pop {r7, pc}
8003cec: 2000000e .word 0x2000000e
8003cf0: 20000461 .word 0x20000461
8003cf4: 0800eb0c .word 0x0800eb0c
8003cf8: 200003a8 .word 0x200003a8
8003cfc: 200003fc .word 0x200003fc
8003d00: 20000440 .word 0x20000440
8003d04: 20000444 .word 0x20000444
8003d08: 20000404 .word 0x20000404
8003d0c: 20000416 .word 0x20000416
8003d10: 2000040c .word 0x2000040c
8003d14: 20000442 .word 0x20000442
08003d18 <IsPwmRunning>:
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim4;
extern volatile uint8_t rtramp[4];
extern uint8_t mrampstart[4];
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8003d18: b580 push {r7, lr}
8003d1a: b084 sub sp, #16
8003d1c: af00 add r7, sp, #0
8003d1e: 6078 str r0, [r7, #4]
8003d20: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
8003d22: 6839 ldr r1, [r7, #0]
8003d24: 6878 ldr r0, [r7, #4]
8003d26: f004 fe90 bl 8008a4a <HAL_TIM_GetChannelState>
8003d2a: 4603 mov r3, r0
8003d2c: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
8003d2e: 7bfb ldrb r3, [r7, #15]
8003d30: 2b02 cmp r3, #2
8003d32: bf0c ite eq
8003d34: 2301 moveq r3, #1
8003d36: 2300 movne r3, #0
8003d38: b2db uxtb r3, r3
}
8003d3a: 4618 mov r0, r3
8003d3c: 3710 adds r7, #16
8003d3e: 46bd mov sp, r7
8003d40: bd80 pop {r7, pc}
08003d42 <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
8003d42: b580 push {r7, lr}
8003d44: b082 sub sp, #8
8003d46: af00 add r7, sp, #0
8003d48: 6078 str r0, [r7, #4]
8003d4a: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
8003d4c: 6839 ldr r1, [r7, #0]
8003d4e: 6878 ldr r0, [r7, #4]
8003d50: f004 fc8e bl 8008670 <HAL_TIM_PWM_Stop>
}
8003d54: bf00 nop
8003d56: 3708 adds r7, #8
8003d58: 46bd mov sp, r7
8003d5a: bd80 pop {r7, pc}
08003d5c <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8003d5c: b580 push {r7, lr}
8003d5e: b084 sub sp, #16
8003d60: af00 add r7, sp, #0
8003d62: 60f8 str r0, [r7, #12]
8003d64: 60b9 str r1, [r7, #8]
8003d66: 4613 mov r3, r2
8003d68: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003d6a: 68bb ldr r3, [r7, #8]
8003d6c: 2b00 cmp r3, #0
8003d6e: d104 bne.n 8003d7a <StartMot+0x1e>
8003d70: 68fb ldr r3, [r7, #12]
8003d72: 681b ldr r3, [r3, #0]
8003d74: 88fa ldrh r2, [r7, #6]
8003d76: 635a str r2, [r3, #52] @ 0x34
8003d78: e013 b.n 8003da2 <StartMot+0x46>
8003d7a: 68bb ldr r3, [r7, #8]
8003d7c: 2b04 cmp r3, #4
8003d7e: d104 bne.n 8003d8a <StartMot+0x2e>
8003d80: 68fb ldr r3, [r7, #12]
8003d82: 681a ldr r2, [r3, #0]
8003d84: 88fb ldrh r3, [r7, #6]
8003d86: 6393 str r3, [r2, #56] @ 0x38
8003d88: e00b b.n 8003da2 <StartMot+0x46>
8003d8a: 68bb ldr r3, [r7, #8]
8003d8c: 2b08 cmp r3, #8
8003d8e: d104 bne.n 8003d9a <StartMot+0x3e>
8003d90: 68fb ldr r3, [r7, #12]
8003d92: 681a ldr r2, [r3, #0]
8003d94: 88fb ldrh r3, [r7, #6]
8003d96: 63d3 str r3, [r2, #60] @ 0x3c
8003d98: e003 b.n 8003da2 <StartMot+0x46>
8003d9a: 68fb ldr r3, [r7, #12]
8003d9c: 681a ldr r2, [r3, #0]
8003d9e: 88fb ldrh r3, [r7, #6]
8003da0: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
8003da2: 68b9 ldr r1, [r7, #8]
8003da4: 68f8 ldr r0, [r7, #12]
8003da6: f004 fbc1 bl 800852c <HAL_TIM_PWM_Start>
}
8003daa: bf00 nop
8003dac: 3710 adds r7, #16
8003dae: 46bd mov sp, r7
8003db0: bd80 pop {r7, pc}
08003db2 <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8003db2: b480 push {r7}
8003db4: b085 sub sp, #20
8003db6: af00 add r7, sp, #0
8003db8: 60f8 str r0, [r7, #12]
8003dba: 60b9 str r1, [r7, #8]
8003dbc: 4613 mov r3, r2
8003dbe: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003dc0: 68bb ldr r3, [r7, #8]
8003dc2: 2b00 cmp r3, #0
8003dc4: d104 bne.n 8003dd0 <SetMotPwm+0x1e>
8003dc6: 68fb ldr r3, [r7, #12]
8003dc8: 681b ldr r3, [r3, #0]
8003dca: 88fa ldrh r2, [r7, #6]
8003dcc: 635a str r2, [r3, #52] @ 0x34
}
8003dce: e013 b.n 8003df8 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003dd0: 68bb ldr r3, [r7, #8]
8003dd2: 2b04 cmp r3, #4
8003dd4: d104 bne.n 8003de0 <SetMotPwm+0x2e>
8003dd6: 68fb ldr r3, [r7, #12]
8003dd8: 681a ldr r2, [r3, #0]
8003dda: 88fb ldrh r3, [r7, #6]
8003ddc: 6393 str r3, [r2, #56] @ 0x38
}
8003dde: e00b b.n 8003df8 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003de0: 68bb ldr r3, [r7, #8]
8003de2: 2b08 cmp r3, #8
8003de4: d104 bne.n 8003df0 <SetMotPwm+0x3e>
8003de6: 68fb ldr r3, [r7, #12]
8003de8: 681a ldr r2, [r3, #0]
8003dea: 88fb ldrh r3, [r7, #6]
8003dec: 63d3 str r3, [r2, #60] @ 0x3c
}
8003dee: e003 b.n 8003df8 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003df0: 68fb ldr r3, [r7, #12]
8003df2: 681a ldr r2, [r3, #0]
8003df4: 88fb ldrh r3, [r7, #6]
8003df6: 6413 str r3, [r2, #64] @ 0x40
}
8003df8: bf00 nop
8003dfa: 3714 adds r7, #20
8003dfc: 46bd mov sp, r7
8003dfe: bc80 pop {r7}
8003e00: 4770 bx lr
...
08003e04 <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
8003e04: b580 push {r7, lr}
8003e06: b082 sub sp, #8
8003e08: af00 add r7, sp, #0
8003e0a: 4603 mov r3, r0
8003e0c: 71fb strb r3, [r7, #7]
8003e0e: 460b mov r3, r1
8003e10: 71bb strb r3, [r7, #6]
8003e12: 4613 mov r3, r2
8003e14: 80bb strh r3, [r7, #4]
switch(mot){
8003e16: 79fb ldrb r3, [r7, #7]
8003e18: 3b01 subs r3, #1
8003e1a: 2b03 cmp r3, #3
8003e1c: f200 8158 bhi.w 80040d0 <SetMot+0x2cc>
8003e20: a201 add r2, pc, #4 @ (adr r2, 8003e28 <SetMot+0x24>)
8003e22: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003e26: bf00 nop
8003e28: 08003e39 .word 0x08003e39
8003e2c: 08003edb .word 0x08003edb
8003e30: 08003f7d .word 0x08003f7d
8003e34: 08004027 .word 0x08004027
case 1:
if(dir==FW){
8003e38: 79bb ldrb r3, [r7, #6]
8003e3a: 2b00 cmp r3, #0
8003e3c: d126 bne.n 8003e8c <SetMot+0x88>
if(pwmval==0){
8003e3e: 88bb ldrh r3, [r7, #4]
8003e40: 2b00 cmp r3, #0
8003e42: d109 bne.n 8003e58 <SetMot+0x54>
StopMot(timMot1,FWMot1);
8003e44: 2100 movs r1, #0
8003e46: 48a5 ldr r0, [pc, #660] @ (80040dc <SetMot+0x2d8>)
8003e48: f7ff ff7b bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8003e4c: 2200 movs r2, #0
8003e4e: 2102 movs r1, #2
8003e50: 48a3 ldr r0, [pc, #652] @ (80040e0 <SetMot+0x2dc>)
8003e52: f002 f882 bl 8005f5a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
8003e56: e13c b.n 80040d2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
8003e58: 2100 movs r1, #0
8003e5a: 48a0 ldr r0, [pc, #640] @ (80040dc <SetMot+0x2d8>)
8003e5c: f7ff ff5c bl 8003d18 <IsPwmRunning>
8003e60: 4603 mov r3, r0
8003e62: 2b00 cmp r3, #0
8003e64: d006 beq.n 8003e74 <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
8003e66: 88bb ldrh r3, [r7, #4]
8003e68: 461a mov r2, r3
8003e6a: 2100 movs r1, #0
8003e6c: 489b ldr r0, [pc, #620] @ (80040dc <SetMot+0x2d8>)
8003e6e: f7ff ffa0 bl 8003db2 <SetMotPwm>
break;
8003e72: e12e b.n 80040d2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8003e74: 2201 movs r2, #1
8003e76: 2102 movs r1, #2
8003e78: 4899 ldr r0, [pc, #612] @ (80040e0 <SetMot+0x2dc>)
8003e7a: f002 f86e bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
8003e7e: 88bb ldrh r3, [r7, #4]
8003e80: 461a mov r2, r3
8003e82: 2100 movs r1, #0
8003e84: 4895 ldr r0, [pc, #596] @ (80040dc <SetMot+0x2d8>)
8003e86: f7ff ff69 bl 8003d5c <StartMot>
break;
8003e8a: e122 b.n 80040d2 <SetMot+0x2ce>
if(pwmval==0){
8003e8c: 88bb ldrh r3, [r7, #4]
8003e8e: 2b00 cmp r3, #0
8003e90: d109 bne.n 8003ea6 <SetMot+0xa2>
StopMot(timMot1,BWMot1);
8003e92: 2104 movs r1, #4
8003e94: 4891 ldr r0, [pc, #580] @ (80040dc <SetMot+0x2d8>)
8003e96: f7ff ff54 bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8003e9a: 2200 movs r2, #0
8003e9c: 2102 movs r1, #2
8003e9e: 4890 ldr r0, [pc, #576] @ (80040e0 <SetMot+0x2dc>)
8003ea0: f002 f85b bl 8005f5a <HAL_GPIO_WritePin>
break;
8003ea4: e115 b.n 80040d2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
8003ea6: 2104 movs r1, #4
8003ea8: 488c ldr r0, [pc, #560] @ (80040dc <SetMot+0x2d8>)
8003eaa: f7ff ff35 bl 8003d18 <IsPwmRunning>
8003eae: 4603 mov r3, r0
8003eb0: 2b00 cmp r3, #0
8003eb2: d006 beq.n 8003ec2 <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
8003eb4: 88bb ldrh r3, [r7, #4]
8003eb6: 461a mov r2, r3
8003eb8: 2104 movs r1, #4
8003eba: 4888 ldr r0, [pc, #544] @ (80040dc <SetMot+0x2d8>)
8003ebc: f7ff ff79 bl 8003db2 <SetMotPwm>
break;
8003ec0: e107 b.n 80040d2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8003ec2: 2201 movs r2, #1
8003ec4: 2102 movs r1, #2
8003ec6: 4886 ldr r0, [pc, #536] @ (80040e0 <SetMot+0x2dc>)
8003ec8: f002 f847 bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
8003ecc: 88bb ldrh r3, [r7, #4]
8003ece: 461a mov r2, r3
8003ed0: 2104 movs r1, #4
8003ed2: 4882 ldr r0, [pc, #520] @ (80040dc <SetMot+0x2d8>)
8003ed4: f7ff ff42 bl 8003d5c <StartMot>
break;
8003ed8: e0fb b.n 80040d2 <SetMot+0x2ce>
case 2:
if(dir==FW){
8003eda: 79bb ldrb r3, [r7, #6]
8003edc: 2b00 cmp r3, #0
8003ede: d126 bne.n 8003f2e <SetMot+0x12a>
if(pwmval==0){
8003ee0: 88bb ldrh r3, [r7, #4]
8003ee2: 2b00 cmp r3, #0
8003ee4: d109 bne.n 8003efa <SetMot+0xf6>
StopMot(timMot2,FWMot2);
8003ee6: 2108 movs r1, #8
8003ee8: 487c ldr r0, [pc, #496] @ (80040dc <SetMot+0x2d8>)
8003eea: f7ff ff2a bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8003eee: 2200 movs r2, #0
8003ef0: 2104 movs r1, #4
8003ef2: 487b ldr r0, [pc, #492] @ (80040e0 <SetMot+0x2dc>)
8003ef4: f002 f831 bl 8005f5a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8003ef8: e0eb b.n 80040d2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
8003efa: 2108 movs r1, #8
8003efc: 4877 ldr r0, [pc, #476] @ (80040dc <SetMot+0x2d8>)
8003efe: f7ff ff0b bl 8003d18 <IsPwmRunning>
8003f02: 4603 mov r3, r0
8003f04: 2b00 cmp r3, #0
8003f06: d006 beq.n 8003f16 <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
8003f08: 88bb ldrh r3, [r7, #4]
8003f0a: 461a mov r2, r3
8003f0c: 2108 movs r1, #8
8003f0e: 4873 ldr r0, [pc, #460] @ (80040dc <SetMot+0x2d8>)
8003f10: f7ff ff4f bl 8003db2 <SetMotPwm>
break;
8003f14: e0dd b.n 80040d2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8003f16: 2201 movs r2, #1
8003f18: 2104 movs r1, #4
8003f1a: 4871 ldr r0, [pc, #452] @ (80040e0 <SetMot+0x2dc>)
8003f1c: f002 f81d bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8003f20: 88bb ldrh r3, [r7, #4]
8003f22: 461a mov r2, r3
8003f24: 2108 movs r1, #8
8003f26: 486d ldr r0, [pc, #436] @ (80040dc <SetMot+0x2d8>)
8003f28: f7ff ff18 bl 8003d5c <StartMot>
break;
8003f2c: e0d1 b.n 80040d2 <SetMot+0x2ce>
if(pwmval==0){
8003f2e: 88bb ldrh r3, [r7, #4]
8003f30: 2b00 cmp r3, #0
8003f32: d109 bne.n 8003f48 <SetMot+0x144>
StopMot(timMot2,BWMot2);
8003f34: 210c movs r1, #12
8003f36: 4869 ldr r0, [pc, #420] @ (80040dc <SetMot+0x2d8>)
8003f38: f7ff ff03 bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8003f3c: 2200 movs r2, #0
8003f3e: 2104 movs r1, #4
8003f40: 4867 ldr r0, [pc, #412] @ (80040e0 <SetMot+0x2dc>)
8003f42: f002 f80a bl 8005f5a <HAL_GPIO_WritePin>
break;
8003f46: e0c4 b.n 80040d2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
8003f48: 210c movs r1, #12
8003f4a: 4864 ldr r0, [pc, #400] @ (80040dc <SetMot+0x2d8>)
8003f4c: f7ff fee4 bl 8003d18 <IsPwmRunning>
8003f50: 4603 mov r3, r0
8003f52: 2b00 cmp r3, #0
8003f54: d006 beq.n 8003f64 <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
8003f56: 88bb ldrh r3, [r7, #4]
8003f58: 461a mov r2, r3
8003f5a: 210c movs r1, #12
8003f5c: 485f ldr r0, [pc, #380] @ (80040dc <SetMot+0x2d8>)
8003f5e: f7ff ff28 bl 8003db2 <SetMotPwm>
break;
8003f62: e0b6 b.n 80040d2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8003f64: 2201 movs r2, #1
8003f66: 2104 movs r1, #4
8003f68: 485d ldr r0, [pc, #372] @ (80040e0 <SetMot+0x2dc>)
8003f6a: f001 fff6 bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
8003f6e: 88bb ldrh r3, [r7, #4]
8003f70: 461a mov r2, r3
8003f72: 210c movs r1, #12
8003f74: 4859 ldr r0, [pc, #356] @ (80040dc <SetMot+0x2d8>)
8003f76: f7ff fef1 bl 8003d5c <StartMot>
break;
8003f7a: e0aa b.n 80040d2 <SetMot+0x2ce>
case 3:
if(dir==FW){
8003f7c: 79bb ldrb r3, [r7, #6]
8003f7e: 2b00 cmp r3, #0
8003f80: d128 bne.n 8003fd4 <SetMot+0x1d0>
if(pwmval==0){
8003f82: 88bb ldrh r3, [r7, #4]
8003f84: 2b00 cmp r3, #0
8003f86: d10a bne.n 8003f9e <SetMot+0x19a>
StopMot(timMot3,FWMot3);
8003f88: 2100 movs r1, #0
8003f8a: 4856 ldr r0, [pc, #344] @ (80040e4 <SetMot+0x2e0>)
8003f8c: f7ff fed9 bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8003f90: 2200 movs r2, #0
8003f92: f44f 6180 mov.w r1, #1024 @ 0x400
8003f96: 4852 ldr r0, [pc, #328] @ (80040e0 <SetMot+0x2dc>)
8003f98: f001 ffdf bl 8005f5a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8003f9c: e099 b.n 80040d2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
8003f9e: 2100 movs r1, #0
8003fa0: 4850 ldr r0, [pc, #320] @ (80040e4 <SetMot+0x2e0>)
8003fa2: f7ff feb9 bl 8003d18 <IsPwmRunning>
8003fa6: 4603 mov r3, r0
8003fa8: 2b00 cmp r3, #0
8003faa: d006 beq.n 8003fba <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
8003fac: 88bb ldrh r3, [r7, #4]
8003fae: 461a mov r2, r3
8003fb0: 2100 movs r1, #0
8003fb2: 484c ldr r0, [pc, #304] @ (80040e4 <SetMot+0x2e0>)
8003fb4: f7ff fefd bl 8003db2 <SetMotPwm>
break;
8003fb8: e08b b.n 80040d2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8003fba: 2201 movs r2, #1
8003fbc: f44f 6180 mov.w r1, #1024 @ 0x400
8003fc0: 4847 ldr r0, [pc, #284] @ (80040e0 <SetMot+0x2dc>)
8003fc2: f001 ffca bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8003fc6: 88bb ldrh r3, [r7, #4]
8003fc8: 461a mov r2, r3
8003fca: 2100 movs r1, #0
8003fcc: 4845 ldr r0, [pc, #276] @ (80040e4 <SetMot+0x2e0>)
8003fce: f7ff fec5 bl 8003d5c <StartMot>
break;
8003fd2: e07e b.n 80040d2 <SetMot+0x2ce>
if(pwmval==0){
8003fd4: 88bb ldrh r3, [r7, #4]
8003fd6: 2b00 cmp r3, #0
8003fd8: d10a bne.n 8003ff0 <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
8003fda: 2104 movs r1, #4
8003fdc: 4841 ldr r0, [pc, #260] @ (80040e4 <SetMot+0x2e0>)
8003fde: f7ff feb0 bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8003fe2: 2200 movs r2, #0
8003fe4: f44f 6180 mov.w r1, #1024 @ 0x400
8003fe8: 483d ldr r0, [pc, #244] @ (80040e0 <SetMot+0x2dc>)
8003fea: f001 ffb6 bl 8005f5a <HAL_GPIO_WritePin>
break;
8003fee: e070 b.n 80040d2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
8003ff0: 2104 movs r1, #4
8003ff2: 483c ldr r0, [pc, #240] @ (80040e4 <SetMot+0x2e0>)
8003ff4: f7ff fe90 bl 8003d18 <IsPwmRunning>
8003ff8: 4603 mov r3, r0
8003ffa: 2b00 cmp r3, #0
8003ffc: d006 beq.n 800400c <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
8003ffe: 88bb ldrh r3, [r7, #4]
8004000: 461a mov r2, r3
8004002: 2104 movs r1, #4
8004004: 4837 ldr r0, [pc, #220] @ (80040e4 <SetMot+0x2e0>)
8004006: f7ff fed4 bl 8003db2 <SetMotPwm>
break;
800400a: e062 b.n 80040d2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
800400c: 2201 movs r2, #1
800400e: f44f 6180 mov.w r1, #1024 @ 0x400
8004012: 4833 ldr r0, [pc, #204] @ (80040e0 <SetMot+0x2dc>)
8004014: f001 ffa1 bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004018: 88bb ldrh r3, [r7, #4]
800401a: 461a mov r2, r3
800401c: 2104 movs r1, #4
800401e: 4831 ldr r0, [pc, #196] @ (80040e4 <SetMot+0x2e0>)
8004020: f7ff fe9c bl 8003d5c <StartMot>
break;
8004024: e055 b.n 80040d2 <SetMot+0x2ce>
case 4:
if(dir==FW){
8004026: 79bb ldrb r3, [r7, #6]
8004028: 2b00 cmp r3, #0
800402a: d128 bne.n 800407e <SetMot+0x27a>
if(pwmval==0){
800402c: 88bb ldrh r3, [r7, #4]
800402e: 2b00 cmp r3, #0
8004030: d10a bne.n 8004048 <SetMot+0x244>
StopMot(timMot4,FWMot4);
8004032: 2108 movs r1, #8
8004034: 482b ldr r0, [pc, #172] @ (80040e4 <SetMot+0x2e0>)
8004036: f7ff fe84 bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
800403a: 2200 movs r2, #0
800403c: f44f 6100 mov.w r1, #2048 @ 0x800
8004040: 4827 ldr r0, [pc, #156] @ (80040e0 <SetMot+0x2dc>)
8004042: f001 ff8a bl 8005f5a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8004046: e044 b.n 80040d2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
8004048: 2108 movs r1, #8
800404a: 4826 ldr r0, [pc, #152] @ (80040e4 <SetMot+0x2e0>)
800404c: f7ff fe64 bl 8003d18 <IsPwmRunning>
8004050: 4603 mov r3, r0
8004052: 2b00 cmp r3, #0
8004054: d006 beq.n 8004064 <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
8004056: 88bb ldrh r3, [r7, #4]
8004058: 461a mov r2, r3
800405a: 2108 movs r1, #8
800405c: 4821 ldr r0, [pc, #132] @ (80040e4 <SetMot+0x2e0>)
800405e: f7ff fea8 bl 8003db2 <SetMotPwm>
break;
8004062: e036 b.n 80040d2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004064: 2201 movs r2, #1
8004066: f44f 6100 mov.w r1, #2048 @ 0x800
800406a: 481d ldr r0, [pc, #116] @ (80040e0 <SetMot+0x2dc>)
800406c: f001 ff75 bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
8004070: 88bb ldrh r3, [r7, #4]
8004072: 461a mov r2, r3
8004074: 2108 movs r1, #8
8004076: 481b ldr r0, [pc, #108] @ (80040e4 <SetMot+0x2e0>)
8004078: f7ff fe70 bl 8003d5c <StartMot>
break;
800407c: e029 b.n 80040d2 <SetMot+0x2ce>
if(pwmval==0){
800407e: 88bb ldrh r3, [r7, #4]
8004080: 2b00 cmp r3, #0
8004082: d10a bne.n 800409a <SetMot+0x296>
StopMot(timMot4,BWMot4);
8004084: 210c movs r1, #12
8004086: 4817 ldr r0, [pc, #92] @ (80040e4 <SetMot+0x2e0>)
8004088: f7ff fe5b bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
800408c: 2200 movs r2, #0
800408e: f44f 6100 mov.w r1, #2048 @ 0x800
8004092: 4813 ldr r0, [pc, #76] @ (80040e0 <SetMot+0x2dc>)
8004094: f001 ff61 bl 8005f5a <HAL_GPIO_WritePin>
break;
8004098: e01b b.n 80040d2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
800409a: 210c movs r1, #12
800409c: 4811 ldr r0, [pc, #68] @ (80040e4 <SetMot+0x2e0>)
800409e: f7ff fe3b bl 8003d18 <IsPwmRunning>
80040a2: 4603 mov r3, r0
80040a4: 2b00 cmp r3, #0
80040a6: d006 beq.n 80040b6 <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
80040a8: 88bb ldrh r3, [r7, #4]
80040aa: 461a mov r2, r3
80040ac: 210c movs r1, #12
80040ae: 480d ldr r0, [pc, #52] @ (80040e4 <SetMot+0x2e0>)
80040b0: f7ff fe7f bl 8003db2 <SetMotPwm>
break;
80040b4: e00d b.n 80040d2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80040b6: 2201 movs r2, #1
80040b8: f44f 6100 mov.w r1, #2048 @ 0x800
80040bc: 4808 ldr r0, [pc, #32] @ (80040e0 <SetMot+0x2dc>)
80040be: f001 ff4c bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
80040c2: 88bb ldrh r3, [r7, #4]
80040c4: 461a mov r2, r3
80040c6: 210c movs r1, #12
80040c8: 4806 ldr r0, [pc, #24] @ (80040e4 <SetMot+0x2e0>)
80040ca: f7ff fe47 bl 8003d5c <StartMot>
break;
80040ce: e000 b.n 80040d2 <SetMot+0x2ce>
default:
break;
80040d0: bf00 nop
}
}
80040d2: bf00 nop
80040d4: 3708 adds r7, #8
80040d6: 46bd mov sp, r7
80040d8: bd80 pop {r7, pc}
80040da: bf00 nop
80040dc: 20000318 .word 0x20000318
80040e0: 40010c00 .word 0x40010c00
80040e4: 20000360 .word 0x20000360
080040e8 <SetMotPerc>:
void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){
80040e8: b580 push {r7, lr}
80040ea: b084 sub sp, #16
80040ec: af00 add r7, sp, #0
80040ee: 4603 mov r3, r0
80040f0: 71fb strb r3, [r7, #7]
80040f2: 460b mov r3, r1
80040f4: 71bb strb r3, [r7, #6]
80040f6: 4613 mov r3, r2
80040f8: 717b strb r3, [r7, #5]
uint16_t pwmval;
uint32_t tempval;
tempval=perc;
80040fa: 797b ldrb r3, [r7, #5]
80040fc: 60fb str r3, [r7, #12]
tempval*=16384;
80040fe: 68fb ldr r3, [r7, #12]
8004100: 039b lsls r3, r3, #14
8004102: 60fb str r3, [r7, #12]
tempval/=100;
8004104: 68fb ldr r3, [r7, #12]
8004106: 4ab4 ldr r2, [pc, #720] @ (80043d8 <SetMotPerc+0x2f0>)
8004108: fba2 2303 umull r2, r3, r2, r3
800410c: 095b lsrs r3, r3, #5
800410e: 60fb str r3, [r7, #12]
pwmval=(uint16_t)tempval;
8004110: 68fb ldr r3, [r7, #12]
8004112: 817b strh r3, [r7, #10]
switch(mot){
8004114: 79fb ldrb r3, [r7, #7]
8004116: 3b01 subs r3, #1
8004118: 2b03 cmp r3, #3
800411a: f200 8157 bhi.w 80043cc <SetMotPerc+0x2e4>
800411e: a201 add r2, pc, #4 @ (adr r2, 8004124 <SetMotPerc+0x3c>)
8004120: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004124: 08004135 .word 0x08004135
8004128: 080041d7 .word 0x080041d7
800412c: 08004279 .word 0x08004279
8004130: 08004323 .word 0x08004323
case 1:
if(dir==FW){
8004134: 79bb ldrb r3, [r7, #6]
8004136: 2b00 cmp r3, #0
8004138: d126 bne.n 8004188 <SetMotPerc+0xa0>
if(pwmval==0){
800413a: 897b ldrh r3, [r7, #10]
800413c: 2b00 cmp r3, #0
800413e: d109 bne.n 8004154 <SetMotPerc+0x6c>
StopMot(timMot1,FWMot1);
8004140: 2100 movs r1, #0
8004142: 48a6 ldr r0, [pc, #664] @ (80043dc <SetMotPerc+0x2f4>)
8004144: f7ff fdfd bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004148: 2200 movs r2, #0
800414a: 2102 movs r1, #2
800414c: 48a4 ldr r0, [pc, #656] @ (80043e0 <SetMotPerc+0x2f8>)
800414e: f001 ff04 bl 8005f5a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
8004152: e13c b.n 80043ce <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, FWMot1)){
8004154: 2100 movs r1, #0
8004156: 48a1 ldr r0, [pc, #644] @ (80043dc <SetMotPerc+0x2f4>)
8004158: f7ff fdde bl 8003d18 <IsPwmRunning>
800415c: 4603 mov r3, r0
800415e: 2b00 cmp r3, #0
8004160: d006 beq.n 8004170 <SetMotPerc+0x88>
SetMotPwm(timMot1,FWMot1,pwmval);
8004162: 897b ldrh r3, [r7, #10]
8004164: 461a mov r2, r3
8004166: 2100 movs r1, #0
8004168: 489c ldr r0, [pc, #624] @ (80043dc <SetMotPerc+0x2f4>)
800416a: f7ff fe22 bl 8003db2 <SetMotPwm>
break;
800416e: e12e b.n 80043ce <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8004170: 2201 movs r2, #1
8004172: 2102 movs r1, #2
8004174: 489a ldr r0, [pc, #616] @ (80043e0 <SetMotPerc+0x2f8>)
8004176: f001 fef0 bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
800417a: 897b ldrh r3, [r7, #10]
800417c: 461a mov r2, r3
800417e: 2100 movs r1, #0
8004180: 4896 ldr r0, [pc, #600] @ (80043dc <SetMotPerc+0x2f4>)
8004182: f7ff fdeb bl 8003d5c <StartMot>
break;
8004186: e122 b.n 80043ce <SetMotPerc+0x2e6>
if(pwmval==0){
8004188: 897b ldrh r3, [r7, #10]
800418a: 2b00 cmp r3, #0
800418c: d109 bne.n 80041a2 <SetMotPerc+0xba>
StopMot(timMot1,BWMot1);
800418e: 2104 movs r1, #4
8004190: 4892 ldr r0, [pc, #584] @ (80043dc <SetMotPerc+0x2f4>)
8004192: f7ff fdd6 bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004196: 2200 movs r2, #0
8004198: 2102 movs r1, #2
800419a: 4891 ldr r0, [pc, #580] @ (80043e0 <SetMotPerc+0x2f8>)
800419c: f001 fedd bl 8005f5a <HAL_GPIO_WritePin>
break;
80041a0: e115 b.n 80043ce <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, BWMot1)){
80041a2: 2104 movs r1, #4
80041a4: 488d ldr r0, [pc, #564] @ (80043dc <SetMotPerc+0x2f4>)
80041a6: f7ff fdb7 bl 8003d18 <IsPwmRunning>
80041aa: 4603 mov r3, r0
80041ac: 2b00 cmp r3, #0
80041ae: d006 beq.n 80041be <SetMotPerc+0xd6>
SetMotPwm(timMot1,BWMot1,pwmval);
80041b0: 897b ldrh r3, [r7, #10]
80041b2: 461a mov r2, r3
80041b4: 2104 movs r1, #4
80041b6: 4889 ldr r0, [pc, #548] @ (80043dc <SetMotPerc+0x2f4>)
80041b8: f7ff fdfb bl 8003db2 <SetMotPwm>
break;
80041bc: e107 b.n 80043ce <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80041be: 2201 movs r2, #1
80041c0: 2102 movs r1, #2
80041c2: 4887 ldr r0, [pc, #540] @ (80043e0 <SetMotPerc+0x2f8>)
80041c4: f001 fec9 bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
80041c8: 897b ldrh r3, [r7, #10]
80041ca: 461a mov r2, r3
80041cc: 2104 movs r1, #4
80041ce: 4883 ldr r0, [pc, #524] @ (80043dc <SetMotPerc+0x2f4>)
80041d0: f7ff fdc4 bl 8003d5c <StartMot>
break;
80041d4: e0fb b.n 80043ce <SetMotPerc+0x2e6>
case 2:
if(dir==FW){
80041d6: 79bb ldrb r3, [r7, #6]
80041d8: 2b00 cmp r3, #0
80041da: d126 bne.n 800422a <SetMotPerc+0x142>
if(pwmval==0){
80041dc: 897b ldrh r3, [r7, #10]
80041de: 2b00 cmp r3, #0
80041e0: d109 bne.n 80041f6 <SetMotPerc+0x10e>
StopMot(timMot2,FWMot2);
80041e2: 2108 movs r1, #8
80041e4: 487d ldr r0, [pc, #500] @ (80043dc <SetMotPerc+0x2f4>)
80041e6: f7ff fdac bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80041ea: 2200 movs r2, #0
80041ec: 2104 movs r1, #4
80041ee: 487c ldr r0, [pc, #496] @ (80043e0 <SetMotPerc+0x2f8>)
80041f0: f001 feb3 bl 8005f5a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
80041f4: e0eb b.n 80043ce <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, FWMot2)){
80041f6: 2108 movs r1, #8
80041f8: 4878 ldr r0, [pc, #480] @ (80043dc <SetMotPerc+0x2f4>)
80041fa: f7ff fd8d bl 8003d18 <IsPwmRunning>
80041fe: 4603 mov r3, r0
8004200: 2b00 cmp r3, #0
8004202: d006 beq.n 8004212 <SetMotPerc+0x12a>
SetMotPwm(timMot2,FWMot2,pwmval);
8004204: 897b ldrh r3, [r7, #10]
8004206: 461a mov r2, r3
8004208: 2108 movs r1, #8
800420a: 4874 ldr r0, [pc, #464] @ (80043dc <SetMotPerc+0x2f4>)
800420c: f7ff fdd1 bl 8003db2 <SetMotPwm>
break;
8004210: e0dd b.n 80043ce <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004212: 2201 movs r2, #1
8004214: 2104 movs r1, #4
8004216: 4872 ldr r0, [pc, #456] @ (80043e0 <SetMotPerc+0x2f8>)
8004218: f001 fe9f bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
800421c: 897b ldrh r3, [r7, #10]
800421e: 461a mov r2, r3
8004220: 2108 movs r1, #8
8004222: 486e ldr r0, [pc, #440] @ (80043dc <SetMotPerc+0x2f4>)
8004224: f7ff fd9a bl 8003d5c <StartMot>
break;
8004228: e0d1 b.n 80043ce <SetMotPerc+0x2e6>
if(pwmval==0){
800422a: 897b ldrh r3, [r7, #10]
800422c: 2b00 cmp r3, #0
800422e: d109 bne.n 8004244 <SetMotPerc+0x15c>
StopMot(timMot2,BWMot2);
8004230: 210c movs r1, #12
8004232: 486a ldr r0, [pc, #424] @ (80043dc <SetMotPerc+0x2f4>)
8004234: f7ff fd85 bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8004238: 2200 movs r2, #0
800423a: 2104 movs r1, #4
800423c: 4868 ldr r0, [pc, #416] @ (80043e0 <SetMotPerc+0x2f8>)
800423e: f001 fe8c bl 8005f5a <HAL_GPIO_WritePin>
break;
8004242: e0c4 b.n 80043ce <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, BWMot2)){
8004244: 210c movs r1, #12
8004246: 4865 ldr r0, [pc, #404] @ (80043dc <SetMotPerc+0x2f4>)
8004248: f7ff fd66 bl 8003d18 <IsPwmRunning>
800424c: 4603 mov r3, r0
800424e: 2b00 cmp r3, #0
8004250: d006 beq.n 8004260 <SetMotPerc+0x178>
SetMotPwm(timMot2,BWMot2,pwmval);
8004252: 897b ldrh r3, [r7, #10]
8004254: 461a mov r2, r3
8004256: 210c movs r1, #12
8004258: 4860 ldr r0, [pc, #384] @ (80043dc <SetMotPerc+0x2f4>)
800425a: f7ff fdaa bl 8003db2 <SetMotPwm>
break;
800425e: e0b6 b.n 80043ce <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004260: 2201 movs r2, #1
8004262: 2104 movs r1, #4
8004264: 485e ldr r0, [pc, #376] @ (80043e0 <SetMotPerc+0x2f8>)
8004266: f001 fe78 bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
800426a: 897b ldrh r3, [r7, #10]
800426c: 461a mov r2, r3
800426e: 210c movs r1, #12
8004270: 485a ldr r0, [pc, #360] @ (80043dc <SetMotPerc+0x2f4>)
8004272: f7ff fd73 bl 8003d5c <StartMot>
break;
8004276: e0aa b.n 80043ce <SetMotPerc+0x2e6>
case 3:
if(dir==FW){
8004278: 79bb ldrb r3, [r7, #6]
800427a: 2b00 cmp r3, #0
800427c: d128 bne.n 80042d0 <SetMotPerc+0x1e8>
if(pwmval==0){
800427e: 897b ldrh r3, [r7, #10]
8004280: 2b00 cmp r3, #0
8004282: d10a bne.n 800429a <SetMotPerc+0x1b2>
StopMot(timMot3,FWMot3);
8004284: 2100 movs r1, #0
8004286: 4857 ldr r0, [pc, #348] @ (80043e4 <SetMotPerc+0x2fc>)
8004288: f7ff fd5b bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
800428c: 2200 movs r2, #0
800428e: f44f 6180 mov.w r1, #1024 @ 0x400
8004292: 4853 ldr r0, [pc, #332] @ (80043e0 <SetMotPerc+0x2f8>)
8004294: f001 fe61 bl 8005f5a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8004298: e099 b.n 80043ce <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, FWMot3)){
800429a: 2100 movs r1, #0
800429c: 4851 ldr r0, [pc, #324] @ (80043e4 <SetMotPerc+0x2fc>)
800429e: f7ff fd3b bl 8003d18 <IsPwmRunning>
80042a2: 4603 mov r3, r0
80042a4: 2b00 cmp r3, #0
80042a6: d006 beq.n 80042b6 <SetMotPerc+0x1ce>
SetMotPwm(timMot3,FWMot3,pwmval);
80042a8: 897b ldrh r3, [r7, #10]
80042aa: 461a mov r2, r3
80042ac: 2100 movs r1, #0
80042ae: 484d ldr r0, [pc, #308] @ (80043e4 <SetMotPerc+0x2fc>)
80042b0: f7ff fd7f bl 8003db2 <SetMotPwm>
break;
80042b4: e08b b.n 80043ce <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80042b6: 2201 movs r2, #1
80042b8: f44f 6180 mov.w r1, #1024 @ 0x400
80042bc: 4848 ldr r0, [pc, #288] @ (80043e0 <SetMotPerc+0x2f8>)
80042be: f001 fe4c bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
80042c2: 897b ldrh r3, [r7, #10]
80042c4: 461a mov r2, r3
80042c6: 2100 movs r1, #0
80042c8: 4846 ldr r0, [pc, #280] @ (80043e4 <SetMotPerc+0x2fc>)
80042ca: f7ff fd47 bl 8003d5c <StartMot>
break;
80042ce: e07e b.n 80043ce <SetMotPerc+0x2e6>
if(pwmval==0){
80042d0: 897b ldrh r3, [r7, #10]
80042d2: 2b00 cmp r3, #0
80042d4: d10a bne.n 80042ec <SetMotPerc+0x204>
StopMot(timMot3,BWMot3);
80042d6: 2104 movs r1, #4
80042d8: 4842 ldr r0, [pc, #264] @ (80043e4 <SetMotPerc+0x2fc>)
80042da: f7ff fd32 bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
80042de: 2200 movs r2, #0
80042e0: f44f 6180 mov.w r1, #1024 @ 0x400
80042e4: 483e ldr r0, [pc, #248] @ (80043e0 <SetMotPerc+0x2f8>)
80042e6: f001 fe38 bl 8005f5a <HAL_GPIO_WritePin>
break;
80042ea: e070 b.n 80043ce <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, BWMot3)){
80042ec: 2104 movs r1, #4
80042ee: 483d ldr r0, [pc, #244] @ (80043e4 <SetMotPerc+0x2fc>)
80042f0: f7ff fd12 bl 8003d18 <IsPwmRunning>
80042f4: 4603 mov r3, r0
80042f6: 2b00 cmp r3, #0
80042f8: d006 beq.n 8004308 <SetMotPerc+0x220>
SetMotPwm(timMot3,BWMot3,pwmval);
80042fa: 897b ldrh r3, [r7, #10]
80042fc: 461a mov r2, r3
80042fe: 2104 movs r1, #4
8004300: 4838 ldr r0, [pc, #224] @ (80043e4 <SetMotPerc+0x2fc>)
8004302: f7ff fd56 bl 8003db2 <SetMotPwm>
break;
8004306: e062 b.n 80043ce <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8004308: 2201 movs r2, #1
800430a: f44f 6180 mov.w r1, #1024 @ 0x400
800430e: 4834 ldr r0, [pc, #208] @ (80043e0 <SetMotPerc+0x2f8>)
8004310: f001 fe23 bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004314: 897b ldrh r3, [r7, #10]
8004316: 461a mov r2, r3
8004318: 2104 movs r1, #4
800431a: 4832 ldr r0, [pc, #200] @ (80043e4 <SetMotPerc+0x2fc>)
800431c: f7ff fd1e bl 8003d5c <StartMot>
break;
8004320: e055 b.n 80043ce <SetMotPerc+0x2e6>
case 4:
if(dir==FW){
8004322: 79bb ldrb r3, [r7, #6]
8004324: 2b00 cmp r3, #0
8004326: d128 bne.n 800437a <SetMotPerc+0x292>
if(pwmval==0){
8004328: 897b ldrh r3, [r7, #10]
800432a: 2b00 cmp r3, #0
800432c: d10a bne.n 8004344 <SetMotPerc+0x25c>
StopMot(timMot4,FWMot4);
800432e: 2108 movs r1, #8
8004330: 482c ldr r0, [pc, #176] @ (80043e4 <SetMotPerc+0x2fc>)
8004332: f7ff fd06 bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004336: 2200 movs r2, #0
8004338: f44f 6100 mov.w r1, #2048 @ 0x800
800433c: 4828 ldr r0, [pc, #160] @ (80043e0 <SetMotPerc+0x2f8>)
800433e: f001 fe0c bl 8005f5a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8004342: e044 b.n 80043ce <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, FWMot4)){
8004344: 2108 movs r1, #8
8004346: 4827 ldr r0, [pc, #156] @ (80043e4 <SetMotPerc+0x2fc>)
8004348: f7ff fce6 bl 8003d18 <IsPwmRunning>
800434c: 4603 mov r3, r0
800434e: 2b00 cmp r3, #0
8004350: d006 beq.n 8004360 <SetMotPerc+0x278>
SetMotPwm(timMot4,FWMot4,pwmval);
8004352: 897b ldrh r3, [r7, #10]
8004354: 461a mov r2, r3
8004356: 2108 movs r1, #8
8004358: 4822 ldr r0, [pc, #136] @ (80043e4 <SetMotPerc+0x2fc>)
800435a: f7ff fd2a bl 8003db2 <SetMotPwm>
break;
800435e: e036 b.n 80043ce <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004360: 2201 movs r2, #1
8004362: f44f 6100 mov.w r1, #2048 @ 0x800
8004366: 481e ldr r0, [pc, #120] @ (80043e0 <SetMotPerc+0x2f8>)
8004368: f001 fdf7 bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
800436c: 897b ldrh r3, [r7, #10]
800436e: 461a mov r2, r3
8004370: 2108 movs r1, #8
8004372: 481c ldr r0, [pc, #112] @ (80043e4 <SetMotPerc+0x2fc>)
8004374: f7ff fcf2 bl 8003d5c <StartMot>
break;
8004378: e029 b.n 80043ce <SetMotPerc+0x2e6>
if(pwmval==0){
800437a: 897b ldrh r3, [r7, #10]
800437c: 2b00 cmp r3, #0
800437e: d10a bne.n 8004396 <SetMotPerc+0x2ae>
StopMot(timMot4,BWMot4);
8004380: 210c movs r1, #12
8004382: 4818 ldr r0, [pc, #96] @ (80043e4 <SetMotPerc+0x2fc>)
8004384: f7ff fcdd bl 8003d42 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004388: 2200 movs r2, #0
800438a: f44f 6100 mov.w r1, #2048 @ 0x800
800438e: 4814 ldr r0, [pc, #80] @ (80043e0 <SetMotPerc+0x2f8>)
8004390: f001 fde3 bl 8005f5a <HAL_GPIO_WritePin>
break;
8004394: e01b b.n 80043ce <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, BWMot4)){
8004396: 210c movs r1, #12
8004398: 4812 ldr r0, [pc, #72] @ (80043e4 <SetMotPerc+0x2fc>)
800439a: f7ff fcbd bl 8003d18 <IsPwmRunning>
800439e: 4603 mov r3, r0
80043a0: 2b00 cmp r3, #0
80043a2: d006 beq.n 80043b2 <SetMotPerc+0x2ca>
SetMotPwm(timMot4,BWMot4,pwmval);
80043a4: 897b ldrh r3, [r7, #10]
80043a6: 461a mov r2, r3
80043a8: 210c movs r1, #12
80043aa: 480e ldr r0, [pc, #56] @ (80043e4 <SetMotPerc+0x2fc>)
80043ac: f7ff fd01 bl 8003db2 <SetMotPwm>
break;
80043b0: e00d b.n 80043ce <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80043b2: 2201 movs r2, #1
80043b4: f44f 6100 mov.w r1, #2048 @ 0x800
80043b8: 4809 ldr r0, [pc, #36] @ (80043e0 <SetMotPerc+0x2f8>)
80043ba: f001 fdce bl 8005f5a <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
80043be: 897b ldrh r3, [r7, #10]
80043c0: 461a mov r2, r3
80043c2: 210c movs r1, #12
80043c4: 4807 ldr r0, [pc, #28] @ (80043e4 <SetMotPerc+0x2fc>)
80043c6: f7ff fcc9 bl 8003d5c <StartMot>
break;
80043ca: e000 b.n 80043ce <SetMotPerc+0x2e6>
default:
break;
80043cc: bf00 nop
}
}
80043ce: bf00 nop
80043d0: 3710 adds r7, #16
80043d2: 46bd mov sp, r7
80043d4: bd80 pop {r7, pc}
80043d6: bf00 nop
80043d8: 51eb851f .word 0x51eb851f
80043dc: 20000318 .word 0x20000318
80043e0: 40010c00 .word 0x40010c00
80043e4: 20000360 .word 0x20000360
080043e8 <ramp>:
uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){
80043e8: b590 push {r4, r7, lr}
80043ea: b085 sub sp, #20
80043ec: af00 add r7, sp, #0
80043ee: 4604 mov r4, r0
80043f0: 4608 mov r0, r1
80043f2: 4611 mov r1, r2
80043f4: 461a mov r2, r3
80043f6: 4623 mov r3, r4
80043f8: 71fb strb r3, [r7, #7]
80043fa: 4603 mov r3, r0
80043fc: 71bb strb r3, [r7, #6]
80043fe: 460b mov r3, r1
8004400: 717b strb r3, [r7, #5]
8004402: 4613 mov r3, r2
8004404: 713b strb r3, [r7, #4]
static uint8_t memrtramp[4];
uint16_t delta;
switch(mode){
8004406: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
800440a: 2b00 cmp r3, #0
800440c: d002 beq.n 8004414 <ramp+0x2c>
800440e: 2b0a cmp r3, #10
8004410: d013 beq.n 800443a <ramp+0x52>
8004412: e0a5 b.n 8004560 <ramp+0x178>
case RAMPINIT:
memrtramp[mot-1]=percStart=tr;
8004414: f897 3020 ldrb.w r3, [r7, #32]
8004418: 717b strb r3, [r7, #5]
800441a: 79fb ldrb r3, [r7, #7]
800441c: 3b01 subs r3, #1
800441e: 4953 ldr r1, [pc, #332] @ (800456c <ramp+0x184>)
8004420: 797a ldrb r2, [r7, #5]
8004422: 54ca strb r2, [r1, r3]
SetMotPerc(mot,dir,mrampstart[mot-1]);
8004424: 79fb ldrb r3, [r7, #7]
8004426: 3b01 subs r3, #1
8004428: 4a51 ldr r2, [pc, #324] @ (8004570 <ramp+0x188>)
800442a: 5cd2 ldrb r2, [r2, r3]
800442c: 79b9 ldrb r1, [r7, #6]
800442e: 79fb ldrb r3, [r7, #7]
8004430: 4618 mov r0, r3
8004432: f7ff fe59 bl 80040e8 <SetMotPerc>
return DONE;
8004436: 2300 movs r3, #0
8004438: e093 b.n 8004562 <ramp+0x17a>
case RAMPRUN:
if(memrtramp[mot-1]!=rtramp[mot-1]){
800443a: 79fb ldrb r3, [r7, #7]
800443c: 3b01 subs r3, #1
800443e: 4a4b ldr r2, [pc, #300] @ (800456c <ramp+0x184>)
8004440: 5cd2 ldrb r2, [r2, r3]
8004442: 79fb ldrb r3, [r7, #7]
8004444: 3b01 subs r3, #1
8004446: 494b ldr r1, [pc, #300] @ (8004574 <ramp+0x18c>)
8004448: 5ccb ldrb r3, [r1, r3]
800444a: b2db uxtb r3, r3
800444c: 429a cmp r2, r3
800444e: f000 8085 beq.w 800455c <ramp+0x174>
memrtramp[mot-1]=rtramp[mot-1];
8004452: 79fb ldrb r3, [r7, #7]
8004454: 1e5a subs r2, r3, #1
8004456: 79fb ldrb r3, [r7, #7]
8004458: 3b01 subs r3, #1
800445a: 4946 ldr r1, [pc, #280] @ (8004574 <ramp+0x18c>)
800445c: 5c8a ldrb r2, [r1, r2]
800445e: b2d1 uxtb r1, r2
8004460: 4a42 ldr r2, [pc, #264] @ (800456c <ramp+0x184>)
8004462: 54d1 strb r1, [r2, r3]
if(rtramp[mot-1]){
8004464: 79fb ldrb r3, [r7, #7]
8004466: 3b01 subs r3, #1
8004468: 4a42 ldr r2, [pc, #264] @ (8004574 <ramp+0x18c>)
800446a: 5cd3 ldrb r3, [r2, r3]
800446c: b2db uxtb r3, r3
800446e: 2b00 cmp r3, #0
8004470: d06c beq.n 800454c <ramp+0x164>
if(mrampstart[mot-1]>percEnd){
8004472: 79fb ldrb r3, [r7, #7]
8004474: 3b01 subs r3, #1
8004476: 4a3e ldr r2, [pc, #248] @ (8004570 <ramp+0x188>)
8004478: 5cd3 ldrb r3, [r2, r3]
800447a: 793a ldrb r2, [r7, #4]
800447c: 429a cmp r2, r3
800447e: d22b bcs.n 80044d8 <ramp+0xf0>
delta=mrampstart[mot-1]-percEnd;
8004480: 79fb ldrb r3, [r7, #7]
8004482: 3b01 subs r3, #1
8004484: 4a3a ldr r2, [pc, #232] @ (8004570 <ramp+0x188>)
8004486: 5cd3 ldrb r3, [r2, r3]
8004488: 461a mov r2, r3
800448a: 793b ldrb r3, [r7, #4]
800448c: b29b uxth r3, r3
800448e: 1ad3 subs r3, r2, r3
8004490: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004492: f897 3020 ldrb.w r3, [r7, #32]
8004496: b29b uxth r3, r3
8004498: 79fa ldrb r2, [r7, #7]
800449a: 3a01 subs r2, #1
800449c: 4935 ldr r1, [pc, #212] @ (8004574 <ramp+0x18c>)
800449e: 5c8a ldrb r2, [r1, r2]
80044a0: b2d2 uxtb r2, r2
80044a2: 1a9b subs r3, r3, r2
80044a4: b29b uxth r3, r3
80044a6: 89fa ldrh r2, [r7, #14]
80044a8: fb02 f303 mul.w r3, r2, r3
80044ac: 81fb strh r3, [r7, #14]
delta=delta/tr;
80044ae: 89fa ldrh r2, [r7, #14]
80044b0: f897 3020 ldrb.w r3, [r7, #32]
80044b4: fb92 f3f3 sdiv r3, r2, r3
80044b8: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,mrampstart[mot-1]-delta);
80044ba: 79fb ldrb r3, [r7, #7]
80044bc: 3b01 subs r3, #1
80044be: 4a2c ldr r2, [pc, #176] @ (8004570 <ramp+0x188>)
80044c0: 5cd2 ldrb r2, [r2, r3]
80044c2: 89fb ldrh r3, [r7, #14]
80044c4: b2db uxtb r3, r3
80044c6: 1ad3 subs r3, r2, r3
80044c8: b2da uxtb r2, r3
80044ca: 79b9 ldrb r1, [r7, #6]
80044cc: 79fb ldrb r3, [r7, #7]
80044ce: 4618 mov r0, r3
80044d0: f7ff fe0a bl 80040e8 <SetMotPerc>
return RUNNING;
80044d4: 2301 movs r3, #1
80044d6: e044 b.n 8004562 <ramp+0x17a>
}else if(mrampstart[mot-1]<percEnd){
80044d8: 79fb ldrb r3, [r7, #7]
80044da: 3b01 subs r3, #1
80044dc: 4a24 ldr r2, [pc, #144] @ (8004570 <ramp+0x188>)
80044de: 5cd3 ldrb r3, [r2, r3]
80044e0: 793a ldrb r2, [r7, #4]
80044e2: 429a cmp r2, r3
80044e4: d92a bls.n 800453c <ramp+0x154>
delta=percEnd-mrampstart[mot-1];
80044e6: 793b ldrb r3, [r7, #4]
80044e8: b29b uxth r3, r3
80044ea: 79fa ldrb r2, [r7, #7]
80044ec: 3a01 subs r2, #1
80044ee: 4920 ldr r1, [pc, #128] @ (8004570 <ramp+0x188>)
80044f0: 5c8a ldrb r2, [r1, r2]
80044f2: 1a9b subs r3, r3, r2
80044f4: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
80044f6: f897 3020 ldrb.w r3, [r7, #32]
80044fa: b29b uxth r3, r3
80044fc: 79fa ldrb r2, [r7, #7]
80044fe: 3a01 subs r2, #1
8004500: 491c ldr r1, [pc, #112] @ (8004574 <ramp+0x18c>)
8004502: 5c8a ldrb r2, [r1, r2]
8004504: b2d2 uxtb r2, r2
8004506: 1a9b subs r3, r3, r2
8004508: b29b uxth r3, r3
800450a: 89fa ldrh r2, [r7, #14]
800450c: fb02 f303 mul.w r3, r2, r3
8004510: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004512: 89fa ldrh r2, [r7, #14]
8004514: f897 3020 ldrb.w r3, [r7, #32]
8004518: fb92 f3f3 sdiv r3, r2, r3
800451c: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,mrampstart[mot-1]+delta);
800451e: 79fb ldrb r3, [r7, #7]
8004520: 3b01 subs r3, #1
8004522: 4a13 ldr r2, [pc, #76] @ (8004570 <ramp+0x188>)
8004524: 5cd2 ldrb r2, [r2, r3]
8004526: 89fb ldrh r3, [r7, #14]
8004528: b2db uxtb r3, r3
800452a: 4413 add r3, r2
800452c: b2da uxtb r2, r3
800452e: 79b9 ldrb r1, [r7, #6]
8004530: 79fb ldrb r3, [r7, #7]
8004532: 4618 mov r0, r3
8004534: f7ff fdd8 bl 80040e8 <SetMotPerc>
return RUNNING;
8004538: 2301 movs r3, #1
800453a: e012 b.n 8004562 <ramp+0x17a>
}else{
SetMotPerc(mot,dir,percEnd);
800453c: 793a ldrb r2, [r7, #4]
800453e: 79b9 ldrb r1, [r7, #6]
8004540: 79fb ldrb r3, [r7, #7]
8004542: 4618 mov r0, r3
8004544: f7ff fdd0 bl 80040e8 <SetMotPerc>
return DONE;
8004548: 2300 movs r3, #0
800454a: e00a b.n 8004562 <ramp+0x17a>
}
}else{
SetMotPerc(mot,dir,percEnd);
800454c: 793a ldrb r2, [r7, #4]
800454e: 79b9 ldrb r1, [r7, #6]
8004550: 79fb ldrb r3, [r7, #7]
8004552: 4618 mov r0, r3
8004554: f7ff fdc8 bl 80040e8 <SetMotPerc>
return DONE;
8004558: 2300 movs r3, #0
800455a: e002 b.n 8004562 <ramp+0x17a>
}
}else return RUNNING;
800455c: 2301 movs r3, #1
800455e: e000 b.n 8004562 <ramp+0x17a>
break;
}
return DONE;
8004560: 2300 movs r3, #0
}
8004562: 4618 mov r0, r3
8004564: 3714 adds r7, #20
8004566: 46bd mov sp, r7
8004568: bd90 pop {r4, r7, pc}
800456a: bf00 nop
800456c: 20000464 .word 0x20000464
8004570: 20000444 .word 0x20000444
8004574: 200003f4 .word 0x200003f4
08004578 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8004578: b480 push {r7}
800457a: b085 sub sp, #20
800457c: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
800457e: 4b15 ldr r3, [pc, #84] @ (80045d4 <HAL_MspInit+0x5c>)
8004580: 699b ldr r3, [r3, #24]
8004582: 4a14 ldr r2, [pc, #80] @ (80045d4 <HAL_MspInit+0x5c>)
8004584: f043 0301 orr.w r3, r3, #1
8004588: 6193 str r3, [r2, #24]
800458a: 4b12 ldr r3, [pc, #72] @ (80045d4 <HAL_MspInit+0x5c>)
800458c: 699b ldr r3, [r3, #24]
800458e: f003 0301 and.w r3, r3, #1
8004592: 60bb str r3, [r7, #8]
8004594: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
8004596: 4b0f ldr r3, [pc, #60] @ (80045d4 <HAL_MspInit+0x5c>)
8004598: 69db ldr r3, [r3, #28]
800459a: 4a0e ldr r2, [pc, #56] @ (80045d4 <HAL_MspInit+0x5c>)
800459c: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80045a0: 61d3 str r3, [r2, #28]
80045a2: 4b0c ldr r3, [pc, #48] @ (80045d4 <HAL_MspInit+0x5c>)
80045a4: 69db ldr r3, [r3, #28]
80045a6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80045aa: 607b str r3, [r7, #4]
80045ac: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
80045ae: 4b0a ldr r3, [pc, #40] @ (80045d8 <HAL_MspInit+0x60>)
80045b0: 685b ldr r3, [r3, #4]
80045b2: 60fb str r3, [r7, #12]
80045b4: 68fb ldr r3, [r7, #12]
80045b6: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
80045ba: 60fb str r3, [r7, #12]
80045bc: 68fb ldr r3, [r7, #12]
80045be: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
80045c2: 60fb str r3, [r7, #12]
80045c4: 4a04 ldr r2, [pc, #16] @ (80045d8 <HAL_MspInit+0x60>)
80045c6: 68fb ldr r3, [r7, #12]
80045c8: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
80045ca: bf00 nop
80045cc: 3714 adds r7, #20
80045ce: 46bd mov sp, r7
80045d0: bc80 pop {r7}
80045d2: 4770 bx lr
80045d4: 40021000 .word 0x40021000
80045d8: 40010000 .word 0x40010000
080045dc <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
80045dc: b580 push {r7, lr}
80045de: b08a sub sp, #40 @ 0x28
80045e0: af00 add r7, sp, #0
80045e2: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
80045e4: f107 0318 add.w r3, r7, #24
80045e8: 2200 movs r2, #0
80045ea: 601a str r2, [r3, #0]
80045ec: 605a str r2, [r3, #4]
80045ee: 609a str r2, [r3, #8]
80045f0: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
80045f2: 687b ldr r3, [r7, #4]
80045f4: 681b ldr r3, [r3, #0]
80045f6: 4a33 ldr r2, [pc, #204] @ (80046c4 <HAL_ADC_MspInit+0xe8>)
80045f8: 4293 cmp r3, r2
80045fa: d15f bne.n 80046bc <HAL_ADC_MspInit+0xe0>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
80045fc: 4b32 ldr r3, [pc, #200] @ (80046c8 <HAL_ADC_MspInit+0xec>)
80045fe: 699b ldr r3, [r3, #24]
8004600: 4a31 ldr r2, [pc, #196] @ (80046c8 <HAL_ADC_MspInit+0xec>)
8004602: f443 7300 orr.w r3, r3, #512 @ 0x200
8004606: 6193 str r3, [r2, #24]
8004608: 4b2f ldr r3, [pc, #188] @ (80046c8 <HAL_ADC_MspInit+0xec>)
800460a: 699b ldr r3, [r3, #24]
800460c: f403 7300 and.w r3, r3, #512 @ 0x200
8004610: 617b str r3, [r7, #20]
8004612: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004614: 4b2c ldr r3, [pc, #176] @ (80046c8 <HAL_ADC_MspInit+0xec>)
8004616: 699b ldr r3, [r3, #24]
8004618: 4a2b ldr r2, [pc, #172] @ (80046c8 <HAL_ADC_MspInit+0xec>)
800461a: f043 0304 orr.w r3, r3, #4
800461e: 6193 str r3, [r2, #24]
8004620: 4b29 ldr r3, [pc, #164] @ (80046c8 <HAL_ADC_MspInit+0xec>)
8004622: 699b ldr r3, [r3, #24]
8004624: f003 0304 and.w r3, r3, #4
8004628: 613b str r3, [r7, #16]
800462a: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
800462c: 4b26 ldr r3, [pc, #152] @ (80046c8 <HAL_ADC_MspInit+0xec>)
800462e: 699b ldr r3, [r3, #24]
8004630: 4a25 ldr r2, [pc, #148] @ (80046c8 <HAL_ADC_MspInit+0xec>)
8004632: f043 0308 orr.w r3, r3, #8
8004636: 6193 str r3, [r2, #24]
8004638: 4b23 ldr r3, [pc, #140] @ (80046c8 <HAL_ADC_MspInit+0xec>)
800463a: 699b ldr r3, [r3, #24]
800463c: f003 0308 and.w r3, r3, #8
8004640: 60fb str r3, [r7, #12]
8004642: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
8004644: 23f0 movs r3, #240 @ 0xf0
8004646: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004648: 2303 movs r3, #3
800464a: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800464c: f107 0318 add.w r3, r7, #24
8004650: 4619 mov r1, r3
8004652: 481e ldr r0, [pc, #120] @ (80046cc <HAL_ADC_MspInit+0xf0>)
8004654: f001 fae6 bl 8005c24 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8004658: 2301 movs r3, #1
800465a: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
800465c: 2303 movs r3, #3
800465e: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
8004660: f107 0318 add.w r3, r7, #24
8004664: 4619 mov r1, r3
8004666: 481a ldr r0, [pc, #104] @ (80046d0 <HAL_ADC_MspInit+0xf4>)
8004668: f001 fadc bl 8005c24 <HAL_GPIO_Init>
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
800466c: 4b19 ldr r3, [pc, #100] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
800466e: 4a1a ldr r2, [pc, #104] @ (80046d8 <HAL_ADC_MspInit+0xfc>)
8004670: 601a str r2, [r3, #0]
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
8004672: 4b18 ldr r3, [pc, #96] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
8004674: 2200 movs r2, #0
8004676: 605a str r2, [r3, #4]
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
8004678: 4b16 ldr r3, [pc, #88] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
800467a: 2200 movs r2, #0
800467c: 609a str r2, [r3, #8]
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
800467e: 4b15 ldr r3, [pc, #84] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
8004680: 2280 movs r2, #128 @ 0x80
8004682: 60da str r2, [r3, #12]
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
8004684: 4b13 ldr r3, [pc, #76] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
8004686: f44f 7280 mov.w r2, #256 @ 0x100
800468a: 611a str r2, [r3, #16]
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
800468c: 4b11 ldr r3, [pc, #68] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
800468e: f44f 6280 mov.w r2, #1024 @ 0x400
8004692: 615a str r2, [r3, #20]
hdma_adc1.Init.Mode = DMA_CIRCULAR;
8004694: 4b0f ldr r3, [pc, #60] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
8004696: 2220 movs r2, #32
8004698: 619a str r2, [r3, #24]
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
800469a: 4b0e ldr r3, [pc, #56] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
800469c: 2200 movs r2, #0
800469e: 61da str r2, [r3, #28]
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
80046a0: 480c ldr r0, [pc, #48] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
80046a2: f000 fed1 bl 8005448 <HAL_DMA_Init>
80046a6: 4603 mov r3, r0
80046a8: 2b00 cmp r3, #0
80046aa: d001 beq.n 80046b0 <HAL_ADC_MspInit+0xd4>
{
Error_Handler();
80046ac: f7fe fc96 bl 8002fdc <Error_Handler>
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
80046b0: 687b ldr r3, [r7, #4]
80046b2: 4a08 ldr r2, [pc, #32] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
80046b4: 621a str r2, [r3, #32]
80046b6: 4a07 ldr r2, [pc, #28] @ (80046d4 <HAL_ADC_MspInit+0xf8>)
80046b8: 687b ldr r3, [r7, #4]
80046ba: 6253 str r3, [r2, #36] @ 0x24
/* USER CODE END ADC1_MspInit 1 */
}
}
80046bc: bf00 nop
80046be: 3728 adds r7, #40 @ 0x28
80046c0: 46bd mov sp, r7
80046c2: bd80 pop {r7, pc}
80046c4: 40012400 .word 0x40012400
80046c8: 40021000 .word 0x40021000
80046cc: 40010800 .word 0x40010800
80046d0: 40010c00 .word 0x40010c00
80046d4: 200002d4 .word 0x200002d4
80046d8: 40020008 .word 0x40020008
080046dc <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
80046dc: b480 push {r7}
80046de: b085 sub sp, #20
80046e0: af00 add r7, sp, #0
80046e2: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
80046e4: 687b ldr r3, [r7, #4]
80046e6: 681b ldr r3, [r3, #0]
80046e8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80046ec: d10c bne.n 8004708 <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
80046ee: 4b11 ldr r3, [pc, #68] @ (8004734 <HAL_TIM_Base_MspInit+0x58>)
80046f0: 69db ldr r3, [r3, #28]
80046f2: 4a10 ldr r2, [pc, #64] @ (8004734 <HAL_TIM_Base_MspInit+0x58>)
80046f4: f043 0301 orr.w r3, r3, #1
80046f8: 61d3 str r3, [r2, #28]
80046fa: 4b0e ldr r3, [pc, #56] @ (8004734 <HAL_TIM_Base_MspInit+0x58>)
80046fc: 69db ldr r3, [r3, #28]
80046fe: f003 0301 and.w r3, r3, #1
8004702: 60fb str r3, [r7, #12]
8004704: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8004706: e010 b.n 800472a <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
8004708: 687b ldr r3, [r7, #4]
800470a: 681b ldr r3, [r3, #0]
800470c: 4a0a ldr r2, [pc, #40] @ (8004738 <HAL_TIM_Base_MspInit+0x5c>)
800470e: 4293 cmp r3, r2
8004710: d10b bne.n 800472a <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
8004712: 4b08 ldr r3, [pc, #32] @ (8004734 <HAL_TIM_Base_MspInit+0x58>)
8004714: 69db ldr r3, [r3, #28]
8004716: 4a07 ldr r2, [pc, #28] @ (8004734 <HAL_TIM_Base_MspInit+0x58>)
8004718: f043 0304 orr.w r3, r3, #4
800471c: 61d3 str r3, [r2, #28]
800471e: 4b05 ldr r3, [pc, #20] @ (8004734 <HAL_TIM_Base_MspInit+0x58>)
8004720: 69db ldr r3, [r3, #28]
8004722: f003 0304 and.w r3, r3, #4
8004726: 60bb str r3, [r7, #8]
8004728: 68bb ldr r3, [r7, #8]
}
800472a: bf00 nop
800472c: 3714 adds r7, #20
800472e: 46bd mov sp, r7
8004730: bc80 pop {r7}
8004732: 4770 bx lr
8004734: 40021000 .word 0x40021000
8004738: 40000800 .word 0x40000800
0800473c <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
800473c: b580 push {r7, lr}
800473e: b088 sub sp, #32
8004740: af00 add r7, sp, #0
8004742: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004744: f107 0310 add.w r3, r7, #16
8004748: 2200 movs r2, #0
800474a: 601a str r2, [r3, #0]
800474c: 605a str r2, [r3, #4]
800474e: 609a str r2, [r3, #8]
8004750: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
8004752: 687b ldr r3, [r7, #4]
8004754: 681b ldr r3, [r3, #0]
8004756: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800475a: d118 bne.n 800478e <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
800475c: 4b1d ldr r3, [pc, #116] @ (80047d4 <HAL_TIM_MspPostInit+0x98>)
800475e: 699b ldr r3, [r3, #24]
8004760: 4a1c ldr r2, [pc, #112] @ (80047d4 <HAL_TIM_MspPostInit+0x98>)
8004762: f043 0304 orr.w r3, r3, #4
8004766: 6193 str r3, [r2, #24]
8004768: 4b1a ldr r3, [pc, #104] @ (80047d4 <HAL_TIM_MspPostInit+0x98>)
800476a: 699b ldr r3, [r3, #24]
800476c: f003 0304 and.w r3, r3, #4
8004770: 60fb str r3, [r7, #12]
8004772: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
8004774: 230f movs r3, #15
8004776: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004778: 2302 movs r3, #2
800477a: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800477c: 2302 movs r3, #2
800477e: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004780: f107 0310 add.w r3, r7, #16
8004784: 4619 mov r1, r3
8004786: 4814 ldr r0, [pc, #80] @ (80047d8 <HAL_TIM_MspPostInit+0x9c>)
8004788: f001 fa4c bl 8005c24 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
800478c: e01d b.n 80047ca <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
800478e: 687b ldr r3, [r7, #4]
8004790: 681b ldr r3, [r3, #0]
8004792: 4a12 ldr r2, [pc, #72] @ (80047dc <HAL_TIM_MspPostInit+0xa0>)
8004794: 4293 cmp r3, r2
8004796: d118 bne.n 80047ca <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
8004798: 4b0e ldr r3, [pc, #56] @ (80047d4 <HAL_TIM_MspPostInit+0x98>)
800479a: 699b ldr r3, [r3, #24]
800479c: 4a0d ldr r2, [pc, #52] @ (80047d4 <HAL_TIM_MspPostInit+0x98>)
800479e: f043 0308 orr.w r3, r3, #8
80047a2: 6193 str r3, [r2, #24]
80047a4: 4b0b ldr r3, [pc, #44] @ (80047d4 <HAL_TIM_MspPostInit+0x98>)
80047a6: 699b ldr r3, [r3, #24]
80047a8: f003 0308 and.w r3, r3, #8
80047ac: 60bb str r3, [r7, #8]
80047ae: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
80047b0: f44f 7370 mov.w r3, #960 @ 0x3c0
80047b4: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80047b6: 2302 movs r3, #2
80047b8: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80047ba: 2302 movs r3, #2
80047bc: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80047be: f107 0310 add.w r3, r7, #16
80047c2: 4619 mov r1, r3
80047c4: 4806 ldr r0, [pc, #24] @ (80047e0 <HAL_TIM_MspPostInit+0xa4>)
80047c6: f001 fa2d bl 8005c24 <HAL_GPIO_Init>
}
80047ca: bf00 nop
80047cc: 3720 adds r7, #32
80047ce: 46bd mov sp, r7
80047d0: bd80 pop {r7, pc}
80047d2: bf00 nop
80047d4: 40021000 .word 0x40021000
80047d8: 40010800 .word 0x40010800
80047dc: 40000800 .word 0x40000800
80047e0: 40010c00 .word 0x40010c00
080047e4 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
80047e4: b580 push {r7, lr}
80047e6: b088 sub sp, #32
80047e8: af00 add r7, sp, #0
80047ea: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
80047ec: f107 0310 add.w r3, r7, #16
80047f0: 2200 movs r2, #0
80047f2: 601a str r2, [r3, #0]
80047f4: 605a str r2, [r3, #4]
80047f6: 609a str r2, [r3, #8]
80047f8: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
80047fa: 687b ldr r3, [r7, #4]
80047fc: 681b ldr r3, [r3, #0]
80047fe: 4a1c ldr r2, [pc, #112] @ (8004870 <HAL_UART_MspInit+0x8c>)
8004800: 4293 cmp r3, r2
8004802: d131 bne.n 8004868 <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8004804: 4b1b ldr r3, [pc, #108] @ (8004874 <HAL_UART_MspInit+0x90>)
8004806: 699b ldr r3, [r3, #24]
8004808: 4a1a ldr r2, [pc, #104] @ (8004874 <HAL_UART_MspInit+0x90>)
800480a: f443 4380 orr.w r3, r3, #16384 @ 0x4000
800480e: 6193 str r3, [r2, #24]
8004810: 4b18 ldr r3, [pc, #96] @ (8004874 <HAL_UART_MspInit+0x90>)
8004812: 699b ldr r3, [r3, #24]
8004814: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004818: 60fb str r3, [r7, #12]
800481a: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
800481c: 4b15 ldr r3, [pc, #84] @ (8004874 <HAL_UART_MspInit+0x90>)
800481e: 699b ldr r3, [r3, #24]
8004820: 4a14 ldr r2, [pc, #80] @ (8004874 <HAL_UART_MspInit+0x90>)
8004822: f043 0304 orr.w r3, r3, #4
8004826: 6193 str r3, [r2, #24]
8004828: 4b12 ldr r3, [pc, #72] @ (8004874 <HAL_UART_MspInit+0x90>)
800482a: 699b ldr r3, [r3, #24]
800482c: f003 0304 and.w r3, r3, #4
8004830: 60bb str r3, [r7, #8]
8004832: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
8004834: f44f 7300 mov.w r3, #512 @ 0x200
8004838: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
800483a: 2302 movs r3, #2
800483c: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
800483e: 2303 movs r3, #3
8004840: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004842: f107 0310 add.w r3, r7, #16
8004846: 4619 mov r1, r3
8004848: 480b ldr r0, [pc, #44] @ (8004878 <HAL_UART_MspInit+0x94>)
800484a: f001 f9eb bl 8005c24 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
800484e: f44f 6380 mov.w r3, #1024 @ 0x400
8004852: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8004854: 2300 movs r3, #0
8004856: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8004858: 2300 movs r3, #0
800485a: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800485c: f107 0310 add.w r3, r7, #16
8004860: 4619 mov r1, r3
8004862: 4805 ldr r0, [pc, #20] @ (8004878 <HAL_UART_MspInit+0x94>)
8004864: f001 f9de bl 8005c24 <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8004868: bf00 nop
800486a: 3720 adds r7, #32
800486c: 46bd mov sp, r7
800486e: bd80 pop {r7, pc}
8004870: 40013800 .word 0x40013800
8004874: 40021000 .word 0x40021000
8004878: 40010800 .word 0x40010800
0800487c <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
800487c: b480 push {r7}
800487e: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8004880: bf00 nop
8004882: e7fd b.n 8004880 <NMI_Handler+0x4>
08004884 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8004884: b480 push {r7}
8004886: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8004888: bf00 nop
800488a: e7fd b.n 8004888 <HardFault_Handler+0x4>
0800488c <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
800488c: b480 push {r7}
800488e: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8004890: bf00 nop
8004892: e7fd b.n 8004890 <MemManage_Handler+0x4>
08004894 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8004894: b480 push {r7}
8004896: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8004898: bf00 nop
800489a: e7fd b.n 8004898 <BusFault_Handler+0x4>
0800489c <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
800489c: b480 push {r7}
800489e: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
80048a0: bf00 nop
80048a2: e7fd b.n 80048a0 <UsageFault_Handler+0x4>
080048a4 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
80048a4: b480 push {r7}
80048a6: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
80048a8: bf00 nop
80048aa: 46bd mov sp, r7
80048ac: bc80 pop {r7}
80048ae: 4770 bx lr
080048b0 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
80048b0: b480 push {r7}
80048b2: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
80048b4: bf00 nop
80048b6: 46bd mov sp, r7
80048b8: bc80 pop {r7}
80048ba: 4770 bx lr
080048bc <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
80048bc: b480 push {r7}
80048be: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
80048c0: bf00 nop
80048c2: 46bd mov sp, r7
80048c4: bc80 pop {r7}
80048c6: 4770 bx lr
080048c8 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
80048c8: b580 push {r7, lr}
80048ca: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
80048cc: f000 f8c0 bl 8004a50 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
80048d0: f000 fdb3 bl 800543a <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
80048d4: bf00 nop
80048d6: bd80 pop {r7, pc}
080048d8 <DMA1_Channel1_IRQHandler>:
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
80048d8: b580 push {r7, lr}
80048da: af00 add r7, sp, #0
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
80048dc: 4802 ldr r0, [pc, #8] @ (80048e8 <DMA1_Channel1_IRQHandler+0x10>)
80048de: f000 fe6d bl 80055bc <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
80048e2: bf00 nop
80048e4: bd80 pop {r7, pc}
80048e6: bf00 nop
80048e8: 200002d4 .word 0x200002d4
080048ec <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
80048ec: b580 push {r7, lr}
80048ee: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
80048f0: 4802 ldr r0, [pc, #8] @ (80048fc <USB_LP_CAN1_RX0_IRQHandler+0x10>)
80048f2: f001 fc66 bl 80061c2 <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
80048f6: bf00 nop
80048f8: bd80 pop {r7, pc}
80048fa: bf00 nop
80048fc: 2000125c .word 0x2000125c
08004900 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8004900: b580 push {r7, lr}
8004902: b086 sub sp, #24
8004904: af00 add r7, sp, #0
8004906: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8004908: 4a14 ldr r2, [pc, #80] @ (800495c <_sbrk+0x5c>)
800490a: 4b15 ldr r3, [pc, #84] @ (8004960 <_sbrk+0x60>)
800490c: 1ad3 subs r3, r2, r3
800490e: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8004910: 697b ldr r3, [r7, #20]
8004912: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8004914: 4b13 ldr r3, [pc, #76] @ (8004964 <_sbrk+0x64>)
8004916: 681b ldr r3, [r3, #0]
8004918: 2b00 cmp r3, #0
800491a: d102 bne.n 8004922 <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
800491c: 4b11 ldr r3, [pc, #68] @ (8004964 <_sbrk+0x64>)
800491e: 4a12 ldr r2, [pc, #72] @ (8004968 <_sbrk+0x68>)
8004920: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8004922: 4b10 ldr r3, [pc, #64] @ (8004964 <_sbrk+0x64>)
8004924: 681a ldr r2, [r3, #0]
8004926: 687b ldr r3, [r7, #4]
8004928: 4413 add r3, r2
800492a: 693a ldr r2, [r7, #16]
800492c: 429a cmp r2, r3
800492e: d207 bcs.n 8004940 <_sbrk+0x40>
{
errno = ENOMEM;
8004930: f009 fa2c bl 800dd8c <__errno>
8004934: 4603 mov r3, r0
8004936: 220c movs r2, #12
8004938: 601a str r2, [r3, #0]
return (void *)-1;
800493a: f04f 33ff mov.w r3, #4294967295
800493e: e009 b.n 8004954 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8004940: 4b08 ldr r3, [pc, #32] @ (8004964 <_sbrk+0x64>)
8004942: 681b ldr r3, [r3, #0]
8004944: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8004946: 4b07 ldr r3, [pc, #28] @ (8004964 <_sbrk+0x64>)
8004948: 681a ldr r2, [r3, #0]
800494a: 687b ldr r3, [r7, #4]
800494c: 4413 add r3, r2
800494e: 4a05 ldr r2, [pc, #20] @ (8004964 <_sbrk+0x64>)
8004950: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8004952: 68fb ldr r3, [r7, #12]
}
8004954: 4618 mov r0, r3
8004956: 3718 adds r7, #24
8004958: 46bd mov sp, r7
800495a: bd80 pop {r7, pc}
800495c: 20005000 .word 0x20005000
8004960: 00000400 .word 0x00000400
8004964: 20000468 .word 0x20000468
8004968: 200018a0 .word 0x200018a0
0800496c <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
800496c: b480 push {r7}
800496e: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8004970: bf00 nop
8004972: 46bd mov sp, r7
8004974: bc80 pop {r7}
8004976: 4770 bx lr
08004978 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8004978: f7ff fff8 bl 800496c <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
800497c: 480b ldr r0, [pc, #44] @ (80049ac <LoopFillZerobss+0xe>)
ldr r1, =_edata
800497e: 490c ldr r1, [pc, #48] @ (80049b0 <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8004980: 4a0c ldr r2, [pc, #48] @ (80049b4 <LoopFillZerobss+0x16>)
movs r3, #0
8004982: 2300 movs r3, #0
b LoopCopyDataInit
8004984: e002 b.n 800498c <LoopCopyDataInit>
08004986 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8004986: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8004988: 50c4 str r4, [r0, r3]
adds r3, r3, #4
800498a: 3304 adds r3, #4
0800498c <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
800498c: 18c4 adds r4, r0, r3
cmp r4, r1
800498e: 428c cmp r4, r1
bcc CopyDataInit
8004990: d3f9 bcc.n 8004986 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8004992: 4a09 ldr r2, [pc, #36] @ (80049b8 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8004994: 4c09 ldr r4, [pc, #36] @ (80049bc <LoopFillZerobss+0x1e>)
movs r3, #0
8004996: 2300 movs r3, #0
b LoopFillZerobss
8004998: e001 b.n 800499e <LoopFillZerobss>
0800499a <FillZerobss>:
FillZerobss:
str r3, [r2]
800499a: 6013 str r3, [r2, #0]
adds r2, r2, #4
800499c: 3204 adds r2, #4
0800499e <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
800499e: 42a2 cmp r2, r4
bcc FillZerobss
80049a0: d3fb bcc.n 800499a <FillZerobss>
/* Call static constructors */
bl __libc_init_array
80049a2: f009 f9f9 bl 800dd98 <__libc_init_array>
/* Call the application's entry point.*/
bl main
80049a6: f7fd ffb5 bl 8002914 <main>
bx lr
80049aa: 4770 bx lr
ldr r0, =_sdata
80049ac: 20000000 .word 0x20000000
ldr r1, =_edata
80049b0: 200001dc .word 0x200001dc
ldr r2, =_sidata
80049b4: 0800ecd0 .word 0x0800ecd0
ldr r2, =_sbss
80049b8: 200001e0 .word 0x200001e0
ldr r4, =_ebss
80049bc: 2000189c .word 0x2000189c
080049c0 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
80049c0: e7fe b.n 80049c0 <ADC1_2_IRQHandler>
...
080049c4 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
80049c4: b580 push {r7, lr}
80049c6: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
80049c8: 4b08 ldr r3, [pc, #32] @ (80049ec <HAL_Init+0x28>)
80049ca: 681b ldr r3, [r3, #0]
80049cc: 4a07 ldr r2, [pc, #28] @ (80049ec <HAL_Init+0x28>)
80049ce: f043 0310 orr.w r3, r3, #16
80049d2: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
80049d4: 2003 movs r0, #3
80049d6: f000 fcef bl 80053b8 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
80049da: 200f movs r0, #15
80049dc: f000 f808 bl 80049f0 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
80049e0: f7ff fdca bl 8004578 <HAL_MspInit>
/* Return function status */
return HAL_OK;
80049e4: 2300 movs r3, #0
}
80049e6: 4618 mov r0, r3
80049e8: bd80 pop {r7, pc}
80049ea: bf00 nop
80049ec: 40022000 .word 0x40022000
080049f0 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
80049f0: b580 push {r7, lr}
80049f2: b082 sub sp, #8
80049f4: af00 add r7, sp, #0
80049f6: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
80049f8: 4b12 ldr r3, [pc, #72] @ (8004a44 <HAL_InitTick+0x54>)
80049fa: 681a ldr r2, [r3, #0]
80049fc: 4b12 ldr r3, [pc, #72] @ (8004a48 <HAL_InitTick+0x58>)
80049fe: 781b ldrb r3, [r3, #0]
8004a00: 4619 mov r1, r3
8004a02: f44f 737a mov.w r3, #1000 @ 0x3e8
8004a06: fbb3 f3f1 udiv r3, r3, r1
8004a0a: fbb2 f3f3 udiv r3, r2, r3
8004a0e: 4618 mov r0, r3
8004a10: f000 fd07 bl 8005422 <HAL_SYSTICK_Config>
8004a14: 4603 mov r3, r0
8004a16: 2b00 cmp r3, #0
8004a18: d001 beq.n 8004a1e <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8004a1a: 2301 movs r3, #1
8004a1c: e00e b.n 8004a3c <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8004a1e: 687b ldr r3, [r7, #4]
8004a20: 2b0f cmp r3, #15
8004a22: d80a bhi.n 8004a3a <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8004a24: 2200 movs r2, #0
8004a26: 6879 ldr r1, [r7, #4]
8004a28: f04f 30ff mov.w r0, #4294967295
8004a2c: f000 fccf bl 80053ce <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8004a30: 4a06 ldr r2, [pc, #24] @ (8004a4c <HAL_InitTick+0x5c>)
8004a32: 687b ldr r3, [r7, #4]
8004a34: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8004a36: 2300 movs r3, #0
8004a38: e000 b.n 8004a3c <HAL_InitTick+0x4c>
return HAL_ERROR;
8004a3a: 2301 movs r3, #1
}
8004a3c: 4618 mov r0, r3
8004a3e: 3708 adds r7, #8
8004a40: 46bd mov sp, r7
8004a42: bd80 pop {r7, pc}
8004a44: 20000010 .word 0x20000010
8004a48: 20000018 .word 0x20000018
8004a4c: 20000014 .word 0x20000014
08004a50 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8004a50: b480 push {r7}
8004a52: af00 add r7, sp, #0
uwTick += uwTickFreq;
8004a54: 4b05 ldr r3, [pc, #20] @ (8004a6c <HAL_IncTick+0x1c>)
8004a56: 781b ldrb r3, [r3, #0]
8004a58: 461a mov r2, r3
8004a5a: 4b05 ldr r3, [pc, #20] @ (8004a70 <HAL_IncTick+0x20>)
8004a5c: 681b ldr r3, [r3, #0]
8004a5e: 4413 add r3, r2
8004a60: 4a03 ldr r2, [pc, #12] @ (8004a70 <HAL_IncTick+0x20>)
8004a62: 6013 str r3, [r2, #0]
}
8004a64: bf00 nop
8004a66: 46bd mov sp, r7
8004a68: bc80 pop {r7}
8004a6a: 4770 bx lr
8004a6c: 20000018 .word 0x20000018
8004a70: 2000046c .word 0x2000046c
08004a74 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8004a74: b480 push {r7}
8004a76: af00 add r7, sp, #0
return uwTick;
8004a78: 4b02 ldr r3, [pc, #8] @ (8004a84 <HAL_GetTick+0x10>)
8004a7a: 681b ldr r3, [r3, #0]
}
8004a7c: 4618 mov r0, r3
8004a7e: 46bd mov sp, r7
8004a80: bc80 pop {r7}
8004a82: 4770 bx lr
8004a84: 2000046c .word 0x2000046c
08004a88 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8004a88: b580 push {r7, lr}
8004a8a: b086 sub sp, #24
8004a8c: af00 add r7, sp, #0
8004a8e: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8004a90: 2300 movs r3, #0
8004a92: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
8004a94: 2300 movs r3, #0
8004a96: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
8004a98: 2300 movs r3, #0
8004a9a: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
8004a9c: 2300 movs r3, #0
8004a9e: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
8004aa0: 687b ldr r3, [r7, #4]
8004aa2: 2b00 cmp r3, #0
8004aa4: d101 bne.n 8004aaa <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
8004aa6: 2301 movs r3, #1
8004aa8: e0be b.n 8004c28 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8004aaa: 687b ldr r3, [r7, #4]
8004aac: 689b ldr r3, [r3, #8]
8004aae: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
8004ab0: 687b ldr r3, [r7, #4]
8004ab2: 6a9b ldr r3, [r3, #40] @ 0x28
8004ab4: 2b00 cmp r3, #0
8004ab6: d109 bne.n 8004acc <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8004ab8: 687b ldr r3, [r7, #4]
8004aba: 2200 movs r2, #0
8004abc: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8004abe: 687b ldr r3, [r7, #4]
8004ac0: 2200 movs r2, #0
8004ac2: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
8004ac6: 6878 ldr r0, [r7, #4]
8004ac8: f7ff fd88 bl 80045dc <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
8004acc: 6878 ldr r0, [r7, #4]
8004ace: f000 faff bl 80050d0 <ADC_ConversionStop_Disable>
8004ad2: 4603 mov r3, r0
8004ad4: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
8004ad6: 687b ldr r3, [r7, #4]
8004ad8: 6a9b ldr r3, [r3, #40] @ 0x28
8004ada: f003 0310 and.w r3, r3, #16
8004ade: 2b00 cmp r3, #0
8004ae0: f040 8099 bne.w 8004c16 <HAL_ADC_Init+0x18e>
8004ae4: 7dfb ldrb r3, [r7, #23]
8004ae6: 2b00 cmp r3, #0
8004ae8: f040 8095 bne.w 8004c16 <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
8004aec: 687b ldr r3, [r7, #4]
8004aee: 6a9b ldr r3, [r3, #40] @ 0x28
8004af0: f423 5388 bic.w r3, r3, #4352 @ 0x1100
8004af4: f023 0302 bic.w r3, r3, #2
8004af8: f043 0202 orr.w r2, r3, #2
8004afc: 687b ldr r3, [r7, #4]
8004afe: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
8004b00: 687b ldr r3, [r7, #4]
8004b02: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8004b04: 687b ldr r3, [r7, #4]
8004b06: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8004b08: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
8004b0a: 687b ldr r3, [r7, #4]
8004b0c: 7b1b ldrb r3, [r3, #12]
8004b0e: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8004b10: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
8004b12: 68ba ldr r2, [r7, #8]
8004b14: 4313 orrs r3, r2
8004b16: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8004b18: 687b ldr r3, [r7, #4]
8004b1a: 689b ldr r3, [r3, #8]
8004b1c: f5b3 7f80 cmp.w r3, #256 @ 0x100
8004b20: d003 beq.n 8004b2a <HAL_ADC_Init+0xa2>
8004b22: 687b ldr r3, [r7, #4]
8004b24: 689b ldr r3, [r3, #8]
8004b26: 2b01 cmp r3, #1
8004b28: d102 bne.n 8004b30 <HAL_ADC_Init+0xa8>
8004b2a: f44f 7380 mov.w r3, #256 @ 0x100
8004b2e: e000 b.n 8004b32 <HAL_ADC_Init+0xaa>
8004b30: 2300 movs r3, #0
8004b32: 693a ldr r2, [r7, #16]
8004b34: 4313 orrs r3, r2
8004b36: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8004b38: 687b ldr r3, [r7, #4]
8004b3a: 7d1b ldrb r3, [r3, #20]
8004b3c: 2b01 cmp r3, #1
8004b3e: d119 bne.n 8004b74 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8004b40: 687b ldr r3, [r7, #4]
8004b42: 7b1b ldrb r3, [r3, #12]
8004b44: 2b00 cmp r3, #0
8004b46: d109 bne.n 8004b5c <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8004b48: 687b ldr r3, [r7, #4]
8004b4a: 699b ldr r3, [r3, #24]
8004b4c: 3b01 subs r3, #1
8004b4e: 035a lsls r2, r3, #13
8004b50: 693b ldr r3, [r7, #16]
8004b52: 4313 orrs r3, r2
8004b54: f443 6300 orr.w r3, r3, #2048 @ 0x800
8004b58: 613b str r3, [r7, #16]
8004b5a: e00b b.n 8004b74 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8004b5c: 687b ldr r3, [r7, #4]
8004b5e: 6a9b ldr r3, [r3, #40] @ 0x28
8004b60: f043 0220 orr.w r2, r3, #32
8004b64: 687b ldr r3, [r7, #4]
8004b66: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8004b68: 687b ldr r3, [r7, #4]
8004b6a: 6adb ldr r3, [r3, #44] @ 0x2c
8004b6c: f043 0201 orr.w r2, r3, #1
8004b70: 687b ldr r3, [r7, #4]
8004b72: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
8004b74: 687b ldr r3, [r7, #4]
8004b76: 681b ldr r3, [r3, #0]
8004b78: 685b ldr r3, [r3, #4]
8004b7a: f423 4169 bic.w r1, r3, #59648 @ 0xe900
8004b7e: 687b ldr r3, [r7, #4]
8004b80: 681b ldr r3, [r3, #0]
8004b82: 693a ldr r2, [r7, #16]
8004b84: 430a orrs r2, r1
8004b86: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
8004b88: 687b ldr r3, [r7, #4]
8004b8a: 681b ldr r3, [r3, #0]
8004b8c: 689a ldr r2, [r3, #8]
8004b8e: 4b28 ldr r3, [pc, #160] @ (8004c30 <HAL_ADC_Init+0x1a8>)
8004b90: 4013 ands r3, r2
8004b92: 687a ldr r2, [r7, #4]
8004b94: 6812 ldr r2, [r2, #0]
8004b96: 68b9 ldr r1, [r7, #8]
8004b98: 430b orrs r3, r1
8004b9a: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
8004b9c: 687b ldr r3, [r7, #4]
8004b9e: 689b ldr r3, [r3, #8]
8004ba0: f5b3 7f80 cmp.w r3, #256 @ 0x100
8004ba4: d003 beq.n 8004bae <HAL_ADC_Init+0x126>
8004ba6: 687b ldr r3, [r7, #4]
8004ba8: 689b ldr r3, [r3, #8]
8004baa: 2b01 cmp r3, #1
8004bac: d104 bne.n 8004bb8 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
8004bae: 687b ldr r3, [r7, #4]
8004bb0: 691b ldr r3, [r3, #16]
8004bb2: 3b01 subs r3, #1
8004bb4: 051b lsls r3, r3, #20
8004bb6: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
8004bb8: 687b ldr r3, [r7, #4]
8004bba: 681b ldr r3, [r3, #0]
8004bbc: 6adb ldr r3, [r3, #44] @ 0x2c
8004bbe: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
8004bc2: 687b ldr r3, [r7, #4]
8004bc4: 681b ldr r3, [r3, #0]
8004bc6: 68fa ldr r2, [r7, #12]
8004bc8: 430a orrs r2, r1
8004bca: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8004bcc: 687b ldr r3, [r7, #4]
8004bce: 681b ldr r3, [r3, #0]
8004bd0: 689a ldr r2, [r3, #8]
8004bd2: 4b18 ldr r3, [pc, #96] @ (8004c34 <HAL_ADC_Init+0x1ac>)
8004bd4: 4013 ands r3, r2
8004bd6: 68ba ldr r2, [r7, #8]
8004bd8: 429a cmp r2, r3
8004bda: d10b bne.n 8004bf4 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
8004bdc: 687b ldr r3, [r7, #4]
8004bde: 2200 movs r2, #0
8004be0: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
8004be2: 687b ldr r3, [r7, #4]
8004be4: 6a9b ldr r3, [r3, #40] @ 0x28
8004be6: f023 0303 bic.w r3, r3, #3
8004bea: f043 0201 orr.w r2, r3, #1
8004bee: 687b ldr r3, [r7, #4]
8004bf0: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8004bf2: e018 b.n 8004c26 <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8004bf4: 687b ldr r3, [r7, #4]
8004bf6: 6a9b ldr r3, [r3, #40] @ 0x28
8004bf8: f023 0312 bic.w r3, r3, #18
8004bfc: f043 0210 orr.w r2, r3, #16
8004c00: 687b ldr r3, [r7, #4]
8004c02: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8004c04: 687b ldr r3, [r7, #4]
8004c06: 6adb ldr r3, [r3, #44] @ 0x2c
8004c08: f043 0201 orr.w r2, r3, #1
8004c0c: 687b ldr r3, [r7, #4]
8004c0e: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
8004c10: 2301 movs r3, #1
8004c12: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8004c14: e007 b.n 8004c26 <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8004c16: 687b ldr r3, [r7, #4]
8004c18: 6a9b ldr r3, [r3, #40] @ 0x28
8004c1a: f043 0210 orr.w r2, r3, #16
8004c1e: 687b ldr r3, [r7, #4]
8004c20: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8004c22: 2301 movs r3, #1
8004c24: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8004c26: 7dfb ldrb r3, [r7, #23]
}
8004c28: 4618 mov r0, r3
8004c2a: 3718 adds r7, #24
8004c2c: 46bd mov sp, r7
8004c2e: bd80 pop {r7, pc}
8004c30: ffe1f7fd .word 0xffe1f7fd
8004c34: ff1f0efe .word 0xff1f0efe
08004c38 <HAL_ADC_Start_DMA>:
* @param pData: The destination Buffer address.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @retval None
*/
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
{
8004c38: b580 push {r7, lr}
8004c3a: b086 sub sp, #24
8004c3c: af00 add r7, sp, #0
8004c3e: 60f8 str r0, [r7, #12]
8004c40: 60b9 str r1, [r7, #8]
8004c42: 607a str r2, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8004c44: 2300 movs r3, #0
8004c46: 75fb strb r3, [r7, #23]
assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
/* Verification if multimode is disabled (for devices with several ADC) */
/* If multimode is enabled, dedicated function multimode conversion */
/* start DMA must be used. */
if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
8004c48: 68fb ldr r3, [r7, #12]
8004c4a: 681b ldr r3, [r3, #0]
8004c4c: 4a64 ldr r2, [pc, #400] @ (8004de0 <HAL_ADC_Start_DMA+0x1a8>)
8004c4e: 4293 cmp r3, r2
8004c50: d004 beq.n 8004c5c <HAL_ADC_Start_DMA+0x24>
8004c52: 68fb ldr r3, [r7, #12]
8004c54: 681b ldr r3, [r3, #0]
8004c56: 4a63 ldr r2, [pc, #396] @ (8004de4 <HAL_ADC_Start_DMA+0x1ac>)
8004c58: 4293 cmp r3, r2
8004c5a: d106 bne.n 8004c6a <HAL_ADC_Start_DMA+0x32>
8004c5c: 4b60 ldr r3, [pc, #384] @ (8004de0 <HAL_ADC_Start_DMA+0x1a8>)
8004c5e: 685b ldr r3, [r3, #4]
8004c60: f403 2370 and.w r3, r3, #983040 @ 0xf0000
8004c64: 2b00 cmp r3, #0
8004c66: f040 80b3 bne.w 8004dd0 <HAL_ADC_Start_DMA+0x198>
{
/* Process locked */
__HAL_LOCK(hadc);
8004c6a: 68fb ldr r3, [r7, #12]
8004c6c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8004c70: 2b01 cmp r3, #1
8004c72: d101 bne.n 8004c78 <HAL_ADC_Start_DMA+0x40>
8004c74: 2302 movs r3, #2
8004c76: e0ae b.n 8004dd6 <HAL_ADC_Start_DMA+0x19e>
8004c78: 68fb ldr r3, [r7, #12]
8004c7a: 2201 movs r2, #1
8004c7c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Enable the ADC peripheral */
tmp_hal_status = ADC_Enable(hadc);
8004c80: 68f8 ldr r0, [r7, #12]
8004c82: f000 f9cb bl 800501c <ADC_Enable>
8004c86: 4603 mov r3, r0
8004c88: 75fb strb r3, [r7, #23]
/* Start conversion if ADC is effectively enabled */
if (tmp_hal_status == HAL_OK)
8004c8a: 7dfb ldrb r3, [r7, #23]
8004c8c: 2b00 cmp r3, #0
8004c8e: f040 809a bne.w 8004dc6 <HAL_ADC_Start_DMA+0x18e>
{
/* Set ADC state */
/* - Clear state bitfield related to regular group conversion results */
/* - Set state bitfield related to regular operation */
ADC_STATE_CLR_SET(hadc->State,
8004c92: 68fb ldr r3, [r7, #12]
8004c94: 6a9b ldr r3, [r3, #40] @ 0x28
8004c96: f423 6370 bic.w r3, r3, #3840 @ 0xf00
8004c9a: f023 0301 bic.w r3, r3, #1
8004c9e: f443 7280 orr.w r2, r3, #256 @ 0x100
8004ca2: 68fb ldr r3, [r7, #12]
8004ca4: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_REG_BUSY);
/* Set group injected state (from auto-injection) and multimode state */
/* for all cases of multimode: independent mode, multimode ADC master */
/* or multimode ADC slave (for devices with several ADCs): */
if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
8004ca6: 68fb ldr r3, [r7, #12]
8004ca8: 681b ldr r3, [r3, #0]
8004caa: 4a4e ldr r2, [pc, #312] @ (8004de4 <HAL_ADC_Start_DMA+0x1ac>)
8004cac: 4293 cmp r3, r2
8004cae: d105 bne.n 8004cbc <HAL_ADC_Start_DMA+0x84>
8004cb0: 4b4b ldr r3, [pc, #300] @ (8004de0 <HAL_ADC_Start_DMA+0x1a8>)
8004cb2: 685b ldr r3, [r3, #4]
8004cb4: f403 2370 and.w r3, r3, #983040 @ 0xf0000
8004cb8: 2b00 cmp r3, #0
8004cba: d115 bne.n 8004ce8 <HAL_ADC_Start_DMA+0xb0>
{
/* Set ADC state (ADC independent or master) */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8004cbc: 68fb ldr r3, [r7, #12]
8004cbe: 6a9b ldr r3, [r3, #40] @ 0x28
8004cc0: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
8004cc4: 68fb ldr r3, [r7, #12]
8004cc6: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8004cc8: 68fb ldr r3, [r7, #12]
8004cca: 681b ldr r3, [r3, #0]
8004ccc: 685b ldr r3, [r3, #4]
8004cce: f403 6380 and.w r3, r3, #1024 @ 0x400
8004cd2: 2b00 cmp r3, #0
8004cd4: d026 beq.n 8004d24 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8004cd6: 68fb ldr r3, [r7, #12]
8004cd8: 6a9b ldr r3, [r3, #40] @ 0x28
8004cda: f423 5340 bic.w r3, r3, #12288 @ 0x3000
8004cde: f443 5280 orr.w r2, r3, #4096 @ 0x1000
8004ce2: 68fb ldr r3, [r7, #12]
8004ce4: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8004ce6: e01d b.n 8004d24 <HAL_ADC_Start_DMA+0xec>
}
}
else
{
/* Set ADC state (ADC slave) */
SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8004ce8: 68fb ldr r3, [r7, #12]
8004cea: 6a9b ldr r3, [r3, #40] @ 0x28
8004cec: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
8004cf0: 68fb ldr r3, [r7, #12]
8004cf2: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
8004cf4: 68fb ldr r3, [r7, #12]
8004cf6: 681b ldr r3, [r3, #0]
8004cf8: 4a39 ldr r2, [pc, #228] @ (8004de0 <HAL_ADC_Start_DMA+0x1a8>)
8004cfa: 4293 cmp r3, r2
8004cfc: d004 beq.n 8004d08 <HAL_ADC_Start_DMA+0xd0>
8004cfe: 68fb ldr r3, [r7, #12]
8004d00: 681b ldr r3, [r3, #0]
8004d02: 4a38 ldr r2, [pc, #224] @ (8004de4 <HAL_ADC_Start_DMA+0x1ac>)
8004d04: 4293 cmp r3, r2
8004d06: d10d bne.n 8004d24 <HAL_ADC_Start_DMA+0xec>
8004d08: 4b35 ldr r3, [pc, #212] @ (8004de0 <HAL_ADC_Start_DMA+0x1a8>)
8004d0a: 685b ldr r3, [r3, #4]
8004d0c: f403 6380 and.w r3, r3, #1024 @ 0x400
8004d10: 2b00 cmp r3, #0
8004d12: d007 beq.n 8004d24 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8004d14: 68fb ldr r3, [r7, #12]
8004d16: 6a9b ldr r3, [r3, #40] @ 0x28
8004d18: f423 5340 bic.w r3, r3, #12288 @ 0x3000
8004d1c: f443 5280 orr.w r2, r3, #4096 @ 0x1000
8004d20: 68fb ldr r3, [r7, #12]
8004d22: 629a str r2, [r3, #40] @ 0x28
}
}
/* State machine update: Check if an injected conversion is ongoing */
if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8004d24: 68fb ldr r3, [r7, #12]
8004d26: 6a9b ldr r3, [r3, #40] @ 0x28
8004d28: f403 5380 and.w r3, r3, #4096 @ 0x1000
8004d2c: 2b00 cmp r3, #0
8004d2e: d006 beq.n 8004d3e <HAL_ADC_Start_DMA+0x106>
{
/* Reset ADC error code fields related to conversions on group regular */
CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
8004d30: 68fb ldr r3, [r7, #12]
8004d32: 6adb ldr r3, [r3, #44] @ 0x2c
8004d34: f023 0206 bic.w r2, r3, #6
8004d38: 68fb ldr r3, [r7, #12]
8004d3a: 62da str r2, [r3, #44] @ 0x2c
8004d3c: e002 b.n 8004d44 <HAL_ADC_Start_DMA+0x10c>
}
else
{
/* Reset ADC all error code fields */
ADC_CLEAR_ERRORCODE(hadc);
8004d3e: 68fb ldr r3, [r7, #12]
8004d40: 2200 movs r2, #0
8004d42: 62da str r2, [r3, #44] @ 0x2c
}
/* Process unlocked */
/* Unlock before starting ADC conversions: in case of potential */
/* interruption, to let the process to ADC IRQ Handler. */
__HAL_UNLOCK(hadc);
8004d44: 68fb ldr r3, [r7, #12]
8004d46: 2200 movs r2, #0
8004d48: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Set the DMA transfer complete callback */
hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
8004d4c: 68fb ldr r3, [r7, #12]
8004d4e: 6a1b ldr r3, [r3, #32]
8004d50: 4a25 ldr r2, [pc, #148] @ (8004de8 <HAL_ADC_Start_DMA+0x1b0>)
8004d52: 629a str r2, [r3, #40] @ 0x28
/* Set the DMA half transfer complete callback */
hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
8004d54: 68fb ldr r3, [r7, #12]
8004d56: 6a1b ldr r3, [r3, #32]
8004d58: 4a24 ldr r2, [pc, #144] @ (8004dec <HAL_ADC_Start_DMA+0x1b4>)
8004d5a: 62da str r2, [r3, #44] @ 0x2c
/* Set the DMA error callback */
hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
8004d5c: 68fb ldr r3, [r7, #12]
8004d5e: 6a1b ldr r3, [r3, #32]
8004d60: 4a23 ldr r2, [pc, #140] @ (8004df0 <HAL_ADC_Start_DMA+0x1b8>)
8004d62: 631a str r2, [r3, #48] @ 0x30
/* start (in case of SW start): */
/* Clear regular group conversion flag and overrun flag */
/* (To ensure of no unknown state from potential previous ADC */
/* operations) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
8004d64: 68fb ldr r3, [r7, #12]
8004d66: 681b ldr r3, [r3, #0]
8004d68: f06f 0202 mvn.w r2, #2
8004d6c: 601a str r2, [r3, #0]
/* Enable ADC DMA mode */
SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
8004d6e: 68fb ldr r3, [r7, #12]
8004d70: 681b ldr r3, [r3, #0]
8004d72: 689a ldr r2, [r3, #8]
8004d74: 68fb ldr r3, [r7, #12]
8004d76: 681b ldr r3, [r3, #0]
8004d78: f442 7280 orr.w r2, r2, #256 @ 0x100
8004d7c: 609a str r2, [r3, #8]
/* Start the DMA channel */
HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
8004d7e: 68fb ldr r3, [r7, #12]
8004d80: 6a18 ldr r0, [r3, #32]
8004d82: 68fb ldr r3, [r7, #12]
8004d84: 681b ldr r3, [r3, #0]
8004d86: 334c adds r3, #76 @ 0x4c
8004d88: 4619 mov r1, r3
8004d8a: 68ba ldr r2, [r7, #8]
8004d8c: 687b ldr r3, [r7, #4]
8004d8e: f000 fbb5 bl 80054fc <HAL_DMA_Start_IT>
/* Enable conversion of regular group. */
/* If software start has been selected, conversion starts immediately. */
/* If external trigger has been selected, conversion will start at next */
/* trigger event. */
if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
8004d92: 68fb ldr r3, [r7, #12]
8004d94: 681b ldr r3, [r3, #0]
8004d96: 689b ldr r3, [r3, #8]
8004d98: f403 2360 and.w r3, r3, #917504 @ 0xe0000
8004d9c: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
8004da0: d108 bne.n 8004db4 <HAL_ADC_Start_DMA+0x17c>
{
/* Start ADC conversion on regular group with SW start */
SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
8004da2: 68fb ldr r3, [r7, #12]
8004da4: 681b ldr r3, [r3, #0]
8004da6: 689a ldr r2, [r3, #8]
8004da8: 68fb ldr r3, [r7, #12]
8004daa: 681b ldr r3, [r3, #0]
8004dac: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000
8004db0: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
8004db2: e00f b.n 8004dd4 <HAL_ADC_Start_DMA+0x19c>
}
else
{
/* Start ADC conversion on regular group with external trigger */
SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
8004db4: 68fb ldr r3, [r7, #12]
8004db6: 681b ldr r3, [r3, #0]
8004db8: 689a ldr r2, [r3, #8]
8004dba: 68fb ldr r3, [r7, #12]
8004dbc: 681b ldr r3, [r3, #0]
8004dbe: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
8004dc2: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
8004dc4: e006 b.n 8004dd4 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hadc);
8004dc6: 68fb ldr r3, [r7, #12]
8004dc8: 2200 movs r2, #0
8004dca: f883 2024 strb.w r2, [r3, #36] @ 0x24
if (tmp_hal_status == HAL_OK)
8004dce: e001 b.n 8004dd4 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
tmp_hal_status = HAL_ERROR;
8004dd0: 2301 movs r3, #1
8004dd2: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8004dd4: 7dfb ldrb r3, [r7, #23]
}
8004dd6: 4618 mov r0, r3
8004dd8: 3718 adds r7, #24
8004dda: 46bd mov sp, r7
8004ddc: bd80 pop {r7, pc}
8004dde: bf00 nop
8004de0: 40012400 .word 0x40012400
8004de4: 40012800 .word 0x40012800
8004de8: 08005153 .word 0x08005153
8004dec: 080051cf .word 0x080051cf
8004df0: 080051eb .word 0x080051eb
08004df4 <HAL_ADC_ConvCpltCallback>:
* @brief Conversion complete callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
8004df4: b480 push {r7}
8004df6: b083 sub sp, #12
8004df8: af00 add r7, sp, #0
8004dfa: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvCpltCallback must be implemented in the user file.
*/
}
8004dfc: bf00 nop
8004dfe: 370c adds r7, #12
8004e00: 46bd mov sp, r7
8004e02: bc80 pop {r7}
8004e04: 4770 bx lr
08004e06 <HAL_ADC_ConvHalfCpltCallback>:
* @brief Conversion DMA half-transfer callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
{
8004e06: b480 push {r7}
8004e08: b083 sub sp, #12
8004e0a: af00 add r7, sp, #0
8004e0c: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
*/
}
8004e0e: bf00 nop
8004e10: 370c adds r7, #12
8004e12: 46bd mov sp, r7
8004e14: bc80 pop {r7}
8004e16: 4770 bx lr
08004e18 <HAL_ADC_ErrorCallback>:
* (ADC conversion with interruption or transfer by DMA)
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
8004e18: b480 push {r7}
8004e1a: b083 sub sp, #12
8004e1c: af00 add r7, sp, #0
8004e1e: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ErrorCallback must be implemented in the user file.
*/
}
8004e20: bf00 nop
8004e22: 370c adds r7, #12
8004e24: 46bd mov sp, r7
8004e26: bc80 pop {r7}
8004e28: 4770 bx lr
...
08004e2c <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8004e2c: b480 push {r7}
8004e2e: b085 sub sp, #20
8004e30: af00 add r7, sp, #0
8004e32: 6078 str r0, [r7, #4]
8004e34: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8004e36: 2300 movs r3, #0
8004e38: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
8004e3a: 2300 movs r3, #0
8004e3c: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8004e3e: 687b ldr r3, [r7, #4]
8004e40: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8004e44: 2b01 cmp r3, #1
8004e46: d101 bne.n 8004e4c <HAL_ADC_ConfigChannel+0x20>
8004e48: 2302 movs r3, #2
8004e4a: e0dc b.n 8005006 <HAL_ADC_ConfigChannel+0x1da>
8004e4c: 687b ldr r3, [r7, #4]
8004e4e: 2201 movs r2, #1
8004e50: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
8004e54: 683b ldr r3, [r7, #0]
8004e56: 685b ldr r3, [r3, #4]
8004e58: 2b06 cmp r3, #6
8004e5a: d81c bhi.n 8004e96 <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8004e5c: 687b ldr r3, [r7, #4]
8004e5e: 681b ldr r3, [r3, #0]
8004e60: 6b59 ldr r1, [r3, #52] @ 0x34
8004e62: 683b ldr r3, [r7, #0]
8004e64: 685a ldr r2, [r3, #4]
8004e66: 4613 mov r3, r2
8004e68: 009b lsls r3, r3, #2
8004e6a: 4413 add r3, r2
8004e6c: 3b05 subs r3, #5
8004e6e: 221f movs r2, #31
8004e70: fa02 f303 lsl.w r3, r2, r3
8004e74: 43db mvns r3, r3
8004e76: 4019 ands r1, r3
8004e78: 683b ldr r3, [r7, #0]
8004e7a: 6818 ldr r0, [r3, #0]
8004e7c: 683b ldr r3, [r7, #0]
8004e7e: 685a ldr r2, [r3, #4]
8004e80: 4613 mov r3, r2
8004e82: 009b lsls r3, r3, #2
8004e84: 4413 add r3, r2
8004e86: 3b05 subs r3, #5
8004e88: fa00 f203 lsl.w r2, r0, r3
8004e8c: 687b ldr r3, [r7, #4]
8004e8e: 681b ldr r3, [r3, #0]
8004e90: 430a orrs r2, r1
8004e92: 635a str r2, [r3, #52] @ 0x34
8004e94: e03c b.n 8004f10 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
8004e96: 683b ldr r3, [r7, #0]
8004e98: 685b ldr r3, [r3, #4]
8004e9a: 2b0c cmp r3, #12
8004e9c: d81c bhi.n 8004ed8 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
8004e9e: 687b ldr r3, [r7, #4]
8004ea0: 681b ldr r3, [r3, #0]
8004ea2: 6b19 ldr r1, [r3, #48] @ 0x30
8004ea4: 683b ldr r3, [r7, #0]
8004ea6: 685a ldr r2, [r3, #4]
8004ea8: 4613 mov r3, r2
8004eaa: 009b lsls r3, r3, #2
8004eac: 4413 add r3, r2
8004eae: 3b23 subs r3, #35 @ 0x23
8004eb0: 221f movs r2, #31
8004eb2: fa02 f303 lsl.w r3, r2, r3
8004eb6: 43db mvns r3, r3
8004eb8: 4019 ands r1, r3
8004eba: 683b ldr r3, [r7, #0]
8004ebc: 6818 ldr r0, [r3, #0]
8004ebe: 683b ldr r3, [r7, #0]
8004ec0: 685a ldr r2, [r3, #4]
8004ec2: 4613 mov r3, r2
8004ec4: 009b lsls r3, r3, #2
8004ec6: 4413 add r3, r2
8004ec8: 3b23 subs r3, #35 @ 0x23
8004eca: fa00 f203 lsl.w r2, r0, r3
8004ece: 687b ldr r3, [r7, #4]
8004ed0: 681b ldr r3, [r3, #0]
8004ed2: 430a orrs r2, r1
8004ed4: 631a str r2, [r3, #48] @ 0x30
8004ed6: e01b b.n 8004f10 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
8004ed8: 687b ldr r3, [r7, #4]
8004eda: 681b ldr r3, [r3, #0]
8004edc: 6ad9 ldr r1, [r3, #44] @ 0x2c
8004ede: 683b ldr r3, [r7, #0]
8004ee0: 685a ldr r2, [r3, #4]
8004ee2: 4613 mov r3, r2
8004ee4: 009b lsls r3, r3, #2
8004ee6: 4413 add r3, r2
8004ee8: 3b41 subs r3, #65 @ 0x41
8004eea: 221f movs r2, #31
8004eec: fa02 f303 lsl.w r3, r2, r3
8004ef0: 43db mvns r3, r3
8004ef2: 4019 ands r1, r3
8004ef4: 683b ldr r3, [r7, #0]
8004ef6: 6818 ldr r0, [r3, #0]
8004ef8: 683b ldr r3, [r7, #0]
8004efa: 685a ldr r2, [r3, #4]
8004efc: 4613 mov r3, r2
8004efe: 009b lsls r3, r3, #2
8004f00: 4413 add r3, r2
8004f02: 3b41 subs r3, #65 @ 0x41
8004f04: fa00 f203 lsl.w r2, r0, r3
8004f08: 687b ldr r3, [r7, #4]
8004f0a: 681b ldr r3, [r3, #0]
8004f0c: 430a orrs r2, r1
8004f0e: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
8004f10: 683b ldr r3, [r7, #0]
8004f12: 681b ldr r3, [r3, #0]
8004f14: 2b09 cmp r3, #9
8004f16: d91c bls.n 8004f52 <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
8004f18: 687b ldr r3, [r7, #4]
8004f1a: 681b ldr r3, [r3, #0]
8004f1c: 68d9 ldr r1, [r3, #12]
8004f1e: 683b ldr r3, [r7, #0]
8004f20: 681a ldr r2, [r3, #0]
8004f22: 4613 mov r3, r2
8004f24: 005b lsls r3, r3, #1
8004f26: 4413 add r3, r2
8004f28: 3b1e subs r3, #30
8004f2a: 2207 movs r2, #7
8004f2c: fa02 f303 lsl.w r3, r2, r3
8004f30: 43db mvns r3, r3
8004f32: 4019 ands r1, r3
8004f34: 683b ldr r3, [r7, #0]
8004f36: 6898 ldr r0, [r3, #8]
8004f38: 683b ldr r3, [r7, #0]
8004f3a: 681a ldr r2, [r3, #0]
8004f3c: 4613 mov r3, r2
8004f3e: 005b lsls r3, r3, #1
8004f40: 4413 add r3, r2
8004f42: 3b1e subs r3, #30
8004f44: fa00 f203 lsl.w r2, r0, r3
8004f48: 687b ldr r3, [r7, #4]
8004f4a: 681b ldr r3, [r3, #0]
8004f4c: 430a orrs r2, r1
8004f4e: 60da str r2, [r3, #12]
8004f50: e019 b.n 8004f86 <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
8004f52: 687b ldr r3, [r7, #4]
8004f54: 681b ldr r3, [r3, #0]
8004f56: 6919 ldr r1, [r3, #16]
8004f58: 683b ldr r3, [r7, #0]
8004f5a: 681a ldr r2, [r3, #0]
8004f5c: 4613 mov r3, r2
8004f5e: 005b lsls r3, r3, #1
8004f60: 4413 add r3, r2
8004f62: 2207 movs r2, #7
8004f64: fa02 f303 lsl.w r3, r2, r3
8004f68: 43db mvns r3, r3
8004f6a: 4019 ands r1, r3
8004f6c: 683b ldr r3, [r7, #0]
8004f6e: 6898 ldr r0, [r3, #8]
8004f70: 683b ldr r3, [r7, #0]
8004f72: 681a ldr r2, [r3, #0]
8004f74: 4613 mov r3, r2
8004f76: 005b lsls r3, r3, #1
8004f78: 4413 add r3, r2
8004f7a: fa00 f203 lsl.w r2, r0, r3
8004f7e: 687b ldr r3, [r7, #4]
8004f80: 681b ldr r3, [r3, #0]
8004f82: 430a orrs r2, r1
8004f84: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8004f86: 683b ldr r3, [r7, #0]
8004f88: 681b ldr r3, [r3, #0]
8004f8a: 2b10 cmp r3, #16
8004f8c: d003 beq.n 8004f96 <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
8004f8e: 683b ldr r3, [r7, #0]
8004f90: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8004f92: 2b11 cmp r3, #17
8004f94: d132 bne.n 8004ffc <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
8004f96: 687b ldr r3, [r7, #4]
8004f98: 681b ldr r3, [r3, #0]
8004f9a: 4a1d ldr r2, [pc, #116] @ (8005010 <HAL_ADC_ConfigChannel+0x1e4>)
8004f9c: 4293 cmp r3, r2
8004f9e: d125 bne.n 8004fec <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
8004fa0: 687b ldr r3, [r7, #4]
8004fa2: 681b ldr r3, [r3, #0]
8004fa4: 689b ldr r3, [r3, #8]
8004fa6: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8004faa: 2b00 cmp r3, #0
8004fac: d126 bne.n 8004ffc <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
8004fae: 687b ldr r3, [r7, #4]
8004fb0: 681b ldr r3, [r3, #0]
8004fb2: 689a ldr r2, [r3, #8]
8004fb4: 687b ldr r3, [r7, #4]
8004fb6: 681b ldr r3, [r3, #0]
8004fb8: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8004fbc: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
8004fbe: 683b ldr r3, [r7, #0]
8004fc0: 681b ldr r3, [r3, #0]
8004fc2: 2b10 cmp r3, #16
8004fc4: d11a bne.n 8004ffc <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
8004fc6: 4b13 ldr r3, [pc, #76] @ (8005014 <HAL_ADC_ConfigChannel+0x1e8>)
8004fc8: 681b ldr r3, [r3, #0]
8004fca: 4a13 ldr r2, [pc, #76] @ (8005018 <HAL_ADC_ConfigChannel+0x1ec>)
8004fcc: fba2 2303 umull r2, r3, r2, r3
8004fd0: 0c9a lsrs r2, r3, #18
8004fd2: 4613 mov r3, r2
8004fd4: 009b lsls r3, r3, #2
8004fd6: 4413 add r3, r2
8004fd8: 005b lsls r3, r3, #1
8004fda: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8004fdc: e002 b.n 8004fe4 <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
8004fde: 68bb ldr r3, [r7, #8]
8004fe0: 3b01 subs r3, #1
8004fe2: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8004fe4: 68bb ldr r3, [r7, #8]
8004fe6: 2b00 cmp r3, #0
8004fe8: d1f9 bne.n 8004fde <HAL_ADC_ConfigChannel+0x1b2>
8004fea: e007 b.n 8004ffc <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8004fec: 687b ldr r3, [r7, #4]
8004fee: 6a9b ldr r3, [r3, #40] @ 0x28
8004ff0: f043 0220 orr.w r2, r3, #32
8004ff4: 687b ldr r3, [r7, #4]
8004ff6: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8004ff8: 2301 movs r3, #1
8004ffa: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8004ffc: 687b ldr r3, [r7, #4]
8004ffe: 2200 movs r2, #0
8005000: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
8005004: 7bfb ldrb r3, [r7, #15]
}
8005006: 4618 mov r0, r3
8005008: 3714 adds r7, #20
800500a: 46bd mov sp, r7
800500c: bc80 pop {r7}
800500e: 4770 bx lr
8005010: 40012400 .word 0x40012400
8005014: 20000010 .word 0x20000010
8005018: 431bde83 .word 0x431bde83
0800501c <ADC_Enable>:
* and voltage regulator must be enabled (done into HAL_ADC_Init()).
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
{
800501c: b580 push {r7, lr}
800501e: b084 sub sp, #16
8005020: af00 add r7, sp, #0
8005022: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8005024: 2300 movs r3, #0
8005026: 60fb str r3, [r7, #12]
__IO uint32_t wait_loop_index = 0U;
8005028: 2300 movs r3, #0
800502a: 60bb str r3, [r7, #8]
/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
/* enabling phase not yet completed: flag ADC ready not yet set). */
/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
/* causes: ADC clock not running, ...). */
if (ADC_IS_ENABLE(hadc) == RESET)
800502c: 687b ldr r3, [r7, #4]
800502e: 681b ldr r3, [r3, #0]
8005030: 689b ldr r3, [r3, #8]
8005032: f003 0301 and.w r3, r3, #1
8005036: 2b01 cmp r3, #1
8005038: d040 beq.n 80050bc <ADC_Enable+0xa0>
{
/* Enable the Peripheral */
__HAL_ADC_ENABLE(hadc);
800503a: 687b ldr r3, [r7, #4]
800503c: 681b ldr r3, [r3, #0]
800503e: 689a ldr r2, [r3, #8]
8005040: 687b ldr r3, [r7, #4]
8005042: 681b ldr r3, [r3, #0]
8005044: f042 0201 orr.w r2, r2, #1
8005048: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
800504a: 4b1f ldr r3, [pc, #124] @ (80050c8 <ADC_Enable+0xac>)
800504c: 681b ldr r3, [r3, #0]
800504e: 4a1f ldr r2, [pc, #124] @ (80050cc <ADC_Enable+0xb0>)
8005050: fba2 2303 umull r2, r3, r2, r3
8005054: 0c9b lsrs r3, r3, #18
8005056: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005058: e002 b.n 8005060 <ADC_Enable+0x44>
{
wait_loop_index--;
800505a: 68bb ldr r3, [r7, #8]
800505c: 3b01 subs r3, #1
800505e: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005060: 68bb ldr r3, [r7, #8]
8005062: 2b00 cmp r3, #0
8005064: d1f9 bne.n 800505a <ADC_Enable+0x3e>
}
/* Get tick count */
tickstart = HAL_GetTick();
8005066: f7ff fd05 bl 8004a74 <HAL_GetTick>
800506a: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively enabled */
while(ADC_IS_ENABLE(hadc) == RESET)
800506c: e01f b.n 80050ae <ADC_Enable+0x92>
{
if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
800506e: f7ff fd01 bl 8004a74 <HAL_GetTick>
8005072: 4602 mov r2, r0
8005074: 68fb ldr r3, [r7, #12]
8005076: 1ad3 subs r3, r2, r3
8005078: 2b02 cmp r3, #2
800507a: d918 bls.n 80050ae <ADC_Enable+0x92>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) == RESET)
800507c: 687b ldr r3, [r7, #4]
800507e: 681b ldr r3, [r3, #0]
8005080: 689b ldr r3, [r3, #8]
8005082: f003 0301 and.w r3, r3, #1
8005086: 2b01 cmp r3, #1
8005088: d011 beq.n 80050ae <ADC_Enable+0x92>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
800508a: 687b ldr r3, [r7, #4]
800508c: 6a9b ldr r3, [r3, #40] @ 0x28
800508e: f043 0210 orr.w r2, r3, #16
8005092: 687b ldr r3, [r7, #4]
8005094: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8005096: 687b ldr r3, [r7, #4]
8005098: 6adb ldr r3, [r3, #44] @ 0x2c
800509a: f043 0201 orr.w r2, r3, #1
800509e: 687b ldr r3, [r7, #4]
80050a0: 62da str r2, [r3, #44] @ 0x2c
/* Process unlocked */
__HAL_UNLOCK(hadc);
80050a2: 687b ldr r3, [r7, #4]
80050a4: 2200 movs r2, #0
80050a6: f883 2024 strb.w r2, [r3, #36] @ 0x24
return HAL_ERROR;
80050aa: 2301 movs r3, #1
80050ac: e007 b.n 80050be <ADC_Enable+0xa2>
while(ADC_IS_ENABLE(hadc) == RESET)
80050ae: 687b ldr r3, [r7, #4]
80050b0: 681b ldr r3, [r3, #0]
80050b2: 689b ldr r3, [r3, #8]
80050b4: f003 0301 and.w r3, r3, #1
80050b8: 2b01 cmp r3, #1
80050ba: d1d8 bne.n 800506e <ADC_Enable+0x52>
}
}
}
/* Return HAL status */
return HAL_OK;
80050bc: 2300 movs r3, #0
}
80050be: 4618 mov r0, r3
80050c0: 3710 adds r7, #16
80050c2: 46bd mov sp, r7
80050c4: bd80 pop {r7, pc}
80050c6: bf00 nop
80050c8: 20000010 .word 0x20000010
80050cc: 431bde83 .word 0x431bde83
080050d0 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
80050d0: b580 push {r7, lr}
80050d2: b084 sub sp, #16
80050d4: af00 add r7, sp, #0
80050d6: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
80050d8: 2300 movs r3, #0
80050da: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
80050dc: 687b ldr r3, [r7, #4]
80050de: 681b ldr r3, [r3, #0]
80050e0: 689b ldr r3, [r3, #8]
80050e2: f003 0301 and.w r3, r3, #1
80050e6: 2b01 cmp r3, #1
80050e8: d12e bne.n 8005148 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
80050ea: 687b ldr r3, [r7, #4]
80050ec: 681b ldr r3, [r3, #0]
80050ee: 689a ldr r2, [r3, #8]
80050f0: 687b ldr r3, [r7, #4]
80050f2: 681b ldr r3, [r3, #0]
80050f4: f022 0201 bic.w r2, r2, #1
80050f8: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
80050fa: f7ff fcbb bl 8004a74 <HAL_GetTick>
80050fe: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
8005100: e01b b.n 800513a <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
8005102: f7ff fcb7 bl 8004a74 <HAL_GetTick>
8005106: 4602 mov r2, r0
8005108: 68fb ldr r3, [r7, #12]
800510a: 1ad3 subs r3, r2, r3
800510c: 2b02 cmp r3, #2
800510e: d914 bls.n 800513a <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
8005110: 687b ldr r3, [r7, #4]
8005112: 681b ldr r3, [r3, #0]
8005114: 689b ldr r3, [r3, #8]
8005116: f003 0301 and.w r3, r3, #1
800511a: 2b01 cmp r3, #1
800511c: d10d bne.n 800513a <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
800511e: 687b ldr r3, [r7, #4]
8005120: 6a9b ldr r3, [r3, #40] @ 0x28
8005122: f043 0210 orr.w r2, r3, #16
8005126: 687b ldr r3, [r7, #4]
8005128: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
800512a: 687b ldr r3, [r7, #4]
800512c: 6adb ldr r3, [r3, #44] @ 0x2c
800512e: f043 0201 orr.w r2, r3, #1
8005132: 687b ldr r3, [r7, #4]
8005134: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
8005136: 2301 movs r3, #1
8005138: e007 b.n 800514a <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
800513a: 687b ldr r3, [r7, #4]
800513c: 681b ldr r3, [r3, #0]
800513e: 689b ldr r3, [r3, #8]
8005140: f003 0301 and.w r3, r3, #1
8005144: 2b01 cmp r3, #1
8005146: d0dc beq.n 8005102 <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
8005148: 2300 movs r3, #0
}
800514a: 4618 mov r0, r3
800514c: 3710 adds r7, #16
800514e: 46bd mov sp, r7
8005150: bd80 pop {r7, pc}
08005152 <ADC_DMAConvCplt>:
* @brief DMA transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
8005152: b580 push {r7, lr}
8005154: b084 sub sp, #16
8005156: af00 add r7, sp, #0
8005158: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
800515a: 687b ldr r3, [r7, #4]
800515c: 6a5b ldr r3, [r3, #36] @ 0x24
800515e: 60fb str r3, [r7, #12]
/* Update state machine on conversion status if not in error state */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
8005160: 68fb ldr r3, [r7, #12]
8005162: 6a9b ldr r3, [r3, #40] @ 0x28
8005164: f003 0350 and.w r3, r3, #80 @ 0x50
8005168: 2b00 cmp r3, #0
800516a: d127 bne.n 80051bc <ADC_DMAConvCplt+0x6a>
{
/* Update ADC state machine */
SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
800516c: 68fb ldr r3, [r7, #12]
800516e: 6a9b ldr r3, [r3, #40] @ 0x28
8005170: f443 7200 orr.w r2, r3, #512 @ 0x200
8005174: 68fb ldr r3, [r7, #12]
8005176: 629a str r2, [r3, #40] @ 0x28
/* Determine whether any further conversion upcoming on group regular */
/* by external trigger, continuous mode or scan sequence on going. */
/* Note: On STM32F1 devices, in case of sequencer enabled */
/* (several ranks selected), end of conversion flag is raised */
/* at the end of the sequence. */
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
8005178: 68fb ldr r3, [r7, #12]
800517a: 681b ldr r3, [r3, #0]
800517c: 689b ldr r3, [r3, #8]
800517e: f403 2360 and.w r3, r3, #917504 @ 0xe0000
8005182: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
8005186: d115 bne.n 80051b4 <ADC_DMAConvCplt+0x62>
(hadc->Init.ContinuousConvMode == DISABLE) )
8005188: 68fb ldr r3, [r7, #12]
800518a: 7b1b ldrb r3, [r3, #12]
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
800518c: 2b00 cmp r3, #0
800518e: d111 bne.n 80051b4 <ADC_DMAConvCplt+0x62>
{
/* Set ADC state */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
8005190: 68fb ldr r3, [r7, #12]
8005192: 6a9b ldr r3, [r3, #40] @ 0x28
8005194: f423 7280 bic.w r2, r3, #256 @ 0x100
8005198: 68fb ldr r3, [r7, #12]
800519a: 629a str r2, [r3, #40] @ 0x28
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
800519c: 68fb ldr r3, [r7, #12]
800519e: 6a9b ldr r3, [r3, #40] @ 0x28
80051a0: f403 5380 and.w r3, r3, #4096 @ 0x1000
80051a4: 2b00 cmp r3, #0
80051a6: d105 bne.n 80051b4 <ADC_DMAConvCplt+0x62>
{
SET_BIT(hadc->State, HAL_ADC_STATE_READY);
80051a8: 68fb ldr r3, [r7, #12]
80051aa: 6a9b ldr r3, [r3, #40] @ 0x28
80051ac: f043 0201 orr.w r2, r3, #1
80051b0: 68fb ldr r3, [r7, #12]
80051b2: 629a str r2, [r3, #40] @ 0x28
/* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvCpltCallback(hadc);
#else
HAL_ADC_ConvCpltCallback(hadc);
80051b4: 68f8 ldr r0, [r7, #12]
80051b6: f7ff fe1d bl 8004df4 <HAL_ADC_ConvCpltCallback>
else
{
/* Call DMA error callback */
hadc->DMA_Handle->XferErrorCallback(hdma);
}
}
80051ba: e004 b.n 80051c6 <ADC_DMAConvCplt+0x74>
hadc->DMA_Handle->XferErrorCallback(hdma);
80051bc: 68fb ldr r3, [r7, #12]
80051be: 6a1b ldr r3, [r3, #32]
80051c0: 6b1b ldr r3, [r3, #48] @ 0x30
80051c2: 6878 ldr r0, [r7, #4]
80051c4: 4798 blx r3
}
80051c6: bf00 nop
80051c8: 3710 adds r7, #16
80051ca: 46bd mov sp, r7
80051cc: bd80 pop {r7, pc}
080051ce <ADC_DMAHalfConvCplt>:
* @brief DMA half transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
{
80051ce: b580 push {r7, lr}
80051d0: b084 sub sp, #16
80051d2: af00 add r7, sp, #0
80051d4: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
80051d6: 687b ldr r3, [r7, #4]
80051d8: 6a5b ldr r3, [r3, #36] @ 0x24
80051da: 60fb str r3, [r7, #12]
/* Half conversion callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvHalfCpltCallback(hadc);
#else
HAL_ADC_ConvHalfCpltCallback(hadc);
80051dc: 68f8 ldr r0, [r7, #12]
80051de: f7ff fe12 bl 8004e06 <HAL_ADC_ConvHalfCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
80051e2: bf00 nop
80051e4: 3710 adds r7, #16
80051e6: 46bd mov sp, r7
80051e8: bd80 pop {r7, pc}
080051ea <ADC_DMAError>:
* @brief DMA error callback
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAError(DMA_HandleTypeDef *hdma)
{
80051ea: b580 push {r7, lr}
80051ec: b084 sub sp, #16
80051ee: af00 add r7, sp, #0
80051f0: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
80051f2: 687b ldr r3, [r7, #4]
80051f4: 6a5b ldr r3, [r3, #36] @ 0x24
80051f6: 60fb str r3, [r7, #12]
/* Set ADC state */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
80051f8: 68fb ldr r3, [r7, #12]
80051fa: 6a9b ldr r3, [r3, #40] @ 0x28
80051fc: f043 0240 orr.w r2, r3, #64 @ 0x40
8005200: 68fb ldr r3, [r7, #12]
8005202: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to DMA error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
8005204: 68fb ldr r3, [r7, #12]
8005206: 6adb ldr r3, [r3, #44] @ 0x2c
8005208: f043 0204 orr.w r2, r3, #4
800520c: 68fb ldr r3, [r7, #12]
800520e: 62da str r2, [r3, #44] @ 0x2c
/* Error callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ErrorCallback(hadc);
#else
HAL_ADC_ErrorCallback(hadc);
8005210: 68f8 ldr r0, [r7, #12]
8005212: f7ff fe01 bl 8004e18 <HAL_ADC_ErrorCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
8005216: bf00 nop
8005218: 3710 adds r7, #16
800521a: 46bd mov sp, r7
800521c: bd80 pop {r7, pc}
...
08005220 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8005220: b480 push {r7}
8005222: b085 sub sp, #20
8005224: af00 add r7, sp, #0
8005226: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005228: 687b ldr r3, [r7, #4]
800522a: f003 0307 and.w r3, r3, #7
800522e: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8005230: 4b0c ldr r3, [pc, #48] @ (8005264 <__NVIC_SetPriorityGrouping+0x44>)
8005232: 68db ldr r3, [r3, #12]
8005234: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8005236: 68ba ldr r2, [r7, #8]
8005238: f64f 03ff movw r3, #63743 @ 0xf8ff
800523c: 4013 ands r3, r2
800523e: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8005240: 68fb ldr r3, [r7, #12]
8005242: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8005244: 68bb ldr r3, [r7, #8]
8005246: 4313 orrs r3, r2
reg_value = (reg_value |
8005248: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
800524c: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8005250: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8005252: 4a04 ldr r2, [pc, #16] @ (8005264 <__NVIC_SetPriorityGrouping+0x44>)
8005254: 68bb ldr r3, [r7, #8]
8005256: 60d3 str r3, [r2, #12]
}
8005258: bf00 nop
800525a: 3714 adds r7, #20
800525c: 46bd mov sp, r7
800525e: bc80 pop {r7}
8005260: 4770 bx lr
8005262: bf00 nop
8005264: e000ed00 .word 0xe000ed00
08005268 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8005268: b480 push {r7}
800526a: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
800526c: 4b04 ldr r3, [pc, #16] @ (8005280 <__NVIC_GetPriorityGrouping+0x18>)
800526e: 68db ldr r3, [r3, #12]
8005270: 0a1b lsrs r3, r3, #8
8005272: f003 0307 and.w r3, r3, #7
}
8005276: 4618 mov r0, r3
8005278: 46bd mov sp, r7
800527a: bc80 pop {r7}
800527c: 4770 bx lr
800527e: bf00 nop
8005280: e000ed00 .word 0xe000ed00
08005284 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8005284: b480 push {r7}
8005286: b083 sub sp, #12
8005288: af00 add r7, sp, #0
800528a: 4603 mov r3, r0
800528c: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
800528e: f997 3007 ldrsb.w r3, [r7, #7]
8005292: 2b00 cmp r3, #0
8005294: db0b blt.n 80052ae <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8005296: 79fb ldrb r3, [r7, #7]
8005298: f003 021f and.w r2, r3, #31
800529c: 4906 ldr r1, [pc, #24] @ (80052b8 <__NVIC_EnableIRQ+0x34>)
800529e: f997 3007 ldrsb.w r3, [r7, #7]
80052a2: 095b lsrs r3, r3, #5
80052a4: 2001 movs r0, #1
80052a6: fa00 f202 lsl.w r2, r0, r2
80052aa: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
80052ae: bf00 nop
80052b0: 370c adds r7, #12
80052b2: 46bd mov sp, r7
80052b4: bc80 pop {r7}
80052b6: 4770 bx lr
80052b8: e000e100 .word 0xe000e100
080052bc <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
80052bc: b480 push {r7}
80052be: b083 sub sp, #12
80052c0: af00 add r7, sp, #0
80052c2: 4603 mov r3, r0
80052c4: 6039 str r1, [r7, #0]
80052c6: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80052c8: f997 3007 ldrsb.w r3, [r7, #7]
80052cc: 2b00 cmp r3, #0
80052ce: db0a blt.n 80052e6 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80052d0: 683b ldr r3, [r7, #0]
80052d2: b2da uxtb r2, r3
80052d4: 490c ldr r1, [pc, #48] @ (8005308 <__NVIC_SetPriority+0x4c>)
80052d6: f997 3007 ldrsb.w r3, [r7, #7]
80052da: 0112 lsls r2, r2, #4
80052dc: b2d2 uxtb r2, r2
80052de: 440b add r3, r1
80052e0: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
80052e4: e00a b.n 80052fc <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80052e6: 683b ldr r3, [r7, #0]
80052e8: b2da uxtb r2, r3
80052ea: 4908 ldr r1, [pc, #32] @ (800530c <__NVIC_SetPriority+0x50>)
80052ec: 79fb ldrb r3, [r7, #7]
80052ee: f003 030f and.w r3, r3, #15
80052f2: 3b04 subs r3, #4
80052f4: 0112 lsls r2, r2, #4
80052f6: b2d2 uxtb r2, r2
80052f8: 440b add r3, r1
80052fa: 761a strb r2, [r3, #24]
}
80052fc: bf00 nop
80052fe: 370c adds r7, #12
8005300: 46bd mov sp, r7
8005302: bc80 pop {r7}
8005304: 4770 bx lr
8005306: bf00 nop
8005308: e000e100 .word 0xe000e100
800530c: e000ed00 .word 0xe000ed00
08005310 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8005310: b480 push {r7}
8005312: b089 sub sp, #36 @ 0x24
8005314: af00 add r7, sp, #0
8005316: 60f8 str r0, [r7, #12]
8005318: 60b9 str r1, [r7, #8]
800531a: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
800531c: 68fb ldr r3, [r7, #12]
800531e: f003 0307 and.w r3, r3, #7
8005322: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8005324: 69fb ldr r3, [r7, #28]
8005326: f1c3 0307 rsb r3, r3, #7
800532a: 2b04 cmp r3, #4
800532c: bf28 it cs
800532e: 2304 movcs r3, #4
8005330: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8005332: 69fb ldr r3, [r7, #28]
8005334: 3304 adds r3, #4
8005336: 2b06 cmp r3, #6
8005338: d902 bls.n 8005340 <NVIC_EncodePriority+0x30>
800533a: 69fb ldr r3, [r7, #28]
800533c: 3b03 subs r3, #3
800533e: e000 b.n 8005342 <NVIC_EncodePriority+0x32>
8005340: 2300 movs r3, #0
8005342: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005344: f04f 32ff mov.w r2, #4294967295
8005348: 69bb ldr r3, [r7, #24]
800534a: fa02 f303 lsl.w r3, r2, r3
800534e: 43da mvns r2, r3
8005350: 68bb ldr r3, [r7, #8]
8005352: 401a ands r2, r3
8005354: 697b ldr r3, [r7, #20]
8005356: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8005358: f04f 31ff mov.w r1, #4294967295
800535c: 697b ldr r3, [r7, #20]
800535e: fa01 f303 lsl.w r3, r1, r3
8005362: 43d9 mvns r1, r3
8005364: 687b ldr r3, [r7, #4]
8005366: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005368: 4313 orrs r3, r2
);
}
800536a: 4618 mov r0, r3
800536c: 3724 adds r7, #36 @ 0x24
800536e: 46bd mov sp, r7
8005370: bc80 pop {r7}
8005372: 4770 bx lr
08005374 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8005374: b580 push {r7, lr}
8005376: b082 sub sp, #8
8005378: af00 add r7, sp, #0
800537a: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
800537c: 687b ldr r3, [r7, #4]
800537e: 3b01 subs r3, #1
8005380: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
8005384: d301 bcc.n 800538a <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8005386: 2301 movs r3, #1
8005388: e00f b.n 80053aa <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
800538a: 4a0a ldr r2, [pc, #40] @ (80053b4 <SysTick_Config+0x40>)
800538c: 687b ldr r3, [r7, #4]
800538e: 3b01 subs r3, #1
8005390: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8005392: 210f movs r1, #15
8005394: f04f 30ff mov.w r0, #4294967295
8005398: f7ff ff90 bl 80052bc <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
800539c: 4b05 ldr r3, [pc, #20] @ (80053b4 <SysTick_Config+0x40>)
800539e: 2200 movs r2, #0
80053a0: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
80053a2: 4b04 ldr r3, [pc, #16] @ (80053b4 <SysTick_Config+0x40>)
80053a4: 2207 movs r2, #7
80053a6: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
80053a8: 2300 movs r3, #0
}
80053aa: 4618 mov r0, r3
80053ac: 3708 adds r7, #8
80053ae: 46bd mov sp, r7
80053b0: bd80 pop {r7, pc}
80053b2: bf00 nop
80053b4: e000e010 .word 0xe000e010
080053b8 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80053b8: b580 push {r7, lr}
80053ba: b082 sub sp, #8
80053bc: af00 add r7, sp, #0
80053be: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
80053c0: 6878 ldr r0, [r7, #4]
80053c2: f7ff ff2d bl 8005220 <__NVIC_SetPriorityGrouping>
}
80053c6: bf00 nop
80053c8: 3708 adds r7, #8
80053ca: 46bd mov sp, r7
80053cc: bd80 pop {r7, pc}
080053ce <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
80053ce: b580 push {r7, lr}
80053d0: b086 sub sp, #24
80053d2: af00 add r7, sp, #0
80053d4: 4603 mov r3, r0
80053d6: 60b9 str r1, [r7, #8]
80053d8: 607a str r2, [r7, #4]
80053da: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
80053dc: 2300 movs r3, #0
80053de: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
80053e0: f7ff ff42 bl 8005268 <__NVIC_GetPriorityGrouping>
80053e4: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
80053e6: 687a ldr r2, [r7, #4]
80053e8: 68b9 ldr r1, [r7, #8]
80053ea: 6978 ldr r0, [r7, #20]
80053ec: f7ff ff90 bl 8005310 <NVIC_EncodePriority>
80053f0: 4602 mov r2, r0
80053f2: f997 300f ldrsb.w r3, [r7, #15]
80053f6: 4611 mov r1, r2
80053f8: 4618 mov r0, r3
80053fa: f7ff ff5f bl 80052bc <__NVIC_SetPriority>
}
80053fe: bf00 nop
8005400: 3718 adds r7, #24
8005402: 46bd mov sp, r7
8005404: bd80 pop {r7, pc}
08005406 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8005406: b580 push {r7, lr}
8005408: b082 sub sp, #8
800540a: af00 add r7, sp, #0
800540c: 4603 mov r3, r0
800540e: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8005410: f997 3007 ldrsb.w r3, [r7, #7]
8005414: 4618 mov r0, r3
8005416: f7ff ff35 bl 8005284 <__NVIC_EnableIRQ>
}
800541a: bf00 nop
800541c: 3708 adds r7, #8
800541e: 46bd mov sp, r7
8005420: bd80 pop {r7, pc}
08005422 <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8005422: b580 push {r7, lr}
8005424: b082 sub sp, #8
8005426: af00 add r7, sp, #0
8005428: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
800542a: 6878 ldr r0, [r7, #4]
800542c: f7ff ffa2 bl 8005374 <SysTick_Config>
8005430: 4603 mov r3, r0
}
8005432: 4618 mov r0, r3
8005434: 3708 adds r7, #8
8005436: 46bd mov sp, r7
8005438: bd80 pop {r7, pc}
0800543a <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
800543a: b580 push {r7, lr}
800543c: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
800543e: f7fc f9df bl 8001800 <HAL_SYSTICK_Callback>
}
8005442: bf00 nop
8005444: bd80 pop {r7, pc}
...
08005448 <HAL_DMA_Init>:
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8005448: b480 push {r7}
800544a: b085 sub sp, #20
800544c: af00 add r7, sp, #0
800544e: 6078 str r0, [r7, #4]
uint32_t tmp = 0U;
8005450: 2300 movs r3, #0
8005452: 60fb str r3, [r7, #12]
/* Check the DMA handle allocation */
if(hdma == NULL)
8005454: 687b ldr r3, [r7, #4]
8005456: 2b00 cmp r3, #0
8005458: d101 bne.n 800545e <HAL_DMA_Init+0x16>
{
return HAL_ERROR;
800545a: 2301 movs r3, #1
800545c: e043 b.n 80054e6 <HAL_DMA_Init+0x9e>
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
hdma->DmaBaseAddress = DMA2;
}
#else
/* DMA1 */
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
800545e: 687b ldr r3, [r7, #4]
8005460: 681b ldr r3, [r3, #0]
8005462: 461a mov r2, r3
8005464: 4b22 ldr r3, [pc, #136] @ (80054f0 <HAL_DMA_Init+0xa8>)
8005466: 4413 add r3, r2
8005468: 4a22 ldr r2, [pc, #136] @ (80054f4 <HAL_DMA_Init+0xac>)
800546a: fba2 2303 umull r2, r3, r2, r3
800546e: 091b lsrs r3, r3, #4
8005470: 009a lsls r2, r3, #2
8005472: 687b ldr r3, [r7, #4]
8005474: 641a str r2, [r3, #64] @ 0x40
hdma->DmaBaseAddress = DMA1;
8005476: 687b ldr r3, [r7, #4]
8005478: 4a1f ldr r2, [pc, #124] @ (80054f8 <HAL_DMA_Init+0xb0>)
800547a: 63da str r2, [r3, #60] @ 0x3c
#endif /* DMA2 */
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
800547c: 687b ldr r3, [r7, #4]
800547e: 2202 movs r2, #2
8005480: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Get the CR register value */
tmp = hdma->Instance->CCR;
8005484: 687b ldr r3, [r7, #4]
8005486: 681b ldr r3, [r3, #0]
8005488: 681b ldr r3, [r3, #0]
800548a: 60fb str r3, [r7, #12]
/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
800548c: 68fb ldr r3, [r7, #12]
800548e: f423 537f bic.w r3, r3, #16320 @ 0x3fc0
8005492: f023 0330 bic.w r3, r3, #48 @ 0x30
8005496: 60fb str r3, [r7, #12]
DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
DMA_CCR_DIR));
/* Prepare the DMA Channel configuration */
tmp |= hdma->Init.Direction |
8005498: 687b ldr r3, [r7, #4]
800549a: 685a ldr r2, [r3, #4]
hdma->Init.PeriphInc | hdma->Init.MemInc |
800549c: 687b ldr r3, [r7, #4]
800549e: 689b ldr r3, [r3, #8]
tmp |= hdma->Init.Direction |
80054a0: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
80054a2: 687b ldr r3, [r7, #4]
80054a4: 68db ldr r3, [r3, #12]
80054a6: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
80054a8: 687b ldr r3, [r7, #4]
80054aa: 691b ldr r3, [r3, #16]
hdma->Init.PeriphInc | hdma->Init.MemInc |
80054ac: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
80054ae: 687b ldr r3, [r7, #4]
80054b0: 695b ldr r3, [r3, #20]
80054b2: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
80054b4: 687b ldr r3, [r7, #4]
80054b6: 699b ldr r3, [r3, #24]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
80054b8: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
80054ba: 687b ldr r3, [r7, #4]
80054bc: 69db ldr r3, [r3, #28]
80054be: 4313 orrs r3, r2
tmp |= hdma->Init.Direction |
80054c0: 68fa ldr r2, [r7, #12]
80054c2: 4313 orrs r3, r2
80054c4: 60fb str r3, [r7, #12]
/* Write to DMA Channel CR register */
hdma->Instance->CCR = tmp;
80054c6: 687b ldr r3, [r7, #4]
80054c8: 681b ldr r3, [r3, #0]
80054ca: 68fa ldr r2, [r7, #12]
80054cc: 601a str r2, [r3, #0]
/* Initialise the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
80054ce: 687b ldr r3, [r7, #4]
80054d0: 2200 movs r2, #0
80054d2: 639a str r2, [r3, #56] @ 0x38
/* Initialize the DMA state*/
hdma->State = HAL_DMA_STATE_READY;
80054d4: 687b ldr r3, [r7, #4]
80054d6: 2201 movs r2, #1
80054d8: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Allocate lock resource and initialize it */
hdma->Lock = HAL_UNLOCKED;
80054dc: 687b ldr r3, [r7, #4]
80054de: 2200 movs r2, #0
80054e0: f883 2020 strb.w r2, [r3, #32]
return HAL_OK;
80054e4: 2300 movs r3, #0
}
80054e6: 4618 mov r0, r3
80054e8: 3714 adds r7, #20
80054ea: 46bd mov sp, r7
80054ec: bc80 pop {r7}
80054ee: 4770 bx lr
80054f0: bffdfff8 .word 0xbffdfff8
80054f4: cccccccd .word 0xcccccccd
80054f8: 40020000 .word 0x40020000
080054fc <HAL_DMA_Start_IT>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
80054fc: b580 push {r7, lr}
80054fe: b086 sub sp, #24
8005500: af00 add r7, sp, #0
8005502: 60f8 str r0, [r7, #12]
8005504: 60b9 str r1, [r7, #8]
8005506: 607a str r2, [r7, #4]
8005508: 603b str r3, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
800550a: 2300 movs r3, #0
800550c: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
800550e: 68fb ldr r3, [r7, #12]
8005510: f893 3020 ldrb.w r3, [r3, #32]
8005514: 2b01 cmp r3, #1
8005516: d101 bne.n 800551c <HAL_DMA_Start_IT+0x20>
8005518: 2302 movs r3, #2
800551a: e04b b.n 80055b4 <HAL_DMA_Start_IT+0xb8>
800551c: 68fb ldr r3, [r7, #12]
800551e: 2201 movs r2, #1
8005520: f883 2020 strb.w r2, [r3, #32]
if(HAL_DMA_STATE_READY == hdma->State)
8005524: 68fb ldr r3, [r7, #12]
8005526: f893 3021 ldrb.w r3, [r3, #33] @ 0x21
800552a: b2db uxtb r3, r3
800552c: 2b01 cmp r3, #1
800552e: d13a bne.n 80055a6 <HAL_DMA_Start_IT+0xaa>
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005530: 68fb ldr r3, [r7, #12]
8005532: 2202 movs r2, #2
8005534: f883 2021 strb.w r2, [r3, #33] @ 0x21
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005538: 68fb ldr r3, [r7, #12]
800553a: 2200 movs r2, #0
800553c: 639a str r2, [r3, #56] @ 0x38
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
800553e: 68fb ldr r3, [r7, #12]
8005540: 681b ldr r3, [r3, #0]
8005542: 681a ldr r2, [r3, #0]
8005544: 68fb ldr r3, [r7, #12]
8005546: 681b ldr r3, [r3, #0]
8005548: f022 0201 bic.w r2, r2, #1
800554c: 601a str r2, [r3, #0]
/* Configure the source, destination address and the data length & clear flags*/
DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
800554e: 683b ldr r3, [r7, #0]
8005550: 687a ldr r2, [r7, #4]
8005552: 68b9 ldr r1, [r7, #8]
8005554: 68f8 ldr r0, [r7, #12]
8005556: f000 f937 bl 80057c8 <DMA_SetConfig>
/* Enable the transfer complete interrupt */
/* Enable the transfer Error interrupt */
if(NULL != hdma->XferHalfCpltCallback)
800555a: 68fb ldr r3, [r7, #12]
800555c: 6adb ldr r3, [r3, #44] @ 0x2c
800555e: 2b00 cmp r3, #0
8005560: d008 beq.n 8005574 <HAL_DMA_Start_IT+0x78>
{
/* Enable the Half transfer complete interrupt as well */
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005562: 68fb ldr r3, [r7, #12]
8005564: 681b ldr r3, [r3, #0]
8005566: 681a ldr r2, [r3, #0]
8005568: 68fb ldr r3, [r7, #12]
800556a: 681b ldr r3, [r3, #0]
800556c: f042 020e orr.w r2, r2, #14
8005570: 601a str r2, [r3, #0]
8005572: e00f b.n 8005594 <HAL_DMA_Start_IT+0x98>
}
else
{
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005574: 68fb ldr r3, [r7, #12]
8005576: 681b ldr r3, [r3, #0]
8005578: 681a ldr r2, [r3, #0]
800557a: 68fb ldr r3, [r7, #12]
800557c: 681b ldr r3, [r3, #0]
800557e: f022 0204 bic.w r2, r2, #4
8005582: 601a str r2, [r3, #0]
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
8005584: 68fb ldr r3, [r7, #12]
8005586: 681b ldr r3, [r3, #0]
8005588: 681a ldr r2, [r3, #0]
800558a: 68fb ldr r3, [r7, #12]
800558c: 681b ldr r3, [r3, #0]
800558e: f042 020a orr.w r2, r2, #10
8005592: 601a str r2, [r3, #0]
}
/* Enable the Peripheral */
__HAL_DMA_ENABLE(hdma);
8005594: 68fb ldr r3, [r7, #12]
8005596: 681b ldr r3, [r3, #0]
8005598: 681a ldr r2, [r3, #0]
800559a: 68fb ldr r3, [r7, #12]
800559c: 681b ldr r3, [r3, #0]
800559e: f042 0201 orr.w r2, r2, #1
80055a2: 601a str r2, [r3, #0]
80055a4: e005 b.n 80055b2 <HAL_DMA_Start_IT+0xb6>
}
else
{
/* Process Unlocked */
__HAL_UNLOCK(hdma);
80055a6: 68fb ldr r3, [r7, #12]
80055a8: 2200 movs r2, #0
80055aa: f883 2020 strb.w r2, [r3, #32]
/* Remain BUSY */
status = HAL_BUSY;
80055ae: 2302 movs r3, #2
80055b0: 75fb strb r3, [r7, #23]
}
return status;
80055b2: 7dfb ldrb r3, [r7, #23]
}
80055b4: 4618 mov r0, r3
80055b6: 3718 adds r7, #24
80055b8: 46bd mov sp, r7
80055ba: bd80 pop {r7, pc}
080055bc <HAL_DMA_IRQHandler>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
80055bc: b580 push {r7, lr}
80055be: b084 sub sp, #16
80055c0: af00 add r7, sp, #0
80055c2: 6078 str r0, [r7, #4]
uint32_t flag_it = hdma->DmaBaseAddress->ISR;
80055c4: 687b ldr r3, [r7, #4]
80055c6: 6bdb ldr r3, [r3, #60] @ 0x3c
80055c8: 681b ldr r3, [r3, #0]
80055ca: 60fb str r3, [r7, #12]
uint32_t source_it = hdma->Instance->CCR;
80055cc: 687b ldr r3, [r7, #4]
80055ce: 681b ldr r3, [r3, #0]
80055d0: 681b ldr r3, [r3, #0]
80055d2: 60bb str r3, [r7, #8]
/* Half Transfer Complete Interrupt management ******************************/
if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
80055d4: 687b ldr r3, [r7, #4]
80055d6: 6c1b ldr r3, [r3, #64] @ 0x40
80055d8: 2204 movs r2, #4
80055da: 409a lsls r2, r3
80055dc: 68fb ldr r3, [r7, #12]
80055de: 4013 ands r3, r2
80055e0: 2b00 cmp r3, #0
80055e2: d04f beq.n 8005684 <HAL_DMA_IRQHandler+0xc8>
80055e4: 68bb ldr r3, [r7, #8]
80055e6: f003 0304 and.w r3, r3, #4
80055ea: 2b00 cmp r3, #0
80055ec: d04a beq.n 8005684 <HAL_DMA_IRQHandler+0xc8>
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
80055ee: 687b ldr r3, [r7, #4]
80055f0: 681b ldr r3, [r3, #0]
80055f2: 681b ldr r3, [r3, #0]
80055f4: f003 0320 and.w r3, r3, #32
80055f8: 2b00 cmp r3, #0
80055fa: d107 bne.n 800560c <HAL_DMA_IRQHandler+0x50>
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
80055fc: 687b ldr r3, [r7, #4]
80055fe: 681b ldr r3, [r3, #0]
8005600: 681a ldr r2, [r3, #0]
8005602: 687b ldr r3, [r7, #4]
8005604: 681b ldr r3, [r3, #0]
8005606: f022 0204 bic.w r2, r2, #4
800560a: 601a str r2, [r3, #0]
}
/* Clear the half transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
800560c: 687b ldr r3, [r7, #4]
800560e: 681b ldr r3, [r3, #0]
8005610: 4a66 ldr r2, [pc, #408] @ (80057ac <HAL_DMA_IRQHandler+0x1f0>)
8005612: 4293 cmp r3, r2
8005614: d029 beq.n 800566a <HAL_DMA_IRQHandler+0xae>
8005616: 687b ldr r3, [r7, #4]
8005618: 681b ldr r3, [r3, #0]
800561a: 4a65 ldr r2, [pc, #404] @ (80057b0 <HAL_DMA_IRQHandler+0x1f4>)
800561c: 4293 cmp r3, r2
800561e: d022 beq.n 8005666 <HAL_DMA_IRQHandler+0xaa>
8005620: 687b ldr r3, [r7, #4]
8005622: 681b ldr r3, [r3, #0]
8005624: 4a63 ldr r2, [pc, #396] @ (80057b4 <HAL_DMA_IRQHandler+0x1f8>)
8005626: 4293 cmp r3, r2
8005628: d01a beq.n 8005660 <HAL_DMA_IRQHandler+0xa4>
800562a: 687b ldr r3, [r7, #4]
800562c: 681b ldr r3, [r3, #0]
800562e: 4a62 ldr r2, [pc, #392] @ (80057b8 <HAL_DMA_IRQHandler+0x1fc>)
8005630: 4293 cmp r3, r2
8005632: d012 beq.n 800565a <HAL_DMA_IRQHandler+0x9e>
8005634: 687b ldr r3, [r7, #4]
8005636: 681b ldr r3, [r3, #0]
8005638: 4a60 ldr r2, [pc, #384] @ (80057bc <HAL_DMA_IRQHandler+0x200>)
800563a: 4293 cmp r3, r2
800563c: d00a beq.n 8005654 <HAL_DMA_IRQHandler+0x98>
800563e: 687b ldr r3, [r7, #4]
8005640: 681b ldr r3, [r3, #0]
8005642: 4a5f ldr r2, [pc, #380] @ (80057c0 <HAL_DMA_IRQHandler+0x204>)
8005644: 4293 cmp r3, r2
8005646: d102 bne.n 800564e <HAL_DMA_IRQHandler+0x92>
8005648: f44f 0380 mov.w r3, #4194304 @ 0x400000
800564c: e00e b.n 800566c <HAL_DMA_IRQHandler+0xb0>
800564e: f04f 6380 mov.w r3, #67108864 @ 0x4000000
8005652: e00b b.n 800566c <HAL_DMA_IRQHandler+0xb0>
8005654: f44f 2380 mov.w r3, #262144 @ 0x40000
8005658: e008 b.n 800566c <HAL_DMA_IRQHandler+0xb0>
800565a: f44f 4380 mov.w r3, #16384 @ 0x4000
800565e: e005 b.n 800566c <HAL_DMA_IRQHandler+0xb0>
8005660: f44f 6380 mov.w r3, #1024 @ 0x400
8005664: e002 b.n 800566c <HAL_DMA_IRQHandler+0xb0>
8005666: 2340 movs r3, #64 @ 0x40
8005668: e000 b.n 800566c <HAL_DMA_IRQHandler+0xb0>
800566a: 2304 movs r3, #4
800566c: 4a55 ldr r2, [pc, #340] @ (80057c4 <HAL_DMA_IRQHandler+0x208>)
800566e: 6053 str r3, [r2, #4]
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
8005670: 687b ldr r3, [r7, #4]
8005672: 6adb ldr r3, [r3, #44] @ 0x2c
8005674: 2b00 cmp r3, #0
8005676: f000 8094 beq.w 80057a2 <HAL_DMA_IRQHandler+0x1e6>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
800567a: 687b ldr r3, [r7, #4]
800567c: 6adb ldr r3, [r3, #44] @ 0x2c
800567e: 6878 ldr r0, [r7, #4]
8005680: 4798 blx r3
if(hdma->XferHalfCpltCallback != NULL)
8005682: e08e b.n 80057a2 <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Complete Interrupt management ***********************************/
else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
8005684: 687b ldr r3, [r7, #4]
8005686: 6c1b ldr r3, [r3, #64] @ 0x40
8005688: 2202 movs r2, #2
800568a: 409a lsls r2, r3
800568c: 68fb ldr r3, [r7, #12]
800568e: 4013 ands r3, r2
8005690: 2b00 cmp r3, #0
8005692: d056 beq.n 8005742 <HAL_DMA_IRQHandler+0x186>
8005694: 68bb ldr r3, [r7, #8]
8005696: f003 0302 and.w r3, r3, #2
800569a: 2b00 cmp r3, #0
800569c: d051 beq.n 8005742 <HAL_DMA_IRQHandler+0x186>
{
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
800569e: 687b ldr r3, [r7, #4]
80056a0: 681b ldr r3, [r3, #0]
80056a2: 681b ldr r3, [r3, #0]
80056a4: f003 0320 and.w r3, r3, #32
80056a8: 2b00 cmp r3, #0
80056aa: d10b bne.n 80056c4 <HAL_DMA_IRQHandler+0x108>
{
/* Disable the transfer complete and error interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
80056ac: 687b ldr r3, [r7, #4]
80056ae: 681b ldr r3, [r3, #0]
80056b0: 681a ldr r2, [r3, #0]
80056b2: 687b ldr r3, [r7, #4]
80056b4: 681b ldr r3, [r3, #0]
80056b6: f022 020a bic.w r2, r2, #10
80056ba: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
80056bc: 687b ldr r3, [r7, #4]
80056be: 2201 movs r2, #1
80056c0: f883 2021 strb.w r2, [r3, #33] @ 0x21
}
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
80056c4: 687b ldr r3, [r7, #4]
80056c6: 681b ldr r3, [r3, #0]
80056c8: 4a38 ldr r2, [pc, #224] @ (80057ac <HAL_DMA_IRQHandler+0x1f0>)
80056ca: 4293 cmp r3, r2
80056cc: d029 beq.n 8005722 <HAL_DMA_IRQHandler+0x166>
80056ce: 687b ldr r3, [r7, #4]
80056d0: 681b ldr r3, [r3, #0]
80056d2: 4a37 ldr r2, [pc, #220] @ (80057b0 <HAL_DMA_IRQHandler+0x1f4>)
80056d4: 4293 cmp r3, r2
80056d6: d022 beq.n 800571e <HAL_DMA_IRQHandler+0x162>
80056d8: 687b ldr r3, [r7, #4]
80056da: 681b ldr r3, [r3, #0]
80056dc: 4a35 ldr r2, [pc, #212] @ (80057b4 <HAL_DMA_IRQHandler+0x1f8>)
80056de: 4293 cmp r3, r2
80056e0: d01a beq.n 8005718 <HAL_DMA_IRQHandler+0x15c>
80056e2: 687b ldr r3, [r7, #4]
80056e4: 681b ldr r3, [r3, #0]
80056e6: 4a34 ldr r2, [pc, #208] @ (80057b8 <HAL_DMA_IRQHandler+0x1fc>)
80056e8: 4293 cmp r3, r2
80056ea: d012 beq.n 8005712 <HAL_DMA_IRQHandler+0x156>
80056ec: 687b ldr r3, [r7, #4]
80056ee: 681b ldr r3, [r3, #0]
80056f0: 4a32 ldr r2, [pc, #200] @ (80057bc <HAL_DMA_IRQHandler+0x200>)
80056f2: 4293 cmp r3, r2
80056f4: d00a beq.n 800570c <HAL_DMA_IRQHandler+0x150>
80056f6: 687b ldr r3, [r7, #4]
80056f8: 681b ldr r3, [r3, #0]
80056fa: 4a31 ldr r2, [pc, #196] @ (80057c0 <HAL_DMA_IRQHandler+0x204>)
80056fc: 4293 cmp r3, r2
80056fe: d102 bne.n 8005706 <HAL_DMA_IRQHandler+0x14a>
8005700: f44f 1300 mov.w r3, #2097152 @ 0x200000
8005704: e00e b.n 8005724 <HAL_DMA_IRQHandler+0x168>
8005706: f04f 7300 mov.w r3, #33554432 @ 0x2000000
800570a: e00b b.n 8005724 <HAL_DMA_IRQHandler+0x168>
800570c: f44f 3300 mov.w r3, #131072 @ 0x20000
8005710: e008 b.n 8005724 <HAL_DMA_IRQHandler+0x168>
8005712: f44f 5300 mov.w r3, #8192 @ 0x2000
8005716: e005 b.n 8005724 <HAL_DMA_IRQHandler+0x168>
8005718: f44f 7300 mov.w r3, #512 @ 0x200
800571c: e002 b.n 8005724 <HAL_DMA_IRQHandler+0x168>
800571e: 2320 movs r3, #32
8005720: e000 b.n 8005724 <HAL_DMA_IRQHandler+0x168>
8005722: 2302 movs r3, #2
8005724: 4a27 ldr r2, [pc, #156] @ (80057c4 <HAL_DMA_IRQHandler+0x208>)
8005726: 6053 str r3, [r2, #4]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005728: 687b ldr r3, [r7, #4]
800572a: 2200 movs r2, #0
800572c: f883 2020 strb.w r2, [r3, #32]
if(hdma->XferCpltCallback != NULL)
8005730: 687b ldr r3, [r7, #4]
8005732: 6a9b ldr r3, [r3, #40] @ 0x28
8005734: 2b00 cmp r3, #0
8005736: d034 beq.n 80057a2 <HAL_DMA_IRQHandler+0x1e6>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8005738: 687b ldr r3, [r7, #4]
800573a: 6a9b ldr r3, [r3, #40] @ 0x28
800573c: 6878 ldr r0, [r7, #4]
800573e: 4798 blx r3
if(hdma->XferCpltCallback != NULL)
8005740: e02f b.n 80057a2 <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Error Interrupt management **************************************/
else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
8005742: 687b ldr r3, [r7, #4]
8005744: 6c1b ldr r3, [r3, #64] @ 0x40
8005746: 2208 movs r2, #8
8005748: 409a lsls r2, r3
800574a: 68fb ldr r3, [r7, #12]
800574c: 4013 ands r3, r2
800574e: 2b00 cmp r3, #0
8005750: d028 beq.n 80057a4 <HAL_DMA_IRQHandler+0x1e8>
8005752: 68bb ldr r3, [r7, #8]
8005754: f003 0308 and.w r3, r3, #8
8005758: 2b00 cmp r3, #0
800575a: d023 beq.n 80057a4 <HAL_DMA_IRQHandler+0x1e8>
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
/* Disable ALL DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
800575c: 687b ldr r3, [r7, #4]
800575e: 681b ldr r3, [r3, #0]
8005760: 681a ldr r2, [r3, #0]
8005762: 687b ldr r3, [r7, #4]
8005764: 681b ldr r3, [r3, #0]
8005766: f022 020e bic.w r2, r2, #14
800576a: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
800576c: 687b ldr r3, [r7, #4]
800576e: 6c1a ldr r2, [r3, #64] @ 0x40
8005770: 687b ldr r3, [r7, #4]
8005772: 6bdb ldr r3, [r3, #60] @ 0x3c
8005774: 2101 movs r1, #1
8005776: fa01 f202 lsl.w r2, r1, r2
800577a: 605a str r2, [r3, #4]
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
800577c: 687b ldr r3, [r7, #4]
800577e: 2201 movs r2, #1
8005780: 639a str r2, [r3, #56] @ 0x38
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8005782: 687b ldr r3, [r7, #4]
8005784: 2201 movs r2, #1
8005786: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Process Unlocked */
__HAL_UNLOCK(hdma);
800578a: 687b ldr r3, [r7, #4]
800578c: 2200 movs r2, #0
800578e: f883 2020 strb.w r2, [r3, #32]
if (hdma->XferErrorCallback != NULL)
8005792: 687b ldr r3, [r7, #4]
8005794: 6b1b ldr r3, [r3, #48] @ 0x30
8005796: 2b00 cmp r3, #0
8005798: d004 beq.n 80057a4 <HAL_DMA_IRQHandler+0x1e8>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
800579a: 687b ldr r3, [r7, #4]
800579c: 6b1b ldr r3, [r3, #48] @ 0x30
800579e: 6878 ldr r0, [r7, #4]
80057a0: 4798 blx r3
}
}
return;
80057a2: bf00 nop
80057a4: bf00 nop
}
80057a6: 3710 adds r7, #16
80057a8: 46bd mov sp, r7
80057aa: bd80 pop {r7, pc}
80057ac: 40020008 .word 0x40020008
80057b0: 4002001c .word 0x4002001c
80057b4: 40020030 .word 0x40020030
80057b8: 40020044 .word 0x40020044
80057bc: 40020058 .word 0x40020058
80057c0: 4002006c .word 0x4002006c
80057c4: 40020000 .word 0x40020000
080057c8 <DMA_SetConfig>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
80057c8: b480 push {r7}
80057ca: b085 sub sp, #20
80057cc: af00 add r7, sp, #0
80057ce: 60f8 str r0, [r7, #12]
80057d0: 60b9 str r1, [r7, #8]
80057d2: 607a str r2, [r7, #4]
80057d4: 603b str r3, [r7, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
80057d6: 68fb ldr r3, [r7, #12]
80057d8: 6c1a ldr r2, [r3, #64] @ 0x40
80057da: 68fb ldr r3, [r7, #12]
80057dc: 6bdb ldr r3, [r3, #60] @ 0x3c
80057de: 2101 movs r1, #1
80057e0: fa01 f202 lsl.w r2, r1, r2
80057e4: 605a str r2, [r3, #4]
/* Configure DMA Channel data length */
hdma->Instance->CNDTR = DataLength;
80057e6: 68fb ldr r3, [r7, #12]
80057e8: 681b ldr r3, [r3, #0]
80057ea: 683a ldr r2, [r7, #0]
80057ec: 605a str r2, [r3, #4]
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
80057ee: 68fb ldr r3, [r7, #12]
80057f0: 685b ldr r3, [r3, #4]
80057f2: 2b10 cmp r3, #16
80057f4: d108 bne.n 8005808 <DMA_SetConfig+0x40>
{
/* Configure DMA Channel destination address */
hdma->Instance->CPAR = DstAddress;
80057f6: 68fb ldr r3, [r7, #12]
80057f8: 681b ldr r3, [r3, #0]
80057fa: 687a ldr r2, [r7, #4]
80057fc: 609a str r2, [r3, #8]
/* Configure DMA Channel source address */
hdma->Instance->CMAR = SrcAddress;
80057fe: 68fb ldr r3, [r7, #12]
8005800: 681b ldr r3, [r3, #0]
8005802: 68ba ldr r2, [r7, #8]
8005804: 60da str r2, [r3, #12]
hdma->Instance->CPAR = SrcAddress;
/* Configure DMA Channel destination address */
hdma->Instance->CMAR = DstAddress;
}
}
8005806: e007 b.n 8005818 <DMA_SetConfig+0x50>
hdma->Instance->CPAR = SrcAddress;
8005808: 68fb ldr r3, [r7, #12]
800580a: 681b ldr r3, [r3, #0]
800580c: 68ba ldr r2, [r7, #8]
800580e: 609a str r2, [r3, #8]
hdma->Instance->CMAR = DstAddress;
8005810: 68fb ldr r3, [r7, #12]
8005812: 681b ldr r3, [r3, #0]
8005814: 687a ldr r2, [r7, #4]
8005816: 60da str r2, [r3, #12]
}
8005818: bf00 nop
800581a: 3714 adds r7, #20
800581c: 46bd mov sp, r7
800581e: bc80 pop {r7}
8005820: 4770 bx lr
...
08005824 <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
8005824: b5f0 push {r4, r5, r6, r7, lr}
8005826: b087 sub sp, #28
8005828: af00 add r7, sp, #0
800582a: 60f8 str r0, [r7, #12]
800582c: 60b9 str r1, [r7, #8]
800582e: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
8005832: 2301 movs r3, #1
8005834: 75fb strb r3, [r7, #23]
uint8_t index = 0;
8005836: 2300 movs r3, #0
8005838: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
800583a: 2300 movs r3, #0
800583c: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
800583e: 4b2f ldr r3, [pc, #188] @ (80058fc <HAL_FLASH_Program+0xd8>)
8005840: 7e1b ldrb r3, [r3, #24]
8005842: 2b01 cmp r3, #1
8005844: d101 bne.n 800584a <HAL_FLASH_Program+0x26>
8005846: 2302 movs r3, #2
8005848: e054 b.n 80058f4 <HAL_FLASH_Program+0xd0>
800584a: 4b2c ldr r3, [pc, #176] @ (80058fc <HAL_FLASH_Program+0xd8>)
800584c: 2201 movs r2, #1
800584e: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8005850: f24c 3050 movw r0, #50000 @ 0xc350
8005854: f000 f8a8 bl 80059a8 <FLASH_WaitForLastOperation>
8005858: 4603 mov r3, r0
800585a: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
800585c: 7dfb ldrb r3, [r7, #23]
800585e: 2b00 cmp r3, #0
8005860: d144 bne.n 80058ec <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
8005862: 68fb ldr r3, [r7, #12]
8005864: 2b01 cmp r3, #1
8005866: d102 bne.n 800586e <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8005868: 2301 movs r3, #1
800586a: 757b strb r3, [r7, #21]
800586c: e007 b.n 800587e <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
800586e: 68fb ldr r3, [r7, #12]
8005870: 2b02 cmp r3, #2
8005872: d102 bne.n 800587a <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
8005874: 2302 movs r3, #2
8005876: 757b strb r3, [r7, #21]
8005878: e001 b.n 800587e <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
800587a: 2304 movs r3, #4
800587c: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
800587e: 2300 movs r3, #0
8005880: 75bb strb r3, [r7, #22]
8005882: e02d b.n 80058e0 <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
8005884: 7dbb ldrb r3, [r7, #22]
8005886: 005a lsls r2, r3, #1
8005888: 68bb ldr r3, [r7, #8]
800588a: eb02 0c03 add.w ip, r2, r3
800588e: 7dbb ldrb r3, [r7, #22]
8005890: 0119 lsls r1, r3, #4
8005892: e9d7 2300 ldrd r2, r3, [r7]
8005896: f1c1 0620 rsb r6, r1, #32
800589a: f1a1 0020 sub.w r0, r1, #32
800589e: fa22 f401 lsr.w r4, r2, r1
80058a2: fa03 f606 lsl.w r6, r3, r6
80058a6: 4334 orrs r4, r6
80058a8: fa23 f000 lsr.w r0, r3, r0
80058ac: 4304 orrs r4, r0
80058ae: fa23 f501 lsr.w r5, r3, r1
80058b2: b2a3 uxth r3, r4
80058b4: 4619 mov r1, r3
80058b6: 4660 mov r0, ip
80058b8: f000 f85a bl 8005970 <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
80058bc: f24c 3050 movw r0, #50000 @ 0xc350
80058c0: f000 f872 bl 80059a8 <FLASH_WaitForLastOperation>
80058c4: 4603 mov r3, r0
80058c6: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
80058c8: 4b0d ldr r3, [pc, #52] @ (8005900 <HAL_FLASH_Program+0xdc>)
80058ca: 691b ldr r3, [r3, #16]
80058cc: 4a0c ldr r2, [pc, #48] @ (8005900 <HAL_FLASH_Program+0xdc>)
80058ce: f023 0301 bic.w r3, r3, #1
80058d2: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
80058d4: 7dfb ldrb r3, [r7, #23]
80058d6: 2b00 cmp r3, #0
80058d8: d107 bne.n 80058ea <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
80058da: 7dbb ldrb r3, [r7, #22]
80058dc: 3301 adds r3, #1
80058de: 75bb strb r3, [r7, #22]
80058e0: 7dba ldrb r2, [r7, #22]
80058e2: 7d7b ldrb r3, [r7, #21]
80058e4: 429a cmp r2, r3
80058e6: d3cd bcc.n 8005884 <HAL_FLASH_Program+0x60>
80058e8: e000 b.n 80058ec <HAL_FLASH_Program+0xc8>
{
break;
80058ea: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
80058ec: 4b03 ldr r3, [pc, #12] @ (80058fc <HAL_FLASH_Program+0xd8>)
80058ee: 2200 movs r2, #0
80058f0: 761a strb r2, [r3, #24]
return status;
80058f2: 7dfb ldrb r3, [r7, #23]
}
80058f4: 4618 mov r0, r3
80058f6: 371c adds r7, #28
80058f8: 46bd mov sp, r7
80058fa: bdf0 pop {r4, r5, r6, r7, pc}
80058fc: 20000470 .word 0x20000470
8005900: 40022000 .word 0x40022000
08005904 <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
8005904: b480 push {r7}
8005906: b083 sub sp, #12
8005908: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
800590a: 2300 movs r3, #0
800590c: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
800590e: 4b0d ldr r3, [pc, #52] @ (8005944 <HAL_FLASH_Unlock+0x40>)
8005910: 691b ldr r3, [r3, #16]
8005912: f003 0380 and.w r3, r3, #128 @ 0x80
8005916: 2b00 cmp r3, #0
8005918: d00d beq.n 8005936 <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
800591a: 4b0a ldr r3, [pc, #40] @ (8005944 <HAL_FLASH_Unlock+0x40>)
800591c: 4a0a ldr r2, [pc, #40] @ (8005948 <HAL_FLASH_Unlock+0x44>)
800591e: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
8005920: 4b08 ldr r3, [pc, #32] @ (8005944 <HAL_FLASH_Unlock+0x40>)
8005922: 4a0a ldr r2, [pc, #40] @ (800594c <HAL_FLASH_Unlock+0x48>)
8005924: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8005926: 4b07 ldr r3, [pc, #28] @ (8005944 <HAL_FLASH_Unlock+0x40>)
8005928: 691b ldr r3, [r3, #16]
800592a: f003 0380 and.w r3, r3, #128 @ 0x80
800592e: 2b00 cmp r3, #0
8005930: d001 beq.n 8005936 <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
8005932: 2301 movs r3, #1
8005934: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
8005936: 79fb ldrb r3, [r7, #7]
}
8005938: 4618 mov r0, r3
800593a: 370c adds r7, #12
800593c: 46bd mov sp, r7
800593e: bc80 pop {r7}
8005940: 4770 bx lr
8005942: bf00 nop
8005944: 40022000 .word 0x40022000
8005948: 45670123 .word 0x45670123
800594c: cdef89ab .word 0xcdef89ab
08005950 <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
8005950: b480 push {r7}
8005952: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
8005954: 4b05 ldr r3, [pc, #20] @ (800596c <HAL_FLASH_Lock+0x1c>)
8005956: 691b ldr r3, [r3, #16]
8005958: 4a04 ldr r2, [pc, #16] @ (800596c <HAL_FLASH_Lock+0x1c>)
800595a: f043 0380 orr.w r3, r3, #128 @ 0x80
800595e: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
8005960: 2300 movs r3, #0
}
8005962: 4618 mov r0, r3
8005964: 46bd mov sp, r7
8005966: bc80 pop {r7}
8005968: 4770 bx lr
800596a: bf00 nop
800596c: 40022000 .word 0x40022000
08005970 <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
8005970: b480 push {r7}
8005972: b083 sub sp, #12
8005974: af00 add r7, sp, #0
8005976: 6078 str r0, [r7, #4]
8005978: 460b mov r3, r1
800597a: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
800597c: 4b08 ldr r3, [pc, #32] @ (80059a0 <FLASH_Program_HalfWord+0x30>)
800597e: 2200 movs r2, #0
8005980: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
8005982: 4b08 ldr r3, [pc, #32] @ (80059a4 <FLASH_Program_HalfWord+0x34>)
8005984: 691b ldr r3, [r3, #16]
8005986: 4a07 ldr r2, [pc, #28] @ (80059a4 <FLASH_Program_HalfWord+0x34>)
8005988: f043 0301 orr.w r3, r3, #1
800598c: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
800598e: 687b ldr r3, [r7, #4]
8005990: 887a ldrh r2, [r7, #2]
8005992: 801a strh r2, [r3, #0]
}
8005994: bf00 nop
8005996: 370c adds r7, #12
8005998: 46bd mov sp, r7
800599a: bc80 pop {r7}
800599c: 4770 bx lr
800599e: bf00 nop
80059a0: 20000470 .word 0x20000470
80059a4: 40022000 .word 0x40022000
080059a8 <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
80059a8: b580 push {r7, lr}
80059aa: b084 sub sp, #16
80059ac: af00 add r7, sp, #0
80059ae: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
80059b0: f7ff f860 bl 8004a74 <HAL_GetTick>
80059b4: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80059b6: e010 b.n 80059da <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
80059b8: 687b ldr r3, [r7, #4]
80059ba: f1b3 3fff cmp.w r3, #4294967295
80059be: d00c beq.n 80059da <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
80059c0: 687b ldr r3, [r7, #4]
80059c2: 2b00 cmp r3, #0
80059c4: d007 beq.n 80059d6 <FLASH_WaitForLastOperation+0x2e>
80059c6: f7ff f855 bl 8004a74 <HAL_GetTick>
80059ca: 4602 mov r2, r0
80059cc: 68fb ldr r3, [r7, #12]
80059ce: 1ad3 subs r3, r2, r3
80059d0: 687a ldr r2, [r7, #4]
80059d2: 429a cmp r2, r3
80059d4: d201 bcs.n 80059da <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
80059d6: 2303 movs r3, #3
80059d8: e025 b.n 8005a26 <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80059da: 4b15 ldr r3, [pc, #84] @ (8005a30 <FLASH_WaitForLastOperation+0x88>)
80059dc: 68db ldr r3, [r3, #12]
80059de: f003 0301 and.w r3, r3, #1
80059e2: 2b00 cmp r3, #0
80059e4: d1e8 bne.n 80059b8 <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
80059e6: 4b12 ldr r3, [pc, #72] @ (8005a30 <FLASH_WaitForLastOperation+0x88>)
80059e8: 68db ldr r3, [r3, #12]
80059ea: f003 0320 and.w r3, r3, #32
80059ee: 2b00 cmp r3, #0
80059f0: d002 beq.n 80059f8 <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
80059f2: 4b0f ldr r3, [pc, #60] @ (8005a30 <FLASH_WaitForLastOperation+0x88>)
80059f4: 2220 movs r2, #32
80059f6: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
80059f8: 4b0d ldr r3, [pc, #52] @ (8005a30 <FLASH_WaitForLastOperation+0x88>)
80059fa: 68db ldr r3, [r3, #12]
80059fc: f003 0310 and.w r3, r3, #16
8005a00: 2b00 cmp r3, #0
8005a02: d10b bne.n 8005a1c <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8005a04: 4b0a ldr r3, [pc, #40] @ (8005a30 <FLASH_WaitForLastOperation+0x88>)
8005a06: 69db ldr r3, [r3, #28]
8005a08: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8005a0c: 2b00 cmp r3, #0
8005a0e: d105 bne.n 8005a1c <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8005a10: 4b07 ldr r3, [pc, #28] @ (8005a30 <FLASH_WaitForLastOperation+0x88>)
8005a12: 68db ldr r3, [r3, #12]
8005a14: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8005a18: 2b00 cmp r3, #0
8005a1a: d003 beq.n 8005a24 <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
8005a1c: f000 f80a bl 8005a34 <FLASH_SetErrorCode>
return HAL_ERROR;
8005a20: 2301 movs r3, #1
8005a22: e000 b.n 8005a26 <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
8005a24: 2300 movs r3, #0
}
8005a26: 4618 mov r0, r3
8005a28: 3710 adds r7, #16
8005a2a: 46bd mov sp, r7
8005a2c: bd80 pop {r7, pc}
8005a2e: bf00 nop
8005a30: 40022000 .word 0x40022000
08005a34 <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
8005a34: b480 push {r7}
8005a36: b083 sub sp, #12
8005a38: af00 add r7, sp, #0
uint32_t flags = 0U;
8005a3a: 2300 movs r3, #0
8005a3c: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
8005a3e: 4b23 ldr r3, [pc, #140] @ (8005acc <FLASH_SetErrorCode+0x98>)
8005a40: 68db ldr r3, [r3, #12]
8005a42: f003 0310 and.w r3, r3, #16
8005a46: 2b00 cmp r3, #0
8005a48: d009 beq.n 8005a5e <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
8005a4a: 4b21 ldr r3, [pc, #132] @ (8005ad0 <FLASH_SetErrorCode+0x9c>)
8005a4c: 69db ldr r3, [r3, #28]
8005a4e: f043 0302 orr.w r3, r3, #2
8005a52: 4a1f ldr r2, [pc, #124] @ (8005ad0 <FLASH_SetErrorCode+0x9c>)
8005a54: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
8005a56: 687b ldr r3, [r7, #4]
8005a58: f043 0310 orr.w r3, r3, #16
8005a5c: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8005a5e: 4b1b ldr r3, [pc, #108] @ (8005acc <FLASH_SetErrorCode+0x98>)
8005a60: 68db ldr r3, [r3, #12]
8005a62: f003 0304 and.w r3, r3, #4
8005a66: 2b00 cmp r3, #0
8005a68: d009 beq.n 8005a7e <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
8005a6a: 4b19 ldr r3, [pc, #100] @ (8005ad0 <FLASH_SetErrorCode+0x9c>)
8005a6c: 69db ldr r3, [r3, #28]
8005a6e: f043 0301 orr.w r3, r3, #1
8005a72: 4a17 ldr r2, [pc, #92] @ (8005ad0 <FLASH_SetErrorCode+0x9c>)
8005a74: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
8005a76: 687b ldr r3, [r7, #4]
8005a78: f043 0304 orr.w r3, r3, #4
8005a7c: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
8005a7e: 4b13 ldr r3, [pc, #76] @ (8005acc <FLASH_SetErrorCode+0x98>)
8005a80: 69db ldr r3, [r3, #28]
8005a82: f003 0301 and.w r3, r3, #1
8005a86: 2b00 cmp r3, #0
8005a88: d00b beq.n 8005aa2 <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
8005a8a: 4b11 ldr r3, [pc, #68] @ (8005ad0 <FLASH_SetErrorCode+0x9c>)
8005a8c: 69db ldr r3, [r3, #28]
8005a8e: f043 0304 orr.w r3, r3, #4
8005a92: 4a0f ldr r2, [pc, #60] @ (8005ad0 <FLASH_SetErrorCode+0x9c>)
8005a94: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
8005a96: 4b0d ldr r3, [pc, #52] @ (8005acc <FLASH_SetErrorCode+0x98>)
8005a98: 69db ldr r3, [r3, #28]
8005a9a: 4a0c ldr r2, [pc, #48] @ (8005acc <FLASH_SetErrorCode+0x98>)
8005a9c: f023 0301 bic.w r3, r3, #1
8005aa0: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
8005aa2: 687b ldr r3, [r7, #4]
8005aa4: f240 1201 movw r2, #257 @ 0x101
8005aa8: 4293 cmp r3, r2
8005aaa: d106 bne.n 8005aba <FLASH_SetErrorCode+0x86>
8005aac: 4b07 ldr r3, [pc, #28] @ (8005acc <FLASH_SetErrorCode+0x98>)
8005aae: 69db ldr r3, [r3, #28]
8005ab0: 4a06 ldr r2, [pc, #24] @ (8005acc <FLASH_SetErrorCode+0x98>)
8005ab2: f023 0301 bic.w r3, r3, #1
8005ab6: 61d3 str r3, [r2, #28]
}
8005ab8: e002 b.n 8005ac0 <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
8005aba: 4a04 ldr r2, [pc, #16] @ (8005acc <FLASH_SetErrorCode+0x98>)
8005abc: 687b ldr r3, [r7, #4]
8005abe: 60d3 str r3, [r2, #12]
}
8005ac0: bf00 nop
8005ac2: 370c adds r7, #12
8005ac4: 46bd mov sp, r7
8005ac6: bc80 pop {r7}
8005ac8: 4770 bx lr
8005aca: bf00 nop
8005acc: 40022000 .word 0x40022000
8005ad0: 20000470 .word 0x20000470
08005ad4 <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
8005ad4: b580 push {r7, lr}
8005ad6: b084 sub sp, #16
8005ad8: af00 add r7, sp, #0
8005ada: 6078 str r0, [r7, #4]
8005adc: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
8005ade: 2301 movs r3, #1
8005ae0: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
8005ae2: 2300 movs r3, #0
8005ae4: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
8005ae6: 4b2f ldr r3, [pc, #188] @ (8005ba4 <HAL_FLASHEx_Erase+0xd0>)
8005ae8: 7e1b ldrb r3, [r3, #24]
8005aea: 2b01 cmp r3, #1
8005aec: d101 bne.n 8005af2 <HAL_FLASHEx_Erase+0x1e>
8005aee: 2302 movs r3, #2
8005af0: e053 b.n 8005b9a <HAL_FLASHEx_Erase+0xc6>
8005af2: 4b2c ldr r3, [pc, #176] @ (8005ba4 <HAL_FLASHEx_Erase+0xd0>)
8005af4: 2201 movs r2, #1
8005af6: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
8005af8: 687b ldr r3, [r7, #4]
8005afa: 681b ldr r3, [r3, #0]
8005afc: 2b02 cmp r3, #2
8005afe: d116 bne.n 8005b2e <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
8005b00: f24c 3050 movw r0, #50000 @ 0xc350
8005b04: f7ff ff50 bl 80059a8 <FLASH_WaitForLastOperation>
8005b08: 4603 mov r3, r0
8005b0a: 2b00 cmp r3, #0
8005b0c: d141 bne.n 8005b92 <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
8005b0e: 2001 movs r0, #1
8005b10: f000 f84c bl 8005bac <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8005b14: f24c 3050 movw r0, #50000 @ 0xc350
8005b18: f7ff ff46 bl 80059a8 <FLASH_WaitForLastOperation>
8005b1c: 4603 mov r3, r0
8005b1e: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
8005b20: 4b21 ldr r3, [pc, #132] @ (8005ba8 <HAL_FLASHEx_Erase+0xd4>)
8005b22: 691b ldr r3, [r3, #16]
8005b24: 4a20 ldr r2, [pc, #128] @ (8005ba8 <HAL_FLASHEx_Erase+0xd4>)
8005b26: f023 0304 bic.w r3, r3, #4
8005b2a: 6113 str r3, [r2, #16]
8005b2c: e031 b.n 8005b92 <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
8005b2e: f24c 3050 movw r0, #50000 @ 0xc350
8005b32: f7ff ff39 bl 80059a8 <FLASH_WaitForLastOperation>
8005b36: 4603 mov r3, r0
8005b38: 2b00 cmp r3, #0
8005b3a: d12a bne.n 8005b92 <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
8005b3c: 683b ldr r3, [r7, #0]
8005b3e: f04f 32ff mov.w r2, #4294967295
8005b42: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
8005b44: 687b ldr r3, [r7, #4]
8005b46: 689b ldr r3, [r3, #8]
8005b48: 60bb str r3, [r7, #8]
8005b4a: e019 b.n 8005b80 <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
8005b4c: 68b8 ldr r0, [r7, #8]
8005b4e: f000 f849 bl 8005be4 <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8005b52: f24c 3050 movw r0, #50000 @ 0xc350
8005b56: f7ff ff27 bl 80059a8 <FLASH_WaitForLastOperation>
8005b5a: 4603 mov r3, r0
8005b5c: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
8005b5e: 4b12 ldr r3, [pc, #72] @ (8005ba8 <HAL_FLASHEx_Erase+0xd4>)
8005b60: 691b ldr r3, [r3, #16]
8005b62: 4a11 ldr r2, [pc, #68] @ (8005ba8 <HAL_FLASHEx_Erase+0xd4>)
8005b64: f023 0302 bic.w r3, r3, #2
8005b68: 6113 str r3, [r2, #16]
if (status != HAL_OK)
8005b6a: 7bfb ldrb r3, [r7, #15]
8005b6c: 2b00 cmp r3, #0
8005b6e: d003 beq.n 8005b78 <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
8005b70: 683b ldr r3, [r7, #0]
8005b72: 68ba ldr r2, [r7, #8]
8005b74: 601a str r2, [r3, #0]
break;
8005b76: e00c b.n 8005b92 <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
8005b78: 68bb ldr r3, [r7, #8]
8005b7a: f503 6380 add.w r3, r3, #1024 @ 0x400
8005b7e: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
8005b80: 687b ldr r3, [r7, #4]
8005b82: 68db ldr r3, [r3, #12]
8005b84: 029a lsls r2, r3, #10
8005b86: 687b ldr r3, [r7, #4]
8005b88: 689b ldr r3, [r3, #8]
8005b8a: 4413 add r3, r2
8005b8c: 68ba ldr r2, [r7, #8]
8005b8e: 429a cmp r2, r3
8005b90: d3dc bcc.n 8005b4c <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8005b92: 4b04 ldr r3, [pc, #16] @ (8005ba4 <HAL_FLASHEx_Erase+0xd0>)
8005b94: 2200 movs r2, #0
8005b96: 761a strb r2, [r3, #24]
return status;
8005b98: 7bfb ldrb r3, [r7, #15]
}
8005b9a: 4618 mov r0, r3
8005b9c: 3710 adds r7, #16
8005b9e: 46bd mov sp, r7
8005ba0: bd80 pop {r7, pc}
8005ba2: bf00 nop
8005ba4: 20000470 .word 0x20000470
8005ba8: 40022000 .word 0x40022000
08005bac <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
8005bac: b480 push {r7}
8005bae: b083 sub sp, #12
8005bb0: af00 add r7, sp, #0
8005bb2: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8005bb4: 4b09 ldr r3, [pc, #36] @ (8005bdc <FLASH_MassErase+0x30>)
8005bb6: 2200 movs r2, #0
8005bb8: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
8005bba: 4b09 ldr r3, [pc, #36] @ (8005be0 <FLASH_MassErase+0x34>)
8005bbc: 691b ldr r3, [r3, #16]
8005bbe: 4a08 ldr r2, [pc, #32] @ (8005be0 <FLASH_MassErase+0x34>)
8005bc0: f043 0304 orr.w r3, r3, #4
8005bc4: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8005bc6: 4b06 ldr r3, [pc, #24] @ (8005be0 <FLASH_MassErase+0x34>)
8005bc8: 691b ldr r3, [r3, #16]
8005bca: 4a05 ldr r2, [pc, #20] @ (8005be0 <FLASH_MassErase+0x34>)
8005bcc: f043 0340 orr.w r3, r3, #64 @ 0x40
8005bd0: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
8005bd2: bf00 nop
8005bd4: 370c adds r7, #12
8005bd6: 46bd mov sp, r7
8005bd8: bc80 pop {r7}
8005bda: 4770 bx lr
8005bdc: 20000470 .word 0x20000470
8005be0: 40022000 .word 0x40022000
08005be4 <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
8005be4: b480 push {r7}
8005be6: b083 sub sp, #12
8005be8: af00 add r7, sp, #0
8005bea: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8005bec: 4b0b ldr r3, [pc, #44] @ (8005c1c <FLASH_PageErase+0x38>)
8005bee: 2200 movs r2, #0
8005bf0: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
8005bf2: 4b0b ldr r3, [pc, #44] @ (8005c20 <FLASH_PageErase+0x3c>)
8005bf4: 691b ldr r3, [r3, #16]
8005bf6: 4a0a ldr r2, [pc, #40] @ (8005c20 <FLASH_PageErase+0x3c>)
8005bf8: f043 0302 orr.w r3, r3, #2
8005bfc: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
8005bfe: 4a08 ldr r2, [pc, #32] @ (8005c20 <FLASH_PageErase+0x3c>)
8005c00: 687b ldr r3, [r7, #4]
8005c02: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8005c04: 4b06 ldr r3, [pc, #24] @ (8005c20 <FLASH_PageErase+0x3c>)
8005c06: 691b ldr r3, [r3, #16]
8005c08: 4a05 ldr r2, [pc, #20] @ (8005c20 <FLASH_PageErase+0x3c>)
8005c0a: f043 0340 orr.w r3, r3, #64 @ 0x40
8005c0e: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
8005c10: bf00 nop
8005c12: 370c adds r7, #12
8005c14: 46bd mov sp, r7
8005c16: bc80 pop {r7}
8005c18: 4770 bx lr
8005c1a: bf00 nop
8005c1c: 20000470 .word 0x20000470
8005c20: 40022000 .word 0x40022000
08005c24 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8005c24: b480 push {r7}
8005c26: b08b sub sp, #44 @ 0x2c
8005c28: af00 add r7, sp, #0
8005c2a: 6078 str r0, [r7, #4]
8005c2c: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8005c2e: 2300 movs r3, #0
8005c30: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
8005c32: 2300 movs r3, #0
8005c34: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8005c36: e169 b.n 8005f0c <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8005c38: 2201 movs r2, #1
8005c3a: 6a7b ldr r3, [r7, #36] @ 0x24
8005c3c: fa02 f303 lsl.w r3, r2, r3
8005c40: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8005c42: 683b ldr r3, [r7, #0]
8005c44: 681b ldr r3, [r3, #0]
8005c46: 69fa ldr r2, [r7, #28]
8005c48: 4013 ands r3, r2
8005c4a: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8005c4c: 69ba ldr r2, [r7, #24]
8005c4e: 69fb ldr r3, [r7, #28]
8005c50: 429a cmp r2, r3
8005c52: f040 8158 bne.w 8005f06 <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
8005c56: 683b ldr r3, [r7, #0]
8005c58: 685b ldr r3, [r3, #4]
8005c5a: 4a9a ldr r2, [pc, #616] @ (8005ec4 <HAL_GPIO_Init+0x2a0>)
8005c5c: 4293 cmp r3, r2
8005c5e: d05e beq.n 8005d1e <HAL_GPIO_Init+0xfa>
8005c60: 4a98 ldr r2, [pc, #608] @ (8005ec4 <HAL_GPIO_Init+0x2a0>)
8005c62: 4293 cmp r3, r2
8005c64: d875 bhi.n 8005d52 <HAL_GPIO_Init+0x12e>
8005c66: 4a98 ldr r2, [pc, #608] @ (8005ec8 <HAL_GPIO_Init+0x2a4>)
8005c68: 4293 cmp r3, r2
8005c6a: d058 beq.n 8005d1e <HAL_GPIO_Init+0xfa>
8005c6c: 4a96 ldr r2, [pc, #600] @ (8005ec8 <HAL_GPIO_Init+0x2a4>)
8005c6e: 4293 cmp r3, r2
8005c70: d86f bhi.n 8005d52 <HAL_GPIO_Init+0x12e>
8005c72: 4a96 ldr r2, [pc, #600] @ (8005ecc <HAL_GPIO_Init+0x2a8>)
8005c74: 4293 cmp r3, r2
8005c76: d052 beq.n 8005d1e <HAL_GPIO_Init+0xfa>
8005c78: 4a94 ldr r2, [pc, #592] @ (8005ecc <HAL_GPIO_Init+0x2a8>)
8005c7a: 4293 cmp r3, r2
8005c7c: d869 bhi.n 8005d52 <HAL_GPIO_Init+0x12e>
8005c7e: 4a94 ldr r2, [pc, #592] @ (8005ed0 <HAL_GPIO_Init+0x2ac>)
8005c80: 4293 cmp r3, r2
8005c82: d04c beq.n 8005d1e <HAL_GPIO_Init+0xfa>
8005c84: 4a92 ldr r2, [pc, #584] @ (8005ed0 <HAL_GPIO_Init+0x2ac>)
8005c86: 4293 cmp r3, r2
8005c88: d863 bhi.n 8005d52 <HAL_GPIO_Init+0x12e>
8005c8a: 4a92 ldr r2, [pc, #584] @ (8005ed4 <HAL_GPIO_Init+0x2b0>)
8005c8c: 4293 cmp r3, r2
8005c8e: d046 beq.n 8005d1e <HAL_GPIO_Init+0xfa>
8005c90: 4a90 ldr r2, [pc, #576] @ (8005ed4 <HAL_GPIO_Init+0x2b0>)
8005c92: 4293 cmp r3, r2
8005c94: d85d bhi.n 8005d52 <HAL_GPIO_Init+0x12e>
8005c96: 2b12 cmp r3, #18
8005c98: d82a bhi.n 8005cf0 <HAL_GPIO_Init+0xcc>
8005c9a: 2b12 cmp r3, #18
8005c9c: d859 bhi.n 8005d52 <HAL_GPIO_Init+0x12e>
8005c9e: a201 add r2, pc, #4 @ (adr r2, 8005ca4 <HAL_GPIO_Init+0x80>)
8005ca0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8005ca4: 08005d1f .word 0x08005d1f
8005ca8: 08005cf9 .word 0x08005cf9
8005cac: 08005d0b .word 0x08005d0b
8005cb0: 08005d4d .word 0x08005d4d
8005cb4: 08005d53 .word 0x08005d53
8005cb8: 08005d53 .word 0x08005d53
8005cbc: 08005d53 .word 0x08005d53
8005cc0: 08005d53 .word 0x08005d53
8005cc4: 08005d53 .word 0x08005d53
8005cc8: 08005d53 .word 0x08005d53
8005ccc: 08005d53 .word 0x08005d53
8005cd0: 08005d53 .word 0x08005d53
8005cd4: 08005d53 .word 0x08005d53
8005cd8: 08005d53 .word 0x08005d53
8005cdc: 08005d53 .word 0x08005d53
8005ce0: 08005d53 .word 0x08005d53
8005ce4: 08005d53 .word 0x08005d53
8005ce8: 08005d01 .word 0x08005d01
8005cec: 08005d15 .word 0x08005d15
8005cf0: 4a79 ldr r2, [pc, #484] @ (8005ed8 <HAL_GPIO_Init+0x2b4>)
8005cf2: 4293 cmp r3, r2
8005cf4: d013 beq.n 8005d1e <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8005cf6: e02c b.n 8005d52 <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8005cf8: 683b ldr r3, [r7, #0]
8005cfa: 68db ldr r3, [r3, #12]
8005cfc: 623b str r3, [r7, #32]
break;
8005cfe: e029 b.n 8005d54 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
8005d00: 683b ldr r3, [r7, #0]
8005d02: 68db ldr r3, [r3, #12]
8005d04: 3304 adds r3, #4
8005d06: 623b str r3, [r7, #32]
break;
8005d08: e024 b.n 8005d54 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
8005d0a: 683b ldr r3, [r7, #0]
8005d0c: 68db ldr r3, [r3, #12]
8005d0e: 3308 adds r3, #8
8005d10: 623b str r3, [r7, #32]
break;
8005d12: e01f b.n 8005d54 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8005d14: 683b ldr r3, [r7, #0]
8005d16: 68db ldr r3, [r3, #12]
8005d18: 330c adds r3, #12
8005d1a: 623b str r3, [r7, #32]
break;
8005d1c: e01a b.n 8005d54 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
8005d1e: 683b ldr r3, [r7, #0]
8005d20: 689b ldr r3, [r3, #8]
8005d22: 2b00 cmp r3, #0
8005d24: d102 bne.n 8005d2c <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8005d26: 2304 movs r3, #4
8005d28: 623b str r3, [r7, #32]
break;
8005d2a: e013 b.n 8005d54 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8005d2c: 683b ldr r3, [r7, #0]
8005d2e: 689b ldr r3, [r3, #8]
8005d30: 2b01 cmp r3, #1
8005d32: d105 bne.n 8005d40 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8005d34: 2308 movs r3, #8
8005d36: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8005d38: 687b ldr r3, [r7, #4]
8005d3a: 69fa ldr r2, [r7, #28]
8005d3c: 611a str r2, [r3, #16]
break;
8005d3e: e009 b.n 8005d54 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8005d40: 2308 movs r3, #8
8005d42: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
8005d44: 687b ldr r3, [r7, #4]
8005d46: 69fa ldr r2, [r7, #28]
8005d48: 615a str r2, [r3, #20]
break;
8005d4a: e003 b.n 8005d54 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8005d4c: 2300 movs r3, #0
8005d4e: 623b str r3, [r7, #32]
break;
8005d50: e000 b.n 8005d54 <HAL_GPIO_Init+0x130>
break;
8005d52: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8005d54: 69bb ldr r3, [r7, #24]
8005d56: 2bff cmp r3, #255 @ 0xff
8005d58: d801 bhi.n 8005d5e <HAL_GPIO_Init+0x13a>
8005d5a: 687b ldr r3, [r7, #4]
8005d5c: e001 b.n 8005d62 <HAL_GPIO_Init+0x13e>
8005d5e: 687b ldr r3, [r7, #4]
8005d60: 3304 adds r3, #4
8005d62: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8005d64: 69bb ldr r3, [r7, #24]
8005d66: 2bff cmp r3, #255 @ 0xff
8005d68: d802 bhi.n 8005d70 <HAL_GPIO_Init+0x14c>
8005d6a: 6a7b ldr r3, [r7, #36] @ 0x24
8005d6c: 009b lsls r3, r3, #2
8005d6e: e002 b.n 8005d76 <HAL_GPIO_Init+0x152>
8005d70: 6a7b ldr r3, [r7, #36] @ 0x24
8005d72: 3b08 subs r3, #8
8005d74: 009b lsls r3, r3, #2
8005d76: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8005d78: 697b ldr r3, [r7, #20]
8005d7a: 681a ldr r2, [r3, #0]
8005d7c: 210f movs r1, #15
8005d7e: 693b ldr r3, [r7, #16]
8005d80: fa01 f303 lsl.w r3, r1, r3
8005d84: 43db mvns r3, r3
8005d86: 401a ands r2, r3
8005d88: 6a39 ldr r1, [r7, #32]
8005d8a: 693b ldr r3, [r7, #16]
8005d8c: fa01 f303 lsl.w r3, r1, r3
8005d90: 431a orrs r2, r3
8005d92: 697b ldr r3, [r7, #20]
8005d94: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
8005d96: 683b ldr r3, [r7, #0]
8005d98: 685b ldr r3, [r3, #4]
8005d9a: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8005d9e: 2b00 cmp r3, #0
8005da0: f000 80b1 beq.w 8005f06 <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
8005da4: 4b4d ldr r3, [pc, #308] @ (8005edc <HAL_GPIO_Init+0x2b8>)
8005da6: 699b ldr r3, [r3, #24]
8005da8: 4a4c ldr r2, [pc, #304] @ (8005edc <HAL_GPIO_Init+0x2b8>)
8005daa: f043 0301 orr.w r3, r3, #1
8005dae: 6193 str r3, [r2, #24]
8005db0: 4b4a ldr r3, [pc, #296] @ (8005edc <HAL_GPIO_Init+0x2b8>)
8005db2: 699b ldr r3, [r3, #24]
8005db4: f003 0301 and.w r3, r3, #1
8005db8: 60bb str r3, [r7, #8]
8005dba: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8005dbc: 4a48 ldr r2, [pc, #288] @ (8005ee0 <HAL_GPIO_Init+0x2bc>)
8005dbe: 6a7b ldr r3, [r7, #36] @ 0x24
8005dc0: 089b lsrs r3, r3, #2
8005dc2: 3302 adds r3, #2
8005dc4: f852 3023 ldr.w r3, [r2, r3, lsl #2]
8005dc8: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
8005dca: 6a7b ldr r3, [r7, #36] @ 0x24
8005dcc: f003 0303 and.w r3, r3, #3
8005dd0: 009b lsls r3, r3, #2
8005dd2: 220f movs r2, #15
8005dd4: fa02 f303 lsl.w r3, r2, r3
8005dd8: 43db mvns r3, r3
8005dda: 68fa ldr r2, [r7, #12]
8005ddc: 4013 ands r3, r2
8005dde: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
8005de0: 687b ldr r3, [r7, #4]
8005de2: 4a40 ldr r2, [pc, #256] @ (8005ee4 <HAL_GPIO_Init+0x2c0>)
8005de4: 4293 cmp r3, r2
8005de6: d013 beq.n 8005e10 <HAL_GPIO_Init+0x1ec>
8005de8: 687b ldr r3, [r7, #4]
8005dea: 4a3f ldr r2, [pc, #252] @ (8005ee8 <HAL_GPIO_Init+0x2c4>)
8005dec: 4293 cmp r3, r2
8005dee: d00d beq.n 8005e0c <HAL_GPIO_Init+0x1e8>
8005df0: 687b ldr r3, [r7, #4]
8005df2: 4a3e ldr r2, [pc, #248] @ (8005eec <HAL_GPIO_Init+0x2c8>)
8005df4: 4293 cmp r3, r2
8005df6: d007 beq.n 8005e08 <HAL_GPIO_Init+0x1e4>
8005df8: 687b ldr r3, [r7, #4]
8005dfa: 4a3d ldr r2, [pc, #244] @ (8005ef0 <HAL_GPIO_Init+0x2cc>)
8005dfc: 4293 cmp r3, r2
8005dfe: d101 bne.n 8005e04 <HAL_GPIO_Init+0x1e0>
8005e00: 2303 movs r3, #3
8005e02: e006 b.n 8005e12 <HAL_GPIO_Init+0x1ee>
8005e04: 2304 movs r3, #4
8005e06: e004 b.n 8005e12 <HAL_GPIO_Init+0x1ee>
8005e08: 2302 movs r3, #2
8005e0a: e002 b.n 8005e12 <HAL_GPIO_Init+0x1ee>
8005e0c: 2301 movs r3, #1
8005e0e: e000 b.n 8005e12 <HAL_GPIO_Init+0x1ee>
8005e10: 2300 movs r3, #0
8005e12: 6a7a ldr r2, [r7, #36] @ 0x24
8005e14: f002 0203 and.w r2, r2, #3
8005e18: 0092 lsls r2, r2, #2
8005e1a: 4093 lsls r3, r2
8005e1c: 68fa ldr r2, [r7, #12]
8005e1e: 4313 orrs r3, r2
8005e20: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
8005e22: 492f ldr r1, [pc, #188] @ (8005ee0 <HAL_GPIO_Init+0x2bc>)
8005e24: 6a7b ldr r3, [r7, #36] @ 0x24
8005e26: 089b lsrs r3, r3, #2
8005e28: 3302 adds r3, #2
8005e2a: 68fa ldr r2, [r7, #12]
8005e2c: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8005e30: 683b ldr r3, [r7, #0]
8005e32: 685b ldr r3, [r3, #4]
8005e34: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8005e38: 2b00 cmp r3, #0
8005e3a: d006 beq.n 8005e4a <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
8005e3c: 4b2d ldr r3, [pc, #180] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e3e: 689a ldr r2, [r3, #8]
8005e40: 492c ldr r1, [pc, #176] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e42: 69bb ldr r3, [r7, #24]
8005e44: 4313 orrs r3, r2
8005e46: 608b str r3, [r1, #8]
8005e48: e006 b.n 8005e58 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
8005e4a: 4b2a ldr r3, [pc, #168] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e4c: 689a ldr r2, [r3, #8]
8005e4e: 69bb ldr r3, [r7, #24]
8005e50: 43db mvns r3, r3
8005e52: 4928 ldr r1, [pc, #160] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e54: 4013 ands r3, r2
8005e56: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8005e58: 683b ldr r3, [r7, #0]
8005e5a: 685b ldr r3, [r3, #4]
8005e5c: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8005e60: 2b00 cmp r3, #0
8005e62: d006 beq.n 8005e72 <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
8005e64: 4b23 ldr r3, [pc, #140] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e66: 68da ldr r2, [r3, #12]
8005e68: 4922 ldr r1, [pc, #136] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e6a: 69bb ldr r3, [r7, #24]
8005e6c: 4313 orrs r3, r2
8005e6e: 60cb str r3, [r1, #12]
8005e70: e006 b.n 8005e80 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
8005e72: 4b20 ldr r3, [pc, #128] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e74: 68da ldr r2, [r3, #12]
8005e76: 69bb ldr r3, [r7, #24]
8005e78: 43db mvns r3, r3
8005e7a: 491e ldr r1, [pc, #120] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e7c: 4013 ands r3, r2
8005e7e: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8005e80: 683b ldr r3, [r7, #0]
8005e82: 685b ldr r3, [r3, #4]
8005e84: f403 3300 and.w r3, r3, #131072 @ 0x20000
8005e88: 2b00 cmp r3, #0
8005e8a: d006 beq.n 8005e9a <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
8005e8c: 4b19 ldr r3, [pc, #100] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e8e: 685a ldr r2, [r3, #4]
8005e90: 4918 ldr r1, [pc, #96] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e92: 69bb ldr r3, [r7, #24]
8005e94: 4313 orrs r3, r2
8005e96: 604b str r3, [r1, #4]
8005e98: e006 b.n 8005ea8 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
8005e9a: 4b16 ldr r3, [pc, #88] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005e9c: 685a ldr r2, [r3, #4]
8005e9e: 69bb ldr r3, [r7, #24]
8005ea0: 43db mvns r3, r3
8005ea2: 4914 ldr r1, [pc, #80] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005ea4: 4013 ands r3, r2
8005ea6: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8005ea8: 683b ldr r3, [r7, #0]
8005eaa: 685b ldr r3, [r3, #4]
8005eac: f403 3380 and.w r3, r3, #65536 @ 0x10000
8005eb0: 2b00 cmp r3, #0
8005eb2: d021 beq.n 8005ef8 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
8005eb4: 4b0f ldr r3, [pc, #60] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005eb6: 681a ldr r2, [r3, #0]
8005eb8: 490e ldr r1, [pc, #56] @ (8005ef4 <HAL_GPIO_Init+0x2d0>)
8005eba: 69bb ldr r3, [r7, #24]
8005ebc: 4313 orrs r3, r2
8005ebe: 600b str r3, [r1, #0]
8005ec0: e021 b.n 8005f06 <HAL_GPIO_Init+0x2e2>
8005ec2: bf00 nop
8005ec4: 10320000 .word 0x10320000
8005ec8: 10310000 .word 0x10310000
8005ecc: 10220000 .word 0x10220000
8005ed0: 10210000 .word 0x10210000
8005ed4: 10120000 .word 0x10120000
8005ed8: 10110000 .word 0x10110000
8005edc: 40021000 .word 0x40021000
8005ee0: 40010000 .word 0x40010000
8005ee4: 40010800 .word 0x40010800
8005ee8: 40010c00 .word 0x40010c00
8005eec: 40011000 .word 0x40011000
8005ef0: 40011400 .word 0x40011400
8005ef4: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8005ef8: 4b0b ldr r3, [pc, #44] @ (8005f28 <HAL_GPIO_Init+0x304>)
8005efa: 681a ldr r2, [r3, #0]
8005efc: 69bb ldr r3, [r7, #24]
8005efe: 43db mvns r3, r3
8005f00: 4909 ldr r1, [pc, #36] @ (8005f28 <HAL_GPIO_Init+0x304>)
8005f02: 4013 ands r3, r2
8005f04: 600b str r3, [r1, #0]
}
}
}
position++;
8005f06: 6a7b ldr r3, [r7, #36] @ 0x24
8005f08: 3301 adds r3, #1
8005f0a: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
8005f0c: 683b ldr r3, [r7, #0]
8005f0e: 681a ldr r2, [r3, #0]
8005f10: 6a7b ldr r3, [r7, #36] @ 0x24
8005f12: fa22 f303 lsr.w r3, r2, r3
8005f16: 2b00 cmp r3, #0
8005f18: f47f ae8e bne.w 8005c38 <HAL_GPIO_Init+0x14>
}
}
8005f1c: bf00 nop
8005f1e: bf00 nop
8005f20: 372c adds r7, #44 @ 0x2c
8005f22: 46bd mov sp, r7
8005f24: bc80 pop {r7}
8005f26: 4770 bx lr
8005f28: 40010400 .word 0x40010400
08005f2c <HAL_GPIO_ReadPin>:
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8005f2c: b480 push {r7}
8005f2e: b085 sub sp, #20
8005f30: af00 add r7, sp, #0
8005f32: 6078 str r0, [r7, #4]
8005f34: 460b mov r3, r1
8005f36: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8005f38: 687b ldr r3, [r7, #4]
8005f3a: 689a ldr r2, [r3, #8]
8005f3c: 887b ldrh r3, [r7, #2]
8005f3e: 4013 ands r3, r2
8005f40: 2b00 cmp r3, #0
8005f42: d002 beq.n 8005f4a <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
8005f44: 2301 movs r3, #1
8005f46: 73fb strb r3, [r7, #15]
8005f48: e001 b.n 8005f4e <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
8005f4a: 2300 movs r3, #0
8005f4c: 73fb strb r3, [r7, #15]
}
return bitstatus;
8005f4e: 7bfb ldrb r3, [r7, #15]
}
8005f50: 4618 mov r0, r3
8005f52: 3714 adds r7, #20
8005f54: 46bd mov sp, r7
8005f56: bc80 pop {r7}
8005f58: 4770 bx lr
08005f5a <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8005f5a: b480 push {r7}
8005f5c: b083 sub sp, #12
8005f5e: af00 add r7, sp, #0
8005f60: 6078 str r0, [r7, #4]
8005f62: 460b mov r3, r1
8005f64: 807b strh r3, [r7, #2]
8005f66: 4613 mov r3, r2
8005f68: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8005f6a: 787b ldrb r3, [r7, #1]
8005f6c: 2b00 cmp r3, #0
8005f6e: d003 beq.n 8005f78 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8005f70: 887a ldrh r2, [r7, #2]
8005f72: 687b ldr r3, [r7, #4]
8005f74: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
8005f76: e003 b.n 8005f80 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
8005f78: 887b ldrh r3, [r7, #2]
8005f7a: 041a lsls r2, r3, #16
8005f7c: 687b ldr r3, [r7, #4]
8005f7e: 611a str r2, [r3, #16]
}
8005f80: bf00 nop
8005f82: 370c adds r7, #12
8005f84: 46bd mov sp, r7
8005f86: bc80 pop {r7}
8005f88: 4770 bx lr
08005f8a <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8005f8a: b580 push {r7, lr}
8005f8c: b084 sub sp, #16
8005f8e: af00 add r7, sp, #0
8005f90: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8005f92: 687b ldr r3, [r7, #4]
8005f94: 2b00 cmp r3, #0
8005f96: d101 bne.n 8005f9c <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8005f98: 2301 movs r3, #1
8005f9a: e0e8 b.n 800616e <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8005f9c: 687b ldr r3, [r7, #4]
8005f9e: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
8005fa2: b2db uxtb r3, r3
8005fa4: 2b00 cmp r3, #0
8005fa6: d106 bne.n 8005fb6 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8005fa8: 687b ldr r3, [r7, #4]
8005faa: 2200 movs r2, #0
8005fac: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8005fb0: 6878 ldr r0, [r7, #4]
8005fb2: f007 fc17 bl 800d7e4 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8005fb6: 687b ldr r3, [r7, #4]
8005fb8: 2203 movs r2, #3
8005fba: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8005fbe: 687b ldr r3, [r7, #4]
8005fc0: 2200 movs r2, #0
8005fc2: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8005fc4: 687b ldr r3, [r7, #4]
8005fc6: 681b ldr r3, [r3, #0]
8005fc8: 4618 mov r0, r3
8005fca: f003 fabc bl 8009546 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8005fce: 687b ldr r3, [r7, #4]
8005fd0: 6818 ldr r0, [r3, #0]
8005fd2: 687b ldr r3, [r7, #4]
8005fd4: 3304 adds r3, #4
8005fd6: cb0e ldmia r3, {r1, r2, r3}
8005fd8: f003 fa92 bl 8009500 <USB_CoreInit>
8005fdc: 4603 mov r3, r0
8005fde: 2b00 cmp r3, #0
8005fe0: d005 beq.n 8005fee <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8005fe2: 687b ldr r3, [r7, #4]
8005fe4: 2202 movs r2, #2
8005fe6: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8005fea: 2301 movs r3, #1
8005fec: e0bf b.n 800616e <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
8005fee: 687b ldr r3, [r7, #4]
8005ff0: 681b ldr r3, [r3, #0]
8005ff2: 2100 movs r1, #0
8005ff4: 4618 mov r0, r3
8005ff6: f003 fac0 bl 800957a <USB_SetCurrentMode>
8005ffa: 4603 mov r3, r0
8005ffc: 2b00 cmp r3, #0
8005ffe: d005 beq.n 800600c <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8006000: 687b ldr r3, [r7, #4]
8006002: 2202 movs r2, #2
8006004: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006008: 2301 movs r3, #1
800600a: e0b0 b.n 800616e <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800600c: 2300 movs r3, #0
800600e: 73fb strb r3, [r7, #15]
8006010: e03e b.n 8006090 <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
8006012: 7bfa ldrb r2, [r7, #15]
8006014: 6879 ldr r1, [r7, #4]
8006016: 4613 mov r3, r2
8006018: 009b lsls r3, r3, #2
800601a: 4413 add r3, r2
800601c: 00db lsls r3, r3, #3
800601e: 440b add r3, r1
8006020: 3311 adds r3, #17
8006022: 2201 movs r2, #1
8006024: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8006026: 7bfa ldrb r2, [r7, #15]
8006028: 6879 ldr r1, [r7, #4]
800602a: 4613 mov r3, r2
800602c: 009b lsls r3, r3, #2
800602e: 4413 add r3, r2
8006030: 00db lsls r3, r3, #3
8006032: 440b add r3, r1
8006034: 3310 adds r3, #16
8006036: 7bfa ldrb r2, [r7, #15]
8006038: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
800603a: 7bfa ldrb r2, [r7, #15]
800603c: 6879 ldr r1, [r7, #4]
800603e: 4613 mov r3, r2
8006040: 009b lsls r3, r3, #2
8006042: 4413 add r3, r2
8006044: 00db lsls r3, r3, #3
8006046: 440b add r3, r1
8006048: 3313 adds r3, #19
800604a: 2200 movs r2, #0
800604c: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
800604e: 7bfa ldrb r2, [r7, #15]
8006050: 6879 ldr r1, [r7, #4]
8006052: 4613 mov r3, r2
8006054: 009b lsls r3, r3, #2
8006056: 4413 add r3, r2
8006058: 00db lsls r3, r3, #3
800605a: 440b add r3, r1
800605c: 3320 adds r3, #32
800605e: 2200 movs r2, #0
8006060: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8006062: 7bfa ldrb r2, [r7, #15]
8006064: 6879 ldr r1, [r7, #4]
8006066: 4613 mov r3, r2
8006068: 009b lsls r3, r3, #2
800606a: 4413 add r3, r2
800606c: 00db lsls r3, r3, #3
800606e: 440b add r3, r1
8006070: 3324 adds r3, #36 @ 0x24
8006072: 2200 movs r2, #0
8006074: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8006076: 7bfb ldrb r3, [r7, #15]
8006078: 6879 ldr r1, [r7, #4]
800607a: 1c5a adds r2, r3, #1
800607c: 4613 mov r3, r2
800607e: 009b lsls r3, r3, #2
8006080: 4413 add r3, r2
8006082: 00db lsls r3, r3, #3
8006084: 440b add r3, r1
8006086: 2200 movs r2, #0
8006088: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800608a: 7bfb ldrb r3, [r7, #15]
800608c: 3301 adds r3, #1
800608e: 73fb strb r3, [r7, #15]
8006090: 687b ldr r3, [r7, #4]
8006092: 791b ldrb r3, [r3, #4]
8006094: 7bfa ldrb r2, [r7, #15]
8006096: 429a cmp r2, r3
8006098: d3bb bcc.n 8006012 <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
800609a: 2300 movs r3, #0
800609c: 73fb strb r3, [r7, #15]
800609e: e044 b.n 800612a <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
80060a0: 7bfa ldrb r2, [r7, #15]
80060a2: 6879 ldr r1, [r7, #4]
80060a4: 4613 mov r3, r2
80060a6: 009b lsls r3, r3, #2
80060a8: 4413 add r3, r2
80060aa: 00db lsls r3, r3, #3
80060ac: 440b add r3, r1
80060ae: f203 1351 addw r3, r3, #337 @ 0x151
80060b2: 2200 movs r2, #0
80060b4: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
80060b6: 7bfa ldrb r2, [r7, #15]
80060b8: 6879 ldr r1, [r7, #4]
80060ba: 4613 mov r3, r2
80060bc: 009b lsls r3, r3, #2
80060be: 4413 add r3, r2
80060c0: 00db lsls r3, r3, #3
80060c2: 440b add r3, r1
80060c4: f503 73a8 add.w r3, r3, #336 @ 0x150
80060c8: 7bfa ldrb r2, [r7, #15]
80060ca: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
80060cc: 7bfa ldrb r2, [r7, #15]
80060ce: 6879 ldr r1, [r7, #4]
80060d0: 4613 mov r3, r2
80060d2: 009b lsls r3, r3, #2
80060d4: 4413 add r3, r2
80060d6: 00db lsls r3, r3, #3
80060d8: 440b add r3, r1
80060da: f203 1353 addw r3, r3, #339 @ 0x153
80060de: 2200 movs r2, #0
80060e0: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
80060e2: 7bfa ldrb r2, [r7, #15]
80060e4: 6879 ldr r1, [r7, #4]
80060e6: 4613 mov r3, r2
80060e8: 009b lsls r3, r3, #2
80060ea: 4413 add r3, r2
80060ec: 00db lsls r3, r3, #3
80060ee: 440b add r3, r1
80060f0: f503 73b0 add.w r3, r3, #352 @ 0x160
80060f4: 2200 movs r2, #0
80060f6: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
80060f8: 7bfa ldrb r2, [r7, #15]
80060fa: 6879 ldr r1, [r7, #4]
80060fc: 4613 mov r3, r2
80060fe: 009b lsls r3, r3, #2
8006100: 4413 add r3, r2
8006102: 00db lsls r3, r3, #3
8006104: 440b add r3, r1
8006106: f503 73b2 add.w r3, r3, #356 @ 0x164
800610a: 2200 movs r2, #0
800610c: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
800610e: 7bfa ldrb r2, [r7, #15]
8006110: 6879 ldr r1, [r7, #4]
8006112: 4613 mov r3, r2
8006114: 009b lsls r3, r3, #2
8006116: 4413 add r3, r2
8006118: 00db lsls r3, r3, #3
800611a: 440b add r3, r1
800611c: f503 73b4 add.w r3, r3, #360 @ 0x168
8006120: 2200 movs r2, #0
8006122: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006124: 7bfb ldrb r3, [r7, #15]
8006126: 3301 adds r3, #1
8006128: 73fb strb r3, [r7, #15]
800612a: 687b ldr r3, [r7, #4]
800612c: 791b ldrb r3, [r3, #4]
800612e: 7bfa ldrb r2, [r7, #15]
8006130: 429a cmp r2, r3
8006132: d3b5 bcc.n 80060a0 <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8006134: 687b ldr r3, [r7, #4]
8006136: 6818 ldr r0, [r3, #0]
8006138: 687b ldr r3, [r7, #4]
800613a: 3304 adds r3, #4
800613c: cb0e ldmia r3, {r1, r2, r3}
800613e: f003 fa28 bl 8009592 <USB_DevInit>
8006142: 4603 mov r3, r0
8006144: 2b00 cmp r3, #0
8006146: d005 beq.n 8006154 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8006148: 687b ldr r3, [r7, #4]
800614a: 2202 movs r2, #2
800614c: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006150: 2301 movs r3, #1
8006152: e00c b.n 800616e <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
8006154: 687b ldr r3, [r7, #4]
8006156: 2200 movs r2, #0
8006158: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
800615a: 687b ldr r3, [r7, #4]
800615c: 2201 movs r2, #1
800615e: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
8006162: 687b ldr r3, [r7, #4]
8006164: 681b ldr r3, [r3, #0]
8006166: 4618 mov r0, r3
8006168: f005 fca7 bl 800baba <USB_DevDisconnect>
return HAL_OK;
800616c: 2300 movs r3, #0
}
800616e: 4618 mov r0, r3
8006170: 3710 adds r7, #16
8006172: 46bd mov sp, r7
8006174: bd80 pop {r7, pc}
08006176 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8006176: b580 push {r7, lr}
8006178: b082 sub sp, #8
800617a: af00 add r7, sp, #0
800617c: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
800617e: 687b ldr r3, [r7, #4]
8006180: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006184: 2b01 cmp r3, #1
8006186: d101 bne.n 800618c <HAL_PCD_Start+0x16>
8006188: 2302 movs r3, #2
800618a: e016 b.n 80061ba <HAL_PCD_Start+0x44>
800618c: 687b ldr r3, [r7, #4]
800618e: 2201 movs r2, #1
8006190: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
8006194: 687b ldr r3, [r7, #4]
8006196: 681b ldr r3, [r3, #0]
8006198: 4618 mov r0, r3
800619a: f003 f9be bl 800951a <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
800619e: 2101 movs r1, #1
80061a0: 6878 ldr r0, [r7, #4]
80061a2: f007 fd92 bl 800dcca <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
80061a6: 687b ldr r3, [r7, #4]
80061a8: 681b ldr r3, [r3, #0]
80061aa: 4618 mov r0, r3
80061ac: f005 fc7b bl 800baa6 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
80061b0: 687b ldr r3, [r7, #4]
80061b2: 2200 movs r2, #0
80061b4: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80061b8: 2300 movs r3, #0
}
80061ba: 4618 mov r0, r3
80061bc: 3708 adds r7, #8
80061be: 46bd mov sp, r7
80061c0: bd80 pop {r7, pc}
080061c2 <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
80061c2: b580 push {r7, lr}
80061c4: b088 sub sp, #32
80061c6: af00 add r7, sp, #0
80061c8: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
80061ca: 687b ldr r3, [r7, #4]
80061cc: 681b ldr r3, [r3, #0]
80061ce: 4618 mov r0, r3
80061d0: f005 fc7d bl 800bace <USB_ReadInterrupts>
80061d4: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
80061d6: 69bb ldr r3, [r7, #24]
80061d8: f403 4300 and.w r3, r3, #32768 @ 0x8000
80061dc: 2b00 cmp r3, #0
80061de: d003 beq.n 80061e8 <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
80061e0: 6878 ldr r0, [r7, #4]
80061e2: f000 fb1a bl 800681a <PCD_EP_ISR_Handler>
return;
80061e6: e119 b.n 800641c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
80061e8: 69bb ldr r3, [r7, #24]
80061ea: f403 6380 and.w r3, r3, #1024 @ 0x400
80061ee: 2b00 cmp r3, #0
80061f0: d013 beq.n 800621a <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
80061f2: 687b ldr r3, [r7, #4]
80061f4: 681b ldr r3, [r3, #0]
80061f6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80061fa: b29a uxth r2, r3
80061fc: 687b ldr r3, [r7, #4]
80061fe: 681b ldr r3, [r3, #0]
8006200: f422 6280 bic.w r2, r2, #1024 @ 0x400
8006204: b292 uxth r2, r2
8006206: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
800620a: 6878 ldr r0, [r7, #4]
800620c: f007 fb65 bl 800d8da <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
8006210: 2100 movs r1, #0
8006212: 6878 ldr r0, [r7, #4]
8006214: f000 f905 bl 8006422 <HAL_PCD_SetAddress>
return;
8006218: e100 b.n 800641c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
800621a: 69bb ldr r3, [r7, #24]
800621c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006220: 2b00 cmp r3, #0
8006222: d00c beq.n 800623e <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8006224: 687b ldr r3, [r7, #4]
8006226: 681b ldr r3, [r3, #0]
8006228: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800622c: b29a uxth r2, r3
800622e: 687b ldr r3, [r7, #4]
8006230: 681b ldr r3, [r3, #0]
8006232: f422 4280 bic.w r2, r2, #16384 @ 0x4000
8006236: b292 uxth r2, r2
8006238: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
800623c: e0ee b.n 800641c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
800623e: 69bb ldr r3, [r7, #24]
8006240: f403 5300 and.w r3, r3, #8192 @ 0x2000
8006244: 2b00 cmp r3, #0
8006246: d00c beq.n 8006262 <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8006248: 687b ldr r3, [r7, #4]
800624a: 681b ldr r3, [r3, #0]
800624c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006250: b29a uxth r2, r3
8006252: 687b ldr r3, [r7, #4]
8006254: 681b ldr r3, [r3, #0]
8006256: f422 5200 bic.w r2, r2, #8192 @ 0x2000
800625a: b292 uxth r2, r2
800625c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006260: e0dc b.n 800641c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
8006262: 69bb ldr r3, [r7, #24]
8006264: f403 5380 and.w r3, r3, #4096 @ 0x1000
8006268: 2b00 cmp r3, #0
800626a: d027 beq.n 80062bc <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
800626c: 687b ldr r3, [r7, #4]
800626e: 681b ldr r3, [r3, #0]
8006270: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006274: b29a uxth r2, r3
8006276: 687b ldr r3, [r7, #4]
8006278: 681b ldr r3, [r3, #0]
800627a: f022 0204 bic.w r2, r2, #4
800627e: b292 uxth r2, r2
8006280: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8006284: 687b ldr r3, [r7, #4]
8006286: 681b ldr r3, [r3, #0]
8006288: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800628c: b29a uxth r2, r3
800628e: 687b ldr r3, [r7, #4]
8006290: 681b ldr r3, [r3, #0]
8006292: f022 0208 bic.w r2, r2, #8
8006296: b292 uxth r2, r2
8006298: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
800629c: 6878 ldr r0, [r7, #4]
800629e: f007 fb55 bl 800d94c <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
80062a2: 687b ldr r3, [r7, #4]
80062a4: 681b ldr r3, [r3, #0]
80062a6: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80062aa: b29a uxth r2, r3
80062ac: 687b ldr r3, [r7, #4]
80062ae: 681b ldr r3, [r3, #0]
80062b0: f422 5280 bic.w r2, r2, #4096 @ 0x1000
80062b4: b292 uxth r2, r2
80062b6: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
80062ba: e0af b.n 800641c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
80062bc: 69bb ldr r3, [r7, #24]
80062be: f403 6300 and.w r3, r3, #2048 @ 0x800
80062c2: 2b00 cmp r3, #0
80062c4: f000 8083 beq.w 80063ce <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
80062c8: 2300 movs r3, #0
80062ca: 77fb strb r3, [r7, #31]
80062cc: e010 b.n 80062f0 <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
80062ce: 687b ldr r3, [r7, #4]
80062d0: 681b ldr r3, [r3, #0]
80062d2: 461a mov r2, r3
80062d4: 7ffb ldrb r3, [r7, #31]
80062d6: 009b lsls r3, r3, #2
80062d8: 441a add r2, r3
80062da: 7ffb ldrb r3, [r7, #31]
80062dc: 8812 ldrh r2, [r2, #0]
80062de: b292 uxth r2, r2
80062e0: 005b lsls r3, r3, #1
80062e2: 3320 adds r3, #32
80062e4: 443b add r3, r7
80062e6: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
80062ea: 7ffb ldrb r3, [r7, #31]
80062ec: 3301 adds r3, #1
80062ee: 77fb strb r3, [r7, #31]
80062f0: 7ffb ldrb r3, [r7, #31]
80062f2: 2b07 cmp r3, #7
80062f4: d9eb bls.n 80062ce <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
80062f6: 687b ldr r3, [r7, #4]
80062f8: 681b ldr r3, [r3, #0]
80062fa: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80062fe: b29a uxth r2, r3
8006300: 687b ldr r3, [r7, #4]
8006302: 681b ldr r3, [r3, #0]
8006304: f042 0201 orr.w r2, r2, #1
8006308: b292 uxth r2, r2
800630a: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
800630e: 687b ldr r3, [r7, #4]
8006310: 681b ldr r3, [r3, #0]
8006312: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006316: b29a uxth r2, r3
8006318: 687b ldr r3, [r7, #4]
800631a: 681b ldr r3, [r3, #0]
800631c: f022 0201 bic.w r2, r2, #1
8006320: b292 uxth r2, r2
8006322: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8006326: bf00 nop
8006328: 687b ldr r3, [r7, #4]
800632a: 681b ldr r3, [r3, #0]
800632c: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006330: b29b uxth r3, r3
8006332: f403 6380 and.w r3, r3, #1024 @ 0x400
8006336: 2b00 cmp r3, #0
8006338: d0f6 beq.n 8006328 <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
800633a: 687b ldr r3, [r7, #4]
800633c: 681b ldr r3, [r3, #0]
800633e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006342: b29a uxth r2, r3
8006344: 687b ldr r3, [r7, #4]
8006346: 681b ldr r3, [r3, #0]
8006348: f422 6280 bic.w r2, r2, #1024 @ 0x400
800634c: b292 uxth r2, r2
800634e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8006352: 2300 movs r3, #0
8006354: 77fb strb r3, [r7, #31]
8006356: e00f b.n 8006378 <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8006358: 7ffb ldrb r3, [r7, #31]
800635a: 687a ldr r2, [r7, #4]
800635c: 6812 ldr r2, [r2, #0]
800635e: 4611 mov r1, r2
8006360: 7ffa ldrb r2, [r7, #31]
8006362: 0092 lsls r2, r2, #2
8006364: 440a add r2, r1
8006366: 005b lsls r3, r3, #1
8006368: 3320 adds r3, #32
800636a: 443b add r3, r7
800636c: f833 3c18 ldrh.w r3, [r3, #-24]
8006370: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8006372: 7ffb ldrb r3, [r7, #31]
8006374: 3301 adds r3, #1
8006376: 77fb strb r3, [r7, #31]
8006378: 7ffb ldrb r3, [r7, #31]
800637a: 2b07 cmp r3, #7
800637c: d9ec bls.n 8006358 <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
800637e: 687b ldr r3, [r7, #4]
8006380: 681b ldr r3, [r3, #0]
8006382: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006386: b29a uxth r2, r3
8006388: 687b ldr r3, [r7, #4]
800638a: 681b ldr r3, [r3, #0]
800638c: f042 0208 orr.w r2, r2, #8
8006390: b292 uxth r2, r2
8006392: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8006396: 687b ldr r3, [r7, #4]
8006398: 681b ldr r3, [r3, #0]
800639a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800639e: b29a uxth r2, r3
80063a0: 687b ldr r3, [r7, #4]
80063a2: 681b ldr r3, [r3, #0]
80063a4: f422 6200 bic.w r2, r2, #2048 @ 0x800
80063a8: b292 uxth r2, r2
80063aa: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
80063ae: 687b ldr r3, [r7, #4]
80063b0: 681b ldr r3, [r3, #0]
80063b2: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80063b6: b29a uxth r2, r3
80063b8: 687b ldr r3, [r7, #4]
80063ba: 681b ldr r3, [r3, #0]
80063bc: f042 0204 orr.w r2, r2, #4
80063c0: b292 uxth r2, r2
80063c2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
80063c6: 6878 ldr r0, [r7, #4]
80063c8: f007 faa6 bl 800d918 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
80063cc: e026 b.n 800641c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
80063ce: 69bb ldr r3, [r7, #24]
80063d0: f403 7300 and.w r3, r3, #512 @ 0x200
80063d4: 2b00 cmp r3, #0
80063d6: d00f beq.n 80063f8 <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
80063d8: 687b ldr r3, [r7, #4]
80063da: 681b ldr r3, [r3, #0]
80063dc: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80063e0: b29a uxth r2, r3
80063e2: 687b ldr r3, [r7, #4]
80063e4: 681b ldr r3, [r3, #0]
80063e6: f422 7200 bic.w r2, r2, #512 @ 0x200
80063ea: b292 uxth r2, r2
80063ec: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
80063f0: 6878 ldr r0, [r7, #4]
80063f2: f007 fa64 bl 800d8be <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
80063f6: e011 b.n 800641c <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
80063f8: 69bb ldr r3, [r7, #24]
80063fa: f403 7380 and.w r3, r3, #256 @ 0x100
80063fe: 2b00 cmp r3, #0
8006400: d00c beq.n 800641c <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8006402: 687b ldr r3, [r7, #4]
8006404: 681b ldr r3, [r3, #0]
8006406: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800640a: b29a uxth r2, r3
800640c: 687b ldr r3, [r7, #4]
800640e: 681b ldr r3, [r3, #0]
8006410: f422 7280 bic.w r2, r2, #256 @ 0x100
8006414: b292 uxth r2, r2
8006416: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
800641a: bf00 nop
}
}
800641c: 3720 adds r7, #32
800641e: 46bd mov sp, r7
8006420: bd80 pop {r7, pc}
08006422 <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8006422: b580 push {r7, lr}
8006424: b082 sub sp, #8
8006426: af00 add r7, sp, #0
8006428: 6078 str r0, [r7, #4]
800642a: 460b mov r3, r1
800642c: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
800642e: 687b ldr r3, [r7, #4]
8006430: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006434: 2b01 cmp r3, #1
8006436: d101 bne.n 800643c <HAL_PCD_SetAddress+0x1a>
8006438: 2302 movs r3, #2
800643a: e012 b.n 8006462 <HAL_PCD_SetAddress+0x40>
800643c: 687b ldr r3, [r7, #4]
800643e: 2201 movs r2, #1
8006440: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8006444: 687b ldr r3, [r7, #4]
8006446: 78fa ldrb r2, [r7, #3]
8006448: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
800644a: 687b ldr r3, [r7, #4]
800644c: 681b ldr r3, [r3, #0]
800644e: 78fa ldrb r2, [r7, #3]
8006450: 4611 mov r1, r2
8006452: 4618 mov r0, r3
8006454: f005 fb14 bl 800ba80 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8006458: 687b ldr r3, [r7, #4]
800645a: 2200 movs r2, #0
800645c: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006460: 2300 movs r3, #0
}
8006462: 4618 mov r0, r3
8006464: 3708 adds r7, #8
8006466: 46bd mov sp, r7
8006468: bd80 pop {r7, pc}
0800646a <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
800646a: b580 push {r7, lr}
800646c: b084 sub sp, #16
800646e: af00 add r7, sp, #0
8006470: 6078 str r0, [r7, #4]
8006472: 4608 mov r0, r1
8006474: 4611 mov r1, r2
8006476: 461a mov r2, r3
8006478: 4603 mov r3, r0
800647a: 70fb strb r3, [r7, #3]
800647c: 460b mov r3, r1
800647e: 803b strh r3, [r7, #0]
8006480: 4613 mov r3, r2
8006482: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8006484: 2300 movs r3, #0
8006486: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006488: f997 3003 ldrsb.w r3, [r7, #3]
800648c: 2b00 cmp r3, #0
800648e: da0e bge.n 80064ae <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006490: 78fb ldrb r3, [r7, #3]
8006492: f003 0207 and.w r2, r3, #7
8006496: 4613 mov r3, r2
8006498: 009b lsls r3, r3, #2
800649a: 4413 add r3, r2
800649c: 00db lsls r3, r3, #3
800649e: 3310 adds r3, #16
80064a0: 687a ldr r2, [r7, #4]
80064a2: 4413 add r3, r2
80064a4: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80064a6: 68fb ldr r3, [r7, #12]
80064a8: 2201 movs r2, #1
80064aa: 705a strb r2, [r3, #1]
80064ac: e00e b.n 80064cc <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80064ae: 78fb ldrb r3, [r7, #3]
80064b0: f003 0207 and.w r2, r3, #7
80064b4: 4613 mov r3, r2
80064b6: 009b lsls r3, r3, #2
80064b8: 4413 add r3, r2
80064ba: 00db lsls r3, r3, #3
80064bc: f503 73a8 add.w r3, r3, #336 @ 0x150
80064c0: 687a ldr r2, [r7, #4]
80064c2: 4413 add r3, r2
80064c4: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80064c6: 68fb ldr r3, [r7, #12]
80064c8: 2200 movs r2, #0
80064ca: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
80064cc: 78fb ldrb r3, [r7, #3]
80064ce: f003 0307 and.w r3, r3, #7
80064d2: b2da uxtb r2, r3
80064d4: 68fb ldr r3, [r7, #12]
80064d6: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
80064d8: 883a ldrh r2, [r7, #0]
80064da: 68fb ldr r3, [r7, #12]
80064dc: 611a str r2, [r3, #16]
ep->type = ep_type;
80064de: 68fb ldr r3, [r7, #12]
80064e0: 78ba ldrb r2, [r7, #2]
80064e2: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
80064e4: 78bb ldrb r3, [r7, #2]
80064e6: 2b02 cmp r3, #2
80064e8: d102 bne.n 80064f0 <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
80064ea: 68fb ldr r3, [r7, #12]
80064ec: 2200 movs r2, #0
80064ee: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
80064f0: 687b ldr r3, [r7, #4]
80064f2: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80064f6: 2b01 cmp r3, #1
80064f8: d101 bne.n 80064fe <HAL_PCD_EP_Open+0x94>
80064fa: 2302 movs r3, #2
80064fc: e00e b.n 800651c <HAL_PCD_EP_Open+0xb2>
80064fe: 687b ldr r3, [r7, #4]
8006500: 2201 movs r2, #1
8006502: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8006506: 687b ldr r3, [r7, #4]
8006508: 681b ldr r3, [r3, #0]
800650a: 68f9 ldr r1, [r7, #12]
800650c: 4618 mov r0, r3
800650e: f003 f85d bl 80095cc <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8006512: 687b ldr r3, [r7, #4]
8006514: 2200 movs r2, #0
8006516: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
800651a: 7afb ldrb r3, [r7, #11]
}
800651c: 4618 mov r0, r3
800651e: 3710 adds r7, #16
8006520: 46bd mov sp, r7
8006522: bd80 pop {r7, pc}
08006524 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006524: b580 push {r7, lr}
8006526: b084 sub sp, #16
8006528: af00 add r7, sp, #0
800652a: 6078 str r0, [r7, #4]
800652c: 460b mov r3, r1
800652e: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006530: f997 3003 ldrsb.w r3, [r7, #3]
8006534: 2b00 cmp r3, #0
8006536: da0e bge.n 8006556 <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006538: 78fb ldrb r3, [r7, #3]
800653a: f003 0207 and.w r2, r3, #7
800653e: 4613 mov r3, r2
8006540: 009b lsls r3, r3, #2
8006542: 4413 add r3, r2
8006544: 00db lsls r3, r3, #3
8006546: 3310 adds r3, #16
8006548: 687a ldr r2, [r7, #4]
800654a: 4413 add r3, r2
800654c: 60fb str r3, [r7, #12]
ep->is_in = 1U;
800654e: 68fb ldr r3, [r7, #12]
8006550: 2201 movs r2, #1
8006552: 705a strb r2, [r3, #1]
8006554: e00e b.n 8006574 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006556: 78fb ldrb r3, [r7, #3]
8006558: f003 0207 and.w r2, r3, #7
800655c: 4613 mov r3, r2
800655e: 009b lsls r3, r3, #2
8006560: 4413 add r3, r2
8006562: 00db lsls r3, r3, #3
8006564: f503 73a8 add.w r3, r3, #336 @ 0x150
8006568: 687a ldr r2, [r7, #4]
800656a: 4413 add r3, r2
800656c: 60fb str r3, [r7, #12]
ep->is_in = 0U;
800656e: 68fb ldr r3, [r7, #12]
8006570: 2200 movs r2, #0
8006572: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006574: 78fb ldrb r3, [r7, #3]
8006576: f003 0307 and.w r3, r3, #7
800657a: b2da uxtb r2, r3
800657c: 68fb ldr r3, [r7, #12]
800657e: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006580: 687b ldr r3, [r7, #4]
8006582: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006586: 2b01 cmp r3, #1
8006588: d101 bne.n 800658e <HAL_PCD_EP_Close+0x6a>
800658a: 2302 movs r3, #2
800658c: e00e b.n 80065ac <HAL_PCD_EP_Close+0x88>
800658e: 687b ldr r3, [r7, #4]
8006590: 2201 movs r2, #1
8006592: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8006596: 687b ldr r3, [r7, #4]
8006598: 681b ldr r3, [r3, #0]
800659a: 68f9 ldr r1, [r7, #12]
800659c: 4618 mov r0, r3
800659e: f003 fbd5 bl 8009d4c <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
80065a2: 687b ldr r3, [r7, #4]
80065a4: 2200 movs r2, #0
80065a6: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80065aa: 2300 movs r3, #0
}
80065ac: 4618 mov r0, r3
80065ae: 3710 adds r7, #16
80065b0: 46bd mov sp, r7
80065b2: bd80 pop {r7, pc}
080065b4 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
80065b4: b580 push {r7, lr}
80065b6: b086 sub sp, #24
80065b8: af00 add r7, sp, #0
80065ba: 60f8 str r0, [r7, #12]
80065bc: 607a str r2, [r7, #4]
80065be: 603b str r3, [r7, #0]
80065c0: 460b mov r3, r1
80065c2: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80065c4: 7afb ldrb r3, [r7, #11]
80065c6: f003 0207 and.w r2, r3, #7
80065ca: 4613 mov r3, r2
80065cc: 009b lsls r3, r3, #2
80065ce: 4413 add r3, r2
80065d0: 00db lsls r3, r3, #3
80065d2: f503 73a8 add.w r3, r3, #336 @ 0x150
80065d6: 68fa ldr r2, [r7, #12]
80065d8: 4413 add r3, r2
80065da: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
80065dc: 697b ldr r3, [r7, #20]
80065de: 687a ldr r2, [r7, #4]
80065e0: 615a str r2, [r3, #20]
ep->xfer_len = len;
80065e2: 697b ldr r3, [r7, #20]
80065e4: 683a ldr r2, [r7, #0]
80065e6: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
80065e8: 697b ldr r3, [r7, #20]
80065ea: 2200 movs r2, #0
80065ec: 61da str r2, [r3, #28]
ep->is_in = 0U;
80065ee: 697b ldr r3, [r7, #20]
80065f0: 2200 movs r2, #0
80065f2: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
80065f4: 7afb ldrb r3, [r7, #11]
80065f6: f003 0307 and.w r3, r3, #7
80065fa: b2da uxtb r2, r3
80065fc: 697b ldr r3, [r7, #20]
80065fe: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006600: 68fb ldr r3, [r7, #12]
8006602: 681b ldr r3, [r3, #0]
8006604: 6979 ldr r1, [r7, #20]
8006606: 4618 mov r0, r3
8006608: f003 fd8c bl 800a124 <USB_EPStartXfer>
return HAL_OK;
800660c: 2300 movs r3, #0
}
800660e: 4618 mov r0, r3
8006610: 3718 adds r7, #24
8006612: 46bd mov sp, r7
8006614: bd80 pop {r7, pc}
08006616 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8006616: b480 push {r7}
8006618: b083 sub sp, #12
800661a: af00 add r7, sp, #0
800661c: 6078 str r0, [r7, #4]
800661e: 460b mov r3, r1
8006620: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8006622: 78fb ldrb r3, [r7, #3]
8006624: f003 0207 and.w r2, r3, #7
8006628: 6879 ldr r1, [r7, #4]
800662a: 4613 mov r3, r2
800662c: 009b lsls r3, r3, #2
800662e: 4413 add r3, r2
8006630: 00db lsls r3, r3, #3
8006632: 440b add r3, r1
8006634: f503 73b6 add.w r3, r3, #364 @ 0x16c
8006638: 681b ldr r3, [r3, #0]
}
800663a: 4618 mov r0, r3
800663c: 370c adds r7, #12
800663e: 46bd mov sp, r7
8006640: bc80 pop {r7}
8006642: 4770 bx lr
08006644 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006644: b580 push {r7, lr}
8006646: b086 sub sp, #24
8006648: af00 add r7, sp, #0
800664a: 60f8 str r0, [r7, #12]
800664c: 607a str r2, [r7, #4]
800664e: 603b str r3, [r7, #0]
8006650: 460b mov r3, r1
8006652: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006654: 7afb ldrb r3, [r7, #11]
8006656: f003 0207 and.w r2, r3, #7
800665a: 4613 mov r3, r2
800665c: 009b lsls r3, r3, #2
800665e: 4413 add r3, r2
8006660: 00db lsls r3, r3, #3
8006662: 3310 adds r3, #16
8006664: 68fa ldr r2, [r7, #12]
8006666: 4413 add r3, r2
8006668: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
800666a: 697b ldr r3, [r7, #20]
800666c: 687a ldr r2, [r7, #4]
800666e: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006670: 697b ldr r3, [r7, #20]
8006672: 683a ldr r2, [r7, #0]
8006674: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8006676: 697b ldr r3, [r7, #20]
8006678: 2201 movs r2, #1
800667a: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
800667e: 697b ldr r3, [r7, #20]
8006680: 683a ldr r2, [r7, #0]
8006682: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8006684: 697b ldr r3, [r7, #20]
8006686: 2200 movs r2, #0
8006688: 61da str r2, [r3, #28]
ep->is_in = 1U;
800668a: 697b ldr r3, [r7, #20]
800668c: 2201 movs r2, #1
800668e: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006690: 7afb ldrb r3, [r7, #11]
8006692: f003 0307 and.w r3, r3, #7
8006696: b2da uxtb r2, r3
8006698: 697b ldr r3, [r7, #20]
800669a: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
800669c: 68fb ldr r3, [r7, #12]
800669e: 681b ldr r3, [r3, #0]
80066a0: 6979 ldr r1, [r7, #20]
80066a2: 4618 mov r0, r3
80066a4: f003 fd3e bl 800a124 <USB_EPStartXfer>
return HAL_OK;
80066a8: 2300 movs r3, #0
}
80066aa: 4618 mov r0, r3
80066ac: 3718 adds r7, #24
80066ae: 46bd mov sp, r7
80066b0: bd80 pop {r7, pc}
080066b2 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80066b2: b580 push {r7, lr}
80066b4: b084 sub sp, #16
80066b6: af00 add r7, sp, #0
80066b8: 6078 str r0, [r7, #4]
80066ba: 460b mov r3, r1
80066bc: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
80066be: 78fb ldrb r3, [r7, #3]
80066c0: f003 0307 and.w r3, r3, #7
80066c4: 687a ldr r2, [r7, #4]
80066c6: 7912 ldrb r2, [r2, #4]
80066c8: 4293 cmp r3, r2
80066ca: d901 bls.n 80066d0 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
80066cc: 2301 movs r3, #1
80066ce: e04c b.n 800676a <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
80066d0: f997 3003 ldrsb.w r3, [r7, #3]
80066d4: 2b00 cmp r3, #0
80066d6: da0e bge.n 80066f6 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80066d8: 78fb ldrb r3, [r7, #3]
80066da: f003 0207 and.w r2, r3, #7
80066de: 4613 mov r3, r2
80066e0: 009b lsls r3, r3, #2
80066e2: 4413 add r3, r2
80066e4: 00db lsls r3, r3, #3
80066e6: 3310 adds r3, #16
80066e8: 687a ldr r2, [r7, #4]
80066ea: 4413 add r3, r2
80066ec: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80066ee: 68fb ldr r3, [r7, #12]
80066f0: 2201 movs r2, #1
80066f2: 705a strb r2, [r3, #1]
80066f4: e00c b.n 8006710 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
80066f6: 78fa ldrb r2, [r7, #3]
80066f8: 4613 mov r3, r2
80066fa: 009b lsls r3, r3, #2
80066fc: 4413 add r3, r2
80066fe: 00db lsls r3, r3, #3
8006700: f503 73a8 add.w r3, r3, #336 @ 0x150
8006704: 687a ldr r2, [r7, #4]
8006706: 4413 add r3, r2
8006708: 60fb str r3, [r7, #12]
ep->is_in = 0U;
800670a: 68fb ldr r3, [r7, #12]
800670c: 2200 movs r2, #0
800670e: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8006710: 68fb ldr r3, [r7, #12]
8006712: 2201 movs r2, #1
8006714: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006716: 78fb ldrb r3, [r7, #3]
8006718: f003 0307 and.w r3, r3, #7
800671c: b2da uxtb r2, r3
800671e: 68fb ldr r3, [r7, #12]
8006720: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006722: 687b ldr r3, [r7, #4]
8006724: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006728: 2b01 cmp r3, #1
800672a: d101 bne.n 8006730 <HAL_PCD_EP_SetStall+0x7e>
800672c: 2302 movs r3, #2
800672e: e01c b.n 800676a <HAL_PCD_EP_SetStall+0xb8>
8006730: 687b ldr r3, [r7, #4]
8006732: 2201 movs r2, #1
8006734: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8006738: 687b ldr r3, [r7, #4]
800673a: 681b ldr r3, [r3, #0]
800673c: 68f9 ldr r1, [r7, #12]
800673e: 4618 mov r0, r3
8006740: f005 f8a1 bl 800b886 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8006744: 78fb ldrb r3, [r7, #3]
8006746: f003 0307 and.w r3, r3, #7
800674a: 2b00 cmp r3, #0
800674c: d108 bne.n 8006760 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
800674e: 687b ldr r3, [r7, #4]
8006750: 681a ldr r2, [r3, #0]
8006752: 687b ldr r3, [r7, #4]
8006754: f503 7326 add.w r3, r3, #664 @ 0x298
8006758: 4619 mov r1, r3
800675a: 4610 mov r0, r2
800675c: f005 f9c6 bl 800baec <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8006760: 687b ldr r3, [r7, #4]
8006762: 2200 movs r2, #0
8006764: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006768: 2300 movs r3, #0
}
800676a: 4618 mov r0, r3
800676c: 3710 adds r7, #16
800676e: 46bd mov sp, r7
8006770: bd80 pop {r7, pc}
08006772 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006772: b580 push {r7, lr}
8006774: b084 sub sp, #16
8006776: af00 add r7, sp, #0
8006778: 6078 str r0, [r7, #4]
800677a: 460b mov r3, r1
800677c: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
800677e: 78fb ldrb r3, [r7, #3]
8006780: f003 030f and.w r3, r3, #15
8006784: 687a ldr r2, [r7, #4]
8006786: 7912 ldrb r2, [r2, #4]
8006788: 4293 cmp r3, r2
800678a: d901 bls.n 8006790 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
800678c: 2301 movs r3, #1
800678e: e040 b.n 8006812 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8006790: f997 3003 ldrsb.w r3, [r7, #3]
8006794: 2b00 cmp r3, #0
8006796: da0e bge.n 80067b6 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006798: 78fb ldrb r3, [r7, #3]
800679a: f003 0207 and.w r2, r3, #7
800679e: 4613 mov r3, r2
80067a0: 009b lsls r3, r3, #2
80067a2: 4413 add r3, r2
80067a4: 00db lsls r3, r3, #3
80067a6: 3310 adds r3, #16
80067a8: 687a ldr r2, [r7, #4]
80067aa: 4413 add r3, r2
80067ac: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80067ae: 68fb ldr r3, [r7, #12]
80067b0: 2201 movs r2, #1
80067b2: 705a strb r2, [r3, #1]
80067b4: e00e b.n 80067d4 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80067b6: 78fb ldrb r3, [r7, #3]
80067b8: f003 0207 and.w r2, r3, #7
80067bc: 4613 mov r3, r2
80067be: 009b lsls r3, r3, #2
80067c0: 4413 add r3, r2
80067c2: 00db lsls r3, r3, #3
80067c4: f503 73a8 add.w r3, r3, #336 @ 0x150
80067c8: 687a ldr r2, [r7, #4]
80067ca: 4413 add r3, r2
80067cc: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80067ce: 68fb ldr r3, [r7, #12]
80067d0: 2200 movs r2, #0
80067d2: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
80067d4: 68fb ldr r3, [r7, #12]
80067d6: 2200 movs r2, #0
80067d8: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
80067da: 78fb ldrb r3, [r7, #3]
80067dc: f003 0307 and.w r3, r3, #7
80067e0: b2da uxtb r2, r3
80067e2: 68fb ldr r3, [r7, #12]
80067e4: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80067e6: 687b ldr r3, [r7, #4]
80067e8: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80067ec: 2b01 cmp r3, #1
80067ee: d101 bne.n 80067f4 <HAL_PCD_EP_ClrStall+0x82>
80067f0: 2302 movs r3, #2
80067f2: e00e b.n 8006812 <HAL_PCD_EP_ClrStall+0xa0>
80067f4: 687b ldr r3, [r7, #4]
80067f6: 2201 movs r2, #1
80067f8: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
80067fc: 687b ldr r3, [r7, #4]
80067fe: 681b ldr r3, [r3, #0]
8006800: 68f9 ldr r1, [r7, #12]
8006802: 4618 mov r0, r3
8006804: f005 f88f bl 800b926 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8006808: 687b ldr r3, [r7, #4]
800680a: 2200 movs r2, #0
800680c: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006810: 2300 movs r3, #0
}
8006812: 4618 mov r0, r3
8006814: 3710 adds r7, #16
8006816: 46bd mov sp, r7
8006818: bd80 pop {r7, pc}
0800681a <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
800681a: b580 push {r7, lr}
800681c: b096 sub sp, #88 @ 0x58
800681e: af00 add r7, sp, #0
8006820: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8006822: e3bb b.n 8006f9c <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8006824: 687b ldr r3, [r7, #4]
8006826: 681b ldr r3, [r3, #0]
8006828: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800682c: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
8006830: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006834: b2db uxtb r3, r3
8006836: f003 030f and.w r3, r3, #15
800683a: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
800683e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006842: 2b00 cmp r3, #0
8006844: f040 8175 bne.w 8006b32 <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8006848: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800684c: f003 0310 and.w r3, r3, #16
8006850: 2b00 cmp r3, #0
8006852: d14e bne.n 80068f2 <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006854: 687b ldr r3, [r7, #4]
8006856: 681b ldr r3, [r3, #0]
8006858: 881b ldrh r3, [r3, #0]
800685a: b29b uxth r3, r3
800685c: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8006860: f023 0370 bic.w r3, r3, #112 @ 0x70
8006864: 81fb strh r3, [r7, #14]
8006866: 687b ldr r3, [r7, #4]
8006868: 681a ldr r2, [r3, #0]
800686a: 89fb ldrh r3, [r7, #14]
800686c: ea6f 4343 mvn.w r3, r3, lsl #17
8006870: ea6f 4353 mvn.w r3, r3, lsr #17
8006874: b29b uxth r3, r3
8006876: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
8006878: 687b ldr r3, [r7, #4]
800687a: 3310 adds r3, #16
800687c: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
800687e: 687b ldr r3, [r7, #4]
8006880: 681b ldr r3, [r3, #0]
8006882: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006886: b29b uxth r3, r3
8006888: 461a mov r2, r3
800688a: 6d7b ldr r3, [r7, #84] @ 0x54
800688c: 781b ldrb r3, [r3, #0]
800688e: 00db lsls r3, r3, #3
8006890: 4413 add r3, r2
8006892: 3302 adds r3, #2
8006894: 005b lsls r3, r3, #1
8006896: 687a ldr r2, [r7, #4]
8006898: 6812 ldr r2, [r2, #0]
800689a: 4413 add r3, r2
800689c: f503 6380 add.w r3, r3, #1024 @ 0x400
80068a0: 881b ldrh r3, [r3, #0]
80068a2: f3c3 0209 ubfx r2, r3, #0, #10
80068a6: 6d7b ldr r3, [r7, #84] @ 0x54
80068a8: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
80068aa: 6d7b ldr r3, [r7, #84] @ 0x54
80068ac: 695a ldr r2, [r3, #20]
80068ae: 6d7b ldr r3, [r7, #84] @ 0x54
80068b0: 69db ldr r3, [r3, #28]
80068b2: 441a add r2, r3
80068b4: 6d7b ldr r3, [r7, #84] @ 0x54
80068b6: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
80068b8: 2100 movs r1, #0
80068ba: 6878 ldr r0, [r7, #4]
80068bc: f006 ffe5 bl 800d88a <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
80068c0: 687b ldr r3, [r7, #4]
80068c2: 7b5b ldrb r3, [r3, #13]
80068c4: b2db uxtb r3, r3
80068c6: 2b00 cmp r3, #0
80068c8: f000 8368 beq.w 8006f9c <PCD_EP_ISR_Handler+0x782>
80068cc: 6d7b ldr r3, [r7, #84] @ 0x54
80068ce: 699b ldr r3, [r3, #24]
80068d0: 2b00 cmp r3, #0
80068d2: f040 8363 bne.w 8006f9c <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
80068d6: 687b ldr r3, [r7, #4]
80068d8: 7b5b ldrb r3, [r3, #13]
80068da: b2db uxtb r3, r3
80068dc: f063 037f orn r3, r3, #127 @ 0x7f
80068e0: b2da uxtb r2, r3
80068e2: 687b ldr r3, [r7, #4]
80068e4: 681b ldr r3, [r3, #0]
80068e6: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
80068ea: 687b ldr r3, [r7, #4]
80068ec: 2200 movs r2, #0
80068ee: 735a strb r2, [r3, #13]
80068f0: e354 b.n 8006f9c <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
80068f2: 687b ldr r3, [r7, #4]
80068f4: f503 73a8 add.w r3, r3, #336 @ 0x150
80068f8: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
80068fa: 687b ldr r3, [r7, #4]
80068fc: 681b ldr r3, [r3, #0]
80068fe: 881b ldrh r3, [r3, #0]
8006900: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
8006904: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006908: f403 6300 and.w r3, r3, #2048 @ 0x800
800690c: 2b00 cmp r3, #0
800690e: d034 beq.n 800697a <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8006910: 687b ldr r3, [r7, #4]
8006912: 681b ldr r3, [r3, #0]
8006914: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006918: b29b uxth r3, r3
800691a: 461a mov r2, r3
800691c: 6d7b ldr r3, [r7, #84] @ 0x54
800691e: 781b ldrb r3, [r3, #0]
8006920: 00db lsls r3, r3, #3
8006922: 4413 add r3, r2
8006924: 3306 adds r3, #6
8006926: 005b lsls r3, r3, #1
8006928: 687a ldr r2, [r7, #4]
800692a: 6812 ldr r2, [r2, #0]
800692c: 4413 add r3, r2
800692e: f503 6380 add.w r3, r3, #1024 @ 0x400
8006932: 881b ldrh r3, [r3, #0]
8006934: f3c3 0209 ubfx r2, r3, #0, #10
8006938: 6d7b ldr r3, [r7, #84] @ 0x54
800693a: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
800693c: 687b ldr r3, [r7, #4]
800693e: 6818 ldr r0, [r3, #0]
8006940: 687b ldr r3, [r7, #4]
8006942: f503 7126 add.w r1, r3, #664 @ 0x298
8006946: 6d7b ldr r3, [r7, #84] @ 0x54
8006948: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
800694a: 6d7b ldr r3, [r7, #84] @ 0x54
800694c: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
800694e: b29b uxth r3, r3
8006950: f005 f91d bl 800bb8e <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006954: 687b ldr r3, [r7, #4]
8006956: 681b ldr r3, [r3, #0]
8006958: 881b ldrh r3, [r3, #0]
800695a: b29a uxth r2, r3
800695c: f640 738f movw r3, #3983 @ 0xf8f
8006960: 4013 ands r3, r2
8006962: 823b strh r3, [r7, #16]
8006964: 687b ldr r3, [r7, #4]
8006966: 681b ldr r3, [r3, #0]
8006968: 8a3a ldrh r2, [r7, #16]
800696a: f042 0280 orr.w r2, r2, #128 @ 0x80
800696e: b292 uxth r2, r2
8006970: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8006972: 6878 ldr r0, [r7, #4]
8006974: f006 ff5c bl 800d830 <HAL_PCD_SetupStageCallback>
8006978: e310 b.n 8006f9c <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
800697a: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
800697e: 2b00 cmp r3, #0
8006980: f280 830c bge.w 8006f9c <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006984: 687b ldr r3, [r7, #4]
8006986: 681b ldr r3, [r3, #0]
8006988: 881b ldrh r3, [r3, #0]
800698a: b29a uxth r2, r3
800698c: f640 738f movw r3, #3983 @ 0xf8f
8006990: 4013 ands r3, r2
8006992: 83fb strh r3, [r7, #30]
8006994: 687b ldr r3, [r7, #4]
8006996: 681b ldr r3, [r3, #0]
8006998: 8bfa ldrh r2, [r7, #30]
800699a: f042 0280 orr.w r2, r2, #128 @ 0x80
800699e: b292 uxth r2, r2
80069a0: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80069a2: 687b ldr r3, [r7, #4]
80069a4: 681b ldr r3, [r3, #0]
80069a6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80069aa: b29b uxth r3, r3
80069ac: 461a mov r2, r3
80069ae: 6d7b ldr r3, [r7, #84] @ 0x54
80069b0: 781b ldrb r3, [r3, #0]
80069b2: 00db lsls r3, r3, #3
80069b4: 4413 add r3, r2
80069b6: 3306 adds r3, #6
80069b8: 005b lsls r3, r3, #1
80069ba: 687a ldr r2, [r7, #4]
80069bc: 6812 ldr r2, [r2, #0]
80069be: 4413 add r3, r2
80069c0: f503 6380 add.w r3, r3, #1024 @ 0x400
80069c4: 881b ldrh r3, [r3, #0]
80069c6: f3c3 0209 ubfx r2, r3, #0, #10
80069ca: 6d7b ldr r3, [r7, #84] @ 0x54
80069cc: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
80069ce: 6d7b ldr r3, [r7, #84] @ 0x54
80069d0: 69db ldr r3, [r3, #28]
80069d2: 2b00 cmp r3, #0
80069d4: d019 beq.n 8006a0a <PCD_EP_ISR_Handler+0x1f0>
80069d6: 6d7b ldr r3, [r7, #84] @ 0x54
80069d8: 695b ldr r3, [r3, #20]
80069da: 2b00 cmp r3, #0
80069dc: d015 beq.n 8006a0a <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
80069de: 687b ldr r3, [r7, #4]
80069e0: 6818 ldr r0, [r3, #0]
80069e2: 6d7b ldr r3, [r7, #84] @ 0x54
80069e4: 6959 ldr r1, [r3, #20]
80069e6: 6d7b ldr r3, [r7, #84] @ 0x54
80069e8: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
80069ea: 6d7b ldr r3, [r7, #84] @ 0x54
80069ec: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
80069ee: b29b uxth r3, r3
80069f0: f005 f8cd bl 800bb8e <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
80069f4: 6d7b ldr r3, [r7, #84] @ 0x54
80069f6: 695a ldr r2, [r3, #20]
80069f8: 6d7b ldr r3, [r7, #84] @ 0x54
80069fa: 69db ldr r3, [r3, #28]
80069fc: 441a add r2, r3
80069fe: 6d7b ldr r3, [r7, #84] @ 0x54
8006a00: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
8006a02: 2100 movs r1, #0
8006a04: 6878 ldr r0, [r7, #4]
8006a06: f006 ff25 bl 800d854 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8006a0a: 687b ldr r3, [r7, #4]
8006a0c: 681b ldr r3, [r3, #0]
8006a0e: 881b ldrh r3, [r3, #0]
8006a10: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8006a14: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006a18: f403 6300 and.w r3, r3, #2048 @ 0x800
8006a1c: 2b00 cmp r3, #0
8006a1e: f040 82bd bne.w 8006f9c <PCD_EP_ISR_Handler+0x782>
8006a22: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006a26: f403 5340 and.w r3, r3, #12288 @ 0x3000
8006a2a: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
8006a2e: f000 82b5 beq.w 8006f9c <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
8006a32: 687b ldr r3, [r7, #4]
8006a34: 681b ldr r3, [r3, #0]
8006a36: 61bb str r3, [r7, #24]
8006a38: 687b ldr r3, [r7, #4]
8006a3a: 681b ldr r3, [r3, #0]
8006a3c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006a40: b29b uxth r3, r3
8006a42: 461a mov r2, r3
8006a44: 69bb ldr r3, [r7, #24]
8006a46: 4413 add r3, r2
8006a48: 61bb str r3, [r7, #24]
8006a4a: 69bb ldr r3, [r7, #24]
8006a4c: f203 430c addw r3, r3, #1036 @ 0x40c
8006a50: 617b str r3, [r7, #20]
8006a52: 697b ldr r3, [r7, #20]
8006a54: 881b ldrh r3, [r3, #0]
8006a56: b29b uxth r3, r3
8006a58: f3c3 0309 ubfx r3, r3, #0, #10
8006a5c: b29a uxth r2, r3
8006a5e: 697b ldr r3, [r7, #20]
8006a60: 801a strh r2, [r3, #0]
8006a62: 6d7b ldr r3, [r7, #84] @ 0x54
8006a64: 691b ldr r3, [r3, #16]
8006a66: 2b3e cmp r3, #62 @ 0x3e
8006a68: d91d bls.n 8006aa6 <PCD_EP_ISR_Handler+0x28c>
8006a6a: 6d7b ldr r3, [r7, #84] @ 0x54
8006a6c: 691b ldr r3, [r3, #16]
8006a6e: 095b lsrs r3, r3, #5
8006a70: 647b str r3, [r7, #68] @ 0x44
8006a72: 6d7b ldr r3, [r7, #84] @ 0x54
8006a74: 691b ldr r3, [r3, #16]
8006a76: f003 031f and.w r3, r3, #31
8006a7a: 2b00 cmp r3, #0
8006a7c: d102 bne.n 8006a84 <PCD_EP_ISR_Handler+0x26a>
8006a7e: 6c7b ldr r3, [r7, #68] @ 0x44
8006a80: 3b01 subs r3, #1
8006a82: 647b str r3, [r7, #68] @ 0x44
8006a84: 697b ldr r3, [r7, #20]
8006a86: 881b ldrh r3, [r3, #0]
8006a88: b29a uxth r2, r3
8006a8a: 6c7b ldr r3, [r7, #68] @ 0x44
8006a8c: b29b uxth r3, r3
8006a8e: 029b lsls r3, r3, #10
8006a90: b29b uxth r3, r3
8006a92: 4313 orrs r3, r2
8006a94: b29b uxth r3, r3
8006a96: ea6f 4343 mvn.w r3, r3, lsl #17
8006a9a: ea6f 4353 mvn.w r3, r3, lsr #17
8006a9e: b29a uxth r2, r3
8006aa0: 697b ldr r3, [r7, #20]
8006aa2: 801a strh r2, [r3, #0]
8006aa4: e026 b.n 8006af4 <PCD_EP_ISR_Handler+0x2da>
8006aa6: 6d7b ldr r3, [r7, #84] @ 0x54
8006aa8: 691b ldr r3, [r3, #16]
8006aaa: 2b00 cmp r3, #0
8006aac: d10a bne.n 8006ac4 <PCD_EP_ISR_Handler+0x2aa>
8006aae: 697b ldr r3, [r7, #20]
8006ab0: 881b ldrh r3, [r3, #0]
8006ab2: b29b uxth r3, r3
8006ab4: ea6f 4343 mvn.w r3, r3, lsl #17
8006ab8: ea6f 4353 mvn.w r3, r3, lsr #17
8006abc: b29a uxth r2, r3
8006abe: 697b ldr r3, [r7, #20]
8006ac0: 801a strh r2, [r3, #0]
8006ac2: e017 b.n 8006af4 <PCD_EP_ISR_Handler+0x2da>
8006ac4: 6d7b ldr r3, [r7, #84] @ 0x54
8006ac6: 691b ldr r3, [r3, #16]
8006ac8: 085b lsrs r3, r3, #1
8006aca: 647b str r3, [r7, #68] @ 0x44
8006acc: 6d7b ldr r3, [r7, #84] @ 0x54
8006ace: 691b ldr r3, [r3, #16]
8006ad0: f003 0301 and.w r3, r3, #1
8006ad4: 2b00 cmp r3, #0
8006ad6: d002 beq.n 8006ade <PCD_EP_ISR_Handler+0x2c4>
8006ad8: 6c7b ldr r3, [r7, #68] @ 0x44
8006ada: 3301 adds r3, #1
8006adc: 647b str r3, [r7, #68] @ 0x44
8006ade: 697b ldr r3, [r7, #20]
8006ae0: 881b ldrh r3, [r3, #0]
8006ae2: b29a uxth r2, r3
8006ae4: 6c7b ldr r3, [r7, #68] @ 0x44
8006ae6: b29b uxth r3, r3
8006ae8: 029b lsls r3, r3, #10
8006aea: b29b uxth r3, r3
8006aec: 4313 orrs r3, r2
8006aee: b29a uxth r2, r3
8006af0: 697b ldr r3, [r7, #20]
8006af2: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8006af4: 687b ldr r3, [r7, #4]
8006af6: 681b ldr r3, [r3, #0]
8006af8: 881b ldrh r3, [r3, #0]
8006afa: b29b uxth r3, r3
8006afc: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006b00: f023 0370 bic.w r3, r3, #112 @ 0x70
8006b04: 827b strh r3, [r7, #18]
8006b06: 8a7b ldrh r3, [r7, #18]
8006b08: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8006b0c: 827b strh r3, [r7, #18]
8006b0e: 8a7b ldrh r3, [r7, #18]
8006b10: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006b14: 827b strh r3, [r7, #18]
8006b16: 687b ldr r3, [r7, #4]
8006b18: 681a ldr r2, [r3, #0]
8006b1a: 8a7b ldrh r3, [r7, #18]
8006b1c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006b20: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006b24: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006b28: f043 0380 orr.w r3, r3, #128 @ 0x80
8006b2c: b29b uxth r3, r3
8006b2e: 8013 strh r3, [r2, #0]
8006b30: e234 b.n 8006f9c <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
8006b32: 687b ldr r3, [r7, #4]
8006b34: 681b ldr r3, [r3, #0]
8006b36: 461a mov r2, r3
8006b38: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006b3c: 009b lsls r3, r3, #2
8006b3e: 4413 add r3, r2
8006b40: 881b ldrh r3, [r3, #0]
8006b42: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
8006b46: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8006b4a: 2b00 cmp r3, #0
8006b4c: f280 80fc bge.w 8006d48 <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
8006b50: 687b ldr r3, [r7, #4]
8006b52: 681b ldr r3, [r3, #0]
8006b54: 461a mov r2, r3
8006b56: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006b5a: 009b lsls r3, r3, #2
8006b5c: 4413 add r3, r2
8006b5e: 881b ldrh r3, [r3, #0]
8006b60: b29a uxth r2, r3
8006b62: f640 738f movw r3, #3983 @ 0xf8f
8006b66: 4013 ands r3, r2
8006b68: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8006b6c: 687b ldr r3, [r7, #4]
8006b6e: 681b ldr r3, [r3, #0]
8006b70: 461a mov r2, r3
8006b72: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006b76: 009b lsls r3, r3, #2
8006b78: 4413 add r3, r2
8006b7a: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
8006b7e: f042 0280 orr.w r2, r2, #128 @ 0x80
8006b82: b292 uxth r2, r2
8006b84: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
8006b86: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8006b8a: 4613 mov r3, r2
8006b8c: 009b lsls r3, r3, #2
8006b8e: 4413 add r3, r2
8006b90: 00db lsls r3, r3, #3
8006b92: f503 73a8 add.w r3, r3, #336 @ 0x150
8006b96: 687a ldr r2, [r7, #4]
8006b98: 4413 add r3, r2
8006b9a: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8006b9c: 6d7b ldr r3, [r7, #84] @ 0x54
8006b9e: 7b1b ldrb r3, [r3, #12]
8006ba0: 2b00 cmp r3, #0
8006ba2: d125 bne.n 8006bf0 <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8006ba4: 687b ldr r3, [r7, #4]
8006ba6: 681b ldr r3, [r3, #0]
8006ba8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006bac: b29b uxth r3, r3
8006bae: 461a mov r2, r3
8006bb0: 6d7b ldr r3, [r7, #84] @ 0x54
8006bb2: 781b ldrb r3, [r3, #0]
8006bb4: 00db lsls r3, r3, #3
8006bb6: 4413 add r3, r2
8006bb8: 3306 adds r3, #6
8006bba: 005b lsls r3, r3, #1
8006bbc: 687a ldr r2, [r7, #4]
8006bbe: 6812 ldr r2, [r2, #0]
8006bc0: 4413 add r3, r2
8006bc2: f503 6380 add.w r3, r3, #1024 @ 0x400
8006bc6: 881b ldrh r3, [r3, #0]
8006bc8: f3c3 0309 ubfx r3, r3, #0, #10
8006bcc: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8006bd0: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006bd4: 2b00 cmp r3, #0
8006bd6: f000 8092 beq.w 8006cfe <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
8006bda: 687b ldr r3, [r7, #4]
8006bdc: 6818 ldr r0, [r3, #0]
8006bde: 6d7b ldr r3, [r7, #84] @ 0x54
8006be0: 6959 ldr r1, [r3, #20]
8006be2: 6d7b ldr r3, [r7, #84] @ 0x54
8006be4: 88da ldrh r2, [r3, #6]
8006be6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006bea: f004 ffd0 bl 800bb8e <USB_ReadPMA>
8006bee: e086 b.n 8006cfe <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
8006bf0: 6d7b ldr r3, [r7, #84] @ 0x54
8006bf2: 78db ldrb r3, [r3, #3]
8006bf4: 2b02 cmp r3, #2
8006bf6: d10a bne.n 8006c0e <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
8006bf8: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006bfc: 461a mov r2, r3
8006bfe: 6d79 ldr r1, [r7, #84] @ 0x54
8006c00: 6878 ldr r0, [r7, #4]
8006c02: f000 f9d9 bl 8006fb8 <HAL_PCD_EP_DB_Receive>
8006c06: 4603 mov r3, r0
8006c08: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
8006c0c: e077 b.n 8006cfe <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8006c0e: 687b ldr r3, [r7, #4]
8006c10: 681b ldr r3, [r3, #0]
8006c12: 461a mov r2, r3
8006c14: 6d7b ldr r3, [r7, #84] @ 0x54
8006c16: 781b ldrb r3, [r3, #0]
8006c18: 009b lsls r3, r3, #2
8006c1a: 4413 add r3, r2
8006c1c: 881b ldrh r3, [r3, #0]
8006c1e: b29b uxth r3, r3
8006c20: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006c24: f023 0370 bic.w r3, r3, #112 @ 0x70
8006c28: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
8006c2c: 687b ldr r3, [r7, #4]
8006c2e: 681b ldr r3, [r3, #0]
8006c30: 461a mov r2, r3
8006c32: 6d7b ldr r3, [r7, #84] @ 0x54
8006c34: 781b ldrb r3, [r3, #0]
8006c36: 009b lsls r3, r3, #2
8006c38: 441a add r2, r3
8006c3a: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
8006c3e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006c42: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006c46: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006c4a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006c4e: b29b uxth r3, r3
8006c50: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
8006c52: 687b ldr r3, [r7, #4]
8006c54: 681b ldr r3, [r3, #0]
8006c56: 461a mov r2, r3
8006c58: 6d7b ldr r3, [r7, #84] @ 0x54
8006c5a: 781b ldrb r3, [r3, #0]
8006c5c: 009b lsls r3, r3, #2
8006c5e: 4413 add r3, r2
8006c60: 881b ldrh r3, [r3, #0]
8006c62: b29b uxth r3, r3
8006c64: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006c68: 2b00 cmp r3, #0
8006c6a: d024 beq.n 8006cb6 <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8006c6c: 687b ldr r3, [r7, #4]
8006c6e: 681b ldr r3, [r3, #0]
8006c70: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006c74: b29b uxth r3, r3
8006c76: 461a mov r2, r3
8006c78: 6d7b ldr r3, [r7, #84] @ 0x54
8006c7a: 781b ldrb r3, [r3, #0]
8006c7c: 00db lsls r3, r3, #3
8006c7e: 4413 add r3, r2
8006c80: 3302 adds r3, #2
8006c82: 005b lsls r3, r3, #1
8006c84: 687a ldr r2, [r7, #4]
8006c86: 6812 ldr r2, [r2, #0]
8006c88: 4413 add r3, r2
8006c8a: f503 6380 add.w r3, r3, #1024 @ 0x400
8006c8e: 881b ldrh r3, [r3, #0]
8006c90: f3c3 0309 ubfx r3, r3, #0, #10
8006c94: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8006c98: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006c9c: 2b00 cmp r3, #0
8006c9e: d02e beq.n 8006cfe <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8006ca0: 687b ldr r3, [r7, #4]
8006ca2: 6818 ldr r0, [r3, #0]
8006ca4: 6d7b ldr r3, [r7, #84] @ 0x54
8006ca6: 6959 ldr r1, [r3, #20]
8006ca8: 6d7b ldr r3, [r7, #84] @ 0x54
8006caa: 891a ldrh r2, [r3, #8]
8006cac: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006cb0: f004 ff6d bl 800bb8e <USB_ReadPMA>
8006cb4: e023 b.n 8006cfe <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8006cb6: 687b ldr r3, [r7, #4]
8006cb8: 681b ldr r3, [r3, #0]
8006cba: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006cbe: b29b uxth r3, r3
8006cc0: 461a mov r2, r3
8006cc2: 6d7b ldr r3, [r7, #84] @ 0x54
8006cc4: 781b ldrb r3, [r3, #0]
8006cc6: 00db lsls r3, r3, #3
8006cc8: 4413 add r3, r2
8006cca: 3306 adds r3, #6
8006ccc: 005b lsls r3, r3, #1
8006cce: 687a ldr r2, [r7, #4]
8006cd0: 6812 ldr r2, [r2, #0]
8006cd2: 4413 add r3, r2
8006cd4: f503 6380 add.w r3, r3, #1024 @ 0x400
8006cd8: 881b ldrh r3, [r3, #0]
8006cda: f3c3 0309 ubfx r3, r3, #0, #10
8006cde: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8006ce2: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006ce6: 2b00 cmp r3, #0
8006ce8: d009 beq.n 8006cfe <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8006cea: 687b ldr r3, [r7, #4]
8006cec: 6818 ldr r0, [r3, #0]
8006cee: 6d7b ldr r3, [r7, #84] @ 0x54
8006cf0: 6959 ldr r1, [r3, #20]
8006cf2: 6d7b ldr r3, [r7, #84] @ 0x54
8006cf4: 895a ldrh r2, [r3, #10]
8006cf6: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006cfa: f004 ff48 bl 800bb8e <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
8006cfe: 6d7b ldr r3, [r7, #84] @ 0x54
8006d00: 69da ldr r2, [r3, #28]
8006d02: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006d06: 441a add r2, r3
8006d08: 6d7b ldr r3, [r7, #84] @ 0x54
8006d0a: 61da str r2, [r3, #28]
ep->xfer_buff += count;
8006d0c: 6d7b ldr r3, [r7, #84] @ 0x54
8006d0e: 695a ldr r2, [r3, #20]
8006d10: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006d14: 441a add r2, r3
8006d16: 6d7b ldr r3, [r7, #84] @ 0x54
8006d18: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
8006d1a: 6d7b ldr r3, [r7, #84] @ 0x54
8006d1c: 699b ldr r3, [r3, #24]
8006d1e: 2b00 cmp r3, #0
8006d20: d005 beq.n 8006d2e <PCD_EP_ISR_Handler+0x514>
8006d22: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
8006d26: 6d7b ldr r3, [r7, #84] @ 0x54
8006d28: 691b ldr r3, [r3, #16]
8006d2a: 429a cmp r2, r3
8006d2c: d206 bcs.n 8006d3c <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
8006d2e: 6d7b ldr r3, [r7, #84] @ 0x54
8006d30: 781b ldrb r3, [r3, #0]
8006d32: 4619 mov r1, r3
8006d34: 6878 ldr r0, [r7, #4]
8006d36: f006 fd8d bl 800d854 <HAL_PCD_DataOutStageCallback>
8006d3a: e005 b.n 8006d48 <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006d3c: 687b ldr r3, [r7, #4]
8006d3e: 681b ldr r3, [r3, #0]
8006d40: 6d79 ldr r1, [r7, #84] @ 0x54
8006d42: 4618 mov r0, r3
8006d44: f003 f9ee bl 800a124 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
8006d48: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006d4c: f003 0380 and.w r3, r3, #128 @ 0x80
8006d50: 2b00 cmp r3, #0
8006d52: f000 8123 beq.w 8006f9c <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
8006d56: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8006d5a: 4613 mov r3, r2
8006d5c: 009b lsls r3, r3, #2
8006d5e: 4413 add r3, r2
8006d60: 00db lsls r3, r3, #3
8006d62: 3310 adds r3, #16
8006d64: 687a ldr r2, [r7, #4]
8006d66: 4413 add r3, r2
8006d68: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
8006d6a: 687b ldr r3, [r7, #4]
8006d6c: 681b ldr r3, [r3, #0]
8006d6e: 461a mov r2, r3
8006d70: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006d74: 009b lsls r3, r3, #2
8006d76: 4413 add r3, r2
8006d78: 881b ldrh r3, [r3, #0]
8006d7a: b29b uxth r3, r3
8006d7c: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8006d80: f023 0370 bic.w r3, r3, #112 @ 0x70
8006d84: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
8006d88: 687b ldr r3, [r7, #4]
8006d8a: 681b ldr r3, [r3, #0]
8006d8c: 461a mov r2, r3
8006d8e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006d92: 009b lsls r3, r3, #2
8006d94: 441a add r2, r3
8006d96: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8006d9a: ea6f 4343 mvn.w r3, r3, lsl #17
8006d9e: ea6f 4353 mvn.w r3, r3, lsr #17
8006da2: b29b uxth r3, r3
8006da4: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
8006da6: 6d7b ldr r3, [r7, #84] @ 0x54
8006da8: 78db ldrb r3, [r3, #3]
8006daa: 2b01 cmp r3, #1
8006dac: f040 80a2 bne.w 8006ef4 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
8006db0: 6d7b ldr r3, [r7, #84] @ 0x54
8006db2: 2200 movs r2, #0
8006db4: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
8006db6: 6d7b ldr r3, [r7, #84] @ 0x54
8006db8: 7b1b ldrb r3, [r3, #12]
8006dba: 2b00 cmp r3, #0
8006dbc: f000 8093 beq.w 8006ee6 <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8006dc0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006dc4: f003 0340 and.w r3, r3, #64 @ 0x40
8006dc8: 2b00 cmp r3, #0
8006dca: d046 beq.n 8006e5a <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8006dcc: 6d7b ldr r3, [r7, #84] @ 0x54
8006dce: 785b ldrb r3, [r3, #1]
8006dd0: 2b00 cmp r3, #0
8006dd2: d126 bne.n 8006e22 <PCD_EP_ISR_Handler+0x608>
8006dd4: 687b ldr r3, [r7, #4]
8006dd6: 681b ldr r3, [r3, #0]
8006dd8: 627b str r3, [r7, #36] @ 0x24
8006dda: 687b ldr r3, [r7, #4]
8006ddc: 681b ldr r3, [r3, #0]
8006dde: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006de2: b29b uxth r3, r3
8006de4: 461a mov r2, r3
8006de6: 6a7b ldr r3, [r7, #36] @ 0x24
8006de8: 4413 add r3, r2
8006dea: 627b str r3, [r7, #36] @ 0x24
8006dec: 6d7b ldr r3, [r7, #84] @ 0x54
8006dee: 781b ldrb r3, [r3, #0]
8006df0: 011a lsls r2, r3, #4
8006df2: 6a7b ldr r3, [r7, #36] @ 0x24
8006df4: 4413 add r3, r2
8006df6: f203 4304 addw r3, r3, #1028 @ 0x404
8006dfa: 623b str r3, [r7, #32]
8006dfc: 6a3b ldr r3, [r7, #32]
8006dfe: 881b ldrh r3, [r3, #0]
8006e00: b29b uxth r3, r3
8006e02: f3c3 0309 ubfx r3, r3, #0, #10
8006e06: b29a uxth r2, r3
8006e08: 6a3b ldr r3, [r7, #32]
8006e0a: 801a strh r2, [r3, #0]
8006e0c: 6a3b ldr r3, [r7, #32]
8006e0e: 881b ldrh r3, [r3, #0]
8006e10: b29b uxth r3, r3
8006e12: ea6f 4343 mvn.w r3, r3, lsl #17
8006e16: ea6f 4353 mvn.w r3, r3, lsr #17
8006e1a: b29a uxth r2, r3
8006e1c: 6a3b ldr r3, [r7, #32]
8006e1e: 801a strh r2, [r3, #0]
8006e20: e061 b.n 8006ee6 <PCD_EP_ISR_Handler+0x6cc>
8006e22: 6d7b ldr r3, [r7, #84] @ 0x54
8006e24: 785b ldrb r3, [r3, #1]
8006e26: 2b01 cmp r3, #1
8006e28: d15d bne.n 8006ee6 <PCD_EP_ISR_Handler+0x6cc>
8006e2a: 687b ldr r3, [r7, #4]
8006e2c: 681b ldr r3, [r3, #0]
8006e2e: 62fb str r3, [r7, #44] @ 0x2c
8006e30: 687b ldr r3, [r7, #4]
8006e32: 681b ldr r3, [r3, #0]
8006e34: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006e38: b29b uxth r3, r3
8006e3a: 461a mov r2, r3
8006e3c: 6afb ldr r3, [r7, #44] @ 0x2c
8006e3e: 4413 add r3, r2
8006e40: 62fb str r3, [r7, #44] @ 0x2c
8006e42: 6d7b ldr r3, [r7, #84] @ 0x54
8006e44: 781b ldrb r3, [r3, #0]
8006e46: 011a lsls r2, r3, #4
8006e48: 6afb ldr r3, [r7, #44] @ 0x2c
8006e4a: 4413 add r3, r2
8006e4c: f203 4304 addw r3, r3, #1028 @ 0x404
8006e50: 62bb str r3, [r7, #40] @ 0x28
8006e52: 6abb ldr r3, [r7, #40] @ 0x28
8006e54: 2200 movs r2, #0
8006e56: 801a strh r2, [r3, #0]
8006e58: e045 b.n 8006ee6 <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8006e5a: 687b ldr r3, [r7, #4]
8006e5c: 681b ldr r3, [r3, #0]
8006e5e: 63fb str r3, [r7, #60] @ 0x3c
8006e60: 6d7b ldr r3, [r7, #84] @ 0x54
8006e62: 785b ldrb r3, [r3, #1]
8006e64: 2b00 cmp r3, #0
8006e66: d126 bne.n 8006eb6 <PCD_EP_ISR_Handler+0x69c>
8006e68: 687b ldr r3, [r7, #4]
8006e6a: 681b ldr r3, [r3, #0]
8006e6c: 637b str r3, [r7, #52] @ 0x34
8006e6e: 687b ldr r3, [r7, #4]
8006e70: 681b ldr r3, [r3, #0]
8006e72: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006e76: b29b uxth r3, r3
8006e78: 461a mov r2, r3
8006e7a: 6b7b ldr r3, [r7, #52] @ 0x34
8006e7c: 4413 add r3, r2
8006e7e: 637b str r3, [r7, #52] @ 0x34
8006e80: 6d7b ldr r3, [r7, #84] @ 0x54
8006e82: 781b ldrb r3, [r3, #0]
8006e84: 011a lsls r2, r3, #4
8006e86: 6b7b ldr r3, [r7, #52] @ 0x34
8006e88: 4413 add r3, r2
8006e8a: f203 430c addw r3, r3, #1036 @ 0x40c
8006e8e: 633b str r3, [r7, #48] @ 0x30
8006e90: 6b3b ldr r3, [r7, #48] @ 0x30
8006e92: 881b ldrh r3, [r3, #0]
8006e94: b29b uxth r3, r3
8006e96: f3c3 0309 ubfx r3, r3, #0, #10
8006e9a: b29a uxth r2, r3
8006e9c: 6b3b ldr r3, [r7, #48] @ 0x30
8006e9e: 801a strh r2, [r3, #0]
8006ea0: 6b3b ldr r3, [r7, #48] @ 0x30
8006ea2: 881b ldrh r3, [r3, #0]
8006ea4: b29b uxth r3, r3
8006ea6: ea6f 4343 mvn.w r3, r3, lsl #17
8006eaa: ea6f 4353 mvn.w r3, r3, lsr #17
8006eae: b29a uxth r2, r3
8006eb0: 6b3b ldr r3, [r7, #48] @ 0x30
8006eb2: 801a strh r2, [r3, #0]
8006eb4: e017 b.n 8006ee6 <PCD_EP_ISR_Handler+0x6cc>
8006eb6: 6d7b ldr r3, [r7, #84] @ 0x54
8006eb8: 785b ldrb r3, [r3, #1]
8006eba: 2b01 cmp r3, #1
8006ebc: d113 bne.n 8006ee6 <PCD_EP_ISR_Handler+0x6cc>
8006ebe: 687b ldr r3, [r7, #4]
8006ec0: 681b ldr r3, [r3, #0]
8006ec2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006ec6: b29b uxth r3, r3
8006ec8: 461a mov r2, r3
8006eca: 6bfb ldr r3, [r7, #60] @ 0x3c
8006ecc: 4413 add r3, r2
8006ece: 63fb str r3, [r7, #60] @ 0x3c
8006ed0: 6d7b ldr r3, [r7, #84] @ 0x54
8006ed2: 781b ldrb r3, [r3, #0]
8006ed4: 011a lsls r2, r3, #4
8006ed6: 6bfb ldr r3, [r7, #60] @ 0x3c
8006ed8: 4413 add r3, r2
8006eda: f203 430c addw r3, r3, #1036 @ 0x40c
8006ede: 63bb str r3, [r7, #56] @ 0x38
8006ee0: 6bbb ldr r3, [r7, #56] @ 0x38
8006ee2: 2200 movs r2, #0
8006ee4: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8006ee6: 6d7b ldr r3, [r7, #84] @ 0x54
8006ee8: 781b ldrb r3, [r3, #0]
8006eea: 4619 mov r1, r3
8006eec: 6878 ldr r0, [r7, #4]
8006eee: f006 fccc bl 800d88a <HAL_PCD_DataInStageCallback>
8006ef2: e053 b.n 8006f9c <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
8006ef4: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006ef8: f403 7380 and.w r3, r3, #256 @ 0x100
8006efc: 2b00 cmp r3, #0
8006efe: d146 bne.n 8006f8e <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8006f00: 687b ldr r3, [r7, #4]
8006f02: 681b ldr r3, [r3, #0]
8006f04: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006f08: b29b uxth r3, r3
8006f0a: 461a mov r2, r3
8006f0c: 6d7b ldr r3, [r7, #84] @ 0x54
8006f0e: 781b ldrb r3, [r3, #0]
8006f10: 00db lsls r3, r3, #3
8006f12: 4413 add r3, r2
8006f14: 3302 adds r3, #2
8006f16: 005b lsls r3, r3, #1
8006f18: 687a ldr r2, [r7, #4]
8006f1a: 6812 ldr r2, [r2, #0]
8006f1c: 4413 add r3, r2
8006f1e: f503 6380 add.w r3, r3, #1024 @ 0x400
8006f22: 881b ldrh r3, [r3, #0]
8006f24: f3c3 0309 ubfx r3, r3, #0, #10
8006f28: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8006f2c: 6d7b ldr r3, [r7, #84] @ 0x54
8006f2e: 699a ldr r2, [r3, #24]
8006f30: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006f34: 429a cmp r2, r3
8006f36: d907 bls.n 8006f48 <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
8006f38: 6d7b ldr r3, [r7, #84] @ 0x54
8006f3a: 699a ldr r2, [r3, #24]
8006f3c: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006f40: 1ad2 subs r2, r2, r3
8006f42: 6d7b ldr r3, [r7, #84] @ 0x54
8006f44: 619a str r2, [r3, #24]
8006f46: e002 b.n 8006f4e <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
8006f48: 6d7b ldr r3, [r7, #84] @ 0x54
8006f4a: 2200 movs r2, #0
8006f4c: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8006f4e: 6d7b ldr r3, [r7, #84] @ 0x54
8006f50: 699b ldr r3, [r3, #24]
8006f52: 2b00 cmp r3, #0
8006f54: d106 bne.n 8006f64 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8006f56: 6d7b ldr r3, [r7, #84] @ 0x54
8006f58: 781b ldrb r3, [r3, #0]
8006f5a: 4619 mov r1, r3
8006f5c: 6878 ldr r0, [r7, #4]
8006f5e: f006 fc94 bl 800d88a <HAL_PCD_DataInStageCallback>
8006f62: e01b b.n 8006f9c <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
8006f64: 6d7b ldr r3, [r7, #84] @ 0x54
8006f66: 695a ldr r2, [r3, #20]
8006f68: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006f6c: 441a add r2, r3
8006f6e: 6d7b ldr r3, [r7, #84] @ 0x54
8006f70: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8006f72: 6d7b ldr r3, [r7, #84] @ 0x54
8006f74: 69da ldr r2, [r3, #28]
8006f76: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006f7a: 441a add r2, r3
8006f7c: 6d7b ldr r3, [r7, #84] @ 0x54
8006f7e: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006f80: 687b ldr r3, [r7, #4]
8006f82: 681b ldr r3, [r3, #0]
8006f84: 6d79 ldr r1, [r7, #84] @ 0x54
8006f86: 4618 mov r0, r3
8006f88: f003 f8cc bl 800a124 <USB_EPStartXfer>
8006f8c: e006 b.n 8006f9c <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8006f8e: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006f92: 461a mov r2, r3
8006f94: 6d79 ldr r1, [r7, #84] @ 0x54
8006f96: 6878 ldr r0, [r7, #4]
8006f98: f000 f91b bl 80071d2 <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8006f9c: 687b ldr r3, [r7, #4]
8006f9e: 681b ldr r3, [r3, #0]
8006fa0: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006fa4: b29b uxth r3, r3
8006fa6: b21b sxth r3, r3
8006fa8: 2b00 cmp r3, #0
8006faa: f6ff ac3b blt.w 8006824 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8006fae: 2300 movs r3, #0
}
8006fb0: 4618 mov r0, r3
8006fb2: 3758 adds r7, #88 @ 0x58
8006fb4: 46bd mov sp, r7
8006fb6: bd80 pop {r7, pc}
08006fb8 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8006fb8: b580 push {r7, lr}
8006fba: b088 sub sp, #32
8006fbc: af00 add r7, sp, #0
8006fbe: 60f8 str r0, [r7, #12]
8006fc0: 60b9 str r1, [r7, #8]
8006fc2: 4613 mov r3, r2
8006fc4: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8006fc6: 88fb ldrh r3, [r7, #6]
8006fc8: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006fcc: 2b00 cmp r3, #0
8006fce: d07e beq.n 80070ce <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8006fd0: 68fb ldr r3, [r7, #12]
8006fd2: 681b ldr r3, [r3, #0]
8006fd4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006fd8: b29b uxth r3, r3
8006fda: 461a mov r2, r3
8006fdc: 68bb ldr r3, [r7, #8]
8006fde: 781b ldrb r3, [r3, #0]
8006fe0: 00db lsls r3, r3, #3
8006fe2: 4413 add r3, r2
8006fe4: 3302 adds r3, #2
8006fe6: 005b lsls r3, r3, #1
8006fe8: 68fa ldr r2, [r7, #12]
8006fea: 6812 ldr r2, [r2, #0]
8006fec: 4413 add r3, r2
8006fee: f503 6380 add.w r3, r3, #1024 @ 0x400
8006ff2: 881b ldrh r3, [r3, #0]
8006ff4: f3c3 0309 ubfx r3, r3, #0, #10
8006ff8: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8006ffa: 68bb ldr r3, [r7, #8]
8006ffc: 699a ldr r2, [r3, #24]
8006ffe: 8b7b ldrh r3, [r7, #26]
8007000: 429a cmp r2, r3
8007002: d306 bcc.n 8007012 <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8007004: 68bb ldr r3, [r7, #8]
8007006: 699a ldr r2, [r3, #24]
8007008: 8b7b ldrh r3, [r7, #26]
800700a: 1ad2 subs r2, r2, r3
800700c: 68bb ldr r3, [r7, #8]
800700e: 619a str r2, [r3, #24]
8007010: e002 b.n 8007018 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
8007012: 68bb ldr r3, [r7, #8]
8007014: 2200 movs r2, #0
8007016: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8007018: 68bb ldr r3, [r7, #8]
800701a: 699b ldr r3, [r3, #24]
800701c: 2b00 cmp r3, #0
800701e: d123 bne.n 8007068 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8007020: 68fb ldr r3, [r7, #12]
8007022: 681b ldr r3, [r3, #0]
8007024: 461a mov r2, r3
8007026: 68bb ldr r3, [r7, #8]
8007028: 781b ldrb r3, [r3, #0]
800702a: 009b lsls r3, r3, #2
800702c: 4413 add r3, r2
800702e: 881b ldrh r3, [r3, #0]
8007030: b29b uxth r3, r3
8007032: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8007036: f023 0370 bic.w r3, r3, #112 @ 0x70
800703a: 833b strh r3, [r7, #24]
800703c: 8b3b ldrh r3, [r7, #24]
800703e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8007042: 833b strh r3, [r7, #24]
8007044: 68fb ldr r3, [r7, #12]
8007046: 681b ldr r3, [r3, #0]
8007048: 461a mov r2, r3
800704a: 68bb ldr r3, [r7, #8]
800704c: 781b ldrb r3, [r3, #0]
800704e: 009b lsls r3, r3, #2
8007050: 441a add r2, r3
8007052: 8b3b ldrh r3, [r7, #24]
8007054: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007058: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800705c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007060: f043 0380 orr.w r3, r3, #128 @ 0x80
8007064: b29b uxth r3, r3
8007066: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8007068: 88fb ldrh r3, [r7, #6]
800706a: f003 0340 and.w r3, r3, #64 @ 0x40
800706e: 2b00 cmp r3, #0
8007070: d01f beq.n 80070b2 <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8007072: 68fb ldr r3, [r7, #12]
8007074: 681b ldr r3, [r3, #0]
8007076: 461a mov r2, r3
8007078: 68bb ldr r3, [r7, #8]
800707a: 781b ldrb r3, [r3, #0]
800707c: 009b lsls r3, r3, #2
800707e: 4413 add r3, r2
8007080: 881b ldrh r3, [r3, #0]
8007082: b29b uxth r3, r3
8007084: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007088: f023 0370 bic.w r3, r3, #112 @ 0x70
800708c: 82fb strh r3, [r7, #22]
800708e: 68fb ldr r3, [r7, #12]
8007090: 681b ldr r3, [r3, #0]
8007092: 461a mov r2, r3
8007094: 68bb ldr r3, [r7, #8]
8007096: 781b ldrb r3, [r3, #0]
8007098: 009b lsls r3, r3, #2
800709a: 441a add r2, r3
800709c: 8afb ldrh r3, [r7, #22]
800709e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80070a2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80070a6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80070aa: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80070ae: b29b uxth r3, r3
80070b0: 8013 strh r3, [r2, #0]
}
if (count != 0U)
80070b2: 8b7b ldrh r3, [r7, #26]
80070b4: 2b00 cmp r3, #0
80070b6: f000 8087 beq.w 80071c8 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
80070ba: 68fb ldr r3, [r7, #12]
80070bc: 6818 ldr r0, [r3, #0]
80070be: 68bb ldr r3, [r7, #8]
80070c0: 6959 ldr r1, [r3, #20]
80070c2: 68bb ldr r3, [r7, #8]
80070c4: 891a ldrh r2, [r3, #8]
80070c6: 8b7b ldrh r3, [r7, #26]
80070c8: f004 fd61 bl 800bb8e <USB_ReadPMA>
80070cc: e07c b.n 80071c8 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80070ce: 68fb ldr r3, [r7, #12]
80070d0: 681b ldr r3, [r3, #0]
80070d2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80070d6: b29b uxth r3, r3
80070d8: 461a mov r2, r3
80070da: 68bb ldr r3, [r7, #8]
80070dc: 781b ldrb r3, [r3, #0]
80070de: 00db lsls r3, r3, #3
80070e0: 4413 add r3, r2
80070e2: 3306 adds r3, #6
80070e4: 005b lsls r3, r3, #1
80070e6: 68fa ldr r2, [r7, #12]
80070e8: 6812 ldr r2, [r2, #0]
80070ea: 4413 add r3, r2
80070ec: f503 6380 add.w r3, r3, #1024 @ 0x400
80070f0: 881b ldrh r3, [r3, #0]
80070f2: f3c3 0309 ubfx r3, r3, #0, #10
80070f6: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
80070f8: 68bb ldr r3, [r7, #8]
80070fa: 699a ldr r2, [r3, #24]
80070fc: 8b7b ldrh r3, [r7, #26]
80070fe: 429a cmp r2, r3
8007100: d306 bcc.n 8007110 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
8007102: 68bb ldr r3, [r7, #8]
8007104: 699a ldr r2, [r3, #24]
8007106: 8b7b ldrh r3, [r7, #26]
8007108: 1ad2 subs r2, r2, r3
800710a: 68bb ldr r3, [r7, #8]
800710c: 619a str r2, [r3, #24]
800710e: e002 b.n 8007116 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
8007110: 68bb ldr r3, [r7, #8]
8007112: 2200 movs r2, #0
8007114: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8007116: 68bb ldr r3, [r7, #8]
8007118: 699b ldr r3, [r3, #24]
800711a: 2b00 cmp r3, #0
800711c: d123 bne.n 8007166 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
800711e: 68fb ldr r3, [r7, #12]
8007120: 681b ldr r3, [r3, #0]
8007122: 461a mov r2, r3
8007124: 68bb ldr r3, [r7, #8]
8007126: 781b ldrb r3, [r3, #0]
8007128: 009b lsls r3, r3, #2
800712a: 4413 add r3, r2
800712c: 881b ldrh r3, [r3, #0]
800712e: b29b uxth r3, r3
8007130: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8007134: f023 0370 bic.w r3, r3, #112 @ 0x70
8007138: 83fb strh r3, [r7, #30]
800713a: 8bfb ldrh r3, [r7, #30]
800713c: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8007140: 83fb strh r3, [r7, #30]
8007142: 68fb ldr r3, [r7, #12]
8007144: 681b ldr r3, [r3, #0]
8007146: 461a mov r2, r3
8007148: 68bb ldr r3, [r7, #8]
800714a: 781b ldrb r3, [r3, #0]
800714c: 009b lsls r3, r3, #2
800714e: 441a add r2, r3
8007150: 8bfb ldrh r3, [r7, #30]
8007152: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007156: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800715a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800715e: f043 0380 orr.w r3, r3, #128 @ 0x80
8007162: b29b uxth r3, r3
8007164: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
8007166: 88fb ldrh r3, [r7, #6]
8007168: f003 0340 and.w r3, r3, #64 @ 0x40
800716c: 2b00 cmp r3, #0
800716e: d11f bne.n 80071b0 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8007170: 68fb ldr r3, [r7, #12]
8007172: 681b ldr r3, [r3, #0]
8007174: 461a mov r2, r3
8007176: 68bb ldr r3, [r7, #8]
8007178: 781b ldrb r3, [r3, #0]
800717a: 009b lsls r3, r3, #2
800717c: 4413 add r3, r2
800717e: 881b ldrh r3, [r3, #0]
8007180: b29b uxth r3, r3
8007182: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007186: f023 0370 bic.w r3, r3, #112 @ 0x70
800718a: 83bb strh r3, [r7, #28]
800718c: 68fb ldr r3, [r7, #12]
800718e: 681b ldr r3, [r3, #0]
8007190: 461a mov r2, r3
8007192: 68bb ldr r3, [r7, #8]
8007194: 781b ldrb r3, [r3, #0]
8007196: 009b lsls r3, r3, #2
8007198: 441a add r2, r3
800719a: 8bbb ldrh r3, [r7, #28]
800719c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80071a0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80071a4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80071a8: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80071ac: b29b uxth r3, r3
80071ae: 8013 strh r3, [r2, #0]
}
if (count != 0U)
80071b0: 8b7b ldrh r3, [r7, #26]
80071b2: 2b00 cmp r3, #0
80071b4: d008 beq.n 80071c8 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
80071b6: 68fb ldr r3, [r7, #12]
80071b8: 6818 ldr r0, [r3, #0]
80071ba: 68bb ldr r3, [r7, #8]
80071bc: 6959 ldr r1, [r3, #20]
80071be: 68bb ldr r3, [r7, #8]
80071c0: 895a ldrh r2, [r3, #10]
80071c2: 8b7b ldrh r3, [r7, #26]
80071c4: f004 fce3 bl 800bb8e <USB_ReadPMA>
}
}
return count;
80071c8: 8b7b ldrh r3, [r7, #26]
}
80071ca: 4618 mov r0, r3
80071cc: 3720 adds r7, #32
80071ce: 46bd mov sp, r7
80071d0: bd80 pop {r7, pc}
080071d2 <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
80071d2: b580 push {r7, lr}
80071d4: b0a4 sub sp, #144 @ 0x90
80071d6: af00 add r7, sp, #0
80071d8: 60f8 str r0, [r7, #12]
80071da: 60b9 str r1, [r7, #8]
80071dc: 4613 mov r3, r2
80071de: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80071e0: 88fb ldrh r3, [r7, #6]
80071e2: f003 0340 and.w r3, r3, #64 @ 0x40
80071e6: 2b00 cmp r3, #0
80071e8: f000 81dd beq.w 80075a6 <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80071ec: 68fb ldr r3, [r7, #12]
80071ee: 681b ldr r3, [r3, #0]
80071f0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80071f4: b29b uxth r3, r3
80071f6: 461a mov r2, r3
80071f8: 68bb ldr r3, [r7, #8]
80071fa: 781b ldrb r3, [r3, #0]
80071fc: 00db lsls r3, r3, #3
80071fe: 4413 add r3, r2
8007200: 3302 adds r3, #2
8007202: 005b lsls r3, r3, #1
8007204: 68fa ldr r2, [r7, #12]
8007206: 6812 ldr r2, [r2, #0]
8007208: 4413 add r3, r2
800720a: f503 6380 add.w r3, r3, #1024 @ 0x400
800720e: 881b ldrh r3, [r3, #0]
8007210: f3c3 0309 ubfx r3, r3, #0, #10
8007214: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8007218: 68bb ldr r3, [r7, #8]
800721a: 699a ldr r2, [r3, #24]
800721c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007220: 429a cmp r2, r3
8007222: d907 bls.n 8007234 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8007224: 68bb ldr r3, [r7, #8]
8007226: 699a ldr r2, [r3, #24]
8007228: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800722c: 1ad2 subs r2, r2, r3
800722e: 68bb ldr r3, [r7, #8]
8007230: 619a str r2, [r3, #24]
8007232: e002 b.n 800723a <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8007234: 68bb ldr r3, [r7, #8]
8007236: 2200 movs r2, #0
8007238: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
800723a: 68bb ldr r3, [r7, #8]
800723c: 699b ldr r3, [r3, #24]
800723e: 2b00 cmp r3, #0
8007240: f040 80b9 bne.w 80073b6 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007244: 68bb ldr r3, [r7, #8]
8007246: 785b ldrb r3, [r3, #1]
8007248: 2b00 cmp r3, #0
800724a: d126 bne.n 800729a <HAL_PCD_EP_DB_Transmit+0xc8>
800724c: 68fb ldr r3, [r7, #12]
800724e: 681b ldr r3, [r3, #0]
8007250: 62fb str r3, [r7, #44] @ 0x2c
8007252: 68fb ldr r3, [r7, #12]
8007254: 681b ldr r3, [r3, #0]
8007256: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800725a: b29b uxth r3, r3
800725c: 461a mov r2, r3
800725e: 6afb ldr r3, [r7, #44] @ 0x2c
8007260: 4413 add r3, r2
8007262: 62fb str r3, [r7, #44] @ 0x2c
8007264: 68bb ldr r3, [r7, #8]
8007266: 781b ldrb r3, [r3, #0]
8007268: 011a lsls r2, r3, #4
800726a: 6afb ldr r3, [r7, #44] @ 0x2c
800726c: 4413 add r3, r2
800726e: f203 4304 addw r3, r3, #1028 @ 0x404
8007272: 62bb str r3, [r7, #40] @ 0x28
8007274: 6abb ldr r3, [r7, #40] @ 0x28
8007276: 881b ldrh r3, [r3, #0]
8007278: b29b uxth r3, r3
800727a: f3c3 0309 ubfx r3, r3, #0, #10
800727e: b29a uxth r2, r3
8007280: 6abb ldr r3, [r7, #40] @ 0x28
8007282: 801a strh r2, [r3, #0]
8007284: 6abb ldr r3, [r7, #40] @ 0x28
8007286: 881b ldrh r3, [r3, #0]
8007288: b29b uxth r3, r3
800728a: ea6f 4343 mvn.w r3, r3, lsl #17
800728e: ea6f 4353 mvn.w r3, r3, lsr #17
8007292: b29a uxth r2, r3
8007294: 6abb ldr r3, [r7, #40] @ 0x28
8007296: 801a strh r2, [r3, #0]
8007298: e01a b.n 80072d0 <HAL_PCD_EP_DB_Transmit+0xfe>
800729a: 68bb ldr r3, [r7, #8]
800729c: 785b ldrb r3, [r3, #1]
800729e: 2b01 cmp r3, #1
80072a0: d116 bne.n 80072d0 <HAL_PCD_EP_DB_Transmit+0xfe>
80072a2: 68fb ldr r3, [r7, #12]
80072a4: 681b ldr r3, [r3, #0]
80072a6: 637b str r3, [r7, #52] @ 0x34
80072a8: 68fb ldr r3, [r7, #12]
80072aa: 681b ldr r3, [r3, #0]
80072ac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80072b0: b29b uxth r3, r3
80072b2: 461a mov r2, r3
80072b4: 6b7b ldr r3, [r7, #52] @ 0x34
80072b6: 4413 add r3, r2
80072b8: 637b str r3, [r7, #52] @ 0x34
80072ba: 68bb ldr r3, [r7, #8]
80072bc: 781b ldrb r3, [r3, #0]
80072be: 011a lsls r2, r3, #4
80072c0: 6b7b ldr r3, [r7, #52] @ 0x34
80072c2: 4413 add r3, r2
80072c4: f203 4304 addw r3, r3, #1028 @ 0x404
80072c8: 633b str r3, [r7, #48] @ 0x30
80072ca: 6b3b ldr r3, [r7, #48] @ 0x30
80072cc: 2200 movs r2, #0
80072ce: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80072d0: 68fb ldr r3, [r7, #12]
80072d2: 681b ldr r3, [r3, #0]
80072d4: 627b str r3, [r7, #36] @ 0x24
80072d6: 68bb ldr r3, [r7, #8]
80072d8: 785b ldrb r3, [r3, #1]
80072da: 2b00 cmp r3, #0
80072dc: d126 bne.n 800732c <HAL_PCD_EP_DB_Transmit+0x15a>
80072de: 68fb ldr r3, [r7, #12]
80072e0: 681b ldr r3, [r3, #0]
80072e2: 61fb str r3, [r7, #28]
80072e4: 68fb ldr r3, [r7, #12]
80072e6: 681b ldr r3, [r3, #0]
80072e8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80072ec: b29b uxth r3, r3
80072ee: 461a mov r2, r3
80072f0: 69fb ldr r3, [r7, #28]
80072f2: 4413 add r3, r2
80072f4: 61fb str r3, [r7, #28]
80072f6: 68bb ldr r3, [r7, #8]
80072f8: 781b ldrb r3, [r3, #0]
80072fa: 011a lsls r2, r3, #4
80072fc: 69fb ldr r3, [r7, #28]
80072fe: 4413 add r3, r2
8007300: f203 430c addw r3, r3, #1036 @ 0x40c
8007304: 61bb str r3, [r7, #24]
8007306: 69bb ldr r3, [r7, #24]
8007308: 881b ldrh r3, [r3, #0]
800730a: b29b uxth r3, r3
800730c: f3c3 0309 ubfx r3, r3, #0, #10
8007310: b29a uxth r2, r3
8007312: 69bb ldr r3, [r7, #24]
8007314: 801a strh r2, [r3, #0]
8007316: 69bb ldr r3, [r7, #24]
8007318: 881b ldrh r3, [r3, #0]
800731a: b29b uxth r3, r3
800731c: ea6f 4343 mvn.w r3, r3, lsl #17
8007320: ea6f 4353 mvn.w r3, r3, lsr #17
8007324: b29a uxth r2, r3
8007326: 69bb ldr r3, [r7, #24]
8007328: 801a strh r2, [r3, #0]
800732a: e017 b.n 800735c <HAL_PCD_EP_DB_Transmit+0x18a>
800732c: 68bb ldr r3, [r7, #8]
800732e: 785b ldrb r3, [r3, #1]
8007330: 2b01 cmp r3, #1
8007332: d113 bne.n 800735c <HAL_PCD_EP_DB_Transmit+0x18a>
8007334: 68fb ldr r3, [r7, #12]
8007336: 681b ldr r3, [r3, #0]
8007338: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800733c: b29b uxth r3, r3
800733e: 461a mov r2, r3
8007340: 6a7b ldr r3, [r7, #36] @ 0x24
8007342: 4413 add r3, r2
8007344: 627b str r3, [r7, #36] @ 0x24
8007346: 68bb ldr r3, [r7, #8]
8007348: 781b ldrb r3, [r3, #0]
800734a: 011a lsls r2, r3, #4
800734c: 6a7b ldr r3, [r7, #36] @ 0x24
800734e: 4413 add r3, r2
8007350: f203 430c addw r3, r3, #1036 @ 0x40c
8007354: 623b str r3, [r7, #32]
8007356: 6a3b ldr r3, [r7, #32]
8007358: 2200 movs r2, #0
800735a: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
800735c: 68bb ldr r3, [r7, #8]
800735e: 781b ldrb r3, [r3, #0]
8007360: 4619 mov r1, r3
8007362: 68f8 ldr r0, [r7, #12]
8007364: f006 fa91 bl 800d88a <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007368: 88fb ldrh r3, [r7, #6]
800736a: f403 4380 and.w r3, r3, #16384 @ 0x4000
800736e: 2b00 cmp r3, #0
8007370: f000 82fc beq.w 800796c <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007374: 68fb ldr r3, [r7, #12]
8007376: 681b ldr r3, [r3, #0]
8007378: 461a mov r2, r3
800737a: 68bb ldr r3, [r7, #8]
800737c: 781b ldrb r3, [r3, #0]
800737e: 009b lsls r3, r3, #2
8007380: 4413 add r3, r2
8007382: 881b ldrh r3, [r3, #0]
8007384: b29b uxth r3, r3
8007386: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800738a: f023 0370 bic.w r3, r3, #112 @ 0x70
800738e: 82fb strh r3, [r7, #22]
8007390: 68fb ldr r3, [r7, #12]
8007392: 681b ldr r3, [r3, #0]
8007394: 461a mov r2, r3
8007396: 68bb ldr r3, [r7, #8]
8007398: 781b ldrb r3, [r3, #0]
800739a: 009b lsls r3, r3, #2
800739c: 441a add r2, r3
800739e: 8afb ldrh r3, [r7, #22]
80073a0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80073a4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80073a8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80073ac: f043 0380 orr.w r3, r3, #128 @ 0x80
80073b0: b29b uxth r3, r3
80073b2: 8013 strh r3, [r2, #0]
80073b4: e2da b.n 800796c <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
80073b6: 88fb ldrh r3, [r7, #6]
80073b8: f403 4380 and.w r3, r3, #16384 @ 0x4000
80073bc: 2b00 cmp r3, #0
80073be: d021 beq.n 8007404 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
80073c0: 68fb ldr r3, [r7, #12]
80073c2: 681b ldr r3, [r3, #0]
80073c4: 461a mov r2, r3
80073c6: 68bb ldr r3, [r7, #8]
80073c8: 781b ldrb r3, [r3, #0]
80073ca: 009b lsls r3, r3, #2
80073cc: 4413 add r3, r2
80073ce: 881b ldrh r3, [r3, #0]
80073d0: b29b uxth r3, r3
80073d2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80073d6: f023 0370 bic.w r3, r3, #112 @ 0x70
80073da: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
80073de: 68fb ldr r3, [r7, #12]
80073e0: 681b ldr r3, [r3, #0]
80073e2: 461a mov r2, r3
80073e4: 68bb ldr r3, [r7, #8]
80073e6: 781b ldrb r3, [r3, #0]
80073e8: 009b lsls r3, r3, #2
80073ea: 441a add r2, r3
80073ec: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
80073f0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80073f4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80073f8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80073fc: f043 0380 orr.w r3, r3, #128 @ 0x80
8007400: b29b uxth r3, r3
8007402: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8007404: 68bb ldr r3, [r7, #8]
8007406: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
800740a: 2b01 cmp r3, #1
800740c: f040 82ae bne.w 800796c <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8007410: 68bb ldr r3, [r7, #8]
8007412: 695a ldr r2, [r3, #20]
8007414: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007418: 441a add r2, r3
800741a: 68bb ldr r3, [r7, #8]
800741c: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
800741e: 68bb ldr r3, [r7, #8]
8007420: 69da ldr r2, [r3, #28]
8007422: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007426: 441a add r2, r3
8007428: 68bb ldr r3, [r7, #8]
800742a: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
800742c: 68bb ldr r3, [r7, #8]
800742e: 6a1a ldr r2, [r3, #32]
8007430: 68bb ldr r3, [r7, #8]
8007432: 691b ldr r3, [r3, #16]
8007434: 429a cmp r2, r3
8007436: d30b bcc.n 8007450 <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8007438: 68bb ldr r3, [r7, #8]
800743a: 691b ldr r3, [r3, #16]
800743c: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007440: 68bb ldr r3, [r7, #8]
8007442: 6a1a ldr r2, [r3, #32]
8007444: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007448: 1ad2 subs r2, r2, r3
800744a: 68bb ldr r3, [r7, #8]
800744c: 621a str r2, [r3, #32]
800744e: e017 b.n 8007480 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8007450: 68bb ldr r3, [r7, #8]
8007452: 6a1b ldr r3, [r3, #32]
8007454: 2b00 cmp r3, #0
8007456: d108 bne.n 800746a <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8007458: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800745c: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007460: 68bb ldr r3, [r7, #8]
8007462: 2200 movs r2, #0
8007464: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007468: e00a b.n 8007480 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
800746a: 68bb ldr r3, [r7, #8]
800746c: 2200 movs r2, #0
800746e: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8007472: 68bb ldr r3, [r7, #8]
8007474: 6a1b ldr r3, [r3, #32]
8007476: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
800747a: 68bb ldr r3, [r7, #8]
800747c: 2200 movs r2, #0
800747e: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007480: 68bb ldr r3, [r7, #8]
8007482: 785b ldrb r3, [r3, #1]
8007484: 2b00 cmp r3, #0
8007486: d165 bne.n 8007554 <HAL_PCD_EP_DB_Transmit+0x382>
8007488: 68fb ldr r3, [r7, #12]
800748a: 681b ldr r3, [r3, #0]
800748c: 63fb str r3, [r7, #60] @ 0x3c
800748e: 68fb ldr r3, [r7, #12]
8007490: 681b ldr r3, [r3, #0]
8007492: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007496: b29b uxth r3, r3
8007498: 461a mov r2, r3
800749a: 6bfb ldr r3, [r7, #60] @ 0x3c
800749c: 4413 add r3, r2
800749e: 63fb str r3, [r7, #60] @ 0x3c
80074a0: 68bb ldr r3, [r7, #8]
80074a2: 781b ldrb r3, [r3, #0]
80074a4: 011a lsls r2, r3, #4
80074a6: 6bfb ldr r3, [r7, #60] @ 0x3c
80074a8: 4413 add r3, r2
80074aa: f203 4304 addw r3, r3, #1028 @ 0x404
80074ae: 63bb str r3, [r7, #56] @ 0x38
80074b0: 6bbb ldr r3, [r7, #56] @ 0x38
80074b2: 881b ldrh r3, [r3, #0]
80074b4: b29b uxth r3, r3
80074b6: f3c3 0309 ubfx r3, r3, #0, #10
80074ba: b29a uxth r2, r3
80074bc: 6bbb ldr r3, [r7, #56] @ 0x38
80074be: 801a strh r2, [r3, #0]
80074c0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80074c4: 2b3e cmp r3, #62 @ 0x3e
80074c6: d91d bls.n 8007504 <HAL_PCD_EP_DB_Transmit+0x332>
80074c8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80074cc: 095b lsrs r3, r3, #5
80074ce: 64bb str r3, [r7, #72] @ 0x48
80074d0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80074d4: f003 031f and.w r3, r3, #31
80074d8: 2b00 cmp r3, #0
80074da: d102 bne.n 80074e2 <HAL_PCD_EP_DB_Transmit+0x310>
80074dc: 6cbb ldr r3, [r7, #72] @ 0x48
80074de: 3b01 subs r3, #1
80074e0: 64bb str r3, [r7, #72] @ 0x48
80074e2: 6bbb ldr r3, [r7, #56] @ 0x38
80074e4: 881b ldrh r3, [r3, #0]
80074e6: b29a uxth r2, r3
80074e8: 6cbb ldr r3, [r7, #72] @ 0x48
80074ea: b29b uxth r3, r3
80074ec: 029b lsls r3, r3, #10
80074ee: b29b uxth r3, r3
80074f0: 4313 orrs r3, r2
80074f2: b29b uxth r3, r3
80074f4: ea6f 4343 mvn.w r3, r3, lsl #17
80074f8: ea6f 4353 mvn.w r3, r3, lsr #17
80074fc: b29a uxth r2, r3
80074fe: 6bbb ldr r3, [r7, #56] @ 0x38
8007500: 801a strh r2, [r3, #0]
8007502: e044 b.n 800758e <HAL_PCD_EP_DB_Transmit+0x3bc>
8007504: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007508: 2b00 cmp r3, #0
800750a: d10a bne.n 8007522 <HAL_PCD_EP_DB_Transmit+0x350>
800750c: 6bbb ldr r3, [r7, #56] @ 0x38
800750e: 881b ldrh r3, [r3, #0]
8007510: b29b uxth r3, r3
8007512: ea6f 4343 mvn.w r3, r3, lsl #17
8007516: ea6f 4353 mvn.w r3, r3, lsr #17
800751a: b29a uxth r2, r3
800751c: 6bbb ldr r3, [r7, #56] @ 0x38
800751e: 801a strh r2, [r3, #0]
8007520: e035 b.n 800758e <HAL_PCD_EP_DB_Transmit+0x3bc>
8007522: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007526: 085b lsrs r3, r3, #1
8007528: 64bb str r3, [r7, #72] @ 0x48
800752a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800752e: f003 0301 and.w r3, r3, #1
8007532: 2b00 cmp r3, #0
8007534: d002 beq.n 800753c <HAL_PCD_EP_DB_Transmit+0x36a>
8007536: 6cbb ldr r3, [r7, #72] @ 0x48
8007538: 3301 adds r3, #1
800753a: 64bb str r3, [r7, #72] @ 0x48
800753c: 6bbb ldr r3, [r7, #56] @ 0x38
800753e: 881b ldrh r3, [r3, #0]
8007540: b29a uxth r2, r3
8007542: 6cbb ldr r3, [r7, #72] @ 0x48
8007544: b29b uxth r3, r3
8007546: 029b lsls r3, r3, #10
8007548: b29b uxth r3, r3
800754a: 4313 orrs r3, r2
800754c: b29a uxth r2, r3
800754e: 6bbb ldr r3, [r7, #56] @ 0x38
8007550: 801a strh r2, [r3, #0]
8007552: e01c b.n 800758e <HAL_PCD_EP_DB_Transmit+0x3bc>
8007554: 68bb ldr r3, [r7, #8]
8007556: 785b ldrb r3, [r3, #1]
8007558: 2b01 cmp r3, #1
800755a: d118 bne.n 800758e <HAL_PCD_EP_DB_Transmit+0x3bc>
800755c: 68fb ldr r3, [r7, #12]
800755e: 681b ldr r3, [r3, #0]
8007560: 647b str r3, [r7, #68] @ 0x44
8007562: 68fb ldr r3, [r7, #12]
8007564: 681b ldr r3, [r3, #0]
8007566: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800756a: b29b uxth r3, r3
800756c: 461a mov r2, r3
800756e: 6c7b ldr r3, [r7, #68] @ 0x44
8007570: 4413 add r3, r2
8007572: 647b str r3, [r7, #68] @ 0x44
8007574: 68bb ldr r3, [r7, #8]
8007576: 781b ldrb r3, [r3, #0]
8007578: 011a lsls r2, r3, #4
800757a: 6c7b ldr r3, [r7, #68] @ 0x44
800757c: 4413 add r3, r2
800757e: f203 4304 addw r3, r3, #1028 @ 0x404
8007582: 643b str r3, [r7, #64] @ 0x40
8007584: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007588: b29a uxth r2, r3
800758a: 6c3b ldr r3, [r7, #64] @ 0x40
800758c: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
800758e: 68fb ldr r3, [r7, #12]
8007590: 6818 ldr r0, [r3, #0]
8007592: 68bb ldr r3, [r7, #8]
8007594: 6959 ldr r1, [r3, #20]
8007596: 68bb ldr r3, [r7, #8]
8007598: 891a ldrh r2, [r3, #8]
800759a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800759e: b29b uxth r3, r3
80075a0: f004 faaf bl 800bb02 <USB_WritePMA>
80075a4: e1e2 b.n 800796c <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80075a6: 68fb ldr r3, [r7, #12]
80075a8: 681b ldr r3, [r3, #0]
80075aa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80075ae: b29b uxth r3, r3
80075b0: 461a mov r2, r3
80075b2: 68bb ldr r3, [r7, #8]
80075b4: 781b ldrb r3, [r3, #0]
80075b6: 00db lsls r3, r3, #3
80075b8: 4413 add r3, r2
80075ba: 3306 adds r3, #6
80075bc: 005b lsls r3, r3, #1
80075be: 68fa ldr r2, [r7, #12]
80075c0: 6812 ldr r2, [r2, #0]
80075c2: 4413 add r3, r2
80075c4: f503 6380 add.w r3, r3, #1024 @ 0x400
80075c8: 881b ldrh r3, [r3, #0]
80075ca: f3c3 0309 ubfx r3, r3, #0, #10
80075ce: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
80075d2: 68bb ldr r3, [r7, #8]
80075d4: 699a ldr r2, [r3, #24]
80075d6: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80075da: 429a cmp r2, r3
80075dc: d307 bcc.n 80075ee <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
80075de: 68bb ldr r3, [r7, #8]
80075e0: 699a ldr r2, [r3, #24]
80075e2: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80075e6: 1ad2 subs r2, r2, r3
80075e8: 68bb ldr r3, [r7, #8]
80075ea: 619a str r2, [r3, #24]
80075ec: e002 b.n 80075f4 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
80075ee: 68bb ldr r3, [r7, #8]
80075f0: 2200 movs r2, #0
80075f2: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
80075f4: 68bb ldr r3, [r7, #8]
80075f6: 699b ldr r3, [r3, #24]
80075f8: 2b00 cmp r3, #0
80075fa: f040 80c0 bne.w 800777e <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80075fe: 68bb ldr r3, [r7, #8]
8007600: 785b ldrb r3, [r3, #1]
8007602: 2b00 cmp r3, #0
8007604: d126 bne.n 8007654 <HAL_PCD_EP_DB_Transmit+0x482>
8007606: 68fb ldr r3, [r7, #12]
8007608: 681b ldr r3, [r3, #0]
800760a: 67fb str r3, [r7, #124] @ 0x7c
800760c: 68fb ldr r3, [r7, #12]
800760e: 681b ldr r3, [r3, #0]
8007610: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007614: b29b uxth r3, r3
8007616: 461a mov r2, r3
8007618: 6ffb ldr r3, [r7, #124] @ 0x7c
800761a: 4413 add r3, r2
800761c: 67fb str r3, [r7, #124] @ 0x7c
800761e: 68bb ldr r3, [r7, #8]
8007620: 781b ldrb r3, [r3, #0]
8007622: 011a lsls r2, r3, #4
8007624: 6ffb ldr r3, [r7, #124] @ 0x7c
8007626: 4413 add r3, r2
8007628: f203 4304 addw r3, r3, #1028 @ 0x404
800762c: 67bb str r3, [r7, #120] @ 0x78
800762e: 6fbb ldr r3, [r7, #120] @ 0x78
8007630: 881b ldrh r3, [r3, #0]
8007632: b29b uxth r3, r3
8007634: f3c3 0309 ubfx r3, r3, #0, #10
8007638: b29a uxth r2, r3
800763a: 6fbb ldr r3, [r7, #120] @ 0x78
800763c: 801a strh r2, [r3, #0]
800763e: 6fbb ldr r3, [r7, #120] @ 0x78
8007640: 881b ldrh r3, [r3, #0]
8007642: b29b uxth r3, r3
8007644: ea6f 4343 mvn.w r3, r3, lsl #17
8007648: ea6f 4353 mvn.w r3, r3, lsr #17
800764c: b29a uxth r2, r3
800764e: 6fbb ldr r3, [r7, #120] @ 0x78
8007650: 801a strh r2, [r3, #0]
8007652: e01a b.n 800768a <HAL_PCD_EP_DB_Transmit+0x4b8>
8007654: 68bb ldr r3, [r7, #8]
8007656: 785b ldrb r3, [r3, #1]
8007658: 2b01 cmp r3, #1
800765a: d116 bne.n 800768a <HAL_PCD_EP_DB_Transmit+0x4b8>
800765c: 68fb ldr r3, [r7, #12]
800765e: 681b ldr r3, [r3, #0]
8007660: 667b str r3, [r7, #100] @ 0x64
8007662: 68fb ldr r3, [r7, #12]
8007664: 681b ldr r3, [r3, #0]
8007666: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800766a: b29b uxth r3, r3
800766c: 461a mov r2, r3
800766e: 6e7b ldr r3, [r7, #100] @ 0x64
8007670: 4413 add r3, r2
8007672: 667b str r3, [r7, #100] @ 0x64
8007674: 68bb ldr r3, [r7, #8]
8007676: 781b ldrb r3, [r3, #0]
8007678: 011a lsls r2, r3, #4
800767a: 6e7b ldr r3, [r7, #100] @ 0x64
800767c: 4413 add r3, r2
800767e: f203 4304 addw r3, r3, #1028 @ 0x404
8007682: 663b str r3, [r7, #96] @ 0x60
8007684: 6e3b ldr r3, [r7, #96] @ 0x60
8007686: 2200 movs r2, #0
8007688: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800768a: 68fb ldr r3, [r7, #12]
800768c: 681b ldr r3, [r3, #0]
800768e: 677b str r3, [r7, #116] @ 0x74
8007690: 68bb ldr r3, [r7, #8]
8007692: 785b ldrb r3, [r3, #1]
8007694: 2b00 cmp r3, #0
8007696: d12b bne.n 80076f0 <HAL_PCD_EP_DB_Transmit+0x51e>
8007698: 68fb ldr r3, [r7, #12]
800769a: 681b ldr r3, [r3, #0]
800769c: 66fb str r3, [r7, #108] @ 0x6c
800769e: 68fb ldr r3, [r7, #12]
80076a0: 681b ldr r3, [r3, #0]
80076a2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80076a6: b29b uxth r3, r3
80076a8: 461a mov r2, r3
80076aa: 6efb ldr r3, [r7, #108] @ 0x6c
80076ac: 4413 add r3, r2
80076ae: 66fb str r3, [r7, #108] @ 0x6c
80076b0: 68bb ldr r3, [r7, #8]
80076b2: 781b ldrb r3, [r3, #0]
80076b4: 011a lsls r2, r3, #4
80076b6: 6efb ldr r3, [r7, #108] @ 0x6c
80076b8: 4413 add r3, r2
80076ba: f203 430c addw r3, r3, #1036 @ 0x40c
80076be: f8c7 3080 str.w r3, [r7, #128] @ 0x80
80076c2: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80076c6: 881b ldrh r3, [r3, #0]
80076c8: b29b uxth r3, r3
80076ca: f3c3 0309 ubfx r3, r3, #0, #10
80076ce: b29a uxth r2, r3
80076d0: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80076d4: 801a strh r2, [r3, #0]
80076d6: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80076da: 881b ldrh r3, [r3, #0]
80076dc: b29b uxth r3, r3
80076de: ea6f 4343 mvn.w r3, r3, lsl #17
80076e2: ea6f 4353 mvn.w r3, r3, lsr #17
80076e6: b29a uxth r2, r3
80076e8: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
80076ec: 801a strh r2, [r3, #0]
80076ee: e017 b.n 8007720 <HAL_PCD_EP_DB_Transmit+0x54e>
80076f0: 68bb ldr r3, [r7, #8]
80076f2: 785b ldrb r3, [r3, #1]
80076f4: 2b01 cmp r3, #1
80076f6: d113 bne.n 8007720 <HAL_PCD_EP_DB_Transmit+0x54e>
80076f8: 68fb ldr r3, [r7, #12]
80076fa: 681b ldr r3, [r3, #0]
80076fc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007700: b29b uxth r3, r3
8007702: 461a mov r2, r3
8007704: 6f7b ldr r3, [r7, #116] @ 0x74
8007706: 4413 add r3, r2
8007708: 677b str r3, [r7, #116] @ 0x74
800770a: 68bb ldr r3, [r7, #8]
800770c: 781b ldrb r3, [r3, #0]
800770e: 011a lsls r2, r3, #4
8007710: 6f7b ldr r3, [r7, #116] @ 0x74
8007712: 4413 add r3, r2
8007714: f203 430c addw r3, r3, #1036 @ 0x40c
8007718: 673b str r3, [r7, #112] @ 0x70
800771a: 6f3b ldr r3, [r7, #112] @ 0x70
800771c: 2200 movs r2, #0
800771e: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007720: 68bb ldr r3, [r7, #8]
8007722: 781b ldrb r3, [r3, #0]
8007724: 4619 mov r1, r3
8007726: 68f8 ldr r0, [r7, #12]
8007728: f006 f8af bl 800d88a <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
800772c: 88fb ldrh r3, [r7, #6]
800772e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007732: 2b00 cmp r3, #0
8007734: f040 811a bne.w 800796c <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007738: 68fb ldr r3, [r7, #12]
800773a: 681b ldr r3, [r3, #0]
800773c: 461a mov r2, r3
800773e: 68bb ldr r3, [r7, #8]
8007740: 781b ldrb r3, [r3, #0]
8007742: 009b lsls r3, r3, #2
8007744: 4413 add r3, r2
8007746: 881b ldrh r3, [r3, #0]
8007748: b29b uxth r3, r3
800774a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800774e: f023 0370 bic.w r3, r3, #112 @ 0x70
8007752: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8007756: 68fb ldr r3, [r7, #12]
8007758: 681b ldr r3, [r3, #0]
800775a: 461a mov r2, r3
800775c: 68bb ldr r3, [r7, #8]
800775e: 781b ldrb r3, [r3, #0]
8007760: 009b lsls r3, r3, #2
8007762: 441a add r2, r3
8007764: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
8007768: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800776c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007770: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007774: f043 0380 orr.w r3, r3, #128 @ 0x80
8007778: b29b uxth r3, r3
800777a: 8013 strh r3, [r2, #0]
800777c: e0f6 b.n 800796c <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
800777e: 88fb ldrh r3, [r7, #6]
8007780: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007784: 2b00 cmp r3, #0
8007786: d121 bne.n 80077cc <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007788: 68fb ldr r3, [r7, #12]
800778a: 681b ldr r3, [r3, #0]
800778c: 461a mov r2, r3
800778e: 68bb ldr r3, [r7, #8]
8007790: 781b ldrb r3, [r3, #0]
8007792: 009b lsls r3, r3, #2
8007794: 4413 add r3, r2
8007796: 881b ldrh r3, [r3, #0]
8007798: b29b uxth r3, r3
800779a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800779e: f023 0370 bic.w r3, r3, #112 @ 0x70
80077a2: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
80077a6: 68fb ldr r3, [r7, #12]
80077a8: 681b ldr r3, [r3, #0]
80077aa: 461a mov r2, r3
80077ac: 68bb ldr r3, [r7, #8]
80077ae: 781b ldrb r3, [r3, #0]
80077b0: 009b lsls r3, r3, #2
80077b2: 441a add r2, r3
80077b4: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
80077b8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80077bc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80077c0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80077c4: f043 0380 orr.w r3, r3, #128 @ 0x80
80077c8: b29b uxth r3, r3
80077ca: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
80077cc: 68bb ldr r3, [r7, #8]
80077ce: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
80077d2: 2b01 cmp r3, #1
80077d4: f040 80ca bne.w 800796c <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
80077d8: 68bb ldr r3, [r7, #8]
80077da: 695a ldr r2, [r3, #20]
80077dc: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80077e0: 441a add r2, r3
80077e2: 68bb ldr r3, [r7, #8]
80077e4: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
80077e6: 68bb ldr r3, [r7, #8]
80077e8: 69da ldr r2, [r3, #28]
80077ea: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80077ee: 441a add r2, r3
80077f0: 68bb ldr r3, [r7, #8]
80077f2: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
80077f4: 68bb ldr r3, [r7, #8]
80077f6: 6a1a ldr r2, [r3, #32]
80077f8: 68bb ldr r3, [r7, #8]
80077fa: 691b ldr r3, [r3, #16]
80077fc: 429a cmp r2, r3
80077fe: d30b bcc.n 8007818 <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
8007800: 68bb ldr r3, [r7, #8]
8007802: 691b ldr r3, [r3, #16]
8007804: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007808: 68bb ldr r3, [r7, #8]
800780a: 6a1a ldr r2, [r3, #32]
800780c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007810: 1ad2 subs r2, r2, r3
8007812: 68bb ldr r3, [r7, #8]
8007814: 621a str r2, [r3, #32]
8007816: e017 b.n 8007848 <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
8007818: 68bb ldr r3, [r7, #8]
800781a: 6a1b ldr r3, [r3, #32]
800781c: 2b00 cmp r3, #0
800781e: d108 bne.n 8007832 <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
8007820: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007824: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007828: 68bb ldr r3, [r7, #8]
800782a: 2200 movs r2, #0
800782c: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007830: e00a b.n 8007848 <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
8007832: 68bb ldr r3, [r7, #8]
8007834: 6a1b ldr r3, [r3, #32]
8007836: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
800783a: 68bb ldr r3, [r7, #8]
800783c: 2200 movs r2, #0
800783e: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8007840: 68bb ldr r3, [r7, #8]
8007842: 2200 movs r2, #0
8007844: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007848: 68fb ldr r3, [r7, #12]
800784a: 681b ldr r3, [r3, #0]
800784c: 657b str r3, [r7, #84] @ 0x54
800784e: 68bb ldr r3, [r7, #8]
8007850: 785b ldrb r3, [r3, #1]
8007852: 2b00 cmp r3, #0
8007854: d165 bne.n 8007922 <HAL_PCD_EP_DB_Transmit+0x750>
8007856: 68fb ldr r3, [r7, #12]
8007858: 681b ldr r3, [r3, #0]
800785a: 65fb str r3, [r7, #92] @ 0x5c
800785c: 68fb ldr r3, [r7, #12]
800785e: 681b ldr r3, [r3, #0]
8007860: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007864: b29b uxth r3, r3
8007866: 461a mov r2, r3
8007868: 6dfb ldr r3, [r7, #92] @ 0x5c
800786a: 4413 add r3, r2
800786c: 65fb str r3, [r7, #92] @ 0x5c
800786e: 68bb ldr r3, [r7, #8]
8007870: 781b ldrb r3, [r3, #0]
8007872: 011a lsls r2, r3, #4
8007874: 6dfb ldr r3, [r7, #92] @ 0x5c
8007876: 4413 add r3, r2
8007878: f203 430c addw r3, r3, #1036 @ 0x40c
800787c: 65bb str r3, [r7, #88] @ 0x58
800787e: 6dbb ldr r3, [r7, #88] @ 0x58
8007880: 881b ldrh r3, [r3, #0]
8007882: b29b uxth r3, r3
8007884: f3c3 0309 ubfx r3, r3, #0, #10
8007888: b29a uxth r2, r3
800788a: 6dbb ldr r3, [r7, #88] @ 0x58
800788c: 801a strh r2, [r3, #0]
800788e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007892: 2b3e cmp r3, #62 @ 0x3e
8007894: d91d bls.n 80078d2 <HAL_PCD_EP_DB_Transmit+0x700>
8007896: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800789a: 095b lsrs r3, r3, #5
800789c: 66bb str r3, [r7, #104] @ 0x68
800789e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80078a2: f003 031f and.w r3, r3, #31
80078a6: 2b00 cmp r3, #0
80078a8: d102 bne.n 80078b0 <HAL_PCD_EP_DB_Transmit+0x6de>
80078aa: 6ebb ldr r3, [r7, #104] @ 0x68
80078ac: 3b01 subs r3, #1
80078ae: 66bb str r3, [r7, #104] @ 0x68
80078b0: 6dbb ldr r3, [r7, #88] @ 0x58
80078b2: 881b ldrh r3, [r3, #0]
80078b4: b29a uxth r2, r3
80078b6: 6ebb ldr r3, [r7, #104] @ 0x68
80078b8: b29b uxth r3, r3
80078ba: 029b lsls r3, r3, #10
80078bc: b29b uxth r3, r3
80078be: 4313 orrs r3, r2
80078c0: b29b uxth r3, r3
80078c2: ea6f 4343 mvn.w r3, r3, lsl #17
80078c6: ea6f 4353 mvn.w r3, r3, lsr #17
80078ca: b29a uxth r2, r3
80078cc: 6dbb ldr r3, [r7, #88] @ 0x58
80078ce: 801a strh r2, [r3, #0]
80078d0: e041 b.n 8007956 <HAL_PCD_EP_DB_Transmit+0x784>
80078d2: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80078d6: 2b00 cmp r3, #0
80078d8: d10a bne.n 80078f0 <HAL_PCD_EP_DB_Transmit+0x71e>
80078da: 6dbb ldr r3, [r7, #88] @ 0x58
80078dc: 881b ldrh r3, [r3, #0]
80078de: b29b uxth r3, r3
80078e0: ea6f 4343 mvn.w r3, r3, lsl #17
80078e4: ea6f 4353 mvn.w r3, r3, lsr #17
80078e8: b29a uxth r2, r3
80078ea: 6dbb ldr r3, [r7, #88] @ 0x58
80078ec: 801a strh r2, [r3, #0]
80078ee: e032 b.n 8007956 <HAL_PCD_EP_DB_Transmit+0x784>
80078f0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80078f4: 085b lsrs r3, r3, #1
80078f6: 66bb str r3, [r7, #104] @ 0x68
80078f8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80078fc: f003 0301 and.w r3, r3, #1
8007900: 2b00 cmp r3, #0
8007902: d002 beq.n 800790a <HAL_PCD_EP_DB_Transmit+0x738>
8007904: 6ebb ldr r3, [r7, #104] @ 0x68
8007906: 3301 adds r3, #1
8007908: 66bb str r3, [r7, #104] @ 0x68
800790a: 6dbb ldr r3, [r7, #88] @ 0x58
800790c: 881b ldrh r3, [r3, #0]
800790e: b29a uxth r2, r3
8007910: 6ebb ldr r3, [r7, #104] @ 0x68
8007912: b29b uxth r3, r3
8007914: 029b lsls r3, r3, #10
8007916: b29b uxth r3, r3
8007918: 4313 orrs r3, r2
800791a: b29a uxth r2, r3
800791c: 6dbb ldr r3, [r7, #88] @ 0x58
800791e: 801a strh r2, [r3, #0]
8007920: e019 b.n 8007956 <HAL_PCD_EP_DB_Transmit+0x784>
8007922: 68bb ldr r3, [r7, #8]
8007924: 785b ldrb r3, [r3, #1]
8007926: 2b01 cmp r3, #1
8007928: d115 bne.n 8007956 <HAL_PCD_EP_DB_Transmit+0x784>
800792a: 68fb ldr r3, [r7, #12]
800792c: 681b ldr r3, [r3, #0]
800792e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007932: b29b uxth r3, r3
8007934: 461a mov r2, r3
8007936: 6d7b ldr r3, [r7, #84] @ 0x54
8007938: 4413 add r3, r2
800793a: 657b str r3, [r7, #84] @ 0x54
800793c: 68bb ldr r3, [r7, #8]
800793e: 781b ldrb r3, [r3, #0]
8007940: 011a lsls r2, r3, #4
8007942: 6d7b ldr r3, [r7, #84] @ 0x54
8007944: 4413 add r3, r2
8007946: f203 430c addw r3, r3, #1036 @ 0x40c
800794a: 653b str r3, [r7, #80] @ 0x50
800794c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007950: b29a uxth r2, r3
8007952: 6d3b ldr r3, [r7, #80] @ 0x50
8007954: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8007956: 68fb ldr r3, [r7, #12]
8007958: 6818 ldr r0, [r3, #0]
800795a: 68bb ldr r3, [r7, #8]
800795c: 6959 ldr r1, [r3, #20]
800795e: 68bb ldr r3, [r7, #8]
8007960: 895a ldrh r2, [r3, #10]
8007962: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007966: b29b uxth r3, r3
8007968: f004 f8cb bl 800bb02 <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
800796c: 68fb ldr r3, [r7, #12]
800796e: 681b ldr r3, [r3, #0]
8007970: 461a mov r2, r3
8007972: 68bb ldr r3, [r7, #8]
8007974: 781b ldrb r3, [r3, #0]
8007976: 009b lsls r3, r3, #2
8007978: 4413 add r3, r2
800797a: 881b ldrh r3, [r3, #0]
800797c: b29b uxth r3, r3
800797e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007982: f023 0340 bic.w r3, r3, #64 @ 0x40
8007986: 82bb strh r3, [r7, #20]
8007988: 8abb ldrh r3, [r7, #20]
800798a: f083 0310 eor.w r3, r3, #16
800798e: 82bb strh r3, [r7, #20]
8007990: 8abb ldrh r3, [r7, #20]
8007992: f083 0320 eor.w r3, r3, #32
8007996: 82bb strh r3, [r7, #20]
8007998: 68fb ldr r3, [r7, #12]
800799a: 681b ldr r3, [r3, #0]
800799c: 461a mov r2, r3
800799e: 68bb ldr r3, [r7, #8]
80079a0: 781b ldrb r3, [r3, #0]
80079a2: 009b lsls r3, r3, #2
80079a4: 441a add r2, r3
80079a6: 8abb ldrh r3, [r7, #20]
80079a8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80079ac: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80079b0: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80079b4: f043 0380 orr.w r3, r3, #128 @ 0x80
80079b8: b29b uxth r3, r3
80079ba: 8013 strh r3, [r2, #0]
return HAL_OK;
80079bc: 2300 movs r3, #0
}
80079be: 4618 mov r0, r3
80079c0: 3790 adds r7, #144 @ 0x90
80079c2: 46bd mov sp, r7
80079c4: bd80 pop {r7, pc}
080079c6 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
80079c6: b480 push {r7}
80079c8: b087 sub sp, #28
80079ca: af00 add r7, sp, #0
80079cc: 60f8 str r0, [r7, #12]
80079ce: 607b str r3, [r7, #4]
80079d0: 460b mov r3, r1
80079d2: 817b strh r3, [r7, #10]
80079d4: 4613 mov r3, r2
80079d6: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
80079d8: 897b ldrh r3, [r7, #10]
80079da: f003 0380 and.w r3, r3, #128 @ 0x80
80079de: b29b uxth r3, r3
80079e0: 2b00 cmp r3, #0
80079e2: d00b beq.n 80079fc <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80079e4: 897b ldrh r3, [r7, #10]
80079e6: f003 0207 and.w r2, r3, #7
80079ea: 4613 mov r3, r2
80079ec: 009b lsls r3, r3, #2
80079ee: 4413 add r3, r2
80079f0: 00db lsls r3, r3, #3
80079f2: 3310 adds r3, #16
80079f4: 68fa ldr r2, [r7, #12]
80079f6: 4413 add r3, r2
80079f8: 617b str r3, [r7, #20]
80079fa: e009 b.n 8007a10 <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
80079fc: 897a ldrh r2, [r7, #10]
80079fe: 4613 mov r3, r2
8007a00: 009b lsls r3, r3, #2
8007a02: 4413 add r3, r2
8007a04: 00db lsls r3, r3, #3
8007a06: f503 73a8 add.w r3, r3, #336 @ 0x150
8007a0a: 68fa ldr r2, [r7, #12]
8007a0c: 4413 add r3, r2
8007a0e: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8007a10: 893b ldrh r3, [r7, #8]
8007a12: 2b00 cmp r3, #0
8007a14: d107 bne.n 8007a26 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8007a16: 697b ldr r3, [r7, #20]
8007a18: 2200 movs r2, #0
8007a1a: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8007a1c: 687b ldr r3, [r7, #4]
8007a1e: b29a uxth r2, r3
8007a20: 697b ldr r3, [r7, #20]
8007a22: 80da strh r2, [r3, #6]
8007a24: e00b b.n 8007a3e <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8007a26: 697b ldr r3, [r7, #20]
8007a28: 2201 movs r2, #1
8007a2a: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8007a2c: 687b ldr r3, [r7, #4]
8007a2e: b29a uxth r2, r3
8007a30: 697b ldr r3, [r7, #20]
8007a32: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8007a34: 687b ldr r3, [r7, #4]
8007a36: 0c1b lsrs r3, r3, #16
8007a38: b29a uxth r2, r3
8007a3a: 697b ldr r3, [r7, #20]
8007a3c: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8007a3e: 2300 movs r3, #0
}
8007a40: 4618 mov r0, r3
8007a42: 371c adds r7, #28
8007a44: 46bd mov sp, r7
8007a46: bc80 pop {r7}
8007a48: 4770 bx lr
...
08007a4c <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8007a4c: b580 push {r7, lr}
8007a4e: b086 sub sp, #24
8007a50: af00 add r7, sp, #0
8007a52: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
8007a54: 687b ldr r3, [r7, #4]
8007a56: 2b00 cmp r3, #0
8007a58: d101 bne.n 8007a5e <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8007a5a: 2301 movs r3, #1
8007a5c: e272 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8007a5e: 687b ldr r3, [r7, #4]
8007a60: 681b ldr r3, [r3, #0]
8007a62: f003 0301 and.w r3, r3, #1
8007a66: 2b00 cmp r3, #0
8007a68: f000 8087 beq.w 8007b7a <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8007a6c: 4b92 ldr r3, [pc, #584] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007a6e: 685b ldr r3, [r3, #4]
8007a70: f003 030c and.w r3, r3, #12
8007a74: 2b04 cmp r3, #4
8007a76: d00c beq.n 8007a92 <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
8007a78: 4b8f ldr r3, [pc, #572] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007a7a: 685b ldr r3, [r3, #4]
8007a7c: f003 030c and.w r3, r3, #12
8007a80: 2b08 cmp r3, #8
8007a82: d112 bne.n 8007aaa <HAL_RCC_OscConfig+0x5e>
8007a84: 4b8c ldr r3, [pc, #560] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007a86: 685b ldr r3, [r3, #4]
8007a88: f403 3380 and.w r3, r3, #65536 @ 0x10000
8007a8c: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8007a90: d10b bne.n 8007aaa <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8007a92: 4b89 ldr r3, [pc, #548] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007a94: 681b ldr r3, [r3, #0]
8007a96: f403 3300 and.w r3, r3, #131072 @ 0x20000
8007a9a: 2b00 cmp r3, #0
8007a9c: d06c beq.n 8007b78 <HAL_RCC_OscConfig+0x12c>
8007a9e: 687b ldr r3, [r7, #4]
8007aa0: 685b ldr r3, [r3, #4]
8007aa2: 2b00 cmp r3, #0
8007aa4: d168 bne.n 8007b78 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
8007aa6: 2301 movs r3, #1
8007aa8: e24c b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8007aaa: 687b ldr r3, [r7, #4]
8007aac: 685b ldr r3, [r3, #4]
8007aae: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8007ab2: d106 bne.n 8007ac2 <HAL_RCC_OscConfig+0x76>
8007ab4: 4b80 ldr r3, [pc, #512] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007ab6: 681b ldr r3, [r3, #0]
8007ab8: 4a7f ldr r2, [pc, #508] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007aba: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8007abe: 6013 str r3, [r2, #0]
8007ac0: e02e b.n 8007b20 <HAL_RCC_OscConfig+0xd4>
8007ac2: 687b ldr r3, [r7, #4]
8007ac4: 685b ldr r3, [r3, #4]
8007ac6: 2b00 cmp r3, #0
8007ac8: d10c bne.n 8007ae4 <HAL_RCC_OscConfig+0x98>
8007aca: 4b7b ldr r3, [pc, #492] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007acc: 681b ldr r3, [r3, #0]
8007ace: 4a7a ldr r2, [pc, #488] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007ad0: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8007ad4: 6013 str r3, [r2, #0]
8007ad6: 4b78 ldr r3, [pc, #480] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007ad8: 681b ldr r3, [r3, #0]
8007ada: 4a77 ldr r2, [pc, #476] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007adc: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8007ae0: 6013 str r3, [r2, #0]
8007ae2: e01d b.n 8007b20 <HAL_RCC_OscConfig+0xd4>
8007ae4: 687b ldr r3, [r7, #4]
8007ae6: 685b ldr r3, [r3, #4]
8007ae8: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
8007aec: d10c bne.n 8007b08 <HAL_RCC_OscConfig+0xbc>
8007aee: 4b72 ldr r3, [pc, #456] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007af0: 681b ldr r3, [r3, #0]
8007af2: 4a71 ldr r2, [pc, #452] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007af4: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8007af8: 6013 str r3, [r2, #0]
8007afa: 4b6f ldr r3, [pc, #444] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007afc: 681b ldr r3, [r3, #0]
8007afe: 4a6e ldr r2, [pc, #440] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007b00: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8007b04: 6013 str r3, [r2, #0]
8007b06: e00b b.n 8007b20 <HAL_RCC_OscConfig+0xd4>
8007b08: 4b6b ldr r3, [pc, #428] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007b0a: 681b ldr r3, [r3, #0]
8007b0c: 4a6a ldr r2, [pc, #424] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007b0e: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8007b12: 6013 str r3, [r2, #0]
8007b14: 4b68 ldr r3, [pc, #416] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007b16: 681b ldr r3, [r3, #0]
8007b18: 4a67 ldr r2, [pc, #412] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007b1a: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8007b1e: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8007b20: 687b ldr r3, [r7, #4]
8007b22: 685b ldr r3, [r3, #4]
8007b24: 2b00 cmp r3, #0
8007b26: d013 beq.n 8007b50 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007b28: f7fc ffa4 bl 8004a74 <HAL_GetTick>
8007b2c: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8007b2e: e008 b.n 8007b42 <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8007b30: f7fc ffa0 bl 8004a74 <HAL_GetTick>
8007b34: 4602 mov r2, r0
8007b36: 693b ldr r3, [r7, #16]
8007b38: 1ad3 subs r3, r2, r3
8007b3a: 2b64 cmp r3, #100 @ 0x64
8007b3c: d901 bls.n 8007b42 <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
8007b3e: 2303 movs r3, #3
8007b40: e200 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8007b42: 4b5d ldr r3, [pc, #372] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007b44: 681b ldr r3, [r3, #0]
8007b46: f403 3300 and.w r3, r3, #131072 @ 0x20000
8007b4a: 2b00 cmp r3, #0
8007b4c: d0f0 beq.n 8007b30 <HAL_RCC_OscConfig+0xe4>
8007b4e: e014 b.n 8007b7a <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007b50: f7fc ff90 bl 8004a74 <HAL_GetTick>
8007b54: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8007b56: e008 b.n 8007b6a <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8007b58: f7fc ff8c bl 8004a74 <HAL_GetTick>
8007b5c: 4602 mov r2, r0
8007b5e: 693b ldr r3, [r7, #16]
8007b60: 1ad3 subs r3, r2, r3
8007b62: 2b64 cmp r3, #100 @ 0x64
8007b64: d901 bls.n 8007b6a <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
8007b66: 2303 movs r3, #3
8007b68: e1ec b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8007b6a: 4b53 ldr r3, [pc, #332] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007b6c: 681b ldr r3, [r3, #0]
8007b6e: f403 3300 and.w r3, r3, #131072 @ 0x20000
8007b72: 2b00 cmp r3, #0
8007b74: d1f0 bne.n 8007b58 <HAL_RCC_OscConfig+0x10c>
8007b76: e000 b.n 8007b7a <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8007b78: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8007b7a: 687b ldr r3, [r7, #4]
8007b7c: 681b ldr r3, [r3, #0]
8007b7e: f003 0302 and.w r3, r3, #2
8007b82: 2b00 cmp r3, #0
8007b84: d063 beq.n 8007c4e <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
8007b86: 4b4c ldr r3, [pc, #304] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007b88: 685b ldr r3, [r3, #4]
8007b8a: f003 030c and.w r3, r3, #12
8007b8e: 2b00 cmp r3, #0
8007b90: d00b beq.n 8007baa <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
8007b92: 4b49 ldr r3, [pc, #292] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007b94: 685b ldr r3, [r3, #4]
8007b96: f003 030c and.w r3, r3, #12
8007b9a: 2b08 cmp r3, #8
8007b9c: d11c bne.n 8007bd8 <HAL_RCC_OscConfig+0x18c>
8007b9e: 4b46 ldr r3, [pc, #280] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007ba0: 685b ldr r3, [r3, #4]
8007ba2: f403 3380 and.w r3, r3, #65536 @ 0x10000
8007ba6: 2b00 cmp r3, #0
8007ba8: d116 bne.n 8007bd8 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8007baa: 4b43 ldr r3, [pc, #268] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007bac: 681b ldr r3, [r3, #0]
8007bae: f003 0302 and.w r3, r3, #2
8007bb2: 2b00 cmp r3, #0
8007bb4: d005 beq.n 8007bc2 <HAL_RCC_OscConfig+0x176>
8007bb6: 687b ldr r3, [r7, #4]
8007bb8: 691b ldr r3, [r3, #16]
8007bba: 2b01 cmp r3, #1
8007bbc: d001 beq.n 8007bc2 <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
8007bbe: 2301 movs r3, #1
8007bc0: e1c0 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8007bc2: 4b3d ldr r3, [pc, #244] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007bc4: 681b ldr r3, [r3, #0]
8007bc6: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8007bca: 687b ldr r3, [r7, #4]
8007bcc: 695b ldr r3, [r3, #20]
8007bce: 00db lsls r3, r3, #3
8007bd0: 4939 ldr r1, [pc, #228] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007bd2: 4313 orrs r3, r2
8007bd4: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8007bd6: e03a b.n 8007c4e <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8007bd8: 687b ldr r3, [r7, #4]
8007bda: 691b ldr r3, [r3, #16]
8007bdc: 2b00 cmp r3, #0
8007bde: d020 beq.n 8007c22 <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8007be0: 4b36 ldr r3, [pc, #216] @ (8007cbc <HAL_RCC_OscConfig+0x270>)
8007be2: 2201 movs r2, #1
8007be4: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007be6: f7fc ff45 bl 8004a74 <HAL_GetTick>
8007bea: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8007bec: e008 b.n 8007c00 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8007bee: f7fc ff41 bl 8004a74 <HAL_GetTick>
8007bf2: 4602 mov r2, r0
8007bf4: 693b ldr r3, [r7, #16]
8007bf6: 1ad3 subs r3, r2, r3
8007bf8: 2b02 cmp r3, #2
8007bfa: d901 bls.n 8007c00 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
8007bfc: 2303 movs r3, #3
8007bfe: e1a1 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8007c00: 4b2d ldr r3, [pc, #180] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007c02: 681b ldr r3, [r3, #0]
8007c04: f003 0302 and.w r3, r3, #2
8007c08: 2b00 cmp r3, #0
8007c0a: d0f0 beq.n 8007bee <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8007c0c: 4b2a ldr r3, [pc, #168] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007c0e: 681b ldr r3, [r3, #0]
8007c10: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8007c14: 687b ldr r3, [r7, #4]
8007c16: 695b ldr r3, [r3, #20]
8007c18: 00db lsls r3, r3, #3
8007c1a: 4927 ldr r1, [pc, #156] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007c1c: 4313 orrs r3, r2
8007c1e: 600b str r3, [r1, #0]
8007c20: e015 b.n 8007c4e <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8007c22: 4b26 ldr r3, [pc, #152] @ (8007cbc <HAL_RCC_OscConfig+0x270>)
8007c24: 2200 movs r2, #0
8007c26: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007c28: f7fc ff24 bl 8004a74 <HAL_GetTick>
8007c2c: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8007c2e: e008 b.n 8007c42 <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8007c30: f7fc ff20 bl 8004a74 <HAL_GetTick>
8007c34: 4602 mov r2, r0
8007c36: 693b ldr r3, [r7, #16]
8007c38: 1ad3 subs r3, r2, r3
8007c3a: 2b02 cmp r3, #2
8007c3c: d901 bls.n 8007c42 <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
8007c3e: 2303 movs r3, #3
8007c40: e180 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8007c42: 4b1d ldr r3, [pc, #116] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007c44: 681b ldr r3, [r3, #0]
8007c46: f003 0302 and.w r3, r3, #2
8007c4a: 2b00 cmp r3, #0
8007c4c: d1f0 bne.n 8007c30 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8007c4e: 687b ldr r3, [r7, #4]
8007c50: 681b ldr r3, [r3, #0]
8007c52: f003 0308 and.w r3, r3, #8
8007c56: 2b00 cmp r3, #0
8007c58: d03a beq.n 8007cd0 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8007c5a: 687b ldr r3, [r7, #4]
8007c5c: 699b ldr r3, [r3, #24]
8007c5e: 2b00 cmp r3, #0
8007c60: d019 beq.n 8007c96 <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
8007c62: 4b17 ldr r3, [pc, #92] @ (8007cc0 <HAL_RCC_OscConfig+0x274>)
8007c64: 2201 movs r2, #1
8007c66: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007c68: f7fc ff04 bl 8004a74 <HAL_GetTick>
8007c6c: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8007c6e: e008 b.n 8007c82 <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8007c70: f7fc ff00 bl 8004a74 <HAL_GetTick>
8007c74: 4602 mov r2, r0
8007c76: 693b ldr r3, [r7, #16]
8007c78: 1ad3 subs r3, r2, r3
8007c7a: 2b02 cmp r3, #2
8007c7c: d901 bls.n 8007c82 <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
8007c7e: 2303 movs r3, #3
8007c80: e160 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8007c82: 4b0d ldr r3, [pc, #52] @ (8007cb8 <HAL_RCC_OscConfig+0x26c>)
8007c84: 6a5b ldr r3, [r3, #36] @ 0x24
8007c86: f003 0302 and.w r3, r3, #2
8007c8a: 2b00 cmp r3, #0
8007c8c: d0f0 beq.n 8007c70 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
8007c8e: 2001 movs r0, #1
8007c90: f000 fad0 bl 8008234 <RCC_Delay>
8007c94: e01c b.n 8007cd0 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
8007c96: 4b0a ldr r3, [pc, #40] @ (8007cc0 <HAL_RCC_OscConfig+0x274>)
8007c98: 2200 movs r2, #0
8007c9a: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007c9c: f7fc feea bl 8004a74 <HAL_GetTick>
8007ca0: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8007ca2: e00f b.n 8007cc4 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8007ca4: f7fc fee6 bl 8004a74 <HAL_GetTick>
8007ca8: 4602 mov r2, r0
8007caa: 693b ldr r3, [r7, #16]
8007cac: 1ad3 subs r3, r2, r3
8007cae: 2b02 cmp r3, #2
8007cb0: d908 bls.n 8007cc4 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
8007cb2: 2303 movs r3, #3
8007cb4: e146 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
8007cb6: bf00 nop
8007cb8: 40021000 .word 0x40021000
8007cbc: 42420000 .word 0x42420000
8007cc0: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8007cc4: 4b92 ldr r3, [pc, #584] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007cc6: 6a5b ldr r3, [r3, #36] @ 0x24
8007cc8: f003 0302 and.w r3, r3, #2
8007ccc: 2b00 cmp r3, #0
8007cce: d1e9 bne.n 8007ca4 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8007cd0: 687b ldr r3, [r7, #4]
8007cd2: 681b ldr r3, [r3, #0]
8007cd4: f003 0304 and.w r3, r3, #4
8007cd8: 2b00 cmp r3, #0
8007cda: f000 80a6 beq.w 8007e2a <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
8007cde: 2300 movs r3, #0
8007ce0: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8007ce2: 4b8b ldr r3, [pc, #556] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007ce4: 69db ldr r3, [r3, #28]
8007ce6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8007cea: 2b00 cmp r3, #0
8007cec: d10d bne.n 8007d0a <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
8007cee: 4b88 ldr r3, [pc, #544] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007cf0: 69db ldr r3, [r3, #28]
8007cf2: 4a87 ldr r2, [pc, #540] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007cf4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8007cf8: 61d3 str r3, [r2, #28]
8007cfa: 4b85 ldr r3, [pc, #532] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007cfc: 69db ldr r3, [r3, #28]
8007cfe: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8007d02: 60bb str r3, [r7, #8]
8007d04: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8007d06: 2301 movs r3, #1
8007d08: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007d0a: 4b82 ldr r3, [pc, #520] @ (8007f14 <HAL_RCC_OscConfig+0x4c8>)
8007d0c: 681b ldr r3, [r3, #0]
8007d0e: f403 7380 and.w r3, r3, #256 @ 0x100
8007d12: 2b00 cmp r3, #0
8007d14: d118 bne.n 8007d48 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8007d16: 4b7f ldr r3, [pc, #508] @ (8007f14 <HAL_RCC_OscConfig+0x4c8>)
8007d18: 681b ldr r3, [r3, #0]
8007d1a: 4a7e ldr r2, [pc, #504] @ (8007f14 <HAL_RCC_OscConfig+0x4c8>)
8007d1c: f443 7380 orr.w r3, r3, #256 @ 0x100
8007d20: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8007d22: f7fc fea7 bl 8004a74 <HAL_GetTick>
8007d26: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007d28: e008 b.n 8007d3c <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8007d2a: f7fc fea3 bl 8004a74 <HAL_GetTick>
8007d2e: 4602 mov r2, r0
8007d30: 693b ldr r3, [r7, #16]
8007d32: 1ad3 subs r3, r2, r3
8007d34: 2b64 cmp r3, #100 @ 0x64
8007d36: d901 bls.n 8007d3c <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8007d38: 2303 movs r3, #3
8007d3a: e103 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007d3c: 4b75 ldr r3, [pc, #468] @ (8007f14 <HAL_RCC_OscConfig+0x4c8>)
8007d3e: 681b ldr r3, [r3, #0]
8007d40: f403 7380 and.w r3, r3, #256 @ 0x100
8007d44: 2b00 cmp r3, #0
8007d46: d0f0 beq.n 8007d2a <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8007d48: 687b ldr r3, [r7, #4]
8007d4a: 68db ldr r3, [r3, #12]
8007d4c: 2b01 cmp r3, #1
8007d4e: d106 bne.n 8007d5e <HAL_RCC_OscConfig+0x312>
8007d50: 4b6f ldr r3, [pc, #444] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d52: 6a1b ldr r3, [r3, #32]
8007d54: 4a6e ldr r2, [pc, #440] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d56: f043 0301 orr.w r3, r3, #1
8007d5a: 6213 str r3, [r2, #32]
8007d5c: e02d b.n 8007dba <HAL_RCC_OscConfig+0x36e>
8007d5e: 687b ldr r3, [r7, #4]
8007d60: 68db ldr r3, [r3, #12]
8007d62: 2b00 cmp r3, #0
8007d64: d10c bne.n 8007d80 <HAL_RCC_OscConfig+0x334>
8007d66: 4b6a ldr r3, [pc, #424] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d68: 6a1b ldr r3, [r3, #32]
8007d6a: 4a69 ldr r2, [pc, #420] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d6c: f023 0301 bic.w r3, r3, #1
8007d70: 6213 str r3, [r2, #32]
8007d72: 4b67 ldr r3, [pc, #412] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d74: 6a1b ldr r3, [r3, #32]
8007d76: 4a66 ldr r2, [pc, #408] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d78: f023 0304 bic.w r3, r3, #4
8007d7c: 6213 str r3, [r2, #32]
8007d7e: e01c b.n 8007dba <HAL_RCC_OscConfig+0x36e>
8007d80: 687b ldr r3, [r7, #4]
8007d82: 68db ldr r3, [r3, #12]
8007d84: 2b05 cmp r3, #5
8007d86: d10c bne.n 8007da2 <HAL_RCC_OscConfig+0x356>
8007d88: 4b61 ldr r3, [pc, #388] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d8a: 6a1b ldr r3, [r3, #32]
8007d8c: 4a60 ldr r2, [pc, #384] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d8e: f043 0304 orr.w r3, r3, #4
8007d92: 6213 str r3, [r2, #32]
8007d94: 4b5e ldr r3, [pc, #376] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d96: 6a1b ldr r3, [r3, #32]
8007d98: 4a5d ldr r2, [pc, #372] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007d9a: f043 0301 orr.w r3, r3, #1
8007d9e: 6213 str r3, [r2, #32]
8007da0: e00b b.n 8007dba <HAL_RCC_OscConfig+0x36e>
8007da2: 4b5b ldr r3, [pc, #364] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007da4: 6a1b ldr r3, [r3, #32]
8007da6: 4a5a ldr r2, [pc, #360] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007da8: f023 0301 bic.w r3, r3, #1
8007dac: 6213 str r3, [r2, #32]
8007dae: 4b58 ldr r3, [pc, #352] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007db0: 6a1b ldr r3, [r3, #32]
8007db2: 4a57 ldr r2, [pc, #348] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007db4: f023 0304 bic.w r3, r3, #4
8007db8: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8007dba: 687b ldr r3, [r7, #4]
8007dbc: 68db ldr r3, [r3, #12]
8007dbe: 2b00 cmp r3, #0
8007dc0: d015 beq.n 8007dee <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007dc2: f7fc fe57 bl 8004a74 <HAL_GetTick>
8007dc6: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8007dc8: e00a b.n 8007de0 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8007dca: f7fc fe53 bl 8004a74 <HAL_GetTick>
8007dce: 4602 mov r2, r0
8007dd0: 693b ldr r3, [r7, #16]
8007dd2: 1ad3 subs r3, r2, r3
8007dd4: f241 3288 movw r2, #5000 @ 0x1388
8007dd8: 4293 cmp r3, r2
8007dda: d901 bls.n 8007de0 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
8007ddc: 2303 movs r3, #3
8007dde: e0b1 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8007de0: 4b4b ldr r3, [pc, #300] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007de2: 6a1b ldr r3, [r3, #32]
8007de4: f003 0302 and.w r3, r3, #2
8007de8: 2b00 cmp r3, #0
8007dea: d0ee beq.n 8007dca <HAL_RCC_OscConfig+0x37e>
8007dec: e014 b.n 8007e18 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007dee: f7fc fe41 bl 8004a74 <HAL_GetTick>
8007df2: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8007df4: e00a b.n 8007e0c <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8007df6: f7fc fe3d bl 8004a74 <HAL_GetTick>
8007dfa: 4602 mov r2, r0
8007dfc: 693b ldr r3, [r7, #16]
8007dfe: 1ad3 subs r3, r2, r3
8007e00: f241 3288 movw r2, #5000 @ 0x1388
8007e04: 4293 cmp r3, r2
8007e06: d901 bls.n 8007e0c <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8007e08: 2303 movs r3, #3
8007e0a: e09b b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8007e0c: 4b40 ldr r3, [pc, #256] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007e0e: 6a1b ldr r3, [r3, #32]
8007e10: f003 0302 and.w r3, r3, #2
8007e14: 2b00 cmp r3, #0
8007e16: d1ee bne.n 8007df6 <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8007e18: 7dfb ldrb r3, [r7, #23]
8007e1a: 2b01 cmp r3, #1
8007e1c: d105 bne.n 8007e2a <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
8007e1e: 4b3c ldr r3, [pc, #240] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007e20: 69db ldr r3, [r3, #28]
8007e22: 4a3b ldr r2, [pc, #236] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007e24: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8007e28: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8007e2a: 687b ldr r3, [r7, #4]
8007e2c: 69db ldr r3, [r3, #28]
8007e2e: 2b00 cmp r3, #0
8007e30: f000 8087 beq.w 8007f42 <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8007e34: 4b36 ldr r3, [pc, #216] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007e36: 685b ldr r3, [r3, #4]
8007e38: f003 030c and.w r3, r3, #12
8007e3c: 2b08 cmp r3, #8
8007e3e: d061 beq.n 8007f04 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8007e40: 687b ldr r3, [r7, #4]
8007e42: 69db ldr r3, [r3, #28]
8007e44: 2b02 cmp r3, #2
8007e46: d146 bne.n 8007ed6 <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8007e48: 4b33 ldr r3, [pc, #204] @ (8007f18 <HAL_RCC_OscConfig+0x4cc>)
8007e4a: 2200 movs r2, #0
8007e4c: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007e4e: f7fc fe11 bl 8004a74 <HAL_GetTick>
8007e52: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007e54: e008 b.n 8007e68 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8007e56: f7fc fe0d bl 8004a74 <HAL_GetTick>
8007e5a: 4602 mov r2, r0
8007e5c: 693b ldr r3, [r7, #16]
8007e5e: 1ad3 subs r3, r2, r3
8007e60: 2b02 cmp r3, #2
8007e62: d901 bls.n 8007e68 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
8007e64: 2303 movs r3, #3
8007e66: e06d b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007e68: 4b29 ldr r3, [pc, #164] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007e6a: 681b ldr r3, [r3, #0]
8007e6c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8007e70: 2b00 cmp r3, #0
8007e72: d1f0 bne.n 8007e56 <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
8007e74: 687b ldr r3, [r7, #4]
8007e76: 6a1b ldr r3, [r3, #32]
8007e78: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8007e7c: d108 bne.n 8007e90 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
8007e7e: 4b24 ldr r3, [pc, #144] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007e80: 685b ldr r3, [r3, #4]
8007e82: f423 3200 bic.w r2, r3, #131072 @ 0x20000
8007e86: 687b ldr r3, [r7, #4]
8007e88: 689b ldr r3, [r3, #8]
8007e8a: 4921 ldr r1, [pc, #132] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007e8c: 4313 orrs r3, r2
8007e8e: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
8007e90: 4b1f ldr r3, [pc, #124] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007e92: 685b ldr r3, [r3, #4]
8007e94: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
8007e98: 687b ldr r3, [r7, #4]
8007e9a: 6a19 ldr r1, [r3, #32]
8007e9c: 687b ldr r3, [r7, #4]
8007e9e: 6a5b ldr r3, [r3, #36] @ 0x24
8007ea0: 430b orrs r3, r1
8007ea2: 491b ldr r1, [pc, #108] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007ea4: 4313 orrs r3, r2
8007ea6: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8007ea8: 4b1b ldr r3, [pc, #108] @ (8007f18 <HAL_RCC_OscConfig+0x4cc>)
8007eaa: 2201 movs r2, #1
8007eac: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007eae: f7fc fde1 bl 8004a74 <HAL_GetTick>
8007eb2: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8007eb4: e008 b.n 8007ec8 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8007eb6: f7fc fddd bl 8004a74 <HAL_GetTick>
8007eba: 4602 mov r2, r0
8007ebc: 693b ldr r3, [r7, #16]
8007ebe: 1ad3 subs r3, r2, r3
8007ec0: 2b02 cmp r3, #2
8007ec2: d901 bls.n 8007ec8 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8007ec4: 2303 movs r3, #3
8007ec6: e03d b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8007ec8: 4b11 ldr r3, [pc, #68] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007eca: 681b ldr r3, [r3, #0]
8007ecc: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8007ed0: 2b00 cmp r3, #0
8007ed2: d0f0 beq.n 8007eb6 <HAL_RCC_OscConfig+0x46a>
8007ed4: e035 b.n 8007f42 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8007ed6: 4b10 ldr r3, [pc, #64] @ (8007f18 <HAL_RCC_OscConfig+0x4cc>)
8007ed8: 2200 movs r2, #0
8007eda: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007edc: f7fc fdca bl 8004a74 <HAL_GetTick>
8007ee0: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007ee2: e008 b.n 8007ef6 <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8007ee4: f7fc fdc6 bl 8004a74 <HAL_GetTick>
8007ee8: 4602 mov r2, r0
8007eea: 693b ldr r3, [r7, #16]
8007eec: 1ad3 subs r3, r2, r3
8007eee: 2b02 cmp r3, #2
8007ef0: d901 bls.n 8007ef6 <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
8007ef2: 2303 movs r3, #3
8007ef4: e026 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007ef6: 4b06 ldr r3, [pc, #24] @ (8007f10 <HAL_RCC_OscConfig+0x4c4>)
8007ef8: 681b ldr r3, [r3, #0]
8007efa: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8007efe: 2b00 cmp r3, #0
8007f00: d1f0 bne.n 8007ee4 <HAL_RCC_OscConfig+0x498>
8007f02: e01e b.n 8007f42 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8007f04: 687b ldr r3, [r7, #4]
8007f06: 69db ldr r3, [r3, #28]
8007f08: 2b01 cmp r3, #1
8007f0a: d107 bne.n 8007f1c <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8007f0c: 2301 movs r3, #1
8007f0e: e019 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
8007f10: 40021000 .word 0x40021000
8007f14: 40007000 .word 0x40007000
8007f18: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8007f1c: 4b0b ldr r3, [pc, #44] @ (8007f4c <HAL_RCC_OscConfig+0x500>)
8007f1e: 685b ldr r3, [r3, #4]
8007f20: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8007f22: 68fb ldr r3, [r7, #12]
8007f24: f403 3280 and.w r2, r3, #65536 @ 0x10000
8007f28: 687b ldr r3, [r7, #4]
8007f2a: 6a1b ldr r3, [r3, #32]
8007f2c: 429a cmp r2, r3
8007f2e: d106 bne.n 8007f3e <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8007f30: 68fb ldr r3, [r7, #12]
8007f32: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
8007f36: 687b ldr r3, [r7, #4]
8007f38: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8007f3a: 429a cmp r2, r3
8007f3c: d001 beq.n 8007f42 <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
8007f3e: 2301 movs r3, #1
8007f40: e000 b.n 8007f44 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
8007f42: 2300 movs r3, #0
}
8007f44: 4618 mov r0, r3
8007f46: 3718 adds r7, #24
8007f48: 46bd mov sp, r7
8007f4a: bd80 pop {r7, pc}
8007f4c: 40021000 .word 0x40021000
08007f50 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8007f50: b580 push {r7, lr}
8007f52: b084 sub sp, #16
8007f54: af00 add r7, sp, #0
8007f56: 6078 str r0, [r7, #4]
8007f58: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8007f5a: 687b ldr r3, [r7, #4]
8007f5c: 2b00 cmp r3, #0
8007f5e: d101 bne.n 8007f64 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8007f60: 2301 movs r3, #1
8007f62: e0d0 b.n 8008106 <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8007f64: 4b6a ldr r3, [pc, #424] @ (8008110 <HAL_RCC_ClockConfig+0x1c0>)
8007f66: 681b ldr r3, [r3, #0]
8007f68: f003 0307 and.w r3, r3, #7
8007f6c: 683a ldr r2, [r7, #0]
8007f6e: 429a cmp r2, r3
8007f70: d910 bls.n 8007f94 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8007f72: 4b67 ldr r3, [pc, #412] @ (8008110 <HAL_RCC_ClockConfig+0x1c0>)
8007f74: 681b ldr r3, [r3, #0]
8007f76: f023 0207 bic.w r2, r3, #7
8007f7a: 4965 ldr r1, [pc, #404] @ (8008110 <HAL_RCC_ClockConfig+0x1c0>)
8007f7c: 683b ldr r3, [r7, #0]
8007f7e: 4313 orrs r3, r2
8007f80: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8007f82: 4b63 ldr r3, [pc, #396] @ (8008110 <HAL_RCC_ClockConfig+0x1c0>)
8007f84: 681b ldr r3, [r3, #0]
8007f86: f003 0307 and.w r3, r3, #7
8007f8a: 683a ldr r2, [r7, #0]
8007f8c: 429a cmp r2, r3
8007f8e: d001 beq.n 8007f94 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8007f90: 2301 movs r3, #1
8007f92: e0b8 b.n 8008106 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8007f94: 687b ldr r3, [r7, #4]
8007f96: 681b ldr r3, [r3, #0]
8007f98: f003 0302 and.w r3, r3, #2
8007f9c: 2b00 cmp r3, #0
8007f9e: d020 beq.n 8007fe2 <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8007fa0: 687b ldr r3, [r7, #4]
8007fa2: 681b ldr r3, [r3, #0]
8007fa4: f003 0304 and.w r3, r3, #4
8007fa8: 2b00 cmp r3, #0
8007faa: d005 beq.n 8007fb8 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8007fac: 4b59 ldr r3, [pc, #356] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8007fae: 685b ldr r3, [r3, #4]
8007fb0: 4a58 ldr r2, [pc, #352] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8007fb2: f443 63e0 orr.w r3, r3, #1792 @ 0x700
8007fb6: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8007fb8: 687b ldr r3, [r7, #4]
8007fba: 681b ldr r3, [r3, #0]
8007fbc: f003 0308 and.w r3, r3, #8
8007fc0: 2b00 cmp r3, #0
8007fc2: d005 beq.n 8007fd0 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8007fc4: 4b53 ldr r3, [pc, #332] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8007fc6: 685b ldr r3, [r3, #4]
8007fc8: 4a52 ldr r2, [pc, #328] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8007fca: f443 5360 orr.w r3, r3, #14336 @ 0x3800
8007fce: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8007fd0: 4b50 ldr r3, [pc, #320] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8007fd2: 685b ldr r3, [r3, #4]
8007fd4: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8007fd8: 687b ldr r3, [r7, #4]
8007fda: 689b ldr r3, [r3, #8]
8007fdc: 494d ldr r1, [pc, #308] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8007fde: 4313 orrs r3, r2
8007fe0: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8007fe2: 687b ldr r3, [r7, #4]
8007fe4: 681b ldr r3, [r3, #0]
8007fe6: f003 0301 and.w r3, r3, #1
8007fea: 2b00 cmp r3, #0
8007fec: d040 beq.n 8008070 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8007fee: 687b ldr r3, [r7, #4]
8007ff0: 685b ldr r3, [r3, #4]
8007ff2: 2b01 cmp r3, #1
8007ff4: d107 bne.n 8008006 <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8007ff6: 4b47 ldr r3, [pc, #284] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8007ff8: 681b ldr r3, [r3, #0]
8007ffa: f403 3300 and.w r3, r3, #131072 @ 0x20000
8007ffe: 2b00 cmp r3, #0
8008000: d115 bne.n 800802e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8008002: 2301 movs r3, #1
8008004: e07f b.n 8008106 <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8008006: 687b ldr r3, [r7, #4]
8008008: 685b ldr r3, [r3, #4]
800800a: 2b02 cmp r3, #2
800800c: d107 bne.n 800801e <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800800e: 4b41 ldr r3, [pc, #260] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8008010: 681b ldr r3, [r3, #0]
8008012: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8008016: 2b00 cmp r3, #0
8008018: d109 bne.n 800802e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800801a: 2301 movs r3, #1
800801c: e073 b.n 8008106 <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800801e: 4b3d ldr r3, [pc, #244] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8008020: 681b ldr r3, [r3, #0]
8008022: f003 0302 and.w r3, r3, #2
8008026: 2b00 cmp r3, #0
8008028: d101 bne.n 800802e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
800802a: 2301 movs r3, #1
800802c: e06b b.n 8008106 <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
800802e: 4b39 ldr r3, [pc, #228] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8008030: 685b ldr r3, [r3, #4]
8008032: f023 0203 bic.w r2, r3, #3
8008036: 687b ldr r3, [r7, #4]
8008038: 685b ldr r3, [r3, #4]
800803a: 4936 ldr r1, [pc, #216] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
800803c: 4313 orrs r3, r2
800803e: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008040: f7fc fd18 bl 8004a74 <HAL_GetTick>
8008044: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8008046: e00a b.n 800805e <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8008048: f7fc fd14 bl 8004a74 <HAL_GetTick>
800804c: 4602 mov r2, r0
800804e: 68fb ldr r3, [r7, #12]
8008050: 1ad3 subs r3, r2, r3
8008052: f241 3288 movw r2, #5000 @ 0x1388
8008056: 4293 cmp r3, r2
8008058: d901 bls.n 800805e <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
800805a: 2303 movs r3, #3
800805c: e053 b.n 8008106 <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800805e: 4b2d ldr r3, [pc, #180] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
8008060: 685b ldr r3, [r3, #4]
8008062: f003 020c and.w r2, r3, #12
8008066: 687b ldr r3, [r7, #4]
8008068: 685b ldr r3, [r3, #4]
800806a: 009b lsls r3, r3, #2
800806c: 429a cmp r2, r3
800806e: d1eb bne.n 8008048 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8008070: 4b27 ldr r3, [pc, #156] @ (8008110 <HAL_RCC_ClockConfig+0x1c0>)
8008072: 681b ldr r3, [r3, #0]
8008074: f003 0307 and.w r3, r3, #7
8008078: 683a ldr r2, [r7, #0]
800807a: 429a cmp r2, r3
800807c: d210 bcs.n 80080a0 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800807e: 4b24 ldr r3, [pc, #144] @ (8008110 <HAL_RCC_ClockConfig+0x1c0>)
8008080: 681b ldr r3, [r3, #0]
8008082: f023 0207 bic.w r2, r3, #7
8008086: 4922 ldr r1, [pc, #136] @ (8008110 <HAL_RCC_ClockConfig+0x1c0>)
8008088: 683b ldr r3, [r7, #0]
800808a: 4313 orrs r3, r2
800808c: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
800808e: 4b20 ldr r3, [pc, #128] @ (8008110 <HAL_RCC_ClockConfig+0x1c0>)
8008090: 681b ldr r3, [r3, #0]
8008092: f003 0307 and.w r3, r3, #7
8008096: 683a ldr r2, [r7, #0]
8008098: 429a cmp r2, r3
800809a: d001 beq.n 80080a0 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
800809c: 2301 movs r3, #1
800809e: e032 b.n 8008106 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
80080a0: 687b ldr r3, [r7, #4]
80080a2: 681b ldr r3, [r3, #0]
80080a4: f003 0304 and.w r3, r3, #4
80080a8: 2b00 cmp r3, #0
80080aa: d008 beq.n 80080be <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
80080ac: 4b19 ldr r3, [pc, #100] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
80080ae: 685b ldr r3, [r3, #4]
80080b0: f423 62e0 bic.w r2, r3, #1792 @ 0x700
80080b4: 687b ldr r3, [r7, #4]
80080b6: 68db ldr r3, [r3, #12]
80080b8: 4916 ldr r1, [pc, #88] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
80080ba: 4313 orrs r3, r2
80080bc: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
80080be: 687b ldr r3, [r7, #4]
80080c0: 681b ldr r3, [r3, #0]
80080c2: f003 0308 and.w r3, r3, #8
80080c6: 2b00 cmp r3, #0
80080c8: d009 beq.n 80080de <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
80080ca: 4b12 ldr r3, [pc, #72] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
80080cc: 685b ldr r3, [r3, #4]
80080ce: f423 5260 bic.w r2, r3, #14336 @ 0x3800
80080d2: 687b ldr r3, [r7, #4]
80080d4: 691b ldr r3, [r3, #16]
80080d6: 00db lsls r3, r3, #3
80080d8: 490e ldr r1, [pc, #56] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
80080da: 4313 orrs r3, r2
80080dc: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
80080de: f000 f821 bl 8008124 <HAL_RCC_GetSysClockFreq>
80080e2: 4602 mov r2, r0
80080e4: 4b0b ldr r3, [pc, #44] @ (8008114 <HAL_RCC_ClockConfig+0x1c4>)
80080e6: 685b ldr r3, [r3, #4]
80080e8: 091b lsrs r3, r3, #4
80080ea: f003 030f and.w r3, r3, #15
80080ee: 490a ldr r1, [pc, #40] @ (8008118 <HAL_RCC_ClockConfig+0x1c8>)
80080f0: 5ccb ldrb r3, [r1, r3]
80080f2: fa22 f303 lsr.w r3, r2, r3
80080f6: 4a09 ldr r2, [pc, #36] @ (800811c <HAL_RCC_ClockConfig+0x1cc>)
80080f8: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
80080fa: 4b09 ldr r3, [pc, #36] @ (8008120 <HAL_RCC_ClockConfig+0x1d0>)
80080fc: 681b ldr r3, [r3, #0]
80080fe: 4618 mov r0, r3
8008100: f7fc fc76 bl 80049f0 <HAL_InitTick>
return HAL_OK;
8008104: 2300 movs r3, #0
}
8008106: 4618 mov r0, r3
8008108: 3710 adds r7, #16
800810a: 46bd mov sp, r7
800810c: bd80 pop {r7, pc}
800810e: bf00 nop
8008110: 40022000 .word 0x40022000
8008114: 40021000 .word 0x40021000
8008118: 0800ec60 .word 0x0800ec60
800811c: 20000010 .word 0x20000010
8008120: 20000014 .word 0x20000014
08008124 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8008124: b480 push {r7}
8008126: b087 sub sp, #28
8008128: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
800812a: 2300 movs r3, #0
800812c: 60fb str r3, [r7, #12]
800812e: 2300 movs r3, #0
8008130: 60bb str r3, [r7, #8]
8008132: 2300 movs r3, #0
8008134: 617b str r3, [r7, #20]
8008136: 2300 movs r3, #0
8008138: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
800813a: 2300 movs r3, #0
800813c: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
800813e: 4b1e ldr r3, [pc, #120] @ (80081b8 <HAL_RCC_GetSysClockFreq+0x94>)
8008140: 685b ldr r3, [r3, #4]
8008142: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
8008144: 68fb ldr r3, [r7, #12]
8008146: f003 030c and.w r3, r3, #12
800814a: 2b04 cmp r3, #4
800814c: d002 beq.n 8008154 <HAL_RCC_GetSysClockFreq+0x30>
800814e: 2b08 cmp r3, #8
8008150: d003 beq.n 800815a <HAL_RCC_GetSysClockFreq+0x36>
8008152: e027 b.n 80081a4 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8008154: 4b19 ldr r3, [pc, #100] @ (80081bc <HAL_RCC_GetSysClockFreq+0x98>)
8008156: 613b str r3, [r7, #16]
break;
8008158: e027 b.n 80081aa <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
800815a: 68fb ldr r3, [r7, #12]
800815c: 0c9b lsrs r3, r3, #18
800815e: f003 030f and.w r3, r3, #15
8008162: 4a17 ldr r2, [pc, #92] @ (80081c0 <HAL_RCC_GetSysClockFreq+0x9c>)
8008164: 5cd3 ldrb r3, [r2, r3]
8008166: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
8008168: 68fb ldr r3, [r7, #12]
800816a: f403 3380 and.w r3, r3, #65536 @ 0x10000
800816e: 2b00 cmp r3, #0
8008170: d010 beq.n 8008194 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
8008172: 4b11 ldr r3, [pc, #68] @ (80081b8 <HAL_RCC_GetSysClockFreq+0x94>)
8008174: 685b ldr r3, [r3, #4]
8008176: 0c5b lsrs r3, r3, #17
8008178: f003 0301 and.w r3, r3, #1
800817c: 4a11 ldr r2, [pc, #68] @ (80081c4 <HAL_RCC_GetSysClockFreq+0xa0>)
800817e: 5cd3 ldrb r3, [r2, r3]
8008180: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
8008182: 687b ldr r3, [r7, #4]
8008184: 4a0d ldr r2, [pc, #52] @ (80081bc <HAL_RCC_GetSysClockFreq+0x98>)
8008186: fb03 f202 mul.w r2, r3, r2
800818a: 68bb ldr r3, [r7, #8]
800818c: fbb2 f3f3 udiv r3, r2, r3
8008190: 617b str r3, [r7, #20]
8008192: e004 b.n 800819e <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8008194: 687b ldr r3, [r7, #4]
8008196: 4a0c ldr r2, [pc, #48] @ (80081c8 <HAL_RCC_GetSysClockFreq+0xa4>)
8008198: fb02 f303 mul.w r3, r2, r3
800819c: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
800819e: 697b ldr r3, [r7, #20]
80081a0: 613b str r3, [r7, #16]
break;
80081a2: e002 b.n 80081aa <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
80081a4: 4b09 ldr r3, [pc, #36] @ (80081cc <HAL_RCC_GetSysClockFreq+0xa8>)
80081a6: 613b str r3, [r7, #16]
break;
80081a8: bf00 nop
}
}
return sysclockfreq;
80081aa: 693b ldr r3, [r7, #16]
}
80081ac: 4618 mov r0, r3
80081ae: 371c adds r7, #28
80081b0: 46bd mov sp, r7
80081b2: bc80 pop {r7}
80081b4: 4770 bx lr
80081b6: bf00 nop
80081b8: 40021000 .word 0x40021000
80081bc: 00b71b00 .word 0x00b71b00
80081c0: 0800ec78 .word 0x0800ec78
80081c4: 0800ec88 .word 0x0800ec88
80081c8: 003d0900 .word 0x003d0900
80081cc: 007a1200 .word 0x007a1200
080081d0 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
80081d0: b480 push {r7}
80081d2: af00 add r7, sp, #0
return SystemCoreClock;
80081d4: 4b02 ldr r3, [pc, #8] @ (80081e0 <HAL_RCC_GetHCLKFreq+0x10>)
80081d6: 681b ldr r3, [r3, #0]
}
80081d8: 4618 mov r0, r3
80081da: 46bd mov sp, r7
80081dc: bc80 pop {r7}
80081de: 4770 bx lr
80081e0: 20000010 .word 0x20000010
080081e4 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
80081e4: b580 push {r7, lr}
80081e6: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
80081e8: f7ff fff2 bl 80081d0 <HAL_RCC_GetHCLKFreq>
80081ec: 4602 mov r2, r0
80081ee: 4b05 ldr r3, [pc, #20] @ (8008204 <HAL_RCC_GetPCLK1Freq+0x20>)
80081f0: 685b ldr r3, [r3, #4]
80081f2: 0a1b lsrs r3, r3, #8
80081f4: f003 0307 and.w r3, r3, #7
80081f8: 4903 ldr r1, [pc, #12] @ (8008208 <HAL_RCC_GetPCLK1Freq+0x24>)
80081fa: 5ccb ldrb r3, [r1, r3]
80081fc: fa22 f303 lsr.w r3, r2, r3
}
8008200: 4618 mov r0, r3
8008202: bd80 pop {r7, pc}
8008204: 40021000 .word 0x40021000
8008208: 0800ec70 .word 0x0800ec70
0800820c <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
800820c: b580 push {r7, lr}
800820e: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
8008210: f7ff ffde bl 80081d0 <HAL_RCC_GetHCLKFreq>
8008214: 4602 mov r2, r0
8008216: 4b05 ldr r3, [pc, #20] @ (800822c <HAL_RCC_GetPCLK2Freq+0x20>)
8008218: 685b ldr r3, [r3, #4]
800821a: 0adb lsrs r3, r3, #11
800821c: f003 0307 and.w r3, r3, #7
8008220: 4903 ldr r1, [pc, #12] @ (8008230 <HAL_RCC_GetPCLK2Freq+0x24>)
8008222: 5ccb ldrb r3, [r1, r3]
8008224: fa22 f303 lsr.w r3, r2, r3
}
8008228: 4618 mov r0, r3
800822a: bd80 pop {r7, pc}
800822c: 40021000 .word 0x40021000
8008230: 0800ec70 .word 0x0800ec70
08008234 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8008234: b480 push {r7}
8008236: b085 sub sp, #20
8008238: af00 add r7, sp, #0
800823a: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
800823c: 4b0a ldr r3, [pc, #40] @ (8008268 <RCC_Delay+0x34>)
800823e: 681b ldr r3, [r3, #0]
8008240: 4a0a ldr r2, [pc, #40] @ (800826c <RCC_Delay+0x38>)
8008242: fba2 2303 umull r2, r3, r2, r3
8008246: 0a5b lsrs r3, r3, #9
8008248: 687a ldr r2, [r7, #4]
800824a: fb02 f303 mul.w r3, r2, r3
800824e: 60fb str r3, [r7, #12]
do
{
__NOP();
8008250: bf00 nop
}
while (Delay --);
8008252: 68fb ldr r3, [r7, #12]
8008254: 1e5a subs r2, r3, #1
8008256: 60fa str r2, [r7, #12]
8008258: 2b00 cmp r3, #0
800825a: d1f9 bne.n 8008250 <RCC_Delay+0x1c>
}
800825c: bf00 nop
800825e: bf00 nop
8008260: 3714 adds r7, #20
8008262: 46bd mov sp, r7
8008264: bc80 pop {r7}
8008266: 4770 bx lr
8008268: 20000010 .word 0x20000010
800826c: 10624dd3 .word 0x10624dd3
08008270 <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8008270: b580 push {r7, lr}
8008272: b086 sub sp, #24
8008274: af00 add r7, sp, #0
8008276: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
8008278: 2300 movs r3, #0
800827a: 613b str r3, [r7, #16]
800827c: 2300 movs r3, #0
800827e: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8008280: 687b ldr r3, [r7, #4]
8008282: 681b ldr r3, [r3, #0]
8008284: f003 0301 and.w r3, r3, #1
8008288: 2b00 cmp r3, #0
800828a: d07d beq.n 8008388 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
800828c: 2300 movs r3, #0
800828e: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8008290: 4b4f ldr r3, [pc, #316] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008292: 69db ldr r3, [r3, #28]
8008294: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8008298: 2b00 cmp r3, #0
800829a: d10d bne.n 80082b8 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
800829c: 4b4c ldr r3, [pc, #304] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800829e: 69db ldr r3, [r3, #28]
80082a0: 4a4b ldr r2, [pc, #300] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80082a2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80082a6: 61d3 str r3, [r2, #28]
80082a8: 4b49 ldr r3, [pc, #292] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80082aa: 69db ldr r3, [r3, #28]
80082ac: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80082b0: 60bb str r3, [r7, #8]
80082b2: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
80082b4: 2301 movs r3, #1
80082b6: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80082b8: 4b46 ldr r3, [pc, #280] @ (80083d4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80082ba: 681b ldr r3, [r3, #0]
80082bc: f403 7380 and.w r3, r3, #256 @ 0x100
80082c0: 2b00 cmp r3, #0
80082c2: d118 bne.n 80082f6 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
80082c4: 4b43 ldr r3, [pc, #268] @ (80083d4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80082c6: 681b ldr r3, [r3, #0]
80082c8: 4a42 ldr r2, [pc, #264] @ (80083d4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80082ca: f443 7380 orr.w r3, r3, #256 @ 0x100
80082ce: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
80082d0: f7fc fbd0 bl 8004a74 <HAL_GetTick>
80082d4: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80082d6: e008 b.n 80082ea <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
80082d8: f7fc fbcc bl 8004a74 <HAL_GetTick>
80082dc: 4602 mov r2, r0
80082de: 693b ldr r3, [r7, #16]
80082e0: 1ad3 subs r3, r2, r3
80082e2: 2b64 cmp r3, #100 @ 0x64
80082e4: d901 bls.n 80082ea <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
80082e6: 2303 movs r3, #3
80082e8: e06d b.n 80083c6 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80082ea: 4b3a ldr r3, [pc, #232] @ (80083d4 <HAL_RCCEx_PeriphCLKConfig+0x164>)
80082ec: 681b ldr r3, [r3, #0]
80082ee: f403 7380 and.w r3, r3, #256 @ 0x100
80082f2: 2b00 cmp r3, #0
80082f4: d0f0 beq.n 80082d8 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
80082f6: 4b36 ldr r3, [pc, #216] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80082f8: 6a1b ldr r3, [r3, #32]
80082fa: f403 7340 and.w r3, r3, #768 @ 0x300
80082fe: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8008300: 68fb ldr r3, [r7, #12]
8008302: 2b00 cmp r3, #0
8008304: d02e beq.n 8008364 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8008306: 687b ldr r3, [r7, #4]
8008308: 685b ldr r3, [r3, #4]
800830a: f403 7340 and.w r3, r3, #768 @ 0x300
800830e: 68fa ldr r2, [r7, #12]
8008310: 429a cmp r2, r3
8008312: d027 beq.n 8008364 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8008314: 4b2e ldr r3, [pc, #184] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008316: 6a1b ldr r3, [r3, #32]
8008318: f423 7340 bic.w r3, r3, #768 @ 0x300
800831c: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
800831e: 4b2e ldr r3, [pc, #184] @ (80083d8 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8008320: 2201 movs r2, #1
8008322: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8008324: 4b2c ldr r3, [pc, #176] @ (80083d8 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8008326: 2200 movs r2, #0
8008328: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
800832a: 4a29 ldr r2, [pc, #164] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800832c: 68fb ldr r3, [r7, #12]
800832e: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8008330: 68fb ldr r3, [r7, #12]
8008332: f003 0301 and.w r3, r3, #1
8008336: 2b00 cmp r3, #0
8008338: d014 beq.n 8008364 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800833a: f7fc fb9b bl 8004a74 <HAL_GetTick>
800833e: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008340: e00a b.n 8008358 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8008342: f7fc fb97 bl 8004a74 <HAL_GetTick>
8008346: 4602 mov r2, r0
8008348: 693b ldr r3, [r7, #16]
800834a: 1ad3 subs r3, r2, r3
800834c: f241 3288 movw r2, #5000 @ 0x1388
8008350: 4293 cmp r3, r2
8008352: d901 bls.n 8008358 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8008354: 2303 movs r3, #3
8008356: e036 b.n 80083c6 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008358: 4b1d ldr r3, [pc, #116] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800835a: 6a1b ldr r3, [r3, #32]
800835c: f003 0302 and.w r3, r3, #2
8008360: 2b00 cmp r3, #0
8008362: d0ee beq.n 8008342 <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8008364: 4b1a ldr r3, [pc, #104] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008366: 6a1b ldr r3, [r3, #32]
8008368: f423 7240 bic.w r2, r3, #768 @ 0x300
800836c: 687b ldr r3, [r7, #4]
800836e: 685b ldr r3, [r3, #4]
8008370: 4917 ldr r1, [pc, #92] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008372: 4313 orrs r3, r2
8008374: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8008376: 7dfb ldrb r3, [r7, #23]
8008378: 2b01 cmp r3, #1
800837a: d105 bne.n 8008388 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
800837c: 4b14 ldr r3, [pc, #80] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800837e: 69db ldr r3, [r3, #28]
8008380: 4a13 ldr r2, [pc, #76] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008382: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8008386: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8008388: 687b ldr r3, [r7, #4]
800838a: 681b ldr r3, [r3, #0]
800838c: f003 0302 and.w r3, r3, #2
8008390: 2b00 cmp r3, #0
8008392: d008 beq.n 80083a6 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
8008394: 4b0e ldr r3, [pc, #56] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008396: 685b ldr r3, [r3, #4]
8008398: f423 4240 bic.w r2, r3, #49152 @ 0xc000
800839c: 687b ldr r3, [r7, #4]
800839e: 689b ldr r3, [r3, #8]
80083a0: 490b ldr r1, [pc, #44] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80083a2: 4313 orrs r3, r2
80083a4: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
80083a6: 687b ldr r3, [r7, #4]
80083a8: 681b ldr r3, [r3, #0]
80083aa: f003 0310 and.w r3, r3, #16
80083ae: 2b00 cmp r3, #0
80083b0: d008 beq.n 80083c4 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
80083b2: 4b07 ldr r3, [pc, #28] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80083b4: 685b ldr r3, [r3, #4]
80083b6: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
80083ba: 687b ldr r3, [r7, #4]
80083bc: 68db ldr r3, [r3, #12]
80083be: 4904 ldr r1, [pc, #16] @ (80083d0 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80083c0: 4313 orrs r3, r2
80083c2: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
80083c4: 2300 movs r3, #0
}
80083c6: 4618 mov r0, r3
80083c8: 3718 adds r7, #24
80083ca: 46bd mov sp, r7
80083cc: bd80 pop {r7, pc}
80083ce: bf00 nop
80083d0: 40021000 .word 0x40021000
80083d4: 40007000 .word 0x40007000
80083d8: 42420440 .word 0x42420440
080083dc <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
80083dc: b580 push {r7, lr}
80083de: b082 sub sp, #8
80083e0: af00 add r7, sp, #0
80083e2: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
80083e4: 687b ldr r3, [r7, #4]
80083e6: 2b00 cmp r3, #0
80083e8: d101 bne.n 80083ee <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
80083ea: 2301 movs r3, #1
80083ec: e041 b.n 8008472 <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
80083ee: 687b ldr r3, [r7, #4]
80083f0: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
80083f4: b2db uxtb r3, r3
80083f6: 2b00 cmp r3, #0
80083f8: d106 bne.n 8008408 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
80083fa: 687b ldr r3, [r7, #4]
80083fc: 2200 movs r2, #0
80083fe: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8008402: 6878 ldr r0, [r7, #4]
8008404: f7fc f96a bl 80046dc <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8008408: 687b ldr r3, [r7, #4]
800840a: 2202 movs r2, #2
800840c: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8008410: 687b ldr r3, [r7, #4]
8008412: 681a ldr r2, [r3, #0]
8008414: 687b ldr r3, [r7, #4]
8008416: 3304 adds r3, #4
8008418: 4619 mov r1, r3
800841a: 4610 mov r0, r2
800841c: f000 fb3e bl 8008a9c <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8008420: 687b ldr r3, [r7, #4]
8008422: 2201 movs r2, #1
8008424: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008428: 687b ldr r3, [r7, #4]
800842a: 2201 movs r2, #1
800842c: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008430: 687b ldr r3, [r7, #4]
8008432: 2201 movs r2, #1
8008434: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008438: 687b ldr r3, [r7, #4]
800843a: 2201 movs r2, #1
800843c: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008440: 687b ldr r3, [r7, #4]
8008442: 2201 movs r2, #1
8008444: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008448: 687b ldr r3, [r7, #4]
800844a: 2201 movs r2, #1
800844c: f883 2042 strb.w r2, [r3, #66] @ 0x42
8008450: 687b ldr r3, [r7, #4]
8008452: 2201 movs r2, #1
8008454: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008458: 687b ldr r3, [r7, #4]
800845a: 2201 movs r2, #1
800845c: f883 2044 strb.w r2, [r3, #68] @ 0x44
8008460: 687b ldr r3, [r7, #4]
8008462: 2201 movs r2, #1
8008464: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008468: 687b ldr r3, [r7, #4]
800846a: 2201 movs r2, #1
800846c: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8008470: 2300 movs r3, #0
}
8008472: 4618 mov r0, r3
8008474: 3708 adds r7, #8
8008476: 46bd mov sp, r7
8008478: bd80 pop {r7, pc}
0800847a <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
800847a: b580 push {r7, lr}
800847c: b082 sub sp, #8
800847e: af00 add r7, sp, #0
8008480: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8008482: 687b ldr r3, [r7, #4]
8008484: 2b00 cmp r3, #0
8008486: d101 bne.n 800848c <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8008488: 2301 movs r3, #1
800848a: e041 b.n 8008510 <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
800848c: 687b ldr r3, [r7, #4]
800848e: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8008492: b2db uxtb r3, r3
8008494: 2b00 cmp r3, #0
8008496: d106 bne.n 80084a6 <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8008498: 687b ldr r3, [r7, #4]
800849a: 2200 movs r2, #0
800849c: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
80084a0: 6878 ldr r0, [r7, #4]
80084a2: f000 f839 bl 8008518 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
80084a6: 687b ldr r3, [r7, #4]
80084a8: 2202 movs r2, #2
80084aa: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
80084ae: 687b ldr r3, [r7, #4]
80084b0: 681a ldr r2, [r3, #0]
80084b2: 687b ldr r3, [r7, #4]
80084b4: 3304 adds r3, #4
80084b6: 4619 mov r1, r3
80084b8: 4610 mov r0, r2
80084ba: f000 faef bl 8008a9c <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
80084be: 687b ldr r3, [r7, #4]
80084c0: 2201 movs r2, #1
80084c2: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
80084c6: 687b ldr r3, [r7, #4]
80084c8: 2201 movs r2, #1
80084ca: f883 203e strb.w r2, [r3, #62] @ 0x3e
80084ce: 687b ldr r3, [r7, #4]
80084d0: 2201 movs r2, #1
80084d2: f883 203f strb.w r2, [r3, #63] @ 0x3f
80084d6: 687b ldr r3, [r7, #4]
80084d8: 2201 movs r2, #1
80084da: f883 2040 strb.w r2, [r3, #64] @ 0x40
80084de: 687b ldr r3, [r7, #4]
80084e0: 2201 movs r2, #1
80084e2: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
80084e6: 687b ldr r3, [r7, #4]
80084e8: 2201 movs r2, #1
80084ea: f883 2042 strb.w r2, [r3, #66] @ 0x42
80084ee: 687b ldr r3, [r7, #4]
80084f0: 2201 movs r2, #1
80084f2: f883 2043 strb.w r2, [r3, #67] @ 0x43
80084f6: 687b ldr r3, [r7, #4]
80084f8: 2201 movs r2, #1
80084fa: f883 2044 strb.w r2, [r3, #68] @ 0x44
80084fe: 687b ldr r3, [r7, #4]
8008500: 2201 movs r2, #1
8008502: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008506: 687b ldr r3, [r7, #4]
8008508: 2201 movs r2, #1
800850a: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800850e: 2300 movs r3, #0
}
8008510: 4618 mov r0, r3
8008512: 3708 adds r7, #8
8008514: 46bd mov sp, r7
8008516: bd80 pop {r7, pc}
08008518 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8008518: b480 push {r7}
800851a: b083 sub sp, #12
800851c: af00 add r7, sp, #0
800851e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8008520: bf00 nop
8008522: 370c adds r7, #12
8008524: 46bd mov sp, r7
8008526: bc80 pop {r7}
8008528: 4770 bx lr
...
0800852c <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
800852c: b580 push {r7, lr}
800852e: b084 sub sp, #16
8008530: af00 add r7, sp, #0
8008532: 6078 str r0, [r7, #4]
8008534: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8008536: 683b ldr r3, [r7, #0]
8008538: 2b00 cmp r3, #0
800853a: d109 bne.n 8008550 <HAL_TIM_PWM_Start+0x24>
800853c: 687b ldr r3, [r7, #4]
800853e: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8008542: b2db uxtb r3, r3
8008544: 2b01 cmp r3, #1
8008546: bf14 ite ne
8008548: 2301 movne r3, #1
800854a: 2300 moveq r3, #0
800854c: b2db uxtb r3, r3
800854e: e022 b.n 8008596 <HAL_TIM_PWM_Start+0x6a>
8008550: 683b ldr r3, [r7, #0]
8008552: 2b04 cmp r3, #4
8008554: d109 bne.n 800856a <HAL_TIM_PWM_Start+0x3e>
8008556: 687b ldr r3, [r7, #4]
8008558: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
800855c: b2db uxtb r3, r3
800855e: 2b01 cmp r3, #1
8008560: bf14 ite ne
8008562: 2301 movne r3, #1
8008564: 2300 moveq r3, #0
8008566: b2db uxtb r3, r3
8008568: e015 b.n 8008596 <HAL_TIM_PWM_Start+0x6a>
800856a: 683b ldr r3, [r7, #0]
800856c: 2b08 cmp r3, #8
800856e: d109 bne.n 8008584 <HAL_TIM_PWM_Start+0x58>
8008570: 687b ldr r3, [r7, #4]
8008572: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8008576: b2db uxtb r3, r3
8008578: 2b01 cmp r3, #1
800857a: bf14 ite ne
800857c: 2301 movne r3, #1
800857e: 2300 moveq r3, #0
8008580: b2db uxtb r3, r3
8008582: e008 b.n 8008596 <HAL_TIM_PWM_Start+0x6a>
8008584: 687b ldr r3, [r7, #4]
8008586: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
800858a: b2db uxtb r3, r3
800858c: 2b01 cmp r3, #1
800858e: bf14 ite ne
8008590: 2301 movne r3, #1
8008592: 2300 moveq r3, #0
8008594: b2db uxtb r3, r3
8008596: 2b00 cmp r3, #0
8008598: d001 beq.n 800859e <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
800859a: 2301 movs r3, #1
800859c: e05e b.n 800865c <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
800859e: 683b ldr r3, [r7, #0]
80085a0: 2b00 cmp r3, #0
80085a2: d104 bne.n 80085ae <HAL_TIM_PWM_Start+0x82>
80085a4: 687b ldr r3, [r7, #4]
80085a6: 2202 movs r2, #2
80085a8: f883 203e strb.w r2, [r3, #62] @ 0x3e
80085ac: e013 b.n 80085d6 <HAL_TIM_PWM_Start+0xaa>
80085ae: 683b ldr r3, [r7, #0]
80085b0: 2b04 cmp r3, #4
80085b2: d104 bne.n 80085be <HAL_TIM_PWM_Start+0x92>
80085b4: 687b ldr r3, [r7, #4]
80085b6: 2202 movs r2, #2
80085b8: f883 203f strb.w r2, [r3, #63] @ 0x3f
80085bc: e00b b.n 80085d6 <HAL_TIM_PWM_Start+0xaa>
80085be: 683b ldr r3, [r7, #0]
80085c0: 2b08 cmp r3, #8
80085c2: d104 bne.n 80085ce <HAL_TIM_PWM_Start+0xa2>
80085c4: 687b ldr r3, [r7, #4]
80085c6: 2202 movs r2, #2
80085c8: f883 2040 strb.w r2, [r3, #64] @ 0x40
80085cc: e003 b.n 80085d6 <HAL_TIM_PWM_Start+0xaa>
80085ce: 687b ldr r3, [r7, #4]
80085d0: 2202 movs r2, #2
80085d2: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
80085d6: 687b ldr r3, [r7, #4]
80085d8: 681b ldr r3, [r3, #0]
80085da: 2201 movs r2, #1
80085dc: 6839 ldr r1, [r7, #0]
80085de: 4618 mov r0, r3
80085e0: f000 fce8 bl 8008fb4 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
80085e4: 687b ldr r3, [r7, #4]
80085e6: 681b ldr r3, [r3, #0]
80085e8: 4a1e ldr r2, [pc, #120] @ (8008664 <HAL_TIM_PWM_Start+0x138>)
80085ea: 4293 cmp r3, r2
80085ec: d107 bne.n 80085fe <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
80085ee: 687b ldr r3, [r7, #4]
80085f0: 681b ldr r3, [r3, #0]
80085f2: 6c5a ldr r2, [r3, #68] @ 0x44
80085f4: 687b ldr r3, [r7, #4]
80085f6: 681b ldr r3, [r3, #0]
80085f8: f442 4200 orr.w r2, r2, #32768 @ 0x8000
80085fc: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
80085fe: 687b ldr r3, [r7, #4]
8008600: 681b ldr r3, [r3, #0]
8008602: 4a18 ldr r2, [pc, #96] @ (8008664 <HAL_TIM_PWM_Start+0x138>)
8008604: 4293 cmp r3, r2
8008606: d00e beq.n 8008626 <HAL_TIM_PWM_Start+0xfa>
8008608: 687b ldr r3, [r7, #4]
800860a: 681b ldr r3, [r3, #0]
800860c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008610: d009 beq.n 8008626 <HAL_TIM_PWM_Start+0xfa>
8008612: 687b ldr r3, [r7, #4]
8008614: 681b ldr r3, [r3, #0]
8008616: 4a14 ldr r2, [pc, #80] @ (8008668 <HAL_TIM_PWM_Start+0x13c>)
8008618: 4293 cmp r3, r2
800861a: d004 beq.n 8008626 <HAL_TIM_PWM_Start+0xfa>
800861c: 687b ldr r3, [r7, #4]
800861e: 681b ldr r3, [r3, #0]
8008620: 4a12 ldr r2, [pc, #72] @ (800866c <HAL_TIM_PWM_Start+0x140>)
8008622: 4293 cmp r3, r2
8008624: d111 bne.n 800864a <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8008626: 687b ldr r3, [r7, #4]
8008628: 681b ldr r3, [r3, #0]
800862a: 689b ldr r3, [r3, #8]
800862c: f003 0307 and.w r3, r3, #7
8008630: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008632: 68fb ldr r3, [r7, #12]
8008634: 2b06 cmp r3, #6
8008636: d010 beq.n 800865a <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8008638: 687b ldr r3, [r7, #4]
800863a: 681b ldr r3, [r3, #0]
800863c: 681a ldr r2, [r3, #0]
800863e: 687b ldr r3, [r7, #4]
8008640: 681b ldr r3, [r3, #0]
8008642: f042 0201 orr.w r2, r2, #1
8008646: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008648: e007 b.n 800865a <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
800864a: 687b ldr r3, [r7, #4]
800864c: 681b ldr r3, [r3, #0]
800864e: 681a ldr r2, [r3, #0]
8008650: 687b ldr r3, [r7, #4]
8008652: 681b ldr r3, [r3, #0]
8008654: f042 0201 orr.w r2, r2, #1
8008658: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
800865a: 2300 movs r3, #0
}
800865c: 4618 mov r0, r3
800865e: 3710 adds r7, #16
8008660: 46bd mov sp, r7
8008662: bd80 pop {r7, pc}
8008664: 40012c00 .word 0x40012c00
8008668: 40000400 .word 0x40000400
800866c: 40000800 .word 0x40000800
08008670 <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008670: b580 push {r7, lr}
8008672: b082 sub sp, #8
8008674: af00 add r7, sp, #0
8008676: 6078 str r0, [r7, #4]
8008678: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
800867a: 687b ldr r3, [r7, #4]
800867c: 681b ldr r3, [r3, #0]
800867e: 2200 movs r2, #0
8008680: 6839 ldr r1, [r7, #0]
8008682: 4618 mov r0, r3
8008684: f000 fc96 bl 8008fb4 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008688: 687b ldr r3, [r7, #4]
800868a: 681b ldr r3, [r3, #0]
800868c: 4a29 ldr r2, [pc, #164] @ (8008734 <HAL_TIM_PWM_Stop+0xc4>)
800868e: 4293 cmp r3, r2
8008690: d117 bne.n 80086c2 <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
8008692: 687b ldr r3, [r7, #4]
8008694: 681b ldr r3, [r3, #0]
8008696: 6a1a ldr r2, [r3, #32]
8008698: f241 1311 movw r3, #4369 @ 0x1111
800869c: 4013 ands r3, r2
800869e: 2b00 cmp r3, #0
80086a0: d10f bne.n 80086c2 <HAL_TIM_PWM_Stop+0x52>
80086a2: 687b ldr r3, [r7, #4]
80086a4: 681b ldr r3, [r3, #0]
80086a6: 6a1a ldr r2, [r3, #32]
80086a8: f240 4344 movw r3, #1092 @ 0x444
80086ac: 4013 ands r3, r2
80086ae: 2b00 cmp r3, #0
80086b0: d107 bne.n 80086c2 <HAL_TIM_PWM_Stop+0x52>
80086b2: 687b ldr r3, [r7, #4]
80086b4: 681b ldr r3, [r3, #0]
80086b6: 6c5a ldr r2, [r3, #68] @ 0x44
80086b8: 687b ldr r3, [r7, #4]
80086ba: 681b ldr r3, [r3, #0]
80086bc: f422 4200 bic.w r2, r2, #32768 @ 0x8000
80086c0: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
80086c2: 687b ldr r3, [r7, #4]
80086c4: 681b ldr r3, [r3, #0]
80086c6: 6a1a ldr r2, [r3, #32]
80086c8: f241 1311 movw r3, #4369 @ 0x1111
80086cc: 4013 ands r3, r2
80086ce: 2b00 cmp r3, #0
80086d0: d10f bne.n 80086f2 <HAL_TIM_PWM_Stop+0x82>
80086d2: 687b ldr r3, [r7, #4]
80086d4: 681b ldr r3, [r3, #0]
80086d6: 6a1a ldr r2, [r3, #32]
80086d8: f240 4344 movw r3, #1092 @ 0x444
80086dc: 4013 ands r3, r2
80086de: 2b00 cmp r3, #0
80086e0: d107 bne.n 80086f2 <HAL_TIM_PWM_Stop+0x82>
80086e2: 687b ldr r3, [r7, #4]
80086e4: 681b ldr r3, [r3, #0]
80086e6: 681a ldr r2, [r3, #0]
80086e8: 687b ldr r3, [r7, #4]
80086ea: 681b ldr r3, [r3, #0]
80086ec: f022 0201 bic.w r2, r2, #1
80086f0: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
80086f2: 683b ldr r3, [r7, #0]
80086f4: 2b00 cmp r3, #0
80086f6: d104 bne.n 8008702 <HAL_TIM_PWM_Stop+0x92>
80086f8: 687b ldr r3, [r7, #4]
80086fa: 2201 movs r2, #1
80086fc: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008700: e013 b.n 800872a <HAL_TIM_PWM_Stop+0xba>
8008702: 683b ldr r3, [r7, #0]
8008704: 2b04 cmp r3, #4
8008706: d104 bne.n 8008712 <HAL_TIM_PWM_Stop+0xa2>
8008708: 687b ldr r3, [r7, #4]
800870a: 2201 movs r2, #1
800870c: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008710: e00b b.n 800872a <HAL_TIM_PWM_Stop+0xba>
8008712: 683b ldr r3, [r7, #0]
8008714: 2b08 cmp r3, #8
8008716: d104 bne.n 8008722 <HAL_TIM_PWM_Stop+0xb2>
8008718: 687b ldr r3, [r7, #4]
800871a: 2201 movs r2, #1
800871c: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008720: e003 b.n 800872a <HAL_TIM_PWM_Stop+0xba>
8008722: 687b ldr r3, [r7, #4]
8008724: 2201 movs r2, #1
8008726: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
800872a: 2300 movs r3, #0
}
800872c: 4618 mov r0, r3
800872e: 3708 adds r7, #8
8008730: 46bd mov sp, r7
8008732: bd80 pop {r7, pc}
8008734: 40012c00 .word 0x40012c00
08008738 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8008738: b580 push {r7, lr}
800873a: b086 sub sp, #24
800873c: af00 add r7, sp, #0
800873e: 60f8 str r0, [r7, #12]
8008740: 60b9 str r1, [r7, #8]
8008742: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8008744: 2300 movs r3, #0
8008746: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8008748: 68fb ldr r3, [r7, #12]
800874a: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
800874e: 2b01 cmp r3, #1
8008750: d101 bne.n 8008756 <HAL_TIM_PWM_ConfigChannel+0x1e>
8008752: 2302 movs r3, #2
8008754: e0ae b.n 80088b4 <HAL_TIM_PWM_ConfigChannel+0x17c>
8008756: 68fb ldr r3, [r7, #12]
8008758: 2201 movs r2, #1
800875a: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
800875e: 687b ldr r3, [r7, #4]
8008760: 2b0c cmp r3, #12
8008762: f200 809f bhi.w 80088a4 <HAL_TIM_PWM_ConfigChannel+0x16c>
8008766: a201 add r2, pc, #4 @ (adr r2, 800876c <HAL_TIM_PWM_ConfigChannel+0x34>)
8008768: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800876c: 080087a1 .word 0x080087a1
8008770: 080088a5 .word 0x080088a5
8008774: 080088a5 .word 0x080088a5
8008778: 080088a5 .word 0x080088a5
800877c: 080087e1 .word 0x080087e1
8008780: 080088a5 .word 0x080088a5
8008784: 080088a5 .word 0x080088a5
8008788: 080088a5 .word 0x080088a5
800878c: 08008823 .word 0x08008823
8008790: 080088a5 .word 0x080088a5
8008794: 080088a5 .word 0x080088a5
8008798: 080088a5 .word 0x080088a5
800879c: 08008863 .word 0x08008863
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
80087a0: 68fb ldr r3, [r7, #12]
80087a2: 681b ldr r3, [r3, #0]
80087a4: 68b9 ldr r1, [r7, #8]
80087a6: 4618 mov r0, r3
80087a8: f000 f9e6 bl 8008b78 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
80087ac: 68fb ldr r3, [r7, #12]
80087ae: 681b ldr r3, [r3, #0]
80087b0: 699a ldr r2, [r3, #24]
80087b2: 68fb ldr r3, [r7, #12]
80087b4: 681b ldr r3, [r3, #0]
80087b6: f042 0208 orr.w r2, r2, #8
80087ba: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
80087bc: 68fb ldr r3, [r7, #12]
80087be: 681b ldr r3, [r3, #0]
80087c0: 699a ldr r2, [r3, #24]
80087c2: 68fb ldr r3, [r7, #12]
80087c4: 681b ldr r3, [r3, #0]
80087c6: f022 0204 bic.w r2, r2, #4
80087ca: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
80087cc: 68fb ldr r3, [r7, #12]
80087ce: 681b ldr r3, [r3, #0]
80087d0: 6999 ldr r1, [r3, #24]
80087d2: 68bb ldr r3, [r7, #8]
80087d4: 691a ldr r2, [r3, #16]
80087d6: 68fb ldr r3, [r7, #12]
80087d8: 681b ldr r3, [r3, #0]
80087da: 430a orrs r2, r1
80087dc: 619a str r2, [r3, #24]
break;
80087de: e064 b.n 80088aa <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
80087e0: 68fb ldr r3, [r7, #12]
80087e2: 681b ldr r3, [r3, #0]
80087e4: 68b9 ldr r1, [r7, #8]
80087e6: 4618 mov r0, r3
80087e8: f000 fa2c bl 8008c44 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
80087ec: 68fb ldr r3, [r7, #12]
80087ee: 681b ldr r3, [r3, #0]
80087f0: 699a ldr r2, [r3, #24]
80087f2: 68fb ldr r3, [r7, #12]
80087f4: 681b ldr r3, [r3, #0]
80087f6: f442 6200 orr.w r2, r2, #2048 @ 0x800
80087fa: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
80087fc: 68fb ldr r3, [r7, #12]
80087fe: 681b ldr r3, [r3, #0]
8008800: 699a ldr r2, [r3, #24]
8008802: 68fb ldr r3, [r7, #12]
8008804: 681b ldr r3, [r3, #0]
8008806: f422 6280 bic.w r2, r2, #1024 @ 0x400
800880a: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
800880c: 68fb ldr r3, [r7, #12]
800880e: 681b ldr r3, [r3, #0]
8008810: 6999 ldr r1, [r3, #24]
8008812: 68bb ldr r3, [r7, #8]
8008814: 691b ldr r3, [r3, #16]
8008816: 021a lsls r2, r3, #8
8008818: 68fb ldr r3, [r7, #12]
800881a: 681b ldr r3, [r3, #0]
800881c: 430a orrs r2, r1
800881e: 619a str r2, [r3, #24]
break;
8008820: e043 b.n 80088aa <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8008822: 68fb ldr r3, [r7, #12]
8008824: 681b ldr r3, [r3, #0]
8008826: 68b9 ldr r1, [r7, #8]
8008828: 4618 mov r0, r3
800882a: f000 fa75 bl 8008d18 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
800882e: 68fb ldr r3, [r7, #12]
8008830: 681b ldr r3, [r3, #0]
8008832: 69da ldr r2, [r3, #28]
8008834: 68fb ldr r3, [r7, #12]
8008836: 681b ldr r3, [r3, #0]
8008838: f042 0208 orr.w r2, r2, #8
800883c: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
800883e: 68fb ldr r3, [r7, #12]
8008840: 681b ldr r3, [r3, #0]
8008842: 69da ldr r2, [r3, #28]
8008844: 68fb ldr r3, [r7, #12]
8008846: 681b ldr r3, [r3, #0]
8008848: f022 0204 bic.w r2, r2, #4
800884c: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
800884e: 68fb ldr r3, [r7, #12]
8008850: 681b ldr r3, [r3, #0]
8008852: 69d9 ldr r1, [r3, #28]
8008854: 68bb ldr r3, [r7, #8]
8008856: 691a ldr r2, [r3, #16]
8008858: 68fb ldr r3, [r7, #12]
800885a: 681b ldr r3, [r3, #0]
800885c: 430a orrs r2, r1
800885e: 61da str r2, [r3, #28]
break;
8008860: e023 b.n 80088aa <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
8008862: 68fb ldr r3, [r7, #12]
8008864: 681b ldr r3, [r3, #0]
8008866: 68b9 ldr r1, [r7, #8]
8008868: 4618 mov r0, r3
800886a: f000 fabf bl 8008dec <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
800886e: 68fb ldr r3, [r7, #12]
8008870: 681b ldr r3, [r3, #0]
8008872: 69da ldr r2, [r3, #28]
8008874: 68fb ldr r3, [r7, #12]
8008876: 681b ldr r3, [r3, #0]
8008878: f442 6200 orr.w r2, r2, #2048 @ 0x800
800887c: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
800887e: 68fb ldr r3, [r7, #12]
8008880: 681b ldr r3, [r3, #0]
8008882: 69da ldr r2, [r3, #28]
8008884: 68fb ldr r3, [r7, #12]
8008886: 681b ldr r3, [r3, #0]
8008888: f422 6280 bic.w r2, r2, #1024 @ 0x400
800888c: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
800888e: 68fb ldr r3, [r7, #12]
8008890: 681b ldr r3, [r3, #0]
8008892: 69d9 ldr r1, [r3, #28]
8008894: 68bb ldr r3, [r7, #8]
8008896: 691b ldr r3, [r3, #16]
8008898: 021a lsls r2, r3, #8
800889a: 68fb ldr r3, [r7, #12]
800889c: 681b ldr r3, [r3, #0]
800889e: 430a orrs r2, r1
80088a0: 61da str r2, [r3, #28]
break;
80088a2: e002 b.n 80088aa <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
80088a4: 2301 movs r3, #1
80088a6: 75fb strb r3, [r7, #23]
break;
80088a8: bf00 nop
}
__HAL_UNLOCK(htim);
80088aa: 68fb ldr r3, [r7, #12]
80088ac: 2200 movs r2, #0
80088ae: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
80088b2: 7dfb ldrb r3, [r7, #23]
}
80088b4: 4618 mov r0, r3
80088b6: 3718 adds r7, #24
80088b8: 46bd mov sp, r7
80088ba: bd80 pop {r7, pc}
080088bc <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
80088bc: b580 push {r7, lr}
80088be: b084 sub sp, #16
80088c0: af00 add r7, sp, #0
80088c2: 6078 str r0, [r7, #4]
80088c4: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
80088c6: 2300 movs r3, #0
80088c8: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
80088ca: 687b ldr r3, [r7, #4]
80088cc: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
80088d0: 2b01 cmp r3, #1
80088d2: d101 bne.n 80088d8 <HAL_TIM_ConfigClockSource+0x1c>
80088d4: 2302 movs r3, #2
80088d6: e0b4 b.n 8008a42 <HAL_TIM_ConfigClockSource+0x186>
80088d8: 687b ldr r3, [r7, #4]
80088da: 2201 movs r2, #1
80088dc: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
80088e0: 687b ldr r3, [r7, #4]
80088e2: 2202 movs r2, #2
80088e4: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
80088e8: 687b ldr r3, [r7, #4]
80088ea: 681b ldr r3, [r3, #0]
80088ec: 689b ldr r3, [r3, #8]
80088ee: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
80088f0: 68bb ldr r3, [r7, #8]
80088f2: f023 0377 bic.w r3, r3, #119 @ 0x77
80088f6: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
80088f8: 68bb ldr r3, [r7, #8]
80088fa: f423 437f bic.w r3, r3, #65280 @ 0xff00
80088fe: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
8008900: 687b ldr r3, [r7, #4]
8008902: 681b ldr r3, [r3, #0]
8008904: 68ba ldr r2, [r7, #8]
8008906: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8008908: 683b ldr r3, [r7, #0]
800890a: 681b ldr r3, [r3, #0]
800890c: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008910: d03e beq.n 8008990 <HAL_TIM_ConfigClockSource+0xd4>
8008912: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008916: f200 8087 bhi.w 8008a28 <HAL_TIM_ConfigClockSource+0x16c>
800891a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800891e: f000 8086 beq.w 8008a2e <HAL_TIM_ConfigClockSource+0x172>
8008922: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008926: d87f bhi.n 8008a28 <HAL_TIM_ConfigClockSource+0x16c>
8008928: 2b70 cmp r3, #112 @ 0x70
800892a: d01a beq.n 8008962 <HAL_TIM_ConfigClockSource+0xa6>
800892c: 2b70 cmp r3, #112 @ 0x70
800892e: d87b bhi.n 8008a28 <HAL_TIM_ConfigClockSource+0x16c>
8008930: 2b60 cmp r3, #96 @ 0x60
8008932: d050 beq.n 80089d6 <HAL_TIM_ConfigClockSource+0x11a>
8008934: 2b60 cmp r3, #96 @ 0x60
8008936: d877 bhi.n 8008a28 <HAL_TIM_ConfigClockSource+0x16c>
8008938: 2b50 cmp r3, #80 @ 0x50
800893a: d03c beq.n 80089b6 <HAL_TIM_ConfigClockSource+0xfa>
800893c: 2b50 cmp r3, #80 @ 0x50
800893e: d873 bhi.n 8008a28 <HAL_TIM_ConfigClockSource+0x16c>
8008940: 2b40 cmp r3, #64 @ 0x40
8008942: d058 beq.n 80089f6 <HAL_TIM_ConfigClockSource+0x13a>
8008944: 2b40 cmp r3, #64 @ 0x40
8008946: d86f bhi.n 8008a28 <HAL_TIM_ConfigClockSource+0x16c>
8008948: 2b30 cmp r3, #48 @ 0x30
800894a: d064 beq.n 8008a16 <HAL_TIM_ConfigClockSource+0x15a>
800894c: 2b30 cmp r3, #48 @ 0x30
800894e: d86b bhi.n 8008a28 <HAL_TIM_ConfigClockSource+0x16c>
8008950: 2b20 cmp r3, #32
8008952: d060 beq.n 8008a16 <HAL_TIM_ConfigClockSource+0x15a>
8008954: 2b20 cmp r3, #32
8008956: d867 bhi.n 8008a28 <HAL_TIM_ConfigClockSource+0x16c>
8008958: 2b00 cmp r3, #0
800895a: d05c beq.n 8008a16 <HAL_TIM_ConfigClockSource+0x15a>
800895c: 2b10 cmp r3, #16
800895e: d05a beq.n 8008a16 <HAL_TIM_ConfigClockSource+0x15a>
8008960: e062 b.n 8008a28 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8008962: 687b ldr r3, [r7, #4]
8008964: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8008966: 683b ldr r3, [r7, #0]
8008968: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
800896a: 683b ldr r3, [r7, #0]
800896c: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
800896e: 683b ldr r3, [r7, #0]
8008970: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8008972: f000 fb00 bl 8008f76 <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
8008976: 687b ldr r3, [r7, #4]
8008978: 681b ldr r3, [r3, #0]
800897a: 689b ldr r3, [r3, #8]
800897c: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
800897e: 68bb ldr r3, [r7, #8]
8008980: f043 0377 orr.w r3, r3, #119 @ 0x77
8008984: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8008986: 687b ldr r3, [r7, #4]
8008988: 681b ldr r3, [r3, #0]
800898a: 68ba ldr r2, [r7, #8]
800898c: 609a str r2, [r3, #8]
break;
800898e: e04f b.n 8008a30 <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8008990: 687b ldr r3, [r7, #4]
8008992: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8008994: 683b ldr r3, [r7, #0]
8008996: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8008998: 683b ldr r3, [r7, #0]
800899a: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
800899c: 683b ldr r3, [r7, #0]
800899e: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80089a0: f000 fae9 bl 8008f76 <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
80089a4: 687b ldr r3, [r7, #4]
80089a6: 681b ldr r3, [r3, #0]
80089a8: 689a ldr r2, [r3, #8]
80089aa: 687b ldr r3, [r7, #4]
80089ac: 681b ldr r3, [r3, #0]
80089ae: f442 4280 orr.w r2, r2, #16384 @ 0x4000
80089b2: 609a str r2, [r3, #8]
break;
80089b4: e03c b.n 8008a30 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
80089b6: 687b ldr r3, [r7, #4]
80089b8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80089ba: 683b ldr r3, [r7, #0]
80089bc: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80089be: 683b ldr r3, [r7, #0]
80089c0: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
80089c2: 461a mov r2, r3
80089c4: f000 fa60 bl 8008e88 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
80089c8: 687b ldr r3, [r7, #4]
80089ca: 681b ldr r3, [r3, #0]
80089cc: 2150 movs r1, #80 @ 0x50
80089ce: 4618 mov r0, r3
80089d0: f000 fab7 bl 8008f42 <TIM_ITRx_SetConfig>
break;
80089d4: e02c b.n 8008a30 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
80089d6: 687b ldr r3, [r7, #4]
80089d8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80089da: 683b ldr r3, [r7, #0]
80089dc: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80089de: 683b ldr r3, [r7, #0]
80089e0: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
80089e2: 461a mov r2, r3
80089e4: f000 fa7e bl 8008ee4 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
80089e8: 687b ldr r3, [r7, #4]
80089ea: 681b ldr r3, [r3, #0]
80089ec: 2160 movs r1, #96 @ 0x60
80089ee: 4618 mov r0, r3
80089f0: f000 faa7 bl 8008f42 <TIM_ITRx_SetConfig>
break;
80089f4: e01c b.n 8008a30 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
80089f6: 687b ldr r3, [r7, #4]
80089f8: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
80089fa: 683b ldr r3, [r7, #0]
80089fc: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
80089fe: 683b ldr r3, [r7, #0]
8008a00: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8008a02: 461a mov r2, r3
8008a04: f000 fa40 bl 8008e88 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8008a08: 687b ldr r3, [r7, #4]
8008a0a: 681b ldr r3, [r3, #0]
8008a0c: 2140 movs r1, #64 @ 0x40
8008a0e: 4618 mov r0, r3
8008a10: f000 fa97 bl 8008f42 <TIM_ITRx_SetConfig>
break;
8008a14: e00c b.n 8008a30 <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
8008a16: 687b ldr r3, [r7, #4]
8008a18: 681a ldr r2, [r3, #0]
8008a1a: 683b ldr r3, [r7, #0]
8008a1c: 681b ldr r3, [r3, #0]
8008a1e: 4619 mov r1, r3
8008a20: 4610 mov r0, r2
8008a22: f000 fa8e bl 8008f42 <TIM_ITRx_SetConfig>
break;
8008a26: e003 b.n 8008a30 <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8008a28: 2301 movs r3, #1
8008a2a: 73fb strb r3, [r7, #15]
break;
8008a2c: e000 b.n 8008a30 <HAL_TIM_ConfigClockSource+0x174>
break;
8008a2e: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
8008a30: 687b ldr r3, [r7, #4]
8008a32: 2201 movs r2, #1
8008a34: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8008a38: 687b ldr r3, [r7, #4]
8008a3a: 2200 movs r2, #0
8008a3c: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8008a40: 7bfb ldrb r3, [r7, #15]
}
8008a42: 4618 mov r0, r3
8008a44: 3710 adds r7, #16
8008a46: 46bd mov sp, r7
8008a48: bd80 pop {r7, pc}
08008a4a <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008a4a: b480 push {r7}
8008a4c: b085 sub sp, #20
8008a4e: af00 add r7, sp, #0
8008a50: 6078 str r0, [r7, #4]
8008a52: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
8008a54: 683b ldr r3, [r7, #0]
8008a56: 2b00 cmp r3, #0
8008a58: d104 bne.n 8008a64 <HAL_TIM_GetChannelState+0x1a>
8008a5a: 687b ldr r3, [r7, #4]
8008a5c: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8008a60: b2db uxtb r3, r3
8008a62: e013 b.n 8008a8c <HAL_TIM_GetChannelState+0x42>
8008a64: 683b ldr r3, [r7, #0]
8008a66: 2b04 cmp r3, #4
8008a68: d104 bne.n 8008a74 <HAL_TIM_GetChannelState+0x2a>
8008a6a: 687b ldr r3, [r7, #4]
8008a6c: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8008a70: b2db uxtb r3, r3
8008a72: e00b b.n 8008a8c <HAL_TIM_GetChannelState+0x42>
8008a74: 683b ldr r3, [r7, #0]
8008a76: 2b08 cmp r3, #8
8008a78: d104 bne.n 8008a84 <HAL_TIM_GetChannelState+0x3a>
8008a7a: 687b ldr r3, [r7, #4]
8008a7c: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8008a80: b2db uxtb r3, r3
8008a82: e003 b.n 8008a8c <HAL_TIM_GetChannelState+0x42>
8008a84: 687b ldr r3, [r7, #4]
8008a86: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8008a8a: b2db uxtb r3, r3
8008a8c: 73fb strb r3, [r7, #15]
return channel_state;
8008a8e: 7bfb ldrb r3, [r7, #15]
}
8008a90: 4618 mov r0, r3
8008a92: 3714 adds r7, #20
8008a94: 46bd mov sp, r7
8008a96: bc80 pop {r7}
8008a98: 4770 bx lr
...
08008a9c <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
8008a9c: b480 push {r7}
8008a9e: b085 sub sp, #20
8008aa0: af00 add r7, sp, #0
8008aa2: 6078 str r0, [r7, #4]
8008aa4: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
8008aa6: 687b ldr r3, [r7, #4]
8008aa8: 681b ldr r3, [r3, #0]
8008aaa: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8008aac: 687b ldr r3, [r7, #4]
8008aae: 4a2f ldr r2, [pc, #188] @ (8008b6c <TIM_Base_SetConfig+0xd0>)
8008ab0: 4293 cmp r3, r2
8008ab2: d00b beq.n 8008acc <TIM_Base_SetConfig+0x30>
8008ab4: 687b ldr r3, [r7, #4]
8008ab6: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008aba: d007 beq.n 8008acc <TIM_Base_SetConfig+0x30>
8008abc: 687b ldr r3, [r7, #4]
8008abe: 4a2c ldr r2, [pc, #176] @ (8008b70 <TIM_Base_SetConfig+0xd4>)
8008ac0: 4293 cmp r3, r2
8008ac2: d003 beq.n 8008acc <TIM_Base_SetConfig+0x30>
8008ac4: 687b ldr r3, [r7, #4]
8008ac6: 4a2b ldr r2, [pc, #172] @ (8008b74 <TIM_Base_SetConfig+0xd8>)
8008ac8: 4293 cmp r3, r2
8008aca: d108 bne.n 8008ade <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
8008acc: 68fb ldr r3, [r7, #12]
8008ace: f023 0370 bic.w r3, r3, #112 @ 0x70
8008ad2: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8008ad4: 683b ldr r3, [r7, #0]
8008ad6: 685b ldr r3, [r3, #4]
8008ad8: 68fa ldr r2, [r7, #12]
8008ada: 4313 orrs r3, r2
8008adc: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
8008ade: 687b ldr r3, [r7, #4]
8008ae0: 4a22 ldr r2, [pc, #136] @ (8008b6c <TIM_Base_SetConfig+0xd0>)
8008ae2: 4293 cmp r3, r2
8008ae4: d00b beq.n 8008afe <TIM_Base_SetConfig+0x62>
8008ae6: 687b ldr r3, [r7, #4]
8008ae8: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008aec: d007 beq.n 8008afe <TIM_Base_SetConfig+0x62>
8008aee: 687b ldr r3, [r7, #4]
8008af0: 4a1f ldr r2, [pc, #124] @ (8008b70 <TIM_Base_SetConfig+0xd4>)
8008af2: 4293 cmp r3, r2
8008af4: d003 beq.n 8008afe <TIM_Base_SetConfig+0x62>
8008af6: 687b ldr r3, [r7, #4]
8008af8: 4a1e ldr r2, [pc, #120] @ (8008b74 <TIM_Base_SetConfig+0xd8>)
8008afa: 4293 cmp r3, r2
8008afc: d108 bne.n 8008b10 <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
8008afe: 68fb ldr r3, [r7, #12]
8008b00: f423 7340 bic.w r3, r3, #768 @ 0x300
8008b04: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8008b06: 683b ldr r3, [r7, #0]
8008b08: 68db ldr r3, [r3, #12]
8008b0a: 68fa ldr r2, [r7, #12]
8008b0c: 4313 orrs r3, r2
8008b0e: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8008b10: 68fb ldr r3, [r7, #12]
8008b12: f023 0280 bic.w r2, r3, #128 @ 0x80
8008b16: 683b ldr r3, [r7, #0]
8008b18: 695b ldr r3, [r3, #20]
8008b1a: 4313 orrs r3, r2
8008b1c: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
8008b1e: 687b ldr r3, [r7, #4]
8008b20: 68fa ldr r2, [r7, #12]
8008b22: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8008b24: 683b ldr r3, [r7, #0]
8008b26: 689a ldr r2, [r3, #8]
8008b28: 687b ldr r3, [r7, #4]
8008b2a: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8008b2c: 683b ldr r3, [r7, #0]
8008b2e: 681a ldr r2, [r3, #0]
8008b30: 687b ldr r3, [r7, #4]
8008b32: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8008b34: 687b ldr r3, [r7, #4]
8008b36: 4a0d ldr r2, [pc, #52] @ (8008b6c <TIM_Base_SetConfig+0xd0>)
8008b38: 4293 cmp r3, r2
8008b3a: d103 bne.n 8008b44 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8008b3c: 683b ldr r3, [r7, #0]
8008b3e: 691a ldr r2, [r3, #16]
8008b40: 687b ldr r3, [r7, #4]
8008b42: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8008b44: 687b ldr r3, [r7, #4]
8008b46: 2201 movs r2, #1
8008b48: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
8008b4a: 687b ldr r3, [r7, #4]
8008b4c: 691b ldr r3, [r3, #16]
8008b4e: f003 0301 and.w r3, r3, #1
8008b52: 2b00 cmp r3, #0
8008b54: d005 beq.n 8008b62 <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
8008b56: 687b ldr r3, [r7, #4]
8008b58: 691b ldr r3, [r3, #16]
8008b5a: f023 0201 bic.w r2, r3, #1
8008b5e: 687b ldr r3, [r7, #4]
8008b60: 611a str r2, [r3, #16]
}
}
8008b62: bf00 nop
8008b64: 3714 adds r7, #20
8008b66: 46bd mov sp, r7
8008b68: bc80 pop {r7}
8008b6a: 4770 bx lr
8008b6c: 40012c00 .word 0x40012c00
8008b70: 40000400 .word 0x40000400
8008b74: 40000800 .word 0x40000800
08008b78 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008b78: b480 push {r7}
8008b7a: b087 sub sp, #28
8008b7c: af00 add r7, sp, #0
8008b7e: 6078 str r0, [r7, #4]
8008b80: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008b82: 687b ldr r3, [r7, #4]
8008b84: 6a1b ldr r3, [r3, #32]
8008b86: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
8008b88: 687b ldr r3, [r7, #4]
8008b8a: 6a1b ldr r3, [r3, #32]
8008b8c: f023 0201 bic.w r2, r3, #1
8008b90: 687b ldr r3, [r7, #4]
8008b92: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008b94: 687b ldr r3, [r7, #4]
8008b96: 685b ldr r3, [r3, #4]
8008b98: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8008b9a: 687b ldr r3, [r7, #4]
8008b9c: 699b ldr r3, [r3, #24]
8008b9e: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
8008ba0: 68fb ldr r3, [r7, #12]
8008ba2: f023 0370 bic.w r3, r3, #112 @ 0x70
8008ba6: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
8008ba8: 68fb ldr r3, [r7, #12]
8008baa: f023 0303 bic.w r3, r3, #3
8008bae: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8008bb0: 683b ldr r3, [r7, #0]
8008bb2: 681b ldr r3, [r3, #0]
8008bb4: 68fa ldr r2, [r7, #12]
8008bb6: 4313 orrs r3, r2
8008bb8: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
8008bba: 697b ldr r3, [r7, #20]
8008bbc: f023 0302 bic.w r3, r3, #2
8008bc0: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
8008bc2: 683b ldr r3, [r7, #0]
8008bc4: 689b ldr r3, [r3, #8]
8008bc6: 697a ldr r2, [r7, #20]
8008bc8: 4313 orrs r3, r2
8008bca: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
8008bcc: 687b ldr r3, [r7, #4]
8008bce: 4a1c ldr r2, [pc, #112] @ (8008c40 <TIM_OC1_SetConfig+0xc8>)
8008bd0: 4293 cmp r3, r2
8008bd2: d10c bne.n 8008bee <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
8008bd4: 697b ldr r3, [r7, #20]
8008bd6: f023 0308 bic.w r3, r3, #8
8008bda: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
8008bdc: 683b ldr r3, [r7, #0]
8008bde: 68db ldr r3, [r3, #12]
8008be0: 697a ldr r2, [r7, #20]
8008be2: 4313 orrs r3, r2
8008be4: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
8008be6: 697b ldr r3, [r7, #20]
8008be8: f023 0304 bic.w r3, r3, #4
8008bec: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008bee: 687b ldr r3, [r7, #4]
8008bf0: 4a13 ldr r2, [pc, #76] @ (8008c40 <TIM_OC1_SetConfig+0xc8>)
8008bf2: 4293 cmp r3, r2
8008bf4: d111 bne.n 8008c1a <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
8008bf6: 693b ldr r3, [r7, #16]
8008bf8: f423 7380 bic.w r3, r3, #256 @ 0x100
8008bfc: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
8008bfe: 693b ldr r3, [r7, #16]
8008c00: f423 7300 bic.w r3, r3, #512 @ 0x200
8008c04: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
8008c06: 683b ldr r3, [r7, #0]
8008c08: 695b ldr r3, [r3, #20]
8008c0a: 693a ldr r2, [r7, #16]
8008c0c: 4313 orrs r3, r2
8008c0e: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
8008c10: 683b ldr r3, [r7, #0]
8008c12: 699b ldr r3, [r3, #24]
8008c14: 693a ldr r2, [r7, #16]
8008c16: 4313 orrs r3, r2
8008c18: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008c1a: 687b ldr r3, [r7, #4]
8008c1c: 693a ldr r2, [r7, #16]
8008c1e: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8008c20: 687b ldr r3, [r7, #4]
8008c22: 68fa ldr r2, [r7, #12]
8008c24: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8008c26: 683b ldr r3, [r7, #0]
8008c28: 685a ldr r2, [r3, #4]
8008c2a: 687b ldr r3, [r7, #4]
8008c2c: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008c2e: 687b ldr r3, [r7, #4]
8008c30: 697a ldr r2, [r7, #20]
8008c32: 621a str r2, [r3, #32]
}
8008c34: bf00 nop
8008c36: 371c adds r7, #28
8008c38: 46bd mov sp, r7
8008c3a: bc80 pop {r7}
8008c3c: 4770 bx lr
8008c3e: bf00 nop
8008c40: 40012c00 .word 0x40012c00
08008c44 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008c44: b480 push {r7}
8008c46: b087 sub sp, #28
8008c48: af00 add r7, sp, #0
8008c4a: 6078 str r0, [r7, #4]
8008c4c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008c4e: 687b ldr r3, [r7, #4]
8008c50: 6a1b ldr r3, [r3, #32]
8008c52: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
8008c54: 687b ldr r3, [r7, #4]
8008c56: 6a1b ldr r3, [r3, #32]
8008c58: f023 0210 bic.w r2, r3, #16
8008c5c: 687b ldr r3, [r7, #4]
8008c5e: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008c60: 687b ldr r3, [r7, #4]
8008c62: 685b ldr r3, [r3, #4]
8008c64: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8008c66: 687b ldr r3, [r7, #4]
8008c68: 699b ldr r3, [r3, #24]
8008c6a: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
8008c6c: 68fb ldr r3, [r7, #12]
8008c6e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008c72: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
8008c74: 68fb ldr r3, [r7, #12]
8008c76: f423 7340 bic.w r3, r3, #768 @ 0x300
8008c7a: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8008c7c: 683b ldr r3, [r7, #0]
8008c7e: 681b ldr r3, [r3, #0]
8008c80: 021b lsls r3, r3, #8
8008c82: 68fa ldr r2, [r7, #12]
8008c84: 4313 orrs r3, r2
8008c86: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
8008c88: 697b ldr r3, [r7, #20]
8008c8a: f023 0320 bic.w r3, r3, #32
8008c8e: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
8008c90: 683b ldr r3, [r7, #0]
8008c92: 689b ldr r3, [r3, #8]
8008c94: 011b lsls r3, r3, #4
8008c96: 697a ldr r2, [r7, #20]
8008c98: 4313 orrs r3, r2
8008c9a: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
8008c9c: 687b ldr r3, [r7, #4]
8008c9e: 4a1d ldr r2, [pc, #116] @ (8008d14 <TIM_OC2_SetConfig+0xd0>)
8008ca0: 4293 cmp r3, r2
8008ca2: d10d bne.n 8008cc0 <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
8008ca4: 697b ldr r3, [r7, #20]
8008ca6: f023 0380 bic.w r3, r3, #128 @ 0x80
8008caa: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
8008cac: 683b ldr r3, [r7, #0]
8008cae: 68db ldr r3, [r3, #12]
8008cb0: 011b lsls r3, r3, #4
8008cb2: 697a ldr r2, [r7, #20]
8008cb4: 4313 orrs r3, r2
8008cb6: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
8008cb8: 697b ldr r3, [r7, #20]
8008cba: f023 0340 bic.w r3, r3, #64 @ 0x40
8008cbe: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008cc0: 687b ldr r3, [r7, #4]
8008cc2: 4a14 ldr r2, [pc, #80] @ (8008d14 <TIM_OC2_SetConfig+0xd0>)
8008cc4: 4293 cmp r3, r2
8008cc6: d113 bne.n 8008cf0 <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
8008cc8: 693b ldr r3, [r7, #16]
8008cca: f423 6380 bic.w r3, r3, #1024 @ 0x400
8008cce: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
8008cd0: 693b ldr r3, [r7, #16]
8008cd2: f423 6300 bic.w r3, r3, #2048 @ 0x800
8008cd6: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8008cd8: 683b ldr r3, [r7, #0]
8008cda: 695b ldr r3, [r3, #20]
8008cdc: 009b lsls r3, r3, #2
8008cde: 693a ldr r2, [r7, #16]
8008ce0: 4313 orrs r3, r2
8008ce2: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
8008ce4: 683b ldr r3, [r7, #0]
8008ce6: 699b ldr r3, [r3, #24]
8008ce8: 009b lsls r3, r3, #2
8008cea: 693a ldr r2, [r7, #16]
8008cec: 4313 orrs r3, r2
8008cee: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008cf0: 687b ldr r3, [r7, #4]
8008cf2: 693a ldr r2, [r7, #16]
8008cf4: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8008cf6: 687b ldr r3, [r7, #4]
8008cf8: 68fa ldr r2, [r7, #12]
8008cfa: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
8008cfc: 683b ldr r3, [r7, #0]
8008cfe: 685a ldr r2, [r3, #4]
8008d00: 687b ldr r3, [r7, #4]
8008d02: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008d04: 687b ldr r3, [r7, #4]
8008d06: 697a ldr r2, [r7, #20]
8008d08: 621a str r2, [r3, #32]
}
8008d0a: bf00 nop
8008d0c: 371c adds r7, #28
8008d0e: 46bd mov sp, r7
8008d10: bc80 pop {r7}
8008d12: 4770 bx lr
8008d14: 40012c00 .word 0x40012c00
08008d18 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008d18: b480 push {r7}
8008d1a: b087 sub sp, #28
8008d1c: af00 add r7, sp, #0
8008d1e: 6078 str r0, [r7, #4]
8008d20: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008d22: 687b ldr r3, [r7, #4]
8008d24: 6a1b ldr r3, [r3, #32]
8008d26: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8008d28: 687b ldr r3, [r7, #4]
8008d2a: 6a1b ldr r3, [r3, #32]
8008d2c: f423 7280 bic.w r2, r3, #256 @ 0x100
8008d30: 687b ldr r3, [r7, #4]
8008d32: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008d34: 687b ldr r3, [r7, #4]
8008d36: 685b ldr r3, [r3, #4]
8008d38: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8008d3a: 687b ldr r3, [r7, #4]
8008d3c: 69db ldr r3, [r3, #28]
8008d3e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
8008d40: 68fb ldr r3, [r7, #12]
8008d42: f023 0370 bic.w r3, r3, #112 @ 0x70
8008d46: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8008d48: 68fb ldr r3, [r7, #12]
8008d4a: f023 0303 bic.w r3, r3, #3
8008d4e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8008d50: 683b ldr r3, [r7, #0]
8008d52: 681b ldr r3, [r3, #0]
8008d54: 68fa ldr r2, [r7, #12]
8008d56: 4313 orrs r3, r2
8008d58: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
8008d5a: 697b ldr r3, [r7, #20]
8008d5c: f423 7300 bic.w r3, r3, #512 @ 0x200
8008d60: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
8008d62: 683b ldr r3, [r7, #0]
8008d64: 689b ldr r3, [r3, #8]
8008d66: 021b lsls r3, r3, #8
8008d68: 697a ldr r2, [r7, #20]
8008d6a: 4313 orrs r3, r2
8008d6c: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
8008d6e: 687b ldr r3, [r7, #4]
8008d70: 4a1d ldr r2, [pc, #116] @ (8008de8 <TIM_OC3_SetConfig+0xd0>)
8008d72: 4293 cmp r3, r2
8008d74: d10d bne.n 8008d92 <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
8008d76: 697b ldr r3, [r7, #20]
8008d78: f423 6300 bic.w r3, r3, #2048 @ 0x800
8008d7c: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
8008d7e: 683b ldr r3, [r7, #0]
8008d80: 68db ldr r3, [r3, #12]
8008d82: 021b lsls r3, r3, #8
8008d84: 697a ldr r2, [r7, #20]
8008d86: 4313 orrs r3, r2
8008d88: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
8008d8a: 697b ldr r3, [r7, #20]
8008d8c: f423 6380 bic.w r3, r3, #1024 @ 0x400
8008d90: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008d92: 687b ldr r3, [r7, #4]
8008d94: 4a14 ldr r2, [pc, #80] @ (8008de8 <TIM_OC3_SetConfig+0xd0>)
8008d96: 4293 cmp r3, r2
8008d98: d113 bne.n 8008dc2 <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
8008d9a: 693b ldr r3, [r7, #16]
8008d9c: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8008da0: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
8008da2: 693b ldr r3, [r7, #16]
8008da4: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8008da8: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
8008daa: 683b ldr r3, [r7, #0]
8008dac: 695b ldr r3, [r3, #20]
8008dae: 011b lsls r3, r3, #4
8008db0: 693a ldr r2, [r7, #16]
8008db2: 4313 orrs r3, r2
8008db4: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
8008db6: 683b ldr r3, [r7, #0]
8008db8: 699b ldr r3, [r3, #24]
8008dba: 011b lsls r3, r3, #4
8008dbc: 693a ldr r2, [r7, #16]
8008dbe: 4313 orrs r3, r2
8008dc0: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008dc2: 687b ldr r3, [r7, #4]
8008dc4: 693a ldr r2, [r7, #16]
8008dc6: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8008dc8: 687b ldr r3, [r7, #4]
8008dca: 68fa ldr r2, [r7, #12]
8008dcc: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
8008dce: 683b ldr r3, [r7, #0]
8008dd0: 685a ldr r2, [r3, #4]
8008dd2: 687b ldr r3, [r7, #4]
8008dd4: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008dd6: 687b ldr r3, [r7, #4]
8008dd8: 697a ldr r2, [r7, #20]
8008dda: 621a str r2, [r3, #32]
}
8008ddc: bf00 nop
8008dde: 371c adds r7, #28
8008de0: 46bd mov sp, r7
8008de2: bc80 pop {r7}
8008de4: 4770 bx lr
8008de6: bf00 nop
8008de8: 40012c00 .word 0x40012c00
08008dec <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008dec: b480 push {r7}
8008dee: b087 sub sp, #28
8008df0: af00 add r7, sp, #0
8008df2: 6078 str r0, [r7, #4]
8008df4: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008df6: 687b ldr r3, [r7, #4]
8008df8: 6a1b ldr r3, [r3, #32]
8008dfa: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
8008dfc: 687b ldr r3, [r7, #4]
8008dfe: 6a1b ldr r3, [r3, #32]
8008e00: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8008e04: 687b ldr r3, [r7, #4]
8008e06: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008e08: 687b ldr r3, [r7, #4]
8008e0a: 685b ldr r3, [r3, #4]
8008e0c: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8008e0e: 687b ldr r3, [r7, #4]
8008e10: 69db ldr r3, [r3, #28]
8008e12: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8008e14: 68fb ldr r3, [r7, #12]
8008e16: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8008e1a: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
8008e1c: 68fb ldr r3, [r7, #12]
8008e1e: f423 7340 bic.w r3, r3, #768 @ 0x300
8008e22: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8008e24: 683b ldr r3, [r7, #0]
8008e26: 681b ldr r3, [r3, #0]
8008e28: 021b lsls r3, r3, #8
8008e2a: 68fa ldr r2, [r7, #12]
8008e2c: 4313 orrs r3, r2
8008e2e: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8008e30: 693b ldr r3, [r7, #16]
8008e32: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8008e36: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8008e38: 683b ldr r3, [r7, #0]
8008e3a: 689b ldr r3, [r3, #8]
8008e3c: 031b lsls r3, r3, #12
8008e3e: 693a ldr r2, [r7, #16]
8008e40: 4313 orrs r3, r2
8008e42: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008e44: 687b ldr r3, [r7, #4]
8008e46: 4a0f ldr r2, [pc, #60] @ (8008e84 <TIM_OC4_SetConfig+0x98>)
8008e48: 4293 cmp r3, r2
8008e4a: d109 bne.n 8008e60 <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
8008e4c: 697b ldr r3, [r7, #20]
8008e4e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8008e52: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
8008e54: 683b ldr r3, [r7, #0]
8008e56: 695b ldr r3, [r3, #20]
8008e58: 019b lsls r3, r3, #6
8008e5a: 697a ldr r2, [r7, #20]
8008e5c: 4313 orrs r3, r2
8008e5e: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008e60: 687b ldr r3, [r7, #4]
8008e62: 697a ldr r2, [r7, #20]
8008e64: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8008e66: 687b ldr r3, [r7, #4]
8008e68: 68fa ldr r2, [r7, #12]
8008e6a: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
8008e6c: 683b ldr r3, [r7, #0]
8008e6e: 685a ldr r2, [r3, #4]
8008e70: 687b ldr r3, [r7, #4]
8008e72: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008e74: 687b ldr r3, [r7, #4]
8008e76: 693a ldr r2, [r7, #16]
8008e78: 621a str r2, [r3, #32]
}
8008e7a: bf00 nop
8008e7c: 371c adds r7, #28
8008e7e: 46bd mov sp, r7
8008e80: bc80 pop {r7}
8008e82: 4770 bx lr
8008e84: 40012c00 .word 0x40012c00
08008e88 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8008e88: b480 push {r7}
8008e8a: b087 sub sp, #28
8008e8c: af00 add r7, sp, #0
8008e8e: 60f8 str r0, [r7, #12]
8008e90: 60b9 str r1, [r7, #8]
8008e92: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
8008e94: 68fb ldr r3, [r7, #12]
8008e96: 6a1b ldr r3, [r3, #32]
8008e98: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
8008e9a: 68fb ldr r3, [r7, #12]
8008e9c: 6a1b ldr r3, [r3, #32]
8008e9e: f023 0201 bic.w r2, r3, #1
8008ea2: 68fb ldr r3, [r7, #12]
8008ea4: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8008ea6: 68fb ldr r3, [r7, #12]
8008ea8: 699b ldr r3, [r3, #24]
8008eaa: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
8008eac: 693b ldr r3, [r7, #16]
8008eae: f023 03f0 bic.w r3, r3, #240 @ 0xf0
8008eb2: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
8008eb4: 687b ldr r3, [r7, #4]
8008eb6: 011b lsls r3, r3, #4
8008eb8: 693a ldr r2, [r7, #16]
8008eba: 4313 orrs r3, r2
8008ebc: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
8008ebe: 697b ldr r3, [r7, #20]
8008ec0: f023 030a bic.w r3, r3, #10
8008ec4: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
8008ec6: 697a ldr r2, [r7, #20]
8008ec8: 68bb ldr r3, [r7, #8]
8008eca: 4313 orrs r3, r2
8008ecc: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
8008ece: 68fb ldr r3, [r7, #12]
8008ed0: 693a ldr r2, [r7, #16]
8008ed2: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8008ed4: 68fb ldr r3, [r7, #12]
8008ed6: 697a ldr r2, [r7, #20]
8008ed8: 621a str r2, [r3, #32]
}
8008eda: bf00 nop
8008edc: 371c adds r7, #28
8008ede: 46bd mov sp, r7
8008ee0: bc80 pop {r7}
8008ee2: 4770 bx lr
08008ee4 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8008ee4: b480 push {r7}
8008ee6: b087 sub sp, #28
8008ee8: af00 add r7, sp, #0
8008eea: 60f8 str r0, [r7, #12]
8008eec: 60b9 str r1, [r7, #8]
8008eee: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
8008ef0: 68fb ldr r3, [r7, #12]
8008ef2: 6a1b ldr r3, [r3, #32]
8008ef4: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
8008ef6: 68fb ldr r3, [r7, #12]
8008ef8: 6a1b ldr r3, [r3, #32]
8008efa: f023 0210 bic.w r2, r3, #16
8008efe: 68fb ldr r3, [r7, #12]
8008f00: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8008f02: 68fb ldr r3, [r7, #12]
8008f04: 699b ldr r3, [r3, #24]
8008f06: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
8008f08: 693b ldr r3, [r7, #16]
8008f0a: f423 4370 bic.w r3, r3, #61440 @ 0xf000
8008f0e: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
8008f10: 687b ldr r3, [r7, #4]
8008f12: 031b lsls r3, r3, #12
8008f14: 693a ldr r2, [r7, #16]
8008f16: 4313 orrs r3, r2
8008f18: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8008f1a: 697b ldr r3, [r7, #20]
8008f1c: f023 03a0 bic.w r3, r3, #160 @ 0xa0
8008f20: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
8008f22: 68bb ldr r3, [r7, #8]
8008f24: 011b lsls r3, r3, #4
8008f26: 697a ldr r2, [r7, #20]
8008f28: 4313 orrs r3, r2
8008f2a: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8008f2c: 68fb ldr r3, [r7, #12]
8008f2e: 693a ldr r2, [r7, #16]
8008f30: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8008f32: 68fb ldr r3, [r7, #12]
8008f34: 697a ldr r2, [r7, #20]
8008f36: 621a str r2, [r3, #32]
}
8008f38: bf00 nop
8008f3a: 371c adds r7, #28
8008f3c: 46bd mov sp, r7
8008f3e: bc80 pop {r7}
8008f40: 4770 bx lr
08008f42 <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
8008f42: b480 push {r7}
8008f44: b085 sub sp, #20
8008f46: af00 add r7, sp, #0
8008f48: 6078 str r0, [r7, #4]
8008f4a: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8008f4c: 687b ldr r3, [r7, #4]
8008f4e: 689b ldr r3, [r3, #8]
8008f50: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
8008f52: 68fb ldr r3, [r7, #12]
8008f54: f023 0370 bic.w r3, r3, #112 @ 0x70
8008f58: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
8008f5a: 683a ldr r2, [r7, #0]
8008f5c: 68fb ldr r3, [r7, #12]
8008f5e: 4313 orrs r3, r2
8008f60: f043 0307 orr.w r3, r3, #7
8008f64: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8008f66: 687b ldr r3, [r7, #4]
8008f68: 68fa ldr r2, [r7, #12]
8008f6a: 609a str r2, [r3, #8]
}
8008f6c: bf00 nop
8008f6e: 3714 adds r7, #20
8008f70: 46bd mov sp, r7
8008f72: bc80 pop {r7}
8008f74: 4770 bx lr
08008f76 <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
8008f76: b480 push {r7}
8008f78: b087 sub sp, #28
8008f7a: af00 add r7, sp, #0
8008f7c: 60f8 str r0, [r7, #12]
8008f7e: 60b9 str r1, [r7, #8]
8008f80: 607a str r2, [r7, #4]
8008f82: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
8008f84: 68fb ldr r3, [r7, #12]
8008f86: 689b ldr r3, [r3, #8]
8008f88: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8008f8a: 697b ldr r3, [r7, #20]
8008f8c: f423 437f bic.w r3, r3, #65280 @ 0xff00
8008f90: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
8008f92: 683b ldr r3, [r7, #0]
8008f94: 021a lsls r2, r3, #8
8008f96: 687b ldr r3, [r7, #4]
8008f98: 431a orrs r2, r3
8008f9a: 68bb ldr r3, [r7, #8]
8008f9c: 4313 orrs r3, r2
8008f9e: 697a ldr r2, [r7, #20]
8008fa0: 4313 orrs r3, r2
8008fa2: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8008fa4: 68fb ldr r3, [r7, #12]
8008fa6: 697a ldr r2, [r7, #20]
8008fa8: 609a str r2, [r3, #8]
}
8008faa: bf00 nop
8008fac: 371c adds r7, #28
8008fae: 46bd mov sp, r7
8008fb0: bc80 pop {r7}
8008fb2: 4770 bx lr
08008fb4 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8008fb4: b480 push {r7}
8008fb6: b087 sub sp, #28
8008fb8: af00 add r7, sp, #0
8008fba: 60f8 str r0, [r7, #12]
8008fbc: 60b9 str r1, [r7, #8]
8008fbe: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
8008fc0: 68bb ldr r3, [r7, #8]
8008fc2: f003 031f and.w r3, r3, #31
8008fc6: 2201 movs r2, #1
8008fc8: fa02 f303 lsl.w r3, r2, r3
8008fcc: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
8008fce: 68fb ldr r3, [r7, #12]
8008fd0: 6a1a ldr r2, [r3, #32]
8008fd2: 697b ldr r3, [r7, #20]
8008fd4: 43db mvns r3, r3
8008fd6: 401a ands r2, r3
8008fd8: 68fb ldr r3, [r7, #12]
8008fda: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8008fdc: 68fb ldr r3, [r7, #12]
8008fde: 6a1a ldr r2, [r3, #32]
8008fe0: 68bb ldr r3, [r7, #8]
8008fe2: f003 031f and.w r3, r3, #31
8008fe6: 6879 ldr r1, [r7, #4]
8008fe8: fa01 f303 lsl.w r3, r1, r3
8008fec: 431a orrs r2, r3
8008fee: 68fb ldr r3, [r7, #12]
8008ff0: 621a str r2, [r3, #32]
}
8008ff2: bf00 nop
8008ff4: 371c adds r7, #28
8008ff6: 46bd mov sp, r7
8008ff8: bc80 pop {r7}
8008ffa: 4770 bx lr
08008ffc <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8008ffc: b480 push {r7}
8008ffe: b085 sub sp, #20
8009000: af00 add r7, sp, #0
8009002: 6078 str r0, [r7, #4]
8009004: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8009006: 687b ldr r3, [r7, #4]
8009008: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
800900c: 2b01 cmp r3, #1
800900e: d101 bne.n 8009014 <HAL_TIMEx_MasterConfigSynchronization+0x18>
8009010: 2302 movs r3, #2
8009012: e046 b.n 80090a2 <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8009014: 687b ldr r3, [r7, #4]
8009016: 2201 movs r2, #1
8009018: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
800901c: 687b ldr r3, [r7, #4]
800901e: 2202 movs r2, #2
8009020: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8009024: 687b ldr r3, [r7, #4]
8009026: 681b ldr r3, [r3, #0]
8009028: 685b ldr r3, [r3, #4]
800902a: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
800902c: 687b ldr r3, [r7, #4]
800902e: 681b ldr r3, [r3, #0]
8009030: 689b ldr r3, [r3, #8]
8009032: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8009034: 68fb ldr r3, [r7, #12]
8009036: f023 0370 bic.w r3, r3, #112 @ 0x70
800903a: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
800903c: 683b ldr r3, [r7, #0]
800903e: 681b ldr r3, [r3, #0]
8009040: 68fa ldr r2, [r7, #12]
8009042: 4313 orrs r3, r2
8009044: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8009046: 687b ldr r3, [r7, #4]
8009048: 681b ldr r3, [r3, #0]
800904a: 68fa ldr r2, [r7, #12]
800904c: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
800904e: 687b ldr r3, [r7, #4]
8009050: 681b ldr r3, [r3, #0]
8009052: 4a16 ldr r2, [pc, #88] @ (80090ac <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8009054: 4293 cmp r3, r2
8009056: d00e beq.n 8009076 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8009058: 687b ldr r3, [r7, #4]
800905a: 681b ldr r3, [r3, #0]
800905c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8009060: d009 beq.n 8009076 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8009062: 687b ldr r3, [r7, #4]
8009064: 681b ldr r3, [r3, #0]
8009066: 4a12 ldr r2, [pc, #72] @ (80090b0 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
8009068: 4293 cmp r3, r2
800906a: d004 beq.n 8009076 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
800906c: 687b ldr r3, [r7, #4]
800906e: 681b ldr r3, [r3, #0]
8009070: 4a10 ldr r2, [pc, #64] @ (80090b4 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
8009072: 4293 cmp r3, r2
8009074: d10c bne.n 8009090 <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8009076: 68bb ldr r3, [r7, #8]
8009078: f023 0380 bic.w r3, r3, #128 @ 0x80
800907c: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
800907e: 683b ldr r3, [r7, #0]
8009080: 685b ldr r3, [r3, #4]
8009082: 68ba ldr r2, [r7, #8]
8009084: 4313 orrs r3, r2
8009086: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8009088: 687b ldr r3, [r7, #4]
800908a: 681b ldr r3, [r3, #0]
800908c: 68ba ldr r2, [r7, #8]
800908e: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8009090: 687b ldr r3, [r7, #4]
8009092: 2201 movs r2, #1
8009094: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8009098: 687b ldr r3, [r7, #4]
800909a: 2200 movs r2, #0
800909c: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
80090a0: 2300 movs r3, #0
}
80090a2: 4618 mov r0, r3
80090a4: 3714 adds r7, #20
80090a6: 46bd mov sp, r7
80090a8: bc80 pop {r7}
80090aa: 4770 bx lr
80090ac: 40012c00 .word 0x40012c00
80090b0: 40000400 .word 0x40000400
80090b4: 40000800 .word 0x40000800
080090b8 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
80090b8: b580 push {r7, lr}
80090ba: b082 sub sp, #8
80090bc: af00 add r7, sp, #0
80090be: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
80090c0: 687b ldr r3, [r7, #4]
80090c2: 2b00 cmp r3, #0
80090c4: d101 bne.n 80090ca <HAL_UART_Init+0x12>
{
return HAL_ERROR;
80090c6: 2301 movs r3, #1
80090c8: e042 b.n 8009150 <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
80090ca: 687b ldr r3, [r7, #4]
80090cc: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80090d0: b2db uxtb r3, r3
80090d2: 2b00 cmp r3, #0
80090d4: d106 bne.n 80090e4 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
80090d6: 687b ldr r3, [r7, #4]
80090d8: 2200 movs r2, #0
80090da: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
80090de: 6878 ldr r0, [r7, #4]
80090e0: f7fb fb80 bl 80047e4 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
80090e4: 687b ldr r3, [r7, #4]
80090e6: 2224 movs r2, #36 @ 0x24
80090e8: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
80090ec: 687b ldr r3, [r7, #4]
80090ee: 681b ldr r3, [r3, #0]
80090f0: 68da ldr r2, [r3, #12]
80090f2: 687b ldr r3, [r7, #4]
80090f4: 681b ldr r3, [r3, #0]
80090f6: f422 5200 bic.w r2, r2, #8192 @ 0x2000
80090fa: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
80090fc: 6878 ldr r0, [r7, #4]
80090fe: f000 f971 bl 80093e4 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
8009102: 687b ldr r3, [r7, #4]
8009104: 681b ldr r3, [r3, #0]
8009106: 691a ldr r2, [r3, #16]
8009108: 687b ldr r3, [r7, #4]
800910a: 681b ldr r3, [r3, #0]
800910c: f422 4290 bic.w r2, r2, #18432 @ 0x4800
8009110: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
8009112: 687b ldr r3, [r7, #4]
8009114: 681b ldr r3, [r3, #0]
8009116: 695a ldr r2, [r3, #20]
8009118: 687b ldr r3, [r7, #4]
800911a: 681b ldr r3, [r3, #0]
800911c: f022 022a bic.w r2, r2, #42 @ 0x2a
8009120: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
8009122: 687b ldr r3, [r7, #4]
8009124: 681b ldr r3, [r3, #0]
8009126: 68da ldr r2, [r3, #12]
8009128: 687b ldr r3, [r7, #4]
800912a: 681b ldr r3, [r3, #0]
800912c: f442 5200 orr.w r2, r2, #8192 @ 0x2000
8009130: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8009132: 687b ldr r3, [r7, #4]
8009134: 2200 movs r2, #0
8009136: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
8009138: 687b ldr r3, [r7, #4]
800913a: 2220 movs r2, #32
800913c: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
8009140: 687b ldr r3, [r7, #4]
8009142: 2220 movs r2, #32
8009144: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
8009148: 687b ldr r3, [r7, #4]
800914a: 2200 movs r2, #0
800914c: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
800914e: 2300 movs r3, #0
}
8009150: 4618 mov r0, r3
8009152: 3708 adds r7, #8
8009154: 46bd mov sp, r7
8009156: bd80 pop {r7, pc}
08009158 <HAL_UART_Transmit>:
* @param Size Amount of data elements (u8 or u16) to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
8009158: b580 push {r7, lr}
800915a: b08a sub sp, #40 @ 0x28
800915c: af02 add r7, sp, #8
800915e: 60f8 str r0, [r7, #12]
8009160: 60b9 str r1, [r7, #8]
8009162: 603b str r3, [r7, #0]
8009164: 4613 mov r3, r2
8009166: 80fb strh r3, [r7, #6]
const uint8_t *pdata8bits;
const uint16_t *pdata16bits;
uint32_t tickstart = 0U;
8009168: 2300 movs r3, #0
800916a: 617b str r3, [r7, #20]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
800916c: 68fb ldr r3, [r7, #12]
800916e: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8009172: b2db uxtb r3, r3
8009174: 2b20 cmp r3, #32
8009176: d175 bne.n 8009264 <HAL_UART_Transmit+0x10c>
{
if ((pData == NULL) || (Size == 0U))
8009178: 68bb ldr r3, [r7, #8]
800917a: 2b00 cmp r3, #0
800917c: d002 beq.n 8009184 <HAL_UART_Transmit+0x2c>
800917e: 88fb ldrh r3, [r7, #6]
8009180: 2b00 cmp r3, #0
8009182: d101 bne.n 8009188 <HAL_UART_Transmit+0x30>
{
return HAL_ERROR;
8009184: 2301 movs r3, #1
8009186: e06e b.n 8009266 <HAL_UART_Transmit+0x10e>
}
huart->ErrorCode = HAL_UART_ERROR_NONE;
8009188: 68fb ldr r3, [r7, #12]
800918a: 2200 movs r2, #0
800918c: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_BUSY_TX;
800918e: 68fb ldr r3, [r7, #12]
8009190: 2221 movs r2, #33 @ 0x21
8009192: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
8009196: f7fb fc6d bl 8004a74 <HAL_GetTick>
800919a: 6178 str r0, [r7, #20]
huart->TxXferSize = Size;
800919c: 68fb ldr r3, [r7, #12]
800919e: 88fa ldrh r2, [r7, #6]
80091a0: 849a strh r2, [r3, #36] @ 0x24
huart->TxXferCount = Size;
80091a2: 68fb ldr r3, [r7, #12]
80091a4: 88fa ldrh r2, [r7, #6]
80091a6: 84da strh r2, [r3, #38] @ 0x26
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
80091a8: 68fb ldr r3, [r7, #12]
80091aa: 689b ldr r3, [r3, #8]
80091ac: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
80091b0: d108 bne.n 80091c4 <HAL_UART_Transmit+0x6c>
80091b2: 68fb ldr r3, [r7, #12]
80091b4: 691b ldr r3, [r3, #16]
80091b6: 2b00 cmp r3, #0
80091b8: d104 bne.n 80091c4 <HAL_UART_Transmit+0x6c>
{
pdata8bits = NULL;
80091ba: 2300 movs r3, #0
80091bc: 61fb str r3, [r7, #28]
pdata16bits = (const uint16_t *) pData;
80091be: 68bb ldr r3, [r7, #8]
80091c0: 61bb str r3, [r7, #24]
80091c2: e003 b.n 80091cc <HAL_UART_Transmit+0x74>
}
else
{
pdata8bits = pData;
80091c4: 68bb ldr r3, [r7, #8]
80091c6: 61fb str r3, [r7, #28]
pdata16bits = NULL;
80091c8: 2300 movs r3, #0
80091ca: 61bb str r3, [r7, #24]
}
while (huart->TxXferCount > 0U)
80091cc: e02e b.n 800922c <HAL_UART_Transmit+0xd4>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
80091ce: 683b ldr r3, [r7, #0]
80091d0: 9300 str r3, [sp, #0]
80091d2: 697b ldr r3, [r7, #20]
80091d4: 2200 movs r2, #0
80091d6: 2180 movs r1, #128 @ 0x80
80091d8: 68f8 ldr r0, [r7, #12]
80091da: f000 f848 bl 800926e <UART_WaitOnFlagUntilTimeout>
80091de: 4603 mov r3, r0
80091e0: 2b00 cmp r3, #0
80091e2: d005 beq.n 80091f0 <HAL_UART_Transmit+0x98>
{
huart->gState = HAL_UART_STATE_READY;
80091e4: 68fb ldr r3, [r7, #12]
80091e6: 2220 movs r2, #32
80091e8: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
80091ec: 2303 movs r3, #3
80091ee: e03a b.n 8009266 <HAL_UART_Transmit+0x10e>
}
if (pdata8bits == NULL)
80091f0: 69fb ldr r3, [r7, #28]
80091f2: 2b00 cmp r3, #0
80091f4: d10b bne.n 800920e <HAL_UART_Transmit+0xb6>
{
huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
80091f6: 69bb ldr r3, [r7, #24]
80091f8: 881b ldrh r3, [r3, #0]
80091fa: 461a mov r2, r3
80091fc: 68fb ldr r3, [r7, #12]
80091fe: 681b ldr r3, [r3, #0]
8009200: f3c2 0208 ubfx r2, r2, #0, #9
8009204: 605a str r2, [r3, #4]
pdata16bits++;
8009206: 69bb ldr r3, [r7, #24]
8009208: 3302 adds r3, #2
800920a: 61bb str r3, [r7, #24]
800920c: e007 b.n 800921e <HAL_UART_Transmit+0xc6>
}
else
{
huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
800920e: 69fb ldr r3, [r7, #28]
8009210: 781a ldrb r2, [r3, #0]
8009212: 68fb ldr r3, [r7, #12]
8009214: 681b ldr r3, [r3, #0]
8009216: 605a str r2, [r3, #4]
pdata8bits++;
8009218: 69fb ldr r3, [r7, #28]
800921a: 3301 adds r3, #1
800921c: 61fb str r3, [r7, #28]
}
huart->TxXferCount--;
800921e: 68fb ldr r3, [r7, #12]
8009220: 8cdb ldrh r3, [r3, #38] @ 0x26
8009222: b29b uxth r3, r3
8009224: 3b01 subs r3, #1
8009226: b29a uxth r2, r3
8009228: 68fb ldr r3, [r7, #12]
800922a: 84da strh r2, [r3, #38] @ 0x26
while (huart->TxXferCount > 0U)
800922c: 68fb ldr r3, [r7, #12]
800922e: 8cdb ldrh r3, [r3, #38] @ 0x26
8009230: b29b uxth r3, r3
8009232: 2b00 cmp r3, #0
8009234: d1cb bne.n 80091ce <HAL_UART_Transmit+0x76>
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
8009236: 683b ldr r3, [r7, #0]
8009238: 9300 str r3, [sp, #0]
800923a: 697b ldr r3, [r7, #20]
800923c: 2200 movs r2, #0
800923e: 2140 movs r1, #64 @ 0x40
8009240: 68f8 ldr r0, [r7, #12]
8009242: f000 f814 bl 800926e <UART_WaitOnFlagUntilTimeout>
8009246: 4603 mov r3, r0
8009248: 2b00 cmp r3, #0
800924a: d005 beq.n 8009258 <HAL_UART_Transmit+0x100>
{
huart->gState = HAL_UART_STATE_READY;
800924c: 68fb ldr r3, [r7, #12]
800924e: 2220 movs r2, #32
8009250: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
8009254: 2303 movs r3, #3
8009256: e006 b.n 8009266 <HAL_UART_Transmit+0x10e>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
8009258: 68fb ldr r3, [r7, #12]
800925a: 2220 movs r2, #32
800925c: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_OK;
8009260: 2300 movs r3, #0
8009262: e000 b.n 8009266 <HAL_UART_Transmit+0x10e>
}
else
{
return HAL_BUSY;
8009264: 2302 movs r3, #2
}
}
8009266: 4618 mov r0, r3
8009268: 3720 adds r7, #32
800926a: 46bd mov sp, r7
800926c: bd80 pop {r7, pc}
0800926e <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
800926e: b580 push {r7, lr}
8009270: b086 sub sp, #24
8009272: af00 add r7, sp, #0
8009274: 60f8 str r0, [r7, #12]
8009276: 60b9 str r1, [r7, #8]
8009278: 603b str r3, [r7, #0]
800927a: 4613 mov r3, r2
800927c: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
800927e: e03b b.n 80092f8 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8009280: 6a3b ldr r3, [r7, #32]
8009282: f1b3 3fff cmp.w r3, #4294967295
8009286: d037 beq.n 80092f8 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8009288: f7fb fbf4 bl 8004a74 <HAL_GetTick>
800928c: 4602 mov r2, r0
800928e: 683b ldr r3, [r7, #0]
8009290: 1ad3 subs r3, r2, r3
8009292: 6a3a ldr r2, [r7, #32]
8009294: 429a cmp r2, r3
8009296: d302 bcc.n 800929e <UART_WaitOnFlagUntilTimeout+0x30>
8009298: 6a3b ldr r3, [r7, #32]
800929a: 2b00 cmp r3, #0
800929c: d101 bne.n 80092a2 <UART_WaitOnFlagUntilTimeout+0x34>
{
return HAL_TIMEOUT;
800929e: 2303 movs r3, #3
80092a0: e03a b.n 8009318 <UART_WaitOnFlagUntilTimeout+0xaa>
}
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
80092a2: 68fb ldr r3, [r7, #12]
80092a4: 681b ldr r3, [r3, #0]
80092a6: 68db ldr r3, [r3, #12]
80092a8: f003 0304 and.w r3, r3, #4
80092ac: 2b00 cmp r3, #0
80092ae: d023 beq.n 80092f8 <UART_WaitOnFlagUntilTimeout+0x8a>
80092b0: 68bb ldr r3, [r7, #8]
80092b2: 2b80 cmp r3, #128 @ 0x80
80092b4: d020 beq.n 80092f8 <UART_WaitOnFlagUntilTimeout+0x8a>
80092b6: 68bb ldr r3, [r7, #8]
80092b8: 2b40 cmp r3, #64 @ 0x40
80092ba: d01d beq.n 80092f8 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
80092bc: 68fb ldr r3, [r7, #12]
80092be: 681b ldr r3, [r3, #0]
80092c0: 681b ldr r3, [r3, #0]
80092c2: f003 0308 and.w r3, r3, #8
80092c6: 2b08 cmp r3, #8
80092c8: d116 bne.n 80092f8 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Clear Overrun Error flag*/
__HAL_UART_CLEAR_OREFLAG(huart);
80092ca: 2300 movs r3, #0
80092cc: 617b str r3, [r7, #20]
80092ce: 68fb ldr r3, [r7, #12]
80092d0: 681b ldr r3, [r3, #0]
80092d2: 681b ldr r3, [r3, #0]
80092d4: 617b str r3, [r7, #20]
80092d6: 68fb ldr r3, [r7, #12]
80092d8: 681b ldr r3, [r3, #0]
80092da: 685b ldr r3, [r3, #4]
80092dc: 617b str r3, [r7, #20]
80092de: 697b ldr r3, [r7, #20]
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
80092e0: 68f8 ldr r0, [r7, #12]
80092e2: f000 f81d bl 8009320 <UART_EndRxTransfer>
huart->ErrorCode = HAL_UART_ERROR_ORE;
80092e6: 68fb ldr r3, [r7, #12]
80092e8: 2208 movs r2, #8
80092ea: 645a str r2, [r3, #68] @ 0x44
/* Process Unlocked */
__HAL_UNLOCK(huart);
80092ec: 68fb ldr r3, [r7, #12]
80092ee: 2200 movs r2, #0
80092f0: f883 2040 strb.w r2, [r3, #64] @ 0x40
return HAL_ERROR;
80092f4: 2301 movs r3, #1
80092f6: e00f b.n 8009318 <UART_WaitOnFlagUntilTimeout+0xaa>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
80092f8: 68fb ldr r3, [r7, #12]
80092fa: 681b ldr r3, [r3, #0]
80092fc: 681a ldr r2, [r3, #0]
80092fe: 68bb ldr r3, [r7, #8]
8009300: 4013 ands r3, r2
8009302: 68ba ldr r2, [r7, #8]
8009304: 429a cmp r2, r3
8009306: bf0c ite eq
8009308: 2301 moveq r3, #1
800930a: 2300 movne r3, #0
800930c: b2db uxtb r3, r3
800930e: 461a mov r2, r3
8009310: 79fb ldrb r3, [r7, #7]
8009312: 429a cmp r2, r3
8009314: d0b4 beq.n 8009280 <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
8009316: 2300 movs r3, #0
}
8009318: 4618 mov r0, r3
800931a: 3718 adds r7, #24
800931c: 46bd mov sp, r7
800931e: bd80 pop {r7, pc}
08009320 <UART_EndRxTransfer>:
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
* @param huart UART handle.
* @retval None
*/
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
8009320: b480 push {r7}
8009322: b095 sub sp, #84 @ 0x54
8009324: af00 add r7, sp, #0
8009326: 6078 str r0, [r7, #4]
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
8009328: 687b ldr r3, [r7, #4]
800932a: 681b ldr r3, [r3, #0]
800932c: 330c adds r3, #12
800932e: 637b str r3, [r7, #52] @ 0x34
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009330: 6b7b ldr r3, [r7, #52] @ 0x34
8009332: e853 3f00 ldrex r3, [r3]
8009336: 633b str r3, [r7, #48] @ 0x30
return(result);
8009338: 6b3b ldr r3, [r7, #48] @ 0x30
800933a: f423 7390 bic.w r3, r3, #288 @ 0x120
800933e: 64fb str r3, [r7, #76] @ 0x4c
8009340: 687b ldr r3, [r7, #4]
8009342: 681b ldr r3, [r3, #0]
8009344: 330c adds r3, #12
8009346: 6cfa ldr r2, [r7, #76] @ 0x4c
8009348: 643a str r2, [r7, #64] @ 0x40
800934a: 63fb str r3, [r7, #60] @ 0x3c
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
800934c: 6bf9 ldr r1, [r7, #60] @ 0x3c
800934e: 6c3a ldr r2, [r7, #64] @ 0x40
8009350: e841 2300 strex r3, r2, [r1]
8009354: 63bb str r3, [r7, #56] @ 0x38
return(result);
8009356: 6bbb ldr r3, [r7, #56] @ 0x38
8009358: 2b00 cmp r3, #0
800935a: d1e5 bne.n 8009328 <UART_EndRxTransfer+0x8>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
800935c: 687b ldr r3, [r7, #4]
800935e: 681b ldr r3, [r3, #0]
8009360: 3314 adds r3, #20
8009362: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009364: 6a3b ldr r3, [r7, #32]
8009366: e853 3f00 ldrex r3, [r3]
800936a: 61fb str r3, [r7, #28]
return(result);
800936c: 69fb ldr r3, [r7, #28]
800936e: f023 0301 bic.w r3, r3, #1
8009372: 64bb str r3, [r7, #72] @ 0x48
8009374: 687b ldr r3, [r7, #4]
8009376: 681b ldr r3, [r3, #0]
8009378: 3314 adds r3, #20
800937a: 6cba ldr r2, [r7, #72] @ 0x48
800937c: 62fa str r2, [r7, #44] @ 0x2c
800937e: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009380: 6ab9 ldr r1, [r7, #40] @ 0x28
8009382: 6afa ldr r2, [r7, #44] @ 0x2c
8009384: e841 2300 strex r3, r2, [r1]
8009388: 627b str r3, [r7, #36] @ 0x24
return(result);
800938a: 6a7b ldr r3, [r7, #36] @ 0x24
800938c: 2b00 cmp r3, #0
800938e: d1e5 bne.n 800935c <UART_EndRxTransfer+0x3c>
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
8009390: 687b ldr r3, [r7, #4]
8009392: 6b1b ldr r3, [r3, #48] @ 0x30
8009394: 2b01 cmp r3, #1
8009396: d119 bne.n 80093cc <UART_EndRxTransfer+0xac>
{
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
8009398: 687b ldr r3, [r7, #4]
800939a: 681b ldr r3, [r3, #0]
800939c: 330c adds r3, #12
800939e: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
80093a0: 68fb ldr r3, [r7, #12]
80093a2: e853 3f00 ldrex r3, [r3]
80093a6: 60bb str r3, [r7, #8]
return(result);
80093a8: 68bb ldr r3, [r7, #8]
80093aa: f023 0310 bic.w r3, r3, #16
80093ae: 647b str r3, [r7, #68] @ 0x44
80093b0: 687b ldr r3, [r7, #4]
80093b2: 681b ldr r3, [r3, #0]
80093b4: 330c adds r3, #12
80093b6: 6c7a ldr r2, [r7, #68] @ 0x44
80093b8: 61ba str r2, [r7, #24]
80093ba: 617b str r3, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
80093bc: 6979 ldr r1, [r7, #20]
80093be: 69ba ldr r2, [r7, #24]
80093c0: e841 2300 strex r3, r2, [r1]
80093c4: 613b str r3, [r7, #16]
return(result);
80093c6: 693b ldr r3, [r7, #16]
80093c8: 2b00 cmp r3, #0
80093ca: d1e5 bne.n 8009398 <UART_EndRxTransfer+0x78>
}
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
80093cc: 687b ldr r3, [r7, #4]
80093ce: 2220 movs r2, #32
80093d0: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
80093d4: 687b ldr r3, [r7, #4]
80093d6: 2200 movs r2, #0
80093d8: 631a str r2, [r3, #48] @ 0x30
}
80093da: bf00 nop
80093dc: 3754 adds r7, #84 @ 0x54
80093de: 46bd mov sp, r7
80093e0: bc80 pop {r7}
80093e2: 4770 bx lr
080093e4 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
80093e4: b580 push {r7, lr}
80093e6: b084 sub sp, #16
80093e8: af00 add r7, sp, #0
80093ea: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
80093ec: 687b ldr r3, [r7, #4]
80093ee: 681b ldr r3, [r3, #0]
80093f0: 691b ldr r3, [r3, #16]
80093f2: f423 5140 bic.w r1, r3, #12288 @ 0x3000
80093f6: 687b ldr r3, [r7, #4]
80093f8: 68da ldr r2, [r3, #12]
80093fa: 687b ldr r3, [r7, #4]
80093fc: 681b ldr r3, [r3, #0]
80093fe: 430a orrs r2, r1
8009400: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
8009402: 687b ldr r3, [r7, #4]
8009404: 689a ldr r2, [r3, #8]
8009406: 687b ldr r3, [r7, #4]
8009408: 691b ldr r3, [r3, #16]
800940a: 431a orrs r2, r3
800940c: 687b ldr r3, [r7, #4]
800940e: 695b ldr r3, [r3, #20]
8009410: 4313 orrs r3, r2
8009412: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8009414: 687b ldr r3, [r7, #4]
8009416: 681b ldr r3, [r3, #0]
8009418: 68db ldr r3, [r3, #12]
800941a: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
800941e: f023 030c bic.w r3, r3, #12
8009422: 687a ldr r2, [r7, #4]
8009424: 6812 ldr r2, [r2, #0]
8009426: 68b9 ldr r1, [r7, #8]
8009428: 430b orrs r3, r1
800942a: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
800942c: 687b ldr r3, [r7, #4]
800942e: 681b ldr r3, [r3, #0]
8009430: 695b ldr r3, [r3, #20]
8009432: f423 7140 bic.w r1, r3, #768 @ 0x300
8009436: 687b ldr r3, [r7, #4]
8009438: 699a ldr r2, [r3, #24]
800943a: 687b ldr r3, [r7, #4]
800943c: 681b ldr r3, [r3, #0]
800943e: 430a orrs r2, r1
8009440: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8009442: 687b ldr r3, [r7, #4]
8009444: 681b ldr r3, [r3, #0]
8009446: 4a2c ldr r2, [pc, #176] @ (80094f8 <UART_SetConfig+0x114>)
8009448: 4293 cmp r3, r2
800944a: d103 bne.n 8009454 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
800944c: f7fe fede bl 800820c <HAL_RCC_GetPCLK2Freq>
8009450: 60f8 str r0, [r7, #12]
8009452: e002 b.n 800945a <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8009454: f7fe fec6 bl 80081e4 <HAL_RCC_GetPCLK1Freq>
8009458: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
800945a: 68fa ldr r2, [r7, #12]
800945c: 4613 mov r3, r2
800945e: 009b lsls r3, r3, #2
8009460: 4413 add r3, r2
8009462: 009a lsls r2, r3, #2
8009464: 441a add r2, r3
8009466: 687b ldr r3, [r7, #4]
8009468: 685b ldr r3, [r3, #4]
800946a: 009b lsls r3, r3, #2
800946c: fbb2 f3f3 udiv r3, r2, r3
8009470: 4a22 ldr r2, [pc, #136] @ (80094fc <UART_SetConfig+0x118>)
8009472: fba2 2303 umull r2, r3, r2, r3
8009476: 095b lsrs r3, r3, #5
8009478: 0119 lsls r1, r3, #4
800947a: 68fa ldr r2, [r7, #12]
800947c: 4613 mov r3, r2
800947e: 009b lsls r3, r3, #2
8009480: 4413 add r3, r2
8009482: 009a lsls r2, r3, #2
8009484: 441a add r2, r3
8009486: 687b ldr r3, [r7, #4]
8009488: 685b ldr r3, [r3, #4]
800948a: 009b lsls r3, r3, #2
800948c: fbb2 f2f3 udiv r2, r2, r3
8009490: 4b1a ldr r3, [pc, #104] @ (80094fc <UART_SetConfig+0x118>)
8009492: fba3 0302 umull r0, r3, r3, r2
8009496: 095b lsrs r3, r3, #5
8009498: 2064 movs r0, #100 @ 0x64
800949a: fb00 f303 mul.w r3, r0, r3
800949e: 1ad3 subs r3, r2, r3
80094a0: 011b lsls r3, r3, #4
80094a2: 3332 adds r3, #50 @ 0x32
80094a4: 4a15 ldr r2, [pc, #84] @ (80094fc <UART_SetConfig+0x118>)
80094a6: fba2 2303 umull r2, r3, r2, r3
80094aa: 095b lsrs r3, r3, #5
80094ac: f003 03f0 and.w r3, r3, #240 @ 0xf0
80094b0: 4419 add r1, r3
80094b2: 68fa ldr r2, [r7, #12]
80094b4: 4613 mov r3, r2
80094b6: 009b lsls r3, r3, #2
80094b8: 4413 add r3, r2
80094ba: 009a lsls r2, r3, #2
80094bc: 441a add r2, r3
80094be: 687b ldr r3, [r7, #4]
80094c0: 685b ldr r3, [r3, #4]
80094c2: 009b lsls r3, r3, #2
80094c4: fbb2 f2f3 udiv r2, r2, r3
80094c8: 4b0c ldr r3, [pc, #48] @ (80094fc <UART_SetConfig+0x118>)
80094ca: fba3 0302 umull r0, r3, r3, r2
80094ce: 095b lsrs r3, r3, #5
80094d0: 2064 movs r0, #100 @ 0x64
80094d2: fb00 f303 mul.w r3, r0, r3
80094d6: 1ad3 subs r3, r2, r3
80094d8: 011b lsls r3, r3, #4
80094da: 3332 adds r3, #50 @ 0x32
80094dc: 4a07 ldr r2, [pc, #28] @ (80094fc <UART_SetConfig+0x118>)
80094de: fba2 2303 umull r2, r3, r2, r3
80094e2: 095b lsrs r3, r3, #5
80094e4: f003 020f and.w r2, r3, #15
80094e8: 687b ldr r3, [r7, #4]
80094ea: 681b ldr r3, [r3, #0]
80094ec: 440a add r2, r1
80094ee: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
80094f0: bf00 nop
80094f2: 3710 adds r7, #16
80094f4: 46bd mov sp, r7
80094f6: bd80 pop {r7, pc}
80094f8: 40013800 .word 0x40013800
80094fc: 51eb851f .word 0x51eb851f
08009500 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009500: b480 push {r7}
8009502: b085 sub sp, #20
8009504: af00 add r7, sp, #0
8009506: 60f8 str r0, [r7, #12]
8009508: 4638 mov r0, r7
800950a: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800950e: 2300 movs r3, #0
}
8009510: 4618 mov r0, r3
8009512: 3714 adds r7, #20
8009514: 46bd mov sp, r7
8009516: bc80 pop {r7}
8009518: 4770 bx lr
0800951a <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
800951a: b480 push {r7}
800951c: b085 sub sp, #20
800951e: af00 add r7, sp, #0
8009520: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009522: 687b ldr r3, [r7, #4]
8009524: 2200 movs r2, #0
8009526: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
800952a: f44f 433f mov.w r3, #48896 @ 0xbf00
800952e: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8009530: 68fb ldr r3, [r7, #12]
8009532: b29a uxth r2, r3
8009534: 687b ldr r3, [r7, #4]
8009536: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
800953a: 2300 movs r3, #0
}
800953c: 4618 mov r0, r3
800953e: 3714 adds r7, #20
8009540: 46bd mov sp, r7
8009542: bc80 pop {r7}
8009544: 4770 bx lr
08009546 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8009546: b480 push {r7}
8009548: b085 sub sp, #20
800954a: af00 add r7, sp, #0
800954c: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
800954e: f44f 433f mov.w r3, #48896 @ 0xbf00
8009552: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8009554: 687b ldr r3, [r7, #4]
8009556: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800955a: b29a uxth r2, r3
800955c: 68fb ldr r3, [r7, #12]
800955e: b29b uxth r3, r3
8009560: 43db mvns r3, r3
8009562: b29b uxth r3, r3
8009564: 4013 ands r3, r2
8009566: b29a uxth r2, r3
8009568: 687b ldr r3, [r7, #4]
800956a: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
800956e: 2300 movs r3, #0
}
8009570: 4618 mov r0, r3
8009572: 3714 adds r7, #20
8009574: 46bd mov sp, r7
8009576: bc80 pop {r7}
8009578: 4770 bx lr
0800957a <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
800957a: b480 push {r7}
800957c: b083 sub sp, #12
800957e: af00 add r7, sp, #0
8009580: 6078 str r0, [r7, #4]
8009582: 460b mov r3, r1
8009584: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8009586: 2300 movs r3, #0
}
8009588: 4618 mov r0, r3
800958a: 370c adds r7, #12
800958c: 46bd mov sp, r7
800958e: bc80 pop {r7}
8009590: 4770 bx lr
08009592 <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009592: b480 push {r7}
8009594: b085 sub sp, #20
8009596: af00 add r7, sp, #0
8009598: 60f8 str r0, [r7, #12]
800959a: 4638 mov r0, r7
800959c: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
80095a0: 68fb ldr r3, [r7, #12]
80095a2: 2201 movs r2, #1
80095a4: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
80095a8: 68fb ldr r3, [r7, #12]
80095aa: 2200 movs r2, #0
80095ac: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
80095b0: 68fb ldr r3, [r7, #12]
80095b2: 2200 movs r2, #0
80095b4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
80095b8: 68fb ldr r3, [r7, #12]
80095ba: 2200 movs r2, #0
80095bc: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
80095c0: 2300 movs r3, #0
}
80095c2: 4618 mov r0, r3
80095c4: 3714 adds r7, #20
80095c6: 46bd mov sp, r7
80095c8: bc80 pop {r7}
80095ca: 4770 bx lr
080095cc <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
80095cc: b480 push {r7}
80095ce: b09d sub sp, #116 @ 0x74
80095d0: af00 add r7, sp, #0
80095d2: 6078 str r0, [r7, #4]
80095d4: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
80095d6: 2300 movs r3, #0
80095d8: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
80095dc: 687a ldr r2, [r7, #4]
80095de: 683b ldr r3, [r7, #0]
80095e0: 781b ldrb r3, [r3, #0]
80095e2: 009b lsls r3, r3, #2
80095e4: 4413 add r3, r2
80095e6: 881b ldrh r3, [r3, #0]
80095e8: b29b uxth r3, r3
80095ea: f423 43ec bic.w r3, r3, #30208 @ 0x7600
80095ee: f023 0370 bic.w r3, r3, #112 @ 0x70
80095f2: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
80095f6: 683b ldr r3, [r7, #0]
80095f8: 78db ldrb r3, [r3, #3]
80095fa: 2b03 cmp r3, #3
80095fc: d81f bhi.n 800963e <USB_ActivateEndpoint+0x72>
80095fe: a201 add r2, pc, #4 @ (adr r2, 8009604 <USB_ActivateEndpoint+0x38>)
8009600: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009604: 08009615 .word 0x08009615
8009608: 08009631 .word 0x08009631
800960c: 08009647 .word 0x08009647
8009610: 08009623 .word 0x08009623
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8009614: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009618: f443 7300 orr.w r3, r3, #512 @ 0x200
800961c: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009620: e012 b.n 8009648 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8009622: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009626: f443 63c0 orr.w r3, r3, #1536 @ 0x600
800962a: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
800962e: e00b b.n 8009648 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8009630: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009634: f443 6380 orr.w r3, r3, #1024 @ 0x400
8009638: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
800963c: e004 b.n 8009648 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
800963e: 2301 movs r3, #1
8009640: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8009644: e000 b.n 8009648 <USB_ActivateEndpoint+0x7c>
break;
8009646: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8009648: 687a ldr r2, [r7, #4]
800964a: 683b ldr r3, [r7, #0]
800964c: 781b ldrb r3, [r3, #0]
800964e: 009b lsls r3, r3, #2
8009650: 441a add r2, r3
8009652: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009656: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800965a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800965e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009662: f043 0380 orr.w r3, r3, #128 @ 0x80
8009666: b29b uxth r3, r3
8009668: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
800966a: 687a ldr r2, [r7, #4]
800966c: 683b ldr r3, [r7, #0]
800966e: 781b ldrb r3, [r3, #0]
8009670: 009b lsls r3, r3, #2
8009672: 4413 add r3, r2
8009674: 881b ldrh r3, [r3, #0]
8009676: b29b uxth r3, r3
8009678: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800967c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009680: b29b uxth r3, r3
8009682: 683a ldr r2, [r7, #0]
8009684: 7812 ldrb r2, [r2, #0]
8009686: 4313 orrs r3, r2
8009688: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
800968c: 687a ldr r2, [r7, #4]
800968e: 683b ldr r3, [r7, #0]
8009690: 781b ldrb r3, [r3, #0]
8009692: 009b lsls r3, r3, #2
8009694: 441a add r2, r3
8009696: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
800969a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800969e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80096a2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80096a6: f043 0380 orr.w r3, r3, #128 @ 0x80
80096aa: b29b uxth r3, r3
80096ac: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
80096ae: 683b ldr r3, [r7, #0]
80096b0: 7b1b ldrb r3, [r3, #12]
80096b2: 2b00 cmp r3, #0
80096b4: f040 8178 bne.w 80099a8 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
80096b8: 683b ldr r3, [r7, #0]
80096ba: 785b ldrb r3, [r3, #1]
80096bc: 2b00 cmp r3, #0
80096be: f000 8084 beq.w 80097ca <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
80096c2: 687b ldr r3, [r7, #4]
80096c4: 61bb str r3, [r7, #24]
80096c6: 687b ldr r3, [r7, #4]
80096c8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80096cc: b29b uxth r3, r3
80096ce: 461a mov r2, r3
80096d0: 69bb ldr r3, [r7, #24]
80096d2: 4413 add r3, r2
80096d4: 61bb str r3, [r7, #24]
80096d6: 683b ldr r3, [r7, #0]
80096d8: 781b ldrb r3, [r3, #0]
80096da: 011a lsls r2, r3, #4
80096dc: 69bb ldr r3, [r7, #24]
80096de: 4413 add r3, r2
80096e0: f503 6380 add.w r3, r3, #1024 @ 0x400
80096e4: 617b str r3, [r7, #20]
80096e6: 683b ldr r3, [r7, #0]
80096e8: 88db ldrh r3, [r3, #6]
80096ea: 085b lsrs r3, r3, #1
80096ec: b29b uxth r3, r3
80096ee: 005b lsls r3, r3, #1
80096f0: b29a uxth r2, r3
80096f2: 697b ldr r3, [r7, #20]
80096f4: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80096f6: 687a ldr r2, [r7, #4]
80096f8: 683b ldr r3, [r7, #0]
80096fa: 781b ldrb r3, [r3, #0]
80096fc: 009b lsls r3, r3, #2
80096fe: 4413 add r3, r2
8009700: 881b ldrh r3, [r3, #0]
8009702: 827b strh r3, [r7, #18]
8009704: 8a7b ldrh r3, [r7, #18]
8009706: f003 0340 and.w r3, r3, #64 @ 0x40
800970a: 2b00 cmp r3, #0
800970c: d01b beq.n 8009746 <USB_ActivateEndpoint+0x17a>
800970e: 687a ldr r2, [r7, #4]
8009710: 683b ldr r3, [r7, #0]
8009712: 781b ldrb r3, [r3, #0]
8009714: 009b lsls r3, r3, #2
8009716: 4413 add r3, r2
8009718: 881b ldrh r3, [r3, #0]
800971a: b29b uxth r3, r3
800971c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009720: f023 0370 bic.w r3, r3, #112 @ 0x70
8009724: 823b strh r3, [r7, #16]
8009726: 687a ldr r2, [r7, #4]
8009728: 683b ldr r3, [r7, #0]
800972a: 781b ldrb r3, [r3, #0]
800972c: 009b lsls r3, r3, #2
800972e: 441a add r2, r3
8009730: 8a3b ldrh r3, [r7, #16]
8009732: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009736: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800973a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800973e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009742: b29b uxth r3, r3
8009744: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8009746: 683b ldr r3, [r7, #0]
8009748: 78db ldrb r3, [r3, #3]
800974a: 2b01 cmp r3, #1
800974c: d020 beq.n 8009790 <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800974e: 687a ldr r2, [r7, #4]
8009750: 683b ldr r3, [r7, #0]
8009752: 781b ldrb r3, [r3, #0]
8009754: 009b lsls r3, r3, #2
8009756: 4413 add r3, r2
8009758: 881b ldrh r3, [r3, #0]
800975a: b29b uxth r3, r3
800975c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009760: f023 0340 bic.w r3, r3, #64 @ 0x40
8009764: 81bb strh r3, [r7, #12]
8009766: 89bb ldrh r3, [r7, #12]
8009768: f083 0320 eor.w r3, r3, #32
800976c: 81bb strh r3, [r7, #12]
800976e: 687a ldr r2, [r7, #4]
8009770: 683b ldr r3, [r7, #0]
8009772: 781b ldrb r3, [r3, #0]
8009774: 009b lsls r3, r3, #2
8009776: 441a add r2, r3
8009778: 89bb ldrh r3, [r7, #12]
800977a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800977e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009782: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009786: f043 0380 orr.w r3, r3, #128 @ 0x80
800978a: b29b uxth r3, r3
800978c: 8013 strh r3, [r2, #0]
800978e: e2d5 b.n 8009d3c <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009790: 687a ldr r2, [r7, #4]
8009792: 683b ldr r3, [r7, #0]
8009794: 781b ldrb r3, [r3, #0]
8009796: 009b lsls r3, r3, #2
8009798: 4413 add r3, r2
800979a: 881b ldrh r3, [r3, #0]
800979c: b29b uxth r3, r3
800979e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80097a2: f023 0340 bic.w r3, r3, #64 @ 0x40
80097a6: 81fb strh r3, [r7, #14]
80097a8: 687a ldr r2, [r7, #4]
80097aa: 683b ldr r3, [r7, #0]
80097ac: 781b ldrb r3, [r3, #0]
80097ae: 009b lsls r3, r3, #2
80097b0: 441a add r2, r3
80097b2: 89fb ldrh r3, [r7, #14]
80097b4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80097b8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80097bc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80097c0: f043 0380 orr.w r3, r3, #128 @ 0x80
80097c4: b29b uxth r3, r3
80097c6: 8013 strh r3, [r2, #0]
80097c8: e2b8 b.n 8009d3c <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
80097ca: 687b ldr r3, [r7, #4]
80097cc: 633b str r3, [r7, #48] @ 0x30
80097ce: 687b ldr r3, [r7, #4]
80097d0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80097d4: b29b uxth r3, r3
80097d6: 461a mov r2, r3
80097d8: 6b3b ldr r3, [r7, #48] @ 0x30
80097da: 4413 add r3, r2
80097dc: 633b str r3, [r7, #48] @ 0x30
80097de: 683b ldr r3, [r7, #0]
80097e0: 781b ldrb r3, [r3, #0]
80097e2: 011a lsls r2, r3, #4
80097e4: 6b3b ldr r3, [r7, #48] @ 0x30
80097e6: 4413 add r3, r2
80097e8: f503 6381 add.w r3, r3, #1032 @ 0x408
80097ec: 62fb str r3, [r7, #44] @ 0x2c
80097ee: 683b ldr r3, [r7, #0]
80097f0: 88db ldrh r3, [r3, #6]
80097f2: 085b lsrs r3, r3, #1
80097f4: b29b uxth r3, r3
80097f6: 005b lsls r3, r3, #1
80097f8: b29a uxth r2, r3
80097fa: 6afb ldr r3, [r7, #44] @ 0x2c
80097fc: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
80097fe: 687b ldr r3, [r7, #4]
8009800: 62bb str r3, [r7, #40] @ 0x28
8009802: 687b ldr r3, [r7, #4]
8009804: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009808: b29b uxth r3, r3
800980a: 461a mov r2, r3
800980c: 6abb ldr r3, [r7, #40] @ 0x28
800980e: 4413 add r3, r2
8009810: 62bb str r3, [r7, #40] @ 0x28
8009812: 683b ldr r3, [r7, #0]
8009814: 781b ldrb r3, [r3, #0]
8009816: 011a lsls r2, r3, #4
8009818: 6abb ldr r3, [r7, #40] @ 0x28
800981a: 4413 add r3, r2
800981c: f203 430c addw r3, r3, #1036 @ 0x40c
8009820: 627b str r3, [r7, #36] @ 0x24
8009822: 6a7b ldr r3, [r7, #36] @ 0x24
8009824: 881b ldrh r3, [r3, #0]
8009826: b29b uxth r3, r3
8009828: f3c3 0309 ubfx r3, r3, #0, #10
800982c: b29a uxth r2, r3
800982e: 6a7b ldr r3, [r7, #36] @ 0x24
8009830: 801a strh r2, [r3, #0]
8009832: 683b ldr r3, [r7, #0]
8009834: 691b ldr r3, [r3, #16]
8009836: 2b3e cmp r3, #62 @ 0x3e
8009838: d91d bls.n 8009876 <USB_ActivateEndpoint+0x2aa>
800983a: 683b ldr r3, [r7, #0]
800983c: 691b ldr r3, [r3, #16]
800983e: 095b lsrs r3, r3, #5
8009840: 66bb str r3, [r7, #104] @ 0x68
8009842: 683b ldr r3, [r7, #0]
8009844: 691b ldr r3, [r3, #16]
8009846: f003 031f and.w r3, r3, #31
800984a: 2b00 cmp r3, #0
800984c: d102 bne.n 8009854 <USB_ActivateEndpoint+0x288>
800984e: 6ebb ldr r3, [r7, #104] @ 0x68
8009850: 3b01 subs r3, #1
8009852: 66bb str r3, [r7, #104] @ 0x68
8009854: 6a7b ldr r3, [r7, #36] @ 0x24
8009856: 881b ldrh r3, [r3, #0]
8009858: b29a uxth r2, r3
800985a: 6ebb ldr r3, [r7, #104] @ 0x68
800985c: b29b uxth r3, r3
800985e: 029b lsls r3, r3, #10
8009860: b29b uxth r3, r3
8009862: 4313 orrs r3, r2
8009864: b29b uxth r3, r3
8009866: ea6f 4343 mvn.w r3, r3, lsl #17
800986a: ea6f 4353 mvn.w r3, r3, lsr #17
800986e: b29a uxth r2, r3
8009870: 6a7b ldr r3, [r7, #36] @ 0x24
8009872: 801a strh r2, [r3, #0]
8009874: e026 b.n 80098c4 <USB_ActivateEndpoint+0x2f8>
8009876: 683b ldr r3, [r7, #0]
8009878: 691b ldr r3, [r3, #16]
800987a: 2b00 cmp r3, #0
800987c: d10a bne.n 8009894 <USB_ActivateEndpoint+0x2c8>
800987e: 6a7b ldr r3, [r7, #36] @ 0x24
8009880: 881b ldrh r3, [r3, #0]
8009882: b29b uxth r3, r3
8009884: ea6f 4343 mvn.w r3, r3, lsl #17
8009888: ea6f 4353 mvn.w r3, r3, lsr #17
800988c: b29a uxth r2, r3
800988e: 6a7b ldr r3, [r7, #36] @ 0x24
8009890: 801a strh r2, [r3, #0]
8009892: e017 b.n 80098c4 <USB_ActivateEndpoint+0x2f8>
8009894: 683b ldr r3, [r7, #0]
8009896: 691b ldr r3, [r3, #16]
8009898: 085b lsrs r3, r3, #1
800989a: 66bb str r3, [r7, #104] @ 0x68
800989c: 683b ldr r3, [r7, #0]
800989e: 691b ldr r3, [r3, #16]
80098a0: f003 0301 and.w r3, r3, #1
80098a4: 2b00 cmp r3, #0
80098a6: d002 beq.n 80098ae <USB_ActivateEndpoint+0x2e2>
80098a8: 6ebb ldr r3, [r7, #104] @ 0x68
80098aa: 3301 adds r3, #1
80098ac: 66bb str r3, [r7, #104] @ 0x68
80098ae: 6a7b ldr r3, [r7, #36] @ 0x24
80098b0: 881b ldrh r3, [r3, #0]
80098b2: b29a uxth r2, r3
80098b4: 6ebb ldr r3, [r7, #104] @ 0x68
80098b6: b29b uxth r3, r3
80098b8: 029b lsls r3, r3, #10
80098ba: b29b uxth r3, r3
80098bc: 4313 orrs r3, r2
80098be: b29a uxth r2, r3
80098c0: 6a7b ldr r3, [r7, #36] @ 0x24
80098c2: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80098c4: 687a ldr r2, [r7, #4]
80098c6: 683b ldr r3, [r7, #0]
80098c8: 781b ldrb r3, [r3, #0]
80098ca: 009b lsls r3, r3, #2
80098cc: 4413 add r3, r2
80098ce: 881b ldrh r3, [r3, #0]
80098d0: 847b strh r3, [r7, #34] @ 0x22
80098d2: 8c7b ldrh r3, [r7, #34] @ 0x22
80098d4: f403 4380 and.w r3, r3, #16384 @ 0x4000
80098d8: 2b00 cmp r3, #0
80098da: d01b beq.n 8009914 <USB_ActivateEndpoint+0x348>
80098dc: 687a ldr r2, [r7, #4]
80098de: 683b ldr r3, [r7, #0]
80098e0: 781b ldrb r3, [r3, #0]
80098e2: 009b lsls r3, r3, #2
80098e4: 4413 add r3, r2
80098e6: 881b ldrh r3, [r3, #0]
80098e8: b29b uxth r3, r3
80098ea: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80098ee: f023 0370 bic.w r3, r3, #112 @ 0x70
80098f2: 843b strh r3, [r7, #32]
80098f4: 687a ldr r2, [r7, #4]
80098f6: 683b ldr r3, [r7, #0]
80098f8: 781b ldrb r3, [r3, #0]
80098fa: 009b lsls r3, r3, #2
80098fc: 441a add r2, r3
80098fe: 8c3b ldrh r3, [r7, #32]
8009900: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009904: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009908: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800990c: f043 0380 orr.w r3, r3, #128 @ 0x80
8009910: b29b uxth r3, r3
8009912: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
8009914: 683b ldr r3, [r7, #0]
8009916: 781b ldrb r3, [r3, #0]
8009918: 2b00 cmp r3, #0
800991a: d124 bne.n 8009966 <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800991c: 687a ldr r2, [r7, #4]
800991e: 683b ldr r3, [r7, #0]
8009920: 781b ldrb r3, [r3, #0]
8009922: 009b lsls r3, r3, #2
8009924: 4413 add r3, r2
8009926: 881b ldrh r3, [r3, #0]
8009928: b29b uxth r3, r3
800992a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800992e: f023 0370 bic.w r3, r3, #112 @ 0x70
8009932: 83bb strh r3, [r7, #28]
8009934: 8bbb ldrh r3, [r7, #28]
8009936: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800993a: 83bb strh r3, [r7, #28]
800993c: 8bbb ldrh r3, [r7, #28]
800993e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8009942: 83bb strh r3, [r7, #28]
8009944: 687a ldr r2, [r7, #4]
8009946: 683b ldr r3, [r7, #0]
8009948: 781b ldrb r3, [r3, #0]
800994a: 009b lsls r3, r3, #2
800994c: 441a add r2, r3
800994e: 8bbb ldrh r3, [r7, #28]
8009950: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009954: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009958: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800995c: f043 0380 orr.w r3, r3, #128 @ 0x80
8009960: b29b uxth r3, r3
8009962: 8013 strh r3, [r2, #0]
8009964: e1ea b.n 8009d3c <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
8009966: 687a ldr r2, [r7, #4]
8009968: 683b ldr r3, [r7, #0]
800996a: 781b ldrb r3, [r3, #0]
800996c: 009b lsls r3, r3, #2
800996e: 4413 add r3, r2
8009970: 881b ldrh r3, [r3, #0]
8009972: b29b uxth r3, r3
8009974: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009978: f023 0370 bic.w r3, r3, #112 @ 0x70
800997c: 83fb strh r3, [r7, #30]
800997e: 8bfb ldrh r3, [r7, #30]
8009980: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8009984: 83fb strh r3, [r7, #30]
8009986: 687a ldr r2, [r7, #4]
8009988: 683b ldr r3, [r7, #0]
800998a: 781b ldrb r3, [r3, #0]
800998c: 009b lsls r3, r3, #2
800998e: 441a add r2, r3
8009990: 8bfb ldrh r3, [r7, #30]
8009992: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009996: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800999a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800999e: f043 0380 orr.w r3, r3, #128 @ 0x80
80099a2: b29b uxth r3, r3
80099a4: 8013 strh r3, [r2, #0]
80099a6: e1c9 b.n 8009d3c <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
80099a8: 683b ldr r3, [r7, #0]
80099aa: 78db ldrb r3, [r3, #3]
80099ac: 2b02 cmp r3, #2
80099ae: d11e bne.n 80099ee <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
80099b0: 687a ldr r2, [r7, #4]
80099b2: 683b ldr r3, [r7, #0]
80099b4: 781b ldrb r3, [r3, #0]
80099b6: 009b lsls r3, r3, #2
80099b8: 4413 add r3, r2
80099ba: 881b ldrh r3, [r3, #0]
80099bc: b29b uxth r3, r3
80099be: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80099c2: f023 0370 bic.w r3, r3, #112 @ 0x70
80099c6: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
80099ca: 687a ldr r2, [r7, #4]
80099cc: 683b ldr r3, [r7, #0]
80099ce: 781b ldrb r3, [r3, #0]
80099d0: 009b lsls r3, r3, #2
80099d2: 441a add r2, r3
80099d4: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
80099d8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80099dc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80099e0: f443 4301 orr.w r3, r3, #33024 @ 0x8100
80099e4: f043 0380 orr.w r3, r3, #128 @ 0x80
80099e8: b29b uxth r3, r3
80099ea: 8013 strh r3, [r2, #0]
80099ec: e01d b.n 8009a2a <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
80099ee: 687a ldr r2, [r7, #4]
80099f0: 683b ldr r3, [r7, #0]
80099f2: 781b ldrb r3, [r3, #0]
80099f4: 009b lsls r3, r3, #2
80099f6: 4413 add r3, r2
80099f8: 881b ldrh r3, [r3, #0]
80099fa: b29b uxth r3, r3
80099fc: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8009a00: f023 0370 bic.w r3, r3, #112 @ 0x70
8009a04: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
8009a08: 687a ldr r2, [r7, #4]
8009a0a: 683b ldr r3, [r7, #0]
8009a0c: 781b ldrb r3, [r3, #0]
8009a0e: 009b lsls r3, r3, #2
8009a10: 441a add r2, r3
8009a12: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
8009a16: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009a1a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009a1e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009a22: f043 0380 orr.w r3, r3, #128 @ 0x80
8009a26: b29b uxth r3, r3
8009a28: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
8009a2a: 687b ldr r3, [r7, #4]
8009a2c: 65fb str r3, [r7, #92] @ 0x5c
8009a2e: 687b ldr r3, [r7, #4]
8009a30: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009a34: b29b uxth r3, r3
8009a36: 461a mov r2, r3
8009a38: 6dfb ldr r3, [r7, #92] @ 0x5c
8009a3a: 4413 add r3, r2
8009a3c: 65fb str r3, [r7, #92] @ 0x5c
8009a3e: 683b ldr r3, [r7, #0]
8009a40: 781b ldrb r3, [r3, #0]
8009a42: 011a lsls r2, r3, #4
8009a44: 6dfb ldr r3, [r7, #92] @ 0x5c
8009a46: 4413 add r3, r2
8009a48: f503 6380 add.w r3, r3, #1024 @ 0x400
8009a4c: 65bb str r3, [r7, #88] @ 0x58
8009a4e: 683b ldr r3, [r7, #0]
8009a50: 891b ldrh r3, [r3, #8]
8009a52: 085b lsrs r3, r3, #1
8009a54: b29b uxth r3, r3
8009a56: 005b lsls r3, r3, #1
8009a58: b29a uxth r2, r3
8009a5a: 6dbb ldr r3, [r7, #88] @ 0x58
8009a5c: 801a strh r2, [r3, #0]
8009a5e: 687b ldr r3, [r7, #4]
8009a60: 657b str r3, [r7, #84] @ 0x54
8009a62: 687b ldr r3, [r7, #4]
8009a64: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009a68: b29b uxth r3, r3
8009a6a: 461a mov r2, r3
8009a6c: 6d7b ldr r3, [r7, #84] @ 0x54
8009a6e: 4413 add r3, r2
8009a70: 657b str r3, [r7, #84] @ 0x54
8009a72: 683b ldr r3, [r7, #0]
8009a74: 781b ldrb r3, [r3, #0]
8009a76: 011a lsls r2, r3, #4
8009a78: 6d7b ldr r3, [r7, #84] @ 0x54
8009a7a: 4413 add r3, r2
8009a7c: f503 6381 add.w r3, r3, #1032 @ 0x408
8009a80: 653b str r3, [r7, #80] @ 0x50
8009a82: 683b ldr r3, [r7, #0]
8009a84: 895b ldrh r3, [r3, #10]
8009a86: 085b lsrs r3, r3, #1
8009a88: b29b uxth r3, r3
8009a8a: 005b lsls r3, r3, #1
8009a8c: b29a uxth r2, r3
8009a8e: 6d3b ldr r3, [r7, #80] @ 0x50
8009a90: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
8009a92: 683b ldr r3, [r7, #0]
8009a94: 785b ldrb r3, [r3, #1]
8009a96: 2b00 cmp r3, #0
8009a98: f040 8093 bne.w 8009bc2 <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009a9c: 687a ldr r2, [r7, #4]
8009a9e: 683b ldr r3, [r7, #0]
8009aa0: 781b ldrb r3, [r3, #0]
8009aa2: 009b lsls r3, r3, #2
8009aa4: 4413 add r3, r2
8009aa6: 881b ldrh r3, [r3, #0]
8009aa8: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
8009aac: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8009ab0: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009ab4: 2b00 cmp r3, #0
8009ab6: d01b beq.n 8009af0 <USB_ActivateEndpoint+0x524>
8009ab8: 687a ldr r2, [r7, #4]
8009aba: 683b ldr r3, [r7, #0]
8009abc: 781b ldrb r3, [r3, #0]
8009abe: 009b lsls r3, r3, #2
8009ac0: 4413 add r3, r2
8009ac2: 881b ldrh r3, [r3, #0]
8009ac4: b29b uxth r3, r3
8009ac6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009aca: f023 0370 bic.w r3, r3, #112 @ 0x70
8009ace: 87fb strh r3, [r7, #62] @ 0x3e
8009ad0: 687a ldr r2, [r7, #4]
8009ad2: 683b ldr r3, [r7, #0]
8009ad4: 781b ldrb r3, [r3, #0]
8009ad6: 009b lsls r3, r3, #2
8009ad8: 441a add r2, r3
8009ada: 8ffb ldrh r3, [r7, #62] @ 0x3e
8009adc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009ae0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009ae4: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009ae8: f043 0380 orr.w r3, r3, #128 @ 0x80
8009aec: b29b uxth r3, r3
8009aee: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009af0: 687a ldr r2, [r7, #4]
8009af2: 683b ldr r3, [r7, #0]
8009af4: 781b ldrb r3, [r3, #0]
8009af6: 009b lsls r3, r3, #2
8009af8: 4413 add r3, r2
8009afa: 881b ldrh r3, [r3, #0]
8009afc: 87bb strh r3, [r7, #60] @ 0x3c
8009afe: 8fbb ldrh r3, [r7, #60] @ 0x3c
8009b00: f003 0340 and.w r3, r3, #64 @ 0x40
8009b04: 2b00 cmp r3, #0
8009b06: d01b beq.n 8009b40 <USB_ActivateEndpoint+0x574>
8009b08: 687a ldr r2, [r7, #4]
8009b0a: 683b ldr r3, [r7, #0]
8009b0c: 781b ldrb r3, [r3, #0]
8009b0e: 009b lsls r3, r3, #2
8009b10: 4413 add r3, r2
8009b12: 881b ldrh r3, [r3, #0]
8009b14: b29b uxth r3, r3
8009b16: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009b1a: f023 0370 bic.w r3, r3, #112 @ 0x70
8009b1e: 877b strh r3, [r7, #58] @ 0x3a
8009b20: 687a ldr r2, [r7, #4]
8009b22: 683b ldr r3, [r7, #0]
8009b24: 781b ldrb r3, [r3, #0]
8009b26: 009b lsls r3, r3, #2
8009b28: 441a add r2, r3
8009b2a: 8f7b ldrh r3, [r7, #58] @ 0x3a
8009b2c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009b30: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009b34: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009b38: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009b3c: b29b uxth r3, r3
8009b3e: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8009b40: 687a ldr r2, [r7, #4]
8009b42: 683b ldr r3, [r7, #0]
8009b44: 781b ldrb r3, [r3, #0]
8009b46: 009b lsls r3, r3, #2
8009b48: 4413 add r3, r2
8009b4a: 881b ldrh r3, [r3, #0]
8009b4c: b29b uxth r3, r3
8009b4e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009b52: f023 0370 bic.w r3, r3, #112 @ 0x70
8009b56: 873b strh r3, [r7, #56] @ 0x38
8009b58: 8f3b ldrh r3, [r7, #56] @ 0x38
8009b5a: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8009b5e: 873b strh r3, [r7, #56] @ 0x38
8009b60: 8f3b ldrh r3, [r7, #56] @ 0x38
8009b62: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8009b66: 873b strh r3, [r7, #56] @ 0x38
8009b68: 687a ldr r2, [r7, #4]
8009b6a: 683b ldr r3, [r7, #0]
8009b6c: 781b ldrb r3, [r3, #0]
8009b6e: 009b lsls r3, r3, #2
8009b70: 441a add r2, r3
8009b72: 8f3b ldrh r3, [r7, #56] @ 0x38
8009b74: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009b78: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009b7c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009b80: f043 0380 orr.w r3, r3, #128 @ 0x80
8009b84: b29b uxth r3, r3
8009b86: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009b88: 687a ldr r2, [r7, #4]
8009b8a: 683b ldr r3, [r7, #0]
8009b8c: 781b ldrb r3, [r3, #0]
8009b8e: 009b lsls r3, r3, #2
8009b90: 4413 add r3, r2
8009b92: 881b ldrh r3, [r3, #0]
8009b94: b29b uxth r3, r3
8009b96: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009b9a: f023 0340 bic.w r3, r3, #64 @ 0x40
8009b9e: 86fb strh r3, [r7, #54] @ 0x36
8009ba0: 687a ldr r2, [r7, #4]
8009ba2: 683b ldr r3, [r7, #0]
8009ba4: 781b ldrb r3, [r3, #0]
8009ba6: 009b lsls r3, r3, #2
8009ba8: 441a add r2, r3
8009baa: 8efb ldrh r3, [r7, #54] @ 0x36
8009bac: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009bb0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009bb4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009bb8: f043 0380 orr.w r3, r3, #128 @ 0x80
8009bbc: b29b uxth r3, r3
8009bbe: 8013 strh r3, [r2, #0]
8009bc0: e0bc b.n 8009d3c <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009bc2: 687a ldr r2, [r7, #4]
8009bc4: 683b ldr r3, [r7, #0]
8009bc6: 781b ldrb r3, [r3, #0]
8009bc8: 009b lsls r3, r3, #2
8009bca: 4413 add r3, r2
8009bcc: 881b ldrh r3, [r3, #0]
8009bce: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8009bd2: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8009bd6: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009bda: 2b00 cmp r3, #0
8009bdc: d01d beq.n 8009c1a <USB_ActivateEndpoint+0x64e>
8009bde: 687a ldr r2, [r7, #4]
8009be0: 683b ldr r3, [r7, #0]
8009be2: 781b ldrb r3, [r3, #0]
8009be4: 009b lsls r3, r3, #2
8009be6: 4413 add r3, r2
8009be8: 881b ldrh r3, [r3, #0]
8009bea: b29b uxth r3, r3
8009bec: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009bf0: f023 0370 bic.w r3, r3, #112 @ 0x70
8009bf4: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
8009bf8: 687a ldr r2, [r7, #4]
8009bfa: 683b ldr r3, [r7, #0]
8009bfc: 781b ldrb r3, [r3, #0]
8009bfe: 009b lsls r3, r3, #2
8009c00: 441a add r2, r3
8009c02: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
8009c06: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009c0a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009c0e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009c12: f043 0380 orr.w r3, r3, #128 @ 0x80
8009c16: b29b uxth r3, r3
8009c18: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009c1a: 687a ldr r2, [r7, #4]
8009c1c: 683b ldr r3, [r7, #0]
8009c1e: 781b ldrb r3, [r3, #0]
8009c20: 009b lsls r3, r3, #2
8009c22: 4413 add r3, r2
8009c24: 881b ldrh r3, [r3, #0]
8009c26: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
8009c2a: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8009c2e: f003 0340 and.w r3, r3, #64 @ 0x40
8009c32: 2b00 cmp r3, #0
8009c34: d01d beq.n 8009c72 <USB_ActivateEndpoint+0x6a6>
8009c36: 687a ldr r2, [r7, #4]
8009c38: 683b ldr r3, [r7, #0]
8009c3a: 781b ldrb r3, [r3, #0]
8009c3c: 009b lsls r3, r3, #2
8009c3e: 4413 add r3, r2
8009c40: 881b ldrh r3, [r3, #0]
8009c42: b29b uxth r3, r3
8009c44: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009c48: f023 0370 bic.w r3, r3, #112 @ 0x70
8009c4c: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8009c50: 687a ldr r2, [r7, #4]
8009c52: 683b ldr r3, [r7, #0]
8009c54: 781b ldrb r3, [r3, #0]
8009c56: 009b lsls r3, r3, #2
8009c58: 441a add r2, r3
8009c5a: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
8009c5e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009c62: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009c66: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009c6a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009c6e: b29b uxth r3, r3
8009c70: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8009c72: 683b ldr r3, [r7, #0]
8009c74: 78db ldrb r3, [r3, #3]
8009c76: 2b01 cmp r3, #1
8009c78: d024 beq.n 8009cc4 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8009c7a: 687a ldr r2, [r7, #4]
8009c7c: 683b ldr r3, [r7, #0]
8009c7e: 781b ldrb r3, [r3, #0]
8009c80: 009b lsls r3, r3, #2
8009c82: 4413 add r3, r2
8009c84: 881b ldrh r3, [r3, #0]
8009c86: b29b uxth r3, r3
8009c88: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009c8c: f023 0340 bic.w r3, r3, #64 @ 0x40
8009c90: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8009c94: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8009c98: f083 0320 eor.w r3, r3, #32
8009c9c: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
8009ca0: 687a ldr r2, [r7, #4]
8009ca2: 683b ldr r3, [r7, #0]
8009ca4: 781b ldrb r3, [r3, #0]
8009ca6: 009b lsls r3, r3, #2
8009ca8: 441a add r2, r3
8009caa: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
8009cae: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009cb2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009cb6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009cba: f043 0380 orr.w r3, r3, #128 @ 0x80
8009cbe: b29b uxth r3, r3
8009cc0: 8013 strh r3, [r2, #0]
8009cc2: e01d b.n 8009d00 <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009cc4: 687a ldr r2, [r7, #4]
8009cc6: 683b ldr r3, [r7, #0]
8009cc8: 781b ldrb r3, [r3, #0]
8009cca: 009b lsls r3, r3, #2
8009ccc: 4413 add r3, r2
8009cce: 881b ldrh r3, [r3, #0]
8009cd0: b29b uxth r3, r3
8009cd2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009cd6: f023 0340 bic.w r3, r3, #64 @ 0x40
8009cda: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
8009cde: 687a ldr r2, [r7, #4]
8009ce0: 683b ldr r3, [r7, #0]
8009ce2: 781b ldrb r3, [r3, #0]
8009ce4: 009b lsls r3, r3, #2
8009ce6: 441a add r2, r3
8009ce8: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
8009cec: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009cf0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009cf4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009cf8: f043 0380 orr.w r3, r3, #128 @ 0x80
8009cfc: b29b uxth r3, r3
8009cfe: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009d00: 687a ldr r2, [r7, #4]
8009d02: 683b ldr r3, [r7, #0]
8009d04: 781b ldrb r3, [r3, #0]
8009d06: 009b lsls r3, r3, #2
8009d08: 4413 add r3, r2
8009d0a: 881b ldrh r3, [r3, #0]
8009d0c: b29b uxth r3, r3
8009d0e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009d12: f023 0370 bic.w r3, r3, #112 @ 0x70
8009d16: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
8009d1a: 687a ldr r2, [r7, #4]
8009d1c: 683b ldr r3, [r7, #0]
8009d1e: 781b ldrb r3, [r3, #0]
8009d20: 009b lsls r3, r3, #2
8009d22: 441a add r2, r3
8009d24: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8009d28: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d2c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d30: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d34: f043 0380 orr.w r3, r3, #128 @ 0x80
8009d38: b29b uxth r3, r3
8009d3a: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
8009d3c: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
8009d40: 4618 mov r0, r3
8009d42: 3774 adds r7, #116 @ 0x74
8009d44: 46bd mov sp, r7
8009d46: bc80 pop {r7}
8009d48: 4770 bx lr
8009d4a: bf00 nop
08009d4c <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8009d4c: b480 push {r7}
8009d4e: b08d sub sp, #52 @ 0x34
8009d50: af00 add r7, sp, #0
8009d52: 6078 str r0, [r7, #4]
8009d54: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
8009d56: 683b ldr r3, [r7, #0]
8009d58: 7b1b ldrb r3, [r3, #12]
8009d5a: 2b00 cmp r3, #0
8009d5c: f040 808e bne.w 8009e7c <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
8009d60: 683b ldr r3, [r7, #0]
8009d62: 785b ldrb r3, [r3, #1]
8009d64: 2b00 cmp r3, #0
8009d66: d044 beq.n 8009df2 <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009d68: 687a ldr r2, [r7, #4]
8009d6a: 683b ldr r3, [r7, #0]
8009d6c: 781b ldrb r3, [r3, #0]
8009d6e: 009b lsls r3, r3, #2
8009d70: 4413 add r3, r2
8009d72: 881b ldrh r3, [r3, #0]
8009d74: 81bb strh r3, [r7, #12]
8009d76: 89bb ldrh r3, [r7, #12]
8009d78: f003 0340 and.w r3, r3, #64 @ 0x40
8009d7c: 2b00 cmp r3, #0
8009d7e: d01b beq.n 8009db8 <USB_DeactivateEndpoint+0x6c>
8009d80: 687a ldr r2, [r7, #4]
8009d82: 683b ldr r3, [r7, #0]
8009d84: 781b ldrb r3, [r3, #0]
8009d86: 009b lsls r3, r3, #2
8009d88: 4413 add r3, r2
8009d8a: 881b ldrh r3, [r3, #0]
8009d8c: b29b uxth r3, r3
8009d8e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009d92: f023 0370 bic.w r3, r3, #112 @ 0x70
8009d96: 817b strh r3, [r7, #10]
8009d98: 687a ldr r2, [r7, #4]
8009d9a: 683b ldr r3, [r7, #0]
8009d9c: 781b ldrb r3, [r3, #0]
8009d9e: 009b lsls r3, r3, #2
8009da0: 441a add r2, r3
8009da2: 897b ldrh r3, [r7, #10]
8009da4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009da8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009dac: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009db0: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009db4: b29b uxth r3, r3
8009db6: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009db8: 687a ldr r2, [r7, #4]
8009dba: 683b ldr r3, [r7, #0]
8009dbc: 781b ldrb r3, [r3, #0]
8009dbe: 009b lsls r3, r3, #2
8009dc0: 4413 add r3, r2
8009dc2: 881b ldrh r3, [r3, #0]
8009dc4: b29b uxth r3, r3
8009dc6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009dca: f023 0340 bic.w r3, r3, #64 @ 0x40
8009dce: 813b strh r3, [r7, #8]
8009dd0: 687a ldr r2, [r7, #4]
8009dd2: 683b ldr r3, [r7, #0]
8009dd4: 781b ldrb r3, [r3, #0]
8009dd6: 009b lsls r3, r3, #2
8009dd8: 441a add r2, r3
8009dda: 893b ldrh r3, [r7, #8]
8009ddc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009de0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009de4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009de8: f043 0380 orr.w r3, r3, #128 @ 0x80
8009dec: b29b uxth r3, r3
8009dee: 8013 strh r3, [r2, #0]
8009df0: e192 b.n 800a118 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009df2: 687a ldr r2, [r7, #4]
8009df4: 683b ldr r3, [r7, #0]
8009df6: 781b ldrb r3, [r3, #0]
8009df8: 009b lsls r3, r3, #2
8009dfa: 4413 add r3, r2
8009dfc: 881b ldrh r3, [r3, #0]
8009dfe: 827b strh r3, [r7, #18]
8009e00: 8a7b ldrh r3, [r7, #18]
8009e02: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009e06: 2b00 cmp r3, #0
8009e08: d01b beq.n 8009e42 <USB_DeactivateEndpoint+0xf6>
8009e0a: 687a ldr r2, [r7, #4]
8009e0c: 683b ldr r3, [r7, #0]
8009e0e: 781b ldrb r3, [r3, #0]
8009e10: 009b lsls r3, r3, #2
8009e12: 4413 add r3, r2
8009e14: 881b ldrh r3, [r3, #0]
8009e16: b29b uxth r3, r3
8009e18: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009e1c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009e20: 823b strh r3, [r7, #16]
8009e22: 687a ldr r2, [r7, #4]
8009e24: 683b ldr r3, [r7, #0]
8009e26: 781b ldrb r3, [r3, #0]
8009e28: 009b lsls r3, r3, #2
8009e2a: 441a add r2, r3
8009e2c: 8a3b ldrh r3, [r7, #16]
8009e2e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009e32: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e36: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009e3a: f043 0380 orr.w r3, r3, #128 @ 0x80
8009e3e: b29b uxth r3, r3
8009e40: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009e42: 687a ldr r2, [r7, #4]
8009e44: 683b ldr r3, [r7, #0]
8009e46: 781b ldrb r3, [r3, #0]
8009e48: 009b lsls r3, r3, #2
8009e4a: 4413 add r3, r2
8009e4c: 881b ldrh r3, [r3, #0]
8009e4e: b29b uxth r3, r3
8009e50: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009e54: f023 0370 bic.w r3, r3, #112 @ 0x70
8009e58: 81fb strh r3, [r7, #14]
8009e5a: 687a ldr r2, [r7, #4]
8009e5c: 683b ldr r3, [r7, #0]
8009e5e: 781b ldrb r3, [r3, #0]
8009e60: 009b lsls r3, r3, #2
8009e62: 441a add r2, r3
8009e64: 89fb ldrh r3, [r7, #14]
8009e66: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009e6a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009e6e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009e72: f043 0380 orr.w r3, r3, #128 @ 0x80
8009e76: b29b uxth r3, r3
8009e78: 8013 strh r3, [r2, #0]
8009e7a: e14d b.n 800a118 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
8009e7c: 683b ldr r3, [r7, #0]
8009e7e: 785b ldrb r3, [r3, #1]
8009e80: 2b00 cmp r3, #0
8009e82: f040 80a5 bne.w 8009fd0 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009e86: 687a ldr r2, [r7, #4]
8009e88: 683b ldr r3, [r7, #0]
8009e8a: 781b ldrb r3, [r3, #0]
8009e8c: 009b lsls r3, r3, #2
8009e8e: 4413 add r3, r2
8009e90: 881b ldrh r3, [r3, #0]
8009e92: 843b strh r3, [r7, #32]
8009e94: 8c3b ldrh r3, [r7, #32]
8009e96: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009e9a: 2b00 cmp r3, #0
8009e9c: d01b beq.n 8009ed6 <USB_DeactivateEndpoint+0x18a>
8009e9e: 687a ldr r2, [r7, #4]
8009ea0: 683b ldr r3, [r7, #0]
8009ea2: 781b ldrb r3, [r3, #0]
8009ea4: 009b lsls r3, r3, #2
8009ea6: 4413 add r3, r2
8009ea8: 881b ldrh r3, [r3, #0]
8009eaa: b29b uxth r3, r3
8009eac: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009eb0: f023 0370 bic.w r3, r3, #112 @ 0x70
8009eb4: 83fb strh r3, [r7, #30]
8009eb6: 687a ldr r2, [r7, #4]
8009eb8: 683b ldr r3, [r7, #0]
8009eba: 781b ldrb r3, [r3, #0]
8009ebc: 009b lsls r3, r3, #2
8009ebe: 441a add r2, r3
8009ec0: 8bfb ldrh r3, [r7, #30]
8009ec2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009ec6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009eca: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009ece: f043 0380 orr.w r3, r3, #128 @ 0x80
8009ed2: b29b uxth r3, r3
8009ed4: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009ed6: 687a ldr r2, [r7, #4]
8009ed8: 683b ldr r3, [r7, #0]
8009eda: 781b ldrb r3, [r3, #0]
8009edc: 009b lsls r3, r3, #2
8009ede: 4413 add r3, r2
8009ee0: 881b ldrh r3, [r3, #0]
8009ee2: 83bb strh r3, [r7, #28]
8009ee4: 8bbb ldrh r3, [r7, #28]
8009ee6: f003 0340 and.w r3, r3, #64 @ 0x40
8009eea: 2b00 cmp r3, #0
8009eec: d01b beq.n 8009f26 <USB_DeactivateEndpoint+0x1da>
8009eee: 687a ldr r2, [r7, #4]
8009ef0: 683b ldr r3, [r7, #0]
8009ef2: 781b ldrb r3, [r3, #0]
8009ef4: 009b lsls r3, r3, #2
8009ef6: 4413 add r3, r2
8009ef8: 881b ldrh r3, [r3, #0]
8009efa: b29b uxth r3, r3
8009efc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009f00: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f04: 837b strh r3, [r7, #26]
8009f06: 687a ldr r2, [r7, #4]
8009f08: 683b ldr r3, [r7, #0]
8009f0a: 781b ldrb r3, [r3, #0]
8009f0c: 009b lsls r3, r3, #2
8009f0e: 441a add r2, r3
8009f10: 8b7b ldrh r3, [r7, #26]
8009f12: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009f16: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009f1a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009f1e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009f22: b29b uxth r3, r3
8009f24: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
8009f26: 687a ldr r2, [r7, #4]
8009f28: 683b ldr r3, [r7, #0]
8009f2a: 781b ldrb r3, [r3, #0]
8009f2c: 009b lsls r3, r3, #2
8009f2e: 4413 add r3, r2
8009f30: 881b ldrh r3, [r3, #0]
8009f32: b29b uxth r3, r3
8009f34: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009f38: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f3c: 833b strh r3, [r7, #24]
8009f3e: 687a ldr r2, [r7, #4]
8009f40: 683b ldr r3, [r7, #0]
8009f42: 781b ldrb r3, [r3, #0]
8009f44: 009b lsls r3, r3, #2
8009f46: 441a add r2, r3
8009f48: 8b3b ldrh r3, [r7, #24]
8009f4a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009f4e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009f52: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009f56: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009f5a: b29b uxth r3, r3
8009f5c: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009f5e: 687a ldr r2, [r7, #4]
8009f60: 683b ldr r3, [r7, #0]
8009f62: 781b ldrb r3, [r3, #0]
8009f64: 009b lsls r3, r3, #2
8009f66: 4413 add r3, r2
8009f68: 881b ldrh r3, [r3, #0]
8009f6a: b29b uxth r3, r3
8009f6c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009f70: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f74: 82fb strh r3, [r7, #22]
8009f76: 687a ldr r2, [r7, #4]
8009f78: 683b ldr r3, [r7, #0]
8009f7a: 781b ldrb r3, [r3, #0]
8009f7c: 009b lsls r3, r3, #2
8009f7e: 441a add r2, r3
8009f80: 8afb ldrh r3, [r7, #22]
8009f82: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009f86: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009f8a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009f8e: f043 0380 orr.w r3, r3, #128 @ 0x80
8009f92: b29b uxth r3, r3
8009f94: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009f96: 687a ldr r2, [r7, #4]
8009f98: 683b ldr r3, [r7, #0]
8009f9a: 781b ldrb r3, [r3, #0]
8009f9c: 009b lsls r3, r3, #2
8009f9e: 4413 add r3, r2
8009fa0: 881b ldrh r3, [r3, #0]
8009fa2: b29b uxth r3, r3
8009fa4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009fa8: f023 0340 bic.w r3, r3, #64 @ 0x40
8009fac: 82bb strh r3, [r7, #20]
8009fae: 687a ldr r2, [r7, #4]
8009fb0: 683b ldr r3, [r7, #0]
8009fb2: 781b ldrb r3, [r3, #0]
8009fb4: 009b lsls r3, r3, #2
8009fb6: 441a add r2, r3
8009fb8: 8abb ldrh r3, [r7, #20]
8009fba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009fbe: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009fc2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009fc6: f043 0380 orr.w r3, r3, #128 @ 0x80
8009fca: b29b uxth r3, r3
8009fcc: 8013 strh r3, [r2, #0]
8009fce: e0a3 b.n 800a118 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009fd0: 687a ldr r2, [r7, #4]
8009fd2: 683b ldr r3, [r7, #0]
8009fd4: 781b ldrb r3, [r3, #0]
8009fd6: 009b lsls r3, r3, #2
8009fd8: 4413 add r3, r2
8009fda: 881b ldrh r3, [r3, #0]
8009fdc: 85fb strh r3, [r7, #46] @ 0x2e
8009fde: 8dfb ldrh r3, [r7, #46] @ 0x2e
8009fe0: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009fe4: 2b00 cmp r3, #0
8009fe6: d01b beq.n 800a020 <USB_DeactivateEndpoint+0x2d4>
8009fe8: 687a ldr r2, [r7, #4]
8009fea: 683b ldr r3, [r7, #0]
8009fec: 781b ldrb r3, [r3, #0]
8009fee: 009b lsls r3, r3, #2
8009ff0: 4413 add r3, r2
8009ff2: 881b ldrh r3, [r3, #0]
8009ff4: b29b uxth r3, r3
8009ff6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009ffa: f023 0370 bic.w r3, r3, #112 @ 0x70
8009ffe: 85bb strh r3, [r7, #44] @ 0x2c
800a000: 687a ldr r2, [r7, #4]
800a002: 683b ldr r3, [r7, #0]
800a004: 781b ldrb r3, [r3, #0]
800a006: 009b lsls r3, r3, #2
800a008: 441a add r2, r3
800a00a: 8dbb ldrh r3, [r7, #44] @ 0x2c
800a00c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a010: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a014: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a018: f043 0380 orr.w r3, r3, #128 @ 0x80
800a01c: b29b uxth r3, r3
800a01e: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a020: 687a ldr r2, [r7, #4]
800a022: 683b ldr r3, [r7, #0]
800a024: 781b ldrb r3, [r3, #0]
800a026: 009b lsls r3, r3, #2
800a028: 4413 add r3, r2
800a02a: 881b ldrh r3, [r3, #0]
800a02c: 857b strh r3, [r7, #42] @ 0x2a
800a02e: 8d7b ldrh r3, [r7, #42] @ 0x2a
800a030: f003 0340 and.w r3, r3, #64 @ 0x40
800a034: 2b00 cmp r3, #0
800a036: d01b beq.n 800a070 <USB_DeactivateEndpoint+0x324>
800a038: 687a ldr r2, [r7, #4]
800a03a: 683b ldr r3, [r7, #0]
800a03c: 781b ldrb r3, [r3, #0]
800a03e: 009b lsls r3, r3, #2
800a040: 4413 add r3, r2
800a042: 881b ldrh r3, [r3, #0]
800a044: b29b uxth r3, r3
800a046: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a04a: f023 0370 bic.w r3, r3, #112 @ 0x70
800a04e: 853b strh r3, [r7, #40] @ 0x28
800a050: 687a ldr r2, [r7, #4]
800a052: 683b ldr r3, [r7, #0]
800a054: 781b ldrb r3, [r3, #0]
800a056: 009b lsls r3, r3, #2
800a058: 441a add r2, r3
800a05a: 8d3b ldrh r3, [r7, #40] @ 0x28
800a05c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a060: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a064: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a068: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a06c: b29b uxth r3, r3
800a06e: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
800a070: 687a ldr r2, [r7, #4]
800a072: 683b ldr r3, [r7, #0]
800a074: 781b ldrb r3, [r3, #0]
800a076: 009b lsls r3, r3, #2
800a078: 4413 add r3, r2
800a07a: 881b ldrh r3, [r3, #0]
800a07c: b29b uxth r3, r3
800a07e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a082: f023 0370 bic.w r3, r3, #112 @ 0x70
800a086: 84fb strh r3, [r7, #38] @ 0x26
800a088: 687a ldr r2, [r7, #4]
800a08a: 683b ldr r3, [r7, #0]
800a08c: 781b ldrb r3, [r3, #0]
800a08e: 009b lsls r3, r3, #2
800a090: 441a add r2, r3
800a092: 8cfb ldrh r3, [r7, #38] @ 0x26
800a094: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a098: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a09c: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a0a0: f043 0380 orr.w r3, r3, #128 @ 0x80
800a0a4: b29b uxth r3, r3
800a0a6: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a0a8: 687a ldr r2, [r7, #4]
800a0aa: 683b ldr r3, [r7, #0]
800a0ac: 781b ldrb r3, [r3, #0]
800a0ae: 009b lsls r3, r3, #2
800a0b0: 4413 add r3, r2
800a0b2: 881b ldrh r3, [r3, #0]
800a0b4: b29b uxth r3, r3
800a0b6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a0ba: f023 0340 bic.w r3, r3, #64 @ 0x40
800a0be: 84bb strh r3, [r7, #36] @ 0x24
800a0c0: 687a ldr r2, [r7, #4]
800a0c2: 683b ldr r3, [r7, #0]
800a0c4: 781b ldrb r3, [r3, #0]
800a0c6: 009b lsls r3, r3, #2
800a0c8: 441a add r2, r3
800a0ca: 8cbb ldrh r3, [r7, #36] @ 0x24
800a0cc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a0d0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a0d4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a0d8: f043 0380 orr.w r3, r3, #128 @ 0x80
800a0dc: b29b uxth r3, r3
800a0de: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a0e0: 687a ldr r2, [r7, #4]
800a0e2: 683b ldr r3, [r7, #0]
800a0e4: 781b ldrb r3, [r3, #0]
800a0e6: 009b lsls r3, r3, #2
800a0e8: 4413 add r3, r2
800a0ea: 881b ldrh r3, [r3, #0]
800a0ec: b29b uxth r3, r3
800a0ee: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a0f2: f023 0370 bic.w r3, r3, #112 @ 0x70
800a0f6: 847b strh r3, [r7, #34] @ 0x22
800a0f8: 687a ldr r2, [r7, #4]
800a0fa: 683b ldr r3, [r7, #0]
800a0fc: 781b ldrb r3, [r3, #0]
800a0fe: 009b lsls r3, r3, #2
800a100: 441a add r2, r3
800a102: 8c7b ldrh r3, [r7, #34] @ 0x22
800a104: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a108: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a10c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a110: f043 0380 orr.w r3, r3, #128 @ 0x80
800a114: b29b uxth r3, r3
800a116: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
800a118: 2300 movs r3, #0
}
800a11a: 4618 mov r0, r3
800a11c: 3734 adds r7, #52 @ 0x34
800a11e: 46bd mov sp, r7
800a120: bc80 pop {r7}
800a122: 4770 bx lr
0800a124 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a124: b580 push {r7, lr}
800a126: b0c2 sub sp, #264 @ 0x108
800a128: af00 add r7, sp, #0
800a12a: f507 7384 add.w r3, r7, #264 @ 0x108
800a12e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a132: 6018 str r0, [r3, #0]
800a134: f507 7384 add.w r3, r7, #264 @ 0x108
800a138: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a13c: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
800a13e: f507 7384 add.w r3, r7, #264 @ 0x108
800a142: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a146: 681b ldr r3, [r3, #0]
800a148: 785b ldrb r3, [r3, #1]
800a14a: 2b01 cmp r3, #1
800a14c: f040 86b7 bne.w 800aebe <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
800a150: f507 7384 add.w r3, r7, #264 @ 0x108
800a154: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a158: 681b ldr r3, [r3, #0]
800a15a: 699a ldr r2, [r3, #24]
800a15c: f507 7384 add.w r3, r7, #264 @ 0x108
800a160: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a164: 681b ldr r3, [r3, #0]
800a166: 691b ldr r3, [r3, #16]
800a168: 429a cmp r2, r3
800a16a: d908 bls.n 800a17e <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
800a16c: f507 7384 add.w r3, r7, #264 @ 0x108
800a170: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a174: 681b ldr r3, [r3, #0]
800a176: 691b ldr r3, [r3, #16]
800a178: f8c7 3104 str.w r3, [r7, #260] @ 0x104
800a17c: e007 b.n 800a18e <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
800a17e: f507 7384 add.w r3, r7, #264 @ 0x108
800a182: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a186: 681b ldr r3, [r3, #0]
800a188: 699b ldr r3, [r3, #24]
800a18a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
800a18e: f507 7384 add.w r3, r7, #264 @ 0x108
800a192: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a196: 681b ldr r3, [r3, #0]
800a198: 7b1b ldrb r3, [r3, #12]
800a19a: 2b00 cmp r3, #0
800a19c: d13a bne.n 800a214 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
800a19e: f507 7384 add.w r3, r7, #264 @ 0x108
800a1a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a1a6: 681b ldr r3, [r3, #0]
800a1a8: 6959 ldr r1, [r3, #20]
800a1aa: f507 7384 add.w r3, r7, #264 @ 0x108
800a1ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a1b2: 681b ldr r3, [r3, #0]
800a1b4: 88da ldrh r2, [r3, #6]
800a1b6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a1ba: b29b uxth r3, r3
800a1bc: f507 7084 add.w r0, r7, #264 @ 0x108
800a1c0: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a1c4: 6800 ldr r0, [r0, #0]
800a1c6: f001 fc9c bl 800bb02 <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800a1ca: f507 7384 add.w r3, r7, #264 @ 0x108
800a1ce: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a1d2: 681b ldr r3, [r3, #0]
800a1d4: 613b str r3, [r7, #16]
800a1d6: f507 7384 add.w r3, r7, #264 @ 0x108
800a1da: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a1de: 681b ldr r3, [r3, #0]
800a1e0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a1e4: b29b uxth r3, r3
800a1e6: 461a mov r2, r3
800a1e8: 693b ldr r3, [r7, #16]
800a1ea: 4413 add r3, r2
800a1ec: 613b str r3, [r7, #16]
800a1ee: f507 7384 add.w r3, r7, #264 @ 0x108
800a1f2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a1f6: 681b ldr r3, [r3, #0]
800a1f8: 781b ldrb r3, [r3, #0]
800a1fa: 011a lsls r2, r3, #4
800a1fc: 693b ldr r3, [r7, #16]
800a1fe: 4413 add r3, r2
800a200: f203 4304 addw r3, r3, #1028 @ 0x404
800a204: 60fb str r3, [r7, #12]
800a206: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a20a: b29a uxth r2, r3
800a20c: 68fb ldr r3, [r7, #12]
800a20e: 801a strh r2, [r3, #0]
800a210: f000 be1f b.w 800ae52 <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
800a214: f507 7384 add.w r3, r7, #264 @ 0x108
800a218: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a21c: 681b ldr r3, [r3, #0]
800a21e: 78db ldrb r3, [r3, #3]
800a220: 2b02 cmp r3, #2
800a222: f040 8462 bne.w 800aaea <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
800a226: f507 7384 add.w r3, r7, #264 @ 0x108
800a22a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a22e: 681b ldr r3, [r3, #0]
800a230: 6a1a ldr r2, [r3, #32]
800a232: f507 7384 add.w r3, r7, #264 @ 0x108
800a236: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a23a: 681b ldr r3, [r3, #0]
800a23c: 691b ldr r3, [r3, #16]
800a23e: 429a cmp r2, r3
800a240: f240 83df bls.w 800aa02 <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800a244: f507 7384 add.w r3, r7, #264 @ 0x108
800a248: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a24c: 681a ldr r2, [r3, #0]
800a24e: f507 7384 add.w r3, r7, #264 @ 0x108
800a252: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a256: 681b ldr r3, [r3, #0]
800a258: 781b ldrb r3, [r3, #0]
800a25a: 009b lsls r3, r3, #2
800a25c: 4413 add r3, r2
800a25e: 881b ldrh r3, [r3, #0]
800a260: b29b uxth r3, r3
800a262: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a266: f023 0370 bic.w r3, r3, #112 @ 0x70
800a26a: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
800a26e: f507 7384 add.w r3, r7, #264 @ 0x108
800a272: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a276: 681a ldr r2, [r3, #0]
800a278: f507 7384 add.w r3, r7, #264 @ 0x108
800a27c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a280: 681b ldr r3, [r3, #0]
800a282: 781b ldrb r3, [r3, #0]
800a284: 009b lsls r3, r3, #2
800a286: 441a add r2, r3
800a288: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
800a28c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a290: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a294: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800a298: f043 0380 orr.w r3, r3, #128 @ 0x80
800a29c: b29b uxth r3, r3
800a29e: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800a2a0: f507 7384 add.w r3, r7, #264 @ 0x108
800a2a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a2a8: 681b ldr r3, [r3, #0]
800a2aa: 6a1a ldr r2, [r3, #32]
800a2ac: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a2b0: 1ad2 subs r2, r2, r3
800a2b2: f507 7384 add.w r3, r7, #264 @ 0x108
800a2b6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a2ba: 681b ldr r3, [r3, #0]
800a2bc: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800a2be: f507 7384 add.w r3, r7, #264 @ 0x108
800a2c2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a2c6: 681a ldr r2, [r3, #0]
800a2c8: f507 7384 add.w r3, r7, #264 @ 0x108
800a2cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a2d0: 681b ldr r3, [r3, #0]
800a2d2: 781b ldrb r3, [r3, #0]
800a2d4: 009b lsls r3, r3, #2
800a2d6: 4413 add r3, r2
800a2d8: 881b ldrh r3, [r3, #0]
800a2da: b29b uxth r3, r3
800a2dc: f003 0340 and.w r3, r3, #64 @ 0x40
800a2e0: 2b00 cmp r3, #0
800a2e2: f000 81c7 beq.w 800a674 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800a2e6: f507 7384 add.w r3, r7, #264 @ 0x108
800a2ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a2ee: 681b ldr r3, [r3, #0]
800a2f0: 633b str r3, [r7, #48] @ 0x30
800a2f2: f507 7384 add.w r3, r7, #264 @ 0x108
800a2f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a2fa: 681b ldr r3, [r3, #0]
800a2fc: 785b ldrb r3, [r3, #1]
800a2fe: 2b00 cmp r3, #0
800a300: d177 bne.n 800a3f2 <USB_EPStartXfer+0x2ce>
800a302: f507 7384 add.w r3, r7, #264 @ 0x108
800a306: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a30a: 681b ldr r3, [r3, #0]
800a30c: 62bb str r3, [r7, #40] @ 0x28
800a30e: f507 7384 add.w r3, r7, #264 @ 0x108
800a312: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a316: 681b ldr r3, [r3, #0]
800a318: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a31c: b29b uxth r3, r3
800a31e: 461a mov r2, r3
800a320: 6abb ldr r3, [r7, #40] @ 0x28
800a322: 4413 add r3, r2
800a324: 62bb str r3, [r7, #40] @ 0x28
800a326: f507 7384 add.w r3, r7, #264 @ 0x108
800a32a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a32e: 681b ldr r3, [r3, #0]
800a330: 781b ldrb r3, [r3, #0]
800a332: 011a lsls r2, r3, #4
800a334: 6abb ldr r3, [r7, #40] @ 0x28
800a336: 4413 add r3, r2
800a338: f203 430c addw r3, r3, #1036 @ 0x40c
800a33c: 627b str r3, [r7, #36] @ 0x24
800a33e: 6a7b ldr r3, [r7, #36] @ 0x24
800a340: 881b ldrh r3, [r3, #0]
800a342: b29b uxth r3, r3
800a344: f3c3 0309 ubfx r3, r3, #0, #10
800a348: b29a uxth r2, r3
800a34a: 6a7b ldr r3, [r7, #36] @ 0x24
800a34c: 801a strh r2, [r3, #0]
800a34e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a352: 2b3e cmp r3, #62 @ 0x3e
800a354: d921 bls.n 800a39a <USB_EPStartXfer+0x276>
800a356: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a35a: 095b lsrs r3, r3, #5
800a35c: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a360: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a364: f003 031f and.w r3, r3, #31
800a368: 2b00 cmp r3, #0
800a36a: d104 bne.n 800a376 <USB_EPStartXfer+0x252>
800a36c: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a370: 3b01 subs r3, #1
800a372: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a376: 6a7b ldr r3, [r7, #36] @ 0x24
800a378: 881b ldrh r3, [r3, #0]
800a37a: b29a uxth r2, r3
800a37c: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a380: b29b uxth r3, r3
800a382: 029b lsls r3, r3, #10
800a384: b29b uxth r3, r3
800a386: 4313 orrs r3, r2
800a388: b29b uxth r3, r3
800a38a: ea6f 4343 mvn.w r3, r3, lsl #17
800a38e: ea6f 4353 mvn.w r3, r3, lsr #17
800a392: b29a uxth r2, r3
800a394: 6a7b ldr r3, [r7, #36] @ 0x24
800a396: 801a strh r2, [r3, #0]
800a398: e050 b.n 800a43c <USB_EPStartXfer+0x318>
800a39a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a39e: 2b00 cmp r3, #0
800a3a0: d10a bne.n 800a3b8 <USB_EPStartXfer+0x294>
800a3a2: 6a7b ldr r3, [r7, #36] @ 0x24
800a3a4: 881b ldrh r3, [r3, #0]
800a3a6: b29b uxth r3, r3
800a3a8: ea6f 4343 mvn.w r3, r3, lsl #17
800a3ac: ea6f 4353 mvn.w r3, r3, lsr #17
800a3b0: b29a uxth r2, r3
800a3b2: 6a7b ldr r3, [r7, #36] @ 0x24
800a3b4: 801a strh r2, [r3, #0]
800a3b6: e041 b.n 800a43c <USB_EPStartXfer+0x318>
800a3b8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a3bc: 085b lsrs r3, r3, #1
800a3be: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a3c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a3c6: f003 0301 and.w r3, r3, #1
800a3ca: 2b00 cmp r3, #0
800a3cc: d004 beq.n 800a3d8 <USB_EPStartXfer+0x2b4>
800a3ce: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a3d2: 3301 adds r3, #1
800a3d4: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a3d8: 6a7b ldr r3, [r7, #36] @ 0x24
800a3da: 881b ldrh r3, [r3, #0]
800a3dc: b29a uxth r2, r3
800a3de: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a3e2: b29b uxth r3, r3
800a3e4: 029b lsls r3, r3, #10
800a3e6: b29b uxth r3, r3
800a3e8: 4313 orrs r3, r2
800a3ea: b29a uxth r2, r3
800a3ec: 6a7b ldr r3, [r7, #36] @ 0x24
800a3ee: 801a strh r2, [r3, #0]
800a3f0: e024 b.n 800a43c <USB_EPStartXfer+0x318>
800a3f2: f507 7384 add.w r3, r7, #264 @ 0x108
800a3f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a3fa: 681b ldr r3, [r3, #0]
800a3fc: 785b ldrb r3, [r3, #1]
800a3fe: 2b01 cmp r3, #1
800a400: d11c bne.n 800a43c <USB_EPStartXfer+0x318>
800a402: f507 7384 add.w r3, r7, #264 @ 0x108
800a406: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a40a: 681b ldr r3, [r3, #0]
800a40c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a410: b29b uxth r3, r3
800a412: 461a mov r2, r3
800a414: 6b3b ldr r3, [r7, #48] @ 0x30
800a416: 4413 add r3, r2
800a418: 633b str r3, [r7, #48] @ 0x30
800a41a: f507 7384 add.w r3, r7, #264 @ 0x108
800a41e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a422: 681b ldr r3, [r3, #0]
800a424: 781b ldrb r3, [r3, #0]
800a426: 011a lsls r2, r3, #4
800a428: 6b3b ldr r3, [r7, #48] @ 0x30
800a42a: 4413 add r3, r2
800a42c: f203 430c addw r3, r3, #1036 @ 0x40c
800a430: 62fb str r3, [r7, #44] @ 0x2c
800a432: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a436: b29a uxth r2, r3
800a438: 6afb ldr r3, [r7, #44] @ 0x2c
800a43a: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800a43c: f507 7384 add.w r3, r7, #264 @ 0x108
800a440: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a444: 681b ldr r3, [r3, #0]
800a446: 895b ldrh r3, [r3, #10]
800a448: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a44c: f507 7384 add.w r3, r7, #264 @ 0x108
800a450: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a454: 681b ldr r3, [r3, #0]
800a456: 6959 ldr r1, [r3, #20]
800a458: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a45c: b29b uxth r3, r3
800a45e: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a462: f507 7084 add.w r0, r7, #264 @ 0x108
800a466: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a46a: 6800 ldr r0, [r0, #0]
800a46c: f001 fb49 bl 800bb02 <USB_WritePMA>
ep->xfer_buff += len;
800a470: f507 7384 add.w r3, r7, #264 @ 0x108
800a474: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a478: 681b ldr r3, [r3, #0]
800a47a: 695a ldr r2, [r3, #20]
800a47c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a480: 441a add r2, r3
800a482: f507 7384 add.w r3, r7, #264 @ 0x108
800a486: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a48a: 681b ldr r3, [r3, #0]
800a48c: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800a48e: f507 7384 add.w r3, r7, #264 @ 0x108
800a492: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a496: 681b ldr r3, [r3, #0]
800a498: 6a1a ldr r2, [r3, #32]
800a49a: f507 7384 add.w r3, r7, #264 @ 0x108
800a49e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4a2: 681b ldr r3, [r3, #0]
800a4a4: 691b ldr r3, [r3, #16]
800a4a6: 429a cmp r2, r3
800a4a8: d90f bls.n 800a4ca <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
800a4aa: f507 7384 add.w r3, r7, #264 @ 0x108
800a4ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4b2: 681b ldr r3, [r3, #0]
800a4b4: 6a1a ldr r2, [r3, #32]
800a4b6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a4ba: 1ad2 subs r2, r2, r3
800a4bc: f507 7384 add.w r3, r7, #264 @ 0x108
800a4c0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4c4: 681b ldr r3, [r3, #0]
800a4c6: 621a str r2, [r3, #32]
800a4c8: e00e b.n 800a4e8 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
800a4ca: f507 7384 add.w r3, r7, #264 @ 0x108
800a4ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4d2: 681b ldr r3, [r3, #0]
800a4d4: 6a1b ldr r3, [r3, #32]
800a4d6: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800a4da: f507 7384 add.w r3, r7, #264 @ 0x108
800a4de: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4e2: 681b ldr r3, [r3, #0]
800a4e4: 2200 movs r2, #0
800a4e6: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800a4e8: f507 7384 add.w r3, r7, #264 @ 0x108
800a4ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4f0: 681b ldr r3, [r3, #0]
800a4f2: 785b ldrb r3, [r3, #1]
800a4f4: 2b00 cmp r3, #0
800a4f6: d177 bne.n 800a5e8 <USB_EPStartXfer+0x4c4>
800a4f8: f507 7384 add.w r3, r7, #264 @ 0x108
800a4fc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a500: 681b ldr r3, [r3, #0]
800a502: 61bb str r3, [r7, #24]
800a504: f507 7384 add.w r3, r7, #264 @ 0x108
800a508: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a50c: 681b ldr r3, [r3, #0]
800a50e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a512: b29b uxth r3, r3
800a514: 461a mov r2, r3
800a516: 69bb ldr r3, [r7, #24]
800a518: 4413 add r3, r2
800a51a: 61bb str r3, [r7, #24]
800a51c: f507 7384 add.w r3, r7, #264 @ 0x108
800a520: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a524: 681b ldr r3, [r3, #0]
800a526: 781b ldrb r3, [r3, #0]
800a528: 011a lsls r2, r3, #4
800a52a: 69bb ldr r3, [r7, #24]
800a52c: 4413 add r3, r2
800a52e: f203 4304 addw r3, r3, #1028 @ 0x404
800a532: 617b str r3, [r7, #20]
800a534: 697b ldr r3, [r7, #20]
800a536: 881b ldrh r3, [r3, #0]
800a538: b29b uxth r3, r3
800a53a: f3c3 0309 ubfx r3, r3, #0, #10
800a53e: b29a uxth r2, r3
800a540: 697b ldr r3, [r7, #20]
800a542: 801a strh r2, [r3, #0]
800a544: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a548: 2b3e cmp r3, #62 @ 0x3e
800a54a: d921 bls.n 800a590 <USB_EPStartXfer+0x46c>
800a54c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a550: 095b lsrs r3, r3, #5
800a552: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a556: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a55a: f003 031f and.w r3, r3, #31
800a55e: 2b00 cmp r3, #0
800a560: d104 bne.n 800a56c <USB_EPStartXfer+0x448>
800a562: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a566: 3b01 subs r3, #1
800a568: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a56c: 697b ldr r3, [r7, #20]
800a56e: 881b ldrh r3, [r3, #0]
800a570: b29a uxth r2, r3
800a572: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a576: b29b uxth r3, r3
800a578: 029b lsls r3, r3, #10
800a57a: b29b uxth r3, r3
800a57c: 4313 orrs r3, r2
800a57e: b29b uxth r3, r3
800a580: ea6f 4343 mvn.w r3, r3, lsl #17
800a584: ea6f 4353 mvn.w r3, r3, lsr #17
800a588: b29a uxth r2, r3
800a58a: 697b ldr r3, [r7, #20]
800a58c: 801a strh r2, [r3, #0]
800a58e: e056 b.n 800a63e <USB_EPStartXfer+0x51a>
800a590: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a594: 2b00 cmp r3, #0
800a596: d10a bne.n 800a5ae <USB_EPStartXfer+0x48a>
800a598: 697b ldr r3, [r7, #20]
800a59a: 881b ldrh r3, [r3, #0]
800a59c: b29b uxth r3, r3
800a59e: ea6f 4343 mvn.w r3, r3, lsl #17
800a5a2: ea6f 4353 mvn.w r3, r3, lsr #17
800a5a6: b29a uxth r2, r3
800a5a8: 697b ldr r3, [r7, #20]
800a5aa: 801a strh r2, [r3, #0]
800a5ac: e047 b.n 800a63e <USB_EPStartXfer+0x51a>
800a5ae: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a5b2: 085b lsrs r3, r3, #1
800a5b4: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a5b8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a5bc: f003 0301 and.w r3, r3, #1
800a5c0: 2b00 cmp r3, #0
800a5c2: d004 beq.n 800a5ce <USB_EPStartXfer+0x4aa>
800a5c4: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a5c8: 3301 adds r3, #1
800a5ca: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a5ce: 697b ldr r3, [r7, #20]
800a5d0: 881b ldrh r3, [r3, #0]
800a5d2: b29a uxth r2, r3
800a5d4: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a5d8: b29b uxth r3, r3
800a5da: 029b lsls r3, r3, #10
800a5dc: b29b uxth r3, r3
800a5de: 4313 orrs r3, r2
800a5e0: b29a uxth r2, r3
800a5e2: 697b ldr r3, [r7, #20]
800a5e4: 801a strh r2, [r3, #0]
800a5e6: e02a b.n 800a63e <USB_EPStartXfer+0x51a>
800a5e8: f507 7384 add.w r3, r7, #264 @ 0x108
800a5ec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a5f0: 681b ldr r3, [r3, #0]
800a5f2: 785b ldrb r3, [r3, #1]
800a5f4: 2b01 cmp r3, #1
800a5f6: d122 bne.n 800a63e <USB_EPStartXfer+0x51a>
800a5f8: f507 7384 add.w r3, r7, #264 @ 0x108
800a5fc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a600: 681b ldr r3, [r3, #0]
800a602: 623b str r3, [r7, #32]
800a604: f507 7384 add.w r3, r7, #264 @ 0x108
800a608: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a60c: 681b ldr r3, [r3, #0]
800a60e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a612: b29b uxth r3, r3
800a614: 461a mov r2, r3
800a616: 6a3b ldr r3, [r7, #32]
800a618: 4413 add r3, r2
800a61a: 623b str r3, [r7, #32]
800a61c: f507 7384 add.w r3, r7, #264 @ 0x108
800a620: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a624: 681b ldr r3, [r3, #0]
800a626: 781b ldrb r3, [r3, #0]
800a628: 011a lsls r2, r3, #4
800a62a: 6a3b ldr r3, [r7, #32]
800a62c: 4413 add r3, r2
800a62e: f203 4304 addw r3, r3, #1028 @ 0x404
800a632: 61fb str r3, [r7, #28]
800a634: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a638: b29a uxth r2, r3
800a63a: 69fb ldr r3, [r7, #28]
800a63c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800a63e: f507 7384 add.w r3, r7, #264 @ 0x108
800a642: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a646: 681b ldr r3, [r3, #0]
800a648: 891b ldrh r3, [r3, #8]
800a64a: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a64e: f507 7384 add.w r3, r7, #264 @ 0x108
800a652: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a656: 681b ldr r3, [r3, #0]
800a658: 6959 ldr r1, [r3, #20]
800a65a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a65e: b29b uxth r3, r3
800a660: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a664: f507 7084 add.w r0, r7, #264 @ 0x108
800a668: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a66c: 6800 ldr r0, [r0, #0]
800a66e: f001 fa48 bl 800bb02 <USB_WritePMA>
800a672: e3ee b.n 800ae52 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800a674: f507 7384 add.w r3, r7, #264 @ 0x108
800a678: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a67c: 681b ldr r3, [r3, #0]
800a67e: 785b ldrb r3, [r3, #1]
800a680: 2b00 cmp r3, #0
800a682: d177 bne.n 800a774 <USB_EPStartXfer+0x650>
800a684: f507 7384 add.w r3, r7, #264 @ 0x108
800a688: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a68c: 681b ldr r3, [r3, #0]
800a68e: 64bb str r3, [r7, #72] @ 0x48
800a690: f507 7384 add.w r3, r7, #264 @ 0x108
800a694: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a698: 681b ldr r3, [r3, #0]
800a69a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a69e: b29b uxth r3, r3
800a6a0: 461a mov r2, r3
800a6a2: 6cbb ldr r3, [r7, #72] @ 0x48
800a6a4: 4413 add r3, r2
800a6a6: 64bb str r3, [r7, #72] @ 0x48
800a6a8: f507 7384 add.w r3, r7, #264 @ 0x108
800a6ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a6b0: 681b ldr r3, [r3, #0]
800a6b2: 781b ldrb r3, [r3, #0]
800a6b4: 011a lsls r2, r3, #4
800a6b6: 6cbb ldr r3, [r7, #72] @ 0x48
800a6b8: 4413 add r3, r2
800a6ba: f203 4304 addw r3, r3, #1028 @ 0x404
800a6be: 647b str r3, [r7, #68] @ 0x44
800a6c0: 6c7b ldr r3, [r7, #68] @ 0x44
800a6c2: 881b ldrh r3, [r3, #0]
800a6c4: b29b uxth r3, r3
800a6c6: f3c3 0309 ubfx r3, r3, #0, #10
800a6ca: b29a uxth r2, r3
800a6cc: 6c7b ldr r3, [r7, #68] @ 0x44
800a6ce: 801a strh r2, [r3, #0]
800a6d0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a6d4: 2b3e cmp r3, #62 @ 0x3e
800a6d6: d921 bls.n 800a71c <USB_EPStartXfer+0x5f8>
800a6d8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a6dc: 095b lsrs r3, r3, #5
800a6de: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a6e2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a6e6: f003 031f and.w r3, r3, #31
800a6ea: 2b00 cmp r3, #0
800a6ec: d104 bne.n 800a6f8 <USB_EPStartXfer+0x5d4>
800a6ee: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a6f2: 3b01 subs r3, #1
800a6f4: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a6f8: 6c7b ldr r3, [r7, #68] @ 0x44
800a6fa: 881b ldrh r3, [r3, #0]
800a6fc: b29a uxth r2, r3
800a6fe: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a702: b29b uxth r3, r3
800a704: 029b lsls r3, r3, #10
800a706: b29b uxth r3, r3
800a708: 4313 orrs r3, r2
800a70a: b29b uxth r3, r3
800a70c: ea6f 4343 mvn.w r3, r3, lsl #17
800a710: ea6f 4353 mvn.w r3, r3, lsr #17
800a714: b29a uxth r2, r3
800a716: 6c7b ldr r3, [r7, #68] @ 0x44
800a718: 801a strh r2, [r3, #0]
800a71a: e056 b.n 800a7ca <USB_EPStartXfer+0x6a6>
800a71c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a720: 2b00 cmp r3, #0
800a722: d10a bne.n 800a73a <USB_EPStartXfer+0x616>
800a724: 6c7b ldr r3, [r7, #68] @ 0x44
800a726: 881b ldrh r3, [r3, #0]
800a728: b29b uxth r3, r3
800a72a: ea6f 4343 mvn.w r3, r3, lsl #17
800a72e: ea6f 4353 mvn.w r3, r3, lsr #17
800a732: b29a uxth r2, r3
800a734: 6c7b ldr r3, [r7, #68] @ 0x44
800a736: 801a strh r2, [r3, #0]
800a738: e047 b.n 800a7ca <USB_EPStartXfer+0x6a6>
800a73a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a73e: 085b lsrs r3, r3, #1
800a740: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a744: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a748: f003 0301 and.w r3, r3, #1
800a74c: 2b00 cmp r3, #0
800a74e: d004 beq.n 800a75a <USB_EPStartXfer+0x636>
800a750: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a754: 3301 adds r3, #1
800a756: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a75a: 6c7b ldr r3, [r7, #68] @ 0x44
800a75c: 881b ldrh r3, [r3, #0]
800a75e: b29a uxth r2, r3
800a760: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a764: b29b uxth r3, r3
800a766: 029b lsls r3, r3, #10
800a768: b29b uxth r3, r3
800a76a: 4313 orrs r3, r2
800a76c: b29a uxth r2, r3
800a76e: 6c7b ldr r3, [r7, #68] @ 0x44
800a770: 801a strh r2, [r3, #0]
800a772: e02a b.n 800a7ca <USB_EPStartXfer+0x6a6>
800a774: f507 7384 add.w r3, r7, #264 @ 0x108
800a778: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a77c: 681b ldr r3, [r3, #0]
800a77e: 785b ldrb r3, [r3, #1]
800a780: 2b01 cmp r3, #1
800a782: d122 bne.n 800a7ca <USB_EPStartXfer+0x6a6>
800a784: f507 7384 add.w r3, r7, #264 @ 0x108
800a788: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a78c: 681b ldr r3, [r3, #0]
800a78e: 653b str r3, [r7, #80] @ 0x50
800a790: f507 7384 add.w r3, r7, #264 @ 0x108
800a794: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a798: 681b ldr r3, [r3, #0]
800a79a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a79e: b29b uxth r3, r3
800a7a0: 461a mov r2, r3
800a7a2: 6d3b ldr r3, [r7, #80] @ 0x50
800a7a4: 4413 add r3, r2
800a7a6: 653b str r3, [r7, #80] @ 0x50
800a7a8: f507 7384 add.w r3, r7, #264 @ 0x108
800a7ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7b0: 681b ldr r3, [r3, #0]
800a7b2: 781b ldrb r3, [r3, #0]
800a7b4: 011a lsls r2, r3, #4
800a7b6: 6d3b ldr r3, [r7, #80] @ 0x50
800a7b8: 4413 add r3, r2
800a7ba: f203 4304 addw r3, r3, #1028 @ 0x404
800a7be: 64fb str r3, [r7, #76] @ 0x4c
800a7c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a7c4: b29a uxth r2, r3
800a7c6: 6cfb ldr r3, [r7, #76] @ 0x4c
800a7c8: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800a7ca: f507 7384 add.w r3, r7, #264 @ 0x108
800a7ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7d2: 681b ldr r3, [r3, #0]
800a7d4: 891b ldrh r3, [r3, #8]
800a7d6: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a7da: f507 7384 add.w r3, r7, #264 @ 0x108
800a7de: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7e2: 681b ldr r3, [r3, #0]
800a7e4: 6959 ldr r1, [r3, #20]
800a7e6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a7ea: b29b uxth r3, r3
800a7ec: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a7f0: f507 7084 add.w r0, r7, #264 @ 0x108
800a7f4: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a7f8: 6800 ldr r0, [r0, #0]
800a7fa: f001 f982 bl 800bb02 <USB_WritePMA>
ep->xfer_buff += len;
800a7fe: f507 7384 add.w r3, r7, #264 @ 0x108
800a802: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a806: 681b ldr r3, [r3, #0]
800a808: 695a ldr r2, [r3, #20]
800a80a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a80e: 441a add r2, r3
800a810: f507 7384 add.w r3, r7, #264 @ 0x108
800a814: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a818: 681b ldr r3, [r3, #0]
800a81a: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800a81c: f507 7384 add.w r3, r7, #264 @ 0x108
800a820: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a824: 681b ldr r3, [r3, #0]
800a826: 6a1a ldr r2, [r3, #32]
800a828: f507 7384 add.w r3, r7, #264 @ 0x108
800a82c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a830: 681b ldr r3, [r3, #0]
800a832: 691b ldr r3, [r3, #16]
800a834: 429a cmp r2, r3
800a836: d90f bls.n 800a858 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
800a838: f507 7384 add.w r3, r7, #264 @ 0x108
800a83c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a840: 681b ldr r3, [r3, #0]
800a842: 6a1a ldr r2, [r3, #32]
800a844: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a848: 1ad2 subs r2, r2, r3
800a84a: f507 7384 add.w r3, r7, #264 @ 0x108
800a84e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a852: 681b ldr r3, [r3, #0]
800a854: 621a str r2, [r3, #32]
800a856: e00e b.n 800a876 <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
800a858: f507 7384 add.w r3, r7, #264 @ 0x108
800a85c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a860: 681b ldr r3, [r3, #0]
800a862: 6a1b ldr r3, [r3, #32]
800a864: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800a868: f507 7384 add.w r3, r7, #264 @ 0x108
800a86c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a870: 681b ldr r3, [r3, #0]
800a872: 2200 movs r2, #0
800a874: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800a876: f507 7384 add.w r3, r7, #264 @ 0x108
800a87a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a87e: 681b ldr r3, [r3, #0]
800a880: 643b str r3, [r7, #64] @ 0x40
800a882: f507 7384 add.w r3, r7, #264 @ 0x108
800a886: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a88a: 681b ldr r3, [r3, #0]
800a88c: 785b ldrb r3, [r3, #1]
800a88e: 2b00 cmp r3, #0
800a890: d177 bne.n 800a982 <USB_EPStartXfer+0x85e>
800a892: f507 7384 add.w r3, r7, #264 @ 0x108
800a896: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a89a: 681b ldr r3, [r3, #0]
800a89c: 63bb str r3, [r7, #56] @ 0x38
800a89e: f507 7384 add.w r3, r7, #264 @ 0x108
800a8a2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8a6: 681b ldr r3, [r3, #0]
800a8a8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a8ac: b29b uxth r3, r3
800a8ae: 461a mov r2, r3
800a8b0: 6bbb ldr r3, [r7, #56] @ 0x38
800a8b2: 4413 add r3, r2
800a8b4: 63bb str r3, [r7, #56] @ 0x38
800a8b6: f507 7384 add.w r3, r7, #264 @ 0x108
800a8ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8be: 681b ldr r3, [r3, #0]
800a8c0: 781b ldrb r3, [r3, #0]
800a8c2: 011a lsls r2, r3, #4
800a8c4: 6bbb ldr r3, [r7, #56] @ 0x38
800a8c6: 4413 add r3, r2
800a8c8: f203 430c addw r3, r3, #1036 @ 0x40c
800a8cc: 637b str r3, [r7, #52] @ 0x34
800a8ce: 6b7b ldr r3, [r7, #52] @ 0x34
800a8d0: 881b ldrh r3, [r3, #0]
800a8d2: b29b uxth r3, r3
800a8d4: f3c3 0309 ubfx r3, r3, #0, #10
800a8d8: b29a uxth r2, r3
800a8da: 6b7b ldr r3, [r7, #52] @ 0x34
800a8dc: 801a strh r2, [r3, #0]
800a8de: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a8e2: 2b3e cmp r3, #62 @ 0x3e
800a8e4: d921 bls.n 800a92a <USB_EPStartXfer+0x806>
800a8e6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a8ea: 095b lsrs r3, r3, #5
800a8ec: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a8f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a8f4: f003 031f and.w r3, r3, #31
800a8f8: 2b00 cmp r3, #0
800a8fa: d104 bne.n 800a906 <USB_EPStartXfer+0x7e2>
800a8fc: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a900: 3b01 subs r3, #1
800a902: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a906: 6b7b ldr r3, [r7, #52] @ 0x34
800a908: 881b ldrh r3, [r3, #0]
800a90a: b29a uxth r2, r3
800a90c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a910: b29b uxth r3, r3
800a912: 029b lsls r3, r3, #10
800a914: b29b uxth r3, r3
800a916: 4313 orrs r3, r2
800a918: b29b uxth r3, r3
800a91a: ea6f 4343 mvn.w r3, r3, lsl #17
800a91e: ea6f 4353 mvn.w r3, r3, lsr #17
800a922: b29a uxth r2, r3
800a924: 6b7b ldr r3, [r7, #52] @ 0x34
800a926: 801a strh r2, [r3, #0]
800a928: e050 b.n 800a9cc <USB_EPStartXfer+0x8a8>
800a92a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a92e: 2b00 cmp r3, #0
800a930: d10a bne.n 800a948 <USB_EPStartXfer+0x824>
800a932: 6b7b ldr r3, [r7, #52] @ 0x34
800a934: 881b ldrh r3, [r3, #0]
800a936: b29b uxth r3, r3
800a938: ea6f 4343 mvn.w r3, r3, lsl #17
800a93c: ea6f 4353 mvn.w r3, r3, lsr #17
800a940: b29a uxth r2, r3
800a942: 6b7b ldr r3, [r7, #52] @ 0x34
800a944: 801a strh r2, [r3, #0]
800a946: e041 b.n 800a9cc <USB_EPStartXfer+0x8a8>
800a948: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a94c: 085b lsrs r3, r3, #1
800a94e: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a952: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a956: f003 0301 and.w r3, r3, #1
800a95a: 2b00 cmp r3, #0
800a95c: d004 beq.n 800a968 <USB_EPStartXfer+0x844>
800a95e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a962: 3301 adds r3, #1
800a964: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a968: 6b7b ldr r3, [r7, #52] @ 0x34
800a96a: 881b ldrh r3, [r3, #0]
800a96c: b29a uxth r2, r3
800a96e: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a972: b29b uxth r3, r3
800a974: 029b lsls r3, r3, #10
800a976: b29b uxth r3, r3
800a978: 4313 orrs r3, r2
800a97a: b29a uxth r2, r3
800a97c: 6b7b ldr r3, [r7, #52] @ 0x34
800a97e: 801a strh r2, [r3, #0]
800a980: e024 b.n 800a9cc <USB_EPStartXfer+0x8a8>
800a982: f507 7384 add.w r3, r7, #264 @ 0x108
800a986: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a98a: 681b ldr r3, [r3, #0]
800a98c: 785b ldrb r3, [r3, #1]
800a98e: 2b01 cmp r3, #1
800a990: d11c bne.n 800a9cc <USB_EPStartXfer+0x8a8>
800a992: f507 7384 add.w r3, r7, #264 @ 0x108
800a996: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a99a: 681b ldr r3, [r3, #0]
800a99c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a9a0: b29b uxth r3, r3
800a9a2: 461a mov r2, r3
800a9a4: 6c3b ldr r3, [r7, #64] @ 0x40
800a9a6: 4413 add r3, r2
800a9a8: 643b str r3, [r7, #64] @ 0x40
800a9aa: f507 7384 add.w r3, r7, #264 @ 0x108
800a9ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9b2: 681b ldr r3, [r3, #0]
800a9b4: 781b ldrb r3, [r3, #0]
800a9b6: 011a lsls r2, r3, #4
800a9b8: 6c3b ldr r3, [r7, #64] @ 0x40
800a9ba: 4413 add r3, r2
800a9bc: f203 430c addw r3, r3, #1036 @ 0x40c
800a9c0: 63fb str r3, [r7, #60] @ 0x3c
800a9c2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a9c6: b29a uxth r2, r3
800a9c8: 6bfb ldr r3, [r7, #60] @ 0x3c
800a9ca: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800a9cc: f507 7384 add.w r3, r7, #264 @ 0x108
800a9d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9d4: 681b ldr r3, [r3, #0]
800a9d6: 895b ldrh r3, [r3, #10]
800a9d8: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a9dc: f507 7384 add.w r3, r7, #264 @ 0x108
800a9e0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9e4: 681b ldr r3, [r3, #0]
800a9e6: 6959 ldr r1, [r3, #20]
800a9e8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a9ec: b29b uxth r3, r3
800a9ee: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a9f2: f507 7084 add.w r0, r7, #264 @ 0x108
800a9f6: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a9fa: 6800 ldr r0, [r0, #0]
800a9fc: f001 f881 bl 800bb02 <USB_WritePMA>
800aa00: e227 b.n 800ae52 <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
800aa02: f507 7384 add.w r3, r7, #264 @ 0x108
800aa06: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa0a: 681b ldr r3, [r3, #0]
800aa0c: 6a1b ldr r3, [r3, #32]
800aa0e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
800aa12: f507 7384 add.w r3, r7, #264 @ 0x108
800aa16: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa1a: 681a ldr r2, [r3, #0]
800aa1c: f507 7384 add.w r3, r7, #264 @ 0x108
800aa20: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa24: 681b ldr r3, [r3, #0]
800aa26: 781b ldrb r3, [r3, #0]
800aa28: 009b lsls r3, r3, #2
800aa2a: 4413 add r3, r2
800aa2c: 881b ldrh r3, [r3, #0]
800aa2e: b29b uxth r3, r3
800aa30: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800aa34: f023 0370 bic.w r3, r3, #112 @ 0x70
800aa38: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800aa3c: f507 7384 add.w r3, r7, #264 @ 0x108
800aa40: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa44: 681a ldr r2, [r3, #0]
800aa46: f507 7384 add.w r3, r7, #264 @ 0x108
800aa4a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa4e: 681b ldr r3, [r3, #0]
800aa50: 781b ldrb r3, [r3, #0]
800aa52: 009b lsls r3, r3, #2
800aa54: 441a add r2, r3
800aa56: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800aa5a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800aa5e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800aa62: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800aa66: f043 0380 orr.w r3, r3, #128 @ 0x80
800aa6a: b29b uxth r3, r3
800aa6c: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800aa6e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa72: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa76: 681b ldr r3, [r3, #0]
800aa78: 65fb str r3, [r7, #92] @ 0x5c
800aa7a: f507 7384 add.w r3, r7, #264 @ 0x108
800aa7e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa82: 681b ldr r3, [r3, #0]
800aa84: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800aa88: b29b uxth r3, r3
800aa8a: 461a mov r2, r3
800aa8c: 6dfb ldr r3, [r7, #92] @ 0x5c
800aa8e: 4413 add r3, r2
800aa90: 65fb str r3, [r7, #92] @ 0x5c
800aa92: f507 7384 add.w r3, r7, #264 @ 0x108
800aa96: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa9a: 681b ldr r3, [r3, #0]
800aa9c: 781b ldrb r3, [r3, #0]
800aa9e: 011a lsls r2, r3, #4
800aaa0: 6dfb ldr r3, [r7, #92] @ 0x5c
800aaa2: 4413 add r3, r2
800aaa4: f203 4304 addw r3, r3, #1028 @ 0x404
800aaa8: 65bb str r3, [r7, #88] @ 0x58
800aaaa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aaae: b29a uxth r2, r3
800aab0: 6dbb ldr r3, [r7, #88] @ 0x58
800aab2: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800aab4: f507 7384 add.w r3, r7, #264 @ 0x108
800aab8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aabc: 681b ldr r3, [r3, #0]
800aabe: 891b ldrh r3, [r3, #8]
800aac0: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800aac4: f507 7384 add.w r3, r7, #264 @ 0x108
800aac8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aacc: 681b ldr r3, [r3, #0]
800aace: 6959 ldr r1, [r3, #20]
800aad0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aad4: b29b uxth r3, r3
800aad6: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800aada: f507 7084 add.w r0, r7, #264 @ 0x108
800aade: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800aae2: 6800 ldr r0, [r0, #0]
800aae4: f001 f80d bl 800bb02 <USB_WritePMA>
800aae8: e1b3 b.n 800ae52 <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800aaea: f507 7384 add.w r3, r7, #264 @ 0x108
800aaee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aaf2: 681b ldr r3, [r3, #0]
800aaf4: 6a1a ldr r2, [r3, #32]
800aaf6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aafa: 1ad2 subs r2, r2, r3
800aafc: f507 7384 add.w r3, r7, #264 @ 0x108
800ab00: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab04: 681b ldr r3, [r3, #0]
800ab06: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800ab08: f507 7384 add.w r3, r7, #264 @ 0x108
800ab0c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab10: 681a ldr r2, [r3, #0]
800ab12: f507 7384 add.w r3, r7, #264 @ 0x108
800ab16: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab1a: 681b ldr r3, [r3, #0]
800ab1c: 781b ldrb r3, [r3, #0]
800ab1e: 009b lsls r3, r3, #2
800ab20: 4413 add r3, r2
800ab22: 881b ldrh r3, [r3, #0]
800ab24: b29b uxth r3, r3
800ab26: f003 0340 and.w r3, r3, #64 @ 0x40
800ab2a: 2b00 cmp r3, #0
800ab2c: f000 80c6 beq.w 800acbc <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800ab30: f507 7384 add.w r3, r7, #264 @ 0x108
800ab34: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab38: 681b ldr r3, [r3, #0]
800ab3a: 673b str r3, [r7, #112] @ 0x70
800ab3c: f507 7384 add.w r3, r7, #264 @ 0x108
800ab40: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab44: 681b ldr r3, [r3, #0]
800ab46: 785b ldrb r3, [r3, #1]
800ab48: 2b00 cmp r3, #0
800ab4a: d177 bne.n 800ac3c <USB_EPStartXfer+0xb18>
800ab4c: f507 7384 add.w r3, r7, #264 @ 0x108
800ab50: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab54: 681b ldr r3, [r3, #0]
800ab56: 66bb str r3, [r7, #104] @ 0x68
800ab58: f507 7384 add.w r3, r7, #264 @ 0x108
800ab5c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ab60: 681b ldr r3, [r3, #0]
800ab62: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ab66: b29b uxth r3, r3
800ab68: 461a mov r2, r3
800ab6a: 6ebb ldr r3, [r7, #104] @ 0x68
800ab6c: 4413 add r3, r2
800ab6e: 66bb str r3, [r7, #104] @ 0x68
800ab70: f507 7384 add.w r3, r7, #264 @ 0x108
800ab74: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab78: 681b ldr r3, [r3, #0]
800ab7a: 781b ldrb r3, [r3, #0]
800ab7c: 011a lsls r2, r3, #4
800ab7e: 6ebb ldr r3, [r7, #104] @ 0x68
800ab80: 4413 add r3, r2
800ab82: f203 430c addw r3, r3, #1036 @ 0x40c
800ab86: 667b str r3, [r7, #100] @ 0x64
800ab88: 6e7b ldr r3, [r7, #100] @ 0x64
800ab8a: 881b ldrh r3, [r3, #0]
800ab8c: b29b uxth r3, r3
800ab8e: f3c3 0309 ubfx r3, r3, #0, #10
800ab92: b29a uxth r2, r3
800ab94: 6e7b ldr r3, [r7, #100] @ 0x64
800ab96: 801a strh r2, [r3, #0]
800ab98: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab9c: 2b3e cmp r3, #62 @ 0x3e
800ab9e: d921 bls.n 800abe4 <USB_EPStartXfer+0xac0>
800aba0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aba4: 095b lsrs r3, r3, #5
800aba6: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800abaa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abae: f003 031f and.w r3, r3, #31
800abb2: 2b00 cmp r3, #0
800abb4: d104 bne.n 800abc0 <USB_EPStartXfer+0xa9c>
800abb6: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800abba: 3b01 subs r3, #1
800abbc: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800abc0: 6e7b ldr r3, [r7, #100] @ 0x64
800abc2: 881b ldrh r3, [r3, #0]
800abc4: b29a uxth r2, r3
800abc6: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800abca: b29b uxth r3, r3
800abcc: 029b lsls r3, r3, #10
800abce: b29b uxth r3, r3
800abd0: 4313 orrs r3, r2
800abd2: b29b uxth r3, r3
800abd4: ea6f 4343 mvn.w r3, r3, lsl #17
800abd8: ea6f 4353 mvn.w r3, r3, lsr #17
800abdc: b29a uxth r2, r3
800abde: 6e7b ldr r3, [r7, #100] @ 0x64
800abe0: 801a strh r2, [r3, #0]
800abe2: e050 b.n 800ac86 <USB_EPStartXfer+0xb62>
800abe4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800abe8: 2b00 cmp r3, #0
800abea: d10a bne.n 800ac02 <USB_EPStartXfer+0xade>
800abec: 6e7b ldr r3, [r7, #100] @ 0x64
800abee: 881b ldrh r3, [r3, #0]
800abf0: b29b uxth r3, r3
800abf2: ea6f 4343 mvn.w r3, r3, lsl #17
800abf6: ea6f 4353 mvn.w r3, r3, lsr #17
800abfa: b29a uxth r2, r3
800abfc: 6e7b ldr r3, [r7, #100] @ 0x64
800abfe: 801a strh r2, [r3, #0]
800ac00: e041 b.n 800ac86 <USB_EPStartXfer+0xb62>
800ac02: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac06: 085b lsrs r3, r3, #1
800ac08: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800ac0c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac10: f003 0301 and.w r3, r3, #1
800ac14: 2b00 cmp r3, #0
800ac16: d004 beq.n 800ac22 <USB_EPStartXfer+0xafe>
800ac18: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800ac1c: 3301 adds r3, #1
800ac1e: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800ac22: 6e7b ldr r3, [r7, #100] @ 0x64
800ac24: 881b ldrh r3, [r3, #0]
800ac26: b29a uxth r2, r3
800ac28: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800ac2c: b29b uxth r3, r3
800ac2e: 029b lsls r3, r3, #10
800ac30: b29b uxth r3, r3
800ac32: 4313 orrs r3, r2
800ac34: b29a uxth r2, r3
800ac36: 6e7b ldr r3, [r7, #100] @ 0x64
800ac38: 801a strh r2, [r3, #0]
800ac3a: e024 b.n 800ac86 <USB_EPStartXfer+0xb62>
800ac3c: f507 7384 add.w r3, r7, #264 @ 0x108
800ac40: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac44: 681b ldr r3, [r3, #0]
800ac46: 785b ldrb r3, [r3, #1]
800ac48: 2b01 cmp r3, #1
800ac4a: d11c bne.n 800ac86 <USB_EPStartXfer+0xb62>
800ac4c: f507 7384 add.w r3, r7, #264 @ 0x108
800ac50: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ac54: 681b ldr r3, [r3, #0]
800ac56: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ac5a: b29b uxth r3, r3
800ac5c: 461a mov r2, r3
800ac5e: 6f3b ldr r3, [r7, #112] @ 0x70
800ac60: 4413 add r3, r2
800ac62: 673b str r3, [r7, #112] @ 0x70
800ac64: f507 7384 add.w r3, r7, #264 @ 0x108
800ac68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac6c: 681b ldr r3, [r3, #0]
800ac6e: 781b ldrb r3, [r3, #0]
800ac70: 011a lsls r2, r3, #4
800ac72: 6f3b ldr r3, [r7, #112] @ 0x70
800ac74: 4413 add r3, r2
800ac76: f203 430c addw r3, r3, #1036 @ 0x40c
800ac7a: 66fb str r3, [r7, #108] @ 0x6c
800ac7c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac80: b29a uxth r2, r3
800ac82: 6efb ldr r3, [r7, #108] @ 0x6c
800ac84: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800ac86: f507 7384 add.w r3, r7, #264 @ 0x108
800ac8a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac8e: 681b ldr r3, [r3, #0]
800ac90: 895b ldrh r3, [r3, #10]
800ac92: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800ac96: f507 7384 add.w r3, r7, #264 @ 0x108
800ac9a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac9e: 681b ldr r3, [r3, #0]
800aca0: 6959 ldr r1, [r3, #20]
800aca2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aca6: b29b uxth r3, r3
800aca8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800acac: f507 7084 add.w r0, r7, #264 @ 0x108
800acb0: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800acb4: 6800 ldr r0, [r0, #0]
800acb6: f000 ff24 bl 800bb02 <USB_WritePMA>
800acba: e0ca b.n 800ae52 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800acbc: f507 7384 add.w r3, r7, #264 @ 0x108
800acc0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acc4: 681b ldr r3, [r3, #0]
800acc6: 785b ldrb r3, [r3, #1]
800acc8: 2b00 cmp r3, #0
800acca: d177 bne.n 800adbc <USB_EPStartXfer+0xc98>
800accc: f507 7384 add.w r3, r7, #264 @ 0x108
800acd0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800acd4: 681b ldr r3, [r3, #0]
800acd6: 67fb str r3, [r7, #124] @ 0x7c
800acd8: f507 7384 add.w r3, r7, #264 @ 0x108
800acdc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ace0: 681b ldr r3, [r3, #0]
800ace2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ace6: b29b uxth r3, r3
800ace8: 461a mov r2, r3
800acea: 6ffb ldr r3, [r7, #124] @ 0x7c
800acec: 4413 add r3, r2
800acee: 67fb str r3, [r7, #124] @ 0x7c
800acf0: f507 7384 add.w r3, r7, #264 @ 0x108
800acf4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acf8: 681b ldr r3, [r3, #0]
800acfa: 781b ldrb r3, [r3, #0]
800acfc: 011a lsls r2, r3, #4
800acfe: 6ffb ldr r3, [r7, #124] @ 0x7c
800ad00: 4413 add r3, r2
800ad02: f203 4304 addw r3, r3, #1028 @ 0x404
800ad06: 67bb str r3, [r7, #120] @ 0x78
800ad08: 6fbb ldr r3, [r7, #120] @ 0x78
800ad0a: 881b ldrh r3, [r3, #0]
800ad0c: b29b uxth r3, r3
800ad0e: f3c3 0309 ubfx r3, r3, #0, #10
800ad12: b29a uxth r2, r3
800ad14: 6fbb ldr r3, [r7, #120] @ 0x78
800ad16: 801a strh r2, [r3, #0]
800ad18: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad1c: 2b3e cmp r3, #62 @ 0x3e
800ad1e: d921 bls.n 800ad64 <USB_EPStartXfer+0xc40>
800ad20: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad24: 095b lsrs r3, r3, #5
800ad26: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800ad2a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad2e: f003 031f and.w r3, r3, #31
800ad32: 2b00 cmp r3, #0
800ad34: d104 bne.n 800ad40 <USB_EPStartXfer+0xc1c>
800ad36: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800ad3a: 3b01 subs r3, #1
800ad3c: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800ad40: 6fbb ldr r3, [r7, #120] @ 0x78
800ad42: 881b ldrh r3, [r3, #0]
800ad44: b29a uxth r2, r3
800ad46: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800ad4a: b29b uxth r3, r3
800ad4c: 029b lsls r3, r3, #10
800ad4e: b29b uxth r3, r3
800ad50: 4313 orrs r3, r2
800ad52: b29b uxth r3, r3
800ad54: ea6f 4343 mvn.w r3, r3, lsl #17
800ad58: ea6f 4353 mvn.w r3, r3, lsr #17
800ad5c: b29a uxth r2, r3
800ad5e: 6fbb ldr r3, [r7, #120] @ 0x78
800ad60: 801a strh r2, [r3, #0]
800ad62: e05c b.n 800ae1e <USB_EPStartXfer+0xcfa>
800ad64: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad68: 2b00 cmp r3, #0
800ad6a: d10a bne.n 800ad82 <USB_EPStartXfer+0xc5e>
800ad6c: 6fbb ldr r3, [r7, #120] @ 0x78
800ad6e: 881b ldrh r3, [r3, #0]
800ad70: b29b uxth r3, r3
800ad72: ea6f 4343 mvn.w r3, r3, lsl #17
800ad76: ea6f 4353 mvn.w r3, r3, lsr #17
800ad7a: b29a uxth r2, r3
800ad7c: 6fbb ldr r3, [r7, #120] @ 0x78
800ad7e: 801a strh r2, [r3, #0]
800ad80: e04d b.n 800ae1e <USB_EPStartXfer+0xcfa>
800ad82: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad86: 085b lsrs r3, r3, #1
800ad88: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800ad8c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad90: f003 0301 and.w r3, r3, #1
800ad94: 2b00 cmp r3, #0
800ad96: d004 beq.n 800ada2 <USB_EPStartXfer+0xc7e>
800ad98: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800ad9c: 3301 adds r3, #1
800ad9e: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800ada2: 6fbb ldr r3, [r7, #120] @ 0x78
800ada4: 881b ldrh r3, [r3, #0]
800ada6: b29a uxth r2, r3
800ada8: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800adac: b29b uxth r3, r3
800adae: 029b lsls r3, r3, #10
800adb0: b29b uxth r3, r3
800adb2: 4313 orrs r3, r2
800adb4: b29a uxth r2, r3
800adb6: 6fbb ldr r3, [r7, #120] @ 0x78
800adb8: 801a strh r2, [r3, #0]
800adba: e030 b.n 800ae1e <USB_EPStartXfer+0xcfa>
800adbc: f507 7384 add.w r3, r7, #264 @ 0x108
800adc0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adc4: 681b ldr r3, [r3, #0]
800adc6: 785b ldrb r3, [r3, #1]
800adc8: 2b01 cmp r3, #1
800adca: d128 bne.n 800ae1e <USB_EPStartXfer+0xcfa>
800adcc: f507 7384 add.w r3, r7, #264 @ 0x108
800add0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800add4: 681b ldr r3, [r3, #0]
800add6: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800adda: f507 7384 add.w r3, r7, #264 @ 0x108
800adde: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ade2: 681b ldr r3, [r3, #0]
800ade4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ade8: b29b uxth r3, r3
800adea: 461a mov r2, r3
800adec: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800adf0: 4413 add r3, r2
800adf2: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800adf6: f507 7384 add.w r3, r7, #264 @ 0x108
800adfa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adfe: 681b ldr r3, [r3, #0]
800ae00: 781b ldrb r3, [r3, #0]
800ae02: 011a lsls r2, r3, #4
800ae04: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800ae08: 4413 add r3, r2
800ae0a: f203 4304 addw r3, r3, #1028 @ 0x404
800ae0e: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800ae12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae16: b29a uxth r2, r3
800ae18: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800ae1c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800ae1e: f507 7384 add.w r3, r7, #264 @ 0x108
800ae22: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae26: 681b ldr r3, [r3, #0]
800ae28: 891b ldrh r3, [r3, #8]
800ae2a: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800ae2e: f507 7384 add.w r3, r7, #264 @ 0x108
800ae32: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae36: 681b ldr r3, [r3, #0]
800ae38: 6959 ldr r1, [r3, #20]
800ae3a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae3e: b29b uxth r3, r3
800ae40: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800ae44: f507 7084 add.w r0, r7, #264 @ 0x108
800ae48: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800ae4c: 6800 ldr r0, [r0, #0]
800ae4e: f000 fe58 bl 800bb02 <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
800ae52: f507 7384 add.w r3, r7, #264 @ 0x108
800ae56: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ae5a: 681a ldr r2, [r3, #0]
800ae5c: f507 7384 add.w r3, r7, #264 @ 0x108
800ae60: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae64: 681b ldr r3, [r3, #0]
800ae66: 781b ldrb r3, [r3, #0]
800ae68: 009b lsls r3, r3, #2
800ae6a: 4413 add r3, r2
800ae6c: 881b ldrh r3, [r3, #0]
800ae6e: b29b uxth r3, r3
800ae70: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800ae74: f023 0340 bic.w r3, r3, #64 @ 0x40
800ae78: 817b strh r3, [r7, #10]
800ae7a: 897b ldrh r3, [r7, #10]
800ae7c: f083 0310 eor.w r3, r3, #16
800ae80: 817b strh r3, [r7, #10]
800ae82: 897b ldrh r3, [r7, #10]
800ae84: f083 0320 eor.w r3, r3, #32
800ae88: 817b strh r3, [r7, #10]
800ae8a: f507 7384 add.w r3, r7, #264 @ 0x108
800ae8e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ae92: 681a ldr r2, [r3, #0]
800ae94: f507 7384 add.w r3, r7, #264 @ 0x108
800ae98: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae9c: 681b ldr r3, [r3, #0]
800ae9e: 781b ldrb r3, [r3, #0]
800aea0: 009b lsls r3, r3, #2
800aea2: 441a add r2, r3
800aea4: 897b ldrh r3, [r7, #10]
800aea6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800aeaa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800aeae: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800aeb2: f043 0380 orr.w r3, r3, #128 @ 0x80
800aeb6: b29b uxth r3, r3
800aeb8: 8013 strh r3, [r2, #0]
800aeba: f000 bcde b.w 800b87a <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800aebe: f507 7384 add.w r3, r7, #264 @ 0x108
800aec2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aec6: 681b ldr r3, [r3, #0]
800aec8: 7b1b ldrb r3, [r3, #12]
800aeca: 2b00 cmp r3, #0
800aecc: f040 80bb bne.w 800b046 <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800aed0: f507 7384 add.w r3, r7, #264 @ 0x108
800aed4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aed8: 681b ldr r3, [r3, #0]
800aeda: 699a ldr r2, [r3, #24]
800aedc: f507 7384 add.w r3, r7, #264 @ 0x108
800aee0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aee4: 681b ldr r3, [r3, #0]
800aee6: 691b ldr r3, [r3, #16]
800aee8: 429a cmp r2, r3
800aeea: d917 bls.n 800af1c <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
800aeec: f507 7384 add.w r3, r7, #264 @ 0x108
800aef0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aef4: 681b ldr r3, [r3, #0]
800aef6: 691b ldr r3, [r3, #16]
800aef8: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800aefc: f507 7384 add.w r3, r7, #264 @ 0x108
800af00: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af04: 681b ldr r3, [r3, #0]
800af06: 699a ldr r2, [r3, #24]
800af08: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af0c: 1ad2 subs r2, r2, r3
800af0e: f507 7384 add.w r3, r7, #264 @ 0x108
800af12: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af16: 681b ldr r3, [r3, #0]
800af18: 619a str r2, [r3, #24]
800af1a: e00e b.n 800af3a <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
800af1c: f507 7384 add.w r3, r7, #264 @ 0x108
800af20: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af24: 681b ldr r3, [r3, #0]
800af26: 699b ldr r3, [r3, #24]
800af28: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800af2c: f507 7384 add.w r3, r7, #264 @ 0x108
800af30: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af34: 681b ldr r3, [r3, #0]
800af36: 2200 movs r2, #0
800af38: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
800af3a: f507 7384 add.w r3, r7, #264 @ 0x108
800af3e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af42: 681b ldr r3, [r3, #0]
800af44: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800af48: f507 7384 add.w r3, r7, #264 @ 0x108
800af4c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af50: 681b ldr r3, [r3, #0]
800af52: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800af56: b29b uxth r3, r3
800af58: 461a mov r2, r3
800af5a: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800af5e: 4413 add r3, r2
800af60: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800af64: f507 7384 add.w r3, r7, #264 @ 0x108
800af68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af6c: 681b ldr r3, [r3, #0]
800af6e: 781b ldrb r3, [r3, #0]
800af70: 011a lsls r2, r3, #4
800af72: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800af76: 4413 add r3, r2
800af78: f203 430c addw r3, r3, #1036 @ 0x40c
800af7c: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800af80: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800af84: 881b ldrh r3, [r3, #0]
800af86: b29b uxth r3, r3
800af88: f3c3 0309 ubfx r3, r3, #0, #10
800af8c: b29a uxth r2, r3
800af8e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800af92: 801a strh r2, [r3, #0]
800af94: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af98: 2b3e cmp r3, #62 @ 0x3e
800af9a: d924 bls.n 800afe6 <USB_EPStartXfer+0xec2>
800af9c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afa0: 095b lsrs r3, r3, #5
800afa2: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800afa6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afaa: f003 031f and.w r3, r3, #31
800afae: 2b00 cmp r3, #0
800afb0: d104 bne.n 800afbc <USB_EPStartXfer+0xe98>
800afb2: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800afb6: 3b01 subs r3, #1
800afb8: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800afbc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800afc0: 881b ldrh r3, [r3, #0]
800afc2: b29a uxth r2, r3
800afc4: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800afc8: b29b uxth r3, r3
800afca: 029b lsls r3, r3, #10
800afcc: b29b uxth r3, r3
800afce: 4313 orrs r3, r2
800afd0: b29b uxth r3, r3
800afd2: ea6f 4343 mvn.w r3, r3, lsl #17
800afd6: ea6f 4353 mvn.w r3, r3, lsr #17
800afda: b29a uxth r2, r3
800afdc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800afe0: 801a strh r2, [r3, #0]
800afe2: f000 bc10 b.w 800b806 <USB_EPStartXfer+0x16e2>
800afe6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afea: 2b00 cmp r3, #0
800afec: d10c bne.n 800b008 <USB_EPStartXfer+0xee4>
800afee: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800aff2: 881b ldrh r3, [r3, #0]
800aff4: b29b uxth r3, r3
800aff6: ea6f 4343 mvn.w r3, r3, lsl #17
800affa: ea6f 4353 mvn.w r3, r3, lsr #17
800affe: b29a uxth r2, r3
800b000: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b004: 801a strh r2, [r3, #0]
800b006: e3fe b.n 800b806 <USB_EPStartXfer+0x16e2>
800b008: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b00c: 085b lsrs r3, r3, #1
800b00e: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b012: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b016: f003 0301 and.w r3, r3, #1
800b01a: 2b00 cmp r3, #0
800b01c: d004 beq.n 800b028 <USB_EPStartXfer+0xf04>
800b01e: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b022: 3301 adds r3, #1
800b024: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b028: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b02c: 881b ldrh r3, [r3, #0]
800b02e: b29a uxth r2, r3
800b030: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b034: b29b uxth r3, r3
800b036: 029b lsls r3, r3, #10
800b038: b29b uxth r3, r3
800b03a: 4313 orrs r3, r2
800b03c: b29a uxth r2, r3
800b03e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b042: 801a strh r2, [r3, #0]
800b044: e3df b.n 800b806 <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
800b046: f507 7384 add.w r3, r7, #264 @ 0x108
800b04a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b04e: 681b ldr r3, [r3, #0]
800b050: 78db ldrb r3, [r3, #3]
800b052: 2b02 cmp r3, #2
800b054: f040 8218 bne.w 800b488 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
800b058: f507 7384 add.w r3, r7, #264 @ 0x108
800b05c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b060: 681b ldr r3, [r3, #0]
800b062: 785b ldrb r3, [r3, #1]
800b064: 2b00 cmp r3, #0
800b066: f040 809d bne.w 800b1a4 <USB_EPStartXfer+0x1080>
800b06a: f507 7384 add.w r3, r7, #264 @ 0x108
800b06e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b072: 681b ldr r3, [r3, #0]
800b074: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b078: f507 7384 add.w r3, r7, #264 @ 0x108
800b07c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b080: 681b ldr r3, [r3, #0]
800b082: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b086: b29b uxth r3, r3
800b088: 461a mov r2, r3
800b08a: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b08e: 4413 add r3, r2
800b090: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b094: f507 7384 add.w r3, r7, #264 @ 0x108
800b098: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b09c: 681b ldr r3, [r3, #0]
800b09e: 781b ldrb r3, [r3, #0]
800b0a0: 011a lsls r2, r3, #4
800b0a2: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b0a6: 4413 add r3, r2
800b0a8: f203 4304 addw r3, r3, #1028 @ 0x404
800b0ac: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
800b0b0: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b0b4: 881b ldrh r3, [r3, #0]
800b0b6: b29b uxth r3, r3
800b0b8: f3c3 0309 ubfx r3, r3, #0, #10
800b0bc: b29a uxth r2, r3
800b0be: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b0c2: 801a strh r2, [r3, #0]
800b0c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b0c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0cc: 681b ldr r3, [r3, #0]
800b0ce: 691b ldr r3, [r3, #16]
800b0d0: 2b3e cmp r3, #62 @ 0x3e
800b0d2: d92b bls.n 800b12c <USB_EPStartXfer+0x1008>
800b0d4: f507 7384 add.w r3, r7, #264 @ 0x108
800b0d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0dc: 681b ldr r3, [r3, #0]
800b0de: 691b ldr r3, [r3, #16]
800b0e0: 095b lsrs r3, r3, #5
800b0e2: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b0e6: f507 7384 add.w r3, r7, #264 @ 0x108
800b0ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0ee: 681b ldr r3, [r3, #0]
800b0f0: 691b ldr r3, [r3, #16]
800b0f2: f003 031f and.w r3, r3, #31
800b0f6: 2b00 cmp r3, #0
800b0f8: d104 bne.n 800b104 <USB_EPStartXfer+0xfe0>
800b0fa: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b0fe: 3b01 subs r3, #1
800b100: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b104: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b108: 881b ldrh r3, [r3, #0]
800b10a: b29a uxth r2, r3
800b10c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b110: b29b uxth r3, r3
800b112: 029b lsls r3, r3, #10
800b114: b29b uxth r3, r3
800b116: 4313 orrs r3, r2
800b118: b29b uxth r3, r3
800b11a: ea6f 4343 mvn.w r3, r3, lsl #17
800b11e: ea6f 4353 mvn.w r3, r3, lsr #17
800b122: b29a uxth r2, r3
800b124: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b128: 801a strh r2, [r3, #0]
800b12a: e070 b.n 800b20e <USB_EPStartXfer+0x10ea>
800b12c: f507 7384 add.w r3, r7, #264 @ 0x108
800b130: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b134: 681b ldr r3, [r3, #0]
800b136: 691b ldr r3, [r3, #16]
800b138: 2b00 cmp r3, #0
800b13a: d10c bne.n 800b156 <USB_EPStartXfer+0x1032>
800b13c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b140: 881b ldrh r3, [r3, #0]
800b142: b29b uxth r3, r3
800b144: ea6f 4343 mvn.w r3, r3, lsl #17
800b148: ea6f 4353 mvn.w r3, r3, lsr #17
800b14c: b29a uxth r2, r3
800b14e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b152: 801a strh r2, [r3, #0]
800b154: e05b b.n 800b20e <USB_EPStartXfer+0x10ea>
800b156: f507 7384 add.w r3, r7, #264 @ 0x108
800b15a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b15e: 681b ldr r3, [r3, #0]
800b160: 691b ldr r3, [r3, #16]
800b162: 085b lsrs r3, r3, #1
800b164: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b168: f507 7384 add.w r3, r7, #264 @ 0x108
800b16c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b170: 681b ldr r3, [r3, #0]
800b172: 691b ldr r3, [r3, #16]
800b174: f003 0301 and.w r3, r3, #1
800b178: 2b00 cmp r3, #0
800b17a: d004 beq.n 800b186 <USB_EPStartXfer+0x1062>
800b17c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b180: 3301 adds r3, #1
800b182: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b186: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b18a: 881b ldrh r3, [r3, #0]
800b18c: b29a uxth r2, r3
800b18e: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b192: b29b uxth r3, r3
800b194: 029b lsls r3, r3, #10
800b196: b29b uxth r3, r3
800b198: 4313 orrs r3, r2
800b19a: b29a uxth r2, r3
800b19c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b1a0: 801a strh r2, [r3, #0]
800b1a2: e034 b.n 800b20e <USB_EPStartXfer+0x10ea>
800b1a4: f507 7384 add.w r3, r7, #264 @ 0x108
800b1a8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1ac: 681b ldr r3, [r3, #0]
800b1ae: 785b ldrb r3, [r3, #1]
800b1b0: 2b01 cmp r3, #1
800b1b2: d12c bne.n 800b20e <USB_EPStartXfer+0x10ea>
800b1b4: f507 7384 add.w r3, r7, #264 @ 0x108
800b1b8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1bc: 681b ldr r3, [r3, #0]
800b1be: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b1c2: f507 7384 add.w r3, r7, #264 @ 0x108
800b1c6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1ca: 681b ldr r3, [r3, #0]
800b1cc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b1d0: b29b uxth r3, r3
800b1d2: 461a mov r2, r3
800b1d4: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b1d8: 4413 add r3, r2
800b1da: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b1de: f507 7384 add.w r3, r7, #264 @ 0x108
800b1e2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1e6: 681b ldr r3, [r3, #0]
800b1e8: 781b ldrb r3, [r3, #0]
800b1ea: 011a lsls r2, r3, #4
800b1ec: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b1f0: 4413 add r3, r2
800b1f2: f203 4304 addw r3, r3, #1028 @ 0x404
800b1f6: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
800b1fa: f507 7384 add.w r3, r7, #264 @ 0x108
800b1fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b202: 681b ldr r3, [r3, #0]
800b204: 691b ldr r3, [r3, #16]
800b206: b29a uxth r2, r3
800b208: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
800b20c: 801a strh r2, [r3, #0]
800b20e: f507 7384 add.w r3, r7, #264 @ 0x108
800b212: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b216: 681b ldr r3, [r3, #0]
800b218: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b21c: f507 7384 add.w r3, r7, #264 @ 0x108
800b220: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b224: 681b ldr r3, [r3, #0]
800b226: 785b ldrb r3, [r3, #1]
800b228: 2b00 cmp r3, #0
800b22a: f040 809d bne.w 800b368 <USB_EPStartXfer+0x1244>
800b22e: f507 7384 add.w r3, r7, #264 @ 0x108
800b232: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b236: 681b ldr r3, [r3, #0]
800b238: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b23c: f507 7384 add.w r3, r7, #264 @ 0x108
800b240: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b244: 681b ldr r3, [r3, #0]
800b246: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b24a: b29b uxth r3, r3
800b24c: 461a mov r2, r3
800b24e: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b252: 4413 add r3, r2
800b254: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b258: f507 7384 add.w r3, r7, #264 @ 0x108
800b25c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b260: 681b ldr r3, [r3, #0]
800b262: 781b ldrb r3, [r3, #0]
800b264: 011a lsls r2, r3, #4
800b266: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b26a: 4413 add r3, r2
800b26c: f203 430c addw r3, r3, #1036 @ 0x40c
800b270: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800b274: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b278: 881b ldrh r3, [r3, #0]
800b27a: b29b uxth r3, r3
800b27c: f3c3 0309 ubfx r3, r3, #0, #10
800b280: b29a uxth r2, r3
800b282: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b286: 801a strh r2, [r3, #0]
800b288: f507 7384 add.w r3, r7, #264 @ 0x108
800b28c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b290: 681b ldr r3, [r3, #0]
800b292: 691b ldr r3, [r3, #16]
800b294: 2b3e cmp r3, #62 @ 0x3e
800b296: d92b bls.n 800b2f0 <USB_EPStartXfer+0x11cc>
800b298: f507 7384 add.w r3, r7, #264 @ 0x108
800b29c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2a0: 681b ldr r3, [r3, #0]
800b2a2: 691b ldr r3, [r3, #16]
800b2a4: 095b lsrs r3, r3, #5
800b2a6: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b2aa: f507 7384 add.w r3, r7, #264 @ 0x108
800b2ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2b2: 681b ldr r3, [r3, #0]
800b2b4: 691b ldr r3, [r3, #16]
800b2b6: f003 031f and.w r3, r3, #31
800b2ba: 2b00 cmp r3, #0
800b2bc: d104 bne.n 800b2c8 <USB_EPStartXfer+0x11a4>
800b2be: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b2c2: 3b01 subs r3, #1
800b2c4: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b2c8: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b2cc: 881b ldrh r3, [r3, #0]
800b2ce: b29a uxth r2, r3
800b2d0: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b2d4: b29b uxth r3, r3
800b2d6: 029b lsls r3, r3, #10
800b2d8: b29b uxth r3, r3
800b2da: 4313 orrs r3, r2
800b2dc: b29b uxth r3, r3
800b2de: ea6f 4343 mvn.w r3, r3, lsl #17
800b2e2: ea6f 4353 mvn.w r3, r3, lsr #17
800b2e6: b29a uxth r2, r3
800b2e8: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b2ec: 801a strh r2, [r3, #0]
800b2ee: e069 b.n 800b3c4 <USB_EPStartXfer+0x12a0>
800b2f0: f507 7384 add.w r3, r7, #264 @ 0x108
800b2f4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2f8: 681b ldr r3, [r3, #0]
800b2fa: 691b ldr r3, [r3, #16]
800b2fc: 2b00 cmp r3, #0
800b2fe: d10c bne.n 800b31a <USB_EPStartXfer+0x11f6>
800b300: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b304: 881b ldrh r3, [r3, #0]
800b306: b29b uxth r3, r3
800b308: ea6f 4343 mvn.w r3, r3, lsl #17
800b30c: ea6f 4353 mvn.w r3, r3, lsr #17
800b310: b29a uxth r2, r3
800b312: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b316: 801a strh r2, [r3, #0]
800b318: e054 b.n 800b3c4 <USB_EPStartXfer+0x12a0>
800b31a: f507 7384 add.w r3, r7, #264 @ 0x108
800b31e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b322: 681b ldr r3, [r3, #0]
800b324: 691b ldr r3, [r3, #16]
800b326: 085b lsrs r3, r3, #1
800b328: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b32c: f507 7384 add.w r3, r7, #264 @ 0x108
800b330: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b334: 681b ldr r3, [r3, #0]
800b336: 691b ldr r3, [r3, #16]
800b338: f003 0301 and.w r3, r3, #1
800b33c: 2b00 cmp r3, #0
800b33e: d004 beq.n 800b34a <USB_EPStartXfer+0x1226>
800b340: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b344: 3301 adds r3, #1
800b346: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b34a: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b34e: 881b ldrh r3, [r3, #0]
800b350: b29a uxth r2, r3
800b352: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b356: b29b uxth r3, r3
800b358: 029b lsls r3, r3, #10
800b35a: b29b uxth r3, r3
800b35c: 4313 orrs r3, r2
800b35e: b29a uxth r2, r3
800b360: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b364: 801a strh r2, [r3, #0]
800b366: e02d b.n 800b3c4 <USB_EPStartXfer+0x12a0>
800b368: f507 7384 add.w r3, r7, #264 @ 0x108
800b36c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b370: 681b ldr r3, [r3, #0]
800b372: 785b ldrb r3, [r3, #1]
800b374: 2b01 cmp r3, #1
800b376: d125 bne.n 800b3c4 <USB_EPStartXfer+0x12a0>
800b378: f507 7384 add.w r3, r7, #264 @ 0x108
800b37c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b380: 681b ldr r3, [r3, #0]
800b382: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b386: b29b uxth r3, r3
800b388: 461a mov r2, r3
800b38a: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800b38e: 4413 add r3, r2
800b390: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b394: f507 7384 add.w r3, r7, #264 @ 0x108
800b398: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b39c: 681b ldr r3, [r3, #0]
800b39e: 781b ldrb r3, [r3, #0]
800b3a0: 011a lsls r2, r3, #4
800b3a2: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800b3a6: 4413 add r3, r2
800b3a8: f203 430c addw r3, r3, #1036 @ 0x40c
800b3ac: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
800b3b0: f507 7384 add.w r3, r7, #264 @ 0x108
800b3b4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3b8: 681b ldr r3, [r3, #0]
800b3ba: 691b ldr r3, [r3, #16]
800b3bc: b29a uxth r2, r3
800b3be: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800b3c2: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
800b3c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b3c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3cc: 681b ldr r3, [r3, #0]
800b3ce: 69db ldr r3, [r3, #28]
800b3d0: 2b00 cmp r3, #0
800b3d2: f000 8218 beq.w 800b806 <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
800b3d6: f507 7384 add.w r3, r7, #264 @ 0x108
800b3da: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b3de: 681a ldr r2, [r3, #0]
800b3e0: f507 7384 add.w r3, r7, #264 @ 0x108
800b3e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3e8: 681b ldr r3, [r3, #0]
800b3ea: 781b ldrb r3, [r3, #0]
800b3ec: 009b lsls r3, r3, #2
800b3ee: 4413 add r3, r2
800b3f0: 881b ldrh r3, [r3, #0]
800b3f2: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800b3f6: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b3fa: f403 4380 and.w r3, r3, #16384 @ 0x4000
800b3fe: 2b00 cmp r3, #0
800b400: d005 beq.n 800b40e <USB_EPStartXfer+0x12ea>
800b402: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b406: f003 0340 and.w r3, r3, #64 @ 0x40
800b40a: 2b00 cmp r3, #0
800b40c: d10d bne.n 800b42a <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800b40e: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b412: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800b416: 2b00 cmp r3, #0
800b418: f040 81f5 bne.w 800b806 <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800b41c: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b420: f003 0340 and.w r3, r3, #64 @ 0x40
800b424: 2b00 cmp r3, #0
800b426: f040 81ee bne.w 800b806 <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
800b42a: f507 7384 add.w r3, r7, #264 @ 0x108
800b42e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b432: 681a ldr r2, [r3, #0]
800b434: f507 7384 add.w r3, r7, #264 @ 0x108
800b438: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b43c: 681b ldr r3, [r3, #0]
800b43e: 781b ldrb r3, [r3, #0]
800b440: 009b lsls r3, r3, #2
800b442: 4413 add r3, r2
800b444: 881b ldrh r3, [r3, #0]
800b446: b29b uxth r3, r3
800b448: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b44c: f023 0370 bic.w r3, r3, #112 @ 0x70
800b450: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
800b454: f507 7384 add.w r3, r7, #264 @ 0x108
800b458: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b45c: 681a ldr r2, [r3, #0]
800b45e: f507 7384 add.w r3, r7, #264 @ 0x108
800b462: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b466: 681b ldr r3, [r3, #0]
800b468: 781b ldrb r3, [r3, #0]
800b46a: 009b lsls r3, r3, #2
800b46c: 441a add r2, r3
800b46e: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
800b472: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b476: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b47a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b47e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800b482: b29b uxth r3, r3
800b484: 8013 strh r3, [r2, #0]
800b486: e1be b.n 800b806 <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800b488: f507 7384 add.w r3, r7, #264 @ 0x108
800b48c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b490: 681b ldr r3, [r3, #0]
800b492: 78db ldrb r3, [r3, #3]
800b494: 2b01 cmp r3, #1
800b496: f040 81b4 bne.w 800b802 <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800b49a: f507 7384 add.w r3, r7, #264 @ 0x108
800b49e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4a2: 681b ldr r3, [r3, #0]
800b4a4: 699a ldr r2, [r3, #24]
800b4a6: f507 7384 add.w r3, r7, #264 @ 0x108
800b4aa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4ae: 681b ldr r3, [r3, #0]
800b4b0: 691b ldr r3, [r3, #16]
800b4b2: 429a cmp r2, r3
800b4b4: d917 bls.n 800b4e6 <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
800b4b6: f507 7384 add.w r3, r7, #264 @ 0x108
800b4ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4be: 681b ldr r3, [r3, #0]
800b4c0: 691b ldr r3, [r3, #16]
800b4c2: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800b4c6: f507 7384 add.w r3, r7, #264 @ 0x108
800b4ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4ce: 681b ldr r3, [r3, #0]
800b4d0: 699a ldr r2, [r3, #24]
800b4d2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b4d6: 1ad2 subs r2, r2, r3
800b4d8: f507 7384 add.w r3, r7, #264 @ 0x108
800b4dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4e0: 681b ldr r3, [r3, #0]
800b4e2: 619a str r2, [r3, #24]
800b4e4: e00e b.n 800b504 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
800b4e6: f507 7384 add.w r3, r7, #264 @ 0x108
800b4ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4ee: 681b ldr r3, [r3, #0]
800b4f0: 699b ldr r3, [r3, #24]
800b4f2: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800b4f6: f507 7384 add.w r3, r7, #264 @ 0x108
800b4fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4fe: 681b ldr r3, [r3, #0]
800b500: 2200 movs r2, #0
800b502: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
800b504: f507 7384 add.w r3, r7, #264 @ 0x108
800b508: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b50c: 681b ldr r3, [r3, #0]
800b50e: 785b ldrb r3, [r3, #1]
800b510: 2b00 cmp r3, #0
800b512: f040 8085 bne.w 800b620 <USB_EPStartXfer+0x14fc>
800b516: f507 7384 add.w r3, r7, #264 @ 0x108
800b51a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b51e: 681b ldr r3, [r3, #0]
800b520: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800b524: f507 7384 add.w r3, r7, #264 @ 0x108
800b528: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b52c: 681b ldr r3, [r3, #0]
800b52e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b532: b29b uxth r3, r3
800b534: 461a mov r2, r3
800b536: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800b53a: 4413 add r3, r2
800b53c: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800b540: f507 7384 add.w r3, r7, #264 @ 0x108
800b544: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b548: 681b ldr r3, [r3, #0]
800b54a: 781b ldrb r3, [r3, #0]
800b54c: 011a lsls r2, r3, #4
800b54e: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800b552: 4413 add r3, r2
800b554: f203 4304 addw r3, r3, #1028 @ 0x404
800b558: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
800b55c: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b560: 881b ldrh r3, [r3, #0]
800b562: b29b uxth r3, r3
800b564: f3c3 0309 ubfx r3, r3, #0, #10
800b568: b29a uxth r2, r3
800b56a: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b56e: 801a strh r2, [r3, #0]
800b570: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b574: 2b3e cmp r3, #62 @ 0x3e
800b576: d923 bls.n 800b5c0 <USB_EPStartXfer+0x149c>
800b578: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b57c: 095b lsrs r3, r3, #5
800b57e: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b582: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b586: f003 031f and.w r3, r3, #31
800b58a: 2b00 cmp r3, #0
800b58c: d104 bne.n 800b598 <USB_EPStartXfer+0x1474>
800b58e: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b592: 3b01 subs r3, #1
800b594: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b598: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b59c: 881b ldrh r3, [r3, #0]
800b59e: b29a uxth r2, r3
800b5a0: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b5a4: b29b uxth r3, r3
800b5a6: 029b lsls r3, r3, #10
800b5a8: b29b uxth r3, r3
800b5aa: 4313 orrs r3, r2
800b5ac: b29b uxth r3, r3
800b5ae: ea6f 4343 mvn.w r3, r3, lsl #17
800b5b2: ea6f 4353 mvn.w r3, r3, lsr #17
800b5b6: b29a uxth r2, r3
800b5b8: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b5bc: 801a strh r2, [r3, #0]
800b5be: e060 b.n 800b682 <USB_EPStartXfer+0x155e>
800b5c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5c4: 2b00 cmp r3, #0
800b5c6: d10c bne.n 800b5e2 <USB_EPStartXfer+0x14be>
800b5c8: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b5cc: 881b ldrh r3, [r3, #0]
800b5ce: b29b uxth r3, r3
800b5d0: ea6f 4343 mvn.w r3, r3, lsl #17
800b5d4: ea6f 4353 mvn.w r3, r3, lsr #17
800b5d8: b29a uxth r2, r3
800b5da: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b5de: 801a strh r2, [r3, #0]
800b5e0: e04f b.n 800b682 <USB_EPStartXfer+0x155e>
800b5e2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5e6: 085b lsrs r3, r3, #1
800b5e8: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b5ec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5f0: f003 0301 and.w r3, r3, #1
800b5f4: 2b00 cmp r3, #0
800b5f6: d004 beq.n 800b602 <USB_EPStartXfer+0x14de>
800b5f8: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b5fc: 3301 adds r3, #1
800b5fe: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b602: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b606: 881b ldrh r3, [r3, #0]
800b608: b29a uxth r2, r3
800b60a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b60e: b29b uxth r3, r3
800b610: 029b lsls r3, r3, #10
800b612: b29b uxth r3, r3
800b614: 4313 orrs r3, r2
800b616: b29a uxth r2, r3
800b618: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b61c: 801a strh r2, [r3, #0]
800b61e: e030 b.n 800b682 <USB_EPStartXfer+0x155e>
800b620: f507 7384 add.w r3, r7, #264 @ 0x108
800b624: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b628: 681b ldr r3, [r3, #0]
800b62a: 785b ldrb r3, [r3, #1]
800b62c: 2b01 cmp r3, #1
800b62e: d128 bne.n 800b682 <USB_EPStartXfer+0x155e>
800b630: f507 7384 add.w r3, r7, #264 @ 0x108
800b634: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b638: 681b ldr r3, [r3, #0]
800b63a: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800b63e: f507 7384 add.w r3, r7, #264 @ 0x108
800b642: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b646: 681b ldr r3, [r3, #0]
800b648: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b64c: b29b uxth r3, r3
800b64e: 461a mov r2, r3
800b650: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800b654: 4413 add r3, r2
800b656: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800b65a: f507 7384 add.w r3, r7, #264 @ 0x108
800b65e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b662: 681b ldr r3, [r3, #0]
800b664: 781b ldrb r3, [r3, #0]
800b666: 011a lsls r2, r3, #4
800b668: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800b66c: 4413 add r3, r2
800b66e: f203 4304 addw r3, r3, #1028 @ 0x404
800b672: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800b676: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b67a: b29a uxth r2, r3
800b67c: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
800b680: 801a strh r2, [r3, #0]
800b682: f507 7384 add.w r3, r7, #264 @ 0x108
800b686: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b68a: 681b ldr r3, [r3, #0]
800b68c: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800b690: f507 7384 add.w r3, r7, #264 @ 0x108
800b694: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b698: 681b ldr r3, [r3, #0]
800b69a: 785b ldrb r3, [r3, #1]
800b69c: 2b00 cmp r3, #0
800b69e: f040 8085 bne.w 800b7ac <USB_EPStartXfer+0x1688>
800b6a2: f507 7384 add.w r3, r7, #264 @ 0x108
800b6a6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b6aa: 681b ldr r3, [r3, #0]
800b6ac: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800b6b0: f507 7384 add.w r3, r7, #264 @ 0x108
800b6b4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b6b8: 681b ldr r3, [r3, #0]
800b6ba: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b6be: b29b uxth r3, r3
800b6c0: 461a mov r2, r3
800b6c2: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800b6c6: 4413 add r3, r2
800b6c8: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800b6cc: f507 7384 add.w r3, r7, #264 @ 0x108
800b6d0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6d4: 681b ldr r3, [r3, #0]
800b6d6: 781b ldrb r3, [r3, #0]
800b6d8: 011a lsls r2, r3, #4
800b6da: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800b6de: 4413 add r3, r2
800b6e0: f203 430c addw r3, r3, #1036 @ 0x40c
800b6e4: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
800b6e8: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b6ec: 881b ldrh r3, [r3, #0]
800b6ee: b29b uxth r3, r3
800b6f0: f3c3 0309 ubfx r3, r3, #0, #10
800b6f4: b29a uxth r2, r3
800b6f6: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b6fa: 801a strh r2, [r3, #0]
800b6fc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b700: 2b3e cmp r3, #62 @ 0x3e
800b702: d923 bls.n 800b74c <USB_EPStartXfer+0x1628>
800b704: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b708: 095b lsrs r3, r3, #5
800b70a: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b70e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b712: f003 031f and.w r3, r3, #31
800b716: 2b00 cmp r3, #0
800b718: d104 bne.n 800b724 <USB_EPStartXfer+0x1600>
800b71a: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b71e: 3b01 subs r3, #1
800b720: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b724: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b728: 881b ldrh r3, [r3, #0]
800b72a: b29a uxth r2, r3
800b72c: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b730: b29b uxth r3, r3
800b732: 029b lsls r3, r3, #10
800b734: b29b uxth r3, r3
800b736: 4313 orrs r3, r2
800b738: b29b uxth r3, r3
800b73a: ea6f 4343 mvn.w r3, r3, lsl #17
800b73e: ea6f 4353 mvn.w r3, r3, lsr #17
800b742: b29a uxth r2, r3
800b744: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b748: 801a strh r2, [r3, #0]
800b74a: e05c b.n 800b806 <USB_EPStartXfer+0x16e2>
800b74c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b750: 2b00 cmp r3, #0
800b752: d10c bne.n 800b76e <USB_EPStartXfer+0x164a>
800b754: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b758: 881b ldrh r3, [r3, #0]
800b75a: b29b uxth r3, r3
800b75c: ea6f 4343 mvn.w r3, r3, lsl #17
800b760: ea6f 4353 mvn.w r3, r3, lsr #17
800b764: b29a uxth r2, r3
800b766: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b76a: 801a strh r2, [r3, #0]
800b76c: e04b b.n 800b806 <USB_EPStartXfer+0x16e2>
800b76e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b772: 085b lsrs r3, r3, #1
800b774: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b778: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b77c: f003 0301 and.w r3, r3, #1
800b780: 2b00 cmp r3, #0
800b782: d004 beq.n 800b78e <USB_EPStartXfer+0x166a>
800b784: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b788: 3301 adds r3, #1
800b78a: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b78e: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b792: 881b ldrh r3, [r3, #0]
800b794: b29a uxth r2, r3
800b796: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b79a: b29b uxth r3, r3
800b79c: 029b lsls r3, r3, #10
800b79e: b29b uxth r3, r3
800b7a0: 4313 orrs r3, r2
800b7a2: b29a uxth r2, r3
800b7a4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b7a8: 801a strh r2, [r3, #0]
800b7aa: e02c b.n 800b806 <USB_EPStartXfer+0x16e2>
800b7ac: f507 7384 add.w r3, r7, #264 @ 0x108
800b7b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7b4: 681b ldr r3, [r3, #0]
800b7b6: 785b ldrb r3, [r3, #1]
800b7b8: 2b01 cmp r3, #1
800b7ba: d124 bne.n 800b806 <USB_EPStartXfer+0x16e2>
800b7bc: f507 7384 add.w r3, r7, #264 @ 0x108
800b7c0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b7c4: 681b ldr r3, [r3, #0]
800b7c6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b7ca: b29b uxth r3, r3
800b7cc: 461a mov r2, r3
800b7ce: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800b7d2: 4413 add r3, r2
800b7d4: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800b7d8: f507 7384 add.w r3, r7, #264 @ 0x108
800b7dc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7e0: 681b ldr r3, [r3, #0]
800b7e2: 781b ldrb r3, [r3, #0]
800b7e4: 011a lsls r2, r3, #4
800b7e6: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800b7ea: 4413 add r3, r2
800b7ec: f203 430c addw r3, r3, #1036 @ 0x40c
800b7f0: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800b7f4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b7f8: b29a uxth r2, r3
800b7fa: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800b7fe: 801a strh r2, [r3, #0]
800b800: e001 b.n 800b806 <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
800b802: 2301 movs r3, #1
800b804: e03a b.n 800b87c <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800b806: f507 7384 add.w r3, r7, #264 @ 0x108
800b80a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b80e: 681a ldr r2, [r3, #0]
800b810: f507 7384 add.w r3, r7, #264 @ 0x108
800b814: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b818: 681b ldr r3, [r3, #0]
800b81a: 781b ldrb r3, [r3, #0]
800b81c: 009b lsls r3, r3, #2
800b81e: 4413 add r3, r2
800b820: 881b ldrh r3, [r3, #0]
800b822: b29b uxth r3, r3
800b824: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800b828: f023 0370 bic.w r3, r3, #112 @ 0x70
800b82c: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800b830: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800b834: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800b838: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800b83c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800b840: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800b844: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800b848: f507 7384 add.w r3, r7, #264 @ 0x108
800b84c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b850: 681a ldr r2, [r3, #0]
800b852: f507 7384 add.w r3, r7, #264 @ 0x108
800b856: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b85a: 681b ldr r3, [r3, #0]
800b85c: 781b ldrb r3, [r3, #0]
800b85e: 009b lsls r3, r3, #2
800b860: 441a add r2, r3
800b862: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800b866: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b86a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b86e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b872: f043 0380 orr.w r3, r3, #128 @ 0x80
800b876: b29b uxth r3, r3
800b878: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800b87a: 2300 movs r3, #0
}
800b87c: 4618 mov r0, r3
800b87e: f507 7784 add.w r7, r7, #264 @ 0x108
800b882: 46bd mov sp, r7
800b884: bd80 pop {r7, pc}
0800b886 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800b886: b480 push {r7}
800b888: b085 sub sp, #20
800b88a: af00 add r7, sp, #0
800b88c: 6078 str r0, [r7, #4]
800b88e: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
800b890: 683b ldr r3, [r7, #0]
800b892: 785b ldrb r3, [r3, #1]
800b894: 2b00 cmp r3, #0
800b896: d020 beq.n 800b8da <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
800b898: 687a ldr r2, [r7, #4]
800b89a: 683b ldr r3, [r7, #0]
800b89c: 781b ldrb r3, [r3, #0]
800b89e: 009b lsls r3, r3, #2
800b8a0: 4413 add r3, r2
800b8a2: 881b ldrh r3, [r3, #0]
800b8a4: b29b uxth r3, r3
800b8a6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b8aa: f023 0340 bic.w r3, r3, #64 @ 0x40
800b8ae: 81bb strh r3, [r7, #12]
800b8b0: 89bb ldrh r3, [r7, #12]
800b8b2: f083 0310 eor.w r3, r3, #16
800b8b6: 81bb strh r3, [r7, #12]
800b8b8: 687a ldr r2, [r7, #4]
800b8ba: 683b ldr r3, [r7, #0]
800b8bc: 781b ldrb r3, [r3, #0]
800b8be: 009b lsls r3, r3, #2
800b8c0: 441a add r2, r3
800b8c2: 89bb ldrh r3, [r7, #12]
800b8c4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b8c8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b8cc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b8d0: f043 0380 orr.w r3, r3, #128 @ 0x80
800b8d4: b29b uxth r3, r3
800b8d6: 8013 strh r3, [r2, #0]
800b8d8: e01f b.n 800b91a <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800b8da: 687a ldr r2, [r7, #4]
800b8dc: 683b ldr r3, [r7, #0]
800b8de: 781b ldrb r3, [r3, #0]
800b8e0: 009b lsls r3, r3, #2
800b8e2: 4413 add r3, r2
800b8e4: 881b ldrh r3, [r3, #0]
800b8e6: b29b uxth r3, r3
800b8e8: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800b8ec: f023 0370 bic.w r3, r3, #112 @ 0x70
800b8f0: 81fb strh r3, [r7, #14]
800b8f2: 89fb ldrh r3, [r7, #14]
800b8f4: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800b8f8: 81fb strh r3, [r7, #14]
800b8fa: 687a ldr r2, [r7, #4]
800b8fc: 683b ldr r3, [r7, #0]
800b8fe: 781b ldrb r3, [r3, #0]
800b900: 009b lsls r3, r3, #2
800b902: 441a add r2, r3
800b904: 89fb ldrh r3, [r7, #14]
800b906: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b90a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b90e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b912: f043 0380 orr.w r3, r3, #128 @ 0x80
800b916: b29b uxth r3, r3
800b918: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800b91a: 2300 movs r3, #0
}
800b91c: 4618 mov r0, r3
800b91e: 3714 adds r7, #20
800b920: 46bd mov sp, r7
800b922: bc80 pop {r7}
800b924: 4770 bx lr
0800b926 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800b926: b480 push {r7}
800b928: b087 sub sp, #28
800b92a: af00 add r7, sp, #0
800b92c: 6078 str r0, [r7, #4]
800b92e: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800b930: 683b ldr r3, [r7, #0]
800b932: 7b1b ldrb r3, [r3, #12]
800b934: 2b00 cmp r3, #0
800b936: f040 809d bne.w 800ba74 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800b93a: 683b ldr r3, [r7, #0]
800b93c: 785b ldrb r3, [r3, #1]
800b93e: 2b00 cmp r3, #0
800b940: d04c beq.n 800b9dc <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800b942: 687a ldr r2, [r7, #4]
800b944: 683b ldr r3, [r7, #0]
800b946: 781b ldrb r3, [r3, #0]
800b948: 009b lsls r3, r3, #2
800b94a: 4413 add r3, r2
800b94c: 881b ldrh r3, [r3, #0]
800b94e: 823b strh r3, [r7, #16]
800b950: 8a3b ldrh r3, [r7, #16]
800b952: f003 0340 and.w r3, r3, #64 @ 0x40
800b956: 2b00 cmp r3, #0
800b958: d01b beq.n 800b992 <USB_EPClearStall+0x6c>
800b95a: 687a ldr r2, [r7, #4]
800b95c: 683b ldr r3, [r7, #0]
800b95e: 781b ldrb r3, [r3, #0]
800b960: 009b lsls r3, r3, #2
800b962: 4413 add r3, r2
800b964: 881b ldrh r3, [r3, #0]
800b966: b29b uxth r3, r3
800b968: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b96c: f023 0370 bic.w r3, r3, #112 @ 0x70
800b970: 81fb strh r3, [r7, #14]
800b972: 687a ldr r2, [r7, #4]
800b974: 683b ldr r3, [r7, #0]
800b976: 781b ldrb r3, [r3, #0]
800b978: 009b lsls r3, r3, #2
800b97a: 441a add r2, r3
800b97c: 89fb ldrh r3, [r7, #14]
800b97e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b982: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b986: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b98a: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800b98e: b29b uxth r3, r3
800b990: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800b992: 683b ldr r3, [r7, #0]
800b994: 78db ldrb r3, [r3, #3]
800b996: 2b01 cmp r3, #1
800b998: d06c beq.n 800ba74 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800b99a: 687a ldr r2, [r7, #4]
800b99c: 683b ldr r3, [r7, #0]
800b99e: 781b ldrb r3, [r3, #0]
800b9a0: 009b lsls r3, r3, #2
800b9a2: 4413 add r3, r2
800b9a4: 881b ldrh r3, [r3, #0]
800b9a6: b29b uxth r3, r3
800b9a8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b9ac: f023 0340 bic.w r3, r3, #64 @ 0x40
800b9b0: 81bb strh r3, [r7, #12]
800b9b2: 89bb ldrh r3, [r7, #12]
800b9b4: f083 0320 eor.w r3, r3, #32
800b9b8: 81bb strh r3, [r7, #12]
800b9ba: 687a ldr r2, [r7, #4]
800b9bc: 683b ldr r3, [r7, #0]
800b9be: 781b ldrb r3, [r3, #0]
800b9c0: 009b lsls r3, r3, #2
800b9c2: 441a add r2, r3
800b9c4: 89bb ldrh r3, [r7, #12]
800b9c6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b9ca: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b9ce: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b9d2: f043 0380 orr.w r3, r3, #128 @ 0x80
800b9d6: b29b uxth r3, r3
800b9d8: 8013 strh r3, [r2, #0]
800b9da: e04b b.n 800ba74 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800b9dc: 687a ldr r2, [r7, #4]
800b9de: 683b ldr r3, [r7, #0]
800b9e0: 781b ldrb r3, [r3, #0]
800b9e2: 009b lsls r3, r3, #2
800b9e4: 4413 add r3, r2
800b9e6: 881b ldrh r3, [r3, #0]
800b9e8: 82fb strh r3, [r7, #22]
800b9ea: 8afb ldrh r3, [r7, #22]
800b9ec: f403 4380 and.w r3, r3, #16384 @ 0x4000
800b9f0: 2b00 cmp r3, #0
800b9f2: d01b beq.n 800ba2c <USB_EPClearStall+0x106>
800b9f4: 687a ldr r2, [r7, #4]
800b9f6: 683b ldr r3, [r7, #0]
800b9f8: 781b ldrb r3, [r3, #0]
800b9fa: 009b lsls r3, r3, #2
800b9fc: 4413 add r3, r2
800b9fe: 881b ldrh r3, [r3, #0]
800ba00: b29b uxth r3, r3
800ba02: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800ba06: f023 0370 bic.w r3, r3, #112 @ 0x70
800ba0a: 82bb strh r3, [r7, #20]
800ba0c: 687a ldr r2, [r7, #4]
800ba0e: 683b ldr r3, [r7, #0]
800ba10: 781b ldrb r3, [r3, #0]
800ba12: 009b lsls r3, r3, #2
800ba14: 441a add r2, r3
800ba16: 8abb ldrh r3, [r7, #20]
800ba18: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800ba1c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800ba20: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800ba24: f043 0380 orr.w r3, r3, #128 @ 0x80
800ba28: b29b uxth r3, r3
800ba2a: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800ba2c: 687a ldr r2, [r7, #4]
800ba2e: 683b ldr r3, [r7, #0]
800ba30: 781b ldrb r3, [r3, #0]
800ba32: 009b lsls r3, r3, #2
800ba34: 4413 add r3, r2
800ba36: 881b ldrh r3, [r3, #0]
800ba38: b29b uxth r3, r3
800ba3a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800ba3e: f023 0370 bic.w r3, r3, #112 @ 0x70
800ba42: 827b strh r3, [r7, #18]
800ba44: 8a7b ldrh r3, [r7, #18]
800ba46: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800ba4a: 827b strh r3, [r7, #18]
800ba4c: 8a7b ldrh r3, [r7, #18]
800ba4e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800ba52: 827b strh r3, [r7, #18]
800ba54: 687a ldr r2, [r7, #4]
800ba56: 683b ldr r3, [r7, #0]
800ba58: 781b ldrb r3, [r3, #0]
800ba5a: 009b lsls r3, r3, #2
800ba5c: 441a add r2, r3
800ba5e: 8a7b ldrh r3, [r7, #18]
800ba60: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800ba64: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800ba68: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800ba6c: f043 0380 orr.w r3, r3, #128 @ 0x80
800ba70: b29b uxth r3, r3
800ba72: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800ba74: 2300 movs r3, #0
}
800ba76: 4618 mov r0, r3
800ba78: 371c adds r7, #28
800ba7a: 46bd mov sp, r7
800ba7c: bc80 pop {r7}
800ba7e: 4770 bx lr
0800ba80 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
800ba80: b480 push {r7}
800ba82: b083 sub sp, #12
800ba84: af00 add r7, sp, #0
800ba86: 6078 str r0, [r7, #4]
800ba88: 460b mov r3, r1
800ba8a: 70fb strb r3, [r7, #3]
if (address == 0U)
800ba8c: 78fb ldrb r3, [r7, #3]
800ba8e: 2b00 cmp r3, #0
800ba90: d103 bne.n 800ba9a <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800ba92: 687b ldr r3, [r7, #4]
800ba94: 2280 movs r2, #128 @ 0x80
800ba96: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
800ba9a: 2300 movs r3, #0
}
800ba9c: 4618 mov r0, r3
800ba9e: 370c adds r7, #12
800baa0: 46bd mov sp, r7
800baa2: bc80 pop {r7}
800baa4: 4770 bx lr
0800baa6 <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
800baa6: b480 push {r7}
800baa8: b083 sub sp, #12
800baaa: af00 add r7, sp, #0
800baac: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800baae: 2300 movs r3, #0
}
800bab0: 4618 mov r0, r3
800bab2: 370c adds r7, #12
800bab4: 46bd mov sp, r7
800bab6: bc80 pop {r7}
800bab8: 4770 bx lr
0800baba <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800baba: b480 push {r7}
800babc: b083 sub sp, #12
800babe: af00 add r7, sp, #0
800bac0: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800bac2: 2300 movs r3, #0
}
800bac4: 4618 mov r0, r3
800bac6: 370c adds r7, #12
800bac8: 46bd mov sp, r7
800baca: bc80 pop {r7}
800bacc: 4770 bx lr
0800bace <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
800bace: b480 push {r7}
800bad0: b085 sub sp, #20
800bad2: af00 add r7, sp, #0
800bad4: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
800bad6: 687b ldr r3, [r7, #4]
800bad8: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800badc: b29b uxth r3, r3
800bade: 60fb str r3, [r7, #12]
return tmpreg;
800bae0: 68fb ldr r3, [r7, #12]
}
800bae2: 4618 mov r0, r3
800bae4: 3714 adds r7, #20
800bae6: 46bd mov sp, r7
800bae8: bc80 pop {r7}
800baea: 4770 bx lr
0800baec <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
800baec: b480 push {r7}
800baee: b083 sub sp, #12
800baf0: af00 add r7, sp, #0
800baf2: 6078 str r0, [r7, #4]
800baf4: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800baf6: 2300 movs r3, #0
}
800baf8: 4618 mov r0, r3
800bafa: 370c adds r7, #12
800bafc: 46bd mov sp, r7
800bafe: bc80 pop {r7}
800bb00: 4770 bx lr
0800bb02 <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800bb02: b480 push {r7}
800bb04: b08b sub sp, #44 @ 0x2c
800bb06: af00 add r7, sp, #0
800bb08: 60f8 str r0, [r7, #12]
800bb0a: 60b9 str r1, [r7, #8]
800bb0c: 4611 mov r1, r2
800bb0e: 461a mov r2, r3
800bb10: 460b mov r3, r1
800bb12: 80fb strh r3, [r7, #6]
800bb14: 4613 mov r3, r2
800bb16: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
800bb18: 88bb ldrh r3, [r7, #4]
800bb1a: 3301 adds r3, #1
800bb1c: 085b lsrs r3, r3, #1
800bb1e: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800bb20: 68fb ldr r3, [r7, #12]
800bb22: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800bb24: 68bb ldr r3, [r7, #8]
800bb26: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800bb28: 88fb ldrh r3, [r7, #6]
800bb2a: 005a lsls r2, r3, #1
800bb2c: 697b ldr r3, [r7, #20]
800bb2e: 4413 add r3, r2
800bb30: f503 6380 add.w r3, r3, #1024 @ 0x400
800bb34: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800bb36: 69bb ldr r3, [r7, #24]
800bb38: 627b str r3, [r7, #36] @ 0x24
800bb3a: e01f b.n 800bb7c <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
800bb3c: 69fb ldr r3, [r7, #28]
800bb3e: 781b ldrb r3, [r3, #0]
800bb40: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
800bb42: 69fb ldr r3, [r7, #28]
800bb44: 3301 adds r3, #1
800bb46: 781b ldrb r3, [r3, #0]
800bb48: b21b sxth r3, r3
800bb4a: 021b lsls r3, r3, #8
800bb4c: b21a sxth r2, r3
800bb4e: f9b7 3012 ldrsh.w r3, [r7, #18]
800bb52: 4313 orrs r3, r2
800bb54: b21b sxth r3, r3
800bb56: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
800bb58: 6a3b ldr r3, [r7, #32]
800bb5a: 8a7a ldrh r2, [r7, #18]
800bb5c: 801a strh r2, [r3, #0]
pdwVal++;
800bb5e: 6a3b ldr r3, [r7, #32]
800bb60: 3302 adds r3, #2
800bb62: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
800bb64: 6a3b ldr r3, [r7, #32]
800bb66: 3302 adds r3, #2
800bb68: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
800bb6a: 69fb ldr r3, [r7, #28]
800bb6c: 3301 adds r3, #1
800bb6e: 61fb str r3, [r7, #28]
pBuf++;
800bb70: 69fb ldr r3, [r7, #28]
800bb72: 3301 adds r3, #1
800bb74: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
800bb76: 6a7b ldr r3, [r7, #36] @ 0x24
800bb78: 3b01 subs r3, #1
800bb7a: 627b str r3, [r7, #36] @ 0x24
800bb7c: 6a7b ldr r3, [r7, #36] @ 0x24
800bb7e: 2b00 cmp r3, #0
800bb80: d1dc bne.n 800bb3c <USB_WritePMA+0x3a>
}
}
800bb82: bf00 nop
800bb84: bf00 nop
800bb86: 372c adds r7, #44 @ 0x2c
800bb88: 46bd mov sp, r7
800bb8a: bc80 pop {r7}
800bb8c: 4770 bx lr
0800bb8e <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800bb8e: b480 push {r7}
800bb90: b08b sub sp, #44 @ 0x2c
800bb92: af00 add r7, sp, #0
800bb94: 60f8 str r0, [r7, #12]
800bb96: 60b9 str r1, [r7, #8]
800bb98: 4611 mov r1, r2
800bb9a: 461a mov r2, r3
800bb9c: 460b mov r3, r1
800bb9e: 80fb strh r3, [r7, #6]
800bba0: 4613 mov r3, r2
800bba2: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
800bba4: 88bb ldrh r3, [r7, #4]
800bba6: 085b lsrs r3, r3, #1
800bba8: b29b uxth r3, r3
800bbaa: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800bbac: 68fb ldr r3, [r7, #12]
800bbae: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800bbb0: 68bb ldr r3, [r7, #8]
800bbb2: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800bbb4: 88fb ldrh r3, [r7, #6]
800bbb6: 005a lsls r2, r3, #1
800bbb8: 697b ldr r3, [r7, #20]
800bbba: 4413 add r3, r2
800bbbc: f503 6380 add.w r3, r3, #1024 @ 0x400
800bbc0: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800bbc2: 69bb ldr r3, [r7, #24]
800bbc4: 627b str r3, [r7, #36] @ 0x24
800bbc6: e01b b.n 800bc00 <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
800bbc8: 6a3b ldr r3, [r7, #32]
800bbca: 881b ldrh r3, [r3, #0]
800bbcc: b29b uxth r3, r3
800bbce: 613b str r3, [r7, #16]
pdwVal++;
800bbd0: 6a3b ldr r3, [r7, #32]
800bbd2: 3302 adds r3, #2
800bbd4: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800bbd6: 693b ldr r3, [r7, #16]
800bbd8: b2da uxtb r2, r3
800bbda: 69fb ldr r3, [r7, #28]
800bbdc: 701a strb r2, [r3, #0]
pBuf++;
800bbde: 69fb ldr r3, [r7, #28]
800bbe0: 3301 adds r3, #1
800bbe2: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
800bbe4: 693b ldr r3, [r7, #16]
800bbe6: 0a1b lsrs r3, r3, #8
800bbe8: b2da uxtb r2, r3
800bbea: 69fb ldr r3, [r7, #28]
800bbec: 701a strb r2, [r3, #0]
pBuf++;
800bbee: 69fb ldr r3, [r7, #28]
800bbf0: 3301 adds r3, #1
800bbf2: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
800bbf4: 6a3b ldr r3, [r7, #32]
800bbf6: 3302 adds r3, #2
800bbf8: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800bbfa: 6a7b ldr r3, [r7, #36] @ 0x24
800bbfc: 3b01 subs r3, #1
800bbfe: 627b str r3, [r7, #36] @ 0x24
800bc00: 6a7b ldr r3, [r7, #36] @ 0x24
800bc02: 2b00 cmp r3, #0
800bc04: d1e0 bne.n 800bbc8 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
800bc06: 88bb ldrh r3, [r7, #4]
800bc08: f003 0301 and.w r3, r3, #1
800bc0c: b29b uxth r3, r3
800bc0e: 2b00 cmp r3, #0
800bc10: d007 beq.n 800bc22 <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
800bc12: 6a3b ldr r3, [r7, #32]
800bc14: 881b ldrh r3, [r3, #0]
800bc16: b29b uxth r3, r3
800bc18: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800bc1a: 693b ldr r3, [r7, #16]
800bc1c: b2da uxtb r2, r3
800bc1e: 69fb ldr r3, [r7, #28]
800bc20: 701a strb r2, [r3, #0]
}
}
800bc22: bf00 nop
800bc24: 372c adds r7, #44 @ 0x2c
800bc26: 46bd mov sp, r7
800bc28: bc80 pop {r7}
800bc2a: 4770 bx lr
0800bc2c <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800bc2c: b580 push {r7, lr}
800bc2e: b084 sub sp, #16
800bc30: af00 add r7, sp, #0
800bc32: 6078 str r0, [r7, #4]
800bc34: 460b mov r3, r1
800bc36: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800bc38: 2300 movs r3, #0
800bc3a: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
800bc3c: 687b ldr r3, [r7, #4]
800bc3e: 7c1b ldrb r3, [r3, #16]
800bc40: 2b00 cmp r3, #0
800bc42: d115 bne.n 800bc70 <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800bc44: f44f 7300 mov.w r3, #512 @ 0x200
800bc48: 2202 movs r2, #2
800bc4a: 2181 movs r1, #129 @ 0x81
800bc4c: 6878 ldr r0, [r7, #4]
800bc4e: f001 ff00 bl 800da52 <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800bc52: 687b ldr r3, [r7, #4]
800bc54: 2201 movs r2, #1
800bc56: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800bc58: f44f 7300 mov.w r3, #512 @ 0x200
800bc5c: 2202 movs r2, #2
800bc5e: 2101 movs r1, #1
800bc60: 6878 ldr r0, [r7, #4]
800bc62: f001 fef6 bl 800da52 <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800bc66: 687b ldr r3, [r7, #4]
800bc68: 2201 movs r2, #1
800bc6a: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800bc6e: e012 b.n 800bc96 <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800bc70: 2340 movs r3, #64 @ 0x40
800bc72: 2202 movs r2, #2
800bc74: 2181 movs r1, #129 @ 0x81
800bc76: 6878 ldr r0, [r7, #4]
800bc78: f001 feeb bl 800da52 <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800bc7c: 687b ldr r3, [r7, #4]
800bc7e: 2201 movs r2, #1
800bc80: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800bc82: 2340 movs r3, #64 @ 0x40
800bc84: 2202 movs r2, #2
800bc86: 2101 movs r1, #1
800bc88: 6878 ldr r0, [r7, #4]
800bc8a: f001 fee2 bl 800da52 <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800bc8e: 687b ldr r3, [r7, #4]
800bc90: 2201 movs r2, #1
800bc92: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
800bc96: 2308 movs r3, #8
800bc98: 2203 movs r2, #3
800bc9a: 2182 movs r1, #130 @ 0x82
800bc9c: 6878 ldr r0, [r7, #4]
800bc9e: f001 fed8 bl 800da52 <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800bca2: 687b ldr r3, [r7, #4]
800bca4: 2201 movs r2, #1
800bca6: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
800bca8: f44f 7007 mov.w r0, #540 @ 0x21c
800bcac: f001 fff8 bl 800dca0 <USBD_static_malloc>
800bcb0: 4602 mov r2, r0
800bcb2: 687b ldr r3, [r7, #4]
800bcb4: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
800bcb8: 687b ldr r3, [r7, #4]
800bcba: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bcbe: 2b00 cmp r3, #0
800bcc0: d102 bne.n 800bcc8 <USBD_CDC_Init+0x9c>
{
ret = 1U;
800bcc2: 2301 movs r3, #1
800bcc4: 73fb strb r3, [r7, #15]
800bcc6: e026 b.n 800bd16 <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bcc8: 687b ldr r3, [r7, #4]
800bcca: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bcce: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
800bcd0: 687b ldr r3, [r7, #4]
800bcd2: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bcd6: 681b ldr r3, [r3, #0]
800bcd8: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800bcda: 68bb ldr r3, [r7, #8]
800bcdc: 2200 movs r2, #0
800bcde: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
800bce2: 68bb ldr r3, [r7, #8]
800bce4: 2200 movs r2, #0
800bce6: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800bcea: 687b ldr r3, [r7, #4]
800bcec: 7c1b ldrb r3, [r3, #16]
800bcee: 2b00 cmp r3, #0
800bcf0: d109 bne.n 800bd06 <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800bcf2: 68bb ldr r3, [r7, #8]
800bcf4: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800bcf8: f44f 7300 mov.w r3, #512 @ 0x200
800bcfc: 2101 movs r1, #1
800bcfe: 6878 ldr r0, [r7, #4]
800bd00: f001 ff97 bl 800dc32 <USBD_LL_PrepareReceive>
800bd04: e007 b.n 800bd16 <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800bd06: 68bb ldr r3, [r7, #8]
800bd08: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800bd0c: 2340 movs r3, #64 @ 0x40
800bd0e: 2101 movs r1, #1
800bd10: 6878 ldr r0, [r7, #4]
800bd12: f001 ff8e bl 800dc32 <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
800bd16: 7bfb ldrb r3, [r7, #15]
}
800bd18: 4618 mov r0, r3
800bd1a: 3710 adds r7, #16
800bd1c: 46bd mov sp, r7
800bd1e: bd80 pop {r7, pc}
0800bd20 <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800bd20: b580 push {r7, lr}
800bd22: b084 sub sp, #16
800bd24: af00 add r7, sp, #0
800bd26: 6078 str r0, [r7, #4]
800bd28: 460b mov r3, r1
800bd2a: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800bd2c: 2300 movs r3, #0
800bd2e: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
800bd30: 2181 movs r1, #129 @ 0x81
800bd32: 6878 ldr r0, [r7, #4]
800bd34: f001 feb3 bl 800da9e <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
800bd38: 687b ldr r3, [r7, #4]
800bd3a: 2200 movs r2, #0
800bd3c: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
800bd3e: 2101 movs r1, #1
800bd40: 6878 ldr r0, [r7, #4]
800bd42: f001 feac bl 800da9e <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
800bd46: 687b ldr r3, [r7, #4]
800bd48: 2200 movs r2, #0
800bd4a: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
800bd4e: 2182 movs r1, #130 @ 0x82
800bd50: 6878 ldr r0, [r7, #4]
800bd52: f001 fea4 bl 800da9e <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
800bd56: 687b ldr r3, [r7, #4]
800bd58: 2200 movs r2, #0
800bd5a: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
800bd5c: 687b ldr r3, [r7, #4]
800bd5e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bd62: 2b00 cmp r3, #0
800bd64: d00e beq.n 800bd84 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
800bd66: 687b ldr r3, [r7, #4]
800bd68: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bd6c: 685b ldr r3, [r3, #4]
800bd6e: 4798 blx r3
USBD_free(pdev->pClassData);
800bd70: 687b ldr r3, [r7, #4]
800bd72: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bd76: 4618 mov r0, r3
800bd78: f001 ff9e bl 800dcb8 <USBD_static_free>
pdev->pClassData = NULL;
800bd7c: 687b ldr r3, [r7, #4]
800bd7e: 2200 movs r2, #0
800bd80: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
800bd84: 7bfb ldrb r3, [r7, #15]
}
800bd86: 4618 mov r0, r3
800bd88: 3710 adds r7, #16
800bd8a: 46bd mov sp, r7
800bd8c: bd80 pop {r7, pc}
0800bd8e <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800bd8e: b580 push {r7, lr}
800bd90: b086 sub sp, #24
800bd92: af00 add r7, sp, #0
800bd94: 6078 str r0, [r7, #4]
800bd96: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bd98: 687b ldr r3, [r7, #4]
800bd9a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bd9e: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
800bda0: 2300 movs r3, #0
800bda2: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
800bda4: 2300 movs r3, #0
800bda6: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
800bda8: 2300 movs r3, #0
800bdaa: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800bdac: 683b ldr r3, [r7, #0]
800bdae: 781b ldrb r3, [r3, #0]
800bdb0: f003 0360 and.w r3, r3, #96 @ 0x60
800bdb4: 2b00 cmp r3, #0
800bdb6: d039 beq.n 800be2c <USBD_CDC_Setup+0x9e>
800bdb8: 2b20 cmp r3, #32
800bdba: d17f bne.n 800bebc <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
800bdbc: 683b ldr r3, [r7, #0]
800bdbe: 88db ldrh r3, [r3, #6]
800bdc0: 2b00 cmp r3, #0
800bdc2: d029 beq.n 800be18 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
800bdc4: 683b ldr r3, [r7, #0]
800bdc6: 781b ldrb r3, [r3, #0]
800bdc8: b25b sxtb r3, r3
800bdca: 2b00 cmp r3, #0
800bdcc: da11 bge.n 800bdf2 <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800bdce: 687b ldr r3, [r7, #4]
800bdd0: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bdd4: 689b ldr r3, [r3, #8]
800bdd6: 683a ldr r2, [r7, #0]
800bdd8: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800bdda: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800bddc: 683a ldr r2, [r7, #0]
800bdde: 88d2 ldrh r2, [r2, #6]
800bde0: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800bde2: 6939 ldr r1, [r7, #16]
800bde4: 683b ldr r3, [r7, #0]
800bde6: 88db ldrh r3, [r3, #6]
800bde8: 461a mov r2, r3
800bdea: 6878 ldr r0, [r7, #4]
800bdec: f001 fa06 bl 800d1fc <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
800bdf0: e06b b.n 800beca <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
800bdf2: 683b ldr r3, [r7, #0]
800bdf4: 785a ldrb r2, [r3, #1]
800bdf6: 693b ldr r3, [r7, #16]
800bdf8: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
800bdfc: 683b ldr r3, [r7, #0]
800bdfe: 88db ldrh r3, [r3, #6]
800be00: b2da uxtb r2, r3
800be02: 693b ldr r3, [r7, #16]
800be04: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800be08: 6939 ldr r1, [r7, #16]
800be0a: 683b ldr r3, [r7, #0]
800be0c: 88db ldrh r3, [r3, #6]
800be0e: 461a mov r2, r3
800be10: 6878 ldr r0, [r7, #4]
800be12: f001 fa21 bl 800d258 <USBD_CtlPrepareRx>
break;
800be16: e058 b.n 800beca <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800be18: 687b ldr r3, [r7, #4]
800be1a: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800be1e: 689b ldr r3, [r3, #8]
800be20: 683a ldr r2, [r7, #0]
800be22: 7850 ldrb r0, [r2, #1]
800be24: 2200 movs r2, #0
800be26: 6839 ldr r1, [r7, #0]
800be28: 4798 blx r3
break;
800be2a: e04e b.n 800beca <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800be2c: 683b ldr r3, [r7, #0]
800be2e: 785b ldrb r3, [r3, #1]
800be30: 2b0b cmp r3, #11
800be32: d02e beq.n 800be92 <USBD_CDC_Setup+0x104>
800be34: 2b0b cmp r3, #11
800be36: dc38 bgt.n 800beaa <USBD_CDC_Setup+0x11c>
800be38: 2b00 cmp r3, #0
800be3a: d002 beq.n 800be42 <USBD_CDC_Setup+0xb4>
800be3c: 2b0a cmp r3, #10
800be3e: d014 beq.n 800be6a <USBD_CDC_Setup+0xdc>
800be40: e033 b.n 800beaa <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800be42: 687b ldr r3, [r7, #4]
800be44: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800be48: 2b03 cmp r3, #3
800be4a: d107 bne.n 800be5c <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
800be4c: f107 030c add.w r3, r7, #12
800be50: 2202 movs r2, #2
800be52: 4619 mov r1, r3
800be54: 6878 ldr r0, [r7, #4]
800be56: f001 f9d1 bl 800d1fc <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800be5a: e02e b.n 800beba <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800be5c: 6839 ldr r1, [r7, #0]
800be5e: 6878 ldr r0, [r7, #4]
800be60: f001 f962 bl 800d128 <USBD_CtlError>
ret = USBD_FAIL;
800be64: 2302 movs r3, #2
800be66: 75fb strb r3, [r7, #23]
break;
800be68: e027 b.n 800beba <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800be6a: 687b ldr r3, [r7, #4]
800be6c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800be70: 2b03 cmp r3, #3
800be72: d107 bne.n 800be84 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
800be74: f107 030f add.w r3, r7, #15
800be78: 2201 movs r2, #1
800be7a: 4619 mov r1, r3
800be7c: 6878 ldr r0, [r7, #4]
800be7e: f001 f9bd bl 800d1fc <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800be82: e01a b.n 800beba <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800be84: 6839 ldr r1, [r7, #0]
800be86: 6878 ldr r0, [r7, #4]
800be88: f001 f94e bl 800d128 <USBD_CtlError>
ret = USBD_FAIL;
800be8c: 2302 movs r3, #2
800be8e: 75fb strb r3, [r7, #23]
break;
800be90: e013 b.n 800beba <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800be92: 687b ldr r3, [r7, #4]
800be94: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800be98: 2b03 cmp r3, #3
800be9a: d00d beq.n 800beb8 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
800be9c: 6839 ldr r1, [r7, #0]
800be9e: 6878 ldr r0, [r7, #4]
800bea0: f001 f942 bl 800d128 <USBD_CtlError>
ret = USBD_FAIL;
800bea4: 2302 movs r3, #2
800bea6: 75fb strb r3, [r7, #23]
}
break;
800bea8: e006 b.n 800beb8 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800beaa: 6839 ldr r1, [r7, #0]
800beac: 6878 ldr r0, [r7, #4]
800beae: f001 f93b bl 800d128 <USBD_CtlError>
ret = USBD_FAIL;
800beb2: 2302 movs r3, #2
800beb4: 75fb strb r3, [r7, #23]
break;
800beb6: e000 b.n 800beba <USBD_CDC_Setup+0x12c>
break;
800beb8: bf00 nop
}
break;
800beba: e006 b.n 800beca <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
800bebc: 6839 ldr r1, [r7, #0]
800bebe: 6878 ldr r0, [r7, #4]
800bec0: f001 f932 bl 800d128 <USBD_CtlError>
ret = USBD_FAIL;
800bec4: 2302 movs r3, #2
800bec6: 75fb strb r3, [r7, #23]
break;
800bec8: bf00 nop
}
return ret;
800beca: 7dfb ldrb r3, [r7, #23]
}
800becc: 4618 mov r0, r3
800bece: 3718 adds r7, #24
800bed0: 46bd mov sp, r7
800bed2: bd80 pop {r7, pc}
0800bed4 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800bed4: b580 push {r7, lr}
800bed6: b084 sub sp, #16
800bed8: af00 add r7, sp, #0
800beda: 6078 str r0, [r7, #4]
800bedc: 460b mov r3, r1
800bede: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
800bee0: 687b ldr r3, [r7, #4]
800bee2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bee6: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
800bee8: 687b ldr r3, [r7, #4]
800beea: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800beee: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
800bef0: 687b ldr r3, [r7, #4]
800bef2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bef6: 2b00 cmp r3, #0
800bef8: d03a beq.n 800bf70 <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800befa: 78fa ldrb r2, [r7, #3]
800befc: 6879 ldr r1, [r7, #4]
800befe: 4613 mov r3, r2
800bf00: 009b lsls r3, r3, #2
800bf02: 4413 add r3, r2
800bf04: 009b lsls r3, r3, #2
800bf06: 440b add r3, r1
800bf08: 331c adds r3, #28
800bf0a: 681b ldr r3, [r3, #0]
800bf0c: 2b00 cmp r3, #0
800bf0e: d029 beq.n 800bf64 <USBD_CDC_DataIn+0x90>
800bf10: 78fa ldrb r2, [r7, #3]
800bf12: 6879 ldr r1, [r7, #4]
800bf14: 4613 mov r3, r2
800bf16: 009b lsls r3, r3, #2
800bf18: 4413 add r3, r2
800bf1a: 009b lsls r3, r3, #2
800bf1c: 440b add r3, r1
800bf1e: 331c adds r3, #28
800bf20: 681a ldr r2, [r3, #0]
800bf22: 78f9 ldrb r1, [r7, #3]
800bf24: 68b8 ldr r0, [r7, #8]
800bf26: 460b mov r3, r1
800bf28: 009b lsls r3, r3, #2
800bf2a: 440b add r3, r1
800bf2c: 00db lsls r3, r3, #3
800bf2e: 4403 add r3, r0
800bf30: 3320 adds r3, #32
800bf32: 681b ldr r3, [r3, #0]
800bf34: fbb2 f1f3 udiv r1, r2, r3
800bf38: fb01 f303 mul.w r3, r1, r3
800bf3c: 1ad3 subs r3, r2, r3
800bf3e: 2b00 cmp r3, #0
800bf40: d110 bne.n 800bf64 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
800bf42: 78fa ldrb r2, [r7, #3]
800bf44: 6879 ldr r1, [r7, #4]
800bf46: 4613 mov r3, r2
800bf48: 009b lsls r3, r3, #2
800bf4a: 4413 add r3, r2
800bf4c: 009b lsls r3, r3, #2
800bf4e: 440b add r3, r1
800bf50: 331c adds r3, #28
800bf52: 2200 movs r2, #0
800bf54: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
800bf56: 78f9 ldrb r1, [r7, #3]
800bf58: 2300 movs r3, #0
800bf5a: 2200 movs r2, #0
800bf5c: 6878 ldr r0, [r7, #4]
800bf5e: f001 fe45 bl 800dbec <USBD_LL_Transmit>
800bf62: e003 b.n 800bf6c <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
800bf64: 68fb ldr r3, [r7, #12]
800bf66: 2200 movs r2, #0
800bf68: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
800bf6c: 2300 movs r3, #0
800bf6e: e000 b.n 800bf72 <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
800bf70: 2302 movs r3, #2
}
}
800bf72: 4618 mov r0, r3
800bf74: 3710 adds r7, #16
800bf76: 46bd mov sp, r7
800bf78: bd80 pop {r7, pc}
0800bf7a <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800bf7a: b580 push {r7, lr}
800bf7c: b084 sub sp, #16
800bf7e: af00 add r7, sp, #0
800bf80: 6078 str r0, [r7, #4]
800bf82: 460b mov r3, r1
800bf84: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bf86: 687b ldr r3, [r7, #4]
800bf88: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bf8c: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
800bf8e: 78fb ldrb r3, [r7, #3]
800bf90: 4619 mov r1, r3
800bf92: 6878 ldr r0, [r7, #4]
800bf94: f001 fe70 bl 800dc78 <USBD_LL_GetRxDataSize>
800bf98: 4602 mov r2, r0
800bf9a: 68fb ldr r3, [r7, #12]
800bf9c: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
800bfa0: 687b ldr r3, [r7, #4]
800bfa2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bfa6: 2b00 cmp r3, #0
800bfa8: d00d beq.n 800bfc6 <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800bfaa: 687b ldr r3, [r7, #4]
800bfac: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bfb0: 68db ldr r3, [r3, #12]
800bfb2: 68fa ldr r2, [r7, #12]
800bfb4: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800bfb8: 68fa ldr r2, [r7, #12]
800bfba: f502 7203 add.w r2, r2, #524 @ 0x20c
800bfbe: 4611 mov r1, r2
800bfc0: 4798 blx r3
return USBD_OK;
800bfc2: 2300 movs r3, #0
800bfc4: e000 b.n 800bfc8 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800bfc6: 2302 movs r3, #2
}
}
800bfc8: 4618 mov r0, r3
800bfca: 3710 adds r7, #16
800bfcc: 46bd mov sp, r7
800bfce: bd80 pop {r7, pc}
0800bfd0 <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
800bfd0: b580 push {r7, lr}
800bfd2: b084 sub sp, #16
800bfd4: af00 add r7, sp, #0
800bfd6: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bfd8: 687b ldr r3, [r7, #4]
800bfda: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bfde: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
800bfe0: 687b ldr r3, [r7, #4]
800bfe2: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bfe6: 2b00 cmp r3, #0
800bfe8: d014 beq.n 800c014 <USBD_CDC_EP0_RxReady+0x44>
800bfea: 68fb ldr r3, [r7, #12]
800bfec: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
800bff0: 2bff cmp r3, #255 @ 0xff
800bff2: d00f beq.n 800c014 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800bff4: 687b ldr r3, [r7, #4]
800bff6: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bffa: 689b ldr r3, [r3, #8]
800bffc: 68fa ldr r2, [r7, #12]
800bffe: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
800c002: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
800c004: 68fa ldr r2, [r7, #12]
800c006: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c00a: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
800c00c: 68fb ldr r3, [r7, #12]
800c00e: 22ff movs r2, #255 @ 0xff
800c010: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
800c014: 2300 movs r3, #0
}
800c016: 4618 mov r0, r3
800c018: 3710 adds r7, #16
800c01a: 46bd mov sp, r7
800c01c: bd80 pop {r7, pc}
...
0800c020 <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
800c020: b480 push {r7}
800c022: b083 sub sp, #12
800c024: af00 add r7, sp, #0
800c026: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
800c028: 687b ldr r3, [r7, #4]
800c02a: 2243 movs r2, #67 @ 0x43
800c02c: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
800c02e: 4b03 ldr r3, [pc, #12] @ (800c03c <USBD_CDC_GetFSCfgDesc+0x1c>)
}
800c030: 4618 mov r0, r3
800c032: 370c adds r7, #12
800c034: 46bd mov sp, r7
800c036: bc80 pop {r7}
800c038: 4770 bx lr
800c03a: bf00 nop
800c03c: 200000a4 .word 0x200000a4
0800c040 <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
800c040: b480 push {r7}
800c042: b083 sub sp, #12
800c044: af00 add r7, sp, #0
800c046: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
800c048: 687b ldr r3, [r7, #4]
800c04a: 2243 movs r2, #67 @ 0x43
800c04c: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
800c04e: 4b03 ldr r3, [pc, #12] @ (800c05c <USBD_CDC_GetHSCfgDesc+0x1c>)
}
800c050: 4618 mov r0, r3
800c052: 370c adds r7, #12
800c054: 46bd mov sp, r7
800c056: bc80 pop {r7}
800c058: 4770 bx lr
800c05a: bf00 nop
800c05c: 20000060 .word 0x20000060
0800c060 <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
800c060: b480 push {r7}
800c062: b083 sub sp, #12
800c064: af00 add r7, sp, #0
800c066: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800c068: 687b ldr r3, [r7, #4]
800c06a: 2243 movs r2, #67 @ 0x43
800c06c: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
800c06e: 4b03 ldr r3, [pc, #12] @ (800c07c <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
800c070: 4618 mov r0, r3
800c072: 370c adds r7, #12
800c074: 46bd mov sp, r7
800c076: bc80 pop {r7}
800c078: 4770 bx lr
800c07a: bf00 nop
800c07c: 200000e8 .word 0x200000e8
0800c080 <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
800c080: b480 push {r7}
800c082: b083 sub sp, #12
800c084: af00 add r7, sp, #0
800c086: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800c088: 687b ldr r3, [r7, #4]
800c08a: 220a movs r2, #10
800c08c: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
800c08e: 4b03 ldr r3, [pc, #12] @ (800c09c <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
800c090: 4618 mov r0, r3
800c092: 370c adds r7, #12
800c094: 46bd mov sp, r7
800c096: bc80 pop {r7}
800c098: 4770 bx lr
800c09a: bf00 nop
800c09c: 2000001c .word 0x2000001c
0800c0a0 <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
800c0a0: b480 push {r7}
800c0a2: b085 sub sp, #20
800c0a4: af00 add r7, sp, #0
800c0a6: 6078 str r0, [r7, #4]
800c0a8: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800c0aa: 2302 movs r3, #2
800c0ac: 73fb strb r3, [r7, #15]
if (fops != NULL)
800c0ae: 683b ldr r3, [r7, #0]
800c0b0: 2b00 cmp r3, #0
800c0b2: d005 beq.n 800c0c0 <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
800c0b4: 687b ldr r3, [r7, #4]
800c0b6: 683a ldr r2, [r7, #0]
800c0b8: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
800c0bc: 2300 movs r3, #0
800c0be: 73fb strb r3, [r7, #15]
}
return ret;
800c0c0: 7bfb ldrb r3, [r7, #15]
}
800c0c2: 4618 mov r0, r3
800c0c4: 3714 adds r7, #20
800c0c6: 46bd mov sp, r7
800c0c8: bc80 pop {r7}
800c0ca: 4770 bx lr
0800c0cc <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
800c0cc: b480 push {r7}
800c0ce: b087 sub sp, #28
800c0d0: af00 add r7, sp, #0
800c0d2: 60f8 str r0, [r7, #12]
800c0d4: 60b9 str r1, [r7, #8]
800c0d6: 4613 mov r3, r2
800c0d8: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c0da: 68fb ldr r3, [r7, #12]
800c0dc: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c0e0: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
800c0e2: 697b ldr r3, [r7, #20]
800c0e4: 68ba ldr r2, [r7, #8]
800c0e6: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
800c0ea: 88fa ldrh r2, [r7, #6]
800c0ec: 697b ldr r3, [r7, #20]
800c0ee: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
800c0f2: 2300 movs r3, #0
}
800c0f4: 4618 mov r0, r3
800c0f6: 371c adds r7, #28
800c0f8: 46bd mov sp, r7
800c0fa: bc80 pop {r7}
800c0fc: 4770 bx lr
0800c0fe <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
800c0fe: b480 push {r7}
800c100: b085 sub sp, #20
800c102: af00 add r7, sp, #0
800c104: 6078 str r0, [r7, #4]
800c106: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c108: 687b ldr r3, [r7, #4]
800c10a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c10e: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
800c110: 68fb ldr r3, [r7, #12]
800c112: 683a ldr r2, [r7, #0]
800c114: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
800c118: 2300 movs r3, #0
}
800c11a: 4618 mov r0, r3
800c11c: 3714 adds r7, #20
800c11e: 46bd mov sp, r7
800c120: bc80 pop {r7}
800c122: 4770 bx lr
0800c124 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
800c124: b580 push {r7, lr}
800c126: b084 sub sp, #16
800c128: af00 add r7, sp, #0
800c12a: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c12c: 687b ldr r3, [r7, #4]
800c12e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c132: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
800c134: 687b ldr r3, [r7, #4]
800c136: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c13a: 2b00 cmp r3, #0
800c13c: d01c beq.n 800c178 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
800c13e: 68fb ldr r3, [r7, #12]
800c140: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800c144: 2b00 cmp r3, #0
800c146: d115 bne.n 800c174 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
800c148: 68fb ldr r3, [r7, #12]
800c14a: 2201 movs r2, #1
800c14c: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
800c150: 68fb ldr r3, [r7, #12]
800c152: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
800c156: 687b ldr r3, [r7, #4]
800c158: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c15a: 68fb ldr r3, [r7, #12]
800c15c: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
800c160: 68fb ldr r3, [r7, #12]
800c162: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c166: b29b uxth r3, r3
800c168: 2181 movs r1, #129 @ 0x81
800c16a: 6878 ldr r0, [r7, #4]
800c16c: f001 fd3e bl 800dbec <USBD_LL_Transmit>
return USBD_OK;
800c170: 2300 movs r3, #0
800c172: e002 b.n 800c17a <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800c174: 2301 movs r3, #1
800c176: e000 b.n 800c17a <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
800c178: 2302 movs r3, #2
}
}
800c17a: 4618 mov r0, r3
800c17c: 3710 adds r7, #16
800c17e: 46bd mov sp, r7
800c180: bd80 pop {r7, pc}
0800c182 <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800c182: b580 push {r7, lr}
800c184: b084 sub sp, #16
800c186: af00 add r7, sp, #0
800c188: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c18a: 687b ldr r3, [r7, #4]
800c18c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c190: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800c192: 687b ldr r3, [r7, #4]
800c194: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c198: 2b00 cmp r3, #0
800c19a: d017 beq.n 800c1cc <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c19c: 687b ldr r3, [r7, #4]
800c19e: 7c1b ldrb r3, [r3, #16]
800c1a0: 2b00 cmp r3, #0
800c1a2: d109 bne.n 800c1b8 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c1a4: 68fb ldr r3, [r7, #12]
800c1a6: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c1aa: f44f 7300 mov.w r3, #512 @ 0x200
800c1ae: 2101 movs r1, #1
800c1b0: 6878 ldr r0, [r7, #4]
800c1b2: f001 fd3e bl 800dc32 <USBD_LL_PrepareReceive>
800c1b6: e007 b.n 800c1c8 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c1b8: 68fb ldr r3, [r7, #12]
800c1ba: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c1be: 2340 movs r3, #64 @ 0x40
800c1c0: 2101 movs r1, #1
800c1c2: 6878 ldr r0, [r7, #4]
800c1c4: f001 fd35 bl 800dc32 <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
800c1c8: 2300 movs r3, #0
800c1ca: e000 b.n 800c1ce <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
800c1cc: 2302 movs r3, #2
}
}
800c1ce: 4618 mov r0, r3
800c1d0: 3710 adds r7, #16
800c1d2: 46bd mov sp, r7
800c1d4: bd80 pop {r7, pc}
0800c1d6 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800c1d6: b580 push {r7, lr}
800c1d8: b084 sub sp, #16
800c1da: af00 add r7, sp, #0
800c1dc: 60f8 str r0, [r7, #12]
800c1de: 60b9 str r1, [r7, #8]
800c1e0: 4613 mov r3, r2
800c1e2: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800c1e4: 68fb ldr r3, [r7, #12]
800c1e6: 2b00 cmp r3, #0
800c1e8: d101 bne.n 800c1ee <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
800c1ea: 2302 movs r3, #2
800c1ec: e01a b.n 800c224 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
800c1ee: 68fb ldr r3, [r7, #12]
800c1f0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c1f4: 2b00 cmp r3, #0
800c1f6: d003 beq.n 800c200 <USBD_Init+0x2a>
{
pdev->pClass = NULL;
800c1f8: 68fb ldr r3, [r7, #12]
800c1fa: 2200 movs r2, #0
800c1fc: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
800c200: 68bb ldr r3, [r7, #8]
800c202: 2b00 cmp r3, #0
800c204: d003 beq.n 800c20e <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
800c206: 68fb ldr r3, [r7, #12]
800c208: 68ba ldr r2, [r7, #8]
800c20a: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
800c20e: 68fb ldr r3, [r7, #12]
800c210: 2201 movs r2, #1
800c212: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
800c216: 68fb ldr r3, [r7, #12]
800c218: 79fa ldrb r2, [r7, #7]
800c21a: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
800c21c: 68f8 ldr r0, [r7, #12]
800c21e: f001 fba3 bl 800d968 <USBD_LL_Init>
return USBD_OK;
800c222: 2300 movs r3, #0
}
800c224: 4618 mov r0, r3
800c226: 3710 adds r7, #16
800c228: 46bd mov sp, r7
800c22a: bd80 pop {r7, pc}
0800c22c <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800c22c: b480 push {r7}
800c22e: b085 sub sp, #20
800c230: af00 add r7, sp, #0
800c232: 6078 str r0, [r7, #4]
800c234: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
800c236: 2300 movs r3, #0
800c238: 73fb strb r3, [r7, #15]
if (pclass != NULL)
800c23a: 683b ldr r3, [r7, #0]
800c23c: 2b00 cmp r3, #0
800c23e: d006 beq.n 800c24e <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
800c240: 687b ldr r3, [r7, #4]
800c242: 683a ldr r2, [r7, #0]
800c244: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
800c248: 2300 movs r3, #0
800c24a: 73fb strb r3, [r7, #15]
800c24c: e001 b.n 800c252 <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
800c24e: 2302 movs r3, #2
800c250: 73fb strb r3, [r7, #15]
}
return status;
800c252: 7bfb ldrb r3, [r7, #15]
}
800c254: 4618 mov r0, r3
800c256: 3714 adds r7, #20
800c258: 46bd mov sp, r7
800c25a: bc80 pop {r7}
800c25c: 4770 bx lr
0800c25e <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800c25e: b580 push {r7, lr}
800c260: b082 sub sp, #8
800c262: af00 add r7, sp, #0
800c264: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
800c266: 6878 ldr r0, [r7, #4]
800c268: f001 fbd8 bl 800da1c <USBD_LL_Start>
return USBD_OK;
800c26c: 2300 movs r3, #0
}
800c26e: 4618 mov r0, r3
800c270: 3708 adds r7, #8
800c272: 46bd mov sp, r7
800c274: bd80 pop {r7, pc}
0800c276 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800c276: b480 push {r7}
800c278: b083 sub sp, #12
800c27a: af00 add r7, sp, #0
800c27c: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800c27e: 2300 movs r3, #0
}
800c280: 4618 mov r0, r3
800c282: 370c adds r7, #12
800c284: 46bd mov sp, r7
800c286: bc80 pop {r7}
800c288: 4770 bx lr
0800c28a <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c28a: b580 push {r7, lr}
800c28c: b084 sub sp, #16
800c28e: af00 add r7, sp, #0
800c290: 6078 str r0, [r7, #4]
800c292: 460b mov r3, r1
800c294: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800c296: 2302 movs r3, #2
800c298: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
800c29a: 687b ldr r3, [r7, #4]
800c29c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c2a0: 2b00 cmp r3, #0
800c2a2: d00c beq.n 800c2be <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
800c2a4: 687b ldr r3, [r7, #4]
800c2a6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c2aa: 681b ldr r3, [r3, #0]
800c2ac: 78fa ldrb r2, [r7, #3]
800c2ae: 4611 mov r1, r2
800c2b0: 6878 ldr r0, [r7, #4]
800c2b2: 4798 blx r3
800c2b4: 4603 mov r3, r0
800c2b6: 2b00 cmp r3, #0
800c2b8: d101 bne.n 800c2be <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
800c2ba: 2300 movs r3, #0
800c2bc: 73fb strb r3, [r7, #15]
}
}
return ret;
800c2be: 7bfb ldrb r3, [r7, #15]
}
800c2c0: 4618 mov r0, r3
800c2c2: 3710 adds r7, #16
800c2c4: 46bd mov sp, r7
800c2c6: bd80 pop {r7, pc}
0800c2c8 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c2c8: b580 push {r7, lr}
800c2ca: b082 sub sp, #8
800c2cc: af00 add r7, sp, #0
800c2ce: 6078 str r0, [r7, #4]
800c2d0: 460b mov r3, r1
800c2d2: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
800c2d4: 687b ldr r3, [r7, #4]
800c2d6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c2da: 685b ldr r3, [r3, #4]
800c2dc: 78fa ldrb r2, [r7, #3]
800c2de: 4611 mov r1, r2
800c2e0: 6878 ldr r0, [r7, #4]
800c2e2: 4798 blx r3
return USBD_OK;
800c2e4: 2300 movs r3, #0
}
800c2e6: 4618 mov r0, r3
800c2e8: 3708 adds r7, #8
800c2ea: 46bd mov sp, r7
800c2ec: bd80 pop {r7, pc}
0800c2ee <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800c2ee: b580 push {r7, lr}
800c2f0: b082 sub sp, #8
800c2f2: af00 add r7, sp, #0
800c2f4: 6078 str r0, [r7, #4]
800c2f6: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
800c2f8: 687b ldr r3, [r7, #4]
800c2fa: f503 732a add.w r3, r3, #680 @ 0x2a8
800c2fe: 6839 ldr r1, [r7, #0]
800c300: 4618 mov r0, r3
800c302: f000 fed8 bl 800d0b6 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800c306: 687b ldr r3, [r7, #4]
800c308: 2201 movs r2, #1
800c30a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
800c30e: 687b ldr r3, [r7, #4]
800c310: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800c314: 461a mov r2, r3
800c316: 687b ldr r3, [r7, #4]
800c318: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
800c31c: 687b ldr r3, [r7, #4]
800c31e: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800c322: f003 031f and.w r3, r3, #31
800c326: 2b02 cmp r3, #2
800c328: d016 beq.n 800c358 <USBD_LL_SetupStage+0x6a>
800c32a: 2b02 cmp r3, #2
800c32c: d81c bhi.n 800c368 <USBD_LL_SetupStage+0x7a>
800c32e: 2b00 cmp r3, #0
800c330: d002 beq.n 800c338 <USBD_LL_SetupStage+0x4a>
800c332: 2b01 cmp r3, #1
800c334: d008 beq.n 800c348 <USBD_LL_SetupStage+0x5a>
800c336: e017 b.n 800c368 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
800c338: 687b ldr r3, [r7, #4]
800c33a: f503 732a add.w r3, r3, #680 @ 0x2a8
800c33e: 4619 mov r1, r3
800c340: 6878 ldr r0, [r7, #4]
800c342: f000 f9cb bl 800c6dc <USBD_StdDevReq>
break;
800c346: e01a b.n 800c37e <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
800c348: 687b ldr r3, [r7, #4]
800c34a: f503 732a add.w r3, r3, #680 @ 0x2a8
800c34e: 4619 mov r1, r3
800c350: 6878 ldr r0, [r7, #4]
800c352: f000 fa2d bl 800c7b0 <USBD_StdItfReq>
break;
800c356: e012 b.n 800c37e <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
800c358: 687b ldr r3, [r7, #4]
800c35a: f503 732a add.w r3, r3, #680 @ 0x2a8
800c35e: 4619 mov r1, r3
800c360: 6878 ldr r0, [r7, #4]
800c362: f000 fa6d bl 800c840 <USBD_StdEPReq>
break;
800c366: e00a b.n 800c37e <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800c368: 687b ldr r3, [r7, #4]
800c36a: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800c36e: f023 037f bic.w r3, r3, #127 @ 0x7f
800c372: b2db uxtb r3, r3
800c374: 4619 mov r1, r3
800c376: 6878 ldr r0, [r7, #4]
800c378: f001 fbb0 bl 800dadc <USBD_LL_StallEP>
break;
800c37c: bf00 nop
}
return USBD_OK;
800c37e: 2300 movs r3, #0
}
800c380: 4618 mov r0, r3
800c382: 3708 adds r7, #8
800c384: 46bd mov sp, r7
800c386: bd80 pop {r7, pc}
0800c388 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800c388: b580 push {r7, lr}
800c38a: b086 sub sp, #24
800c38c: af00 add r7, sp, #0
800c38e: 60f8 str r0, [r7, #12]
800c390: 460b mov r3, r1
800c392: 607a str r2, [r7, #4]
800c394: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800c396: 7afb ldrb r3, [r7, #11]
800c398: 2b00 cmp r3, #0
800c39a: d14b bne.n 800c434 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
800c39c: 68fb ldr r3, [r7, #12]
800c39e: f503 73aa add.w r3, r3, #340 @ 0x154
800c3a2: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800c3a4: 68fb ldr r3, [r7, #12]
800c3a6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c3aa: 2b03 cmp r3, #3
800c3ac: d134 bne.n 800c418 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
800c3ae: 697b ldr r3, [r7, #20]
800c3b0: 68da ldr r2, [r3, #12]
800c3b2: 697b ldr r3, [r7, #20]
800c3b4: 691b ldr r3, [r3, #16]
800c3b6: 429a cmp r2, r3
800c3b8: d919 bls.n 800c3ee <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
800c3ba: 697b ldr r3, [r7, #20]
800c3bc: 68da ldr r2, [r3, #12]
800c3be: 697b ldr r3, [r7, #20]
800c3c0: 691b ldr r3, [r3, #16]
800c3c2: 1ad2 subs r2, r2, r3
800c3c4: 697b ldr r3, [r7, #20]
800c3c6: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800c3c8: 697b ldr r3, [r7, #20]
800c3ca: 68da ldr r2, [r3, #12]
800c3cc: 697b ldr r3, [r7, #20]
800c3ce: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800c3d0: 429a cmp r2, r3
800c3d2: d203 bcs.n 800c3dc <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800c3d4: 697b ldr r3, [r7, #20]
800c3d6: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
800c3d8: b29b uxth r3, r3
800c3da: e002 b.n 800c3e2 <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800c3dc: 697b ldr r3, [r7, #20]
800c3de: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800c3e0: b29b uxth r3, r3
800c3e2: 461a mov r2, r3
800c3e4: 6879 ldr r1, [r7, #4]
800c3e6: 68f8 ldr r0, [r7, #12]
800c3e8: f000 ff54 bl 800d294 <USBD_CtlContinueRx>
800c3ec: e038 b.n 800c460 <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800c3ee: 68fb ldr r3, [r7, #12]
800c3f0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c3f4: 691b ldr r3, [r3, #16]
800c3f6: 2b00 cmp r3, #0
800c3f8: d00a beq.n 800c410 <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c3fa: 68fb ldr r3, [r7, #12]
800c3fc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
800c400: 2b03 cmp r3, #3
800c402: d105 bne.n 800c410 <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
800c404: 68fb ldr r3, [r7, #12]
800c406: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c40a: 691b ldr r3, [r3, #16]
800c40c: 68f8 ldr r0, [r7, #12]
800c40e: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
800c410: 68f8 ldr r0, [r7, #12]
800c412: f000 ff51 bl 800d2b8 <USBD_CtlSendStatus>
800c416: e023 b.n 800c460 <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
800c418: 68fb ldr r3, [r7, #12]
800c41a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c41e: 2b05 cmp r3, #5
800c420: d11e bne.n 800c460 <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
800c422: 68fb ldr r3, [r7, #12]
800c424: 2200 movs r2, #0
800c426: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
800c42a: 2100 movs r1, #0
800c42c: 68f8 ldr r0, [r7, #12]
800c42e: f001 fb55 bl 800dadc <USBD_LL_StallEP>
800c432: e015 b.n 800c460 <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
800c434: 68fb ldr r3, [r7, #12]
800c436: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c43a: 699b ldr r3, [r3, #24]
800c43c: 2b00 cmp r3, #0
800c43e: d00d beq.n 800c45c <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c440: 68fb ldr r3, [r7, #12]
800c442: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
800c446: 2b03 cmp r3, #3
800c448: d108 bne.n 800c45c <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
800c44a: 68fb ldr r3, [r7, #12]
800c44c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c450: 699b ldr r3, [r3, #24]
800c452: 7afa ldrb r2, [r7, #11]
800c454: 4611 mov r1, r2
800c456: 68f8 ldr r0, [r7, #12]
800c458: 4798 blx r3
800c45a: e001 b.n 800c460 <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800c45c: 2302 movs r3, #2
800c45e: e000 b.n 800c462 <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800c460: 2300 movs r3, #0
}
800c462: 4618 mov r0, r3
800c464: 3718 adds r7, #24
800c466: 46bd mov sp, r7
800c468: bd80 pop {r7, pc}
0800c46a <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800c46a: b580 push {r7, lr}
800c46c: b086 sub sp, #24
800c46e: af00 add r7, sp, #0
800c470: 60f8 str r0, [r7, #12]
800c472: 460b mov r3, r1
800c474: 607a str r2, [r7, #4]
800c476: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800c478: 7afb ldrb r3, [r7, #11]
800c47a: 2b00 cmp r3, #0
800c47c: d17f bne.n 800c57e <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
800c47e: 68fb ldr r3, [r7, #12]
800c480: 3314 adds r3, #20
800c482: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800c484: 68fb ldr r3, [r7, #12]
800c486: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c48a: 2b02 cmp r3, #2
800c48c: d15c bne.n 800c548 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
800c48e: 697b ldr r3, [r7, #20]
800c490: 68da ldr r2, [r3, #12]
800c492: 697b ldr r3, [r7, #20]
800c494: 691b ldr r3, [r3, #16]
800c496: 429a cmp r2, r3
800c498: d915 bls.n 800c4c6 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
800c49a: 697b ldr r3, [r7, #20]
800c49c: 68da ldr r2, [r3, #12]
800c49e: 697b ldr r3, [r7, #20]
800c4a0: 691b ldr r3, [r3, #16]
800c4a2: 1ad2 subs r2, r2, r3
800c4a4: 697b ldr r3, [r7, #20]
800c4a6: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
800c4a8: 697b ldr r3, [r7, #20]
800c4aa: 68db ldr r3, [r3, #12]
800c4ac: b29b uxth r3, r3
800c4ae: 461a mov r2, r3
800c4b0: 6879 ldr r1, [r7, #4]
800c4b2: 68f8 ldr r0, [r7, #12]
800c4b4: f000 febe bl 800d234 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800c4b8: 2300 movs r3, #0
800c4ba: 2200 movs r2, #0
800c4bc: 2100 movs r1, #0
800c4be: 68f8 ldr r0, [r7, #12]
800c4c0: f001 fbb7 bl 800dc32 <USBD_LL_PrepareReceive>
800c4c4: e04e b.n 800c564 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800c4c6: 697b ldr r3, [r7, #20]
800c4c8: 689b ldr r3, [r3, #8]
800c4ca: 697a ldr r2, [r7, #20]
800c4cc: 6912 ldr r2, [r2, #16]
800c4ce: fbb3 f1f2 udiv r1, r3, r2
800c4d2: fb01 f202 mul.w r2, r1, r2
800c4d6: 1a9b subs r3, r3, r2
800c4d8: 2b00 cmp r3, #0
800c4da: d11c bne.n 800c516 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800c4dc: 697b ldr r3, [r7, #20]
800c4de: 689a ldr r2, [r3, #8]
800c4e0: 697b ldr r3, [r7, #20]
800c4e2: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
800c4e4: 429a cmp r2, r3
800c4e6: d316 bcc.n 800c516 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
800c4e8: 697b ldr r3, [r7, #20]
800c4ea: 689a ldr r2, [r3, #8]
800c4ec: 68fb ldr r3, [r7, #12]
800c4ee: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800c4f2: 429a cmp r2, r3
800c4f4: d20f bcs.n 800c516 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
800c4f6: 2200 movs r2, #0
800c4f8: 2100 movs r1, #0
800c4fa: 68f8 ldr r0, [r7, #12]
800c4fc: f000 fe9a bl 800d234 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800c500: 68fb ldr r3, [r7, #12]
800c502: 2200 movs r2, #0
800c504: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800c508: 2300 movs r3, #0
800c50a: 2200 movs r2, #0
800c50c: 2100 movs r1, #0
800c50e: 68f8 ldr r0, [r7, #12]
800c510: f001 fb8f bl 800dc32 <USBD_LL_PrepareReceive>
800c514: e026 b.n 800c564 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
800c516: 68fb ldr r3, [r7, #12]
800c518: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c51c: 68db ldr r3, [r3, #12]
800c51e: 2b00 cmp r3, #0
800c520: d00a beq.n 800c538 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c522: 68fb ldr r3, [r7, #12]
800c524: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
800c528: 2b03 cmp r3, #3
800c52a: d105 bne.n 800c538 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
800c52c: 68fb ldr r3, [r7, #12]
800c52e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c532: 68db ldr r3, [r3, #12]
800c534: 68f8 ldr r0, [r7, #12]
800c536: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
800c538: 2180 movs r1, #128 @ 0x80
800c53a: 68f8 ldr r0, [r7, #12]
800c53c: f001 face bl 800dadc <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800c540: 68f8 ldr r0, [r7, #12]
800c542: f000 fecc bl 800d2de <USBD_CtlReceiveStatus>
800c546: e00d b.n 800c564 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800c548: 68fb ldr r3, [r7, #12]
800c54a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c54e: 2b04 cmp r3, #4
800c550: d004 beq.n 800c55c <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
800c552: 68fb ldr r3, [r7, #12]
800c554: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800c558: 2b00 cmp r3, #0
800c55a: d103 bne.n 800c564 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800c55c: 2180 movs r1, #128 @ 0x80
800c55e: 68f8 ldr r0, [r7, #12]
800c560: f001 fabc bl 800dadc <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
800c564: 68fb ldr r3, [r7, #12]
800c566: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800c56a: 2b01 cmp r3, #1
800c56c: d11d bne.n 800c5aa <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800c56e: 68f8 ldr r0, [r7, #12]
800c570: f7ff fe81 bl 800c276 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800c574: 68fb ldr r3, [r7, #12]
800c576: 2200 movs r2, #0
800c578: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
800c57c: e015 b.n 800c5aa <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800c57e: 68fb ldr r3, [r7, #12]
800c580: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c584: 695b ldr r3, [r3, #20]
800c586: 2b00 cmp r3, #0
800c588: d00d beq.n 800c5a6 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c58a: 68fb ldr r3, [r7, #12]
800c58c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800c590: 2b03 cmp r3, #3
800c592: d108 bne.n 800c5a6 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
800c594: 68fb ldr r3, [r7, #12]
800c596: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c59a: 695b ldr r3, [r3, #20]
800c59c: 7afa ldrb r2, [r7, #11]
800c59e: 4611 mov r1, r2
800c5a0: 68f8 ldr r0, [r7, #12]
800c5a2: 4798 blx r3
800c5a4: e001 b.n 800c5aa <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800c5a6: 2302 movs r3, #2
800c5a8: e000 b.n 800c5ac <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
800c5aa: 2300 movs r3, #0
}
800c5ac: 4618 mov r0, r3
800c5ae: 3718 adds r7, #24
800c5b0: 46bd mov sp, r7
800c5b2: bd80 pop {r7, pc}
0800c5b4 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800c5b4: b580 push {r7, lr}
800c5b6: b082 sub sp, #8
800c5b8: af00 add r7, sp, #0
800c5ba: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800c5bc: 2340 movs r3, #64 @ 0x40
800c5be: 2200 movs r2, #0
800c5c0: 2100 movs r1, #0
800c5c2: 6878 ldr r0, [r7, #4]
800c5c4: f001 fa45 bl 800da52 <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800c5c8: 687b ldr r3, [r7, #4]
800c5ca: 2201 movs r2, #1
800c5cc: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800c5d0: 687b ldr r3, [r7, #4]
800c5d2: 2240 movs r2, #64 @ 0x40
800c5d4: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800c5d8: 2340 movs r3, #64 @ 0x40
800c5da: 2200 movs r2, #0
800c5dc: 2180 movs r1, #128 @ 0x80
800c5de: 6878 ldr r0, [r7, #4]
800c5e0: f001 fa37 bl 800da52 <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800c5e4: 687b ldr r3, [r7, #4]
800c5e6: 2201 movs r2, #1
800c5e8: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
800c5ea: 687b ldr r3, [r7, #4]
800c5ec: 2240 movs r2, #64 @ 0x40
800c5ee: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800c5f0: 687b ldr r3, [r7, #4]
800c5f2: 2201 movs r2, #1
800c5f4: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
800c5f8: 687b ldr r3, [r7, #4]
800c5fa: 2200 movs r2, #0
800c5fc: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
800c600: 687b ldr r3, [r7, #4]
800c602: 2200 movs r2, #0
800c604: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800c606: 687b ldr r3, [r7, #4]
800c608: 2200 movs r2, #0
800c60a: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
800c60e: 687b ldr r3, [r7, #4]
800c610: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c614: 2b00 cmp r3, #0
800c616: d009 beq.n 800c62c <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
800c618: 687b ldr r3, [r7, #4]
800c61a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c61e: 685b ldr r3, [r3, #4]
800c620: 687a ldr r2, [r7, #4]
800c622: 6852 ldr r2, [r2, #4]
800c624: b2d2 uxtb r2, r2
800c626: 4611 mov r1, r2
800c628: 6878 ldr r0, [r7, #4]
800c62a: 4798 blx r3
}
return USBD_OK;
800c62c: 2300 movs r3, #0
}
800c62e: 4618 mov r0, r3
800c630: 3708 adds r7, #8
800c632: 46bd mov sp, r7
800c634: bd80 pop {r7, pc}
0800c636 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
800c636: b480 push {r7}
800c638: b083 sub sp, #12
800c63a: af00 add r7, sp, #0
800c63c: 6078 str r0, [r7, #4]
800c63e: 460b mov r3, r1
800c640: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800c642: 687b ldr r3, [r7, #4]
800c644: 78fa ldrb r2, [r7, #3]
800c646: 741a strb r2, [r3, #16]
return USBD_OK;
800c648: 2300 movs r3, #0
}
800c64a: 4618 mov r0, r3
800c64c: 370c adds r7, #12
800c64e: 46bd mov sp, r7
800c650: bc80 pop {r7}
800c652: 4770 bx lr
0800c654 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
800c654: b480 push {r7}
800c656: b083 sub sp, #12
800c658: af00 add r7, sp, #0
800c65a: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
800c65c: 687b ldr r3, [r7, #4]
800c65e: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
800c662: 687b ldr r3, [r7, #4]
800c664: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
800c668: 687b ldr r3, [r7, #4]
800c66a: 2204 movs r2, #4
800c66c: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800c670: 2300 movs r3, #0
}
800c672: 4618 mov r0, r3
800c674: 370c adds r7, #12
800c676: 46bd mov sp, r7
800c678: bc80 pop {r7}
800c67a: 4770 bx lr
0800c67c <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800c67c: b480 push {r7}
800c67e: b083 sub sp, #12
800c680: af00 add r7, sp, #0
800c682: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
800c684: 687b ldr r3, [r7, #4]
800c686: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c68a: 2b04 cmp r3, #4
800c68c: d105 bne.n 800c69a <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800c68e: 687b ldr r3, [r7, #4]
800c690: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
800c694: 687b ldr r3, [r7, #4]
800c696: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800c69a: 2300 movs r3, #0
}
800c69c: 4618 mov r0, r3
800c69e: 370c adds r7, #12
800c6a0: 46bd mov sp, r7
800c6a2: bc80 pop {r7}
800c6a4: 4770 bx lr
0800c6a6 <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800c6a6: b580 push {r7, lr}
800c6a8: b082 sub sp, #8
800c6aa: af00 add r7, sp, #0
800c6ac: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c6ae: 687b ldr r3, [r7, #4]
800c6b0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c6b4: 2b03 cmp r3, #3
800c6b6: d10b bne.n 800c6d0 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800c6b8: 687b ldr r3, [r7, #4]
800c6ba: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c6be: 69db ldr r3, [r3, #28]
800c6c0: 2b00 cmp r3, #0
800c6c2: d005 beq.n 800c6d0 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
800c6c4: 687b ldr r3, [r7, #4]
800c6c6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c6ca: 69db ldr r3, [r3, #28]
800c6cc: 6878 ldr r0, [r7, #4]
800c6ce: 4798 blx r3
}
}
return USBD_OK;
800c6d0: 2300 movs r3, #0
}
800c6d2: 4618 mov r0, r3
800c6d4: 3708 adds r7, #8
800c6d6: 46bd mov sp, r7
800c6d8: bd80 pop {r7, pc}
...
0800c6dc <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c6dc: b580 push {r7, lr}
800c6de: b084 sub sp, #16
800c6e0: af00 add r7, sp, #0
800c6e2: 6078 str r0, [r7, #4]
800c6e4: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800c6e6: 2300 movs r3, #0
800c6e8: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c6ea: 683b ldr r3, [r7, #0]
800c6ec: 781b ldrb r3, [r3, #0]
800c6ee: f003 0360 and.w r3, r3, #96 @ 0x60
800c6f2: 2b40 cmp r3, #64 @ 0x40
800c6f4: d005 beq.n 800c702 <USBD_StdDevReq+0x26>
800c6f6: 2b40 cmp r3, #64 @ 0x40
800c6f8: d84f bhi.n 800c79a <USBD_StdDevReq+0xbe>
800c6fa: 2b00 cmp r3, #0
800c6fc: d009 beq.n 800c712 <USBD_StdDevReq+0x36>
800c6fe: 2b20 cmp r3, #32
800c700: d14b bne.n 800c79a <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800c702: 687b ldr r3, [r7, #4]
800c704: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c708: 689b ldr r3, [r3, #8]
800c70a: 6839 ldr r1, [r7, #0]
800c70c: 6878 ldr r0, [r7, #4]
800c70e: 4798 blx r3
break;
800c710: e048 b.n 800c7a4 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800c712: 683b ldr r3, [r7, #0]
800c714: 785b ldrb r3, [r3, #1]
800c716: 2b09 cmp r3, #9
800c718: d839 bhi.n 800c78e <USBD_StdDevReq+0xb2>
800c71a: a201 add r2, pc, #4 @ (adr r2, 800c720 <USBD_StdDevReq+0x44>)
800c71c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c720: 0800c771 .word 0x0800c771
800c724: 0800c785 .word 0x0800c785
800c728: 0800c78f .word 0x0800c78f
800c72c: 0800c77b .word 0x0800c77b
800c730: 0800c78f .word 0x0800c78f
800c734: 0800c753 .word 0x0800c753
800c738: 0800c749 .word 0x0800c749
800c73c: 0800c78f .word 0x0800c78f
800c740: 0800c767 .word 0x0800c767
800c744: 0800c75d .word 0x0800c75d
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800c748: 6839 ldr r1, [r7, #0]
800c74a: 6878 ldr r0, [r7, #4]
800c74c: f000 f9dc bl 800cb08 <USBD_GetDescriptor>
break;
800c750: e022 b.n 800c798 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800c752: 6839 ldr r1, [r7, #0]
800c754: 6878 ldr r0, [r7, #4]
800c756: f000 fb3f bl 800cdd8 <USBD_SetAddress>
break;
800c75a: e01d b.n 800c798 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
800c75c: 6839 ldr r1, [r7, #0]
800c75e: 6878 ldr r0, [r7, #4]
800c760: f000 fb7e bl 800ce60 <USBD_SetConfig>
break;
800c764: e018 b.n 800c798 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800c766: 6839 ldr r1, [r7, #0]
800c768: 6878 ldr r0, [r7, #4]
800c76a: f000 fc07 bl 800cf7c <USBD_GetConfig>
break;
800c76e: e013 b.n 800c798 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800c770: 6839 ldr r1, [r7, #0]
800c772: 6878 ldr r0, [r7, #4]
800c774: f000 fc37 bl 800cfe6 <USBD_GetStatus>
break;
800c778: e00e b.n 800c798 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800c77a: 6839 ldr r1, [r7, #0]
800c77c: 6878 ldr r0, [r7, #4]
800c77e: f000 fc65 bl 800d04c <USBD_SetFeature>
break;
800c782: e009 b.n 800c798 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
800c784: 6839 ldr r1, [r7, #0]
800c786: 6878 ldr r0, [r7, #4]
800c788: f000 fc74 bl 800d074 <USBD_ClrFeature>
break;
800c78c: e004 b.n 800c798 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800c78e: 6839 ldr r1, [r7, #0]
800c790: 6878 ldr r0, [r7, #4]
800c792: f000 fcc9 bl 800d128 <USBD_CtlError>
break;
800c796: bf00 nop
}
break;
800c798: e004 b.n 800c7a4 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800c79a: 6839 ldr r1, [r7, #0]
800c79c: 6878 ldr r0, [r7, #4]
800c79e: f000 fcc3 bl 800d128 <USBD_CtlError>
break;
800c7a2: bf00 nop
}
return ret;
800c7a4: 7bfb ldrb r3, [r7, #15]
}
800c7a6: 4618 mov r0, r3
800c7a8: 3710 adds r7, #16
800c7aa: 46bd mov sp, r7
800c7ac: bd80 pop {r7, pc}
800c7ae: bf00 nop
0800c7b0 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c7b0: b580 push {r7, lr}
800c7b2: b084 sub sp, #16
800c7b4: af00 add r7, sp, #0
800c7b6: 6078 str r0, [r7, #4]
800c7b8: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800c7ba: 2300 movs r3, #0
800c7bc: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c7be: 683b ldr r3, [r7, #0]
800c7c0: 781b ldrb r3, [r3, #0]
800c7c2: f003 0360 and.w r3, r3, #96 @ 0x60
800c7c6: 2b40 cmp r3, #64 @ 0x40
800c7c8: d005 beq.n 800c7d6 <USBD_StdItfReq+0x26>
800c7ca: 2b40 cmp r3, #64 @ 0x40
800c7cc: d82e bhi.n 800c82c <USBD_StdItfReq+0x7c>
800c7ce: 2b00 cmp r3, #0
800c7d0: d001 beq.n 800c7d6 <USBD_StdItfReq+0x26>
800c7d2: 2b20 cmp r3, #32
800c7d4: d12a bne.n 800c82c <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800c7d6: 687b ldr r3, [r7, #4]
800c7d8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c7dc: 3b01 subs r3, #1
800c7de: 2b02 cmp r3, #2
800c7e0: d81d bhi.n 800c81e <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
800c7e2: 683b ldr r3, [r7, #0]
800c7e4: 889b ldrh r3, [r3, #4]
800c7e6: b2db uxtb r3, r3
800c7e8: 2b01 cmp r3, #1
800c7ea: d813 bhi.n 800c814 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800c7ec: 687b ldr r3, [r7, #4]
800c7ee: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c7f2: 689b ldr r3, [r3, #8]
800c7f4: 6839 ldr r1, [r7, #0]
800c7f6: 6878 ldr r0, [r7, #4]
800c7f8: 4798 blx r3
800c7fa: 4603 mov r3, r0
800c7fc: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800c7fe: 683b ldr r3, [r7, #0]
800c800: 88db ldrh r3, [r3, #6]
800c802: 2b00 cmp r3, #0
800c804: d110 bne.n 800c828 <USBD_StdItfReq+0x78>
800c806: 7bfb ldrb r3, [r7, #15]
800c808: 2b00 cmp r3, #0
800c80a: d10d bne.n 800c828 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
800c80c: 6878 ldr r0, [r7, #4]
800c80e: f000 fd53 bl 800d2b8 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800c812: e009 b.n 800c828 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
800c814: 6839 ldr r1, [r7, #0]
800c816: 6878 ldr r0, [r7, #4]
800c818: f000 fc86 bl 800d128 <USBD_CtlError>
break;
800c81c: e004 b.n 800c828 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
800c81e: 6839 ldr r1, [r7, #0]
800c820: 6878 ldr r0, [r7, #4]
800c822: f000 fc81 bl 800d128 <USBD_CtlError>
break;
800c826: e000 b.n 800c82a <USBD_StdItfReq+0x7a>
break;
800c828: bf00 nop
}
break;
800c82a: e004 b.n 800c836 <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
800c82c: 6839 ldr r1, [r7, #0]
800c82e: 6878 ldr r0, [r7, #4]
800c830: f000 fc7a bl 800d128 <USBD_CtlError>
break;
800c834: bf00 nop
}
return USBD_OK;
800c836: 2300 movs r3, #0
}
800c838: 4618 mov r0, r3
800c83a: 3710 adds r7, #16
800c83c: 46bd mov sp, r7
800c83e: bd80 pop {r7, pc}
0800c840 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c840: b580 push {r7, lr}
800c842: b084 sub sp, #16
800c844: af00 add r7, sp, #0
800c846: 6078 str r0, [r7, #4]
800c848: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
800c84a: 2300 movs r3, #0
800c84c: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800c84e: 683b ldr r3, [r7, #0]
800c850: 889b ldrh r3, [r3, #4]
800c852: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c854: 683b ldr r3, [r7, #0]
800c856: 781b ldrb r3, [r3, #0]
800c858: f003 0360 and.w r3, r3, #96 @ 0x60
800c85c: 2b40 cmp r3, #64 @ 0x40
800c85e: d007 beq.n 800c870 <USBD_StdEPReq+0x30>
800c860: 2b40 cmp r3, #64 @ 0x40
800c862: f200 8146 bhi.w 800caf2 <USBD_StdEPReq+0x2b2>
800c866: 2b00 cmp r3, #0
800c868: d00a beq.n 800c880 <USBD_StdEPReq+0x40>
800c86a: 2b20 cmp r3, #32
800c86c: f040 8141 bne.w 800caf2 <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800c870: 687b ldr r3, [r7, #4]
800c872: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c876: 689b ldr r3, [r3, #8]
800c878: 6839 ldr r1, [r7, #0]
800c87a: 6878 ldr r0, [r7, #4]
800c87c: 4798 blx r3
break;
800c87e: e13d b.n 800cafc <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
800c880: 683b ldr r3, [r7, #0]
800c882: 781b ldrb r3, [r3, #0]
800c884: f003 0360 and.w r3, r3, #96 @ 0x60
800c888: 2b20 cmp r3, #32
800c88a: d10a bne.n 800c8a2 <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800c88c: 687b ldr r3, [r7, #4]
800c88e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c892: 689b ldr r3, [r3, #8]
800c894: 6839 ldr r1, [r7, #0]
800c896: 6878 ldr r0, [r7, #4]
800c898: 4798 blx r3
800c89a: 4603 mov r3, r0
800c89c: 73fb strb r3, [r7, #15]
return ret;
800c89e: 7bfb ldrb r3, [r7, #15]
800c8a0: e12d b.n 800cafe <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
800c8a2: 683b ldr r3, [r7, #0]
800c8a4: 785b ldrb r3, [r3, #1]
800c8a6: 2b03 cmp r3, #3
800c8a8: d007 beq.n 800c8ba <USBD_StdEPReq+0x7a>
800c8aa: 2b03 cmp r3, #3
800c8ac: f300 811b bgt.w 800cae6 <USBD_StdEPReq+0x2a6>
800c8b0: 2b00 cmp r3, #0
800c8b2: d072 beq.n 800c99a <USBD_StdEPReq+0x15a>
800c8b4: 2b01 cmp r3, #1
800c8b6: d03a beq.n 800c92e <USBD_StdEPReq+0xee>
800c8b8: e115 b.n 800cae6 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800c8ba: 687b ldr r3, [r7, #4]
800c8bc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c8c0: 2b02 cmp r3, #2
800c8c2: d002 beq.n 800c8ca <USBD_StdEPReq+0x8a>
800c8c4: 2b03 cmp r3, #3
800c8c6: d015 beq.n 800c8f4 <USBD_StdEPReq+0xb4>
800c8c8: e02b b.n 800c922 <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800c8ca: 7bbb ldrb r3, [r7, #14]
800c8cc: 2b00 cmp r3, #0
800c8ce: d00c beq.n 800c8ea <USBD_StdEPReq+0xaa>
800c8d0: 7bbb ldrb r3, [r7, #14]
800c8d2: 2b80 cmp r3, #128 @ 0x80
800c8d4: d009 beq.n 800c8ea <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800c8d6: 7bbb ldrb r3, [r7, #14]
800c8d8: 4619 mov r1, r3
800c8da: 6878 ldr r0, [r7, #4]
800c8dc: f001 f8fe bl 800dadc <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800c8e0: 2180 movs r1, #128 @ 0x80
800c8e2: 6878 ldr r0, [r7, #4]
800c8e4: f001 f8fa bl 800dadc <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800c8e8: e020 b.n 800c92c <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800c8ea: 6839 ldr r1, [r7, #0]
800c8ec: 6878 ldr r0, [r7, #4]
800c8ee: f000 fc1b bl 800d128 <USBD_CtlError>
break;
800c8f2: e01b b.n 800c92c <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800c8f4: 683b ldr r3, [r7, #0]
800c8f6: 885b ldrh r3, [r3, #2]
800c8f8: 2b00 cmp r3, #0
800c8fa: d10e bne.n 800c91a <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
800c8fc: 7bbb ldrb r3, [r7, #14]
800c8fe: 2b00 cmp r3, #0
800c900: d00b beq.n 800c91a <USBD_StdEPReq+0xda>
800c902: 7bbb ldrb r3, [r7, #14]
800c904: 2b80 cmp r3, #128 @ 0x80
800c906: d008 beq.n 800c91a <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800c908: 683b ldr r3, [r7, #0]
800c90a: 88db ldrh r3, [r3, #6]
800c90c: 2b00 cmp r3, #0
800c90e: d104 bne.n 800c91a <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
800c910: 7bbb ldrb r3, [r7, #14]
800c912: 4619 mov r1, r3
800c914: 6878 ldr r0, [r7, #4]
800c916: f001 f8e1 bl 800dadc <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800c91a: 6878 ldr r0, [r7, #4]
800c91c: f000 fccc bl 800d2b8 <USBD_CtlSendStatus>
break;
800c920: e004 b.n 800c92c <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
800c922: 6839 ldr r1, [r7, #0]
800c924: 6878 ldr r0, [r7, #4]
800c926: f000 fbff bl 800d128 <USBD_CtlError>
break;
800c92a: bf00 nop
}
break;
800c92c: e0e0 b.n 800caf0 <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800c92e: 687b ldr r3, [r7, #4]
800c930: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c934: 2b02 cmp r3, #2
800c936: d002 beq.n 800c93e <USBD_StdEPReq+0xfe>
800c938: 2b03 cmp r3, #3
800c93a: d015 beq.n 800c968 <USBD_StdEPReq+0x128>
800c93c: e026 b.n 800c98c <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800c93e: 7bbb ldrb r3, [r7, #14]
800c940: 2b00 cmp r3, #0
800c942: d00c beq.n 800c95e <USBD_StdEPReq+0x11e>
800c944: 7bbb ldrb r3, [r7, #14]
800c946: 2b80 cmp r3, #128 @ 0x80
800c948: d009 beq.n 800c95e <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
800c94a: 7bbb ldrb r3, [r7, #14]
800c94c: 4619 mov r1, r3
800c94e: 6878 ldr r0, [r7, #4]
800c950: f001 f8c4 bl 800dadc <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800c954: 2180 movs r1, #128 @ 0x80
800c956: 6878 ldr r0, [r7, #4]
800c958: f001 f8c0 bl 800dadc <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800c95c: e01c b.n 800c998 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
800c95e: 6839 ldr r1, [r7, #0]
800c960: 6878 ldr r0, [r7, #4]
800c962: f000 fbe1 bl 800d128 <USBD_CtlError>
break;
800c966: e017 b.n 800c998 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800c968: 683b ldr r3, [r7, #0]
800c96a: 885b ldrh r3, [r3, #2]
800c96c: 2b00 cmp r3, #0
800c96e: d112 bne.n 800c996 <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
800c970: 7bbb ldrb r3, [r7, #14]
800c972: f003 037f and.w r3, r3, #127 @ 0x7f
800c976: 2b00 cmp r3, #0
800c978: d004 beq.n 800c984 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
800c97a: 7bbb ldrb r3, [r7, #14]
800c97c: 4619 mov r1, r3
800c97e: 6878 ldr r0, [r7, #4]
800c980: f001 f8cb bl 800db1a <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
800c984: 6878 ldr r0, [r7, #4]
800c986: f000 fc97 bl 800d2b8 <USBD_CtlSendStatus>
}
break;
800c98a: e004 b.n 800c996 <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
800c98c: 6839 ldr r1, [r7, #0]
800c98e: 6878 ldr r0, [r7, #4]
800c990: f000 fbca bl 800d128 <USBD_CtlError>
break;
800c994: e000 b.n 800c998 <USBD_StdEPReq+0x158>
break;
800c996: bf00 nop
}
break;
800c998: e0aa b.n 800caf0 <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800c99a: 687b ldr r3, [r7, #4]
800c99c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c9a0: 2b02 cmp r3, #2
800c9a2: d002 beq.n 800c9aa <USBD_StdEPReq+0x16a>
800c9a4: 2b03 cmp r3, #3
800c9a6: d032 beq.n 800ca0e <USBD_StdEPReq+0x1ce>
800c9a8: e097 b.n 800cada <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800c9aa: 7bbb ldrb r3, [r7, #14]
800c9ac: 2b00 cmp r3, #0
800c9ae: d007 beq.n 800c9c0 <USBD_StdEPReq+0x180>
800c9b0: 7bbb ldrb r3, [r7, #14]
800c9b2: 2b80 cmp r3, #128 @ 0x80
800c9b4: d004 beq.n 800c9c0 <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
800c9b6: 6839 ldr r1, [r7, #0]
800c9b8: 6878 ldr r0, [r7, #4]
800c9ba: f000 fbb5 bl 800d128 <USBD_CtlError>
break;
800c9be: e091 b.n 800cae4 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800c9c0: f997 300e ldrsb.w r3, [r7, #14]
800c9c4: 2b00 cmp r3, #0
800c9c6: da0b bge.n 800c9e0 <USBD_StdEPReq+0x1a0>
800c9c8: 7bbb ldrb r3, [r7, #14]
800c9ca: f003 027f and.w r2, r3, #127 @ 0x7f
800c9ce: 4613 mov r3, r2
800c9d0: 009b lsls r3, r3, #2
800c9d2: 4413 add r3, r2
800c9d4: 009b lsls r3, r3, #2
800c9d6: 3310 adds r3, #16
800c9d8: 687a ldr r2, [r7, #4]
800c9da: 4413 add r3, r2
800c9dc: 3304 adds r3, #4
800c9de: e00b b.n 800c9f8 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
800c9e0: 7bbb ldrb r3, [r7, #14]
800c9e2: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800c9e6: 4613 mov r3, r2
800c9e8: 009b lsls r3, r3, #2
800c9ea: 4413 add r3, r2
800c9ec: 009b lsls r3, r3, #2
800c9ee: f503 73a8 add.w r3, r3, #336 @ 0x150
800c9f2: 687a ldr r2, [r7, #4]
800c9f4: 4413 add r3, r2
800c9f6: 3304 adds r3, #4
800c9f8: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800c9fa: 68bb ldr r3, [r7, #8]
800c9fc: 2200 movs r2, #0
800c9fe: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800ca00: 68bb ldr r3, [r7, #8]
800ca02: 2202 movs r2, #2
800ca04: 4619 mov r1, r3
800ca06: 6878 ldr r0, [r7, #4]
800ca08: f000 fbf8 bl 800d1fc <USBD_CtlSendData>
break;
800ca0c: e06a b.n 800cae4 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800ca0e: f997 300e ldrsb.w r3, [r7, #14]
800ca12: 2b00 cmp r3, #0
800ca14: da11 bge.n 800ca3a <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800ca16: 7bbb ldrb r3, [r7, #14]
800ca18: f003 020f and.w r2, r3, #15
800ca1c: 6879 ldr r1, [r7, #4]
800ca1e: 4613 mov r3, r2
800ca20: 009b lsls r3, r3, #2
800ca22: 4413 add r3, r2
800ca24: 009b lsls r3, r3, #2
800ca26: 440b add r3, r1
800ca28: 3318 adds r3, #24
800ca2a: 681b ldr r3, [r3, #0]
800ca2c: 2b00 cmp r3, #0
800ca2e: d117 bne.n 800ca60 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800ca30: 6839 ldr r1, [r7, #0]
800ca32: 6878 ldr r0, [r7, #4]
800ca34: f000 fb78 bl 800d128 <USBD_CtlError>
break;
800ca38: e054 b.n 800cae4 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800ca3a: 7bbb ldrb r3, [r7, #14]
800ca3c: f003 020f and.w r2, r3, #15
800ca40: 6879 ldr r1, [r7, #4]
800ca42: 4613 mov r3, r2
800ca44: 009b lsls r3, r3, #2
800ca46: 4413 add r3, r2
800ca48: 009b lsls r3, r3, #2
800ca4a: 440b add r3, r1
800ca4c: f503 73ac add.w r3, r3, #344 @ 0x158
800ca50: 681b ldr r3, [r3, #0]
800ca52: 2b00 cmp r3, #0
800ca54: d104 bne.n 800ca60 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800ca56: 6839 ldr r1, [r7, #0]
800ca58: 6878 ldr r0, [r7, #4]
800ca5a: f000 fb65 bl 800d128 <USBD_CtlError>
break;
800ca5e: e041 b.n 800cae4 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800ca60: f997 300e ldrsb.w r3, [r7, #14]
800ca64: 2b00 cmp r3, #0
800ca66: da0b bge.n 800ca80 <USBD_StdEPReq+0x240>
800ca68: 7bbb ldrb r3, [r7, #14]
800ca6a: f003 027f and.w r2, r3, #127 @ 0x7f
800ca6e: 4613 mov r3, r2
800ca70: 009b lsls r3, r3, #2
800ca72: 4413 add r3, r2
800ca74: 009b lsls r3, r3, #2
800ca76: 3310 adds r3, #16
800ca78: 687a ldr r2, [r7, #4]
800ca7a: 4413 add r3, r2
800ca7c: 3304 adds r3, #4
800ca7e: e00b b.n 800ca98 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
800ca80: 7bbb ldrb r3, [r7, #14]
800ca82: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800ca86: 4613 mov r3, r2
800ca88: 009b lsls r3, r3, #2
800ca8a: 4413 add r3, r2
800ca8c: 009b lsls r3, r3, #2
800ca8e: f503 73a8 add.w r3, r3, #336 @ 0x150
800ca92: 687a ldr r2, [r7, #4]
800ca94: 4413 add r3, r2
800ca96: 3304 adds r3, #4
800ca98: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800ca9a: 7bbb ldrb r3, [r7, #14]
800ca9c: 2b00 cmp r3, #0
800ca9e: d002 beq.n 800caa6 <USBD_StdEPReq+0x266>
800caa0: 7bbb ldrb r3, [r7, #14]
800caa2: 2b80 cmp r3, #128 @ 0x80
800caa4: d103 bne.n 800caae <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
800caa6: 68bb ldr r3, [r7, #8]
800caa8: 2200 movs r2, #0
800caaa: 601a str r2, [r3, #0]
800caac: e00e b.n 800cacc <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800caae: 7bbb ldrb r3, [r7, #14]
800cab0: 4619 mov r1, r3
800cab2: 6878 ldr r0, [r7, #4]
800cab4: f001 f850 bl 800db58 <USBD_LL_IsStallEP>
800cab8: 4603 mov r3, r0
800caba: 2b00 cmp r3, #0
800cabc: d003 beq.n 800cac6 <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800cabe: 68bb ldr r3, [r7, #8]
800cac0: 2201 movs r2, #1
800cac2: 601a str r2, [r3, #0]
800cac4: e002 b.n 800cacc <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
800cac6: 68bb ldr r3, [r7, #8]
800cac8: 2200 movs r2, #0
800caca: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800cacc: 68bb ldr r3, [r7, #8]
800cace: 2202 movs r2, #2
800cad0: 4619 mov r1, r3
800cad2: 6878 ldr r0, [r7, #4]
800cad4: f000 fb92 bl 800d1fc <USBD_CtlSendData>
break;
800cad8: e004 b.n 800cae4 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800cada: 6839 ldr r1, [r7, #0]
800cadc: 6878 ldr r0, [r7, #4]
800cade: f000 fb23 bl 800d128 <USBD_CtlError>
break;
800cae2: bf00 nop
}
break;
800cae4: e004 b.n 800caf0 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
800cae6: 6839 ldr r1, [r7, #0]
800cae8: 6878 ldr r0, [r7, #4]
800caea: f000 fb1d bl 800d128 <USBD_CtlError>
break;
800caee: bf00 nop
}
break;
800caf0: e004 b.n 800cafc <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
800caf2: 6839 ldr r1, [r7, #0]
800caf4: 6878 ldr r0, [r7, #4]
800caf6: f000 fb17 bl 800d128 <USBD_CtlError>
break;
800cafa: bf00 nop
}
return ret;
800cafc: 7bfb ldrb r3, [r7, #15]
}
800cafe: 4618 mov r0, r3
800cb00: 3710 adds r7, #16
800cb02: 46bd mov sp, r7
800cb04: bd80 pop {r7, pc}
...
0800cb08 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cb08: b580 push {r7, lr}
800cb0a: b084 sub sp, #16
800cb0c: af00 add r7, sp, #0
800cb0e: 6078 str r0, [r7, #4]
800cb10: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800cb12: 2300 movs r3, #0
800cb14: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800cb16: 2300 movs r3, #0
800cb18: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800cb1a: 2300 movs r3, #0
800cb1c: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
800cb1e: 683b ldr r3, [r7, #0]
800cb20: 885b ldrh r3, [r3, #2]
800cb22: 0a1b lsrs r3, r3, #8
800cb24: b29b uxth r3, r3
800cb26: 3b01 subs r3, #1
800cb28: 2b06 cmp r3, #6
800cb2a: f200 8128 bhi.w 800cd7e <USBD_GetDescriptor+0x276>
800cb2e: a201 add r2, pc, #4 @ (adr r2, 800cb34 <USBD_GetDescriptor+0x2c>)
800cb30: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800cb34: 0800cb51 .word 0x0800cb51
800cb38: 0800cb69 .word 0x0800cb69
800cb3c: 0800cba9 .word 0x0800cba9
800cb40: 0800cd7f .word 0x0800cd7f
800cb44: 0800cd7f .word 0x0800cd7f
800cb48: 0800cd1f .word 0x0800cd1f
800cb4c: 0800cd4b .word 0x0800cd4b
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800cb50: 687b ldr r3, [r7, #4]
800cb52: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cb56: 681b ldr r3, [r3, #0]
800cb58: 687a ldr r2, [r7, #4]
800cb5a: 7c12 ldrb r2, [r2, #16]
800cb5c: f107 0108 add.w r1, r7, #8
800cb60: 4610 mov r0, r2
800cb62: 4798 blx r3
800cb64: 60f8 str r0, [r7, #12]
break;
800cb66: e112 b.n 800cd8e <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800cb68: 687b ldr r3, [r7, #4]
800cb6a: 7c1b ldrb r3, [r3, #16]
800cb6c: 2b00 cmp r3, #0
800cb6e: d10d bne.n 800cb8c <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
800cb70: 687b ldr r3, [r7, #4]
800cb72: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb76: 6a9b ldr r3, [r3, #40] @ 0x28
800cb78: f107 0208 add.w r2, r7, #8
800cb7c: 4610 mov r0, r2
800cb7e: 4798 blx r3
800cb80: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800cb82: 68fb ldr r3, [r7, #12]
800cb84: 3301 adds r3, #1
800cb86: 2202 movs r2, #2
800cb88: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800cb8a: e100 b.n 800cd8e <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
800cb8c: 687b ldr r3, [r7, #4]
800cb8e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb92: 6adb ldr r3, [r3, #44] @ 0x2c
800cb94: f107 0208 add.w r2, r7, #8
800cb98: 4610 mov r0, r2
800cb9a: 4798 blx r3
800cb9c: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800cb9e: 68fb ldr r3, [r7, #12]
800cba0: 3301 adds r3, #1
800cba2: 2202 movs r2, #2
800cba4: 701a strb r2, [r3, #0]
break;
800cba6: e0f2 b.n 800cd8e <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800cba8: 683b ldr r3, [r7, #0]
800cbaa: 885b ldrh r3, [r3, #2]
800cbac: b2db uxtb r3, r3
800cbae: 2b05 cmp r3, #5
800cbb0: f200 80ac bhi.w 800cd0c <USBD_GetDescriptor+0x204>
800cbb4: a201 add r2, pc, #4 @ (adr r2, 800cbbc <USBD_GetDescriptor+0xb4>)
800cbb6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800cbba: bf00 nop
800cbbc: 0800cbd5 .word 0x0800cbd5
800cbc0: 0800cc09 .word 0x0800cc09
800cbc4: 0800cc3d .word 0x0800cc3d
800cbc8: 0800cc71 .word 0x0800cc71
800cbcc: 0800cca5 .word 0x0800cca5
800cbd0: 0800ccd9 .word 0x0800ccd9
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
800cbd4: 687b ldr r3, [r7, #4]
800cbd6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cbda: 685b ldr r3, [r3, #4]
800cbdc: 2b00 cmp r3, #0
800cbde: d00b beq.n 800cbf8 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800cbe0: 687b ldr r3, [r7, #4]
800cbe2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cbe6: 685b ldr r3, [r3, #4]
800cbe8: 687a ldr r2, [r7, #4]
800cbea: 7c12 ldrb r2, [r2, #16]
800cbec: f107 0108 add.w r1, r7, #8
800cbf0: 4610 mov r0, r2
800cbf2: 4798 blx r3
800cbf4: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cbf6: e091 b.n 800cd1c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800cbf8: 6839 ldr r1, [r7, #0]
800cbfa: 6878 ldr r0, [r7, #4]
800cbfc: f000 fa94 bl 800d128 <USBD_CtlError>
err++;
800cc00: 7afb ldrb r3, [r7, #11]
800cc02: 3301 adds r3, #1
800cc04: 72fb strb r3, [r7, #11]
break;
800cc06: e089 b.n 800cd1c <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800cc08: 687b ldr r3, [r7, #4]
800cc0a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc0e: 689b ldr r3, [r3, #8]
800cc10: 2b00 cmp r3, #0
800cc12: d00b beq.n 800cc2c <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
800cc14: 687b ldr r3, [r7, #4]
800cc16: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc1a: 689b ldr r3, [r3, #8]
800cc1c: 687a ldr r2, [r7, #4]
800cc1e: 7c12 ldrb r2, [r2, #16]
800cc20: f107 0108 add.w r1, r7, #8
800cc24: 4610 mov r0, r2
800cc26: 4798 blx r3
800cc28: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cc2a: e077 b.n 800cd1c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800cc2c: 6839 ldr r1, [r7, #0]
800cc2e: 6878 ldr r0, [r7, #4]
800cc30: f000 fa7a bl 800d128 <USBD_CtlError>
err++;
800cc34: 7afb ldrb r3, [r7, #11]
800cc36: 3301 adds r3, #1
800cc38: 72fb strb r3, [r7, #11]
break;
800cc3a: e06f b.n 800cd1c <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
800cc3c: 687b ldr r3, [r7, #4]
800cc3e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc42: 68db ldr r3, [r3, #12]
800cc44: 2b00 cmp r3, #0
800cc46: d00b beq.n 800cc60 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
800cc48: 687b ldr r3, [r7, #4]
800cc4a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc4e: 68db ldr r3, [r3, #12]
800cc50: 687a ldr r2, [r7, #4]
800cc52: 7c12 ldrb r2, [r2, #16]
800cc54: f107 0108 add.w r1, r7, #8
800cc58: 4610 mov r0, r2
800cc5a: 4798 blx r3
800cc5c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cc5e: e05d b.n 800cd1c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800cc60: 6839 ldr r1, [r7, #0]
800cc62: 6878 ldr r0, [r7, #4]
800cc64: f000 fa60 bl 800d128 <USBD_CtlError>
err++;
800cc68: 7afb ldrb r3, [r7, #11]
800cc6a: 3301 adds r3, #1
800cc6c: 72fb strb r3, [r7, #11]
break;
800cc6e: e055 b.n 800cd1c <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800cc70: 687b ldr r3, [r7, #4]
800cc72: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc76: 691b ldr r3, [r3, #16]
800cc78: 2b00 cmp r3, #0
800cc7a: d00b beq.n 800cc94 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800cc7c: 687b ldr r3, [r7, #4]
800cc7e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800cc82: 691b ldr r3, [r3, #16]
800cc84: 687a ldr r2, [r7, #4]
800cc86: 7c12 ldrb r2, [r2, #16]
800cc88: f107 0108 add.w r1, r7, #8
800cc8c: 4610 mov r0, r2
800cc8e: 4798 blx r3
800cc90: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cc92: e043 b.n 800cd1c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800cc94: 6839 ldr r1, [r7, #0]
800cc96: 6878 ldr r0, [r7, #4]
800cc98: f000 fa46 bl 800d128 <USBD_CtlError>
err++;
800cc9c: 7afb ldrb r3, [r7, #11]
800cc9e: 3301 adds r3, #1
800cca0: 72fb strb r3, [r7, #11]
break;
800cca2: e03b b.n 800cd1c <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800cca4: 687b ldr r3, [r7, #4]
800cca6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800ccaa: 695b ldr r3, [r3, #20]
800ccac: 2b00 cmp r3, #0
800ccae: d00b beq.n 800ccc8 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800ccb0: 687b ldr r3, [r7, #4]
800ccb2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800ccb6: 695b ldr r3, [r3, #20]
800ccb8: 687a ldr r2, [r7, #4]
800ccba: 7c12 ldrb r2, [r2, #16]
800ccbc: f107 0108 add.w r1, r7, #8
800ccc0: 4610 mov r0, r2
800ccc2: 4798 blx r3
800ccc4: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800ccc6: e029 b.n 800cd1c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800ccc8: 6839 ldr r1, [r7, #0]
800ccca: 6878 ldr r0, [r7, #4]
800cccc: f000 fa2c bl 800d128 <USBD_CtlError>
err++;
800ccd0: 7afb ldrb r3, [r7, #11]
800ccd2: 3301 adds r3, #1
800ccd4: 72fb strb r3, [r7, #11]
break;
800ccd6: e021 b.n 800cd1c <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800ccd8: 687b ldr r3, [r7, #4]
800ccda: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800ccde: 699b ldr r3, [r3, #24]
800cce0: 2b00 cmp r3, #0
800cce2: d00b beq.n 800ccfc <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800cce4: 687b ldr r3, [r7, #4]
800cce6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800ccea: 699b ldr r3, [r3, #24]
800ccec: 687a ldr r2, [r7, #4]
800ccee: 7c12 ldrb r2, [r2, #16]
800ccf0: f107 0108 add.w r1, r7, #8
800ccf4: 4610 mov r0, r2
800ccf6: 4798 blx r3
800ccf8: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800ccfa: e00f b.n 800cd1c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800ccfc: 6839 ldr r1, [r7, #0]
800ccfe: 6878 ldr r0, [r7, #4]
800cd00: f000 fa12 bl 800d128 <USBD_CtlError>
err++;
800cd04: 7afb ldrb r3, [r7, #11]
800cd06: 3301 adds r3, #1
800cd08: 72fb strb r3, [r7, #11]
break;
800cd0a: e007 b.n 800cd1c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
800cd0c: 6839 ldr r1, [r7, #0]
800cd0e: 6878 ldr r0, [r7, #4]
800cd10: f000 fa0a bl 800d128 <USBD_CtlError>
err++;
800cd14: 7afb ldrb r3, [r7, #11]
800cd16: 3301 adds r3, #1
800cd18: 72fb strb r3, [r7, #11]
#endif
}
break;
800cd1a: e038 b.n 800cd8e <USBD_GetDescriptor+0x286>
800cd1c: e037 b.n 800cd8e <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800cd1e: 687b ldr r3, [r7, #4]
800cd20: 7c1b ldrb r3, [r3, #16]
800cd22: 2b00 cmp r3, #0
800cd24: d109 bne.n 800cd3a <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800cd26: 687b ldr r3, [r7, #4]
800cd28: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd2c: 6b5b ldr r3, [r3, #52] @ 0x34
800cd2e: f107 0208 add.w r2, r7, #8
800cd32: 4610 mov r0, r2
800cd34: 4798 blx r3
800cd36: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cd38: e029 b.n 800cd8e <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800cd3a: 6839 ldr r1, [r7, #0]
800cd3c: 6878 ldr r0, [r7, #4]
800cd3e: f000 f9f3 bl 800d128 <USBD_CtlError>
err++;
800cd42: 7afb ldrb r3, [r7, #11]
800cd44: 3301 adds r3, #1
800cd46: 72fb strb r3, [r7, #11]
break;
800cd48: e021 b.n 800cd8e <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800cd4a: 687b ldr r3, [r7, #4]
800cd4c: 7c1b ldrb r3, [r3, #16]
800cd4e: 2b00 cmp r3, #0
800cd50: d10d bne.n 800cd6e <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
800cd52: 687b ldr r3, [r7, #4]
800cd54: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cd58: 6b1b ldr r3, [r3, #48] @ 0x30
800cd5a: f107 0208 add.w r2, r7, #8
800cd5e: 4610 mov r0, r2
800cd60: 4798 blx r3
800cd62: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
800cd64: 68fb ldr r3, [r7, #12]
800cd66: 3301 adds r3, #1
800cd68: 2207 movs r2, #7
800cd6a: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800cd6c: e00f b.n 800cd8e <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800cd6e: 6839 ldr r1, [r7, #0]
800cd70: 6878 ldr r0, [r7, #4]
800cd72: f000 f9d9 bl 800d128 <USBD_CtlError>
err++;
800cd76: 7afb ldrb r3, [r7, #11]
800cd78: 3301 adds r3, #1
800cd7a: 72fb strb r3, [r7, #11]
break;
800cd7c: e007 b.n 800cd8e <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800cd7e: 6839 ldr r1, [r7, #0]
800cd80: 6878 ldr r0, [r7, #4]
800cd82: f000 f9d1 bl 800d128 <USBD_CtlError>
err++;
800cd86: 7afb ldrb r3, [r7, #11]
800cd88: 3301 adds r3, #1
800cd8a: 72fb strb r3, [r7, #11]
break;
800cd8c: bf00 nop
}
if (err != 0U)
800cd8e: 7afb ldrb r3, [r7, #11]
800cd90: 2b00 cmp r3, #0
800cd92: d11c bne.n 800cdce <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
800cd94: 893b ldrh r3, [r7, #8]
800cd96: 2b00 cmp r3, #0
800cd98: d011 beq.n 800cdbe <USBD_GetDescriptor+0x2b6>
800cd9a: 683b ldr r3, [r7, #0]
800cd9c: 88db ldrh r3, [r3, #6]
800cd9e: 2b00 cmp r3, #0
800cda0: d00d beq.n 800cdbe <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800cda2: 683b ldr r3, [r7, #0]
800cda4: 88da ldrh r2, [r3, #6]
800cda6: 893b ldrh r3, [r7, #8]
800cda8: 4293 cmp r3, r2
800cdaa: bf28 it cs
800cdac: 4613 movcs r3, r2
800cdae: b29b uxth r3, r3
800cdb0: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800cdb2: 893b ldrh r3, [r7, #8]
800cdb4: 461a mov r2, r3
800cdb6: 68f9 ldr r1, [r7, #12]
800cdb8: 6878 ldr r0, [r7, #4]
800cdba: f000 fa1f bl 800d1fc <USBD_CtlSendData>
}
if (req->wLength == 0U)
800cdbe: 683b ldr r3, [r7, #0]
800cdc0: 88db ldrh r3, [r3, #6]
800cdc2: 2b00 cmp r3, #0
800cdc4: d104 bne.n 800cdd0 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800cdc6: 6878 ldr r0, [r7, #4]
800cdc8: f000 fa76 bl 800d2b8 <USBD_CtlSendStatus>
800cdcc: e000 b.n 800cdd0 <USBD_GetDescriptor+0x2c8>
return;
800cdce: bf00 nop
}
}
}
800cdd0: 3710 adds r7, #16
800cdd2: 46bd mov sp, r7
800cdd4: bd80 pop {r7, pc}
800cdd6: bf00 nop
0800cdd8 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cdd8: b580 push {r7, lr}
800cdda: b084 sub sp, #16
800cddc: af00 add r7, sp, #0
800cdde: 6078 str r0, [r7, #4]
800cde0: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800cde2: 683b ldr r3, [r7, #0]
800cde4: 889b ldrh r3, [r3, #4]
800cde6: 2b00 cmp r3, #0
800cde8: d130 bne.n 800ce4c <USBD_SetAddress+0x74>
800cdea: 683b ldr r3, [r7, #0]
800cdec: 88db ldrh r3, [r3, #6]
800cdee: 2b00 cmp r3, #0
800cdf0: d12c bne.n 800ce4c <USBD_SetAddress+0x74>
800cdf2: 683b ldr r3, [r7, #0]
800cdf4: 885b ldrh r3, [r3, #2]
800cdf6: 2b7f cmp r3, #127 @ 0x7f
800cdf8: d828 bhi.n 800ce4c <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800cdfa: 683b ldr r3, [r7, #0]
800cdfc: 885b ldrh r3, [r3, #2]
800cdfe: b2db uxtb r3, r3
800ce00: f003 037f and.w r3, r3, #127 @ 0x7f
800ce04: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800ce06: 687b ldr r3, [r7, #4]
800ce08: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800ce0c: 2b03 cmp r3, #3
800ce0e: d104 bne.n 800ce1a <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
800ce10: 6839 ldr r1, [r7, #0]
800ce12: 6878 ldr r0, [r7, #4]
800ce14: f000 f988 bl 800d128 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800ce18: e01d b.n 800ce56 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800ce1a: 687b ldr r3, [r7, #4]
800ce1c: 7bfa ldrb r2, [r7, #15]
800ce1e: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
800ce22: 7bfb ldrb r3, [r7, #15]
800ce24: 4619 mov r1, r3
800ce26: 6878 ldr r0, [r7, #4]
800ce28: f000 fec1 bl 800dbae <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
800ce2c: 6878 ldr r0, [r7, #4]
800ce2e: f000 fa43 bl 800d2b8 <USBD_CtlSendStatus>
if (dev_addr != 0U)
800ce32: 7bfb ldrb r3, [r7, #15]
800ce34: 2b00 cmp r3, #0
800ce36: d004 beq.n 800ce42 <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800ce38: 687b ldr r3, [r7, #4]
800ce3a: 2202 movs r2, #2
800ce3c: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800ce40: e009 b.n 800ce56 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800ce42: 687b ldr r3, [r7, #4]
800ce44: 2201 movs r2, #1
800ce46: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800ce4a: e004 b.n 800ce56 <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
800ce4c: 6839 ldr r1, [r7, #0]
800ce4e: 6878 ldr r0, [r7, #4]
800ce50: f000 f96a bl 800d128 <USBD_CtlError>
}
}
800ce54: bf00 nop
800ce56: bf00 nop
800ce58: 3710 adds r7, #16
800ce5a: 46bd mov sp, r7
800ce5c: bd80 pop {r7, pc}
...
0800ce60 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800ce60: b580 push {r7, lr}
800ce62: b082 sub sp, #8
800ce64: af00 add r7, sp, #0
800ce66: 6078 str r0, [r7, #4]
800ce68: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800ce6a: 683b ldr r3, [r7, #0]
800ce6c: 885b ldrh r3, [r3, #2]
800ce6e: b2da uxtb r2, r3
800ce70: 4b41 ldr r3, [pc, #260] @ (800cf78 <USBD_SetConfig+0x118>)
800ce72: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800ce74: 4b40 ldr r3, [pc, #256] @ (800cf78 <USBD_SetConfig+0x118>)
800ce76: 781b ldrb r3, [r3, #0]
800ce78: 2b01 cmp r3, #1
800ce7a: d904 bls.n 800ce86 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
800ce7c: 6839 ldr r1, [r7, #0]
800ce7e: 6878 ldr r0, [r7, #4]
800ce80: f000 f952 bl 800d128 <USBD_CtlError>
800ce84: e075 b.n 800cf72 <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800ce86: 687b ldr r3, [r7, #4]
800ce88: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800ce8c: 2b02 cmp r3, #2
800ce8e: d002 beq.n 800ce96 <USBD_SetConfig+0x36>
800ce90: 2b03 cmp r3, #3
800ce92: d023 beq.n 800cedc <USBD_SetConfig+0x7c>
800ce94: e062 b.n 800cf5c <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800ce96: 4b38 ldr r3, [pc, #224] @ (800cf78 <USBD_SetConfig+0x118>)
800ce98: 781b ldrb r3, [r3, #0]
800ce9a: 2b00 cmp r3, #0
800ce9c: d01a beq.n 800ced4 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800ce9e: 4b36 ldr r3, [pc, #216] @ (800cf78 <USBD_SetConfig+0x118>)
800cea0: 781b ldrb r3, [r3, #0]
800cea2: 461a mov r2, r3
800cea4: 687b ldr r3, [r7, #4]
800cea6: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800cea8: 687b ldr r3, [r7, #4]
800ceaa: 2203 movs r2, #3
800ceac: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800ceb0: 4b31 ldr r3, [pc, #196] @ (800cf78 <USBD_SetConfig+0x118>)
800ceb2: 781b ldrb r3, [r3, #0]
800ceb4: 4619 mov r1, r3
800ceb6: 6878 ldr r0, [r7, #4]
800ceb8: f7ff f9e7 bl 800c28a <USBD_SetClassConfig>
800cebc: 4603 mov r3, r0
800cebe: 2b02 cmp r3, #2
800cec0: d104 bne.n 800cecc <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800cec2: 6839 ldr r1, [r7, #0]
800cec4: 6878 ldr r0, [r7, #4]
800cec6: f000 f92f bl 800d128 <USBD_CtlError>
return;
800ceca: e052 b.n 800cf72 <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800cecc: 6878 ldr r0, [r7, #4]
800cece: f000 f9f3 bl 800d2b8 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800ced2: e04e b.n 800cf72 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800ced4: 6878 ldr r0, [r7, #4]
800ced6: f000 f9ef bl 800d2b8 <USBD_CtlSendStatus>
break;
800ceda: e04a b.n 800cf72 <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800cedc: 4b26 ldr r3, [pc, #152] @ (800cf78 <USBD_SetConfig+0x118>)
800cede: 781b ldrb r3, [r3, #0]
800cee0: 2b00 cmp r3, #0
800cee2: d112 bne.n 800cf0a <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800cee4: 687b ldr r3, [r7, #4]
800cee6: 2202 movs r2, #2
800cee8: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800ceec: 4b22 ldr r3, [pc, #136] @ (800cf78 <USBD_SetConfig+0x118>)
800ceee: 781b ldrb r3, [r3, #0]
800cef0: 461a mov r2, r3
800cef2: 687b ldr r3, [r7, #4]
800cef4: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800cef6: 4b20 ldr r3, [pc, #128] @ (800cf78 <USBD_SetConfig+0x118>)
800cef8: 781b ldrb r3, [r3, #0]
800cefa: 4619 mov r1, r3
800cefc: 6878 ldr r0, [r7, #4]
800cefe: f7ff f9e3 bl 800c2c8 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
800cf02: 6878 ldr r0, [r7, #4]
800cf04: f000 f9d8 bl 800d2b8 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800cf08: e033 b.n 800cf72 <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800cf0a: 4b1b ldr r3, [pc, #108] @ (800cf78 <USBD_SetConfig+0x118>)
800cf0c: 781b ldrb r3, [r3, #0]
800cf0e: 461a mov r2, r3
800cf10: 687b ldr r3, [r7, #4]
800cf12: 685b ldr r3, [r3, #4]
800cf14: 429a cmp r2, r3
800cf16: d01d beq.n 800cf54 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800cf18: 687b ldr r3, [r7, #4]
800cf1a: 685b ldr r3, [r3, #4]
800cf1c: b2db uxtb r3, r3
800cf1e: 4619 mov r1, r3
800cf20: 6878 ldr r0, [r7, #4]
800cf22: f7ff f9d1 bl 800c2c8 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800cf26: 4b14 ldr r3, [pc, #80] @ (800cf78 <USBD_SetConfig+0x118>)
800cf28: 781b ldrb r3, [r3, #0]
800cf2a: 461a mov r2, r3
800cf2c: 687b ldr r3, [r7, #4]
800cf2e: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800cf30: 4b11 ldr r3, [pc, #68] @ (800cf78 <USBD_SetConfig+0x118>)
800cf32: 781b ldrb r3, [r3, #0]
800cf34: 4619 mov r1, r3
800cf36: 6878 ldr r0, [r7, #4]
800cf38: f7ff f9a7 bl 800c28a <USBD_SetClassConfig>
800cf3c: 4603 mov r3, r0
800cf3e: 2b02 cmp r3, #2
800cf40: d104 bne.n 800cf4c <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
800cf42: 6839 ldr r1, [r7, #0]
800cf44: 6878 ldr r0, [r7, #4]
800cf46: f000 f8ef bl 800d128 <USBD_CtlError>
return;
800cf4a: e012 b.n 800cf72 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800cf4c: 6878 ldr r0, [r7, #4]
800cf4e: f000 f9b3 bl 800d2b8 <USBD_CtlSendStatus>
break;
800cf52: e00e b.n 800cf72 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800cf54: 6878 ldr r0, [r7, #4]
800cf56: f000 f9af bl 800d2b8 <USBD_CtlSendStatus>
break;
800cf5a: e00a b.n 800cf72 <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
800cf5c: 6839 ldr r1, [r7, #0]
800cf5e: 6878 ldr r0, [r7, #4]
800cf60: f000 f8e2 bl 800d128 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
800cf64: 4b04 ldr r3, [pc, #16] @ (800cf78 <USBD_SetConfig+0x118>)
800cf66: 781b ldrb r3, [r3, #0]
800cf68: 4619 mov r1, r3
800cf6a: 6878 ldr r0, [r7, #4]
800cf6c: f7ff f9ac bl 800c2c8 <USBD_ClrClassConfig>
break;
800cf70: bf00 nop
}
}
}
800cf72: 3708 adds r7, #8
800cf74: 46bd mov sp, r7
800cf76: bd80 pop {r7, pc}
800cf78: 20000490 .word 0x20000490
0800cf7c <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800cf7c: b580 push {r7, lr}
800cf7e: b082 sub sp, #8
800cf80: af00 add r7, sp, #0
800cf82: 6078 str r0, [r7, #4]
800cf84: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800cf86: 683b ldr r3, [r7, #0]
800cf88: 88db ldrh r3, [r3, #6]
800cf8a: 2b01 cmp r3, #1
800cf8c: d004 beq.n 800cf98 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800cf8e: 6839 ldr r1, [r7, #0]
800cf90: 6878 ldr r0, [r7, #4]
800cf92: f000 f8c9 bl 800d128 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800cf96: e022 b.n 800cfde <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800cf98: 687b ldr r3, [r7, #4]
800cf9a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cf9e: 2b02 cmp r3, #2
800cfa0: dc02 bgt.n 800cfa8 <USBD_GetConfig+0x2c>
800cfa2: 2b00 cmp r3, #0
800cfa4: dc03 bgt.n 800cfae <USBD_GetConfig+0x32>
800cfa6: e015 b.n 800cfd4 <USBD_GetConfig+0x58>
800cfa8: 2b03 cmp r3, #3
800cfaa: d00b beq.n 800cfc4 <USBD_GetConfig+0x48>
800cfac: e012 b.n 800cfd4 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800cfae: 687b ldr r3, [r7, #4]
800cfb0: 2200 movs r2, #0
800cfb2: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
800cfb4: 687b ldr r3, [r7, #4]
800cfb6: 3308 adds r3, #8
800cfb8: 2201 movs r2, #1
800cfba: 4619 mov r1, r3
800cfbc: 6878 ldr r0, [r7, #4]
800cfbe: f000 f91d bl 800d1fc <USBD_CtlSendData>
break;
800cfc2: e00c b.n 800cfde <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
800cfc4: 687b ldr r3, [r7, #4]
800cfc6: 3304 adds r3, #4
800cfc8: 2201 movs r2, #1
800cfca: 4619 mov r1, r3
800cfcc: 6878 ldr r0, [r7, #4]
800cfce: f000 f915 bl 800d1fc <USBD_CtlSendData>
break;
800cfd2: e004 b.n 800cfde <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
800cfd4: 6839 ldr r1, [r7, #0]
800cfd6: 6878 ldr r0, [r7, #4]
800cfd8: f000 f8a6 bl 800d128 <USBD_CtlError>
break;
800cfdc: bf00 nop
}
800cfde: bf00 nop
800cfe0: 3708 adds r7, #8
800cfe2: 46bd mov sp, r7
800cfe4: bd80 pop {r7, pc}
0800cfe6 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800cfe6: b580 push {r7, lr}
800cfe8: b082 sub sp, #8
800cfea: af00 add r7, sp, #0
800cfec: 6078 str r0, [r7, #4]
800cfee: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800cff0: 687b ldr r3, [r7, #4]
800cff2: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cff6: 3b01 subs r3, #1
800cff8: 2b02 cmp r3, #2
800cffa: d81e bhi.n 800d03a <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800cffc: 683b ldr r3, [r7, #0]
800cffe: 88db ldrh r3, [r3, #6]
800d000: 2b02 cmp r3, #2
800d002: d004 beq.n 800d00e <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
800d004: 6839 ldr r1, [r7, #0]
800d006: 6878 ldr r0, [r7, #4]
800d008: f000 f88e bl 800d128 <USBD_CtlError>
break;
800d00c: e01a b.n 800d044 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800d00e: 687b ldr r3, [r7, #4]
800d010: 2201 movs r2, #1
800d012: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
800d014: 687b ldr r3, [r7, #4]
800d016: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800d01a: 2b00 cmp r3, #0
800d01c: d005 beq.n 800d02a <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800d01e: 687b ldr r3, [r7, #4]
800d020: 68db ldr r3, [r3, #12]
800d022: f043 0202 orr.w r2, r3, #2
800d026: 687b ldr r3, [r7, #4]
800d028: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800d02a: 687b ldr r3, [r7, #4]
800d02c: 330c adds r3, #12
800d02e: 2202 movs r2, #2
800d030: 4619 mov r1, r3
800d032: 6878 ldr r0, [r7, #4]
800d034: f000 f8e2 bl 800d1fc <USBD_CtlSendData>
break;
800d038: e004 b.n 800d044 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800d03a: 6839 ldr r1, [r7, #0]
800d03c: 6878 ldr r0, [r7, #4]
800d03e: f000 f873 bl 800d128 <USBD_CtlError>
break;
800d042: bf00 nop
}
}
800d044: bf00 nop
800d046: 3708 adds r7, #8
800d048: 46bd mov sp, r7
800d04a: bd80 pop {r7, pc}
0800d04c <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d04c: b580 push {r7, lr}
800d04e: b082 sub sp, #8
800d050: af00 add r7, sp, #0
800d052: 6078 str r0, [r7, #4]
800d054: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d056: 683b ldr r3, [r7, #0]
800d058: 885b ldrh r3, [r3, #2]
800d05a: 2b01 cmp r3, #1
800d05c: d106 bne.n 800d06c <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
800d05e: 687b ldr r3, [r7, #4]
800d060: 2201 movs r2, #1
800d062: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d066: 6878 ldr r0, [r7, #4]
800d068: f000 f926 bl 800d2b8 <USBD_CtlSendStatus>
}
}
800d06c: bf00 nop
800d06e: 3708 adds r7, #8
800d070: 46bd mov sp, r7
800d072: bd80 pop {r7, pc}
0800d074 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d074: b580 push {r7, lr}
800d076: b082 sub sp, #8
800d078: af00 add r7, sp, #0
800d07a: 6078 str r0, [r7, #4]
800d07c: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d07e: 687b ldr r3, [r7, #4]
800d080: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d084: 3b01 subs r3, #1
800d086: 2b02 cmp r3, #2
800d088: d80b bhi.n 800d0a2 <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d08a: 683b ldr r3, [r7, #0]
800d08c: 885b ldrh r3, [r3, #2]
800d08e: 2b01 cmp r3, #1
800d090: d10c bne.n 800d0ac <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
800d092: 687b ldr r3, [r7, #4]
800d094: 2200 movs r2, #0
800d096: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d09a: 6878 ldr r0, [r7, #4]
800d09c: f000 f90c bl 800d2b8 <USBD_CtlSendStatus>
}
break;
800d0a0: e004 b.n 800d0ac <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
800d0a2: 6839 ldr r1, [r7, #0]
800d0a4: 6878 ldr r0, [r7, #4]
800d0a6: f000 f83f bl 800d128 <USBD_CtlError>
break;
800d0aa: e000 b.n 800d0ae <USBD_ClrFeature+0x3a>
break;
800d0ac: bf00 nop
}
}
800d0ae: bf00 nop
800d0b0: 3708 adds r7, #8
800d0b2: 46bd mov sp, r7
800d0b4: bd80 pop {r7, pc}
0800d0b6 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800d0b6: b480 push {r7}
800d0b8: b083 sub sp, #12
800d0ba: af00 add r7, sp, #0
800d0bc: 6078 str r0, [r7, #4]
800d0be: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
800d0c0: 683b ldr r3, [r7, #0]
800d0c2: 781a ldrb r2, [r3, #0]
800d0c4: 687b ldr r3, [r7, #4]
800d0c6: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800d0c8: 683b ldr r3, [r7, #0]
800d0ca: 785a ldrb r2, [r3, #1]
800d0cc: 687b ldr r3, [r7, #4]
800d0ce: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
800d0d0: 683b ldr r3, [r7, #0]
800d0d2: 3302 adds r3, #2
800d0d4: 781b ldrb r3, [r3, #0]
800d0d6: 461a mov r2, r3
800d0d8: 683b ldr r3, [r7, #0]
800d0da: 3303 adds r3, #3
800d0dc: 781b ldrb r3, [r3, #0]
800d0de: 021b lsls r3, r3, #8
800d0e0: b29b uxth r3, r3
800d0e2: 4413 add r3, r2
800d0e4: b29a uxth r2, r3
800d0e6: 687b ldr r3, [r7, #4]
800d0e8: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800d0ea: 683b ldr r3, [r7, #0]
800d0ec: 3304 adds r3, #4
800d0ee: 781b ldrb r3, [r3, #0]
800d0f0: 461a mov r2, r3
800d0f2: 683b ldr r3, [r7, #0]
800d0f4: 3305 adds r3, #5
800d0f6: 781b ldrb r3, [r3, #0]
800d0f8: 021b lsls r3, r3, #8
800d0fa: b29b uxth r3, r3
800d0fc: 4413 add r3, r2
800d0fe: b29a uxth r2, r3
800d100: 687b ldr r3, [r7, #4]
800d102: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
800d104: 683b ldr r3, [r7, #0]
800d106: 3306 adds r3, #6
800d108: 781b ldrb r3, [r3, #0]
800d10a: 461a mov r2, r3
800d10c: 683b ldr r3, [r7, #0]
800d10e: 3307 adds r3, #7
800d110: 781b ldrb r3, [r3, #0]
800d112: 021b lsls r3, r3, #8
800d114: b29b uxth r3, r3
800d116: 4413 add r3, r2
800d118: b29a uxth r2, r3
800d11a: 687b ldr r3, [r7, #4]
800d11c: 80da strh r2, [r3, #6]
}
800d11e: bf00 nop
800d120: 370c adds r7, #12
800d122: 46bd mov sp, r7
800d124: bc80 pop {r7}
800d126: 4770 bx lr
0800d128 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d128: b580 push {r7, lr}
800d12a: b082 sub sp, #8
800d12c: af00 add r7, sp, #0
800d12e: 6078 str r0, [r7, #4]
800d130: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
800d132: 2180 movs r1, #128 @ 0x80
800d134: 6878 ldr r0, [r7, #4]
800d136: f000 fcd1 bl 800dadc <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
800d13a: 2100 movs r1, #0
800d13c: 6878 ldr r0, [r7, #4]
800d13e: f000 fccd bl 800dadc <USBD_LL_StallEP>
}
800d142: bf00 nop
800d144: 3708 adds r7, #8
800d146: 46bd mov sp, r7
800d148: bd80 pop {r7, pc}
0800d14a <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800d14a: b580 push {r7, lr}
800d14c: b086 sub sp, #24
800d14e: af00 add r7, sp, #0
800d150: 60f8 str r0, [r7, #12]
800d152: 60b9 str r1, [r7, #8]
800d154: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800d156: 2300 movs r3, #0
800d158: 75fb strb r3, [r7, #23]
if (desc != NULL)
800d15a: 68fb ldr r3, [r7, #12]
800d15c: 2b00 cmp r3, #0
800d15e: d032 beq.n 800d1c6 <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
800d160: 68f8 ldr r0, [r7, #12]
800d162: f000 f834 bl 800d1ce <USBD_GetLen>
800d166: 4603 mov r3, r0
800d168: 3301 adds r3, #1
800d16a: b29b uxth r3, r3
800d16c: 005b lsls r3, r3, #1
800d16e: b29a uxth r2, r3
800d170: 687b ldr r3, [r7, #4]
800d172: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
800d174: 7dfb ldrb r3, [r7, #23]
800d176: 1c5a adds r2, r3, #1
800d178: 75fa strb r2, [r7, #23]
800d17a: 461a mov r2, r3
800d17c: 68bb ldr r3, [r7, #8]
800d17e: 4413 add r3, r2
800d180: 687a ldr r2, [r7, #4]
800d182: 7812 ldrb r2, [r2, #0]
800d184: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800d186: 7dfb ldrb r3, [r7, #23]
800d188: 1c5a adds r2, r3, #1
800d18a: 75fa strb r2, [r7, #23]
800d18c: 461a mov r2, r3
800d18e: 68bb ldr r3, [r7, #8]
800d190: 4413 add r3, r2
800d192: 2203 movs r2, #3
800d194: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d196: e012 b.n 800d1be <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
800d198: 68fb ldr r3, [r7, #12]
800d19a: 1c5a adds r2, r3, #1
800d19c: 60fa str r2, [r7, #12]
800d19e: 7dfa ldrb r2, [r7, #23]
800d1a0: 1c51 adds r1, r2, #1
800d1a2: 75f9 strb r1, [r7, #23]
800d1a4: 4611 mov r1, r2
800d1a6: 68ba ldr r2, [r7, #8]
800d1a8: 440a add r2, r1
800d1aa: 781b ldrb r3, [r3, #0]
800d1ac: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
800d1ae: 7dfb ldrb r3, [r7, #23]
800d1b0: 1c5a adds r2, r3, #1
800d1b2: 75fa strb r2, [r7, #23]
800d1b4: 461a mov r2, r3
800d1b6: 68bb ldr r3, [r7, #8]
800d1b8: 4413 add r3, r2
800d1ba: 2200 movs r2, #0
800d1bc: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d1be: 68fb ldr r3, [r7, #12]
800d1c0: 781b ldrb r3, [r3, #0]
800d1c2: 2b00 cmp r3, #0
800d1c4: d1e8 bne.n 800d198 <USBD_GetString+0x4e>
}
}
}
800d1c6: bf00 nop
800d1c8: 3718 adds r7, #24
800d1ca: 46bd mov sp, r7
800d1cc: bd80 pop {r7, pc}
0800d1ce <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800d1ce: b480 push {r7}
800d1d0: b085 sub sp, #20
800d1d2: af00 add r7, sp, #0
800d1d4: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800d1d6: 2300 movs r3, #0
800d1d8: 73fb strb r3, [r7, #15]
while (*buf != '\0')
800d1da: e005 b.n 800d1e8 <USBD_GetLen+0x1a>
{
len++;
800d1dc: 7bfb ldrb r3, [r7, #15]
800d1de: 3301 adds r3, #1
800d1e0: 73fb strb r3, [r7, #15]
buf++;
800d1e2: 687b ldr r3, [r7, #4]
800d1e4: 3301 adds r3, #1
800d1e6: 607b str r3, [r7, #4]
while (*buf != '\0')
800d1e8: 687b ldr r3, [r7, #4]
800d1ea: 781b ldrb r3, [r3, #0]
800d1ec: 2b00 cmp r3, #0
800d1ee: d1f5 bne.n 800d1dc <USBD_GetLen+0xe>
}
return len;
800d1f0: 7bfb ldrb r3, [r7, #15]
}
800d1f2: 4618 mov r0, r3
800d1f4: 3714 adds r7, #20
800d1f6: 46bd mov sp, r7
800d1f8: bc80 pop {r7}
800d1fa: 4770 bx lr
0800d1fc <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d1fc: b580 push {r7, lr}
800d1fe: b084 sub sp, #16
800d200: af00 add r7, sp, #0
800d202: 60f8 str r0, [r7, #12]
800d204: 60b9 str r1, [r7, #8]
800d206: 4613 mov r3, r2
800d208: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
800d20a: 68fb ldr r3, [r7, #12]
800d20c: 2202 movs r2, #2
800d20e: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800d212: 88fa ldrh r2, [r7, #6]
800d214: 68fb ldr r3, [r7, #12]
800d216: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
800d218: 88fa ldrh r2, [r7, #6]
800d21a: 68fb ldr r3, [r7, #12]
800d21c: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d21e: 88fb ldrh r3, [r7, #6]
800d220: 68ba ldr r2, [r7, #8]
800d222: 2100 movs r1, #0
800d224: 68f8 ldr r0, [r7, #12]
800d226: f000 fce1 bl 800dbec <USBD_LL_Transmit>
return USBD_OK;
800d22a: 2300 movs r3, #0
}
800d22c: 4618 mov r0, r3
800d22e: 3710 adds r7, #16
800d230: 46bd mov sp, r7
800d232: bd80 pop {r7, pc}
0800d234 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d234: b580 push {r7, lr}
800d236: b084 sub sp, #16
800d238: af00 add r7, sp, #0
800d23a: 60f8 str r0, [r7, #12]
800d23c: 60b9 str r1, [r7, #8]
800d23e: 4613 mov r3, r2
800d240: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d242: 88fb ldrh r3, [r7, #6]
800d244: 68ba ldr r2, [r7, #8]
800d246: 2100 movs r1, #0
800d248: 68f8 ldr r0, [r7, #12]
800d24a: f000 fccf bl 800dbec <USBD_LL_Transmit>
return USBD_OK;
800d24e: 2300 movs r3, #0
}
800d250: 4618 mov r0, r3
800d252: 3710 adds r7, #16
800d254: 46bd mov sp, r7
800d256: bd80 pop {r7, pc}
0800d258 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d258: b580 push {r7, lr}
800d25a: b084 sub sp, #16
800d25c: af00 add r7, sp, #0
800d25e: 60f8 str r0, [r7, #12]
800d260: 60b9 str r1, [r7, #8]
800d262: 4613 mov r3, r2
800d264: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
800d266: 68fb ldr r3, [r7, #12]
800d268: 2203 movs r2, #3
800d26a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
800d26e: 88fa ldrh r2, [r7, #6]
800d270: 68fb ldr r3, [r7, #12]
800d272: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800d276: 88fa ldrh r2, [r7, #6]
800d278: 68fb ldr r3, [r7, #12]
800d27a: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d27e: 88fb ldrh r3, [r7, #6]
800d280: 68ba ldr r2, [r7, #8]
800d282: 2100 movs r1, #0
800d284: 68f8 ldr r0, [r7, #12]
800d286: f000 fcd4 bl 800dc32 <USBD_LL_PrepareReceive>
return USBD_OK;
800d28a: 2300 movs r3, #0
}
800d28c: 4618 mov r0, r3
800d28e: 3710 adds r7, #16
800d290: 46bd mov sp, r7
800d292: bd80 pop {r7, pc}
0800d294 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d294: b580 push {r7, lr}
800d296: b084 sub sp, #16
800d298: af00 add r7, sp, #0
800d29a: 60f8 str r0, [r7, #12]
800d29c: 60b9 str r1, [r7, #8]
800d29e: 4613 mov r3, r2
800d2a0: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d2a2: 88fb ldrh r3, [r7, #6]
800d2a4: 68ba ldr r2, [r7, #8]
800d2a6: 2100 movs r1, #0
800d2a8: 68f8 ldr r0, [r7, #12]
800d2aa: f000 fcc2 bl 800dc32 <USBD_LL_PrepareReceive>
return USBD_OK;
800d2ae: 2300 movs r3, #0
}
800d2b0: 4618 mov r0, r3
800d2b2: 3710 adds r7, #16
800d2b4: 46bd mov sp, r7
800d2b6: bd80 pop {r7, pc}
0800d2b8 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800d2b8: b580 push {r7, lr}
800d2ba: b082 sub sp, #8
800d2bc: af00 add r7, sp, #0
800d2be: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800d2c0: 687b ldr r3, [r7, #4]
800d2c2: 2204 movs r2, #4
800d2c4: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800d2c8: 2300 movs r3, #0
800d2ca: 2200 movs r2, #0
800d2cc: 2100 movs r1, #0
800d2ce: 6878 ldr r0, [r7, #4]
800d2d0: f000 fc8c bl 800dbec <USBD_LL_Transmit>
return USBD_OK;
800d2d4: 2300 movs r3, #0
}
800d2d6: 4618 mov r0, r3
800d2d8: 3708 adds r7, #8
800d2da: 46bd mov sp, r7
800d2dc: bd80 pop {r7, pc}
0800d2de <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800d2de: b580 push {r7, lr}
800d2e0: b082 sub sp, #8
800d2e2: af00 add r7, sp, #0
800d2e4: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800d2e6: 687b ldr r3, [r7, #4]
800d2e8: 2205 movs r2, #5
800d2ea: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800d2ee: 2300 movs r3, #0
800d2f0: 2200 movs r2, #0
800d2f2: 2100 movs r1, #0
800d2f4: 6878 ldr r0, [r7, #4]
800d2f6: f000 fc9c bl 800dc32 <USBD_LL_PrepareReceive>
return USBD_OK;
800d2fa: 2300 movs r3, #0
}
800d2fc: 4618 mov r0, r3
800d2fe: 3708 adds r7, #8
800d300: 46bd mov sp, r7
800d302: bd80 pop {r7, pc}
0800d304 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800d304: b580 push {r7, lr}
800d306: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
800d308: 2200 movs r2, #0
800d30a: 4912 ldr r1, [pc, #72] @ (800d354 <MX_USB_DEVICE_Init+0x50>)
800d30c: 4812 ldr r0, [pc, #72] @ (800d358 <MX_USB_DEVICE_Init+0x54>)
800d30e: f7fe ff62 bl 800c1d6 <USBD_Init>
800d312: 4603 mov r3, r0
800d314: 2b00 cmp r3, #0
800d316: d001 beq.n 800d31c <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
800d318: f7f5 fe60 bl 8002fdc <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
800d31c: 490f ldr r1, [pc, #60] @ (800d35c <MX_USB_DEVICE_Init+0x58>)
800d31e: 480e ldr r0, [pc, #56] @ (800d358 <MX_USB_DEVICE_Init+0x54>)
800d320: f7fe ff84 bl 800c22c <USBD_RegisterClass>
800d324: 4603 mov r3, r0
800d326: 2b00 cmp r3, #0
800d328: d001 beq.n 800d32e <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
800d32a: f7f5 fe57 bl 8002fdc <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
800d32e: 490c ldr r1, [pc, #48] @ (800d360 <MX_USB_DEVICE_Init+0x5c>)
800d330: 4809 ldr r0, [pc, #36] @ (800d358 <MX_USB_DEVICE_Init+0x54>)
800d332: f7fe feb5 bl 800c0a0 <USBD_CDC_RegisterInterface>
800d336: 4603 mov r3, r0
800d338: 2b00 cmp r3, #0
800d33a: d001 beq.n 800d340 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
800d33c: f7f5 fe4e bl 8002fdc <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
800d340: 4805 ldr r0, [pc, #20] @ (800d358 <MX_USB_DEVICE_Init+0x54>)
800d342: f7fe ff8c bl 800c25e <USBD_Start>
800d346: 4603 mov r3, r0
800d348: 2b00 cmp r3, #0
800d34a: d001 beq.n 800d350 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
800d34c: f7f5 fe46 bl 8002fdc <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
800d350: bf00 nop
800d352: bd80 pop {r7, pc}
800d354: 2000013c .word 0x2000013c
800d358: 20000494 .word 0x20000494
800d35c: 20000028 .word 0x20000028
800d360: 2000012c .word 0x2000012c
0800d364 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
800d364: b480 push {r7}
800d366: b085 sub sp, #20
800d368: af00 add r7, sp, #0
800d36a: 6078 str r0, [r7, #4]
800d36c: 6039 str r1, [r7, #0]
while (len--) {
800d36e: e01e b.n 800d3ae <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
800d370: 4b14 ldr r3, [pc, #80] @ (800d3c4 <fifo_push+0x60>)
800d372: 881b ldrh r3, [r3, #0]
800d374: b29b uxth r3, r3
800d376: 3301 adds r3, #1
800d378: b29b uxth r3, r3
800d37a: b2db uxtb r3, r3
800d37c: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
800d37e: 89fa ldrh r2, [r7, #14]
800d380: 4b11 ldr r3, [pc, #68] @ (800d3c8 <fifo_push+0x64>)
800d382: 881b ldrh r3, [r3, #0]
800d384: b29b uxth r3, r3
800d386: b2db uxtb r3, r3
800d388: 429a cmp r2, r3
800d38a: d103 bne.n 800d394 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
800d38c: 687b ldr r3, [r7, #4]
800d38e: 3301 adds r3, #1
800d390: 607b str r3, [r7, #4]
continue;
800d392: e00c b.n 800d3ae <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
800d394: 687b ldr r3, [r7, #4]
800d396: 1c5a adds r2, r3, #1
800d398: 607a str r2, [r7, #4]
800d39a: 4a0a ldr r2, [pc, #40] @ (800d3c4 <fifo_push+0x60>)
800d39c: 8812 ldrh r2, [r2, #0]
800d39e: b292 uxth r2, r2
800d3a0: b2d2 uxtb r2, r2
800d3a2: 7819 ldrb r1, [r3, #0]
800d3a4: 4b09 ldr r3, [pc, #36] @ (800d3cc <fifo_push+0x68>)
800d3a6: 5499 strb r1, [r3, r2]
rx_head = next;
800d3a8: 4a06 ldr r2, [pc, #24] @ (800d3c4 <fifo_push+0x60>)
800d3aa: 89fb ldrh r3, [r7, #14]
800d3ac: 8013 strh r3, [r2, #0]
while (len--) {
800d3ae: 683b ldr r3, [r7, #0]
800d3b0: 1e5a subs r2, r3, #1
800d3b2: 603a str r2, [r7, #0]
800d3b4: 2b00 cmp r3, #0
800d3b6: d1db bne.n 800d370 <fifo_push+0xc>
}
}
800d3b8: bf00 nop
800d3ba: bf00 nop
800d3bc: 3714 adds r7, #20
800d3be: 46bd mov sp, r7
800d3c0: bc80 pop {r7}
800d3c2: 4770 bx lr
800d3c4: 20001058 .word 0x20001058
800d3c8: 2000105a .word 0x2000105a
800d3cc: 20000f58 .word 0x20000f58
0800d3d0 <CDC_Available>:
uint32_t CDC_Available(void) {
800d3d0: b480 push {r7}
800d3d2: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
800d3d4: 4b06 ldr r3, [pc, #24] @ (800d3f0 <CDC_Available+0x20>)
800d3d6: 881b ldrh r3, [r3, #0]
800d3d8: b29a uxth r2, r3
800d3da: 4b06 ldr r3, [pc, #24] @ (800d3f4 <CDC_Available+0x24>)
800d3dc: 881b ldrh r3, [r3, #0]
800d3de: b29b uxth r3, r3
800d3e0: 1ad3 subs r3, r2, r3
800d3e2: b29b uxth r3, r3
800d3e4: b2db uxtb r3, r3
}
800d3e6: 4618 mov r0, r3
800d3e8: 46bd mov sp, r7
800d3ea: bc80 pop {r7}
800d3ec: 4770 bx lr
800d3ee: bf00 nop
800d3f0: 20001058 .word 0x20001058
800d3f4: 2000105a .word 0x2000105a
0800d3f8 <CDC_ReadByte>:
int CDC_ReadByte(void) {
800d3f8: b480 push {r7}
800d3fa: b083 sub sp, #12
800d3fc: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
800d3fe: 4b10 ldr r3, [pc, #64] @ (800d440 <CDC_ReadByte+0x48>)
800d400: 881b ldrh r3, [r3, #0]
800d402: b29a uxth r2, r3
800d404: 4b0f ldr r3, [pc, #60] @ (800d444 <CDC_ReadByte+0x4c>)
800d406: 881b ldrh r3, [r3, #0]
800d408: b29b uxth r3, r3
800d40a: 429a cmp r2, r3
800d40c: d102 bne.n 800d414 <CDC_ReadByte+0x1c>
800d40e: f04f 33ff mov.w r3, #4294967295
800d412: e010 b.n 800d436 <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
800d414: 4b0a ldr r3, [pc, #40] @ (800d440 <CDC_ReadByte+0x48>)
800d416: 881b ldrh r3, [r3, #0]
800d418: b29b uxth r3, r3
800d41a: b2db uxtb r3, r3
800d41c: 4a0a ldr r2, [pc, #40] @ (800d448 <CDC_ReadByte+0x50>)
800d41e: 5cd3 ldrb r3, [r2, r3]
800d420: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
800d422: 4b07 ldr r3, [pc, #28] @ (800d440 <CDC_ReadByte+0x48>)
800d424: 881b ldrh r3, [r3, #0]
800d426: b29b uxth r3, r3
800d428: 3301 adds r3, #1
800d42a: b29b uxth r3, r3
800d42c: b2db uxtb r3, r3
800d42e: b29a uxth r2, r3
800d430: 4b03 ldr r3, [pc, #12] @ (800d440 <CDC_ReadByte+0x48>)
800d432: 801a strh r2, [r3, #0]
return b;
800d434: 687b ldr r3, [r7, #4]
}
800d436: 4618 mov r0, r3
800d438: 370c adds r7, #12
800d43a: 46bd mov sp, r7
800d43c: bc80 pop {r7}
800d43e: 4770 bx lr
800d440: 2000105a .word 0x2000105a
800d444: 20001058 .word 0x20001058
800d448: 20000f58 .word 0x20000f58
0800d44c <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
800d44c: b580 push {r7, lr}
800d44e: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
800d450: 2200 movs r2, #0
800d452: 4905 ldr r1, [pc, #20] @ (800d468 <CDC_Init_FS+0x1c>)
800d454: 4805 ldr r0, [pc, #20] @ (800d46c <CDC_Init_FS+0x20>)
800d456: f7fe fe39 bl 800c0cc <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
800d45a: 4905 ldr r1, [pc, #20] @ (800d470 <CDC_Init_FS+0x24>)
800d45c: 4803 ldr r0, [pc, #12] @ (800d46c <CDC_Init_FS+0x20>)
800d45e: f7fe fe4e bl 800c0fe <USBD_CDC_SetRxBuffer>
return (USBD_OK);
800d462: 2300 movs r3, #0
/* USER CODE END 3 */
}
800d464: 4618 mov r0, r3
800d466: bd80 pop {r7, pc}
800d468: 20000b58 .word 0x20000b58
800d46c: 20000494 .word 0x20000494
800d470: 20000758 .word 0x20000758
0800d474 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
800d474: b480 push {r7}
800d476: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
800d478: 2300 movs r3, #0
/* USER CODE END 4 */
}
800d47a: 4618 mov r0, r3
800d47c: 46bd mov sp, r7
800d47e: bc80 pop {r7}
800d480: 4770 bx lr
...
0800d484 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800d484: b480 push {r7}
800d486: b083 sub sp, #12
800d488: af00 add r7, sp, #0
800d48a: 4603 mov r3, r0
800d48c: 6039 str r1, [r7, #0]
800d48e: 71fb strb r3, [r7, #7]
800d490: 4613 mov r3, r2
800d492: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800d494: 79fb ldrb r3, [r7, #7]
800d496: 2b23 cmp r3, #35 @ 0x23
800d498: d84a bhi.n 800d530 <CDC_Control_FS+0xac>
800d49a: a201 add r2, pc, #4 @ (adr r2, 800d4a0 <CDC_Control_FS+0x1c>)
800d49c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d4a0: 0800d531 .word 0x0800d531
800d4a4: 0800d531 .word 0x0800d531
800d4a8: 0800d531 .word 0x0800d531
800d4ac: 0800d531 .word 0x0800d531
800d4b0: 0800d531 .word 0x0800d531
800d4b4: 0800d531 .word 0x0800d531
800d4b8: 0800d531 .word 0x0800d531
800d4bc: 0800d531 .word 0x0800d531
800d4c0: 0800d531 .word 0x0800d531
800d4c4: 0800d531 .word 0x0800d531
800d4c8: 0800d531 .word 0x0800d531
800d4cc: 0800d531 .word 0x0800d531
800d4d0: 0800d531 .word 0x0800d531
800d4d4: 0800d531 .word 0x0800d531
800d4d8: 0800d531 .word 0x0800d531
800d4dc: 0800d531 .word 0x0800d531
800d4e0: 0800d531 .word 0x0800d531
800d4e4: 0800d531 .word 0x0800d531
800d4e8: 0800d531 .word 0x0800d531
800d4ec: 0800d531 .word 0x0800d531
800d4f0: 0800d531 .word 0x0800d531
800d4f4: 0800d531 .word 0x0800d531
800d4f8: 0800d531 .word 0x0800d531
800d4fc: 0800d531 .word 0x0800d531
800d500: 0800d531 .word 0x0800d531
800d504: 0800d531 .word 0x0800d531
800d508: 0800d531 .word 0x0800d531
800d50c: 0800d531 .word 0x0800d531
800d510: 0800d531 .word 0x0800d531
800d514: 0800d531 .word 0x0800d531
800d518: 0800d531 .word 0x0800d531
800d51c: 0800d531 .word 0x0800d531
800d520: 0800d531 .word 0x0800d531
800d524: 0800d531 .word 0x0800d531
800d528: 0800d531 .word 0x0800d531
800d52c: 0800d531 .word 0x0800d531
case CDC_SEND_BREAK:
break;
default:
break;
800d530: bf00 nop
}
return (USBD_OK);
800d532: 2300 movs r3, #0
/* USER CODE END 5 */
}
800d534: 4618 mov r0, r3
800d536: 370c adds r7, #12
800d538: 46bd mov sp, r7
800d53a: bc80 pop {r7}
800d53c: 4770 bx lr
800d53e: bf00 nop
0800d540 <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
800d540: b580 push {r7, lr}
800d542: b082 sub sp, #8
800d544: af00 add r7, sp, #0
800d546: 6078 str r0, [r7, #4]
800d548: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
800d54a: 683b ldr r3, [r7, #0]
800d54c: 681b ldr r3, [r3, #0]
800d54e: 2b00 cmp r3, #0
800d550: d005 beq.n 800d55e <CDC_Receive_FS+0x1e>
800d552: 683b ldr r3, [r7, #0]
800d554: 681b ldr r3, [r3, #0]
800d556: 4619 mov r1, r3
800d558: 6878 ldr r0, [r7, #4]
800d55a: f7ff ff03 bl 800d364 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
800d55e: 6879 ldr r1, [r7, #4]
800d560: 4805 ldr r0, [pc, #20] @ (800d578 <CDC_Receive_FS+0x38>)
800d562: f7fe fdcc bl 800c0fe <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
800d566: 4804 ldr r0, [pc, #16] @ (800d578 <CDC_Receive_FS+0x38>)
800d568: f7fe fe0b bl 800c182 <USBD_CDC_ReceivePacket>
return (USBD_OK);
800d56c: 2300 movs r3, #0
/* USER CODE END 6 */
}
800d56e: 4618 mov r0, r3
800d570: 3708 adds r7, #8
800d572: 46bd mov sp, r7
800d574: bd80 pop {r7, pc}
800d576: bf00 nop
800d578: 20000494 .word 0x20000494
0800d57c <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
800d57c: b580 push {r7, lr}
800d57e: b084 sub sp, #16
800d580: af00 add r7, sp, #0
800d582: 6078 str r0, [r7, #4]
800d584: 460b mov r3, r1
800d586: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
800d588: 2300 movs r3, #0
800d58a: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
800d58c: 4b0d ldr r3, [pc, #52] @ (800d5c4 <CDC_Transmit_FS+0x48>)
800d58e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800d592: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
800d594: 68bb ldr r3, [r7, #8]
800d596: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800d59a: 2b00 cmp r3, #0
800d59c: d001 beq.n 800d5a2 <CDC_Transmit_FS+0x26>
return USBD_BUSY;
800d59e: 2301 movs r3, #1
800d5a0: e00b b.n 800d5ba <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800d5a2: 887b ldrh r3, [r7, #2]
800d5a4: 461a mov r2, r3
800d5a6: 6879 ldr r1, [r7, #4]
800d5a8: 4806 ldr r0, [pc, #24] @ (800d5c4 <CDC_Transmit_FS+0x48>)
800d5aa: f7fe fd8f bl 800c0cc <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800d5ae: 4805 ldr r0, [pc, #20] @ (800d5c4 <CDC_Transmit_FS+0x48>)
800d5b0: f7fe fdb8 bl 800c124 <USBD_CDC_TransmitPacket>
800d5b4: 4603 mov r3, r0
800d5b6: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
800d5b8: 7bfb ldrb r3, [r7, #15]
}
800d5ba: 4618 mov r0, r3
800d5bc: 3710 adds r7, #16
800d5be: 46bd mov sp, r7
800d5c0: bd80 pop {r7, pc}
800d5c2: bf00 nop
800d5c4: 20000494 .word 0x20000494
0800d5c8 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d5c8: b480 push {r7}
800d5ca: b083 sub sp, #12
800d5cc: af00 add r7, sp, #0
800d5ce: 4603 mov r3, r0
800d5d0: 6039 str r1, [r7, #0]
800d5d2: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800d5d4: 683b ldr r3, [r7, #0]
800d5d6: 2212 movs r2, #18
800d5d8: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
800d5da: 4b03 ldr r3, [pc, #12] @ (800d5e8 <USBD_FS_DeviceDescriptor+0x20>)
}
800d5dc: 4618 mov r0, r3
800d5de: 370c adds r7, #12
800d5e0: 46bd mov sp, r7
800d5e2: bc80 pop {r7}
800d5e4: 4770 bx lr
800d5e6: bf00 nop
800d5e8: 20000158 .word 0x20000158
0800d5ec <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d5ec: b480 push {r7}
800d5ee: b083 sub sp, #12
800d5f0: af00 add r7, sp, #0
800d5f2: 4603 mov r3, r0
800d5f4: 6039 str r1, [r7, #0]
800d5f6: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
800d5f8: 683b ldr r3, [r7, #0]
800d5fa: 2204 movs r2, #4
800d5fc: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
800d5fe: 4b03 ldr r3, [pc, #12] @ (800d60c <USBD_FS_LangIDStrDescriptor+0x20>)
}
800d600: 4618 mov r0, r3
800d602: 370c adds r7, #12
800d604: 46bd mov sp, r7
800d606: bc80 pop {r7}
800d608: 4770 bx lr
800d60a: bf00 nop
800d60c: 2000016c .word 0x2000016c
0800d610 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d610: b580 push {r7, lr}
800d612: b082 sub sp, #8
800d614: af00 add r7, sp, #0
800d616: 4603 mov r3, r0
800d618: 6039 str r1, [r7, #0]
800d61a: 71fb strb r3, [r7, #7]
if(speed == 0)
800d61c: 79fb ldrb r3, [r7, #7]
800d61e: 2b00 cmp r3, #0
800d620: d105 bne.n 800d62e <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800d622: 683a ldr r2, [r7, #0]
800d624: 4907 ldr r1, [pc, #28] @ (800d644 <USBD_FS_ProductStrDescriptor+0x34>)
800d626: 4808 ldr r0, [pc, #32] @ (800d648 <USBD_FS_ProductStrDescriptor+0x38>)
800d628: f7ff fd8f bl 800d14a <USBD_GetString>
800d62c: e004 b.n 800d638 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800d62e: 683a ldr r2, [r7, #0]
800d630: 4904 ldr r1, [pc, #16] @ (800d644 <USBD_FS_ProductStrDescriptor+0x34>)
800d632: 4805 ldr r0, [pc, #20] @ (800d648 <USBD_FS_ProductStrDescriptor+0x38>)
800d634: f7ff fd89 bl 800d14a <USBD_GetString>
}
return USBD_StrDesc;
800d638: 4b02 ldr r3, [pc, #8] @ (800d644 <USBD_FS_ProductStrDescriptor+0x34>)
}
800d63a: 4618 mov r0, r3
800d63c: 3708 adds r7, #8
800d63e: 46bd mov sp, r7
800d640: bd80 pop {r7, pc}
800d642: bf00 nop
800d644: 2000105c .word 0x2000105c
800d648: 0800eb18 .word 0x0800eb18
0800d64c <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d64c: b580 push {r7, lr}
800d64e: b082 sub sp, #8
800d650: af00 add r7, sp, #0
800d652: 4603 mov r3, r0
800d654: 6039 str r1, [r7, #0]
800d656: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800d658: 683a ldr r2, [r7, #0]
800d65a: 4904 ldr r1, [pc, #16] @ (800d66c <USBD_FS_ManufacturerStrDescriptor+0x20>)
800d65c: 4804 ldr r0, [pc, #16] @ (800d670 <USBD_FS_ManufacturerStrDescriptor+0x24>)
800d65e: f7ff fd74 bl 800d14a <USBD_GetString>
return USBD_StrDesc;
800d662: 4b02 ldr r3, [pc, #8] @ (800d66c <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800d664: 4618 mov r0, r3
800d666: 3708 adds r7, #8
800d668: 46bd mov sp, r7
800d66a: bd80 pop {r7, pc}
800d66c: 2000105c .word 0x2000105c
800d670: 0800eb30 .word 0x0800eb30
0800d674 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d674: b580 push {r7, lr}
800d676: b082 sub sp, #8
800d678: af00 add r7, sp, #0
800d67a: 4603 mov r3, r0
800d67c: 6039 str r1, [r7, #0]
800d67e: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800d680: 683b ldr r3, [r7, #0]
800d682: 221a movs r2, #26
800d684: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800d686: f000 f843 bl 800d710 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800d68a: 4b02 ldr r3, [pc, #8] @ (800d694 <USBD_FS_SerialStrDescriptor+0x20>)
}
800d68c: 4618 mov r0, r3
800d68e: 3708 adds r7, #8
800d690: 46bd mov sp, r7
800d692: bd80 pop {r7, pc}
800d694: 20000170 .word 0x20000170
0800d698 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d698: b580 push {r7, lr}
800d69a: b082 sub sp, #8
800d69c: af00 add r7, sp, #0
800d69e: 4603 mov r3, r0
800d6a0: 6039 str r1, [r7, #0]
800d6a2: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800d6a4: 79fb ldrb r3, [r7, #7]
800d6a6: 2b00 cmp r3, #0
800d6a8: d105 bne.n 800d6b6 <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800d6aa: 683a ldr r2, [r7, #0]
800d6ac: 4907 ldr r1, [pc, #28] @ (800d6cc <USBD_FS_ConfigStrDescriptor+0x34>)
800d6ae: 4808 ldr r0, [pc, #32] @ (800d6d0 <USBD_FS_ConfigStrDescriptor+0x38>)
800d6b0: f7ff fd4b bl 800d14a <USBD_GetString>
800d6b4: e004 b.n 800d6c0 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800d6b6: 683a ldr r2, [r7, #0]
800d6b8: 4904 ldr r1, [pc, #16] @ (800d6cc <USBD_FS_ConfigStrDescriptor+0x34>)
800d6ba: 4805 ldr r0, [pc, #20] @ (800d6d0 <USBD_FS_ConfigStrDescriptor+0x38>)
800d6bc: f7ff fd45 bl 800d14a <USBD_GetString>
}
return USBD_StrDesc;
800d6c0: 4b02 ldr r3, [pc, #8] @ (800d6cc <USBD_FS_ConfigStrDescriptor+0x34>)
}
800d6c2: 4618 mov r0, r3
800d6c4: 3708 adds r7, #8
800d6c6: 46bd mov sp, r7
800d6c8: bd80 pop {r7, pc}
800d6ca: bf00 nop
800d6cc: 2000105c .word 0x2000105c
800d6d0: 0800eb44 .word 0x0800eb44
0800d6d4 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d6d4: b580 push {r7, lr}
800d6d6: b082 sub sp, #8
800d6d8: af00 add r7, sp, #0
800d6da: 4603 mov r3, r0
800d6dc: 6039 str r1, [r7, #0]
800d6de: 71fb strb r3, [r7, #7]
if(speed == 0)
800d6e0: 79fb ldrb r3, [r7, #7]
800d6e2: 2b00 cmp r3, #0
800d6e4: d105 bne.n 800d6f2 <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800d6e6: 683a ldr r2, [r7, #0]
800d6e8: 4907 ldr r1, [pc, #28] @ (800d708 <USBD_FS_InterfaceStrDescriptor+0x34>)
800d6ea: 4808 ldr r0, [pc, #32] @ (800d70c <USBD_FS_InterfaceStrDescriptor+0x38>)
800d6ec: f7ff fd2d bl 800d14a <USBD_GetString>
800d6f0: e004 b.n 800d6fc <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800d6f2: 683a ldr r2, [r7, #0]
800d6f4: 4904 ldr r1, [pc, #16] @ (800d708 <USBD_FS_InterfaceStrDescriptor+0x34>)
800d6f6: 4805 ldr r0, [pc, #20] @ (800d70c <USBD_FS_InterfaceStrDescriptor+0x38>)
800d6f8: f7ff fd27 bl 800d14a <USBD_GetString>
}
return USBD_StrDesc;
800d6fc: 4b02 ldr r3, [pc, #8] @ (800d708 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
800d6fe: 4618 mov r0, r3
800d700: 3708 adds r7, #8
800d702: 46bd mov sp, r7
800d704: bd80 pop {r7, pc}
800d706: bf00 nop
800d708: 2000105c .word 0x2000105c
800d70c: 0800eb50 .word 0x0800eb50
0800d710 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
800d710: b580 push {r7, lr}
800d712: b084 sub sp, #16
800d714: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800d716: 4b0f ldr r3, [pc, #60] @ (800d754 <Get_SerialNum+0x44>)
800d718: 681b ldr r3, [r3, #0]
800d71a: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
800d71c: 4b0e ldr r3, [pc, #56] @ (800d758 <Get_SerialNum+0x48>)
800d71e: 681b ldr r3, [r3, #0]
800d720: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800d722: 4b0e ldr r3, [pc, #56] @ (800d75c <Get_SerialNum+0x4c>)
800d724: 681b ldr r3, [r3, #0]
800d726: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800d728: 68fa ldr r2, [r7, #12]
800d72a: 687b ldr r3, [r7, #4]
800d72c: 4413 add r3, r2
800d72e: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800d730: 68fb ldr r3, [r7, #12]
800d732: 2b00 cmp r3, #0
800d734: d009 beq.n 800d74a <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800d736: 2208 movs r2, #8
800d738: 4909 ldr r1, [pc, #36] @ (800d760 <Get_SerialNum+0x50>)
800d73a: 68f8 ldr r0, [r7, #12]
800d73c: f000 f814 bl 800d768 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800d740: 2204 movs r2, #4
800d742: 4908 ldr r1, [pc, #32] @ (800d764 <Get_SerialNum+0x54>)
800d744: 68b8 ldr r0, [r7, #8]
800d746: f000 f80f bl 800d768 <IntToUnicode>
}
}
800d74a: bf00 nop
800d74c: 3710 adds r7, #16
800d74e: 46bd mov sp, r7
800d750: bd80 pop {r7, pc}
800d752: bf00 nop
800d754: 1ffff7e8 .word 0x1ffff7e8
800d758: 1ffff7ec .word 0x1ffff7ec
800d75c: 1ffff7f0 .word 0x1ffff7f0
800d760: 20000172 .word 0x20000172
800d764: 20000182 .word 0x20000182
0800d768 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800d768: b480 push {r7}
800d76a: b087 sub sp, #28
800d76c: af00 add r7, sp, #0
800d76e: 60f8 str r0, [r7, #12]
800d770: 60b9 str r1, [r7, #8]
800d772: 4613 mov r3, r2
800d774: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800d776: 2300 movs r3, #0
800d778: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800d77a: 2300 movs r3, #0
800d77c: 75fb strb r3, [r7, #23]
800d77e: e027 b.n 800d7d0 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800d780: 68fb ldr r3, [r7, #12]
800d782: 0f1b lsrs r3, r3, #28
800d784: 2b09 cmp r3, #9
800d786: d80b bhi.n 800d7a0 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800d788: 68fb ldr r3, [r7, #12]
800d78a: 0f1b lsrs r3, r3, #28
800d78c: b2da uxtb r2, r3
800d78e: 7dfb ldrb r3, [r7, #23]
800d790: 005b lsls r3, r3, #1
800d792: 4619 mov r1, r3
800d794: 68bb ldr r3, [r7, #8]
800d796: 440b add r3, r1
800d798: 3230 adds r2, #48 @ 0x30
800d79a: b2d2 uxtb r2, r2
800d79c: 701a strb r2, [r3, #0]
800d79e: e00a b.n 800d7b6 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800d7a0: 68fb ldr r3, [r7, #12]
800d7a2: 0f1b lsrs r3, r3, #28
800d7a4: b2da uxtb r2, r3
800d7a6: 7dfb ldrb r3, [r7, #23]
800d7a8: 005b lsls r3, r3, #1
800d7aa: 4619 mov r1, r3
800d7ac: 68bb ldr r3, [r7, #8]
800d7ae: 440b add r3, r1
800d7b0: 3237 adds r2, #55 @ 0x37
800d7b2: b2d2 uxtb r2, r2
800d7b4: 701a strb r2, [r3, #0]
}
value = value << 4;
800d7b6: 68fb ldr r3, [r7, #12]
800d7b8: 011b lsls r3, r3, #4
800d7ba: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800d7bc: 7dfb ldrb r3, [r7, #23]
800d7be: 005b lsls r3, r3, #1
800d7c0: 3301 adds r3, #1
800d7c2: 68ba ldr r2, [r7, #8]
800d7c4: 4413 add r3, r2
800d7c6: 2200 movs r2, #0
800d7c8: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800d7ca: 7dfb ldrb r3, [r7, #23]
800d7cc: 3301 adds r3, #1
800d7ce: 75fb strb r3, [r7, #23]
800d7d0: 7dfa ldrb r2, [r7, #23]
800d7d2: 79fb ldrb r3, [r7, #7]
800d7d4: 429a cmp r2, r3
800d7d6: d3d3 bcc.n 800d780 <IntToUnicode+0x18>
}
}
800d7d8: bf00 nop
800d7da: bf00 nop
800d7dc: 371c adds r7, #28
800d7de: 46bd mov sp, r7
800d7e0: bc80 pop {r7}
800d7e2: 4770 bx lr
0800d7e4 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800d7e4: b580 push {r7, lr}
800d7e6: b084 sub sp, #16
800d7e8: af00 add r7, sp, #0
800d7ea: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800d7ec: 687b ldr r3, [r7, #4]
800d7ee: 681b ldr r3, [r3, #0]
800d7f0: 4a0d ldr r2, [pc, #52] @ (800d828 <HAL_PCD_MspInit+0x44>)
800d7f2: 4293 cmp r3, r2
800d7f4: d113 bne.n 800d81e <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800d7f6: 4b0d ldr r3, [pc, #52] @ (800d82c <HAL_PCD_MspInit+0x48>)
800d7f8: 69db ldr r3, [r3, #28]
800d7fa: 4a0c ldr r2, [pc, #48] @ (800d82c <HAL_PCD_MspInit+0x48>)
800d7fc: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800d800: 61d3 str r3, [r2, #28]
800d802: 4b0a ldr r3, [pc, #40] @ (800d82c <HAL_PCD_MspInit+0x48>)
800d804: 69db ldr r3, [r3, #28]
800d806: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800d80a: 60fb str r3, [r7, #12]
800d80c: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800d80e: 2200 movs r2, #0
800d810: 2100 movs r1, #0
800d812: 2014 movs r0, #20
800d814: f7f7 fddb bl 80053ce <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800d818: 2014 movs r0, #20
800d81a: f7f7 fdf4 bl 8005406 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800d81e: bf00 nop
800d820: 3710 adds r7, #16
800d822: 46bd mov sp, r7
800d824: bd80 pop {r7, pc}
800d826: bf00 nop
800d828: 40005c00 .word 0x40005c00
800d82c: 40021000 .word 0x40021000
0800d830 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d830: b580 push {r7, lr}
800d832: b082 sub sp, #8
800d834: af00 add r7, sp, #0
800d836: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800d838: 687b ldr r3, [r7, #4]
800d83a: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800d83e: 687b ldr r3, [r7, #4]
800d840: f503 7326 add.w r3, r3, #664 @ 0x298
800d844: 4619 mov r1, r3
800d846: 4610 mov r0, r2
800d848: f7fe fd51 bl 800c2ee <USBD_LL_SetupStage>
}
800d84c: bf00 nop
800d84e: 3708 adds r7, #8
800d850: 46bd mov sp, r7
800d852: bd80 pop {r7, pc}
0800d854 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d854: b580 push {r7, lr}
800d856: b082 sub sp, #8
800d858: af00 add r7, sp, #0
800d85a: 6078 str r0, [r7, #4]
800d85c: 460b mov r3, r1
800d85e: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800d860: 687b ldr r3, [r7, #4]
800d862: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800d866: 78fa ldrb r2, [r7, #3]
800d868: 6879 ldr r1, [r7, #4]
800d86a: 4613 mov r3, r2
800d86c: 009b lsls r3, r3, #2
800d86e: 4413 add r3, r2
800d870: 00db lsls r3, r3, #3
800d872: 440b add r3, r1
800d874: f503 73b2 add.w r3, r3, #356 @ 0x164
800d878: 681a ldr r2, [r3, #0]
800d87a: 78fb ldrb r3, [r7, #3]
800d87c: 4619 mov r1, r3
800d87e: f7fe fd83 bl 800c388 <USBD_LL_DataOutStage>
}
800d882: bf00 nop
800d884: 3708 adds r7, #8
800d886: 46bd mov sp, r7
800d888: bd80 pop {r7, pc}
0800d88a <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d88a: b580 push {r7, lr}
800d88c: b082 sub sp, #8
800d88e: af00 add r7, sp, #0
800d890: 6078 str r0, [r7, #4]
800d892: 460b mov r3, r1
800d894: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800d896: 687b ldr r3, [r7, #4]
800d898: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800d89c: 78fa ldrb r2, [r7, #3]
800d89e: 6879 ldr r1, [r7, #4]
800d8a0: 4613 mov r3, r2
800d8a2: 009b lsls r3, r3, #2
800d8a4: 4413 add r3, r2
800d8a6: 00db lsls r3, r3, #3
800d8a8: 440b add r3, r1
800d8aa: 3324 adds r3, #36 @ 0x24
800d8ac: 681a ldr r2, [r3, #0]
800d8ae: 78fb ldrb r3, [r7, #3]
800d8b0: 4619 mov r1, r3
800d8b2: f7fe fdda bl 800c46a <USBD_LL_DataInStage>
}
800d8b6: bf00 nop
800d8b8: 3708 adds r7, #8
800d8ba: 46bd mov sp, r7
800d8bc: bd80 pop {r7, pc}
0800d8be <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d8be: b580 push {r7, lr}
800d8c0: b082 sub sp, #8
800d8c2: af00 add r7, sp, #0
800d8c4: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800d8c6: 687b ldr r3, [r7, #4]
800d8c8: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d8cc: 4618 mov r0, r3
800d8ce: f7fe feea bl 800c6a6 <USBD_LL_SOF>
}
800d8d2: bf00 nop
800d8d4: 3708 adds r7, #8
800d8d6: 46bd mov sp, r7
800d8d8: bd80 pop {r7, pc}
0800d8da <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d8da: b580 push {r7, lr}
800d8dc: b084 sub sp, #16
800d8de: af00 add r7, sp, #0
800d8e0: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800d8e2: 2301 movs r3, #1
800d8e4: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800d8e6: 687b ldr r3, [r7, #4]
800d8e8: 799b ldrb r3, [r3, #6]
800d8ea: 2b02 cmp r3, #2
800d8ec: d001 beq.n 800d8f2 <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800d8ee: f7f5 fb75 bl 8002fdc <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800d8f2: 687b ldr r3, [r7, #4]
800d8f4: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d8f8: 7bfa ldrb r2, [r7, #15]
800d8fa: 4611 mov r1, r2
800d8fc: 4618 mov r0, r3
800d8fe: f7fe fe9a bl 800c636 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800d902: 687b ldr r3, [r7, #4]
800d904: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d908: 4618 mov r0, r3
800d90a: f7fe fe53 bl 800c5b4 <USBD_LL_Reset>
}
800d90e: bf00 nop
800d910: 3710 adds r7, #16
800d912: 46bd mov sp, r7
800d914: bd80 pop {r7, pc}
...
0800d918 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d918: b580 push {r7, lr}
800d91a: b082 sub sp, #8
800d91c: af00 add r7, sp, #0
800d91e: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800d920: 687b ldr r3, [r7, #4]
800d922: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d926: 4618 mov r0, r3
800d928: f7fe fe94 bl 800c654 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800d92c: 687b ldr r3, [r7, #4]
800d92e: 7a9b ldrb r3, [r3, #10]
800d930: 2b00 cmp r3, #0
800d932: d005 beq.n 800d940 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800d934: 4b04 ldr r3, [pc, #16] @ (800d948 <HAL_PCD_SuspendCallback+0x30>)
800d936: 691b ldr r3, [r3, #16]
800d938: 4a03 ldr r2, [pc, #12] @ (800d948 <HAL_PCD_SuspendCallback+0x30>)
800d93a: f043 0306 orr.w r3, r3, #6
800d93e: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800d940: bf00 nop
800d942: 3708 adds r7, #8
800d944: 46bd mov sp, r7
800d946: bd80 pop {r7, pc}
800d948: e000ed00 .word 0xe000ed00
0800d94c <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d94c: b580 push {r7, lr}
800d94e: b082 sub sp, #8
800d950: af00 add r7, sp, #0
800d952: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800d954: 687b ldr r3, [r7, #4]
800d956: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d95a: 4618 mov r0, r3
800d95c: f7fe fe8e bl 800c67c <USBD_LL_Resume>
}
800d960: bf00 nop
800d962: 3708 adds r7, #8
800d964: 46bd mov sp, r7
800d966: bd80 pop {r7, pc}
0800d968 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800d968: b580 push {r7, lr}
800d96a: b082 sub sp, #8
800d96c: af00 add r7, sp, #0
800d96e: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800d970: 4a28 ldr r2, [pc, #160] @ (800da14 <USBD_LL_Init+0xac>)
800d972: 687b ldr r3, [r7, #4]
800d974: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800d978: 687b ldr r3, [r7, #4]
800d97a: 4a26 ldr r2, [pc, #152] @ (800da14 <USBD_LL_Init+0xac>)
800d97c: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800d980: 4b24 ldr r3, [pc, #144] @ (800da14 <USBD_LL_Init+0xac>)
800d982: 4a25 ldr r2, [pc, #148] @ (800da18 <USBD_LL_Init+0xb0>)
800d984: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800d986: 4b23 ldr r3, [pc, #140] @ (800da14 <USBD_LL_Init+0xac>)
800d988: 2208 movs r2, #8
800d98a: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800d98c: 4b21 ldr r3, [pc, #132] @ (800da14 <USBD_LL_Init+0xac>)
800d98e: 2202 movs r2, #2
800d990: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800d992: 4b20 ldr r3, [pc, #128] @ (800da14 <USBD_LL_Init+0xac>)
800d994: 2200 movs r2, #0
800d996: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800d998: 4b1e ldr r3, [pc, #120] @ (800da14 <USBD_LL_Init+0xac>)
800d99a: 2200 movs r2, #0
800d99c: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800d99e: 4b1d ldr r3, [pc, #116] @ (800da14 <USBD_LL_Init+0xac>)
800d9a0: 2200 movs r2, #0
800d9a2: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800d9a4: 481b ldr r0, [pc, #108] @ (800da14 <USBD_LL_Init+0xac>)
800d9a6: f7f8 faf0 bl 8005f8a <HAL_PCD_Init>
800d9aa: 4603 mov r3, r0
800d9ac: 2b00 cmp r3, #0
800d9ae: d001 beq.n 800d9b4 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800d9b0: f7f5 fb14 bl 8002fdc <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800d9b4: 687b ldr r3, [r7, #4]
800d9b6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d9ba: 2318 movs r3, #24
800d9bc: 2200 movs r2, #0
800d9be: 2100 movs r1, #0
800d9c0: f7fa f801 bl 80079c6 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800d9c4: 687b ldr r3, [r7, #4]
800d9c6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d9ca: 2358 movs r3, #88 @ 0x58
800d9cc: 2200 movs r2, #0
800d9ce: 2180 movs r1, #128 @ 0x80
800d9d0: f7f9 fff9 bl 80079c6 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800d9d4: 687b ldr r3, [r7, #4]
800d9d6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d9da: 23c0 movs r3, #192 @ 0xc0
800d9dc: 2200 movs r2, #0
800d9de: 2181 movs r1, #129 @ 0x81
800d9e0: f7f9 fff1 bl 80079c6 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800d9e4: 687b ldr r3, [r7, #4]
800d9e6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d9ea: f44f 7388 mov.w r3, #272 @ 0x110
800d9ee: 2200 movs r2, #0
800d9f0: 2101 movs r1, #1
800d9f2: f7f9 ffe8 bl 80079c6 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800d9f6: 687b ldr r3, [r7, #4]
800d9f8: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d9fc: f44f 7380 mov.w r3, #256 @ 0x100
800da00: 2200 movs r2, #0
800da02: 2182 movs r1, #130 @ 0x82
800da04: f7f9 ffdf bl 80079c6 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800da08: 2300 movs r3, #0
}
800da0a: 4618 mov r0, r3
800da0c: 3708 adds r7, #8
800da0e: 46bd mov sp, r7
800da10: bd80 pop {r7, pc}
800da12: bf00 nop
800da14: 2000125c .word 0x2000125c
800da18: 40005c00 .word 0x40005c00
0800da1c <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800da1c: b580 push {r7, lr}
800da1e: b084 sub sp, #16
800da20: af00 add r7, sp, #0
800da22: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800da24: 2300 movs r3, #0
800da26: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800da28: 2300 movs r3, #0
800da2a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800da2c: 687b ldr r3, [r7, #4]
800da2e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800da32: 4618 mov r0, r3
800da34: f7f8 fb9f bl 8006176 <HAL_PCD_Start>
800da38: 4603 mov r3, r0
800da3a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800da3c: 7bfb ldrb r3, [r7, #15]
800da3e: 4618 mov r0, r3
800da40: f000 f94e bl 800dce0 <USBD_Get_USB_Status>
800da44: 4603 mov r3, r0
800da46: 73bb strb r3, [r7, #14]
return usb_status;
800da48: 7bbb ldrb r3, [r7, #14]
}
800da4a: 4618 mov r0, r3
800da4c: 3710 adds r7, #16
800da4e: 46bd mov sp, r7
800da50: bd80 pop {r7, pc}
0800da52 <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800da52: b580 push {r7, lr}
800da54: b084 sub sp, #16
800da56: af00 add r7, sp, #0
800da58: 6078 str r0, [r7, #4]
800da5a: 4608 mov r0, r1
800da5c: 4611 mov r1, r2
800da5e: 461a mov r2, r3
800da60: 4603 mov r3, r0
800da62: 70fb strb r3, [r7, #3]
800da64: 460b mov r3, r1
800da66: 70bb strb r3, [r7, #2]
800da68: 4613 mov r3, r2
800da6a: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800da6c: 2300 movs r3, #0
800da6e: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800da70: 2300 movs r3, #0
800da72: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800da74: 687b ldr r3, [r7, #4]
800da76: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800da7a: 78bb ldrb r3, [r7, #2]
800da7c: 883a ldrh r2, [r7, #0]
800da7e: 78f9 ldrb r1, [r7, #3]
800da80: f7f8 fcf3 bl 800646a <HAL_PCD_EP_Open>
800da84: 4603 mov r3, r0
800da86: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800da88: 7bfb ldrb r3, [r7, #15]
800da8a: 4618 mov r0, r3
800da8c: f000 f928 bl 800dce0 <USBD_Get_USB_Status>
800da90: 4603 mov r3, r0
800da92: 73bb strb r3, [r7, #14]
return usb_status;
800da94: 7bbb ldrb r3, [r7, #14]
}
800da96: 4618 mov r0, r3
800da98: 3710 adds r7, #16
800da9a: 46bd mov sp, r7
800da9c: bd80 pop {r7, pc}
0800da9e <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800da9e: b580 push {r7, lr}
800daa0: b084 sub sp, #16
800daa2: af00 add r7, sp, #0
800daa4: 6078 str r0, [r7, #4]
800daa6: 460b mov r3, r1
800daa8: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800daaa: 2300 movs r3, #0
800daac: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800daae: 2300 movs r3, #0
800dab0: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800dab2: 687b ldr r3, [r7, #4]
800dab4: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800dab8: 78fa ldrb r2, [r7, #3]
800daba: 4611 mov r1, r2
800dabc: 4618 mov r0, r3
800dabe: f7f8 fd31 bl 8006524 <HAL_PCD_EP_Close>
800dac2: 4603 mov r3, r0
800dac4: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800dac6: 7bfb ldrb r3, [r7, #15]
800dac8: 4618 mov r0, r3
800daca: f000 f909 bl 800dce0 <USBD_Get_USB_Status>
800dace: 4603 mov r3, r0
800dad0: 73bb strb r3, [r7, #14]
return usb_status;
800dad2: 7bbb ldrb r3, [r7, #14]
}
800dad4: 4618 mov r0, r3
800dad6: 3710 adds r7, #16
800dad8: 46bd mov sp, r7
800dada: bd80 pop {r7, pc}
0800dadc <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800dadc: b580 push {r7, lr}
800dade: b084 sub sp, #16
800dae0: af00 add r7, sp, #0
800dae2: 6078 str r0, [r7, #4]
800dae4: 460b mov r3, r1
800dae6: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800dae8: 2300 movs r3, #0
800daea: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800daec: 2300 movs r3, #0
800daee: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800daf0: 687b ldr r3, [r7, #4]
800daf2: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800daf6: 78fa ldrb r2, [r7, #3]
800daf8: 4611 mov r1, r2
800dafa: 4618 mov r0, r3
800dafc: f7f8 fdd9 bl 80066b2 <HAL_PCD_EP_SetStall>
800db00: 4603 mov r3, r0
800db02: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800db04: 7bfb ldrb r3, [r7, #15]
800db06: 4618 mov r0, r3
800db08: f000 f8ea bl 800dce0 <USBD_Get_USB_Status>
800db0c: 4603 mov r3, r0
800db0e: 73bb strb r3, [r7, #14]
return usb_status;
800db10: 7bbb ldrb r3, [r7, #14]
}
800db12: 4618 mov r0, r3
800db14: 3710 adds r7, #16
800db16: 46bd mov sp, r7
800db18: bd80 pop {r7, pc}
0800db1a <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800db1a: b580 push {r7, lr}
800db1c: b084 sub sp, #16
800db1e: af00 add r7, sp, #0
800db20: 6078 str r0, [r7, #4]
800db22: 460b mov r3, r1
800db24: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800db26: 2300 movs r3, #0
800db28: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800db2a: 2300 movs r3, #0
800db2c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800db2e: 687b ldr r3, [r7, #4]
800db30: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800db34: 78fa ldrb r2, [r7, #3]
800db36: 4611 mov r1, r2
800db38: 4618 mov r0, r3
800db3a: f7f8 fe1a bl 8006772 <HAL_PCD_EP_ClrStall>
800db3e: 4603 mov r3, r0
800db40: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800db42: 7bfb ldrb r3, [r7, #15]
800db44: 4618 mov r0, r3
800db46: f000 f8cb bl 800dce0 <USBD_Get_USB_Status>
800db4a: 4603 mov r3, r0
800db4c: 73bb strb r3, [r7, #14]
return usb_status;
800db4e: 7bbb ldrb r3, [r7, #14]
}
800db50: 4618 mov r0, r3
800db52: 3710 adds r7, #16
800db54: 46bd mov sp, r7
800db56: bd80 pop {r7, pc}
0800db58 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800db58: b480 push {r7}
800db5a: b085 sub sp, #20
800db5c: af00 add r7, sp, #0
800db5e: 6078 str r0, [r7, #4]
800db60: 460b mov r3, r1
800db62: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800db64: 687b ldr r3, [r7, #4]
800db66: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800db6a: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800db6c: f997 3003 ldrsb.w r3, [r7, #3]
800db70: 2b00 cmp r3, #0
800db72: da0b bge.n 800db8c <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800db74: 78fb ldrb r3, [r7, #3]
800db76: f003 027f and.w r2, r3, #127 @ 0x7f
800db7a: 68f9 ldr r1, [r7, #12]
800db7c: 4613 mov r3, r2
800db7e: 009b lsls r3, r3, #2
800db80: 4413 add r3, r2
800db82: 00db lsls r3, r3, #3
800db84: 440b add r3, r1
800db86: 3312 adds r3, #18
800db88: 781b ldrb r3, [r3, #0]
800db8a: e00b b.n 800dba4 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800db8c: 78fb ldrb r3, [r7, #3]
800db8e: f003 027f and.w r2, r3, #127 @ 0x7f
800db92: 68f9 ldr r1, [r7, #12]
800db94: 4613 mov r3, r2
800db96: 009b lsls r3, r3, #2
800db98: 4413 add r3, r2
800db9a: 00db lsls r3, r3, #3
800db9c: 440b add r3, r1
800db9e: f503 73a9 add.w r3, r3, #338 @ 0x152
800dba2: 781b ldrb r3, [r3, #0]
}
}
800dba4: 4618 mov r0, r3
800dba6: 3714 adds r7, #20
800dba8: 46bd mov sp, r7
800dbaa: bc80 pop {r7}
800dbac: 4770 bx lr
0800dbae <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800dbae: b580 push {r7, lr}
800dbb0: b084 sub sp, #16
800dbb2: af00 add r7, sp, #0
800dbb4: 6078 str r0, [r7, #4]
800dbb6: 460b mov r3, r1
800dbb8: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800dbba: 2300 movs r3, #0
800dbbc: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800dbbe: 2300 movs r3, #0
800dbc0: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800dbc2: 687b ldr r3, [r7, #4]
800dbc4: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800dbc8: 78fa ldrb r2, [r7, #3]
800dbca: 4611 mov r1, r2
800dbcc: 4618 mov r0, r3
800dbce: f7f8 fc28 bl 8006422 <HAL_PCD_SetAddress>
800dbd2: 4603 mov r3, r0
800dbd4: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800dbd6: 7bfb ldrb r3, [r7, #15]
800dbd8: 4618 mov r0, r3
800dbda: f000 f881 bl 800dce0 <USBD_Get_USB_Status>
800dbde: 4603 mov r3, r0
800dbe0: 73bb strb r3, [r7, #14]
return usb_status;
800dbe2: 7bbb ldrb r3, [r7, #14]
}
800dbe4: 4618 mov r0, r3
800dbe6: 3710 adds r7, #16
800dbe8: 46bd mov sp, r7
800dbea: bd80 pop {r7, pc}
0800dbec <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800dbec: b580 push {r7, lr}
800dbee: b086 sub sp, #24
800dbf0: af00 add r7, sp, #0
800dbf2: 60f8 str r0, [r7, #12]
800dbf4: 607a str r2, [r7, #4]
800dbf6: 461a mov r2, r3
800dbf8: 460b mov r3, r1
800dbfa: 72fb strb r3, [r7, #11]
800dbfc: 4613 mov r3, r2
800dbfe: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800dc00: 2300 movs r3, #0
800dc02: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800dc04: 2300 movs r3, #0
800dc06: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800dc08: 68fb ldr r3, [r7, #12]
800dc0a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800dc0e: 893b ldrh r3, [r7, #8]
800dc10: 7af9 ldrb r1, [r7, #11]
800dc12: 687a ldr r2, [r7, #4]
800dc14: f7f8 fd16 bl 8006644 <HAL_PCD_EP_Transmit>
800dc18: 4603 mov r3, r0
800dc1a: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800dc1c: 7dfb ldrb r3, [r7, #23]
800dc1e: 4618 mov r0, r3
800dc20: f000 f85e bl 800dce0 <USBD_Get_USB_Status>
800dc24: 4603 mov r3, r0
800dc26: 75bb strb r3, [r7, #22]
return usb_status;
800dc28: 7dbb ldrb r3, [r7, #22]
}
800dc2a: 4618 mov r0, r3
800dc2c: 3718 adds r7, #24
800dc2e: 46bd mov sp, r7
800dc30: bd80 pop {r7, pc}
0800dc32 <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800dc32: b580 push {r7, lr}
800dc34: b086 sub sp, #24
800dc36: af00 add r7, sp, #0
800dc38: 60f8 str r0, [r7, #12]
800dc3a: 607a str r2, [r7, #4]
800dc3c: 461a mov r2, r3
800dc3e: 460b mov r3, r1
800dc40: 72fb strb r3, [r7, #11]
800dc42: 4613 mov r3, r2
800dc44: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800dc46: 2300 movs r3, #0
800dc48: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800dc4a: 2300 movs r3, #0
800dc4c: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800dc4e: 68fb ldr r3, [r7, #12]
800dc50: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800dc54: 893b ldrh r3, [r7, #8]
800dc56: 7af9 ldrb r1, [r7, #11]
800dc58: 687a ldr r2, [r7, #4]
800dc5a: f7f8 fcab bl 80065b4 <HAL_PCD_EP_Receive>
800dc5e: 4603 mov r3, r0
800dc60: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800dc62: 7dfb ldrb r3, [r7, #23]
800dc64: 4618 mov r0, r3
800dc66: f000 f83b bl 800dce0 <USBD_Get_USB_Status>
800dc6a: 4603 mov r3, r0
800dc6c: 75bb strb r3, [r7, #22]
return usb_status;
800dc6e: 7dbb ldrb r3, [r7, #22]
}
800dc70: 4618 mov r0, r3
800dc72: 3718 adds r7, #24
800dc74: 46bd mov sp, r7
800dc76: bd80 pop {r7, pc}
0800dc78 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800dc78: b580 push {r7, lr}
800dc7a: b082 sub sp, #8
800dc7c: af00 add r7, sp, #0
800dc7e: 6078 str r0, [r7, #4]
800dc80: 460b mov r3, r1
800dc82: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800dc84: 687b ldr r3, [r7, #4]
800dc86: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800dc8a: 78fa ldrb r2, [r7, #3]
800dc8c: 4611 mov r1, r2
800dc8e: 4618 mov r0, r3
800dc90: f7f8 fcc1 bl 8006616 <HAL_PCD_EP_GetRxCount>
800dc94: 4603 mov r3, r0
}
800dc96: 4618 mov r0, r3
800dc98: 3708 adds r7, #8
800dc9a: 46bd mov sp, r7
800dc9c: bd80 pop {r7, pc}
...
0800dca0 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800dca0: b480 push {r7}
800dca2: b083 sub sp, #12
800dca4: af00 add r7, sp, #0
800dca6: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800dca8: 4b02 ldr r3, [pc, #8] @ (800dcb4 <USBD_static_malloc+0x14>)
}
800dcaa: 4618 mov r0, r3
800dcac: 370c adds r7, #12
800dcae: 46bd mov sp, r7
800dcb0: bc80 pop {r7}
800dcb2: 4770 bx lr
800dcb4: 20001534 .word 0x20001534
0800dcb8 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800dcb8: b480 push {r7}
800dcba: b083 sub sp, #12
800dcbc: af00 add r7, sp, #0
800dcbe: 6078 str r0, [r7, #4]
}
800dcc0: bf00 nop
800dcc2: 370c adds r7, #12
800dcc4: 46bd mov sp, r7
800dcc6: bc80 pop {r7}
800dcc8: 4770 bx lr
0800dcca <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800dcca: b480 push {r7}
800dccc: b083 sub sp, #12
800dcce: af00 add r7, sp, #0
800dcd0: 6078 str r0, [r7, #4]
800dcd2: 460b mov r3, r1
800dcd4: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800dcd6: bf00 nop
800dcd8: 370c adds r7, #12
800dcda: 46bd mov sp, r7
800dcdc: bc80 pop {r7}
800dcde: 4770 bx lr
0800dce0 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800dce0: b480 push {r7}
800dce2: b085 sub sp, #20
800dce4: af00 add r7, sp, #0
800dce6: 4603 mov r3, r0
800dce8: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800dcea: 2300 movs r3, #0
800dcec: 73fb strb r3, [r7, #15]
switch (hal_status)
800dcee: 79fb ldrb r3, [r7, #7]
800dcf0: 2b03 cmp r3, #3
800dcf2: d817 bhi.n 800dd24 <USBD_Get_USB_Status+0x44>
800dcf4: a201 add r2, pc, #4 @ (adr r2, 800dcfc <USBD_Get_USB_Status+0x1c>)
800dcf6: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800dcfa: bf00 nop
800dcfc: 0800dd0d .word 0x0800dd0d
800dd00: 0800dd13 .word 0x0800dd13
800dd04: 0800dd19 .word 0x0800dd19
800dd08: 0800dd1f .word 0x0800dd1f
{
case HAL_OK :
usb_status = USBD_OK;
800dd0c: 2300 movs r3, #0
800dd0e: 73fb strb r3, [r7, #15]
break;
800dd10: e00b b.n 800dd2a <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800dd12: 2302 movs r3, #2
800dd14: 73fb strb r3, [r7, #15]
break;
800dd16: e008 b.n 800dd2a <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800dd18: 2301 movs r3, #1
800dd1a: 73fb strb r3, [r7, #15]
break;
800dd1c: e005 b.n 800dd2a <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800dd1e: 2302 movs r3, #2
800dd20: 73fb strb r3, [r7, #15]
break;
800dd22: e002 b.n 800dd2a <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800dd24: 2302 movs r3, #2
800dd26: 73fb strb r3, [r7, #15]
break;
800dd28: bf00 nop
}
return usb_status;
800dd2a: 7bfb ldrb r3, [r7, #15]
}
800dd2c: 4618 mov r0, r3
800dd2e: 3714 adds r7, #20
800dd30: 46bd mov sp, r7
800dd32: bc80 pop {r7}
800dd34: 4770 bx lr
800dd36: bf00 nop
0800dd38 <siprintf>:
800dd38: b40e push {r1, r2, r3}
800dd3a: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800dd3e: b510 push {r4, lr}
800dd40: 2400 movs r4, #0
800dd42: b09d sub sp, #116 @ 0x74
800dd44: ab1f add r3, sp, #124 @ 0x7c
800dd46: 9002 str r0, [sp, #8]
800dd48: 9006 str r0, [sp, #24]
800dd4a: 9107 str r1, [sp, #28]
800dd4c: 9104 str r1, [sp, #16]
800dd4e: 4809 ldr r0, [pc, #36] @ (800dd74 <siprintf+0x3c>)
800dd50: 4909 ldr r1, [pc, #36] @ (800dd78 <siprintf+0x40>)
800dd52: f853 2b04 ldr.w r2, [r3], #4
800dd56: 9105 str r1, [sp, #20]
800dd58: 6800 ldr r0, [r0, #0]
800dd5a: a902 add r1, sp, #8
800dd5c: 9301 str r3, [sp, #4]
800dd5e: 941b str r4, [sp, #108] @ 0x6c
800dd60: f000 f992 bl 800e088 <_svfiprintf_r>
800dd64: 9b02 ldr r3, [sp, #8]
800dd66: 701c strb r4, [r3, #0]
800dd68: b01d add sp, #116 @ 0x74
800dd6a: e8bd 4010 ldmia.w sp!, {r4, lr}
800dd6e: b003 add sp, #12
800dd70: 4770 bx lr
800dd72: bf00 nop
800dd74: 2000018c .word 0x2000018c
800dd78: ffff0208 .word 0xffff0208
0800dd7c <memset>:
800dd7c: 4603 mov r3, r0
800dd7e: 4402 add r2, r0
800dd80: 4293 cmp r3, r2
800dd82: d100 bne.n 800dd86 <memset+0xa>
800dd84: 4770 bx lr
800dd86: f803 1b01 strb.w r1, [r3], #1
800dd8a: e7f9 b.n 800dd80 <memset+0x4>
0800dd8c <__errno>:
800dd8c: 4b01 ldr r3, [pc, #4] @ (800dd94 <__errno+0x8>)
800dd8e: 6818 ldr r0, [r3, #0]
800dd90: 4770 bx lr
800dd92: bf00 nop
800dd94: 2000018c .word 0x2000018c
0800dd98 <__libc_init_array>:
800dd98: b570 push {r4, r5, r6, lr}
800dd9a: 2600 movs r6, #0
800dd9c: 4d0c ldr r5, [pc, #48] @ (800ddd0 <__libc_init_array+0x38>)
800dd9e: 4c0d ldr r4, [pc, #52] @ (800ddd4 <__libc_init_array+0x3c>)
800dda0: 1b64 subs r4, r4, r5
800dda2: 10a4 asrs r4, r4, #2
800dda4: 42a6 cmp r6, r4
800dda6: d109 bne.n 800ddbc <__libc_init_array+0x24>
800dda8: f000 fc76 bl 800e698 <_init>
800ddac: 2600 movs r6, #0
800ddae: 4d0a ldr r5, [pc, #40] @ (800ddd8 <__libc_init_array+0x40>)
800ddb0: 4c0a ldr r4, [pc, #40] @ (800dddc <__libc_init_array+0x44>)
800ddb2: 1b64 subs r4, r4, r5
800ddb4: 10a4 asrs r4, r4, #2
800ddb6: 42a6 cmp r6, r4
800ddb8: d105 bne.n 800ddc6 <__libc_init_array+0x2e>
800ddba: bd70 pop {r4, r5, r6, pc}
800ddbc: f855 3b04 ldr.w r3, [r5], #4
800ddc0: 4798 blx r3
800ddc2: 3601 adds r6, #1
800ddc4: e7ee b.n 800dda4 <__libc_init_array+0xc>
800ddc6: f855 3b04 ldr.w r3, [r5], #4
800ddca: 4798 blx r3
800ddcc: 3601 adds r6, #1
800ddce: e7f2 b.n 800ddb6 <__libc_init_array+0x1e>
800ddd0: 0800ecc8 .word 0x0800ecc8
800ddd4: 0800ecc8 .word 0x0800ecc8
800ddd8: 0800ecc8 .word 0x0800ecc8
800dddc: 0800eccc .word 0x0800eccc
0800dde0 <__retarget_lock_acquire_recursive>:
800dde0: 4770 bx lr
0800dde2 <__retarget_lock_release_recursive>:
800dde2: 4770 bx lr
0800dde4 <_free_r>:
800dde4: b538 push {r3, r4, r5, lr}
800dde6: 4605 mov r5, r0
800dde8: 2900 cmp r1, #0
800ddea: d040 beq.n 800de6e <_free_r+0x8a>
800ddec: f851 3c04 ldr.w r3, [r1, #-4]
800ddf0: 1f0c subs r4, r1, #4
800ddf2: 2b00 cmp r3, #0
800ddf4: bfb8 it lt
800ddf6: 18e4 addlt r4, r4, r3
800ddf8: f000 f8de bl 800dfb8 <__malloc_lock>
800ddfc: 4a1c ldr r2, [pc, #112] @ (800de70 <_free_r+0x8c>)
800ddfe: 6813 ldr r3, [r2, #0]
800de00: b933 cbnz r3, 800de10 <_free_r+0x2c>
800de02: 6063 str r3, [r4, #4]
800de04: 6014 str r4, [r2, #0]
800de06: 4628 mov r0, r5
800de08: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800de0c: f000 b8da b.w 800dfc4 <__malloc_unlock>
800de10: 42a3 cmp r3, r4
800de12: d908 bls.n 800de26 <_free_r+0x42>
800de14: 6820 ldr r0, [r4, #0]
800de16: 1821 adds r1, r4, r0
800de18: 428b cmp r3, r1
800de1a: bf01 itttt eq
800de1c: 6819 ldreq r1, [r3, #0]
800de1e: 685b ldreq r3, [r3, #4]
800de20: 1809 addeq r1, r1, r0
800de22: 6021 streq r1, [r4, #0]
800de24: e7ed b.n 800de02 <_free_r+0x1e>
800de26: 461a mov r2, r3
800de28: 685b ldr r3, [r3, #4]
800de2a: b10b cbz r3, 800de30 <_free_r+0x4c>
800de2c: 42a3 cmp r3, r4
800de2e: d9fa bls.n 800de26 <_free_r+0x42>
800de30: 6811 ldr r1, [r2, #0]
800de32: 1850 adds r0, r2, r1
800de34: 42a0 cmp r0, r4
800de36: d10b bne.n 800de50 <_free_r+0x6c>
800de38: 6820 ldr r0, [r4, #0]
800de3a: 4401 add r1, r0
800de3c: 1850 adds r0, r2, r1
800de3e: 4283 cmp r3, r0
800de40: 6011 str r1, [r2, #0]
800de42: d1e0 bne.n 800de06 <_free_r+0x22>
800de44: 6818 ldr r0, [r3, #0]
800de46: 685b ldr r3, [r3, #4]
800de48: 4408 add r0, r1
800de4a: 6010 str r0, [r2, #0]
800de4c: 6053 str r3, [r2, #4]
800de4e: e7da b.n 800de06 <_free_r+0x22>
800de50: d902 bls.n 800de58 <_free_r+0x74>
800de52: 230c movs r3, #12
800de54: 602b str r3, [r5, #0]
800de56: e7d6 b.n 800de06 <_free_r+0x22>
800de58: 6820 ldr r0, [r4, #0]
800de5a: 1821 adds r1, r4, r0
800de5c: 428b cmp r3, r1
800de5e: bf01 itttt eq
800de60: 6819 ldreq r1, [r3, #0]
800de62: 685b ldreq r3, [r3, #4]
800de64: 1809 addeq r1, r1, r0
800de66: 6021 streq r1, [r4, #0]
800de68: 6063 str r3, [r4, #4]
800de6a: 6054 str r4, [r2, #4]
800de6c: e7cb b.n 800de06 <_free_r+0x22>
800de6e: bd38 pop {r3, r4, r5, pc}
800de70: 20001898 .word 0x20001898
0800de74 <sbrk_aligned>:
800de74: b570 push {r4, r5, r6, lr}
800de76: 4e0f ldr r6, [pc, #60] @ (800deb4 <sbrk_aligned+0x40>)
800de78: 460c mov r4, r1
800de7a: 6831 ldr r1, [r6, #0]
800de7c: 4605 mov r5, r0
800de7e: b911 cbnz r1, 800de86 <sbrk_aligned+0x12>
800de80: f000 fba8 bl 800e5d4 <_sbrk_r>
800de84: 6030 str r0, [r6, #0]
800de86: 4621 mov r1, r4
800de88: 4628 mov r0, r5
800de8a: f000 fba3 bl 800e5d4 <_sbrk_r>
800de8e: 1c43 adds r3, r0, #1
800de90: d103 bne.n 800de9a <sbrk_aligned+0x26>
800de92: f04f 34ff mov.w r4, #4294967295
800de96: 4620 mov r0, r4
800de98: bd70 pop {r4, r5, r6, pc}
800de9a: 1cc4 adds r4, r0, #3
800de9c: f024 0403 bic.w r4, r4, #3
800dea0: 42a0 cmp r0, r4
800dea2: d0f8 beq.n 800de96 <sbrk_aligned+0x22>
800dea4: 1a21 subs r1, r4, r0
800dea6: 4628 mov r0, r5
800dea8: f000 fb94 bl 800e5d4 <_sbrk_r>
800deac: 3001 adds r0, #1
800deae: d1f2 bne.n 800de96 <sbrk_aligned+0x22>
800deb0: e7ef b.n 800de92 <sbrk_aligned+0x1e>
800deb2: bf00 nop
800deb4: 20001894 .word 0x20001894
0800deb8 <_malloc_r>:
800deb8: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800debc: 1ccd adds r5, r1, #3
800debe: f025 0503 bic.w r5, r5, #3
800dec2: 3508 adds r5, #8
800dec4: 2d0c cmp r5, #12
800dec6: bf38 it cc
800dec8: 250c movcc r5, #12
800deca: 2d00 cmp r5, #0
800decc: 4606 mov r6, r0
800dece: db01 blt.n 800ded4 <_malloc_r+0x1c>
800ded0: 42a9 cmp r1, r5
800ded2: d904 bls.n 800dede <_malloc_r+0x26>
800ded4: 230c movs r3, #12
800ded6: 6033 str r3, [r6, #0]
800ded8: 2000 movs r0, #0
800deda: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800dede: f8df 80d4 ldr.w r8, [pc, #212] @ 800dfb4 <_malloc_r+0xfc>
800dee2: f000 f869 bl 800dfb8 <__malloc_lock>
800dee6: f8d8 3000 ldr.w r3, [r8]
800deea: 461c mov r4, r3
800deec: bb44 cbnz r4, 800df40 <_malloc_r+0x88>
800deee: 4629 mov r1, r5
800def0: 4630 mov r0, r6
800def2: f7ff ffbf bl 800de74 <sbrk_aligned>
800def6: 1c43 adds r3, r0, #1
800def8: 4604 mov r4, r0
800defa: d158 bne.n 800dfae <_malloc_r+0xf6>
800defc: f8d8 4000 ldr.w r4, [r8]
800df00: 4627 mov r7, r4
800df02: 2f00 cmp r7, #0
800df04: d143 bne.n 800df8e <_malloc_r+0xd6>
800df06: 2c00 cmp r4, #0
800df08: d04b beq.n 800dfa2 <_malloc_r+0xea>
800df0a: 6823 ldr r3, [r4, #0]
800df0c: 4639 mov r1, r7
800df0e: 4630 mov r0, r6
800df10: eb04 0903 add.w r9, r4, r3
800df14: f000 fb5e bl 800e5d4 <_sbrk_r>
800df18: 4581 cmp r9, r0
800df1a: d142 bne.n 800dfa2 <_malloc_r+0xea>
800df1c: 6821 ldr r1, [r4, #0]
800df1e: 4630 mov r0, r6
800df20: 1a6d subs r5, r5, r1
800df22: 4629 mov r1, r5
800df24: f7ff ffa6 bl 800de74 <sbrk_aligned>
800df28: 3001 adds r0, #1
800df2a: d03a beq.n 800dfa2 <_malloc_r+0xea>
800df2c: 6823 ldr r3, [r4, #0]
800df2e: 442b add r3, r5
800df30: 6023 str r3, [r4, #0]
800df32: f8d8 3000 ldr.w r3, [r8]
800df36: 685a ldr r2, [r3, #4]
800df38: bb62 cbnz r2, 800df94 <_malloc_r+0xdc>
800df3a: f8c8 7000 str.w r7, [r8]
800df3e: e00f b.n 800df60 <_malloc_r+0xa8>
800df40: 6822 ldr r2, [r4, #0]
800df42: 1b52 subs r2, r2, r5
800df44: d420 bmi.n 800df88 <_malloc_r+0xd0>
800df46: 2a0b cmp r2, #11
800df48: d917 bls.n 800df7a <_malloc_r+0xc2>
800df4a: 1961 adds r1, r4, r5
800df4c: 42a3 cmp r3, r4
800df4e: 6025 str r5, [r4, #0]
800df50: bf18 it ne
800df52: 6059 strne r1, [r3, #4]
800df54: 6863 ldr r3, [r4, #4]
800df56: bf08 it eq
800df58: f8c8 1000 streq.w r1, [r8]
800df5c: 5162 str r2, [r4, r5]
800df5e: 604b str r3, [r1, #4]
800df60: 4630 mov r0, r6
800df62: f000 f82f bl 800dfc4 <__malloc_unlock>
800df66: f104 000b add.w r0, r4, #11
800df6a: 1d23 adds r3, r4, #4
800df6c: f020 0007 bic.w r0, r0, #7
800df70: 1ac2 subs r2, r0, r3
800df72: bf1c itt ne
800df74: 1a1b subne r3, r3, r0
800df76: 50a3 strne r3, [r4, r2]
800df78: e7af b.n 800deda <_malloc_r+0x22>
800df7a: 6862 ldr r2, [r4, #4]
800df7c: 42a3 cmp r3, r4
800df7e: bf0c ite eq
800df80: f8c8 2000 streq.w r2, [r8]
800df84: 605a strne r2, [r3, #4]
800df86: e7eb b.n 800df60 <_malloc_r+0xa8>
800df88: 4623 mov r3, r4
800df8a: 6864 ldr r4, [r4, #4]
800df8c: e7ae b.n 800deec <_malloc_r+0x34>
800df8e: 463c mov r4, r7
800df90: 687f ldr r7, [r7, #4]
800df92: e7b6 b.n 800df02 <_malloc_r+0x4a>
800df94: 461a mov r2, r3
800df96: 685b ldr r3, [r3, #4]
800df98: 42a3 cmp r3, r4
800df9a: d1fb bne.n 800df94 <_malloc_r+0xdc>
800df9c: 2300 movs r3, #0
800df9e: 6053 str r3, [r2, #4]
800dfa0: e7de b.n 800df60 <_malloc_r+0xa8>
800dfa2: 230c movs r3, #12
800dfa4: 4630 mov r0, r6
800dfa6: 6033 str r3, [r6, #0]
800dfa8: f000 f80c bl 800dfc4 <__malloc_unlock>
800dfac: e794 b.n 800ded8 <_malloc_r+0x20>
800dfae: 6005 str r5, [r0, #0]
800dfb0: e7d6 b.n 800df60 <_malloc_r+0xa8>
800dfb2: bf00 nop
800dfb4: 20001898 .word 0x20001898
0800dfb8 <__malloc_lock>:
800dfb8: 4801 ldr r0, [pc, #4] @ (800dfc0 <__malloc_lock+0x8>)
800dfba: f7ff bf11 b.w 800dde0 <__retarget_lock_acquire_recursive>
800dfbe: bf00 nop
800dfc0: 20001890 .word 0x20001890
0800dfc4 <__malloc_unlock>:
800dfc4: 4801 ldr r0, [pc, #4] @ (800dfcc <__malloc_unlock+0x8>)
800dfc6: f7ff bf0c b.w 800dde2 <__retarget_lock_release_recursive>
800dfca: bf00 nop
800dfcc: 20001890 .word 0x20001890
0800dfd0 <__ssputs_r>:
800dfd0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800dfd4: 461f mov r7, r3
800dfd6: 688e ldr r6, [r1, #8]
800dfd8: 4682 mov sl, r0
800dfda: 42be cmp r6, r7
800dfdc: 460c mov r4, r1
800dfde: 4690 mov r8, r2
800dfe0: 680b ldr r3, [r1, #0]
800dfe2: d82d bhi.n 800e040 <__ssputs_r+0x70>
800dfe4: f9b1 200c ldrsh.w r2, [r1, #12]
800dfe8: f412 6f90 tst.w r2, #1152 @ 0x480
800dfec: d026 beq.n 800e03c <__ssputs_r+0x6c>
800dfee: 6965 ldr r5, [r4, #20]
800dff0: 6909 ldr r1, [r1, #16]
800dff2: eb05 0545 add.w r5, r5, r5, lsl #1
800dff6: eba3 0901 sub.w r9, r3, r1
800dffa: eb05 75d5 add.w r5, r5, r5, lsr #31
800dffe: 1c7b adds r3, r7, #1
800e000: 444b add r3, r9
800e002: 106d asrs r5, r5, #1
800e004: 429d cmp r5, r3
800e006: bf38 it cc
800e008: 461d movcc r5, r3
800e00a: 0553 lsls r3, r2, #21
800e00c: d527 bpl.n 800e05e <__ssputs_r+0x8e>
800e00e: 4629 mov r1, r5
800e010: f7ff ff52 bl 800deb8 <_malloc_r>
800e014: 4606 mov r6, r0
800e016: b360 cbz r0, 800e072 <__ssputs_r+0xa2>
800e018: 464a mov r2, r9
800e01a: 6921 ldr r1, [r4, #16]
800e01c: f000 faf8 bl 800e610 <memcpy>
800e020: 89a3 ldrh r3, [r4, #12]
800e022: f423 6390 bic.w r3, r3, #1152 @ 0x480
800e026: f043 0380 orr.w r3, r3, #128 @ 0x80
800e02a: 81a3 strh r3, [r4, #12]
800e02c: 6126 str r6, [r4, #16]
800e02e: 444e add r6, r9
800e030: 6026 str r6, [r4, #0]
800e032: 463e mov r6, r7
800e034: 6165 str r5, [r4, #20]
800e036: eba5 0509 sub.w r5, r5, r9
800e03a: 60a5 str r5, [r4, #8]
800e03c: 42be cmp r6, r7
800e03e: d900 bls.n 800e042 <__ssputs_r+0x72>
800e040: 463e mov r6, r7
800e042: 4632 mov r2, r6
800e044: 4641 mov r1, r8
800e046: 6820 ldr r0, [r4, #0]
800e048: f000 faaa bl 800e5a0 <memmove>
800e04c: 2000 movs r0, #0
800e04e: 68a3 ldr r3, [r4, #8]
800e050: 1b9b subs r3, r3, r6
800e052: 60a3 str r3, [r4, #8]
800e054: 6823 ldr r3, [r4, #0]
800e056: 4433 add r3, r6
800e058: 6023 str r3, [r4, #0]
800e05a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e05e: 462a mov r2, r5
800e060: f000 fae4 bl 800e62c <_realloc_r>
800e064: 4606 mov r6, r0
800e066: 2800 cmp r0, #0
800e068: d1e0 bne.n 800e02c <__ssputs_r+0x5c>
800e06a: 4650 mov r0, sl
800e06c: 6921 ldr r1, [r4, #16]
800e06e: f7ff feb9 bl 800dde4 <_free_r>
800e072: 230c movs r3, #12
800e074: f8ca 3000 str.w r3, [sl]
800e078: 89a3 ldrh r3, [r4, #12]
800e07a: f04f 30ff mov.w r0, #4294967295
800e07e: f043 0340 orr.w r3, r3, #64 @ 0x40
800e082: 81a3 strh r3, [r4, #12]
800e084: e7e9 b.n 800e05a <__ssputs_r+0x8a>
...
0800e088 <_svfiprintf_r>:
800e088: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800e08c: 4698 mov r8, r3
800e08e: 898b ldrh r3, [r1, #12]
800e090: 4607 mov r7, r0
800e092: 061b lsls r3, r3, #24
800e094: 460d mov r5, r1
800e096: 4614 mov r4, r2
800e098: b09d sub sp, #116 @ 0x74
800e09a: d510 bpl.n 800e0be <_svfiprintf_r+0x36>
800e09c: 690b ldr r3, [r1, #16]
800e09e: b973 cbnz r3, 800e0be <_svfiprintf_r+0x36>
800e0a0: 2140 movs r1, #64 @ 0x40
800e0a2: f7ff ff09 bl 800deb8 <_malloc_r>
800e0a6: 6028 str r0, [r5, #0]
800e0a8: 6128 str r0, [r5, #16]
800e0aa: b930 cbnz r0, 800e0ba <_svfiprintf_r+0x32>
800e0ac: 230c movs r3, #12
800e0ae: 603b str r3, [r7, #0]
800e0b0: f04f 30ff mov.w r0, #4294967295
800e0b4: b01d add sp, #116 @ 0x74
800e0b6: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800e0ba: 2340 movs r3, #64 @ 0x40
800e0bc: 616b str r3, [r5, #20]
800e0be: 2300 movs r3, #0
800e0c0: 9309 str r3, [sp, #36] @ 0x24
800e0c2: 2320 movs r3, #32
800e0c4: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800e0c8: 2330 movs r3, #48 @ 0x30
800e0ca: f04f 0901 mov.w r9, #1
800e0ce: f8cd 800c str.w r8, [sp, #12]
800e0d2: f8df 8198 ldr.w r8, [pc, #408] @ 800e26c <_svfiprintf_r+0x1e4>
800e0d6: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800e0da: 4623 mov r3, r4
800e0dc: 469a mov sl, r3
800e0de: f813 2b01 ldrb.w r2, [r3], #1
800e0e2: b10a cbz r2, 800e0e8 <_svfiprintf_r+0x60>
800e0e4: 2a25 cmp r2, #37 @ 0x25
800e0e6: d1f9 bne.n 800e0dc <_svfiprintf_r+0x54>
800e0e8: ebba 0b04 subs.w fp, sl, r4
800e0ec: d00b beq.n 800e106 <_svfiprintf_r+0x7e>
800e0ee: 465b mov r3, fp
800e0f0: 4622 mov r2, r4
800e0f2: 4629 mov r1, r5
800e0f4: 4638 mov r0, r7
800e0f6: f7ff ff6b bl 800dfd0 <__ssputs_r>
800e0fa: 3001 adds r0, #1
800e0fc: f000 80a7 beq.w 800e24e <_svfiprintf_r+0x1c6>
800e100: 9a09 ldr r2, [sp, #36] @ 0x24
800e102: 445a add r2, fp
800e104: 9209 str r2, [sp, #36] @ 0x24
800e106: f89a 3000 ldrb.w r3, [sl]
800e10a: 2b00 cmp r3, #0
800e10c: f000 809f beq.w 800e24e <_svfiprintf_r+0x1c6>
800e110: 2300 movs r3, #0
800e112: f04f 32ff mov.w r2, #4294967295
800e116: e9cd 2305 strd r2, r3, [sp, #20]
800e11a: f10a 0a01 add.w sl, sl, #1
800e11e: 9304 str r3, [sp, #16]
800e120: 9307 str r3, [sp, #28]
800e122: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800e126: 931a str r3, [sp, #104] @ 0x68
800e128: 4654 mov r4, sl
800e12a: 2205 movs r2, #5
800e12c: f814 1b01 ldrb.w r1, [r4], #1
800e130: 484e ldr r0, [pc, #312] @ (800e26c <_svfiprintf_r+0x1e4>)
800e132: f000 fa5f bl 800e5f4 <memchr>
800e136: 9a04 ldr r2, [sp, #16]
800e138: b9d8 cbnz r0, 800e172 <_svfiprintf_r+0xea>
800e13a: 06d0 lsls r0, r2, #27
800e13c: bf44 itt mi
800e13e: 2320 movmi r3, #32
800e140: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e144: 0711 lsls r1, r2, #28
800e146: bf44 itt mi
800e148: 232b movmi r3, #43 @ 0x2b
800e14a: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e14e: f89a 3000 ldrb.w r3, [sl]
800e152: 2b2a cmp r3, #42 @ 0x2a
800e154: d015 beq.n 800e182 <_svfiprintf_r+0xfa>
800e156: 4654 mov r4, sl
800e158: 2000 movs r0, #0
800e15a: f04f 0c0a mov.w ip, #10
800e15e: 9a07 ldr r2, [sp, #28]
800e160: 4621 mov r1, r4
800e162: f811 3b01 ldrb.w r3, [r1], #1
800e166: 3b30 subs r3, #48 @ 0x30
800e168: 2b09 cmp r3, #9
800e16a: d94b bls.n 800e204 <_svfiprintf_r+0x17c>
800e16c: b1b0 cbz r0, 800e19c <_svfiprintf_r+0x114>
800e16e: 9207 str r2, [sp, #28]
800e170: e014 b.n 800e19c <_svfiprintf_r+0x114>
800e172: eba0 0308 sub.w r3, r0, r8
800e176: fa09 f303 lsl.w r3, r9, r3
800e17a: 4313 orrs r3, r2
800e17c: 46a2 mov sl, r4
800e17e: 9304 str r3, [sp, #16]
800e180: e7d2 b.n 800e128 <_svfiprintf_r+0xa0>
800e182: 9b03 ldr r3, [sp, #12]
800e184: 1d19 adds r1, r3, #4
800e186: 681b ldr r3, [r3, #0]
800e188: 9103 str r1, [sp, #12]
800e18a: 2b00 cmp r3, #0
800e18c: bfbb ittet lt
800e18e: 425b neglt r3, r3
800e190: f042 0202 orrlt.w r2, r2, #2
800e194: 9307 strge r3, [sp, #28]
800e196: 9307 strlt r3, [sp, #28]
800e198: bfb8 it lt
800e19a: 9204 strlt r2, [sp, #16]
800e19c: 7823 ldrb r3, [r4, #0]
800e19e: 2b2e cmp r3, #46 @ 0x2e
800e1a0: d10a bne.n 800e1b8 <_svfiprintf_r+0x130>
800e1a2: 7863 ldrb r3, [r4, #1]
800e1a4: 2b2a cmp r3, #42 @ 0x2a
800e1a6: d132 bne.n 800e20e <_svfiprintf_r+0x186>
800e1a8: 9b03 ldr r3, [sp, #12]
800e1aa: 3402 adds r4, #2
800e1ac: 1d1a adds r2, r3, #4
800e1ae: 681b ldr r3, [r3, #0]
800e1b0: 9203 str r2, [sp, #12]
800e1b2: ea43 73e3 orr.w r3, r3, r3, asr #31
800e1b6: 9305 str r3, [sp, #20]
800e1b8: f8df a0b4 ldr.w sl, [pc, #180] @ 800e270 <_svfiprintf_r+0x1e8>
800e1bc: 2203 movs r2, #3
800e1be: 4650 mov r0, sl
800e1c0: 7821 ldrb r1, [r4, #0]
800e1c2: f000 fa17 bl 800e5f4 <memchr>
800e1c6: b138 cbz r0, 800e1d8 <_svfiprintf_r+0x150>
800e1c8: 2240 movs r2, #64 @ 0x40
800e1ca: 9b04 ldr r3, [sp, #16]
800e1cc: eba0 000a sub.w r0, r0, sl
800e1d0: 4082 lsls r2, r0
800e1d2: 4313 orrs r3, r2
800e1d4: 3401 adds r4, #1
800e1d6: 9304 str r3, [sp, #16]
800e1d8: f814 1b01 ldrb.w r1, [r4], #1
800e1dc: 2206 movs r2, #6
800e1de: 4825 ldr r0, [pc, #148] @ (800e274 <_svfiprintf_r+0x1ec>)
800e1e0: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800e1e4: f000 fa06 bl 800e5f4 <memchr>
800e1e8: 2800 cmp r0, #0
800e1ea: d036 beq.n 800e25a <_svfiprintf_r+0x1d2>
800e1ec: 4b22 ldr r3, [pc, #136] @ (800e278 <_svfiprintf_r+0x1f0>)
800e1ee: bb1b cbnz r3, 800e238 <_svfiprintf_r+0x1b0>
800e1f0: 9b03 ldr r3, [sp, #12]
800e1f2: 3307 adds r3, #7
800e1f4: f023 0307 bic.w r3, r3, #7
800e1f8: 3308 adds r3, #8
800e1fa: 9303 str r3, [sp, #12]
800e1fc: 9b09 ldr r3, [sp, #36] @ 0x24
800e1fe: 4433 add r3, r6
800e200: 9309 str r3, [sp, #36] @ 0x24
800e202: e76a b.n 800e0da <_svfiprintf_r+0x52>
800e204: 460c mov r4, r1
800e206: 2001 movs r0, #1
800e208: fb0c 3202 mla r2, ip, r2, r3
800e20c: e7a8 b.n 800e160 <_svfiprintf_r+0xd8>
800e20e: 2300 movs r3, #0
800e210: f04f 0c0a mov.w ip, #10
800e214: 4619 mov r1, r3
800e216: 3401 adds r4, #1
800e218: 9305 str r3, [sp, #20]
800e21a: 4620 mov r0, r4
800e21c: f810 2b01 ldrb.w r2, [r0], #1
800e220: 3a30 subs r2, #48 @ 0x30
800e222: 2a09 cmp r2, #9
800e224: d903 bls.n 800e22e <_svfiprintf_r+0x1a6>
800e226: 2b00 cmp r3, #0
800e228: d0c6 beq.n 800e1b8 <_svfiprintf_r+0x130>
800e22a: 9105 str r1, [sp, #20]
800e22c: e7c4 b.n 800e1b8 <_svfiprintf_r+0x130>
800e22e: 4604 mov r4, r0
800e230: 2301 movs r3, #1
800e232: fb0c 2101 mla r1, ip, r1, r2
800e236: e7f0 b.n 800e21a <_svfiprintf_r+0x192>
800e238: ab03 add r3, sp, #12
800e23a: 9300 str r3, [sp, #0]
800e23c: 462a mov r2, r5
800e23e: 4638 mov r0, r7
800e240: 4b0e ldr r3, [pc, #56] @ (800e27c <_svfiprintf_r+0x1f4>)
800e242: a904 add r1, sp, #16
800e244: f3af 8000 nop.w
800e248: 1c42 adds r2, r0, #1
800e24a: 4606 mov r6, r0
800e24c: d1d6 bne.n 800e1fc <_svfiprintf_r+0x174>
800e24e: 89ab ldrh r3, [r5, #12]
800e250: 065b lsls r3, r3, #25
800e252: f53f af2d bmi.w 800e0b0 <_svfiprintf_r+0x28>
800e256: 9809 ldr r0, [sp, #36] @ 0x24
800e258: e72c b.n 800e0b4 <_svfiprintf_r+0x2c>
800e25a: ab03 add r3, sp, #12
800e25c: 9300 str r3, [sp, #0]
800e25e: 462a mov r2, r5
800e260: 4638 mov r0, r7
800e262: 4b06 ldr r3, [pc, #24] @ (800e27c <_svfiprintf_r+0x1f4>)
800e264: a904 add r1, sp, #16
800e266: f000 f87d bl 800e364 <_printf_i>
800e26a: e7ed b.n 800e248 <_svfiprintf_r+0x1c0>
800e26c: 0800ec8a .word 0x0800ec8a
800e270: 0800ec90 .word 0x0800ec90
800e274: 0800ec94 .word 0x0800ec94
800e278: 00000000 .word 0x00000000
800e27c: 0800dfd1 .word 0x0800dfd1
0800e280 <_printf_common>:
800e280: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e284: 4616 mov r6, r2
800e286: 4698 mov r8, r3
800e288: 688a ldr r2, [r1, #8]
800e28a: 690b ldr r3, [r1, #16]
800e28c: 4607 mov r7, r0
800e28e: 4293 cmp r3, r2
800e290: bfb8 it lt
800e292: 4613 movlt r3, r2
800e294: 6033 str r3, [r6, #0]
800e296: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800e29a: 460c mov r4, r1
800e29c: f8dd 9020 ldr.w r9, [sp, #32]
800e2a0: b10a cbz r2, 800e2a6 <_printf_common+0x26>
800e2a2: 3301 adds r3, #1
800e2a4: 6033 str r3, [r6, #0]
800e2a6: 6823 ldr r3, [r4, #0]
800e2a8: 0699 lsls r1, r3, #26
800e2aa: bf42 ittt mi
800e2ac: 6833 ldrmi r3, [r6, #0]
800e2ae: 3302 addmi r3, #2
800e2b0: 6033 strmi r3, [r6, #0]
800e2b2: 6825 ldr r5, [r4, #0]
800e2b4: f015 0506 ands.w r5, r5, #6
800e2b8: d106 bne.n 800e2c8 <_printf_common+0x48>
800e2ba: f104 0a19 add.w sl, r4, #25
800e2be: 68e3 ldr r3, [r4, #12]
800e2c0: 6832 ldr r2, [r6, #0]
800e2c2: 1a9b subs r3, r3, r2
800e2c4: 42ab cmp r3, r5
800e2c6: dc2b bgt.n 800e320 <_printf_common+0xa0>
800e2c8: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800e2cc: 6822 ldr r2, [r4, #0]
800e2ce: 3b00 subs r3, #0
800e2d0: bf18 it ne
800e2d2: 2301 movne r3, #1
800e2d4: 0692 lsls r2, r2, #26
800e2d6: d430 bmi.n 800e33a <_printf_common+0xba>
800e2d8: 4641 mov r1, r8
800e2da: 4638 mov r0, r7
800e2dc: f104 0243 add.w r2, r4, #67 @ 0x43
800e2e0: 47c8 blx r9
800e2e2: 3001 adds r0, #1
800e2e4: d023 beq.n 800e32e <_printf_common+0xae>
800e2e6: 6823 ldr r3, [r4, #0]
800e2e8: 6922 ldr r2, [r4, #16]
800e2ea: f003 0306 and.w r3, r3, #6
800e2ee: 2b04 cmp r3, #4
800e2f0: bf14 ite ne
800e2f2: 2500 movne r5, #0
800e2f4: 6833 ldreq r3, [r6, #0]
800e2f6: f04f 0600 mov.w r6, #0
800e2fa: bf08 it eq
800e2fc: 68e5 ldreq r5, [r4, #12]
800e2fe: f104 041a add.w r4, r4, #26
800e302: bf08 it eq
800e304: 1aed subeq r5, r5, r3
800e306: f854 3c12 ldr.w r3, [r4, #-18]
800e30a: bf08 it eq
800e30c: ea25 75e5 biceq.w r5, r5, r5, asr #31
800e310: 4293 cmp r3, r2
800e312: bfc4 itt gt
800e314: 1a9b subgt r3, r3, r2
800e316: 18ed addgt r5, r5, r3
800e318: 42b5 cmp r5, r6
800e31a: d11a bne.n 800e352 <_printf_common+0xd2>
800e31c: 2000 movs r0, #0
800e31e: e008 b.n 800e332 <_printf_common+0xb2>
800e320: 2301 movs r3, #1
800e322: 4652 mov r2, sl
800e324: 4641 mov r1, r8
800e326: 4638 mov r0, r7
800e328: 47c8 blx r9
800e32a: 3001 adds r0, #1
800e32c: d103 bne.n 800e336 <_printf_common+0xb6>
800e32e: f04f 30ff mov.w r0, #4294967295
800e332: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e336: 3501 adds r5, #1
800e338: e7c1 b.n 800e2be <_printf_common+0x3e>
800e33a: 2030 movs r0, #48 @ 0x30
800e33c: 18e1 adds r1, r4, r3
800e33e: f881 0043 strb.w r0, [r1, #67] @ 0x43
800e342: 1c5a adds r2, r3, #1
800e344: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800e348: 4422 add r2, r4
800e34a: 3302 adds r3, #2
800e34c: f882 1043 strb.w r1, [r2, #67] @ 0x43
800e350: e7c2 b.n 800e2d8 <_printf_common+0x58>
800e352: 2301 movs r3, #1
800e354: 4622 mov r2, r4
800e356: 4641 mov r1, r8
800e358: 4638 mov r0, r7
800e35a: 47c8 blx r9
800e35c: 3001 adds r0, #1
800e35e: d0e6 beq.n 800e32e <_printf_common+0xae>
800e360: 3601 adds r6, #1
800e362: e7d9 b.n 800e318 <_printf_common+0x98>
0800e364 <_printf_i>:
800e364: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800e368: 7e0f ldrb r7, [r1, #24]
800e36a: 4691 mov r9, r2
800e36c: 2f78 cmp r7, #120 @ 0x78
800e36e: 4680 mov r8, r0
800e370: 460c mov r4, r1
800e372: 469a mov sl, r3
800e374: 9e0c ldr r6, [sp, #48] @ 0x30
800e376: f101 0243 add.w r2, r1, #67 @ 0x43
800e37a: d807 bhi.n 800e38c <_printf_i+0x28>
800e37c: 2f62 cmp r7, #98 @ 0x62
800e37e: d80a bhi.n 800e396 <_printf_i+0x32>
800e380: 2f00 cmp r7, #0
800e382: f000 80d1 beq.w 800e528 <_printf_i+0x1c4>
800e386: 2f58 cmp r7, #88 @ 0x58
800e388: f000 80b8 beq.w 800e4fc <_printf_i+0x198>
800e38c: f104 0642 add.w r6, r4, #66 @ 0x42
800e390: f884 7042 strb.w r7, [r4, #66] @ 0x42
800e394: e03a b.n 800e40c <_printf_i+0xa8>
800e396: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800e39a: 2b15 cmp r3, #21
800e39c: d8f6 bhi.n 800e38c <_printf_i+0x28>
800e39e: a101 add r1, pc, #4 @ (adr r1, 800e3a4 <_printf_i+0x40>)
800e3a0: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800e3a4: 0800e3fd .word 0x0800e3fd
800e3a8: 0800e411 .word 0x0800e411
800e3ac: 0800e38d .word 0x0800e38d
800e3b0: 0800e38d .word 0x0800e38d
800e3b4: 0800e38d .word 0x0800e38d
800e3b8: 0800e38d .word 0x0800e38d
800e3bc: 0800e411 .word 0x0800e411
800e3c0: 0800e38d .word 0x0800e38d
800e3c4: 0800e38d .word 0x0800e38d
800e3c8: 0800e38d .word 0x0800e38d
800e3cc: 0800e38d .word 0x0800e38d
800e3d0: 0800e50f .word 0x0800e50f
800e3d4: 0800e43b .word 0x0800e43b
800e3d8: 0800e4c9 .word 0x0800e4c9
800e3dc: 0800e38d .word 0x0800e38d
800e3e0: 0800e38d .word 0x0800e38d
800e3e4: 0800e531 .word 0x0800e531
800e3e8: 0800e38d .word 0x0800e38d
800e3ec: 0800e43b .word 0x0800e43b
800e3f0: 0800e38d .word 0x0800e38d
800e3f4: 0800e38d .word 0x0800e38d
800e3f8: 0800e4d1 .word 0x0800e4d1
800e3fc: 6833 ldr r3, [r6, #0]
800e3fe: 1d1a adds r2, r3, #4
800e400: 681b ldr r3, [r3, #0]
800e402: 6032 str r2, [r6, #0]
800e404: f104 0642 add.w r6, r4, #66 @ 0x42
800e408: f884 3042 strb.w r3, [r4, #66] @ 0x42
800e40c: 2301 movs r3, #1
800e40e: e09c b.n 800e54a <_printf_i+0x1e6>
800e410: 6833 ldr r3, [r6, #0]
800e412: 6820 ldr r0, [r4, #0]
800e414: 1d19 adds r1, r3, #4
800e416: 6031 str r1, [r6, #0]
800e418: 0606 lsls r6, r0, #24
800e41a: d501 bpl.n 800e420 <_printf_i+0xbc>
800e41c: 681d ldr r5, [r3, #0]
800e41e: e003 b.n 800e428 <_printf_i+0xc4>
800e420: 0645 lsls r5, r0, #25
800e422: d5fb bpl.n 800e41c <_printf_i+0xb8>
800e424: f9b3 5000 ldrsh.w r5, [r3]
800e428: 2d00 cmp r5, #0
800e42a: da03 bge.n 800e434 <_printf_i+0xd0>
800e42c: 232d movs r3, #45 @ 0x2d
800e42e: 426d negs r5, r5
800e430: f884 3043 strb.w r3, [r4, #67] @ 0x43
800e434: 230a movs r3, #10
800e436: 4858 ldr r0, [pc, #352] @ (800e598 <_printf_i+0x234>)
800e438: e011 b.n 800e45e <_printf_i+0xfa>
800e43a: 6821 ldr r1, [r4, #0]
800e43c: 6833 ldr r3, [r6, #0]
800e43e: 0608 lsls r0, r1, #24
800e440: f853 5b04 ldr.w r5, [r3], #4
800e444: d402 bmi.n 800e44c <_printf_i+0xe8>
800e446: 0649 lsls r1, r1, #25
800e448: bf48 it mi
800e44a: b2ad uxthmi r5, r5
800e44c: 2f6f cmp r7, #111 @ 0x6f
800e44e: 6033 str r3, [r6, #0]
800e450: bf14 ite ne
800e452: 230a movne r3, #10
800e454: 2308 moveq r3, #8
800e456: 4850 ldr r0, [pc, #320] @ (800e598 <_printf_i+0x234>)
800e458: 2100 movs r1, #0
800e45a: f884 1043 strb.w r1, [r4, #67] @ 0x43
800e45e: 6866 ldr r6, [r4, #4]
800e460: 2e00 cmp r6, #0
800e462: 60a6 str r6, [r4, #8]
800e464: db05 blt.n 800e472 <_printf_i+0x10e>
800e466: 6821 ldr r1, [r4, #0]
800e468: 432e orrs r6, r5
800e46a: f021 0104 bic.w r1, r1, #4
800e46e: 6021 str r1, [r4, #0]
800e470: d04b beq.n 800e50a <_printf_i+0x1a6>
800e472: 4616 mov r6, r2
800e474: fbb5 f1f3 udiv r1, r5, r3
800e478: fb03 5711 mls r7, r3, r1, r5
800e47c: 5dc7 ldrb r7, [r0, r7]
800e47e: f806 7d01 strb.w r7, [r6, #-1]!
800e482: 462f mov r7, r5
800e484: 42bb cmp r3, r7
800e486: 460d mov r5, r1
800e488: d9f4 bls.n 800e474 <_printf_i+0x110>
800e48a: 2b08 cmp r3, #8
800e48c: d10b bne.n 800e4a6 <_printf_i+0x142>
800e48e: 6823 ldr r3, [r4, #0]
800e490: 07df lsls r7, r3, #31
800e492: d508 bpl.n 800e4a6 <_printf_i+0x142>
800e494: 6923 ldr r3, [r4, #16]
800e496: 6861 ldr r1, [r4, #4]
800e498: 4299 cmp r1, r3
800e49a: bfde ittt le
800e49c: 2330 movle r3, #48 @ 0x30
800e49e: f806 3c01 strble.w r3, [r6, #-1]
800e4a2: f106 36ff addle.w r6, r6, #4294967295
800e4a6: 1b92 subs r2, r2, r6
800e4a8: 6122 str r2, [r4, #16]
800e4aa: 464b mov r3, r9
800e4ac: 4621 mov r1, r4
800e4ae: 4640 mov r0, r8
800e4b0: f8cd a000 str.w sl, [sp]
800e4b4: aa03 add r2, sp, #12
800e4b6: f7ff fee3 bl 800e280 <_printf_common>
800e4ba: 3001 adds r0, #1
800e4bc: d14a bne.n 800e554 <_printf_i+0x1f0>
800e4be: f04f 30ff mov.w r0, #4294967295
800e4c2: b004 add sp, #16
800e4c4: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e4c8: 6823 ldr r3, [r4, #0]
800e4ca: f043 0320 orr.w r3, r3, #32
800e4ce: 6023 str r3, [r4, #0]
800e4d0: 2778 movs r7, #120 @ 0x78
800e4d2: 4832 ldr r0, [pc, #200] @ (800e59c <_printf_i+0x238>)
800e4d4: f884 7045 strb.w r7, [r4, #69] @ 0x45
800e4d8: 6823 ldr r3, [r4, #0]
800e4da: 6831 ldr r1, [r6, #0]
800e4dc: 061f lsls r7, r3, #24
800e4de: f851 5b04 ldr.w r5, [r1], #4
800e4e2: d402 bmi.n 800e4ea <_printf_i+0x186>
800e4e4: 065f lsls r7, r3, #25
800e4e6: bf48 it mi
800e4e8: b2ad uxthmi r5, r5
800e4ea: 6031 str r1, [r6, #0]
800e4ec: 07d9 lsls r1, r3, #31
800e4ee: bf44 itt mi
800e4f0: f043 0320 orrmi.w r3, r3, #32
800e4f4: 6023 strmi r3, [r4, #0]
800e4f6: b11d cbz r5, 800e500 <_printf_i+0x19c>
800e4f8: 2310 movs r3, #16
800e4fa: e7ad b.n 800e458 <_printf_i+0xf4>
800e4fc: 4826 ldr r0, [pc, #152] @ (800e598 <_printf_i+0x234>)
800e4fe: e7e9 b.n 800e4d4 <_printf_i+0x170>
800e500: 6823 ldr r3, [r4, #0]
800e502: f023 0320 bic.w r3, r3, #32
800e506: 6023 str r3, [r4, #0]
800e508: e7f6 b.n 800e4f8 <_printf_i+0x194>
800e50a: 4616 mov r6, r2
800e50c: e7bd b.n 800e48a <_printf_i+0x126>
800e50e: 6833 ldr r3, [r6, #0]
800e510: 6825 ldr r5, [r4, #0]
800e512: 1d18 adds r0, r3, #4
800e514: 6961 ldr r1, [r4, #20]
800e516: 6030 str r0, [r6, #0]
800e518: 062e lsls r6, r5, #24
800e51a: 681b ldr r3, [r3, #0]
800e51c: d501 bpl.n 800e522 <_printf_i+0x1be>
800e51e: 6019 str r1, [r3, #0]
800e520: e002 b.n 800e528 <_printf_i+0x1c4>
800e522: 0668 lsls r0, r5, #25
800e524: d5fb bpl.n 800e51e <_printf_i+0x1ba>
800e526: 8019 strh r1, [r3, #0]
800e528: 2300 movs r3, #0
800e52a: 4616 mov r6, r2
800e52c: 6123 str r3, [r4, #16]
800e52e: e7bc b.n 800e4aa <_printf_i+0x146>
800e530: 6833 ldr r3, [r6, #0]
800e532: 2100 movs r1, #0
800e534: 1d1a adds r2, r3, #4
800e536: 6032 str r2, [r6, #0]
800e538: 681e ldr r6, [r3, #0]
800e53a: 6862 ldr r2, [r4, #4]
800e53c: 4630 mov r0, r6
800e53e: f000 f859 bl 800e5f4 <memchr>
800e542: b108 cbz r0, 800e548 <_printf_i+0x1e4>
800e544: 1b80 subs r0, r0, r6
800e546: 6060 str r0, [r4, #4]
800e548: 6863 ldr r3, [r4, #4]
800e54a: 6123 str r3, [r4, #16]
800e54c: 2300 movs r3, #0
800e54e: f884 3043 strb.w r3, [r4, #67] @ 0x43
800e552: e7aa b.n 800e4aa <_printf_i+0x146>
800e554: 4632 mov r2, r6
800e556: 4649 mov r1, r9
800e558: 4640 mov r0, r8
800e55a: 6923 ldr r3, [r4, #16]
800e55c: 47d0 blx sl
800e55e: 3001 adds r0, #1
800e560: d0ad beq.n 800e4be <_printf_i+0x15a>
800e562: 6823 ldr r3, [r4, #0]
800e564: 079b lsls r3, r3, #30
800e566: d413 bmi.n 800e590 <_printf_i+0x22c>
800e568: 68e0 ldr r0, [r4, #12]
800e56a: 9b03 ldr r3, [sp, #12]
800e56c: 4298 cmp r0, r3
800e56e: bfb8 it lt
800e570: 4618 movlt r0, r3
800e572: e7a6 b.n 800e4c2 <_printf_i+0x15e>
800e574: 2301 movs r3, #1
800e576: 4632 mov r2, r6
800e578: 4649 mov r1, r9
800e57a: 4640 mov r0, r8
800e57c: 47d0 blx sl
800e57e: 3001 adds r0, #1
800e580: d09d beq.n 800e4be <_printf_i+0x15a>
800e582: 3501 adds r5, #1
800e584: 68e3 ldr r3, [r4, #12]
800e586: 9903 ldr r1, [sp, #12]
800e588: 1a5b subs r3, r3, r1
800e58a: 42ab cmp r3, r5
800e58c: dcf2 bgt.n 800e574 <_printf_i+0x210>
800e58e: e7eb b.n 800e568 <_printf_i+0x204>
800e590: 2500 movs r5, #0
800e592: f104 0619 add.w r6, r4, #25
800e596: e7f5 b.n 800e584 <_printf_i+0x220>
800e598: 0800ec9b .word 0x0800ec9b
800e59c: 0800ecac .word 0x0800ecac
0800e5a0 <memmove>:
800e5a0: 4288 cmp r0, r1
800e5a2: b510 push {r4, lr}
800e5a4: eb01 0402 add.w r4, r1, r2
800e5a8: d902 bls.n 800e5b0 <memmove+0x10>
800e5aa: 4284 cmp r4, r0
800e5ac: 4623 mov r3, r4
800e5ae: d807 bhi.n 800e5c0 <memmove+0x20>
800e5b0: 1e43 subs r3, r0, #1
800e5b2: 42a1 cmp r1, r4
800e5b4: d008 beq.n 800e5c8 <memmove+0x28>
800e5b6: f811 2b01 ldrb.w r2, [r1], #1
800e5ba: f803 2f01 strb.w r2, [r3, #1]!
800e5be: e7f8 b.n 800e5b2 <memmove+0x12>
800e5c0: 4601 mov r1, r0
800e5c2: 4402 add r2, r0
800e5c4: 428a cmp r2, r1
800e5c6: d100 bne.n 800e5ca <memmove+0x2a>
800e5c8: bd10 pop {r4, pc}
800e5ca: f813 4d01 ldrb.w r4, [r3, #-1]!
800e5ce: f802 4d01 strb.w r4, [r2, #-1]!
800e5d2: e7f7 b.n 800e5c4 <memmove+0x24>
0800e5d4 <_sbrk_r>:
800e5d4: b538 push {r3, r4, r5, lr}
800e5d6: 2300 movs r3, #0
800e5d8: 4d05 ldr r5, [pc, #20] @ (800e5f0 <_sbrk_r+0x1c>)
800e5da: 4604 mov r4, r0
800e5dc: 4608 mov r0, r1
800e5de: 602b str r3, [r5, #0]
800e5e0: f7f6 f98e bl 8004900 <_sbrk>
800e5e4: 1c43 adds r3, r0, #1
800e5e6: d102 bne.n 800e5ee <_sbrk_r+0x1a>
800e5e8: 682b ldr r3, [r5, #0]
800e5ea: b103 cbz r3, 800e5ee <_sbrk_r+0x1a>
800e5ec: 6023 str r3, [r4, #0]
800e5ee: bd38 pop {r3, r4, r5, pc}
800e5f0: 2000188c .word 0x2000188c
0800e5f4 <memchr>:
800e5f4: 4603 mov r3, r0
800e5f6: b510 push {r4, lr}
800e5f8: b2c9 uxtb r1, r1
800e5fa: 4402 add r2, r0
800e5fc: 4293 cmp r3, r2
800e5fe: 4618 mov r0, r3
800e600: d101 bne.n 800e606 <memchr+0x12>
800e602: 2000 movs r0, #0
800e604: e003 b.n 800e60e <memchr+0x1a>
800e606: 7804 ldrb r4, [r0, #0]
800e608: 3301 adds r3, #1
800e60a: 428c cmp r4, r1
800e60c: d1f6 bne.n 800e5fc <memchr+0x8>
800e60e: bd10 pop {r4, pc}
0800e610 <memcpy>:
800e610: 440a add r2, r1
800e612: 4291 cmp r1, r2
800e614: f100 33ff add.w r3, r0, #4294967295
800e618: d100 bne.n 800e61c <memcpy+0xc>
800e61a: 4770 bx lr
800e61c: b510 push {r4, lr}
800e61e: f811 4b01 ldrb.w r4, [r1], #1
800e622: 4291 cmp r1, r2
800e624: f803 4f01 strb.w r4, [r3, #1]!
800e628: d1f9 bne.n 800e61e <memcpy+0xe>
800e62a: bd10 pop {r4, pc}
0800e62c <_realloc_r>:
800e62c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800e630: 4607 mov r7, r0
800e632: 4614 mov r4, r2
800e634: 460d mov r5, r1
800e636: b921 cbnz r1, 800e642 <_realloc_r+0x16>
800e638: 4611 mov r1, r2
800e63a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800e63e: f7ff bc3b b.w 800deb8 <_malloc_r>
800e642: b92a cbnz r2, 800e650 <_realloc_r+0x24>
800e644: f7ff fbce bl 800dde4 <_free_r>
800e648: 4625 mov r5, r4
800e64a: 4628 mov r0, r5
800e64c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800e650: f000 f81a bl 800e688 <_malloc_usable_size_r>
800e654: 4284 cmp r4, r0
800e656: 4606 mov r6, r0
800e658: d802 bhi.n 800e660 <_realloc_r+0x34>
800e65a: ebb4 0f50 cmp.w r4, r0, lsr #1
800e65e: d8f4 bhi.n 800e64a <_realloc_r+0x1e>
800e660: 4621 mov r1, r4
800e662: 4638 mov r0, r7
800e664: f7ff fc28 bl 800deb8 <_malloc_r>
800e668: 4680 mov r8, r0
800e66a: b908 cbnz r0, 800e670 <_realloc_r+0x44>
800e66c: 4645 mov r5, r8
800e66e: e7ec b.n 800e64a <_realloc_r+0x1e>
800e670: 42b4 cmp r4, r6
800e672: 4622 mov r2, r4
800e674: 4629 mov r1, r5
800e676: bf28 it cs
800e678: 4632 movcs r2, r6
800e67a: f7ff ffc9 bl 800e610 <memcpy>
800e67e: 4629 mov r1, r5
800e680: 4638 mov r0, r7
800e682: f7ff fbaf bl 800dde4 <_free_r>
800e686: e7f1 b.n 800e66c <_realloc_r+0x40>
0800e688 <_malloc_usable_size_r>:
800e688: f851 3c04 ldr.w r3, [r1, #-4]
800e68c: 1f18 subs r0, r3, #4
800e68e: 2b00 cmp r3, #0
800e690: bfbc itt lt
800e692: 580b ldrlt r3, [r1, r0]
800e694: 18c0 addlt r0, r0, r3
800e696: 4770 bx lr
0800e698 <_init>:
800e698: b5f8 push {r3, r4, r5, r6, r7, lr}
800e69a: bf00 nop
800e69c: bcf8 pop {r3, r4, r5, r6, r7}
800e69e: bc08 pop {r3}
800e6a0: 469e mov lr, r3
800e6a2: 4770 bx lr
0800e6a4 <_fini>:
800e6a4: b5f8 push {r3, r4, r5, r6, r7, lr}
800e6a6: bf00 nop
800e6a8: bcf8 pop {r3, r4, r5, r6, r7}
800e6aa: bc08 pop {r3}
800e6ac: 469e mov lr, r3
800e6ae: 4770 bx lr
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