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e496a64d5753d7927d24e75e7927daa7461a4a40
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
andrea 18437a0c9c creata timeline con tempi in decimi
2026-05-02 13:05:31 +02:00

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1.3 MiB
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AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000e0f4 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000004cc 0800e200 0800e200 0000f200 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800e6cc 0800e6cc 000101d4 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800e6cc 0800e6cc 0000f6cc 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800e6d4 0800e6d4 000101d4 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800e6d4 0800e6d4 0000f6d4 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800e6d8 0800e6d8 0000f6d8 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001d4 20000000 0800e6dc 00010000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 000016bc 200001d8 0800e8b0 000101d8 2**3
ALLOC
10 ._user_heap_stack 00000604 20001894 0800e8b0 00010894 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 000101d4 2**0
CONTENTS, READONLY
12 .debug_info 00019e5f 00000000 00000000 000101fd 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00004918 00000000 00000000 0002a05c 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 000016a0 00000000 00000000 0002e978 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 0000115b 00000000 00000000 00030018 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001d068 00000000 00000000 00031173 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001ecba 00000000 00000000 0004e1db 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 00095df1 00000000 00000000 0006ce95 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 00102c86 2**0
CONTENTS, READONLY
20 .debug_frame 00006154 00000000 00000000 00102ccc 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 00108e20 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001d8 .word 0x200001d8
8000128: 00000000 .word 0x00000000
800012c: 0800e1e8 .word 0x0800e1e8
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001dc .word 0x200001dc
8000148: 0800e1e8 .word 0x0800e1e8
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <manageAdc>:
uint16_t ch5 ;
uint16_t ch6 ;
uint16_t ch7 ;
uint16_t ch8 ;
void manageAdc(void){
800015c: b480 push {r7}
800015e: af00 add r7, sp, #0
if (adc_avg_ready)
8000160: 4b12 ldr r3, [pc, #72] @ (80001ac <manageAdc+0x50>)
8000162: 781b ldrb r3, [r3, #0]
8000164: b2db uxtb r3, r3
8000166: 2b00 cmp r3, #0
8000168: d01b beq.n 80001a2 <manageAdc+0x46>
{
adc_avg_ready = 0;
800016a: 4b10 ldr r3, [pc, #64] @ (80001ac <manageAdc+0x50>)
800016c: 2200 movs r2, #0
800016e: 701a strb r2, [r3, #0]
// Read averaged channels (example mapping)
ch4 = adc_avg[0];
8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 <manageAdc+0x54>)
8000172: 881b ldrh r3, [r3, #0]
8000174: b29a uxth r2, r3
8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 <manageAdc+0x58>)
8000178: 801a strh r2, [r3, #0]
ch5 = adc_avg[1];
800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 <manageAdc+0x54>)
800017c: 885b ldrh r3, [r3, #2]
800017e: b29a uxth r2, r3
8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 <manageAdc+0x5c>)
8000182: 801a strh r2, [r3, #0]
ch6 = adc_avg[2];
8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 <manageAdc+0x54>)
8000186: 889b ldrh r3, [r3, #4]
8000188: b29a uxth r2, r3
800018a: 4b0c ldr r3, [pc, #48] @ (80001bc <manageAdc+0x60>)
800018c: 801a strh r2, [r3, #0]
ch7 = adc_avg[3];
800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 <manageAdc+0x54>)
8000190: 88db ldrh r3, [r3, #6]
8000192: b29a uxth r2, r3
8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 <manageAdc+0x64>)
8000196: 801a strh r2, [r3, #0]
ch8 = adc_avg[4];
8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 <manageAdc+0x54>)
800019a: 891b ldrh r3, [r3, #8]
800019c: b29a uxth r2, r3
800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 <manageAdc+0x68>)
80001a0: 801a strh r2, [r3, #0]
// Use them (convert to volts, control, etc.)
// float v4 = (3.3f * ch4) / 4095.0f;
}
}
80001a2: bf00 nop
80001a4: 46bd mov sp, r7
80001a6: bc80 pop {r7}
80001a8: 4770 bx lr
80001aa: bf00 nop
80001ac: 20000221 .word 0x20000221
80001b0: 20000200 .word 0x20000200
80001b4: 20000222 .word 0x20000222
80001b8: 20000224 .word 0x20000224
80001bc: 20000226 .word 0x20000226
80001c0: 20000228 .word 0x20000228
80001c4: 2000022a .word 0x2000022a
080001c8 <readAdc>:
void readAdc(void){
80001c8: b480 push {r7}
80001ca: b083 sub sp, #12
80001cc: af00 add r7, sp, #0
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001ce: 2300 movs r3, #0
80001d0: 71fb strb r3, [r7, #7]
80001d2: e010 b.n 80001f6 <readAdc+0x2e>
{
adc_sum[i] += adc_dma_buf[i];
80001d4: 79fb ldrb r3, [r7, #7]
80001d6: 4a21 ldr r2, [pc, #132] @ (800025c <readAdc+0x94>)
80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80001dc: b299 uxth r1, r3
80001de: 79fb ldrb r3, [r7, #7]
80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 <readAdc+0x98>)
80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2]
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 440a add r2, r1
80001ea: 491d ldr r1, [pc, #116] @ (8000260 <readAdc+0x98>)
80001ec: f841 2023 str.w r2, [r1, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001f0: 79fb ldrb r3, [r7, #7]
80001f2: 3301 adds r3, #1
80001f4: 71fb strb r3, [r7, #7]
80001f6: 79fb ldrb r3, [r7, #7]
80001f8: 2b04 cmp r3, #4
80001fa: d9eb bls.n 80001d4 <readAdc+0xc>
}
adc_sum_count++;
80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 <readAdc+0x9c>)
80001fe: 781b ldrb r3, [r3, #0]
8000200: 3301 adds r3, #1
8000202: b2da uxtb r2, r3
8000204: 4b17 ldr r3, [pc, #92] @ (8000264 <readAdc+0x9c>)
8000206: 701a strb r2, [r3, #0]
/* When we collected ADC_AVG_WINDOW samples → compute average */
if (adc_sum_count >= ADC_AVG_WINDOW)
8000208: 4b16 ldr r3, [pc, #88] @ (8000264 <readAdc+0x9c>)
800020a: 781b ldrb r3, [r3, #0]
800020c: 2b04 cmp r3, #4
800020e: d920 bls.n 8000252 <readAdc+0x8a>
{
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
8000210: 2300 movs r3, #0
8000212: 71bb strb r3, [r7, #6]
8000214: e014 b.n 8000240 <readAdc+0x78>
{
adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW);
8000216: 79bb ldrb r3, [r7, #6]
8000218: 4a11 ldr r2, [pc, #68] @ (8000260 <readAdc+0x98>)
800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800021e: 4a12 ldr r2, [pc, #72] @ (8000268 <readAdc+0xa0>)
8000220: fba2 2303 umull r2, r3, r2, r3
8000224: 089a lsrs r2, r3, #2
8000226: 79bb ldrb r3, [r7, #6]
8000228: b291 uxth r1, r2
800022a: 4a10 ldr r2, [pc, #64] @ (800026c <readAdc+0xa4>)
800022c: f822 1013 strh.w r1, [r2, r3, lsl #1]
adc_sum[i] = 0;
8000230: 79bb ldrb r3, [r7, #6]
8000232: 4a0b ldr r2, [pc, #44] @ (8000260 <readAdc+0x98>)
8000234: 2100 movs r1, #0
8000236: f842 1023 str.w r1, [r2, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
800023a: 79bb ldrb r3, [r7, #6]
800023c: 3301 adds r3, #1
800023e: 71bb strb r3, [r7, #6]
8000240: 79bb ldrb r3, [r7, #6]
8000242: 2b04 cmp r3, #4
8000244: d9e7 bls.n 8000216 <readAdc+0x4e>
}
adc_sum_count = 0;
8000246: 4b07 ldr r3, [pc, #28] @ (8000264 <readAdc+0x9c>)
8000248: 2200 movs r2, #0
800024a: 701a strb r2, [r3, #0]
adc_avg_ready = 1; // tell main loop new data is ready
800024c: 4b08 ldr r3, [pc, #32] @ (8000270 <readAdc+0xa8>)
800024e: 2201 movs r2, #1
8000250: 701a strb r2, [r3, #0]
}
}
8000252: bf00 nop
8000254: 370c adds r7, #12
8000256: 46bd mov sp, r7
8000258: bc80 pop {r7}
800025a: 4770 bx lr
800025c: 200001f4 .word 0x200001f4
8000260: 2000020c .word 0x2000020c
8000264: 20000220 .word 0x20000220
8000268: cccccccd .word 0xcccccccd
800026c: 20000200 .word 0x20000200
8000270: 20000221 .word 0x20000221
08000274 <EEW_Read>:
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data);
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
void loadEE(void);
/* Pseudo-array accessor EEW[idx] */
static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value)
{
8000274: b580 push {r7, lr}
8000276: b082 sub sp, #8
8000278: af00 add r7, sp, #0
800027a: 4603 mov r3, r0
800027c: 6039 str r1, [r7, #0]
800027e: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000280: 79fb ldrb r3, [r7, #7]
8000282: b29b uxth r3, r3
8000284: 3301 adds r3, #1
8000286: b29b uxth r3, r3
8000288: 6839 ldr r1, [r7, #0]
800028a: 4618 mov r0, r3
800028c: f000 ffda bl 8001244 <EE_ReadVariable>
8000290: 4603 mov r3, r0
}
8000292: 4618 mov r0, r3
8000294: 3708 adds r7, #8
8000296: 46bd mov sp, r7
8000298: bd80 pop {r7, pc}
0800029a <EEW_Write>:
static inline uint16_t EEW_Write(uint8_t idx, uint16_t value)
{
800029a: b580 push {r7, lr}
800029c: b082 sub sp, #8
800029e: af00 add r7, sp, #0
80002a0: 4603 mov r3, r0
80002a2: 460a mov r2, r1
80002a4: 71fb strb r3, [r7, #7]
80002a6: 4613 mov r3, r2
80002a8: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80002aa: 79fb ldrb r3, [r7, #7]
80002ac: b29b uxth r3, r3
80002ae: 3301 adds r3, #1
80002b0: b29b uxth r3, r3
80002b2: 88ba ldrh r2, [r7, #4]
80002b4: 4611 mov r1, r2
80002b6: 4618 mov r0, r3
80002b8: f000 ffe0 bl 800127c <EE_WriteVariable>
80002bc: 4603 mov r3, r0
}
80002be: 4618 mov r0, r3
80002c0: 3708 adds r7, #8
80002c2: 46bd mov sp, r7
80002c4: bd80 pop {r7, pc}
080002c6 <toHex>:
extern const uint8_t deftab[];
extern omCiclo_st stCiclo;
extern omCiclo_st memstCiclo;
extern uint8_t stPulsanti;
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80002c6: b490 push {r4, r7}
80002c8: b082 sub sp, #8
80002ca: af00 add r7, sp, #0
80002cc: 4604 mov r4, r0
80002ce: 4608 mov r0, r1
80002d0: 4611 mov r1, r2
80002d2: 461a mov r2, r3
80002d4: 4623 mov r3, r4
80002d6: 71fb strb r3, [r7, #7]
80002d8: 4603 mov r3, r0
80002da: 71bb strb r3, [r7, #6]
80002dc: 460b mov r3, r1
80002de: 717b strb r3, [r7, #5]
80002e0: 4613 mov r3, r2
80002e2: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80002e4: 79fb ldrb r3, [r7, #7]
80002e6: 2b2f cmp r3, #47 @ 0x2f
80002e8: d906 bls.n 80002f8 <toHex+0x32>
80002ea: 79fb ldrb r3, [r7, #7]
80002ec: 2b39 cmp r3, #57 @ 0x39
80002ee: d803 bhi.n 80002f8 <toHex+0x32>
c1-='0';
80002f0: 79fb ldrb r3, [r7, #7]
80002f2: 3b30 subs r3, #48 @ 0x30
80002f4: 71fb strb r3, [r7, #7]
80002f6: e00b b.n 8000310 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80002f8: 79fb ldrb r3, [r7, #7]
80002fa: 2b60 cmp r3, #96 @ 0x60
80002fc: d906 bls.n 800030c <toHex+0x46>
80002fe: 79fb ldrb r3, [r7, #7]
8000300: 2b66 cmp r3, #102 @ 0x66
8000302: d803 bhi.n 800030c <toHex+0x46>
c1=(c1-'a')+10;
8000304: 79fb ldrb r3, [r7, #7]
8000306: 3b57 subs r3, #87 @ 0x57
8000308: 71fb strb r3, [r7, #7]
800030a: e001 b.n 8000310 <toHex+0x4a>
}else return false;
800030c: 2300 movs r3, #0
800030e: e070 b.n 80003f2 <toHex+0x12c>
if((c2>='0')&&(c2<='9')){
8000310: 79bb ldrb r3, [r7, #6]
8000312: 2b2f cmp r3, #47 @ 0x2f
8000314: d906 bls.n 8000324 <toHex+0x5e>
8000316: 79bb ldrb r3, [r7, #6]
8000318: 2b39 cmp r3, #57 @ 0x39
800031a: d803 bhi.n 8000324 <toHex+0x5e>
c2-='0';
800031c: 79bb ldrb r3, [r7, #6]
800031e: 3b30 subs r3, #48 @ 0x30
8000320: 71bb strb r3, [r7, #6]
8000322: e00b b.n 800033c <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
8000324: 79bb ldrb r3, [r7, #6]
8000326: 2b60 cmp r3, #96 @ 0x60
8000328: d906 bls.n 8000338 <toHex+0x72>
800032a: 79bb ldrb r3, [r7, #6]
800032c: 2b66 cmp r3, #102 @ 0x66
800032e: d803 bhi.n 8000338 <toHex+0x72>
c2=(c2-'a')+10;
8000330: 79bb ldrb r3, [r7, #6]
8000332: 3b57 subs r3, #87 @ 0x57
8000334: 71bb strb r3, [r7, #6]
8000336: e001 b.n 800033c <toHex+0x76>
}else return false;
8000338: 2300 movs r3, #0
800033a: e05a b.n 80003f2 <toHex+0x12c>
if((c3>='0')&&(c3<='9')){
800033c: 797b ldrb r3, [r7, #5]
800033e: 2b2f cmp r3, #47 @ 0x2f
8000340: d906 bls.n 8000350 <toHex+0x8a>
8000342: 797b ldrb r3, [r7, #5]
8000344: 2b39 cmp r3, #57 @ 0x39
8000346: d803 bhi.n 8000350 <toHex+0x8a>
c3-='0';
8000348: 797b ldrb r3, [r7, #5]
800034a: 3b30 subs r3, #48 @ 0x30
800034c: 717b strb r3, [r7, #5]
800034e: e00b b.n 8000368 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000350: 797b ldrb r3, [r7, #5]
8000352: 2b60 cmp r3, #96 @ 0x60
8000354: d906 bls.n 8000364 <toHex+0x9e>
8000356: 797b ldrb r3, [r7, #5]
8000358: 2b66 cmp r3, #102 @ 0x66
800035a: d803 bhi.n 8000364 <toHex+0x9e>
c3=(c3-'a')+10;
800035c: 797b ldrb r3, [r7, #5]
800035e: 3b57 subs r3, #87 @ 0x57
8000360: 717b strb r3, [r7, #5]
8000362: e001 b.n 8000368 <toHex+0xa2>
}else return false;
8000364: 2300 movs r3, #0
8000366: e044 b.n 80003f2 <toHex+0x12c>
if((c4>='0')&&(c4<='9')){
8000368: 793b ldrb r3, [r7, #4]
800036a: 2b2f cmp r3, #47 @ 0x2f
800036c: d906 bls.n 800037c <toHex+0xb6>
800036e: 793b ldrb r3, [r7, #4]
8000370: 2b39 cmp r3, #57 @ 0x39
8000372: d803 bhi.n 800037c <toHex+0xb6>
c4-='0';
8000374: 793b ldrb r3, [r7, #4]
8000376: 3b30 subs r3, #48 @ 0x30
8000378: 713b strb r3, [r7, #4]
800037a: e00b b.n 8000394 <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
800037c: 793b ldrb r3, [r7, #4]
800037e: 2b60 cmp r3, #96 @ 0x60
8000380: d906 bls.n 8000390 <toHex+0xca>
8000382: 793b ldrb r3, [r7, #4]
8000384: 2b66 cmp r3, #102 @ 0x66
8000386: d803 bhi.n 8000390 <toHex+0xca>
c4=(c4-'a')+10;
8000388: 793b ldrb r3, [r7, #4]
800038a: 3b57 subs r3, #87 @ 0x57
800038c: 713b strb r3, [r7, #4]
800038e: e001 b.n 8000394 <toHex+0xce>
}else return false;
8000390: 2300 movs r3, #0
8000392: e02e b.n 80003f2 <toHex+0x12c>
*retval=c1;
8000394: 79fb ldrb r3, [r7, #7]
8000396: b29a uxth r2, r3
8000398: 693b ldr r3, [r7, #16]
800039a: 801a strh r2, [r3, #0]
*retval*=16;
800039c: 693b ldr r3, [r7, #16]
800039e: 881b ldrh r3, [r3, #0]
80003a0: 011b lsls r3, r3, #4
80003a2: b29a uxth r2, r3
80003a4: 693b ldr r3, [r7, #16]
80003a6: 801a strh r2, [r3, #0]
*retval+=c2;
80003a8: 693b ldr r3, [r7, #16]
80003aa: 881a ldrh r2, [r3, #0]
80003ac: 79bb ldrb r3, [r7, #6]
80003ae: b29b uxth r3, r3
80003b0: 4413 add r3, r2
80003b2: b29a uxth r2, r3
80003b4: 693b ldr r3, [r7, #16]
80003b6: 801a strh r2, [r3, #0]
*retval*=16;
80003b8: 693b ldr r3, [r7, #16]
80003ba: 881b ldrh r3, [r3, #0]
80003bc: 011b lsls r3, r3, #4
80003be: b29a uxth r2, r3
80003c0: 693b ldr r3, [r7, #16]
80003c2: 801a strh r2, [r3, #0]
*retval+=c3;
80003c4: 693b ldr r3, [r7, #16]
80003c6: 881a ldrh r2, [r3, #0]
80003c8: 797b ldrb r3, [r7, #5]
80003ca: b29b uxth r3, r3
80003cc: 4413 add r3, r2
80003ce: b29a uxth r2, r3
80003d0: 693b ldr r3, [r7, #16]
80003d2: 801a strh r2, [r3, #0]
*retval*=16;
80003d4: 693b ldr r3, [r7, #16]
80003d6: 881b ldrh r3, [r3, #0]
80003d8: 011b lsls r3, r3, #4
80003da: b29a uxth r2, r3
80003dc: 693b ldr r3, [r7, #16]
80003de: 801a strh r2, [r3, #0]
*retval+=c4;
80003e0: 693b ldr r3, [r7, #16]
80003e2: 881a ldrh r2, [r3, #0]
80003e4: 793b ldrb r3, [r7, #4]
80003e6: b29b uxth r3, r3
80003e8: 4413 add r3, r2
80003ea: b29a uxth r2, r3
80003ec: 693b ldr r3, [r7, #16]
80003ee: 801a strh r2, [r3, #0]
return true;
80003f0: 2301 movs r3, #1
}
80003f2: 4618 mov r0, r3
80003f4: 3708 adds r7, #8
80003f6: 46bd mov sp, r7
80003f8: bc90 pop {r4, r7}
80003fa: 4770 bx lr
080003fc <manageCDC>:
void manageCDC(void){
80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
8000400: b0a7 sub sp, #156 @ 0x9c
8000402: af06 add r7, sp, #24
uint16_t val;
uint16_t st;
uint16_t eeadd;
uint8_t i;
if (CDC_Available()) {
8000404: f00c fd8c bl 800cf20 <CDC_Available>
8000408: 4603 mov r3, r0
800040a: 2b00 cmp r3, #0
800040c: f000 84d4 beq.w 8000db8 <manageCDC+0x9bc>
int rx = CDC_ReadByte();
8000410: f00c fd9a bl 800cf48 <CDC_ReadByte>
8000414: 67b8 str r0, [r7, #120] @ 0x78
if (rx < 0) return;
8000416: 6fbb ldr r3, [r7, #120] @ 0x78
8000418: 2b00 cmp r3, #0
800041a: f2c0 84cc blt.w 8000db6 <manageCDC+0x9ba>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
800041e: 4bad ldr r3, [pc, #692] @ (80006d4 <manageCDC+0x2d8>)
8000420: 781b ldrb r3, [r3, #0]
8000422: 461a mov r2, r3
8000424: 6fbb ldr r3, [r7, #120] @ 0x78
8000426: b2d9 uxtb r1, r3
8000428: 4bab ldr r3, [pc, #684] @ (80006d8 <manageCDC+0x2dc>)
800042a: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
800042c: bf00 nop
800042e: 4ba9 ldr r3, [pc, #676] @ (80006d4 <manageCDC+0x2d8>)
8000430: 781b ldrb r3, [r3, #0]
8000432: 461a mov r2, r3
8000434: 4ba8 ldr r3, [pc, #672] @ (80006d8 <manageCDC+0x2dc>)
8000436: 4413 add r3, r2
8000438: 2101 movs r1, #1
800043a: 4618 mov r0, r3
800043c: f00c fe46 bl 800d0cc <CDC_Transmit_FS>
8000440: 4603 mov r3, r0
8000442: 2b01 cmp r3, #1
8000444: d0f3 beq.n 800042e <manageCDC+0x32>
if((rx==0x0d)||(rx==0x0a)){
8000446: 6fbb ldr r3, [r7, #120] @ 0x78
8000448: 2b0d cmp r3, #13
800044a: d003 beq.n 8000454 <manageCDC+0x58>
800044c: 6fbb ldr r3, [r7, #120] @ 0x78
800044e: 2b0a cmp r3, #10
8000450: f040 84aa bne.w 8000da8 <manageCDC+0x9ac>
if(rxidx){
8000454: 4b9f ldr r3, [pc, #636] @ (80006d4 <manageCDC+0x2d8>)
8000456: 781b ldrb r3, [r3, #0]
8000458: 2b00 cmp r3, #0
800045a: f000 84a1 beq.w 8000da0 <manageCDC+0x9a4>
switch(rxbuf[0]){
800045e: 4b9e ldr r3, [pc, #632] @ (80006d8 <manageCDC+0x2dc>)
8000460: 781b ldrb r3, [r3, #0]
8000462: 2b6d cmp r3, #109 @ 0x6d
8000464: f000 80fb beq.w 800065e <manageCDC+0x262>
8000468: 2b6d cmp r3, #109 @ 0x6d
800046a: f300 8487 bgt.w 8000d7c <manageCDC+0x980>
800046e: 2b69 cmp r3, #105 @ 0x69
8000470: d00a beq.n 8000488 <manageCDC+0x8c>
8000472: 2b69 cmp r3, #105 @ 0x69
8000474: f300 8482 bgt.w 8000d7c <manageCDC+0x980>
8000478: 2b49 cmp r3, #73 @ 0x49
800047a: f000 80df beq.w 800063c <manageCDC+0x240>
800047e: 2b65 cmp r3, #101 @ 0x65
8000480: f000 8228 beq.w 80008d4 <manageCDC+0x4d8>
8000484: f000 bc7a b.w 8000d7c <manageCDC+0x980>
case 'i':
sprintf((char*)s,"info\n");
8000488: f107 030c add.w r3, r7, #12
800048c: 4993 ldr r1, [pc, #588] @ (80006dc <manageCDC+0x2e0>)
800048e: 4618 mov r0, r3
8000490: f00d f9fa bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000494: bf00 nop
8000496: f107 030c add.w r3, r7, #12
800049a: 2105 movs r1, #5
800049c: 4618 mov r0, r3
800049e: f00c fe15 bl 800d0cc <CDC_Transmit_FS>
80004a2: 4603 mov r3, r0
80004a4: 2b01 cmp r3, #1
80004a6: d0f6 beq.n 8000496 <manageCDC+0x9a>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
80004a8: 2100 movs r1, #0
80004aa: 488d ldr r0, [pc, #564] @ (80006e0 <manageCDC+0x2e4>)
80004ac: f003 f9c4 bl 8003838 <IsPwmRunning>
80004b0: 4603 mov r3, r0
80004b2: 4698 mov r8, r3
80004b4: 2104 movs r1, #4
80004b6: 488a ldr r0, [pc, #552] @ (80006e0 <manageCDC+0x2e4>)
80004b8: f003 f9be bl 8003838 <IsPwmRunning>
80004bc: 4603 mov r3, r0
80004be: 4699 mov r9, r3
80004c0: 2108 movs r1, #8
80004c2: 4887 ldr r0, [pc, #540] @ (80006e0 <manageCDC+0x2e4>)
80004c4: f003 f9b8 bl 8003838 <IsPwmRunning>
80004c8: 4603 mov r3, r0
80004ca: 461c mov r4, r3
80004cc: 210c movs r1, #12
80004ce: 4884 ldr r0, [pc, #528] @ (80006e0 <manageCDC+0x2e4>)
80004d0: f003 f9b2 bl 8003838 <IsPwmRunning>
80004d4: 4603 mov r3, r0
80004d6: 461d mov r5, r3
80004d8: 2100 movs r1, #0
80004da: 4882 ldr r0, [pc, #520] @ (80006e4 <manageCDC+0x2e8>)
80004dc: f003 f9ac bl 8003838 <IsPwmRunning>
80004e0: 4603 mov r3, r0
80004e2: 461e mov r6, r3
80004e4: 2104 movs r1, #4
80004e6: 487f ldr r0, [pc, #508] @ (80006e4 <manageCDC+0x2e8>)
80004e8: f003 f9a6 bl 8003838 <IsPwmRunning>
80004ec: 4603 mov r3, r0
80004ee: 607b str r3, [r7, #4]
80004f0: 2108 movs r1, #8
80004f2: 487c ldr r0, [pc, #496] @ (80006e4 <manageCDC+0x2e8>)
80004f4: f003 f9a0 bl 8003838 <IsPwmRunning>
80004f8: 4603 mov r3, r0
80004fa: 603b str r3, [r7, #0]
80004fc: 210c movs r1, #12
80004fe: 4879 ldr r0, [pc, #484] @ (80006e4 <manageCDC+0x2e8>)
8000500: f003 f99a bl 8003838 <IsPwmRunning>
8000504: 4603 mov r3, r0
8000506: f107 000c add.w r0, r7, #12
800050a: 9305 str r3, [sp, #20]
800050c: 683a ldr r2, [r7, #0]
800050e: 9204 str r2, [sp, #16]
8000510: 687b ldr r3, [r7, #4]
8000512: 9303 str r3, [sp, #12]
8000514: 9602 str r6, [sp, #8]
8000516: 9501 str r5, [sp, #4]
8000518: 9400 str r4, [sp, #0]
800051a: 464b mov r3, r9
800051c: 4642 mov r2, r8
800051e: 4972 ldr r1, [pc, #456] @ (80006e8 <manageCDC+0x2ec>)
8000520: f00d f9b2 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000524: bf00 nop
8000526: f107 030c add.w r3, r7, #12
800052a: 4618 mov r0, r3
800052c: f7ff fe0e bl 800014c <strlen>
8000530: 4603 mov r3, r0
8000532: b29a uxth r2, r3
8000534: f107 030c add.w r3, r7, #12
8000538: 4611 mov r1, r2
800053a: 4618 mov r0, r3
800053c: f00c fdc6 bl 800d0cc <CDC_Transmit_FS>
8000540: 4603 mov r3, r0
8000542: 2b01 cmp r3, #1
8000544: d0ef beq.n 8000526 <manageCDC+0x12a>
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
8000546: 4b66 ldr r3, [pc, #408] @ (80006e0 <manageCDC+0x2e4>)
8000548: 681b ldr r3, [r3, #0]
800054a: 6b5b ldr r3, [r3, #52] @ 0x34
800054c: 607b str r3, [r7, #4]
800054e: 4b64 ldr r3, [pc, #400] @ (80006e0 <manageCDC+0x2e4>)
8000550: 681b ldr r3, [r3, #0]
8000552: 6b99 ldr r1, [r3, #56] @ 0x38
8000554: 6039 str r1, [r7, #0]
8000556: 4b62 ldr r3, [pc, #392] @ (80006e0 <manageCDC+0x2e4>)
8000558: 681b ldr r3, [r3, #0]
800055a: 6bdb ldr r3, [r3, #60] @ 0x3c
800055c: 4a60 ldr r2, [pc, #384] @ (80006e0 <manageCDC+0x2e4>)
800055e: 6812 ldr r2, [r2, #0]
8000560: 6c12 ldr r2, [r2, #64] @ 0x40
8000562: 4960 ldr r1, [pc, #384] @ (80006e4 <manageCDC+0x2e8>)
8000564: 6809 ldr r1, [r1, #0]
8000566: 6b49 ldr r1, [r1, #52] @ 0x34
8000568: 485e ldr r0, [pc, #376] @ (80006e4 <manageCDC+0x2e8>)
800056a: 6800 ldr r0, [r0, #0]
800056c: 6b80 ldr r0, [r0, #56] @ 0x38
800056e: 4c5d ldr r4, [pc, #372] @ (80006e4 <manageCDC+0x2e8>)
8000570: 6824 ldr r4, [r4, #0]
8000572: 6be4 ldr r4, [r4, #60] @ 0x3c
8000574: 4d5b ldr r5, [pc, #364] @ (80006e4 <manageCDC+0x2e8>)
8000576: 682d ldr r5, [r5, #0]
8000578: 6c2d ldr r5, [r5, #64] @ 0x40
800057a: f107 060c add.w r6, r7, #12
800057e: 9505 str r5, [sp, #20]
8000580: 9404 str r4, [sp, #16]
8000582: 9003 str r0, [sp, #12]
8000584: 9102 str r1, [sp, #8]
8000586: 9201 str r2, [sp, #4]
8000588: 9300 str r3, [sp, #0]
800058a: 683b ldr r3, [r7, #0]
800058c: 687a ldr r2, [r7, #4]
800058e: 4957 ldr r1, [pc, #348] @ (80006ec <manageCDC+0x2f0>)
8000590: 4630 mov r0, r6
8000592: f00d f979 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000596: bf00 nop
8000598: f107 030c add.w r3, r7, #12
800059c: 4618 mov r0, r3
800059e: f7ff fdd5 bl 800014c <strlen>
80005a2: 4603 mov r3, r0
80005a4: b29a uxth r2, r3
80005a6: f107 030c add.w r3, r7, #12
80005aa: 4611 mov r1, r2
80005ac: 4618 mov r0, r3
80005ae: f00c fd8d bl 800d0cc <CDC_Transmit_FS>
80005b2: 4603 mov r3, r0
80005b4: 2b01 cmp r3, #1
80005b6: d0ef beq.n 8000598 <manageCDC+0x19c>
sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8);
80005b8: 4b4d ldr r3, [pc, #308] @ (80006f0 <manageCDC+0x2f4>)
80005ba: 781b ldrb r3, [r3, #0]
80005bc: 461d mov r5, r3
80005be: 4b4d ldr r3, [pc, #308] @ (80006f4 <manageCDC+0x2f8>)
80005c0: 881b ldrh r3, [r3, #0]
80005c2: 461e mov r6, r3
80005c4: 4b4c ldr r3, [pc, #304] @ (80006f8 <manageCDC+0x2fc>)
80005c6: 881b ldrh r3, [r3, #0]
80005c8: 461a mov r2, r3
80005ca: 4b4c ldr r3, [pc, #304] @ (80006fc <manageCDC+0x300>)
80005cc: 881b ldrh r3, [r3, #0]
80005ce: 4619 mov r1, r3
80005d0: 4b4b ldr r3, [pc, #300] @ (8000700 <manageCDC+0x304>)
80005d2: 881b ldrh r3, [r3, #0]
80005d4: 461c mov r4, r3
80005d6: 4b4b ldr r3, [pc, #300] @ (8000704 <manageCDC+0x308>)
80005d8: 881b ldrh r3, [r3, #0]
80005da: f107 000c add.w r0, r7, #12
80005de: 9303 str r3, [sp, #12]
80005e0: 9402 str r4, [sp, #8]
80005e2: 9101 str r1, [sp, #4]
80005e4: 9200 str r2, [sp, #0]
80005e6: 4633 mov r3, r6
80005e8: 462a mov r2, r5
80005ea: 4947 ldr r1, [pc, #284] @ (8000708 <manageCDC+0x30c>)
80005ec: f00d f94c bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80005f0: bf00 nop
80005f2: f107 030c add.w r3, r7, #12
80005f6: 4618 mov r0, r3
80005f8: f7ff fda8 bl 800014c <strlen>
80005fc: 4603 mov r3, r0
80005fe: b29a uxth r2, r3
8000600: f107 030c add.w r3, r7, #12
8000604: 4611 mov r1, r2
8000606: 4618 mov r0, r3
8000608: f00c fd60 bl 800d0cc <CDC_Transmit_FS>
800060c: 4603 mov r3, r0
800060e: 2b01 cmp r3, #1
8000610: d0ef beq.n 80005f2 <manageCDC+0x1f6>
sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti);
8000612: 4b3e ldr r3, [pc, #248] @ (800070c <manageCDC+0x310>)
8000614: 781b ldrb r3, [r3, #0]
8000616: 461a mov r2, r3
8000618: 4b3d ldr r3, [pc, #244] @ (8000710 <manageCDC+0x314>)
800061a: 781b ldrb r3, [r3, #0]
800061c: f107 000c add.w r0, r7, #12
8000620: 493c ldr r1, [pc, #240] @ (8000714 <manageCDC+0x318>)
8000622: f00d f931 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, 31) == USBD_BUSY);
8000626: bf00 nop
8000628: f107 030c add.w r3, r7, #12
800062c: 211f movs r1, #31
800062e: 4618 mov r0, r3
8000630: f00c fd4c bl 800d0cc <CDC_Transmit_FS>
8000634: 4603 mov r3, r0
8000636: 2b01 cmp r3, #1
8000638: d0f6 beq.n 8000628 <manageCDC+0x22c>
break;
800063a: e3b1 b.n 8000da0 <manageCDC+0x9a4>
case 'I':
sprintf((char*)s,"\nID000000");
800063c: f107 030c add.w r3, r7, #12
8000640: 4935 ldr r1, [pc, #212] @ (8000718 <manageCDC+0x31c>)
8000642: 4618 mov r0, r3
8000644: f00d f920 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, 9) == USBD_BUSY);
8000648: bf00 nop
800064a: f107 030c add.w r3, r7, #12
800064e: 2109 movs r1, #9
8000650: 4618 mov r0, r3
8000652: f00c fd3b bl 800d0cc <CDC_Transmit_FS>
8000656: 4603 mov r3, r0
8000658: 2b01 cmp r3, #1
800065a: d0f6 beq.n 800064a <manageCDC+0x24e>
break;
800065c: e3a0 b.n 8000da0 <manageCDC+0x9a4>
case 'm':
if(rxidx==8){
800065e: 4b1d ldr r3, [pc, #116] @ (80006d4 <manageCDC+0x2d8>)
8000660: 781b ldrb r3, [r3, #0]
8000662: 2b08 cmp r3, #8
8000664: f040 8124 bne.w 80008b0 <manageCDC+0x4b4>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
8000668: 4b1b ldr r3, [pc, #108] @ (80006d8 <manageCDC+0x2dc>)
800066a: 785b ldrb r3, [r3, #1]
800066c: 2b30 cmp r3, #48 @ 0x30
800066e: f240 810e bls.w 800088e <manageCDC+0x492>
8000672: 4b19 ldr r3, [pc, #100] @ (80006d8 <manageCDC+0x2dc>)
8000674: 785b ldrb r3, [r3, #1]
8000676: 2b34 cmp r3, #52 @ 0x34
8000678: f200 8109 bhi.w 800088e <manageCDC+0x492>
mot=rxbuf[1]-='0';
800067c: 4b16 ldr r3, [pc, #88] @ (80006d8 <manageCDC+0x2dc>)
800067e: 785b ldrb r3, [r3, #1]
8000680: 3b30 subs r3, #48 @ 0x30
8000682: b2da uxtb r2, r3
8000684: 4b14 ldr r3, [pc, #80] @ (80006d8 <manageCDC+0x2dc>)
8000686: 705a strb r2, [r3, #1]
8000688: 4b13 ldr r3, [pc, #76] @ (80006d8 <manageCDC+0x2dc>)
800068a: 785b ldrb r3, [r3, #1]
800068c: f887 3077 strb.w r3, [r7, #119] @ 0x77
if(rxbuf[2]=='f'){
8000690: 4b11 ldr r3, [pc, #68] @ (80006d8 <manageCDC+0x2dc>)
8000692: 789b ldrb r3, [r3, #2]
8000694: 2b66 cmp r3, #102 @ 0x66
8000696: d103 bne.n 80006a0 <manageCDC+0x2a4>
dir=FW;
8000698: 2300 movs r3, #0
800069a: f887 307f strb.w r3, [r7, #127] @ 0x7f
800069e: e03f b.n 8000720 <manageCDC+0x324>
}else if(rxbuf[2]=='b'){
80006a0: 4b0d ldr r3, [pc, #52] @ (80006d8 <manageCDC+0x2dc>)
80006a2: 789b ldrb r3, [r3, #2]
80006a4: 2b62 cmp r3, #98 @ 0x62
80006a6: d103 bne.n 80006b0 <manageCDC+0x2b4>
dir=BW;
80006a8: 2301 movs r3, #1
80006aa: f887 307f strb.w r3, [r7, #127] @ 0x7f
80006ae: e037 b.n 8000720 <manageCDC+0x324>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
80006b0: f107 030c add.w r3, r7, #12
80006b4: 4919 ldr r1, [pc, #100] @ (800071c <manageCDC+0x320>)
80006b6: 4618 mov r0, r3
80006b8: f00d f8e6 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
80006bc: bf00 nop
80006be: f107 030c add.w r3, r7, #12
80006c2: 2110 movs r1, #16
80006c4: 4618 mov r0, r3
80006c6: f00c fd01 bl 800d0cc <CDC_Transmit_FS>
80006ca: 4603 mov r3, r0
80006cc: 2b01 cmp r3, #1
80006ce: d0f6 beq.n 80006be <manageCDC+0x2c2>
break;
80006d0: e366 b.n 8000da0 <manageCDC+0x9a4>
80006d2: bf00 nop
80006d4: 2000022c .word 0x2000022c
80006d8: 20000230 .word 0x20000230
80006dc: 0800e200 .word 0x0800e200
80006e0: 20000310 .word 0x20000310
80006e4: 20000358 .word 0x20000358
80006e8: 0800e208 .word 0x0800e208
80006ec: 0800e220 .word 0x0800e220
80006f0: 200003e8 .word 0x200003e8
80006f4: 20000222 .word 0x20000222
80006f8: 20000224 .word 0x20000224
80006fc: 20000226 .word 0x20000226
8000700: 20000228 .word 0x20000228
8000704: 2000022a .word 0x2000022a
8000708: 0800e254 .word 0x0800e254
800070c: 20000446 .word 0x20000446
8000710: 20000444 .word 0x20000444
8000714: 0800e28c .word 0x0800e28c
8000718: 0800e2ac .word 0x0800e2ac
800071c: 0800e2b8 .word 0x0800e2b8
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000720: 4bb4 ldr r3, [pc, #720] @ (80009f4 <manageCDC+0x5f8>)
8000722: 78db ldrb r3, [r3, #3]
8000724: 2b2f cmp r3, #47 @ 0x2f
8000726: f240 80a1 bls.w 800086c <manageCDC+0x470>
800072a: 4bb2 ldr r3, [pc, #712] @ (80009f4 <manageCDC+0x5f8>)
800072c: 78db ldrb r3, [r3, #3]
800072e: 2b39 cmp r3, #57 @ 0x39
8000730: f200 809c bhi.w 800086c <manageCDC+0x470>
8000734: 4baf ldr r3, [pc, #700] @ (80009f4 <manageCDC+0x5f8>)
8000736: 791b ldrb r3, [r3, #4]
8000738: 2b2f cmp r3, #47 @ 0x2f
800073a: f240 8097 bls.w 800086c <manageCDC+0x470>
800073e: 4bad ldr r3, [pc, #692] @ (80009f4 <manageCDC+0x5f8>)
8000740: 791b ldrb r3, [r3, #4]
8000742: 2b39 cmp r3, #57 @ 0x39
8000744: f200 8092 bhi.w 800086c <manageCDC+0x470>
8000748: 4baa ldr r3, [pc, #680] @ (80009f4 <manageCDC+0x5f8>)
800074a: 795b ldrb r3, [r3, #5]
800074c: 2b2f cmp r3, #47 @ 0x2f
800074e: f240 808d bls.w 800086c <manageCDC+0x470>
8000752: 4ba8 ldr r3, [pc, #672] @ (80009f4 <manageCDC+0x5f8>)
8000754: 795b ldrb r3, [r3, #5]
8000756: 2b39 cmp r3, #57 @ 0x39
8000758: f200 8088 bhi.w 800086c <manageCDC+0x470>
800075c: 4ba5 ldr r3, [pc, #660] @ (80009f4 <manageCDC+0x5f8>)
800075e: 799b ldrb r3, [r3, #6]
8000760: 2b2f cmp r3, #47 @ 0x2f
8000762: f240 8083 bls.w 800086c <manageCDC+0x470>
8000766: 4ba3 ldr r3, [pc, #652] @ (80009f4 <manageCDC+0x5f8>)
8000768: 799b ldrb r3, [r3, #6]
800076a: 2b39 cmp r3, #57 @ 0x39
800076c: d87e bhi.n 800086c <manageCDC+0x470>
800076e: 4ba1 ldr r3, [pc, #644] @ (80009f4 <manageCDC+0x5f8>)
8000770: 79db ldrb r3, [r3, #7]
8000772: 2b2f cmp r3, #47 @ 0x2f
8000774: d97a bls.n 800086c <manageCDC+0x470>
8000776: 4b9f ldr r3, [pc, #636] @ (80009f4 <manageCDC+0x5f8>)
8000778: 79db ldrb r3, [r3, #7]
800077a: 2b39 cmp r3, #57 @ 0x39
800077c: d876 bhi.n 800086c <manageCDC+0x470>
dm=rxbuf[3]-='0';
800077e: 4b9d ldr r3, [pc, #628] @ (80009f4 <manageCDC+0x5f8>)
8000780: 78db ldrb r3, [r3, #3]
8000782: 3b30 subs r3, #48 @ 0x30
8000784: b2da uxtb r2, r3
8000786: 4b9b ldr r3, [pc, #620] @ (80009f4 <manageCDC+0x5f8>)
8000788: 70da strb r2, [r3, #3]
800078a: 4b9a ldr r3, [pc, #616] @ (80009f4 <manageCDC+0x5f8>)
800078c: 78db ldrb r3, [r3, #3]
800078e: f887 3076 strb.w r3, [r7, #118] @ 0x76
m=rxbuf[4]-='0';
8000792: 4b98 ldr r3, [pc, #608] @ (80009f4 <manageCDC+0x5f8>)
8000794: 791b ldrb r3, [r3, #4]
8000796: 3b30 subs r3, #48 @ 0x30
8000798: b2da uxtb r2, r3
800079a: 4b96 ldr r3, [pc, #600] @ (80009f4 <manageCDC+0x5f8>)
800079c: 711a strb r2, [r3, #4]
800079e: 4b95 ldr r3, [pc, #596] @ (80009f4 <manageCDC+0x5f8>)
80007a0: 791b ldrb r3, [r3, #4]
80007a2: f887 3075 strb.w r3, [r7, #117] @ 0x75
c=rxbuf[5]-='0';
80007a6: 4b93 ldr r3, [pc, #588] @ (80009f4 <manageCDC+0x5f8>)
80007a8: 795b ldrb r3, [r3, #5]
80007aa: 3b30 subs r3, #48 @ 0x30
80007ac: b2da uxtb r2, r3
80007ae: 4b91 ldr r3, [pc, #580] @ (80009f4 <manageCDC+0x5f8>)
80007b0: 715a strb r2, [r3, #5]
80007b2: 4b90 ldr r3, [pc, #576] @ (80009f4 <manageCDC+0x5f8>)
80007b4: 795b ldrb r3, [r3, #5]
80007b6: f887 3074 strb.w r3, [r7, #116] @ 0x74
d=rxbuf[6]-='0';
80007ba: 4b8e ldr r3, [pc, #568] @ (80009f4 <manageCDC+0x5f8>)
80007bc: 799b ldrb r3, [r3, #6]
80007be: 3b30 subs r3, #48 @ 0x30
80007c0: b2da uxtb r2, r3
80007c2: 4b8c ldr r3, [pc, #560] @ (80009f4 <manageCDC+0x5f8>)
80007c4: 719a strb r2, [r3, #6]
80007c6: 4b8b ldr r3, [pc, #556] @ (80009f4 <manageCDC+0x5f8>)
80007c8: 799b ldrb r3, [r3, #6]
80007ca: f887 3073 strb.w r3, [r7, #115] @ 0x73
u=rxbuf[7]-='0';
80007ce: 4b89 ldr r3, [pc, #548] @ (80009f4 <manageCDC+0x5f8>)
80007d0: 79db ldrb r3, [r3, #7]
80007d2: 3b30 subs r3, #48 @ 0x30
80007d4: b2da uxtb r2, r3
80007d6: 4b87 ldr r3, [pc, #540] @ (80009f4 <manageCDC+0x5f8>)
80007d8: 71da strb r2, [r3, #7]
80007da: 4b86 ldr r3, [pc, #536] @ (80009f4 <manageCDC+0x5f8>)
80007dc: 79db ldrb r3, [r3, #7]
80007de: f887 3072 strb.w r3, [r7, #114] @ 0x72
val=dm;
80007e2: f897 3076 ldrb.w r3, [r7, #118] @ 0x76
80007e6: b29b uxth r3, r3
80007e8: 817b strh r3, [r7, #10]
val*=10;
80007ea: 897b ldrh r3, [r7, #10]
80007ec: 461a mov r2, r3
80007ee: 0092 lsls r2, r2, #2
80007f0: 4413 add r3, r2
80007f2: 005b lsls r3, r3, #1
80007f4: b29b uxth r3, r3
80007f6: 817b strh r3, [r7, #10]
val+=m;
80007f8: f897 3075 ldrb.w r3, [r7, #117] @ 0x75
80007fc: b29a uxth r2, r3
80007fe: 897b ldrh r3, [r7, #10]
8000800: 4413 add r3, r2
8000802: b29b uxth r3, r3
8000804: 817b strh r3, [r7, #10]
val*=10;
8000806: 897b ldrh r3, [r7, #10]
8000808: 461a mov r2, r3
800080a: 0092 lsls r2, r2, #2
800080c: 4413 add r3, r2
800080e: 005b lsls r3, r3, #1
8000810: b29b uxth r3, r3
8000812: 817b strh r3, [r7, #10]
val+=c;
8000814: f897 3074 ldrb.w r3, [r7, #116] @ 0x74
8000818: b29a uxth r2, r3
800081a: 897b ldrh r3, [r7, #10]
800081c: 4413 add r3, r2
800081e: b29b uxth r3, r3
8000820: 817b strh r3, [r7, #10]
val*=10;
8000822: 897b ldrh r3, [r7, #10]
8000824: 461a mov r2, r3
8000826: 0092 lsls r2, r2, #2
8000828: 4413 add r3, r2
800082a: 005b lsls r3, r3, #1
800082c: b29b uxth r3, r3
800082e: 817b strh r3, [r7, #10]
val+=d;
8000830: f897 3073 ldrb.w r3, [r7, #115] @ 0x73
8000834: b29a uxth r2, r3
8000836: 897b ldrh r3, [r7, #10]
8000838: 4413 add r3, r2
800083a: b29b uxth r3, r3
800083c: 817b strh r3, [r7, #10]
val*=10;
800083e: 897b ldrh r3, [r7, #10]
8000840: 461a mov r2, r3
8000842: 0092 lsls r2, r2, #2
8000844: 4413 add r3, r2
8000846: 005b lsls r3, r3, #1
8000848: b29b uxth r3, r3
800084a: 817b strh r3, [r7, #10]
val+=u;
800084c: f897 3072 ldrb.w r3, [r7, #114] @ 0x72
8000850: b29a uxth r2, r3
8000852: 897b ldrh r3, [r7, #10]
8000854: 4413 add r3, r2
8000856: b29b uxth r3, r3
8000858: 817b strh r3, [r7, #10]
SetMot(mot,dir,val);
800085a: 897a ldrh r2, [r7, #10]
800085c: f897 107f ldrb.w r1, [r7, #127] @ 0x7f
8000860: f897 3077 ldrb.w r3, [r7, #119] @ 0x77
8000864: 4618 mov r0, r3
8000866: f003 f85d bl 8003924 <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800086a: e032 b.n 80008d2 <manageCDC+0x4d6>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
800086c: f107 030c add.w r3, r7, #12
8000870: 4961 ldr r1, [pc, #388] @ (80009f8 <manageCDC+0x5fc>)
8000872: 4618 mov r0, r3
8000874: f00d f808 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
8000878: bf00 nop
800087a: f107 030c add.w r3, r7, #12
800087e: 2113 movs r1, #19
8000880: 4618 mov r0, r3
8000882: f00c fc23 bl 800d0cc <CDC_Transmit_FS>
8000886: 4603 mov r3, r0
8000888: 2b01 cmp r3, #1
800088a: d0f6 beq.n 800087a <manageCDC+0x47e>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800088c: e021 b.n 80008d2 <manageCDC+0x4d6>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
800088e: f107 030c add.w r3, r7, #12
8000892: 495a ldr r1, [pc, #360] @ (80009fc <manageCDC+0x600>)
8000894: 4618 mov r0, r3
8000896: f00c fff7 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800089a: bf00 nop
800089c: f107 030c add.w r3, r7, #12
80008a0: 2113 movs r1, #19
80008a2: 4618 mov r0, r3
80008a4: f00c fc12 bl 800d0cc <CDC_Transmit_FS>
80008a8: 4603 mov r3, r0
80008aa: 2b01 cmp r3, #1
80008ac: d0f6 beq.n 800089c <manageCDC+0x4a0>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
80008ae: e277 b.n 8000da0 <manageCDC+0x9a4>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
80008b0: f107 030c add.w r3, r7, #12
80008b4: 4952 ldr r1, [pc, #328] @ (8000a00 <manageCDC+0x604>)
80008b6: 4618 mov r0, r3
80008b8: f00c ffe6 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80008bc: bf00 nop
80008be: f107 030c add.w r3, r7, #12
80008c2: 210a movs r1, #10
80008c4: 4618 mov r0, r3
80008c6: f00c fc01 bl 800d0cc <CDC_Transmit_FS>
80008ca: 4603 mov r3, r0
80008cc: 2b01 cmp r3, #1
80008ce: d0f6 beq.n 80008be <manageCDC+0x4c2>
break;
80008d0: e266 b.n 8000da0 <manageCDC+0x9a4>
80008d2: e265 b.n 8000da0 <manageCDC+0x9a4>
case 'e':
if(rxidx>1){
80008d4: 4b4b ldr r3, [pc, #300] @ (8000a04 <manageCDC+0x608>)
80008d6: 781b ldrb r3, [r3, #0]
80008d8: 2b01 cmp r3, #1
80008da: f240 8237 bls.w 8000d4c <manageCDC+0x950>
if(rxbuf[1]=='r'){
80008de: 4b45 ldr r3, [pc, #276] @ (80009f4 <manageCDC+0x5f8>)
80008e0: 785b ldrb r3, [r3, #1]
80008e2: 2b72 cmp r3, #114 @ 0x72
80008e4: f040 8098 bne.w 8000a18 <manageCDC+0x61c>
if(rxidx==4){
80008e8: 4b46 ldr r3, [pc, #280] @ (8000a04 <manageCDC+0x608>)
80008ea: 781b ldrb r3, [r3, #0]
80008ec: 2b04 cmp r3, #4
80008ee: d169 bne.n 80009c4 <manageCDC+0x5c8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
80008f0: 4b40 ldr r3, [pc, #256] @ (80009f4 <manageCDC+0x5f8>)
80008f2: 789a ldrb r2, [r3, #2]
80008f4: 4b3f ldr r3, [pc, #252] @ (80009f4 <manageCDC+0x5f8>)
80008f6: 78d9 ldrb r1, [r3, #3]
80008f8: f107 0308 add.w r3, r7, #8
80008fc: 9300 str r3, [sp, #0]
80008fe: 460b mov r3, r1
8000900: 2130 movs r1, #48 @ 0x30
8000902: 2030 movs r0, #48 @ 0x30
8000904: f7ff fcdf bl 80002c6 <toHex>
8000908: 4603 mov r3, r0
800090a: 2b00 cmp r3, #0
800090c: d042 beq.n 8000994 <manageCDC+0x598>
st=EEW_Read(eeadd, &val);
800090e: 893b ldrh r3, [r7, #8]
8000910: b2db uxtb r3, r3
8000912: f107 020a add.w r2, r7, #10
8000916: 4611 mov r1, r2
8000918: 4618 mov r0, r3
800091a: f7ff fcab bl 8000274 <EEW_Read>
800091e: 4603 mov r3, r0
8000920: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000924: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000928: 2b00 cmp r3, #0
800092a: d119 bne.n 8000960 <manageCDC+0x564>
sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val);
800092c: 893b ldrh r3, [r7, #8]
800092e: 461a mov r2, r3
8000930: 897b ldrh r3, [r7, #10]
8000932: f107 000c add.w r0, r7, #12
8000936: 4934 ldr r1, [pc, #208] @ (8000a08 <manageCDC+0x60c>)
8000938: f00c ffa6 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800093c: bf00 nop
800093e: f107 030c add.w r3, r7, #12
8000942: 4618 mov r0, r3
8000944: f7ff fc02 bl 800014c <strlen>
8000948: 4603 mov r3, r0
800094a: b29a uxth r2, r3
800094c: f107 030c add.w r3, r7, #12
8000950: 4611 mov r1, r2
8000952: 4618 mov r0, r3
8000954: f00c fbba bl 800d0cc <CDC_Transmit_FS>
8000958: 4603 mov r3, r0
800095a: 2b01 cmp r3, #1
800095c: d0ef beq.n 800093e <manageCDC+0x542>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
800095e: e21e b.n 8000d9e <manageCDC+0x9a2>
sprintf((char*)s,"\nee read error %d",st);
8000960: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000964: f107 030c add.w r3, r7, #12
8000968: 4928 ldr r1, [pc, #160] @ (8000a0c <manageCDC+0x610>)
800096a: 4618 mov r0, r3
800096c: f00c ff8c bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000970: bf00 nop
8000972: f107 030c add.w r3, r7, #12
8000976: 4618 mov r0, r3
8000978: f7ff fbe8 bl 800014c <strlen>
800097c: 4603 mov r3, r0
800097e: b29a uxth r2, r3
8000980: f107 030c add.w r3, r7, #12
8000984: 4611 mov r1, r2
8000986: 4618 mov r0, r3
8000988: f00c fba0 bl 800d0cc <CDC_Transmit_FS>
800098c: 4603 mov r3, r0
800098e: 2b01 cmp r3, #1
8000990: d0ef beq.n 8000972 <manageCDC+0x576>
break;
8000992: e204 b.n 8000d9e <manageCDC+0x9a2>
sprintf((char*)s,"\n?eraa hex values");
8000994: f107 030c add.w r3, r7, #12
8000998: 491d ldr r1, [pc, #116] @ (8000a10 <manageCDC+0x614>)
800099a: 4618 mov r0, r3
800099c: f00c ff74 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80009a0: bf00 nop
80009a2: f107 030c add.w r3, r7, #12
80009a6: 4618 mov r0, r3
80009a8: f7ff fbd0 bl 800014c <strlen>
80009ac: 4603 mov r3, r0
80009ae: b29a uxth r2, r3
80009b0: f107 030c add.w r3, r7, #12
80009b4: 4611 mov r1, r2
80009b6: 4618 mov r0, r3
80009b8: f00c fb88 bl 800d0cc <CDC_Transmit_FS>
80009bc: 4603 mov r3, r0
80009be: 2b01 cmp r3, #1
80009c0: d0ef beq.n 80009a2 <manageCDC+0x5a6>
break;
80009c2: e1ec b.n 8000d9e <manageCDC+0x9a2>
sprintf((char*)s,"\n?eraa");
80009c4: f107 030c add.w r3, r7, #12
80009c8: 4912 ldr r1, [pc, #72] @ (8000a14 <manageCDC+0x618>)
80009ca: 4618 mov r0, r3
80009cc: f00c ff5c bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80009d0: bf00 nop
80009d2: f107 030c add.w r3, r7, #12
80009d6: 4618 mov r0, r3
80009d8: f7ff fbb8 bl 800014c <strlen>
80009dc: 4603 mov r3, r0
80009de: b29a uxth r2, r3
80009e0: f107 030c add.w r3, r7, #12
80009e4: 4611 mov r1, r2
80009e6: 4618 mov r0, r3
80009e8: f00c fb70 bl 800d0cc <CDC_Transmit_FS>
80009ec: 4603 mov r3, r0
80009ee: 2b01 cmp r3, #1
80009f0: d0ef beq.n 80009d2 <manageCDC+0x5d6>
break;
80009f2: e1d4 b.n 8000d9e <manageCDC+0x9a2>
80009f4: 20000230 .word 0x20000230
80009f8: 0800e2cc .word 0x0800e2cc
80009fc: 0800e2ec .word 0x0800e2ec
8000a00: 0800e300 .word 0x0800e300
8000a04: 2000022c .word 0x2000022c
8000a08: 0800e30c .word 0x0800e30c
8000a0c: 0800e320 .word 0x0800e320
8000a10: 0800e334 .word 0x0800e334
8000a14: 0800e348 .word 0x0800e348
}else if(rxbuf[1]=='w'){
8000a18: 4bbe ldr r3, [pc, #760] @ (8000d14 <manageCDC+0x918>)
8000a1a: 785b ldrb r3, [r3, #1]
8000a1c: 2b77 cmp r3, #119 @ 0x77
8000a1e: d169 bne.n 8000af4 <manageCDC+0x6f8>
if(rxidx==8){
8000a20: 4bbd ldr r3, [pc, #756] @ (8000d18 <manageCDC+0x91c>)
8000a22: 781b ldrb r3, [r3, #0]
8000a24: 2b08 cmp r3, #8
8000a26: d14d bne.n 8000ac4 <manageCDC+0x6c8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000a28: 4bba ldr r3, [pc, #744] @ (8000d14 <manageCDC+0x918>)
8000a2a: 789a ldrb r2, [r3, #2]
8000a2c: 4bb9 ldr r3, [pc, #740] @ (8000d14 <manageCDC+0x918>)
8000a2e: 78d9 ldrb r1, [r3, #3]
8000a30: f107 0308 add.w r3, r7, #8
8000a34: 9300 str r3, [sp, #0]
8000a36: 460b mov r3, r1
8000a38: 2130 movs r1, #48 @ 0x30
8000a3a: 2030 movs r0, #48 @ 0x30
8000a3c: f7ff fc43 bl 80002c6 <toHex>
8000a40: 4603 mov r3, r0
8000a42: 2b00 cmp r3, #0
8000a44: d037 beq.n 8000ab6 <manageCDC+0x6ba>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
8000a46: 4bb3 ldr r3, [pc, #716] @ (8000d14 <manageCDC+0x918>)
8000a48: 7918 ldrb r0, [r3, #4]
8000a4a: 4bb2 ldr r3, [pc, #712] @ (8000d14 <manageCDC+0x918>)
8000a4c: 7959 ldrb r1, [r3, #5]
8000a4e: 4bb1 ldr r3, [pc, #708] @ (8000d14 <manageCDC+0x918>)
8000a50: 799a ldrb r2, [r3, #6]
8000a52: 4bb0 ldr r3, [pc, #704] @ (8000d14 <manageCDC+0x918>)
8000a54: 79dc ldrb r4, [r3, #7]
8000a56: f107 030a add.w r3, r7, #10
8000a5a: 9300 str r3, [sp, #0]
8000a5c: 4623 mov r3, r4
8000a5e: f7ff fc32 bl 80002c6 <toHex>
8000a62: 4603 mov r3, r0
8000a64: 2b00 cmp r3, #0
8000a66: d01f beq.n 8000aa8 <manageCDC+0x6ac>
st=EEW_Write(eeadd, val);
8000a68: 893b ldrh r3, [r7, #8]
8000a6a: b2db uxtb r3, r3
8000a6c: 897a ldrh r2, [r7, #10]
8000a6e: 4611 mov r1, r2
8000a70: 4618 mov r0, r3
8000a72: f7ff fc12 bl 800029a <EEW_Write>
8000a76: 4603 mov r3, r0
8000a78: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val);
8000a7c: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000a80: 2b00 cmp r3, #0
8000a82: d108 bne.n 8000a96 <manageCDC+0x69a>
8000a84: 893b ldrh r3, [r7, #8]
8000a86: 461a mov r2, r3
8000a88: 897b ldrh r3, [r7, #10]
8000a8a: f107 000c add.w r0, r7, #12
8000a8e: 49a3 ldr r1, [pc, #652] @ (8000d1c <manageCDC+0x920>)
8000a90: f00c fefa bl 800d888 <siprintf>
8000a94: e01c b.n 8000ad0 <manageCDC+0x6d4>
else sprintf((char*)s,"\nee write error %d", st);
8000a96: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000a9a: f107 030c add.w r3, r7, #12
8000a9e: 49a0 ldr r1, [pc, #640] @ (8000d20 <manageCDC+0x924>)
8000aa0: 4618 mov r0, r3
8000aa2: f00c fef1 bl 800d888 <siprintf>
8000aa6: e013 b.n 8000ad0 <manageCDC+0x6d4>
}else sprintf((char*)s,"\n?ewaavvvv hex values");
8000aa8: f107 030c add.w r3, r7, #12
8000aac: 499d ldr r1, [pc, #628] @ (8000d24 <manageCDC+0x928>)
8000aae: 4618 mov r0, r3
8000ab0: f00c feea bl 800d888 <siprintf>
8000ab4: e00c b.n 8000ad0 <manageCDC+0x6d4>
}else sprintf((char*)s,"\n?ewaa hex values");
8000ab6: f107 030c add.w r3, r7, #12
8000aba: 499b ldr r1, [pc, #620] @ (8000d28 <manageCDC+0x92c>)
8000abc: 4618 mov r0, r3
8000abe: f00c fee3 bl 800d888 <siprintf>
8000ac2: e005 b.n 8000ad0 <manageCDC+0x6d4>
}else sprintf((char*)s,"\n?ewaavvvv");
8000ac4: f107 030c add.w r3, r7, #12
8000ac8: 4998 ldr r1, [pc, #608] @ (8000d2c <manageCDC+0x930>)
8000aca: 4618 mov r0, r3
8000acc: f00c fedc bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ad0: bf00 nop
8000ad2: f107 030c add.w r3, r7, #12
8000ad6: 4618 mov r0, r3
8000ad8: f7ff fb38 bl 800014c <strlen>
8000adc: 4603 mov r3, r0
8000ade: b29a uxth r2, r3
8000ae0: f107 030c add.w r3, r7, #12
8000ae4: 4611 mov r1, r2
8000ae6: 4618 mov r0, r3
8000ae8: f00c faf0 bl 800d0cc <CDC_Transmit_FS>
8000aec: 4603 mov r3, r0
8000aee: 2b01 cmp r3, #1
8000af0: d0ef beq.n 8000ad2 <manageCDC+0x6d6>
break;
8000af2: e154 b.n 8000d9e <manageCDC+0x9a2>
}else if(rxbuf[1]=='d'){
8000af4: 4b87 ldr r3, [pc, #540] @ (8000d14 <manageCDC+0x918>)
8000af6: 785b ldrb r3, [r3, #1]
8000af8: 2b64 cmp r3, #100 @ 0x64
8000afa: f040 808b bne.w 8000c14 <manageCDC+0x818>
if(rxidx==2){
8000afe: 4b86 ldr r3, [pc, #536] @ (8000d18 <manageCDC+0x91c>)
8000b00: 781b ldrb r3, [r3, #0]
8000b02: 2b02 cmp r3, #2
8000b04: d16e bne.n 8000be4 <manageCDC+0x7e8>
for(i=0;i<32;i++){
8000b06: 2300 movs r3, #0
8000b08: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000b0c: e046 b.n 8000b9c <manageCDC+0x7a0>
st=EEW_Read(i, &val);
8000b0e: f107 020a add.w r2, r7, #10
8000b12: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000b16: 4611 mov r1, r2
8000b18: 4618 mov r0, r3
8000b1a: f7ff fbab bl 8000274 <EEW_Read>
8000b1e: 4603 mov r3, r0
8000b20: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK){
8000b24: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000b28: 2b00 cmp r3, #0
8000b2a: d119 bne.n 8000b60 <manageCDC+0x764>
sprintf((char*)s,"\n0x%02x=%5d ",i,val);
8000b2c: f897 207e ldrb.w r2, [r7, #126] @ 0x7e
8000b30: 897b ldrh r3, [r7, #10]
8000b32: f107 000c add.w r0, r7, #12
8000b36: 497e ldr r1, [pc, #504] @ (8000d30 <manageCDC+0x934>)
8000b38: f00c fea6 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000b3c: bf00 nop
8000b3e: f107 030c add.w r3, r7, #12
8000b42: 4618 mov r0, r3
8000b44: f7ff fb02 bl 800014c <strlen>
8000b48: 4603 mov r3, r0
8000b4a: b29a uxth r2, r3
8000b4c: f107 030c add.w r3, r7, #12
8000b50: 4611 mov r1, r2
8000b52: 4618 mov r0, r3
8000b54: f00c faba bl 800d0cc <CDC_Transmit_FS>
8000b58: 4603 mov r3, r0
8000b5a: 2b01 cmp r3, #1
8000b5c: d0ef beq.n 8000b3e <manageCDC+0x742>
8000b5e: e018 b.n 8000b92 <manageCDC+0x796>
sprintf((char*)s,"rderr %d ",st);
8000b60: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000b64: f107 030c add.w r3, r7, #12
8000b68: 4972 ldr r1, [pc, #456] @ (8000d34 <manageCDC+0x938>)
8000b6a: 4618 mov r0, r3
8000b6c: f00c fe8c bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000b70: bf00 nop
8000b72: f107 030c add.w r3, r7, #12
8000b76: 4618 mov r0, r3
8000b78: f7ff fae8 bl 800014c <strlen>
8000b7c: 4603 mov r3, r0
8000b7e: b29a uxth r2, r3
8000b80: f107 030c add.w r3, r7, #12
8000b84: 4611 mov r1, r2
8000b86: 4618 mov r0, r3
8000b88: f00c faa0 bl 800d0cc <CDC_Transmit_FS>
8000b8c: 4603 mov r3, r0
8000b8e: 2b01 cmp r3, #1
8000b90: d0ef beq.n 8000b72 <manageCDC+0x776>
for(i=0;i<32;i++){
8000b92: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000b96: 3301 adds r3, #1
8000b98: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000b9c: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000ba0: 2b1f cmp r3, #31
8000ba2: d9b4 bls.n 8000b0e <manageCDC+0x712>
if((i%4)==0){
8000ba4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000ba8: f003 0303 and.w r3, r3, #3
8000bac: b2db uxtb r3, r3
8000bae: 2b00 cmp r3, #0
8000bb0: f040 80f5 bne.w 8000d9e <manageCDC+0x9a2>
sprintf((char*)s,"\n");
8000bb4: f107 030c add.w r3, r7, #12
8000bb8: 495f ldr r1, [pc, #380] @ (8000d38 <manageCDC+0x93c>)
8000bba: 4618 mov r0, r3
8000bbc: f00c fe64 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bc0: bf00 nop
8000bc2: f107 030c add.w r3, r7, #12
8000bc6: 4618 mov r0, r3
8000bc8: f7ff fac0 bl 800014c <strlen>
8000bcc: 4603 mov r3, r0
8000bce: b29a uxth r2, r3
8000bd0: f107 030c add.w r3, r7, #12
8000bd4: 4611 mov r1, r2
8000bd6: 4618 mov r0, r3
8000bd8: f00c fa78 bl 800d0cc <CDC_Transmit_FS>
8000bdc: 4603 mov r3, r0
8000bde: 2b01 cmp r3, #1
8000be0: d0ef beq.n 8000bc2 <manageCDC+0x7c6>
break;
8000be2: e0dc b.n 8000d9e <manageCDC+0x9a2>
sprintf((char*)s,"\n?ed");
8000be4: f107 030c add.w r3, r7, #12
8000be8: 4954 ldr r1, [pc, #336] @ (8000d3c <manageCDC+0x940>)
8000bea: 4618 mov r0, r3
8000bec: f00c fe4c bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bf0: bf00 nop
8000bf2: f107 030c add.w r3, r7, #12
8000bf6: 4618 mov r0, r3
8000bf8: f7ff faa8 bl 800014c <strlen>
8000bfc: 4603 mov r3, r0
8000bfe: b29a uxth r2, r3
8000c00: f107 030c add.w r3, r7, #12
8000c04: 4611 mov r1, r2
8000c06: 4618 mov r0, r3
8000c08: f00c fa60 bl 800d0cc <CDC_Transmit_FS>
8000c0c: 4603 mov r3, r0
8000c0e: 2b01 cmp r3, #1
8000c10: d0ef beq.n 8000bf2 <manageCDC+0x7f6>
break;
8000c12: e0c4 b.n 8000d9e <manageCDC+0x9a2>
}else if(rxbuf[1]=='x'){
8000c14: 4b3f ldr r3, [pc, #252] @ (8000d14 <manageCDC+0x918>)
8000c16: 785b ldrb r3, [r3, #1]
8000c18: 2b78 cmp r3, #120 @ 0x78
8000c1a: d162 bne.n 8000ce2 <manageCDC+0x8e6>
if(rxidx==2){
8000c1c: 4b3e ldr r3, [pc, #248] @ (8000d18 <manageCDC+0x91c>)
8000c1e: 781b ldrb r3, [r3, #0]
8000c20: 2b02 cmp r3, #2
8000c22: d146 bne.n 8000cb2 <manageCDC+0x8b6>
for(i=0;i<32;i++){
8000c24: 2300 movs r3, #0
8000c26: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000c2a: e03b b.n 8000ca4 <manageCDC+0x8a8>
st=EEW_Write(i,deftab[i]);
8000c2c: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c30: 4a43 ldr r2, [pc, #268] @ (8000d40 <manageCDC+0x944>)
8000c32: 5cd3 ldrb r3, [r2, r3]
8000c34: 461a mov r2, r3
8000c36: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c3a: 4611 mov r1, r2
8000c3c: 4618 mov r0, r3
8000c3e: f7ff fb2c bl 800029a <EEW_Write>
8000c42: 4603 mov r3, r0
8000c44: f8a7 3070 strh.w r3, [r7, #112] @ 0x70
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",i,deftab[i]);
8000c48: f8b7 3070 ldrh.w r3, [r7, #112] @ 0x70
8000c4c: 2b00 cmp r3, #0
8000c4e: d10b bne.n 8000c68 <manageCDC+0x86c>
8000c50: f897 207e ldrb.w r2, [r7, #126] @ 0x7e
8000c54: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c58: 4939 ldr r1, [pc, #228] @ (8000d40 <manageCDC+0x944>)
8000c5a: 5ccb ldrb r3, [r1, r3]
8000c5c: f107 000c add.w r0, r7, #12
8000c60: 492e ldr r1, [pc, #184] @ (8000d1c <manageCDC+0x920>)
8000c62: f00c fe11 bl 800d888 <siprintf>
8000c66: e007 b.n 8000c78 <manageCDC+0x87c>
else sprintf((char*)s,"\nee write error %d", st);
8000c68: f8b7 2070 ldrh.w r2, [r7, #112] @ 0x70
8000c6c: f107 030c add.w r3, r7, #12
8000c70: 492b ldr r1, [pc, #172] @ (8000d20 <manageCDC+0x924>)
8000c72: 4618 mov r0, r3
8000c74: f00c fe08 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c78: bf00 nop
8000c7a: f107 030c add.w r3, r7, #12
8000c7e: 4618 mov r0, r3
8000c80: f7ff fa64 bl 800014c <strlen>
8000c84: 4603 mov r3, r0
8000c86: b29a uxth r2, r3
8000c88: f107 030c add.w r3, r7, #12
8000c8c: 4611 mov r1, r2
8000c8e: 4618 mov r0, r3
8000c90: f00c fa1c bl 800d0cc <CDC_Transmit_FS>
8000c94: 4603 mov r3, r0
8000c96: 2b01 cmp r3, #1
8000c98: d0ef beq.n 8000c7a <manageCDC+0x87e>
for(i=0;i<32;i++){
8000c9a: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000c9e: 3301 adds r3, #1
8000ca0: f887 307e strb.w r3, [r7, #126] @ 0x7e
8000ca4: f897 307e ldrb.w r3, [r7, #126] @ 0x7e
8000ca8: 2b1f cmp r3, #31
8000caa: d9bf bls.n 8000c2c <manageCDC+0x830>
loadEE();
8000cac: f000 fb20 bl 80012f0 <loadEE>
break;
8000cb0: e075 b.n 8000d9e <manageCDC+0x9a2>
sprintf((char*)s,"\n?ex");
8000cb2: f107 030c add.w r3, r7, #12
8000cb6: 4923 ldr r1, [pc, #140] @ (8000d44 <manageCDC+0x948>)
8000cb8: 4618 mov r0, r3
8000cba: f00c fde5 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000cbe: bf00 nop
8000cc0: f107 030c add.w r3, r7, #12
8000cc4: 4618 mov r0, r3
8000cc6: f7ff fa41 bl 800014c <strlen>
8000cca: 4603 mov r3, r0
8000ccc: b29a uxth r2, r3
8000cce: f107 030c add.w r3, r7, #12
8000cd2: 4611 mov r1, r2
8000cd4: 4618 mov r0, r3
8000cd6: f00c f9f9 bl 800d0cc <CDC_Transmit_FS>
8000cda: 4603 mov r3, r0
8000cdc: 2b01 cmp r3, #1
8000cde: d0ef beq.n 8000cc0 <manageCDC+0x8c4>
break;
8000ce0: e05d b.n 8000d9e <manageCDC+0x9a2>
sprintf((char*)s,"\n?er|w|d|x");
8000ce2: f107 030c add.w r3, r7, #12
8000ce6: 4918 ldr r1, [pc, #96] @ (8000d48 <manageCDC+0x94c>)
8000ce8: 4618 mov r0, r3
8000cea: f00c fdcd bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000cee: bf00 nop
8000cf0: f107 030c add.w r3, r7, #12
8000cf4: 4618 mov r0, r3
8000cf6: f7ff fa29 bl 800014c <strlen>
8000cfa: 4603 mov r3, r0
8000cfc: b29a uxth r2, r3
8000cfe: f107 030c add.w r3, r7, #12
8000d02: 4611 mov r1, r2
8000d04: 4618 mov r0, r3
8000d06: f00c f9e1 bl 800d0cc <CDC_Transmit_FS>
8000d0a: 4603 mov r3, r0
8000d0c: 2b01 cmp r3, #1
8000d0e: d0ef beq.n 8000cf0 <manageCDC+0x8f4>
break;
8000d10: e045 b.n 8000d9e <manageCDC+0x9a2>
8000d12: bf00 nop
8000d14: 20000230 .word 0x20000230
8000d18: 2000022c .word 0x2000022c
8000d1c: 0800e350 .word 0x0800e350
8000d20: 0800e364 .word 0x0800e364
8000d24: 0800e378 .word 0x0800e378
8000d28: 0800e390 .word 0x0800e390
8000d2c: 0800e3a4 .word 0x0800e3a4
8000d30: 0800e3b0 .word 0x0800e3b0
8000d34: 0800e3c0 .word 0x0800e3c0
8000d38: 0800e3cc .word 0x0800e3cc
8000d3c: 0800e3d0 .word 0x0800e3d0
8000d40: 0800e56c .word 0x0800e56c
8000d44: 0800e3d8 .word 0x0800e3d8
8000d48: 0800e3e0 .word 0x0800e3e0
sprintf((char*)s,"\n?eraa | ewaavvvv");
8000d4c: f107 030c add.w r3, r7, #12
8000d50: 491b ldr r1, [pc, #108] @ (8000dc0 <manageCDC+0x9c4>)
8000d52: 4618 mov r0, r3
8000d54: f00c fd98 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d58: bf00 nop
8000d5a: f107 030c add.w r3, r7, #12
8000d5e: 4618 mov r0, r3
8000d60: f7ff f9f4 bl 800014c <strlen>
8000d64: 4603 mov r3, r0
8000d66: b29a uxth r2, r3
8000d68: f107 030c add.w r3, r7, #12
8000d6c: 4611 mov r1, r2
8000d6e: 4618 mov r0, r3
8000d70: f00c f9ac bl 800d0cc <CDC_Transmit_FS>
8000d74: 4603 mov r3, r0
8000d76: 2b01 cmp r3, #1
8000d78: d0ef beq.n 8000d5a <manageCDC+0x95e>
break;
8000d7a: e010 b.n 8000d9e <manageCDC+0x9a2>
default:
sprintf((char*)s,"\n?");
8000d7c: f107 030c add.w r3, r7, #12
8000d80: 4910 ldr r1, [pc, #64] @ (8000dc4 <manageCDC+0x9c8>)
8000d82: 4618 mov r0, r3
8000d84: f00c fd80 bl 800d888 <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8000d88: bf00 nop
8000d8a: f107 030c add.w r3, r7, #12
8000d8e: 2102 movs r1, #2
8000d90: 4618 mov r0, r3
8000d92: f00c f99b bl 800d0cc <CDC_Transmit_FS>
8000d96: 4603 mov r3, r0
8000d98: 2b01 cmp r3, #1
8000d9a: d0f6 beq.n 8000d8a <manageCDC+0x98e>
break;
8000d9c: e000 b.n 8000da0 <manageCDC+0x9a4>
break;
8000d9e: bf00 nop
}
}
rxidx=0;
8000da0: 4b09 ldr r3, [pc, #36] @ (8000dc8 <manageCDC+0x9cc>)
8000da2: 2200 movs r2, #0
8000da4: 701a strb r2, [r3, #0]
8000da6: e007 b.n 8000db8 <manageCDC+0x9bc>
}else rxidx++;
8000da8: 4b07 ldr r3, [pc, #28] @ (8000dc8 <manageCDC+0x9cc>)
8000daa: 781b ldrb r3, [r3, #0]
8000dac: 3301 adds r3, #1
8000dae: b2da uxtb r2, r3
8000db0: 4b05 ldr r3, [pc, #20] @ (8000dc8 <manageCDC+0x9cc>)
8000db2: 701a strb r2, [r3, #0]
8000db4: e000 b.n 8000db8 <manageCDC+0x9bc>
if (rx < 0) return;
8000db6: bf00 nop
// tiny spin or yield
}
}
8000db8: 3784 adds r7, #132 @ 0x84
8000dba: 46bd mov sp, r7
8000dbc: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
8000dc0: 0800e3ec .word 0x0800e3ec
8000dc4: 0800e400 .word 0x0800e400
8000dc8: 2000022c .word 0x2000022c
08000dcc <debug>:
extern UART_HandleTypeDef huart1;
extern uint8_t pulsanti;
extern uint16_t stPulsanti;
extern omCiclo_st stCiclo;
void debug(void){
8000dcc: b580 push {r7, lr}
8000dce: b09a sub sp, #104 @ 0x68
8000dd0: af00 add r7, sp, #0
static uint8_t mempulsanti=0;
static uint16_t memstPulsanti=0;
static omCiclo_st memstCiclo=omchiuso;
char s [100];
if(mempulsanti!=pulsanti){
8000dd2: 4b2f ldr r3, [pc, #188] @ (8000e90 <debug+0xc4>)
8000dd4: 781a ldrb r2, [r3, #0]
8000dd6: 4b2f ldr r3, [pc, #188] @ (8000e94 <debug+0xc8>)
8000dd8: 781b ldrb r3, [r3, #0]
8000dda: 429a cmp r2, r3
8000ddc: d017 beq.n 8000e0e <debug+0x42>
mempulsanti=pulsanti;
8000dde: 4b2d ldr r3, [pc, #180] @ (8000e94 <debug+0xc8>)
8000de0: 781a ldrb r2, [r3, #0]
8000de2: 4b2b ldr r3, [pc, #172] @ (8000e90 <debug+0xc4>)
8000de4: 701a strb r2, [r3, #0]
sprintf(s,"\npulsanti=%X",pulsanti);
8000de6: 4b2b ldr r3, [pc, #172] @ (8000e94 <debug+0xc8>)
8000de8: 781b ldrb r3, [r3, #0]
8000dea: 461a mov r2, r3
8000dec: 1d3b adds r3, r7, #4
8000dee: 492a ldr r1, [pc, #168] @ (8000e98 <debug+0xcc>)
8000df0: 4618 mov r0, r3
8000df2: f00c fd49 bl 800d888 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8000df6: 1d3b adds r3, r7, #4
8000df8: 4618 mov r0, r3
8000dfa: f7ff f9a7 bl 800014c <strlen>
8000dfe: 4603 mov r3, r0
8000e00: b29a uxth r2, r3
8000e02: 1d39 adds r1, r7, #4
8000e04: f04f 33ff mov.w r3, #4294967295
8000e08: 4824 ldr r0, [pc, #144] @ (8000e9c <debug+0xd0>)
8000e0a: f007 ff4d bl 8008ca8 <HAL_UART_Transmit>
}
if(memstPulsanti!=stPulsanti){
8000e0e: 4b24 ldr r3, [pc, #144] @ (8000ea0 <debug+0xd4>)
8000e10: 881a ldrh r2, [r3, #0]
8000e12: 4b24 ldr r3, [pc, #144] @ (8000ea4 <debug+0xd8>)
8000e14: 881b ldrh r3, [r3, #0]
8000e16: 429a cmp r2, r3
8000e18: d017 beq.n 8000e4a <debug+0x7e>
memstPulsanti=stPulsanti;
8000e1a: 4b22 ldr r3, [pc, #136] @ (8000ea4 <debug+0xd8>)
8000e1c: 881a ldrh r2, [r3, #0]
8000e1e: 4b20 ldr r3, [pc, #128] @ (8000ea0 <debug+0xd4>)
8000e20: 801a strh r2, [r3, #0]
sprintf(s,"\nstpulsanti=%X",stPulsanti);
8000e22: 4b20 ldr r3, [pc, #128] @ (8000ea4 <debug+0xd8>)
8000e24: 881b ldrh r3, [r3, #0]
8000e26: 461a mov r2, r3
8000e28: 1d3b adds r3, r7, #4
8000e2a: 491f ldr r1, [pc, #124] @ (8000ea8 <debug+0xdc>)
8000e2c: 4618 mov r0, r3
8000e2e: f00c fd2b bl 800d888 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8000e32: 1d3b adds r3, r7, #4
8000e34: 4618 mov r0, r3
8000e36: f7ff f989 bl 800014c <strlen>
8000e3a: 4603 mov r3, r0
8000e3c: b29a uxth r2, r3
8000e3e: 1d39 adds r1, r7, #4
8000e40: f04f 33ff mov.w r3, #4294967295
8000e44: 4815 ldr r0, [pc, #84] @ (8000e9c <debug+0xd0>)
8000e46: f007 ff2f bl 8008ca8 <HAL_UART_Transmit>
}
if(memstCiclo!=stCiclo){
8000e4a: 4b18 ldr r3, [pc, #96] @ (8000eac <debug+0xe0>)
8000e4c: 781a ldrb r2, [r3, #0]
8000e4e: 4b18 ldr r3, [pc, #96] @ (8000eb0 <debug+0xe4>)
8000e50: 781b ldrb r3, [r3, #0]
8000e52: 429a cmp r2, r3
8000e54: d017 beq.n 8000e86 <debug+0xba>
memstCiclo=stCiclo;
8000e56: 4b16 ldr r3, [pc, #88] @ (8000eb0 <debug+0xe4>)
8000e58: 781a ldrb r2, [r3, #0]
8000e5a: 4b14 ldr r3, [pc, #80] @ (8000eac <debug+0xe0>)
8000e5c: 701a strb r2, [r3, #0]
sprintf(s,"\nstCiclo=%d",stCiclo);
8000e5e: 4b14 ldr r3, [pc, #80] @ (8000eb0 <debug+0xe4>)
8000e60: 781b ldrb r3, [r3, #0]
8000e62: 461a mov r2, r3
8000e64: 1d3b adds r3, r7, #4
8000e66: 4913 ldr r1, [pc, #76] @ (8000eb4 <debug+0xe8>)
8000e68: 4618 mov r0, r3
8000e6a: f00c fd0d bl 800d888 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8000e6e: 1d3b adds r3, r7, #4
8000e70: 4618 mov r0, r3
8000e72: f7ff f96b bl 800014c <strlen>
8000e76: 4603 mov r3, r0
8000e78: b29a uxth r2, r3
8000e7a: 1d39 adds r1, r7, #4
8000e7c: f04f 33ff mov.w r3, #4294967295
8000e80: 4806 ldr r0, [pc, #24] @ (8000e9c <debug+0xd0>)
8000e82: f007 ff11 bl 8008ca8 <HAL_UART_Transmit>
}
}
8000e86: bf00 nop
8000e88: 3768 adds r7, #104 @ 0x68
8000e8a: 46bd mov sp, r7
8000e8c: bd80 pop {r7, pc}
8000e8e: bf00 nop
8000e90: 20000294 .word 0x20000294
8000e94: 200003e8 .word 0x200003e8
8000e98: 0800e404 .word 0x0800e404
8000e9c: 200003a0 .word 0x200003a0
8000ea0: 20000296 .word 0x20000296
8000ea4: 20000444 .word 0x20000444
8000ea8: 0800e414 .word 0x0800e414
8000eac: 20000298 .word 0x20000298
8000eb0: 20000446 .word 0x20000446
8000eb4: 0800e424 .word 0x0800e424
08000eb8 <EEW_Read>:
{
8000eb8: b580 push {r7, lr}
8000eba: b082 sub sp, #8
8000ebc: af00 add r7, sp, #0
8000ebe: 4603 mov r3, r0
8000ec0: 6039 str r1, [r7, #0]
8000ec2: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000ec4: 79fb ldrb r3, [r7, #7]
8000ec6: b29b uxth r3, r3
8000ec8: 3301 adds r3, #1
8000eca: b29b uxth r3, r3
8000ecc: 6839 ldr r1, [r7, #0]
8000ece: 4618 mov r0, r3
8000ed0: f000 f9b8 bl 8001244 <EE_ReadVariable>
8000ed4: 4603 mov r3, r0
}
8000ed6: 4618 mov r0, r3
8000ed8: 3708 adds r7, #8
8000eda: 46bd mov sp, r7
8000edc: bd80 pop {r7, pc}
08000ede <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
8000ede: b480 push {r7}
8000ee0: b083 sub sp, #12
8000ee2: af00 add r7, sp, #0
8000ee4: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
8000ee6: 687b ldr r3, [r7, #4]
8000ee8: 881b ldrh r3, [r3, #0]
8000eea: b29b uxth r3, r3
}
8000eec: 4618 mov r0, r3
8000eee: 370c adds r7, #12
8000ef0: 46bd mov sp, r7
8000ef2: bc80 pop {r7}
8000ef4: 4770 bx lr
08000ef6 <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
8000ef6: b5b0 push {r4, r5, r7, lr}
8000ef8: b084 sub sp, #16
8000efa: af00 add r7, sp, #0
8000efc: 6078 str r0, [r7, #4]
8000efe: 460b mov r3, r1
8000f00: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
8000f02: f004 fa8f bl 8005424 <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
8000f06: 887b ldrh r3, [r7, #2]
8000f08: 2200 movs r2, #0
8000f0a: 461c mov r4, r3
8000f0c: 4615 mov r5, r2
8000f0e: 4622 mov r2, r4
8000f10: 462b mov r3, r5
8000f12: 6879 ldr r1, [r7, #4]
8000f14: 2001 movs r0, #1
8000f16: f004 fa15 bl 8005344 <HAL_FLASH_Program>
8000f1a: 4603 mov r3, r0
8000f1c: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
8000f1e: f004 faa7 bl 8005470 <HAL_FLASH_Lock>
return status;
8000f22: 7bfb ldrb r3, [r7, #15]
}
8000f24: 4618 mov r0, r3
8000f26: 3710 adds r7, #16
8000f28: 46bd mov sp, r7
8000f2a: bdb0 pop {r4, r5, r7, pc}
08000f2c <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
8000f2c: b580 push {r7, lr}
8000f2e: b088 sub sp, #32
8000f30: af00 add r7, sp, #0
8000f32: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8000f34: 2300 movs r3, #0
8000f36: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
8000f38: f004 fa74 bl 8005424 <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
8000f3c: 2300 movs r3, #0
8000f3e: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
8000f40: 687b ldr r3, [r7, #4]
8000f42: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8000f44: 2301 movs r3, #1
8000f46: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
8000f48: f107 0208 add.w r2, r7, #8
8000f4c: f107 030c add.w r3, r7, #12
8000f50: 4611 mov r1, r2
8000f52: 4618 mov r0, r3
8000f54: f004 fb4e bl 80055f4 <HAL_FLASHEx_Erase>
8000f58: 4603 mov r3, r0
8000f5a: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
8000f5c: f004 fa88 bl 8005470 <HAL_FLASH_Lock>
return status;
8000f60: 7ffb ldrb r3, [r7, #31]
}
8000f62: 4618 mov r0, r3
8000f64: 3720 adds r7, #32
8000f66: 46bd mov sp, r7
8000f68: bd80 pop {r7, pc}
08000f6a <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
8000f6a: b480 push {r7}
8000f6c: b087 sub sp, #28
8000f6e: af00 add r7, sp, #0
8000f70: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8000f72: 687b ldr r3, [r7, #4]
8000f74: 3302 adds r3, #2
8000f76: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8000f78: 687b ldr r3, [r7, #4]
8000f7a: f503 6380 add.w r3, r3, #1024 @ 0x400
8000f7e: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8000f80: e00c b.n 8000f9c <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8000f82: 697b ldr r3, [r7, #20]
8000f84: 881b ldrh r3, [r3, #0]
8000f86: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
8000f88: 89fb ldrh r3, [r7, #14]
8000f8a: f64f 72ff movw r2, #65535 @ 0xffff
8000f8e: 4293 cmp r3, r2
8000f90: d101 bne.n 8000f96 <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
8000f92: 697b ldr r3, [r7, #20]
8000f94: e008 b.n 8000fa8 <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
8000f96: 697b ldr r3, [r7, #20]
8000f98: 3304 adds r3, #4
8000f9a: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8000f9c: 693b ldr r3, [r7, #16]
8000f9e: 3b03 subs r3, #3
8000fa0: 697a ldr r2, [r7, #20]
8000fa2: 429a cmp r2, r3
8000fa4: d3ed bcc.n 8000f82 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
8000fa6: 2300 movs r3, #0
}
8000fa8: 4618 mov r0, r3
8000faa: 371c adds r7, #28
8000fac: 46bd mov sp, r7
8000fae: bc80 pop {r7}
8000fb0: 4770 bx lr
08000fb2 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */
/* Find latest value of VirtAddress in a specific page (scan forward) */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
8000fb2: b480 push {r7}
8000fb4: b089 sub sp, #36 @ 0x24
8000fb6: af00 add r7, sp, #0
8000fb8: 60f8 str r0, [r7, #12]
8000fba: 460b mov r3, r1
8000fbc: 607a str r2, [r7, #4]
8000fbe: 817b strh r3, [r7, #10]
uint32_t addr = pageBase + 2U; // skip status halfword
8000fc0: 68fb ldr r3, [r7, #12]
8000fc2: 3302 adds r3, #2
8000fc4: 61fb str r3, [r7, #28]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
8000fc6: 68fb ldr r3, [r7, #12]
8000fc8: f503 6380 add.w r3, r3, #1024 @ 0x400
8000fcc: 617b str r3, [r7, #20]
EE_Status result = EE_NOT_FOUND;
8000fce: 2302 movs r3, #2
8000fd0: 76fb strb r3, [r7, #27]
uint16_t lastVal = 0;
8000fd2: 2300 movs r3, #0
8000fd4: 833b strh r3, [r7, #24]
if (Data == NULL)
8000fd6: 687b ldr r3, [r7, #4]
8000fd8: 2b00 cmp r3, #0
8000fda: d118 bne.n 800100e <EE_FindInPage+0x5c>
return EE_ERROR;
8000fdc: 2301 movs r3, #1
8000fde: e024 b.n 800102a <EE_FindInPage+0x78>
while (addr <= (pageEnd - sizeof(EE_Record_t)))
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8000fe0: 69fb ldr r3, [r7, #28]
8000fe2: 881b ldrh r3, [r3, #0]
8000fe4: 827b strh r3, [r7, #18]
if (vaddr == 0xFFFFU)
8000fe6: 8a7b ldrh r3, [r7, #18]
8000fe8: f64f 72ff movw r2, #65535 @ 0xffff
8000fec: 4293 cmp r3, r2
8000fee: d014 beq.n 800101a <EE_FindInPage+0x68>
{
// First empty slot => no more records in this page
break;
}
uint16_t value = *(__IO uint16_t *)(addr + 2U);
8000ff0: 69fb ldr r3, [r7, #28]
8000ff2: 3302 adds r3, #2
8000ff4: 881b ldrh r3, [r3, #0]
8000ff6: 823b strh r3, [r7, #16]
if (vaddr == VirtAddress)
8000ff8: 8a7a ldrh r2, [r7, #18]
8000ffa: 897b ldrh r3, [r7, #10]
8000ffc: 429a cmp r2, r3
8000ffe: d103 bne.n 8001008 <EE_FindInPage+0x56>
{
lastVal = value; // keep most recent
8001000: 8a3b ldrh r3, [r7, #16]
8001002: 833b strh r3, [r7, #24]
result = EE_OK;
8001004: 2300 movs r3, #0
8001006: 76fb strb r3, [r7, #27]
}
addr += sizeof(EE_Record_t); // move 4 bytes forward
8001008: 69fb ldr r3, [r7, #28]
800100a: 3304 adds r3, #4
800100c: 61fb str r3, [r7, #28]
while (addr <= (pageEnd - sizeof(EE_Record_t)))
800100e: 697b ldr r3, [r7, #20]
8001010: 3b04 subs r3, #4
8001012: 69fa ldr r2, [r7, #28]
8001014: 429a cmp r2, r3
8001016: d9e3 bls.n 8000fe0 <EE_FindInPage+0x2e>
8001018: e000 b.n 800101c <EE_FindInPage+0x6a>
break;
800101a: bf00 nop
}
if (result == EE_OK)
800101c: 7efb ldrb r3, [r7, #27]
800101e: 2b00 cmp r3, #0
8001020: d102 bne.n 8001028 <EE_FindInPage+0x76>
*Data = lastVal;
8001022: 687b ldr r3, [r7, #4]
8001024: 8b3a ldrh r2, [r7, #24]
8001026: 801a strh r2, [r3, #0]
return result;
8001028: 7efb ldrb r3, [r7, #27]
}
800102a: 4618 mov r0, r3
800102c: 3724 adds r7, #36 @ 0x24
800102e: 46bd mov sp, r7
8001030: bc80 pop {r7}
8001032: 4770 bx lr
08001034 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8001034: b580 push {r7, lr}
8001036: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
8001038: 480f ldr r0, [pc, #60] @ (8001078 <EE_Format+0x44>)
800103a: f7ff ff77 bl 8000f2c <EE_FlashErasePage>
800103e: 4603 mov r3, r0
8001040: 2b00 cmp r3, #0
8001042: d001 beq.n 8001048 <EE_Format+0x14>
return EE_STATUS_ERROR;
8001044: 2301 movs r3, #1
8001046: e015 b.n 8001074 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
8001048: 480c ldr r0, [pc, #48] @ (800107c <EE_Format+0x48>)
800104a: f7ff ff6f bl 8000f2c <EE_FlashErasePage>
800104e: 4603 mov r3, r0
8001050: 2b00 cmp r3, #0
8001052: d001 beq.n 8001058 <EE_Format+0x24>
return EE_STATUS_ERROR;
8001054: 2301 movs r3, #1
8001056: e00d b.n 8001074 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
8001058: f64a 21aa movw r1, #43690 @ 0xaaaa
800105c: 4806 ldr r0, [pc, #24] @ (8001078 <EE_Format+0x44>)
800105e: f7ff ff4a bl 8000ef6 <EE_FlashProgramHalfWord>
8001062: 4603 mov r3, r0
8001064: 2b00 cmp r3, #0
8001066: d001 beq.n 800106c <EE_Format+0x38>
return EE_STATUS_ERROR;
8001068: 2301 movs r3, #1
800106a: e003 b.n 8001074 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
800106c: 4b04 ldr r3, [pc, #16] @ (8001080 <EE_Format+0x4c>)
800106e: 4a02 ldr r2, [pc, #8] @ (8001078 <EE_Format+0x44>)
8001070: 601a str r2, [r3, #0]
return EE_STATUS_OK;
8001072: 2300 movs r3, #0
}
8001074: 4618 mov r0, r3
8001076: bd80 pop {r7, pc}
8001078: 0800f800 .word 0x0800f800
800107c: 0800fc00 .word 0x0800fc00
8001080: 20000000 .word 0x20000000
08001084 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8001084: b480 push {r7}
8001086: b083 sub sp, #12
8001088: af00 add r7, sp, #0
800108a: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
800108c: 687b ldr r3, [r7, #4]
800108e: 4a05 ldr r2, [pc, #20] @ (80010a4 <EE_GetOtherPageBase+0x20>)
8001090: 4293 cmp r3, r2
8001092: d101 bne.n 8001098 <EE_GetOtherPageBase+0x14>
8001094: 4b04 ldr r3, [pc, #16] @ (80010a8 <EE_GetOtherPageBase+0x24>)
8001096: e000 b.n 800109a <EE_GetOtherPageBase+0x16>
8001098: 4b02 ldr r3, [pc, #8] @ (80010a4 <EE_GetOtherPageBase+0x20>)
}
800109a: 4618 mov r0, r3
800109c: 370c adds r7, #12
800109e: 46bd mov sp, r7
80010a0: bc80 pop {r7}
80010a2: 4770 bx lr
80010a4: 0800f800 .word 0x0800f800
80010a8: 0800fc00 .word 0x0800fc00
080010ac <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
80010ac: b580 push {r7, lr}
80010ae: b088 sub sp, #32
80010b0: af00 add r7, sp, #0
80010b2: 4603 mov r3, r0
80010b4: 460a mov r2, r1
80010b6: 80fb strh r3, [r7, #6]
80010b8: 4613 mov r3, r2
80010ba: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
80010bc: 4b3c ldr r3, [pc, #240] @ (80011b0 <EE_PageTransfer+0x104>)
80010be: 681b ldr r3, [r3, #0]
80010c0: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
80010c2: 6978 ldr r0, [r7, #20]
80010c4: f7ff ffde bl 8001084 <EE_GetOtherPageBase>
80010c8: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
80010ca: 6938 ldr r0, [r7, #16]
80010cc: f7ff ff2e bl 8000f2c <EE_FlashErasePage>
80010d0: 4603 mov r3, r0
80010d2: 2b00 cmp r3, #0
80010d4: d001 beq.n 80010da <EE_PageTransfer+0x2e>
return EE_STATUS_ERROR;
80010d6: 2301 movs r3, #1
80010d8: e065 b.n 80011a6 <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
80010da: f245 5155 movw r1, #21845 @ 0x5555
80010de: 6938 ldr r0, [r7, #16]
80010e0: f7ff ff09 bl 8000ef6 <EE_FlashProgramHalfWord>
80010e4: 4603 mov r3, r0
80010e6: 2b00 cmp r3, #0
80010e8: d001 beq.n 80010ee <EE_PageTransfer+0x42>
return EE_STATUS_ERROR;
80010ea: 2301 movs r3, #1
80010ec: e05b b.n 80011a6 <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
80010ee: 693b ldr r3, [r7, #16]
80010f0: 3302 adds r3, #2
80010f2: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
80010f4: 2300 movs r3, #0
80010f6: 837b strh r3, [r7, #26]
80010f8: e03c b.n 8001174 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
80010fa: 8b7b ldrh r3, [r7, #26]
80010fc: 4a2d ldr r2, [pc, #180] @ (80011b4 <EE_PageTransfer+0x108>)
80010fe: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001102: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
8001104: 89fa ldrh r2, [r7, #14]
8001106: 88fb ldrh r3, [r7, #6]
8001108: 429a cmp r2, r3
800110a: d102 bne.n 8001112 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
800110c: 88bb ldrh r3, [r7, #4]
800110e: 817b strh r3, [r7, #10]
8001110: e00b b.n 800112a <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8001112: f107 020a add.w r2, r7, #10
8001116: 89fb ldrh r3, [r7, #14]
8001118: 4619 mov r1, r3
800111a: 6978 ldr r0, [r7, #20]
800111c: f7ff ff49 bl 8000fb2 <EE_FindInPage>
8001120: 4603 mov r3, r0
8001122: 737b strb r3, [r7, #13]
if (st != EE_STATUS_OK)
8001124: 7b7b ldrb r3, [r7, #13]
8001126: 2b00 cmp r3, #0
8001128: d120 bne.n 800116c <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
800112a: 89fb ldrh r3, [r7, #14]
800112c: 4619 mov r1, r3
800112e: 69f8 ldr r0, [r7, #28]
8001130: f7ff fee1 bl 8000ef6 <EE_FlashProgramHalfWord>
8001134: 4603 mov r3, r0
8001136: 2b00 cmp r3, #0
8001138: d001 beq.n 800113e <EE_PageTransfer+0x92>
return EE_STATUS_ERROR;
800113a: 2301 movs r3, #1
800113c: e033 b.n 80011a6 <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
800113e: 69fb ldr r3, [r7, #28]
8001140: 3302 adds r3, #2
8001142: 897a ldrh r2, [r7, #10]
8001144: 4611 mov r1, r2
8001146: 4618 mov r0, r3
8001148: f7ff fed5 bl 8000ef6 <EE_FlashProgramHalfWord>
800114c: 4603 mov r3, r0
800114e: 2b00 cmp r3, #0
8001150: d001 beq.n 8001156 <EE_PageTransfer+0xaa>
return EE_STATUS_ERROR;
8001152: 2301 movs r3, #1
8001154: e027 b.n 80011a6 <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
8001156: 69fb ldr r3, [r7, #28]
8001158: 3304 adds r3, #4
800115a: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
800115c: 693b ldr r3, [r7, #16]
800115e: f503 6380 add.w r3, r3, #1024 @ 0x400
8001162: 69fa ldr r2, [r7, #28]
8001164: 429a cmp r2, r3
8001166: d302 bcc.n 800116e <EE_PageTransfer+0xc2>
return EE_STATUS_NO_SPACE;
8001168: 2303 movs r3, #3
800116a: e01c b.n 80011a6 <EE_PageTransfer+0xfa>
continue;
800116c: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
800116e: 8b7b ldrh r3, [r7, #26]
8001170: 3301 adds r3, #1
8001172: 837b strh r3, [r7, #26]
8001174: 8b7b ldrh r3, [r7, #26]
8001176: 2b3f cmp r3, #63 @ 0x3f
8001178: d9bf bls.n 80010fa <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
800117a: 6978 ldr r0, [r7, #20]
800117c: f7ff fed6 bl 8000f2c <EE_FlashErasePage>
8001180: 4603 mov r3, r0
8001182: 2b00 cmp r3, #0
8001184: d001 beq.n 800118a <EE_PageTransfer+0xde>
return EE_STATUS_ERROR;
8001186: 2301 movs r3, #1
8001188: e00d b.n 80011a6 <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
800118a: f64a 21aa movw r1, #43690 @ 0xaaaa
800118e: 6938 ldr r0, [r7, #16]
8001190: f7ff feb1 bl 8000ef6 <EE_FlashProgramHalfWord>
8001194: 4603 mov r3, r0
8001196: 2b00 cmp r3, #0
8001198: d001 beq.n 800119e <EE_PageTransfer+0xf2>
return EE_STATUS_ERROR;
800119a: 2301 movs r3, #1
800119c: e003 b.n 80011a6 <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
800119e: 4a04 ldr r2, [pc, #16] @ (80011b0 <EE_PageTransfer+0x104>)
80011a0: 693b ldr r3, [r7, #16]
80011a2: 6013 str r3, [r2, #0]
return EE_STATUS_OK;
80011a4: 2300 movs r3, #0
}
80011a6: 4618 mov r0, r3
80011a8: 3720 adds r7, #32
80011aa: 46bd mov sp, r7
80011ac: bd80 pop {r7, pc}
80011ae: bf00 nop
80011b0: 20000000 .word 0x20000000
80011b4: 0800e5ec .word 0x0800e5ec
080011b8 <EE_Init>:
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
* PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...)
*/
uint16_t EE_Init(void)
{
80011b8: b580 push {r7, lr}
80011ba: b082 sub sp, #8
80011bc: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
80011be: 481e ldr r0, [pc, #120] @ (8001238 <EE_Init+0x80>)
80011c0: f7ff fe8d bl 8000ede <EE_GetPageStatus>
80011c4: 4603 mov r3, r0
80011c6: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
80011c8: 481c ldr r0, [pc, #112] @ (800123c <EE_Init+0x84>)
80011ca: f7ff fe88 bl 8000ede <EE_GetPageStatus>
80011ce: 4603 mov r3, r0
80011d0: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
80011d2: 88fb ldrh r3, [r7, #6]
80011d4: f64f 72ff movw r2, #65535 @ 0xffff
80011d8: 4293 cmp r3, r2
80011da: d108 bne.n 80011ee <EE_Init+0x36>
80011dc: 88bb ldrh r3, [r7, #4]
80011de: f64f 72ff movw r2, #65535 @ 0xffff
80011e2: 4293 cmp r3, r2
80011e4: d103 bne.n 80011ee <EE_Init+0x36>
{
/* Fresh device -> format */
return (uint16_t)EE_Format();
80011e6: f7ff ff25 bl 8001034 <EE_Format>
80011ea: 4603 mov r3, r0
80011ec: e020 b.n 8001230 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
80011ee: 88fb ldrh r3, [r7, #6]
80011f0: f64a 22aa movw r2, #43690 @ 0xaaaa
80011f4: 4293 cmp r3, r2
80011f6: d109 bne.n 800120c <EE_Init+0x54>
80011f8: 88bb ldrh r3, [r7, #4]
80011fa: f64f 72ff movw r2, #65535 @ 0xffff
80011fe: 4293 cmp r3, r2
8001200: d104 bne.n 800120c <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
8001202: 4b0f ldr r3, [pc, #60] @ (8001240 <EE_Init+0x88>)
8001204: 4a0c ldr r2, [pc, #48] @ (8001238 <EE_Init+0x80>)
8001206: 601a str r2, [r3, #0]
return EE_OK;
8001208: 2300 movs r3, #0
800120a: e011 b.n 8001230 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
800120c: 88bb ldrh r3, [r7, #4]
800120e: f64a 22aa movw r2, #43690 @ 0xaaaa
8001212: 4293 cmp r3, r2
8001214: d109 bne.n 800122a <EE_Init+0x72>
8001216: 88fb ldrh r3, [r7, #6]
8001218: f64f 72ff movw r2, #65535 @ 0xffff
800121c: 4293 cmp r3, r2
800121e: d104 bne.n 800122a <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8001220: 4b07 ldr r3, [pc, #28] @ (8001240 <EE_Init+0x88>)
8001222: 4a06 ldr r2, [pc, #24] @ (800123c <EE_Init+0x84>)
8001224: 601a str r2, [r3, #0]
return EE_OK;
8001226: 2300 movs r3, #0
8001228: e002 b.n 8001230 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return (uint16_t)EE_Format();
800122a: f7ff ff03 bl 8001034 <EE_Format>
800122e: 4603 mov r3, r0
}
}
8001230: 4618 mov r0, r3
8001232: 3708 adds r7, #8
8001234: 46bd mov sp, r7
8001236: bd80 pop {r7, pc}
8001238: 0800f800 .word 0x0800f800
800123c: 0800fc00 .word 0x0800fc00
8001240: 20000000 .word 0x20000000
08001244 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
* PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t)
*/
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8001244: b580 push {r7, lr}
8001246: b084 sub sp, #16
8001248: af00 add r7, sp, #0
800124a: 4603 mov r3, r0
800124c: 6039 str r1, [r7, #0]
800124e: 80fb strh r3, [r7, #6]
EE_Status st;
if (Data == NULL)
8001250: 683b ldr r3, [r7, #0]
8001252: 2b00 cmp r3, #0
8001254: d101 bne.n 800125a <EE_ReadVariable+0x16>
return EE_ERROR;
8001256: 2301 movs r3, #1
8001258: e00a b.n 8001270 <EE_ReadVariable+0x2c>
st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
800125a: 4b07 ldr r3, [pc, #28] @ (8001278 <EE_ReadVariable+0x34>)
800125c: 681b ldr r3, [r3, #0]
800125e: 88f9 ldrh r1, [r7, #6]
8001260: 683a ldr r2, [r7, #0]
8001262: 4618 mov r0, r3
8001264: f7ff fea5 bl 8000fb2 <EE_FindInPage>
8001268: 4603 mov r3, r0
800126a: 73fb strb r3, [r7, #15]
return (uint16_t)st;
800126c: 7bfb ldrb r3, [r7, #15]
800126e: b29b uxth r3, r3
}
8001270: 4618 mov r0, r3
8001272: 3710 adds r7, #16
8001274: 46bd mov sp, r7
8001276: bd80 pop {r7, pc}
8001278: 20000000 .word 0x20000000
0800127c <EE_WriteVariable>:
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
* PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t)
*/
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
800127c: b580 push {r7, lr}
800127e: b084 sub sp, #16
8001280: af00 add r7, sp, #0
8001282: 4603 mov r3, r0
8001284: 460a mov r2, r1
8001286: 80fb strh r3, [r7, #6]
8001288: 4613 mov r3, r2
800128a: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
800128c: 4b17 ldr r3, [pc, #92] @ (80012ec <EE_WriteVariable+0x70>)
800128e: 681b ldr r3, [r3, #0]
8001290: 4618 mov r0, r3
8001292: f7ff fe6a bl 8000f6a <EE_FindFreeAddress>
8001296: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
8001298: 68fb ldr r3, [r7, #12]
800129a: 2b00 cmp r3, #0
800129c: d017 beq.n 80012ce <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
800129e: 88fb ldrh r3, [r7, #6]
80012a0: 4619 mov r1, r3
80012a2: 68f8 ldr r0, [r7, #12]
80012a4: f7ff fe27 bl 8000ef6 <EE_FlashProgramHalfWord>
80012a8: 4603 mov r3, r0
80012aa: 2b00 cmp r3, #0
80012ac: d001 beq.n 80012b2 <EE_WriteVariable+0x36>
return EE_ERROR;
80012ae: 2301 movs r3, #1
80012b0: e017 b.n 80012e2 <EE_WriteVariable+0x66>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
80012b2: 68fb ldr r3, [r7, #12]
80012b4: 3302 adds r3, #2
80012b6: 88ba ldrh r2, [r7, #4]
80012b8: 4611 mov r1, r2
80012ba: 4618 mov r0, r3
80012bc: f7ff fe1b bl 8000ef6 <EE_FlashProgramHalfWord>
80012c0: 4603 mov r3, r0
80012c2: 2b00 cmp r3, #0
80012c4: d001 beq.n 80012ca <EE_WriteVariable+0x4e>
return EE_ERROR;
80012c6: 2301 movs r3, #1
80012c8: e00b b.n 80012e2 <EE_WriteVariable+0x66>
return EE_OK;
80012ca: 2300 movs r3, #0
80012cc: e009 b.n 80012e2 <EE_WriteVariable+0x66>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
80012ce: 88ba ldrh r2, [r7, #4]
80012d0: 88fb ldrh r3, [r7, #6]
80012d2: 4611 mov r1, r2
80012d4: 4618 mov r0, r3
80012d6: f7ff fee9 bl 80010ac <EE_PageTransfer>
80012da: 4603 mov r3, r0
80012dc: 72fb strb r3, [r7, #11]
return (uint16_t)st;
80012de: 7afb ldrb r3, [r7, #11]
80012e0: b29b uxth r3, r3
}
80012e2: 4618 mov r0, r3
80012e4: 3710 adds r7, #16
80012e6: 46bd mov sp, r7
80012e8: bd80 pop {r7, pc}
80012ea: bf00 nop
80012ec: 20000000 .word 0x20000000
080012f0 <loadEE>:
void loadEE(void){
80012f0: b5f0 push {r4, r5, r6, r7, lr}
80012f2: b0b9 sub sp, #228 @ 0xe4
80012f4: af06 add r7, sp, #24
char s [200];
EEW_Read(M1PWMAP, &m1pwmap);
80012f6: 4991 ldr r1, [pc, #580] @ (800153c <loadEE+0x24c>)
80012f8: 2000 movs r0, #0
80012fa: f7ff fddd bl 8000eb8 <EEW_Read>
EEW_Read(M1PWMCH, &m1pwmch);
80012fe: 4990 ldr r1, [pc, #576] @ (8001540 <loadEE+0x250>)
8001300: 2001 movs r0, #1
8001302: f7ff fdd9 bl 8000eb8 <EEW_Read>
EEW_Read(M2PWMAP, &m2pwmap);
8001306: 498f ldr r1, [pc, #572] @ (8001544 <loadEE+0x254>)
8001308: 2002 movs r0, #2
800130a: f7ff fdd5 bl 8000eb8 <EEW_Read>
EEW_Read(M2PWMCH, &m2pwmch);
800130e: 498e ldr r1, [pc, #568] @ (8001548 <loadEE+0x258>)
8001310: 2003 movs r0, #3
8001312: f7ff fdd1 bl 8000eb8 <EEW_Read>
EEW_Read(M3PWMAP, &m3pwmap);
8001316: 498d ldr r1, [pc, #564] @ (800154c <loadEE+0x25c>)
8001318: 2004 movs r0, #4
800131a: f7ff fdcd bl 8000eb8 <EEW_Read>
EEW_Read(M3PWMCH, &m3pwmch);
800131e: 498c ldr r1, [pc, #560] @ (8001550 <loadEE+0x260>)
8001320: 2005 movs r0, #5
8001322: f7ff fdc9 bl 8000eb8 <EEW_Read>
EEW_Read(M4PWMAP, &m4pwmap);
8001326: 498b ldr r1, [pc, #556] @ (8001554 <loadEE+0x264>)
8001328: 2006 movs r0, #6
800132a: f7ff fdc5 bl 8000eb8 <EEW_Read>
EEW_Read(M4PWMCH, &m4pwmch);
800132e: 498a ldr r1, [pc, #552] @ (8001558 <loadEE+0x268>)
8001330: 2007 movs r0, #7
8001332: f7ff fdc1 bl 8000eb8 <EEW_Read>
EEW_Read(M1TIMEOUTMAN, &m1TimeoutMan);
8001336: 4989 ldr r1, [pc, #548] @ (800155c <loadEE+0x26c>)
8001338: 200c movs r0, #12
800133a: f7ff fdbd bl 8000eb8 <EEW_Read>
EEW_Read(M2TIMEOUTMAN, &m2TimeoutMan);
800133e: 4988 ldr r1, [pc, #544] @ (8001560 <loadEE+0x270>)
8001340: 200d movs r0, #13
8001342: f7ff fdb9 bl 8000eb8 <EEW_Read>
EEW_Read(M3TIMEOUTMAN, &m3TimeoutMan);
8001346: 4987 ldr r1, [pc, #540] @ (8001564 <loadEE+0x274>)
8001348: 200e movs r0, #14
800134a: f7ff fdb5 bl 8000eb8 <EEW_Read>
EEW_Read(M4TIMEOUTMAN, &m4TimeoutMan);
800134e: 4986 ldr r1, [pc, #536] @ (8001568 <loadEE+0x278>)
8001350: 200f movs r0, #15
8001352: f7ff fdb1 bl 8000eb8 <EEW_Read>
EEW_Read(TRAMP1, &tramp1);
8001356: 4985 ldr r1, [pc, #532] @ (800156c <loadEE+0x27c>)
8001358: 2019 movs r0, #25
800135a: f7ff fdad bl 8000eb8 <EEW_Read>
EEW_Read(M1PWMMAN, &m1pwmMan);
800135e: 4984 ldr r1, [pc, #528] @ (8001570 <loadEE+0x280>)
8001360: 201a movs r0, #26
8001362: f7ff fda9 bl 8000eb8 <EEW_Read>
EEW_Read(M2PWMMAN, &m2pwmMan);
8001366: 4983 ldr r1, [pc, #524] @ (8001574 <loadEE+0x284>)
8001368: 201b movs r0, #27
800136a: f7ff fda5 bl 8000eb8 <EEW_Read>
EEW_Read(M3PWMMAN, &m3pwmMan);
800136e: 4982 ldr r1, [pc, #520] @ (8001578 <loadEE+0x288>)
8001370: 201c movs r0, #28
8001372: f7ff fda1 bl 8000eb8 <EEW_Read>
EEW_Read(M4PWMMAN, &m4pwmMan);
8001376: 4981 ldr r1, [pc, #516] @ (800157c <loadEE+0x28c>)
8001378: 201d movs r0, #29
800137a: f7ff fd9d bl 8000eb8 <EEW_Read>
EEW_Read(TRAMPMAN, &trampman);
800137e: 4980 ldr r1, [pc, #512] @ (8001580 <loadEE+0x290>)
8001380: 201e movs r0, #30
8001382: f7ff fd99 bl 8000eb8 <EEW_Read>
EEW_Read(TRAMP, &tramp);
8001386: 497f ldr r1, [pc, #508] @ (8001584 <loadEE+0x294>)
8001388: 201f movs r0, #31
800138a: f7ff fd95 bl 8000eb8 <EEW_Read>
EEW_Read(APM1START,&apM1start);
800138e: 497e ldr r1, [pc, #504] @ (8001588 <loadEE+0x298>)
8001390: 2020 movs r0, #32
8001392: f7ff fd91 bl 8000eb8 <EEW_Read>
EEW_Read(APM1STOP ,&apM1stop);
8001396: 497d ldr r1, [pc, #500] @ (800158c <loadEE+0x29c>)
8001398: 2021 movs r0, #33 @ 0x21
800139a: f7ff fd8d bl 8000eb8 <EEW_Read>
EEW_Read(APM2START,&apM2start);
800139e: 497c ldr r1, [pc, #496] @ (8001590 <loadEE+0x2a0>)
80013a0: 2022 movs r0, #34 @ 0x22
80013a2: f7ff fd89 bl 8000eb8 <EEW_Read>
EEW_Read(APM2STOP ,&apM2stop);
80013a6: 497b ldr r1, [pc, #492] @ (8001594 <loadEE+0x2a4>)
80013a8: 2023 movs r0, #35 @ 0x23
80013aa: f7ff fd85 bl 8000eb8 <EEW_Read>
EEW_Read(APM3START,&apM3start);
80013ae: 497a ldr r1, [pc, #488] @ (8001598 <loadEE+0x2a8>)
80013b0: 2024 movs r0, #36 @ 0x24
80013b2: f7ff fd81 bl 8000eb8 <EEW_Read>
EEW_Read(APM3STOP ,&apM3stop);
80013b6: 4979 ldr r1, [pc, #484] @ (800159c <loadEE+0x2ac>)
80013b8: 2025 movs r0, #37 @ 0x25
80013ba: f7ff fd7d bl 8000eb8 <EEW_Read>
EEW_Read(APM4START,&apM4start);
80013be: 4978 ldr r1, [pc, #480] @ (80015a0 <loadEE+0x2b0>)
80013c0: 2026 movs r0, #38 @ 0x26
80013c2: f7ff fd79 bl 8000eb8 <EEW_Read>
EEW_Read(APM4STOP ,&apM4stop);
80013c6: 4977 ldr r1, [pc, #476] @ (80015a4 <loadEE+0x2b4>)
80013c8: 2027 movs r0, #39 @ 0x27
80013ca: f7ff fd75 bl 8000eb8 <EEW_Read>
EEW_Read(CHM1START,&chM1start);
80013ce: 4976 ldr r1, [pc, #472] @ (80015a8 <loadEE+0x2b8>)
80013d0: 2028 movs r0, #40 @ 0x28
80013d2: f7ff fd71 bl 8000eb8 <EEW_Read>
EEW_Read(CHM1STOP ,&chM1stop);
80013d6: 4975 ldr r1, [pc, #468] @ (80015ac <loadEE+0x2bc>)
80013d8: 2029 movs r0, #41 @ 0x29
80013da: f7ff fd6d bl 8000eb8 <EEW_Read>
EEW_Read(CHM2START,&chM2start);
80013de: 4974 ldr r1, [pc, #464] @ (80015b0 <loadEE+0x2c0>)
80013e0: 202a movs r0, #42 @ 0x2a
80013e2: f7ff fd69 bl 8000eb8 <EEW_Read>
EEW_Read(CHM2STOP ,&chM2stop);
80013e6: 4973 ldr r1, [pc, #460] @ (80015b4 <loadEE+0x2c4>)
80013e8: 202b movs r0, #43 @ 0x2b
80013ea: f7ff fd65 bl 8000eb8 <EEW_Read>
EEW_Read(CHM3START,&chM3start);
80013ee: 4972 ldr r1, [pc, #456] @ (80015b8 <loadEE+0x2c8>)
80013f0: 202c movs r0, #44 @ 0x2c
80013f2: f7ff fd61 bl 8000eb8 <EEW_Read>
EEW_Read(CHM3STOP ,&chM3stop);
80013f6: 4971 ldr r1, [pc, #452] @ (80015bc <loadEE+0x2cc>)
80013f8: 202d movs r0, #45 @ 0x2d
80013fa: f7ff fd5d bl 8000eb8 <EEW_Read>
EEW_Read(CHM4START,&chM4start);
80013fe: 4970 ldr r1, [pc, #448] @ (80015c0 <loadEE+0x2d0>)
8001400: 202e movs r0, #46 @ 0x2e
8001402: f7ff fd59 bl 8000eb8 <EEW_Read>
EEW_Read(CHM4STOP ,&chM4stop);
8001406: 496f ldr r1, [pc, #444] @ (80015c4 <loadEE+0x2d4>)
8001408: 202f movs r0, #47 @ 0x2f
800140a: f7ff fd55 bl 8000eb8 <EEW_Read>
sprintf((char*)s,"LoadEE\n");
800140e: 463b mov r3, r7
8001410: 496d ldr r1, [pc, #436] @ (80015c8 <loadEE+0x2d8>)
8001412: 4618 mov r0, r3
8001414: f00c fa38 bl 800d888 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001418: 463b mov r3, r7
800141a: 4618 mov r0, r3
800141c: f7fe fe96 bl 800014c <strlen>
8001420: 4603 mov r3, r0
8001422: b29a uxth r2, r3
8001424: 4639 mov r1, r7
8001426: f04f 33ff mov.w r3, #4294967295
800142a: 4868 ldr r0, [pc, #416] @ (80015cc <loadEE+0x2dc>)
800142c: f007 fc3c bl 8008ca8 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8001430: 4b42 ldr r3, [pc, #264] @ (800153c <loadEE+0x24c>)
8001432: 881b ldrh r3, [r3, #0]
8001434: 469c mov ip, r3
8001436: 4b42 ldr r3, [pc, #264] @ (8001540 <loadEE+0x250>)
8001438: 881b ldrh r3, [r3, #0]
800143a: 469e mov lr, r3
800143c: 4b41 ldr r3, [pc, #260] @ (8001544 <loadEE+0x254>)
800143e: 881b ldrh r3, [r3, #0]
8001440: 461a mov r2, r3
8001442: 4b41 ldr r3, [pc, #260] @ (8001548 <loadEE+0x258>)
8001444: 881b ldrh r3, [r3, #0]
8001446: 4619 mov r1, r3
8001448: 4b40 ldr r3, [pc, #256] @ (800154c <loadEE+0x25c>)
800144a: 881b ldrh r3, [r3, #0]
800144c: 461c mov r4, r3
800144e: 4b40 ldr r3, [pc, #256] @ (8001550 <loadEE+0x260>)
8001450: 881b ldrh r3, [r3, #0]
8001452: 461d mov r5, r3
8001454: 4b3f ldr r3, [pc, #252] @ (8001554 <loadEE+0x264>)
8001456: 881b ldrh r3, [r3, #0]
8001458: 461e mov r6, r3
800145a: 4b3f ldr r3, [pc, #252] @ (8001558 <loadEE+0x268>)
800145c: 881b ldrh r3, [r3, #0]
800145e: 4638 mov r0, r7
8001460: 9305 str r3, [sp, #20]
8001462: 9604 str r6, [sp, #16]
8001464: 9503 str r5, [sp, #12]
8001466: 9402 str r4, [sp, #8]
8001468: 9101 str r1, [sp, #4]
800146a: 9200 str r2, [sp, #0]
800146c: 4673 mov r3, lr
800146e: 4662 mov r2, ip
8001470: 4957 ldr r1, [pc, #348] @ (80015d0 <loadEE+0x2e0>)
8001472: f00c fa09 bl 800d888 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001476: 463b mov r3, r7
8001478: 4618 mov r0, r3
800147a: f7fe fe67 bl 800014c <strlen>
800147e: 4603 mov r3, r0
8001480: b29a uxth r2, r3
8001482: 4639 mov r1, r7
8001484: f04f 33ff mov.w r3, #4294967295
8001488: 4850 ldr r0, [pc, #320] @ (80015cc <loadEE+0x2dc>)
800148a: f007 fc0d bl 8008ca8 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
800148e: 4b33 ldr r3, [pc, #204] @ (800155c <loadEE+0x26c>)
8001490: 881b ldrh r3, [r3, #0]
8001492: 4619 mov r1, r3
8001494: 4b32 ldr r3, [pc, #200] @ (8001560 <loadEE+0x270>)
8001496: 881b ldrh r3, [r3, #0]
8001498: 461c mov r4, r3
800149a: 4b32 ldr r3, [pc, #200] @ (8001564 <loadEE+0x274>)
800149c: 881b ldrh r3, [r3, #0]
800149e: 461a mov r2, r3
80014a0: 4b31 ldr r3, [pc, #196] @ (8001568 <loadEE+0x278>)
80014a2: 881b ldrh r3, [r3, #0]
80014a4: 4638 mov r0, r7
80014a6: 9301 str r3, [sp, #4]
80014a8: 9200 str r2, [sp, #0]
80014aa: 4623 mov r3, r4
80014ac: 460a mov r2, r1
80014ae: 4949 ldr r1, [pc, #292] @ (80015d4 <loadEE+0x2e4>)
80014b0: f00c f9ea bl 800d888 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80014b4: 463b mov r3, r7
80014b6: 4618 mov r0, r3
80014b8: f7fe fe48 bl 800014c <strlen>
80014bc: 4603 mov r3, r0
80014be: b29a uxth r2, r3
80014c0: 4639 mov r1, r7
80014c2: f04f 33ff mov.w r3, #4294967295
80014c6: 4841 ldr r0, [pc, #260] @ (80015cc <loadEE+0x2dc>)
80014c8: f007 fbee bl 8008ca8 <HAL_UART_Transmit>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
80014cc: 4b2d ldr r3, [pc, #180] @ (8001584 <loadEE+0x294>)
80014ce: 881b ldrh r3, [r3, #0]
80014d0: 461a mov r2, r3
80014d2: 4b2b ldr r3, [pc, #172] @ (8001580 <loadEE+0x290>)
80014d4: 881b ldrh r3, [r3, #0]
80014d6: 4638 mov r0, r7
80014d8: 493f ldr r1, [pc, #252] @ (80015d8 <loadEE+0x2e8>)
80014da: f00c f9d5 bl 800d888 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80014de: 463b mov r3, r7
80014e0: 4618 mov r0, r3
80014e2: f7fe fe33 bl 800014c <strlen>
80014e6: 4603 mov r3, r0
80014e8: b29a uxth r2, r3
80014ea: 4639 mov r1, r7
80014ec: f04f 33ff mov.w r3, #4294967295
80014f0: 4836 ldr r0, [pc, #216] @ (80015cc <loadEE+0x2dc>)
80014f2: f007 fbd9 bl 8008ca8 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
80014f6: 4b1e ldr r3, [pc, #120] @ (8001570 <loadEE+0x280>)
80014f8: 881b ldrh r3, [r3, #0]
80014fa: 4619 mov r1, r3
80014fc: 4b1d ldr r3, [pc, #116] @ (8001574 <loadEE+0x284>)
80014fe: 881b ldrh r3, [r3, #0]
8001500: 461c mov r4, r3
8001502: 4b1d ldr r3, [pc, #116] @ (8001578 <loadEE+0x288>)
8001504: 881b ldrh r3, [r3, #0]
8001506: 461a mov r2, r3
8001508: 4b1c ldr r3, [pc, #112] @ (800157c <loadEE+0x28c>)
800150a: 881b ldrh r3, [r3, #0]
800150c: 4638 mov r0, r7
800150e: 9301 str r3, [sp, #4]
8001510: 9200 str r2, [sp, #0]
8001512: 4623 mov r3, r4
8001514: 460a mov r2, r1
8001516: 4931 ldr r1, [pc, #196] @ (80015dc <loadEE+0x2ec>)
8001518: f00c f9b6 bl 800d888 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800151c: 463b mov r3, r7
800151e: 4618 mov r0, r3
8001520: f7fe fe14 bl 800014c <strlen>
8001524: 4603 mov r3, r0
8001526: b29a uxth r2, r3
8001528: 4639 mov r1, r7
800152a: f04f 33ff mov.w r3, #4294967295
800152e: 4827 ldr r0, [pc, #156] @ (80015cc <loadEE+0x2dc>)
8001530: f007 fbba bl 8008ca8 <HAL_UART_Transmit>
}
8001534: bf00 nop
8001536: 37cc adds r7, #204 @ 0xcc
8001538: 46bd mov sp, r7
800153a: bdf0 pop {r4, r5, r6, r7, pc}
800153c: 200003f6 .word 0x200003f6
8001540: 200003f8 .word 0x200003f8
8001544: 200003fa .word 0x200003fa
8001548: 200003fc .word 0x200003fc
800154c: 200003fe .word 0x200003fe
8001550: 20000400 .word 0x20000400
8001554: 20000402 .word 0x20000402
8001558: 20000404 .word 0x20000404
800155c: 20000406 .word 0x20000406
8001560: 20000408 .word 0x20000408
8001564: 2000040a .word 0x2000040a
8001568: 2000040c .word 0x2000040c
800156c: 20000410 .word 0x20000410
8001570: 20000414 .word 0x20000414
8001574: 20000416 .word 0x20000416
8001578: 20000418 .word 0x20000418
800157c: 2000041a .word 0x2000041a
8001580: 20000412 .word 0x20000412
8001584: 2000040e .word 0x2000040e
8001588: 2000041c .word 0x2000041c
800158c: 2000041e .word 0x2000041e
8001590: 20000420 .word 0x20000420
8001594: 20000422 .word 0x20000422
8001598: 20000424 .word 0x20000424
800159c: 20000426 .word 0x20000426
80015a0: 20000428 .word 0x20000428
80015a4: 2000042a .word 0x2000042a
80015a8: 2000042c .word 0x2000042c
80015ac: 2000042e .word 0x2000042e
80015b0: 20000430 .word 0x20000430
80015b4: 20000432 .word 0x20000432
80015b8: 20000434 .word 0x20000434
80015bc: 20000436 .word 0x20000436
80015c0: 20000438 .word 0x20000438
80015c4: 2000043a .word 0x2000043a
80015c8: 0800e430 .word 0x0800e430
80015cc: 200003a0 .word 0x200003a0
80015d0: 0800e438 .word 0x0800e438
80015d4: 0800e494 .word 0x0800e494
80015d8: 0800e4d8 .word 0x0800e4d8
80015dc: 0800e4f0 .word 0x0800e4f0
080015e0 <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void){
80015e0: b580 push {r7, lr}
80015e2: b082 sub sp, #8
80015e4: af00 add r7, sp, #0
static uint8_t c1s = 0;
static uint8_t inidx=0;
static uint8_t inbuf[4];
uint8_t i;
if (++c10ms >= 10) { // 10 ms
80015e6: 4b7c ldr r3, [pc, #496] @ (80017d8 <HAL_SYSTICK_Callback+0x1f8>)
80015e8: 781b ldrb r3, [r3, #0]
80015ea: 3301 adds r3, #1
80015ec: b2da uxtb r2, r3
80015ee: 4b7a ldr r3, [pc, #488] @ (80017d8 <HAL_SYSTICK_Callback+0x1f8>)
80015f0: 701a strb r2, [r3, #0]
80015f2: 4b79 ldr r3, [pc, #484] @ (80017d8 <HAL_SYSTICK_Callback+0x1f8>)
80015f4: 781b ldrb r3, [r3, #0]
80015f6: 2b09 cmp r3, #9
80015f8: f240 81b1 bls.w 800195e <HAL_SYSTICK_Callback+0x37e>
c10ms = 0;
80015fc: 4b76 ldr r3, [pc, #472] @ (80017d8 <HAL_SYSTICK_Callback+0x1f8>)
80015fe: 2200 movs r2, #0
8001600: 701a strb r2, [r3, #0]
if(rtP1)rtP1--;
8001602: 4b76 ldr r3, [pc, #472] @ (80017dc <HAL_SYSTICK_Callback+0x1fc>)
8001604: 781b ldrb r3, [r3, #0]
8001606: b2db uxtb r3, r3
8001608: 2b00 cmp r3, #0
800160a: d006 beq.n 800161a <HAL_SYSTICK_Callback+0x3a>
800160c: 4b73 ldr r3, [pc, #460] @ (80017dc <HAL_SYSTICK_Callback+0x1fc>)
800160e: 781b ldrb r3, [r3, #0]
8001610: b2db uxtb r3, r3
8001612: 3b01 subs r3, #1
8001614: b2da uxtb r2, r3
8001616: 4b71 ldr r3, [pc, #452] @ (80017dc <HAL_SYSTICK_Callback+0x1fc>)
8001618: 701a strb r2, [r3, #0]
if(rtP2)rtP2--;
800161a: 4b71 ldr r3, [pc, #452] @ (80017e0 <HAL_SYSTICK_Callback+0x200>)
800161c: 781b ldrb r3, [r3, #0]
800161e: b2db uxtb r3, r3
8001620: 2b00 cmp r3, #0
8001622: d006 beq.n 8001632 <HAL_SYSTICK_Callback+0x52>
8001624: 4b6e ldr r3, [pc, #440] @ (80017e0 <HAL_SYSTICK_Callback+0x200>)
8001626: 781b ldrb r3, [r3, #0]
8001628: b2db uxtb r3, r3
800162a: 3b01 subs r3, #1
800162c: b2da uxtb r2, r3
800162e: 4b6c ldr r3, [pc, #432] @ (80017e0 <HAL_SYSTICK_Callback+0x200>)
8001630: 701a strb r2, [r3, #0]
if(rtTLC)rtTLC--;
8001632: 4b6c ldr r3, [pc, #432] @ (80017e4 <HAL_SYSTICK_Callback+0x204>)
8001634: 781b ldrb r3, [r3, #0]
8001636: b2db uxtb r3, r3
8001638: 2b00 cmp r3, #0
800163a: d006 beq.n 800164a <HAL_SYSTICK_Callback+0x6a>
800163c: 4b69 ldr r3, [pc, #420] @ (80017e4 <HAL_SYSTICK_Callback+0x204>)
800163e: 781b ldrb r3, [r3, #0]
8001640: b2db uxtb r3, r3
8001642: 3b01 subs r3, #1
8001644: b2da uxtb r2, r3
8001646: 4b67 ldr r3, [pc, #412] @ (80017e4 <HAL_SYSTICK_Callback+0x204>)
8001648: 701a strb r2, [r3, #0]
//**** legge i tasti********************************************************************************
inidx++;
800164a: 4b67 ldr r3, [pc, #412] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
800164c: 781b ldrb r3, [r3, #0]
800164e: 3301 adds r3, #1
8001650: b2da uxtb r2, r3
8001652: 4b65 ldr r3, [pc, #404] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001654: 701a strb r2, [r3, #0]
inidx&=0x03;
8001656: 4b64 ldr r3, [pc, #400] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001658: 781b ldrb r3, [r3, #0]
800165a: f003 0303 and.w r3, r3, #3
800165e: b2da uxtb r2, r3
8001660: 4b61 ldr r3, [pc, #388] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001662: 701a strb r2, [r3, #0]
if(HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP1;else inbuf[inidx]&=(~INP1);
8001664: f44f 4180 mov.w r1, #16384 @ 0x4000
8001668: 4860 ldr r0, [pc, #384] @ (80017ec <HAL_SYSTICK_Callback+0x20c>)
800166a: f004 f9ef bl 8005a4c <HAL_GPIO_ReadPin>
800166e: 4603 mov r3, r0
8001670: 2b00 cmp r3, #0
8001672: d10c bne.n 800168e <HAL_SYSTICK_Callback+0xae>
8001674: 4b5c ldr r3, [pc, #368] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001676: 781b ldrb r3, [r3, #0]
8001678: 461a mov r2, r3
800167a: 4b5d ldr r3, [pc, #372] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
800167c: 5c9b ldrb r3, [r3, r2]
800167e: 4a5a ldr r2, [pc, #360] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001680: 7812 ldrb r2, [r2, #0]
8001682: f043 0301 orr.w r3, r3, #1
8001686: b2d9 uxtb r1, r3
8001688: 4b59 ldr r3, [pc, #356] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
800168a: 5499 strb r1, [r3, r2]
800168c: e00b b.n 80016a6 <HAL_SYSTICK_Callback+0xc6>
800168e: 4b56 ldr r3, [pc, #344] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001690: 781b ldrb r3, [r3, #0]
8001692: 461a mov r2, r3
8001694: 4b56 ldr r3, [pc, #344] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
8001696: 5c9b ldrb r3, [r3, r2]
8001698: 4a53 ldr r2, [pc, #332] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
800169a: 7812 ldrb r2, [r2, #0]
800169c: f023 0301 bic.w r3, r3, #1
80016a0: b2d9 uxtb r1, r3
80016a2: 4b53 ldr r3, [pc, #332] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
80016a4: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP2;else inbuf[inidx]&=(~INP2);
80016a6: f44f 4100 mov.w r1, #32768 @ 0x8000
80016aa: 4850 ldr r0, [pc, #320] @ (80017ec <HAL_SYSTICK_Callback+0x20c>)
80016ac: f004 f9ce bl 8005a4c <HAL_GPIO_ReadPin>
80016b0: 4603 mov r3, r0
80016b2: 2b00 cmp r3, #0
80016b4: d10c bne.n 80016d0 <HAL_SYSTICK_Callback+0xf0>
80016b6: 4b4c ldr r3, [pc, #304] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
80016b8: 781b ldrb r3, [r3, #0]
80016ba: 461a mov r2, r3
80016bc: 4b4c ldr r3, [pc, #304] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
80016be: 5c9b ldrb r3, [r3, r2]
80016c0: 4a49 ldr r2, [pc, #292] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
80016c2: 7812 ldrb r2, [r2, #0]
80016c4: f043 0302 orr.w r3, r3, #2
80016c8: b2d9 uxtb r1, r3
80016ca: 4b49 ldr r3, [pc, #292] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
80016cc: 5499 strb r1, [r3, r2]
80016ce: e00b b.n 80016e8 <HAL_SYSTICK_Callback+0x108>
80016d0: 4b45 ldr r3, [pc, #276] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
80016d2: 781b ldrb r3, [r3, #0]
80016d4: 461a mov r2, r3
80016d6: 4b46 ldr r3, [pc, #280] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
80016d8: 5c9b ldrb r3, [r3, r2]
80016da: 4a43 ldr r2, [pc, #268] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
80016dc: 7812 ldrb r2, [r2, #0]
80016de: f023 0302 bic.w r3, r3, #2
80016e2: b2d9 uxtb r1, r3
80016e4: 4b42 ldr r3, [pc, #264] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
80016e6: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH1;else inbuf[inidx]&=(~INCH1);
80016e8: f44f 5180 mov.w r1, #4096 @ 0x1000
80016ec: 4841 ldr r0, [pc, #260] @ (80017f4 <HAL_SYSTICK_Callback+0x214>)
80016ee: f004 f9ad bl 8005a4c <HAL_GPIO_ReadPin>
80016f2: 4603 mov r3, r0
80016f4: 2b00 cmp r3, #0
80016f6: d10c bne.n 8001712 <HAL_SYSTICK_Callback+0x132>
80016f8: 4b3b ldr r3, [pc, #236] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
80016fa: 781b ldrb r3, [r3, #0]
80016fc: 461a mov r2, r3
80016fe: 4b3c ldr r3, [pc, #240] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
8001700: 5c9b ldrb r3, [r3, r2]
8001702: 4a39 ldr r2, [pc, #228] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001704: 7812 ldrb r2, [r2, #0]
8001706: f043 0304 orr.w r3, r3, #4
800170a: b2d9 uxtb r1, r3
800170c: 4b38 ldr r3, [pc, #224] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
800170e: 5499 strb r1, [r3, r2]
8001710: e00b b.n 800172a <HAL_SYSTICK_Callback+0x14a>
8001712: 4b35 ldr r3, [pc, #212] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001714: 781b ldrb r3, [r3, #0]
8001716: 461a mov r2, r3
8001718: 4b35 ldr r3, [pc, #212] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
800171a: 5c9b ldrb r3, [r3, r2]
800171c: 4a32 ldr r2, [pc, #200] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
800171e: 7812 ldrb r2, [r2, #0]
8001720: f023 0304 bic.w r3, r3, #4
8001724: b2d9 uxtb r1, r3
8001726: 4b32 ldr r3, [pc, #200] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
8001728: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH2;else inbuf[inidx]&=(~INCH2);
800172a: f44f 5100 mov.w r1, #8192 @ 0x2000
800172e: 4831 ldr r0, [pc, #196] @ (80017f4 <HAL_SYSTICK_Callback+0x214>)
8001730: f004 f98c bl 8005a4c <HAL_GPIO_ReadPin>
8001734: 4603 mov r3, r0
8001736: 2b00 cmp r3, #0
8001738: d10c bne.n 8001754 <HAL_SYSTICK_Callback+0x174>
800173a: 4b2b ldr r3, [pc, #172] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
800173c: 781b ldrb r3, [r3, #0]
800173e: 461a mov r2, r3
8001740: 4b2b ldr r3, [pc, #172] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
8001742: 5c9b ldrb r3, [r3, r2]
8001744: 4a28 ldr r2, [pc, #160] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001746: 7812 ldrb r2, [r2, #0]
8001748: f043 0308 orr.w r3, r3, #8
800174c: b2d9 uxtb r1, r3
800174e: 4b28 ldr r3, [pc, #160] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
8001750: 5499 strb r1, [r3, r2]
8001752: e00b b.n 800176c <HAL_SYSTICK_Callback+0x18c>
8001754: 4b24 ldr r3, [pc, #144] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001756: 781b ldrb r3, [r3, #0]
8001758: 461a mov r2, r3
800175a: 4b25 ldr r3, [pc, #148] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
800175c: 5c9b ldrb r3, [r3, r2]
800175e: 4a22 ldr r2, [pc, #136] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001760: 7812 ldrb r2, [r2, #0]
8001762: f023 0308 bic.w r3, r3, #8
8001766: b2d9 uxtb r1, r3
8001768: 4b21 ldr r3, [pc, #132] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
800176a: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH3;else inbuf[inidx]&=(~INCH3);
800176c: f44f 4180 mov.w r1, #16384 @ 0x4000
8001770: 4820 ldr r0, [pc, #128] @ (80017f4 <HAL_SYSTICK_Callback+0x214>)
8001772: f004 f96b bl 8005a4c <HAL_GPIO_ReadPin>
8001776: 4603 mov r3, r0
8001778: 2b00 cmp r3, #0
800177a: d10c bne.n 8001796 <HAL_SYSTICK_Callback+0x1b6>
800177c: 4b1a ldr r3, [pc, #104] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
800177e: 781b ldrb r3, [r3, #0]
8001780: 461a mov r2, r3
8001782: 4b1b ldr r3, [pc, #108] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
8001784: 5c9b ldrb r3, [r3, r2]
8001786: 4a18 ldr r2, [pc, #96] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001788: 7812 ldrb r2, [r2, #0]
800178a: f043 0310 orr.w r3, r3, #16
800178e: b2d9 uxtb r1, r3
8001790: 4b17 ldr r3, [pc, #92] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
8001792: 5499 strb r1, [r3, r2]
8001794: e00b b.n 80017ae <HAL_SYSTICK_Callback+0x1ce>
8001796: 4b14 ldr r3, [pc, #80] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
8001798: 781b ldrb r3, [r3, #0]
800179a: 461a mov r2, r3
800179c: 4b14 ldr r3, [pc, #80] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
800179e: 5c9b ldrb r3, [r3, r2]
80017a0: 4a11 ldr r2, [pc, #68] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
80017a2: 7812 ldrb r2, [r2, #0]
80017a4: f023 0310 bic.w r3, r3, #16
80017a8: b2d9 uxtb r1, r3
80017aa: 4b11 ldr r3, [pc, #68] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
80017ac: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH4;else inbuf[inidx]&=(~INCH4);
80017ae: f44f 4100 mov.w r1, #32768 @ 0x8000
80017b2: 4810 ldr r0, [pc, #64] @ (80017f4 <HAL_SYSTICK_Callback+0x214>)
80017b4: f004 f94a bl 8005a4c <HAL_GPIO_ReadPin>
80017b8: 4603 mov r3, r0
80017ba: 2b00 cmp r3, #0
80017bc: d11c bne.n 80017f8 <HAL_SYSTICK_Callback+0x218>
80017be: 4b0a ldr r3, [pc, #40] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
80017c0: 781b ldrb r3, [r3, #0]
80017c2: 461a mov r2, r3
80017c4: 4b0a ldr r3, [pc, #40] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
80017c6: 5c9b ldrb r3, [r3, r2]
80017c8: 4a07 ldr r2, [pc, #28] @ (80017e8 <HAL_SYSTICK_Callback+0x208>)
80017ca: 7812 ldrb r2, [r2, #0]
80017cc: f043 0320 orr.w r3, r3, #32
80017d0: b2d9 uxtb r1, r3
80017d2: 4b07 ldr r3, [pc, #28] @ (80017f0 <HAL_SYSTICK_Callback+0x210>)
80017d4: 5499 strb r1, [r3, r2]
80017d6: e01b b.n 8001810 <HAL_SYSTICK_Callback+0x230>
80017d8: 20000448 .word 0x20000448
80017dc: 20000004 .word 0x20000004
80017e0: 20000005 .word 0x20000005
80017e4: 20000006 .word 0x20000006
80017e8: 20000449 .word 0x20000449
80017ec: 40011000 .word 0x40011000
80017f0: 2000044c .word 0x2000044c
80017f4: 40010c00 .word 0x40010c00
80017f8: 4b5b ldr r3, [pc, #364] @ (8001968 <HAL_SYSTICK_Callback+0x388>)
80017fa: 781b ldrb r3, [r3, #0]
80017fc: 461a mov r2, r3
80017fe: 4b5b ldr r3, [pc, #364] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
8001800: 5c9b ldrb r3, [r3, r2]
8001802: 4a59 ldr r2, [pc, #356] @ (8001968 <HAL_SYSTICK_Callback+0x388>)
8001804: 7812 ldrb r2, [r2, #0]
8001806: f023 0320 bic.w r3, r3, #32
800180a: b2d9 uxtb r1, r3
800180c: 4b57 ldr r3, [pc, #348] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
800180e: 5499 strb r1, [r3, r2]
pulsanti|=(inbuf[0]&inbuf[1]&inbuf[2]&inbuf[3]);
8001810: 4b56 ldr r3, [pc, #344] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
8001812: 781a ldrb r2, [r3, #0]
8001814: 4b55 ldr r3, [pc, #340] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
8001816: 785b ldrb r3, [r3, #1]
8001818: 4013 ands r3, r2
800181a: b2da uxtb r2, r3
800181c: 4b53 ldr r3, [pc, #332] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
800181e: 789b ldrb r3, [r3, #2]
8001820: 4013 ands r3, r2
8001822: b2da uxtb r2, r3
8001824: 4b51 ldr r3, [pc, #324] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
8001826: 78db ldrb r3, [r3, #3]
8001828: 4013 ands r3, r2
800182a: b2da uxtb r2, r3
800182c: 4b50 ldr r3, [pc, #320] @ (8001970 <HAL_SYSTICK_Callback+0x390>)
800182e: 781b ldrb r3, [r3, #0]
8001830: 4313 orrs r3, r2
8001832: b2da uxtb r2, r3
8001834: 4b4e ldr r3, [pc, #312] @ (8001970 <HAL_SYSTICK_Callback+0x390>)
8001836: 701a strb r2, [r3, #0]
pulsanti&=(inbuf[0]|inbuf[1]|inbuf[2]|inbuf[3]);
8001838: 4b4c ldr r3, [pc, #304] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
800183a: 781a ldrb r2, [r3, #0]
800183c: 4b4b ldr r3, [pc, #300] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
800183e: 785b ldrb r3, [r3, #1]
8001840: 4313 orrs r3, r2
8001842: b2da uxtb r2, r3
8001844: 4b49 ldr r3, [pc, #292] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
8001846: 789b ldrb r3, [r3, #2]
8001848: 4313 orrs r3, r2
800184a: b2da uxtb r2, r3
800184c: 4b47 ldr r3, [pc, #284] @ (800196c <HAL_SYSTICK_Callback+0x38c>)
800184e: 78db ldrb r3, [r3, #3]
8001850: 4313 orrs r3, r2
8001852: b2da uxtb r2, r3
8001854: 4b46 ldr r3, [pc, #280] @ (8001970 <HAL_SYSTICK_Callback+0x390>)
8001856: 781b ldrb r3, [r3, #0]
8001858: 4013 ands r3, r2
800185a: b2da uxtb r2, r3
800185c: 4b44 ldr r3, [pc, #272] @ (8001970 <HAL_SYSTICK_Callback+0x390>)
800185e: 701a strb r2, [r3, #0]
//**** legge adc ***********************************************************************************
readAdc();
8001860: f7fe fcb2 bl 80001c8 <readAdc>
if (++c100ms >= 10) { // 10 ms
8001864: 4b43 ldr r3, [pc, #268] @ (8001974 <HAL_SYSTICK_Callback+0x394>)
8001866: 781b ldrb r3, [r3, #0]
8001868: 3301 adds r3, #1
800186a: b2da uxtb r2, r3
800186c: 4b41 ldr r3, [pc, #260] @ (8001974 <HAL_SYSTICK_Callback+0x394>)
800186e: 701a strb r2, [r3, #0]
8001870: 4b40 ldr r3, [pc, #256] @ (8001974 <HAL_SYSTICK_Callback+0x394>)
8001872: 781b ldrb r3, [r3, #0]
8001874: 2b09 cmp r3, #9
8001876: d972 bls.n 800195e <HAL_SYSTICK_Callback+0x37e>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8001878: 4b3e ldr r3, [pc, #248] @ (8001974 <HAL_SYSTICK_Callback+0x394>)
800187a: 2200 movs r2, #0
800187c: 701a strb r2, [r3, #0]
for(i=0;i<4;i++){
800187e: 2300 movs r3, #0
8001880: 71fb strb r3, [r7, #7]
8001882: e013 b.n 80018ac <HAL_SYSTICK_Callback+0x2cc>
if(rtramp[i])rtramp[i]--;
8001884: 79fb ldrb r3, [r7, #7]
8001886: 4a3c ldr r2, [pc, #240] @ (8001978 <HAL_SYSTICK_Callback+0x398>)
8001888: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
800188c: b29b uxth r3, r3
800188e: 2b00 cmp r3, #0
8001890: d009 beq.n 80018a6 <HAL_SYSTICK_Callback+0x2c6>
8001892: 79fb ldrb r3, [r7, #7]
8001894: 4a38 ldr r2, [pc, #224] @ (8001978 <HAL_SYSTICK_Callback+0x398>)
8001896: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
800189a: b292 uxth r2, r2
800189c: 3a01 subs r2, #1
800189e: b291 uxth r1, r2
80018a0: 4a35 ldr r2, [pc, #212] @ (8001978 <HAL_SYSTICK_Callback+0x398>)
80018a2: f822 1013 strh.w r1, [r2, r3, lsl #1]
for(i=0;i<4;i++){
80018a6: 79fb ldrb r3, [r7, #7]
80018a8: 3301 adds r3, #1
80018aa: 71fb strb r3, [r7, #7]
80018ac: 79fb ldrb r3, [r7, #7]
80018ae: 2b03 cmp r3, #3
80018b0: d9e8 bls.n 8001884 <HAL_SYSTICK_Callback+0x2a4>
}
if(rtCiclo<0xffff)rtCiclo++;
80018b2: 4b32 ldr r3, [pc, #200] @ (800197c <HAL_SYSTICK_Callback+0x39c>)
80018b4: 881b ldrh r3, [r3, #0]
80018b6: b29b uxth r3, r3
80018b8: f64f 72ff movw r2, #65535 @ 0xffff
80018bc: 4293 cmp r3, r2
80018be: d006 beq.n 80018ce <HAL_SYSTICK_Callback+0x2ee>
80018c0: 4b2e ldr r3, [pc, #184] @ (800197c <HAL_SYSTICK_Callback+0x39c>)
80018c2: 881b ldrh r3, [r3, #0]
80018c4: b29b uxth r3, r3
80018c6: 3301 adds r3, #1
80018c8: b29a uxth r2, r3
80018ca: 4b2c ldr r3, [pc, #176] @ (800197c <HAL_SYSTICK_Callback+0x39c>)
80018cc: 801a strh r2, [r3, #0]
//**** gestione buzzer *****************************************************************************
if(stBuz==bzmoving){
80018ce: 4b2c ldr r3, [pc, #176] @ (8001980 <HAL_SYSTICK_Callback+0x3a0>)
80018d0: 781b ldrb r3, [r3, #0]
80018d2: b2db uxtb r3, r3
80018d4: 2b01 cmp r3, #1
80018d6: d111 bne.n 80018fc <HAL_SYSTICK_Callback+0x31c>
if(c1s>=5)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
80018d8: 4b2a ldr r3, [pc, #168] @ (8001984 <HAL_SYSTICK_Callback+0x3a4>)
80018da: 781b ldrb r3, [r3, #0]
80018dc: 2b04 cmp r3, #4
80018de: d906 bls.n 80018ee <HAL_SYSTICK_Callback+0x30e>
80018e0: 2200 movs r2, #0
80018e2: f44f 7180 mov.w r1, #256 @ 0x100
80018e6: 4828 ldr r0, [pc, #160] @ (8001988 <HAL_SYSTICK_Callback+0x3a8>)
80018e8: f004 f8c7 bl 8005a7a <HAL_GPIO_WritePin>
80018ec: e025 b.n 800193a <HAL_SYSTICK_Callback+0x35a>
80018ee: 2201 movs r2, #1
80018f0: f44f 7180 mov.w r1, #256 @ 0x100
80018f4: 4824 ldr r0, [pc, #144] @ (8001988 <HAL_SYSTICK_Callback+0x3a8>)
80018f6: f004 f8c0 bl 8005a7a <HAL_GPIO_WritePin>
80018fa: e01e b.n 800193a <HAL_SYSTICK_Callback+0x35a>
}else if(stBuz==bzwarning){
80018fc: 4b20 ldr r3, [pc, #128] @ (8001980 <HAL_SYSTICK_Callback+0x3a0>)
80018fe: 781b ldrb r3, [r3, #0]
8001900: b2db uxtb r3, r3
8001902: 2b02 cmp r3, #2
8001904: d113 bne.n 800192e <HAL_SYSTICK_Callback+0x34e>
if(c1s&2)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001906: 4b1f ldr r3, [pc, #124] @ (8001984 <HAL_SYSTICK_Callback+0x3a4>)
8001908: 781b ldrb r3, [r3, #0]
800190a: f003 0302 and.w r3, r3, #2
800190e: 2b00 cmp r3, #0
8001910: d006 beq.n 8001920 <HAL_SYSTICK_Callback+0x340>
8001912: 2200 movs r2, #0
8001914: f44f 7180 mov.w r1, #256 @ 0x100
8001918: 481b ldr r0, [pc, #108] @ (8001988 <HAL_SYSTICK_Callback+0x3a8>)
800191a: f004 f8ae bl 8005a7a <HAL_GPIO_WritePin>
800191e: e00c b.n 800193a <HAL_SYSTICK_Callback+0x35a>
8001920: 2201 movs r2, #1
8001922: f44f 7180 mov.w r1, #256 @ 0x100
8001926: 4818 ldr r0, [pc, #96] @ (8001988 <HAL_SYSTICK_Callback+0x3a8>)
8001928: f004 f8a7 bl 8005a7a <HAL_GPIO_WritePin>
800192c: e005 b.n 800193a <HAL_SYSTICK_Callback+0x35a>
}else{//bzoff
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
800192e: 2200 movs r2, #0
8001930: f44f 7180 mov.w r1, #256 @ 0x100
8001934: 4814 ldr r0, [pc, #80] @ (8001988 <HAL_SYSTICK_Callback+0x3a8>)
8001936: f004 f8a0 bl 8005a7a <HAL_GPIO_WritePin>
}
//**************************************************************************************************
if (++c1s >= 10) { // 1 s
800193a: 4b12 ldr r3, [pc, #72] @ (8001984 <HAL_SYSTICK_Callback+0x3a4>)
800193c: 781b ldrb r3, [r3, #0]
800193e: 3301 adds r3, #1
8001940: b2da uxtb r2, r3
8001942: 4b10 ldr r3, [pc, #64] @ (8001984 <HAL_SYSTICK_Callback+0x3a4>)
8001944: 701a strb r2, [r3, #0]
8001946: 4b0f ldr r3, [pc, #60] @ (8001984 <HAL_SYSTICK_Callback+0x3a4>)
8001948: 781b ldrb r3, [r3, #0]
800194a: 2b09 cmp r3, #9
800194c: d907 bls.n 800195e <HAL_SYSTICK_Callback+0x37e>
c1s = 0;
800194e: 4b0d ldr r3, [pc, #52] @ (8001984 <HAL_SYSTICK_Callback+0x3a4>)
8001950: 2200 movs r2, #0
8001952: 701a strb r2, [r3, #0]
HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
8001954: f44f 5100 mov.w r1, #8192 @ 0x2000
8001958: 480c ldr r0, [pc, #48] @ (800198c <HAL_SYSTICK_Callback+0x3ac>)
800195a: f004 f8a6 bl 8005aaa <HAL_GPIO_TogglePin>
}
}
}
}
800195e: bf00 nop
8001960: 3708 adds r7, #8
8001962: 46bd mov sp, r7
8001964: bd80 pop {r7, pc}
8001966: bf00 nop
8001968: 20000449 .word 0x20000449
800196c: 2000044c .word 0x2000044c
8001970: 200003e8 .word 0x200003e8
8001974: 20000450 .word 0x20000450
8001978: 200003ec .word 0x200003ec
800197c: 200003f4 .word 0x200003f4
8001980: 20000447 .word 0x20000447
8001984: 20000451 .word 0x20000451
8001988: 40010800 .word 0x40010800
800198c: 40011000 .word 0x40011000
08001990 <managePulsanti>:
void managePulsanti(void){
8001990: b480 push {r7}
8001992: af00 add r7, sp, #0
if(pulsanti&INP1){
8001994: 4ba1 ldr r3, [pc, #644] @ (8001c1c <managePulsanti+0x28c>)
8001996: 781b ldrb r3, [r3, #0]
8001998: f003 0301 and.w r3, r3, #1
800199c: 2b00 cmp r3, #0
800199e: d00c beq.n 80019ba <managePulsanti+0x2a>
if(rtP1==0)stPulsanti|=P1START;
80019a0: 4b9f ldr r3, [pc, #636] @ (8001c20 <managePulsanti+0x290>)
80019a2: 781b ldrb r3, [r3, #0]
80019a4: b2db uxtb r3, r3
80019a6: 2b00 cmp r3, #0
80019a8: d124 bne.n 80019f4 <managePulsanti+0x64>
80019aa: 4b9e ldr r3, [pc, #632] @ (8001c24 <managePulsanti+0x294>)
80019ac: 881b ldrh r3, [r3, #0]
80019ae: f043 0301 orr.w r3, r3, #1
80019b2: b29a uxth r2, r3
80019b4: 4b9b ldr r3, [pc, #620] @ (8001c24 <managePulsanti+0x294>)
80019b6: 801a strh r2, [r3, #0]
80019b8: e01c b.n 80019f4 <managePulsanti+0x64>
}else{
if(stPulsanti&P1START)stPulsanti&=(~P1START);
80019ba: 4b9a ldr r3, [pc, #616] @ (8001c24 <managePulsanti+0x294>)
80019bc: 881b ldrh r3, [r3, #0]
80019be: f003 0301 and.w r3, r3, #1
80019c2: 2b00 cmp r3, #0
80019c4: d007 beq.n 80019d6 <managePulsanti+0x46>
80019c6: 4b97 ldr r3, [pc, #604] @ (8001c24 <managePulsanti+0x294>)
80019c8: 881b ldrh r3, [r3, #0]
80019ca: f023 0301 bic.w r3, r3, #1
80019ce: b29a uxth r2, r3
80019d0: 4b94 ldr r3, [pc, #592] @ (8001c24 <managePulsanti+0x294>)
80019d2: 801a strh r2, [r3, #0]
80019d4: e00b b.n 80019ee <managePulsanti+0x5e>
else if(rtP1<=190){
80019d6: 4b92 ldr r3, [pc, #584] @ (8001c20 <managePulsanti+0x290>)
80019d8: 781b ldrb r3, [r3, #0]
80019da: b2db uxtb r3, r3
80019dc: 2bbe cmp r3, #190 @ 0xbe
80019de: d806 bhi.n 80019ee <managePulsanti+0x5e>
stPulsanti|=P1STOP;
80019e0: 4b90 ldr r3, [pc, #576] @ (8001c24 <managePulsanti+0x294>)
80019e2: 881b ldrh r3, [r3, #0]
80019e4: f043 0302 orr.w r3, r3, #2
80019e8: b29a uxth r2, r3
80019ea: 4b8e ldr r3, [pc, #568] @ (8001c24 <managePulsanti+0x294>)
80019ec: 801a strh r2, [r3, #0]
}
rtP1=200;
80019ee: 4b8c ldr r3, [pc, #560] @ (8001c20 <managePulsanti+0x290>)
80019f0: 22c8 movs r2, #200 @ 0xc8
80019f2: 701a strb r2, [r3, #0]
}
if(pulsanti&INP2){
80019f4: 4b89 ldr r3, [pc, #548] @ (8001c1c <managePulsanti+0x28c>)
80019f6: 781b ldrb r3, [r3, #0]
80019f8: f003 0302 and.w r3, r3, #2
80019fc: 2b00 cmp r3, #0
80019fe: d00c beq.n 8001a1a <managePulsanti+0x8a>
if(rtP2==0)stPulsanti|=P2START;
8001a00: 4b89 ldr r3, [pc, #548] @ (8001c28 <managePulsanti+0x298>)
8001a02: 781b ldrb r3, [r3, #0]
8001a04: b2db uxtb r3, r3
8001a06: 2b00 cmp r3, #0
8001a08: d124 bne.n 8001a54 <managePulsanti+0xc4>
8001a0a: 4b86 ldr r3, [pc, #536] @ (8001c24 <managePulsanti+0x294>)
8001a0c: 881b ldrh r3, [r3, #0]
8001a0e: f043 0304 orr.w r3, r3, #4
8001a12: b29a uxth r2, r3
8001a14: 4b83 ldr r3, [pc, #524] @ (8001c24 <managePulsanti+0x294>)
8001a16: 801a strh r2, [r3, #0]
8001a18: e01c b.n 8001a54 <managePulsanti+0xc4>
}else{
if(stPulsanti&P2START)stPulsanti&=(~P2START);
8001a1a: 4b82 ldr r3, [pc, #520] @ (8001c24 <managePulsanti+0x294>)
8001a1c: 881b ldrh r3, [r3, #0]
8001a1e: f003 0304 and.w r3, r3, #4
8001a22: 2b00 cmp r3, #0
8001a24: d007 beq.n 8001a36 <managePulsanti+0xa6>
8001a26: 4b7f ldr r3, [pc, #508] @ (8001c24 <managePulsanti+0x294>)
8001a28: 881b ldrh r3, [r3, #0]
8001a2a: f023 0304 bic.w r3, r3, #4
8001a2e: b29a uxth r2, r3
8001a30: 4b7c ldr r3, [pc, #496] @ (8001c24 <managePulsanti+0x294>)
8001a32: 801a strh r2, [r3, #0]
8001a34: e00b b.n 8001a4e <managePulsanti+0xbe>
else if(rtP2<=190)stPulsanti|=P2STOP;
8001a36: 4b7c ldr r3, [pc, #496] @ (8001c28 <managePulsanti+0x298>)
8001a38: 781b ldrb r3, [r3, #0]
8001a3a: b2db uxtb r3, r3
8001a3c: 2bbe cmp r3, #190 @ 0xbe
8001a3e: d806 bhi.n 8001a4e <managePulsanti+0xbe>
8001a40: 4b78 ldr r3, [pc, #480] @ (8001c24 <managePulsanti+0x294>)
8001a42: 881b ldrh r3, [r3, #0]
8001a44: f043 0308 orr.w r3, r3, #8
8001a48: b29a uxth r2, r3
8001a4a: 4b76 ldr r3, [pc, #472] @ (8001c24 <managePulsanti+0x294>)
8001a4c: 801a strh r2, [r3, #0]
rtP2=200;
8001a4e: 4b76 ldr r3, [pc, #472] @ (8001c28 <managePulsanti+0x298>)
8001a50: 22c8 movs r2, #200 @ 0xc8
8001a52: 701a strb r2, [r3, #0]
}
stPulsanti&=(P1START|P1STOP|P2START|P2STOP);
8001a54: 4b73 ldr r3, [pc, #460] @ (8001c24 <managePulsanti+0x294>)
8001a56: 881b ldrh r3, [r3, #0]
8001a58: f003 030f and.w r3, r3, #15
8001a5c: b29a uxth r2, r3
8001a5e: 4b71 ldr r3, [pc, #452] @ (8001c24 <managePulsanti+0x294>)
8001a60: 801a strh r2, [r3, #0]
if(stPulsanti==0){
8001a62: 4b70 ldr r3, [pc, #448] @ (8001c24 <managePulsanti+0x294>)
8001a64: 881b ldrh r3, [r3, #0]
8001a66: 2b00 cmp r3, #0
8001a68: f040 80d3 bne.w 8001c12 <managePulsanti+0x282>
switch(pulsanti&0x3c){
8001a6c: 4b6b ldr r3, [pc, #428] @ (8001c1c <managePulsanti+0x28c>)
8001a6e: 781b ldrb r3, [r3, #0]
8001a70: f003 033c and.w r3, r3, #60 @ 0x3c
8001a74: 2b30 cmp r3, #48 @ 0x30
8001a76: f200 80ba bhi.w 8001bee <managePulsanti+0x25e>
8001a7a: a201 add r2, pc, #4 @ (adr r2, 8001a80 <managePulsanti+0xf0>)
8001a7c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001a80: 08001b45 .word 0x08001b45
8001a84: 08001bef .word 0x08001bef
8001a88: 08001bef .word 0x08001bef
8001a8c: 08001bef .word 0x08001bef
8001a90: 08001ba1 .word 0x08001ba1
8001a94: 08001bef .word 0x08001bef
8001a98: 08001bef .word 0x08001bef
8001a9c: 08001bef .word 0x08001bef
8001aa0: 08001b53 .word 0x08001b53
8001aa4: 08001bef .word 0x08001bef
8001aa8: 08001bef .word 0x08001bef
8001aac: 08001bef .word 0x08001bef
8001ab0: 08001bd5 .word 0x08001bd5
8001ab4: 08001bef .word 0x08001bef
8001ab8: 08001bef .word 0x08001bef
8001abc: 08001bef .word 0x08001bef
8001ac0: 08001b6d .word 0x08001b6d
8001ac4: 08001bef .word 0x08001bef
8001ac8: 08001bef .word 0x08001bef
8001acc: 08001bef .word 0x08001bef
8001ad0: 08001bef .word 0x08001bef
8001ad4: 08001bef .word 0x08001bef
8001ad8: 08001bef .word 0x08001bef
8001adc: 08001bef .word 0x08001bef
8001ae0: 08001bef .word 0x08001bef
8001ae4: 08001bef .word 0x08001bef
8001ae8: 08001bef .word 0x08001bef
8001aec: 08001bef .word 0x08001bef
8001af0: 08001bef .word 0x08001bef
8001af4: 08001bef .word 0x08001bef
8001af8: 08001bef .word 0x08001bef
8001afc: 08001bef .word 0x08001bef
8001b00: 08001b87 .word 0x08001b87
8001b04: 08001bef .word 0x08001bef
8001b08: 08001bef .word 0x08001bef
8001b0c: 08001bef .word 0x08001bef
8001b10: 08001bef .word 0x08001bef
8001b14: 08001bef .word 0x08001bef
8001b18: 08001bef .word 0x08001bef
8001b1c: 08001bef .word 0x08001bef
8001b20: 08001bef .word 0x08001bef
8001b24: 08001bef .word 0x08001bef
8001b28: 08001bef .word 0x08001bef
8001b2c: 08001bef .word 0x08001bef
8001b30: 08001bef .word 0x08001bef
8001b34: 08001bef .word 0x08001bef
8001b38: 08001bef .word 0x08001bef
8001b3c: 08001bef .word 0x08001bef
8001b40: 08001bbb .word 0x08001bbb
case 0x00:
rtTLC=100;
8001b44: 4b39 ldr r3, [pc, #228] @ (8001c2c <managePulsanti+0x29c>)
8001b46: 2264 movs r2, #100 @ 0x64
8001b48: 701a strb r2, [r3, #0]
stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW));
8001b4a: 4b36 ldr r3, [pc, #216] @ (8001c24 <managePulsanti+0x294>)
8001b4c: 2200 movs r2, #0
8001b4e: 801a strh r2, [r3, #0]
break;
8001b50: e05f b.n 8001c12 <managePulsanti+0x282>
case 0x08://tlc1
if(rtTLC==0)stPulsanti|=M1FW;
8001b52: 4b36 ldr r3, [pc, #216] @ (8001c2c <managePulsanti+0x29c>)
8001b54: 781b ldrb r3, [r3, #0]
8001b56: b2db uxtb r3, r3
8001b58: 2b00 cmp r3, #0
8001b5a: d14f bne.n 8001bfc <managePulsanti+0x26c>
8001b5c: 4b31 ldr r3, [pc, #196] @ (8001c24 <managePulsanti+0x294>)
8001b5e: 881b ldrh r3, [r3, #0]
8001b60: f043 0310 orr.w r3, r3, #16
8001b64: b29a uxth r2, r3
8001b66: 4b2f ldr r3, [pc, #188] @ (8001c24 <managePulsanti+0x294>)
8001b68: 801a strh r2, [r3, #0]
break;
8001b6a: e047 b.n 8001bfc <managePulsanti+0x26c>
case 0x10://tlc2
if(rtTLC==0)stPulsanti|=M1BW;
8001b6c: 4b2f ldr r3, [pc, #188] @ (8001c2c <managePulsanti+0x29c>)
8001b6e: 781b ldrb r3, [r3, #0]
8001b70: b2db uxtb r3, r3
8001b72: 2b00 cmp r3, #0
8001b74: d144 bne.n 8001c00 <managePulsanti+0x270>
8001b76: 4b2b ldr r3, [pc, #172] @ (8001c24 <managePulsanti+0x294>)
8001b78: 881b ldrh r3, [r3, #0]
8001b7a: f043 0320 orr.w r3, r3, #32
8001b7e: b29a uxth r2, r3
8001b80: 4b28 ldr r3, [pc, #160] @ (8001c24 <managePulsanti+0x294>)
8001b82: 801a strh r2, [r3, #0]
break;
8001b84: e03c b.n 8001c00 <managePulsanti+0x270>
case 0x20://tlc3
if(rtTLC==0)stPulsanti|=M3FW;
8001b86: 4b29 ldr r3, [pc, #164] @ (8001c2c <managePulsanti+0x29c>)
8001b88: 781b ldrb r3, [r3, #0]
8001b8a: b2db uxtb r3, r3
8001b8c: 2b00 cmp r3, #0
8001b8e: d139 bne.n 8001c04 <managePulsanti+0x274>
8001b90: 4b24 ldr r3, [pc, #144] @ (8001c24 <managePulsanti+0x294>)
8001b92: 881b ldrh r3, [r3, #0]
8001b94: f443 7380 orr.w r3, r3, #256 @ 0x100
8001b98: b29a uxth r2, r3
8001b9a: 4b22 ldr r3, [pc, #136] @ (8001c24 <managePulsanti+0x294>)
8001b9c: 801a strh r2, [r3, #0]
break;
8001b9e: e031 b.n 8001c04 <managePulsanti+0x274>
case 0x04://tlc4
if(rtTLC==0)stPulsanti|=M3BW;
8001ba0: 4b22 ldr r3, [pc, #136] @ (8001c2c <managePulsanti+0x29c>)
8001ba2: 781b ldrb r3, [r3, #0]
8001ba4: b2db uxtb r3, r3
8001ba6: 2b00 cmp r3, #0
8001ba8: d12e bne.n 8001c08 <managePulsanti+0x278>
8001baa: 4b1e ldr r3, [pc, #120] @ (8001c24 <managePulsanti+0x294>)
8001bac: 881b ldrh r3, [r3, #0]
8001bae: f443 7300 orr.w r3, r3, #512 @ 0x200
8001bb2: b29a uxth r2, r3
8001bb4: 4b1b ldr r3, [pc, #108] @ (8001c24 <managePulsanti+0x294>)
8001bb6: 801a strh r2, [r3, #0]
break;
8001bb8: e026 b.n 8001c08 <managePulsanti+0x278>
case 0x30://tlc5
if(rtTLC==0)stPulsanti|=M4FW;
8001bba: 4b1c ldr r3, [pc, #112] @ (8001c2c <managePulsanti+0x29c>)
8001bbc: 781b ldrb r3, [r3, #0]
8001bbe: b2db uxtb r3, r3
8001bc0: 2b00 cmp r3, #0
8001bc2: d123 bne.n 8001c0c <managePulsanti+0x27c>
8001bc4: 4b17 ldr r3, [pc, #92] @ (8001c24 <managePulsanti+0x294>)
8001bc6: 881b ldrh r3, [r3, #0]
8001bc8: f443 6380 orr.w r3, r3, #1024 @ 0x400
8001bcc: b29a uxth r2, r3
8001bce: 4b15 ldr r3, [pc, #84] @ (8001c24 <managePulsanti+0x294>)
8001bd0: 801a strh r2, [r3, #0]
break;
8001bd2: e01b b.n 8001c0c <managePulsanti+0x27c>
case 0x0c://tlc6
if(rtTLC==0)stPulsanti|=M4BW;
8001bd4: 4b15 ldr r3, [pc, #84] @ (8001c2c <managePulsanti+0x29c>)
8001bd6: 781b ldrb r3, [r3, #0]
8001bd8: b2db uxtb r3, r3
8001bda: 2b00 cmp r3, #0
8001bdc: d118 bne.n 8001c10 <managePulsanti+0x280>
8001bde: 4b11 ldr r3, [pc, #68] @ (8001c24 <managePulsanti+0x294>)
8001be0: 881b ldrh r3, [r3, #0]
8001be2: f443 6300 orr.w r3, r3, #2048 @ 0x800
8001be6: b29a uxth r2, r3
8001be8: 4b0e ldr r3, [pc, #56] @ (8001c24 <managePulsanti+0x294>)
8001bea: 801a strh r2, [r3, #0]
break;
8001bec: e010 b.n 8001c10 <managePulsanti+0x280>
default:
rtTLC=100;
8001bee: 4b0f ldr r3, [pc, #60] @ (8001c2c <managePulsanti+0x29c>)
8001bf0: 2264 movs r2, #100 @ 0x64
8001bf2: 701a strb r2, [r3, #0]
stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW));
8001bf4: 4b0b ldr r3, [pc, #44] @ (8001c24 <managePulsanti+0x294>)
8001bf6: 2200 movs r2, #0
8001bf8: 801a strh r2, [r3, #0]
break;
8001bfa: e00a b.n 8001c12 <managePulsanti+0x282>
break;
8001bfc: bf00 nop
8001bfe: e008 b.n 8001c12 <managePulsanti+0x282>
break;
8001c00: bf00 nop
8001c02: e006 b.n 8001c12 <managePulsanti+0x282>
break;
8001c04: bf00 nop
8001c06: e004 b.n 8001c12 <managePulsanti+0x282>
break;
8001c08: bf00 nop
8001c0a: e002 b.n 8001c12 <managePulsanti+0x282>
break;
8001c0c: bf00 nop
8001c0e: e000 b.n 8001c12 <managePulsanti+0x282>
break;
8001c10: bf00 nop
}
}
}
8001c12: bf00 nop
8001c14: 46bd mov sp, r7
8001c16: bc80 pop {r7}
8001c18: 4770 bx lr
8001c1a: bf00 nop
8001c1c: 200003e8 .word 0x200003e8
8001c20: 20000004 .word 0x20000004
8001c24: 20000444 .word 0x20000444
8001c28: 20000005 .word 0x20000005
8001c2c: 20000006 .word 0x20000006
08001c30 <manageCiclo>:
void manageCiclo(void){
8001c30: b580 push {r7, lr}
8001c32: b082 sub sp, #8
8001c34: af02 add r7, sp, #8
switch(stCiclo){
8001c36: 4b9b ldr r3, [pc, #620] @ (8001ea4 <manageCiclo+0x274>)
8001c38: 781b ldrb r3, [r3, #0]
8001c3a: 2b16 cmp r3, #22
8001c3c: f200 8505 bhi.w 800264a <manageCiclo+0xa1a>
8001c40: a201 add r2, pc, #4 @ (adr r2, 8001c48 <manageCiclo+0x18>)
8001c42: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8001c46: bf00 nop
8001c48: 08001ca5 .word 0x08001ca5
8001c4c: 08001cef .word 0x08001cef
8001c50: 08001d39 .word 0x08001d39
8001c54: 08001d83 .word 0x08001d83
8001c58: 08001dcd .word 0x08001dcd
8001c5c: 08001e15 .word 0x08001e15
8001c60: 08001e5d .word 0x08001e5d
8001c64: 08001ed1 .word 0x08001ed1
8001c68: 08001f19 .word 0x08001f19
8001c6c: 08001f61 .word 0x08001f61
8001c70: 08001fa9 .word 0x08001fa9
8001c74: 08001ff1 .word 0x08001ff1
8001c78: 08002039 .word 0x08002039
8001c7c: 08002081 .word 0x08002081
8001c80: 080020c9 .word 0x080020c9
8001c84: 0800213d .word 0x0800213d
8001c88: 08002185 .word 0x08002185
8001c8c: 080021cd .word 0x080021cd
8001c90: 08002235 .word 0x08002235
8001c94: 0800228f .word 0x0800228f
8001c98: 080022dd .word 0x080022dd
8001c9c: 08002553 .word 0x08002553
8001ca0: 080025a5 .word 0x080025a5
case omchiuso:
if(stPulsanti&P1START){
8001ca4: 4b80 ldr r3, [pc, #512] @ (8001ea8 <manageCiclo+0x278>)
8001ca6: 881b ldrh r3, [r3, #0]
8001ca8: f003 0301 and.w r3, r3, #1
8001cac: 2b00 cmp r3, #0
8001cae: d012 beq.n 8001cd6 <manageCiclo+0xa6>
stBuz=bzwarning;
8001cb0: 4b7e ldr r3, [pc, #504] @ (8001eac <manageCiclo+0x27c>)
8001cb2: 2202 movs r2, #2
8001cb4: 701a strb r2, [r3, #0]
rtCiclo=0;
8001cb6: 4b7e ldr r3, [pc, #504] @ (8001eb0 <manageCiclo+0x280>)
8001cb8: 2200 movs r2, #0
8001cba: 801a strh r2, [r3, #0]
stCiclo=omapertura0;
8001cbc: 4b79 ldr r3, [pc, #484] @ (8001ea4 <manageCiclo+0x274>)
8001cbe: 2212 movs r2, #18
8001cc0: 701a strb r2, [r3, #0]
(void)m1ap();(void)m2ap();(void)m3ap();(void)m4ap();
8001cc2: f001 f841 bl 8002d48 <m1ap>
8001cc6: f001 f8ed bl 8002ea4 <m2ap>
8001cca: f001 f999 bl 8003000 <m3ap>
8001cce: f001 fa47 bl 8003160 <m4ap>
}else if(stPulsanti&P1STOP)stCiclo=omstopapertura;
break;
8001cd2: f000 bc8d b.w 80025f0 <manageCiclo+0x9c0>
}else if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8001cd6: 4b74 ldr r3, [pc, #464] @ (8001ea8 <manageCiclo+0x278>)
8001cd8: 881b ldrh r3, [r3, #0]
8001cda: f003 0302 and.w r3, r3, #2
8001cde: 2b00 cmp r3, #0
8001ce0: f000 8486 beq.w 80025f0 <manageCiclo+0x9c0>
8001ce4: 4b6f ldr r3, [pc, #444] @ (8001ea4 <manageCiclo+0x274>)
8001ce6: 2213 movs r2, #19
8001ce8: 701a strb r2, [r3, #0]
break;
8001cea: f000 bc81 b.w 80025f0 <manageCiclo+0x9c0>
case omM1fw1:
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8001cee: 4b71 ldr r3, [pc, #452] @ (8001eb4 <manageCiclo+0x284>)
8001cf0: 881b ldrh r3, [r3, #0]
8001cf2: b2da uxtb r2, r3
8001cf4: 4b70 ldr r3, [pc, #448] @ (8001eb8 <manageCiclo+0x288>)
8001cf6: 881b ldrh r3, [r3, #0]
8001cf8: b2d9 uxtb r1, r3
8001cfa: 4b70 ldr r3, [pc, #448] @ (8001ebc <manageCiclo+0x28c>)
8001cfc: 881b ldrh r3, [r3, #0]
8001cfe: b2db uxtb r3, r3
8001d00: 200a movs r0, #10
8001d02: 9001 str r0, [sp, #4]
8001d04: 9300 str r3, [sp, #0]
8001d06: 460b mov r3, r1
8001d08: 2100 movs r1, #0
8001d0a: 2001 movs r0, #1
8001d0c: f002 f8fc bl 8003f08 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8001d10: 4b67 ldr r3, [pc, #412] @ (8001eb0 <manageCiclo+0x280>)
8001d12: 881b ldrh r3, [r3, #0]
8001d14: b29a uxth r2, r3
8001d16: 4b6a ldr r3, [pc, #424] @ (8001ec0 <manageCiclo+0x290>)
8001d18: 881b ldrh r3, [r3, #0]
8001d1a: 429a cmp r2, r3
8001d1c: d302 bcc.n 8001d24 <manageCiclo+0xf4>
8001d1e: 4b61 ldr r3, [pc, #388] @ (8001ea4 <manageCiclo+0x274>)
8001d20: 2211 movs r2, #17
8001d22: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM1fw2;
8001d24: 4b67 ldr r3, [pc, #412] @ (8001ec4 <manageCiclo+0x294>)
8001d26: 781b ldrb r3, [r3, #0]
8001d28: 2b00 cmp r3, #0
8001d2a: f040 8463 bne.w 80025f4 <manageCiclo+0x9c4>
8001d2e: 4b5d ldr r3, [pc, #372] @ (8001ea4 <manageCiclo+0x274>)
8001d30: 2202 movs r2, #2
8001d32: 701a strb r2, [r3, #0]
break;
8001d34: f000 bc5e b.w 80025f4 <manageCiclo+0x9c4>
case omM1fw2:
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8001d38: 4b5e ldr r3, [pc, #376] @ (8001eb4 <manageCiclo+0x284>)
8001d3a: 881b ldrh r3, [r3, #0]
8001d3c: b2da uxtb r2, r3
8001d3e: 4b5e ldr r3, [pc, #376] @ (8001eb8 <manageCiclo+0x288>)
8001d40: 881b ldrh r3, [r3, #0]
8001d42: b2d9 uxtb r1, r3
8001d44: 4b5d ldr r3, [pc, #372] @ (8001ebc <manageCiclo+0x28c>)
8001d46: 881b ldrh r3, [r3, #0]
8001d48: b2db uxtb r3, r3
8001d4a: 200a movs r0, #10
8001d4c: 9001 str r0, [sp, #4]
8001d4e: 9300 str r3, [sp, #0]
8001d50: 460b mov r3, r1
8001d52: 2100 movs r1, #0
8001d54: 2001 movs r0, #1
8001d56: f002 f8d7 bl 8003f08 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8001d5a: 4b55 ldr r3, [pc, #340] @ (8001eb0 <manageCiclo+0x280>)
8001d5c: 881b ldrh r3, [r3, #0]
8001d5e: b29a uxth r2, r3
8001d60: 4b57 ldr r3, [pc, #348] @ (8001ec0 <manageCiclo+0x290>)
8001d62: 881b ldrh r3, [r3, #0]
8001d64: 429a cmp r2, r3
8001d66: d302 bcc.n 8001d6e <manageCiclo+0x13e>
8001d68: 4b4e ldr r3, [pc, #312] @ (8001ea4 <manageCiclo+0x274>)
8001d6a: 2211 movs r2, #17
8001d6c: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8001d6e: 4b55 ldr r3, [pc, #340] @ (8001ec4 <manageCiclo+0x294>)
8001d70: 781b ldrb r3, [r3, #0]
8001d72: 2b00 cmp r3, #0
8001d74: f000 8440 beq.w 80025f8 <manageCiclo+0x9c8>
8001d78: 4b4a ldr r3, [pc, #296] @ (8001ea4 <manageCiclo+0x274>)
8001d7a: 2211 movs r2, #17
8001d7c: 701a strb r2, [r3, #0]
break;
8001d7e: f000 bc3b b.w 80025f8 <manageCiclo+0x9c8>
case omM1bw1:
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8001d82: 4b4c ldr r3, [pc, #304] @ (8001eb4 <manageCiclo+0x284>)
8001d84: 881b ldrh r3, [r3, #0]
8001d86: b2da uxtb r2, r3
8001d88: 4b4b ldr r3, [pc, #300] @ (8001eb8 <manageCiclo+0x288>)
8001d8a: 881b ldrh r3, [r3, #0]
8001d8c: b2d9 uxtb r1, r3
8001d8e: 4b4b ldr r3, [pc, #300] @ (8001ebc <manageCiclo+0x28c>)
8001d90: 881b ldrh r3, [r3, #0]
8001d92: b2db uxtb r3, r3
8001d94: 200a movs r0, #10
8001d96: 9001 str r0, [sp, #4]
8001d98: 9300 str r3, [sp, #0]
8001d9a: 460b mov r3, r1
8001d9c: 2101 movs r1, #1
8001d9e: 2001 movs r0, #1
8001da0: f002 f8b2 bl 8003f08 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8001da4: 4b42 ldr r3, [pc, #264] @ (8001eb0 <manageCiclo+0x280>)
8001da6: 881b ldrh r3, [r3, #0]
8001da8: b29a uxth r2, r3
8001daa: 4b45 ldr r3, [pc, #276] @ (8001ec0 <manageCiclo+0x290>)
8001dac: 881b ldrh r3, [r3, #0]
8001dae: 429a cmp r2, r3
8001db0: d302 bcc.n 8001db8 <manageCiclo+0x188>
8001db2: 4b3c ldr r3, [pc, #240] @ (8001ea4 <manageCiclo+0x274>)
8001db4: 2211 movs r2, #17
8001db6: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM1bw2;
8001db8: 4b42 ldr r3, [pc, #264] @ (8001ec4 <manageCiclo+0x294>)
8001dba: 781b ldrb r3, [r3, #0]
8001dbc: 2b00 cmp r3, #0
8001dbe: f040 841d bne.w 80025fc <manageCiclo+0x9cc>
8001dc2: 4b38 ldr r3, [pc, #224] @ (8001ea4 <manageCiclo+0x274>)
8001dc4: 2204 movs r2, #4
8001dc6: 701a strb r2, [r3, #0]
break;
8001dc8: f000 bc18 b.w 80025fc <manageCiclo+0x9cc>
case omM1bw2:
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8001dcc: 4b39 ldr r3, [pc, #228] @ (8001eb4 <manageCiclo+0x284>)
8001dce: 881b ldrh r3, [r3, #0]
8001dd0: b2da uxtb r2, r3
8001dd2: 4b39 ldr r3, [pc, #228] @ (8001eb8 <manageCiclo+0x288>)
8001dd4: 881b ldrh r3, [r3, #0]
8001dd6: b2d9 uxtb r1, r3
8001dd8: 4b38 ldr r3, [pc, #224] @ (8001ebc <manageCiclo+0x28c>)
8001dda: 881b ldrh r3, [r3, #0]
8001ddc: b2db uxtb r3, r3
8001dde: 200a movs r0, #10
8001de0: 9001 str r0, [sp, #4]
8001de2: 9300 str r3, [sp, #0]
8001de4: 460b mov r3, r1
8001de6: 2101 movs r1, #1
8001de8: 2001 movs r0, #1
8001dea: f002 f88d bl 8003f08 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8001dee: 4b30 ldr r3, [pc, #192] @ (8001eb0 <manageCiclo+0x280>)
8001df0: 881b ldrh r3, [r3, #0]
8001df2: b29a uxth r2, r3
8001df4: 4b32 ldr r3, [pc, #200] @ (8001ec0 <manageCiclo+0x290>)
8001df6: 881b ldrh r3, [r3, #0]
8001df8: 429a cmp r2, r3
8001dfa: d302 bcc.n 8001e02 <manageCiclo+0x1d2>
8001dfc: 4b29 ldr r3, [pc, #164] @ (8001ea4 <manageCiclo+0x274>)
8001dfe: 2211 movs r2, #17
8001e00: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8001e02: 4b30 ldr r3, [pc, #192] @ (8001ec4 <manageCiclo+0x294>)
8001e04: 781b ldrb r3, [r3, #0]
8001e06: 2b00 cmp r3, #0
8001e08: f000 83fa beq.w 8002600 <manageCiclo+0x9d0>
8001e0c: 4b25 ldr r3, [pc, #148] @ (8001ea4 <manageCiclo+0x274>)
8001e0e: 2211 movs r2, #17
8001e10: 701a strb r2, [r3, #0]
break;
8001e12: e3f5 b.n 8002600 <manageCiclo+0x9d0>
case omM2fw1:
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
8001e14: 4b27 ldr r3, [pc, #156] @ (8001eb4 <manageCiclo+0x284>)
8001e16: 885b ldrh r3, [r3, #2]
8001e18: b2da uxtb r2, r3
8001e1a: 4b2b ldr r3, [pc, #172] @ (8001ec8 <manageCiclo+0x298>)
8001e1c: 881b ldrh r3, [r3, #0]
8001e1e: b2d9 uxtb r1, r3
8001e20: 4b26 ldr r3, [pc, #152] @ (8001ebc <manageCiclo+0x28c>)
8001e22: 881b ldrh r3, [r3, #0]
8001e24: b2db uxtb r3, r3
8001e26: 200a movs r0, #10
8001e28: 9001 str r0, [sp, #4]
8001e2a: 9300 str r3, [sp, #0]
8001e2c: 460b mov r3, r1
8001e2e: 2100 movs r1, #0
8001e30: 2002 movs r0, #2
8001e32: f002 f869 bl 8003f08 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
8001e36: 4b1e ldr r3, [pc, #120] @ (8001eb0 <manageCiclo+0x280>)
8001e38: 881b ldrh r3, [r3, #0]
8001e3a: b29a uxth r2, r3
8001e3c: 4b23 ldr r3, [pc, #140] @ (8001ecc <manageCiclo+0x29c>)
8001e3e: 881b ldrh r3, [r3, #0]
8001e40: 429a cmp r2, r3
8001e42: d302 bcc.n 8001e4a <manageCiclo+0x21a>
8001e44: 4b17 ldr r3, [pc, #92] @ (8001ea4 <manageCiclo+0x274>)
8001e46: 2211 movs r2, #17
8001e48: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM2fw2;
8001e4a: 4b1e ldr r3, [pc, #120] @ (8001ec4 <manageCiclo+0x294>)
8001e4c: 781b ldrb r3, [r3, #0]
8001e4e: 2b00 cmp r3, #0
8001e50: f040 83d8 bne.w 8002604 <manageCiclo+0x9d4>
8001e54: 4b13 ldr r3, [pc, #76] @ (8001ea4 <manageCiclo+0x274>)
8001e56: 2206 movs r2, #6
8001e58: 701a strb r2, [r3, #0]
break;
8001e5a: e3d3 b.n 8002604 <manageCiclo+0x9d4>
case omM2fw2:
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
8001e5c: 4b15 ldr r3, [pc, #84] @ (8001eb4 <manageCiclo+0x284>)
8001e5e: 885b ldrh r3, [r3, #2]
8001e60: b2da uxtb r2, r3
8001e62: 4b19 ldr r3, [pc, #100] @ (8001ec8 <manageCiclo+0x298>)
8001e64: 881b ldrh r3, [r3, #0]
8001e66: b2d9 uxtb r1, r3
8001e68: 4b14 ldr r3, [pc, #80] @ (8001ebc <manageCiclo+0x28c>)
8001e6a: 881b ldrh r3, [r3, #0]
8001e6c: b2db uxtb r3, r3
8001e6e: 200a movs r0, #10
8001e70: 9001 str r0, [sp, #4]
8001e72: 9300 str r3, [sp, #0]
8001e74: 460b mov r3, r1
8001e76: 2100 movs r1, #0
8001e78: 2002 movs r0, #2
8001e7a: f002 f845 bl 8003f08 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
8001e7e: 4b0c ldr r3, [pc, #48] @ (8001eb0 <manageCiclo+0x280>)
8001e80: 881b ldrh r3, [r3, #0]
8001e82: b29a uxth r2, r3
8001e84: 4b11 ldr r3, [pc, #68] @ (8001ecc <manageCiclo+0x29c>)
8001e86: 881b ldrh r3, [r3, #0]
8001e88: 429a cmp r2, r3
8001e8a: d302 bcc.n 8001e92 <manageCiclo+0x262>
8001e8c: 4b05 ldr r3, [pc, #20] @ (8001ea4 <manageCiclo+0x274>)
8001e8e: 2211 movs r2, #17
8001e90: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8001e92: 4b0c ldr r3, [pc, #48] @ (8001ec4 <manageCiclo+0x294>)
8001e94: 781b ldrb r3, [r3, #0]
8001e96: 2b00 cmp r3, #0
8001e98: f000 83b6 beq.w 8002608 <manageCiclo+0x9d8>
8001e9c: 4b01 ldr r3, [pc, #4] @ (8001ea4 <manageCiclo+0x274>)
8001e9e: 2211 movs r2, #17
8001ea0: 701a strb r2, [r3, #0]
break;
8001ea2: e3b1 b.n 8002608 <manageCiclo+0x9d8>
8001ea4: 20000446 .word 0x20000446
8001ea8: 20000444 .word 0x20000444
8001eac: 20000447 .word 0x20000447
8001eb0: 200003f4 .word 0x200003f4
8001eb4: 2000043c .word 0x2000043c
8001eb8: 20000414 .word 0x20000414
8001ebc: 20000412 .word 0x20000412
8001ec0: 20000406 .word 0x20000406
8001ec4: 200003e8 .word 0x200003e8
8001ec8: 20000416 .word 0x20000416
8001ecc: 20000408 .word 0x20000408
case omM2bw1:
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
8001ed0: 4b8f ldr r3, [pc, #572] @ (8002110 <manageCiclo+0x4e0>)
8001ed2: 885b ldrh r3, [r3, #2]
8001ed4: b2da uxtb r2, r3
8001ed6: 4b8f ldr r3, [pc, #572] @ (8002114 <manageCiclo+0x4e4>)
8001ed8: 881b ldrh r3, [r3, #0]
8001eda: b2d9 uxtb r1, r3
8001edc: 4b8e ldr r3, [pc, #568] @ (8002118 <manageCiclo+0x4e8>)
8001ede: 881b ldrh r3, [r3, #0]
8001ee0: b2db uxtb r3, r3
8001ee2: 200a movs r0, #10
8001ee4: 9001 str r0, [sp, #4]
8001ee6: 9300 str r3, [sp, #0]
8001ee8: 460b mov r3, r1
8001eea: 2101 movs r1, #1
8001eec: 2002 movs r0, #2
8001eee: f002 f80b bl 8003f08 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
8001ef2: 4b8a ldr r3, [pc, #552] @ (800211c <manageCiclo+0x4ec>)
8001ef4: 881b ldrh r3, [r3, #0]
8001ef6: b29a uxth r2, r3
8001ef8: 4b89 ldr r3, [pc, #548] @ (8002120 <manageCiclo+0x4f0>)
8001efa: 881b ldrh r3, [r3, #0]
8001efc: 429a cmp r2, r3
8001efe: d302 bcc.n 8001f06 <manageCiclo+0x2d6>
8001f00: 4b88 ldr r3, [pc, #544] @ (8002124 <manageCiclo+0x4f4>)
8001f02: 2211 movs r2, #17
8001f04: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM2bw2;
8001f06: 4b88 ldr r3, [pc, #544] @ (8002128 <manageCiclo+0x4f8>)
8001f08: 781b ldrb r3, [r3, #0]
8001f0a: 2b00 cmp r3, #0
8001f0c: f040 837e bne.w 800260c <manageCiclo+0x9dc>
8001f10: 4b84 ldr r3, [pc, #528] @ (8002124 <manageCiclo+0x4f4>)
8001f12: 2208 movs r2, #8
8001f14: 701a strb r2, [r3, #0]
break;
8001f16: e379 b.n 800260c <manageCiclo+0x9dc>
case omM2bw2:
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
8001f18: 4b7d ldr r3, [pc, #500] @ (8002110 <manageCiclo+0x4e0>)
8001f1a: 885b ldrh r3, [r3, #2]
8001f1c: b2da uxtb r2, r3
8001f1e: 4b7d ldr r3, [pc, #500] @ (8002114 <manageCiclo+0x4e4>)
8001f20: 881b ldrh r3, [r3, #0]
8001f22: b2d9 uxtb r1, r3
8001f24: 4b7c ldr r3, [pc, #496] @ (8002118 <manageCiclo+0x4e8>)
8001f26: 881b ldrh r3, [r3, #0]
8001f28: b2db uxtb r3, r3
8001f2a: 200a movs r0, #10
8001f2c: 9001 str r0, [sp, #4]
8001f2e: 9300 str r3, [sp, #0]
8001f30: 460b mov r3, r1
8001f32: 2101 movs r1, #1
8001f34: 2002 movs r0, #2
8001f36: f001 ffe7 bl 8003f08 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
8001f3a: 4b78 ldr r3, [pc, #480] @ (800211c <manageCiclo+0x4ec>)
8001f3c: 881b ldrh r3, [r3, #0]
8001f3e: b29a uxth r2, r3
8001f40: 4b77 ldr r3, [pc, #476] @ (8002120 <manageCiclo+0x4f0>)
8001f42: 881b ldrh r3, [r3, #0]
8001f44: 429a cmp r2, r3
8001f46: d302 bcc.n 8001f4e <manageCiclo+0x31e>
8001f48: 4b76 ldr r3, [pc, #472] @ (8002124 <manageCiclo+0x4f4>)
8001f4a: 2211 movs r2, #17
8001f4c: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8001f4e: 4b76 ldr r3, [pc, #472] @ (8002128 <manageCiclo+0x4f8>)
8001f50: 781b ldrb r3, [r3, #0]
8001f52: 2b00 cmp r3, #0
8001f54: f000 835c beq.w 8002610 <manageCiclo+0x9e0>
8001f58: 4b72 ldr r3, [pc, #456] @ (8002124 <manageCiclo+0x4f4>)
8001f5a: 2211 movs r2, #17
8001f5c: 701a strb r2, [r3, #0]
break;
8001f5e: e357 b.n 8002610 <manageCiclo+0x9e0>
case omM3fw1:
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
8001f60: 4b6b ldr r3, [pc, #428] @ (8002110 <manageCiclo+0x4e0>)
8001f62: 889b ldrh r3, [r3, #4]
8001f64: b2da uxtb r2, r3
8001f66: 4b71 ldr r3, [pc, #452] @ (800212c <manageCiclo+0x4fc>)
8001f68: 881b ldrh r3, [r3, #0]
8001f6a: b2d9 uxtb r1, r3
8001f6c: 4b6a ldr r3, [pc, #424] @ (8002118 <manageCiclo+0x4e8>)
8001f6e: 881b ldrh r3, [r3, #0]
8001f70: b2db uxtb r3, r3
8001f72: 200a movs r0, #10
8001f74: 9001 str r0, [sp, #4]
8001f76: 9300 str r3, [sp, #0]
8001f78: 460b mov r3, r1
8001f7a: 2100 movs r1, #0
8001f7c: 2003 movs r0, #3
8001f7e: f001 ffc3 bl 8003f08 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
8001f82: 4b66 ldr r3, [pc, #408] @ (800211c <manageCiclo+0x4ec>)
8001f84: 881b ldrh r3, [r3, #0]
8001f86: b29a uxth r2, r3
8001f88: 4b69 ldr r3, [pc, #420] @ (8002130 <manageCiclo+0x500>)
8001f8a: 881b ldrh r3, [r3, #0]
8001f8c: 429a cmp r2, r3
8001f8e: d302 bcc.n 8001f96 <manageCiclo+0x366>
8001f90: 4b64 ldr r3, [pc, #400] @ (8002124 <manageCiclo+0x4f4>)
8001f92: 2211 movs r2, #17
8001f94: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM3fw2;
8001f96: 4b64 ldr r3, [pc, #400] @ (8002128 <manageCiclo+0x4f8>)
8001f98: 781b ldrb r3, [r3, #0]
8001f9a: 2b00 cmp r3, #0
8001f9c: f040 833a bne.w 8002614 <manageCiclo+0x9e4>
8001fa0: 4b60 ldr r3, [pc, #384] @ (8002124 <manageCiclo+0x4f4>)
8001fa2: 220a movs r2, #10
8001fa4: 701a strb r2, [r3, #0]
break;
8001fa6: e335 b.n 8002614 <manageCiclo+0x9e4>
case omM3fw2:
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
8001fa8: 4b59 ldr r3, [pc, #356] @ (8002110 <manageCiclo+0x4e0>)
8001faa: 889b ldrh r3, [r3, #4]
8001fac: b2da uxtb r2, r3
8001fae: 4b5f ldr r3, [pc, #380] @ (800212c <manageCiclo+0x4fc>)
8001fb0: 881b ldrh r3, [r3, #0]
8001fb2: b2d9 uxtb r1, r3
8001fb4: 4b58 ldr r3, [pc, #352] @ (8002118 <manageCiclo+0x4e8>)
8001fb6: 881b ldrh r3, [r3, #0]
8001fb8: b2db uxtb r3, r3
8001fba: 200a movs r0, #10
8001fbc: 9001 str r0, [sp, #4]
8001fbe: 9300 str r3, [sp, #0]
8001fc0: 460b mov r3, r1
8001fc2: 2100 movs r1, #0
8001fc4: 2003 movs r0, #3
8001fc6: f001 ff9f bl 8003f08 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
8001fca: 4b54 ldr r3, [pc, #336] @ (800211c <manageCiclo+0x4ec>)
8001fcc: 881b ldrh r3, [r3, #0]
8001fce: b29a uxth r2, r3
8001fd0: 4b57 ldr r3, [pc, #348] @ (8002130 <manageCiclo+0x500>)
8001fd2: 881b ldrh r3, [r3, #0]
8001fd4: 429a cmp r2, r3
8001fd6: d302 bcc.n 8001fde <manageCiclo+0x3ae>
8001fd8: 4b52 ldr r3, [pc, #328] @ (8002124 <manageCiclo+0x4f4>)
8001fda: 2211 movs r2, #17
8001fdc: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8001fde: 4b52 ldr r3, [pc, #328] @ (8002128 <manageCiclo+0x4f8>)
8001fe0: 781b ldrb r3, [r3, #0]
8001fe2: 2b00 cmp r3, #0
8001fe4: f000 8318 beq.w 8002618 <manageCiclo+0x9e8>
8001fe8: 4b4e ldr r3, [pc, #312] @ (8002124 <manageCiclo+0x4f4>)
8001fea: 2211 movs r2, #17
8001fec: 701a strb r2, [r3, #0]
break;
8001fee: e313 b.n 8002618 <manageCiclo+0x9e8>
case omM3bw1:
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
8001ff0: 4b47 ldr r3, [pc, #284] @ (8002110 <manageCiclo+0x4e0>)
8001ff2: 889b ldrh r3, [r3, #4]
8001ff4: b2da uxtb r2, r3
8001ff6: 4b4d ldr r3, [pc, #308] @ (800212c <manageCiclo+0x4fc>)
8001ff8: 881b ldrh r3, [r3, #0]
8001ffa: b2d9 uxtb r1, r3
8001ffc: 4b46 ldr r3, [pc, #280] @ (8002118 <manageCiclo+0x4e8>)
8001ffe: 881b ldrh r3, [r3, #0]
8002000: b2db uxtb r3, r3
8002002: 200a movs r0, #10
8002004: 9001 str r0, [sp, #4]
8002006: 9300 str r3, [sp, #0]
8002008: 460b mov r3, r1
800200a: 2101 movs r1, #1
800200c: 2003 movs r0, #3
800200e: f001 ff7b bl 8003f08 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
8002012: 4b42 ldr r3, [pc, #264] @ (800211c <manageCiclo+0x4ec>)
8002014: 881b ldrh r3, [r3, #0]
8002016: b29a uxth r2, r3
8002018: 4b45 ldr r3, [pc, #276] @ (8002130 <manageCiclo+0x500>)
800201a: 881b ldrh r3, [r3, #0]
800201c: 429a cmp r2, r3
800201e: d302 bcc.n 8002026 <manageCiclo+0x3f6>
8002020: 4b40 ldr r3, [pc, #256] @ (8002124 <manageCiclo+0x4f4>)
8002022: 2211 movs r2, #17
8002024: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM3bw2;
8002026: 4b40 ldr r3, [pc, #256] @ (8002128 <manageCiclo+0x4f8>)
8002028: 781b ldrb r3, [r3, #0]
800202a: 2b00 cmp r3, #0
800202c: f040 82f6 bne.w 800261c <manageCiclo+0x9ec>
8002030: 4b3c ldr r3, [pc, #240] @ (8002124 <manageCiclo+0x4f4>)
8002032: 220c movs r2, #12
8002034: 701a strb r2, [r3, #0]
break;
8002036: e2f1 b.n 800261c <manageCiclo+0x9ec>
case omM3bw2:
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
8002038: 4b35 ldr r3, [pc, #212] @ (8002110 <manageCiclo+0x4e0>)
800203a: 889b ldrh r3, [r3, #4]
800203c: b2da uxtb r2, r3
800203e: 4b3b ldr r3, [pc, #236] @ (800212c <manageCiclo+0x4fc>)
8002040: 881b ldrh r3, [r3, #0]
8002042: b2d9 uxtb r1, r3
8002044: 4b34 ldr r3, [pc, #208] @ (8002118 <manageCiclo+0x4e8>)
8002046: 881b ldrh r3, [r3, #0]
8002048: b2db uxtb r3, r3
800204a: 200a movs r0, #10
800204c: 9001 str r0, [sp, #4]
800204e: 9300 str r3, [sp, #0]
8002050: 460b mov r3, r1
8002052: 2101 movs r1, #1
8002054: 2003 movs r0, #3
8002056: f001 ff57 bl 8003f08 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
800205a: 4b30 ldr r3, [pc, #192] @ (800211c <manageCiclo+0x4ec>)
800205c: 881b ldrh r3, [r3, #0]
800205e: b29a uxth r2, r3
8002060: 4b33 ldr r3, [pc, #204] @ (8002130 <manageCiclo+0x500>)
8002062: 881b ldrh r3, [r3, #0]
8002064: 429a cmp r2, r3
8002066: d302 bcc.n 800206e <manageCiclo+0x43e>
8002068: 4b2e ldr r3, [pc, #184] @ (8002124 <manageCiclo+0x4f4>)
800206a: 2211 movs r2, #17
800206c: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800206e: 4b2e ldr r3, [pc, #184] @ (8002128 <manageCiclo+0x4f8>)
8002070: 781b ldrb r3, [r3, #0]
8002072: 2b00 cmp r3, #0
8002074: f000 82d4 beq.w 8002620 <manageCiclo+0x9f0>
8002078: 4b2a ldr r3, [pc, #168] @ (8002124 <manageCiclo+0x4f4>)
800207a: 2211 movs r2, #17
800207c: 701a strb r2, [r3, #0]
break;
800207e: e2cf b.n 8002620 <manageCiclo+0x9f0>
case omM4fw1:
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002080: 4b23 ldr r3, [pc, #140] @ (8002110 <manageCiclo+0x4e0>)
8002082: 88db ldrh r3, [r3, #6]
8002084: b2da uxtb r2, r3
8002086: 4b2b ldr r3, [pc, #172] @ (8002134 <manageCiclo+0x504>)
8002088: 881b ldrh r3, [r3, #0]
800208a: b2d9 uxtb r1, r3
800208c: 4b22 ldr r3, [pc, #136] @ (8002118 <manageCiclo+0x4e8>)
800208e: 881b ldrh r3, [r3, #0]
8002090: b2db uxtb r3, r3
8002092: 200a movs r0, #10
8002094: 9001 str r0, [sp, #4]
8002096: 9300 str r3, [sp, #0]
8002098: 460b mov r3, r1
800209a: 2100 movs r1, #0
800209c: 2004 movs r0, #4
800209e: f001 ff33 bl 8003f08 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
80020a2: 4b1e ldr r3, [pc, #120] @ (800211c <manageCiclo+0x4ec>)
80020a4: 881b ldrh r3, [r3, #0]
80020a6: b29a uxth r2, r3
80020a8: 4b23 ldr r3, [pc, #140] @ (8002138 <manageCiclo+0x508>)
80020aa: 881b ldrh r3, [r3, #0]
80020ac: 429a cmp r2, r3
80020ae: d302 bcc.n 80020b6 <manageCiclo+0x486>
80020b0: 4b1c ldr r3, [pc, #112] @ (8002124 <manageCiclo+0x4f4>)
80020b2: 2211 movs r2, #17
80020b4: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM4fw2;
80020b6: 4b1c ldr r3, [pc, #112] @ (8002128 <manageCiclo+0x4f8>)
80020b8: 781b ldrb r3, [r3, #0]
80020ba: 2b00 cmp r3, #0
80020bc: f040 82b2 bne.w 8002624 <manageCiclo+0x9f4>
80020c0: 4b18 ldr r3, [pc, #96] @ (8002124 <manageCiclo+0x4f4>)
80020c2: 220e movs r2, #14
80020c4: 701a strb r2, [r3, #0]
break;
80020c6: e2ad b.n 8002624 <manageCiclo+0x9f4>
case omM4fw2:
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
80020c8: 4b11 ldr r3, [pc, #68] @ (8002110 <manageCiclo+0x4e0>)
80020ca: 88db ldrh r3, [r3, #6]
80020cc: b2da uxtb r2, r3
80020ce: 4b19 ldr r3, [pc, #100] @ (8002134 <manageCiclo+0x504>)
80020d0: 881b ldrh r3, [r3, #0]
80020d2: b2d9 uxtb r1, r3
80020d4: 4b10 ldr r3, [pc, #64] @ (8002118 <manageCiclo+0x4e8>)
80020d6: 881b ldrh r3, [r3, #0]
80020d8: b2db uxtb r3, r3
80020da: 200a movs r0, #10
80020dc: 9001 str r0, [sp, #4]
80020de: 9300 str r3, [sp, #0]
80020e0: 460b mov r3, r1
80020e2: 2100 movs r1, #0
80020e4: 2004 movs r0, #4
80020e6: f001 ff0f bl 8003f08 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
80020ea: 4b0c ldr r3, [pc, #48] @ (800211c <manageCiclo+0x4ec>)
80020ec: 881b ldrh r3, [r3, #0]
80020ee: b29a uxth r2, r3
80020f0: 4b11 ldr r3, [pc, #68] @ (8002138 <manageCiclo+0x508>)
80020f2: 881b ldrh r3, [r3, #0]
80020f4: 429a cmp r2, r3
80020f6: d302 bcc.n 80020fe <manageCiclo+0x4ce>
80020f8: 4b0a ldr r3, [pc, #40] @ (8002124 <manageCiclo+0x4f4>)
80020fa: 2211 movs r2, #17
80020fc: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80020fe: 4b0a ldr r3, [pc, #40] @ (8002128 <manageCiclo+0x4f8>)
8002100: 781b ldrb r3, [r3, #0]
8002102: 2b00 cmp r3, #0
8002104: f000 8290 beq.w 8002628 <manageCiclo+0x9f8>
8002108: 4b06 ldr r3, [pc, #24] @ (8002124 <manageCiclo+0x4f4>)
800210a: 2211 movs r2, #17
800210c: 701a strb r2, [r3, #0]
break;
800210e: e28b b.n 8002628 <manageCiclo+0x9f8>
8002110: 2000043c .word 0x2000043c
8002114: 20000416 .word 0x20000416
8002118: 20000412 .word 0x20000412
800211c: 200003f4 .word 0x200003f4
8002120: 20000408 .word 0x20000408
8002124: 20000446 .word 0x20000446
8002128: 200003e8 .word 0x200003e8
800212c: 20000418 .word 0x20000418
8002130: 2000040a .word 0x2000040a
8002134: 2000041a .word 0x2000041a
8002138: 2000040c .word 0x2000040c
case omM4bw1:
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
800213c: 4b9e ldr r3, [pc, #632] @ (80023b8 <manageCiclo+0x788>)
800213e: 88db ldrh r3, [r3, #6]
8002140: b2da uxtb r2, r3
8002142: 4b9e ldr r3, [pc, #632] @ (80023bc <manageCiclo+0x78c>)
8002144: 881b ldrh r3, [r3, #0]
8002146: b2d9 uxtb r1, r3
8002148: 4b9d ldr r3, [pc, #628] @ (80023c0 <manageCiclo+0x790>)
800214a: 881b ldrh r3, [r3, #0]
800214c: b2db uxtb r3, r3
800214e: 200a movs r0, #10
8002150: 9001 str r0, [sp, #4]
8002152: 9300 str r3, [sp, #0]
8002154: 460b mov r3, r1
8002156: 2101 movs r1, #1
8002158: 2004 movs r0, #4
800215a: f001 fed5 bl 8003f08 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
800215e: 4b99 ldr r3, [pc, #612] @ (80023c4 <manageCiclo+0x794>)
8002160: 881b ldrh r3, [r3, #0]
8002162: b29a uxth r2, r3
8002164: 4b98 ldr r3, [pc, #608] @ (80023c8 <manageCiclo+0x798>)
8002166: 881b ldrh r3, [r3, #0]
8002168: 429a cmp r2, r3
800216a: d302 bcc.n 8002172 <manageCiclo+0x542>
800216c: 4b97 ldr r3, [pc, #604] @ (80023cc <manageCiclo+0x79c>)
800216e: 2211 movs r2, #17
8002170: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM4bw2;
8002172: 4b97 ldr r3, [pc, #604] @ (80023d0 <manageCiclo+0x7a0>)
8002174: 781b ldrb r3, [r3, #0]
8002176: 2b00 cmp r3, #0
8002178: f040 8258 bne.w 800262c <manageCiclo+0x9fc>
800217c: 4b93 ldr r3, [pc, #588] @ (80023cc <manageCiclo+0x79c>)
800217e: 2210 movs r2, #16
8002180: 701a strb r2, [r3, #0]
break;
8002182: e253 b.n 800262c <manageCiclo+0x9fc>
case omM4bw2:
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002184: 4b8c ldr r3, [pc, #560] @ (80023b8 <manageCiclo+0x788>)
8002186: 88db ldrh r3, [r3, #6]
8002188: b2da uxtb r2, r3
800218a: 4b8c ldr r3, [pc, #560] @ (80023bc <manageCiclo+0x78c>)
800218c: 881b ldrh r3, [r3, #0]
800218e: b2d9 uxtb r1, r3
8002190: 4b8b ldr r3, [pc, #556] @ (80023c0 <manageCiclo+0x790>)
8002192: 881b ldrh r3, [r3, #0]
8002194: b2db uxtb r3, r3
8002196: 200a movs r0, #10
8002198: 9001 str r0, [sp, #4]
800219a: 9300 str r3, [sp, #0]
800219c: 460b mov r3, r1
800219e: 2101 movs r1, #1
80021a0: 2004 movs r0, #4
80021a2: f001 feb1 bl 8003f08 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
80021a6: 4b87 ldr r3, [pc, #540] @ (80023c4 <manageCiclo+0x794>)
80021a8: 881b ldrh r3, [r3, #0]
80021aa: b29a uxth r2, r3
80021ac: 4b86 ldr r3, [pc, #536] @ (80023c8 <manageCiclo+0x798>)
80021ae: 881b ldrh r3, [r3, #0]
80021b0: 429a cmp r2, r3
80021b2: d302 bcc.n 80021ba <manageCiclo+0x58a>
80021b4: 4b85 ldr r3, [pc, #532] @ (80023cc <manageCiclo+0x79c>)
80021b6: 2211 movs r2, #17
80021b8: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80021ba: 4b85 ldr r3, [pc, #532] @ (80023d0 <manageCiclo+0x7a0>)
80021bc: 781b ldrb r3, [r3, #0]
80021be: 2b00 cmp r3, #0
80021c0: f000 8236 beq.w 8002630 <manageCiclo+0xa00>
80021c4: 4b81 ldr r3, [pc, #516] @ (80023cc <manageCiclo+0x79c>)
80021c6: 2211 movs r2, #17
80021c8: 701a strb r2, [r3, #0]
break;
80021ca: e231 b.n 8002630 <manageCiclo+0xa00>
case omStopMan:
SetMotPerc(M1,FW,0);
80021cc: 2200 movs r2, #0
80021ce: 2100 movs r1, #0
80021d0: 2001 movs r0, #1
80021d2: f001 fd19 bl 8003c08 <SetMotPerc>
SetMotPerc(M2,FW,0);
80021d6: 2200 movs r2, #0
80021d8: 2100 movs r1, #0
80021da: 2002 movs r0, #2
80021dc: f001 fd14 bl 8003c08 <SetMotPerc>
SetMotPerc(M3,FW,0);
80021e0: 2200 movs r2, #0
80021e2: 2100 movs r1, #0
80021e4: 2003 movs r0, #3
80021e6: f001 fd0f bl 8003c08 <SetMotPerc>
SetMotPerc(M4,FW,0);
80021ea: 2200 movs r2, #0
80021ec: 2100 movs r1, #0
80021ee: 2004 movs r0, #4
80021f0: f001 fd0a bl 8003c08 <SetMotPerc>
SetMotPerc(M1,BW,0);
80021f4: 2200 movs r2, #0
80021f6: 2101 movs r1, #1
80021f8: 2001 movs r0, #1
80021fa: f001 fd05 bl 8003c08 <SetMotPerc>
SetMotPerc(M2,BW,0);
80021fe: 2200 movs r2, #0
8002200: 2101 movs r1, #1
8002202: 2002 movs r0, #2
8002204: f001 fd00 bl 8003c08 <SetMotPerc>
SetMotPerc(M3,BW,0);
8002208: 2200 movs r2, #0
800220a: 2101 movs r1, #1
800220c: 2003 movs r0, #3
800220e: f001 fcfb bl 8003c08 <SetMotPerc>
SetMotPerc(M4,BW,0);
8002212: 2200 movs r2, #0
8002214: 2101 movs r1, #1
8002216: 2004 movs r0, #4
8002218: f001 fcf6 bl 8003c08 <SetMotPerc>
if(pulsanti==0){
800221c: 4b6c ldr r3, [pc, #432] @ (80023d0 <manageCiclo+0x7a0>)
800221e: 781b ldrb r3, [r3, #0]
8002220: 2b00 cmp r3, #0
8002222: f040 8207 bne.w 8002634 <manageCiclo+0xa04>
stBuz=bzoff;
8002226: 4b6b ldr r3, [pc, #428] @ (80023d4 <manageCiclo+0x7a4>)
8002228: 2200 movs r2, #0
800222a: 701a strb r2, [r3, #0]
stCiclo=omaperto;
800222c: 4b67 ldr r3, [pc, #412] @ (80023cc <manageCiclo+0x79c>)
800222e: 2214 movs r2, #20
8002230: 701a strb r2, [r3, #0]
}
break;
8002232: e1ff b.n 8002634 <manageCiclo+0xa04>
case omapertura0:
if(rtCiclo>=30){//doppo 3 secondi
8002234: 4b63 ldr r3, [pc, #396] @ (80023c4 <manageCiclo+0x794>)
8002236: 881b ldrh r3, [r3, #0]
8002238: b29b uxth r3, r3
800223a: 2b1d cmp r3, #29
800223c: d91c bls.n 8002278 <manageCiclo+0x648>
stBuz=bzmoving;
800223e: 4b65 ldr r3, [pc, #404] @ (80023d4 <manageCiclo+0x7a4>)
8002240: 2201 movs r2, #1
8002242: 701a strb r2, [r3, #0]
if((m1ap()==motStop)&&(m2ap()==motStop)&&(m3ap()==motStop)&&(m4ap()==motStop)){
8002244: f000 fd80 bl 8002d48 <m1ap>
8002248: 4603 mov r3, r0
800224a: 2b04 cmp r3, #4
800224c: d114 bne.n 8002278 <manageCiclo+0x648>
800224e: f000 fe29 bl 8002ea4 <m2ap>
8002252: 4603 mov r3, r0
8002254: 2b04 cmp r3, #4
8002256: d10f bne.n 8002278 <manageCiclo+0x648>
8002258: f000 fed2 bl 8003000 <m3ap>
800225c: 4603 mov r3, r0
800225e: 2b04 cmp r3, #4
8002260: d10a bne.n 8002278 <manageCiclo+0x648>
8002262: f000 ff7d bl 8003160 <m4ap>
8002266: 4603 mov r3, r0
8002268: 2b04 cmp r3, #4
800226a: d105 bne.n 8002278 <manageCiclo+0x648>
stBuz=bzoff;
800226c: 4b59 ldr r3, [pc, #356] @ (80023d4 <manageCiclo+0x7a4>)
800226e: 2200 movs r2, #0
8002270: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8002272: 4b56 ldr r3, [pc, #344] @ (80023cc <manageCiclo+0x79c>)
8002274: 2214 movs r2, #20
8002276: 701a strb r2, [r3, #0]
}
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
8002278: 4b57 ldr r3, [pc, #348] @ (80023d8 <manageCiclo+0x7a8>)
800227a: 881b ldrh r3, [r3, #0]
800227c: f003 0302 and.w r3, r3, #2
8002280: 2b00 cmp r3, #0
8002282: f000 81d9 beq.w 8002638 <manageCiclo+0xa08>
8002286: 4b51 ldr r3, [pc, #324] @ (80023cc <manageCiclo+0x79c>)
8002288: 2213 movs r2, #19
800228a: 701a strb r2, [r3, #0]
break;
800228c: e1d4 b.n 8002638 <manageCiclo+0xa08>
case omstopapertura:
SetMotPerc(M1,FW,0);
800228e: 2200 movs r2, #0
8002290: 2100 movs r1, #0
8002292: 2001 movs r0, #1
8002294: f001 fcb8 bl 8003c08 <SetMotPerc>
SetMotPerc(M2,FW,0);
8002298: 2200 movs r2, #0
800229a: 2100 movs r1, #0
800229c: 2002 movs r0, #2
800229e: f001 fcb3 bl 8003c08 <SetMotPerc>
SetMotPerc(M3,FW,0);
80022a2: 2200 movs r2, #0
80022a4: 2100 movs r1, #0
80022a6: 2003 movs r0, #3
80022a8: f001 fcae bl 8003c08 <SetMotPerc>
SetMotPerc(M4,FW,0);
80022ac: 2200 movs r2, #0
80022ae: 2100 movs r1, #0
80022b0: 2004 movs r0, #4
80022b2: f001 fca9 bl 8003c08 <SetMotPerc>
if(pulsanti==0){
80022b6: 4b46 ldr r3, [pc, #280] @ (80023d0 <manageCiclo+0x7a0>)
80022b8: 781b ldrb r3, [r3, #0]
80022ba: 2b00 cmp r3, #0
80022bc: f040 81be bne.w 800263c <manageCiclo+0xa0c>
stBuz=bzoff;
80022c0: 4b44 ldr r3, [pc, #272] @ (80023d4 <manageCiclo+0x7a4>)
80022c2: 2200 movs r2, #0
80022c4: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
80022c6: 4b41 ldr r3, [pc, #260] @ (80023cc <manageCiclo+0x79c>)
80022c8: 2200 movs r2, #0
80022ca: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
80022cc: 4b42 ldr r3, [pc, #264] @ (80023d8 <manageCiclo+0x7a8>)
80022ce: 881b ldrh r3, [r3, #0]
80022d0: f023 0302 bic.w r3, r3, #2
80022d4: b29a uxth r2, r3
80022d6: 4b40 ldr r3, [pc, #256] @ (80023d8 <manageCiclo+0x7a8>)
80022d8: 801a strh r2, [r3, #0]
}
break;
80022da: e1af b.n 800263c <manageCiclo+0xa0c>
case omaperto:
rtCiclo=0;
80022dc: 4b39 ldr r3, [pc, #228] @ (80023c4 <manageCiclo+0x794>)
80022de: 2200 movs r2, #0
80022e0: 801a strh r2, [r3, #0]
if(stPulsanti&P1START){
80022e2: 4b3d ldr r3, [pc, #244] @ (80023d8 <manageCiclo+0x7a8>)
80022e4: 881b ldrh r3, [r3, #0]
80022e6: f003 0301 and.w r3, r3, #1
80022ea: 2b00 cmp r3, #0
80022ec: d01e beq.n 800232c <manageCiclo+0x6fc>
stBuz=bzmoving;
80022ee: 4b39 ldr r3, [pc, #228] @ (80023d4 <manageCiclo+0x7a4>)
80022f0: 2201 movs r2, #1
80022f2: 701a strb r2, [r3, #0]
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
80022f4: 4b30 ldr r3, [pc, #192] @ (80023b8 <manageCiclo+0x788>)
80022f6: 881b ldrh r3, [r3, #0]
80022f8: b2da uxtb r2, r3
80022fa: 4b38 ldr r3, [pc, #224] @ (80023dc <manageCiclo+0x7ac>)
80022fc: 881b ldrh r3, [r3, #0]
80022fe: b2d9 uxtb r1, r3
8002300: 4b37 ldr r3, [pc, #220] @ (80023e0 <manageCiclo+0x7b0>)
8002302: 881b ldrh r3, [r3, #0]
8002304: b2db uxtb r3, r3
8002306: 2000 movs r0, #0
8002308: 9001 str r0, [sp, #4]
800230a: 9300 str r3, [sp, #0]
800230c: 460b mov r3, r1
800230e: 2101 movs r1, #1
8002310: 2001 movs r0, #1
8002312: f001 fdf9 bl 8003f08 <ramp>
stCiclo=omchiusura1;
8002316: 4b2d ldr r3, [pc, #180] @ (80023cc <manageCiclo+0x79c>)
8002318: 2215 movs r2, #21
800231a: 701a strb r2, [r3, #0]
(void)m1ch();(void)m2ch();(void)m3ch();(void)m4ch();
800231c: f000 ffd0 bl 80032c0 <m1ch>
8002320: f001 f87c bl 800341c <m2ch>
8002324: f001 f928 bl 8003578 <m3ch>
8002328: f001 f9d6 bl 80036d8 <m4ch>
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
800232c: 4b2a ldr r3, [pc, #168] @ (80023d8 <manageCiclo+0x7a8>)
800232e: 881b ldrh r3, [r3, #0]
8002330: f003 0302 and.w r3, r3, #2
8002334: 2b00 cmp r3, #0
8002336: d003 beq.n 8002340 <manageCiclo+0x710>
8002338: 4b24 ldr r3, [pc, #144] @ (80023cc <manageCiclo+0x79c>)
800233a: 2216 movs r2, #22
800233c: 701a strb r2, [r3, #0]
}else if(stPulsanti&M4BW){
stBuz=bzmoving;
(void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
stCiclo=omM4bw1;
}
break;
800233e: e17f b.n 8002640 <manageCiclo+0xa10>
else if(stPulsanti&M1FW){
8002340: 4b25 ldr r3, [pc, #148] @ (80023d8 <manageCiclo+0x7a8>)
8002342: 881b ldrh r3, [r3, #0]
8002344: f003 0310 and.w r3, r3, #16
8002348: 2b00 cmp r3, #0
800234a: d017 beq.n 800237c <manageCiclo+0x74c>
stBuz=bzmoving;
800234c: 4b21 ldr r3, [pc, #132] @ (80023d4 <manageCiclo+0x7a4>)
800234e: 2201 movs r2, #1
8002350: 701a strb r2, [r3, #0]
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT);
8002352: 4b19 ldr r3, [pc, #100] @ (80023b8 <manageCiclo+0x788>)
8002354: 881b ldrh r3, [r3, #0]
8002356: b2da uxtb r2, r3
8002358: 4b22 ldr r3, [pc, #136] @ (80023e4 <manageCiclo+0x7b4>)
800235a: 881b ldrh r3, [r3, #0]
800235c: b2d9 uxtb r1, r3
800235e: 4b18 ldr r3, [pc, #96] @ (80023c0 <manageCiclo+0x790>)
8002360: 881b ldrh r3, [r3, #0]
8002362: b2db uxtb r3, r3
8002364: 2000 movs r0, #0
8002366: 9001 str r0, [sp, #4]
8002368: 9300 str r3, [sp, #0]
800236a: 460b mov r3, r1
800236c: 2100 movs r1, #0
800236e: 2001 movs r0, #1
8002370: f001 fdca bl 8003f08 <ramp>
stCiclo=omM1fw1;
8002374: 4b15 ldr r3, [pc, #84] @ (80023cc <manageCiclo+0x79c>)
8002376: 2201 movs r2, #1
8002378: 701a strb r2, [r3, #0]
break;
800237a: e161 b.n 8002640 <manageCiclo+0xa10>
}else if(stPulsanti&M1BW){
800237c: 4b16 ldr r3, [pc, #88] @ (80023d8 <manageCiclo+0x7a8>)
800237e: 881b ldrh r3, [r3, #0]
8002380: f003 0320 and.w r3, r3, #32
8002384: 2b00 cmp r3, #0
8002386: d02f beq.n 80023e8 <manageCiclo+0x7b8>
stBuz=bzmoving;
8002388: 4b12 ldr r3, [pc, #72] @ (80023d4 <manageCiclo+0x7a4>)
800238a: 2201 movs r2, #1
800238c: 701a strb r2, [r3, #0]
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT);
800238e: 4b0a ldr r3, [pc, #40] @ (80023b8 <manageCiclo+0x788>)
8002390: 881b ldrh r3, [r3, #0]
8002392: b2da uxtb r2, r3
8002394: 4b13 ldr r3, [pc, #76] @ (80023e4 <manageCiclo+0x7b4>)
8002396: 881b ldrh r3, [r3, #0]
8002398: b2d9 uxtb r1, r3
800239a: 4b09 ldr r3, [pc, #36] @ (80023c0 <manageCiclo+0x790>)
800239c: 881b ldrh r3, [r3, #0]
800239e: b2db uxtb r3, r3
80023a0: 2000 movs r0, #0
80023a2: 9001 str r0, [sp, #4]
80023a4: 9300 str r3, [sp, #0]
80023a6: 460b mov r3, r1
80023a8: 2101 movs r1, #1
80023aa: 2001 movs r0, #1
80023ac: f001 fdac bl 8003f08 <ramp>
stCiclo=omM1bw1;
80023b0: 4b06 ldr r3, [pc, #24] @ (80023cc <manageCiclo+0x79c>)
80023b2: 2203 movs r2, #3
80023b4: 701a strb r2, [r3, #0]
break;
80023b6: e143 b.n 8002640 <manageCiclo+0xa10>
80023b8: 2000043c .word 0x2000043c
80023bc: 2000041a .word 0x2000041a
80023c0: 20000412 .word 0x20000412
80023c4: 200003f4 .word 0x200003f4
80023c8: 2000040c .word 0x2000040c
80023cc: 20000446 .word 0x20000446
80023d0: 200003e8 .word 0x200003e8
80023d4: 20000447 .word 0x20000447
80023d8: 20000444 .word 0x20000444
80023dc: 200003f8 .word 0x200003f8
80023e0: 2000040e .word 0x2000040e
80023e4: 20000414 .word 0x20000414
}else if(stPulsanti&M2FW){
80023e8: 4b99 ldr r3, [pc, #612] @ (8002650 <manageCiclo+0xa20>)
80023ea: 881b ldrh r3, [r3, #0]
80023ec: f003 0340 and.w r3, r3, #64 @ 0x40
80023f0: 2b00 cmp r3, #0
80023f2: d017 beq.n 8002424 <manageCiclo+0x7f4>
stBuz=bzmoving;
80023f4: 4b97 ldr r3, [pc, #604] @ (8002654 <manageCiclo+0xa24>)
80023f6: 2201 movs r2, #1
80023f8: 701a strb r2, [r3, #0]
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT);
80023fa: 4b97 ldr r3, [pc, #604] @ (8002658 <manageCiclo+0xa28>)
80023fc: 885b ldrh r3, [r3, #2]
80023fe: b2da uxtb r2, r3
8002400: 4b96 ldr r3, [pc, #600] @ (800265c <manageCiclo+0xa2c>)
8002402: 881b ldrh r3, [r3, #0]
8002404: b2d9 uxtb r1, r3
8002406: 4b96 ldr r3, [pc, #600] @ (8002660 <manageCiclo+0xa30>)
8002408: 881b ldrh r3, [r3, #0]
800240a: b2db uxtb r3, r3
800240c: 2000 movs r0, #0
800240e: 9001 str r0, [sp, #4]
8002410: 9300 str r3, [sp, #0]
8002412: 460b mov r3, r1
8002414: 2100 movs r1, #0
8002416: 2002 movs r0, #2
8002418: f001 fd76 bl 8003f08 <ramp>
stCiclo=omM2fw1;
800241c: 4b91 ldr r3, [pc, #580] @ (8002664 <manageCiclo+0xa34>)
800241e: 2205 movs r2, #5
8002420: 701a strb r2, [r3, #0]
break;
8002422: e10d b.n 8002640 <manageCiclo+0xa10>
}else if(stPulsanti&M2BW){
8002424: 4b8a ldr r3, [pc, #552] @ (8002650 <manageCiclo+0xa20>)
8002426: 881b ldrh r3, [r3, #0]
8002428: f003 0380 and.w r3, r3, #128 @ 0x80
800242c: 2b00 cmp r3, #0
800242e: d017 beq.n 8002460 <manageCiclo+0x830>
stBuz=bzmoving;
8002430: 4b88 ldr r3, [pc, #544] @ (8002654 <manageCiclo+0xa24>)
8002432: 2201 movs r2, #1
8002434: 701a strb r2, [r3, #0]
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT);
8002436: 4b88 ldr r3, [pc, #544] @ (8002658 <manageCiclo+0xa28>)
8002438: 885b ldrh r3, [r3, #2]
800243a: b2da uxtb r2, r3
800243c: 4b87 ldr r3, [pc, #540] @ (800265c <manageCiclo+0xa2c>)
800243e: 881b ldrh r3, [r3, #0]
8002440: b2d9 uxtb r1, r3
8002442: 4b87 ldr r3, [pc, #540] @ (8002660 <manageCiclo+0xa30>)
8002444: 881b ldrh r3, [r3, #0]
8002446: b2db uxtb r3, r3
8002448: 2000 movs r0, #0
800244a: 9001 str r0, [sp, #4]
800244c: 9300 str r3, [sp, #0]
800244e: 460b mov r3, r1
8002450: 2101 movs r1, #1
8002452: 2002 movs r0, #2
8002454: f001 fd58 bl 8003f08 <ramp>
stCiclo=omM2bw1;
8002458: 4b82 ldr r3, [pc, #520] @ (8002664 <manageCiclo+0xa34>)
800245a: 2207 movs r2, #7
800245c: 701a strb r2, [r3, #0]
break;
800245e: e0ef b.n 8002640 <manageCiclo+0xa10>
}else if(stPulsanti&M3FW){
8002460: 4b7b ldr r3, [pc, #492] @ (8002650 <manageCiclo+0xa20>)
8002462: 881b ldrh r3, [r3, #0]
8002464: f403 7380 and.w r3, r3, #256 @ 0x100
8002468: 2b00 cmp r3, #0
800246a: d017 beq.n 800249c <manageCiclo+0x86c>
stBuz=bzmoving;
800246c: 4b79 ldr r3, [pc, #484] @ (8002654 <manageCiclo+0xa24>)
800246e: 2201 movs r2, #1
8002470: 701a strb r2, [r3, #0]
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT);
8002472: 4b79 ldr r3, [pc, #484] @ (8002658 <manageCiclo+0xa28>)
8002474: 889b ldrh r3, [r3, #4]
8002476: b2da uxtb r2, r3
8002478: 4b7b ldr r3, [pc, #492] @ (8002668 <manageCiclo+0xa38>)
800247a: 881b ldrh r3, [r3, #0]
800247c: b2d9 uxtb r1, r3
800247e: 4b78 ldr r3, [pc, #480] @ (8002660 <manageCiclo+0xa30>)
8002480: 881b ldrh r3, [r3, #0]
8002482: b2db uxtb r3, r3
8002484: 2000 movs r0, #0
8002486: 9001 str r0, [sp, #4]
8002488: 9300 str r3, [sp, #0]
800248a: 460b mov r3, r1
800248c: 2100 movs r1, #0
800248e: 2003 movs r0, #3
8002490: f001 fd3a bl 8003f08 <ramp>
stCiclo=omM3fw1;
8002494: 4b73 ldr r3, [pc, #460] @ (8002664 <manageCiclo+0xa34>)
8002496: 2209 movs r2, #9
8002498: 701a strb r2, [r3, #0]
break;
800249a: e0d1 b.n 8002640 <manageCiclo+0xa10>
}else if(stPulsanti&M3BW){
800249c: 4b6c ldr r3, [pc, #432] @ (8002650 <manageCiclo+0xa20>)
800249e: 881b ldrh r3, [r3, #0]
80024a0: f403 7300 and.w r3, r3, #512 @ 0x200
80024a4: 2b00 cmp r3, #0
80024a6: d017 beq.n 80024d8 <manageCiclo+0x8a8>
stBuz=bzmoving;
80024a8: 4b6a ldr r3, [pc, #424] @ (8002654 <manageCiclo+0xa24>)
80024aa: 2201 movs r2, #1
80024ac: 701a strb r2, [r3, #0]
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT);
80024ae: 4b6a ldr r3, [pc, #424] @ (8002658 <manageCiclo+0xa28>)
80024b0: 889b ldrh r3, [r3, #4]
80024b2: b2da uxtb r2, r3
80024b4: 4b6c ldr r3, [pc, #432] @ (8002668 <manageCiclo+0xa38>)
80024b6: 881b ldrh r3, [r3, #0]
80024b8: b2d9 uxtb r1, r3
80024ba: 4b69 ldr r3, [pc, #420] @ (8002660 <manageCiclo+0xa30>)
80024bc: 881b ldrh r3, [r3, #0]
80024be: b2db uxtb r3, r3
80024c0: 2000 movs r0, #0
80024c2: 9001 str r0, [sp, #4]
80024c4: 9300 str r3, [sp, #0]
80024c6: 460b mov r3, r1
80024c8: 2101 movs r1, #1
80024ca: 2003 movs r0, #3
80024cc: f001 fd1c bl 8003f08 <ramp>
stCiclo=omM3bw1;
80024d0: 4b64 ldr r3, [pc, #400] @ (8002664 <manageCiclo+0xa34>)
80024d2: 220b movs r2, #11
80024d4: 701a strb r2, [r3, #0]
break;
80024d6: e0b3 b.n 8002640 <manageCiclo+0xa10>
}else if(stPulsanti&M4FW){
80024d8: 4b5d ldr r3, [pc, #372] @ (8002650 <manageCiclo+0xa20>)
80024da: 881b ldrh r3, [r3, #0]
80024dc: f403 6380 and.w r3, r3, #1024 @ 0x400
80024e0: 2b00 cmp r3, #0
80024e2: d017 beq.n 8002514 <manageCiclo+0x8e4>
stBuz=bzmoving;
80024e4: 4b5b ldr r3, [pc, #364] @ (8002654 <manageCiclo+0xa24>)
80024e6: 2201 movs r2, #1
80024e8: 701a strb r2, [r3, #0]
(void)ramp(M4,FW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
80024ea: 4b5b ldr r3, [pc, #364] @ (8002658 <manageCiclo+0xa28>)
80024ec: 88db ldrh r3, [r3, #6]
80024ee: b2da uxtb r2, r3
80024f0: 4b5d ldr r3, [pc, #372] @ (8002668 <manageCiclo+0xa38>)
80024f2: 881b ldrh r3, [r3, #0]
80024f4: b2d9 uxtb r1, r3
80024f6: 4b5a ldr r3, [pc, #360] @ (8002660 <manageCiclo+0xa30>)
80024f8: 881b ldrh r3, [r3, #0]
80024fa: b2db uxtb r3, r3
80024fc: 2000 movs r0, #0
80024fe: 9001 str r0, [sp, #4]
8002500: 9300 str r3, [sp, #0]
8002502: 460b mov r3, r1
8002504: 2100 movs r1, #0
8002506: 2004 movs r0, #4
8002508: f001 fcfe bl 8003f08 <ramp>
stCiclo=omM4fw1;
800250c: 4b55 ldr r3, [pc, #340] @ (8002664 <manageCiclo+0xa34>)
800250e: 220d movs r2, #13
8002510: 701a strb r2, [r3, #0]
break;
8002512: e095 b.n 8002640 <manageCiclo+0xa10>
}else if(stPulsanti&M4BW){
8002514: 4b4e ldr r3, [pc, #312] @ (8002650 <manageCiclo+0xa20>)
8002516: 881b ldrh r3, [r3, #0]
8002518: f403 6300 and.w r3, r3, #2048 @ 0x800
800251c: 2b00 cmp r3, #0
800251e: f000 808f beq.w 8002640 <manageCiclo+0xa10>
stBuz=bzmoving;
8002522: 4b4c ldr r3, [pc, #304] @ (8002654 <manageCiclo+0xa24>)
8002524: 2201 movs r2, #1
8002526: 701a strb r2, [r3, #0]
(void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
8002528: 4b4b ldr r3, [pc, #300] @ (8002658 <manageCiclo+0xa28>)
800252a: 88db ldrh r3, [r3, #6]
800252c: b2da uxtb r2, r3
800252e: 4b4e ldr r3, [pc, #312] @ (8002668 <manageCiclo+0xa38>)
8002530: 881b ldrh r3, [r3, #0]
8002532: b2d9 uxtb r1, r3
8002534: 4b4a ldr r3, [pc, #296] @ (8002660 <manageCiclo+0xa30>)
8002536: 881b ldrh r3, [r3, #0]
8002538: b2db uxtb r3, r3
800253a: 2000 movs r0, #0
800253c: 9001 str r0, [sp, #4]
800253e: 9300 str r3, [sp, #0]
8002540: 460b mov r3, r1
8002542: 2101 movs r1, #1
8002544: 2004 movs r0, #4
8002546: f001 fcdf bl 8003f08 <ramp>
stCiclo=omM4bw1;
800254a: 4b46 ldr r3, [pc, #280] @ (8002664 <manageCiclo+0xa34>)
800254c: 220f movs r2, #15
800254e: 701a strb r2, [r3, #0]
break;
8002550: e076 b.n 8002640 <manageCiclo+0xa10>
case omchiusura1:
if(rtCiclo>=10){//doppo 1 secondi
8002552: 4b46 ldr r3, [pc, #280] @ (800266c <manageCiclo+0xa3c>)
8002554: 881b ldrh r3, [r3, #0]
8002556: b29b uxth r3, r3
8002558: 2b09 cmp r3, #9
800255a: d919 bls.n 8002590 <manageCiclo+0x960>
if((m1ch()==motStop)&&(m2ch()==motStop)&&(m3ch()==motStop)&&(m4ch()==motStop)){
800255c: f000 feb0 bl 80032c0 <m1ch>
8002560: 4603 mov r3, r0
8002562: 2b04 cmp r3, #4
8002564: d114 bne.n 8002590 <manageCiclo+0x960>
8002566: f000 ff59 bl 800341c <m2ch>
800256a: 4603 mov r3, r0
800256c: 2b04 cmp r3, #4
800256e: d10f bne.n 8002590 <manageCiclo+0x960>
8002570: f001 f802 bl 8003578 <m3ch>
8002574: 4603 mov r3, r0
8002576: 2b04 cmp r3, #4
8002578: d10a bne.n 8002590 <manageCiclo+0x960>
800257a: f001 f8ad bl 80036d8 <m4ch>
800257e: 4603 mov r3, r0
8002580: 2b04 cmp r3, #4
8002582: d105 bne.n 8002590 <manageCiclo+0x960>
stBuz=bzoff;
8002584: 4b33 ldr r3, [pc, #204] @ (8002654 <manageCiclo+0xa24>)
8002586: 2200 movs r2, #0
8002588: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
800258a: 4b36 ldr r3, [pc, #216] @ (8002664 <manageCiclo+0xa34>)
800258c: 2200 movs r2, #0
800258e: 701a strb r2, [r3, #0]
}
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8002590: 4b2f ldr r3, [pc, #188] @ (8002650 <manageCiclo+0xa20>)
8002592: 881b ldrh r3, [r3, #0]
8002594: f003 0302 and.w r3, r3, #2
8002598: 2b00 cmp r3, #0
800259a: d053 beq.n 8002644 <manageCiclo+0xa14>
800259c: 4b31 ldr r3, [pc, #196] @ (8002664 <manageCiclo+0xa34>)
800259e: 2216 movs r2, #22
80025a0: 701a strb r2, [r3, #0]
break;
80025a2: e04f b.n 8002644 <manageCiclo+0xa14>
case omstopchiusura:
SetMotPerc(M1,FW,0);
80025a4: 2200 movs r2, #0
80025a6: 2100 movs r1, #0
80025a8: 2001 movs r0, #1
80025aa: f001 fb2d bl 8003c08 <SetMotPerc>
SetMotPerc(M2,FW,0);
80025ae: 2200 movs r2, #0
80025b0: 2100 movs r1, #0
80025b2: 2002 movs r0, #2
80025b4: f001 fb28 bl 8003c08 <SetMotPerc>
SetMotPerc(M3,FW,0);
80025b8: 2200 movs r2, #0
80025ba: 2100 movs r1, #0
80025bc: 2003 movs r0, #3
80025be: f001 fb23 bl 8003c08 <SetMotPerc>
SetMotPerc(M4,FW,0);
80025c2: 2200 movs r2, #0
80025c4: 2100 movs r1, #0
80025c6: 2004 movs r0, #4
80025c8: f001 fb1e bl 8003c08 <SetMotPerc>
if(pulsanti==0){
80025cc: 4b28 ldr r3, [pc, #160] @ (8002670 <manageCiclo+0xa40>)
80025ce: 781b ldrb r3, [r3, #0]
80025d0: 2b00 cmp r3, #0
80025d2: d139 bne.n 8002648 <manageCiclo+0xa18>
stBuz=bzoff;
80025d4: 4b1f ldr r3, [pc, #124] @ (8002654 <manageCiclo+0xa24>)
80025d6: 2200 movs r2, #0
80025d8: 701a strb r2, [r3, #0]
stCiclo=omaperto;
80025da: 4b22 ldr r3, [pc, #136] @ (8002664 <manageCiclo+0xa34>)
80025dc: 2214 movs r2, #20
80025de: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
80025e0: 4b1b ldr r3, [pc, #108] @ (8002650 <manageCiclo+0xa20>)
80025e2: 881b ldrh r3, [r3, #0]
80025e4: f023 0302 bic.w r3, r3, #2
80025e8: b29a uxth r2, r3
80025ea: 4b19 ldr r3, [pc, #100] @ (8002650 <manageCiclo+0xa20>)
80025ec: 801a strh r2, [r3, #0]
}
break;
80025ee: e02b b.n 8002648 <manageCiclo+0xa18>
break;
80025f0: bf00 nop
80025f2: e02a b.n 800264a <manageCiclo+0xa1a>
break;
80025f4: bf00 nop
80025f6: e028 b.n 800264a <manageCiclo+0xa1a>
break;
80025f8: bf00 nop
80025fa: e026 b.n 800264a <manageCiclo+0xa1a>
break;
80025fc: bf00 nop
80025fe: e024 b.n 800264a <manageCiclo+0xa1a>
break;
8002600: bf00 nop
8002602: e022 b.n 800264a <manageCiclo+0xa1a>
break;
8002604: bf00 nop
8002606: e020 b.n 800264a <manageCiclo+0xa1a>
break;
8002608: bf00 nop
800260a: e01e b.n 800264a <manageCiclo+0xa1a>
break;
800260c: bf00 nop
800260e: e01c b.n 800264a <manageCiclo+0xa1a>
break;
8002610: bf00 nop
8002612: e01a b.n 800264a <manageCiclo+0xa1a>
break;
8002614: bf00 nop
8002616: e018 b.n 800264a <manageCiclo+0xa1a>
break;
8002618: bf00 nop
800261a: e016 b.n 800264a <manageCiclo+0xa1a>
break;
800261c: bf00 nop
800261e: e014 b.n 800264a <manageCiclo+0xa1a>
break;
8002620: bf00 nop
8002622: e012 b.n 800264a <manageCiclo+0xa1a>
break;
8002624: bf00 nop
8002626: e010 b.n 800264a <manageCiclo+0xa1a>
break;
8002628: bf00 nop
800262a: e00e b.n 800264a <manageCiclo+0xa1a>
break;
800262c: bf00 nop
800262e: e00c b.n 800264a <manageCiclo+0xa1a>
break;
8002630: bf00 nop
8002632: e00a b.n 800264a <manageCiclo+0xa1a>
break;
8002634: bf00 nop
8002636: e008 b.n 800264a <manageCiclo+0xa1a>
break;
8002638: bf00 nop
800263a: e006 b.n 800264a <manageCiclo+0xa1a>
break;
800263c: bf00 nop
800263e: e004 b.n 800264a <manageCiclo+0xa1a>
break;
8002640: bf00 nop
8002642: e002 b.n 800264a <manageCiclo+0xa1a>
break;
8002644: bf00 nop
8002646: e000 b.n 800264a <manageCiclo+0xa1a>
break;
8002648: bf00 nop
}
}
800264a: bf00 nop
800264c: 46bd mov sp, r7
800264e: bd80 pop {r7, pc}
8002650: 20000444 .word 0x20000444
8002654: 20000447 .word 0x20000447
8002658: 2000043c .word 0x2000043c
800265c: 20000416 .word 0x20000416
8002660: 20000412 .word 0x20000412
8002664: 20000446 .word 0x20000446
8002668: 20000418 .word 0x20000418
800266c: 200003f4 .word 0x200003f4
8002670: 200003e8 .word 0x200003e8
08002674 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8002674: b580 push {r7, lr}
8002676: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8002678: f001 ff34 bl 80044e4 <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
800267c: f000 f850 bl 8002720 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8002680: f000 fab2 bl 8002be8 <MX_GPIO_Init>
MX_DMA_Init();
8002684: f000 fa92 bl 8002bac <MX_DMA_Init>
MX_USB_DEVICE_Init();
8002688: f00a fbe4 bl 800ce54 <MX_USB_DEVICE_Init>
MX_TIM2_Init();
800268c: f000 f91e bl 80028cc <MX_TIM2_Init>
MX_TIM4_Init();
8002690: f000 f9c0 bl 8002a14 <MX_TIM4_Init>
MX_ADC1_Init();
8002694: f000 f8a2 bl 80027dc <MX_ADC1_Init>
MX_USART1_UART_Init();
8002698: f000 fa5e bl 8002b58 <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_buf, ADC_NUM_CHANNELS);
800269c: 2205 movs r2, #5
800269e: 491c ldr r1, [pc, #112] @ (8002710 <main+0x9c>)
80026a0: 481c ldr r0, [pc, #112] @ (8002714 <main+0xa0>)
80026a2: f002 f859 bl 8004758 <HAL_ADC_Start_DMA>
StopMot(timMot1,FWMot1);
80026a6: 2100 movs r1, #0
80026a8: 481b ldr r0, [pc, #108] @ (8002718 <main+0xa4>)
80026aa: f001 f8da bl 8003862 <StopMot>
StopMot(timMot1,BWMot1);
80026ae: 2104 movs r1, #4
80026b0: 4819 ldr r0, [pc, #100] @ (8002718 <main+0xa4>)
80026b2: f001 f8d6 bl 8003862 <StopMot>
StopMot(timMot2,FWMot2);
80026b6: 2108 movs r1, #8
80026b8: 4817 ldr r0, [pc, #92] @ (8002718 <main+0xa4>)
80026ba: f001 f8d2 bl 8003862 <StopMot>
StopMot(timMot2,BWMot2);
80026be: 210c movs r1, #12
80026c0: 4815 ldr r0, [pc, #84] @ (8002718 <main+0xa4>)
80026c2: f001 f8ce bl 8003862 <StopMot>
StopMot(timMot3,FWMot3);
80026c6: 2100 movs r1, #0
80026c8: 4814 ldr r0, [pc, #80] @ (800271c <main+0xa8>)
80026ca: f001 f8ca bl 8003862 <StopMot>
StopMot(timMot3,BWMot3);
80026ce: 2104 movs r1, #4
80026d0: 4812 ldr r0, [pc, #72] @ (800271c <main+0xa8>)
80026d2: f001 f8c6 bl 8003862 <StopMot>
StopMot(timMot4,FWMot4);
80026d6: 2108 movs r1, #8
80026d8: 4810 ldr r0, [pc, #64] @ (800271c <main+0xa8>)
80026da: f001 f8c2 bl 8003862 <StopMot>
StopMot(timMot4,BWMot4);
80026de: 210c movs r1, #12
80026e0: 480e ldr r0, [pc, #56] @ (800271c <main+0xa8>)
80026e2: f001 f8be bl 8003862 <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
//while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
if (EE_Init() != EE_OK){
80026e6: f7fe fd67 bl 80011b8 <EE_Init>
80026ea: 4603 mov r3, r0
80026ec: 2b00 cmp r3, #0
80026ee: d001 beq.n 80026f4 <main+0x80>
for(;;);//errore eeprom
80026f0: bf00 nop
80026f2: e7fd b.n 80026f0 <main+0x7c>
}
loadEE();
80026f4: f7fe fdfc bl 80012f0 <loadEE>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
manageCDC();
80026f8: f7fd fe80 bl 80003fc <manageCDC>
manageAdc();
80026fc: f7fd fd2e bl 800015c <manageAdc>
managePulsanti();
8002700: f7ff f946 bl 8001990 <managePulsanti>
manageCiclo();
8002704: f7ff fa94 bl 8001c30 <manageCiclo>
debug();
8002708: f7fe fb60 bl 8000dcc <debug>
manageCDC();
800270c: bf00 nop
800270e: e7f3 b.n 80026f8 <main+0x84>
8002710: 200001f4 .word 0x200001f4
8002714: 2000029c .word 0x2000029c
8002718: 20000310 .word 0x20000310
800271c: 20000358 .word 0x20000358
08002720 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8002720: b580 push {r7, lr}
8002722: b094 sub sp, #80 @ 0x50
8002724: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8002726: f107 0328 add.w r3, r7, #40 @ 0x28
800272a: 2228 movs r2, #40 @ 0x28
800272c: 2100 movs r1, #0
800272e: 4618 mov r0, r3
8002730: f00b f8cc bl 800d8cc <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8002734: f107 0314 add.w r3, r7, #20
8002738: 2200 movs r2, #0
800273a: 601a str r2, [r3, #0]
800273c: 605a str r2, [r3, #4]
800273e: 609a str r2, [r3, #8]
8002740: 60da str r2, [r3, #12]
8002742: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
8002744: 1d3b adds r3, r7, #4
8002746: 2200 movs r2, #0
8002748: 601a str r2, [r3, #0]
800274a: 605a str r2, [r3, #4]
800274c: 609a str r2, [r3, #8]
800274e: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8002750: 2301 movs r3, #1
8002752: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8002754: f44f 3380 mov.w r3, #65536 @ 0x10000
8002758: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
800275a: 2300 movs r3, #0
800275c: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
800275e: 2301 movs r3, #1
8002760: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8002762: 2302 movs r3, #2
8002764: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8002766: f44f 3380 mov.w r3, #65536 @ 0x10000
800276a: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
800276c: f44f 1380 mov.w r3, #1048576 @ 0x100000
8002770: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8002772: f107 0328 add.w r3, r7, #40 @ 0x28
8002776: 4618 mov r0, r3
8002778: f004 ff10 bl 800759c <HAL_RCC_OscConfig>
800277c: 4603 mov r3, r0
800277e: 2b00 cmp r3, #0
8002780: d001 beq.n 8002786 <SystemClock_Config+0x66>
{
Error_Handler();
8002782: f000 fadb bl 8002d3c <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8002786: 230f movs r3, #15
8002788: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
800278a: 2302 movs r3, #2
800278c: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
800278e: 2300 movs r3, #0
8002790: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
8002792: f44f 6380 mov.w r3, #1024 @ 0x400
8002796: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8002798: 2300 movs r3, #0
800279a: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
800279c: f107 0314 add.w r3, r7, #20
80027a0: 2102 movs r1, #2
80027a2: 4618 mov r0, r3
80027a4: f005 f97c bl 8007aa0 <HAL_RCC_ClockConfig>
80027a8: 4603 mov r3, r0
80027aa: 2b00 cmp r3, #0
80027ac: d001 beq.n 80027b2 <SystemClock_Config+0x92>
{
Error_Handler();
80027ae: f000 fac5 bl 8002d3c <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
80027b2: 2312 movs r3, #18
80027b4: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
80027b6: f44f 4300 mov.w r3, #32768 @ 0x8000
80027ba: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
80027bc: 2300 movs r3, #0
80027be: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
80027c0: 1d3b adds r3, r7, #4
80027c2: 4618 mov r0, r3
80027c4: f005 fafc bl 8007dc0 <HAL_RCCEx_PeriphCLKConfig>
80027c8: 4603 mov r3, r0
80027ca: 2b00 cmp r3, #0
80027cc: d001 beq.n 80027d2 <SystemClock_Config+0xb2>
{
Error_Handler();
80027ce: f000 fab5 bl 8002d3c <Error_Handler>
}
}
80027d2: bf00 nop
80027d4: 3750 adds r7, #80 @ 0x50
80027d6: 46bd mov sp, r7
80027d8: bd80 pop {r7, pc}
...
080027dc <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
80027dc: b580 push {r7, lr}
80027de: b084 sub sp, #16
80027e0: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
80027e2: 1d3b adds r3, r7, #4
80027e4: 2200 movs r2, #0
80027e6: 601a str r2, [r3, #0]
80027e8: 605a str r2, [r3, #4]
80027ea: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
80027ec: 4b35 ldr r3, [pc, #212] @ (80028c4 <MX_ADC1_Init+0xe8>)
80027ee: 4a36 ldr r2, [pc, #216] @ (80028c8 <MX_ADC1_Init+0xec>)
80027f0: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
80027f2: 4b34 ldr r3, [pc, #208] @ (80028c4 <MX_ADC1_Init+0xe8>)
80027f4: f44f 7280 mov.w r2, #256 @ 0x100
80027f8: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = ENABLE;
80027fa: 4b32 ldr r3, [pc, #200] @ (80028c4 <MX_ADC1_Init+0xe8>)
80027fc: 2201 movs r2, #1
80027fe: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
8002800: 4b30 ldr r3, [pc, #192] @ (80028c4 <MX_ADC1_Init+0xe8>)
8002802: 2200 movs r2, #0
8002804: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8002806: 4b2f ldr r3, [pc, #188] @ (80028c4 <MX_ADC1_Init+0xe8>)
8002808: f44f 2260 mov.w r2, #917504 @ 0xe0000
800280c: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
800280e: 4b2d ldr r3, [pc, #180] @ (80028c4 <MX_ADC1_Init+0xe8>)
8002810: 2200 movs r2, #0
8002812: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 5;
8002814: 4b2b ldr r3, [pc, #172] @ (80028c4 <MX_ADC1_Init+0xe8>)
8002816: 2205 movs r2, #5
8002818: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
800281a: 482a ldr r0, [pc, #168] @ (80028c4 <MX_ADC1_Init+0xe8>)
800281c: f001 fec4 bl 80045a8 <HAL_ADC_Init>
8002820: 4603 mov r3, r0
8002822: 2b00 cmp r3, #0
8002824: d001 beq.n 800282a <MX_ADC1_Init+0x4e>
{
Error_Handler();
8002826: f000 fa89 bl 8002d3c <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
800282a: 2304 movs r3, #4
800282c: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
800282e: 2301 movs r3, #1
8002830: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5;
8002832: 2303 movs r3, #3
8002834: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002836: 1d3b adds r3, r7, #4
8002838: 4619 mov r1, r3
800283a: 4822 ldr r0, [pc, #136] @ (80028c4 <MX_ADC1_Init+0xe8>)
800283c: f002 f886 bl 800494c <HAL_ADC_ConfigChannel>
8002840: 4603 mov r3, r0
8002842: 2b00 cmp r3, #0
8002844: d001 beq.n 800284a <MX_ADC1_Init+0x6e>
{
Error_Handler();
8002846: f000 fa79 bl 8002d3c <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_5;
800284a: 2305 movs r3, #5
800284c: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_2;
800284e: 2302 movs r3, #2
8002850: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8002852: 1d3b adds r3, r7, #4
8002854: 4619 mov r1, r3
8002856: 481b ldr r0, [pc, #108] @ (80028c4 <MX_ADC1_Init+0xe8>)
8002858: f002 f878 bl 800494c <HAL_ADC_ConfigChannel>
800285c: 4603 mov r3, r0
800285e: 2b00 cmp r3, #0
8002860: d001 beq.n 8002866 <MX_ADC1_Init+0x8a>
{
Error_Handler();
8002862: f000 fa6b bl 8002d3c <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_6;
8002866: 2306 movs r3, #6
8002868: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_3;
800286a: 2303 movs r3, #3
800286c: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
800286e: 1d3b adds r3, r7, #4
8002870: 4619 mov r1, r3
8002872: 4814 ldr r0, [pc, #80] @ (80028c4 <MX_ADC1_Init+0xe8>)
8002874: f002 f86a bl 800494c <HAL_ADC_ConfigChannel>
8002878: 4603 mov r3, r0
800287a: 2b00 cmp r3, #0
800287c: d001 beq.n 8002882 <MX_ADC1_Init+0xa6>
{
Error_Handler();
800287e: f000 fa5d bl 8002d3c <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_7;
8002882: 2307 movs r3, #7
8002884: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_4;
8002886: 2304 movs r3, #4
8002888: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
800288a: 1d3b adds r3, r7, #4
800288c: 4619 mov r1, r3
800288e: 480d ldr r0, [pc, #52] @ (80028c4 <MX_ADC1_Init+0xe8>)
8002890: f002 f85c bl 800494c <HAL_ADC_ConfigChannel>
8002894: 4603 mov r3, r0
8002896: 2b00 cmp r3, #0
8002898: d001 beq.n 800289e <MX_ADC1_Init+0xc2>
{
Error_Handler();
800289a: f000 fa4f bl 8002d3c <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
800289e: 2308 movs r3, #8
80028a0: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_5;
80028a2: 2305 movs r3, #5
80028a4: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
80028a6: 1d3b adds r3, r7, #4
80028a8: 4619 mov r1, r3
80028aa: 4806 ldr r0, [pc, #24] @ (80028c4 <MX_ADC1_Init+0xe8>)
80028ac: f002 f84e bl 800494c <HAL_ADC_ConfigChannel>
80028b0: 4603 mov r3, r0
80028b2: 2b00 cmp r3, #0
80028b4: d001 beq.n 80028ba <MX_ADC1_Init+0xde>
{
Error_Handler();
80028b6: f000 fa41 bl 8002d3c <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
80028ba: bf00 nop
80028bc: 3710 adds r7, #16
80028be: 46bd mov sp, r7
80028c0: bd80 pop {r7, pc}
80028c2: bf00 nop
80028c4: 2000029c .word 0x2000029c
80028c8: 40012400 .word 0x40012400
080028cc <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
80028cc: b580 push {r7, lr}
80028ce: b08e sub sp, #56 @ 0x38
80028d0: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
80028d2: f107 0328 add.w r3, r7, #40 @ 0x28
80028d6: 2200 movs r2, #0
80028d8: 601a str r2, [r3, #0]
80028da: 605a str r2, [r3, #4]
80028dc: 609a str r2, [r3, #8]
80028de: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
80028e0: f107 0320 add.w r3, r7, #32
80028e4: 2200 movs r2, #0
80028e6: 601a str r2, [r3, #0]
80028e8: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
80028ea: 1d3b adds r3, r7, #4
80028ec: 2200 movs r2, #0
80028ee: 601a str r2, [r3, #0]
80028f0: 605a str r2, [r3, #4]
80028f2: 609a str r2, [r3, #8]
80028f4: 60da str r2, [r3, #12]
80028f6: 611a str r2, [r3, #16]
80028f8: 615a str r2, [r3, #20]
80028fa: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
80028fc: 4b44 ldr r3, [pc, #272] @ (8002a10 <MX_TIM2_Init+0x144>)
80028fe: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8002902: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8002904: 4b42 ldr r3, [pc, #264] @ (8002a10 <MX_TIM2_Init+0x144>)
8002906: 2200 movs r2, #0
8002908: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
800290a: 4b41 ldr r3, [pc, #260] @ (8002a10 <MX_TIM2_Init+0x144>)
800290c: 2200 movs r2, #0
800290e: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
8002910: 4b3f ldr r3, [pc, #252] @ (8002a10 <MX_TIM2_Init+0x144>)
8002912: f244 624f movw r2, #17999 @ 0x464f
8002916: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8002918: 4b3d ldr r3, [pc, #244] @ (8002a10 <MX_TIM2_Init+0x144>)
800291a: 2200 movs r2, #0
800291c: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
800291e: 4b3c ldr r3, [pc, #240] @ (8002a10 <MX_TIM2_Init+0x144>)
8002920: 2200 movs r2, #0
8002922: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
8002924: 483a ldr r0, [pc, #232] @ (8002a10 <MX_TIM2_Init+0x144>)
8002926: f005 fb01 bl 8007f2c <HAL_TIM_Base_Init>
800292a: 4603 mov r3, r0
800292c: 2b00 cmp r3, #0
800292e: d001 beq.n 8002934 <MX_TIM2_Init+0x68>
{
Error_Handler();
8002930: f000 fa04 bl 8002d3c <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8002934: f44f 5380 mov.w r3, #4096 @ 0x1000
8002938: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
800293a: f107 0328 add.w r3, r7, #40 @ 0x28
800293e: 4619 mov r1, r3
8002940: 4833 ldr r0, [pc, #204] @ (8002a10 <MX_TIM2_Init+0x144>)
8002942: f005 fd63 bl 800840c <HAL_TIM_ConfigClockSource>
8002946: 4603 mov r3, r0
8002948: 2b00 cmp r3, #0
800294a: d001 beq.n 8002950 <MX_TIM2_Init+0x84>
{
Error_Handler();
800294c: f000 f9f6 bl 8002d3c <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
8002950: 482f ldr r0, [pc, #188] @ (8002a10 <MX_TIM2_Init+0x144>)
8002952: f005 fb3a bl 8007fca <HAL_TIM_PWM_Init>
8002956: 4603 mov r3, r0
8002958: 2b00 cmp r3, #0
800295a: d001 beq.n 8002960 <MX_TIM2_Init+0x94>
{
Error_Handler();
800295c: f000 f9ee bl 8002d3c <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8002960: 2300 movs r3, #0
8002962: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8002964: 2300 movs r3, #0
8002966: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
8002968: f107 0320 add.w r3, r7, #32
800296c: 4619 mov r1, r3
800296e: 4828 ldr r0, [pc, #160] @ (8002a10 <MX_TIM2_Init+0x144>)
8002970: f006 f8ec bl 8008b4c <HAL_TIMEx_MasterConfigSynchronization>
8002974: 4603 mov r3, r0
8002976: 2b00 cmp r3, #0
8002978: d001 beq.n 800297e <MX_TIM2_Init+0xb2>
{
Error_Handler();
800297a: f000 f9df bl 8002d3c <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
800297e: 2360 movs r3, #96 @ 0x60
8002980: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
8002982: f44f 737a mov.w r3, #1000 @ 0x3e8
8002986: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8002988: 2300 movs r3, #0
800298a: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800298c: 2304 movs r3, #4
800298e: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8002990: 1d3b adds r3, r7, #4
8002992: 2200 movs r2, #0
8002994: 4619 mov r1, r3
8002996: 481e ldr r0, [pc, #120] @ (8002a10 <MX_TIM2_Init+0x144>)
8002998: f005 fc76 bl 8008288 <HAL_TIM_PWM_ConfigChannel>
800299c: 4603 mov r3, r0
800299e: 2b00 cmp r3, #0
80029a0: d001 beq.n 80029a6 <MX_TIM2_Init+0xda>
{
Error_Handler();
80029a2: f000 f9cb bl 8002d3c <Error_Handler>
}
sConfigOC.Pulse = 2000;
80029a6: f44f 63fa mov.w r3, #2000 @ 0x7d0
80029aa: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
80029ac: 1d3b adds r3, r7, #4
80029ae: 2204 movs r2, #4
80029b0: 4619 mov r1, r3
80029b2: 4817 ldr r0, [pc, #92] @ (8002a10 <MX_TIM2_Init+0x144>)
80029b4: f005 fc68 bl 8008288 <HAL_TIM_PWM_ConfigChannel>
80029b8: 4603 mov r3, r0
80029ba: 2b00 cmp r3, #0
80029bc: d001 beq.n 80029c2 <MX_TIM2_Init+0xf6>
{
Error_Handler();
80029be: f000 f9bd bl 8002d3c <Error_Handler>
}
sConfigOC.Pulse = 3000;
80029c2: f640 33b8 movw r3, #3000 @ 0xbb8
80029c6: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
80029c8: 2300 movs r3, #0
80029ca: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
80029cc: 1d3b adds r3, r7, #4
80029ce: 2208 movs r2, #8
80029d0: 4619 mov r1, r3
80029d2: 480f ldr r0, [pc, #60] @ (8002a10 <MX_TIM2_Init+0x144>)
80029d4: f005 fc58 bl 8008288 <HAL_TIM_PWM_ConfigChannel>
80029d8: 4603 mov r3, r0
80029da: 2b00 cmp r3, #0
80029dc: d001 beq.n 80029e2 <MX_TIM2_Init+0x116>
{
Error_Handler();
80029de: f000 f9ad bl 8002d3c <Error_Handler>
}
sConfigOC.Pulse = 4000;
80029e2: f44f 637a mov.w r3, #4000 @ 0xfa0
80029e6: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
80029e8: 2304 movs r3, #4
80029ea: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
80029ec: 1d3b adds r3, r7, #4
80029ee: 220c movs r2, #12
80029f0: 4619 mov r1, r3
80029f2: 4807 ldr r0, [pc, #28] @ (8002a10 <MX_TIM2_Init+0x144>)
80029f4: f005 fc48 bl 8008288 <HAL_TIM_PWM_ConfigChannel>
80029f8: 4603 mov r3, r0
80029fa: 2b00 cmp r3, #0
80029fc: d001 beq.n 8002a02 <MX_TIM2_Init+0x136>
{
Error_Handler();
80029fe: f000 f99d bl 8002d3c <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
8002a02: 4803 ldr r0, [pc, #12] @ (8002a10 <MX_TIM2_Init+0x144>)
8002a04: f001 fc2a bl 800425c <HAL_TIM_MspPostInit>
}
8002a08: bf00 nop
8002a0a: 3738 adds r7, #56 @ 0x38
8002a0c: 46bd mov sp, r7
8002a0e: bd80 pop {r7, pc}
8002a10: 20000310 .word 0x20000310
08002a14 <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
8002a14: b580 push {r7, lr}
8002a16: b08e sub sp, #56 @ 0x38
8002a18: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8002a1a: f107 0328 add.w r3, r7, #40 @ 0x28
8002a1e: 2200 movs r2, #0
8002a20: 601a str r2, [r3, #0]
8002a22: 605a str r2, [r3, #4]
8002a24: 609a str r2, [r3, #8]
8002a26: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8002a28: f107 0320 add.w r3, r7, #32
8002a2c: 2200 movs r2, #0
8002a2e: 601a str r2, [r3, #0]
8002a30: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
8002a32: 1d3b adds r3, r7, #4
8002a34: 2200 movs r2, #0
8002a36: 601a str r2, [r3, #0]
8002a38: 605a str r2, [r3, #4]
8002a3a: 609a str r2, [r3, #8]
8002a3c: 60da str r2, [r3, #12]
8002a3e: 611a str r2, [r3, #16]
8002a40: 615a str r2, [r3, #20]
8002a42: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
8002a44: 4b42 ldr r3, [pc, #264] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002a46: 4a43 ldr r2, [pc, #268] @ (8002b54 <MX_TIM4_Init+0x140>)
8002a48: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
8002a4a: 4b41 ldr r3, [pc, #260] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002a4c: 2200 movs r2, #0
8002a4e: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
8002a50: 4b3f ldr r3, [pc, #252] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002a52: 2200 movs r2, #0
8002a54: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
8002a56: 4b3e ldr r3, [pc, #248] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002a58: f244 624f movw r2, #17999 @ 0x464f
8002a5c: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
8002a5e: 4b3c ldr r3, [pc, #240] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002a60: 2200 movs r2, #0
8002a62: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
8002a64: 4b3a ldr r3, [pc, #232] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002a66: 2200 movs r2, #0
8002a68: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
8002a6a: 4839 ldr r0, [pc, #228] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002a6c: f005 fa5e bl 8007f2c <HAL_TIM_Base_Init>
8002a70: 4603 mov r3, r0
8002a72: 2b00 cmp r3, #0
8002a74: d001 beq.n 8002a7a <MX_TIM4_Init+0x66>
{
Error_Handler();
8002a76: f000 f961 bl 8002d3c <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
8002a7a: f44f 5380 mov.w r3, #4096 @ 0x1000
8002a7e: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
8002a80: f107 0328 add.w r3, r7, #40 @ 0x28
8002a84: 4619 mov r1, r3
8002a86: 4832 ldr r0, [pc, #200] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002a88: f005 fcc0 bl 800840c <HAL_TIM_ConfigClockSource>
8002a8c: 4603 mov r3, r0
8002a8e: 2b00 cmp r3, #0
8002a90: d001 beq.n 8002a96 <MX_TIM4_Init+0x82>
{
Error_Handler();
8002a92: f000 f953 bl 8002d3c <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
8002a96: 482e ldr r0, [pc, #184] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002a98: f005 fa97 bl 8007fca <HAL_TIM_PWM_Init>
8002a9c: 4603 mov r3, r0
8002a9e: 2b00 cmp r3, #0
8002aa0: d001 beq.n 8002aa6 <MX_TIM4_Init+0x92>
{
Error_Handler();
8002aa2: f000 f94b bl 8002d3c <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8002aa6: 2300 movs r3, #0
8002aa8: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
8002aaa: 2300 movs r3, #0
8002aac: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
8002aae: f107 0320 add.w r3, r7, #32
8002ab2: 4619 mov r1, r3
8002ab4: 4826 ldr r0, [pc, #152] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002ab6: f006 f849 bl 8008b4c <HAL_TIMEx_MasterConfigSynchronization>
8002aba: 4603 mov r3, r0
8002abc: 2b00 cmp r3, #0
8002abe: d001 beq.n 8002ac4 <MX_TIM4_Init+0xb0>
{
Error_Handler();
8002ac0: f000 f93c bl 8002d3c <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8002ac4: 2360 movs r3, #96 @ 0x60
8002ac6: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
8002ac8: f241 3388 movw r3, #5000 @ 0x1388
8002acc: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8002ace: 2300 movs r3, #0
8002ad0: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8002ad2: 2304 movs r3, #4
8002ad4: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8002ad6: 1d3b adds r3, r7, #4
8002ad8: 2200 movs r2, #0
8002ada: 4619 mov r1, r3
8002adc: 481c ldr r0, [pc, #112] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002ade: f005 fbd3 bl 8008288 <HAL_TIM_PWM_ConfigChannel>
8002ae2: 4603 mov r3, r0
8002ae4: 2b00 cmp r3, #0
8002ae6: d001 beq.n 8002aec <MX_TIM4_Init+0xd8>
{
Error_Handler();
8002ae8: f000 f928 bl 8002d3c <Error_Handler>
}
sConfigOC.Pulse = 6000;
8002aec: f241 7370 movw r3, #6000 @ 0x1770
8002af0: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8002af2: 1d3b adds r3, r7, #4
8002af4: 2204 movs r2, #4
8002af6: 4619 mov r1, r3
8002af8: 4815 ldr r0, [pc, #84] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002afa: f005 fbc5 bl 8008288 <HAL_TIM_PWM_ConfigChannel>
8002afe: 4603 mov r3, r0
8002b00: 2b00 cmp r3, #0
8002b02: d001 beq.n 8002b08 <MX_TIM4_Init+0xf4>
{
Error_Handler();
8002b04: f000 f91a bl 8002d3c <Error_Handler>
}
sConfigOC.Pulse = 7000;
8002b08: f641 3358 movw r3, #7000 @ 0x1b58
8002b0c: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
8002b0e: 1d3b adds r3, r7, #4
8002b10: 2208 movs r2, #8
8002b12: 4619 mov r1, r3
8002b14: 480e ldr r0, [pc, #56] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002b16: f005 fbb7 bl 8008288 <HAL_TIM_PWM_ConfigChannel>
8002b1a: 4603 mov r3, r0
8002b1c: 2b00 cmp r3, #0
8002b1e: d001 beq.n 8002b24 <MX_TIM4_Init+0x110>
{
Error_Handler();
8002b20: f000 f90c bl 8002d3c <Error_Handler>
}
sConfigOC.Pulse = 8000;
8002b24: f44f 53fa mov.w r3, #8000 @ 0x1f40
8002b28: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
8002b2a: 1d3b adds r3, r7, #4
8002b2c: 220c movs r2, #12
8002b2e: 4619 mov r1, r3
8002b30: 4807 ldr r0, [pc, #28] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002b32: f005 fba9 bl 8008288 <HAL_TIM_PWM_ConfigChannel>
8002b36: 4603 mov r3, r0
8002b38: 2b00 cmp r3, #0
8002b3a: d001 beq.n 8002b40 <MX_TIM4_Init+0x12c>
{
Error_Handler();
8002b3c: f000 f8fe bl 8002d3c <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
8002b40: 4803 ldr r0, [pc, #12] @ (8002b50 <MX_TIM4_Init+0x13c>)
8002b42: f001 fb8b bl 800425c <HAL_TIM_MspPostInit>
}
8002b46: bf00 nop
8002b48: 3738 adds r7, #56 @ 0x38
8002b4a: 46bd mov sp, r7
8002b4c: bd80 pop {r7, pc}
8002b4e: bf00 nop
8002b50: 20000358 .word 0x20000358
8002b54: 40000800 .word 0x40000800
08002b58 <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
8002b58: b580 push {r7, lr}
8002b5a: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
8002b5c: 4b11 ldr r3, [pc, #68] @ (8002ba4 <MX_USART1_UART_Init+0x4c>)
8002b5e: 4a12 ldr r2, [pc, #72] @ (8002ba8 <MX_USART1_UART_Init+0x50>)
8002b60: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
8002b62: 4b10 ldr r3, [pc, #64] @ (8002ba4 <MX_USART1_UART_Init+0x4c>)
8002b64: f44f 32e1 mov.w r2, #115200 @ 0x1c200
8002b68: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
8002b6a: 4b0e ldr r3, [pc, #56] @ (8002ba4 <MX_USART1_UART_Init+0x4c>)
8002b6c: 2200 movs r2, #0
8002b6e: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8002b70: 4b0c ldr r3, [pc, #48] @ (8002ba4 <MX_USART1_UART_Init+0x4c>)
8002b72: 2200 movs r2, #0
8002b74: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
8002b76: 4b0b ldr r3, [pc, #44] @ (8002ba4 <MX_USART1_UART_Init+0x4c>)
8002b78: 2200 movs r2, #0
8002b7a: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
8002b7c: 4b09 ldr r3, [pc, #36] @ (8002ba4 <MX_USART1_UART_Init+0x4c>)
8002b7e: 220c movs r2, #12
8002b80: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8002b82: 4b08 ldr r3, [pc, #32] @ (8002ba4 <MX_USART1_UART_Init+0x4c>)
8002b84: 2200 movs r2, #0
8002b86: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8002b88: 4b06 ldr r3, [pc, #24] @ (8002ba4 <MX_USART1_UART_Init+0x4c>)
8002b8a: 2200 movs r2, #0
8002b8c: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK)
8002b8e: 4805 ldr r0, [pc, #20] @ (8002ba4 <MX_USART1_UART_Init+0x4c>)
8002b90: f006 f83a bl 8008c08 <HAL_UART_Init>
8002b94: 4603 mov r3, r0
8002b96: 2b00 cmp r3, #0
8002b98: d001 beq.n 8002b9e <MX_USART1_UART_Init+0x46>
{
Error_Handler();
8002b9a: f000 f8cf bl 8002d3c <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
8002b9e: bf00 nop
8002ba0: bd80 pop {r7, pc}
8002ba2: bf00 nop
8002ba4: 200003a0 .word 0x200003a0
8002ba8: 40013800 .word 0x40013800
08002bac <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
8002bac: b580 push {r7, lr}
8002bae: b082 sub sp, #8
8002bb0: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
8002bb2: 4b0c ldr r3, [pc, #48] @ (8002be4 <MX_DMA_Init+0x38>)
8002bb4: 695b ldr r3, [r3, #20]
8002bb6: 4a0b ldr r2, [pc, #44] @ (8002be4 <MX_DMA_Init+0x38>)
8002bb8: f043 0301 orr.w r3, r3, #1
8002bbc: 6153 str r3, [r2, #20]
8002bbe: 4b09 ldr r3, [pc, #36] @ (8002be4 <MX_DMA_Init+0x38>)
8002bc0: 695b ldr r3, [r3, #20]
8002bc2: f003 0301 and.w r3, r3, #1
8002bc6: 607b str r3, [r7, #4]
8002bc8: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
8002bca: 2200 movs r2, #0
8002bcc: 2100 movs r1, #0
8002bce: 200b movs r0, #11
8002bd0: f002 f98d bl 8004eee <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
8002bd4: 200b movs r0, #11
8002bd6: f002 f9a6 bl 8004f26 <HAL_NVIC_EnableIRQ>
}
8002bda: bf00 nop
8002bdc: 3708 adds r7, #8
8002bde: 46bd mov sp, r7
8002be0: bd80 pop {r7, pc}
8002be2: bf00 nop
8002be4: 40021000 .word 0x40021000
08002be8 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8002be8: b580 push {r7, lr}
8002bea: b088 sub sp, #32
8002bec: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
8002bee: f107 0310 add.w r3, r7, #16
8002bf2: 2200 movs r2, #0
8002bf4: 601a str r2, [r3, #0]
8002bf6: 605a str r2, [r3, #4]
8002bf8: 609a str r2, [r3, #8]
8002bfa: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
8002bfc: 4b4b ldr r3, [pc, #300] @ (8002d2c <MX_GPIO_Init+0x144>)
8002bfe: 699b ldr r3, [r3, #24]
8002c00: 4a4a ldr r2, [pc, #296] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c02: f043 0310 orr.w r3, r3, #16
8002c06: 6193 str r3, [r2, #24]
8002c08: 4b48 ldr r3, [pc, #288] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c0a: 699b ldr r3, [r3, #24]
8002c0c: f003 0310 and.w r3, r3, #16
8002c10: 60fb str r3, [r7, #12]
8002c12: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
8002c14: 4b45 ldr r3, [pc, #276] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c16: 699b ldr r3, [r3, #24]
8002c18: 4a44 ldr r2, [pc, #272] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c1a: f043 0320 orr.w r3, r3, #32
8002c1e: 6193 str r3, [r2, #24]
8002c20: 4b42 ldr r3, [pc, #264] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c22: 699b ldr r3, [r3, #24]
8002c24: f003 0320 and.w r3, r3, #32
8002c28: 60bb str r3, [r7, #8]
8002c2a: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
8002c2c: 4b3f ldr r3, [pc, #252] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c2e: 699b ldr r3, [r3, #24]
8002c30: 4a3e ldr r2, [pc, #248] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c32: f043 0304 orr.w r3, r3, #4
8002c36: 6193 str r3, [r2, #24]
8002c38: 4b3c ldr r3, [pc, #240] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c3a: 699b ldr r3, [r3, #24]
8002c3c: f003 0304 and.w r3, r3, #4
8002c40: 607b str r3, [r7, #4]
8002c42: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
8002c44: 4b39 ldr r3, [pc, #228] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c46: 699b ldr r3, [r3, #24]
8002c48: 4a38 ldr r2, [pc, #224] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c4a: f043 0308 orr.w r3, r3, #8
8002c4e: 6193 str r3, [r2, #24]
8002c50: 4b36 ldr r3, [pc, #216] @ (8002d2c <MX_GPIO_Init+0x144>)
8002c52: 699b ldr r3, [r3, #24]
8002c54: f003 0308 and.w r3, r3, #8
8002c58: 603b str r3, [r7, #0]
8002c5a: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
8002c5c: 2200 movs r2, #0
8002c5e: f44f 5100 mov.w r1, #8192 @ 0x2000
8002c62: 4833 ldr r0, [pc, #204] @ (8002d30 <MX_GPIO_Init+0x148>)
8002c64: f002 ff09 bl 8005a7a <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
8002c68: 2200 movs r2, #0
8002c6a: f640 413e movw r1, #3134 @ 0xc3e
8002c6e: 4831 ldr r0, [pc, #196] @ (8002d34 <MX_GPIO_Init+0x14c>)
8002c70: f002 ff03 bl 8005a7a <HAL_GPIO_WritePin>
|EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET);
8002c74: 2200 movs r2, #0
8002c76: f44f 4101 mov.w r1, #33024 @ 0x8100
8002c7a: 482f ldr r0, [pc, #188] @ (8002d38 <MX_GPIO_Init+0x150>)
8002c7c: f002 fefd bl 8005a7a <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
8002c80: f44f 5300 mov.w r3, #8192 @ 0x2000
8002c84: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8002c86: 2301 movs r3, #1
8002c88: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002c8a: 2300 movs r3, #0
8002c8c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002c8e: 2302 movs r3, #2
8002c90: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
8002c92: f107 0310 add.w r3, r7, #16
8002c96: 4619 mov r1, r3
8002c98: 4825 ldr r0, [pc, #148] @ (8002d30 <MX_GPIO_Init+0x148>)
8002c9a: f002 fd53 bl 8005744 <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin|P2_Pin;
8002c9e: f44f 4340 mov.w r3, #49152 @ 0xc000
8002ca2: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8002ca4: 2300 movs r3, #0
8002ca6: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002ca8: 2300 movs r3, #0
8002caa: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
8002cac: f107 0310 add.w r3, r7, #16
8002cb0: 4619 mov r1, r3
8002cb2: 481f ldr r0, [pc, #124] @ (8002d30 <MX_GPIO_Init+0x148>)
8002cb4: f002 fd46 bl 8005744 <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
8002cb8: 2310 movs r3, #16
8002cba: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8002cbc: 2303 movs r3, #3
8002cbe: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
8002cc0: f107 0310 add.w r3, r7, #16
8002cc4: 4619 mov r1, r3
8002cc6: 481c ldr r0, [pc, #112] @ (8002d38 <MX_GPIO_Init+0x150>)
8002cc8: f002 fd3c bl 8005744 <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
8002ccc: f640 433e movw r3, #3134 @ 0xc3e
8002cd0: 613b str r3, [r7, #16]
|EXP1_Pin|EXP2_Pin|EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8002cd2: 2301 movs r3, #1
8002cd4: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002cd6: 2300 movs r3, #0
8002cd8: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002cda: 2302 movs r3, #2
8002cdc: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8002cde: f107 0310 add.w r3, r7, #16
8002ce2: 4619 mov r1, r3
8002ce4: 4813 ldr r0, [pc, #76] @ (8002d34 <MX_GPIO_Init+0x14c>)
8002ce6: f002 fd2d bl 8005744 <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin;
8002cea: f44f 4370 mov.w r3, #61440 @ 0xf000
8002cee: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8002cf0: 2300 movs r3, #0
8002cf2: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002cf4: 2300 movs r3, #0
8002cf6: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8002cf8: f107 0310 add.w r3, r7, #16
8002cfc: 4619 mov r1, r3
8002cfe: 480d ldr r0, [pc, #52] @ (8002d34 <MX_GPIO_Init+0x14c>)
8002d00: f002 fd20 bl 8005744 <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin;
8002d04: f44f 4301 mov.w r3, #33024 @ 0x8100
8002d08: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8002d0a: 2301 movs r3, #1
8002d0c: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8002d0e: 2300 movs r3, #0
8002d10: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8002d12: 2302 movs r3, #2
8002d14: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8002d16: f107 0310 add.w r3, r7, #16
8002d1a: 4619 mov r1, r3
8002d1c: 4806 ldr r0, [pc, #24] @ (8002d38 <MX_GPIO_Init+0x150>)
8002d1e: f002 fd11 bl 8005744 <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
8002d22: bf00 nop
8002d24: 3720 adds r7, #32
8002d26: 46bd mov sp, r7
8002d28: bd80 pop {r7, pc}
8002d2a: bf00 nop
8002d2c: 40021000 .word 0x40021000
8002d30: 40011000 .word 0x40011000
8002d34: 40010c00 .word 0x40010c00
8002d38: 40010800 .word 0x40010800
08002d3c <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
8002d3c: b480 push {r7}
8002d3e: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
8002d40: b672 cpsid i
}
8002d42: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
8002d44: bf00 nop
8002d46: e7fd b.n 8002d44 <Error_Handler+0x8>
08002d48 <m1ap>:
extern uint16_t m4pwmap;
extern uint16_t m4pwmch;
extern uint16_t mrampstart[4];
extern uint16_t tramp;
motMov_st m1ap(void){
8002d48: b580 push {r7, lr}
8002d4a: b082 sub sp, #8
8002d4c: af02 add r7, sp, #8
static motMov_st m1st;
if(rtCiclo<apM1start)m1st=motWaiting;
8002d4e: 4b4e ldr r3, [pc, #312] @ (8002e88 <m1ap+0x140>)
8002d50: 881b ldrh r3, [r3, #0]
8002d52: b29a uxth r2, r3
8002d54: 4b4d ldr r3, [pc, #308] @ (8002e8c <m1ap+0x144>)
8002d56: 881b ldrh r3, [r3, #0]
8002d58: 429a cmp r2, r3
8002d5a: d202 bcs.n 8002d62 <m1ap+0x1a>
8002d5c: 4b4c ldr r3, [pc, #304] @ (8002e90 <m1ap+0x148>)
8002d5e: 2200 movs r2, #0
8002d60: 701a strb r2, [r3, #0]
switch(m1st){
8002d62: 4b4b ldr r3, [pc, #300] @ (8002e90 <m1ap+0x148>)
8002d64: 781b ldrb r3, [r3, #0]
8002d66: 2b03 cmp r3, #3
8002d68: d876 bhi.n 8002e58 <m1ap+0x110>
8002d6a: a201 add r2, pc, #4 @ (adr r2, 8002d70 <m1ap+0x28>)
8002d6c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002d70: 08002d81 .word 0x08002d81
8002d74: 08002dcd .word 0x08002dcd
8002d78: 08002dfd .word 0x08002dfd
8002d7c: 08002e2f .word 0x08002e2f
case motWaiting:
SetMotPerc(M1,FW,0);
8002d80: 2200 movs r2, #0
8002d82: 2100 movs r1, #0
8002d84: 2001 movs r0, #1
8002d86: f000 ff3f bl 8003c08 <SetMotPerc>
SetMotPerc(M1,BW,0);
8002d8a: 2200 movs r2, #0
8002d8c: 2101 movs r1, #1
8002d8e: 2001 movs r0, #1
8002d90: f000 ff3a bl 8003c08 <SetMotPerc>
if(rtCiclo>=apM1start){
8002d94: 4b3c ldr r3, [pc, #240] @ (8002e88 <m1ap+0x140>)
8002d96: 881b ldrh r3, [r3, #0]
8002d98: b29a uxth r2, r3
8002d9a: 4b3c ldr r3, [pc, #240] @ (8002e8c <m1ap+0x144>)
8002d9c: 881b ldrh r3, [r3, #0]
8002d9e: 429a cmp r2, r3
8002da0: d365 bcc.n 8002e6e <m1ap+0x126>
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT);
8002da2: 4b3c ldr r3, [pc, #240] @ (8002e94 <m1ap+0x14c>)
8002da4: 881b ldrh r3, [r3, #0]
8002da6: b2da uxtb r2, r3
8002da8: 4b3b ldr r3, [pc, #236] @ (8002e98 <m1ap+0x150>)
8002daa: 881b ldrh r3, [r3, #0]
8002dac: b2d9 uxtb r1, r3
8002dae: 4b3b ldr r3, [pc, #236] @ (8002e9c <m1ap+0x154>)
8002db0: 881b ldrh r3, [r3, #0]
8002db2: b2db uxtb r3, r3
8002db4: 2000 movs r0, #0
8002db6: 9001 str r0, [sp, #4]
8002db8: 9300 str r3, [sp, #0]
8002dba: 460b mov r3, r1
8002dbc: 2101 movs r1, #1
8002dbe: 2001 movs r0, #1
8002dc0: f001 f8a2 bl 8003f08 <ramp>
m1st=motStartRamp;
8002dc4: 4b32 ldr r3, [pc, #200] @ (8002e90 <m1ap+0x148>)
8002dc6: 2201 movs r2, #1
8002dc8: 701a strb r2, [r3, #0]
}
break;
8002dca: e050 b.n 8002e6e <m1ap+0x126>
case motStartRamp:
if(ramp(M1,BW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){
8002dcc: 4b31 ldr r3, [pc, #196] @ (8002e94 <m1ap+0x14c>)
8002dce: 881b ldrh r3, [r3, #0]
8002dd0: b2da uxtb r2, r3
8002dd2: 4b31 ldr r3, [pc, #196] @ (8002e98 <m1ap+0x150>)
8002dd4: 881b ldrh r3, [r3, #0]
8002dd6: b2d9 uxtb r1, r3
8002dd8: 4b30 ldr r3, [pc, #192] @ (8002e9c <m1ap+0x154>)
8002dda: 881b ldrh r3, [r3, #0]
8002ddc: b2db uxtb r3, r3
8002dde: 200a movs r0, #10
8002de0: 9001 str r0, [sp, #4]
8002de2: 9300 str r3, [sp, #0]
8002de4: 460b mov r3, r1
8002de6: 2101 movs r1, #1
8002de8: 2001 movs r0, #1
8002dea: f001 f88d bl 8003f08 <ramp>
8002dee: 4603 mov r3, r0
8002df0: 2b00 cmp r3, #0
8002df2: d13e bne.n 8002e72 <m1ap+0x12a>
m1st=motWaitingTime;
8002df4: 4b26 ldr r3, [pc, #152] @ (8002e90 <m1ap+0x148>)
8002df6: 2202 movs r2, #2
8002df8: 701a strb r2, [r3, #0]
}
break;
8002dfa: e03a b.n 8002e72 <m1ap+0x12a>
case motWaitingTime:
if(rtCiclo>=apM1stop){
8002dfc: 4b22 ldr r3, [pc, #136] @ (8002e88 <m1ap+0x140>)
8002dfe: 881b ldrh r3, [r3, #0]
8002e00: b29a uxth r2, r3
8002e02: 4b27 ldr r3, [pc, #156] @ (8002ea0 <m1ap+0x158>)
8002e04: 881b ldrh r3, [r3, #0]
8002e06: 429a cmp r2, r3
8002e08: d335 bcc.n 8002e76 <m1ap+0x12e>
(void)ramp(M1,BW,m1pwmap,0,tramp,RAMPINIT);
8002e0a: 4b23 ldr r3, [pc, #140] @ (8002e98 <m1ap+0x150>)
8002e0c: 881b ldrh r3, [r3, #0]
8002e0e: b2da uxtb r2, r3
8002e10: 4b22 ldr r3, [pc, #136] @ (8002e9c <m1ap+0x154>)
8002e12: 881b ldrh r3, [r3, #0]
8002e14: b2db uxtb r3, r3
8002e16: 2100 movs r1, #0
8002e18: 9101 str r1, [sp, #4]
8002e1a: 9300 str r3, [sp, #0]
8002e1c: 2300 movs r3, #0
8002e1e: 2101 movs r1, #1
8002e20: 2001 movs r0, #1
8002e22: f001 f871 bl 8003f08 <ramp>
m1st=motStopRamp;
8002e26: 4b1a ldr r3, [pc, #104] @ (8002e90 <m1ap+0x148>)
8002e28: 2203 movs r2, #3
8002e2a: 701a strb r2, [r3, #0]
}
break;
8002e2c: e023 b.n 8002e76 <m1ap+0x12e>
case motStopRamp:
if(ramp(M1,BW,m1pwmap,0,tramp,RAMPRUN)==DONE){
8002e2e: 4b1a ldr r3, [pc, #104] @ (8002e98 <m1ap+0x150>)
8002e30: 881b ldrh r3, [r3, #0]
8002e32: b2da uxtb r2, r3
8002e34: 4b19 ldr r3, [pc, #100] @ (8002e9c <m1ap+0x154>)
8002e36: 881b ldrh r3, [r3, #0]
8002e38: b2db uxtb r3, r3
8002e3a: 210a movs r1, #10
8002e3c: 9101 str r1, [sp, #4]
8002e3e: 9300 str r3, [sp, #0]
8002e40: 2300 movs r3, #0
8002e42: 2101 movs r1, #1
8002e44: 2001 movs r0, #1
8002e46: f001 f85f bl 8003f08 <ramp>
8002e4a: 4603 mov r3, r0
8002e4c: 2b00 cmp r3, #0
8002e4e: d114 bne.n 8002e7a <m1ap+0x132>
m1st=motStop;
8002e50: 4b0f ldr r3, [pc, #60] @ (8002e90 <m1ap+0x148>)
8002e52: 2204 movs r2, #4
8002e54: 701a strb r2, [r3, #0]
}
break;
8002e56: e010 b.n 8002e7a <m1ap+0x132>
case motStop:
default:
SetMotPerc(M1,FW,0);
8002e58: 2200 movs r2, #0
8002e5a: 2100 movs r1, #0
8002e5c: 2001 movs r0, #1
8002e5e: f000 fed3 bl 8003c08 <SetMotPerc>
SetMotPerc(M1,BW,0);
8002e62: 2200 movs r2, #0
8002e64: 2101 movs r1, #1
8002e66: 2001 movs r0, #1
8002e68: f000 fece bl 8003c08 <SetMotPerc>
break;
8002e6c: e006 b.n 8002e7c <m1ap+0x134>
break;
8002e6e: bf00 nop
8002e70: e004 b.n 8002e7c <m1ap+0x134>
break;
8002e72: bf00 nop
8002e74: e002 b.n 8002e7c <m1ap+0x134>
break;
8002e76: bf00 nop
8002e78: e000 b.n 8002e7c <m1ap+0x134>
break;
8002e7a: bf00 nop
}
return m1st;
8002e7c: 4b04 ldr r3, [pc, #16] @ (8002e90 <m1ap+0x148>)
8002e7e: 781b ldrb r3, [r3, #0]
}
8002e80: 4618 mov r0, r3
8002e82: 46bd mov sp, r7
8002e84: bd80 pop {r7, pc}
8002e86: bf00 nop
8002e88: 200003f4 .word 0x200003f4
8002e8c: 2000041c .word 0x2000041c
8002e90: 20000452 .word 0x20000452
8002e94: 2000043c .word 0x2000043c
8002e98: 200003f6 .word 0x200003f6
8002e9c: 2000040e .word 0x2000040e
8002ea0: 2000041e .word 0x2000041e
08002ea4 <m2ap>:
motMov_st m2ap(void){
8002ea4: b580 push {r7, lr}
8002ea6: b082 sub sp, #8
8002ea8: af02 add r7, sp, #8
static motMov_st m2st;
if(rtCiclo<apM2start)m2st=motWaiting;
8002eaa: 4b4e ldr r3, [pc, #312] @ (8002fe4 <m2ap+0x140>)
8002eac: 881b ldrh r3, [r3, #0]
8002eae: b29a uxth r2, r3
8002eb0: 4b4d ldr r3, [pc, #308] @ (8002fe8 <m2ap+0x144>)
8002eb2: 881b ldrh r3, [r3, #0]
8002eb4: 429a cmp r2, r3
8002eb6: d202 bcs.n 8002ebe <m2ap+0x1a>
8002eb8: 4b4c ldr r3, [pc, #304] @ (8002fec <m2ap+0x148>)
8002eba: 2200 movs r2, #0
8002ebc: 701a strb r2, [r3, #0]
switch(m2st){
8002ebe: 4b4b ldr r3, [pc, #300] @ (8002fec <m2ap+0x148>)
8002ec0: 781b ldrb r3, [r3, #0]
8002ec2: 2b03 cmp r3, #3
8002ec4: d876 bhi.n 8002fb4 <m2ap+0x110>
8002ec6: a201 add r2, pc, #4 @ (adr r2, 8002ecc <m2ap+0x28>)
8002ec8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002ecc: 08002edd .word 0x08002edd
8002ed0: 08002f29 .word 0x08002f29
8002ed4: 08002f59 .word 0x08002f59
8002ed8: 08002f8b .word 0x08002f8b
case motWaiting:
SetMotPerc(M2,FW,0);
8002edc: 2200 movs r2, #0
8002ede: 2100 movs r1, #0
8002ee0: 2002 movs r0, #2
8002ee2: f000 fe91 bl 8003c08 <SetMotPerc>
SetMotPerc(M2,BW,0);
8002ee6: 2200 movs r2, #0
8002ee8: 2101 movs r1, #1
8002eea: 2002 movs r0, #2
8002eec: f000 fe8c bl 8003c08 <SetMotPerc>
if(rtCiclo>=apM2start){
8002ef0: 4b3c ldr r3, [pc, #240] @ (8002fe4 <m2ap+0x140>)
8002ef2: 881b ldrh r3, [r3, #0]
8002ef4: b29a uxth r2, r3
8002ef6: 4b3c ldr r3, [pc, #240] @ (8002fe8 <m2ap+0x144>)
8002ef8: 881b ldrh r3, [r3, #0]
8002efa: 429a cmp r2, r3
8002efc: d365 bcc.n 8002fca <m2ap+0x126>
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT);
8002efe: 4b3c ldr r3, [pc, #240] @ (8002ff0 <m2ap+0x14c>)
8002f00: 885b ldrh r3, [r3, #2]
8002f02: b2da uxtb r2, r3
8002f04: 4b3b ldr r3, [pc, #236] @ (8002ff4 <m2ap+0x150>)
8002f06: 881b ldrh r3, [r3, #0]
8002f08: b2d9 uxtb r1, r3
8002f0a: 4b3b ldr r3, [pc, #236] @ (8002ff8 <m2ap+0x154>)
8002f0c: 881b ldrh r3, [r3, #0]
8002f0e: b2db uxtb r3, r3
8002f10: 2000 movs r0, #0
8002f12: 9001 str r0, [sp, #4]
8002f14: 9300 str r3, [sp, #0]
8002f16: 460b mov r3, r1
8002f18: 2101 movs r1, #1
8002f1a: 2002 movs r0, #2
8002f1c: f000 fff4 bl 8003f08 <ramp>
m2st=motStartRamp;
8002f20: 4b32 ldr r3, [pc, #200] @ (8002fec <m2ap+0x148>)
8002f22: 2201 movs r2, #1
8002f24: 701a strb r2, [r3, #0]
}
break;
8002f26: e050 b.n 8002fca <m2ap+0x126>
case motStartRamp:
if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){
8002f28: 4b31 ldr r3, [pc, #196] @ (8002ff0 <m2ap+0x14c>)
8002f2a: 885b ldrh r3, [r3, #2]
8002f2c: b2da uxtb r2, r3
8002f2e: 4b31 ldr r3, [pc, #196] @ (8002ff4 <m2ap+0x150>)
8002f30: 881b ldrh r3, [r3, #0]
8002f32: b2d9 uxtb r1, r3
8002f34: 4b30 ldr r3, [pc, #192] @ (8002ff8 <m2ap+0x154>)
8002f36: 881b ldrh r3, [r3, #0]
8002f38: b2db uxtb r3, r3
8002f3a: 200a movs r0, #10
8002f3c: 9001 str r0, [sp, #4]
8002f3e: 9300 str r3, [sp, #0]
8002f40: 460b mov r3, r1
8002f42: 2101 movs r1, #1
8002f44: 2002 movs r0, #2
8002f46: f000 ffdf bl 8003f08 <ramp>
8002f4a: 4603 mov r3, r0
8002f4c: 2b00 cmp r3, #0
8002f4e: d13e bne.n 8002fce <m2ap+0x12a>
m2st=motWaitingTime;
8002f50: 4b26 ldr r3, [pc, #152] @ (8002fec <m2ap+0x148>)
8002f52: 2202 movs r2, #2
8002f54: 701a strb r2, [r3, #0]
}
break;
8002f56: e03a b.n 8002fce <m2ap+0x12a>
case motWaitingTime:
if(rtCiclo>=apM2stop){
8002f58: 4b22 ldr r3, [pc, #136] @ (8002fe4 <m2ap+0x140>)
8002f5a: 881b ldrh r3, [r3, #0]
8002f5c: b29a uxth r2, r3
8002f5e: 4b27 ldr r3, [pc, #156] @ (8002ffc <m2ap+0x158>)
8002f60: 881b ldrh r3, [r3, #0]
8002f62: 429a cmp r2, r3
8002f64: d335 bcc.n 8002fd2 <m2ap+0x12e>
(void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT);
8002f66: 4b23 ldr r3, [pc, #140] @ (8002ff4 <m2ap+0x150>)
8002f68: 881b ldrh r3, [r3, #0]
8002f6a: b2da uxtb r2, r3
8002f6c: 4b22 ldr r3, [pc, #136] @ (8002ff8 <m2ap+0x154>)
8002f6e: 881b ldrh r3, [r3, #0]
8002f70: b2db uxtb r3, r3
8002f72: 2100 movs r1, #0
8002f74: 9101 str r1, [sp, #4]
8002f76: 9300 str r3, [sp, #0]
8002f78: 2300 movs r3, #0
8002f7a: 2101 movs r1, #1
8002f7c: 2002 movs r0, #2
8002f7e: f000 ffc3 bl 8003f08 <ramp>
m2st=motStopRamp;
8002f82: 4b1a ldr r3, [pc, #104] @ (8002fec <m2ap+0x148>)
8002f84: 2203 movs r2, #3
8002f86: 701a strb r2, [r3, #0]
}
break;
8002f88: e023 b.n 8002fd2 <m2ap+0x12e>
case motStopRamp:
if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){
8002f8a: 4b1a ldr r3, [pc, #104] @ (8002ff4 <m2ap+0x150>)
8002f8c: 881b ldrh r3, [r3, #0]
8002f8e: b2da uxtb r2, r3
8002f90: 4b19 ldr r3, [pc, #100] @ (8002ff8 <m2ap+0x154>)
8002f92: 881b ldrh r3, [r3, #0]
8002f94: b2db uxtb r3, r3
8002f96: 210a movs r1, #10
8002f98: 9101 str r1, [sp, #4]
8002f9a: 9300 str r3, [sp, #0]
8002f9c: 2300 movs r3, #0
8002f9e: 2101 movs r1, #1
8002fa0: 2002 movs r0, #2
8002fa2: f000 ffb1 bl 8003f08 <ramp>
8002fa6: 4603 mov r3, r0
8002fa8: 2b00 cmp r3, #0
8002faa: d114 bne.n 8002fd6 <m2ap+0x132>
m2st=motStop;
8002fac: 4b0f ldr r3, [pc, #60] @ (8002fec <m2ap+0x148>)
8002fae: 2204 movs r2, #4
8002fb0: 701a strb r2, [r3, #0]
}
break;
8002fb2: e010 b.n 8002fd6 <m2ap+0x132>
case motStop:
default:
SetMotPerc(M2,FW,0);
8002fb4: 2200 movs r2, #0
8002fb6: 2100 movs r1, #0
8002fb8: 2002 movs r0, #2
8002fba: f000 fe25 bl 8003c08 <SetMotPerc>
SetMotPerc(M2,BW,0);
8002fbe: 2200 movs r2, #0
8002fc0: 2101 movs r1, #1
8002fc2: 2002 movs r0, #2
8002fc4: f000 fe20 bl 8003c08 <SetMotPerc>
break;
8002fc8: e006 b.n 8002fd8 <m2ap+0x134>
break;
8002fca: bf00 nop
8002fcc: e004 b.n 8002fd8 <m2ap+0x134>
break;
8002fce: bf00 nop
8002fd0: e002 b.n 8002fd8 <m2ap+0x134>
break;
8002fd2: bf00 nop
8002fd4: e000 b.n 8002fd8 <m2ap+0x134>
break;
8002fd6: bf00 nop
}
return m2st;
8002fd8: 4b04 ldr r3, [pc, #16] @ (8002fec <m2ap+0x148>)
8002fda: 781b ldrb r3, [r3, #0]
}
8002fdc: 4618 mov r0, r3
8002fde: 46bd mov sp, r7
8002fe0: bd80 pop {r7, pc}
8002fe2: bf00 nop
8002fe4: 200003f4 .word 0x200003f4
8002fe8: 20000420 .word 0x20000420
8002fec: 20000453 .word 0x20000453
8002ff0: 2000043c .word 0x2000043c
8002ff4: 200003fa .word 0x200003fa
8002ff8: 2000040e .word 0x2000040e
8002ffc: 20000422 .word 0x20000422
08003000 <m3ap>:
motMov_st m3ap(void){
8003000: b580 push {r7, lr}
8003002: b082 sub sp, #8
8003004: af02 add r7, sp, #8
static motMov_st m3st;
if(rtCiclo<apM3start)m3st=motWaiting;
8003006: 4b4e ldr r3, [pc, #312] @ (8003140 <m3ap+0x140>)
8003008: 881b ldrh r3, [r3, #0]
800300a: b29a uxth r2, r3
800300c: 4b4d ldr r3, [pc, #308] @ (8003144 <m3ap+0x144>)
800300e: 881b ldrh r3, [r3, #0]
8003010: 429a cmp r2, r3
8003012: d202 bcs.n 800301a <m3ap+0x1a>
8003014: 4b4c ldr r3, [pc, #304] @ (8003148 <m3ap+0x148>)
8003016: 2200 movs r2, #0
8003018: 701a strb r2, [r3, #0]
switch(m3st){
800301a: 4b4b ldr r3, [pc, #300] @ (8003148 <m3ap+0x148>)
800301c: 781b ldrb r3, [r3, #0]
800301e: 2b03 cmp r3, #3
8003020: d876 bhi.n 8003110 <m3ap+0x110>
8003022: a201 add r2, pc, #4 @ (adr r2, 8003028 <m3ap+0x28>)
8003024: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003028: 08003039 .word 0x08003039
800302c: 08003085 .word 0x08003085
8003030: 080030b5 .word 0x080030b5
8003034: 080030e7 .word 0x080030e7
case motWaiting:
SetMotPerc(M3,FW,0);
8003038: 2200 movs r2, #0
800303a: 2100 movs r1, #0
800303c: 2003 movs r0, #3
800303e: f000 fde3 bl 8003c08 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003042: 2200 movs r2, #0
8003044: 2101 movs r1, #1
8003046: 2003 movs r0, #3
8003048: f000 fdde bl 8003c08 <SetMotPerc>
if(rtCiclo>=apM3start){
800304c: 4b3c ldr r3, [pc, #240] @ (8003140 <m3ap+0x140>)
800304e: 881b ldrh r3, [r3, #0]
8003050: b29a uxth r2, r3
8003052: 4b3c ldr r3, [pc, #240] @ (8003144 <m3ap+0x144>)
8003054: 881b ldrh r3, [r3, #0]
8003056: 429a cmp r2, r3
8003058: d365 bcc.n 8003126 <m3ap+0x126>
(void)ramp(M3,BW,mrampstart[M3-1],m2pwmap,tramp,RAMPINIT);
800305a: 4b3c ldr r3, [pc, #240] @ (800314c <m3ap+0x14c>)
800305c: 889b ldrh r3, [r3, #4]
800305e: b2da uxtb r2, r3
8003060: 4b3b ldr r3, [pc, #236] @ (8003150 <m3ap+0x150>)
8003062: 881b ldrh r3, [r3, #0]
8003064: b2d9 uxtb r1, r3
8003066: 4b3b ldr r3, [pc, #236] @ (8003154 <m3ap+0x154>)
8003068: 881b ldrh r3, [r3, #0]
800306a: b2db uxtb r3, r3
800306c: 2000 movs r0, #0
800306e: 9001 str r0, [sp, #4]
8003070: 9300 str r3, [sp, #0]
8003072: 460b mov r3, r1
8003074: 2101 movs r1, #1
8003076: 2003 movs r0, #3
8003078: f000 ff46 bl 8003f08 <ramp>
m3st=motStartRamp;
800307c: 4b32 ldr r3, [pc, #200] @ (8003148 <m3ap+0x148>)
800307e: 2201 movs r2, #1
8003080: 701a strb r2, [r3, #0]
}
break;
8003082: e050 b.n 8003126 <m3ap+0x126>
case motStartRamp:
if(ramp(M3,BW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){
8003084: 4b31 ldr r3, [pc, #196] @ (800314c <m3ap+0x14c>)
8003086: 889b ldrh r3, [r3, #4]
8003088: b2da uxtb r2, r3
800308a: 4b33 ldr r3, [pc, #204] @ (8003158 <m3ap+0x158>)
800308c: 881b ldrh r3, [r3, #0]
800308e: b2d9 uxtb r1, r3
8003090: 4b30 ldr r3, [pc, #192] @ (8003154 <m3ap+0x154>)
8003092: 881b ldrh r3, [r3, #0]
8003094: b2db uxtb r3, r3
8003096: 200a movs r0, #10
8003098: 9001 str r0, [sp, #4]
800309a: 9300 str r3, [sp, #0]
800309c: 460b mov r3, r1
800309e: 2101 movs r1, #1
80030a0: 2003 movs r0, #3
80030a2: f000 ff31 bl 8003f08 <ramp>
80030a6: 4603 mov r3, r0
80030a8: 2b00 cmp r3, #0
80030aa: d13e bne.n 800312a <m3ap+0x12a>
m3st=motWaitingTime;
80030ac: 4b26 ldr r3, [pc, #152] @ (8003148 <m3ap+0x148>)
80030ae: 2202 movs r2, #2
80030b0: 701a strb r2, [r3, #0]
}
break;
80030b2: e03a b.n 800312a <m3ap+0x12a>
case motWaitingTime:
if(rtCiclo>=apM3stop){
80030b4: 4b22 ldr r3, [pc, #136] @ (8003140 <m3ap+0x140>)
80030b6: 881b ldrh r3, [r3, #0]
80030b8: b29a uxth r2, r3
80030ba: 4b28 ldr r3, [pc, #160] @ (800315c <m3ap+0x15c>)
80030bc: 881b ldrh r3, [r3, #0]
80030be: 429a cmp r2, r3
80030c0: d335 bcc.n 800312e <m3ap+0x12e>
(void)ramp(M3,BW,m3pwmap,0,tramp,RAMPINIT);
80030c2: 4b25 ldr r3, [pc, #148] @ (8003158 <m3ap+0x158>)
80030c4: 881b ldrh r3, [r3, #0]
80030c6: b2da uxtb r2, r3
80030c8: 4b22 ldr r3, [pc, #136] @ (8003154 <m3ap+0x154>)
80030ca: 881b ldrh r3, [r3, #0]
80030cc: b2db uxtb r3, r3
80030ce: 2100 movs r1, #0
80030d0: 9101 str r1, [sp, #4]
80030d2: 9300 str r3, [sp, #0]
80030d4: 2300 movs r3, #0
80030d6: 2101 movs r1, #1
80030d8: 2003 movs r0, #3
80030da: f000 ff15 bl 8003f08 <ramp>
m3st=motStopRamp;
80030de: 4b1a ldr r3, [pc, #104] @ (8003148 <m3ap+0x148>)
80030e0: 2203 movs r2, #3
80030e2: 701a strb r2, [r3, #0]
}
break;
80030e4: e023 b.n 800312e <m3ap+0x12e>
case motStopRamp:
if(ramp(M3,BW,m3pwmap,0,tramp,RAMPRUN)==DONE){
80030e6: 4b1c ldr r3, [pc, #112] @ (8003158 <m3ap+0x158>)
80030e8: 881b ldrh r3, [r3, #0]
80030ea: b2da uxtb r2, r3
80030ec: 4b19 ldr r3, [pc, #100] @ (8003154 <m3ap+0x154>)
80030ee: 881b ldrh r3, [r3, #0]
80030f0: b2db uxtb r3, r3
80030f2: 210a movs r1, #10
80030f4: 9101 str r1, [sp, #4]
80030f6: 9300 str r3, [sp, #0]
80030f8: 2300 movs r3, #0
80030fa: 2101 movs r1, #1
80030fc: 2003 movs r0, #3
80030fe: f000 ff03 bl 8003f08 <ramp>
8003102: 4603 mov r3, r0
8003104: 2b00 cmp r3, #0
8003106: d114 bne.n 8003132 <m3ap+0x132>
m3st=motStop;
8003108: 4b0f ldr r3, [pc, #60] @ (8003148 <m3ap+0x148>)
800310a: 2204 movs r2, #4
800310c: 701a strb r2, [r3, #0]
}
break;
800310e: e010 b.n 8003132 <m3ap+0x132>
case motStop:
default:
SetMotPerc(M3,FW,0);
8003110: 2200 movs r2, #0
8003112: 2100 movs r1, #0
8003114: 2003 movs r0, #3
8003116: f000 fd77 bl 8003c08 <SetMotPerc>
SetMotPerc(M3,BW,0);
800311a: 2200 movs r2, #0
800311c: 2101 movs r1, #1
800311e: 2003 movs r0, #3
8003120: f000 fd72 bl 8003c08 <SetMotPerc>
break;
8003124: e006 b.n 8003134 <m3ap+0x134>
break;
8003126: bf00 nop
8003128: e004 b.n 8003134 <m3ap+0x134>
break;
800312a: bf00 nop
800312c: e002 b.n 8003134 <m3ap+0x134>
break;
800312e: bf00 nop
8003130: e000 b.n 8003134 <m3ap+0x134>
break;
8003132: bf00 nop
}
return m3st;
8003134: 4b04 ldr r3, [pc, #16] @ (8003148 <m3ap+0x148>)
8003136: 781b ldrb r3, [r3, #0]
}
8003138: 4618 mov r0, r3
800313a: 46bd mov sp, r7
800313c: bd80 pop {r7, pc}
800313e: bf00 nop
8003140: 200003f4 .word 0x200003f4
8003144: 20000424 .word 0x20000424
8003148: 20000454 .word 0x20000454
800314c: 2000043c .word 0x2000043c
8003150: 200003fa .word 0x200003fa
8003154: 2000040e .word 0x2000040e
8003158: 200003fe .word 0x200003fe
800315c: 20000426 .word 0x20000426
08003160 <m4ap>:
motMov_st m4ap(void){
8003160: b580 push {r7, lr}
8003162: b082 sub sp, #8
8003164: af02 add r7, sp, #8
static motMov_st m4st;
if(rtCiclo<apM4start)m4st=motWaiting;
8003166: 4b4e ldr r3, [pc, #312] @ (80032a0 <m4ap+0x140>)
8003168: 881b ldrh r3, [r3, #0]
800316a: b29a uxth r2, r3
800316c: 4b4d ldr r3, [pc, #308] @ (80032a4 <m4ap+0x144>)
800316e: 881b ldrh r3, [r3, #0]
8003170: 429a cmp r2, r3
8003172: d202 bcs.n 800317a <m4ap+0x1a>
8003174: 4b4c ldr r3, [pc, #304] @ (80032a8 <m4ap+0x148>)
8003176: 2200 movs r2, #0
8003178: 701a strb r2, [r3, #0]
switch(m4st){
800317a: 4b4b ldr r3, [pc, #300] @ (80032a8 <m4ap+0x148>)
800317c: 781b ldrb r3, [r3, #0]
800317e: 2b03 cmp r3, #3
8003180: d876 bhi.n 8003270 <m4ap+0x110>
8003182: a201 add r2, pc, #4 @ (adr r2, 8003188 <m4ap+0x28>)
8003184: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003188: 08003199 .word 0x08003199
800318c: 080031e5 .word 0x080031e5
8003190: 08003215 .word 0x08003215
8003194: 08003247 .word 0x08003247
case motWaiting:
SetMotPerc(M4,FW,0);
8003198: 2200 movs r2, #0
800319a: 2100 movs r1, #0
800319c: 2004 movs r0, #4
800319e: f000 fd33 bl 8003c08 <SetMotPerc>
SetMotPerc(M4,BW,0);
80031a2: 2200 movs r2, #0
80031a4: 2101 movs r1, #1
80031a6: 2004 movs r0, #4
80031a8: f000 fd2e bl 8003c08 <SetMotPerc>
if(rtCiclo>=apM4start){
80031ac: 4b3c ldr r3, [pc, #240] @ (80032a0 <m4ap+0x140>)
80031ae: 881b ldrh r3, [r3, #0]
80031b0: b29a uxth r2, r3
80031b2: 4b3c ldr r3, [pc, #240] @ (80032a4 <m4ap+0x144>)
80031b4: 881b ldrh r3, [r3, #0]
80031b6: 429a cmp r2, r3
80031b8: d365 bcc.n 8003286 <m4ap+0x126>
(void)ramp(M4,BW,mrampstart[M4-1],m2pwmap,tramp,RAMPINIT);
80031ba: 4b3c ldr r3, [pc, #240] @ (80032ac <m4ap+0x14c>)
80031bc: 88db ldrh r3, [r3, #6]
80031be: b2da uxtb r2, r3
80031c0: 4b3b ldr r3, [pc, #236] @ (80032b0 <m4ap+0x150>)
80031c2: 881b ldrh r3, [r3, #0]
80031c4: b2d9 uxtb r1, r3
80031c6: 4b3b ldr r3, [pc, #236] @ (80032b4 <m4ap+0x154>)
80031c8: 881b ldrh r3, [r3, #0]
80031ca: b2db uxtb r3, r3
80031cc: 2000 movs r0, #0
80031ce: 9001 str r0, [sp, #4]
80031d0: 9300 str r3, [sp, #0]
80031d2: 460b mov r3, r1
80031d4: 2101 movs r1, #1
80031d6: 2004 movs r0, #4
80031d8: f000 fe96 bl 8003f08 <ramp>
m4st=motStartRamp;
80031dc: 4b32 ldr r3, [pc, #200] @ (80032a8 <m4ap+0x148>)
80031de: 2201 movs r2, #1
80031e0: 701a strb r2, [r3, #0]
}
break;
80031e2: e050 b.n 8003286 <m4ap+0x126>
case motStartRamp:
if(ramp(M4,BW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){
80031e4: 4b31 ldr r3, [pc, #196] @ (80032ac <m4ap+0x14c>)
80031e6: 88db ldrh r3, [r3, #6]
80031e8: b2da uxtb r2, r3
80031ea: 4b33 ldr r3, [pc, #204] @ (80032b8 <m4ap+0x158>)
80031ec: 881b ldrh r3, [r3, #0]
80031ee: b2d9 uxtb r1, r3
80031f0: 4b30 ldr r3, [pc, #192] @ (80032b4 <m4ap+0x154>)
80031f2: 881b ldrh r3, [r3, #0]
80031f4: b2db uxtb r3, r3
80031f6: 200a movs r0, #10
80031f8: 9001 str r0, [sp, #4]
80031fa: 9300 str r3, [sp, #0]
80031fc: 460b mov r3, r1
80031fe: 2101 movs r1, #1
8003200: 2004 movs r0, #4
8003202: f000 fe81 bl 8003f08 <ramp>
8003206: 4603 mov r3, r0
8003208: 2b00 cmp r3, #0
800320a: d13e bne.n 800328a <m4ap+0x12a>
m4st=motWaitingTime;
800320c: 4b26 ldr r3, [pc, #152] @ (80032a8 <m4ap+0x148>)
800320e: 2202 movs r2, #2
8003210: 701a strb r2, [r3, #0]
}
break;
8003212: e03a b.n 800328a <m4ap+0x12a>
case motWaitingTime:
if(rtCiclo>=apM4stop){
8003214: 4b22 ldr r3, [pc, #136] @ (80032a0 <m4ap+0x140>)
8003216: 881b ldrh r3, [r3, #0]
8003218: b29a uxth r2, r3
800321a: 4b28 ldr r3, [pc, #160] @ (80032bc <m4ap+0x15c>)
800321c: 881b ldrh r3, [r3, #0]
800321e: 429a cmp r2, r3
8003220: d335 bcc.n 800328e <m4ap+0x12e>
(void)ramp(M4,BW,m4pwmap,0,tramp,RAMPINIT);
8003222: 4b25 ldr r3, [pc, #148] @ (80032b8 <m4ap+0x158>)
8003224: 881b ldrh r3, [r3, #0]
8003226: b2da uxtb r2, r3
8003228: 4b22 ldr r3, [pc, #136] @ (80032b4 <m4ap+0x154>)
800322a: 881b ldrh r3, [r3, #0]
800322c: b2db uxtb r3, r3
800322e: 2100 movs r1, #0
8003230: 9101 str r1, [sp, #4]
8003232: 9300 str r3, [sp, #0]
8003234: 2300 movs r3, #0
8003236: 2101 movs r1, #1
8003238: 2004 movs r0, #4
800323a: f000 fe65 bl 8003f08 <ramp>
m4st=motStopRamp;
800323e: 4b1a ldr r3, [pc, #104] @ (80032a8 <m4ap+0x148>)
8003240: 2203 movs r2, #3
8003242: 701a strb r2, [r3, #0]
}
break;
8003244: e023 b.n 800328e <m4ap+0x12e>
case motStopRamp:
if(ramp(43,BW,m4pwmap,0,tramp,RAMPRUN)==DONE){
8003246: 4b1c ldr r3, [pc, #112] @ (80032b8 <m4ap+0x158>)
8003248: 881b ldrh r3, [r3, #0]
800324a: b2da uxtb r2, r3
800324c: 4b19 ldr r3, [pc, #100] @ (80032b4 <m4ap+0x154>)
800324e: 881b ldrh r3, [r3, #0]
8003250: b2db uxtb r3, r3
8003252: 210a movs r1, #10
8003254: 9101 str r1, [sp, #4]
8003256: 9300 str r3, [sp, #0]
8003258: 2300 movs r3, #0
800325a: 2101 movs r1, #1
800325c: 202b movs r0, #43 @ 0x2b
800325e: f000 fe53 bl 8003f08 <ramp>
8003262: 4603 mov r3, r0
8003264: 2b00 cmp r3, #0
8003266: d114 bne.n 8003292 <m4ap+0x132>
m4st=motStop;
8003268: 4b0f ldr r3, [pc, #60] @ (80032a8 <m4ap+0x148>)
800326a: 2204 movs r2, #4
800326c: 701a strb r2, [r3, #0]
}
break;
800326e: e010 b.n 8003292 <m4ap+0x132>
case motStop:
default:
SetMotPerc(M4,FW,0);
8003270: 2200 movs r2, #0
8003272: 2100 movs r1, #0
8003274: 2004 movs r0, #4
8003276: f000 fcc7 bl 8003c08 <SetMotPerc>
SetMotPerc(M4,BW,0);
800327a: 2200 movs r2, #0
800327c: 2101 movs r1, #1
800327e: 2004 movs r0, #4
8003280: f000 fcc2 bl 8003c08 <SetMotPerc>
break;
8003284: e006 b.n 8003294 <m4ap+0x134>
break;
8003286: bf00 nop
8003288: e004 b.n 8003294 <m4ap+0x134>
break;
800328a: bf00 nop
800328c: e002 b.n 8003294 <m4ap+0x134>
break;
800328e: bf00 nop
8003290: e000 b.n 8003294 <m4ap+0x134>
break;
8003292: bf00 nop
}
return m4st;
8003294: 4b04 ldr r3, [pc, #16] @ (80032a8 <m4ap+0x148>)
8003296: 781b ldrb r3, [r3, #0]
}
8003298: 4618 mov r0, r3
800329a: 46bd mov sp, r7
800329c: bd80 pop {r7, pc}
800329e: bf00 nop
80032a0: 200003f4 .word 0x200003f4
80032a4: 20000428 .word 0x20000428
80032a8: 20000455 .word 0x20000455
80032ac: 2000043c .word 0x2000043c
80032b0: 200003fa .word 0x200003fa
80032b4: 2000040e .word 0x2000040e
80032b8: 20000402 .word 0x20000402
80032bc: 2000042a .word 0x2000042a
080032c0 <m1ch>:
motMov_st m1ch(void){
80032c0: b580 push {r7, lr}
80032c2: b082 sub sp, #8
80032c4: af02 add r7, sp, #8
static motMov_st m1st;
if(rtCiclo<chM1start)m1st=motWaiting;
80032c6: 4b4e ldr r3, [pc, #312] @ (8003400 <m1ch+0x140>)
80032c8: 881b ldrh r3, [r3, #0]
80032ca: b29a uxth r2, r3
80032cc: 4b4d ldr r3, [pc, #308] @ (8003404 <m1ch+0x144>)
80032ce: 881b ldrh r3, [r3, #0]
80032d0: 429a cmp r2, r3
80032d2: d202 bcs.n 80032da <m1ch+0x1a>
80032d4: 4b4c ldr r3, [pc, #304] @ (8003408 <m1ch+0x148>)
80032d6: 2200 movs r2, #0
80032d8: 701a strb r2, [r3, #0]
switch(m1st){
80032da: 4b4b ldr r3, [pc, #300] @ (8003408 <m1ch+0x148>)
80032dc: 781b ldrb r3, [r3, #0]
80032de: 2b03 cmp r3, #3
80032e0: d876 bhi.n 80033d0 <m1ch+0x110>
80032e2: a201 add r2, pc, #4 @ (adr r2, 80032e8 <m1ch+0x28>)
80032e4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80032e8: 080032f9 .word 0x080032f9
80032ec: 08003345 .word 0x08003345
80032f0: 08003375 .word 0x08003375
80032f4: 080033a7 .word 0x080033a7
case motWaiting:
SetMotPerc(M1,FW,0);
80032f8: 2200 movs r2, #0
80032fa: 2100 movs r1, #0
80032fc: 2001 movs r0, #1
80032fe: f000 fc83 bl 8003c08 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003302: 2200 movs r2, #0
8003304: 2101 movs r1, #1
8003306: 2001 movs r0, #1
8003308: f000 fc7e bl 8003c08 <SetMotPerc>
if(rtCiclo>=chM1start){
800330c: 4b3c ldr r3, [pc, #240] @ (8003400 <m1ch+0x140>)
800330e: 881b ldrh r3, [r3, #0]
8003310: b29a uxth r2, r3
8003312: 4b3c ldr r3, [pc, #240] @ (8003404 <m1ch+0x144>)
8003314: 881b ldrh r3, [r3, #0]
8003316: 429a cmp r2, r3
8003318: d365 bcc.n 80033e6 <m1ch+0x126>
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
800331a: 4b3c ldr r3, [pc, #240] @ (800340c <m1ch+0x14c>)
800331c: 881b ldrh r3, [r3, #0]
800331e: b2da uxtb r2, r3
8003320: 4b3b ldr r3, [pc, #236] @ (8003410 <m1ch+0x150>)
8003322: 881b ldrh r3, [r3, #0]
8003324: b2d9 uxtb r1, r3
8003326: 4b3b ldr r3, [pc, #236] @ (8003414 <m1ch+0x154>)
8003328: 881b ldrh r3, [r3, #0]
800332a: b2db uxtb r3, r3
800332c: 2000 movs r0, #0
800332e: 9001 str r0, [sp, #4]
8003330: 9300 str r3, [sp, #0]
8003332: 460b mov r3, r1
8003334: 2100 movs r1, #0
8003336: 2001 movs r0, #1
8003338: f000 fde6 bl 8003f08 <ramp>
m1st=motStartRamp;
800333c: 4b32 ldr r3, [pc, #200] @ (8003408 <m1ch+0x148>)
800333e: 2201 movs r2, #1
8003340: 701a strb r2, [r3, #0]
}
break;
8003342: e050 b.n 80033e6 <m1ch+0x126>
case motStartRamp:
if(ramp(M1,FW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){
8003344: 4b31 ldr r3, [pc, #196] @ (800340c <m1ch+0x14c>)
8003346: 881b ldrh r3, [r3, #0]
8003348: b2da uxtb r2, r3
800334a: 4b31 ldr r3, [pc, #196] @ (8003410 <m1ch+0x150>)
800334c: 881b ldrh r3, [r3, #0]
800334e: b2d9 uxtb r1, r3
8003350: 4b30 ldr r3, [pc, #192] @ (8003414 <m1ch+0x154>)
8003352: 881b ldrh r3, [r3, #0]
8003354: b2db uxtb r3, r3
8003356: 200a movs r0, #10
8003358: 9001 str r0, [sp, #4]
800335a: 9300 str r3, [sp, #0]
800335c: 460b mov r3, r1
800335e: 2100 movs r1, #0
8003360: 2001 movs r0, #1
8003362: f000 fdd1 bl 8003f08 <ramp>
8003366: 4603 mov r3, r0
8003368: 2b00 cmp r3, #0
800336a: d13e bne.n 80033ea <m1ch+0x12a>
m1st=motWaitingTime;
800336c: 4b26 ldr r3, [pc, #152] @ (8003408 <m1ch+0x148>)
800336e: 2202 movs r2, #2
8003370: 701a strb r2, [r3, #0]
}
break;
8003372: e03a b.n 80033ea <m1ch+0x12a>
case motWaitingTime:
if(rtCiclo>=chM1stop){
8003374: 4b22 ldr r3, [pc, #136] @ (8003400 <m1ch+0x140>)
8003376: 881b ldrh r3, [r3, #0]
8003378: b29a uxth r2, r3
800337a: 4b27 ldr r3, [pc, #156] @ (8003418 <m1ch+0x158>)
800337c: 881b ldrh r3, [r3, #0]
800337e: 429a cmp r2, r3
8003380: d335 bcc.n 80033ee <m1ch+0x12e>
(void)ramp(M1,FW,m1pwmch,0,tramp,RAMPINIT);
8003382: 4b23 ldr r3, [pc, #140] @ (8003410 <m1ch+0x150>)
8003384: 881b ldrh r3, [r3, #0]
8003386: b2da uxtb r2, r3
8003388: 4b22 ldr r3, [pc, #136] @ (8003414 <m1ch+0x154>)
800338a: 881b ldrh r3, [r3, #0]
800338c: b2db uxtb r3, r3
800338e: 2100 movs r1, #0
8003390: 9101 str r1, [sp, #4]
8003392: 9300 str r3, [sp, #0]
8003394: 2300 movs r3, #0
8003396: 2100 movs r1, #0
8003398: 2001 movs r0, #1
800339a: f000 fdb5 bl 8003f08 <ramp>
m1st=motStopRamp;
800339e: 4b1a ldr r3, [pc, #104] @ (8003408 <m1ch+0x148>)
80033a0: 2203 movs r2, #3
80033a2: 701a strb r2, [r3, #0]
}
break;
80033a4: e023 b.n 80033ee <m1ch+0x12e>
case motStopRamp:
if(ramp(M1,FW,m1pwmch,0,tramp,RAMPRUN)==DONE){
80033a6: 4b1a ldr r3, [pc, #104] @ (8003410 <m1ch+0x150>)
80033a8: 881b ldrh r3, [r3, #0]
80033aa: b2da uxtb r2, r3
80033ac: 4b19 ldr r3, [pc, #100] @ (8003414 <m1ch+0x154>)
80033ae: 881b ldrh r3, [r3, #0]
80033b0: b2db uxtb r3, r3
80033b2: 210a movs r1, #10
80033b4: 9101 str r1, [sp, #4]
80033b6: 9300 str r3, [sp, #0]
80033b8: 2300 movs r3, #0
80033ba: 2100 movs r1, #0
80033bc: 2001 movs r0, #1
80033be: f000 fda3 bl 8003f08 <ramp>
80033c2: 4603 mov r3, r0
80033c4: 2b00 cmp r3, #0
80033c6: d114 bne.n 80033f2 <m1ch+0x132>
m1st=motStop;
80033c8: 4b0f ldr r3, [pc, #60] @ (8003408 <m1ch+0x148>)
80033ca: 2204 movs r2, #4
80033cc: 701a strb r2, [r3, #0]
}
break;
80033ce: e010 b.n 80033f2 <m1ch+0x132>
case motStop:
default:
SetMotPerc(M1,FW,0);
80033d0: 2200 movs r2, #0
80033d2: 2100 movs r1, #0
80033d4: 2001 movs r0, #1
80033d6: f000 fc17 bl 8003c08 <SetMotPerc>
SetMotPerc(M1,BW,0);
80033da: 2200 movs r2, #0
80033dc: 2101 movs r1, #1
80033de: 2001 movs r0, #1
80033e0: f000 fc12 bl 8003c08 <SetMotPerc>
break;
80033e4: e006 b.n 80033f4 <m1ch+0x134>
break;
80033e6: bf00 nop
80033e8: e004 b.n 80033f4 <m1ch+0x134>
break;
80033ea: bf00 nop
80033ec: e002 b.n 80033f4 <m1ch+0x134>
break;
80033ee: bf00 nop
80033f0: e000 b.n 80033f4 <m1ch+0x134>
break;
80033f2: bf00 nop
}
return m1st;
80033f4: 4b04 ldr r3, [pc, #16] @ (8003408 <m1ch+0x148>)
80033f6: 781b ldrb r3, [r3, #0]
}
80033f8: 4618 mov r0, r3
80033fa: 46bd mov sp, r7
80033fc: bd80 pop {r7, pc}
80033fe: bf00 nop
8003400: 200003f4 .word 0x200003f4
8003404: 2000042c .word 0x2000042c
8003408: 20000456 .word 0x20000456
800340c: 2000043c .word 0x2000043c
8003410: 200003f8 .word 0x200003f8
8003414: 2000040e .word 0x2000040e
8003418: 2000042e .word 0x2000042e
0800341c <m2ch>:
motMov_st m2ch(void){
800341c: b580 push {r7, lr}
800341e: b082 sub sp, #8
8003420: af02 add r7, sp, #8
static motMov_st m2st;
if(rtCiclo<chM2start)m2st=motWaiting;
8003422: 4b4e ldr r3, [pc, #312] @ (800355c <m2ch+0x140>)
8003424: 881b ldrh r3, [r3, #0]
8003426: b29a uxth r2, r3
8003428: 4b4d ldr r3, [pc, #308] @ (8003560 <m2ch+0x144>)
800342a: 881b ldrh r3, [r3, #0]
800342c: 429a cmp r2, r3
800342e: d202 bcs.n 8003436 <m2ch+0x1a>
8003430: 4b4c ldr r3, [pc, #304] @ (8003564 <m2ch+0x148>)
8003432: 2200 movs r2, #0
8003434: 701a strb r2, [r3, #0]
switch(m2st){
8003436: 4b4b ldr r3, [pc, #300] @ (8003564 <m2ch+0x148>)
8003438: 781b ldrb r3, [r3, #0]
800343a: 2b03 cmp r3, #3
800343c: d876 bhi.n 800352c <m2ch+0x110>
800343e: a201 add r2, pc, #4 @ (adr r2, 8003444 <m2ch+0x28>)
8003440: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003444: 08003455 .word 0x08003455
8003448: 080034a1 .word 0x080034a1
800344c: 080034d1 .word 0x080034d1
8003450: 08003503 .word 0x08003503
case motWaiting:
SetMotPerc(M2,FW,0);
8003454: 2200 movs r2, #0
8003456: 2100 movs r1, #0
8003458: 2002 movs r0, #2
800345a: f000 fbd5 bl 8003c08 <SetMotPerc>
SetMotPerc(M2,BW,0);
800345e: 2200 movs r2, #0
8003460: 2101 movs r1, #1
8003462: 2002 movs r0, #2
8003464: f000 fbd0 bl 8003c08 <SetMotPerc>
if(rtCiclo>=chM2start){
8003468: 4b3c ldr r3, [pc, #240] @ (800355c <m2ch+0x140>)
800346a: 881b ldrh r3, [r3, #0]
800346c: b29a uxth r2, r3
800346e: 4b3c ldr r3, [pc, #240] @ (8003560 <m2ch+0x144>)
8003470: 881b ldrh r3, [r3, #0]
8003472: 429a cmp r2, r3
8003474: d365 bcc.n 8003542 <m2ch+0x126>
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT);
8003476: 4b3c ldr r3, [pc, #240] @ (8003568 <m2ch+0x14c>)
8003478: 885b ldrh r3, [r3, #2]
800347a: b2da uxtb r2, r3
800347c: 4b3b ldr r3, [pc, #236] @ (800356c <m2ch+0x150>)
800347e: 881b ldrh r3, [r3, #0]
8003480: b2d9 uxtb r1, r3
8003482: 4b3b ldr r3, [pc, #236] @ (8003570 <m2ch+0x154>)
8003484: 881b ldrh r3, [r3, #0]
8003486: b2db uxtb r3, r3
8003488: 2000 movs r0, #0
800348a: 9001 str r0, [sp, #4]
800348c: 9300 str r3, [sp, #0]
800348e: 460b mov r3, r1
8003490: 2100 movs r1, #0
8003492: 2002 movs r0, #2
8003494: f000 fd38 bl 8003f08 <ramp>
m2st=motStartRamp;
8003498: 4b32 ldr r3, [pc, #200] @ (8003564 <m2ch+0x148>)
800349a: 2201 movs r2, #1
800349c: 701a strb r2, [r3, #0]
}
break;
800349e: e050 b.n 8003542 <m2ch+0x126>
case motStartRamp:
if(ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE){
80034a0: 4b31 ldr r3, [pc, #196] @ (8003568 <m2ch+0x14c>)
80034a2: 885b ldrh r3, [r3, #2]
80034a4: b2da uxtb r2, r3
80034a6: 4b31 ldr r3, [pc, #196] @ (800356c <m2ch+0x150>)
80034a8: 881b ldrh r3, [r3, #0]
80034aa: b2d9 uxtb r1, r3
80034ac: 4b30 ldr r3, [pc, #192] @ (8003570 <m2ch+0x154>)
80034ae: 881b ldrh r3, [r3, #0]
80034b0: b2db uxtb r3, r3
80034b2: 200a movs r0, #10
80034b4: 9001 str r0, [sp, #4]
80034b6: 9300 str r3, [sp, #0]
80034b8: 460b mov r3, r1
80034ba: 2100 movs r1, #0
80034bc: 2002 movs r0, #2
80034be: f000 fd23 bl 8003f08 <ramp>
80034c2: 4603 mov r3, r0
80034c4: 2b00 cmp r3, #0
80034c6: d13e bne.n 8003546 <m2ch+0x12a>
m2st=motWaitingTime;
80034c8: 4b26 ldr r3, [pc, #152] @ (8003564 <m2ch+0x148>)
80034ca: 2202 movs r2, #2
80034cc: 701a strb r2, [r3, #0]
}
break;
80034ce: e03a b.n 8003546 <m2ch+0x12a>
case motWaitingTime:
if(rtCiclo>=chM2stop){
80034d0: 4b22 ldr r3, [pc, #136] @ (800355c <m2ch+0x140>)
80034d2: 881b ldrh r3, [r3, #0]
80034d4: b29a uxth r2, r3
80034d6: 4b27 ldr r3, [pc, #156] @ (8003574 <m2ch+0x158>)
80034d8: 881b ldrh r3, [r3, #0]
80034da: 429a cmp r2, r3
80034dc: d335 bcc.n 800354a <m2ch+0x12e>
(void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT);
80034de: 4b23 ldr r3, [pc, #140] @ (800356c <m2ch+0x150>)
80034e0: 881b ldrh r3, [r3, #0]
80034e2: b2da uxtb r2, r3
80034e4: 4b22 ldr r3, [pc, #136] @ (8003570 <m2ch+0x154>)
80034e6: 881b ldrh r3, [r3, #0]
80034e8: b2db uxtb r3, r3
80034ea: 2100 movs r1, #0
80034ec: 9101 str r1, [sp, #4]
80034ee: 9300 str r3, [sp, #0]
80034f0: 2300 movs r3, #0
80034f2: 2100 movs r1, #0
80034f4: 2002 movs r0, #2
80034f6: f000 fd07 bl 8003f08 <ramp>
m2st=motStopRamp;
80034fa: 4b1a ldr r3, [pc, #104] @ (8003564 <m2ch+0x148>)
80034fc: 2203 movs r2, #3
80034fe: 701a strb r2, [r3, #0]
}
break;
8003500: e023 b.n 800354a <m2ch+0x12e>
case motStopRamp:
if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){
8003502: 4b1a ldr r3, [pc, #104] @ (800356c <m2ch+0x150>)
8003504: 881b ldrh r3, [r3, #0]
8003506: b2da uxtb r2, r3
8003508: 4b19 ldr r3, [pc, #100] @ (8003570 <m2ch+0x154>)
800350a: 881b ldrh r3, [r3, #0]
800350c: b2db uxtb r3, r3
800350e: 210a movs r1, #10
8003510: 9101 str r1, [sp, #4]
8003512: 9300 str r3, [sp, #0]
8003514: 2300 movs r3, #0
8003516: 2100 movs r1, #0
8003518: 2002 movs r0, #2
800351a: f000 fcf5 bl 8003f08 <ramp>
800351e: 4603 mov r3, r0
8003520: 2b00 cmp r3, #0
8003522: d114 bne.n 800354e <m2ch+0x132>
m2st=motStop;
8003524: 4b0f ldr r3, [pc, #60] @ (8003564 <m2ch+0x148>)
8003526: 2204 movs r2, #4
8003528: 701a strb r2, [r3, #0]
}
break;
800352a: e010 b.n 800354e <m2ch+0x132>
case motStop:
default:
SetMotPerc(M2,FW,0);
800352c: 2200 movs r2, #0
800352e: 2100 movs r1, #0
8003530: 2002 movs r0, #2
8003532: f000 fb69 bl 8003c08 <SetMotPerc>
SetMotPerc(M2,BW,0);
8003536: 2200 movs r2, #0
8003538: 2101 movs r1, #1
800353a: 2002 movs r0, #2
800353c: f000 fb64 bl 8003c08 <SetMotPerc>
break;
8003540: e006 b.n 8003550 <m2ch+0x134>
break;
8003542: bf00 nop
8003544: e004 b.n 8003550 <m2ch+0x134>
break;
8003546: bf00 nop
8003548: e002 b.n 8003550 <m2ch+0x134>
break;
800354a: bf00 nop
800354c: e000 b.n 8003550 <m2ch+0x134>
break;
800354e: bf00 nop
}
return m2st;
8003550: 4b04 ldr r3, [pc, #16] @ (8003564 <m2ch+0x148>)
8003552: 781b ldrb r3, [r3, #0]
}
8003554: 4618 mov r0, r3
8003556: 46bd mov sp, r7
8003558: bd80 pop {r7, pc}
800355a: bf00 nop
800355c: 200003f4 .word 0x200003f4
8003560: 20000430 .word 0x20000430
8003564: 20000457 .word 0x20000457
8003568: 2000043c .word 0x2000043c
800356c: 200003fc .word 0x200003fc
8003570: 2000040e .word 0x2000040e
8003574: 20000432 .word 0x20000432
08003578 <m3ch>:
motMov_st m3ch(void){
8003578: b580 push {r7, lr}
800357a: b082 sub sp, #8
800357c: af02 add r7, sp, #8
static motMov_st m3st;
if(rtCiclo<chM3start)m3st=motWaiting;
800357e: 4b4e ldr r3, [pc, #312] @ (80036b8 <m3ch+0x140>)
8003580: 881b ldrh r3, [r3, #0]
8003582: b29a uxth r2, r3
8003584: 4b4d ldr r3, [pc, #308] @ (80036bc <m3ch+0x144>)
8003586: 881b ldrh r3, [r3, #0]
8003588: 429a cmp r2, r3
800358a: d202 bcs.n 8003592 <m3ch+0x1a>
800358c: 4b4c ldr r3, [pc, #304] @ (80036c0 <m3ch+0x148>)
800358e: 2200 movs r2, #0
8003590: 701a strb r2, [r3, #0]
switch(m3st){
8003592: 4b4b ldr r3, [pc, #300] @ (80036c0 <m3ch+0x148>)
8003594: 781b ldrb r3, [r3, #0]
8003596: 2b03 cmp r3, #3
8003598: d876 bhi.n 8003688 <m3ch+0x110>
800359a: a201 add r2, pc, #4 @ (adr r2, 80035a0 <m3ch+0x28>)
800359c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80035a0: 080035b1 .word 0x080035b1
80035a4: 080035fd .word 0x080035fd
80035a8: 0800362d .word 0x0800362d
80035ac: 0800365f .word 0x0800365f
case motWaiting:
SetMotPerc(M3,FW,0);
80035b0: 2200 movs r2, #0
80035b2: 2100 movs r1, #0
80035b4: 2003 movs r0, #3
80035b6: f000 fb27 bl 8003c08 <SetMotPerc>
SetMotPerc(M3,BW,0);
80035ba: 2200 movs r2, #0
80035bc: 2101 movs r1, #1
80035be: 2003 movs r0, #3
80035c0: f000 fb22 bl 8003c08 <SetMotPerc>
if(rtCiclo>=chM3start){
80035c4: 4b3c ldr r3, [pc, #240] @ (80036b8 <m3ch+0x140>)
80035c6: 881b ldrh r3, [r3, #0]
80035c8: b29a uxth r2, r3
80035ca: 4b3c ldr r3, [pc, #240] @ (80036bc <m3ch+0x144>)
80035cc: 881b ldrh r3, [r3, #0]
80035ce: 429a cmp r2, r3
80035d0: d365 bcc.n 800369e <m3ch+0x126>
(void)ramp(M3,FW,mrampstart[M3-1],m2pwmch,tramp,RAMPINIT);
80035d2: 4b3c ldr r3, [pc, #240] @ (80036c4 <m3ch+0x14c>)
80035d4: 889b ldrh r3, [r3, #4]
80035d6: b2da uxtb r2, r3
80035d8: 4b3b ldr r3, [pc, #236] @ (80036c8 <m3ch+0x150>)
80035da: 881b ldrh r3, [r3, #0]
80035dc: b2d9 uxtb r1, r3
80035de: 4b3b ldr r3, [pc, #236] @ (80036cc <m3ch+0x154>)
80035e0: 881b ldrh r3, [r3, #0]
80035e2: b2db uxtb r3, r3
80035e4: 2000 movs r0, #0
80035e6: 9001 str r0, [sp, #4]
80035e8: 9300 str r3, [sp, #0]
80035ea: 460b mov r3, r1
80035ec: 2100 movs r1, #0
80035ee: 2003 movs r0, #3
80035f0: f000 fc8a bl 8003f08 <ramp>
m3st=motStartRamp;
80035f4: 4b32 ldr r3, [pc, #200] @ (80036c0 <m3ch+0x148>)
80035f6: 2201 movs r2, #1
80035f8: 701a strb r2, [r3, #0]
}
break;
80035fa: e050 b.n 800369e <m3ch+0x126>
case motStartRamp:
if(ramp(M3,FW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){
80035fc: 4b31 ldr r3, [pc, #196] @ (80036c4 <m3ch+0x14c>)
80035fe: 889b ldrh r3, [r3, #4]
8003600: b2da uxtb r2, r3
8003602: 4b33 ldr r3, [pc, #204] @ (80036d0 <m3ch+0x158>)
8003604: 881b ldrh r3, [r3, #0]
8003606: b2d9 uxtb r1, r3
8003608: 4b30 ldr r3, [pc, #192] @ (80036cc <m3ch+0x154>)
800360a: 881b ldrh r3, [r3, #0]
800360c: b2db uxtb r3, r3
800360e: 200a movs r0, #10
8003610: 9001 str r0, [sp, #4]
8003612: 9300 str r3, [sp, #0]
8003614: 460b mov r3, r1
8003616: 2100 movs r1, #0
8003618: 2003 movs r0, #3
800361a: f000 fc75 bl 8003f08 <ramp>
800361e: 4603 mov r3, r0
8003620: 2b00 cmp r3, #0
8003622: d13e bne.n 80036a2 <m3ch+0x12a>
m3st=motWaitingTime;
8003624: 4b26 ldr r3, [pc, #152] @ (80036c0 <m3ch+0x148>)
8003626: 2202 movs r2, #2
8003628: 701a strb r2, [r3, #0]
}
break;
800362a: e03a b.n 80036a2 <m3ch+0x12a>
case motWaitingTime:
if(rtCiclo>=chM3stop){
800362c: 4b22 ldr r3, [pc, #136] @ (80036b8 <m3ch+0x140>)
800362e: 881b ldrh r3, [r3, #0]
8003630: b29a uxth r2, r3
8003632: 4b28 ldr r3, [pc, #160] @ (80036d4 <m3ch+0x15c>)
8003634: 881b ldrh r3, [r3, #0]
8003636: 429a cmp r2, r3
8003638: d335 bcc.n 80036a6 <m3ch+0x12e>
(void)ramp(M3,FW,m3pwmch,0,tramp,RAMPINIT);
800363a: 4b25 ldr r3, [pc, #148] @ (80036d0 <m3ch+0x158>)
800363c: 881b ldrh r3, [r3, #0]
800363e: b2da uxtb r2, r3
8003640: 4b22 ldr r3, [pc, #136] @ (80036cc <m3ch+0x154>)
8003642: 881b ldrh r3, [r3, #0]
8003644: b2db uxtb r3, r3
8003646: 2100 movs r1, #0
8003648: 9101 str r1, [sp, #4]
800364a: 9300 str r3, [sp, #0]
800364c: 2300 movs r3, #0
800364e: 2100 movs r1, #0
8003650: 2003 movs r0, #3
8003652: f000 fc59 bl 8003f08 <ramp>
m3st=motStopRamp;
8003656: 4b1a ldr r3, [pc, #104] @ (80036c0 <m3ch+0x148>)
8003658: 2203 movs r2, #3
800365a: 701a strb r2, [r3, #0]
}
break;
800365c: e023 b.n 80036a6 <m3ch+0x12e>
case motStopRamp:
if(ramp(M3,FW,m3pwmch,0,tramp,RAMPRUN)==DONE){
800365e: 4b1c ldr r3, [pc, #112] @ (80036d0 <m3ch+0x158>)
8003660: 881b ldrh r3, [r3, #0]
8003662: b2da uxtb r2, r3
8003664: 4b19 ldr r3, [pc, #100] @ (80036cc <m3ch+0x154>)
8003666: 881b ldrh r3, [r3, #0]
8003668: b2db uxtb r3, r3
800366a: 210a movs r1, #10
800366c: 9101 str r1, [sp, #4]
800366e: 9300 str r3, [sp, #0]
8003670: 2300 movs r3, #0
8003672: 2100 movs r1, #0
8003674: 2003 movs r0, #3
8003676: f000 fc47 bl 8003f08 <ramp>
800367a: 4603 mov r3, r0
800367c: 2b00 cmp r3, #0
800367e: d114 bne.n 80036aa <m3ch+0x132>
m3st=motStop;
8003680: 4b0f ldr r3, [pc, #60] @ (80036c0 <m3ch+0x148>)
8003682: 2204 movs r2, #4
8003684: 701a strb r2, [r3, #0]
}
break;
8003686: e010 b.n 80036aa <m3ch+0x132>
case motStop:
default:
SetMotPerc(M3,FW,0);
8003688: 2200 movs r2, #0
800368a: 2100 movs r1, #0
800368c: 2003 movs r0, #3
800368e: f000 fabb bl 8003c08 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003692: 2200 movs r2, #0
8003694: 2101 movs r1, #1
8003696: 2003 movs r0, #3
8003698: f000 fab6 bl 8003c08 <SetMotPerc>
break;
800369c: e006 b.n 80036ac <m3ch+0x134>
break;
800369e: bf00 nop
80036a0: e004 b.n 80036ac <m3ch+0x134>
break;
80036a2: bf00 nop
80036a4: e002 b.n 80036ac <m3ch+0x134>
break;
80036a6: bf00 nop
80036a8: e000 b.n 80036ac <m3ch+0x134>
break;
80036aa: bf00 nop
}
return m3st;
80036ac: 4b04 ldr r3, [pc, #16] @ (80036c0 <m3ch+0x148>)
80036ae: 781b ldrb r3, [r3, #0]
}
80036b0: 4618 mov r0, r3
80036b2: 46bd mov sp, r7
80036b4: bd80 pop {r7, pc}
80036b6: bf00 nop
80036b8: 200003f4 .word 0x200003f4
80036bc: 20000434 .word 0x20000434
80036c0: 20000458 .word 0x20000458
80036c4: 2000043c .word 0x2000043c
80036c8: 200003fc .word 0x200003fc
80036cc: 2000040e .word 0x2000040e
80036d0: 20000400 .word 0x20000400
80036d4: 20000436 .word 0x20000436
080036d8 <m4ch>:
motMov_st m4ch(void){
80036d8: b580 push {r7, lr}
80036da: b082 sub sp, #8
80036dc: af02 add r7, sp, #8
static motMov_st m4st;
if(rtCiclo<chM4start)m4st=motWaiting;
80036de: 4b4e ldr r3, [pc, #312] @ (8003818 <m4ch+0x140>)
80036e0: 881b ldrh r3, [r3, #0]
80036e2: b29a uxth r2, r3
80036e4: 4b4d ldr r3, [pc, #308] @ (800381c <m4ch+0x144>)
80036e6: 881b ldrh r3, [r3, #0]
80036e8: 429a cmp r2, r3
80036ea: d202 bcs.n 80036f2 <m4ch+0x1a>
80036ec: 4b4c ldr r3, [pc, #304] @ (8003820 <m4ch+0x148>)
80036ee: 2200 movs r2, #0
80036f0: 701a strb r2, [r3, #0]
switch(m4st){
80036f2: 4b4b ldr r3, [pc, #300] @ (8003820 <m4ch+0x148>)
80036f4: 781b ldrb r3, [r3, #0]
80036f6: 2b03 cmp r3, #3
80036f8: d876 bhi.n 80037e8 <m4ch+0x110>
80036fa: a201 add r2, pc, #4 @ (adr r2, 8003700 <m4ch+0x28>)
80036fc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003700: 08003711 .word 0x08003711
8003704: 0800375d .word 0x0800375d
8003708: 0800378d .word 0x0800378d
800370c: 080037bf .word 0x080037bf
case motWaiting:
SetMotPerc(M4,FW,0);
8003710: 2200 movs r2, #0
8003712: 2100 movs r1, #0
8003714: 2004 movs r0, #4
8003716: f000 fa77 bl 8003c08 <SetMotPerc>
SetMotPerc(M4,BW,0);
800371a: 2200 movs r2, #0
800371c: 2101 movs r1, #1
800371e: 2004 movs r0, #4
8003720: f000 fa72 bl 8003c08 <SetMotPerc>
if(rtCiclo>=chM4start){
8003724: 4b3c ldr r3, [pc, #240] @ (8003818 <m4ch+0x140>)
8003726: 881b ldrh r3, [r3, #0]
8003728: b29a uxth r2, r3
800372a: 4b3c ldr r3, [pc, #240] @ (800381c <m4ch+0x144>)
800372c: 881b ldrh r3, [r3, #0]
800372e: 429a cmp r2, r3
8003730: d365 bcc.n 80037fe <m4ch+0x126>
(void)ramp(M4,FW,mrampstart[M4-1],m2pwmch,tramp,RAMPINIT);
8003732: 4b3c ldr r3, [pc, #240] @ (8003824 <m4ch+0x14c>)
8003734: 88db ldrh r3, [r3, #6]
8003736: b2da uxtb r2, r3
8003738: 4b3b ldr r3, [pc, #236] @ (8003828 <m4ch+0x150>)
800373a: 881b ldrh r3, [r3, #0]
800373c: b2d9 uxtb r1, r3
800373e: 4b3b ldr r3, [pc, #236] @ (800382c <m4ch+0x154>)
8003740: 881b ldrh r3, [r3, #0]
8003742: b2db uxtb r3, r3
8003744: 2000 movs r0, #0
8003746: 9001 str r0, [sp, #4]
8003748: 9300 str r3, [sp, #0]
800374a: 460b mov r3, r1
800374c: 2100 movs r1, #0
800374e: 2004 movs r0, #4
8003750: f000 fbda bl 8003f08 <ramp>
m4st=motStartRamp;
8003754: 4b32 ldr r3, [pc, #200] @ (8003820 <m4ch+0x148>)
8003756: 2201 movs r2, #1
8003758: 701a strb r2, [r3, #0]
}
break;
800375a: e050 b.n 80037fe <m4ch+0x126>
case motStartRamp:
if(ramp(M4,FW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE){
800375c: 4b31 ldr r3, [pc, #196] @ (8003824 <m4ch+0x14c>)
800375e: 88db ldrh r3, [r3, #6]
8003760: b2da uxtb r2, r3
8003762: 4b33 ldr r3, [pc, #204] @ (8003830 <m4ch+0x158>)
8003764: 881b ldrh r3, [r3, #0]
8003766: b2d9 uxtb r1, r3
8003768: 4b30 ldr r3, [pc, #192] @ (800382c <m4ch+0x154>)
800376a: 881b ldrh r3, [r3, #0]
800376c: b2db uxtb r3, r3
800376e: 200a movs r0, #10
8003770: 9001 str r0, [sp, #4]
8003772: 9300 str r3, [sp, #0]
8003774: 460b mov r3, r1
8003776: 2100 movs r1, #0
8003778: 2004 movs r0, #4
800377a: f000 fbc5 bl 8003f08 <ramp>
800377e: 4603 mov r3, r0
8003780: 2b00 cmp r3, #0
8003782: d13e bne.n 8003802 <m4ch+0x12a>
m4st=motWaitingTime;
8003784: 4b26 ldr r3, [pc, #152] @ (8003820 <m4ch+0x148>)
8003786: 2202 movs r2, #2
8003788: 701a strb r2, [r3, #0]
}
break;
800378a: e03a b.n 8003802 <m4ch+0x12a>
case motWaitingTime:
if(rtCiclo>=chM4stop){
800378c: 4b22 ldr r3, [pc, #136] @ (8003818 <m4ch+0x140>)
800378e: 881b ldrh r3, [r3, #0]
8003790: b29a uxth r2, r3
8003792: 4b28 ldr r3, [pc, #160] @ (8003834 <m4ch+0x15c>)
8003794: 881b ldrh r3, [r3, #0]
8003796: 429a cmp r2, r3
8003798: d335 bcc.n 8003806 <m4ch+0x12e>
(void)ramp(M4,FW,m4pwmch,0,tramp,RAMPINIT);
800379a: 4b25 ldr r3, [pc, #148] @ (8003830 <m4ch+0x158>)
800379c: 881b ldrh r3, [r3, #0]
800379e: b2da uxtb r2, r3
80037a0: 4b22 ldr r3, [pc, #136] @ (800382c <m4ch+0x154>)
80037a2: 881b ldrh r3, [r3, #0]
80037a4: b2db uxtb r3, r3
80037a6: 2100 movs r1, #0
80037a8: 9101 str r1, [sp, #4]
80037aa: 9300 str r3, [sp, #0]
80037ac: 2300 movs r3, #0
80037ae: 2100 movs r1, #0
80037b0: 2004 movs r0, #4
80037b2: f000 fba9 bl 8003f08 <ramp>
m4st=motStopRamp;
80037b6: 4b1a ldr r3, [pc, #104] @ (8003820 <m4ch+0x148>)
80037b8: 2203 movs r2, #3
80037ba: 701a strb r2, [r3, #0]
}
break;
80037bc: e023 b.n 8003806 <m4ch+0x12e>
case motStopRamp:
if(ramp(43,FW,m4pwmch,0,tramp,RAMPRUN)==DONE){
80037be: 4b1c ldr r3, [pc, #112] @ (8003830 <m4ch+0x158>)
80037c0: 881b ldrh r3, [r3, #0]
80037c2: b2da uxtb r2, r3
80037c4: 4b19 ldr r3, [pc, #100] @ (800382c <m4ch+0x154>)
80037c6: 881b ldrh r3, [r3, #0]
80037c8: b2db uxtb r3, r3
80037ca: 210a movs r1, #10
80037cc: 9101 str r1, [sp, #4]
80037ce: 9300 str r3, [sp, #0]
80037d0: 2300 movs r3, #0
80037d2: 2100 movs r1, #0
80037d4: 202b movs r0, #43 @ 0x2b
80037d6: f000 fb97 bl 8003f08 <ramp>
80037da: 4603 mov r3, r0
80037dc: 2b00 cmp r3, #0
80037de: d114 bne.n 800380a <m4ch+0x132>
m4st=motStop;
80037e0: 4b0f ldr r3, [pc, #60] @ (8003820 <m4ch+0x148>)
80037e2: 2204 movs r2, #4
80037e4: 701a strb r2, [r3, #0]
}
break;
80037e6: e010 b.n 800380a <m4ch+0x132>
case motStop:
default:
SetMotPerc(M4,FW,0);
80037e8: 2200 movs r2, #0
80037ea: 2100 movs r1, #0
80037ec: 2004 movs r0, #4
80037ee: f000 fa0b bl 8003c08 <SetMotPerc>
SetMotPerc(M4,BW,0);
80037f2: 2200 movs r2, #0
80037f4: 2101 movs r1, #1
80037f6: 2004 movs r0, #4
80037f8: f000 fa06 bl 8003c08 <SetMotPerc>
break;
80037fc: e006 b.n 800380c <m4ch+0x134>
break;
80037fe: bf00 nop
8003800: e004 b.n 800380c <m4ch+0x134>
break;
8003802: bf00 nop
8003804: e002 b.n 800380c <m4ch+0x134>
break;
8003806: bf00 nop
8003808: e000 b.n 800380c <m4ch+0x134>
break;
800380a: bf00 nop
}
return m4st;
800380c: 4b04 ldr r3, [pc, #16] @ (8003820 <m4ch+0x148>)
800380e: 781b ldrb r3, [r3, #0]
}
8003810: 4618 mov r0, r3
8003812: 46bd mov sp, r7
8003814: bd80 pop {r7, pc}
8003816: bf00 nop
8003818: 200003f4 .word 0x200003f4
800381c: 20000438 .word 0x20000438
8003820: 20000459 .word 0x20000459
8003824: 2000043c .word 0x2000043c
8003828: 200003fc .word 0x200003fc
800382c: 2000040e .word 0x2000040e
8003830: 20000404 .word 0x20000404
8003834: 2000043a .word 0x2000043a
08003838 <IsPwmRunning>:
extern TIM_HandleTypeDef htim3;
extern TIM_HandleTypeDef htim4;
extern volatile uint8_t rtramp[4];
extern uint8_t mrampstart[4];
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8003838: b580 push {r7, lr}
800383a: b084 sub sp, #16
800383c: af00 add r7, sp, #0
800383e: 6078 str r0, [r7, #4]
8003840: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
8003842: 6839 ldr r1, [r7, #0]
8003844: 6878 ldr r0, [r7, #4]
8003846: f004 fea8 bl 800859a <HAL_TIM_GetChannelState>
800384a: 4603 mov r3, r0
800384c: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
800384e: 7bfb ldrb r3, [r7, #15]
8003850: 2b02 cmp r3, #2
8003852: bf0c ite eq
8003854: 2301 moveq r3, #1
8003856: 2300 movne r3, #0
8003858: b2db uxtb r3, r3
}
800385a: 4618 mov r0, r3
800385c: 3710 adds r7, #16
800385e: 46bd mov sp, r7
8003860: bd80 pop {r7, pc}
08003862 <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
8003862: b580 push {r7, lr}
8003864: b082 sub sp, #8
8003866: af00 add r7, sp, #0
8003868: 6078 str r0, [r7, #4]
800386a: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
800386c: 6839 ldr r1, [r7, #0]
800386e: 6878 ldr r0, [r7, #4]
8003870: f004 fca6 bl 80081c0 <HAL_TIM_PWM_Stop>
}
8003874: bf00 nop
8003876: 3708 adds r7, #8
8003878: 46bd mov sp, r7
800387a: bd80 pop {r7, pc}
0800387c <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
800387c: b580 push {r7, lr}
800387e: b084 sub sp, #16
8003880: af00 add r7, sp, #0
8003882: 60f8 str r0, [r7, #12]
8003884: 60b9 str r1, [r7, #8]
8003886: 4613 mov r3, r2
8003888: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
800388a: 68bb ldr r3, [r7, #8]
800388c: 2b00 cmp r3, #0
800388e: d104 bne.n 800389a <StartMot+0x1e>
8003890: 68fb ldr r3, [r7, #12]
8003892: 681b ldr r3, [r3, #0]
8003894: 88fa ldrh r2, [r7, #6]
8003896: 635a str r2, [r3, #52] @ 0x34
8003898: e013 b.n 80038c2 <StartMot+0x46>
800389a: 68bb ldr r3, [r7, #8]
800389c: 2b04 cmp r3, #4
800389e: d104 bne.n 80038aa <StartMot+0x2e>
80038a0: 68fb ldr r3, [r7, #12]
80038a2: 681a ldr r2, [r3, #0]
80038a4: 88fb ldrh r3, [r7, #6]
80038a6: 6393 str r3, [r2, #56] @ 0x38
80038a8: e00b b.n 80038c2 <StartMot+0x46>
80038aa: 68bb ldr r3, [r7, #8]
80038ac: 2b08 cmp r3, #8
80038ae: d104 bne.n 80038ba <StartMot+0x3e>
80038b0: 68fb ldr r3, [r7, #12]
80038b2: 681a ldr r2, [r3, #0]
80038b4: 88fb ldrh r3, [r7, #6]
80038b6: 63d3 str r3, [r2, #60] @ 0x3c
80038b8: e003 b.n 80038c2 <StartMot+0x46>
80038ba: 68fb ldr r3, [r7, #12]
80038bc: 681a ldr r2, [r3, #0]
80038be: 88fb ldrh r3, [r7, #6]
80038c0: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
80038c2: 68b9 ldr r1, [r7, #8]
80038c4: 68f8 ldr r0, [r7, #12]
80038c6: f004 fbd9 bl 800807c <HAL_TIM_PWM_Start>
}
80038ca: bf00 nop
80038cc: 3710 adds r7, #16
80038ce: 46bd mov sp, r7
80038d0: bd80 pop {r7, pc}
080038d2 <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
80038d2: b480 push {r7}
80038d4: b085 sub sp, #20
80038d6: af00 add r7, sp, #0
80038d8: 60f8 str r0, [r7, #12]
80038da: 60b9 str r1, [r7, #8]
80038dc: 4613 mov r3, r2
80038de: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80038e0: 68bb ldr r3, [r7, #8]
80038e2: 2b00 cmp r3, #0
80038e4: d104 bne.n 80038f0 <SetMotPwm+0x1e>
80038e6: 68fb ldr r3, [r7, #12]
80038e8: 681b ldr r3, [r3, #0]
80038ea: 88fa ldrh r2, [r7, #6]
80038ec: 635a str r2, [r3, #52] @ 0x34
}
80038ee: e013 b.n 8003918 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80038f0: 68bb ldr r3, [r7, #8]
80038f2: 2b04 cmp r3, #4
80038f4: d104 bne.n 8003900 <SetMotPwm+0x2e>
80038f6: 68fb ldr r3, [r7, #12]
80038f8: 681a ldr r2, [r3, #0]
80038fa: 88fb ldrh r3, [r7, #6]
80038fc: 6393 str r3, [r2, #56] @ 0x38
}
80038fe: e00b b.n 8003918 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003900: 68bb ldr r3, [r7, #8]
8003902: 2b08 cmp r3, #8
8003904: d104 bne.n 8003910 <SetMotPwm+0x3e>
8003906: 68fb ldr r3, [r7, #12]
8003908: 681a ldr r2, [r3, #0]
800390a: 88fb ldrh r3, [r7, #6]
800390c: 63d3 str r3, [r2, #60] @ 0x3c
}
800390e: e003 b.n 8003918 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8003910: 68fb ldr r3, [r7, #12]
8003912: 681a ldr r2, [r3, #0]
8003914: 88fb ldrh r3, [r7, #6]
8003916: 6413 str r3, [r2, #64] @ 0x40
}
8003918: bf00 nop
800391a: 3714 adds r7, #20
800391c: 46bd mov sp, r7
800391e: bc80 pop {r7}
8003920: 4770 bx lr
...
08003924 <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
8003924: b580 push {r7, lr}
8003926: b082 sub sp, #8
8003928: af00 add r7, sp, #0
800392a: 4603 mov r3, r0
800392c: 71fb strb r3, [r7, #7]
800392e: 460b mov r3, r1
8003930: 71bb strb r3, [r7, #6]
8003932: 4613 mov r3, r2
8003934: 80bb strh r3, [r7, #4]
switch(mot){
8003936: 79fb ldrb r3, [r7, #7]
8003938: 3b01 subs r3, #1
800393a: 2b03 cmp r3, #3
800393c: f200 8158 bhi.w 8003bf0 <SetMot+0x2cc>
8003940: a201 add r2, pc, #4 @ (adr r2, 8003948 <SetMot+0x24>)
8003942: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003946: bf00 nop
8003948: 08003959 .word 0x08003959
800394c: 080039fb .word 0x080039fb
8003950: 08003a9d .word 0x08003a9d
8003954: 08003b47 .word 0x08003b47
case 1:
if(dir==FW){
8003958: 79bb ldrb r3, [r7, #6]
800395a: 2b00 cmp r3, #0
800395c: d126 bne.n 80039ac <SetMot+0x88>
if(pwmval==0){
800395e: 88bb ldrh r3, [r7, #4]
8003960: 2b00 cmp r3, #0
8003962: d109 bne.n 8003978 <SetMot+0x54>
StopMot(timMot1,FWMot1);
8003964: 2100 movs r1, #0
8003966: 48a5 ldr r0, [pc, #660] @ (8003bfc <SetMot+0x2d8>)
8003968: f7ff ff7b bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
800396c: 2200 movs r2, #0
800396e: 2102 movs r1, #2
8003970: 48a3 ldr r0, [pc, #652] @ (8003c00 <SetMot+0x2dc>)
8003972: f002 f882 bl 8005a7a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
8003976: e13c b.n 8003bf2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
8003978: 2100 movs r1, #0
800397a: 48a0 ldr r0, [pc, #640] @ (8003bfc <SetMot+0x2d8>)
800397c: f7ff ff5c bl 8003838 <IsPwmRunning>
8003980: 4603 mov r3, r0
8003982: 2b00 cmp r3, #0
8003984: d006 beq.n 8003994 <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
8003986: 88bb ldrh r3, [r7, #4]
8003988: 461a mov r2, r3
800398a: 2100 movs r1, #0
800398c: 489b ldr r0, [pc, #620] @ (8003bfc <SetMot+0x2d8>)
800398e: f7ff ffa0 bl 80038d2 <SetMotPwm>
break;
8003992: e12e b.n 8003bf2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8003994: 2201 movs r2, #1
8003996: 2102 movs r1, #2
8003998: 4899 ldr r0, [pc, #612] @ (8003c00 <SetMot+0x2dc>)
800399a: f002 f86e bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
800399e: 88bb ldrh r3, [r7, #4]
80039a0: 461a mov r2, r3
80039a2: 2100 movs r1, #0
80039a4: 4895 ldr r0, [pc, #596] @ (8003bfc <SetMot+0x2d8>)
80039a6: f7ff ff69 bl 800387c <StartMot>
break;
80039aa: e122 b.n 8003bf2 <SetMot+0x2ce>
if(pwmval==0){
80039ac: 88bb ldrh r3, [r7, #4]
80039ae: 2b00 cmp r3, #0
80039b0: d109 bne.n 80039c6 <SetMot+0xa2>
StopMot(timMot1,BWMot1);
80039b2: 2104 movs r1, #4
80039b4: 4891 ldr r0, [pc, #580] @ (8003bfc <SetMot+0x2d8>)
80039b6: f7ff ff54 bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
80039ba: 2200 movs r2, #0
80039bc: 2102 movs r1, #2
80039be: 4890 ldr r0, [pc, #576] @ (8003c00 <SetMot+0x2dc>)
80039c0: f002 f85b bl 8005a7a <HAL_GPIO_WritePin>
break;
80039c4: e115 b.n 8003bf2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
80039c6: 2104 movs r1, #4
80039c8: 488c ldr r0, [pc, #560] @ (8003bfc <SetMot+0x2d8>)
80039ca: f7ff ff35 bl 8003838 <IsPwmRunning>
80039ce: 4603 mov r3, r0
80039d0: 2b00 cmp r3, #0
80039d2: d006 beq.n 80039e2 <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
80039d4: 88bb ldrh r3, [r7, #4]
80039d6: 461a mov r2, r3
80039d8: 2104 movs r1, #4
80039da: 4888 ldr r0, [pc, #544] @ (8003bfc <SetMot+0x2d8>)
80039dc: f7ff ff79 bl 80038d2 <SetMotPwm>
break;
80039e0: e107 b.n 8003bf2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80039e2: 2201 movs r2, #1
80039e4: 2102 movs r1, #2
80039e6: 4886 ldr r0, [pc, #536] @ (8003c00 <SetMot+0x2dc>)
80039e8: f002 f847 bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
80039ec: 88bb ldrh r3, [r7, #4]
80039ee: 461a mov r2, r3
80039f0: 2104 movs r1, #4
80039f2: 4882 ldr r0, [pc, #520] @ (8003bfc <SetMot+0x2d8>)
80039f4: f7ff ff42 bl 800387c <StartMot>
break;
80039f8: e0fb b.n 8003bf2 <SetMot+0x2ce>
case 2:
if(dir==FW){
80039fa: 79bb ldrb r3, [r7, #6]
80039fc: 2b00 cmp r3, #0
80039fe: d126 bne.n 8003a4e <SetMot+0x12a>
if(pwmval==0){
8003a00: 88bb ldrh r3, [r7, #4]
8003a02: 2b00 cmp r3, #0
8003a04: d109 bne.n 8003a1a <SetMot+0xf6>
StopMot(timMot2,FWMot2);
8003a06: 2108 movs r1, #8
8003a08: 487c ldr r0, [pc, #496] @ (8003bfc <SetMot+0x2d8>)
8003a0a: f7ff ff2a bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8003a0e: 2200 movs r2, #0
8003a10: 2104 movs r1, #4
8003a12: 487b ldr r0, [pc, #492] @ (8003c00 <SetMot+0x2dc>)
8003a14: f002 f831 bl 8005a7a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8003a18: e0eb b.n 8003bf2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
8003a1a: 2108 movs r1, #8
8003a1c: 4877 ldr r0, [pc, #476] @ (8003bfc <SetMot+0x2d8>)
8003a1e: f7ff ff0b bl 8003838 <IsPwmRunning>
8003a22: 4603 mov r3, r0
8003a24: 2b00 cmp r3, #0
8003a26: d006 beq.n 8003a36 <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
8003a28: 88bb ldrh r3, [r7, #4]
8003a2a: 461a mov r2, r3
8003a2c: 2108 movs r1, #8
8003a2e: 4873 ldr r0, [pc, #460] @ (8003bfc <SetMot+0x2d8>)
8003a30: f7ff ff4f bl 80038d2 <SetMotPwm>
break;
8003a34: e0dd b.n 8003bf2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8003a36: 2201 movs r2, #1
8003a38: 2104 movs r1, #4
8003a3a: 4871 ldr r0, [pc, #452] @ (8003c00 <SetMot+0x2dc>)
8003a3c: f002 f81d bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8003a40: 88bb ldrh r3, [r7, #4]
8003a42: 461a mov r2, r3
8003a44: 2108 movs r1, #8
8003a46: 486d ldr r0, [pc, #436] @ (8003bfc <SetMot+0x2d8>)
8003a48: f7ff ff18 bl 800387c <StartMot>
break;
8003a4c: e0d1 b.n 8003bf2 <SetMot+0x2ce>
if(pwmval==0){
8003a4e: 88bb ldrh r3, [r7, #4]
8003a50: 2b00 cmp r3, #0
8003a52: d109 bne.n 8003a68 <SetMot+0x144>
StopMot(timMot2,BWMot2);
8003a54: 210c movs r1, #12
8003a56: 4869 ldr r0, [pc, #420] @ (8003bfc <SetMot+0x2d8>)
8003a58: f7ff ff03 bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8003a5c: 2200 movs r2, #0
8003a5e: 2104 movs r1, #4
8003a60: 4867 ldr r0, [pc, #412] @ (8003c00 <SetMot+0x2dc>)
8003a62: f002 f80a bl 8005a7a <HAL_GPIO_WritePin>
break;
8003a66: e0c4 b.n 8003bf2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
8003a68: 210c movs r1, #12
8003a6a: 4864 ldr r0, [pc, #400] @ (8003bfc <SetMot+0x2d8>)
8003a6c: f7ff fee4 bl 8003838 <IsPwmRunning>
8003a70: 4603 mov r3, r0
8003a72: 2b00 cmp r3, #0
8003a74: d006 beq.n 8003a84 <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
8003a76: 88bb ldrh r3, [r7, #4]
8003a78: 461a mov r2, r3
8003a7a: 210c movs r1, #12
8003a7c: 485f ldr r0, [pc, #380] @ (8003bfc <SetMot+0x2d8>)
8003a7e: f7ff ff28 bl 80038d2 <SetMotPwm>
break;
8003a82: e0b6 b.n 8003bf2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8003a84: 2201 movs r2, #1
8003a86: 2104 movs r1, #4
8003a88: 485d ldr r0, [pc, #372] @ (8003c00 <SetMot+0x2dc>)
8003a8a: f001 fff6 bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
8003a8e: 88bb ldrh r3, [r7, #4]
8003a90: 461a mov r2, r3
8003a92: 210c movs r1, #12
8003a94: 4859 ldr r0, [pc, #356] @ (8003bfc <SetMot+0x2d8>)
8003a96: f7ff fef1 bl 800387c <StartMot>
break;
8003a9a: e0aa b.n 8003bf2 <SetMot+0x2ce>
case 3:
if(dir==FW){
8003a9c: 79bb ldrb r3, [r7, #6]
8003a9e: 2b00 cmp r3, #0
8003aa0: d128 bne.n 8003af4 <SetMot+0x1d0>
if(pwmval==0){
8003aa2: 88bb ldrh r3, [r7, #4]
8003aa4: 2b00 cmp r3, #0
8003aa6: d10a bne.n 8003abe <SetMot+0x19a>
StopMot(timMot3,FWMot3);
8003aa8: 2100 movs r1, #0
8003aaa: 4856 ldr r0, [pc, #344] @ (8003c04 <SetMot+0x2e0>)
8003aac: f7ff fed9 bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8003ab0: 2200 movs r2, #0
8003ab2: f44f 6180 mov.w r1, #1024 @ 0x400
8003ab6: 4852 ldr r0, [pc, #328] @ (8003c00 <SetMot+0x2dc>)
8003ab8: f001 ffdf bl 8005a7a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8003abc: e099 b.n 8003bf2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
8003abe: 2100 movs r1, #0
8003ac0: 4850 ldr r0, [pc, #320] @ (8003c04 <SetMot+0x2e0>)
8003ac2: f7ff feb9 bl 8003838 <IsPwmRunning>
8003ac6: 4603 mov r3, r0
8003ac8: 2b00 cmp r3, #0
8003aca: d006 beq.n 8003ada <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
8003acc: 88bb ldrh r3, [r7, #4]
8003ace: 461a mov r2, r3
8003ad0: 2100 movs r1, #0
8003ad2: 484c ldr r0, [pc, #304] @ (8003c04 <SetMot+0x2e0>)
8003ad4: f7ff fefd bl 80038d2 <SetMotPwm>
break;
8003ad8: e08b b.n 8003bf2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8003ada: 2201 movs r2, #1
8003adc: f44f 6180 mov.w r1, #1024 @ 0x400
8003ae0: 4847 ldr r0, [pc, #284] @ (8003c00 <SetMot+0x2dc>)
8003ae2: f001 ffca bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8003ae6: 88bb ldrh r3, [r7, #4]
8003ae8: 461a mov r2, r3
8003aea: 2100 movs r1, #0
8003aec: 4845 ldr r0, [pc, #276] @ (8003c04 <SetMot+0x2e0>)
8003aee: f7ff fec5 bl 800387c <StartMot>
break;
8003af2: e07e b.n 8003bf2 <SetMot+0x2ce>
if(pwmval==0){
8003af4: 88bb ldrh r3, [r7, #4]
8003af6: 2b00 cmp r3, #0
8003af8: d10a bne.n 8003b10 <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
8003afa: 2104 movs r1, #4
8003afc: 4841 ldr r0, [pc, #260] @ (8003c04 <SetMot+0x2e0>)
8003afe: f7ff feb0 bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8003b02: 2200 movs r2, #0
8003b04: f44f 6180 mov.w r1, #1024 @ 0x400
8003b08: 483d ldr r0, [pc, #244] @ (8003c00 <SetMot+0x2dc>)
8003b0a: f001 ffb6 bl 8005a7a <HAL_GPIO_WritePin>
break;
8003b0e: e070 b.n 8003bf2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
8003b10: 2104 movs r1, #4
8003b12: 483c ldr r0, [pc, #240] @ (8003c04 <SetMot+0x2e0>)
8003b14: f7ff fe90 bl 8003838 <IsPwmRunning>
8003b18: 4603 mov r3, r0
8003b1a: 2b00 cmp r3, #0
8003b1c: d006 beq.n 8003b2c <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
8003b1e: 88bb ldrh r3, [r7, #4]
8003b20: 461a mov r2, r3
8003b22: 2104 movs r1, #4
8003b24: 4837 ldr r0, [pc, #220] @ (8003c04 <SetMot+0x2e0>)
8003b26: f7ff fed4 bl 80038d2 <SetMotPwm>
break;
8003b2a: e062 b.n 8003bf2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8003b2c: 2201 movs r2, #1
8003b2e: f44f 6180 mov.w r1, #1024 @ 0x400
8003b32: 4833 ldr r0, [pc, #204] @ (8003c00 <SetMot+0x2dc>)
8003b34: f001 ffa1 bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8003b38: 88bb ldrh r3, [r7, #4]
8003b3a: 461a mov r2, r3
8003b3c: 2104 movs r1, #4
8003b3e: 4831 ldr r0, [pc, #196] @ (8003c04 <SetMot+0x2e0>)
8003b40: f7ff fe9c bl 800387c <StartMot>
break;
8003b44: e055 b.n 8003bf2 <SetMot+0x2ce>
case 4:
if(dir==FW){
8003b46: 79bb ldrb r3, [r7, #6]
8003b48: 2b00 cmp r3, #0
8003b4a: d128 bne.n 8003b9e <SetMot+0x27a>
if(pwmval==0){
8003b4c: 88bb ldrh r3, [r7, #4]
8003b4e: 2b00 cmp r3, #0
8003b50: d10a bne.n 8003b68 <SetMot+0x244>
StopMot(timMot4,FWMot4);
8003b52: 2108 movs r1, #8
8003b54: 482b ldr r0, [pc, #172] @ (8003c04 <SetMot+0x2e0>)
8003b56: f7ff fe84 bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8003b5a: 2200 movs r2, #0
8003b5c: f44f 6100 mov.w r1, #2048 @ 0x800
8003b60: 4827 ldr r0, [pc, #156] @ (8003c00 <SetMot+0x2dc>)
8003b62: f001 ff8a bl 8005a7a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8003b66: e044 b.n 8003bf2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
8003b68: 2108 movs r1, #8
8003b6a: 4826 ldr r0, [pc, #152] @ (8003c04 <SetMot+0x2e0>)
8003b6c: f7ff fe64 bl 8003838 <IsPwmRunning>
8003b70: 4603 mov r3, r0
8003b72: 2b00 cmp r3, #0
8003b74: d006 beq.n 8003b84 <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
8003b76: 88bb ldrh r3, [r7, #4]
8003b78: 461a mov r2, r3
8003b7a: 2108 movs r1, #8
8003b7c: 4821 ldr r0, [pc, #132] @ (8003c04 <SetMot+0x2e0>)
8003b7e: f7ff fea8 bl 80038d2 <SetMotPwm>
break;
8003b82: e036 b.n 8003bf2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8003b84: 2201 movs r2, #1
8003b86: f44f 6100 mov.w r1, #2048 @ 0x800
8003b8a: 481d ldr r0, [pc, #116] @ (8003c00 <SetMot+0x2dc>)
8003b8c: f001 ff75 bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
8003b90: 88bb ldrh r3, [r7, #4]
8003b92: 461a mov r2, r3
8003b94: 2108 movs r1, #8
8003b96: 481b ldr r0, [pc, #108] @ (8003c04 <SetMot+0x2e0>)
8003b98: f7ff fe70 bl 800387c <StartMot>
break;
8003b9c: e029 b.n 8003bf2 <SetMot+0x2ce>
if(pwmval==0){
8003b9e: 88bb ldrh r3, [r7, #4]
8003ba0: 2b00 cmp r3, #0
8003ba2: d10a bne.n 8003bba <SetMot+0x296>
StopMot(timMot4,BWMot4);
8003ba4: 210c movs r1, #12
8003ba6: 4817 ldr r0, [pc, #92] @ (8003c04 <SetMot+0x2e0>)
8003ba8: f7ff fe5b bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8003bac: 2200 movs r2, #0
8003bae: f44f 6100 mov.w r1, #2048 @ 0x800
8003bb2: 4813 ldr r0, [pc, #76] @ (8003c00 <SetMot+0x2dc>)
8003bb4: f001 ff61 bl 8005a7a <HAL_GPIO_WritePin>
break;
8003bb8: e01b b.n 8003bf2 <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
8003bba: 210c movs r1, #12
8003bbc: 4811 ldr r0, [pc, #68] @ (8003c04 <SetMot+0x2e0>)
8003bbe: f7ff fe3b bl 8003838 <IsPwmRunning>
8003bc2: 4603 mov r3, r0
8003bc4: 2b00 cmp r3, #0
8003bc6: d006 beq.n 8003bd6 <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
8003bc8: 88bb ldrh r3, [r7, #4]
8003bca: 461a mov r2, r3
8003bcc: 210c movs r1, #12
8003bce: 480d ldr r0, [pc, #52] @ (8003c04 <SetMot+0x2e0>)
8003bd0: f7ff fe7f bl 80038d2 <SetMotPwm>
break;
8003bd4: e00d b.n 8003bf2 <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8003bd6: 2201 movs r2, #1
8003bd8: f44f 6100 mov.w r1, #2048 @ 0x800
8003bdc: 4808 ldr r0, [pc, #32] @ (8003c00 <SetMot+0x2dc>)
8003bde: f001 ff4c bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
8003be2: 88bb ldrh r3, [r7, #4]
8003be4: 461a mov r2, r3
8003be6: 210c movs r1, #12
8003be8: 4806 ldr r0, [pc, #24] @ (8003c04 <SetMot+0x2e0>)
8003bea: f7ff fe47 bl 800387c <StartMot>
break;
8003bee: e000 b.n 8003bf2 <SetMot+0x2ce>
default:
break;
8003bf0: bf00 nop
}
}
8003bf2: bf00 nop
8003bf4: 3708 adds r7, #8
8003bf6: 46bd mov sp, r7
8003bf8: bd80 pop {r7, pc}
8003bfa: bf00 nop
8003bfc: 20000310 .word 0x20000310
8003c00: 40010c00 .word 0x40010c00
8003c04: 20000358 .word 0x20000358
08003c08 <SetMotPerc>:
void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){
8003c08: b580 push {r7, lr}
8003c0a: b084 sub sp, #16
8003c0c: af00 add r7, sp, #0
8003c0e: 4603 mov r3, r0
8003c10: 71fb strb r3, [r7, #7]
8003c12: 460b mov r3, r1
8003c14: 71bb strb r3, [r7, #6]
8003c16: 4613 mov r3, r2
8003c18: 717b strb r3, [r7, #5]
uint16_t pwmval;
uint32_t tempval;
tempval=perc;
8003c1a: 797b ldrb r3, [r7, #5]
8003c1c: 60fb str r3, [r7, #12]
tempval*=16384;
8003c1e: 68fb ldr r3, [r7, #12]
8003c20: 039b lsls r3, r3, #14
8003c22: 60fb str r3, [r7, #12]
tempval/=100;
8003c24: 68fb ldr r3, [r7, #12]
8003c26: 4ab4 ldr r2, [pc, #720] @ (8003ef8 <SetMotPerc+0x2f0>)
8003c28: fba2 2303 umull r2, r3, r2, r3
8003c2c: 095b lsrs r3, r3, #5
8003c2e: 60fb str r3, [r7, #12]
pwmval=(uint16_t)tempval;
8003c30: 68fb ldr r3, [r7, #12]
8003c32: 817b strh r3, [r7, #10]
switch(mot){
8003c34: 79fb ldrb r3, [r7, #7]
8003c36: 3b01 subs r3, #1
8003c38: 2b03 cmp r3, #3
8003c3a: f200 8157 bhi.w 8003eec <SetMotPerc+0x2e4>
8003c3e: a201 add r2, pc, #4 @ (adr r2, 8003c44 <SetMotPerc+0x3c>)
8003c40: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003c44: 08003c55 .word 0x08003c55
8003c48: 08003cf7 .word 0x08003cf7
8003c4c: 08003d99 .word 0x08003d99
8003c50: 08003e43 .word 0x08003e43
case 1:
if(dir==FW){
8003c54: 79bb ldrb r3, [r7, #6]
8003c56: 2b00 cmp r3, #0
8003c58: d126 bne.n 8003ca8 <SetMotPerc+0xa0>
if(pwmval==0){
8003c5a: 897b ldrh r3, [r7, #10]
8003c5c: 2b00 cmp r3, #0
8003c5e: d109 bne.n 8003c74 <SetMotPerc+0x6c>
StopMot(timMot1,FWMot1);
8003c60: 2100 movs r1, #0
8003c62: 48a6 ldr r0, [pc, #664] @ (8003efc <SetMotPerc+0x2f4>)
8003c64: f7ff fdfd bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8003c68: 2200 movs r2, #0
8003c6a: 2102 movs r1, #2
8003c6c: 48a4 ldr r0, [pc, #656] @ (8003f00 <SetMotPerc+0x2f8>)
8003c6e: f001 ff04 bl 8005a7a <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
8003c72: e13c b.n 8003eee <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, FWMot1)){
8003c74: 2100 movs r1, #0
8003c76: 48a1 ldr r0, [pc, #644] @ (8003efc <SetMotPerc+0x2f4>)
8003c78: f7ff fdde bl 8003838 <IsPwmRunning>
8003c7c: 4603 mov r3, r0
8003c7e: 2b00 cmp r3, #0
8003c80: d006 beq.n 8003c90 <SetMotPerc+0x88>
SetMotPwm(timMot1,FWMot1,pwmval);
8003c82: 897b ldrh r3, [r7, #10]
8003c84: 461a mov r2, r3
8003c86: 2100 movs r1, #0
8003c88: 489c ldr r0, [pc, #624] @ (8003efc <SetMotPerc+0x2f4>)
8003c8a: f7ff fe22 bl 80038d2 <SetMotPwm>
break;
8003c8e: e12e b.n 8003eee <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8003c90: 2201 movs r2, #1
8003c92: 2102 movs r1, #2
8003c94: 489a ldr r0, [pc, #616] @ (8003f00 <SetMotPerc+0x2f8>)
8003c96: f001 fef0 bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
8003c9a: 897b ldrh r3, [r7, #10]
8003c9c: 461a mov r2, r3
8003c9e: 2100 movs r1, #0
8003ca0: 4896 ldr r0, [pc, #600] @ (8003efc <SetMotPerc+0x2f4>)
8003ca2: f7ff fdeb bl 800387c <StartMot>
break;
8003ca6: e122 b.n 8003eee <SetMotPerc+0x2e6>
if(pwmval==0){
8003ca8: 897b ldrh r3, [r7, #10]
8003caa: 2b00 cmp r3, #0
8003cac: d109 bne.n 8003cc2 <SetMotPerc+0xba>
StopMot(timMot1,BWMot1);
8003cae: 2104 movs r1, #4
8003cb0: 4892 ldr r0, [pc, #584] @ (8003efc <SetMotPerc+0x2f4>)
8003cb2: f7ff fdd6 bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8003cb6: 2200 movs r2, #0
8003cb8: 2102 movs r1, #2
8003cba: 4891 ldr r0, [pc, #580] @ (8003f00 <SetMotPerc+0x2f8>)
8003cbc: f001 fedd bl 8005a7a <HAL_GPIO_WritePin>
break;
8003cc0: e115 b.n 8003eee <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, BWMot1)){
8003cc2: 2104 movs r1, #4
8003cc4: 488d ldr r0, [pc, #564] @ (8003efc <SetMotPerc+0x2f4>)
8003cc6: f7ff fdb7 bl 8003838 <IsPwmRunning>
8003cca: 4603 mov r3, r0
8003ccc: 2b00 cmp r3, #0
8003cce: d006 beq.n 8003cde <SetMotPerc+0xd6>
SetMotPwm(timMot1,BWMot1,pwmval);
8003cd0: 897b ldrh r3, [r7, #10]
8003cd2: 461a mov r2, r3
8003cd4: 2104 movs r1, #4
8003cd6: 4889 ldr r0, [pc, #548] @ (8003efc <SetMotPerc+0x2f4>)
8003cd8: f7ff fdfb bl 80038d2 <SetMotPwm>
break;
8003cdc: e107 b.n 8003eee <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8003cde: 2201 movs r2, #1
8003ce0: 2102 movs r1, #2
8003ce2: 4887 ldr r0, [pc, #540] @ (8003f00 <SetMotPerc+0x2f8>)
8003ce4: f001 fec9 bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
8003ce8: 897b ldrh r3, [r7, #10]
8003cea: 461a mov r2, r3
8003cec: 2104 movs r1, #4
8003cee: 4883 ldr r0, [pc, #524] @ (8003efc <SetMotPerc+0x2f4>)
8003cf0: f7ff fdc4 bl 800387c <StartMot>
break;
8003cf4: e0fb b.n 8003eee <SetMotPerc+0x2e6>
case 2:
if(dir==FW){
8003cf6: 79bb ldrb r3, [r7, #6]
8003cf8: 2b00 cmp r3, #0
8003cfa: d126 bne.n 8003d4a <SetMotPerc+0x142>
if(pwmval==0){
8003cfc: 897b ldrh r3, [r7, #10]
8003cfe: 2b00 cmp r3, #0
8003d00: d109 bne.n 8003d16 <SetMotPerc+0x10e>
StopMot(timMot2,FWMot2);
8003d02: 2108 movs r1, #8
8003d04: 487d ldr r0, [pc, #500] @ (8003efc <SetMotPerc+0x2f4>)
8003d06: f7ff fdac bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8003d0a: 2200 movs r2, #0
8003d0c: 2104 movs r1, #4
8003d0e: 487c ldr r0, [pc, #496] @ (8003f00 <SetMotPerc+0x2f8>)
8003d10: f001 feb3 bl 8005a7a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
8003d14: e0eb b.n 8003eee <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, FWMot2)){
8003d16: 2108 movs r1, #8
8003d18: 4878 ldr r0, [pc, #480] @ (8003efc <SetMotPerc+0x2f4>)
8003d1a: f7ff fd8d bl 8003838 <IsPwmRunning>
8003d1e: 4603 mov r3, r0
8003d20: 2b00 cmp r3, #0
8003d22: d006 beq.n 8003d32 <SetMotPerc+0x12a>
SetMotPwm(timMot2,FWMot2,pwmval);
8003d24: 897b ldrh r3, [r7, #10]
8003d26: 461a mov r2, r3
8003d28: 2108 movs r1, #8
8003d2a: 4874 ldr r0, [pc, #464] @ (8003efc <SetMotPerc+0x2f4>)
8003d2c: f7ff fdd1 bl 80038d2 <SetMotPwm>
break;
8003d30: e0dd b.n 8003eee <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8003d32: 2201 movs r2, #1
8003d34: 2104 movs r1, #4
8003d36: 4872 ldr r0, [pc, #456] @ (8003f00 <SetMotPerc+0x2f8>)
8003d38: f001 fe9f bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8003d3c: 897b ldrh r3, [r7, #10]
8003d3e: 461a mov r2, r3
8003d40: 2108 movs r1, #8
8003d42: 486e ldr r0, [pc, #440] @ (8003efc <SetMotPerc+0x2f4>)
8003d44: f7ff fd9a bl 800387c <StartMot>
break;
8003d48: e0d1 b.n 8003eee <SetMotPerc+0x2e6>
if(pwmval==0){
8003d4a: 897b ldrh r3, [r7, #10]
8003d4c: 2b00 cmp r3, #0
8003d4e: d109 bne.n 8003d64 <SetMotPerc+0x15c>
StopMot(timMot2,BWMot2);
8003d50: 210c movs r1, #12
8003d52: 486a ldr r0, [pc, #424] @ (8003efc <SetMotPerc+0x2f4>)
8003d54: f7ff fd85 bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8003d58: 2200 movs r2, #0
8003d5a: 2104 movs r1, #4
8003d5c: 4868 ldr r0, [pc, #416] @ (8003f00 <SetMotPerc+0x2f8>)
8003d5e: f001 fe8c bl 8005a7a <HAL_GPIO_WritePin>
break;
8003d62: e0c4 b.n 8003eee <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, BWMot2)){
8003d64: 210c movs r1, #12
8003d66: 4865 ldr r0, [pc, #404] @ (8003efc <SetMotPerc+0x2f4>)
8003d68: f7ff fd66 bl 8003838 <IsPwmRunning>
8003d6c: 4603 mov r3, r0
8003d6e: 2b00 cmp r3, #0
8003d70: d006 beq.n 8003d80 <SetMotPerc+0x178>
SetMotPwm(timMot2,BWMot2,pwmval);
8003d72: 897b ldrh r3, [r7, #10]
8003d74: 461a mov r2, r3
8003d76: 210c movs r1, #12
8003d78: 4860 ldr r0, [pc, #384] @ (8003efc <SetMotPerc+0x2f4>)
8003d7a: f7ff fdaa bl 80038d2 <SetMotPwm>
break;
8003d7e: e0b6 b.n 8003eee <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8003d80: 2201 movs r2, #1
8003d82: 2104 movs r1, #4
8003d84: 485e ldr r0, [pc, #376] @ (8003f00 <SetMotPerc+0x2f8>)
8003d86: f001 fe78 bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
8003d8a: 897b ldrh r3, [r7, #10]
8003d8c: 461a mov r2, r3
8003d8e: 210c movs r1, #12
8003d90: 485a ldr r0, [pc, #360] @ (8003efc <SetMotPerc+0x2f4>)
8003d92: f7ff fd73 bl 800387c <StartMot>
break;
8003d96: e0aa b.n 8003eee <SetMotPerc+0x2e6>
case 3:
if(dir==FW){
8003d98: 79bb ldrb r3, [r7, #6]
8003d9a: 2b00 cmp r3, #0
8003d9c: d128 bne.n 8003df0 <SetMotPerc+0x1e8>
if(pwmval==0){
8003d9e: 897b ldrh r3, [r7, #10]
8003da0: 2b00 cmp r3, #0
8003da2: d10a bne.n 8003dba <SetMotPerc+0x1b2>
StopMot(timMot3,FWMot3);
8003da4: 2100 movs r1, #0
8003da6: 4857 ldr r0, [pc, #348] @ (8003f04 <SetMotPerc+0x2fc>)
8003da8: f7ff fd5b bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8003dac: 2200 movs r2, #0
8003dae: f44f 6180 mov.w r1, #1024 @ 0x400
8003db2: 4853 ldr r0, [pc, #332] @ (8003f00 <SetMotPerc+0x2f8>)
8003db4: f001 fe61 bl 8005a7a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8003db8: e099 b.n 8003eee <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, FWMot3)){
8003dba: 2100 movs r1, #0
8003dbc: 4851 ldr r0, [pc, #324] @ (8003f04 <SetMotPerc+0x2fc>)
8003dbe: f7ff fd3b bl 8003838 <IsPwmRunning>
8003dc2: 4603 mov r3, r0
8003dc4: 2b00 cmp r3, #0
8003dc6: d006 beq.n 8003dd6 <SetMotPerc+0x1ce>
SetMotPwm(timMot3,FWMot3,pwmval);
8003dc8: 897b ldrh r3, [r7, #10]
8003dca: 461a mov r2, r3
8003dcc: 2100 movs r1, #0
8003dce: 484d ldr r0, [pc, #308] @ (8003f04 <SetMotPerc+0x2fc>)
8003dd0: f7ff fd7f bl 80038d2 <SetMotPwm>
break;
8003dd4: e08b b.n 8003eee <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8003dd6: 2201 movs r2, #1
8003dd8: f44f 6180 mov.w r1, #1024 @ 0x400
8003ddc: 4848 ldr r0, [pc, #288] @ (8003f00 <SetMotPerc+0x2f8>)
8003dde: f001 fe4c bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
8003de2: 897b ldrh r3, [r7, #10]
8003de4: 461a mov r2, r3
8003de6: 2100 movs r1, #0
8003de8: 4846 ldr r0, [pc, #280] @ (8003f04 <SetMotPerc+0x2fc>)
8003dea: f7ff fd47 bl 800387c <StartMot>
break;
8003dee: e07e b.n 8003eee <SetMotPerc+0x2e6>
if(pwmval==0){
8003df0: 897b ldrh r3, [r7, #10]
8003df2: 2b00 cmp r3, #0
8003df4: d10a bne.n 8003e0c <SetMotPerc+0x204>
StopMot(timMot3,BWMot3);
8003df6: 2104 movs r1, #4
8003df8: 4842 ldr r0, [pc, #264] @ (8003f04 <SetMotPerc+0x2fc>)
8003dfa: f7ff fd32 bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8003dfe: 2200 movs r2, #0
8003e00: f44f 6180 mov.w r1, #1024 @ 0x400
8003e04: 483e ldr r0, [pc, #248] @ (8003f00 <SetMotPerc+0x2f8>)
8003e06: f001 fe38 bl 8005a7a <HAL_GPIO_WritePin>
break;
8003e0a: e070 b.n 8003eee <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, BWMot3)){
8003e0c: 2104 movs r1, #4
8003e0e: 483d ldr r0, [pc, #244] @ (8003f04 <SetMotPerc+0x2fc>)
8003e10: f7ff fd12 bl 8003838 <IsPwmRunning>
8003e14: 4603 mov r3, r0
8003e16: 2b00 cmp r3, #0
8003e18: d006 beq.n 8003e28 <SetMotPerc+0x220>
SetMotPwm(timMot3,BWMot3,pwmval);
8003e1a: 897b ldrh r3, [r7, #10]
8003e1c: 461a mov r2, r3
8003e1e: 2104 movs r1, #4
8003e20: 4838 ldr r0, [pc, #224] @ (8003f04 <SetMotPerc+0x2fc>)
8003e22: f7ff fd56 bl 80038d2 <SetMotPwm>
break;
8003e26: e062 b.n 8003eee <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
8003e28: 2201 movs r2, #1
8003e2a: f44f 6180 mov.w r1, #1024 @ 0x400
8003e2e: 4834 ldr r0, [pc, #208] @ (8003f00 <SetMotPerc+0x2f8>)
8003e30: f001 fe23 bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8003e34: 897b ldrh r3, [r7, #10]
8003e36: 461a mov r2, r3
8003e38: 2104 movs r1, #4
8003e3a: 4832 ldr r0, [pc, #200] @ (8003f04 <SetMotPerc+0x2fc>)
8003e3c: f7ff fd1e bl 800387c <StartMot>
break;
8003e40: e055 b.n 8003eee <SetMotPerc+0x2e6>
case 4:
if(dir==FW){
8003e42: 79bb ldrb r3, [r7, #6]
8003e44: 2b00 cmp r3, #0
8003e46: d128 bne.n 8003e9a <SetMotPerc+0x292>
if(pwmval==0){
8003e48: 897b ldrh r3, [r7, #10]
8003e4a: 2b00 cmp r3, #0
8003e4c: d10a bne.n 8003e64 <SetMotPerc+0x25c>
StopMot(timMot4,FWMot4);
8003e4e: 2108 movs r1, #8
8003e50: 482c ldr r0, [pc, #176] @ (8003f04 <SetMotPerc+0x2fc>)
8003e52: f7ff fd06 bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8003e56: 2200 movs r2, #0
8003e58: f44f 6100 mov.w r1, #2048 @ 0x800
8003e5c: 4828 ldr r0, [pc, #160] @ (8003f00 <SetMotPerc+0x2f8>)
8003e5e: f001 fe0c bl 8005a7a <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8003e62: e044 b.n 8003eee <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, FWMot4)){
8003e64: 2108 movs r1, #8
8003e66: 4827 ldr r0, [pc, #156] @ (8003f04 <SetMotPerc+0x2fc>)
8003e68: f7ff fce6 bl 8003838 <IsPwmRunning>
8003e6c: 4603 mov r3, r0
8003e6e: 2b00 cmp r3, #0
8003e70: d006 beq.n 8003e80 <SetMotPerc+0x278>
SetMotPwm(timMot4,FWMot4,pwmval);
8003e72: 897b ldrh r3, [r7, #10]
8003e74: 461a mov r2, r3
8003e76: 2108 movs r1, #8
8003e78: 4822 ldr r0, [pc, #136] @ (8003f04 <SetMotPerc+0x2fc>)
8003e7a: f7ff fd2a bl 80038d2 <SetMotPwm>
break;
8003e7e: e036 b.n 8003eee <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8003e80: 2201 movs r2, #1
8003e82: f44f 6100 mov.w r1, #2048 @ 0x800
8003e86: 481e ldr r0, [pc, #120] @ (8003f00 <SetMotPerc+0x2f8>)
8003e88: f001 fdf7 bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
8003e8c: 897b ldrh r3, [r7, #10]
8003e8e: 461a mov r2, r3
8003e90: 2108 movs r1, #8
8003e92: 481c ldr r0, [pc, #112] @ (8003f04 <SetMotPerc+0x2fc>)
8003e94: f7ff fcf2 bl 800387c <StartMot>
break;
8003e98: e029 b.n 8003eee <SetMotPerc+0x2e6>
if(pwmval==0){
8003e9a: 897b ldrh r3, [r7, #10]
8003e9c: 2b00 cmp r3, #0
8003e9e: d10a bne.n 8003eb6 <SetMotPerc+0x2ae>
StopMot(timMot4,BWMot4);
8003ea0: 210c movs r1, #12
8003ea2: 4818 ldr r0, [pc, #96] @ (8003f04 <SetMotPerc+0x2fc>)
8003ea4: f7ff fcdd bl 8003862 <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8003ea8: 2200 movs r2, #0
8003eaa: f44f 6100 mov.w r1, #2048 @ 0x800
8003eae: 4814 ldr r0, [pc, #80] @ (8003f00 <SetMotPerc+0x2f8>)
8003eb0: f001 fde3 bl 8005a7a <HAL_GPIO_WritePin>
break;
8003eb4: e01b b.n 8003eee <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, BWMot4)){
8003eb6: 210c movs r1, #12
8003eb8: 4812 ldr r0, [pc, #72] @ (8003f04 <SetMotPerc+0x2fc>)
8003eba: f7ff fcbd bl 8003838 <IsPwmRunning>
8003ebe: 4603 mov r3, r0
8003ec0: 2b00 cmp r3, #0
8003ec2: d006 beq.n 8003ed2 <SetMotPerc+0x2ca>
SetMotPwm(timMot4,BWMot4,pwmval);
8003ec4: 897b ldrh r3, [r7, #10]
8003ec6: 461a mov r2, r3
8003ec8: 210c movs r1, #12
8003eca: 480e ldr r0, [pc, #56] @ (8003f04 <SetMotPerc+0x2fc>)
8003ecc: f7ff fd01 bl 80038d2 <SetMotPwm>
break;
8003ed0: e00d b.n 8003eee <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8003ed2: 2201 movs r2, #1
8003ed4: f44f 6100 mov.w r1, #2048 @ 0x800
8003ed8: 4809 ldr r0, [pc, #36] @ (8003f00 <SetMotPerc+0x2f8>)
8003eda: f001 fdce bl 8005a7a <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
8003ede: 897b ldrh r3, [r7, #10]
8003ee0: 461a mov r2, r3
8003ee2: 210c movs r1, #12
8003ee4: 4807 ldr r0, [pc, #28] @ (8003f04 <SetMotPerc+0x2fc>)
8003ee6: f7ff fcc9 bl 800387c <StartMot>
break;
8003eea: e000 b.n 8003eee <SetMotPerc+0x2e6>
default:
break;
8003eec: bf00 nop
}
}
8003eee: bf00 nop
8003ef0: 3710 adds r7, #16
8003ef2: 46bd mov sp, r7
8003ef4: bd80 pop {r7, pc}
8003ef6: bf00 nop
8003ef8: 51eb851f .word 0x51eb851f
8003efc: 20000310 .word 0x20000310
8003f00: 40010c00 .word 0x40010c00
8003f04: 20000358 .word 0x20000358
08003f08 <ramp>:
uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){
8003f08: b590 push {r4, r7, lr}
8003f0a: b085 sub sp, #20
8003f0c: af00 add r7, sp, #0
8003f0e: 4604 mov r4, r0
8003f10: 4608 mov r0, r1
8003f12: 4611 mov r1, r2
8003f14: 461a mov r2, r3
8003f16: 4623 mov r3, r4
8003f18: 71fb strb r3, [r7, #7]
8003f1a: 4603 mov r3, r0
8003f1c: 71bb strb r3, [r7, #6]
8003f1e: 460b mov r3, r1
8003f20: 717b strb r3, [r7, #5]
8003f22: 4613 mov r3, r2
8003f24: 713b strb r3, [r7, #4]
static uint8_t memrtramp[4];
uint16_t delta;
switch(mode){
8003f26: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
8003f2a: 2b00 cmp r3, #0
8003f2c: d002 beq.n 8003f34 <ramp+0x2c>
8003f2e: 2b0a cmp r3, #10
8003f30: d013 beq.n 8003f5a <ramp+0x52>
8003f32: e0a5 b.n 8004080 <ramp+0x178>
case RAMPINIT:
memrtramp[mot-1]=percStart=tr;
8003f34: f897 3020 ldrb.w r3, [r7, #32]
8003f38: 717b strb r3, [r7, #5]
8003f3a: 79fb ldrb r3, [r7, #7]
8003f3c: 3b01 subs r3, #1
8003f3e: 4953 ldr r1, [pc, #332] @ (800408c <ramp+0x184>)
8003f40: 797a ldrb r2, [r7, #5]
8003f42: 54ca strb r2, [r1, r3]
SetMotPerc(mot,dir,mrampstart[mot-1]);
8003f44: 79fb ldrb r3, [r7, #7]
8003f46: 3b01 subs r3, #1
8003f48: 4a51 ldr r2, [pc, #324] @ (8004090 <ramp+0x188>)
8003f4a: 5cd2 ldrb r2, [r2, r3]
8003f4c: 79b9 ldrb r1, [r7, #6]
8003f4e: 79fb ldrb r3, [r7, #7]
8003f50: 4618 mov r0, r3
8003f52: f7ff fe59 bl 8003c08 <SetMotPerc>
return DONE;
8003f56: 2300 movs r3, #0
8003f58: e093 b.n 8004082 <ramp+0x17a>
case RAMPRUN:
if(memrtramp[mot-1]!=rtramp[mot-1]){
8003f5a: 79fb ldrb r3, [r7, #7]
8003f5c: 3b01 subs r3, #1
8003f5e: 4a4b ldr r2, [pc, #300] @ (800408c <ramp+0x184>)
8003f60: 5cd2 ldrb r2, [r2, r3]
8003f62: 79fb ldrb r3, [r7, #7]
8003f64: 3b01 subs r3, #1
8003f66: 494b ldr r1, [pc, #300] @ (8004094 <ramp+0x18c>)
8003f68: 5ccb ldrb r3, [r1, r3]
8003f6a: b2db uxtb r3, r3
8003f6c: 429a cmp r2, r3
8003f6e: f000 8085 beq.w 800407c <ramp+0x174>
memrtramp[mot-1]=rtramp[mot-1];
8003f72: 79fb ldrb r3, [r7, #7]
8003f74: 1e5a subs r2, r3, #1
8003f76: 79fb ldrb r3, [r7, #7]
8003f78: 3b01 subs r3, #1
8003f7a: 4946 ldr r1, [pc, #280] @ (8004094 <ramp+0x18c>)
8003f7c: 5c8a ldrb r2, [r1, r2]
8003f7e: b2d1 uxtb r1, r2
8003f80: 4a42 ldr r2, [pc, #264] @ (800408c <ramp+0x184>)
8003f82: 54d1 strb r1, [r2, r3]
if(rtramp[mot-1]){
8003f84: 79fb ldrb r3, [r7, #7]
8003f86: 3b01 subs r3, #1
8003f88: 4a42 ldr r2, [pc, #264] @ (8004094 <ramp+0x18c>)
8003f8a: 5cd3 ldrb r3, [r2, r3]
8003f8c: b2db uxtb r3, r3
8003f8e: 2b00 cmp r3, #0
8003f90: d06c beq.n 800406c <ramp+0x164>
if(mrampstart[mot-1]>percEnd){
8003f92: 79fb ldrb r3, [r7, #7]
8003f94: 3b01 subs r3, #1
8003f96: 4a3e ldr r2, [pc, #248] @ (8004090 <ramp+0x188>)
8003f98: 5cd3 ldrb r3, [r2, r3]
8003f9a: 793a ldrb r2, [r7, #4]
8003f9c: 429a cmp r2, r3
8003f9e: d22b bcs.n 8003ff8 <ramp+0xf0>
delta=mrampstart[mot-1]-percEnd;
8003fa0: 79fb ldrb r3, [r7, #7]
8003fa2: 3b01 subs r3, #1
8003fa4: 4a3a ldr r2, [pc, #232] @ (8004090 <ramp+0x188>)
8003fa6: 5cd3 ldrb r3, [r2, r3]
8003fa8: 461a mov r2, r3
8003faa: 793b ldrb r3, [r7, #4]
8003fac: b29b uxth r3, r3
8003fae: 1ad3 subs r3, r2, r3
8003fb0: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8003fb2: f897 3020 ldrb.w r3, [r7, #32]
8003fb6: b29b uxth r3, r3
8003fb8: 79fa ldrb r2, [r7, #7]
8003fba: 3a01 subs r2, #1
8003fbc: 4935 ldr r1, [pc, #212] @ (8004094 <ramp+0x18c>)
8003fbe: 5c8a ldrb r2, [r1, r2]
8003fc0: b2d2 uxtb r2, r2
8003fc2: 1a9b subs r3, r3, r2
8003fc4: b29b uxth r3, r3
8003fc6: 89fa ldrh r2, [r7, #14]
8003fc8: fb02 f303 mul.w r3, r2, r3
8003fcc: 81fb strh r3, [r7, #14]
delta=delta/tr;
8003fce: 89fa ldrh r2, [r7, #14]
8003fd0: f897 3020 ldrb.w r3, [r7, #32]
8003fd4: fb92 f3f3 sdiv r3, r2, r3
8003fd8: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,mrampstart[mot-1]-delta);
8003fda: 79fb ldrb r3, [r7, #7]
8003fdc: 3b01 subs r3, #1
8003fde: 4a2c ldr r2, [pc, #176] @ (8004090 <ramp+0x188>)
8003fe0: 5cd2 ldrb r2, [r2, r3]
8003fe2: 89fb ldrh r3, [r7, #14]
8003fe4: b2db uxtb r3, r3
8003fe6: 1ad3 subs r3, r2, r3
8003fe8: b2da uxtb r2, r3
8003fea: 79b9 ldrb r1, [r7, #6]
8003fec: 79fb ldrb r3, [r7, #7]
8003fee: 4618 mov r0, r3
8003ff0: f7ff fe0a bl 8003c08 <SetMotPerc>
return RUNNING;
8003ff4: 2301 movs r3, #1
8003ff6: e044 b.n 8004082 <ramp+0x17a>
}else if(mrampstart[mot-1]<percEnd){
8003ff8: 79fb ldrb r3, [r7, #7]
8003ffa: 3b01 subs r3, #1
8003ffc: 4a24 ldr r2, [pc, #144] @ (8004090 <ramp+0x188>)
8003ffe: 5cd3 ldrb r3, [r2, r3]
8004000: 793a ldrb r2, [r7, #4]
8004002: 429a cmp r2, r3
8004004: d92a bls.n 800405c <ramp+0x154>
delta=percEnd-mrampstart[mot-1];
8004006: 793b ldrb r3, [r7, #4]
8004008: b29b uxth r3, r3
800400a: 79fa ldrb r2, [r7, #7]
800400c: 3a01 subs r2, #1
800400e: 4920 ldr r1, [pc, #128] @ (8004090 <ramp+0x188>)
8004010: 5c8a ldrb r2, [r1, r2]
8004012: 1a9b subs r3, r3, r2
8004014: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004016: f897 3020 ldrb.w r3, [r7, #32]
800401a: b29b uxth r3, r3
800401c: 79fa ldrb r2, [r7, #7]
800401e: 3a01 subs r2, #1
8004020: 491c ldr r1, [pc, #112] @ (8004094 <ramp+0x18c>)
8004022: 5c8a ldrb r2, [r1, r2]
8004024: b2d2 uxtb r2, r2
8004026: 1a9b subs r3, r3, r2
8004028: b29b uxth r3, r3
800402a: 89fa ldrh r2, [r7, #14]
800402c: fb02 f303 mul.w r3, r2, r3
8004030: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004032: 89fa ldrh r2, [r7, #14]
8004034: f897 3020 ldrb.w r3, [r7, #32]
8004038: fb92 f3f3 sdiv r3, r2, r3
800403c: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,mrampstart[mot-1]+delta);
800403e: 79fb ldrb r3, [r7, #7]
8004040: 3b01 subs r3, #1
8004042: 4a13 ldr r2, [pc, #76] @ (8004090 <ramp+0x188>)
8004044: 5cd2 ldrb r2, [r2, r3]
8004046: 89fb ldrh r3, [r7, #14]
8004048: b2db uxtb r3, r3
800404a: 4413 add r3, r2
800404c: b2da uxtb r2, r3
800404e: 79b9 ldrb r1, [r7, #6]
8004050: 79fb ldrb r3, [r7, #7]
8004052: 4618 mov r0, r3
8004054: f7ff fdd8 bl 8003c08 <SetMotPerc>
return RUNNING;
8004058: 2301 movs r3, #1
800405a: e012 b.n 8004082 <ramp+0x17a>
}else{
SetMotPerc(mot,dir,percEnd);
800405c: 793a ldrb r2, [r7, #4]
800405e: 79b9 ldrb r1, [r7, #6]
8004060: 79fb ldrb r3, [r7, #7]
8004062: 4618 mov r0, r3
8004064: f7ff fdd0 bl 8003c08 <SetMotPerc>
return DONE;
8004068: 2300 movs r3, #0
800406a: e00a b.n 8004082 <ramp+0x17a>
}
}else{
SetMotPerc(mot,dir,percEnd);
800406c: 793a ldrb r2, [r7, #4]
800406e: 79b9 ldrb r1, [r7, #6]
8004070: 79fb ldrb r3, [r7, #7]
8004072: 4618 mov r0, r3
8004074: f7ff fdc8 bl 8003c08 <SetMotPerc>
return DONE;
8004078: 2300 movs r3, #0
800407a: e002 b.n 8004082 <ramp+0x17a>
}
}else return RUNNING;
800407c: 2301 movs r3, #1
800407e: e000 b.n 8004082 <ramp+0x17a>
break;
}
return DONE;
8004080: 2300 movs r3, #0
}
8004082: 4618 mov r0, r3
8004084: 3714 adds r7, #20
8004086: 46bd mov sp, r7
8004088: bd90 pop {r4, r7, pc}
800408a: bf00 nop
800408c: 2000045c .word 0x2000045c
8004090: 2000043c .word 0x2000043c
8004094: 200003ec .word 0x200003ec
08004098 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8004098: b480 push {r7}
800409a: b085 sub sp, #20
800409c: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
800409e: 4b15 ldr r3, [pc, #84] @ (80040f4 <HAL_MspInit+0x5c>)
80040a0: 699b ldr r3, [r3, #24]
80040a2: 4a14 ldr r2, [pc, #80] @ (80040f4 <HAL_MspInit+0x5c>)
80040a4: f043 0301 orr.w r3, r3, #1
80040a8: 6193 str r3, [r2, #24]
80040aa: 4b12 ldr r3, [pc, #72] @ (80040f4 <HAL_MspInit+0x5c>)
80040ac: 699b ldr r3, [r3, #24]
80040ae: f003 0301 and.w r3, r3, #1
80040b2: 60bb str r3, [r7, #8]
80040b4: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
80040b6: 4b0f ldr r3, [pc, #60] @ (80040f4 <HAL_MspInit+0x5c>)
80040b8: 69db ldr r3, [r3, #28]
80040ba: 4a0e ldr r2, [pc, #56] @ (80040f4 <HAL_MspInit+0x5c>)
80040bc: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80040c0: 61d3 str r3, [r2, #28]
80040c2: 4b0c ldr r3, [pc, #48] @ (80040f4 <HAL_MspInit+0x5c>)
80040c4: 69db ldr r3, [r3, #28]
80040c6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80040ca: 607b str r3, [r7, #4]
80040cc: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
80040ce: 4b0a ldr r3, [pc, #40] @ (80040f8 <HAL_MspInit+0x60>)
80040d0: 685b ldr r3, [r3, #4]
80040d2: 60fb str r3, [r7, #12]
80040d4: 68fb ldr r3, [r7, #12]
80040d6: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
80040da: 60fb str r3, [r7, #12]
80040dc: 68fb ldr r3, [r7, #12]
80040de: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
80040e2: 60fb str r3, [r7, #12]
80040e4: 4a04 ldr r2, [pc, #16] @ (80040f8 <HAL_MspInit+0x60>)
80040e6: 68fb ldr r3, [r7, #12]
80040e8: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
80040ea: bf00 nop
80040ec: 3714 adds r7, #20
80040ee: 46bd mov sp, r7
80040f0: bc80 pop {r7}
80040f2: 4770 bx lr
80040f4: 40021000 .word 0x40021000
80040f8: 40010000 .word 0x40010000
080040fc <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
80040fc: b580 push {r7, lr}
80040fe: b08a sub sp, #40 @ 0x28
8004100: af00 add r7, sp, #0
8004102: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004104: f107 0318 add.w r3, r7, #24
8004108: 2200 movs r2, #0
800410a: 601a str r2, [r3, #0]
800410c: 605a str r2, [r3, #4]
800410e: 609a str r2, [r3, #8]
8004110: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
8004112: 687b ldr r3, [r7, #4]
8004114: 681b ldr r3, [r3, #0]
8004116: 4a33 ldr r2, [pc, #204] @ (80041e4 <HAL_ADC_MspInit+0xe8>)
8004118: 4293 cmp r3, r2
800411a: d15f bne.n 80041dc <HAL_ADC_MspInit+0xe0>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
800411c: 4b32 ldr r3, [pc, #200] @ (80041e8 <HAL_ADC_MspInit+0xec>)
800411e: 699b ldr r3, [r3, #24]
8004120: 4a31 ldr r2, [pc, #196] @ (80041e8 <HAL_ADC_MspInit+0xec>)
8004122: f443 7300 orr.w r3, r3, #512 @ 0x200
8004126: 6193 str r3, [r2, #24]
8004128: 4b2f ldr r3, [pc, #188] @ (80041e8 <HAL_ADC_MspInit+0xec>)
800412a: 699b ldr r3, [r3, #24]
800412c: f403 7300 and.w r3, r3, #512 @ 0x200
8004130: 617b str r3, [r7, #20]
8004132: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004134: 4b2c ldr r3, [pc, #176] @ (80041e8 <HAL_ADC_MspInit+0xec>)
8004136: 699b ldr r3, [r3, #24]
8004138: 4a2b ldr r2, [pc, #172] @ (80041e8 <HAL_ADC_MspInit+0xec>)
800413a: f043 0304 orr.w r3, r3, #4
800413e: 6193 str r3, [r2, #24]
8004140: 4b29 ldr r3, [pc, #164] @ (80041e8 <HAL_ADC_MspInit+0xec>)
8004142: 699b ldr r3, [r3, #24]
8004144: f003 0304 and.w r3, r3, #4
8004148: 613b str r3, [r7, #16]
800414a: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
800414c: 4b26 ldr r3, [pc, #152] @ (80041e8 <HAL_ADC_MspInit+0xec>)
800414e: 699b ldr r3, [r3, #24]
8004150: 4a25 ldr r2, [pc, #148] @ (80041e8 <HAL_ADC_MspInit+0xec>)
8004152: f043 0308 orr.w r3, r3, #8
8004156: 6193 str r3, [r2, #24]
8004158: 4b23 ldr r3, [pc, #140] @ (80041e8 <HAL_ADC_MspInit+0xec>)
800415a: 699b ldr r3, [r3, #24]
800415c: f003 0308 and.w r3, r3, #8
8004160: 60fb str r3, [r7, #12]
8004162: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
8004164: 23f0 movs r3, #240 @ 0xf0
8004166: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004168: 2303 movs r3, #3
800416a: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800416c: f107 0318 add.w r3, r7, #24
8004170: 4619 mov r1, r3
8004172: 481e ldr r0, [pc, #120] @ (80041ec <HAL_ADC_MspInit+0xf0>)
8004174: f001 fae6 bl 8005744 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8004178: 2301 movs r3, #1
800417a: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
800417c: 2303 movs r3, #3
800417e: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
8004180: f107 0318 add.w r3, r7, #24
8004184: 4619 mov r1, r3
8004186: 481a ldr r0, [pc, #104] @ (80041f0 <HAL_ADC_MspInit+0xf4>)
8004188: f001 fadc bl 8005744 <HAL_GPIO_Init>
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
800418c: 4b19 ldr r3, [pc, #100] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
800418e: 4a1a ldr r2, [pc, #104] @ (80041f8 <HAL_ADC_MspInit+0xfc>)
8004190: 601a str r2, [r3, #0]
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
8004192: 4b18 ldr r3, [pc, #96] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
8004194: 2200 movs r2, #0
8004196: 605a str r2, [r3, #4]
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
8004198: 4b16 ldr r3, [pc, #88] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
800419a: 2200 movs r2, #0
800419c: 609a str r2, [r3, #8]
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
800419e: 4b15 ldr r3, [pc, #84] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
80041a0: 2280 movs r2, #128 @ 0x80
80041a2: 60da str r2, [r3, #12]
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
80041a4: 4b13 ldr r3, [pc, #76] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
80041a6: f44f 7280 mov.w r2, #256 @ 0x100
80041aa: 611a str r2, [r3, #16]
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
80041ac: 4b11 ldr r3, [pc, #68] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
80041ae: f44f 6280 mov.w r2, #1024 @ 0x400
80041b2: 615a str r2, [r3, #20]
hdma_adc1.Init.Mode = DMA_CIRCULAR;
80041b4: 4b0f ldr r3, [pc, #60] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
80041b6: 2220 movs r2, #32
80041b8: 619a str r2, [r3, #24]
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
80041ba: 4b0e ldr r3, [pc, #56] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
80041bc: 2200 movs r2, #0
80041be: 61da str r2, [r3, #28]
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
80041c0: 480c ldr r0, [pc, #48] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
80041c2: f000 fed1 bl 8004f68 <HAL_DMA_Init>
80041c6: 4603 mov r3, r0
80041c8: 2b00 cmp r3, #0
80041ca: d001 beq.n 80041d0 <HAL_ADC_MspInit+0xd4>
{
Error_Handler();
80041cc: f7fe fdb6 bl 8002d3c <Error_Handler>
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
80041d0: 687b ldr r3, [r7, #4]
80041d2: 4a08 ldr r2, [pc, #32] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
80041d4: 621a str r2, [r3, #32]
80041d6: 4a07 ldr r2, [pc, #28] @ (80041f4 <HAL_ADC_MspInit+0xf8>)
80041d8: 687b ldr r3, [r7, #4]
80041da: 6253 str r3, [r2, #36] @ 0x24
/* USER CODE END ADC1_MspInit 1 */
}
}
80041dc: bf00 nop
80041de: 3728 adds r7, #40 @ 0x28
80041e0: 46bd mov sp, r7
80041e2: bd80 pop {r7, pc}
80041e4: 40012400 .word 0x40012400
80041e8: 40021000 .word 0x40021000
80041ec: 40010800 .word 0x40010800
80041f0: 40010c00 .word 0x40010c00
80041f4: 200002cc .word 0x200002cc
80041f8: 40020008 .word 0x40020008
080041fc <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
80041fc: b480 push {r7}
80041fe: b085 sub sp, #20
8004200: af00 add r7, sp, #0
8004202: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
8004204: 687b ldr r3, [r7, #4]
8004206: 681b ldr r3, [r3, #0]
8004208: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800420c: d10c bne.n 8004228 <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
800420e: 4b11 ldr r3, [pc, #68] @ (8004254 <HAL_TIM_Base_MspInit+0x58>)
8004210: 69db ldr r3, [r3, #28]
8004212: 4a10 ldr r2, [pc, #64] @ (8004254 <HAL_TIM_Base_MspInit+0x58>)
8004214: f043 0301 orr.w r3, r3, #1
8004218: 61d3 str r3, [r2, #28]
800421a: 4b0e ldr r3, [pc, #56] @ (8004254 <HAL_TIM_Base_MspInit+0x58>)
800421c: 69db ldr r3, [r3, #28]
800421e: f003 0301 and.w r3, r3, #1
8004222: 60fb str r3, [r7, #12]
8004224: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8004226: e010 b.n 800424a <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
8004228: 687b ldr r3, [r7, #4]
800422a: 681b ldr r3, [r3, #0]
800422c: 4a0a ldr r2, [pc, #40] @ (8004258 <HAL_TIM_Base_MspInit+0x5c>)
800422e: 4293 cmp r3, r2
8004230: d10b bne.n 800424a <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
8004232: 4b08 ldr r3, [pc, #32] @ (8004254 <HAL_TIM_Base_MspInit+0x58>)
8004234: 69db ldr r3, [r3, #28]
8004236: 4a07 ldr r2, [pc, #28] @ (8004254 <HAL_TIM_Base_MspInit+0x58>)
8004238: f043 0304 orr.w r3, r3, #4
800423c: 61d3 str r3, [r2, #28]
800423e: 4b05 ldr r3, [pc, #20] @ (8004254 <HAL_TIM_Base_MspInit+0x58>)
8004240: 69db ldr r3, [r3, #28]
8004242: f003 0304 and.w r3, r3, #4
8004246: 60bb str r3, [r7, #8]
8004248: 68bb ldr r3, [r7, #8]
}
800424a: bf00 nop
800424c: 3714 adds r7, #20
800424e: 46bd mov sp, r7
8004250: bc80 pop {r7}
8004252: 4770 bx lr
8004254: 40021000 .word 0x40021000
8004258: 40000800 .word 0x40000800
0800425c <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
800425c: b580 push {r7, lr}
800425e: b088 sub sp, #32
8004260: af00 add r7, sp, #0
8004262: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004264: f107 0310 add.w r3, r7, #16
8004268: 2200 movs r2, #0
800426a: 601a str r2, [r3, #0]
800426c: 605a str r2, [r3, #4]
800426e: 609a str r2, [r3, #8]
8004270: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
8004272: 687b ldr r3, [r7, #4]
8004274: 681b ldr r3, [r3, #0]
8004276: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800427a: d118 bne.n 80042ae <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
800427c: 4b1d ldr r3, [pc, #116] @ (80042f4 <HAL_TIM_MspPostInit+0x98>)
800427e: 699b ldr r3, [r3, #24]
8004280: 4a1c ldr r2, [pc, #112] @ (80042f4 <HAL_TIM_MspPostInit+0x98>)
8004282: f043 0304 orr.w r3, r3, #4
8004286: 6193 str r3, [r2, #24]
8004288: 4b1a ldr r3, [pc, #104] @ (80042f4 <HAL_TIM_MspPostInit+0x98>)
800428a: 699b ldr r3, [r3, #24]
800428c: f003 0304 and.w r3, r3, #4
8004290: 60fb str r3, [r7, #12]
8004292: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
8004294: 230f movs r3, #15
8004296: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004298: 2302 movs r3, #2
800429a: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800429c: 2302 movs r3, #2
800429e: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80042a0: f107 0310 add.w r3, r7, #16
80042a4: 4619 mov r1, r3
80042a6: 4814 ldr r0, [pc, #80] @ (80042f8 <HAL_TIM_MspPostInit+0x9c>)
80042a8: f001 fa4c bl 8005744 <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
80042ac: e01d b.n 80042ea <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
80042ae: 687b ldr r3, [r7, #4]
80042b0: 681b ldr r3, [r3, #0]
80042b2: 4a12 ldr r2, [pc, #72] @ (80042fc <HAL_TIM_MspPostInit+0xa0>)
80042b4: 4293 cmp r3, r2
80042b6: d118 bne.n 80042ea <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
80042b8: 4b0e ldr r3, [pc, #56] @ (80042f4 <HAL_TIM_MspPostInit+0x98>)
80042ba: 699b ldr r3, [r3, #24]
80042bc: 4a0d ldr r2, [pc, #52] @ (80042f4 <HAL_TIM_MspPostInit+0x98>)
80042be: f043 0308 orr.w r3, r3, #8
80042c2: 6193 str r3, [r2, #24]
80042c4: 4b0b ldr r3, [pc, #44] @ (80042f4 <HAL_TIM_MspPostInit+0x98>)
80042c6: 699b ldr r3, [r3, #24]
80042c8: f003 0308 and.w r3, r3, #8
80042cc: 60bb str r3, [r7, #8]
80042ce: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
80042d0: f44f 7370 mov.w r3, #960 @ 0x3c0
80042d4: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
80042d6: 2302 movs r3, #2
80042d8: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80042da: 2302 movs r3, #2
80042dc: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
80042de: f107 0310 add.w r3, r7, #16
80042e2: 4619 mov r1, r3
80042e4: 4806 ldr r0, [pc, #24] @ (8004300 <HAL_TIM_MspPostInit+0xa4>)
80042e6: f001 fa2d bl 8005744 <HAL_GPIO_Init>
}
80042ea: bf00 nop
80042ec: 3720 adds r7, #32
80042ee: 46bd mov sp, r7
80042f0: bd80 pop {r7, pc}
80042f2: bf00 nop
80042f4: 40021000 .word 0x40021000
80042f8: 40010800 .word 0x40010800
80042fc: 40000800 .word 0x40000800
8004300: 40010c00 .word 0x40010c00
08004304 <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8004304: b580 push {r7, lr}
8004306: b088 sub sp, #32
8004308: af00 add r7, sp, #0
800430a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
800430c: f107 0310 add.w r3, r7, #16
8004310: 2200 movs r2, #0
8004312: 601a str r2, [r3, #0]
8004314: 605a str r2, [r3, #4]
8004316: 609a str r2, [r3, #8]
8004318: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
800431a: 687b ldr r3, [r7, #4]
800431c: 681b ldr r3, [r3, #0]
800431e: 4a1c ldr r2, [pc, #112] @ (8004390 <HAL_UART_MspInit+0x8c>)
8004320: 4293 cmp r3, r2
8004322: d131 bne.n 8004388 <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8004324: 4b1b ldr r3, [pc, #108] @ (8004394 <HAL_UART_MspInit+0x90>)
8004326: 699b ldr r3, [r3, #24]
8004328: 4a1a ldr r2, [pc, #104] @ (8004394 <HAL_UART_MspInit+0x90>)
800432a: f443 4380 orr.w r3, r3, #16384 @ 0x4000
800432e: 6193 str r3, [r2, #24]
8004330: 4b18 ldr r3, [pc, #96] @ (8004394 <HAL_UART_MspInit+0x90>)
8004332: 699b ldr r3, [r3, #24]
8004334: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004338: 60fb str r3, [r7, #12]
800433a: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
800433c: 4b15 ldr r3, [pc, #84] @ (8004394 <HAL_UART_MspInit+0x90>)
800433e: 699b ldr r3, [r3, #24]
8004340: 4a14 ldr r2, [pc, #80] @ (8004394 <HAL_UART_MspInit+0x90>)
8004342: f043 0304 orr.w r3, r3, #4
8004346: 6193 str r3, [r2, #24]
8004348: 4b12 ldr r3, [pc, #72] @ (8004394 <HAL_UART_MspInit+0x90>)
800434a: 699b ldr r3, [r3, #24]
800434c: f003 0304 and.w r3, r3, #4
8004350: 60bb str r3, [r7, #8]
8004352: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
8004354: f44f 7300 mov.w r3, #512 @ 0x200
8004358: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
800435a: 2302 movs r3, #2
800435c: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
800435e: 2303 movs r3, #3
8004360: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004362: f107 0310 add.w r3, r7, #16
8004366: 4619 mov r1, r3
8004368: 480b ldr r0, [pc, #44] @ (8004398 <HAL_UART_MspInit+0x94>)
800436a: f001 f9eb bl 8005744 <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
800436e: f44f 6380 mov.w r3, #1024 @ 0x400
8004372: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8004374: 2300 movs r3, #0
8004376: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8004378: 2300 movs r3, #0
800437a: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
800437c: f107 0310 add.w r3, r7, #16
8004380: 4619 mov r1, r3
8004382: 4805 ldr r0, [pc, #20] @ (8004398 <HAL_UART_MspInit+0x94>)
8004384: f001 f9de bl 8005744 <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8004388: bf00 nop
800438a: 3720 adds r7, #32
800438c: 46bd mov sp, r7
800438e: bd80 pop {r7, pc}
8004390: 40013800 .word 0x40013800
8004394: 40021000 .word 0x40021000
8004398: 40010800 .word 0x40010800
0800439c <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
800439c: b480 push {r7}
800439e: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
80043a0: bf00 nop
80043a2: e7fd b.n 80043a0 <NMI_Handler+0x4>
080043a4 <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
80043a4: b480 push {r7}
80043a6: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
80043a8: bf00 nop
80043aa: e7fd b.n 80043a8 <HardFault_Handler+0x4>
080043ac <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
80043ac: b480 push {r7}
80043ae: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
80043b0: bf00 nop
80043b2: e7fd b.n 80043b0 <MemManage_Handler+0x4>
080043b4 <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
80043b4: b480 push {r7}
80043b6: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
80043b8: bf00 nop
80043ba: e7fd b.n 80043b8 <BusFault_Handler+0x4>
080043bc <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
80043bc: b480 push {r7}
80043be: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
80043c0: bf00 nop
80043c2: e7fd b.n 80043c0 <UsageFault_Handler+0x4>
080043c4 <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
80043c4: b480 push {r7}
80043c6: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
80043c8: bf00 nop
80043ca: 46bd mov sp, r7
80043cc: bc80 pop {r7}
80043ce: 4770 bx lr
080043d0 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
80043d0: b480 push {r7}
80043d2: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
80043d4: bf00 nop
80043d6: 46bd mov sp, r7
80043d8: bc80 pop {r7}
80043da: 4770 bx lr
080043dc <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
80043dc: b480 push {r7}
80043de: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
80043e0: bf00 nop
80043e2: 46bd mov sp, r7
80043e4: bc80 pop {r7}
80043e6: 4770 bx lr
080043e8 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
80043e8: b580 push {r7, lr}
80043ea: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
80043ec: f000 f8c0 bl 8004570 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
80043f0: f000 fdb3 bl 8004f5a <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
80043f4: bf00 nop
80043f6: bd80 pop {r7, pc}
080043f8 <DMA1_Channel1_IRQHandler>:
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
80043f8: b580 push {r7, lr}
80043fa: af00 add r7, sp, #0
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
80043fc: 4802 ldr r0, [pc, #8] @ (8004408 <DMA1_Channel1_IRQHandler+0x10>)
80043fe: f000 fe6d bl 80050dc <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
8004402: bf00 nop
8004404: bd80 pop {r7, pc}
8004406: bf00 nop
8004408: 200002cc .word 0x200002cc
0800440c <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
800440c: b580 push {r7, lr}
800440e: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8004410: 4802 ldr r0, [pc, #8] @ (800441c <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8004412: f001 fc7f bl 8005d14 <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8004416: bf00 nop
8004418: bd80 pop {r7, pc}
800441a: bf00 nop
800441c: 20001254 .word 0x20001254
08004420 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8004420: b580 push {r7, lr}
8004422: b086 sub sp, #24
8004424: af00 add r7, sp, #0
8004426: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8004428: 4a14 ldr r2, [pc, #80] @ (800447c <_sbrk+0x5c>)
800442a: 4b15 ldr r3, [pc, #84] @ (8004480 <_sbrk+0x60>)
800442c: 1ad3 subs r3, r2, r3
800442e: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8004430: 697b ldr r3, [r7, #20]
8004432: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8004434: 4b13 ldr r3, [pc, #76] @ (8004484 <_sbrk+0x64>)
8004436: 681b ldr r3, [r3, #0]
8004438: 2b00 cmp r3, #0
800443a: d102 bne.n 8004442 <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
800443c: 4b11 ldr r3, [pc, #68] @ (8004484 <_sbrk+0x64>)
800443e: 4a12 ldr r2, [pc, #72] @ (8004488 <_sbrk+0x68>)
8004440: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8004442: 4b10 ldr r3, [pc, #64] @ (8004484 <_sbrk+0x64>)
8004444: 681a ldr r2, [r3, #0]
8004446: 687b ldr r3, [r7, #4]
8004448: 4413 add r3, r2
800444a: 693a ldr r2, [r7, #16]
800444c: 429a cmp r2, r3
800444e: d207 bcs.n 8004460 <_sbrk+0x40>
{
errno = ENOMEM;
8004450: f009 fa44 bl 800d8dc <__errno>
8004454: 4603 mov r3, r0
8004456: 220c movs r2, #12
8004458: 601a str r2, [r3, #0]
return (void *)-1;
800445a: f04f 33ff mov.w r3, #4294967295
800445e: e009 b.n 8004474 <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8004460: 4b08 ldr r3, [pc, #32] @ (8004484 <_sbrk+0x64>)
8004462: 681b ldr r3, [r3, #0]
8004464: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8004466: 4b07 ldr r3, [pc, #28] @ (8004484 <_sbrk+0x64>)
8004468: 681a ldr r2, [r3, #0]
800446a: 687b ldr r3, [r7, #4]
800446c: 4413 add r3, r2
800446e: 4a05 ldr r2, [pc, #20] @ (8004484 <_sbrk+0x64>)
8004470: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8004472: 68fb ldr r3, [r7, #12]
}
8004474: 4618 mov r0, r3
8004476: 3718 adds r7, #24
8004478: 46bd mov sp, r7
800447a: bd80 pop {r7, pc}
800447c: 20005000 .word 0x20005000
8004480: 00000400 .word 0x00000400
8004484: 20000460 .word 0x20000460
8004488: 20001898 .word 0x20001898
0800448c <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
800448c: b480 push {r7}
800448e: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8004490: bf00 nop
8004492: 46bd mov sp, r7
8004494: bc80 pop {r7}
8004496: 4770 bx lr
08004498 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8004498: f7ff fff8 bl 800448c <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
800449c: 480b ldr r0, [pc, #44] @ (80044cc <LoopFillZerobss+0xe>)
ldr r1, =_edata
800449e: 490c ldr r1, [pc, #48] @ (80044d0 <LoopFillZerobss+0x12>)
ldr r2, =_sidata
80044a0: 4a0c ldr r2, [pc, #48] @ (80044d4 <LoopFillZerobss+0x16>)
movs r3, #0
80044a2: 2300 movs r3, #0
b LoopCopyDataInit
80044a4: e002 b.n 80044ac <LoopCopyDataInit>
080044a6 <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
80044a6: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
80044a8: 50c4 str r4, [r0, r3]
adds r3, r3, #4
80044aa: 3304 adds r3, #4
080044ac <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
80044ac: 18c4 adds r4, r0, r3
cmp r4, r1
80044ae: 428c cmp r4, r1
bcc CopyDataInit
80044b0: d3f9 bcc.n 80044a6 <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
80044b2: 4a09 ldr r2, [pc, #36] @ (80044d8 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
80044b4: 4c09 ldr r4, [pc, #36] @ (80044dc <LoopFillZerobss+0x1e>)
movs r3, #0
80044b6: 2300 movs r3, #0
b LoopFillZerobss
80044b8: e001 b.n 80044be <LoopFillZerobss>
080044ba <FillZerobss>:
FillZerobss:
str r3, [r2]
80044ba: 6013 str r3, [r2, #0]
adds r2, r2, #4
80044bc: 3204 adds r2, #4
080044be <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
80044be: 42a2 cmp r2, r4
bcc FillZerobss
80044c0: d3fb bcc.n 80044ba <FillZerobss>
/* Call static constructors */
bl __libc_init_array
80044c2: f009 fa11 bl 800d8e8 <__libc_init_array>
/* Call the application's entry point.*/
bl main
80044c6: f7fe f8d5 bl 8002674 <main>
bx lr
80044ca: 4770 bx lr
ldr r0, =_sdata
80044cc: 20000000 .word 0x20000000
ldr r1, =_edata
80044d0: 200001d4 .word 0x200001d4
ldr r2, =_sidata
80044d4: 0800e6dc .word 0x0800e6dc
ldr r2, =_sbss
80044d8: 200001d8 .word 0x200001d8
ldr r4, =_ebss
80044dc: 20001894 .word 0x20001894
080044e0 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
80044e0: e7fe b.n 80044e0 <ADC1_2_IRQHandler>
...
080044e4 <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
80044e4: b580 push {r7, lr}
80044e6: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
80044e8: 4b08 ldr r3, [pc, #32] @ (800450c <HAL_Init+0x28>)
80044ea: 681b ldr r3, [r3, #0]
80044ec: 4a07 ldr r2, [pc, #28] @ (800450c <HAL_Init+0x28>)
80044ee: f043 0310 orr.w r3, r3, #16
80044f2: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
80044f4: 2003 movs r0, #3
80044f6: f000 fcef bl 8004ed8 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
80044fa: 200f movs r0, #15
80044fc: f000 f808 bl 8004510 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8004500: f7ff fdca bl 8004098 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8004504: 2300 movs r3, #0
}
8004506: 4618 mov r0, r3
8004508: bd80 pop {r7, pc}
800450a: bf00 nop
800450c: 40022000 .word 0x40022000
08004510 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8004510: b580 push {r7, lr}
8004512: b082 sub sp, #8
8004514: af00 add r7, sp, #0
8004516: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8004518: 4b12 ldr r3, [pc, #72] @ (8004564 <HAL_InitTick+0x54>)
800451a: 681a ldr r2, [r3, #0]
800451c: 4b12 ldr r3, [pc, #72] @ (8004568 <HAL_InitTick+0x58>)
800451e: 781b ldrb r3, [r3, #0]
8004520: 4619 mov r1, r3
8004522: f44f 737a mov.w r3, #1000 @ 0x3e8
8004526: fbb3 f3f1 udiv r3, r3, r1
800452a: fbb2 f3f3 udiv r3, r2, r3
800452e: 4618 mov r0, r3
8004530: f000 fd07 bl 8004f42 <HAL_SYSTICK_Config>
8004534: 4603 mov r3, r0
8004536: 2b00 cmp r3, #0
8004538: d001 beq.n 800453e <HAL_InitTick+0x2e>
{
return HAL_ERROR;
800453a: 2301 movs r3, #1
800453c: e00e b.n 800455c <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
800453e: 687b ldr r3, [r7, #4]
8004540: 2b0f cmp r3, #15
8004542: d80a bhi.n 800455a <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8004544: 2200 movs r2, #0
8004546: 6879 ldr r1, [r7, #4]
8004548: f04f 30ff mov.w r0, #4294967295
800454c: f000 fccf bl 8004eee <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8004550: 4a06 ldr r2, [pc, #24] @ (800456c <HAL_InitTick+0x5c>)
8004552: 687b ldr r3, [r7, #4]
8004554: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
8004556: 2300 movs r3, #0
8004558: e000 b.n 800455c <HAL_InitTick+0x4c>
return HAL_ERROR;
800455a: 2301 movs r3, #1
}
800455c: 4618 mov r0, r3
800455e: 3708 adds r7, #8
8004560: 46bd mov sp, r7
8004562: bd80 pop {r7, pc}
8004564: 20000008 .word 0x20000008
8004568: 20000010 .word 0x20000010
800456c: 2000000c .word 0x2000000c
08004570 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8004570: b480 push {r7}
8004572: af00 add r7, sp, #0
uwTick += uwTickFreq;
8004574: 4b05 ldr r3, [pc, #20] @ (800458c <HAL_IncTick+0x1c>)
8004576: 781b ldrb r3, [r3, #0]
8004578: 461a mov r2, r3
800457a: 4b05 ldr r3, [pc, #20] @ (8004590 <HAL_IncTick+0x20>)
800457c: 681b ldr r3, [r3, #0]
800457e: 4413 add r3, r2
8004580: 4a03 ldr r2, [pc, #12] @ (8004590 <HAL_IncTick+0x20>)
8004582: 6013 str r3, [r2, #0]
}
8004584: bf00 nop
8004586: 46bd mov sp, r7
8004588: bc80 pop {r7}
800458a: 4770 bx lr
800458c: 20000010 .word 0x20000010
8004590: 20000464 .word 0x20000464
08004594 <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
8004594: b480 push {r7}
8004596: af00 add r7, sp, #0
return uwTick;
8004598: 4b02 ldr r3, [pc, #8] @ (80045a4 <HAL_GetTick+0x10>)
800459a: 681b ldr r3, [r3, #0]
}
800459c: 4618 mov r0, r3
800459e: 46bd mov sp, r7
80045a0: bc80 pop {r7}
80045a2: 4770 bx lr
80045a4: 20000464 .word 0x20000464
080045a8 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
80045a8: b580 push {r7, lr}
80045aa: b086 sub sp, #24
80045ac: af00 add r7, sp, #0
80045ae: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
80045b0: 2300 movs r3, #0
80045b2: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
80045b4: 2300 movs r3, #0
80045b6: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
80045b8: 2300 movs r3, #0
80045ba: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
80045bc: 2300 movs r3, #0
80045be: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
80045c0: 687b ldr r3, [r7, #4]
80045c2: 2b00 cmp r3, #0
80045c4: d101 bne.n 80045ca <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
80045c6: 2301 movs r3, #1
80045c8: e0be b.n 8004748 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
80045ca: 687b ldr r3, [r7, #4]
80045cc: 689b ldr r3, [r3, #8]
80045ce: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
80045d0: 687b ldr r3, [r7, #4]
80045d2: 6a9b ldr r3, [r3, #40] @ 0x28
80045d4: 2b00 cmp r3, #0
80045d6: d109 bne.n 80045ec <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
80045d8: 687b ldr r3, [r7, #4]
80045da: 2200 movs r2, #0
80045dc: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
80045de: 687b ldr r3, [r7, #4]
80045e0: 2200 movs r2, #0
80045e2: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
80045e6: 6878 ldr r0, [r7, #4]
80045e8: f7ff fd88 bl 80040fc <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
80045ec: 6878 ldr r0, [r7, #4]
80045ee: f000 faff bl 8004bf0 <ADC_ConversionStop_Disable>
80045f2: 4603 mov r3, r0
80045f4: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
80045f6: 687b ldr r3, [r7, #4]
80045f8: 6a9b ldr r3, [r3, #40] @ 0x28
80045fa: f003 0310 and.w r3, r3, #16
80045fe: 2b00 cmp r3, #0
8004600: f040 8099 bne.w 8004736 <HAL_ADC_Init+0x18e>
8004604: 7dfb ldrb r3, [r7, #23]
8004606: 2b00 cmp r3, #0
8004608: f040 8095 bne.w 8004736 <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
800460c: 687b ldr r3, [r7, #4]
800460e: 6a9b ldr r3, [r3, #40] @ 0x28
8004610: f423 5388 bic.w r3, r3, #4352 @ 0x1100
8004614: f023 0302 bic.w r3, r3, #2
8004618: f043 0202 orr.w r2, r3, #2
800461c: 687b ldr r3, [r7, #4]
800461e: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
8004620: 687b ldr r3, [r7, #4]
8004622: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8004624: 687b ldr r3, [r7, #4]
8004626: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
8004628: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
800462a: 687b ldr r3, [r7, #4]
800462c: 7b1b ldrb r3, [r3, #12]
800462e: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
8004630: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
8004632: 68ba ldr r2, [r7, #8]
8004634: 4313 orrs r3, r2
8004636: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
8004638: 687b ldr r3, [r7, #4]
800463a: 689b ldr r3, [r3, #8]
800463c: f5b3 7f80 cmp.w r3, #256 @ 0x100
8004640: d003 beq.n 800464a <HAL_ADC_Init+0xa2>
8004642: 687b ldr r3, [r7, #4]
8004644: 689b ldr r3, [r3, #8]
8004646: 2b01 cmp r3, #1
8004648: d102 bne.n 8004650 <HAL_ADC_Init+0xa8>
800464a: f44f 7380 mov.w r3, #256 @ 0x100
800464e: e000 b.n 8004652 <HAL_ADC_Init+0xaa>
8004650: 2300 movs r3, #0
8004652: 693a ldr r2, [r7, #16]
8004654: 4313 orrs r3, r2
8004656: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8004658: 687b ldr r3, [r7, #4]
800465a: 7d1b ldrb r3, [r3, #20]
800465c: 2b01 cmp r3, #1
800465e: d119 bne.n 8004694 <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8004660: 687b ldr r3, [r7, #4]
8004662: 7b1b ldrb r3, [r3, #12]
8004664: 2b00 cmp r3, #0
8004666: d109 bne.n 800467c <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8004668: 687b ldr r3, [r7, #4]
800466a: 699b ldr r3, [r3, #24]
800466c: 3b01 subs r3, #1
800466e: 035a lsls r2, r3, #13
8004670: 693b ldr r3, [r7, #16]
8004672: 4313 orrs r3, r2
8004674: f443 6300 orr.w r3, r3, #2048 @ 0x800
8004678: 613b str r3, [r7, #16]
800467a: e00b b.n 8004694 <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
800467c: 687b ldr r3, [r7, #4]
800467e: 6a9b ldr r3, [r3, #40] @ 0x28
8004680: f043 0220 orr.w r2, r3, #32
8004684: 687b ldr r3, [r7, #4]
8004686: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8004688: 687b ldr r3, [r7, #4]
800468a: 6adb ldr r3, [r3, #44] @ 0x2c
800468c: f043 0201 orr.w r2, r3, #1
8004690: 687b ldr r3, [r7, #4]
8004692: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
8004694: 687b ldr r3, [r7, #4]
8004696: 681b ldr r3, [r3, #0]
8004698: 685b ldr r3, [r3, #4]
800469a: f423 4169 bic.w r1, r3, #59648 @ 0xe900
800469e: 687b ldr r3, [r7, #4]
80046a0: 681b ldr r3, [r3, #0]
80046a2: 693a ldr r2, [r7, #16]
80046a4: 430a orrs r2, r1
80046a6: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
80046a8: 687b ldr r3, [r7, #4]
80046aa: 681b ldr r3, [r3, #0]
80046ac: 689a ldr r2, [r3, #8]
80046ae: 4b28 ldr r3, [pc, #160] @ (8004750 <HAL_ADC_Init+0x1a8>)
80046b0: 4013 ands r3, r2
80046b2: 687a ldr r2, [r7, #4]
80046b4: 6812 ldr r2, [r2, #0]
80046b6: 68b9 ldr r1, [r7, #8]
80046b8: 430b orrs r3, r1
80046ba: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
80046bc: 687b ldr r3, [r7, #4]
80046be: 689b ldr r3, [r3, #8]
80046c0: f5b3 7f80 cmp.w r3, #256 @ 0x100
80046c4: d003 beq.n 80046ce <HAL_ADC_Init+0x126>
80046c6: 687b ldr r3, [r7, #4]
80046c8: 689b ldr r3, [r3, #8]
80046ca: 2b01 cmp r3, #1
80046cc: d104 bne.n 80046d8 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
80046ce: 687b ldr r3, [r7, #4]
80046d0: 691b ldr r3, [r3, #16]
80046d2: 3b01 subs r3, #1
80046d4: 051b lsls r3, r3, #20
80046d6: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
80046d8: 687b ldr r3, [r7, #4]
80046da: 681b ldr r3, [r3, #0]
80046dc: 6adb ldr r3, [r3, #44] @ 0x2c
80046de: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
80046e2: 687b ldr r3, [r7, #4]
80046e4: 681b ldr r3, [r3, #0]
80046e6: 68fa ldr r2, [r7, #12]
80046e8: 430a orrs r2, r1
80046ea: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80046ec: 687b ldr r3, [r7, #4]
80046ee: 681b ldr r3, [r3, #0]
80046f0: 689a ldr r2, [r3, #8]
80046f2: 4b18 ldr r3, [pc, #96] @ (8004754 <HAL_ADC_Init+0x1ac>)
80046f4: 4013 ands r3, r2
80046f6: 68ba ldr r2, [r7, #8]
80046f8: 429a cmp r2, r3
80046fa: d10b bne.n 8004714 <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
80046fc: 687b ldr r3, [r7, #4]
80046fe: 2200 movs r2, #0
8004700: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
8004702: 687b ldr r3, [r7, #4]
8004704: 6a9b ldr r3, [r3, #40] @ 0x28
8004706: f023 0303 bic.w r3, r3, #3
800470a: f043 0201 orr.w r2, r3, #1
800470e: 687b ldr r3, [r7, #4]
8004710: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8004712: e018 b.n 8004746 <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
8004714: 687b ldr r3, [r7, #4]
8004716: 6a9b ldr r3, [r3, #40] @ 0x28
8004718: f023 0312 bic.w r3, r3, #18
800471c: f043 0210 orr.w r2, r3, #16
8004720: 687b ldr r3, [r7, #4]
8004722: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8004724: 687b ldr r3, [r7, #4]
8004726: 6adb ldr r3, [r3, #44] @ 0x2c
8004728: f043 0201 orr.w r2, r3, #1
800472c: 687b ldr r3, [r7, #4]
800472e: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
8004730: 2301 movs r3, #1
8004732: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
8004734: e007 b.n 8004746 <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8004736: 687b ldr r3, [r7, #4]
8004738: 6a9b ldr r3, [r3, #40] @ 0x28
800473a: f043 0210 orr.w r2, r3, #16
800473e: 687b ldr r3, [r7, #4]
8004740: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8004742: 2301 movs r3, #1
8004744: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
8004746: 7dfb ldrb r3, [r7, #23]
}
8004748: 4618 mov r0, r3
800474a: 3718 adds r7, #24
800474c: 46bd mov sp, r7
800474e: bd80 pop {r7, pc}
8004750: ffe1f7fd .word 0xffe1f7fd
8004754: ff1f0efe .word 0xff1f0efe
08004758 <HAL_ADC_Start_DMA>:
* @param pData: The destination Buffer address.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @retval None
*/
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
{
8004758: b580 push {r7, lr}
800475a: b086 sub sp, #24
800475c: af00 add r7, sp, #0
800475e: 60f8 str r0, [r7, #12]
8004760: 60b9 str r1, [r7, #8]
8004762: 607a str r2, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8004764: 2300 movs r3, #0
8004766: 75fb strb r3, [r7, #23]
assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
/* Verification if multimode is disabled (for devices with several ADC) */
/* If multimode is enabled, dedicated function multimode conversion */
/* start DMA must be used. */
if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
8004768: 68fb ldr r3, [r7, #12]
800476a: 681b ldr r3, [r3, #0]
800476c: 4a64 ldr r2, [pc, #400] @ (8004900 <HAL_ADC_Start_DMA+0x1a8>)
800476e: 4293 cmp r3, r2
8004770: d004 beq.n 800477c <HAL_ADC_Start_DMA+0x24>
8004772: 68fb ldr r3, [r7, #12]
8004774: 681b ldr r3, [r3, #0]
8004776: 4a63 ldr r2, [pc, #396] @ (8004904 <HAL_ADC_Start_DMA+0x1ac>)
8004778: 4293 cmp r3, r2
800477a: d106 bne.n 800478a <HAL_ADC_Start_DMA+0x32>
800477c: 4b60 ldr r3, [pc, #384] @ (8004900 <HAL_ADC_Start_DMA+0x1a8>)
800477e: 685b ldr r3, [r3, #4]
8004780: f403 2370 and.w r3, r3, #983040 @ 0xf0000
8004784: 2b00 cmp r3, #0
8004786: f040 80b3 bne.w 80048f0 <HAL_ADC_Start_DMA+0x198>
{
/* Process locked */
__HAL_LOCK(hadc);
800478a: 68fb ldr r3, [r7, #12]
800478c: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8004790: 2b01 cmp r3, #1
8004792: d101 bne.n 8004798 <HAL_ADC_Start_DMA+0x40>
8004794: 2302 movs r3, #2
8004796: e0ae b.n 80048f6 <HAL_ADC_Start_DMA+0x19e>
8004798: 68fb ldr r3, [r7, #12]
800479a: 2201 movs r2, #1
800479c: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Enable the ADC peripheral */
tmp_hal_status = ADC_Enable(hadc);
80047a0: 68f8 ldr r0, [r7, #12]
80047a2: f000 f9cb bl 8004b3c <ADC_Enable>
80047a6: 4603 mov r3, r0
80047a8: 75fb strb r3, [r7, #23]
/* Start conversion if ADC is effectively enabled */
if (tmp_hal_status == HAL_OK)
80047aa: 7dfb ldrb r3, [r7, #23]
80047ac: 2b00 cmp r3, #0
80047ae: f040 809a bne.w 80048e6 <HAL_ADC_Start_DMA+0x18e>
{
/* Set ADC state */
/* - Clear state bitfield related to regular group conversion results */
/* - Set state bitfield related to regular operation */
ADC_STATE_CLR_SET(hadc->State,
80047b2: 68fb ldr r3, [r7, #12]
80047b4: 6a9b ldr r3, [r3, #40] @ 0x28
80047b6: f423 6370 bic.w r3, r3, #3840 @ 0xf00
80047ba: f023 0301 bic.w r3, r3, #1
80047be: f443 7280 orr.w r2, r3, #256 @ 0x100
80047c2: 68fb ldr r3, [r7, #12]
80047c4: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_REG_BUSY);
/* Set group injected state (from auto-injection) and multimode state */
/* for all cases of multimode: independent mode, multimode ADC master */
/* or multimode ADC slave (for devices with several ADCs): */
if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
80047c6: 68fb ldr r3, [r7, #12]
80047c8: 681b ldr r3, [r3, #0]
80047ca: 4a4e ldr r2, [pc, #312] @ (8004904 <HAL_ADC_Start_DMA+0x1ac>)
80047cc: 4293 cmp r3, r2
80047ce: d105 bne.n 80047dc <HAL_ADC_Start_DMA+0x84>
80047d0: 4b4b ldr r3, [pc, #300] @ (8004900 <HAL_ADC_Start_DMA+0x1a8>)
80047d2: 685b ldr r3, [r3, #4]
80047d4: f403 2370 and.w r3, r3, #983040 @ 0xf0000
80047d8: 2b00 cmp r3, #0
80047da: d115 bne.n 8004808 <HAL_ADC_Start_DMA+0xb0>
{
/* Set ADC state (ADC independent or master) */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
80047dc: 68fb ldr r3, [r7, #12]
80047de: 6a9b ldr r3, [r3, #40] @ 0x28
80047e0: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
80047e4: 68fb ldr r3, [r7, #12]
80047e6: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
80047e8: 68fb ldr r3, [r7, #12]
80047ea: 681b ldr r3, [r3, #0]
80047ec: 685b ldr r3, [r3, #4]
80047ee: f403 6380 and.w r3, r3, #1024 @ 0x400
80047f2: 2b00 cmp r3, #0
80047f4: d026 beq.n 8004844 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
80047f6: 68fb ldr r3, [r7, #12]
80047f8: 6a9b ldr r3, [r3, #40] @ 0x28
80047fa: f423 5340 bic.w r3, r3, #12288 @ 0x3000
80047fe: f443 5280 orr.w r2, r3, #4096 @ 0x1000
8004802: 68fb ldr r3, [r7, #12]
8004804: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
8004806: e01d b.n 8004844 <HAL_ADC_Start_DMA+0xec>
}
}
else
{
/* Set ADC state (ADC slave) */
SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8004808: 68fb ldr r3, [r7, #12]
800480a: 6a9b ldr r3, [r3, #40] @ 0x28
800480c: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
8004810: 68fb ldr r3, [r7, #12]
8004812: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
8004814: 68fb ldr r3, [r7, #12]
8004816: 681b ldr r3, [r3, #0]
8004818: 4a39 ldr r2, [pc, #228] @ (8004900 <HAL_ADC_Start_DMA+0x1a8>)
800481a: 4293 cmp r3, r2
800481c: d004 beq.n 8004828 <HAL_ADC_Start_DMA+0xd0>
800481e: 68fb ldr r3, [r7, #12]
8004820: 681b ldr r3, [r3, #0]
8004822: 4a38 ldr r2, [pc, #224] @ (8004904 <HAL_ADC_Start_DMA+0x1ac>)
8004824: 4293 cmp r3, r2
8004826: d10d bne.n 8004844 <HAL_ADC_Start_DMA+0xec>
8004828: 4b35 ldr r3, [pc, #212] @ (8004900 <HAL_ADC_Start_DMA+0x1a8>)
800482a: 685b ldr r3, [r3, #4]
800482c: f403 6380 and.w r3, r3, #1024 @ 0x400
8004830: 2b00 cmp r3, #0
8004832: d007 beq.n 8004844 <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
8004834: 68fb ldr r3, [r7, #12]
8004836: 6a9b ldr r3, [r3, #40] @ 0x28
8004838: f423 5340 bic.w r3, r3, #12288 @ 0x3000
800483c: f443 5280 orr.w r2, r3, #4096 @ 0x1000
8004840: 68fb ldr r3, [r7, #12]
8004842: 629a str r2, [r3, #40] @ 0x28
}
}
/* State machine update: Check if an injected conversion is ongoing */
if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8004844: 68fb ldr r3, [r7, #12]
8004846: 6a9b ldr r3, [r3, #40] @ 0x28
8004848: f403 5380 and.w r3, r3, #4096 @ 0x1000
800484c: 2b00 cmp r3, #0
800484e: d006 beq.n 800485e <HAL_ADC_Start_DMA+0x106>
{
/* Reset ADC error code fields related to conversions on group regular */
CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
8004850: 68fb ldr r3, [r7, #12]
8004852: 6adb ldr r3, [r3, #44] @ 0x2c
8004854: f023 0206 bic.w r2, r3, #6
8004858: 68fb ldr r3, [r7, #12]
800485a: 62da str r2, [r3, #44] @ 0x2c
800485c: e002 b.n 8004864 <HAL_ADC_Start_DMA+0x10c>
}
else
{
/* Reset ADC all error code fields */
ADC_CLEAR_ERRORCODE(hadc);
800485e: 68fb ldr r3, [r7, #12]
8004860: 2200 movs r2, #0
8004862: 62da str r2, [r3, #44] @ 0x2c
}
/* Process unlocked */
/* Unlock before starting ADC conversions: in case of potential */
/* interruption, to let the process to ADC IRQ Handler. */
__HAL_UNLOCK(hadc);
8004864: 68fb ldr r3, [r7, #12]
8004866: 2200 movs r2, #0
8004868: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Set the DMA transfer complete callback */
hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
800486c: 68fb ldr r3, [r7, #12]
800486e: 6a1b ldr r3, [r3, #32]
8004870: 4a25 ldr r2, [pc, #148] @ (8004908 <HAL_ADC_Start_DMA+0x1b0>)
8004872: 629a str r2, [r3, #40] @ 0x28
/* Set the DMA half transfer complete callback */
hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
8004874: 68fb ldr r3, [r7, #12]
8004876: 6a1b ldr r3, [r3, #32]
8004878: 4a24 ldr r2, [pc, #144] @ (800490c <HAL_ADC_Start_DMA+0x1b4>)
800487a: 62da str r2, [r3, #44] @ 0x2c
/* Set the DMA error callback */
hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
800487c: 68fb ldr r3, [r7, #12]
800487e: 6a1b ldr r3, [r3, #32]
8004880: 4a23 ldr r2, [pc, #140] @ (8004910 <HAL_ADC_Start_DMA+0x1b8>)
8004882: 631a str r2, [r3, #48] @ 0x30
/* start (in case of SW start): */
/* Clear regular group conversion flag and overrun flag */
/* (To ensure of no unknown state from potential previous ADC */
/* operations) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
8004884: 68fb ldr r3, [r7, #12]
8004886: 681b ldr r3, [r3, #0]
8004888: f06f 0202 mvn.w r2, #2
800488c: 601a str r2, [r3, #0]
/* Enable ADC DMA mode */
SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
800488e: 68fb ldr r3, [r7, #12]
8004890: 681b ldr r3, [r3, #0]
8004892: 689a ldr r2, [r3, #8]
8004894: 68fb ldr r3, [r7, #12]
8004896: 681b ldr r3, [r3, #0]
8004898: f442 7280 orr.w r2, r2, #256 @ 0x100
800489c: 609a str r2, [r3, #8]
/* Start the DMA channel */
HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
800489e: 68fb ldr r3, [r7, #12]
80048a0: 6a18 ldr r0, [r3, #32]
80048a2: 68fb ldr r3, [r7, #12]
80048a4: 681b ldr r3, [r3, #0]
80048a6: 334c adds r3, #76 @ 0x4c
80048a8: 4619 mov r1, r3
80048aa: 68ba ldr r2, [r7, #8]
80048ac: 687b ldr r3, [r7, #4]
80048ae: f000 fbb5 bl 800501c <HAL_DMA_Start_IT>
/* Enable conversion of regular group. */
/* If software start has been selected, conversion starts immediately. */
/* If external trigger has been selected, conversion will start at next */
/* trigger event. */
if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
80048b2: 68fb ldr r3, [r7, #12]
80048b4: 681b ldr r3, [r3, #0]
80048b6: 689b ldr r3, [r3, #8]
80048b8: f403 2360 and.w r3, r3, #917504 @ 0xe0000
80048bc: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
80048c0: d108 bne.n 80048d4 <HAL_ADC_Start_DMA+0x17c>
{
/* Start ADC conversion on regular group with SW start */
SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
80048c2: 68fb ldr r3, [r7, #12]
80048c4: 681b ldr r3, [r3, #0]
80048c6: 689a ldr r2, [r3, #8]
80048c8: 68fb ldr r3, [r7, #12]
80048ca: 681b ldr r3, [r3, #0]
80048cc: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000
80048d0: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
80048d2: e00f b.n 80048f4 <HAL_ADC_Start_DMA+0x19c>
}
else
{
/* Start ADC conversion on regular group with external trigger */
SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
80048d4: 68fb ldr r3, [r7, #12]
80048d6: 681b ldr r3, [r3, #0]
80048d8: 689a ldr r2, [r3, #8]
80048da: 68fb ldr r3, [r7, #12]
80048dc: 681b ldr r3, [r3, #0]
80048de: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
80048e2: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
80048e4: e006 b.n 80048f4 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hadc);
80048e6: 68fb ldr r3, [r7, #12]
80048e8: 2200 movs r2, #0
80048ea: f883 2024 strb.w r2, [r3, #36] @ 0x24
if (tmp_hal_status == HAL_OK)
80048ee: e001 b.n 80048f4 <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
tmp_hal_status = HAL_ERROR;
80048f0: 2301 movs r3, #1
80048f2: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
80048f4: 7dfb ldrb r3, [r7, #23]
}
80048f6: 4618 mov r0, r3
80048f8: 3718 adds r7, #24
80048fa: 46bd mov sp, r7
80048fc: bd80 pop {r7, pc}
80048fe: bf00 nop
8004900: 40012400 .word 0x40012400
8004904: 40012800 .word 0x40012800
8004908: 08004c73 .word 0x08004c73
800490c: 08004cef .word 0x08004cef
8004910: 08004d0b .word 0x08004d0b
08004914 <HAL_ADC_ConvCpltCallback>:
* @brief Conversion complete callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
8004914: b480 push {r7}
8004916: b083 sub sp, #12
8004918: af00 add r7, sp, #0
800491a: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvCpltCallback must be implemented in the user file.
*/
}
800491c: bf00 nop
800491e: 370c adds r7, #12
8004920: 46bd mov sp, r7
8004922: bc80 pop {r7}
8004924: 4770 bx lr
08004926 <HAL_ADC_ConvHalfCpltCallback>:
* @brief Conversion DMA half-transfer callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
{
8004926: b480 push {r7}
8004928: b083 sub sp, #12
800492a: af00 add r7, sp, #0
800492c: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
*/
}
800492e: bf00 nop
8004930: 370c adds r7, #12
8004932: 46bd mov sp, r7
8004934: bc80 pop {r7}
8004936: 4770 bx lr
08004938 <HAL_ADC_ErrorCallback>:
* (ADC conversion with interruption or transfer by DMA)
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
8004938: b480 push {r7}
800493a: b083 sub sp, #12
800493c: af00 add r7, sp, #0
800493e: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ErrorCallback must be implemented in the user file.
*/
}
8004940: bf00 nop
8004942: 370c adds r7, #12
8004944: 46bd mov sp, r7
8004946: bc80 pop {r7}
8004948: 4770 bx lr
...
0800494c <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
800494c: b480 push {r7}
800494e: b085 sub sp, #20
8004950: af00 add r7, sp, #0
8004952: 6078 str r0, [r7, #4]
8004954: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8004956: 2300 movs r3, #0
8004958: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
800495a: 2300 movs r3, #0
800495c: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
800495e: 687b ldr r3, [r7, #4]
8004960: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8004964: 2b01 cmp r3, #1
8004966: d101 bne.n 800496c <HAL_ADC_ConfigChannel+0x20>
8004968: 2302 movs r3, #2
800496a: e0dc b.n 8004b26 <HAL_ADC_ConfigChannel+0x1da>
800496c: 687b ldr r3, [r7, #4]
800496e: 2201 movs r2, #1
8004970: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
8004974: 683b ldr r3, [r7, #0]
8004976: 685b ldr r3, [r3, #4]
8004978: 2b06 cmp r3, #6
800497a: d81c bhi.n 80049b6 <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
800497c: 687b ldr r3, [r7, #4]
800497e: 681b ldr r3, [r3, #0]
8004980: 6b59 ldr r1, [r3, #52] @ 0x34
8004982: 683b ldr r3, [r7, #0]
8004984: 685a ldr r2, [r3, #4]
8004986: 4613 mov r3, r2
8004988: 009b lsls r3, r3, #2
800498a: 4413 add r3, r2
800498c: 3b05 subs r3, #5
800498e: 221f movs r2, #31
8004990: fa02 f303 lsl.w r3, r2, r3
8004994: 43db mvns r3, r3
8004996: 4019 ands r1, r3
8004998: 683b ldr r3, [r7, #0]
800499a: 6818 ldr r0, [r3, #0]
800499c: 683b ldr r3, [r7, #0]
800499e: 685a ldr r2, [r3, #4]
80049a0: 4613 mov r3, r2
80049a2: 009b lsls r3, r3, #2
80049a4: 4413 add r3, r2
80049a6: 3b05 subs r3, #5
80049a8: fa00 f203 lsl.w r2, r0, r3
80049ac: 687b ldr r3, [r7, #4]
80049ae: 681b ldr r3, [r3, #0]
80049b0: 430a orrs r2, r1
80049b2: 635a str r2, [r3, #52] @ 0x34
80049b4: e03c b.n 8004a30 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
80049b6: 683b ldr r3, [r7, #0]
80049b8: 685b ldr r3, [r3, #4]
80049ba: 2b0c cmp r3, #12
80049bc: d81c bhi.n 80049f8 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
80049be: 687b ldr r3, [r7, #4]
80049c0: 681b ldr r3, [r3, #0]
80049c2: 6b19 ldr r1, [r3, #48] @ 0x30
80049c4: 683b ldr r3, [r7, #0]
80049c6: 685a ldr r2, [r3, #4]
80049c8: 4613 mov r3, r2
80049ca: 009b lsls r3, r3, #2
80049cc: 4413 add r3, r2
80049ce: 3b23 subs r3, #35 @ 0x23
80049d0: 221f movs r2, #31
80049d2: fa02 f303 lsl.w r3, r2, r3
80049d6: 43db mvns r3, r3
80049d8: 4019 ands r1, r3
80049da: 683b ldr r3, [r7, #0]
80049dc: 6818 ldr r0, [r3, #0]
80049de: 683b ldr r3, [r7, #0]
80049e0: 685a ldr r2, [r3, #4]
80049e2: 4613 mov r3, r2
80049e4: 009b lsls r3, r3, #2
80049e6: 4413 add r3, r2
80049e8: 3b23 subs r3, #35 @ 0x23
80049ea: fa00 f203 lsl.w r2, r0, r3
80049ee: 687b ldr r3, [r7, #4]
80049f0: 681b ldr r3, [r3, #0]
80049f2: 430a orrs r2, r1
80049f4: 631a str r2, [r3, #48] @ 0x30
80049f6: e01b b.n 8004a30 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
80049f8: 687b ldr r3, [r7, #4]
80049fa: 681b ldr r3, [r3, #0]
80049fc: 6ad9 ldr r1, [r3, #44] @ 0x2c
80049fe: 683b ldr r3, [r7, #0]
8004a00: 685a ldr r2, [r3, #4]
8004a02: 4613 mov r3, r2
8004a04: 009b lsls r3, r3, #2
8004a06: 4413 add r3, r2
8004a08: 3b41 subs r3, #65 @ 0x41
8004a0a: 221f movs r2, #31
8004a0c: fa02 f303 lsl.w r3, r2, r3
8004a10: 43db mvns r3, r3
8004a12: 4019 ands r1, r3
8004a14: 683b ldr r3, [r7, #0]
8004a16: 6818 ldr r0, [r3, #0]
8004a18: 683b ldr r3, [r7, #0]
8004a1a: 685a ldr r2, [r3, #4]
8004a1c: 4613 mov r3, r2
8004a1e: 009b lsls r3, r3, #2
8004a20: 4413 add r3, r2
8004a22: 3b41 subs r3, #65 @ 0x41
8004a24: fa00 f203 lsl.w r2, r0, r3
8004a28: 687b ldr r3, [r7, #4]
8004a2a: 681b ldr r3, [r3, #0]
8004a2c: 430a orrs r2, r1
8004a2e: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
8004a30: 683b ldr r3, [r7, #0]
8004a32: 681b ldr r3, [r3, #0]
8004a34: 2b09 cmp r3, #9
8004a36: d91c bls.n 8004a72 <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
8004a38: 687b ldr r3, [r7, #4]
8004a3a: 681b ldr r3, [r3, #0]
8004a3c: 68d9 ldr r1, [r3, #12]
8004a3e: 683b ldr r3, [r7, #0]
8004a40: 681a ldr r2, [r3, #0]
8004a42: 4613 mov r3, r2
8004a44: 005b lsls r3, r3, #1
8004a46: 4413 add r3, r2
8004a48: 3b1e subs r3, #30
8004a4a: 2207 movs r2, #7
8004a4c: fa02 f303 lsl.w r3, r2, r3
8004a50: 43db mvns r3, r3
8004a52: 4019 ands r1, r3
8004a54: 683b ldr r3, [r7, #0]
8004a56: 6898 ldr r0, [r3, #8]
8004a58: 683b ldr r3, [r7, #0]
8004a5a: 681a ldr r2, [r3, #0]
8004a5c: 4613 mov r3, r2
8004a5e: 005b lsls r3, r3, #1
8004a60: 4413 add r3, r2
8004a62: 3b1e subs r3, #30
8004a64: fa00 f203 lsl.w r2, r0, r3
8004a68: 687b ldr r3, [r7, #4]
8004a6a: 681b ldr r3, [r3, #0]
8004a6c: 430a orrs r2, r1
8004a6e: 60da str r2, [r3, #12]
8004a70: e019 b.n 8004aa6 <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
8004a72: 687b ldr r3, [r7, #4]
8004a74: 681b ldr r3, [r3, #0]
8004a76: 6919 ldr r1, [r3, #16]
8004a78: 683b ldr r3, [r7, #0]
8004a7a: 681a ldr r2, [r3, #0]
8004a7c: 4613 mov r3, r2
8004a7e: 005b lsls r3, r3, #1
8004a80: 4413 add r3, r2
8004a82: 2207 movs r2, #7
8004a84: fa02 f303 lsl.w r3, r2, r3
8004a88: 43db mvns r3, r3
8004a8a: 4019 ands r1, r3
8004a8c: 683b ldr r3, [r7, #0]
8004a8e: 6898 ldr r0, [r3, #8]
8004a90: 683b ldr r3, [r7, #0]
8004a92: 681a ldr r2, [r3, #0]
8004a94: 4613 mov r3, r2
8004a96: 005b lsls r3, r3, #1
8004a98: 4413 add r3, r2
8004a9a: fa00 f203 lsl.w r2, r0, r3
8004a9e: 687b ldr r3, [r7, #4]
8004aa0: 681b ldr r3, [r3, #0]
8004aa2: 430a orrs r2, r1
8004aa4: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8004aa6: 683b ldr r3, [r7, #0]
8004aa8: 681b ldr r3, [r3, #0]
8004aaa: 2b10 cmp r3, #16
8004aac: d003 beq.n 8004ab6 <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
8004aae: 683b ldr r3, [r7, #0]
8004ab0: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
8004ab2: 2b11 cmp r3, #17
8004ab4: d132 bne.n 8004b1c <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
8004ab6: 687b ldr r3, [r7, #4]
8004ab8: 681b ldr r3, [r3, #0]
8004aba: 4a1d ldr r2, [pc, #116] @ (8004b30 <HAL_ADC_ConfigChannel+0x1e4>)
8004abc: 4293 cmp r3, r2
8004abe: d125 bne.n 8004b0c <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
8004ac0: 687b ldr r3, [r7, #4]
8004ac2: 681b ldr r3, [r3, #0]
8004ac4: 689b ldr r3, [r3, #8]
8004ac6: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8004aca: 2b00 cmp r3, #0
8004acc: d126 bne.n 8004b1c <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
8004ace: 687b ldr r3, [r7, #4]
8004ad0: 681b ldr r3, [r3, #0]
8004ad2: 689a ldr r2, [r3, #8]
8004ad4: 687b ldr r3, [r7, #4]
8004ad6: 681b ldr r3, [r3, #0]
8004ad8: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8004adc: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
8004ade: 683b ldr r3, [r7, #0]
8004ae0: 681b ldr r3, [r3, #0]
8004ae2: 2b10 cmp r3, #16
8004ae4: d11a bne.n 8004b1c <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
8004ae6: 4b13 ldr r3, [pc, #76] @ (8004b34 <HAL_ADC_ConfigChannel+0x1e8>)
8004ae8: 681b ldr r3, [r3, #0]
8004aea: 4a13 ldr r2, [pc, #76] @ (8004b38 <HAL_ADC_ConfigChannel+0x1ec>)
8004aec: fba2 2303 umull r2, r3, r2, r3
8004af0: 0c9a lsrs r2, r3, #18
8004af2: 4613 mov r3, r2
8004af4: 009b lsls r3, r3, #2
8004af6: 4413 add r3, r2
8004af8: 005b lsls r3, r3, #1
8004afa: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8004afc: e002 b.n 8004b04 <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
8004afe: 68bb ldr r3, [r7, #8]
8004b00: 3b01 subs r3, #1
8004b02: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8004b04: 68bb ldr r3, [r7, #8]
8004b06: 2b00 cmp r3, #0
8004b08: d1f9 bne.n 8004afe <HAL_ADC_ConfigChannel+0x1b2>
8004b0a: e007 b.n 8004b1c <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8004b0c: 687b ldr r3, [r7, #4]
8004b0e: 6a9b ldr r3, [r3, #40] @ 0x28
8004b10: f043 0220 orr.w r2, r3, #32
8004b14: 687b ldr r3, [r7, #4]
8004b16: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
8004b18: 2301 movs r3, #1
8004b1a: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
8004b1c: 687b ldr r3, [r7, #4]
8004b1e: 2200 movs r2, #0
8004b20: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
8004b24: 7bfb ldrb r3, [r7, #15]
}
8004b26: 4618 mov r0, r3
8004b28: 3714 adds r7, #20
8004b2a: 46bd mov sp, r7
8004b2c: bc80 pop {r7}
8004b2e: 4770 bx lr
8004b30: 40012400 .word 0x40012400
8004b34: 20000008 .word 0x20000008
8004b38: 431bde83 .word 0x431bde83
08004b3c <ADC_Enable>:
* and voltage regulator must be enabled (done into HAL_ADC_Init()).
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
{
8004b3c: b580 push {r7, lr}
8004b3e: b084 sub sp, #16
8004b40: af00 add r7, sp, #0
8004b42: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8004b44: 2300 movs r3, #0
8004b46: 60fb str r3, [r7, #12]
__IO uint32_t wait_loop_index = 0U;
8004b48: 2300 movs r3, #0
8004b4a: 60bb str r3, [r7, #8]
/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
/* enabling phase not yet completed: flag ADC ready not yet set). */
/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
/* causes: ADC clock not running, ...). */
if (ADC_IS_ENABLE(hadc) == RESET)
8004b4c: 687b ldr r3, [r7, #4]
8004b4e: 681b ldr r3, [r3, #0]
8004b50: 689b ldr r3, [r3, #8]
8004b52: f003 0301 and.w r3, r3, #1
8004b56: 2b01 cmp r3, #1
8004b58: d040 beq.n 8004bdc <ADC_Enable+0xa0>
{
/* Enable the Peripheral */
__HAL_ADC_ENABLE(hadc);
8004b5a: 687b ldr r3, [r7, #4]
8004b5c: 681b ldr r3, [r3, #0]
8004b5e: 689a ldr r2, [r3, #8]
8004b60: 687b ldr r3, [r7, #4]
8004b62: 681b ldr r3, [r3, #0]
8004b64: f042 0201 orr.w r2, r2, #1
8004b68: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
8004b6a: 4b1f ldr r3, [pc, #124] @ (8004be8 <ADC_Enable+0xac>)
8004b6c: 681b ldr r3, [r3, #0]
8004b6e: 4a1f ldr r2, [pc, #124] @ (8004bec <ADC_Enable+0xb0>)
8004b70: fba2 2303 umull r2, r3, r2, r3
8004b74: 0c9b lsrs r3, r3, #18
8004b76: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8004b78: e002 b.n 8004b80 <ADC_Enable+0x44>
{
wait_loop_index--;
8004b7a: 68bb ldr r3, [r7, #8]
8004b7c: 3b01 subs r3, #1
8004b7e: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8004b80: 68bb ldr r3, [r7, #8]
8004b82: 2b00 cmp r3, #0
8004b84: d1f9 bne.n 8004b7a <ADC_Enable+0x3e>
}
/* Get tick count */
tickstart = HAL_GetTick();
8004b86: f7ff fd05 bl 8004594 <HAL_GetTick>
8004b8a: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively enabled */
while(ADC_IS_ENABLE(hadc) == RESET)
8004b8c: e01f b.n 8004bce <ADC_Enable+0x92>
{
if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
8004b8e: f7ff fd01 bl 8004594 <HAL_GetTick>
8004b92: 4602 mov r2, r0
8004b94: 68fb ldr r3, [r7, #12]
8004b96: 1ad3 subs r3, r2, r3
8004b98: 2b02 cmp r3, #2
8004b9a: d918 bls.n 8004bce <ADC_Enable+0x92>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) == RESET)
8004b9c: 687b ldr r3, [r7, #4]
8004b9e: 681b ldr r3, [r3, #0]
8004ba0: 689b ldr r3, [r3, #8]
8004ba2: f003 0301 and.w r3, r3, #1
8004ba6: 2b01 cmp r3, #1
8004ba8: d011 beq.n 8004bce <ADC_Enable+0x92>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8004baa: 687b ldr r3, [r7, #4]
8004bac: 6a9b ldr r3, [r3, #40] @ 0x28
8004bae: f043 0210 orr.w r2, r3, #16
8004bb2: 687b ldr r3, [r7, #4]
8004bb4: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8004bb6: 687b ldr r3, [r7, #4]
8004bb8: 6adb ldr r3, [r3, #44] @ 0x2c
8004bba: f043 0201 orr.w r2, r3, #1
8004bbe: 687b ldr r3, [r7, #4]
8004bc0: 62da str r2, [r3, #44] @ 0x2c
/* Process unlocked */
__HAL_UNLOCK(hadc);
8004bc2: 687b ldr r3, [r7, #4]
8004bc4: 2200 movs r2, #0
8004bc6: f883 2024 strb.w r2, [r3, #36] @ 0x24
return HAL_ERROR;
8004bca: 2301 movs r3, #1
8004bcc: e007 b.n 8004bde <ADC_Enable+0xa2>
while(ADC_IS_ENABLE(hadc) == RESET)
8004bce: 687b ldr r3, [r7, #4]
8004bd0: 681b ldr r3, [r3, #0]
8004bd2: 689b ldr r3, [r3, #8]
8004bd4: f003 0301 and.w r3, r3, #1
8004bd8: 2b01 cmp r3, #1
8004bda: d1d8 bne.n 8004b8e <ADC_Enable+0x52>
}
}
}
/* Return HAL status */
return HAL_OK;
8004bdc: 2300 movs r3, #0
}
8004bde: 4618 mov r0, r3
8004be0: 3710 adds r7, #16
8004be2: 46bd mov sp, r7
8004be4: bd80 pop {r7, pc}
8004be6: bf00 nop
8004be8: 20000008 .word 0x20000008
8004bec: 431bde83 .word 0x431bde83
08004bf0 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
8004bf0: b580 push {r7, lr}
8004bf2: b084 sub sp, #16
8004bf4: af00 add r7, sp, #0
8004bf6: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
8004bf8: 2300 movs r3, #0
8004bfa: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
8004bfc: 687b ldr r3, [r7, #4]
8004bfe: 681b ldr r3, [r3, #0]
8004c00: 689b ldr r3, [r3, #8]
8004c02: f003 0301 and.w r3, r3, #1
8004c06: 2b01 cmp r3, #1
8004c08: d12e bne.n 8004c68 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
8004c0a: 687b ldr r3, [r7, #4]
8004c0c: 681b ldr r3, [r3, #0]
8004c0e: 689a ldr r2, [r3, #8]
8004c10: 687b ldr r3, [r7, #4]
8004c12: 681b ldr r3, [r3, #0]
8004c14: f022 0201 bic.w r2, r2, #1
8004c18: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
8004c1a: f7ff fcbb bl 8004594 <HAL_GetTick>
8004c1e: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
8004c20: e01b b.n 8004c5a <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
8004c22: f7ff fcb7 bl 8004594 <HAL_GetTick>
8004c26: 4602 mov r2, r0
8004c28: 68fb ldr r3, [r7, #12]
8004c2a: 1ad3 subs r3, r2, r3
8004c2c: 2b02 cmp r3, #2
8004c2e: d914 bls.n 8004c5a <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
8004c30: 687b ldr r3, [r7, #4]
8004c32: 681b ldr r3, [r3, #0]
8004c34: 689b ldr r3, [r3, #8]
8004c36: f003 0301 and.w r3, r3, #1
8004c3a: 2b01 cmp r3, #1
8004c3c: d10d bne.n 8004c5a <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8004c3e: 687b ldr r3, [r7, #4]
8004c40: 6a9b ldr r3, [r3, #40] @ 0x28
8004c42: f043 0210 orr.w r2, r3, #16
8004c46: 687b ldr r3, [r7, #4]
8004c48: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8004c4a: 687b ldr r3, [r7, #4]
8004c4c: 6adb ldr r3, [r3, #44] @ 0x2c
8004c4e: f043 0201 orr.w r2, r3, #1
8004c52: 687b ldr r3, [r7, #4]
8004c54: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
8004c56: 2301 movs r3, #1
8004c58: e007 b.n 8004c6a <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
8004c5a: 687b ldr r3, [r7, #4]
8004c5c: 681b ldr r3, [r3, #0]
8004c5e: 689b ldr r3, [r3, #8]
8004c60: f003 0301 and.w r3, r3, #1
8004c64: 2b01 cmp r3, #1
8004c66: d0dc beq.n 8004c22 <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
8004c68: 2300 movs r3, #0
}
8004c6a: 4618 mov r0, r3
8004c6c: 3710 adds r7, #16
8004c6e: 46bd mov sp, r7
8004c70: bd80 pop {r7, pc}
08004c72 <ADC_DMAConvCplt>:
* @brief DMA transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
8004c72: b580 push {r7, lr}
8004c74: b084 sub sp, #16
8004c76: af00 add r7, sp, #0
8004c78: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8004c7a: 687b ldr r3, [r7, #4]
8004c7c: 6a5b ldr r3, [r3, #36] @ 0x24
8004c7e: 60fb str r3, [r7, #12]
/* Update state machine on conversion status if not in error state */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
8004c80: 68fb ldr r3, [r7, #12]
8004c82: 6a9b ldr r3, [r3, #40] @ 0x28
8004c84: f003 0350 and.w r3, r3, #80 @ 0x50
8004c88: 2b00 cmp r3, #0
8004c8a: d127 bne.n 8004cdc <ADC_DMAConvCplt+0x6a>
{
/* Update ADC state machine */
SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
8004c8c: 68fb ldr r3, [r7, #12]
8004c8e: 6a9b ldr r3, [r3, #40] @ 0x28
8004c90: f443 7200 orr.w r2, r3, #512 @ 0x200
8004c94: 68fb ldr r3, [r7, #12]
8004c96: 629a str r2, [r3, #40] @ 0x28
/* Determine whether any further conversion upcoming on group regular */
/* by external trigger, continuous mode or scan sequence on going. */
/* Note: On STM32F1 devices, in case of sequencer enabled */
/* (several ranks selected), end of conversion flag is raised */
/* at the end of the sequence. */
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
8004c98: 68fb ldr r3, [r7, #12]
8004c9a: 681b ldr r3, [r3, #0]
8004c9c: 689b ldr r3, [r3, #8]
8004c9e: f403 2360 and.w r3, r3, #917504 @ 0xe0000
8004ca2: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
8004ca6: d115 bne.n 8004cd4 <ADC_DMAConvCplt+0x62>
(hadc->Init.ContinuousConvMode == DISABLE) )
8004ca8: 68fb ldr r3, [r7, #12]
8004caa: 7b1b ldrb r3, [r3, #12]
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
8004cac: 2b00 cmp r3, #0
8004cae: d111 bne.n 8004cd4 <ADC_DMAConvCplt+0x62>
{
/* Set ADC state */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
8004cb0: 68fb ldr r3, [r7, #12]
8004cb2: 6a9b ldr r3, [r3, #40] @ 0x28
8004cb4: f423 7280 bic.w r2, r3, #256 @ 0x100
8004cb8: 68fb ldr r3, [r7, #12]
8004cba: 629a str r2, [r3, #40] @ 0x28
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8004cbc: 68fb ldr r3, [r7, #12]
8004cbe: 6a9b ldr r3, [r3, #40] @ 0x28
8004cc0: f403 5380 and.w r3, r3, #4096 @ 0x1000
8004cc4: 2b00 cmp r3, #0
8004cc6: d105 bne.n 8004cd4 <ADC_DMAConvCplt+0x62>
{
SET_BIT(hadc->State, HAL_ADC_STATE_READY);
8004cc8: 68fb ldr r3, [r7, #12]
8004cca: 6a9b ldr r3, [r3, #40] @ 0x28
8004ccc: f043 0201 orr.w r2, r3, #1
8004cd0: 68fb ldr r3, [r7, #12]
8004cd2: 629a str r2, [r3, #40] @ 0x28
/* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvCpltCallback(hadc);
#else
HAL_ADC_ConvCpltCallback(hadc);
8004cd4: 68f8 ldr r0, [r7, #12]
8004cd6: f7ff fe1d bl 8004914 <HAL_ADC_ConvCpltCallback>
else
{
/* Call DMA error callback */
hadc->DMA_Handle->XferErrorCallback(hdma);
}
}
8004cda: e004 b.n 8004ce6 <ADC_DMAConvCplt+0x74>
hadc->DMA_Handle->XferErrorCallback(hdma);
8004cdc: 68fb ldr r3, [r7, #12]
8004cde: 6a1b ldr r3, [r3, #32]
8004ce0: 6b1b ldr r3, [r3, #48] @ 0x30
8004ce2: 6878 ldr r0, [r7, #4]
8004ce4: 4798 blx r3
}
8004ce6: bf00 nop
8004ce8: 3710 adds r7, #16
8004cea: 46bd mov sp, r7
8004cec: bd80 pop {r7, pc}
08004cee <ADC_DMAHalfConvCplt>:
* @brief DMA half transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
{
8004cee: b580 push {r7, lr}
8004cf0: b084 sub sp, #16
8004cf2: af00 add r7, sp, #0
8004cf4: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8004cf6: 687b ldr r3, [r7, #4]
8004cf8: 6a5b ldr r3, [r3, #36] @ 0x24
8004cfa: 60fb str r3, [r7, #12]
/* Half conversion callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvHalfCpltCallback(hadc);
#else
HAL_ADC_ConvHalfCpltCallback(hadc);
8004cfc: 68f8 ldr r0, [r7, #12]
8004cfe: f7ff fe12 bl 8004926 <HAL_ADC_ConvHalfCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
8004d02: bf00 nop
8004d04: 3710 adds r7, #16
8004d06: 46bd mov sp, r7
8004d08: bd80 pop {r7, pc}
08004d0a <ADC_DMAError>:
* @brief DMA error callback
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAError(DMA_HandleTypeDef *hdma)
{
8004d0a: b580 push {r7, lr}
8004d0c: b084 sub sp, #16
8004d0e: af00 add r7, sp, #0
8004d10: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8004d12: 687b ldr r3, [r7, #4]
8004d14: 6a5b ldr r3, [r3, #36] @ 0x24
8004d16: 60fb str r3, [r7, #12]
/* Set ADC state */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
8004d18: 68fb ldr r3, [r7, #12]
8004d1a: 6a9b ldr r3, [r3, #40] @ 0x28
8004d1c: f043 0240 orr.w r2, r3, #64 @ 0x40
8004d20: 68fb ldr r3, [r7, #12]
8004d22: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to DMA error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
8004d24: 68fb ldr r3, [r7, #12]
8004d26: 6adb ldr r3, [r3, #44] @ 0x2c
8004d28: f043 0204 orr.w r2, r3, #4
8004d2c: 68fb ldr r3, [r7, #12]
8004d2e: 62da str r2, [r3, #44] @ 0x2c
/* Error callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ErrorCallback(hadc);
#else
HAL_ADC_ErrorCallback(hadc);
8004d30: 68f8 ldr r0, [r7, #12]
8004d32: f7ff fe01 bl 8004938 <HAL_ADC_ErrorCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
8004d36: bf00 nop
8004d38: 3710 adds r7, #16
8004d3a: 46bd mov sp, r7
8004d3c: bd80 pop {r7, pc}
...
08004d40 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8004d40: b480 push {r7}
8004d42: b085 sub sp, #20
8004d44: af00 add r7, sp, #0
8004d46: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8004d48: 687b ldr r3, [r7, #4]
8004d4a: f003 0307 and.w r3, r3, #7
8004d4e: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8004d50: 4b0c ldr r3, [pc, #48] @ (8004d84 <__NVIC_SetPriorityGrouping+0x44>)
8004d52: 68db ldr r3, [r3, #12]
8004d54: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
8004d56: 68ba ldr r2, [r7, #8]
8004d58: f64f 03ff movw r3, #63743 @ 0xf8ff
8004d5c: 4013 ands r3, r2
8004d5e: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8004d60: 68fb ldr r3, [r7, #12]
8004d62: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
8004d64: 68bb ldr r3, [r7, #8]
8004d66: 4313 orrs r3, r2
reg_value = (reg_value |
8004d68: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8004d6c: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8004d70: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
8004d72: 4a04 ldr r2, [pc, #16] @ (8004d84 <__NVIC_SetPriorityGrouping+0x44>)
8004d74: 68bb ldr r3, [r7, #8]
8004d76: 60d3 str r3, [r2, #12]
}
8004d78: bf00 nop
8004d7a: 3714 adds r7, #20
8004d7c: 46bd mov sp, r7
8004d7e: bc80 pop {r7}
8004d80: 4770 bx lr
8004d82: bf00 nop
8004d84: e000ed00 .word 0xe000ed00
08004d88 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8004d88: b480 push {r7}
8004d8a: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8004d8c: 4b04 ldr r3, [pc, #16] @ (8004da0 <__NVIC_GetPriorityGrouping+0x18>)
8004d8e: 68db ldr r3, [r3, #12]
8004d90: 0a1b lsrs r3, r3, #8
8004d92: f003 0307 and.w r3, r3, #7
}
8004d96: 4618 mov r0, r3
8004d98: 46bd mov sp, r7
8004d9a: bc80 pop {r7}
8004d9c: 4770 bx lr
8004d9e: bf00 nop
8004da0: e000ed00 .word 0xe000ed00
08004da4 <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
8004da4: b480 push {r7}
8004da6: b083 sub sp, #12
8004da8: af00 add r7, sp, #0
8004daa: 4603 mov r3, r0
8004dac: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8004dae: f997 3007 ldrsb.w r3, [r7, #7]
8004db2: 2b00 cmp r3, #0
8004db4: db0b blt.n 8004dce <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
8004db6: 79fb ldrb r3, [r7, #7]
8004db8: f003 021f and.w r2, r3, #31
8004dbc: 4906 ldr r1, [pc, #24] @ (8004dd8 <__NVIC_EnableIRQ+0x34>)
8004dbe: f997 3007 ldrsb.w r3, [r7, #7]
8004dc2: 095b lsrs r3, r3, #5
8004dc4: 2001 movs r0, #1
8004dc6: fa00 f202 lsl.w r2, r0, r2
8004dca: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8004dce: bf00 nop
8004dd0: 370c adds r7, #12
8004dd2: 46bd mov sp, r7
8004dd4: bc80 pop {r7}
8004dd6: 4770 bx lr
8004dd8: e000e100 .word 0xe000e100
08004ddc <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8004ddc: b480 push {r7}
8004dde: b083 sub sp, #12
8004de0: af00 add r7, sp, #0
8004de2: 4603 mov r3, r0
8004de4: 6039 str r1, [r7, #0]
8004de6: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8004de8: f997 3007 ldrsb.w r3, [r7, #7]
8004dec: 2b00 cmp r3, #0
8004dee: db0a blt.n 8004e06 <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8004df0: 683b ldr r3, [r7, #0]
8004df2: b2da uxtb r2, r3
8004df4: 490c ldr r1, [pc, #48] @ (8004e28 <__NVIC_SetPriority+0x4c>)
8004df6: f997 3007 ldrsb.w r3, [r7, #7]
8004dfa: 0112 lsls r2, r2, #4
8004dfc: b2d2 uxtb r2, r2
8004dfe: 440b add r3, r1
8004e00: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
8004e04: e00a b.n 8004e1c <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
8004e06: 683b ldr r3, [r7, #0]
8004e08: b2da uxtb r2, r3
8004e0a: 4908 ldr r1, [pc, #32] @ (8004e2c <__NVIC_SetPriority+0x50>)
8004e0c: 79fb ldrb r3, [r7, #7]
8004e0e: f003 030f and.w r3, r3, #15
8004e12: 3b04 subs r3, #4
8004e14: 0112 lsls r2, r2, #4
8004e16: b2d2 uxtb r2, r2
8004e18: 440b add r3, r1
8004e1a: 761a strb r2, [r3, #24]
}
8004e1c: bf00 nop
8004e1e: 370c adds r7, #12
8004e20: 46bd mov sp, r7
8004e22: bc80 pop {r7}
8004e24: 4770 bx lr
8004e26: bf00 nop
8004e28: e000e100 .word 0xe000e100
8004e2c: e000ed00 .word 0xe000ed00
08004e30 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
8004e30: b480 push {r7}
8004e32: b089 sub sp, #36 @ 0x24
8004e34: af00 add r7, sp, #0
8004e36: 60f8 str r0, [r7, #12]
8004e38: 60b9 str r1, [r7, #8]
8004e3a: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8004e3c: 68fb ldr r3, [r7, #12]
8004e3e: f003 0307 and.w r3, r3, #7
8004e42: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
8004e44: 69fb ldr r3, [r7, #28]
8004e46: f1c3 0307 rsb r3, r3, #7
8004e4a: 2b04 cmp r3, #4
8004e4c: bf28 it cs
8004e4e: 2304 movcs r3, #4
8004e50: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
8004e52: 69fb ldr r3, [r7, #28]
8004e54: 3304 adds r3, #4
8004e56: 2b06 cmp r3, #6
8004e58: d902 bls.n 8004e60 <NVIC_EncodePriority+0x30>
8004e5a: 69fb ldr r3, [r7, #28]
8004e5c: 3b03 subs r3, #3
8004e5e: e000 b.n 8004e62 <NVIC_EncodePriority+0x32>
8004e60: 2300 movs r3, #0
8004e62: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8004e64: f04f 32ff mov.w r2, #4294967295
8004e68: 69bb ldr r3, [r7, #24]
8004e6a: fa02 f303 lsl.w r3, r2, r3
8004e6e: 43da mvns r2, r3
8004e70: 68bb ldr r3, [r7, #8]
8004e72: 401a ands r2, r3
8004e74: 697b ldr r3, [r7, #20]
8004e76: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8004e78: f04f 31ff mov.w r1, #4294967295
8004e7c: 697b ldr r3, [r7, #20]
8004e7e: fa01 f303 lsl.w r3, r1, r3
8004e82: 43d9 mvns r1, r3
8004e84: 687b ldr r3, [r7, #4]
8004e86: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8004e88: 4313 orrs r3, r2
);
}
8004e8a: 4618 mov r0, r3
8004e8c: 3724 adds r7, #36 @ 0x24
8004e8e: 46bd mov sp, r7
8004e90: bc80 pop {r7}
8004e92: 4770 bx lr
08004e94 <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
8004e94: b580 push {r7, lr}
8004e96: b082 sub sp, #8
8004e98: af00 add r7, sp, #0
8004e9a: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8004e9c: 687b ldr r3, [r7, #4]
8004e9e: 3b01 subs r3, #1
8004ea0: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
8004ea4: d301 bcc.n 8004eaa <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
8004ea6: 2301 movs r3, #1
8004ea8: e00f b.n 8004eca <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8004eaa: 4a0a ldr r2, [pc, #40] @ (8004ed4 <SysTick_Config+0x40>)
8004eac: 687b ldr r3, [r7, #4]
8004eae: 3b01 subs r3, #1
8004eb0: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
8004eb2: 210f movs r1, #15
8004eb4: f04f 30ff mov.w r0, #4294967295
8004eb8: f7ff ff90 bl 8004ddc <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8004ebc: 4b05 ldr r3, [pc, #20] @ (8004ed4 <SysTick_Config+0x40>)
8004ebe: 2200 movs r2, #0
8004ec0: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
8004ec2: 4b04 ldr r3, [pc, #16] @ (8004ed4 <SysTick_Config+0x40>)
8004ec4: 2207 movs r2, #7
8004ec6: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8004ec8: 2300 movs r3, #0
}
8004eca: 4618 mov r0, r3
8004ecc: 3708 adds r7, #8
8004ece: 46bd mov sp, r7
8004ed0: bd80 pop {r7, pc}
8004ed2: bf00 nop
8004ed4: e000e010 .word 0xe000e010
08004ed8 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8004ed8: b580 push {r7, lr}
8004eda: b082 sub sp, #8
8004edc: af00 add r7, sp, #0
8004ede: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8004ee0: 6878 ldr r0, [r7, #4]
8004ee2: f7ff ff2d bl 8004d40 <__NVIC_SetPriorityGrouping>
}
8004ee6: bf00 nop
8004ee8: 3708 adds r7, #8
8004eea: 46bd mov sp, r7
8004eec: bd80 pop {r7, pc}
08004eee <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
8004eee: b580 push {r7, lr}
8004ef0: b086 sub sp, #24
8004ef2: af00 add r7, sp, #0
8004ef4: 4603 mov r3, r0
8004ef6: 60b9 str r1, [r7, #8]
8004ef8: 607a str r2, [r7, #4]
8004efa: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
8004efc: 2300 movs r3, #0
8004efe: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
8004f00: f7ff ff42 bl 8004d88 <__NVIC_GetPriorityGrouping>
8004f04: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
8004f06: 687a ldr r2, [r7, #4]
8004f08: 68b9 ldr r1, [r7, #8]
8004f0a: 6978 ldr r0, [r7, #20]
8004f0c: f7ff ff90 bl 8004e30 <NVIC_EncodePriority>
8004f10: 4602 mov r2, r0
8004f12: f997 300f ldrsb.w r3, [r7, #15]
8004f16: 4611 mov r1, r2
8004f18: 4618 mov r0, r3
8004f1a: f7ff ff5f bl 8004ddc <__NVIC_SetPriority>
}
8004f1e: bf00 nop
8004f20: 3718 adds r7, #24
8004f22: 46bd mov sp, r7
8004f24: bd80 pop {r7, pc}
08004f26 <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
8004f26: b580 push {r7, lr}
8004f28: b082 sub sp, #8
8004f2a: af00 add r7, sp, #0
8004f2c: 4603 mov r3, r0
8004f2e: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
8004f30: f997 3007 ldrsb.w r3, [r7, #7]
8004f34: 4618 mov r0, r3
8004f36: f7ff ff35 bl 8004da4 <__NVIC_EnableIRQ>
}
8004f3a: bf00 nop
8004f3c: 3708 adds r7, #8
8004f3e: 46bd mov sp, r7
8004f40: bd80 pop {r7, pc}
08004f42 <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
8004f42: b580 push {r7, lr}
8004f44: b082 sub sp, #8
8004f46: af00 add r7, sp, #0
8004f48: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8004f4a: 6878 ldr r0, [r7, #4]
8004f4c: f7ff ffa2 bl 8004e94 <SysTick_Config>
8004f50: 4603 mov r3, r0
}
8004f52: 4618 mov r0, r3
8004f54: 3708 adds r7, #8
8004f56: 46bd mov sp, r7
8004f58: bd80 pop {r7, pc}
08004f5a <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8004f5a: b580 push {r7, lr}
8004f5c: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
8004f5e: f7fc fb3f bl 80015e0 <HAL_SYSTICK_Callback>
}
8004f62: bf00 nop
8004f64: bd80 pop {r7, pc}
...
08004f68 <HAL_DMA_Init>:
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8004f68: b480 push {r7}
8004f6a: b085 sub sp, #20
8004f6c: af00 add r7, sp, #0
8004f6e: 6078 str r0, [r7, #4]
uint32_t tmp = 0U;
8004f70: 2300 movs r3, #0
8004f72: 60fb str r3, [r7, #12]
/* Check the DMA handle allocation */
if(hdma == NULL)
8004f74: 687b ldr r3, [r7, #4]
8004f76: 2b00 cmp r3, #0
8004f78: d101 bne.n 8004f7e <HAL_DMA_Init+0x16>
{
return HAL_ERROR;
8004f7a: 2301 movs r3, #1
8004f7c: e043 b.n 8005006 <HAL_DMA_Init+0x9e>
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
hdma->DmaBaseAddress = DMA2;
}
#else
/* DMA1 */
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
8004f7e: 687b ldr r3, [r7, #4]
8004f80: 681b ldr r3, [r3, #0]
8004f82: 461a mov r2, r3
8004f84: 4b22 ldr r3, [pc, #136] @ (8005010 <HAL_DMA_Init+0xa8>)
8004f86: 4413 add r3, r2
8004f88: 4a22 ldr r2, [pc, #136] @ (8005014 <HAL_DMA_Init+0xac>)
8004f8a: fba2 2303 umull r2, r3, r2, r3
8004f8e: 091b lsrs r3, r3, #4
8004f90: 009a lsls r2, r3, #2
8004f92: 687b ldr r3, [r7, #4]
8004f94: 641a str r2, [r3, #64] @ 0x40
hdma->DmaBaseAddress = DMA1;
8004f96: 687b ldr r3, [r7, #4]
8004f98: 4a1f ldr r2, [pc, #124] @ (8005018 <HAL_DMA_Init+0xb0>)
8004f9a: 63da str r2, [r3, #60] @ 0x3c
#endif /* DMA2 */
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8004f9c: 687b ldr r3, [r7, #4]
8004f9e: 2202 movs r2, #2
8004fa0: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Get the CR register value */
tmp = hdma->Instance->CCR;
8004fa4: 687b ldr r3, [r7, #4]
8004fa6: 681b ldr r3, [r3, #0]
8004fa8: 681b ldr r3, [r3, #0]
8004faa: 60fb str r3, [r7, #12]
/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
8004fac: 68fb ldr r3, [r7, #12]
8004fae: f423 537f bic.w r3, r3, #16320 @ 0x3fc0
8004fb2: f023 0330 bic.w r3, r3, #48 @ 0x30
8004fb6: 60fb str r3, [r7, #12]
DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
DMA_CCR_DIR));
/* Prepare the DMA Channel configuration */
tmp |= hdma->Init.Direction |
8004fb8: 687b ldr r3, [r7, #4]
8004fba: 685a ldr r2, [r3, #4]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8004fbc: 687b ldr r3, [r7, #4]
8004fbe: 689b ldr r3, [r3, #8]
tmp |= hdma->Init.Direction |
8004fc0: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
8004fc2: 687b ldr r3, [r7, #4]
8004fc4: 68db ldr r3, [r3, #12]
8004fc6: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8004fc8: 687b ldr r3, [r7, #4]
8004fca: 691b ldr r3, [r3, #16]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8004fcc: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8004fce: 687b ldr r3, [r7, #4]
8004fd0: 695b ldr r3, [r3, #20]
8004fd2: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8004fd4: 687b ldr r3, [r7, #4]
8004fd6: 699b ldr r3, [r3, #24]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8004fd8: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8004fda: 687b ldr r3, [r7, #4]
8004fdc: 69db ldr r3, [r3, #28]
8004fde: 4313 orrs r3, r2
tmp |= hdma->Init.Direction |
8004fe0: 68fa ldr r2, [r7, #12]
8004fe2: 4313 orrs r3, r2
8004fe4: 60fb str r3, [r7, #12]
/* Write to DMA Channel CR register */
hdma->Instance->CCR = tmp;
8004fe6: 687b ldr r3, [r7, #4]
8004fe8: 681b ldr r3, [r3, #0]
8004fea: 68fa ldr r2, [r7, #12]
8004fec: 601a str r2, [r3, #0]
/* Initialise the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8004fee: 687b ldr r3, [r7, #4]
8004ff0: 2200 movs r2, #0
8004ff2: 639a str r2, [r3, #56] @ 0x38
/* Initialize the DMA state*/
hdma->State = HAL_DMA_STATE_READY;
8004ff4: 687b ldr r3, [r7, #4]
8004ff6: 2201 movs r2, #1
8004ff8: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Allocate lock resource and initialize it */
hdma->Lock = HAL_UNLOCKED;
8004ffc: 687b ldr r3, [r7, #4]
8004ffe: 2200 movs r2, #0
8005000: f883 2020 strb.w r2, [r3, #32]
return HAL_OK;
8005004: 2300 movs r3, #0
}
8005006: 4618 mov r0, r3
8005008: 3714 adds r7, #20
800500a: 46bd mov sp, r7
800500c: bc80 pop {r7}
800500e: 4770 bx lr
8005010: bffdfff8 .word 0xbffdfff8
8005014: cccccccd .word 0xcccccccd
8005018: 40020000 .word 0x40020000
0800501c <HAL_DMA_Start_IT>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
800501c: b580 push {r7, lr}
800501e: b086 sub sp, #24
8005020: af00 add r7, sp, #0
8005022: 60f8 str r0, [r7, #12]
8005024: 60b9 str r1, [r7, #8]
8005026: 607a str r2, [r7, #4]
8005028: 603b str r3, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
800502a: 2300 movs r3, #0
800502c: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
800502e: 68fb ldr r3, [r7, #12]
8005030: f893 3020 ldrb.w r3, [r3, #32]
8005034: 2b01 cmp r3, #1
8005036: d101 bne.n 800503c <HAL_DMA_Start_IT+0x20>
8005038: 2302 movs r3, #2
800503a: e04b b.n 80050d4 <HAL_DMA_Start_IT+0xb8>
800503c: 68fb ldr r3, [r7, #12]
800503e: 2201 movs r2, #1
8005040: f883 2020 strb.w r2, [r3, #32]
if(HAL_DMA_STATE_READY == hdma->State)
8005044: 68fb ldr r3, [r7, #12]
8005046: f893 3021 ldrb.w r3, [r3, #33] @ 0x21
800504a: b2db uxtb r3, r3
800504c: 2b01 cmp r3, #1
800504e: d13a bne.n 80050c6 <HAL_DMA_Start_IT+0xaa>
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005050: 68fb ldr r3, [r7, #12]
8005052: 2202 movs r2, #2
8005054: f883 2021 strb.w r2, [r3, #33] @ 0x21
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005058: 68fb ldr r3, [r7, #12]
800505a: 2200 movs r2, #0
800505c: 639a str r2, [r3, #56] @ 0x38
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
800505e: 68fb ldr r3, [r7, #12]
8005060: 681b ldr r3, [r3, #0]
8005062: 681a ldr r2, [r3, #0]
8005064: 68fb ldr r3, [r7, #12]
8005066: 681b ldr r3, [r3, #0]
8005068: f022 0201 bic.w r2, r2, #1
800506c: 601a str r2, [r3, #0]
/* Configure the source, destination address and the data length & clear flags*/
DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
800506e: 683b ldr r3, [r7, #0]
8005070: 687a ldr r2, [r7, #4]
8005072: 68b9 ldr r1, [r7, #8]
8005074: 68f8 ldr r0, [r7, #12]
8005076: f000 f937 bl 80052e8 <DMA_SetConfig>
/* Enable the transfer complete interrupt */
/* Enable the transfer Error interrupt */
if(NULL != hdma->XferHalfCpltCallback)
800507a: 68fb ldr r3, [r7, #12]
800507c: 6adb ldr r3, [r3, #44] @ 0x2c
800507e: 2b00 cmp r3, #0
8005080: d008 beq.n 8005094 <HAL_DMA_Start_IT+0x78>
{
/* Enable the Half transfer complete interrupt as well */
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005082: 68fb ldr r3, [r7, #12]
8005084: 681b ldr r3, [r3, #0]
8005086: 681a ldr r2, [r3, #0]
8005088: 68fb ldr r3, [r7, #12]
800508a: 681b ldr r3, [r3, #0]
800508c: f042 020e orr.w r2, r2, #14
8005090: 601a str r2, [r3, #0]
8005092: e00f b.n 80050b4 <HAL_DMA_Start_IT+0x98>
}
else
{
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005094: 68fb ldr r3, [r7, #12]
8005096: 681b ldr r3, [r3, #0]
8005098: 681a ldr r2, [r3, #0]
800509a: 68fb ldr r3, [r7, #12]
800509c: 681b ldr r3, [r3, #0]
800509e: f022 0204 bic.w r2, r2, #4
80050a2: 601a str r2, [r3, #0]
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
80050a4: 68fb ldr r3, [r7, #12]
80050a6: 681b ldr r3, [r3, #0]
80050a8: 681a ldr r2, [r3, #0]
80050aa: 68fb ldr r3, [r7, #12]
80050ac: 681b ldr r3, [r3, #0]
80050ae: f042 020a orr.w r2, r2, #10
80050b2: 601a str r2, [r3, #0]
}
/* Enable the Peripheral */
__HAL_DMA_ENABLE(hdma);
80050b4: 68fb ldr r3, [r7, #12]
80050b6: 681b ldr r3, [r3, #0]
80050b8: 681a ldr r2, [r3, #0]
80050ba: 68fb ldr r3, [r7, #12]
80050bc: 681b ldr r3, [r3, #0]
80050be: f042 0201 orr.w r2, r2, #1
80050c2: 601a str r2, [r3, #0]
80050c4: e005 b.n 80050d2 <HAL_DMA_Start_IT+0xb6>
}
else
{
/* Process Unlocked */
__HAL_UNLOCK(hdma);
80050c6: 68fb ldr r3, [r7, #12]
80050c8: 2200 movs r2, #0
80050ca: f883 2020 strb.w r2, [r3, #32]
/* Remain BUSY */
status = HAL_BUSY;
80050ce: 2302 movs r3, #2
80050d0: 75fb strb r3, [r7, #23]
}
return status;
80050d2: 7dfb ldrb r3, [r7, #23]
}
80050d4: 4618 mov r0, r3
80050d6: 3718 adds r7, #24
80050d8: 46bd mov sp, r7
80050da: bd80 pop {r7, pc}
080050dc <HAL_DMA_IRQHandler>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
80050dc: b580 push {r7, lr}
80050de: b084 sub sp, #16
80050e0: af00 add r7, sp, #0
80050e2: 6078 str r0, [r7, #4]
uint32_t flag_it = hdma->DmaBaseAddress->ISR;
80050e4: 687b ldr r3, [r7, #4]
80050e6: 6bdb ldr r3, [r3, #60] @ 0x3c
80050e8: 681b ldr r3, [r3, #0]
80050ea: 60fb str r3, [r7, #12]
uint32_t source_it = hdma->Instance->CCR;
80050ec: 687b ldr r3, [r7, #4]
80050ee: 681b ldr r3, [r3, #0]
80050f0: 681b ldr r3, [r3, #0]
80050f2: 60bb str r3, [r7, #8]
/* Half Transfer Complete Interrupt management ******************************/
if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
80050f4: 687b ldr r3, [r7, #4]
80050f6: 6c1b ldr r3, [r3, #64] @ 0x40
80050f8: 2204 movs r2, #4
80050fa: 409a lsls r2, r3
80050fc: 68fb ldr r3, [r7, #12]
80050fe: 4013 ands r3, r2
8005100: 2b00 cmp r3, #0
8005102: d04f beq.n 80051a4 <HAL_DMA_IRQHandler+0xc8>
8005104: 68bb ldr r3, [r7, #8]
8005106: f003 0304 and.w r3, r3, #4
800510a: 2b00 cmp r3, #0
800510c: d04a beq.n 80051a4 <HAL_DMA_IRQHandler+0xc8>
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
800510e: 687b ldr r3, [r7, #4]
8005110: 681b ldr r3, [r3, #0]
8005112: 681b ldr r3, [r3, #0]
8005114: f003 0320 and.w r3, r3, #32
8005118: 2b00 cmp r3, #0
800511a: d107 bne.n 800512c <HAL_DMA_IRQHandler+0x50>
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
800511c: 687b ldr r3, [r7, #4]
800511e: 681b ldr r3, [r3, #0]
8005120: 681a ldr r2, [r3, #0]
8005122: 687b ldr r3, [r7, #4]
8005124: 681b ldr r3, [r3, #0]
8005126: f022 0204 bic.w r2, r2, #4
800512a: 601a str r2, [r3, #0]
}
/* Clear the half transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
800512c: 687b ldr r3, [r7, #4]
800512e: 681b ldr r3, [r3, #0]
8005130: 4a66 ldr r2, [pc, #408] @ (80052cc <HAL_DMA_IRQHandler+0x1f0>)
8005132: 4293 cmp r3, r2
8005134: d029 beq.n 800518a <HAL_DMA_IRQHandler+0xae>
8005136: 687b ldr r3, [r7, #4]
8005138: 681b ldr r3, [r3, #0]
800513a: 4a65 ldr r2, [pc, #404] @ (80052d0 <HAL_DMA_IRQHandler+0x1f4>)
800513c: 4293 cmp r3, r2
800513e: d022 beq.n 8005186 <HAL_DMA_IRQHandler+0xaa>
8005140: 687b ldr r3, [r7, #4]
8005142: 681b ldr r3, [r3, #0]
8005144: 4a63 ldr r2, [pc, #396] @ (80052d4 <HAL_DMA_IRQHandler+0x1f8>)
8005146: 4293 cmp r3, r2
8005148: d01a beq.n 8005180 <HAL_DMA_IRQHandler+0xa4>
800514a: 687b ldr r3, [r7, #4]
800514c: 681b ldr r3, [r3, #0]
800514e: 4a62 ldr r2, [pc, #392] @ (80052d8 <HAL_DMA_IRQHandler+0x1fc>)
8005150: 4293 cmp r3, r2
8005152: d012 beq.n 800517a <HAL_DMA_IRQHandler+0x9e>
8005154: 687b ldr r3, [r7, #4]
8005156: 681b ldr r3, [r3, #0]
8005158: 4a60 ldr r2, [pc, #384] @ (80052dc <HAL_DMA_IRQHandler+0x200>)
800515a: 4293 cmp r3, r2
800515c: d00a beq.n 8005174 <HAL_DMA_IRQHandler+0x98>
800515e: 687b ldr r3, [r7, #4]
8005160: 681b ldr r3, [r3, #0]
8005162: 4a5f ldr r2, [pc, #380] @ (80052e0 <HAL_DMA_IRQHandler+0x204>)
8005164: 4293 cmp r3, r2
8005166: d102 bne.n 800516e <HAL_DMA_IRQHandler+0x92>
8005168: f44f 0380 mov.w r3, #4194304 @ 0x400000
800516c: e00e b.n 800518c <HAL_DMA_IRQHandler+0xb0>
800516e: f04f 6380 mov.w r3, #67108864 @ 0x4000000
8005172: e00b b.n 800518c <HAL_DMA_IRQHandler+0xb0>
8005174: f44f 2380 mov.w r3, #262144 @ 0x40000
8005178: e008 b.n 800518c <HAL_DMA_IRQHandler+0xb0>
800517a: f44f 4380 mov.w r3, #16384 @ 0x4000
800517e: e005 b.n 800518c <HAL_DMA_IRQHandler+0xb0>
8005180: f44f 6380 mov.w r3, #1024 @ 0x400
8005184: e002 b.n 800518c <HAL_DMA_IRQHandler+0xb0>
8005186: 2340 movs r3, #64 @ 0x40
8005188: e000 b.n 800518c <HAL_DMA_IRQHandler+0xb0>
800518a: 2304 movs r3, #4
800518c: 4a55 ldr r2, [pc, #340] @ (80052e4 <HAL_DMA_IRQHandler+0x208>)
800518e: 6053 str r3, [r2, #4]
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
8005190: 687b ldr r3, [r7, #4]
8005192: 6adb ldr r3, [r3, #44] @ 0x2c
8005194: 2b00 cmp r3, #0
8005196: f000 8094 beq.w 80052c2 <HAL_DMA_IRQHandler+0x1e6>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
800519a: 687b ldr r3, [r7, #4]
800519c: 6adb ldr r3, [r3, #44] @ 0x2c
800519e: 6878 ldr r0, [r7, #4]
80051a0: 4798 blx r3
if(hdma->XferHalfCpltCallback != NULL)
80051a2: e08e b.n 80052c2 <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Complete Interrupt management ***********************************/
else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
80051a4: 687b ldr r3, [r7, #4]
80051a6: 6c1b ldr r3, [r3, #64] @ 0x40
80051a8: 2202 movs r2, #2
80051aa: 409a lsls r2, r3
80051ac: 68fb ldr r3, [r7, #12]
80051ae: 4013 ands r3, r2
80051b0: 2b00 cmp r3, #0
80051b2: d056 beq.n 8005262 <HAL_DMA_IRQHandler+0x186>
80051b4: 68bb ldr r3, [r7, #8]
80051b6: f003 0302 and.w r3, r3, #2
80051ba: 2b00 cmp r3, #0
80051bc: d051 beq.n 8005262 <HAL_DMA_IRQHandler+0x186>
{
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
80051be: 687b ldr r3, [r7, #4]
80051c0: 681b ldr r3, [r3, #0]
80051c2: 681b ldr r3, [r3, #0]
80051c4: f003 0320 and.w r3, r3, #32
80051c8: 2b00 cmp r3, #0
80051ca: d10b bne.n 80051e4 <HAL_DMA_IRQHandler+0x108>
{
/* Disable the transfer complete and error interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
80051cc: 687b ldr r3, [r7, #4]
80051ce: 681b ldr r3, [r3, #0]
80051d0: 681a ldr r2, [r3, #0]
80051d2: 687b ldr r3, [r7, #4]
80051d4: 681b ldr r3, [r3, #0]
80051d6: f022 020a bic.w r2, r2, #10
80051da: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
80051dc: 687b ldr r3, [r7, #4]
80051de: 2201 movs r2, #1
80051e0: f883 2021 strb.w r2, [r3, #33] @ 0x21
}
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
80051e4: 687b ldr r3, [r7, #4]
80051e6: 681b ldr r3, [r3, #0]
80051e8: 4a38 ldr r2, [pc, #224] @ (80052cc <HAL_DMA_IRQHandler+0x1f0>)
80051ea: 4293 cmp r3, r2
80051ec: d029 beq.n 8005242 <HAL_DMA_IRQHandler+0x166>
80051ee: 687b ldr r3, [r7, #4]
80051f0: 681b ldr r3, [r3, #0]
80051f2: 4a37 ldr r2, [pc, #220] @ (80052d0 <HAL_DMA_IRQHandler+0x1f4>)
80051f4: 4293 cmp r3, r2
80051f6: d022 beq.n 800523e <HAL_DMA_IRQHandler+0x162>
80051f8: 687b ldr r3, [r7, #4]
80051fa: 681b ldr r3, [r3, #0]
80051fc: 4a35 ldr r2, [pc, #212] @ (80052d4 <HAL_DMA_IRQHandler+0x1f8>)
80051fe: 4293 cmp r3, r2
8005200: d01a beq.n 8005238 <HAL_DMA_IRQHandler+0x15c>
8005202: 687b ldr r3, [r7, #4]
8005204: 681b ldr r3, [r3, #0]
8005206: 4a34 ldr r2, [pc, #208] @ (80052d8 <HAL_DMA_IRQHandler+0x1fc>)
8005208: 4293 cmp r3, r2
800520a: d012 beq.n 8005232 <HAL_DMA_IRQHandler+0x156>
800520c: 687b ldr r3, [r7, #4]
800520e: 681b ldr r3, [r3, #0]
8005210: 4a32 ldr r2, [pc, #200] @ (80052dc <HAL_DMA_IRQHandler+0x200>)
8005212: 4293 cmp r3, r2
8005214: d00a beq.n 800522c <HAL_DMA_IRQHandler+0x150>
8005216: 687b ldr r3, [r7, #4]
8005218: 681b ldr r3, [r3, #0]
800521a: 4a31 ldr r2, [pc, #196] @ (80052e0 <HAL_DMA_IRQHandler+0x204>)
800521c: 4293 cmp r3, r2
800521e: d102 bne.n 8005226 <HAL_DMA_IRQHandler+0x14a>
8005220: f44f 1300 mov.w r3, #2097152 @ 0x200000
8005224: e00e b.n 8005244 <HAL_DMA_IRQHandler+0x168>
8005226: f04f 7300 mov.w r3, #33554432 @ 0x2000000
800522a: e00b b.n 8005244 <HAL_DMA_IRQHandler+0x168>
800522c: f44f 3300 mov.w r3, #131072 @ 0x20000
8005230: e008 b.n 8005244 <HAL_DMA_IRQHandler+0x168>
8005232: f44f 5300 mov.w r3, #8192 @ 0x2000
8005236: e005 b.n 8005244 <HAL_DMA_IRQHandler+0x168>
8005238: f44f 7300 mov.w r3, #512 @ 0x200
800523c: e002 b.n 8005244 <HAL_DMA_IRQHandler+0x168>
800523e: 2320 movs r3, #32
8005240: e000 b.n 8005244 <HAL_DMA_IRQHandler+0x168>
8005242: 2302 movs r3, #2
8005244: 4a27 ldr r2, [pc, #156] @ (80052e4 <HAL_DMA_IRQHandler+0x208>)
8005246: 6053 str r3, [r2, #4]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005248: 687b ldr r3, [r7, #4]
800524a: 2200 movs r2, #0
800524c: f883 2020 strb.w r2, [r3, #32]
if(hdma->XferCpltCallback != NULL)
8005250: 687b ldr r3, [r7, #4]
8005252: 6a9b ldr r3, [r3, #40] @ 0x28
8005254: 2b00 cmp r3, #0
8005256: d034 beq.n 80052c2 <HAL_DMA_IRQHandler+0x1e6>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8005258: 687b ldr r3, [r7, #4]
800525a: 6a9b ldr r3, [r3, #40] @ 0x28
800525c: 6878 ldr r0, [r7, #4]
800525e: 4798 blx r3
if(hdma->XferCpltCallback != NULL)
8005260: e02f b.n 80052c2 <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Error Interrupt management **************************************/
else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
8005262: 687b ldr r3, [r7, #4]
8005264: 6c1b ldr r3, [r3, #64] @ 0x40
8005266: 2208 movs r2, #8
8005268: 409a lsls r2, r3
800526a: 68fb ldr r3, [r7, #12]
800526c: 4013 ands r3, r2
800526e: 2b00 cmp r3, #0
8005270: d028 beq.n 80052c4 <HAL_DMA_IRQHandler+0x1e8>
8005272: 68bb ldr r3, [r7, #8]
8005274: f003 0308 and.w r3, r3, #8
8005278: 2b00 cmp r3, #0
800527a: d023 beq.n 80052c4 <HAL_DMA_IRQHandler+0x1e8>
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
/* Disable ALL DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
800527c: 687b ldr r3, [r7, #4]
800527e: 681b ldr r3, [r3, #0]
8005280: 681a ldr r2, [r3, #0]
8005282: 687b ldr r3, [r7, #4]
8005284: 681b ldr r3, [r3, #0]
8005286: f022 020e bic.w r2, r2, #14
800528a: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
800528c: 687b ldr r3, [r7, #4]
800528e: 6c1a ldr r2, [r3, #64] @ 0x40
8005290: 687b ldr r3, [r7, #4]
8005292: 6bdb ldr r3, [r3, #60] @ 0x3c
8005294: 2101 movs r1, #1
8005296: fa01 f202 lsl.w r2, r1, r2
800529a: 605a str r2, [r3, #4]
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
800529c: 687b ldr r3, [r7, #4]
800529e: 2201 movs r2, #1
80052a0: 639a str r2, [r3, #56] @ 0x38
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
80052a2: 687b ldr r3, [r7, #4]
80052a4: 2201 movs r2, #1
80052a6: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Process Unlocked */
__HAL_UNLOCK(hdma);
80052aa: 687b ldr r3, [r7, #4]
80052ac: 2200 movs r2, #0
80052ae: f883 2020 strb.w r2, [r3, #32]
if (hdma->XferErrorCallback != NULL)
80052b2: 687b ldr r3, [r7, #4]
80052b4: 6b1b ldr r3, [r3, #48] @ 0x30
80052b6: 2b00 cmp r3, #0
80052b8: d004 beq.n 80052c4 <HAL_DMA_IRQHandler+0x1e8>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
80052ba: 687b ldr r3, [r7, #4]
80052bc: 6b1b ldr r3, [r3, #48] @ 0x30
80052be: 6878 ldr r0, [r7, #4]
80052c0: 4798 blx r3
}
}
return;
80052c2: bf00 nop
80052c4: bf00 nop
}
80052c6: 3710 adds r7, #16
80052c8: 46bd mov sp, r7
80052ca: bd80 pop {r7, pc}
80052cc: 40020008 .word 0x40020008
80052d0: 4002001c .word 0x4002001c
80052d4: 40020030 .word 0x40020030
80052d8: 40020044 .word 0x40020044
80052dc: 40020058 .word 0x40020058
80052e0: 4002006c .word 0x4002006c
80052e4: 40020000 .word 0x40020000
080052e8 <DMA_SetConfig>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
80052e8: b480 push {r7}
80052ea: b085 sub sp, #20
80052ec: af00 add r7, sp, #0
80052ee: 60f8 str r0, [r7, #12]
80052f0: 60b9 str r1, [r7, #8]
80052f2: 607a str r2, [r7, #4]
80052f4: 603b str r3, [r7, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
80052f6: 68fb ldr r3, [r7, #12]
80052f8: 6c1a ldr r2, [r3, #64] @ 0x40
80052fa: 68fb ldr r3, [r7, #12]
80052fc: 6bdb ldr r3, [r3, #60] @ 0x3c
80052fe: 2101 movs r1, #1
8005300: fa01 f202 lsl.w r2, r1, r2
8005304: 605a str r2, [r3, #4]
/* Configure DMA Channel data length */
hdma->Instance->CNDTR = DataLength;
8005306: 68fb ldr r3, [r7, #12]
8005308: 681b ldr r3, [r3, #0]
800530a: 683a ldr r2, [r7, #0]
800530c: 605a str r2, [r3, #4]
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
800530e: 68fb ldr r3, [r7, #12]
8005310: 685b ldr r3, [r3, #4]
8005312: 2b10 cmp r3, #16
8005314: d108 bne.n 8005328 <DMA_SetConfig+0x40>
{
/* Configure DMA Channel destination address */
hdma->Instance->CPAR = DstAddress;
8005316: 68fb ldr r3, [r7, #12]
8005318: 681b ldr r3, [r3, #0]
800531a: 687a ldr r2, [r7, #4]
800531c: 609a str r2, [r3, #8]
/* Configure DMA Channel source address */
hdma->Instance->CMAR = SrcAddress;
800531e: 68fb ldr r3, [r7, #12]
8005320: 681b ldr r3, [r3, #0]
8005322: 68ba ldr r2, [r7, #8]
8005324: 60da str r2, [r3, #12]
hdma->Instance->CPAR = SrcAddress;
/* Configure DMA Channel destination address */
hdma->Instance->CMAR = DstAddress;
}
}
8005326: e007 b.n 8005338 <DMA_SetConfig+0x50>
hdma->Instance->CPAR = SrcAddress;
8005328: 68fb ldr r3, [r7, #12]
800532a: 681b ldr r3, [r3, #0]
800532c: 68ba ldr r2, [r7, #8]
800532e: 609a str r2, [r3, #8]
hdma->Instance->CMAR = DstAddress;
8005330: 68fb ldr r3, [r7, #12]
8005332: 681b ldr r3, [r3, #0]
8005334: 687a ldr r2, [r7, #4]
8005336: 60da str r2, [r3, #12]
}
8005338: bf00 nop
800533a: 3714 adds r7, #20
800533c: 46bd mov sp, r7
800533e: bc80 pop {r7}
8005340: 4770 bx lr
...
08005344 <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
8005344: b5f0 push {r4, r5, r6, r7, lr}
8005346: b087 sub sp, #28
8005348: af00 add r7, sp, #0
800534a: 60f8 str r0, [r7, #12]
800534c: 60b9 str r1, [r7, #8]
800534e: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
8005352: 2301 movs r3, #1
8005354: 75fb strb r3, [r7, #23]
uint8_t index = 0;
8005356: 2300 movs r3, #0
8005358: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
800535a: 2300 movs r3, #0
800535c: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
800535e: 4b2f ldr r3, [pc, #188] @ (800541c <HAL_FLASH_Program+0xd8>)
8005360: 7e1b ldrb r3, [r3, #24]
8005362: 2b01 cmp r3, #1
8005364: d101 bne.n 800536a <HAL_FLASH_Program+0x26>
8005366: 2302 movs r3, #2
8005368: e054 b.n 8005414 <HAL_FLASH_Program+0xd0>
800536a: 4b2c ldr r3, [pc, #176] @ (800541c <HAL_FLASH_Program+0xd8>)
800536c: 2201 movs r2, #1
800536e: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8005370: f24c 3050 movw r0, #50000 @ 0xc350
8005374: f000 f8a8 bl 80054c8 <FLASH_WaitForLastOperation>
8005378: 4603 mov r3, r0
800537a: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
800537c: 7dfb ldrb r3, [r7, #23]
800537e: 2b00 cmp r3, #0
8005380: d144 bne.n 800540c <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
8005382: 68fb ldr r3, [r7, #12]
8005384: 2b01 cmp r3, #1
8005386: d102 bne.n 800538e <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8005388: 2301 movs r3, #1
800538a: 757b strb r3, [r7, #21]
800538c: e007 b.n 800539e <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
800538e: 68fb ldr r3, [r7, #12]
8005390: 2b02 cmp r3, #2
8005392: d102 bne.n 800539a <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
8005394: 2302 movs r3, #2
8005396: 757b strb r3, [r7, #21]
8005398: e001 b.n 800539e <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
800539a: 2304 movs r3, #4
800539c: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
800539e: 2300 movs r3, #0
80053a0: 75bb strb r3, [r7, #22]
80053a2: e02d b.n 8005400 <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
80053a4: 7dbb ldrb r3, [r7, #22]
80053a6: 005a lsls r2, r3, #1
80053a8: 68bb ldr r3, [r7, #8]
80053aa: eb02 0c03 add.w ip, r2, r3
80053ae: 7dbb ldrb r3, [r7, #22]
80053b0: 0119 lsls r1, r3, #4
80053b2: e9d7 2300 ldrd r2, r3, [r7]
80053b6: f1c1 0620 rsb r6, r1, #32
80053ba: f1a1 0020 sub.w r0, r1, #32
80053be: fa22 f401 lsr.w r4, r2, r1
80053c2: fa03 f606 lsl.w r6, r3, r6
80053c6: 4334 orrs r4, r6
80053c8: fa23 f000 lsr.w r0, r3, r0
80053cc: 4304 orrs r4, r0
80053ce: fa23 f501 lsr.w r5, r3, r1
80053d2: b2a3 uxth r3, r4
80053d4: 4619 mov r1, r3
80053d6: 4660 mov r0, ip
80053d8: f000 f85a bl 8005490 <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
80053dc: f24c 3050 movw r0, #50000 @ 0xc350
80053e0: f000 f872 bl 80054c8 <FLASH_WaitForLastOperation>
80053e4: 4603 mov r3, r0
80053e6: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
80053e8: 4b0d ldr r3, [pc, #52] @ (8005420 <HAL_FLASH_Program+0xdc>)
80053ea: 691b ldr r3, [r3, #16]
80053ec: 4a0c ldr r2, [pc, #48] @ (8005420 <HAL_FLASH_Program+0xdc>)
80053ee: f023 0301 bic.w r3, r3, #1
80053f2: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
80053f4: 7dfb ldrb r3, [r7, #23]
80053f6: 2b00 cmp r3, #0
80053f8: d107 bne.n 800540a <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
80053fa: 7dbb ldrb r3, [r7, #22]
80053fc: 3301 adds r3, #1
80053fe: 75bb strb r3, [r7, #22]
8005400: 7dba ldrb r2, [r7, #22]
8005402: 7d7b ldrb r3, [r7, #21]
8005404: 429a cmp r2, r3
8005406: d3cd bcc.n 80053a4 <HAL_FLASH_Program+0x60>
8005408: e000 b.n 800540c <HAL_FLASH_Program+0xc8>
{
break;
800540a: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
800540c: 4b03 ldr r3, [pc, #12] @ (800541c <HAL_FLASH_Program+0xd8>)
800540e: 2200 movs r2, #0
8005410: 761a strb r2, [r3, #24]
return status;
8005412: 7dfb ldrb r3, [r7, #23]
}
8005414: 4618 mov r0, r3
8005416: 371c adds r7, #28
8005418: 46bd mov sp, r7
800541a: bdf0 pop {r4, r5, r6, r7, pc}
800541c: 20000468 .word 0x20000468
8005420: 40022000 .word 0x40022000
08005424 <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
8005424: b480 push {r7}
8005426: b083 sub sp, #12
8005428: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
800542a: 2300 movs r3, #0
800542c: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
800542e: 4b0d ldr r3, [pc, #52] @ (8005464 <HAL_FLASH_Unlock+0x40>)
8005430: 691b ldr r3, [r3, #16]
8005432: f003 0380 and.w r3, r3, #128 @ 0x80
8005436: 2b00 cmp r3, #0
8005438: d00d beq.n 8005456 <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
800543a: 4b0a ldr r3, [pc, #40] @ (8005464 <HAL_FLASH_Unlock+0x40>)
800543c: 4a0a ldr r2, [pc, #40] @ (8005468 <HAL_FLASH_Unlock+0x44>)
800543e: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
8005440: 4b08 ldr r3, [pc, #32] @ (8005464 <HAL_FLASH_Unlock+0x40>)
8005442: 4a0a ldr r2, [pc, #40] @ (800546c <HAL_FLASH_Unlock+0x48>)
8005444: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8005446: 4b07 ldr r3, [pc, #28] @ (8005464 <HAL_FLASH_Unlock+0x40>)
8005448: 691b ldr r3, [r3, #16]
800544a: f003 0380 and.w r3, r3, #128 @ 0x80
800544e: 2b00 cmp r3, #0
8005450: d001 beq.n 8005456 <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
8005452: 2301 movs r3, #1
8005454: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
8005456: 79fb ldrb r3, [r7, #7]
}
8005458: 4618 mov r0, r3
800545a: 370c adds r7, #12
800545c: 46bd mov sp, r7
800545e: bc80 pop {r7}
8005460: 4770 bx lr
8005462: bf00 nop
8005464: 40022000 .word 0x40022000
8005468: 45670123 .word 0x45670123
800546c: cdef89ab .word 0xcdef89ab
08005470 <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
8005470: b480 push {r7}
8005472: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
8005474: 4b05 ldr r3, [pc, #20] @ (800548c <HAL_FLASH_Lock+0x1c>)
8005476: 691b ldr r3, [r3, #16]
8005478: 4a04 ldr r2, [pc, #16] @ (800548c <HAL_FLASH_Lock+0x1c>)
800547a: f043 0380 orr.w r3, r3, #128 @ 0x80
800547e: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
8005480: 2300 movs r3, #0
}
8005482: 4618 mov r0, r3
8005484: 46bd mov sp, r7
8005486: bc80 pop {r7}
8005488: 4770 bx lr
800548a: bf00 nop
800548c: 40022000 .word 0x40022000
08005490 <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
8005490: b480 push {r7}
8005492: b083 sub sp, #12
8005494: af00 add r7, sp, #0
8005496: 6078 str r0, [r7, #4]
8005498: 460b mov r3, r1
800549a: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
800549c: 4b08 ldr r3, [pc, #32] @ (80054c0 <FLASH_Program_HalfWord+0x30>)
800549e: 2200 movs r2, #0
80054a0: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
80054a2: 4b08 ldr r3, [pc, #32] @ (80054c4 <FLASH_Program_HalfWord+0x34>)
80054a4: 691b ldr r3, [r3, #16]
80054a6: 4a07 ldr r2, [pc, #28] @ (80054c4 <FLASH_Program_HalfWord+0x34>)
80054a8: f043 0301 orr.w r3, r3, #1
80054ac: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
80054ae: 687b ldr r3, [r7, #4]
80054b0: 887a ldrh r2, [r7, #2]
80054b2: 801a strh r2, [r3, #0]
}
80054b4: bf00 nop
80054b6: 370c adds r7, #12
80054b8: 46bd mov sp, r7
80054ba: bc80 pop {r7}
80054bc: 4770 bx lr
80054be: bf00 nop
80054c0: 20000468 .word 0x20000468
80054c4: 40022000 .word 0x40022000
080054c8 <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
80054c8: b580 push {r7, lr}
80054ca: b084 sub sp, #16
80054cc: af00 add r7, sp, #0
80054ce: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
80054d0: f7ff f860 bl 8004594 <HAL_GetTick>
80054d4: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80054d6: e010 b.n 80054fa <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
80054d8: 687b ldr r3, [r7, #4]
80054da: f1b3 3fff cmp.w r3, #4294967295
80054de: d00c beq.n 80054fa <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
80054e0: 687b ldr r3, [r7, #4]
80054e2: 2b00 cmp r3, #0
80054e4: d007 beq.n 80054f6 <FLASH_WaitForLastOperation+0x2e>
80054e6: f7ff f855 bl 8004594 <HAL_GetTick>
80054ea: 4602 mov r2, r0
80054ec: 68fb ldr r3, [r7, #12]
80054ee: 1ad3 subs r3, r2, r3
80054f0: 687a ldr r2, [r7, #4]
80054f2: 429a cmp r2, r3
80054f4: d201 bcs.n 80054fa <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
80054f6: 2303 movs r3, #3
80054f8: e025 b.n 8005546 <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
80054fa: 4b15 ldr r3, [pc, #84] @ (8005550 <FLASH_WaitForLastOperation+0x88>)
80054fc: 68db ldr r3, [r3, #12]
80054fe: f003 0301 and.w r3, r3, #1
8005502: 2b00 cmp r3, #0
8005504: d1e8 bne.n 80054d8 <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
8005506: 4b12 ldr r3, [pc, #72] @ (8005550 <FLASH_WaitForLastOperation+0x88>)
8005508: 68db ldr r3, [r3, #12]
800550a: f003 0320 and.w r3, r3, #32
800550e: 2b00 cmp r3, #0
8005510: d002 beq.n 8005518 <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
8005512: 4b0f ldr r3, [pc, #60] @ (8005550 <FLASH_WaitForLastOperation+0x88>)
8005514: 2220 movs r2, #32
8005516: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8005518: 4b0d ldr r3, [pc, #52] @ (8005550 <FLASH_WaitForLastOperation+0x88>)
800551a: 68db ldr r3, [r3, #12]
800551c: f003 0310 and.w r3, r3, #16
8005520: 2b00 cmp r3, #0
8005522: d10b bne.n 800553c <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8005524: 4b0a ldr r3, [pc, #40] @ (8005550 <FLASH_WaitForLastOperation+0x88>)
8005526: 69db ldr r3, [r3, #28]
8005528: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
800552c: 2b00 cmp r3, #0
800552e: d105 bne.n 800553c <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8005530: 4b07 ldr r3, [pc, #28] @ (8005550 <FLASH_WaitForLastOperation+0x88>)
8005532: 68db ldr r3, [r3, #12]
8005534: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8005538: 2b00 cmp r3, #0
800553a: d003 beq.n 8005544 <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
800553c: f000 f80a bl 8005554 <FLASH_SetErrorCode>
return HAL_ERROR;
8005540: 2301 movs r3, #1
8005542: e000 b.n 8005546 <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
8005544: 2300 movs r3, #0
}
8005546: 4618 mov r0, r3
8005548: 3710 adds r7, #16
800554a: 46bd mov sp, r7
800554c: bd80 pop {r7, pc}
800554e: bf00 nop
8005550: 40022000 .word 0x40022000
08005554 <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
8005554: b480 push {r7}
8005556: b083 sub sp, #12
8005558: af00 add r7, sp, #0
uint32_t flags = 0U;
800555a: 2300 movs r3, #0
800555c: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
800555e: 4b23 ldr r3, [pc, #140] @ (80055ec <FLASH_SetErrorCode+0x98>)
8005560: 68db ldr r3, [r3, #12]
8005562: f003 0310 and.w r3, r3, #16
8005566: 2b00 cmp r3, #0
8005568: d009 beq.n 800557e <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
800556a: 4b21 ldr r3, [pc, #132] @ (80055f0 <FLASH_SetErrorCode+0x9c>)
800556c: 69db ldr r3, [r3, #28]
800556e: f043 0302 orr.w r3, r3, #2
8005572: 4a1f ldr r2, [pc, #124] @ (80055f0 <FLASH_SetErrorCode+0x9c>)
8005574: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
8005576: 687b ldr r3, [r7, #4]
8005578: f043 0310 orr.w r3, r3, #16
800557c: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
800557e: 4b1b ldr r3, [pc, #108] @ (80055ec <FLASH_SetErrorCode+0x98>)
8005580: 68db ldr r3, [r3, #12]
8005582: f003 0304 and.w r3, r3, #4
8005586: 2b00 cmp r3, #0
8005588: d009 beq.n 800559e <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
800558a: 4b19 ldr r3, [pc, #100] @ (80055f0 <FLASH_SetErrorCode+0x9c>)
800558c: 69db ldr r3, [r3, #28]
800558e: f043 0301 orr.w r3, r3, #1
8005592: 4a17 ldr r2, [pc, #92] @ (80055f0 <FLASH_SetErrorCode+0x9c>)
8005594: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
8005596: 687b ldr r3, [r7, #4]
8005598: f043 0304 orr.w r3, r3, #4
800559c: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
800559e: 4b13 ldr r3, [pc, #76] @ (80055ec <FLASH_SetErrorCode+0x98>)
80055a0: 69db ldr r3, [r3, #28]
80055a2: f003 0301 and.w r3, r3, #1
80055a6: 2b00 cmp r3, #0
80055a8: d00b beq.n 80055c2 <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
80055aa: 4b11 ldr r3, [pc, #68] @ (80055f0 <FLASH_SetErrorCode+0x9c>)
80055ac: 69db ldr r3, [r3, #28]
80055ae: f043 0304 orr.w r3, r3, #4
80055b2: 4a0f ldr r2, [pc, #60] @ (80055f0 <FLASH_SetErrorCode+0x9c>)
80055b4: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
80055b6: 4b0d ldr r3, [pc, #52] @ (80055ec <FLASH_SetErrorCode+0x98>)
80055b8: 69db ldr r3, [r3, #28]
80055ba: 4a0c ldr r2, [pc, #48] @ (80055ec <FLASH_SetErrorCode+0x98>)
80055bc: f023 0301 bic.w r3, r3, #1
80055c0: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
80055c2: 687b ldr r3, [r7, #4]
80055c4: f240 1201 movw r2, #257 @ 0x101
80055c8: 4293 cmp r3, r2
80055ca: d106 bne.n 80055da <FLASH_SetErrorCode+0x86>
80055cc: 4b07 ldr r3, [pc, #28] @ (80055ec <FLASH_SetErrorCode+0x98>)
80055ce: 69db ldr r3, [r3, #28]
80055d0: 4a06 ldr r2, [pc, #24] @ (80055ec <FLASH_SetErrorCode+0x98>)
80055d2: f023 0301 bic.w r3, r3, #1
80055d6: 61d3 str r3, [r2, #28]
}
80055d8: e002 b.n 80055e0 <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
80055da: 4a04 ldr r2, [pc, #16] @ (80055ec <FLASH_SetErrorCode+0x98>)
80055dc: 687b ldr r3, [r7, #4]
80055de: 60d3 str r3, [r2, #12]
}
80055e0: bf00 nop
80055e2: 370c adds r7, #12
80055e4: 46bd mov sp, r7
80055e6: bc80 pop {r7}
80055e8: 4770 bx lr
80055ea: bf00 nop
80055ec: 40022000 .word 0x40022000
80055f0: 20000468 .word 0x20000468
080055f4 <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
80055f4: b580 push {r7, lr}
80055f6: b084 sub sp, #16
80055f8: af00 add r7, sp, #0
80055fa: 6078 str r0, [r7, #4]
80055fc: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
80055fe: 2301 movs r3, #1
8005600: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
8005602: 2300 movs r3, #0
8005604: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
8005606: 4b2f ldr r3, [pc, #188] @ (80056c4 <HAL_FLASHEx_Erase+0xd0>)
8005608: 7e1b ldrb r3, [r3, #24]
800560a: 2b01 cmp r3, #1
800560c: d101 bne.n 8005612 <HAL_FLASHEx_Erase+0x1e>
800560e: 2302 movs r3, #2
8005610: e053 b.n 80056ba <HAL_FLASHEx_Erase+0xc6>
8005612: 4b2c ldr r3, [pc, #176] @ (80056c4 <HAL_FLASHEx_Erase+0xd0>)
8005614: 2201 movs r2, #1
8005616: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
8005618: 687b ldr r3, [r7, #4]
800561a: 681b ldr r3, [r3, #0]
800561c: 2b02 cmp r3, #2
800561e: d116 bne.n 800564e <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
8005620: f24c 3050 movw r0, #50000 @ 0xc350
8005624: f7ff ff50 bl 80054c8 <FLASH_WaitForLastOperation>
8005628: 4603 mov r3, r0
800562a: 2b00 cmp r3, #0
800562c: d141 bne.n 80056b2 <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
800562e: 2001 movs r0, #1
8005630: f000 f84c bl 80056cc <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8005634: f24c 3050 movw r0, #50000 @ 0xc350
8005638: f7ff ff46 bl 80054c8 <FLASH_WaitForLastOperation>
800563c: 4603 mov r3, r0
800563e: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
8005640: 4b21 ldr r3, [pc, #132] @ (80056c8 <HAL_FLASHEx_Erase+0xd4>)
8005642: 691b ldr r3, [r3, #16]
8005644: 4a20 ldr r2, [pc, #128] @ (80056c8 <HAL_FLASHEx_Erase+0xd4>)
8005646: f023 0304 bic.w r3, r3, #4
800564a: 6113 str r3, [r2, #16]
800564c: e031 b.n 80056b2 <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
800564e: f24c 3050 movw r0, #50000 @ 0xc350
8005652: f7ff ff39 bl 80054c8 <FLASH_WaitForLastOperation>
8005656: 4603 mov r3, r0
8005658: 2b00 cmp r3, #0
800565a: d12a bne.n 80056b2 <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
800565c: 683b ldr r3, [r7, #0]
800565e: f04f 32ff mov.w r2, #4294967295
8005662: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
8005664: 687b ldr r3, [r7, #4]
8005666: 689b ldr r3, [r3, #8]
8005668: 60bb str r3, [r7, #8]
800566a: e019 b.n 80056a0 <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
800566c: 68b8 ldr r0, [r7, #8]
800566e: f000 f849 bl 8005704 <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
8005672: f24c 3050 movw r0, #50000 @ 0xc350
8005676: f7ff ff27 bl 80054c8 <FLASH_WaitForLastOperation>
800567a: 4603 mov r3, r0
800567c: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
800567e: 4b12 ldr r3, [pc, #72] @ (80056c8 <HAL_FLASHEx_Erase+0xd4>)
8005680: 691b ldr r3, [r3, #16]
8005682: 4a11 ldr r2, [pc, #68] @ (80056c8 <HAL_FLASHEx_Erase+0xd4>)
8005684: f023 0302 bic.w r3, r3, #2
8005688: 6113 str r3, [r2, #16]
if (status != HAL_OK)
800568a: 7bfb ldrb r3, [r7, #15]
800568c: 2b00 cmp r3, #0
800568e: d003 beq.n 8005698 <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
8005690: 683b ldr r3, [r7, #0]
8005692: 68ba ldr r2, [r7, #8]
8005694: 601a str r2, [r3, #0]
break;
8005696: e00c b.n 80056b2 <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
8005698: 68bb ldr r3, [r7, #8]
800569a: f503 6380 add.w r3, r3, #1024 @ 0x400
800569e: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
80056a0: 687b ldr r3, [r7, #4]
80056a2: 68db ldr r3, [r3, #12]
80056a4: 029a lsls r2, r3, #10
80056a6: 687b ldr r3, [r7, #4]
80056a8: 689b ldr r3, [r3, #8]
80056aa: 4413 add r3, r2
80056ac: 68ba ldr r2, [r7, #8]
80056ae: 429a cmp r2, r3
80056b0: d3dc bcc.n 800566c <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
80056b2: 4b04 ldr r3, [pc, #16] @ (80056c4 <HAL_FLASHEx_Erase+0xd0>)
80056b4: 2200 movs r2, #0
80056b6: 761a strb r2, [r3, #24]
return status;
80056b8: 7bfb ldrb r3, [r7, #15]
}
80056ba: 4618 mov r0, r3
80056bc: 3710 adds r7, #16
80056be: 46bd mov sp, r7
80056c0: bd80 pop {r7, pc}
80056c2: bf00 nop
80056c4: 20000468 .word 0x20000468
80056c8: 40022000 .word 0x40022000
080056cc <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
80056cc: b480 push {r7}
80056ce: b083 sub sp, #12
80056d0: af00 add r7, sp, #0
80056d2: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80056d4: 4b09 ldr r3, [pc, #36] @ (80056fc <FLASH_MassErase+0x30>)
80056d6: 2200 movs r2, #0
80056d8: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
80056da: 4b09 ldr r3, [pc, #36] @ (8005700 <FLASH_MassErase+0x34>)
80056dc: 691b ldr r3, [r3, #16]
80056de: 4a08 ldr r2, [pc, #32] @ (8005700 <FLASH_MassErase+0x34>)
80056e0: f043 0304 orr.w r3, r3, #4
80056e4: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
80056e6: 4b06 ldr r3, [pc, #24] @ (8005700 <FLASH_MassErase+0x34>)
80056e8: 691b ldr r3, [r3, #16]
80056ea: 4a05 ldr r2, [pc, #20] @ (8005700 <FLASH_MassErase+0x34>)
80056ec: f043 0340 orr.w r3, r3, #64 @ 0x40
80056f0: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
80056f2: bf00 nop
80056f4: 370c adds r7, #12
80056f6: 46bd mov sp, r7
80056f8: bc80 pop {r7}
80056fa: 4770 bx lr
80056fc: 20000468 .word 0x20000468
8005700: 40022000 .word 0x40022000
08005704 <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
8005704: b480 push {r7}
8005706: b083 sub sp, #12
8005708: af00 add r7, sp, #0
800570a: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
800570c: 4b0b ldr r3, [pc, #44] @ (800573c <FLASH_PageErase+0x38>)
800570e: 2200 movs r2, #0
8005710: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
8005712: 4b0b ldr r3, [pc, #44] @ (8005740 <FLASH_PageErase+0x3c>)
8005714: 691b ldr r3, [r3, #16]
8005716: 4a0a ldr r2, [pc, #40] @ (8005740 <FLASH_PageErase+0x3c>)
8005718: f043 0302 orr.w r3, r3, #2
800571c: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
800571e: 4a08 ldr r2, [pc, #32] @ (8005740 <FLASH_PageErase+0x3c>)
8005720: 687b ldr r3, [r7, #4]
8005722: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
8005724: 4b06 ldr r3, [pc, #24] @ (8005740 <FLASH_PageErase+0x3c>)
8005726: 691b ldr r3, [r3, #16]
8005728: 4a05 ldr r2, [pc, #20] @ (8005740 <FLASH_PageErase+0x3c>)
800572a: f043 0340 orr.w r3, r3, #64 @ 0x40
800572e: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
8005730: bf00 nop
8005732: 370c adds r7, #12
8005734: 46bd mov sp, r7
8005736: bc80 pop {r7}
8005738: 4770 bx lr
800573a: bf00 nop
800573c: 20000468 .word 0x20000468
8005740: 40022000 .word 0x40022000
08005744 <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
8005744: b480 push {r7}
8005746: b08b sub sp, #44 @ 0x2c
8005748: af00 add r7, sp, #0
800574a: 6078 str r0, [r7, #4]
800574c: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
800574e: 2300 movs r3, #0
8005750: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
8005752: 2300 movs r3, #0
8005754: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
8005756: e169 b.n 8005a2c <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8005758: 2201 movs r2, #1
800575a: 6a7b ldr r3, [r7, #36] @ 0x24
800575c: fa02 f303 lsl.w r3, r2, r3
8005760: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
8005762: 683b ldr r3, [r7, #0]
8005764: 681b ldr r3, [r3, #0]
8005766: 69fa ldr r2, [r7, #28]
8005768: 4013 ands r3, r2
800576a: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
800576c: 69ba ldr r2, [r7, #24]
800576e: 69fb ldr r3, [r7, #28]
8005770: 429a cmp r2, r3
8005772: f040 8158 bne.w 8005a26 <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
8005776: 683b ldr r3, [r7, #0]
8005778: 685b ldr r3, [r3, #4]
800577a: 4a9a ldr r2, [pc, #616] @ (80059e4 <HAL_GPIO_Init+0x2a0>)
800577c: 4293 cmp r3, r2
800577e: d05e beq.n 800583e <HAL_GPIO_Init+0xfa>
8005780: 4a98 ldr r2, [pc, #608] @ (80059e4 <HAL_GPIO_Init+0x2a0>)
8005782: 4293 cmp r3, r2
8005784: d875 bhi.n 8005872 <HAL_GPIO_Init+0x12e>
8005786: 4a98 ldr r2, [pc, #608] @ (80059e8 <HAL_GPIO_Init+0x2a4>)
8005788: 4293 cmp r3, r2
800578a: d058 beq.n 800583e <HAL_GPIO_Init+0xfa>
800578c: 4a96 ldr r2, [pc, #600] @ (80059e8 <HAL_GPIO_Init+0x2a4>)
800578e: 4293 cmp r3, r2
8005790: d86f bhi.n 8005872 <HAL_GPIO_Init+0x12e>
8005792: 4a96 ldr r2, [pc, #600] @ (80059ec <HAL_GPIO_Init+0x2a8>)
8005794: 4293 cmp r3, r2
8005796: d052 beq.n 800583e <HAL_GPIO_Init+0xfa>
8005798: 4a94 ldr r2, [pc, #592] @ (80059ec <HAL_GPIO_Init+0x2a8>)
800579a: 4293 cmp r3, r2
800579c: d869 bhi.n 8005872 <HAL_GPIO_Init+0x12e>
800579e: 4a94 ldr r2, [pc, #592] @ (80059f0 <HAL_GPIO_Init+0x2ac>)
80057a0: 4293 cmp r3, r2
80057a2: d04c beq.n 800583e <HAL_GPIO_Init+0xfa>
80057a4: 4a92 ldr r2, [pc, #584] @ (80059f0 <HAL_GPIO_Init+0x2ac>)
80057a6: 4293 cmp r3, r2
80057a8: d863 bhi.n 8005872 <HAL_GPIO_Init+0x12e>
80057aa: 4a92 ldr r2, [pc, #584] @ (80059f4 <HAL_GPIO_Init+0x2b0>)
80057ac: 4293 cmp r3, r2
80057ae: d046 beq.n 800583e <HAL_GPIO_Init+0xfa>
80057b0: 4a90 ldr r2, [pc, #576] @ (80059f4 <HAL_GPIO_Init+0x2b0>)
80057b2: 4293 cmp r3, r2
80057b4: d85d bhi.n 8005872 <HAL_GPIO_Init+0x12e>
80057b6: 2b12 cmp r3, #18
80057b8: d82a bhi.n 8005810 <HAL_GPIO_Init+0xcc>
80057ba: 2b12 cmp r3, #18
80057bc: d859 bhi.n 8005872 <HAL_GPIO_Init+0x12e>
80057be: a201 add r2, pc, #4 @ (adr r2, 80057c4 <HAL_GPIO_Init+0x80>)
80057c0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80057c4: 0800583f .word 0x0800583f
80057c8: 08005819 .word 0x08005819
80057cc: 0800582b .word 0x0800582b
80057d0: 0800586d .word 0x0800586d
80057d4: 08005873 .word 0x08005873
80057d8: 08005873 .word 0x08005873
80057dc: 08005873 .word 0x08005873
80057e0: 08005873 .word 0x08005873
80057e4: 08005873 .word 0x08005873
80057e8: 08005873 .word 0x08005873
80057ec: 08005873 .word 0x08005873
80057f0: 08005873 .word 0x08005873
80057f4: 08005873 .word 0x08005873
80057f8: 08005873 .word 0x08005873
80057fc: 08005873 .word 0x08005873
8005800: 08005873 .word 0x08005873
8005804: 08005873 .word 0x08005873
8005808: 08005821 .word 0x08005821
800580c: 08005835 .word 0x08005835
8005810: 4a79 ldr r2, [pc, #484] @ (80059f8 <HAL_GPIO_Init+0x2b4>)
8005812: 4293 cmp r3, r2
8005814: d013 beq.n 800583e <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
8005816: e02c b.n 8005872 <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
8005818: 683b ldr r3, [r7, #0]
800581a: 68db ldr r3, [r3, #12]
800581c: 623b str r3, [r7, #32]
break;
800581e: e029 b.n 8005874 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
8005820: 683b ldr r3, [r7, #0]
8005822: 68db ldr r3, [r3, #12]
8005824: 3304 adds r3, #4
8005826: 623b str r3, [r7, #32]
break;
8005828: e024 b.n 8005874 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
800582a: 683b ldr r3, [r7, #0]
800582c: 68db ldr r3, [r3, #12]
800582e: 3308 adds r3, #8
8005830: 623b str r3, [r7, #32]
break;
8005832: e01f b.n 8005874 <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
8005834: 683b ldr r3, [r7, #0]
8005836: 68db ldr r3, [r3, #12]
8005838: 330c adds r3, #12
800583a: 623b str r3, [r7, #32]
break;
800583c: e01a b.n 8005874 <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
800583e: 683b ldr r3, [r7, #0]
8005840: 689b ldr r3, [r3, #8]
8005842: 2b00 cmp r3, #0
8005844: d102 bne.n 800584c <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
8005846: 2304 movs r3, #4
8005848: 623b str r3, [r7, #32]
break;
800584a: e013 b.n 8005874 <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
800584c: 683b ldr r3, [r7, #0]
800584e: 689b ldr r3, [r3, #8]
8005850: 2b01 cmp r3, #1
8005852: d105 bne.n 8005860 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8005854: 2308 movs r3, #8
8005856: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8005858: 687b ldr r3, [r7, #4]
800585a: 69fa ldr r2, [r7, #28]
800585c: 611a str r2, [r3, #16]
break;
800585e: e009 b.n 8005874 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8005860: 2308 movs r3, #8
8005862: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
8005864: 687b ldr r3, [r7, #4]
8005866: 69fa ldr r2, [r7, #28]
8005868: 615a str r2, [r3, #20]
break;
800586a: e003 b.n 8005874 <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
800586c: 2300 movs r3, #0
800586e: 623b str r3, [r7, #32]
break;
8005870: e000 b.n 8005874 <HAL_GPIO_Init+0x130>
break;
8005872: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
8005874: 69bb ldr r3, [r7, #24]
8005876: 2bff cmp r3, #255 @ 0xff
8005878: d801 bhi.n 800587e <HAL_GPIO_Init+0x13a>
800587a: 687b ldr r3, [r7, #4]
800587c: e001 b.n 8005882 <HAL_GPIO_Init+0x13e>
800587e: 687b ldr r3, [r7, #4]
8005880: 3304 adds r3, #4
8005882: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
8005884: 69bb ldr r3, [r7, #24]
8005886: 2bff cmp r3, #255 @ 0xff
8005888: d802 bhi.n 8005890 <HAL_GPIO_Init+0x14c>
800588a: 6a7b ldr r3, [r7, #36] @ 0x24
800588c: 009b lsls r3, r3, #2
800588e: e002 b.n 8005896 <HAL_GPIO_Init+0x152>
8005890: 6a7b ldr r3, [r7, #36] @ 0x24
8005892: 3b08 subs r3, #8
8005894: 009b lsls r3, r3, #2
8005896: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8005898: 697b ldr r3, [r7, #20]
800589a: 681a ldr r2, [r3, #0]
800589c: 210f movs r1, #15
800589e: 693b ldr r3, [r7, #16]
80058a0: fa01 f303 lsl.w r3, r1, r3
80058a4: 43db mvns r3, r3
80058a6: 401a ands r2, r3
80058a8: 6a39 ldr r1, [r7, #32]
80058aa: 693b ldr r3, [r7, #16]
80058ac: fa01 f303 lsl.w r3, r1, r3
80058b0: 431a orrs r2, r3
80058b2: 697b ldr r3, [r7, #20]
80058b4: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
80058b6: 683b ldr r3, [r7, #0]
80058b8: 685b ldr r3, [r3, #4]
80058ba: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80058be: 2b00 cmp r3, #0
80058c0: f000 80b1 beq.w 8005a26 <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
80058c4: 4b4d ldr r3, [pc, #308] @ (80059fc <HAL_GPIO_Init+0x2b8>)
80058c6: 699b ldr r3, [r3, #24]
80058c8: 4a4c ldr r2, [pc, #304] @ (80059fc <HAL_GPIO_Init+0x2b8>)
80058ca: f043 0301 orr.w r3, r3, #1
80058ce: 6193 str r3, [r2, #24]
80058d0: 4b4a ldr r3, [pc, #296] @ (80059fc <HAL_GPIO_Init+0x2b8>)
80058d2: 699b ldr r3, [r3, #24]
80058d4: f003 0301 and.w r3, r3, #1
80058d8: 60bb str r3, [r7, #8]
80058da: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
80058dc: 4a48 ldr r2, [pc, #288] @ (8005a00 <HAL_GPIO_Init+0x2bc>)
80058de: 6a7b ldr r3, [r7, #36] @ 0x24
80058e0: 089b lsrs r3, r3, #2
80058e2: 3302 adds r3, #2
80058e4: f852 3023 ldr.w r3, [r2, r3, lsl #2]
80058e8: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
80058ea: 6a7b ldr r3, [r7, #36] @ 0x24
80058ec: f003 0303 and.w r3, r3, #3
80058f0: 009b lsls r3, r3, #2
80058f2: 220f movs r2, #15
80058f4: fa02 f303 lsl.w r3, r2, r3
80058f8: 43db mvns r3, r3
80058fa: 68fa ldr r2, [r7, #12]
80058fc: 4013 ands r3, r2
80058fe: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
8005900: 687b ldr r3, [r7, #4]
8005902: 4a40 ldr r2, [pc, #256] @ (8005a04 <HAL_GPIO_Init+0x2c0>)
8005904: 4293 cmp r3, r2
8005906: d013 beq.n 8005930 <HAL_GPIO_Init+0x1ec>
8005908: 687b ldr r3, [r7, #4]
800590a: 4a3f ldr r2, [pc, #252] @ (8005a08 <HAL_GPIO_Init+0x2c4>)
800590c: 4293 cmp r3, r2
800590e: d00d beq.n 800592c <HAL_GPIO_Init+0x1e8>
8005910: 687b ldr r3, [r7, #4]
8005912: 4a3e ldr r2, [pc, #248] @ (8005a0c <HAL_GPIO_Init+0x2c8>)
8005914: 4293 cmp r3, r2
8005916: d007 beq.n 8005928 <HAL_GPIO_Init+0x1e4>
8005918: 687b ldr r3, [r7, #4]
800591a: 4a3d ldr r2, [pc, #244] @ (8005a10 <HAL_GPIO_Init+0x2cc>)
800591c: 4293 cmp r3, r2
800591e: d101 bne.n 8005924 <HAL_GPIO_Init+0x1e0>
8005920: 2303 movs r3, #3
8005922: e006 b.n 8005932 <HAL_GPIO_Init+0x1ee>
8005924: 2304 movs r3, #4
8005926: e004 b.n 8005932 <HAL_GPIO_Init+0x1ee>
8005928: 2302 movs r3, #2
800592a: e002 b.n 8005932 <HAL_GPIO_Init+0x1ee>
800592c: 2301 movs r3, #1
800592e: e000 b.n 8005932 <HAL_GPIO_Init+0x1ee>
8005930: 2300 movs r3, #0
8005932: 6a7a ldr r2, [r7, #36] @ 0x24
8005934: f002 0203 and.w r2, r2, #3
8005938: 0092 lsls r2, r2, #2
800593a: 4093 lsls r3, r2
800593c: 68fa ldr r2, [r7, #12]
800593e: 4313 orrs r3, r2
8005940: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
8005942: 492f ldr r1, [pc, #188] @ (8005a00 <HAL_GPIO_Init+0x2bc>)
8005944: 6a7b ldr r3, [r7, #36] @ 0x24
8005946: 089b lsrs r3, r3, #2
8005948: 3302 adds r3, #2
800594a: 68fa ldr r2, [r7, #12]
800594c: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8005950: 683b ldr r3, [r7, #0]
8005952: 685b ldr r3, [r3, #4]
8005954: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8005958: 2b00 cmp r3, #0
800595a: d006 beq.n 800596a <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
800595c: 4b2d ldr r3, [pc, #180] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
800595e: 689a ldr r2, [r3, #8]
8005960: 492c ldr r1, [pc, #176] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
8005962: 69bb ldr r3, [r7, #24]
8005964: 4313 orrs r3, r2
8005966: 608b str r3, [r1, #8]
8005968: e006 b.n 8005978 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
800596a: 4b2a ldr r3, [pc, #168] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
800596c: 689a ldr r2, [r3, #8]
800596e: 69bb ldr r3, [r7, #24]
8005970: 43db mvns r3, r3
8005972: 4928 ldr r1, [pc, #160] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
8005974: 4013 ands r3, r2
8005976: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8005978: 683b ldr r3, [r7, #0]
800597a: 685b ldr r3, [r3, #4]
800597c: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8005980: 2b00 cmp r3, #0
8005982: d006 beq.n 8005992 <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
8005984: 4b23 ldr r3, [pc, #140] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
8005986: 68da ldr r2, [r3, #12]
8005988: 4922 ldr r1, [pc, #136] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
800598a: 69bb ldr r3, [r7, #24]
800598c: 4313 orrs r3, r2
800598e: 60cb str r3, [r1, #12]
8005990: e006 b.n 80059a0 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
8005992: 4b20 ldr r3, [pc, #128] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
8005994: 68da ldr r2, [r3, #12]
8005996: 69bb ldr r3, [r7, #24]
8005998: 43db mvns r3, r3
800599a: 491e ldr r1, [pc, #120] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
800599c: 4013 ands r3, r2
800599e: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
80059a0: 683b ldr r3, [r7, #0]
80059a2: 685b ldr r3, [r3, #4]
80059a4: f403 3300 and.w r3, r3, #131072 @ 0x20000
80059a8: 2b00 cmp r3, #0
80059aa: d006 beq.n 80059ba <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
80059ac: 4b19 ldr r3, [pc, #100] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
80059ae: 685a ldr r2, [r3, #4]
80059b0: 4918 ldr r1, [pc, #96] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
80059b2: 69bb ldr r3, [r7, #24]
80059b4: 4313 orrs r3, r2
80059b6: 604b str r3, [r1, #4]
80059b8: e006 b.n 80059c8 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
80059ba: 4b16 ldr r3, [pc, #88] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
80059bc: 685a ldr r2, [r3, #4]
80059be: 69bb ldr r3, [r7, #24]
80059c0: 43db mvns r3, r3
80059c2: 4914 ldr r1, [pc, #80] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
80059c4: 4013 ands r3, r2
80059c6: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
80059c8: 683b ldr r3, [r7, #0]
80059ca: 685b ldr r3, [r3, #4]
80059cc: f403 3380 and.w r3, r3, #65536 @ 0x10000
80059d0: 2b00 cmp r3, #0
80059d2: d021 beq.n 8005a18 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
80059d4: 4b0f ldr r3, [pc, #60] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
80059d6: 681a ldr r2, [r3, #0]
80059d8: 490e ldr r1, [pc, #56] @ (8005a14 <HAL_GPIO_Init+0x2d0>)
80059da: 69bb ldr r3, [r7, #24]
80059dc: 4313 orrs r3, r2
80059de: 600b str r3, [r1, #0]
80059e0: e021 b.n 8005a26 <HAL_GPIO_Init+0x2e2>
80059e2: bf00 nop
80059e4: 10320000 .word 0x10320000
80059e8: 10310000 .word 0x10310000
80059ec: 10220000 .word 0x10220000
80059f0: 10210000 .word 0x10210000
80059f4: 10120000 .word 0x10120000
80059f8: 10110000 .word 0x10110000
80059fc: 40021000 .word 0x40021000
8005a00: 40010000 .word 0x40010000
8005a04: 40010800 .word 0x40010800
8005a08: 40010c00 .word 0x40010c00
8005a0c: 40011000 .word 0x40011000
8005a10: 40011400 .word 0x40011400
8005a14: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
8005a18: 4b0b ldr r3, [pc, #44] @ (8005a48 <HAL_GPIO_Init+0x304>)
8005a1a: 681a ldr r2, [r3, #0]
8005a1c: 69bb ldr r3, [r7, #24]
8005a1e: 43db mvns r3, r3
8005a20: 4909 ldr r1, [pc, #36] @ (8005a48 <HAL_GPIO_Init+0x304>)
8005a22: 4013 ands r3, r2
8005a24: 600b str r3, [r1, #0]
}
}
}
position++;
8005a26: 6a7b ldr r3, [r7, #36] @ 0x24
8005a28: 3301 adds r3, #1
8005a2a: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
8005a2c: 683b ldr r3, [r7, #0]
8005a2e: 681a ldr r2, [r3, #0]
8005a30: 6a7b ldr r3, [r7, #36] @ 0x24
8005a32: fa22 f303 lsr.w r3, r2, r3
8005a36: 2b00 cmp r3, #0
8005a38: f47f ae8e bne.w 8005758 <HAL_GPIO_Init+0x14>
}
}
8005a3c: bf00 nop
8005a3e: bf00 nop
8005a40: 372c adds r7, #44 @ 0x2c
8005a42: 46bd mov sp, r7
8005a44: bc80 pop {r7}
8005a46: 4770 bx lr
8005a48: 40010400 .word 0x40010400
08005a4c <HAL_GPIO_ReadPin>:
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8005a4c: b480 push {r7}
8005a4e: b085 sub sp, #20
8005a50: af00 add r7, sp, #0
8005a52: 6078 str r0, [r7, #4]
8005a54: 460b mov r3, r1
8005a56: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8005a58: 687b ldr r3, [r7, #4]
8005a5a: 689a ldr r2, [r3, #8]
8005a5c: 887b ldrh r3, [r7, #2]
8005a5e: 4013 ands r3, r2
8005a60: 2b00 cmp r3, #0
8005a62: d002 beq.n 8005a6a <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
8005a64: 2301 movs r3, #1
8005a66: 73fb strb r3, [r7, #15]
8005a68: e001 b.n 8005a6e <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
8005a6a: 2300 movs r3, #0
8005a6c: 73fb strb r3, [r7, #15]
}
return bitstatus;
8005a6e: 7bfb ldrb r3, [r7, #15]
}
8005a70: 4618 mov r0, r3
8005a72: 3714 adds r7, #20
8005a74: 46bd mov sp, r7
8005a76: bc80 pop {r7}
8005a78: 4770 bx lr
08005a7a <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8005a7a: b480 push {r7}
8005a7c: b083 sub sp, #12
8005a7e: af00 add r7, sp, #0
8005a80: 6078 str r0, [r7, #4]
8005a82: 460b mov r3, r1
8005a84: 807b strh r3, [r7, #2]
8005a86: 4613 mov r3, r2
8005a88: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8005a8a: 787b ldrb r3, [r7, #1]
8005a8c: 2b00 cmp r3, #0
8005a8e: d003 beq.n 8005a98 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8005a90: 887a ldrh r2, [r7, #2]
8005a92: 687b ldr r3, [r7, #4]
8005a94: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
8005a96: e003 b.n 8005aa0 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
8005a98: 887b ldrh r3, [r7, #2]
8005a9a: 041a lsls r2, r3, #16
8005a9c: 687b ldr r3, [r7, #4]
8005a9e: 611a str r2, [r3, #16]
}
8005aa0: bf00 nop
8005aa2: 370c adds r7, #12
8005aa4: 46bd mov sp, r7
8005aa6: bc80 pop {r7}
8005aa8: 4770 bx lr
08005aaa <HAL_GPIO_TogglePin>:
* @param GPIOx: where x can be (A..G depending on device used) to select the GPIO peripheral
* @param GPIO_Pin: Specifies the pins to be toggled.
* @retval None
*/
void HAL_GPIO_TogglePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8005aaa: b480 push {r7}
8005aac: b085 sub sp, #20
8005aae: af00 add r7, sp, #0
8005ab0: 6078 str r0, [r7, #4]
8005ab2: 460b mov r3, r1
8005ab4: 807b strh r3, [r7, #2]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
/* get current Output Data Register value */
odr = GPIOx->ODR;
8005ab6: 687b ldr r3, [r7, #4]
8005ab8: 68db ldr r3, [r3, #12]
8005aba: 60fb str r3, [r7, #12]
/* Set selected pins that were at low level, and reset ones that were high */
GPIOx->BSRR = ((odr & GPIO_Pin) << GPIO_NUMBER) | (~odr & GPIO_Pin);
8005abc: 887a ldrh r2, [r7, #2]
8005abe: 68fb ldr r3, [r7, #12]
8005ac0: 4013 ands r3, r2
8005ac2: 041a lsls r2, r3, #16
8005ac4: 68fb ldr r3, [r7, #12]
8005ac6: 43d9 mvns r1, r3
8005ac8: 887b ldrh r3, [r7, #2]
8005aca: 400b ands r3, r1
8005acc: 431a orrs r2, r3
8005ace: 687b ldr r3, [r7, #4]
8005ad0: 611a str r2, [r3, #16]
}
8005ad2: bf00 nop
8005ad4: 3714 adds r7, #20
8005ad6: 46bd mov sp, r7
8005ad8: bc80 pop {r7}
8005ada: 4770 bx lr
08005adc <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8005adc: b580 push {r7, lr}
8005ade: b084 sub sp, #16
8005ae0: af00 add r7, sp, #0
8005ae2: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
8005ae4: 687b ldr r3, [r7, #4]
8005ae6: 2b00 cmp r3, #0
8005ae8: d101 bne.n 8005aee <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8005aea: 2301 movs r3, #1
8005aec: e0e8 b.n 8005cc0 <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8005aee: 687b ldr r3, [r7, #4]
8005af0: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
8005af4: b2db uxtb r3, r3
8005af6: 2b00 cmp r3, #0
8005af8: d106 bne.n 8005b08 <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8005afa: 687b ldr r3, [r7, #4]
8005afc: 2200 movs r2, #0
8005afe: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8005b02: 6878 ldr r0, [r7, #4]
8005b04: f007 fc16 bl 800d334 <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
8005b08: 687b ldr r3, [r7, #4]
8005b0a: 2203 movs r2, #3
8005b0c: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8005b10: 687b ldr r3, [r7, #4]
8005b12: 2200 movs r2, #0
8005b14: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
8005b16: 687b ldr r3, [r7, #4]
8005b18: 681b ldr r3, [r3, #0]
8005b1a: 4618 mov r0, r3
8005b1c: f003 fabb bl 8009096 <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8005b20: 687b ldr r3, [r7, #4]
8005b22: 6818 ldr r0, [r3, #0]
8005b24: 687b ldr r3, [r7, #4]
8005b26: 3304 adds r3, #4
8005b28: cb0e ldmia r3, {r1, r2, r3}
8005b2a: f003 fa91 bl 8009050 <USB_CoreInit>
8005b2e: 4603 mov r3, r0
8005b30: 2b00 cmp r3, #0
8005b32: d005 beq.n 8005b40 <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8005b34: 687b ldr r3, [r7, #4]
8005b36: 2202 movs r2, #2
8005b38: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8005b3c: 2301 movs r3, #1
8005b3e: e0bf b.n 8005cc0 <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
8005b40: 687b ldr r3, [r7, #4]
8005b42: 681b ldr r3, [r3, #0]
8005b44: 2100 movs r1, #0
8005b46: 4618 mov r0, r3
8005b48: f003 fabf bl 80090ca <USB_SetCurrentMode>
8005b4c: 4603 mov r3, r0
8005b4e: 2b00 cmp r3, #0
8005b50: d005 beq.n 8005b5e <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8005b52: 687b ldr r3, [r7, #4]
8005b54: 2202 movs r2, #2
8005b56: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8005b5a: 2301 movs r3, #1
8005b5c: e0b0 b.n 8005cc0 <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8005b5e: 2300 movs r3, #0
8005b60: 73fb strb r3, [r7, #15]
8005b62: e03e b.n 8005be2 <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
8005b64: 7bfa ldrb r2, [r7, #15]
8005b66: 6879 ldr r1, [r7, #4]
8005b68: 4613 mov r3, r2
8005b6a: 009b lsls r3, r3, #2
8005b6c: 4413 add r3, r2
8005b6e: 00db lsls r3, r3, #3
8005b70: 440b add r3, r1
8005b72: 3311 adds r3, #17
8005b74: 2201 movs r2, #1
8005b76: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
8005b78: 7bfa ldrb r2, [r7, #15]
8005b7a: 6879 ldr r1, [r7, #4]
8005b7c: 4613 mov r3, r2
8005b7e: 009b lsls r3, r3, #2
8005b80: 4413 add r3, r2
8005b82: 00db lsls r3, r3, #3
8005b84: 440b add r3, r1
8005b86: 3310 adds r3, #16
8005b88: 7bfa ldrb r2, [r7, #15]
8005b8a: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8005b8c: 7bfa ldrb r2, [r7, #15]
8005b8e: 6879 ldr r1, [r7, #4]
8005b90: 4613 mov r3, r2
8005b92: 009b lsls r3, r3, #2
8005b94: 4413 add r3, r2
8005b96: 00db lsls r3, r3, #3
8005b98: 440b add r3, r1
8005b9a: 3313 adds r3, #19
8005b9c: 2200 movs r2, #0
8005b9e: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
8005ba0: 7bfa ldrb r2, [r7, #15]
8005ba2: 6879 ldr r1, [r7, #4]
8005ba4: 4613 mov r3, r2
8005ba6: 009b lsls r3, r3, #2
8005ba8: 4413 add r3, r2
8005baa: 00db lsls r3, r3, #3
8005bac: 440b add r3, r1
8005bae: 3320 adds r3, #32
8005bb0: 2200 movs r2, #0
8005bb2: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
8005bb4: 7bfa ldrb r2, [r7, #15]
8005bb6: 6879 ldr r1, [r7, #4]
8005bb8: 4613 mov r3, r2
8005bba: 009b lsls r3, r3, #2
8005bbc: 4413 add r3, r2
8005bbe: 00db lsls r3, r3, #3
8005bc0: 440b add r3, r1
8005bc2: 3324 adds r3, #36 @ 0x24
8005bc4: 2200 movs r2, #0
8005bc6: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
8005bc8: 7bfb ldrb r3, [r7, #15]
8005bca: 6879 ldr r1, [r7, #4]
8005bcc: 1c5a adds r2, r3, #1
8005bce: 4613 mov r3, r2
8005bd0: 009b lsls r3, r3, #2
8005bd2: 4413 add r3, r2
8005bd4: 00db lsls r3, r3, #3
8005bd6: 440b add r3, r1
8005bd8: 2200 movs r2, #0
8005bda: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8005bdc: 7bfb ldrb r3, [r7, #15]
8005bde: 3301 adds r3, #1
8005be0: 73fb strb r3, [r7, #15]
8005be2: 687b ldr r3, [r7, #4]
8005be4: 791b ldrb r3, [r3, #4]
8005be6: 7bfa ldrb r2, [r7, #15]
8005be8: 429a cmp r2, r3
8005bea: d3bb bcc.n 8005b64 <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8005bec: 2300 movs r3, #0
8005bee: 73fb strb r3, [r7, #15]
8005bf0: e044 b.n 8005c7c <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
8005bf2: 7bfa ldrb r2, [r7, #15]
8005bf4: 6879 ldr r1, [r7, #4]
8005bf6: 4613 mov r3, r2
8005bf8: 009b lsls r3, r3, #2
8005bfa: 4413 add r3, r2
8005bfc: 00db lsls r3, r3, #3
8005bfe: 440b add r3, r1
8005c00: f203 1351 addw r3, r3, #337 @ 0x151
8005c04: 2200 movs r2, #0
8005c06: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
8005c08: 7bfa ldrb r2, [r7, #15]
8005c0a: 6879 ldr r1, [r7, #4]
8005c0c: 4613 mov r3, r2
8005c0e: 009b lsls r3, r3, #2
8005c10: 4413 add r3, r2
8005c12: 00db lsls r3, r3, #3
8005c14: 440b add r3, r1
8005c16: f503 73a8 add.w r3, r3, #336 @ 0x150
8005c1a: 7bfa ldrb r2, [r7, #15]
8005c1c: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
8005c1e: 7bfa ldrb r2, [r7, #15]
8005c20: 6879 ldr r1, [r7, #4]
8005c22: 4613 mov r3, r2
8005c24: 009b lsls r3, r3, #2
8005c26: 4413 add r3, r2
8005c28: 00db lsls r3, r3, #3
8005c2a: 440b add r3, r1
8005c2c: f203 1353 addw r3, r3, #339 @ 0x153
8005c30: 2200 movs r2, #0
8005c32: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
8005c34: 7bfa ldrb r2, [r7, #15]
8005c36: 6879 ldr r1, [r7, #4]
8005c38: 4613 mov r3, r2
8005c3a: 009b lsls r3, r3, #2
8005c3c: 4413 add r3, r2
8005c3e: 00db lsls r3, r3, #3
8005c40: 440b add r3, r1
8005c42: f503 73b0 add.w r3, r3, #352 @ 0x160
8005c46: 2200 movs r2, #0
8005c48: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
8005c4a: 7bfa ldrb r2, [r7, #15]
8005c4c: 6879 ldr r1, [r7, #4]
8005c4e: 4613 mov r3, r2
8005c50: 009b lsls r3, r3, #2
8005c52: 4413 add r3, r2
8005c54: 00db lsls r3, r3, #3
8005c56: 440b add r3, r1
8005c58: f503 73b2 add.w r3, r3, #356 @ 0x164
8005c5c: 2200 movs r2, #0
8005c5e: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
8005c60: 7bfa ldrb r2, [r7, #15]
8005c62: 6879 ldr r1, [r7, #4]
8005c64: 4613 mov r3, r2
8005c66: 009b lsls r3, r3, #2
8005c68: 4413 add r3, r2
8005c6a: 00db lsls r3, r3, #3
8005c6c: 440b add r3, r1
8005c6e: f503 73b4 add.w r3, r3, #360 @ 0x168
8005c72: 2200 movs r2, #0
8005c74: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8005c76: 7bfb ldrb r3, [r7, #15]
8005c78: 3301 adds r3, #1
8005c7a: 73fb strb r3, [r7, #15]
8005c7c: 687b ldr r3, [r7, #4]
8005c7e: 791b ldrb r3, [r3, #4]
8005c80: 7bfa ldrb r2, [r7, #15]
8005c82: 429a cmp r2, r3
8005c84: d3b5 bcc.n 8005bf2 <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
8005c86: 687b ldr r3, [r7, #4]
8005c88: 6818 ldr r0, [r3, #0]
8005c8a: 687b ldr r3, [r7, #4]
8005c8c: 3304 adds r3, #4
8005c8e: cb0e ldmia r3, {r1, r2, r3}
8005c90: f003 fa27 bl 80090e2 <USB_DevInit>
8005c94: 4603 mov r3, r0
8005c96: 2b00 cmp r3, #0
8005c98: d005 beq.n 8005ca6 <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8005c9a: 687b ldr r3, [r7, #4]
8005c9c: 2202 movs r2, #2
8005c9e: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8005ca2: 2301 movs r3, #1
8005ca4: e00c b.n 8005cc0 <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
8005ca6: 687b ldr r3, [r7, #4]
8005ca8: 2200 movs r2, #0
8005caa: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
8005cac: 687b ldr r3, [r7, #4]
8005cae: 2201 movs r2, #1
8005cb0: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
8005cb4: 687b ldr r3, [r7, #4]
8005cb6: 681b ldr r3, [r3, #0]
8005cb8: 4618 mov r0, r3
8005cba: f005 fca6 bl 800b60a <USB_DevDisconnect>
return HAL_OK;
8005cbe: 2300 movs r3, #0
}
8005cc0: 4618 mov r0, r3
8005cc2: 3710 adds r7, #16
8005cc4: 46bd mov sp, r7
8005cc6: bd80 pop {r7, pc}
08005cc8 <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
8005cc8: b580 push {r7, lr}
8005cca: b082 sub sp, #8
8005ccc: af00 add r7, sp, #0
8005cce: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8005cd0: 687b ldr r3, [r7, #4]
8005cd2: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8005cd6: 2b01 cmp r3, #1
8005cd8: d101 bne.n 8005cde <HAL_PCD_Start+0x16>
8005cda: 2302 movs r3, #2
8005cdc: e016 b.n 8005d0c <HAL_PCD_Start+0x44>
8005cde: 687b ldr r3, [r7, #4]
8005ce0: 2201 movs r2, #1
8005ce2: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
8005ce6: 687b ldr r3, [r7, #4]
8005ce8: 681b ldr r3, [r3, #0]
8005cea: 4618 mov r0, r3
8005cec: f003 f9bd bl 800906a <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8005cf0: 2101 movs r1, #1
8005cf2: 6878 ldr r0, [r7, #4]
8005cf4: f007 fd91 bl 800d81a <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
8005cf8: 687b ldr r3, [r7, #4]
8005cfa: 681b ldr r3, [r3, #0]
8005cfc: 4618 mov r0, r3
8005cfe: f005 fc7a bl 800b5f6 <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8005d02: 687b ldr r3, [r7, #4]
8005d04: 2200 movs r2, #0
8005d06: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8005d0a: 2300 movs r3, #0
}
8005d0c: 4618 mov r0, r3
8005d0e: 3708 adds r7, #8
8005d10: 46bd mov sp, r7
8005d12: bd80 pop {r7, pc}
08005d14 <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
8005d14: b580 push {r7, lr}
8005d16: b088 sub sp, #32
8005d18: af00 add r7, sp, #0
8005d1a: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
8005d1c: 687b ldr r3, [r7, #4]
8005d1e: 681b ldr r3, [r3, #0]
8005d20: 4618 mov r0, r3
8005d22: f005 fc7c bl 800b61e <USB_ReadInterrupts>
8005d26: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
8005d28: 69bb ldr r3, [r7, #24]
8005d2a: f403 4300 and.w r3, r3, #32768 @ 0x8000
8005d2e: 2b00 cmp r3, #0
8005d30: d003 beq.n 8005d3a <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
8005d32: 6878 ldr r0, [r7, #4]
8005d34: f000 fb1a bl 800636c <PCD_EP_ISR_Handler>
return;
8005d38: e119 b.n 8005f6e <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
8005d3a: 69bb ldr r3, [r7, #24]
8005d3c: f403 6380 and.w r3, r3, #1024 @ 0x400
8005d40: 2b00 cmp r3, #0
8005d42: d013 beq.n 8005d6c <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8005d44: 687b ldr r3, [r7, #4]
8005d46: 681b ldr r3, [r3, #0]
8005d48: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005d4c: b29a uxth r2, r3
8005d4e: 687b ldr r3, [r7, #4]
8005d50: 681b ldr r3, [r3, #0]
8005d52: f422 6280 bic.w r2, r2, #1024 @ 0x400
8005d56: b292 uxth r2, r2
8005d58: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
8005d5c: 6878 ldr r0, [r7, #4]
8005d5e: f007 fb64 bl 800d42a <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
8005d62: 2100 movs r1, #0
8005d64: 6878 ldr r0, [r7, #4]
8005d66: f000 f905 bl 8005f74 <HAL_PCD_SetAddress>
return;
8005d6a: e100 b.n 8005f6e <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
8005d6c: 69bb ldr r3, [r7, #24]
8005d6e: f403 4380 and.w r3, r3, #16384 @ 0x4000
8005d72: 2b00 cmp r3, #0
8005d74: d00c beq.n 8005d90 <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
8005d76: 687b ldr r3, [r7, #4]
8005d78: 681b ldr r3, [r3, #0]
8005d7a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005d7e: b29a uxth r2, r3
8005d80: 687b ldr r3, [r7, #4]
8005d82: 681b ldr r3, [r3, #0]
8005d84: f422 4280 bic.w r2, r2, #16384 @ 0x4000
8005d88: b292 uxth r2, r2
8005d8a: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8005d8e: e0ee b.n 8005f6e <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
8005d90: 69bb ldr r3, [r7, #24]
8005d92: f403 5300 and.w r3, r3, #8192 @ 0x2000
8005d96: 2b00 cmp r3, #0
8005d98: d00c beq.n 8005db4 <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8005d9a: 687b ldr r3, [r7, #4]
8005d9c: 681b ldr r3, [r3, #0]
8005d9e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005da2: b29a uxth r2, r3
8005da4: 687b ldr r3, [r7, #4]
8005da6: 681b ldr r3, [r3, #0]
8005da8: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8005dac: b292 uxth r2, r2
8005dae: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8005db2: e0dc b.n 8005f6e <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
8005db4: 69bb ldr r3, [r7, #24]
8005db6: f403 5380 and.w r3, r3, #4096 @ 0x1000
8005dba: 2b00 cmp r3, #0
8005dbc: d027 beq.n 8005e0e <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8005dbe: 687b ldr r3, [r7, #4]
8005dc0: 681b ldr r3, [r3, #0]
8005dc2: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8005dc6: b29a uxth r2, r3
8005dc8: 687b ldr r3, [r7, #4]
8005dca: 681b ldr r3, [r3, #0]
8005dcc: f022 0204 bic.w r2, r2, #4
8005dd0: b292 uxth r2, r2
8005dd2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
8005dd6: 687b ldr r3, [r7, #4]
8005dd8: 681b ldr r3, [r3, #0]
8005dda: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8005dde: b29a uxth r2, r3
8005de0: 687b ldr r3, [r7, #4]
8005de2: 681b ldr r3, [r3, #0]
8005de4: f022 0208 bic.w r2, r2, #8
8005de8: b292 uxth r2, r2
8005dea: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8005dee: 6878 ldr r0, [r7, #4]
8005df0: f007 fb54 bl 800d49c <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
8005df4: 687b ldr r3, [r7, #4]
8005df6: 681b ldr r3, [r3, #0]
8005df8: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005dfc: b29a uxth r2, r3
8005dfe: 687b ldr r3, [r7, #4]
8005e00: 681b ldr r3, [r3, #0]
8005e02: f422 5280 bic.w r2, r2, #4096 @ 0x1000
8005e06: b292 uxth r2, r2
8005e08: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8005e0c: e0af b.n 8005f6e <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8005e0e: 69bb ldr r3, [r7, #24]
8005e10: f403 6300 and.w r3, r3, #2048 @ 0x800
8005e14: 2b00 cmp r3, #0
8005e16: f000 8083 beq.w 8005f20 <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
8005e1a: 2300 movs r3, #0
8005e1c: 77fb strb r3, [r7, #31]
8005e1e: e010 b.n 8005e42 <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
8005e20: 687b ldr r3, [r7, #4]
8005e22: 681b ldr r3, [r3, #0]
8005e24: 461a mov r2, r3
8005e26: 7ffb ldrb r3, [r7, #31]
8005e28: 009b lsls r3, r3, #2
8005e2a: 441a add r2, r3
8005e2c: 7ffb ldrb r3, [r7, #31]
8005e2e: 8812 ldrh r2, [r2, #0]
8005e30: b292 uxth r2, r2
8005e32: 005b lsls r3, r3, #1
8005e34: 3320 adds r3, #32
8005e36: 443b add r3, r7
8005e38: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
8005e3c: 7ffb ldrb r3, [r7, #31]
8005e3e: 3301 adds r3, #1
8005e40: 77fb strb r3, [r7, #31]
8005e42: 7ffb ldrb r3, [r7, #31]
8005e44: 2b07 cmp r3, #7
8005e46: d9eb bls.n 8005e20 <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
8005e48: 687b ldr r3, [r7, #4]
8005e4a: 681b ldr r3, [r3, #0]
8005e4c: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8005e50: b29a uxth r2, r3
8005e52: 687b ldr r3, [r7, #4]
8005e54: 681b ldr r3, [r3, #0]
8005e56: f042 0201 orr.w r2, r2, #1
8005e5a: b292 uxth r2, r2
8005e5c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
8005e60: 687b ldr r3, [r7, #4]
8005e62: 681b ldr r3, [r3, #0]
8005e64: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8005e68: b29a uxth r2, r3
8005e6a: 687b ldr r3, [r7, #4]
8005e6c: 681b ldr r3, [r3, #0]
8005e6e: f022 0201 bic.w r2, r2, #1
8005e72: b292 uxth r2, r2
8005e74: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
8005e78: bf00 nop
8005e7a: 687b ldr r3, [r7, #4]
8005e7c: 681b ldr r3, [r3, #0]
8005e7e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005e82: b29b uxth r3, r3
8005e84: f403 6380 and.w r3, r3, #1024 @ 0x400
8005e88: 2b00 cmp r3, #0
8005e8a: d0f6 beq.n 8005e7a <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8005e8c: 687b ldr r3, [r7, #4]
8005e8e: 681b ldr r3, [r3, #0]
8005e90: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005e94: b29a uxth r2, r3
8005e96: 687b ldr r3, [r7, #4]
8005e98: 681b ldr r3, [r3, #0]
8005e9a: f422 6280 bic.w r2, r2, #1024 @ 0x400
8005e9e: b292 uxth r2, r2
8005ea0: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
8005ea4: 2300 movs r3, #0
8005ea6: 77fb strb r3, [r7, #31]
8005ea8: e00f b.n 8005eca <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8005eaa: 7ffb ldrb r3, [r7, #31]
8005eac: 687a ldr r2, [r7, #4]
8005eae: 6812 ldr r2, [r2, #0]
8005eb0: 4611 mov r1, r2
8005eb2: 7ffa ldrb r2, [r7, #31]
8005eb4: 0092 lsls r2, r2, #2
8005eb6: 440a add r2, r1
8005eb8: 005b lsls r3, r3, #1
8005eba: 3320 adds r3, #32
8005ebc: 443b add r3, r7
8005ebe: f833 3c18 ldrh.w r3, [r3, #-24]
8005ec2: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
8005ec4: 7ffb ldrb r3, [r7, #31]
8005ec6: 3301 adds r3, #1
8005ec8: 77fb strb r3, [r7, #31]
8005eca: 7ffb ldrb r3, [r7, #31]
8005ecc: 2b07 cmp r3, #7
8005ece: d9ec bls.n 8005eaa <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8005ed0: 687b ldr r3, [r7, #4]
8005ed2: 681b ldr r3, [r3, #0]
8005ed4: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8005ed8: b29a uxth r2, r3
8005eda: 687b ldr r3, [r7, #4]
8005edc: 681b ldr r3, [r3, #0]
8005ede: f042 0208 orr.w r2, r2, #8
8005ee2: b292 uxth r2, r2
8005ee4: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
8005ee8: 687b ldr r3, [r7, #4]
8005eea: 681b ldr r3, [r3, #0]
8005eec: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005ef0: b29a uxth r2, r3
8005ef2: 687b ldr r3, [r7, #4]
8005ef4: 681b ldr r3, [r3, #0]
8005ef6: f422 6200 bic.w r2, r2, #2048 @ 0x800
8005efa: b292 uxth r2, r2
8005efc: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8005f00: 687b ldr r3, [r7, #4]
8005f02: 681b ldr r3, [r3, #0]
8005f04: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8005f08: b29a uxth r2, r3
8005f0a: 687b ldr r3, [r7, #4]
8005f0c: 681b ldr r3, [r3, #0]
8005f0e: f042 0204 orr.w r2, r2, #4
8005f12: b292 uxth r2, r2
8005f14: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
8005f18: 6878 ldr r0, [r7, #4]
8005f1a: f007 faa5 bl 800d468 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8005f1e: e026 b.n 8005f6e <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
8005f20: 69bb ldr r3, [r7, #24]
8005f22: f403 7300 and.w r3, r3, #512 @ 0x200
8005f26: 2b00 cmp r3, #0
8005f28: d00f beq.n 8005f4a <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
8005f2a: 687b ldr r3, [r7, #4]
8005f2c: 681b ldr r3, [r3, #0]
8005f2e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005f32: b29a uxth r2, r3
8005f34: 687b ldr r3, [r7, #4]
8005f36: 681b ldr r3, [r3, #0]
8005f38: f422 7200 bic.w r2, r2, #512 @ 0x200
8005f3c: b292 uxth r2, r2
8005f3e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
8005f42: 6878 ldr r0, [r7, #4]
8005f44: f007 fa63 bl 800d40e <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
8005f48: e011 b.n 8005f6e <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
8005f4a: 69bb ldr r3, [r7, #24]
8005f4c: f403 7380 and.w r3, r3, #256 @ 0x100
8005f50: 2b00 cmp r3, #0
8005f52: d00c beq.n 8005f6e <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
8005f54: 687b ldr r3, [r7, #4]
8005f56: 681b ldr r3, [r3, #0]
8005f58: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8005f5c: b29a uxth r2, r3
8005f5e: 687b ldr r3, [r7, #4]
8005f60: 681b ldr r3, [r3, #0]
8005f62: f422 7280 bic.w r2, r2, #256 @ 0x100
8005f66: b292 uxth r2, r2
8005f68: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8005f6c: bf00 nop
}
}
8005f6e: 3720 adds r7, #32
8005f70: 46bd mov sp, r7
8005f72: bd80 pop {r7, pc}
08005f74 <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
8005f74: b580 push {r7, lr}
8005f76: b082 sub sp, #8
8005f78: af00 add r7, sp, #0
8005f7a: 6078 str r0, [r7, #4]
8005f7c: 460b mov r3, r1
8005f7e: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8005f80: 687b ldr r3, [r7, #4]
8005f82: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8005f86: 2b01 cmp r3, #1
8005f88: d101 bne.n 8005f8e <HAL_PCD_SetAddress+0x1a>
8005f8a: 2302 movs r3, #2
8005f8c: e012 b.n 8005fb4 <HAL_PCD_SetAddress+0x40>
8005f8e: 687b ldr r3, [r7, #4]
8005f90: 2201 movs r2, #1
8005f92: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8005f96: 687b ldr r3, [r7, #4]
8005f98: 78fa ldrb r2, [r7, #3]
8005f9a: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8005f9c: 687b ldr r3, [r7, #4]
8005f9e: 681b ldr r3, [r3, #0]
8005fa0: 78fa ldrb r2, [r7, #3]
8005fa2: 4611 mov r1, r2
8005fa4: 4618 mov r0, r3
8005fa6: f005 fb13 bl 800b5d0 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8005faa: 687b ldr r3, [r7, #4]
8005fac: 2200 movs r2, #0
8005fae: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8005fb2: 2300 movs r3, #0
}
8005fb4: 4618 mov r0, r3
8005fb6: 3708 adds r7, #8
8005fb8: 46bd mov sp, r7
8005fba: bd80 pop {r7, pc}
08005fbc <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8005fbc: b580 push {r7, lr}
8005fbe: b084 sub sp, #16
8005fc0: af00 add r7, sp, #0
8005fc2: 6078 str r0, [r7, #4]
8005fc4: 4608 mov r0, r1
8005fc6: 4611 mov r1, r2
8005fc8: 461a mov r2, r3
8005fca: 4603 mov r3, r0
8005fcc: 70fb strb r3, [r7, #3]
8005fce: 460b mov r3, r1
8005fd0: 803b strh r3, [r7, #0]
8005fd2: 4613 mov r3, r2
8005fd4: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8005fd6: 2300 movs r3, #0
8005fd8: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8005fda: f997 3003 ldrsb.w r3, [r7, #3]
8005fde: 2b00 cmp r3, #0
8005fe0: da0e bge.n 8006000 <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8005fe2: 78fb ldrb r3, [r7, #3]
8005fe4: f003 0207 and.w r2, r3, #7
8005fe8: 4613 mov r3, r2
8005fea: 009b lsls r3, r3, #2
8005fec: 4413 add r3, r2
8005fee: 00db lsls r3, r3, #3
8005ff0: 3310 adds r3, #16
8005ff2: 687a ldr r2, [r7, #4]
8005ff4: 4413 add r3, r2
8005ff6: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8005ff8: 68fb ldr r3, [r7, #12]
8005ffa: 2201 movs r2, #1
8005ffc: 705a strb r2, [r3, #1]
8005ffe: e00e b.n 800601e <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006000: 78fb ldrb r3, [r7, #3]
8006002: f003 0207 and.w r2, r3, #7
8006006: 4613 mov r3, r2
8006008: 009b lsls r3, r3, #2
800600a: 4413 add r3, r2
800600c: 00db lsls r3, r3, #3
800600e: f503 73a8 add.w r3, r3, #336 @ 0x150
8006012: 687a ldr r2, [r7, #4]
8006014: 4413 add r3, r2
8006016: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006018: 68fb ldr r3, [r7, #12]
800601a: 2200 movs r2, #0
800601c: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
800601e: 78fb ldrb r3, [r7, #3]
8006020: f003 0307 and.w r3, r3, #7
8006024: b2da uxtb r2, r3
8006026: 68fb ldr r3, [r7, #12]
8006028: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
800602a: 883a ldrh r2, [r7, #0]
800602c: 68fb ldr r3, [r7, #12]
800602e: 611a str r2, [r3, #16]
ep->type = ep_type;
8006030: 68fb ldr r3, [r7, #12]
8006032: 78ba ldrb r2, [r7, #2]
8006034: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8006036: 78bb ldrb r3, [r7, #2]
8006038: 2b02 cmp r3, #2
800603a: d102 bne.n 8006042 <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
800603c: 68fb ldr r3, [r7, #12]
800603e: 2200 movs r2, #0
8006040: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8006042: 687b ldr r3, [r7, #4]
8006044: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006048: 2b01 cmp r3, #1
800604a: d101 bne.n 8006050 <HAL_PCD_EP_Open+0x94>
800604c: 2302 movs r3, #2
800604e: e00e b.n 800606e <HAL_PCD_EP_Open+0xb2>
8006050: 687b ldr r3, [r7, #4]
8006052: 2201 movs r2, #1
8006054: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8006058: 687b ldr r3, [r7, #4]
800605a: 681b ldr r3, [r3, #0]
800605c: 68f9 ldr r1, [r7, #12]
800605e: 4618 mov r0, r3
8006060: f003 f85c bl 800911c <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8006064: 687b ldr r3, [r7, #4]
8006066: 2200 movs r2, #0
8006068: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
800606c: 7afb ldrb r3, [r7, #11]
}
800606e: 4618 mov r0, r3
8006070: 3710 adds r7, #16
8006072: 46bd mov sp, r7
8006074: bd80 pop {r7, pc}
08006076 <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006076: b580 push {r7, lr}
8006078: b084 sub sp, #16
800607a: af00 add r7, sp, #0
800607c: 6078 str r0, [r7, #4]
800607e: 460b mov r3, r1
8006080: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006082: f997 3003 ldrsb.w r3, [r7, #3]
8006086: 2b00 cmp r3, #0
8006088: da0e bge.n 80060a8 <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800608a: 78fb ldrb r3, [r7, #3]
800608c: f003 0207 and.w r2, r3, #7
8006090: 4613 mov r3, r2
8006092: 009b lsls r3, r3, #2
8006094: 4413 add r3, r2
8006096: 00db lsls r3, r3, #3
8006098: 3310 adds r3, #16
800609a: 687a ldr r2, [r7, #4]
800609c: 4413 add r3, r2
800609e: 60fb str r3, [r7, #12]
ep->is_in = 1U;
80060a0: 68fb ldr r3, [r7, #12]
80060a2: 2201 movs r2, #1
80060a4: 705a strb r2, [r3, #1]
80060a6: e00e b.n 80060c6 <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
80060a8: 78fb ldrb r3, [r7, #3]
80060aa: f003 0207 and.w r2, r3, #7
80060ae: 4613 mov r3, r2
80060b0: 009b lsls r3, r3, #2
80060b2: 4413 add r3, r2
80060b4: 00db lsls r3, r3, #3
80060b6: f503 73a8 add.w r3, r3, #336 @ 0x150
80060ba: 687a ldr r2, [r7, #4]
80060bc: 4413 add r3, r2
80060be: 60fb str r3, [r7, #12]
ep->is_in = 0U;
80060c0: 68fb ldr r3, [r7, #12]
80060c2: 2200 movs r2, #0
80060c4: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
80060c6: 78fb ldrb r3, [r7, #3]
80060c8: f003 0307 and.w r3, r3, #7
80060cc: b2da uxtb r2, r3
80060ce: 68fb ldr r3, [r7, #12]
80060d0: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
80060d2: 687b ldr r3, [r7, #4]
80060d4: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
80060d8: 2b01 cmp r3, #1
80060da: d101 bne.n 80060e0 <HAL_PCD_EP_Close+0x6a>
80060dc: 2302 movs r3, #2
80060de: e00e b.n 80060fe <HAL_PCD_EP_Close+0x88>
80060e0: 687b ldr r3, [r7, #4]
80060e2: 2201 movs r2, #1
80060e4: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
80060e8: 687b ldr r3, [r7, #4]
80060ea: 681b ldr r3, [r3, #0]
80060ec: 68f9 ldr r1, [r7, #12]
80060ee: 4618 mov r0, r3
80060f0: f003 fbd4 bl 800989c <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
80060f4: 687b ldr r3, [r7, #4]
80060f6: 2200 movs r2, #0
80060f8: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80060fc: 2300 movs r3, #0
}
80060fe: 4618 mov r0, r3
8006100: 3710 adds r7, #16
8006102: 46bd mov sp, r7
8006104: bd80 pop {r7, pc}
08006106 <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006106: b580 push {r7, lr}
8006108: b086 sub sp, #24
800610a: af00 add r7, sp, #0
800610c: 60f8 str r0, [r7, #12]
800610e: 607a str r2, [r7, #4]
8006110: 603b str r3, [r7, #0]
8006112: 460b mov r3, r1
8006114: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006116: 7afb ldrb r3, [r7, #11]
8006118: f003 0207 and.w r2, r3, #7
800611c: 4613 mov r3, r2
800611e: 009b lsls r3, r3, #2
8006120: 4413 add r3, r2
8006122: 00db lsls r3, r3, #3
8006124: f503 73a8 add.w r3, r3, #336 @ 0x150
8006128: 68fa ldr r2, [r7, #12]
800612a: 4413 add r3, r2
800612c: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
800612e: 697b ldr r3, [r7, #20]
8006130: 687a ldr r2, [r7, #4]
8006132: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006134: 697b ldr r3, [r7, #20]
8006136: 683a ldr r2, [r7, #0]
8006138: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
800613a: 697b ldr r3, [r7, #20]
800613c: 2200 movs r2, #0
800613e: 61da str r2, [r3, #28]
ep->is_in = 0U;
8006140: 697b ldr r3, [r7, #20]
8006142: 2200 movs r2, #0
8006144: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006146: 7afb ldrb r3, [r7, #11]
8006148: f003 0307 and.w r3, r3, #7
800614c: b2da uxtb r2, r3
800614e: 697b ldr r3, [r7, #20]
8006150: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006152: 68fb ldr r3, [r7, #12]
8006154: 681b ldr r3, [r3, #0]
8006156: 6979 ldr r1, [r7, #20]
8006158: 4618 mov r0, r3
800615a: f003 fd8b bl 8009c74 <USB_EPStartXfer>
return HAL_OK;
800615e: 2300 movs r3, #0
}
8006160: 4618 mov r0, r3
8006162: 3718 adds r7, #24
8006164: 46bd mov sp, r7
8006166: bd80 pop {r7, pc}
08006168 <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8006168: b480 push {r7}
800616a: b083 sub sp, #12
800616c: af00 add r7, sp, #0
800616e: 6078 str r0, [r7, #4]
8006170: 460b mov r3, r1
8006172: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8006174: 78fb ldrb r3, [r7, #3]
8006176: f003 0207 and.w r2, r3, #7
800617a: 6879 ldr r1, [r7, #4]
800617c: 4613 mov r3, r2
800617e: 009b lsls r3, r3, #2
8006180: 4413 add r3, r2
8006182: 00db lsls r3, r3, #3
8006184: 440b add r3, r1
8006186: f503 73b6 add.w r3, r3, #364 @ 0x16c
800618a: 681b ldr r3, [r3, #0]
}
800618c: 4618 mov r0, r3
800618e: 370c adds r7, #12
8006190: 46bd mov sp, r7
8006192: bc80 pop {r7}
8006194: 4770 bx lr
08006196 <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006196: b580 push {r7, lr}
8006198: b086 sub sp, #24
800619a: af00 add r7, sp, #0
800619c: 60f8 str r0, [r7, #12]
800619e: 607a str r2, [r7, #4]
80061a0: 603b str r3, [r7, #0]
80061a2: 460b mov r3, r1
80061a4: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80061a6: 7afb ldrb r3, [r7, #11]
80061a8: f003 0207 and.w r2, r3, #7
80061ac: 4613 mov r3, r2
80061ae: 009b lsls r3, r3, #2
80061b0: 4413 add r3, r2
80061b2: 00db lsls r3, r3, #3
80061b4: 3310 adds r3, #16
80061b6: 68fa ldr r2, [r7, #12]
80061b8: 4413 add r3, r2
80061ba: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
80061bc: 697b ldr r3, [r7, #20]
80061be: 687a ldr r2, [r7, #4]
80061c0: 615a str r2, [r3, #20]
ep->xfer_len = len;
80061c2: 697b ldr r3, [r7, #20]
80061c4: 683a ldr r2, [r7, #0]
80061c6: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
80061c8: 697b ldr r3, [r7, #20]
80061ca: 2201 movs r2, #1
80061cc: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
80061d0: 697b ldr r3, [r7, #20]
80061d2: 683a ldr r2, [r7, #0]
80061d4: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
80061d6: 697b ldr r3, [r7, #20]
80061d8: 2200 movs r2, #0
80061da: 61da str r2, [r3, #28]
ep->is_in = 1U;
80061dc: 697b ldr r3, [r7, #20]
80061de: 2201 movs r2, #1
80061e0: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
80061e2: 7afb ldrb r3, [r7, #11]
80061e4: f003 0307 and.w r3, r3, #7
80061e8: b2da uxtb r2, r3
80061ea: 697b ldr r3, [r7, #20]
80061ec: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
80061ee: 68fb ldr r3, [r7, #12]
80061f0: 681b ldr r3, [r3, #0]
80061f2: 6979 ldr r1, [r7, #20]
80061f4: 4618 mov r0, r3
80061f6: f003 fd3d bl 8009c74 <USB_EPStartXfer>
return HAL_OK;
80061fa: 2300 movs r3, #0
}
80061fc: 4618 mov r0, r3
80061fe: 3718 adds r7, #24
8006200: 46bd mov sp, r7
8006202: bd80 pop {r7, pc}
08006204 <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006204: b580 push {r7, lr}
8006206: b084 sub sp, #16
8006208: af00 add r7, sp, #0
800620a: 6078 str r0, [r7, #4]
800620c: 460b mov r3, r1
800620e: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8006210: 78fb ldrb r3, [r7, #3]
8006212: f003 0307 and.w r3, r3, #7
8006216: 687a ldr r2, [r7, #4]
8006218: 7912 ldrb r2, [r2, #4]
800621a: 4293 cmp r3, r2
800621c: d901 bls.n 8006222 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
800621e: 2301 movs r3, #1
8006220: e04c b.n 80062bc <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8006222: f997 3003 ldrsb.w r3, [r7, #3]
8006226: 2b00 cmp r3, #0
8006228: da0e bge.n 8006248 <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
800622a: 78fb ldrb r3, [r7, #3]
800622c: f003 0207 and.w r2, r3, #7
8006230: 4613 mov r3, r2
8006232: 009b lsls r3, r3, #2
8006234: 4413 add r3, r2
8006236: 00db lsls r3, r3, #3
8006238: 3310 adds r3, #16
800623a: 687a ldr r2, [r7, #4]
800623c: 4413 add r3, r2
800623e: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006240: 68fb ldr r3, [r7, #12]
8006242: 2201 movs r2, #1
8006244: 705a strb r2, [r3, #1]
8006246: e00c b.n 8006262 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8006248: 78fa ldrb r2, [r7, #3]
800624a: 4613 mov r3, r2
800624c: 009b lsls r3, r3, #2
800624e: 4413 add r3, r2
8006250: 00db lsls r3, r3, #3
8006252: f503 73a8 add.w r3, r3, #336 @ 0x150
8006256: 687a ldr r2, [r7, #4]
8006258: 4413 add r3, r2
800625a: 60fb str r3, [r7, #12]
ep->is_in = 0U;
800625c: 68fb ldr r3, [r7, #12]
800625e: 2200 movs r2, #0
8006260: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8006262: 68fb ldr r3, [r7, #12]
8006264: 2201 movs r2, #1
8006266: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006268: 78fb ldrb r3, [r7, #3]
800626a: f003 0307 and.w r3, r3, #7
800626e: b2da uxtb r2, r3
8006270: 68fb ldr r3, [r7, #12]
8006272: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006274: 687b ldr r3, [r7, #4]
8006276: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
800627a: 2b01 cmp r3, #1
800627c: d101 bne.n 8006282 <HAL_PCD_EP_SetStall+0x7e>
800627e: 2302 movs r3, #2
8006280: e01c b.n 80062bc <HAL_PCD_EP_SetStall+0xb8>
8006282: 687b ldr r3, [r7, #4]
8006284: 2201 movs r2, #1
8006286: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
800628a: 687b ldr r3, [r7, #4]
800628c: 681b ldr r3, [r3, #0]
800628e: 68f9 ldr r1, [r7, #12]
8006290: 4618 mov r0, r3
8006292: f005 f8a0 bl 800b3d6 <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8006296: 78fb ldrb r3, [r7, #3]
8006298: f003 0307 and.w r3, r3, #7
800629c: 2b00 cmp r3, #0
800629e: d108 bne.n 80062b2 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
80062a0: 687b ldr r3, [r7, #4]
80062a2: 681a ldr r2, [r3, #0]
80062a4: 687b ldr r3, [r7, #4]
80062a6: f503 7326 add.w r3, r3, #664 @ 0x298
80062aa: 4619 mov r1, r3
80062ac: 4610 mov r0, r2
80062ae: f005 f9c5 bl 800b63c <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
80062b2: 687b ldr r3, [r7, #4]
80062b4: 2200 movs r2, #0
80062b6: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
80062ba: 2300 movs r3, #0
}
80062bc: 4618 mov r0, r3
80062be: 3710 adds r7, #16
80062c0: 46bd mov sp, r7
80062c2: bd80 pop {r7, pc}
080062c4 <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
80062c4: b580 push {r7, lr}
80062c6: b084 sub sp, #16
80062c8: af00 add r7, sp, #0
80062ca: 6078 str r0, [r7, #4]
80062cc: 460b mov r3, r1
80062ce: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
80062d0: 78fb ldrb r3, [r7, #3]
80062d2: f003 030f and.w r3, r3, #15
80062d6: 687a ldr r2, [r7, #4]
80062d8: 7912 ldrb r2, [r2, #4]
80062da: 4293 cmp r3, r2
80062dc: d901 bls.n 80062e2 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
80062de: 2301 movs r3, #1
80062e0: e040 b.n 8006364 <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
80062e2: f997 3003 ldrsb.w r3, [r7, #3]
80062e6: 2b00 cmp r3, #0
80062e8: da0e bge.n 8006308 <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
80062ea: 78fb ldrb r3, [r7, #3]
80062ec: f003 0207 and.w r2, r3, #7
80062f0: 4613 mov r3, r2
80062f2: 009b lsls r3, r3, #2
80062f4: 4413 add r3, r2
80062f6: 00db lsls r3, r3, #3
80062f8: 3310 adds r3, #16
80062fa: 687a ldr r2, [r7, #4]
80062fc: 4413 add r3, r2
80062fe: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006300: 68fb ldr r3, [r7, #12]
8006302: 2201 movs r2, #1
8006304: 705a strb r2, [r3, #1]
8006306: e00e b.n 8006326 <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006308: 78fb ldrb r3, [r7, #3]
800630a: f003 0207 and.w r2, r3, #7
800630e: 4613 mov r3, r2
8006310: 009b lsls r3, r3, #2
8006312: 4413 add r3, r2
8006314: 00db lsls r3, r3, #3
8006316: f503 73a8 add.w r3, r3, #336 @ 0x150
800631a: 687a ldr r2, [r7, #4]
800631c: 4413 add r3, r2
800631e: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006320: 68fb ldr r3, [r7, #12]
8006322: 2200 movs r2, #0
8006324: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8006326: 68fb ldr r3, [r7, #12]
8006328: 2200 movs r2, #0
800632a: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
800632c: 78fb ldrb r3, [r7, #3]
800632e: f003 0307 and.w r3, r3, #7
8006332: b2da uxtb r2, r3
8006334: 68fb ldr r3, [r7, #12]
8006336: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006338: 687b ldr r3, [r7, #4]
800633a: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
800633e: 2b01 cmp r3, #1
8006340: d101 bne.n 8006346 <HAL_PCD_EP_ClrStall+0x82>
8006342: 2302 movs r3, #2
8006344: e00e b.n 8006364 <HAL_PCD_EP_ClrStall+0xa0>
8006346: 687b ldr r3, [r7, #4]
8006348: 2201 movs r2, #1
800634a: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
800634e: 687b ldr r3, [r7, #4]
8006350: 681b ldr r3, [r3, #0]
8006352: 68f9 ldr r1, [r7, #12]
8006354: 4618 mov r0, r3
8006356: f005 f88e bl 800b476 <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
800635a: 687b ldr r3, [r7, #4]
800635c: 2200 movs r2, #0
800635e: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006362: 2300 movs r3, #0
}
8006364: 4618 mov r0, r3
8006366: 3710 adds r7, #16
8006368: 46bd mov sp, r7
800636a: bd80 pop {r7, pc}
0800636c <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
800636c: b580 push {r7, lr}
800636e: b096 sub sp, #88 @ 0x58
8006370: af00 add r7, sp, #0
8006372: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8006374: e3bb b.n 8006aee <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8006376: 687b ldr r3, [r7, #4]
8006378: 681b ldr r3, [r3, #0]
800637a: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800637e: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
8006382: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006386: b2db uxtb r3, r3
8006388: f003 030f and.w r3, r3, #15
800638c: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
8006390: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006394: 2b00 cmp r3, #0
8006396: f040 8175 bne.w 8006684 <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
800639a: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800639e: f003 0310 and.w r3, r3, #16
80063a2: 2b00 cmp r3, #0
80063a4: d14e bne.n 8006444 <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80063a6: 687b ldr r3, [r7, #4]
80063a8: 681b ldr r3, [r3, #0]
80063aa: 881b ldrh r3, [r3, #0]
80063ac: b29b uxth r3, r3
80063ae: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
80063b2: f023 0370 bic.w r3, r3, #112 @ 0x70
80063b6: 81fb strh r3, [r7, #14]
80063b8: 687b ldr r3, [r7, #4]
80063ba: 681a ldr r2, [r3, #0]
80063bc: 89fb ldrh r3, [r7, #14]
80063be: ea6f 4343 mvn.w r3, r3, lsl #17
80063c2: ea6f 4353 mvn.w r3, r3, lsr #17
80063c6: b29b uxth r3, r3
80063c8: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
80063ca: 687b ldr r3, [r7, #4]
80063cc: 3310 adds r3, #16
80063ce: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
80063d0: 687b ldr r3, [r7, #4]
80063d2: 681b ldr r3, [r3, #0]
80063d4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80063d8: b29b uxth r3, r3
80063da: 461a mov r2, r3
80063dc: 6d7b ldr r3, [r7, #84] @ 0x54
80063de: 781b ldrb r3, [r3, #0]
80063e0: 00db lsls r3, r3, #3
80063e2: 4413 add r3, r2
80063e4: 3302 adds r3, #2
80063e6: 005b lsls r3, r3, #1
80063e8: 687a ldr r2, [r7, #4]
80063ea: 6812 ldr r2, [r2, #0]
80063ec: 4413 add r3, r2
80063ee: f503 6380 add.w r3, r3, #1024 @ 0x400
80063f2: 881b ldrh r3, [r3, #0]
80063f4: f3c3 0209 ubfx r2, r3, #0, #10
80063f8: 6d7b ldr r3, [r7, #84] @ 0x54
80063fa: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
80063fc: 6d7b ldr r3, [r7, #84] @ 0x54
80063fe: 695a ldr r2, [r3, #20]
8006400: 6d7b ldr r3, [r7, #84] @ 0x54
8006402: 69db ldr r3, [r3, #28]
8006404: 441a add r2, r3
8006406: 6d7b ldr r3, [r7, #84] @ 0x54
8006408: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
800640a: 2100 movs r1, #0
800640c: 6878 ldr r0, [r7, #4]
800640e: f006 ffe4 bl 800d3da <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
8006412: 687b ldr r3, [r7, #4]
8006414: 7b5b ldrb r3, [r3, #13]
8006416: b2db uxtb r3, r3
8006418: 2b00 cmp r3, #0
800641a: f000 8368 beq.w 8006aee <PCD_EP_ISR_Handler+0x782>
800641e: 6d7b ldr r3, [r7, #84] @ 0x54
8006420: 699b ldr r3, [r3, #24]
8006422: 2b00 cmp r3, #0
8006424: f040 8363 bne.w 8006aee <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8006428: 687b ldr r3, [r7, #4]
800642a: 7b5b ldrb r3, [r3, #13]
800642c: b2db uxtb r3, r3
800642e: f063 037f orn r3, r3, #127 @ 0x7f
8006432: b2da uxtb r2, r3
8006434: 687b ldr r3, [r7, #4]
8006436: 681b ldr r3, [r3, #0]
8006438: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
800643c: 687b ldr r3, [r7, #4]
800643e: 2200 movs r2, #0
8006440: 735a strb r2, [r3, #13]
8006442: e354 b.n 8006aee <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
8006444: 687b ldr r3, [r7, #4]
8006446: f503 73a8 add.w r3, r3, #336 @ 0x150
800644a: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
800644c: 687b ldr r3, [r7, #4]
800644e: 681b ldr r3, [r3, #0]
8006450: 881b ldrh r3, [r3, #0]
8006452: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
8006456: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800645a: f403 6300 and.w r3, r3, #2048 @ 0x800
800645e: 2b00 cmp r3, #0
8006460: d034 beq.n 80064cc <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8006462: 687b ldr r3, [r7, #4]
8006464: 681b ldr r3, [r3, #0]
8006466: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800646a: b29b uxth r3, r3
800646c: 461a mov r2, r3
800646e: 6d7b ldr r3, [r7, #84] @ 0x54
8006470: 781b ldrb r3, [r3, #0]
8006472: 00db lsls r3, r3, #3
8006474: 4413 add r3, r2
8006476: 3306 adds r3, #6
8006478: 005b lsls r3, r3, #1
800647a: 687a ldr r2, [r7, #4]
800647c: 6812 ldr r2, [r2, #0]
800647e: 4413 add r3, r2
8006480: f503 6380 add.w r3, r3, #1024 @ 0x400
8006484: 881b ldrh r3, [r3, #0]
8006486: f3c3 0209 ubfx r2, r3, #0, #10
800648a: 6d7b ldr r3, [r7, #84] @ 0x54
800648c: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
800648e: 687b ldr r3, [r7, #4]
8006490: 6818 ldr r0, [r3, #0]
8006492: 687b ldr r3, [r7, #4]
8006494: f503 7126 add.w r1, r3, #664 @ 0x298
8006498: 6d7b ldr r3, [r7, #84] @ 0x54
800649a: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
800649c: 6d7b ldr r3, [r7, #84] @ 0x54
800649e: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
80064a0: b29b uxth r3, r3
80064a2: f005 f91c bl 800b6de <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80064a6: 687b ldr r3, [r7, #4]
80064a8: 681b ldr r3, [r3, #0]
80064aa: 881b ldrh r3, [r3, #0]
80064ac: b29a uxth r2, r3
80064ae: f640 738f movw r3, #3983 @ 0xf8f
80064b2: 4013 ands r3, r2
80064b4: 823b strh r3, [r7, #16]
80064b6: 687b ldr r3, [r7, #4]
80064b8: 681b ldr r3, [r3, #0]
80064ba: 8a3a ldrh r2, [r7, #16]
80064bc: f042 0280 orr.w r2, r2, #128 @ 0x80
80064c0: b292 uxth r2, r2
80064c2: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
80064c4: 6878 ldr r0, [r7, #4]
80064c6: f006 ff5b bl 800d380 <HAL_PCD_SetupStageCallback>
80064ca: e310 b.n 8006aee <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
80064cc: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
80064d0: 2b00 cmp r3, #0
80064d2: f280 830c bge.w 8006aee <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
80064d6: 687b ldr r3, [r7, #4]
80064d8: 681b ldr r3, [r3, #0]
80064da: 881b ldrh r3, [r3, #0]
80064dc: b29a uxth r2, r3
80064de: f640 738f movw r3, #3983 @ 0xf8f
80064e2: 4013 ands r3, r2
80064e4: 83fb strh r3, [r7, #30]
80064e6: 687b ldr r3, [r7, #4]
80064e8: 681b ldr r3, [r3, #0]
80064ea: 8bfa ldrh r2, [r7, #30]
80064ec: f042 0280 orr.w r2, r2, #128 @ 0x80
80064f0: b292 uxth r2, r2
80064f2: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80064f4: 687b ldr r3, [r7, #4]
80064f6: 681b ldr r3, [r3, #0]
80064f8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80064fc: b29b uxth r3, r3
80064fe: 461a mov r2, r3
8006500: 6d7b ldr r3, [r7, #84] @ 0x54
8006502: 781b ldrb r3, [r3, #0]
8006504: 00db lsls r3, r3, #3
8006506: 4413 add r3, r2
8006508: 3306 adds r3, #6
800650a: 005b lsls r3, r3, #1
800650c: 687a ldr r2, [r7, #4]
800650e: 6812 ldr r2, [r2, #0]
8006510: 4413 add r3, r2
8006512: f503 6380 add.w r3, r3, #1024 @ 0x400
8006516: 881b ldrh r3, [r3, #0]
8006518: f3c3 0209 ubfx r2, r3, #0, #10
800651c: 6d7b ldr r3, [r7, #84] @ 0x54
800651e: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
8006520: 6d7b ldr r3, [r7, #84] @ 0x54
8006522: 69db ldr r3, [r3, #28]
8006524: 2b00 cmp r3, #0
8006526: d019 beq.n 800655c <PCD_EP_ISR_Handler+0x1f0>
8006528: 6d7b ldr r3, [r7, #84] @ 0x54
800652a: 695b ldr r3, [r3, #20]
800652c: 2b00 cmp r3, #0
800652e: d015 beq.n 800655c <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8006530: 687b ldr r3, [r7, #4]
8006532: 6818 ldr r0, [r3, #0]
8006534: 6d7b ldr r3, [r7, #84] @ 0x54
8006536: 6959 ldr r1, [r3, #20]
8006538: 6d7b ldr r3, [r7, #84] @ 0x54
800653a: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
800653c: 6d7b ldr r3, [r7, #84] @ 0x54
800653e: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8006540: b29b uxth r3, r3
8006542: f005 f8cc bl 800b6de <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
8006546: 6d7b ldr r3, [r7, #84] @ 0x54
8006548: 695a ldr r2, [r3, #20]
800654a: 6d7b ldr r3, [r7, #84] @ 0x54
800654c: 69db ldr r3, [r3, #28]
800654e: 441a add r2, r3
8006550: 6d7b ldr r3, [r7, #84] @ 0x54
8006552: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
8006554: 2100 movs r1, #0
8006556: 6878 ldr r0, [r7, #4]
8006558: f006 ff24 bl 800d3a4 <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
800655c: 687b ldr r3, [r7, #4]
800655e: 681b ldr r3, [r3, #0]
8006560: 881b ldrh r3, [r3, #0]
8006562: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8006566: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800656a: f403 6300 and.w r3, r3, #2048 @ 0x800
800656e: 2b00 cmp r3, #0
8006570: f040 82bd bne.w 8006aee <PCD_EP_ISR_Handler+0x782>
8006574: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006578: f403 5340 and.w r3, r3, #12288 @ 0x3000
800657c: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
8006580: f000 82b5 beq.w 8006aee <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
8006584: 687b ldr r3, [r7, #4]
8006586: 681b ldr r3, [r3, #0]
8006588: 61bb str r3, [r7, #24]
800658a: 687b ldr r3, [r7, #4]
800658c: 681b ldr r3, [r3, #0]
800658e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006592: b29b uxth r3, r3
8006594: 461a mov r2, r3
8006596: 69bb ldr r3, [r7, #24]
8006598: 4413 add r3, r2
800659a: 61bb str r3, [r7, #24]
800659c: 69bb ldr r3, [r7, #24]
800659e: f203 430c addw r3, r3, #1036 @ 0x40c
80065a2: 617b str r3, [r7, #20]
80065a4: 697b ldr r3, [r7, #20]
80065a6: 881b ldrh r3, [r3, #0]
80065a8: b29b uxth r3, r3
80065aa: f3c3 0309 ubfx r3, r3, #0, #10
80065ae: b29a uxth r2, r3
80065b0: 697b ldr r3, [r7, #20]
80065b2: 801a strh r2, [r3, #0]
80065b4: 6d7b ldr r3, [r7, #84] @ 0x54
80065b6: 691b ldr r3, [r3, #16]
80065b8: 2b3e cmp r3, #62 @ 0x3e
80065ba: d91d bls.n 80065f8 <PCD_EP_ISR_Handler+0x28c>
80065bc: 6d7b ldr r3, [r7, #84] @ 0x54
80065be: 691b ldr r3, [r3, #16]
80065c0: 095b lsrs r3, r3, #5
80065c2: 647b str r3, [r7, #68] @ 0x44
80065c4: 6d7b ldr r3, [r7, #84] @ 0x54
80065c6: 691b ldr r3, [r3, #16]
80065c8: f003 031f and.w r3, r3, #31
80065cc: 2b00 cmp r3, #0
80065ce: d102 bne.n 80065d6 <PCD_EP_ISR_Handler+0x26a>
80065d0: 6c7b ldr r3, [r7, #68] @ 0x44
80065d2: 3b01 subs r3, #1
80065d4: 647b str r3, [r7, #68] @ 0x44
80065d6: 697b ldr r3, [r7, #20]
80065d8: 881b ldrh r3, [r3, #0]
80065da: b29a uxth r2, r3
80065dc: 6c7b ldr r3, [r7, #68] @ 0x44
80065de: b29b uxth r3, r3
80065e0: 029b lsls r3, r3, #10
80065e2: b29b uxth r3, r3
80065e4: 4313 orrs r3, r2
80065e6: b29b uxth r3, r3
80065e8: ea6f 4343 mvn.w r3, r3, lsl #17
80065ec: ea6f 4353 mvn.w r3, r3, lsr #17
80065f0: b29a uxth r2, r3
80065f2: 697b ldr r3, [r7, #20]
80065f4: 801a strh r2, [r3, #0]
80065f6: e026 b.n 8006646 <PCD_EP_ISR_Handler+0x2da>
80065f8: 6d7b ldr r3, [r7, #84] @ 0x54
80065fa: 691b ldr r3, [r3, #16]
80065fc: 2b00 cmp r3, #0
80065fe: d10a bne.n 8006616 <PCD_EP_ISR_Handler+0x2aa>
8006600: 697b ldr r3, [r7, #20]
8006602: 881b ldrh r3, [r3, #0]
8006604: b29b uxth r3, r3
8006606: ea6f 4343 mvn.w r3, r3, lsl #17
800660a: ea6f 4353 mvn.w r3, r3, lsr #17
800660e: b29a uxth r2, r3
8006610: 697b ldr r3, [r7, #20]
8006612: 801a strh r2, [r3, #0]
8006614: e017 b.n 8006646 <PCD_EP_ISR_Handler+0x2da>
8006616: 6d7b ldr r3, [r7, #84] @ 0x54
8006618: 691b ldr r3, [r3, #16]
800661a: 085b lsrs r3, r3, #1
800661c: 647b str r3, [r7, #68] @ 0x44
800661e: 6d7b ldr r3, [r7, #84] @ 0x54
8006620: 691b ldr r3, [r3, #16]
8006622: f003 0301 and.w r3, r3, #1
8006626: 2b00 cmp r3, #0
8006628: d002 beq.n 8006630 <PCD_EP_ISR_Handler+0x2c4>
800662a: 6c7b ldr r3, [r7, #68] @ 0x44
800662c: 3301 adds r3, #1
800662e: 647b str r3, [r7, #68] @ 0x44
8006630: 697b ldr r3, [r7, #20]
8006632: 881b ldrh r3, [r3, #0]
8006634: b29a uxth r2, r3
8006636: 6c7b ldr r3, [r7, #68] @ 0x44
8006638: b29b uxth r3, r3
800663a: 029b lsls r3, r3, #10
800663c: b29b uxth r3, r3
800663e: 4313 orrs r3, r2
8006640: b29a uxth r2, r3
8006642: 697b ldr r3, [r7, #20]
8006644: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
8006646: 687b ldr r3, [r7, #4]
8006648: 681b ldr r3, [r3, #0]
800664a: 881b ldrh r3, [r3, #0]
800664c: b29b uxth r3, r3
800664e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006652: f023 0370 bic.w r3, r3, #112 @ 0x70
8006656: 827b strh r3, [r7, #18]
8006658: 8a7b ldrh r3, [r7, #18]
800665a: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800665e: 827b strh r3, [r7, #18]
8006660: 8a7b ldrh r3, [r7, #18]
8006662: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006666: 827b strh r3, [r7, #18]
8006668: 687b ldr r3, [r7, #4]
800666a: 681a ldr r2, [r3, #0]
800666c: 8a7b ldrh r3, [r7, #18]
800666e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006672: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006676: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800667a: f043 0380 orr.w r3, r3, #128 @ 0x80
800667e: b29b uxth r3, r3
8006680: 8013 strh r3, [r2, #0]
8006682: e234 b.n 8006aee <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
8006684: 687b ldr r3, [r7, #4]
8006686: 681b ldr r3, [r3, #0]
8006688: 461a mov r2, r3
800668a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800668e: 009b lsls r3, r3, #2
8006690: 4413 add r3, r2
8006692: 881b ldrh r3, [r3, #0]
8006694: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
8006698: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
800669c: 2b00 cmp r3, #0
800669e: f280 80fc bge.w 800689a <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
80066a2: 687b ldr r3, [r7, #4]
80066a4: 681b ldr r3, [r3, #0]
80066a6: 461a mov r2, r3
80066a8: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80066ac: 009b lsls r3, r3, #2
80066ae: 4413 add r3, r2
80066b0: 881b ldrh r3, [r3, #0]
80066b2: b29a uxth r2, r3
80066b4: f640 738f movw r3, #3983 @ 0xf8f
80066b8: 4013 ands r3, r2
80066ba: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80066be: 687b ldr r3, [r7, #4]
80066c0: 681b ldr r3, [r3, #0]
80066c2: 461a mov r2, r3
80066c4: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80066c8: 009b lsls r3, r3, #2
80066ca: 4413 add r3, r2
80066cc: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
80066d0: f042 0280 orr.w r2, r2, #128 @ 0x80
80066d4: b292 uxth r2, r2
80066d6: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
80066d8: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80066dc: 4613 mov r3, r2
80066de: 009b lsls r3, r3, #2
80066e0: 4413 add r3, r2
80066e2: 00db lsls r3, r3, #3
80066e4: f503 73a8 add.w r3, r3, #336 @ 0x150
80066e8: 687a ldr r2, [r7, #4]
80066ea: 4413 add r3, r2
80066ec: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
80066ee: 6d7b ldr r3, [r7, #84] @ 0x54
80066f0: 7b1b ldrb r3, [r3, #12]
80066f2: 2b00 cmp r3, #0
80066f4: d125 bne.n 8006742 <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
80066f6: 687b ldr r3, [r7, #4]
80066f8: 681b ldr r3, [r3, #0]
80066fa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80066fe: b29b uxth r3, r3
8006700: 461a mov r2, r3
8006702: 6d7b ldr r3, [r7, #84] @ 0x54
8006704: 781b ldrb r3, [r3, #0]
8006706: 00db lsls r3, r3, #3
8006708: 4413 add r3, r2
800670a: 3306 adds r3, #6
800670c: 005b lsls r3, r3, #1
800670e: 687a ldr r2, [r7, #4]
8006710: 6812 ldr r2, [r2, #0]
8006712: 4413 add r3, r2
8006714: f503 6380 add.w r3, r3, #1024 @ 0x400
8006718: 881b ldrh r3, [r3, #0]
800671a: f3c3 0309 ubfx r3, r3, #0, #10
800671e: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8006722: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006726: 2b00 cmp r3, #0
8006728: f000 8092 beq.w 8006850 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
800672c: 687b ldr r3, [r7, #4]
800672e: 6818 ldr r0, [r3, #0]
8006730: 6d7b ldr r3, [r7, #84] @ 0x54
8006732: 6959 ldr r1, [r3, #20]
8006734: 6d7b ldr r3, [r7, #84] @ 0x54
8006736: 88da ldrh r2, [r3, #6]
8006738: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800673c: f004 ffcf bl 800b6de <USB_ReadPMA>
8006740: e086 b.n 8006850 <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
8006742: 6d7b ldr r3, [r7, #84] @ 0x54
8006744: 78db ldrb r3, [r3, #3]
8006746: 2b02 cmp r3, #2
8006748: d10a bne.n 8006760 <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
800674a: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800674e: 461a mov r2, r3
8006750: 6d79 ldr r1, [r7, #84] @ 0x54
8006752: 6878 ldr r0, [r7, #4]
8006754: f000 f9d9 bl 8006b0a <HAL_PCD_EP_DB_Receive>
8006758: 4603 mov r3, r0
800675a: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
800675e: e077 b.n 8006850 <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8006760: 687b ldr r3, [r7, #4]
8006762: 681b ldr r3, [r3, #0]
8006764: 461a mov r2, r3
8006766: 6d7b ldr r3, [r7, #84] @ 0x54
8006768: 781b ldrb r3, [r3, #0]
800676a: 009b lsls r3, r3, #2
800676c: 4413 add r3, r2
800676e: 881b ldrh r3, [r3, #0]
8006770: b29b uxth r3, r3
8006772: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006776: f023 0370 bic.w r3, r3, #112 @ 0x70
800677a: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
800677e: 687b ldr r3, [r7, #4]
8006780: 681b ldr r3, [r3, #0]
8006782: 461a mov r2, r3
8006784: 6d7b ldr r3, [r7, #84] @ 0x54
8006786: 781b ldrb r3, [r3, #0]
8006788: 009b lsls r3, r3, #2
800678a: 441a add r2, r3
800678c: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
8006790: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006794: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006798: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800679c: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80067a0: b29b uxth r3, r3
80067a2: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
80067a4: 687b ldr r3, [r7, #4]
80067a6: 681b ldr r3, [r3, #0]
80067a8: 461a mov r2, r3
80067aa: 6d7b ldr r3, [r7, #84] @ 0x54
80067ac: 781b ldrb r3, [r3, #0]
80067ae: 009b lsls r3, r3, #2
80067b0: 4413 add r3, r2
80067b2: 881b ldrh r3, [r3, #0]
80067b4: b29b uxth r3, r3
80067b6: f403 4380 and.w r3, r3, #16384 @ 0x4000
80067ba: 2b00 cmp r3, #0
80067bc: d024 beq.n 8006808 <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80067be: 687b ldr r3, [r7, #4]
80067c0: 681b ldr r3, [r3, #0]
80067c2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80067c6: b29b uxth r3, r3
80067c8: 461a mov r2, r3
80067ca: 6d7b ldr r3, [r7, #84] @ 0x54
80067cc: 781b ldrb r3, [r3, #0]
80067ce: 00db lsls r3, r3, #3
80067d0: 4413 add r3, r2
80067d2: 3302 adds r3, #2
80067d4: 005b lsls r3, r3, #1
80067d6: 687a ldr r2, [r7, #4]
80067d8: 6812 ldr r2, [r2, #0]
80067da: 4413 add r3, r2
80067dc: f503 6380 add.w r3, r3, #1024 @ 0x400
80067e0: 881b ldrh r3, [r3, #0]
80067e2: f3c3 0309 ubfx r3, r3, #0, #10
80067e6: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80067ea: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80067ee: 2b00 cmp r3, #0
80067f0: d02e beq.n 8006850 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
80067f2: 687b ldr r3, [r7, #4]
80067f4: 6818 ldr r0, [r3, #0]
80067f6: 6d7b ldr r3, [r7, #84] @ 0x54
80067f8: 6959 ldr r1, [r3, #20]
80067fa: 6d7b ldr r3, [r7, #84] @ 0x54
80067fc: 891a ldrh r2, [r3, #8]
80067fe: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006802: f004 ff6c bl 800b6de <USB_ReadPMA>
8006806: e023 b.n 8006850 <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8006808: 687b ldr r3, [r7, #4]
800680a: 681b ldr r3, [r3, #0]
800680c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006810: b29b uxth r3, r3
8006812: 461a mov r2, r3
8006814: 6d7b ldr r3, [r7, #84] @ 0x54
8006816: 781b ldrb r3, [r3, #0]
8006818: 00db lsls r3, r3, #3
800681a: 4413 add r3, r2
800681c: 3306 adds r3, #6
800681e: 005b lsls r3, r3, #1
8006820: 687a ldr r2, [r7, #4]
8006822: 6812 ldr r2, [r2, #0]
8006824: 4413 add r3, r2
8006826: f503 6380 add.w r3, r3, #1024 @ 0x400
800682a: 881b ldrh r3, [r3, #0]
800682c: f3c3 0309 ubfx r3, r3, #0, #10
8006830: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8006834: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006838: 2b00 cmp r3, #0
800683a: d009 beq.n 8006850 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
800683c: 687b ldr r3, [r7, #4]
800683e: 6818 ldr r0, [r3, #0]
8006840: 6d7b ldr r3, [r7, #84] @ 0x54
8006842: 6959 ldr r1, [r3, #20]
8006844: 6d7b ldr r3, [r7, #84] @ 0x54
8006846: 895a ldrh r2, [r3, #10]
8006848: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
800684c: f004 ff47 bl 800b6de <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
8006850: 6d7b ldr r3, [r7, #84] @ 0x54
8006852: 69da ldr r2, [r3, #28]
8006854: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006858: 441a add r2, r3
800685a: 6d7b ldr r3, [r7, #84] @ 0x54
800685c: 61da str r2, [r3, #28]
ep->xfer_buff += count;
800685e: 6d7b ldr r3, [r7, #84] @ 0x54
8006860: 695a ldr r2, [r3, #20]
8006862: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8006866: 441a add r2, r3
8006868: 6d7b ldr r3, [r7, #84] @ 0x54
800686a: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
800686c: 6d7b ldr r3, [r7, #84] @ 0x54
800686e: 699b ldr r3, [r3, #24]
8006870: 2b00 cmp r3, #0
8006872: d005 beq.n 8006880 <PCD_EP_ISR_Handler+0x514>
8006874: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
8006878: 6d7b ldr r3, [r7, #84] @ 0x54
800687a: 691b ldr r3, [r3, #16]
800687c: 429a cmp r2, r3
800687e: d206 bcs.n 800688e <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
8006880: 6d7b ldr r3, [r7, #84] @ 0x54
8006882: 781b ldrb r3, [r3, #0]
8006884: 4619 mov r1, r3
8006886: 6878 ldr r0, [r7, #4]
8006888: f006 fd8c bl 800d3a4 <HAL_PCD_DataOutStageCallback>
800688c: e005 b.n 800689a <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
800688e: 687b ldr r3, [r7, #4]
8006890: 681b ldr r3, [r3, #0]
8006892: 6d79 ldr r1, [r7, #84] @ 0x54
8006894: 4618 mov r0, r3
8006896: f003 f9ed bl 8009c74 <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
800689a: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800689e: f003 0380 and.w r3, r3, #128 @ 0x80
80068a2: 2b00 cmp r3, #0
80068a4: f000 8123 beq.w 8006aee <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
80068a8: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
80068ac: 4613 mov r3, r2
80068ae: 009b lsls r3, r3, #2
80068b0: 4413 add r3, r2
80068b2: 00db lsls r3, r3, #3
80068b4: 3310 adds r3, #16
80068b6: 687a ldr r2, [r7, #4]
80068b8: 4413 add r3, r2
80068ba: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
80068bc: 687b ldr r3, [r7, #4]
80068be: 681b ldr r3, [r3, #0]
80068c0: 461a mov r2, r3
80068c2: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80068c6: 009b lsls r3, r3, #2
80068c8: 4413 add r3, r2
80068ca: 881b ldrh r3, [r3, #0]
80068cc: b29b uxth r3, r3
80068ce: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
80068d2: f023 0370 bic.w r3, r3, #112 @ 0x70
80068d6: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
80068da: 687b ldr r3, [r7, #4]
80068dc: 681b ldr r3, [r3, #0]
80068de: 461a mov r2, r3
80068e0: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
80068e4: 009b lsls r3, r3, #2
80068e6: 441a add r2, r3
80068e8: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
80068ec: ea6f 4343 mvn.w r3, r3, lsl #17
80068f0: ea6f 4353 mvn.w r3, r3, lsr #17
80068f4: b29b uxth r3, r3
80068f6: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
80068f8: 6d7b ldr r3, [r7, #84] @ 0x54
80068fa: 78db ldrb r3, [r3, #3]
80068fc: 2b01 cmp r3, #1
80068fe: f040 80a2 bne.w 8006a46 <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
8006902: 6d7b ldr r3, [r7, #84] @ 0x54
8006904: 2200 movs r2, #0
8006906: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
8006908: 6d7b ldr r3, [r7, #84] @ 0x54
800690a: 7b1b ldrb r3, [r3, #12]
800690c: 2b00 cmp r3, #0
800690e: f000 8093 beq.w 8006a38 <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8006912: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006916: f003 0340 and.w r3, r3, #64 @ 0x40
800691a: 2b00 cmp r3, #0
800691c: d046 beq.n 80069ac <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800691e: 6d7b ldr r3, [r7, #84] @ 0x54
8006920: 785b ldrb r3, [r3, #1]
8006922: 2b00 cmp r3, #0
8006924: d126 bne.n 8006974 <PCD_EP_ISR_Handler+0x608>
8006926: 687b ldr r3, [r7, #4]
8006928: 681b ldr r3, [r3, #0]
800692a: 627b str r3, [r7, #36] @ 0x24
800692c: 687b ldr r3, [r7, #4]
800692e: 681b ldr r3, [r3, #0]
8006930: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006934: b29b uxth r3, r3
8006936: 461a mov r2, r3
8006938: 6a7b ldr r3, [r7, #36] @ 0x24
800693a: 4413 add r3, r2
800693c: 627b str r3, [r7, #36] @ 0x24
800693e: 6d7b ldr r3, [r7, #84] @ 0x54
8006940: 781b ldrb r3, [r3, #0]
8006942: 011a lsls r2, r3, #4
8006944: 6a7b ldr r3, [r7, #36] @ 0x24
8006946: 4413 add r3, r2
8006948: f203 4304 addw r3, r3, #1028 @ 0x404
800694c: 623b str r3, [r7, #32]
800694e: 6a3b ldr r3, [r7, #32]
8006950: 881b ldrh r3, [r3, #0]
8006952: b29b uxth r3, r3
8006954: f3c3 0309 ubfx r3, r3, #0, #10
8006958: b29a uxth r2, r3
800695a: 6a3b ldr r3, [r7, #32]
800695c: 801a strh r2, [r3, #0]
800695e: 6a3b ldr r3, [r7, #32]
8006960: 881b ldrh r3, [r3, #0]
8006962: b29b uxth r3, r3
8006964: ea6f 4343 mvn.w r3, r3, lsl #17
8006968: ea6f 4353 mvn.w r3, r3, lsr #17
800696c: b29a uxth r2, r3
800696e: 6a3b ldr r3, [r7, #32]
8006970: 801a strh r2, [r3, #0]
8006972: e061 b.n 8006a38 <PCD_EP_ISR_Handler+0x6cc>
8006974: 6d7b ldr r3, [r7, #84] @ 0x54
8006976: 785b ldrb r3, [r3, #1]
8006978: 2b01 cmp r3, #1
800697a: d15d bne.n 8006a38 <PCD_EP_ISR_Handler+0x6cc>
800697c: 687b ldr r3, [r7, #4]
800697e: 681b ldr r3, [r3, #0]
8006980: 62fb str r3, [r7, #44] @ 0x2c
8006982: 687b ldr r3, [r7, #4]
8006984: 681b ldr r3, [r3, #0]
8006986: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800698a: b29b uxth r3, r3
800698c: 461a mov r2, r3
800698e: 6afb ldr r3, [r7, #44] @ 0x2c
8006990: 4413 add r3, r2
8006992: 62fb str r3, [r7, #44] @ 0x2c
8006994: 6d7b ldr r3, [r7, #84] @ 0x54
8006996: 781b ldrb r3, [r3, #0]
8006998: 011a lsls r2, r3, #4
800699a: 6afb ldr r3, [r7, #44] @ 0x2c
800699c: 4413 add r3, r2
800699e: f203 4304 addw r3, r3, #1028 @ 0x404
80069a2: 62bb str r3, [r7, #40] @ 0x28
80069a4: 6abb ldr r3, [r7, #40] @ 0x28
80069a6: 2200 movs r2, #0
80069a8: 801a strh r2, [r3, #0]
80069aa: e045 b.n 8006a38 <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80069ac: 687b ldr r3, [r7, #4]
80069ae: 681b ldr r3, [r3, #0]
80069b0: 63fb str r3, [r7, #60] @ 0x3c
80069b2: 6d7b ldr r3, [r7, #84] @ 0x54
80069b4: 785b ldrb r3, [r3, #1]
80069b6: 2b00 cmp r3, #0
80069b8: d126 bne.n 8006a08 <PCD_EP_ISR_Handler+0x69c>
80069ba: 687b ldr r3, [r7, #4]
80069bc: 681b ldr r3, [r3, #0]
80069be: 637b str r3, [r7, #52] @ 0x34
80069c0: 687b ldr r3, [r7, #4]
80069c2: 681b ldr r3, [r3, #0]
80069c4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80069c8: b29b uxth r3, r3
80069ca: 461a mov r2, r3
80069cc: 6b7b ldr r3, [r7, #52] @ 0x34
80069ce: 4413 add r3, r2
80069d0: 637b str r3, [r7, #52] @ 0x34
80069d2: 6d7b ldr r3, [r7, #84] @ 0x54
80069d4: 781b ldrb r3, [r3, #0]
80069d6: 011a lsls r2, r3, #4
80069d8: 6b7b ldr r3, [r7, #52] @ 0x34
80069da: 4413 add r3, r2
80069dc: f203 430c addw r3, r3, #1036 @ 0x40c
80069e0: 633b str r3, [r7, #48] @ 0x30
80069e2: 6b3b ldr r3, [r7, #48] @ 0x30
80069e4: 881b ldrh r3, [r3, #0]
80069e6: b29b uxth r3, r3
80069e8: f3c3 0309 ubfx r3, r3, #0, #10
80069ec: b29a uxth r2, r3
80069ee: 6b3b ldr r3, [r7, #48] @ 0x30
80069f0: 801a strh r2, [r3, #0]
80069f2: 6b3b ldr r3, [r7, #48] @ 0x30
80069f4: 881b ldrh r3, [r3, #0]
80069f6: b29b uxth r3, r3
80069f8: ea6f 4343 mvn.w r3, r3, lsl #17
80069fc: ea6f 4353 mvn.w r3, r3, lsr #17
8006a00: b29a uxth r2, r3
8006a02: 6b3b ldr r3, [r7, #48] @ 0x30
8006a04: 801a strh r2, [r3, #0]
8006a06: e017 b.n 8006a38 <PCD_EP_ISR_Handler+0x6cc>
8006a08: 6d7b ldr r3, [r7, #84] @ 0x54
8006a0a: 785b ldrb r3, [r3, #1]
8006a0c: 2b01 cmp r3, #1
8006a0e: d113 bne.n 8006a38 <PCD_EP_ISR_Handler+0x6cc>
8006a10: 687b ldr r3, [r7, #4]
8006a12: 681b ldr r3, [r3, #0]
8006a14: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006a18: b29b uxth r3, r3
8006a1a: 461a mov r2, r3
8006a1c: 6bfb ldr r3, [r7, #60] @ 0x3c
8006a1e: 4413 add r3, r2
8006a20: 63fb str r3, [r7, #60] @ 0x3c
8006a22: 6d7b ldr r3, [r7, #84] @ 0x54
8006a24: 781b ldrb r3, [r3, #0]
8006a26: 011a lsls r2, r3, #4
8006a28: 6bfb ldr r3, [r7, #60] @ 0x3c
8006a2a: 4413 add r3, r2
8006a2c: f203 430c addw r3, r3, #1036 @ 0x40c
8006a30: 63bb str r3, [r7, #56] @ 0x38
8006a32: 6bbb ldr r3, [r7, #56] @ 0x38
8006a34: 2200 movs r2, #0
8006a36: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8006a38: 6d7b ldr r3, [r7, #84] @ 0x54
8006a3a: 781b ldrb r3, [r3, #0]
8006a3c: 4619 mov r1, r3
8006a3e: 6878 ldr r0, [r7, #4]
8006a40: f006 fccb bl 800d3da <HAL_PCD_DataInStageCallback>
8006a44: e053 b.n 8006aee <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
8006a46: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006a4a: f403 7380 and.w r3, r3, #256 @ 0x100
8006a4e: 2b00 cmp r3, #0
8006a50: d146 bne.n 8006ae0 <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8006a52: 687b ldr r3, [r7, #4]
8006a54: 681b ldr r3, [r3, #0]
8006a56: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006a5a: b29b uxth r3, r3
8006a5c: 461a mov r2, r3
8006a5e: 6d7b ldr r3, [r7, #84] @ 0x54
8006a60: 781b ldrb r3, [r3, #0]
8006a62: 00db lsls r3, r3, #3
8006a64: 4413 add r3, r2
8006a66: 3302 adds r3, #2
8006a68: 005b lsls r3, r3, #1
8006a6a: 687a ldr r2, [r7, #4]
8006a6c: 6812 ldr r2, [r2, #0]
8006a6e: 4413 add r3, r2
8006a70: f503 6380 add.w r3, r3, #1024 @ 0x400
8006a74: 881b ldrh r3, [r3, #0]
8006a76: f3c3 0309 ubfx r3, r3, #0, #10
8006a7a: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8006a7e: 6d7b ldr r3, [r7, #84] @ 0x54
8006a80: 699a ldr r2, [r3, #24]
8006a82: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006a86: 429a cmp r2, r3
8006a88: d907 bls.n 8006a9a <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
8006a8a: 6d7b ldr r3, [r7, #84] @ 0x54
8006a8c: 699a ldr r2, [r3, #24]
8006a8e: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006a92: 1ad2 subs r2, r2, r3
8006a94: 6d7b ldr r3, [r7, #84] @ 0x54
8006a96: 619a str r2, [r3, #24]
8006a98: e002 b.n 8006aa0 <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
8006a9a: 6d7b ldr r3, [r7, #84] @ 0x54
8006a9c: 2200 movs r2, #0
8006a9e: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8006aa0: 6d7b ldr r3, [r7, #84] @ 0x54
8006aa2: 699b ldr r3, [r3, #24]
8006aa4: 2b00 cmp r3, #0
8006aa6: d106 bne.n 8006ab6 <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8006aa8: 6d7b ldr r3, [r7, #84] @ 0x54
8006aaa: 781b ldrb r3, [r3, #0]
8006aac: 4619 mov r1, r3
8006aae: 6878 ldr r0, [r7, #4]
8006ab0: f006 fc93 bl 800d3da <HAL_PCD_DataInStageCallback>
8006ab4: e01b b.n 8006aee <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
8006ab6: 6d7b ldr r3, [r7, #84] @ 0x54
8006ab8: 695a ldr r2, [r3, #20]
8006aba: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006abe: 441a add r2, r3
8006ac0: 6d7b ldr r3, [r7, #84] @ 0x54
8006ac2: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8006ac4: 6d7b ldr r3, [r7, #84] @ 0x54
8006ac6: 69da ldr r2, [r3, #28]
8006ac8: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8006acc: 441a add r2, r3
8006ace: 6d7b ldr r3, [r7, #84] @ 0x54
8006ad0: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006ad2: 687b ldr r3, [r7, #4]
8006ad4: 681b ldr r3, [r3, #0]
8006ad6: 6d79 ldr r1, [r7, #84] @ 0x54
8006ad8: 4618 mov r0, r3
8006ada: f003 f8cb bl 8009c74 <USB_EPStartXfer>
8006ade: e006 b.n 8006aee <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8006ae0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006ae4: 461a mov r2, r3
8006ae6: 6d79 ldr r1, [r7, #84] @ 0x54
8006ae8: 6878 ldr r0, [r7, #4]
8006aea: f000 f91b bl 8006d24 <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8006aee: 687b ldr r3, [r7, #4]
8006af0: 681b ldr r3, [r3, #0]
8006af2: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006af6: b29b uxth r3, r3
8006af8: b21b sxth r3, r3
8006afa: 2b00 cmp r3, #0
8006afc: f6ff ac3b blt.w 8006376 <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8006b00: 2300 movs r3, #0
}
8006b02: 4618 mov r0, r3
8006b04: 3758 adds r7, #88 @ 0x58
8006b06: 46bd mov sp, r7
8006b08: bd80 pop {r7, pc}
08006b0a <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8006b0a: b580 push {r7, lr}
8006b0c: b088 sub sp, #32
8006b0e: af00 add r7, sp, #0
8006b10: 60f8 str r0, [r7, #12]
8006b12: 60b9 str r1, [r7, #8]
8006b14: 4613 mov r3, r2
8006b16: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8006b18: 88fb ldrh r3, [r7, #6]
8006b1a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006b1e: 2b00 cmp r3, #0
8006b20: d07e beq.n 8006c20 <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8006b22: 68fb ldr r3, [r7, #12]
8006b24: 681b ldr r3, [r3, #0]
8006b26: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006b2a: b29b uxth r3, r3
8006b2c: 461a mov r2, r3
8006b2e: 68bb ldr r3, [r7, #8]
8006b30: 781b ldrb r3, [r3, #0]
8006b32: 00db lsls r3, r3, #3
8006b34: 4413 add r3, r2
8006b36: 3302 adds r3, #2
8006b38: 005b lsls r3, r3, #1
8006b3a: 68fa ldr r2, [r7, #12]
8006b3c: 6812 ldr r2, [r2, #0]
8006b3e: 4413 add r3, r2
8006b40: f503 6380 add.w r3, r3, #1024 @ 0x400
8006b44: 881b ldrh r3, [r3, #0]
8006b46: f3c3 0309 ubfx r3, r3, #0, #10
8006b4a: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8006b4c: 68bb ldr r3, [r7, #8]
8006b4e: 699a ldr r2, [r3, #24]
8006b50: 8b7b ldrh r3, [r7, #26]
8006b52: 429a cmp r2, r3
8006b54: d306 bcc.n 8006b64 <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
8006b56: 68bb ldr r3, [r7, #8]
8006b58: 699a ldr r2, [r3, #24]
8006b5a: 8b7b ldrh r3, [r7, #26]
8006b5c: 1ad2 subs r2, r2, r3
8006b5e: 68bb ldr r3, [r7, #8]
8006b60: 619a str r2, [r3, #24]
8006b62: e002 b.n 8006b6a <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
8006b64: 68bb ldr r3, [r7, #8]
8006b66: 2200 movs r2, #0
8006b68: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8006b6a: 68bb ldr r3, [r7, #8]
8006b6c: 699b ldr r3, [r3, #24]
8006b6e: 2b00 cmp r3, #0
8006b70: d123 bne.n 8006bba <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8006b72: 68fb ldr r3, [r7, #12]
8006b74: 681b ldr r3, [r3, #0]
8006b76: 461a mov r2, r3
8006b78: 68bb ldr r3, [r7, #8]
8006b7a: 781b ldrb r3, [r3, #0]
8006b7c: 009b lsls r3, r3, #2
8006b7e: 4413 add r3, r2
8006b80: 881b ldrh r3, [r3, #0]
8006b82: b29b uxth r3, r3
8006b84: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006b88: f023 0370 bic.w r3, r3, #112 @ 0x70
8006b8c: 833b strh r3, [r7, #24]
8006b8e: 8b3b ldrh r3, [r7, #24]
8006b90: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006b94: 833b strh r3, [r7, #24]
8006b96: 68fb ldr r3, [r7, #12]
8006b98: 681b ldr r3, [r3, #0]
8006b9a: 461a mov r2, r3
8006b9c: 68bb ldr r3, [r7, #8]
8006b9e: 781b ldrb r3, [r3, #0]
8006ba0: 009b lsls r3, r3, #2
8006ba2: 441a add r2, r3
8006ba4: 8b3b ldrh r3, [r7, #24]
8006ba6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006baa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006bae: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006bb2: f043 0380 orr.w r3, r3, #128 @ 0x80
8006bb6: b29b uxth r3, r3
8006bb8: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8006bba: 88fb ldrh r3, [r7, #6]
8006bbc: f003 0340 and.w r3, r3, #64 @ 0x40
8006bc0: 2b00 cmp r3, #0
8006bc2: d01f beq.n 8006c04 <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8006bc4: 68fb ldr r3, [r7, #12]
8006bc6: 681b ldr r3, [r3, #0]
8006bc8: 461a mov r2, r3
8006bca: 68bb ldr r3, [r7, #8]
8006bcc: 781b ldrb r3, [r3, #0]
8006bce: 009b lsls r3, r3, #2
8006bd0: 4413 add r3, r2
8006bd2: 881b ldrh r3, [r3, #0]
8006bd4: b29b uxth r3, r3
8006bd6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006bda: f023 0370 bic.w r3, r3, #112 @ 0x70
8006bde: 82fb strh r3, [r7, #22]
8006be0: 68fb ldr r3, [r7, #12]
8006be2: 681b ldr r3, [r3, #0]
8006be4: 461a mov r2, r3
8006be6: 68bb ldr r3, [r7, #8]
8006be8: 781b ldrb r3, [r3, #0]
8006bea: 009b lsls r3, r3, #2
8006bec: 441a add r2, r3
8006bee: 8afb ldrh r3, [r7, #22]
8006bf0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006bf4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006bf8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006bfc: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006c00: b29b uxth r3, r3
8006c02: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8006c04: 8b7b ldrh r3, [r7, #26]
8006c06: 2b00 cmp r3, #0
8006c08: f000 8087 beq.w 8006d1a <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8006c0c: 68fb ldr r3, [r7, #12]
8006c0e: 6818 ldr r0, [r3, #0]
8006c10: 68bb ldr r3, [r7, #8]
8006c12: 6959 ldr r1, [r3, #20]
8006c14: 68bb ldr r3, [r7, #8]
8006c16: 891a ldrh r2, [r3, #8]
8006c18: 8b7b ldrh r3, [r7, #26]
8006c1a: f004 fd60 bl 800b6de <USB_ReadPMA>
8006c1e: e07c b.n 8006d1a <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8006c20: 68fb ldr r3, [r7, #12]
8006c22: 681b ldr r3, [r3, #0]
8006c24: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006c28: b29b uxth r3, r3
8006c2a: 461a mov r2, r3
8006c2c: 68bb ldr r3, [r7, #8]
8006c2e: 781b ldrb r3, [r3, #0]
8006c30: 00db lsls r3, r3, #3
8006c32: 4413 add r3, r2
8006c34: 3306 adds r3, #6
8006c36: 005b lsls r3, r3, #1
8006c38: 68fa ldr r2, [r7, #12]
8006c3a: 6812 ldr r2, [r2, #0]
8006c3c: 4413 add r3, r2
8006c3e: f503 6380 add.w r3, r3, #1024 @ 0x400
8006c42: 881b ldrh r3, [r3, #0]
8006c44: f3c3 0309 ubfx r3, r3, #0, #10
8006c48: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
8006c4a: 68bb ldr r3, [r7, #8]
8006c4c: 699a ldr r2, [r3, #24]
8006c4e: 8b7b ldrh r3, [r7, #26]
8006c50: 429a cmp r2, r3
8006c52: d306 bcc.n 8006c62 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
8006c54: 68bb ldr r3, [r7, #8]
8006c56: 699a ldr r2, [r3, #24]
8006c58: 8b7b ldrh r3, [r7, #26]
8006c5a: 1ad2 subs r2, r2, r3
8006c5c: 68bb ldr r3, [r7, #8]
8006c5e: 619a str r2, [r3, #24]
8006c60: e002 b.n 8006c68 <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
8006c62: 68bb ldr r3, [r7, #8]
8006c64: 2200 movs r2, #0
8006c66: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
8006c68: 68bb ldr r3, [r7, #8]
8006c6a: 699b ldr r3, [r3, #24]
8006c6c: 2b00 cmp r3, #0
8006c6e: d123 bne.n 8006cb8 <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
8006c70: 68fb ldr r3, [r7, #12]
8006c72: 681b ldr r3, [r3, #0]
8006c74: 461a mov r2, r3
8006c76: 68bb ldr r3, [r7, #8]
8006c78: 781b ldrb r3, [r3, #0]
8006c7a: 009b lsls r3, r3, #2
8006c7c: 4413 add r3, r2
8006c7e: 881b ldrh r3, [r3, #0]
8006c80: b29b uxth r3, r3
8006c82: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8006c86: f023 0370 bic.w r3, r3, #112 @ 0x70
8006c8a: 83fb strh r3, [r7, #30]
8006c8c: 8bfb ldrh r3, [r7, #30]
8006c8e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8006c92: 83fb strh r3, [r7, #30]
8006c94: 68fb ldr r3, [r7, #12]
8006c96: 681b ldr r3, [r3, #0]
8006c98: 461a mov r2, r3
8006c9a: 68bb ldr r3, [r7, #8]
8006c9c: 781b ldrb r3, [r3, #0]
8006c9e: 009b lsls r3, r3, #2
8006ca0: 441a add r2, r3
8006ca2: 8bfb ldrh r3, [r7, #30]
8006ca4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006ca8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006cac: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006cb0: f043 0380 orr.w r3, r3, #128 @ 0x80
8006cb4: b29b uxth r3, r3
8006cb6: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
8006cb8: 88fb ldrh r3, [r7, #6]
8006cba: f003 0340 and.w r3, r3, #64 @ 0x40
8006cbe: 2b00 cmp r3, #0
8006cc0: d11f bne.n 8006d02 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8006cc2: 68fb ldr r3, [r7, #12]
8006cc4: 681b ldr r3, [r3, #0]
8006cc6: 461a mov r2, r3
8006cc8: 68bb ldr r3, [r7, #8]
8006cca: 781b ldrb r3, [r3, #0]
8006ccc: 009b lsls r3, r3, #2
8006cce: 4413 add r3, r2
8006cd0: 881b ldrh r3, [r3, #0]
8006cd2: b29b uxth r3, r3
8006cd4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006cd8: f023 0370 bic.w r3, r3, #112 @ 0x70
8006cdc: 83bb strh r3, [r7, #28]
8006cde: 68fb ldr r3, [r7, #12]
8006ce0: 681b ldr r3, [r3, #0]
8006ce2: 461a mov r2, r3
8006ce4: 68bb ldr r3, [r7, #8]
8006ce6: 781b ldrb r3, [r3, #0]
8006ce8: 009b lsls r3, r3, #2
8006cea: 441a add r2, r3
8006cec: 8bbb ldrh r3, [r7, #28]
8006cee: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006cf2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006cf6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8006cfa: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8006cfe: b29b uxth r3, r3
8006d00: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8006d02: 8b7b ldrh r3, [r7, #26]
8006d04: 2b00 cmp r3, #0
8006d06: d008 beq.n 8006d1a <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
8006d08: 68fb ldr r3, [r7, #12]
8006d0a: 6818 ldr r0, [r3, #0]
8006d0c: 68bb ldr r3, [r7, #8]
8006d0e: 6959 ldr r1, [r3, #20]
8006d10: 68bb ldr r3, [r7, #8]
8006d12: 895a ldrh r2, [r3, #10]
8006d14: 8b7b ldrh r3, [r7, #26]
8006d16: f004 fce2 bl 800b6de <USB_ReadPMA>
}
}
return count;
8006d1a: 8b7b ldrh r3, [r7, #26]
}
8006d1c: 4618 mov r0, r3
8006d1e: 3720 adds r7, #32
8006d20: 46bd mov sp, r7
8006d22: bd80 pop {r7, pc}
08006d24 <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8006d24: b580 push {r7, lr}
8006d26: b0a4 sub sp, #144 @ 0x90
8006d28: af00 add r7, sp, #0
8006d2a: 60f8 str r0, [r7, #12]
8006d2c: 60b9 str r1, [r7, #8]
8006d2e: 4613 mov r3, r2
8006d30: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8006d32: 88fb ldrh r3, [r7, #6]
8006d34: f003 0340 and.w r3, r3, #64 @ 0x40
8006d38: 2b00 cmp r3, #0
8006d3a: f000 81dd beq.w 80070f8 <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8006d3e: 68fb ldr r3, [r7, #12]
8006d40: 681b ldr r3, [r3, #0]
8006d42: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006d46: b29b uxth r3, r3
8006d48: 461a mov r2, r3
8006d4a: 68bb ldr r3, [r7, #8]
8006d4c: 781b ldrb r3, [r3, #0]
8006d4e: 00db lsls r3, r3, #3
8006d50: 4413 add r3, r2
8006d52: 3302 adds r3, #2
8006d54: 005b lsls r3, r3, #1
8006d56: 68fa ldr r2, [r7, #12]
8006d58: 6812 ldr r2, [r2, #0]
8006d5a: 4413 add r3, r2
8006d5c: f503 6380 add.w r3, r3, #1024 @ 0x400
8006d60: 881b ldrh r3, [r3, #0]
8006d62: f3c3 0309 ubfx r3, r3, #0, #10
8006d66: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
8006d6a: 68bb ldr r3, [r7, #8]
8006d6c: 699a ldr r2, [r3, #24]
8006d6e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8006d72: 429a cmp r2, r3
8006d74: d907 bls.n 8006d86 <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
8006d76: 68bb ldr r3, [r7, #8]
8006d78: 699a ldr r2, [r3, #24]
8006d7a: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8006d7e: 1ad2 subs r2, r2, r3
8006d80: 68bb ldr r3, [r7, #8]
8006d82: 619a str r2, [r3, #24]
8006d84: e002 b.n 8006d8c <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
8006d86: 68bb ldr r3, [r7, #8]
8006d88: 2200 movs r2, #0
8006d8a: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8006d8c: 68bb ldr r3, [r7, #8]
8006d8e: 699b ldr r3, [r3, #24]
8006d90: 2b00 cmp r3, #0
8006d92: f040 80b9 bne.w 8006f08 <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8006d96: 68bb ldr r3, [r7, #8]
8006d98: 785b ldrb r3, [r3, #1]
8006d9a: 2b00 cmp r3, #0
8006d9c: d126 bne.n 8006dec <HAL_PCD_EP_DB_Transmit+0xc8>
8006d9e: 68fb ldr r3, [r7, #12]
8006da0: 681b ldr r3, [r3, #0]
8006da2: 62fb str r3, [r7, #44] @ 0x2c
8006da4: 68fb ldr r3, [r7, #12]
8006da6: 681b ldr r3, [r3, #0]
8006da8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006dac: b29b uxth r3, r3
8006dae: 461a mov r2, r3
8006db0: 6afb ldr r3, [r7, #44] @ 0x2c
8006db2: 4413 add r3, r2
8006db4: 62fb str r3, [r7, #44] @ 0x2c
8006db6: 68bb ldr r3, [r7, #8]
8006db8: 781b ldrb r3, [r3, #0]
8006dba: 011a lsls r2, r3, #4
8006dbc: 6afb ldr r3, [r7, #44] @ 0x2c
8006dbe: 4413 add r3, r2
8006dc0: f203 4304 addw r3, r3, #1028 @ 0x404
8006dc4: 62bb str r3, [r7, #40] @ 0x28
8006dc6: 6abb ldr r3, [r7, #40] @ 0x28
8006dc8: 881b ldrh r3, [r3, #0]
8006dca: b29b uxth r3, r3
8006dcc: f3c3 0309 ubfx r3, r3, #0, #10
8006dd0: b29a uxth r2, r3
8006dd2: 6abb ldr r3, [r7, #40] @ 0x28
8006dd4: 801a strh r2, [r3, #0]
8006dd6: 6abb ldr r3, [r7, #40] @ 0x28
8006dd8: 881b ldrh r3, [r3, #0]
8006dda: b29b uxth r3, r3
8006ddc: ea6f 4343 mvn.w r3, r3, lsl #17
8006de0: ea6f 4353 mvn.w r3, r3, lsr #17
8006de4: b29a uxth r2, r3
8006de6: 6abb ldr r3, [r7, #40] @ 0x28
8006de8: 801a strh r2, [r3, #0]
8006dea: e01a b.n 8006e22 <HAL_PCD_EP_DB_Transmit+0xfe>
8006dec: 68bb ldr r3, [r7, #8]
8006dee: 785b ldrb r3, [r3, #1]
8006df0: 2b01 cmp r3, #1
8006df2: d116 bne.n 8006e22 <HAL_PCD_EP_DB_Transmit+0xfe>
8006df4: 68fb ldr r3, [r7, #12]
8006df6: 681b ldr r3, [r3, #0]
8006df8: 637b str r3, [r7, #52] @ 0x34
8006dfa: 68fb ldr r3, [r7, #12]
8006dfc: 681b ldr r3, [r3, #0]
8006dfe: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006e02: b29b uxth r3, r3
8006e04: 461a mov r2, r3
8006e06: 6b7b ldr r3, [r7, #52] @ 0x34
8006e08: 4413 add r3, r2
8006e0a: 637b str r3, [r7, #52] @ 0x34
8006e0c: 68bb ldr r3, [r7, #8]
8006e0e: 781b ldrb r3, [r3, #0]
8006e10: 011a lsls r2, r3, #4
8006e12: 6b7b ldr r3, [r7, #52] @ 0x34
8006e14: 4413 add r3, r2
8006e16: f203 4304 addw r3, r3, #1028 @ 0x404
8006e1a: 633b str r3, [r7, #48] @ 0x30
8006e1c: 6b3b ldr r3, [r7, #48] @ 0x30
8006e1e: 2200 movs r2, #0
8006e20: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8006e22: 68fb ldr r3, [r7, #12]
8006e24: 681b ldr r3, [r3, #0]
8006e26: 627b str r3, [r7, #36] @ 0x24
8006e28: 68bb ldr r3, [r7, #8]
8006e2a: 785b ldrb r3, [r3, #1]
8006e2c: 2b00 cmp r3, #0
8006e2e: d126 bne.n 8006e7e <HAL_PCD_EP_DB_Transmit+0x15a>
8006e30: 68fb ldr r3, [r7, #12]
8006e32: 681b ldr r3, [r3, #0]
8006e34: 61fb str r3, [r7, #28]
8006e36: 68fb ldr r3, [r7, #12]
8006e38: 681b ldr r3, [r3, #0]
8006e3a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006e3e: b29b uxth r3, r3
8006e40: 461a mov r2, r3
8006e42: 69fb ldr r3, [r7, #28]
8006e44: 4413 add r3, r2
8006e46: 61fb str r3, [r7, #28]
8006e48: 68bb ldr r3, [r7, #8]
8006e4a: 781b ldrb r3, [r3, #0]
8006e4c: 011a lsls r2, r3, #4
8006e4e: 69fb ldr r3, [r7, #28]
8006e50: 4413 add r3, r2
8006e52: f203 430c addw r3, r3, #1036 @ 0x40c
8006e56: 61bb str r3, [r7, #24]
8006e58: 69bb ldr r3, [r7, #24]
8006e5a: 881b ldrh r3, [r3, #0]
8006e5c: b29b uxth r3, r3
8006e5e: f3c3 0309 ubfx r3, r3, #0, #10
8006e62: b29a uxth r2, r3
8006e64: 69bb ldr r3, [r7, #24]
8006e66: 801a strh r2, [r3, #0]
8006e68: 69bb ldr r3, [r7, #24]
8006e6a: 881b ldrh r3, [r3, #0]
8006e6c: b29b uxth r3, r3
8006e6e: ea6f 4343 mvn.w r3, r3, lsl #17
8006e72: ea6f 4353 mvn.w r3, r3, lsr #17
8006e76: b29a uxth r2, r3
8006e78: 69bb ldr r3, [r7, #24]
8006e7a: 801a strh r2, [r3, #0]
8006e7c: e017 b.n 8006eae <HAL_PCD_EP_DB_Transmit+0x18a>
8006e7e: 68bb ldr r3, [r7, #8]
8006e80: 785b ldrb r3, [r3, #1]
8006e82: 2b01 cmp r3, #1
8006e84: d113 bne.n 8006eae <HAL_PCD_EP_DB_Transmit+0x18a>
8006e86: 68fb ldr r3, [r7, #12]
8006e88: 681b ldr r3, [r3, #0]
8006e8a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006e8e: b29b uxth r3, r3
8006e90: 461a mov r2, r3
8006e92: 6a7b ldr r3, [r7, #36] @ 0x24
8006e94: 4413 add r3, r2
8006e96: 627b str r3, [r7, #36] @ 0x24
8006e98: 68bb ldr r3, [r7, #8]
8006e9a: 781b ldrb r3, [r3, #0]
8006e9c: 011a lsls r2, r3, #4
8006e9e: 6a7b ldr r3, [r7, #36] @ 0x24
8006ea0: 4413 add r3, r2
8006ea2: f203 430c addw r3, r3, #1036 @ 0x40c
8006ea6: 623b str r3, [r7, #32]
8006ea8: 6a3b ldr r3, [r7, #32]
8006eaa: 2200 movs r2, #0
8006eac: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8006eae: 68bb ldr r3, [r7, #8]
8006eb0: 781b ldrb r3, [r3, #0]
8006eb2: 4619 mov r1, r3
8006eb4: 68f8 ldr r0, [r7, #12]
8006eb6: f006 fa90 bl 800d3da <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8006eba: 88fb ldrh r3, [r7, #6]
8006ebc: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006ec0: 2b00 cmp r3, #0
8006ec2: f000 82fc beq.w 80074be <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8006ec6: 68fb ldr r3, [r7, #12]
8006ec8: 681b ldr r3, [r3, #0]
8006eca: 461a mov r2, r3
8006ecc: 68bb ldr r3, [r7, #8]
8006ece: 781b ldrb r3, [r3, #0]
8006ed0: 009b lsls r3, r3, #2
8006ed2: 4413 add r3, r2
8006ed4: 881b ldrh r3, [r3, #0]
8006ed6: b29b uxth r3, r3
8006ed8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006edc: f023 0370 bic.w r3, r3, #112 @ 0x70
8006ee0: 82fb strh r3, [r7, #22]
8006ee2: 68fb ldr r3, [r7, #12]
8006ee4: 681b ldr r3, [r3, #0]
8006ee6: 461a mov r2, r3
8006ee8: 68bb ldr r3, [r7, #8]
8006eea: 781b ldrb r3, [r3, #0]
8006eec: 009b lsls r3, r3, #2
8006eee: 441a add r2, r3
8006ef0: 8afb ldrh r3, [r7, #22]
8006ef2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006ef6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006efa: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006efe: f043 0380 orr.w r3, r3, #128 @ 0x80
8006f02: b29b uxth r3, r3
8006f04: 8013 strh r3, [r2, #0]
8006f06: e2da b.n 80074be <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8006f08: 88fb ldrh r3, [r7, #6]
8006f0a: f403 4380 and.w r3, r3, #16384 @ 0x4000
8006f0e: 2b00 cmp r3, #0
8006f10: d021 beq.n 8006f56 <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8006f12: 68fb ldr r3, [r7, #12]
8006f14: 681b ldr r3, [r3, #0]
8006f16: 461a mov r2, r3
8006f18: 68bb ldr r3, [r7, #8]
8006f1a: 781b ldrb r3, [r3, #0]
8006f1c: 009b lsls r3, r3, #2
8006f1e: 4413 add r3, r2
8006f20: 881b ldrh r3, [r3, #0]
8006f22: b29b uxth r3, r3
8006f24: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8006f28: f023 0370 bic.w r3, r3, #112 @ 0x70
8006f2c: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
8006f30: 68fb ldr r3, [r7, #12]
8006f32: 681b ldr r3, [r3, #0]
8006f34: 461a mov r2, r3
8006f36: 68bb ldr r3, [r7, #8]
8006f38: 781b ldrb r3, [r3, #0]
8006f3a: 009b lsls r3, r3, #2
8006f3c: 441a add r2, r3
8006f3e: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
8006f42: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8006f46: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8006f4a: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8006f4e: f043 0380 orr.w r3, r3, #128 @ 0x80
8006f52: b29b uxth r3, r3
8006f54: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8006f56: 68bb ldr r3, [r7, #8]
8006f58: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8006f5c: 2b01 cmp r3, #1
8006f5e: f040 82ae bne.w 80074be <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8006f62: 68bb ldr r3, [r7, #8]
8006f64: 695a ldr r2, [r3, #20]
8006f66: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8006f6a: 441a add r2, r3
8006f6c: 68bb ldr r3, [r7, #8]
8006f6e: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8006f70: 68bb ldr r3, [r7, #8]
8006f72: 69da ldr r2, [r3, #28]
8006f74: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8006f78: 441a add r2, r3
8006f7a: 68bb ldr r3, [r7, #8]
8006f7c: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8006f7e: 68bb ldr r3, [r7, #8]
8006f80: 6a1a ldr r2, [r3, #32]
8006f82: 68bb ldr r3, [r7, #8]
8006f84: 691b ldr r3, [r3, #16]
8006f86: 429a cmp r2, r3
8006f88: d30b bcc.n 8006fa2 <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8006f8a: 68bb ldr r3, [r7, #8]
8006f8c: 691b ldr r3, [r3, #16]
8006f8e: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8006f92: 68bb ldr r3, [r7, #8]
8006f94: 6a1a ldr r2, [r3, #32]
8006f96: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8006f9a: 1ad2 subs r2, r2, r3
8006f9c: 68bb ldr r3, [r7, #8]
8006f9e: 621a str r2, [r3, #32]
8006fa0: e017 b.n 8006fd2 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8006fa2: 68bb ldr r3, [r7, #8]
8006fa4: 6a1b ldr r3, [r3, #32]
8006fa6: 2b00 cmp r3, #0
8006fa8: d108 bne.n 8006fbc <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8006faa: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8006fae: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8006fb2: 68bb ldr r3, [r7, #8]
8006fb4: 2200 movs r2, #0
8006fb6: f883 2024 strb.w r2, [r3, #36] @ 0x24
8006fba: e00a b.n 8006fd2 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8006fbc: 68bb ldr r3, [r7, #8]
8006fbe: 2200 movs r2, #0
8006fc0: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8006fc4: 68bb ldr r3, [r7, #8]
8006fc6: 6a1b ldr r3, [r3, #32]
8006fc8: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8006fcc: 68bb ldr r3, [r7, #8]
8006fce: 2200 movs r2, #0
8006fd0: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8006fd2: 68bb ldr r3, [r7, #8]
8006fd4: 785b ldrb r3, [r3, #1]
8006fd6: 2b00 cmp r3, #0
8006fd8: d165 bne.n 80070a6 <HAL_PCD_EP_DB_Transmit+0x382>
8006fda: 68fb ldr r3, [r7, #12]
8006fdc: 681b ldr r3, [r3, #0]
8006fde: 63fb str r3, [r7, #60] @ 0x3c
8006fe0: 68fb ldr r3, [r7, #12]
8006fe2: 681b ldr r3, [r3, #0]
8006fe4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006fe8: b29b uxth r3, r3
8006fea: 461a mov r2, r3
8006fec: 6bfb ldr r3, [r7, #60] @ 0x3c
8006fee: 4413 add r3, r2
8006ff0: 63fb str r3, [r7, #60] @ 0x3c
8006ff2: 68bb ldr r3, [r7, #8]
8006ff4: 781b ldrb r3, [r3, #0]
8006ff6: 011a lsls r2, r3, #4
8006ff8: 6bfb ldr r3, [r7, #60] @ 0x3c
8006ffa: 4413 add r3, r2
8006ffc: f203 4304 addw r3, r3, #1028 @ 0x404
8007000: 63bb str r3, [r7, #56] @ 0x38
8007002: 6bbb ldr r3, [r7, #56] @ 0x38
8007004: 881b ldrh r3, [r3, #0]
8007006: b29b uxth r3, r3
8007008: f3c3 0309 ubfx r3, r3, #0, #10
800700c: b29a uxth r2, r3
800700e: 6bbb ldr r3, [r7, #56] @ 0x38
8007010: 801a strh r2, [r3, #0]
8007012: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007016: 2b3e cmp r3, #62 @ 0x3e
8007018: d91d bls.n 8007056 <HAL_PCD_EP_DB_Transmit+0x332>
800701a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800701e: 095b lsrs r3, r3, #5
8007020: 64bb str r3, [r7, #72] @ 0x48
8007022: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007026: f003 031f and.w r3, r3, #31
800702a: 2b00 cmp r3, #0
800702c: d102 bne.n 8007034 <HAL_PCD_EP_DB_Transmit+0x310>
800702e: 6cbb ldr r3, [r7, #72] @ 0x48
8007030: 3b01 subs r3, #1
8007032: 64bb str r3, [r7, #72] @ 0x48
8007034: 6bbb ldr r3, [r7, #56] @ 0x38
8007036: 881b ldrh r3, [r3, #0]
8007038: b29a uxth r2, r3
800703a: 6cbb ldr r3, [r7, #72] @ 0x48
800703c: b29b uxth r3, r3
800703e: 029b lsls r3, r3, #10
8007040: b29b uxth r3, r3
8007042: 4313 orrs r3, r2
8007044: b29b uxth r3, r3
8007046: ea6f 4343 mvn.w r3, r3, lsl #17
800704a: ea6f 4353 mvn.w r3, r3, lsr #17
800704e: b29a uxth r2, r3
8007050: 6bbb ldr r3, [r7, #56] @ 0x38
8007052: 801a strh r2, [r3, #0]
8007054: e044 b.n 80070e0 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007056: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800705a: 2b00 cmp r3, #0
800705c: d10a bne.n 8007074 <HAL_PCD_EP_DB_Transmit+0x350>
800705e: 6bbb ldr r3, [r7, #56] @ 0x38
8007060: 881b ldrh r3, [r3, #0]
8007062: b29b uxth r3, r3
8007064: ea6f 4343 mvn.w r3, r3, lsl #17
8007068: ea6f 4353 mvn.w r3, r3, lsr #17
800706c: b29a uxth r2, r3
800706e: 6bbb ldr r3, [r7, #56] @ 0x38
8007070: 801a strh r2, [r3, #0]
8007072: e035 b.n 80070e0 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007074: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007078: 085b lsrs r3, r3, #1
800707a: 64bb str r3, [r7, #72] @ 0x48
800707c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007080: f003 0301 and.w r3, r3, #1
8007084: 2b00 cmp r3, #0
8007086: d002 beq.n 800708e <HAL_PCD_EP_DB_Transmit+0x36a>
8007088: 6cbb ldr r3, [r7, #72] @ 0x48
800708a: 3301 adds r3, #1
800708c: 64bb str r3, [r7, #72] @ 0x48
800708e: 6bbb ldr r3, [r7, #56] @ 0x38
8007090: 881b ldrh r3, [r3, #0]
8007092: b29a uxth r2, r3
8007094: 6cbb ldr r3, [r7, #72] @ 0x48
8007096: b29b uxth r3, r3
8007098: 029b lsls r3, r3, #10
800709a: b29b uxth r3, r3
800709c: 4313 orrs r3, r2
800709e: b29a uxth r2, r3
80070a0: 6bbb ldr r3, [r7, #56] @ 0x38
80070a2: 801a strh r2, [r3, #0]
80070a4: e01c b.n 80070e0 <HAL_PCD_EP_DB_Transmit+0x3bc>
80070a6: 68bb ldr r3, [r7, #8]
80070a8: 785b ldrb r3, [r3, #1]
80070aa: 2b01 cmp r3, #1
80070ac: d118 bne.n 80070e0 <HAL_PCD_EP_DB_Transmit+0x3bc>
80070ae: 68fb ldr r3, [r7, #12]
80070b0: 681b ldr r3, [r3, #0]
80070b2: 647b str r3, [r7, #68] @ 0x44
80070b4: 68fb ldr r3, [r7, #12]
80070b6: 681b ldr r3, [r3, #0]
80070b8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80070bc: b29b uxth r3, r3
80070be: 461a mov r2, r3
80070c0: 6c7b ldr r3, [r7, #68] @ 0x44
80070c2: 4413 add r3, r2
80070c4: 647b str r3, [r7, #68] @ 0x44
80070c6: 68bb ldr r3, [r7, #8]
80070c8: 781b ldrb r3, [r3, #0]
80070ca: 011a lsls r2, r3, #4
80070cc: 6c7b ldr r3, [r7, #68] @ 0x44
80070ce: 4413 add r3, r2
80070d0: f203 4304 addw r3, r3, #1028 @ 0x404
80070d4: 643b str r3, [r7, #64] @ 0x40
80070d6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80070da: b29a uxth r2, r3
80070dc: 6c3b ldr r3, [r7, #64] @ 0x40
80070de: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
80070e0: 68fb ldr r3, [r7, #12]
80070e2: 6818 ldr r0, [r3, #0]
80070e4: 68bb ldr r3, [r7, #8]
80070e6: 6959 ldr r1, [r3, #20]
80070e8: 68bb ldr r3, [r7, #8]
80070ea: 891a ldrh r2, [r3, #8]
80070ec: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80070f0: b29b uxth r3, r3
80070f2: f004 faae bl 800b652 <USB_WritePMA>
80070f6: e1e2 b.n 80074be <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80070f8: 68fb ldr r3, [r7, #12]
80070fa: 681b ldr r3, [r3, #0]
80070fc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007100: b29b uxth r3, r3
8007102: 461a mov r2, r3
8007104: 68bb ldr r3, [r7, #8]
8007106: 781b ldrb r3, [r3, #0]
8007108: 00db lsls r3, r3, #3
800710a: 4413 add r3, r2
800710c: 3306 adds r3, #6
800710e: 005b lsls r3, r3, #1
8007110: 68fa ldr r2, [r7, #12]
8007112: 6812 ldr r2, [r2, #0]
8007114: 4413 add r3, r2
8007116: f503 6380 add.w r3, r3, #1024 @ 0x400
800711a: 881b ldrh r3, [r3, #0]
800711c: f3c3 0309 ubfx r3, r3, #0, #10
8007120: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
8007124: 68bb ldr r3, [r7, #8]
8007126: 699a ldr r2, [r3, #24]
8007128: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
800712c: 429a cmp r2, r3
800712e: d307 bcc.n 8007140 <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
8007130: 68bb ldr r3, [r7, #8]
8007132: 699a ldr r2, [r3, #24]
8007134: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007138: 1ad2 subs r2, r2, r3
800713a: 68bb ldr r3, [r7, #8]
800713c: 619a str r2, [r3, #24]
800713e: e002 b.n 8007146 <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
8007140: 68bb ldr r3, [r7, #8]
8007142: 2200 movs r2, #0
8007144: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8007146: 68bb ldr r3, [r7, #8]
8007148: 699b ldr r3, [r3, #24]
800714a: 2b00 cmp r3, #0
800714c: f040 80c0 bne.w 80072d0 <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007150: 68bb ldr r3, [r7, #8]
8007152: 785b ldrb r3, [r3, #1]
8007154: 2b00 cmp r3, #0
8007156: d126 bne.n 80071a6 <HAL_PCD_EP_DB_Transmit+0x482>
8007158: 68fb ldr r3, [r7, #12]
800715a: 681b ldr r3, [r3, #0]
800715c: 67fb str r3, [r7, #124] @ 0x7c
800715e: 68fb ldr r3, [r7, #12]
8007160: 681b ldr r3, [r3, #0]
8007162: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007166: b29b uxth r3, r3
8007168: 461a mov r2, r3
800716a: 6ffb ldr r3, [r7, #124] @ 0x7c
800716c: 4413 add r3, r2
800716e: 67fb str r3, [r7, #124] @ 0x7c
8007170: 68bb ldr r3, [r7, #8]
8007172: 781b ldrb r3, [r3, #0]
8007174: 011a lsls r2, r3, #4
8007176: 6ffb ldr r3, [r7, #124] @ 0x7c
8007178: 4413 add r3, r2
800717a: f203 4304 addw r3, r3, #1028 @ 0x404
800717e: 67bb str r3, [r7, #120] @ 0x78
8007180: 6fbb ldr r3, [r7, #120] @ 0x78
8007182: 881b ldrh r3, [r3, #0]
8007184: b29b uxth r3, r3
8007186: f3c3 0309 ubfx r3, r3, #0, #10
800718a: b29a uxth r2, r3
800718c: 6fbb ldr r3, [r7, #120] @ 0x78
800718e: 801a strh r2, [r3, #0]
8007190: 6fbb ldr r3, [r7, #120] @ 0x78
8007192: 881b ldrh r3, [r3, #0]
8007194: b29b uxth r3, r3
8007196: ea6f 4343 mvn.w r3, r3, lsl #17
800719a: ea6f 4353 mvn.w r3, r3, lsr #17
800719e: b29a uxth r2, r3
80071a0: 6fbb ldr r3, [r7, #120] @ 0x78
80071a2: 801a strh r2, [r3, #0]
80071a4: e01a b.n 80071dc <HAL_PCD_EP_DB_Transmit+0x4b8>
80071a6: 68bb ldr r3, [r7, #8]
80071a8: 785b ldrb r3, [r3, #1]
80071aa: 2b01 cmp r3, #1
80071ac: d116 bne.n 80071dc <HAL_PCD_EP_DB_Transmit+0x4b8>
80071ae: 68fb ldr r3, [r7, #12]
80071b0: 681b ldr r3, [r3, #0]
80071b2: 667b str r3, [r7, #100] @ 0x64
80071b4: 68fb ldr r3, [r7, #12]
80071b6: 681b ldr r3, [r3, #0]
80071b8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80071bc: b29b uxth r3, r3
80071be: 461a mov r2, r3
80071c0: 6e7b ldr r3, [r7, #100] @ 0x64
80071c2: 4413 add r3, r2
80071c4: 667b str r3, [r7, #100] @ 0x64
80071c6: 68bb ldr r3, [r7, #8]
80071c8: 781b ldrb r3, [r3, #0]
80071ca: 011a lsls r2, r3, #4
80071cc: 6e7b ldr r3, [r7, #100] @ 0x64
80071ce: 4413 add r3, r2
80071d0: f203 4304 addw r3, r3, #1028 @ 0x404
80071d4: 663b str r3, [r7, #96] @ 0x60
80071d6: 6e3b ldr r3, [r7, #96] @ 0x60
80071d8: 2200 movs r2, #0
80071da: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80071dc: 68fb ldr r3, [r7, #12]
80071de: 681b ldr r3, [r3, #0]
80071e0: 677b str r3, [r7, #116] @ 0x74
80071e2: 68bb ldr r3, [r7, #8]
80071e4: 785b ldrb r3, [r3, #1]
80071e6: 2b00 cmp r3, #0
80071e8: d12b bne.n 8007242 <HAL_PCD_EP_DB_Transmit+0x51e>
80071ea: 68fb ldr r3, [r7, #12]
80071ec: 681b ldr r3, [r3, #0]
80071ee: 66fb str r3, [r7, #108] @ 0x6c
80071f0: 68fb ldr r3, [r7, #12]
80071f2: 681b ldr r3, [r3, #0]
80071f4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80071f8: b29b uxth r3, r3
80071fa: 461a mov r2, r3
80071fc: 6efb ldr r3, [r7, #108] @ 0x6c
80071fe: 4413 add r3, r2
8007200: 66fb str r3, [r7, #108] @ 0x6c
8007202: 68bb ldr r3, [r7, #8]
8007204: 781b ldrb r3, [r3, #0]
8007206: 011a lsls r2, r3, #4
8007208: 6efb ldr r3, [r7, #108] @ 0x6c
800720a: 4413 add r3, r2
800720c: f203 430c addw r3, r3, #1036 @ 0x40c
8007210: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8007214: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007218: 881b ldrh r3, [r3, #0]
800721a: b29b uxth r3, r3
800721c: f3c3 0309 ubfx r3, r3, #0, #10
8007220: b29a uxth r2, r3
8007222: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007226: 801a strh r2, [r3, #0]
8007228: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800722c: 881b ldrh r3, [r3, #0]
800722e: b29b uxth r3, r3
8007230: ea6f 4343 mvn.w r3, r3, lsl #17
8007234: ea6f 4353 mvn.w r3, r3, lsr #17
8007238: b29a uxth r2, r3
800723a: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800723e: 801a strh r2, [r3, #0]
8007240: e017 b.n 8007272 <HAL_PCD_EP_DB_Transmit+0x54e>
8007242: 68bb ldr r3, [r7, #8]
8007244: 785b ldrb r3, [r3, #1]
8007246: 2b01 cmp r3, #1
8007248: d113 bne.n 8007272 <HAL_PCD_EP_DB_Transmit+0x54e>
800724a: 68fb ldr r3, [r7, #12]
800724c: 681b ldr r3, [r3, #0]
800724e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007252: b29b uxth r3, r3
8007254: 461a mov r2, r3
8007256: 6f7b ldr r3, [r7, #116] @ 0x74
8007258: 4413 add r3, r2
800725a: 677b str r3, [r7, #116] @ 0x74
800725c: 68bb ldr r3, [r7, #8]
800725e: 781b ldrb r3, [r3, #0]
8007260: 011a lsls r2, r3, #4
8007262: 6f7b ldr r3, [r7, #116] @ 0x74
8007264: 4413 add r3, r2
8007266: f203 430c addw r3, r3, #1036 @ 0x40c
800726a: 673b str r3, [r7, #112] @ 0x70
800726c: 6f3b ldr r3, [r7, #112] @ 0x70
800726e: 2200 movs r2, #0
8007270: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007272: 68bb ldr r3, [r7, #8]
8007274: 781b ldrb r3, [r3, #0]
8007276: 4619 mov r1, r3
8007278: 68f8 ldr r0, [r7, #12]
800727a: f006 f8ae bl 800d3da <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
800727e: 88fb ldrh r3, [r7, #6]
8007280: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007284: 2b00 cmp r3, #0
8007286: f040 811a bne.w 80074be <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
800728a: 68fb ldr r3, [r7, #12]
800728c: 681b ldr r3, [r3, #0]
800728e: 461a mov r2, r3
8007290: 68bb ldr r3, [r7, #8]
8007292: 781b ldrb r3, [r3, #0]
8007294: 009b lsls r3, r3, #2
8007296: 4413 add r3, r2
8007298: 881b ldrh r3, [r3, #0]
800729a: b29b uxth r3, r3
800729c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80072a0: f023 0370 bic.w r3, r3, #112 @ 0x70
80072a4: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
80072a8: 68fb ldr r3, [r7, #12]
80072aa: 681b ldr r3, [r3, #0]
80072ac: 461a mov r2, r3
80072ae: 68bb ldr r3, [r7, #8]
80072b0: 781b ldrb r3, [r3, #0]
80072b2: 009b lsls r3, r3, #2
80072b4: 441a add r2, r3
80072b6: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
80072ba: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80072be: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80072c2: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80072c6: f043 0380 orr.w r3, r3, #128 @ 0x80
80072ca: b29b uxth r3, r3
80072cc: 8013 strh r3, [r2, #0]
80072ce: e0f6 b.n 80074be <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
80072d0: 88fb ldrh r3, [r7, #6]
80072d2: f403 4380 and.w r3, r3, #16384 @ 0x4000
80072d6: 2b00 cmp r3, #0
80072d8: d121 bne.n 800731e <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
80072da: 68fb ldr r3, [r7, #12]
80072dc: 681b ldr r3, [r3, #0]
80072de: 461a mov r2, r3
80072e0: 68bb ldr r3, [r7, #8]
80072e2: 781b ldrb r3, [r3, #0]
80072e4: 009b lsls r3, r3, #2
80072e6: 4413 add r3, r2
80072e8: 881b ldrh r3, [r3, #0]
80072ea: b29b uxth r3, r3
80072ec: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80072f0: f023 0370 bic.w r3, r3, #112 @ 0x70
80072f4: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
80072f8: 68fb ldr r3, [r7, #12]
80072fa: 681b ldr r3, [r3, #0]
80072fc: 461a mov r2, r3
80072fe: 68bb ldr r3, [r7, #8]
8007300: 781b ldrb r3, [r3, #0]
8007302: 009b lsls r3, r3, #2
8007304: 441a add r2, r3
8007306: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800730a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800730e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007312: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007316: f043 0380 orr.w r3, r3, #128 @ 0x80
800731a: b29b uxth r3, r3
800731c: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
800731e: 68bb ldr r3, [r7, #8]
8007320: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8007324: 2b01 cmp r3, #1
8007326: f040 80ca bne.w 80074be <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
800732a: 68bb ldr r3, [r7, #8]
800732c: 695a ldr r2, [r3, #20]
800732e: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007332: 441a add r2, r3
8007334: 68bb ldr r3, [r7, #8]
8007336: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007338: 68bb ldr r3, [r7, #8]
800733a: 69da ldr r2, [r3, #28]
800733c: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007340: 441a add r2, r3
8007342: 68bb ldr r3, [r7, #8]
8007344: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007346: 68bb ldr r3, [r7, #8]
8007348: 6a1a ldr r2, [r3, #32]
800734a: 68bb ldr r3, [r7, #8]
800734c: 691b ldr r3, [r3, #16]
800734e: 429a cmp r2, r3
8007350: d30b bcc.n 800736a <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
8007352: 68bb ldr r3, [r7, #8]
8007354: 691b ldr r3, [r3, #16]
8007356: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
800735a: 68bb ldr r3, [r7, #8]
800735c: 6a1a ldr r2, [r3, #32]
800735e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007362: 1ad2 subs r2, r2, r3
8007364: 68bb ldr r3, [r7, #8]
8007366: 621a str r2, [r3, #32]
8007368: e017 b.n 800739a <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
800736a: 68bb ldr r3, [r7, #8]
800736c: 6a1b ldr r3, [r3, #32]
800736e: 2b00 cmp r3, #0
8007370: d108 bne.n 8007384 <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
8007372: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007376: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
800737a: 68bb ldr r3, [r7, #8]
800737c: 2200 movs r2, #0
800737e: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007382: e00a b.n 800739a <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
8007384: 68bb ldr r3, [r7, #8]
8007386: 6a1b ldr r3, [r3, #32]
8007388: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
800738c: 68bb ldr r3, [r7, #8]
800738e: 2200 movs r2, #0
8007390: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8007392: 68bb ldr r3, [r7, #8]
8007394: 2200 movs r2, #0
8007396: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
800739a: 68fb ldr r3, [r7, #12]
800739c: 681b ldr r3, [r3, #0]
800739e: 657b str r3, [r7, #84] @ 0x54
80073a0: 68bb ldr r3, [r7, #8]
80073a2: 785b ldrb r3, [r3, #1]
80073a4: 2b00 cmp r3, #0
80073a6: d165 bne.n 8007474 <HAL_PCD_EP_DB_Transmit+0x750>
80073a8: 68fb ldr r3, [r7, #12]
80073aa: 681b ldr r3, [r3, #0]
80073ac: 65fb str r3, [r7, #92] @ 0x5c
80073ae: 68fb ldr r3, [r7, #12]
80073b0: 681b ldr r3, [r3, #0]
80073b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80073b6: b29b uxth r3, r3
80073b8: 461a mov r2, r3
80073ba: 6dfb ldr r3, [r7, #92] @ 0x5c
80073bc: 4413 add r3, r2
80073be: 65fb str r3, [r7, #92] @ 0x5c
80073c0: 68bb ldr r3, [r7, #8]
80073c2: 781b ldrb r3, [r3, #0]
80073c4: 011a lsls r2, r3, #4
80073c6: 6dfb ldr r3, [r7, #92] @ 0x5c
80073c8: 4413 add r3, r2
80073ca: f203 430c addw r3, r3, #1036 @ 0x40c
80073ce: 65bb str r3, [r7, #88] @ 0x58
80073d0: 6dbb ldr r3, [r7, #88] @ 0x58
80073d2: 881b ldrh r3, [r3, #0]
80073d4: b29b uxth r3, r3
80073d6: f3c3 0309 ubfx r3, r3, #0, #10
80073da: b29a uxth r2, r3
80073dc: 6dbb ldr r3, [r7, #88] @ 0x58
80073de: 801a strh r2, [r3, #0]
80073e0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80073e4: 2b3e cmp r3, #62 @ 0x3e
80073e6: d91d bls.n 8007424 <HAL_PCD_EP_DB_Transmit+0x700>
80073e8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80073ec: 095b lsrs r3, r3, #5
80073ee: 66bb str r3, [r7, #104] @ 0x68
80073f0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80073f4: f003 031f and.w r3, r3, #31
80073f8: 2b00 cmp r3, #0
80073fa: d102 bne.n 8007402 <HAL_PCD_EP_DB_Transmit+0x6de>
80073fc: 6ebb ldr r3, [r7, #104] @ 0x68
80073fe: 3b01 subs r3, #1
8007400: 66bb str r3, [r7, #104] @ 0x68
8007402: 6dbb ldr r3, [r7, #88] @ 0x58
8007404: 881b ldrh r3, [r3, #0]
8007406: b29a uxth r2, r3
8007408: 6ebb ldr r3, [r7, #104] @ 0x68
800740a: b29b uxth r3, r3
800740c: 029b lsls r3, r3, #10
800740e: b29b uxth r3, r3
8007410: 4313 orrs r3, r2
8007412: b29b uxth r3, r3
8007414: ea6f 4343 mvn.w r3, r3, lsl #17
8007418: ea6f 4353 mvn.w r3, r3, lsr #17
800741c: b29a uxth r2, r3
800741e: 6dbb ldr r3, [r7, #88] @ 0x58
8007420: 801a strh r2, [r3, #0]
8007422: e041 b.n 80074a8 <HAL_PCD_EP_DB_Transmit+0x784>
8007424: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007428: 2b00 cmp r3, #0
800742a: d10a bne.n 8007442 <HAL_PCD_EP_DB_Transmit+0x71e>
800742c: 6dbb ldr r3, [r7, #88] @ 0x58
800742e: 881b ldrh r3, [r3, #0]
8007430: b29b uxth r3, r3
8007432: ea6f 4343 mvn.w r3, r3, lsl #17
8007436: ea6f 4353 mvn.w r3, r3, lsr #17
800743a: b29a uxth r2, r3
800743c: 6dbb ldr r3, [r7, #88] @ 0x58
800743e: 801a strh r2, [r3, #0]
8007440: e032 b.n 80074a8 <HAL_PCD_EP_DB_Transmit+0x784>
8007442: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007446: 085b lsrs r3, r3, #1
8007448: 66bb str r3, [r7, #104] @ 0x68
800744a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800744e: f003 0301 and.w r3, r3, #1
8007452: 2b00 cmp r3, #0
8007454: d002 beq.n 800745c <HAL_PCD_EP_DB_Transmit+0x738>
8007456: 6ebb ldr r3, [r7, #104] @ 0x68
8007458: 3301 adds r3, #1
800745a: 66bb str r3, [r7, #104] @ 0x68
800745c: 6dbb ldr r3, [r7, #88] @ 0x58
800745e: 881b ldrh r3, [r3, #0]
8007460: b29a uxth r2, r3
8007462: 6ebb ldr r3, [r7, #104] @ 0x68
8007464: b29b uxth r3, r3
8007466: 029b lsls r3, r3, #10
8007468: b29b uxth r3, r3
800746a: 4313 orrs r3, r2
800746c: b29a uxth r2, r3
800746e: 6dbb ldr r3, [r7, #88] @ 0x58
8007470: 801a strh r2, [r3, #0]
8007472: e019 b.n 80074a8 <HAL_PCD_EP_DB_Transmit+0x784>
8007474: 68bb ldr r3, [r7, #8]
8007476: 785b ldrb r3, [r3, #1]
8007478: 2b01 cmp r3, #1
800747a: d115 bne.n 80074a8 <HAL_PCD_EP_DB_Transmit+0x784>
800747c: 68fb ldr r3, [r7, #12]
800747e: 681b ldr r3, [r3, #0]
8007480: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007484: b29b uxth r3, r3
8007486: 461a mov r2, r3
8007488: 6d7b ldr r3, [r7, #84] @ 0x54
800748a: 4413 add r3, r2
800748c: 657b str r3, [r7, #84] @ 0x54
800748e: 68bb ldr r3, [r7, #8]
8007490: 781b ldrb r3, [r3, #0]
8007492: 011a lsls r2, r3, #4
8007494: 6d7b ldr r3, [r7, #84] @ 0x54
8007496: 4413 add r3, r2
8007498: f203 430c addw r3, r3, #1036 @ 0x40c
800749c: 653b str r3, [r7, #80] @ 0x50
800749e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80074a2: b29a uxth r2, r3
80074a4: 6d3b ldr r3, [r7, #80] @ 0x50
80074a6: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
80074a8: 68fb ldr r3, [r7, #12]
80074aa: 6818 ldr r0, [r3, #0]
80074ac: 68bb ldr r3, [r7, #8]
80074ae: 6959 ldr r1, [r3, #20]
80074b0: 68bb ldr r3, [r7, #8]
80074b2: 895a ldrh r2, [r3, #10]
80074b4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
80074b8: b29b uxth r3, r3
80074ba: f004 f8ca bl 800b652 <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
80074be: 68fb ldr r3, [r7, #12]
80074c0: 681b ldr r3, [r3, #0]
80074c2: 461a mov r2, r3
80074c4: 68bb ldr r3, [r7, #8]
80074c6: 781b ldrb r3, [r3, #0]
80074c8: 009b lsls r3, r3, #2
80074ca: 4413 add r3, r2
80074cc: 881b ldrh r3, [r3, #0]
80074ce: b29b uxth r3, r3
80074d0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80074d4: f023 0340 bic.w r3, r3, #64 @ 0x40
80074d8: 82bb strh r3, [r7, #20]
80074da: 8abb ldrh r3, [r7, #20]
80074dc: f083 0310 eor.w r3, r3, #16
80074e0: 82bb strh r3, [r7, #20]
80074e2: 8abb ldrh r3, [r7, #20]
80074e4: f083 0320 eor.w r3, r3, #32
80074e8: 82bb strh r3, [r7, #20]
80074ea: 68fb ldr r3, [r7, #12]
80074ec: 681b ldr r3, [r3, #0]
80074ee: 461a mov r2, r3
80074f0: 68bb ldr r3, [r7, #8]
80074f2: 781b ldrb r3, [r3, #0]
80074f4: 009b lsls r3, r3, #2
80074f6: 441a add r2, r3
80074f8: 8abb ldrh r3, [r7, #20]
80074fa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80074fe: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007502: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007506: f043 0380 orr.w r3, r3, #128 @ 0x80
800750a: b29b uxth r3, r3
800750c: 8013 strh r3, [r2, #0]
return HAL_OK;
800750e: 2300 movs r3, #0
}
8007510: 4618 mov r0, r3
8007512: 3790 adds r7, #144 @ 0x90
8007514: 46bd mov sp, r7
8007516: bd80 pop {r7, pc}
08007518 <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
8007518: b480 push {r7}
800751a: b087 sub sp, #28
800751c: af00 add r7, sp, #0
800751e: 60f8 str r0, [r7, #12]
8007520: 607b str r3, [r7, #4]
8007522: 460b mov r3, r1
8007524: 817b strh r3, [r7, #10]
8007526: 4613 mov r3, r2
8007528: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
800752a: 897b ldrh r3, [r7, #10]
800752c: f003 0380 and.w r3, r3, #128 @ 0x80
8007530: b29b uxth r3, r3
8007532: 2b00 cmp r3, #0
8007534: d00b beq.n 800754e <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8007536: 897b ldrh r3, [r7, #10]
8007538: f003 0207 and.w r2, r3, #7
800753c: 4613 mov r3, r2
800753e: 009b lsls r3, r3, #2
8007540: 4413 add r3, r2
8007542: 00db lsls r3, r3, #3
8007544: 3310 adds r3, #16
8007546: 68fa ldr r2, [r7, #12]
8007548: 4413 add r3, r2
800754a: 617b str r3, [r7, #20]
800754c: e009 b.n 8007562 <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
800754e: 897a ldrh r2, [r7, #10]
8007550: 4613 mov r3, r2
8007552: 009b lsls r3, r3, #2
8007554: 4413 add r3, r2
8007556: 00db lsls r3, r3, #3
8007558: f503 73a8 add.w r3, r3, #336 @ 0x150
800755c: 68fa ldr r2, [r7, #12]
800755e: 4413 add r3, r2
8007560: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8007562: 893b ldrh r3, [r7, #8]
8007564: 2b00 cmp r3, #0
8007566: d107 bne.n 8007578 <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8007568: 697b ldr r3, [r7, #20]
800756a: 2200 movs r2, #0
800756c: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
800756e: 687b ldr r3, [r7, #4]
8007570: b29a uxth r2, r3
8007572: 697b ldr r3, [r7, #20]
8007574: 80da strh r2, [r3, #6]
8007576: e00b b.n 8007590 <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8007578: 697b ldr r3, [r7, #20]
800757a: 2201 movs r2, #1
800757c: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
800757e: 687b ldr r3, [r7, #4]
8007580: b29a uxth r2, r3
8007582: 697b ldr r3, [r7, #20]
8007584: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
8007586: 687b ldr r3, [r7, #4]
8007588: 0c1b lsrs r3, r3, #16
800758a: b29a uxth r2, r3
800758c: 697b ldr r3, [r7, #20]
800758e: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8007590: 2300 movs r3, #0
}
8007592: 4618 mov r0, r3
8007594: 371c adds r7, #28
8007596: 46bd mov sp, r7
8007598: bc80 pop {r7}
800759a: 4770 bx lr
0800759c <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
800759c: b580 push {r7, lr}
800759e: b086 sub sp, #24
80075a0: af00 add r7, sp, #0
80075a2: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
80075a4: 687b ldr r3, [r7, #4]
80075a6: 2b00 cmp r3, #0
80075a8: d101 bne.n 80075ae <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
80075aa: 2301 movs r3, #1
80075ac: e272 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
80075ae: 687b ldr r3, [r7, #4]
80075b0: 681b ldr r3, [r3, #0]
80075b2: f003 0301 and.w r3, r3, #1
80075b6: 2b00 cmp r3, #0
80075b8: f000 8087 beq.w 80076ca <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
80075bc: 4b92 ldr r3, [pc, #584] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80075be: 685b ldr r3, [r3, #4]
80075c0: f003 030c and.w r3, r3, #12
80075c4: 2b04 cmp r3, #4
80075c6: d00c beq.n 80075e2 <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
80075c8: 4b8f ldr r3, [pc, #572] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80075ca: 685b ldr r3, [r3, #4]
80075cc: f003 030c and.w r3, r3, #12
80075d0: 2b08 cmp r3, #8
80075d2: d112 bne.n 80075fa <HAL_RCC_OscConfig+0x5e>
80075d4: 4b8c ldr r3, [pc, #560] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80075d6: 685b ldr r3, [r3, #4]
80075d8: f403 3380 and.w r3, r3, #65536 @ 0x10000
80075dc: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80075e0: d10b bne.n 80075fa <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80075e2: 4b89 ldr r3, [pc, #548] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80075e4: 681b ldr r3, [r3, #0]
80075e6: f403 3300 and.w r3, r3, #131072 @ 0x20000
80075ea: 2b00 cmp r3, #0
80075ec: d06c beq.n 80076c8 <HAL_RCC_OscConfig+0x12c>
80075ee: 687b ldr r3, [r7, #4]
80075f0: 685b ldr r3, [r3, #4]
80075f2: 2b00 cmp r3, #0
80075f4: d168 bne.n 80076c8 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
80075f6: 2301 movs r3, #1
80075f8: e24c b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
80075fa: 687b ldr r3, [r7, #4]
80075fc: 685b ldr r3, [r3, #4]
80075fe: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8007602: d106 bne.n 8007612 <HAL_RCC_OscConfig+0x76>
8007604: 4b80 ldr r3, [pc, #512] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007606: 681b ldr r3, [r3, #0]
8007608: 4a7f ldr r2, [pc, #508] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
800760a: f443 3380 orr.w r3, r3, #65536 @ 0x10000
800760e: 6013 str r3, [r2, #0]
8007610: e02e b.n 8007670 <HAL_RCC_OscConfig+0xd4>
8007612: 687b ldr r3, [r7, #4]
8007614: 685b ldr r3, [r3, #4]
8007616: 2b00 cmp r3, #0
8007618: d10c bne.n 8007634 <HAL_RCC_OscConfig+0x98>
800761a: 4b7b ldr r3, [pc, #492] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
800761c: 681b ldr r3, [r3, #0]
800761e: 4a7a ldr r2, [pc, #488] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007620: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8007624: 6013 str r3, [r2, #0]
8007626: 4b78 ldr r3, [pc, #480] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007628: 681b ldr r3, [r3, #0]
800762a: 4a77 ldr r2, [pc, #476] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
800762c: f423 2380 bic.w r3, r3, #262144 @ 0x40000
8007630: 6013 str r3, [r2, #0]
8007632: e01d b.n 8007670 <HAL_RCC_OscConfig+0xd4>
8007634: 687b ldr r3, [r7, #4]
8007636: 685b ldr r3, [r3, #4]
8007638: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
800763c: d10c bne.n 8007658 <HAL_RCC_OscConfig+0xbc>
800763e: 4b72 ldr r3, [pc, #456] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007640: 681b ldr r3, [r3, #0]
8007642: 4a71 ldr r2, [pc, #452] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007644: f443 2380 orr.w r3, r3, #262144 @ 0x40000
8007648: 6013 str r3, [r2, #0]
800764a: 4b6f ldr r3, [pc, #444] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
800764c: 681b ldr r3, [r3, #0]
800764e: 4a6e ldr r2, [pc, #440] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007650: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8007654: 6013 str r3, [r2, #0]
8007656: e00b b.n 8007670 <HAL_RCC_OscConfig+0xd4>
8007658: 4b6b ldr r3, [pc, #428] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
800765a: 681b ldr r3, [r3, #0]
800765c: 4a6a ldr r2, [pc, #424] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
800765e: f423 3380 bic.w r3, r3, #65536 @ 0x10000
8007662: 6013 str r3, [r2, #0]
8007664: 4b68 ldr r3, [pc, #416] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007666: 681b ldr r3, [r3, #0]
8007668: 4a67 ldr r2, [pc, #412] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
800766a: f423 2380 bic.w r3, r3, #262144 @ 0x40000
800766e: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
8007670: 687b ldr r3, [r7, #4]
8007672: 685b ldr r3, [r3, #4]
8007674: 2b00 cmp r3, #0
8007676: d013 beq.n 80076a0 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007678: f7fc ff8c bl 8004594 <HAL_GetTick>
800767c: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800767e: e008 b.n 8007692 <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8007680: f7fc ff88 bl 8004594 <HAL_GetTick>
8007684: 4602 mov r2, r0
8007686: 693b ldr r3, [r7, #16]
8007688: 1ad3 subs r3, r2, r3
800768a: 2b64 cmp r3, #100 @ 0x64
800768c: d901 bls.n 8007692 <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
800768e: 2303 movs r3, #3
8007690: e200 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8007692: 4b5d ldr r3, [pc, #372] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007694: 681b ldr r3, [r3, #0]
8007696: f403 3300 and.w r3, r3, #131072 @ 0x20000
800769a: 2b00 cmp r3, #0
800769c: d0f0 beq.n 8007680 <HAL_RCC_OscConfig+0xe4>
800769e: e014 b.n 80076ca <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80076a0: f7fc ff78 bl 8004594 <HAL_GetTick>
80076a4: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80076a6: e008 b.n 80076ba <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
80076a8: f7fc ff74 bl 8004594 <HAL_GetTick>
80076ac: 4602 mov r2, r0
80076ae: 693b ldr r3, [r7, #16]
80076b0: 1ad3 subs r3, r2, r3
80076b2: 2b64 cmp r3, #100 @ 0x64
80076b4: d901 bls.n 80076ba <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
80076b6: 2303 movs r3, #3
80076b8: e1ec b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
80076ba: 4b53 ldr r3, [pc, #332] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80076bc: 681b ldr r3, [r3, #0]
80076be: f403 3300 and.w r3, r3, #131072 @ 0x20000
80076c2: 2b00 cmp r3, #0
80076c4: d1f0 bne.n 80076a8 <HAL_RCC_OscConfig+0x10c>
80076c6: e000 b.n 80076ca <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
80076c8: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
80076ca: 687b ldr r3, [r7, #4]
80076cc: 681b ldr r3, [r3, #0]
80076ce: f003 0302 and.w r3, r3, #2
80076d2: 2b00 cmp r3, #0
80076d4: d063 beq.n 800779e <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
80076d6: 4b4c ldr r3, [pc, #304] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80076d8: 685b ldr r3, [r3, #4]
80076da: f003 030c and.w r3, r3, #12
80076de: 2b00 cmp r3, #0
80076e0: d00b beq.n 80076fa <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
80076e2: 4b49 ldr r3, [pc, #292] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80076e4: 685b ldr r3, [r3, #4]
80076e6: f003 030c and.w r3, r3, #12
80076ea: 2b08 cmp r3, #8
80076ec: d11c bne.n 8007728 <HAL_RCC_OscConfig+0x18c>
80076ee: 4b46 ldr r3, [pc, #280] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80076f0: 685b ldr r3, [r3, #4]
80076f2: f403 3380 and.w r3, r3, #65536 @ 0x10000
80076f6: 2b00 cmp r3, #0
80076f8: d116 bne.n 8007728 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
80076fa: 4b43 ldr r3, [pc, #268] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80076fc: 681b ldr r3, [r3, #0]
80076fe: f003 0302 and.w r3, r3, #2
8007702: 2b00 cmp r3, #0
8007704: d005 beq.n 8007712 <HAL_RCC_OscConfig+0x176>
8007706: 687b ldr r3, [r7, #4]
8007708: 691b ldr r3, [r3, #16]
800770a: 2b01 cmp r3, #1
800770c: d001 beq.n 8007712 <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
800770e: 2301 movs r3, #1
8007710: e1c0 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
8007712: 4b3d ldr r3, [pc, #244] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007714: 681b ldr r3, [r3, #0]
8007716: f023 02f8 bic.w r2, r3, #248 @ 0xf8
800771a: 687b ldr r3, [r7, #4]
800771c: 695b ldr r3, [r3, #20]
800771e: 00db lsls r3, r3, #3
8007720: 4939 ldr r1, [pc, #228] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007722: 4313 orrs r3, r2
8007724: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8007726: e03a b.n 800779e <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
8007728: 687b ldr r3, [r7, #4]
800772a: 691b ldr r3, [r3, #16]
800772c: 2b00 cmp r3, #0
800772e: d020 beq.n 8007772 <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
8007730: 4b36 ldr r3, [pc, #216] @ (800780c <HAL_RCC_OscConfig+0x270>)
8007732: 2201 movs r2, #1
8007734: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007736: f7fc ff2d bl 8004594 <HAL_GetTick>
800773a: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
800773c: e008 b.n 8007750 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
800773e: f7fc ff29 bl 8004594 <HAL_GetTick>
8007742: 4602 mov r2, r0
8007744: 693b ldr r3, [r7, #16]
8007746: 1ad3 subs r3, r2, r3
8007748: 2b02 cmp r3, #2
800774a: d901 bls.n 8007750 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
800774c: 2303 movs r3, #3
800774e: e1a1 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8007750: 4b2d ldr r3, [pc, #180] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007752: 681b ldr r3, [r3, #0]
8007754: f003 0302 and.w r3, r3, #2
8007758: 2b00 cmp r3, #0
800775a: d0f0 beq.n 800773e <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800775c: 4b2a ldr r3, [pc, #168] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
800775e: 681b ldr r3, [r3, #0]
8007760: f023 02f8 bic.w r2, r3, #248 @ 0xf8
8007764: 687b ldr r3, [r7, #4]
8007766: 695b ldr r3, [r3, #20]
8007768: 00db lsls r3, r3, #3
800776a: 4927 ldr r1, [pc, #156] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
800776c: 4313 orrs r3, r2
800776e: 600b str r3, [r1, #0]
8007770: e015 b.n 800779e <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
8007772: 4b26 ldr r3, [pc, #152] @ (800780c <HAL_RCC_OscConfig+0x270>)
8007774: 2200 movs r2, #0
8007776: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007778: f7fc ff0c bl 8004594 <HAL_GetTick>
800777c: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800777e: e008 b.n 8007792 <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8007780: f7fc ff08 bl 8004594 <HAL_GetTick>
8007784: 4602 mov r2, r0
8007786: 693b ldr r3, [r7, #16]
8007788: 1ad3 subs r3, r2, r3
800778a: 2b02 cmp r3, #2
800778c: d901 bls.n 8007792 <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
800778e: 2303 movs r3, #3
8007790: e180 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8007792: 4b1d ldr r3, [pc, #116] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
8007794: 681b ldr r3, [r3, #0]
8007796: f003 0302 and.w r3, r3, #2
800779a: 2b00 cmp r3, #0
800779c: d1f0 bne.n 8007780 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
800779e: 687b ldr r3, [r7, #4]
80077a0: 681b ldr r3, [r3, #0]
80077a2: f003 0308 and.w r3, r3, #8
80077a6: 2b00 cmp r3, #0
80077a8: d03a beq.n 8007820 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
80077aa: 687b ldr r3, [r7, #4]
80077ac: 699b ldr r3, [r3, #24]
80077ae: 2b00 cmp r3, #0
80077b0: d019 beq.n 80077e6 <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
80077b2: 4b17 ldr r3, [pc, #92] @ (8007810 <HAL_RCC_OscConfig+0x274>)
80077b4: 2201 movs r2, #1
80077b6: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80077b8: f7fc feec bl 8004594 <HAL_GetTick>
80077bc: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80077be: e008 b.n 80077d2 <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80077c0: f7fc fee8 bl 8004594 <HAL_GetTick>
80077c4: 4602 mov r2, r0
80077c6: 693b ldr r3, [r7, #16]
80077c8: 1ad3 subs r3, r2, r3
80077ca: 2b02 cmp r3, #2
80077cc: d901 bls.n 80077d2 <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
80077ce: 2303 movs r3, #3
80077d0: e160 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
80077d2: 4b0d ldr r3, [pc, #52] @ (8007808 <HAL_RCC_OscConfig+0x26c>)
80077d4: 6a5b ldr r3, [r3, #36] @ 0x24
80077d6: f003 0302 and.w r3, r3, #2
80077da: 2b00 cmp r3, #0
80077dc: d0f0 beq.n 80077c0 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
80077de: 2001 movs r0, #1
80077e0: f000 fad0 bl 8007d84 <RCC_Delay>
80077e4: e01c b.n 8007820 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
80077e6: 4b0a ldr r3, [pc, #40] @ (8007810 <HAL_RCC_OscConfig+0x274>)
80077e8: 2200 movs r2, #0
80077ea: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80077ec: f7fc fed2 bl 8004594 <HAL_GetTick>
80077f0: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
80077f2: e00f b.n 8007814 <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
80077f4: f7fc fece bl 8004594 <HAL_GetTick>
80077f8: 4602 mov r2, r0
80077fa: 693b ldr r3, [r7, #16]
80077fc: 1ad3 subs r3, r2, r3
80077fe: 2b02 cmp r3, #2
8007800: d908 bls.n 8007814 <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
8007802: 2303 movs r3, #3
8007804: e146 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
8007806: bf00 nop
8007808: 40021000 .word 0x40021000
800780c: 42420000 .word 0x42420000
8007810: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
8007814: 4b92 ldr r3, [pc, #584] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007816: 6a5b ldr r3, [r3, #36] @ 0x24
8007818: f003 0302 and.w r3, r3, #2
800781c: 2b00 cmp r3, #0
800781e: d1e9 bne.n 80077f4 <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
8007820: 687b ldr r3, [r7, #4]
8007822: 681b ldr r3, [r3, #0]
8007824: f003 0304 and.w r3, r3, #4
8007828: 2b00 cmp r3, #0
800782a: f000 80a6 beq.w 800797a <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
800782e: 2300 movs r3, #0
8007830: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8007832: 4b8b ldr r3, [pc, #556] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007834: 69db ldr r3, [r3, #28]
8007836: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
800783a: 2b00 cmp r3, #0
800783c: d10d bne.n 800785a <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
800783e: 4b88 ldr r3, [pc, #544] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007840: 69db ldr r3, [r3, #28]
8007842: 4a87 ldr r2, [pc, #540] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007844: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8007848: 61d3 str r3, [r2, #28]
800784a: 4b85 ldr r3, [pc, #532] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
800784c: 69db ldr r3, [r3, #28]
800784e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8007852: 60bb str r3, [r7, #8]
8007854: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8007856: 2301 movs r3, #1
8007858: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800785a: 4b82 ldr r3, [pc, #520] @ (8007a64 <HAL_RCC_OscConfig+0x4c8>)
800785c: 681b ldr r3, [r3, #0]
800785e: f403 7380 and.w r3, r3, #256 @ 0x100
8007862: 2b00 cmp r3, #0
8007864: d118 bne.n 8007898 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8007866: 4b7f ldr r3, [pc, #508] @ (8007a64 <HAL_RCC_OscConfig+0x4c8>)
8007868: 681b ldr r3, [r3, #0]
800786a: 4a7e ldr r2, [pc, #504] @ (8007a64 <HAL_RCC_OscConfig+0x4c8>)
800786c: f443 7380 orr.w r3, r3, #256 @ 0x100
8007870: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8007872: f7fc fe8f bl 8004594 <HAL_GetTick>
8007876: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007878: e008 b.n 800788c <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
800787a: f7fc fe8b bl 8004594 <HAL_GetTick>
800787e: 4602 mov r2, r0
8007880: 693b ldr r3, [r7, #16]
8007882: 1ad3 subs r3, r2, r3
8007884: 2b64 cmp r3, #100 @ 0x64
8007886: d901 bls.n 800788c <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8007888: 2303 movs r3, #3
800788a: e103 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
800788c: 4b75 ldr r3, [pc, #468] @ (8007a64 <HAL_RCC_OscConfig+0x4c8>)
800788e: 681b ldr r3, [r3, #0]
8007890: f403 7380 and.w r3, r3, #256 @ 0x100
8007894: 2b00 cmp r3, #0
8007896: d0f0 beq.n 800787a <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8007898: 687b ldr r3, [r7, #4]
800789a: 68db ldr r3, [r3, #12]
800789c: 2b01 cmp r3, #1
800789e: d106 bne.n 80078ae <HAL_RCC_OscConfig+0x312>
80078a0: 4b6f ldr r3, [pc, #444] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078a2: 6a1b ldr r3, [r3, #32]
80078a4: 4a6e ldr r2, [pc, #440] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078a6: f043 0301 orr.w r3, r3, #1
80078aa: 6213 str r3, [r2, #32]
80078ac: e02d b.n 800790a <HAL_RCC_OscConfig+0x36e>
80078ae: 687b ldr r3, [r7, #4]
80078b0: 68db ldr r3, [r3, #12]
80078b2: 2b00 cmp r3, #0
80078b4: d10c bne.n 80078d0 <HAL_RCC_OscConfig+0x334>
80078b6: 4b6a ldr r3, [pc, #424] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078b8: 6a1b ldr r3, [r3, #32]
80078ba: 4a69 ldr r2, [pc, #420] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078bc: f023 0301 bic.w r3, r3, #1
80078c0: 6213 str r3, [r2, #32]
80078c2: 4b67 ldr r3, [pc, #412] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078c4: 6a1b ldr r3, [r3, #32]
80078c6: 4a66 ldr r2, [pc, #408] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078c8: f023 0304 bic.w r3, r3, #4
80078cc: 6213 str r3, [r2, #32]
80078ce: e01c b.n 800790a <HAL_RCC_OscConfig+0x36e>
80078d0: 687b ldr r3, [r7, #4]
80078d2: 68db ldr r3, [r3, #12]
80078d4: 2b05 cmp r3, #5
80078d6: d10c bne.n 80078f2 <HAL_RCC_OscConfig+0x356>
80078d8: 4b61 ldr r3, [pc, #388] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078da: 6a1b ldr r3, [r3, #32]
80078dc: 4a60 ldr r2, [pc, #384] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078de: f043 0304 orr.w r3, r3, #4
80078e2: 6213 str r3, [r2, #32]
80078e4: 4b5e ldr r3, [pc, #376] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078e6: 6a1b ldr r3, [r3, #32]
80078e8: 4a5d ldr r2, [pc, #372] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078ea: f043 0301 orr.w r3, r3, #1
80078ee: 6213 str r3, [r2, #32]
80078f0: e00b b.n 800790a <HAL_RCC_OscConfig+0x36e>
80078f2: 4b5b ldr r3, [pc, #364] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078f4: 6a1b ldr r3, [r3, #32]
80078f6: 4a5a ldr r2, [pc, #360] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80078f8: f023 0301 bic.w r3, r3, #1
80078fc: 6213 str r3, [r2, #32]
80078fe: 4b58 ldr r3, [pc, #352] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007900: 6a1b ldr r3, [r3, #32]
8007902: 4a57 ldr r2, [pc, #348] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007904: f023 0304 bic.w r3, r3, #4
8007908: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
800790a: 687b ldr r3, [r7, #4]
800790c: 68db ldr r3, [r3, #12]
800790e: 2b00 cmp r3, #0
8007910: d015 beq.n 800793e <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007912: f7fc fe3f bl 8004594 <HAL_GetTick>
8007916: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8007918: e00a b.n 8007930 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800791a: f7fc fe3b bl 8004594 <HAL_GetTick>
800791e: 4602 mov r2, r0
8007920: 693b ldr r3, [r7, #16]
8007922: 1ad3 subs r3, r2, r3
8007924: f241 3288 movw r2, #5000 @ 0x1388
8007928: 4293 cmp r3, r2
800792a: d901 bls.n 8007930 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
800792c: 2303 movs r3, #3
800792e: e0b1 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8007930: 4b4b ldr r3, [pc, #300] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007932: 6a1b ldr r3, [r3, #32]
8007934: f003 0302 and.w r3, r3, #2
8007938: 2b00 cmp r3, #0
800793a: d0ee beq.n 800791a <HAL_RCC_OscConfig+0x37e>
800793c: e014 b.n 8007968 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800793e: f7fc fe29 bl 8004594 <HAL_GetTick>
8007942: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
8007944: e00a b.n 800795c <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8007946: f7fc fe25 bl 8004594 <HAL_GetTick>
800794a: 4602 mov r2, r0
800794c: 693b ldr r3, [r7, #16]
800794e: 1ad3 subs r3, r2, r3
8007950: f241 3288 movw r2, #5000 @ 0x1388
8007954: 4293 cmp r3, r2
8007956: d901 bls.n 800795c <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
8007958: 2303 movs r3, #3
800795a: e09b b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
800795c: 4b40 ldr r3, [pc, #256] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
800795e: 6a1b ldr r3, [r3, #32]
8007960: f003 0302 and.w r3, r3, #2
8007964: 2b00 cmp r3, #0
8007966: d1ee bne.n 8007946 <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8007968: 7dfb ldrb r3, [r7, #23]
800796a: 2b01 cmp r3, #1
800796c: d105 bne.n 800797a <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
800796e: 4b3c ldr r3, [pc, #240] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007970: 69db ldr r3, [r3, #28]
8007972: 4a3b ldr r2, [pc, #236] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007974: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8007978: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
800797a: 687b ldr r3, [r7, #4]
800797c: 69db ldr r3, [r3, #28]
800797e: 2b00 cmp r3, #0
8007980: f000 8087 beq.w 8007a92 <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
8007984: 4b36 ldr r3, [pc, #216] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007986: 685b ldr r3, [r3, #4]
8007988: f003 030c and.w r3, r3, #12
800798c: 2b08 cmp r3, #8
800798e: d061 beq.n 8007a54 <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8007990: 687b ldr r3, [r7, #4]
8007992: 69db ldr r3, [r3, #28]
8007994: 2b02 cmp r3, #2
8007996: d146 bne.n 8007a26 <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8007998: 4b33 ldr r3, [pc, #204] @ (8007a68 <HAL_RCC_OscConfig+0x4cc>)
800799a: 2200 movs r2, #0
800799c: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
800799e: f7fc fdf9 bl 8004594 <HAL_GetTick>
80079a2: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80079a4: e008 b.n 80079b8 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80079a6: f7fc fdf5 bl 8004594 <HAL_GetTick>
80079aa: 4602 mov r2, r0
80079ac: 693b ldr r3, [r7, #16]
80079ae: 1ad3 subs r3, r2, r3
80079b0: 2b02 cmp r3, #2
80079b2: d901 bls.n 80079b8 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
80079b4: 2303 movs r3, #3
80079b6: e06d b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80079b8: 4b29 ldr r3, [pc, #164] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80079ba: 681b ldr r3, [r3, #0]
80079bc: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80079c0: 2b00 cmp r3, #0
80079c2: d1f0 bne.n 80079a6 <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
80079c4: 687b ldr r3, [r7, #4]
80079c6: 6a1b ldr r3, [r3, #32]
80079c8: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
80079cc: d108 bne.n 80079e0 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
80079ce: 4b24 ldr r3, [pc, #144] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80079d0: 685b ldr r3, [r3, #4]
80079d2: f423 3200 bic.w r2, r3, #131072 @ 0x20000
80079d6: 687b ldr r3, [r7, #4]
80079d8: 689b ldr r3, [r3, #8]
80079da: 4921 ldr r1, [pc, #132] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80079dc: 4313 orrs r3, r2
80079de: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
80079e0: 4b1f ldr r3, [pc, #124] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80079e2: 685b ldr r3, [r3, #4]
80079e4: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
80079e8: 687b ldr r3, [r7, #4]
80079ea: 6a19 ldr r1, [r3, #32]
80079ec: 687b ldr r3, [r7, #4]
80079ee: 6a5b ldr r3, [r3, #36] @ 0x24
80079f0: 430b orrs r3, r1
80079f2: 491b ldr r1, [pc, #108] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
80079f4: 4313 orrs r3, r2
80079f6: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
80079f8: 4b1b ldr r3, [pc, #108] @ (8007a68 <HAL_RCC_OscConfig+0x4cc>)
80079fa: 2201 movs r2, #1
80079fc: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80079fe: f7fc fdc9 bl 8004594 <HAL_GetTick>
8007a02: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8007a04: e008 b.n 8007a18 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8007a06: f7fc fdc5 bl 8004594 <HAL_GetTick>
8007a0a: 4602 mov r2, r0
8007a0c: 693b ldr r3, [r7, #16]
8007a0e: 1ad3 subs r3, r2, r3
8007a10: 2b02 cmp r3, #2
8007a12: d901 bls.n 8007a18 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
8007a14: 2303 movs r3, #3
8007a16: e03d b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8007a18: 4b11 ldr r3, [pc, #68] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007a1a: 681b ldr r3, [r3, #0]
8007a1c: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8007a20: 2b00 cmp r3, #0
8007a22: d0f0 beq.n 8007a06 <HAL_RCC_OscConfig+0x46a>
8007a24: e035 b.n 8007a92 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8007a26: 4b10 ldr r3, [pc, #64] @ (8007a68 <HAL_RCC_OscConfig+0x4cc>)
8007a28: 2200 movs r2, #0
8007a2a: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007a2c: f7fc fdb2 bl 8004594 <HAL_GetTick>
8007a30: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007a32: e008 b.n 8007a46 <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
8007a34: f7fc fdae bl 8004594 <HAL_GetTick>
8007a38: 4602 mov r2, r0
8007a3a: 693b ldr r3, [r7, #16]
8007a3c: 1ad3 subs r3, r2, r3
8007a3e: 2b02 cmp r3, #2
8007a40: d901 bls.n 8007a46 <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
8007a42: 2303 movs r3, #3
8007a44: e026 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8007a46: 4b06 ldr r3, [pc, #24] @ (8007a60 <HAL_RCC_OscConfig+0x4c4>)
8007a48: 681b ldr r3, [r3, #0]
8007a4a: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8007a4e: 2b00 cmp r3, #0
8007a50: d1f0 bne.n 8007a34 <HAL_RCC_OscConfig+0x498>
8007a52: e01e b.n 8007a92 <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
8007a54: 687b ldr r3, [r7, #4]
8007a56: 69db ldr r3, [r3, #28]
8007a58: 2b01 cmp r3, #1
8007a5a: d107 bne.n 8007a6c <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
8007a5c: 2301 movs r3, #1
8007a5e: e019 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
8007a60: 40021000 .word 0x40021000
8007a64: 40007000 .word 0x40007000
8007a68: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
8007a6c: 4b0b ldr r3, [pc, #44] @ (8007a9c <HAL_RCC_OscConfig+0x500>)
8007a6e: 685b ldr r3, [r3, #4]
8007a70: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8007a72: 68fb ldr r3, [r7, #12]
8007a74: f403 3280 and.w r2, r3, #65536 @ 0x10000
8007a78: 687b ldr r3, [r7, #4]
8007a7a: 6a1b ldr r3, [r3, #32]
8007a7c: 429a cmp r2, r3
8007a7e: d106 bne.n 8007a8e <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8007a80: 68fb ldr r3, [r7, #12]
8007a82: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
8007a86: 687b ldr r3, [r7, #4]
8007a88: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8007a8a: 429a cmp r2, r3
8007a8c: d001 beq.n 8007a92 <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
8007a8e: 2301 movs r3, #1
8007a90: e000 b.n 8007a94 <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
8007a92: 2300 movs r3, #0
}
8007a94: 4618 mov r0, r3
8007a96: 3718 adds r7, #24
8007a98: 46bd mov sp, r7
8007a9a: bd80 pop {r7, pc}
8007a9c: 40021000 .word 0x40021000
08007aa0 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8007aa0: b580 push {r7, lr}
8007aa2: b084 sub sp, #16
8007aa4: af00 add r7, sp, #0
8007aa6: 6078 str r0, [r7, #4]
8007aa8: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8007aaa: 687b ldr r3, [r7, #4]
8007aac: 2b00 cmp r3, #0
8007aae: d101 bne.n 8007ab4 <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8007ab0: 2301 movs r3, #1
8007ab2: e0d0 b.n 8007c56 <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
8007ab4: 4b6a ldr r3, [pc, #424] @ (8007c60 <HAL_RCC_ClockConfig+0x1c0>)
8007ab6: 681b ldr r3, [r3, #0]
8007ab8: f003 0307 and.w r3, r3, #7
8007abc: 683a ldr r2, [r7, #0]
8007abe: 429a cmp r2, r3
8007ac0: d910 bls.n 8007ae4 <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8007ac2: 4b67 ldr r3, [pc, #412] @ (8007c60 <HAL_RCC_ClockConfig+0x1c0>)
8007ac4: 681b ldr r3, [r3, #0]
8007ac6: f023 0207 bic.w r2, r3, #7
8007aca: 4965 ldr r1, [pc, #404] @ (8007c60 <HAL_RCC_ClockConfig+0x1c0>)
8007acc: 683b ldr r3, [r7, #0]
8007ace: 4313 orrs r3, r2
8007ad0: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8007ad2: 4b63 ldr r3, [pc, #396] @ (8007c60 <HAL_RCC_ClockConfig+0x1c0>)
8007ad4: 681b ldr r3, [r3, #0]
8007ad6: f003 0307 and.w r3, r3, #7
8007ada: 683a ldr r2, [r7, #0]
8007adc: 429a cmp r2, r3
8007ade: d001 beq.n 8007ae4 <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8007ae0: 2301 movs r3, #1
8007ae2: e0b8 b.n 8007c56 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
8007ae4: 687b ldr r3, [r7, #4]
8007ae6: 681b ldr r3, [r3, #0]
8007ae8: f003 0302 and.w r3, r3, #2
8007aec: 2b00 cmp r3, #0
8007aee: d020 beq.n 8007b32 <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8007af0: 687b ldr r3, [r7, #4]
8007af2: 681b ldr r3, [r3, #0]
8007af4: f003 0304 and.w r3, r3, #4
8007af8: 2b00 cmp r3, #0
8007afa: d005 beq.n 8007b08 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8007afc: 4b59 ldr r3, [pc, #356] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007afe: 685b ldr r3, [r3, #4]
8007b00: 4a58 ldr r2, [pc, #352] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b02: f443 63e0 orr.w r3, r3, #1792 @ 0x700
8007b06: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8007b08: 687b ldr r3, [r7, #4]
8007b0a: 681b ldr r3, [r3, #0]
8007b0c: f003 0308 and.w r3, r3, #8
8007b10: 2b00 cmp r3, #0
8007b12: d005 beq.n 8007b20 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
8007b14: 4b53 ldr r3, [pc, #332] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b16: 685b ldr r3, [r3, #4]
8007b18: 4a52 ldr r2, [pc, #328] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b1a: f443 5360 orr.w r3, r3, #14336 @ 0x3800
8007b1e: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
8007b20: 4b50 ldr r3, [pc, #320] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b22: 685b ldr r3, [r3, #4]
8007b24: f023 02f0 bic.w r2, r3, #240 @ 0xf0
8007b28: 687b ldr r3, [r7, #4]
8007b2a: 689b ldr r3, [r3, #8]
8007b2c: 494d ldr r1, [pc, #308] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b2e: 4313 orrs r3, r2
8007b30: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
8007b32: 687b ldr r3, [r7, #4]
8007b34: 681b ldr r3, [r3, #0]
8007b36: f003 0301 and.w r3, r3, #1
8007b3a: 2b00 cmp r3, #0
8007b3c: d040 beq.n 8007bc0 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
8007b3e: 687b ldr r3, [r7, #4]
8007b40: 685b ldr r3, [r3, #4]
8007b42: 2b01 cmp r3, #1
8007b44: d107 bne.n 8007b56 <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8007b46: 4b47 ldr r3, [pc, #284] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b48: 681b ldr r3, [r3, #0]
8007b4a: f403 3300 and.w r3, r3, #131072 @ 0x20000
8007b4e: 2b00 cmp r3, #0
8007b50: d115 bne.n 8007b7e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8007b52: 2301 movs r3, #1
8007b54: e07f b.n 8007c56 <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
8007b56: 687b ldr r3, [r7, #4]
8007b58: 685b ldr r3, [r3, #4]
8007b5a: 2b02 cmp r3, #2
8007b5c: d107 bne.n 8007b6e <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
8007b5e: 4b41 ldr r3, [pc, #260] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b60: 681b ldr r3, [r3, #0]
8007b62: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8007b66: 2b00 cmp r3, #0
8007b68: d109 bne.n 8007b7e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8007b6a: 2301 movs r3, #1
8007b6c: e073 b.n 8007c56 <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
8007b6e: 4b3d ldr r3, [pc, #244] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b70: 681b ldr r3, [r3, #0]
8007b72: f003 0302 and.w r3, r3, #2
8007b76: 2b00 cmp r3, #0
8007b78: d101 bne.n 8007b7e <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8007b7a: 2301 movs r3, #1
8007b7c: e06b b.n 8007c56 <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8007b7e: 4b39 ldr r3, [pc, #228] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b80: 685b ldr r3, [r3, #4]
8007b82: f023 0203 bic.w r2, r3, #3
8007b86: 687b ldr r3, [r7, #4]
8007b88: 685b ldr r3, [r3, #4]
8007b8a: 4936 ldr r1, [pc, #216] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007b8c: 4313 orrs r3, r2
8007b8e: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
8007b90: f7fc fd00 bl 8004594 <HAL_GetTick>
8007b94: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8007b96: e00a b.n 8007bae <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8007b98: f7fc fcfc bl 8004594 <HAL_GetTick>
8007b9c: 4602 mov r2, r0
8007b9e: 68fb ldr r3, [r7, #12]
8007ba0: 1ad3 subs r3, r2, r3
8007ba2: f241 3288 movw r2, #5000 @ 0x1388
8007ba6: 4293 cmp r3, r2
8007ba8: d901 bls.n 8007bae <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8007baa: 2303 movs r3, #3
8007bac: e053 b.n 8007c56 <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8007bae: 4b2d ldr r3, [pc, #180] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007bb0: 685b ldr r3, [r3, #4]
8007bb2: f003 020c and.w r2, r3, #12
8007bb6: 687b ldr r3, [r7, #4]
8007bb8: 685b ldr r3, [r3, #4]
8007bba: 009b lsls r3, r3, #2
8007bbc: 429a cmp r2, r3
8007bbe: d1eb bne.n 8007b98 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8007bc0: 4b27 ldr r3, [pc, #156] @ (8007c60 <HAL_RCC_ClockConfig+0x1c0>)
8007bc2: 681b ldr r3, [r3, #0]
8007bc4: f003 0307 and.w r3, r3, #7
8007bc8: 683a ldr r2, [r7, #0]
8007bca: 429a cmp r2, r3
8007bcc: d210 bcs.n 8007bf0 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8007bce: 4b24 ldr r3, [pc, #144] @ (8007c60 <HAL_RCC_ClockConfig+0x1c0>)
8007bd0: 681b ldr r3, [r3, #0]
8007bd2: f023 0207 bic.w r2, r3, #7
8007bd6: 4922 ldr r1, [pc, #136] @ (8007c60 <HAL_RCC_ClockConfig+0x1c0>)
8007bd8: 683b ldr r3, [r7, #0]
8007bda: 4313 orrs r3, r2
8007bdc: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8007bde: 4b20 ldr r3, [pc, #128] @ (8007c60 <HAL_RCC_ClockConfig+0x1c0>)
8007be0: 681b ldr r3, [r3, #0]
8007be2: f003 0307 and.w r3, r3, #7
8007be6: 683a ldr r2, [r7, #0]
8007be8: 429a cmp r2, r3
8007bea: d001 beq.n 8007bf0 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8007bec: 2301 movs r3, #1
8007bee: e032 b.n 8007c56 <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8007bf0: 687b ldr r3, [r7, #4]
8007bf2: 681b ldr r3, [r3, #0]
8007bf4: f003 0304 and.w r3, r3, #4
8007bf8: 2b00 cmp r3, #0
8007bfa: d008 beq.n 8007c0e <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8007bfc: 4b19 ldr r3, [pc, #100] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007bfe: 685b ldr r3, [r3, #4]
8007c00: f423 62e0 bic.w r2, r3, #1792 @ 0x700
8007c04: 687b ldr r3, [r7, #4]
8007c06: 68db ldr r3, [r3, #12]
8007c08: 4916 ldr r1, [pc, #88] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007c0a: 4313 orrs r3, r2
8007c0c: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8007c0e: 687b ldr r3, [r7, #4]
8007c10: 681b ldr r3, [r3, #0]
8007c12: f003 0308 and.w r3, r3, #8
8007c16: 2b00 cmp r3, #0
8007c18: d009 beq.n 8007c2e <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
8007c1a: 4b12 ldr r3, [pc, #72] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007c1c: 685b ldr r3, [r3, #4]
8007c1e: f423 5260 bic.w r2, r3, #14336 @ 0x3800
8007c22: 687b ldr r3, [r7, #4]
8007c24: 691b ldr r3, [r3, #16]
8007c26: 00db lsls r3, r3, #3
8007c28: 490e ldr r1, [pc, #56] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007c2a: 4313 orrs r3, r2
8007c2c: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
8007c2e: f000 f821 bl 8007c74 <HAL_RCC_GetSysClockFreq>
8007c32: 4602 mov r2, r0
8007c34: 4b0b ldr r3, [pc, #44] @ (8007c64 <HAL_RCC_ClockConfig+0x1c4>)
8007c36: 685b ldr r3, [r3, #4]
8007c38: 091b lsrs r3, r3, #4
8007c3a: f003 030f and.w r3, r3, #15
8007c3e: 490a ldr r1, [pc, #40] @ (8007c68 <HAL_RCC_ClockConfig+0x1c8>)
8007c40: 5ccb ldrb r3, [r1, r3]
8007c42: fa22 f303 lsr.w r3, r2, r3
8007c46: 4a09 ldr r2, [pc, #36] @ (8007c6c <HAL_RCC_ClockConfig+0x1cc>)
8007c48: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
8007c4a: 4b09 ldr r3, [pc, #36] @ (8007c70 <HAL_RCC_ClockConfig+0x1d0>)
8007c4c: 681b ldr r3, [r3, #0]
8007c4e: 4618 mov r0, r3
8007c50: f7fc fc5e bl 8004510 <HAL_InitTick>
return HAL_OK;
8007c54: 2300 movs r3, #0
}
8007c56: 4618 mov r0, r3
8007c58: 3710 adds r7, #16
8007c5a: 46bd mov sp, r7
8007c5c: bd80 pop {r7, pc}
8007c5e: bf00 nop
8007c60: 40022000 .word 0x40022000
8007c64: 40021000 .word 0x40021000
8007c68: 0800e66c .word 0x0800e66c
8007c6c: 20000008 .word 0x20000008
8007c70: 2000000c .word 0x2000000c
08007c74 <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
8007c74: b480 push {r7}
8007c76: b087 sub sp, #28
8007c78: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8007c7a: 2300 movs r3, #0
8007c7c: 60fb str r3, [r7, #12]
8007c7e: 2300 movs r3, #0
8007c80: 60bb str r3, [r7, #8]
8007c82: 2300 movs r3, #0
8007c84: 617b str r3, [r7, #20]
8007c86: 2300 movs r3, #0
8007c88: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
8007c8a: 2300 movs r3, #0
8007c8c: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
8007c8e: 4b1e ldr r3, [pc, #120] @ (8007d08 <HAL_RCC_GetSysClockFreq+0x94>)
8007c90: 685b ldr r3, [r3, #4]
8007c92: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
8007c94: 68fb ldr r3, [r7, #12]
8007c96: f003 030c and.w r3, r3, #12
8007c9a: 2b04 cmp r3, #4
8007c9c: d002 beq.n 8007ca4 <HAL_RCC_GetSysClockFreq+0x30>
8007c9e: 2b08 cmp r3, #8
8007ca0: d003 beq.n 8007caa <HAL_RCC_GetSysClockFreq+0x36>
8007ca2: e027 b.n 8007cf4 <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
8007ca4: 4b19 ldr r3, [pc, #100] @ (8007d0c <HAL_RCC_GetSysClockFreq+0x98>)
8007ca6: 613b str r3, [r7, #16]
break;
8007ca8: e027 b.n 8007cfa <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
8007caa: 68fb ldr r3, [r7, #12]
8007cac: 0c9b lsrs r3, r3, #18
8007cae: f003 030f and.w r3, r3, #15
8007cb2: 4a17 ldr r2, [pc, #92] @ (8007d10 <HAL_RCC_GetSysClockFreq+0x9c>)
8007cb4: 5cd3 ldrb r3, [r2, r3]
8007cb6: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
8007cb8: 68fb ldr r3, [r7, #12]
8007cba: f403 3380 and.w r3, r3, #65536 @ 0x10000
8007cbe: 2b00 cmp r3, #0
8007cc0: d010 beq.n 8007ce4 <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
8007cc2: 4b11 ldr r3, [pc, #68] @ (8007d08 <HAL_RCC_GetSysClockFreq+0x94>)
8007cc4: 685b ldr r3, [r3, #4]
8007cc6: 0c5b lsrs r3, r3, #17
8007cc8: f003 0301 and.w r3, r3, #1
8007ccc: 4a11 ldr r2, [pc, #68] @ (8007d14 <HAL_RCC_GetSysClockFreq+0xa0>)
8007cce: 5cd3 ldrb r3, [r2, r3]
8007cd0: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
8007cd2: 687b ldr r3, [r7, #4]
8007cd4: 4a0d ldr r2, [pc, #52] @ (8007d0c <HAL_RCC_GetSysClockFreq+0x98>)
8007cd6: fb03 f202 mul.w r2, r3, r2
8007cda: 68bb ldr r3, [r7, #8]
8007cdc: fbb2 f3f3 udiv r3, r2, r3
8007ce0: 617b str r3, [r7, #20]
8007ce2: e004 b.n 8007cee <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
8007ce4: 687b ldr r3, [r7, #4]
8007ce6: 4a0c ldr r2, [pc, #48] @ (8007d18 <HAL_RCC_GetSysClockFreq+0xa4>)
8007ce8: fb02 f303 mul.w r3, r2, r3
8007cec: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
8007cee: 697b ldr r3, [r7, #20]
8007cf0: 613b str r3, [r7, #16]
break;
8007cf2: e002 b.n 8007cfa <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
8007cf4: 4b09 ldr r3, [pc, #36] @ (8007d1c <HAL_RCC_GetSysClockFreq+0xa8>)
8007cf6: 613b str r3, [r7, #16]
break;
8007cf8: bf00 nop
}
}
return sysclockfreq;
8007cfa: 693b ldr r3, [r7, #16]
}
8007cfc: 4618 mov r0, r3
8007cfe: 371c adds r7, #28
8007d00: 46bd mov sp, r7
8007d02: bc80 pop {r7}
8007d04: 4770 bx lr
8007d06: bf00 nop
8007d08: 40021000 .word 0x40021000
8007d0c: 00b71b00 .word 0x00b71b00
8007d10: 0800e684 .word 0x0800e684
8007d14: 0800e694 .word 0x0800e694
8007d18: 003d0900 .word 0x003d0900
8007d1c: 007a1200 .word 0x007a1200
08007d20 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
8007d20: b480 push {r7}
8007d22: af00 add r7, sp, #0
return SystemCoreClock;
8007d24: 4b02 ldr r3, [pc, #8] @ (8007d30 <HAL_RCC_GetHCLKFreq+0x10>)
8007d26: 681b ldr r3, [r3, #0]
}
8007d28: 4618 mov r0, r3
8007d2a: 46bd mov sp, r7
8007d2c: bc80 pop {r7}
8007d2e: 4770 bx lr
8007d30: 20000008 .word 0x20000008
08007d34 <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
8007d34: b580 push {r7, lr}
8007d36: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
8007d38: f7ff fff2 bl 8007d20 <HAL_RCC_GetHCLKFreq>
8007d3c: 4602 mov r2, r0
8007d3e: 4b05 ldr r3, [pc, #20] @ (8007d54 <HAL_RCC_GetPCLK1Freq+0x20>)
8007d40: 685b ldr r3, [r3, #4]
8007d42: 0a1b lsrs r3, r3, #8
8007d44: f003 0307 and.w r3, r3, #7
8007d48: 4903 ldr r1, [pc, #12] @ (8007d58 <HAL_RCC_GetPCLK1Freq+0x24>)
8007d4a: 5ccb ldrb r3, [r1, r3]
8007d4c: fa22 f303 lsr.w r3, r2, r3
}
8007d50: 4618 mov r0, r3
8007d52: bd80 pop {r7, pc}
8007d54: 40021000 .word 0x40021000
8007d58: 0800e67c .word 0x0800e67c
08007d5c <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
8007d5c: b580 push {r7, lr}
8007d5e: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
8007d60: f7ff ffde bl 8007d20 <HAL_RCC_GetHCLKFreq>
8007d64: 4602 mov r2, r0
8007d66: 4b05 ldr r3, [pc, #20] @ (8007d7c <HAL_RCC_GetPCLK2Freq+0x20>)
8007d68: 685b ldr r3, [r3, #4]
8007d6a: 0adb lsrs r3, r3, #11
8007d6c: f003 0307 and.w r3, r3, #7
8007d70: 4903 ldr r1, [pc, #12] @ (8007d80 <HAL_RCC_GetPCLK2Freq+0x24>)
8007d72: 5ccb ldrb r3, [r1, r3]
8007d74: fa22 f303 lsr.w r3, r2, r3
}
8007d78: 4618 mov r0, r3
8007d7a: bd80 pop {r7, pc}
8007d7c: 40021000 .word 0x40021000
8007d80: 0800e67c .word 0x0800e67c
08007d84 <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
8007d84: b480 push {r7}
8007d86: b085 sub sp, #20
8007d88: af00 add r7, sp, #0
8007d8a: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8007d8c: 4b0a ldr r3, [pc, #40] @ (8007db8 <RCC_Delay+0x34>)
8007d8e: 681b ldr r3, [r3, #0]
8007d90: 4a0a ldr r2, [pc, #40] @ (8007dbc <RCC_Delay+0x38>)
8007d92: fba2 2303 umull r2, r3, r2, r3
8007d96: 0a5b lsrs r3, r3, #9
8007d98: 687a ldr r2, [r7, #4]
8007d9a: fb02 f303 mul.w r3, r2, r3
8007d9e: 60fb str r3, [r7, #12]
do
{
__NOP();
8007da0: bf00 nop
}
while (Delay --);
8007da2: 68fb ldr r3, [r7, #12]
8007da4: 1e5a subs r2, r3, #1
8007da6: 60fa str r2, [r7, #12]
8007da8: 2b00 cmp r3, #0
8007daa: d1f9 bne.n 8007da0 <RCC_Delay+0x1c>
}
8007dac: bf00 nop
8007dae: bf00 nop
8007db0: 3714 adds r7, #20
8007db2: 46bd mov sp, r7
8007db4: bc80 pop {r7}
8007db6: 4770 bx lr
8007db8: 20000008 .word 0x20000008
8007dbc: 10624dd3 .word 0x10624dd3
08007dc0 <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8007dc0: b580 push {r7, lr}
8007dc2: b086 sub sp, #24
8007dc4: af00 add r7, sp, #0
8007dc6: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
8007dc8: 2300 movs r3, #0
8007dca: 613b str r3, [r7, #16]
8007dcc: 2300 movs r3, #0
8007dce: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8007dd0: 687b ldr r3, [r7, #4]
8007dd2: 681b ldr r3, [r3, #0]
8007dd4: f003 0301 and.w r3, r3, #1
8007dd8: 2b00 cmp r3, #0
8007dda: d07d beq.n 8007ed8 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
8007ddc: 2300 movs r3, #0
8007dde: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8007de0: 4b4f ldr r3, [pc, #316] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007de2: 69db ldr r3, [r3, #28]
8007de4: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8007de8: 2b00 cmp r3, #0
8007dea: d10d bne.n 8007e08 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
8007dec: 4b4c ldr r3, [pc, #304] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007dee: 69db ldr r3, [r3, #28]
8007df0: 4a4b ldr r2, [pc, #300] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007df2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8007df6: 61d3 str r3, [r2, #28]
8007df8: 4b49 ldr r3, [pc, #292] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007dfa: 69db ldr r3, [r3, #28]
8007dfc: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8007e00: 60bb str r3, [r7, #8]
8007e02: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
8007e04: 2301 movs r3, #1
8007e06: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007e08: 4b46 ldr r3, [pc, #280] @ (8007f24 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8007e0a: 681b ldr r3, [r3, #0]
8007e0c: f403 7380 and.w r3, r3, #256 @ 0x100
8007e10: 2b00 cmp r3, #0
8007e12: d118 bne.n 8007e46 <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
8007e14: 4b43 ldr r3, [pc, #268] @ (8007f24 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8007e16: 681b ldr r3, [r3, #0]
8007e18: 4a42 ldr r2, [pc, #264] @ (8007f24 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8007e1a: f443 7380 orr.w r3, r3, #256 @ 0x100
8007e1e: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
8007e20: f7fc fbb8 bl 8004594 <HAL_GetTick>
8007e24: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007e26: e008 b.n 8007e3a <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8007e28: f7fc fbb4 bl 8004594 <HAL_GetTick>
8007e2c: 4602 mov r2, r0
8007e2e: 693b ldr r3, [r7, #16]
8007e30: 1ad3 subs r3, r2, r3
8007e32: 2b64 cmp r3, #100 @ 0x64
8007e34: d901 bls.n 8007e3a <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
8007e36: 2303 movs r3, #3
8007e38: e06d b.n 8007f16 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8007e3a: 4b3a ldr r3, [pc, #232] @ (8007f24 <HAL_RCCEx_PeriphCLKConfig+0x164>)
8007e3c: 681b ldr r3, [r3, #0]
8007e3e: f403 7380 and.w r3, r3, #256 @ 0x100
8007e42: 2b00 cmp r3, #0
8007e44: d0f0 beq.n 8007e28 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
8007e46: 4b36 ldr r3, [pc, #216] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007e48: 6a1b ldr r3, [r3, #32]
8007e4a: f403 7340 and.w r3, r3, #768 @ 0x300
8007e4e: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
8007e50: 68fb ldr r3, [r7, #12]
8007e52: 2b00 cmp r3, #0
8007e54: d02e beq.n 8007eb4 <HAL_RCCEx_PeriphCLKConfig+0xf4>
8007e56: 687b ldr r3, [r7, #4]
8007e58: 685b ldr r3, [r3, #4]
8007e5a: f403 7340 and.w r3, r3, #768 @ 0x300
8007e5e: 68fa ldr r2, [r7, #12]
8007e60: 429a cmp r2, r3
8007e62: d027 beq.n 8007eb4 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
8007e64: 4b2e ldr r3, [pc, #184] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007e66: 6a1b ldr r3, [r3, #32]
8007e68: f423 7340 bic.w r3, r3, #768 @ 0x300
8007e6c: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
8007e6e: 4b2e ldr r3, [pc, #184] @ (8007f28 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8007e70: 2201 movs r2, #1
8007e72: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
8007e74: 4b2c ldr r3, [pc, #176] @ (8007f28 <HAL_RCCEx_PeriphCLKConfig+0x168>)
8007e76: 2200 movs r2, #0
8007e78: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8007e7a: 4a29 ldr r2, [pc, #164] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007e7c: 68fb ldr r3, [r7, #12]
8007e7e: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8007e80: 68fb ldr r3, [r7, #12]
8007e82: f003 0301 and.w r3, r3, #1
8007e86: 2b00 cmp r3, #0
8007e88: d014 beq.n 8007eb4 <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8007e8a: f7fc fb83 bl 8004594 <HAL_GetTick>
8007e8e: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8007e90: e00a b.n 8007ea8 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
8007e92: f7fc fb7f bl 8004594 <HAL_GetTick>
8007e96: 4602 mov r2, r0
8007e98: 693b ldr r3, [r7, #16]
8007e9a: 1ad3 subs r3, r2, r3
8007e9c: f241 3288 movw r2, #5000 @ 0x1388
8007ea0: 4293 cmp r3, r2
8007ea2: d901 bls.n 8007ea8 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
8007ea4: 2303 movs r3, #3
8007ea6: e036 b.n 8007f16 <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8007ea8: 4b1d ldr r3, [pc, #116] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007eaa: 6a1b ldr r3, [r3, #32]
8007eac: f003 0302 and.w r3, r3, #2
8007eb0: 2b00 cmp r3, #0
8007eb2: d0ee beq.n 8007e92 <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
8007eb4: 4b1a ldr r3, [pc, #104] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007eb6: 6a1b ldr r3, [r3, #32]
8007eb8: f423 7240 bic.w r2, r3, #768 @ 0x300
8007ebc: 687b ldr r3, [r7, #4]
8007ebe: 685b ldr r3, [r3, #4]
8007ec0: 4917 ldr r1, [pc, #92] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007ec2: 4313 orrs r3, r2
8007ec4: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
8007ec6: 7dfb ldrb r3, [r7, #23]
8007ec8: 2b01 cmp r3, #1
8007eca: d105 bne.n 8007ed8 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8007ecc: 4b14 ldr r3, [pc, #80] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007ece: 69db ldr r3, [r3, #28]
8007ed0: 4a13 ldr r2, [pc, #76] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007ed2: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8007ed6: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8007ed8: 687b ldr r3, [r7, #4]
8007eda: 681b ldr r3, [r3, #0]
8007edc: f003 0302 and.w r3, r3, #2
8007ee0: 2b00 cmp r3, #0
8007ee2: d008 beq.n 8007ef6 <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
8007ee4: 4b0e ldr r3, [pc, #56] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007ee6: 685b ldr r3, [r3, #4]
8007ee8: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8007eec: 687b ldr r3, [r7, #4]
8007eee: 689b ldr r3, [r3, #8]
8007ef0: 490b ldr r1, [pc, #44] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007ef2: 4313 orrs r3, r2
8007ef4: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
8007ef6: 687b ldr r3, [r7, #4]
8007ef8: 681b ldr r3, [r3, #0]
8007efa: f003 0310 and.w r3, r3, #16
8007efe: 2b00 cmp r3, #0
8007f00: d008 beq.n 8007f14 <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
8007f02: 4b07 ldr r3, [pc, #28] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007f04: 685b ldr r3, [r3, #4]
8007f06: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8007f0a: 687b ldr r3, [r7, #4]
8007f0c: 68db ldr r3, [r3, #12]
8007f0e: 4904 ldr r1, [pc, #16] @ (8007f20 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8007f10: 4313 orrs r3, r2
8007f12: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
8007f14: 2300 movs r3, #0
}
8007f16: 4618 mov r0, r3
8007f18: 3718 adds r7, #24
8007f1a: 46bd mov sp, r7
8007f1c: bd80 pop {r7, pc}
8007f1e: bf00 nop
8007f20: 40021000 .word 0x40021000
8007f24: 40007000 .word 0x40007000
8007f28: 42420440 .word 0x42420440
08007f2c <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
8007f2c: b580 push {r7, lr}
8007f2e: b082 sub sp, #8
8007f30: af00 add r7, sp, #0
8007f32: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8007f34: 687b ldr r3, [r7, #4]
8007f36: 2b00 cmp r3, #0
8007f38: d101 bne.n 8007f3e <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
8007f3a: 2301 movs r3, #1
8007f3c: e041 b.n 8007fc2 <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8007f3e: 687b ldr r3, [r7, #4]
8007f40: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8007f44: b2db uxtb r3, r3
8007f46: 2b00 cmp r3, #0
8007f48: d106 bne.n 8007f58 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8007f4a: 687b ldr r3, [r7, #4]
8007f4c: 2200 movs r2, #0
8007f4e: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
8007f52: 6878 ldr r0, [r7, #4]
8007f54: f7fc f952 bl 80041fc <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8007f58: 687b ldr r3, [r7, #4]
8007f5a: 2202 movs r2, #2
8007f5c: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8007f60: 687b ldr r3, [r7, #4]
8007f62: 681a ldr r2, [r3, #0]
8007f64: 687b ldr r3, [r7, #4]
8007f66: 3304 adds r3, #4
8007f68: 4619 mov r1, r3
8007f6a: 4610 mov r0, r2
8007f6c: f000 fb3e bl 80085ec <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8007f70: 687b ldr r3, [r7, #4]
8007f72: 2201 movs r2, #1
8007f74: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8007f78: 687b ldr r3, [r7, #4]
8007f7a: 2201 movs r2, #1
8007f7c: f883 203e strb.w r2, [r3, #62] @ 0x3e
8007f80: 687b ldr r3, [r7, #4]
8007f82: 2201 movs r2, #1
8007f84: f883 203f strb.w r2, [r3, #63] @ 0x3f
8007f88: 687b ldr r3, [r7, #4]
8007f8a: 2201 movs r2, #1
8007f8c: f883 2040 strb.w r2, [r3, #64] @ 0x40
8007f90: 687b ldr r3, [r7, #4]
8007f92: 2201 movs r2, #1
8007f94: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8007f98: 687b ldr r3, [r7, #4]
8007f9a: 2201 movs r2, #1
8007f9c: f883 2042 strb.w r2, [r3, #66] @ 0x42
8007fa0: 687b ldr r3, [r7, #4]
8007fa2: 2201 movs r2, #1
8007fa4: f883 2043 strb.w r2, [r3, #67] @ 0x43
8007fa8: 687b ldr r3, [r7, #4]
8007faa: 2201 movs r2, #1
8007fac: f883 2044 strb.w r2, [r3, #68] @ 0x44
8007fb0: 687b ldr r3, [r7, #4]
8007fb2: 2201 movs r2, #1
8007fb4: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8007fb8: 687b ldr r3, [r7, #4]
8007fba: 2201 movs r2, #1
8007fbc: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8007fc0: 2300 movs r3, #0
}
8007fc2: 4618 mov r0, r3
8007fc4: 3708 adds r7, #8
8007fc6: 46bd mov sp, r7
8007fc8: bd80 pop {r7, pc}
08007fca <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8007fca: b580 push {r7, lr}
8007fcc: b082 sub sp, #8
8007fce: af00 add r7, sp, #0
8007fd0: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8007fd2: 687b ldr r3, [r7, #4]
8007fd4: 2b00 cmp r3, #0
8007fd6: d101 bne.n 8007fdc <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8007fd8: 2301 movs r3, #1
8007fda: e041 b.n 8008060 <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8007fdc: 687b ldr r3, [r7, #4]
8007fde: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8007fe2: b2db uxtb r3, r3
8007fe4: 2b00 cmp r3, #0
8007fe6: d106 bne.n 8007ff6 <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8007fe8: 687b ldr r3, [r7, #4]
8007fea: 2200 movs r2, #0
8007fec: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
8007ff0: 6878 ldr r0, [r7, #4]
8007ff2: f000 f839 bl 8008068 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8007ff6: 687b ldr r3, [r7, #4]
8007ff8: 2202 movs r2, #2
8007ffa: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8007ffe: 687b ldr r3, [r7, #4]
8008000: 681a ldr r2, [r3, #0]
8008002: 687b ldr r3, [r7, #4]
8008004: 3304 adds r3, #4
8008006: 4619 mov r1, r3
8008008: 4610 mov r0, r2
800800a: f000 faef bl 80085ec <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
800800e: 687b ldr r3, [r7, #4]
8008010: 2201 movs r2, #1
8008012: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008016: 687b ldr r3, [r7, #4]
8008018: 2201 movs r2, #1
800801a: f883 203e strb.w r2, [r3, #62] @ 0x3e
800801e: 687b ldr r3, [r7, #4]
8008020: 2201 movs r2, #1
8008022: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008026: 687b ldr r3, [r7, #4]
8008028: 2201 movs r2, #1
800802a: f883 2040 strb.w r2, [r3, #64] @ 0x40
800802e: 687b ldr r3, [r7, #4]
8008030: 2201 movs r2, #1
8008032: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008036: 687b ldr r3, [r7, #4]
8008038: 2201 movs r2, #1
800803a: f883 2042 strb.w r2, [r3, #66] @ 0x42
800803e: 687b ldr r3, [r7, #4]
8008040: 2201 movs r2, #1
8008042: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008046: 687b ldr r3, [r7, #4]
8008048: 2201 movs r2, #1
800804a: f883 2044 strb.w r2, [r3, #68] @ 0x44
800804e: 687b ldr r3, [r7, #4]
8008050: 2201 movs r2, #1
8008052: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008056: 687b ldr r3, [r7, #4]
8008058: 2201 movs r2, #1
800805a: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
800805e: 2300 movs r3, #0
}
8008060: 4618 mov r0, r3
8008062: 3708 adds r7, #8
8008064: 46bd mov sp, r7
8008066: bd80 pop {r7, pc}
08008068 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8008068: b480 push {r7}
800806a: b083 sub sp, #12
800806c: af00 add r7, sp, #0
800806e: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8008070: bf00 nop
8008072: 370c adds r7, #12
8008074: 46bd mov sp, r7
8008076: bc80 pop {r7}
8008078: 4770 bx lr
...
0800807c <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
800807c: b580 push {r7, lr}
800807e: b084 sub sp, #16
8008080: af00 add r7, sp, #0
8008082: 6078 str r0, [r7, #4]
8008084: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8008086: 683b ldr r3, [r7, #0]
8008088: 2b00 cmp r3, #0
800808a: d109 bne.n 80080a0 <HAL_TIM_PWM_Start+0x24>
800808c: 687b ldr r3, [r7, #4]
800808e: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8008092: b2db uxtb r3, r3
8008094: 2b01 cmp r3, #1
8008096: bf14 ite ne
8008098: 2301 movne r3, #1
800809a: 2300 moveq r3, #0
800809c: b2db uxtb r3, r3
800809e: e022 b.n 80080e6 <HAL_TIM_PWM_Start+0x6a>
80080a0: 683b ldr r3, [r7, #0]
80080a2: 2b04 cmp r3, #4
80080a4: d109 bne.n 80080ba <HAL_TIM_PWM_Start+0x3e>
80080a6: 687b ldr r3, [r7, #4]
80080a8: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
80080ac: b2db uxtb r3, r3
80080ae: 2b01 cmp r3, #1
80080b0: bf14 ite ne
80080b2: 2301 movne r3, #1
80080b4: 2300 moveq r3, #0
80080b6: b2db uxtb r3, r3
80080b8: e015 b.n 80080e6 <HAL_TIM_PWM_Start+0x6a>
80080ba: 683b ldr r3, [r7, #0]
80080bc: 2b08 cmp r3, #8
80080be: d109 bne.n 80080d4 <HAL_TIM_PWM_Start+0x58>
80080c0: 687b ldr r3, [r7, #4]
80080c2: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
80080c6: b2db uxtb r3, r3
80080c8: 2b01 cmp r3, #1
80080ca: bf14 ite ne
80080cc: 2301 movne r3, #1
80080ce: 2300 moveq r3, #0
80080d0: b2db uxtb r3, r3
80080d2: e008 b.n 80080e6 <HAL_TIM_PWM_Start+0x6a>
80080d4: 687b ldr r3, [r7, #4]
80080d6: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80080da: b2db uxtb r3, r3
80080dc: 2b01 cmp r3, #1
80080de: bf14 ite ne
80080e0: 2301 movne r3, #1
80080e2: 2300 moveq r3, #0
80080e4: b2db uxtb r3, r3
80080e6: 2b00 cmp r3, #0
80080e8: d001 beq.n 80080ee <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
80080ea: 2301 movs r3, #1
80080ec: e05e b.n 80081ac <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
80080ee: 683b ldr r3, [r7, #0]
80080f0: 2b00 cmp r3, #0
80080f2: d104 bne.n 80080fe <HAL_TIM_PWM_Start+0x82>
80080f4: 687b ldr r3, [r7, #4]
80080f6: 2202 movs r2, #2
80080f8: f883 203e strb.w r2, [r3, #62] @ 0x3e
80080fc: e013 b.n 8008126 <HAL_TIM_PWM_Start+0xaa>
80080fe: 683b ldr r3, [r7, #0]
8008100: 2b04 cmp r3, #4
8008102: d104 bne.n 800810e <HAL_TIM_PWM_Start+0x92>
8008104: 687b ldr r3, [r7, #4]
8008106: 2202 movs r2, #2
8008108: f883 203f strb.w r2, [r3, #63] @ 0x3f
800810c: e00b b.n 8008126 <HAL_TIM_PWM_Start+0xaa>
800810e: 683b ldr r3, [r7, #0]
8008110: 2b08 cmp r3, #8
8008112: d104 bne.n 800811e <HAL_TIM_PWM_Start+0xa2>
8008114: 687b ldr r3, [r7, #4]
8008116: 2202 movs r2, #2
8008118: f883 2040 strb.w r2, [r3, #64] @ 0x40
800811c: e003 b.n 8008126 <HAL_TIM_PWM_Start+0xaa>
800811e: 687b ldr r3, [r7, #4]
8008120: 2202 movs r2, #2
8008122: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
8008126: 687b ldr r3, [r7, #4]
8008128: 681b ldr r3, [r3, #0]
800812a: 2201 movs r2, #1
800812c: 6839 ldr r1, [r7, #0]
800812e: 4618 mov r0, r3
8008130: f000 fce8 bl 8008b04 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008134: 687b ldr r3, [r7, #4]
8008136: 681b ldr r3, [r3, #0]
8008138: 4a1e ldr r2, [pc, #120] @ (80081b4 <HAL_TIM_PWM_Start+0x138>)
800813a: 4293 cmp r3, r2
800813c: d107 bne.n 800814e <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
800813e: 687b ldr r3, [r7, #4]
8008140: 681b ldr r3, [r3, #0]
8008142: 6c5a ldr r2, [r3, #68] @ 0x44
8008144: 687b ldr r3, [r7, #4]
8008146: 681b ldr r3, [r3, #0]
8008148: f442 4200 orr.w r2, r2, #32768 @ 0x8000
800814c: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
800814e: 687b ldr r3, [r7, #4]
8008150: 681b ldr r3, [r3, #0]
8008152: 4a18 ldr r2, [pc, #96] @ (80081b4 <HAL_TIM_PWM_Start+0x138>)
8008154: 4293 cmp r3, r2
8008156: d00e beq.n 8008176 <HAL_TIM_PWM_Start+0xfa>
8008158: 687b ldr r3, [r7, #4]
800815a: 681b ldr r3, [r3, #0]
800815c: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008160: d009 beq.n 8008176 <HAL_TIM_PWM_Start+0xfa>
8008162: 687b ldr r3, [r7, #4]
8008164: 681b ldr r3, [r3, #0]
8008166: 4a14 ldr r2, [pc, #80] @ (80081b8 <HAL_TIM_PWM_Start+0x13c>)
8008168: 4293 cmp r3, r2
800816a: d004 beq.n 8008176 <HAL_TIM_PWM_Start+0xfa>
800816c: 687b ldr r3, [r7, #4]
800816e: 681b ldr r3, [r3, #0]
8008170: 4a12 ldr r2, [pc, #72] @ (80081bc <HAL_TIM_PWM_Start+0x140>)
8008172: 4293 cmp r3, r2
8008174: d111 bne.n 800819a <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8008176: 687b ldr r3, [r7, #4]
8008178: 681b ldr r3, [r3, #0]
800817a: 689b ldr r3, [r3, #8]
800817c: f003 0307 and.w r3, r3, #7
8008180: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008182: 68fb ldr r3, [r7, #12]
8008184: 2b06 cmp r3, #6
8008186: d010 beq.n 80081aa <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8008188: 687b ldr r3, [r7, #4]
800818a: 681b ldr r3, [r3, #0]
800818c: 681a ldr r2, [r3, #0]
800818e: 687b ldr r3, [r7, #4]
8008190: 681b ldr r3, [r3, #0]
8008192: f042 0201 orr.w r2, r2, #1
8008196: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008198: e007 b.n 80081aa <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
800819a: 687b ldr r3, [r7, #4]
800819c: 681b ldr r3, [r3, #0]
800819e: 681a ldr r2, [r3, #0]
80081a0: 687b ldr r3, [r7, #4]
80081a2: 681b ldr r3, [r3, #0]
80081a4: f042 0201 orr.w r2, r2, #1
80081a8: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
80081aa: 2300 movs r3, #0
}
80081ac: 4618 mov r0, r3
80081ae: 3710 adds r7, #16
80081b0: 46bd mov sp, r7
80081b2: bd80 pop {r7, pc}
80081b4: 40012c00 .word 0x40012c00
80081b8: 40000400 .word 0x40000400
80081bc: 40000800 .word 0x40000800
080081c0 <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
80081c0: b580 push {r7, lr}
80081c2: b082 sub sp, #8
80081c4: af00 add r7, sp, #0
80081c6: 6078 str r0, [r7, #4]
80081c8: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
80081ca: 687b ldr r3, [r7, #4]
80081cc: 681b ldr r3, [r3, #0]
80081ce: 2200 movs r2, #0
80081d0: 6839 ldr r1, [r7, #0]
80081d2: 4618 mov r0, r3
80081d4: f000 fc96 bl 8008b04 <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
80081d8: 687b ldr r3, [r7, #4]
80081da: 681b ldr r3, [r3, #0]
80081dc: 4a29 ldr r2, [pc, #164] @ (8008284 <HAL_TIM_PWM_Stop+0xc4>)
80081de: 4293 cmp r3, r2
80081e0: d117 bne.n 8008212 <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
80081e2: 687b ldr r3, [r7, #4]
80081e4: 681b ldr r3, [r3, #0]
80081e6: 6a1a ldr r2, [r3, #32]
80081e8: f241 1311 movw r3, #4369 @ 0x1111
80081ec: 4013 ands r3, r2
80081ee: 2b00 cmp r3, #0
80081f0: d10f bne.n 8008212 <HAL_TIM_PWM_Stop+0x52>
80081f2: 687b ldr r3, [r7, #4]
80081f4: 681b ldr r3, [r3, #0]
80081f6: 6a1a ldr r2, [r3, #32]
80081f8: f240 4344 movw r3, #1092 @ 0x444
80081fc: 4013 ands r3, r2
80081fe: 2b00 cmp r3, #0
8008200: d107 bne.n 8008212 <HAL_TIM_PWM_Stop+0x52>
8008202: 687b ldr r3, [r7, #4]
8008204: 681b ldr r3, [r3, #0]
8008206: 6c5a ldr r2, [r3, #68] @ 0x44
8008208: 687b ldr r3, [r7, #4]
800820a: 681b ldr r3, [r3, #0]
800820c: f422 4200 bic.w r2, r2, #32768 @ 0x8000
8008210: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
8008212: 687b ldr r3, [r7, #4]
8008214: 681b ldr r3, [r3, #0]
8008216: 6a1a ldr r2, [r3, #32]
8008218: f241 1311 movw r3, #4369 @ 0x1111
800821c: 4013 ands r3, r2
800821e: 2b00 cmp r3, #0
8008220: d10f bne.n 8008242 <HAL_TIM_PWM_Stop+0x82>
8008222: 687b ldr r3, [r7, #4]
8008224: 681b ldr r3, [r3, #0]
8008226: 6a1a ldr r2, [r3, #32]
8008228: f240 4344 movw r3, #1092 @ 0x444
800822c: 4013 ands r3, r2
800822e: 2b00 cmp r3, #0
8008230: d107 bne.n 8008242 <HAL_TIM_PWM_Stop+0x82>
8008232: 687b ldr r3, [r7, #4]
8008234: 681b ldr r3, [r3, #0]
8008236: 681a ldr r2, [r3, #0]
8008238: 687b ldr r3, [r7, #4]
800823a: 681b ldr r3, [r3, #0]
800823c: f022 0201 bic.w r2, r2, #1
8008240: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
8008242: 683b ldr r3, [r7, #0]
8008244: 2b00 cmp r3, #0
8008246: d104 bne.n 8008252 <HAL_TIM_PWM_Stop+0x92>
8008248: 687b ldr r3, [r7, #4]
800824a: 2201 movs r2, #1
800824c: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008250: e013 b.n 800827a <HAL_TIM_PWM_Stop+0xba>
8008252: 683b ldr r3, [r7, #0]
8008254: 2b04 cmp r3, #4
8008256: d104 bne.n 8008262 <HAL_TIM_PWM_Stop+0xa2>
8008258: 687b ldr r3, [r7, #4]
800825a: 2201 movs r2, #1
800825c: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008260: e00b b.n 800827a <HAL_TIM_PWM_Stop+0xba>
8008262: 683b ldr r3, [r7, #0]
8008264: 2b08 cmp r3, #8
8008266: d104 bne.n 8008272 <HAL_TIM_PWM_Stop+0xb2>
8008268: 687b ldr r3, [r7, #4]
800826a: 2201 movs r2, #1
800826c: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008270: e003 b.n 800827a <HAL_TIM_PWM_Stop+0xba>
8008272: 687b ldr r3, [r7, #4]
8008274: 2201 movs r2, #1
8008276: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
800827a: 2300 movs r3, #0
}
800827c: 4618 mov r0, r3
800827e: 3708 adds r7, #8
8008280: 46bd mov sp, r7
8008282: bd80 pop {r7, pc}
8008284: 40012c00 .word 0x40012c00
08008288 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8008288: b580 push {r7, lr}
800828a: b086 sub sp, #24
800828c: af00 add r7, sp, #0
800828e: 60f8 str r0, [r7, #12]
8008290: 60b9 str r1, [r7, #8]
8008292: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8008294: 2300 movs r3, #0
8008296: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8008298: 68fb ldr r3, [r7, #12]
800829a: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
800829e: 2b01 cmp r3, #1
80082a0: d101 bne.n 80082a6 <HAL_TIM_PWM_ConfigChannel+0x1e>
80082a2: 2302 movs r3, #2
80082a4: e0ae b.n 8008404 <HAL_TIM_PWM_ConfigChannel+0x17c>
80082a6: 68fb ldr r3, [r7, #12]
80082a8: 2201 movs r2, #1
80082aa: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
80082ae: 687b ldr r3, [r7, #4]
80082b0: 2b0c cmp r3, #12
80082b2: f200 809f bhi.w 80083f4 <HAL_TIM_PWM_ConfigChannel+0x16c>
80082b6: a201 add r2, pc, #4 @ (adr r2, 80082bc <HAL_TIM_PWM_ConfigChannel+0x34>)
80082b8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80082bc: 080082f1 .word 0x080082f1
80082c0: 080083f5 .word 0x080083f5
80082c4: 080083f5 .word 0x080083f5
80082c8: 080083f5 .word 0x080083f5
80082cc: 08008331 .word 0x08008331
80082d0: 080083f5 .word 0x080083f5
80082d4: 080083f5 .word 0x080083f5
80082d8: 080083f5 .word 0x080083f5
80082dc: 08008373 .word 0x08008373
80082e0: 080083f5 .word 0x080083f5
80082e4: 080083f5 .word 0x080083f5
80082e8: 080083f5 .word 0x080083f5
80082ec: 080083b3 .word 0x080083b3
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
80082f0: 68fb ldr r3, [r7, #12]
80082f2: 681b ldr r3, [r3, #0]
80082f4: 68b9 ldr r1, [r7, #8]
80082f6: 4618 mov r0, r3
80082f8: f000 f9e6 bl 80086c8 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
80082fc: 68fb ldr r3, [r7, #12]
80082fe: 681b ldr r3, [r3, #0]
8008300: 699a ldr r2, [r3, #24]
8008302: 68fb ldr r3, [r7, #12]
8008304: 681b ldr r3, [r3, #0]
8008306: f042 0208 orr.w r2, r2, #8
800830a: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
800830c: 68fb ldr r3, [r7, #12]
800830e: 681b ldr r3, [r3, #0]
8008310: 699a ldr r2, [r3, #24]
8008312: 68fb ldr r3, [r7, #12]
8008314: 681b ldr r3, [r3, #0]
8008316: f022 0204 bic.w r2, r2, #4
800831a: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
800831c: 68fb ldr r3, [r7, #12]
800831e: 681b ldr r3, [r3, #0]
8008320: 6999 ldr r1, [r3, #24]
8008322: 68bb ldr r3, [r7, #8]
8008324: 691a ldr r2, [r3, #16]
8008326: 68fb ldr r3, [r7, #12]
8008328: 681b ldr r3, [r3, #0]
800832a: 430a orrs r2, r1
800832c: 619a str r2, [r3, #24]
break;
800832e: e064 b.n 80083fa <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
8008330: 68fb ldr r3, [r7, #12]
8008332: 681b ldr r3, [r3, #0]
8008334: 68b9 ldr r1, [r7, #8]
8008336: 4618 mov r0, r3
8008338: f000 fa2c bl 8008794 <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
800833c: 68fb ldr r3, [r7, #12]
800833e: 681b ldr r3, [r3, #0]
8008340: 699a ldr r2, [r3, #24]
8008342: 68fb ldr r3, [r7, #12]
8008344: 681b ldr r3, [r3, #0]
8008346: f442 6200 orr.w r2, r2, #2048 @ 0x800
800834a: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
800834c: 68fb ldr r3, [r7, #12]
800834e: 681b ldr r3, [r3, #0]
8008350: 699a ldr r2, [r3, #24]
8008352: 68fb ldr r3, [r7, #12]
8008354: 681b ldr r3, [r3, #0]
8008356: f422 6280 bic.w r2, r2, #1024 @ 0x400
800835a: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
800835c: 68fb ldr r3, [r7, #12]
800835e: 681b ldr r3, [r3, #0]
8008360: 6999 ldr r1, [r3, #24]
8008362: 68bb ldr r3, [r7, #8]
8008364: 691b ldr r3, [r3, #16]
8008366: 021a lsls r2, r3, #8
8008368: 68fb ldr r3, [r7, #12]
800836a: 681b ldr r3, [r3, #0]
800836c: 430a orrs r2, r1
800836e: 619a str r2, [r3, #24]
break;
8008370: e043 b.n 80083fa <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8008372: 68fb ldr r3, [r7, #12]
8008374: 681b ldr r3, [r3, #0]
8008376: 68b9 ldr r1, [r7, #8]
8008378: 4618 mov r0, r3
800837a: f000 fa75 bl 8008868 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
800837e: 68fb ldr r3, [r7, #12]
8008380: 681b ldr r3, [r3, #0]
8008382: 69da ldr r2, [r3, #28]
8008384: 68fb ldr r3, [r7, #12]
8008386: 681b ldr r3, [r3, #0]
8008388: f042 0208 orr.w r2, r2, #8
800838c: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
800838e: 68fb ldr r3, [r7, #12]
8008390: 681b ldr r3, [r3, #0]
8008392: 69da ldr r2, [r3, #28]
8008394: 68fb ldr r3, [r7, #12]
8008396: 681b ldr r3, [r3, #0]
8008398: f022 0204 bic.w r2, r2, #4
800839c: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
800839e: 68fb ldr r3, [r7, #12]
80083a0: 681b ldr r3, [r3, #0]
80083a2: 69d9 ldr r1, [r3, #28]
80083a4: 68bb ldr r3, [r7, #8]
80083a6: 691a ldr r2, [r3, #16]
80083a8: 68fb ldr r3, [r7, #12]
80083aa: 681b ldr r3, [r3, #0]
80083ac: 430a orrs r2, r1
80083ae: 61da str r2, [r3, #28]
break;
80083b0: e023 b.n 80083fa <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
80083b2: 68fb ldr r3, [r7, #12]
80083b4: 681b ldr r3, [r3, #0]
80083b6: 68b9 ldr r1, [r7, #8]
80083b8: 4618 mov r0, r3
80083ba: f000 fabf bl 800893c <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
80083be: 68fb ldr r3, [r7, #12]
80083c0: 681b ldr r3, [r3, #0]
80083c2: 69da ldr r2, [r3, #28]
80083c4: 68fb ldr r3, [r7, #12]
80083c6: 681b ldr r3, [r3, #0]
80083c8: f442 6200 orr.w r2, r2, #2048 @ 0x800
80083cc: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
80083ce: 68fb ldr r3, [r7, #12]
80083d0: 681b ldr r3, [r3, #0]
80083d2: 69da ldr r2, [r3, #28]
80083d4: 68fb ldr r3, [r7, #12]
80083d6: 681b ldr r3, [r3, #0]
80083d8: f422 6280 bic.w r2, r2, #1024 @ 0x400
80083dc: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
80083de: 68fb ldr r3, [r7, #12]
80083e0: 681b ldr r3, [r3, #0]
80083e2: 69d9 ldr r1, [r3, #28]
80083e4: 68bb ldr r3, [r7, #8]
80083e6: 691b ldr r3, [r3, #16]
80083e8: 021a lsls r2, r3, #8
80083ea: 68fb ldr r3, [r7, #12]
80083ec: 681b ldr r3, [r3, #0]
80083ee: 430a orrs r2, r1
80083f0: 61da str r2, [r3, #28]
break;
80083f2: e002 b.n 80083fa <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
80083f4: 2301 movs r3, #1
80083f6: 75fb strb r3, [r7, #23]
break;
80083f8: bf00 nop
}
__HAL_UNLOCK(htim);
80083fa: 68fb ldr r3, [r7, #12]
80083fc: 2200 movs r2, #0
80083fe: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8008402: 7dfb ldrb r3, [r7, #23]
}
8008404: 4618 mov r0, r3
8008406: 3718 adds r7, #24
8008408: 46bd mov sp, r7
800840a: bd80 pop {r7, pc}
0800840c <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
800840c: b580 push {r7, lr}
800840e: b084 sub sp, #16
8008410: af00 add r7, sp, #0
8008412: 6078 str r0, [r7, #4]
8008414: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8008416: 2300 movs r3, #0
8008418: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
800841a: 687b ldr r3, [r7, #4]
800841c: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8008420: 2b01 cmp r3, #1
8008422: d101 bne.n 8008428 <HAL_TIM_ConfigClockSource+0x1c>
8008424: 2302 movs r3, #2
8008426: e0b4 b.n 8008592 <HAL_TIM_ConfigClockSource+0x186>
8008428: 687b ldr r3, [r7, #4]
800842a: 2201 movs r2, #1
800842c: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
8008430: 687b ldr r3, [r7, #4]
8008432: 2202 movs r2, #2
8008434: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8008438: 687b ldr r3, [r7, #4]
800843a: 681b ldr r3, [r3, #0]
800843c: 689b ldr r3, [r3, #8]
800843e: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
8008440: 68bb ldr r3, [r7, #8]
8008442: f023 0377 bic.w r3, r3, #119 @ 0x77
8008446: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8008448: 68bb ldr r3, [r7, #8]
800844a: f423 437f bic.w r3, r3, #65280 @ 0xff00
800844e: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
8008450: 687b ldr r3, [r7, #4]
8008452: 681b ldr r3, [r3, #0]
8008454: 68ba ldr r2, [r7, #8]
8008456: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8008458: 683b ldr r3, [r7, #0]
800845a: 681b ldr r3, [r3, #0]
800845c: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008460: d03e beq.n 80084e0 <HAL_TIM_ConfigClockSource+0xd4>
8008462: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008466: f200 8087 bhi.w 8008578 <HAL_TIM_ConfigClockSource+0x16c>
800846a: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
800846e: f000 8086 beq.w 800857e <HAL_TIM_ConfigClockSource+0x172>
8008472: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008476: d87f bhi.n 8008578 <HAL_TIM_ConfigClockSource+0x16c>
8008478: 2b70 cmp r3, #112 @ 0x70
800847a: d01a beq.n 80084b2 <HAL_TIM_ConfigClockSource+0xa6>
800847c: 2b70 cmp r3, #112 @ 0x70
800847e: d87b bhi.n 8008578 <HAL_TIM_ConfigClockSource+0x16c>
8008480: 2b60 cmp r3, #96 @ 0x60
8008482: d050 beq.n 8008526 <HAL_TIM_ConfigClockSource+0x11a>
8008484: 2b60 cmp r3, #96 @ 0x60
8008486: d877 bhi.n 8008578 <HAL_TIM_ConfigClockSource+0x16c>
8008488: 2b50 cmp r3, #80 @ 0x50
800848a: d03c beq.n 8008506 <HAL_TIM_ConfigClockSource+0xfa>
800848c: 2b50 cmp r3, #80 @ 0x50
800848e: d873 bhi.n 8008578 <HAL_TIM_ConfigClockSource+0x16c>
8008490: 2b40 cmp r3, #64 @ 0x40
8008492: d058 beq.n 8008546 <HAL_TIM_ConfigClockSource+0x13a>
8008494: 2b40 cmp r3, #64 @ 0x40
8008496: d86f bhi.n 8008578 <HAL_TIM_ConfigClockSource+0x16c>
8008498: 2b30 cmp r3, #48 @ 0x30
800849a: d064 beq.n 8008566 <HAL_TIM_ConfigClockSource+0x15a>
800849c: 2b30 cmp r3, #48 @ 0x30
800849e: d86b bhi.n 8008578 <HAL_TIM_ConfigClockSource+0x16c>
80084a0: 2b20 cmp r3, #32
80084a2: d060 beq.n 8008566 <HAL_TIM_ConfigClockSource+0x15a>
80084a4: 2b20 cmp r3, #32
80084a6: d867 bhi.n 8008578 <HAL_TIM_ConfigClockSource+0x16c>
80084a8: 2b00 cmp r3, #0
80084aa: d05c beq.n 8008566 <HAL_TIM_ConfigClockSource+0x15a>
80084ac: 2b10 cmp r3, #16
80084ae: d05a beq.n 8008566 <HAL_TIM_ConfigClockSource+0x15a>
80084b0: e062 b.n 8008578 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
80084b2: 687b ldr r3, [r7, #4]
80084b4: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
80084b6: 683b ldr r3, [r7, #0]
80084b8: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
80084ba: 683b ldr r3, [r7, #0]
80084bc: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
80084be: 683b ldr r3, [r7, #0]
80084c0: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80084c2: f000 fb00 bl 8008ac6 <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
80084c6: 687b ldr r3, [r7, #4]
80084c8: 681b ldr r3, [r3, #0]
80084ca: 689b ldr r3, [r3, #8]
80084cc: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
80084ce: 68bb ldr r3, [r7, #8]
80084d0: f043 0377 orr.w r3, r3, #119 @ 0x77
80084d4: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
80084d6: 687b ldr r3, [r7, #4]
80084d8: 681b ldr r3, [r3, #0]
80084da: 68ba ldr r2, [r7, #8]
80084dc: 609a str r2, [r3, #8]
break;
80084de: e04f b.n 8008580 <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
80084e0: 687b ldr r3, [r7, #4]
80084e2: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
80084e4: 683b ldr r3, [r7, #0]
80084e6: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
80084e8: 683b ldr r3, [r7, #0]
80084ea: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
80084ec: 683b ldr r3, [r7, #0]
80084ee: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
80084f0: f000 fae9 bl 8008ac6 <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
80084f4: 687b ldr r3, [r7, #4]
80084f6: 681b ldr r3, [r3, #0]
80084f8: 689a ldr r2, [r3, #8]
80084fa: 687b ldr r3, [r7, #4]
80084fc: 681b ldr r3, [r3, #0]
80084fe: f442 4280 orr.w r2, r2, #16384 @ 0x4000
8008502: 609a str r2, [r3, #8]
break;
8008504: e03c b.n 8008580 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8008506: 687b ldr r3, [r7, #4]
8008508: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
800850a: 683b ldr r3, [r7, #0]
800850c: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800850e: 683b ldr r3, [r7, #0]
8008510: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8008512: 461a mov r2, r3
8008514: f000 fa60 bl 80089d8 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
8008518: 687b ldr r3, [r7, #4]
800851a: 681b ldr r3, [r3, #0]
800851c: 2150 movs r1, #80 @ 0x50
800851e: 4618 mov r0, r3
8008520: f000 fab7 bl 8008a92 <TIM_ITRx_SetConfig>
break;
8008524: e02c b.n 8008580 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
8008526: 687b ldr r3, [r7, #4]
8008528: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
800852a: 683b ldr r3, [r7, #0]
800852c: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800852e: 683b ldr r3, [r7, #0]
8008530: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
8008532: 461a mov r2, r3
8008534: f000 fa7e bl 8008a34 <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
8008538: 687b ldr r3, [r7, #4]
800853a: 681b ldr r3, [r3, #0]
800853c: 2160 movs r1, #96 @ 0x60
800853e: 4618 mov r0, r3
8008540: f000 faa7 bl 8008a92 <TIM_ITRx_SetConfig>
break;
8008544: e01c b.n 8008580 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8008546: 687b ldr r3, [r7, #4]
8008548: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
800854a: 683b ldr r3, [r7, #0]
800854c: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
800854e: 683b ldr r3, [r7, #0]
8008550: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8008552: 461a mov r2, r3
8008554: f000 fa40 bl 80089d8 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8008558: 687b ldr r3, [r7, #4]
800855a: 681b ldr r3, [r3, #0]
800855c: 2140 movs r1, #64 @ 0x40
800855e: 4618 mov r0, r3
8008560: f000 fa97 bl 8008a92 <TIM_ITRx_SetConfig>
break;
8008564: e00c b.n 8008580 <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
8008566: 687b ldr r3, [r7, #4]
8008568: 681a ldr r2, [r3, #0]
800856a: 683b ldr r3, [r7, #0]
800856c: 681b ldr r3, [r3, #0]
800856e: 4619 mov r1, r3
8008570: 4610 mov r0, r2
8008572: f000 fa8e bl 8008a92 <TIM_ITRx_SetConfig>
break;
8008576: e003 b.n 8008580 <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8008578: 2301 movs r3, #1
800857a: 73fb strb r3, [r7, #15]
break;
800857c: e000 b.n 8008580 <HAL_TIM_ConfigClockSource+0x174>
break;
800857e: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
8008580: 687b ldr r3, [r7, #4]
8008582: 2201 movs r2, #1
8008584: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8008588: 687b ldr r3, [r7, #4]
800858a: 2200 movs r2, #0
800858c: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8008590: 7bfb ldrb r3, [r7, #15]
}
8008592: 4618 mov r0, r3
8008594: 3710 adds r7, #16
8008596: 46bd mov sp, r7
8008598: bd80 pop {r7, pc}
0800859a <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
800859a: b480 push {r7}
800859c: b085 sub sp, #20
800859e: af00 add r7, sp, #0
80085a0: 6078 str r0, [r7, #4]
80085a2: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
80085a4: 683b ldr r3, [r7, #0]
80085a6: 2b00 cmp r3, #0
80085a8: d104 bne.n 80085b4 <HAL_TIM_GetChannelState+0x1a>
80085aa: 687b ldr r3, [r7, #4]
80085ac: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
80085b0: b2db uxtb r3, r3
80085b2: e013 b.n 80085dc <HAL_TIM_GetChannelState+0x42>
80085b4: 683b ldr r3, [r7, #0]
80085b6: 2b04 cmp r3, #4
80085b8: d104 bne.n 80085c4 <HAL_TIM_GetChannelState+0x2a>
80085ba: 687b ldr r3, [r7, #4]
80085bc: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
80085c0: b2db uxtb r3, r3
80085c2: e00b b.n 80085dc <HAL_TIM_GetChannelState+0x42>
80085c4: 683b ldr r3, [r7, #0]
80085c6: 2b08 cmp r3, #8
80085c8: d104 bne.n 80085d4 <HAL_TIM_GetChannelState+0x3a>
80085ca: 687b ldr r3, [r7, #4]
80085cc: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
80085d0: b2db uxtb r3, r3
80085d2: e003 b.n 80085dc <HAL_TIM_GetChannelState+0x42>
80085d4: 687b ldr r3, [r7, #4]
80085d6: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80085da: b2db uxtb r3, r3
80085dc: 73fb strb r3, [r7, #15]
return channel_state;
80085de: 7bfb ldrb r3, [r7, #15]
}
80085e0: 4618 mov r0, r3
80085e2: 3714 adds r7, #20
80085e4: 46bd mov sp, r7
80085e6: bc80 pop {r7}
80085e8: 4770 bx lr
...
080085ec <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
80085ec: b480 push {r7}
80085ee: b085 sub sp, #20
80085f0: af00 add r7, sp, #0
80085f2: 6078 str r0, [r7, #4]
80085f4: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
80085f6: 687b ldr r3, [r7, #4]
80085f8: 681b ldr r3, [r3, #0]
80085fa: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
80085fc: 687b ldr r3, [r7, #4]
80085fe: 4a2f ldr r2, [pc, #188] @ (80086bc <TIM_Base_SetConfig+0xd0>)
8008600: 4293 cmp r3, r2
8008602: d00b beq.n 800861c <TIM_Base_SetConfig+0x30>
8008604: 687b ldr r3, [r7, #4]
8008606: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800860a: d007 beq.n 800861c <TIM_Base_SetConfig+0x30>
800860c: 687b ldr r3, [r7, #4]
800860e: 4a2c ldr r2, [pc, #176] @ (80086c0 <TIM_Base_SetConfig+0xd4>)
8008610: 4293 cmp r3, r2
8008612: d003 beq.n 800861c <TIM_Base_SetConfig+0x30>
8008614: 687b ldr r3, [r7, #4]
8008616: 4a2b ldr r2, [pc, #172] @ (80086c4 <TIM_Base_SetConfig+0xd8>)
8008618: 4293 cmp r3, r2
800861a: d108 bne.n 800862e <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
800861c: 68fb ldr r3, [r7, #12]
800861e: f023 0370 bic.w r3, r3, #112 @ 0x70
8008622: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
8008624: 683b ldr r3, [r7, #0]
8008626: 685b ldr r3, [r3, #4]
8008628: 68fa ldr r2, [r7, #12]
800862a: 4313 orrs r3, r2
800862c: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
800862e: 687b ldr r3, [r7, #4]
8008630: 4a22 ldr r2, [pc, #136] @ (80086bc <TIM_Base_SetConfig+0xd0>)
8008632: 4293 cmp r3, r2
8008634: d00b beq.n 800864e <TIM_Base_SetConfig+0x62>
8008636: 687b ldr r3, [r7, #4]
8008638: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
800863c: d007 beq.n 800864e <TIM_Base_SetConfig+0x62>
800863e: 687b ldr r3, [r7, #4]
8008640: 4a1f ldr r2, [pc, #124] @ (80086c0 <TIM_Base_SetConfig+0xd4>)
8008642: 4293 cmp r3, r2
8008644: d003 beq.n 800864e <TIM_Base_SetConfig+0x62>
8008646: 687b ldr r3, [r7, #4]
8008648: 4a1e ldr r2, [pc, #120] @ (80086c4 <TIM_Base_SetConfig+0xd8>)
800864a: 4293 cmp r3, r2
800864c: d108 bne.n 8008660 <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
800864e: 68fb ldr r3, [r7, #12]
8008650: f423 7340 bic.w r3, r3, #768 @ 0x300
8008654: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
8008656: 683b ldr r3, [r7, #0]
8008658: 68db ldr r3, [r3, #12]
800865a: 68fa ldr r2, [r7, #12]
800865c: 4313 orrs r3, r2
800865e: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
8008660: 68fb ldr r3, [r7, #12]
8008662: f023 0280 bic.w r2, r3, #128 @ 0x80
8008666: 683b ldr r3, [r7, #0]
8008668: 695b ldr r3, [r3, #20]
800866a: 4313 orrs r3, r2
800866c: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
800866e: 687b ldr r3, [r7, #4]
8008670: 68fa ldr r2, [r7, #12]
8008672: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
8008674: 683b ldr r3, [r7, #0]
8008676: 689a ldr r2, [r3, #8]
8008678: 687b ldr r3, [r7, #4]
800867a: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
800867c: 683b ldr r3, [r7, #0]
800867e: 681a ldr r2, [r3, #0]
8008680: 687b ldr r3, [r7, #4]
8008682: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
8008684: 687b ldr r3, [r7, #4]
8008686: 4a0d ldr r2, [pc, #52] @ (80086bc <TIM_Base_SetConfig+0xd0>)
8008688: 4293 cmp r3, r2
800868a: d103 bne.n 8008694 <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
800868c: 683b ldr r3, [r7, #0]
800868e: 691a ldr r2, [r3, #16]
8008690: 687b ldr r3, [r7, #4]
8008692: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
8008694: 687b ldr r3, [r7, #4]
8008696: 2201 movs r2, #1
8008698: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
800869a: 687b ldr r3, [r7, #4]
800869c: 691b ldr r3, [r3, #16]
800869e: f003 0301 and.w r3, r3, #1
80086a2: 2b00 cmp r3, #0
80086a4: d005 beq.n 80086b2 <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
80086a6: 687b ldr r3, [r7, #4]
80086a8: 691b ldr r3, [r3, #16]
80086aa: f023 0201 bic.w r2, r3, #1
80086ae: 687b ldr r3, [r7, #4]
80086b0: 611a str r2, [r3, #16]
}
}
80086b2: bf00 nop
80086b4: 3714 adds r7, #20
80086b6: 46bd mov sp, r7
80086b8: bc80 pop {r7}
80086ba: 4770 bx lr
80086bc: 40012c00 .word 0x40012c00
80086c0: 40000400 .word 0x40000400
80086c4: 40000800 .word 0x40000800
080086c8 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80086c8: b480 push {r7}
80086ca: b087 sub sp, #28
80086cc: af00 add r7, sp, #0
80086ce: 6078 str r0, [r7, #4]
80086d0: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80086d2: 687b ldr r3, [r7, #4]
80086d4: 6a1b ldr r3, [r3, #32]
80086d6: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
80086d8: 687b ldr r3, [r7, #4]
80086da: 6a1b ldr r3, [r3, #32]
80086dc: f023 0201 bic.w r2, r3, #1
80086e0: 687b ldr r3, [r7, #4]
80086e2: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80086e4: 687b ldr r3, [r7, #4]
80086e6: 685b ldr r3, [r3, #4]
80086e8: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
80086ea: 687b ldr r3, [r7, #4]
80086ec: 699b ldr r3, [r3, #24]
80086ee: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
80086f0: 68fb ldr r3, [r7, #12]
80086f2: f023 0370 bic.w r3, r3, #112 @ 0x70
80086f6: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
80086f8: 68fb ldr r3, [r7, #12]
80086fa: f023 0303 bic.w r3, r3, #3
80086fe: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8008700: 683b ldr r3, [r7, #0]
8008702: 681b ldr r3, [r3, #0]
8008704: 68fa ldr r2, [r7, #12]
8008706: 4313 orrs r3, r2
8008708: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
800870a: 697b ldr r3, [r7, #20]
800870c: f023 0302 bic.w r3, r3, #2
8008710: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
8008712: 683b ldr r3, [r7, #0]
8008714: 689b ldr r3, [r3, #8]
8008716: 697a ldr r2, [r7, #20]
8008718: 4313 orrs r3, r2
800871a: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
800871c: 687b ldr r3, [r7, #4]
800871e: 4a1c ldr r2, [pc, #112] @ (8008790 <TIM_OC1_SetConfig+0xc8>)
8008720: 4293 cmp r3, r2
8008722: d10c bne.n 800873e <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
8008724: 697b ldr r3, [r7, #20]
8008726: f023 0308 bic.w r3, r3, #8
800872a: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
800872c: 683b ldr r3, [r7, #0]
800872e: 68db ldr r3, [r3, #12]
8008730: 697a ldr r2, [r7, #20]
8008732: 4313 orrs r3, r2
8008734: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
8008736: 697b ldr r3, [r7, #20]
8008738: f023 0304 bic.w r3, r3, #4
800873c: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
800873e: 687b ldr r3, [r7, #4]
8008740: 4a13 ldr r2, [pc, #76] @ (8008790 <TIM_OC1_SetConfig+0xc8>)
8008742: 4293 cmp r3, r2
8008744: d111 bne.n 800876a <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
8008746: 693b ldr r3, [r7, #16]
8008748: f423 7380 bic.w r3, r3, #256 @ 0x100
800874c: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
800874e: 693b ldr r3, [r7, #16]
8008750: f423 7300 bic.w r3, r3, #512 @ 0x200
8008754: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
8008756: 683b ldr r3, [r7, #0]
8008758: 695b ldr r3, [r3, #20]
800875a: 693a ldr r2, [r7, #16]
800875c: 4313 orrs r3, r2
800875e: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
8008760: 683b ldr r3, [r7, #0]
8008762: 699b ldr r3, [r3, #24]
8008764: 693a ldr r2, [r7, #16]
8008766: 4313 orrs r3, r2
8008768: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800876a: 687b ldr r3, [r7, #4]
800876c: 693a ldr r2, [r7, #16]
800876e: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8008770: 687b ldr r3, [r7, #4]
8008772: 68fa ldr r2, [r7, #12]
8008774: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
8008776: 683b ldr r3, [r7, #0]
8008778: 685a ldr r2, [r3, #4]
800877a: 687b ldr r3, [r7, #4]
800877c: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800877e: 687b ldr r3, [r7, #4]
8008780: 697a ldr r2, [r7, #20]
8008782: 621a str r2, [r3, #32]
}
8008784: bf00 nop
8008786: 371c adds r7, #28
8008788: 46bd mov sp, r7
800878a: bc80 pop {r7}
800878c: 4770 bx lr
800878e: bf00 nop
8008790: 40012c00 .word 0x40012c00
08008794 <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008794: b480 push {r7}
8008796: b087 sub sp, #28
8008798: af00 add r7, sp, #0
800879a: 6078 str r0, [r7, #4]
800879c: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800879e: 687b ldr r3, [r7, #4]
80087a0: 6a1b ldr r3, [r3, #32]
80087a2: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
80087a4: 687b ldr r3, [r7, #4]
80087a6: 6a1b ldr r3, [r3, #32]
80087a8: f023 0210 bic.w r2, r3, #16
80087ac: 687b ldr r3, [r7, #4]
80087ae: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80087b0: 687b ldr r3, [r7, #4]
80087b2: 685b ldr r3, [r3, #4]
80087b4: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
80087b6: 687b ldr r3, [r7, #4]
80087b8: 699b ldr r3, [r3, #24]
80087ba: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
80087bc: 68fb ldr r3, [r7, #12]
80087be: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80087c2: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
80087c4: 68fb ldr r3, [r7, #12]
80087c6: f423 7340 bic.w r3, r3, #768 @ 0x300
80087ca: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
80087cc: 683b ldr r3, [r7, #0]
80087ce: 681b ldr r3, [r3, #0]
80087d0: 021b lsls r3, r3, #8
80087d2: 68fa ldr r2, [r7, #12]
80087d4: 4313 orrs r3, r2
80087d6: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
80087d8: 697b ldr r3, [r7, #20]
80087da: f023 0320 bic.w r3, r3, #32
80087de: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
80087e0: 683b ldr r3, [r7, #0]
80087e2: 689b ldr r3, [r3, #8]
80087e4: 011b lsls r3, r3, #4
80087e6: 697a ldr r2, [r7, #20]
80087e8: 4313 orrs r3, r2
80087ea: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
80087ec: 687b ldr r3, [r7, #4]
80087ee: 4a1d ldr r2, [pc, #116] @ (8008864 <TIM_OC2_SetConfig+0xd0>)
80087f0: 4293 cmp r3, r2
80087f2: d10d bne.n 8008810 <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
80087f4: 697b ldr r3, [r7, #20]
80087f6: f023 0380 bic.w r3, r3, #128 @ 0x80
80087fa: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
80087fc: 683b ldr r3, [r7, #0]
80087fe: 68db ldr r3, [r3, #12]
8008800: 011b lsls r3, r3, #4
8008802: 697a ldr r2, [r7, #20]
8008804: 4313 orrs r3, r2
8008806: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
8008808: 697b ldr r3, [r7, #20]
800880a: f023 0340 bic.w r3, r3, #64 @ 0x40
800880e: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008810: 687b ldr r3, [r7, #4]
8008812: 4a14 ldr r2, [pc, #80] @ (8008864 <TIM_OC2_SetConfig+0xd0>)
8008814: 4293 cmp r3, r2
8008816: d113 bne.n 8008840 <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
8008818: 693b ldr r3, [r7, #16]
800881a: f423 6380 bic.w r3, r3, #1024 @ 0x400
800881e: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
8008820: 693b ldr r3, [r7, #16]
8008822: f423 6300 bic.w r3, r3, #2048 @ 0x800
8008826: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
8008828: 683b ldr r3, [r7, #0]
800882a: 695b ldr r3, [r3, #20]
800882c: 009b lsls r3, r3, #2
800882e: 693a ldr r2, [r7, #16]
8008830: 4313 orrs r3, r2
8008832: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
8008834: 683b ldr r3, [r7, #0]
8008836: 699b ldr r3, [r3, #24]
8008838: 009b lsls r3, r3, #2
800883a: 693a ldr r2, [r7, #16]
800883c: 4313 orrs r3, r2
800883e: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008840: 687b ldr r3, [r7, #4]
8008842: 693a ldr r2, [r7, #16]
8008844: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
8008846: 687b ldr r3, [r7, #4]
8008848: 68fa ldr r2, [r7, #12]
800884a: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
800884c: 683b ldr r3, [r7, #0]
800884e: 685a ldr r2, [r3, #4]
8008850: 687b ldr r3, [r7, #4]
8008852: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008854: 687b ldr r3, [r7, #4]
8008856: 697a ldr r2, [r7, #20]
8008858: 621a str r2, [r3, #32]
}
800885a: bf00 nop
800885c: 371c adds r7, #28
800885e: 46bd mov sp, r7
8008860: bc80 pop {r7}
8008862: 4770 bx lr
8008864: 40012c00 .word 0x40012c00
08008868 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8008868: b480 push {r7}
800886a: b087 sub sp, #28
800886c: af00 add r7, sp, #0
800886e: 6078 str r0, [r7, #4]
8008870: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008872: 687b ldr r3, [r7, #4]
8008874: 6a1b ldr r3, [r3, #32]
8008876: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8008878: 687b ldr r3, [r7, #4]
800887a: 6a1b ldr r3, [r3, #32]
800887c: f423 7280 bic.w r2, r3, #256 @ 0x100
8008880: 687b ldr r3, [r7, #4]
8008882: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008884: 687b ldr r3, [r7, #4]
8008886: 685b ldr r3, [r3, #4]
8008888: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
800888a: 687b ldr r3, [r7, #4]
800888c: 69db ldr r3, [r3, #28]
800888e: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
8008890: 68fb ldr r3, [r7, #12]
8008892: f023 0370 bic.w r3, r3, #112 @ 0x70
8008896: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8008898: 68fb ldr r3, [r7, #12]
800889a: f023 0303 bic.w r3, r3, #3
800889e: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
80088a0: 683b ldr r3, [r7, #0]
80088a2: 681b ldr r3, [r3, #0]
80088a4: 68fa ldr r2, [r7, #12]
80088a6: 4313 orrs r3, r2
80088a8: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
80088aa: 697b ldr r3, [r7, #20]
80088ac: f423 7300 bic.w r3, r3, #512 @ 0x200
80088b0: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
80088b2: 683b ldr r3, [r7, #0]
80088b4: 689b ldr r3, [r3, #8]
80088b6: 021b lsls r3, r3, #8
80088b8: 697a ldr r2, [r7, #20]
80088ba: 4313 orrs r3, r2
80088bc: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
80088be: 687b ldr r3, [r7, #4]
80088c0: 4a1d ldr r2, [pc, #116] @ (8008938 <TIM_OC3_SetConfig+0xd0>)
80088c2: 4293 cmp r3, r2
80088c4: d10d bne.n 80088e2 <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
80088c6: 697b ldr r3, [r7, #20]
80088c8: f423 6300 bic.w r3, r3, #2048 @ 0x800
80088cc: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
80088ce: 683b ldr r3, [r7, #0]
80088d0: 68db ldr r3, [r3, #12]
80088d2: 021b lsls r3, r3, #8
80088d4: 697a ldr r2, [r7, #20]
80088d6: 4313 orrs r3, r2
80088d8: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
80088da: 697b ldr r3, [r7, #20]
80088dc: f423 6380 bic.w r3, r3, #1024 @ 0x400
80088e0: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80088e2: 687b ldr r3, [r7, #4]
80088e4: 4a14 ldr r2, [pc, #80] @ (8008938 <TIM_OC3_SetConfig+0xd0>)
80088e6: 4293 cmp r3, r2
80088e8: d113 bne.n 8008912 <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
80088ea: 693b ldr r3, [r7, #16]
80088ec: f423 5380 bic.w r3, r3, #4096 @ 0x1000
80088f0: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
80088f2: 693b ldr r3, [r7, #16]
80088f4: f423 5300 bic.w r3, r3, #8192 @ 0x2000
80088f8: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
80088fa: 683b ldr r3, [r7, #0]
80088fc: 695b ldr r3, [r3, #20]
80088fe: 011b lsls r3, r3, #4
8008900: 693a ldr r2, [r7, #16]
8008902: 4313 orrs r3, r2
8008904: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
8008906: 683b ldr r3, [r7, #0]
8008908: 699b ldr r3, [r3, #24]
800890a: 011b lsls r3, r3, #4
800890c: 693a ldr r2, [r7, #16]
800890e: 4313 orrs r3, r2
8008910: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8008912: 687b ldr r3, [r7, #4]
8008914: 693a ldr r2, [r7, #16]
8008916: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
8008918: 687b ldr r3, [r7, #4]
800891a: 68fa ldr r2, [r7, #12]
800891c: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
800891e: 683b ldr r3, [r7, #0]
8008920: 685a ldr r2, [r3, #4]
8008922: 687b ldr r3, [r7, #4]
8008924: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8008926: 687b ldr r3, [r7, #4]
8008928: 697a ldr r2, [r7, #20]
800892a: 621a str r2, [r3, #32]
}
800892c: bf00 nop
800892e: 371c adds r7, #28
8008930: 46bd mov sp, r7
8008932: bc80 pop {r7}
8008934: 4770 bx lr
8008936: bf00 nop
8008938: 40012c00 .word 0x40012c00
0800893c <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
800893c: b480 push {r7}
800893e: b087 sub sp, #28
8008940: af00 add r7, sp, #0
8008942: 6078 str r0, [r7, #4]
8008944: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8008946: 687b ldr r3, [r7, #4]
8008948: 6a1b ldr r3, [r3, #32]
800894a: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
800894c: 687b ldr r3, [r7, #4]
800894e: 6a1b ldr r3, [r3, #32]
8008950: f423 5280 bic.w r2, r3, #4096 @ 0x1000
8008954: 687b ldr r3, [r7, #4]
8008956: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8008958: 687b ldr r3, [r7, #4]
800895a: 685b ldr r3, [r3, #4]
800895c: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
800895e: 687b ldr r3, [r7, #4]
8008960: 69db ldr r3, [r3, #28]
8008962: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
8008964: 68fb ldr r3, [r7, #12]
8008966: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800896a: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
800896c: 68fb ldr r3, [r7, #12]
800896e: f423 7340 bic.w r3, r3, #768 @ 0x300
8008972: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8008974: 683b ldr r3, [r7, #0]
8008976: 681b ldr r3, [r3, #0]
8008978: 021b lsls r3, r3, #8
800897a: 68fa ldr r2, [r7, #12]
800897c: 4313 orrs r3, r2
800897e: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8008980: 693b ldr r3, [r7, #16]
8008982: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8008986: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8008988: 683b ldr r3, [r7, #0]
800898a: 689b ldr r3, [r3, #8]
800898c: 031b lsls r3, r3, #12
800898e: 693a ldr r2, [r7, #16]
8008990: 4313 orrs r3, r2
8008992: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
8008994: 687b ldr r3, [r7, #4]
8008996: 4a0f ldr r2, [pc, #60] @ (80089d4 <TIM_OC4_SetConfig+0x98>)
8008998: 4293 cmp r3, r2
800899a: d109 bne.n 80089b0 <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
800899c: 697b ldr r3, [r7, #20]
800899e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80089a2: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
80089a4: 683b ldr r3, [r7, #0]
80089a6: 695b ldr r3, [r3, #20]
80089a8: 019b lsls r3, r3, #6
80089aa: 697a ldr r2, [r7, #20]
80089ac: 4313 orrs r3, r2
80089ae: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80089b0: 687b ldr r3, [r7, #4]
80089b2: 697a ldr r2, [r7, #20]
80089b4: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
80089b6: 687b ldr r3, [r7, #4]
80089b8: 68fa ldr r2, [r7, #12]
80089ba: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
80089bc: 683b ldr r3, [r7, #0]
80089be: 685a ldr r2, [r3, #4]
80089c0: 687b ldr r3, [r7, #4]
80089c2: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80089c4: 687b ldr r3, [r7, #4]
80089c6: 693a ldr r2, [r7, #16]
80089c8: 621a str r2, [r3, #32]
}
80089ca: bf00 nop
80089cc: 371c adds r7, #28
80089ce: 46bd mov sp, r7
80089d0: bc80 pop {r7}
80089d2: 4770 bx lr
80089d4: 40012c00 .word 0x40012c00
080089d8 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
80089d8: b480 push {r7}
80089da: b087 sub sp, #28
80089dc: af00 add r7, sp, #0
80089de: 60f8 str r0, [r7, #12]
80089e0: 60b9 str r1, [r7, #8]
80089e2: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
80089e4: 68fb ldr r3, [r7, #12]
80089e6: 6a1b ldr r3, [r3, #32]
80089e8: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
80089ea: 68fb ldr r3, [r7, #12]
80089ec: 6a1b ldr r3, [r3, #32]
80089ee: f023 0201 bic.w r2, r3, #1
80089f2: 68fb ldr r3, [r7, #12]
80089f4: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
80089f6: 68fb ldr r3, [r7, #12]
80089f8: 699b ldr r3, [r3, #24]
80089fa: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
80089fc: 693b ldr r3, [r7, #16]
80089fe: f023 03f0 bic.w r3, r3, #240 @ 0xf0
8008a02: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
8008a04: 687b ldr r3, [r7, #4]
8008a06: 011b lsls r3, r3, #4
8008a08: 693a ldr r2, [r7, #16]
8008a0a: 4313 orrs r3, r2
8008a0c: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
8008a0e: 697b ldr r3, [r7, #20]
8008a10: f023 030a bic.w r3, r3, #10
8008a14: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
8008a16: 697a ldr r2, [r7, #20]
8008a18: 68bb ldr r3, [r7, #8]
8008a1a: 4313 orrs r3, r2
8008a1c: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
8008a1e: 68fb ldr r3, [r7, #12]
8008a20: 693a ldr r2, [r7, #16]
8008a22: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8008a24: 68fb ldr r3, [r7, #12]
8008a26: 697a ldr r2, [r7, #20]
8008a28: 621a str r2, [r3, #32]
}
8008a2a: bf00 nop
8008a2c: 371c adds r7, #28
8008a2e: 46bd mov sp, r7
8008a30: bc80 pop {r7}
8008a32: 4770 bx lr
08008a34 <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8008a34: b480 push {r7}
8008a36: b087 sub sp, #28
8008a38: af00 add r7, sp, #0
8008a3a: 60f8 str r0, [r7, #12]
8008a3c: 60b9 str r1, [r7, #8]
8008a3e: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
8008a40: 68fb ldr r3, [r7, #12]
8008a42: 6a1b ldr r3, [r3, #32]
8008a44: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
8008a46: 68fb ldr r3, [r7, #12]
8008a48: 6a1b ldr r3, [r3, #32]
8008a4a: f023 0210 bic.w r2, r3, #16
8008a4e: 68fb ldr r3, [r7, #12]
8008a50: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
8008a52: 68fb ldr r3, [r7, #12]
8008a54: 699b ldr r3, [r3, #24]
8008a56: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
8008a58: 693b ldr r3, [r7, #16]
8008a5a: f423 4370 bic.w r3, r3, #61440 @ 0xf000
8008a5e: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
8008a60: 687b ldr r3, [r7, #4]
8008a62: 031b lsls r3, r3, #12
8008a64: 693a ldr r2, [r7, #16]
8008a66: 4313 orrs r3, r2
8008a68: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
8008a6a: 697b ldr r3, [r7, #20]
8008a6c: f023 03a0 bic.w r3, r3, #160 @ 0xa0
8008a70: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
8008a72: 68bb ldr r3, [r7, #8]
8008a74: 011b lsls r3, r3, #4
8008a76: 697a ldr r2, [r7, #20]
8008a78: 4313 orrs r3, r2
8008a7a: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8008a7c: 68fb ldr r3, [r7, #12]
8008a7e: 693a ldr r2, [r7, #16]
8008a80: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
8008a82: 68fb ldr r3, [r7, #12]
8008a84: 697a ldr r2, [r7, #20]
8008a86: 621a str r2, [r3, #32]
}
8008a88: bf00 nop
8008a8a: 371c adds r7, #28
8008a8c: 46bd mov sp, r7
8008a8e: bc80 pop {r7}
8008a90: 4770 bx lr
08008a92 <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
8008a92: b480 push {r7}
8008a94: b085 sub sp, #20
8008a96: af00 add r7, sp, #0
8008a98: 6078 str r0, [r7, #4]
8008a9a: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8008a9c: 687b ldr r3, [r7, #4]
8008a9e: 689b ldr r3, [r3, #8]
8008aa0: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
8008aa2: 68fb ldr r3, [r7, #12]
8008aa4: f023 0370 bic.w r3, r3, #112 @ 0x70
8008aa8: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
8008aaa: 683a ldr r2, [r7, #0]
8008aac: 68fb ldr r3, [r7, #12]
8008aae: 4313 orrs r3, r2
8008ab0: f043 0307 orr.w r3, r3, #7
8008ab4: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8008ab6: 687b ldr r3, [r7, #4]
8008ab8: 68fa ldr r2, [r7, #12]
8008aba: 609a str r2, [r3, #8]
}
8008abc: bf00 nop
8008abe: 3714 adds r7, #20
8008ac0: 46bd mov sp, r7
8008ac2: bc80 pop {r7}
8008ac4: 4770 bx lr
08008ac6 <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
8008ac6: b480 push {r7}
8008ac8: b087 sub sp, #28
8008aca: af00 add r7, sp, #0
8008acc: 60f8 str r0, [r7, #12]
8008ace: 60b9 str r1, [r7, #8]
8008ad0: 607a str r2, [r7, #4]
8008ad2: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
8008ad4: 68fb ldr r3, [r7, #12]
8008ad6: 689b ldr r3, [r3, #8]
8008ad8: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8008ada: 697b ldr r3, [r7, #20]
8008adc: f423 437f bic.w r3, r3, #65280 @ 0xff00
8008ae0: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
8008ae2: 683b ldr r3, [r7, #0]
8008ae4: 021a lsls r2, r3, #8
8008ae6: 687b ldr r3, [r7, #4]
8008ae8: 431a orrs r2, r3
8008aea: 68bb ldr r3, [r7, #8]
8008aec: 4313 orrs r3, r2
8008aee: 697a ldr r2, [r7, #20]
8008af0: 4313 orrs r3, r2
8008af2: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
8008af4: 68fb ldr r3, [r7, #12]
8008af6: 697a ldr r2, [r7, #20]
8008af8: 609a str r2, [r3, #8]
}
8008afa: bf00 nop
8008afc: 371c adds r7, #28
8008afe: 46bd mov sp, r7
8008b00: bc80 pop {r7}
8008b02: 4770 bx lr
08008b04 <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
8008b04: b480 push {r7}
8008b06: b087 sub sp, #28
8008b08: af00 add r7, sp, #0
8008b0a: 60f8 str r0, [r7, #12]
8008b0c: 60b9 str r1, [r7, #8]
8008b0e: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
8008b10: 68bb ldr r3, [r7, #8]
8008b12: f003 031f and.w r3, r3, #31
8008b16: 2201 movs r2, #1
8008b18: fa02 f303 lsl.w r3, r2, r3
8008b1c: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
8008b1e: 68fb ldr r3, [r7, #12]
8008b20: 6a1a ldr r2, [r3, #32]
8008b22: 697b ldr r3, [r7, #20]
8008b24: 43db mvns r3, r3
8008b26: 401a ands r2, r3
8008b28: 68fb ldr r3, [r7, #12]
8008b2a: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
8008b2c: 68fb ldr r3, [r7, #12]
8008b2e: 6a1a ldr r2, [r3, #32]
8008b30: 68bb ldr r3, [r7, #8]
8008b32: f003 031f and.w r3, r3, #31
8008b36: 6879 ldr r1, [r7, #4]
8008b38: fa01 f303 lsl.w r3, r1, r3
8008b3c: 431a orrs r2, r3
8008b3e: 68fb ldr r3, [r7, #12]
8008b40: 621a str r2, [r3, #32]
}
8008b42: bf00 nop
8008b44: 371c adds r7, #28
8008b46: 46bd mov sp, r7
8008b48: bc80 pop {r7}
8008b4a: 4770 bx lr
08008b4c <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
8008b4c: b480 push {r7}
8008b4e: b085 sub sp, #20
8008b50: af00 add r7, sp, #0
8008b52: 6078 str r0, [r7, #4]
8008b54: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
8008b56: 687b ldr r3, [r7, #4]
8008b58: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8008b5c: 2b01 cmp r3, #1
8008b5e: d101 bne.n 8008b64 <HAL_TIMEx_MasterConfigSynchronization+0x18>
8008b60: 2302 movs r3, #2
8008b62: e046 b.n 8008bf2 <HAL_TIMEx_MasterConfigSynchronization+0xa6>
8008b64: 687b ldr r3, [r7, #4]
8008b66: 2201 movs r2, #1
8008b68: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
8008b6c: 687b ldr r3, [r7, #4]
8008b6e: 2202 movs r2, #2
8008b70: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
8008b74: 687b ldr r3, [r7, #4]
8008b76: 681b ldr r3, [r3, #0]
8008b78: 685b ldr r3, [r3, #4]
8008b7a: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8008b7c: 687b ldr r3, [r7, #4]
8008b7e: 681b ldr r3, [r3, #0]
8008b80: 689b ldr r3, [r3, #8]
8008b82: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
8008b84: 68fb ldr r3, [r7, #12]
8008b86: f023 0370 bic.w r3, r3, #112 @ 0x70
8008b8a: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8008b8c: 683b ldr r3, [r7, #0]
8008b8e: 681b ldr r3, [r3, #0]
8008b90: 68fa ldr r2, [r7, #12]
8008b92: 4313 orrs r3, r2
8008b94: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
8008b96: 687b ldr r3, [r7, #4]
8008b98: 681b ldr r3, [r3, #0]
8008b9a: 68fa ldr r2, [r7, #12]
8008b9c: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8008b9e: 687b ldr r3, [r7, #4]
8008ba0: 681b ldr r3, [r3, #0]
8008ba2: 4a16 ldr r2, [pc, #88] @ (8008bfc <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
8008ba4: 4293 cmp r3, r2
8008ba6: d00e beq.n 8008bc6 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8008ba8: 687b ldr r3, [r7, #4]
8008baa: 681b ldr r3, [r3, #0]
8008bac: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008bb0: d009 beq.n 8008bc6 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8008bb2: 687b ldr r3, [r7, #4]
8008bb4: 681b ldr r3, [r3, #0]
8008bb6: 4a12 ldr r2, [pc, #72] @ (8008c00 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
8008bb8: 4293 cmp r3, r2
8008bba: d004 beq.n 8008bc6 <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8008bbc: 687b ldr r3, [r7, #4]
8008bbe: 681b ldr r3, [r3, #0]
8008bc0: 4a10 ldr r2, [pc, #64] @ (8008c04 <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
8008bc2: 4293 cmp r3, r2
8008bc4: d10c bne.n 8008be0 <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
8008bc6: 68bb ldr r3, [r7, #8]
8008bc8: f023 0380 bic.w r3, r3, #128 @ 0x80
8008bcc: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8008bce: 683b ldr r3, [r7, #0]
8008bd0: 685b ldr r3, [r3, #4]
8008bd2: 68ba ldr r2, [r7, #8]
8008bd4: 4313 orrs r3, r2
8008bd6: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8008bd8: 687b ldr r3, [r7, #4]
8008bda: 681b ldr r3, [r3, #0]
8008bdc: 68ba ldr r2, [r7, #8]
8008bde: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8008be0: 687b ldr r3, [r7, #4]
8008be2: 2201 movs r2, #1
8008be4: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8008be8: 687b ldr r3, [r7, #4]
8008bea: 2200 movs r2, #0
8008bec: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
8008bf0: 2300 movs r3, #0
}
8008bf2: 4618 mov r0, r3
8008bf4: 3714 adds r7, #20
8008bf6: 46bd mov sp, r7
8008bf8: bc80 pop {r7}
8008bfa: 4770 bx lr
8008bfc: 40012c00 .word 0x40012c00
8008c00: 40000400 .word 0x40000400
8008c04: 40000800 .word 0x40000800
08008c08 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8008c08: b580 push {r7, lr}
8008c0a: b082 sub sp, #8
8008c0c: af00 add r7, sp, #0
8008c0e: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8008c10: 687b ldr r3, [r7, #4]
8008c12: 2b00 cmp r3, #0
8008c14: d101 bne.n 8008c1a <HAL_UART_Init+0x12>
{
return HAL_ERROR;
8008c16: 2301 movs r3, #1
8008c18: e042 b.n 8008ca0 <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
8008c1a: 687b ldr r3, [r7, #4]
8008c1c: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8008c20: b2db uxtb r3, r3
8008c22: 2b00 cmp r3, #0
8008c24: d106 bne.n 8008c34 <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
8008c26: 687b ldr r3, [r7, #4]
8008c28: 2200 movs r2, #0
8008c2a: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
8008c2e: 6878 ldr r0, [r7, #4]
8008c30: f7fb fb68 bl 8004304 <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
8008c34: 687b ldr r3, [r7, #4]
8008c36: 2224 movs r2, #36 @ 0x24
8008c38: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
8008c3c: 687b ldr r3, [r7, #4]
8008c3e: 681b ldr r3, [r3, #0]
8008c40: 68da ldr r2, [r3, #12]
8008c42: 687b ldr r3, [r7, #4]
8008c44: 681b ldr r3, [r3, #0]
8008c46: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8008c4a: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
8008c4c: 6878 ldr r0, [r7, #4]
8008c4e: f000 f971 bl 8008f34 <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
8008c52: 687b ldr r3, [r7, #4]
8008c54: 681b ldr r3, [r3, #0]
8008c56: 691a ldr r2, [r3, #16]
8008c58: 687b ldr r3, [r7, #4]
8008c5a: 681b ldr r3, [r3, #0]
8008c5c: f422 4290 bic.w r2, r2, #18432 @ 0x4800
8008c60: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
8008c62: 687b ldr r3, [r7, #4]
8008c64: 681b ldr r3, [r3, #0]
8008c66: 695a ldr r2, [r3, #20]
8008c68: 687b ldr r3, [r7, #4]
8008c6a: 681b ldr r3, [r3, #0]
8008c6c: f022 022a bic.w r2, r2, #42 @ 0x2a
8008c70: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
8008c72: 687b ldr r3, [r7, #4]
8008c74: 681b ldr r3, [r3, #0]
8008c76: 68da ldr r2, [r3, #12]
8008c78: 687b ldr r3, [r7, #4]
8008c7a: 681b ldr r3, [r3, #0]
8008c7c: f442 5200 orr.w r2, r2, #8192 @ 0x2000
8008c80: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
8008c82: 687b ldr r3, [r7, #4]
8008c84: 2200 movs r2, #0
8008c86: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
8008c88: 687b ldr r3, [r7, #4]
8008c8a: 2220 movs r2, #32
8008c8c: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
8008c90: 687b ldr r3, [r7, #4]
8008c92: 2220 movs r2, #32
8008c94: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
8008c98: 687b ldr r3, [r7, #4]
8008c9a: 2200 movs r2, #0
8008c9c: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
8008c9e: 2300 movs r3, #0
}
8008ca0: 4618 mov r0, r3
8008ca2: 3708 adds r7, #8
8008ca4: 46bd mov sp, r7
8008ca6: bd80 pop {r7, pc}
08008ca8 <HAL_UART_Transmit>:
* @param Size Amount of data elements (u8 or u16) to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
8008ca8: b580 push {r7, lr}
8008caa: b08a sub sp, #40 @ 0x28
8008cac: af02 add r7, sp, #8
8008cae: 60f8 str r0, [r7, #12]
8008cb0: 60b9 str r1, [r7, #8]
8008cb2: 603b str r3, [r7, #0]
8008cb4: 4613 mov r3, r2
8008cb6: 80fb strh r3, [r7, #6]
const uint8_t *pdata8bits;
const uint16_t *pdata16bits;
uint32_t tickstart = 0U;
8008cb8: 2300 movs r3, #0
8008cba: 617b str r3, [r7, #20]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
8008cbc: 68fb ldr r3, [r7, #12]
8008cbe: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8008cc2: b2db uxtb r3, r3
8008cc4: 2b20 cmp r3, #32
8008cc6: d175 bne.n 8008db4 <HAL_UART_Transmit+0x10c>
{
if ((pData == NULL) || (Size == 0U))
8008cc8: 68bb ldr r3, [r7, #8]
8008cca: 2b00 cmp r3, #0
8008ccc: d002 beq.n 8008cd4 <HAL_UART_Transmit+0x2c>
8008cce: 88fb ldrh r3, [r7, #6]
8008cd0: 2b00 cmp r3, #0
8008cd2: d101 bne.n 8008cd8 <HAL_UART_Transmit+0x30>
{
return HAL_ERROR;
8008cd4: 2301 movs r3, #1
8008cd6: e06e b.n 8008db6 <HAL_UART_Transmit+0x10e>
}
huart->ErrorCode = HAL_UART_ERROR_NONE;
8008cd8: 68fb ldr r3, [r7, #12]
8008cda: 2200 movs r2, #0
8008cdc: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_BUSY_TX;
8008cde: 68fb ldr r3, [r7, #12]
8008ce0: 2221 movs r2, #33 @ 0x21
8008ce2: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
8008ce6: f7fb fc55 bl 8004594 <HAL_GetTick>
8008cea: 6178 str r0, [r7, #20]
huart->TxXferSize = Size;
8008cec: 68fb ldr r3, [r7, #12]
8008cee: 88fa ldrh r2, [r7, #6]
8008cf0: 849a strh r2, [r3, #36] @ 0x24
huart->TxXferCount = Size;
8008cf2: 68fb ldr r3, [r7, #12]
8008cf4: 88fa ldrh r2, [r7, #6]
8008cf6: 84da strh r2, [r3, #38] @ 0x26
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
8008cf8: 68fb ldr r3, [r7, #12]
8008cfa: 689b ldr r3, [r3, #8]
8008cfc: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008d00: d108 bne.n 8008d14 <HAL_UART_Transmit+0x6c>
8008d02: 68fb ldr r3, [r7, #12]
8008d04: 691b ldr r3, [r3, #16]
8008d06: 2b00 cmp r3, #0
8008d08: d104 bne.n 8008d14 <HAL_UART_Transmit+0x6c>
{
pdata8bits = NULL;
8008d0a: 2300 movs r3, #0
8008d0c: 61fb str r3, [r7, #28]
pdata16bits = (const uint16_t *) pData;
8008d0e: 68bb ldr r3, [r7, #8]
8008d10: 61bb str r3, [r7, #24]
8008d12: e003 b.n 8008d1c <HAL_UART_Transmit+0x74>
}
else
{
pdata8bits = pData;
8008d14: 68bb ldr r3, [r7, #8]
8008d16: 61fb str r3, [r7, #28]
pdata16bits = NULL;
8008d18: 2300 movs r3, #0
8008d1a: 61bb str r3, [r7, #24]
}
while (huart->TxXferCount > 0U)
8008d1c: e02e b.n 8008d7c <HAL_UART_Transmit+0xd4>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
8008d1e: 683b ldr r3, [r7, #0]
8008d20: 9300 str r3, [sp, #0]
8008d22: 697b ldr r3, [r7, #20]
8008d24: 2200 movs r2, #0
8008d26: 2180 movs r1, #128 @ 0x80
8008d28: 68f8 ldr r0, [r7, #12]
8008d2a: f000 f848 bl 8008dbe <UART_WaitOnFlagUntilTimeout>
8008d2e: 4603 mov r3, r0
8008d30: 2b00 cmp r3, #0
8008d32: d005 beq.n 8008d40 <HAL_UART_Transmit+0x98>
{
huart->gState = HAL_UART_STATE_READY;
8008d34: 68fb ldr r3, [r7, #12]
8008d36: 2220 movs r2, #32
8008d38: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
8008d3c: 2303 movs r3, #3
8008d3e: e03a b.n 8008db6 <HAL_UART_Transmit+0x10e>
}
if (pdata8bits == NULL)
8008d40: 69fb ldr r3, [r7, #28]
8008d42: 2b00 cmp r3, #0
8008d44: d10b bne.n 8008d5e <HAL_UART_Transmit+0xb6>
{
huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
8008d46: 69bb ldr r3, [r7, #24]
8008d48: 881b ldrh r3, [r3, #0]
8008d4a: 461a mov r2, r3
8008d4c: 68fb ldr r3, [r7, #12]
8008d4e: 681b ldr r3, [r3, #0]
8008d50: f3c2 0208 ubfx r2, r2, #0, #9
8008d54: 605a str r2, [r3, #4]
pdata16bits++;
8008d56: 69bb ldr r3, [r7, #24]
8008d58: 3302 adds r3, #2
8008d5a: 61bb str r3, [r7, #24]
8008d5c: e007 b.n 8008d6e <HAL_UART_Transmit+0xc6>
}
else
{
huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
8008d5e: 69fb ldr r3, [r7, #28]
8008d60: 781a ldrb r2, [r3, #0]
8008d62: 68fb ldr r3, [r7, #12]
8008d64: 681b ldr r3, [r3, #0]
8008d66: 605a str r2, [r3, #4]
pdata8bits++;
8008d68: 69fb ldr r3, [r7, #28]
8008d6a: 3301 adds r3, #1
8008d6c: 61fb str r3, [r7, #28]
}
huart->TxXferCount--;
8008d6e: 68fb ldr r3, [r7, #12]
8008d70: 8cdb ldrh r3, [r3, #38] @ 0x26
8008d72: b29b uxth r3, r3
8008d74: 3b01 subs r3, #1
8008d76: b29a uxth r2, r3
8008d78: 68fb ldr r3, [r7, #12]
8008d7a: 84da strh r2, [r3, #38] @ 0x26
while (huart->TxXferCount > 0U)
8008d7c: 68fb ldr r3, [r7, #12]
8008d7e: 8cdb ldrh r3, [r3, #38] @ 0x26
8008d80: b29b uxth r3, r3
8008d82: 2b00 cmp r3, #0
8008d84: d1cb bne.n 8008d1e <HAL_UART_Transmit+0x76>
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
8008d86: 683b ldr r3, [r7, #0]
8008d88: 9300 str r3, [sp, #0]
8008d8a: 697b ldr r3, [r7, #20]
8008d8c: 2200 movs r2, #0
8008d8e: 2140 movs r1, #64 @ 0x40
8008d90: 68f8 ldr r0, [r7, #12]
8008d92: f000 f814 bl 8008dbe <UART_WaitOnFlagUntilTimeout>
8008d96: 4603 mov r3, r0
8008d98: 2b00 cmp r3, #0
8008d9a: d005 beq.n 8008da8 <HAL_UART_Transmit+0x100>
{
huart->gState = HAL_UART_STATE_READY;
8008d9c: 68fb ldr r3, [r7, #12]
8008d9e: 2220 movs r2, #32
8008da0: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
8008da4: 2303 movs r3, #3
8008da6: e006 b.n 8008db6 <HAL_UART_Transmit+0x10e>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
8008da8: 68fb ldr r3, [r7, #12]
8008daa: 2220 movs r2, #32
8008dac: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_OK;
8008db0: 2300 movs r3, #0
8008db2: e000 b.n 8008db6 <HAL_UART_Transmit+0x10e>
}
else
{
return HAL_BUSY;
8008db4: 2302 movs r3, #2
}
}
8008db6: 4618 mov r0, r3
8008db8: 3720 adds r7, #32
8008dba: 46bd mov sp, r7
8008dbc: bd80 pop {r7, pc}
08008dbe <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
8008dbe: b580 push {r7, lr}
8008dc0: b086 sub sp, #24
8008dc2: af00 add r7, sp, #0
8008dc4: 60f8 str r0, [r7, #12]
8008dc6: 60b9 str r1, [r7, #8]
8008dc8: 603b str r3, [r7, #0]
8008dca: 4613 mov r3, r2
8008dcc: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8008dce: e03b b.n 8008e48 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8008dd0: 6a3b ldr r3, [r7, #32]
8008dd2: f1b3 3fff cmp.w r3, #4294967295
8008dd6: d037 beq.n 8008e48 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8008dd8: f7fb fbdc bl 8004594 <HAL_GetTick>
8008ddc: 4602 mov r2, r0
8008dde: 683b ldr r3, [r7, #0]
8008de0: 1ad3 subs r3, r2, r3
8008de2: 6a3a ldr r2, [r7, #32]
8008de4: 429a cmp r2, r3
8008de6: d302 bcc.n 8008dee <UART_WaitOnFlagUntilTimeout+0x30>
8008de8: 6a3b ldr r3, [r7, #32]
8008dea: 2b00 cmp r3, #0
8008dec: d101 bne.n 8008df2 <UART_WaitOnFlagUntilTimeout+0x34>
{
return HAL_TIMEOUT;
8008dee: 2303 movs r3, #3
8008df0: e03a b.n 8008e68 <UART_WaitOnFlagUntilTimeout+0xaa>
}
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
8008df2: 68fb ldr r3, [r7, #12]
8008df4: 681b ldr r3, [r3, #0]
8008df6: 68db ldr r3, [r3, #12]
8008df8: f003 0304 and.w r3, r3, #4
8008dfc: 2b00 cmp r3, #0
8008dfe: d023 beq.n 8008e48 <UART_WaitOnFlagUntilTimeout+0x8a>
8008e00: 68bb ldr r3, [r7, #8]
8008e02: 2b80 cmp r3, #128 @ 0x80
8008e04: d020 beq.n 8008e48 <UART_WaitOnFlagUntilTimeout+0x8a>
8008e06: 68bb ldr r3, [r7, #8]
8008e08: 2b40 cmp r3, #64 @ 0x40
8008e0a: d01d beq.n 8008e48 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
8008e0c: 68fb ldr r3, [r7, #12]
8008e0e: 681b ldr r3, [r3, #0]
8008e10: 681b ldr r3, [r3, #0]
8008e12: f003 0308 and.w r3, r3, #8
8008e16: 2b08 cmp r3, #8
8008e18: d116 bne.n 8008e48 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Clear Overrun Error flag*/
__HAL_UART_CLEAR_OREFLAG(huart);
8008e1a: 2300 movs r3, #0
8008e1c: 617b str r3, [r7, #20]
8008e1e: 68fb ldr r3, [r7, #12]
8008e20: 681b ldr r3, [r3, #0]
8008e22: 681b ldr r3, [r3, #0]
8008e24: 617b str r3, [r7, #20]
8008e26: 68fb ldr r3, [r7, #12]
8008e28: 681b ldr r3, [r3, #0]
8008e2a: 685b ldr r3, [r3, #4]
8008e2c: 617b str r3, [r7, #20]
8008e2e: 697b ldr r3, [r7, #20]
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
8008e30: 68f8 ldr r0, [r7, #12]
8008e32: f000 f81d bl 8008e70 <UART_EndRxTransfer>
huart->ErrorCode = HAL_UART_ERROR_ORE;
8008e36: 68fb ldr r3, [r7, #12]
8008e38: 2208 movs r2, #8
8008e3a: 645a str r2, [r3, #68] @ 0x44
/* Process Unlocked */
__HAL_UNLOCK(huart);
8008e3c: 68fb ldr r3, [r7, #12]
8008e3e: 2200 movs r2, #0
8008e40: f883 2040 strb.w r2, [r3, #64] @ 0x40
return HAL_ERROR;
8008e44: 2301 movs r3, #1
8008e46: e00f b.n 8008e68 <UART_WaitOnFlagUntilTimeout+0xaa>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8008e48: 68fb ldr r3, [r7, #12]
8008e4a: 681b ldr r3, [r3, #0]
8008e4c: 681a ldr r2, [r3, #0]
8008e4e: 68bb ldr r3, [r7, #8]
8008e50: 4013 ands r3, r2
8008e52: 68ba ldr r2, [r7, #8]
8008e54: 429a cmp r2, r3
8008e56: bf0c ite eq
8008e58: 2301 moveq r3, #1
8008e5a: 2300 movne r3, #0
8008e5c: b2db uxtb r3, r3
8008e5e: 461a mov r2, r3
8008e60: 79fb ldrb r3, [r7, #7]
8008e62: 429a cmp r2, r3
8008e64: d0b4 beq.n 8008dd0 <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
8008e66: 2300 movs r3, #0
}
8008e68: 4618 mov r0, r3
8008e6a: 3718 adds r7, #24
8008e6c: 46bd mov sp, r7
8008e6e: bd80 pop {r7, pc}
08008e70 <UART_EndRxTransfer>:
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
* @param huart UART handle.
* @retval None
*/
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
8008e70: b480 push {r7}
8008e72: b095 sub sp, #84 @ 0x54
8008e74: af00 add r7, sp, #0
8008e76: 6078 str r0, [r7, #4]
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
8008e78: 687b ldr r3, [r7, #4]
8008e7a: 681b ldr r3, [r3, #0]
8008e7c: 330c adds r3, #12
8008e7e: 637b str r3, [r7, #52] @ 0x34
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8008e80: 6b7b ldr r3, [r7, #52] @ 0x34
8008e82: e853 3f00 ldrex r3, [r3]
8008e86: 633b str r3, [r7, #48] @ 0x30
return(result);
8008e88: 6b3b ldr r3, [r7, #48] @ 0x30
8008e8a: f423 7390 bic.w r3, r3, #288 @ 0x120
8008e8e: 64fb str r3, [r7, #76] @ 0x4c
8008e90: 687b ldr r3, [r7, #4]
8008e92: 681b ldr r3, [r3, #0]
8008e94: 330c adds r3, #12
8008e96: 6cfa ldr r2, [r7, #76] @ 0x4c
8008e98: 643a str r2, [r7, #64] @ 0x40
8008e9a: 63fb str r3, [r7, #60] @ 0x3c
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8008e9c: 6bf9 ldr r1, [r7, #60] @ 0x3c
8008e9e: 6c3a ldr r2, [r7, #64] @ 0x40
8008ea0: e841 2300 strex r3, r2, [r1]
8008ea4: 63bb str r3, [r7, #56] @ 0x38
return(result);
8008ea6: 6bbb ldr r3, [r7, #56] @ 0x38
8008ea8: 2b00 cmp r3, #0
8008eaa: d1e5 bne.n 8008e78 <UART_EndRxTransfer+0x8>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8008eac: 687b ldr r3, [r7, #4]
8008eae: 681b ldr r3, [r3, #0]
8008eb0: 3314 adds r3, #20
8008eb2: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8008eb4: 6a3b ldr r3, [r7, #32]
8008eb6: e853 3f00 ldrex r3, [r3]
8008eba: 61fb str r3, [r7, #28]
return(result);
8008ebc: 69fb ldr r3, [r7, #28]
8008ebe: f023 0301 bic.w r3, r3, #1
8008ec2: 64bb str r3, [r7, #72] @ 0x48
8008ec4: 687b ldr r3, [r7, #4]
8008ec6: 681b ldr r3, [r3, #0]
8008ec8: 3314 adds r3, #20
8008eca: 6cba ldr r2, [r7, #72] @ 0x48
8008ecc: 62fa str r2, [r7, #44] @ 0x2c
8008ece: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8008ed0: 6ab9 ldr r1, [r7, #40] @ 0x28
8008ed2: 6afa ldr r2, [r7, #44] @ 0x2c
8008ed4: e841 2300 strex r3, r2, [r1]
8008ed8: 627b str r3, [r7, #36] @ 0x24
return(result);
8008eda: 6a7b ldr r3, [r7, #36] @ 0x24
8008edc: 2b00 cmp r3, #0
8008ede: d1e5 bne.n 8008eac <UART_EndRxTransfer+0x3c>
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
8008ee0: 687b ldr r3, [r7, #4]
8008ee2: 6b1b ldr r3, [r3, #48] @ 0x30
8008ee4: 2b01 cmp r3, #1
8008ee6: d119 bne.n 8008f1c <UART_EndRxTransfer+0xac>
{
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
8008ee8: 687b ldr r3, [r7, #4]
8008eea: 681b ldr r3, [r3, #0]
8008eec: 330c adds r3, #12
8008eee: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8008ef0: 68fb ldr r3, [r7, #12]
8008ef2: e853 3f00 ldrex r3, [r3]
8008ef6: 60bb str r3, [r7, #8]
return(result);
8008ef8: 68bb ldr r3, [r7, #8]
8008efa: f023 0310 bic.w r3, r3, #16
8008efe: 647b str r3, [r7, #68] @ 0x44
8008f00: 687b ldr r3, [r7, #4]
8008f02: 681b ldr r3, [r3, #0]
8008f04: 330c adds r3, #12
8008f06: 6c7a ldr r2, [r7, #68] @ 0x44
8008f08: 61ba str r2, [r7, #24]
8008f0a: 617b str r3, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8008f0c: 6979 ldr r1, [r7, #20]
8008f0e: 69ba ldr r2, [r7, #24]
8008f10: e841 2300 strex r3, r2, [r1]
8008f14: 613b str r3, [r7, #16]
return(result);
8008f16: 693b ldr r3, [r7, #16]
8008f18: 2b00 cmp r3, #0
8008f1a: d1e5 bne.n 8008ee8 <UART_EndRxTransfer+0x78>
}
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
8008f1c: 687b ldr r3, [r7, #4]
8008f1e: 2220 movs r2, #32
8008f20: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
8008f24: 687b ldr r3, [r7, #4]
8008f26: 2200 movs r2, #0
8008f28: 631a str r2, [r3, #48] @ 0x30
}
8008f2a: bf00 nop
8008f2c: 3754 adds r7, #84 @ 0x54
8008f2e: 46bd mov sp, r7
8008f30: bc80 pop {r7}
8008f32: 4770 bx lr
08008f34 <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
8008f34: b580 push {r7, lr}
8008f36: b084 sub sp, #16
8008f38: af00 add r7, sp, #0
8008f3a: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
8008f3c: 687b ldr r3, [r7, #4]
8008f3e: 681b ldr r3, [r3, #0]
8008f40: 691b ldr r3, [r3, #16]
8008f42: f423 5140 bic.w r1, r3, #12288 @ 0x3000
8008f46: 687b ldr r3, [r7, #4]
8008f48: 68da ldr r2, [r3, #12]
8008f4a: 687b ldr r3, [r7, #4]
8008f4c: 681b ldr r3, [r3, #0]
8008f4e: 430a orrs r2, r1
8008f50: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
8008f52: 687b ldr r3, [r7, #4]
8008f54: 689a ldr r2, [r3, #8]
8008f56: 687b ldr r3, [r7, #4]
8008f58: 691b ldr r3, [r3, #16]
8008f5a: 431a orrs r2, r3
8008f5c: 687b ldr r3, [r7, #4]
8008f5e: 695b ldr r3, [r3, #20]
8008f60: 4313 orrs r3, r2
8008f62: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
8008f64: 687b ldr r3, [r7, #4]
8008f66: 681b ldr r3, [r3, #0]
8008f68: 68db ldr r3, [r3, #12]
8008f6a: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
8008f6e: f023 030c bic.w r3, r3, #12
8008f72: 687a ldr r2, [r7, #4]
8008f74: 6812 ldr r2, [r2, #0]
8008f76: 68b9 ldr r1, [r7, #8]
8008f78: 430b orrs r3, r1
8008f7a: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8008f7c: 687b ldr r3, [r7, #4]
8008f7e: 681b ldr r3, [r3, #0]
8008f80: 695b ldr r3, [r3, #20]
8008f82: f423 7140 bic.w r1, r3, #768 @ 0x300
8008f86: 687b ldr r3, [r7, #4]
8008f88: 699a ldr r2, [r3, #24]
8008f8a: 687b ldr r3, [r7, #4]
8008f8c: 681b ldr r3, [r3, #0]
8008f8e: 430a orrs r2, r1
8008f90: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8008f92: 687b ldr r3, [r7, #4]
8008f94: 681b ldr r3, [r3, #0]
8008f96: 4a2c ldr r2, [pc, #176] @ (8009048 <UART_SetConfig+0x114>)
8008f98: 4293 cmp r3, r2
8008f9a: d103 bne.n 8008fa4 <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8008f9c: f7fe fede bl 8007d5c <HAL_RCC_GetPCLK2Freq>
8008fa0: 60f8 str r0, [r7, #12]
8008fa2: e002 b.n 8008faa <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8008fa4: f7fe fec6 bl 8007d34 <HAL_RCC_GetPCLK1Freq>
8008fa8: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8008faa: 68fa ldr r2, [r7, #12]
8008fac: 4613 mov r3, r2
8008fae: 009b lsls r3, r3, #2
8008fb0: 4413 add r3, r2
8008fb2: 009a lsls r2, r3, #2
8008fb4: 441a add r2, r3
8008fb6: 687b ldr r3, [r7, #4]
8008fb8: 685b ldr r3, [r3, #4]
8008fba: 009b lsls r3, r3, #2
8008fbc: fbb2 f3f3 udiv r3, r2, r3
8008fc0: 4a22 ldr r2, [pc, #136] @ (800904c <UART_SetConfig+0x118>)
8008fc2: fba2 2303 umull r2, r3, r2, r3
8008fc6: 095b lsrs r3, r3, #5
8008fc8: 0119 lsls r1, r3, #4
8008fca: 68fa ldr r2, [r7, #12]
8008fcc: 4613 mov r3, r2
8008fce: 009b lsls r3, r3, #2
8008fd0: 4413 add r3, r2
8008fd2: 009a lsls r2, r3, #2
8008fd4: 441a add r2, r3
8008fd6: 687b ldr r3, [r7, #4]
8008fd8: 685b ldr r3, [r3, #4]
8008fda: 009b lsls r3, r3, #2
8008fdc: fbb2 f2f3 udiv r2, r2, r3
8008fe0: 4b1a ldr r3, [pc, #104] @ (800904c <UART_SetConfig+0x118>)
8008fe2: fba3 0302 umull r0, r3, r3, r2
8008fe6: 095b lsrs r3, r3, #5
8008fe8: 2064 movs r0, #100 @ 0x64
8008fea: fb00 f303 mul.w r3, r0, r3
8008fee: 1ad3 subs r3, r2, r3
8008ff0: 011b lsls r3, r3, #4
8008ff2: 3332 adds r3, #50 @ 0x32
8008ff4: 4a15 ldr r2, [pc, #84] @ (800904c <UART_SetConfig+0x118>)
8008ff6: fba2 2303 umull r2, r3, r2, r3
8008ffa: 095b lsrs r3, r3, #5
8008ffc: f003 03f0 and.w r3, r3, #240 @ 0xf0
8009000: 4419 add r1, r3
8009002: 68fa ldr r2, [r7, #12]
8009004: 4613 mov r3, r2
8009006: 009b lsls r3, r3, #2
8009008: 4413 add r3, r2
800900a: 009a lsls r2, r3, #2
800900c: 441a add r2, r3
800900e: 687b ldr r3, [r7, #4]
8009010: 685b ldr r3, [r3, #4]
8009012: 009b lsls r3, r3, #2
8009014: fbb2 f2f3 udiv r2, r2, r3
8009018: 4b0c ldr r3, [pc, #48] @ (800904c <UART_SetConfig+0x118>)
800901a: fba3 0302 umull r0, r3, r3, r2
800901e: 095b lsrs r3, r3, #5
8009020: 2064 movs r0, #100 @ 0x64
8009022: fb00 f303 mul.w r3, r0, r3
8009026: 1ad3 subs r3, r2, r3
8009028: 011b lsls r3, r3, #4
800902a: 3332 adds r3, #50 @ 0x32
800902c: 4a07 ldr r2, [pc, #28] @ (800904c <UART_SetConfig+0x118>)
800902e: fba2 2303 umull r2, r3, r2, r3
8009032: 095b lsrs r3, r3, #5
8009034: f003 020f and.w r2, r3, #15
8009038: 687b ldr r3, [r7, #4]
800903a: 681b ldr r3, [r3, #0]
800903c: 440a add r2, r1
800903e: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
8009040: bf00 nop
8009042: 3710 adds r7, #16
8009044: 46bd mov sp, r7
8009046: bd80 pop {r7, pc}
8009048: 40013800 .word 0x40013800
800904c: 51eb851f .word 0x51eb851f
08009050 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009050: b480 push {r7}
8009052: b085 sub sp, #20
8009054: af00 add r7, sp, #0
8009056: 60f8 str r0, [r7, #12]
8009058: 4638 mov r0, r7
800905a: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800905e: 2300 movs r3, #0
}
8009060: 4618 mov r0, r3
8009062: 3714 adds r7, #20
8009064: 46bd mov sp, r7
8009066: bc80 pop {r7}
8009068: 4770 bx lr
0800906a <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
800906a: b480 push {r7}
800906c: b085 sub sp, #20
800906e: af00 add r7, sp, #0
8009070: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009072: 687b ldr r3, [r7, #4]
8009074: 2200 movs r2, #0
8009076: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
800907a: f44f 433f mov.w r3, #48896 @ 0xbf00
800907e: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8009080: 68fb ldr r3, [r7, #12]
8009082: b29a uxth r2, r3
8009084: 687b ldr r3, [r7, #4]
8009086: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
800908a: 2300 movs r3, #0
}
800908c: 4618 mov r0, r3
800908e: 3714 adds r7, #20
8009090: 46bd mov sp, r7
8009092: bc80 pop {r7}
8009094: 4770 bx lr
08009096 <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8009096: b480 push {r7}
8009098: b085 sub sp, #20
800909a: af00 add r7, sp, #0
800909c: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
800909e: f44f 433f mov.w r3, #48896 @ 0xbf00
80090a2: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
80090a4: 687b ldr r3, [r7, #4]
80090a6: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80090aa: b29a uxth r2, r3
80090ac: 68fb ldr r3, [r7, #12]
80090ae: b29b uxth r3, r3
80090b0: 43db mvns r3, r3
80090b2: b29b uxth r3, r3
80090b4: 4013 ands r3, r2
80090b6: b29a uxth r2, r3
80090b8: 687b ldr r3, [r7, #4]
80090ba: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
80090be: 2300 movs r3, #0
}
80090c0: 4618 mov r0, r3
80090c2: 3714 adds r7, #20
80090c4: 46bd mov sp, r7
80090c6: bc80 pop {r7}
80090c8: 4770 bx lr
080090ca <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
80090ca: b480 push {r7}
80090cc: b083 sub sp, #12
80090ce: af00 add r7, sp, #0
80090d0: 6078 str r0, [r7, #4]
80090d2: 460b mov r3, r1
80090d4: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
80090d6: 2300 movs r3, #0
}
80090d8: 4618 mov r0, r3
80090da: 370c adds r7, #12
80090dc: 46bd mov sp, r7
80090de: bc80 pop {r7}
80090e0: 4770 bx lr
080090e2 <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
80090e2: b480 push {r7}
80090e4: b085 sub sp, #20
80090e6: af00 add r7, sp, #0
80090e8: 60f8 str r0, [r7, #12]
80090ea: 4638 mov r0, r7
80090ec: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
80090f0: 68fb ldr r3, [r7, #12]
80090f2: 2201 movs r2, #1
80090f4: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
80090f8: 68fb ldr r3, [r7, #12]
80090fa: 2200 movs r2, #0
80090fc: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009100: 68fb ldr r3, [r7, #12]
8009102: 2200 movs r2, #0
8009104: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
8009108: 68fb ldr r3, [r7, #12]
800910a: 2200 movs r2, #0
800910c: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8009110: 2300 movs r3, #0
}
8009112: 4618 mov r0, r3
8009114: 3714 adds r7, #20
8009116: 46bd mov sp, r7
8009118: bc80 pop {r7}
800911a: 4770 bx lr
0800911c <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800911c: b480 push {r7}
800911e: b09d sub sp, #116 @ 0x74
8009120: af00 add r7, sp, #0
8009122: 6078 str r0, [r7, #4]
8009124: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
8009126: 2300 movs r3, #0
8009128: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
800912c: 687a ldr r2, [r7, #4]
800912e: 683b ldr r3, [r7, #0]
8009130: 781b ldrb r3, [r3, #0]
8009132: 009b lsls r3, r3, #2
8009134: 4413 add r3, r2
8009136: 881b ldrh r3, [r3, #0]
8009138: b29b uxth r3, r3
800913a: f423 43ec bic.w r3, r3, #30208 @ 0x7600
800913e: f023 0370 bic.w r3, r3, #112 @ 0x70
8009142: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
8009146: 683b ldr r3, [r7, #0]
8009148: 78db ldrb r3, [r3, #3]
800914a: 2b03 cmp r3, #3
800914c: d81f bhi.n 800918e <USB_ActivateEndpoint+0x72>
800914e: a201 add r2, pc, #4 @ (adr r2, 8009154 <USB_ActivateEndpoint+0x38>)
8009150: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009154: 08009165 .word 0x08009165
8009158: 08009181 .word 0x08009181
800915c: 08009197 .word 0x08009197
8009160: 08009173 .word 0x08009173
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8009164: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009168: f443 7300 orr.w r3, r3, #512 @ 0x200
800916c: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009170: e012 b.n 8009198 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8009172: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009176: f443 63c0 orr.w r3, r3, #1536 @ 0x600
800917a: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
800917e: e00b b.n 8009198 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8009180: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009184: f443 6380 orr.w r3, r3, #1024 @ 0x400
8009188: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
800918c: e004 b.n 8009198 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
800918e: 2301 movs r3, #1
8009190: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8009194: e000 b.n 8009198 <USB_ActivateEndpoint+0x7c>
break;
8009196: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8009198: 687a ldr r2, [r7, #4]
800919a: 683b ldr r3, [r7, #0]
800919c: 781b ldrb r3, [r3, #0]
800919e: 009b lsls r3, r3, #2
80091a0: 441a add r2, r3
80091a2: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
80091a6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80091aa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80091ae: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80091b2: f043 0380 orr.w r3, r3, #128 @ 0x80
80091b6: b29b uxth r3, r3
80091b8: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
80091ba: 687a ldr r2, [r7, #4]
80091bc: 683b ldr r3, [r7, #0]
80091be: 781b ldrb r3, [r3, #0]
80091c0: 009b lsls r3, r3, #2
80091c2: 4413 add r3, r2
80091c4: 881b ldrh r3, [r3, #0]
80091c6: b29b uxth r3, r3
80091c8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80091cc: f023 0370 bic.w r3, r3, #112 @ 0x70
80091d0: b29b uxth r3, r3
80091d2: 683a ldr r2, [r7, #0]
80091d4: 7812 ldrb r2, [r2, #0]
80091d6: 4313 orrs r3, r2
80091d8: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
80091dc: 687a ldr r2, [r7, #4]
80091de: 683b ldr r3, [r7, #0]
80091e0: 781b ldrb r3, [r3, #0]
80091e2: 009b lsls r3, r3, #2
80091e4: 441a add r2, r3
80091e6: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
80091ea: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80091ee: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80091f2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80091f6: f043 0380 orr.w r3, r3, #128 @ 0x80
80091fa: b29b uxth r3, r3
80091fc: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
80091fe: 683b ldr r3, [r7, #0]
8009200: 7b1b ldrb r3, [r3, #12]
8009202: 2b00 cmp r3, #0
8009204: f040 8178 bne.w 80094f8 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8009208: 683b ldr r3, [r7, #0]
800920a: 785b ldrb r3, [r3, #1]
800920c: 2b00 cmp r3, #0
800920e: f000 8084 beq.w 800931a <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8009212: 687b ldr r3, [r7, #4]
8009214: 61bb str r3, [r7, #24]
8009216: 687b ldr r3, [r7, #4]
8009218: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800921c: b29b uxth r3, r3
800921e: 461a mov r2, r3
8009220: 69bb ldr r3, [r7, #24]
8009222: 4413 add r3, r2
8009224: 61bb str r3, [r7, #24]
8009226: 683b ldr r3, [r7, #0]
8009228: 781b ldrb r3, [r3, #0]
800922a: 011a lsls r2, r3, #4
800922c: 69bb ldr r3, [r7, #24]
800922e: 4413 add r3, r2
8009230: f503 6380 add.w r3, r3, #1024 @ 0x400
8009234: 617b str r3, [r7, #20]
8009236: 683b ldr r3, [r7, #0]
8009238: 88db ldrh r3, [r3, #6]
800923a: 085b lsrs r3, r3, #1
800923c: b29b uxth r3, r3
800923e: 005b lsls r3, r3, #1
8009240: b29a uxth r2, r3
8009242: 697b ldr r3, [r7, #20]
8009244: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009246: 687a ldr r2, [r7, #4]
8009248: 683b ldr r3, [r7, #0]
800924a: 781b ldrb r3, [r3, #0]
800924c: 009b lsls r3, r3, #2
800924e: 4413 add r3, r2
8009250: 881b ldrh r3, [r3, #0]
8009252: 827b strh r3, [r7, #18]
8009254: 8a7b ldrh r3, [r7, #18]
8009256: f003 0340 and.w r3, r3, #64 @ 0x40
800925a: 2b00 cmp r3, #0
800925c: d01b beq.n 8009296 <USB_ActivateEndpoint+0x17a>
800925e: 687a ldr r2, [r7, #4]
8009260: 683b ldr r3, [r7, #0]
8009262: 781b ldrb r3, [r3, #0]
8009264: 009b lsls r3, r3, #2
8009266: 4413 add r3, r2
8009268: 881b ldrh r3, [r3, #0]
800926a: b29b uxth r3, r3
800926c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009270: f023 0370 bic.w r3, r3, #112 @ 0x70
8009274: 823b strh r3, [r7, #16]
8009276: 687a ldr r2, [r7, #4]
8009278: 683b ldr r3, [r7, #0]
800927a: 781b ldrb r3, [r3, #0]
800927c: 009b lsls r3, r3, #2
800927e: 441a add r2, r3
8009280: 8a3b ldrh r3, [r7, #16]
8009282: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009286: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800928a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800928e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009292: b29b uxth r3, r3
8009294: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8009296: 683b ldr r3, [r7, #0]
8009298: 78db ldrb r3, [r3, #3]
800929a: 2b01 cmp r3, #1
800929c: d020 beq.n 80092e0 <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800929e: 687a ldr r2, [r7, #4]
80092a0: 683b ldr r3, [r7, #0]
80092a2: 781b ldrb r3, [r3, #0]
80092a4: 009b lsls r3, r3, #2
80092a6: 4413 add r3, r2
80092a8: 881b ldrh r3, [r3, #0]
80092aa: b29b uxth r3, r3
80092ac: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80092b0: f023 0340 bic.w r3, r3, #64 @ 0x40
80092b4: 81bb strh r3, [r7, #12]
80092b6: 89bb ldrh r3, [r7, #12]
80092b8: f083 0320 eor.w r3, r3, #32
80092bc: 81bb strh r3, [r7, #12]
80092be: 687a ldr r2, [r7, #4]
80092c0: 683b ldr r3, [r7, #0]
80092c2: 781b ldrb r3, [r3, #0]
80092c4: 009b lsls r3, r3, #2
80092c6: 441a add r2, r3
80092c8: 89bb ldrh r3, [r7, #12]
80092ca: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80092ce: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80092d2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80092d6: f043 0380 orr.w r3, r3, #128 @ 0x80
80092da: b29b uxth r3, r3
80092dc: 8013 strh r3, [r2, #0]
80092de: e2d5 b.n 800988c <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
80092e0: 687a ldr r2, [r7, #4]
80092e2: 683b ldr r3, [r7, #0]
80092e4: 781b ldrb r3, [r3, #0]
80092e6: 009b lsls r3, r3, #2
80092e8: 4413 add r3, r2
80092ea: 881b ldrh r3, [r3, #0]
80092ec: b29b uxth r3, r3
80092ee: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80092f2: f023 0340 bic.w r3, r3, #64 @ 0x40
80092f6: 81fb strh r3, [r7, #14]
80092f8: 687a ldr r2, [r7, #4]
80092fa: 683b ldr r3, [r7, #0]
80092fc: 781b ldrb r3, [r3, #0]
80092fe: 009b lsls r3, r3, #2
8009300: 441a add r2, r3
8009302: 89fb ldrh r3, [r7, #14]
8009304: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009308: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800930c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009310: f043 0380 orr.w r3, r3, #128 @ 0x80
8009314: b29b uxth r3, r3
8009316: 8013 strh r3, [r2, #0]
8009318: e2b8 b.n 800988c <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
800931a: 687b ldr r3, [r7, #4]
800931c: 633b str r3, [r7, #48] @ 0x30
800931e: 687b ldr r3, [r7, #4]
8009320: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009324: b29b uxth r3, r3
8009326: 461a mov r2, r3
8009328: 6b3b ldr r3, [r7, #48] @ 0x30
800932a: 4413 add r3, r2
800932c: 633b str r3, [r7, #48] @ 0x30
800932e: 683b ldr r3, [r7, #0]
8009330: 781b ldrb r3, [r3, #0]
8009332: 011a lsls r2, r3, #4
8009334: 6b3b ldr r3, [r7, #48] @ 0x30
8009336: 4413 add r3, r2
8009338: f503 6381 add.w r3, r3, #1032 @ 0x408
800933c: 62fb str r3, [r7, #44] @ 0x2c
800933e: 683b ldr r3, [r7, #0]
8009340: 88db ldrh r3, [r3, #6]
8009342: 085b lsrs r3, r3, #1
8009344: b29b uxth r3, r3
8009346: 005b lsls r3, r3, #1
8009348: b29a uxth r2, r3
800934a: 6afb ldr r3, [r7, #44] @ 0x2c
800934c: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
800934e: 687b ldr r3, [r7, #4]
8009350: 62bb str r3, [r7, #40] @ 0x28
8009352: 687b ldr r3, [r7, #4]
8009354: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009358: b29b uxth r3, r3
800935a: 461a mov r2, r3
800935c: 6abb ldr r3, [r7, #40] @ 0x28
800935e: 4413 add r3, r2
8009360: 62bb str r3, [r7, #40] @ 0x28
8009362: 683b ldr r3, [r7, #0]
8009364: 781b ldrb r3, [r3, #0]
8009366: 011a lsls r2, r3, #4
8009368: 6abb ldr r3, [r7, #40] @ 0x28
800936a: 4413 add r3, r2
800936c: f203 430c addw r3, r3, #1036 @ 0x40c
8009370: 627b str r3, [r7, #36] @ 0x24
8009372: 6a7b ldr r3, [r7, #36] @ 0x24
8009374: 881b ldrh r3, [r3, #0]
8009376: b29b uxth r3, r3
8009378: f3c3 0309 ubfx r3, r3, #0, #10
800937c: b29a uxth r2, r3
800937e: 6a7b ldr r3, [r7, #36] @ 0x24
8009380: 801a strh r2, [r3, #0]
8009382: 683b ldr r3, [r7, #0]
8009384: 691b ldr r3, [r3, #16]
8009386: 2b3e cmp r3, #62 @ 0x3e
8009388: d91d bls.n 80093c6 <USB_ActivateEndpoint+0x2aa>
800938a: 683b ldr r3, [r7, #0]
800938c: 691b ldr r3, [r3, #16]
800938e: 095b lsrs r3, r3, #5
8009390: 66bb str r3, [r7, #104] @ 0x68
8009392: 683b ldr r3, [r7, #0]
8009394: 691b ldr r3, [r3, #16]
8009396: f003 031f and.w r3, r3, #31
800939a: 2b00 cmp r3, #0
800939c: d102 bne.n 80093a4 <USB_ActivateEndpoint+0x288>
800939e: 6ebb ldr r3, [r7, #104] @ 0x68
80093a0: 3b01 subs r3, #1
80093a2: 66bb str r3, [r7, #104] @ 0x68
80093a4: 6a7b ldr r3, [r7, #36] @ 0x24
80093a6: 881b ldrh r3, [r3, #0]
80093a8: b29a uxth r2, r3
80093aa: 6ebb ldr r3, [r7, #104] @ 0x68
80093ac: b29b uxth r3, r3
80093ae: 029b lsls r3, r3, #10
80093b0: b29b uxth r3, r3
80093b2: 4313 orrs r3, r2
80093b4: b29b uxth r3, r3
80093b6: ea6f 4343 mvn.w r3, r3, lsl #17
80093ba: ea6f 4353 mvn.w r3, r3, lsr #17
80093be: b29a uxth r2, r3
80093c0: 6a7b ldr r3, [r7, #36] @ 0x24
80093c2: 801a strh r2, [r3, #0]
80093c4: e026 b.n 8009414 <USB_ActivateEndpoint+0x2f8>
80093c6: 683b ldr r3, [r7, #0]
80093c8: 691b ldr r3, [r3, #16]
80093ca: 2b00 cmp r3, #0
80093cc: d10a bne.n 80093e4 <USB_ActivateEndpoint+0x2c8>
80093ce: 6a7b ldr r3, [r7, #36] @ 0x24
80093d0: 881b ldrh r3, [r3, #0]
80093d2: b29b uxth r3, r3
80093d4: ea6f 4343 mvn.w r3, r3, lsl #17
80093d8: ea6f 4353 mvn.w r3, r3, lsr #17
80093dc: b29a uxth r2, r3
80093de: 6a7b ldr r3, [r7, #36] @ 0x24
80093e0: 801a strh r2, [r3, #0]
80093e2: e017 b.n 8009414 <USB_ActivateEndpoint+0x2f8>
80093e4: 683b ldr r3, [r7, #0]
80093e6: 691b ldr r3, [r3, #16]
80093e8: 085b lsrs r3, r3, #1
80093ea: 66bb str r3, [r7, #104] @ 0x68
80093ec: 683b ldr r3, [r7, #0]
80093ee: 691b ldr r3, [r3, #16]
80093f0: f003 0301 and.w r3, r3, #1
80093f4: 2b00 cmp r3, #0
80093f6: d002 beq.n 80093fe <USB_ActivateEndpoint+0x2e2>
80093f8: 6ebb ldr r3, [r7, #104] @ 0x68
80093fa: 3301 adds r3, #1
80093fc: 66bb str r3, [r7, #104] @ 0x68
80093fe: 6a7b ldr r3, [r7, #36] @ 0x24
8009400: 881b ldrh r3, [r3, #0]
8009402: b29a uxth r2, r3
8009404: 6ebb ldr r3, [r7, #104] @ 0x68
8009406: b29b uxth r3, r3
8009408: 029b lsls r3, r3, #10
800940a: b29b uxth r3, r3
800940c: 4313 orrs r3, r2
800940e: b29a uxth r2, r3
8009410: 6a7b ldr r3, [r7, #36] @ 0x24
8009412: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009414: 687a ldr r2, [r7, #4]
8009416: 683b ldr r3, [r7, #0]
8009418: 781b ldrb r3, [r3, #0]
800941a: 009b lsls r3, r3, #2
800941c: 4413 add r3, r2
800941e: 881b ldrh r3, [r3, #0]
8009420: 847b strh r3, [r7, #34] @ 0x22
8009422: 8c7b ldrh r3, [r7, #34] @ 0x22
8009424: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009428: 2b00 cmp r3, #0
800942a: d01b beq.n 8009464 <USB_ActivateEndpoint+0x348>
800942c: 687a ldr r2, [r7, #4]
800942e: 683b ldr r3, [r7, #0]
8009430: 781b ldrb r3, [r3, #0]
8009432: 009b lsls r3, r3, #2
8009434: 4413 add r3, r2
8009436: 881b ldrh r3, [r3, #0]
8009438: b29b uxth r3, r3
800943a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800943e: f023 0370 bic.w r3, r3, #112 @ 0x70
8009442: 843b strh r3, [r7, #32]
8009444: 687a ldr r2, [r7, #4]
8009446: 683b ldr r3, [r7, #0]
8009448: 781b ldrb r3, [r3, #0]
800944a: 009b lsls r3, r3, #2
800944c: 441a add r2, r3
800944e: 8c3b ldrh r3, [r7, #32]
8009450: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009454: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009458: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800945c: f043 0380 orr.w r3, r3, #128 @ 0x80
8009460: b29b uxth r3, r3
8009462: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
8009464: 683b ldr r3, [r7, #0]
8009466: 781b ldrb r3, [r3, #0]
8009468: 2b00 cmp r3, #0
800946a: d124 bne.n 80094b6 <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800946c: 687a ldr r2, [r7, #4]
800946e: 683b ldr r3, [r7, #0]
8009470: 781b ldrb r3, [r3, #0]
8009472: 009b lsls r3, r3, #2
8009474: 4413 add r3, r2
8009476: 881b ldrh r3, [r3, #0]
8009478: b29b uxth r3, r3
800947a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800947e: f023 0370 bic.w r3, r3, #112 @ 0x70
8009482: 83bb strh r3, [r7, #28]
8009484: 8bbb ldrh r3, [r7, #28]
8009486: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800948a: 83bb strh r3, [r7, #28]
800948c: 8bbb ldrh r3, [r7, #28]
800948e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8009492: 83bb strh r3, [r7, #28]
8009494: 687a ldr r2, [r7, #4]
8009496: 683b ldr r3, [r7, #0]
8009498: 781b ldrb r3, [r3, #0]
800949a: 009b lsls r3, r3, #2
800949c: 441a add r2, r3
800949e: 8bbb ldrh r3, [r7, #28]
80094a0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80094a4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80094a8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80094ac: f043 0380 orr.w r3, r3, #128 @ 0x80
80094b0: b29b uxth r3, r3
80094b2: 8013 strh r3, [r2, #0]
80094b4: e1ea b.n 800988c <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
80094b6: 687a ldr r2, [r7, #4]
80094b8: 683b ldr r3, [r7, #0]
80094ba: 781b ldrb r3, [r3, #0]
80094bc: 009b lsls r3, r3, #2
80094be: 4413 add r3, r2
80094c0: 881b ldrh r3, [r3, #0]
80094c2: b29b uxth r3, r3
80094c4: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80094c8: f023 0370 bic.w r3, r3, #112 @ 0x70
80094cc: 83fb strh r3, [r7, #30]
80094ce: 8bfb ldrh r3, [r7, #30]
80094d0: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80094d4: 83fb strh r3, [r7, #30]
80094d6: 687a ldr r2, [r7, #4]
80094d8: 683b ldr r3, [r7, #0]
80094da: 781b ldrb r3, [r3, #0]
80094dc: 009b lsls r3, r3, #2
80094de: 441a add r2, r3
80094e0: 8bfb ldrh r3, [r7, #30]
80094e2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80094e6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80094ea: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80094ee: f043 0380 orr.w r3, r3, #128 @ 0x80
80094f2: b29b uxth r3, r3
80094f4: 8013 strh r3, [r2, #0]
80094f6: e1c9 b.n 800988c <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
80094f8: 683b ldr r3, [r7, #0]
80094fa: 78db ldrb r3, [r3, #3]
80094fc: 2b02 cmp r3, #2
80094fe: d11e bne.n 800953e <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8009500: 687a ldr r2, [r7, #4]
8009502: 683b ldr r3, [r7, #0]
8009504: 781b ldrb r3, [r3, #0]
8009506: 009b lsls r3, r3, #2
8009508: 4413 add r3, r2
800950a: 881b ldrh r3, [r3, #0]
800950c: b29b uxth r3, r3
800950e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009512: f023 0370 bic.w r3, r3, #112 @ 0x70
8009516: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800951a: 687a ldr r2, [r7, #4]
800951c: 683b ldr r3, [r7, #0]
800951e: 781b ldrb r3, [r3, #0]
8009520: 009b lsls r3, r3, #2
8009522: 441a add r2, r3
8009524: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8009528: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800952c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009530: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8009534: f043 0380 orr.w r3, r3, #128 @ 0x80
8009538: b29b uxth r3, r3
800953a: 8013 strh r3, [r2, #0]
800953c: e01d b.n 800957a <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
800953e: 687a ldr r2, [r7, #4]
8009540: 683b ldr r3, [r7, #0]
8009542: 781b ldrb r3, [r3, #0]
8009544: 009b lsls r3, r3, #2
8009546: 4413 add r3, r2
8009548: 881b ldrh r3, [r3, #0]
800954a: b29b uxth r3, r3
800954c: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8009550: f023 0370 bic.w r3, r3, #112 @ 0x70
8009554: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
8009558: 687a ldr r2, [r7, #4]
800955a: 683b ldr r3, [r7, #0]
800955c: 781b ldrb r3, [r3, #0]
800955e: 009b lsls r3, r3, #2
8009560: 441a add r2, r3
8009562: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
8009566: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800956a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800956e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009572: f043 0380 orr.w r3, r3, #128 @ 0x80
8009576: b29b uxth r3, r3
8009578: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
800957a: 687b ldr r3, [r7, #4]
800957c: 65fb str r3, [r7, #92] @ 0x5c
800957e: 687b ldr r3, [r7, #4]
8009580: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009584: b29b uxth r3, r3
8009586: 461a mov r2, r3
8009588: 6dfb ldr r3, [r7, #92] @ 0x5c
800958a: 4413 add r3, r2
800958c: 65fb str r3, [r7, #92] @ 0x5c
800958e: 683b ldr r3, [r7, #0]
8009590: 781b ldrb r3, [r3, #0]
8009592: 011a lsls r2, r3, #4
8009594: 6dfb ldr r3, [r7, #92] @ 0x5c
8009596: 4413 add r3, r2
8009598: f503 6380 add.w r3, r3, #1024 @ 0x400
800959c: 65bb str r3, [r7, #88] @ 0x58
800959e: 683b ldr r3, [r7, #0]
80095a0: 891b ldrh r3, [r3, #8]
80095a2: 085b lsrs r3, r3, #1
80095a4: b29b uxth r3, r3
80095a6: 005b lsls r3, r3, #1
80095a8: b29a uxth r2, r3
80095aa: 6dbb ldr r3, [r7, #88] @ 0x58
80095ac: 801a strh r2, [r3, #0]
80095ae: 687b ldr r3, [r7, #4]
80095b0: 657b str r3, [r7, #84] @ 0x54
80095b2: 687b ldr r3, [r7, #4]
80095b4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80095b8: b29b uxth r3, r3
80095ba: 461a mov r2, r3
80095bc: 6d7b ldr r3, [r7, #84] @ 0x54
80095be: 4413 add r3, r2
80095c0: 657b str r3, [r7, #84] @ 0x54
80095c2: 683b ldr r3, [r7, #0]
80095c4: 781b ldrb r3, [r3, #0]
80095c6: 011a lsls r2, r3, #4
80095c8: 6d7b ldr r3, [r7, #84] @ 0x54
80095ca: 4413 add r3, r2
80095cc: f503 6381 add.w r3, r3, #1032 @ 0x408
80095d0: 653b str r3, [r7, #80] @ 0x50
80095d2: 683b ldr r3, [r7, #0]
80095d4: 895b ldrh r3, [r3, #10]
80095d6: 085b lsrs r3, r3, #1
80095d8: b29b uxth r3, r3
80095da: 005b lsls r3, r3, #1
80095dc: b29a uxth r2, r3
80095de: 6d3b ldr r3, [r7, #80] @ 0x50
80095e0: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
80095e2: 683b ldr r3, [r7, #0]
80095e4: 785b ldrb r3, [r3, #1]
80095e6: 2b00 cmp r3, #0
80095e8: f040 8093 bne.w 8009712 <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80095ec: 687a ldr r2, [r7, #4]
80095ee: 683b ldr r3, [r7, #0]
80095f0: 781b ldrb r3, [r3, #0]
80095f2: 009b lsls r3, r3, #2
80095f4: 4413 add r3, r2
80095f6: 881b ldrh r3, [r3, #0]
80095f8: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
80095fc: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8009600: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009604: 2b00 cmp r3, #0
8009606: d01b beq.n 8009640 <USB_ActivateEndpoint+0x524>
8009608: 687a ldr r2, [r7, #4]
800960a: 683b ldr r3, [r7, #0]
800960c: 781b ldrb r3, [r3, #0]
800960e: 009b lsls r3, r3, #2
8009610: 4413 add r3, r2
8009612: 881b ldrh r3, [r3, #0]
8009614: b29b uxth r3, r3
8009616: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800961a: f023 0370 bic.w r3, r3, #112 @ 0x70
800961e: 87fb strh r3, [r7, #62] @ 0x3e
8009620: 687a ldr r2, [r7, #4]
8009622: 683b ldr r3, [r7, #0]
8009624: 781b ldrb r3, [r3, #0]
8009626: 009b lsls r3, r3, #2
8009628: 441a add r2, r3
800962a: 8ffb ldrh r3, [r7, #62] @ 0x3e
800962c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009630: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009634: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009638: f043 0380 orr.w r3, r3, #128 @ 0x80
800963c: b29b uxth r3, r3
800963e: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009640: 687a ldr r2, [r7, #4]
8009642: 683b ldr r3, [r7, #0]
8009644: 781b ldrb r3, [r3, #0]
8009646: 009b lsls r3, r3, #2
8009648: 4413 add r3, r2
800964a: 881b ldrh r3, [r3, #0]
800964c: 87bb strh r3, [r7, #60] @ 0x3c
800964e: 8fbb ldrh r3, [r7, #60] @ 0x3c
8009650: f003 0340 and.w r3, r3, #64 @ 0x40
8009654: 2b00 cmp r3, #0
8009656: d01b beq.n 8009690 <USB_ActivateEndpoint+0x574>
8009658: 687a ldr r2, [r7, #4]
800965a: 683b ldr r3, [r7, #0]
800965c: 781b ldrb r3, [r3, #0]
800965e: 009b lsls r3, r3, #2
8009660: 4413 add r3, r2
8009662: 881b ldrh r3, [r3, #0]
8009664: b29b uxth r3, r3
8009666: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800966a: f023 0370 bic.w r3, r3, #112 @ 0x70
800966e: 877b strh r3, [r7, #58] @ 0x3a
8009670: 687a ldr r2, [r7, #4]
8009672: 683b ldr r3, [r7, #0]
8009674: 781b ldrb r3, [r3, #0]
8009676: 009b lsls r3, r3, #2
8009678: 441a add r2, r3
800967a: 8f7b ldrh r3, [r7, #58] @ 0x3a
800967c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009680: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009684: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009688: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800968c: b29b uxth r3, r3
800968e: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8009690: 687a ldr r2, [r7, #4]
8009692: 683b ldr r3, [r7, #0]
8009694: 781b ldrb r3, [r3, #0]
8009696: 009b lsls r3, r3, #2
8009698: 4413 add r3, r2
800969a: 881b ldrh r3, [r3, #0]
800969c: b29b uxth r3, r3
800969e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80096a2: f023 0370 bic.w r3, r3, #112 @ 0x70
80096a6: 873b strh r3, [r7, #56] @ 0x38
80096a8: 8f3b ldrh r3, [r7, #56] @ 0x38
80096aa: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80096ae: 873b strh r3, [r7, #56] @ 0x38
80096b0: 8f3b ldrh r3, [r7, #56] @ 0x38
80096b2: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80096b6: 873b strh r3, [r7, #56] @ 0x38
80096b8: 687a ldr r2, [r7, #4]
80096ba: 683b ldr r3, [r7, #0]
80096bc: 781b ldrb r3, [r3, #0]
80096be: 009b lsls r3, r3, #2
80096c0: 441a add r2, r3
80096c2: 8f3b ldrh r3, [r7, #56] @ 0x38
80096c4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80096c8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80096cc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80096d0: f043 0380 orr.w r3, r3, #128 @ 0x80
80096d4: b29b uxth r3, r3
80096d6: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
80096d8: 687a ldr r2, [r7, #4]
80096da: 683b ldr r3, [r7, #0]
80096dc: 781b ldrb r3, [r3, #0]
80096de: 009b lsls r3, r3, #2
80096e0: 4413 add r3, r2
80096e2: 881b ldrh r3, [r3, #0]
80096e4: b29b uxth r3, r3
80096e6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80096ea: f023 0340 bic.w r3, r3, #64 @ 0x40
80096ee: 86fb strh r3, [r7, #54] @ 0x36
80096f0: 687a ldr r2, [r7, #4]
80096f2: 683b ldr r3, [r7, #0]
80096f4: 781b ldrb r3, [r3, #0]
80096f6: 009b lsls r3, r3, #2
80096f8: 441a add r2, r3
80096fa: 8efb ldrh r3, [r7, #54] @ 0x36
80096fc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009700: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009704: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009708: f043 0380 orr.w r3, r3, #128 @ 0x80
800970c: b29b uxth r3, r3
800970e: 8013 strh r3, [r2, #0]
8009710: e0bc b.n 800988c <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009712: 687a ldr r2, [r7, #4]
8009714: 683b ldr r3, [r7, #0]
8009716: 781b ldrb r3, [r3, #0]
8009718: 009b lsls r3, r3, #2
800971a: 4413 add r3, r2
800971c: 881b ldrh r3, [r3, #0]
800971e: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8009722: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8009726: f403 4380 and.w r3, r3, #16384 @ 0x4000
800972a: 2b00 cmp r3, #0
800972c: d01d beq.n 800976a <USB_ActivateEndpoint+0x64e>
800972e: 687a ldr r2, [r7, #4]
8009730: 683b ldr r3, [r7, #0]
8009732: 781b ldrb r3, [r3, #0]
8009734: 009b lsls r3, r3, #2
8009736: 4413 add r3, r2
8009738: 881b ldrh r3, [r3, #0]
800973a: b29b uxth r3, r3
800973c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009740: f023 0370 bic.w r3, r3, #112 @ 0x70
8009744: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
8009748: 687a ldr r2, [r7, #4]
800974a: 683b ldr r3, [r7, #0]
800974c: 781b ldrb r3, [r3, #0]
800974e: 009b lsls r3, r3, #2
8009750: 441a add r2, r3
8009752: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
8009756: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800975a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800975e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009762: f043 0380 orr.w r3, r3, #128 @ 0x80
8009766: b29b uxth r3, r3
8009768: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800976a: 687a ldr r2, [r7, #4]
800976c: 683b ldr r3, [r7, #0]
800976e: 781b ldrb r3, [r3, #0]
8009770: 009b lsls r3, r3, #2
8009772: 4413 add r3, r2
8009774: 881b ldrh r3, [r3, #0]
8009776: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
800977a: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800977e: f003 0340 and.w r3, r3, #64 @ 0x40
8009782: 2b00 cmp r3, #0
8009784: d01d beq.n 80097c2 <USB_ActivateEndpoint+0x6a6>
8009786: 687a ldr r2, [r7, #4]
8009788: 683b ldr r3, [r7, #0]
800978a: 781b ldrb r3, [r3, #0]
800978c: 009b lsls r3, r3, #2
800978e: 4413 add r3, r2
8009790: 881b ldrh r3, [r3, #0]
8009792: b29b uxth r3, r3
8009794: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009798: f023 0370 bic.w r3, r3, #112 @ 0x70
800979c: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
80097a0: 687a ldr r2, [r7, #4]
80097a2: 683b ldr r3, [r7, #0]
80097a4: 781b ldrb r3, [r3, #0]
80097a6: 009b lsls r3, r3, #2
80097a8: 441a add r2, r3
80097aa: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
80097ae: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80097b2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80097b6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80097ba: f043 03c0 orr.w r3, r3, #192 @ 0xc0
80097be: b29b uxth r3, r3
80097c0: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
80097c2: 683b ldr r3, [r7, #0]
80097c4: 78db ldrb r3, [r3, #3]
80097c6: 2b01 cmp r3, #1
80097c8: d024 beq.n 8009814 <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
80097ca: 687a ldr r2, [r7, #4]
80097cc: 683b ldr r3, [r7, #0]
80097ce: 781b ldrb r3, [r3, #0]
80097d0: 009b lsls r3, r3, #2
80097d2: 4413 add r3, r2
80097d4: 881b ldrh r3, [r3, #0]
80097d6: b29b uxth r3, r3
80097d8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80097dc: f023 0340 bic.w r3, r3, #64 @ 0x40
80097e0: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
80097e4: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
80097e8: f083 0320 eor.w r3, r3, #32
80097ec: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
80097f0: 687a ldr r2, [r7, #4]
80097f2: 683b ldr r3, [r7, #0]
80097f4: 781b ldrb r3, [r3, #0]
80097f6: 009b lsls r3, r3, #2
80097f8: 441a add r2, r3
80097fa: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
80097fe: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009802: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009806: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800980a: f043 0380 orr.w r3, r3, #128 @ 0x80
800980e: b29b uxth r3, r3
8009810: 8013 strh r3, [r2, #0]
8009812: e01d b.n 8009850 <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009814: 687a ldr r2, [r7, #4]
8009816: 683b ldr r3, [r7, #0]
8009818: 781b ldrb r3, [r3, #0]
800981a: 009b lsls r3, r3, #2
800981c: 4413 add r3, r2
800981e: 881b ldrh r3, [r3, #0]
8009820: b29b uxth r3, r3
8009822: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009826: f023 0340 bic.w r3, r3, #64 @ 0x40
800982a: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
800982e: 687a ldr r2, [r7, #4]
8009830: 683b ldr r3, [r7, #0]
8009832: 781b ldrb r3, [r3, #0]
8009834: 009b lsls r3, r3, #2
8009836: 441a add r2, r3
8009838: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800983c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009840: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009844: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009848: f043 0380 orr.w r3, r3, #128 @ 0x80
800984c: b29b uxth r3, r3
800984e: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009850: 687a ldr r2, [r7, #4]
8009852: 683b ldr r3, [r7, #0]
8009854: 781b ldrb r3, [r3, #0]
8009856: 009b lsls r3, r3, #2
8009858: 4413 add r3, r2
800985a: 881b ldrh r3, [r3, #0]
800985c: b29b uxth r3, r3
800985e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009862: f023 0370 bic.w r3, r3, #112 @ 0x70
8009866: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
800986a: 687a ldr r2, [r7, #4]
800986c: 683b ldr r3, [r7, #0]
800986e: 781b ldrb r3, [r3, #0]
8009870: 009b lsls r3, r3, #2
8009872: 441a add r2, r3
8009874: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8009878: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800987c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009880: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009884: f043 0380 orr.w r3, r3, #128 @ 0x80
8009888: b29b uxth r3, r3
800988a: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
800988c: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
8009890: 4618 mov r0, r3
8009892: 3774 adds r7, #116 @ 0x74
8009894: 46bd mov sp, r7
8009896: bc80 pop {r7}
8009898: 4770 bx lr
800989a: bf00 nop
0800989c <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800989c: b480 push {r7}
800989e: b08d sub sp, #52 @ 0x34
80098a0: af00 add r7, sp, #0
80098a2: 6078 str r0, [r7, #4]
80098a4: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
80098a6: 683b ldr r3, [r7, #0]
80098a8: 7b1b ldrb r3, [r3, #12]
80098aa: 2b00 cmp r3, #0
80098ac: f040 808e bne.w 80099cc <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
80098b0: 683b ldr r3, [r7, #0]
80098b2: 785b ldrb r3, [r3, #1]
80098b4: 2b00 cmp r3, #0
80098b6: d044 beq.n 8009942 <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
80098b8: 687a ldr r2, [r7, #4]
80098ba: 683b ldr r3, [r7, #0]
80098bc: 781b ldrb r3, [r3, #0]
80098be: 009b lsls r3, r3, #2
80098c0: 4413 add r3, r2
80098c2: 881b ldrh r3, [r3, #0]
80098c4: 81bb strh r3, [r7, #12]
80098c6: 89bb ldrh r3, [r7, #12]
80098c8: f003 0340 and.w r3, r3, #64 @ 0x40
80098cc: 2b00 cmp r3, #0
80098ce: d01b beq.n 8009908 <USB_DeactivateEndpoint+0x6c>
80098d0: 687a ldr r2, [r7, #4]
80098d2: 683b ldr r3, [r7, #0]
80098d4: 781b ldrb r3, [r3, #0]
80098d6: 009b lsls r3, r3, #2
80098d8: 4413 add r3, r2
80098da: 881b ldrh r3, [r3, #0]
80098dc: b29b uxth r3, r3
80098de: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80098e2: f023 0370 bic.w r3, r3, #112 @ 0x70
80098e6: 817b strh r3, [r7, #10]
80098e8: 687a ldr r2, [r7, #4]
80098ea: 683b ldr r3, [r7, #0]
80098ec: 781b ldrb r3, [r3, #0]
80098ee: 009b lsls r3, r3, #2
80098f0: 441a add r2, r3
80098f2: 897b ldrh r3, [r7, #10]
80098f4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80098f8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80098fc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009900: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009904: b29b uxth r3, r3
8009906: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009908: 687a ldr r2, [r7, #4]
800990a: 683b ldr r3, [r7, #0]
800990c: 781b ldrb r3, [r3, #0]
800990e: 009b lsls r3, r3, #2
8009910: 4413 add r3, r2
8009912: 881b ldrh r3, [r3, #0]
8009914: b29b uxth r3, r3
8009916: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800991a: f023 0340 bic.w r3, r3, #64 @ 0x40
800991e: 813b strh r3, [r7, #8]
8009920: 687a ldr r2, [r7, #4]
8009922: 683b ldr r3, [r7, #0]
8009924: 781b ldrb r3, [r3, #0]
8009926: 009b lsls r3, r3, #2
8009928: 441a add r2, r3
800992a: 893b ldrh r3, [r7, #8]
800992c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009930: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009934: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009938: f043 0380 orr.w r3, r3, #128 @ 0x80
800993c: b29b uxth r3, r3
800993e: 8013 strh r3, [r2, #0]
8009940: e192 b.n 8009c68 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009942: 687a ldr r2, [r7, #4]
8009944: 683b ldr r3, [r7, #0]
8009946: 781b ldrb r3, [r3, #0]
8009948: 009b lsls r3, r3, #2
800994a: 4413 add r3, r2
800994c: 881b ldrh r3, [r3, #0]
800994e: 827b strh r3, [r7, #18]
8009950: 8a7b ldrh r3, [r7, #18]
8009952: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009956: 2b00 cmp r3, #0
8009958: d01b beq.n 8009992 <USB_DeactivateEndpoint+0xf6>
800995a: 687a ldr r2, [r7, #4]
800995c: 683b ldr r3, [r7, #0]
800995e: 781b ldrb r3, [r3, #0]
8009960: 009b lsls r3, r3, #2
8009962: 4413 add r3, r2
8009964: 881b ldrh r3, [r3, #0]
8009966: b29b uxth r3, r3
8009968: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800996c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009970: 823b strh r3, [r7, #16]
8009972: 687a ldr r2, [r7, #4]
8009974: 683b ldr r3, [r7, #0]
8009976: 781b ldrb r3, [r3, #0]
8009978: 009b lsls r3, r3, #2
800997a: 441a add r2, r3
800997c: 8a3b ldrh r3, [r7, #16]
800997e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009982: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009986: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800998a: f043 0380 orr.w r3, r3, #128 @ 0x80
800998e: b29b uxth r3, r3
8009990: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009992: 687a ldr r2, [r7, #4]
8009994: 683b ldr r3, [r7, #0]
8009996: 781b ldrb r3, [r3, #0]
8009998: 009b lsls r3, r3, #2
800999a: 4413 add r3, r2
800999c: 881b ldrh r3, [r3, #0]
800999e: b29b uxth r3, r3
80099a0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80099a4: f023 0370 bic.w r3, r3, #112 @ 0x70
80099a8: 81fb strh r3, [r7, #14]
80099aa: 687a ldr r2, [r7, #4]
80099ac: 683b ldr r3, [r7, #0]
80099ae: 781b ldrb r3, [r3, #0]
80099b0: 009b lsls r3, r3, #2
80099b2: 441a add r2, r3
80099b4: 89fb ldrh r3, [r7, #14]
80099b6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80099ba: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80099be: f443 4300 orr.w r3, r3, #32768 @ 0x8000
80099c2: f043 0380 orr.w r3, r3, #128 @ 0x80
80099c6: b29b uxth r3, r3
80099c8: 8013 strh r3, [r2, #0]
80099ca: e14d b.n 8009c68 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
80099cc: 683b ldr r3, [r7, #0]
80099ce: 785b ldrb r3, [r3, #1]
80099d0: 2b00 cmp r3, #0
80099d2: f040 80a5 bne.w 8009b20 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
80099d6: 687a ldr r2, [r7, #4]
80099d8: 683b ldr r3, [r7, #0]
80099da: 781b ldrb r3, [r3, #0]
80099dc: 009b lsls r3, r3, #2
80099de: 4413 add r3, r2
80099e0: 881b ldrh r3, [r3, #0]
80099e2: 843b strh r3, [r7, #32]
80099e4: 8c3b ldrh r3, [r7, #32]
80099e6: f403 4380 and.w r3, r3, #16384 @ 0x4000
80099ea: 2b00 cmp r3, #0
80099ec: d01b beq.n 8009a26 <USB_DeactivateEndpoint+0x18a>
80099ee: 687a ldr r2, [r7, #4]
80099f0: 683b ldr r3, [r7, #0]
80099f2: 781b ldrb r3, [r3, #0]
80099f4: 009b lsls r3, r3, #2
80099f6: 4413 add r3, r2
80099f8: 881b ldrh r3, [r3, #0]
80099fa: b29b uxth r3, r3
80099fc: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009a00: f023 0370 bic.w r3, r3, #112 @ 0x70
8009a04: 83fb strh r3, [r7, #30]
8009a06: 687a ldr r2, [r7, #4]
8009a08: 683b ldr r3, [r7, #0]
8009a0a: 781b ldrb r3, [r3, #0]
8009a0c: 009b lsls r3, r3, #2
8009a0e: 441a add r2, r3
8009a10: 8bfb ldrh r3, [r7, #30]
8009a12: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009a16: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009a1a: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009a1e: f043 0380 orr.w r3, r3, #128 @ 0x80
8009a22: b29b uxth r3, r3
8009a24: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009a26: 687a ldr r2, [r7, #4]
8009a28: 683b ldr r3, [r7, #0]
8009a2a: 781b ldrb r3, [r3, #0]
8009a2c: 009b lsls r3, r3, #2
8009a2e: 4413 add r3, r2
8009a30: 881b ldrh r3, [r3, #0]
8009a32: 83bb strh r3, [r7, #28]
8009a34: 8bbb ldrh r3, [r7, #28]
8009a36: f003 0340 and.w r3, r3, #64 @ 0x40
8009a3a: 2b00 cmp r3, #0
8009a3c: d01b beq.n 8009a76 <USB_DeactivateEndpoint+0x1da>
8009a3e: 687a ldr r2, [r7, #4]
8009a40: 683b ldr r3, [r7, #0]
8009a42: 781b ldrb r3, [r3, #0]
8009a44: 009b lsls r3, r3, #2
8009a46: 4413 add r3, r2
8009a48: 881b ldrh r3, [r3, #0]
8009a4a: b29b uxth r3, r3
8009a4c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009a50: f023 0370 bic.w r3, r3, #112 @ 0x70
8009a54: 837b strh r3, [r7, #26]
8009a56: 687a ldr r2, [r7, #4]
8009a58: 683b ldr r3, [r7, #0]
8009a5a: 781b ldrb r3, [r3, #0]
8009a5c: 009b lsls r3, r3, #2
8009a5e: 441a add r2, r3
8009a60: 8b7b ldrh r3, [r7, #26]
8009a62: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009a66: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009a6a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009a6e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009a72: b29b uxth r3, r3
8009a74: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
8009a76: 687a ldr r2, [r7, #4]
8009a78: 683b ldr r3, [r7, #0]
8009a7a: 781b ldrb r3, [r3, #0]
8009a7c: 009b lsls r3, r3, #2
8009a7e: 4413 add r3, r2
8009a80: 881b ldrh r3, [r3, #0]
8009a82: b29b uxth r3, r3
8009a84: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009a88: f023 0370 bic.w r3, r3, #112 @ 0x70
8009a8c: 833b strh r3, [r7, #24]
8009a8e: 687a ldr r2, [r7, #4]
8009a90: 683b ldr r3, [r7, #0]
8009a92: 781b ldrb r3, [r3, #0]
8009a94: 009b lsls r3, r3, #2
8009a96: 441a add r2, r3
8009a98: 8b3b ldrh r3, [r7, #24]
8009a9a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009a9e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009aa2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009aa6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009aaa: b29b uxth r3, r3
8009aac: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009aae: 687a ldr r2, [r7, #4]
8009ab0: 683b ldr r3, [r7, #0]
8009ab2: 781b ldrb r3, [r3, #0]
8009ab4: 009b lsls r3, r3, #2
8009ab6: 4413 add r3, r2
8009ab8: 881b ldrh r3, [r3, #0]
8009aba: b29b uxth r3, r3
8009abc: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009ac0: f023 0370 bic.w r3, r3, #112 @ 0x70
8009ac4: 82fb strh r3, [r7, #22]
8009ac6: 687a ldr r2, [r7, #4]
8009ac8: 683b ldr r3, [r7, #0]
8009aca: 781b ldrb r3, [r3, #0]
8009acc: 009b lsls r3, r3, #2
8009ace: 441a add r2, r3
8009ad0: 8afb ldrh r3, [r7, #22]
8009ad2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009ad6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009ada: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009ade: f043 0380 orr.w r3, r3, #128 @ 0x80
8009ae2: b29b uxth r3, r3
8009ae4: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009ae6: 687a ldr r2, [r7, #4]
8009ae8: 683b ldr r3, [r7, #0]
8009aea: 781b ldrb r3, [r3, #0]
8009aec: 009b lsls r3, r3, #2
8009aee: 4413 add r3, r2
8009af0: 881b ldrh r3, [r3, #0]
8009af2: b29b uxth r3, r3
8009af4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009af8: f023 0340 bic.w r3, r3, #64 @ 0x40
8009afc: 82bb strh r3, [r7, #20]
8009afe: 687a ldr r2, [r7, #4]
8009b00: 683b ldr r3, [r7, #0]
8009b02: 781b ldrb r3, [r3, #0]
8009b04: 009b lsls r3, r3, #2
8009b06: 441a add r2, r3
8009b08: 8abb ldrh r3, [r7, #20]
8009b0a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009b0e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009b12: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009b16: f043 0380 orr.w r3, r3, #128 @ 0x80
8009b1a: b29b uxth r3, r3
8009b1c: 8013 strh r3, [r2, #0]
8009b1e: e0a3 b.n 8009c68 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009b20: 687a ldr r2, [r7, #4]
8009b22: 683b ldr r3, [r7, #0]
8009b24: 781b ldrb r3, [r3, #0]
8009b26: 009b lsls r3, r3, #2
8009b28: 4413 add r3, r2
8009b2a: 881b ldrh r3, [r3, #0]
8009b2c: 85fb strh r3, [r7, #46] @ 0x2e
8009b2e: 8dfb ldrh r3, [r7, #46] @ 0x2e
8009b30: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009b34: 2b00 cmp r3, #0
8009b36: d01b beq.n 8009b70 <USB_DeactivateEndpoint+0x2d4>
8009b38: 687a ldr r2, [r7, #4]
8009b3a: 683b ldr r3, [r7, #0]
8009b3c: 781b ldrb r3, [r3, #0]
8009b3e: 009b lsls r3, r3, #2
8009b40: 4413 add r3, r2
8009b42: 881b ldrh r3, [r3, #0]
8009b44: b29b uxth r3, r3
8009b46: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009b4a: f023 0370 bic.w r3, r3, #112 @ 0x70
8009b4e: 85bb strh r3, [r7, #44] @ 0x2c
8009b50: 687a ldr r2, [r7, #4]
8009b52: 683b ldr r3, [r7, #0]
8009b54: 781b ldrb r3, [r3, #0]
8009b56: 009b lsls r3, r3, #2
8009b58: 441a add r2, r3
8009b5a: 8dbb ldrh r3, [r7, #44] @ 0x2c
8009b5c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009b60: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009b64: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009b68: f043 0380 orr.w r3, r3, #128 @ 0x80
8009b6c: b29b uxth r3, r3
8009b6e: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009b70: 687a ldr r2, [r7, #4]
8009b72: 683b ldr r3, [r7, #0]
8009b74: 781b ldrb r3, [r3, #0]
8009b76: 009b lsls r3, r3, #2
8009b78: 4413 add r3, r2
8009b7a: 881b ldrh r3, [r3, #0]
8009b7c: 857b strh r3, [r7, #42] @ 0x2a
8009b7e: 8d7b ldrh r3, [r7, #42] @ 0x2a
8009b80: f003 0340 and.w r3, r3, #64 @ 0x40
8009b84: 2b00 cmp r3, #0
8009b86: d01b beq.n 8009bc0 <USB_DeactivateEndpoint+0x324>
8009b88: 687a ldr r2, [r7, #4]
8009b8a: 683b ldr r3, [r7, #0]
8009b8c: 781b ldrb r3, [r3, #0]
8009b8e: 009b lsls r3, r3, #2
8009b90: 4413 add r3, r2
8009b92: 881b ldrh r3, [r3, #0]
8009b94: b29b uxth r3, r3
8009b96: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009b9a: f023 0370 bic.w r3, r3, #112 @ 0x70
8009b9e: 853b strh r3, [r7, #40] @ 0x28
8009ba0: 687a ldr r2, [r7, #4]
8009ba2: 683b ldr r3, [r7, #0]
8009ba4: 781b ldrb r3, [r3, #0]
8009ba6: 009b lsls r3, r3, #2
8009ba8: 441a add r2, r3
8009baa: 8d3b ldrh r3, [r7, #40] @ 0x28
8009bac: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009bb0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009bb4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009bb8: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009bbc: b29b uxth r3, r3
8009bbe: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
8009bc0: 687a ldr r2, [r7, #4]
8009bc2: 683b ldr r3, [r7, #0]
8009bc4: 781b ldrb r3, [r3, #0]
8009bc6: 009b lsls r3, r3, #2
8009bc8: 4413 add r3, r2
8009bca: 881b ldrh r3, [r3, #0]
8009bcc: b29b uxth r3, r3
8009bce: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009bd2: f023 0370 bic.w r3, r3, #112 @ 0x70
8009bd6: 84fb strh r3, [r7, #38] @ 0x26
8009bd8: 687a ldr r2, [r7, #4]
8009bda: 683b ldr r3, [r7, #0]
8009bdc: 781b ldrb r3, [r3, #0]
8009bde: 009b lsls r3, r3, #2
8009be0: 441a add r2, r3
8009be2: 8cfb ldrh r3, [r7, #38] @ 0x26
8009be4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009be8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009bec: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009bf0: f043 0380 orr.w r3, r3, #128 @ 0x80
8009bf4: b29b uxth r3, r3
8009bf6: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009bf8: 687a ldr r2, [r7, #4]
8009bfa: 683b ldr r3, [r7, #0]
8009bfc: 781b ldrb r3, [r3, #0]
8009bfe: 009b lsls r3, r3, #2
8009c00: 4413 add r3, r2
8009c02: 881b ldrh r3, [r3, #0]
8009c04: b29b uxth r3, r3
8009c06: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009c0a: f023 0340 bic.w r3, r3, #64 @ 0x40
8009c0e: 84bb strh r3, [r7, #36] @ 0x24
8009c10: 687a ldr r2, [r7, #4]
8009c12: 683b ldr r3, [r7, #0]
8009c14: 781b ldrb r3, [r3, #0]
8009c16: 009b lsls r3, r3, #2
8009c18: 441a add r2, r3
8009c1a: 8cbb ldrh r3, [r7, #36] @ 0x24
8009c1c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009c20: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009c24: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009c28: f043 0380 orr.w r3, r3, #128 @ 0x80
8009c2c: b29b uxth r3, r3
8009c2e: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
8009c30: 687a ldr r2, [r7, #4]
8009c32: 683b ldr r3, [r7, #0]
8009c34: 781b ldrb r3, [r3, #0]
8009c36: 009b lsls r3, r3, #2
8009c38: 4413 add r3, r2
8009c3a: 881b ldrh r3, [r3, #0]
8009c3c: b29b uxth r3, r3
8009c3e: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009c42: f023 0370 bic.w r3, r3, #112 @ 0x70
8009c46: 847b strh r3, [r7, #34] @ 0x22
8009c48: 687a ldr r2, [r7, #4]
8009c4a: 683b ldr r3, [r7, #0]
8009c4c: 781b ldrb r3, [r3, #0]
8009c4e: 009b lsls r3, r3, #2
8009c50: 441a add r2, r3
8009c52: 8c7b ldrh r3, [r7, #34] @ 0x22
8009c54: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009c58: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009c5c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009c60: f043 0380 orr.w r3, r3, #128 @ 0x80
8009c64: b29b uxth r3, r3
8009c66: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8009c68: 2300 movs r3, #0
}
8009c6a: 4618 mov r0, r3
8009c6c: 3734 adds r7, #52 @ 0x34
8009c6e: 46bd mov sp, r7
8009c70: bc80 pop {r7}
8009c72: 4770 bx lr
08009c74 <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8009c74: b580 push {r7, lr}
8009c76: b0c2 sub sp, #264 @ 0x108
8009c78: af00 add r7, sp, #0
8009c7a: f507 7384 add.w r3, r7, #264 @ 0x108
8009c7e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009c82: 6018 str r0, [r3, #0]
8009c84: f507 7384 add.w r3, r7, #264 @ 0x108
8009c88: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009c8c: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
8009c8e: f507 7384 add.w r3, r7, #264 @ 0x108
8009c92: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009c96: 681b ldr r3, [r3, #0]
8009c98: 785b ldrb r3, [r3, #1]
8009c9a: 2b01 cmp r3, #1
8009c9c: f040 86b7 bne.w 800aa0e <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
8009ca0: f507 7384 add.w r3, r7, #264 @ 0x108
8009ca4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009ca8: 681b ldr r3, [r3, #0]
8009caa: 699a ldr r2, [r3, #24]
8009cac: f507 7384 add.w r3, r7, #264 @ 0x108
8009cb0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009cb4: 681b ldr r3, [r3, #0]
8009cb6: 691b ldr r3, [r3, #16]
8009cb8: 429a cmp r2, r3
8009cba: d908 bls.n 8009cce <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
8009cbc: f507 7384 add.w r3, r7, #264 @ 0x108
8009cc0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009cc4: 681b ldr r3, [r3, #0]
8009cc6: 691b ldr r3, [r3, #16]
8009cc8: f8c7 3104 str.w r3, [r7, #260] @ 0x104
8009ccc: e007 b.n 8009cde <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
8009cce: f507 7384 add.w r3, r7, #264 @ 0x108
8009cd2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009cd6: 681b ldr r3, [r3, #0]
8009cd8: 699b ldr r3, [r3, #24]
8009cda: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
8009cde: f507 7384 add.w r3, r7, #264 @ 0x108
8009ce2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009ce6: 681b ldr r3, [r3, #0]
8009ce8: 7b1b ldrb r3, [r3, #12]
8009cea: 2b00 cmp r3, #0
8009cec: d13a bne.n 8009d64 <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
8009cee: f507 7384 add.w r3, r7, #264 @ 0x108
8009cf2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009cf6: 681b ldr r3, [r3, #0]
8009cf8: 6959 ldr r1, [r3, #20]
8009cfa: f507 7384 add.w r3, r7, #264 @ 0x108
8009cfe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d02: 681b ldr r3, [r3, #0]
8009d04: 88da ldrh r2, [r3, #6]
8009d06: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009d0a: b29b uxth r3, r3
8009d0c: f507 7084 add.w r0, r7, #264 @ 0x108
8009d10: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8009d14: 6800 ldr r0, [r0, #0]
8009d16: f001 fc9c bl 800b652 <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
8009d1a: f507 7384 add.w r3, r7, #264 @ 0x108
8009d1e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009d22: 681b ldr r3, [r3, #0]
8009d24: 613b str r3, [r7, #16]
8009d26: f507 7384 add.w r3, r7, #264 @ 0x108
8009d2a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009d2e: 681b ldr r3, [r3, #0]
8009d30: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009d34: b29b uxth r3, r3
8009d36: 461a mov r2, r3
8009d38: 693b ldr r3, [r7, #16]
8009d3a: 4413 add r3, r2
8009d3c: 613b str r3, [r7, #16]
8009d3e: f507 7384 add.w r3, r7, #264 @ 0x108
8009d42: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d46: 681b ldr r3, [r3, #0]
8009d48: 781b ldrb r3, [r3, #0]
8009d4a: 011a lsls r2, r3, #4
8009d4c: 693b ldr r3, [r7, #16]
8009d4e: 4413 add r3, r2
8009d50: f203 4304 addw r3, r3, #1028 @ 0x404
8009d54: 60fb str r3, [r7, #12]
8009d56: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009d5a: b29a uxth r2, r3
8009d5c: 68fb ldr r3, [r7, #12]
8009d5e: 801a strh r2, [r3, #0]
8009d60: f000 be1f b.w 800a9a2 <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
8009d64: f507 7384 add.w r3, r7, #264 @ 0x108
8009d68: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d6c: 681b ldr r3, [r3, #0]
8009d6e: 78db ldrb r3, [r3, #3]
8009d70: 2b02 cmp r3, #2
8009d72: f040 8462 bne.w 800a63a <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
8009d76: f507 7384 add.w r3, r7, #264 @ 0x108
8009d7a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d7e: 681b ldr r3, [r3, #0]
8009d80: 6a1a ldr r2, [r3, #32]
8009d82: f507 7384 add.w r3, r7, #264 @ 0x108
8009d86: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009d8a: 681b ldr r3, [r3, #0]
8009d8c: 691b ldr r3, [r3, #16]
8009d8e: 429a cmp r2, r3
8009d90: f240 83df bls.w 800a552 <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8009d94: f507 7384 add.w r3, r7, #264 @ 0x108
8009d98: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009d9c: 681a ldr r2, [r3, #0]
8009d9e: f507 7384 add.w r3, r7, #264 @ 0x108
8009da2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009da6: 681b ldr r3, [r3, #0]
8009da8: 781b ldrb r3, [r3, #0]
8009daa: 009b lsls r3, r3, #2
8009dac: 4413 add r3, r2
8009dae: 881b ldrh r3, [r3, #0]
8009db0: b29b uxth r3, r3
8009db2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009db6: f023 0370 bic.w r3, r3, #112 @ 0x70
8009dba: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
8009dbe: f507 7384 add.w r3, r7, #264 @ 0x108
8009dc2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009dc6: 681a ldr r2, [r3, #0]
8009dc8: f507 7384 add.w r3, r7, #264 @ 0x108
8009dcc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009dd0: 681b ldr r3, [r3, #0]
8009dd2: 781b ldrb r3, [r3, #0]
8009dd4: 009b lsls r3, r3, #2
8009dd6: 441a add r2, r3
8009dd8: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
8009ddc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009de0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009de4: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8009de8: f043 0380 orr.w r3, r3, #128 @ 0x80
8009dec: b29b uxth r3, r3
8009dee: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
8009df0: f507 7384 add.w r3, r7, #264 @ 0x108
8009df4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009df8: 681b ldr r3, [r3, #0]
8009dfa: 6a1a ldr r2, [r3, #32]
8009dfc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009e00: 1ad2 subs r2, r2, r3
8009e02: f507 7384 add.w r3, r7, #264 @ 0x108
8009e06: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009e0a: 681b ldr r3, [r3, #0]
8009e0c: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
8009e0e: f507 7384 add.w r3, r7, #264 @ 0x108
8009e12: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009e16: 681a ldr r2, [r3, #0]
8009e18: f507 7384 add.w r3, r7, #264 @ 0x108
8009e1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009e20: 681b ldr r3, [r3, #0]
8009e22: 781b ldrb r3, [r3, #0]
8009e24: 009b lsls r3, r3, #2
8009e26: 4413 add r3, r2
8009e28: 881b ldrh r3, [r3, #0]
8009e2a: b29b uxth r3, r3
8009e2c: f003 0340 and.w r3, r3, #64 @ 0x40
8009e30: 2b00 cmp r3, #0
8009e32: f000 81c7 beq.w 800a1c4 <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
8009e36: f507 7384 add.w r3, r7, #264 @ 0x108
8009e3a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009e3e: 681b ldr r3, [r3, #0]
8009e40: 633b str r3, [r7, #48] @ 0x30
8009e42: f507 7384 add.w r3, r7, #264 @ 0x108
8009e46: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009e4a: 681b ldr r3, [r3, #0]
8009e4c: 785b ldrb r3, [r3, #1]
8009e4e: 2b00 cmp r3, #0
8009e50: d177 bne.n 8009f42 <USB_EPStartXfer+0x2ce>
8009e52: f507 7384 add.w r3, r7, #264 @ 0x108
8009e56: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009e5a: 681b ldr r3, [r3, #0]
8009e5c: 62bb str r3, [r7, #40] @ 0x28
8009e5e: f507 7384 add.w r3, r7, #264 @ 0x108
8009e62: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009e66: 681b ldr r3, [r3, #0]
8009e68: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009e6c: b29b uxth r3, r3
8009e6e: 461a mov r2, r3
8009e70: 6abb ldr r3, [r7, #40] @ 0x28
8009e72: 4413 add r3, r2
8009e74: 62bb str r3, [r7, #40] @ 0x28
8009e76: f507 7384 add.w r3, r7, #264 @ 0x108
8009e7a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009e7e: 681b ldr r3, [r3, #0]
8009e80: 781b ldrb r3, [r3, #0]
8009e82: 011a lsls r2, r3, #4
8009e84: 6abb ldr r3, [r7, #40] @ 0x28
8009e86: 4413 add r3, r2
8009e88: f203 430c addw r3, r3, #1036 @ 0x40c
8009e8c: 627b str r3, [r7, #36] @ 0x24
8009e8e: 6a7b ldr r3, [r7, #36] @ 0x24
8009e90: 881b ldrh r3, [r3, #0]
8009e92: b29b uxth r3, r3
8009e94: f3c3 0309 ubfx r3, r3, #0, #10
8009e98: b29a uxth r2, r3
8009e9a: 6a7b ldr r3, [r7, #36] @ 0x24
8009e9c: 801a strh r2, [r3, #0]
8009e9e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009ea2: 2b3e cmp r3, #62 @ 0x3e
8009ea4: d921 bls.n 8009eea <USB_EPStartXfer+0x276>
8009ea6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009eaa: 095b lsrs r3, r3, #5
8009eac: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8009eb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009eb4: f003 031f and.w r3, r3, #31
8009eb8: 2b00 cmp r3, #0
8009eba: d104 bne.n 8009ec6 <USB_EPStartXfer+0x252>
8009ebc: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8009ec0: 3b01 subs r3, #1
8009ec2: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8009ec6: 6a7b ldr r3, [r7, #36] @ 0x24
8009ec8: 881b ldrh r3, [r3, #0]
8009eca: b29a uxth r2, r3
8009ecc: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8009ed0: b29b uxth r3, r3
8009ed2: 029b lsls r3, r3, #10
8009ed4: b29b uxth r3, r3
8009ed6: 4313 orrs r3, r2
8009ed8: b29b uxth r3, r3
8009eda: ea6f 4343 mvn.w r3, r3, lsl #17
8009ede: ea6f 4353 mvn.w r3, r3, lsr #17
8009ee2: b29a uxth r2, r3
8009ee4: 6a7b ldr r3, [r7, #36] @ 0x24
8009ee6: 801a strh r2, [r3, #0]
8009ee8: e050 b.n 8009f8c <USB_EPStartXfer+0x318>
8009eea: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009eee: 2b00 cmp r3, #0
8009ef0: d10a bne.n 8009f08 <USB_EPStartXfer+0x294>
8009ef2: 6a7b ldr r3, [r7, #36] @ 0x24
8009ef4: 881b ldrh r3, [r3, #0]
8009ef6: b29b uxth r3, r3
8009ef8: ea6f 4343 mvn.w r3, r3, lsl #17
8009efc: ea6f 4353 mvn.w r3, r3, lsr #17
8009f00: b29a uxth r2, r3
8009f02: 6a7b ldr r3, [r7, #36] @ 0x24
8009f04: 801a strh r2, [r3, #0]
8009f06: e041 b.n 8009f8c <USB_EPStartXfer+0x318>
8009f08: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009f0c: 085b lsrs r3, r3, #1
8009f0e: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8009f12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009f16: f003 0301 and.w r3, r3, #1
8009f1a: 2b00 cmp r3, #0
8009f1c: d004 beq.n 8009f28 <USB_EPStartXfer+0x2b4>
8009f1e: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8009f22: 3301 adds r3, #1
8009f24: f8c7 3100 str.w r3, [r7, #256] @ 0x100
8009f28: 6a7b ldr r3, [r7, #36] @ 0x24
8009f2a: 881b ldrh r3, [r3, #0]
8009f2c: b29a uxth r2, r3
8009f2e: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
8009f32: b29b uxth r3, r3
8009f34: 029b lsls r3, r3, #10
8009f36: b29b uxth r3, r3
8009f38: 4313 orrs r3, r2
8009f3a: b29a uxth r2, r3
8009f3c: 6a7b ldr r3, [r7, #36] @ 0x24
8009f3e: 801a strh r2, [r3, #0]
8009f40: e024 b.n 8009f8c <USB_EPStartXfer+0x318>
8009f42: f507 7384 add.w r3, r7, #264 @ 0x108
8009f46: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009f4a: 681b ldr r3, [r3, #0]
8009f4c: 785b ldrb r3, [r3, #1]
8009f4e: 2b01 cmp r3, #1
8009f50: d11c bne.n 8009f8c <USB_EPStartXfer+0x318>
8009f52: f507 7384 add.w r3, r7, #264 @ 0x108
8009f56: f5a3 7382 sub.w r3, r3, #260 @ 0x104
8009f5a: 681b ldr r3, [r3, #0]
8009f5c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009f60: b29b uxth r3, r3
8009f62: 461a mov r2, r3
8009f64: 6b3b ldr r3, [r7, #48] @ 0x30
8009f66: 4413 add r3, r2
8009f68: 633b str r3, [r7, #48] @ 0x30
8009f6a: f507 7384 add.w r3, r7, #264 @ 0x108
8009f6e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009f72: 681b ldr r3, [r3, #0]
8009f74: 781b ldrb r3, [r3, #0]
8009f76: 011a lsls r2, r3, #4
8009f78: 6b3b ldr r3, [r7, #48] @ 0x30
8009f7a: 4413 add r3, r2
8009f7c: f203 430c addw r3, r3, #1036 @ 0x40c
8009f80: 62fb str r3, [r7, #44] @ 0x2c
8009f82: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009f86: b29a uxth r2, r3
8009f88: 6afb ldr r3, [r7, #44] @ 0x2c
8009f8a: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
8009f8c: f507 7384 add.w r3, r7, #264 @ 0x108
8009f90: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009f94: 681b ldr r3, [r3, #0]
8009f96: 895b ldrh r3, [r3, #10]
8009f98: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
8009f9c: f507 7384 add.w r3, r7, #264 @ 0x108
8009fa0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009fa4: 681b ldr r3, [r3, #0]
8009fa6: 6959 ldr r1, [r3, #20]
8009fa8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009fac: b29b uxth r3, r3
8009fae: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
8009fb2: f507 7084 add.w r0, r7, #264 @ 0x108
8009fb6: f5a0 7082 sub.w r0, r0, #260 @ 0x104
8009fba: 6800 ldr r0, [r0, #0]
8009fbc: f001 fb49 bl 800b652 <USB_WritePMA>
ep->xfer_buff += len;
8009fc0: f507 7384 add.w r3, r7, #264 @ 0x108
8009fc4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009fc8: 681b ldr r3, [r3, #0]
8009fca: 695a ldr r2, [r3, #20]
8009fcc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
8009fd0: 441a add r2, r3
8009fd2: f507 7384 add.w r3, r7, #264 @ 0x108
8009fd6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009fda: 681b ldr r3, [r3, #0]
8009fdc: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
8009fde: f507 7384 add.w r3, r7, #264 @ 0x108
8009fe2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009fe6: 681b ldr r3, [r3, #0]
8009fe8: 6a1a ldr r2, [r3, #32]
8009fea: f507 7384 add.w r3, r7, #264 @ 0x108
8009fee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
8009ff2: 681b ldr r3, [r3, #0]
8009ff4: 691b ldr r3, [r3, #16]
8009ff6: 429a cmp r2, r3
8009ff8: d90f bls.n 800a01a <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
8009ffa: f507 7384 add.w r3, r7, #264 @ 0x108
8009ffe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a002: 681b ldr r3, [r3, #0]
800a004: 6a1a ldr r2, [r3, #32]
800a006: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a00a: 1ad2 subs r2, r2, r3
800a00c: f507 7384 add.w r3, r7, #264 @ 0x108
800a010: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a014: 681b ldr r3, [r3, #0]
800a016: 621a str r2, [r3, #32]
800a018: e00e b.n 800a038 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
800a01a: f507 7384 add.w r3, r7, #264 @ 0x108
800a01e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a022: 681b ldr r3, [r3, #0]
800a024: 6a1b ldr r3, [r3, #32]
800a026: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800a02a: f507 7384 add.w r3, r7, #264 @ 0x108
800a02e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a032: 681b ldr r3, [r3, #0]
800a034: 2200 movs r2, #0
800a036: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800a038: f507 7384 add.w r3, r7, #264 @ 0x108
800a03c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a040: 681b ldr r3, [r3, #0]
800a042: 785b ldrb r3, [r3, #1]
800a044: 2b00 cmp r3, #0
800a046: d177 bne.n 800a138 <USB_EPStartXfer+0x4c4>
800a048: f507 7384 add.w r3, r7, #264 @ 0x108
800a04c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a050: 681b ldr r3, [r3, #0]
800a052: 61bb str r3, [r7, #24]
800a054: f507 7384 add.w r3, r7, #264 @ 0x108
800a058: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a05c: 681b ldr r3, [r3, #0]
800a05e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a062: b29b uxth r3, r3
800a064: 461a mov r2, r3
800a066: 69bb ldr r3, [r7, #24]
800a068: 4413 add r3, r2
800a06a: 61bb str r3, [r7, #24]
800a06c: f507 7384 add.w r3, r7, #264 @ 0x108
800a070: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a074: 681b ldr r3, [r3, #0]
800a076: 781b ldrb r3, [r3, #0]
800a078: 011a lsls r2, r3, #4
800a07a: 69bb ldr r3, [r7, #24]
800a07c: 4413 add r3, r2
800a07e: f203 4304 addw r3, r3, #1028 @ 0x404
800a082: 617b str r3, [r7, #20]
800a084: 697b ldr r3, [r7, #20]
800a086: 881b ldrh r3, [r3, #0]
800a088: b29b uxth r3, r3
800a08a: f3c3 0309 ubfx r3, r3, #0, #10
800a08e: b29a uxth r2, r3
800a090: 697b ldr r3, [r7, #20]
800a092: 801a strh r2, [r3, #0]
800a094: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a098: 2b3e cmp r3, #62 @ 0x3e
800a09a: d921 bls.n 800a0e0 <USB_EPStartXfer+0x46c>
800a09c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a0a0: 095b lsrs r3, r3, #5
800a0a2: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a0a6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a0aa: f003 031f and.w r3, r3, #31
800a0ae: 2b00 cmp r3, #0
800a0b0: d104 bne.n 800a0bc <USB_EPStartXfer+0x448>
800a0b2: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a0b6: 3b01 subs r3, #1
800a0b8: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a0bc: 697b ldr r3, [r7, #20]
800a0be: 881b ldrh r3, [r3, #0]
800a0c0: b29a uxth r2, r3
800a0c2: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a0c6: b29b uxth r3, r3
800a0c8: 029b lsls r3, r3, #10
800a0ca: b29b uxth r3, r3
800a0cc: 4313 orrs r3, r2
800a0ce: b29b uxth r3, r3
800a0d0: ea6f 4343 mvn.w r3, r3, lsl #17
800a0d4: ea6f 4353 mvn.w r3, r3, lsr #17
800a0d8: b29a uxth r2, r3
800a0da: 697b ldr r3, [r7, #20]
800a0dc: 801a strh r2, [r3, #0]
800a0de: e056 b.n 800a18e <USB_EPStartXfer+0x51a>
800a0e0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a0e4: 2b00 cmp r3, #0
800a0e6: d10a bne.n 800a0fe <USB_EPStartXfer+0x48a>
800a0e8: 697b ldr r3, [r7, #20]
800a0ea: 881b ldrh r3, [r3, #0]
800a0ec: b29b uxth r3, r3
800a0ee: ea6f 4343 mvn.w r3, r3, lsl #17
800a0f2: ea6f 4353 mvn.w r3, r3, lsr #17
800a0f6: b29a uxth r2, r3
800a0f8: 697b ldr r3, [r7, #20]
800a0fa: 801a strh r2, [r3, #0]
800a0fc: e047 b.n 800a18e <USB_EPStartXfer+0x51a>
800a0fe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a102: 085b lsrs r3, r3, #1
800a104: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a108: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a10c: f003 0301 and.w r3, r3, #1
800a110: 2b00 cmp r3, #0
800a112: d004 beq.n 800a11e <USB_EPStartXfer+0x4aa>
800a114: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a118: 3301 adds r3, #1
800a11a: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800a11e: 697b ldr r3, [r7, #20]
800a120: 881b ldrh r3, [r3, #0]
800a122: b29a uxth r2, r3
800a124: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800a128: b29b uxth r3, r3
800a12a: 029b lsls r3, r3, #10
800a12c: b29b uxth r3, r3
800a12e: 4313 orrs r3, r2
800a130: b29a uxth r2, r3
800a132: 697b ldr r3, [r7, #20]
800a134: 801a strh r2, [r3, #0]
800a136: e02a b.n 800a18e <USB_EPStartXfer+0x51a>
800a138: f507 7384 add.w r3, r7, #264 @ 0x108
800a13c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a140: 681b ldr r3, [r3, #0]
800a142: 785b ldrb r3, [r3, #1]
800a144: 2b01 cmp r3, #1
800a146: d122 bne.n 800a18e <USB_EPStartXfer+0x51a>
800a148: f507 7384 add.w r3, r7, #264 @ 0x108
800a14c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a150: 681b ldr r3, [r3, #0]
800a152: 623b str r3, [r7, #32]
800a154: f507 7384 add.w r3, r7, #264 @ 0x108
800a158: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a15c: 681b ldr r3, [r3, #0]
800a15e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a162: b29b uxth r3, r3
800a164: 461a mov r2, r3
800a166: 6a3b ldr r3, [r7, #32]
800a168: 4413 add r3, r2
800a16a: 623b str r3, [r7, #32]
800a16c: f507 7384 add.w r3, r7, #264 @ 0x108
800a170: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a174: 681b ldr r3, [r3, #0]
800a176: 781b ldrb r3, [r3, #0]
800a178: 011a lsls r2, r3, #4
800a17a: 6a3b ldr r3, [r7, #32]
800a17c: 4413 add r3, r2
800a17e: f203 4304 addw r3, r3, #1028 @ 0x404
800a182: 61fb str r3, [r7, #28]
800a184: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a188: b29a uxth r2, r3
800a18a: 69fb ldr r3, [r7, #28]
800a18c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800a18e: f507 7384 add.w r3, r7, #264 @ 0x108
800a192: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a196: 681b ldr r3, [r3, #0]
800a198: 891b ldrh r3, [r3, #8]
800a19a: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a19e: f507 7384 add.w r3, r7, #264 @ 0x108
800a1a2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a1a6: 681b ldr r3, [r3, #0]
800a1a8: 6959 ldr r1, [r3, #20]
800a1aa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a1ae: b29b uxth r3, r3
800a1b0: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a1b4: f507 7084 add.w r0, r7, #264 @ 0x108
800a1b8: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a1bc: 6800 ldr r0, [r0, #0]
800a1be: f001 fa48 bl 800b652 <USB_WritePMA>
800a1c2: e3ee b.n 800a9a2 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800a1c4: f507 7384 add.w r3, r7, #264 @ 0x108
800a1c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a1cc: 681b ldr r3, [r3, #0]
800a1ce: 785b ldrb r3, [r3, #1]
800a1d0: 2b00 cmp r3, #0
800a1d2: d177 bne.n 800a2c4 <USB_EPStartXfer+0x650>
800a1d4: f507 7384 add.w r3, r7, #264 @ 0x108
800a1d8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a1dc: 681b ldr r3, [r3, #0]
800a1de: 64bb str r3, [r7, #72] @ 0x48
800a1e0: f507 7384 add.w r3, r7, #264 @ 0x108
800a1e4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a1e8: 681b ldr r3, [r3, #0]
800a1ea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a1ee: b29b uxth r3, r3
800a1f0: 461a mov r2, r3
800a1f2: 6cbb ldr r3, [r7, #72] @ 0x48
800a1f4: 4413 add r3, r2
800a1f6: 64bb str r3, [r7, #72] @ 0x48
800a1f8: f507 7384 add.w r3, r7, #264 @ 0x108
800a1fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a200: 681b ldr r3, [r3, #0]
800a202: 781b ldrb r3, [r3, #0]
800a204: 011a lsls r2, r3, #4
800a206: 6cbb ldr r3, [r7, #72] @ 0x48
800a208: 4413 add r3, r2
800a20a: f203 4304 addw r3, r3, #1028 @ 0x404
800a20e: 647b str r3, [r7, #68] @ 0x44
800a210: 6c7b ldr r3, [r7, #68] @ 0x44
800a212: 881b ldrh r3, [r3, #0]
800a214: b29b uxth r3, r3
800a216: f3c3 0309 ubfx r3, r3, #0, #10
800a21a: b29a uxth r2, r3
800a21c: 6c7b ldr r3, [r7, #68] @ 0x44
800a21e: 801a strh r2, [r3, #0]
800a220: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a224: 2b3e cmp r3, #62 @ 0x3e
800a226: d921 bls.n 800a26c <USB_EPStartXfer+0x5f8>
800a228: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a22c: 095b lsrs r3, r3, #5
800a22e: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a232: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a236: f003 031f and.w r3, r3, #31
800a23a: 2b00 cmp r3, #0
800a23c: d104 bne.n 800a248 <USB_EPStartXfer+0x5d4>
800a23e: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a242: 3b01 subs r3, #1
800a244: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a248: 6c7b ldr r3, [r7, #68] @ 0x44
800a24a: 881b ldrh r3, [r3, #0]
800a24c: b29a uxth r2, r3
800a24e: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a252: b29b uxth r3, r3
800a254: 029b lsls r3, r3, #10
800a256: b29b uxth r3, r3
800a258: 4313 orrs r3, r2
800a25a: b29b uxth r3, r3
800a25c: ea6f 4343 mvn.w r3, r3, lsl #17
800a260: ea6f 4353 mvn.w r3, r3, lsr #17
800a264: b29a uxth r2, r3
800a266: 6c7b ldr r3, [r7, #68] @ 0x44
800a268: 801a strh r2, [r3, #0]
800a26a: e056 b.n 800a31a <USB_EPStartXfer+0x6a6>
800a26c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a270: 2b00 cmp r3, #0
800a272: d10a bne.n 800a28a <USB_EPStartXfer+0x616>
800a274: 6c7b ldr r3, [r7, #68] @ 0x44
800a276: 881b ldrh r3, [r3, #0]
800a278: b29b uxth r3, r3
800a27a: ea6f 4343 mvn.w r3, r3, lsl #17
800a27e: ea6f 4353 mvn.w r3, r3, lsr #17
800a282: b29a uxth r2, r3
800a284: 6c7b ldr r3, [r7, #68] @ 0x44
800a286: 801a strh r2, [r3, #0]
800a288: e047 b.n 800a31a <USB_EPStartXfer+0x6a6>
800a28a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a28e: 085b lsrs r3, r3, #1
800a290: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a294: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a298: f003 0301 and.w r3, r3, #1
800a29c: 2b00 cmp r3, #0
800a29e: d004 beq.n 800a2aa <USB_EPStartXfer+0x636>
800a2a0: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a2a4: 3301 adds r3, #1
800a2a6: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800a2aa: 6c7b ldr r3, [r7, #68] @ 0x44
800a2ac: 881b ldrh r3, [r3, #0]
800a2ae: b29a uxth r2, r3
800a2b0: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800a2b4: b29b uxth r3, r3
800a2b6: 029b lsls r3, r3, #10
800a2b8: b29b uxth r3, r3
800a2ba: 4313 orrs r3, r2
800a2bc: b29a uxth r2, r3
800a2be: 6c7b ldr r3, [r7, #68] @ 0x44
800a2c0: 801a strh r2, [r3, #0]
800a2c2: e02a b.n 800a31a <USB_EPStartXfer+0x6a6>
800a2c4: f507 7384 add.w r3, r7, #264 @ 0x108
800a2c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a2cc: 681b ldr r3, [r3, #0]
800a2ce: 785b ldrb r3, [r3, #1]
800a2d0: 2b01 cmp r3, #1
800a2d2: d122 bne.n 800a31a <USB_EPStartXfer+0x6a6>
800a2d4: f507 7384 add.w r3, r7, #264 @ 0x108
800a2d8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a2dc: 681b ldr r3, [r3, #0]
800a2de: 653b str r3, [r7, #80] @ 0x50
800a2e0: f507 7384 add.w r3, r7, #264 @ 0x108
800a2e4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a2e8: 681b ldr r3, [r3, #0]
800a2ea: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a2ee: b29b uxth r3, r3
800a2f0: 461a mov r2, r3
800a2f2: 6d3b ldr r3, [r7, #80] @ 0x50
800a2f4: 4413 add r3, r2
800a2f6: 653b str r3, [r7, #80] @ 0x50
800a2f8: f507 7384 add.w r3, r7, #264 @ 0x108
800a2fc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a300: 681b ldr r3, [r3, #0]
800a302: 781b ldrb r3, [r3, #0]
800a304: 011a lsls r2, r3, #4
800a306: 6d3b ldr r3, [r7, #80] @ 0x50
800a308: 4413 add r3, r2
800a30a: f203 4304 addw r3, r3, #1028 @ 0x404
800a30e: 64fb str r3, [r7, #76] @ 0x4c
800a310: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a314: b29a uxth r2, r3
800a316: 6cfb ldr r3, [r7, #76] @ 0x4c
800a318: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800a31a: f507 7384 add.w r3, r7, #264 @ 0x108
800a31e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a322: 681b ldr r3, [r3, #0]
800a324: 891b ldrh r3, [r3, #8]
800a326: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a32a: f507 7384 add.w r3, r7, #264 @ 0x108
800a32e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a332: 681b ldr r3, [r3, #0]
800a334: 6959 ldr r1, [r3, #20]
800a336: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a33a: b29b uxth r3, r3
800a33c: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a340: f507 7084 add.w r0, r7, #264 @ 0x108
800a344: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a348: 6800 ldr r0, [r0, #0]
800a34a: f001 f982 bl 800b652 <USB_WritePMA>
ep->xfer_buff += len;
800a34e: f507 7384 add.w r3, r7, #264 @ 0x108
800a352: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a356: 681b ldr r3, [r3, #0]
800a358: 695a ldr r2, [r3, #20]
800a35a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a35e: 441a add r2, r3
800a360: f507 7384 add.w r3, r7, #264 @ 0x108
800a364: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a368: 681b ldr r3, [r3, #0]
800a36a: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800a36c: f507 7384 add.w r3, r7, #264 @ 0x108
800a370: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a374: 681b ldr r3, [r3, #0]
800a376: 6a1a ldr r2, [r3, #32]
800a378: f507 7384 add.w r3, r7, #264 @ 0x108
800a37c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a380: 681b ldr r3, [r3, #0]
800a382: 691b ldr r3, [r3, #16]
800a384: 429a cmp r2, r3
800a386: d90f bls.n 800a3a8 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
800a388: f507 7384 add.w r3, r7, #264 @ 0x108
800a38c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a390: 681b ldr r3, [r3, #0]
800a392: 6a1a ldr r2, [r3, #32]
800a394: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a398: 1ad2 subs r2, r2, r3
800a39a: f507 7384 add.w r3, r7, #264 @ 0x108
800a39e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a3a2: 681b ldr r3, [r3, #0]
800a3a4: 621a str r2, [r3, #32]
800a3a6: e00e b.n 800a3c6 <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
800a3a8: f507 7384 add.w r3, r7, #264 @ 0x108
800a3ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a3b0: 681b ldr r3, [r3, #0]
800a3b2: 6a1b ldr r3, [r3, #32]
800a3b4: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800a3b8: f507 7384 add.w r3, r7, #264 @ 0x108
800a3bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a3c0: 681b ldr r3, [r3, #0]
800a3c2: 2200 movs r2, #0
800a3c4: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800a3c6: f507 7384 add.w r3, r7, #264 @ 0x108
800a3ca: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a3ce: 681b ldr r3, [r3, #0]
800a3d0: 643b str r3, [r7, #64] @ 0x40
800a3d2: f507 7384 add.w r3, r7, #264 @ 0x108
800a3d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a3da: 681b ldr r3, [r3, #0]
800a3dc: 785b ldrb r3, [r3, #1]
800a3de: 2b00 cmp r3, #0
800a3e0: d177 bne.n 800a4d2 <USB_EPStartXfer+0x85e>
800a3e2: f507 7384 add.w r3, r7, #264 @ 0x108
800a3e6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a3ea: 681b ldr r3, [r3, #0]
800a3ec: 63bb str r3, [r7, #56] @ 0x38
800a3ee: f507 7384 add.w r3, r7, #264 @ 0x108
800a3f2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a3f6: 681b ldr r3, [r3, #0]
800a3f8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a3fc: b29b uxth r3, r3
800a3fe: 461a mov r2, r3
800a400: 6bbb ldr r3, [r7, #56] @ 0x38
800a402: 4413 add r3, r2
800a404: 63bb str r3, [r7, #56] @ 0x38
800a406: f507 7384 add.w r3, r7, #264 @ 0x108
800a40a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a40e: 681b ldr r3, [r3, #0]
800a410: 781b ldrb r3, [r3, #0]
800a412: 011a lsls r2, r3, #4
800a414: 6bbb ldr r3, [r7, #56] @ 0x38
800a416: 4413 add r3, r2
800a418: f203 430c addw r3, r3, #1036 @ 0x40c
800a41c: 637b str r3, [r7, #52] @ 0x34
800a41e: 6b7b ldr r3, [r7, #52] @ 0x34
800a420: 881b ldrh r3, [r3, #0]
800a422: b29b uxth r3, r3
800a424: f3c3 0309 ubfx r3, r3, #0, #10
800a428: b29a uxth r2, r3
800a42a: 6b7b ldr r3, [r7, #52] @ 0x34
800a42c: 801a strh r2, [r3, #0]
800a42e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a432: 2b3e cmp r3, #62 @ 0x3e
800a434: d921 bls.n 800a47a <USB_EPStartXfer+0x806>
800a436: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a43a: 095b lsrs r3, r3, #5
800a43c: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a440: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a444: f003 031f and.w r3, r3, #31
800a448: 2b00 cmp r3, #0
800a44a: d104 bne.n 800a456 <USB_EPStartXfer+0x7e2>
800a44c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a450: 3b01 subs r3, #1
800a452: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a456: 6b7b ldr r3, [r7, #52] @ 0x34
800a458: 881b ldrh r3, [r3, #0]
800a45a: b29a uxth r2, r3
800a45c: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a460: b29b uxth r3, r3
800a462: 029b lsls r3, r3, #10
800a464: b29b uxth r3, r3
800a466: 4313 orrs r3, r2
800a468: b29b uxth r3, r3
800a46a: ea6f 4343 mvn.w r3, r3, lsl #17
800a46e: ea6f 4353 mvn.w r3, r3, lsr #17
800a472: b29a uxth r2, r3
800a474: 6b7b ldr r3, [r7, #52] @ 0x34
800a476: 801a strh r2, [r3, #0]
800a478: e050 b.n 800a51c <USB_EPStartXfer+0x8a8>
800a47a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a47e: 2b00 cmp r3, #0
800a480: d10a bne.n 800a498 <USB_EPStartXfer+0x824>
800a482: 6b7b ldr r3, [r7, #52] @ 0x34
800a484: 881b ldrh r3, [r3, #0]
800a486: b29b uxth r3, r3
800a488: ea6f 4343 mvn.w r3, r3, lsl #17
800a48c: ea6f 4353 mvn.w r3, r3, lsr #17
800a490: b29a uxth r2, r3
800a492: 6b7b ldr r3, [r7, #52] @ 0x34
800a494: 801a strh r2, [r3, #0]
800a496: e041 b.n 800a51c <USB_EPStartXfer+0x8a8>
800a498: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a49c: 085b lsrs r3, r3, #1
800a49e: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a4a2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a4a6: f003 0301 and.w r3, r3, #1
800a4aa: 2b00 cmp r3, #0
800a4ac: d004 beq.n 800a4b8 <USB_EPStartXfer+0x844>
800a4ae: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a4b2: 3301 adds r3, #1
800a4b4: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800a4b8: 6b7b ldr r3, [r7, #52] @ 0x34
800a4ba: 881b ldrh r3, [r3, #0]
800a4bc: b29a uxth r2, r3
800a4be: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800a4c2: b29b uxth r3, r3
800a4c4: 029b lsls r3, r3, #10
800a4c6: b29b uxth r3, r3
800a4c8: 4313 orrs r3, r2
800a4ca: b29a uxth r2, r3
800a4cc: 6b7b ldr r3, [r7, #52] @ 0x34
800a4ce: 801a strh r2, [r3, #0]
800a4d0: e024 b.n 800a51c <USB_EPStartXfer+0x8a8>
800a4d2: f507 7384 add.w r3, r7, #264 @ 0x108
800a4d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a4da: 681b ldr r3, [r3, #0]
800a4dc: 785b ldrb r3, [r3, #1]
800a4de: 2b01 cmp r3, #1
800a4e0: d11c bne.n 800a51c <USB_EPStartXfer+0x8a8>
800a4e2: f507 7384 add.w r3, r7, #264 @ 0x108
800a4e6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a4ea: 681b ldr r3, [r3, #0]
800a4ec: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a4f0: b29b uxth r3, r3
800a4f2: 461a mov r2, r3
800a4f4: 6c3b ldr r3, [r7, #64] @ 0x40
800a4f6: 4413 add r3, r2
800a4f8: 643b str r3, [r7, #64] @ 0x40
800a4fa: f507 7384 add.w r3, r7, #264 @ 0x108
800a4fe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a502: 681b ldr r3, [r3, #0]
800a504: 781b ldrb r3, [r3, #0]
800a506: 011a lsls r2, r3, #4
800a508: 6c3b ldr r3, [r7, #64] @ 0x40
800a50a: 4413 add r3, r2
800a50c: f203 430c addw r3, r3, #1036 @ 0x40c
800a510: 63fb str r3, [r7, #60] @ 0x3c
800a512: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a516: b29a uxth r2, r3
800a518: 6bfb ldr r3, [r7, #60] @ 0x3c
800a51a: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800a51c: f507 7384 add.w r3, r7, #264 @ 0x108
800a520: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a524: 681b ldr r3, [r3, #0]
800a526: 895b ldrh r3, [r3, #10]
800a528: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a52c: f507 7384 add.w r3, r7, #264 @ 0x108
800a530: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a534: 681b ldr r3, [r3, #0]
800a536: 6959 ldr r1, [r3, #20]
800a538: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a53c: b29b uxth r3, r3
800a53e: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a542: f507 7084 add.w r0, r7, #264 @ 0x108
800a546: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a54a: 6800 ldr r0, [r0, #0]
800a54c: f001 f881 bl 800b652 <USB_WritePMA>
800a550: e227 b.n 800a9a2 <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
800a552: f507 7384 add.w r3, r7, #264 @ 0x108
800a556: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a55a: 681b ldr r3, [r3, #0]
800a55c: 6a1b ldr r3, [r3, #32]
800a55e: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
800a562: f507 7384 add.w r3, r7, #264 @ 0x108
800a566: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a56a: 681a ldr r2, [r3, #0]
800a56c: f507 7384 add.w r3, r7, #264 @ 0x108
800a570: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a574: 681b ldr r3, [r3, #0]
800a576: 781b ldrb r3, [r3, #0]
800a578: 009b lsls r3, r3, #2
800a57a: 4413 add r3, r2
800a57c: 881b ldrh r3, [r3, #0]
800a57e: b29b uxth r3, r3
800a580: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800a584: f023 0370 bic.w r3, r3, #112 @ 0x70
800a588: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800a58c: f507 7384 add.w r3, r7, #264 @ 0x108
800a590: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a594: 681a ldr r2, [r3, #0]
800a596: f507 7384 add.w r3, r7, #264 @ 0x108
800a59a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a59e: 681b ldr r3, [r3, #0]
800a5a0: 781b ldrb r3, [r3, #0]
800a5a2: 009b lsls r3, r3, #2
800a5a4: 441a add r2, r3
800a5a6: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800a5aa: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a5ae: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a5b2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a5b6: f043 0380 orr.w r3, r3, #128 @ 0x80
800a5ba: b29b uxth r3, r3
800a5bc: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800a5be: f507 7384 add.w r3, r7, #264 @ 0x108
800a5c2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a5c6: 681b ldr r3, [r3, #0]
800a5c8: 65fb str r3, [r7, #92] @ 0x5c
800a5ca: f507 7384 add.w r3, r7, #264 @ 0x108
800a5ce: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a5d2: 681b ldr r3, [r3, #0]
800a5d4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a5d8: b29b uxth r3, r3
800a5da: 461a mov r2, r3
800a5dc: 6dfb ldr r3, [r7, #92] @ 0x5c
800a5de: 4413 add r3, r2
800a5e0: 65fb str r3, [r7, #92] @ 0x5c
800a5e2: f507 7384 add.w r3, r7, #264 @ 0x108
800a5e6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a5ea: 681b ldr r3, [r3, #0]
800a5ec: 781b ldrb r3, [r3, #0]
800a5ee: 011a lsls r2, r3, #4
800a5f0: 6dfb ldr r3, [r7, #92] @ 0x5c
800a5f2: 4413 add r3, r2
800a5f4: f203 4304 addw r3, r3, #1028 @ 0x404
800a5f8: 65bb str r3, [r7, #88] @ 0x58
800a5fa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a5fe: b29a uxth r2, r3
800a600: 6dbb ldr r3, [r7, #88] @ 0x58
800a602: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800a604: f507 7384 add.w r3, r7, #264 @ 0x108
800a608: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a60c: 681b ldr r3, [r3, #0]
800a60e: 891b ldrh r3, [r3, #8]
800a610: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a614: f507 7384 add.w r3, r7, #264 @ 0x108
800a618: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a61c: 681b ldr r3, [r3, #0]
800a61e: 6959 ldr r1, [r3, #20]
800a620: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a624: b29b uxth r3, r3
800a626: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a62a: f507 7084 add.w r0, r7, #264 @ 0x108
800a62e: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a632: 6800 ldr r0, [r0, #0]
800a634: f001 f80d bl 800b652 <USB_WritePMA>
800a638: e1b3 b.n 800a9a2 <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800a63a: f507 7384 add.w r3, r7, #264 @ 0x108
800a63e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a642: 681b ldr r3, [r3, #0]
800a644: 6a1a ldr r2, [r3, #32]
800a646: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a64a: 1ad2 subs r2, r2, r3
800a64c: f507 7384 add.w r3, r7, #264 @ 0x108
800a650: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a654: 681b ldr r3, [r3, #0]
800a656: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800a658: f507 7384 add.w r3, r7, #264 @ 0x108
800a65c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a660: 681a ldr r2, [r3, #0]
800a662: f507 7384 add.w r3, r7, #264 @ 0x108
800a666: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a66a: 681b ldr r3, [r3, #0]
800a66c: 781b ldrb r3, [r3, #0]
800a66e: 009b lsls r3, r3, #2
800a670: 4413 add r3, r2
800a672: 881b ldrh r3, [r3, #0]
800a674: b29b uxth r3, r3
800a676: f003 0340 and.w r3, r3, #64 @ 0x40
800a67a: 2b00 cmp r3, #0
800a67c: f000 80c6 beq.w 800a80c <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800a680: f507 7384 add.w r3, r7, #264 @ 0x108
800a684: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a688: 681b ldr r3, [r3, #0]
800a68a: 673b str r3, [r7, #112] @ 0x70
800a68c: f507 7384 add.w r3, r7, #264 @ 0x108
800a690: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a694: 681b ldr r3, [r3, #0]
800a696: 785b ldrb r3, [r3, #1]
800a698: 2b00 cmp r3, #0
800a69a: d177 bne.n 800a78c <USB_EPStartXfer+0xb18>
800a69c: f507 7384 add.w r3, r7, #264 @ 0x108
800a6a0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a6a4: 681b ldr r3, [r3, #0]
800a6a6: 66bb str r3, [r7, #104] @ 0x68
800a6a8: f507 7384 add.w r3, r7, #264 @ 0x108
800a6ac: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a6b0: 681b ldr r3, [r3, #0]
800a6b2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a6b6: b29b uxth r3, r3
800a6b8: 461a mov r2, r3
800a6ba: 6ebb ldr r3, [r7, #104] @ 0x68
800a6bc: 4413 add r3, r2
800a6be: 66bb str r3, [r7, #104] @ 0x68
800a6c0: f507 7384 add.w r3, r7, #264 @ 0x108
800a6c4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a6c8: 681b ldr r3, [r3, #0]
800a6ca: 781b ldrb r3, [r3, #0]
800a6cc: 011a lsls r2, r3, #4
800a6ce: 6ebb ldr r3, [r7, #104] @ 0x68
800a6d0: 4413 add r3, r2
800a6d2: f203 430c addw r3, r3, #1036 @ 0x40c
800a6d6: 667b str r3, [r7, #100] @ 0x64
800a6d8: 6e7b ldr r3, [r7, #100] @ 0x64
800a6da: 881b ldrh r3, [r3, #0]
800a6dc: b29b uxth r3, r3
800a6de: f3c3 0309 ubfx r3, r3, #0, #10
800a6e2: b29a uxth r2, r3
800a6e4: 6e7b ldr r3, [r7, #100] @ 0x64
800a6e6: 801a strh r2, [r3, #0]
800a6e8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a6ec: 2b3e cmp r3, #62 @ 0x3e
800a6ee: d921 bls.n 800a734 <USB_EPStartXfer+0xac0>
800a6f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a6f4: 095b lsrs r3, r3, #5
800a6f6: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800a6fa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a6fe: f003 031f and.w r3, r3, #31
800a702: 2b00 cmp r3, #0
800a704: d104 bne.n 800a710 <USB_EPStartXfer+0xa9c>
800a706: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800a70a: 3b01 subs r3, #1
800a70c: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800a710: 6e7b ldr r3, [r7, #100] @ 0x64
800a712: 881b ldrh r3, [r3, #0]
800a714: b29a uxth r2, r3
800a716: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800a71a: b29b uxth r3, r3
800a71c: 029b lsls r3, r3, #10
800a71e: b29b uxth r3, r3
800a720: 4313 orrs r3, r2
800a722: b29b uxth r3, r3
800a724: ea6f 4343 mvn.w r3, r3, lsl #17
800a728: ea6f 4353 mvn.w r3, r3, lsr #17
800a72c: b29a uxth r2, r3
800a72e: 6e7b ldr r3, [r7, #100] @ 0x64
800a730: 801a strh r2, [r3, #0]
800a732: e050 b.n 800a7d6 <USB_EPStartXfer+0xb62>
800a734: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a738: 2b00 cmp r3, #0
800a73a: d10a bne.n 800a752 <USB_EPStartXfer+0xade>
800a73c: 6e7b ldr r3, [r7, #100] @ 0x64
800a73e: 881b ldrh r3, [r3, #0]
800a740: b29b uxth r3, r3
800a742: ea6f 4343 mvn.w r3, r3, lsl #17
800a746: ea6f 4353 mvn.w r3, r3, lsr #17
800a74a: b29a uxth r2, r3
800a74c: 6e7b ldr r3, [r7, #100] @ 0x64
800a74e: 801a strh r2, [r3, #0]
800a750: e041 b.n 800a7d6 <USB_EPStartXfer+0xb62>
800a752: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a756: 085b lsrs r3, r3, #1
800a758: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800a75c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a760: f003 0301 and.w r3, r3, #1
800a764: 2b00 cmp r3, #0
800a766: d004 beq.n 800a772 <USB_EPStartXfer+0xafe>
800a768: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800a76c: 3301 adds r3, #1
800a76e: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800a772: 6e7b ldr r3, [r7, #100] @ 0x64
800a774: 881b ldrh r3, [r3, #0]
800a776: b29a uxth r2, r3
800a778: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800a77c: b29b uxth r3, r3
800a77e: 029b lsls r3, r3, #10
800a780: b29b uxth r3, r3
800a782: 4313 orrs r3, r2
800a784: b29a uxth r2, r3
800a786: 6e7b ldr r3, [r7, #100] @ 0x64
800a788: 801a strh r2, [r3, #0]
800a78a: e024 b.n 800a7d6 <USB_EPStartXfer+0xb62>
800a78c: f507 7384 add.w r3, r7, #264 @ 0x108
800a790: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a794: 681b ldr r3, [r3, #0]
800a796: 785b ldrb r3, [r3, #1]
800a798: 2b01 cmp r3, #1
800a79a: d11c bne.n 800a7d6 <USB_EPStartXfer+0xb62>
800a79c: f507 7384 add.w r3, r7, #264 @ 0x108
800a7a0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a7a4: 681b ldr r3, [r3, #0]
800a7a6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a7aa: b29b uxth r3, r3
800a7ac: 461a mov r2, r3
800a7ae: 6f3b ldr r3, [r7, #112] @ 0x70
800a7b0: 4413 add r3, r2
800a7b2: 673b str r3, [r7, #112] @ 0x70
800a7b4: f507 7384 add.w r3, r7, #264 @ 0x108
800a7b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7bc: 681b ldr r3, [r3, #0]
800a7be: 781b ldrb r3, [r3, #0]
800a7c0: 011a lsls r2, r3, #4
800a7c2: 6f3b ldr r3, [r7, #112] @ 0x70
800a7c4: 4413 add r3, r2
800a7c6: f203 430c addw r3, r3, #1036 @ 0x40c
800a7ca: 66fb str r3, [r7, #108] @ 0x6c
800a7cc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a7d0: b29a uxth r2, r3
800a7d2: 6efb ldr r3, [r7, #108] @ 0x6c
800a7d4: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800a7d6: f507 7384 add.w r3, r7, #264 @ 0x108
800a7da: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7de: 681b ldr r3, [r3, #0]
800a7e0: 895b ldrh r3, [r3, #10]
800a7e2: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a7e6: f507 7384 add.w r3, r7, #264 @ 0x108
800a7ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7ee: 681b ldr r3, [r3, #0]
800a7f0: 6959 ldr r1, [r3, #20]
800a7f2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a7f6: b29b uxth r3, r3
800a7f8: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a7fc: f507 7084 add.w r0, r7, #264 @ 0x108
800a800: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a804: 6800 ldr r0, [r0, #0]
800a806: f000 ff24 bl 800b652 <USB_WritePMA>
800a80a: e0ca b.n 800a9a2 <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800a80c: f507 7384 add.w r3, r7, #264 @ 0x108
800a810: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a814: 681b ldr r3, [r3, #0]
800a816: 785b ldrb r3, [r3, #1]
800a818: 2b00 cmp r3, #0
800a81a: d177 bne.n 800a90c <USB_EPStartXfer+0xc98>
800a81c: f507 7384 add.w r3, r7, #264 @ 0x108
800a820: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a824: 681b ldr r3, [r3, #0]
800a826: 67fb str r3, [r7, #124] @ 0x7c
800a828: f507 7384 add.w r3, r7, #264 @ 0x108
800a82c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a830: 681b ldr r3, [r3, #0]
800a832: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a836: b29b uxth r3, r3
800a838: 461a mov r2, r3
800a83a: 6ffb ldr r3, [r7, #124] @ 0x7c
800a83c: 4413 add r3, r2
800a83e: 67fb str r3, [r7, #124] @ 0x7c
800a840: f507 7384 add.w r3, r7, #264 @ 0x108
800a844: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a848: 681b ldr r3, [r3, #0]
800a84a: 781b ldrb r3, [r3, #0]
800a84c: 011a lsls r2, r3, #4
800a84e: 6ffb ldr r3, [r7, #124] @ 0x7c
800a850: 4413 add r3, r2
800a852: f203 4304 addw r3, r3, #1028 @ 0x404
800a856: 67bb str r3, [r7, #120] @ 0x78
800a858: 6fbb ldr r3, [r7, #120] @ 0x78
800a85a: 881b ldrh r3, [r3, #0]
800a85c: b29b uxth r3, r3
800a85e: f3c3 0309 ubfx r3, r3, #0, #10
800a862: b29a uxth r2, r3
800a864: 6fbb ldr r3, [r7, #120] @ 0x78
800a866: 801a strh r2, [r3, #0]
800a868: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a86c: 2b3e cmp r3, #62 @ 0x3e
800a86e: d921 bls.n 800a8b4 <USB_EPStartXfer+0xc40>
800a870: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a874: 095b lsrs r3, r3, #5
800a876: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800a87a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a87e: f003 031f and.w r3, r3, #31
800a882: 2b00 cmp r3, #0
800a884: d104 bne.n 800a890 <USB_EPStartXfer+0xc1c>
800a886: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800a88a: 3b01 subs r3, #1
800a88c: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800a890: 6fbb ldr r3, [r7, #120] @ 0x78
800a892: 881b ldrh r3, [r3, #0]
800a894: b29a uxth r2, r3
800a896: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800a89a: b29b uxth r3, r3
800a89c: 029b lsls r3, r3, #10
800a89e: b29b uxth r3, r3
800a8a0: 4313 orrs r3, r2
800a8a2: b29b uxth r3, r3
800a8a4: ea6f 4343 mvn.w r3, r3, lsl #17
800a8a8: ea6f 4353 mvn.w r3, r3, lsr #17
800a8ac: b29a uxth r2, r3
800a8ae: 6fbb ldr r3, [r7, #120] @ 0x78
800a8b0: 801a strh r2, [r3, #0]
800a8b2: e05c b.n 800a96e <USB_EPStartXfer+0xcfa>
800a8b4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a8b8: 2b00 cmp r3, #0
800a8ba: d10a bne.n 800a8d2 <USB_EPStartXfer+0xc5e>
800a8bc: 6fbb ldr r3, [r7, #120] @ 0x78
800a8be: 881b ldrh r3, [r3, #0]
800a8c0: b29b uxth r3, r3
800a8c2: ea6f 4343 mvn.w r3, r3, lsl #17
800a8c6: ea6f 4353 mvn.w r3, r3, lsr #17
800a8ca: b29a uxth r2, r3
800a8cc: 6fbb ldr r3, [r7, #120] @ 0x78
800a8ce: 801a strh r2, [r3, #0]
800a8d0: e04d b.n 800a96e <USB_EPStartXfer+0xcfa>
800a8d2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a8d6: 085b lsrs r3, r3, #1
800a8d8: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800a8dc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a8e0: f003 0301 and.w r3, r3, #1
800a8e4: 2b00 cmp r3, #0
800a8e6: d004 beq.n 800a8f2 <USB_EPStartXfer+0xc7e>
800a8e8: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800a8ec: 3301 adds r3, #1
800a8ee: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800a8f2: 6fbb ldr r3, [r7, #120] @ 0x78
800a8f4: 881b ldrh r3, [r3, #0]
800a8f6: b29a uxth r2, r3
800a8f8: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800a8fc: b29b uxth r3, r3
800a8fe: 029b lsls r3, r3, #10
800a900: b29b uxth r3, r3
800a902: 4313 orrs r3, r2
800a904: b29a uxth r2, r3
800a906: 6fbb ldr r3, [r7, #120] @ 0x78
800a908: 801a strh r2, [r3, #0]
800a90a: e030 b.n 800a96e <USB_EPStartXfer+0xcfa>
800a90c: f507 7384 add.w r3, r7, #264 @ 0x108
800a910: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a914: 681b ldr r3, [r3, #0]
800a916: 785b ldrb r3, [r3, #1]
800a918: 2b01 cmp r3, #1
800a91a: d128 bne.n 800a96e <USB_EPStartXfer+0xcfa>
800a91c: f507 7384 add.w r3, r7, #264 @ 0x108
800a920: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a924: 681b ldr r3, [r3, #0]
800a926: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800a92a: f507 7384 add.w r3, r7, #264 @ 0x108
800a92e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a932: 681b ldr r3, [r3, #0]
800a934: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a938: b29b uxth r3, r3
800a93a: 461a mov r2, r3
800a93c: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800a940: 4413 add r3, r2
800a942: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800a946: f507 7384 add.w r3, r7, #264 @ 0x108
800a94a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a94e: 681b ldr r3, [r3, #0]
800a950: 781b ldrb r3, [r3, #0]
800a952: 011a lsls r2, r3, #4
800a954: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800a958: 4413 add r3, r2
800a95a: f203 4304 addw r3, r3, #1028 @ 0x404
800a95e: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800a962: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a966: b29a uxth r2, r3
800a968: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800a96c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800a96e: f507 7384 add.w r3, r7, #264 @ 0x108
800a972: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a976: 681b ldr r3, [r3, #0]
800a978: 891b ldrh r3, [r3, #8]
800a97a: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800a97e: f507 7384 add.w r3, r7, #264 @ 0x108
800a982: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a986: 681b ldr r3, [r3, #0]
800a988: 6959 ldr r1, [r3, #20]
800a98a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a98e: b29b uxth r3, r3
800a990: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800a994: f507 7084 add.w r0, r7, #264 @ 0x108
800a998: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a99c: 6800 ldr r0, [r0, #0]
800a99e: f000 fe58 bl 800b652 <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
800a9a2: f507 7384 add.w r3, r7, #264 @ 0x108
800a9a6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a9aa: 681a ldr r2, [r3, #0]
800a9ac: f507 7384 add.w r3, r7, #264 @ 0x108
800a9b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9b4: 681b ldr r3, [r3, #0]
800a9b6: 781b ldrb r3, [r3, #0]
800a9b8: 009b lsls r3, r3, #2
800a9ba: 4413 add r3, r2
800a9bc: 881b ldrh r3, [r3, #0]
800a9be: b29b uxth r3, r3
800a9c0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a9c4: f023 0340 bic.w r3, r3, #64 @ 0x40
800a9c8: 817b strh r3, [r7, #10]
800a9ca: 897b ldrh r3, [r7, #10]
800a9cc: f083 0310 eor.w r3, r3, #16
800a9d0: 817b strh r3, [r7, #10]
800a9d2: 897b ldrh r3, [r7, #10]
800a9d4: f083 0320 eor.w r3, r3, #32
800a9d8: 817b strh r3, [r7, #10]
800a9da: f507 7384 add.w r3, r7, #264 @ 0x108
800a9de: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a9e2: 681a ldr r2, [r3, #0]
800a9e4: f507 7384 add.w r3, r7, #264 @ 0x108
800a9e8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9ec: 681b ldr r3, [r3, #0]
800a9ee: 781b ldrb r3, [r3, #0]
800a9f0: 009b lsls r3, r3, #2
800a9f2: 441a add r2, r3
800a9f4: 897b ldrh r3, [r7, #10]
800a9f6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a9fa: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a9fe: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800aa02: f043 0380 orr.w r3, r3, #128 @ 0x80
800aa06: b29b uxth r3, r3
800aa08: 8013 strh r3, [r2, #0]
800aa0a: f000 bcde b.w 800b3ca <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800aa0e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa12: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa16: 681b ldr r3, [r3, #0]
800aa18: 7b1b ldrb r3, [r3, #12]
800aa1a: 2b00 cmp r3, #0
800aa1c: f040 80bb bne.w 800ab96 <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800aa20: f507 7384 add.w r3, r7, #264 @ 0x108
800aa24: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa28: 681b ldr r3, [r3, #0]
800aa2a: 699a ldr r2, [r3, #24]
800aa2c: f507 7384 add.w r3, r7, #264 @ 0x108
800aa30: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa34: 681b ldr r3, [r3, #0]
800aa36: 691b ldr r3, [r3, #16]
800aa38: 429a cmp r2, r3
800aa3a: d917 bls.n 800aa6c <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
800aa3c: f507 7384 add.w r3, r7, #264 @ 0x108
800aa40: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa44: 681b ldr r3, [r3, #0]
800aa46: 691b ldr r3, [r3, #16]
800aa48: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800aa4c: f507 7384 add.w r3, r7, #264 @ 0x108
800aa50: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa54: 681b ldr r3, [r3, #0]
800aa56: 699a ldr r2, [r3, #24]
800aa58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa5c: 1ad2 subs r2, r2, r3
800aa5e: f507 7384 add.w r3, r7, #264 @ 0x108
800aa62: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa66: 681b ldr r3, [r3, #0]
800aa68: 619a str r2, [r3, #24]
800aa6a: e00e b.n 800aa8a <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
800aa6c: f507 7384 add.w r3, r7, #264 @ 0x108
800aa70: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa74: 681b ldr r3, [r3, #0]
800aa76: 699b ldr r3, [r3, #24]
800aa78: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800aa7c: f507 7384 add.w r3, r7, #264 @ 0x108
800aa80: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa84: 681b ldr r3, [r3, #0]
800aa86: 2200 movs r2, #0
800aa88: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
800aa8a: f507 7384 add.w r3, r7, #264 @ 0x108
800aa8e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aa92: 681b ldr r3, [r3, #0]
800aa94: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800aa98: f507 7384 add.w r3, r7, #264 @ 0x108
800aa9c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aaa0: 681b ldr r3, [r3, #0]
800aaa2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800aaa6: b29b uxth r3, r3
800aaa8: 461a mov r2, r3
800aaaa: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800aaae: 4413 add r3, r2
800aab0: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800aab4: f507 7384 add.w r3, r7, #264 @ 0x108
800aab8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aabc: 681b ldr r3, [r3, #0]
800aabe: 781b ldrb r3, [r3, #0]
800aac0: 011a lsls r2, r3, #4
800aac2: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800aac6: 4413 add r3, r2
800aac8: f203 430c addw r3, r3, #1036 @ 0x40c
800aacc: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800aad0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800aad4: 881b ldrh r3, [r3, #0]
800aad6: b29b uxth r3, r3
800aad8: f3c3 0309 ubfx r3, r3, #0, #10
800aadc: b29a uxth r2, r3
800aade: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800aae2: 801a strh r2, [r3, #0]
800aae4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aae8: 2b3e cmp r3, #62 @ 0x3e
800aaea: d924 bls.n 800ab36 <USB_EPStartXfer+0xec2>
800aaec: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aaf0: 095b lsrs r3, r3, #5
800aaf2: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800aaf6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aafa: f003 031f and.w r3, r3, #31
800aafe: 2b00 cmp r3, #0
800ab00: d104 bne.n 800ab0c <USB_EPStartXfer+0xe98>
800ab02: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800ab06: 3b01 subs r3, #1
800ab08: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800ab0c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800ab10: 881b ldrh r3, [r3, #0]
800ab12: b29a uxth r2, r3
800ab14: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800ab18: b29b uxth r3, r3
800ab1a: 029b lsls r3, r3, #10
800ab1c: b29b uxth r3, r3
800ab1e: 4313 orrs r3, r2
800ab20: b29b uxth r3, r3
800ab22: ea6f 4343 mvn.w r3, r3, lsl #17
800ab26: ea6f 4353 mvn.w r3, r3, lsr #17
800ab2a: b29a uxth r2, r3
800ab2c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800ab30: 801a strh r2, [r3, #0]
800ab32: f000 bc10 b.w 800b356 <USB_EPStartXfer+0x16e2>
800ab36: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab3a: 2b00 cmp r3, #0
800ab3c: d10c bne.n 800ab58 <USB_EPStartXfer+0xee4>
800ab3e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800ab42: 881b ldrh r3, [r3, #0]
800ab44: b29b uxth r3, r3
800ab46: ea6f 4343 mvn.w r3, r3, lsl #17
800ab4a: ea6f 4353 mvn.w r3, r3, lsr #17
800ab4e: b29a uxth r2, r3
800ab50: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800ab54: 801a strh r2, [r3, #0]
800ab56: e3fe b.n 800b356 <USB_EPStartXfer+0x16e2>
800ab58: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab5c: 085b lsrs r3, r3, #1
800ab5e: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800ab62: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab66: f003 0301 and.w r3, r3, #1
800ab6a: 2b00 cmp r3, #0
800ab6c: d004 beq.n 800ab78 <USB_EPStartXfer+0xf04>
800ab6e: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800ab72: 3301 adds r3, #1
800ab74: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800ab78: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800ab7c: 881b ldrh r3, [r3, #0]
800ab7e: b29a uxth r2, r3
800ab80: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800ab84: b29b uxth r3, r3
800ab86: 029b lsls r3, r3, #10
800ab88: b29b uxth r3, r3
800ab8a: 4313 orrs r3, r2
800ab8c: b29a uxth r2, r3
800ab8e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800ab92: 801a strh r2, [r3, #0]
800ab94: e3df b.n 800b356 <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
800ab96: f507 7384 add.w r3, r7, #264 @ 0x108
800ab9a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ab9e: 681b ldr r3, [r3, #0]
800aba0: 78db ldrb r3, [r3, #3]
800aba2: 2b02 cmp r3, #2
800aba4: f040 8218 bne.w 800afd8 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
800aba8: f507 7384 add.w r3, r7, #264 @ 0x108
800abac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abb0: 681b ldr r3, [r3, #0]
800abb2: 785b ldrb r3, [r3, #1]
800abb4: 2b00 cmp r3, #0
800abb6: f040 809d bne.w 800acf4 <USB_EPStartXfer+0x1080>
800abba: f507 7384 add.w r3, r7, #264 @ 0x108
800abbe: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800abc2: 681b ldr r3, [r3, #0]
800abc4: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800abc8: f507 7384 add.w r3, r7, #264 @ 0x108
800abcc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800abd0: 681b ldr r3, [r3, #0]
800abd2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800abd6: b29b uxth r3, r3
800abd8: 461a mov r2, r3
800abda: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800abde: 4413 add r3, r2
800abe0: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800abe4: f507 7384 add.w r3, r7, #264 @ 0x108
800abe8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abec: 681b ldr r3, [r3, #0]
800abee: 781b ldrb r3, [r3, #0]
800abf0: 011a lsls r2, r3, #4
800abf2: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800abf6: 4413 add r3, r2
800abf8: f203 4304 addw r3, r3, #1028 @ 0x404
800abfc: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
800ac00: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800ac04: 881b ldrh r3, [r3, #0]
800ac06: b29b uxth r3, r3
800ac08: f3c3 0309 ubfx r3, r3, #0, #10
800ac0c: b29a uxth r2, r3
800ac0e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800ac12: 801a strh r2, [r3, #0]
800ac14: f507 7384 add.w r3, r7, #264 @ 0x108
800ac18: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac1c: 681b ldr r3, [r3, #0]
800ac1e: 691b ldr r3, [r3, #16]
800ac20: 2b3e cmp r3, #62 @ 0x3e
800ac22: d92b bls.n 800ac7c <USB_EPStartXfer+0x1008>
800ac24: f507 7384 add.w r3, r7, #264 @ 0x108
800ac28: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac2c: 681b ldr r3, [r3, #0]
800ac2e: 691b ldr r3, [r3, #16]
800ac30: 095b lsrs r3, r3, #5
800ac32: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800ac36: f507 7384 add.w r3, r7, #264 @ 0x108
800ac3a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac3e: 681b ldr r3, [r3, #0]
800ac40: 691b ldr r3, [r3, #16]
800ac42: f003 031f and.w r3, r3, #31
800ac46: 2b00 cmp r3, #0
800ac48: d104 bne.n 800ac54 <USB_EPStartXfer+0xfe0>
800ac4a: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800ac4e: 3b01 subs r3, #1
800ac50: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800ac54: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800ac58: 881b ldrh r3, [r3, #0]
800ac5a: b29a uxth r2, r3
800ac5c: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800ac60: b29b uxth r3, r3
800ac62: 029b lsls r3, r3, #10
800ac64: b29b uxth r3, r3
800ac66: 4313 orrs r3, r2
800ac68: b29b uxth r3, r3
800ac6a: ea6f 4343 mvn.w r3, r3, lsl #17
800ac6e: ea6f 4353 mvn.w r3, r3, lsr #17
800ac72: b29a uxth r2, r3
800ac74: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800ac78: 801a strh r2, [r3, #0]
800ac7a: e070 b.n 800ad5e <USB_EPStartXfer+0x10ea>
800ac7c: f507 7384 add.w r3, r7, #264 @ 0x108
800ac80: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac84: 681b ldr r3, [r3, #0]
800ac86: 691b ldr r3, [r3, #16]
800ac88: 2b00 cmp r3, #0
800ac8a: d10c bne.n 800aca6 <USB_EPStartXfer+0x1032>
800ac8c: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800ac90: 881b ldrh r3, [r3, #0]
800ac92: b29b uxth r3, r3
800ac94: ea6f 4343 mvn.w r3, r3, lsl #17
800ac98: ea6f 4353 mvn.w r3, r3, lsr #17
800ac9c: b29a uxth r2, r3
800ac9e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800aca2: 801a strh r2, [r3, #0]
800aca4: e05b b.n 800ad5e <USB_EPStartXfer+0x10ea>
800aca6: f507 7384 add.w r3, r7, #264 @ 0x108
800acaa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acae: 681b ldr r3, [r3, #0]
800acb0: 691b ldr r3, [r3, #16]
800acb2: 085b lsrs r3, r3, #1
800acb4: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800acb8: f507 7384 add.w r3, r7, #264 @ 0x108
800acbc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acc0: 681b ldr r3, [r3, #0]
800acc2: 691b ldr r3, [r3, #16]
800acc4: f003 0301 and.w r3, r3, #1
800acc8: 2b00 cmp r3, #0
800acca: d004 beq.n 800acd6 <USB_EPStartXfer+0x1062>
800accc: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800acd0: 3301 adds r3, #1
800acd2: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800acd6: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800acda: 881b ldrh r3, [r3, #0]
800acdc: b29a uxth r2, r3
800acde: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800ace2: b29b uxth r3, r3
800ace4: 029b lsls r3, r3, #10
800ace6: b29b uxth r3, r3
800ace8: 4313 orrs r3, r2
800acea: b29a uxth r2, r3
800acec: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800acf0: 801a strh r2, [r3, #0]
800acf2: e034 b.n 800ad5e <USB_EPStartXfer+0x10ea>
800acf4: f507 7384 add.w r3, r7, #264 @ 0x108
800acf8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800acfc: 681b ldr r3, [r3, #0]
800acfe: 785b ldrb r3, [r3, #1]
800ad00: 2b01 cmp r3, #1
800ad02: d12c bne.n 800ad5e <USB_EPStartXfer+0x10ea>
800ad04: f507 7384 add.w r3, r7, #264 @ 0x108
800ad08: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad0c: 681b ldr r3, [r3, #0]
800ad0e: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800ad12: f507 7384 add.w r3, r7, #264 @ 0x108
800ad16: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad1a: 681b ldr r3, [r3, #0]
800ad1c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ad20: b29b uxth r3, r3
800ad22: 461a mov r2, r3
800ad24: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800ad28: 4413 add r3, r2
800ad2a: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800ad2e: f507 7384 add.w r3, r7, #264 @ 0x108
800ad32: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad36: 681b ldr r3, [r3, #0]
800ad38: 781b ldrb r3, [r3, #0]
800ad3a: 011a lsls r2, r3, #4
800ad3c: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800ad40: 4413 add r3, r2
800ad42: f203 4304 addw r3, r3, #1028 @ 0x404
800ad46: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
800ad4a: f507 7384 add.w r3, r7, #264 @ 0x108
800ad4e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad52: 681b ldr r3, [r3, #0]
800ad54: 691b ldr r3, [r3, #16]
800ad56: b29a uxth r2, r3
800ad58: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
800ad5c: 801a strh r2, [r3, #0]
800ad5e: f507 7384 add.w r3, r7, #264 @ 0x108
800ad62: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad66: 681b ldr r3, [r3, #0]
800ad68: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800ad6c: f507 7384 add.w r3, r7, #264 @ 0x108
800ad70: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad74: 681b ldr r3, [r3, #0]
800ad76: 785b ldrb r3, [r3, #1]
800ad78: 2b00 cmp r3, #0
800ad7a: f040 809d bne.w 800aeb8 <USB_EPStartXfer+0x1244>
800ad7e: f507 7384 add.w r3, r7, #264 @ 0x108
800ad82: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad86: 681b ldr r3, [r3, #0]
800ad88: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800ad8c: f507 7384 add.w r3, r7, #264 @ 0x108
800ad90: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad94: 681b ldr r3, [r3, #0]
800ad96: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ad9a: b29b uxth r3, r3
800ad9c: 461a mov r2, r3
800ad9e: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800ada2: 4413 add r3, r2
800ada4: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800ada8: f507 7384 add.w r3, r7, #264 @ 0x108
800adac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adb0: 681b ldr r3, [r3, #0]
800adb2: 781b ldrb r3, [r3, #0]
800adb4: 011a lsls r2, r3, #4
800adb6: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800adba: 4413 add r3, r2
800adbc: f203 430c addw r3, r3, #1036 @ 0x40c
800adc0: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800adc4: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800adc8: 881b ldrh r3, [r3, #0]
800adca: b29b uxth r3, r3
800adcc: f3c3 0309 ubfx r3, r3, #0, #10
800add0: b29a uxth r2, r3
800add2: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800add6: 801a strh r2, [r3, #0]
800add8: f507 7384 add.w r3, r7, #264 @ 0x108
800addc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ade0: 681b ldr r3, [r3, #0]
800ade2: 691b ldr r3, [r3, #16]
800ade4: 2b3e cmp r3, #62 @ 0x3e
800ade6: d92b bls.n 800ae40 <USB_EPStartXfer+0x11cc>
800ade8: f507 7384 add.w r3, r7, #264 @ 0x108
800adec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adf0: 681b ldr r3, [r3, #0]
800adf2: 691b ldr r3, [r3, #16]
800adf4: 095b lsrs r3, r3, #5
800adf6: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800adfa: f507 7384 add.w r3, r7, #264 @ 0x108
800adfe: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae02: 681b ldr r3, [r3, #0]
800ae04: 691b ldr r3, [r3, #16]
800ae06: f003 031f and.w r3, r3, #31
800ae0a: 2b00 cmp r3, #0
800ae0c: d104 bne.n 800ae18 <USB_EPStartXfer+0x11a4>
800ae0e: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800ae12: 3b01 subs r3, #1
800ae14: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800ae18: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ae1c: 881b ldrh r3, [r3, #0]
800ae1e: b29a uxth r2, r3
800ae20: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800ae24: b29b uxth r3, r3
800ae26: 029b lsls r3, r3, #10
800ae28: b29b uxth r3, r3
800ae2a: 4313 orrs r3, r2
800ae2c: b29b uxth r3, r3
800ae2e: ea6f 4343 mvn.w r3, r3, lsl #17
800ae32: ea6f 4353 mvn.w r3, r3, lsr #17
800ae36: b29a uxth r2, r3
800ae38: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ae3c: 801a strh r2, [r3, #0]
800ae3e: e069 b.n 800af14 <USB_EPStartXfer+0x12a0>
800ae40: f507 7384 add.w r3, r7, #264 @ 0x108
800ae44: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae48: 681b ldr r3, [r3, #0]
800ae4a: 691b ldr r3, [r3, #16]
800ae4c: 2b00 cmp r3, #0
800ae4e: d10c bne.n 800ae6a <USB_EPStartXfer+0x11f6>
800ae50: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ae54: 881b ldrh r3, [r3, #0]
800ae56: b29b uxth r3, r3
800ae58: ea6f 4343 mvn.w r3, r3, lsl #17
800ae5c: ea6f 4353 mvn.w r3, r3, lsr #17
800ae60: b29a uxth r2, r3
800ae62: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ae66: 801a strh r2, [r3, #0]
800ae68: e054 b.n 800af14 <USB_EPStartXfer+0x12a0>
800ae6a: f507 7384 add.w r3, r7, #264 @ 0x108
800ae6e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae72: 681b ldr r3, [r3, #0]
800ae74: 691b ldr r3, [r3, #16]
800ae76: 085b lsrs r3, r3, #1
800ae78: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800ae7c: f507 7384 add.w r3, r7, #264 @ 0x108
800ae80: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae84: 681b ldr r3, [r3, #0]
800ae86: 691b ldr r3, [r3, #16]
800ae88: f003 0301 and.w r3, r3, #1
800ae8c: 2b00 cmp r3, #0
800ae8e: d004 beq.n 800ae9a <USB_EPStartXfer+0x1226>
800ae90: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800ae94: 3301 adds r3, #1
800ae96: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800ae9a: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800ae9e: 881b ldrh r3, [r3, #0]
800aea0: b29a uxth r2, r3
800aea2: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800aea6: b29b uxth r3, r3
800aea8: 029b lsls r3, r3, #10
800aeaa: b29b uxth r3, r3
800aeac: 4313 orrs r3, r2
800aeae: b29a uxth r2, r3
800aeb0: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800aeb4: 801a strh r2, [r3, #0]
800aeb6: e02d b.n 800af14 <USB_EPStartXfer+0x12a0>
800aeb8: f507 7384 add.w r3, r7, #264 @ 0x108
800aebc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aec0: 681b ldr r3, [r3, #0]
800aec2: 785b ldrb r3, [r3, #1]
800aec4: 2b01 cmp r3, #1
800aec6: d125 bne.n 800af14 <USB_EPStartXfer+0x12a0>
800aec8: f507 7384 add.w r3, r7, #264 @ 0x108
800aecc: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aed0: 681b ldr r3, [r3, #0]
800aed2: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800aed6: b29b uxth r3, r3
800aed8: 461a mov r2, r3
800aeda: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800aede: 4413 add r3, r2
800aee0: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800aee4: f507 7384 add.w r3, r7, #264 @ 0x108
800aee8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aeec: 681b ldr r3, [r3, #0]
800aeee: 781b ldrb r3, [r3, #0]
800aef0: 011a lsls r2, r3, #4
800aef2: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800aef6: 4413 add r3, r2
800aef8: f203 430c addw r3, r3, #1036 @ 0x40c
800aefc: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
800af00: f507 7384 add.w r3, r7, #264 @ 0x108
800af04: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af08: 681b ldr r3, [r3, #0]
800af0a: 691b ldr r3, [r3, #16]
800af0c: b29a uxth r2, r3
800af0e: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800af12: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
800af14: f507 7384 add.w r3, r7, #264 @ 0x108
800af18: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af1c: 681b ldr r3, [r3, #0]
800af1e: 69db ldr r3, [r3, #28]
800af20: 2b00 cmp r3, #0
800af22: f000 8218 beq.w 800b356 <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
800af26: f507 7384 add.w r3, r7, #264 @ 0x108
800af2a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af2e: 681a ldr r2, [r3, #0]
800af30: f507 7384 add.w r3, r7, #264 @ 0x108
800af34: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af38: 681b ldr r3, [r3, #0]
800af3a: 781b ldrb r3, [r3, #0]
800af3c: 009b lsls r3, r3, #2
800af3e: 4413 add r3, r2
800af40: 881b ldrh r3, [r3, #0]
800af42: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800af46: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800af4a: f403 4380 and.w r3, r3, #16384 @ 0x4000
800af4e: 2b00 cmp r3, #0
800af50: d005 beq.n 800af5e <USB_EPStartXfer+0x12ea>
800af52: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800af56: f003 0340 and.w r3, r3, #64 @ 0x40
800af5a: 2b00 cmp r3, #0
800af5c: d10d bne.n 800af7a <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800af5e: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800af62: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800af66: 2b00 cmp r3, #0
800af68: f040 81f5 bne.w 800b356 <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800af6c: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800af70: f003 0340 and.w r3, r3, #64 @ 0x40
800af74: 2b00 cmp r3, #0
800af76: f040 81ee bne.w 800b356 <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
800af7a: f507 7384 add.w r3, r7, #264 @ 0x108
800af7e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af82: 681a ldr r2, [r3, #0]
800af84: f507 7384 add.w r3, r7, #264 @ 0x108
800af88: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af8c: 681b ldr r3, [r3, #0]
800af8e: 781b ldrb r3, [r3, #0]
800af90: 009b lsls r3, r3, #2
800af92: 4413 add r3, r2
800af94: 881b ldrh r3, [r3, #0]
800af96: b29b uxth r3, r3
800af98: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800af9c: f023 0370 bic.w r3, r3, #112 @ 0x70
800afa0: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
800afa4: f507 7384 add.w r3, r7, #264 @ 0x108
800afa8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800afac: 681a ldr r2, [r3, #0]
800afae: f507 7384 add.w r3, r7, #264 @ 0x108
800afb2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afb6: 681b ldr r3, [r3, #0]
800afb8: 781b ldrb r3, [r3, #0]
800afba: 009b lsls r3, r3, #2
800afbc: 441a add r2, r3
800afbe: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
800afc2: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800afc6: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800afca: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800afce: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800afd2: b29b uxth r3, r3
800afd4: 8013 strh r3, [r2, #0]
800afd6: e1be b.n 800b356 <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800afd8: f507 7384 add.w r3, r7, #264 @ 0x108
800afdc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afe0: 681b ldr r3, [r3, #0]
800afe2: 78db ldrb r3, [r3, #3]
800afe4: 2b01 cmp r3, #1
800afe6: f040 81b4 bne.w 800b352 <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800afea: f507 7384 add.w r3, r7, #264 @ 0x108
800afee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aff2: 681b ldr r3, [r3, #0]
800aff4: 699a ldr r2, [r3, #24]
800aff6: f507 7384 add.w r3, r7, #264 @ 0x108
800affa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800affe: 681b ldr r3, [r3, #0]
800b000: 691b ldr r3, [r3, #16]
800b002: 429a cmp r2, r3
800b004: d917 bls.n 800b036 <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
800b006: f507 7384 add.w r3, r7, #264 @ 0x108
800b00a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b00e: 681b ldr r3, [r3, #0]
800b010: 691b ldr r3, [r3, #16]
800b012: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800b016: f507 7384 add.w r3, r7, #264 @ 0x108
800b01a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b01e: 681b ldr r3, [r3, #0]
800b020: 699a ldr r2, [r3, #24]
800b022: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b026: 1ad2 subs r2, r2, r3
800b028: f507 7384 add.w r3, r7, #264 @ 0x108
800b02c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b030: 681b ldr r3, [r3, #0]
800b032: 619a str r2, [r3, #24]
800b034: e00e b.n 800b054 <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
800b036: f507 7384 add.w r3, r7, #264 @ 0x108
800b03a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b03e: 681b ldr r3, [r3, #0]
800b040: 699b ldr r3, [r3, #24]
800b042: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800b046: f507 7384 add.w r3, r7, #264 @ 0x108
800b04a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b04e: 681b ldr r3, [r3, #0]
800b050: 2200 movs r2, #0
800b052: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
800b054: f507 7384 add.w r3, r7, #264 @ 0x108
800b058: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b05c: 681b ldr r3, [r3, #0]
800b05e: 785b ldrb r3, [r3, #1]
800b060: 2b00 cmp r3, #0
800b062: f040 8085 bne.w 800b170 <USB_EPStartXfer+0x14fc>
800b066: f507 7384 add.w r3, r7, #264 @ 0x108
800b06a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b06e: 681b ldr r3, [r3, #0]
800b070: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800b074: f507 7384 add.w r3, r7, #264 @ 0x108
800b078: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b07c: 681b ldr r3, [r3, #0]
800b07e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b082: b29b uxth r3, r3
800b084: 461a mov r2, r3
800b086: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800b08a: 4413 add r3, r2
800b08c: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800b090: f507 7384 add.w r3, r7, #264 @ 0x108
800b094: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b098: 681b ldr r3, [r3, #0]
800b09a: 781b ldrb r3, [r3, #0]
800b09c: 011a lsls r2, r3, #4
800b09e: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800b0a2: 4413 add r3, r2
800b0a4: f203 4304 addw r3, r3, #1028 @ 0x404
800b0a8: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
800b0ac: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b0b0: 881b ldrh r3, [r3, #0]
800b0b2: b29b uxth r3, r3
800b0b4: f3c3 0309 ubfx r3, r3, #0, #10
800b0b8: b29a uxth r2, r3
800b0ba: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b0be: 801a strh r2, [r3, #0]
800b0c0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b0c4: 2b3e cmp r3, #62 @ 0x3e
800b0c6: d923 bls.n 800b110 <USB_EPStartXfer+0x149c>
800b0c8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b0cc: 095b lsrs r3, r3, #5
800b0ce: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b0d2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b0d6: f003 031f and.w r3, r3, #31
800b0da: 2b00 cmp r3, #0
800b0dc: d104 bne.n 800b0e8 <USB_EPStartXfer+0x1474>
800b0de: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b0e2: 3b01 subs r3, #1
800b0e4: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b0e8: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b0ec: 881b ldrh r3, [r3, #0]
800b0ee: b29a uxth r2, r3
800b0f0: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b0f4: b29b uxth r3, r3
800b0f6: 029b lsls r3, r3, #10
800b0f8: b29b uxth r3, r3
800b0fa: 4313 orrs r3, r2
800b0fc: b29b uxth r3, r3
800b0fe: ea6f 4343 mvn.w r3, r3, lsl #17
800b102: ea6f 4353 mvn.w r3, r3, lsr #17
800b106: b29a uxth r2, r3
800b108: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b10c: 801a strh r2, [r3, #0]
800b10e: e060 b.n 800b1d2 <USB_EPStartXfer+0x155e>
800b110: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b114: 2b00 cmp r3, #0
800b116: d10c bne.n 800b132 <USB_EPStartXfer+0x14be>
800b118: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b11c: 881b ldrh r3, [r3, #0]
800b11e: b29b uxth r3, r3
800b120: ea6f 4343 mvn.w r3, r3, lsl #17
800b124: ea6f 4353 mvn.w r3, r3, lsr #17
800b128: b29a uxth r2, r3
800b12a: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b12e: 801a strh r2, [r3, #0]
800b130: e04f b.n 800b1d2 <USB_EPStartXfer+0x155e>
800b132: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b136: 085b lsrs r3, r3, #1
800b138: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b13c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b140: f003 0301 and.w r3, r3, #1
800b144: 2b00 cmp r3, #0
800b146: d004 beq.n 800b152 <USB_EPStartXfer+0x14de>
800b148: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b14c: 3301 adds r3, #1
800b14e: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800b152: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b156: 881b ldrh r3, [r3, #0]
800b158: b29a uxth r2, r3
800b15a: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800b15e: b29b uxth r3, r3
800b160: 029b lsls r3, r3, #10
800b162: b29b uxth r3, r3
800b164: 4313 orrs r3, r2
800b166: b29a uxth r2, r3
800b168: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800b16c: 801a strh r2, [r3, #0]
800b16e: e030 b.n 800b1d2 <USB_EPStartXfer+0x155e>
800b170: f507 7384 add.w r3, r7, #264 @ 0x108
800b174: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b178: 681b ldr r3, [r3, #0]
800b17a: 785b ldrb r3, [r3, #1]
800b17c: 2b01 cmp r3, #1
800b17e: d128 bne.n 800b1d2 <USB_EPStartXfer+0x155e>
800b180: f507 7384 add.w r3, r7, #264 @ 0x108
800b184: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b188: 681b ldr r3, [r3, #0]
800b18a: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800b18e: f507 7384 add.w r3, r7, #264 @ 0x108
800b192: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b196: 681b ldr r3, [r3, #0]
800b198: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b19c: b29b uxth r3, r3
800b19e: 461a mov r2, r3
800b1a0: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800b1a4: 4413 add r3, r2
800b1a6: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800b1aa: f507 7384 add.w r3, r7, #264 @ 0x108
800b1ae: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1b2: 681b ldr r3, [r3, #0]
800b1b4: 781b ldrb r3, [r3, #0]
800b1b6: 011a lsls r2, r3, #4
800b1b8: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800b1bc: 4413 add r3, r2
800b1be: f203 4304 addw r3, r3, #1028 @ 0x404
800b1c2: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800b1c6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b1ca: b29a uxth r2, r3
800b1cc: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
800b1d0: 801a strh r2, [r3, #0]
800b1d2: f507 7384 add.w r3, r7, #264 @ 0x108
800b1d6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1da: 681b ldr r3, [r3, #0]
800b1dc: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800b1e0: f507 7384 add.w r3, r7, #264 @ 0x108
800b1e4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b1e8: 681b ldr r3, [r3, #0]
800b1ea: 785b ldrb r3, [r3, #1]
800b1ec: 2b00 cmp r3, #0
800b1ee: f040 8085 bne.w 800b2fc <USB_EPStartXfer+0x1688>
800b1f2: f507 7384 add.w r3, r7, #264 @ 0x108
800b1f6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b1fa: 681b ldr r3, [r3, #0]
800b1fc: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800b200: f507 7384 add.w r3, r7, #264 @ 0x108
800b204: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b208: 681b ldr r3, [r3, #0]
800b20a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b20e: b29b uxth r3, r3
800b210: 461a mov r2, r3
800b212: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800b216: 4413 add r3, r2
800b218: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800b21c: f507 7384 add.w r3, r7, #264 @ 0x108
800b220: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b224: 681b ldr r3, [r3, #0]
800b226: 781b ldrb r3, [r3, #0]
800b228: 011a lsls r2, r3, #4
800b22a: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800b22e: 4413 add r3, r2
800b230: f203 430c addw r3, r3, #1036 @ 0x40c
800b234: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
800b238: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b23c: 881b ldrh r3, [r3, #0]
800b23e: b29b uxth r3, r3
800b240: f3c3 0309 ubfx r3, r3, #0, #10
800b244: b29a uxth r2, r3
800b246: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b24a: 801a strh r2, [r3, #0]
800b24c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b250: 2b3e cmp r3, #62 @ 0x3e
800b252: d923 bls.n 800b29c <USB_EPStartXfer+0x1628>
800b254: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b258: 095b lsrs r3, r3, #5
800b25a: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b25e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b262: f003 031f and.w r3, r3, #31
800b266: 2b00 cmp r3, #0
800b268: d104 bne.n 800b274 <USB_EPStartXfer+0x1600>
800b26a: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b26e: 3b01 subs r3, #1
800b270: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b274: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b278: 881b ldrh r3, [r3, #0]
800b27a: b29a uxth r2, r3
800b27c: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b280: b29b uxth r3, r3
800b282: 029b lsls r3, r3, #10
800b284: b29b uxth r3, r3
800b286: 4313 orrs r3, r2
800b288: b29b uxth r3, r3
800b28a: ea6f 4343 mvn.w r3, r3, lsl #17
800b28e: ea6f 4353 mvn.w r3, r3, lsr #17
800b292: b29a uxth r2, r3
800b294: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b298: 801a strh r2, [r3, #0]
800b29a: e05c b.n 800b356 <USB_EPStartXfer+0x16e2>
800b29c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b2a0: 2b00 cmp r3, #0
800b2a2: d10c bne.n 800b2be <USB_EPStartXfer+0x164a>
800b2a4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b2a8: 881b ldrh r3, [r3, #0]
800b2aa: b29b uxth r3, r3
800b2ac: ea6f 4343 mvn.w r3, r3, lsl #17
800b2b0: ea6f 4353 mvn.w r3, r3, lsr #17
800b2b4: b29a uxth r2, r3
800b2b6: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b2ba: 801a strh r2, [r3, #0]
800b2bc: e04b b.n 800b356 <USB_EPStartXfer+0x16e2>
800b2be: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b2c2: 085b lsrs r3, r3, #1
800b2c4: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b2c8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b2cc: f003 0301 and.w r3, r3, #1
800b2d0: 2b00 cmp r3, #0
800b2d2: d004 beq.n 800b2de <USB_EPStartXfer+0x166a>
800b2d4: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b2d8: 3301 adds r3, #1
800b2da: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800b2de: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b2e2: 881b ldrh r3, [r3, #0]
800b2e4: b29a uxth r2, r3
800b2e6: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800b2ea: b29b uxth r3, r3
800b2ec: 029b lsls r3, r3, #10
800b2ee: b29b uxth r3, r3
800b2f0: 4313 orrs r3, r2
800b2f2: b29a uxth r2, r3
800b2f4: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800b2f8: 801a strh r2, [r3, #0]
800b2fa: e02c b.n 800b356 <USB_EPStartXfer+0x16e2>
800b2fc: f507 7384 add.w r3, r7, #264 @ 0x108
800b300: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b304: 681b ldr r3, [r3, #0]
800b306: 785b ldrb r3, [r3, #1]
800b308: 2b01 cmp r3, #1
800b30a: d124 bne.n 800b356 <USB_EPStartXfer+0x16e2>
800b30c: f507 7384 add.w r3, r7, #264 @ 0x108
800b310: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b314: 681b ldr r3, [r3, #0]
800b316: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b31a: b29b uxth r3, r3
800b31c: 461a mov r2, r3
800b31e: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800b322: 4413 add r3, r2
800b324: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800b328: f507 7384 add.w r3, r7, #264 @ 0x108
800b32c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b330: 681b ldr r3, [r3, #0]
800b332: 781b ldrb r3, [r3, #0]
800b334: 011a lsls r2, r3, #4
800b336: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800b33a: 4413 add r3, r2
800b33c: f203 430c addw r3, r3, #1036 @ 0x40c
800b340: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800b344: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b348: b29a uxth r2, r3
800b34a: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800b34e: 801a strh r2, [r3, #0]
800b350: e001 b.n 800b356 <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
800b352: 2301 movs r3, #1
800b354: e03a b.n 800b3cc <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800b356: f507 7384 add.w r3, r7, #264 @ 0x108
800b35a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b35e: 681a ldr r2, [r3, #0]
800b360: f507 7384 add.w r3, r7, #264 @ 0x108
800b364: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b368: 681b ldr r3, [r3, #0]
800b36a: 781b ldrb r3, [r3, #0]
800b36c: 009b lsls r3, r3, #2
800b36e: 4413 add r3, r2
800b370: 881b ldrh r3, [r3, #0]
800b372: b29b uxth r3, r3
800b374: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800b378: f023 0370 bic.w r3, r3, #112 @ 0x70
800b37c: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800b380: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800b384: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800b388: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800b38c: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800b390: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800b394: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800b398: f507 7384 add.w r3, r7, #264 @ 0x108
800b39c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b3a0: 681a ldr r2, [r3, #0]
800b3a2: f507 7384 add.w r3, r7, #264 @ 0x108
800b3a6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3aa: 681b ldr r3, [r3, #0]
800b3ac: 781b ldrb r3, [r3, #0]
800b3ae: 009b lsls r3, r3, #2
800b3b0: 441a add r2, r3
800b3b2: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800b3b6: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b3ba: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b3be: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b3c2: f043 0380 orr.w r3, r3, #128 @ 0x80
800b3c6: b29b uxth r3, r3
800b3c8: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800b3ca: 2300 movs r3, #0
}
800b3cc: 4618 mov r0, r3
800b3ce: f507 7784 add.w r7, r7, #264 @ 0x108
800b3d2: 46bd mov sp, r7
800b3d4: bd80 pop {r7, pc}
0800b3d6 <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800b3d6: b480 push {r7}
800b3d8: b085 sub sp, #20
800b3da: af00 add r7, sp, #0
800b3dc: 6078 str r0, [r7, #4]
800b3de: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
800b3e0: 683b ldr r3, [r7, #0]
800b3e2: 785b ldrb r3, [r3, #1]
800b3e4: 2b00 cmp r3, #0
800b3e6: d020 beq.n 800b42a <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
800b3e8: 687a ldr r2, [r7, #4]
800b3ea: 683b ldr r3, [r7, #0]
800b3ec: 781b ldrb r3, [r3, #0]
800b3ee: 009b lsls r3, r3, #2
800b3f0: 4413 add r3, r2
800b3f2: 881b ldrh r3, [r3, #0]
800b3f4: b29b uxth r3, r3
800b3f6: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b3fa: f023 0340 bic.w r3, r3, #64 @ 0x40
800b3fe: 81bb strh r3, [r7, #12]
800b400: 89bb ldrh r3, [r7, #12]
800b402: f083 0310 eor.w r3, r3, #16
800b406: 81bb strh r3, [r7, #12]
800b408: 687a ldr r2, [r7, #4]
800b40a: 683b ldr r3, [r7, #0]
800b40c: 781b ldrb r3, [r3, #0]
800b40e: 009b lsls r3, r3, #2
800b410: 441a add r2, r3
800b412: 89bb ldrh r3, [r7, #12]
800b414: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b418: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b41c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b420: f043 0380 orr.w r3, r3, #128 @ 0x80
800b424: b29b uxth r3, r3
800b426: 8013 strh r3, [r2, #0]
800b428: e01f b.n 800b46a <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800b42a: 687a ldr r2, [r7, #4]
800b42c: 683b ldr r3, [r7, #0]
800b42e: 781b ldrb r3, [r3, #0]
800b430: 009b lsls r3, r3, #2
800b432: 4413 add r3, r2
800b434: 881b ldrh r3, [r3, #0]
800b436: b29b uxth r3, r3
800b438: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800b43c: f023 0370 bic.w r3, r3, #112 @ 0x70
800b440: 81fb strh r3, [r7, #14]
800b442: 89fb ldrh r3, [r7, #14]
800b444: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800b448: 81fb strh r3, [r7, #14]
800b44a: 687a ldr r2, [r7, #4]
800b44c: 683b ldr r3, [r7, #0]
800b44e: 781b ldrb r3, [r3, #0]
800b450: 009b lsls r3, r3, #2
800b452: 441a add r2, r3
800b454: 89fb ldrh r3, [r7, #14]
800b456: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b45a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b45e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b462: f043 0380 orr.w r3, r3, #128 @ 0x80
800b466: b29b uxth r3, r3
800b468: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800b46a: 2300 movs r3, #0
}
800b46c: 4618 mov r0, r3
800b46e: 3714 adds r7, #20
800b470: 46bd mov sp, r7
800b472: bc80 pop {r7}
800b474: 4770 bx lr
0800b476 <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800b476: b480 push {r7}
800b478: b087 sub sp, #28
800b47a: af00 add r7, sp, #0
800b47c: 6078 str r0, [r7, #4]
800b47e: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800b480: 683b ldr r3, [r7, #0]
800b482: 7b1b ldrb r3, [r3, #12]
800b484: 2b00 cmp r3, #0
800b486: f040 809d bne.w 800b5c4 <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800b48a: 683b ldr r3, [r7, #0]
800b48c: 785b ldrb r3, [r3, #1]
800b48e: 2b00 cmp r3, #0
800b490: d04c beq.n 800b52c <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800b492: 687a ldr r2, [r7, #4]
800b494: 683b ldr r3, [r7, #0]
800b496: 781b ldrb r3, [r3, #0]
800b498: 009b lsls r3, r3, #2
800b49a: 4413 add r3, r2
800b49c: 881b ldrh r3, [r3, #0]
800b49e: 823b strh r3, [r7, #16]
800b4a0: 8a3b ldrh r3, [r7, #16]
800b4a2: f003 0340 and.w r3, r3, #64 @ 0x40
800b4a6: 2b00 cmp r3, #0
800b4a8: d01b beq.n 800b4e2 <USB_EPClearStall+0x6c>
800b4aa: 687a ldr r2, [r7, #4]
800b4ac: 683b ldr r3, [r7, #0]
800b4ae: 781b ldrb r3, [r3, #0]
800b4b0: 009b lsls r3, r3, #2
800b4b2: 4413 add r3, r2
800b4b4: 881b ldrh r3, [r3, #0]
800b4b6: b29b uxth r3, r3
800b4b8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b4bc: f023 0370 bic.w r3, r3, #112 @ 0x70
800b4c0: 81fb strh r3, [r7, #14]
800b4c2: 687a ldr r2, [r7, #4]
800b4c4: 683b ldr r3, [r7, #0]
800b4c6: 781b ldrb r3, [r3, #0]
800b4c8: 009b lsls r3, r3, #2
800b4ca: 441a add r2, r3
800b4cc: 89fb ldrh r3, [r7, #14]
800b4ce: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b4d2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b4d6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b4da: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800b4de: b29b uxth r3, r3
800b4e0: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800b4e2: 683b ldr r3, [r7, #0]
800b4e4: 78db ldrb r3, [r3, #3]
800b4e6: 2b01 cmp r3, #1
800b4e8: d06c beq.n 800b5c4 <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800b4ea: 687a ldr r2, [r7, #4]
800b4ec: 683b ldr r3, [r7, #0]
800b4ee: 781b ldrb r3, [r3, #0]
800b4f0: 009b lsls r3, r3, #2
800b4f2: 4413 add r3, r2
800b4f4: 881b ldrh r3, [r3, #0]
800b4f6: b29b uxth r3, r3
800b4f8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b4fc: f023 0340 bic.w r3, r3, #64 @ 0x40
800b500: 81bb strh r3, [r7, #12]
800b502: 89bb ldrh r3, [r7, #12]
800b504: f083 0320 eor.w r3, r3, #32
800b508: 81bb strh r3, [r7, #12]
800b50a: 687a ldr r2, [r7, #4]
800b50c: 683b ldr r3, [r7, #0]
800b50e: 781b ldrb r3, [r3, #0]
800b510: 009b lsls r3, r3, #2
800b512: 441a add r2, r3
800b514: 89bb ldrh r3, [r7, #12]
800b516: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b51a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b51e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b522: f043 0380 orr.w r3, r3, #128 @ 0x80
800b526: b29b uxth r3, r3
800b528: 8013 strh r3, [r2, #0]
800b52a: e04b b.n 800b5c4 <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800b52c: 687a ldr r2, [r7, #4]
800b52e: 683b ldr r3, [r7, #0]
800b530: 781b ldrb r3, [r3, #0]
800b532: 009b lsls r3, r3, #2
800b534: 4413 add r3, r2
800b536: 881b ldrh r3, [r3, #0]
800b538: 82fb strh r3, [r7, #22]
800b53a: 8afb ldrh r3, [r7, #22]
800b53c: f403 4380 and.w r3, r3, #16384 @ 0x4000
800b540: 2b00 cmp r3, #0
800b542: d01b beq.n 800b57c <USB_EPClearStall+0x106>
800b544: 687a ldr r2, [r7, #4]
800b546: 683b ldr r3, [r7, #0]
800b548: 781b ldrb r3, [r3, #0]
800b54a: 009b lsls r3, r3, #2
800b54c: 4413 add r3, r2
800b54e: 881b ldrh r3, [r3, #0]
800b550: b29b uxth r3, r3
800b552: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b556: f023 0370 bic.w r3, r3, #112 @ 0x70
800b55a: 82bb strh r3, [r7, #20]
800b55c: 687a ldr r2, [r7, #4]
800b55e: 683b ldr r3, [r7, #0]
800b560: 781b ldrb r3, [r3, #0]
800b562: 009b lsls r3, r3, #2
800b564: 441a add r2, r3
800b566: 8abb ldrh r3, [r7, #20]
800b568: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b56c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b570: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800b574: f043 0380 orr.w r3, r3, #128 @ 0x80
800b578: b29b uxth r3, r3
800b57a: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800b57c: 687a ldr r2, [r7, #4]
800b57e: 683b ldr r3, [r7, #0]
800b580: 781b ldrb r3, [r3, #0]
800b582: 009b lsls r3, r3, #2
800b584: 4413 add r3, r2
800b586: 881b ldrh r3, [r3, #0]
800b588: b29b uxth r3, r3
800b58a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800b58e: f023 0370 bic.w r3, r3, #112 @ 0x70
800b592: 827b strh r3, [r7, #18]
800b594: 8a7b ldrh r3, [r7, #18]
800b596: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800b59a: 827b strh r3, [r7, #18]
800b59c: 8a7b ldrh r3, [r7, #18]
800b59e: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800b5a2: 827b strh r3, [r7, #18]
800b5a4: 687a ldr r2, [r7, #4]
800b5a6: 683b ldr r3, [r7, #0]
800b5a8: 781b ldrb r3, [r3, #0]
800b5aa: 009b lsls r3, r3, #2
800b5ac: 441a add r2, r3
800b5ae: 8a7b ldrh r3, [r7, #18]
800b5b0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b5b4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b5b8: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b5bc: f043 0380 orr.w r3, r3, #128 @ 0x80
800b5c0: b29b uxth r3, r3
800b5c2: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800b5c4: 2300 movs r3, #0
}
800b5c6: 4618 mov r0, r3
800b5c8: 371c adds r7, #28
800b5ca: 46bd mov sp, r7
800b5cc: bc80 pop {r7}
800b5ce: 4770 bx lr
0800b5d0 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
800b5d0: b480 push {r7}
800b5d2: b083 sub sp, #12
800b5d4: af00 add r7, sp, #0
800b5d6: 6078 str r0, [r7, #4]
800b5d8: 460b mov r3, r1
800b5da: 70fb strb r3, [r7, #3]
if (address == 0U)
800b5dc: 78fb ldrb r3, [r7, #3]
800b5de: 2b00 cmp r3, #0
800b5e0: d103 bne.n 800b5ea <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800b5e2: 687b ldr r3, [r7, #4]
800b5e4: 2280 movs r2, #128 @ 0x80
800b5e6: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
800b5ea: 2300 movs r3, #0
}
800b5ec: 4618 mov r0, r3
800b5ee: 370c adds r7, #12
800b5f0: 46bd mov sp, r7
800b5f2: bc80 pop {r7}
800b5f4: 4770 bx lr
0800b5f6 <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
800b5f6: b480 push {r7}
800b5f8: b083 sub sp, #12
800b5fa: af00 add r7, sp, #0
800b5fc: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800b5fe: 2300 movs r3, #0
}
800b600: 4618 mov r0, r3
800b602: 370c adds r7, #12
800b604: 46bd mov sp, r7
800b606: bc80 pop {r7}
800b608: 4770 bx lr
0800b60a <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800b60a: b480 push {r7}
800b60c: b083 sub sp, #12
800b60e: af00 add r7, sp, #0
800b610: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800b612: 2300 movs r3, #0
}
800b614: 4618 mov r0, r3
800b616: 370c adds r7, #12
800b618: 46bd mov sp, r7
800b61a: bc80 pop {r7}
800b61c: 4770 bx lr
0800b61e <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
800b61e: b480 push {r7}
800b620: b085 sub sp, #20
800b622: af00 add r7, sp, #0
800b624: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
800b626: 687b ldr r3, [r7, #4]
800b628: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800b62c: b29b uxth r3, r3
800b62e: 60fb str r3, [r7, #12]
return tmpreg;
800b630: 68fb ldr r3, [r7, #12]
}
800b632: 4618 mov r0, r3
800b634: 3714 adds r7, #20
800b636: 46bd mov sp, r7
800b638: bc80 pop {r7}
800b63a: 4770 bx lr
0800b63c <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
800b63c: b480 push {r7}
800b63e: b083 sub sp, #12
800b640: af00 add r7, sp, #0
800b642: 6078 str r0, [r7, #4]
800b644: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800b646: 2300 movs r3, #0
}
800b648: 4618 mov r0, r3
800b64a: 370c adds r7, #12
800b64c: 46bd mov sp, r7
800b64e: bc80 pop {r7}
800b650: 4770 bx lr
0800b652 <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800b652: b480 push {r7}
800b654: b08b sub sp, #44 @ 0x2c
800b656: af00 add r7, sp, #0
800b658: 60f8 str r0, [r7, #12]
800b65a: 60b9 str r1, [r7, #8]
800b65c: 4611 mov r1, r2
800b65e: 461a mov r2, r3
800b660: 460b mov r3, r1
800b662: 80fb strh r3, [r7, #6]
800b664: 4613 mov r3, r2
800b666: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
800b668: 88bb ldrh r3, [r7, #4]
800b66a: 3301 adds r3, #1
800b66c: 085b lsrs r3, r3, #1
800b66e: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800b670: 68fb ldr r3, [r7, #12]
800b672: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800b674: 68bb ldr r3, [r7, #8]
800b676: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800b678: 88fb ldrh r3, [r7, #6]
800b67a: 005a lsls r2, r3, #1
800b67c: 697b ldr r3, [r7, #20]
800b67e: 4413 add r3, r2
800b680: f503 6380 add.w r3, r3, #1024 @ 0x400
800b684: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800b686: 69bb ldr r3, [r7, #24]
800b688: 627b str r3, [r7, #36] @ 0x24
800b68a: e01f b.n 800b6cc <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
800b68c: 69fb ldr r3, [r7, #28]
800b68e: 781b ldrb r3, [r3, #0]
800b690: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
800b692: 69fb ldr r3, [r7, #28]
800b694: 3301 adds r3, #1
800b696: 781b ldrb r3, [r3, #0]
800b698: b21b sxth r3, r3
800b69a: 021b lsls r3, r3, #8
800b69c: b21a sxth r2, r3
800b69e: f9b7 3012 ldrsh.w r3, [r7, #18]
800b6a2: 4313 orrs r3, r2
800b6a4: b21b sxth r3, r3
800b6a6: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
800b6a8: 6a3b ldr r3, [r7, #32]
800b6aa: 8a7a ldrh r2, [r7, #18]
800b6ac: 801a strh r2, [r3, #0]
pdwVal++;
800b6ae: 6a3b ldr r3, [r7, #32]
800b6b0: 3302 adds r3, #2
800b6b2: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
800b6b4: 6a3b ldr r3, [r7, #32]
800b6b6: 3302 adds r3, #2
800b6b8: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
800b6ba: 69fb ldr r3, [r7, #28]
800b6bc: 3301 adds r3, #1
800b6be: 61fb str r3, [r7, #28]
pBuf++;
800b6c0: 69fb ldr r3, [r7, #28]
800b6c2: 3301 adds r3, #1
800b6c4: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
800b6c6: 6a7b ldr r3, [r7, #36] @ 0x24
800b6c8: 3b01 subs r3, #1
800b6ca: 627b str r3, [r7, #36] @ 0x24
800b6cc: 6a7b ldr r3, [r7, #36] @ 0x24
800b6ce: 2b00 cmp r3, #0
800b6d0: d1dc bne.n 800b68c <USB_WritePMA+0x3a>
}
}
800b6d2: bf00 nop
800b6d4: bf00 nop
800b6d6: 372c adds r7, #44 @ 0x2c
800b6d8: 46bd mov sp, r7
800b6da: bc80 pop {r7}
800b6dc: 4770 bx lr
0800b6de <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800b6de: b480 push {r7}
800b6e0: b08b sub sp, #44 @ 0x2c
800b6e2: af00 add r7, sp, #0
800b6e4: 60f8 str r0, [r7, #12]
800b6e6: 60b9 str r1, [r7, #8]
800b6e8: 4611 mov r1, r2
800b6ea: 461a mov r2, r3
800b6ec: 460b mov r3, r1
800b6ee: 80fb strh r3, [r7, #6]
800b6f0: 4613 mov r3, r2
800b6f2: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
800b6f4: 88bb ldrh r3, [r7, #4]
800b6f6: 085b lsrs r3, r3, #1
800b6f8: b29b uxth r3, r3
800b6fa: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800b6fc: 68fb ldr r3, [r7, #12]
800b6fe: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800b700: 68bb ldr r3, [r7, #8]
800b702: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800b704: 88fb ldrh r3, [r7, #6]
800b706: 005a lsls r2, r3, #1
800b708: 697b ldr r3, [r7, #20]
800b70a: 4413 add r3, r2
800b70c: f503 6380 add.w r3, r3, #1024 @ 0x400
800b710: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800b712: 69bb ldr r3, [r7, #24]
800b714: 627b str r3, [r7, #36] @ 0x24
800b716: e01b b.n 800b750 <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
800b718: 6a3b ldr r3, [r7, #32]
800b71a: 881b ldrh r3, [r3, #0]
800b71c: b29b uxth r3, r3
800b71e: 613b str r3, [r7, #16]
pdwVal++;
800b720: 6a3b ldr r3, [r7, #32]
800b722: 3302 adds r3, #2
800b724: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800b726: 693b ldr r3, [r7, #16]
800b728: b2da uxtb r2, r3
800b72a: 69fb ldr r3, [r7, #28]
800b72c: 701a strb r2, [r3, #0]
pBuf++;
800b72e: 69fb ldr r3, [r7, #28]
800b730: 3301 adds r3, #1
800b732: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
800b734: 693b ldr r3, [r7, #16]
800b736: 0a1b lsrs r3, r3, #8
800b738: b2da uxtb r2, r3
800b73a: 69fb ldr r3, [r7, #28]
800b73c: 701a strb r2, [r3, #0]
pBuf++;
800b73e: 69fb ldr r3, [r7, #28]
800b740: 3301 adds r3, #1
800b742: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
800b744: 6a3b ldr r3, [r7, #32]
800b746: 3302 adds r3, #2
800b748: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800b74a: 6a7b ldr r3, [r7, #36] @ 0x24
800b74c: 3b01 subs r3, #1
800b74e: 627b str r3, [r7, #36] @ 0x24
800b750: 6a7b ldr r3, [r7, #36] @ 0x24
800b752: 2b00 cmp r3, #0
800b754: d1e0 bne.n 800b718 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
800b756: 88bb ldrh r3, [r7, #4]
800b758: f003 0301 and.w r3, r3, #1
800b75c: b29b uxth r3, r3
800b75e: 2b00 cmp r3, #0
800b760: d007 beq.n 800b772 <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
800b762: 6a3b ldr r3, [r7, #32]
800b764: 881b ldrh r3, [r3, #0]
800b766: b29b uxth r3, r3
800b768: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800b76a: 693b ldr r3, [r7, #16]
800b76c: b2da uxtb r2, r3
800b76e: 69fb ldr r3, [r7, #28]
800b770: 701a strb r2, [r3, #0]
}
}
800b772: bf00 nop
800b774: 372c adds r7, #44 @ 0x2c
800b776: 46bd mov sp, r7
800b778: bc80 pop {r7}
800b77a: 4770 bx lr
0800b77c <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800b77c: b580 push {r7, lr}
800b77e: b084 sub sp, #16
800b780: af00 add r7, sp, #0
800b782: 6078 str r0, [r7, #4]
800b784: 460b mov r3, r1
800b786: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800b788: 2300 movs r3, #0
800b78a: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
800b78c: 687b ldr r3, [r7, #4]
800b78e: 7c1b ldrb r3, [r3, #16]
800b790: 2b00 cmp r3, #0
800b792: d115 bne.n 800b7c0 <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800b794: f44f 7300 mov.w r3, #512 @ 0x200
800b798: 2202 movs r2, #2
800b79a: 2181 movs r1, #129 @ 0x81
800b79c: 6878 ldr r0, [r7, #4]
800b79e: f001 ff00 bl 800d5a2 <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800b7a2: 687b ldr r3, [r7, #4]
800b7a4: 2201 movs r2, #1
800b7a6: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800b7a8: f44f 7300 mov.w r3, #512 @ 0x200
800b7ac: 2202 movs r2, #2
800b7ae: 2101 movs r1, #1
800b7b0: 6878 ldr r0, [r7, #4]
800b7b2: f001 fef6 bl 800d5a2 <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800b7b6: 687b ldr r3, [r7, #4]
800b7b8: 2201 movs r2, #1
800b7ba: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800b7be: e012 b.n 800b7e6 <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800b7c0: 2340 movs r3, #64 @ 0x40
800b7c2: 2202 movs r2, #2
800b7c4: 2181 movs r1, #129 @ 0x81
800b7c6: 6878 ldr r0, [r7, #4]
800b7c8: f001 feeb bl 800d5a2 <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800b7cc: 687b ldr r3, [r7, #4]
800b7ce: 2201 movs r2, #1
800b7d0: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800b7d2: 2340 movs r3, #64 @ 0x40
800b7d4: 2202 movs r2, #2
800b7d6: 2101 movs r1, #1
800b7d8: 6878 ldr r0, [r7, #4]
800b7da: f001 fee2 bl 800d5a2 <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800b7de: 687b ldr r3, [r7, #4]
800b7e0: 2201 movs r2, #1
800b7e2: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
800b7e6: 2308 movs r3, #8
800b7e8: 2203 movs r2, #3
800b7ea: 2182 movs r1, #130 @ 0x82
800b7ec: 6878 ldr r0, [r7, #4]
800b7ee: f001 fed8 bl 800d5a2 <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800b7f2: 687b ldr r3, [r7, #4]
800b7f4: 2201 movs r2, #1
800b7f6: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
800b7f8: f44f 7007 mov.w r0, #540 @ 0x21c
800b7fc: f001 fff8 bl 800d7f0 <USBD_static_malloc>
800b800: 4602 mov r2, r0
800b802: 687b ldr r3, [r7, #4]
800b804: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
800b808: 687b ldr r3, [r7, #4]
800b80a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b80e: 2b00 cmp r3, #0
800b810: d102 bne.n 800b818 <USBD_CDC_Init+0x9c>
{
ret = 1U;
800b812: 2301 movs r3, #1
800b814: 73fb strb r3, [r7, #15]
800b816: e026 b.n 800b866 <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800b818: 687b ldr r3, [r7, #4]
800b81a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b81e: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
800b820: 687b ldr r3, [r7, #4]
800b822: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800b826: 681b ldr r3, [r3, #0]
800b828: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800b82a: 68bb ldr r3, [r7, #8]
800b82c: 2200 movs r2, #0
800b82e: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
800b832: 68bb ldr r3, [r7, #8]
800b834: 2200 movs r2, #0
800b836: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800b83a: 687b ldr r3, [r7, #4]
800b83c: 7c1b ldrb r3, [r3, #16]
800b83e: 2b00 cmp r3, #0
800b840: d109 bne.n 800b856 <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800b842: 68bb ldr r3, [r7, #8]
800b844: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800b848: f44f 7300 mov.w r3, #512 @ 0x200
800b84c: 2101 movs r1, #1
800b84e: 6878 ldr r0, [r7, #4]
800b850: f001 ff97 bl 800d782 <USBD_LL_PrepareReceive>
800b854: e007 b.n 800b866 <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800b856: 68bb ldr r3, [r7, #8]
800b858: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800b85c: 2340 movs r3, #64 @ 0x40
800b85e: 2101 movs r1, #1
800b860: 6878 ldr r0, [r7, #4]
800b862: f001 ff8e bl 800d782 <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
800b866: 7bfb ldrb r3, [r7, #15]
}
800b868: 4618 mov r0, r3
800b86a: 3710 adds r7, #16
800b86c: 46bd mov sp, r7
800b86e: bd80 pop {r7, pc}
0800b870 <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800b870: b580 push {r7, lr}
800b872: b084 sub sp, #16
800b874: af00 add r7, sp, #0
800b876: 6078 str r0, [r7, #4]
800b878: 460b mov r3, r1
800b87a: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800b87c: 2300 movs r3, #0
800b87e: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
800b880: 2181 movs r1, #129 @ 0x81
800b882: 6878 ldr r0, [r7, #4]
800b884: f001 feb3 bl 800d5ee <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
800b888: 687b ldr r3, [r7, #4]
800b88a: 2200 movs r2, #0
800b88c: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
800b88e: 2101 movs r1, #1
800b890: 6878 ldr r0, [r7, #4]
800b892: f001 feac bl 800d5ee <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
800b896: 687b ldr r3, [r7, #4]
800b898: 2200 movs r2, #0
800b89a: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
800b89e: 2182 movs r1, #130 @ 0x82
800b8a0: 6878 ldr r0, [r7, #4]
800b8a2: f001 fea4 bl 800d5ee <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
800b8a6: 687b ldr r3, [r7, #4]
800b8a8: 2200 movs r2, #0
800b8aa: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
800b8ac: 687b ldr r3, [r7, #4]
800b8ae: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b8b2: 2b00 cmp r3, #0
800b8b4: d00e beq.n 800b8d4 <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
800b8b6: 687b ldr r3, [r7, #4]
800b8b8: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800b8bc: 685b ldr r3, [r3, #4]
800b8be: 4798 blx r3
USBD_free(pdev->pClassData);
800b8c0: 687b ldr r3, [r7, #4]
800b8c2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b8c6: 4618 mov r0, r3
800b8c8: f001 ff9e bl 800d808 <USBD_static_free>
pdev->pClassData = NULL;
800b8cc: 687b ldr r3, [r7, #4]
800b8ce: 2200 movs r2, #0
800b8d0: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
800b8d4: 7bfb ldrb r3, [r7, #15]
}
800b8d6: 4618 mov r0, r3
800b8d8: 3710 adds r7, #16
800b8da: 46bd mov sp, r7
800b8dc: bd80 pop {r7, pc}
0800b8de <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800b8de: b580 push {r7, lr}
800b8e0: b086 sub sp, #24
800b8e2: af00 add r7, sp, #0
800b8e4: 6078 str r0, [r7, #4]
800b8e6: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800b8e8: 687b ldr r3, [r7, #4]
800b8ea: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800b8ee: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
800b8f0: 2300 movs r3, #0
800b8f2: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
800b8f4: 2300 movs r3, #0
800b8f6: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
800b8f8: 2300 movs r3, #0
800b8fa: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800b8fc: 683b ldr r3, [r7, #0]
800b8fe: 781b ldrb r3, [r3, #0]
800b900: f003 0360 and.w r3, r3, #96 @ 0x60
800b904: 2b00 cmp r3, #0
800b906: d039 beq.n 800b97c <USBD_CDC_Setup+0x9e>
800b908: 2b20 cmp r3, #32
800b90a: d17f bne.n 800ba0c <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
800b90c: 683b ldr r3, [r7, #0]
800b90e: 88db ldrh r3, [r3, #6]
800b910: 2b00 cmp r3, #0
800b912: d029 beq.n 800b968 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
800b914: 683b ldr r3, [r7, #0]
800b916: 781b ldrb r3, [r3, #0]
800b918: b25b sxtb r3, r3
800b91a: 2b00 cmp r3, #0
800b91c: da11 bge.n 800b942 <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800b91e: 687b ldr r3, [r7, #4]
800b920: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800b924: 689b ldr r3, [r3, #8]
800b926: 683a ldr r2, [r7, #0]
800b928: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800b92a: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800b92c: 683a ldr r2, [r7, #0]
800b92e: 88d2 ldrh r2, [r2, #6]
800b930: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800b932: 6939 ldr r1, [r7, #16]
800b934: 683b ldr r3, [r7, #0]
800b936: 88db ldrh r3, [r3, #6]
800b938: 461a mov r2, r3
800b93a: 6878 ldr r0, [r7, #4]
800b93c: f001 fa06 bl 800cd4c <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
800b940: e06b b.n 800ba1a <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
800b942: 683b ldr r3, [r7, #0]
800b944: 785a ldrb r2, [r3, #1]
800b946: 693b ldr r3, [r7, #16]
800b948: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
800b94c: 683b ldr r3, [r7, #0]
800b94e: 88db ldrh r3, [r3, #6]
800b950: b2da uxtb r2, r3
800b952: 693b ldr r3, [r7, #16]
800b954: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800b958: 6939 ldr r1, [r7, #16]
800b95a: 683b ldr r3, [r7, #0]
800b95c: 88db ldrh r3, [r3, #6]
800b95e: 461a mov r2, r3
800b960: 6878 ldr r0, [r7, #4]
800b962: f001 fa21 bl 800cda8 <USBD_CtlPrepareRx>
break;
800b966: e058 b.n 800ba1a <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800b968: 687b ldr r3, [r7, #4]
800b96a: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800b96e: 689b ldr r3, [r3, #8]
800b970: 683a ldr r2, [r7, #0]
800b972: 7850 ldrb r0, [r2, #1]
800b974: 2200 movs r2, #0
800b976: 6839 ldr r1, [r7, #0]
800b978: 4798 blx r3
break;
800b97a: e04e b.n 800ba1a <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800b97c: 683b ldr r3, [r7, #0]
800b97e: 785b ldrb r3, [r3, #1]
800b980: 2b0b cmp r3, #11
800b982: d02e beq.n 800b9e2 <USBD_CDC_Setup+0x104>
800b984: 2b0b cmp r3, #11
800b986: dc38 bgt.n 800b9fa <USBD_CDC_Setup+0x11c>
800b988: 2b00 cmp r3, #0
800b98a: d002 beq.n 800b992 <USBD_CDC_Setup+0xb4>
800b98c: 2b0a cmp r3, #10
800b98e: d014 beq.n 800b9ba <USBD_CDC_Setup+0xdc>
800b990: e033 b.n 800b9fa <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b992: 687b ldr r3, [r7, #4]
800b994: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b998: 2b03 cmp r3, #3
800b99a: d107 bne.n 800b9ac <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
800b99c: f107 030c add.w r3, r7, #12
800b9a0: 2202 movs r2, #2
800b9a2: 4619 mov r1, r3
800b9a4: 6878 ldr r0, [r7, #4]
800b9a6: f001 f9d1 bl 800cd4c <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800b9aa: e02e b.n 800ba0a <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800b9ac: 6839 ldr r1, [r7, #0]
800b9ae: 6878 ldr r0, [r7, #4]
800b9b0: f001 f962 bl 800cc78 <USBD_CtlError>
ret = USBD_FAIL;
800b9b4: 2302 movs r3, #2
800b9b6: 75fb strb r3, [r7, #23]
break;
800b9b8: e027 b.n 800ba0a <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800b9ba: 687b ldr r3, [r7, #4]
800b9bc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b9c0: 2b03 cmp r3, #3
800b9c2: d107 bne.n 800b9d4 <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
800b9c4: f107 030f add.w r3, r7, #15
800b9c8: 2201 movs r2, #1
800b9ca: 4619 mov r1, r3
800b9cc: 6878 ldr r0, [r7, #4]
800b9ce: f001 f9bd bl 800cd4c <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800b9d2: e01a b.n 800ba0a <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800b9d4: 6839 ldr r1, [r7, #0]
800b9d6: 6878 ldr r0, [r7, #4]
800b9d8: f001 f94e bl 800cc78 <USBD_CtlError>
ret = USBD_FAIL;
800b9dc: 2302 movs r3, #2
800b9de: 75fb strb r3, [r7, #23]
break;
800b9e0: e013 b.n 800ba0a <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800b9e2: 687b ldr r3, [r7, #4]
800b9e4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800b9e8: 2b03 cmp r3, #3
800b9ea: d00d beq.n 800ba08 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
800b9ec: 6839 ldr r1, [r7, #0]
800b9ee: 6878 ldr r0, [r7, #4]
800b9f0: f001 f942 bl 800cc78 <USBD_CtlError>
ret = USBD_FAIL;
800b9f4: 2302 movs r3, #2
800b9f6: 75fb strb r3, [r7, #23]
}
break;
800b9f8: e006 b.n 800ba08 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800b9fa: 6839 ldr r1, [r7, #0]
800b9fc: 6878 ldr r0, [r7, #4]
800b9fe: f001 f93b bl 800cc78 <USBD_CtlError>
ret = USBD_FAIL;
800ba02: 2302 movs r3, #2
800ba04: 75fb strb r3, [r7, #23]
break;
800ba06: e000 b.n 800ba0a <USBD_CDC_Setup+0x12c>
break;
800ba08: bf00 nop
}
break;
800ba0a: e006 b.n 800ba1a <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
800ba0c: 6839 ldr r1, [r7, #0]
800ba0e: 6878 ldr r0, [r7, #4]
800ba10: f001 f932 bl 800cc78 <USBD_CtlError>
ret = USBD_FAIL;
800ba14: 2302 movs r3, #2
800ba16: 75fb strb r3, [r7, #23]
break;
800ba18: bf00 nop
}
return ret;
800ba1a: 7dfb ldrb r3, [r7, #23]
}
800ba1c: 4618 mov r0, r3
800ba1e: 3718 adds r7, #24
800ba20: 46bd mov sp, r7
800ba22: bd80 pop {r7, pc}
0800ba24 <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800ba24: b580 push {r7, lr}
800ba26: b084 sub sp, #16
800ba28: af00 add r7, sp, #0
800ba2a: 6078 str r0, [r7, #4]
800ba2c: 460b mov r3, r1
800ba2e: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
800ba30: 687b ldr r3, [r7, #4]
800ba32: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800ba36: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
800ba38: 687b ldr r3, [r7, #4]
800ba3a: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800ba3e: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
800ba40: 687b ldr r3, [r7, #4]
800ba42: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800ba46: 2b00 cmp r3, #0
800ba48: d03a beq.n 800bac0 <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800ba4a: 78fa ldrb r2, [r7, #3]
800ba4c: 6879 ldr r1, [r7, #4]
800ba4e: 4613 mov r3, r2
800ba50: 009b lsls r3, r3, #2
800ba52: 4413 add r3, r2
800ba54: 009b lsls r3, r3, #2
800ba56: 440b add r3, r1
800ba58: 331c adds r3, #28
800ba5a: 681b ldr r3, [r3, #0]
800ba5c: 2b00 cmp r3, #0
800ba5e: d029 beq.n 800bab4 <USBD_CDC_DataIn+0x90>
800ba60: 78fa ldrb r2, [r7, #3]
800ba62: 6879 ldr r1, [r7, #4]
800ba64: 4613 mov r3, r2
800ba66: 009b lsls r3, r3, #2
800ba68: 4413 add r3, r2
800ba6a: 009b lsls r3, r3, #2
800ba6c: 440b add r3, r1
800ba6e: 331c adds r3, #28
800ba70: 681a ldr r2, [r3, #0]
800ba72: 78f9 ldrb r1, [r7, #3]
800ba74: 68b8 ldr r0, [r7, #8]
800ba76: 460b mov r3, r1
800ba78: 009b lsls r3, r3, #2
800ba7a: 440b add r3, r1
800ba7c: 00db lsls r3, r3, #3
800ba7e: 4403 add r3, r0
800ba80: 3320 adds r3, #32
800ba82: 681b ldr r3, [r3, #0]
800ba84: fbb2 f1f3 udiv r1, r2, r3
800ba88: fb01 f303 mul.w r3, r1, r3
800ba8c: 1ad3 subs r3, r2, r3
800ba8e: 2b00 cmp r3, #0
800ba90: d110 bne.n 800bab4 <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
800ba92: 78fa ldrb r2, [r7, #3]
800ba94: 6879 ldr r1, [r7, #4]
800ba96: 4613 mov r3, r2
800ba98: 009b lsls r3, r3, #2
800ba9a: 4413 add r3, r2
800ba9c: 009b lsls r3, r3, #2
800ba9e: 440b add r3, r1
800baa0: 331c adds r3, #28
800baa2: 2200 movs r2, #0
800baa4: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
800baa6: 78f9 ldrb r1, [r7, #3]
800baa8: 2300 movs r3, #0
800baaa: 2200 movs r2, #0
800baac: 6878 ldr r0, [r7, #4]
800baae: f001 fe45 bl 800d73c <USBD_LL_Transmit>
800bab2: e003 b.n 800babc <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
800bab4: 68fb ldr r3, [r7, #12]
800bab6: 2200 movs r2, #0
800bab8: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
800babc: 2300 movs r3, #0
800babe: e000 b.n 800bac2 <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
800bac0: 2302 movs r3, #2
}
}
800bac2: 4618 mov r0, r3
800bac4: 3710 adds r7, #16
800bac6: 46bd mov sp, r7
800bac8: bd80 pop {r7, pc}
0800baca <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800baca: b580 push {r7, lr}
800bacc: b084 sub sp, #16
800bace: af00 add r7, sp, #0
800bad0: 6078 str r0, [r7, #4]
800bad2: 460b mov r3, r1
800bad4: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bad6: 687b ldr r3, [r7, #4]
800bad8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800badc: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
800bade: 78fb ldrb r3, [r7, #3]
800bae0: 4619 mov r1, r3
800bae2: 6878 ldr r0, [r7, #4]
800bae4: f001 fe70 bl 800d7c8 <USBD_LL_GetRxDataSize>
800bae8: 4602 mov r2, r0
800baea: 68fb ldr r3, [r7, #12]
800baec: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
800baf0: 687b ldr r3, [r7, #4]
800baf2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800baf6: 2b00 cmp r3, #0
800baf8: d00d beq.n 800bb16 <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800bafa: 687b ldr r3, [r7, #4]
800bafc: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bb00: 68db ldr r3, [r3, #12]
800bb02: 68fa ldr r2, [r7, #12]
800bb04: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800bb08: 68fa ldr r2, [r7, #12]
800bb0a: f502 7203 add.w r2, r2, #524 @ 0x20c
800bb0e: 4611 mov r1, r2
800bb10: 4798 blx r3
return USBD_OK;
800bb12: 2300 movs r3, #0
800bb14: e000 b.n 800bb18 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800bb16: 2302 movs r3, #2
}
}
800bb18: 4618 mov r0, r3
800bb1a: 3710 adds r7, #16
800bb1c: 46bd mov sp, r7
800bb1e: bd80 pop {r7, pc}
0800bb20 <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
800bb20: b580 push {r7, lr}
800bb22: b084 sub sp, #16
800bb24: af00 add r7, sp, #0
800bb26: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bb28: 687b ldr r3, [r7, #4]
800bb2a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bb2e: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
800bb30: 687b ldr r3, [r7, #4]
800bb32: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bb36: 2b00 cmp r3, #0
800bb38: d014 beq.n 800bb64 <USBD_CDC_EP0_RxReady+0x44>
800bb3a: 68fb ldr r3, [r7, #12]
800bb3c: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
800bb40: 2bff cmp r3, #255 @ 0xff
800bb42: d00f beq.n 800bb64 <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800bb44: 687b ldr r3, [r7, #4]
800bb46: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800bb4a: 689b ldr r3, [r3, #8]
800bb4c: 68fa ldr r2, [r7, #12]
800bb4e: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
800bb52: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
800bb54: 68fa ldr r2, [r7, #12]
800bb56: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800bb5a: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
800bb5c: 68fb ldr r3, [r7, #12]
800bb5e: 22ff movs r2, #255 @ 0xff
800bb60: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
800bb64: 2300 movs r3, #0
}
800bb66: 4618 mov r0, r3
800bb68: 3710 adds r7, #16
800bb6a: 46bd mov sp, r7
800bb6c: bd80 pop {r7, pc}
...
0800bb70 <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
800bb70: b480 push {r7}
800bb72: b083 sub sp, #12
800bb74: af00 add r7, sp, #0
800bb76: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
800bb78: 687b ldr r3, [r7, #4]
800bb7a: 2243 movs r2, #67 @ 0x43
800bb7c: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
800bb7e: 4b03 ldr r3, [pc, #12] @ (800bb8c <USBD_CDC_GetFSCfgDesc+0x1c>)
}
800bb80: 4618 mov r0, r3
800bb82: 370c adds r7, #12
800bb84: 46bd mov sp, r7
800bb86: bc80 pop {r7}
800bb88: 4770 bx lr
800bb8a: bf00 nop
800bb8c: 2000009c .word 0x2000009c
0800bb90 <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
800bb90: b480 push {r7}
800bb92: b083 sub sp, #12
800bb94: af00 add r7, sp, #0
800bb96: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
800bb98: 687b ldr r3, [r7, #4]
800bb9a: 2243 movs r2, #67 @ 0x43
800bb9c: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
800bb9e: 4b03 ldr r3, [pc, #12] @ (800bbac <USBD_CDC_GetHSCfgDesc+0x1c>)
}
800bba0: 4618 mov r0, r3
800bba2: 370c adds r7, #12
800bba4: 46bd mov sp, r7
800bba6: bc80 pop {r7}
800bba8: 4770 bx lr
800bbaa: bf00 nop
800bbac: 20000058 .word 0x20000058
0800bbb0 <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
800bbb0: b480 push {r7}
800bbb2: b083 sub sp, #12
800bbb4: af00 add r7, sp, #0
800bbb6: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800bbb8: 687b ldr r3, [r7, #4]
800bbba: 2243 movs r2, #67 @ 0x43
800bbbc: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
800bbbe: 4b03 ldr r3, [pc, #12] @ (800bbcc <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
800bbc0: 4618 mov r0, r3
800bbc2: 370c adds r7, #12
800bbc4: 46bd mov sp, r7
800bbc6: bc80 pop {r7}
800bbc8: 4770 bx lr
800bbca: bf00 nop
800bbcc: 200000e0 .word 0x200000e0
0800bbd0 <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
800bbd0: b480 push {r7}
800bbd2: b083 sub sp, #12
800bbd4: af00 add r7, sp, #0
800bbd6: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800bbd8: 687b ldr r3, [r7, #4]
800bbda: 220a movs r2, #10
800bbdc: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
800bbde: 4b03 ldr r3, [pc, #12] @ (800bbec <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
800bbe0: 4618 mov r0, r3
800bbe2: 370c adds r7, #12
800bbe4: 46bd mov sp, r7
800bbe6: bc80 pop {r7}
800bbe8: 4770 bx lr
800bbea: bf00 nop
800bbec: 20000014 .word 0x20000014
0800bbf0 <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
800bbf0: b480 push {r7}
800bbf2: b085 sub sp, #20
800bbf4: af00 add r7, sp, #0
800bbf6: 6078 str r0, [r7, #4]
800bbf8: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800bbfa: 2302 movs r3, #2
800bbfc: 73fb strb r3, [r7, #15]
if (fops != NULL)
800bbfe: 683b ldr r3, [r7, #0]
800bc00: 2b00 cmp r3, #0
800bc02: d005 beq.n 800bc10 <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
800bc04: 687b ldr r3, [r7, #4]
800bc06: 683a ldr r2, [r7, #0]
800bc08: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
800bc0c: 2300 movs r3, #0
800bc0e: 73fb strb r3, [r7, #15]
}
return ret;
800bc10: 7bfb ldrb r3, [r7, #15]
}
800bc12: 4618 mov r0, r3
800bc14: 3714 adds r7, #20
800bc16: 46bd mov sp, r7
800bc18: bc80 pop {r7}
800bc1a: 4770 bx lr
0800bc1c <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
800bc1c: b480 push {r7}
800bc1e: b087 sub sp, #28
800bc20: af00 add r7, sp, #0
800bc22: 60f8 str r0, [r7, #12]
800bc24: 60b9 str r1, [r7, #8]
800bc26: 4613 mov r3, r2
800bc28: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bc2a: 68fb ldr r3, [r7, #12]
800bc2c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bc30: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
800bc32: 697b ldr r3, [r7, #20]
800bc34: 68ba ldr r2, [r7, #8]
800bc36: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
800bc3a: 88fa ldrh r2, [r7, #6]
800bc3c: 697b ldr r3, [r7, #20]
800bc3e: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
800bc42: 2300 movs r3, #0
}
800bc44: 4618 mov r0, r3
800bc46: 371c adds r7, #28
800bc48: 46bd mov sp, r7
800bc4a: bc80 pop {r7}
800bc4c: 4770 bx lr
0800bc4e <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
800bc4e: b480 push {r7}
800bc50: b085 sub sp, #20
800bc52: af00 add r7, sp, #0
800bc54: 6078 str r0, [r7, #4]
800bc56: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bc58: 687b ldr r3, [r7, #4]
800bc5a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bc5e: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
800bc60: 68fb ldr r3, [r7, #12]
800bc62: 683a ldr r2, [r7, #0]
800bc64: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
800bc68: 2300 movs r3, #0
}
800bc6a: 4618 mov r0, r3
800bc6c: 3714 adds r7, #20
800bc6e: 46bd mov sp, r7
800bc70: bc80 pop {r7}
800bc72: 4770 bx lr
0800bc74 <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
800bc74: b580 push {r7, lr}
800bc76: b084 sub sp, #16
800bc78: af00 add r7, sp, #0
800bc7a: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bc7c: 687b ldr r3, [r7, #4]
800bc7e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bc82: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
800bc84: 687b ldr r3, [r7, #4]
800bc86: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bc8a: 2b00 cmp r3, #0
800bc8c: d01c beq.n 800bcc8 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
800bc8e: 68fb ldr r3, [r7, #12]
800bc90: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800bc94: 2b00 cmp r3, #0
800bc96: d115 bne.n 800bcc4 <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
800bc98: 68fb ldr r3, [r7, #12]
800bc9a: 2201 movs r2, #1
800bc9c: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
800bca0: 68fb ldr r3, [r7, #12]
800bca2: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
800bca6: 687b ldr r3, [r7, #4]
800bca8: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800bcaa: 68fb ldr r3, [r7, #12]
800bcac: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
800bcb0: 68fb ldr r3, [r7, #12]
800bcb2: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800bcb6: b29b uxth r3, r3
800bcb8: 2181 movs r1, #129 @ 0x81
800bcba: 6878 ldr r0, [r7, #4]
800bcbc: f001 fd3e bl 800d73c <USBD_LL_Transmit>
return USBD_OK;
800bcc0: 2300 movs r3, #0
800bcc2: e002 b.n 800bcca <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800bcc4: 2301 movs r3, #1
800bcc6: e000 b.n 800bcca <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
800bcc8: 2302 movs r3, #2
}
}
800bcca: 4618 mov r0, r3
800bccc: 3710 adds r7, #16
800bcce: 46bd mov sp, r7
800bcd0: bd80 pop {r7, pc}
0800bcd2 <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800bcd2: b580 push {r7, lr}
800bcd4: b084 sub sp, #16
800bcd6: af00 add r7, sp, #0
800bcd8: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800bcda: 687b ldr r3, [r7, #4]
800bcdc: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bce0: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800bce2: 687b ldr r3, [r7, #4]
800bce4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800bce8: 2b00 cmp r3, #0
800bcea: d017 beq.n 800bd1c <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
800bcec: 687b ldr r3, [r7, #4]
800bcee: 7c1b ldrb r3, [r3, #16]
800bcf0: 2b00 cmp r3, #0
800bcf2: d109 bne.n 800bd08 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800bcf4: 68fb ldr r3, [r7, #12]
800bcf6: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800bcfa: f44f 7300 mov.w r3, #512 @ 0x200
800bcfe: 2101 movs r1, #1
800bd00: 6878 ldr r0, [r7, #4]
800bd02: f001 fd3e bl 800d782 <USBD_LL_PrepareReceive>
800bd06: e007 b.n 800bd18 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800bd08: 68fb ldr r3, [r7, #12]
800bd0a: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800bd0e: 2340 movs r3, #64 @ 0x40
800bd10: 2101 movs r1, #1
800bd12: 6878 ldr r0, [r7, #4]
800bd14: f001 fd35 bl 800d782 <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
800bd18: 2300 movs r3, #0
800bd1a: e000 b.n 800bd1e <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
800bd1c: 2302 movs r3, #2
}
}
800bd1e: 4618 mov r0, r3
800bd20: 3710 adds r7, #16
800bd22: 46bd mov sp, r7
800bd24: bd80 pop {r7, pc}
0800bd26 <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800bd26: b580 push {r7, lr}
800bd28: b084 sub sp, #16
800bd2a: af00 add r7, sp, #0
800bd2c: 60f8 str r0, [r7, #12]
800bd2e: 60b9 str r1, [r7, #8]
800bd30: 4613 mov r3, r2
800bd32: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800bd34: 68fb ldr r3, [r7, #12]
800bd36: 2b00 cmp r3, #0
800bd38: d101 bne.n 800bd3e <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
800bd3a: 2302 movs r3, #2
800bd3c: e01a b.n 800bd74 <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
800bd3e: 68fb ldr r3, [r7, #12]
800bd40: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800bd44: 2b00 cmp r3, #0
800bd46: d003 beq.n 800bd50 <USBD_Init+0x2a>
{
pdev->pClass = NULL;
800bd48: 68fb ldr r3, [r7, #12]
800bd4a: 2200 movs r2, #0
800bd4c: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
800bd50: 68bb ldr r3, [r7, #8]
800bd52: 2b00 cmp r3, #0
800bd54: d003 beq.n 800bd5e <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
800bd56: 68fb ldr r3, [r7, #12]
800bd58: 68ba ldr r2, [r7, #8]
800bd5a: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
800bd5e: 68fb ldr r3, [r7, #12]
800bd60: 2201 movs r2, #1
800bd62: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
800bd66: 68fb ldr r3, [r7, #12]
800bd68: 79fa ldrb r2, [r7, #7]
800bd6a: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
800bd6c: 68f8 ldr r0, [r7, #12]
800bd6e: f001 fba3 bl 800d4b8 <USBD_LL_Init>
return USBD_OK;
800bd72: 2300 movs r3, #0
}
800bd74: 4618 mov r0, r3
800bd76: 3710 adds r7, #16
800bd78: 46bd mov sp, r7
800bd7a: bd80 pop {r7, pc}
0800bd7c <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800bd7c: b480 push {r7}
800bd7e: b085 sub sp, #20
800bd80: af00 add r7, sp, #0
800bd82: 6078 str r0, [r7, #4]
800bd84: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
800bd86: 2300 movs r3, #0
800bd88: 73fb strb r3, [r7, #15]
if (pclass != NULL)
800bd8a: 683b ldr r3, [r7, #0]
800bd8c: 2b00 cmp r3, #0
800bd8e: d006 beq.n 800bd9e <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
800bd90: 687b ldr r3, [r7, #4]
800bd92: 683a ldr r2, [r7, #0]
800bd94: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
800bd98: 2300 movs r3, #0
800bd9a: 73fb strb r3, [r7, #15]
800bd9c: e001 b.n 800bda2 <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
800bd9e: 2302 movs r3, #2
800bda0: 73fb strb r3, [r7, #15]
}
return status;
800bda2: 7bfb ldrb r3, [r7, #15]
}
800bda4: 4618 mov r0, r3
800bda6: 3714 adds r7, #20
800bda8: 46bd mov sp, r7
800bdaa: bc80 pop {r7}
800bdac: 4770 bx lr
0800bdae <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800bdae: b580 push {r7, lr}
800bdb0: b082 sub sp, #8
800bdb2: af00 add r7, sp, #0
800bdb4: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
800bdb6: 6878 ldr r0, [r7, #4]
800bdb8: f001 fbd8 bl 800d56c <USBD_LL_Start>
return USBD_OK;
800bdbc: 2300 movs r3, #0
}
800bdbe: 4618 mov r0, r3
800bdc0: 3708 adds r7, #8
800bdc2: 46bd mov sp, r7
800bdc4: bd80 pop {r7, pc}
0800bdc6 <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800bdc6: b480 push {r7}
800bdc8: b083 sub sp, #12
800bdca: af00 add r7, sp, #0
800bdcc: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800bdce: 2300 movs r3, #0
}
800bdd0: 4618 mov r0, r3
800bdd2: 370c adds r7, #12
800bdd4: 46bd mov sp, r7
800bdd6: bc80 pop {r7}
800bdd8: 4770 bx lr
0800bdda <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800bdda: b580 push {r7, lr}
800bddc: b084 sub sp, #16
800bdde: af00 add r7, sp, #0
800bde0: 6078 str r0, [r7, #4]
800bde2: 460b mov r3, r1
800bde4: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800bde6: 2302 movs r3, #2
800bde8: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
800bdea: 687b ldr r3, [r7, #4]
800bdec: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800bdf0: 2b00 cmp r3, #0
800bdf2: d00c beq.n 800be0e <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
800bdf4: 687b ldr r3, [r7, #4]
800bdf6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800bdfa: 681b ldr r3, [r3, #0]
800bdfc: 78fa ldrb r2, [r7, #3]
800bdfe: 4611 mov r1, r2
800be00: 6878 ldr r0, [r7, #4]
800be02: 4798 blx r3
800be04: 4603 mov r3, r0
800be06: 2b00 cmp r3, #0
800be08: d101 bne.n 800be0e <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
800be0a: 2300 movs r3, #0
800be0c: 73fb strb r3, [r7, #15]
}
}
return ret;
800be0e: 7bfb ldrb r3, [r7, #15]
}
800be10: 4618 mov r0, r3
800be12: 3710 adds r7, #16
800be14: 46bd mov sp, r7
800be16: bd80 pop {r7, pc}
0800be18 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800be18: b580 push {r7, lr}
800be1a: b082 sub sp, #8
800be1c: af00 add r7, sp, #0
800be1e: 6078 str r0, [r7, #4]
800be20: 460b mov r3, r1
800be22: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
800be24: 687b ldr r3, [r7, #4]
800be26: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800be2a: 685b ldr r3, [r3, #4]
800be2c: 78fa ldrb r2, [r7, #3]
800be2e: 4611 mov r1, r2
800be30: 6878 ldr r0, [r7, #4]
800be32: 4798 blx r3
return USBD_OK;
800be34: 2300 movs r3, #0
}
800be36: 4618 mov r0, r3
800be38: 3708 adds r7, #8
800be3a: 46bd mov sp, r7
800be3c: bd80 pop {r7, pc}
0800be3e <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800be3e: b580 push {r7, lr}
800be40: b082 sub sp, #8
800be42: af00 add r7, sp, #0
800be44: 6078 str r0, [r7, #4]
800be46: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
800be48: 687b ldr r3, [r7, #4]
800be4a: f503 732a add.w r3, r3, #680 @ 0x2a8
800be4e: 6839 ldr r1, [r7, #0]
800be50: 4618 mov r0, r3
800be52: f000 fed8 bl 800cc06 <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800be56: 687b ldr r3, [r7, #4]
800be58: 2201 movs r2, #1
800be5a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
800be5e: 687b ldr r3, [r7, #4]
800be60: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800be64: 461a mov r2, r3
800be66: 687b ldr r3, [r7, #4]
800be68: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
800be6c: 687b ldr r3, [r7, #4]
800be6e: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800be72: f003 031f and.w r3, r3, #31
800be76: 2b02 cmp r3, #2
800be78: d016 beq.n 800bea8 <USBD_LL_SetupStage+0x6a>
800be7a: 2b02 cmp r3, #2
800be7c: d81c bhi.n 800beb8 <USBD_LL_SetupStage+0x7a>
800be7e: 2b00 cmp r3, #0
800be80: d002 beq.n 800be88 <USBD_LL_SetupStage+0x4a>
800be82: 2b01 cmp r3, #1
800be84: d008 beq.n 800be98 <USBD_LL_SetupStage+0x5a>
800be86: e017 b.n 800beb8 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
800be88: 687b ldr r3, [r7, #4]
800be8a: f503 732a add.w r3, r3, #680 @ 0x2a8
800be8e: 4619 mov r1, r3
800be90: 6878 ldr r0, [r7, #4]
800be92: f000 f9cb bl 800c22c <USBD_StdDevReq>
break;
800be96: e01a b.n 800bece <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
800be98: 687b ldr r3, [r7, #4]
800be9a: f503 732a add.w r3, r3, #680 @ 0x2a8
800be9e: 4619 mov r1, r3
800bea0: 6878 ldr r0, [r7, #4]
800bea2: f000 fa2d bl 800c300 <USBD_StdItfReq>
break;
800bea6: e012 b.n 800bece <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
800bea8: 687b ldr r3, [r7, #4]
800beaa: f503 732a add.w r3, r3, #680 @ 0x2a8
800beae: 4619 mov r1, r3
800beb0: 6878 ldr r0, [r7, #4]
800beb2: f000 fa6d bl 800c390 <USBD_StdEPReq>
break;
800beb6: e00a b.n 800bece <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800beb8: 687b ldr r3, [r7, #4]
800beba: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800bebe: f023 037f bic.w r3, r3, #127 @ 0x7f
800bec2: b2db uxtb r3, r3
800bec4: 4619 mov r1, r3
800bec6: 6878 ldr r0, [r7, #4]
800bec8: f001 fbb0 bl 800d62c <USBD_LL_StallEP>
break;
800becc: bf00 nop
}
return USBD_OK;
800bece: 2300 movs r3, #0
}
800bed0: 4618 mov r0, r3
800bed2: 3708 adds r7, #8
800bed4: 46bd mov sp, r7
800bed6: bd80 pop {r7, pc}
0800bed8 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800bed8: b580 push {r7, lr}
800beda: b086 sub sp, #24
800bedc: af00 add r7, sp, #0
800bede: 60f8 str r0, [r7, #12]
800bee0: 460b mov r3, r1
800bee2: 607a str r2, [r7, #4]
800bee4: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800bee6: 7afb ldrb r3, [r7, #11]
800bee8: 2b00 cmp r3, #0
800beea: d14b bne.n 800bf84 <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
800beec: 68fb ldr r3, [r7, #12]
800beee: f503 73aa add.w r3, r3, #340 @ 0x154
800bef2: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800bef4: 68fb ldr r3, [r7, #12]
800bef6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800befa: 2b03 cmp r3, #3
800befc: d134 bne.n 800bf68 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
800befe: 697b ldr r3, [r7, #20]
800bf00: 68da ldr r2, [r3, #12]
800bf02: 697b ldr r3, [r7, #20]
800bf04: 691b ldr r3, [r3, #16]
800bf06: 429a cmp r2, r3
800bf08: d919 bls.n 800bf3e <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
800bf0a: 697b ldr r3, [r7, #20]
800bf0c: 68da ldr r2, [r3, #12]
800bf0e: 697b ldr r3, [r7, #20]
800bf10: 691b ldr r3, [r3, #16]
800bf12: 1ad2 subs r2, r2, r3
800bf14: 697b ldr r3, [r7, #20]
800bf16: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800bf18: 697b ldr r3, [r7, #20]
800bf1a: 68da ldr r2, [r3, #12]
800bf1c: 697b ldr r3, [r7, #20]
800bf1e: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800bf20: 429a cmp r2, r3
800bf22: d203 bcs.n 800bf2c <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800bf24: 697b ldr r3, [r7, #20]
800bf26: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
800bf28: b29b uxth r3, r3
800bf2a: e002 b.n 800bf32 <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800bf2c: 697b ldr r3, [r7, #20]
800bf2e: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800bf30: b29b uxth r3, r3
800bf32: 461a mov r2, r3
800bf34: 6879 ldr r1, [r7, #4]
800bf36: 68f8 ldr r0, [r7, #12]
800bf38: f000 ff54 bl 800cde4 <USBD_CtlContinueRx>
800bf3c: e038 b.n 800bfb0 <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800bf3e: 68fb ldr r3, [r7, #12]
800bf40: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800bf44: 691b ldr r3, [r3, #16]
800bf46: 2b00 cmp r3, #0
800bf48: d00a beq.n 800bf60 <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800bf4a: 68fb ldr r3, [r7, #12]
800bf4c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
800bf50: 2b03 cmp r3, #3
800bf52: d105 bne.n 800bf60 <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
800bf54: 68fb ldr r3, [r7, #12]
800bf56: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800bf5a: 691b ldr r3, [r3, #16]
800bf5c: 68f8 ldr r0, [r7, #12]
800bf5e: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
800bf60: 68f8 ldr r0, [r7, #12]
800bf62: f000 ff51 bl 800ce08 <USBD_CtlSendStatus>
800bf66: e023 b.n 800bfb0 <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
800bf68: 68fb ldr r3, [r7, #12]
800bf6a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800bf6e: 2b05 cmp r3, #5
800bf70: d11e bne.n 800bfb0 <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
800bf72: 68fb ldr r3, [r7, #12]
800bf74: 2200 movs r2, #0
800bf76: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
800bf7a: 2100 movs r1, #0
800bf7c: 68f8 ldr r0, [r7, #12]
800bf7e: f001 fb55 bl 800d62c <USBD_LL_StallEP>
800bf82: e015 b.n 800bfb0 <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
800bf84: 68fb ldr r3, [r7, #12]
800bf86: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800bf8a: 699b ldr r3, [r3, #24]
800bf8c: 2b00 cmp r3, #0
800bf8e: d00d beq.n 800bfac <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800bf90: 68fb ldr r3, [r7, #12]
800bf92: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
800bf96: 2b03 cmp r3, #3
800bf98: d108 bne.n 800bfac <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
800bf9a: 68fb ldr r3, [r7, #12]
800bf9c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800bfa0: 699b ldr r3, [r3, #24]
800bfa2: 7afa ldrb r2, [r7, #11]
800bfa4: 4611 mov r1, r2
800bfa6: 68f8 ldr r0, [r7, #12]
800bfa8: 4798 blx r3
800bfaa: e001 b.n 800bfb0 <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800bfac: 2302 movs r3, #2
800bfae: e000 b.n 800bfb2 <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800bfb0: 2300 movs r3, #0
}
800bfb2: 4618 mov r0, r3
800bfb4: 3718 adds r7, #24
800bfb6: 46bd mov sp, r7
800bfb8: bd80 pop {r7, pc}
0800bfba <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800bfba: b580 push {r7, lr}
800bfbc: b086 sub sp, #24
800bfbe: af00 add r7, sp, #0
800bfc0: 60f8 str r0, [r7, #12]
800bfc2: 460b mov r3, r1
800bfc4: 607a str r2, [r7, #4]
800bfc6: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800bfc8: 7afb ldrb r3, [r7, #11]
800bfca: 2b00 cmp r3, #0
800bfcc: d17f bne.n 800c0ce <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
800bfce: 68fb ldr r3, [r7, #12]
800bfd0: 3314 adds r3, #20
800bfd2: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800bfd4: 68fb ldr r3, [r7, #12]
800bfd6: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800bfda: 2b02 cmp r3, #2
800bfdc: d15c bne.n 800c098 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
800bfde: 697b ldr r3, [r7, #20]
800bfe0: 68da ldr r2, [r3, #12]
800bfe2: 697b ldr r3, [r7, #20]
800bfe4: 691b ldr r3, [r3, #16]
800bfe6: 429a cmp r2, r3
800bfe8: d915 bls.n 800c016 <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
800bfea: 697b ldr r3, [r7, #20]
800bfec: 68da ldr r2, [r3, #12]
800bfee: 697b ldr r3, [r7, #20]
800bff0: 691b ldr r3, [r3, #16]
800bff2: 1ad2 subs r2, r2, r3
800bff4: 697b ldr r3, [r7, #20]
800bff6: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
800bff8: 697b ldr r3, [r7, #20]
800bffa: 68db ldr r3, [r3, #12]
800bffc: b29b uxth r3, r3
800bffe: 461a mov r2, r3
800c000: 6879 ldr r1, [r7, #4]
800c002: 68f8 ldr r0, [r7, #12]
800c004: f000 febe bl 800cd84 <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800c008: 2300 movs r3, #0
800c00a: 2200 movs r2, #0
800c00c: 2100 movs r1, #0
800c00e: 68f8 ldr r0, [r7, #12]
800c010: f001 fbb7 bl 800d782 <USBD_LL_PrepareReceive>
800c014: e04e b.n 800c0b4 <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800c016: 697b ldr r3, [r7, #20]
800c018: 689b ldr r3, [r3, #8]
800c01a: 697a ldr r2, [r7, #20]
800c01c: 6912 ldr r2, [r2, #16]
800c01e: fbb3 f1f2 udiv r1, r3, r2
800c022: fb01 f202 mul.w r2, r1, r2
800c026: 1a9b subs r3, r3, r2
800c028: 2b00 cmp r3, #0
800c02a: d11c bne.n 800c066 <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800c02c: 697b ldr r3, [r7, #20]
800c02e: 689a ldr r2, [r3, #8]
800c030: 697b ldr r3, [r7, #20]
800c032: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
800c034: 429a cmp r2, r3
800c036: d316 bcc.n 800c066 <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
800c038: 697b ldr r3, [r7, #20]
800c03a: 689a ldr r2, [r3, #8]
800c03c: 68fb ldr r3, [r7, #12]
800c03e: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800c042: 429a cmp r2, r3
800c044: d20f bcs.n 800c066 <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
800c046: 2200 movs r2, #0
800c048: 2100 movs r1, #0
800c04a: 68f8 ldr r0, [r7, #12]
800c04c: f000 fe9a bl 800cd84 <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800c050: 68fb ldr r3, [r7, #12]
800c052: 2200 movs r2, #0
800c054: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800c058: 2300 movs r3, #0
800c05a: 2200 movs r2, #0
800c05c: 2100 movs r1, #0
800c05e: 68f8 ldr r0, [r7, #12]
800c060: f001 fb8f bl 800d782 <USBD_LL_PrepareReceive>
800c064: e026 b.n 800c0b4 <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
800c066: 68fb ldr r3, [r7, #12]
800c068: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c06c: 68db ldr r3, [r3, #12]
800c06e: 2b00 cmp r3, #0
800c070: d00a beq.n 800c088 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c072: 68fb ldr r3, [r7, #12]
800c074: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
800c078: 2b03 cmp r3, #3
800c07a: d105 bne.n 800c088 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
800c07c: 68fb ldr r3, [r7, #12]
800c07e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c082: 68db ldr r3, [r3, #12]
800c084: 68f8 ldr r0, [r7, #12]
800c086: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
800c088: 2180 movs r1, #128 @ 0x80
800c08a: 68f8 ldr r0, [r7, #12]
800c08c: f001 face bl 800d62c <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800c090: 68f8 ldr r0, [r7, #12]
800c092: f000 fecc bl 800ce2e <USBD_CtlReceiveStatus>
800c096: e00d b.n 800c0b4 <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800c098: 68fb ldr r3, [r7, #12]
800c09a: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c09e: 2b04 cmp r3, #4
800c0a0: d004 beq.n 800c0ac <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
800c0a2: 68fb ldr r3, [r7, #12]
800c0a4: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800c0a8: 2b00 cmp r3, #0
800c0aa: d103 bne.n 800c0b4 <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800c0ac: 2180 movs r1, #128 @ 0x80
800c0ae: 68f8 ldr r0, [r7, #12]
800c0b0: f001 fabc bl 800d62c <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
800c0b4: 68fb ldr r3, [r7, #12]
800c0b6: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800c0ba: 2b01 cmp r3, #1
800c0bc: d11d bne.n 800c0fa <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800c0be: 68f8 ldr r0, [r7, #12]
800c0c0: f7ff fe81 bl 800bdc6 <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800c0c4: 68fb ldr r3, [r7, #12]
800c0c6: 2200 movs r2, #0
800c0c8: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
800c0cc: e015 b.n 800c0fa <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800c0ce: 68fb ldr r3, [r7, #12]
800c0d0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c0d4: 695b ldr r3, [r3, #20]
800c0d6: 2b00 cmp r3, #0
800c0d8: d00d beq.n 800c0f6 <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c0da: 68fb ldr r3, [r7, #12]
800c0dc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800c0e0: 2b03 cmp r3, #3
800c0e2: d108 bne.n 800c0f6 <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
800c0e4: 68fb ldr r3, [r7, #12]
800c0e6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c0ea: 695b ldr r3, [r3, #20]
800c0ec: 7afa ldrb r2, [r7, #11]
800c0ee: 4611 mov r1, r2
800c0f0: 68f8 ldr r0, [r7, #12]
800c0f2: 4798 blx r3
800c0f4: e001 b.n 800c0fa <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800c0f6: 2302 movs r3, #2
800c0f8: e000 b.n 800c0fc <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
800c0fa: 2300 movs r3, #0
}
800c0fc: 4618 mov r0, r3
800c0fe: 3718 adds r7, #24
800c100: 46bd mov sp, r7
800c102: bd80 pop {r7, pc}
0800c104 <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800c104: b580 push {r7, lr}
800c106: b082 sub sp, #8
800c108: af00 add r7, sp, #0
800c10a: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800c10c: 2340 movs r3, #64 @ 0x40
800c10e: 2200 movs r2, #0
800c110: 2100 movs r1, #0
800c112: 6878 ldr r0, [r7, #4]
800c114: f001 fa45 bl 800d5a2 <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800c118: 687b ldr r3, [r7, #4]
800c11a: 2201 movs r2, #1
800c11c: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800c120: 687b ldr r3, [r7, #4]
800c122: 2240 movs r2, #64 @ 0x40
800c124: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800c128: 2340 movs r3, #64 @ 0x40
800c12a: 2200 movs r2, #0
800c12c: 2180 movs r1, #128 @ 0x80
800c12e: 6878 ldr r0, [r7, #4]
800c130: f001 fa37 bl 800d5a2 <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800c134: 687b ldr r3, [r7, #4]
800c136: 2201 movs r2, #1
800c138: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
800c13a: 687b ldr r3, [r7, #4]
800c13c: 2240 movs r2, #64 @ 0x40
800c13e: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800c140: 687b ldr r3, [r7, #4]
800c142: 2201 movs r2, #1
800c144: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
800c148: 687b ldr r3, [r7, #4]
800c14a: 2200 movs r2, #0
800c14c: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
800c150: 687b ldr r3, [r7, #4]
800c152: 2200 movs r2, #0
800c154: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800c156: 687b ldr r3, [r7, #4]
800c158: 2200 movs r2, #0
800c15a: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
800c15e: 687b ldr r3, [r7, #4]
800c160: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c164: 2b00 cmp r3, #0
800c166: d009 beq.n 800c17c <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
800c168: 687b ldr r3, [r7, #4]
800c16a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c16e: 685b ldr r3, [r3, #4]
800c170: 687a ldr r2, [r7, #4]
800c172: 6852 ldr r2, [r2, #4]
800c174: b2d2 uxtb r2, r2
800c176: 4611 mov r1, r2
800c178: 6878 ldr r0, [r7, #4]
800c17a: 4798 blx r3
}
return USBD_OK;
800c17c: 2300 movs r3, #0
}
800c17e: 4618 mov r0, r3
800c180: 3708 adds r7, #8
800c182: 46bd mov sp, r7
800c184: bd80 pop {r7, pc}
0800c186 <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
800c186: b480 push {r7}
800c188: b083 sub sp, #12
800c18a: af00 add r7, sp, #0
800c18c: 6078 str r0, [r7, #4]
800c18e: 460b mov r3, r1
800c190: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800c192: 687b ldr r3, [r7, #4]
800c194: 78fa ldrb r2, [r7, #3]
800c196: 741a strb r2, [r3, #16]
return USBD_OK;
800c198: 2300 movs r3, #0
}
800c19a: 4618 mov r0, r3
800c19c: 370c adds r7, #12
800c19e: 46bd mov sp, r7
800c1a0: bc80 pop {r7}
800c1a2: 4770 bx lr
0800c1a4 <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
800c1a4: b480 push {r7}
800c1a6: b083 sub sp, #12
800c1a8: af00 add r7, sp, #0
800c1aa: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
800c1ac: 687b ldr r3, [r7, #4]
800c1ae: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
800c1b2: 687b ldr r3, [r7, #4]
800c1b4: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
800c1b8: 687b ldr r3, [r7, #4]
800c1ba: 2204 movs r2, #4
800c1bc: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800c1c0: 2300 movs r3, #0
}
800c1c2: 4618 mov r0, r3
800c1c4: 370c adds r7, #12
800c1c6: 46bd mov sp, r7
800c1c8: bc80 pop {r7}
800c1ca: 4770 bx lr
0800c1cc <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800c1cc: b480 push {r7}
800c1ce: b083 sub sp, #12
800c1d0: af00 add r7, sp, #0
800c1d2: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
800c1d4: 687b ldr r3, [r7, #4]
800c1d6: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c1da: 2b04 cmp r3, #4
800c1dc: d105 bne.n 800c1ea <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800c1de: 687b ldr r3, [r7, #4]
800c1e0: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
800c1e4: 687b ldr r3, [r7, #4]
800c1e6: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800c1ea: 2300 movs r3, #0
}
800c1ec: 4618 mov r0, r3
800c1ee: 370c adds r7, #12
800c1f0: 46bd mov sp, r7
800c1f2: bc80 pop {r7}
800c1f4: 4770 bx lr
0800c1f6 <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800c1f6: b580 push {r7, lr}
800c1f8: b082 sub sp, #8
800c1fa: af00 add r7, sp, #0
800c1fc: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c1fe: 687b ldr r3, [r7, #4]
800c200: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c204: 2b03 cmp r3, #3
800c206: d10b bne.n 800c220 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800c208: 687b ldr r3, [r7, #4]
800c20a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c20e: 69db ldr r3, [r3, #28]
800c210: 2b00 cmp r3, #0
800c212: d005 beq.n 800c220 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
800c214: 687b ldr r3, [r7, #4]
800c216: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c21a: 69db ldr r3, [r3, #28]
800c21c: 6878 ldr r0, [r7, #4]
800c21e: 4798 blx r3
}
}
return USBD_OK;
800c220: 2300 movs r3, #0
}
800c222: 4618 mov r0, r3
800c224: 3708 adds r7, #8
800c226: 46bd mov sp, r7
800c228: bd80 pop {r7, pc}
...
0800c22c <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c22c: b580 push {r7, lr}
800c22e: b084 sub sp, #16
800c230: af00 add r7, sp, #0
800c232: 6078 str r0, [r7, #4]
800c234: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800c236: 2300 movs r3, #0
800c238: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c23a: 683b ldr r3, [r7, #0]
800c23c: 781b ldrb r3, [r3, #0]
800c23e: f003 0360 and.w r3, r3, #96 @ 0x60
800c242: 2b40 cmp r3, #64 @ 0x40
800c244: d005 beq.n 800c252 <USBD_StdDevReq+0x26>
800c246: 2b40 cmp r3, #64 @ 0x40
800c248: d84f bhi.n 800c2ea <USBD_StdDevReq+0xbe>
800c24a: 2b00 cmp r3, #0
800c24c: d009 beq.n 800c262 <USBD_StdDevReq+0x36>
800c24e: 2b20 cmp r3, #32
800c250: d14b bne.n 800c2ea <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800c252: 687b ldr r3, [r7, #4]
800c254: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c258: 689b ldr r3, [r3, #8]
800c25a: 6839 ldr r1, [r7, #0]
800c25c: 6878 ldr r0, [r7, #4]
800c25e: 4798 blx r3
break;
800c260: e048 b.n 800c2f4 <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800c262: 683b ldr r3, [r7, #0]
800c264: 785b ldrb r3, [r3, #1]
800c266: 2b09 cmp r3, #9
800c268: d839 bhi.n 800c2de <USBD_StdDevReq+0xb2>
800c26a: a201 add r2, pc, #4 @ (adr r2, 800c270 <USBD_StdDevReq+0x44>)
800c26c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c270: 0800c2c1 .word 0x0800c2c1
800c274: 0800c2d5 .word 0x0800c2d5
800c278: 0800c2df .word 0x0800c2df
800c27c: 0800c2cb .word 0x0800c2cb
800c280: 0800c2df .word 0x0800c2df
800c284: 0800c2a3 .word 0x0800c2a3
800c288: 0800c299 .word 0x0800c299
800c28c: 0800c2df .word 0x0800c2df
800c290: 0800c2b7 .word 0x0800c2b7
800c294: 0800c2ad .word 0x0800c2ad
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800c298: 6839 ldr r1, [r7, #0]
800c29a: 6878 ldr r0, [r7, #4]
800c29c: f000 f9dc bl 800c658 <USBD_GetDescriptor>
break;
800c2a0: e022 b.n 800c2e8 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800c2a2: 6839 ldr r1, [r7, #0]
800c2a4: 6878 ldr r0, [r7, #4]
800c2a6: f000 fb3f bl 800c928 <USBD_SetAddress>
break;
800c2aa: e01d b.n 800c2e8 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
800c2ac: 6839 ldr r1, [r7, #0]
800c2ae: 6878 ldr r0, [r7, #4]
800c2b0: f000 fb7e bl 800c9b0 <USBD_SetConfig>
break;
800c2b4: e018 b.n 800c2e8 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800c2b6: 6839 ldr r1, [r7, #0]
800c2b8: 6878 ldr r0, [r7, #4]
800c2ba: f000 fc07 bl 800cacc <USBD_GetConfig>
break;
800c2be: e013 b.n 800c2e8 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800c2c0: 6839 ldr r1, [r7, #0]
800c2c2: 6878 ldr r0, [r7, #4]
800c2c4: f000 fc37 bl 800cb36 <USBD_GetStatus>
break;
800c2c8: e00e b.n 800c2e8 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800c2ca: 6839 ldr r1, [r7, #0]
800c2cc: 6878 ldr r0, [r7, #4]
800c2ce: f000 fc65 bl 800cb9c <USBD_SetFeature>
break;
800c2d2: e009 b.n 800c2e8 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
800c2d4: 6839 ldr r1, [r7, #0]
800c2d6: 6878 ldr r0, [r7, #4]
800c2d8: f000 fc74 bl 800cbc4 <USBD_ClrFeature>
break;
800c2dc: e004 b.n 800c2e8 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800c2de: 6839 ldr r1, [r7, #0]
800c2e0: 6878 ldr r0, [r7, #4]
800c2e2: f000 fcc9 bl 800cc78 <USBD_CtlError>
break;
800c2e6: bf00 nop
}
break;
800c2e8: e004 b.n 800c2f4 <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800c2ea: 6839 ldr r1, [r7, #0]
800c2ec: 6878 ldr r0, [r7, #4]
800c2ee: f000 fcc3 bl 800cc78 <USBD_CtlError>
break;
800c2f2: bf00 nop
}
return ret;
800c2f4: 7bfb ldrb r3, [r7, #15]
}
800c2f6: 4618 mov r0, r3
800c2f8: 3710 adds r7, #16
800c2fa: 46bd mov sp, r7
800c2fc: bd80 pop {r7, pc}
800c2fe: bf00 nop
0800c300 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c300: b580 push {r7, lr}
800c302: b084 sub sp, #16
800c304: af00 add r7, sp, #0
800c306: 6078 str r0, [r7, #4]
800c308: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800c30a: 2300 movs r3, #0
800c30c: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c30e: 683b ldr r3, [r7, #0]
800c310: 781b ldrb r3, [r3, #0]
800c312: f003 0360 and.w r3, r3, #96 @ 0x60
800c316: 2b40 cmp r3, #64 @ 0x40
800c318: d005 beq.n 800c326 <USBD_StdItfReq+0x26>
800c31a: 2b40 cmp r3, #64 @ 0x40
800c31c: d82e bhi.n 800c37c <USBD_StdItfReq+0x7c>
800c31e: 2b00 cmp r3, #0
800c320: d001 beq.n 800c326 <USBD_StdItfReq+0x26>
800c322: 2b20 cmp r3, #32
800c324: d12a bne.n 800c37c <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800c326: 687b ldr r3, [r7, #4]
800c328: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c32c: 3b01 subs r3, #1
800c32e: 2b02 cmp r3, #2
800c330: d81d bhi.n 800c36e <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
800c332: 683b ldr r3, [r7, #0]
800c334: 889b ldrh r3, [r3, #4]
800c336: b2db uxtb r3, r3
800c338: 2b01 cmp r3, #1
800c33a: d813 bhi.n 800c364 <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800c33c: 687b ldr r3, [r7, #4]
800c33e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c342: 689b ldr r3, [r3, #8]
800c344: 6839 ldr r1, [r7, #0]
800c346: 6878 ldr r0, [r7, #4]
800c348: 4798 blx r3
800c34a: 4603 mov r3, r0
800c34c: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800c34e: 683b ldr r3, [r7, #0]
800c350: 88db ldrh r3, [r3, #6]
800c352: 2b00 cmp r3, #0
800c354: d110 bne.n 800c378 <USBD_StdItfReq+0x78>
800c356: 7bfb ldrb r3, [r7, #15]
800c358: 2b00 cmp r3, #0
800c35a: d10d bne.n 800c378 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
800c35c: 6878 ldr r0, [r7, #4]
800c35e: f000 fd53 bl 800ce08 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800c362: e009 b.n 800c378 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
800c364: 6839 ldr r1, [r7, #0]
800c366: 6878 ldr r0, [r7, #4]
800c368: f000 fc86 bl 800cc78 <USBD_CtlError>
break;
800c36c: e004 b.n 800c378 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
800c36e: 6839 ldr r1, [r7, #0]
800c370: 6878 ldr r0, [r7, #4]
800c372: f000 fc81 bl 800cc78 <USBD_CtlError>
break;
800c376: e000 b.n 800c37a <USBD_StdItfReq+0x7a>
break;
800c378: bf00 nop
}
break;
800c37a: e004 b.n 800c386 <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
800c37c: 6839 ldr r1, [r7, #0]
800c37e: 6878 ldr r0, [r7, #4]
800c380: f000 fc7a bl 800cc78 <USBD_CtlError>
break;
800c384: bf00 nop
}
return USBD_OK;
800c386: 2300 movs r3, #0
}
800c388: 4618 mov r0, r3
800c38a: 3710 adds r7, #16
800c38c: 46bd mov sp, r7
800c38e: bd80 pop {r7, pc}
0800c390 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c390: b580 push {r7, lr}
800c392: b084 sub sp, #16
800c394: af00 add r7, sp, #0
800c396: 6078 str r0, [r7, #4]
800c398: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
800c39a: 2300 movs r3, #0
800c39c: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800c39e: 683b ldr r3, [r7, #0]
800c3a0: 889b ldrh r3, [r3, #4]
800c3a2: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c3a4: 683b ldr r3, [r7, #0]
800c3a6: 781b ldrb r3, [r3, #0]
800c3a8: f003 0360 and.w r3, r3, #96 @ 0x60
800c3ac: 2b40 cmp r3, #64 @ 0x40
800c3ae: d007 beq.n 800c3c0 <USBD_StdEPReq+0x30>
800c3b0: 2b40 cmp r3, #64 @ 0x40
800c3b2: f200 8146 bhi.w 800c642 <USBD_StdEPReq+0x2b2>
800c3b6: 2b00 cmp r3, #0
800c3b8: d00a beq.n 800c3d0 <USBD_StdEPReq+0x40>
800c3ba: 2b20 cmp r3, #32
800c3bc: f040 8141 bne.w 800c642 <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800c3c0: 687b ldr r3, [r7, #4]
800c3c2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c3c6: 689b ldr r3, [r3, #8]
800c3c8: 6839 ldr r1, [r7, #0]
800c3ca: 6878 ldr r0, [r7, #4]
800c3cc: 4798 blx r3
break;
800c3ce: e13d b.n 800c64c <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
800c3d0: 683b ldr r3, [r7, #0]
800c3d2: 781b ldrb r3, [r3, #0]
800c3d4: f003 0360 and.w r3, r3, #96 @ 0x60
800c3d8: 2b20 cmp r3, #32
800c3da: d10a bne.n 800c3f2 <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800c3dc: 687b ldr r3, [r7, #4]
800c3de: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c3e2: 689b ldr r3, [r3, #8]
800c3e4: 6839 ldr r1, [r7, #0]
800c3e6: 6878 ldr r0, [r7, #4]
800c3e8: 4798 blx r3
800c3ea: 4603 mov r3, r0
800c3ec: 73fb strb r3, [r7, #15]
return ret;
800c3ee: 7bfb ldrb r3, [r7, #15]
800c3f0: e12d b.n 800c64e <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
800c3f2: 683b ldr r3, [r7, #0]
800c3f4: 785b ldrb r3, [r3, #1]
800c3f6: 2b03 cmp r3, #3
800c3f8: d007 beq.n 800c40a <USBD_StdEPReq+0x7a>
800c3fa: 2b03 cmp r3, #3
800c3fc: f300 811b bgt.w 800c636 <USBD_StdEPReq+0x2a6>
800c400: 2b00 cmp r3, #0
800c402: d072 beq.n 800c4ea <USBD_StdEPReq+0x15a>
800c404: 2b01 cmp r3, #1
800c406: d03a beq.n 800c47e <USBD_StdEPReq+0xee>
800c408: e115 b.n 800c636 <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800c40a: 687b ldr r3, [r7, #4]
800c40c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c410: 2b02 cmp r3, #2
800c412: d002 beq.n 800c41a <USBD_StdEPReq+0x8a>
800c414: 2b03 cmp r3, #3
800c416: d015 beq.n 800c444 <USBD_StdEPReq+0xb4>
800c418: e02b b.n 800c472 <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800c41a: 7bbb ldrb r3, [r7, #14]
800c41c: 2b00 cmp r3, #0
800c41e: d00c beq.n 800c43a <USBD_StdEPReq+0xaa>
800c420: 7bbb ldrb r3, [r7, #14]
800c422: 2b80 cmp r3, #128 @ 0x80
800c424: d009 beq.n 800c43a <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800c426: 7bbb ldrb r3, [r7, #14]
800c428: 4619 mov r1, r3
800c42a: 6878 ldr r0, [r7, #4]
800c42c: f001 f8fe bl 800d62c <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800c430: 2180 movs r1, #128 @ 0x80
800c432: 6878 ldr r0, [r7, #4]
800c434: f001 f8fa bl 800d62c <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800c438: e020 b.n 800c47c <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800c43a: 6839 ldr r1, [r7, #0]
800c43c: 6878 ldr r0, [r7, #4]
800c43e: f000 fc1b bl 800cc78 <USBD_CtlError>
break;
800c442: e01b b.n 800c47c <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800c444: 683b ldr r3, [r7, #0]
800c446: 885b ldrh r3, [r3, #2]
800c448: 2b00 cmp r3, #0
800c44a: d10e bne.n 800c46a <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
800c44c: 7bbb ldrb r3, [r7, #14]
800c44e: 2b00 cmp r3, #0
800c450: d00b beq.n 800c46a <USBD_StdEPReq+0xda>
800c452: 7bbb ldrb r3, [r7, #14]
800c454: 2b80 cmp r3, #128 @ 0x80
800c456: d008 beq.n 800c46a <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800c458: 683b ldr r3, [r7, #0]
800c45a: 88db ldrh r3, [r3, #6]
800c45c: 2b00 cmp r3, #0
800c45e: d104 bne.n 800c46a <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
800c460: 7bbb ldrb r3, [r7, #14]
800c462: 4619 mov r1, r3
800c464: 6878 ldr r0, [r7, #4]
800c466: f001 f8e1 bl 800d62c <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800c46a: 6878 ldr r0, [r7, #4]
800c46c: f000 fccc bl 800ce08 <USBD_CtlSendStatus>
break;
800c470: e004 b.n 800c47c <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
800c472: 6839 ldr r1, [r7, #0]
800c474: 6878 ldr r0, [r7, #4]
800c476: f000 fbff bl 800cc78 <USBD_CtlError>
break;
800c47a: bf00 nop
}
break;
800c47c: e0e0 b.n 800c640 <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800c47e: 687b ldr r3, [r7, #4]
800c480: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c484: 2b02 cmp r3, #2
800c486: d002 beq.n 800c48e <USBD_StdEPReq+0xfe>
800c488: 2b03 cmp r3, #3
800c48a: d015 beq.n 800c4b8 <USBD_StdEPReq+0x128>
800c48c: e026 b.n 800c4dc <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800c48e: 7bbb ldrb r3, [r7, #14]
800c490: 2b00 cmp r3, #0
800c492: d00c beq.n 800c4ae <USBD_StdEPReq+0x11e>
800c494: 7bbb ldrb r3, [r7, #14]
800c496: 2b80 cmp r3, #128 @ 0x80
800c498: d009 beq.n 800c4ae <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
800c49a: 7bbb ldrb r3, [r7, #14]
800c49c: 4619 mov r1, r3
800c49e: 6878 ldr r0, [r7, #4]
800c4a0: f001 f8c4 bl 800d62c <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800c4a4: 2180 movs r1, #128 @ 0x80
800c4a6: 6878 ldr r0, [r7, #4]
800c4a8: f001 f8c0 bl 800d62c <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800c4ac: e01c b.n 800c4e8 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
800c4ae: 6839 ldr r1, [r7, #0]
800c4b0: 6878 ldr r0, [r7, #4]
800c4b2: f000 fbe1 bl 800cc78 <USBD_CtlError>
break;
800c4b6: e017 b.n 800c4e8 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800c4b8: 683b ldr r3, [r7, #0]
800c4ba: 885b ldrh r3, [r3, #2]
800c4bc: 2b00 cmp r3, #0
800c4be: d112 bne.n 800c4e6 <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
800c4c0: 7bbb ldrb r3, [r7, #14]
800c4c2: f003 037f and.w r3, r3, #127 @ 0x7f
800c4c6: 2b00 cmp r3, #0
800c4c8: d004 beq.n 800c4d4 <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
800c4ca: 7bbb ldrb r3, [r7, #14]
800c4cc: 4619 mov r1, r3
800c4ce: 6878 ldr r0, [r7, #4]
800c4d0: f001 f8cb bl 800d66a <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
800c4d4: 6878 ldr r0, [r7, #4]
800c4d6: f000 fc97 bl 800ce08 <USBD_CtlSendStatus>
}
break;
800c4da: e004 b.n 800c4e6 <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
800c4dc: 6839 ldr r1, [r7, #0]
800c4de: 6878 ldr r0, [r7, #4]
800c4e0: f000 fbca bl 800cc78 <USBD_CtlError>
break;
800c4e4: e000 b.n 800c4e8 <USBD_StdEPReq+0x158>
break;
800c4e6: bf00 nop
}
break;
800c4e8: e0aa b.n 800c640 <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800c4ea: 687b ldr r3, [r7, #4]
800c4ec: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c4f0: 2b02 cmp r3, #2
800c4f2: d002 beq.n 800c4fa <USBD_StdEPReq+0x16a>
800c4f4: 2b03 cmp r3, #3
800c4f6: d032 beq.n 800c55e <USBD_StdEPReq+0x1ce>
800c4f8: e097 b.n 800c62a <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800c4fa: 7bbb ldrb r3, [r7, #14]
800c4fc: 2b00 cmp r3, #0
800c4fe: d007 beq.n 800c510 <USBD_StdEPReq+0x180>
800c500: 7bbb ldrb r3, [r7, #14]
800c502: 2b80 cmp r3, #128 @ 0x80
800c504: d004 beq.n 800c510 <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
800c506: 6839 ldr r1, [r7, #0]
800c508: 6878 ldr r0, [r7, #4]
800c50a: f000 fbb5 bl 800cc78 <USBD_CtlError>
break;
800c50e: e091 b.n 800c634 <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800c510: f997 300e ldrsb.w r3, [r7, #14]
800c514: 2b00 cmp r3, #0
800c516: da0b bge.n 800c530 <USBD_StdEPReq+0x1a0>
800c518: 7bbb ldrb r3, [r7, #14]
800c51a: f003 027f and.w r2, r3, #127 @ 0x7f
800c51e: 4613 mov r3, r2
800c520: 009b lsls r3, r3, #2
800c522: 4413 add r3, r2
800c524: 009b lsls r3, r3, #2
800c526: 3310 adds r3, #16
800c528: 687a ldr r2, [r7, #4]
800c52a: 4413 add r3, r2
800c52c: 3304 adds r3, #4
800c52e: e00b b.n 800c548 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
800c530: 7bbb ldrb r3, [r7, #14]
800c532: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800c536: 4613 mov r3, r2
800c538: 009b lsls r3, r3, #2
800c53a: 4413 add r3, r2
800c53c: 009b lsls r3, r3, #2
800c53e: f503 73a8 add.w r3, r3, #336 @ 0x150
800c542: 687a ldr r2, [r7, #4]
800c544: 4413 add r3, r2
800c546: 3304 adds r3, #4
800c548: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800c54a: 68bb ldr r3, [r7, #8]
800c54c: 2200 movs r2, #0
800c54e: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800c550: 68bb ldr r3, [r7, #8]
800c552: 2202 movs r2, #2
800c554: 4619 mov r1, r3
800c556: 6878 ldr r0, [r7, #4]
800c558: f000 fbf8 bl 800cd4c <USBD_CtlSendData>
break;
800c55c: e06a b.n 800c634 <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800c55e: f997 300e ldrsb.w r3, [r7, #14]
800c562: 2b00 cmp r3, #0
800c564: da11 bge.n 800c58a <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800c566: 7bbb ldrb r3, [r7, #14]
800c568: f003 020f and.w r2, r3, #15
800c56c: 6879 ldr r1, [r7, #4]
800c56e: 4613 mov r3, r2
800c570: 009b lsls r3, r3, #2
800c572: 4413 add r3, r2
800c574: 009b lsls r3, r3, #2
800c576: 440b add r3, r1
800c578: 3318 adds r3, #24
800c57a: 681b ldr r3, [r3, #0]
800c57c: 2b00 cmp r3, #0
800c57e: d117 bne.n 800c5b0 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800c580: 6839 ldr r1, [r7, #0]
800c582: 6878 ldr r0, [r7, #4]
800c584: f000 fb78 bl 800cc78 <USBD_CtlError>
break;
800c588: e054 b.n 800c634 <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800c58a: 7bbb ldrb r3, [r7, #14]
800c58c: f003 020f and.w r2, r3, #15
800c590: 6879 ldr r1, [r7, #4]
800c592: 4613 mov r3, r2
800c594: 009b lsls r3, r3, #2
800c596: 4413 add r3, r2
800c598: 009b lsls r3, r3, #2
800c59a: 440b add r3, r1
800c59c: f503 73ac add.w r3, r3, #344 @ 0x158
800c5a0: 681b ldr r3, [r3, #0]
800c5a2: 2b00 cmp r3, #0
800c5a4: d104 bne.n 800c5b0 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800c5a6: 6839 ldr r1, [r7, #0]
800c5a8: 6878 ldr r0, [r7, #4]
800c5aa: f000 fb65 bl 800cc78 <USBD_CtlError>
break;
800c5ae: e041 b.n 800c634 <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800c5b0: f997 300e ldrsb.w r3, [r7, #14]
800c5b4: 2b00 cmp r3, #0
800c5b6: da0b bge.n 800c5d0 <USBD_StdEPReq+0x240>
800c5b8: 7bbb ldrb r3, [r7, #14]
800c5ba: f003 027f and.w r2, r3, #127 @ 0x7f
800c5be: 4613 mov r3, r2
800c5c0: 009b lsls r3, r3, #2
800c5c2: 4413 add r3, r2
800c5c4: 009b lsls r3, r3, #2
800c5c6: 3310 adds r3, #16
800c5c8: 687a ldr r2, [r7, #4]
800c5ca: 4413 add r3, r2
800c5cc: 3304 adds r3, #4
800c5ce: e00b b.n 800c5e8 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
800c5d0: 7bbb ldrb r3, [r7, #14]
800c5d2: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800c5d6: 4613 mov r3, r2
800c5d8: 009b lsls r3, r3, #2
800c5da: 4413 add r3, r2
800c5dc: 009b lsls r3, r3, #2
800c5de: f503 73a8 add.w r3, r3, #336 @ 0x150
800c5e2: 687a ldr r2, [r7, #4]
800c5e4: 4413 add r3, r2
800c5e6: 3304 adds r3, #4
800c5e8: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800c5ea: 7bbb ldrb r3, [r7, #14]
800c5ec: 2b00 cmp r3, #0
800c5ee: d002 beq.n 800c5f6 <USBD_StdEPReq+0x266>
800c5f0: 7bbb ldrb r3, [r7, #14]
800c5f2: 2b80 cmp r3, #128 @ 0x80
800c5f4: d103 bne.n 800c5fe <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
800c5f6: 68bb ldr r3, [r7, #8]
800c5f8: 2200 movs r2, #0
800c5fa: 601a str r2, [r3, #0]
800c5fc: e00e b.n 800c61c <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800c5fe: 7bbb ldrb r3, [r7, #14]
800c600: 4619 mov r1, r3
800c602: 6878 ldr r0, [r7, #4]
800c604: f001 f850 bl 800d6a8 <USBD_LL_IsStallEP>
800c608: 4603 mov r3, r0
800c60a: 2b00 cmp r3, #0
800c60c: d003 beq.n 800c616 <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800c60e: 68bb ldr r3, [r7, #8]
800c610: 2201 movs r2, #1
800c612: 601a str r2, [r3, #0]
800c614: e002 b.n 800c61c <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
800c616: 68bb ldr r3, [r7, #8]
800c618: 2200 movs r2, #0
800c61a: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800c61c: 68bb ldr r3, [r7, #8]
800c61e: 2202 movs r2, #2
800c620: 4619 mov r1, r3
800c622: 6878 ldr r0, [r7, #4]
800c624: f000 fb92 bl 800cd4c <USBD_CtlSendData>
break;
800c628: e004 b.n 800c634 <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800c62a: 6839 ldr r1, [r7, #0]
800c62c: 6878 ldr r0, [r7, #4]
800c62e: f000 fb23 bl 800cc78 <USBD_CtlError>
break;
800c632: bf00 nop
}
break;
800c634: e004 b.n 800c640 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
800c636: 6839 ldr r1, [r7, #0]
800c638: 6878 ldr r0, [r7, #4]
800c63a: f000 fb1d bl 800cc78 <USBD_CtlError>
break;
800c63e: bf00 nop
}
break;
800c640: e004 b.n 800c64c <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
800c642: 6839 ldr r1, [r7, #0]
800c644: 6878 ldr r0, [r7, #4]
800c646: f000 fb17 bl 800cc78 <USBD_CtlError>
break;
800c64a: bf00 nop
}
return ret;
800c64c: 7bfb ldrb r3, [r7, #15]
}
800c64e: 4618 mov r0, r3
800c650: 3710 adds r7, #16
800c652: 46bd mov sp, r7
800c654: bd80 pop {r7, pc}
...
0800c658 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c658: b580 push {r7, lr}
800c65a: b084 sub sp, #16
800c65c: af00 add r7, sp, #0
800c65e: 6078 str r0, [r7, #4]
800c660: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800c662: 2300 movs r3, #0
800c664: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800c666: 2300 movs r3, #0
800c668: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800c66a: 2300 movs r3, #0
800c66c: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
800c66e: 683b ldr r3, [r7, #0]
800c670: 885b ldrh r3, [r3, #2]
800c672: 0a1b lsrs r3, r3, #8
800c674: b29b uxth r3, r3
800c676: 3b01 subs r3, #1
800c678: 2b06 cmp r3, #6
800c67a: f200 8128 bhi.w 800c8ce <USBD_GetDescriptor+0x276>
800c67e: a201 add r2, pc, #4 @ (adr r2, 800c684 <USBD_GetDescriptor+0x2c>)
800c680: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c684: 0800c6a1 .word 0x0800c6a1
800c688: 0800c6b9 .word 0x0800c6b9
800c68c: 0800c6f9 .word 0x0800c6f9
800c690: 0800c8cf .word 0x0800c8cf
800c694: 0800c8cf .word 0x0800c8cf
800c698: 0800c86f .word 0x0800c86f
800c69c: 0800c89b .word 0x0800c89b
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800c6a0: 687b ldr r3, [r7, #4]
800c6a2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c6a6: 681b ldr r3, [r3, #0]
800c6a8: 687a ldr r2, [r7, #4]
800c6aa: 7c12 ldrb r2, [r2, #16]
800c6ac: f107 0108 add.w r1, r7, #8
800c6b0: 4610 mov r0, r2
800c6b2: 4798 blx r3
800c6b4: 60f8 str r0, [r7, #12]
break;
800c6b6: e112 b.n 800c8de <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c6b8: 687b ldr r3, [r7, #4]
800c6ba: 7c1b ldrb r3, [r3, #16]
800c6bc: 2b00 cmp r3, #0
800c6be: d10d bne.n 800c6dc <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
800c6c0: 687b ldr r3, [r7, #4]
800c6c2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c6c6: 6a9b ldr r3, [r3, #40] @ 0x28
800c6c8: f107 0208 add.w r2, r7, #8
800c6cc: 4610 mov r0, r2
800c6ce: 4798 blx r3
800c6d0: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800c6d2: 68fb ldr r3, [r7, #12]
800c6d4: 3301 adds r3, #1
800c6d6: 2202 movs r2, #2
800c6d8: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800c6da: e100 b.n 800c8de <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
800c6dc: 687b ldr r3, [r7, #4]
800c6de: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c6e2: 6adb ldr r3, [r3, #44] @ 0x2c
800c6e4: f107 0208 add.w r2, r7, #8
800c6e8: 4610 mov r0, r2
800c6ea: 4798 blx r3
800c6ec: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800c6ee: 68fb ldr r3, [r7, #12]
800c6f0: 3301 adds r3, #1
800c6f2: 2202 movs r2, #2
800c6f4: 701a strb r2, [r3, #0]
break;
800c6f6: e0f2 b.n 800c8de <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800c6f8: 683b ldr r3, [r7, #0]
800c6fa: 885b ldrh r3, [r3, #2]
800c6fc: b2db uxtb r3, r3
800c6fe: 2b05 cmp r3, #5
800c700: f200 80ac bhi.w 800c85c <USBD_GetDescriptor+0x204>
800c704: a201 add r2, pc, #4 @ (adr r2, 800c70c <USBD_GetDescriptor+0xb4>)
800c706: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800c70a: bf00 nop
800c70c: 0800c725 .word 0x0800c725
800c710: 0800c759 .word 0x0800c759
800c714: 0800c78d .word 0x0800c78d
800c718: 0800c7c1 .word 0x0800c7c1
800c71c: 0800c7f5 .word 0x0800c7f5
800c720: 0800c829 .word 0x0800c829
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
800c724: 687b ldr r3, [r7, #4]
800c726: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c72a: 685b ldr r3, [r3, #4]
800c72c: 2b00 cmp r3, #0
800c72e: d00b beq.n 800c748 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800c730: 687b ldr r3, [r7, #4]
800c732: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c736: 685b ldr r3, [r3, #4]
800c738: 687a ldr r2, [r7, #4]
800c73a: 7c12 ldrb r2, [r2, #16]
800c73c: f107 0108 add.w r1, r7, #8
800c740: 4610 mov r0, r2
800c742: 4798 blx r3
800c744: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c746: e091 b.n 800c86c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c748: 6839 ldr r1, [r7, #0]
800c74a: 6878 ldr r0, [r7, #4]
800c74c: f000 fa94 bl 800cc78 <USBD_CtlError>
err++;
800c750: 7afb ldrb r3, [r7, #11]
800c752: 3301 adds r3, #1
800c754: 72fb strb r3, [r7, #11]
break;
800c756: e089 b.n 800c86c <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800c758: 687b ldr r3, [r7, #4]
800c75a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c75e: 689b ldr r3, [r3, #8]
800c760: 2b00 cmp r3, #0
800c762: d00b beq.n 800c77c <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
800c764: 687b ldr r3, [r7, #4]
800c766: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c76a: 689b ldr r3, [r3, #8]
800c76c: 687a ldr r2, [r7, #4]
800c76e: 7c12 ldrb r2, [r2, #16]
800c770: f107 0108 add.w r1, r7, #8
800c774: 4610 mov r0, r2
800c776: 4798 blx r3
800c778: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c77a: e077 b.n 800c86c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c77c: 6839 ldr r1, [r7, #0]
800c77e: 6878 ldr r0, [r7, #4]
800c780: f000 fa7a bl 800cc78 <USBD_CtlError>
err++;
800c784: 7afb ldrb r3, [r7, #11]
800c786: 3301 adds r3, #1
800c788: 72fb strb r3, [r7, #11]
break;
800c78a: e06f b.n 800c86c <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
800c78c: 687b ldr r3, [r7, #4]
800c78e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c792: 68db ldr r3, [r3, #12]
800c794: 2b00 cmp r3, #0
800c796: d00b beq.n 800c7b0 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
800c798: 687b ldr r3, [r7, #4]
800c79a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c79e: 68db ldr r3, [r3, #12]
800c7a0: 687a ldr r2, [r7, #4]
800c7a2: 7c12 ldrb r2, [r2, #16]
800c7a4: f107 0108 add.w r1, r7, #8
800c7a8: 4610 mov r0, r2
800c7aa: 4798 blx r3
800c7ac: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c7ae: e05d b.n 800c86c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c7b0: 6839 ldr r1, [r7, #0]
800c7b2: 6878 ldr r0, [r7, #4]
800c7b4: f000 fa60 bl 800cc78 <USBD_CtlError>
err++;
800c7b8: 7afb ldrb r3, [r7, #11]
800c7ba: 3301 adds r3, #1
800c7bc: 72fb strb r3, [r7, #11]
break;
800c7be: e055 b.n 800c86c <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800c7c0: 687b ldr r3, [r7, #4]
800c7c2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c7c6: 691b ldr r3, [r3, #16]
800c7c8: 2b00 cmp r3, #0
800c7ca: d00b beq.n 800c7e4 <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800c7cc: 687b ldr r3, [r7, #4]
800c7ce: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c7d2: 691b ldr r3, [r3, #16]
800c7d4: 687a ldr r2, [r7, #4]
800c7d6: 7c12 ldrb r2, [r2, #16]
800c7d8: f107 0108 add.w r1, r7, #8
800c7dc: 4610 mov r0, r2
800c7de: 4798 blx r3
800c7e0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c7e2: e043 b.n 800c86c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c7e4: 6839 ldr r1, [r7, #0]
800c7e6: 6878 ldr r0, [r7, #4]
800c7e8: f000 fa46 bl 800cc78 <USBD_CtlError>
err++;
800c7ec: 7afb ldrb r3, [r7, #11]
800c7ee: 3301 adds r3, #1
800c7f0: 72fb strb r3, [r7, #11]
break;
800c7f2: e03b b.n 800c86c <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800c7f4: 687b ldr r3, [r7, #4]
800c7f6: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c7fa: 695b ldr r3, [r3, #20]
800c7fc: 2b00 cmp r3, #0
800c7fe: d00b beq.n 800c818 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800c800: 687b ldr r3, [r7, #4]
800c802: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c806: 695b ldr r3, [r3, #20]
800c808: 687a ldr r2, [r7, #4]
800c80a: 7c12 ldrb r2, [r2, #16]
800c80c: f107 0108 add.w r1, r7, #8
800c810: 4610 mov r0, r2
800c812: 4798 blx r3
800c814: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c816: e029 b.n 800c86c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c818: 6839 ldr r1, [r7, #0]
800c81a: 6878 ldr r0, [r7, #4]
800c81c: f000 fa2c bl 800cc78 <USBD_CtlError>
err++;
800c820: 7afb ldrb r3, [r7, #11]
800c822: 3301 adds r3, #1
800c824: 72fb strb r3, [r7, #11]
break;
800c826: e021 b.n 800c86c <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800c828: 687b ldr r3, [r7, #4]
800c82a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c82e: 699b ldr r3, [r3, #24]
800c830: 2b00 cmp r3, #0
800c832: d00b beq.n 800c84c <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800c834: 687b ldr r3, [r7, #4]
800c836: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800c83a: 699b ldr r3, [r3, #24]
800c83c: 687a ldr r2, [r7, #4]
800c83e: 7c12 ldrb r2, [r2, #16]
800c840: f107 0108 add.w r1, r7, #8
800c844: 4610 mov r0, r2
800c846: 4798 blx r3
800c848: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c84a: e00f b.n 800c86c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800c84c: 6839 ldr r1, [r7, #0]
800c84e: 6878 ldr r0, [r7, #4]
800c850: f000 fa12 bl 800cc78 <USBD_CtlError>
err++;
800c854: 7afb ldrb r3, [r7, #11]
800c856: 3301 adds r3, #1
800c858: 72fb strb r3, [r7, #11]
break;
800c85a: e007 b.n 800c86c <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
800c85c: 6839 ldr r1, [r7, #0]
800c85e: 6878 ldr r0, [r7, #4]
800c860: f000 fa0a bl 800cc78 <USBD_CtlError>
err++;
800c864: 7afb ldrb r3, [r7, #11]
800c866: 3301 adds r3, #1
800c868: 72fb strb r3, [r7, #11]
#endif
}
break;
800c86a: e038 b.n 800c8de <USBD_GetDescriptor+0x286>
800c86c: e037 b.n 800c8de <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c86e: 687b ldr r3, [r7, #4]
800c870: 7c1b ldrb r3, [r3, #16]
800c872: 2b00 cmp r3, #0
800c874: d109 bne.n 800c88a <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800c876: 687b ldr r3, [r7, #4]
800c878: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c87c: 6b5b ldr r3, [r3, #52] @ 0x34
800c87e: f107 0208 add.w r2, r7, #8
800c882: 4610 mov r0, r2
800c884: 4798 blx r3
800c886: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c888: e029 b.n 800c8de <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800c88a: 6839 ldr r1, [r7, #0]
800c88c: 6878 ldr r0, [r7, #4]
800c88e: f000 f9f3 bl 800cc78 <USBD_CtlError>
err++;
800c892: 7afb ldrb r3, [r7, #11]
800c894: 3301 adds r3, #1
800c896: 72fb strb r3, [r7, #11]
break;
800c898: e021 b.n 800c8de <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c89a: 687b ldr r3, [r7, #4]
800c89c: 7c1b ldrb r3, [r3, #16]
800c89e: 2b00 cmp r3, #0
800c8a0: d10d bne.n 800c8be <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
800c8a2: 687b ldr r3, [r7, #4]
800c8a4: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c8a8: 6b1b ldr r3, [r3, #48] @ 0x30
800c8aa: f107 0208 add.w r2, r7, #8
800c8ae: 4610 mov r0, r2
800c8b0: 4798 blx r3
800c8b2: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
800c8b4: 68fb ldr r3, [r7, #12]
800c8b6: 3301 adds r3, #1
800c8b8: 2207 movs r2, #7
800c8ba: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800c8bc: e00f b.n 800c8de <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800c8be: 6839 ldr r1, [r7, #0]
800c8c0: 6878 ldr r0, [r7, #4]
800c8c2: f000 f9d9 bl 800cc78 <USBD_CtlError>
err++;
800c8c6: 7afb ldrb r3, [r7, #11]
800c8c8: 3301 adds r3, #1
800c8ca: 72fb strb r3, [r7, #11]
break;
800c8cc: e007 b.n 800c8de <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800c8ce: 6839 ldr r1, [r7, #0]
800c8d0: 6878 ldr r0, [r7, #4]
800c8d2: f000 f9d1 bl 800cc78 <USBD_CtlError>
err++;
800c8d6: 7afb ldrb r3, [r7, #11]
800c8d8: 3301 adds r3, #1
800c8da: 72fb strb r3, [r7, #11]
break;
800c8dc: bf00 nop
}
if (err != 0U)
800c8de: 7afb ldrb r3, [r7, #11]
800c8e0: 2b00 cmp r3, #0
800c8e2: d11c bne.n 800c91e <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
800c8e4: 893b ldrh r3, [r7, #8]
800c8e6: 2b00 cmp r3, #0
800c8e8: d011 beq.n 800c90e <USBD_GetDescriptor+0x2b6>
800c8ea: 683b ldr r3, [r7, #0]
800c8ec: 88db ldrh r3, [r3, #6]
800c8ee: 2b00 cmp r3, #0
800c8f0: d00d beq.n 800c90e <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800c8f2: 683b ldr r3, [r7, #0]
800c8f4: 88da ldrh r2, [r3, #6]
800c8f6: 893b ldrh r3, [r7, #8]
800c8f8: 4293 cmp r3, r2
800c8fa: bf28 it cs
800c8fc: 4613 movcs r3, r2
800c8fe: b29b uxth r3, r3
800c900: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800c902: 893b ldrh r3, [r7, #8]
800c904: 461a mov r2, r3
800c906: 68f9 ldr r1, [r7, #12]
800c908: 6878 ldr r0, [r7, #4]
800c90a: f000 fa1f bl 800cd4c <USBD_CtlSendData>
}
if (req->wLength == 0U)
800c90e: 683b ldr r3, [r7, #0]
800c910: 88db ldrh r3, [r3, #6]
800c912: 2b00 cmp r3, #0
800c914: d104 bne.n 800c920 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800c916: 6878 ldr r0, [r7, #4]
800c918: f000 fa76 bl 800ce08 <USBD_CtlSendStatus>
800c91c: e000 b.n 800c920 <USBD_GetDescriptor+0x2c8>
return;
800c91e: bf00 nop
}
}
}
800c920: 3710 adds r7, #16
800c922: 46bd mov sp, r7
800c924: bd80 pop {r7, pc}
800c926: bf00 nop
0800c928 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c928: b580 push {r7, lr}
800c92a: b084 sub sp, #16
800c92c: af00 add r7, sp, #0
800c92e: 6078 str r0, [r7, #4]
800c930: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800c932: 683b ldr r3, [r7, #0]
800c934: 889b ldrh r3, [r3, #4]
800c936: 2b00 cmp r3, #0
800c938: d130 bne.n 800c99c <USBD_SetAddress+0x74>
800c93a: 683b ldr r3, [r7, #0]
800c93c: 88db ldrh r3, [r3, #6]
800c93e: 2b00 cmp r3, #0
800c940: d12c bne.n 800c99c <USBD_SetAddress+0x74>
800c942: 683b ldr r3, [r7, #0]
800c944: 885b ldrh r3, [r3, #2]
800c946: 2b7f cmp r3, #127 @ 0x7f
800c948: d828 bhi.n 800c99c <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800c94a: 683b ldr r3, [r7, #0]
800c94c: 885b ldrh r3, [r3, #2]
800c94e: b2db uxtb r3, r3
800c950: f003 037f and.w r3, r3, #127 @ 0x7f
800c954: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c956: 687b ldr r3, [r7, #4]
800c958: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c95c: 2b03 cmp r3, #3
800c95e: d104 bne.n 800c96a <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
800c960: 6839 ldr r1, [r7, #0]
800c962: 6878 ldr r0, [r7, #4]
800c964: f000 f988 bl 800cc78 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c968: e01d b.n 800c9a6 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800c96a: 687b ldr r3, [r7, #4]
800c96c: 7bfa ldrb r2, [r7, #15]
800c96e: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
800c972: 7bfb ldrb r3, [r7, #15]
800c974: 4619 mov r1, r3
800c976: 6878 ldr r0, [r7, #4]
800c978: f000 fec1 bl 800d6fe <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
800c97c: 6878 ldr r0, [r7, #4]
800c97e: f000 fa43 bl 800ce08 <USBD_CtlSendStatus>
if (dev_addr != 0U)
800c982: 7bfb ldrb r3, [r7, #15]
800c984: 2b00 cmp r3, #0
800c986: d004 beq.n 800c992 <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800c988: 687b ldr r3, [r7, #4]
800c98a: 2202 movs r2, #2
800c98c: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c990: e009 b.n 800c9a6 <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800c992: 687b ldr r3, [r7, #4]
800c994: 2201 movs r2, #1
800c996: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c99a: e004 b.n 800c9a6 <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
800c99c: 6839 ldr r1, [r7, #0]
800c99e: 6878 ldr r0, [r7, #4]
800c9a0: f000 f96a bl 800cc78 <USBD_CtlError>
}
}
800c9a4: bf00 nop
800c9a6: bf00 nop
800c9a8: 3710 adds r7, #16
800c9aa: 46bd mov sp, r7
800c9ac: bd80 pop {r7, pc}
...
0800c9b0 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800c9b0: b580 push {r7, lr}
800c9b2: b082 sub sp, #8
800c9b4: af00 add r7, sp, #0
800c9b6: 6078 str r0, [r7, #4]
800c9b8: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800c9ba: 683b ldr r3, [r7, #0]
800c9bc: 885b ldrh r3, [r3, #2]
800c9be: b2da uxtb r2, r3
800c9c0: 4b41 ldr r3, [pc, #260] @ (800cac8 <USBD_SetConfig+0x118>)
800c9c2: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800c9c4: 4b40 ldr r3, [pc, #256] @ (800cac8 <USBD_SetConfig+0x118>)
800c9c6: 781b ldrb r3, [r3, #0]
800c9c8: 2b01 cmp r3, #1
800c9ca: d904 bls.n 800c9d6 <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
800c9cc: 6839 ldr r1, [r7, #0]
800c9ce: 6878 ldr r0, [r7, #4]
800c9d0: f000 f952 bl 800cc78 <USBD_CtlError>
800c9d4: e075 b.n 800cac2 <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800c9d6: 687b ldr r3, [r7, #4]
800c9d8: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c9dc: 2b02 cmp r3, #2
800c9de: d002 beq.n 800c9e6 <USBD_SetConfig+0x36>
800c9e0: 2b03 cmp r3, #3
800c9e2: d023 beq.n 800ca2c <USBD_SetConfig+0x7c>
800c9e4: e062 b.n 800caac <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800c9e6: 4b38 ldr r3, [pc, #224] @ (800cac8 <USBD_SetConfig+0x118>)
800c9e8: 781b ldrb r3, [r3, #0]
800c9ea: 2b00 cmp r3, #0
800c9ec: d01a beq.n 800ca24 <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800c9ee: 4b36 ldr r3, [pc, #216] @ (800cac8 <USBD_SetConfig+0x118>)
800c9f0: 781b ldrb r3, [r3, #0]
800c9f2: 461a mov r2, r3
800c9f4: 687b ldr r3, [r7, #4]
800c9f6: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800c9f8: 687b ldr r3, [r7, #4]
800c9fa: 2203 movs r2, #3
800c9fc: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800ca00: 4b31 ldr r3, [pc, #196] @ (800cac8 <USBD_SetConfig+0x118>)
800ca02: 781b ldrb r3, [r3, #0]
800ca04: 4619 mov r1, r3
800ca06: 6878 ldr r0, [r7, #4]
800ca08: f7ff f9e7 bl 800bdda <USBD_SetClassConfig>
800ca0c: 4603 mov r3, r0
800ca0e: 2b02 cmp r3, #2
800ca10: d104 bne.n 800ca1c <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800ca12: 6839 ldr r1, [r7, #0]
800ca14: 6878 ldr r0, [r7, #4]
800ca16: f000 f92f bl 800cc78 <USBD_CtlError>
return;
800ca1a: e052 b.n 800cac2 <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800ca1c: 6878 ldr r0, [r7, #4]
800ca1e: f000 f9f3 bl 800ce08 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800ca22: e04e b.n 800cac2 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800ca24: 6878 ldr r0, [r7, #4]
800ca26: f000 f9ef bl 800ce08 <USBD_CtlSendStatus>
break;
800ca2a: e04a b.n 800cac2 <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800ca2c: 4b26 ldr r3, [pc, #152] @ (800cac8 <USBD_SetConfig+0x118>)
800ca2e: 781b ldrb r3, [r3, #0]
800ca30: 2b00 cmp r3, #0
800ca32: d112 bne.n 800ca5a <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800ca34: 687b ldr r3, [r7, #4]
800ca36: 2202 movs r2, #2
800ca38: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800ca3c: 4b22 ldr r3, [pc, #136] @ (800cac8 <USBD_SetConfig+0x118>)
800ca3e: 781b ldrb r3, [r3, #0]
800ca40: 461a mov r2, r3
800ca42: 687b ldr r3, [r7, #4]
800ca44: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800ca46: 4b20 ldr r3, [pc, #128] @ (800cac8 <USBD_SetConfig+0x118>)
800ca48: 781b ldrb r3, [r3, #0]
800ca4a: 4619 mov r1, r3
800ca4c: 6878 ldr r0, [r7, #4]
800ca4e: f7ff f9e3 bl 800be18 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
800ca52: 6878 ldr r0, [r7, #4]
800ca54: f000 f9d8 bl 800ce08 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800ca58: e033 b.n 800cac2 <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800ca5a: 4b1b ldr r3, [pc, #108] @ (800cac8 <USBD_SetConfig+0x118>)
800ca5c: 781b ldrb r3, [r3, #0]
800ca5e: 461a mov r2, r3
800ca60: 687b ldr r3, [r7, #4]
800ca62: 685b ldr r3, [r3, #4]
800ca64: 429a cmp r2, r3
800ca66: d01d beq.n 800caa4 <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800ca68: 687b ldr r3, [r7, #4]
800ca6a: 685b ldr r3, [r3, #4]
800ca6c: b2db uxtb r3, r3
800ca6e: 4619 mov r1, r3
800ca70: 6878 ldr r0, [r7, #4]
800ca72: f7ff f9d1 bl 800be18 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800ca76: 4b14 ldr r3, [pc, #80] @ (800cac8 <USBD_SetConfig+0x118>)
800ca78: 781b ldrb r3, [r3, #0]
800ca7a: 461a mov r2, r3
800ca7c: 687b ldr r3, [r7, #4]
800ca7e: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800ca80: 4b11 ldr r3, [pc, #68] @ (800cac8 <USBD_SetConfig+0x118>)
800ca82: 781b ldrb r3, [r3, #0]
800ca84: 4619 mov r1, r3
800ca86: 6878 ldr r0, [r7, #4]
800ca88: f7ff f9a7 bl 800bdda <USBD_SetClassConfig>
800ca8c: 4603 mov r3, r0
800ca8e: 2b02 cmp r3, #2
800ca90: d104 bne.n 800ca9c <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
800ca92: 6839 ldr r1, [r7, #0]
800ca94: 6878 ldr r0, [r7, #4]
800ca96: f000 f8ef bl 800cc78 <USBD_CtlError>
return;
800ca9a: e012 b.n 800cac2 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800ca9c: 6878 ldr r0, [r7, #4]
800ca9e: f000 f9b3 bl 800ce08 <USBD_CtlSendStatus>
break;
800caa2: e00e b.n 800cac2 <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800caa4: 6878 ldr r0, [r7, #4]
800caa6: f000 f9af bl 800ce08 <USBD_CtlSendStatus>
break;
800caaa: e00a b.n 800cac2 <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
800caac: 6839 ldr r1, [r7, #0]
800caae: 6878 ldr r0, [r7, #4]
800cab0: f000 f8e2 bl 800cc78 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
800cab4: 4b04 ldr r3, [pc, #16] @ (800cac8 <USBD_SetConfig+0x118>)
800cab6: 781b ldrb r3, [r3, #0]
800cab8: 4619 mov r1, r3
800caba: 6878 ldr r0, [r7, #4]
800cabc: f7ff f9ac bl 800be18 <USBD_ClrClassConfig>
break;
800cac0: bf00 nop
}
}
}
800cac2: 3708 adds r7, #8
800cac4: 46bd mov sp, r7
800cac6: bd80 pop {r7, pc}
800cac8: 20000488 .word 0x20000488
0800cacc <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800cacc: b580 push {r7, lr}
800cace: b082 sub sp, #8
800cad0: af00 add r7, sp, #0
800cad2: 6078 str r0, [r7, #4]
800cad4: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800cad6: 683b ldr r3, [r7, #0]
800cad8: 88db ldrh r3, [r3, #6]
800cada: 2b01 cmp r3, #1
800cadc: d004 beq.n 800cae8 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800cade: 6839 ldr r1, [r7, #0]
800cae0: 6878 ldr r0, [r7, #4]
800cae2: f000 f8c9 bl 800cc78 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800cae6: e022 b.n 800cb2e <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800cae8: 687b ldr r3, [r7, #4]
800caea: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800caee: 2b02 cmp r3, #2
800caf0: dc02 bgt.n 800caf8 <USBD_GetConfig+0x2c>
800caf2: 2b00 cmp r3, #0
800caf4: dc03 bgt.n 800cafe <USBD_GetConfig+0x32>
800caf6: e015 b.n 800cb24 <USBD_GetConfig+0x58>
800caf8: 2b03 cmp r3, #3
800cafa: d00b beq.n 800cb14 <USBD_GetConfig+0x48>
800cafc: e012 b.n 800cb24 <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800cafe: 687b ldr r3, [r7, #4]
800cb00: 2200 movs r2, #0
800cb02: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
800cb04: 687b ldr r3, [r7, #4]
800cb06: 3308 adds r3, #8
800cb08: 2201 movs r2, #1
800cb0a: 4619 mov r1, r3
800cb0c: 6878 ldr r0, [r7, #4]
800cb0e: f000 f91d bl 800cd4c <USBD_CtlSendData>
break;
800cb12: e00c b.n 800cb2e <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
800cb14: 687b ldr r3, [r7, #4]
800cb16: 3304 adds r3, #4
800cb18: 2201 movs r2, #1
800cb1a: 4619 mov r1, r3
800cb1c: 6878 ldr r0, [r7, #4]
800cb1e: f000 f915 bl 800cd4c <USBD_CtlSendData>
break;
800cb22: e004 b.n 800cb2e <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
800cb24: 6839 ldr r1, [r7, #0]
800cb26: 6878 ldr r0, [r7, #4]
800cb28: f000 f8a6 bl 800cc78 <USBD_CtlError>
break;
800cb2c: bf00 nop
}
800cb2e: bf00 nop
800cb30: 3708 adds r7, #8
800cb32: 46bd mov sp, r7
800cb34: bd80 pop {r7, pc}
0800cb36 <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800cb36: b580 push {r7, lr}
800cb38: b082 sub sp, #8
800cb3a: af00 add r7, sp, #0
800cb3c: 6078 str r0, [r7, #4]
800cb3e: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800cb40: 687b ldr r3, [r7, #4]
800cb42: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cb46: 3b01 subs r3, #1
800cb48: 2b02 cmp r3, #2
800cb4a: d81e bhi.n 800cb8a <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800cb4c: 683b ldr r3, [r7, #0]
800cb4e: 88db ldrh r3, [r3, #6]
800cb50: 2b02 cmp r3, #2
800cb52: d004 beq.n 800cb5e <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
800cb54: 6839 ldr r1, [r7, #0]
800cb56: 6878 ldr r0, [r7, #4]
800cb58: f000 f88e bl 800cc78 <USBD_CtlError>
break;
800cb5c: e01a b.n 800cb94 <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800cb5e: 687b ldr r3, [r7, #4]
800cb60: 2201 movs r2, #1
800cb62: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
800cb64: 687b ldr r3, [r7, #4]
800cb66: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800cb6a: 2b00 cmp r3, #0
800cb6c: d005 beq.n 800cb7a <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800cb6e: 687b ldr r3, [r7, #4]
800cb70: 68db ldr r3, [r3, #12]
800cb72: f043 0202 orr.w r2, r3, #2
800cb76: 687b ldr r3, [r7, #4]
800cb78: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800cb7a: 687b ldr r3, [r7, #4]
800cb7c: 330c adds r3, #12
800cb7e: 2202 movs r2, #2
800cb80: 4619 mov r1, r3
800cb82: 6878 ldr r0, [r7, #4]
800cb84: f000 f8e2 bl 800cd4c <USBD_CtlSendData>
break;
800cb88: e004 b.n 800cb94 <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800cb8a: 6839 ldr r1, [r7, #0]
800cb8c: 6878 ldr r0, [r7, #4]
800cb8e: f000 f873 bl 800cc78 <USBD_CtlError>
break;
800cb92: bf00 nop
}
}
800cb94: bf00 nop
800cb96: 3708 adds r7, #8
800cb98: 46bd mov sp, r7
800cb9a: bd80 pop {r7, pc}
0800cb9c <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cb9c: b580 push {r7, lr}
800cb9e: b082 sub sp, #8
800cba0: af00 add r7, sp, #0
800cba2: 6078 str r0, [r7, #4]
800cba4: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800cba6: 683b ldr r3, [r7, #0]
800cba8: 885b ldrh r3, [r3, #2]
800cbaa: 2b01 cmp r3, #1
800cbac: d106 bne.n 800cbbc <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
800cbae: 687b ldr r3, [r7, #4]
800cbb0: 2201 movs r2, #1
800cbb2: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800cbb6: 6878 ldr r0, [r7, #4]
800cbb8: f000 f926 bl 800ce08 <USBD_CtlSendStatus>
}
}
800cbbc: bf00 nop
800cbbe: 3708 adds r7, #8
800cbc0: 46bd mov sp, r7
800cbc2: bd80 pop {r7, pc}
0800cbc4 <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cbc4: b580 push {r7, lr}
800cbc6: b082 sub sp, #8
800cbc8: af00 add r7, sp, #0
800cbca: 6078 str r0, [r7, #4]
800cbcc: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800cbce: 687b ldr r3, [r7, #4]
800cbd0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cbd4: 3b01 subs r3, #1
800cbd6: 2b02 cmp r3, #2
800cbd8: d80b bhi.n 800cbf2 <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800cbda: 683b ldr r3, [r7, #0]
800cbdc: 885b ldrh r3, [r3, #2]
800cbde: 2b01 cmp r3, #1
800cbe0: d10c bne.n 800cbfc <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
800cbe2: 687b ldr r3, [r7, #4]
800cbe4: 2200 movs r2, #0
800cbe6: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800cbea: 6878 ldr r0, [r7, #4]
800cbec: f000 f90c bl 800ce08 <USBD_CtlSendStatus>
}
break;
800cbf0: e004 b.n 800cbfc <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
800cbf2: 6839 ldr r1, [r7, #0]
800cbf4: 6878 ldr r0, [r7, #4]
800cbf6: f000 f83f bl 800cc78 <USBD_CtlError>
break;
800cbfa: e000 b.n 800cbfe <USBD_ClrFeature+0x3a>
break;
800cbfc: bf00 nop
}
}
800cbfe: bf00 nop
800cc00: 3708 adds r7, #8
800cc02: 46bd mov sp, r7
800cc04: bd80 pop {r7, pc}
0800cc06 <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800cc06: b480 push {r7}
800cc08: b083 sub sp, #12
800cc0a: af00 add r7, sp, #0
800cc0c: 6078 str r0, [r7, #4]
800cc0e: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
800cc10: 683b ldr r3, [r7, #0]
800cc12: 781a ldrb r2, [r3, #0]
800cc14: 687b ldr r3, [r7, #4]
800cc16: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800cc18: 683b ldr r3, [r7, #0]
800cc1a: 785a ldrb r2, [r3, #1]
800cc1c: 687b ldr r3, [r7, #4]
800cc1e: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
800cc20: 683b ldr r3, [r7, #0]
800cc22: 3302 adds r3, #2
800cc24: 781b ldrb r3, [r3, #0]
800cc26: 461a mov r2, r3
800cc28: 683b ldr r3, [r7, #0]
800cc2a: 3303 adds r3, #3
800cc2c: 781b ldrb r3, [r3, #0]
800cc2e: 021b lsls r3, r3, #8
800cc30: b29b uxth r3, r3
800cc32: 4413 add r3, r2
800cc34: b29a uxth r2, r3
800cc36: 687b ldr r3, [r7, #4]
800cc38: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800cc3a: 683b ldr r3, [r7, #0]
800cc3c: 3304 adds r3, #4
800cc3e: 781b ldrb r3, [r3, #0]
800cc40: 461a mov r2, r3
800cc42: 683b ldr r3, [r7, #0]
800cc44: 3305 adds r3, #5
800cc46: 781b ldrb r3, [r3, #0]
800cc48: 021b lsls r3, r3, #8
800cc4a: b29b uxth r3, r3
800cc4c: 4413 add r3, r2
800cc4e: b29a uxth r2, r3
800cc50: 687b ldr r3, [r7, #4]
800cc52: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
800cc54: 683b ldr r3, [r7, #0]
800cc56: 3306 adds r3, #6
800cc58: 781b ldrb r3, [r3, #0]
800cc5a: 461a mov r2, r3
800cc5c: 683b ldr r3, [r7, #0]
800cc5e: 3307 adds r3, #7
800cc60: 781b ldrb r3, [r3, #0]
800cc62: 021b lsls r3, r3, #8
800cc64: b29b uxth r3, r3
800cc66: 4413 add r3, r2
800cc68: b29a uxth r2, r3
800cc6a: 687b ldr r3, [r7, #4]
800cc6c: 80da strh r2, [r3, #6]
}
800cc6e: bf00 nop
800cc70: 370c adds r7, #12
800cc72: 46bd mov sp, r7
800cc74: bc80 pop {r7}
800cc76: 4770 bx lr
0800cc78 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cc78: b580 push {r7, lr}
800cc7a: b082 sub sp, #8
800cc7c: af00 add r7, sp, #0
800cc7e: 6078 str r0, [r7, #4]
800cc80: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
800cc82: 2180 movs r1, #128 @ 0x80
800cc84: 6878 ldr r0, [r7, #4]
800cc86: f000 fcd1 bl 800d62c <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
800cc8a: 2100 movs r1, #0
800cc8c: 6878 ldr r0, [r7, #4]
800cc8e: f000 fccd bl 800d62c <USBD_LL_StallEP>
}
800cc92: bf00 nop
800cc94: 3708 adds r7, #8
800cc96: 46bd mov sp, r7
800cc98: bd80 pop {r7, pc}
0800cc9a <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800cc9a: b580 push {r7, lr}
800cc9c: b086 sub sp, #24
800cc9e: af00 add r7, sp, #0
800cca0: 60f8 str r0, [r7, #12]
800cca2: 60b9 str r1, [r7, #8]
800cca4: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800cca6: 2300 movs r3, #0
800cca8: 75fb strb r3, [r7, #23]
if (desc != NULL)
800ccaa: 68fb ldr r3, [r7, #12]
800ccac: 2b00 cmp r3, #0
800ccae: d032 beq.n 800cd16 <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
800ccb0: 68f8 ldr r0, [r7, #12]
800ccb2: f000 f834 bl 800cd1e <USBD_GetLen>
800ccb6: 4603 mov r3, r0
800ccb8: 3301 adds r3, #1
800ccba: b29b uxth r3, r3
800ccbc: 005b lsls r3, r3, #1
800ccbe: b29a uxth r2, r3
800ccc0: 687b ldr r3, [r7, #4]
800ccc2: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
800ccc4: 7dfb ldrb r3, [r7, #23]
800ccc6: 1c5a adds r2, r3, #1
800ccc8: 75fa strb r2, [r7, #23]
800ccca: 461a mov r2, r3
800cccc: 68bb ldr r3, [r7, #8]
800ccce: 4413 add r3, r2
800ccd0: 687a ldr r2, [r7, #4]
800ccd2: 7812 ldrb r2, [r2, #0]
800ccd4: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800ccd6: 7dfb ldrb r3, [r7, #23]
800ccd8: 1c5a adds r2, r3, #1
800ccda: 75fa strb r2, [r7, #23]
800ccdc: 461a mov r2, r3
800ccde: 68bb ldr r3, [r7, #8]
800cce0: 4413 add r3, r2
800cce2: 2203 movs r2, #3
800cce4: 701a strb r2, [r3, #0]
while (*desc != '\0')
800cce6: e012 b.n 800cd0e <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
800cce8: 68fb ldr r3, [r7, #12]
800ccea: 1c5a adds r2, r3, #1
800ccec: 60fa str r2, [r7, #12]
800ccee: 7dfa ldrb r2, [r7, #23]
800ccf0: 1c51 adds r1, r2, #1
800ccf2: 75f9 strb r1, [r7, #23]
800ccf4: 4611 mov r1, r2
800ccf6: 68ba ldr r2, [r7, #8]
800ccf8: 440a add r2, r1
800ccfa: 781b ldrb r3, [r3, #0]
800ccfc: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
800ccfe: 7dfb ldrb r3, [r7, #23]
800cd00: 1c5a adds r2, r3, #1
800cd02: 75fa strb r2, [r7, #23]
800cd04: 461a mov r2, r3
800cd06: 68bb ldr r3, [r7, #8]
800cd08: 4413 add r3, r2
800cd0a: 2200 movs r2, #0
800cd0c: 701a strb r2, [r3, #0]
while (*desc != '\0')
800cd0e: 68fb ldr r3, [r7, #12]
800cd10: 781b ldrb r3, [r3, #0]
800cd12: 2b00 cmp r3, #0
800cd14: d1e8 bne.n 800cce8 <USBD_GetString+0x4e>
}
}
}
800cd16: bf00 nop
800cd18: 3718 adds r7, #24
800cd1a: 46bd mov sp, r7
800cd1c: bd80 pop {r7, pc}
0800cd1e <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800cd1e: b480 push {r7}
800cd20: b085 sub sp, #20
800cd22: af00 add r7, sp, #0
800cd24: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800cd26: 2300 movs r3, #0
800cd28: 73fb strb r3, [r7, #15]
while (*buf != '\0')
800cd2a: e005 b.n 800cd38 <USBD_GetLen+0x1a>
{
len++;
800cd2c: 7bfb ldrb r3, [r7, #15]
800cd2e: 3301 adds r3, #1
800cd30: 73fb strb r3, [r7, #15]
buf++;
800cd32: 687b ldr r3, [r7, #4]
800cd34: 3301 adds r3, #1
800cd36: 607b str r3, [r7, #4]
while (*buf != '\0')
800cd38: 687b ldr r3, [r7, #4]
800cd3a: 781b ldrb r3, [r3, #0]
800cd3c: 2b00 cmp r3, #0
800cd3e: d1f5 bne.n 800cd2c <USBD_GetLen+0xe>
}
return len;
800cd40: 7bfb ldrb r3, [r7, #15]
}
800cd42: 4618 mov r0, r3
800cd44: 3714 adds r7, #20
800cd46: 46bd mov sp, r7
800cd48: bc80 pop {r7}
800cd4a: 4770 bx lr
0800cd4c <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800cd4c: b580 push {r7, lr}
800cd4e: b084 sub sp, #16
800cd50: af00 add r7, sp, #0
800cd52: 60f8 str r0, [r7, #12]
800cd54: 60b9 str r1, [r7, #8]
800cd56: 4613 mov r3, r2
800cd58: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
800cd5a: 68fb ldr r3, [r7, #12]
800cd5c: 2202 movs r2, #2
800cd5e: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800cd62: 88fa ldrh r2, [r7, #6]
800cd64: 68fb ldr r3, [r7, #12]
800cd66: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
800cd68: 88fa ldrh r2, [r7, #6]
800cd6a: 68fb ldr r3, [r7, #12]
800cd6c: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800cd6e: 88fb ldrh r3, [r7, #6]
800cd70: 68ba ldr r2, [r7, #8]
800cd72: 2100 movs r1, #0
800cd74: 68f8 ldr r0, [r7, #12]
800cd76: f000 fce1 bl 800d73c <USBD_LL_Transmit>
return USBD_OK;
800cd7a: 2300 movs r3, #0
}
800cd7c: 4618 mov r0, r3
800cd7e: 3710 adds r7, #16
800cd80: 46bd mov sp, r7
800cd82: bd80 pop {r7, pc}
0800cd84 <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800cd84: b580 push {r7, lr}
800cd86: b084 sub sp, #16
800cd88: af00 add r7, sp, #0
800cd8a: 60f8 str r0, [r7, #12]
800cd8c: 60b9 str r1, [r7, #8]
800cd8e: 4613 mov r3, r2
800cd90: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800cd92: 88fb ldrh r3, [r7, #6]
800cd94: 68ba ldr r2, [r7, #8]
800cd96: 2100 movs r1, #0
800cd98: 68f8 ldr r0, [r7, #12]
800cd9a: f000 fccf bl 800d73c <USBD_LL_Transmit>
return USBD_OK;
800cd9e: 2300 movs r3, #0
}
800cda0: 4618 mov r0, r3
800cda2: 3710 adds r7, #16
800cda4: 46bd mov sp, r7
800cda6: bd80 pop {r7, pc}
0800cda8 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800cda8: b580 push {r7, lr}
800cdaa: b084 sub sp, #16
800cdac: af00 add r7, sp, #0
800cdae: 60f8 str r0, [r7, #12]
800cdb0: 60b9 str r1, [r7, #8]
800cdb2: 4613 mov r3, r2
800cdb4: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
800cdb6: 68fb ldr r3, [r7, #12]
800cdb8: 2203 movs r2, #3
800cdba: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
800cdbe: 88fa ldrh r2, [r7, #6]
800cdc0: 68fb ldr r3, [r7, #12]
800cdc2: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800cdc6: 88fa ldrh r2, [r7, #6]
800cdc8: 68fb ldr r3, [r7, #12]
800cdca: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800cdce: 88fb ldrh r3, [r7, #6]
800cdd0: 68ba ldr r2, [r7, #8]
800cdd2: 2100 movs r1, #0
800cdd4: 68f8 ldr r0, [r7, #12]
800cdd6: f000 fcd4 bl 800d782 <USBD_LL_PrepareReceive>
return USBD_OK;
800cdda: 2300 movs r3, #0
}
800cddc: 4618 mov r0, r3
800cdde: 3710 adds r7, #16
800cde0: 46bd mov sp, r7
800cde2: bd80 pop {r7, pc}
0800cde4 <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800cde4: b580 push {r7, lr}
800cde6: b084 sub sp, #16
800cde8: af00 add r7, sp, #0
800cdea: 60f8 str r0, [r7, #12]
800cdec: 60b9 str r1, [r7, #8]
800cdee: 4613 mov r3, r2
800cdf0: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800cdf2: 88fb ldrh r3, [r7, #6]
800cdf4: 68ba ldr r2, [r7, #8]
800cdf6: 2100 movs r1, #0
800cdf8: 68f8 ldr r0, [r7, #12]
800cdfa: f000 fcc2 bl 800d782 <USBD_LL_PrepareReceive>
return USBD_OK;
800cdfe: 2300 movs r3, #0
}
800ce00: 4618 mov r0, r3
800ce02: 3710 adds r7, #16
800ce04: 46bd mov sp, r7
800ce06: bd80 pop {r7, pc}
0800ce08 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800ce08: b580 push {r7, lr}
800ce0a: b082 sub sp, #8
800ce0c: af00 add r7, sp, #0
800ce0e: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800ce10: 687b ldr r3, [r7, #4]
800ce12: 2204 movs r2, #4
800ce14: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800ce18: 2300 movs r3, #0
800ce1a: 2200 movs r2, #0
800ce1c: 2100 movs r1, #0
800ce1e: 6878 ldr r0, [r7, #4]
800ce20: f000 fc8c bl 800d73c <USBD_LL_Transmit>
return USBD_OK;
800ce24: 2300 movs r3, #0
}
800ce26: 4618 mov r0, r3
800ce28: 3708 adds r7, #8
800ce2a: 46bd mov sp, r7
800ce2c: bd80 pop {r7, pc}
0800ce2e <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800ce2e: b580 push {r7, lr}
800ce30: b082 sub sp, #8
800ce32: af00 add r7, sp, #0
800ce34: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800ce36: 687b ldr r3, [r7, #4]
800ce38: 2205 movs r2, #5
800ce3a: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800ce3e: 2300 movs r3, #0
800ce40: 2200 movs r2, #0
800ce42: 2100 movs r1, #0
800ce44: 6878 ldr r0, [r7, #4]
800ce46: f000 fc9c bl 800d782 <USBD_LL_PrepareReceive>
return USBD_OK;
800ce4a: 2300 movs r3, #0
}
800ce4c: 4618 mov r0, r3
800ce4e: 3708 adds r7, #8
800ce50: 46bd mov sp, r7
800ce52: bd80 pop {r7, pc}
0800ce54 <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800ce54: b580 push {r7, lr}
800ce56: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
800ce58: 2200 movs r2, #0
800ce5a: 4912 ldr r1, [pc, #72] @ (800cea4 <MX_USB_DEVICE_Init+0x50>)
800ce5c: 4812 ldr r0, [pc, #72] @ (800cea8 <MX_USB_DEVICE_Init+0x54>)
800ce5e: f7fe ff62 bl 800bd26 <USBD_Init>
800ce62: 4603 mov r3, r0
800ce64: 2b00 cmp r3, #0
800ce66: d001 beq.n 800ce6c <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
800ce68: f7f5 ff68 bl 8002d3c <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
800ce6c: 490f ldr r1, [pc, #60] @ (800ceac <MX_USB_DEVICE_Init+0x58>)
800ce6e: 480e ldr r0, [pc, #56] @ (800cea8 <MX_USB_DEVICE_Init+0x54>)
800ce70: f7fe ff84 bl 800bd7c <USBD_RegisterClass>
800ce74: 4603 mov r3, r0
800ce76: 2b00 cmp r3, #0
800ce78: d001 beq.n 800ce7e <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
800ce7a: f7f5 ff5f bl 8002d3c <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
800ce7e: 490c ldr r1, [pc, #48] @ (800ceb0 <MX_USB_DEVICE_Init+0x5c>)
800ce80: 4809 ldr r0, [pc, #36] @ (800cea8 <MX_USB_DEVICE_Init+0x54>)
800ce82: f7fe feb5 bl 800bbf0 <USBD_CDC_RegisterInterface>
800ce86: 4603 mov r3, r0
800ce88: 2b00 cmp r3, #0
800ce8a: d001 beq.n 800ce90 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
800ce8c: f7f5 ff56 bl 8002d3c <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
800ce90: 4805 ldr r0, [pc, #20] @ (800cea8 <MX_USB_DEVICE_Init+0x54>)
800ce92: f7fe ff8c bl 800bdae <USBD_Start>
800ce96: 4603 mov r3, r0
800ce98: 2b00 cmp r3, #0
800ce9a: d001 beq.n 800cea0 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
800ce9c: f7f5 ff4e bl 8002d3c <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
800cea0: bf00 nop
800cea2: bd80 pop {r7, pc}
800cea4: 20000134 .word 0x20000134
800cea8: 2000048c .word 0x2000048c
800ceac: 20000020 .word 0x20000020
800ceb0: 20000124 .word 0x20000124
0800ceb4 <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
800ceb4: b480 push {r7}
800ceb6: b085 sub sp, #20
800ceb8: af00 add r7, sp, #0
800ceba: 6078 str r0, [r7, #4]
800cebc: 6039 str r1, [r7, #0]
while (len--) {
800cebe: e01e b.n 800cefe <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
800cec0: 4b14 ldr r3, [pc, #80] @ (800cf14 <fifo_push+0x60>)
800cec2: 881b ldrh r3, [r3, #0]
800cec4: b29b uxth r3, r3
800cec6: 3301 adds r3, #1
800cec8: b29b uxth r3, r3
800ceca: b2db uxtb r3, r3
800cecc: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
800cece: 89fa ldrh r2, [r7, #14]
800ced0: 4b11 ldr r3, [pc, #68] @ (800cf18 <fifo_push+0x64>)
800ced2: 881b ldrh r3, [r3, #0]
800ced4: b29b uxth r3, r3
800ced6: b2db uxtb r3, r3
800ced8: 429a cmp r2, r3
800ceda: d103 bne.n 800cee4 <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
800cedc: 687b ldr r3, [r7, #4]
800cede: 3301 adds r3, #1
800cee0: 607b str r3, [r7, #4]
continue;
800cee2: e00c b.n 800cefe <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
800cee4: 687b ldr r3, [r7, #4]
800cee6: 1c5a adds r2, r3, #1
800cee8: 607a str r2, [r7, #4]
800ceea: 4a0a ldr r2, [pc, #40] @ (800cf14 <fifo_push+0x60>)
800ceec: 8812 ldrh r2, [r2, #0]
800ceee: b292 uxth r2, r2
800cef0: b2d2 uxtb r2, r2
800cef2: 7819 ldrb r1, [r3, #0]
800cef4: 4b09 ldr r3, [pc, #36] @ (800cf1c <fifo_push+0x68>)
800cef6: 5499 strb r1, [r3, r2]
rx_head = next;
800cef8: 4a06 ldr r2, [pc, #24] @ (800cf14 <fifo_push+0x60>)
800cefa: 89fb ldrh r3, [r7, #14]
800cefc: 8013 strh r3, [r2, #0]
while (len--) {
800cefe: 683b ldr r3, [r7, #0]
800cf00: 1e5a subs r2, r3, #1
800cf02: 603a str r2, [r7, #0]
800cf04: 2b00 cmp r3, #0
800cf06: d1db bne.n 800cec0 <fifo_push+0xc>
}
}
800cf08: bf00 nop
800cf0a: bf00 nop
800cf0c: 3714 adds r7, #20
800cf0e: 46bd mov sp, r7
800cf10: bc80 pop {r7}
800cf12: 4770 bx lr
800cf14: 20001050 .word 0x20001050
800cf18: 20001052 .word 0x20001052
800cf1c: 20000f50 .word 0x20000f50
0800cf20 <CDC_Available>:
uint32_t CDC_Available(void) {
800cf20: b480 push {r7}
800cf22: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
800cf24: 4b06 ldr r3, [pc, #24] @ (800cf40 <CDC_Available+0x20>)
800cf26: 881b ldrh r3, [r3, #0]
800cf28: b29a uxth r2, r3
800cf2a: 4b06 ldr r3, [pc, #24] @ (800cf44 <CDC_Available+0x24>)
800cf2c: 881b ldrh r3, [r3, #0]
800cf2e: b29b uxth r3, r3
800cf30: 1ad3 subs r3, r2, r3
800cf32: b29b uxth r3, r3
800cf34: b2db uxtb r3, r3
}
800cf36: 4618 mov r0, r3
800cf38: 46bd mov sp, r7
800cf3a: bc80 pop {r7}
800cf3c: 4770 bx lr
800cf3e: bf00 nop
800cf40: 20001050 .word 0x20001050
800cf44: 20001052 .word 0x20001052
0800cf48 <CDC_ReadByte>:
int CDC_ReadByte(void) {
800cf48: b480 push {r7}
800cf4a: b083 sub sp, #12
800cf4c: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
800cf4e: 4b10 ldr r3, [pc, #64] @ (800cf90 <CDC_ReadByte+0x48>)
800cf50: 881b ldrh r3, [r3, #0]
800cf52: b29a uxth r2, r3
800cf54: 4b0f ldr r3, [pc, #60] @ (800cf94 <CDC_ReadByte+0x4c>)
800cf56: 881b ldrh r3, [r3, #0]
800cf58: b29b uxth r3, r3
800cf5a: 429a cmp r2, r3
800cf5c: d102 bne.n 800cf64 <CDC_ReadByte+0x1c>
800cf5e: f04f 33ff mov.w r3, #4294967295
800cf62: e010 b.n 800cf86 <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
800cf64: 4b0a ldr r3, [pc, #40] @ (800cf90 <CDC_ReadByte+0x48>)
800cf66: 881b ldrh r3, [r3, #0]
800cf68: b29b uxth r3, r3
800cf6a: b2db uxtb r3, r3
800cf6c: 4a0a ldr r2, [pc, #40] @ (800cf98 <CDC_ReadByte+0x50>)
800cf6e: 5cd3 ldrb r3, [r2, r3]
800cf70: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
800cf72: 4b07 ldr r3, [pc, #28] @ (800cf90 <CDC_ReadByte+0x48>)
800cf74: 881b ldrh r3, [r3, #0]
800cf76: b29b uxth r3, r3
800cf78: 3301 adds r3, #1
800cf7a: b29b uxth r3, r3
800cf7c: b2db uxtb r3, r3
800cf7e: b29a uxth r2, r3
800cf80: 4b03 ldr r3, [pc, #12] @ (800cf90 <CDC_ReadByte+0x48>)
800cf82: 801a strh r2, [r3, #0]
return b;
800cf84: 687b ldr r3, [r7, #4]
}
800cf86: 4618 mov r0, r3
800cf88: 370c adds r7, #12
800cf8a: 46bd mov sp, r7
800cf8c: bc80 pop {r7}
800cf8e: 4770 bx lr
800cf90: 20001052 .word 0x20001052
800cf94: 20001050 .word 0x20001050
800cf98: 20000f50 .word 0x20000f50
0800cf9c <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
800cf9c: b580 push {r7, lr}
800cf9e: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
800cfa0: 2200 movs r2, #0
800cfa2: 4905 ldr r1, [pc, #20] @ (800cfb8 <CDC_Init_FS+0x1c>)
800cfa4: 4805 ldr r0, [pc, #20] @ (800cfbc <CDC_Init_FS+0x20>)
800cfa6: f7fe fe39 bl 800bc1c <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
800cfaa: 4905 ldr r1, [pc, #20] @ (800cfc0 <CDC_Init_FS+0x24>)
800cfac: 4803 ldr r0, [pc, #12] @ (800cfbc <CDC_Init_FS+0x20>)
800cfae: f7fe fe4e bl 800bc4e <USBD_CDC_SetRxBuffer>
return (USBD_OK);
800cfb2: 2300 movs r3, #0
/* USER CODE END 3 */
}
800cfb4: 4618 mov r0, r3
800cfb6: bd80 pop {r7, pc}
800cfb8: 20000b50 .word 0x20000b50
800cfbc: 2000048c .word 0x2000048c
800cfc0: 20000750 .word 0x20000750
0800cfc4 <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
800cfc4: b480 push {r7}
800cfc6: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
800cfc8: 2300 movs r3, #0
/* USER CODE END 4 */
}
800cfca: 4618 mov r0, r3
800cfcc: 46bd mov sp, r7
800cfce: bc80 pop {r7}
800cfd0: 4770 bx lr
...
0800cfd4 <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800cfd4: b480 push {r7}
800cfd6: b083 sub sp, #12
800cfd8: af00 add r7, sp, #0
800cfda: 4603 mov r3, r0
800cfdc: 6039 str r1, [r7, #0]
800cfde: 71fb strb r3, [r7, #7]
800cfe0: 4613 mov r3, r2
800cfe2: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800cfe4: 79fb ldrb r3, [r7, #7]
800cfe6: 2b23 cmp r3, #35 @ 0x23
800cfe8: d84a bhi.n 800d080 <CDC_Control_FS+0xac>
800cfea: a201 add r2, pc, #4 @ (adr r2, 800cff0 <CDC_Control_FS+0x1c>)
800cfec: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800cff0: 0800d081 .word 0x0800d081
800cff4: 0800d081 .word 0x0800d081
800cff8: 0800d081 .word 0x0800d081
800cffc: 0800d081 .word 0x0800d081
800d000: 0800d081 .word 0x0800d081
800d004: 0800d081 .word 0x0800d081
800d008: 0800d081 .word 0x0800d081
800d00c: 0800d081 .word 0x0800d081
800d010: 0800d081 .word 0x0800d081
800d014: 0800d081 .word 0x0800d081
800d018: 0800d081 .word 0x0800d081
800d01c: 0800d081 .word 0x0800d081
800d020: 0800d081 .word 0x0800d081
800d024: 0800d081 .word 0x0800d081
800d028: 0800d081 .word 0x0800d081
800d02c: 0800d081 .word 0x0800d081
800d030: 0800d081 .word 0x0800d081
800d034: 0800d081 .word 0x0800d081
800d038: 0800d081 .word 0x0800d081
800d03c: 0800d081 .word 0x0800d081
800d040: 0800d081 .word 0x0800d081
800d044: 0800d081 .word 0x0800d081
800d048: 0800d081 .word 0x0800d081
800d04c: 0800d081 .word 0x0800d081
800d050: 0800d081 .word 0x0800d081
800d054: 0800d081 .word 0x0800d081
800d058: 0800d081 .word 0x0800d081
800d05c: 0800d081 .word 0x0800d081
800d060: 0800d081 .word 0x0800d081
800d064: 0800d081 .word 0x0800d081
800d068: 0800d081 .word 0x0800d081
800d06c: 0800d081 .word 0x0800d081
800d070: 0800d081 .word 0x0800d081
800d074: 0800d081 .word 0x0800d081
800d078: 0800d081 .word 0x0800d081
800d07c: 0800d081 .word 0x0800d081
case CDC_SEND_BREAK:
break;
default:
break;
800d080: bf00 nop
}
return (USBD_OK);
800d082: 2300 movs r3, #0
/* USER CODE END 5 */
}
800d084: 4618 mov r0, r3
800d086: 370c adds r7, #12
800d088: 46bd mov sp, r7
800d08a: bc80 pop {r7}
800d08c: 4770 bx lr
800d08e: bf00 nop
0800d090 <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
800d090: b580 push {r7, lr}
800d092: b082 sub sp, #8
800d094: af00 add r7, sp, #0
800d096: 6078 str r0, [r7, #4]
800d098: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
800d09a: 683b ldr r3, [r7, #0]
800d09c: 681b ldr r3, [r3, #0]
800d09e: 2b00 cmp r3, #0
800d0a0: d005 beq.n 800d0ae <CDC_Receive_FS+0x1e>
800d0a2: 683b ldr r3, [r7, #0]
800d0a4: 681b ldr r3, [r3, #0]
800d0a6: 4619 mov r1, r3
800d0a8: 6878 ldr r0, [r7, #4]
800d0aa: f7ff ff03 bl 800ceb4 <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
800d0ae: 6879 ldr r1, [r7, #4]
800d0b0: 4805 ldr r0, [pc, #20] @ (800d0c8 <CDC_Receive_FS+0x38>)
800d0b2: f7fe fdcc bl 800bc4e <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
800d0b6: 4804 ldr r0, [pc, #16] @ (800d0c8 <CDC_Receive_FS+0x38>)
800d0b8: f7fe fe0b bl 800bcd2 <USBD_CDC_ReceivePacket>
return (USBD_OK);
800d0bc: 2300 movs r3, #0
/* USER CODE END 6 */
}
800d0be: 4618 mov r0, r3
800d0c0: 3708 adds r7, #8
800d0c2: 46bd mov sp, r7
800d0c4: bd80 pop {r7, pc}
800d0c6: bf00 nop
800d0c8: 2000048c .word 0x2000048c
0800d0cc <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
800d0cc: b580 push {r7, lr}
800d0ce: b084 sub sp, #16
800d0d0: af00 add r7, sp, #0
800d0d2: 6078 str r0, [r7, #4]
800d0d4: 460b mov r3, r1
800d0d6: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
800d0d8: 2300 movs r3, #0
800d0da: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
800d0dc: 4b0d ldr r3, [pc, #52] @ (800d114 <CDC_Transmit_FS+0x48>)
800d0de: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800d0e2: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
800d0e4: 68bb ldr r3, [r7, #8]
800d0e6: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800d0ea: 2b00 cmp r3, #0
800d0ec: d001 beq.n 800d0f2 <CDC_Transmit_FS+0x26>
return USBD_BUSY;
800d0ee: 2301 movs r3, #1
800d0f0: e00b b.n 800d10a <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800d0f2: 887b ldrh r3, [r7, #2]
800d0f4: 461a mov r2, r3
800d0f6: 6879 ldr r1, [r7, #4]
800d0f8: 4806 ldr r0, [pc, #24] @ (800d114 <CDC_Transmit_FS+0x48>)
800d0fa: f7fe fd8f bl 800bc1c <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800d0fe: 4805 ldr r0, [pc, #20] @ (800d114 <CDC_Transmit_FS+0x48>)
800d100: f7fe fdb8 bl 800bc74 <USBD_CDC_TransmitPacket>
800d104: 4603 mov r3, r0
800d106: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
800d108: 7bfb ldrb r3, [r7, #15]
}
800d10a: 4618 mov r0, r3
800d10c: 3710 adds r7, #16
800d10e: 46bd mov sp, r7
800d110: bd80 pop {r7, pc}
800d112: bf00 nop
800d114: 2000048c .word 0x2000048c
0800d118 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d118: b480 push {r7}
800d11a: b083 sub sp, #12
800d11c: af00 add r7, sp, #0
800d11e: 4603 mov r3, r0
800d120: 6039 str r1, [r7, #0]
800d122: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800d124: 683b ldr r3, [r7, #0]
800d126: 2212 movs r2, #18
800d128: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
800d12a: 4b03 ldr r3, [pc, #12] @ (800d138 <USBD_FS_DeviceDescriptor+0x20>)
}
800d12c: 4618 mov r0, r3
800d12e: 370c adds r7, #12
800d130: 46bd mov sp, r7
800d132: bc80 pop {r7}
800d134: 4770 bx lr
800d136: bf00 nop
800d138: 20000150 .word 0x20000150
0800d13c <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d13c: b480 push {r7}
800d13e: b083 sub sp, #12
800d140: af00 add r7, sp, #0
800d142: 4603 mov r3, r0
800d144: 6039 str r1, [r7, #0]
800d146: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
800d148: 683b ldr r3, [r7, #0]
800d14a: 2204 movs r2, #4
800d14c: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
800d14e: 4b03 ldr r3, [pc, #12] @ (800d15c <USBD_FS_LangIDStrDescriptor+0x20>)
}
800d150: 4618 mov r0, r3
800d152: 370c adds r7, #12
800d154: 46bd mov sp, r7
800d156: bc80 pop {r7}
800d158: 4770 bx lr
800d15a: bf00 nop
800d15c: 20000164 .word 0x20000164
0800d160 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d160: b580 push {r7, lr}
800d162: b082 sub sp, #8
800d164: af00 add r7, sp, #0
800d166: 4603 mov r3, r0
800d168: 6039 str r1, [r7, #0]
800d16a: 71fb strb r3, [r7, #7]
if(speed == 0)
800d16c: 79fb ldrb r3, [r7, #7]
800d16e: 2b00 cmp r3, #0
800d170: d105 bne.n 800d17e <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800d172: 683a ldr r2, [r7, #0]
800d174: 4907 ldr r1, [pc, #28] @ (800d194 <USBD_FS_ProductStrDescriptor+0x34>)
800d176: 4808 ldr r0, [pc, #32] @ (800d198 <USBD_FS_ProductStrDescriptor+0x38>)
800d178: f7ff fd8f bl 800cc9a <USBD_GetString>
800d17c: e004 b.n 800d188 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800d17e: 683a ldr r2, [r7, #0]
800d180: 4904 ldr r1, [pc, #16] @ (800d194 <USBD_FS_ProductStrDescriptor+0x34>)
800d182: 4805 ldr r0, [pc, #20] @ (800d198 <USBD_FS_ProductStrDescriptor+0x38>)
800d184: f7ff fd89 bl 800cc9a <USBD_GetString>
}
return USBD_StrDesc;
800d188: 4b02 ldr r3, [pc, #8] @ (800d194 <USBD_FS_ProductStrDescriptor+0x34>)
}
800d18a: 4618 mov r0, r3
800d18c: 3708 adds r7, #8
800d18e: 46bd mov sp, r7
800d190: bd80 pop {r7, pc}
800d192: bf00 nop
800d194: 20001054 .word 0x20001054
800d198: 0800e524 .word 0x0800e524
0800d19c <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d19c: b580 push {r7, lr}
800d19e: b082 sub sp, #8
800d1a0: af00 add r7, sp, #0
800d1a2: 4603 mov r3, r0
800d1a4: 6039 str r1, [r7, #0]
800d1a6: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800d1a8: 683a ldr r2, [r7, #0]
800d1aa: 4904 ldr r1, [pc, #16] @ (800d1bc <USBD_FS_ManufacturerStrDescriptor+0x20>)
800d1ac: 4804 ldr r0, [pc, #16] @ (800d1c0 <USBD_FS_ManufacturerStrDescriptor+0x24>)
800d1ae: f7ff fd74 bl 800cc9a <USBD_GetString>
return USBD_StrDesc;
800d1b2: 4b02 ldr r3, [pc, #8] @ (800d1bc <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800d1b4: 4618 mov r0, r3
800d1b6: 3708 adds r7, #8
800d1b8: 46bd mov sp, r7
800d1ba: bd80 pop {r7, pc}
800d1bc: 20001054 .word 0x20001054
800d1c0: 0800e53c .word 0x0800e53c
0800d1c4 <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d1c4: b580 push {r7, lr}
800d1c6: b082 sub sp, #8
800d1c8: af00 add r7, sp, #0
800d1ca: 4603 mov r3, r0
800d1cc: 6039 str r1, [r7, #0]
800d1ce: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800d1d0: 683b ldr r3, [r7, #0]
800d1d2: 221a movs r2, #26
800d1d4: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800d1d6: f000 f843 bl 800d260 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800d1da: 4b02 ldr r3, [pc, #8] @ (800d1e4 <USBD_FS_SerialStrDescriptor+0x20>)
}
800d1dc: 4618 mov r0, r3
800d1de: 3708 adds r7, #8
800d1e0: 46bd mov sp, r7
800d1e2: bd80 pop {r7, pc}
800d1e4: 20000168 .word 0x20000168
0800d1e8 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d1e8: b580 push {r7, lr}
800d1ea: b082 sub sp, #8
800d1ec: af00 add r7, sp, #0
800d1ee: 4603 mov r3, r0
800d1f0: 6039 str r1, [r7, #0]
800d1f2: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800d1f4: 79fb ldrb r3, [r7, #7]
800d1f6: 2b00 cmp r3, #0
800d1f8: d105 bne.n 800d206 <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800d1fa: 683a ldr r2, [r7, #0]
800d1fc: 4907 ldr r1, [pc, #28] @ (800d21c <USBD_FS_ConfigStrDescriptor+0x34>)
800d1fe: 4808 ldr r0, [pc, #32] @ (800d220 <USBD_FS_ConfigStrDescriptor+0x38>)
800d200: f7ff fd4b bl 800cc9a <USBD_GetString>
800d204: e004 b.n 800d210 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800d206: 683a ldr r2, [r7, #0]
800d208: 4904 ldr r1, [pc, #16] @ (800d21c <USBD_FS_ConfigStrDescriptor+0x34>)
800d20a: 4805 ldr r0, [pc, #20] @ (800d220 <USBD_FS_ConfigStrDescriptor+0x38>)
800d20c: f7ff fd45 bl 800cc9a <USBD_GetString>
}
return USBD_StrDesc;
800d210: 4b02 ldr r3, [pc, #8] @ (800d21c <USBD_FS_ConfigStrDescriptor+0x34>)
}
800d212: 4618 mov r0, r3
800d214: 3708 adds r7, #8
800d216: 46bd mov sp, r7
800d218: bd80 pop {r7, pc}
800d21a: bf00 nop
800d21c: 20001054 .word 0x20001054
800d220: 0800e550 .word 0x0800e550
0800d224 <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800d224: b580 push {r7, lr}
800d226: b082 sub sp, #8
800d228: af00 add r7, sp, #0
800d22a: 4603 mov r3, r0
800d22c: 6039 str r1, [r7, #0]
800d22e: 71fb strb r3, [r7, #7]
if(speed == 0)
800d230: 79fb ldrb r3, [r7, #7]
800d232: 2b00 cmp r3, #0
800d234: d105 bne.n 800d242 <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800d236: 683a ldr r2, [r7, #0]
800d238: 4907 ldr r1, [pc, #28] @ (800d258 <USBD_FS_InterfaceStrDescriptor+0x34>)
800d23a: 4808 ldr r0, [pc, #32] @ (800d25c <USBD_FS_InterfaceStrDescriptor+0x38>)
800d23c: f7ff fd2d bl 800cc9a <USBD_GetString>
800d240: e004 b.n 800d24c <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800d242: 683a ldr r2, [r7, #0]
800d244: 4904 ldr r1, [pc, #16] @ (800d258 <USBD_FS_InterfaceStrDescriptor+0x34>)
800d246: 4805 ldr r0, [pc, #20] @ (800d25c <USBD_FS_InterfaceStrDescriptor+0x38>)
800d248: f7ff fd27 bl 800cc9a <USBD_GetString>
}
return USBD_StrDesc;
800d24c: 4b02 ldr r3, [pc, #8] @ (800d258 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
800d24e: 4618 mov r0, r3
800d250: 3708 adds r7, #8
800d252: 46bd mov sp, r7
800d254: bd80 pop {r7, pc}
800d256: bf00 nop
800d258: 20001054 .word 0x20001054
800d25c: 0800e55c .word 0x0800e55c
0800d260 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
800d260: b580 push {r7, lr}
800d262: b084 sub sp, #16
800d264: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800d266: 4b0f ldr r3, [pc, #60] @ (800d2a4 <Get_SerialNum+0x44>)
800d268: 681b ldr r3, [r3, #0]
800d26a: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
800d26c: 4b0e ldr r3, [pc, #56] @ (800d2a8 <Get_SerialNum+0x48>)
800d26e: 681b ldr r3, [r3, #0]
800d270: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800d272: 4b0e ldr r3, [pc, #56] @ (800d2ac <Get_SerialNum+0x4c>)
800d274: 681b ldr r3, [r3, #0]
800d276: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800d278: 68fa ldr r2, [r7, #12]
800d27a: 687b ldr r3, [r7, #4]
800d27c: 4413 add r3, r2
800d27e: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800d280: 68fb ldr r3, [r7, #12]
800d282: 2b00 cmp r3, #0
800d284: d009 beq.n 800d29a <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800d286: 2208 movs r2, #8
800d288: 4909 ldr r1, [pc, #36] @ (800d2b0 <Get_SerialNum+0x50>)
800d28a: 68f8 ldr r0, [r7, #12]
800d28c: f000 f814 bl 800d2b8 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800d290: 2204 movs r2, #4
800d292: 4908 ldr r1, [pc, #32] @ (800d2b4 <Get_SerialNum+0x54>)
800d294: 68b8 ldr r0, [r7, #8]
800d296: f000 f80f bl 800d2b8 <IntToUnicode>
}
}
800d29a: bf00 nop
800d29c: 3710 adds r7, #16
800d29e: 46bd mov sp, r7
800d2a0: bd80 pop {r7, pc}
800d2a2: bf00 nop
800d2a4: 1ffff7e8 .word 0x1ffff7e8
800d2a8: 1ffff7ec .word 0x1ffff7ec
800d2ac: 1ffff7f0 .word 0x1ffff7f0
800d2b0: 2000016a .word 0x2000016a
800d2b4: 2000017a .word 0x2000017a
0800d2b8 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800d2b8: b480 push {r7}
800d2ba: b087 sub sp, #28
800d2bc: af00 add r7, sp, #0
800d2be: 60f8 str r0, [r7, #12]
800d2c0: 60b9 str r1, [r7, #8]
800d2c2: 4613 mov r3, r2
800d2c4: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800d2c6: 2300 movs r3, #0
800d2c8: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800d2ca: 2300 movs r3, #0
800d2cc: 75fb strb r3, [r7, #23]
800d2ce: e027 b.n 800d320 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800d2d0: 68fb ldr r3, [r7, #12]
800d2d2: 0f1b lsrs r3, r3, #28
800d2d4: 2b09 cmp r3, #9
800d2d6: d80b bhi.n 800d2f0 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800d2d8: 68fb ldr r3, [r7, #12]
800d2da: 0f1b lsrs r3, r3, #28
800d2dc: b2da uxtb r2, r3
800d2de: 7dfb ldrb r3, [r7, #23]
800d2e0: 005b lsls r3, r3, #1
800d2e2: 4619 mov r1, r3
800d2e4: 68bb ldr r3, [r7, #8]
800d2e6: 440b add r3, r1
800d2e8: 3230 adds r2, #48 @ 0x30
800d2ea: b2d2 uxtb r2, r2
800d2ec: 701a strb r2, [r3, #0]
800d2ee: e00a b.n 800d306 <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800d2f0: 68fb ldr r3, [r7, #12]
800d2f2: 0f1b lsrs r3, r3, #28
800d2f4: b2da uxtb r2, r3
800d2f6: 7dfb ldrb r3, [r7, #23]
800d2f8: 005b lsls r3, r3, #1
800d2fa: 4619 mov r1, r3
800d2fc: 68bb ldr r3, [r7, #8]
800d2fe: 440b add r3, r1
800d300: 3237 adds r2, #55 @ 0x37
800d302: b2d2 uxtb r2, r2
800d304: 701a strb r2, [r3, #0]
}
value = value << 4;
800d306: 68fb ldr r3, [r7, #12]
800d308: 011b lsls r3, r3, #4
800d30a: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800d30c: 7dfb ldrb r3, [r7, #23]
800d30e: 005b lsls r3, r3, #1
800d310: 3301 adds r3, #1
800d312: 68ba ldr r2, [r7, #8]
800d314: 4413 add r3, r2
800d316: 2200 movs r2, #0
800d318: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800d31a: 7dfb ldrb r3, [r7, #23]
800d31c: 3301 adds r3, #1
800d31e: 75fb strb r3, [r7, #23]
800d320: 7dfa ldrb r2, [r7, #23]
800d322: 79fb ldrb r3, [r7, #7]
800d324: 429a cmp r2, r3
800d326: d3d3 bcc.n 800d2d0 <IntToUnicode+0x18>
}
}
800d328: bf00 nop
800d32a: bf00 nop
800d32c: 371c adds r7, #28
800d32e: 46bd mov sp, r7
800d330: bc80 pop {r7}
800d332: 4770 bx lr
0800d334 <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800d334: b580 push {r7, lr}
800d336: b084 sub sp, #16
800d338: af00 add r7, sp, #0
800d33a: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800d33c: 687b ldr r3, [r7, #4]
800d33e: 681b ldr r3, [r3, #0]
800d340: 4a0d ldr r2, [pc, #52] @ (800d378 <HAL_PCD_MspInit+0x44>)
800d342: 4293 cmp r3, r2
800d344: d113 bne.n 800d36e <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800d346: 4b0d ldr r3, [pc, #52] @ (800d37c <HAL_PCD_MspInit+0x48>)
800d348: 69db ldr r3, [r3, #28]
800d34a: 4a0c ldr r2, [pc, #48] @ (800d37c <HAL_PCD_MspInit+0x48>)
800d34c: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800d350: 61d3 str r3, [r2, #28]
800d352: 4b0a ldr r3, [pc, #40] @ (800d37c <HAL_PCD_MspInit+0x48>)
800d354: 69db ldr r3, [r3, #28]
800d356: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800d35a: 60fb str r3, [r7, #12]
800d35c: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800d35e: 2200 movs r2, #0
800d360: 2100 movs r1, #0
800d362: 2014 movs r0, #20
800d364: f7f7 fdc3 bl 8004eee <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800d368: 2014 movs r0, #20
800d36a: f7f7 fddc bl 8004f26 <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800d36e: bf00 nop
800d370: 3710 adds r7, #16
800d372: 46bd mov sp, r7
800d374: bd80 pop {r7, pc}
800d376: bf00 nop
800d378: 40005c00 .word 0x40005c00
800d37c: 40021000 .word 0x40021000
0800d380 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d380: b580 push {r7, lr}
800d382: b082 sub sp, #8
800d384: af00 add r7, sp, #0
800d386: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800d388: 687b ldr r3, [r7, #4]
800d38a: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800d38e: 687b ldr r3, [r7, #4]
800d390: f503 7326 add.w r3, r3, #664 @ 0x298
800d394: 4619 mov r1, r3
800d396: 4610 mov r0, r2
800d398: f7fe fd51 bl 800be3e <USBD_LL_SetupStage>
}
800d39c: bf00 nop
800d39e: 3708 adds r7, #8
800d3a0: 46bd mov sp, r7
800d3a2: bd80 pop {r7, pc}
0800d3a4 <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d3a4: b580 push {r7, lr}
800d3a6: b082 sub sp, #8
800d3a8: af00 add r7, sp, #0
800d3aa: 6078 str r0, [r7, #4]
800d3ac: 460b mov r3, r1
800d3ae: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800d3b0: 687b ldr r3, [r7, #4]
800d3b2: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800d3b6: 78fa ldrb r2, [r7, #3]
800d3b8: 6879 ldr r1, [r7, #4]
800d3ba: 4613 mov r3, r2
800d3bc: 009b lsls r3, r3, #2
800d3be: 4413 add r3, r2
800d3c0: 00db lsls r3, r3, #3
800d3c2: 440b add r3, r1
800d3c4: f503 73b2 add.w r3, r3, #356 @ 0x164
800d3c8: 681a ldr r2, [r3, #0]
800d3ca: 78fb ldrb r3, [r7, #3]
800d3cc: 4619 mov r1, r3
800d3ce: f7fe fd83 bl 800bed8 <USBD_LL_DataOutStage>
}
800d3d2: bf00 nop
800d3d4: 3708 adds r7, #8
800d3d6: 46bd mov sp, r7
800d3d8: bd80 pop {r7, pc}
0800d3da <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d3da: b580 push {r7, lr}
800d3dc: b082 sub sp, #8
800d3de: af00 add r7, sp, #0
800d3e0: 6078 str r0, [r7, #4]
800d3e2: 460b mov r3, r1
800d3e4: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800d3e6: 687b ldr r3, [r7, #4]
800d3e8: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800d3ec: 78fa ldrb r2, [r7, #3]
800d3ee: 6879 ldr r1, [r7, #4]
800d3f0: 4613 mov r3, r2
800d3f2: 009b lsls r3, r3, #2
800d3f4: 4413 add r3, r2
800d3f6: 00db lsls r3, r3, #3
800d3f8: 440b add r3, r1
800d3fa: 3324 adds r3, #36 @ 0x24
800d3fc: 681a ldr r2, [r3, #0]
800d3fe: 78fb ldrb r3, [r7, #3]
800d400: 4619 mov r1, r3
800d402: f7fe fdda bl 800bfba <USBD_LL_DataInStage>
}
800d406: bf00 nop
800d408: 3708 adds r7, #8
800d40a: 46bd mov sp, r7
800d40c: bd80 pop {r7, pc}
0800d40e <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d40e: b580 push {r7, lr}
800d410: b082 sub sp, #8
800d412: af00 add r7, sp, #0
800d414: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800d416: 687b ldr r3, [r7, #4]
800d418: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d41c: 4618 mov r0, r3
800d41e: f7fe feea bl 800c1f6 <USBD_LL_SOF>
}
800d422: bf00 nop
800d424: 3708 adds r7, #8
800d426: 46bd mov sp, r7
800d428: bd80 pop {r7, pc}
0800d42a <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d42a: b580 push {r7, lr}
800d42c: b084 sub sp, #16
800d42e: af00 add r7, sp, #0
800d430: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800d432: 2301 movs r3, #1
800d434: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800d436: 687b ldr r3, [r7, #4]
800d438: 799b ldrb r3, [r3, #6]
800d43a: 2b02 cmp r3, #2
800d43c: d001 beq.n 800d442 <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800d43e: f7f5 fc7d bl 8002d3c <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800d442: 687b ldr r3, [r7, #4]
800d444: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d448: 7bfa ldrb r2, [r7, #15]
800d44a: 4611 mov r1, r2
800d44c: 4618 mov r0, r3
800d44e: f7fe fe9a bl 800c186 <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800d452: 687b ldr r3, [r7, #4]
800d454: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d458: 4618 mov r0, r3
800d45a: f7fe fe53 bl 800c104 <USBD_LL_Reset>
}
800d45e: bf00 nop
800d460: 3710 adds r7, #16
800d462: 46bd mov sp, r7
800d464: bd80 pop {r7, pc}
...
0800d468 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d468: b580 push {r7, lr}
800d46a: b082 sub sp, #8
800d46c: af00 add r7, sp, #0
800d46e: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800d470: 687b ldr r3, [r7, #4]
800d472: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d476: 4618 mov r0, r3
800d478: f7fe fe94 bl 800c1a4 <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800d47c: 687b ldr r3, [r7, #4]
800d47e: 7a9b ldrb r3, [r3, #10]
800d480: 2b00 cmp r3, #0
800d482: d005 beq.n 800d490 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800d484: 4b04 ldr r3, [pc, #16] @ (800d498 <HAL_PCD_SuspendCallback+0x30>)
800d486: 691b ldr r3, [r3, #16]
800d488: 4a03 ldr r2, [pc, #12] @ (800d498 <HAL_PCD_SuspendCallback+0x30>)
800d48a: f043 0306 orr.w r3, r3, #6
800d48e: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800d490: bf00 nop
800d492: 3708 adds r7, #8
800d494: 46bd mov sp, r7
800d496: bd80 pop {r7, pc}
800d498: e000ed00 .word 0xe000ed00
0800d49c <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d49c: b580 push {r7, lr}
800d49e: b082 sub sp, #8
800d4a0: af00 add r7, sp, #0
800d4a2: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800d4a4: 687b ldr r3, [r7, #4]
800d4a6: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800d4aa: 4618 mov r0, r3
800d4ac: f7fe fe8e bl 800c1cc <USBD_LL_Resume>
}
800d4b0: bf00 nop
800d4b2: 3708 adds r7, #8
800d4b4: 46bd mov sp, r7
800d4b6: bd80 pop {r7, pc}
0800d4b8 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800d4b8: b580 push {r7, lr}
800d4ba: b082 sub sp, #8
800d4bc: af00 add r7, sp, #0
800d4be: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800d4c0: 4a28 ldr r2, [pc, #160] @ (800d564 <USBD_LL_Init+0xac>)
800d4c2: 687b ldr r3, [r7, #4]
800d4c4: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800d4c8: 687b ldr r3, [r7, #4]
800d4ca: 4a26 ldr r2, [pc, #152] @ (800d564 <USBD_LL_Init+0xac>)
800d4cc: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800d4d0: 4b24 ldr r3, [pc, #144] @ (800d564 <USBD_LL_Init+0xac>)
800d4d2: 4a25 ldr r2, [pc, #148] @ (800d568 <USBD_LL_Init+0xb0>)
800d4d4: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800d4d6: 4b23 ldr r3, [pc, #140] @ (800d564 <USBD_LL_Init+0xac>)
800d4d8: 2208 movs r2, #8
800d4da: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800d4dc: 4b21 ldr r3, [pc, #132] @ (800d564 <USBD_LL_Init+0xac>)
800d4de: 2202 movs r2, #2
800d4e0: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800d4e2: 4b20 ldr r3, [pc, #128] @ (800d564 <USBD_LL_Init+0xac>)
800d4e4: 2200 movs r2, #0
800d4e6: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800d4e8: 4b1e ldr r3, [pc, #120] @ (800d564 <USBD_LL_Init+0xac>)
800d4ea: 2200 movs r2, #0
800d4ec: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800d4ee: 4b1d ldr r3, [pc, #116] @ (800d564 <USBD_LL_Init+0xac>)
800d4f0: 2200 movs r2, #0
800d4f2: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800d4f4: 481b ldr r0, [pc, #108] @ (800d564 <USBD_LL_Init+0xac>)
800d4f6: f7f8 faf1 bl 8005adc <HAL_PCD_Init>
800d4fa: 4603 mov r3, r0
800d4fc: 2b00 cmp r3, #0
800d4fe: d001 beq.n 800d504 <USBD_LL_Init+0x4c>
{
Error_Handler( );
800d500: f7f5 fc1c bl 8002d3c <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800d504: 687b ldr r3, [r7, #4]
800d506: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d50a: 2318 movs r3, #24
800d50c: 2200 movs r2, #0
800d50e: 2100 movs r1, #0
800d510: f7fa f802 bl 8007518 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800d514: 687b ldr r3, [r7, #4]
800d516: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d51a: 2358 movs r3, #88 @ 0x58
800d51c: 2200 movs r2, #0
800d51e: 2180 movs r1, #128 @ 0x80
800d520: f7f9 fffa bl 8007518 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800d524: 687b ldr r3, [r7, #4]
800d526: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d52a: 23c0 movs r3, #192 @ 0xc0
800d52c: 2200 movs r2, #0
800d52e: 2181 movs r1, #129 @ 0x81
800d530: f7f9 fff2 bl 8007518 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800d534: 687b ldr r3, [r7, #4]
800d536: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d53a: f44f 7388 mov.w r3, #272 @ 0x110
800d53e: 2200 movs r2, #0
800d540: 2101 movs r1, #1
800d542: f7f9 ffe9 bl 8007518 <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800d546: 687b ldr r3, [r7, #4]
800d548: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d54c: f44f 7380 mov.w r3, #256 @ 0x100
800d550: 2200 movs r2, #0
800d552: 2182 movs r1, #130 @ 0x82
800d554: f7f9 ffe0 bl 8007518 <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800d558: 2300 movs r3, #0
}
800d55a: 4618 mov r0, r3
800d55c: 3708 adds r7, #8
800d55e: 46bd mov sp, r7
800d560: bd80 pop {r7, pc}
800d562: bf00 nop
800d564: 20001254 .word 0x20001254
800d568: 40005c00 .word 0x40005c00
0800d56c <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800d56c: b580 push {r7, lr}
800d56e: b084 sub sp, #16
800d570: af00 add r7, sp, #0
800d572: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800d574: 2300 movs r3, #0
800d576: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800d578: 2300 movs r3, #0
800d57a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800d57c: 687b ldr r3, [r7, #4]
800d57e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800d582: 4618 mov r0, r3
800d584: f7f8 fba0 bl 8005cc8 <HAL_PCD_Start>
800d588: 4603 mov r3, r0
800d58a: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800d58c: 7bfb ldrb r3, [r7, #15]
800d58e: 4618 mov r0, r3
800d590: f000 f94e bl 800d830 <USBD_Get_USB_Status>
800d594: 4603 mov r3, r0
800d596: 73bb strb r3, [r7, #14]
return usb_status;
800d598: 7bbb ldrb r3, [r7, #14]
}
800d59a: 4618 mov r0, r3
800d59c: 3710 adds r7, #16
800d59e: 46bd mov sp, r7
800d5a0: bd80 pop {r7, pc}
0800d5a2 <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800d5a2: b580 push {r7, lr}
800d5a4: b084 sub sp, #16
800d5a6: af00 add r7, sp, #0
800d5a8: 6078 str r0, [r7, #4]
800d5aa: 4608 mov r0, r1
800d5ac: 4611 mov r1, r2
800d5ae: 461a mov r2, r3
800d5b0: 4603 mov r3, r0
800d5b2: 70fb strb r3, [r7, #3]
800d5b4: 460b mov r3, r1
800d5b6: 70bb strb r3, [r7, #2]
800d5b8: 4613 mov r3, r2
800d5ba: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800d5bc: 2300 movs r3, #0
800d5be: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800d5c0: 2300 movs r3, #0
800d5c2: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800d5c4: 687b ldr r3, [r7, #4]
800d5c6: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d5ca: 78bb ldrb r3, [r7, #2]
800d5cc: 883a ldrh r2, [r7, #0]
800d5ce: 78f9 ldrb r1, [r7, #3]
800d5d0: f7f8 fcf4 bl 8005fbc <HAL_PCD_EP_Open>
800d5d4: 4603 mov r3, r0
800d5d6: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800d5d8: 7bfb ldrb r3, [r7, #15]
800d5da: 4618 mov r0, r3
800d5dc: f000 f928 bl 800d830 <USBD_Get_USB_Status>
800d5e0: 4603 mov r3, r0
800d5e2: 73bb strb r3, [r7, #14]
return usb_status;
800d5e4: 7bbb ldrb r3, [r7, #14]
}
800d5e6: 4618 mov r0, r3
800d5e8: 3710 adds r7, #16
800d5ea: 46bd mov sp, r7
800d5ec: bd80 pop {r7, pc}
0800d5ee <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800d5ee: b580 push {r7, lr}
800d5f0: b084 sub sp, #16
800d5f2: af00 add r7, sp, #0
800d5f4: 6078 str r0, [r7, #4]
800d5f6: 460b mov r3, r1
800d5f8: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800d5fa: 2300 movs r3, #0
800d5fc: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800d5fe: 2300 movs r3, #0
800d600: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800d602: 687b ldr r3, [r7, #4]
800d604: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800d608: 78fa ldrb r2, [r7, #3]
800d60a: 4611 mov r1, r2
800d60c: 4618 mov r0, r3
800d60e: f7f8 fd32 bl 8006076 <HAL_PCD_EP_Close>
800d612: 4603 mov r3, r0
800d614: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800d616: 7bfb ldrb r3, [r7, #15]
800d618: 4618 mov r0, r3
800d61a: f000 f909 bl 800d830 <USBD_Get_USB_Status>
800d61e: 4603 mov r3, r0
800d620: 73bb strb r3, [r7, #14]
return usb_status;
800d622: 7bbb ldrb r3, [r7, #14]
}
800d624: 4618 mov r0, r3
800d626: 3710 adds r7, #16
800d628: 46bd mov sp, r7
800d62a: bd80 pop {r7, pc}
0800d62c <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800d62c: b580 push {r7, lr}
800d62e: b084 sub sp, #16
800d630: af00 add r7, sp, #0
800d632: 6078 str r0, [r7, #4]
800d634: 460b mov r3, r1
800d636: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800d638: 2300 movs r3, #0
800d63a: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800d63c: 2300 movs r3, #0
800d63e: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800d640: 687b ldr r3, [r7, #4]
800d642: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800d646: 78fa ldrb r2, [r7, #3]
800d648: 4611 mov r1, r2
800d64a: 4618 mov r0, r3
800d64c: f7f8 fdda bl 8006204 <HAL_PCD_EP_SetStall>
800d650: 4603 mov r3, r0
800d652: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800d654: 7bfb ldrb r3, [r7, #15]
800d656: 4618 mov r0, r3
800d658: f000 f8ea bl 800d830 <USBD_Get_USB_Status>
800d65c: 4603 mov r3, r0
800d65e: 73bb strb r3, [r7, #14]
return usb_status;
800d660: 7bbb ldrb r3, [r7, #14]
}
800d662: 4618 mov r0, r3
800d664: 3710 adds r7, #16
800d666: 46bd mov sp, r7
800d668: bd80 pop {r7, pc}
0800d66a <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800d66a: b580 push {r7, lr}
800d66c: b084 sub sp, #16
800d66e: af00 add r7, sp, #0
800d670: 6078 str r0, [r7, #4]
800d672: 460b mov r3, r1
800d674: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800d676: 2300 movs r3, #0
800d678: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800d67a: 2300 movs r3, #0
800d67c: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800d67e: 687b ldr r3, [r7, #4]
800d680: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800d684: 78fa ldrb r2, [r7, #3]
800d686: 4611 mov r1, r2
800d688: 4618 mov r0, r3
800d68a: f7f8 fe1b bl 80062c4 <HAL_PCD_EP_ClrStall>
800d68e: 4603 mov r3, r0
800d690: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800d692: 7bfb ldrb r3, [r7, #15]
800d694: 4618 mov r0, r3
800d696: f000 f8cb bl 800d830 <USBD_Get_USB_Status>
800d69a: 4603 mov r3, r0
800d69c: 73bb strb r3, [r7, #14]
return usb_status;
800d69e: 7bbb ldrb r3, [r7, #14]
}
800d6a0: 4618 mov r0, r3
800d6a2: 3710 adds r7, #16
800d6a4: 46bd mov sp, r7
800d6a6: bd80 pop {r7, pc}
0800d6a8 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800d6a8: b480 push {r7}
800d6aa: b085 sub sp, #20
800d6ac: af00 add r7, sp, #0
800d6ae: 6078 str r0, [r7, #4]
800d6b0: 460b mov r3, r1
800d6b2: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800d6b4: 687b ldr r3, [r7, #4]
800d6b6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800d6ba: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800d6bc: f997 3003 ldrsb.w r3, [r7, #3]
800d6c0: 2b00 cmp r3, #0
800d6c2: da0b bge.n 800d6dc <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800d6c4: 78fb ldrb r3, [r7, #3]
800d6c6: f003 027f and.w r2, r3, #127 @ 0x7f
800d6ca: 68f9 ldr r1, [r7, #12]
800d6cc: 4613 mov r3, r2
800d6ce: 009b lsls r3, r3, #2
800d6d0: 4413 add r3, r2
800d6d2: 00db lsls r3, r3, #3
800d6d4: 440b add r3, r1
800d6d6: 3312 adds r3, #18
800d6d8: 781b ldrb r3, [r3, #0]
800d6da: e00b b.n 800d6f4 <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800d6dc: 78fb ldrb r3, [r7, #3]
800d6de: f003 027f and.w r2, r3, #127 @ 0x7f
800d6e2: 68f9 ldr r1, [r7, #12]
800d6e4: 4613 mov r3, r2
800d6e6: 009b lsls r3, r3, #2
800d6e8: 4413 add r3, r2
800d6ea: 00db lsls r3, r3, #3
800d6ec: 440b add r3, r1
800d6ee: f503 73a9 add.w r3, r3, #338 @ 0x152
800d6f2: 781b ldrb r3, [r3, #0]
}
}
800d6f4: 4618 mov r0, r3
800d6f6: 3714 adds r7, #20
800d6f8: 46bd mov sp, r7
800d6fa: bc80 pop {r7}
800d6fc: 4770 bx lr
0800d6fe <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800d6fe: b580 push {r7, lr}
800d700: b084 sub sp, #16
800d702: af00 add r7, sp, #0
800d704: 6078 str r0, [r7, #4]
800d706: 460b mov r3, r1
800d708: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800d70a: 2300 movs r3, #0
800d70c: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800d70e: 2300 movs r3, #0
800d710: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800d712: 687b ldr r3, [r7, #4]
800d714: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800d718: 78fa ldrb r2, [r7, #3]
800d71a: 4611 mov r1, r2
800d71c: 4618 mov r0, r3
800d71e: f7f8 fc29 bl 8005f74 <HAL_PCD_SetAddress>
800d722: 4603 mov r3, r0
800d724: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800d726: 7bfb ldrb r3, [r7, #15]
800d728: 4618 mov r0, r3
800d72a: f000 f881 bl 800d830 <USBD_Get_USB_Status>
800d72e: 4603 mov r3, r0
800d730: 73bb strb r3, [r7, #14]
return usb_status;
800d732: 7bbb ldrb r3, [r7, #14]
}
800d734: 4618 mov r0, r3
800d736: 3710 adds r7, #16
800d738: 46bd mov sp, r7
800d73a: bd80 pop {r7, pc}
0800d73c <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800d73c: b580 push {r7, lr}
800d73e: b086 sub sp, #24
800d740: af00 add r7, sp, #0
800d742: 60f8 str r0, [r7, #12]
800d744: 607a str r2, [r7, #4]
800d746: 461a mov r2, r3
800d748: 460b mov r3, r1
800d74a: 72fb strb r3, [r7, #11]
800d74c: 4613 mov r3, r2
800d74e: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800d750: 2300 movs r3, #0
800d752: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800d754: 2300 movs r3, #0
800d756: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800d758: 68fb ldr r3, [r7, #12]
800d75a: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d75e: 893b ldrh r3, [r7, #8]
800d760: 7af9 ldrb r1, [r7, #11]
800d762: 687a ldr r2, [r7, #4]
800d764: f7f8 fd17 bl 8006196 <HAL_PCD_EP_Transmit>
800d768: 4603 mov r3, r0
800d76a: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800d76c: 7dfb ldrb r3, [r7, #23]
800d76e: 4618 mov r0, r3
800d770: f000 f85e bl 800d830 <USBD_Get_USB_Status>
800d774: 4603 mov r3, r0
800d776: 75bb strb r3, [r7, #22]
return usb_status;
800d778: 7dbb ldrb r3, [r7, #22]
}
800d77a: 4618 mov r0, r3
800d77c: 3718 adds r7, #24
800d77e: 46bd mov sp, r7
800d780: bd80 pop {r7, pc}
0800d782 <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800d782: b580 push {r7, lr}
800d784: b086 sub sp, #24
800d786: af00 add r7, sp, #0
800d788: 60f8 str r0, [r7, #12]
800d78a: 607a str r2, [r7, #4]
800d78c: 461a mov r2, r3
800d78e: 460b mov r3, r1
800d790: 72fb strb r3, [r7, #11]
800d792: 4613 mov r3, r2
800d794: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800d796: 2300 movs r3, #0
800d798: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800d79a: 2300 movs r3, #0
800d79c: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800d79e: 68fb ldr r3, [r7, #12]
800d7a0: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800d7a4: 893b ldrh r3, [r7, #8]
800d7a6: 7af9 ldrb r1, [r7, #11]
800d7a8: 687a ldr r2, [r7, #4]
800d7aa: f7f8 fcac bl 8006106 <HAL_PCD_EP_Receive>
800d7ae: 4603 mov r3, r0
800d7b0: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800d7b2: 7dfb ldrb r3, [r7, #23]
800d7b4: 4618 mov r0, r3
800d7b6: f000 f83b bl 800d830 <USBD_Get_USB_Status>
800d7ba: 4603 mov r3, r0
800d7bc: 75bb strb r3, [r7, #22]
return usb_status;
800d7be: 7dbb ldrb r3, [r7, #22]
}
800d7c0: 4618 mov r0, r3
800d7c2: 3718 adds r7, #24
800d7c4: 46bd mov sp, r7
800d7c6: bd80 pop {r7, pc}
0800d7c8 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800d7c8: b580 push {r7, lr}
800d7ca: b082 sub sp, #8
800d7cc: af00 add r7, sp, #0
800d7ce: 6078 str r0, [r7, #4]
800d7d0: 460b mov r3, r1
800d7d2: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800d7d4: 687b ldr r3, [r7, #4]
800d7d6: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800d7da: 78fa ldrb r2, [r7, #3]
800d7dc: 4611 mov r1, r2
800d7de: 4618 mov r0, r3
800d7e0: f7f8 fcc2 bl 8006168 <HAL_PCD_EP_GetRxCount>
800d7e4: 4603 mov r3, r0
}
800d7e6: 4618 mov r0, r3
800d7e8: 3708 adds r7, #8
800d7ea: 46bd mov sp, r7
800d7ec: bd80 pop {r7, pc}
...
0800d7f0 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800d7f0: b480 push {r7}
800d7f2: b083 sub sp, #12
800d7f4: af00 add r7, sp, #0
800d7f6: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800d7f8: 4b02 ldr r3, [pc, #8] @ (800d804 <USBD_static_malloc+0x14>)
}
800d7fa: 4618 mov r0, r3
800d7fc: 370c adds r7, #12
800d7fe: 46bd mov sp, r7
800d800: bc80 pop {r7}
800d802: 4770 bx lr
800d804: 2000152c .word 0x2000152c
0800d808 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800d808: b480 push {r7}
800d80a: b083 sub sp, #12
800d80c: af00 add r7, sp, #0
800d80e: 6078 str r0, [r7, #4]
}
800d810: bf00 nop
800d812: 370c adds r7, #12
800d814: 46bd mov sp, r7
800d816: bc80 pop {r7}
800d818: 4770 bx lr
0800d81a <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800d81a: b480 push {r7}
800d81c: b083 sub sp, #12
800d81e: af00 add r7, sp, #0
800d820: 6078 str r0, [r7, #4]
800d822: 460b mov r3, r1
800d824: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800d826: bf00 nop
800d828: 370c adds r7, #12
800d82a: 46bd mov sp, r7
800d82c: bc80 pop {r7}
800d82e: 4770 bx lr
0800d830 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800d830: b480 push {r7}
800d832: b085 sub sp, #20
800d834: af00 add r7, sp, #0
800d836: 4603 mov r3, r0
800d838: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800d83a: 2300 movs r3, #0
800d83c: 73fb strb r3, [r7, #15]
switch (hal_status)
800d83e: 79fb ldrb r3, [r7, #7]
800d840: 2b03 cmp r3, #3
800d842: d817 bhi.n 800d874 <USBD_Get_USB_Status+0x44>
800d844: a201 add r2, pc, #4 @ (adr r2, 800d84c <USBD_Get_USB_Status+0x1c>)
800d846: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d84a: bf00 nop
800d84c: 0800d85d .word 0x0800d85d
800d850: 0800d863 .word 0x0800d863
800d854: 0800d869 .word 0x0800d869
800d858: 0800d86f .word 0x0800d86f
{
case HAL_OK :
usb_status = USBD_OK;
800d85c: 2300 movs r3, #0
800d85e: 73fb strb r3, [r7, #15]
break;
800d860: e00b b.n 800d87a <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800d862: 2302 movs r3, #2
800d864: 73fb strb r3, [r7, #15]
break;
800d866: e008 b.n 800d87a <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800d868: 2301 movs r3, #1
800d86a: 73fb strb r3, [r7, #15]
break;
800d86c: e005 b.n 800d87a <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800d86e: 2302 movs r3, #2
800d870: 73fb strb r3, [r7, #15]
break;
800d872: e002 b.n 800d87a <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800d874: 2302 movs r3, #2
800d876: 73fb strb r3, [r7, #15]
break;
800d878: bf00 nop
}
return usb_status;
800d87a: 7bfb ldrb r3, [r7, #15]
}
800d87c: 4618 mov r0, r3
800d87e: 3714 adds r7, #20
800d880: 46bd mov sp, r7
800d882: bc80 pop {r7}
800d884: 4770 bx lr
800d886: bf00 nop
0800d888 <siprintf>:
800d888: b40e push {r1, r2, r3}
800d88a: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800d88e: b510 push {r4, lr}
800d890: 2400 movs r4, #0
800d892: b09d sub sp, #116 @ 0x74
800d894: ab1f add r3, sp, #124 @ 0x7c
800d896: 9002 str r0, [sp, #8]
800d898: 9006 str r0, [sp, #24]
800d89a: 9107 str r1, [sp, #28]
800d89c: 9104 str r1, [sp, #16]
800d89e: 4809 ldr r0, [pc, #36] @ (800d8c4 <siprintf+0x3c>)
800d8a0: 4909 ldr r1, [pc, #36] @ (800d8c8 <siprintf+0x40>)
800d8a2: f853 2b04 ldr.w r2, [r3], #4
800d8a6: 9105 str r1, [sp, #20]
800d8a8: 6800 ldr r0, [r0, #0]
800d8aa: a902 add r1, sp, #8
800d8ac: 9301 str r3, [sp, #4]
800d8ae: 941b str r4, [sp, #108] @ 0x6c
800d8b0: f000 f992 bl 800dbd8 <_svfiprintf_r>
800d8b4: 9b02 ldr r3, [sp, #8]
800d8b6: 701c strb r4, [r3, #0]
800d8b8: b01d add sp, #116 @ 0x74
800d8ba: e8bd 4010 ldmia.w sp!, {r4, lr}
800d8be: b003 add sp, #12
800d8c0: 4770 bx lr
800d8c2: bf00 nop
800d8c4: 20000184 .word 0x20000184
800d8c8: ffff0208 .word 0xffff0208
0800d8cc <memset>:
800d8cc: 4603 mov r3, r0
800d8ce: 4402 add r2, r0
800d8d0: 4293 cmp r3, r2
800d8d2: d100 bne.n 800d8d6 <memset+0xa>
800d8d4: 4770 bx lr
800d8d6: f803 1b01 strb.w r1, [r3], #1
800d8da: e7f9 b.n 800d8d0 <memset+0x4>
0800d8dc <__errno>:
800d8dc: 4b01 ldr r3, [pc, #4] @ (800d8e4 <__errno+0x8>)
800d8de: 6818 ldr r0, [r3, #0]
800d8e0: 4770 bx lr
800d8e2: bf00 nop
800d8e4: 20000184 .word 0x20000184
0800d8e8 <__libc_init_array>:
800d8e8: b570 push {r4, r5, r6, lr}
800d8ea: 2600 movs r6, #0
800d8ec: 4d0c ldr r5, [pc, #48] @ (800d920 <__libc_init_array+0x38>)
800d8ee: 4c0d ldr r4, [pc, #52] @ (800d924 <__libc_init_array+0x3c>)
800d8f0: 1b64 subs r4, r4, r5
800d8f2: 10a4 asrs r4, r4, #2
800d8f4: 42a6 cmp r6, r4
800d8f6: d109 bne.n 800d90c <__libc_init_array+0x24>
800d8f8: f000 fc76 bl 800e1e8 <_init>
800d8fc: 2600 movs r6, #0
800d8fe: 4d0a ldr r5, [pc, #40] @ (800d928 <__libc_init_array+0x40>)
800d900: 4c0a ldr r4, [pc, #40] @ (800d92c <__libc_init_array+0x44>)
800d902: 1b64 subs r4, r4, r5
800d904: 10a4 asrs r4, r4, #2
800d906: 42a6 cmp r6, r4
800d908: d105 bne.n 800d916 <__libc_init_array+0x2e>
800d90a: bd70 pop {r4, r5, r6, pc}
800d90c: f855 3b04 ldr.w r3, [r5], #4
800d910: 4798 blx r3
800d912: 3601 adds r6, #1
800d914: e7ee b.n 800d8f4 <__libc_init_array+0xc>
800d916: f855 3b04 ldr.w r3, [r5], #4
800d91a: 4798 blx r3
800d91c: 3601 adds r6, #1
800d91e: e7f2 b.n 800d906 <__libc_init_array+0x1e>
800d920: 0800e6d4 .word 0x0800e6d4
800d924: 0800e6d4 .word 0x0800e6d4
800d928: 0800e6d4 .word 0x0800e6d4
800d92c: 0800e6d8 .word 0x0800e6d8
0800d930 <__retarget_lock_acquire_recursive>:
800d930: 4770 bx lr
0800d932 <__retarget_lock_release_recursive>:
800d932: 4770 bx lr
0800d934 <_free_r>:
800d934: b538 push {r3, r4, r5, lr}
800d936: 4605 mov r5, r0
800d938: 2900 cmp r1, #0
800d93a: d040 beq.n 800d9be <_free_r+0x8a>
800d93c: f851 3c04 ldr.w r3, [r1, #-4]
800d940: 1f0c subs r4, r1, #4
800d942: 2b00 cmp r3, #0
800d944: bfb8 it lt
800d946: 18e4 addlt r4, r4, r3
800d948: f000 f8de bl 800db08 <__malloc_lock>
800d94c: 4a1c ldr r2, [pc, #112] @ (800d9c0 <_free_r+0x8c>)
800d94e: 6813 ldr r3, [r2, #0]
800d950: b933 cbnz r3, 800d960 <_free_r+0x2c>
800d952: 6063 str r3, [r4, #4]
800d954: 6014 str r4, [r2, #0]
800d956: 4628 mov r0, r5
800d958: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800d95c: f000 b8da b.w 800db14 <__malloc_unlock>
800d960: 42a3 cmp r3, r4
800d962: d908 bls.n 800d976 <_free_r+0x42>
800d964: 6820 ldr r0, [r4, #0]
800d966: 1821 adds r1, r4, r0
800d968: 428b cmp r3, r1
800d96a: bf01 itttt eq
800d96c: 6819 ldreq r1, [r3, #0]
800d96e: 685b ldreq r3, [r3, #4]
800d970: 1809 addeq r1, r1, r0
800d972: 6021 streq r1, [r4, #0]
800d974: e7ed b.n 800d952 <_free_r+0x1e>
800d976: 461a mov r2, r3
800d978: 685b ldr r3, [r3, #4]
800d97a: b10b cbz r3, 800d980 <_free_r+0x4c>
800d97c: 42a3 cmp r3, r4
800d97e: d9fa bls.n 800d976 <_free_r+0x42>
800d980: 6811 ldr r1, [r2, #0]
800d982: 1850 adds r0, r2, r1
800d984: 42a0 cmp r0, r4
800d986: d10b bne.n 800d9a0 <_free_r+0x6c>
800d988: 6820 ldr r0, [r4, #0]
800d98a: 4401 add r1, r0
800d98c: 1850 adds r0, r2, r1
800d98e: 4283 cmp r3, r0
800d990: 6011 str r1, [r2, #0]
800d992: d1e0 bne.n 800d956 <_free_r+0x22>
800d994: 6818 ldr r0, [r3, #0]
800d996: 685b ldr r3, [r3, #4]
800d998: 4408 add r0, r1
800d99a: 6010 str r0, [r2, #0]
800d99c: 6053 str r3, [r2, #4]
800d99e: e7da b.n 800d956 <_free_r+0x22>
800d9a0: d902 bls.n 800d9a8 <_free_r+0x74>
800d9a2: 230c movs r3, #12
800d9a4: 602b str r3, [r5, #0]
800d9a6: e7d6 b.n 800d956 <_free_r+0x22>
800d9a8: 6820 ldr r0, [r4, #0]
800d9aa: 1821 adds r1, r4, r0
800d9ac: 428b cmp r3, r1
800d9ae: bf01 itttt eq
800d9b0: 6819 ldreq r1, [r3, #0]
800d9b2: 685b ldreq r3, [r3, #4]
800d9b4: 1809 addeq r1, r1, r0
800d9b6: 6021 streq r1, [r4, #0]
800d9b8: 6063 str r3, [r4, #4]
800d9ba: 6054 str r4, [r2, #4]
800d9bc: e7cb b.n 800d956 <_free_r+0x22>
800d9be: bd38 pop {r3, r4, r5, pc}
800d9c0: 20001890 .word 0x20001890
0800d9c4 <sbrk_aligned>:
800d9c4: b570 push {r4, r5, r6, lr}
800d9c6: 4e0f ldr r6, [pc, #60] @ (800da04 <sbrk_aligned+0x40>)
800d9c8: 460c mov r4, r1
800d9ca: 6831 ldr r1, [r6, #0]
800d9cc: 4605 mov r5, r0
800d9ce: b911 cbnz r1, 800d9d6 <sbrk_aligned+0x12>
800d9d0: f000 fba8 bl 800e124 <_sbrk_r>
800d9d4: 6030 str r0, [r6, #0]
800d9d6: 4621 mov r1, r4
800d9d8: 4628 mov r0, r5
800d9da: f000 fba3 bl 800e124 <_sbrk_r>
800d9de: 1c43 adds r3, r0, #1
800d9e0: d103 bne.n 800d9ea <sbrk_aligned+0x26>
800d9e2: f04f 34ff mov.w r4, #4294967295
800d9e6: 4620 mov r0, r4
800d9e8: bd70 pop {r4, r5, r6, pc}
800d9ea: 1cc4 adds r4, r0, #3
800d9ec: f024 0403 bic.w r4, r4, #3
800d9f0: 42a0 cmp r0, r4
800d9f2: d0f8 beq.n 800d9e6 <sbrk_aligned+0x22>
800d9f4: 1a21 subs r1, r4, r0
800d9f6: 4628 mov r0, r5
800d9f8: f000 fb94 bl 800e124 <_sbrk_r>
800d9fc: 3001 adds r0, #1
800d9fe: d1f2 bne.n 800d9e6 <sbrk_aligned+0x22>
800da00: e7ef b.n 800d9e2 <sbrk_aligned+0x1e>
800da02: bf00 nop
800da04: 2000188c .word 0x2000188c
0800da08 <_malloc_r>:
800da08: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800da0c: 1ccd adds r5, r1, #3
800da0e: f025 0503 bic.w r5, r5, #3
800da12: 3508 adds r5, #8
800da14: 2d0c cmp r5, #12
800da16: bf38 it cc
800da18: 250c movcc r5, #12
800da1a: 2d00 cmp r5, #0
800da1c: 4606 mov r6, r0
800da1e: db01 blt.n 800da24 <_malloc_r+0x1c>
800da20: 42a9 cmp r1, r5
800da22: d904 bls.n 800da2e <_malloc_r+0x26>
800da24: 230c movs r3, #12
800da26: 6033 str r3, [r6, #0]
800da28: 2000 movs r0, #0
800da2a: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800da2e: f8df 80d4 ldr.w r8, [pc, #212] @ 800db04 <_malloc_r+0xfc>
800da32: f000 f869 bl 800db08 <__malloc_lock>
800da36: f8d8 3000 ldr.w r3, [r8]
800da3a: 461c mov r4, r3
800da3c: bb44 cbnz r4, 800da90 <_malloc_r+0x88>
800da3e: 4629 mov r1, r5
800da40: 4630 mov r0, r6
800da42: f7ff ffbf bl 800d9c4 <sbrk_aligned>
800da46: 1c43 adds r3, r0, #1
800da48: 4604 mov r4, r0
800da4a: d158 bne.n 800dafe <_malloc_r+0xf6>
800da4c: f8d8 4000 ldr.w r4, [r8]
800da50: 4627 mov r7, r4
800da52: 2f00 cmp r7, #0
800da54: d143 bne.n 800dade <_malloc_r+0xd6>
800da56: 2c00 cmp r4, #0
800da58: d04b beq.n 800daf2 <_malloc_r+0xea>
800da5a: 6823 ldr r3, [r4, #0]
800da5c: 4639 mov r1, r7
800da5e: 4630 mov r0, r6
800da60: eb04 0903 add.w r9, r4, r3
800da64: f000 fb5e bl 800e124 <_sbrk_r>
800da68: 4581 cmp r9, r0
800da6a: d142 bne.n 800daf2 <_malloc_r+0xea>
800da6c: 6821 ldr r1, [r4, #0]
800da6e: 4630 mov r0, r6
800da70: 1a6d subs r5, r5, r1
800da72: 4629 mov r1, r5
800da74: f7ff ffa6 bl 800d9c4 <sbrk_aligned>
800da78: 3001 adds r0, #1
800da7a: d03a beq.n 800daf2 <_malloc_r+0xea>
800da7c: 6823 ldr r3, [r4, #0]
800da7e: 442b add r3, r5
800da80: 6023 str r3, [r4, #0]
800da82: f8d8 3000 ldr.w r3, [r8]
800da86: 685a ldr r2, [r3, #4]
800da88: bb62 cbnz r2, 800dae4 <_malloc_r+0xdc>
800da8a: f8c8 7000 str.w r7, [r8]
800da8e: e00f b.n 800dab0 <_malloc_r+0xa8>
800da90: 6822 ldr r2, [r4, #0]
800da92: 1b52 subs r2, r2, r5
800da94: d420 bmi.n 800dad8 <_malloc_r+0xd0>
800da96: 2a0b cmp r2, #11
800da98: d917 bls.n 800daca <_malloc_r+0xc2>
800da9a: 1961 adds r1, r4, r5
800da9c: 42a3 cmp r3, r4
800da9e: 6025 str r5, [r4, #0]
800daa0: bf18 it ne
800daa2: 6059 strne r1, [r3, #4]
800daa4: 6863 ldr r3, [r4, #4]
800daa6: bf08 it eq
800daa8: f8c8 1000 streq.w r1, [r8]
800daac: 5162 str r2, [r4, r5]
800daae: 604b str r3, [r1, #4]
800dab0: 4630 mov r0, r6
800dab2: f000 f82f bl 800db14 <__malloc_unlock>
800dab6: f104 000b add.w r0, r4, #11
800daba: 1d23 adds r3, r4, #4
800dabc: f020 0007 bic.w r0, r0, #7
800dac0: 1ac2 subs r2, r0, r3
800dac2: bf1c itt ne
800dac4: 1a1b subne r3, r3, r0
800dac6: 50a3 strne r3, [r4, r2]
800dac8: e7af b.n 800da2a <_malloc_r+0x22>
800daca: 6862 ldr r2, [r4, #4]
800dacc: 42a3 cmp r3, r4
800dace: bf0c ite eq
800dad0: f8c8 2000 streq.w r2, [r8]
800dad4: 605a strne r2, [r3, #4]
800dad6: e7eb b.n 800dab0 <_malloc_r+0xa8>
800dad8: 4623 mov r3, r4
800dada: 6864 ldr r4, [r4, #4]
800dadc: e7ae b.n 800da3c <_malloc_r+0x34>
800dade: 463c mov r4, r7
800dae0: 687f ldr r7, [r7, #4]
800dae2: e7b6 b.n 800da52 <_malloc_r+0x4a>
800dae4: 461a mov r2, r3
800dae6: 685b ldr r3, [r3, #4]
800dae8: 42a3 cmp r3, r4
800daea: d1fb bne.n 800dae4 <_malloc_r+0xdc>
800daec: 2300 movs r3, #0
800daee: 6053 str r3, [r2, #4]
800daf0: e7de b.n 800dab0 <_malloc_r+0xa8>
800daf2: 230c movs r3, #12
800daf4: 4630 mov r0, r6
800daf6: 6033 str r3, [r6, #0]
800daf8: f000 f80c bl 800db14 <__malloc_unlock>
800dafc: e794 b.n 800da28 <_malloc_r+0x20>
800dafe: 6005 str r5, [r0, #0]
800db00: e7d6 b.n 800dab0 <_malloc_r+0xa8>
800db02: bf00 nop
800db04: 20001890 .word 0x20001890
0800db08 <__malloc_lock>:
800db08: 4801 ldr r0, [pc, #4] @ (800db10 <__malloc_lock+0x8>)
800db0a: f7ff bf11 b.w 800d930 <__retarget_lock_acquire_recursive>
800db0e: bf00 nop
800db10: 20001888 .word 0x20001888
0800db14 <__malloc_unlock>:
800db14: 4801 ldr r0, [pc, #4] @ (800db1c <__malloc_unlock+0x8>)
800db16: f7ff bf0c b.w 800d932 <__retarget_lock_release_recursive>
800db1a: bf00 nop
800db1c: 20001888 .word 0x20001888
0800db20 <__ssputs_r>:
800db20: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800db24: 461f mov r7, r3
800db26: 688e ldr r6, [r1, #8]
800db28: 4682 mov sl, r0
800db2a: 42be cmp r6, r7
800db2c: 460c mov r4, r1
800db2e: 4690 mov r8, r2
800db30: 680b ldr r3, [r1, #0]
800db32: d82d bhi.n 800db90 <__ssputs_r+0x70>
800db34: f9b1 200c ldrsh.w r2, [r1, #12]
800db38: f412 6f90 tst.w r2, #1152 @ 0x480
800db3c: d026 beq.n 800db8c <__ssputs_r+0x6c>
800db3e: 6965 ldr r5, [r4, #20]
800db40: 6909 ldr r1, [r1, #16]
800db42: eb05 0545 add.w r5, r5, r5, lsl #1
800db46: eba3 0901 sub.w r9, r3, r1
800db4a: eb05 75d5 add.w r5, r5, r5, lsr #31
800db4e: 1c7b adds r3, r7, #1
800db50: 444b add r3, r9
800db52: 106d asrs r5, r5, #1
800db54: 429d cmp r5, r3
800db56: bf38 it cc
800db58: 461d movcc r5, r3
800db5a: 0553 lsls r3, r2, #21
800db5c: d527 bpl.n 800dbae <__ssputs_r+0x8e>
800db5e: 4629 mov r1, r5
800db60: f7ff ff52 bl 800da08 <_malloc_r>
800db64: 4606 mov r6, r0
800db66: b360 cbz r0, 800dbc2 <__ssputs_r+0xa2>
800db68: 464a mov r2, r9
800db6a: 6921 ldr r1, [r4, #16]
800db6c: f000 faf8 bl 800e160 <memcpy>
800db70: 89a3 ldrh r3, [r4, #12]
800db72: f423 6390 bic.w r3, r3, #1152 @ 0x480
800db76: f043 0380 orr.w r3, r3, #128 @ 0x80
800db7a: 81a3 strh r3, [r4, #12]
800db7c: 6126 str r6, [r4, #16]
800db7e: 444e add r6, r9
800db80: 6026 str r6, [r4, #0]
800db82: 463e mov r6, r7
800db84: 6165 str r5, [r4, #20]
800db86: eba5 0509 sub.w r5, r5, r9
800db8a: 60a5 str r5, [r4, #8]
800db8c: 42be cmp r6, r7
800db8e: d900 bls.n 800db92 <__ssputs_r+0x72>
800db90: 463e mov r6, r7
800db92: 4632 mov r2, r6
800db94: 4641 mov r1, r8
800db96: 6820 ldr r0, [r4, #0]
800db98: f000 faaa bl 800e0f0 <memmove>
800db9c: 2000 movs r0, #0
800db9e: 68a3 ldr r3, [r4, #8]
800dba0: 1b9b subs r3, r3, r6
800dba2: 60a3 str r3, [r4, #8]
800dba4: 6823 ldr r3, [r4, #0]
800dba6: 4433 add r3, r6
800dba8: 6023 str r3, [r4, #0]
800dbaa: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800dbae: 462a mov r2, r5
800dbb0: f000 fae4 bl 800e17c <_realloc_r>
800dbb4: 4606 mov r6, r0
800dbb6: 2800 cmp r0, #0
800dbb8: d1e0 bne.n 800db7c <__ssputs_r+0x5c>
800dbba: 4650 mov r0, sl
800dbbc: 6921 ldr r1, [r4, #16]
800dbbe: f7ff feb9 bl 800d934 <_free_r>
800dbc2: 230c movs r3, #12
800dbc4: f8ca 3000 str.w r3, [sl]
800dbc8: 89a3 ldrh r3, [r4, #12]
800dbca: f04f 30ff mov.w r0, #4294967295
800dbce: f043 0340 orr.w r3, r3, #64 @ 0x40
800dbd2: 81a3 strh r3, [r4, #12]
800dbd4: e7e9 b.n 800dbaa <__ssputs_r+0x8a>
...
0800dbd8 <_svfiprintf_r>:
800dbd8: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800dbdc: 4698 mov r8, r3
800dbde: 898b ldrh r3, [r1, #12]
800dbe0: 4607 mov r7, r0
800dbe2: 061b lsls r3, r3, #24
800dbe4: 460d mov r5, r1
800dbe6: 4614 mov r4, r2
800dbe8: b09d sub sp, #116 @ 0x74
800dbea: d510 bpl.n 800dc0e <_svfiprintf_r+0x36>
800dbec: 690b ldr r3, [r1, #16]
800dbee: b973 cbnz r3, 800dc0e <_svfiprintf_r+0x36>
800dbf0: 2140 movs r1, #64 @ 0x40
800dbf2: f7ff ff09 bl 800da08 <_malloc_r>
800dbf6: 6028 str r0, [r5, #0]
800dbf8: 6128 str r0, [r5, #16]
800dbfa: b930 cbnz r0, 800dc0a <_svfiprintf_r+0x32>
800dbfc: 230c movs r3, #12
800dbfe: 603b str r3, [r7, #0]
800dc00: f04f 30ff mov.w r0, #4294967295
800dc04: b01d add sp, #116 @ 0x74
800dc06: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800dc0a: 2340 movs r3, #64 @ 0x40
800dc0c: 616b str r3, [r5, #20]
800dc0e: 2300 movs r3, #0
800dc10: 9309 str r3, [sp, #36] @ 0x24
800dc12: 2320 movs r3, #32
800dc14: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800dc18: 2330 movs r3, #48 @ 0x30
800dc1a: f04f 0901 mov.w r9, #1
800dc1e: f8cd 800c str.w r8, [sp, #12]
800dc22: f8df 8198 ldr.w r8, [pc, #408] @ 800ddbc <_svfiprintf_r+0x1e4>
800dc26: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800dc2a: 4623 mov r3, r4
800dc2c: 469a mov sl, r3
800dc2e: f813 2b01 ldrb.w r2, [r3], #1
800dc32: b10a cbz r2, 800dc38 <_svfiprintf_r+0x60>
800dc34: 2a25 cmp r2, #37 @ 0x25
800dc36: d1f9 bne.n 800dc2c <_svfiprintf_r+0x54>
800dc38: ebba 0b04 subs.w fp, sl, r4
800dc3c: d00b beq.n 800dc56 <_svfiprintf_r+0x7e>
800dc3e: 465b mov r3, fp
800dc40: 4622 mov r2, r4
800dc42: 4629 mov r1, r5
800dc44: 4638 mov r0, r7
800dc46: f7ff ff6b bl 800db20 <__ssputs_r>
800dc4a: 3001 adds r0, #1
800dc4c: f000 80a7 beq.w 800dd9e <_svfiprintf_r+0x1c6>
800dc50: 9a09 ldr r2, [sp, #36] @ 0x24
800dc52: 445a add r2, fp
800dc54: 9209 str r2, [sp, #36] @ 0x24
800dc56: f89a 3000 ldrb.w r3, [sl]
800dc5a: 2b00 cmp r3, #0
800dc5c: f000 809f beq.w 800dd9e <_svfiprintf_r+0x1c6>
800dc60: 2300 movs r3, #0
800dc62: f04f 32ff mov.w r2, #4294967295
800dc66: e9cd 2305 strd r2, r3, [sp, #20]
800dc6a: f10a 0a01 add.w sl, sl, #1
800dc6e: 9304 str r3, [sp, #16]
800dc70: 9307 str r3, [sp, #28]
800dc72: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800dc76: 931a str r3, [sp, #104] @ 0x68
800dc78: 4654 mov r4, sl
800dc7a: 2205 movs r2, #5
800dc7c: f814 1b01 ldrb.w r1, [r4], #1
800dc80: 484e ldr r0, [pc, #312] @ (800ddbc <_svfiprintf_r+0x1e4>)
800dc82: f000 fa5f bl 800e144 <memchr>
800dc86: 9a04 ldr r2, [sp, #16]
800dc88: b9d8 cbnz r0, 800dcc2 <_svfiprintf_r+0xea>
800dc8a: 06d0 lsls r0, r2, #27
800dc8c: bf44 itt mi
800dc8e: 2320 movmi r3, #32
800dc90: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800dc94: 0711 lsls r1, r2, #28
800dc96: bf44 itt mi
800dc98: 232b movmi r3, #43 @ 0x2b
800dc9a: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800dc9e: f89a 3000 ldrb.w r3, [sl]
800dca2: 2b2a cmp r3, #42 @ 0x2a
800dca4: d015 beq.n 800dcd2 <_svfiprintf_r+0xfa>
800dca6: 4654 mov r4, sl
800dca8: 2000 movs r0, #0
800dcaa: f04f 0c0a mov.w ip, #10
800dcae: 9a07 ldr r2, [sp, #28]
800dcb0: 4621 mov r1, r4
800dcb2: f811 3b01 ldrb.w r3, [r1], #1
800dcb6: 3b30 subs r3, #48 @ 0x30
800dcb8: 2b09 cmp r3, #9
800dcba: d94b bls.n 800dd54 <_svfiprintf_r+0x17c>
800dcbc: b1b0 cbz r0, 800dcec <_svfiprintf_r+0x114>
800dcbe: 9207 str r2, [sp, #28]
800dcc0: e014 b.n 800dcec <_svfiprintf_r+0x114>
800dcc2: eba0 0308 sub.w r3, r0, r8
800dcc6: fa09 f303 lsl.w r3, r9, r3
800dcca: 4313 orrs r3, r2
800dccc: 46a2 mov sl, r4
800dcce: 9304 str r3, [sp, #16]
800dcd0: e7d2 b.n 800dc78 <_svfiprintf_r+0xa0>
800dcd2: 9b03 ldr r3, [sp, #12]
800dcd4: 1d19 adds r1, r3, #4
800dcd6: 681b ldr r3, [r3, #0]
800dcd8: 9103 str r1, [sp, #12]
800dcda: 2b00 cmp r3, #0
800dcdc: bfbb ittet lt
800dcde: 425b neglt r3, r3
800dce0: f042 0202 orrlt.w r2, r2, #2
800dce4: 9307 strge r3, [sp, #28]
800dce6: 9307 strlt r3, [sp, #28]
800dce8: bfb8 it lt
800dcea: 9204 strlt r2, [sp, #16]
800dcec: 7823 ldrb r3, [r4, #0]
800dcee: 2b2e cmp r3, #46 @ 0x2e
800dcf0: d10a bne.n 800dd08 <_svfiprintf_r+0x130>
800dcf2: 7863 ldrb r3, [r4, #1]
800dcf4: 2b2a cmp r3, #42 @ 0x2a
800dcf6: d132 bne.n 800dd5e <_svfiprintf_r+0x186>
800dcf8: 9b03 ldr r3, [sp, #12]
800dcfa: 3402 adds r4, #2
800dcfc: 1d1a adds r2, r3, #4
800dcfe: 681b ldr r3, [r3, #0]
800dd00: 9203 str r2, [sp, #12]
800dd02: ea43 73e3 orr.w r3, r3, r3, asr #31
800dd06: 9305 str r3, [sp, #20]
800dd08: f8df a0b4 ldr.w sl, [pc, #180] @ 800ddc0 <_svfiprintf_r+0x1e8>
800dd0c: 2203 movs r2, #3
800dd0e: 4650 mov r0, sl
800dd10: 7821 ldrb r1, [r4, #0]
800dd12: f000 fa17 bl 800e144 <memchr>
800dd16: b138 cbz r0, 800dd28 <_svfiprintf_r+0x150>
800dd18: 2240 movs r2, #64 @ 0x40
800dd1a: 9b04 ldr r3, [sp, #16]
800dd1c: eba0 000a sub.w r0, r0, sl
800dd20: 4082 lsls r2, r0
800dd22: 4313 orrs r3, r2
800dd24: 3401 adds r4, #1
800dd26: 9304 str r3, [sp, #16]
800dd28: f814 1b01 ldrb.w r1, [r4], #1
800dd2c: 2206 movs r2, #6
800dd2e: 4825 ldr r0, [pc, #148] @ (800ddc4 <_svfiprintf_r+0x1ec>)
800dd30: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800dd34: f000 fa06 bl 800e144 <memchr>
800dd38: 2800 cmp r0, #0
800dd3a: d036 beq.n 800ddaa <_svfiprintf_r+0x1d2>
800dd3c: 4b22 ldr r3, [pc, #136] @ (800ddc8 <_svfiprintf_r+0x1f0>)
800dd3e: bb1b cbnz r3, 800dd88 <_svfiprintf_r+0x1b0>
800dd40: 9b03 ldr r3, [sp, #12]
800dd42: 3307 adds r3, #7
800dd44: f023 0307 bic.w r3, r3, #7
800dd48: 3308 adds r3, #8
800dd4a: 9303 str r3, [sp, #12]
800dd4c: 9b09 ldr r3, [sp, #36] @ 0x24
800dd4e: 4433 add r3, r6
800dd50: 9309 str r3, [sp, #36] @ 0x24
800dd52: e76a b.n 800dc2a <_svfiprintf_r+0x52>
800dd54: 460c mov r4, r1
800dd56: 2001 movs r0, #1
800dd58: fb0c 3202 mla r2, ip, r2, r3
800dd5c: e7a8 b.n 800dcb0 <_svfiprintf_r+0xd8>
800dd5e: 2300 movs r3, #0
800dd60: f04f 0c0a mov.w ip, #10
800dd64: 4619 mov r1, r3
800dd66: 3401 adds r4, #1
800dd68: 9305 str r3, [sp, #20]
800dd6a: 4620 mov r0, r4
800dd6c: f810 2b01 ldrb.w r2, [r0], #1
800dd70: 3a30 subs r2, #48 @ 0x30
800dd72: 2a09 cmp r2, #9
800dd74: d903 bls.n 800dd7e <_svfiprintf_r+0x1a6>
800dd76: 2b00 cmp r3, #0
800dd78: d0c6 beq.n 800dd08 <_svfiprintf_r+0x130>
800dd7a: 9105 str r1, [sp, #20]
800dd7c: e7c4 b.n 800dd08 <_svfiprintf_r+0x130>
800dd7e: 4604 mov r4, r0
800dd80: 2301 movs r3, #1
800dd82: fb0c 2101 mla r1, ip, r1, r2
800dd86: e7f0 b.n 800dd6a <_svfiprintf_r+0x192>
800dd88: ab03 add r3, sp, #12
800dd8a: 9300 str r3, [sp, #0]
800dd8c: 462a mov r2, r5
800dd8e: 4638 mov r0, r7
800dd90: 4b0e ldr r3, [pc, #56] @ (800ddcc <_svfiprintf_r+0x1f4>)
800dd92: a904 add r1, sp, #16
800dd94: f3af 8000 nop.w
800dd98: 1c42 adds r2, r0, #1
800dd9a: 4606 mov r6, r0
800dd9c: d1d6 bne.n 800dd4c <_svfiprintf_r+0x174>
800dd9e: 89ab ldrh r3, [r5, #12]
800dda0: 065b lsls r3, r3, #25
800dda2: f53f af2d bmi.w 800dc00 <_svfiprintf_r+0x28>
800dda6: 9809 ldr r0, [sp, #36] @ 0x24
800dda8: e72c b.n 800dc04 <_svfiprintf_r+0x2c>
800ddaa: ab03 add r3, sp, #12
800ddac: 9300 str r3, [sp, #0]
800ddae: 462a mov r2, r5
800ddb0: 4638 mov r0, r7
800ddb2: 4b06 ldr r3, [pc, #24] @ (800ddcc <_svfiprintf_r+0x1f4>)
800ddb4: a904 add r1, sp, #16
800ddb6: f000 f87d bl 800deb4 <_printf_i>
800ddba: e7ed b.n 800dd98 <_svfiprintf_r+0x1c0>
800ddbc: 0800e696 .word 0x0800e696
800ddc0: 0800e69c .word 0x0800e69c
800ddc4: 0800e6a0 .word 0x0800e6a0
800ddc8: 00000000 .word 0x00000000
800ddcc: 0800db21 .word 0x0800db21
0800ddd0 <_printf_common>:
800ddd0: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800ddd4: 4616 mov r6, r2
800ddd6: 4698 mov r8, r3
800ddd8: 688a ldr r2, [r1, #8]
800ddda: 690b ldr r3, [r1, #16]
800dddc: 4607 mov r7, r0
800ddde: 4293 cmp r3, r2
800dde0: bfb8 it lt
800dde2: 4613 movlt r3, r2
800dde4: 6033 str r3, [r6, #0]
800dde6: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800ddea: 460c mov r4, r1
800ddec: f8dd 9020 ldr.w r9, [sp, #32]
800ddf0: b10a cbz r2, 800ddf6 <_printf_common+0x26>
800ddf2: 3301 adds r3, #1
800ddf4: 6033 str r3, [r6, #0]
800ddf6: 6823 ldr r3, [r4, #0]
800ddf8: 0699 lsls r1, r3, #26
800ddfa: bf42 ittt mi
800ddfc: 6833 ldrmi r3, [r6, #0]
800ddfe: 3302 addmi r3, #2
800de00: 6033 strmi r3, [r6, #0]
800de02: 6825 ldr r5, [r4, #0]
800de04: f015 0506 ands.w r5, r5, #6
800de08: d106 bne.n 800de18 <_printf_common+0x48>
800de0a: f104 0a19 add.w sl, r4, #25
800de0e: 68e3 ldr r3, [r4, #12]
800de10: 6832 ldr r2, [r6, #0]
800de12: 1a9b subs r3, r3, r2
800de14: 42ab cmp r3, r5
800de16: dc2b bgt.n 800de70 <_printf_common+0xa0>
800de18: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800de1c: 6822 ldr r2, [r4, #0]
800de1e: 3b00 subs r3, #0
800de20: bf18 it ne
800de22: 2301 movne r3, #1
800de24: 0692 lsls r2, r2, #26
800de26: d430 bmi.n 800de8a <_printf_common+0xba>
800de28: 4641 mov r1, r8
800de2a: 4638 mov r0, r7
800de2c: f104 0243 add.w r2, r4, #67 @ 0x43
800de30: 47c8 blx r9
800de32: 3001 adds r0, #1
800de34: d023 beq.n 800de7e <_printf_common+0xae>
800de36: 6823 ldr r3, [r4, #0]
800de38: 6922 ldr r2, [r4, #16]
800de3a: f003 0306 and.w r3, r3, #6
800de3e: 2b04 cmp r3, #4
800de40: bf14 ite ne
800de42: 2500 movne r5, #0
800de44: 6833 ldreq r3, [r6, #0]
800de46: f04f 0600 mov.w r6, #0
800de4a: bf08 it eq
800de4c: 68e5 ldreq r5, [r4, #12]
800de4e: f104 041a add.w r4, r4, #26
800de52: bf08 it eq
800de54: 1aed subeq r5, r5, r3
800de56: f854 3c12 ldr.w r3, [r4, #-18]
800de5a: bf08 it eq
800de5c: ea25 75e5 biceq.w r5, r5, r5, asr #31
800de60: 4293 cmp r3, r2
800de62: bfc4 itt gt
800de64: 1a9b subgt r3, r3, r2
800de66: 18ed addgt r5, r5, r3
800de68: 42b5 cmp r5, r6
800de6a: d11a bne.n 800dea2 <_printf_common+0xd2>
800de6c: 2000 movs r0, #0
800de6e: e008 b.n 800de82 <_printf_common+0xb2>
800de70: 2301 movs r3, #1
800de72: 4652 mov r2, sl
800de74: 4641 mov r1, r8
800de76: 4638 mov r0, r7
800de78: 47c8 blx r9
800de7a: 3001 adds r0, #1
800de7c: d103 bne.n 800de86 <_printf_common+0xb6>
800de7e: f04f 30ff mov.w r0, #4294967295
800de82: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800de86: 3501 adds r5, #1
800de88: e7c1 b.n 800de0e <_printf_common+0x3e>
800de8a: 2030 movs r0, #48 @ 0x30
800de8c: 18e1 adds r1, r4, r3
800de8e: f881 0043 strb.w r0, [r1, #67] @ 0x43
800de92: 1c5a adds r2, r3, #1
800de94: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800de98: 4422 add r2, r4
800de9a: 3302 adds r3, #2
800de9c: f882 1043 strb.w r1, [r2, #67] @ 0x43
800dea0: e7c2 b.n 800de28 <_printf_common+0x58>
800dea2: 2301 movs r3, #1
800dea4: 4622 mov r2, r4
800dea6: 4641 mov r1, r8
800dea8: 4638 mov r0, r7
800deaa: 47c8 blx r9
800deac: 3001 adds r0, #1
800deae: d0e6 beq.n 800de7e <_printf_common+0xae>
800deb0: 3601 adds r6, #1
800deb2: e7d9 b.n 800de68 <_printf_common+0x98>
0800deb4 <_printf_i>:
800deb4: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800deb8: 7e0f ldrb r7, [r1, #24]
800deba: 4691 mov r9, r2
800debc: 2f78 cmp r7, #120 @ 0x78
800debe: 4680 mov r8, r0
800dec0: 460c mov r4, r1
800dec2: 469a mov sl, r3
800dec4: 9e0c ldr r6, [sp, #48] @ 0x30
800dec6: f101 0243 add.w r2, r1, #67 @ 0x43
800deca: d807 bhi.n 800dedc <_printf_i+0x28>
800decc: 2f62 cmp r7, #98 @ 0x62
800dece: d80a bhi.n 800dee6 <_printf_i+0x32>
800ded0: 2f00 cmp r7, #0
800ded2: f000 80d1 beq.w 800e078 <_printf_i+0x1c4>
800ded6: 2f58 cmp r7, #88 @ 0x58
800ded8: f000 80b8 beq.w 800e04c <_printf_i+0x198>
800dedc: f104 0642 add.w r6, r4, #66 @ 0x42
800dee0: f884 7042 strb.w r7, [r4, #66] @ 0x42
800dee4: e03a b.n 800df5c <_printf_i+0xa8>
800dee6: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800deea: 2b15 cmp r3, #21
800deec: d8f6 bhi.n 800dedc <_printf_i+0x28>
800deee: a101 add r1, pc, #4 @ (adr r1, 800def4 <_printf_i+0x40>)
800def0: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800def4: 0800df4d .word 0x0800df4d
800def8: 0800df61 .word 0x0800df61
800defc: 0800dedd .word 0x0800dedd
800df00: 0800dedd .word 0x0800dedd
800df04: 0800dedd .word 0x0800dedd
800df08: 0800dedd .word 0x0800dedd
800df0c: 0800df61 .word 0x0800df61
800df10: 0800dedd .word 0x0800dedd
800df14: 0800dedd .word 0x0800dedd
800df18: 0800dedd .word 0x0800dedd
800df1c: 0800dedd .word 0x0800dedd
800df20: 0800e05f .word 0x0800e05f
800df24: 0800df8b .word 0x0800df8b
800df28: 0800e019 .word 0x0800e019
800df2c: 0800dedd .word 0x0800dedd
800df30: 0800dedd .word 0x0800dedd
800df34: 0800e081 .word 0x0800e081
800df38: 0800dedd .word 0x0800dedd
800df3c: 0800df8b .word 0x0800df8b
800df40: 0800dedd .word 0x0800dedd
800df44: 0800dedd .word 0x0800dedd
800df48: 0800e021 .word 0x0800e021
800df4c: 6833 ldr r3, [r6, #0]
800df4e: 1d1a adds r2, r3, #4
800df50: 681b ldr r3, [r3, #0]
800df52: 6032 str r2, [r6, #0]
800df54: f104 0642 add.w r6, r4, #66 @ 0x42
800df58: f884 3042 strb.w r3, [r4, #66] @ 0x42
800df5c: 2301 movs r3, #1
800df5e: e09c b.n 800e09a <_printf_i+0x1e6>
800df60: 6833 ldr r3, [r6, #0]
800df62: 6820 ldr r0, [r4, #0]
800df64: 1d19 adds r1, r3, #4
800df66: 6031 str r1, [r6, #0]
800df68: 0606 lsls r6, r0, #24
800df6a: d501 bpl.n 800df70 <_printf_i+0xbc>
800df6c: 681d ldr r5, [r3, #0]
800df6e: e003 b.n 800df78 <_printf_i+0xc4>
800df70: 0645 lsls r5, r0, #25
800df72: d5fb bpl.n 800df6c <_printf_i+0xb8>
800df74: f9b3 5000 ldrsh.w r5, [r3]
800df78: 2d00 cmp r5, #0
800df7a: da03 bge.n 800df84 <_printf_i+0xd0>
800df7c: 232d movs r3, #45 @ 0x2d
800df7e: 426d negs r5, r5
800df80: f884 3043 strb.w r3, [r4, #67] @ 0x43
800df84: 230a movs r3, #10
800df86: 4858 ldr r0, [pc, #352] @ (800e0e8 <_printf_i+0x234>)
800df88: e011 b.n 800dfae <_printf_i+0xfa>
800df8a: 6821 ldr r1, [r4, #0]
800df8c: 6833 ldr r3, [r6, #0]
800df8e: 0608 lsls r0, r1, #24
800df90: f853 5b04 ldr.w r5, [r3], #4
800df94: d402 bmi.n 800df9c <_printf_i+0xe8>
800df96: 0649 lsls r1, r1, #25
800df98: bf48 it mi
800df9a: b2ad uxthmi r5, r5
800df9c: 2f6f cmp r7, #111 @ 0x6f
800df9e: 6033 str r3, [r6, #0]
800dfa0: bf14 ite ne
800dfa2: 230a movne r3, #10
800dfa4: 2308 moveq r3, #8
800dfa6: 4850 ldr r0, [pc, #320] @ (800e0e8 <_printf_i+0x234>)
800dfa8: 2100 movs r1, #0
800dfaa: f884 1043 strb.w r1, [r4, #67] @ 0x43
800dfae: 6866 ldr r6, [r4, #4]
800dfb0: 2e00 cmp r6, #0
800dfb2: 60a6 str r6, [r4, #8]
800dfb4: db05 blt.n 800dfc2 <_printf_i+0x10e>
800dfb6: 6821 ldr r1, [r4, #0]
800dfb8: 432e orrs r6, r5
800dfba: f021 0104 bic.w r1, r1, #4
800dfbe: 6021 str r1, [r4, #0]
800dfc0: d04b beq.n 800e05a <_printf_i+0x1a6>
800dfc2: 4616 mov r6, r2
800dfc4: fbb5 f1f3 udiv r1, r5, r3
800dfc8: fb03 5711 mls r7, r3, r1, r5
800dfcc: 5dc7 ldrb r7, [r0, r7]
800dfce: f806 7d01 strb.w r7, [r6, #-1]!
800dfd2: 462f mov r7, r5
800dfd4: 42bb cmp r3, r7
800dfd6: 460d mov r5, r1
800dfd8: d9f4 bls.n 800dfc4 <_printf_i+0x110>
800dfda: 2b08 cmp r3, #8
800dfdc: d10b bne.n 800dff6 <_printf_i+0x142>
800dfde: 6823 ldr r3, [r4, #0]
800dfe0: 07df lsls r7, r3, #31
800dfe2: d508 bpl.n 800dff6 <_printf_i+0x142>
800dfe4: 6923 ldr r3, [r4, #16]
800dfe6: 6861 ldr r1, [r4, #4]
800dfe8: 4299 cmp r1, r3
800dfea: bfde ittt le
800dfec: 2330 movle r3, #48 @ 0x30
800dfee: f806 3c01 strble.w r3, [r6, #-1]
800dff2: f106 36ff addle.w r6, r6, #4294967295
800dff6: 1b92 subs r2, r2, r6
800dff8: 6122 str r2, [r4, #16]
800dffa: 464b mov r3, r9
800dffc: 4621 mov r1, r4
800dffe: 4640 mov r0, r8
800e000: f8cd a000 str.w sl, [sp]
800e004: aa03 add r2, sp, #12
800e006: f7ff fee3 bl 800ddd0 <_printf_common>
800e00a: 3001 adds r0, #1
800e00c: d14a bne.n 800e0a4 <_printf_i+0x1f0>
800e00e: f04f 30ff mov.w r0, #4294967295
800e012: b004 add sp, #16
800e014: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e018: 6823 ldr r3, [r4, #0]
800e01a: f043 0320 orr.w r3, r3, #32
800e01e: 6023 str r3, [r4, #0]
800e020: 2778 movs r7, #120 @ 0x78
800e022: 4832 ldr r0, [pc, #200] @ (800e0ec <_printf_i+0x238>)
800e024: f884 7045 strb.w r7, [r4, #69] @ 0x45
800e028: 6823 ldr r3, [r4, #0]
800e02a: 6831 ldr r1, [r6, #0]
800e02c: 061f lsls r7, r3, #24
800e02e: f851 5b04 ldr.w r5, [r1], #4
800e032: d402 bmi.n 800e03a <_printf_i+0x186>
800e034: 065f lsls r7, r3, #25
800e036: bf48 it mi
800e038: b2ad uxthmi r5, r5
800e03a: 6031 str r1, [r6, #0]
800e03c: 07d9 lsls r1, r3, #31
800e03e: bf44 itt mi
800e040: f043 0320 orrmi.w r3, r3, #32
800e044: 6023 strmi r3, [r4, #0]
800e046: b11d cbz r5, 800e050 <_printf_i+0x19c>
800e048: 2310 movs r3, #16
800e04a: e7ad b.n 800dfa8 <_printf_i+0xf4>
800e04c: 4826 ldr r0, [pc, #152] @ (800e0e8 <_printf_i+0x234>)
800e04e: e7e9 b.n 800e024 <_printf_i+0x170>
800e050: 6823 ldr r3, [r4, #0]
800e052: f023 0320 bic.w r3, r3, #32
800e056: 6023 str r3, [r4, #0]
800e058: e7f6 b.n 800e048 <_printf_i+0x194>
800e05a: 4616 mov r6, r2
800e05c: e7bd b.n 800dfda <_printf_i+0x126>
800e05e: 6833 ldr r3, [r6, #0]
800e060: 6825 ldr r5, [r4, #0]
800e062: 1d18 adds r0, r3, #4
800e064: 6961 ldr r1, [r4, #20]
800e066: 6030 str r0, [r6, #0]
800e068: 062e lsls r6, r5, #24
800e06a: 681b ldr r3, [r3, #0]
800e06c: d501 bpl.n 800e072 <_printf_i+0x1be>
800e06e: 6019 str r1, [r3, #0]
800e070: e002 b.n 800e078 <_printf_i+0x1c4>
800e072: 0668 lsls r0, r5, #25
800e074: d5fb bpl.n 800e06e <_printf_i+0x1ba>
800e076: 8019 strh r1, [r3, #0]
800e078: 2300 movs r3, #0
800e07a: 4616 mov r6, r2
800e07c: 6123 str r3, [r4, #16]
800e07e: e7bc b.n 800dffa <_printf_i+0x146>
800e080: 6833 ldr r3, [r6, #0]
800e082: 2100 movs r1, #0
800e084: 1d1a adds r2, r3, #4
800e086: 6032 str r2, [r6, #0]
800e088: 681e ldr r6, [r3, #0]
800e08a: 6862 ldr r2, [r4, #4]
800e08c: 4630 mov r0, r6
800e08e: f000 f859 bl 800e144 <memchr>
800e092: b108 cbz r0, 800e098 <_printf_i+0x1e4>
800e094: 1b80 subs r0, r0, r6
800e096: 6060 str r0, [r4, #4]
800e098: 6863 ldr r3, [r4, #4]
800e09a: 6123 str r3, [r4, #16]
800e09c: 2300 movs r3, #0
800e09e: f884 3043 strb.w r3, [r4, #67] @ 0x43
800e0a2: e7aa b.n 800dffa <_printf_i+0x146>
800e0a4: 4632 mov r2, r6
800e0a6: 4649 mov r1, r9
800e0a8: 4640 mov r0, r8
800e0aa: 6923 ldr r3, [r4, #16]
800e0ac: 47d0 blx sl
800e0ae: 3001 adds r0, #1
800e0b0: d0ad beq.n 800e00e <_printf_i+0x15a>
800e0b2: 6823 ldr r3, [r4, #0]
800e0b4: 079b lsls r3, r3, #30
800e0b6: d413 bmi.n 800e0e0 <_printf_i+0x22c>
800e0b8: 68e0 ldr r0, [r4, #12]
800e0ba: 9b03 ldr r3, [sp, #12]
800e0bc: 4298 cmp r0, r3
800e0be: bfb8 it lt
800e0c0: 4618 movlt r0, r3
800e0c2: e7a6 b.n 800e012 <_printf_i+0x15e>
800e0c4: 2301 movs r3, #1
800e0c6: 4632 mov r2, r6
800e0c8: 4649 mov r1, r9
800e0ca: 4640 mov r0, r8
800e0cc: 47d0 blx sl
800e0ce: 3001 adds r0, #1
800e0d0: d09d beq.n 800e00e <_printf_i+0x15a>
800e0d2: 3501 adds r5, #1
800e0d4: 68e3 ldr r3, [r4, #12]
800e0d6: 9903 ldr r1, [sp, #12]
800e0d8: 1a5b subs r3, r3, r1
800e0da: 42ab cmp r3, r5
800e0dc: dcf2 bgt.n 800e0c4 <_printf_i+0x210>
800e0de: e7eb b.n 800e0b8 <_printf_i+0x204>
800e0e0: 2500 movs r5, #0
800e0e2: f104 0619 add.w r6, r4, #25
800e0e6: e7f5 b.n 800e0d4 <_printf_i+0x220>
800e0e8: 0800e6a7 .word 0x0800e6a7
800e0ec: 0800e6b8 .word 0x0800e6b8
0800e0f0 <memmove>:
800e0f0: 4288 cmp r0, r1
800e0f2: b510 push {r4, lr}
800e0f4: eb01 0402 add.w r4, r1, r2
800e0f8: d902 bls.n 800e100 <memmove+0x10>
800e0fa: 4284 cmp r4, r0
800e0fc: 4623 mov r3, r4
800e0fe: d807 bhi.n 800e110 <memmove+0x20>
800e100: 1e43 subs r3, r0, #1
800e102: 42a1 cmp r1, r4
800e104: d008 beq.n 800e118 <memmove+0x28>
800e106: f811 2b01 ldrb.w r2, [r1], #1
800e10a: f803 2f01 strb.w r2, [r3, #1]!
800e10e: e7f8 b.n 800e102 <memmove+0x12>
800e110: 4601 mov r1, r0
800e112: 4402 add r2, r0
800e114: 428a cmp r2, r1
800e116: d100 bne.n 800e11a <memmove+0x2a>
800e118: bd10 pop {r4, pc}
800e11a: f813 4d01 ldrb.w r4, [r3, #-1]!
800e11e: f802 4d01 strb.w r4, [r2, #-1]!
800e122: e7f7 b.n 800e114 <memmove+0x24>
0800e124 <_sbrk_r>:
800e124: b538 push {r3, r4, r5, lr}
800e126: 2300 movs r3, #0
800e128: 4d05 ldr r5, [pc, #20] @ (800e140 <_sbrk_r+0x1c>)
800e12a: 4604 mov r4, r0
800e12c: 4608 mov r0, r1
800e12e: 602b str r3, [r5, #0]
800e130: f7f6 f976 bl 8004420 <_sbrk>
800e134: 1c43 adds r3, r0, #1
800e136: d102 bne.n 800e13e <_sbrk_r+0x1a>
800e138: 682b ldr r3, [r5, #0]
800e13a: b103 cbz r3, 800e13e <_sbrk_r+0x1a>
800e13c: 6023 str r3, [r4, #0]
800e13e: bd38 pop {r3, r4, r5, pc}
800e140: 20001884 .word 0x20001884
0800e144 <memchr>:
800e144: 4603 mov r3, r0
800e146: b510 push {r4, lr}
800e148: b2c9 uxtb r1, r1
800e14a: 4402 add r2, r0
800e14c: 4293 cmp r3, r2
800e14e: 4618 mov r0, r3
800e150: d101 bne.n 800e156 <memchr+0x12>
800e152: 2000 movs r0, #0
800e154: e003 b.n 800e15e <memchr+0x1a>
800e156: 7804 ldrb r4, [r0, #0]
800e158: 3301 adds r3, #1
800e15a: 428c cmp r4, r1
800e15c: d1f6 bne.n 800e14c <memchr+0x8>
800e15e: bd10 pop {r4, pc}
0800e160 <memcpy>:
800e160: 440a add r2, r1
800e162: 4291 cmp r1, r2
800e164: f100 33ff add.w r3, r0, #4294967295
800e168: d100 bne.n 800e16c <memcpy+0xc>
800e16a: 4770 bx lr
800e16c: b510 push {r4, lr}
800e16e: f811 4b01 ldrb.w r4, [r1], #1
800e172: 4291 cmp r1, r2
800e174: f803 4f01 strb.w r4, [r3, #1]!
800e178: d1f9 bne.n 800e16e <memcpy+0xe>
800e17a: bd10 pop {r4, pc}
0800e17c <_realloc_r>:
800e17c: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800e180: 4607 mov r7, r0
800e182: 4614 mov r4, r2
800e184: 460d mov r5, r1
800e186: b921 cbnz r1, 800e192 <_realloc_r+0x16>
800e188: 4611 mov r1, r2
800e18a: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800e18e: f7ff bc3b b.w 800da08 <_malloc_r>
800e192: b92a cbnz r2, 800e1a0 <_realloc_r+0x24>
800e194: f7ff fbce bl 800d934 <_free_r>
800e198: 4625 mov r5, r4
800e19a: 4628 mov r0, r5
800e19c: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800e1a0: f000 f81a bl 800e1d8 <_malloc_usable_size_r>
800e1a4: 4284 cmp r4, r0
800e1a6: 4606 mov r6, r0
800e1a8: d802 bhi.n 800e1b0 <_realloc_r+0x34>
800e1aa: ebb4 0f50 cmp.w r4, r0, lsr #1
800e1ae: d8f4 bhi.n 800e19a <_realloc_r+0x1e>
800e1b0: 4621 mov r1, r4
800e1b2: 4638 mov r0, r7
800e1b4: f7ff fc28 bl 800da08 <_malloc_r>
800e1b8: 4680 mov r8, r0
800e1ba: b908 cbnz r0, 800e1c0 <_realloc_r+0x44>
800e1bc: 4645 mov r5, r8
800e1be: e7ec b.n 800e19a <_realloc_r+0x1e>
800e1c0: 42b4 cmp r4, r6
800e1c2: 4622 mov r2, r4
800e1c4: 4629 mov r1, r5
800e1c6: bf28 it cs
800e1c8: 4632 movcs r2, r6
800e1ca: f7ff ffc9 bl 800e160 <memcpy>
800e1ce: 4629 mov r1, r5
800e1d0: 4638 mov r0, r7
800e1d2: f7ff fbaf bl 800d934 <_free_r>
800e1d6: e7f1 b.n 800e1bc <_realloc_r+0x40>
0800e1d8 <_malloc_usable_size_r>:
800e1d8: f851 3c04 ldr.w r3, [r1, #-4]
800e1dc: 1f18 subs r0, r3, #4
800e1de: 2b00 cmp r3, #0
800e1e0: bfbc itt lt
800e1e2: 580b ldrlt r3, [r1, r0]
800e1e4: 18c0 addlt r0, r0, r3
800e1e6: 4770 bx lr
0800e1e8 <_init>:
800e1e8: b5f8 push {r3, r4, r5, r6, r7, lr}
800e1ea: bf00 nop
800e1ec: bcf8 pop {r3, r4, r5, r6, r7}
800e1ee: bc08 pop {r3}
800e1f0: 469e mov lr, r3
800e1f2: 4770 bx lr
0800e1f4 <_fini>:
800e1f4: b5f8 push {r3, r4, r5, r6, r7, lr}
800e1f6: bf00 nop
800e1f8: bcf8 pop {r3, r4, r5, r6, r7}
800e1fa: bc08 pop {r3}
800e1fc: 469e mov lr, r3
800e1fe: 4770 bx lr
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