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e6eed1fd73b200b814ab059d9a5054378c0502da
AUTOM/workspace/AUTOM10/Debug/AUTOM10.list
andrea e6eed1fd73 wip
2026-05-26 04:31:23 +02:00

35667 lines
1.3 MiB
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AUTOM10.elf: file format elf32-littlearm
Sections:
Idx Name Size VMA LMA File off Algn
0 .isr_vector 0000010c 08000000 08000000 00001000 2**0
CONTENTS, ALLOC, LOAD, READONLY, DATA
1 .text 0000eb7c 0800010c 0800010c 0000110c 2**2
CONTENTS, ALLOC, LOAD, READONLY, CODE
2 .rodata 000007ec 0800ec88 0800ec88 0000fc88 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
3 .ARM.extab 00000000 0800f474 0800f474 000111dc 2**0
CONTENTS, READONLY
4 .ARM 00000008 0800f474 0800f474 00010474 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
5 .preinit_array 00000000 0800f47c 0800f47c 000111dc 2**0
CONTENTS, ALLOC, LOAD, DATA
6 .init_array 00000004 0800f47c 0800f47c 0001047c 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
7 .fini_array 00000004 0800f480 0800f480 00010480 2**2
CONTENTS, ALLOC, LOAD, READONLY, DATA
8 .data 000001dc 20000000 0800f484 00011000 2**2
CONTENTS, ALLOC, LOAD, DATA
9 .bss 000016c4 200001e0 0800f660 000111e0 2**3
ALLOC
10 ._user_heap_stack 00000604 200018a4 0800f660 000118a4 2**0
ALLOC
11 .ARM.attributes 00000029 00000000 00000000 000111dc 2**0
CONTENTS, READONLY
12 .debug_info 0001a72a 00000000 00000000 00011205 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
13 .debug_abbrev 00004a0d 00000000 00000000 0002b92f 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
14 .debug_aranges 000016b0 00000000 00000000 00030340 2**3
CONTENTS, READONLY, DEBUGGING, OCTETS
15 .debug_rnglists 00001168 00000000 00000000 000319f0 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
16 .debug_macro 0001d2a0 00000000 00000000 00032b58 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
17 .debug_line 0001f2f6 00000000 00000000 0004fdf8 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
18 .debug_str 00095e64 00000000 00000000 0006f0ee 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
19 .comment 00000043 00000000 00000000 00104f52 2**0
CONTENTS, READONLY
20 .debug_frame 000061b8 00000000 00000000 00104f98 2**2
CONTENTS, READONLY, DEBUGGING, OCTETS
21 .debug_line_str 00000052 00000000 00000000 0010b150 2**0
CONTENTS, READONLY, DEBUGGING, OCTETS
Disassembly of section .text:
0800010c <__do_global_dtors_aux>:
800010c: b510 push {r4, lr}
800010e: 4c05 ldr r4, [pc, #20] @ (8000124 <__do_global_dtors_aux+0x18>)
8000110: 7823 ldrb r3, [r4, #0]
8000112: b933 cbnz r3, 8000122 <__do_global_dtors_aux+0x16>
8000114: 4b04 ldr r3, [pc, #16] @ (8000128 <__do_global_dtors_aux+0x1c>)
8000116: b113 cbz r3, 800011e <__do_global_dtors_aux+0x12>
8000118: 4804 ldr r0, [pc, #16] @ (800012c <__do_global_dtors_aux+0x20>)
800011a: f3af 8000 nop.w
800011e: 2301 movs r3, #1
8000120: 7023 strb r3, [r4, #0]
8000122: bd10 pop {r4, pc}
8000124: 200001e0 .word 0x200001e0
8000128: 00000000 .word 0x00000000
800012c: 0800ec70 .word 0x0800ec70
08000130 <frame_dummy>:
8000130: b508 push {r3, lr}
8000132: 4b03 ldr r3, [pc, #12] @ (8000140 <frame_dummy+0x10>)
8000134: b11b cbz r3, 800013e <frame_dummy+0xe>
8000136: 4903 ldr r1, [pc, #12] @ (8000144 <frame_dummy+0x14>)
8000138: 4803 ldr r0, [pc, #12] @ (8000148 <frame_dummy+0x18>)
800013a: f3af 8000 nop.w
800013e: bd08 pop {r3, pc}
8000140: 00000000 .word 0x00000000
8000144: 200001e4 .word 0x200001e4
8000148: 0800ec70 .word 0x0800ec70
0800014c <strlen>:
800014c: 4603 mov r3, r0
800014e: f813 2b01 ldrb.w r2, [r3], #1
8000152: 2a00 cmp r2, #0
8000154: d1fb bne.n 800014e <strlen+0x2>
8000156: 1a18 subs r0, r3, r0
8000158: 3801 subs r0, #1
800015a: 4770 bx lr
0800015c <manageAdc>:
uint16_t ch5 ;
uint16_t ch6 ;
uint16_t ch7 ;
uint16_t ch8 ;
void manageAdc(void){
800015c: b480 push {r7}
800015e: af00 add r7, sp, #0
if (adc_avg_ready)
8000160: 4b12 ldr r3, [pc, #72] @ (80001ac <manageAdc+0x50>)
8000162: 781b ldrb r3, [r3, #0]
8000164: b2db uxtb r3, r3
8000166: 2b00 cmp r3, #0
8000168: d01b beq.n 80001a2 <manageAdc+0x46>
{
adc_avg_ready = 0;
800016a: 4b10 ldr r3, [pc, #64] @ (80001ac <manageAdc+0x50>)
800016c: 2200 movs r2, #0
800016e: 701a strb r2, [r3, #0]
// Read averaged channels (example mapping)
ch4 = adc_avg[0];
8000170: 4b0f ldr r3, [pc, #60] @ (80001b0 <manageAdc+0x54>)
8000172: 881b ldrh r3, [r3, #0]
8000174: b29a uxth r2, r3
8000176: 4b0f ldr r3, [pc, #60] @ (80001b4 <manageAdc+0x58>)
8000178: 801a strh r2, [r3, #0]
ch5 = adc_avg[1];
800017a: 4b0d ldr r3, [pc, #52] @ (80001b0 <manageAdc+0x54>)
800017c: 885b ldrh r3, [r3, #2]
800017e: b29a uxth r2, r3
8000180: 4b0d ldr r3, [pc, #52] @ (80001b8 <manageAdc+0x5c>)
8000182: 801a strh r2, [r3, #0]
ch6 = adc_avg[2];
8000184: 4b0a ldr r3, [pc, #40] @ (80001b0 <manageAdc+0x54>)
8000186: 889b ldrh r3, [r3, #4]
8000188: b29a uxth r2, r3
800018a: 4b0c ldr r3, [pc, #48] @ (80001bc <manageAdc+0x60>)
800018c: 801a strh r2, [r3, #0]
ch7 = adc_avg[3];
800018e: 4b08 ldr r3, [pc, #32] @ (80001b0 <manageAdc+0x54>)
8000190: 88db ldrh r3, [r3, #6]
8000192: b29a uxth r2, r3
8000194: 4b0a ldr r3, [pc, #40] @ (80001c0 <manageAdc+0x64>)
8000196: 801a strh r2, [r3, #0]
ch8 = adc_avg[4];
8000198: 4b05 ldr r3, [pc, #20] @ (80001b0 <manageAdc+0x54>)
800019a: 891b ldrh r3, [r3, #8]
800019c: b29a uxth r2, r3
800019e: 4b09 ldr r3, [pc, #36] @ (80001c4 <manageAdc+0x68>)
80001a0: 801a strh r2, [r3, #0]
// Use them (convert to volts, control, etc.)
// float v4 = (3.3f * ch4) / 4095.0f;
}
}
80001a2: bf00 nop
80001a4: 46bd mov sp, r7
80001a6: bc80 pop {r7}
80001a8: 4770 bx lr
80001aa: bf00 nop
80001ac: 20000229 .word 0x20000229
80001b0: 20000208 .word 0x20000208
80001b4: 2000022a .word 0x2000022a
80001b8: 2000022c .word 0x2000022c
80001bc: 2000022e .word 0x2000022e
80001c0: 20000230 .word 0x20000230
80001c4: 20000232 .word 0x20000232
080001c8 <readAdc>:
void readAdc(void){
80001c8: b480 push {r7}
80001ca: b083 sub sp, #12
80001cc: af00 add r7, sp, #0
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001ce: 2300 movs r3, #0
80001d0: 71fb strb r3, [r7, #7]
80001d2: e010 b.n 80001f6 <readAdc+0x2e>
{
adc_sum[i] += adc_dma_buf[i];
80001d4: 79fb ldrb r3, [r7, #7]
80001d6: 4a21 ldr r2, [pc, #132] @ (800025c <readAdc+0x94>)
80001d8: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
80001dc: b299 uxth r1, r3
80001de: 79fb ldrb r3, [r7, #7]
80001e0: 4a1f ldr r2, [pc, #124] @ (8000260 <readAdc+0x98>)
80001e2: f852 2023 ldr.w r2, [r2, r3, lsl #2]
80001e6: 79fb ldrb r3, [r7, #7]
80001e8: 440a add r2, r1
80001ea: 491d ldr r1, [pc, #116] @ (8000260 <readAdc+0x98>)
80001ec: f841 2023 str.w r2, [r1, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
80001f0: 79fb ldrb r3, [r7, #7]
80001f2: 3301 adds r3, #1
80001f4: 71fb strb r3, [r7, #7]
80001f6: 79fb ldrb r3, [r7, #7]
80001f8: 2b04 cmp r3, #4
80001fa: d9eb bls.n 80001d4 <readAdc+0xc>
}
adc_sum_count++;
80001fc: 4b19 ldr r3, [pc, #100] @ (8000264 <readAdc+0x9c>)
80001fe: 781b ldrb r3, [r3, #0]
8000200: 3301 adds r3, #1
8000202: b2da uxtb r2, r3
8000204: 4b17 ldr r3, [pc, #92] @ (8000264 <readAdc+0x9c>)
8000206: 701a strb r2, [r3, #0]
/* When we collected ADC_AVG_WINDOW samples → compute average */
if (adc_sum_count >= ADC_AVG_WINDOW)
8000208: 4b16 ldr r3, [pc, #88] @ (8000264 <readAdc+0x9c>)
800020a: 781b ldrb r3, [r3, #0]
800020c: 2b04 cmp r3, #4
800020e: d920 bls.n 8000252 <readAdc+0x8a>
{
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
8000210: 2300 movs r3, #0
8000212: 71bb strb r3, [r7, #6]
8000214: e014 b.n 8000240 <readAdc+0x78>
{
adc_avg[i] = (uint16_t)(adc_sum[i] / ADC_AVG_WINDOW);
8000216: 79bb ldrb r3, [r7, #6]
8000218: 4a11 ldr r2, [pc, #68] @ (8000260 <readAdc+0x98>)
800021a: f852 3023 ldr.w r3, [r2, r3, lsl #2]
800021e: 4a12 ldr r2, [pc, #72] @ (8000268 <readAdc+0xa0>)
8000220: fba2 2303 umull r2, r3, r2, r3
8000224: 089a lsrs r2, r3, #2
8000226: 79bb ldrb r3, [r7, #6]
8000228: b291 uxth r1, r2
800022a: 4a10 ldr r2, [pc, #64] @ (800026c <readAdc+0xa4>)
800022c: f822 1013 strh.w r1, [r2, r3, lsl #1]
adc_sum[i] = 0;
8000230: 79bb ldrb r3, [r7, #6]
8000232: 4a0b ldr r2, [pc, #44] @ (8000260 <readAdc+0x98>)
8000234: 2100 movs r1, #0
8000236: f842 1023 str.w r1, [r2, r3, lsl #2]
for (uint8_t i = 0; i < ADC_NUM_CHANNELS; i++)
800023a: 79bb ldrb r3, [r7, #6]
800023c: 3301 adds r3, #1
800023e: 71bb strb r3, [r7, #6]
8000240: 79bb ldrb r3, [r7, #6]
8000242: 2b04 cmp r3, #4
8000244: d9e7 bls.n 8000216 <readAdc+0x4e>
}
adc_sum_count = 0;
8000246: 4b07 ldr r3, [pc, #28] @ (8000264 <readAdc+0x9c>)
8000248: 2200 movs r2, #0
800024a: 701a strb r2, [r3, #0]
adc_avg_ready = 1; // tell main loop new data is ready
800024c: 4b08 ldr r3, [pc, #32] @ (8000270 <readAdc+0xa8>)
800024e: 2201 movs r2, #1
8000250: 701a strb r2, [r3, #0]
}
}
8000252: bf00 nop
8000254: 370c adds r7, #12
8000256: 46bd mov sp, r7
8000258: bc80 pop {r7}
800025a: 4770 bx lr
800025c: 200001fc .word 0x200001fc
8000260: 20000214 .word 0x20000214
8000264: 20000228 .word 0x20000228
8000268: cccccccd .word 0xcccccccd
800026c: 20000208 .word 0x20000208
8000270: 20000229 .word 0x20000229
08000274 <EEW_Read>:
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data);
void loadEE(void);
void loadDefault(void);
/* Pseudo-array accessor EEW[idx] */
static inline uint16_t EEW_Read(uint8_t idx, uint16_t *value)
{
8000274: b580 push {r7, lr}
8000276: b082 sub sp, #8
8000278: af00 add r7, sp, #0
800027a: 4603 mov r3, r0
800027c: 6039 str r1, [r7, #0]
800027e: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
8000280: 79fb ldrb r3, [r7, #7]
8000282: b29b uxth r3, r3
8000284: 3301 adds r3, #1
8000286: b29b uxth r3, r3
8000288: 6839 ldr r1, [r7, #0]
800028a: 4618 mov r0, r3
800028c: f001 f9e4 bl 8001658 <EE_ReadVariable>
8000290: 4603 mov r3, r0
}
8000292: 4618 mov r0, r3
8000294: 3708 adds r7, #8
8000296: 46bd mov sp, r7
8000298: bd80 pop {r7, pc}
0800029a <EEW_Write>:
static inline uint16_t EEW_Write(uint8_t idx, uint16_t value)
{
800029a: b580 push {r7, lr}
800029c: b082 sub sp, #8
800029e: af00 add r7, sp, #0
80002a0: 4603 mov r3, r0
80002a2: 460a mov r2, r1
80002a4: 71fb strb r3, [r7, #7]
80002a6: 4613 mov r3, r2
80002a8: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80002aa: 79fb ldrb r3, [r7, #7]
80002ac: b29b uxth r3, r3
80002ae: 3301 adds r3, #1
80002b0: b29b uxth r3, r3
80002b2: 88ba ldrh r2, [r7, #4]
80002b4: 4611 mov r1, r2
80002b6: 4618 mov r0, r3
80002b8: f001 f9ea bl 8001690 <EE_WriteVariable>
80002bc: 4603 mov r3, r0
}
80002be: 4618 mov r0, r3
80002c0: 3708 adds r7, #8
80002c2: 46bd mov sp, r7
80002c4: bd80 pop {r7, pc}
080002c6 <toHex>:
extern uint16_t tramp;
extern uint16_t tanem;
extern uint16_t thanem;
extern uint16_t trampman;
bool toHex(char c1,char c2,char c3,char c4,uint16_t* retval){
80002c6: b490 push {r4, r7}
80002c8: b082 sub sp, #8
80002ca: af00 add r7, sp, #0
80002cc: 4604 mov r4, r0
80002ce: 4608 mov r0, r1
80002d0: 4611 mov r1, r2
80002d2: 461a mov r2, r3
80002d4: 4623 mov r3, r4
80002d6: 71fb strb r3, [r7, #7]
80002d8: 4603 mov r3, r0
80002da: 71bb strb r3, [r7, #6]
80002dc: 460b mov r3, r1
80002de: 717b strb r3, [r7, #5]
80002e0: 4613 mov r3, r2
80002e2: 713b strb r3, [r7, #4]
if((c1>='0')&&(c1<='9')){
80002e4: 79fb ldrb r3, [r7, #7]
80002e6: 2b2f cmp r3, #47 @ 0x2f
80002e8: d906 bls.n 80002f8 <toHex+0x32>
80002ea: 79fb ldrb r3, [r7, #7]
80002ec: 2b39 cmp r3, #57 @ 0x39
80002ee: d803 bhi.n 80002f8 <toHex+0x32>
c1-='0';
80002f0: 79fb ldrb r3, [r7, #7]
80002f2: 3b30 subs r3, #48 @ 0x30
80002f4: 71fb strb r3, [r7, #7]
80002f6: e00b b.n 8000310 <toHex+0x4a>
}else if((c1>='a')&&(c1<='f')){
80002f8: 79fb ldrb r3, [r7, #7]
80002fa: 2b60 cmp r3, #96 @ 0x60
80002fc: d906 bls.n 800030c <toHex+0x46>
80002fe: 79fb ldrb r3, [r7, #7]
8000300: 2b66 cmp r3, #102 @ 0x66
8000302: d803 bhi.n 800030c <toHex+0x46>
c1=(c1-'a')+10;
8000304: 79fb ldrb r3, [r7, #7]
8000306: 3b57 subs r3, #87 @ 0x57
8000308: 71fb strb r3, [r7, #7]
800030a: e001 b.n 8000310 <toHex+0x4a>
}else return false;
800030c: 2300 movs r3, #0
800030e: e070 b.n 80003f2 <toHex+0x12c>
if((c2>='0')&&(c2<='9')){
8000310: 79bb ldrb r3, [r7, #6]
8000312: 2b2f cmp r3, #47 @ 0x2f
8000314: d906 bls.n 8000324 <toHex+0x5e>
8000316: 79bb ldrb r3, [r7, #6]
8000318: 2b39 cmp r3, #57 @ 0x39
800031a: d803 bhi.n 8000324 <toHex+0x5e>
c2-='0';
800031c: 79bb ldrb r3, [r7, #6]
800031e: 3b30 subs r3, #48 @ 0x30
8000320: 71bb strb r3, [r7, #6]
8000322: e00b b.n 800033c <toHex+0x76>
}else if((c2>='a')&&(c2<='f')){
8000324: 79bb ldrb r3, [r7, #6]
8000326: 2b60 cmp r3, #96 @ 0x60
8000328: d906 bls.n 8000338 <toHex+0x72>
800032a: 79bb ldrb r3, [r7, #6]
800032c: 2b66 cmp r3, #102 @ 0x66
800032e: d803 bhi.n 8000338 <toHex+0x72>
c2=(c2-'a')+10;
8000330: 79bb ldrb r3, [r7, #6]
8000332: 3b57 subs r3, #87 @ 0x57
8000334: 71bb strb r3, [r7, #6]
8000336: e001 b.n 800033c <toHex+0x76>
}else return false;
8000338: 2300 movs r3, #0
800033a: e05a b.n 80003f2 <toHex+0x12c>
if((c3>='0')&&(c3<='9')){
800033c: 797b ldrb r3, [r7, #5]
800033e: 2b2f cmp r3, #47 @ 0x2f
8000340: d906 bls.n 8000350 <toHex+0x8a>
8000342: 797b ldrb r3, [r7, #5]
8000344: 2b39 cmp r3, #57 @ 0x39
8000346: d803 bhi.n 8000350 <toHex+0x8a>
c3-='0';
8000348: 797b ldrb r3, [r7, #5]
800034a: 3b30 subs r3, #48 @ 0x30
800034c: 717b strb r3, [r7, #5]
800034e: e00b b.n 8000368 <toHex+0xa2>
}else if((c3>='a')&&(c3<='f')){
8000350: 797b ldrb r3, [r7, #5]
8000352: 2b60 cmp r3, #96 @ 0x60
8000354: d906 bls.n 8000364 <toHex+0x9e>
8000356: 797b ldrb r3, [r7, #5]
8000358: 2b66 cmp r3, #102 @ 0x66
800035a: d803 bhi.n 8000364 <toHex+0x9e>
c3=(c3-'a')+10;
800035c: 797b ldrb r3, [r7, #5]
800035e: 3b57 subs r3, #87 @ 0x57
8000360: 717b strb r3, [r7, #5]
8000362: e001 b.n 8000368 <toHex+0xa2>
}else return false;
8000364: 2300 movs r3, #0
8000366: e044 b.n 80003f2 <toHex+0x12c>
if((c4>='0')&&(c4<='9')){
8000368: 793b ldrb r3, [r7, #4]
800036a: 2b2f cmp r3, #47 @ 0x2f
800036c: d906 bls.n 800037c <toHex+0xb6>
800036e: 793b ldrb r3, [r7, #4]
8000370: 2b39 cmp r3, #57 @ 0x39
8000372: d803 bhi.n 800037c <toHex+0xb6>
c4-='0';
8000374: 793b ldrb r3, [r7, #4]
8000376: 3b30 subs r3, #48 @ 0x30
8000378: 713b strb r3, [r7, #4]
800037a: e00b b.n 8000394 <toHex+0xce>
}else if((c4>='a')&&(c4<='f')){
800037c: 793b ldrb r3, [r7, #4]
800037e: 2b60 cmp r3, #96 @ 0x60
8000380: d906 bls.n 8000390 <toHex+0xca>
8000382: 793b ldrb r3, [r7, #4]
8000384: 2b66 cmp r3, #102 @ 0x66
8000386: d803 bhi.n 8000390 <toHex+0xca>
c4=(c4-'a')+10;
8000388: 793b ldrb r3, [r7, #4]
800038a: 3b57 subs r3, #87 @ 0x57
800038c: 713b strb r3, [r7, #4]
800038e: e001 b.n 8000394 <toHex+0xce>
}else return false;
8000390: 2300 movs r3, #0
8000392: e02e b.n 80003f2 <toHex+0x12c>
*retval=c1;
8000394: 79fb ldrb r3, [r7, #7]
8000396: b29a uxth r2, r3
8000398: 693b ldr r3, [r7, #16]
800039a: 801a strh r2, [r3, #0]
*retval*=16;
800039c: 693b ldr r3, [r7, #16]
800039e: 881b ldrh r3, [r3, #0]
80003a0: 011b lsls r3, r3, #4
80003a2: b29a uxth r2, r3
80003a4: 693b ldr r3, [r7, #16]
80003a6: 801a strh r2, [r3, #0]
*retval+=c2;
80003a8: 693b ldr r3, [r7, #16]
80003aa: 881a ldrh r2, [r3, #0]
80003ac: 79bb ldrb r3, [r7, #6]
80003ae: b29b uxth r3, r3
80003b0: 4413 add r3, r2
80003b2: b29a uxth r2, r3
80003b4: 693b ldr r3, [r7, #16]
80003b6: 801a strh r2, [r3, #0]
*retval*=16;
80003b8: 693b ldr r3, [r7, #16]
80003ba: 881b ldrh r3, [r3, #0]
80003bc: 011b lsls r3, r3, #4
80003be: b29a uxth r2, r3
80003c0: 693b ldr r3, [r7, #16]
80003c2: 801a strh r2, [r3, #0]
*retval+=c3;
80003c4: 693b ldr r3, [r7, #16]
80003c6: 881a ldrh r2, [r3, #0]
80003c8: 797b ldrb r3, [r7, #5]
80003ca: b29b uxth r3, r3
80003cc: 4413 add r3, r2
80003ce: b29a uxth r2, r3
80003d0: 693b ldr r3, [r7, #16]
80003d2: 801a strh r2, [r3, #0]
*retval*=16;
80003d4: 693b ldr r3, [r7, #16]
80003d6: 881b ldrh r3, [r3, #0]
80003d8: 011b lsls r3, r3, #4
80003da: b29a uxth r2, r3
80003dc: 693b ldr r3, [r7, #16]
80003de: 801a strh r2, [r3, #0]
*retval+=c4;
80003e0: 693b ldr r3, [r7, #16]
80003e2: 881a ldrh r2, [r3, #0]
80003e4: 793b ldrb r3, [r7, #4]
80003e6: b29b uxth r3, r3
80003e8: 4413 add r3, r2
80003ea: b29a uxth r2, r3
80003ec: 693b ldr r3, [r7, #16]
80003ee: 801a strh r2, [r3, #0]
return true;
80003f0: 2301 movs r3, #1
}
80003f2: 4618 mov r0, r3
80003f4: 3708 adds r7, #8
80003f6: 46bd mov sp, r7
80003f8: bc90 pop {r4, r7}
80003fa: 4770 bx lr
080003fc <manageCDC>:
void manageCDC(void){
80003fc: e92d 43f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, lr}
8000400: b0c1 sub sp, #260 @ 0x104
8000402: af06 add r7, sp, #24
uint16_t val;
uint16_t st;
uint16_t eeadd;
uint8_t i;
if (CDC_Available()) {
8000404: f00d fad0 bl 800d9a8 <CDC_Available>
8000408: 4603 mov r3, r0
800040a: 2b00 cmp r3, #0
800040c: f000 86c8 beq.w 80011a0 <manageCDC+0xda4>
int rx = CDC_ReadByte();
8000410: f00d fade bl 800d9d0 <CDC_ReadByte>
8000414: f8c7 00e0 str.w r0, [r7, #224] @ 0xe0
if (rx < 0) return;
8000418: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800041c: 2b00 cmp r3, #0
800041e: f2c0 86be blt.w 800119e <manageCDC+0xda2>
//uint8_t out = (uint8_t)c;
//if (out >= 'a' && out <= 'z') out -= 32; // to upper
rxbuf[rxidx]=rx;
8000422: 4bbd ldr r3, [pc, #756] @ (8000718 <manageCDC+0x31c>)
8000424: 781b ldrb r3, [r3, #0]
8000426: 461a mov r2, r3
8000428: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800042c: b2d9 uxtb r1, r3
800042e: 4bbb ldr r3, [pc, #748] @ (800071c <manageCDC+0x320>)
8000430: 5499 strb r1, [r3, r2]
while (CDC_Transmit_FS(&rxbuf[rxidx], 1) == USBD_BUSY);//echo
8000432: bf00 nop
8000434: 4bb8 ldr r3, [pc, #736] @ (8000718 <manageCDC+0x31c>)
8000436: 781b ldrb r3, [r3, #0]
8000438: 461a mov r2, r3
800043a: 4bb8 ldr r3, [pc, #736] @ (800071c <manageCDC+0x320>)
800043c: 4413 add r3, r2
800043e: 2101 movs r1, #1
8000440: 4618 mov r0, r3
8000442: f00d fb87 bl 800db54 <CDC_Transmit_FS>
8000446: 4603 mov r3, r0
8000448: 2b01 cmp r3, #1
800044a: d0f3 beq.n 8000434 <manageCDC+0x38>
if((rx==0x0d)||(rx==0x0a)){
800044c: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8000450: 2b0d cmp r3, #13
8000452: d004 beq.n 800045e <manageCDC+0x62>
8000454: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
8000458: 2b0a cmp r3, #10
800045a: f040 8699 bne.w 8001190 <manageCDC+0xd94>
if(rxidx){
800045e: 4bae ldr r3, [pc, #696] @ (8000718 <manageCDC+0x31c>)
8000460: 781b ldrb r3, [r3, #0]
8000462: 2b00 cmp r3, #0
8000464: f000 8690 beq.w 8001188 <manageCDC+0xd8c>
switch(rxbuf[0]){
8000468: 4bac ldr r3, [pc, #688] @ (800071c <manageCDC+0x320>)
800046a: 781b ldrb r3, [r3, #0]
800046c: 3b49 subs r3, #73 @ 0x49
800046e: 2b24 cmp r3, #36 @ 0x24
8000470: f200 8678 bhi.w 8001164 <manageCDC+0xd68>
8000474: a201 add r2, pc, #4 @ (adr r2, 800047c <manageCDC+0x80>)
8000476: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800047a: bf00 nop
800047c: 080006c7 .word 0x080006c7
8000480: 08001165 .word 0x08001165
8000484: 08001165 .word 0x08001165
8000488: 08001165 .word 0x08001165
800048c: 08001165 .word 0x08001165
8000490: 08001165 .word 0x08001165
8000494: 08001165 .word 0x08001165
8000498: 08001165 .word 0x08001165
800049c: 08001165 .word 0x08001165
80004a0: 08001165 .word 0x08001165
80004a4: 08001165 .word 0x08001165
80004a8: 08001165 .word 0x08001165
80004ac: 08001165 .word 0x08001165
80004b0: 08001165 .word 0x08001165
80004b4: 08001165 .word 0x08001165
80004b8: 08001165 .word 0x08001165
80004bc: 08001165 .word 0x08001165
80004c0: 08001165 .word 0x08001165
80004c4: 08001165 .word 0x08001165
80004c8: 08001165 .word 0x08001165
80004cc: 08001165 .word 0x08001165
80004d0: 08001165 .word 0x08001165
80004d4: 08001165 .word 0x08001165
80004d8: 08001165 .word 0x08001165
80004dc: 08001165 .word 0x08001165
80004e0: 080006eb .word 0x080006eb
80004e4: 08001165 .word 0x08001165
80004e8: 08001165 .word 0x08001165
80004ec: 080009f5 .word 0x080009f5
80004f0: 08001165 .word 0x08001165
80004f4: 08001165 .word 0x08001165
80004f8: 08001165 .word 0x08001165
80004fc: 08000511 .word 0x08000511
8000500: 08001165 .word 0x08001165
8000504: 08001165 .word 0x08001165
8000508: 08001165 .word 0x08001165
800050c: 080007ad .word 0x080007ad
case 'i':
sprintf((char*)s,"info\n");
8000510: f107 0310 add.w r3, r7, #16
8000514: 4982 ldr r1, [pc, #520] @ (8000720 <manageCDC+0x324>)
8000516: 4618 mov r0, r3
8000518: f00d fefa bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
800051c: bf00 nop
800051e: f107 0310 add.w r3, r7, #16
8000522: 2105 movs r1, #5
8000524: 4618 mov r0, r3
8000526: f00d fb15 bl 800db54 <CDC_Transmit_FS>
800052a: 4603 mov r3, r0
800052c: 2b01 cmp r3, #1
800052e: d0f6 beq.n 800051e <manageCDC+0x122>
sprintf((char*)s,"\npwm %d%d%d%d%d%d%d%d",IsPwmRunning(timMot1,FWMot1),IsPwmRunning(timMot1,BWMot1),IsPwmRunning(timMot2,FWMot2),IsPwmRunning(timMot2,BWMot2),IsPwmRunning(timMot3,FWMot3),IsPwmRunning(timMot3,BWMot3),IsPwmRunning(timMot4,FWMot4),IsPwmRunning(timMot4,BWMot4));
8000530: 2100 movs r1, #0
8000532: 487c ldr r0, [pc, #496] @ (8000724 <manageCDC+0x328>)
8000534: f003 fee6 bl 8004304 <IsPwmRunning>
8000538: 4603 mov r3, r0
800053a: 4698 mov r8, r3
800053c: 2104 movs r1, #4
800053e: 4879 ldr r0, [pc, #484] @ (8000724 <manageCDC+0x328>)
8000540: f003 fee0 bl 8004304 <IsPwmRunning>
8000544: 4603 mov r3, r0
8000546: 4699 mov r9, r3
8000548: 2108 movs r1, #8
800054a: 4876 ldr r0, [pc, #472] @ (8000724 <manageCDC+0x328>)
800054c: f003 feda bl 8004304 <IsPwmRunning>
8000550: 4603 mov r3, r0
8000552: 461c mov r4, r3
8000554: 210c movs r1, #12
8000556: 4873 ldr r0, [pc, #460] @ (8000724 <manageCDC+0x328>)
8000558: f003 fed4 bl 8004304 <IsPwmRunning>
800055c: 4603 mov r3, r0
800055e: 461d mov r5, r3
8000560: 2100 movs r1, #0
8000562: 4871 ldr r0, [pc, #452] @ (8000728 <manageCDC+0x32c>)
8000564: f003 fece bl 8004304 <IsPwmRunning>
8000568: 4603 mov r3, r0
800056a: 461e mov r6, r3
800056c: 2104 movs r1, #4
800056e: 486e ldr r0, [pc, #440] @ (8000728 <manageCDC+0x32c>)
8000570: f003 fec8 bl 8004304 <IsPwmRunning>
8000574: 4603 mov r3, r0
8000576: 607b str r3, [r7, #4]
8000578: 2108 movs r1, #8
800057a: 486b ldr r0, [pc, #428] @ (8000728 <manageCDC+0x32c>)
800057c: f003 fec2 bl 8004304 <IsPwmRunning>
8000580: 4603 mov r3, r0
8000582: 603b str r3, [r7, #0]
8000584: 210c movs r1, #12
8000586: 4868 ldr r0, [pc, #416] @ (8000728 <manageCDC+0x32c>)
8000588: f003 febc bl 8004304 <IsPwmRunning>
800058c: 4603 mov r3, r0
800058e: f107 0010 add.w r0, r7, #16
8000592: 9305 str r3, [sp, #20]
8000594: 683a ldr r2, [r7, #0]
8000596: 9204 str r2, [sp, #16]
8000598: 687b ldr r3, [r7, #4]
800059a: 9303 str r3, [sp, #12]
800059c: 9602 str r6, [sp, #8]
800059e: 9501 str r5, [sp, #4]
80005a0: 9400 str r4, [sp, #0]
80005a2: 464b mov r3, r9
80005a4: 4642 mov r2, r8
80005a6: 4961 ldr r1, [pc, #388] @ (800072c <manageCDC+0x330>)
80005a8: f00d feb2 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
80005ac: bf00 nop
80005ae: f107 0310 add.w r3, r7, #16
80005b2: 4618 mov r0, r3
80005b4: f7ff fdca bl 800014c <strlen>
80005b8: 4603 mov r3, r0
80005ba: b29a uxth r2, r3
80005bc: f107 0310 add.w r3, r7, #16
80005c0: 4611 mov r1, r2
80005c2: 4618 mov r0, r3
80005c4: f00d fac6 bl 800db54 <CDC_Transmit_FS>
80005c8: 4603 mov r3, r0
80005ca: 2b01 cmp r3, #1
80005cc: d0ef beq.n 80005ae <manageCDC+0x1b2>
sprintf((char*)s,"\n0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx 0x%lx",(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,FWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot1,BWMot1),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,FWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot2,BWMot2),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,FWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot3,BWMot3),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,FWMot4),(uint32_t)__HAL_TIM_GET_COMPARE(timMot4,BWMot4));
80005ce: 4b55 ldr r3, [pc, #340] @ (8000724 <manageCDC+0x328>)
80005d0: 681b ldr r3, [r3, #0]
80005d2: 6b5b ldr r3, [r3, #52] @ 0x34
80005d4: 607b str r3, [r7, #4]
80005d6: 4b53 ldr r3, [pc, #332] @ (8000724 <manageCDC+0x328>)
80005d8: 681b ldr r3, [r3, #0]
80005da: 6b99 ldr r1, [r3, #56] @ 0x38
80005dc: 6039 str r1, [r7, #0]
80005de: 4b51 ldr r3, [pc, #324] @ (8000724 <manageCDC+0x328>)
80005e0: 681b ldr r3, [r3, #0]
80005e2: 6bdb ldr r3, [r3, #60] @ 0x3c
80005e4: 4a4f ldr r2, [pc, #316] @ (8000724 <manageCDC+0x328>)
80005e6: 6812 ldr r2, [r2, #0]
80005e8: 6c12 ldr r2, [r2, #64] @ 0x40
80005ea: 494f ldr r1, [pc, #316] @ (8000728 <manageCDC+0x32c>)
80005ec: 6809 ldr r1, [r1, #0]
80005ee: 6b49 ldr r1, [r1, #52] @ 0x34
80005f0: 484d ldr r0, [pc, #308] @ (8000728 <manageCDC+0x32c>)
80005f2: 6800 ldr r0, [r0, #0]
80005f4: 6b80 ldr r0, [r0, #56] @ 0x38
80005f6: 4c4c ldr r4, [pc, #304] @ (8000728 <manageCDC+0x32c>)
80005f8: 6824 ldr r4, [r4, #0]
80005fa: 6be4 ldr r4, [r4, #60] @ 0x3c
80005fc: 4d4a ldr r5, [pc, #296] @ (8000728 <manageCDC+0x32c>)
80005fe: 682d ldr r5, [r5, #0]
8000600: 6c2d ldr r5, [r5, #64] @ 0x40
8000602: f107 0610 add.w r6, r7, #16
8000606: 9505 str r5, [sp, #20]
8000608: 9404 str r4, [sp, #16]
800060a: 9003 str r0, [sp, #12]
800060c: 9102 str r1, [sp, #8]
800060e: 9201 str r2, [sp, #4]
8000610: 9300 str r3, [sp, #0]
8000612: 683b ldr r3, [r7, #0]
8000614: 687a ldr r2, [r7, #4]
8000616: 4946 ldr r1, [pc, #280] @ (8000730 <manageCDC+0x334>)
8000618: 4630 mov r0, r6
800061a: f00d fe79 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
800061e: bf00 nop
8000620: f107 0310 add.w r3, r7, #16
8000624: 4618 mov r0, r3
8000626: f7ff fd91 bl 800014c <strlen>
800062a: 4603 mov r3, r0
800062c: b29a uxth r2, r3
800062e: f107 0310 add.w r3, r7, #16
8000632: 4611 mov r1, r2
8000634: 4618 mov r0, r3
8000636: f00d fa8d bl 800db54 <CDC_Transmit_FS>
800063a: 4603 mov r3, r0
800063c: 2b01 cmp r3, #1
800063e: d0ef beq.n 8000620 <manageCDC+0x224>
sprintf((char*)s,"\nP=0x%x ch4=%05d ch5=%05d ch6=%05d ch7=%05d ch8=%05d",pulsanti,ch4,ch5,ch6,ch7,ch8);
8000640: 4b3c ldr r3, [pc, #240] @ (8000734 <manageCDC+0x338>)
8000642: 781b ldrb r3, [r3, #0]
8000644: 461d mov r5, r3
8000646: 4b3c ldr r3, [pc, #240] @ (8000738 <manageCDC+0x33c>)
8000648: 881b ldrh r3, [r3, #0]
800064a: 461e mov r6, r3
800064c: 4b3b ldr r3, [pc, #236] @ (800073c <manageCDC+0x340>)
800064e: 881b ldrh r3, [r3, #0]
8000650: 461a mov r2, r3
8000652: 4b3b ldr r3, [pc, #236] @ (8000740 <manageCDC+0x344>)
8000654: 881b ldrh r3, [r3, #0]
8000656: 4619 mov r1, r3
8000658: 4b3a ldr r3, [pc, #232] @ (8000744 <manageCDC+0x348>)
800065a: 881b ldrh r3, [r3, #0]
800065c: 461c mov r4, r3
800065e: 4b3a ldr r3, [pc, #232] @ (8000748 <manageCDC+0x34c>)
8000660: 881b ldrh r3, [r3, #0]
8000662: f107 0010 add.w r0, r7, #16
8000666: 9303 str r3, [sp, #12]
8000668: 9402 str r4, [sp, #8]
800066a: 9101 str r1, [sp, #4]
800066c: 9200 str r2, [sp, #0]
800066e: 4633 mov r3, r6
8000670: 462a mov r2, r5
8000672: 4936 ldr r1, [pc, #216] @ (800074c <manageCDC+0x350>)
8000674: f00d fe4c bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000678: bf00 nop
800067a: f107 0310 add.w r3, r7, #16
800067e: 4618 mov r0, r3
8000680: f7ff fd64 bl 800014c <strlen>
8000684: 4603 mov r3, r0
8000686: b29a uxth r2, r3
8000688: f107 0310 add.w r3, r7, #16
800068c: 4611 mov r1, r2
800068e: 4618 mov r0, r3
8000690: f00d fa60 bl 800db54 <CDC_Transmit_FS>
8000694: 4603 mov r3, r0
8000696: 2b01 cmp r3, #1
8000698: d0ef beq.n 800067a <manageCDC+0x27e>
sprintf((char*)s,"\nstCiclo=%05d stPulsanti=%05d",stCiclo,stPulsanti);
800069a: 4b2d ldr r3, [pc, #180] @ (8000750 <manageCDC+0x354>)
800069c: 781b ldrb r3, [r3, #0]
800069e: 461a mov r2, r3
80006a0: 4b2c ldr r3, [pc, #176] @ (8000754 <manageCDC+0x358>)
80006a2: 781b ldrb r3, [r3, #0]
80006a4: f107 0010 add.w r0, r7, #16
80006a8: 492b ldr r1, [pc, #172] @ (8000758 <manageCDC+0x35c>)
80006aa: f00d fe31 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 31) == USBD_BUSY);
80006ae: bf00 nop
80006b0: f107 0310 add.w r3, r7, #16
80006b4: 211f movs r1, #31
80006b6: 4618 mov r0, r3
80006b8: f00d fa4c bl 800db54 <CDC_Transmit_FS>
80006bc: 4603 mov r3, r0
80006be: 2b01 cmp r3, #1
80006c0: d0f6 beq.n 80006b0 <manageCDC+0x2b4>
break;
80006c2: f000 bd61 b.w 8001188 <manageCDC+0xd8c>
case 'I':
sprintf((char*)s,"\nID000000");
80006c6: f107 0310 add.w r3, r7, #16
80006ca: 4924 ldr r1, [pc, #144] @ (800075c <manageCDC+0x360>)
80006cc: 4618 mov r0, r3
80006ce: f00d fe1f bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 9) == USBD_BUSY);
80006d2: bf00 nop
80006d4: f107 0310 add.w r3, r7, #16
80006d8: 2109 movs r1, #9
80006da: 4618 mov r0, r3
80006dc: f00d fa3a bl 800db54 <CDC_Transmit_FS>
80006e0: 4603 mov r3, r0
80006e2: 2b01 cmp r3, #1
80006e4: d0f6 beq.n 80006d4 <manageCDC+0x2d8>
break;
80006e6: f000 bd4f b.w 8001188 <manageCDC+0xd8c>
case 'b':
if(rxidx==2){
80006ea: 4b0b ldr r3, [pc, #44] @ (8000718 <manageCDC+0x31c>)
80006ec: 781b ldrb r3, [r3, #0]
80006ee: 2b02 cmp r3, #2
80006f0: d14a bne.n 8000788 <manageCDC+0x38c>
if(rxbuf[1]=='0'){
80006f2: 4b0a ldr r3, [pc, #40] @ (800071c <manageCDC+0x320>)
80006f4: 785b ldrb r3, [r3, #1]
80006f6: 2b30 cmp r3, #48 @ 0x30
80006f8: d104 bne.n 8000704 <manageCDC+0x308>
nobuz=false;
80006fa: 4b19 ldr r3, [pc, #100] @ (8000760 <manageCDC+0x364>)
80006fc: 2200 movs r2, #0
80006fe: 701a strb r2, [r3, #0]
}
}else{
sprintf((char*)s,"\nb0|1");
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
}
break;
8000700: f000 bd42 b.w 8001188 <manageCDC+0xd8c>
}else if(rxbuf[1]=='1'){
8000704: 4b05 ldr r3, [pc, #20] @ (800071c <manageCDC+0x320>)
8000706: 785b ldrb r3, [r3, #1]
8000708: 2b31 cmp r3, #49 @ 0x31
800070a: d12b bne.n 8000764 <manageCDC+0x368>
nobuz=true;
800070c: 4b14 ldr r3, [pc, #80] @ (8000760 <manageCDC+0x364>)
800070e: 2201 movs r2, #1
8000710: 701a strb r2, [r3, #0]
break;
8000712: f000 bd39 b.w 8001188 <manageCDC+0xd8c>
8000716: bf00 nop
8000718: 20000234 .word 0x20000234
800071c: 20000238 .word 0x20000238
8000720: 0800ec88 .word 0x0800ec88
8000724: 20000318 .word 0x20000318
8000728: 20000360 .word 0x20000360
800072c: 0800ec90 .word 0x0800ec90
8000730: 0800eca8 .word 0x0800eca8
8000734: 200003f0 .word 0x200003f0
8000738: 2000022a .word 0x2000022a
800073c: 2000022c .word 0x2000022c
8000740: 2000022e .word 0x2000022e
8000744: 20000230 .word 0x20000230
8000748: 20000232 .word 0x20000232
800074c: 0800ecdc .word 0x0800ecdc
8000750: 20000456 .word 0x20000456
8000754: 20000454 .word 0x20000454
8000758: 0800ed14 .word 0x0800ed14
800075c: 0800ed34 .word 0x0800ed34
8000760: 20000458 .word 0x20000458
sprintf((char*)s,"\nb0|1");
8000764: f107 0310 add.w r3, r7, #16
8000768: 499b ldr r1, [pc, #620] @ (80009d8 <manageCDC+0x5dc>)
800076a: 4618 mov r0, r3
800076c: f00d fdd0 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000770: bf00 nop
8000772: f107 0310 add.w r3, r7, #16
8000776: 2105 movs r1, #5
8000778: 4618 mov r0, r3
800077a: f00d f9eb bl 800db54 <CDC_Transmit_FS>
800077e: 4603 mov r3, r0
8000780: 2b01 cmp r3, #1
8000782: d0f6 beq.n 8000772 <manageCDC+0x376>
break;
8000784: f000 bd00 b.w 8001188 <manageCDC+0xd8c>
sprintf((char*)s,"\nb0|1");
8000788: f107 0310 add.w r3, r7, #16
800078c: 4992 ldr r1, [pc, #584] @ (80009d8 <manageCDC+0x5dc>)
800078e: 4618 mov r0, r3
8000790: f00d fdbe bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 5) == USBD_BUSY);
8000794: bf00 nop
8000796: f107 0310 add.w r3, r7, #16
800079a: 2105 movs r1, #5
800079c: 4618 mov r0, r3
800079e: f00d f9d9 bl 800db54 <CDC_Transmit_FS>
80007a2: 4603 mov r3, r0
80007a4: 2b01 cmp r3, #1
80007a6: d0f6 beq.n 8000796 <manageCDC+0x39a>
break;
80007a8: f000 bcee b.w 8001188 <manageCDC+0xd8c>
case 'm':
if(rxidx==8){
80007ac: 4b8b ldr r3, [pc, #556] @ (80009dc <manageCDC+0x5e0>)
80007ae: 781b ldrb r3, [r3, #0]
80007b0: 2b08 cmp r3, #8
80007b2: f040 80fe bne.w 80009b2 <manageCDC+0x5b6>
if((rxbuf[1]>='1')&&(rxbuf[1]<='4')){
80007b6: 4b8a ldr r3, [pc, #552] @ (80009e0 <manageCDC+0x5e4>)
80007b8: 785b ldrb r3, [r3, #1]
80007ba: 2b30 cmp r3, #48 @ 0x30
80007bc: f240 80e8 bls.w 8000990 <manageCDC+0x594>
80007c0: 4b87 ldr r3, [pc, #540] @ (80009e0 <manageCDC+0x5e4>)
80007c2: 785b ldrb r3, [r3, #1]
80007c4: 2b34 cmp r3, #52 @ 0x34
80007c6: f200 80e3 bhi.w 8000990 <manageCDC+0x594>
mot=rxbuf[1]-='0';
80007ca: 4b85 ldr r3, [pc, #532] @ (80009e0 <manageCDC+0x5e4>)
80007cc: 785b ldrb r3, [r3, #1]
80007ce: 3b30 subs r3, #48 @ 0x30
80007d0: b2da uxtb r2, r3
80007d2: 4b83 ldr r3, [pc, #524] @ (80009e0 <manageCDC+0x5e4>)
80007d4: 705a strb r2, [r3, #1]
80007d6: 4b82 ldr r3, [pc, #520] @ (80009e0 <manageCDC+0x5e4>)
80007d8: 785b ldrb r3, [r3, #1]
80007da: f887 30df strb.w r3, [r7, #223] @ 0xdf
if(rxbuf[2]=='f'){
80007de: 4b80 ldr r3, [pc, #512] @ (80009e0 <manageCDC+0x5e4>)
80007e0: 789b ldrb r3, [r3, #2]
80007e2: 2b66 cmp r3, #102 @ 0x66
80007e4: d103 bne.n 80007ee <manageCDC+0x3f2>
dir=FW;
80007e6: 2300 movs r3, #0
80007e8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7
80007ec: e019 b.n 8000822 <manageCDC+0x426>
}else if(rxbuf[2]=='b'){
80007ee: 4b7c ldr r3, [pc, #496] @ (80009e0 <manageCDC+0x5e4>)
80007f0: 789b ldrb r3, [r3, #2]
80007f2: 2b62 cmp r3, #98 @ 0x62
80007f4: d103 bne.n 80007fe <manageCDC+0x402>
dir=BW;
80007f6: 2301 movs r3, #1
80007f8: f887 30e7 strb.w r3, [r7, #231] @ 0xe7
80007fc: e011 b.n 8000822 <manageCDC+0x426>
}else{
sprintf((char*)s,"\n?mnsvvvvv s=f|b");//m nmotore senso valore
80007fe: f107 0310 add.w r3, r7, #16
8000802: 4978 ldr r1, [pc, #480] @ (80009e4 <manageCDC+0x5e8>)
8000804: 4618 mov r0, r3
8000806: f00d fd83 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 16) == USBD_BUSY);
800080a: bf00 nop
800080c: f107 0310 add.w r3, r7, #16
8000810: 2110 movs r1, #16
8000812: 4618 mov r0, r3
8000814: f00d f99e bl 800db54 <CDC_Transmit_FS>
8000818: 4603 mov r3, r0
800081a: 2b01 cmp r3, #1
800081c: d0f6 beq.n 800080c <manageCDC+0x410>
break;
800081e: f000 bcb3 b.w 8001188 <manageCDC+0xd8c>
}
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
8000822: 4b6f ldr r3, [pc, #444] @ (80009e0 <manageCDC+0x5e4>)
8000824: 78db ldrb r3, [r3, #3]
8000826: 2b2f cmp r3, #47 @ 0x2f
8000828: f240 80a1 bls.w 800096e <manageCDC+0x572>
800082c: 4b6c ldr r3, [pc, #432] @ (80009e0 <manageCDC+0x5e4>)
800082e: 78db ldrb r3, [r3, #3]
8000830: 2b39 cmp r3, #57 @ 0x39
8000832: f200 809c bhi.w 800096e <manageCDC+0x572>
8000836: 4b6a ldr r3, [pc, #424] @ (80009e0 <manageCDC+0x5e4>)
8000838: 791b ldrb r3, [r3, #4]
800083a: 2b2f cmp r3, #47 @ 0x2f
800083c: f240 8097 bls.w 800096e <manageCDC+0x572>
8000840: 4b67 ldr r3, [pc, #412] @ (80009e0 <manageCDC+0x5e4>)
8000842: 791b ldrb r3, [r3, #4]
8000844: 2b39 cmp r3, #57 @ 0x39
8000846: f200 8092 bhi.w 800096e <manageCDC+0x572>
800084a: 4b65 ldr r3, [pc, #404] @ (80009e0 <manageCDC+0x5e4>)
800084c: 795b ldrb r3, [r3, #5]
800084e: 2b2f cmp r3, #47 @ 0x2f
8000850: f240 808d bls.w 800096e <manageCDC+0x572>
8000854: 4b62 ldr r3, [pc, #392] @ (80009e0 <manageCDC+0x5e4>)
8000856: 795b ldrb r3, [r3, #5]
8000858: 2b39 cmp r3, #57 @ 0x39
800085a: f200 8088 bhi.w 800096e <manageCDC+0x572>
800085e: 4b60 ldr r3, [pc, #384] @ (80009e0 <manageCDC+0x5e4>)
8000860: 799b ldrb r3, [r3, #6]
8000862: 2b2f cmp r3, #47 @ 0x2f
8000864: f240 8083 bls.w 800096e <manageCDC+0x572>
8000868: 4b5d ldr r3, [pc, #372] @ (80009e0 <manageCDC+0x5e4>)
800086a: 799b ldrb r3, [r3, #6]
800086c: 2b39 cmp r3, #57 @ 0x39
800086e: d87e bhi.n 800096e <manageCDC+0x572>
8000870: 4b5b ldr r3, [pc, #364] @ (80009e0 <manageCDC+0x5e4>)
8000872: 79db ldrb r3, [r3, #7]
8000874: 2b2f cmp r3, #47 @ 0x2f
8000876: d97a bls.n 800096e <manageCDC+0x572>
8000878: 4b59 ldr r3, [pc, #356] @ (80009e0 <manageCDC+0x5e4>)
800087a: 79db ldrb r3, [r3, #7]
800087c: 2b39 cmp r3, #57 @ 0x39
800087e: d876 bhi.n 800096e <manageCDC+0x572>
dm=rxbuf[3]-='0';
8000880: 4b57 ldr r3, [pc, #348] @ (80009e0 <manageCDC+0x5e4>)
8000882: 78db ldrb r3, [r3, #3]
8000884: 3b30 subs r3, #48 @ 0x30
8000886: b2da uxtb r2, r3
8000888: 4b55 ldr r3, [pc, #340] @ (80009e0 <manageCDC+0x5e4>)
800088a: 70da strb r2, [r3, #3]
800088c: 4b54 ldr r3, [pc, #336] @ (80009e0 <manageCDC+0x5e4>)
800088e: 78db ldrb r3, [r3, #3]
8000890: f887 30de strb.w r3, [r7, #222] @ 0xde
m=rxbuf[4]-='0';
8000894: 4b52 ldr r3, [pc, #328] @ (80009e0 <manageCDC+0x5e4>)
8000896: 791b ldrb r3, [r3, #4]
8000898: 3b30 subs r3, #48 @ 0x30
800089a: b2da uxtb r2, r3
800089c: 4b50 ldr r3, [pc, #320] @ (80009e0 <manageCDC+0x5e4>)
800089e: 711a strb r2, [r3, #4]
80008a0: 4b4f ldr r3, [pc, #316] @ (80009e0 <manageCDC+0x5e4>)
80008a2: 791b ldrb r3, [r3, #4]
80008a4: f887 30dd strb.w r3, [r7, #221] @ 0xdd
c=rxbuf[5]-='0';
80008a8: 4b4d ldr r3, [pc, #308] @ (80009e0 <manageCDC+0x5e4>)
80008aa: 795b ldrb r3, [r3, #5]
80008ac: 3b30 subs r3, #48 @ 0x30
80008ae: b2da uxtb r2, r3
80008b0: 4b4b ldr r3, [pc, #300] @ (80009e0 <manageCDC+0x5e4>)
80008b2: 715a strb r2, [r3, #5]
80008b4: 4b4a ldr r3, [pc, #296] @ (80009e0 <manageCDC+0x5e4>)
80008b6: 795b ldrb r3, [r3, #5]
80008b8: f887 30dc strb.w r3, [r7, #220] @ 0xdc
d=rxbuf[6]-='0';
80008bc: 4b48 ldr r3, [pc, #288] @ (80009e0 <manageCDC+0x5e4>)
80008be: 799b ldrb r3, [r3, #6]
80008c0: 3b30 subs r3, #48 @ 0x30
80008c2: b2da uxtb r2, r3
80008c4: 4b46 ldr r3, [pc, #280] @ (80009e0 <manageCDC+0x5e4>)
80008c6: 719a strb r2, [r3, #6]
80008c8: 4b45 ldr r3, [pc, #276] @ (80009e0 <manageCDC+0x5e4>)
80008ca: 799b ldrb r3, [r3, #6]
80008cc: f887 30db strb.w r3, [r7, #219] @ 0xdb
u=rxbuf[7]-='0';
80008d0: 4b43 ldr r3, [pc, #268] @ (80009e0 <manageCDC+0x5e4>)
80008d2: 79db ldrb r3, [r3, #7]
80008d4: 3b30 subs r3, #48 @ 0x30
80008d6: b2da uxtb r2, r3
80008d8: 4b41 ldr r3, [pc, #260] @ (80009e0 <manageCDC+0x5e4>)
80008da: 71da strb r2, [r3, #7]
80008dc: 4b40 ldr r3, [pc, #256] @ (80009e0 <manageCDC+0x5e4>)
80008de: 79db ldrb r3, [r3, #7]
80008e0: f887 30da strb.w r3, [r7, #218] @ 0xda
val=dm;
80008e4: f897 30de ldrb.w r3, [r7, #222] @ 0xde
80008e8: b29b uxth r3, r3
80008ea: 81fb strh r3, [r7, #14]
val*=10;
80008ec: 89fb ldrh r3, [r7, #14]
80008ee: 461a mov r2, r3
80008f0: 0092 lsls r2, r2, #2
80008f2: 4413 add r3, r2
80008f4: 005b lsls r3, r3, #1
80008f6: b29b uxth r3, r3
80008f8: 81fb strh r3, [r7, #14]
val+=m;
80008fa: f897 30dd ldrb.w r3, [r7, #221] @ 0xdd
80008fe: b29a uxth r2, r3
8000900: 89fb ldrh r3, [r7, #14]
8000902: 4413 add r3, r2
8000904: b29b uxth r3, r3
8000906: 81fb strh r3, [r7, #14]
val*=10;
8000908: 89fb ldrh r3, [r7, #14]
800090a: 461a mov r2, r3
800090c: 0092 lsls r2, r2, #2
800090e: 4413 add r3, r2
8000910: 005b lsls r3, r3, #1
8000912: b29b uxth r3, r3
8000914: 81fb strh r3, [r7, #14]
val+=c;
8000916: f897 30dc ldrb.w r3, [r7, #220] @ 0xdc
800091a: b29a uxth r2, r3
800091c: 89fb ldrh r3, [r7, #14]
800091e: 4413 add r3, r2
8000920: b29b uxth r3, r3
8000922: 81fb strh r3, [r7, #14]
val*=10;
8000924: 89fb ldrh r3, [r7, #14]
8000926: 461a mov r2, r3
8000928: 0092 lsls r2, r2, #2
800092a: 4413 add r3, r2
800092c: 005b lsls r3, r3, #1
800092e: b29b uxth r3, r3
8000930: 81fb strh r3, [r7, #14]
val+=d;
8000932: f897 30db ldrb.w r3, [r7, #219] @ 0xdb
8000936: b29a uxth r2, r3
8000938: 89fb ldrh r3, [r7, #14]
800093a: 4413 add r3, r2
800093c: b29b uxth r3, r3
800093e: 81fb strh r3, [r7, #14]
val*=10;
8000940: 89fb ldrh r3, [r7, #14]
8000942: 461a mov r2, r3
8000944: 0092 lsls r2, r2, #2
8000946: 4413 add r3, r2
8000948: 005b lsls r3, r3, #1
800094a: b29b uxth r3, r3
800094c: 81fb strh r3, [r7, #14]
val+=u;
800094e: f897 30da ldrb.w r3, [r7, #218] @ 0xda
8000952: b29a uxth r2, r3
8000954: 89fb ldrh r3, [r7, #14]
8000956: 4413 add r3, r2
8000958: b29b uxth r3, r3
800095a: 81fb strh r3, [r7, #14]
SetMot(mot,dir,val);
800095c: 89fa ldrh r2, [r7, #14]
800095e: f897 10e7 ldrb.w r1, [r7, #231] @ 0xe7
8000962: f897 30df ldrb.w r3, [r7, #223] @ 0xdf
8000966: 4618 mov r0, r3
8000968: f003 fd42 bl 80043f0 <SetMot>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800096c: e032 b.n 80009d4 <manageCDC+0x5d8>
}else{
sprintf((char*)s,"\n?mnsvvvvv 00000>=vvvvv<=99999");//m nmotore senso valore
800096e: f107 0310 add.w r3, r7, #16
8000972: 491d ldr r1, [pc, #116] @ (80009e8 <manageCDC+0x5ec>)
8000974: 4618 mov r0, r3
8000976: f00d fccb bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800097a: bf00 nop
800097c: f107 0310 add.w r3, r7, #16
8000980: 2113 movs r1, #19
8000982: 4618 mov r0, r3
8000984: f00d f8e6 bl 800db54 <CDC_Transmit_FS>
8000988: 4603 mov r3, r0
800098a: 2b01 cmp r3, #1
800098c: d0f6 beq.n 800097c <manageCDC+0x580>
if(((rxbuf[3]>='0')&&(rxbuf[3]<='9'))&&((rxbuf[4]>='0')&&(rxbuf[4]<='9'))&&((rxbuf[5]>='0')&&(rxbuf[5]<='9'))&&((rxbuf[6]>='0')&&(rxbuf[6]<='9'))&&((rxbuf[7]>='0')&&(rxbuf[7]<='9'))){
800098e: e021 b.n 80009d4 <manageCDC+0x5d8>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv 1>=m<=4");//m nmotore senso valore
8000990: f107 0310 add.w r3, r7, #16
8000994: 4915 ldr r1, [pc, #84] @ (80009ec <manageCDC+0x5f0>)
8000996: 4618 mov r0, r3
8000998: f00d fcba bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 19) == USBD_BUSY);
800099c: bf00 nop
800099e: f107 0310 add.w r3, r7, #16
80009a2: 2113 movs r1, #19
80009a4: 4618 mov r0, r3
80009a6: f00d f8d5 bl 800db54 <CDC_Transmit_FS>
80009aa: 4603 mov r3, r0
80009ac: 2b01 cmp r3, #1
80009ae: d0f6 beq.n 800099e <manageCDC+0x5a2>
}
}else{
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
}
break;
80009b0: e3ea b.n 8001188 <manageCDC+0xd8c>
sprintf((char*)s,"\n?mnsvvvvv");//m nmotore senso valore
80009b2: f107 0310 add.w r3, r7, #16
80009b6: 490e ldr r1, [pc, #56] @ (80009f0 <manageCDC+0x5f4>)
80009b8: 4618 mov r0, r3
80009ba: f00d fca9 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 10) == USBD_BUSY);
80009be: bf00 nop
80009c0: f107 0310 add.w r3, r7, #16
80009c4: 210a movs r1, #10
80009c6: 4618 mov r0, r3
80009c8: f00d f8c4 bl 800db54 <CDC_Transmit_FS>
80009cc: 4603 mov r3, r0
80009ce: 2b01 cmp r3, #1
80009d0: d0f6 beq.n 80009c0 <manageCDC+0x5c4>
break;
80009d2: e3d9 b.n 8001188 <manageCDC+0xd8c>
80009d4: e3d8 b.n 8001188 <manageCDC+0xd8c>
80009d6: bf00 nop
80009d8: 0800ed40 .word 0x0800ed40
80009dc: 20000234 .word 0x20000234
80009e0: 20000238 .word 0x20000238
80009e4: 0800ed48 .word 0x0800ed48
80009e8: 0800ed5c .word 0x0800ed5c
80009ec: 0800ed7c .word 0x0800ed7c
80009f0: 0800ed90 .word 0x0800ed90
case 'e':
if(rxidx>1){
80009f4: 4bbb ldr r3, [pc, #748] @ (8000ce4 <manageCDC+0x8e8>)
80009f6: 781b ldrb r3, [r3, #0]
80009f8: 2b01 cmp r3, #1
80009fa: f240 839b bls.w 8001134 <manageCDC+0xd38>
if(rxbuf[1]=='r'){
80009fe: 4bba ldr r3, [pc, #744] @ (8000ce8 <manageCDC+0x8ec>)
8000a00: 785b ldrb r3, [r3, #1]
8000a02: 2b72 cmp r3, #114 @ 0x72
8000a04: f040 8086 bne.w 8000b14 <manageCDC+0x718>
if(rxidx==4){
8000a08: 4bb6 ldr r3, [pc, #728] @ (8000ce4 <manageCDC+0x8e8>)
8000a0a: 781b ldrb r3, [r3, #0]
8000a0c: 2b04 cmp r3, #4
8000a0e: d169 bne.n 8000ae4 <manageCDC+0x6e8>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000a10: 4bb5 ldr r3, [pc, #724] @ (8000ce8 <manageCDC+0x8ec>)
8000a12: 789a ldrb r2, [r3, #2]
8000a14: 4bb4 ldr r3, [pc, #720] @ (8000ce8 <manageCDC+0x8ec>)
8000a16: 78d9 ldrb r1, [r3, #3]
8000a18: f107 030c add.w r3, r7, #12
8000a1c: 9300 str r3, [sp, #0]
8000a1e: 460b mov r3, r1
8000a20: 2130 movs r1, #48 @ 0x30
8000a22: 2030 movs r0, #48 @ 0x30
8000a24: f7ff fc4f bl 80002c6 <toHex>
8000a28: 4603 mov r3, r0
8000a2a: 2b00 cmp r3, #0
8000a2c: d042 beq.n 8000ab4 <manageCDC+0x6b8>
st=EEW_Read(eeadd, &val);
8000a2e: 89bb ldrh r3, [r7, #12]
8000a30: b2db uxtb r3, r3
8000a32: f107 020e add.w r2, r7, #14
8000a36: 4611 mov r1, r2
8000a38: 4618 mov r0, r3
8000a3a: f7ff fc1b bl 8000274 <EEW_Read>
8000a3e: 4603 mov r3, r0
8000a40: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK){
8000a44: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000a48: 2b00 cmp r3, #0
8000a4a: d119 bne.n 8000a80 <manageCDC+0x684>
sprintf((char*)s,"\nee 0x%02x=0x%04x",eeadd,val);
8000a4c: 89bb ldrh r3, [r7, #12]
8000a4e: 461a mov r2, r3
8000a50: 89fb ldrh r3, [r7, #14]
8000a52: f107 0010 add.w r0, r7, #16
8000a56: 49a5 ldr r1, [pc, #660] @ (8000cec <manageCDC+0x8f0>)
8000a58: f00d fc5a bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a5c: bf00 nop
8000a5e: f107 0310 add.w r3, r7, #16
8000a62: 4618 mov r0, r3
8000a64: f7ff fb72 bl 800014c <strlen>
8000a68: 4603 mov r3, r0
8000a6a: b29a uxth r2, r3
8000a6c: f107 0310 add.w r3, r7, #16
8000a70: 4611 mov r1, r2
8000a72: 4618 mov r0, r3
8000a74: f00d f86e bl 800db54 <CDC_Transmit_FS>
8000a78: 4603 mov r3, r0
8000a7a: 2b01 cmp r3, #1
8000a7c: d0ef beq.n 8000a5e <manageCDC+0x662>
}
}else{
sprintf((char*)s,"\n?eraa | ewaavvvv");
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
}
break;
8000a7e: e382 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\nee read error %d",st);
8000a80: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000a84: f107 0310 add.w r3, r7, #16
8000a88: 4999 ldr r1, [pc, #612] @ (8000cf0 <manageCDC+0x8f4>)
8000a8a: 4618 mov r0, r3
8000a8c: f00d fc40 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000a90: bf00 nop
8000a92: f107 0310 add.w r3, r7, #16
8000a96: 4618 mov r0, r3
8000a98: f7ff fb58 bl 800014c <strlen>
8000a9c: 4603 mov r3, r0
8000a9e: b29a uxth r2, r3
8000aa0: f107 0310 add.w r3, r7, #16
8000aa4: 4611 mov r1, r2
8000aa6: 4618 mov r0, r3
8000aa8: f00d f854 bl 800db54 <CDC_Transmit_FS>
8000aac: 4603 mov r3, r0
8000aae: 2b01 cmp r3, #1
8000ab0: d0ef beq.n 8000a92 <manageCDC+0x696>
break;
8000ab2: e368 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?eraa hex values");
8000ab4: f107 0310 add.w r3, r7, #16
8000ab8: 498e ldr r1, [pc, #568] @ (8000cf4 <manageCDC+0x8f8>)
8000aba: 4618 mov r0, r3
8000abc: f00d fc28 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ac0: bf00 nop
8000ac2: f107 0310 add.w r3, r7, #16
8000ac6: 4618 mov r0, r3
8000ac8: f7ff fb40 bl 800014c <strlen>
8000acc: 4603 mov r3, r0
8000ace: b29a uxth r2, r3
8000ad0: f107 0310 add.w r3, r7, #16
8000ad4: 4611 mov r1, r2
8000ad6: 4618 mov r0, r3
8000ad8: f00d f83c bl 800db54 <CDC_Transmit_FS>
8000adc: 4603 mov r3, r0
8000ade: 2b01 cmp r3, #1
8000ae0: d0ef beq.n 8000ac2 <manageCDC+0x6c6>
break;
8000ae2: e350 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?eraa");
8000ae4: f107 0310 add.w r3, r7, #16
8000ae8: 4983 ldr r1, [pc, #524] @ (8000cf8 <manageCDC+0x8fc>)
8000aea: 4618 mov r0, r3
8000aec: f00d fc10 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000af0: bf00 nop
8000af2: f107 0310 add.w r3, r7, #16
8000af6: 4618 mov r0, r3
8000af8: f7ff fb28 bl 800014c <strlen>
8000afc: 4603 mov r3, r0
8000afe: b29a uxth r2, r3
8000b00: f107 0310 add.w r3, r7, #16
8000b04: 4611 mov r1, r2
8000b06: 4618 mov r0, r3
8000b08: f00d f824 bl 800db54 <CDC_Transmit_FS>
8000b0c: 4603 mov r3, r0
8000b0e: 2b01 cmp r3, #1
8000b10: d0ef beq.n 8000af2 <manageCDC+0x6f6>
break;
8000b12: e338 b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='w'){
8000b14: 4b74 ldr r3, [pc, #464] @ (8000ce8 <manageCDC+0x8ec>)
8000b16: 785b ldrb r3, [r3, #1]
8000b18: 2b77 cmp r3, #119 @ 0x77
8000b1a: d169 bne.n 8000bf0 <manageCDC+0x7f4>
if(rxidx==8){
8000b1c: 4b71 ldr r3, [pc, #452] @ (8000ce4 <manageCDC+0x8e8>)
8000b1e: 781b ldrb r3, [r3, #0]
8000b20: 2b08 cmp r3, #8
8000b22: d14d bne.n 8000bc0 <manageCDC+0x7c4>
if(toHex('0','0',rxbuf[2],rxbuf[3],&eeadd)){
8000b24: 4b70 ldr r3, [pc, #448] @ (8000ce8 <manageCDC+0x8ec>)
8000b26: 789a ldrb r2, [r3, #2]
8000b28: 4b6f ldr r3, [pc, #444] @ (8000ce8 <manageCDC+0x8ec>)
8000b2a: 78d9 ldrb r1, [r3, #3]
8000b2c: f107 030c add.w r3, r7, #12
8000b30: 9300 str r3, [sp, #0]
8000b32: 460b mov r3, r1
8000b34: 2130 movs r1, #48 @ 0x30
8000b36: 2030 movs r0, #48 @ 0x30
8000b38: f7ff fbc5 bl 80002c6 <toHex>
8000b3c: 4603 mov r3, r0
8000b3e: 2b00 cmp r3, #0
8000b40: d037 beq.n 8000bb2 <manageCDC+0x7b6>
if(toHex(rxbuf[4],rxbuf[5],rxbuf[6],rxbuf[7],&val)){
8000b42: 4b69 ldr r3, [pc, #420] @ (8000ce8 <manageCDC+0x8ec>)
8000b44: 7918 ldrb r0, [r3, #4]
8000b46: 4b68 ldr r3, [pc, #416] @ (8000ce8 <manageCDC+0x8ec>)
8000b48: 7959 ldrb r1, [r3, #5]
8000b4a: 4b67 ldr r3, [pc, #412] @ (8000ce8 <manageCDC+0x8ec>)
8000b4c: 799a ldrb r2, [r3, #6]
8000b4e: 4b66 ldr r3, [pc, #408] @ (8000ce8 <manageCDC+0x8ec>)
8000b50: 79dc ldrb r4, [r3, #7]
8000b52: f107 030e add.w r3, r7, #14
8000b56: 9300 str r3, [sp, #0]
8000b58: 4623 mov r3, r4
8000b5a: f7ff fbb4 bl 80002c6 <toHex>
8000b5e: 4603 mov r3, r0
8000b60: 2b00 cmp r3, #0
8000b62: d01f beq.n 8000ba4 <manageCDC+0x7a8>
st=EEW_Write(eeadd, val);
8000b64: 89bb ldrh r3, [r7, #12]
8000b66: b2db uxtb r3, r3
8000b68: 89fa ldrh r2, [r7, #14]
8000b6a: 4611 mov r1, r2
8000b6c: 4618 mov r0, r3
8000b6e: f7ff fb94 bl 800029a <EEW_Write>
8000b72: 4603 mov r3, r0
8000b74: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK)sprintf((char*)s,"\ndone 0x%02x=0x%04x",eeadd,val);
8000b78: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000b7c: 2b00 cmp r3, #0
8000b7e: d108 bne.n 8000b92 <manageCDC+0x796>
8000b80: 89bb ldrh r3, [r7, #12]
8000b82: 461a mov r2, r3
8000b84: 89fb ldrh r3, [r7, #14]
8000b86: f107 0010 add.w r0, r7, #16
8000b8a: 495c ldr r1, [pc, #368] @ (8000cfc <manageCDC+0x900>)
8000b8c: f00d fbc0 bl 800e310 <siprintf>
8000b90: e01c b.n 8000bcc <manageCDC+0x7d0>
else sprintf((char*)s,"\nee write error %d", st);
8000b92: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000b96: f107 0310 add.w r3, r7, #16
8000b9a: 4959 ldr r1, [pc, #356] @ (8000d00 <manageCDC+0x904>)
8000b9c: 4618 mov r0, r3
8000b9e: f00d fbb7 bl 800e310 <siprintf>
8000ba2: e013 b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaavvvv hex values");
8000ba4: f107 0310 add.w r3, r7, #16
8000ba8: 4956 ldr r1, [pc, #344] @ (8000d04 <manageCDC+0x908>)
8000baa: 4618 mov r0, r3
8000bac: f00d fbb0 bl 800e310 <siprintf>
8000bb0: e00c b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaa hex values");
8000bb2: f107 0310 add.w r3, r7, #16
8000bb6: 4954 ldr r1, [pc, #336] @ (8000d08 <manageCDC+0x90c>)
8000bb8: 4618 mov r0, r3
8000bba: f00d fba9 bl 800e310 <siprintf>
8000bbe: e005 b.n 8000bcc <manageCDC+0x7d0>
}else sprintf((char*)s,"\n?ewaavvvv");
8000bc0: f107 0310 add.w r3, r7, #16
8000bc4: 4951 ldr r1, [pc, #324] @ (8000d0c <manageCDC+0x910>)
8000bc6: 4618 mov r0, r3
8000bc8: f00d fba2 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000bcc: bf00 nop
8000bce: f107 0310 add.w r3, r7, #16
8000bd2: 4618 mov r0, r3
8000bd4: f7ff faba bl 800014c <strlen>
8000bd8: 4603 mov r3, r0
8000bda: b29a uxth r2, r3
8000bdc: f107 0310 add.w r3, r7, #16
8000be0: 4611 mov r1, r2
8000be2: 4618 mov r0, r3
8000be4: f00c ffb6 bl 800db54 <CDC_Transmit_FS>
8000be8: 4603 mov r3, r0
8000bea: 2b01 cmp r3, #1
8000bec: d0ef beq.n 8000bce <manageCDC+0x7d2>
break;
8000bee: e2ca b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='d'){
8000bf0: 4b3d ldr r3, [pc, #244] @ (8000ce8 <manageCDC+0x8ec>)
8000bf2: 785b ldrb r3, [r3, #1]
8000bf4: 2b64 cmp r3, #100 @ 0x64
8000bf6: f040 80a9 bne.w 8000d4c <manageCDC+0x950>
if(rxidx==2){
8000bfa: 4b3a ldr r3, [pc, #232] @ (8000ce4 <manageCDC+0x8e8>)
8000bfc: 781b ldrb r3, [r3, #0]
8000bfe: 2b02 cmp r3, #2
8000c00: f040 808c bne.w 8000d1c <manageCDC+0x920>
for(i=0;i<32;i++){
8000c04: 2300 movs r3, #0
8000c06: f887 30e6 strb.w r3, [r7, #230] @ 0xe6
8000c0a: e046 b.n 8000c9a <manageCDC+0x89e>
st=EEW_Read(i, &val);
8000c0c: f107 020e add.w r2, r7, #14
8000c10: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c14: 4611 mov r1, r2
8000c16: 4618 mov r0, r3
8000c18: f7ff fb2c bl 8000274 <EEW_Read>
8000c1c: 4603 mov r3, r0
8000c1e: f8a7 30d8 strh.w r3, [r7, #216] @ 0xd8
if (st == EE_OK){
8000c22: f8b7 30d8 ldrh.w r3, [r7, #216] @ 0xd8
8000c26: 2b00 cmp r3, #0
8000c28: d119 bne.n 8000c5e <manageCDC+0x862>
sprintf((char*)s,"\n0x%02x=%5d ",i,val);
8000c2a: f897 20e6 ldrb.w r2, [r7, #230] @ 0xe6
8000c2e: 89fb ldrh r3, [r7, #14]
8000c30: f107 0010 add.w r0, r7, #16
8000c34: 4936 ldr r1, [pc, #216] @ (8000d10 <manageCDC+0x914>)
8000c36: f00d fb6b bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c3a: bf00 nop
8000c3c: f107 0310 add.w r3, r7, #16
8000c40: 4618 mov r0, r3
8000c42: f7ff fa83 bl 800014c <strlen>
8000c46: 4603 mov r3, r0
8000c48: b29a uxth r2, r3
8000c4a: f107 0310 add.w r3, r7, #16
8000c4e: 4611 mov r1, r2
8000c50: 4618 mov r0, r3
8000c52: f00c ff7f bl 800db54 <CDC_Transmit_FS>
8000c56: 4603 mov r3, r0
8000c58: 2b01 cmp r3, #1
8000c5a: d0ef beq.n 8000c3c <manageCDC+0x840>
8000c5c: e018 b.n 8000c90 <manageCDC+0x894>
sprintf((char*)s,"rderr %d ",st);
8000c5e: f8b7 20d8 ldrh.w r2, [r7, #216] @ 0xd8
8000c62: f107 0310 add.w r3, r7, #16
8000c66: 492b ldr r1, [pc, #172] @ (8000d14 <manageCDC+0x918>)
8000c68: 4618 mov r0, r3
8000c6a: f00d fb51 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000c6e: bf00 nop
8000c70: f107 0310 add.w r3, r7, #16
8000c74: 4618 mov r0, r3
8000c76: f7ff fa69 bl 800014c <strlen>
8000c7a: 4603 mov r3, r0
8000c7c: b29a uxth r2, r3
8000c7e: f107 0310 add.w r3, r7, #16
8000c82: 4611 mov r1, r2
8000c84: 4618 mov r0, r3
8000c86: f00c ff65 bl 800db54 <CDC_Transmit_FS>
8000c8a: 4603 mov r3, r0
8000c8c: 2b01 cmp r3, #1
8000c8e: d0ef beq.n 8000c70 <manageCDC+0x874>
for(i=0;i<32;i++){
8000c90: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c94: 3301 adds r3, #1
8000c96: f887 30e6 strb.w r3, [r7, #230] @ 0xe6
8000c9a: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000c9e: 2b1f cmp r3, #31
8000ca0: d9b4 bls.n 8000c0c <manageCDC+0x810>
if((i%4)==0){
8000ca2: f897 30e6 ldrb.w r3, [r7, #230] @ 0xe6
8000ca6: f003 0303 and.w r3, r3, #3
8000caa: b2db uxtb r3, r3
8000cac: 2b00 cmp r3, #0
8000cae: f040 826a bne.w 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n");
8000cb2: f107 0310 add.w r3, r7, #16
8000cb6: 4918 ldr r1, [pc, #96] @ (8000d18 <manageCDC+0x91c>)
8000cb8: 4618 mov r0, r3
8000cba: f00d fb29 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000cbe: bf00 nop
8000cc0: f107 0310 add.w r3, r7, #16
8000cc4: 4618 mov r0, r3
8000cc6: f7ff fa41 bl 800014c <strlen>
8000cca: 4603 mov r3, r0
8000ccc: b29a uxth r2, r3
8000cce: f107 0310 add.w r3, r7, #16
8000cd2: 4611 mov r1, r2
8000cd4: 4618 mov r0, r3
8000cd6: f00c ff3d bl 800db54 <CDC_Transmit_FS>
8000cda: 4603 mov r3, r0
8000cdc: 2b01 cmp r3, #1
8000cde: d0ef beq.n 8000cc0 <manageCDC+0x8c4>
break;
8000ce0: e251 b.n 8001186 <manageCDC+0xd8a>
8000ce2: bf00 nop
8000ce4: 20000234 .word 0x20000234
8000ce8: 20000238 .word 0x20000238
8000cec: 0800ed9c .word 0x0800ed9c
8000cf0: 0800edb0 .word 0x0800edb0
8000cf4: 0800edc4 .word 0x0800edc4
8000cf8: 0800edd8 .word 0x0800edd8
8000cfc: 0800ede0 .word 0x0800ede0
8000d00: 0800edf4 .word 0x0800edf4
8000d04: 0800ee08 .word 0x0800ee08
8000d08: 0800ee20 .word 0x0800ee20
8000d0c: 0800ee34 .word 0x0800ee34
8000d10: 0800ee40 .word 0x0800ee40
8000d14: 0800ee50 .word 0x0800ee50
8000d18: 0800ee5c .word 0x0800ee5c
sprintf((char*)s,"\n?ed");
8000d1c: f107 0310 add.w r3, r7, #16
8000d20: 491d ldr r1, [pc, #116] @ (8000d98 <manageCDC+0x99c>)
8000d22: 4618 mov r0, r3
8000d24: f00d faf4 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d28: bf00 nop
8000d2a: f107 0310 add.w r3, r7, #16
8000d2e: 4618 mov r0, r3
8000d30: f7ff fa0c bl 800014c <strlen>
8000d34: 4603 mov r3, r0
8000d36: b29a uxth r2, r3
8000d38: f107 0310 add.w r3, r7, #16
8000d3c: 4611 mov r1, r2
8000d3e: 4618 mov r0, r3
8000d40: f00c ff08 bl 800db54 <CDC_Transmit_FS>
8000d44: 4603 mov r3, r0
8000d46: 2b01 cmp r3, #1
8000d48: d0ef beq.n 8000d2a <manageCDC+0x92e>
break;
8000d4a: e21c b.n 8001186 <manageCDC+0xd8a>
}else if(rxbuf[1]=='x'){
8000d4c: 4b13 ldr r3, [pc, #76] @ (8000d9c <manageCDC+0x9a0>)
8000d4e: 785b ldrb r3, [r3, #1]
8000d50: 2b78 cmp r3, #120 @ 0x78
8000d52: d129 bne.n 8000da8 <manageCDC+0x9ac>
if(rxidx==2){
8000d54: 4b12 ldr r3, [pc, #72] @ (8000da0 <manageCDC+0x9a4>)
8000d56: 781b ldrb r3, [r3, #0]
8000d58: 2b02 cmp r3, #2
8000d5a: d104 bne.n 8000d66 <manageCDC+0x96a>
loadDefault();
8000d5c: f000 fcd2 bl 8001704 <loadDefault>
loadEE();
8000d60: f000 fd1e bl 80017a0 <loadEE>
break;
8000d64: e20f b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?ex");
8000d66: f107 0310 add.w r3, r7, #16
8000d6a: 490e ldr r1, [pc, #56] @ (8000da4 <manageCDC+0x9a8>)
8000d6c: 4618 mov r0, r3
8000d6e: f00d facf bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000d72: bf00 nop
8000d74: f107 0310 add.w r3, r7, #16
8000d78: 4618 mov r0, r3
8000d7a: f7ff f9e7 bl 800014c <strlen>
8000d7e: 4603 mov r3, r0
8000d80: b29a uxth r2, r3
8000d82: f107 0310 add.w r3, r7, #16
8000d86: 4611 mov r1, r2
8000d88: 4618 mov r0, r3
8000d8a: f00c fee3 bl 800db54 <CDC_Transmit_FS>
8000d8e: 4603 mov r3, r0
8000d90: 2b01 cmp r3, #1
8000d92: d0ef beq.n 8000d74 <manageCDC+0x978>
break;
8000d94: e1f7 b.n 8001186 <manageCDC+0xd8a>
8000d96: bf00 nop
8000d98: 0800ee60 .word 0x0800ee60
8000d9c: 20000238 .word 0x20000238
8000da0: 20000234 .word 0x20000234
8000da4: 0800ee68 .word 0x0800ee68
}else if(rxbuf[1]=='v'){
8000da8: 4bb4 ldr r3, [pc, #720] @ (800107c <manageCDC+0xc80>)
8000daa: 785b ldrb r3, [r3, #1]
8000dac: 2b76 cmp r3, #118 @ 0x76
8000dae: f040 814c bne.w 800104a <manageCDC+0xc4e>
if(rxidx==2){
8000db2: 4bb3 ldr r3, [pc, #716] @ (8001080 <manageCDC+0xc84>)
8000db4: 781b ldrb r3, [r3, #0]
8000db6: 2b02 cmp r3, #2
8000db8: f040 812f bne.w 800101a <manageCDC+0xc1e>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8000dbc: 4bb1 ldr r3, [pc, #708] @ (8001084 <manageCDC+0xc88>)
8000dbe: 881b ldrh r3, [r3, #0]
8000dc0: 469c mov ip, r3
8000dc2: 4bb1 ldr r3, [pc, #708] @ (8001088 <manageCDC+0xc8c>)
8000dc4: 881b ldrh r3, [r3, #0]
8000dc6: 469e mov lr, r3
8000dc8: 4bb0 ldr r3, [pc, #704] @ (800108c <manageCDC+0xc90>)
8000dca: 881b ldrh r3, [r3, #0]
8000dcc: 461a mov r2, r3
8000dce: 4bb0 ldr r3, [pc, #704] @ (8001090 <manageCDC+0xc94>)
8000dd0: 881b ldrh r3, [r3, #0]
8000dd2: 4619 mov r1, r3
8000dd4: 4baf ldr r3, [pc, #700] @ (8001094 <manageCDC+0xc98>)
8000dd6: 881b ldrh r3, [r3, #0]
8000dd8: 461c mov r4, r3
8000dda: 4baf ldr r3, [pc, #700] @ (8001098 <manageCDC+0xc9c>)
8000ddc: 881b ldrh r3, [r3, #0]
8000dde: 461d mov r5, r3
8000de0: 4bae ldr r3, [pc, #696] @ (800109c <manageCDC+0xca0>)
8000de2: 881b ldrh r3, [r3, #0]
8000de4: 461e mov r6, r3
8000de6: 4bae ldr r3, [pc, #696] @ (80010a0 <manageCDC+0xca4>)
8000de8: 881b ldrh r3, [r3, #0]
8000dea: f107 0010 add.w r0, r7, #16
8000dee: 9305 str r3, [sp, #20]
8000df0: 9604 str r6, [sp, #16]
8000df2: 9503 str r5, [sp, #12]
8000df4: 9402 str r4, [sp, #8]
8000df6: 9101 str r1, [sp, #4]
8000df8: 9200 str r2, [sp, #0]
8000dfa: 4673 mov r3, lr
8000dfc: 4662 mov r2, ip
8000dfe: 49a9 ldr r1, [pc, #676] @ (80010a4 <manageCDC+0xca8>)
8000e00: f00d fa86 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e04: bf00 nop
8000e06: f107 0310 add.w r3, r7, #16
8000e0a: 4618 mov r0, r3
8000e0c: f7ff f99e bl 800014c <strlen>
8000e10: 4603 mov r3, r0
8000e12: b29a uxth r2, r3
8000e14: f107 0310 add.w r3, r7, #16
8000e18: 4611 mov r1, r2
8000e1a: 4618 mov r0, r3
8000e1c: f00c fe9a bl 800db54 <CDC_Transmit_FS>
8000e20: 4603 mov r3, r0
8000e22: 2b01 cmp r3, #1
8000e24: d0ef beq.n 8000e06 <manageCDC+0xa0a>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
8000e26: 4ba0 ldr r3, [pc, #640] @ (80010a8 <manageCDC+0xcac>)
8000e28: 881b ldrh r3, [r3, #0]
8000e2a: 4619 mov r1, r3
8000e2c: 4b9f ldr r3, [pc, #636] @ (80010ac <manageCDC+0xcb0>)
8000e2e: 881b ldrh r3, [r3, #0]
8000e30: 461c mov r4, r3
8000e32: 4b9f ldr r3, [pc, #636] @ (80010b0 <manageCDC+0xcb4>)
8000e34: 881b ldrh r3, [r3, #0]
8000e36: 461a mov r2, r3
8000e38: 4b9e ldr r3, [pc, #632] @ (80010b4 <manageCDC+0xcb8>)
8000e3a: 881b ldrh r3, [r3, #0]
8000e3c: f107 0010 add.w r0, r7, #16
8000e40: 9301 str r3, [sp, #4]
8000e42: 9200 str r2, [sp, #0]
8000e44: 4623 mov r3, r4
8000e46: 460a mov r2, r1
8000e48: 499b ldr r1, [pc, #620] @ (80010b8 <manageCDC+0xcbc>)
8000e4a: f00d fa61 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e4e: bf00 nop
8000e50: f107 0310 add.w r3, r7, #16
8000e54: 4618 mov r0, r3
8000e56: f7ff f979 bl 800014c <strlen>
8000e5a: 4603 mov r3, r0
8000e5c: b29a uxth r2, r3
8000e5e: f107 0310 add.w r3, r7, #16
8000e62: 4611 mov r1, r2
8000e64: 4618 mov r0, r3
8000e66: f00c fe75 bl 800db54 <CDC_Transmit_FS>
8000e6a: 4603 mov r3, r0
8000e6c: 2b01 cmp r3, #1
8000e6e: d0ef beq.n 8000e50 <manageCDC+0xa54>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
8000e70: 4b92 ldr r3, [pc, #584] @ (80010bc <manageCDC+0xcc0>)
8000e72: 881b ldrh r3, [r3, #0]
8000e74: 461a mov r2, r3
8000e76: 4b92 ldr r3, [pc, #584] @ (80010c0 <manageCDC+0xcc4>)
8000e78: 881b ldrh r3, [r3, #0]
8000e7a: f107 0010 add.w r0, r7, #16
8000e7e: 4991 ldr r1, [pc, #580] @ (80010c4 <manageCDC+0xcc8>)
8000e80: f00d fa46 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000e84: bf00 nop
8000e86: f107 0310 add.w r3, r7, #16
8000e8a: 4618 mov r0, r3
8000e8c: f7ff f95e bl 800014c <strlen>
8000e90: 4603 mov r3, r0
8000e92: b29a uxth r2, r3
8000e94: f107 0310 add.w r3, r7, #16
8000e98: 4611 mov r1, r2
8000e9a: 4618 mov r0, r3
8000e9c: f00c fe5a bl 800db54 <CDC_Transmit_FS>
8000ea0: 4603 mov r3, r0
8000ea2: 2b01 cmp r3, #1
8000ea4: d0ef beq.n 8000e86 <manageCDC+0xa8a>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
8000ea6: 4b88 ldr r3, [pc, #544] @ (80010c8 <manageCDC+0xccc>)
8000ea8: 881b ldrh r3, [r3, #0]
8000eaa: 4619 mov r1, r3
8000eac: 4b87 ldr r3, [pc, #540] @ (80010cc <manageCDC+0xcd0>)
8000eae: 881b ldrh r3, [r3, #0]
8000eb0: 461c mov r4, r3
8000eb2: 4b87 ldr r3, [pc, #540] @ (80010d0 <manageCDC+0xcd4>)
8000eb4: 881b ldrh r3, [r3, #0]
8000eb6: 461a mov r2, r3
8000eb8: 4b86 ldr r3, [pc, #536] @ (80010d4 <manageCDC+0xcd8>)
8000eba: 881b ldrh r3, [r3, #0]
8000ebc: f107 0010 add.w r0, r7, #16
8000ec0: 9301 str r3, [sp, #4]
8000ec2: 9200 str r2, [sp, #0]
8000ec4: 4623 mov r3, r4
8000ec6: 460a mov r2, r1
8000ec8: 4983 ldr r1, [pc, #524] @ (80010d8 <manageCDC+0xcdc>)
8000eca: f00d fa21 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ece: bf00 nop
8000ed0: f107 0310 add.w r3, r7, #16
8000ed4: 4618 mov r0, r3
8000ed6: f7ff f939 bl 800014c <strlen>
8000eda: 4603 mov r3, r0
8000edc: b29a uxth r2, r3
8000ede: f107 0310 add.w r3, r7, #16
8000ee2: 4611 mov r1, r2
8000ee4: 4618 mov r0, r3
8000ee6: f00c fe35 bl 800db54 <CDC_Transmit_FS>
8000eea: 4603 mov r3, r0
8000eec: 2b01 cmp r3, #1
8000eee: d0ef beq.n 8000ed0 <manageCDC+0xad4>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
8000ef0: 4b7a ldr r3, [pc, #488] @ (80010dc <manageCDC+0xce0>)
8000ef2: 881b ldrh r3, [r3, #0]
8000ef4: 4619 mov r1, r3
8000ef6: 4b7a ldr r3, [pc, #488] @ (80010e0 <manageCDC+0xce4>)
8000ef8: 881b ldrh r3, [r3, #0]
8000efa: 461c mov r4, r3
8000efc: 4b79 ldr r3, [pc, #484] @ (80010e4 <manageCDC+0xce8>)
8000efe: 881b ldrh r3, [r3, #0]
8000f00: 461a mov r2, r3
8000f02: 4b79 ldr r3, [pc, #484] @ (80010e8 <manageCDC+0xcec>)
8000f04: 881b ldrh r3, [r3, #0]
8000f06: f107 0010 add.w r0, r7, #16
8000f0a: 9301 str r3, [sp, #4]
8000f0c: 9200 str r2, [sp, #0]
8000f0e: 4623 mov r3, r4
8000f10: 460a mov r2, r1
8000f12: 4976 ldr r1, [pc, #472] @ (80010ec <manageCDC+0xcf0>)
8000f14: f00d f9fc bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000f18: bf00 nop
8000f1a: f107 0310 add.w r3, r7, #16
8000f1e: 4618 mov r0, r3
8000f20: f7ff f914 bl 800014c <strlen>
8000f24: 4603 mov r3, r0
8000f26: b29a uxth r2, r3
8000f28: f107 0310 add.w r3, r7, #16
8000f2c: 4611 mov r1, r2
8000f2e: 4618 mov r0, r3
8000f30: f00c fe10 bl 800db54 <CDC_Transmit_FS>
8000f34: 4603 mov r3, r0
8000f36: 2b01 cmp r3, #1
8000f38: d0ef beq.n 8000f1a <manageCDC+0xb1e>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
8000f3a: 4b6d ldr r3, [pc, #436] @ (80010f0 <manageCDC+0xcf4>)
8000f3c: 881b ldrh r3, [r3, #0]
8000f3e: 4619 mov r1, r3
8000f40: 4b6c ldr r3, [pc, #432] @ (80010f4 <manageCDC+0xcf8>)
8000f42: 881b ldrh r3, [r3, #0]
8000f44: 461c mov r4, r3
8000f46: 4b6c ldr r3, [pc, #432] @ (80010f8 <manageCDC+0xcfc>)
8000f48: 881b ldrh r3, [r3, #0]
8000f4a: 461a mov r2, r3
8000f4c: 4b6b ldr r3, [pc, #428] @ (80010fc <manageCDC+0xd00>)
8000f4e: 881b ldrh r3, [r3, #0]
8000f50: f107 0010 add.w r0, r7, #16
8000f54: 9301 str r3, [sp, #4]
8000f56: 9200 str r2, [sp, #0]
8000f58: 4623 mov r3, r4
8000f5a: 460a mov r2, r1
8000f5c: 4968 ldr r1, [pc, #416] @ (8001100 <manageCDC+0xd04>)
8000f5e: f00d f9d7 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000f62: bf00 nop
8000f64: f107 0310 add.w r3, r7, #16
8000f68: 4618 mov r0, r3
8000f6a: f7ff f8ef bl 800014c <strlen>
8000f6e: 4603 mov r3, r0
8000f70: b29a uxth r2, r3
8000f72: f107 0310 add.w r3, r7, #16
8000f76: 4611 mov r1, r2
8000f78: 4618 mov r0, r3
8000f7a: f00c fdeb bl 800db54 <CDC_Transmit_FS>
8000f7e: 4603 mov r3, r0
8000f80: 2b01 cmp r3, #1
8000f82: d0ef beq.n 8000f64 <manageCDC+0xb68>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
8000f84: 4b5f ldr r3, [pc, #380] @ (8001104 <manageCDC+0xd08>)
8000f86: 881b ldrh r3, [r3, #0]
8000f88: 4619 mov r1, r3
8000f8a: 4b5f ldr r3, [pc, #380] @ (8001108 <manageCDC+0xd0c>)
8000f8c: 881b ldrh r3, [r3, #0]
8000f8e: 461c mov r4, r3
8000f90: 4b5e ldr r3, [pc, #376] @ (800110c <manageCDC+0xd10>)
8000f92: 881b ldrh r3, [r3, #0]
8000f94: 461a mov r2, r3
8000f96: 4b5e ldr r3, [pc, #376] @ (8001110 <manageCDC+0xd14>)
8000f98: 881b ldrh r3, [r3, #0]
8000f9a: f107 0010 add.w r0, r7, #16
8000f9e: 9301 str r3, [sp, #4]
8000fa0: 9200 str r2, [sp, #0]
8000fa2: 4623 mov r3, r4
8000fa4: 460a mov r2, r1
8000fa6: 495b ldr r1, [pc, #364] @ (8001114 <manageCDC+0xd18>)
8000fa8: f00d f9b2 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000fac: bf00 nop
8000fae: f107 0310 add.w r3, r7, #16
8000fb2: 4618 mov r0, r3
8000fb4: f7ff f8ca bl 800014c <strlen>
8000fb8: 4603 mov r3, r0
8000fba: b29a uxth r2, r3
8000fbc: f107 0310 add.w r3, r7, #16
8000fc0: 4611 mov r1, r2
8000fc2: 4618 mov r0, r3
8000fc4: f00c fdc6 bl 800db54 <CDC_Transmit_FS>
8000fc8: 4603 mov r3, r0
8000fca: 2b01 cmp r3, #1
8000fcc: d0ef beq.n 8000fae <manageCDC+0xbb2>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
8000fce: 4b52 ldr r3, [pc, #328] @ (8001118 <manageCDC+0xd1c>)
8000fd0: 881b ldrh r3, [r3, #0]
8000fd2: 4619 mov r1, r3
8000fd4: 4b51 ldr r3, [pc, #324] @ (800111c <manageCDC+0xd20>)
8000fd6: 881b ldrh r3, [r3, #0]
8000fd8: 461c mov r4, r3
8000fda: 4b51 ldr r3, [pc, #324] @ (8001120 <manageCDC+0xd24>)
8000fdc: 881b ldrh r3, [r3, #0]
8000fde: 461a mov r2, r3
8000fe0: 4b50 ldr r3, [pc, #320] @ (8001124 <manageCDC+0xd28>)
8000fe2: 881b ldrh r3, [r3, #0]
8000fe4: f107 0010 add.w r0, r7, #16
8000fe8: 9301 str r3, [sp, #4]
8000fea: 9200 str r2, [sp, #0]
8000fec: 4623 mov r3, r4
8000fee: 460a mov r2, r1
8000ff0: 494d ldr r1, [pc, #308] @ (8001128 <manageCDC+0xd2c>)
8000ff2: f00d f98d bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8000ff6: bf00 nop
8000ff8: f107 0310 add.w r3, r7, #16
8000ffc: 4618 mov r0, r3
8000ffe: f7ff f8a5 bl 800014c <strlen>
8001002: 4603 mov r3, r0
8001004: b29a uxth r2, r3
8001006: f107 0310 add.w r3, r7, #16
800100a: 4611 mov r1, r2
800100c: 4618 mov r0, r3
800100e: f00c fda1 bl 800db54 <CDC_Transmit_FS>
8001012: 4603 mov r3, r0
8001014: 2b01 cmp r3, #1
8001016: d0ef beq.n 8000ff8 <manageCDC+0xbfc>
break;
8001018: e0b5 b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?ev");
800101a: f107 0310 add.w r3, r7, #16
800101e: 4943 ldr r1, [pc, #268] @ (800112c <manageCDC+0xd30>)
8001020: 4618 mov r0, r3
8001022: f00d f975 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001026: bf00 nop
8001028: f107 0310 add.w r3, r7, #16
800102c: 4618 mov r0, r3
800102e: f7ff f88d bl 800014c <strlen>
8001032: 4603 mov r3, r0
8001034: b29a uxth r2, r3
8001036: f107 0310 add.w r3, r7, #16
800103a: 4611 mov r1, r2
800103c: 4618 mov r0, r3
800103e: f00c fd89 bl 800db54 <CDC_Transmit_FS>
8001042: 4603 mov r3, r0
8001044: 2b01 cmp r3, #1
8001046: d0ef beq.n 8001028 <manageCDC+0xc2c>
break;
8001048: e09d b.n 8001186 <manageCDC+0xd8a>
sprintf((char*)s,"\n?er|w|d|x|v");
800104a: f107 0310 add.w r3, r7, #16
800104e: 4938 ldr r1, [pc, #224] @ (8001130 <manageCDC+0xd34>)
8001050: 4618 mov r0, r3
8001052: f00d f95d bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001056: bf00 nop
8001058: f107 0310 add.w r3, r7, #16
800105c: 4618 mov r0, r3
800105e: f7ff f875 bl 800014c <strlen>
8001062: 4603 mov r3, r0
8001064: b29a uxth r2, r3
8001066: f107 0310 add.w r3, r7, #16
800106a: 4611 mov r1, r2
800106c: 4618 mov r0, r3
800106e: f00c fd71 bl 800db54 <CDC_Transmit_FS>
8001072: 4603 mov r3, r0
8001074: 2b01 cmp r3, #1
8001076: d0ef beq.n 8001058 <manageCDC+0xc5c>
break;
8001078: e085 b.n 8001186 <manageCDC+0xd8a>
800107a: bf00 nop
800107c: 20000238 .word 0x20000238
8001080: 20000234 .word 0x20000234
8001084: 20000400 .word 0x20000400
8001088: 20000402 .word 0x20000402
800108c: 20000404 .word 0x20000404
8001090: 20000406 .word 0x20000406
8001094: 20000408 .word 0x20000408
8001098: 2000040a .word 0x2000040a
800109c: 2000040c .word 0x2000040c
80010a0: 2000040e .word 0x2000040e
80010a4: 0800ee70 .word 0x0800ee70
80010a8: 20000410 .word 0x20000410
80010ac: 20000412 .word 0x20000412
80010b0: 20000414 .word 0x20000414
80010b4: 20000416 .word 0x20000416
80010b8: 0800eecc .word 0x0800eecc
80010bc: 20000418 .word 0x20000418
80010c0: 2000041e .word 0x2000041e
80010c4: 0800ef10 .word 0x0800ef10
80010c8: 20000420 .word 0x20000420
80010cc: 20000422 .word 0x20000422
80010d0: 20000424 .word 0x20000424
80010d4: 20000426 .word 0x20000426
80010d8: 0800ef28 .word 0x0800ef28
80010dc: 20000428 .word 0x20000428
80010e0: 2000042a .word 0x2000042a
80010e4: 20000438 .word 0x20000438
80010e8: 2000043a .word 0x2000043a
80010ec: 0800ef5c .word 0x0800ef5c
80010f0: 2000042c .word 0x2000042c
80010f4: 2000042e .word 0x2000042e
80010f8: 2000043c .word 0x2000043c
80010fc: 2000043e .word 0x2000043e
8001100: 0800ef90 .word 0x0800ef90
8001104: 20000430 .word 0x20000430
8001108: 20000432 .word 0x20000432
800110c: 20000440 .word 0x20000440
8001110: 20000442 .word 0x20000442
8001114: 0800efc4 .word 0x0800efc4
8001118: 20000434 .word 0x20000434
800111c: 20000436 .word 0x20000436
8001120: 20000444 .word 0x20000444
8001124: 20000446 .word 0x20000446
8001128: 0800eff8 .word 0x0800eff8
800112c: 0800f02c .word 0x0800f02c
8001130: 0800f034 .word 0x0800f034
sprintf((char*)s,"\n?eraa | ewaavvvv");
8001134: f107 0310 add.w r3, r7, #16
8001138: 491b ldr r1, [pc, #108] @ (80011a8 <manageCDC+0xdac>)
800113a: 4618 mov r0, r3
800113c: f00d f8e8 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, strlen((char*)s)) == USBD_BUSY);
8001140: bf00 nop
8001142: f107 0310 add.w r3, r7, #16
8001146: 4618 mov r0, r3
8001148: f7ff f800 bl 800014c <strlen>
800114c: 4603 mov r3, r0
800114e: b29a uxth r2, r3
8001150: f107 0310 add.w r3, r7, #16
8001154: 4611 mov r1, r2
8001156: 4618 mov r0, r3
8001158: f00c fcfc bl 800db54 <CDC_Transmit_FS>
800115c: 4603 mov r3, r0
800115e: 2b01 cmp r3, #1
8001160: d0ef beq.n 8001142 <manageCDC+0xd46>
break;
8001162: e010 b.n 8001186 <manageCDC+0xd8a>
default:
sprintf((char*)s,"\n?");
8001164: f107 0310 add.w r3, r7, #16
8001168: 4910 ldr r1, [pc, #64] @ (80011ac <manageCDC+0xdb0>)
800116a: 4618 mov r0, r3
800116c: f00d f8d0 bl 800e310 <siprintf>
while (CDC_Transmit_FS(s, 2) == USBD_BUSY);
8001170: bf00 nop
8001172: f107 0310 add.w r3, r7, #16
8001176: 2102 movs r1, #2
8001178: 4618 mov r0, r3
800117a: f00c fceb bl 800db54 <CDC_Transmit_FS>
800117e: 4603 mov r3, r0
8001180: 2b01 cmp r3, #1
8001182: d0f6 beq.n 8001172 <manageCDC+0xd76>
break;
8001184: e000 b.n 8001188 <manageCDC+0xd8c>
break;
8001186: bf00 nop
}
}
rxidx=0;
8001188: 4b09 ldr r3, [pc, #36] @ (80011b0 <manageCDC+0xdb4>)
800118a: 2200 movs r2, #0
800118c: 701a strb r2, [r3, #0]
800118e: e007 b.n 80011a0 <manageCDC+0xda4>
}else rxidx++;
8001190: 4b07 ldr r3, [pc, #28] @ (80011b0 <manageCDC+0xdb4>)
8001192: 781b ldrb r3, [r3, #0]
8001194: 3301 adds r3, #1
8001196: b2da uxtb r2, r3
8001198: 4b05 ldr r3, [pc, #20] @ (80011b0 <manageCDC+0xdb4>)
800119a: 701a strb r2, [r3, #0]
800119c: e000 b.n 80011a0 <manageCDC+0xda4>
if (rx < 0) return;
800119e: bf00 nop
// tiny spin or yield
}
}
80011a0: 37ec adds r7, #236 @ 0xec
80011a2: 46bd mov sp, r7
80011a4: e8bd 83f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, pc}
80011a8: 0800f044 .word 0x0800f044
80011ac: 0800f058 .word 0x0800f058
80011b0: 20000234 .word 0x20000234
080011b4 <debug>:
extern UART_HandleTypeDef huart1;
extern uint8_t pulsanti;
extern uint16_t stPulsanti;
extern omCiclo_st stCiclo;
void debug(void){
80011b4: b580 push {r7, lr}
80011b6: b09a sub sp, #104 @ 0x68
80011b8: af00 add r7, sp, #0
static uint8_t mempulsanti=0;
static uint16_t memstPulsanti=0;
static omCiclo_st memstCiclo=omchiuso;
char s [100];
if(mempulsanti!=pulsanti){
80011ba: 4b2f ldr r3, [pc, #188] @ (8001278 <debug+0xc4>)
80011bc: 781a ldrb r2, [r3, #0]
80011be: 4b2f ldr r3, [pc, #188] @ (800127c <debug+0xc8>)
80011c0: 781b ldrb r3, [r3, #0]
80011c2: 429a cmp r2, r3
80011c4: d017 beq.n 80011f6 <debug+0x42>
mempulsanti=pulsanti;
80011c6: 4b2d ldr r3, [pc, #180] @ (800127c <debug+0xc8>)
80011c8: 781a ldrb r2, [r3, #0]
80011ca: 4b2b ldr r3, [pc, #172] @ (8001278 <debug+0xc4>)
80011cc: 701a strb r2, [r3, #0]
sprintf(s,"\npulsanti=%X",pulsanti);
80011ce: 4b2b ldr r3, [pc, #172] @ (800127c <debug+0xc8>)
80011d0: 781b ldrb r3, [r3, #0]
80011d2: 461a mov r2, r3
80011d4: 1d3b adds r3, r7, #4
80011d6: 492a ldr r1, [pc, #168] @ (8001280 <debug+0xcc>)
80011d8: 4618 mov r0, r3
80011da: f00d f899 bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80011de: 1d3b adds r3, r7, #4
80011e0: 4618 mov r0, r3
80011e2: f7fe ffb3 bl 800014c <strlen>
80011e6: 4603 mov r3, r0
80011e8: b29a uxth r2, r3
80011ea: 1d39 adds r1, r7, #4
80011ec: f04f 33ff mov.w r3, #4294967295
80011f0: 4824 ldr r0, [pc, #144] @ (8001284 <debug+0xd0>)
80011f2: f008 fa9d bl 8009730 <HAL_UART_Transmit>
}
if(memstPulsanti!=stPulsanti){
80011f6: 4b24 ldr r3, [pc, #144] @ (8001288 <debug+0xd4>)
80011f8: 881a ldrh r2, [r3, #0]
80011fa: 4b24 ldr r3, [pc, #144] @ (800128c <debug+0xd8>)
80011fc: 881b ldrh r3, [r3, #0]
80011fe: 429a cmp r2, r3
8001200: d017 beq.n 8001232 <debug+0x7e>
memstPulsanti=stPulsanti;
8001202: 4b22 ldr r3, [pc, #136] @ (800128c <debug+0xd8>)
8001204: 881a ldrh r2, [r3, #0]
8001206: 4b20 ldr r3, [pc, #128] @ (8001288 <debug+0xd4>)
8001208: 801a strh r2, [r3, #0]
sprintf(s,"\nstpulsanti=%X",stPulsanti);
800120a: 4b20 ldr r3, [pc, #128] @ (800128c <debug+0xd8>)
800120c: 881b ldrh r3, [r3, #0]
800120e: 461a mov r2, r3
8001210: 1d3b adds r3, r7, #4
8001212: 491f ldr r1, [pc, #124] @ (8001290 <debug+0xdc>)
8001214: 4618 mov r0, r3
8001216: f00d f87b bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800121a: 1d3b adds r3, r7, #4
800121c: 4618 mov r0, r3
800121e: f7fe ff95 bl 800014c <strlen>
8001222: 4603 mov r3, r0
8001224: b29a uxth r2, r3
8001226: 1d39 adds r1, r7, #4
8001228: f04f 33ff mov.w r3, #4294967295
800122c: 4815 ldr r0, [pc, #84] @ (8001284 <debug+0xd0>)
800122e: f008 fa7f bl 8009730 <HAL_UART_Transmit>
}
if(memstCiclo!=stCiclo){
8001232: 4b18 ldr r3, [pc, #96] @ (8001294 <debug+0xe0>)
8001234: 781a ldrb r2, [r3, #0]
8001236: 4b18 ldr r3, [pc, #96] @ (8001298 <debug+0xe4>)
8001238: 781b ldrb r3, [r3, #0]
800123a: 429a cmp r2, r3
800123c: d017 beq.n 800126e <debug+0xba>
memstCiclo=stCiclo;
800123e: 4b16 ldr r3, [pc, #88] @ (8001298 <debug+0xe4>)
8001240: 781a ldrb r2, [r3, #0]
8001242: 4b14 ldr r3, [pc, #80] @ (8001294 <debug+0xe0>)
8001244: 701a strb r2, [r3, #0]
sprintf(s,"\nstCiclo=%d",stCiclo);
8001246: 4b14 ldr r3, [pc, #80] @ (8001298 <debug+0xe4>)
8001248: 781b ldrb r3, [r3, #0]
800124a: 461a mov r2, r3
800124c: 1d3b adds r3, r7, #4
800124e: 4913 ldr r1, [pc, #76] @ (800129c <debug+0xe8>)
8001250: 4618 mov r0, r3
8001252: f00d f85d bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001256: 1d3b adds r3, r7, #4
8001258: 4618 mov r0, r3
800125a: f7fe ff77 bl 800014c <strlen>
800125e: 4603 mov r3, r0
8001260: b29a uxth r2, r3
8001262: 1d39 adds r1, r7, #4
8001264: f04f 33ff mov.w r3, #4294967295
8001268: 4806 ldr r0, [pc, #24] @ (8001284 <debug+0xd0>)
800126a: f008 fa61 bl 8009730 <HAL_UART_Transmit>
}
}
800126e: bf00 nop
8001270: 3768 adds r7, #104 @ 0x68
8001272: 46bd mov sp, r7
8001274: bd80 pop {r7, pc}
8001276: bf00 nop
8001278: 2000029c .word 0x2000029c
800127c: 200003f0 .word 0x200003f0
8001280: 0800f05c .word 0x0800f05c
8001284: 200003a8 .word 0x200003a8
8001288: 2000029e .word 0x2000029e
800128c: 20000454 .word 0x20000454
8001290: 0800f06c .word 0x0800f06c
8001294: 200002a0 .word 0x200002a0
8001298: 20000456 .word 0x20000456
800129c: 0800f07c .word 0x0800f07c
080012a0 <EEW_Read>:
{
80012a0: b580 push {r7, lr}
80012a2: b082 sub sp, #8
80012a4: af00 add r7, sp, #0
80012a6: 4603 mov r3, r0
80012a8: 6039 str r1, [r7, #0]
80012aa: 71fb strb r3, [r7, #7]
return EE_ReadVariable(EEW_ADDR(idx), value);
80012ac: 79fb ldrb r3, [r7, #7]
80012ae: b29b uxth r3, r3
80012b0: 3301 adds r3, #1
80012b2: b29b uxth r3, r3
80012b4: 6839 ldr r1, [r7, #0]
80012b6: 4618 mov r0, r3
80012b8: f000 f9ce bl 8001658 <EE_ReadVariable>
80012bc: 4603 mov r3, r0
}
80012be: 4618 mov r0, r3
80012c0: 3708 adds r7, #8
80012c2: 46bd mov sp, r7
80012c4: bd80 pop {r7, pc}
080012c6 <EEW_Write>:
{
80012c6: b580 push {r7, lr}
80012c8: b082 sub sp, #8
80012ca: af00 add r7, sp, #0
80012cc: 4603 mov r3, r0
80012ce: 460a mov r2, r1
80012d0: 71fb strb r3, [r7, #7]
80012d2: 4613 mov r3, r2
80012d4: 80bb strh r3, [r7, #4]
return EE_WriteVariable(EEW_ADDR(idx), value);
80012d6: 79fb ldrb r3, [r7, #7]
80012d8: b29b uxth r3, r3
80012da: 3301 adds r3, #1
80012dc: b29b uxth r3, r3
80012de: 88ba ldrh r2, [r7, #4]
80012e0: 4611 mov r1, r2
80012e2: 4618 mov r0, r3
80012e4: f000 f9d4 bl 8001690 <EE_WriteVariable>
80012e8: 4603 mov r3, r0
}
80012ea: 4618 mov r0, r3
80012ec: 3708 adds r7, #8
80012ee: 46bd mov sp, r7
80012f0: bd80 pop {r7, pc}
080012f2 <EE_GetPageStatus>:
/* ========================================================================= */
/* --- Internal helpers ---------------------------------------------------- */
static uint16_t EE_GetPageStatus(uint32_t pageBase)
{
80012f2: b480 push {r7}
80012f4: b083 sub sp, #12
80012f6: af00 add r7, sp, #0
80012f8: 6078 str r0, [r7, #4]
return *(__IO uint16_t *)pageBase;
80012fa: 687b ldr r3, [r7, #4]
80012fc: 881b ldrh r3, [r3, #0]
80012fe: b29b uxth r3, r3
}
8001300: 4618 mov r0, r3
8001302: 370c adds r7, #12
8001304: 46bd mov sp, r7
8001306: bc80 pop {r7}
8001308: 4770 bx lr
0800130a <EE_FlashProgramHalfWord>:
static HAL_StatusTypeDef EE_FlashProgramHalfWord(uint32_t Address, uint16_t Data)
{
800130a: b5b0 push {r4, r5, r7, lr}
800130c: b084 sub sp, #16
800130e: af00 add r7, sp, #0
8001310: 6078 str r0, [r7, #4]
8001312: 460b mov r3, r1
8001314: 807b strh r3, [r7, #2]
HAL_StatusTypeDef status;
HAL_FLASH_Unlock();
8001316: f004 fde1 bl 8005edc <HAL_FLASH_Unlock>
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_HALFWORD, Address, Data);
800131a: 887b ldrh r3, [r7, #2]
800131c: 2200 movs r2, #0
800131e: 461c mov r4, r3
8001320: 4615 mov r5, r2
8001322: 4622 mov r2, r4
8001324: 462b mov r3, r5
8001326: 6879 ldr r1, [r7, #4]
8001328: 2001 movs r0, #1
800132a: f004 fd67 bl 8005dfc <HAL_FLASH_Program>
800132e: 4603 mov r3, r0
8001330: 73fb strb r3, [r7, #15]
HAL_FLASH_Lock();
8001332: f004 fdf9 bl 8005f28 <HAL_FLASH_Lock>
return status;
8001336: 7bfb ldrb r3, [r7, #15]
}
8001338: 4618 mov r0, r3
800133a: 3710 adds r7, #16
800133c: 46bd mov sp, r7
800133e: bdb0 pop {r4, r5, r7, pc}
08001340 <EE_FlashErasePage>:
static HAL_StatusTypeDef EE_FlashErasePage(uint32_t PageAddress)
{
8001340: b580 push {r7, lr}
8001342: b088 sub sp, #32
8001344: af00 add r7, sp, #0
8001346: 6078 str r0, [r7, #4]
HAL_StatusTypeDef status;
FLASH_EraseInitTypeDef EraseInit;
uint32_t PageError = 0;
8001348: 2300 movs r3, #0
800134a: 60bb str r3, [r7, #8]
HAL_FLASH_Unlock();
800134c: f004 fdc6 bl 8005edc <HAL_FLASH_Unlock>
EraseInit.TypeErase = FLASH_TYPEERASE_PAGES;
8001350: 2300 movs r3, #0
8001352: 60fb str r3, [r7, #12]
EraseInit.PageAddress = PageAddress;
8001354: 687b ldr r3, [r7, #4]
8001356: 617b str r3, [r7, #20]
EraseInit.NbPages = 1;
8001358: 2301 movs r3, #1
800135a: 61bb str r3, [r7, #24]
status = HAL_FLASHEx_Erase(&EraseInit, &PageError);
800135c: f107 0208 add.w r2, r7, #8
8001360: f107 030c add.w r3, r7, #12
8001364: 4611 mov r1, r2
8001366: 4618 mov r0, r3
8001368: f004 fea0 bl 80060ac <HAL_FLASHEx_Erase>
800136c: 4603 mov r3, r0
800136e: 77fb strb r3, [r7, #31]
HAL_FLASH_Lock();
8001370: f004 fdda bl 8005f28 <HAL_FLASH_Lock>
return status;
8001374: 7ffb ldrb r3, [r7, #31]
}
8001376: 4618 mov r0, r3
8001378: 3720 adds r7, #32
800137a: 46bd mov sp, r7
800137c: bd80 pop {r7, pc}
0800137e <EE_FindFreeAddress>:
/* Find first free record address in given page (returns 0 if full) */
static uint32_t EE_FindFreeAddress(uint32_t pageBase)
{
800137e: b480 push {r7}
8001380: b087 sub sp, #28
8001382: af00 add r7, sp, #0
8001384: 6078 str r0, [r7, #4]
uint32_t addr = pageBase + 2U; /* Skip status word */
8001386: 687b ldr r3, [r7, #4]
8001388: 3302 adds r3, #2
800138a: 617b str r3, [r7, #20]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
800138c: 687b ldr r3, [r7, #4]
800138e: f503 6380 add.w r3, r3, #1024 @ 0x400
8001392: 613b str r3, [r7, #16]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
8001394: e00c b.n 80013b0 <EE_FindFreeAddress+0x32>
{
uint16_t vaddr = *(__IO uint16_t *)addr;
8001396: 697b ldr r3, [r7, #20]
8001398: 881b ldrh r3, [r3, #0]
800139a: 81fb strh r3, [r7, #14]
if (vaddr == 0xFFFFU)
800139c: 89fb ldrh r3, [r7, #14]
800139e: f64f 72ff movw r2, #65535 @ 0xffff
80013a2: 4293 cmp r3, r2
80013a4: d101 bne.n 80013aa <EE_FindFreeAddress+0x2c>
{
/* Empty slot */
return addr;
80013a6: 697b ldr r3, [r7, #20]
80013a8: e008 b.n 80013bc <EE_FindFreeAddress+0x3e>
}
addr += sizeof(EE_Record_t);
80013aa: 697b ldr r3, [r7, #20]
80013ac: 3304 adds r3, #4
80013ae: 617b str r3, [r7, #20]
while (addr < (pageEnd - sizeof(EE_Record_t) + 1U))
80013b0: 693b ldr r3, [r7, #16]
80013b2: 3b03 subs r3, #3
80013b4: 697a ldr r2, [r7, #20]
80013b6: 429a cmp r2, r3
80013b8: d3ed bcc.n 8001396 <EE_FindFreeAddress+0x18>
}
return 0U; /* No space */
80013ba: 2300 movs r3, #0
}
80013bc: 4618 mov r0, r3
80013be: 371c adds r7, #28
80013c0: 46bd mov sp, r7
80013c2: bc80 pop {r7}
80013c4: 4770 bx lr
080013c6 <EE_FindInPage>:
/* Find latest value of VirtAddress in a specific page (internal, uses EE_Status) */
/* Find latest value of VirtAddress in a specific page (scan forward) */
static EE_Status EE_FindInPage(uint32_t pageBase, uint16_t VirtAddress, uint16_t *Data)
{
80013c6: b480 push {r7}
80013c8: b089 sub sp, #36 @ 0x24
80013ca: af00 add r7, sp, #0
80013cc: 60f8 str r0, [r7, #12]
80013ce: 460b mov r3, r1
80013d0: 607a str r2, [r7, #4]
80013d2: 817b strh r3, [r7, #10]
uint32_t addr = pageBase + 2U; // skip status halfword
80013d4: 68fb ldr r3, [r7, #12]
80013d6: 3302 adds r3, #2
80013d8: 61fb str r3, [r7, #28]
uint32_t pageEnd = pageBase + EE_PAGE_SIZE;
80013da: 68fb ldr r3, [r7, #12]
80013dc: f503 6380 add.w r3, r3, #1024 @ 0x400
80013e0: 617b str r3, [r7, #20]
EE_Status result = EE_NOT_FOUND;
80013e2: 2302 movs r3, #2
80013e4: 76fb strb r3, [r7, #27]
uint16_t lastVal = 0;
80013e6: 2300 movs r3, #0
80013e8: 833b strh r3, [r7, #24]
if (Data == NULL)
80013ea: 687b ldr r3, [r7, #4]
80013ec: 2b00 cmp r3, #0
80013ee: d118 bne.n 8001422 <EE_FindInPage+0x5c>
return EE_ERROR;
80013f0: 2301 movs r3, #1
80013f2: e024 b.n 800143e <EE_FindInPage+0x78>
while (addr <= (pageEnd - sizeof(EE_Record_t)))
{
uint16_t vaddr = *(__IO uint16_t *)addr;
80013f4: 69fb ldr r3, [r7, #28]
80013f6: 881b ldrh r3, [r3, #0]
80013f8: 827b strh r3, [r7, #18]
if (vaddr == 0xFFFFU)
80013fa: 8a7b ldrh r3, [r7, #18]
80013fc: f64f 72ff movw r2, #65535 @ 0xffff
8001400: 4293 cmp r3, r2
8001402: d014 beq.n 800142e <EE_FindInPage+0x68>
{
// First empty slot => no more records in this page
break;
}
uint16_t value = *(__IO uint16_t *)(addr + 2U);
8001404: 69fb ldr r3, [r7, #28]
8001406: 3302 adds r3, #2
8001408: 881b ldrh r3, [r3, #0]
800140a: 823b strh r3, [r7, #16]
if (vaddr == VirtAddress)
800140c: 8a7a ldrh r2, [r7, #18]
800140e: 897b ldrh r3, [r7, #10]
8001410: 429a cmp r2, r3
8001412: d103 bne.n 800141c <EE_FindInPage+0x56>
{
lastVal = value; // keep most recent
8001414: 8a3b ldrh r3, [r7, #16]
8001416: 833b strh r3, [r7, #24]
result = EE_OK;
8001418: 2300 movs r3, #0
800141a: 76fb strb r3, [r7, #27]
}
addr += sizeof(EE_Record_t); // move 4 bytes forward
800141c: 69fb ldr r3, [r7, #28]
800141e: 3304 adds r3, #4
8001420: 61fb str r3, [r7, #28]
while (addr <= (pageEnd - sizeof(EE_Record_t)))
8001422: 697b ldr r3, [r7, #20]
8001424: 3b04 subs r3, #4
8001426: 69fa ldr r2, [r7, #28]
8001428: 429a cmp r2, r3
800142a: d9e3 bls.n 80013f4 <EE_FindInPage+0x2e>
800142c: e000 b.n 8001430 <EE_FindInPage+0x6a>
break;
800142e: bf00 nop
}
if (result == EE_OK)
8001430: 7efb ldrb r3, [r7, #27]
8001432: 2b00 cmp r3, #0
8001434: d102 bne.n 800143c <EE_FindInPage+0x76>
*Data = lastVal;
8001436: 687b ldr r3, [r7, #4]
8001438: 8b3a ldrh r2, [r7, #24]
800143a: 801a strh r2, [r3, #0]
return result;
800143c: 7efb ldrb r3, [r7, #27]
}
800143e: 4618 mov r0, r3
8001440: 3724 adds r7, #36 @ 0x24
8001442: 46bd mov sp, r7
8001444: bc80 pop {r7}
8001446: 4770 bx lr
08001448 <EE_Format>:
/* Format both pages: erase and set PAGE0 as VALID */
static EE_Status EE_Format(void)
{
8001448: b580 push {r7, lr}
800144a: af00 add r7, sp, #0
if (EE_FlashErasePage(EE_PAGE0_BASE) != HAL_OK)
800144c: 480f ldr r0, [pc, #60] @ (800148c <EE_Format+0x44>)
800144e: f7ff ff77 bl 8001340 <EE_FlashErasePage>
8001452: 4603 mov r3, r0
8001454: 2b00 cmp r3, #0
8001456: d001 beq.n 800145c <EE_Format+0x14>
return EE_STATUS_ERROR;
8001458: 2301 movs r3, #1
800145a: e015 b.n 8001488 <EE_Format+0x40>
if (EE_FlashErasePage(EE_PAGE1_BASE) != HAL_OK)
800145c: 480c ldr r0, [pc, #48] @ (8001490 <EE_Format+0x48>)
800145e: f7ff ff6f bl 8001340 <EE_FlashErasePage>
8001462: 4603 mov r3, r0
8001464: 2b00 cmp r3, #0
8001466: d001 beq.n 800146c <EE_Format+0x24>
return EE_STATUS_ERROR;
8001468: 2301 movs r3, #1
800146a: e00d b.n 8001488 <EE_Format+0x40>
if (EE_FlashProgramHalfWord(EE_PAGE0_BASE, EE_PAGE_STATUS_VALID) != HAL_OK)
800146c: f64a 21aa movw r1, #43690 @ 0xaaaa
8001470: 4806 ldr r0, [pc, #24] @ (800148c <EE_Format+0x44>)
8001472: f7ff ff4a bl 800130a <EE_FlashProgramHalfWord>
8001476: 4603 mov r3, r0
8001478: 2b00 cmp r3, #0
800147a: d001 beq.n 8001480 <EE_Format+0x38>
return EE_STATUS_ERROR;
800147c: 2301 movs r3, #1
800147e: e003 b.n 8001488 <EE_Format+0x40>
/* PAGE1 will remain erased (status = 0xFFFF) */
EE_ActivePageBase = EE_PAGE0_BASE;
8001480: 4b04 ldr r3, [pc, #16] @ (8001494 <EE_Format+0x4c>)
8001482: 4a02 ldr r2, [pc, #8] @ (800148c <EE_Format+0x44>)
8001484: 601a str r2, [r3, #0]
return EE_STATUS_OK;
8001486: 2300 movs r3, #0
}
8001488: 4618 mov r0, r3
800148a: bd80 pop {r7, pc}
800148c: 0800f800 .word 0x0800f800
8001490: 0800fc00 .word 0x0800fc00
8001494: 20000000 .word 0x20000000
08001498 <EE_GetOtherPageBase>:
/* Get the base of the other page */
static uint32_t EE_GetOtherPageBase(uint32_t pageBase)
{
8001498: b480 push {r7}
800149a: b083 sub sp, #12
800149c: af00 add r7, sp, #0
800149e: 6078 str r0, [r7, #4]
return (pageBase == EE_PAGE0_BASE) ? EE_PAGE1_BASE : EE_PAGE0_BASE;
80014a0: 687b ldr r3, [r7, #4]
80014a2: 4a05 ldr r2, [pc, #20] @ (80014b8 <EE_GetOtherPageBase+0x20>)
80014a4: 4293 cmp r3, r2
80014a6: d101 bne.n 80014ac <EE_GetOtherPageBase+0x14>
80014a8: 4b04 ldr r3, [pc, #16] @ (80014bc <EE_GetOtherPageBase+0x24>)
80014aa: e000 b.n 80014ae <EE_GetOtherPageBase+0x16>
80014ac: 4b02 ldr r3, [pc, #8] @ (80014b8 <EE_GetOtherPageBase+0x20>)
}
80014ae: 4618 mov r0, r3
80014b0: 370c adds r7, #12
80014b2: 46bd mov sp, r7
80014b4: bc80 pop {r7}
80014b6: 4770 bx lr
80014b8: 0800f800 .word 0x0800f800
80014bc: 0800fc00 .word 0x0800fc00
080014c0 <EE_PageTransfer>:
/* Page transfer (garbage collection + new write) */
static EE_Status EE_PageTransfer(uint16_t VirtAddress, uint16_t Data)
{
80014c0: b580 push {r7, lr}
80014c2: b088 sub sp, #32
80014c4: af00 add r7, sp, #0
80014c6: 4603 mov r3, r0
80014c8: 460a mov r2, r1
80014ca: 80fb strh r3, [r7, #6]
80014cc: 4613 mov r3, r2
80014ce: 80bb strh r3, [r7, #4]
uint32_t oldBase = EE_ActivePageBase;
80014d0: 4b3c ldr r3, [pc, #240] @ (80015c4 <EE_PageTransfer+0x104>)
80014d2: 681b ldr r3, [r3, #0]
80014d4: 617b str r3, [r7, #20]
uint32_t newBase = EE_GetOtherPageBase(oldBase);
80014d6: 6978 ldr r0, [r7, #20]
80014d8: f7ff ffde bl 8001498 <EE_GetOtherPageBase>
80014dc: 6138 str r0, [r7, #16]
uint32_t addr;
uint16_t value;
EE_Status st;
/* Erase new page */
if (EE_FlashErasePage(newBase) != HAL_OK)
80014de: 6938 ldr r0, [r7, #16]
80014e0: f7ff ff2e bl 8001340 <EE_FlashErasePage>
80014e4: 4603 mov r3, r0
80014e6: 2b00 cmp r3, #0
80014e8: d001 beq.n 80014ee <EE_PageTransfer+0x2e>
return EE_STATUS_ERROR;
80014ea: 2301 movs r3, #1
80014ec: e065 b.n 80015ba <EE_PageTransfer+0xfa>
/* Mark new page as RECEIVE */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_RECEIVE) != HAL_OK)
80014ee: f245 5155 movw r1, #21845 @ 0x5555
80014f2: 6938 ldr r0, [r7, #16]
80014f4: f7ff ff09 bl 800130a <EE_FlashProgramHalfWord>
80014f8: 4603 mov r3, r0
80014fa: 2b00 cmp r3, #0
80014fc: d001 beq.n 8001502 <EE_PageTransfer+0x42>
return EE_STATUS_ERROR;
80014fe: 2301 movs r3, #1
8001500: e05b b.n 80015ba <EE_PageTransfer+0xfa>
/* Start writing records just after status */
addr = newBase + 2U;
8001502: 693b ldr r3, [r7, #16]
8001504: 3302 adds r3, #2
8001506: 61fb str r3, [r7, #28]
/* For each known virtual variable */
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8001508: 2300 movs r3, #0
800150a: 837b strh r3, [r7, #26]
800150c: e03c b.n 8001588 <EE_PageTransfer+0xc8>
{
uint16_t vaddr = EE_VirtAddrs[i];
800150e: 8b7b ldrh r3, [r7, #26]
8001510: 4a2d ldr r2, [pc, #180] @ (80015c8 <EE_PageTransfer+0x108>)
8001512: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001516: 81fb strh r3, [r7, #14]
if (vaddr == VirtAddress)
8001518: 89fa ldrh r2, [r7, #14]
800151a: 88fb ldrh r3, [r7, #6]
800151c: 429a cmp r2, r3
800151e: d102 bne.n 8001526 <EE_PageTransfer+0x66>
{
/* Use the new data passed into PageTransfer */
value = Data;
8001520: 88bb ldrh r3, [r7, #4]
8001522: 817b strh r3, [r7, #10]
8001524: e00b b.n 800153e <EE_PageTransfer+0x7e>
}
else
{
/* Read latest value from old active page */
st = EE_FindInPage(oldBase, vaddr, &value);
8001526: f107 020a add.w r2, r7, #10
800152a: 89fb ldrh r3, [r7, #14]
800152c: 4619 mov r1, r3
800152e: 6978 ldr r0, [r7, #20]
8001530: f7ff ff49 bl 80013c6 <EE_FindInPage>
8001534: 4603 mov r3, r0
8001536: 737b strb r3, [r7, #13]
if (st != EE_STATUS_OK)
8001538: 7b7b ldrb r3, [r7, #13]
800153a: 2b00 cmp r3, #0
800153c: d120 bne.n 8001580 <EE_PageTransfer+0xc0>
continue;
}
}
/* Write record to new page */
if (EE_FlashProgramHalfWord(addr, vaddr) != HAL_OK)
800153e: 89fb ldrh r3, [r7, #14]
8001540: 4619 mov r1, r3
8001542: 69f8 ldr r0, [r7, #28]
8001544: f7ff fee1 bl 800130a <EE_FlashProgramHalfWord>
8001548: 4603 mov r3, r0
800154a: 2b00 cmp r3, #0
800154c: d001 beq.n 8001552 <EE_PageTransfer+0x92>
return EE_STATUS_ERROR;
800154e: 2301 movs r3, #1
8001550: e033 b.n 80015ba <EE_PageTransfer+0xfa>
if (EE_FlashProgramHalfWord(addr + 2U, value) != HAL_OK)
8001552: 69fb ldr r3, [r7, #28]
8001554: 3302 adds r3, #2
8001556: 897a ldrh r2, [r7, #10]
8001558: 4611 mov r1, r2
800155a: 4618 mov r0, r3
800155c: f7ff fed5 bl 800130a <EE_FlashProgramHalfWord>
8001560: 4603 mov r3, r0
8001562: 2b00 cmp r3, #0
8001564: d001 beq.n 800156a <EE_PageTransfer+0xaa>
return EE_STATUS_ERROR;
8001566: 2301 movs r3, #1
8001568: e027 b.n 80015ba <EE_PageTransfer+0xfa>
addr += sizeof(EE_Record_t);
800156a: 69fb ldr r3, [r7, #28]
800156c: 3304 adds r3, #4
800156e: 61fb str r3, [r7, #28]
if (addr >= (newBase + EE_PAGE_SIZE))
8001570: 693b ldr r3, [r7, #16]
8001572: f503 6380 add.w r3, r3, #1024 @ 0x400
8001576: 69fa ldr r2, [r7, #28]
8001578: 429a cmp r2, r3
800157a: d302 bcc.n 8001582 <EE_PageTransfer+0xc2>
return EE_STATUS_NO_SPACE;
800157c: 2303 movs r3, #3
800157e: e01c b.n 80015ba <EE_PageTransfer+0xfa>
continue;
8001580: bf00 nop
for (uint16_t i = 0; i < EE_NUM_VIRTUAL_ADDR; i++)
8001582: 8b7b ldrh r3, [r7, #26]
8001584: 3301 adds r3, #1
8001586: 837b strh r3, [r7, #26]
8001588: 8b7b ldrh r3, [r7, #26]
800158a: 2b3f cmp r3, #63 @ 0x3f
800158c: d9bf bls.n 800150e <EE_PageTransfer+0x4e>
}
/* Erase old page */
if (EE_FlashErasePage(oldBase) != HAL_OK)
800158e: 6978 ldr r0, [r7, #20]
8001590: f7ff fed6 bl 8001340 <EE_FlashErasePage>
8001594: 4603 mov r3, r0
8001596: 2b00 cmp r3, #0
8001598: d001 beq.n 800159e <EE_PageTransfer+0xde>
return EE_STATUS_ERROR;
800159a: 2301 movs r3, #1
800159c: e00d b.n 80015ba <EE_PageTransfer+0xfa>
/* Mark new page as VALID */
if (EE_FlashProgramHalfWord(newBase, EE_PAGE_STATUS_VALID) != HAL_OK)
800159e: f64a 21aa movw r1, #43690 @ 0xaaaa
80015a2: 6938 ldr r0, [r7, #16]
80015a4: f7ff feb1 bl 800130a <EE_FlashProgramHalfWord>
80015a8: 4603 mov r3, r0
80015aa: 2b00 cmp r3, #0
80015ac: d001 beq.n 80015b2 <EE_PageTransfer+0xf2>
return EE_STATUS_ERROR;
80015ae: 2301 movs r3, #1
80015b0: e003 b.n 80015ba <EE_PageTransfer+0xfa>
/* Update active page */
EE_ActivePageBase = newBase;
80015b2: 4a04 ldr r2, [pc, #16] @ (80015c4 <EE_PageTransfer+0x104>)
80015b4: 693b ldr r3, [r7, #16]
80015b6: 6013 str r3, [r2, #0]
return EE_STATUS_OK;
80015b8: 2300 movs r3, #0
}
80015ba: 4618 mov r0, r3
80015bc: 3720 adds r7, #32
80015be: 46bd mov sp, r7
80015c0: bd80 pop {r7, pc}
80015c2: bf00 nop
80015c4: 20000000 .word 0x20000000
80015c8: 0800f394 .word 0x0800f394
080015cc <EE_Init>:
* - Checks page statuses and chooses the active page.
* - If inconsistent or blank, formats pages.
* PUBLIC RETURN TYPE: uint16_t (EE_OK / EE_ERROR / ...)
*/
uint16_t EE_Init(void)
{
80015cc: b580 push {r7, lr}
80015ce: b082 sub sp, #8
80015d0: af00 add r7, sp, #0
uint16_t status0 = EE_GetPageStatus(EE_PAGE0_BASE);
80015d2: 481e ldr r0, [pc, #120] @ (800164c <EE_Init+0x80>)
80015d4: f7ff fe8d bl 80012f2 <EE_GetPageStatus>
80015d8: 4603 mov r3, r0
80015da: 80fb strh r3, [r7, #6]
uint16_t status1 = EE_GetPageStatus(EE_PAGE1_BASE);
80015dc: 481c ldr r0, [pc, #112] @ (8001650 <EE_Init+0x84>)
80015de: f7ff fe88 bl 80012f2 <EE_GetPageStatus>
80015e2: 4603 mov r3, r0
80015e4: 80bb strh r3, [r7, #4]
if ((status0 == EE_PAGE_STATUS_ERASED) && (status1 == EE_PAGE_STATUS_ERASED))
80015e6: 88fb ldrh r3, [r7, #6]
80015e8: f64f 72ff movw r2, #65535 @ 0xffff
80015ec: 4293 cmp r3, r2
80015ee: d108 bne.n 8001602 <EE_Init+0x36>
80015f0: 88bb ldrh r3, [r7, #4]
80015f2: f64f 72ff movw r2, #65535 @ 0xffff
80015f6: 4293 cmp r3, r2
80015f8: d103 bne.n 8001602 <EE_Init+0x36>
{
/* Fresh device -> format */
return (uint16_t)EE_Format();
80015fa: f7ff ff25 bl 8001448 <EE_Format>
80015fe: 4603 mov r3, r0
8001600: e020 b.n 8001644 <EE_Init+0x78>
}
else if ((status0 == EE_PAGE_STATUS_VALID) && (status1 == EE_PAGE_STATUS_ERASED))
8001602: 88fb ldrh r3, [r7, #6]
8001604: f64a 22aa movw r2, #43690 @ 0xaaaa
8001608: 4293 cmp r3, r2
800160a: d109 bne.n 8001620 <EE_Init+0x54>
800160c: 88bb ldrh r3, [r7, #4]
800160e: f64f 72ff movw r2, #65535 @ 0xffff
8001612: 4293 cmp r3, r2
8001614: d104 bne.n 8001620 <EE_Init+0x54>
{
EE_ActivePageBase = EE_PAGE0_BASE;
8001616: 4b0f ldr r3, [pc, #60] @ (8001654 <EE_Init+0x88>)
8001618: 4a0c ldr r2, [pc, #48] @ (800164c <EE_Init+0x80>)
800161a: 601a str r2, [r3, #0]
return EE_OK;
800161c: 2300 movs r3, #0
800161e: e011 b.n 8001644 <EE_Init+0x78>
}
else if ((status1 == EE_PAGE_STATUS_VALID) && (status0 == EE_PAGE_STATUS_ERASED))
8001620: 88bb ldrh r3, [r7, #4]
8001622: f64a 22aa movw r2, #43690 @ 0xaaaa
8001626: 4293 cmp r3, r2
8001628: d109 bne.n 800163e <EE_Init+0x72>
800162a: 88fb ldrh r3, [r7, #6]
800162c: f64f 72ff movw r2, #65535 @ 0xffff
8001630: 4293 cmp r3, r2
8001632: d104 bne.n 800163e <EE_Init+0x72>
{
EE_ActivePageBase = EE_PAGE1_BASE;
8001634: 4b07 ldr r3, [pc, #28] @ (8001654 <EE_Init+0x88>)
8001636: 4a06 ldr r2, [pc, #24] @ (8001650 <EE_Init+0x84>)
8001638: 601a str r2, [r3, #0]
return EE_OK;
800163a: 2300 movs r3, #0
800163c: e002 b.n 8001644 <EE_Init+0x78>
}
else
{
/* Any weird or inconsistent state -> reformat */
return (uint16_t)EE_Format();
800163e: f7ff ff03 bl 8001448 <EE_Format>
8001642: 4603 mov r3, r0
}
}
8001644: 4618 mov r0, r3
8001646: 3708 adds r7, #8
8001648: 46bd mov sp, r7
800164a: bd80 pop {r7, pc}
800164c: 0800f800 .word 0x0800f800
8001650: 0800fc00 .word 0x0800fc00
8001654: 20000000 .word 0x20000000
08001658 <EE_ReadVariable>:
/*
* Read a 16-bit variable by its virtual address.
* PUBLIC RETURN: EE_OK / EE_NOT_FOUND / EE_ERROR (as uint16_t)
*/
uint16_t EE_ReadVariable(uint16_t VirtAddress, uint16_t *Data)
{
8001658: b580 push {r7, lr}
800165a: b084 sub sp, #16
800165c: af00 add r7, sp, #0
800165e: 4603 mov r3, r0
8001660: 6039 str r1, [r7, #0]
8001662: 80fb strh r3, [r7, #6]
EE_Status st;
if (Data == NULL)
8001664: 683b ldr r3, [r7, #0]
8001666: 2b00 cmp r3, #0
8001668: d101 bne.n 800166e <EE_ReadVariable+0x16>
return EE_ERROR;
800166a: 2301 movs r3, #1
800166c: e00a b.n 8001684 <EE_ReadVariable+0x2c>
st = EE_FindInPage(EE_ActivePageBase, VirtAddress, Data);
800166e: 4b07 ldr r3, [pc, #28] @ (800168c <EE_ReadVariable+0x34>)
8001670: 681b ldr r3, [r3, #0]
8001672: 88f9 ldrh r1, [r7, #6]
8001674: 683a ldr r2, [r7, #0]
8001676: 4618 mov r0, r3
8001678: f7ff fea5 bl 80013c6 <EE_FindInPage>
800167c: 4603 mov r3, r0
800167e: 73fb strb r3, [r7, #15]
return (uint16_t)st;
8001680: 7bfb ldrb r3, [r7, #15]
8001682: b29b uxth r3, r3
}
8001684: 4618 mov r0, r3
8001686: 3710 adds r7, #16
8001688: 46bd mov sp, r7
800168a: bd80 pop {r7, pc}
800168c: 20000000 .word 0x20000000
08001690 <EE_WriteVariable>:
* - Writes a new record in the active page.
* - If the page is full, triggers a page transfer (GC).
* PUBLIC RETURN: EE_OK / EE_ERROR / EE_NO_SPACE (as uint16_t)
*/
uint16_t EE_WriteVariable(uint16_t VirtAddress, uint16_t Data)
{
8001690: b580 push {r7, lr}
8001692: b084 sub sp, #16
8001694: af00 add r7, sp, #0
8001696: 4603 mov r3, r0
8001698: 460a mov r2, r1
800169a: 80fb strh r3, [r7, #6]
800169c: 4613 mov r3, r2
800169e: 80bb strh r3, [r7, #4]
uint32_t freeAddr;
EE_Status st;
/* Find free space in active page */
freeAddr = EE_FindFreeAddress(EE_ActivePageBase);
80016a0: 4b17 ldr r3, [pc, #92] @ (8001700 <EE_WriteVariable+0x70>)
80016a2: 681b ldr r3, [r3, #0]
80016a4: 4618 mov r0, r3
80016a6: f7ff fe6a bl 800137e <EE_FindFreeAddress>
80016aa: 60f8 str r0, [r7, #12]
if (freeAddr != 0U)
80016ac: 68fb ldr r3, [r7, #12]
80016ae: 2b00 cmp r3, #0
80016b0: d017 beq.n 80016e2 <EE_WriteVariable+0x52>
{
/* Write new record */
if (EE_FlashProgramHalfWord(freeAddr, VirtAddress) != HAL_OK)
80016b2: 88fb ldrh r3, [r7, #6]
80016b4: 4619 mov r1, r3
80016b6: 68f8 ldr r0, [r7, #12]
80016b8: f7ff fe27 bl 800130a <EE_FlashProgramHalfWord>
80016bc: 4603 mov r3, r0
80016be: 2b00 cmp r3, #0
80016c0: d001 beq.n 80016c6 <EE_WriteVariable+0x36>
return EE_ERROR;
80016c2: 2301 movs r3, #1
80016c4: e017 b.n 80016f6 <EE_WriteVariable+0x66>
if (EE_FlashProgramHalfWord(freeAddr + 2U, Data) != HAL_OK)
80016c6: 68fb ldr r3, [r7, #12]
80016c8: 3302 adds r3, #2
80016ca: 88ba ldrh r2, [r7, #4]
80016cc: 4611 mov r1, r2
80016ce: 4618 mov r0, r3
80016d0: f7ff fe1b bl 800130a <EE_FlashProgramHalfWord>
80016d4: 4603 mov r3, r0
80016d6: 2b00 cmp r3, #0
80016d8: d001 beq.n 80016de <EE_WriteVariable+0x4e>
return EE_ERROR;
80016da: 2301 movs r3, #1
80016dc: e00b b.n 80016f6 <EE_WriteVariable+0x66>
return EE_OK;
80016de: 2300 movs r3, #0
80016e0: e009 b.n 80016f6 <EE_WriteVariable+0x66>
}
/* No space -> page transfer */
st = EE_PageTransfer(VirtAddress, Data);
80016e2: 88ba ldrh r2, [r7, #4]
80016e4: 88fb ldrh r3, [r7, #6]
80016e6: 4611 mov r1, r2
80016e8: 4618 mov r0, r3
80016ea: f7ff fee9 bl 80014c0 <EE_PageTransfer>
80016ee: 4603 mov r3, r0
80016f0: 72fb strb r3, [r7, #11]
return (uint16_t)st;
80016f2: 7afb ldrb r3, [r7, #11]
80016f4: b29b uxth r3, r3
}
80016f6: 4618 mov r0, r3
80016f8: 3710 adds r7, #16
80016fa: 46bd mov sp, r7
80016fc: bd80 pop {r7, pc}
80016fe: bf00 nop
8001700: 20000000 .word 0x20000000
08001704 <loadDefault>:
void loadDefault(void){
8001704: b580 push {r7, lr}
8001706: b09a sub sp, #104 @ 0x68
8001708: af00 add r7, sp, #0
uint8_t i;
char s[100];
uint16_t st;
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
800170a: 2300 movs r3, #0
800170c: f887 3067 strb.w r3, [r7, #103] @ 0x67
8001710: e035 b.n 800177e <loadDefault+0x7a>
st=EEW_Write(i,deftab[i]);
8001712: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001716: 4a1e ldr r2, [pc, #120] @ (8001790 <loadDefault+0x8c>)
8001718: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
800171c: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001720: 4611 mov r1, r2
8001722: 4618 mov r0, r3
8001724: f7ff fdcf bl 80012c6 <EEW_Write>
8001728: 4603 mov r3, r0
800172a: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
if (st == EE_OK)sprintf((char*)s,"\ndone %d=%d",i,deftab[i]);
800172e: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
8001732: 2b00 cmp r3, #0
8001734: d10b bne.n 800174e <loadDefault+0x4a>
8001736: f897 2067 ldrb.w r2, [r7, #103] @ 0x67
800173a: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
800173e: 4914 ldr r1, [pc, #80] @ (8001790 <loadDefault+0x8c>)
8001740: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8001744: 4638 mov r0, r7
8001746: 4913 ldr r1, [pc, #76] @ (8001794 <loadDefault+0x90>)
8001748: f00c fde2 bl 800e310 <siprintf>
800174c: e006 b.n 800175c <loadDefault+0x58>
else sprintf((char*)s,"\nee write error %d", st);
800174e: f8b7 2064 ldrh.w r2, [r7, #100] @ 0x64
8001752: 463b mov r3, r7
8001754: 4910 ldr r1, [pc, #64] @ (8001798 <loadDefault+0x94>)
8001756: 4618 mov r0, r3
8001758: f00c fdda bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800175c: 463b mov r3, r7
800175e: 4618 mov r0, r3
8001760: f7fe fcf4 bl 800014c <strlen>
8001764: 4603 mov r3, r0
8001766: b29a uxth r2, r3
8001768: 4639 mov r1, r7
800176a: f04f 33ff mov.w r3, #4294967295
800176e: 480b ldr r0, [pc, #44] @ (800179c <loadDefault+0x98>)
8001770: f007 ffde bl 8009730 <HAL_UART_Transmit>
for(i=0;i<EE_NUM_VIRTUAL_ADDR;i++){
8001774: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001778: 3301 adds r3, #1
800177a: f887 3067 strb.w r3, [r7, #103] @ 0x67
800177e: f897 3067 ldrb.w r3, [r7, #103] @ 0x67
8001782: 2b3f cmp r3, #63 @ 0x3f
8001784: d9c5 bls.n 8001712 <loadDefault+0xe>
}
}
8001786: bf00 nop
8001788: bf00 nop
800178a: 3768 adds r7, #104 @ 0x68
800178c: 46bd mov sp, r7
800178e: bd80 pop {r7, pc}
8001790: 0800f314 .word 0x0800f314
8001794: 0800f088 .word 0x0800f088
8001798: 0800f094 .word 0x0800f094
800179c: 200003a8 .word 0x200003a8
080017a0 <loadEE>:
void loadEE(void){
80017a0: b5f0 push {r4, r5, r6, r7, lr}
80017a2: b0b9 sub sp, #228 @ 0xe4
80017a4: af06 add r7, sp, #24
char s [200];
EEW_Read(M1PWMAP, &m1pwmap);
80017a6: 49bc ldr r1, [pc, #752] @ (8001a98 <loadEE+0x2f8>)
80017a8: 2000 movs r0, #0
80017aa: f7ff fd79 bl 80012a0 <EEW_Read>
EEW_Read(M1PWMCH, &m1pwmch);
80017ae: 49bb ldr r1, [pc, #748] @ (8001a9c <loadEE+0x2fc>)
80017b0: 2001 movs r0, #1
80017b2: f7ff fd75 bl 80012a0 <EEW_Read>
EEW_Read(M2PWMAP, &m2pwmap);
80017b6: 49ba ldr r1, [pc, #744] @ (8001aa0 <loadEE+0x300>)
80017b8: 2002 movs r0, #2
80017ba: f7ff fd71 bl 80012a0 <EEW_Read>
EEW_Read(M2PWMCH, &m2pwmch);
80017be: 49b9 ldr r1, [pc, #740] @ (8001aa4 <loadEE+0x304>)
80017c0: 2003 movs r0, #3
80017c2: f7ff fd6d bl 80012a0 <EEW_Read>
EEW_Read(M3PWMAP, &m3pwmap);
80017c6: 49b8 ldr r1, [pc, #736] @ (8001aa8 <loadEE+0x308>)
80017c8: 2004 movs r0, #4
80017ca: f7ff fd69 bl 80012a0 <EEW_Read>
EEW_Read(M3PWMCH, &m3pwmch);
80017ce: 49b7 ldr r1, [pc, #732] @ (8001aac <loadEE+0x30c>)
80017d0: 2005 movs r0, #5
80017d2: f7ff fd65 bl 80012a0 <EEW_Read>
EEW_Read(M4PWMAP, &m4pwmap);
80017d6: 49b6 ldr r1, [pc, #728] @ (8001ab0 <loadEE+0x310>)
80017d8: 2006 movs r0, #6
80017da: f7ff fd61 bl 80012a0 <EEW_Read>
EEW_Read(M4PWMCH, &m4pwmch);
80017de: 49b5 ldr r1, [pc, #724] @ (8001ab4 <loadEE+0x314>)
80017e0: 2007 movs r0, #7
80017e2: f7ff fd5d bl 80012a0 <EEW_Read>
EEW_Read(M1RAMPSTART, &mrampstart[M1-1]);
80017e6: 49b4 ldr r1, [pc, #720] @ (8001ab8 <loadEE+0x318>)
80017e8: 2008 movs r0, #8
80017ea: f7ff fd59 bl 80012a0 <EEW_Read>
EEW_Read(M2RAMPSTART, &mrampstart[M2-1]);
80017ee: 49b3 ldr r1, [pc, #716] @ (8001abc <loadEE+0x31c>)
80017f0: 2009 movs r0, #9
80017f2: f7ff fd55 bl 80012a0 <EEW_Read>
EEW_Read(M3RAMPSTART, &mrampstart[M3-1]);
80017f6: 49b2 ldr r1, [pc, #712] @ (8001ac0 <loadEE+0x320>)
80017f8: 200a movs r0, #10
80017fa: f7ff fd51 bl 80012a0 <EEW_Read>
EEW_Read(M4RAMPSTART, &mrampstart[M4-1]);
80017fe: 49b1 ldr r1, [pc, #708] @ (8001ac4 <loadEE+0x324>)
8001800: 200b movs r0, #11
8001802: f7ff fd4d bl 80012a0 <EEW_Read>
EEW_Read(M1TIMEOUTMAN, &m1TimeoutMan);
8001806: 49b0 ldr r1, [pc, #704] @ (8001ac8 <loadEE+0x328>)
8001808: 200c movs r0, #12
800180a: f7ff fd49 bl 80012a0 <EEW_Read>
EEW_Read(M2TIMEOUTMAN, &m2TimeoutMan);
800180e: 49af ldr r1, [pc, #700] @ (8001acc <loadEE+0x32c>)
8001810: 200d movs r0, #13
8001812: f7ff fd45 bl 80012a0 <EEW_Read>
EEW_Read(M3TIMEOUTMAN, &m3TimeoutMan);
8001816: 49ae ldr r1, [pc, #696] @ (8001ad0 <loadEE+0x330>)
8001818: 200e movs r0, #14
800181a: f7ff fd41 bl 80012a0 <EEW_Read>
EEW_Read(M4TIMEOUTMAN, &m4TimeoutMan);
800181e: 49ad ldr r1, [pc, #692] @ (8001ad4 <loadEE+0x334>)
8001820: 200f movs r0, #15
8001822: f7ff fd3d bl 80012a0 <EEW_Read>
EEW_Read(THANEM, &thanem);
8001826: 49ac ldr r1, [pc, #688] @ (8001ad8 <loadEE+0x338>)
8001828: 2018 movs r0, #24
800182a: f7ff fd39 bl 80012a0 <EEW_Read>
EEW_Read(TANEM, &thanem);
800182e: 49aa ldr r1, [pc, #680] @ (8001ad8 <loadEE+0x338>)
8001830: 2019 movs r0, #25
8001832: f7ff fd35 bl 80012a0 <EEW_Read>
EEW_Read(M1PWMMAN, &m1pwmMan);
8001836: 49a9 ldr r1, [pc, #676] @ (8001adc <loadEE+0x33c>)
8001838: 201a movs r0, #26
800183a: f7ff fd31 bl 80012a0 <EEW_Read>
EEW_Read(M2PWMMAN, &m2pwmMan);
800183e: 49a8 ldr r1, [pc, #672] @ (8001ae0 <loadEE+0x340>)
8001840: 201b movs r0, #27
8001842: f7ff fd2d bl 80012a0 <EEW_Read>
EEW_Read(M3PWMMAN, &m3pwmMan);
8001846: 49a7 ldr r1, [pc, #668] @ (8001ae4 <loadEE+0x344>)
8001848: 201c movs r0, #28
800184a: f7ff fd29 bl 80012a0 <EEW_Read>
EEW_Read(M4PWMMAN, &m4pwmMan);
800184e: 49a6 ldr r1, [pc, #664] @ (8001ae8 <loadEE+0x348>)
8001850: 201d movs r0, #29
8001852: f7ff fd25 bl 80012a0 <EEW_Read>
EEW_Read(TRAMPMAN, &trampman);
8001856: 49a5 ldr r1, [pc, #660] @ (8001aec <loadEE+0x34c>)
8001858: 201e movs r0, #30
800185a: f7ff fd21 bl 80012a0 <EEW_Read>
EEW_Read(TRAMP, &tramp);
800185e: 49a4 ldr r1, [pc, #656] @ (8001af0 <loadEE+0x350>)
8001860: 201f movs r0, #31
8001862: f7ff fd1d bl 80012a0 <EEW_Read>
EEW_Read(APM1START,&apM1start);
8001866: 49a3 ldr r1, [pc, #652] @ (8001af4 <loadEE+0x354>)
8001868: 2020 movs r0, #32
800186a: f7ff fd19 bl 80012a0 <EEW_Read>
EEW_Read(APM1STOP ,&apM1stop);
800186e: 49a2 ldr r1, [pc, #648] @ (8001af8 <loadEE+0x358>)
8001870: 2021 movs r0, #33 @ 0x21
8001872: f7ff fd15 bl 80012a0 <EEW_Read>
EEW_Read(APM2START,&apM2start);
8001876: 49a1 ldr r1, [pc, #644] @ (8001afc <loadEE+0x35c>)
8001878: 2022 movs r0, #34 @ 0x22
800187a: f7ff fd11 bl 80012a0 <EEW_Read>
EEW_Read(APM2STOP ,&apM2stop);
800187e: 49a0 ldr r1, [pc, #640] @ (8001b00 <loadEE+0x360>)
8001880: 2023 movs r0, #35 @ 0x23
8001882: f7ff fd0d bl 80012a0 <EEW_Read>
EEW_Read(APM3START,&apM3start);
8001886: 499f ldr r1, [pc, #636] @ (8001b04 <loadEE+0x364>)
8001888: 2024 movs r0, #36 @ 0x24
800188a: f7ff fd09 bl 80012a0 <EEW_Read>
EEW_Read(APM3STOP ,&apM3stop);
800188e: 499e ldr r1, [pc, #632] @ (8001b08 <loadEE+0x368>)
8001890: 2025 movs r0, #37 @ 0x25
8001892: f7ff fd05 bl 80012a0 <EEW_Read>
EEW_Read(APM4START,&apM4start);
8001896: 499d ldr r1, [pc, #628] @ (8001b0c <loadEE+0x36c>)
8001898: 2026 movs r0, #38 @ 0x26
800189a: f7ff fd01 bl 80012a0 <EEW_Read>
EEW_Read(APM4STOP ,&apM4stop);
800189e: 499c ldr r1, [pc, #624] @ (8001b10 <loadEE+0x370>)
80018a0: 2027 movs r0, #39 @ 0x27
80018a2: f7ff fcfd bl 80012a0 <EEW_Read>
EEW_Read(CHM1START,&chM1start);
80018a6: 499b ldr r1, [pc, #620] @ (8001b14 <loadEE+0x374>)
80018a8: 2028 movs r0, #40 @ 0x28
80018aa: f7ff fcf9 bl 80012a0 <EEW_Read>
EEW_Read(CHM1STOP ,&chM1stop);
80018ae: 499a ldr r1, [pc, #616] @ (8001b18 <loadEE+0x378>)
80018b0: 2029 movs r0, #41 @ 0x29
80018b2: f7ff fcf5 bl 80012a0 <EEW_Read>
EEW_Read(CHM2START,&chM2start);
80018b6: 4999 ldr r1, [pc, #612] @ (8001b1c <loadEE+0x37c>)
80018b8: 202a movs r0, #42 @ 0x2a
80018ba: f7ff fcf1 bl 80012a0 <EEW_Read>
EEW_Read(CHM2STOP ,&chM2stop);
80018be: 4998 ldr r1, [pc, #608] @ (8001b20 <loadEE+0x380>)
80018c0: 202b movs r0, #43 @ 0x2b
80018c2: f7ff fced bl 80012a0 <EEW_Read>
EEW_Read(CHM3START,&chM3start);
80018c6: 4997 ldr r1, [pc, #604] @ (8001b24 <loadEE+0x384>)
80018c8: 202c movs r0, #44 @ 0x2c
80018ca: f7ff fce9 bl 80012a0 <EEW_Read>
EEW_Read(CHM3STOP ,&chM3stop);
80018ce: 4996 ldr r1, [pc, #600] @ (8001b28 <loadEE+0x388>)
80018d0: 202d movs r0, #45 @ 0x2d
80018d2: f7ff fce5 bl 80012a0 <EEW_Read>
EEW_Read(CHM4START,&chM4start);
80018d6: 4995 ldr r1, [pc, #596] @ (8001b2c <loadEE+0x38c>)
80018d8: 202e movs r0, #46 @ 0x2e
80018da: f7ff fce1 bl 80012a0 <EEW_Read>
EEW_Read(CHM4STOP ,&chM4stop);
80018de: 4994 ldr r1, [pc, #592] @ (8001b30 <loadEE+0x390>)
80018e0: 202f movs r0, #47 @ 0x2f
80018e2: f7ff fcdd bl 80012a0 <EEW_Read>
EEW_Read(FLAGPAR ,&flagPar);
80018e6: 4993 ldr r1, [pc, #588] @ (8001b34 <loadEE+0x394>)
80018e8: 203f movs r0, #63 @ 0x3f
80018ea: f7ff fcd9 bl 80012a0 <EEW_Read>
sprintf((char*)s,"LoadEE\n");
80018ee: 463b mov r3, r7
80018f0: 4991 ldr r1, [pc, #580] @ (8001b38 <loadEE+0x398>)
80018f2: 4618 mov r0, r3
80018f4: f00c fd0c bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80018f8: 463b mov r3, r7
80018fa: 4618 mov r0, r3
80018fc: f7fe fc26 bl 800014c <strlen>
8001900: 4603 mov r3, r0
8001902: b29a uxth r2, r3
8001904: 4639 mov r1, r7
8001906: f04f 33ff mov.w r3, #4294967295
800190a: 488c ldr r0, [pc, #560] @ (8001b3c <loadEE+0x39c>)
800190c: f007 ff10 bl 8009730 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmap=%d m1pwmch=%d m2pwmap=%d m2pwmch=%d m3pwmap=%d m3pwmch=%d m4pwmap=%d m4pwmch=%d",m1pwmap,m1pwmch,m2pwmap,m2pwmch,m3pwmap,m3pwmch,m4pwmap, m4pwmch);
8001910: 4b61 ldr r3, [pc, #388] @ (8001a98 <loadEE+0x2f8>)
8001912: 881b ldrh r3, [r3, #0]
8001914: 469c mov ip, r3
8001916: 4b61 ldr r3, [pc, #388] @ (8001a9c <loadEE+0x2fc>)
8001918: 881b ldrh r3, [r3, #0]
800191a: 469e mov lr, r3
800191c: 4b60 ldr r3, [pc, #384] @ (8001aa0 <loadEE+0x300>)
800191e: 881b ldrh r3, [r3, #0]
8001920: 461a mov r2, r3
8001922: 4b60 ldr r3, [pc, #384] @ (8001aa4 <loadEE+0x304>)
8001924: 881b ldrh r3, [r3, #0]
8001926: 4619 mov r1, r3
8001928: 4b5f ldr r3, [pc, #380] @ (8001aa8 <loadEE+0x308>)
800192a: 881b ldrh r3, [r3, #0]
800192c: 461c mov r4, r3
800192e: 4b5f ldr r3, [pc, #380] @ (8001aac <loadEE+0x30c>)
8001930: 881b ldrh r3, [r3, #0]
8001932: 461d mov r5, r3
8001934: 4b5e ldr r3, [pc, #376] @ (8001ab0 <loadEE+0x310>)
8001936: 881b ldrh r3, [r3, #0]
8001938: 461e mov r6, r3
800193a: 4b5e ldr r3, [pc, #376] @ (8001ab4 <loadEE+0x314>)
800193c: 881b ldrh r3, [r3, #0]
800193e: 4638 mov r0, r7
8001940: 9305 str r3, [sp, #20]
8001942: 9604 str r6, [sp, #16]
8001944: 9503 str r5, [sp, #12]
8001946: 9402 str r4, [sp, #8]
8001948: 9101 str r1, [sp, #4]
800194a: 9200 str r2, [sp, #0]
800194c: 4673 mov r3, lr
800194e: 4662 mov r2, ip
8001950: 497b ldr r1, [pc, #492] @ (8001b40 <loadEE+0x3a0>)
8001952: f00c fcdd bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001956: 463b mov r3, r7
8001958: 4618 mov r0, r3
800195a: f7fe fbf7 bl 800014c <strlen>
800195e: 4603 mov r3, r0
8001960: b29a uxth r2, r3
8001962: 4639 mov r1, r7
8001964: f04f 33ff mov.w r3, #4294967295
8001968: 4874 ldr r0, [pc, #464] @ (8001b3c <loadEE+0x39c>)
800196a: f007 fee1 bl 8009730 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1TimeoutMan=%d m2TimeoutMan=%d m3TimeoutMan=%d m4TimeoutMan=%d ",m1TimeoutMan,m2TimeoutMan,m3TimeoutMan,m4TimeoutMan);
800196e: 4b56 ldr r3, [pc, #344] @ (8001ac8 <loadEE+0x328>)
8001970: 881b ldrh r3, [r3, #0]
8001972: 4619 mov r1, r3
8001974: 4b55 ldr r3, [pc, #340] @ (8001acc <loadEE+0x32c>)
8001976: 881b ldrh r3, [r3, #0]
8001978: 461c mov r4, r3
800197a: 4b55 ldr r3, [pc, #340] @ (8001ad0 <loadEE+0x330>)
800197c: 881b ldrh r3, [r3, #0]
800197e: 461a mov r2, r3
8001980: 4b54 ldr r3, [pc, #336] @ (8001ad4 <loadEE+0x334>)
8001982: 881b ldrh r3, [r3, #0]
8001984: 4638 mov r0, r7
8001986: 9301 str r3, [sp, #4]
8001988: 9200 str r2, [sp, #0]
800198a: 4623 mov r3, r4
800198c: 460a mov r2, r1
800198e: 496d ldr r1, [pc, #436] @ (8001b44 <loadEE+0x3a4>)
8001990: f00c fcbe bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001994: 463b mov r3, r7
8001996: 4618 mov r0, r3
8001998: f7fe fbd8 bl 800014c <strlen>
800199c: 4603 mov r3, r0
800199e: b29a uxth r2, r3
80019a0: 4639 mov r1, r7
80019a2: f04f 33ff mov.w r3, #4294967295
80019a6: 4865 ldr r0, [pc, #404] @ (8001b3c <loadEE+0x39c>)
80019a8: f007 fec2 bl 8009730 <HAL_UART_Transmit>
sprintf((char*)s,"\ntramp=%d trampman=%d",tramp,trampman);
80019ac: 4b50 ldr r3, [pc, #320] @ (8001af0 <loadEE+0x350>)
80019ae: 881b ldrh r3, [r3, #0]
80019b0: 461a mov r2, r3
80019b2: 4b4e ldr r3, [pc, #312] @ (8001aec <loadEE+0x34c>)
80019b4: 881b ldrh r3, [r3, #0]
80019b6: 4638 mov r0, r7
80019b8: 4963 ldr r1, [pc, #396] @ (8001b48 <loadEE+0x3a8>)
80019ba: f00c fca9 bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80019be: 463b mov r3, r7
80019c0: 4618 mov r0, r3
80019c2: f7fe fbc3 bl 800014c <strlen>
80019c6: 4603 mov r3, r0
80019c8: b29a uxth r2, r3
80019ca: 4639 mov r1, r7
80019cc: f04f 33ff mov.w r3, #4294967295
80019d0: 485a ldr r0, [pc, #360] @ (8001b3c <loadEE+0x39c>)
80019d2: f007 fead bl 8009730 <HAL_UART_Transmit>
sprintf((char*)s,"\nm1pwmMan=%d m2pwmMan=%d m3pwmMan=%d m4pwmMan=%d",m1pwmMan,m2pwmMan,m3pwmMan,m4pwmMan);
80019d6: 4b41 ldr r3, [pc, #260] @ (8001adc <loadEE+0x33c>)
80019d8: 881b ldrh r3, [r3, #0]
80019da: 4619 mov r1, r3
80019dc: 4b40 ldr r3, [pc, #256] @ (8001ae0 <loadEE+0x340>)
80019de: 881b ldrh r3, [r3, #0]
80019e0: 461c mov r4, r3
80019e2: 4b40 ldr r3, [pc, #256] @ (8001ae4 <loadEE+0x344>)
80019e4: 881b ldrh r3, [r3, #0]
80019e6: 461a mov r2, r3
80019e8: 4b3f ldr r3, [pc, #252] @ (8001ae8 <loadEE+0x348>)
80019ea: 881b ldrh r3, [r3, #0]
80019ec: 4638 mov r0, r7
80019ee: 9301 str r3, [sp, #4]
80019f0: 9200 str r2, [sp, #0]
80019f2: 4623 mov r3, r4
80019f4: 460a mov r2, r1
80019f6: 4955 ldr r1, [pc, #340] @ (8001b4c <loadEE+0x3ac>)
80019f8: f00c fc8a bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80019fc: 463b mov r3, r7
80019fe: 4618 mov r0, r3
8001a00: f7fe fba4 bl 800014c <strlen>
8001a04: 4603 mov r3, r0
8001a06: b29a uxth r2, r3
8001a08: 4639 mov r1, r7
8001a0a: f04f 33ff mov.w r3, #4294967295
8001a0e: 484b ldr r0, [pc, #300] @ (8001b3c <loadEE+0x39c>)
8001a10: f007 fe8e bl 8009730 <HAL_UART_Transmit>
sprintf((char*)s,"\napM1start=%d apM1stop=%d chM1start=%d chM1stop=%d",apM1start,apM1stop,chM1start,chM1stop);
8001a14: 4b37 ldr r3, [pc, #220] @ (8001af4 <loadEE+0x354>)
8001a16: 881b ldrh r3, [r3, #0]
8001a18: 4619 mov r1, r3
8001a1a: 4b37 ldr r3, [pc, #220] @ (8001af8 <loadEE+0x358>)
8001a1c: 881b ldrh r3, [r3, #0]
8001a1e: 461c mov r4, r3
8001a20: 4b3c ldr r3, [pc, #240] @ (8001b14 <loadEE+0x374>)
8001a22: 881b ldrh r3, [r3, #0]
8001a24: 461a mov r2, r3
8001a26: 4b3c ldr r3, [pc, #240] @ (8001b18 <loadEE+0x378>)
8001a28: 881b ldrh r3, [r3, #0]
8001a2a: 4638 mov r0, r7
8001a2c: 9301 str r3, [sp, #4]
8001a2e: 9200 str r2, [sp, #0]
8001a30: 4623 mov r3, r4
8001a32: 460a mov r2, r1
8001a34: 4946 ldr r1, [pc, #280] @ (8001b50 <loadEE+0x3b0>)
8001a36: f00c fc6b bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001a3a: 463b mov r3, r7
8001a3c: 4618 mov r0, r3
8001a3e: f7fe fb85 bl 800014c <strlen>
8001a42: 4603 mov r3, r0
8001a44: b29a uxth r2, r3
8001a46: 4639 mov r1, r7
8001a48: f04f 33ff mov.w r3, #4294967295
8001a4c: 483b ldr r0, [pc, #236] @ (8001b3c <loadEE+0x39c>)
8001a4e: f007 fe6f bl 8009730 <HAL_UART_Transmit>
sprintf((char*)s,"\napM2start=%d apM2stop=%d chM2start=%d chM2stop=%d",apM2start,apM2stop,chM2start,chM2stop);
8001a52: 4b2a ldr r3, [pc, #168] @ (8001afc <loadEE+0x35c>)
8001a54: 881b ldrh r3, [r3, #0]
8001a56: 4619 mov r1, r3
8001a58: 4b29 ldr r3, [pc, #164] @ (8001b00 <loadEE+0x360>)
8001a5a: 881b ldrh r3, [r3, #0]
8001a5c: 461c mov r4, r3
8001a5e: 4b2f ldr r3, [pc, #188] @ (8001b1c <loadEE+0x37c>)
8001a60: 881b ldrh r3, [r3, #0]
8001a62: 461a mov r2, r3
8001a64: 4b2e ldr r3, [pc, #184] @ (8001b20 <loadEE+0x380>)
8001a66: 881b ldrh r3, [r3, #0]
8001a68: 4638 mov r0, r7
8001a6a: 9301 str r3, [sp, #4]
8001a6c: 9200 str r2, [sp, #0]
8001a6e: 4623 mov r3, r4
8001a70: 460a mov r2, r1
8001a72: 4938 ldr r1, [pc, #224] @ (8001b54 <loadEE+0x3b4>)
8001a74: f00c fc4c bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001a78: 463b mov r3, r7
8001a7a: 4618 mov r0, r3
8001a7c: f7fe fb66 bl 800014c <strlen>
8001a80: 4603 mov r3, r0
8001a82: b29a uxth r2, r3
8001a84: 4639 mov r1, r7
8001a86: f04f 33ff mov.w r3, #4294967295
8001a8a: 482c ldr r0, [pc, #176] @ (8001b3c <loadEE+0x39c>)
8001a8c: f007 fe50 bl 8009730 <HAL_UART_Transmit>
sprintf((char*)s,"\napM3start=%d apM3stop=%d chM3start=%d chM3stop=%d",apM3start,apM3stop,chM3start,chM3stop);
8001a90: 4b1c ldr r3, [pc, #112] @ (8001b04 <loadEE+0x364>)
8001a92: 881b ldrh r3, [r3, #0]
8001a94: 4619 mov r1, r3
8001a96: e05f b.n 8001b58 <loadEE+0x3b8>
8001a98: 20000400 .word 0x20000400
8001a9c: 20000402 .word 0x20000402
8001aa0: 20000404 .word 0x20000404
8001aa4: 20000406 .word 0x20000406
8001aa8: 20000408 .word 0x20000408
8001aac: 2000040a .word 0x2000040a
8001ab0: 2000040c .word 0x2000040c
8001ab4: 2000040e .word 0x2000040e
8001ab8: 2000044c .word 0x2000044c
8001abc: 2000044e .word 0x2000044e
8001ac0: 20000450 .word 0x20000450
8001ac4: 20000452 .word 0x20000452
8001ac8: 20000410 .word 0x20000410
8001acc: 20000412 .word 0x20000412
8001ad0: 20000414 .word 0x20000414
8001ad4: 20000416 .word 0x20000416
8001ad8: 2000041c .word 0x2000041c
8001adc: 20000420 .word 0x20000420
8001ae0: 20000422 .word 0x20000422
8001ae4: 20000424 .word 0x20000424
8001ae8: 20000426 .word 0x20000426
8001aec: 2000041e .word 0x2000041e
8001af0: 20000418 .word 0x20000418
8001af4: 20000428 .word 0x20000428
8001af8: 2000042a .word 0x2000042a
8001afc: 2000042c .word 0x2000042c
8001b00: 2000042e .word 0x2000042e
8001b04: 20000430 .word 0x20000430
8001b08: 20000432 .word 0x20000432
8001b0c: 20000434 .word 0x20000434
8001b10: 20000436 .word 0x20000436
8001b14: 20000438 .word 0x20000438
8001b18: 2000043a .word 0x2000043a
8001b1c: 2000043c .word 0x2000043c
8001b20: 2000043e .word 0x2000043e
8001b24: 20000440 .word 0x20000440
8001b28: 20000442 .word 0x20000442
8001b2c: 20000444 .word 0x20000444
8001b30: 20000446 .word 0x20000446
8001b34: 20000448 .word 0x20000448
8001b38: 0800f0a8 .word 0x0800f0a8
8001b3c: 200003a8 .word 0x200003a8
8001b40: 0800f0b0 .word 0x0800f0b0
8001b44: 0800f10c .word 0x0800f10c
8001b48: 0800f150 .word 0x0800f150
8001b4c: 0800f168 .word 0x0800f168
8001b50: 0800f19c .word 0x0800f19c
8001b54: 0800f1d0 .word 0x0800f1d0
8001b58: 4b1f ldr r3, [pc, #124] @ (8001bd8 <loadEE+0x438>)
8001b5a: 881b ldrh r3, [r3, #0]
8001b5c: 461c mov r4, r3
8001b5e: 4b1f ldr r3, [pc, #124] @ (8001bdc <loadEE+0x43c>)
8001b60: 881b ldrh r3, [r3, #0]
8001b62: 461a mov r2, r3
8001b64: 4b1e ldr r3, [pc, #120] @ (8001be0 <loadEE+0x440>)
8001b66: 881b ldrh r3, [r3, #0]
8001b68: 4638 mov r0, r7
8001b6a: 9301 str r3, [sp, #4]
8001b6c: 9200 str r2, [sp, #0]
8001b6e: 4623 mov r3, r4
8001b70: 460a mov r2, r1
8001b72: 491c ldr r1, [pc, #112] @ (8001be4 <loadEE+0x444>)
8001b74: f00c fbcc bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001b78: 463b mov r3, r7
8001b7a: 4618 mov r0, r3
8001b7c: f7fe fae6 bl 800014c <strlen>
8001b80: 4603 mov r3, r0
8001b82: b29a uxth r2, r3
8001b84: 4639 mov r1, r7
8001b86: f04f 33ff mov.w r3, #4294967295
8001b8a: 4817 ldr r0, [pc, #92] @ (8001be8 <loadEE+0x448>)
8001b8c: f007 fdd0 bl 8009730 <HAL_UART_Transmit>
sprintf((char*)s,"\napM4start=%d apM4stop=%d chM4start=%d chM4stop=%d",apM4start,apM4stop,chM4start,chM4stop);
8001b90: 4b16 ldr r3, [pc, #88] @ (8001bec <loadEE+0x44c>)
8001b92: 881b ldrh r3, [r3, #0]
8001b94: 4619 mov r1, r3
8001b96: 4b16 ldr r3, [pc, #88] @ (8001bf0 <loadEE+0x450>)
8001b98: 881b ldrh r3, [r3, #0]
8001b9a: 461c mov r4, r3
8001b9c: 4b15 ldr r3, [pc, #84] @ (8001bf4 <loadEE+0x454>)
8001b9e: 881b ldrh r3, [r3, #0]
8001ba0: 461a mov r2, r3
8001ba2: 4b15 ldr r3, [pc, #84] @ (8001bf8 <loadEE+0x458>)
8001ba4: 881b ldrh r3, [r3, #0]
8001ba6: 4638 mov r0, r7
8001ba8: 9301 str r3, [sp, #4]
8001baa: 9200 str r2, [sp, #0]
8001bac: 4623 mov r3, r4
8001bae: 460a mov r2, r1
8001bb0: 4912 ldr r1, [pc, #72] @ (8001bfc <loadEE+0x45c>)
8001bb2: f00c fbad bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8001bb6: 463b mov r3, r7
8001bb8: 4618 mov r0, r3
8001bba: f7fe fac7 bl 800014c <strlen>
8001bbe: 4603 mov r3, r0
8001bc0: b29a uxth r2, r3
8001bc2: 4639 mov r1, r7
8001bc4: f04f 33ff mov.w r3, #4294967295
8001bc8: 4807 ldr r0, [pc, #28] @ (8001be8 <loadEE+0x448>)
8001bca: f007 fdb1 bl 8009730 <HAL_UART_Transmit>
}
8001bce: bf00 nop
8001bd0: 37cc adds r7, #204 @ 0xcc
8001bd2: 46bd mov sp, r7
8001bd4: bdf0 pop {r4, r5, r6, r7, pc}
8001bd6: bf00 nop
8001bd8: 20000432 .word 0x20000432
8001bdc: 20000440 .word 0x20000440
8001be0: 20000442 .word 0x20000442
8001be4: 0800f204 .word 0x0800f204
8001be8: 200003a8 .word 0x200003a8
8001bec: 20000434 .word 0x20000434
8001bf0: 20000436 .word 0x20000436
8001bf4: 20000444 .word 0x20000444
8001bf8: 20000446 .word 0x20000446
8001bfc: 0800f238 .word 0x0800f238
08001c00 <HAL_SYSTICK_Callback>:
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
void HAL_SYSTICK_Callback(void){
8001c00: b580 push {r7, lr}
8001c02: b082 sub sp, #8
8001c04: af00 add r7, sp, #0
static uint8_t c1s = 0;
static uint8_t inidx=0;
static uint8_t inbuf[4];
uint8_t i;
if (++c10ms >= 10) { // 10 ms
8001c06: 4b7c ldr r3, [pc, #496] @ (8001df8 <HAL_SYSTICK_Callback+0x1f8>)
8001c08: 781b ldrb r3, [r3, #0]
8001c0a: 3301 adds r3, #1
8001c0c: b2da uxtb r2, r3
8001c0e: 4b7a ldr r3, [pc, #488] @ (8001df8 <HAL_SYSTICK_Callback+0x1f8>)
8001c10: 701a strb r2, [r3, #0]
8001c12: 4b79 ldr r3, [pc, #484] @ (8001df8 <HAL_SYSTICK_Callback+0x1f8>)
8001c14: 781b ldrb r3, [r3, #0]
8001c16: 2b09 cmp r3, #9
8001c18: f240 81e7 bls.w 8001fea <HAL_SYSTICK_Callback+0x3ea>
c10ms = 0;
8001c1c: 4b76 ldr r3, [pc, #472] @ (8001df8 <HAL_SYSTICK_Callback+0x1f8>)
8001c1e: 2200 movs r2, #0
8001c20: 701a strb r2, [r3, #0]
if(rtP1)rtP1--;
8001c22: 4b76 ldr r3, [pc, #472] @ (8001dfc <HAL_SYSTICK_Callback+0x1fc>)
8001c24: 781b ldrb r3, [r3, #0]
8001c26: b2db uxtb r3, r3
8001c28: 2b00 cmp r3, #0
8001c2a: d006 beq.n 8001c3a <HAL_SYSTICK_Callback+0x3a>
8001c2c: 4b73 ldr r3, [pc, #460] @ (8001dfc <HAL_SYSTICK_Callback+0x1fc>)
8001c2e: 781b ldrb r3, [r3, #0]
8001c30: b2db uxtb r3, r3
8001c32: 3b01 subs r3, #1
8001c34: b2da uxtb r2, r3
8001c36: 4b71 ldr r3, [pc, #452] @ (8001dfc <HAL_SYSTICK_Callback+0x1fc>)
8001c38: 701a strb r2, [r3, #0]
if(rtP2)rtP2--;
8001c3a: 4b71 ldr r3, [pc, #452] @ (8001e00 <HAL_SYSTICK_Callback+0x200>)
8001c3c: 781b ldrb r3, [r3, #0]
8001c3e: b2db uxtb r3, r3
8001c40: 2b00 cmp r3, #0
8001c42: d006 beq.n 8001c52 <HAL_SYSTICK_Callback+0x52>
8001c44: 4b6e ldr r3, [pc, #440] @ (8001e00 <HAL_SYSTICK_Callback+0x200>)
8001c46: 781b ldrb r3, [r3, #0]
8001c48: b2db uxtb r3, r3
8001c4a: 3b01 subs r3, #1
8001c4c: b2da uxtb r2, r3
8001c4e: 4b6c ldr r3, [pc, #432] @ (8001e00 <HAL_SYSTICK_Callback+0x200>)
8001c50: 701a strb r2, [r3, #0]
if(rtTLC)rtTLC--;
8001c52: 4b6c ldr r3, [pc, #432] @ (8001e04 <HAL_SYSTICK_Callback+0x204>)
8001c54: 781b ldrb r3, [r3, #0]
8001c56: b2db uxtb r3, r3
8001c58: 2b00 cmp r3, #0
8001c5a: d006 beq.n 8001c6a <HAL_SYSTICK_Callback+0x6a>
8001c5c: 4b69 ldr r3, [pc, #420] @ (8001e04 <HAL_SYSTICK_Callback+0x204>)
8001c5e: 781b ldrb r3, [r3, #0]
8001c60: b2db uxtb r3, r3
8001c62: 3b01 subs r3, #1
8001c64: b2da uxtb r2, r3
8001c66: 4b67 ldr r3, [pc, #412] @ (8001e04 <HAL_SYSTICK_Callback+0x204>)
8001c68: 701a strb r2, [r3, #0]
//**** legge i tasti********************************************************************************
inidx++;
8001c6a: 4b67 ldr r3, [pc, #412] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001c6c: 781b ldrb r3, [r3, #0]
8001c6e: 3301 adds r3, #1
8001c70: b2da uxtb r2, r3
8001c72: 4b65 ldr r3, [pc, #404] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001c74: 701a strb r2, [r3, #0]
inidx&=0x03;
8001c76: 4b64 ldr r3, [pc, #400] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001c78: 781b ldrb r3, [r3, #0]
8001c7a: f003 0303 and.w r3, r3, #3
8001c7e: b2da uxtb r2, r3
8001c80: 4b61 ldr r3, [pc, #388] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001c82: 701a strb r2, [r3, #0]
if(HAL_GPIO_ReadPin(P1_GPIO_Port, P1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP1;else inbuf[inidx]&=(~INP1);
8001c84: f44f 4180 mov.w r1, #16384 @ 0x4000
8001c88: 4860 ldr r0, [pc, #384] @ (8001e0c <HAL_SYSTICK_Callback+0x20c>)
8001c8a: f004 fc3b bl 8006504 <HAL_GPIO_ReadPin>
8001c8e: 4603 mov r3, r0
8001c90: 2b00 cmp r3, #0
8001c92: d10c bne.n 8001cae <HAL_SYSTICK_Callback+0xae>
8001c94: 4b5c ldr r3, [pc, #368] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001c96: 781b ldrb r3, [r3, #0]
8001c98: 461a mov r2, r3
8001c9a: 4b5d ldr r3, [pc, #372] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001c9c: 5c9b ldrb r3, [r3, r2]
8001c9e: 4a5a ldr r2, [pc, #360] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001ca0: 7812 ldrb r2, [r2, #0]
8001ca2: f043 0301 orr.w r3, r3, #1
8001ca6: b2d9 uxtb r1, r3
8001ca8: 4b59 ldr r3, [pc, #356] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001caa: 5499 strb r1, [r3, r2]
8001cac: e00b b.n 8001cc6 <HAL_SYSTICK_Callback+0xc6>
8001cae: 4b56 ldr r3, [pc, #344] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001cb0: 781b ldrb r3, [r3, #0]
8001cb2: 461a mov r2, r3
8001cb4: 4b56 ldr r3, [pc, #344] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001cb6: 5c9b ldrb r3, [r3, r2]
8001cb8: 4a53 ldr r2, [pc, #332] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001cba: 7812 ldrb r2, [r2, #0]
8001cbc: f023 0301 bic.w r3, r3, #1
8001cc0: b2d9 uxtb r1, r3
8001cc2: 4b53 ldr r3, [pc, #332] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001cc4: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(P2_GPIO_Port, P2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INP2;else inbuf[inidx]&=(~INP2);
8001cc6: f44f 4100 mov.w r1, #32768 @ 0x8000
8001cca: 4850 ldr r0, [pc, #320] @ (8001e0c <HAL_SYSTICK_Callback+0x20c>)
8001ccc: f004 fc1a bl 8006504 <HAL_GPIO_ReadPin>
8001cd0: 4603 mov r3, r0
8001cd2: 2b00 cmp r3, #0
8001cd4: d10c bne.n 8001cf0 <HAL_SYSTICK_Callback+0xf0>
8001cd6: 4b4c ldr r3, [pc, #304] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001cd8: 781b ldrb r3, [r3, #0]
8001cda: 461a mov r2, r3
8001cdc: 4b4c ldr r3, [pc, #304] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001cde: 5c9b ldrb r3, [r3, r2]
8001ce0: 4a49 ldr r2, [pc, #292] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001ce2: 7812 ldrb r2, [r2, #0]
8001ce4: f043 0302 orr.w r3, r3, #2
8001ce8: b2d9 uxtb r1, r3
8001cea: 4b49 ldr r3, [pc, #292] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001cec: 5499 strb r1, [r3, r2]
8001cee: e00b b.n 8001d08 <HAL_SYSTICK_Callback+0x108>
8001cf0: 4b45 ldr r3, [pc, #276] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001cf2: 781b ldrb r3, [r3, #0]
8001cf4: 461a mov r2, r3
8001cf6: 4b46 ldr r3, [pc, #280] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001cf8: 5c9b ldrb r3, [r3, r2]
8001cfa: 4a43 ldr r2, [pc, #268] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001cfc: 7812 ldrb r2, [r2, #0]
8001cfe: f023 0302 bic.w r3, r3, #2
8001d02: b2d9 uxtb r1, r3
8001d04: 4b42 ldr r3, [pc, #264] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001d06: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH1_GPIO_Port, CH1_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH1;else inbuf[inidx]&=(~INCH1);
8001d08: f44f 5180 mov.w r1, #4096 @ 0x1000
8001d0c: 4841 ldr r0, [pc, #260] @ (8001e14 <HAL_SYSTICK_Callback+0x214>)
8001d0e: f004 fbf9 bl 8006504 <HAL_GPIO_ReadPin>
8001d12: 4603 mov r3, r0
8001d14: 2b00 cmp r3, #0
8001d16: d10c bne.n 8001d32 <HAL_SYSTICK_Callback+0x132>
8001d18: 4b3b ldr r3, [pc, #236] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001d1a: 781b ldrb r3, [r3, #0]
8001d1c: 461a mov r2, r3
8001d1e: 4b3c ldr r3, [pc, #240] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001d20: 5c9b ldrb r3, [r3, r2]
8001d22: 4a39 ldr r2, [pc, #228] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001d24: 7812 ldrb r2, [r2, #0]
8001d26: f043 0304 orr.w r3, r3, #4
8001d2a: b2d9 uxtb r1, r3
8001d2c: 4b38 ldr r3, [pc, #224] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001d2e: 5499 strb r1, [r3, r2]
8001d30: e00b b.n 8001d4a <HAL_SYSTICK_Callback+0x14a>
8001d32: 4b35 ldr r3, [pc, #212] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001d34: 781b ldrb r3, [r3, #0]
8001d36: 461a mov r2, r3
8001d38: 4b35 ldr r3, [pc, #212] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001d3a: 5c9b ldrb r3, [r3, r2]
8001d3c: 4a32 ldr r2, [pc, #200] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001d3e: 7812 ldrb r2, [r2, #0]
8001d40: f023 0304 bic.w r3, r3, #4
8001d44: b2d9 uxtb r1, r3
8001d46: 4b32 ldr r3, [pc, #200] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001d48: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH2_GPIO_Port, CH2_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH2;else inbuf[inidx]&=(~INCH2);
8001d4a: f44f 5100 mov.w r1, #8192 @ 0x2000
8001d4e: 4831 ldr r0, [pc, #196] @ (8001e14 <HAL_SYSTICK_Callback+0x214>)
8001d50: f004 fbd8 bl 8006504 <HAL_GPIO_ReadPin>
8001d54: 4603 mov r3, r0
8001d56: 2b00 cmp r3, #0
8001d58: d10c bne.n 8001d74 <HAL_SYSTICK_Callback+0x174>
8001d5a: 4b2b ldr r3, [pc, #172] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001d5c: 781b ldrb r3, [r3, #0]
8001d5e: 461a mov r2, r3
8001d60: 4b2b ldr r3, [pc, #172] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001d62: 5c9b ldrb r3, [r3, r2]
8001d64: 4a28 ldr r2, [pc, #160] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001d66: 7812 ldrb r2, [r2, #0]
8001d68: f043 0308 orr.w r3, r3, #8
8001d6c: b2d9 uxtb r1, r3
8001d6e: 4b28 ldr r3, [pc, #160] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001d70: 5499 strb r1, [r3, r2]
8001d72: e00b b.n 8001d8c <HAL_SYSTICK_Callback+0x18c>
8001d74: 4b24 ldr r3, [pc, #144] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001d76: 781b ldrb r3, [r3, #0]
8001d78: 461a mov r2, r3
8001d7a: 4b25 ldr r3, [pc, #148] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001d7c: 5c9b ldrb r3, [r3, r2]
8001d7e: 4a22 ldr r2, [pc, #136] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001d80: 7812 ldrb r2, [r2, #0]
8001d82: f023 0308 bic.w r3, r3, #8
8001d86: b2d9 uxtb r1, r3
8001d88: 4b21 ldr r3, [pc, #132] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001d8a: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH3_GPIO_Port, CH3_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH3;else inbuf[inidx]&=(~INCH3);
8001d8c: f44f 4180 mov.w r1, #16384 @ 0x4000
8001d90: 4820 ldr r0, [pc, #128] @ (8001e14 <HAL_SYSTICK_Callback+0x214>)
8001d92: f004 fbb7 bl 8006504 <HAL_GPIO_ReadPin>
8001d96: 4603 mov r3, r0
8001d98: 2b00 cmp r3, #0
8001d9a: d10c bne.n 8001db6 <HAL_SYSTICK_Callback+0x1b6>
8001d9c: 4b1a ldr r3, [pc, #104] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001d9e: 781b ldrb r3, [r3, #0]
8001da0: 461a mov r2, r3
8001da2: 4b1b ldr r3, [pc, #108] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001da4: 5c9b ldrb r3, [r3, r2]
8001da6: 4a18 ldr r2, [pc, #96] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001da8: 7812 ldrb r2, [r2, #0]
8001daa: f043 0310 orr.w r3, r3, #16
8001dae: b2d9 uxtb r1, r3
8001db0: 4b17 ldr r3, [pc, #92] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001db2: 5499 strb r1, [r3, r2]
8001db4: e00b b.n 8001dce <HAL_SYSTICK_Callback+0x1ce>
8001db6: 4b14 ldr r3, [pc, #80] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001db8: 781b ldrb r3, [r3, #0]
8001dba: 461a mov r2, r3
8001dbc: 4b14 ldr r3, [pc, #80] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001dbe: 5c9b ldrb r3, [r3, r2]
8001dc0: 4a11 ldr r2, [pc, #68] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001dc2: 7812 ldrb r2, [r2, #0]
8001dc4: f023 0310 bic.w r3, r3, #16
8001dc8: b2d9 uxtb r1, r3
8001dca: 4b11 ldr r3, [pc, #68] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001dcc: 5499 strb r1, [r3, r2]
if(HAL_GPIO_ReadPin(CH4_GPIO_Port, CH4_Pin)==GPIO_PIN_RESET)inbuf[inidx]|=INCH4;else inbuf[inidx]&=(~INCH4);
8001dce: f44f 4100 mov.w r1, #32768 @ 0x8000
8001dd2: 4810 ldr r0, [pc, #64] @ (8001e14 <HAL_SYSTICK_Callback+0x214>)
8001dd4: f004 fb96 bl 8006504 <HAL_GPIO_ReadPin>
8001dd8: 4603 mov r3, r0
8001dda: 2b00 cmp r3, #0
8001ddc: d11c bne.n 8001e18 <HAL_SYSTICK_Callback+0x218>
8001dde: 4b0a ldr r3, [pc, #40] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001de0: 781b ldrb r3, [r3, #0]
8001de2: 461a mov r2, r3
8001de4: 4b0a ldr r3, [pc, #40] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001de6: 5c9b ldrb r3, [r3, r2]
8001de8: 4a07 ldr r2, [pc, #28] @ (8001e08 <HAL_SYSTICK_Callback+0x208>)
8001dea: 7812 ldrb r2, [r2, #0]
8001dec: f043 0320 orr.w r3, r3, #32
8001df0: b2d9 uxtb r1, r3
8001df2: 4b07 ldr r3, [pc, #28] @ (8001e10 <HAL_SYSTICK_Callback+0x210>)
8001df4: 5499 strb r1, [r3, r2]
8001df6: e01b b.n 8001e30 <HAL_SYSTICK_Callback+0x230>
8001df8: 20000459 .word 0x20000459
8001dfc: 20000004 .word 0x20000004
8001e00: 20000005 .word 0x20000005
8001e04: 20000006 .word 0x20000006
8001e08: 2000045a .word 0x2000045a
8001e0c: 40011000 .word 0x40011000
8001e10: 2000045c .word 0x2000045c
8001e14: 40010c00 .word 0x40010c00
8001e18: 4b76 ldr r3, [pc, #472] @ (8001ff4 <HAL_SYSTICK_Callback+0x3f4>)
8001e1a: 781b ldrb r3, [r3, #0]
8001e1c: 461a mov r2, r3
8001e1e: 4b76 ldr r3, [pc, #472] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e20: 5c9b ldrb r3, [r3, r2]
8001e22: 4a74 ldr r2, [pc, #464] @ (8001ff4 <HAL_SYSTICK_Callback+0x3f4>)
8001e24: 7812 ldrb r2, [r2, #0]
8001e26: f023 0320 bic.w r3, r3, #32
8001e2a: b2d9 uxtb r1, r3
8001e2c: 4b72 ldr r3, [pc, #456] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e2e: 5499 strb r1, [r3, r2]
pulsanti|=(inbuf[0]&inbuf[1]&inbuf[2]&inbuf[3]);
8001e30: 4b71 ldr r3, [pc, #452] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e32: 781a ldrb r2, [r3, #0]
8001e34: 4b70 ldr r3, [pc, #448] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e36: 785b ldrb r3, [r3, #1]
8001e38: 4013 ands r3, r2
8001e3a: b2da uxtb r2, r3
8001e3c: 4b6e ldr r3, [pc, #440] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e3e: 789b ldrb r3, [r3, #2]
8001e40: 4013 ands r3, r2
8001e42: b2da uxtb r2, r3
8001e44: 4b6c ldr r3, [pc, #432] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e46: 78db ldrb r3, [r3, #3]
8001e48: 4013 ands r3, r2
8001e4a: b2da uxtb r2, r3
8001e4c: 4b6b ldr r3, [pc, #428] @ (8001ffc <HAL_SYSTICK_Callback+0x3fc>)
8001e4e: 781b ldrb r3, [r3, #0]
8001e50: 4313 orrs r3, r2
8001e52: b2da uxtb r2, r3
8001e54: 4b69 ldr r3, [pc, #420] @ (8001ffc <HAL_SYSTICK_Callback+0x3fc>)
8001e56: 701a strb r2, [r3, #0]
pulsanti&=(inbuf[0]|inbuf[1]|inbuf[2]|inbuf[3]);
8001e58: 4b67 ldr r3, [pc, #412] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e5a: 781a ldrb r2, [r3, #0]
8001e5c: 4b66 ldr r3, [pc, #408] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e5e: 785b ldrb r3, [r3, #1]
8001e60: 4313 orrs r3, r2
8001e62: b2da uxtb r2, r3
8001e64: 4b64 ldr r3, [pc, #400] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e66: 789b ldrb r3, [r3, #2]
8001e68: 4313 orrs r3, r2
8001e6a: b2da uxtb r2, r3
8001e6c: 4b62 ldr r3, [pc, #392] @ (8001ff8 <HAL_SYSTICK_Callback+0x3f8>)
8001e6e: 78db ldrb r3, [r3, #3]
8001e70: 4313 orrs r3, r2
8001e72: b2da uxtb r2, r3
8001e74: 4b61 ldr r3, [pc, #388] @ (8001ffc <HAL_SYSTICK_Callback+0x3fc>)
8001e76: 781b ldrb r3, [r3, #0]
8001e78: 4013 ands r3, r2
8001e7a: b2da uxtb r2, r3
8001e7c: 4b5f ldr r3, [pc, #380] @ (8001ffc <HAL_SYSTICK_Callback+0x3fc>)
8001e7e: 701a strb r2, [r3, #0]
//**** legge adc ***********************************************************************************
readAdc();
8001e80: f7fe f9a2 bl 80001c8 <readAdc>
if (++c100ms >= 10) { // 10 ms
8001e84: 4b5e ldr r3, [pc, #376] @ (8002000 <HAL_SYSTICK_Callback+0x400>)
8001e86: 781b ldrb r3, [r3, #0]
8001e88: 3301 adds r3, #1
8001e8a: b2da uxtb r2, r3
8001e8c: 4b5c ldr r3, [pc, #368] @ (8002000 <HAL_SYSTICK_Callback+0x400>)
8001e8e: 701a strb r2, [r3, #0]
8001e90: 4b5b ldr r3, [pc, #364] @ (8002000 <HAL_SYSTICK_Callback+0x400>)
8001e92: 781b ldrb r3, [r3, #0]
8001e94: 2b09 cmp r3, #9
8001e96: f240 80a8 bls.w 8001fea <HAL_SYSTICK_Callback+0x3ea>
c100ms = 0; //flag_10ms = 1; // set a flag; do real work in main loop
8001e9a: 4b59 ldr r3, [pc, #356] @ (8002000 <HAL_SYSTICK_Callback+0x400>)
8001e9c: 2200 movs r2, #0
8001e9e: 701a strb r2, [r3, #0]
for(i=0;i<4;i++){
8001ea0: 2300 movs r3, #0
8001ea2: 71fb strb r3, [r7, #7]
8001ea4: e013 b.n 8001ece <HAL_SYSTICK_Callback+0x2ce>
if(rtramp[i])rtramp[i]--;
8001ea6: 79fb ldrb r3, [r7, #7]
8001ea8: 4a56 ldr r2, [pc, #344] @ (8002004 <HAL_SYSTICK_Callback+0x404>)
8001eaa: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8001eae: b29b uxth r3, r3
8001eb0: 2b00 cmp r3, #0
8001eb2: d009 beq.n 8001ec8 <HAL_SYSTICK_Callback+0x2c8>
8001eb4: 79fb ldrb r3, [r7, #7]
8001eb6: 4a53 ldr r2, [pc, #332] @ (8002004 <HAL_SYSTICK_Callback+0x404>)
8001eb8: f832 2013 ldrh.w r2, [r2, r3, lsl #1]
8001ebc: b292 uxth r2, r2
8001ebe: 3a01 subs r2, #1
8001ec0: b291 uxth r1, r2
8001ec2: 4a50 ldr r2, [pc, #320] @ (8002004 <HAL_SYSTICK_Callback+0x404>)
8001ec4: f822 1013 strh.w r1, [r2, r3, lsl #1]
for(i=0;i<4;i++){
8001ec8: 79fb ldrb r3, [r7, #7]
8001eca: 3301 adds r3, #1
8001ecc: 71fb strb r3, [r7, #7]
8001ece: 79fb ldrb r3, [r7, #7]
8001ed0: 2b03 cmp r3, #3
8001ed2: d9e8 bls.n 8001ea6 <HAL_SYSTICK_Callback+0x2a6>
}
if(rtCiclo<0xffff)rtCiclo++;
8001ed4: 4b4c ldr r3, [pc, #304] @ (8002008 <HAL_SYSTICK_Callback+0x408>)
8001ed6: 881b ldrh r3, [r3, #0]
8001ed8: b29b uxth r3, r3
8001eda: f64f 72ff movw r2, #65535 @ 0xffff
8001ede: 4293 cmp r3, r2
8001ee0: d006 beq.n 8001ef0 <HAL_SYSTICK_Callback+0x2f0>
8001ee2: 4b49 ldr r3, [pc, #292] @ (8002008 <HAL_SYSTICK_Callback+0x408>)
8001ee4: 881b ldrh r3, [r3, #0]
8001ee6: b29b uxth r3, r3
8001ee8: 3301 adds r3, #1
8001eea: b29a uxth r2, r3
8001eec: 4b46 ldr r3, [pc, #280] @ (8002008 <HAL_SYSTICK_Callback+0x408>)
8001eee: 801a strh r2, [r3, #0]
if(rtAnem)rtAnem--;
8001ef0: 4b46 ldr r3, [pc, #280] @ (800200c <HAL_SYSTICK_Callback+0x40c>)
8001ef2: 881b ldrh r3, [r3, #0]
8001ef4: b29b uxth r3, r3
8001ef6: 2b00 cmp r3, #0
8001ef8: d006 beq.n 8001f08 <HAL_SYSTICK_Callback+0x308>
8001efa: 4b44 ldr r3, [pc, #272] @ (800200c <HAL_SYSTICK_Callback+0x40c>)
8001efc: 881b ldrh r3, [r3, #0]
8001efe: b29b uxth r3, r3
8001f00: 3b01 subs r3, #1
8001f02: b29a uxth r2, r3
8001f04: 4b41 ldr r3, [pc, #260] @ (800200c <HAL_SYSTICK_Callback+0x40c>)
8001f06: 801a strh r2, [r3, #0]
//**** gestione buzzer *****************************************************************************
if(stBuz==bzmoving){
8001f08: 4b41 ldr r3, [pc, #260] @ (8002010 <HAL_SYSTICK_Callback+0x410>)
8001f0a: 781b ldrb r3, [r3, #0]
8001f0c: b2db uxtb r3, r3
8001f0e: 2b01 cmp r3, #1
8001f10: d127 bne.n 8001f62 <HAL_SYSTICK_Callback+0x362>
if(nobuz){
8001f12: 4b40 ldr r3, [pc, #256] @ (8002014 <HAL_SYSTICK_Callback+0x414>)
8001f14: 781b ldrb r3, [r3, #0]
8001f16: 2b00 cmp r3, #0
8001f18: d011 beq.n 8001f3e <HAL_SYSTICK_Callback+0x33e>
if(c1s>=5)HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET);
8001f1a: 4b3f ldr r3, [pc, #252] @ (8002018 <HAL_SYSTICK_Callback+0x418>)
8001f1c: 781b ldrb r3, [r3, #0]
8001f1e: 2b04 cmp r3, #4
8001f20: d906 bls.n 8001f30 <HAL_SYSTICK_Callback+0x330>
8001f22: 2200 movs r2, #0
8001f24: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f28: 483c ldr r0, [pc, #240] @ (800201c <HAL_SYSTICK_Callback+0x41c>)
8001f2a: f004 fb02 bl 8006532 <HAL_GPIO_WritePin>
8001f2e: e04f b.n 8001fd0 <HAL_SYSTICK_Callback+0x3d0>
8001f30: 2201 movs r2, #1
8001f32: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f36: 4839 ldr r0, [pc, #228] @ (800201c <HAL_SYSTICK_Callback+0x41c>)
8001f38: f004 fafb bl 8006532 <HAL_GPIO_WritePin>
8001f3c: e048 b.n 8001fd0 <HAL_SYSTICK_Callback+0x3d0>
}else{
if(c1s>=5)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001f3e: 4b36 ldr r3, [pc, #216] @ (8002018 <HAL_SYSTICK_Callback+0x418>)
8001f40: 781b ldrb r3, [r3, #0]
8001f42: 2b04 cmp r3, #4
8001f44: d906 bls.n 8001f54 <HAL_SYSTICK_Callback+0x354>
8001f46: 2200 movs r2, #0
8001f48: f44f 7180 mov.w r1, #256 @ 0x100
8001f4c: 4834 ldr r0, [pc, #208] @ (8002020 <HAL_SYSTICK_Callback+0x420>)
8001f4e: f004 faf0 bl 8006532 <HAL_GPIO_WritePin>
8001f52: e03d b.n 8001fd0 <HAL_SYSTICK_Callback+0x3d0>
8001f54: 2201 movs r2, #1
8001f56: f44f 7180 mov.w r1, #256 @ 0x100
8001f5a: 4831 ldr r0, [pc, #196] @ (8002020 <HAL_SYSTICK_Callback+0x420>)
8001f5c: f004 fae9 bl 8006532 <HAL_GPIO_WritePin>
8001f60: e036 b.n 8001fd0 <HAL_SYSTICK_Callback+0x3d0>
}
}else if(stBuz==bzwarning){
8001f62: 4b2b ldr r3, [pc, #172] @ (8002010 <HAL_SYSTICK_Callback+0x410>)
8001f64: 781b ldrb r3, [r3, #0]
8001f66: b2db uxtb r3, r3
8001f68: 2b02 cmp r3, #2
8001f6a: d12b bne.n 8001fc4 <HAL_SYSTICK_Callback+0x3c4>
if(nobuz){
8001f6c: 4b29 ldr r3, [pc, #164] @ (8002014 <HAL_SYSTICK_Callback+0x414>)
8001f6e: 781b ldrb r3, [r3, #0]
8001f70: 2b00 cmp r3, #0
8001f72: d013 beq.n 8001f9c <HAL_SYSTICK_Callback+0x39c>
if(c1s&2)HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_SET);
8001f74: 4b28 ldr r3, [pc, #160] @ (8002018 <HAL_SYSTICK_Callback+0x418>)
8001f76: 781b ldrb r3, [r3, #0]
8001f78: f003 0302 and.w r3, r3, #2
8001f7c: 2b00 cmp r3, #0
8001f7e: d006 beq.n 8001f8e <HAL_SYSTICK_Callback+0x38e>
8001f80: 2200 movs r2, #0
8001f82: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f86: 4825 ldr r0, [pc, #148] @ (800201c <HAL_SYSTICK_Callback+0x41c>)
8001f88: f004 fad3 bl 8006532 <HAL_GPIO_WritePin>
8001f8c: e020 b.n 8001fd0 <HAL_SYSTICK_Callback+0x3d0>
8001f8e: 2201 movs r2, #1
8001f90: f44f 5100 mov.w r1, #8192 @ 0x2000
8001f94: 4821 ldr r0, [pc, #132] @ (800201c <HAL_SYSTICK_Callback+0x41c>)
8001f96: f004 facc bl 8006532 <HAL_GPIO_WritePin>
8001f9a: e019 b.n 8001fd0 <HAL_SYSTICK_Callback+0x3d0>
}else{
if(c1s&2)HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);else HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_SET);
8001f9c: 4b1e ldr r3, [pc, #120] @ (8002018 <HAL_SYSTICK_Callback+0x418>)
8001f9e: 781b ldrb r3, [r3, #0]
8001fa0: f003 0302 and.w r3, r3, #2
8001fa4: 2b00 cmp r3, #0
8001fa6: d006 beq.n 8001fb6 <HAL_SYSTICK_Callback+0x3b6>
8001fa8: 2200 movs r2, #0
8001faa: f44f 7180 mov.w r1, #256 @ 0x100
8001fae: 481c ldr r0, [pc, #112] @ (8002020 <HAL_SYSTICK_Callback+0x420>)
8001fb0: f004 fabf bl 8006532 <HAL_GPIO_WritePin>
8001fb4: e00c b.n 8001fd0 <HAL_SYSTICK_Callback+0x3d0>
8001fb6: 2201 movs r2, #1
8001fb8: f44f 7180 mov.w r1, #256 @ 0x100
8001fbc: 4818 ldr r0, [pc, #96] @ (8002020 <HAL_SYSTICK_Callback+0x420>)
8001fbe: f004 fab8 bl 8006532 <HAL_GPIO_WritePin>
8001fc2: e005 b.n 8001fd0 <HAL_SYSTICK_Callback+0x3d0>
}
}else{//bzoff
HAL_GPIO_WritePin(GPIOA, BUZ_Pin, GPIO_PIN_RESET);
8001fc4: 2200 movs r2, #0
8001fc6: f44f 7180 mov.w r1, #256 @ 0x100
8001fca: 4815 ldr r0, [pc, #84] @ (8002020 <HAL_SYSTICK_Callback+0x420>)
8001fcc: f004 fab1 bl 8006532 <HAL_GPIO_WritePin>
}
//**************************************************************************************************
if (++c1s >= 10) { // 1 s
8001fd0: 4b11 ldr r3, [pc, #68] @ (8002018 <HAL_SYSTICK_Callback+0x418>)
8001fd2: 781b ldrb r3, [r3, #0]
8001fd4: 3301 adds r3, #1
8001fd6: b2da uxtb r2, r3
8001fd8: 4b0f ldr r3, [pc, #60] @ (8002018 <HAL_SYSTICK_Callback+0x418>)
8001fda: 701a strb r2, [r3, #0]
8001fdc: 4b0e ldr r3, [pc, #56] @ (8002018 <HAL_SYSTICK_Callback+0x418>)
8001fde: 781b ldrb r3, [r3, #0]
8001fe0: 2b09 cmp r3, #9
8001fe2: d902 bls.n 8001fea <HAL_SYSTICK_Callback+0x3ea>
c1s = 0;
8001fe4: 4b0c ldr r3, [pc, #48] @ (8002018 <HAL_SYSTICK_Callback+0x418>)
8001fe6: 2200 movs r2, #0
8001fe8: 701a strb r2, [r3, #0]
//HAL_GPIO_TogglePin(LED2_GPIO_Port, LED2_Pin);
}
}
}
}
8001fea: bf00 nop
8001fec: 3708 adds r7, #8
8001fee: 46bd mov sp, r7
8001ff0: bd80 pop {r7, pc}
8001ff2: bf00 nop
8001ff4: 2000045a .word 0x2000045a
8001ff8: 2000045c .word 0x2000045c
8001ffc: 200003f0 .word 0x200003f0
8002000: 20000460 .word 0x20000460
8002004: 200003f4 .word 0x200003f4
8002008: 200003fc .word 0x200003fc
800200c: 200003fe .word 0x200003fe
8002010: 20000457 .word 0x20000457
8002014: 20000458 .word 0x20000458
8002018: 20000461 .word 0x20000461
800201c: 40011000 .word 0x40011000
8002020: 40010800 .word 0x40010800
08002024 <managePulsanti>:
void managePulsanti(void){
8002024: b580 push {r7, lr}
8002026: af00 add r7, sp, #0
if(pulsanti&INP1){
8002028: 4baa ldr r3, [pc, #680] @ (80022d4 <managePulsanti+0x2b0>)
800202a: 781b ldrb r3, [r3, #0]
800202c: f003 0301 and.w r3, r3, #1
8002030: 2b00 cmp r3, #0
8002032: d013 beq.n 800205c <managePulsanti+0x38>
if(rtP1==0)stPulsanti|=P1START;
8002034: 4ba8 ldr r3, [pc, #672] @ (80022d8 <managePulsanti+0x2b4>)
8002036: 781b ldrb r3, [r3, #0]
8002038: b2db uxtb r3, r3
800203a: 2b00 cmp r3, #0
800203c: d107 bne.n 800204e <managePulsanti+0x2a>
800203e: 4ba7 ldr r3, [pc, #668] @ (80022dc <managePulsanti+0x2b8>)
8002040: 881b ldrh r3, [r3, #0]
8002042: f043 0301 orr.w r3, r3, #1
8002046: b29a uxth r2, r3
8002048: 4ba4 ldr r3, [pc, #656] @ (80022dc <managePulsanti+0x2b8>)
800204a: 801a strh r2, [r3, #0]
800204c: e02f b.n 80020ae <managePulsanti+0x8a>
else{
HAL_GPIO_WritePin(LED2_GPIO_Port,LED2_Pin, GPIO_PIN_SET);
800204e: 2201 movs r2, #1
8002050: f44f 5100 mov.w r1, #8192 @ 0x2000
8002054: 48a2 ldr r0, [pc, #648] @ (80022e0 <managePulsanti+0x2bc>)
8002056: f004 fa6c bl 8006532 <HAL_GPIO_WritePin>
800205a: e028 b.n 80020ae <managePulsanti+0x8a>
}
}else{
if(stPulsanti&P1START){
800205c: 4b9f ldr r3, [pc, #636] @ (80022dc <managePulsanti+0x2b8>)
800205e: 881b ldrh r3, [r3, #0]
8002060: f003 0301 and.w r3, r3, #1
8002064: 2b00 cmp r3, #0
8002066: d00d beq.n 8002084 <managePulsanti+0x60>
stPulsanti&=(~P1START);
8002068: 4b9c ldr r3, [pc, #624] @ (80022dc <managePulsanti+0x2b8>)
800206a: 881b ldrh r3, [r3, #0]
800206c: f023 0301 bic.w r3, r3, #1
8002070: b29a uxth r2, r3
8002072: 4b9a ldr r3, [pc, #616] @ (80022dc <managePulsanti+0x2b8>)
8002074: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port,LED2_Pin, GPIO_PIN_RESET);
8002076: 2200 movs r2, #0
8002078: f44f 5100 mov.w r1, #8192 @ 0x2000
800207c: 4898 ldr r0, [pc, #608] @ (80022e0 <managePulsanti+0x2bc>)
800207e: f004 fa58 bl 8006532 <HAL_GPIO_WritePin>
8002082: e011 b.n 80020a8 <managePulsanti+0x84>
}else if(rtP1<=190){
8002084: 4b94 ldr r3, [pc, #592] @ (80022d8 <managePulsanti+0x2b4>)
8002086: 781b ldrb r3, [r3, #0]
8002088: b2db uxtb r3, r3
800208a: 2bbe cmp r3, #190 @ 0xbe
800208c: d80c bhi.n 80020a8 <managePulsanti+0x84>
stPulsanti|=P1STOP;
800208e: 4b93 ldr r3, [pc, #588] @ (80022dc <managePulsanti+0x2b8>)
8002090: 881b ldrh r3, [r3, #0]
8002092: f043 0302 orr.w r3, r3, #2
8002096: b29a uxth r2, r3
8002098: 4b90 ldr r3, [pc, #576] @ (80022dc <managePulsanti+0x2b8>)
800209a: 801a strh r2, [r3, #0]
HAL_GPIO_WritePin(LED2_GPIO_Port,LED2_Pin, GPIO_PIN_RESET);
800209c: 2200 movs r2, #0
800209e: f44f 5100 mov.w r1, #8192 @ 0x2000
80020a2: 488f ldr r0, [pc, #572] @ (80022e0 <managePulsanti+0x2bc>)
80020a4: f004 fa45 bl 8006532 <HAL_GPIO_WritePin>
}
rtP1=200;
80020a8: 4b8b ldr r3, [pc, #556] @ (80022d8 <managePulsanti+0x2b4>)
80020aa: 22c8 movs r2, #200 @ 0xc8
80020ac: 701a strb r2, [r3, #0]
}
if(pulsanti&INP2){
80020ae: 4b89 ldr r3, [pc, #548] @ (80022d4 <managePulsanti+0x2b0>)
80020b0: 781b ldrb r3, [r3, #0]
80020b2: f003 0302 and.w r3, r3, #2
80020b6: 2b00 cmp r3, #0
80020b8: d00c beq.n 80020d4 <managePulsanti+0xb0>
if(rtP2==0)stPulsanti|=P2START;
80020ba: 4b8a ldr r3, [pc, #552] @ (80022e4 <managePulsanti+0x2c0>)
80020bc: 781b ldrb r3, [r3, #0]
80020be: b2db uxtb r3, r3
80020c0: 2b00 cmp r3, #0
80020c2: d124 bne.n 800210e <managePulsanti+0xea>
80020c4: 4b85 ldr r3, [pc, #532] @ (80022dc <managePulsanti+0x2b8>)
80020c6: 881b ldrh r3, [r3, #0]
80020c8: f043 0304 orr.w r3, r3, #4
80020cc: b29a uxth r2, r3
80020ce: 4b83 ldr r3, [pc, #524] @ (80022dc <managePulsanti+0x2b8>)
80020d0: 801a strh r2, [r3, #0]
80020d2: e01c b.n 800210e <managePulsanti+0xea>
}else{
if(stPulsanti&P2START)stPulsanti&=(~P2START);
80020d4: 4b81 ldr r3, [pc, #516] @ (80022dc <managePulsanti+0x2b8>)
80020d6: 881b ldrh r3, [r3, #0]
80020d8: f003 0304 and.w r3, r3, #4
80020dc: 2b00 cmp r3, #0
80020de: d007 beq.n 80020f0 <managePulsanti+0xcc>
80020e0: 4b7e ldr r3, [pc, #504] @ (80022dc <managePulsanti+0x2b8>)
80020e2: 881b ldrh r3, [r3, #0]
80020e4: f023 0304 bic.w r3, r3, #4
80020e8: b29a uxth r2, r3
80020ea: 4b7c ldr r3, [pc, #496] @ (80022dc <managePulsanti+0x2b8>)
80020ec: 801a strh r2, [r3, #0]
80020ee: e00b b.n 8002108 <managePulsanti+0xe4>
else if(rtP2<=190)stPulsanti|=P2STOP;
80020f0: 4b7c ldr r3, [pc, #496] @ (80022e4 <managePulsanti+0x2c0>)
80020f2: 781b ldrb r3, [r3, #0]
80020f4: b2db uxtb r3, r3
80020f6: 2bbe cmp r3, #190 @ 0xbe
80020f8: d806 bhi.n 8002108 <managePulsanti+0xe4>
80020fa: 4b78 ldr r3, [pc, #480] @ (80022dc <managePulsanti+0x2b8>)
80020fc: 881b ldrh r3, [r3, #0]
80020fe: f043 0308 orr.w r3, r3, #8
8002102: b29a uxth r2, r3
8002104: 4b75 ldr r3, [pc, #468] @ (80022dc <managePulsanti+0x2b8>)
8002106: 801a strh r2, [r3, #0]
rtP2=200;
8002108: 4b76 ldr r3, [pc, #472] @ (80022e4 <managePulsanti+0x2c0>)
800210a: 22c8 movs r2, #200 @ 0xc8
800210c: 701a strb r2, [r3, #0]
}
stPulsanti&=(P1START|P1STOP|P2START|P2STOP);
800210e: 4b73 ldr r3, [pc, #460] @ (80022dc <managePulsanti+0x2b8>)
8002110: 881b ldrh r3, [r3, #0]
8002112: f003 030f and.w r3, r3, #15
8002116: b29a uxth r2, r3
8002118: 4b70 ldr r3, [pc, #448] @ (80022dc <managePulsanti+0x2b8>)
800211a: 801a strh r2, [r3, #0]
if(stPulsanti==0){
800211c: 4b6f ldr r3, [pc, #444] @ (80022dc <managePulsanti+0x2b8>)
800211e: 881b ldrh r3, [r3, #0]
8002120: 2b00 cmp r3, #0
8002122: f040 80d4 bne.w 80022ce <managePulsanti+0x2aa>
switch(pulsanti&0x3c){
8002126: 4b6b ldr r3, [pc, #428] @ (80022d4 <managePulsanti+0x2b0>)
8002128: 781b ldrb r3, [r3, #0]
800212a: f003 033c and.w r3, r3, #60 @ 0x3c
800212e: 2b30 cmp r3, #48 @ 0x30
8002130: f200 80bb bhi.w 80022aa <managePulsanti+0x286>
8002134: a201 add r2, pc, #4 @ (adr r2, 800213c <managePulsanti+0x118>)
8002136: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800213a: bf00 nop
800213c: 08002201 .word 0x08002201
8002140: 080022ab .word 0x080022ab
8002144: 080022ab .word 0x080022ab
8002148: 080022ab .word 0x080022ab
800214c: 0800225d .word 0x0800225d
8002150: 080022ab .word 0x080022ab
8002154: 080022ab .word 0x080022ab
8002158: 080022ab .word 0x080022ab
800215c: 0800220f .word 0x0800220f
8002160: 080022ab .word 0x080022ab
8002164: 080022ab .word 0x080022ab
8002168: 080022ab .word 0x080022ab
800216c: 08002291 .word 0x08002291
8002170: 080022ab .word 0x080022ab
8002174: 080022ab .word 0x080022ab
8002178: 080022ab .word 0x080022ab
800217c: 08002229 .word 0x08002229
8002180: 080022ab .word 0x080022ab
8002184: 080022ab .word 0x080022ab
8002188: 080022ab .word 0x080022ab
800218c: 080022ab .word 0x080022ab
8002190: 080022ab .word 0x080022ab
8002194: 080022ab .word 0x080022ab
8002198: 080022ab .word 0x080022ab
800219c: 080022ab .word 0x080022ab
80021a0: 080022ab .word 0x080022ab
80021a4: 080022ab .word 0x080022ab
80021a8: 080022ab .word 0x080022ab
80021ac: 080022ab .word 0x080022ab
80021b0: 080022ab .word 0x080022ab
80021b4: 080022ab .word 0x080022ab
80021b8: 080022ab .word 0x080022ab
80021bc: 08002243 .word 0x08002243
80021c0: 080022ab .word 0x080022ab
80021c4: 080022ab .word 0x080022ab
80021c8: 080022ab .word 0x080022ab
80021cc: 080022ab .word 0x080022ab
80021d0: 080022ab .word 0x080022ab
80021d4: 080022ab .word 0x080022ab
80021d8: 080022ab .word 0x080022ab
80021dc: 080022ab .word 0x080022ab
80021e0: 080022ab .word 0x080022ab
80021e4: 080022ab .word 0x080022ab
80021e8: 080022ab .word 0x080022ab
80021ec: 080022ab .word 0x080022ab
80021f0: 080022ab .word 0x080022ab
80021f4: 080022ab .word 0x080022ab
80021f8: 080022ab .word 0x080022ab
80021fc: 08002277 .word 0x08002277
case 0x00:
rtTLC=100;
8002200: 4b39 ldr r3, [pc, #228] @ (80022e8 <managePulsanti+0x2c4>)
8002202: 2264 movs r2, #100 @ 0x64
8002204: 701a strb r2, [r3, #0]
stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW));
8002206: 4b35 ldr r3, [pc, #212] @ (80022dc <managePulsanti+0x2b8>)
8002208: 2200 movs r2, #0
800220a: 801a strh r2, [r3, #0]
break;
800220c: e05f b.n 80022ce <managePulsanti+0x2aa>
case 0x08://tlc1
if(rtTLC==0)stPulsanti|=M1FW;
800220e: 4b36 ldr r3, [pc, #216] @ (80022e8 <managePulsanti+0x2c4>)
8002210: 781b ldrb r3, [r3, #0]
8002212: b2db uxtb r3, r3
8002214: 2b00 cmp r3, #0
8002216: d14f bne.n 80022b8 <managePulsanti+0x294>
8002218: 4b30 ldr r3, [pc, #192] @ (80022dc <managePulsanti+0x2b8>)
800221a: 881b ldrh r3, [r3, #0]
800221c: f043 0310 orr.w r3, r3, #16
8002220: b29a uxth r2, r3
8002222: 4b2e ldr r3, [pc, #184] @ (80022dc <managePulsanti+0x2b8>)
8002224: 801a strh r2, [r3, #0]
break;
8002226: e047 b.n 80022b8 <managePulsanti+0x294>
case 0x10://tlc2
if(rtTLC==0)stPulsanti|=M1BW;
8002228: 4b2f ldr r3, [pc, #188] @ (80022e8 <managePulsanti+0x2c4>)
800222a: 781b ldrb r3, [r3, #0]
800222c: b2db uxtb r3, r3
800222e: 2b00 cmp r3, #0
8002230: d144 bne.n 80022bc <managePulsanti+0x298>
8002232: 4b2a ldr r3, [pc, #168] @ (80022dc <managePulsanti+0x2b8>)
8002234: 881b ldrh r3, [r3, #0]
8002236: f043 0320 orr.w r3, r3, #32
800223a: b29a uxth r2, r3
800223c: 4b27 ldr r3, [pc, #156] @ (80022dc <managePulsanti+0x2b8>)
800223e: 801a strh r2, [r3, #0]
break;
8002240: e03c b.n 80022bc <managePulsanti+0x298>
case 0x20://tlc3
if(rtTLC==0)stPulsanti|=M3FW;
8002242: 4b29 ldr r3, [pc, #164] @ (80022e8 <managePulsanti+0x2c4>)
8002244: 781b ldrb r3, [r3, #0]
8002246: b2db uxtb r3, r3
8002248: 2b00 cmp r3, #0
800224a: d139 bne.n 80022c0 <managePulsanti+0x29c>
800224c: 4b23 ldr r3, [pc, #140] @ (80022dc <managePulsanti+0x2b8>)
800224e: 881b ldrh r3, [r3, #0]
8002250: f443 7380 orr.w r3, r3, #256 @ 0x100
8002254: b29a uxth r2, r3
8002256: 4b21 ldr r3, [pc, #132] @ (80022dc <managePulsanti+0x2b8>)
8002258: 801a strh r2, [r3, #0]
break;
800225a: e031 b.n 80022c0 <managePulsanti+0x29c>
case 0x04://tlc4
if(rtTLC==0)stPulsanti|=M3BW;
800225c: 4b22 ldr r3, [pc, #136] @ (80022e8 <managePulsanti+0x2c4>)
800225e: 781b ldrb r3, [r3, #0]
8002260: b2db uxtb r3, r3
8002262: 2b00 cmp r3, #0
8002264: d12e bne.n 80022c4 <managePulsanti+0x2a0>
8002266: 4b1d ldr r3, [pc, #116] @ (80022dc <managePulsanti+0x2b8>)
8002268: 881b ldrh r3, [r3, #0]
800226a: f443 7300 orr.w r3, r3, #512 @ 0x200
800226e: b29a uxth r2, r3
8002270: 4b1a ldr r3, [pc, #104] @ (80022dc <managePulsanti+0x2b8>)
8002272: 801a strh r2, [r3, #0]
break;
8002274: e026 b.n 80022c4 <managePulsanti+0x2a0>
case 0x30://tlc5
if(rtTLC==0)stPulsanti|=M4FW;
8002276: 4b1c ldr r3, [pc, #112] @ (80022e8 <managePulsanti+0x2c4>)
8002278: 781b ldrb r3, [r3, #0]
800227a: b2db uxtb r3, r3
800227c: 2b00 cmp r3, #0
800227e: d123 bne.n 80022c8 <managePulsanti+0x2a4>
8002280: 4b16 ldr r3, [pc, #88] @ (80022dc <managePulsanti+0x2b8>)
8002282: 881b ldrh r3, [r3, #0]
8002284: f443 6380 orr.w r3, r3, #1024 @ 0x400
8002288: b29a uxth r2, r3
800228a: 4b14 ldr r3, [pc, #80] @ (80022dc <managePulsanti+0x2b8>)
800228c: 801a strh r2, [r3, #0]
break;
800228e: e01b b.n 80022c8 <managePulsanti+0x2a4>
case 0x0c://tlc6
if(rtTLC==0)stPulsanti|=M4BW;
8002290: 4b15 ldr r3, [pc, #84] @ (80022e8 <managePulsanti+0x2c4>)
8002292: 781b ldrb r3, [r3, #0]
8002294: b2db uxtb r3, r3
8002296: 2b00 cmp r3, #0
8002298: d118 bne.n 80022cc <managePulsanti+0x2a8>
800229a: 4b10 ldr r3, [pc, #64] @ (80022dc <managePulsanti+0x2b8>)
800229c: 881b ldrh r3, [r3, #0]
800229e: f443 6300 orr.w r3, r3, #2048 @ 0x800
80022a2: b29a uxth r2, r3
80022a4: 4b0d ldr r3, [pc, #52] @ (80022dc <managePulsanti+0x2b8>)
80022a6: 801a strh r2, [r3, #0]
break;
80022a8: e010 b.n 80022cc <managePulsanti+0x2a8>
default:
rtTLC=100;
80022aa: 4b0f ldr r3, [pc, #60] @ (80022e8 <managePulsanti+0x2c4>)
80022ac: 2264 movs r2, #100 @ 0x64
80022ae: 701a strb r2, [r3, #0]
stPulsanti&=(!(M1FW|M1BW|M3FW|M3BW|M4FW|M4BW));
80022b0: 4b0a ldr r3, [pc, #40] @ (80022dc <managePulsanti+0x2b8>)
80022b2: 2200 movs r2, #0
80022b4: 801a strh r2, [r3, #0]
break;
80022b6: e00a b.n 80022ce <managePulsanti+0x2aa>
break;
80022b8: bf00 nop
80022ba: e008 b.n 80022ce <managePulsanti+0x2aa>
break;
80022bc: bf00 nop
80022be: e006 b.n 80022ce <managePulsanti+0x2aa>
break;
80022c0: bf00 nop
80022c2: e004 b.n 80022ce <managePulsanti+0x2aa>
break;
80022c4: bf00 nop
80022c6: e002 b.n 80022ce <managePulsanti+0x2aa>
break;
80022c8: bf00 nop
80022ca: e000 b.n 80022ce <managePulsanti+0x2aa>
break;
80022cc: bf00 nop
}
}
}
80022ce: bf00 nop
80022d0: bd80 pop {r7, pc}
80022d2: bf00 nop
80022d4: 200003f0 .word 0x200003f0
80022d8: 20000004 .word 0x20000004
80022dc: 20000454 .word 0x20000454
80022e0: 40011000 .word 0x40011000
80022e4: 20000005 .word 0x20000005
80022e8: 20000006 .word 0x20000006
080022ec <manageCiclo>:
void manageCiclo(void){
80022ec: b580 push {r7, lr}
80022ee: b084 sub sp, #16
80022f0: af02 add r7, sp, #8
motMov_st m1,m2,m3,m4;
switch(stCiclo){
80022f2: 4b9f ldr r3, [pc, #636] @ (8002570 <manageCiclo+0x284>)
80022f4: 781b ldrb r3, [r3, #0]
80022f6: 2b18 cmp r3, #24
80022f8: f200 85ec bhi.w 8002ed4 <manageCiclo+0xbe8>
80022fc: a201 add r2, pc, #4 @ (adr r2, 8002304 <manageCiclo+0x18>)
80022fe: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8002302: bf00 nop
8002304: 08002369 .word 0x08002369
8002308: 080023b3 .word 0x080023b3
800230c: 080023fd .word 0x080023fd
8002310: 08002447 .word 0x08002447
8002314: 08002491 .word 0x08002491
8002318: 080024db .word 0x080024db
800231c: 08002525 .word 0x08002525
8002320: 0800259d .word 0x0800259d
8002324: 080025e7 .word 0x080025e7
8002328: 08002631 .word 0x08002631
800232c: 0800267b .word 0x0800267b
8002330: 080026c3 .word 0x080026c3
8002334: 0800270b .word 0x0800270b
8002338: 08002753 .word 0x08002753
800233c: 0800279b .word 0x0800279b
8002340: 08002811 .word 0x08002811
8002344: 08002859 .word 0x08002859
8002348: 080028a1 .word 0x080028a1
800234c: 08002909 .word 0x08002909
8002350: 0800298b .word 0x0800298b
8002354: 08002a01 .word 0x08002a01
8002358: 08002d9d .word 0x08002d9d
800235c: 08002a65 .word 0x08002a65
8002360: 08002cfb .word 0x08002cfb
8002364: 08002dff .word 0x08002dff
case omchiuso:
if(stPulsanti&P1START){
8002368: 4b82 ldr r3, [pc, #520] @ (8002574 <manageCiclo+0x288>)
800236a: 881b ldrh r3, [r3, #0]
800236c: f003 0301 and.w r3, r3, #1
8002370: 2b00 cmp r3, #0
8002372: d012 beq.n 800239a <manageCiclo+0xae>
stBuz=bzwarning;
8002374: 4b80 ldr r3, [pc, #512] @ (8002578 <manageCiclo+0x28c>)
8002376: 2202 movs r2, #2
8002378: 701a strb r2, [r3, #0]
rtCiclo=0;
800237a: 4b80 ldr r3, [pc, #512] @ (800257c <manageCiclo+0x290>)
800237c: 2200 movs r2, #0
800237e: 801a strh r2, [r3, #0]
stCiclo=omapertura0;
8002380: 4b7b ldr r3, [pc, #492] @ (8002570 <manageCiclo+0x284>)
8002382: 2212 movs r2, #18
8002384: 701a strb r2, [r3, #0]
(void)m1ap();(void)m2ap();(void)m3ap();(void)m4ap();
8002386: f001 f927 bl 80035d8 <m1ap>
800238a: f001 f9f7 bl 800377c <m2ap>
800238e: f001 fac7 bl 8003920 <m3ap>
8002392: f001 fb99 bl 8003ac8 <m4ap>
}else if(stPulsanti&P1STOP)stCiclo=omstopapertura;
break;
8002396: f000 bd6c b.w 8002e72 <manageCiclo+0xb86>
}else if(stPulsanti&P1STOP)stCiclo=omstopapertura;
800239a: 4b76 ldr r3, [pc, #472] @ (8002574 <manageCiclo+0x288>)
800239c: 881b ldrh r3, [r3, #0]
800239e: f003 0302 and.w r3, r3, #2
80023a2: 2b00 cmp r3, #0
80023a4: f000 8565 beq.w 8002e72 <manageCiclo+0xb86>
80023a8: 4b71 ldr r3, [pc, #452] @ (8002570 <manageCiclo+0x284>)
80023aa: 2213 movs r2, #19
80023ac: 701a strb r2, [r3, #0]
break;
80023ae: f000 bd60 b.w 8002e72 <manageCiclo+0xb86>
case omM1fw1:
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
80023b2: 4b73 ldr r3, [pc, #460] @ (8002580 <manageCiclo+0x294>)
80023b4: 881b ldrh r3, [r3, #0]
80023b6: b2da uxtb r2, r3
80023b8: 4b72 ldr r3, [pc, #456] @ (8002584 <manageCiclo+0x298>)
80023ba: 881b ldrh r3, [r3, #0]
80023bc: b2d9 uxtb r1, r3
80023be: 4b72 ldr r3, [pc, #456] @ (8002588 <manageCiclo+0x29c>)
80023c0: 881b ldrh r3, [r3, #0]
80023c2: b2db uxtb r3, r3
80023c4: 200a movs r0, #10
80023c6: 9001 str r0, [sp, #4]
80023c8: 9300 str r3, [sp, #0]
80023ca: 460b mov r3, r1
80023cc: 2100 movs r1, #0
80023ce: 2001 movs r0, #1
80023d0: f002 fb00 bl 80049d4 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
80023d4: 4b69 ldr r3, [pc, #420] @ (800257c <manageCiclo+0x290>)
80023d6: 881b ldrh r3, [r3, #0]
80023d8: b29a uxth r2, r3
80023da: 4b6c ldr r3, [pc, #432] @ (800258c <manageCiclo+0x2a0>)
80023dc: 881b ldrh r3, [r3, #0]
80023de: 429a cmp r2, r3
80023e0: d302 bcc.n 80023e8 <manageCiclo+0xfc>
80023e2: 4b63 ldr r3, [pc, #396] @ (8002570 <manageCiclo+0x284>)
80023e4: 2211 movs r2, #17
80023e6: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM1fw2;
80023e8: 4b69 ldr r3, [pc, #420] @ (8002590 <manageCiclo+0x2a4>)
80023ea: 781b ldrb r3, [r3, #0]
80023ec: 2b00 cmp r3, #0
80023ee: f040 8542 bne.w 8002e76 <manageCiclo+0xb8a>
80023f2: 4b5f ldr r3, [pc, #380] @ (8002570 <manageCiclo+0x284>)
80023f4: 2202 movs r2, #2
80023f6: 701a strb r2, [r3, #0]
break;
80023f8: f000 bd3d b.w 8002e76 <manageCiclo+0xb8a>
case omM1fw2:
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
80023fc: 4b60 ldr r3, [pc, #384] @ (8002580 <manageCiclo+0x294>)
80023fe: 881b ldrh r3, [r3, #0]
8002400: b2da uxtb r2, r3
8002402: 4b60 ldr r3, [pc, #384] @ (8002584 <manageCiclo+0x298>)
8002404: 881b ldrh r3, [r3, #0]
8002406: b2d9 uxtb r1, r3
8002408: 4b5f ldr r3, [pc, #380] @ (8002588 <manageCiclo+0x29c>)
800240a: 881b ldrh r3, [r3, #0]
800240c: b2db uxtb r3, r3
800240e: 200a movs r0, #10
8002410: 9001 str r0, [sp, #4]
8002412: 9300 str r3, [sp, #0]
8002414: 460b mov r3, r1
8002416: 2100 movs r1, #0
8002418: 2001 movs r0, #1
800241a: f002 fadb bl 80049d4 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
800241e: 4b57 ldr r3, [pc, #348] @ (800257c <manageCiclo+0x290>)
8002420: 881b ldrh r3, [r3, #0]
8002422: b29a uxth r2, r3
8002424: 4b59 ldr r3, [pc, #356] @ (800258c <manageCiclo+0x2a0>)
8002426: 881b ldrh r3, [r3, #0]
8002428: 429a cmp r2, r3
800242a: d302 bcc.n 8002432 <manageCiclo+0x146>
800242c: 4b50 ldr r3, [pc, #320] @ (8002570 <manageCiclo+0x284>)
800242e: 2211 movs r2, #17
8002430: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8002432: 4b57 ldr r3, [pc, #348] @ (8002590 <manageCiclo+0x2a4>)
8002434: 781b ldrb r3, [r3, #0]
8002436: 2b00 cmp r3, #0
8002438: f000 851f beq.w 8002e7a <manageCiclo+0xb8e>
800243c: 4b4c ldr r3, [pc, #304] @ (8002570 <manageCiclo+0x284>)
800243e: 2211 movs r2, #17
8002440: 701a strb r2, [r3, #0]
break;
8002442: f000 bd1a b.w 8002e7a <manageCiclo+0xb8e>
case omM1bw1:
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8002446: 4b4e ldr r3, [pc, #312] @ (8002580 <manageCiclo+0x294>)
8002448: 881b ldrh r3, [r3, #0]
800244a: b2da uxtb r2, r3
800244c: 4b4d ldr r3, [pc, #308] @ (8002584 <manageCiclo+0x298>)
800244e: 881b ldrh r3, [r3, #0]
8002450: b2d9 uxtb r1, r3
8002452: 4b4d ldr r3, [pc, #308] @ (8002588 <manageCiclo+0x29c>)
8002454: 881b ldrh r3, [r3, #0]
8002456: b2db uxtb r3, r3
8002458: 200a movs r0, #10
800245a: 9001 str r0, [sp, #4]
800245c: 9300 str r3, [sp, #0]
800245e: 460b mov r3, r1
8002460: 2101 movs r1, #1
8002462: 2001 movs r0, #1
8002464: f002 fab6 bl 80049d4 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
8002468: 4b44 ldr r3, [pc, #272] @ (800257c <manageCiclo+0x290>)
800246a: 881b ldrh r3, [r3, #0]
800246c: b29a uxth r2, r3
800246e: 4b47 ldr r3, [pc, #284] @ (800258c <manageCiclo+0x2a0>)
8002470: 881b ldrh r3, [r3, #0]
8002472: 429a cmp r2, r3
8002474: d302 bcc.n 800247c <manageCiclo+0x190>
8002476: 4b3e ldr r3, [pc, #248] @ (8002570 <manageCiclo+0x284>)
8002478: 2211 movs r2, #17
800247a: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM1bw2;
800247c: 4b44 ldr r3, [pc, #272] @ (8002590 <manageCiclo+0x2a4>)
800247e: 781b ldrb r3, [r3, #0]
8002480: 2b00 cmp r3, #0
8002482: f040 84fc bne.w 8002e7e <manageCiclo+0xb92>
8002486: 4b3a ldr r3, [pc, #232] @ (8002570 <manageCiclo+0x284>)
8002488: 2204 movs r2, #4
800248a: 701a strb r2, [r3, #0]
break;
800248c: f000 bcf7 b.w 8002e7e <manageCiclo+0xb92>
case omM1bw2:
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPRUN);
8002490: 4b3b ldr r3, [pc, #236] @ (8002580 <manageCiclo+0x294>)
8002492: 881b ldrh r3, [r3, #0]
8002494: b2da uxtb r2, r3
8002496: 4b3b ldr r3, [pc, #236] @ (8002584 <manageCiclo+0x298>)
8002498: 881b ldrh r3, [r3, #0]
800249a: b2d9 uxtb r1, r3
800249c: 4b3a ldr r3, [pc, #232] @ (8002588 <manageCiclo+0x29c>)
800249e: 881b ldrh r3, [r3, #0]
80024a0: b2db uxtb r3, r3
80024a2: 200a movs r0, #10
80024a4: 9001 str r0, [sp, #4]
80024a6: 9300 str r3, [sp, #0]
80024a8: 460b mov r3, r1
80024aa: 2101 movs r1, #1
80024ac: 2001 movs r0, #1
80024ae: f002 fa91 bl 80049d4 <ramp>
if(rtCiclo>=m1TimeoutMan)stCiclo=omStopMan;
80024b2: 4b32 ldr r3, [pc, #200] @ (800257c <manageCiclo+0x290>)
80024b4: 881b ldrh r3, [r3, #0]
80024b6: b29a uxth r2, r3
80024b8: 4b34 ldr r3, [pc, #208] @ (800258c <manageCiclo+0x2a0>)
80024ba: 881b ldrh r3, [r3, #0]
80024bc: 429a cmp r2, r3
80024be: d302 bcc.n 80024c6 <manageCiclo+0x1da>
80024c0: 4b2b ldr r3, [pc, #172] @ (8002570 <manageCiclo+0x284>)
80024c2: 2211 movs r2, #17
80024c4: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80024c6: 4b32 ldr r3, [pc, #200] @ (8002590 <manageCiclo+0x2a4>)
80024c8: 781b ldrb r3, [r3, #0]
80024ca: 2b00 cmp r3, #0
80024cc: f000 84d9 beq.w 8002e82 <manageCiclo+0xb96>
80024d0: 4b27 ldr r3, [pc, #156] @ (8002570 <manageCiclo+0x284>)
80024d2: 2211 movs r2, #17
80024d4: 701a strb r2, [r3, #0]
break;
80024d6: f000 bcd4 b.w 8002e82 <manageCiclo+0xb96>
case omM2fw1:
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
80024da: 4b29 ldr r3, [pc, #164] @ (8002580 <manageCiclo+0x294>)
80024dc: 885b ldrh r3, [r3, #2]
80024de: b2da uxtb r2, r3
80024e0: 4b2c ldr r3, [pc, #176] @ (8002594 <manageCiclo+0x2a8>)
80024e2: 881b ldrh r3, [r3, #0]
80024e4: b2d9 uxtb r1, r3
80024e6: 4b28 ldr r3, [pc, #160] @ (8002588 <manageCiclo+0x29c>)
80024e8: 881b ldrh r3, [r3, #0]
80024ea: b2db uxtb r3, r3
80024ec: 200a movs r0, #10
80024ee: 9001 str r0, [sp, #4]
80024f0: 9300 str r3, [sp, #0]
80024f2: 460b mov r3, r1
80024f4: 2100 movs r1, #0
80024f6: 2002 movs r0, #2
80024f8: f002 fa6c bl 80049d4 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
80024fc: 4b1f ldr r3, [pc, #124] @ (800257c <manageCiclo+0x290>)
80024fe: 881b ldrh r3, [r3, #0]
8002500: b29a uxth r2, r3
8002502: 4b25 ldr r3, [pc, #148] @ (8002598 <manageCiclo+0x2ac>)
8002504: 881b ldrh r3, [r3, #0]
8002506: 429a cmp r2, r3
8002508: d302 bcc.n 8002510 <manageCiclo+0x224>
800250a: 4b19 ldr r3, [pc, #100] @ (8002570 <manageCiclo+0x284>)
800250c: 2211 movs r2, #17
800250e: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM2fw2;
8002510: 4b1f ldr r3, [pc, #124] @ (8002590 <manageCiclo+0x2a4>)
8002512: 781b ldrb r3, [r3, #0]
8002514: 2b00 cmp r3, #0
8002516: f040 84b6 bne.w 8002e86 <manageCiclo+0xb9a>
800251a: 4b15 ldr r3, [pc, #84] @ (8002570 <manageCiclo+0x284>)
800251c: 2206 movs r2, #6
800251e: 701a strb r2, [r3, #0]
break;
8002520: f000 bcb1 b.w 8002e86 <manageCiclo+0xb9a>
case omM2fw2:
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
8002524: 4b16 ldr r3, [pc, #88] @ (8002580 <manageCiclo+0x294>)
8002526: 885b ldrh r3, [r3, #2]
8002528: b2da uxtb r2, r3
800252a: 4b1a ldr r3, [pc, #104] @ (8002594 <manageCiclo+0x2a8>)
800252c: 881b ldrh r3, [r3, #0]
800252e: b2d9 uxtb r1, r3
8002530: 4b15 ldr r3, [pc, #84] @ (8002588 <manageCiclo+0x29c>)
8002532: 881b ldrh r3, [r3, #0]
8002534: b2db uxtb r3, r3
8002536: 200a movs r0, #10
8002538: 9001 str r0, [sp, #4]
800253a: 9300 str r3, [sp, #0]
800253c: 460b mov r3, r1
800253e: 2100 movs r1, #0
8002540: 2002 movs r0, #2
8002542: f002 fa47 bl 80049d4 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
8002546: 4b0d ldr r3, [pc, #52] @ (800257c <manageCiclo+0x290>)
8002548: 881b ldrh r3, [r3, #0]
800254a: b29a uxth r2, r3
800254c: 4b12 ldr r3, [pc, #72] @ (8002598 <manageCiclo+0x2ac>)
800254e: 881b ldrh r3, [r3, #0]
8002550: 429a cmp r2, r3
8002552: d302 bcc.n 800255a <manageCiclo+0x26e>
8002554: 4b06 ldr r3, [pc, #24] @ (8002570 <manageCiclo+0x284>)
8002556: 2211 movs r2, #17
8002558: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800255a: 4b0d ldr r3, [pc, #52] @ (8002590 <manageCiclo+0x2a4>)
800255c: 781b ldrb r3, [r3, #0]
800255e: 2b00 cmp r3, #0
8002560: f000 8493 beq.w 8002e8a <manageCiclo+0xb9e>
8002564: 4b02 ldr r3, [pc, #8] @ (8002570 <manageCiclo+0x284>)
8002566: 2211 movs r2, #17
8002568: 701a strb r2, [r3, #0]
break;
800256a: f000 bc8e b.w 8002e8a <manageCiclo+0xb9e>
800256e: bf00 nop
8002570: 20000456 .word 0x20000456
8002574: 20000454 .word 0x20000454
8002578: 20000457 .word 0x20000457
800257c: 200003fc .word 0x200003fc
8002580: 2000044c .word 0x2000044c
8002584: 20000420 .word 0x20000420
8002588: 2000041e .word 0x2000041e
800258c: 20000410 .word 0x20000410
8002590: 200003f0 .word 0x200003f0
8002594: 20000422 .word 0x20000422
8002598: 20000412 .word 0x20000412
case omM2bw1:
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
800259c: 4b91 ldr r3, [pc, #580] @ (80027e4 <manageCiclo+0x4f8>)
800259e: 885b ldrh r3, [r3, #2]
80025a0: b2da uxtb r2, r3
80025a2: 4b91 ldr r3, [pc, #580] @ (80027e8 <manageCiclo+0x4fc>)
80025a4: 881b ldrh r3, [r3, #0]
80025a6: b2d9 uxtb r1, r3
80025a8: 4b90 ldr r3, [pc, #576] @ (80027ec <manageCiclo+0x500>)
80025aa: 881b ldrh r3, [r3, #0]
80025ac: b2db uxtb r3, r3
80025ae: 200a movs r0, #10
80025b0: 9001 str r0, [sp, #4]
80025b2: 9300 str r3, [sp, #0]
80025b4: 460b mov r3, r1
80025b6: 2101 movs r1, #1
80025b8: 2002 movs r0, #2
80025ba: f002 fa0b bl 80049d4 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
80025be: 4b8c ldr r3, [pc, #560] @ (80027f0 <manageCiclo+0x504>)
80025c0: 881b ldrh r3, [r3, #0]
80025c2: b29a uxth r2, r3
80025c4: 4b8b ldr r3, [pc, #556] @ (80027f4 <manageCiclo+0x508>)
80025c6: 881b ldrh r3, [r3, #0]
80025c8: 429a cmp r2, r3
80025ca: d302 bcc.n 80025d2 <manageCiclo+0x2e6>
80025cc: 4b8a ldr r3, [pc, #552] @ (80027f8 <manageCiclo+0x50c>)
80025ce: 2211 movs r2, #17
80025d0: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM2bw2;
80025d2: 4b8a ldr r3, [pc, #552] @ (80027fc <manageCiclo+0x510>)
80025d4: 781b ldrb r3, [r3, #0]
80025d6: 2b00 cmp r3, #0
80025d8: f040 8459 bne.w 8002e8e <manageCiclo+0xba2>
80025dc: 4b86 ldr r3, [pc, #536] @ (80027f8 <manageCiclo+0x50c>)
80025de: 2208 movs r2, #8
80025e0: 701a strb r2, [r3, #0]
break;
80025e2: f000 bc54 b.w 8002e8e <manageCiclo+0xba2>
case omM2bw2:
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPRUN);
80025e6: 4b7f ldr r3, [pc, #508] @ (80027e4 <manageCiclo+0x4f8>)
80025e8: 885b ldrh r3, [r3, #2]
80025ea: b2da uxtb r2, r3
80025ec: 4b7e ldr r3, [pc, #504] @ (80027e8 <manageCiclo+0x4fc>)
80025ee: 881b ldrh r3, [r3, #0]
80025f0: b2d9 uxtb r1, r3
80025f2: 4b7e ldr r3, [pc, #504] @ (80027ec <manageCiclo+0x500>)
80025f4: 881b ldrh r3, [r3, #0]
80025f6: b2db uxtb r3, r3
80025f8: 200a movs r0, #10
80025fa: 9001 str r0, [sp, #4]
80025fc: 9300 str r3, [sp, #0]
80025fe: 460b mov r3, r1
8002600: 2101 movs r1, #1
8002602: 2002 movs r0, #2
8002604: f002 f9e6 bl 80049d4 <ramp>
if(rtCiclo>=m2TimeoutMan)stCiclo=omStopMan;
8002608: 4b79 ldr r3, [pc, #484] @ (80027f0 <manageCiclo+0x504>)
800260a: 881b ldrh r3, [r3, #0]
800260c: b29a uxth r2, r3
800260e: 4b79 ldr r3, [pc, #484] @ (80027f4 <manageCiclo+0x508>)
8002610: 881b ldrh r3, [r3, #0]
8002612: 429a cmp r2, r3
8002614: d302 bcc.n 800261c <manageCiclo+0x330>
8002616: 4b78 ldr r3, [pc, #480] @ (80027f8 <manageCiclo+0x50c>)
8002618: 2211 movs r2, #17
800261a: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800261c: 4b77 ldr r3, [pc, #476] @ (80027fc <manageCiclo+0x510>)
800261e: 781b ldrb r3, [r3, #0]
8002620: 2b00 cmp r3, #0
8002622: f000 8436 beq.w 8002e92 <manageCiclo+0xba6>
8002626: 4b74 ldr r3, [pc, #464] @ (80027f8 <manageCiclo+0x50c>)
8002628: 2211 movs r2, #17
800262a: 701a strb r2, [r3, #0]
break;
800262c: f000 bc31 b.w 8002e92 <manageCiclo+0xba6>
case omM3fw1:
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
8002630: 4b6c ldr r3, [pc, #432] @ (80027e4 <manageCiclo+0x4f8>)
8002632: 889b ldrh r3, [r3, #4]
8002634: b2da uxtb r2, r3
8002636: 4b72 ldr r3, [pc, #456] @ (8002800 <manageCiclo+0x514>)
8002638: 881b ldrh r3, [r3, #0]
800263a: b2d9 uxtb r1, r3
800263c: 4b6b ldr r3, [pc, #428] @ (80027ec <manageCiclo+0x500>)
800263e: 881b ldrh r3, [r3, #0]
8002640: b2db uxtb r3, r3
8002642: 200a movs r0, #10
8002644: 9001 str r0, [sp, #4]
8002646: 9300 str r3, [sp, #0]
8002648: 460b mov r3, r1
800264a: 2100 movs r1, #0
800264c: 2003 movs r0, #3
800264e: f002 f9c1 bl 80049d4 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
8002652: 4b67 ldr r3, [pc, #412] @ (80027f0 <manageCiclo+0x504>)
8002654: 881b ldrh r3, [r3, #0]
8002656: b29a uxth r2, r3
8002658: 4b6a ldr r3, [pc, #424] @ (8002804 <manageCiclo+0x518>)
800265a: 881b ldrh r3, [r3, #0]
800265c: 429a cmp r2, r3
800265e: d302 bcc.n 8002666 <manageCiclo+0x37a>
8002660: 4b65 ldr r3, [pc, #404] @ (80027f8 <manageCiclo+0x50c>)
8002662: 2211 movs r2, #17
8002664: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM3fw2;
8002666: 4b65 ldr r3, [pc, #404] @ (80027fc <manageCiclo+0x510>)
8002668: 781b ldrb r3, [r3, #0]
800266a: 2b00 cmp r3, #0
800266c: f040 8413 bne.w 8002e96 <manageCiclo+0xbaa>
8002670: 4b61 ldr r3, [pc, #388] @ (80027f8 <manageCiclo+0x50c>)
8002672: 220a movs r2, #10
8002674: 701a strb r2, [r3, #0]
break;
8002676: f000 bc0e b.w 8002e96 <manageCiclo+0xbaa>
case omM3fw2:
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
800267a: 4b5a ldr r3, [pc, #360] @ (80027e4 <manageCiclo+0x4f8>)
800267c: 889b ldrh r3, [r3, #4]
800267e: b2da uxtb r2, r3
8002680: 4b5f ldr r3, [pc, #380] @ (8002800 <manageCiclo+0x514>)
8002682: 881b ldrh r3, [r3, #0]
8002684: b2d9 uxtb r1, r3
8002686: 4b59 ldr r3, [pc, #356] @ (80027ec <manageCiclo+0x500>)
8002688: 881b ldrh r3, [r3, #0]
800268a: b2db uxtb r3, r3
800268c: 200a movs r0, #10
800268e: 9001 str r0, [sp, #4]
8002690: 9300 str r3, [sp, #0]
8002692: 460b mov r3, r1
8002694: 2100 movs r1, #0
8002696: 2003 movs r0, #3
8002698: f002 f99c bl 80049d4 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
800269c: 4b54 ldr r3, [pc, #336] @ (80027f0 <manageCiclo+0x504>)
800269e: 881b ldrh r3, [r3, #0]
80026a0: b29a uxth r2, r3
80026a2: 4b58 ldr r3, [pc, #352] @ (8002804 <manageCiclo+0x518>)
80026a4: 881b ldrh r3, [r3, #0]
80026a6: 429a cmp r2, r3
80026a8: d302 bcc.n 80026b0 <manageCiclo+0x3c4>
80026aa: 4b53 ldr r3, [pc, #332] @ (80027f8 <manageCiclo+0x50c>)
80026ac: 2211 movs r2, #17
80026ae: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80026b0: 4b52 ldr r3, [pc, #328] @ (80027fc <manageCiclo+0x510>)
80026b2: 781b ldrb r3, [r3, #0]
80026b4: 2b00 cmp r3, #0
80026b6: f000 83f0 beq.w 8002e9a <manageCiclo+0xbae>
80026ba: 4b4f ldr r3, [pc, #316] @ (80027f8 <manageCiclo+0x50c>)
80026bc: 2211 movs r2, #17
80026be: 701a strb r2, [r3, #0]
break;
80026c0: e3eb b.n 8002e9a <manageCiclo+0xbae>
case omM3bw1:
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
80026c2: 4b48 ldr r3, [pc, #288] @ (80027e4 <manageCiclo+0x4f8>)
80026c4: 889b ldrh r3, [r3, #4]
80026c6: b2da uxtb r2, r3
80026c8: 4b4d ldr r3, [pc, #308] @ (8002800 <manageCiclo+0x514>)
80026ca: 881b ldrh r3, [r3, #0]
80026cc: b2d9 uxtb r1, r3
80026ce: 4b47 ldr r3, [pc, #284] @ (80027ec <manageCiclo+0x500>)
80026d0: 881b ldrh r3, [r3, #0]
80026d2: b2db uxtb r3, r3
80026d4: 200a movs r0, #10
80026d6: 9001 str r0, [sp, #4]
80026d8: 9300 str r3, [sp, #0]
80026da: 460b mov r3, r1
80026dc: 2101 movs r1, #1
80026de: 2003 movs r0, #3
80026e0: f002 f978 bl 80049d4 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
80026e4: 4b42 ldr r3, [pc, #264] @ (80027f0 <manageCiclo+0x504>)
80026e6: 881b ldrh r3, [r3, #0]
80026e8: b29a uxth r2, r3
80026ea: 4b46 ldr r3, [pc, #280] @ (8002804 <manageCiclo+0x518>)
80026ec: 881b ldrh r3, [r3, #0]
80026ee: 429a cmp r2, r3
80026f0: d302 bcc.n 80026f8 <manageCiclo+0x40c>
80026f2: 4b41 ldr r3, [pc, #260] @ (80027f8 <manageCiclo+0x50c>)
80026f4: 2211 movs r2, #17
80026f6: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM3bw2;
80026f8: 4b40 ldr r3, [pc, #256] @ (80027fc <manageCiclo+0x510>)
80026fa: 781b ldrb r3, [r3, #0]
80026fc: 2b00 cmp r3, #0
80026fe: f040 83ce bne.w 8002e9e <manageCiclo+0xbb2>
8002702: 4b3d ldr r3, [pc, #244] @ (80027f8 <manageCiclo+0x50c>)
8002704: 220c movs r2, #12
8002706: 701a strb r2, [r3, #0]
break;
8002708: e3c9 b.n 8002e9e <manageCiclo+0xbb2>
case omM3bw2:
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPRUN);
800270a: 4b36 ldr r3, [pc, #216] @ (80027e4 <manageCiclo+0x4f8>)
800270c: 889b ldrh r3, [r3, #4]
800270e: b2da uxtb r2, r3
8002710: 4b3b ldr r3, [pc, #236] @ (8002800 <manageCiclo+0x514>)
8002712: 881b ldrh r3, [r3, #0]
8002714: b2d9 uxtb r1, r3
8002716: 4b35 ldr r3, [pc, #212] @ (80027ec <manageCiclo+0x500>)
8002718: 881b ldrh r3, [r3, #0]
800271a: b2db uxtb r3, r3
800271c: 200a movs r0, #10
800271e: 9001 str r0, [sp, #4]
8002720: 9300 str r3, [sp, #0]
8002722: 460b mov r3, r1
8002724: 2101 movs r1, #1
8002726: 2003 movs r0, #3
8002728: f002 f954 bl 80049d4 <ramp>
if(rtCiclo>=m3TimeoutMan)stCiclo=omStopMan;
800272c: 4b30 ldr r3, [pc, #192] @ (80027f0 <manageCiclo+0x504>)
800272e: 881b ldrh r3, [r3, #0]
8002730: b29a uxth r2, r3
8002732: 4b34 ldr r3, [pc, #208] @ (8002804 <manageCiclo+0x518>)
8002734: 881b ldrh r3, [r3, #0]
8002736: 429a cmp r2, r3
8002738: d302 bcc.n 8002740 <manageCiclo+0x454>
800273a: 4b2f ldr r3, [pc, #188] @ (80027f8 <manageCiclo+0x50c>)
800273c: 2211 movs r2, #17
800273e: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
8002740: 4b2e ldr r3, [pc, #184] @ (80027fc <manageCiclo+0x510>)
8002742: 781b ldrb r3, [r3, #0]
8002744: 2b00 cmp r3, #0
8002746: f000 83ac beq.w 8002ea2 <manageCiclo+0xbb6>
800274a: 4b2b ldr r3, [pc, #172] @ (80027f8 <manageCiclo+0x50c>)
800274c: 2211 movs r2, #17
800274e: 701a strb r2, [r3, #0]
break;
8002750: e3a7 b.n 8002ea2 <manageCiclo+0xbb6>
case omM4fw1:
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002752: 4b24 ldr r3, [pc, #144] @ (80027e4 <manageCiclo+0x4f8>)
8002754: 88db ldrh r3, [r3, #6]
8002756: b2da uxtb r2, r3
8002758: 4b2b ldr r3, [pc, #172] @ (8002808 <manageCiclo+0x51c>)
800275a: 881b ldrh r3, [r3, #0]
800275c: b2d9 uxtb r1, r3
800275e: 4b23 ldr r3, [pc, #140] @ (80027ec <manageCiclo+0x500>)
8002760: 881b ldrh r3, [r3, #0]
8002762: b2db uxtb r3, r3
8002764: 200a movs r0, #10
8002766: 9001 str r0, [sp, #4]
8002768: 9300 str r3, [sp, #0]
800276a: 460b mov r3, r1
800276c: 2100 movs r1, #0
800276e: 2004 movs r0, #4
8002770: f002 f930 bl 80049d4 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
8002774: 4b1e ldr r3, [pc, #120] @ (80027f0 <manageCiclo+0x504>)
8002776: 881b ldrh r3, [r3, #0]
8002778: b29a uxth r2, r3
800277a: 4b24 ldr r3, [pc, #144] @ (800280c <manageCiclo+0x520>)
800277c: 881b ldrh r3, [r3, #0]
800277e: 429a cmp r2, r3
8002780: d302 bcc.n 8002788 <manageCiclo+0x49c>
8002782: 4b1d ldr r3, [pc, #116] @ (80027f8 <manageCiclo+0x50c>)
8002784: 2211 movs r2, #17
8002786: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM4fw2;
8002788: 4b1c ldr r3, [pc, #112] @ (80027fc <manageCiclo+0x510>)
800278a: 781b ldrb r3, [r3, #0]
800278c: 2b00 cmp r3, #0
800278e: f040 838a bne.w 8002ea6 <manageCiclo+0xbba>
8002792: 4b19 ldr r3, [pc, #100] @ (80027f8 <manageCiclo+0x50c>)
8002794: 220e movs r2, #14
8002796: 701a strb r2, [r3, #0]
break;
8002798: e385 b.n 8002ea6 <manageCiclo+0xbba>
case omM4fw2:
(void)ramp(M4,FW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
800279a: 4b12 ldr r3, [pc, #72] @ (80027e4 <manageCiclo+0x4f8>)
800279c: 88db ldrh r3, [r3, #6]
800279e: b2da uxtb r2, r3
80027a0: 4b19 ldr r3, [pc, #100] @ (8002808 <manageCiclo+0x51c>)
80027a2: 881b ldrh r3, [r3, #0]
80027a4: b2d9 uxtb r1, r3
80027a6: 4b11 ldr r3, [pc, #68] @ (80027ec <manageCiclo+0x500>)
80027a8: 881b ldrh r3, [r3, #0]
80027aa: b2db uxtb r3, r3
80027ac: 200a movs r0, #10
80027ae: 9001 str r0, [sp, #4]
80027b0: 9300 str r3, [sp, #0]
80027b2: 460b mov r3, r1
80027b4: 2100 movs r1, #0
80027b6: 2004 movs r0, #4
80027b8: f002 f90c bl 80049d4 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
80027bc: 4b0c ldr r3, [pc, #48] @ (80027f0 <manageCiclo+0x504>)
80027be: 881b ldrh r3, [r3, #0]
80027c0: b29a uxth r2, r3
80027c2: 4b12 ldr r3, [pc, #72] @ (800280c <manageCiclo+0x520>)
80027c4: 881b ldrh r3, [r3, #0]
80027c6: 429a cmp r2, r3
80027c8: d302 bcc.n 80027d0 <manageCiclo+0x4e4>
80027ca: 4b0b ldr r3, [pc, #44] @ (80027f8 <manageCiclo+0x50c>)
80027cc: 2211 movs r2, #17
80027ce: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
80027d0: 4b0a ldr r3, [pc, #40] @ (80027fc <manageCiclo+0x510>)
80027d2: 781b ldrb r3, [r3, #0]
80027d4: 2b00 cmp r3, #0
80027d6: f000 8368 beq.w 8002eaa <manageCiclo+0xbbe>
80027da: 4b07 ldr r3, [pc, #28] @ (80027f8 <manageCiclo+0x50c>)
80027dc: 2211 movs r2, #17
80027de: 701a strb r2, [r3, #0]
break;
80027e0: e363 b.n 8002eaa <manageCiclo+0xbbe>
80027e2: bf00 nop
80027e4: 2000044c .word 0x2000044c
80027e8: 20000422 .word 0x20000422
80027ec: 2000041e .word 0x2000041e
80027f0: 200003fc .word 0x200003fc
80027f4: 20000412 .word 0x20000412
80027f8: 20000456 .word 0x20000456
80027fc: 200003f0 .word 0x200003f0
8002800: 20000424 .word 0x20000424
8002804: 20000414 .word 0x20000414
8002808: 20000426 .word 0x20000426
800280c: 20000416 .word 0x20000416
case omM4bw1:
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002810: 4bb4 ldr r3, [pc, #720] @ (8002ae4 <manageCiclo+0x7f8>)
8002812: 88db ldrh r3, [r3, #6]
8002814: b2da uxtb r2, r3
8002816: 4bb4 ldr r3, [pc, #720] @ (8002ae8 <manageCiclo+0x7fc>)
8002818: 881b ldrh r3, [r3, #0]
800281a: b2d9 uxtb r1, r3
800281c: 4bb3 ldr r3, [pc, #716] @ (8002aec <manageCiclo+0x800>)
800281e: 881b ldrh r3, [r3, #0]
8002820: b2db uxtb r3, r3
8002822: 200a movs r0, #10
8002824: 9001 str r0, [sp, #4]
8002826: 9300 str r3, [sp, #0]
8002828: 460b mov r3, r1
800282a: 2101 movs r1, #1
800282c: 2004 movs r0, #4
800282e: f002 f8d1 bl 80049d4 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
8002832: 4baf ldr r3, [pc, #700] @ (8002af0 <manageCiclo+0x804>)
8002834: 881b ldrh r3, [r3, #0]
8002836: b29a uxth r2, r3
8002838: 4bae ldr r3, [pc, #696] @ (8002af4 <manageCiclo+0x808>)
800283a: 881b ldrh r3, [r3, #0]
800283c: 429a cmp r2, r3
800283e: d302 bcc.n 8002846 <manageCiclo+0x55a>
8002840: 4bad ldr r3, [pc, #692] @ (8002af8 <manageCiclo+0x80c>)
8002842: 2211 movs r2, #17
8002844: 701a strb r2, [r3, #0]
if(pulsanti==0)stCiclo=omM4bw2;
8002846: 4bad ldr r3, [pc, #692] @ (8002afc <manageCiclo+0x810>)
8002848: 781b ldrb r3, [r3, #0]
800284a: 2b00 cmp r3, #0
800284c: f040 832f bne.w 8002eae <manageCiclo+0xbc2>
8002850: 4ba9 ldr r3, [pc, #676] @ (8002af8 <manageCiclo+0x80c>)
8002852: 2210 movs r2, #16
8002854: 701a strb r2, [r3, #0]
break;
8002856: e32a b.n 8002eae <manageCiclo+0xbc2>
case omM4bw2:
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmMan,trampman,RAMPRUN);
8002858: 4ba2 ldr r3, [pc, #648] @ (8002ae4 <manageCiclo+0x7f8>)
800285a: 88db ldrh r3, [r3, #6]
800285c: b2da uxtb r2, r3
800285e: 4ba2 ldr r3, [pc, #648] @ (8002ae8 <manageCiclo+0x7fc>)
8002860: 881b ldrh r3, [r3, #0]
8002862: b2d9 uxtb r1, r3
8002864: 4ba1 ldr r3, [pc, #644] @ (8002aec <manageCiclo+0x800>)
8002866: 881b ldrh r3, [r3, #0]
8002868: b2db uxtb r3, r3
800286a: 200a movs r0, #10
800286c: 9001 str r0, [sp, #4]
800286e: 9300 str r3, [sp, #0]
8002870: 460b mov r3, r1
8002872: 2101 movs r1, #1
8002874: 2004 movs r0, #4
8002876: f002 f8ad bl 80049d4 <ramp>
if(rtCiclo>=m4TimeoutMan)stCiclo=omStopMan;
800287a: 4b9d ldr r3, [pc, #628] @ (8002af0 <manageCiclo+0x804>)
800287c: 881b ldrh r3, [r3, #0]
800287e: b29a uxth r2, r3
8002880: 4b9c ldr r3, [pc, #624] @ (8002af4 <manageCiclo+0x808>)
8002882: 881b ldrh r3, [r3, #0]
8002884: 429a cmp r2, r3
8002886: d302 bcc.n 800288e <manageCiclo+0x5a2>
8002888: 4b9b ldr r3, [pc, #620] @ (8002af8 <manageCiclo+0x80c>)
800288a: 2211 movs r2, #17
800288c: 701a strb r2, [r3, #0]
if(pulsanti)stCiclo=omStopMan;
800288e: 4b9b ldr r3, [pc, #620] @ (8002afc <manageCiclo+0x810>)
8002890: 781b ldrb r3, [r3, #0]
8002892: 2b00 cmp r3, #0
8002894: f000 830d beq.w 8002eb2 <manageCiclo+0xbc6>
8002898: 4b97 ldr r3, [pc, #604] @ (8002af8 <manageCiclo+0x80c>)
800289a: 2211 movs r2, #17
800289c: 701a strb r2, [r3, #0]
break;
800289e: e308 b.n 8002eb2 <manageCiclo+0xbc6>
case omStopMan:
SetMotPerc(M1,FW,0);
80028a0: 2200 movs r2, #0
80028a2: 2100 movs r1, #0
80028a4: 2001 movs r0, #1
80028a6: f001 ff15 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,FW,0);
80028aa: 2200 movs r2, #0
80028ac: 2100 movs r1, #0
80028ae: 2002 movs r0, #2
80028b0: f001 ff10 bl 80046d4 <SetMotPerc>
SetMotPerc(M3,FW,0);
80028b4: 2200 movs r2, #0
80028b6: 2100 movs r1, #0
80028b8: 2003 movs r0, #3
80028ba: f001 ff0b bl 80046d4 <SetMotPerc>
SetMotPerc(M4,FW,0);
80028be: 2200 movs r2, #0
80028c0: 2100 movs r1, #0
80028c2: 2004 movs r0, #4
80028c4: f001 ff06 bl 80046d4 <SetMotPerc>
SetMotPerc(M1,BW,0);
80028c8: 2200 movs r2, #0
80028ca: 2101 movs r1, #1
80028cc: 2001 movs r0, #1
80028ce: f001 ff01 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,BW,0);
80028d2: 2200 movs r2, #0
80028d4: 2101 movs r1, #1
80028d6: 2002 movs r0, #2
80028d8: f001 fefc bl 80046d4 <SetMotPerc>
SetMotPerc(M3,BW,0);
80028dc: 2200 movs r2, #0
80028de: 2101 movs r1, #1
80028e0: 2003 movs r0, #3
80028e2: f001 fef7 bl 80046d4 <SetMotPerc>
SetMotPerc(M4,BW,0);
80028e6: 2200 movs r2, #0
80028e8: 2101 movs r1, #1
80028ea: 2004 movs r0, #4
80028ec: f001 fef2 bl 80046d4 <SetMotPerc>
if(pulsanti==0){
80028f0: 4b82 ldr r3, [pc, #520] @ (8002afc <manageCiclo+0x810>)
80028f2: 781b ldrb r3, [r3, #0]
80028f4: 2b00 cmp r3, #0
80028f6: f040 82de bne.w 8002eb6 <manageCiclo+0xbca>
stBuz=bzoff;
80028fa: 4b81 ldr r3, [pc, #516] @ (8002b00 <manageCiclo+0x814>)
80028fc: 2200 movs r2, #0
80028fe: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8002900: 4b7d ldr r3, [pc, #500] @ (8002af8 <manageCiclo+0x80c>)
8002902: 2216 movs r2, #22
8002904: 701a strb r2, [r3, #0]
}
break;
8002906: e2d6 b.n 8002eb6 <manageCiclo+0xbca>
case omapertura0:
if(rtCiclo>=30){//doppo 3 secondi
8002908: 4b79 ldr r3, [pc, #484] @ (8002af0 <manageCiclo+0x804>)
800290a: 881b ldrh r3, [r3, #0]
800290c: b29b uxth r3, r3
800290e: 2b1d cmp r3, #29
8002910: d924 bls.n 800295c <manageCiclo+0x670>
stBuz=bzmoving;
8002912: 4b7b ldr r3, [pc, #492] @ (8002b00 <manageCiclo+0x814>)
8002914: 2201 movs r2, #1
8002916: 701a strb r2, [r3, #0]
m1=m1ap();m2=m2ap();m3=m3ap();m4=m4ap();
8002918: f000 fe5e bl 80035d8 <m1ap>
800291c: 4603 mov r3, r0
800291e: 71fb strb r3, [r7, #7]
8002920: f000 ff2c bl 800377c <m2ap>
8002924: 4603 mov r3, r0
8002926: 71bb strb r3, [r7, #6]
8002928: f000 fffa bl 8003920 <m3ap>
800292c: 4603 mov r3, r0
800292e: 717b strb r3, [r7, #5]
8002930: f001 f8ca bl 8003ac8 <m4ap>
8002934: 4603 mov r3, r0
8002936: 713b strb r3, [r7, #4]
if((m1==motStop)&&(m2==motStop)&&(m3==motStop)&&(m4==motStop)){
8002938: 79fb ldrb r3, [r7, #7]
800293a: 2b04 cmp r3, #4
800293c: d10e bne.n 800295c <manageCiclo+0x670>
800293e: 79bb ldrb r3, [r7, #6]
8002940: 2b04 cmp r3, #4
8002942: d10b bne.n 800295c <manageCiclo+0x670>
8002944: 797b ldrb r3, [r7, #5]
8002946: 2b04 cmp r3, #4
8002948: d108 bne.n 800295c <manageCiclo+0x670>
800294a: 793b ldrb r3, [r7, #4]
800294c: 2b04 cmp r3, #4
800294e: d105 bne.n 800295c <manageCiclo+0x670>
stBuz=bzoff;
8002950: 4b6b ldr r3, [pc, #428] @ (8002b00 <manageCiclo+0x814>)
8002952: 2200 movs r2, #0
8002954: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8002956: 4b68 ldr r3, [pc, #416] @ (8002af8 <manageCiclo+0x80c>)
8002958: 2216 movs r2, #22
800295a: 701a strb r2, [r3, #0]
}
}
if(stPulsanti&P1STOP)stCiclo=omstopapertura;
800295c: 4b69 ldr r3, [pc, #420] @ (8002b04 <manageCiclo+0x818>)
800295e: 881b ldrh r3, [r3, #0]
8002960: f003 0302 and.w r3, r3, #2
8002964: 2b00 cmp r3, #0
8002966: d002 beq.n 800296e <manageCiclo+0x682>
8002968: 4b63 ldr r3, [pc, #396] @ (8002af8 <manageCiclo+0x80c>)
800296a: 2213 movs r2, #19
800296c: 701a strb r2, [r3, #0]
if(stPulsanti&P1START){
800296e: 4b65 ldr r3, [pc, #404] @ (8002b04 <manageCiclo+0x818>)
8002970: 881b ldrh r3, [r3, #0]
8002972: f003 0301 and.w r3, r3, #1
8002976: 2b00 cmp r3, #0
8002978: f000 829f beq.w 8002eba <manageCiclo+0xbce>
stCiclo=omstoprestartchiusura;
800297c: 4b5e ldr r3, [pc, #376] @ (8002af8 <manageCiclo+0x80c>)
800297e: 2214 movs r2, #20
8002980: 701a strb r2, [r3, #0]
rtCiclo=0;
8002982: 4b5b ldr r3, [pc, #364] @ (8002af0 <manageCiclo+0x804>)
8002984: 2200 movs r2, #0
8002986: 801a strh r2, [r3, #0]
}
break;
8002988: e297 b.n 8002eba <manageCiclo+0xbce>
case omstopapertura:
SetMotPerc(M1,FW,0);
800298a: 2200 movs r2, #0
800298c: 2100 movs r1, #0
800298e: 2001 movs r0, #1
8002990: f001 fea0 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,FW,0);
8002994: 2200 movs r2, #0
8002996: 2100 movs r1, #0
8002998: 2002 movs r0, #2
800299a: f001 fe9b bl 80046d4 <SetMotPerc>
SetMotPerc(M3,FW,0);
800299e: 2200 movs r2, #0
80029a0: 2100 movs r1, #0
80029a2: 2003 movs r0, #3
80029a4: f001 fe96 bl 80046d4 <SetMotPerc>
SetMotPerc(M4,FW,0);
80029a8: 2200 movs r2, #0
80029aa: 2100 movs r1, #0
80029ac: 2004 movs r0, #4
80029ae: f001 fe91 bl 80046d4 <SetMotPerc>
SetMotPerc(M1,BW,0);
80029b2: 2200 movs r2, #0
80029b4: 2101 movs r1, #1
80029b6: 2001 movs r0, #1
80029b8: f001 fe8c bl 80046d4 <SetMotPerc>
SetMotPerc(M2,BW,0);
80029bc: 2200 movs r2, #0
80029be: 2101 movs r1, #1
80029c0: 2002 movs r0, #2
80029c2: f001 fe87 bl 80046d4 <SetMotPerc>
SetMotPerc(M3,BW,0);
80029c6: 2200 movs r2, #0
80029c8: 2101 movs r1, #1
80029ca: 2003 movs r0, #3
80029cc: f001 fe82 bl 80046d4 <SetMotPerc>
SetMotPerc(M4,BW,0); if(pulsanti==0){
80029d0: 2200 movs r2, #0
80029d2: 2101 movs r1, #1
80029d4: 2004 movs r0, #4
80029d6: f001 fe7d bl 80046d4 <SetMotPerc>
80029da: 4b48 ldr r3, [pc, #288] @ (8002afc <manageCiclo+0x810>)
80029dc: 781b ldrb r3, [r3, #0]
80029de: 2b00 cmp r3, #0
80029e0: f040 826d bne.w 8002ebe <manageCiclo+0xbd2>
stBuz=bzoff;
80029e4: 4b46 ldr r3, [pc, #280] @ (8002b00 <manageCiclo+0x814>)
80029e6: 2200 movs r2, #0
80029e8: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
80029ea: 4b43 ldr r3, [pc, #268] @ (8002af8 <manageCiclo+0x80c>)
80029ec: 2200 movs r2, #0
80029ee: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
80029f0: 4b44 ldr r3, [pc, #272] @ (8002b04 <manageCiclo+0x818>)
80029f2: 881b ldrh r3, [r3, #0]
80029f4: f023 0302 bic.w r3, r3, #2
80029f8: b29a uxth r2, r3
80029fa: 4b42 ldr r3, [pc, #264] @ (8002b04 <manageCiclo+0x818>)
80029fc: 801a strh r2, [r3, #0]
}
break;
80029fe: e25e b.n 8002ebe <manageCiclo+0xbd2>
case omstoprestartchiusura:
SetMotPerc(M1,FW,0);
8002a00: 2200 movs r2, #0
8002a02: 2100 movs r1, #0
8002a04: 2001 movs r0, #1
8002a06: f001 fe65 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,FW,0);
8002a0a: 2200 movs r2, #0
8002a0c: 2100 movs r1, #0
8002a0e: 2002 movs r0, #2
8002a10: f001 fe60 bl 80046d4 <SetMotPerc>
SetMotPerc(M3,FW,0);
8002a14: 2200 movs r2, #0
8002a16: 2100 movs r1, #0
8002a18: 2003 movs r0, #3
8002a1a: f001 fe5b bl 80046d4 <SetMotPerc>
SetMotPerc(M4,FW,0);
8002a1e: 2200 movs r2, #0
8002a20: 2100 movs r1, #0
8002a22: 2004 movs r0, #4
8002a24: f001 fe56 bl 80046d4 <SetMotPerc>
SetMotPerc(M1,BW,0);
8002a28: 2200 movs r2, #0
8002a2a: 2101 movs r1, #1
8002a2c: 2001 movs r0, #1
8002a2e: f001 fe51 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,BW,0);
8002a32: 2200 movs r2, #0
8002a34: 2101 movs r1, #1
8002a36: 2002 movs r0, #2
8002a38: f001 fe4c bl 80046d4 <SetMotPerc>
SetMotPerc(M3,BW,0);
8002a3c: 2200 movs r2, #0
8002a3e: 2101 movs r1, #1
8002a40: 2003 movs r0, #3
8002a42: f001 fe47 bl 80046d4 <SetMotPerc>
SetMotPerc(M4,BW,0);
8002a46: 2200 movs r2, #0
8002a48: 2101 movs r1, #1
8002a4a: 2004 movs r0, #4
8002a4c: f001 fe42 bl 80046d4 <SetMotPerc>
if(rtCiclo>=20)stCiclo=omaperto;
8002a50: 4b27 ldr r3, [pc, #156] @ (8002af0 <manageCiclo+0x804>)
8002a52: 881b ldrh r3, [r3, #0]
8002a54: b29b uxth r3, r3
8002a56: 2b13 cmp r3, #19
8002a58: f240 8233 bls.w 8002ec2 <manageCiclo+0xbd6>
8002a5c: 4b26 ldr r3, [pc, #152] @ (8002af8 <manageCiclo+0x80c>)
8002a5e: 2216 movs r2, #22
8002a60: 701a strb r2, [r3, #0]
break;
8002a62: e22e b.n 8002ec2 <manageCiclo+0xbd6>
case omaperto:
rtCiclo=0;
8002a64: 4b22 ldr r3, [pc, #136] @ (8002af0 <manageCiclo+0x804>)
8002a66: 2200 movs r2, #0
8002a68: 801a strh r2, [r3, #0]
if(stPulsanti&P1START){
8002a6a: 4b26 ldr r3, [pc, #152] @ (8002b04 <manageCiclo+0x818>)
8002a6c: 881b ldrh r3, [r3, #0]
8002a6e: f003 0301 and.w r3, r3, #1
8002a72: 2b00 cmp r3, #0
8002a74: d00d beq.n 8002a92 <manageCiclo+0x7a6>
stBuz=bzmoving;
8002a76: 4b22 ldr r3, [pc, #136] @ (8002b00 <manageCiclo+0x814>)
8002a78: 2201 movs r2, #1
8002a7a: 701a strb r2, [r3, #0]
//(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
stCiclo=omchiusura1;
8002a7c: 4b1e ldr r3, [pc, #120] @ (8002af8 <manageCiclo+0x80c>)
8002a7e: 2217 movs r2, #23
8002a80: 701a strb r2, [r3, #0]
(void)m1ch();(void)m2ch();(void)m3ch();(void)m4ch();
8002a82: f001 f8f5 bl 8003c70 <m1ch>
8002a86: f001 f9c5 bl 8003e14 <m2ch>
8002a8a: f001 fa95 bl 8003fb8 <m3ch>
8002a8e: f001 fb67 bl 8004160 <m4ch>
}
if(ch8>thanem){
8002a92: 4b1d ldr r3, [pc, #116] @ (8002b08 <manageCiclo+0x81c>)
8002a94: 881a ldrh r2, [r3, #0]
8002a96: 4b1d ldr r3, [pc, #116] @ (8002b0c <manageCiclo+0x820>)
8002a98: 881b ldrh r3, [r3, #0]
8002a9a: 429a cmp r2, r3
8002a9c: d913 bls.n 8002ac6 <manageCiclo+0x7da>
if(rtAnem==0){
8002a9e: 4b1c ldr r3, [pc, #112] @ (8002b10 <manageCiclo+0x824>)
8002aa0: 881b ldrh r3, [r3, #0]
8002aa2: b29b uxth r3, r3
8002aa4: 2b00 cmp r3, #0
8002aa6: d112 bne.n 8002ace <manageCiclo+0x7e2>
stBuz=bzmoving;
8002aa8: 4b15 ldr r3, [pc, #84] @ (8002b00 <manageCiclo+0x814>)
8002aaa: 2201 movs r2, #1
8002aac: 701a strb r2, [r3, #0]
stCiclo=omchiusura1;
8002aae: 4b12 ldr r3, [pc, #72] @ (8002af8 <manageCiclo+0x80c>)
8002ab0: 2217 movs r2, #23
8002ab2: 701a strb r2, [r3, #0]
(void)m1ch();(void)m2ch();(void)m3ch();(void)m4ch();
8002ab4: f001 f8dc bl 8003c70 <m1ch>
8002ab8: f001 f9ac bl 8003e14 <m2ch>
8002abc: f001 fa7c bl 8003fb8 <m3ch>
8002ac0: f001 fb4e bl 8004160 <m4ch>
8002ac4: e003 b.n 8002ace <manageCiclo+0x7e2>
}
}else rtAnem=tanem;
8002ac6: 4b13 ldr r3, [pc, #76] @ (8002b14 <manageCiclo+0x828>)
8002ac8: 881a ldrh r2, [r3, #0]
8002aca: 4b11 ldr r3, [pc, #68] @ (8002b10 <manageCiclo+0x824>)
8002acc: 801a strh r2, [r3, #0]
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8002ace: 4b0d ldr r3, [pc, #52] @ (8002b04 <manageCiclo+0x818>)
8002ad0: 881b ldrh r3, [r3, #0]
8002ad2: f003 0302 and.w r3, r3, #2
8002ad6: 2b00 cmp r3, #0
8002ad8: d01e beq.n 8002b18 <manageCiclo+0x82c>
8002ada: 4b07 ldr r3, [pc, #28] @ (8002af8 <manageCiclo+0x80c>)
8002adc: 2218 movs r2, #24
8002ade: 701a strb r2, [r3, #0]
}else if(stPulsanti&M4BW){
stBuz=bzmoving;
(void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
stCiclo=omM4bw1;
}
break;
8002ae0: e1f1 b.n 8002ec6 <manageCiclo+0xbda>
8002ae2: bf00 nop
8002ae4: 2000044c .word 0x2000044c
8002ae8: 20000426 .word 0x20000426
8002aec: 2000041e .word 0x2000041e
8002af0: 200003fc .word 0x200003fc
8002af4: 20000416 .word 0x20000416
8002af8: 20000456 .word 0x20000456
8002afc: 200003f0 .word 0x200003f0
8002b00: 20000457 .word 0x20000457
8002b04: 20000454 .word 0x20000454
8002b08: 20000232 .word 0x20000232
8002b0c: 2000041c .word 0x2000041c
8002b10: 200003fe .word 0x200003fe
8002b14: 2000041a .word 0x2000041a
else if(stPulsanti&M1FW){
8002b18: 4b97 ldr r3, [pc, #604] @ (8002d78 <manageCiclo+0xa8c>)
8002b1a: 881b ldrh r3, [r3, #0]
8002b1c: f003 0310 and.w r3, r3, #16
8002b20: 2b00 cmp r3, #0
8002b22: d017 beq.n 8002b54 <manageCiclo+0x868>
stBuz=bzmoving;
8002b24: 4b95 ldr r3, [pc, #596] @ (8002d7c <manageCiclo+0xa90>)
8002b26: 2201 movs r2, #1
8002b28: 701a strb r2, [r3, #0]
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT);
8002b2a: 4b95 ldr r3, [pc, #596] @ (8002d80 <manageCiclo+0xa94>)
8002b2c: 881b ldrh r3, [r3, #0]
8002b2e: b2da uxtb r2, r3
8002b30: 4b94 ldr r3, [pc, #592] @ (8002d84 <manageCiclo+0xa98>)
8002b32: 881b ldrh r3, [r3, #0]
8002b34: b2d9 uxtb r1, r3
8002b36: 4b94 ldr r3, [pc, #592] @ (8002d88 <manageCiclo+0xa9c>)
8002b38: 881b ldrh r3, [r3, #0]
8002b3a: b2db uxtb r3, r3
8002b3c: 2000 movs r0, #0
8002b3e: 9001 str r0, [sp, #4]
8002b40: 9300 str r3, [sp, #0]
8002b42: 460b mov r3, r1
8002b44: 2100 movs r1, #0
8002b46: 2001 movs r0, #1
8002b48: f001 ff44 bl 80049d4 <ramp>
stCiclo=omM1fw1;
8002b4c: 4b8f ldr r3, [pc, #572] @ (8002d8c <manageCiclo+0xaa0>)
8002b4e: 2201 movs r2, #1
8002b50: 701a strb r2, [r3, #0]
break;
8002b52: e1b8 b.n 8002ec6 <manageCiclo+0xbda>
}else if(stPulsanti&M1BW){
8002b54: 4b88 ldr r3, [pc, #544] @ (8002d78 <manageCiclo+0xa8c>)
8002b56: 881b ldrh r3, [r3, #0]
8002b58: f003 0320 and.w r3, r3, #32
8002b5c: 2b00 cmp r3, #0
8002b5e: d017 beq.n 8002b90 <manageCiclo+0x8a4>
stBuz=bzmoving;
8002b60: 4b86 ldr r3, [pc, #536] @ (8002d7c <manageCiclo+0xa90>)
8002b62: 2201 movs r2, #1
8002b64: 701a strb r2, [r3, #0]
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmMan,trampman,RAMPINIT);
8002b66: 4b86 ldr r3, [pc, #536] @ (8002d80 <manageCiclo+0xa94>)
8002b68: 881b ldrh r3, [r3, #0]
8002b6a: b2da uxtb r2, r3
8002b6c: 4b85 ldr r3, [pc, #532] @ (8002d84 <manageCiclo+0xa98>)
8002b6e: 881b ldrh r3, [r3, #0]
8002b70: b2d9 uxtb r1, r3
8002b72: 4b85 ldr r3, [pc, #532] @ (8002d88 <manageCiclo+0xa9c>)
8002b74: 881b ldrh r3, [r3, #0]
8002b76: b2db uxtb r3, r3
8002b78: 2000 movs r0, #0
8002b7a: 9001 str r0, [sp, #4]
8002b7c: 9300 str r3, [sp, #0]
8002b7e: 460b mov r3, r1
8002b80: 2101 movs r1, #1
8002b82: 2001 movs r0, #1
8002b84: f001 ff26 bl 80049d4 <ramp>
stCiclo=omM1bw1;
8002b88: 4b80 ldr r3, [pc, #512] @ (8002d8c <manageCiclo+0xaa0>)
8002b8a: 2203 movs r2, #3
8002b8c: 701a strb r2, [r3, #0]
break;
8002b8e: e19a b.n 8002ec6 <manageCiclo+0xbda>
}else if(stPulsanti&M2FW){
8002b90: 4b79 ldr r3, [pc, #484] @ (8002d78 <manageCiclo+0xa8c>)
8002b92: 881b ldrh r3, [r3, #0]
8002b94: f003 0340 and.w r3, r3, #64 @ 0x40
8002b98: 2b00 cmp r3, #0
8002b9a: d017 beq.n 8002bcc <manageCiclo+0x8e0>
stBuz=bzmoving;
8002b9c: 4b77 ldr r3, [pc, #476] @ (8002d7c <manageCiclo+0xa90>)
8002b9e: 2201 movs r2, #1
8002ba0: 701a strb r2, [r3, #0]
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT);
8002ba2: 4b77 ldr r3, [pc, #476] @ (8002d80 <manageCiclo+0xa94>)
8002ba4: 885b ldrh r3, [r3, #2]
8002ba6: b2da uxtb r2, r3
8002ba8: 4b79 ldr r3, [pc, #484] @ (8002d90 <manageCiclo+0xaa4>)
8002baa: 881b ldrh r3, [r3, #0]
8002bac: b2d9 uxtb r1, r3
8002bae: 4b76 ldr r3, [pc, #472] @ (8002d88 <manageCiclo+0xa9c>)
8002bb0: 881b ldrh r3, [r3, #0]
8002bb2: b2db uxtb r3, r3
8002bb4: 2000 movs r0, #0
8002bb6: 9001 str r0, [sp, #4]
8002bb8: 9300 str r3, [sp, #0]
8002bba: 460b mov r3, r1
8002bbc: 2100 movs r1, #0
8002bbe: 2002 movs r0, #2
8002bc0: f001 ff08 bl 80049d4 <ramp>
stCiclo=omM2fw1;
8002bc4: 4b71 ldr r3, [pc, #452] @ (8002d8c <manageCiclo+0xaa0>)
8002bc6: 2205 movs r2, #5
8002bc8: 701a strb r2, [r3, #0]
break;
8002bca: e17c b.n 8002ec6 <manageCiclo+0xbda>
}else if(stPulsanti&M2BW){
8002bcc: 4b6a ldr r3, [pc, #424] @ (8002d78 <manageCiclo+0xa8c>)
8002bce: 881b ldrh r3, [r3, #0]
8002bd0: f003 0380 and.w r3, r3, #128 @ 0x80
8002bd4: 2b00 cmp r3, #0
8002bd6: d017 beq.n 8002c08 <manageCiclo+0x91c>
stBuz=bzmoving;
8002bd8: 4b68 ldr r3, [pc, #416] @ (8002d7c <manageCiclo+0xa90>)
8002bda: 2201 movs r2, #1
8002bdc: 701a strb r2, [r3, #0]
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmMan,trampman,RAMPINIT);
8002bde: 4b68 ldr r3, [pc, #416] @ (8002d80 <manageCiclo+0xa94>)
8002be0: 885b ldrh r3, [r3, #2]
8002be2: b2da uxtb r2, r3
8002be4: 4b6a ldr r3, [pc, #424] @ (8002d90 <manageCiclo+0xaa4>)
8002be6: 881b ldrh r3, [r3, #0]
8002be8: b2d9 uxtb r1, r3
8002bea: 4b67 ldr r3, [pc, #412] @ (8002d88 <manageCiclo+0xa9c>)
8002bec: 881b ldrh r3, [r3, #0]
8002bee: b2db uxtb r3, r3
8002bf0: 2000 movs r0, #0
8002bf2: 9001 str r0, [sp, #4]
8002bf4: 9300 str r3, [sp, #0]
8002bf6: 460b mov r3, r1
8002bf8: 2101 movs r1, #1
8002bfa: 2002 movs r0, #2
8002bfc: f001 feea bl 80049d4 <ramp>
stCiclo=omM2bw1;
8002c00: 4b62 ldr r3, [pc, #392] @ (8002d8c <manageCiclo+0xaa0>)
8002c02: 2207 movs r2, #7
8002c04: 701a strb r2, [r3, #0]
break;
8002c06: e15e b.n 8002ec6 <manageCiclo+0xbda>
}else if(stPulsanti&M3FW){
8002c08: 4b5b ldr r3, [pc, #364] @ (8002d78 <manageCiclo+0xa8c>)
8002c0a: 881b ldrh r3, [r3, #0]
8002c0c: f403 7380 and.w r3, r3, #256 @ 0x100
8002c10: 2b00 cmp r3, #0
8002c12: d017 beq.n 8002c44 <manageCiclo+0x958>
stBuz=bzmoving;
8002c14: 4b59 ldr r3, [pc, #356] @ (8002d7c <manageCiclo+0xa90>)
8002c16: 2201 movs r2, #1
8002c18: 701a strb r2, [r3, #0]
(void)ramp(M3,FW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT);
8002c1a: 4b59 ldr r3, [pc, #356] @ (8002d80 <manageCiclo+0xa94>)
8002c1c: 889b ldrh r3, [r3, #4]
8002c1e: b2da uxtb r2, r3
8002c20: 4b5c ldr r3, [pc, #368] @ (8002d94 <manageCiclo+0xaa8>)
8002c22: 881b ldrh r3, [r3, #0]
8002c24: b2d9 uxtb r1, r3
8002c26: 4b58 ldr r3, [pc, #352] @ (8002d88 <manageCiclo+0xa9c>)
8002c28: 881b ldrh r3, [r3, #0]
8002c2a: b2db uxtb r3, r3
8002c2c: 2000 movs r0, #0
8002c2e: 9001 str r0, [sp, #4]
8002c30: 9300 str r3, [sp, #0]
8002c32: 460b mov r3, r1
8002c34: 2100 movs r1, #0
8002c36: 2003 movs r0, #3
8002c38: f001 fecc bl 80049d4 <ramp>
stCiclo=omM3fw1;
8002c3c: 4b53 ldr r3, [pc, #332] @ (8002d8c <manageCiclo+0xaa0>)
8002c3e: 2209 movs r2, #9
8002c40: 701a strb r2, [r3, #0]
break;
8002c42: e140 b.n 8002ec6 <manageCiclo+0xbda>
}else if(stPulsanti&M3BW){
8002c44: 4b4c ldr r3, [pc, #304] @ (8002d78 <manageCiclo+0xa8c>)
8002c46: 881b ldrh r3, [r3, #0]
8002c48: f403 7300 and.w r3, r3, #512 @ 0x200
8002c4c: 2b00 cmp r3, #0
8002c4e: d017 beq.n 8002c80 <manageCiclo+0x994>
stBuz=bzmoving;
8002c50: 4b4a ldr r3, [pc, #296] @ (8002d7c <manageCiclo+0xa90>)
8002c52: 2201 movs r2, #1
8002c54: 701a strb r2, [r3, #0]
(void)ramp(M3,BW,mrampstart[M3-1],m3pwmMan,trampman,RAMPINIT);
8002c56: 4b4a ldr r3, [pc, #296] @ (8002d80 <manageCiclo+0xa94>)
8002c58: 889b ldrh r3, [r3, #4]
8002c5a: b2da uxtb r2, r3
8002c5c: 4b4d ldr r3, [pc, #308] @ (8002d94 <manageCiclo+0xaa8>)
8002c5e: 881b ldrh r3, [r3, #0]
8002c60: b2d9 uxtb r1, r3
8002c62: 4b49 ldr r3, [pc, #292] @ (8002d88 <manageCiclo+0xa9c>)
8002c64: 881b ldrh r3, [r3, #0]
8002c66: b2db uxtb r3, r3
8002c68: 2000 movs r0, #0
8002c6a: 9001 str r0, [sp, #4]
8002c6c: 9300 str r3, [sp, #0]
8002c6e: 460b mov r3, r1
8002c70: 2101 movs r1, #1
8002c72: 2003 movs r0, #3
8002c74: f001 feae bl 80049d4 <ramp>
stCiclo=omM3bw1;
8002c78: 4b44 ldr r3, [pc, #272] @ (8002d8c <manageCiclo+0xaa0>)
8002c7a: 220b movs r2, #11
8002c7c: 701a strb r2, [r3, #0]
break;
8002c7e: e122 b.n 8002ec6 <manageCiclo+0xbda>
}else if(stPulsanti&M4FW){
8002c80: 4b3d ldr r3, [pc, #244] @ (8002d78 <manageCiclo+0xa8c>)
8002c82: 881b ldrh r3, [r3, #0]
8002c84: f403 6380 and.w r3, r3, #1024 @ 0x400
8002c88: 2b00 cmp r3, #0
8002c8a: d017 beq.n 8002cbc <manageCiclo+0x9d0>
stBuz=bzmoving;
8002c8c: 4b3b ldr r3, [pc, #236] @ (8002d7c <manageCiclo+0xa90>)
8002c8e: 2201 movs r2, #1
8002c90: 701a strb r2, [r3, #0]
(void)ramp(M4,FW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
8002c92: 4b3b ldr r3, [pc, #236] @ (8002d80 <manageCiclo+0xa94>)
8002c94: 88db ldrh r3, [r3, #6]
8002c96: b2da uxtb r2, r3
8002c98: 4b3e ldr r3, [pc, #248] @ (8002d94 <manageCiclo+0xaa8>)
8002c9a: 881b ldrh r3, [r3, #0]
8002c9c: b2d9 uxtb r1, r3
8002c9e: 4b3a ldr r3, [pc, #232] @ (8002d88 <manageCiclo+0xa9c>)
8002ca0: 881b ldrh r3, [r3, #0]
8002ca2: b2db uxtb r3, r3
8002ca4: 2000 movs r0, #0
8002ca6: 9001 str r0, [sp, #4]
8002ca8: 9300 str r3, [sp, #0]
8002caa: 460b mov r3, r1
8002cac: 2100 movs r1, #0
8002cae: 2004 movs r0, #4
8002cb0: f001 fe90 bl 80049d4 <ramp>
stCiclo=omM4fw1;
8002cb4: 4b35 ldr r3, [pc, #212] @ (8002d8c <manageCiclo+0xaa0>)
8002cb6: 220d movs r2, #13
8002cb8: 701a strb r2, [r3, #0]
break;
8002cba: e104 b.n 8002ec6 <manageCiclo+0xbda>
}else if(stPulsanti&M4BW){
8002cbc: 4b2e ldr r3, [pc, #184] @ (8002d78 <manageCiclo+0xa8c>)
8002cbe: 881b ldrh r3, [r3, #0]
8002cc0: f403 6300 and.w r3, r3, #2048 @ 0x800
8002cc4: 2b00 cmp r3, #0
8002cc6: f000 80fe beq.w 8002ec6 <manageCiclo+0xbda>
stBuz=bzmoving;
8002cca: 4b2c ldr r3, [pc, #176] @ (8002d7c <manageCiclo+0xa90>)
8002ccc: 2201 movs r2, #1
8002cce: 701a strb r2, [r3, #0]
(void)ramp(M4,BW,mrampstart[M4-1],m3pwmMan,trampman,RAMPINIT);
8002cd0: 4b2b ldr r3, [pc, #172] @ (8002d80 <manageCiclo+0xa94>)
8002cd2: 88db ldrh r3, [r3, #6]
8002cd4: b2da uxtb r2, r3
8002cd6: 4b2f ldr r3, [pc, #188] @ (8002d94 <manageCiclo+0xaa8>)
8002cd8: 881b ldrh r3, [r3, #0]
8002cda: b2d9 uxtb r1, r3
8002cdc: 4b2a ldr r3, [pc, #168] @ (8002d88 <manageCiclo+0xa9c>)
8002cde: 881b ldrh r3, [r3, #0]
8002ce0: b2db uxtb r3, r3
8002ce2: 2000 movs r0, #0
8002ce4: 9001 str r0, [sp, #4]
8002ce6: 9300 str r3, [sp, #0]
8002ce8: 460b mov r3, r1
8002cea: 2101 movs r1, #1
8002cec: 2004 movs r0, #4
8002cee: f001 fe71 bl 80049d4 <ramp>
stCiclo=omM4bw1;
8002cf2: 4b26 ldr r3, [pc, #152] @ (8002d8c <manageCiclo+0xaa0>)
8002cf4: 220f movs r2, #15
8002cf6: 701a strb r2, [r3, #0]
break;
8002cf8: e0e5 b.n 8002ec6 <manageCiclo+0xbda>
case omchiusura1:
if(rtCiclo>=10){//doppo 1 secondi
8002cfa: 4b27 ldr r3, [pc, #156] @ (8002d98 <manageCiclo+0xaac>)
8002cfc: 881b ldrh r3, [r3, #0]
8002cfe: b29b uxth r3, r3
8002d00: 2b09 cmp r3, #9
8002d02: d921 bls.n 8002d48 <manageCiclo+0xa5c>
m1=m1ch();m2=m2ch();m3=m3ch();m4=m4ch();
8002d04: f000 ffb4 bl 8003c70 <m1ch>
8002d08: 4603 mov r3, r0
8002d0a: 71fb strb r3, [r7, #7]
8002d0c: f001 f882 bl 8003e14 <m2ch>
8002d10: 4603 mov r3, r0
8002d12: 71bb strb r3, [r7, #6]
8002d14: f001 f950 bl 8003fb8 <m3ch>
8002d18: 4603 mov r3, r0
8002d1a: 717b strb r3, [r7, #5]
8002d1c: f001 fa20 bl 8004160 <m4ch>
8002d20: 4603 mov r3, r0
8002d22: 713b strb r3, [r7, #4]
if((m1==motStop)&&(m2==motStop)&&(m3==motStop)&&(m4==motStop)){
8002d24: 79fb ldrb r3, [r7, #7]
8002d26: 2b04 cmp r3, #4
8002d28: d10e bne.n 8002d48 <manageCiclo+0xa5c>
8002d2a: 79bb ldrb r3, [r7, #6]
8002d2c: 2b04 cmp r3, #4
8002d2e: d10b bne.n 8002d48 <manageCiclo+0xa5c>
8002d30: 797b ldrb r3, [r7, #5]
8002d32: 2b04 cmp r3, #4
8002d34: d108 bne.n 8002d48 <manageCiclo+0xa5c>
8002d36: 793b ldrb r3, [r7, #4]
8002d38: 2b04 cmp r3, #4
8002d3a: d105 bne.n 8002d48 <manageCiclo+0xa5c>
stBuz=bzoff;
8002d3c: 4b0f ldr r3, [pc, #60] @ (8002d7c <manageCiclo+0xa90>)
8002d3e: 2200 movs r2, #0
8002d40: 701a strb r2, [r3, #0]
stCiclo=omchiuso;
8002d42: 4b12 ldr r3, [pc, #72] @ (8002d8c <manageCiclo+0xaa0>)
8002d44: 2200 movs r2, #0
8002d46: 701a strb r2, [r3, #0]
}
}
if(stPulsanti&P1STOP)stCiclo=omstopchiusura;
8002d48: 4b0b ldr r3, [pc, #44] @ (8002d78 <manageCiclo+0xa8c>)
8002d4a: 881b ldrh r3, [r3, #0]
8002d4c: f003 0302 and.w r3, r3, #2
8002d50: 2b00 cmp r3, #0
8002d52: d002 beq.n 8002d5a <manageCiclo+0xa6e>
8002d54: 4b0d ldr r3, [pc, #52] @ (8002d8c <manageCiclo+0xaa0>)
8002d56: 2218 movs r2, #24
8002d58: 701a strb r2, [r3, #0]
if(stPulsanti&P1START){
8002d5a: 4b07 ldr r3, [pc, #28] @ (8002d78 <manageCiclo+0xa8c>)
8002d5c: 881b ldrh r3, [r3, #0]
8002d5e: f003 0301 and.w r3, r3, #1
8002d62: 2b00 cmp r3, #0
8002d64: f000 80b1 beq.w 8002eca <manageCiclo+0xbde>
stCiclo=omstoprestartapertura;
8002d68: 4b08 ldr r3, [pc, #32] @ (8002d8c <manageCiclo+0xaa0>)
8002d6a: 2215 movs r2, #21
8002d6c: 701a strb r2, [r3, #0]
rtCiclo=0;
8002d6e: 4b0a ldr r3, [pc, #40] @ (8002d98 <manageCiclo+0xaac>)
8002d70: 2200 movs r2, #0
8002d72: 801a strh r2, [r3, #0]
}
break;
8002d74: e0a9 b.n 8002eca <manageCiclo+0xbde>
8002d76: bf00 nop
8002d78: 20000454 .word 0x20000454
8002d7c: 20000457 .word 0x20000457
8002d80: 2000044c .word 0x2000044c
8002d84: 20000420 .word 0x20000420
8002d88: 2000041e .word 0x2000041e
8002d8c: 20000456 .word 0x20000456
8002d90: 20000422 .word 0x20000422
8002d94: 20000424 .word 0x20000424
8002d98: 200003fc .word 0x200003fc
case omstoprestartapertura:
SetMotPerc(M1,FW,0);
8002d9c: 2200 movs r2, #0
8002d9e: 2100 movs r1, #0
8002da0: 2001 movs r0, #1
8002da2: f001 fc97 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,FW,0);
8002da6: 2200 movs r2, #0
8002da8: 2100 movs r1, #0
8002daa: 2002 movs r0, #2
8002dac: f001 fc92 bl 80046d4 <SetMotPerc>
SetMotPerc(M3,FW,0);
8002db0: 2200 movs r2, #0
8002db2: 2100 movs r1, #0
8002db4: 2003 movs r0, #3
8002db6: f001 fc8d bl 80046d4 <SetMotPerc>
SetMotPerc(M4,FW,0);
8002dba: 2200 movs r2, #0
8002dbc: 2100 movs r1, #0
8002dbe: 2004 movs r0, #4
8002dc0: f001 fc88 bl 80046d4 <SetMotPerc>
SetMotPerc(M1,BW,0);
8002dc4: 2200 movs r2, #0
8002dc6: 2101 movs r1, #1
8002dc8: 2001 movs r0, #1
8002dca: f001 fc83 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,BW,0);
8002dce: 2200 movs r2, #0
8002dd0: 2101 movs r1, #1
8002dd2: 2002 movs r0, #2
8002dd4: f001 fc7e bl 80046d4 <SetMotPerc>
SetMotPerc(M3,BW,0);
8002dd8: 2200 movs r2, #0
8002dda: 2101 movs r1, #1
8002ddc: 2003 movs r0, #3
8002dde: f001 fc79 bl 80046d4 <SetMotPerc>
SetMotPerc(M4,BW,0);
8002de2: 2200 movs r2, #0
8002de4: 2101 movs r1, #1
8002de6: 2004 movs r0, #4
8002de8: f001 fc74 bl 80046d4 <SetMotPerc>
if(rtCiclo>=20)stCiclo=omchiuso;
8002dec: 4b3b ldr r3, [pc, #236] @ (8002edc <manageCiclo+0xbf0>)
8002dee: 881b ldrh r3, [r3, #0]
8002df0: b29b uxth r3, r3
8002df2: 2b13 cmp r3, #19
8002df4: d96b bls.n 8002ece <manageCiclo+0xbe2>
8002df6: 4b3a ldr r3, [pc, #232] @ (8002ee0 <manageCiclo+0xbf4>)
8002df8: 2200 movs r2, #0
8002dfa: 701a strb r2, [r3, #0]
break;
8002dfc: e067 b.n 8002ece <manageCiclo+0xbe2>
case omstopchiusura:
SetMotPerc(M1,FW,0);
8002dfe: 2200 movs r2, #0
8002e00: 2100 movs r1, #0
8002e02: 2001 movs r0, #1
8002e04: f001 fc66 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,FW,0);
8002e08: 2200 movs r2, #0
8002e0a: 2100 movs r1, #0
8002e0c: 2002 movs r0, #2
8002e0e: f001 fc61 bl 80046d4 <SetMotPerc>
SetMotPerc(M3,FW,0);
8002e12: 2200 movs r2, #0
8002e14: 2100 movs r1, #0
8002e16: 2003 movs r0, #3
8002e18: f001 fc5c bl 80046d4 <SetMotPerc>
SetMotPerc(M4,FW,0);
8002e1c: 2200 movs r2, #0
8002e1e: 2100 movs r1, #0
8002e20: 2004 movs r0, #4
8002e22: f001 fc57 bl 80046d4 <SetMotPerc>
SetMotPerc(M1,BW,0);
8002e26: 2200 movs r2, #0
8002e28: 2101 movs r1, #1
8002e2a: 2001 movs r0, #1
8002e2c: f001 fc52 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,BW,0);
8002e30: 2200 movs r2, #0
8002e32: 2101 movs r1, #1
8002e34: 2002 movs r0, #2
8002e36: f001 fc4d bl 80046d4 <SetMotPerc>
SetMotPerc(M3,BW,0);
8002e3a: 2200 movs r2, #0
8002e3c: 2101 movs r1, #1
8002e3e: 2003 movs r0, #3
8002e40: f001 fc48 bl 80046d4 <SetMotPerc>
SetMotPerc(M4,BW,0);
8002e44: 2200 movs r2, #0
8002e46: 2101 movs r1, #1
8002e48: 2004 movs r0, #4
8002e4a: f001 fc43 bl 80046d4 <SetMotPerc>
if(pulsanti==0){
8002e4e: 4b25 ldr r3, [pc, #148] @ (8002ee4 <manageCiclo+0xbf8>)
8002e50: 781b ldrb r3, [r3, #0]
8002e52: 2b00 cmp r3, #0
8002e54: d13d bne.n 8002ed2 <manageCiclo+0xbe6>
stBuz=bzoff;
8002e56: 4b24 ldr r3, [pc, #144] @ (8002ee8 <manageCiclo+0xbfc>)
8002e58: 2200 movs r2, #0
8002e5a: 701a strb r2, [r3, #0]
stCiclo=omaperto;
8002e5c: 4b20 ldr r3, [pc, #128] @ (8002ee0 <manageCiclo+0xbf4>)
8002e5e: 2216 movs r2, #22
8002e60: 701a strb r2, [r3, #0]
stPulsanti&=(~P1STOP);
8002e62: 4b22 ldr r3, [pc, #136] @ (8002eec <manageCiclo+0xc00>)
8002e64: 881b ldrh r3, [r3, #0]
8002e66: f023 0302 bic.w r3, r3, #2
8002e6a: b29a uxth r2, r3
8002e6c: 4b1f ldr r3, [pc, #124] @ (8002eec <manageCiclo+0xc00>)
8002e6e: 801a strh r2, [r3, #0]
}
break;
8002e70: e02f b.n 8002ed2 <manageCiclo+0xbe6>
break;
8002e72: bf00 nop
8002e74: e02e b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e76: bf00 nop
8002e78: e02c b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e7a: bf00 nop
8002e7c: e02a b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e7e: bf00 nop
8002e80: e028 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e82: bf00 nop
8002e84: e026 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e86: bf00 nop
8002e88: e024 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e8a: bf00 nop
8002e8c: e022 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e8e: bf00 nop
8002e90: e020 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e92: bf00 nop
8002e94: e01e b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e96: bf00 nop
8002e98: e01c b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e9a: bf00 nop
8002e9c: e01a b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002e9e: bf00 nop
8002ea0: e018 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002ea2: bf00 nop
8002ea4: e016 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002ea6: bf00 nop
8002ea8: e014 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002eaa: bf00 nop
8002eac: e012 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002eae: bf00 nop
8002eb0: e010 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002eb2: bf00 nop
8002eb4: e00e b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002eb6: bf00 nop
8002eb8: e00c b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002eba: bf00 nop
8002ebc: e00a b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002ebe: bf00 nop
8002ec0: e008 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002ec2: bf00 nop
8002ec4: e006 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002ec6: bf00 nop
8002ec8: e004 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002eca: bf00 nop
8002ecc: e002 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002ece: bf00 nop
8002ed0: e000 b.n 8002ed4 <manageCiclo+0xbe8>
break;
8002ed2: bf00 nop
}
}
8002ed4: bf00 nop
8002ed6: 3708 adds r7, #8
8002ed8: 46bd mov sp, r7
8002eda: bd80 pop {r7, pc}
8002edc: 200003fc .word 0x200003fc
8002ee0: 20000456 .word 0x20000456
8002ee4: 200003f0 .word 0x200003f0
8002ee8: 20000457 .word 0x20000457
8002eec: 20000454 .word 0x20000454
08002ef0 <main>:
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
8002ef0: b580 push {r7, lr}
8002ef2: af00 add r7, sp, #0
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
8002ef4: f002 f852 bl 8004f9c <HAL_Init>
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
8002ef8: f000 f85a bl 8002fb0 <SystemClock_Config>
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
8002efc: f000 fabc bl 8003478 <MX_GPIO_Init>
MX_DMA_Init();
8002f00: f000 fa9c bl 800343c <MX_DMA_Init>
MX_USB_DEVICE_Init();
8002f04: f00a fcea bl 800d8dc <MX_USB_DEVICE_Init>
MX_TIM2_Init();
8002f08: f000 f928 bl 800315c <MX_TIM2_Init>
MX_TIM4_Init();
8002f0c: f000 f9ca bl 80032a4 <MX_TIM4_Init>
MX_ADC1_Init();
8002f10: f000 f8ac bl 800306c <MX_ADC1_Init>
MX_USART1_UART_Init();
8002f14: f000 fa68 bl 80033e8 <MX_USART1_UART_Init>
/* USER CODE BEGIN 2 */
HAL_ADC_Start_DMA(&hadc1, (uint32_t *)adc_dma_buf, ADC_NUM_CHANNELS);
8002f18: 2205 movs r2, #5
8002f1a: 4920 ldr r1, [pc, #128] @ (8002f9c <main+0xac>)
8002f1c: 4820 ldr r0, [pc, #128] @ (8002fa0 <main+0xb0>)
8002f1e: f002 f977 bl 8005210 <HAL_ADC_Start_DMA>
StopMot(timMot1,FWMot1);
8002f22: 2100 movs r1, #0
8002f24: 481f ldr r0, [pc, #124] @ (8002fa4 <main+0xb4>)
8002f26: f001 fa02 bl 800432e <StopMot>
StopMot(timMot1,BWMot1);
8002f2a: 2104 movs r1, #4
8002f2c: 481d ldr r0, [pc, #116] @ (8002fa4 <main+0xb4>)
8002f2e: f001 f9fe bl 800432e <StopMot>
StopMot(timMot2,FWMot2);
8002f32: 2108 movs r1, #8
8002f34: 481b ldr r0, [pc, #108] @ (8002fa4 <main+0xb4>)
8002f36: f001 f9fa bl 800432e <StopMot>
StopMot(timMot2,BWMot2);
8002f3a: 210c movs r1, #12
8002f3c: 4819 ldr r0, [pc, #100] @ (8002fa4 <main+0xb4>)
8002f3e: f001 f9f6 bl 800432e <StopMot>
StopMot(timMot3,FWMot3);
8002f42: 2100 movs r1, #0
8002f44: 4818 ldr r0, [pc, #96] @ (8002fa8 <main+0xb8>)
8002f46: f001 f9f2 bl 800432e <StopMot>
StopMot(timMot3,BWMot3);
8002f4a: 2104 movs r1, #4
8002f4c: 4816 ldr r0, [pc, #88] @ (8002fa8 <main+0xb8>)
8002f4e: f001 f9ee bl 800432e <StopMot>
StopMot(timMot4,FWMot4);
8002f52: 2108 movs r1, #8
8002f54: 4814 ldr r0, [pc, #80] @ (8002fa8 <main+0xb8>)
8002f56: f001 f9ea bl 800432e <StopMot>
StopMot(timMot4,BWMot4);
8002f5a: 210c movs r1, #12
8002f5c: 4812 ldr r0, [pc, #72] @ (8002fa8 <main+0xb8>)
8002f5e: f001 f9e6 bl 800432e <StopMot>
//CDC_Transmit_FS((uint8_t*)"Start\r\n", 7);
//while (CDC_Transmit_FS((uint8_t*)"Start\r\n", 7) == USBD_BUSY);
if (EE_Init() != EE_OK){
8002f62: f7fe fb33 bl 80015cc <EE_Init>
8002f66: 4603 mov r3, r0
8002f68: 2b00 cmp r3, #0
8002f6a: d001 beq.n 8002f70 <main+0x80>
for(;;);//errore eeprom
8002f6c: bf00 nop
8002f6e: e7fd b.n 8002f6c <main+0x7c>
}
loadEE();
8002f70: f7fe fc16 bl 80017a0 <loadEE>
if(flagPar!=0x01){
8002f74: 4b0d ldr r3, [pc, #52] @ (8002fac <main+0xbc>)
8002f76: 881b ldrh r3, [r3, #0]
8002f78: 2b01 cmp r3, #1
8002f7a: d003 beq.n 8002f84 <main+0x94>
loadDefault();
8002f7c: f7fe fbc2 bl 8001704 <loadDefault>
loadEE();
8002f80: f7fe fc0e bl 80017a0 <loadEE>
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1){
manageCDC();
8002f84: f7fd fa3a bl 80003fc <manageCDC>
manageAdc();
8002f88: f7fd f8e8 bl 800015c <manageAdc>
managePulsanti();
8002f8c: f7ff f84a bl 8002024 <managePulsanti>
manageCiclo();
8002f90: f7ff f9ac bl 80022ec <manageCiclo>
debug();
8002f94: f7fe f90e bl 80011b4 <debug>
manageCDC();
8002f98: bf00 nop
8002f9a: e7f3 b.n 8002f84 <main+0x94>
8002f9c: 200001fc .word 0x200001fc
8002fa0: 200002a4 .word 0x200002a4
8002fa4: 20000318 .word 0x20000318
8002fa8: 20000360 .word 0x20000360
8002fac: 20000448 .word 0x20000448
08002fb0 <SystemClock_Config>:
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
8002fb0: b580 push {r7, lr}
8002fb2: b094 sub sp, #80 @ 0x50
8002fb4: af00 add r7, sp, #0
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
8002fb6: f107 0328 add.w r3, r7, #40 @ 0x28
8002fba: 2228 movs r2, #40 @ 0x28
8002fbc: 2100 movs r1, #0
8002fbe: 4618 mov r0, r3
8002fc0: f00b f9c8 bl 800e354 <memset>
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
8002fc4: f107 0314 add.w r3, r7, #20
8002fc8: 2200 movs r2, #0
8002fca: 601a str r2, [r3, #0]
8002fcc: 605a str r2, [r3, #4]
8002fce: 609a str r2, [r3, #8]
8002fd0: 60da str r2, [r3, #12]
8002fd2: 611a str r2, [r3, #16]
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
8002fd4: 1d3b adds r3, r7, #4
8002fd6: 2200 movs r2, #0
8002fd8: 601a str r2, [r3, #0]
8002fda: 605a str r2, [r3, #4]
8002fdc: 609a str r2, [r3, #8]
8002fde: 60da str r2, [r3, #12]
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
8002fe0: 2301 movs r3, #1
8002fe2: 62bb str r3, [r7, #40] @ 0x28
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
8002fe4: f44f 3380 mov.w r3, #65536 @ 0x10000
8002fe8: 62fb str r3, [r7, #44] @ 0x2c
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
8002fea: 2300 movs r3, #0
8002fec: 633b str r3, [r7, #48] @ 0x30
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
8002fee: 2301 movs r3, #1
8002ff0: 63bb str r3, [r7, #56] @ 0x38
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
8002ff2: 2302 movs r3, #2
8002ff4: 647b str r3, [r7, #68] @ 0x44
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
8002ff6: f44f 3380 mov.w r3, #65536 @ 0x10000
8002ffa: 64bb str r3, [r7, #72] @ 0x48
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
8002ffc: f44f 1380 mov.w r3, #1048576 @ 0x100000
8003000: 64fb str r3, [r7, #76] @ 0x4c
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
8003002: f107 0328 add.w r3, r7, #40 @ 0x28
8003006: 4618 mov r0, r3
8003008: f005 f80c bl 8008024 <HAL_RCC_OscConfig>
800300c: 4603 mov r3, r0
800300e: 2b00 cmp r3, #0
8003010: d001 beq.n 8003016 <SystemClock_Config+0x66>
{
Error_Handler();
8003012: f000 fadb bl 80035cc <Error_Handler>
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
8003016: 230f movs r3, #15
8003018: 617b str r3, [r7, #20]
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
800301a: 2302 movs r3, #2
800301c: 61bb str r3, [r7, #24]
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
800301e: 2300 movs r3, #0
8003020: 61fb str r3, [r7, #28]
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
8003022: f44f 6380 mov.w r3, #1024 @ 0x400
8003026: 623b str r3, [r7, #32]
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
8003028: 2300 movs r3, #0
800302a: 627b str r3, [r7, #36] @ 0x24
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
800302c: f107 0314 add.w r3, r7, #20
8003030: 2102 movs r1, #2
8003032: 4618 mov r0, r3
8003034: f005 fa78 bl 8008528 <HAL_RCC_ClockConfig>
8003038: 4603 mov r3, r0
800303a: 2b00 cmp r3, #0
800303c: d001 beq.n 8003042 <SystemClock_Config+0x92>
{
Error_Handler();
800303e: f000 fac5 bl 80035cc <Error_Handler>
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC|RCC_PERIPHCLK_USB;
8003042: 2312 movs r3, #18
8003044: 607b str r3, [r7, #4]
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
8003046: f44f 4300 mov.w r3, #32768 @ 0x8000
800304a: 60fb str r3, [r7, #12]
PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_PLL_DIV1_5;
800304c: 2300 movs r3, #0
800304e: 613b str r3, [r7, #16]
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
8003050: 1d3b adds r3, r7, #4
8003052: 4618 mov r0, r3
8003054: f005 fbf8 bl 8008848 <HAL_RCCEx_PeriphCLKConfig>
8003058: 4603 mov r3, r0
800305a: 2b00 cmp r3, #0
800305c: d001 beq.n 8003062 <SystemClock_Config+0xb2>
{
Error_Handler();
800305e: f000 fab5 bl 80035cc <Error_Handler>
}
}
8003062: bf00 nop
8003064: 3750 adds r7, #80 @ 0x50
8003066: 46bd mov sp, r7
8003068: bd80 pop {r7, pc}
...
0800306c <MX_ADC1_Init>:
* @brief ADC1 Initialization Function
* @param None
* @retval None
*/
static void MX_ADC1_Init(void)
{
800306c: b580 push {r7, lr}
800306e: b084 sub sp, #16
8003070: af00 add r7, sp, #0
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
8003072: 1d3b adds r3, r7, #4
8003074: 2200 movs r2, #0
8003076: 601a str r2, [r3, #0]
8003078: 605a str r2, [r3, #4]
800307a: 609a str r2, [r3, #8]
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
800307c: 4b35 ldr r3, [pc, #212] @ (8003154 <MX_ADC1_Init+0xe8>)
800307e: 4a36 ldr r2, [pc, #216] @ (8003158 <MX_ADC1_Init+0xec>)
8003080: 601a str r2, [r3, #0]
hadc1.Init.ScanConvMode = ADC_SCAN_ENABLE;
8003082: 4b34 ldr r3, [pc, #208] @ (8003154 <MX_ADC1_Init+0xe8>)
8003084: f44f 7280 mov.w r2, #256 @ 0x100
8003088: 609a str r2, [r3, #8]
hadc1.Init.ContinuousConvMode = ENABLE;
800308a: 4b32 ldr r3, [pc, #200] @ (8003154 <MX_ADC1_Init+0xe8>)
800308c: 2201 movs r2, #1
800308e: 731a strb r2, [r3, #12]
hadc1.Init.DiscontinuousConvMode = DISABLE;
8003090: 4b30 ldr r3, [pc, #192] @ (8003154 <MX_ADC1_Init+0xe8>)
8003092: 2200 movs r2, #0
8003094: 751a strb r2, [r3, #20]
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
8003096: 4b2f ldr r3, [pc, #188] @ (8003154 <MX_ADC1_Init+0xe8>)
8003098: f44f 2260 mov.w r2, #917504 @ 0xe0000
800309c: 61da str r2, [r3, #28]
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
800309e: 4b2d ldr r3, [pc, #180] @ (8003154 <MX_ADC1_Init+0xe8>)
80030a0: 2200 movs r2, #0
80030a2: 605a str r2, [r3, #4]
hadc1.Init.NbrOfConversion = 5;
80030a4: 4b2b ldr r3, [pc, #172] @ (8003154 <MX_ADC1_Init+0xe8>)
80030a6: 2205 movs r2, #5
80030a8: 611a str r2, [r3, #16]
if (HAL_ADC_Init(&hadc1) != HAL_OK)
80030aa: 482a ldr r0, [pc, #168] @ (8003154 <MX_ADC1_Init+0xe8>)
80030ac: f001 ffd8 bl 8005060 <HAL_ADC_Init>
80030b0: 4603 mov r3, r0
80030b2: 2b00 cmp r3, #0
80030b4: d001 beq.n 80030ba <MX_ADC1_Init+0x4e>
{
Error_Handler();
80030b6: f000 fa89 bl 80035cc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_4;
80030ba: 2304 movs r3, #4
80030bc: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_1;
80030be: 2301 movs r3, #1
80030c0: 60bb str r3, [r7, #8]
sConfig.SamplingTime = ADC_SAMPLETIME_28CYCLES_5;
80030c2: 2303 movs r3, #3
80030c4: 60fb str r3, [r7, #12]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
80030c6: 1d3b adds r3, r7, #4
80030c8: 4619 mov r1, r3
80030ca: 4822 ldr r0, [pc, #136] @ (8003154 <MX_ADC1_Init+0xe8>)
80030cc: f002 f99a bl 8005404 <HAL_ADC_ConfigChannel>
80030d0: 4603 mov r3, r0
80030d2: 2b00 cmp r3, #0
80030d4: d001 beq.n 80030da <MX_ADC1_Init+0x6e>
{
Error_Handler();
80030d6: f000 fa79 bl 80035cc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_5;
80030da: 2305 movs r3, #5
80030dc: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_2;
80030de: 2302 movs r3, #2
80030e0: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
80030e2: 1d3b adds r3, r7, #4
80030e4: 4619 mov r1, r3
80030e6: 481b ldr r0, [pc, #108] @ (8003154 <MX_ADC1_Init+0xe8>)
80030e8: f002 f98c bl 8005404 <HAL_ADC_ConfigChannel>
80030ec: 4603 mov r3, r0
80030ee: 2b00 cmp r3, #0
80030f0: d001 beq.n 80030f6 <MX_ADC1_Init+0x8a>
{
Error_Handler();
80030f2: f000 fa6b bl 80035cc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_6;
80030f6: 2306 movs r3, #6
80030f8: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_3;
80030fa: 2303 movs r3, #3
80030fc: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
80030fe: 1d3b adds r3, r7, #4
8003100: 4619 mov r1, r3
8003102: 4814 ldr r0, [pc, #80] @ (8003154 <MX_ADC1_Init+0xe8>)
8003104: f002 f97e bl 8005404 <HAL_ADC_ConfigChannel>
8003108: 4603 mov r3, r0
800310a: 2b00 cmp r3, #0
800310c: d001 beq.n 8003112 <MX_ADC1_Init+0xa6>
{
Error_Handler();
800310e: f000 fa5d bl 80035cc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_7;
8003112: 2307 movs r3, #7
8003114: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_4;
8003116: 2304 movs r3, #4
8003118: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
800311a: 1d3b adds r3, r7, #4
800311c: 4619 mov r1, r3
800311e: 480d ldr r0, [pc, #52] @ (8003154 <MX_ADC1_Init+0xe8>)
8003120: f002 f970 bl 8005404 <HAL_ADC_ConfigChannel>
8003124: 4603 mov r3, r0
8003126: 2b00 cmp r3, #0
8003128: d001 beq.n 800312e <MX_ADC1_Init+0xc2>
{
Error_Handler();
800312a: f000 fa4f bl 80035cc <Error_Handler>
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_8;
800312e: 2308 movs r3, #8
8003130: 607b str r3, [r7, #4]
sConfig.Rank = ADC_REGULAR_RANK_5;
8003132: 2305 movs r3, #5
8003134: 60bb str r3, [r7, #8]
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
8003136: 1d3b adds r3, r7, #4
8003138: 4619 mov r1, r3
800313a: 4806 ldr r0, [pc, #24] @ (8003154 <MX_ADC1_Init+0xe8>)
800313c: f002 f962 bl 8005404 <HAL_ADC_ConfigChannel>
8003140: 4603 mov r3, r0
8003142: 2b00 cmp r3, #0
8003144: d001 beq.n 800314a <MX_ADC1_Init+0xde>
{
Error_Handler();
8003146: f000 fa41 bl 80035cc <Error_Handler>
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
800314a: bf00 nop
800314c: 3710 adds r7, #16
800314e: 46bd mov sp, r7
8003150: bd80 pop {r7, pc}
8003152: bf00 nop
8003154: 200002a4 .word 0x200002a4
8003158: 40012400 .word 0x40012400
0800315c <MX_TIM2_Init>:
* @brief TIM2 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM2_Init(void)
{
800315c: b580 push {r7, lr}
800315e: b08e sub sp, #56 @ 0x38
8003160: af00 add r7, sp, #0
/* USER CODE BEGIN TIM2_Init 0 */
/* USER CODE END TIM2_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
8003162: f107 0328 add.w r3, r7, #40 @ 0x28
8003166: 2200 movs r2, #0
8003168: 601a str r2, [r3, #0]
800316a: 605a str r2, [r3, #4]
800316c: 609a str r2, [r3, #8]
800316e: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
8003170: f107 0320 add.w r3, r7, #32
8003174: 2200 movs r2, #0
8003176: 601a str r2, [r3, #0]
8003178: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
800317a: 1d3b adds r3, r7, #4
800317c: 2200 movs r2, #0
800317e: 601a str r2, [r3, #0]
8003180: 605a str r2, [r3, #4]
8003182: 609a str r2, [r3, #8]
8003184: 60da str r2, [r3, #12]
8003186: 611a str r2, [r3, #16]
8003188: 615a str r2, [r3, #20]
800318a: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM2_Init 1 */
/* USER CODE END TIM2_Init 1 */
htim2.Instance = TIM2;
800318c: 4b44 ldr r3, [pc, #272] @ (80032a0 <MX_TIM2_Init+0x144>)
800318e: f04f 4280 mov.w r2, #1073741824 @ 0x40000000
8003192: 601a str r2, [r3, #0]
htim2.Init.Prescaler = 0;
8003194: 4b42 ldr r3, [pc, #264] @ (80032a0 <MX_TIM2_Init+0x144>)
8003196: 2200 movs r2, #0
8003198: 605a str r2, [r3, #4]
htim2.Init.CounterMode = TIM_COUNTERMODE_UP;
800319a: 4b41 ldr r3, [pc, #260] @ (80032a0 <MX_TIM2_Init+0x144>)
800319c: 2200 movs r2, #0
800319e: 609a str r2, [r3, #8]
htim2.Init.Period = 17999;
80031a0: 4b3f ldr r3, [pc, #252] @ (80032a0 <MX_TIM2_Init+0x144>)
80031a2: f244 624f movw r2, #17999 @ 0x464f
80031a6: 60da str r2, [r3, #12]
htim2.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80031a8: 4b3d ldr r3, [pc, #244] @ (80032a0 <MX_TIM2_Init+0x144>)
80031aa: 2200 movs r2, #0
80031ac: 611a str r2, [r3, #16]
htim2.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80031ae: 4b3c ldr r3, [pc, #240] @ (80032a0 <MX_TIM2_Init+0x144>)
80031b0: 2200 movs r2, #0
80031b2: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim2) != HAL_OK)
80031b4: 483a ldr r0, [pc, #232] @ (80032a0 <MX_TIM2_Init+0x144>)
80031b6: f005 fbfd bl 80089b4 <HAL_TIM_Base_Init>
80031ba: 4603 mov r3, r0
80031bc: 2b00 cmp r3, #0
80031be: d001 beq.n 80031c4 <MX_TIM2_Init+0x68>
{
Error_Handler();
80031c0: f000 fa04 bl 80035cc <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
80031c4: f44f 5380 mov.w r3, #4096 @ 0x1000
80031c8: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim2, &sClockSourceConfig) != HAL_OK)
80031ca: f107 0328 add.w r3, r7, #40 @ 0x28
80031ce: 4619 mov r1, r3
80031d0: 4833 ldr r0, [pc, #204] @ (80032a0 <MX_TIM2_Init+0x144>)
80031d2: f005 fe5f bl 8008e94 <HAL_TIM_ConfigClockSource>
80031d6: 4603 mov r3, r0
80031d8: 2b00 cmp r3, #0
80031da: d001 beq.n 80031e0 <MX_TIM2_Init+0x84>
{
Error_Handler();
80031dc: f000 f9f6 bl 80035cc <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim2) != HAL_OK)
80031e0: 482f ldr r0, [pc, #188] @ (80032a0 <MX_TIM2_Init+0x144>)
80031e2: f005 fc36 bl 8008a52 <HAL_TIM_PWM_Init>
80031e6: 4603 mov r3, r0
80031e8: 2b00 cmp r3, #0
80031ea: d001 beq.n 80031f0 <MX_TIM2_Init+0x94>
{
Error_Handler();
80031ec: f000 f9ee bl 80035cc <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
80031f0: 2300 movs r3, #0
80031f2: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
80031f4: 2300 movs r3, #0
80031f6: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim2, &sMasterConfig) != HAL_OK)
80031f8: f107 0320 add.w r3, r7, #32
80031fc: 4619 mov r1, r3
80031fe: 4828 ldr r0, [pc, #160] @ (80032a0 <MX_TIM2_Init+0x144>)
8003200: f006 f9e8 bl 80095d4 <HAL_TIMEx_MasterConfigSynchronization>
8003204: 4603 mov r3, r0
8003206: 2b00 cmp r3, #0
8003208: d001 beq.n 800320e <MX_TIM2_Init+0xb2>
{
Error_Handler();
800320a: f000 f9df bl 80035cc <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
800320e: 2360 movs r3, #96 @ 0x60
8003210: 607b str r3, [r7, #4]
sConfigOC.Pulse = 1000;
8003212: f44f 737a mov.w r3, #1000 @ 0x3e8
8003216: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
8003218: 2300 movs r3, #0
800321a: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
800321c: 2304 movs r3, #4
800321e: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8003220: 1d3b adds r3, r7, #4
8003222: 2200 movs r2, #0
8003224: 4619 mov r1, r3
8003226: 481e ldr r0, [pc, #120] @ (80032a0 <MX_TIM2_Init+0x144>)
8003228: f005 fd72 bl 8008d10 <HAL_TIM_PWM_ConfigChannel>
800322c: 4603 mov r3, r0
800322e: 2b00 cmp r3, #0
8003230: d001 beq.n 8003236 <MX_TIM2_Init+0xda>
{
Error_Handler();
8003232: f000 f9cb bl 80035cc <Error_Handler>
}
sConfigOC.Pulse = 2000;
8003236: f44f 63fa mov.w r3, #2000 @ 0x7d0
800323a: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
800323c: 1d3b adds r3, r7, #4
800323e: 2204 movs r2, #4
8003240: 4619 mov r1, r3
8003242: 4817 ldr r0, [pc, #92] @ (80032a0 <MX_TIM2_Init+0x144>)
8003244: f005 fd64 bl 8008d10 <HAL_TIM_PWM_ConfigChannel>
8003248: 4603 mov r3, r0
800324a: 2b00 cmp r3, #0
800324c: d001 beq.n 8003252 <MX_TIM2_Init+0xf6>
{
Error_Handler();
800324e: f000 f9bd bl 80035cc <Error_Handler>
}
sConfigOC.Pulse = 3000;
8003252: f640 33b8 movw r3, #3000 @ 0xbb8
8003256: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_DISABLE;
8003258: 2300 movs r3, #0
800325a: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
800325c: 1d3b adds r3, r7, #4
800325e: 2208 movs r2, #8
8003260: 4619 mov r1, r3
8003262: 480f ldr r0, [pc, #60] @ (80032a0 <MX_TIM2_Init+0x144>)
8003264: f005 fd54 bl 8008d10 <HAL_TIM_PWM_ConfigChannel>
8003268: 4603 mov r3, r0
800326a: 2b00 cmp r3, #0
800326c: d001 beq.n 8003272 <MX_TIM2_Init+0x116>
{
Error_Handler();
800326e: f000 f9ad bl 80035cc <Error_Handler>
}
sConfigOC.Pulse = 4000;
8003272: f44f 637a mov.w r3, #4000 @ 0xfa0
8003276: 60bb str r3, [r7, #8]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8003278: 2304 movs r3, #4
800327a: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim2, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
800327c: 1d3b adds r3, r7, #4
800327e: 220c movs r2, #12
8003280: 4619 mov r1, r3
8003282: 4807 ldr r0, [pc, #28] @ (80032a0 <MX_TIM2_Init+0x144>)
8003284: f005 fd44 bl 8008d10 <HAL_TIM_PWM_ConfigChannel>
8003288: 4603 mov r3, r0
800328a: 2b00 cmp r3, #0
800328c: d001 beq.n 8003292 <MX_TIM2_Init+0x136>
{
Error_Handler();
800328e: f000 f99d bl 80035cc <Error_Handler>
}
/* USER CODE BEGIN TIM2_Init 2 */
/* USER CODE END TIM2_Init 2 */
HAL_TIM_MspPostInit(&htim2);
8003292: 4803 ldr r0, [pc, #12] @ (80032a0 <MX_TIM2_Init+0x144>)
8003294: f001 fd3e bl 8004d14 <HAL_TIM_MspPostInit>
}
8003298: bf00 nop
800329a: 3738 adds r7, #56 @ 0x38
800329c: 46bd mov sp, r7
800329e: bd80 pop {r7, pc}
80032a0: 20000318 .word 0x20000318
080032a4 <MX_TIM4_Init>:
* @brief TIM4 Initialization Function
* @param None
* @retval None
*/
static void MX_TIM4_Init(void)
{
80032a4: b580 push {r7, lr}
80032a6: b08e sub sp, #56 @ 0x38
80032a8: af00 add r7, sp, #0
/* USER CODE BEGIN TIM4_Init 0 */
/* USER CODE END TIM4_Init 0 */
TIM_ClockConfigTypeDef sClockSourceConfig = {0};
80032aa: f107 0328 add.w r3, r7, #40 @ 0x28
80032ae: 2200 movs r2, #0
80032b0: 601a str r2, [r3, #0]
80032b2: 605a str r2, [r3, #4]
80032b4: 609a str r2, [r3, #8]
80032b6: 60da str r2, [r3, #12]
TIM_MasterConfigTypeDef sMasterConfig = {0};
80032b8: f107 0320 add.w r3, r7, #32
80032bc: 2200 movs r2, #0
80032be: 601a str r2, [r3, #0]
80032c0: 605a str r2, [r3, #4]
TIM_OC_InitTypeDef sConfigOC = {0};
80032c2: 1d3b adds r3, r7, #4
80032c4: 2200 movs r2, #0
80032c6: 601a str r2, [r3, #0]
80032c8: 605a str r2, [r3, #4]
80032ca: 609a str r2, [r3, #8]
80032cc: 60da str r2, [r3, #12]
80032ce: 611a str r2, [r3, #16]
80032d0: 615a str r2, [r3, #20]
80032d2: 619a str r2, [r3, #24]
/* USER CODE BEGIN TIM4_Init 1 */
/* USER CODE END TIM4_Init 1 */
htim4.Instance = TIM4;
80032d4: 4b42 ldr r3, [pc, #264] @ (80033e0 <MX_TIM4_Init+0x13c>)
80032d6: 4a43 ldr r2, [pc, #268] @ (80033e4 <MX_TIM4_Init+0x140>)
80032d8: 601a str r2, [r3, #0]
htim4.Init.Prescaler = 0;
80032da: 4b41 ldr r3, [pc, #260] @ (80033e0 <MX_TIM4_Init+0x13c>)
80032dc: 2200 movs r2, #0
80032de: 605a str r2, [r3, #4]
htim4.Init.CounterMode = TIM_COUNTERMODE_UP;
80032e0: 4b3f ldr r3, [pc, #252] @ (80033e0 <MX_TIM4_Init+0x13c>)
80032e2: 2200 movs r2, #0
80032e4: 609a str r2, [r3, #8]
htim4.Init.Period = 17999;
80032e6: 4b3e ldr r3, [pc, #248] @ (80033e0 <MX_TIM4_Init+0x13c>)
80032e8: f244 624f movw r2, #17999 @ 0x464f
80032ec: 60da str r2, [r3, #12]
htim4.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
80032ee: 4b3c ldr r3, [pc, #240] @ (80033e0 <MX_TIM4_Init+0x13c>)
80032f0: 2200 movs r2, #0
80032f2: 611a str r2, [r3, #16]
htim4.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
80032f4: 4b3a ldr r3, [pc, #232] @ (80033e0 <MX_TIM4_Init+0x13c>)
80032f6: 2200 movs r2, #0
80032f8: 619a str r2, [r3, #24]
if (HAL_TIM_Base_Init(&htim4) != HAL_OK)
80032fa: 4839 ldr r0, [pc, #228] @ (80033e0 <MX_TIM4_Init+0x13c>)
80032fc: f005 fb5a bl 80089b4 <HAL_TIM_Base_Init>
8003300: 4603 mov r3, r0
8003302: 2b00 cmp r3, #0
8003304: d001 beq.n 800330a <MX_TIM4_Init+0x66>
{
Error_Handler();
8003306: f000 f961 bl 80035cc <Error_Handler>
}
sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
800330a: f44f 5380 mov.w r3, #4096 @ 0x1000
800330e: 62bb str r3, [r7, #40] @ 0x28
if (HAL_TIM_ConfigClockSource(&htim4, &sClockSourceConfig) != HAL_OK)
8003310: f107 0328 add.w r3, r7, #40 @ 0x28
8003314: 4619 mov r1, r3
8003316: 4832 ldr r0, [pc, #200] @ (80033e0 <MX_TIM4_Init+0x13c>)
8003318: f005 fdbc bl 8008e94 <HAL_TIM_ConfigClockSource>
800331c: 4603 mov r3, r0
800331e: 2b00 cmp r3, #0
8003320: d001 beq.n 8003326 <MX_TIM4_Init+0x82>
{
Error_Handler();
8003322: f000 f953 bl 80035cc <Error_Handler>
}
if (HAL_TIM_PWM_Init(&htim4) != HAL_OK)
8003326: 482e ldr r0, [pc, #184] @ (80033e0 <MX_TIM4_Init+0x13c>)
8003328: f005 fb93 bl 8008a52 <HAL_TIM_PWM_Init>
800332c: 4603 mov r3, r0
800332e: 2b00 cmp r3, #0
8003330: d001 beq.n 8003336 <MX_TIM4_Init+0x92>
{
Error_Handler();
8003332: f000 f94b bl 80035cc <Error_Handler>
}
sMasterConfig.MasterOutputTrigger = TIM_TRGO_RESET;
8003336: 2300 movs r3, #0
8003338: 623b str r3, [r7, #32]
sMasterConfig.MasterSlaveMode = TIM_MASTERSLAVEMODE_DISABLE;
800333a: 2300 movs r3, #0
800333c: 627b str r3, [r7, #36] @ 0x24
if (HAL_TIMEx_MasterConfigSynchronization(&htim4, &sMasterConfig) != HAL_OK)
800333e: f107 0320 add.w r3, r7, #32
8003342: 4619 mov r1, r3
8003344: 4826 ldr r0, [pc, #152] @ (80033e0 <MX_TIM4_Init+0x13c>)
8003346: f006 f945 bl 80095d4 <HAL_TIMEx_MasterConfigSynchronization>
800334a: 4603 mov r3, r0
800334c: 2b00 cmp r3, #0
800334e: d001 beq.n 8003354 <MX_TIM4_Init+0xb0>
{
Error_Handler();
8003350: f000 f93c bl 80035cc <Error_Handler>
}
sConfigOC.OCMode = TIM_OCMODE_PWM1;
8003354: 2360 movs r3, #96 @ 0x60
8003356: 607b str r3, [r7, #4]
sConfigOC.Pulse = 5000;
8003358: f241 3388 movw r3, #5000 @ 0x1388
800335c: 60bb str r3, [r7, #8]
sConfigOC.OCPolarity = TIM_OCPOLARITY_HIGH;
800335e: 2300 movs r3, #0
8003360: 60fb str r3, [r7, #12]
sConfigOC.OCFastMode = TIM_OCFAST_ENABLE;
8003362: 2304 movs r3, #4
8003364: 617b str r3, [r7, #20]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_1) != HAL_OK)
8003366: 1d3b adds r3, r7, #4
8003368: 2200 movs r2, #0
800336a: 4619 mov r1, r3
800336c: 481c ldr r0, [pc, #112] @ (80033e0 <MX_TIM4_Init+0x13c>)
800336e: f005 fccf bl 8008d10 <HAL_TIM_PWM_ConfigChannel>
8003372: 4603 mov r3, r0
8003374: 2b00 cmp r3, #0
8003376: d001 beq.n 800337c <MX_TIM4_Init+0xd8>
{
Error_Handler();
8003378: f000 f928 bl 80035cc <Error_Handler>
}
sConfigOC.Pulse = 6000;
800337c: f241 7370 movw r3, #6000 @ 0x1770
8003380: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_2) != HAL_OK)
8003382: 1d3b adds r3, r7, #4
8003384: 2204 movs r2, #4
8003386: 4619 mov r1, r3
8003388: 4815 ldr r0, [pc, #84] @ (80033e0 <MX_TIM4_Init+0x13c>)
800338a: f005 fcc1 bl 8008d10 <HAL_TIM_PWM_ConfigChannel>
800338e: 4603 mov r3, r0
8003390: 2b00 cmp r3, #0
8003392: d001 beq.n 8003398 <MX_TIM4_Init+0xf4>
{
Error_Handler();
8003394: f000 f91a bl 80035cc <Error_Handler>
}
sConfigOC.Pulse = 7000;
8003398: f641 3358 movw r3, #7000 @ 0x1b58
800339c: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_3) != HAL_OK)
800339e: 1d3b adds r3, r7, #4
80033a0: 2208 movs r2, #8
80033a2: 4619 mov r1, r3
80033a4: 480e ldr r0, [pc, #56] @ (80033e0 <MX_TIM4_Init+0x13c>)
80033a6: f005 fcb3 bl 8008d10 <HAL_TIM_PWM_ConfigChannel>
80033aa: 4603 mov r3, r0
80033ac: 2b00 cmp r3, #0
80033ae: d001 beq.n 80033b4 <MX_TIM4_Init+0x110>
{
Error_Handler();
80033b0: f000 f90c bl 80035cc <Error_Handler>
}
sConfigOC.Pulse = 8000;
80033b4: f44f 53fa mov.w r3, #8000 @ 0x1f40
80033b8: 60bb str r3, [r7, #8]
if (HAL_TIM_PWM_ConfigChannel(&htim4, &sConfigOC, TIM_CHANNEL_4) != HAL_OK)
80033ba: 1d3b adds r3, r7, #4
80033bc: 220c movs r2, #12
80033be: 4619 mov r1, r3
80033c0: 4807 ldr r0, [pc, #28] @ (80033e0 <MX_TIM4_Init+0x13c>)
80033c2: f005 fca5 bl 8008d10 <HAL_TIM_PWM_ConfigChannel>
80033c6: 4603 mov r3, r0
80033c8: 2b00 cmp r3, #0
80033ca: d001 beq.n 80033d0 <MX_TIM4_Init+0x12c>
{
Error_Handler();
80033cc: f000 f8fe bl 80035cc <Error_Handler>
}
/* USER CODE BEGIN TIM4_Init 2 */
/* USER CODE END TIM4_Init 2 */
HAL_TIM_MspPostInit(&htim4);
80033d0: 4803 ldr r0, [pc, #12] @ (80033e0 <MX_TIM4_Init+0x13c>)
80033d2: f001 fc9f bl 8004d14 <HAL_TIM_MspPostInit>
}
80033d6: bf00 nop
80033d8: 3738 adds r7, #56 @ 0x38
80033da: 46bd mov sp, r7
80033dc: bd80 pop {r7, pc}
80033de: bf00 nop
80033e0: 20000360 .word 0x20000360
80033e4: 40000800 .word 0x40000800
080033e8 <MX_USART1_UART_Init>:
* @brief USART1 Initialization Function
* @param None
* @retval None
*/
static void MX_USART1_UART_Init(void)
{
80033e8: b580 push {r7, lr}
80033ea: af00 add r7, sp, #0
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
80033ec: 4b11 ldr r3, [pc, #68] @ (8003434 <MX_USART1_UART_Init+0x4c>)
80033ee: 4a12 ldr r2, [pc, #72] @ (8003438 <MX_USART1_UART_Init+0x50>)
80033f0: 601a str r2, [r3, #0]
huart1.Init.BaudRate = 115200;
80033f2: 4b10 ldr r3, [pc, #64] @ (8003434 <MX_USART1_UART_Init+0x4c>)
80033f4: f44f 32e1 mov.w r2, #115200 @ 0x1c200
80033f8: 605a str r2, [r3, #4]
huart1.Init.WordLength = UART_WORDLENGTH_8B;
80033fa: 4b0e ldr r3, [pc, #56] @ (8003434 <MX_USART1_UART_Init+0x4c>)
80033fc: 2200 movs r2, #0
80033fe: 609a str r2, [r3, #8]
huart1.Init.StopBits = UART_STOPBITS_1;
8003400: 4b0c ldr r3, [pc, #48] @ (8003434 <MX_USART1_UART_Init+0x4c>)
8003402: 2200 movs r2, #0
8003404: 60da str r2, [r3, #12]
huart1.Init.Parity = UART_PARITY_NONE;
8003406: 4b0b ldr r3, [pc, #44] @ (8003434 <MX_USART1_UART_Init+0x4c>)
8003408: 2200 movs r2, #0
800340a: 611a str r2, [r3, #16]
huart1.Init.Mode = UART_MODE_TX_RX;
800340c: 4b09 ldr r3, [pc, #36] @ (8003434 <MX_USART1_UART_Init+0x4c>)
800340e: 220c movs r2, #12
8003410: 615a str r2, [r3, #20]
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
8003412: 4b08 ldr r3, [pc, #32] @ (8003434 <MX_USART1_UART_Init+0x4c>)
8003414: 2200 movs r2, #0
8003416: 619a str r2, [r3, #24]
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
8003418: 4b06 ldr r3, [pc, #24] @ (8003434 <MX_USART1_UART_Init+0x4c>)
800341a: 2200 movs r2, #0
800341c: 61da str r2, [r3, #28]
if (HAL_UART_Init(&huart1) != HAL_OK)
800341e: 4805 ldr r0, [pc, #20] @ (8003434 <MX_USART1_UART_Init+0x4c>)
8003420: f006 f936 bl 8009690 <HAL_UART_Init>
8003424: 4603 mov r3, r0
8003426: 2b00 cmp r3, #0
8003428: d001 beq.n 800342e <MX_USART1_UART_Init+0x46>
{
Error_Handler();
800342a: f000 f8cf bl 80035cc <Error_Handler>
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
800342e: bf00 nop
8003430: bd80 pop {r7, pc}
8003432: bf00 nop
8003434: 200003a8 .word 0x200003a8
8003438: 40013800 .word 0x40013800
0800343c <MX_DMA_Init>:
/**
* Enable DMA controller clock
*/
static void MX_DMA_Init(void)
{
800343c: b580 push {r7, lr}
800343e: b082 sub sp, #8
8003440: af00 add r7, sp, #0
/* DMA controller clock enable */
__HAL_RCC_DMA1_CLK_ENABLE();
8003442: 4b0c ldr r3, [pc, #48] @ (8003474 <MX_DMA_Init+0x38>)
8003444: 695b ldr r3, [r3, #20]
8003446: 4a0b ldr r2, [pc, #44] @ (8003474 <MX_DMA_Init+0x38>)
8003448: f043 0301 orr.w r3, r3, #1
800344c: 6153 str r3, [r2, #20]
800344e: 4b09 ldr r3, [pc, #36] @ (8003474 <MX_DMA_Init+0x38>)
8003450: 695b ldr r3, [r3, #20]
8003452: f003 0301 and.w r3, r3, #1
8003456: 607b str r3, [r7, #4]
8003458: 687b ldr r3, [r7, #4]
/* DMA interrupt init */
/* DMA1_Channel1_IRQn interrupt configuration */
HAL_NVIC_SetPriority(DMA1_Channel1_IRQn, 0, 0);
800345a: 2200 movs r2, #0
800345c: 2100 movs r1, #0
800345e: 200b movs r0, #11
8003460: f002 faa1 bl 80059a6 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(DMA1_Channel1_IRQn);
8003464: 200b movs r0, #11
8003466: f002 faba bl 80059de <HAL_NVIC_EnableIRQ>
}
800346a: bf00 nop
800346c: 3708 adds r7, #8
800346e: 46bd mov sp, r7
8003470: bd80 pop {r7, pc}
8003472: bf00 nop
8003474: 40021000 .word 0x40021000
08003478 <MX_GPIO_Init>:
* @brief GPIO Initialization Function
* @param None
* @retval None
*/
static void MX_GPIO_Init(void)
{
8003478: b580 push {r7, lr}
800347a: b088 sub sp, #32
800347c: af00 add r7, sp, #0
GPIO_InitTypeDef GPIO_InitStruct = {0};
800347e: f107 0310 add.w r3, r7, #16
8003482: 2200 movs r2, #0
8003484: 601a str r2, [r3, #0]
8003486: 605a str r2, [r3, #4]
8003488: 609a str r2, [r3, #8]
800348a: 60da str r2, [r3, #12]
/* USER CODE BEGIN MX_GPIO_Init_1 */
/* USER CODE END MX_GPIO_Init_1 */
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
800348c: 4b4b ldr r3, [pc, #300] @ (80035bc <MX_GPIO_Init+0x144>)
800348e: 699b ldr r3, [r3, #24]
8003490: 4a4a ldr r2, [pc, #296] @ (80035bc <MX_GPIO_Init+0x144>)
8003492: f043 0310 orr.w r3, r3, #16
8003496: 6193 str r3, [r2, #24]
8003498: 4b48 ldr r3, [pc, #288] @ (80035bc <MX_GPIO_Init+0x144>)
800349a: 699b ldr r3, [r3, #24]
800349c: f003 0310 and.w r3, r3, #16
80034a0: 60fb str r3, [r7, #12]
80034a2: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOD_CLK_ENABLE();
80034a4: 4b45 ldr r3, [pc, #276] @ (80035bc <MX_GPIO_Init+0x144>)
80034a6: 699b ldr r3, [r3, #24]
80034a8: 4a44 ldr r2, [pc, #272] @ (80035bc <MX_GPIO_Init+0x144>)
80034aa: f043 0320 orr.w r3, r3, #32
80034ae: 6193 str r3, [r2, #24]
80034b0: 4b42 ldr r3, [pc, #264] @ (80035bc <MX_GPIO_Init+0x144>)
80034b2: 699b ldr r3, [r3, #24]
80034b4: f003 0320 and.w r3, r3, #32
80034b8: 60bb str r3, [r7, #8]
80034ba: 68bb ldr r3, [r7, #8]
__HAL_RCC_GPIOA_CLK_ENABLE();
80034bc: 4b3f ldr r3, [pc, #252] @ (80035bc <MX_GPIO_Init+0x144>)
80034be: 699b ldr r3, [r3, #24]
80034c0: 4a3e ldr r2, [pc, #248] @ (80035bc <MX_GPIO_Init+0x144>)
80034c2: f043 0304 orr.w r3, r3, #4
80034c6: 6193 str r3, [r2, #24]
80034c8: 4b3c ldr r3, [pc, #240] @ (80035bc <MX_GPIO_Init+0x144>)
80034ca: 699b ldr r3, [r3, #24]
80034cc: f003 0304 and.w r3, r3, #4
80034d0: 607b str r3, [r7, #4]
80034d2: 687b ldr r3, [r7, #4]
__HAL_RCC_GPIOB_CLK_ENABLE();
80034d4: 4b39 ldr r3, [pc, #228] @ (80035bc <MX_GPIO_Init+0x144>)
80034d6: 699b ldr r3, [r3, #24]
80034d8: 4a38 ldr r2, [pc, #224] @ (80035bc <MX_GPIO_Init+0x144>)
80034da: f043 0308 orr.w r3, r3, #8
80034de: 6193 str r3, [r2, #24]
80034e0: 4b36 ldr r3, [pc, #216] @ (80035bc <MX_GPIO_Init+0x144>)
80034e2: 699b ldr r3, [r3, #24]
80034e4: f003 0308 and.w r3, r3, #8
80034e8: 603b str r3, [r7, #0]
80034ea: 683b ldr r3, [r7, #0]
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(LED2_GPIO_Port, LED2_Pin, GPIO_PIN_RESET);
80034ec: 2200 movs r2, #0
80034ee: f44f 5100 mov.w r1, #8192 @ 0x2000
80034f2: 4833 ldr r0, [pc, #204] @ (80035c0 <MX_GPIO_Init+0x148>)
80034f4: f003 f81d bl 8006532 <HAL_GPIO_WritePin>
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOB, INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
80034f8: 2200 movs r2, #0
80034fa: f640 413e movw r1, #3134 @ 0xc3e
80034fe: 4831 ldr r0, [pc, #196] @ (80035c4 <MX_GPIO_Init+0x14c>)
8003500: f003 f817 bl 8006532 <HAL_GPIO_WritePin>
|EXP1_Pin|EXP2_Pin|EXP3_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, BUZ_Pin|LED1_Pin, GPIO_PIN_RESET);
8003504: 2200 movs r2, #0
8003506: f44f 4101 mov.w r1, #33024 @ 0x8100
800350a: 482f ldr r0, [pc, #188] @ (80035c8 <MX_GPIO_Init+0x150>)
800350c: f003 f811 bl 8006532 <HAL_GPIO_WritePin>
/*Configure GPIO pin : LED2_Pin */
GPIO_InitStruct.Pin = LED2_Pin;
8003510: f44f 5300 mov.w r3, #8192 @ 0x2000
8003514: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8003516: 2301 movs r3, #1
8003518: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800351a: 2300 movs r3, #0
800351c: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800351e: 2302 movs r3, #2
8003520: 61fb str r3, [r7, #28]
HAL_GPIO_Init(LED2_GPIO_Port, &GPIO_InitStruct);
8003522: f107 0310 add.w r3, r7, #16
8003526: 4619 mov r1, r3
8003528: 4825 ldr r0, [pc, #148] @ (80035c0 <MX_GPIO_Init+0x148>)
800352a: f002 fe67 bl 80061fc <HAL_GPIO_Init>
/*Configure GPIO pins : P1_Pin P2_Pin */
GPIO_InitStruct.Pin = P1_Pin|P2_Pin;
800352e: f44f 4340 mov.w r3, #49152 @ 0xc000
8003532: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8003534: 2300 movs r3, #0
8003536: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003538: 2300 movs r3, #0
800353a: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
800353c: f107 0310 add.w r3, r7, #16
8003540: 4619 mov r1, r3
8003542: 481f ldr r0, [pc, #124] @ (80035c0 <MX_GPIO_Init+0x148>)
8003544: f002 fe5a bl 80061fc <HAL_GPIO_Init>
/*Configure GPIO pin : AIN1_Pin */
GPIO_InitStruct.Pin = AIN1_Pin;
8003548: 2310 movs r3, #16
800354a: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
800354c: 2303 movs r3, #3
800354e: 617b str r3, [r7, #20]
HAL_GPIO_Init(AIN1_GPIO_Port, &GPIO_InitStruct);
8003550: f107 0310 add.w r3, r7, #16
8003554: 4619 mov r1, r3
8003556: 481c ldr r0, [pc, #112] @ (80035c8 <MX_GPIO_Init+0x150>)
8003558: f002 fe50 bl 80061fc <HAL_GPIO_Init>
/*Configure GPIO pins : INH1_Pin INH2_Pin INH3_Pin INH4_Pin
EXP1_Pin EXP2_Pin EXP3_Pin */
GPIO_InitStruct.Pin = INH1_Pin|INH2_Pin|INH3_Pin|INH4_Pin
800355c: f640 433e movw r3, #3134 @ 0xc3e
8003560: 613b str r3, [r7, #16]
|EXP1_Pin|EXP2_Pin|EXP3_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
8003562: 2301 movs r3, #1
8003564: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003566: 2300 movs r3, #0
8003568: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
800356a: 2302 movs r3, #2
800356c: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
800356e: f107 0310 add.w r3, r7, #16
8003572: 4619 mov r1, r3
8003574: 4813 ldr r0, [pc, #76] @ (80035c4 <MX_GPIO_Init+0x14c>)
8003576: f002 fe41 bl 80061fc <HAL_GPIO_Init>
/*Configure GPIO pins : CH1_Pin CH2_Pin CH3_Pin CH4_Pin */
GPIO_InitStruct.Pin = CH1_Pin|CH2_Pin|CH3_Pin|CH4_Pin;
800357a: f44f 4370 mov.w r3, #61440 @ 0xf000
800357e: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8003580: 2300 movs r3, #0
8003582: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8003584: 2300 movs r3, #0
8003586: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8003588: f107 0310 add.w r3, r7, #16
800358c: 4619 mov r1, r3
800358e: 480d ldr r0, [pc, #52] @ (80035c4 <MX_GPIO_Init+0x14c>)
8003590: f002 fe34 bl 80061fc <HAL_GPIO_Init>
/*Configure GPIO pins : BUZ_Pin LED1_Pin */
GPIO_InitStruct.Pin = BUZ_Pin|LED1_Pin;
8003594: f44f 4301 mov.w r3, #33024 @ 0x8100
8003598: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
800359a: 2301 movs r3, #1
800359c: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
800359e: 2300 movs r3, #0
80035a0: 61bb str r3, [r7, #24]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
80035a2: 2302 movs r3, #2
80035a4: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
80035a6: f107 0310 add.w r3, r7, #16
80035aa: 4619 mov r1, r3
80035ac: 4806 ldr r0, [pc, #24] @ (80035c8 <MX_GPIO_Init+0x150>)
80035ae: f002 fe25 bl 80061fc <HAL_GPIO_Init>
/* USER CODE BEGIN MX_GPIO_Init_2 */
/* USER CODE END MX_GPIO_Init_2 */
}
80035b2: bf00 nop
80035b4: 3720 adds r7, #32
80035b6: 46bd mov sp, r7
80035b8: bd80 pop {r7, pc}
80035ba: bf00 nop
80035bc: 40021000 .word 0x40021000
80035c0: 40011000 .word 0x40011000
80035c4: 40010c00 .word 0x40010c00
80035c8: 40010800 .word 0x40010800
080035cc <Error_Handler>:
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
80035cc: b480 push {r7}
80035ce: af00 add r7, sp, #0
\details Disables IRQ interrupts by setting the I-bit in the CPSR.
Can only be executed in Privileged modes.
*/
__STATIC_FORCEINLINE void __disable_irq(void)
{
__ASM volatile ("cpsid i" : : : "memory");
80035d0: b672 cpsid i
}
80035d2: bf00 nop
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
80035d4: bf00 nop
80035d6: e7fd b.n 80035d4 <Error_Handler+0x8>
080035d8 <m1ap>:
extern uint16_t mrampstart[4];
extern uint16_t tramp;
extern UART_HandleTypeDef huart1;
motMov_st m1ap(void){
80035d8: b580 push {r7, lr}
80035da: b09c sub sp, #112 @ 0x70
80035dc: af02 add r7, sp, #8
static motMov_st m1st=motWaiting;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
80035de: 4b5d ldr r3, [pc, #372] @ (8003754 <m1ap+0x17c>)
80035e0: 781a ldrb r2, [r3, #0]
80035e2: 4b5d ldr r3, [pc, #372] @ (8003758 <m1ap+0x180>)
80035e4: 781b ldrb r3, [r3, #0]
80035e6: 429a cmp r2, r3
80035e8: d017 beq.n 800361a <m1ap+0x42>
memm1st=m1st;
80035ea: 4b5b ldr r3, [pc, #364] @ (8003758 <m1ap+0x180>)
80035ec: 781a ldrb r2, [r3, #0]
80035ee: 4b59 ldr r3, [pc, #356] @ (8003754 <m1ap+0x17c>)
80035f0: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ap=%d",m1st);
80035f2: 4b59 ldr r3, [pc, #356] @ (8003758 <m1ap+0x180>)
80035f4: 781b ldrb r3, [r3, #0]
80035f6: 461a mov r2, r3
80035f8: 1d3b adds r3, r7, #4
80035fa: 4958 ldr r1, [pc, #352] @ (800375c <m1ap+0x184>)
80035fc: 4618 mov r0, r3
80035fe: f00a fe87 bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003602: 1d3b adds r3, r7, #4
8003604: 4618 mov r0, r3
8003606: f7fc fda1 bl 800014c <strlen>
800360a: 4603 mov r3, r0
800360c: b29a uxth r2, r3
800360e: 1d39 adds r1, r7, #4
8003610: f04f 33ff mov.w r3, #4294967295
8003614: 4852 ldr r0, [pc, #328] @ (8003760 <m1ap+0x188>)
8003616: f006 f88b bl 8009730 <HAL_UART_Transmit>
}
if(rtCiclo<apM1start)m1st=motWaiting;
800361a: 4b52 ldr r3, [pc, #328] @ (8003764 <m1ap+0x18c>)
800361c: 881b ldrh r3, [r3, #0]
800361e: b29a uxth r2, r3
8003620: 4b51 ldr r3, [pc, #324] @ (8003768 <m1ap+0x190>)
8003622: 881b ldrh r3, [r3, #0]
8003624: 429a cmp r2, r3
8003626: d202 bcs.n 800362e <m1ap+0x56>
8003628: 4b4b ldr r3, [pc, #300] @ (8003758 <m1ap+0x180>)
800362a: 2200 movs r2, #0
800362c: 701a strb r2, [r3, #0]
switch(m1st){
800362e: 4b4a ldr r3, [pc, #296] @ (8003758 <m1ap+0x180>)
8003630: 781b ldrb r3, [r3, #0]
8003632: 2b03 cmp r3, #3
8003634: d876 bhi.n 8003724 <m1ap+0x14c>
8003636: a201 add r2, pc, #4 @ (adr r2, 800363c <m1ap+0x64>)
8003638: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800363c: 0800364d .word 0x0800364d
8003640: 08003699 .word 0x08003699
8003644: 080036c9 .word 0x080036c9
8003648: 080036fb .word 0x080036fb
case motWaiting:
SetMotPerc(M1,FW,0);
800364c: 2200 movs r2, #0
800364e: 2100 movs r1, #0
8003650: 2001 movs r0, #1
8003652: f001 f83f bl 80046d4 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003656: 2200 movs r2, #0
8003658: 2101 movs r1, #1
800365a: 2001 movs r0, #1
800365c: f001 f83a bl 80046d4 <SetMotPerc>
if(rtCiclo>=apM1start){
8003660: 4b40 ldr r3, [pc, #256] @ (8003764 <m1ap+0x18c>)
8003662: 881b ldrh r3, [r3, #0]
8003664: b29a uxth r2, r3
8003666: 4b40 ldr r3, [pc, #256] @ (8003768 <m1ap+0x190>)
8003668: 881b ldrh r3, [r3, #0]
800366a: 429a cmp r2, r3
800366c: d365 bcc.n 800373a <m1ap+0x162>
(void)ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPINIT);
800366e: 4b3f ldr r3, [pc, #252] @ (800376c <m1ap+0x194>)
8003670: 881b ldrh r3, [r3, #0]
8003672: b2da uxtb r2, r3
8003674: 4b3e ldr r3, [pc, #248] @ (8003770 <m1ap+0x198>)
8003676: 881b ldrh r3, [r3, #0]
8003678: b2d9 uxtb r1, r3
800367a: 4b3e ldr r3, [pc, #248] @ (8003774 <m1ap+0x19c>)
800367c: 881b ldrh r3, [r3, #0]
800367e: b2db uxtb r3, r3
8003680: 2000 movs r0, #0
8003682: 9001 str r0, [sp, #4]
8003684: 9300 str r3, [sp, #0]
8003686: 460b mov r3, r1
8003688: 2100 movs r1, #0
800368a: 2001 movs r0, #1
800368c: f001 f9a2 bl 80049d4 <ramp>
m1st=motStartRamp;
8003690: 4b31 ldr r3, [pc, #196] @ (8003758 <m1ap+0x180>)
8003692: 2201 movs r2, #1
8003694: 701a strb r2, [r3, #0]
}
break;
8003696: e050 b.n 800373a <m1ap+0x162>
case motStartRamp:
if(ramp(M1,FW,mrampstart[M1-1],m1pwmap,tramp,RAMPRUN)==DONE){
8003698: 4b34 ldr r3, [pc, #208] @ (800376c <m1ap+0x194>)
800369a: 881b ldrh r3, [r3, #0]
800369c: b2da uxtb r2, r3
800369e: 4b34 ldr r3, [pc, #208] @ (8003770 <m1ap+0x198>)
80036a0: 881b ldrh r3, [r3, #0]
80036a2: b2d9 uxtb r1, r3
80036a4: 4b33 ldr r3, [pc, #204] @ (8003774 <m1ap+0x19c>)
80036a6: 881b ldrh r3, [r3, #0]
80036a8: b2db uxtb r3, r3
80036aa: 200a movs r0, #10
80036ac: 9001 str r0, [sp, #4]
80036ae: 9300 str r3, [sp, #0]
80036b0: 460b mov r3, r1
80036b2: 2100 movs r1, #0
80036b4: 2001 movs r0, #1
80036b6: f001 f98d bl 80049d4 <ramp>
80036ba: 4603 mov r3, r0
80036bc: 2b00 cmp r3, #0
80036be: d13e bne.n 800373e <m1ap+0x166>
m1st=motWaitingTime;
80036c0: 4b25 ldr r3, [pc, #148] @ (8003758 <m1ap+0x180>)
80036c2: 2202 movs r2, #2
80036c4: 701a strb r2, [r3, #0]
}
break;
80036c6: e03a b.n 800373e <m1ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM1stop){
80036c8: 4b26 ldr r3, [pc, #152] @ (8003764 <m1ap+0x18c>)
80036ca: 881b ldrh r3, [r3, #0]
80036cc: b29a uxth r2, r3
80036ce: 4b2a ldr r3, [pc, #168] @ (8003778 <m1ap+0x1a0>)
80036d0: 881b ldrh r3, [r3, #0]
80036d2: 429a cmp r2, r3
80036d4: d335 bcc.n 8003742 <m1ap+0x16a>
(void)ramp(M1,FW,m1pwmap,0,tramp,RAMPINIT);
80036d6: 4b26 ldr r3, [pc, #152] @ (8003770 <m1ap+0x198>)
80036d8: 881b ldrh r3, [r3, #0]
80036da: b2da uxtb r2, r3
80036dc: 4b25 ldr r3, [pc, #148] @ (8003774 <m1ap+0x19c>)
80036de: 881b ldrh r3, [r3, #0]
80036e0: b2db uxtb r3, r3
80036e2: 2100 movs r1, #0
80036e4: 9101 str r1, [sp, #4]
80036e6: 9300 str r3, [sp, #0]
80036e8: 2300 movs r3, #0
80036ea: 2100 movs r1, #0
80036ec: 2001 movs r0, #1
80036ee: f001 f971 bl 80049d4 <ramp>
m1st=motStopRamp;
80036f2: 4b19 ldr r3, [pc, #100] @ (8003758 <m1ap+0x180>)
80036f4: 2203 movs r2, #3
80036f6: 701a strb r2, [r3, #0]
}
break;
80036f8: e023 b.n 8003742 <m1ap+0x16a>
case motStopRamp:
if(ramp(M1,FW,m1pwmap,0,tramp,RAMPRUN)==DONE){
80036fa: 4b1d ldr r3, [pc, #116] @ (8003770 <m1ap+0x198>)
80036fc: 881b ldrh r3, [r3, #0]
80036fe: b2da uxtb r2, r3
8003700: 4b1c ldr r3, [pc, #112] @ (8003774 <m1ap+0x19c>)
8003702: 881b ldrh r3, [r3, #0]
8003704: b2db uxtb r3, r3
8003706: 210a movs r1, #10
8003708: 9101 str r1, [sp, #4]
800370a: 9300 str r3, [sp, #0]
800370c: 2300 movs r3, #0
800370e: 2100 movs r1, #0
8003710: 2001 movs r0, #1
8003712: f001 f95f bl 80049d4 <ramp>
8003716: 4603 mov r3, r0
8003718: 2b00 cmp r3, #0
800371a: d114 bne.n 8003746 <m1ap+0x16e>
m1st=motStop;
800371c: 4b0e ldr r3, [pc, #56] @ (8003758 <m1ap+0x180>)
800371e: 2204 movs r2, #4
8003720: 701a strb r2, [r3, #0]
}
break;
8003722: e010 b.n 8003746 <m1ap+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
8003724: 2200 movs r2, #0
8003726: 2100 movs r1, #0
8003728: 2001 movs r0, #1
800372a: f000 ffd3 bl 80046d4 <SetMotPerc>
SetMotPerc(M1,BW,0);
800372e: 2200 movs r2, #0
8003730: 2101 movs r1, #1
8003732: 2001 movs r0, #1
8003734: f000 ffce bl 80046d4 <SetMotPerc>
break;
8003738: e006 b.n 8003748 <m1ap+0x170>
break;
800373a: bf00 nop
800373c: e004 b.n 8003748 <m1ap+0x170>
break;
800373e: bf00 nop
8003740: e002 b.n 8003748 <m1ap+0x170>
break;
8003742: bf00 nop
8003744: e000 b.n 8003748 <m1ap+0x170>
break;
8003746: bf00 nop
}
return m1st;
8003748: 4b03 ldr r3, [pc, #12] @ (8003758 <m1ap+0x180>)
800374a: 781b ldrb r3, [r3, #0]
}
800374c: 4618 mov r0, r3
800374e: 3768 adds r7, #104 @ 0x68
8003750: 46bd mov sp, r7
8003752: bd80 pop {r7, pc}
8003754: 20000007 .word 0x20000007
8003758: 20000462 .word 0x20000462
800375c: 0800f26c .word 0x0800f26c
8003760: 200003a8 .word 0x200003a8
8003764: 200003fc .word 0x200003fc
8003768: 20000428 .word 0x20000428
800376c: 2000044c .word 0x2000044c
8003770: 20000400 .word 0x20000400
8003774: 20000418 .word 0x20000418
8003778: 2000042a .word 0x2000042a
0800377c <m2ap>:
motMov_st m2ap(void){
800377c: b580 push {r7, lr}
800377e: b09c sub sp, #112 @ 0x70
8003780: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
8003782: 4b5d ldr r3, [pc, #372] @ (80038f8 <m2ap+0x17c>)
8003784: 781a ldrb r2, [r3, #0]
8003786: 4b5d ldr r3, [pc, #372] @ (80038fc <m2ap+0x180>)
8003788: 781b ldrb r3, [r3, #0]
800378a: 429a cmp r2, r3
800378c: d017 beq.n 80037be <m2ap+0x42>
memm2st=m2st;
800378e: 4b5b ldr r3, [pc, #364] @ (80038fc <m2ap+0x180>)
8003790: 781a ldrb r2, [r3, #0]
8003792: 4b59 ldr r3, [pc, #356] @ (80038f8 <m2ap+0x17c>)
8003794: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ap=%d",m2st);
8003796: 4b59 ldr r3, [pc, #356] @ (80038fc <m2ap+0x180>)
8003798: 781b ldrb r3, [r3, #0]
800379a: 461a mov r2, r3
800379c: 1d3b adds r3, r7, #4
800379e: 4958 ldr r1, [pc, #352] @ (8003900 <m2ap+0x184>)
80037a0: 4618 mov r0, r3
80037a2: f00a fdb5 bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
80037a6: 1d3b adds r3, r7, #4
80037a8: 4618 mov r0, r3
80037aa: f7fc fccf bl 800014c <strlen>
80037ae: 4603 mov r3, r0
80037b0: b29a uxth r2, r3
80037b2: 1d39 adds r1, r7, #4
80037b4: f04f 33ff mov.w r3, #4294967295
80037b8: 4852 ldr r0, [pc, #328] @ (8003904 <m2ap+0x188>)
80037ba: f005 ffb9 bl 8009730 <HAL_UART_Transmit>
}
if(rtCiclo<apM2start)m2st=motWaiting;
80037be: 4b52 ldr r3, [pc, #328] @ (8003908 <m2ap+0x18c>)
80037c0: 881b ldrh r3, [r3, #0]
80037c2: b29a uxth r2, r3
80037c4: 4b51 ldr r3, [pc, #324] @ (800390c <m2ap+0x190>)
80037c6: 881b ldrh r3, [r3, #0]
80037c8: 429a cmp r2, r3
80037ca: d202 bcs.n 80037d2 <m2ap+0x56>
80037cc: 4b4b ldr r3, [pc, #300] @ (80038fc <m2ap+0x180>)
80037ce: 2200 movs r2, #0
80037d0: 701a strb r2, [r3, #0]
switch(m2st){
80037d2: 4b4a ldr r3, [pc, #296] @ (80038fc <m2ap+0x180>)
80037d4: 781b ldrb r3, [r3, #0]
80037d6: 2b03 cmp r3, #3
80037d8: d876 bhi.n 80038c8 <m2ap+0x14c>
80037da: a201 add r2, pc, #4 @ (adr r2, 80037e0 <m2ap+0x64>)
80037dc: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80037e0: 080037f1 .word 0x080037f1
80037e4: 0800383d .word 0x0800383d
80037e8: 0800386d .word 0x0800386d
80037ec: 0800389f .word 0x0800389f
case motWaiting:
SetMotPerc(M2,FW,0);
80037f0: 2200 movs r2, #0
80037f2: 2100 movs r1, #0
80037f4: 2002 movs r0, #2
80037f6: f000 ff6d bl 80046d4 <SetMotPerc>
SetMotPerc(M2,BW,0);
80037fa: 2200 movs r2, #0
80037fc: 2101 movs r1, #1
80037fe: 2002 movs r0, #2
8003800: f000 ff68 bl 80046d4 <SetMotPerc>
if(rtCiclo>=apM2start){
8003804: 4b40 ldr r3, [pc, #256] @ (8003908 <m2ap+0x18c>)
8003806: 881b ldrh r3, [r3, #0]
8003808: b29a uxth r2, r3
800380a: 4b40 ldr r3, [pc, #256] @ (800390c <m2ap+0x190>)
800380c: 881b ldrh r3, [r3, #0]
800380e: 429a cmp r2, r3
8003810: d365 bcc.n 80038de <m2ap+0x162>
(void)ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPINIT);
8003812: 4b3f ldr r3, [pc, #252] @ (8003910 <m2ap+0x194>)
8003814: 885b ldrh r3, [r3, #2]
8003816: b2da uxtb r2, r3
8003818: 4b3e ldr r3, [pc, #248] @ (8003914 <m2ap+0x198>)
800381a: 881b ldrh r3, [r3, #0]
800381c: b2d9 uxtb r1, r3
800381e: 4b3e ldr r3, [pc, #248] @ (8003918 <m2ap+0x19c>)
8003820: 881b ldrh r3, [r3, #0]
8003822: b2db uxtb r3, r3
8003824: 2000 movs r0, #0
8003826: 9001 str r0, [sp, #4]
8003828: 9300 str r3, [sp, #0]
800382a: 460b mov r3, r1
800382c: 2101 movs r1, #1
800382e: 2002 movs r0, #2
8003830: f001 f8d0 bl 80049d4 <ramp>
m2st=motStartRamp;
8003834: 4b31 ldr r3, [pc, #196] @ (80038fc <m2ap+0x180>)
8003836: 2201 movs r2, #1
8003838: 701a strb r2, [r3, #0]
}
break;
800383a: e050 b.n 80038de <m2ap+0x162>
case motStartRamp:
if(ramp(M2,BW,mrampstart[M2-1],m2pwmap,tramp,RAMPRUN)==DONE){
800383c: 4b34 ldr r3, [pc, #208] @ (8003910 <m2ap+0x194>)
800383e: 885b ldrh r3, [r3, #2]
8003840: b2da uxtb r2, r3
8003842: 4b34 ldr r3, [pc, #208] @ (8003914 <m2ap+0x198>)
8003844: 881b ldrh r3, [r3, #0]
8003846: b2d9 uxtb r1, r3
8003848: 4b33 ldr r3, [pc, #204] @ (8003918 <m2ap+0x19c>)
800384a: 881b ldrh r3, [r3, #0]
800384c: b2db uxtb r3, r3
800384e: 200a movs r0, #10
8003850: 9001 str r0, [sp, #4]
8003852: 9300 str r3, [sp, #0]
8003854: 460b mov r3, r1
8003856: 2101 movs r1, #1
8003858: 2002 movs r0, #2
800385a: f001 f8bb bl 80049d4 <ramp>
800385e: 4603 mov r3, r0
8003860: 2b00 cmp r3, #0
8003862: d13e bne.n 80038e2 <m2ap+0x166>
m2st=motWaitingTime;
8003864: 4b25 ldr r3, [pc, #148] @ (80038fc <m2ap+0x180>)
8003866: 2202 movs r2, #2
8003868: 701a strb r2, [r3, #0]
}
break;
800386a: e03a b.n 80038e2 <m2ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM2stop){
800386c: 4b26 ldr r3, [pc, #152] @ (8003908 <m2ap+0x18c>)
800386e: 881b ldrh r3, [r3, #0]
8003870: b29a uxth r2, r3
8003872: 4b2a ldr r3, [pc, #168] @ (800391c <m2ap+0x1a0>)
8003874: 881b ldrh r3, [r3, #0]
8003876: 429a cmp r2, r3
8003878: d335 bcc.n 80038e6 <m2ap+0x16a>
(void)ramp(M2,BW,m2pwmap,0,tramp,RAMPINIT);
800387a: 4b26 ldr r3, [pc, #152] @ (8003914 <m2ap+0x198>)
800387c: 881b ldrh r3, [r3, #0]
800387e: b2da uxtb r2, r3
8003880: 4b25 ldr r3, [pc, #148] @ (8003918 <m2ap+0x19c>)
8003882: 881b ldrh r3, [r3, #0]
8003884: b2db uxtb r3, r3
8003886: 2100 movs r1, #0
8003888: 9101 str r1, [sp, #4]
800388a: 9300 str r3, [sp, #0]
800388c: 2300 movs r3, #0
800388e: 2101 movs r1, #1
8003890: 2002 movs r0, #2
8003892: f001 f89f bl 80049d4 <ramp>
m2st=motStopRamp;
8003896: 4b19 ldr r3, [pc, #100] @ (80038fc <m2ap+0x180>)
8003898: 2203 movs r2, #3
800389a: 701a strb r2, [r3, #0]
}
break;
800389c: e023 b.n 80038e6 <m2ap+0x16a>
case motStopRamp:
if(ramp(M2,BW,m2pwmap,0,tramp,RAMPRUN)==DONE){
800389e: 4b1d ldr r3, [pc, #116] @ (8003914 <m2ap+0x198>)
80038a0: 881b ldrh r3, [r3, #0]
80038a2: b2da uxtb r2, r3
80038a4: 4b1c ldr r3, [pc, #112] @ (8003918 <m2ap+0x19c>)
80038a6: 881b ldrh r3, [r3, #0]
80038a8: b2db uxtb r3, r3
80038aa: 210a movs r1, #10
80038ac: 9101 str r1, [sp, #4]
80038ae: 9300 str r3, [sp, #0]
80038b0: 2300 movs r3, #0
80038b2: 2101 movs r1, #1
80038b4: 2002 movs r0, #2
80038b6: f001 f88d bl 80049d4 <ramp>
80038ba: 4603 mov r3, r0
80038bc: 2b00 cmp r3, #0
80038be: d114 bne.n 80038ea <m2ap+0x16e>
m2st=motStop;
80038c0: 4b0e ldr r3, [pc, #56] @ (80038fc <m2ap+0x180>)
80038c2: 2204 movs r2, #4
80038c4: 701a strb r2, [r3, #0]
}
break;
80038c6: e010 b.n 80038ea <m2ap+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
80038c8: 2200 movs r2, #0
80038ca: 2100 movs r1, #0
80038cc: 2002 movs r0, #2
80038ce: f000 ff01 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,BW,0);
80038d2: 2200 movs r2, #0
80038d4: 2101 movs r1, #1
80038d6: 2002 movs r0, #2
80038d8: f000 fefc bl 80046d4 <SetMotPerc>
break;
80038dc: e006 b.n 80038ec <m2ap+0x170>
break;
80038de: bf00 nop
80038e0: e004 b.n 80038ec <m2ap+0x170>
break;
80038e2: bf00 nop
80038e4: e002 b.n 80038ec <m2ap+0x170>
break;
80038e6: bf00 nop
80038e8: e000 b.n 80038ec <m2ap+0x170>
break;
80038ea: bf00 nop
}
return m2st;
80038ec: 4b03 ldr r3, [pc, #12] @ (80038fc <m2ap+0x180>)
80038ee: 781b ldrb r3, [r3, #0]
}
80038f0: 4618 mov r0, r3
80038f2: 3768 adds r7, #104 @ 0x68
80038f4: 46bd mov sp, r7
80038f6: bd80 pop {r7, pc}
80038f8: 20000008 .word 0x20000008
80038fc: 20000463 .word 0x20000463
8003900: 0800f278 .word 0x0800f278
8003904: 200003a8 .word 0x200003a8
8003908: 200003fc .word 0x200003fc
800390c: 2000042c .word 0x2000042c
8003910: 2000044c .word 0x2000044c
8003914: 20000404 .word 0x20000404
8003918: 20000418 .word 0x20000418
800391c: 2000042e .word 0x2000042e
08003920 <m3ap>:
motMov_st m3ap(void){
8003920: b580 push {r7, lr}
8003922: b09c sub sp, #112 @ 0x70
8003924: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
8003926: 4b5d ldr r3, [pc, #372] @ (8003a9c <m3ap+0x17c>)
8003928: 781a ldrb r2, [r3, #0]
800392a: 4b5d ldr r3, [pc, #372] @ (8003aa0 <m3ap+0x180>)
800392c: 781b ldrb r3, [r3, #0]
800392e: 429a cmp r2, r3
8003930: d017 beq.n 8003962 <m3ap+0x42>
memm3st=m3st;
8003932: 4b5b ldr r3, [pc, #364] @ (8003aa0 <m3ap+0x180>)
8003934: 781a ldrb r2, [r3, #0]
8003936: 4b59 ldr r3, [pc, #356] @ (8003a9c <m3ap+0x17c>)
8003938: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ap=%d",m3st);
800393a: 4b59 ldr r3, [pc, #356] @ (8003aa0 <m3ap+0x180>)
800393c: 781b ldrb r3, [r3, #0]
800393e: 461a mov r2, r3
8003940: 1d3b adds r3, r7, #4
8003942: 4958 ldr r1, [pc, #352] @ (8003aa4 <m3ap+0x184>)
8003944: 4618 mov r0, r3
8003946: f00a fce3 bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800394a: 1d3b adds r3, r7, #4
800394c: 4618 mov r0, r3
800394e: f7fc fbfd bl 800014c <strlen>
8003952: 4603 mov r3, r0
8003954: b29a uxth r2, r3
8003956: 1d39 adds r1, r7, #4
8003958: f04f 33ff mov.w r3, #4294967295
800395c: 4852 ldr r0, [pc, #328] @ (8003aa8 <m3ap+0x188>)
800395e: f005 fee7 bl 8009730 <HAL_UART_Transmit>
}
if(rtCiclo<apM3start)m3st=motWaiting;
8003962: 4b52 ldr r3, [pc, #328] @ (8003aac <m3ap+0x18c>)
8003964: 881b ldrh r3, [r3, #0]
8003966: b29a uxth r2, r3
8003968: 4b51 ldr r3, [pc, #324] @ (8003ab0 <m3ap+0x190>)
800396a: 881b ldrh r3, [r3, #0]
800396c: 429a cmp r2, r3
800396e: d202 bcs.n 8003976 <m3ap+0x56>
8003970: 4b4b ldr r3, [pc, #300] @ (8003aa0 <m3ap+0x180>)
8003972: 2200 movs r2, #0
8003974: 701a strb r2, [r3, #0]
switch(m3st){
8003976: 4b4a ldr r3, [pc, #296] @ (8003aa0 <m3ap+0x180>)
8003978: 781b ldrb r3, [r3, #0]
800397a: 2b03 cmp r3, #3
800397c: d876 bhi.n 8003a6c <m3ap+0x14c>
800397e: a201 add r2, pc, #4 @ (adr r2, 8003984 <m3ap+0x64>)
8003980: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003984: 08003995 .word 0x08003995
8003988: 080039e1 .word 0x080039e1
800398c: 08003a11 .word 0x08003a11
8003990: 08003a43 .word 0x08003a43
case motWaiting:
SetMotPerc(M3,FW,0);
8003994: 2200 movs r2, #0
8003996: 2100 movs r1, #0
8003998: 2003 movs r0, #3
800399a: f000 fe9b bl 80046d4 <SetMotPerc>
SetMotPerc(M3,BW,0);
800399e: 2200 movs r2, #0
80039a0: 2101 movs r1, #1
80039a2: 2003 movs r0, #3
80039a4: f000 fe96 bl 80046d4 <SetMotPerc>
if(rtCiclo>=apM3start){
80039a8: 4b40 ldr r3, [pc, #256] @ (8003aac <m3ap+0x18c>)
80039aa: 881b ldrh r3, [r3, #0]
80039ac: b29a uxth r2, r3
80039ae: 4b40 ldr r3, [pc, #256] @ (8003ab0 <m3ap+0x190>)
80039b0: 881b ldrh r3, [r3, #0]
80039b2: 429a cmp r2, r3
80039b4: d365 bcc.n 8003a82 <m3ap+0x162>
(void)ramp(M3,FW,mrampstart[M3-1],m2pwmap,tramp,RAMPINIT);
80039b6: 4b3f ldr r3, [pc, #252] @ (8003ab4 <m3ap+0x194>)
80039b8: 889b ldrh r3, [r3, #4]
80039ba: b2da uxtb r2, r3
80039bc: 4b3e ldr r3, [pc, #248] @ (8003ab8 <m3ap+0x198>)
80039be: 881b ldrh r3, [r3, #0]
80039c0: b2d9 uxtb r1, r3
80039c2: 4b3e ldr r3, [pc, #248] @ (8003abc <m3ap+0x19c>)
80039c4: 881b ldrh r3, [r3, #0]
80039c6: b2db uxtb r3, r3
80039c8: 2000 movs r0, #0
80039ca: 9001 str r0, [sp, #4]
80039cc: 9300 str r3, [sp, #0]
80039ce: 460b mov r3, r1
80039d0: 2100 movs r1, #0
80039d2: 2003 movs r0, #3
80039d4: f000 fffe bl 80049d4 <ramp>
m3st=motStartRamp;
80039d8: 4b31 ldr r3, [pc, #196] @ (8003aa0 <m3ap+0x180>)
80039da: 2201 movs r2, #1
80039dc: 701a strb r2, [r3, #0]
}
break;
80039de: e050 b.n 8003a82 <m3ap+0x162>
case motStartRamp:
if(ramp(M3,FW,mrampstart[M3-1],m3pwmap,tramp,RAMPRUN)==DONE){
80039e0: 4b34 ldr r3, [pc, #208] @ (8003ab4 <m3ap+0x194>)
80039e2: 889b ldrh r3, [r3, #4]
80039e4: b2da uxtb r2, r3
80039e6: 4b36 ldr r3, [pc, #216] @ (8003ac0 <m3ap+0x1a0>)
80039e8: 881b ldrh r3, [r3, #0]
80039ea: b2d9 uxtb r1, r3
80039ec: 4b33 ldr r3, [pc, #204] @ (8003abc <m3ap+0x19c>)
80039ee: 881b ldrh r3, [r3, #0]
80039f0: b2db uxtb r3, r3
80039f2: 200a movs r0, #10
80039f4: 9001 str r0, [sp, #4]
80039f6: 9300 str r3, [sp, #0]
80039f8: 460b mov r3, r1
80039fa: 2100 movs r1, #0
80039fc: 2003 movs r0, #3
80039fe: f000 ffe9 bl 80049d4 <ramp>
8003a02: 4603 mov r3, r0
8003a04: 2b00 cmp r3, #0
8003a06: d13e bne.n 8003a86 <m3ap+0x166>
m3st=motWaitingTime;
8003a08: 4b25 ldr r3, [pc, #148] @ (8003aa0 <m3ap+0x180>)
8003a0a: 2202 movs r2, #2
8003a0c: 701a strb r2, [r3, #0]
}
break;
8003a0e: e03a b.n 8003a86 <m3ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM3stop){
8003a10: 4b26 ldr r3, [pc, #152] @ (8003aac <m3ap+0x18c>)
8003a12: 881b ldrh r3, [r3, #0]
8003a14: b29a uxth r2, r3
8003a16: 4b2b ldr r3, [pc, #172] @ (8003ac4 <m3ap+0x1a4>)
8003a18: 881b ldrh r3, [r3, #0]
8003a1a: 429a cmp r2, r3
8003a1c: d335 bcc.n 8003a8a <m3ap+0x16a>
(void)ramp(M3,FW,m3pwmap,0,tramp,RAMPINIT);
8003a1e: 4b28 ldr r3, [pc, #160] @ (8003ac0 <m3ap+0x1a0>)
8003a20: 881b ldrh r3, [r3, #0]
8003a22: b2da uxtb r2, r3
8003a24: 4b25 ldr r3, [pc, #148] @ (8003abc <m3ap+0x19c>)
8003a26: 881b ldrh r3, [r3, #0]
8003a28: b2db uxtb r3, r3
8003a2a: 2100 movs r1, #0
8003a2c: 9101 str r1, [sp, #4]
8003a2e: 9300 str r3, [sp, #0]
8003a30: 2300 movs r3, #0
8003a32: 2100 movs r1, #0
8003a34: 2003 movs r0, #3
8003a36: f000 ffcd bl 80049d4 <ramp>
m3st=motStopRamp;
8003a3a: 4b19 ldr r3, [pc, #100] @ (8003aa0 <m3ap+0x180>)
8003a3c: 2203 movs r2, #3
8003a3e: 701a strb r2, [r3, #0]
}
break;
8003a40: e023 b.n 8003a8a <m3ap+0x16a>
case motStopRamp:
if(ramp(M3,FW,m3pwmap,0,tramp,RAMPRUN)==DONE){
8003a42: 4b1f ldr r3, [pc, #124] @ (8003ac0 <m3ap+0x1a0>)
8003a44: 881b ldrh r3, [r3, #0]
8003a46: b2da uxtb r2, r3
8003a48: 4b1c ldr r3, [pc, #112] @ (8003abc <m3ap+0x19c>)
8003a4a: 881b ldrh r3, [r3, #0]
8003a4c: b2db uxtb r3, r3
8003a4e: 210a movs r1, #10
8003a50: 9101 str r1, [sp, #4]
8003a52: 9300 str r3, [sp, #0]
8003a54: 2300 movs r3, #0
8003a56: 2100 movs r1, #0
8003a58: 2003 movs r0, #3
8003a5a: f000 ffbb bl 80049d4 <ramp>
8003a5e: 4603 mov r3, r0
8003a60: 2b00 cmp r3, #0
8003a62: d114 bne.n 8003a8e <m3ap+0x16e>
m3st=motStop;
8003a64: 4b0e ldr r3, [pc, #56] @ (8003aa0 <m3ap+0x180>)
8003a66: 2204 movs r2, #4
8003a68: 701a strb r2, [r3, #0]
}
break;
8003a6a: e010 b.n 8003a8e <m3ap+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8003a6c: 2200 movs r2, #0
8003a6e: 2100 movs r1, #0
8003a70: 2003 movs r0, #3
8003a72: f000 fe2f bl 80046d4 <SetMotPerc>
SetMotPerc(M3,BW,0);
8003a76: 2200 movs r2, #0
8003a78: 2101 movs r1, #1
8003a7a: 2003 movs r0, #3
8003a7c: f000 fe2a bl 80046d4 <SetMotPerc>
break;
8003a80: e006 b.n 8003a90 <m3ap+0x170>
break;
8003a82: bf00 nop
8003a84: e004 b.n 8003a90 <m3ap+0x170>
break;
8003a86: bf00 nop
8003a88: e002 b.n 8003a90 <m3ap+0x170>
break;
8003a8a: bf00 nop
8003a8c: e000 b.n 8003a90 <m3ap+0x170>
break;
8003a8e: bf00 nop
}
return m3st;
8003a90: 4b03 ldr r3, [pc, #12] @ (8003aa0 <m3ap+0x180>)
8003a92: 781b ldrb r3, [r3, #0]
}
8003a94: 4618 mov r0, r3
8003a96: 3768 adds r7, #104 @ 0x68
8003a98: 46bd mov sp, r7
8003a9a: bd80 pop {r7, pc}
8003a9c: 20000009 .word 0x20000009
8003aa0: 20000464 .word 0x20000464
8003aa4: 0800f284 .word 0x0800f284
8003aa8: 200003a8 .word 0x200003a8
8003aac: 200003fc .word 0x200003fc
8003ab0: 20000430 .word 0x20000430
8003ab4: 2000044c .word 0x2000044c
8003ab8: 20000404 .word 0x20000404
8003abc: 20000418 .word 0x20000418
8003ac0: 20000408 .word 0x20000408
8003ac4: 20000432 .word 0x20000432
08003ac8 <m4ap>:
motMov_st m4ap(void){
8003ac8: b580 push {r7, lr}
8003aca: b09c sub sp, #112 @ 0x70
8003acc: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
8003ace: 4b5d ldr r3, [pc, #372] @ (8003c44 <m4ap+0x17c>)
8003ad0: 781a ldrb r2, [r3, #0]
8003ad2: 4b5d ldr r3, [pc, #372] @ (8003c48 <m4ap+0x180>)
8003ad4: 781b ldrb r3, [r3, #0]
8003ad6: 429a cmp r2, r3
8003ad8: d017 beq.n 8003b0a <m4ap+0x42>
memm4st=m4st;
8003ada: 4b5b ldr r3, [pc, #364] @ (8003c48 <m4ap+0x180>)
8003adc: 781a ldrb r2, [r3, #0]
8003ade: 4b59 ldr r3, [pc, #356] @ (8003c44 <m4ap+0x17c>)
8003ae0: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ap=%d",m4st);
8003ae2: 4b59 ldr r3, [pc, #356] @ (8003c48 <m4ap+0x180>)
8003ae4: 781b ldrb r3, [r3, #0]
8003ae6: 461a mov r2, r3
8003ae8: 1d3b adds r3, r7, #4
8003aea: 4958 ldr r1, [pc, #352] @ (8003c4c <m4ap+0x184>)
8003aec: 4618 mov r0, r3
8003aee: f00a fc0f bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003af2: 1d3b adds r3, r7, #4
8003af4: 4618 mov r0, r3
8003af6: f7fc fb29 bl 800014c <strlen>
8003afa: 4603 mov r3, r0
8003afc: b29a uxth r2, r3
8003afe: 1d39 adds r1, r7, #4
8003b00: f04f 33ff mov.w r3, #4294967295
8003b04: 4852 ldr r0, [pc, #328] @ (8003c50 <m4ap+0x188>)
8003b06: f005 fe13 bl 8009730 <HAL_UART_Transmit>
}
if(rtCiclo<apM4start)m4st=motWaiting;
8003b0a: 4b52 ldr r3, [pc, #328] @ (8003c54 <m4ap+0x18c>)
8003b0c: 881b ldrh r3, [r3, #0]
8003b0e: b29a uxth r2, r3
8003b10: 4b51 ldr r3, [pc, #324] @ (8003c58 <m4ap+0x190>)
8003b12: 881b ldrh r3, [r3, #0]
8003b14: 429a cmp r2, r3
8003b16: d202 bcs.n 8003b1e <m4ap+0x56>
8003b18: 4b4b ldr r3, [pc, #300] @ (8003c48 <m4ap+0x180>)
8003b1a: 2200 movs r2, #0
8003b1c: 701a strb r2, [r3, #0]
switch(m4st){
8003b1e: 4b4a ldr r3, [pc, #296] @ (8003c48 <m4ap+0x180>)
8003b20: 781b ldrb r3, [r3, #0]
8003b22: 2b03 cmp r3, #3
8003b24: d876 bhi.n 8003c14 <m4ap+0x14c>
8003b26: a201 add r2, pc, #4 @ (adr r2, 8003b2c <m4ap+0x64>)
8003b28: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003b2c: 08003b3d .word 0x08003b3d
8003b30: 08003b89 .word 0x08003b89
8003b34: 08003bb9 .word 0x08003bb9
8003b38: 08003beb .word 0x08003beb
case motWaiting:
SetMotPerc(M4,FW,0);
8003b3c: 2200 movs r2, #0
8003b3e: 2100 movs r1, #0
8003b40: 2004 movs r0, #4
8003b42: f000 fdc7 bl 80046d4 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003b46: 2200 movs r2, #0
8003b48: 2101 movs r1, #1
8003b4a: 2004 movs r0, #4
8003b4c: f000 fdc2 bl 80046d4 <SetMotPerc>
if(rtCiclo>=apM4start){
8003b50: 4b40 ldr r3, [pc, #256] @ (8003c54 <m4ap+0x18c>)
8003b52: 881b ldrh r3, [r3, #0]
8003b54: b29a uxth r2, r3
8003b56: 4b40 ldr r3, [pc, #256] @ (8003c58 <m4ap+0x190>)
8003b58: 881b ldrh r3, [r3, #0]
8003b5a: 429a cmp r2, r3
8003b5c: d365 bcc.n 8003c2a <m4ap+0x162>
(void)ramp(M4,FW,mrampstart[M4-1],m2pwmap,tramp,RAMPINIT);
8003b5e: 4b3f ldr r3, [pc, #252] @ (8003c5c <m4ap+0x194>)
8003b60: 88db ldrh r3, [r3, #6]
8003b62: b2da uxtb r2, r3
8003b64: 4b3e ldr r3, [pc, #248] @ (8003c60 <m4ap+0x198>)
8003b66: 881b ldrh r3, [r3, #0]
8003b68: b2d9 uxtb r1, r3
8003b6a: 4b3e ldr r3, [pc, #248] @ (8003c64 <m4ap+0x19c>)
8003b6c: 881b ldrh r3, [r3, #0]
8003b6e: b2db uxtb r3, r3
8003b70: 2000 movs r0, #0
8003b72: 9001 str r0, [sp, #4]
8003b74: 9300 str r3, [sp, #0]
8003b76: 460b mov r3, r1
8003b78: 2100 movs r1, #0
8003b7a: 2004 movs r0, #4
8003b7c: f000 ff2a bl 80049d4 <ramp>
m4st=motStartRamp;
8003b80: 4b31 ldr r3, [pc, #196] @ (8003c48 <m4ap+0x180>)
8003b82: 2201 movs r2, #1
8003b84: 701a strb r2, [r3, #0]
}
break;
8003b86: e050 b.n 8003c2a <m4ap+0x162>
case motStartRamp:
if(ramp(M4,FW,mrampstart[M4-1],m4pwmap,tramp,RAMPRUN)==DONE){
8003b88: 4b34 ldr r3, [pc, #208] @ (8003c5c <m4ap+0x194>)
8003b8a: 88db ldrh r3, [r3, #6]
8003b8c: b2da uxtb r2, r3
8003b8e: 4b36 ldr r3, [pc, #216] @ (8003c68 <m4ap+0x1a0>)
8003b90: 881b ldrh r3, [r3, #0]
8003b92: b2d9 uxtb r1, r3
8003b94: 4b33 ldr r3, [pc, #204] @ (8003c64 <m4ap+0x19c>)
8003b96: 881b ldrh r3, [r3, #0]
8003b98: b2db uxtb r3, r3
8003b9a: 200a movs r0, #10
8003b9c: 9001 str r0, [sp, #4]
8003b9e: 9300 str r3, [sp, #0]
8003ba0: 460b mov r3, r1
8003ba2: 2100 movs r1, #0
8003ba4: 2004 movs r0, #4
8003ba6: f000 ff15 bl 80049d4 <ramp>
8003baa: 4603 mov r3, r0
8003bac: 2b00 cmp r3, #0
8003bae: d13e bne.n 8003c2e <m4ap+0x166>
m4st=motWaitingTime;
8003bb0: 4b25 ldr r3, [pc, #148] @ (8003c48 <m4ap+0x180>)
8003bb2: 2202 movs r2, #2
8003bb4: 701a strb r2, [r3, #0]
}
break;
8003bb6: e03a b.n 8003c2e <m4ap+0x166>
case motWaitingTime:
if(rtCiclo>=apM4stop){
8003bb8: 4b26 ldr r3, [pc, #152] @ (8003c54 <m4ap+0x18c>)
8003bba: 881b ldrh r3, [r3, #0]
8003bbc: b29a uxth r2, r3
8003bbe: 4b2b ldr r3, [pc, #172] @ (8003c6c <m4ap+0x1a4>)
8003bc0: 881b ldrh r3, [r3, #0]
8003bc2: 429a cmp r2, r3
8003bc4: d335 bcc.n 8003c32 <m4ap+0x16a>
(void)ramp(M4,FW,m4pwmap,0,tramp,RAMPINIT);
8003bc6: 4b28 ldr r3, [pc, #160] @ (8003c68 <m4ap+0x1a0>)
8003bc8: 881b ldrh r3, [r3, #0]
8003bca: b2da uxtb r2, r3
8003bcc: 4b25 ldr r3, [pc, #148] @ (8003c64 <m4ap+0x19c>)
8003bce: 881b ldrh r3, [r3, #0]
8003bd0: b2db uxtb r3, r3
8003bd2: 2100 movs r1, #0
8003bd4: 9101 str r1, [sp, #4]
8003bd6: 9300 str r3, [sp, #0]
8003bd8: 2300 movs r3, #0
8003bda: 2100 movs r1, #0
8003bdc: 2004 movs r0, #4
8003bde: f000 fef9 bl 80049d4 <ramp>
m4st=motStopRamp;
8003be2: 4b19 ldr r3, [pc, #100] @ (8003c48 <m4ap+0x180>)
8003be4: 2203 movs r2, #3
8003be6: 701a strb r2, [r3, #0]
}
break;
8003be8: e023 b.n 8003c32 <m4ap+0x16a>
case motStopRamp:
if(ramp(M4,FW,m4pwmap,0,tramp,RAMPRUN)==DONE){
8003bea: 4b1f ldr r3, [pc, #124] @ (8003c68 <m4ap+0x1a0>)
8003bec: 881b ldrh r3, [r3, #0]
8003bee: b2da uxtb r2, r3
8003bf0: 4b1c ldr r3, [pc, #112] @ (8003c64 <m4ap+0x19c>)
8003bf2: 881b ldrh r3, [r3, #0]
8003bf4: b2db uxtb r3, r3
8003bf6: 210a movs r1, #10
8003bf8: 9101 str r1, [sp, #4]
8003bfa: 9300 str r3, [sp, #0]
8003bfc: 2300 movs r3, #0
8003bfe: 2100 movs r1, #0
8003c00: 2004 movs r0, #4
8003c02: f000 fee7 bl 80049d4 <ramp>
8003c06: 4603 mov r3, r0
8003c08: 2b00 cmp r3, #0
8003c0a: d114 bne.n 8003c36 <m4ap+0x16e>
m4st=motStop;
8003c0c: 4b0e ldr r3, [pc, #56] @ (8003c48 <m4ap+0x180>)
8003c0e: 2204 movs r2, #4
8003c10: 701a strb r2, [r3, #0]
}
break;
8003c12: e010 b.n 8003c36 <m4ap+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
8003c14: 2200 movs r2, #0
8003c16: 2100 movs r1, #0
8003c18: 2004 movs r0, #4
8003c1a: f000 fd5b bl 80046d4 <SetMotPerc>
SetMotPerc(M4,BW,0);
8003c1e: 2200 movs r2, #0
8003c20: 2101 movs r1, #1
8003c22: 2004 movs r0, #4
8003c24: f000 fd56 bl 80046d4 <SetMotPerc>
break;
8003c28: e006 b.n 8003c38 <m4ap+0x170>
break;
8003c2a: bf00 nop
8003c2c: e004 b.n 8003c38 <m4ap+0x170>
break;
8003c2e: bf00 nop
8003c30: e002 b.n 8003c38 <m4ap+0x170>
break;
8003c32: bf00 nop
8003c34: e000 b.n 8003c38 <m4ap+0x170>
break;
8003c36: bf00 nop
}
return m4st;
8003c38: 4b03 ldr r3, [pc, #12] @ (8003c48 <m4ap+0x180>)
8003c3a: 781b ldrb r3, [r3, #0]
}
8003c3c: 4618 mov r0, r3
8003c3e: 3768 adds r7, #104 @ 0x68
8003c40: 46bd mov sp, r7
8003c42: bd80 pop {r7, pc}
8003c44: 2000000a .word 0x2000000a
8003c48: 20000465 .word 0x20000465
8003c4c: 0800f290 .word 0x0800f290
8003c50: 200003a8 .word 0x200003a8
8003c54: 200003fc .word 0x200003fc
8003c58: 20000434 .word 0x20000434
8003c5c: 2000044c .word 0x2000044c
8003c60: 20000404 .word 0x20000404
8003c64: 20000418 .word 0x20000418
8003c68: 2000040c .word 0x2000040c
8003c6c: 20000436 .word 0x20000436
08003c70 <m1ch>:
motMov_st m1ch(void){
8003c70: b580 push {r7, lr}
8003c72: b09c sub sp, #112 @ 0x70
8003c74: af02 add r7, sp, #8
static motMov_st m1st;
static motMov_st memm1st=motStop;
char s[100];
if(memm1st!=m1st){
8003c76: 4b5d ldr r3, [pc, #372] @ (8003dec <m1ch+0x17c>)
8003c78: 781a ldrb r2, [r3, #0]
8003c7a: 4b5d ldr r3, [pc, #372] @ (8003df0 <m1ch+0x180>)
8003c7c: 781b ldrb r3, [r3, #0]
8003c7e: 429a cmp r2, r3
8003c80: d017 beq.n 8003cb2 <m1ch+0x42>
memm1st=m1st;
8003c82: 4b5b ldr r3, [pc, #364] @ (8003df0 <m1ch+0x180>)
8003c84: 781a ldrb r2, [r3, #0]
8003c86: 4b59 ldr r3, [pc, #356] @ (8003dec <m1ch+0x17c>)
8003c88: 701a strb r2, [r3, #0]
sprintf(s,"\nm1ch=%d",m1st);
8003c8a: 4b59 ldr r3, [pc, #356] @ (8003df0 <m1ch+0x180>)
8003c8c: 781b ldrb r3, [r3, #0]
8003c8e: 461a mov r2, r3
8003c90: 1d3b adds r3, r7, #4
8003c92: 4958 ldr r1, [pc, #352] @ (8003df4 <m1ch+0x184>)
8003c94: 4618 mov r0, r3
8003c96: f00a fb3b bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003c9a: 1d3b adds r3, r7, #4
8003c9c: 4618 mov r0, r3
8003c9e: f7fc fa55 bl 800014c <strlen>
8003ca2: 4603 mov r3, r0
8003ca4: b29a uxth r2, r3
8003ca6: 1d39 adds r1, r7, #4
8003ca8: f04f 33ff mov.w r3, #4294967295
8003cac: 4852 ldr r0, [pc, #328] @ (8003df8 <m1ch+0x188>)
8003cae: f005 fd3f bl 8009730 <HAL_UART_Transmit>
}
if(rtCiclo<chM1start)m1st=motWaiting;
8003cb2: 4b52 ldr r3, [pc, #328] @ (8003dfc <m1ch+0x18c>)
8003cb4: 881b ldrh r3, [r3, #0]
8003cb6: b29a uxth r2, r3
8003cb8: 4b51 ldr r3, [pc, #324] @ (8003e00 <m1ch+0x190>)
8003cba: 881b ldrh r3, [r3, #0]
8003cbc: 429a cmp r2, r3
8003cbe: d202 bcs.n 8003cc6 <m1ch+0x56>
8003cc0: 4b4b ldr r3, [pc, #300] @ (8003df0 <m1ch+0x180>)
8003cc2: 2200 movs r2, #0
8003cc4: 701a strb r2, [r3, #0]
switch(m1st){
8003cc6: 4b4a ldr r3, [pc, #296] @ (8003df0 <m1ch+0x180>)
8003cc8: 781b ldrb r3, [r3, #0]
8003cca: 2b03 cmp r3, #3
8003ccc: d876 bhi.n 8003dbc <m1ch+0x14c>
8003cce: a201 add r2, pc, #4 @ (adr r2, 8003cd4 <m1ch+0x64>)
8003cd0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003cd4: 08003ce5 .word 0x08003ce5
8003cd8: 08003d31 .word 0x08003d31
8003cdc: 08003d61 .word 0x08003d61
8003ce0: 08003d93 .word 0x08003d93
case motWaiting:
SetMotPerc(M1,FW,0);
8003ce4: 2200 movs r2, #0
8003ce6: 2100 movs r1, #0
8003ce8: 2001 movs r0, #1
8003cea: f000 fcf3 bl 80046d4 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003cee: 2200 movs r2, #0
8003cf0: 2101 movs r1, #1
8003cf2: 2001 movs r0, #1
8003cf4: f000 fcee bl 80046d4 <SetMotPerc>
if(rtCiclo>=chM1start){
8003cf8: 4b40 ldr r3, [pc, #256] @ (8003dfc <m1ch+0x18c>)
8003cfa: 881b ldrh r3, [r3, #0]
8003cfc: b29a uxth r2, r3
8003cfe: 4b40 ldr r3, [pc, #256] @ (8003e00 <m1ch+0x190>)
8003d00: 881b ldrh r3, [r3, #0]
8003d02: 429a cmp r2, r3
8003d04: d365 bcc.n 8003dd2 <m1ch+0x162>
(void)ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPINIT);
8003d06: 4b3f ldr r3, [pc, #252] @ (8003e04 <m1ch+0x194>)
8003d08: 881b ldrh r3, [r3, #0]
8003d0a: b2da uxtb r2, r3
8003d0c: 4b3e ldr r3, [pc, #248] @ (8003e08 <m1ch+0x198>)
8003d0e: 881b ldrh r3, [r3, #0]
8003d10: b2d9 uxtb r1, r3
8003d12: 4b3e ldr r3, [pc, #248] @ (8003e0c <m1ch+0x19c>)
8003d14: 881b ldrh r3, [r3, #0]
8003d16: b2db uxtb r3, r3
8003d18: 2000 movs r0, #0
8003d1a: 9001 str r0, [sp, #4]
8003d1c: 9300 str r3, [sp, #0]
8003d1e: 460b mov r3, r1
8003d20: 2101 movs r1, #1
8003d22: 2001 movs r0, #1
8003d24: f000 fe56 bl 80049d4 <ramp>
m1st=motStartRamp;
8003d28: 4b31 ldr r3, [pc, #196] @ (8003df0 <m1ch+0x180>)
8003d2a: 2201 movs r2, #1
8003d2c: 701a strb r2, [r3, #0]
}
break;
8003d2e: e050 b.n 8003dd2 <m1ch+0x162>
case motStartRamp:
if(ramp(M1,BW,mrampstart[M1-1],m1pwmch,tramp,RAMPRUN)==DONE){
8003d30: 4b34 ldr r3, [pc, #208] @ (8003e04 <m1ch+0x194>)
8003d32: 881b ldrh r3, [r3, #0]
8003d34: b2da uxtb r2, r3
8003d36: 4b34 ldr r3, [pc, #208] @ (8003e08 <m1ch+0x198>)
8003d38: 881b ldrh r3, [r3, #0]
8003d3a: b2d9 uxtb r1, r3
8003d3c: 4b33 ldr r3, [pc, #204] @ (8003e0c <m1ch+0x19c>)
8003d3e: 881b ldrh r3, [r3, #0]
8003d40: b2db uxtb r3, r3
8003d42: 200a movs r0, #10
8003d44: 9001 str r0, [sp, #4]
8003d46: 9300 str r3, [sp, #0]
8003d48: 460b mov r3, r1
8003d4a: 2101 movs r1, #1
8003d4c: 2001 movs r0, #1
8003d4e: f000 fe41 bl 80049d4 <ramp>
8003d52: 4603 mov r3, r0
8003d54: 2b00 cmp r3, #0
8003d56: d13e bne.n 8003dd6 <m1ch+0x166>
m1st=motWaitingTime;
8003d58: 4b25 ldr r3, [pc, #148] @ (8003df0 <m1ch+0x180>)
8003d5a: 2202 movs r2, #2
8003d5c: 701a strb r2, [r3, #0]
}
break;
8003d5e: e03a b.n 8003dd6 <m1ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM1stop){
8003d60: 4b26 ldr r3, [pc, #152] @ (8003dfc <m1ch+0x18c>)
8003d62: 881b ldrh r3, [r3, #0]
8003d64: b29a uxth r2, r3
8003d66: 4b2a ldr r3, [pc, #168] @ (8003e10 <m1ch+0x1a0>)
8003d68: 881b ldrh r3, [r3, #0]
8003d6a: 429a cmp r2, r3
8003d6c: d335 bcc.n 8003dda <m1ch+0x16a>
(void)ramp(M1,BW,m1pwmch,0,tramp,RAMPINIT);
8003d6e: 4b26 ldr r3, [pc, #152] @ (8003e08 <m1ch+0x198>)
8003d70: 881b ldrh r3, [r3, #0]
8003d72: b2da uxtb r2, r3
8003d74: 4b25 ldr r3, [pc, #148] @ (8003e0c <m1ch+0x19c>)
8003d76: 881b ldrh r3, [r3, #0]
8003d78: b2db uxtb r3, r3
8003d7a: 2100 movs r1, #0
8003d7c: 9101 str r1, [sp, #4]
8003d7e: 9300 str r3, [sp, #0]
8003d80: 2300 movs r3, #0
8003d82: 2101 movs r1, #1
8003d84: 2001 movs r0, #1
8003d86: f000 fe25 bl 80049d4 <ramp>
m1st=motStopRamp;
8003d8a: 4b19 ldr r3, [pc, #100] @ (8003df0 <m1ch+0x180>)
8003d8c: 2203 movs r2, #3
8003d8e: 701a strb r2, [r3, #0]
}
break;
8003d90: e023 b.n 8003dda <m1ch+0x16a>
case motStopRamp:
if(ramp(M1,BW,m1pwmch,0,tramp,RAMPRUN)==DONE){
8003d92: 4b1d ldr r3, [pc, #116] @ (8003e08 <m1ch+0x198>)
8003d94: 881b ldrh r3, [r3, #0]
8003d96: b2da uxtb r2, r3
8003d98: 4b1c ldr r3, [pc, #112] @ (8003e0c <m1ch+0x19c>)
8003d9a: 881b ldrh r3, [r3, #0]
8003d9c: b2db uxtb r3, r3
8003d9e: 210a movs r1, #10
8003da0: 9101 str r1, [sp, #4]
8003da2: 9300 str r3, [sp, #0]
8003da4: 2300 movs r3, #0
8003da6: 2101 movs r1, #1
8003da8: 2001 movs r0, #1
8003daa: f000 fe13 bl 80049d4 <ramp>
8003dae: 4603 mov r3, r0
8003db0: 2b00 cmp r3, #0
8003db2: d114 bne.n 8003dde <m1ch+0x16e>
m1st=motStop;
8003db4: 4b0e ldr r3, [pc, #56] @ (8003df0 <m1ch+0x180>)
8003db6: 2204 movs r2, #4
8003db8: 701a strb r2, [r3, #0]
}
break;
8003dba: e010 b.n 8003dde <m1ch+0x16e>
case motStop:
default:
SetMotPerc(M1,FW,0);
8003dbc: 2200 movs r2, #0
8003dbe: 2100 movs r1, #0
8003dc0: 2001 movs r0, #1
8003dc2: f000 fc87 bl 80046d4 <SetMotPerc>
SetMotPerc(M1,BW,0);
8003dc6: 2200 movs r2, #0
8003dc8: 2101 movs r1, #1
8003dca: 2001 movs r0, #1
8003dcc: f000 fc82 bl 80046d4 <SetMotPerc>
break;
8003dd0: e006 b.n 8003de0 <m1ch+0x170>
break;
8003dd2: bf00 nop
8003dd4: e004 b.n 8003de0 <m1ch+0x170>
break;
8003dd6: bf00 nop
8003dd8: e002 b.n 8003de0 <m1ch+0x170>
break;
8003dda: bf00 nop
8003ddc: e000 b.n 8003de0 <m1ch+0x170>
break;
8003dde: bf00 nop
}
return m1st;
8003de0: 4b03 ldr r3, [pc, #12] @ (8003df0 <m1ch+0x180>)
8003de2: 781b ldrb r3, [r3, #0]
}
8003de4: 4618 mov r0, r3
8003de6: 3768 adds r7, #104 @ 0x68
8003de8: 46bd mov sp, r7
8003dea: bd80 pop {r7, pc}
8003dec: 2000000b .word 0x2000000b
8003df0: 20000466 .word 0x20000466
8003df4: 0800f29c .word 0x0800f29c
8003df8: 200003a8 .word 0x200003a8
8003dfc: 200003fc .word 0x200003fc
8003e00: 20000438 .word 0x20000438
8003e04: 2000044c .word 0x2000044c
8003e08: 20000402 .word 0x20000402
8003e0c: 20000418 .word 0x20000418
8003e10: 2000043a .word 0x2000043a
08003e14 <m2ch>:
motMov_st m2ch(void){
8003e14: b580 push {r7, lr}
8003e16: b09c sub sp, #112 @ 0x70
8003e18: af02 add r7, sp, #8
static motMov_st m2st;
static motMov_st memm2st=motStop;
char s[100];
if(memm2st!=m2st){
8003e1a: 4b5d ldr r3, [pc, #372] @ (8003f90 <m2ch+0x17c>)
8003e1c: 781a ldrb r2, [r3, #0]
8003e1e: 4b5d ldr r3, [pc, #372] @ (8003f94 <m2ch+0x180>)
8003e20: 781b ldrb r3, [r3, #0]
8003e22: 429a cmp r2, r3
8003e24: d017 beq.n 8003e56 <m2ch+0x42>
memm2st=m2st;
8003e26: 4b5b ldr r3, [pc, #364] @ (8003f94 <m2ch+0x180>)
8003e28: 781a ldrb r2, [r3, #0]
8003e2a: 4b59 ldr r3, [pc, #356] @ (8003f90 <m2ch+0x17c>)
8003e2c: 701a strb r2, [r3, #0]
sprintf(s,"\nm2ch=%d",m2st);
8003e2e: 4b59 ldr r3, [pc, #356] @ (8003f94 <m2ch+0x180>)
8003e30: 781b ldrb r3, [r3, #0]
8003e32: 461a mov r2, r3
8003e34: 1d3b adds r3, r7, #4
8003e36: 4958 ldr r1, [pc, #352] @ (8003f98 <m2ch+0x184>)
8003e38: 4618 mov r0, r3
8003e3a: f00a fa69 bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003e3e: 1d3b adds r3, r7, #4
8003e40: 4618 mov r0, r3
8003e42: f7fc f983 bl 800014c <strlen>
8003e46: 4603 mov r3, r0
8003e48: b29a uxth r2, r3
8003e4a: 1d39 adds r1, r7, #4
8003e4c: f04f 33ff mov.w r3, #4294967295
8003e50: 4852 ldr r0, [pc, #328] @ (8003f9c <m2ch+0x188>)
8003e52: f005 fc6d bl 8009730 <HAL_UART_Transmit>
}
if(rtCiclo<chM2start)m2st=motWaiting;
8003e56: 4b52 ldr r3, [pc, #328] @ (8003fa0 <m2ch+0x18c>)
8003e58: 881b ldrh r3, [r3, #0]
8003e5a: b29a uxth r2, r3
8003e5c: 4b51 ldr r3, [pc, #324] @ (8003fa4 <m2ch+0x190>)
8003e5e: 881b ldrh r3, [r3, #0]
8003e60: 429a cmp r2, r3
8003e62: d202 bcs.n 8003e6a <m2ch+0x56>
8003e64: 4b4b ldr r3, [pc, #300] @ (8003f94 <m2ch+0x180>)
8003e66: 2200 movs r2, #0
8003e68: 701a strb r2, [r3, #0]
switch(m2st){
8003e6a: 4b4a ldr r3, [pc, #296] @ (8003f94 <m2ch+0x180>)
8003e6c: 781b ldrb r3, [r3, #0]
8003e6e: 2b03 cmp r3, #3
8003e70: d876 bhi.n 8003f60 <m2ch+0x14c>
8003e72: a201 add r2, pc, #4 @ (adr r2, 8003e78 <m2ch+0x64>)
8003e74: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8003e78: 08003e89 .word 0x08003e89
8003e7c: 08003ed5 .word 0x08003ed5
8003e80: 08003f05 .word 0x08003f05
8003e84: 08003f37 .word 0x08003f37
case motWaiting:
SetMotPerc(M2,FW,0);
8003e88: 2200 movs r2, #0
8003e8a: 2100 movs r1, #0
8003e8c: 2002 movs r0, #2
8003e8e: f000 fc21 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,BW,0);
8003e92: 2200 movs r2, #0
8003e94: 2101 movs r1, #1
8003e96: 2002 movs r0, #2
8003e98: f000 fc1c bl 80046d4 <SetMotPerc>
if(rtCiclo>=chM2start){
8003e9c: 4b40 ldr r3, [pc, #256] @ (8003fa0 <m2ch+0x18c>)
8003e9e: 881b ldrh r3, [r3, #0]
8003ea0: b29a uxth r2, r3
8003ea2: 4b40 ldr r3, [pc, #256] @ (8003fa4 <m2ch+0x190>)
8003ea4: 881b ldrh r3, [r3, #0]
8003ea6: 429a cmp r2, r3
8003ea8: d365 bcc.n 8003f76 <m2ch+0x162>
(void)ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPINIT);
8003eaa: 4b3f ldr r3, [pc, #252] @ (8003fa8 <m2ch+0x194>)
8003eac: 885b ldrh r3, [r3, #2]
8003eae: b2da uxtb r2, r3
8003eb0: 4b3e ldr r3, [pc, #248] @ (8003fac <m2ch+0x198>)
8003eb2: 881b ldrh r3, [r3, #0]
8003eb4: b2d9 uxtb r1, r3
8003eb6: 4b3e ldr r3, [pc, #248] @ (8003fb0 <m2ch+0x19c>)
8003eb8: 881b ldrh r3, [r3, #0]
8003eba: b2db uxtb r3, r3
8003ebc: 2000 movs r0, #0
8003ebe: 9001 str r0, [sp, #4]
8003ec0: 9300 str r3, [sp, #0]
8003ec2: 460b mov r3, r1
8003ec4: 2100 movs r1, #0
8003ec6: 2002 movs r0, #2
8003ec8: f000 fd84 bl 80049d4 <ramp>
m2st=motStartRamp;
8003ecc: 4b31 ldr r3, [pc, #196] @ (8003f94 <m2ch+0x180>)
8003ece: 2201 movs r2, #1
8003ed0: 701a strb r2, [r3, #0]
}
break;
8003ed2: e050 b.n 8003f76 <m2ch+0x162>
case motStartRamp:
if(ramp(M2,FW,mrampstart[M2-1],m2pwmch,tramp,RAMPRUN)==DONE){
8003ed4: 4b34 ldr r3, [pc, #208] @ (8003fa8 <m2ch+0x194>)
8003ed6: 885b ldrh r3, [r3, #2]
8003ed8: b2da uxtb r2, r3
8003eda: 4b34 ldr r3, [pc, #208] @ (8003fac <m2ch+0x198>)
8003edc: 881b ldrh r3, [r3, #0]
8003ede: b2d9 uxtb r1, r3
8003ee0: 4b33 ldr r3, [pc, #204] @ (8003fb0 <m2ch+0x19c>)
8003ee2: 881b ldrh r3, [r3, #0]
8003ee4: b2db uxtb r3, r3
8003ee6: 200a movs r0, #10
8003ee8: 9001 str r0, [sp, #4]
8003eea: 9300 str r3, [sp, #0]
8003eec: 460b mov r3, r1
8003eee: 2100 movs r1, #0
8003ef0: 2002 movs r0, #2
8003ef2: f000 fd6f bl 80049d4 <ramp>
8003ef6: 4603 mov r3, r0
8003ef8: 2b00 cmp r3, #0
8003efa: d13e bne.n 8003f7a <m2ch+0x166>
m2st=motWaitingTime;
8003efc: 4b25 ldr r3, [pc, #148] @ (8003f94 <m2ch+0x180>)
8003efe: 2202 movs r2, #2
8003f00: 701a strb r2, [r3, #0]
}
break;
8003f02: e03a b.n 8003f7a <m2ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM2stop){
8003f04: 4b26 ldr r3, [pc, #152] @ (8003fa0 <m2ch+0x18c>)
8003f06: 881b ldrh r3, [r3, #0]
8003f08: b29a uxth r2, r3
8003f0a: 4b2a ldr r3, [pc, #168] @ (8003fb4 <m2ch+0x1a0>)
8003f0c: 881b ldrh r3, [r3, #0]
8003f0e: 429a cmp r2, r3
8003f10: d335 bcc.n 8003f7e <m2ch+0x16a>
(void)ramp(M2,FW,m2pwmch,0,tramp,RAMPINIT);
8003f12: 4b26 ldr r3, [pc, #152] @ (8003fac <m2ch+0x198>)
8003f14: 881b ldrh r3, [r3, #0]
8003f16: b2da uxtb r2, r3
8003f18: 4b25 ldr r3, [pc, #148] @ (8003fb0 <m2ch+0x19c>)
8003f1a: 881b ldrh r3, [r3, #0]
8003f1c: b2db uxtb r3, r3
8003f1e: 2100 movs r1, #0
8003f20: 9101 str r1, [sp, #4]
8003f22: 9300 str r3, [sp, #0]
8003f24: 2300 movs r3, #0
8003f26: 2100 movs r1, #0
8003f28: 2002 movs r0, #2
8003f2a: f000 fd53 bl 80049d4 <ramp>
m2st=motStopRamp;
8003f2e: 4b19 ldr r3, [pc, #100] @ (8003f94 <m2ch+0x180>)
8003f30: 2203 movs r2, #3
8003f32: 701a strb r2, [r3, #0]
}
break;
8003f34: e023 b.n 8003f7e <m2ch+0x16a>
case motStopRamp:
if(ramp(M2,FW,m2pwmch,0,tramp,RAMPRUN)==DONE){
8003f36: 4b1d ldr r3, [pc, #116] @ (8003fac <m2ch+0x198>)
8003f38: 881b ldrh r3, [r3, #0]
8003f3a: b2da uxtb r2, r3
8003f3c: 4b1c ldr r3, [pc, #112] @ (8003fb0 <m2ch+0x19c>)
8003f3e: 881b ldrh r3, [r3, #0]
8003f40: b2db uxtb r3, r3
8003f42: 210a movs r1, #10
8003f44: 9101 str r1, [sp, #4]
8003f46: 9300 str r3, [sp, #0]
8003f48: 2300 movs r3, #0
8003f4a: 2100 movs r1, #0
8003f4c: 2002 movs r0, #2
8003f4e: f000 fd41 bl 80049d4 <ramp>
8003f52: 4603 mov r3, r0
8003f54: 2b00 cmp r3, #0
8003f56: d114 bne.n 8003f82 <m2ch+0x16e>
m2st=motStop;
8003f58: 4b0e ldr r3, [pc, #56] @ (8003f94 <m2ch+0x180>)
8003f5a: 2204 movs r2, #4
8003f5c: 701a strb r2, [r3, #0]
}
break;
8003f5e: e010 b.n 8003f82 <m2ch+0x16e>
case motStop:
default:
SetMotPerc(M2,FW,0);
8003f60: 2200 movs r2, #0
8003f62: 2100 movs r1, #0
8003f64: 2002 movs r0, #2
8003f66: f000 fbb5 bl 80046d4 <SetMotPerc>
SetMotPerc(M2,BW,0);
8003f6a: 2200 movs r2, #0
8003f6c: 2101 movs r1, #1
8003f6e: 2002 movs r0, #2
8003f70: f000 fbb0 bl 80046d4 <SetMotPerc>
break;
8003f74: e006 b.n 8003f84 <m2ch+0x170>
break;
8003f76: bf00 nop
8003f78: e004 b.n 8003f84 <m2ch+0x170>
break;
8003f7a: bf00 nop
8003f7c: e002 b.n 8003f84 <m2ch+0x170>
break;
8003f7e: bf00 nop
8003f80: e000 b.n 8003f84 <m2ch+0x170>
break;
8003f82: bf00 nop
}
return m2st;
8003f84: 4b03 ldr r3, [pc, #12] @ (8003f94 <m2ch+0x180>)
8003f86: 781b ldrb r3, [r3, #0]
}
8003f88: 4618 mov r0, r3
8003f8a: 3768 adds r7, #104 @ 0x68
8003f8c: 46bd mov sp, r7
8003f8e: bd80 pop {r7, pc}
8003f90: 2000000c .word 0x2000000c
8003f94: 20000467 .word 0x20000467
8003f98: 0800f2a8 .word 0x0800f2a8
8003f9c: 200003a8 .word 0x200003a8
8003fa0: 200003fc .word 0x200003fc
8003fa4: 2000043c .word 0x2000043c
8003fa8: 2000044c .word 0x2000044c
8003fac: 20000406 .word 0x20000406
8003fb0: 20000418 .word 0x20000418
8003fb4: 2000043e .word 0x2000043e
08003fb8 <m3ch>:
motMov_st m3ch(void){
8003fb8: b580 push {r7, lr}
8003fba: b09c sub sp, #112 @ 0x70
8003fbc: af02 add r7, sp, #8
static motMov_st m3st;
static motMov_st memm3st=motStop;
char s[100];
if(memm3st!=m3st){
8003fbe: 4b5d ldr r3, [pc, #372] @ (8004134 <m3ch+0x17c>)
8003fc0: 781a ldrb r2, [r3, #0]
8003fc2: 4b5d ldr r3, [pc, #372] @ (8004138 <m3ch+0x180>)
8003fc4: 781b ldrb r3, [r3, #0]
8003fc6: 429a cmp r2, r3
8003fc8: d017 beq.n 8003ffa <m3ch+0x42>
memm3st=m3st;
8003fca: 4b5b ldr r3, [pc, #364] @ (8004138 <m3ch+0x180>)
8003fcc: 781a ldrb r2, [r3, #0]
8003fce: 4b59 ldr r3, [pc, #356] @ (8004134 <m3ch+0x17c>)
8003fd0: 701a strb r2, [r3, #0]
sprintf(s,"\nm3ch=%d",m3st);
8003fd2: 4b59 ldr r3, [pc, #356] @ (8004138 <m3ch+0x180>)
8003fd4: 781b ldrb r3, [r3, #0]
8003fd6: 461a mov r2, r3
8003fd8: 1d3b adds r3, r7, #4
8003fda: 4958 ldr r1, [pc, #352] @ (800413c <m3ch+0x184>)
8003fdc: 4618 mov r0, r3
8003fde: f00a f997 bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
8003fe2: 1d3b adds r3, r7, #4
8003fe4: 4618 mov r0, r3
8003fe6: f7fc f8b1 bl 800014c <strlen>
8003fea: 4603 mov r3, r0
8003fec: b29a uxth r2, r3
8003fee: 1d39 adds r1, r7, #4
8003ff0: f04f 33ff mov.w r3, #4294967295
8003ff4: 4852 ldr r0, [pc, #328] @ (8004140 <m3ch+0x188>)
8003ff6: f005 fb9b bl 8009730 <HAL_UART_Transmit>
}
if(rtCiclo<chM3start)m3st=motWaiting;
8003ffa: 4b52 ldr r3, [pc, #328] @ (8004144 <m3ch+0x18c>)
8003ffc: 881b ldrh r3, [r3, #0]
8003ffe: b29a uxth r2, r3
8004000: 4b51 ldr r3, [pc, #324] @ (8004148 <m3ch+0x190>)
8004002: 881b ldrh r3, [r3, #0]
8004004: 429a cmp r2, r3
8004006: d202 bcs.n 800400e <m3ch+0x56>
8004008: 4b4b ldr r3, [pc, #300] @ (8004138 <m3ch+0x180>)
800400a: 2200 movs r2, #0
800400c: 701a strb r2, [r3, #0]
switch(m3st){
800400e: 4b4a ldr r3, [pc, #296] @ (8004138 <m3ch+0x180>)
8004010: 781b ldrb r3, [r3, #0]
8004012: 2b03 cmp r3, #3
8004014: d876 bhi.n 8004104 <m3ch+0x14c>
8004016: a201 add r2, pc, #4 @ (adr r2, 800401c <m3ch+0x64>)
8004018: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800401c: 0800402d .word 0x0800402d
8004020: 08004079 .word 0x08004079
8004024: 080040a9 .word 0x080040a9
8004028: 080040db .word 0x080040db
case motWaiting:
SetMotPerc(M3,FW,0);
800402c: 2200 movs r2, #0
800402e: 2100 movs r1, #0
8004030: 2003 movs r0, #3
8004032: f000 fb4f bl 80046d4 <SetMotPerc>
SetMotPerc(M3,BW,0);
8004036: 2200 movs r2, #0
8004038: 2101 movs r1, #1
800403a: 2003 movs r0, #3
800403c: f000 fb4a bl 80046d4 <SetMotPerc>
if(rtCiclo>=chM3start){
8004040: 4b40 ldr r3, [pc, #256] @ (8004144 <m3ch+0x18c>)
8004042: 881b ldrh r3, [r3, #0]
8004044: b29a uxth r2, r3
8004046: 4b40 ldr r3, [pc, #256] @ (8004148 <m3ch+0x190>)
8004048: 881b ldrh r3, [r3, #0]
800404a: 429a cmp r2, r3
800404c: d365 bcc.n 800411a <m3ch+0x162>
(void)ramp(M3,BW,mrampstart[M3-1],m2pwmch,tramp,RAMPINIT);
800404e: 4b3f ldr r3, [pc, #252] @ (800414c <m3ch+0x194>)
8004050: 889b ldrh r3, [r3, #4]
8004052: b2da uxtb r2, r3
8004054: 4b3e ldr r3, [pc, #248] @ (8004150 <m3ch+0x198>)
8004056: 881b ldrh r3, [r3, #0]
8004058: b2d9 uxtb r1, r3
800405a: 4b3e ldr r3, [pc, #248] @ (8004154 <m3ch+0x19c>)
800405c: 881b ldrh r3, [r3, #0]
800405e: b2db uxtb r3, r3
8004060: 2000 movs r0, #0
8004062: 9001 str r0, [sp, #4]
8004064: 9300 str r3, [sp, #0]
8004066: 460b mov r3, r1
8004068: 2101 movs r1, #1
800406a: 2003 movs r0, #3
800406c: f000 fcb2 bl 80049d4 <ramp>
m3st=motStartRamp;
8004070: 4b31 ldr r3, [pc, #196] @ (8004138 <m3ch+0x180>)
8004072: 2201 movs r2, #1
8004074: 701a strb r2, [r3, #0]
}
break;
8004076: e050 b.n 800411a <m3ch+0x162>
case motStartRamp:
if(ramp(M3,BW,mrampstart[M3-1],m3pwmch,tramp,RAMPRUN)==DONE){
8004078: 4b34 ldr r3, [pc, #208] @ (800414c <m3ch+0x194>)
800407a: 889b ldrh r3, [r3, #4]
800407c: b2da uxtb r2, r3
800407e: 4b36 ldr r3, [pc, #216] @ (8004158 <m3ch+0x1a0>)
8004080: 881b ldrh r3, [r3, #0]
8004082: b2d9 uxtb r1, r3
8004084: 4b33 ldr r3, [pc, #204] @ (8004154 <m3ch+0x19c>)
8004086: 881b ldrh r3, [r3, #0]
8004088: b2db uxtb r3, r3
800408a: 200a movs r0, #10
800408c: 9001 str r0, [sp, #4]
800408e: 9300 str r3, [sp, #0]
8004090: 460b mov r3, r1
8004092: 2101 movs r1, #1
8004094: 2003 movs r0, #3
8004096: f000 fc9d bl 80049d4 <ramp>
800409a: 4603 mov r3, r0
800409c: 2b00 cmp r3, #0
800409e: d13e bne.n 800411e <m3ch+0x166>
m3st=motWaitingTime;
80040a0: 4b25 ldr r3, [pc, #148] @ (8004138 <m3ch+0x180>)
80040a2: 2202 movs r2, #2
80040a4: 701a strb r2, [r3, #0]
}
break;
80040a6: e03a b.n 800411e <m3ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM3stop){
80040a8: 4b26 ldr r3, [pc, #152] @ (8004144 <m3ch+0x18c>)
80040aa: 881b ldrh r3, [r3, #0]
80040ac: b29a uxth r2, r3
80040ae: 4b2b ldr r3, [pc, #172] @ (800415c <m3ch+0x1a4>)
80040b0: 881b ldrh r3, [r3, #0]
80040b2: 429a cmp r2, r3
80040b4: d335 bcc.n 8004122 <m3ch+0x16a>
(void)ramp(M3,BW,m3pwmch,0,tramp,RAMPINIT);
80040b6: 4b28 ldr r3, [pc, #160] @ (8004158 <m3ch+0x1a0>)
80040b8: 881b ldrh r3, [r3, #0]
80040ba: b2da uxtb r2, r3
80040bc: 4b25 ldr r3, [pc, #148] @ (8004154 <m3ch+0x19c>)
80040be: 881b ldrh r3, [r3, #0]
80040c0: b2db uxtb r3, r3
80040c2: 2100 movs r1, #0
80040c4: 9101 str r1, [sp, #4]
80040c6: 9300 str r3, [sp, #0]
80040c8: 2300 movs r3, #0
80040ca: 2101 movs r1, #1
80040cc: 2003 movs r0, #3
80040ce: f000 fc81 bl 80049d4 <ramp>
m3st=motStopRamp;
80040d2: 4b19 ldr r3, [pc, #100] @ (8004138 <m3ch+0x180>)
80040d4: 2203 movs r2, #3
80040d6: 701a strb r2, [r3, #0]
}
break;
80040d8: e023 b.n 8004122 <m3ch+0x16a>
case motStopRamp:
if(ramp(M3,BW,m3pwmch,0,tramp,RAMPRUN)==DONE){
80040da: 4b1f ldr r3, [pc, #124] @ (8004158 <m3ch+0x1a0>)
80040dc: 881b ldrh r3, [r3, #0]
80040de: b2da uxtb r2, r3
80040e0: 4b1c ldr r3, [pc, #112] @ (8004154 <m3ch+0x19c>)
80040e2: 881b ldrh r3, [r3, #0]
80040e4: b2db uxtb r3, r3
80040e6: 210a movs r1, #10
80040e8: 9101 str r1, [sp, #4]
80040ea: 9300 str r3, [sp, #0]
80040ec: 2300 movs r3, #0
80040ee: 2101 movs r1, #1
80040f0: 2003 movs r0, #3
80040f2: f000 fc6f bl 80049d4 <ramp>
80040f6: 4603 mov r3, r0
80040f8: 2b00 cmp r3, #0
80040fa: d114 bne.n 8004126 <m3ch+0x16e>
m3st=motStop;
80040fc: 4b0e ldr r3, [pc, #56] @ (8004138 <m3ch+0x180>)
80040fe: 2204 movs r2, #4
8004100: 701a strb r2, [r3, #0]
}
break;
8004102: e010 b.n 8004126 <m3ch+0x16e>
case motStop:
default:
SetMotPerc(M3,FW,0);
8004104: 2200 movs r2, #0
8004106: 2100 movs r1, #0
8004108: 2003 movs r0, #3
800410a: f000 fae3 bl 80046d4 <SetMotPerc>
SetMotPerc(M3,BW,0);
800410e: 2200 movs r2, #0
8004110: 2101 movs r1, #1
8004112: 2003 movs r0, #3
8004114: f000 fade bl 80046d4 <SetMotPerc>
break;
8004118: e006 b.n 8004128 <m3ch+0x170>
break;
800411a: bf00 nop
800411c: e004 b.n 8004128 <m3ch+0x170>
break;
800411e: bf00 nop
8004120: e002 b.n 8004128 <m3ch+0x170>
break;
8004122: bf00 nop
8004124: e000 b.n 8004128 <m3ch+0x170>
break;
8004126: bf00 nop
}
return m3st;
8004128: 4b03 ldr r3, [pc, #12] @ (8004138 <m3ch+0x180>)
800412a: 781b ldrb r3, [r3, #0]
}
800412c: 4618 mov r0, r3
800412e: 3768 adds r7, #104 @ 0x68
8004130: 46bd mov sp, r7
8004132: bd80 pop {r7, pc}
8004134: 2000000d .word 0x2000000d
8004138: 20000468 .word 0x20000468
800413c: 0800f2b4 .word 0x0800f2b4
8004140: 200003a8 .word 0x200003a8
8004144: 200003fc .word 0x200003fc
8004148: 20000440 .word 0x20000440
800414c: 2000044c .word 0x2000044c
8004150: 20000406 .word 0x20000406
8004154: 20000418 .word 0x20000418
8004158: 2000040a .word 0x2000040a
800415c: 20000442 .word 0x20000442
08004160 <m4ch>:
motMov_st m4ch(void){
8004160: b580 push {r7, lr}
8004162: b09c sub sp, #112 @ 0x70
8004164: af02 add r7, sp, #8
static motMov_st m4st;
static motMov_st memm4st=motStop;
char s[100];
if(memm4st!=m4st){
8004166: 4b5d ldr r3, [pc, #372] @ (80042dc <m4ch+0x17c>)
8004168: 781a ldrb r2, [r3, #0]
800416a: 4b5d ldr r3, [pc, #372] @ (80042e0 <m4ch+0x180>)
800416c: 781b ldrb r3, [r3, #0]
800416e: 429a cmp r2, r3
8004170: d017 beq.n 80041a2 <m4ch+0x42>
memm4st=m4st;
8004172: 4b5b ldr r3, [pc, #364] @ (80042e0 <m4ch+0x180>)
8004174: 781a ldrb r2, [r3, #0]
8004176: 4b59 ldr r3, [pc, #356] @ (80042dc <m4ch+0x17c>)
8004178: 701a strb r2, [r3, #0]
sprintf(s,"\nm4ch=%d",m4st);
800417a: 4b59 ldr r3, [pc, #356] @ (80042e0 <m4ch+0x180>)
800417c: 781b ldrb r3, [r3, #0]
800417e: 461a mov r2, r3
8004180: 1d3b adds r3, r7, #4
8004182: 4958 ldr r1, [pc, #352] @ (80042e4 <m4ch+0x184>)
8004184: 4618 mov r0, r3
8004186: f00a f8c3 bl 800e310 <siprintf>
HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
800418a: 1d3b adds r3, r7, #4
800418c: 4618 mov r0, r3
800418e: f7fb ffdd bl 800014c <strlen>
8004192: 4603 mov r3, r0
8004194: b29a uxth r2, r3
8004196: 1d39 adds r1, r7, #4
8004198: f04f 33ff mov.w r3, #4294967295
800419c: 4852 ldr r0, [pc, #328] @ (80042e8 <m4ch+0x188>)
800419e: f005 fac7 bl 8009730 <HAL_UART_Transmit>
}
if(rtCiclo<chM4start)m4st=motWaiting;
80041a2: 4b52 ldr r3, [pc, #328] @ (80042ec <m4ch+0x18c>)
80041a4: 881b ldrh r3, [r3, #0]
80041a6: b29a uxth r2, r3
80041a8: 4b51 ldr r3, [pc, #324] @ (80042f0 <m4ch+0x190>)
80041aa: 881b ldrh r3, [r3, #0]
80041ac: 429a cmp r2, r3
80041ae: d202 bcs.n 80041b6 <m4ch+0x56>
80041b0: 4b4b ldr r3, [pc, #300] @ (80042e0 <m4ch+0x180>)
80041b2: 2200 movs r2, #0
80041b4: 701a strb r2, [r3, #0]
switch(m4st){
80041b6: 4b4a ldr r3, [pc, #296] @ (80042e0 <m4ch+0x180>)
80041b8: 781b ldrb r3, [r3, #0]
80041ba: 2b03 cmp r3, #3
80041bc: d876 bhi.n 80042ac <m4ch+0x14c>
80041be: a201 add r2, pc, #4 @ (adr r2, 80041c4 <m4ch+0x64>)
80041c0: f852 f023 ldr.w pc, [r2, r3, lsl #2]
80041c4: 080041d5 .word 0x080041d5
80041c8: 08004221 .word 0x08004221
80041cc: 08004251 .word 0x08004251
80041d0: 08004283 .word 0x08004283
case motWaiting:
SetMotPerc(M4,FW,0);
80041d4: 2200 movs r2, #0
80041d6: 2100 movs r1, #0
80041d8: 2004 movs r0, #4
80041da: f000 fa7b bl 80046d4 <SetMotPerc>
SetMotPerc(M4,BW,0);
80041de: 2200 movs r2, #0
80041e0: 2101 movs r1, #1
80041e2: 2004 movs r0, #4
80041e4: f000 fa76 bl 80046d4 <SetMotPerc>
if(rtCiclo>=chM4start){
80041e8: 4b40 ldr r3, [pc, #256] @ (80042ec <m4ch+0x18c>)
80041ea: 881b ldrh r3, [r3, #0]
80041ec: b29a uxth r2, r3
80041ee: 4b40 ldr r3, [pc, #256] @ (80042f0 <m4ch+0x190>)
80041f0: 881b ldrh r3, [r3, #0]
80041f2: 429a cmp r2, r3
80041f4: d365 bcc.n 80042c2 <m4ch+0x162>
(void)ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPINIT);
80041f6: 4b3f ldr r3, [pc, #252] @ (80042f4 <m4ch+0x194>)
80041f8: 88db ldrh r3, [r3, #6]
80041fa: b2da uxtb r2, r3
80041fc: 4b3e ldr r3, [pc, #248] @ (80042f8 <m4ch+0x198>)
80041fe: 881b ldrh r3, [r3, #0]
8004200: b2d9 uxtb r1, r3
8004202: 4b3e ldr r3, [pc, #248] @ (80042fc <m4ch+0x19c>)
8004204: 881b ldrh r3, [r3, #0]
8004206: b2db uxtb r3, r3
8004208: 2000 movs r0, #0
800420a: 9001 str r0, [sp, #4]
800420c: 9300 str r3, [sp, #0]
800420e: 460b mov r3, r1
8004210: 2101 movs r1, #1
8004212: 2004 movs r0, #4
8004214: f000 fbde bl 80049d4 <ramp>
m4st=motStartRamp;
8004218: 4b31 ldr r3, [pc, #196] @ (80042e0 <m4ch+0x180>)
800421a: 2201 movs r2, #1
800421c: 701a strb r2, [r3, #0]
}
break;
800421e: e050 b.n 80042c2 <m4ch+0x162>
case motStartRamp:
if(ramp(M4,BW,mrampstart[M4-1],m4pwmch,tramp,RAMPRUN)==DONE){
8004220: 4b34 ldr r3, [pc, #208] @ (80042f4 <m4ch+0x194>)
8004222: 88db ldrh r3, [r3, #6]
8004224: b2da uxtb r2, r3
8004226: 4b34 ldr r3, [pc, #208] @ (80042f8 <m4ch+0x198>)
8004228: 881b ldrh r3, [r3, #0]
800422a: b2d9 uxtb r1, r3
800422c: 4b33 ldr r3, [pc, #204] @ (80042fc <m4ch+0x19c>)
800422e: 881b ldrh r3, [r3, #0]
8004230: b2db uxtb r3, r3
8004232: 200a movs r0, #10
8004234: 9001 str r0, [sp, #4]
8004236: 9300 str r3, [sp, #0]
8004238: 460b mov r3, r1
800423a: 2101 movs r1, #1
800423c: 2004 movs r0, #4
800423e: f000 fbc9 bl 80049d4 <ramp>
8004242: 4603 mov r3, r0
8004244: 2b00 cmp r3, #0
8004246: d13e bne.n 80042c6 <m4ch+0x166>
m4st=motWaitingTime;
8004248: 4b25 ldr r3, [pc, #148] @ (80042e0 <m4ch+0x180>)
800424a: 2202 movs r2, #2
800424c: 701a strb r2, [r3, #0]
}
break;
800424e: e03a b.n 80042c6 <m4ch+0x166>
case motWaitingTime:
if(rtCiclo>=chM4stop){
8004250: 4b26 ldr r3, [pc, #152] @ (80042ec <m4ch+0x18c>)
8004252: 881b ldrh r3, [r3, #0]
8004254: b29a uxth r2, r3
8004256: 4b2a ldr r3, [pc, #168] @ (8004300 <m4ch+0x1a0>)
8004258: 881b ldrh r3, [r3, #0]
800425a: 429a cmp r2, r3
800425c: d335 bcc.n 80042ca <m4ch+0x16a>
(void)ramp(M4,BW,m4pwmch,0,tramp,RAMPINIT);
800425e: 4b26 ldr r3, [pc, #152] @ (80042f8 <m4ch+0x198>)
8004260: 881b ldrh r3, [r3, #0]
8004262: b2da uxtb r2, r3
8004264: 4b25 ldr r3, [pc, #148] @ (80042fc <m4ch+0x19c>)
8004266: 881b ldrh r3, [r3, #0]
8004268: b2db uxtb r3, r3
800426a: 2100 movs r1, #0
800426c: 9101 str r1, [sp, #4]
800426e: 9300 str r3, [sp, #0]
8004270: 2300 movs r3, #0
8004272: 2101 movs r1, #1
8004274: 2004 movs r0, #4
8004276: f000 fbad bl 80049d4 <ramp>
m4st=motStopRamp;
800427a: 4b19 ldr r3, [pc, #100] @ (80042e0 <m4ch+0x180>)
800427c: 2203 movs r2, #3
800427e: 701a strb r2, [r3, #0]
}
break;
8004280: e023 b.n 80042ca <m4ch+0x16a>
case motStopRamp:
if(ramp(M4,BW,m4pwmch,0,tramp,RAMPRUN)==DONE){
8004282: 4b1d ldr r3, [pc, #116] @ (80042f8 <m4ch+0x198>)
8004284: 881b ldrh r3, [r3, #0]
8004286: b2da uxtb r2, r3
8004288: 4b1c ldr r3, [pc, #112] @ (80042fc <m4ch+0x19c>)
800428a: 881b ldrh r3, [r3, #0]
800428c: b2db uxtb r3, r3
800428e: 210a movs r1, #10
8004290: 9101 str r1, [sp, #4]
8004292: 9300 str r3, [sp, #0]
8004294: 2300 movs r3, #0
8004296: 2101 movs r1, #1
8004298: 2004 movs r0, #4
800429a: f000 fb9b bl 80049d4 <ramp>
800429e: 4603 mov r3, r0
80042a0: 2b00 cmp r3, #0
80042a2: d114 bne.n 80042ce <m4ch+0x16e>
m4st=motStop;
80042a4: 4b0e ldr r3, [pc, #56] @ (80042e0 <m4ch+0x180>)
80042a6: 2204 movs r2, #4
80042a8: 701a strb r2, [r3, #0]
}
break;
80042aa: e010 b.n 80042ce <m4ch+0x16e>
case motStop:
default:
SetMotPerc(M4,FW,0);
80042ac: 2200 movs r2, #0
80042ae: 2100 movs r1, #0
80042b0: 2004 movs r0, #4
80042b2: f000 fa0f bl 80046d4 <SetMotPerc>
SetMotPerc(M4,BW,0);
80042b6: 2200 movs r2, #0
80042b8: 2101 movs r1, #1
80042ba: 2004 movs r0, #4
80042bc: f000 fa0a bl 80046d4 <SetMotPerc>
break;
80042c0: e006 b.n 80042d0 <m4ch+0x170>
break;
80042c2: bf00 nop
80042c4: e004 b.n 80042d0 <m4ch+0x170>
break;
80042c6: bf00 nop
80042c8: e002 b.n 80042d0 <m4ch+0x170>
break;
80042ca: bf00 nop
80042cc: e000 b.n 80042d0 <m4ch+0x170>
break;
80042ce: bf00 nop
}
return m4st;
80042d0: 4b03 ldr r3, [pc, #12] @ (80042e0 <m4ch+0x180>)
80042d2: 781b ldrb r3, [r3, #0]
}
80042d4: 4618 mov r0, r3
80042d6: 3768 adds r7, #104 @ 0x68
80042d8: 46bd mov sp, r7
80042da: bd80 pop {r7, pc}
80042dc: 2000000e .word 0x2000000e
80042e0: 20000469 .word 0x20000469
80042e4: 0800f2c0 .word 0x0800f2c0
80042e8: 200003a8 .word 0x200003a8
80042ec: 200003fc .word 0x200003fc
80042f0: 20000444 .word 0x20000444
80042f4: 2000044c .word 0x2000044c
80042f8: 2000040e .word 0x2000040e
80042fc: 20000418 .word 0x20000418
8004300: 20000446 .word 0x20000446
08004304 <IsPwmRunning>:
extern volatile uint16_t rtramp[4];
extern uint16_t mrampstart[4];
extern UART_HandleTypeDef huart1;
bool IsPwmRunning(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8004304: b580 push {r7, lr}
8004306: b084 sub sp, #16
8004308: af00 add r7, sp, #0
800430a: 6078 str r0, [r7, #4]
800430c: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef chState = HAL_TIM_GetChannelState(htim, Channel);
800430e: 6839 ldr r1, [r7, #0]
8004310: 6878 ldr r0, [r7, #4]
8004312: f004 fe86 bl 8009022 <HAL_TIM_GetChannelState>
8004316: 4603 mov r3, r0
8004318: 73fb strb r3, [r7, #15]
return (chState == HAL_TIM_CHANNEL_STATE_BUSY);
800431a: 7bfb ldrb r3, [r7, #15]
800431c: 2b02 cmp r3, #2
800431e: bf0c ite eq
8004320: 2301 moveq r3, #1
8004322: 2300 movne r3, #0
8004324: b2db uxtb r3, r3
}
8004326: 4618 mov r0, r3
8004328: 3710 adds r7, #16
800432a: 46bd mov sp, r7
800432c: bd80 pop {r7, pc}
0800432e <StopMot>:
void StopMot(TIM_HandleTypeDef *htim,uint32_t Channel){
800432e: b580 push {r7, lr}
8004330: b082 sub sp, #8
8004332: af00 add r7, sp, #0
8004334: 6078 str r0, [r7, #4]
8004336: 6039 str r1, [r7, #0]
HAL_TIM_PWM_Stop(htim, Channel);
8004338: 6839 ldr r1, [r7, #0]
800433a: 6878 ldr r0, [r7, #4]
800433c: f004 fc84 bl 8008c48 <HAL_TIM_PWM_Stop>
}
8004340: bf00 nop
8004342: 3708 adds r7, #8
8004344: 46bd mov sp, r7
8004346: bd80 pop {r7, pc}
08004348 <StartMot>:
void StartMot(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
8004348: b580 push {r7, lr}
800434a: b084 sub sp, #16
800434c: af00 add r7, sp, #0
800434e: 60f8 str r0, [r7, #12]
8004350: 60b9 str r1, [r7, #8]
8004352: 4613 mov r3, r2
8004354: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
8004356: 68bb ldr r3, [r7, #8]
8004358: 2b00 cmp r3, #0
800435a: d104 bne.n 8004366 <StartMot+0x1e>
800435c: 68fb ldr r3, [r7, #12]
800435e: 681b ldr r3, [r3, #0]
8004360: 88fa ldrh r2, [r7, #6]
8004362: 635a str r2, [r3, #52] @ 0x34
8004364: e013 b.n 800438e <StartMot+0x46>
8004366: 68bb ldr r3, [r7, #8]
8004368: 2b04 cmp r3, #4
800436a: d104 bne.n 8004376 <StartMot+0x2e>
800436c: 68fb ldr r3, [r7, #12]
800436e: 681a ldr r2, [r3, #0]
8004370: 88fb ldrh r3, [r7, #6]
8004372: 6393 str r3, [r2, #56] @ 0x38
8004374: e00b b.n 800438e <StartMot+0x46>
8004376: 68bb ldr r3, [r7, #8]
8004378: 2b08 cmp r3, #8
800437a: d104 bne.n 8004386 <StartMot+0x3e>
800437c: 68fb ldr r3, [r7, #12]
800437e: 681a ldr r2, [r3, #0]
8004380: 88fb ldrh r3, [r7, #6]
8004382: 63d3 str r3, [r2, #60] @ 0x3c
8004384: e003 b.n 800438e <StartMot+0x46>
8004386: 68fb ldr r3, [r7, #12]
8004388: 681a ldr r2, [r3, #0]
800438a: 88fb ldrh r3, [r7, #6]
800438c: 6413 str r3, [r2, #64] @ 0x40
HAL_TIM_PWM_Start(htim, Channel);
800438e: 68b9 ldr r1, [r7, #8]
8004390: 68f8 ldr r0, [r7, #12]
8004392: f004 fbb7 bl 8008b04 <HAL_TIM_PWM_Start>
}
8004396: bf00 nop
8004398: 3710 adds r7, #16
800439a: 46bd mov sp, r7
800439c: bd80 pop {r7, pc}
0800439e <SetMotPwm>:
void SetMotPwm(TIM_HandleTypeDef *htim,uint32_t Channel,uint16_t pwmval){
800439e: b480 push {r7}
80043a0: b085 sub sp, #20
80043a2: af00 add r7, sp, #0
80043a4: 60f8 str r0, [r7, #12]
80043a6: 60b9 str r1, [r7, #8]
80043a8: 4613 mov r3, r2
80043aa: 80fb strh r3, [r7, #6]
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80043ac: 68bb ldr r3, [r7, #8]
80043ae: 2b00 cmp r3, #0
80043b0: d104 bne.n 80043bc <SetMotPwm+0x1e>
80043b2: 68fb ldr r3, [r7, #12]
80043b4: 681b ldr r3, [r3, #0]
80043b6: 88fa ldrh r2, [r7, #6]
80043b8: 635a str r2, [r3, #52] @ 0x34
}
80043ba: e013 b.n 80043e4 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80043bc: 68bb ldr r3, [r7, #8]
80043be: 2b04 cmp r3, #4
80043c0: d104 bne.n 80043cc <SetMotPwm+0x2e>
80043c2: 68fb ldr r3, [r7, #12]
80043c4: 681a ldr r2, [r3, #0]
80043c6: 88fb ldrh r3, [r7, #6]
80043c8: 6393 str r3, [r2, #56] @ 0x38
}
80043ca: e00b b.n 80043e4 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80043cc: 68bb ldr r3, [r7, #8]
80043ce: 2b08 cmp r3, #8
80043d0: d104 bne.n 80043dc <SetMotPwm+0x3e>
80043d2: 68fb ldr r3, [r7, #12]
80043d4: 681a ldr r2, [r3, #0]
80043d6: 88fb ldrh r3, [r7, #6]
80043d8: 63d3 str r3, [r2, #60] @ 0x3c
}
80043da: e003 b.n 80043e4 <SetMotPwm+0x46>
__HAL_TIM_SET_COMPARE(htim, Channel, pwmval);
80043dc: 68fb ldr r3, [r7, #12]
80043de: 681a ldr r2, [r3, #0]
80043e0: 88fb ldrh r3, [r7, #6]
80043e2: 6413 str r3, [r2, #64] @ 0x40
}
80043e4: bf00 nop
80043e6: 3714 adds r7, #20
80043e8: 46bd mov sp, r7
80043ea: bc80 pop {r7}
80043ec: 4770 bx lr
...
080043f0 <SetMot>:
void SetMot(uint8_t mot,uint8_t dir,uint16_t pwmval){
80043f0: b580 push {r7, lr}
80043f2: b082 sub sp, #8
80043f4: af00 add r7, sp, #0
80043f6: 4603 mov r3, r0
80043f8: 71fb strb r3, [r7, #7]
80043fa: 460b mov r3, r1
80043fc: 71bb strb r3, [r7, #6]
80043fe: 4613 mov r3, r2
8004400: 80bb strh r3, [r7, #4]
switch(mot){
8004402: 79fb ldrb r3, [r7, #7]
8004404: 3b01 subs r3, #1
8004406: 2b03 cmp r3, #3
8004408: f200 8158 bhi.w 80046bc <SetMot+0x2cc>
800440c: a201 add r2, pc, #4 @ (adr r2, 8004414 <SetMot+0x24>)
800440e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004412: bf00 nop
8004414: 08004425 .word 0x08004425
8004418: 080044c7 .word 0x080044c7
800441c: 08004569 .word 0x08004569
8004420: 08004613 .word 0x08004613
case 1:
if(dir==FW){
8004424: 79bb ldrb r3, [r7, #6]
8004426: 2b00 cmp r3, #0
8004428: d126 bne.n 8004478 <SetMot+0x88>
if(pwmval==0){
800442a: 88bb ldrh r3, [r7, #4]
800442c: 2b00 cmp r3, #0
800442e: d109 bne.n 8004444 <SetMot+0x54>
StopMot(timMot1,FWMot1);
8004430: 2100 movs r1, #0
8004432: 48a5 ldr r0, [pc, #660] @ (80046c8 <SetMot+0x2d8>)
8004434: f7ff ff7b bl 800432e <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004438: 2200 movs r2, #0
800443a: 2102 movs r1, #2
800443c: 48a3 ldr r0, [pc, #652] @ (80046cc <SetMot+0x2dc>)
800443e: f002 f878 bl 8006532 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
8004442: e13c b.n 80046be <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, FWMot1)){
8004444: 2100 movs r1, #0
8004446: 48a0 ldr r0, [pc, #640] @ (80046c8 <SetMot+0x2d8>)
8004448: f7ff ff5c bl 8004304 <IsPwmRunning>
800444c: 4603 mov r3, r0
800444e: 2b00 cmp r3, #0
8004450: d006 beq.n 8004460 <SetMot+0x70>
SetMotPwm(timMot1,FWMot1,pwmval);
8004452: 88bb ldrh r3, [r7, #4]
8004454: 461a mov r2, r3
8004456: 2100 movs r1, #0
8004458: 489b ldr r0, [pc, #620] @ (80046c8 <SetMot+0x2d8>)
800445a: f7ff ffa0 bl 800439e <SetMotPwm>
break;
800445e: e12e b.n 80046be <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
8004460: 2201 movs r2, #1
8004462: 2102 movs r1, #2
8004464: 4899 ldr r0, [pc, #612] @ (80046cc <SetMot+0x2dc>)
8004466: f002 f864 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
800446a: 88bb ldrh r3, [r7, #4]
800446c: 461a mov r2, r3
800446e: 2100 movs r1, #0
8004470: 4895 ldr r0, [pc, #596] @ (80046c8 <SetMot+0x2d8>)
8004472: f7ff ff69 bl 8004348 <StartMot>
break;
8004476: e122 b.n 80046be <SetMot+0x2ce>
if(pwmval==0){
8004478: 88bb ldrh r3, [r7, #4]
800447a: 2b00 cmp r3, #0
800447c: d109 bne.n 8004492 <SetMot+0xa2>
StopMot(timMot1,BWMot1);
800447e: 2104 movs r1, #4
8004480: 4891 ldr r0, [pc, #580] @ (80046c8 <SetMot+0x2d8>)
8004482: f7ff ff54 bl 800432e <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004486: 2200 movs r2, #0
8004488: 2102 movs r1, #2
800448a: 4890 ldr r0, [pc, #576] @ (80046cc <SetMot+0x2dc>)
800448c: f002 f851 bl 8006532 <HAL_GPIO_WritePin>
break;
8004490: e115 b.n 80046be <SetMot+0x2ce>
}else if(IsPwmRunning(timMot1, BWMot1)){
8004492: 2104 movs r1, #4
8004494: 488c ldr r0, [pc, #560] @ (80046c8 <SetMot+0x2d8>)
8004496: f7ff ff35 bl 8004304 <IsPwmRunning>
800449a: 4603 mov r3, r0
800449c: 2b00 cmp r3, #0
800449e: d006 beq.n 80044ae <SetMot+0xbe>
SetMotPwm(timMot1,BWMot1,pwmval);
80044a0: 88bb ldrh r3, [r7, #4]
80044a2: 461a mov r2, r3
80044a4: 2104 movs r1, #4
80044a6: 4888 ldr r0, [pc, #544] @ (80046c8 <SetMot+0x2d8>)
80044a8: f7ff ff79 bl 800439e <SetMotPwm>
break;
80044ac: e107 b.n 80046be <SetMot+0x2ce>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80044ae: 2201 movs r2, #1
80044b0: 2102 movs r1, #2
80044b2: 4886 ldr r0, [pc, #536] @ (80046cc <SetMot+0x2dc>)
80044b4: f002 f83d bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
80044b8: 88bb ldrh r3, [r7, #4]
80044ba: 461a mov r2, r3
80044bc: 2104 movs r1, #4
80044be: 4882 ldr r0, [pc, #520] @ (80046c8 <SetMot+0x2d8>)
80044c0: f7ff ff42 bl 8004348 <StartMot>
break;
80044c4: e0fb b.n 80046be <SetMot+0x2ce>
case 2:
if(dir==FW){
80044c6: 79bb ldrb r3, [r7, #6]
80044c8: 2b00 cmp r3, #0
80044ca: d126 bne.n 800451a <SetMot+0x12a>
if(pwmval==0){
80044cc: 88bb ldrh r3, [r7, #4]
80044ce: 2b00 cmp r3, #0
80044d0: d109 bne.n 80044e6 <SetMot+0xf6>
StopMot(timMot2,FWMot2);
80044d2: 2108 movs r1, #8
80044d4: 487c ldr r0, [pc, #496] @ (80046c8 <SetMot+0x2d8>)
80044d6: f7ff ff2a bl 800432e <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80044da: 2200 movs r2, #0
80044dc: 2104 movs r1, #4
80044de: 487b ldr r0, [pc, #492] @ (80046cc <SetMot+0x2dc>)
80044e0: f002 f827 bl 8006532 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
80044e4: e0eb b.n 80046be <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, FWMot2)){
80044e6: 2108 movs r1, #8
80044e8: 4877 ldr r0, [pc, #476] @ (80046c8 <SetMot+0x2d8>)
80044ea: f7ff ff0b bl 8004304 <IsPwmRunning>
80044ee: 4603 mov r3, r0
80044f0: 2b00 cmp r3, #0
80044f2: d006 beq.n 8004502 <SetMot+0x112>
SetMotPwm(timMot2,FWMot2,pwmval);
80044f4: 88bb ldrh r3, [r7, #4]
80044f6: 461a mov r2, r3
80044f8: 2108 movs r1, #8
80044fa: 4873 ldr r0, [pc, #460] @ (80046c8 <SetMot+0x2d8>)
80044fc: f7ff ff4f bl 800439e <SetMotPwm>
break;
8004500: e0dd b.n 80046be <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004502: 2201 movs r2, #1
8004504: 2104 movs r1, #4
8004506: 4871 ldr r0, [pc, #452] @ (80046cc <SetMot+0x2dc>)
8004508: f002 f813 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
800450c: 88bb ldrh r3, [r7, #4]
800450e: 461a mov r2, r3
8004510: 2108 movs r1, #8
8004512: 486d ldr r0, [pc, #436] @ (80046c8 <SetMot+0x2d8>)
8004514: f7ff ff18 bl 8004348 <StartMot>
break;
8004518: e0d1 b.n 80046be <SetMot+0x2ce>
if(pwmval==0){
800451a: 88bb ldrh r3, [r7, #4]
800451c: 2b00 cmp r3, #0
800451e: d109 bne.n 8004534 <SetMot+0x144>
StopMot(timMot2,BWMot2);
8004520: 210c movs r1, #12
8004522: 4869 ldr r0, [pc, #420] @ (80046c8 <SetMot+0x2d8>)
8004524: f7ff ff03 bl 800432e <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8004528: 2200 movs r2, #0
800452a: 2104 movs r1, #4
800452c: 4867 ldr r0, [pc, #412] @ (80046cc <SetMot+0x2dc>)
800452e: f002 f800 bl 8006532 <HAL_GPIO_WritePin>
break;
8004532: e0c4 b.n 80046be <SetMot+0x2ce>
}else if(IsPwmRunning(timMot2, BWMot2)){
8004534: 210c movs r1, #12
8004536: 4864 ldr r0, [pc, #400] @ (80046c8 <SetMot+0x2d8>)
8004538: f7ff fee4 bl 8004304 <IsPwmRunning>
800453c: 4603 mov r3, r0
800453e: 2b00 cmp r3, #0
8004540: d006 beq.n 8004550 <SetMot+0x160>
SetMotPwm(timMot2,BWMot2,pwmval);
8004542: 88bb ldrh r3, [r7, #4]
8004544: 461a mov r2, r3
8004546: 210c movs r1, #12
8004548: 485f ldr r0, [pc, #380] @ (80046c8 <SetMot+0x2d8>)
800454a: f7ff ff28 bl 800439e <SetMotPwm>
break;
800454e: e0b6 b.n 80046be <SetMot+0x2ce>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
8004550: 2201 movs r2, #1
8004552: 2104 movs r1, #4
8004554: 485d ldr r0, [pc, #372] @ (80046cc <SetMot+0x2dc>)
8004556: f001 ffec bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
800455a: 88bb ldrh r3, [r7, #4]
800455c: 461a mov r2, r3
800455e: 210c movs r1, #12
8004560: 4859 ldr r0, [pc, #356] @ (80046c8 <SetMot+0x2d8>)
8004562: f7ff fef1 bl 8004348 <StartMot>
break;
8004566: e0aa b.n 80046be <SetMot+0x2ce>
case 3:
if(dir==FW){
8004568: 79bb ldrb r3, [r7, #6]
800456a: 2b00 cmp r3, #0
800456c: d128 bne.n 80045c0 <SetMot+0x1d0>
if(pwmval==0){
800456e: 88bb ldrh r3, [r7, #4]
8004570: 2b00 cmp r3, #0
8004572: d10a bne.n 800458a <SetMot+0x19a>
StopMot(timMot3,FWMot3);
8004574: 2100 movs r1, #0
8004576: 4856 ldr r0, [pc, #344] @ (80046d0 <SetMot+0x2e0>)
8004578: f7ff fed9 bl 800432e <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
800457c: 2200 movs r2, #0
800457e: f44f 6180 mov.w r1, #1024 @ 0x400
8004582: 4852 ldr r0, [pc, #328] @ (80046cc <SetMot+0x2dc>)
8004584: f001 ffd5 bl 8006532 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8004588: e099 b.n 80046be <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, FWMot3)){
800458a: 2100 movs r1, #0
800458c: 4850 ldr r0, [pc, #320] @ (80046d0 <SetMot+0x2e0>)
800458e: f7ff feb9 bl 8004304 <IsPwmRunning>
8004592: 4603 mov r3, r0
8004594: 2b00 cmp r3, #0
8004596: d006 beq.n 80045a6 <SetMot+0x1b6>
SetMotPwm(timMot3,FWMot3,pwmval);
8004598: 88bb ldrh r3, [r7, #4]
800459a: 461a mov r2, r3
800459c: 2100 movs r1, #0
800459e: 484c ldr r0, [pc, #304] @ (80046d0 <SetMot+0x2e0>)
80045a0: f7ff fefd bl 800439e <SetMotPwm>
break;
80045a4: e08b b.n 80046be <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80045a6: 2201 movs r2, #1
80045a8: f44f 6180 mov.w r1, #1024 @ 0x400
80045ac: 4847 ldr r0, [pc, #284] @ (80046cc <SetMot+0x2dc>)
80045ae: f001 ffc0 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
80045b2: 88bb ldrh r3, [r7, #4]
80045b4: 461a mov r2, r3
80045b6: 2100 movs r1, #0
80045b8: 4845 ldr r0, [pc, #276] @ (80046d0 <SetMot+0x2e0>)
80045ba: f7ff fec5 bl 8004348 <StartMot>
break;
80045be: e07e b.n 80046be <SetMot+0x2ce>
if(pwmval==0){
80045c0: 88bb ldrh r3, [r7, #4]
80045c2: 2b00 cmp r3, #0
80045c4: d10a bne.n 80045dc <SetMot+0x1ec>
StopMot(timMot3,BWMot3);
80045c6: 2104 movs r1, #4
80045c8: 4841 ldr r0, [pc, #260] @ (80046d0 <SetMot+0x2e0>)
80045ca: f7ff feb0 bl 800432e <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
80045ce: 2200 movs r2, #0
80045d0: f44f 6180 mov.w r1, #1024 @ 0x400
80045d4: 483d ldr r0, [pc, #244] @ (80046cc <SetMot+0x2dc>)
80045d6: f001 ffac bl 8006532 <HAL_GPIO_WritePin>
break;
80045da: e070 b.n 80046be <SetMot+0x2ce>
}else if(IsPwmRunning(timMot3, BWMot3)){
80045dc: 2104 movs r1, #4
80045de: 483c ldr r0, [pc, #240] @ (80046d0 <SetMot+0x2e0>)
80045e0: f7ff fe90 bl 8004304 <IsPwmRunning>
80045e4: 4603 mov r3, r0
80045e6: 2b00 cmp r3, #0
80045e8: d006 beq.n 80045f8 <SetMot+0x208>
SetMotPwm(timMot3,BWMot3,pwmval);
80045ea: 88bb ldrh r3, [r7, #4]
80045ec: 461a mov r2, r3
80045ee: 2104 movs r1, #4
80045f0: 4837 ldr r0, [pc, #220] @ (80046d0 <SetMot+0x2e0>)
80045f2: f7ff fed4 bl 800439e <SetMotPwm>
break;
80045f6: e062 b.n 80046be <SetMot+0x2ce>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80045f8: 2201 movs r2, #1
80045fa: f44f 6180 mov.w r1, #1024 @ 0x400
80045fe: 4833 ldr r0, [pc, #204] @ (80046cc <SetMot+0x2dc>)
8004600: f001 ff97 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004604: 88bb ldrh r3, [r7, #4]
8004606: 461a mov r2, r3
8004608: 2104 movs r1, #4
800460a: 4831 ldr r0, [pc, #196] @ (80046d0 <SetMot+0x2e0>)
800460c: f7ff fe9c bl 8004348 <StartMot>
break;
8004610: e055 b.n 80046be <SetMot+0x2ce>
case 4:
if(dir==FW){
8004612: 79bb ldrb r3, [r7, #6]
8004614: 2b00 cmp r3, #0
8004616: d128 bne.n 800466a <SetMot+0x27a>
if(pwmval==0){
8004618: 88bb ldrh r3, [r7, #4]
800461a: 2b00 cmp r3, #0
800461c: d10a bne.n 8004634 <SetMot+0x244>
StopMot(timMot4,FWMot4);
800461e: 2108 movs r1, #8
8004620: 482b ldr r0, [pc, #172] @ (80046d0 <SetMot+0x2e0>)
8004622: f7ff fe84 bl 800432e <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004626: 2200 movs r2, #0
8004628: f44f 6100 mov.w r1, #2048 @ 0x800
800462c: 4827 ldr r0, [pc, #156] @ (80046cc <SetMot+0x2dc>)
800462e: f001 ff80 bl 8006532 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
8004632: e044 b.n 80046be <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, FWMot4)){
8004634: 2108 movs r1, #8
8004636: 4826 ldr r0, [pc, #152] @ (80046d0 <SetMot+0x2e0>)
8004638: f7ff fe64 bl 8004304 <IsPwmRunning>
800463c: 4603 mov r3, r0
800463e: 2b00 cmp r3, #0
8004640: d006 beq.n 8004650 <SetMot+0x260>
SetMotPwm(timMot4,FWMot4,pwmval);
8004642: 88bb ldrh r3, [r7, #4]
8004644: 461a mov r2, r3
8004646: 2108 movs r1, #8
8004648: 4821 ldr r0, [pc, #132] @ (80046d0 <SetMot+0x2e0>)
800464a: f7ff fea8 bl 800439e <SetMotPwm>
break;
800464e: e036 b.n 80046be <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
8004650: 2201 movs r2, #1
8004652: f44f 6100 mov.w r1, #2048 @ 0x800
8004656: 481d ldr r0, [pc, #116] @ (80046cc <SetMot+0x2dc>)
8004658: f001 ff6b bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
800465c: 88bb ldrh r3, [r7, #4]
800465e: 461a mov r2, r3
8004660: 2108 movs r1, #8
8004662: 481b ldr r0, [pc, #108] @ (80046d0 <SetMot+0x2e0>)
8004664: f7ff fe70 bl 8004348 <StartMot>
break;
8004668: e029 b.n 80046be <SetMot+0x2ce>
if(pwmval==0){
800466a: 88bb ldrh r3, [r7, #4]
800466c: 2b00 cmp r3, #0
800466e: d10a bne.n 8004686 <SetMot+0x296>
StopMot(timMot4,BWMot4);
8004670: 210c movs r1, #12
8004672: 4817 ldr r0, [pc, #92] @ (80046d0 <SetMot+0x2e0>)
8004674: f7ff fe5b bl 800432e <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004678: 2200 movs r2, #0
800467a: f44f 6100 mov.w r1, #2048 @ 0x800
800467e: 4813 ldr r0, [pc, #76] @ (80046cc <SetMot+0x2dc>)
8004680: f001 ff57 bl 8006532 <HAL_GPIO_WritePin>
break;
8004684: e01b b.n 80046be <SetMot+0x2ce>
}else if(IsPwmRunning(timMot4, BWMot4)){
8004686: 210c movs r1, #12
8004688: 4811 ldr r0, [pc, #68] @ (80046d0 <SetMot+0x2e0>)
800468a: f7ff fe3b bl 8004304 <IsPwmRunning>
800468e: 4603 mov r3, r0
8004690: 2b00 cmp r3, #0
8004692: d006 beq.n 80046a2 <SetMot+0x2b2>
SetMotPwm(timMot4,BWMot4,pwmval);
8004694: 88bb ldrh r3, [r7, #4]
8004696: 461a mov r2, r3
8004698: 210c movs r1, #12
800469a: 480d ldr r0, [pc, #52] @ (80046d0 <SetMot+0x2e0>)
800469c: f7ff fe7f bl 800439e <SetMotPwm>
break;
80046a0: e00d b.n 80046be <SetMot+0x2ce>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
80046a2: 2201 movs r2, #1
80046a4: f44f 6100 mov.w r1, #2048 @ 0x800
80046a8: 4808 ldr r0, [pc, #32] @ (80046cc <SetMot+0x2dc>)
80046aa: f001 ff42 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
80046ae: 88bb ldrh r3, [r7, #4]
80046b0: 461a mov r2, r3
80046b2: 210c movs r1, #12
80046b4: 4806 ldr r0, [pc, #24] @ (80046d0 <SetMot+0x2e0>)
80046b6: f7ff fe47 bl 8004348 <StartMot>
break;
80046ba: e000 b.n 80046be <SetMot+0x2ce>
default:
break;
80046bc: bf00 nop
}
}
80046be: bf00 nop
80046c0: 3708 adds r7, #8
80046c2: 46bd mov sp, r7
80046c4: bd80 pop {r7, pc}
80046c6: bf00 nop
80046c8: 20000318 .word 0x20000318
80046cc: 40010c00 .word 0x40010c00
80046d0: 20000360 .word 0x20000360
080046d4 <SetMotPerc>:
void SetMotPerc(uint8_t mot,uint8_t dir,uint8_t perc){
80046d4: b580 push {r7, lr}
80046d6: b084 sub sp, #16
80046d8: af00 add r7, sp, #0
80046da: 4603 mov r3, r0
80046dc: 71fb strb r3, [r7, #7]
80046de: 460b mov r3, r1
80046e0: 71bb strb r3, [r7, #6]
80046e2: 4613 mov r3, r2
80046e4: 717b strb r3, [r7, #5]
uint16_t pwmval;
uint32_t tempval;
tempval=perc;
80046e6: 797b ldrb r3, [r7, #5]
80046e8: 60fb str r3, [r7, #12]
tempval*=16384;
80046ea: 68fb ldr r3, [r7, #12]
80046ec: 039b lsls r3, r3, #14
80046ee: 60fb str r3, [r7, #12]
tempval/=100;
80046f0: 68fb ldr r3, [r7, #12]
80046f2: 4ab4 ldr r2, [pc, #720] @ (80049c4 <SetMotPerc+0x2f0>)
80046f4: fba2 2303 umull r2, r3, r2, r3
80046f8: 095b lsrs r3, r3, #5
80046fa: 60fb str r3, [r7, #12]
pwmval=(uint16_t)tempval;
80046fc: 68fb ldr r3, [r7, #12]
80046fe: 817b strh r3, [r7, #10]
switch(mot){
8004700: 79fb ldrb r3, [r7, #7]
8004702: 3b01 subs r3, #1
8004704: 2b03 cmp r3, #3
8004706: f200 8157 bhi.w 80049b8 <SetMotPerc+0x2e4>
800470a: a201 add r2, pc, #4 @ (adr r2, 8004710 <SetMotPerc+0x3c>)
800470c: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8004710: 08004721 .word 0x08004721
8004714: 080047c3 .word 0x080047c3
8004718: 08004865 .word 0x08004865
800471c: 0800490f .word 0x0800490f
case 1:
if(dir==FW){
8004720: 79bb ldrb r3, [r7, #6]
8004722: 2b00 cmp r3, #0
8004724: d126 bne.n 8004774 <SetMotPerc+0xa0>
if(pwmval==0){
8004726: 897b ldrh r3, [r7, #10]
8004728: 2b00 cmp r3, #0
800472a: d109 bne.n 8004740 <SetMotPerc+0x6c>
StopMot(timMot1,FWMot1);
800472c: 2100 movs r1, #0
800472e: 48a6 ldr r0, [pc, #664] @ (80049c8 <SetMotPerc+0x2f4>)
8004730: f7ff fdfd bl 800432e <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004734: 2200 movs r2, #0
8004736: 2102 movs r1, #2
8004738: 48a4 ldr r0, [pc, #656] @ (80049cc <SetMotPerc+0x2f8>)
800473a: f001 fefa bl 8006532 <HAL_GPIO_WritePin>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
StartMot(timMot1,BWMot1,pwmval);
}
}
break;
800473e: e13c b.n 80049ba <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, FWMot1)){
8004740: 2100 movs r1, #0
8004742: 48a1 ldr r0, [pc, #644] @ (80049c8 <SetMotPerc+0x2f4>)
8004744: f7ff fdde bl 8004304 <IsPwmRunning>
8004748: 4603 mov r3, r0
800474a: 2b00 cmp r3, #0
800474c: d006 beq.n 800475c <SetMotPerc+0x88>
SetMotPwm(timMot1,FWMot1,pwmval);
800474e: 897b ldrh r3, [r7, #10]
8004750: 461a mov r2, r3
8004752: 2100 movs r1, #0
8004754: 489c ldr r0, [pc, #624] @ (80049c8 <SetMotPerc+0x2f4>)
8004756: f7ff fe22 bl 800439e <SetMotPwm>
break;
800475a: e12e b.n 80049ba <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
800475c: 2201 movs r2, #1
800475e: 2102 movs r1, #2
8004760: 489a ldr r0, [pc, #616] @ (80049cc <SetMotPerc+0x2f8>)
8004762: f001 fee6 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot1,FWMot1,pwmval);
8004766: 897b ldrh r3, [r7, #10]
8004768: 461a mov r2, r3
800476a: 2100 movs r1, #0
800476c: 4896 ldr r0, [pc, #600] @ (80049c8 <SetMotPerc+0x2f4>)
800476e: f7ff fdeb bl 8004348 <StartMot>
break;
8004772: e122 b.n 80049ba <SetMotPerc+0x2e6>
if(pwmval==0){
8004774: 897b ldrh r3, [r7, #10]
8004776: 2b00 cmp r3, #0
8004778: d109 bne.n 800478e <SetMotPerc+0xba>
StopMot(timMot1,BWMot1);
800477a: 2104 movs r1, #4
800477c: 4892 ldr r0, [pc, #584] @ (80049c8 <SetMotPerc+0x2f4>)
800477e: f7ff fdd6 bl 800432e <StopMot>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_RESET);
8004782: 2200 movs r2, #0
8004784: 2102 movs r1, #2
8004786: 4891 ldr r0, [pc, #580] @ (80049cc <SetMotPerc+0x2f8>)
8004788: f001 fed3 bl 8006532 <HAL_GPIO_WritePin>
break;
800478c: e115 b.n 80049ba <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot1, BWMot1)){
800478e: 2104 movs r1, #4
8004790: 488d ldr r0, [pc, #564] @ (80049c8 <SetMotPerc+0x2f4>)
8004792: f7ff fdb7 bl 8004304 <IsPwmRunning>
8004796: 4603 mov r3, r0
8004798: 2b00 cmp r3, #0
800479a: d006 beq.n 80047aa <SetMotPerc+0xd6>
SetMotPwm(timMot1,BWMot1,pwmval);
800479c: 897b ldrh r3, [r7, #10]
800479e: 461a mov r2, r3
80047a0: 2104 movs r1, #4
80047a2: 4889 ldr r0, [pc, #548] @ (80049c8 <SetMotPerc+0x2f4>)
80047a4: f7ff fdfb bl 800439e <SetMotPwm>
break;
80047a8: e107 b.n 80049ba <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH1_GPIO_Port, INH1_Pin, GPIO_PIN_SET);
80047aa: 2201 movs r2, #1
80047ac: 2102 movs r1, #2
80047ae: 4887 ldr r0, [pc, #540] @ (80049cc <SetMotPerc+0x2f8>)
80047b0: f001 febf bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot1,BWMot1,pwmval);
80047b4: 897b ldrh r3, [r7, #10]
80047b6: 461a mov r2, r3
80047b8: 2104 movs r1, #4
80047ba: 4883 ldr r0, [pc, #524] @ (80049c8 <SetMotPerc+0x2f4>)
80047bc: f7ff fdc4 bl 8004348 <StartMot>
break;
80047c0: e0fb b.n 80049ba <SetMotPerc+0x2e6>
case 2:
if(dir==FW){
80047c2: 79bb ldrb r3, [r7, #6]
80047c4: 2b00 cmp r3, #0
80047c6: d126 bne.n 8004816 <SetMotPerc+0x142>
if(pwmval==0){
80047c8: 897b ldrh r3, [r7, #10]
80047ca: 2b00 cmp r3, #0
80047cc: d109 bne.n 80047e2 <SetMotPerc+0x10e>
StopMot(timMot2,FWMot2);
80047ce: 2108 movs r1, #8
80047d0: 487d ldr r0, [pc, #500] @ (80049c8 <SetMotPerc+0x2f4>)
80047d2: f7ff fdac bl 800432e <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
80047d6: 2200 movs r2, #0
80047d8: 2104 movs r1, #4
80047da: 487c ldr r0, [pc, #496] @ (80049cc <SetMotPerc+0x2f8>)
80047dc: f001 fea9 bl 8006532 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
StartMot(timMot2,BWMot2,pwmval);
}
}
break;
80047e0: e0eb b.n 80049ba <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, FWMot2)){
80047e2: 2108 movs r1, #8
80047e4: 4878 ldr r0, [pc, #480] @ (80049c8 <SetMotPerc+0x2f4>)
80047e6: f7ff fd8d bl 8004304 <IsPwmRunning>
80047ea: 4603 mov r3, r0
80047ec: 2b00 cmp r3, #0
80047ee: d006 beq.n 80047fe <SetMotPerc+0x12a>
SetMotPwm(timMot2,FWMot2,pwmval);
80047f0: 897b ldrh r3, [r7, #10]
80047f2: 461a mov r2, r3
80047f4: 2108 movs r1, #8
80047f6: 4874 ldr r0, [pc, #464] @ (80049c8 <SetMotPerc+0x2f4>)
80047f8: f7ff fdd1 bl 800439e <SetMotPwm>
break;
80047fc: e0dd b.n 80049ba <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
80047fe: 2201 movs r2, #1
8004800: 2104 movs r1, #4
8004802: 4872 ldr r0, [pc, #456] @ (80049cc <SetMotPerc+0x2f8>)
8004804: f001 fe95 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot2,FWMot2,pwmval);
8004808: 897b ldrh r3, [r7, #10]
800480a: 461a mov r2, r3
800480c: 2108 movs r1, #8
800480e: 486e ldr r0, [pc, #440] @ (80049c8 <SetMotPerc+0x2f4>)
8004810: f7ff fd9a bl 8004348 <StartMot>
break;
8004814: e0d1 b.n 80049ba <SetMotPerc+0x2e6>
if(pwmval==0){
8004816: 897b ldrh r3, [r7, #10]
8004818: 2b00 cmp r3, #0
800481a: d109 bne.n 8004830 <SetMotPerc+0x15c>
StopMot(timMot2,BWMot2);
800481c: 210c movs r1, #12
800481e: 486a ldr r0, [pc, #424] @ (80049c8 <SetMotPerc+0x2f4>)
8004820: f7ff fd85 bl 800432e <StopMot>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_RESET);
8004824: 2200 movs r2, #0
8004826: 2104 movs r1, #4
8004828: 4868 ldr r0, [pc, #416] @ (80049cc <SetMotPerc+0x2f8>)
800482a: f001 fe82 bl 8006532 <HAL_GPIO_WritePin>
break;
800482e: e0c4 b.n 80049ba <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot2, BWMot2)){
8004830: 210c movs r1, #12
8004832: 4865 ldr r0, [pc, #404] @ (80049c8 <SetMotPerc+0x2f4>)
8004834: f7ff fd66 bl 8004304 <IsPwmRunning>
8004838: 4603 mov r3, r0
800483a: 2b00 cmp r3, #0
800483c: d006 beq.n 800484c <SetMotPerc+0x178>
SetMotPwm(timMot2,BWMot2,pwmval);
800483e: 897b ldrh r3, [r7, #10]
8004840: 461a mov r2, r3
8004842: 210c movs r1, #12
8004844: 4860 ldr r0, [pc, #384] @ (80049c8 <SetMotPerc+0x2f4>)
8004846: f7ff fdaa bl 800439e <SetMotPwm>
break;
800484a: e0b6 b.n 80049ba <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH2_GPIO_Port, INH2_Pin, GPIO_PIN_SET);
800484c: 2201 movs r2, #1
800484e: 2104 movs r1, #4
8004850: 485e ldr r0, [pc, #376] @ (80049cc <SetMotPerc+0x2f8>)
8004852: f001 fe6e bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot2,BWMot2,pwmval);
8004856: 897b ldrh r3, [r7, #10]
8004858: 461a mov r2, r3
800485a: 210c movs r1, #12
800485c: 485a ldr r0, [pc, #360] @ (80049c8 <SetMotPerc+0x2f4>)
800485e: f7ff fd73 bl 8004348 <StartMot>
break;
8004862: e0aa b.n 80049ba <SetMotPerc+0x2e6>
case 3:
if(dir==FW){
8004864: 79bb ldrb r3, [r7, #6]
8004866: 2b00 cmp r3, #0
8004868: d128 bne.n 80048bc <SetMotPerc+0x1e8>
if(pwmval==0){
800486a: 897b ldrh r3, [r7, #10]
800486c: 2b00 cmp r3, #0
800486e: d10a bne.n 8004886 <SetMotPerc+0x1b2>
StopMot(timMot3,FWMot3);
8004870: 2100 movs r1, #0
8004872: 4857 ldr r0, [pc, #348] @ (80049d0 <SetMotPerc+0x2fc>)
8004874: f7ff fd5b bl 800432e <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
8004878: 2200 movs r2, #0
800487a: f44f 6180 mov.w r1, #1024 @ 0x400
800487e: 4853 ldr r0, [pc, #332] @ (80049cc <SetMotPerc+0x2f8>)
8004880: f001 fe57 bl 8006532 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
StartMot(timMot3,BWMot3,pwmval);
}
}
break;
8004884: e099 b.n 80049ba <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, FWMot3)){
8004886: 2100 movs r1, #0
8004888: 4851 ldr r0, [pc, #324] @ (80049d0 <SetMotPerc+0x2fc>)
800488a: f7ff fd3b bl 8004304 <IsPwmRunning>
800488e: 4603 mov r3, r0
8004890: 2b00 cmp r3, #0
8004892: d006 beq.n 80048a2 <SetMotPerc+0x1ce>
SetMotPwm(timMot3,FWMot3,pwmval);
8004894: 897b ldrh r3, [r7, #10]
8004896: 461a mov r2, r3
8004898: 2100 movs r1, #0
800489a: 484d ldr r0, [pc, #308] @ (80049d0 <SetMotPerc+0x2fc>)
800489c: f7ff fd7f bl 800439e <SetMotPwm>
break;
80048a0: e08b b.n 80049ba <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80048a2: 2201 movs r2, #1
80048a4: f44f 6180 mov.w r1, #1024 @ 0x400
80048a8: 4848 ldr r0, [pc, #288] @ (80049cc <SetMotPerc+0x2f8>)
80048aa: f001 fe42 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot3,FWMot3,pwmval);
80048ae: 897b ldrh r3, [r7, #10]
80048b0: 461a mov r2, r3
80048b2: 2100 movs r1, #0
80048b4: 4846 ldr r0, [pc, #280] @ (80049d0 <SetMotPerc+0x2fc>)
80048b6: f7ff fd47 bl 8004348 <StartMot>
break;
80048ba: e07e b.n 80049ba <SetMotPerc+0x2e6>
if(pwmval==0){
80048bc: 897b ldrh r3, [r7, #10]
80048be: 2b00 cmp r3, #0
80048c0: d10a bne.n 80048d8 <SetMotPerc+0x204>
StopMot(timMot3,BWMot3);
80048c2: 2104 movs r1, #4
80048c4: 4842 ldr r0, [pc, #264] @ (80049d0 <SetMotPerc+0x2fc>)
80048c6: f7ff fd32 bl 800432e <StopMot>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_RESET);
80048ca: 2200 movs r2, #0
80048cc: f44f 6180 mov.w r1, #1024 @ 0x400
80048d0: 483e ldr r0, [pc, #248] @ (80049cc <SetMotPerc+0x2f8>)
80048d2: f001 fe2e bl 8006532 <HAL_GPIO_WritePin>
break;
80048d6: e070 b.n 80049ba <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot3, BWMot3)){
80048d8: 2104 movs r1, #4
80048da: 483d ldr r0, [pc, #244] @ (80049d0 <SetMotPerc+0x2fc>)
80048dc: f7ff fd12 bl 8004304 <IsPwmRunning>
80048e0: 4603 mov r3, r0
80048e2: 2b00 cmp r3, #0
80048e4: d006 beq.n 80048f4 <SetMotPerc+0x220>
SetMotPwm(timMot3,BWMot3,pwmval);
80048e6: 897b ldrh r3, [r7, #10]
80048e8: 461a mov r2, r3
80048ea: 2104 movs r1, #4
80048ec: 4838 ldr r0, [pc, #224] @ (80049d0 <SetMotPerc+0x2fc>)
80048ee: f7ff fd56 bl 800439e <SetMotPwm>
break;
80048f2: e062 b.n 80049ba <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH3_GPIO_Port, INH3_Pin, GPIO_PIN_SET);
80048f4: 2201 movs r2, #1
80048f6: f44f 6180 mov.w r1, #1024 @ 0x400
80048fa: 4834 ldr r0, [pc, #208] @ (80049cc <SetMotPerc+0x2f8>)
80048fc: f001 fe19 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot3,BWMot3,pwmval);
8004900: 897b ldrh r3, [r7, #10]
8004902: 461a mov r2, r3
8004904: 2104 movs r1, #4
8004906: 4832 ldr r0, [pc, #200] @ (80049d0 <SetMotPerc+0x2fc>)
8004908: f7ff fd1e bl 8004348 <StartMot>
break;
800490c: e055 b.n 80049ba <SetMotPerc+0x2e6>
case 4:
if(dir==FW){
800490e: 79bb ldrb r3, [r7, #6]
8004910: 2b00 cmp r3, #0
8004912: d128 bne.n 8004966 <SetMotPerc+0x292>
if(pwmval==0){
8004914: 897b ldrh r3, [r7, #10]
8004916: 2b00 cmp r3, #0
8004918: d10a bne.n 8004930 <SetMotPerc+0x25c>
StopMot(timMot4,FWMot4);
800491a: 2108 movs r1, #8
800491c: 482c ldr r0, [pc, #176] @ (80049d0 <SetMotPerc+0x2fc>)
800491e: f7ff fd06 bl 800432e <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004922: 2200 movs r2, #0
8004924: f44f 6100 mov.w r1, #2048 @ 0x800
8004928: 4828 ldr r0, [pc, #160] @ (80049cc <SetMotPerc+0x2f8>)
800492a: f001 fe02 bl 8006532 <HAL_GPIO_WritePin>
}else{
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
StartMot(timMot4,BWMot4,pwmval);
}
}
break;
800492e: e044 b.n 80049ba <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, FWMot4)){
8004930: 2108 movs r1, #8
8004932: 4827 ldr r0, [pc, #156] @ (80049d0 <SetMotPerc+0x2fc>)
8004934: f7ff fce6 bl 8004304 <IsPwmRunning>
8004938: 4603 mov r3, r0
800493a: 2b00 cmp r3, #0
800493c: d006 beq.n 800494c <SetMotPerc+0x278>
SetMotPwm(timMot4,FWMot4,pwmval);
800493e: 897b ldrh r3, [r7, #10]
8004940: 461a mov r2, r3
8004942: 2108 movs r1, #8
8004944: 4822 ldr r0, [pc, #136] @ (80049d0 <SetMotPerc+0x2fc>)
8004946: f7ff fd2a bl 800439e <SetMotPwm>
break;
800494a: e036 b.n 80049ba <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
800494c: 2201 movs r2, #1
800494e: f44f 6100 mov.w r1, #2048 @ 0x800
8004952: 481e ldr r0, [pc, #120] @ (80049cc <SetMotPerc+0x2f8>)
8004954: f001 fded bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot4,FWMot4,pwmval);
8004958: 897b ldrh r3, [r7, #10]
800495a: 461a mov r2, r3
800495c: 2108 movs r1, #8
800495e: 481c ldr r0, [pc, #112] @ (80049d0 <SetMotPerc+0x2fc>)
8004960: f7ff fcf2 bl 8004348 <StartMot>
break;
8004964: e029 b.n 80049ba <SetMotPerc+0x2e6>
if(pwmval==0){
8004966: 897b ldrh r3, [r7, #10]
8004968: 2b00 cmp r3, #0
800496a: d10a bne.n 8004982 <SetMotPerc+0x2ae>
StopMot(timMot4,BWMot4);
800496c: 210c movs r1, #12
800496e: 4818 ldr r0, [pc, #96] @ (80049d0 <SetMotPerc+0x2fc>)
8004970: f7ff fcdd bl 800432e <StopMot>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_RESET);
8004974: 2200 movs r2, #0
8004976: f44f 6100 mov.w r1, #2048 @ 0x800
800497a: 4814 ldr r0, [pc, #80] @ (80049cc <SetMotPerc+0x2f8>)
800497c: f001 fdd9 bl 8006532 <HAL_GPIO_WritePin>
break;
8004980: e01b b.n 80049ba <SetMotPerc+0x2e6>
}else if(IsPwmRunning(timMot4, BWMot4)){
8004982: 210c movs r1, #12
8004984: 4812 ldr r0, [pc, #72] @ (80049d0 <SetMotPerc+0x2fc>)
8004986: f7ff fcbd bl 8004304 <IsPwmRunning>
800498a: 4603 mov r3, r0
800498c: 2b00 cmp r3, #0
800498e: d006 beq.n 800499e <SetMotPerc+0x2ca>
SetMotPwm(timMot4,BWMot4,pwmval);
8004990: 897b ldrh r3, [r7, #10]
8004992: 461a mov r2, r3
8004994: 210c movs r1, #12
8004996: 480e ldr r0, [pc, #56] @ (80049d0 <SetMotPerc+0x2fc>)
8004998: f7ff fd01 bl 800439e <SetMotPwm>
break;
800499c: e00d b.n 80049ba <SetMotPerc+0x2e6>
HAL_GPIO_WritePin(INH4_GPIO_Port, INH4_Pin, GPIO_PIN_SET);
800499e: 2201 movs r2, #1
80049a0: f44f 6100 mov.w r1, #2048 @ 0x800
80049a4: 4809 ldr r0, [pc, #36] @ (80049cc <SetMotPerc+0x2f8>)
80049a6: f001 fdc4 bl 8006532 <HAL_GPIO_WritePin>
StartMot(timMot4,BWMot4,pwmval);
80049aa: 897b ldrh r3, [r7, #10]
80049ac: 461a mov r2, r3
80049ae: 210c movs r1, #12
80049b0: 4807 ldr r0, [pc, #28] @ (80049d0 <SetMotPerc+0x2fc>)
80049b2: f7ff fcc9 bl 8004348 <StartMot>
break;
80049b6: e000 b.n 80049ba <SetMotPerc+0x2e6>
default:
break;
80049b8: bf00 nop
}
}
80049ba: bf00 nop
80049bc: 3710 adds r7, #16
80049be: 46bd mov sp, r7
80049c0: bd80 pop {r7, pc}
80049c2: bf00 nop
80049c4: 51eb851f .word 0x51eb851f
80049c8: 20000318 .word 0x20000318
80049cc: 40010c00 .word 0x40010c00
80049d0: 20000360 .word 0x20000360
080049d4 <ramp>:
uint8_t ramp(uint8_t mot,uint8_t dir,uint8_t percStart,uint8_t percEnd,uint8_t tr,uint8_t mode){
80049d4: b590 push {r4, r7, lr}
80049d6: b085 sub sp, #20
80049d8: af00 add r7, sp, #0
80049da: 4604 mov r4, r0
80049dc: 4608 mov r0, r1
80049de: 4611 mov r1, r2
80049e0: 461a mov r2, r3
80049e2: 4623 mov r3, r4
80049e4: 71fb strb r3, [r7, #7]
80049e6: 4603 mov r3, r0
80049e8: 71bb strb r3, [r7, #6]
80049ea: 460b mov r3, r1
80049ec: 717b strb r3, [r7, #5]
80049ee: 4613 mov r3, r2
80049f0: 713b strb r3, [r7, #4]
static uint8_t memrtramp[4];
// char s[10];
uint16_t delta;
switch(mode){
80049f2: f897 3024 ldrb.w r3, [r7, #36] @ 0x24
80049f6: 2b00 cmp r3, #0
80049f8: d002 beq.n 8004a00 <ramp+0x2c>
80049fa: 2b0a cmp r3, #10
80049fc: d016 beq.n 8004a2c <ramp+0x58>
80049fe: e09d b.n 8004b3c <ramp+0x168>
case RAMPINIT:
memrtramp[mot-1]=rtramp[mot-1]=tr;
8004a00: 79fb ldrb r3, [r7, #7]
8004a02: 3b01 subs r3, #1
8004a04: f897 2020 ldrb.w r2, [r7, #32]
8004a08: b291 uxth r1, r2
8004a0a: 4a4f ldr r2, [pc, #316] @ (8004b48 <ramp+0x174>)
8004a0c: 4608 mov r0, r1
8004a0e: f822 0013 strh.w r0, [r2, r3, lsl #1]
8004a12: 79fb ldrb r3, [r7, #7]
8004a14: 3b01 subs r3, #1
8004a16: b2c9 uxtb r1, r1
8004a18: 4a4c ldr r2, [pc, #304] @ (8004b4c <ramp+0x178>)
8004a1a: 54d1 strb r1, [r2, r3]
SetMotPerc(mot,dir,percStart);
8004a1c: 797a ldrb r2, [r7, #5]
8004a1e: 79b9 ldrb r1, [r7, #6]
8004a20: 79fb ldrb r3, [r7, #7]
8004a22: 4618 mov r0, r3
8004a24: f7ff fe56 bl 80046d4 <SetMotPerc>
return DONE;
8004a28: 2300 movs r3, #0
8004a2a: e088 b.n 8004b3e <ramp+0x16a>
case RAMPRUN:
if(memrtramp[mot-1]!=rtramp[mot-1]){
8004a2c: 79fb ldrb r3, [r7, #7]
8004a2e: 3b01 subs r3, #1
8004a30: 4a46 ldr r2, [pc, #280] @ (8004b4c <ramp+0x178>)
8004a32: 5cd3 ldrb r3, [r2, r3]
8004a34: 4619 mov r1, r3
8004a36: 79fb ldrb r3, [r7, #7]
8004a38: 3b01 subs r3, #1
8004a3a: 4a43 ldr r2, [pc, #268] @ (8004b48 <ramp+0x174>)
8004a3c: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004a40: b29b uxth r3, r3
8004a42: 4299 cmp r1, r3
8004a44: d078 beq.n 8004b38 <ramp+0x164>
memrtramp[mot-1]=rtramp[mot-1];
8004a46: 79fb ldrb r3, [r7, #7]
8004a48: 3b01 subs r3, #1
8004a4a: 4a3f ldr r2, [pc, #252] @ (8004b48 <ramp+0x174>)
8004a4c: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004a50: b29a uxth r2, r3
8004a52: 79fb ldrb r3, [r7, #7]
8004a54: 3b01 subs r3, #1
8004a56: b2d1 uxtb r1, r2
8004a58: 4a3c ldr r2, [pc, #240] @ (8004b4c <ramp+0x178>)
8004a5a: 54d1 strb r1, [r2, r3]
if(rtramp[mot-1]){
8004a5c: 79fb ldrb r3, [r7, #7]
8004a5e: 3b01 subs r3, #1
8004a60: 4a39 ldr r2, [pc, #228] @ (8004b48 <ramp+0x174>)
8004a62: f832 3013 ldrh.w r3, [r2, r3, lsl #1]
8004a66: b29b uxth r3, r3
8004a68: 2b00 cmp r3, #0
8004a6a: d05d beq.n 8004b28 <ramp+0x154>
if(percStart>percEnd){
8004a6c: 797a ldrb r2, [r7, #5]
8004a6e: 793b ldrb r3, [r7, #4]
8004a70: 429a cmp r2, r3
8004a72: d926 bls.n 8004ac2 <ramp+0xee>
delta=percStart-percEnd;
8004a74: 797b ldrb r3, [r7, #5]
8004a76: b29a uxth r2, r3
8004a78: 793b ldrb r3, [r7, #4]
8004a7a: b29b uxth r3, r3
8004a7c: 1ad3 subs r3, r2, r3
8004a7e: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004a80: f897 3020 ldrb.w r3, [r7, #32]
8004a84: b29a uxth r2, r3
8004a86: 79fb ldrb r3, [r7, #7]
8004a88: 3b01 subs r3, #1
8004a8a: 492f ldr r1, [pc, #188] @ (8004b48 <ramp+0x174>)
8004a8c: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8004a90: b29b uxth r3, r3
8004a92: 1ad3 subs r3, r2, r3
8004a94: b29b uxth r3, r3
8004a96: 89fa ldrh r2, [r7, #14]
8004a98: fb02 f303 mul.w r3, r2, r3
8004a9c: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004a9e: 89fa ldrh r2, [r7, #14]
8004aa0: f897 3020 ldrb.w r3, [r7, #32]
8004aa4: fb92 f3f3 sdiv r3, r2, r3
8004aa8: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart-delta);
8004aaa: 89fb ldrh r3, [r7, #14]
8004aac: b2db uxtb r3, r3
8004aae: 797a ldrb r2, [r7, #5]
8004ab0: 1ad3 subs r3, r2, r3
8004ab2: b2da uxtb r2, r3
8004ab4: 79b9 ldrb r1, [r7, #6]
8004ab6: 79fb ldrb r3, [r7, #7]
8004ab8: 4618 mov r0, r3
8004aba: f7ff fe0b bl 80046d4 <SetMotPerc>
return RUNNING;
8004abe: 2301 movs r3, #1
8004ac0: e03d b.n 8004b3e <ramp+0x16a>
}else if(percStart<percEnd){
8004ac2: 797a ldrb r2, [r7, #5]
8004ac4: 793b ldrb r3, [r7, #4]
8004ac6: 429a cmp r2, r3
8004ac8: d226 bcs.n 8004b18 <ramp+0x144>
delta=percEnd-percStart;
8004aca: 793b ldrb r3, [r7, #4]
8004acc: b29a uxth r2, r3
8004ace: 797b ldrb r3, [r7, #5]
8004ad0: b29b uxth r3, r3
8004ad2: 1ad3 subs r3, r2, r3
8004ad4: 81fb strh r3, [r7, #14]
delta=delta*(uint16_t)(tr-rtramp[mot-1]);
8004ad6: f897 3020 ldrb.w r3, [r7, #32]
8004ada: b29a uxth r2, r3
8004adc: 79fb ldrb r3, [r7, #7]
8004ade: 3b01 subs r3, #1
8004ae0: 4919 ldr r1, [pc, #100] @ (8004b48 <ramp+0x174>)
8004ae2: f831 3013 ldrh.w r3, [r1, r3, lsl #1]
8004ae6: b29b uxth r3, r3
8004ae8: 1ad3 subs r3, r2, r3
8004aea: b29b uxth r3, r3
8004aec: 89fa ldrh r2, [r7, #14]
8004aee: fb02 f303 mul.w r3, r2, r3
8004af2: 81fb strh r3, [r7, #14]
delta=delta/tr;
8004af4: 89fa ldrh r2, [r7, #14]
8004af6: f897 3020 ldrb.w r3, [r7, #32]
8004afa: fb92 f3f3 sdiv r3, r2, r3
8004afe: 81fb strh r3, [r7, #14]
SetMotPerc(mot,dir,percStart+delta);
8004b00: 89fb ldrh r3, [r7, #14]
8004b02: b2da uxtb r2, r3
8004b04: 797b ldrb r3, [r7, #5]
8004b06: 4413 add r3, r2
8004b08: b2da uxtb r2, r3
8004b0a: 79b9 ldrb r1, [r7, #6]
8004b0c: 79fb ldrb r3, [r7, #7]
8004b0e: 4618 mov r0, r3
8004b10: f7ff fde0 bl 80046d4 <SetMotPerc>
// sprintf((char*)s,"\n%d",percStart+delta);
// HAL_UART_Transmit(&huart1,(uint8_t*) s, strlen(s), HAL_MAX_DELAY);
return RUNNING;
8004b14: 2301 movs r3, #1
8004b16: e012 b.n 8004b3e <ramp+0x16a>
}else{
SetMotPerc(mot,dir,percEnd);
8004b18: 793a ldrb r2, [r7, #4]
8004b1a: 79b9 ldrb r1, [r7, #6]
8004b1c: 79fb ldrb r3, [r7, #7]
8004b1e: 4618 mov r0, r3
8004b20: f7ff fdd8 bl 80046d4 <SetMotPerc>
return DONE;
8004b24: 2300 movs r3, #0
8004b26: e00a b.n 8004b3e <ramp+0x16a>
}
}else{
SetMotPerc(mot,dir,percEnd);
8004b28: 793a ldrb r2, [r7, #4]
8004b2a: 79b9 ldrb r1, [r7, #6]
8004b2c: 79fb ldrb r3, [r7, #7]
8004b2e: 4618 mov r0, r3
8004b30: f7ff fdd0 bl 80046d4 <SetMotPerc>
return DONE;
8004b34: 2300 movs r3, #0
8004b36: e002 b.n 8004b3e <ramp+0x16a>
}
}else return RUNNING;
8004b38: 2301 movs r3, #1
8004b3a: e000 b.n 8004b3e <ramp+0x16a>
break;
}
return DONE;
8004b3c: 2300 movs r3, #0
}
8004b3e: 4618 mov r0, r3
8004b40: 3714 adds r7, #20
8004b42: 46bd mov sp, r7
8004b44: bd90 pop {r4, r7, pc}
8004b46: bf00 nop
8004b48: 200003f4 .word 0x200003f4
8004b4c: 2000046c .word 0x2000046c
08004b50 <HAL_MspInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef *htim);
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
8004b50: b480 push {r7}
8004b52: b085 sub sp, #20
8004b54: af00 add r7, sp, #0
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
8004b56: 4b15 ldr r3, [pc, #84] @ (8004bac <HAL_MspInit+0x5c>)
8004b58: 699b ldr r3, [r3, #24]
8004b5a: 4a14 ldr r2, [pc, #80] @ (8004bac <HAL_MspInit+0x5c>)
8004b5c: f043 0301 orr.w r3, r3, #1
8004b60: 6193 str r3, [r2, #24]
8004b62: 4b12 ldr r3, [pc, #72] @ (8004bac <HAL_MspInit+0x5c>)
8004b64: 699b ldr r3, [r3, #24]
8004b66: f003 0301 and.w r3, r3, #1
8004b6a: 60bb str r3, [r7, #8]
8004b6c: 68bb ldr r3, [r7, #8]
__HAL_RCC_PWR_CLK_ENABLE();
8004b6e: 4b0f ldr r3, [pc, #60] @ (8004bac <HAL_MspInit+0x5c>)
8004b70: 69db ldr r3, [r3, #28]
8004b72: 4a0e ldr r2, [pc, #56] @ (8004bac <HAL_MspInit+0x5c>)
8004b74: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
8004b78: 61d3 str r3, [r2, #28]
8004b7a: 4b0c ldr r3, [pc, #48] @ (8004bac <HAL_MspInit+0x5c>)
8004b7c: 69db ldr r3, [r3, #28]
8004b7e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8004b82: 607b str r3, [r7, #4]
8004b84: 687b ldr r3, [r7, #4]
/* System interrupt init*/
/** NOJTAG: JTAG-DP Disabled and SW-DP Enabled
*/
__HAL_AFIO_REMAP_SWJ_NOJTAG();
8004b86: 4b0a ldr r3, [pc, #40] @ (8004bb0 <HAL_MspInit+0x60>)
8004b88: 685b ldr r3, [r3, #4]
8004b8a: 60fb str r3, [r7, #12]
8004b8c: 68fb ldr r3, [r7, #12]
8004b8e: f023 63e0 bic.w r3, r3, #117440512 @ 0x7000000
8004b92: 60fb str r3, [r7, #12]
8004b94: 68fb ldr r3, [r7, #12]
8004b96: f043 7300 orr.w r3, r3, #33554432 @ 0x2000000
8004b9a: 60fb str r3, [r7, #12]
8004b9c: 4a04 ldr r2, [pc, #16] @ (8004bb0 <HAL_MspInit+0x60>)
8004b9e: 68fb ldr r3, [r7, #12]
8004ba0: 6053 str r3, [r2, #4]
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
8004ba2: bf00 nop
8004ba4: 3714 adds r7, #20
8004ba6: 46bd mov sp, r7
8004ba8: bc80 pop {r7}
8004baa: 4770 bx lr
8004bac: 40021000 .word 0x40021000
8004bb0: 40010000 .word 0x40010000
08004bb4 <HAL_ADC_MspInit>:
* This function configures the hardware resources used in this example
* @param hadc: ADC handle pointer
* @retval None
*/
void HAL_ADC_MspInit(ADC_HandleTypeDef* hadc)
{
8004bb4: b580 push {r7, lr}
8004bb6: b08a sub sp, #40 @ 0x28
8004bb8: af00 add r7, sp, #0
8004bba: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004bbc: f107 0318 add.w r3, r7, #24
8004bc0: 2200 movs r2, #0
8004bc2: 601a str r2, [r3, #0]
8004bc4: 605a str r2, [r3, #4]
8004bc6: 609a str r2, [r3, #8]
8004bc8: 60da str r2, [r3, #12]
if(hadc->Instance==ADC1)
8004bca: 687b ldr r3, [r7, #4]
8004bcc: 681b ldr r3, [r3, #0]
8004bce: 4a33 ldr r2, [pc, #204] @ (8004c9c <HAL_ADC_MspInit+0xe8>)
8004bd0: 4293 cmp r3, r2
8004bd2: d15f bne.n 8004c94 <HAL_ADC_MspInit+0xe0>
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
8004bd4: 4b32 ldr r3, [pc, #200] @ (8004ca0 <HAL_ADC_MspInit+0xec>)
8004bd6: 699b ldr r3, [r3, #24]
8004bd8: 4a31 ldr r2, [pc, #196] @ (8004ca0 <HAL_ADC_MspInit+0xec>)
8004bda: f443 7300 orr.w r3, r3, #512 @ 0x200
8004bde: 6193 str r3, [r2, #24]
8004be0: 4b2f ldr r3, [pc, #188] @ (8004ca0 <HAL_ADC_MspInit+0xec>)
8004be2: 699b ldr r3, [r3, #24]
8004be4: f403 7300 and.w r3, r3, #512 @ 0x200
8004be8: 617b str r3, [r7, #20]
8004bea: 697b ldr r3, [r7, #20]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004bec: 4b2c ldr r3, [pc, #176] @ (8004ca0 <HAL_ADC_MspInit+0xec>)
8004bee: 699b ldr r3, [r3, #24]
8004bf0: 4a2b ldr r2, [pc, #172] @ (8004ca0 <HAL_ADC_MspInit+0xec>)
8004bf2: f043 0304 orr.w r3, r3, #4
8004bf6: 6193 str r3, [r2, #24]
8004bf8: 4b29 ldr r3, [pc, #164] @ (8004ca0 <HAL_ADC_MspInit+0xec>)
8004bfa: 699b ldr r3, [r3, #24]
8004bfc: f003 0304 and.w r3, r3, #4
8004c00: 613b str r3, [r7, #16]
8004c02: 693b ldr r3, [r7, #16]
__HAL_RCC_GPIOB_CLK_ENABLE();
8004c04: 4b26 ldr r3, [pc, #152] @ (8004ca0 <HAL_ADC_MspInit+0xec>)
8004c06: 699b ldr r3, [r3, #24]
8004c08: 4a25 ldr r2, [pc, #148] @ (8004ca0 <HAL_ADC_MspInit+0xec>)
8004c0a: f043 0308 orr.w r3, r3, #8
8004c0e: 6193 str r3, [r2, #24]
8004c10: 4b23 ldr r3, [pc, #140] @ (8004ca0 <HAL_ADC_MspInit+0xec>)
8004c12: 699b ldr r3, [r3, #24]
8004c14: f003 0308 and.w r3, r3, #8
8004c18: 60fb str r3, [r7, #12]
8004c1a: 68fb ldr r3, [r7, #12]
PA5 ------> ADC1_IN5
PA6 ------> ADC1_IN6
PA7 ------> ADC1_IN7
PB0 ------> ADC1_IN8
*/
GPIO_InitStruct.Pin = AIN1_Pin|AIN2_Pin|AIN3_Pin|AIN4_Pin;
8004c1c: 23f0 movs r3, #240 @ 0xf0
8004c1e: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004c20: 2303 movs r3, #3
8004c22: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004c24: f107 0318 add.w r3, r7, #24
8004c28: 4619 mov r1, r3
8004c2a: 481e ldr r0, [pc, #120] @ (8004ca4 <HAL_ADC_MspInit+0xf0>)
8004c2c: f001 fae6 bl 80061fc <HAL_GPIO_Init>
GPIO_InitStruct.Pin = ANEM_Pin;
8004c30: 2301 movs r3, #1
8004c32: 61bb str r3, [r7, #24]
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
8004c34: 2303 movs r3, #3
8004c36: 61fb str r3, [r7, #28]
HAL_GPIO_Init(ANEM_GPIO_Port, &GPIO_InitStruct);
8004c38: f107 0318 add.w r3, r7, #24
8004c3c: 4619 mov r1, r3
8004c3e: 481a ldr r0, [pc, #104] @ (8004ca8 <HAL_ADC_MspInit+0xf4>)
8004c40: f001 fadc bl 80061fc <HAL_GPIO_Init>
/* ADC1 DMA Init */
/* ADC1 Init */
hdma_adc1.Instance = DMA1_Channel1;
8004c44: 4b19 ldr r3, [pc, #100] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c46: 4a1a ldr r2, [pc, #104] @ (8004cb0 <HAL_ADC_MspInit+0xfc>)
8004c48: 601a str r2, [r3, #0]
hdma_adc1.Init.Direction = DMA_PERIPH_TO_MEMORY;
8004c4a: 4b18 ldr r3, [pc, #96] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c4c: 2200 movs r2, #0
8004c4e: 605a str r2, [r3, #4]
hdma_adc1.Init.PeriphInc = DMA_PINC_DISABLE;
8004c50: 4b16 ldr r3, [pc, #88] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c52: 2200 movs r2, #0
8004c54: 609a str r2, [r3, #8]
hdma_adc1.Init.MemInc = DMA_MINC_ENABLE;
8004c56: 4b15 ldr r3, [pc, #84] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c58: 2280 movs r2, #128 @ 0x80
8004c5a: 60da str r2, [r3, #12]
hdma_adc1.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
8004c5c: 4b13 ldr r3, [pc, #76] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c5e: f44f 7280 mov.w r2, #256 @ 0x100
8004c62: 611a str r2, [r3, #16]
hdma_adc1.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
8004c64: 4b11 ldr r3, [pc, #68] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c66: f44f 6280 mov.w r2, #1024 @ 0x400
8004c6a: 615a str r2, [r3, #20]
hdma_adc1.Init.Mode = DMA_CIRCULAR;
8004c6c: 4b0f ldr r3, [pc, #60] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c6e: 2220 movs r2, #32
8004c70: 619a str r2, [r3, #24]
hdma_adc1.Init.Priority = DMA_PRIORITY_LOW;
8004c72: 4b0e ldr r3, [pc, #56] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c74: 2200 movs r2, #0
8004c76: 61da str r2, [r3, #28]
if (HAL_DMA_Init(&hdma_adc1) != HAL_OK)
8004c78: 480c ldr r0, [pc, #48] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c7a: f000 fed1 bl 8005a20 <HAL_DMA_Init>
8004c7e: 4603 mov r3, r0
8004c80: 2b00 cmp r3, #0
8004c82: d001 beq.n 8004c88 <HAL_ADC_MspInit+0xd4>
{
Error_Handler();
8004c84: f7fe fca2 bl 80035cc <Error_Handler>
}
__HAL_LINKDMA(hadc,DMA_Handle,hdma_adc1);
8004c88: 687b ldr r3, [r7, #4]
8004c8a: 4a08 ldr r2, [pc, #32] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c8c: 621a str r2, [r3, #32]
8004c8e: 4a07 ldr r2, [pc, #28] @ (8004cac <HAL_ADC_MspInit+0xf8>)
8004c90: 687b ldr r3, [r7, #4]
8004c92: 6253 str r3, [r2, #36] @ 0x24
/* USER CODE END ADC1_MspInit 1 */
}
}
8004c94: bf00 nop
8004c96: 3728 adds r7, #40 @ 0x28
8004c98: 46bd mov sp, r7
8004c9a: bd80 pop {r7, pc}
8004c9c: 40012400 .word 0x40012400
8004ca0: 40021000 .word 0x40021000
8004ca4: 40010800 .word 0x40010800
8004ca8: 40010c00 .word 0x40010c00
8004cac: 200002d4 .word 0x200002d4
8004cb0: 40020008 .word 0x40020008
08004cb4 <HAL_TIM_Base_MspInit>:
* This function configures the hardware resources used in this example
* @param htim_base: TIM_Base handle pointer
* @retval None
*/
void HAL_TIM_Base_MspInit(TIM_HandleTypeDef* htim_base)
{
8004cb4: b480 push {r7}
8004cb6: b085 sub sp, #20
8004cb8: af00 add r7, sp, #0
8004cba: 6078 str r0, [r7, #4]
if(htim_base->Instance==TIM2)
8004cbc: 687b ldr r3, [r7, #4]
8004cbe: 681b ldr r3, [r3, #0]
8004cc0: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004cc4: d10c bne.n 8004ce0 <HAL_TIM_Base_MspInit+0x2c>
{
/* USER CODE BEGIN TIM2_MspInit 0 */
/* USER CODE END TIM2_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_TIM2_CLK_ENABLE();
8004cc6: 4b11 ldr r3, [pc, #68] @ (8004d0c <HAL_TIM_Base_MspInit+0x58>)
8004cc8: 69db ldr r3, [r3, #28]
8004cca: 4a10 ldr r2, [pc, #64] @ (8004d0c <HAL_TIM_Base_MspInit+0x58>)
8004ccc: f043 0301 orr.w r3, r3, #1
8004cd0: 61d3 str r3, [r2, #28]
8004cd2: 4b0e ldr r3, [pc, #56] @ (8004d0c <HAL_TIM_Base_MspInit+0x58>)
8004cd4: 69db ldr r3, [r3, #28]
8004cd6: f003 0301 and.w r3, r3, #1
8004cda: 60fb str r3, [r7, #12]
8004cdc: 68fb ldr r3, [r7, #12]
/* USER CODE BEGIN TIM4_MspInit 1 */
/* USER CODE END TIM4_MspInit 1 */
}
}
8004cde: e010 b.n 8004d02 <HAL_TIM_Base_MspInit+0x4e>
else if(htim_base->Instance==TIM4)
8004ce0: 687b ldr r3, [r7, #4]
8004ce2: 681b ldr r3, [r3, #0]
8004ce4: 4a0a ldr r2, [pc, #40] @ (8004d10 <HAL_TIM_Base_MspInit+0x5c>)
8004ce6: 4293 cmp r3, r2
8004ce8: d10b bne.n 8004d02 <HAL_TIM_Base_MspInit+0x4e>
__HAL_RCC_TIM4_CLK_ENABLE();
8004cea: 4b08 ldr r3, [pc, #32] @ (8004d0c <HAL_TIM_Base_MspInit+0x58>)
8004cec: 69db ldr r3, [r3, #28]
8004cee: 4a07 ldr r2, [pc, #28] @ (8004d0c <HAL_TIM_Base_MspInit+0x58>)
8004cf0: f043 0304 orr.w r3, r3, #4
8004cf4: 61d3 str r3, [r2, #28]
8004cf6: 4b05 ldr r3, [pc, #20] @ (8004d0c <HAL_TIM_Base_MspInit+0x58>)
8004cf8: 69db ldr r3, [r3, #28]
8004cfa: f003 0304 and.w r3, r3, #4
8004cfe: 60bb str r3, [r7, #8]
8004d00: 68bb ldr r3, [r7, #8]
}
8004d02: bf00 nop
8004d04: 3714 adds r7, #20
8004d06: 46bd mov sp, r7
8004d08: bc80 pop {r7}
8004d0a: 4770 bx lr
8004d0c: 40021000 .word 0x40021000
8004d10: 40000800 .word 0x40000800
08004d14 <HAL_TIM_MspPostInit>:
void HAL_TIM_MspPostInit(TIM_HandleTypeDef* htim)
{
8004d14: b580 push {r7, lr}
8004d16: b088 sub sp, #32
8004d18: af00 add r7, sp, #0
8004d1a: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004d1c: f107 0310 add.w r3, r7, #16
8004d20: 2200 movs r2, #0
8004d22: 601a str r2, [r3, #0]
8004d24: 605a str r2, [r3, #4]
8004d26: 609a str r2, [r3, #8]
8004d28: 60da str r2, [r3, #12]
if(htim->Instance==TIM2)
8004d2a: 687b ldr r3, [r7, #4]
8004d2c: 681b ldr r3, [r3, #0]
8004d2e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8004d32: d118 bne.n 8004d66 <HAL_TIM_MspPostInit+0x52>
{
/* USER CODE BEGIN TIM2_MspPostInit 0 */
/* USER CODE END TIM2_MspPostInit 0 */
__HAL_RCC_GPIOA_CLK_ENABLE();
8004d34: 4b1d ldr r3, [pc, #116] @ (8004dac <HAL_TIM_MspPostInit+0x98>)
8004d36: 699b ldr r3, [r3, #24]
8004d38: 4a1c ldr r2, [pc, #112] @ (8004dac <HAL_TIM_MspPostInit+0x98>)
8004d3a: f043 0304 orr.w r3, r3, #4
8004d3e: 6193 str r3, [r2, #24]
8004d40: 4b1a ldr r3, [pc, #104] @ (8004dac <HAL_TIM_MspPostInit+0x98>)
8004d42: 699b ldr r3, [r3, #24]
8004d44: f003 0304 and.w r3, r3, #4
8004d48: 60fb str r3, [r7, #12]
8004d4a: 68fb ldr r3, [r7, #12]
PA0-WKUP ------> TIM2_CH1
PA1 ------> TIM2_CH2
PA2 ------> TIM2_CH3
PA3 ------> TIM2_CH4
*/
GPIO_InitStruct.Pin = IN1_Pin|IN2_Pin|IN3_Pin|IN4_Pin;
8004d4c: 230f movs r3, #15
8004d4e: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004d50: 2302 movs r3, #2
8004d52: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8004d54: 2302 movs r3, #2
8004d56: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004d58: f107 0310 add.w r3, r7, #16
8004d5c: 4619 mov r1, r3
8004d5e: 4814 ldr r0, [pc, #80] @ (8004db0 <HAL_TIM_MspPostInit+0x9c>)
8004d60: f001 fa4c bl 80061fc <HAL_GPIO_Init>
/* USER CODE BEGIN TIM4_MspPostInit 1 */
/* USER CODE END TIM4_MspPostInit 1 */
}
}
8004d64: e01d b.n 8004da2 <HAL_TIM_MspPostInit+0x8e>
else if(htim->Instance==TIM4)
8004d66: 687b ldr r3, [r7, #4]
8004d68: 681b ldr r3, [r3, #0]
8004d6a: 4a12 ldr r2, [pc, #72] @ (8004db4 <HAL_TIM_MspPostInit+0xa0>)
8004d6c: 4293 cmp r3, r2
8004d6e: d118 bne.n 8004da2 <HAL_TIM_MspPostInit+0x8e>
__HAL_RCC_GPIOB_CLK_ENABLE();
8004d70: 4b0e ldr r3, [pc, #56] @ (8004dac <HAL_TIM_MspPostInit+0x98>)
8004d72: 699b ldr r3, [r3, #24]
8004d74: 4a0d ldr r2, [pc, #52] @ (8004dac <HAL_TIM_MspPostInit+0x98>)
8004d76: f043 0308 orr.w r3, r3, #8
8004d7a: 6193 str r3, [r2, #24]
8004d7c: 4b0b ldr r3, [pc, #44] @ (8004dac <HAL_TIM_MspPostInit+0x98>)
8004d7e: 699b ldr r3, [r3, #24]
8004d80: f003 0308 and.w r3, r3, #8
8004d84: 60bb str r3, [r7, #8]
8004d86: 68bb ldr r3, [r7, #8]
GPIO_InitStruct.Pin = IN5_Pin|IN6_Pin|IN7_Pin|IN8_Pin;
8004d88: f44f 7370 mov.w r3, #960 @ 0x3c0
8004d8c: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004d8e: 2302 movs r3, #2
8004d90: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
8004d92: 2302 movs r3, #2
8004d94: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
8004d96: f107 0310 add.w r3, r7, #16
8004d9a: 4619 mov r1, r3
8004d9c: 4806 ldr r0, [pc, #24] @ (8004db8 <HAL_TIM_MspPostInit+0xa4>)
8004d9e: f001 fa2d bl 80061fc <HAL_GPIO_Init>
}
8004da2: bf00 nop
8004da4: 3720 adds r7, #32
8004da6: 46bd mov sp, r7
8004da8: bd80 pop {r7, pc}
8004daa: bf00 nop
8004dac: 40021000 .word 0x40021000
8004db0: 40010800 .word 0x40010800
8004db4: 40000800 .word 0x40000800
8004db8: 40010c00 .word 0x40010c00
08004dbc <HAL_UART_MspInit>:
* This function configures the hardware resources used in this example
* @param huart: UART handle pointer
* @retval None
*/
void HAL_UART_MspInit(UART_HandleTypeDef* huart)
{
8004dbc: b580 push {r7, lr}
8004dbe: b088 sub sp, #32
8004dc0: af00 add r7, sp, #0
8004dc2: 6078 str r0, [r7, #4]
GPIO_InitTypeDef GPIO_InitStruct = {0};
8004dc4: f107 0310 add.w r3, r7, #16
8004dc8: 2200 movs r2, #0
8004dca: 601a str r2, [r3, #0]
8004dcc: 605a str r2, [r3, #4]
8004dce: 609a str r2, [r3, #8]
8004dd0: 60da str r2, [r3, #12]
if(huart->Instance==USART1)
8004dd2: 687b ldr r3, [r7, #4]
8004dd4: 681b ldr r3, [r3, #0]
8004dd6: 4a1c ldr r2, [pc, #112] @ (8004e48 <HAL_UART_MspInit+0x8c>)
8004dd8: 4293 cmp r3, r2
8004dda: d131 bne.n 8004e40 <HAL_UART_MspInit+0x84>
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
8004ddc: 4b1b ldr r3, [pc, #108] @ (8004e4c <HAL_UART_MspInit+0x90>)
8004dde: 699b ldr r3, [r3, #24]
8004de0: 4a1a ldr r2, [pc, #104] @ (8004e4c <HAL_UART_MspInit+0x90>)
8004de2: f443 4380 orr.w r3, r3, #16384 @ 0x4000
8004de6: 6193 str r3, [r2, #24]
8004de8: 4b18 ldr r3, [pc, #96] @ (8004e4c <HAL_UART_MspInit+0x90>)
8004dea: 699b ldr r3, [r3, #24]
8004dec: f403 4380 and.w r3, r3, #16384 @ 0x4000
8004df0: 60fb str r3, [r7, #12]
8004df2: 68fb ldr r3, [r7, #12]
__HAL_RCC_GPIOA_CLK_ENABLE();
8004df4: 4b15 ldr r3, [pc, #84] @ (8004e4c <HAL_UART_MspInit+0x90>)
8004df6: 699b ldr r3, [r3, #24]
8004df8: 4a14 ldr r2, [pc, #80] @ (8004e4c <HAL_UART_MspInit+0x90>)
8004dfa: f043 0304 orr.w r3, r3, #4
8004dfe: 6193 str r3, [r2, #24]
8004e00: 4b12 ldr r3, [pc, #72] @ (8004e4c <HAL_UART_MspInit+0x90>)
8004e02: 699b ldr r3, [r3, #24]
8004e04: f003 0304 and.w r3, r3, #4
8004e08: 60bb str r3, [r7, #8]
8004e0a: 68bb ldr r3, [r7, #8]
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
8004e0c: f44f 7300 mov.w r3, #512 @ 0x200
8004e10: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
8004e12: 2302 movs r3, #2
8004e14: 617b str r3, [r7, #20]
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
8004e16: 2303 movs r3, #3
8004e18: 61fb str r3, [r7, #28]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004e1a: f107 0310 add.w r3, r7, #16
8004e1e: 4619 mov r1, r3
8004e20: 480b ldr r0, [pc, #44] @ (8004e50 <HAL_UART_MspInit+0x94>)
8004e22: f001 f9eb bl 80061fc <HAL_GPIO_Init>
GPIO_InitStruct.Pin = GPIO_PIN_10;
8004e26: f44f 6380 mov.w r3, #1024 @ 0x400
8004e2a: 613b str r3, [r7, #16]
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
8004e2c: 2300 movs r3, #0
8004e2e: 617b str r3, [r7, #20]
GPIO_InitStruct.Pull = GPIO_NOPULL;
8004e30: 2300 movs r3, #0
8004e32: 61bb str r3, [r7, #24]
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
8004e34: f107 0310 add.w r3, r7, #16
8004e38: 4619 mov r1, r3
8004e3a: 4805 ldr r0, [pc, #20] @ (8004e50 <HAL_UART_MspInit+0x94>)
8004e3c: f001 f9de bl 80061fc <HAL_GPIO_Init>
/* USER CODE END USART1_MspInit 1 */
}
}
8004e40: bf00 nop
8004e42: 3720 adds r7, #32
8004e44: 46bd mov sp, r7
8004e46: bd80 pop {r7, pc}
8004e48: 40013800 .word 0x40013800
8004e4c: 40021000 .word 0x40021000
8004e50: 40010800 .word 0x40010800
08004e54 <NMI_Handler>:
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
8004e54: b480 push {r7}
8004e56: af00 add r7, sp, #0
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
8004e58: bf00 nop
8004e5a: e7fd b.n 8004e58 <NMI_Handler+0x4>
08004e5c <HardFault_Handler>:
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
8004e5c: b480 push {r7}
8004e5e: af00 add r7, sp, #0
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
8004e60: bf00 nop
8004e62: e7fd b.n 8004e60 <HardFault_Handler+0x4>
08004e64 <MemManage_Handler>:
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
8004e64: b480 push {r7}
8004e66: af00 add r7, sp, #0
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
8004e68: bf00 nop
8004e6a: e7fd b.n 8004e68 <MemManage_Handler+0x4>
08004e6c <BusFault_Handler>:
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
8004e6c: b480 push {r7}
8004e6e: af00 add r7, sp, #0
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
8004e70: bf00 nop
8004e72: e7fd b.n 8004e70 <BusFault_Handler+0x4>
08004e74 <UsageFault_Handler>:
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
8004e74: b480 push {r7}
8004e76: af00 add r7, sp, #0
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
8004e78: bf00 nop
8004e7a: e7fd b.n 8004e78 <UsageFault_Handler+0x4>
08004e7c <SVC_Handler>:
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
8004e7c: b480 push {r7}
8004e7e: af00 add r7, sp, #0
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
8004e80: bf00 nop
8004e82: 46bd mov sp, r7
8004e84: bc80 pop {r7}
8004e86: 4770 bx lr
08004e88 <DebugMon_Handler>:
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
8004e88: b480 push {r7}
8004e8a: af00 add r7, sp, #0
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
8004e8c: bf00 nop
8004e8e: 46bd mov sp, r7
8004e90: bc80 pop {r7}
8004e92: 4770 bx lr
08004e94 <PendSV_Handler>:
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
8004e94: b480 push {r7}
8004e96: af00 add r7, sp, #0
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
8004e98: bf00 nop
8004e9a: 46bd mov sp, r7
8004e9c: bc80 pop {r7}
8004e9e: 4770 bx lr
08004ea0 <SysTick_Handler>:
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
8004ea0: b580 push {r7, lr}
8004ea2: af00 add r7, sp, #0
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
8004ea4: f000 f8c0 bl 8005028 <HAL_IncTick>
/* USER CODE BEGIN SysTick_IRQn 1 */
HAL_SYSTICK_IRQHandler();
8004ea8: f000 fdb3 bl 8005a12 <HAL_SYSTICK_IRQHandler>
/* USER CODE END SysTick_IRQn 1 */
}
8004eac: bf00 nop
8004eae: bd80 pop {r7, pc}
08004eb0 <DMA1_Channel1_IRQHandler>:
/**
* @brief This function handles DMA1 channel1 global interrupt.
*/
void DMA1_Channel1_IRQHandler(void)
{
8004eb0: b580 push {r7, lr}
8004eb2: af00 add r7, sp, #0
/* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
/* USER CODE END DMA1_Channel1_IRQn 0 */
HAL_DMA_IRQHandler(&hdma_adc1);
8004eb4: 4802 ldr r0, [pc, #8] @ (8004ec0 <DMA1_Channel1_IRQHandler+0x10>)
8004eb6: f000 fe6d bl 8005b94 <HAL_DMA_IRQHandler>
/* USER CODE BEGIN DMA1_Channel1_IRQn 1 */
/* USER CODE END DMA1_Channel1_IRQn 1 */
}
8004eba: bf00 nop
8004ebc: bd80 pop {r7, pc}
8004ebe: bf00 nop
8004ec0: 200002d4 .word 0x200002d4
08004ec4 <USB_LP_CAN1_RX0_IRQHandler>:
/**
* @brief This function handles USB low priority or CAN RX0 interrupts.
*/
void USB_LP_CAN1_RX0_IRQHandler(void)
{
8004ec4: b580 push {r7, lr}
8004ec6: af00 add r7, sp, #0
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 0 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 0 */
HAL_PCD_IRQHandler(&hpcd_USB_FS);
8004ec8: 4802 ldr r0, [pc, #8] @ (8004ed4 <USB_LP_CAN1_RX0_IRQHandler+0x10>)
8004eca: f001 fc66 bl 800679a <HAL_PCD_IRQHandler>
/* USER CODE BEGIN USB_LP_CAN1_RX0_IRQn 1 */
/* USER CODE END USB_LP_CAN1_RX0_IRQn 1 */
}
8004ece: bf00 nop
8004ed0: bd80 pop {r7, pc}
8004ed2: bf00 nop
8004ed4: 20001264 .word 0x20001264
08004ed8 <_sbrk>:
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
8004ed8: b580 push {r7, lr}
8004eda: b086 sub sp, #24
8004edc: af00 add r7, sp, #0
8004ede: 6078 str r0, [r7, #4]
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
8004ee0: 4a14 ldr r2, [pc, #80] @ (8004f34 <_sbrk+0x5c>)
8004ee2: 4b15 ldr r3, [pc, #84] @ (8004f38 <_sbrk+0x60>)
8004ee4: 1ad3 subs r3, r2, r3
8004ee6: 617b str r3, [r7, #20]
const uint8_t *max_heap = (uint8_t *)stack_limit;
8004ee8: 697b ldr r3, [r7, #20]
8004eea: 613b str r3, [r7, #16]
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
8004eec: 4b13 ldr r3, [pc, #76] @ (8004f3c <_sbrk+0x64>)
8004eee: 681b ldr r3, [r3, #0]
8004ef0: 2b00 cmp r3, #0
8004ef2: d102 bne.n 8004efa <_sbrk+0x22>
{
__sbrk_heap_end = &_end;
8004ef4: 4b11 ldr r3, [pc, #68] @ (8004f3c <_sbrk+0x64>)
8004ef6: 4a12 ldr r2, [pc, #72] @ (8004f40 <_sbrk+0x68>)
8004ef8: 601a str r2, [r3, #0]
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
8004efa: 4b10 ldr r3, [pc, #64] @ (8004f3c <_sbrk+0x64>)
8004efc: 681a ldr r2, [r3, #0]
8004efe: 687b ldr r3, [r7, #4]
8004f00: 4413 add r3, r2
8004f02: 693a ldr r2, [r7, #16]
8004f04: 429a cmp r2, r3
8004f06: d207 bcs.n 8004f18 <_sbrk+0x40>
{
errno = ENOMEM;
8004f08: f009 fa2c bl 800e364 <__errno>
8004f0c: 4603 mov r3, r0
8004f0e: 220c movs r2, #12
8004f10: 601a str r2, [r3, #0]
return (void *)-1;
8004f12: f04f 33ff mov.w r3, #4294967295
8004f16: e009 b.n 8004f2c <_sbrk+0x54>
}
prev_heap_end = __sbrk_heap_end;
8004f18: 4b08 ldr r3, [pc, #32] @ (8004f3c <_sbrk+0x64>)
8004f1a: 681b ldr r3, [r3, #0]
8004f1c: 60fb str r3, [r7, #12]
__sbrk_heap_end += incr;
8004f1e: 4b07 ldr r3, [pc, #28] @ (8004f3c <_sbrk+0x64>)
8004f20: 681a ldr r2, [r3, #0]
8004f22: 687b ldr r3, [r7, #4]
8004f24: 4413 add r3, r2
8004f26: 4a05 ldr r2, [pc, #20] @ (8004f3c <_sbrk+0x64>)
8004f28: 6013 str r3, [r2, #0]
return (void *)prev_heap_end;
8004f2a: 68fb ldr r3, [r7, #12]
}
8004f2c: 4618 mov r0, r3
8004f2e: 3718 adds r7, #24
8004f30: 46bd mov sp, r7
8004f32: bd80 pop {r7, pc}
8004f34: 20005000 .word 0x20005000
8004f38: 00000400 .word 0x00000400
8004f3c: 20000470 .word 0x20000470
8004f40: 200018a8 .word 0x200018a8
08004f44 <SystemInit>:
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
8004f44: b480 push {r7}
8004f46: af00 add r7, sp, #0
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
8004f48: bf00 nop
8004f4a: 46bd mov sp, r7
8004f4c: bc80 pop {r7}
8004f4e: 4770 bx lr
08004f50 <Reset_Handler>:
.weak Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
/* Call the clock system initialization function.*/
bl SystemInit
8004f50: f7ff fff8 bl 8004f44 <SystemInit>
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =_sdata
8004f54: 480b ldr r0, [pc, #44] @ (8004f84 <LoopFillZerobss+0xe>)
ldr r1, =_edata
8004f56: 490c ldr r1, [pc, #48] @ (8004f88 <LoopFillZerobss+0x12>)
ldr r2, =_sidata
8004f58: 4a0c ldr r2, [pc, #48] @ (8004f8c <LoopFillZerobss+0x16>)
movs r3, #0
8004f5a: 2300 movs r3, #0
b LoopCopyDataInit
8004f5c: e002 b.n 8004f64 <LoopCopyDataInit>
08004f5e <CopyDataInit>:
CopyDataInit:
ldr r4, [r2, r3]
8004f5e: 58d4 ldr r4, [r2, r3]
str r4, [r0, r3]
8004f60: 50c4 str r4, [r0, r3]
adds r3, r3, #4
8004f62: 3304 adds r3, #4
08004f64 <LoopCopyDataInit>:
LoopCopyDataInit:
adds r4, r0, r3
8004f64: 18c4 adds r4, r0, r3
cmp r4, r1
8004f66: 428c cmp r4, r1
bcc CopyDataInit
8004f68: d3f9 bcc.n 8004f5e <CopyDataInit>
/* Zero fill the bss segment. */
ldr r2, =_sbss
8004f6a: 4a09 ldr r2, [pc, #36] @ (8004f90 <LoopFillZerobss+0x1a>)
ldr r4, =_ebss
8004f6c: 4c09 ldr r4, [pc, #36] @ (8004f94 <LoopFillZerobss+0x1e>)
movs r3, #0
8004f6e: 2300 movs r3, #0
b LoopFillZerobss
8004f70: e001 b.n 8004f76 <LoopFillZerobss>
08004f72 <FillZerobss>:
FillZerobss:
str r3, [r2]
8004f72: 6013 str r3, [r2, #0]
adds r2, r2, #4
8004f74: 3204 adds r2, #4
08004f76 <LoopFillZerobss>:
LoopFillZerobss:
cmp r2, r4
8004f76: 42a2 cmp r2, r4
bcc FillZerobss
8004f78: d3fb bcc.n 8004f72 <FillZerobss>
/* Call static constructors */
bl __libc_init_array
8004f7a: f009 f9f9 bl 800e370 <__libc_init_array>
/* Call the application's entry point.*/
bl main
8004f7e: f7fd ffb7 bl 8002ef0 <main>
bx lr
8004f82: 4770 bx lr
ldr r0, =_sdata
8004f84: 20000000 .word 0x20000000
ldr r1, =_edata
8004f88: 200001dc .word 0x200001dc
ldr r2, =_sidata
8004f8c: 0800f484 .word 0x0800f484
ldr r2, =_sbss
8004f90: 200001e0 .word 0x200001e0
ldr r4, =_ebss
8004f94: 200018a4 .word 0x200018a4
08004f98 <ADC1_2_IRQHandler>:
* @retval : None
*/
.section .text.Default_Handler,"ax",%progbits
Default_Handler:
Infinite_Loop:
b Infinite_Loop
8004f98: e7fe b.n 8004f98 <ADC1_2_IRQHandler>
...
08004f9c <HAL_Init>:
* need to ensure that the SysTick time base is always set to 1 millisecond
* to have correct HAL operation.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_Init(void)
{
8004f9c: b580 push {r7, lr}
8004f9e: af00 add r7, sp, #0
defined(STM32F102x6) || defined(STM32F102xB) || \
defined(STM32F103x6) || defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG) || \
defined(STM32F105xC) || defined(STM32F107xC)
/* Prefetch buffer is not available on value line devices */
__HAL_FLASH_PREFETCH_BUFFER_ENABLE();
8004fa0: 4b08 ldr r3, [pc, #32] @ (8004fc4 <HAL_Init+0x28>)
8004fa2: 681b ldr r3, [r3, #0]
8004fa4: 4a07 ldr r2, [pc, #28] @ (8004fc4 <HAL_Init+0x28>)
8004fa6: f043 0310 orr.w r3, r3, #16
8004faa: 6013 str r3, [r2, #0]
#endif
#endif /* PREFETCH_ENABLE */
/* Set Interrupt Group Priority */
HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4);
8004fac: 2003 movs r0, #3
8004fae: f000 fcef bl 8005990 <HAL_NVIC_SetPriorityGrouping>
/* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */
HAL_InitTick(TICK_INT_PRIORITY);
8004fb2: 200f movs r0, #15
8004fb4: f000 f808 bl 8004fc8 <HAL_InitTick>
/* Init the low level hardware */
HAL_MspInit();
8004fb8: f7ff fdca bl 8004b50 <HAL_MspInit>
/* Return function status */
return HAL_OK;
8004fbc: 2300 movs r3, #0
}
8004fbe: 4618 mov r0, r3
8004fc0: bd80 pop {r7, pc}
8004fc2: bf00 nop
8004fc4: 40022000 .word 0x40022000
08004fc8 <HAL_InitTick>:
* implementation in user file.
* @param TickPriority Tick interrupt priority.
* @retval HAL status
*/
__weak HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority)
{
8004fc8: b580 push {r7, lr}
8004fca: b082 sub sp, #8
8004fcc: af00 add r7, sp, #0
8004fce: 6078 str r0, [r7, #4]
/* Configure the SysTick to have interrupt in 1ms time basis*/
if (HAL_SYSTICK_Config(SystemCoreClock / (1000U / uwTickFreq)) > 0U)
8004fd0: 4b12 ldr r3, [pc, #72] @ (800501c <HAL_InitTick+0x54>)
8004fd2: 681a ldr r2, [r3, #0]
8004fd4: 4b12 ldr r3, [pc, #72] @ (8005020 <HAL_InitTick+0x58>)
8004fd6: 781b ldrb r3, [r3, #0]
8004fd8: 4619 mov r1, r3
8004fda: f44f 737a mov.w r3, #1000 @ 0x3e8
8004fde: fbb3 f3f1 udiv r3, r3, r1
8004fe2: fbb2 f3f3 udiv r3, r2, r3
8004fe6: 4618 mov r0, r3
8004fe8: f000 fd07 bl 80059fa <HAL_SYSTICK_Config>
8004fec: 4603 mov r3, r0
8004fee: 2b00 cmp r3, #0
8004ff0: d001 beq.n 8004ff6 <HAL_InitTick+0x2e>
{
return HAL_ERROR;
8004ff2: 2301 movs r3, #1
8004ff4: e00e b.n 8005014 <HAL_InitTick+0x4c>
}
/* Configure the SysTick IRQ priority */
if (TickPriority < (1UL << __NVIC_PRIO_BITS))
8004ff6: 687b ldr r3, [r7, #4]
8004ff8: 2b0f cmp r3, #15
8004ffa: d80a bhi.n 8005012 <HAL_InitTick+0x4a>
{
HAL_NVIC_SetPriority(SysTick_IRQn, TickPriority, 0U);
8004ffc: 2200 movs r2, #0
8004ffe: 6879 ldr r1, [r7, #4]
8005000: f04f 30ff mov.w r0, #4294967295
8005004: f000 fccf bl 80059a6 <HAL_NVIC_SetPriority>
uwTickPrio = TickPriority;
8005008: 4a06 ldr r2, [pc, #24] @ (8005024 <HAL_InitTick+0x5c>)
800500a: 687b ldr r3, [r7, #4]
800500c: 6013 str r3, [r2, #0]
{
return HAL_ERROR;
}
/* Return function status */
return HAL_OK;
800500e: 2300 movs r3, #0
8005010: e000 b.n 8005014 <HAL_InitTick+0x4c>
return HAL_ERROR;
8005012: 2301 movs r3, #1
}
8005014: 4618 mov r0, r3
8005016: 3708 adds r7, #8
8005018: 46bd mov sp, r7
800501a: bd80 pop {r7, pc}
800501c: 20000010 .word 0x20000010
8005020: 20000018 .word 0x20000018
8005024: 20000014 .word 0x20000014
08005028 <HAL_IncTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval None
*/
__weak void HAL_IncTick(void)
{
8005028: b480 push {r7}
800502a: af00 add r7, sp, #0
uwTick += uwTickFreq;
800502c: 4b05 ldr r3, [pc, #20] @ (8005044 <HAL_IncTick+0x1c>)
800502e: 781b ldrb r3, [r3, #0]
8005030: 461a mov r2, r3
8005032: 4b05 ldr r3, [pc, #20] @ (8005048 <HAL_IncTick+0x20>)
8005034: 681b ldr r3, [r3, #0]
8005036: 4413 add r3, r2
8005038: 4a03 ldr r2, [pc, #12] @ (8005048 <HAL_IncTick+0x20>)
800503a: 6013 str r3, [r2, #0]
}
800503c: bf00 nop
800503e: 46bd mov sp, r7
8005040: bc80 pop {r7}
8005042: 4770 bx lr
8005044: 20000018 .word 0x20000018
8005048: 20000474 .word 0x20000474
0800504c <HAL_GetTick>:
* @note This function is declared as __weak to be overwritten in case of other
* implementations in user file.
* @retval tick value
*/
__weak uint32_t HAL_GetTick(void)
{
800504c: b480 push {r7}
800504e: af00 add r7, sp, #0
return uwTick;
8005050: 4b02 ldr r3, [pc, #8] @ (800505c <HAL_GetTick+0x10>)
8005052: 681b ldr r3, [r3, #0]
}
8005054: 4618 mov r0, r3
8005056: 46bd mov sp, r7
8005058: bc80 pop {r7}
800505a: 4770 bx lr
800505c: 20000474 .word 0x20000474
08005060 <HAL_ADC_Init>:
* of structure "ADC_InitTypeDef".
* @param hadc: ADC handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_Init(ADC_HandleTypeDef* hadc)
{
8005060: b580 push {r7, lr}
8005062: b086 sub sp, #24
8005064: af00 add r7, sp, #0
8005066: 6078 str r0, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
8005068: 2300 movs r3, #0
800506a: 75fb strb r3, [r7, #23]
uint32_t tmp_cr1 = 0U;
800506c: 2300 movs r3, #0
800506e: 613b str r3, [r7, #16]
uint32_t tmp_cr2 = 0U;
8005070: 2300 movs r3, #0
8005072: 60bb str r3, [r7, #8]
uint32_t tmp_sqr1 = 0U;
8005074: 2300 movs r3, #0
8005076: 60fb str r3, [r7, #12]
/* Check ADC handle */
if(hadc == NULL)
8005078: 687b ldr r3, [r7, #4]
800507a: 2b00 cmp r3, #0
800507c: d101 bne.n 8005082 <HAL_ADC_Init+0x22>
{
return HAL_ERROR;
800507e: 2301 movs r3, #1
8005080: e0be b.n 8005200 <HAL_ADC_Init+0x1a0>
assert_param(IS_ADC_DATA_ALIGN(hadc->Init.DataAlign));
assert_param(IS_ADC_SCAN_MODE(hadc->Init.ScanConvMode));
assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
assert_param(IS_ADC_EXTTRIG(hadc->Init.ExternalTrigConv));
if(hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
8005082: 687b ldr r3, [r7, #4]
8005084: 689b ldr r3, [r3, #8]
8005086: 2b00 cmp r3, #0
/* Refer to header of this file for more details on clock enabling */
/* procedure. */
/* Actions performed only if ADC is coming from state reset: */
/* - Initialization of ADC MSP */
if (hadc->State == HAL_ADC_STATE_RESET)
8005088: 687b ldr r3, [r7, #4]
800508a: 6a9b ldr r3, [r3, #40] @ 0x28
800508c: 2b00 cmp r3, #0
800508e: d109 bne.n 80050a4 <HAL_ADC_Init+0x44>
{
/* Initialize ADC error code */
ADC_CLEAR_ERRORCODE(hadc);
8005090: 687b ldr r3, [r7, #4]
8005092: 2200 movs r2, #0
8005094: 62da str r2, [r3, #44] @ 0x2c
/* Allocate lock resource and initialize it */
hadc->Lock = HAL_UNLOCKED;
8005096: 687b ldr r3, [r7, #4]
8005098: 2200 movs r2, #0
800509a: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Init the low level hardware */
hadc->MspInitCallback(hadc);
#else
/* Init the low level hardware */
HAL_ADC_MspInit(hadc);
800509e: 6878 ldr r0, [r7, #4]
80050a0: f7ff fd88 bl 8004bb4 <HAL_ADC_MspInit>
/* Stop potential conversion on going, on regular and injected groups */
/* Disable ADC peripheral */
/* Note: In case of ADC already enabled, precaution to not launch an */
/* unwanted conversion while modifying register CR2 by writing 1 to */
/* bit ADON. */
tmp_hal_status = ADC_ConversionStop_Disable(hadc);
80050a4: 6878 ldr r0, [r7, #4]
80050a6: f000 faff bl 80056a8 <ADC_ConversionStop_Disable>
80050aa: 4603 mov r3, r0
80050ac: 75fb strb r3, [r7, #23]
/* Configuration of ADC parameters if previous preliminary actions are */
/* correctly completed. */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL) &&
80050ae: 687b ldr r3, [r7, #4]
80050b0: 6a9b ldr r3, [r3, #40] @ 0x28
80050b2: f003 0310 and.w r3, r3, #16
80050b6: 2b00 cmp r3, #0
80050b8: f040 8099 bne.w 80051ee <HAL_ADC_Init+0x18e>
80050bc: 7dfb ldrb r3, [r7, #23]
80050be: 2b00 cmp r3, #0
80050c0: f040 8095 bne.w 80051ee <HAL_ADC_Init+0x18e>
(tmp_hal_status == HAL_OK) )
{
/* Set ADC state */
ADC_STATE_CLR_SET(hadc->State,
80050c4: 687b ldr r3, [r7, #4]
80050c6: 6a9b ldr r3, [r3, #40] @ 0x28
80050c8: f423 5388 bic.w r3, r3, #4352 @ 0x1100
80050cc: f023 0302 bic.w r3, r3, #2
80050d0: f043 0202 orr.w r2, r3, #2
80050d4: 687b ldr r3, [r7, #4]
80050d6: 629a str r2, [r3, #40] @ 0x28
/* - continuous conversion mode */
/* Note: External trigger polarity (ADC_CR2_EXTTRIG) is set into */
/* HAL_ADC_Start_xxx functions because if set in this function, */
/* a conversion on injected group would start a conversion also on */
/* regular group after ADC enabling. */
tmp_cr2 |= (hadc->Init.DataAlign |
80050d8: 687b ldr r3, [r7, #4]
80050da: 685a ldr r2, [r3, #4]
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
80050dc: 687b ldr r3, [r7, #4]
80050de: 69db ldr r3, [r3, #28]
tmp_cr2 |= (hadc->Init.DataAlign |
80050e0: 431a orrs r2, r3
ADC_CR2_CONTINUOUS((uint32_t)hadc->Init.ContinuousConvMode) );
80050e2: 687b ldr r3, [r7, #4]
80050e4: 7b1b ldrb r3, [r3, #12]
80050e6: 005b lsls r3, r3, #1
ADC_CFGR_EXTSEL(hadc, hadc->Init.ExternalTrigConv) |
80050e8: 4313 orrs r3, r2
tmp_cr2 |= (hadc->Init.DataAlign |
80050ea: 68ba ldr r2, [r7, #8]
80050ec: 4313 orrs r3, r2
80050ee: 60bb str r3, [r7, #8]
/* Configuration of ADC: */
/* - scan mode */
/* - discontinuous mode disable/enable */
/* - discontinuous mode number of conversions */
tmp_cr1 |= (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode));
80050f0: 687b ldr r3, [r7, #4]
80050f2: 689b ldr r3, [r3, #8]
80050f4: f5b3 7f80 cmp.w r3, #256 @ 0x100
80050f8: d003 beq.n 8005102 <HAL_ADC_Init+0xa2>
80050fa: 687b ldr r3, [r7, #4]
80050fc: 689b ldr r3, [r3, #8]
80050fe: 2b01 cmp r3, #1
8005100: d102 bne.n 8005108 <HAL_ADC_Init+0xa8>
8005102: f44f 7380 mov.w r3, #256 @ 0x100
8005106: e000 b.n 800510a <HAL_ADC_Init+0xaa>
8005108: 2300 movs r3, #0
800510a: 693a ldr r2, [r7, #16]
800510c: 4313 orrs r3, r2
800510e: 613b str r3, [r7, #16]
/* Enable discontinuous mode only if continuous mode is disabled */
/* Note: If parameter "Init.ScanConvMode" is set to disable, parameter */
/* discontinuous is set anyway, but will have no effect on ADC HW. */
if (hadc->Init.DiscontinuousConvMode == ENABLE)
8005110: 687b ldr r3, [r7, #4]
8005112: 7d1b ldrb r3, [r3, #20]
8005114: 2b01 cmp r3, #1
8005116: d119 bne.n 800514c <HAL_ADC_Init+0xec>
{
if (hadc->Init.ContinuousConvMode == DISABLE)
8005118: 687b ldr r3, [r7, #4]
800511a: 7b1b ldrb r3, [r3, #12]
800511c: 2b00 cmp r3, #0
800511e: d109 bne.n 8005134 <HAL_ADC_Init+0xd4>
{
/* Enable the selected ADC regular discontinuous mode */
/* Set the number of channels to be converted in discontinuous mode */
SET_BIT(tmp_cr1, ADC_CR1_DISCEN |
8005120: 687b ldr r3, [r7, #4]
8005122: 699b ldr r3, [r3, #24]
8005124: 3b01 subs r3, #1
8005126: 035a lsls r2, r3, #13
8005128: 693b ldr r3, [r7, #16]
800512a: 4313 orrs r3, r2
800512c: f443 6300 orr.w r3, r3, #2048 @ 0x800
8005130: 613b str r3, [r7, #16]
8005132: e00b b.n 800514c <HAL_ADC_Init+0xec>
{
/* ADC regular group settings continuous and sequencer discontinuous*/
/* cannot be enabled simultaneously. */
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
8005134: 687b ldr r3, [r7, #4]
8005136: 6a9b ldr r3, [r3, #40] @ 0x28
8005138: f043 0220 orr.w r2, r3, #32
800513c: 687b ldr r3, [r7, #4]
800513e: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8005140: 687b ldr r3, [r7, #4]
8005142: 6adb ldr r3, [r3, #44] @ 0x2c
8005144: f043 0201 orr.w r2, r3, #1
8005148: 687b ldr r3, [r7, #4]
800514a: 62da str r2, [r3, #44] @ 0x2c
}
}
/* Update ADC configuration register CR1 with previous settings */
MODIFY_REG(hadc->Instance->CR1,
800514c: 687b ldr r3, [r7, #4]
800514e: 681b ldr r3, [r3, #0]
8005150: 685b ldr r3, [r3, #4]
8005152: f423 4169 bic.w r1, r3, #59648 @ 0xe900
8005156: 687b ldr r3, [r7, #4]
8005158: 681b ldr r3, [r3, #0]
800515a: 693a ldr r2, [r7, #16]
800515c: 430a orrs r2, r1
800515e: 605a str r2, [r3, #4]
ADC_CR1_DISCEN |
ADC_CR1_DISCNUM ,
tmp_cr1 );
/* Update ADC configuration register CR2 with previous settings */
MODIFY_REG(hadc->Instance->CR2,
8005160: 687b ldr r3, [r7, #4]
8005162: 681b ldr r3, [r3, #0]
8005164: 689a ldr r2, [r3, #8]
8005166: 4b28 ldr r3, [pc, #160] @ (8005208 <HAL_ADC_Init+0x1a8>)
8005168: 4013 ands r3, r2
800516a: 687a ldr r2, [r7, #4]
800516c: 6812 ldr r2, [r2, #0]
800516e: 68b9 ldr r1, [r7, #8]
8005170: 430b orrs r3, r1
8005172: 6093 str r3, [r2, #8]
/* Note: Scan mode is present by hardware on this device and, if */
/* disabled, discards automatically nb of conversions. Anyway, nb of */
/* conversions is forced to 0x00 for alignment over all STM32 devices. */
/* - if scan mode is enabled, regular channels sequence length is set to */
/* parameter "NbrOfConversion" */
if (ADC_CR1_SCAN_SET(hadc->Init.ScanConvMode) == ADC_SCAN_ENABLE)
8005174: 687b ldr r3, [r7, #4]
8005176: 689b ldr r3, [r3, #8]
8005178: f5b3 7f80 cmp.w r3, #256 @ 0x100
800517c: d003 beq.n 8005186 <HAL_ADC_Init+0x126>
800517e: 687b ldr r3, [r7, #4]
8005180: 689b ldr r3, [r3, #8]
8005182: 2b01 cmp r3, #1
8005184: d104 bne.n 8005190 <HAL_ADC_Init+0x130>
{
tmp_sqr1 = ADC_SQR1_L_SHIFT(hadc->Init.NbrOfConversion);
8005186: 687b ldr r3, [r7, #4]
8005188: 691b ldr r3, [r3, #16]
800518a: 3b01 subs r3, #1
800518c: 051b lsls r3, r3, #20
800518e: 60fb str r3, [r7, #12]
}
MODIFY_REG(hadc->Instance->SQR1,
8005190: 687b ldr r3, [r7, #4]
8005192: 681b ldr r3, [r3, #0]
8005194: 6adb ldr r3, [r3, #44] @ 0x2c
8005196: f423 0170 bic.w r1, r3, #15728640 @ 0xf00000
800519a: 687b ldr r3, [r7, #4]
800519c: 681b ldr r3, [r3, #0]
800519e: 68fa ldr r2, [r7, #12]
80051a0: 430a orrs r2, r1
80051a2: 62da str r2, [r3, #44] @ 0x2c
/* ensure of no potential problem of ADC core IP clocking. */
/* Check through register CR2 (excluding bits set in other functions: */
/* execution control bits (ADON, JSWSTART, SWSTART), regular group bits */
/* (DMA), injected group bits (JEXTTRIG and JEXTSEL), channel internal */
/* measurement path bit (TSVREFE). */
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80051a4: 687b ldr r3, [r7, #4]
80051a6: 681b ldr r3, [r3, #0]
80051a8: 689a ldr r2, [r3, #8]
80051aa: 4b18 ldr r3, [pc, #96] @ (800520c <HAL_ADC_Init+0x1ac>)
80051ac: 4013 ands r3, r2
80051ae: 68ba ldr r2, [r7, #8]
80051b0: 429a cmp r2, r3
80051b2: d10b bne.n 80051cc <HAL_ADC_Init+0x16c>
ADC_CR2_JEXTTRIG | ADC_CR2_JEXTSEL |
ADC_CR2_TSVREFE ))
== tmp_cr2)
{
/* Set ADC error code to none */
ADC_CLEAR_ERRORCODE(hadc);
80051b4: 687b ldr r3, [r7, #4]
80051b6: 2200 movs r2, #0
80051b8: 62da str r2, [r3, #44] @ 0x2c
/* Set the ADC state */
ADC_STATE_CLR_SET(hadc->State,
80051ba: 687b ldr r3, [r7, #4]
80051bc: 6a9b ldr r3, [r3, #40] @ 0x28
80051be: f023 0303 bic.w r3, r3, #3
80051c2: f043 0201 orr.w r2, r3, #1
80051c6: 687b ldr r3, [r7, #4]
80051c8: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80051ca: e018 b.n 80051fe <HAL_ADC_Init+0x19e>
HAL_ADC_STATE_READY);
}
else
{
/* Update ADC state machine to error */
ADC_STATE_CLR_SET(hadc->State,
80051cc: 687b ldr r3, [r7, #4]
80051ce: 6a9b ldr r3, [r3, #40] @ 0x28
80051d0: f023 0312 bic.w r3, r3, #18
80051d4: f043 0210 orr.w r2, r3, #16
80051d8: 687b ldr r3, [r7, #4]
80051da: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_BUSY_INTERNAL,
HAL_ADC_STATE_ERROR_INTERNAL);
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
80051dc: 687b ldr r3, [r7, #4]
80051de: 6adb ldr r3, [r3, #44] @ 0x2c
80051e0: f043 0201 orr.w r2, r3, #1
80051e4: 687b ldr r3, [r7, #4]
80051e6: 62da str r2, [r3, #44] @ 0x2c
tmp_hal_status = HAL_ERROR;
80051e8: 2301 movs r3, #1
80051ea: 75fb strb r3, [r7, #23]
if (READ_BIT(hadc->Instance->CR2, ~(ADC_CR2_ADON | ADC_CR2_DMA |
80051ec: e007 b.n 80051fe <HAL_ADC_Init+0x19e>
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80051ee: 687b ldr r3, [r7, #4]
80051f0: 6a9b ldr r3, [r3, #40] @ 0x28
80051f2: f043 0210 orr.w r2, r3, #16
80051f6: 687b ldr r3, [r7, #4]
80051f8: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
80051fa: 2301 movs r3, #1
80051fc: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
80051fe: 7dfb ldrb r3, [r7, #23]
}
8005200: 4618 mov r0, r3
8005202: 3718 adds r7, #24
8005204: 46bd mov sp, r7
8005206: bd80 pop {r7, pc}
8005208: ffe1f7fd .word 0xffe1f7fd
800520c: ff1f0efe .word 0xff1f0efe
08005210 <HAL_ADC_Start_DMA>:
* @param pData: The destination Buffer address.
* @param Length: The length of data to be transferred from ADC peripheral to memory.
* @retval None
*/
HAL_StatusTypeDef HAL_ADC_Start_DMA(ADC_HandleTypeDef* hadc, uint32_t* pData, uint32_t Length)
{
8005210: b580 push {r7, lr}
8005212: b086 sub sp, #24
8005214: af00 add r7, sp, #0
8005216: 60f8 str r0, [r7, #12]
8005218: 60b9 str r1, [r7, #8]
800521a: 607a str r2, [r7, #4]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
800521c: 2300 movs r3, #0
800521e: 75fb strb r3, [r7, #23]
assert_param(IS_ADC_DMA_CAPABILITY_INSTANCE(hadc->Instance));
/* Verification if multimode is disabled (for devices with several ADC) */
/* If multimode is enabled, dedicated function multimode conversion */
/* start DMA must be used. */
if(ADC_MULTIMODE_IS_ENABLE(hadc) == RESET)
8005220: 68fb ldr r3, [r7, #12]
8005222: 681b ldr r3, [r3, #0]
8005224: 4a64 ldr r2, [pc, #400] @ (80053b8 <HAL_ADC_Start_DMA+0x1a8>)
8005226: 4293 cmp r3, r2
8005228: d004 beq.n 8005234 <HAL_ADC_Start_DMA+0x24>
800522a: 68fb ldr r3, [r7, #12]
800522c: 681b ldr r3, [r3, #0]
800522e: 4a63 ldr r2, [pc, #396] @ (80053bc <HAL_ADC_Start_DMA+0x1ac>)
8005230: 4293 cmp r3, r2
8005232: d106 bne.n 8005242 <HAL_ADC_Start_DMA+0x32>
8005234: 4b60 ldr r3, [pc, #384] @ (80053b8 <HAL_ADC_Start_DMA+0x1a8>)
8005236: 685b ldr r3, [r3, #4]
8005238: f403 2370 and.w r3, r3, #983040 @ 0xf0000
800523c: 2b00 cmp r3, #0
800523e: f040 80b3 bne.w 80053a8 <HAL_ADC_Start_DMA+0x198>
{
/* Process locked */
__HAL_LOCK(hadc);
8005242: 68fb ldr r3, [r7, #12]
8005244: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8005248: 2b01 cmp r3, #1
800524a: d101 bne.n 8005250 <HAL_ADC_Start_DMA+0x40>
800524c: 2302 movs r3, #2
800524e: e0ae b.n 80053ae <HAL_ADC_Start_DMA+0x19e>
8005250: 68fb ldr r3, [r7, #12]
8005252: 2201 movs r2, #1
8005254: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Enable the ADC peripheral */
tmp_hal_status = ADC_Enable(hadc);
8005258: 68f8 ldr r0, [r7, #12]
800525a: f000 f9cb bl 80055f4 <ADC_Enable>
800525e: 4603 mov r3, r0
8005260: 75fb strb r3, [r7, #23]
/* Start conversion if ADC is effectively enabled */
if (tmp_hal_status == HAL_OK)
8005262: 7dfb ldrb r3, [r7, #23]
8005264: 2b00 cmp r3, #0
8005266: f040 809a bne.w 800539e <HAL_ADC_Start_DMA+0x18e>
{
/* Set ADC state */
/* - Clear state bitfield related to regular group conversion results */
/* - Set state bitfield related to regular operation */
ADC_STATE_CLR_SET(hadc->State,
800526a: 68fb ldr r3, [r7, #12]
800526c: 6a9b ldr r3, [r3, #40] @ 0x28
800526e: f423 6370 bic.w r3, r3, #3840 @ 0xf00
8005272: f023 0301 bic.w r3, r3, #1
8005276: f443 7280 orr.w r2, r3, #256 @ 0x100
800527a: 68fb ldr r3, [r7, #12]
800527c: 629a str r2, [r3, #40] @ 0x28
HAL_ADC_STATE_REG_BUSY);
/* Set group injected state (from auto-injection) and multimode state */
/* for all cases of multimode: independent mode, multimode ADC master */
/* or multimode ADC slave (for devices with several ADCs): */
if (ADC_NONMULTIMODE_OR_MULTIMODEMASTER(hadc))
800527e: 68fb ldr r3, [r7, #12]
8005280: 681b ldr r3, [r3, #0]
8005282: 4a4e ldr r2, [pc, #312] @ (80053bc <HAL_ADC_Start_DMA+0x1ac>)
8005284: 4293 cmp r3, r2
8005286: d105 bne.n 8005294 <HAL_ADC_Start_DMA+0x84>
8005288: 4b4b ldr r3, [pc, #300] @ (80053b8 <HAL_ADC_Start_DMA+0x1a8>)
800528a: 685b ldr r3, [r3, #4]
800528c: f403 2370 and.w r3, r3, #983040 @ 0xf0000
8005290: 2b00 cmp r3, #0
8005292: d115 bne.n 80052c0 <HAL_ADC_Start_DMA+0xb0>
{
/* Set ADC state (ADC independent or master) */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
8005294: 68fb ldr r3, [r7, #12]
8005296: 6a9b ldr r3, [r3, #40] @ 0x28
8005298: f423 1280 bic.w r2, r3, #1048576 @ 0x100000
800529c: 68fb ldr r3, [r7, #12]
800529e: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
80052a0: 68fb ldr r3, [r7, #12]
80052a2: 681b ldr r3, [r3, #0]
80052a4: 685b ldr r3, [r3, #4]
80052a6: f403 6380 and.w r3, r3, #1024 @ 0x400
80052aa: 2b00 cmp r3, #0
80052ac: d026 beq.n 80052fc <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
80052ae: 68fb ldr r3, [r7, #12]
80052b0: 6a9b ldr r3, [r3, #40] @ 0x28
80052b2: f423 5340 bic.w r3, r3, #12288 @ 0x3000
80052b6: f443 5280 orr.w r2, r3, #4096 @ 0x1000
80052ba: 68fb ldr r3, [r7, #12]
80052bc: 629a str r2, [r3, #40] @ 0x28
if (READ_BIT(hadc->Instance->CR1, ADC_CR1_JAUTO) != RESET)
80052be: e01d b.n 80052fc <HAL_ADC_Start_DMA+0xec>
}
}
else
{
/* Set ADC state (ADC slave) */
SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
80052c0: 68fb ldr r3, [r7, #12]
80052c2: 6a9b ldr r3, [r3, #40] @ 0x28
80052c4: f443 1280 orr.w r2, r3, #1048576 @ 0x100000
80052c8: 68fb ldr r3, [r7, #12]
80052ca: 629a str r2, [r3, #40] @ 0x28
/* If conversions on group regular are also triggering group injected, */
/* update ADC state. */
if (ADC_MULTIMODE_AUTO_INJECTED(hadc))
80052cc: 68fb ldr r3, [r7, #12]
80052ce: 681b ldr r3, [r3, #0]
80052d0: 4a39 ldr r2, [pc, #228] @ (80053b8 <HAL_ADC_Start_DMA+0x1a8>)
80052d2: 4293 cmp r3, r2
80052d4: d004 beq.n 80052e0 <HAL_ADC_Start_DMA+0xd0>
80052d6: 68fb ldr r3, [r7, #12]
80052d8: 681b ldr r3, [r3, #0]
80052da: 4a38 ldr r2, [pc, #224] @ (80053bc <HAL_ADC_Start_DMA+0x1ac>)
80052dc: 4293 cmp r3, r2
80052de: d10d bne.n 80052fc <HAL_ADC_Start_DMA+0xec>
80052e0: 4b35 ldr r3, [pc, #212] @ (80053b8 <HAL_ADC_Start_DMA+0x1a8>)
80052e2: 685b ldr r3, [r3, #4]
80052e4: f403 6380 and.w r3, r3, #1024 @ 0x400
80052e8: 2b00 cmp r3, #0
80052ea: d007 beq.n 80052fc <HAL_ADC_Start_DMA+0xec>
{
ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_EOC, HAL_ADC_STATE_INJ_BUSY);
80052ec: 68fb ldr r3, [r7, #12]
80052ee: 6a9b ldr r3, [r3, #40] @ 0x28
80052f0: f423 5340 bic.w r3, r3, #12288 @ 0x3000
80052f4: f443 5280 orr.w r2, r3, #4096 @ 0x1000
80052f8: 68fb ldr r3, [r7, #12]
80052fa: 629a str r2, [r3, #40] @ 0x28
}
}
/* State machine update: Check if an injected conversion is ongoing */
if (HAL_IS_BIT_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY))
80052fc: 68fb ldr r3, [r7, #12]
80052fe: 6a9b ldr r3, [r3, #40] @ 0x28
8005300: f403 5380 and.w r3, r3, #4096 @ 0x1000
8005304: 2b00 cmp r3, #0
8005306: d006 beq.n 8005316 <HAL_ADC_Start_DMA+0x106>
{
/* Reset ADC error code fields related to conversions on group regular */
CLEAR_BIT(hadc->ErrorCode, (HAL_ADC_ERROR_OVR | HAL_ADC_ERROR_DMA));
8005308: 68fb ldr r3, [r7, #12]
800530a: 6adb ldr r3, [r3, #44] @ 0x2c
800530c: f023 0206 bic.w r2, r3, #6
8005310: 68fb ldr r3, [r7, #12]
8005312: 62da str r2, [r3, #44] @ 0x2c
8005314: e002 b.n 800531c <HAL_ADC_Start_DMA+0x10c>
}
else
{
/* Reset ADC all error code fields */
ADC_CLEAR_ERRORCODE(hadc);
8005316: 68fb ldr r3, [r7, #12]
8005318: 2200 movs r2, #0
800531a: 62da str r2, [r3, #44] @ 0x2c
}
/* Process unlocked */
/* Unlock before starting ADC conversions: in case of potential */
/* interruption, to let the process to ADC IRQ Handler. */
__HAL_UNLOCK(hadc);
800531c: 68fb ldr r3, [r7, #12]
800531e: 2200 movs r2, #0
8005320: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Set the DMA transfer complete callback */
hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
8005324: 68fb ldr r3, [r7, #12]
8005326: 6a1b ldr r3, [r3, #32]
8005328: 4a25 ldr r2, [pc, #148] @ (80053c0 <HAL_ADC_Start_DMA+0x1b0>)
800532a: 629a str r2, [r3, #40] @ 0x28
/* Set the DMA half transfer complete callback */
hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
800532c: 68fb ldr r3, [r7, #12]
800532e: 6a1b ldr r3, [r3, #32]
8005330: 4a24 ldr r2, [pc, #144] @ (80053c4 <HAL_ADC_Start_DMA+0x1b4>)
8005332: 62da str r2, [r3, #44] @ 0x2c
/* Set the DMA error callback */
hadc->DMA_Handle->XferErrorCallback = ADC_DMAError;
8005334: 68fb ldr r3, [r7, #12]
8005336: 6a1b ldr r3, [r3, #32]
8005338: 4a23 ldr r2, [pc, #140] @ (80053c8 <HAL_ADC_Start_DMA+0x1b8>)
800533a: 631a str r2, [r3, #48] @ 0x30
/* start (in case of SW start): */
/* Clear regular group conversion flag and overrun flag */
/* (To ensure of no unknown state from potential previous ADC */
/* operations) */
__HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_EOC);
800533c: 68fb ldr r3, [r7, #12]
800533e: 681b ldr r3, [r3, #0]
8005340: f06f 0202 mvn.w r2, #2
8005344: 601a str r2, [r3, #0]
/* Enable ADC DMA mode */
SET_BIT(hadc->Instance->CR2, ADC_CR2_DMA);
8005346: 68fb ldr r3, [r7, #12]
8005348: 681b ldr r3, [r3, #0]
800534a: 689a ldr r2, [r3, #8]
800534c: 68fb ldr r3, [r7, #12]
800534e: 681b ldr r3, [r3, #0]
8005350: f442 7280 orr.w r2, r2, #256 @ 0x100
8005354: 609a str r2, [r3, #8]
/* Start the DMA channel */
HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&hadc->Instance->DR, (uint32_t)pData, Length);
8005356: 68fb ldr r3, [r7, #12]
8005358: 6a18 ldr r0, [r3, #32]
800535a: 68fb ldr r3, [r7, #12]
800535c: 681b ldr r3, [r3, #0]
800535e: 334c adds r3, #76 @ 0x4c
8005360: 4619 mov r1, r3
8005362: 68ba ldr r2, [r7, #8]
8005364: 687b ldr r3, [r7, #4]
8005366: f000 fbb5 bl 8005ad4 <HAL_DMA_Start_IT>
/* Enable conversion of regular group. */
/* If software start has been selected, conversion starts immediately. */
/* If external trigger has been selected, conversion will start at next */
/* trigger event. */
if (ADC_IS_SOFTWARE_START_REGULAR(hadc))
800536a: 68fb ldr r3, [r7, #12]
800536c: 681b ldr r3, [r3, #0]
800536e: 689b ldr r3, [r3, #8]
8005370: f403 2360 and.w r3, r3, #917504 @ 0xe0000
8005374: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
8005378: d108 bne.n 800538c <HAL_ADC_Start_DMA+0x17c>
{
/* Start ADC conversion on regular group with SW start */
SET_BIT(hadc->Instance->CR2, (ADC_CR2_SWSTART | ADC_CR2_EXTTRIG));
800537a: 68fb ldr r3, [r7, #12]
800537c: 681b ldr r3, [r3, #0]
800537e: 689a ldr r2, [r3, #8]
8005380: 68fb ldr r3, [r7, #12]
8005382: 681b ldr r3, [r3, #0]
8005384: f442 02a0 orr.w r2, r2, #5242880 @ 0x500000
8005388: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
800538a: e00f b.n 80053ac <HAL_ADC_Start_DMA+0x19c>
}
else
{
/* Start ADC conversion on regular group with external trigger */
SET_BIT(hadc->Instance->CR2, ADC_CR2_EXTTRIG);
800538c: 68fb ldr r3, [r7, #12]
800538e: 681b ldr r3, [r3, #0]
8005390: 689a ldr r2, [r3, #8]
8005392: 68fb ldr r3, [r7, #12]
8005394: 681b ldr r3, [r3, #0]
8005396: f442 1280 orr.w r2, r2, #1048576 @ 0x100000
800539a: 609a str r2, [r3, #8]
if (tmp_hal_status == HAL_OK)
800539c: e006 b.n 80053ac <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
/* Process unlocked */
__HAL_UNLOCK(hadc);
800539e: 68fb ldr r3, [r7, #12]
80053a0: 2200 movs r2, #0
80053a2: f883 2024 strb.w r2, [r3, #36] @ 0x24
if (tmp_hal_status == HAL_OK)
80053a6: e001 b.n 80053ac <HAL_ADC_Start_DMA+0x19c>
}
}
else
{
tmp_hal_status = HAL_ERROR;
80053a8: 2301 movs r3, #1
80053aa: 75fb strb r3, [r7, #23]
}
/* Return function status */
return tmp_hal_status;
80053ac: 7dfb ldrb r3, [r7, #23]
}
80053ae: 4618 mov r0, r3
80053b0: 3718 adds r7, #24
80053b2: 46bd mov sp, r7
80053b4: bd80 pop {r7, pc}
80053b6: bf00 nop
80053b8: 40012400 .word 0x40012400
80053bc: 40012800 .word 0x40012800
80053c0: 0800572b .word 0x0800572b
80053c4: 080057a7 .word 0x080057a7
80053c8: 080057c3 .word 0x080057c3
080053cc <HAL_ADC_ConvCpltCallback>:
* @brief Conversion complete callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvCpltCallback(ADC_HandleTypeDef* hadc)
{
80053cc: b480 push {r7}
80053ce: b083 sub sp, #12
80053d0: af00 add r7, sp, #0
80053d2: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvCpltCallback must be implemented in the user file.
*/
}
80053d4: bf00 nop
80053d6: 370c adds r7, #12
80053d8: 46bd mov sp, r7
80053da: bc80 pop {r7}
80053dc: 4770 bx lr
080053de <HAL_ADC_ConvHalfCpltCallback>:
* @brief Conversion DMA half-transfer callback in non blocking mode
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ConvHalfCpltCallback(ADC_HandleTypeDef* hadc)
{
80053de: b480 push {r7}
80053e0: b083 sub sp, #12
80053e2: af00 add r7, sp, #0
80053e4: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ConvHalfCpltCallback must be implemented in the user file.
*/
}
80053e6: bf00 nop
80053e8: 370c adds r7, #12
80053ea: 46bd mov sp, r7
80053ec: bc80 pop {r7}
80053ee: 4770 bx lr
080053f0 <HAL_ADC_ErrorCallback>:
* (ADC conversion with interruption or transfer by DMA)
* @param hadc: ADC handle
* @retval None
*/
__weak void HAL_ADC_ErrorCallback(ADC_HandleTypeDef *hadc)
{
80053f0: b480 push {r7}
80053f2: b083 sub sp, #12
80053f4: af00 add r7, sp, #0
80053f6: 6078 str r0, [r7, #4]
/* Prevent unused argument(s) compilation warning */
UNUSED(hadc);
/* NOTE : This function should not be modified. When the callback is needed,
function HAL_ADC_ErrorCallback must be implemented in the user file.
*/
}
80053f8: bf00 nop
80053fa: 370c adds r7, #12
80053fc: 46bd mov sp, r7
80053fe: bc80 pop {r7}
8005400: 4770 bx lr
...
08005404 <HAL_ADC_ConfigChannel>:
* @param hadc: ADC handle
* @param sConfig: Structure of ADC channel for regular group.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_ADC_ConfigChannel(ADC_HandleTypeDef* hadc, ADC_ChannelConfTypeDef* sConfig)
{
8005404: b480 push {r7}
8005406: b085 sub sp, #20
8005408: af00 add r7, sp, #0
800540a: 6078 str r0, [r7, #4]
800540c: 6039 str r1, [r7, #0]
HAL_StatusTypeDef tmp_hal_status = HAL_OK;
800540e: 2300 movs r3, #0
8005410: 73fb strb r3, [r7, #15]
__IO uint32_t wait_loop_index = 0U;
8005412: 2300 movs r3, #0
8005414: 60bb str r3, [r7, #8]
assert_param(IS_ADC_CHANNEL(sConfig->Channel));
assert_param(IS_ADC_REGULAR_RANK(sConfig->Rank));
assert_param(IS_ADC_SAMPLE_TIME(sConfig->SamplingTime));
/* Process locked */
__HAL_LOCK(hadc);
8005416: 687b ldr r3, [r7, #4]
8005418: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
800541c: 2b01 cmp r3, #1
800541e: d101 bne.n 8005424 <HAL_ADC_ConfigChannel+0x20>
8005420: 2302 movs r3, #2
8005422: e0dc b.n 80055de <HAL_ADC_ConfigChannel+0x1da>
8005424: 687b ldr r3, [r7, #4]
8005426: 2201 movs r2, #1
8005428: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Regular sequence configuration */
/* For Rank 1 to 6 */
if (sConfig->Rank < 7U)
800542c: 683b ldr r3, [r7, #0]
800542e: 685b ldr r3, [r3, #4]
8005430: 2b06 cmp r3, #6
8005432: d81c bhi.n 800546e <HAL_ADC_ConfigChannel+0x6a>
{
MODIFY_REG(hadc->Instance->SQR3 ,
8005434: 687b ldr r3, [r7, #4]
8005436: 681b ldr r3, [r3, #0]
8005438: 6b59 ldr r1, [r3, #52] @ 0x34
800543a: 683b ldr r3, [r7, #0]
800543c: 685a ldr r2, [r3, #4]
800543e: 4613 mov r3, r2
8005440: 009b lsls r3, r3, #2
8005442: 4413 add r3, r2
8005444: 3b05 subs r3, #5
8005446: 221f movs r2, #31
8005448: fa02 f303 lsl.w r3, r2, r3
800544c: 43db mvns r3, r3
800544e: 4019 ands r1, r3
8005450: 683b ldr r3, [r7, #0]
8005452: 6818 ldr r0, [r3, #0]
8005454: 683b ldr r3, [r7, #0]
8005456: 685a ldr r2, [r3, #4]
8005458: 4613 mov r3, r2
800545a: 009b lsls r3, r3, #2
800545c: 4413 add r3, r2
800545e: 3b05 subs r3, #5
8005460: fa00 f203 lsl.w r2, r0, r3
8005464: 687b ldr r3, [r7, #4]
8005466: 681b ldr r3, [r3, #0]
8005468: 430a orrs r2, r1
800546a: 635a str r2, [r3, #52] @ 0x34
800546c: e03c b.n 80054e8 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR3_RK(ADC_SQR3_SQ1, sConfig->Rank) ,
ADC_SQR3_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 7 to 12 */
else if (sConfig->Rank < 13U)
800546e: 683b ldr r3, [r7, #0]
8005470: 685b ldr r3, [r3, #4]
8005472: 2b0c cmp r3, #12
8005474: d81c bhi.n 80054b0 <HAL_ADC_ConfigChannel+0xac>
{
MODIFY_REG(hadc->Instance->SQR2 ,
8005476: 687b ldr r3, [r7, #4]
8005478: 681b ldr r3, [r3, #0]
800547a: 6b19 ldr r1, [r3, #48] @ 0x30
800547c: 683b ldr r3, [r7, #0]
800547e: 685a ldr r2, [r3, #4]
8005480: 4613 mov r3, r2
8005482: 009b lsls r3, r3, #2
8005484: 4413 add r3, r2
8005486: 3b23 subs r3, #35 @ 0x23
8005488: 221f movs r2, #31
800548a: fa02 f303 lsl.w r3, r2, r3
800548e: 43db mvns r3, r3
8005490: 4019 ands r1, r3
8005492: 683b ldr r3, [r7, #0]
8005494: 6818 ldr r0, [r3, #0]
8005496: 683b ldr r3, [r7, #0]
8005498: 685a ldr r2, [r3, #4]
800549a: 4613 mov r3, r2
800549c: 009b lsls r3, r3, #2
800549e: 4413 add r3, r2
80054a0: 3b23 subs r3, #35 @ 0x23
80054a2: fa00 f203 lsl.w r2, r0, r3
80054a6: 687b ldr r3, [r7, #4]
80054a8: 681b ldr r3, [r3, #0]
80054aa: 430a orrs r2, r1
80054ac: 631a str r2, [r3, #48] @ 0x30
80054ae: e01b b.n 80054e8 <HAL_ADC_ConfigChannel+0xe4>
ADC_SQR2_RK(sConfig->Channel, sConfig->Rank) );
}
/* For Rank 13 to 16 */
else
{
MODIFY_REG(hadc->Instance->SQR1 ,
80054b0: 687b ldr r3, [r7, #4]
80054b2: 681b ldr r3, [r3, #0]
80054b4: 6ad9 ldr r1, [r3, #44] @ 0x2c
80054b6: 683b ldr r3, [r7, #0]
80054b8: 685a ldr r2, [r3, #4]
80054ba: 4613 mov r3, r2
80054bc: 009b lsls r3, r3, #2
80054be: 4413 add r3, r2
80054c0: 3b41 subs r3, #65 @ 0x41
80054c2: 221f movs r2, #31
80054c4: fa02 f303 lsl.w r3, r2, r3
80054c8: 43db mvns r3, r3
80054ca: 4019 ands r1, r3
80054cc: 683b ldr r3, [r7, #0]
80054ce: 6818 ldr r0, [r3, #0]
80054d0: 683b ldr r3, [r7, #0]
80054d2: 685a ldr r2, [r3, #4]
80054d4: 4613 mov r3, r2
80054d6: 009b lsls r3, r3, #2
80054d8: 4413 add r3, r2
80054da: 3b41 subs r3, #65 @ 0x41
80054dc: fa00 f203 lsl.w r2, r0, r3
80054e0: 687b ldr r3, [r7, #4]
80054e2: 681b ldr r3, [r3, #0]
80054e4: 430a orrs r2, r1
80054e6: 62da str r2, [r3, #44] @ 0x2c
}
/* Channel sampling time configuration */
/* For channels 10 to 17 */
if (sConfig->Channel >= ADC_CHANNEL_10)
80054e8: 683b ldr r3, [r7, #0]
80054ea: 681b ldr r3, [r3, #0]
80054ec: 2b09 cmp r3, #9
80054ee: d91c bls.n 800552a <HAL_ADC_ConfigChannel+0x126>
{
MODIFY_REG(hadc->Instance->SMPR1 ,
80054f0: 687b ldr r3, [r7, #4]
80054f2: 681b ldr r3, [r3, #0]
80054f4: 68d9 ldr r1, [r3, #12]
80054f6: 683b ldr r3, [r7, #0]
80054f8: 681a ldr r2, [r3, #0]
80054fa: 4613 mov r3, r2
80054fc: 005b lsls r3, r3, #1
80054fe: 4413 add r3, r2
8005500: 3b1e subs r3, #30
8005502: 2207 movs r2, #7
8005504: fa02 f303 lsl.w r3, r2, r3
8005508: 43db mvns r3, r3
800550a: 4019 ands r1, r3
800550c: 683b ldr r3, [r7, #0]
800550e: 6898 ldr r0, [r3, #8]
8005510: 683b ldr r3, [r7, #0]
8005512: 681a ldr r2, [r3, #0]
8005514: 4613 mov r3, r2
8005516: 005b lsls r3, r3, #1
8005518: 4413 add r3, r2
800551a: 3b1e subs r3, #30
800551c: fa00 f203 lsl.w r2, r0, r3
8005520: 687b ldr r3, [r7, #4]
8005522: 681b ldr r3, [r3, #0]
8005524: 430a orrs r2, r1
8005526: 60da str r2, [r3, #12]
8005528: e019 b.n 800555e <HAL_ADC_ConfigChannel+0x15a>
ADC_SMPR1(ADC_SMPR1_SMP10, sConfig->Channel) ,
ADC_SMPR1(sConfig->SamplingTime, sConfig->Channel) );
}
else /* For channels 0 to 9 */
{
MODIFY_REG(hadc->Instance->SMPR2 ,
800552a: 687b ldr r3, [r7, #4]
800552c: 681b ldr r3, [r3, #0]
800552e: 6919 ldr r1, [r3, #16]
8005530: 683b ldr r3, [r7, #0]
8005532: 681a ldr r2, [r3, #0]
8005534: 4613 mov r3, r2
8005536: 005b lsls r3, r3, #1
8005538: 4413 add r3, r2
800553a: 2207 movs r2, #7
800553c: fa02 f303 lsl.w r3, r2, r3
8005540: 43db mvns r3, r3
8005542: 4019 ands r1, r3
8005544: 683b ldr r3, [r7, #0]
8005546: 6898 ldr r0, [r3, #8]
8005548: 683b ldr r3, [r7, #0]
800554a: 681a ldr r2, [r3, #0]
800554c: 4613 mov r3, r2
800554e: 005b lsls r3, r3, #1
8005550: 4413 add r3, r2
8005552: fa00 f203 lsl.w r2, r0, r3
8005556: 687b ldr r3, [r7, #4]
8005558: 681b ldr r3, [r3, #0]
800555a: 430a orrs r2, r1
800555c: 611a str r2, [r3, #16]
ADC_SMPR2(sConfig->SamplingTime, sConfig->Channel) );
}
/* If ADC1 Channel_16 or Channel_17 is selected, enable Temperature sensor */
/* and VREFINT measurement path. */
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
800555e: 683b ldr r3, [r7, #0]
8005560: 681b ldr r3, [r3, #0]
8005562: 2b10 cmp r3, #16
8005564: d003 beq.n 800556e <HAL_ADC_ConfigChannel+0x16a>
(sConfig->Channel == ADC_CHANNEL_VREFINT) )
8005566: 683b ldr r3, [r7, #0]
8005568: 681b ldr r3, [r3, #0]
if ((sConfig->Channel == ADC_CHANNEL_TEMPSENSOR) ||
800556a: 2b11 cmp r3, #17
800556c: d132 bne.n 80055d4 <HAL_ADC_ConfigChannel+0x1d0>
{
/* For STM32F1 devices with several ADC: Only ADC1 can access internal */
/* measurement channels (VrefInt/TempSensor). If these channels are */
/* intended to be set on other ADC instances, an error is reported. */
if (hadc->Instance == ADC1)
800556e: 687b ldr r3, [r7, #4]
8005570: 681b ldr r3, [r3, #0]
8005572: 4a1d ldr r2, [pc, #116] @ (80055e8 <HAL_ADC_ConfigChannel+0x1e4>)
8005574: 4293 cmp r3, r2
8005576: d125 bne.n 80055c4 <HAL_ADC_ConfigChannel+0x1c0>
{
if (READ_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE) == RESET)
8005578: 687b ldr r3, [r7, #4]
800557a: 681b ldr r3, [r3, #0]
800557c: 689b ldr r3, [r3, #8]
800557e: f403 0300 and.w r3, r3, #8388608 @ 0x800000
8005582: 2b00 cmp r3, #0
8005584: d126 bne.n 80055d4 <HAL_ADC_ConfigChannel+0x1d0>
{
SET_BIT(hadc->Instance->CR2, ADC_CR2_TSVREFE);
8005586: 687b ldr r3, [r7, #4]
8005588: 681b ldr r3, [r3, #0]
800558a: 689a ldr r2, [r3, #8]
800558c: 687b ldr r3, [r7, #4]
800558e: 681b ldr r3, [r3, #0]
8005590: f442 0200 orr.w r2, r2, #8388608 @ 0x800000
8005594: 609a str r2, [r3, #8]
if (sConfig->Channel == ADC_CHANNEL_TEMPSENSOR)
8005596: 683b ldr r3, [r7, #0]
8005598: 681b ldr r3, [r3, #0]
800559a: 2b10 cmp r3, #16
800559c: d11a bne.n 80055d4 <HAL_ADC_ConfigChannel+0x1d0>
{
/* Delay for temperature sensor stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_TEMPSENSOR_DELAY_US * (SystemCoreClock / 1000000U));
800559e: 4b13 ldr r3, [pc, #76] @ (80055ec <HAL_ADC_ConfigChannel+0x1e8>)
80055a0: 681b ldr r3, [r3, #0]
80055a2: 4a13 ldr r2, [pc, #76] @ (80055f0 <HAL_ADC_ConfigChannel+0x1ec>)
80055a4: fba2 2303 umull r2, r3, r2, r3
80055a8: 0c9a lsrs r2, r3, #18
80055aa: 4613 mov r3, r2
80055ac: 009b lsls r3, r3, #2
80055ae: 4413 add r3, r2
80055b0: 005b lsls r3, r3, #1
80055b2: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80055b4: e002 b.n 80055bc <HAL_ADC_ConfigChannel+0x1b8>
{
wait_loop_index--;
80055b6: 68bb ldr r3, [r7, #8]
80055b8: 3b01 subs r3, #1
80055ba: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
80055bc: 68bb ldr r3, [r7, #8]
80055be: 2b00 cmp r3, #0
80055c0: d1f9 bne.n 80055b6 <HAL_ADC_ConfigChannel+0x1b2>
80055c2: e007 b.n 80055d4 <HAL_ADC_ConfigChannel+0x1d0>
}
}
else
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
80055c4: 687b ldr r3, [r7, #4]
80055c6: 6a9b ldr r3, [r3, #40] @ 0x28
80055c8: f043 0220 orr.w r2, r3, #32
80055cc: 687b ldr r3, [r7, #4]
80055ce: 629a str r2, [r3, #40] @ 0x28
tmp_hal_status = HAL_ERROR;
80055d0: 2301 movs r3, #1
80055d2: 73fb strb r3, [r7, #15]
}
}
/* Process unlocked */
__HAL_UNLOCK(hadc);
80055d4: 687b ldr r3, [r7, #4]
80055d6: 2200 movs r2, #0
80055d8: f883 2024 strb.w r2, [r3, #36] @ 0x24
/* Return function status */
return tmp_hal_status;
80055dc: 7bfb ldrb r3, [r7, #15]
}
80055de: 4618 mov r0, r3
80055e0: 3714 adds r7, #20
80055e2: 46bd mov sp, r7
80055e4: bc80 pop {r7}
80055e6: 4770 bx lr
80055e8: 40012400 .word 0x40012400
80055ec: 20000010 .word 0x20000010
80055f0: 431bde83 .word 0x431bde83
080055f4 <ADC_Enable>:
* and voltage regulator must be enabled (done into HAL_ADC_Init()).
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_Enable(ADC_HandleTypeDef* hadc)
{
80055f4: b580 push {r7, lr}
80055f6: b084 sub sp, #16
80055f8: af00 add r7, sp, #0
80055fa: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
80055fc: 2300 movs r3, #0
80055fe: 60fb str r3, [r7, #12]
__IO uint32_t wait_loop_index = 0U;
8005600: 2300 movs r3, #0
8005602: 60bb str r3, [r7, #8]
/* ADC enable and wait for ADC ready (in case of ADC is disabled or */
/* enabling phase not yet completed: flag ADC ready not yet set). */
/* Timeout implemented to not be stuck if ADC cannot be enabled (possible */
/* causes: ADC clock not running, ...). */
if (ADC_IS_ENABLE(hadc) == RESET)
8005604: 687b ldr r3, [r7, #4]
8005606: 681b ldr r3, [r3, #0]
8005608: 689b ldr r3, [r3, #8]
800560a: f003 0301 and.w r3, r3, #1
800560e: 2b01 cmp r3, #1
8005610: d040 beq.n 8005694 <ADC_Enable+0xa0>
{
/* Enable the Peripheral */
__HAL_ADC_ENABLE(hadc);
8005612: 687b ldr r3, [r7, #4]
8005614: 681b ldr r3, [r3, #0]
8005616: 689a ldr r2, [r3, #8]
8005618: 687b ldr r3, [r7, #4]
800561a: 681b ldr r3, [r3, #0]
800561c: f042 0201 orr.w r2, r2, #1
8005620: 609a str r2, [r3, #8]
/* Delay for ADC stabilization time */
/* Compute number of CPU cycles to wait for */
wait_loop_index = (ADC_STAB_DELAY_US * (SystemCoreClock / 1000000U));
8005622: 4b1f ldr r3, [pc, #124] @ (80056a0 <ADC_Enable+0xac>)
8005624: 681b ldr r3, [r3, #0]
8005626: 4a1f ldr r2, [pc, #124] @ (80056a4 <ADC_Enable+0xb0>)
8005628: fba2 2303 umull r2, r3, r2, r3
800562c: 0c9b lsrs r3, r3, #18
800562e: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005630: e002 b.n 8005638 <ADC_Enable+0x44>
{
wait_loop_index--;
8005632: 68bb ldr r3, [r7, #8]
8005634: 3b01 subs r3, #1
8005636: 60bb str r3, [r7, #8]
while(wait_loop_index != 0U)
8005638: 68bb ldr r3, [r7, #8]
800563a: 2b00 cmp r3, #0
800563c: d1f9 bne.n 8005632 <ADC_Enable+0x3e>
}
/* Get tick count */
tickstart = HAL_GetTick();
800563e: f7ff fd05 bl 800504c <HAL_GetTick>
8005642: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively enabled */
while(ADC_IS_ENABLE(hadc) == RESET)
8005644: e01f b.n 8005686 <ADC_Enable+0x92>
{
if((HAL_GetTick() - tickstart) > ADC_ENABLE_TIMEOUT)
8005646: f7ff fd01 bl 800504c <HAL_GetTick>
800564a: 4602 mov r2, r0
800564c: 68fb ldr r3, [r7, #12]
800564e: 1ad3 subs r3, r2, r3
8005650: 2b02 cmp r3, #2
8005652: d918 bls.n 8005686 <ADC_Enable+0x92>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) == RESET)
8005654: 687b ldr r3, [r7, #4]
8005656: 681b ldr r3, [r3, #0]
8005658: 689b ldr r3, [r3, #8]
800565a: f003 0301 and.w r3, r3, #1
800565e: 2b01 cmp r3, #1
8005660: d011 beq.n 8005686 <ADC_Enable+0x92>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
8005662: 687b ldr r3, [r7, #4]
8005664: 6a9b ldr r3, [r3, #40] @ 0x28
8005666: f043 0210 orr.w r2, r3, #16
800566a: 687b ldr r3, [r7, #4]
800566c: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
800566e: 687b ldr r3, [r7, #4]
8005670: 6adb ldr r3, [r3, #44] @ 0x2c
8005672: f043 0201 orr.w r2, r3, #1
8005676: 687b ldr r3, [r7, #4]
8005678: 62da str r2, [r3, #44] @ 0x2c
/* Process unlocked */
__HAL_UNLOCK(hadc);
800567a: 687b ldr r3, [r7, #4]
800567c: 2200 movs r2, #0
800567e: f883 2024 strb.w r2, [r3, #36] @ 0x24
return HAL_ERROR;
8005682: 2301 movs r3, #1
8005684: e007 b.n 8005696 <ADC_Enable+0xa2>
while(ADC_IS_ENABLE(hadc) == RESET)
8005686: 687b ldr r3, [r7, #4]
8005688: 681b ldr r3, [r3, #0]
800568a: 689b ldr r3, [r3, #8]
800568c: f003 0301 and.w r3, r3, #1
8005690: 2b01 cmp r3, #1
8005692: d1d8 bne.n 8005646 <ADC_Enable+0x52>
}
}
}
/* Return HAL status */
return HAL_OK;
8005694: 2300 movs r3, #0
}
8005696: 4618 mov r0, r3
8005698: 3710 adds r7, #16
800569a: 46bd mov sp, r7
800569c: bd80 pop {r7, pc}
800569e: bf00 nop
80056a0: 20000010 .word 0x20000010
80056a4: 431bde83 .word 0x431bde83
080056a8 <ADC_ConversionStop_Disable>:
* stopped to disable the ADC.
* @param hadc: ADC handle
* @retval HAL status.
*/
HAL_StatusTypeDef ADC_ConversionStop_Disable(ADC_HandleTypeDef* hadc)
{
80056a8: b580 push {r7, lr}
80056aa: b084 sub sp, #16
80056ac: af00 add r7, sp, #0
80056ae: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U;
80056b0: 2300 movs r3, #0
80056b2: 60fb str r3, [r7, #12]
/* Verification if ADC is not already disabled */
if (ADC_IS_ENABLE(hadc) != RESET)
80056b4: 687b ldr r3, [r7, #4]
80056b6: 681b ldr r3, [r3, #0]
80056b8: 689b ldr r3, [r3, #8]
80056ba: f003 0301 and.w r3, r3, #1
80056be: 2b01 cmp r3, #1
80056c0: d12e bne.n 8005720 <ADC_ConversionStop_Disable+0x78>
{
/* Disable the ADC peripheral */
__HAL_ADC_DISABLE(hadc);
80056c2: 687b ldr r3, [r7, #4]
80056c4: 681b ldr r3, [r3, #0]
80056c6: 689a ldr r2, [r3, #8]
80056c8: 687b ldr r3, [r7, #4]
80056ca: 681b ldr r3, [r3, #0]
80056cc: f022 0201 bic.w r2, r2, #1
80056d0: 609a str r2, [r3, #8]
/* Get tick count */
tickstart = HAL_GetTick();
80056d2: f7ff fcbb bl 800504c <HAL_GetTick>
80056d6: 60f8 str r0, [r7, #12]
/* Wait for ADC effectively disabled */
while(ADC_IS_ENABLE(hadc) != RESET)
80056d8: e01b b.n 8005712 <ADC_ConversionStop_Disable+0x6a>
{
if((HAL_GetTick() - tickstart) > ADC_DISABLE_TIMEOUT)
80056da: f7ff fcb7 bl 800504c <HAL_GetTick>
80056de: 4602 mov r2, r0
80056e0: 68fb ldr r3, [r7, #12]
80056e2: 1ad3 subs r3, r2, r3
80056e4: 2b02 cmp r3, #2
80056e6: d914 bls.n 8005712 <ADC_ConversionStop_Disable+0x6a>
{
/* New check to avoid false timeout detection in case of preemption */
if(ADC_IS_ENABLE(hadc) != RESET)
80056e8: 687b ldr r3, [r7, #4]
80056ea: 681b ldr r3, [r3, #0]
80056ec: 689b ldr r3, [r3, #8]
80056ee: f003 0301 and.w r3, r3, #1
80056f2: 2b01 cmp r3, #1
80056f4: d10d bne.n 8005712 <ADC_ConversionStop_Disable+0x6a>
{
/* Update ADC state machine to error */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
80056f6: 687b ldr r3, [r7, #4]
80056f8: 6a9b ldr r3, [r3, #40] @ 0x28
80056fa: f043 0210 orr.w r2, r3, #16
80056fe: 687b ldr r3, [r7, #4]
8005700: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to ADC IP internal error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
8005702: 687b ldr r3, [r7, #4]
8005704: 6adb ldr r3, [r3, #44] @ 0x2c
8005706: f043 0201 orr.w r2, r3, #1
800570a: 687b ldr r3, [r7, #4]
800570c: 62da str r2, [r3, #44] @ 0x2c
return HAL_ERROR;
800570e: 2301 movs r3, #1
8005710: e007 b.n 8005722 <ADC_ConversionStop_Disable+0x7a>
while(ADC_IS_ENABLE(hadc) != RESET)
8005712: 687b ldr r3, [r7, #4]
8005714: 681b ldr r3, [r3, #0]
8005716: 689b ldr r3, [r3, #8]
8005718: f003 0301 and.w r3, r3, #1
800571c: 2b01 cmp r3, #1
800571e: d0dc beq.n 80056da <ADC_ConversionStop_Disable+0x32>
}
}
}
/* Return HAL status */
return HAL_OK;
8005720: 2300 movs r3, #0
}
8005722: 4618 mov r0, r3
8005724: 3710 adds r7, #16
8005726: 46bd mov sp, r7
8005728: bd80 pop {r7, pc}
0800572a <ADC_DMAConvCplt>:
* @brief DMA transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAConvCplt(DMA_HandleTypeDef *hdma)
{
800572a: b580 push {r7, lr}
800572c: b084 sub sp, #16
800572e: af00 add r7, sp, #0
8005730: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
8005732: 687b ldr r3, [r7, #4]
8005734: 6a5b ldr r3, [r3, #36] @ 0x24
8005736: 60fb str r3, [r7, #12]
/* Update state machine on conversion status if not in error state */
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL | HAL_ADC_STATE_ERROR_DMA))
8005738: 68fb ldr r3, [r7, #12]
800573a: 6a9b ldr r3, [r3, #40] @ 0x28
800573c: f003 0350 and.w r3, r3, #80 @ 0x50
8005740: 2b00 cmp r3, #0
8005742: d127 bne.n 8005794 <ADC_DMAConvCplt+0x6a>
{
/* Update ADC state machine */
SET_BIT(hadc->State, HAL_ADC_STATE_REG_EOC);
8005744: 68fb ldr r3, [r7, #12]
8005746: 6a9b ldr r3, [r3, #40] @ 0x28
8005748: f443 7200 orr.w r2, r3, #512 @ 0x200
800574c: 68fb ldr r3, [r7, #12]
800574e: 629a str r2, [r3, #40] @ 0x28
/* Determine whether any further conversion upcoming on group regular */
/* by external trigger, continuous mode or scan sequence on going. */
/* Note: On STM32F1 devices, in case of sequencer enabled */
/* (several ranks selected), end of conversion flag is raised */
/* at the end of the sequence. */
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
8005750: 68fb ldr r3, [r7, #12]
8005752: 681b ldr r3, [r3, #0]
8005754: 689b ldr r3, [r3, #8]
8005756: f403 2360 and.w r3, r3, #917504 @ 0xe0000
800575a: f5b3 2f60 cmp.w r3, #917504 @ 0xe0000
800575e: d115 bne.n 800578c <ADC_DMAConvCplt+0x62>
(hadc->Init.ContinuousConvMode == DISABLE) )
8005760: 68fb ldr r3, [r7, #12]
8005762: 7b1b ldrb r3, [r3, #12]
if(ADC_IS_SOFTWARE_START_REGULAR(hadc) &&
8005764: 2b00 cmp r3, #0
8005766: d111 bne.n 800578c <ADC_DMAConvCplt+0x62>
{
/* Set ADC state */
CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
8005768: 68fb ldr r3, [r7, #12]
800576a: 6a9b ldr r3, [r3, #40] @ 0x28
800576c: f423 7280 bic.w r2, r3, #256 @ 0x100
8005770: 68fb ldr r3, [r7, #12]
8005772: 629a str r2, [r3, #40] @ 0x28
if (HAL_IS_BIT_CLR(hadc->State, HAL_ADC_STATE_INJ_BUSY))
8005774: 68fb ldr r3, [r7, #12]
8005776: 6a9b ldr r3, [r3, #40] @ 0x28
8005778: f403 5380 and.w r3, r3, #4096 @ 0x1000
800577c: 2b00 cmp r3, #0
800577e: d105 bne.n 800578c <ADC_DMAConvCplt+0x62>
{
SET_BIT(hadc->State, HAL_ADC_STATE_READY);
8005780: 68fb ldr r3, [r7, #12]
8005782: 6a9b ldr r3, [r3, #40] @ 0x28
8005784: f043 0201 orr.w r2, r3, #1
8005788: 68fb ldr r3, [r7, #12]
800578a: 629a str r2, [r3, #40] @ 0x28
/* Conversion complete callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvCpltCallback(hadc);
#else
HAL_ADC_ConvCpltCallback(hadc);
800578c: 68f8 ldr r0, [r7, #12]
800578e: f7ff fe1d bl 80053cc <HAL_ADC_ConvCpltCallback>
else
{
/* Call DMA error callback */
hadc->DMA_Handle->XferErrorCallback(hdma);
}
}
8005792: e004 b.n 800579e <ADC_DMAConvCplt+0x74>
hadc->DMA_Handle->XferErrorCallback(hdma);
8005794: 68fb ldr r3, [r7, #12]
8005796: 6a1b ldr r3, [r3, #32]
8005798: 6b1b ldr r3, [r3, #48] @ 0x30
800579a: 6878 ldr r0, [r7, #4]
800579c: 4798 blx r3
}
800579e: bf00 nop
80057a0: 3710 adds r7, #16
80057a2: 46bd mov sp, r7
80057a4: bd80 pop {r7, pc}
080057a6 <ADC_DMAHalfConvCplt>:
* @brief DMA half transfer complete callback.
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAHalfConvCplt(DMA_HandleTypeDef *hdma)
{
80057a6: b580 push {r7, lr}
80057a8: b084 sub sp, #16
80057aa: af00 add r7, sp, #0
80057ac: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
80057ae: 687b ldr r3, [r7, #4]
80057b0: 6a5b ldr r3, [r3, #36] @ 0x24
80057b2: 60fb str r3, [r7, #12]
/* Half conversion callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ConvHalfCpltCallback(hadc);
#else
HAL_ADC_ConvHalfCpltCallback(hadc);
80057b4: 68f8 ldr r0, [r7, #12]
80057b6: f7ff fe12 bl 80053de <HAL_ADC_ConvHalfCpltCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
80057ba: bf00 nop
80057bc: 3710 adds r7, #16
80057be: 46bd mov sp, r7
80057c0: bd80 pop {r7, pc}
080057c2 <ADC_DMAError>:
* @brief DMA error callback
* @param hdma: pointer to DMA handle.
* @retval None
*/
void ADC_DMAError(DMA_HandleTypeDef *hdma)
{
80057c2: b580 push {r7, lr}
80057c4: b084 sub sp, #16
80057c6: af00 add r7, sp, #0
80057c8: 6078 str r0, [r7, #4]
/* Retrieve ADC handle corresponding to current DMA handle */
ADC_HandleTypeDef* hadc = ( ADC_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
80057ca: 687b ldr r3, [r7, #4]
80057cc: 6a5b ldr r3, [r3, #36] @ 0x24
80057ce: 60fb str r3, [r7, #12]
/* Set ADC state */
SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
80057d0: 68fb ldr r3, [r7, #12]
80057d2: 6a9b ldr r3, [r3, #40] @ 0x28
80057d4: f043 0240 orr.w r2, r3, #64 @ 0x40
80057d8: 68fb ldr r3, [r7, #12]
80057da: 629a str r2, [r3, #40] @ 0x28
/* Set ADC error code to DMA error */
SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_DMA);
80057dc: 68fb ldr r3, [r7, #12]
80057de: 6adb ldr r3, [r3, #44] @ 0x2c
80057e0: f043 0204 orr.w r2, r3, #4
80057e4: 68fb ldr r3, [r7, #12]
80057e6: 62da str r2, [r3, #44] @ 0x2c
/* Error callback */
#if (USE_HAL_ADC_REGISTER_CALLBACKS == 1)
hadc->ErrorCallback(hadc);
#else
HAL_ADC_ErrorCallback(hadc);
80057e8: 68f8 ldr r0, [r7, #12]
80057ea: f7ff fe01 bl 80053f0 <HAL_ADC_ErrorCallback>
#endif /* USE_HAL_ADC_REGISTER_CALLBACKS */
}
80057ee: bf00 nop
80057f0: 3710 adds r7, #16
80057f2: 46bd mov sp, r7
80057f4: bd80 pop {r7, pc}
...
080057f8 <__NVIC_SetPriorityGrouping>:
In case of a conflict between priority grouping and available
priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set.
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
80057f8: b480 push {r7}
80057fa: b085 sub sp, #20
80057fc: af00 add r7, sp, #0
80057fe: 6078 str r0, [r7, #4]
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
8005800: 687b ldr r3, [r7, #4]
8005802: f003 0307 and.w r3, r3, #7
8005806: 60fb str r3, [r7, #12]
reg_value = SCB->AIRCR; /* read old register configuration */
8005808: 4b0c ldr r3, [pc, #48] @ (800583c <__NVIC_SetPriorityGrouping+0x44>)
800580a: 68db ldr r3, [r3, #12]
800580c: 60bb str r3, [r7, #8]
reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */
800580e: 68ba ldr r2, [r7, #8]
8005810: f64f 03ff movw r3, #63743 @ 0xf8ff
8005814: 4013 ands r3, r2
8005816: 60bb str r3, [r7, #8]
reg_value = (reg_value |
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
(PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */
8005818: 68fb ldr r3, [r7, #12]
800581a: 021a lsls r2, r3, #8
((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) |
800581c: 68bb ldr r3, [r7, #8]
800581e: 4313 orrs r3, r2
reg_value = (reg_value |
8005820: f043 63bf orr.w r3, r3, #100139008 @ 0x5f80000
8005824: f443 3300 orr.w r3, r3, #131072 @ 0x20000
8005828: 60bb str r3, [r7, #8]
SCB->AIRCR = reg_value;
800582a: 4a04 ldr r2, [pc, #16] @ (800583c <__NVIC_SetPriorityGrouping+0x44>)
800582c: 68bb ldr r3, [r7, #8]
800582e: 60d3 str r3, [r2, #12]
}
8005830: bf00 nop
8005832: 3714 adds r7, #20
8005834: 46bd mov sp, r7
8005836: bc80 pop {r7}
8005838: 4770 bx lr
800583a: bf00 nop
800583c: e000ed00 .word 0xe000ed00
08005840 <__NVIC_GetPriorityGrouping>:
\brief Get Priority Grouping
\details Reads the priority grouping field from the NVIC Interrupt Controller.
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
8005840: b480 push {r7}
8005842: af00 add r7, sp, #0
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
8005844: 4b04 ldr r3, [pc, #16] @ (8005858 <__NVIC_GetPriorityGrouping+0x18>)
8005846: 68db ldr r3, [r3, #12]
8005848: 0a1b lsrs r3, r3, #8
800584a: f003 0307 and.w r3, r3, #7
}
800584e: 4618 mov r0, r3
8005850: 46bd mov sp, r7
8005852: bc80 pop {r7}
8005854: 4770 bx lr
8005856: bf00 nop
8005858: e000ed00 .word 0xe000ed00
0800585c <__NVIC_EnableIRQ>:
\details Enables a device specific interrupt in the NVIC interrupt controller.
\param [in] IRQn Device specific interrupt number.
\note IRQn must not be negative.
*/
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
800585c: b480 push {r7}
800585e: b083 sub sp, #12
8005860: af00 add r7, sp, #0
8005862: 4603 mov r3, r0
8005864: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
8005866: f997 3007 ldrsb.w r3, [r7, #7]
800586a: 2b00 cmp r3, #0
800586c: db0b blt.n 8005886 <__NVIC_EnableIRQ+0x2a>
{
NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL));
800586e: 79fb ldrb r3, [r7, #7]
8005870: f003 021f and.w r2, r3, #31
8005874: 4906 ldr r1, [pc, #24] @ (8005890 <__NVIC_EnableIRQ+0x34>)
8005876: f997 3007 ldrsb.w r3, [r7, #7]
800587a: 095b lsrs r3, r3, #5
800587c: 2001 movs r0, #1
800587e: fa00 f202 lsl.w r2, r0, r2
8005882: f841 2023 str.w r2, [r1, r3, lsl #2]
}
}
8005886: bf00 nop
8005888: 370c adds r7, #12
800588a: 46bd mov sp, r7
800588c: bc80 pop {r7}
800588e: 4770 bx lr
8005890: e000e100 .word 0xe000e100
08005894 <__NVIC_SetPriority>:
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
\note The priority cannot be set for every processor exception.
*/
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
8005894: b480 push {r7}
8005896: b083 sub sp, #12
8005898: af00 add r7, sp, #0
800589a: 4603 mov r3, r0
800589c: 6039 str r1, [r7, #0]
800589e: 71fb strb r3, [r7, #7]
if ((int32_t)(IRQn) >= 0)
80058a0: f997 3007 ldrsb.w r3, [r7, #7]
80058a4: 2b00 cmp r3, #0
80058a6: db0a blt.n 80058be <__NVIC_SetPriority+0x2a>
{
NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80058a8: 683b ldr r3, [r7, #0]
80058aa: b2da uxtb r2, r3
80058ac: 490c ldr r1, [pc, #48] @ (80058e0 <__NVIC_SetPriority+0x4c>)
80058ae: f997 3007 ldrsb.w r3, [r7, #7]
80058b2: 0112 lsls r2, r2, #4
80058b4: b2d2 uxtb r2, r2
80058b6: 440b add r3, r1
80058b8: f883 2300 strb.w r2, [r3, #768] @ 0x300
}
else
{
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
}
}
80058bc: e00a b.n 80058d4 <__NVIC_SetPriority+0x40>
SCB->SHP[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
80058be: 683b ldr r3, [r7, #0]
80058c0: b2da uxtb r2, r3
80058c2: 4908 ldr r1, [pc, #32] @ (80058e4 <__NVIC_SetPriority+0x50>)
80058c4: 79fb ldrb r3, [r7, #7]
80058c6: f003 030f and.w r3, r3, #15
80058ca: 3b04 subs r3, #4
80058cc: 0112 lsls r2, r2, #4
80058ce: b2d2 uxtb r2, r2
80058d0: 440b add r3, r1
80058d2: 761a strb r2, [r3, #24]
}
80058d4: bf00 nop
80058d6: 370c adds r7, #12
80058d8: 46bd mov sp, r7
80058da: bc80 pop {r7}
80058dc: 4770 bx lr
80058de: bf00 nop
80058e0: e000e100 .word 0xe000e100
80058e4: e000ed00 .word 0xe000ed00
080058e8 <NVIC_EncodePriority>:
\param [in] PreemptPriority Preemptive priority value (starting from 0).
\param [in] SubPriority Subpriority value (starting from 0).
\return Encoded priority. Value can be used in the function \ref NVIC_SetPriority().
*/
__STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority)
{
80058e8: b480 push {r7}
80058ea: b089 sub sp, #36 @ 0x24
80058ec: af00 add r7, sp, #0
80058ee: 60f8 str r0, [r7, #12]
80058f0: 60b9 str r1, [r7, #8]
80058f2: 607a str r2, [r7, #4]
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
80058f4: 68fb ldr r3, [r7, #12]
80058f6: f003 0307 and.w r3, r3, #7
80058fa: 61fb str r3, [r7, #28]
uint32_t PreemptPriorityBits;
uint32_t SubPriorityBits;
PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp);
80058fc: 69fb ldr r3, [r7, #28]
80058fe: f1c3 0307 rsb r3, r3, #7
8005902: 2b04 cmp r3, #4
8005904: bf28 it cs
8005906: 2304 movcs r3, #4
8005908: 61bb str r3, [r7, #24]
SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS));
800590a: 69fb ldr r3, [r7, #28]
800590c: 3304 adds r3, #4
800590e: 2b06 cmp r3, #6
8005910: d902 bls.n 8005918 <NVIC_EncodePriority+0x30>
8005912: 69fb ldr r3, [r7, #28]
8005914: 3b03 subs r3, #3
8005916: e000 b.n 800591a <NVIC_EncodePriority+0x32>
8005918: 2300 movs r3, #0
800591a: 617b str r3, [r7, #20]
return (
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
800591c: f04f 32ff mov.w r2, #4294967295
8005920: 69bb ldr r3, [r7, #24]
8005922: fa02 f303 lsl.w r3, r2, r3
8005926: 43da mvns r2, r3
8005928: 68bb ldr r3, [r7, #8]
800592a: 401a ands r2, r3
800592c: 697b ldr r3, [r7, #20]
800592e: 409a lsls r2, r3
((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL)))
8005930: f04f 31ff mov.w r1, #4294967295
8005934: 697b ldr r3, [r7, #20]
8005936: fa01 f303 lsl.w r3, r1, r3
800593a: 43d9 mvns r1, r3
800593c: 687b ldr r3, [r7, #4]
800593e: 400b ands r3, r1
((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) |
8005940: 4313 orrs r3, r2
);
}
8005942: 4618 mov r0, r3
8005944: 3724 adds r7, #36 @ 0x24
8005946: 46bd mov sp, r7
8005948: bc80 pop {r7}
800594a: 4770 bx lr
0800594c <SysTick_Config>:
\note When the variable <b>__Vendor_SysTickConfig</b> is set to 1, then the
function <b>SysTick_Config</b> is not included. In this case, the file <b><i>device</i>.h</b>
must contain a vendor-specific implementation of this function.
*/
__STATIC_INLINE uint32_t SysTick_Config(uint32_t ticks)
{
800594c: b580 push {r7, lr}
800594e: b082 sub sp, #8
8005950: af00 add r7, sp, #0
8005952: 6078 str r0, [r7, #4]
if ((ticks - 1UL) > SysTick_LOAD_RELOAD_Msk)
8005954: 687b ldr r3, [r7, #4]
8005956: 3b01 subs r3, #1
8005958: f1b3 7f80 cmp.w r3, #16777216 @ 0x1000000
800595c: d301 bcc.n 8005962 <SysTick_Config+0x16>
{
return (1UL); /* Reload value impossible */
800595e: 2301 movs r3, #1
8005960: e00f b.n 8005982 <SysTick_Config+0x36>
}
SysTick->LOAD = (uint32_t)(ticks - 1UL); /* set reload register */
8005962: 4a0a ldr r2, [pc, #40] @ (800598c <SysTick_Config+0x40>)
8005964: 687b ldr r3, [r7, #4]
8005966: 3b01 subs r3, #1
8005968: 6053 str r3, [r2, #4]
NVIC_SetPriority (SysTick_IRQn, (1UL << __NVIC_PRIO_BITS) - 1UL); /* set Priority for Systick Interrupt */
800596a: 210f movs r1, #15
800596c: f04f 30ff mov.w r0, #4294967295
8005970: f7ff ff90 bl 8005894 <__NVIC_SetPriority>
SysTick->VAL = 0UL; /* Load the SysTick Counter Value */
8005974: 4b05 ldr r3, [pc, #20] @ (800598c <SysTick_Config+0x40>)
8005976: 2200 movs r2, #0
8005978: 609a str r2, [r3, #8]
SysTick->CTRL = SysTick_CTRL_CLKSOURCE_Msk |
800597a: 4b04 ldr r3, [pc, #16] @ (800598c <SysTick_Config+0x40>)
800597c: 2207 movs r2, #7
800597e: 601a str r2, [r3, #0]
SysTick_CTRL_TICKINT_Msk |
SysTick_CTRL_ENABLE_Msk; /* Enable SysTick IRQ and SysTick Timer */
return (0UL); /* Function successful */
8005980: 2300 movs r3, #0
}
8005982: 4618 mov r0, r3
8005984: 3708 adds r7, #8
8005986: 46bd mov sp, r7
8005988: bd80 pop {r7, pc}
800598a: bf00 nop
800598c: e000e010 .word 0xe000e010
08005990 <HAL_NVIC_SetPriorityGrouping>:
* @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible.
* The pending IRQ priority will be managed only by the subpriority.
* @retval None
*/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
8005990: b580 push {r7, lr}
8005992: b082 sub sp, #8
8005994: af00 add r7, sp, #0
8005996: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup));
/* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */
NVIC_SetPriorityGrouping(PriorityGroup);
8005998: 6878 ldr r0, [r7, #4]
800599a: f7ff ff2d bl 80057f8 <__NVIC_SetPriorityGrouping>
}
800599e: bf00 nop
80059a0: 3708 adds r7, #8
80059a2: 46bd mov sp, r7
80059a4: bd80 pop {r7, pc}
080059a6 <HAL_NVIC_SetPriority>:
* This parameter can be a value between 0 and 15
* A lower priority value indicates a higher priority.
* @retval None
*/
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority)
{
80059a6: b580 push {r7, lr}
80059a8: b086 sub sp, #24
80059aa: af00 add r7, sp, #0
80059ac: 4603 mov r3, r0
80059ae: 60b9 str r1, [r7, #8]
80059b0: 607a str r2, [r7, #4]
80059b2: 73fb strb r3, [r7, #15]
uint32_t prioritygroup = 0x00U;
80059b4: 2300 movs r3, #0
80059b6: 617b str r3, [r7, #20]
/* Check the parameters */
assert_param(IS_NVIC_SUB_PRIORITY(SubPriority));
assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority));
prioritygroup = NVIC_GetPriorityGrouping();
80059b8: f7ff ff42 bl 8005840 <__NVIC_GetPriorityGrouping>
80059bc: 6178 str r0, [r7, #20]
NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority));
80059be: 687a ldr r2, [r7, #4]
80059c0: 68b9 ldr r1, [r7, #8]
80059c2: 6978 ldr r0, [r7, #20]
80059c4: f7ff ff90 bl 80058e8 <NVIC_EncodePriority>
80059c8: 4602 mov r2, r0
80059ca: f997 300f ldrsb.w r3, [r7, #15]
80059ce: 4611 mov r1, r2
80059d0: 4618 mov r0, r3
80059d2: f7ff ff5f bl 8005894 <__NVIC_SetPriority>
}
80059d6: bf00 nop
80059d8: 3718 adds r7, #24
80059da: 46bd mov sp, r7
80059dc: bd80 pop {r7, pc}
080059de <HAL_NVIC_EnableIRQ>:
* This parameter can be an enumerator of IRQn_Type enumeration
* (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f10xxx.h))
* @retval None
*/
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn)
{
80059de: b580 push {r7, lr}
80059e0: b082 sub sp, #8
80059e2: af00 add r7, sp, #0
80059e4: 4603 mov r3, r0
80059e6: 71fb strb r3, [r7, #7]
/* Check the parameters */
assert_param(IS_NVIC_DEVICE_IRQ(IRQn));
/* Enable interrupt */
NVIC_EnableIRQ(IRQn);
80059e8: f997 3007 ldrsb.w r3, [r7, #7]
80059ec: 4618 mov r0, r3
80059ee: f7ff ff35 bl 800585c <__NVIC_EnableIRQ>
}
80059f2: bf00 nop
80059f4: 3708 adds r7, #8
80059f6: 46bd mov sp, r7
80059f8: bd80 pop {r7, pc}
080059fa <HAL_SYSTICK_Config>:
* @param TicksNumb: Specifies the ticks Number of ticks between two interrupts.
* @retval status: - 0 Function succeeded.
* - 1 Function failed.
*/
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb)
{
80059fa: b580 push {r7, lr}
80059fc: b082 sub sp, #8
80059fe: af00 add r7, sp, #0
8005a00: 6078 str r0, [r7, #4]
return SysTick_Config(TicksNumb);
8005a02: 6878 ldr r0, [r7, #4]
8005a04: f7ff ffa2 bl 800594c <SysTick_Config>
8005a08: 4603 mov r3, r0
}
8005a0a: 4618 mov r0, r3
8005a0c: 3708 adds r7, #8
8005a0e: 46bd mov sp, r7
8005a10: bd80 pop {r7, pc}
08005a12 <HAL_SYSTICK_IRQHandler>:
/**
* @brief This function handles SYSTICK interrupt request.
* @retval None
*/
void HAL_SYSTICK_IRQHandler(void)
{
8005a12: b580 push {r7, lr}
8005a14: af00 add r7, sp, #0
HAL_SYSTICK_Callback();
8005a16: f7fc f8f3 bl 8001c00 <HAL_SYSTICK_Callback>
}
8005a1a: bf00 nop
8005a1c: bd80 pop {r7, pc}
...
08005a20 <HAL_DMA_Init>:
* @param hdma: Pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Init(DMA_HandleTypeDef *hdma)
{
8005a20: b480 push {r7}
8005a22: b085 sub sp, #20
8005a24: af00 add r7, sp, #0
8005a26: 6078 str r0, [r7, #4]
uint32_t tmp = 0U;
8005a28: 2300 movs r3, #0
8005a2a: 60fb str r3, [r7, #12]
/* Check the DMA handle allocation */
if(hdma == NULL)
8005a2c: 687b ldr r3, [r7, #4]
8005a2e: 2b00 cmp r3, #0
8005a30: d101 bne.n 8005a36 <HAL_DMA_Init+0x16>
{
return HAL_ERROR;
8005a32: 2301 movs r3, #1
8005a34: e043 b.n 8005abe <HAL_DMA_Init+0x9e>
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA2_Channel1) / ((uint32_t)DMA2_Channel2 - (uint32_t)DMA2_Channel1)) << 2;
hdma->DmaBaseAddress = DMA2;
}
#else
/* DMA1 */
hdma->ChannelIndex = (((uint32_t)hdma->Instance - (uint32_t)DMA1_Channel1) / ((uint32_t)DMA1_Channel2 - (uint32_t)DMA1_Channel1)) << 2;
8005a36: 687b ldr r3, [r7, #4]
8005a38: 681b ldr r3, [r3, #0]
8005a3a: 461a mov r2, r3
8005a3c: 4b22 ldr r3, [pc, #136] @ (8005ac8 <HAL_DMA_Init+0xa8>)
8005a3e: 4413 add r3, r2
8005a40: 4a22 ldr r2, [pc, #136] @ (8005acc <HAL_DMA_Init+0xac>)
8005a42: fba2 2303 umull r2, r3, r2, r3
8005a46: 091b lsrs r3, r3, #4
8005a48: 009a lsls r2, r3, #2
8005a4a: 687b ldr r3, [r7, #4]
8005a4c: 641a str r2, [r3, #64] @ 0x40
hdma->DmaBaseAddress = DMA1;
8005a4e: 687b ldr r3, [r7, #4]
8005a50: 4a1f ldr r2, [pc, #124] @ (8005ad0 <HAL_DMA_Init+0xb0>)
8005a52: 63da str r2, [r3, #60] @ 0x3c
#endif /* DMA2 */
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005a54: 687b ldr r3, [r7, #4]
8005a56: 2202 movs r2, #2
8005a58: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Get the CR register value */
tmp = hdma->Instance->CCR;
8005a5c: 687b ldr r3, [r7, #4]
8005a5e: 681b ldr r3, [r3, #0]
8005a60: 681b ldr r3, [r3, #0]
8005a62: 60fb str r3, [r7, #12]
/* Clear PL, MSIZE, PSIZE, MINC, PINC, CIRC and DIR bits */
tmp &= ((uint32_t)~(DMA_CCR_PL | DMA_CCR_MSIZE | DMA_CCR_PSIZE | \
8005a64: 68fb ldr r3, [r7, #12]
8005a66: f423 537f bic.w r3, r3, #16320 @ 0x3fc0
8005a6a: f023 0330 bic.w r3, r3, #48 @ 0x30
8005a6e: 60fb str r3, [r7, #12]
DMA_CCR_MINC | DMA_CCR_PINC | DMA_CCR_CIRC | \
DMA_CCR_DIR));
/* Prepare the DMA Channel configuration */
tmp |= hdma->Init.Direction |
8005a70: 687b ldr r3, [r7, #4]
8005a72: 685a ldr r2, [r3, #4]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005a74: 687b ldr r3, [r7, #4]
8005a76: 689b ldr r3, [r3, #8]
tmp |= hdma->Init.Direction |
8005a78: 431a orrs r2, r3
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005a7a: 687b ldr r3, [r7, #4]
8005a7c: 68db ldr r3, [r3, #12]
8005a7e: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005a80: 687b ldr r3, [r7, #4]
8005a82: 691b ldr r3, [r3, #16]
hdma->Init.PeriphInc | hdma->Init.MemInc |
8005a84: 431a orrs r2, r3
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005a86: 687b ldr r3, [r7, #4]
8005a88: 695b ldr r3, [r3, #20]
8005a8a: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8005a8c: 687b ldr r3, [r7, #4]
8005a8e: 699b ldr r3, [r3, #24]
hdma->Init.PeriphDataAlignment | hdma->Init.MemDataAlignment |
8005a90: 431a orrs r2, r3
hdma->Init.Mode | hdma->Init.Priority;
8005a92: 687b ldr r3, [r7, #4]
8005a94: 69db ldr r3, [r3, #28]
8005a96: 4313 orrs r3, r2
tmp |= hdma->Init.Direction |
8005a98: 68fa ldr r2, [r7, #12]
8005a9a: 4313 orrs r3, r2
8005a9c: 60fb str r3, [r7, #12]
/* Write to DMA Channel CR register */
hdma->Instance->CCR = tmp;
8005a9e: 687b ldr r3, [r7, #4]
8005aa0: 681b ldr r3, [r3, #0]
8005aa2: 68fa ldr r2, [r7, #12]
8005aa4: 601a str r2, [r3, #0]
/* Initialise the error code */
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005aa6: 687b ldr r3, [r7, #4]
8005aa8: 2200 movs r2, #0
8005aaa: 639a str r2, [r3, #56] @ 0x38
/* Initialize the DMA state*/
hdma->State = HAL_DMA_STATE_READY;
8005aac: 687b ldr r3, [r7, #4]
8005aae: 2201 movs r2, #1
8005ab0: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Allocate lock resource and initialize it */
hdma->Lock = HAL_UNLOCKED;
8005ab4: 687b ldr r3, [r7, #4]
8005ab6: 2200 movs r2, #0
8005ab8: f883 2020 strb.w r2, [r3, #32]
return HAL_OK;
8005abc: 2300 movs r3, #0
}
8005abe: 4618 mov r0, r3
8005ac0: 3714 adds r7, #20
8005ac2: 46bd mov sp, r7
8005ac4: bc80 pop {r7}
8005ac6: 4770 bx lr
8005ac8: bffdfff8 .word 0xbffdfff8
8005acc: cccccccd .word 0xcccccccd
8005ad0: 40020000 .word 0x40020000
08005ad4 <HAL_DMA_Start_IT>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
HAL_StatusTypeDef HAL_DMA_Start_IT(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8005ad4: b580 push {r7, lr}
8005ad6: b086 sub sp, #24
8005ad8: af00 add r7, sp, #0
8005ada: 60f8 str r0, [r7, #12]
8005adc: 60b9 str r1, [r7, #8]
8005ade: 607a str r2, [r7, #4]
8005ae0: 603b str r3, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8005ae2: 2300 movs r3, #0
8005ae4: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_DMA_BUFFER_SIZE(DataLength));
/* Process locked */
__HAL_LOCK(hdma);
8005ae6: 68fb ldr r3, [r7, #12]
8005ae8: f893 3020 ldrb.w r3, [r3, #32]
8005aec: 2b01 cmp r3, #1
8005aee: d101 bne.n 8005af4 <HAL_DMA_Start_IT+0x20>
8005af0: 2302 movs r3, #2
8005af2: e04b b.n 8005b8c <HAL_DMA_Start_IT+0xb8>
8005af4: 68fb ldr r3, [r7, #12]
8005af6: 2201 movs r2, #1
8005af8: f883 2020 strb.w r2, [r3, #32]
if(HAL_DMA_STATE_READY == hdma->State)
8005afc: 68fb ldr r3, [r7, #12]
8005afe: f893 3021 ldrb.w r3, [r3, #33] @ 0x21
8005b02: b2db uxtb r3, r3
8005b04: 2b01 cmp r3, #1
8005b06: d13a bne.n 8005b7e <HAL_DMA_Start_IT+0xaa>
{
/* Change DMA peripheral state */
hdma->State = HAL_DMA_STATE_BUSY;
8005b08: 68fb ldr r3, [r7, #12]
8005b0a: 2202 movs r2, #2
8005b0c: f883 2021 strb.w r2, [r3, #33] @ 0x21
hdma->ErrorCode = HAL_DMA_ERROR_NONE;
8005b10: 68fb ldr r3, [r7, #12]
8005b12: 2200 movs r2, #0
8005b14: 639a str r2, [r3, #56] @ 0x38
/* Disable the peripheral */
__HAL_DMA_DISABLE(hdma);
8005b16: 68fb ldr r3, [r7, #12]
8005b18: 681b ldr r3, [r3, #0]
8005b1a: 681a ldr r2, [r3, #0]
8005b1c: 68fb ldr r3, [r7, #12]
8005b1e: 681b ldr r3, [r3, #0]
8005b20: f022 0201 bic.w r2, r2, #1
8005b24: 601a str r2, [r3, #0]
/* Configure the source, destination address and the data length & clear flags*/
DMA_SetConfig(hdma, SrcAddress, DstAddress, DataLength);
8005b26: 683b ldr r3, [r7, #0]
8005b28: 687a ldr r2, [r7, #4]
8005b2a: 68b9 ldr r1, [r7, #8]
8005b2c: 68f8 ldr r0, [r7, #12]
8005b2e: f000 f937 bl 8005da0 <DMA_SetConfig>
/* Enable the transfer complete interrupt */
/* Enable the transfer Error interrupt */
if(NULL != hdma->XferHalfCpltCallback)
8005b32: 68fb ldr r3, [r7, #12]
8005b34: 6adb ldr r3, [r3, #44] @ 0x2c
8005b36: 2b00 cmp r3, #0
8005b38: d008 beq.n 8005b4c <HAL_DMA_Start_IT+0x78>
{
/* Enable the Half transfer complete interrupt as well */
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005b3a: 68fb ldr r3, [r7, #12]
8005b3c: 681b ldr r3, [r3, #0]
8005b3e: 681a ldr r2, [r3, #0]
8005b40: 68fb ldr r3, [r7, #12]
8005b42: 681b ldr r3, [r3, #0]
8005b44: f042 020e orr.w r2, r2, #14
8005b48: 601a str r2, [r3, #0]
8005b4a: e00f b.n 8005b6c <HAL_DMA_Start_IT+0x98>
}
else
{
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005b4c: 68fb ldr r3, [r7, #12]
8005b4e: 681b ldr r3, [r3, #0]
8005b50: 681a ldr r2, [r3, #0]
8005b52: 68fb ldr r3, [r7, #12]
8005b54: 681b ldr r3, [r3, #0]
8005b56: f022 0204 bic.w r2, r2, #4
8005b5a: 601a str r2, [r3, #0]
__HAL_DMA_ENABLE_IT(hdma, (DMA_IT_TC | DMA_IT_TE));
8005b5c: 68fb ldr r3, [r7, #12]
8005b5e: 681b ldr r3, [r3, #0]
8005b60: 681a ldr r2, [r3, #0]
8005b62: 68fb ldr r3, [r7, #12]
8005b64: 681b ldr r3, [r3, #0]
8005b66: f042 020a orr.w r2, r2, #10
8005b6a: 601a str r2, [r3, #0]
}
/* Enable the Peripheral */
__HAL_DMA_ENABLE(hdma);
8005b6c: 68fb ldr r3, [r7, #12]
8005b6e: 681b ldr r3, [r3, #0]
8005b70: 681a ldr r2, [r3, #0]
8005b72: 68fb ldr r3, [r7, #12]
8005b74: 681b ldr r3, [r3, #0]
8005b76: f042 0201 orr.w r2, r2, #1
8005b7a: 601a str r2, [r3, #0]
8005b7c: e005 b.n 8005b8a <HAL_DMA_Start_IT+0xb6>
}
else
{
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005b7e: 68fb ldr r3, [r7, #12]
8005b80: 2200 movs r2, #0
8005b82: f883 2020 strb.w r2, [r3, #32]
/* Remain BUSY */
status = HAL_BUSY;
8005b86: 2302 movs r3, #2
8005b88: 75fb strb r3, [r7, #23]
}
return status;
8005b8a: 7dfb ldrb r3, [r7, #23]
}
8005b8c: 4618 mov r0, r3
8005b8e: 3718 adds r7, #24
8005b90: 46bd mov sp, r7
8005b92: bd80 pop {r7, pc}
08005b94 <HAL_DMA_IRQHandler>:
* @param hdma: pointer to a DMA_HandleTypeDef structure that contains
* the configuration information for the specified DMA Channel.
* @retval None
*/
void HAL_DMA_IRQHandler(DMA_HandleTypeDef *hdma)
{
8005b94: b580 push {r7, lr}
8005b96: b084 sub sp, #16
8005b98: af00 add r7, sp, #0
8005b9a: 6078 str r0, [r7, #4]
uint32_t flag_it = hdma->DmaBaseAddress->ISR;
8005b9c: 687b ldr r3, [r7, #4]
8005b9e: 6bdb ldr r3, [r3, #60] @ 0x3c
8005ba0: 681b ldr r3, [r3, #0]
8005ba2: 60fb str r3, [r7, #12]
uint32_t source_it = hdma->Instance->CCR;
8005ba4: 687b ldr r3, [r7, #4]
8005ba6: 681b ldr r3, [r3, #0]
8005ba8: 681b ldr r3, [r3, #0]
8005baa: 60bb str r3, [r7, #8]
/* Half Transfer Complete Interrupt management ******************************/
if (((flag_it & (DMA_FLAG_HT1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_HT) != RESET))
8005bac: 687b ldr r3, [r7, #4]
8005bae: 6c1b ldr r3, [r3, #64] @ 0x40
8005bb0: 2204 movs r2, #4
8005bb2: 409a lsls r2, r3
8005bb4: 68fb ldr r3, [r7, #12]
8005bb6: 4013 ands r3, r2
8005bb8: 2b00 cmp r3, #0
8005bba: d04f beq.n 8005c5c <HAL_DMA_IRQHandler+0xc8>
8005bbc: 68bb ldr r3, [r7, #8]
8005bbe: f003 0304 and.w r3, r3, #4
8005bc2: 2b00 cmp r3, #0
8005bc4: d04a beq.n 8005c5c <HAL_DMA_IRQHandler+0xc8>
{
/* Disable the half transfer interrupt if the DMA mode is not CIRCULAR */
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
8005bc6: 687b ldr r3, [r7, #4]
8005bc8: 681b ldr r3, [r3, #0]
8005bca: 681b ldr r3, [r3, #0]
8005bcc: f003 0320 and.w r3, r3, #32
8005bd0: 2b00 cmp r3, #0
8005bd2: d107 bne.n 8005be4 <HAL_DMA_IRQHandler+0x50>
{
/* Disable the half transfer interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_HT);
8005bd4: 687b ldr r3, [r7, #4]
8005bd6: 681b ldr r3, [r3, #0]
8005bd8: 681a ldr r2, [r3, #0]
8005bda: 687b ldr r3, [r7, #4]
8005bdc: 681b ldr r3, [r3, #0]
8005bde: f022 0204 bic.w r2, r2, #4
8005be2: 601a str r2, [r3, #0]
}
/* Clear the half transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_HT_FLAG_INDEX(hdma));
8005be4: 687b ldr r3, [r7, #4]
8005be6: 681b ldr r3, [r3, #0]
8005be8: 4a66 ldr r2, [pc, #408] @ (8005d84 <HAL_DMA_IRQHandler+0x1f0>)
8005bea: 4293 cmp r3, r2
8005bec: d029 beq.n 8005c42 <HAL_DMA_IRQHandler+0xae>
8005bee: 687b ldr r3, [r7, #4]
8005bf0: 681b ldr r3, [r3, #0]
8005bf2: 4a65 ldr r2, [pc, #404] @ (8005d88 <HAL_DMA_IRQHandler+0x1f4>)
8005bf4: 4293 cmp r3, r2
8005bf6: d022 beq.n 8005c3e <HAL_DMA_IRQHandler+0xaa>
8005bf8: 687b ldr r3, [r7, #4]
8005bfa: 681b ldr r3, [r3, #0]
8005bfc: 4a63 ldr r2, [pc, #396] @ (8005d8c <HAL_DMA_IRQHandler+0x1f8>)
8005bfe: 4293 cmp r3, r2
8005c00: d01a beq.n 8005c38 <HAL_DMA_IRQHandler+0xa4>
8005c02: 687b ldr r3, [r7, #4]
8005c04: 681b ldr r3, [r3, #0]
8005c06: 4a62 ldr r2, [pc, #392] @ (8005d90 <HAL_DMA_IRQHandler+0x1fc>)
8005c08: 4293 cmp r3, r2
8005c0a: d012 beq.n 8005c32 <HAL_DMA_IRQHandler+0x9e>
8005c0c: 687b ldr r3, [r7, #4]
8005c0e: 681b ldr r3, [r3, #0]
8005c10: 4a60 ldr r2, [pc, #384] @ (8005d94 <HAL_DMA_IRQHandler+0x200>)
8005c12: 4293 cmp r3, r2
8005c14: d00a beq.n 8005c2c <HAL_DMA_IRQHandler+0x98>
8005c16: 687b ldr r3, [r7, #4]
8005c18: 681b ldr r3, [r3, #0]
8005c1a: 4a5f ldr r2, [pc, #380] @ (8005d98 <HAL_DMA_IRQHandler+0x204>)
8005c1c: 4293 cmp r3, r2
8005c1e: d102 bne.n 8005c26 <HAL_DMA_IRQHandler+0x92>
8005c20: f44f 0380 mov.w r3, #4194304 @ 0x400000
8005c24: e00e b.n 8005c44 <HAL_DMA_IRQHandler+0xb0>
8005c26: f04f 6380 mov.w r3, #67108864 @ 0x4000000
8005c2a: e00b b.n 8005c44 <HAL_DMA_IRQHandler+0xb0>
8005c2c: f44f 2380 mov.w r3, #262144 @ 0x40000
8005c30: e008 b.n 8005c44 <HAL_DMA_IRQHandler+0xb0>
8005c32: f44f 4380 mov.w r3, #16384 @ 0x4000
8005c36: e005 b.n 8005c44 <HAL_DMA_IRQHandler+0xb0>
8005c38: f44f 6380 mov.w r3, #1024 @ 0x400
8005c3c: e002 b.n 8005c44 <HAL_DMA_IRQHandler+0xb0>
8005c3e: 2340 movs r3, #64 @ 0x40
8005c40: e000 b.n 8005c44 <HAL_DMA_IRQHandler+0xb0>
8005c42: 2304 movs r3, #4
8005c44: 4a55 ldr r2, [pc, #340] @ (8005d9c <HAL_DMA_IRQHandler+0x208>)
8005c46: 6053 str r3, [r2, #4]
/* DMA peripheral state is not updated in Half Transfer */
/* but in Transfer Complete case */
if(hdma->XferHalfCpltCallback != NULL)
8005c48: 687b ldr r3, [r7, #4]
8005c4a: 6adb ldr r3, [r3, #44] @ 0x2c
8005c4c: 2b00 cmp r3, #0
8005c4e: f000 8094 beq.w 8005d7a <HAL_DMA_IRQHandler+0x1e6>
{
/* Half transfer callback */
hdma->XferHalfCpltCallback(hdma);
8005c52: 687b ldr r3, [r7, #4]
8005c54: 6adb ldr r3, [r3, #44] @ 0x2c
8005c56: 6878 ldr r0, [r7, #4]
8005c58: 4798 blx r3
if(hdma->XferHalfCpltCallback != NULL)
8005c5a: e08e b.n 8005d7a <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Complete Interrupt management ***********************************/
else if (((flag_it & (DMA_FLAG_TC1 << hdma->ChannelIndex)) != RESET) && ((source_it & DMA_IT_TC) != RESET))
8005c5c: 687b ldr r3, [r7, #4]
8005c5e: 6c1b ldr r3, [r3, #64] @ 0x40
8005c60: 2202 movs r2, #2
8005c62: 409a lsls r2, r3
8005c64: 68fb ldr r3, [r7, #12]
8005c66: 4013 ands r3, r2
8005c68: 2b00 cmp r3, #0
8005c6a: d056 beq.n 8005d1a <HAL_DMA_IRQHandler+0x186>
8005c6c: 68bb ldr r3, [r7, #8]
8005c6e: f003 0302 and.w r3, r3, #2
8005c72: 2b00 cmp r3, #0
8005c74: d051 beq.n 8005d1a <HAL_DMA_IRQHandler+0x186>
{
if((hdma->Instance->CCR & DMA_CCR_CIRC) == 0U)
8005c76: 687b ldr r3, [r7, #4]
8005c78: 681b ldr r3, [r3, #0]
8005c7a: 681b ldr r3, [r3, #0]
8005c7c: f003 0320 and.w r3, r3, #32
8005c80: 2b00 cmp r3, #0
8005c82: d10b bne.n 8005c9c <HAL_DMA_IRQHandler+0x108>
{
/* Disable the transfer complete and error interrupt */
__HAL_DMA_DISABLE_IT(hdma, DMA_IT_TE | DMA_IT_TC);
8005c84: 687b ldr r3, [r7, #4]
8005c86: 681b ldr r3, [r3, #0]
8005c88: 681a ldr r2, [r3, #0]
8005c8a: 687b ldr r3, [r7, #4]
8005c8c: 681b ldr r3, [r3, #0]
8005c8e: f022 020a bic.w r2, r2, #10
8005c92: 601a str r2, [r3, #0]
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8005c94: 687b ldr r3, [r7, #4]
8005c96: 2201 movs r2, #1
8005c98: f883 2021 strb.w r2, [r3, #33] @ 0x21
}
/* Clear the transfer complete flag */
__HAL_DMA_CLEAR_FLAG(hdma, __HAL_DMA_GET_TC_FLAG_INDEX(hdma));
8005c9c: 687b ldr r3, [r7, #4]
8005c9e: 681b ldr r3, [r3, #0]
8005ca0: 4a38 ldr r2, [pc, #224] @ (8005d84 <HAL_DMA_IRQHandler+0x1f0>)
8005ca2: 4293 cmp r3, r2
8005ca4: d029 beq.n 8005cfa <HAL_DMA_IRQHandler+0x166>
8005ca6: 687b ldr r3, [r7, #4]
8005ca8: 681b ldr r3, [r3, #0]
8005caa: 4a37 ldr r2, [pc, #220] @ (8005d88 <HAL_DMA_IRQHandler+0x1f4>)
8005cac: 4293 cmp r3, r2
8005cae: d022 beq.n 8005cf6 <HAL_DMA_IRQHandler+0x162>
8005cb0: 687b ldr r3, [r7, #4]
8005cb2: 681b ldr r3, [r3, #0]
8005cb4: 4a35 ldr r2, [pc, #212] @ (8005d8c <HAL_DMA_IRQHandler+0x1f8>)
8005cb6: 4293 cmp r3, r2
8005cb8: d01a beq.n 8005cf0 <HAL_DMA_IRQHandler+0x15c>
8005cba: 687b ldr r3, [r7, #4]
8005cbc: 681b ldr r3, [r3, #0]
8005cbe: 4a34 ldr r2, [pc, #208] @ (8005d90 <HAL_DMA_IRQHandler+0x1fc>)
8005cc0: 4293 cmp r3, r2
8005cc2: d012 beq.n 8005cea <HAL_DMA_IRQHandler+0x156>
8005cc4: 687b ldr r3, [r7, #4]
8005cc6: 681b ldr r3, [r3, #0]
8005cc8: 4a32 ldr r2, [pc, #200] @ (8005d94 <HAL_DMA_IRQHandler+0x200>)
8005cca: 4293 cmp r3, r2
8005ccc: d00a beq.n 8005ce4 <HAL_DMA_IRQHandler+0x150>
8005cce: 687b ldr r3, [r7, #4]
8005cd0: 681b ldr r3, [r3, #0]
8005cd2: 4a31 ldr r2, [pc, #196] @ (8005d98 <HAL_DMA_IRQHandler+0x204>)
8005cd4: 4293 cmp r3, r2
8005cd6: d102 bne.n 8005cde <HAL_DMA_IRQHandler+0x14a>
8005cd8: f44f 1300 mov.w r3, #2097152 @ 0x200000
8005cdc: e00e b.n 8005cfc <HAL_DMA_IRQHandler+0x168>
8005cde: f04f 7300 mov.w r3, #33554432 @ 0x2000000
8005ce2: e00b b.n 8005cfc <HAL_DMA_IRQHandler+0x168>
8005ce4: f44f 3300 mov.w r3, #131072 @ 0x20000
8005ce8: e008 b.n 8005cfc <HAL_DMA_IRQHandler+0x168>
8005cea: f44f 5300 mov.w r3, #8192 @ 0x2000
8005cee: e005 b.n 8005cfc <HAL_DMA_IRQHandler+0x168>
8005cf0: f44f 7300 mov.w r3, #512 @ 0x200
8005cf4: e002 b.n 8005cfc <HAL_DMA_IRQHandler+0x168>
8005cf6: 2320 movs r3, #32
8005cf8: e000 b.n 8005cfc <HAL_DMA_IRQHandler+0x168>
8005cfa: 2302 movs r3, #2
8005cfc: 4a27 ldr r2, [pc, #156] @ (8005d9c <HAL_DMA_IRQHandler+0x208>)
8005cfe: 6053 str r3, [r2, #4]
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005d00: 687b ldr r3, [r7, #4]
8005d02: 2200 movs r2, #0
8005d04: f883 2020 strb.w r2, [r3, #32]
if(hdma->XferCpltCallback != NULL)
8005d08: 687b ldr r3, [r7, #4]
8005d0a: 6a9b ldr r3, [r3, #40] @ 0x28
8005d0c: 2b00 cmp r3, #0
8005d0e: d034 beq.n 8005d7a <HAL_DMA_IRQHandler+0x1e6>
{
/* Transfer complete callback */
hdma->XferCpltCallback(hdma);
8005d10: 687b ldr r3, [r7, #4]
8005d12: 6a9b ldr r3, [r3, #40] @ 0x28
8005d14: 6878 ldr r0, [r7, #4]
8005d16: 4798 blx r3
if(hdma->XferCpltCallback != NULL)
8005d18: e02f b.n 8005d7a <HAL_DMA_IRQHandler+0x1e6>
}
}
/* Transfer Error Interrupt management **************************************/
else if (( RESET != (flag_it & (DMA_FLAG_TE1 << hdma->ChannelIndex))) && (RESET != (source_it & DMA_IT_TE)))
8005d1a: 687b ldr r3, [r7, #4]
8005d1c: 6c1b ldr r3, [r3, #64] @ 0x40
8005d1e: 2208 movs r2, #8
8005d20: 409a lsls r2, r3
8005d22: 68fb ldr r3, [r7, #12]
8005d24: 4013 ands r3, r2
8005d26: 2b00 cmp r3, #0
8005d28: d028 beq.n 8005d7c <HAL_DMA_IRQHandler+0x1e8>
8005d2a: 68bb ldr r3, [r7, #8]
8005d2c: f003 0308 and.w r3, r3, #8
8005d30: 2b00 cmp r3, #0
8005d32: d023 beq.n 8005d7c <HAL_DMA_IRQHandler+0x1e8>
{
/* When a DMA transfer error occurs */
/* A hardware clear of its EN bits is performed */
/* Disable ALL DMA IT */
__HAL_DMA_DISABLE_IT(hdma, (DMA_IT_TC | DMA_IT_HT | DMA_IT_TE));
8005d34: 687b ldr r3, [r7, #4]
8005d36: 681b ldr r3, [r3, #0]
8005d38: 681a ldr r2, [r3, #0]
8005d3a: 687b ldr r3, [r7, #4]
8005d3c: 681b ldr r3, [r3, #0]
8005d3e: f022 020e bic.w r2, r2, #14
8005d42: 601a str r2, [r3, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8005d44: 687b ldr r3, [r7, #4]
8005d46: 6c1a ldr r2, [r3, #64] @ 0x40
8005d48: 687b ldr r3, [r7, #4]
8005d4a: 6bdb ldr r3, [r3, #60] @ 0x3c
8005d4c: 2101 movs r1, #1
8005d4e: fa01 f202 lsl.w r2, r1, r2
8005d52: 605a str r2, [r3, #4]
/* Update error code */
hdma->ErrorCode = HAL_DMA_ERROR_TE;
8005d54: 687b ldr r3, [r7, #4]
8005d56: 2201 movs r2, #1
8005d58: 639a str r2, [r3, #56] @ 0x38
/* Change the DMA state */
hdma->State = HAL_DMA_STATE_READY;
8005d5a: 687b ldr r3, [r7, #4]
8005d5c: 2201 movs r2, #1
8005d5e: f883 2021 strb.w r2, [r3, #33] @ 0x21
/* Process Unlocked */
__HAL_UNLOCK(hdma);
8005d62: 687b ldr r3, [r7, #4]
8005d64: 2200 movs r2, #0
8005d66: f883 2020 strb.w r2, [r3, #32]
if (hdma->XferErrorCallback != NULL)
8005d6a: 687b ldr r3, [r7, #4]
8005d6c: 6b1b ldr r3, [r3, #48] @ 0x30
8005d6e: 2b00 cmp r3, #0
8005d70: d004 beq.n 8005d7c <HAL_DMA_IRQHandler+0x1e8>
{
/* Transfer error callback */
hdma->XferErrorCallback(hdma);
8005d72: 687b ldr r3, [r7, #4]
8005d74: 6b1b ldr r3, [r3, #48] @ 0x30
8005d76: 6878 ldr r0, [r7, #4]
8005d78: 4798 blx r3
}
}
return;
8005d7a: bf00 nop
8005d7c: bf00 nop
}
8005d7e: 3710 adds r7, #16
8005d80: 46bd mov sp, r7
8005d82: bd80 pop {r7, pc}
8005d84: 40020008 .word 0x40020008
8005d88: 4002001c .word 0x4002001c
8005d8c: 40020030 .word 0x40020030
8005d90: 40020044 .word 0x40020044
8005d94: 40020058 .word 0x40020058
8005d98: 4002006c .word 0x4002006c
8005d9c: 40020000 .word 0x40020000
08005da0 <DMA_SetConfig>:
* @param DstAddress: The destination memory Buffer address
* @param DataLength: The length of data to be transferred from source to destination
* @retval HAL status
*/
static void DMA_SetConfig(DMA_HandleTypeDef *hdma, uint32_t SrcAddress, uint32_t DstAddress, uint32_t DataLength)
{
8005da0: b480 push {r7}
8005da2: b085 sub sp, #20
8005da4: af00 add r7, sp, #0
8005da6: 60f8 str r0, [r7, #12]
8005da8: 60b9 str r1, [r7, #8]
8005daa: 607a str r2, [r7, #4]
8005dac: 603b str r3, [r7, #0]
/* Clear all flags */
hdma->DmaBaseAddress->IFCR = (DMA_ISR_GIF1 << hdma->ChannelIndex);
8005dae: 68fb ldr r3, [r7, #12]
8005db0: 6c1a ldr r2, [r3, #64] @ 0x40
8005db2: 68fb ldr r3, [r7, #12]
8005db4: 6bdb ldr r3, [r3, #60] @ 0x3c
8005db6: 2101 movs r1, #1
8005db8: fa01 f202 lsl.w r2, r1, r2
8005dbc: 605a str r2, [r3, #4]
/* Configure DMA Channel data length */
hdma->Instance->CNDTR = DataLength;
8005dbe: 68fb ldr r3, [r7, #12]
8005dc0: 681b ldr r3, [r3, #0]
8005dc2: 683a ldr r2, [r7, #0]
8005dc4: 605a str r2, [r3, #4]
/* Memory to Peripheral */
if((hdma->Init.Direction) == DMA_MEMORY_TO_PERIPH)
8005dc6: 68fb ldr r3, [r7, #12]
8005dc8: 685b ldr r3, [r3, #4]
8005dca: 2b10 cmp r3, #16
8005dcc: d108 bne.n 8005de0 <DMA_SetConfig+0x40>
{
/* Configure DMA Channel destination address */
hdma->Instance->CPAR = DstAddress;
8005dce: 68fb ldr r3, [r7, #12]
8005dd0: 681b ldr r3, [r3, #0]
8005dd2: 687a ldr r2, [r7, #4]
8005dd4: 609a str r2, [r3, #8]
/* Configure DMA Channel source address */
hdma->Instance->CMAR = SrcAddress;
8005dd6: 68fb ldr r3, [r7, #12]
8005dd8: 681b ldr r3, [r3, #0]
8005dda: 68ba ldr r2, [r7, #8]
8005ddc: 60da str r2, [r3, #12]
hdma->Instance->CPAR = SrcAddress;
/* Configure DMA Channel destination address */
hdma->Instance->CMAR = DstAddress;
}
}
8005dde: e007 b.n 8005df0 <DMA_SetConfig+0x50>
hdma->Instance->CPAR = SrcAddress;
8005de0: 68fb ldr r3, [r7, #12]
8005de2: 681b ldr r3, [r3, #0]
8005de4: 68ba ldr r2, [r7, #8]
8005de6: 609a str r2, [r3, #8]
hdma->Instance->CMAR = DstAddress;
8005de8: 68fb ldr r3, [r7, #12]
8005dea: 681b ldr r3, [r3, #0]
8005dec: 687a ldr r2, [r7, #4]
8005dee: 60da str r2, [r3, #12]
}
8005df0: bf00 nop
8005df2: 3714 adds r7, #20
8005df4: 46bd mov sp, r7
8005df6: bc80 pop {r7}
8005df8: 4770 bx lr
...
08005dfc <HAL_FLASH_Program>:
* @param Data: Specifies the data to be programmed
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Program(uint32_t TypeProgram, uint32_t Address, uint64_t Data)
{
8005dfc: b5f0 push {r4, r5, r6, r7, lr}
8005dfe: b087 sub sp, #28
8005e00: af00 add r7, sp, #0
8005e02: 60f8 str r0, [r7, #12]
8005e04: 60b9 str r1, [r7, #8]
8005e06: e9c7 2300 strd r2, r3, [r7]
HAL_StatusTypeDef status = HAL_ERROR;
8005e0a: 2301 movs r3, #1
8005e0c: 75fb strb r3, [r7, #23]
uint8_t index = 0;
8005e0e: 2300 movs r3, #0
8005e10: 75bb strb r3, [r7, #22]
uint8_t nbiterations = 0;
8005e12: 2300 movs r3, #0
8005e14: 757b strb r3, [r7, #21]
/* Process Locked */
__HAL_LOCK(&pFlash);
8005e16: 4b2f ldr r3, [pc, #188] @ (8005ed4 <HAL_FLASH_Program+0xd8>)
8005e18: 7e1b ldrb r3, [r3, #24]
8005e1a: 2b01 cmp r3, #1
8005e1c: d101 bne.n 8005e22 <HAL_FLASH_Program+0x26>
8005e1e: 2302 movs r3, #2
8005e20: e054 b.n 8005ecc <HAL_FLASH_Program+0xd0>
8005e22: 4b2c ldr r3, [pc, #176] @ (8005ed4 <HAL_FLASH_Program+0xd8>)
8005e24: 2201 movs r2, #1
8005e26: 761a strb r2, [r3, #24]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8005e28: f24c 3050 movw r0, #50000 @ 0xc350
8005e2c: f000 f8a8 bl 8005f80 <FLASH_WaitForLastOperation>
8005e30: 4603 mov r3, r0
8005e32: 75fb strb r3, [r7, #23]
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperationBank2(FLASH_TIMEOUT_VALUE);
}
#endif /* FLASH_BANK2_END */
if(status == HAL_OK)
8005e34: 7dfb ldrb r3, [r7, #23]
8005e36: 2b00 cmp r3, #0
8005e38: d144 bne.n 8005ec4 <HAL_FLASH_Program+0xc8>
{
if(TypeProgram == FLASH_TYPEPROGRAM_HALFWORD)
8005e3a: 68fb ldr r3, [r7, #12]
8005e3c: 2b01 cmp r3, #1
8005e3e: d102 bne.n 8005e46 <HAL_FLASH_Program+0x4a>
{
/* Program halfword (16-bit) at a specified address. */
nbiterations = 1U;
8005e40: 2301 movs r3, #1
8005e42: 757b strb r3, [r7, #21]
8005e44: e007 b.n 8005e56 <HAL_FLASH_Program+0x5a>
}
else if(TypeProgram == FLASH_TYPEPROGRAM_WORD)
8005e46: 68fb ldr r3, [r7, #12]
8005e48: 2b02 cmp r3, #2
8005e4a: d102 bne.n 8005e52 <HAL_FLASH_Program+0x56>
{
/* Program word (32-bit = 2*16-bit) at a specified address. */
nbiterations = 2U;
8005e4c: 2302 movs r3, #2
8005e4e: 757b strb r3, [r7, #21]
8005e50: e001 b.n 8005e56 <HAL_FLASH_Program+0x5a>
}
else
{
/* Program double word (64-bit = 4*16-bit) at a specified address. */
nbiterations = 4U;
8005e52: 2304 movs r3, #4
8005e54: 757b strb r3, [r7, #21]
}
for (index = 0U; index < nbiterations; index++)
8005e56: 2300 movs r3, #0
8005e58: 75bb strb r3, [r7, #22]
8005e5a: e02d b.n 8005eb8 <HAL_FLASH_Program+0xbc>
{
FLASH_Program_HalfWord((Address + (2U*index)), (uint16_t)(Data >> (16U*index)));
8005e5c: 7dbb ldrb r3, [r7, #22]
8005e5e: 005a lsls r2, r3, #1
8005e60: 68bb ldr r3, [r7, #8]
8005e62: eb02 0c03 add.w ip, r2, r3
8005e66: 7dbb ldrb r3, [r7, #22]
8005e68: 0119 lsls r1, r3, #4
8005e6a: e9d7 2300 ldrd r2, r3, [r7]
8005e6e: f1c1 0620 rsb r6, r1, #32
8005e72: f1a1 0020 sub.w r0, r1, #32
8005e76: fa22 f401 lsr.w r4, r2, r1
8005e7a: fa03 f606 lsl.w r6, r3, r6
8005e7e: 4334 orrs r4, r6
8005e80: fa23 f000 lsr.w r0, r3, r0
8005e84: 4304 orrs r4, r0
8005e86: fa23 f501 lsr.w r5, r3, r1
8005e8a: b2a3 uxth r3, r4
8005e8c: 4619 mov r1, r3
8005e8e: 4660 mov r0, ip
8005e90: f000 f85a bl 8005f48 <FLASH_Program_HalfWord>
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation(FLASH_TIMEOUT_VALUE);
8005e94: f24c 3050 movw r0, #50000 @ 0xc350
8005e98: f000 f872 bl 8005f80 <FLASH_WaitForLastOperation>
8005e9c: 4603 mov r3, r0
8005e9e: 75fb strb r3, [r7, #23]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PG);
8005ea0: 4b0d ldr r3, [pc, #52] @ (8005ed8 <HAL_FLASH_Program+0xdc>)
8005ea2: 691b ldr r3, [r3, #16]
8005ea4: 4a0c ldr r2, [pc, #48] @ (8005ed8 <HAL_FLASH_Program+0xdc>)
8005ea6: f023 0301 bic.w r3, r3, #1
8005eaa: 6113 str r3, [r2, #16]
/* If the program operation is completed, disable the PG Bit */
CLEAR_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* In case of error, stop programation procedure */
if (status != HAL_OK)
8005eac: 7dfb ldrb r3, [r7, #23]
8005eae: 2b00 cmp r3, #0
8005eb0: d107 bne.n 8005ec2 <HAL_FLASH_Program+0xc6>
for (index = 0U; index < nbiterations; index++)
8005eb2: 7dbb ldrb r3, [r7, #22]
8005eb4: 3301 adds r3, #1
8005eb6: 75bb strb r3, [r7, #22]
8005eb8: 7dba ldrb r2, [r7, #22]
8005eba: 7d7b ldrb r3, [r7, #21]
8005ebc: 429a cmp r2, r3
8005ebe: d3cd bcc.n 8005e5c <HAL_FLASH_Program+0x60>
8005ec0: e000 b.n 8005ec4 <HAL_FLASH_Program+0xc8>
{
break;
8005ec2: bf00 nop
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
8005ec4: 4b03 ldr r3, [pc, #12] @ (8005ed4 <HAL_FLASH_Program+0xd8>)
8005ec6: 2200 movs r2, #0
8005ec8: 761a strb r2, [r3, #24]
return status;
8005eca: 7dfb ldrb r3, [r7, #23]
}
8005ecc: 4618 mov r0, r3
8005ece: 371c adds r7, #28
8005ed0: 46bd mov sp, r7
8005ed2: bdf0 pop {r4, r5, r6, r7, pc}
8005ed4: 20000478 .word 0x20000478
8005ed8: 40022000 .word 0x40022000
08005edc <HAL_FLASH_Unlock>:
/**
* @brief Unlock the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Unlock(void)
{
8005edc: b480 push {r7}
8005ede: b083 sub sp, #12
8005ee0: af00 add r7, sp, #0
HAL_StatusTypeDef status = HAL_OK;
8005ee2: 2300 movs r3, #0
8005ee4: 71fb strb r3, [r7, #7]
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8005ee6: 4b0d ldr r3, [pc, #52] @ (8005f1c <HAL_FLASH_Unlock+0x40>)
8005ee8: 691b ldr r3, [r3, #16]
8005eea: f003 0380 and.w r3, r3, #128 @ 0x80
8005eee: 2b00 cmp r3, #0
8005ef0: d00d beq.n 8005f0e <HAL_FLASH_Unlock+0x32>
{
/* Authorize the FLASH Registers access */
WRITE_REG(FLASH->KEYR, FLASH_KEY1);
8005ef2: 4b0a ldr r3, [pc, #40] @ (8005f1c <HAL_FLASH_Unlock+0x40>)
8005ef4: 4a0a ldr r2, [pc, #40] @ (8005f20 <HAL_FLASH_Unlock+0x44>)
8005ef6: 605a str r2, [r3, #4]
WRITE_REG(FLASH->KEYR, FLASH_KEY2);
8005ef8: 4b08 ldr r3, [pc, #32] @ (8005f1c <HAL_FLASH_Unlock+0x40>)
8005efa: 4a0a ldr r2, [pc, #40] @ (8005f24 <HAL_FLASH_Unlock+0x48>)
8005efc: 605a str r2, [r3, #4]
/* Verify Flash is unlocked */
if(READ_BIT(FLASH->CR, FLASH_CR_LOCK) != RESET)
8005efe: 4b07 ldr r3, [pc, #28] @ (8005f1c <HAL_FLASH_Unlock+0x40>)
8005f00: 691b ldr r3, [r3, #16]
8005f02: f003 0380 and.w r3, r3, #128 @ 0x80
8005f06: 2b00 cmp r3, #0
8005f08: d001 beq.n 8005f0e <HAL_FLASH_Unlock+0x32>
{
status = HAL_ERROR;
8005f0a: 2301 movs r3, #1
8005f0c: 71fb strb r3, [r7, #7]
status = HAL_ERROR;
}
}
#endif /* FLASH_BANK2_END */
return status;
8005f0e: 79fb ldrb r3, [r7, #7]
}
8005f10: 4618 mov r0, r3
8005f12: 370c adds r7, #12
8005f14: 46bd mov sp, r7
8005f16: bc80 pop {r7}
8005f18: 4770 bx lr
8005f1a: bf00 nop
8005f1c: 40022000 .word 0x40022000
8005f20: 45670123 .word 0x45670123
8005f24: cdef89ab .word 0xcdef89ab
08005f28 <HAL_FLASH_Lock>:
/**
* @brief Locks the FLASH control register access
* @retval HAL Status
*/
HAL_StatusTypeDef HAL_FLASH_Lock(void)
{
8005f28: b480 push {r7}
8005f2a: af00 add r7, sp, #0
/* Set the LOCK Bit to lock the FLASH Registers access */
SET_BIT(FLASH->CR, FLASH_CR_LOCK);
8005f2c: 4b05 ldr r3, [pc, #20] @ (8005f44 <HAL_FLASH_Lock+0x1c>)
8005f2e: 691b ldr r3, [r3, #16]
8005f30: 4a04 ldr r2, [pc, #16] @ (8005f44 <HAL_FLASH_Lock+0x1c>)
8005f32: f043 0380 orr.w r3, r3, #128 @ 0x80
8005f36: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
/* Set the LOCK Bit to lock the FLASH BANK2 Registers access */
SET_BIT(FLASH->CR2, FLASH_CR2_LOCK);
#endif /* FLASH_BANK2_END */
return HAL_OK;
8005f38: 2300 movs r3, #0
}
8005f3a: 4618 mov r0, r3
8005f3c: 46bd mov sp, r7
8005f3e: bc80 pop {r7}
8005f40: 4770 bx lr
8005f42: bf00 nop
8005f44: 40022000 .word 0x40022000
08005f48 <FLASH_Program_HalfWord>:
* @param Address specify the address to be programmed.
* @param Data specify the data to be programmed.
* @retval None
*/
static void FLASH_Program_HalfWord(uint32_t Address, uint16_t Data)
{
8005f48: b480 push {r7}
8005f4a: b083 sub sp, #12
8005f4c: af00 add r7, sp, #0
8005f4e: 6078 str r0, [r7, #4]
8005f50: 460b mov r3, r1
8005f52: 807b strh r3, [r7, #2]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
8005f54: 4b08 ldr r3, [pc, #32] @ (8005f78 <FLASH_Program_HalfWord+0x30>)
8005f56: 2200 movs r2, #0
8005f58: 61da str r2, [r3, #28]
#if defined(FLASH_BANK2_END)
if(Address <= FLASH_BANK1_END)
{
#endif /* FLASH_BANK2_END */
/* Proceed to program the new data */
SET_BIT(FLASH->CR, FLASH_CR_PG);
8005f5a: 4b08 ldr r3, [pc, #32] @ (8005f7c <FLASH_Program_HalfWord+0x34>)
8005f5c: 691b ldr r3, [r3, #16]
8005f5e: 4a07 ldr r2, [pc, #28] @ (8005f7c <FLASH_Program_HalfWord+0x34>)
8005f60: f043 0301 orr.w r3, r3, #1
8005f64: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR2, FLASH_CR2_PG);
}
#endif /* FLASH_BANK2_END */
/* Write data in the address */
*(__IO uint16_t*)Address = Data;
8005f66: 687b ldr r3, [r7, #4]
8005f68: 887a ldrh r2, [r7, #2]
8005f6a: 801a strh r2, [r3, #0]
}
8005f6c: bf00 nop
8005f6e: 370c adds r7, #12
8005f70: 46bd mov sp, r7
8005f72: bc80 pop {r7}
8005f74: 4770 bx lr
8005f76: bf00 nop
8005f78: 20000478 .word 0x20000478
8005f7c: 40022000 .word 0x40022000
08005f80 <FLASH_WaitForLastOperation>:
* @brief Wait for a FLASH operation to complete.
* @param Timeout maximum flash operation timeout
* @retval HAL Status
*/
HAL_StatusTypeDef FLASH_WaitForLastOperation(uint32_t Timeout)
{
8005f80: b580 push {r7, lr}
8005f82: b084 sub sp, #16
8005f84: af00 add r7, sp, #0
8005f86: 6078 str r0, [r7, #4]
/* Wait for the FLASH operation to complete by polling on BUSY flag to be reset.
Even if the FLASH operation fails, the BUSY flag will be reset and an error
flag will be set */
uint32_t tickstart = HAL_GetTick();
8005f88: f7ff f860 bl 800504c <HAL_GetTick>
8005f8c: 60f8 str r0, [r7, #12]
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
8005f8e: e010 b.n 8005fb2 <FLASH_WaitForLastOperation+0x32>
{
if (Timeout != HAL_MAX_DELAY)
8005f90: 687b ldr r3, [r7, #4]
8005f92: f1b3 3fff cmp.w r3, #4294967295
8005f96: d00c beq.n 8005fb2 <FLASH_WaitForLastOperation+0x32>
{
if((Timeout == 0U) || ((HAL_GetTick()-tickstart) > Timeout))
8005f98: 687b ldr r3, [r7, #4]
8005f9a: 2b00 cmp r3, #0
8005f9c: d007 beq.n 8005fae <FLASH_WaitForLastOperation+0x2e>
8005f9e: f7ff f855 bl 800504c <HAL_GetTick>
8005fa2: 4602 mov r2, r0
8005fa4: 68fb ldr r3, [r7, #12]
8005fa6: 1ad3 subs r3, r2, r3
8005fa8: 687a ldr r2, [r7, #4]
8005faa: 429a cmp r2, r3
8005fac: d201 bcs.n 8005fb2 <FLASH_WaitForLastOperation+0x32>
{
return HAL_TIMEOUT;
8005fae: 2303 movs r3, #3
8005fb0: e025 b.n 8005ffe <FLASH_WaitForLastOperation+0x7e>
while(__HAL_FLASH_GET_FLAG(FLASH_FLAG_BSY))
8005fb2: 4b15 ldr r3, [pc, #84] @ (8006008 <FLASH_WaitForLastOperation+0x88>)
8005fb4: 68db ldr r3, [r3, #12]
8005fb6: f003 0301 and.w r3, r3, #1
8005fba: 2b00 cmp r3, #0
8005fbc: d1e8 bne.n 8005f90 <FLASH_WaitForLastOperation+0x10>
}
}
}
/* Check FLASH End of Operation flag */
if (__HAL_FLASH_GET_FLAG(FLASH_FLAG_EOP))
8005fbe: 4b12 ldr r3, [pc, #72] @ (8006008 <FLASH_WaitForLastOperation+0x88>)
8005fc0: 68db ldr r3, [r3, #12]
8005fc2: f003 0320 and.w r3, r3, #32
8005fc6: 2b00 cmp r3, #0
8005fc8: d002 beq.n 8005fd0 <FLASH_WaitForLastOperation+0x50>
{
/* Clear FLASH End of Operation pending bit */
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP);
8005fca: 4b0f ldr r3, [pc, #60] @ (8006008 <FLASH_WaitForLastOperation+0x88>)
8005fcc: 2220 movs r2, #32
8005fce: 60da str r2, [r3, #12]
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8005fd0: 4b0d ldr r3, [pc, #52] @ (8006008 <FLASH_WaitForLastOperation+0x88>)
8005fd2: 68db ldr r3, [r3, #12]
8005fd4: f003 0310 and.w r3, r3, #16
8005fd8: 2b00 cmp r3, #0
8005fda: d10b bne.n 8005ff4 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8005fdc: 4b0a ldr r3, [pc, #40] @ (8006008 <FLASH_WaitForLastOperation+0x88>)
8005fde: 69db ldr r3, [r3, #28]
8005fe0: f003 0301 and.w r3, r3, #1
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) ||
8005fe4: 2b00 cmp r3, #0
8005fe6: d105 bne.n 8005ff4 <FLASH_WaitForLastOperation+0x74>
__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8005fe8: 4b07 ldr r3, [pc, #28] @ (8006008 <FLASH_WaitForLastOperation+0x88>)
8005fea: 68db ldr r3, [r3, #12]
8005fec: f003 0304 and.w r3, r3, #4
__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR) ||
8005ff0: 2b00 cmp r3, #0
8005ff2: d003 beq.n 8005ffc <FLASH_WaitForLastOperation+0x7c>
{
/*Save the error code*/
FLASH_SetErrorCode();
8005ff4: f000 f80a bl 800600c <FLASH_SetErrorCode>
return HAL_ERROR;
8005ff8: 2301 movs r3, #1
8005ffa: e000 b.n 8005ffe <FLASH_WaitForLastOperation+0x7e>
}
/* There is no error flag set */
return HAL_OK;
8005ffc: 2300 movs r3, #0
}
8005ffe: 4618 mov r0, r3
8006000: 3710 adds r7, #16
8006002: 46bd mov sp, r7
8006004: bd80 pop {r7, pc}
8006006: bf00 nop
8006008: 40022000 .word 0x40022000
0800600c <FLASH_SetErrorCode>:
/**
* @brief Set the specific FLASH error flag.
* @retval None
*/
static void FLASH_SetErrorCode(void)
{
800600c: b480 push {r7}
800600e: b083 sub sp, #12
8006010: af00 add r7, sp, #0
uint32_t flags = 0U;
8006012: 2300 movs r3, #0
8006014: 607b str r3, [r7, #4]
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_WRPERR))
8006016: 4b23 ldr r3, [pc, #140] @ (80060a4 <FLASH_SetErrorCode+0x98>)
8006018: 68db ldr r3, [r3, #12]
800601a: f003 0310 and.w r3, r3, #16
800601e: 2b00 cmp r3, #0
8006020: d009 beq.n 8006036 <FLASH_SetErrorCode+0x2a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_WRP;
8006022: 4b21 ldr r3, [pc, #132] @ (80060a8 <FLASH_SetErrorCode+0x9c>)
8006024: 69db ldr r3, [r3, #28]
8006026: f043 0302 orr.w r3, r3, #2
800602a: 4a1f ldr r2, [pc, #124] @ (80060a8 <FLASH_SetErrorCode+0x9c>)
800602c: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_WRPERR | FLASH_FLAG_WRPERR_BANK2;
#else
flags |= FLASH_FLAG_WRPERR;
800602e: 687b ldr r3, [r7, #4]
8006030: f043 0310 orr.w r3, r3, #16
8006034: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
#if defined(FLASH_BANK2_END)
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR) || __HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR_BANK2))
#else
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_PGERR))
8006036: 4b1b ldr r3, [pc, #108] @ (80060a4 <FLASH_SetErrorCode+0x98>)
8006038: 68db ldr r3, [r3, #12]
800603a: f003 0304 and.w r3, r3, #4
800603e: 2b00 cmp r3, #0
8006040: d009 beq.n 8006056 <FLASH_SetErrorCode+0x4a>
#endif /* FLASH_BANK2_END */
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_PROG;
8006042: 4b19 ldr r3, [pc, #100] @ (80060a8 <FLASH_SetErrorCode+0x9c>)
8006044: 69db ldr r3, [r3, #28]
8006046: f043 0301 orr.w r3, r3, #1
800604a: 4a17 ldr r2, [pc, #92] @ (80060a8 <FLASH_SetErrorCode+0x9c>)
800604c: 61d3 str r3, [r2, #28]
#if defined(FLASH_BANK2_END)
flags |= FLASH_FLAG_PGERR | FLASH_FLAG_PGERR_BANK2;
#else
flags |= FLASH_FLAG_PGERR;
800604e: 687b ldr r3, [r7, #4]
8006050: f043 0304 orr.w r3, r3, #4
8006054: 607b str r3, [r7, #4]
#endif /* FLASH_BANK2_END */
}
if(__HAL_FLASH_GET_FLAG(FLASH_FLAG_OPTVERR))
8006056: 4b13 ldr r3, [pc, #76] @ (80060a4 <FLASH_SetErrorCode+0x98>)
8006058: 69db ldr r3, [r3, #28]
800605a: f003 0301 and.w r3, r3, #1
800605e: 2b00 cmp r3, #0
8006060: d00b beq.n 800607a <FLASH_SetErrorCode+0x6e>
{
pFlash.ErrorCode |= HAL_FLASH_ERROR_OPTV;
8006062: 4b11 ldr r3, [pc, #68] @ (80060a8 <FLASH_SetErrorCode+0x9c>)
8006064: 69db ldr r3, [r3, #28]
8006066: f043 0304 orr.w r3, r3, #4
800606a: 4a0f ldr r2, [pc, #60] @ (80060a8 <FLASH_SetErrorCode+0x9c>)
800606c: 61d3 str r3, [r2, #28]
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_OPTVERR);
800606e: 4b0d ldr r3, [pc, #52] @ (80060a4 <FLASH_SetErrorCode+0x98>)
8006070: 69db ldr r3, [r3, #28]
8006072: 4a0c ldr r2, [pc, #48] @ (80060a4 <FLASH_SetErrorCode+0x98>)
8006074: f023 0301 bic.w r3, r3, #1
8006078: 61d3 str r3, [r2, #28]
}
/* Clear FLASH error pending bits */
__HAL_FLASH_CLEAR_FLAG(flags);
800607a: 687b ldr r3, [r7, #4]
800607c: f240 1201 movw r2, #257 @ 0x101
8006080: 4293 cmp r3, r2
8006082: d106 bne.n 8006092 <FLASH_SetErrorCode+0x86>
8006084: 4b07 ldr r3, [pc, #28] @ (80060a4 <FLASH_SetErrorCode+0x98>)
8006086: 69db ldr r3, [r3, #28]
8006088: 4a06 ldr r2, [pc, #24] @ (80060a4 <FLASH_SetErrorCode+0x98>)
800608a: f023 0301 bic.w r3, r3, #1
800608e: 61d3 str r3, [r2, #28]
}
8006090: e002 b.n 8006098 <FLASH_SetErrorCode+0x8c>
__HAL_FLASH_CLEAR_FLAG(flags);
8006092: 4a04 ldr r2, [pc, #16] @ (80060a4 <FLASH_SetErrorCode+0x98>)
8006094: 687b ldr r3, [r7, #4]
8006096: 60d3 str r3, [r2, #12]
}
8006098: bf00 nop
800609a: 370c adds r7, #12
800609c: 46bd mov sp, r7
800609e: bc80 pop {r7}
80060a0: 4770 bx lr
80060a2: bf00 nop
80060a4: 40022000 .word 0x40022000
80060a8: 20000478 .word 0x20000478
080060ac <HAL_FLASHEx_Erase>:
* (0xFFFFFFFF means that all the pages have been correctly erased)
*
* @retval HAL_StatusTypeDef HAL Status
*/
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
{
80060ac: b580 push {r7, lr}
80060ae: b084 sub sp, #16
80060b0: af00 add r7, sp, #0
80060b2: 6078 str r0, [r7, #4]
80060b4: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_ERROR;
80060b6: 2301 movs r3, #1
80060b8: 73fb strb r3, [r7, #15]
uint32_t address = 0U;
80060ba: 2300 movs r3, #0
80060bc: 60bb str r3, [r7, #8]
/* Process Locked */
__HAL_LOCK(&pFlash);
80060be: 4b2f ldr r3, [pc, #188] @ (800617c <HAL_FLASHEx_Erase+0xd0>)
80060c0: 7e1b ldrb r3, [r3, #24]
80060c2: 2b01 cmp r3, #1
80060c4: d101 bne.n 80060ca <HAL_FLASHEx_Erase+0x1e>
80060c6: 2302 movs r3, #2
80060c8: e053 b.n 8006172 <HAL_FLASHEx_Erase+0xc6>
80060ca: 4b2c ldr r3, [pc, #176] @ (800617c <HAL_FLASHEx_Erase+0xd0>)
80060cc: 2201 movs r2, #1
80060ce: 761a strb r2, [r3, #24]
/* Check the parameters */
assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
80060d0: 687b ldr r3, [r7, #4]
80060d2: 681b ldr r3, [r3, #0]
80060d4: 2b02 cmp r3, #2
80060d6: d116 bne.n 8006106 <HAL_FLASHEx_Erase+0x5a>
else
#endif /* FLASH_BANK2_END */
{
/* Mass Erase requested for Bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
80060d8: f24c 3050 movw r0, #50000 @ 0xc350
80060dc: f7ff ff50 bl 8005f80 <FLASH_WaitForLastOperation>
80060e0: 4603 mov r3, r0
80060e2: 2b00 cmp r3, #0
80060e4: d141 bne.n 800616a <HAL_FLASHEx_Erase+0xbe>
{
/*Mass erase to be done*/
FLASH_MassErase(FLASH_BANK_1);
80060e6: 2001 movs r0, #1
80060e8: f000 f84c bl 8006184 <FLASH_MassErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
80060ec: f24c 3050 movw r0, #50000 @ 0xc350
80060f0: f7ff ff46 bl 8005f80 <FLASH_WaitForLastOperation>
80060f4: 4603 mov r3, r0
80060f6: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the MER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
80060f8: 4b21 ldr r3, [pc, #132] @ (8006180 <HAL_FLASHEx_Erase+0xd4>)
80060fa: 691b ldr r3, [r3, #16]
80060fc: 4a20 ldr r2, [pc, #128] @ (8006180 <HAL_FLASHEx_Erase+0xd4>)
80060fe: f023 0304 bic.w r3, r3, #4
8006102: 6113 str r3, [r2, #16]
8006104: e031 b.n 800616a <HAL_FLASHEx_Erase+0xbe>
else
#endif /* FLASH_BANK2_END */
{
/* Page Erase requested on address located on bank1 */
/* Wait for last operation to be completed */
if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
8006106: f24c 3050 movw r0, #50000 @ 0xc350
800610a: f7ff ff39 bl 8005f80 <FLASH_WaitForLastOperation>
800610e: 4603 mov r3, r0
8006110: 2b00 cmp r3, #0
8006112: d12a bne.n 800616a <HAL_FLASHEx_Erase+0xbe>
{
/*Initialization of PageError variable*/
*PageError = 0xFFFFFFFFU;
8006114: 683b ldr r3, [r7, #0]
8006116: f04f 32ff mov.w r2, #4294967295
800611a: 601a str r2, [r3, #0]
/* Erase page by page to be done*/
for(address = pEraseInit->PageAddress;
800611c: 687b ldr r3, [r7, #4]
800611e: 689b ldr r3, [r3, #8]
8006120: 60bb str r3, [r7, #8]
8006122: e019 b.n 8006158 <HAL_FLASHEx_Erase+0xac>
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
address += FLASH_PAGE_SIZE)
{
FLASH_PageErase(address);
8006124: 68b8 ldr r0, [r7, #8]
8006126: f000 f849 bl 80061bc <FLASH_PageErase>
/* Wait for last operation to be completed */
status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
800612a: f24c 3050 movw r0, #50000 @ 0xc350
800612e: f7ff ff27 bl 8005f80 <FLASH_WaitForLastOperation>
8006132: 4603 mov r3, r0
8006134: 73fb strb r3, [r7, #15]
/* If the erase operation is completed, disable the PER Bit */
CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
8006136: 4b12 ldr r3, [pc, #72] @ (8006180 <HAL_FLASHEx_Erase+0xd4>)
8006138: 691b ldr r3, [r3, #16]
800613a: 4a11 ldr r2, [pc, #68] @ (8006180 <HAL_FLASHEx_Erase+0xd4>)
800613c: f023 0302 bic.w r3, r3, #2
8006140: 6113 str r3, [r2, #16]
if (status != HAL_OK)
8006142: 7bfb ldrb r3, [r7, #15]
8006144: 2b00 cmp r3, #0
8006146: d003 beq.n 8006150 <HAL_FLASHEx_Erase+0xa4>
{
/* In case of error, stop erase procedure and return the faulty address */
*PageError = address;
8006148: 683b ldr r3, [r7, #0]
800614a: 68ba ldr r2, [r7, #8]
800614c: 601a str r2, [r3, #0]
break;
800614e: e00c b.n 800616a <HAL_FLASHEx_Erase+0xbe>
address += FLASH_PAGE_SIZE)
8006150: 68bb ldr r3, [r7, #8]
8006152: f503 6380 add.w r3, r3, #1024 @ 0x400
8006156: 60bb str r3, [r7, #8]
address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
8006158: 687b ldr r3, [r7, #4]
800615a: 68db ldr r3, [r3, #12]
800615c: 029a lsls r2, r3, #10
800615e: 687b ldr r3, [r7, #4]
8006160: 689b ldr r3, [r3, #8]
8006162: 4413 add r3, r2
8006164: 68ba ldr r2, [r7, #8]
8006166: 429a cmp r2, r3
8006168: d3dc bcc.n 8006124 <HAL_FLASHEx_Erase+0x78>
}
}
}
/* Process Unlocked */
__HAL_UNLOCK(&pFlash);
800616a: 4b04 ldr r3, [pc, #16] @ (800617c <HAL_FLASHEx_Erase+0xd0>)
800616c: 2200 movs r2, #0
800616e: 761a strb r2, [r3, #24]
return status;
8006170: 7bfb ldrb r3, [r7, #15]
}
8006172: 4618 mov r0, r3
8006174: 3710 adds r7, #16
8006176: 46bd mov sp, r7
8006178: bd80 pop {r7, pc}
800617a: bf00 nop
800617c: 20000478 .word 0x20000478
8006180: 40022000 .word 0x40022000
08006184 <FLASH_MassErase>:
@endif
*
* @retval None
*/
static void FLASH_MassErase(uint32_t Banks)
{
8006184: b480 push {r7}
8006186: b083 sub sp, #12
8006188: af00 add r7, sp, #0
800618a: 6078 str r0, [r7, #4]
/* Check the parameters */
assert_param(IS_FLASH_BANK(Banks));
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
800618c: 4b09 ldr r3, [pc, #36] @ (80061b4 <FLASH_MassErase+0x30>)
800618e: 2200 movs r2, #0
8006190: 61da str r2, [r3, #28]
#if !defined(FLASH_BANK2_END)
/* Prevent unused argument(s) compilation warning */
UNUSED(Banks);
#endif /* FLASH_BANK2_END */
/* Only bank1 will be erased*/
SET_BIT(FLASH->CR, FLASH_CR_MER);
8006192: 4b09 ldr r3, [pc, #36] @ (80061b8 <FLASH_MassErase+0x34>)
8006194: 691b ldr r3, [r3, #16]
8006196: 4a08 ldr r2, [pc, #32] @ (80061b8 <FLASH_MassErase+0x34>)
8006198: f043 0304 orr.w r3, r3, #4
800619c: 6113 str r3, [r2, #16]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
800619e: 4b06 ldr r3, [pc, #24] @ (80061b8 <FLASH_MassErase+0x34>)
80061a0: 691b ldr r3, [r3, #16]
80061a2: 4a05 ldr r2, [pc, #20] @ (80061b8 <FLASH_MassErase+0x34>)
80061a4: f043 0340 orr.w r3, r3, #64 @ 0x40
80061a8: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
80061aa: bf00 nop
80061ac: 370c adds r7, #12
80061ae: 46bd mov sp, r7
80061b0: bc80 pop {r7}
80061b2: 4770 bx lr
80061b4: 20000478 .word 0x20000478
80061b8: 40022000 .word 0x40022000
080061bc <FLASH_PageErase>:
* The value of this parameter depend on device used within the same series
*
* @retval None
*/
void FLASH_PageErase(uint32_t PageAddress)
{
80061bc: b480 push {r7}
80061be: b083 sub sp, #12
80061c0: af00 add r7, sp, #0
80061c2: 6078 str r0, [r7, #4]
/* Clean the error context */
pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
80061c4: 4b0b ldr r3, [pc, #44] @ (80061f4 <FLASH_PageErase+0x38>)
80061c6: 2200 movs r2, #0
80061c8: 61da str r2, [r3, #28]
}
else
{
#endif /* FLASH_BANK2_END */
/* Proceed to erase the page */
SET_BIT(FLASH->CR, FLASH_CR_PER);
80061ca: 4b0b ldr r3, [pc, #44] @ (80061f8 <FLASH_PageErase+0x3c>)
80061cc: 691b ldr r3, [r3, #16]
80061ce: 4a0a ldr r2, [pc, #40] @ (80061f8 <FLASH_PageErase+0x3c>)
80061d0: f043 0302 orr.w r3, r3, #2
80061d4: 6113 str r3, [r2, #16]
WRITE_REG(FLASH->AR, PageAddress);
80061d6: 4a08 ldr r2, [pc, #32] @ (80061f8 <FLASH_PageErase+0x3c>)
80061d8: 687b ldr r3, [r7, #4]
80061da: 6153 str r3, [r2, #20]
SET_BIT(FLASH->CR, FLASH_CR_STRT);
80061dc: 4b06 ldr r3, [pc, #24] @ (80061f8 <FLASH_PageErase+0x3c>)
80061de: 691b ldr r3, [r3, #16]
80061e0: 4a05 ldr r2, [pc, #20] @ (80061f8 <FLASH_PageErase+0x3c>)
80061e2: f043 0340 orr.w r3, r3, #64 @ 0x40
80061e6: 6113 str r3, [r2, #16]
#if defined(FLASH_BANK2_END)
}
#endif /* FLASH_BANK2_END */
}
80061e8: bf00 nop
80061ea: 370c adds r7, #12
80061ec: 46bd mov sp, r7
80061ee: bc80 pop {r7}
80061f0: 4770 bx lr
80061f2: bf00 nop
80061f4: 20000478 .word 0x20000478
80061f8: 40022000 .word 0x40022000
080061fc <HAL_GPIO_Init>:
* @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
* the configuration information for the specified GPIO peripheral.
* @retval None
*/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
{
80061fc: b480 push {r7}
80061fe: b08b sub sp, #44 @ 0x2c
8006200: af00 add r7, sp, #0
8006202: 6078 str r0, [r7, #4]
8006204: 6039 str r1, [r7, #0]
uint32_t position = 0x00u;
8006206: 2300 movs r3, #0
8006208: 627b str r3, [r7, #36] @ 0x24
uint32_t ioposition;
uint32_t iocurrent;
uint32_t temp;
uint32_t config = 0x00u;
800620a: 2300 movs r3, #0
800620c: 623b str r3, [r7, #32]
assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
/* Configure the port pins */
while (((GPIO_Init->Pin) >> position) != 0x00u)
800620e: e169 b.n 80064e4 <HAL_GPIO_Init+0x2e8>
{
/* Get the IO position */
ioposition = (0x01uL << position);
8006210: 2201 movs r2, #1
8006212: 6a7b ldr r3, [r7, #36] @ 0x24
8006214: fa02 f303 lsl.w r3, r2, r3
8006218: 61fb str r3, [r7, #28]
/* Get the current IO position */
iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
800621a: 683b ldr r3, [r7, #0]
800621c: 681b ldr r3, [r3, #0]
800621e: 69fa ldr r2, [r7, #28]
8006220: 4013 ands r3, r2
8006222: 61bb str r3, [r7, #24]
if (iocurrent == ioposition)
8006224: 69ba ldr r2, [r7, #24]
8006226: 69fb ldr r3, [r7, #28]
8006228: 429a cmp r2, r3
800622a: f040 8158 bne.w 80064de <HAL_GPIO_Init+0x2e2>
{
/* Check the Alternate function parameters */
assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
/* Based on the required mode, filling config variable with MODEy[1:0] and CNFy[3:2] corresponding bits */
switch (GPIO_Init->Mode)
800622e: 683b ldr r3, [r7, #0]
8006230: 685b ldr r3, [r3, #4]
8006232: 4a9a ldr r2, [pc, #616] @ (800649c <HAL_GPIO_Init+0x2a0>)
8006234: 4293 cmp r3, r2
8006236: d05e beq.n 80062f6 <HAL_GPIO_Init+0xfa>
8006238: 4a98 ldr r2, [pc, #608] @ (800649c <HAL_GPIO_Init+0x2a0>)
800623a: 4293 cmp r3, r2
800623c: d875 bhi.n 800632a <HAL_GPIO_Init+0x12e>
800623e: 4a98 ldr r2, [pc, #608] @ (80064a0 <HAL_GPIO_Init+0x2a4>)
8006240: 4293 cmp r3, r2
8006242: d058 beq.n 80062f6 <HAL_GPIO_Init+0xfa>
8006244: 4a96 ldr r2, [pc, #600] @ (80064a0 <HAL_GPIO_Init+0x2a4>)
8006246: 4293 cmp r3, r2
8006248: d86f bhi.n 800632a <HAL_GPIO_Init+0x12e>
800624a: 4a96 ldr r2, [pc, #600] @ (80064a4 <HAL_GPIO_Init+0x2a8>)
800624c: 4293 cmp r3, r2
800624e: d052 beq.n 80062f6 <HAL_GPIO_Init+0xfa>
8006250: 4a94 ldr r2, [pc, #592] @ (80064a4 <HAL_GPIO_Init+0x2a8>)
8006252: 4293 cmp r3, r2
8006254: d869 bhi.n 800632a <HAL_GPIO_Init+0x12e>
8006256: 4a94 ldr r2, [pc, #592] @ (80064a8 <HAL_GPIO_Init+0x2ac>)
8006258: 4293 cmp r3, r2
800625a: d04c beq.n 80062f6 <HAL_GPIO_Init+0xfa>
800625c: 4a92 ldr r2, [pc, #584] @ (80064a8 <HAL_GPIO_Init+0x2ac>)
800625e: 4293 cmp r3, r2
8006260: d863 bhi.n 800632a <HAL_GPIO_Init+0x12e>
8006262: 4a92 ldr r2, [pc, #584] @ (80064ac <HAL_GPIO_Init+0x2b0>)
8006264: 4293 cmp r3, r2
8006266: d046 beq.n 80062f6 <HAL_GPIO_Init+0xfa>
8006268: 4a90 ldr r2, [pc, #576] @ (80064ac <HAL_GPIO_Init+0x2b0>)
800626a: 4293 cmp r3, r2
800626c: d85d bhi.n 800632a <HAL_GPIO_Init+0x12e>
800626e: 2b12 cmp r3, #18
8006270: d82a bhi.n 80062c8 <HAL_GPIO_Init+0xcc>
8006272: 2b12 cmp r3, #18
8006274: d859 bhi.n 800632a <HAL_GPIO_Init+0x12e>
8006276: a201 add r2, pc, #4 @ (adr r2, 800627c <HAL_GPIO_Init+0x80>)
8006278: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800627c: 080062f7 .word 0x080062f7
8006280: 080062d1 .word 0x080062d1
8006284: 080062e3 .word 0x080062e3
8006288: 08006325 .word 0x08006325
800628c: 0800632b .word 0x0800632b
8006290: 0800632b .word 0x0800632b
8006294: 0800632b .word 0x0800632b
8006298: 0800632b .word 0x0800632b
800629c: 0800632b .word 0x0800632b
80062a0: 0800632b .word 0x0800632b
80062a4: 0800632b .word 0x0800632b
80062a8: 0800632b .word 0x0800632b
80062ac: 0800632b .word 0x0800632b
80062b0: 0800632b .word 0x0800632b
80062b4: 0800632b .word 0x0800632b
80062b8: 0800632b .word 0x0800632b
80062bc: 0800632b .word 0x0800632b
80062c0: 080062d9 .word 0x080062d9
80062c4: 080062ed .word 0x080062ed
80062c8: 4a79 ldr r2, [pc, #484] @ (80064b0 <HAL_GPIO_Init+0x2b4>)
80062ca: 4293 cmp r3, r2
80062cc: d013 beq.n 80062f6 <HAL_GPIO_Init+0xfa>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
break;
/* Parameters are checked with assert_param */
default:
break;
80062ce: e02c b.n 800632a <HAL_GPIO_Init+0x12e>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_PP;
80062d0: 683b ldr r3, [r7, #0]
80062d2: 68db ldr r3, [r3, #12]
80062d4: 623b str r3, [r7, #32]
break;
80062d6: e029 b.n 800632c <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_GP_OUTPUT_OD;
80062d8: 683b ldr r3, [r7, #0]
80062da: 68db ldr r3, [r3, #12]
80062dc: 3304 adds r3, #4
80062de: 623b str r3, [r7, #32]
break;
80062e0: e024 b.n 800632c <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_PP;
80062e2: 683b ldr r3, [r7, #0]
80062e4: 68db ldr r3, [r3, #12]
80062e6: 3308 adds r3, #8
80062e8: 623b str r3, [r7, #32]
break;
80062ea: e01f b.n 800632c <HAL_GPIO_Init+0x130>
config = GPIO_Init->Speed + GPIO_CR_CNF_AF_OUTPUT_OD;
80062ec: 683b ldr r3, [r7, #0]
80062ee: 68db ldr r3, [r3, #12]
80062f0: 330c adds r3, #12
80062f2: 623b str r3, [r7, #32]
break;
80062f4: e01a b.n 800632c <HAL_GPIO_Init+0x130>
if (GPIO_Init->Pull == GPIO_NOPULL)
80062f6: 683b ldr r3, [r7, #0]
80062f8: 689b ldr r3, [r3, #8]
80062fa: 2b00 cmp r3, #0
80062fc: d102 bne.n 8006304 <HAL_GPIO_Init+0x108>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_FLOATING;
80062fe: 2304 movs r3, #4
8006300: 623b str r3, [r7, #32]
break;
8006302: e013 b.n 800632c <HAL_GPIO_Init+0x130>
else if (GPIO_Init->Pull == GPIO_PULLUP)
8006304: 683b ldr r3, [r7, #0]
8006306: 689b ldr r3, [r3, #8]
8006308: 2b01 cmp r3, #1
800630a: d105 bne.n 8006318 <HAL_GPIO_Init+0x11c>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
800630c: 2308 movs r3, #8
800630e: 623b str r3, [r7, #32]
GPIOx->BSRR = ioposition;
8006310: 687b ldr r3, [r7, #4]
8006312: 69fa ldr r2, [r7, #28]
8006314: 611a str r2, [r3, #16]
break;
8006316: e009 b.n 800632c <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_INPUT_PU_PD;
8006318: 2308 movs r3, #8
800631a: 623b str r3, [r7, #32]
GPIOx->BRR = ioposition;
800631c: 687b ldr r3, [r7, #4]
800631e: 69fa ldr r2, [r7, #28]
8006320: 615a str r2, [r3, #20]
break;
8006322: e003 b.n 800632c <HAL_GPIO_Init+0x130>
config = GPIO_CR_MODE_INPUT + GPIO_CR_CNF_ANALOG;
8006324: 2300 movs r3, #0
8006326: 623b str r3, [r7, #32]
break;
8006328: e000 b.n 800632c <HAL_GPIO_Init+0x130>
break;
800632a: bf00 nop
}
/* Check if the current bit belongs to first half or last half of the pin count number
in order to address CRH or CRL register*/
configregister = (iocurrent < GPIO_PIN_8) ? &GPIOx->CRL : &GPIOx->CRH;
800632c: 69bb ldr r3, [r7, #24]
800632e: 2bff cmp r3, #255 @ 0xff
8006330: d801 bhi.n 8006336 <HAL_GPIO_Init+0x13a>
8006332: 687b ldr r3, [r7, #4]
8006334: e001 b.n 800633a <HAL_GPIO_Init+0x13e>
8006336: 687b ldr r3, [r7, #4]
8006338: 3304 adds r3, #4
800633a: 617b str r3, [r7, #20]
registeroffset = (iocurrent < GPIO_PIN_8) ? (position << 2u) : ((position - 8u) << 2u);
800633c: 69bb ldr r3, [r7, #24]
800633e: 2bff cmp r3, #255 @ 0xff
8006340: d802 bhi.n 8006348 <HAL_GPIO_Init+0x14c>
8006342: 6a7b ldr r3, [r7, #36] @ 0x24
8006344: 009b lsls r3, r3, #2
8006346: e002 b.n 800634e <HAL_GPIO_Init+0x152>
8006348: 6a7b ldr r3, [r7, #36] @ 0x24
800634a: 3b08 subs r3, #8
800634c: 009b lsls r3, r3, #2
800634e: 613b str r3, [r7, #16]
/* Apply the new configuration of the pin to the register */
MODIFY_REG((*configregister), ((GPIO_CRL_MODE0 | GPIO_CRL_CNF0) << registeroffset), (config << registeroffset));
8006350: 697b ldr r3, [r7, #20]
8006352: 681a ldr r2, [r3, #0]
8006354: 210f movs r1, #15
8006356: 693b ldr r3, [r7, #16]
8006358: fa01 f303 lsl.w r3, r1, r3
800635c: 43db mvns r3, r3
800635e: 401a ands r2, r3
8006360: 6a39 ldr r1, [r7, #32]
8006362: 693b ldr r3, [r7, #16]
8006364: fa01 f303 lsl.w r3, r1, r3
8006368: 431a orrs r2, r3
800636a: 697b ldr r3, [r7, #20]
800636c: 601a str r2, [r3, #0]
/*--------------------- EXTI Mode Configuration ------------------------*/
/* Configure the External Interrupt or event for the current IO */
if ((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
800636e: 683b ldr r3, [r7, #0]
8006370: 685b ldr r3, [r3, #4]
8006372: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8006376: 2b00 cmp r3, #0
8006378: f000 80b1 beq.w 80064de <HAL_GPIO_Init+0x2e2>
{
/* Enable AFIO Clock */
__HAL_RCC_AFIO_CLK_ENABLE();
800637c: 4b4d ldr r3, [pc, #308] @ (80064b4 <HAL_GPIO_Init+0x2b8>)
800637e: 699b ldr r3, [r3, #24]
8006380: 4a4c ldr r2, [pc, #304] @ (80064b4 <HAL_GPIO_Init+0x2b8>)
8006382: f043 0301 orr.w r3, r3, #1
8006386: 6193 str r3, [r2, #24]
8006388: 4b4a ldr r3, [pc, #296] @ (80064b4 <HAL_GPIO_Init+0x2b8>)
800638a: 699b ldr r3, [r3, #24]
800638c: f003 0301 and.w r3, r3, #1
8006390: 60bb str r3, [r7, #8]
8006392: 68bb ldr r3, [r7, #8]
temp = AFIO->EXTICR[position >> 2u];
8006394: 4a48 ldr r2, [pc, #288] @ (80064b8 <HAL_GPIO_Init+0x2bc>)
8006396: 6a7b ldr r3, [r7, #36] @ 0x24
8006398: 089b lsrs r3, r3, #2
800639a: 3302 adds r3, #2
800639c: f852 3023 ldr.w r3, [r2, r3, lsl #2]
80063a0: 60fb str r3, [r7, #12]
CLEAR_BIT(temp, (0x0Fu) << (4u * (position & 0x03u)));
80063a2: 6a7b ldr r3, [r7, #36] @ 0x24
80063a4: f003 0303 and.w r3, r3, #3
80063a8: 009b lsls r3, r3, #2
80063aa: 220f movs r2, #15
80063ac: fa02 f303 lsl.w r3, r2, r3
80063b0: 43db mvns r3, r3
80063b2: 68fa ldr r2, [r7, #12]
80063b4: 4013 ands r3, r2
80063b6: 60fb str r3, [r7, #12]
SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4u * (position & 0x03u)));
80063b8: 687b ldr r3, [r7, #4]
80063ba: 4a40 ldr r2, [pc, #256] @ (80064bc <HAL_GPIO_Init+0x2c0>)
80063bc: 4293 cmp r3, r2
80063be: d013 beq.n 80063e8 <HAL_GPIO_Init+0x1ec>
80063c0: 687b ldr r3, [r7, #4]
80063c2: 4a3f ldr r2, [pc, #252] @ (80064c0 <HAL_GPIO_Init+0x2c4>)
80063c4: 4293 cmp r3, r2
80063c6: d00d beq.n 80063e4 <HAL_GPIO_Init+0x1e8>
80063c8: 687b ldr r3, [r7, #4]
80063ca: 4a3e ldr r2, [pc, #248] @ (80064c4 <HAL_GPIO_Init+0x2c8>)
80063cc: 4293 cmp r3, r2
80063ce: d007 beq.n 80063e0 <HAL_GPIO_Init+0x1e4>
80063d0: 687b ldr r3, [r7, #4]
80063d2: 4a3d ldr r2, [pc, #244] @ (80064c8 <HAL_GPIO_Init+0x2cc>)
80063d4: 4293 cmp r3, r2
80063d6: d101 bne.n 80063dc <HAL_GPIO_Init+0x1e0>
80063d8: 2303 movs r3, #3
80063da: e006 b.n 80063ea <HAL_GPIO_Init+0x1ee>
80063dc: 2304 movs r3, #4
80063de: e004 b.n 80063ea <HAL_GPIO_Init+0x1ee>
80063e0: 2302 movs r3, #2
80063e2: e002 b.n 80063ea <HAL_GPIO_Init+0x1ee>
80063e4: 2301 movs r3, #1
80063e6: e000 b.n 80063ea <HAL_GPIO_Init+0x1ee>
80063e8: 2300 movs r3, #0
80063ea: 6a7a ldr r2, [r7, #36] @ 0x24
80063ec: f002 0203 and.w r2, r2, #3
80063f0: 0092 lsls r2, r2, #2
80063f2: 4093 lsls r3, r2
80063f4: 68fa ldr r2, [r7, #12]
80063f6: 4313 orrs r3, r2
80063f8: 60fb str r3, [r7, #12]
AFIO->EXTICR[position >> 2u] = temp;
80063fa: 492f ldr r1, [pc, #188] @ (80064b8 <HAL_GPIO_Init+0x2bc>)
80063fc: 6a7b ldr r3, [r7, #36] @ 0x24
80063fe: 089b lsrs r3, r3, #2
8006400: 3302 adds r3, #2
8006402: 68fa ldr r2, [r7, #12]
8006404: f841 2023 str.w r2, [r1, r3, lsl #2]
/* Enable or disable the rising trigger */
if ((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
8006408: 683b ldr r3, [r7, #0]
800640a: 685b ldr r3, [r3, #4]
800640c: f403 1380 and.w r3, r3, #1048576 @ 0x100000
8006410: 2b00 cmp r3, #0
8006412: d006 beq.n 8006422 <HAL_GPIO_Init+0x226>
{
SET_BIT(EXTI->RTSR, iocurrent);
8006414: 4b2d ldr r3, [pc, #180] @ (80064cc <HAL_GPIO_Init+0x2d0>)
8006416: 689a ldr r2, [r3, #8]
8006418: 492c ldr r1, [pc, #176] @ (80064cc <HAL_GPIO_Init+0x2d0>)
800641a: 69bb ldr r3, [r7, #24]
800641c: 4313 orrs r3, r2
800641e: 608b str r3, [r1, #8]
8006420: e006 b.n 8006430 <HAL_GPIO_Init+0x234>
}
else
{
CLEAR_BIT(EXTI->RTSR, iocurrent);
8006422: 4b2a ldr r3, [pc, #168] @ (80064cc <HAL_GPIO_Init+0x2d0>)
8006424: 689a ldr r2, [r3, #8]
8006426: 69bb ldr r3, [r7, #24]
8006428: 43db mvns r3, r3
800642a: 4928 ldr r1, [pc, #160] @ (80064cc <HAL_GPIO_Init+0x2d0>)
800642c: 4013 ands r3, r2
800642e: 608b str r3, [r1, #8]
}
/* Enable or disable the falling trigger */
if ((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
8006430: 683b ldr r3, [r7, #0]
8006432: 685b ldr r3, [r3, #4]
8006434: f403 1300 and.w r3, r3, #2097152 @ 0x200000
8006438: 2b00 cmp r3, #0
800643a: d006 beq.n 800644a <HAL_GPIO_Init+0x24e>
{
SET_BIT(EXTI->FTSR, iocurrent);
800643c: 4b23 ldr r3, [pc, #140] @ (80064cc <HAL_GPIO_Init+0x2d0>)
800643e: 68da ldr r2, [r3, #12]
8006440: 4922 ldr r1, [pc, #136] @ (80064cc <HAL_GPIO_Init+0x2d0>)
8006442: 69bb ldr r3, [r7, #24]
8006444: 4313 orrs r3, r2
8006446: 60cb str r3, [r1, #12]
8006448: e006 b.n 8006458 <HAL_GPIO_Init+0x25c>
}
else
{
CLEAR_BIT(EXTI->FTSR, iocurrent);
800644a: 4b20 ldr r3, [pc, #128] @ (80064cc <HAL_GPIO_Init+0x2d0>)
800644c: 68da ldr r2, [r3, #12]
800644e: 69bb ldr r3, [r7, #24]
8006450: 43db mvns r3, r3
8006452: 491e ldr r1, [pc, #120] @ (80064cc <HAL_GPIO_Init+0x2d0>)
8006454: 4013 ands r3, r2
8006456: 60cb str r3, [r1, #12]
}
/* Configure the event mask */
if ((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
8006458: 683b ldr r3, [r7, #0]
800645a: 685b ldr r3, [r3, #4]
800645c: f403 3300 and.w r3, r3, #131072 @ 0x20000
8006460: 2b00 cmp r3, #0
8006462: d006 beq.n 8006472 <HAL_GPIO_Init+0x276>
{
SET_BIT(EXTI->EMR, iocurrent);
8006464: 4b19 ldr r3, [pc, #100] @ (80064cc <HAL_GPIO_Init+0x2d0>)
8006466: 685a ldr r2, [r3, #4]
8006468: 4918 ldr r1, [pc, #96] @ (80064cc <HAL_GPIO_Init+0x2d0>)
800646a: 69bb ldr r3, [r7, #24]
800646c: 4313 orrs r3, r2
800646e: 604b str r3, [r1, #4]
8006470: e006 b.n 8006480 <HAL_GPIO_Init+0x284>
}
else
{
CLEAR_BIT(EXTI->EMR, iocurrent);
8006472: 4b16 ldr r3, [pc, #88] @ (80064cc <HAL_GPIO_Init+0x2d0>)
8006474: 685a ldr r2, [r3, #4]
8006476: 69bb ldr r3, [r7, #24]
8006478: 43db mvns r3, r3
800647a: 4914 ldr r1, [pc, #80] @ (80064cc <HAL_GPIO_Init+0x2d0>)
800647c: 4013 ands r3, r2
800647e: 604b str r3, [r1, #4]
}
/* Configure the interrupt mask */
if ((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
8006480: 683b ldr r3, [r7, #0]
8006482: 685b ldr r3, [r3, #4]
8006484: f403 3380 and.w r3, r3, #65536 @ 0x10000
8006488: 2b00 cmp r3, #0
800648a: d021 beq.n 80064d0 <HAL_GPIO_Init+0x2d4>
{
SET_BIT(EXTI->IMR, iocurrent);
800648c: 4b0f ldr r3, [pc, #60] @ (80064cc <HAL_GPIO_Init+0x2d0>)
800648e: 681a ldr r2, [r3, #0]
8006490: 490e ldr r1, [pc, #56] @ (80064cc <HAL_GPIO_Init+0x2d0>)
8006492: 69bb ldr r3, [r7, #24]
8006494: 4313 orrs r3, r2
8006496: 600b str r3, [r1, #0]
8006498: e021 b.n 80064de <HAL_GPIO_Init+0x2e2>
800649a: bf00 nop
800649c: 10320000 .word 0x10320000
80064a0: 10310000 .word 0x10310000
80064a4: 10220000 .word 0x10220000
80064a8: 10210000 .word 0x10210000
80064ac: 10120000 .word 0x10120000
80064b0: 10110000 .word 0x10110000
80064b4: 40021000 .word 0x40021000
80064b8: 40010000 .word 0x40010000
80064bc: 40010800 .word 0x40010800
80064c0: 40010c00 .word 0x40010c00
80064c4: 40011000 .word 0x40011000
80064c8: 40011400 .word 0x40011400
80064cc: 40010400 .word 0x40010400
}
else
{
CLEAR_BIT(EXTI->IMR, iocurrent);
80064d0: 4b0b ldr r3, [pc, #44] @ (8006500 <HAL_GPIO_Init+0x304>)
80064d2: 681a ldr r2, [r3, #0]
80064d4: 69bb ldr r3, [r7, #24]
80064d6: 43db mvns r3, r3
80064d8: 4909 ldr r1, [pc, #36] @ (8006500 <HAL_GPIO_Init+0x304>)
80064da: 4013 ands r3, r2
80064dc: 600b str r3, [r1, #0]
}
}
}
position++;
80064de: 6a7b ldr r3, [r7, #36] @ 0x24
80064e0: 3301 adds r3, #1
80064e2: 627b str r3, [r7, #36] @ 0x24
while (((GPIO_Init->Pin) >> position) != 0x00u)
80064e4: 683b ldr r3, [r7, #0]
80064e6: 681a ldr r2, [r3, #0]
80064e8: 6a7b ldr r3, [r7, #36] @ 0x24
80064ea: fa22 f303 lsr.w r3, r2, r3
80064ee: 2b00 cmp r3, #0
80064f0: f47f ae8e bne.w 8006210 <HAL_GPIO_Init+0x14>
}
}
80064f4: bf00 nop
80064f6: bf00 nop
80064f8: 372c adds r7, #44 @ 0x2c
80064fa: 46bd mov sp, r7
80064fc: bc80 pop {r7}
80064fe: 4770 bx lr
8006500: 40010400 .word 0x40010400
08006504 <HAL_GPIO_ReadPin>:
* @param GPIO_Pin: specifies the port bit to read.
* This parameter can be GPIO_PIN_x where x can be (0..15).
* @retval The input port pin value.
*/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin)
{
8006504: b480 push {r7}
8006506: b085 sub sp, #20
8006508: af00 add r7, sp, #0
800650a: 6078 str r0, [r7, #4]
800650c: 460b mov r3, r1
800650e: 807b strh r3, [r7, #2]
GPIO_PinState bitstatus;
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
8006510: 687b ldr r3, [r7, #4]
8006512: 689a ldr r2, [r3, #8]
8006514: 887b ldrh r3, [r7, #2]
8006516: 4013 ands r3, r2
8006518: 2b00 cmp r3, #0
800651a: d002 beq.n 8006522 <HAL_GPIO_ReadPin+0x1e>
{
bitstatus = GPIO_PIN_SET;
800651c: 2301 movs r3, #1
800651e: 73fb strb r3, [r7, #15]
8006520: e001 b.n 8006526 <HAL_GPIO_ReadPin+0x22>
}
else
{
bitstatus = GPIO_PIN_RESET;
8006522: 2300 movs r3, #0
8006524: 73fb strb r3, [r7, #15]
}
return bitstatus;
8006526: 7bfb ldrb r3, [r7, #15]
}
8006528: 4618 mov r0, r3
800652a: 3714 adds r7, #20
800652c: 46bd mov sp, r7
800652e: bc80 pop {r7}
8006530: 4770 bx lr
08006532 <HAL_GPIO_WritePin>:
* @arg GPIO_PIN_RESET: to clear the port pin
* @arg GPIO_PIN_SET: to set the port pin
* @retval None
*/
void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
{
8006532: b480 push {r7}
8006534: b083 sub sp, #12
8006536: af00 add r7, sp, #0
8006538: 6078 str r0, [r7, #4]
800653a: 460b mov r3, r1
800653c: 807b strh r3, [r7, #2]
800653e: 4613 mov r3, r2
8006540: 707b strb r3, [r7, #1]
/* Check the parameters */
assert_param(IS_GPIO_PIN(GPIO_Pin));
assert_param(IS_GPIO_PIN_ACTION(PinState));
if (PinState != GPIO_PIN_RESET)
8006542: 787b ldrb r3, [r7, #1]
8006544: 2b00 cmp r3, #0
8006546: d003 beq.n 8006550 <HAL_GPIO_WritePin+0x1e>
{
GPIOx->BSRR = GPIO_Pin;
8006548: 887a ldrh r2, [r7, #2]
800654a: 687b ldr r3, [r7, #4]
800654c: 611a str r2, [r3, #16]
}
else
{
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
}
}
800654e: e003 b.n 8006558 <HAL_GPIO_WritePin+0x26>
GPIOx->BSRR = (uint32_t)GPIO_Pin << 16u;
8006550: 887b ldrh r3, [r7, #2]
8006552: 041a lsls r2, r3, #16
8006554: 687b ldr r3, [r7, #4]
8006556: 611a str r2, [r3, #16]
}
8006558: bf00 nop
800655a: 370c adds r7, #12
800655c: 46bd mov sp, r7
800655e: bc80 pop {r7}
8006560: 4770 bx lr
08006562 <HAL_PCD_Init>:
* parameters in the PCD_InitTypeDef and initialize the associated handle.
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd)
{
8006562: b580 push {r7, lr}
8006564: b084 sub sp, #16
8006566: af00 add r7, sp, #0
8006568: 6078 str r0, [r7, #4]
uint8_t i;
/* Check the PCD handle allocation */
if (hpcd == NULL)
800656a: 687b ldr r3, [r7, #4]
800656c: 2b00 cmp r3, #0
800656e: d101 bne.n 8006574 <HAL_PCD_Init+0x12>
{
return HAL_ERROR;
8006570: 2301 movs r3, #1
8006572: e0e8 b.n 8006746 <HAL_PCD_Init+0x1e4>
}
/* Check the parameters */
assert_param(IS_PCD_ALL_INSTANCE(hpcd->Instance));
if (hpcd->State == HAL_PCD_STATE_RESET)
8006574: 687b ldr r3, [r7, #4]
8006576: f893 3291 ldrb.w r3, [r3, #657] @ 0x291
800657a: b2db uxtb r3, r3
800657c: 2b00 cmp r3, #0
800657e: d106 bne.n 800658e <HAL_PCD_Init+0x2c>
{
/* Allocate lock resource and initialize it */
hpcd->Lock = HAL_UNLOCKED;
8006580: 687b ldr r3, [r7, #4]
8006582: 2200 movs r2, #0
8006584: f883 2290 strb.w r2, [r3, #656] @ 0x290
/* Init the low level hardware */
hpcd->MspInitCallback(hpcd);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC... */
HAL_PCD_MspInit(hpcd);
8006588: 6878 ldr r0, [r7, #4]
800658a: f007 fc17 bl 800ddbc <HAL_PCD_MspInit>
#endif /* (USE_HAL_PCD_REGISTER_CALLBACKS) */
}
hpcd->State = HAL_PCD_STATE_BUSY;
800658e: 687b ldr r3, [r7, #4]
8006590: 2203 movs r2, #3
8006592: f883 2291 strb.w r2, [r3, #657] @ 0x291
/* Disable DMA mode for FS instance */
hpcd->Init.dma_enable = 0U;
8006596: 687b ldr r3, [r7, #4]
8006598: 2200 movs r2, #0
800659a: 715a strb r2, [r3, #5]
/* Disable the Interrupts */
__HAL_PCD_DISABLE(hpcd);
800659c: 687b ldr r3, [r7, #4]
800659e: 681b ldr r3, [r3, #0]
80065a0: 4618 mov r0, r3
80065a2: f003 fabc bl 8009b1e <USB_DisableGlobalInt>
/*Init the Core (common init.) */
if (USB_CoreInit(hpcd->Instance, hpcd->Init) != HAL_OK)
80065a6: 687b ldr r3, [r7, #4]
80065a8: 6818 ldr r0, [r3, #0]
80065aa: 687b ldr r3, [r7, #4]
80065ac: 3304 adds r3, #4
80065ae: cb0e ldmia r3, {r1, r2, r3}
80065b0: f003 fa92 bl 8009ad8 <USB_CoreInit>
80065b4: 4603 mov r3, r0
80065b6: 2b00 cmp r3, #0
80065b8: d005 beq.n 80065c6 <HAL_PCD_Init+0x64>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80065ba: 687b ldr r3, [r7, #4]
80065bc: 2202 movs r2, #2
80065be: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80065c2: 2301 movs r3, #1
80065c4: e0bf b.n 8006746 <HAL_PCD_Init+0x1e4>
}
/* Force Device Mode */
if (USB_SetCurrentMode(hpcd->Instance, USB_DEVICE_MODE) != HAL_OK)
80065c6: 687b ldr r3, [r7, #4]
80065c8: 681b ldr r3, [r3, #0]
80065ca: 2100 movs r1, #0
80065cc: 4618 mov r0, r3
80065ce: f003 fac0 bl 8009b52 <USB_SetCurrentMode>
80065d2: 4603 mov r3, r0
80065d4: 2b00 cmp r3, #0
80065d6: d005 beq.n 80065e4 <HAL_PCD_Init+0x82>
{
hpcd->State = HAL_PCD_STATE_ERROR;
80065d8: 687b ldr r3, [r7, #4]
80065da: 2202 movs r2, #2
80065dc: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
80065e0: 2301 movs r3, #1
80065e2: e0b0 b.n 8006746 <HAL_PCD_Init+0x1e4>
}
/* Init endpoints structures */
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80065e4: 2300 movs r3, #0
80065e6: 73fb strb r3, [r7, #15]
80065e8: e03e b.n 8006668 <HAL_PCD_Init+0x106>
{
/* Init ep structure */
hpcd->IN_ep[i].is_in = 1U;
80065ea: 7bfa ldrb r2, [r7, #15]
80065ec: 6879 ldr r1, [r7, #4]
80065ee: 4613 mov r3, r2
80065f0: 009b lsls r3, r3, #2
80065f2: 4413 add r3, r2
80065f4: 00db lsls r3, r3, #3
80065f6: 440b add r3, r1
80065f8: 3311 adds r3, #17
80065fa: 2201 movs r2, #1
80065fc: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].num = i;
80065fe: 7bfa ldrb r2, [r7, #15]
8006600: 6879 ldr r1, [r7, #4]
8006602: 4613 mov r3, r2
8006604: 009b lsls r3, r3, #2
8006606: 4413 add r3, r2
8006608: 00db lsls r3, r3, #3
800660a: 440b add r3, r1
800660c: 3310 adds r3, #16
800660e: 7bfa ldrb r2, [r7, #15]
8006610: 701a strb r2, [r3, #0]
#if defined (USB_OTG_FS)
hpcd->IN_ep[i].tx_fifo_num = i;
#endif /* defined (USB_OTG_FS) */
/* Control until ep is activated */
hpcd->IN_ep[i].type = EP_TYPE_CTRL;
8006612: 7bfa ldrb r2, [r7, #15]
8006614: 6879 ldr r1, [r7, #4]
8006616: 4613 mov r3, r2
8006618: 009b lsls r3, r3, #2
800661a: 4413 add r3, r2
800661c: 00db lsls r3, r3, #3
800661e: 440b add r3, r1
8006620: 3313 adds r3, #19
8006622: 2200 movs r2, #0
8006624: 701a strb r2, [r3, #0]
hpcd->IN_ep[i].maxpacket = 0U;
8006626: 7bfa ldrb r2, [r7, #15]
8006628: 6879 ldr r1, [r7, #4]
800662a: 4613 mov r3, r2
800662c: 009b lsls r3, r3, #2
800662e: 4413 add r3, r2
8006630: 00db lsls r3, r3, #3
8006632: 440b add r3, r1
8006634: 3320 adds r3, #32
8006636: 2200 movs r2, #0
8006638: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_buff = 0U;
800663a: 7bfa ldrb r2, [r7, #15]
800663c: 6879 ldr r1, [r7, #4]
800663e: 4613 mov r3, r2
8006640: 009b lsls r3, r3, #2
8006642: 4413 add r3, r2
8006644: 00db lsls r3, r3, #3
8006646: 440b add r3, r1
8006648: 3324 adds r3, #36 @ 0x24
800664a: 2200 movs r2, #0
800664c: 601a str r2, [r3, #0]
hpcd->IN_ep[i].xfer_len = 0U;
800664e: 7bfb ldrb r3, [r7, #15]
8006650: 6879 ldr r1, [r7, #4]
8006652: 1c5a adds r2, r3, #1
8006654: 4613 mov r3, r2
8006656: 009b lsls r3, r3, #2
8006658: 4413 add r3, r2
800665a: 00db lsls r3, r3, #3
800665c: 440b add r3, r1
800665e: 2200 movs r2, #0
8006660: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006662: 7bfb ldrb r3, [r7, #15]
8006664: 3301 adds r3, #1
8006666: 73fb strb r3, [r7, #15]
8006668: 687b ldr r3, [r7, #4]
800666a: 791b ldrb r3, [r3, #4]
800666c: 7bfa ldrb r2, [r7, #15]
800666e: 429a cmp r2, r3
8006670: d3bb bcc.n 80065ea <HAL_PCD_Init+0x88>
}
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
8006672: 2300 movs r3, #0
8006674: 73fb strb r3, [r7, #15]
8006676: e044 b.n 8006702 <HAL_PCD_Init+0x1a0>
{
hpcd->OUT_ep[i].is_in = 0U;
8006678: 7bfa ldrb r2, [r7, #15]
800667a: 6879 ldr r1, [r7, #4]
800667c: 4613 mov r3, r2
800667e: 009b lsls r3, r3, #2
8006680: 4413 add r3, r2
8006682: 00db lsls r3, r3, #3
8006684: 440b add r3, r1
8006686: f203 1351 addw r3, r3, #337 @ 0x151
800668a: 2200 movs r2, #0
800668c: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].num = i;
800668e: 7bfa ldrb r2, [r7, #15]
8006690: 6879 ldr r1, [r7, #4]
8006692: 4613 mov r3, r2
8006694: 009b lsls r3, r3, #2
8006696: 4413 add r3, r2
8006698: 00db lsls r3, r3, #3
800669a: 440b add r3, r1
800669c: f503 73a8 add.w r3, r3, #336 @ 0x150
80066a0: 7bfa ldrb r2, [r7, #15]
80066a2: 701a strb r2, [r3, #0]
/* Control until ep is activated */
hpcd->OUT_ep[i].type = EP_TYPE_CTRL;
80066a4: 7bfa ldrb r2, [r7, #15]
80066a6: 6879 ldr r1, [r7, #4]
80066a8: 4613 mov r3, r2
80066aa: 009b lsls r3, r3, #2
80066ac: 4413 add r3, r2
80066ae: 00db lsls r3, r3, #3
80066b0: 440b add r3, r1
80066b2: f203 1353 addw r3, r3, #339 @ 0x153
80066b6: 2200 movs r2, #0
80066b8: 701a strb r2, [r3, #0]
hpcd->OUT_ep[i].maxpacket = 0U;
80066ba: 7bfa ldrb r2, [r7, #15]
80066bc: 6879 ldr r1, [r7, #4]
80066be: 4613 mov r3, r2
80066c0: 009b lsls r3, r3, #2
80066c2: 4413 add r3, r2
80066c4: 00db lsls r3, r3, #3
80066c6: 440b add r3, r1
80066c8: f503 73b0 add.w r3, r3, #352 @ 0x160
80066cc: 2200 movs r2, #0
80066ce: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_buff = 0U;
80066d0: 7bfa ldrb r2, [r7, #15]
80066d2: 6879 ldr r1, [r7, #4]
80066d4: 4613 mov r3, r2
80066d6: 009b lsls r3, r3, #2
80066d8: 4413 add r3, r2
80066da: 00db lsls r3, r3, #3
80066dc: 440b add r3, r1
80066de: f503 73b2 add.w r3, r3, #356 @ 0x164
80066e2: 2200 movs r2, #0
80066e4: 601a str r2, [r3, #0]
hpcd->OUT_ep[i].xfer_len = 0U;
80066e6: 7bfa ldrb r2, [r7, #15]
80066e8: 6879 ldr r1, [r7, #4]
80066ea: 4613 mov r3, r2
80066ec: 009b lsls r3, r3, #2
80066ee: 4413 add r3, r2
80066f0: 00db lsls r3, r3, #3
80066f2: 440b add r3, r1
80066f4: f503 73b4 add.w r3, r3, #360 @ 0x168
80066f8: 2200 movs r2, #0
80066fa: 601a str r2, [r3, #0]
for (i = 0U; i < hpcd->Init.dev_endpoints; i++)
80066fc: 7bfb ldrb r3, [r7, #15]
80066fe: 3301 adds r3, #1
8006700: 73fb strb r3, [r7, #15]
8006702: 687b ldr r3, [r7, #4]
8006704: 791b ldrb r3, [r3, #4]
8006706: 7bfa ldrb r2, [r7, #15]
8006708: 429a cmp r2, r3
800670a: d3b5 bcc.n 8006678 <HAL_PCD_Init+0x116>
}
/* Init Device */
if (USB_DevInit(hpcd->Instance, hpcd->Init) != HAL_OK)
800670c: 687b ldr r3, [r7, #4]
800670e: 6818 ldr r0, [r3, #0]
8006710: 687b ldr r3, [r7, #4]
8006712: 3304 adds r3, #4
8006714: cb0e ldmia r3, {r1, r2, r3}
8006716: f003 fa28 bl 8009b6a <USB_DevInit>
800671a: 4603 mov r3, r0
800671c: 2b00 cmp r3, #0
800671e: d005 beq.n 800672c <HAL_PCD_Init+0x1ca>
{
hpcd->State = HAL_PCD_STATE_ERROR;
8006720: 687b ldr r3, [r7, #4]
8006722: 2202 movs r2, #2
8006724: f883 2291 strb.w r2, [r3, #657] @ 0x291
return HAL_ERROR;
8006728: 2301 movs r3, #1
800672a: e00c b.n 8006746 <HAL_PCD_Init+0x1e4>
}
hpcd->USB_Address = 0U;
800672c: 687b ldr r3, [r7, #4]
800672e: 2200 movs r2, #0
8006730: 735a strb r2, [r3, #13]
hpcd->State = HAL_PCD_STATE_READY;
8006732: 687b ldr r3, [r7, #4]
8006734: 2201 movs r2, #1
8006736: f883 2291 strb.w r2, [r3, #657] @ 0x291
(void)USB_DevDisconnect(hpcd->Instance);
800673a: 687b ldr r3, [r7, #4]
800673c: 681b ldr r3, [r3, #0]
800673e: 4618 mov r0, r3
8006740: f005 fca7 bl 800c092 <USB_DevDisconnect>
return HAL_OK;
8006744: 2300 movs r3, #0
}
8006746: 4618 mov r0, r3
8006748: 3710 adds r7, #16
800674a: 46bd mov sp, r7
800674c: bd80 pop {r7, pc}
0800674e <HAL_PCD_Start>:
* @brief Start the USB device
* @param hpcd PCD handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd)
{
800674e: b580 push {r7, lr}
8006750: b082 sub sp, #8
8006752: af00 add r7, sp, #0
8006754: 6078 str r0, [r7, #4]
__HAL_LOCK(hpcd);
8006756: 687b ldr r3, [r7, #4]
8006758: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
800675c: 2b01 cmp r3, #1
800675e: d101 bne.n 8006764 <HAL_PCD_Start+0x16>
8006760: 2302 movs r3, #2
8006762: e016 b.n 8006792 <HAL_PCD_Start+0x44>
8006764: 687b ldr r3, [r7, #4]
8006766: 2201 movs r2, #1
8006768: f883 2290 strb.w r2, [r3, #656] @ 0x290
__HAL_PCD_ENABLE(hpcd);
800676c: 687b ldr r3, [r7, #4]
800676e: 681b ldr r3, [r3, #0]
8006770: 4618 mov r0, r3
8006772: f003 f9be bl 8009af2 <USB_EnableGlobalInt>
#if defined (USB)
HAL_PCDEx_SetConnectionState(hpcd, 1U);
8006776: 2101 movs r1, #1
8006778: 6878 ldr r0, [r7, #4]
800677a: f007 fd92 bl 800e2a2 <HAL_PCDEx_SetConnectionState>
#endif /* defined (USB) */
(void)USB_DevConnect(hpcd->Instance);
800677e: 687b ldr r3, [r7, #4]
8006780: 681b ldr r3, [r3, #0]
8006782: 4618 mov r0, r3
8006784: f005 fc7b bl 800c07e <USB_DevConnect>
__HAL_UNLOCK(hpcd);
8006788: 687b ldr r3, [r7, #4]
800678a: 2200 movs r2, #0
800678c: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006790: 2300 movs r3, #0
}
8006792: 4618 mov r0, r3
8006794: 3708 adds r7, #8
8006796: 46bd mov sp, r7
8006798: bd80 pop {r7, pc}
0800679a <HAL_PCD_IRQHandler>:
* @brief This function handles PCD interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd)
{
800679a: b580 push {r7, lr}
800679c: b088 sub sp, #32
800679e: af00 add r7, sp, #0
80067a0: 6078 str r0, [r7, #4]
uint32_t wIstr = USB_ReadInterrupts(hpcd->Instance);
80067a2: 687b ldr r3, [r7, #4]
80067a4: 681b ldr r3, [r3, #0]
80067a6: 4618 mov r0, r3
80067a8: f005 fc7d bl 800c0a6 <USB_ReadInterrupts>
80067ac: 61b8 str r0, [r7, #24]
uint16_t store_ep[8];
uint8_t i;
if ((wIstr & USB_ISTR_CTR) == USB_ISTR_CTR)
80067ae: 69bb ldr r3, [r7, #24]
80067b0: f403 4300 and.w r3, r3, #32768 @ 0x8000
80067b4: 2b00 cmp r3, #0
80067b6: d003 beq.n 80067c0 <HAL_PCD_IRQHandler+0x26>
{
/* servicing of the endpoint correct transfer interrupt */
/* clear of the CTR flag into the sub */
(void)PCD_EP_ISR_Handler(hpcd);
80067b8: 6878 ldr r0, [r7, #4]
80067ba: f000 fb1a bl 8006df2 <PCD_EP_ISR_Handler>
return;
80067be: e119 b.n 80069f4 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_RESET) == USB_ISTR_RESET)
80067c0: 69bb ldr r3, [r7, #24]
80067c2: f403 6380 and.w r3, r3, #1024 @ 0x400
80067c6: 2b00 cmp r3, #0
80067c8: d013 beq.n 80067f2 <HAL_PCD_IRQHandler+0x58>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
80067ca: 687b ldr r3, [r7, #4]
80067cc: 681b ldr r3, [r3, #0]
80067ce: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80067d2: b29a uxth r2, r3
80067d4: 687b ldr r3, [r7, #4]
80067d6: 681b ldr r3, [r3, #0]
80067d8: f422 6280 bic.w r2, r2, #1024 @ 0x400
80067dc: b292 uxth r2, r2
80067de: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResetCallback(hpcd);
#else
HAL_PCD_ResetCallback(hpcd);
80067e2: 6878 ldr r0, [r7, #4]
80067e4: f007 fb65 bl 800deb2 <HAL_PCD_ResetCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
(void)HAL_PCD_SetAddress(hpcd, 0U);
80067e8: 2100 movs r1, #0
80067ea: 6878 ldr r0, [r7, #4]
80067ec: f000 f905 bl 80069fa <HAL_PCD_SetAddress>
return;
80067f0: e100 b.n 80069f4 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_PMAOVR) == USB_ISTR_PMAOVR)
80067f2: 69bb ldr r3, [r7, #24]
80067f4: f403 4380 and.w r3, r3, #16384 @ 0x4000
80067f8: 2b00 cmp r3, #0
80067fa: d00c beq.n 8006816 <HAL_PCD_IRQHandler+0x7c>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_PMAOVR);
80067fc: 687b ldr r3, [r7, #4]
80067fe: 681b ldr r3, [r3, #0]
8006800: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006804: b29a uxth r2, r3
8006806: 687b ldr r3, [r7, #4]
8006808: 681b ldr r3, [r3, #0]
800680a: f422 4280 bic.w r2, r2, #16384 @ 0x4000
800680e: b292 uxth r2, r2
8006810: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006814: e0ee b.n 80069f4 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ERR) == USB_ISTR_ERR)
8006816: 69bb ldr r3, [r7, #24]
8006818: f403 5300 and.w r3, r3, #8192 @ 0x2000
800681c: 2b00 cmp r3, #0
800681e: d00c beq.n 800683a <HAL_PCD_IRQHandler+0xa0>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ERR);
8006820: 687b ldr r3, [r7, #4]
8006822: 681b ldr r3, [r3, #0]
8006824: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006828: b29a uxth r2, r3
800682a: 687b ldr r3, [r7, #4]
800682c: 681b ldr r3, [r3, #0]
800682e: f422 5200 bic.w r2, r2, #8192 @ 0x2000
8006832: b292 uxth r2, r2
8006834: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006838: e0dc b.n 80069f4 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_WKUP) == USB_ISTR_WKUP)
800683a: 69bb ldr r3, [r7, #24]
800683c: f403 5380 and.w r3, r3, #4096 @ 0x1000
8006840: 2b00 cmp r3, #0
8006842: d027 beq.n 8006894 <HAL_PCD_IRQHandler+0xfa>
{
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_LP_MODE);
8006844: 687b ldr r3, [r7, #4]
8006846: 681b ldr r3, [r3, #0]
8006848: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800684c: b29a uxth r2, r3
800684e: 687b ldr r3, [r7, #4]
8006850: 681b ldr r3, [r3, #0]
8006852: f022 0204 bic.w r2, r2, #4
8006856: b292 uxth r2, r2
8006858: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
hpcd->Instance->CNTR &= (uint16_t) ~(USB_CNTR_FSUSP);
800685c: 687b ldr r3, [r7, #4]
800685e: 681b ldr r3, [r3, #0]
8006860: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8006864: b29a uxth r2, r3
8006866: 687b ldr r3, [r7, #4]
8006868: 681b ldr r3, [r3, #0]
800686a: f022 0208 bic.w r2, r2, #8
800686e: b292 uxth r2, r2
8006870: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->ResumeCallback(hpcd);
#else
HAL_PCD_ResumeCallback(hpcd);
8006874: 6878 ldr r0, [r7, #4]
8006876: f007 fb55 bl 800df24 <HAL_PCD_ResumeCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_WKUP);
800687a: 687b ldr r3, [r7, #4]
800687c: 681b ldr r3, [r3, #0]
800687e: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006882: b29a uxth r2, r3
8006884: 687b ldr r3, [r7, #4]
8006886: 681b ldr r3, [r3, #0]
8006888: f422 5280 bic.w r2, r2, #4096 @ 0x1000
800688c: b292 uxth r2, r2
800688e: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
8006892: e0af b.n 80069f4 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SUSP) == USB_ISTR_SUSP)
8006894: 69bb ldr r3, [r7, #24]
8006896: f403 6300 and.w r3, r3, #2048 @ 0x800
800689a: 2b00 cmp r3, #0
800689c: f000 8083 beq.w 80069a6 <HAL_PCD_IRQHandler+0x20c>
{
/* WA: To Clear Wakeup flag if raised with suspend signal */
/* Store Endpoint registers */
for (i = 0U; i < 8U; i++)
80068a0: 2300 movs r3, #0
80068a2: 77fb strb r3, [r7, #31]
80068a4: e010 b.n 80068c8 <HAL_PCD_IRQHandler+0x12e>
{
store_ep[i] = PCD_GET_ENDPOINT(hpcd->Instance, i);
80068a6: 687b ldr r3, [r7, #4]
80068a8: 681b ldr r3, [r3, #0]
80068aa: 461a mov r2, r3
80068ac: 7ffb ldrb r3, [r7, #31]
80068ae: 009b lsls r3, r3, #2
80068b0: 441a add r2, r3
80068b2: 7ffb ldrb r3, [r7, #31]
80068b4: 8812 ldrh r2, [r2, #0]
80068b6: b292 uxth r2, r2
80068b8: 005b lsls r3, r3, #1
80068ba: 3320 adds r3, #32
80068bc: 443b add r3, r7
80068be: f823 2c18 strh.w r2, [r3, #-24]
for (i = 0U; i < 8U; i++)
80068c2: 7ffb ldrb r3, [r7, #31]
80068c4: 3301 adds r3, #1
80068c6: 77fb strb r3, [r7, #31]
80068c8: 7ffb ldrb r3, [r7, #31]
80068ca: 2b07 cmp r3, #7
80068cc: d9eb bls.n 80068a6 <HAL_PCD_IRQHandler+0x10c>
}
/* FORCE RESET */
hpcd->Instance->CNTR |= (uint16_t)(USB_CNTR_FRES);
80068ce: 687b ldr r3, [r7, #4]
80068d0: 681b ldr r3, [r3, #0]
80068d2: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80068d6: b29a uxth r2, r3
80068d8: 687b ldr r3, [r7, #4]
80068da: 681b ldr r3, [r3, #0]
80068dc: f042 0201 orr.w r2, r2, #1
80068e0: b292 uxth r2, r2
80068e2: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CLEAR RESET */
hpcd->Instance->CNTR &= (uint16_t)(~USB_CNTR_FRES);
80068e6: 687b ldr r3, [r7, #4]
80068e8: 681b ldr r3, [r3, #0]
80068ea: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
80068ee: b29a uxth r2, r3
80068f0: 687b ldr r3, [r7, #4]
80068f2: 681b ldr r3, [r3, #0]
80068f4: f022 0201 bic.w r2, r2, #1
80068f8: b292 uxth r2, r2
80068fa: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* wait for reset flag in ISTR */
while ((hpcd->Instance->ISTR & USB_ISTR_RESET) == 0U)
80068fe: bf00 nop
8006900: 687b ldr r3, [r7, #4]
8006902: 681b ldr r3, [r3, #0]
8006904: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006908: b29b uxth r3, r3
800690a: f403 6380 and.w r3, r3, #1024 @ 0x400
800690e: 2b00 cmp r3, #0
8006910: d0f6 beq.n 8006900 <HAL_PCD_IRQHandler+0x166>
{
}
/* Clear Reset Flag */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_RESET);
8006912: 687b ldr r3, [r7, #4]
8006914: 681b ldr r3, [r3, #0]
8006916: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800691a: b29a uxth r2, r3
800691c: 687b ldr r3, [r7, #4]
800691e: 681b ldr r3, [r3, #0]
8006920: f422 6280 bic.w r2, r2, #1024 @ 0x400
8006924: b292 uxth r2, r2
8006926: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Restore Registre */
for (i = 0U; i < 8U; i++)
800692a: 2300 movs r3, #0
800692c: 77fb strb r3, [r7, #31]
800692e: e00f b.n 8006950 <HAL_PCD_IRQHandler+0x1b6>
{
PCD_SET_ENDPOINT(hpcd->Instance, i, store_ep[i]);
8006930: 7ffb ldrb r3, [r7, #31]
8006932: 687a ldr r2, [r7, #4]
8006934: 6812 ldr r2, [r2, #0]
8006936: 4611 mov r1, r2
8006938: 7ffa ldrb r2, [r7, #31]
800693a: 0092 lsls r2, r2, #2
800693c: 440a add r2, r1
800693e: 005b lsls r3, r3, #1
8006940: 3320 adds r3, #32
8006942: 443b add r3, r7
8006944: f833 3c18 ldrh.w r3, [r3, #-24]
8006948: 8013 strh r3, [r2, #0]
for (i = 0U; i < 8U; i++)
800694a: 7ffb ldrb r3, [r7, #31]
800694c: 3301 adds r3, #1
800694e: 77fb strb r3, [r7, #31]
8006950: 7ffb ldrb r3, [r7, #31]
8006952: 2b07 cmp r3, #7
8006954: d9ec bls.n 8006930 <HAL_PCD_IRQHandler+0x196>
}
/* Force low-power mode in the macrocell */
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_FSUSP;
8006956: 687b ldr r3, [r7, #4]
8006958: 681b ldr r3, [r3, #0]
800695a: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800695e: b29a uxth r2, r3
8006960: 687b ldr r3, [r7, #4]
8006962: 681b ldr r3, [r3, #0]
8006964: f042 0208 orr.w r2, r2, #8
8006968: b292 uxth r2, r2
800696a: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SUSP);
800696e: 687b ldr r3, [r7, #4]
8006970: 681b ldr r3, [r3, #0]
8006972: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006976: b29a uxth r2, r3
8006978: 687b ldr r3, [r7, #4]
800697a: 681b ldr r3, [r3, #0]
800697c: f422 6200 bic.w r2, r2, #2048 @ 0x800
8006980: b292 uxth r2, r2
8006982: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
hpcd->Instance->CNTR |= (uint16_t)USB_CNTR_LP_MODE;
8006986: 687b ldr r3, [r7, #4]
8006988: 681b ldr r3, [r3, #0]
800698a: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
800698e: b29a uxth r2, r3
8006990: 687b ldr r3, [r7, #4]
8006992: 681b ldr r3, [r3, #0]
8006994: f042 0204 orr.w r2, r2, #4
8006998: b292 uxth r2, r2
800699a: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SuspendCallback(hpcd);
#else
HAL_PCD_SuspendCallback(hpcd);
800699e: 6878 ldr r0, [r7, #4]
80069a0: f007 faa6 bl 800def0 <HAL_PCD_SuspendCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
80069a4: e026 b.n 80069f4 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_SOF) == USB_ISTR_SOF)
80069a6: 69bb ldr r3, [r7, #24]
80069a8: f403 7300 and.w r3, r3, #512 @ 0x200
80069ac: 2b00 cmp r3, #0
80069ae: d00f beq.n 80069d0 <HAL_PCD_IRQHandler+0x236>
{
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_SOF);
80069b0: 687b ldr r3, [r7, #4]
80069b2: 681b ldr r3, [r3, #0]
80069b4: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80069b8: b29a uxth r2, r3
80069ba: 687b ldr r3, [r7, #4]
80069bc: 681b ldr r3, [r3, #0]
80069be: f422 7200 bic.w r2, r2, #512 @ 0x200
80069c2: b292 uxth r2, r2
80069c4: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SOFCallback(hpcd);
#else
HAL_PCD_SOFCallback(hpcd);
80069c8: 6878 ldr r0, [r7, #4]
80069ca: f007 fa64 bl 800de96 <HAL_PCD_SOFCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
return;
80069ce: e011 b.n 80069f4 <HAL_PCD_IRQHandler+0x25a>
}
if ((wIstr & USB_ISTR_ESOF) == USB_ISTR_ESOF)
80069d0: 69bb ldr r3, [r7, #24]
80069d2: f403 7380 and.w r3, r3, #256 @ 0x100
80069d6: 2b00 cmp r3, #0
80069d8: d00c beq.n 80069f4 <HAL_PCD_IRQHandler+0x25a>
{
/* clear ESOF flag in ISTR */
__HAL_PCD_CLEAR_FLAG(hpcd, USB_ISTR_ESOF);
80069da: 687b ldr r3, [r7, #4]
80069dc: 681b ldr r3, [r3, #0]
80069de: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
80069e2: b29a uxth r2, r3
80069e4: 687b ldr r3, [r7, #4]
80069e6: 681b ldr r3, [r3, #0]
80069e8: f422 7280 bic.w r2, r2, #256 @ 0x100
80069ec: b292 uxth r2, r2
80069ee: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
return;
80069f2: bf00 nop
}
}
80069f4: 3720 adds r7, #32
80069f6: 46bd mov sp, r7
80069f8: bd80 pop {r7, pc}
080069fa <HAL_PCD_SetAddress>:
* @param hpcd PCD handle
* @param address new device address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address)
{
80069fa: b580 push {r7, lr}
80069fc: b082 sub sp, #8
80069fe: af00 add r7, sp, #0
8006a00: 6078 str r0, [r7, #4]
8006a02: 460b mov r3, r1
8006a04: 70fb strb r3, [r7, #3]
__HAL_LOCK(hpcd);
8006a06: 687b ldr r3, [r7, #4]
8006a08: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006a0c: 2b01 cmp r3, #1
8006a0e: d101 bne.n 8006a14 <HAL_PCD_SetAddress+0x1a>
8006a10: 2302 movs r3, #2
8006a12: e012 b.n 8006a3a <HAL_PCD_SetAddress+0x40>
8006a14: 687b ldr r3, [r7, #4]
8006a16: 2201 movs r2, #1
8006a18: f883 2290 strb.w r2, [r3, #656] @ 0x290
hpcd->USB_Address = address;
8006a1c: 687b ldr r3, [r7, #4]
8006a1e: 78fa ldrb r2, [r7, #3]
8006a20: 735a strb r2, [r3, #13]
(void)USB_SetDevAddress(hpcd->Instance, address);
8006a22: 687b ldr r3, [r7, #4]
8006a24: 681b ldr r3, [r3, #0]
8006a26: 78fa ldrb r2, [r7, #3]
8006a28: 4611 mov r1, r2
8006a2a: 4618 mov r0, r3
8006a2c: f005 fb14 bl 800c058 <USB_SetDevAddress>
__HAL_UNLOCK(hpcd);
8006a30: 687b ldr r3, [r7, #4]
8006a32: 2200 movs r2, #0
8006a34: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006a38: 2300 movs r3, #0
}
8006a3a: 4618 mov r0, r3
8006a3c: 3708 adds r7, #8
8006a3e: 46bd mov sp, r7
8006a40: bd80 pop {r7, pc}
08006a42 <HAL_PCD_EP_Open>:
* @param ep_type endpoint type
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr,
uint16_t ep_mps, uint8_t ep_type)
{
8006a42: b580 push {r7, lr}
8006a44: b084 sub sp, #16
8006a46: af00 add r7, sp, #0
8006a48: 6078 str r0, [r7, #4]
8006a4a: 4608 mov r0, r1
8006a4c: 4611 mov r1, r2
8006a4e: 461a mov r2, r3
8006a50: 4603 mov r3, r0
8006a52: 70fb strb r3, [r7, #3]
8006a54: 460b mov r3, r1
8006a56: 803b strh r3, [r7, #0]
8006a58: 4613 mov r3, r2
8006a5a: 70bb strb r3, [r7, #2]
HAL_StatusTypeDef ret = HAL_OK;
8006a5c: 2300 movs r3, #0
8006a5e: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006a60: f997 3003 ldrsb.w r3, [r7, #3]
8006a64: 2b00 cmp r3, #0
8006a66: da0e bge.n 8006a86 <HAL_PCD_EP_Open+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006a68: 78fb ldrb r3, [r7, #3]
8006a6a: f003 0207 and.w r2, r3, #7
8006a6e: 4613 mov r3, r2
8006a70: 009b lsls r3, r3, #2
8006a72: 4413 add r3, r2
8006a74: 00db lsls r3, r3, #3
8006a76: 3310 adds r3, #16
8006a78: 687a ldr r2, [r7, #4]
8006a7a: 4413 add r3, r2
8006a7c: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006a7e: 68fb ldr r3, [r7, #12]
8006a80: 2201 movs r2, #1
8006a82: 705a strb r2, [r3, #1]
8006a84: e00e b.n 8006aa4 <HAL_PCD_EP_Open+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006a86: 78fb ldrb r3, [r7, #3]
8006a88: f003 0207 and.w r2, r3, #7
8006a8c: 4613 mov r3, r2
8006a8e: 009b lsls r3, r3, #2
8006a90: 4413 add r3, r2
8006a92: 00db lsls r3, r3, #3
8006a94: f503 73a8 add.w r3, r3, #336 @ 0x150
8006a98: 687a ldr r2, [r7, #4]
8006a9a: 4413 add r3, r2
8006a9c: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006a9e: 68fb ldr r3, [r7, #12]
8006aa0: 2200 movs r2, #0
8006aa2: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006aa4: 78fb ldrb r3, [r7, #3]
8006aa6: f003 0307 and.w r3, r3, #7
8006aaa: b2da uxtb r2, r3
8006aac: 68fb ldr r3, [r7, #12]
8006aae: 701a strb r2, [r3, #0]
ep->maxpacket = ep_mps;
8006ab0: 883a ldrh r2, [r7, #0]
8006ab2: 68fb ldr r3, [r7, #12]
8006ab4: 611a str r2, [r3, #16]
ep->type = ep_type;
8006ab6: 68fb ldr r3, [r7, #12]
8006ab8: 78ba ldrb r2, [r7, #2]
8006aba: 70da strb r2, [r3, #3]
ep->tx_fifo_num = ep->num;
}
#endif /* defined (USB_OTG_FS) */
/* Set initial data PID. */
if (ep_type == EP_TYPE_BULK)
8006abc: 78bb ldrb r3, [r7, #2]
8006abe: 2b02 cmp r3, #2
8006ac0: d102 bne.n 8006ac8 <HAL_PCD_EP_Open+0x86>
{
ep->data_pid_start = 0U;
8006ac2: 68fb ldr r3, [r7, #12]
8006ac4: 2200 movs r2, #0
8006ac6: 711a strb r2, [r3, #4]
}
__HAL_LOCK(hpcd);
8006ac8: 687b ldr r3, [r7, #4]
8006aca: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006ace: 2b01 cmp r3, #1
8006ad0: d101 bne.n 8006ad6 <HAL_PCD_EP_Open+0x94>
8006ad2: 2302 movs r3, #2
8006ad4: e00e b.n 8006af4 <HAL_PCD_EP_Open+0xb2>
8006ad6: 687b ldr r3, [r7, #4]
8006ad8: 2201 movs r2, #1
8006ada: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_ActivateEndpoint(hpcd->Instance, ep);
8006ade: 687b ldr r3, [r7, #4]
8006ae0: 681b ldr r3, [r3, #0]
8006ae2: 68f9 ldr r1, [r7, #12]
8006ae4: 4618 mov r0, r3
8006ae6: f003 f85d bl 8009ba4 <USB_ActivateEndpoint>
__HAL_UNLOCK(hpcd);
8006aea: 687b ldr r3, [r7, #4]
8006aec: 2200 movs r2, #0
8006aee: f883 2290 strb.w r2, [r3, #656] @ 0x290
return ret;
8006af2: 7afb ldrb r3, [r7, #11]
}
8006af4: 4618 mov r0, r3
8006af6: 3710 adds r7, #16
8006af8: 46bd mov sp, r7
8006afa: bd80 pop {r7, pc}
08006afc <HAL_PCD_EP_Close>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006afc: b580 push {r7, lr}
8006afe: b084 sub sp, #16
8006b00: af00 add r7, sp, #0
8006b02: 6078 str r0, [r7, #4]
8006b04: 460b mov r3, r1
8006b06: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if ((ep_addr & 0x80U) == 0x80U)
8006b08: f997 3003 ldrsb.w r3, [r7, #3]
8006b0c: 2b00 cmp r3, #0
8006b0e: da0e bge.n 8006b2e <HAL_PCD_EP_Close+0x32>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006b10: 78fb ldrb r3, [r7, #3]
8006b12: f003 0207 and.w r2, r3, #7
8006b16: 4613 mov r3, r2
8006b18: 009b lsls r3, r3, #2
8006b1a: 4413 add r3, r2
8006b1c: 00db lsls r3, r3, #3
8006b1e: 3310 adds r3, #16
8006b20: 687a ldr r2, [r7, #4]
8006b22: 4413 add r3, r2
8006b24: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006b26: 68fb ldr r3, [r7, #12]
8006b28: 2201 movs r2, #1
8006b2a: 705a strb r2, [r3, #1]
8006b2c: e00e b.n 8006b4c <HAL_PCD_EP_Close+0x50>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006b2e: 78fb ldrb r3, [r7, #3]
8006b30: f003 0207 and.w r2, r3, #7
8006b34: 4613 mov r3, r2
8006b36: 009b lsls r3, r3, #2
8006b38: 4413 add r3, r2
8006b3a: 00db lsls r3, r3, #3
8006b3c: f503 73a8 add.w r3, r3, #336 @ 0x150
8006b40: 687a ldr r2, [r7, #4]
8006b42: 4413 add r3, r2
8006b44: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006b46: 68fb ldr r3, [r7, #12]
8006b48: 2200 movs r2, #0
8006b4a: 705a strb r2, [r3, #1]
}
ep->num = ep_addr & EP_ADDR_MSK;
8006b4c: 78fb ldrb r3, [r7, #3]
8006b4e: f003 0307 and.w r3, r3, #7
8006b52: b2da uxtb r2, r3
8006b54: 68fb ldr r3, [r7, #12]
8006b56: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006b58: 687b ldr r3, [r7, #4]
8006b5a: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006b5e: 2b01 cmp r3, #1
8006b60: d101 bne.n 8006b66 <HAL_PCD_EP_Close+0x6a>
8006b62: 2302 movs r3, #2
8006b64: e00e b.n 8006b84 <HAL_PCD_EP_Close+0x88>
8006b66: 687b ldr r3, [r7, #4]
8006b68: 2201 movs r2, #1
8006b6a: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_DeactivateEndpoint(hpcd->Instance, ep);
8006b6e: 687b ldr r3, [r7, #4]
8006b70: 681b ldr r3, [r3, #0]
8006b72: 68f9 ldr r1, [r7, #12]
8006b74: 4618 mov r0, r3
8006b76: f003 fbd5 bl 800a324 <USB_DeactivateEndpoint>
__HAL_UNLOCK(hpcd);
8006b7a: 687b ldr r3, [r7, #4]
8006b7c: 2200 movs r2, #0
8006b7e: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006b82: 2300 movs r3, #0
}
8006b84: 4618 mov r0, r3
8006b86: 3710 adds r7, #16
8006b88: 46bd mov sp, r7
8006b8a: bd80 pop {r7, pc}
08006b8c <HAL_PCD_EP_Receive>:
* @param pBuf pointer to the reception buffer
* @param len amount of data to be received
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006b8c: b580 push {r7, lr}
8006b8e: b086 sub sp, #24
8006b90: af00 add r7, sp, #0
8006b92: 60f8 str r0, [r7, #12]
8006b94: 607a str r2, [r7, #4]
8006b96: 603b str r3, [r7, #0]
8006b98: 460b mov r3, r1
8006b9a: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006b9c: 7afb ldrb r3, [r7, #11]
8006b9e: f003 0207 and.w r2, r3, #7
8006ba2: 4613 mov r3, r2
8006ba4: 009b lsls r3, r3, #2
8006ba6: 4413 add r3, r2
8006ba8: 00db lsls r3, r3, #3
8006baa: f503 73a8 add.w r3, r3, #336 @ 0x150
8006bae: 68fa ldr r2, [r7, #12]
8006bb0: 4413 add r3, r2
8006bb2: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8006bb4: 697b ldr r3, [r7, #20]
8006bb6: 687a ldr r2, [r7, #4]
8006bb8: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006bba: 697b ldr r3, [r7, #20]
8006bbc: 683a ldr r2, [r7, #0]
8006bbe: 619a str r2, [r3, #24]
ep->xfer_count = 0U;
8006bc0: 697b ldr r3, [r7, #20]
8006bc2: 2200 movs r2, #0
8006bc4: 61da str r2, [r3, #28]
ep->is_in = 0U;
8006bc6: 697b ldr r3, [r7, #20]
8006bc8: 2200 movs r2, #0
8006bca: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006bcc: 7afb ldrb r3, [r7, #11]
8006bce: f003 0307 and.w r3, r3, #7
8006bd2: b2da uxtb r2, r3
8006bd4: 697b ldr r3, [r7, #20]
8006bd6: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006bd8: 68fb ldr r3, [r7, #12]
8006bda: 681b ldr r3, [r3, #0]
8006bdc: 6979 ldr r1, [r7, #20]
8006bde: 4618 mov r0, r3
8006be0: f003 fd8c bl 800a6fc <USB_EPStartXfer>
return HAL_OK;
8006be4: 2300 movs r3, #0
}
8006be6: 4618 mov r0, r3
8006be8: 3718 adds r7, #24
8006bea: 46bd mov sp, r7
8006bec: bd80 pop {r7, pc}
08006bee <HAL_PCD_EP_GetRxCount>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval Data Size
*/
uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef const *hpcd, uint8_t ep_addr)
{
8006bee: b480 push {r7}
8006bf0: b083 sub sp, #12
8006bf2: af00 add r7, sp, #0
8006bf4: 6078 str r0, [r7, #4]
8006bf6: 460b mov r3, r1
8006bf8: 70fb strb r3, [r7, #3]
return hpcd->OUT_ep[ep_addr & EP_ADDR_MSK].xfer_count;
8006bfa: 78fb ldrb r3, [r7, #3]
8006bfc: f003 0207 and.w r2, r3, #7
8006c00: 6879 ldr r1, [r7, #4]
8006c02: 4613 mov r3, r2
8006c04: 009b lsls r3, r3, #2
8006c06: 4413 add r3, r2
8006c08: 00db lsls r3, r3, #3
8006c0a: 440b add r3, r1
8006c0c: f503 73b6 add.w r3, r3, #364 @ 0x16c
8006c10: 681b ldr r3, [r3, #0]
}
8006c12: 4618 mov r0, r3
8006c14: 370c adds r7, #12
8006c16: 46bd mov sp, r7
8006c18: bc80 pop {r7}
8006c1a: 4770 bx lr
08006c1c <HAL_PCD_EP_Transmit>:
* @param pBuf pointer to the transmission buffer
* @param len amount of data to be sent
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len)
{
8006c1c: b580 push {r7, lr}
8006c1e: b086 sub sp, #24
8006c20: af00 add r7, sp, #0
8006c22: 60f8 str r0, [r7, #12]
8006c24: 607a str r2, [r7, #4]
8006c26: 603b str r3, [r7, #0]
8006c28: 460b mov r3, r1
8006c2a: 72fb strb r3, [r7, #11]
PCD_EPTypeDef *ep;
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006c2c: 7afb ldrb r3, [r7, #11]
8006c2e: f003 0207 and.w r2, r3, #7
8006c32: 4613 mov r3, r2
8006c34: 009b lsls r3, r3, #2
8006c36: 4413 add r3, r2
8006c38: 00db lsls r3, r3, #3
8006c3a: 3310 adds r3, #16
8006c3c: 68fa ldr r2, [r7, #12]
8006c3e: 4413 add r3, r2
8006c40: 617b str r3, [r7, #20]
/*setup and start the Xfer */
ep->xfer_buff = pBuf;
8006c42: 697b ldr r3, [r7, #20]
8006c44: 687a ldr r2, [r7, #4]
8006c46: 615a str r2, [r3, #20]
ep->xfer_len = len;
8006c48: 697b ldr r3, [r7, #20]
8006c4a: 683a ldr r2, [r7, #0]
8006c4c: 619a str r2, [r3, #24]
#if defined (USB)
ep->xfer_fill_db = 1U;
8006c4e: 697b ldr r3, [r7, #20]
8006c50: 2201 movs r2, #1
8006c52: f883 2024 strb.w r2, [r3, #36] @ 0x24
ep->xfer_len_db = len;
8006c56: 697b ldr r3, [r7, #20]
8006c58: 683a ldr r2, [r7, #0]
8006c5a: 621a str r2, [r3, #32]
#endif /* defined (USB) */
ep->xfer_count = 0U;
8006c5c: 697b ldr r3, [r7, #20]
8006c5e: 2200 movs r2, #0
8006c60: 61da str r2, [r3, #28]
ep->is_in = 1U;
8006c62: 697b ldr r3, [r7, #20]
8006c64: 2201 movs r2, #1
8006c66: 705a strb r2, [r3, #1]
ep->num = ep_addr & EP_ADDR_MSK;
8006c68: 7afb ldrb r3, [r7, #11]
8006c6a: f003 0307 and.w r3, r3, #7
8006c6e: b2da uxtb r2, r3
8006c70: 697b ldr r3, [r7, #20]
8006c72: 701a strb r2, [r3, #0]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8006c74: 68fb ldr r3, [r7, #12]
8006c76: 681b ldr r3, [r3, #0]
8006c78: 6979 ldr r1, [r7, #20]
8006c7a: 4618 mov r0, r3
8006c7c: f003 fd3e bl 800a6fc <USB_EPStartXfer>
return HAL_OK;
8006c80: 2300 movs r3, #0
}
8006c82: 4618 mov r0, r3
8006c84: 3718 adds r7, #24
8006c86: 46bd mov sp, r7
8006c88: bd80 pop {r7, pc}
08006c8a <HAL_PCD_EP_SetStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006c8a: b580 push {r7, lr}
8006c8c: b084 sub sp, #16
8006c8e: af00 add r7, sp, #0
8006c90: 6078 str r0, [r7, #4]
8006c92: 460b mov r3, r1
8006c94: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & EP_ADDR_MSK) > hpcd->Init.dev_endpoints)
8006c96: 78fb ldrb r3, [r7, #3]
8006c98: f003 0307 and.w r3, r3, #7
8006c9c: 687a ldr r2, [r7, #4]
8006c9e: 7912 ldrb r2, [r2, #4]
8006ca0: 4293 cmp r3, r2
8006ca2: d901 bls.n 8006ca8 <HAL_PCD_EP_SetStall+0x1e>
{
return HAL_ERROR;
8006ca4: 2301 movs r3, #1
8006ca6: e04c b.n 8006d42 <HAL_PCD_EP_SetStall+0xb8>
}
if ((0x80U & ep_addr) == 0x80U)
8006ca8: f997 3003 ldrsb.w r3, [r7, #3]
8006cac: 2b00 cmp r3, #0
8006cae: da0e bge.n 8006cce <HAL_PCD_EP_SetStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006cb0: 78fb ldrb r3, [r7, #3]
8006cb2: f003 0207 and.w r2, r3, #7
8006cb6: 4613 mov r3, r2
8006cb8: 009b lsls r3, r3, #2
8006cba: 4413 add r3, r2
8006cbc: 00db lsls r3, r3, #3
8006cbe: 3310 adds r3, #16
8006cc0: 687a ldr r2, [r7, #4]
8006cc2: 4413 add r3, r2
8006cc4: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006cc6: 68fb ldr r3, [r7, #12]
8006cc8: 2201 movs r2, #1
8006cca: 705a strb r2, [r3, #1]
8006ccc: e00c b.n 8006ce8 <HAL_PCD_EP_SetStall+0x5e>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8006cce: 78fa ldrb r2, [r7, #3]
8006cd0: 4613 mov r3, r2
8006cd2: 009b lsls r3, r3, #2
8006cd4: 4413 add r3, r2
8006cd6: 00db lsls r3, r3, #3
8006cd8: f503 73a8 add.w r3, r3, #336 @ 0x150
8006cdc: 687a ldr r2, [r7, #4]
8006cde: 4413 add r3, r2
8006ce0: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006ce2: 68fb ldr r3, [r7, #12]
8006ce4: 2200 movs r2, #0
8006ce6: 705a strb r2, [r3, #1]
}
ep->is_stall = 1U;
8006ce8: 68fb ldr r3, [r7, #12]
8006cea: 2201 movs r2, #1
8006cec: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006cee: 78fb ldrb r3, [r7, #3]
8006cf0: f003 0307 and.w r3, r3, #7
8006cf4: b2da uxtb r2, r3
8006cf6: 68fb ldr r3, [r7, #12]
8006cf8: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006cfa: 687b ldr r3, [r7, #4]
8006cfc: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006d00: 2b01 cmp r3, #1
8006d02: d101 bne.n 8006d08 <HAL_PCD_EP_SetStall+0x7e>
8006d04: 2302 movs r3, #2
8006d06: e01c b.n 8006d42 <HAL_PCD_EP_SetStall+0xb8>
8006d08: 687b ldr r3, [r7, #4]
8006d0a: 2201 movs r2, #1
8006d0c: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPSetStall(hpcd->Instance, ep);
8006d10: 687b ldr r3, [r7, #4]
8006d12: 681b ldr r3, [r3, #0]
8006d14: 68f9 ldr r1, [r7, #12]
8006d16: 4618 mov r0, r3
8006d18: f005 f8a1 bl 800be5e <USB_EPSetStall>
if ((ep_addr & EP_ADDR_MSK) == 0U)
8006d1c: 78fb ldrb r3, [r7, #3]
8006d1e: f003 0307 and.w r3, r3, #7
8006d22: 2b00 cmp r3, #0
8006d24: d108 bne.n 8006d38 <HAL_PCD_EP_SetStall+0xae>
{
(void)USB_EP0_OutStart(hpcd->Instance, (uint8_t *)hpcd->Setup);
8006d26: 687b ldr r3, [r7, #4]
8006d28: 681a ldr r2, [r3, #0]
8006d2a: 687b ldr r3, [r7, #4]
8006d2c: f503 7326 add.w r3, r3, #664 @ 0x298
8006d30: 4619 mov r1, r3
8006d32: 4610 mov r0, r2
8006d34: f005 f9c6 bl 800c0c4 <USB_EP0_OutStart>
}
__HAL_UNLOCK(hpcd);
8006d38: 687b ldr r3, [r7, #4]
8006d3a: 2200 movs r2, #0
8006d3c: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006d40: 2300 movs r3, #0
}
8006d42: 4618 mov r0, r3
8006d44: 3710 adds r7, #16
8006d46: 46bd mov sp, r7
8006d48: bd80 pop {r7, pc}
08006d4a <HAL_PCD_EP_ClrStall>:
* @param hpcd PCD handle
* @param ep_addr endpoint address
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr)
{
8006d4a: b580 push {r7, lr}
8006d4c: b084 sub sp, #16
8006d4e: af00 add r7, sp, #0
8006d50: 6078 str r0, [r7, #4]
8006d52: 460b mov r3, r1
8006d54: 70fb strb r3, [r7, #3]
PCD_EPTypeDef *ep;
if (((uint32_t)ep_addr & 0x0FU) > hpcd->Init.dev_endpoints)
8006d56: 78fb ldrb r3, [r7, #3]
8006d58: f003 030f and.w r3, r3, #15
8006d5c: 687a ldr r2, [r7, #4]
8006d5e: 7912 ldrb r2, [r2, #4]
8006d60: 4293 cmp r3, r2
8006d62: d901 bls.n 8006d68 <HAL_PCD_EP_ClrStall+0x1e>
{
return HAL_ERROR;
8006d64: 2301 movs r3, #1
8006d66: e040 b.n 8006dea <HAL_PCD_EP_ClrStall+0xa0>
}
if ((0x80U & ep_addr) == 0x80U)
8006d68: f997 3003 ldrsb.w r3, [r7, #3]
8006d6c: 2b00 cmp r3, #0
8006d6e: da0e bge.n 8006d8e <HAL_PCD_EP_ClrStall+0x44>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8006d70: 78fb ldrb r3, [r7, #3]
8006d72: f003 0207 and.w r2, r3, #7
8006d76: 4613 mov r3, r2
8006d78: 009b lsls r3, r3, #2
8006d7a: 4413 add r3, r2
8006d7c: 00db lsls r3, r3, #3
8006d7e: 3310 adds r3, #16
8006d80: 687a ldr r2, [r7, #4]
8006d82: 4413 add r3, r2
8006d84: 60fb str r3, [r7, #12]
ep->is_in = 1U;
8006d86: 68fb ldr r3, [r7, #12]
8006d88: 2201 movs r2, #1
8006d8a: 705a strb r2, [r3, #1]
8006d8c: e00e b.n 8006dac <HAL_PCD_EP_ClrStall+0x62>
}
else
{
ep = &hpcd->OUT_ep[ep_addr & EP_ADDR_MSK];
8006d8e: 78fb ldrb r3, [r7, #3]
8006d90: f003 0207 and.w r2, r3, #7
8006d94: 4613 mov r3, r2
8006d96: 009b lsls r3, r3, #2
8006d98: 4413 add r3, r2
8006d9a: 00db lsls r3, r3, #3
8006d9c: f503 73a8 add.w r3, r3, #336 @ 0x150
8006da0: 687a ldr r2, [r7, #4]
8006da2: 4413 add r3, r2
8006da4: 60fb str r3, [r7, #12]
ep->is_in = 0U;
8006da6: 68fb ldr r3, [r7, #12]
8006da8: 2200 movs r2, #0
8006daa: 705a strb r2, [r3, #1]
}
ep->is_stall = 0U;
8006dac: 68fb ldr r3, [r7, #12]
8006dae: 2200 movs r2, #0
8006db0: 709a strb r2, [r3, #2]
ep->num = ep_addr & EP_ADDR_MSK;
8006db2: 78fb ldrb r3, [r7, #3]
8006db4: f003 0307 and.w r3, r3, #7
8006db8: b2da uxtb r2, r3
8006dba: 68fb ldr r3, [r7, #12]
8006dbc: 701a strb r2, [r3, #0]
__HAL_LOCK(hpcd);
8006dbe: 687b ldr r3, [r7, #4]
8006dc0: f893 3290 ldrb.w r3, [r3, #656] @ 0x290
8006dc4: 2b01 cmp r3, #1
8006dc6: d101 bne.n 8006dcc <HAL_PCD_EP_ClrStall+0x82>
8006dc8: 2302 movs r3, #2
8006dca: e00e b.n 8006dea <HAL_PCD_EP_ClrStall+0xa0>
8006dcc: 687b ldr r3, [r7, #4]
8006dce: 2201 movs r2, #1
8006dd0: f883 2290 strb.w r2, [r3, #656] @ 0x290
(void)USB_EPClearStall(hpcd->Instance, ep);
8006dd4: 687b ldr r3, [r7, #4]
8006dd6: 681b ldr r3, [r3, #0]
8006dd8: 68f9 ldr r1, [r7, #12]
8006dda: 4618 mov r0, r3
8006ddc: f005 f88f bl 800befe <USB_EPClearStall>
__HAL_UNLOCK(hpcd);
8006de0: 687b ldr r3, [r7, #4]
8006de2: 2200 movs r2, #0
8006de4: f883 2290 strb.w r2, [r3, #656] @ 0x290
return HAL_OK;
8006de8: 2300 movs r3, #0
}
8006dea: 4618 mov r0, r3
8006dec: 3710 adds r7, #16
8006dee: 46bd mov sp, r7
8006df0: bd80 pop {r7, pc}
08006df2 <PCD_EP_ISR_Handler>:
* @brief This function handles PCD Endpoint interrupt request.
* @param hpcd PCD handle
* @retval HAL status
*/
static HAL_StatusTypeDef PCD_EP_ISR_Handler(PCD_HandleTypeDef *hpcd)
{
8006df2: b580 push {r7, lr}
8006df4: b096 sub sp, #88 @ 0x58
8006df6: af00 add r7, sp, #0
8006df8: 6078 str r0, [r7, #4]
#if (USE_USB_DOUBLE_BUFFER != 1U)
count = 0U;
#endif /* USE_USB_DOUBLE_BUFFER */
/* stay in loop while pending interrupts */
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8006dfa: e3bb b.n 8007574 <PCD_EP_ISR_Handler+0x782>
{
wIstr = hpcd->Instance->ISTR;
8006dfc: 687b ldr r3, [r7, #4]
8006dfe: 681b ldr r3, [r3, #0]
8006e00: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
8006e04: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
/* extract highest priority endpoint number */
epindex = (uint8_t)(wIstr & USB_ISTR_EP_ID);
8006e08: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006e0c: b2db uxtb r3, r3
8006e0e: f003 030f and.w r3, r3, #15
8006e12: f887 304d strb.w r3, [r7, #77] @ 0x4d
if (epindex == 0U)
8006e16: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8006e1a: 2b00 cmp r3, #0
8006e1c: f040 8175 bne.w 800710a <PCD_EP_ISR_Handler+0x318>
{
/* Decode and service control endpoint interrupt */
/* DIR bit = origin of the interrupt */
if ((wIstr & USB_ISTR_DIR) == 0U)
8006e20: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8006e24: f003 0310 and.w r3, r3, #16
8006e28: 2b00 cmp r3, #0
8006e2a: d14e bne.n 8006eca <PCD_EP_ISR_Handler+0xd8>
{
/* DIR = 0 */
/* DIR = 0 => IN int */
/* DIR = 0 implies that (EP_CTR_TX = 1) always */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006e2c: 687b ldr r3, [r7, #4]
8006e2e: 681b ldr r3, [r3, #0]
8006e30: 881b ldrh r3, [r3, #0]
8006e32: b29b uxth r3, r3
8006e34: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8006e38: f023 0370 bic.w r3, r3, #112 @ 0x70
8006e3c: 81fb strh r3, [r7, #14]
8006e3e: 687b ldr r3, [r7, #4]
8006e40: 681a ldr r2, [r3, #0]
8006e42: 89fb ldrh r3, [r7, #14]
8006e44: ea6f 4343 mvn.w r3, r3, lsl #17
8006e48: ea6f 4353 mvn.w r3, r3, lsr #17
8006e4c: b29b uxth r3, r3
8006e4e: 8013 strh r3, [r2, #0]
ep = &hpcd->IN_ep[0];
8006e50: 687b ldr r3, [r7, #4]
8006e52: 3310 adds r3, #16
8006e54: 657b str r3, [r7, #84] @ 0x54
ep->xfer_count = PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
8006e56: 687b ldr r3, [r7, #4]
8006e58: 681b ldr r3, [r3, #0]
8006e5a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006e5e: b29b uxth r3, r3
8006e60: 461a mov r2, r3
8006e62: 6d7b ldr r3, [r7, #84] @ 0x54
8006e64: 781b ldrb r3, [r3, #0]
8006e66: 00db lsls r3, r3, #3
8006e68: 4413 add r3, r2
8006e6a: 3302 adds r3, #2
8006e6c: 005b lsls r3, r3, #1
8006e6e: 687a ldr r2, [r7, #4]
8006e70: 6812 ldr r2, [r2, #0]
8006e72: 4413 add r3, r2
8006e74: f503 6380 add.w r3, r3, #1024 @ 0x400
8006e78: 881b ldrh r3, [r3, #0]
8006e7a: f3c3 0209 ubfx r2, r3, #0, #10
8006e7e: 6d7b ldr r3, [r7, #84] @ 0x54
8006e80: 61da str r2, [r3, #28]
ep->xfer_buff += ep->xfer_count;
8006e82: 6d7b ldr r3, [r7, #84] @ 0x54
8006e84: 695a ldr r2, [r3, #20]
8006e86: 6d7b ldr r3, [r7, #84] @ 0x54
8006e88: 69db ldr r3, [r3, #28]
8006e8a: 441a add r2, r3
8006e8c: 6d7b ldr r3, [r7, #84] @ 0x54
8006e8e: 615a str r2, [r3, #20]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, 0U);
#else
HAL_PCD_DataInStageCallback(hpcd, 0U);
8006e90: 2100 movs r1, #0
8006e92: 6878 ldr r0, [r7, #4]
8006e94: f006 ffe5 bl 800de62 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((hpcd->USB_Address > 0U) && (ep->xfer_len == 0U))
8006e98: 687b ldr r3, [r7, #4]
8006e9a: 7b5b ldrb r3, [r3, #13]
8006e9c: b2db uxtb r3, r3
8006e9e: 2b00 cmp r3, #0
8006ea0: f000 8368 beq.w 8007574 <PCD_EP_ISR_Handler+0x782>
8006ea4: 6d7b ldr r3, [r7, #84] @ 0x54
8006ea6: 699b ldr r3, [r3, #24]
8006ea8: 2b00 cmp r3, #0
8006eaa: f040 8363 bne.w 8007574 <PCD_EP_ISR_Handler+0x782>
{
hpcd->Instance->DADDR = ((uint16_t)hpcd->USB_Address | USB_DADDR_EF);
8006eae: 687b ldr r3, [r7, #4]
8006eb0: 7b5b ldrb r3, [r3, #13]
8006eb2: b2db uxtb r3, r3
8006eb4: f063 037f orn r3, r3, #127 @ 0x7f
8006eb8: b2da uxtb r2, r3
8006eba: 687b ldr r3, [r7, #4]
8006ebc: 681b ldr r3, [r3, #0]
8006ebe: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
hpcd->USB_Address = 0U;
8006ec2: 687b ldr r3, [r7, #4]
8006ec4: 2200 movs r2, #0
8006ec6: 735a strb r2, [r3, #13]
8006ec8: e354 b.n 8007574 <PCD_EP_ISR_Handler+0x782>
{
/* DIR = 1 */
/* DIR = 1 & CTR_RX => SETUP or OUT int */
/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
ep = &hpcd->OUT_ep[0];
8006eca: 687b ldr r3, [r7, #4]
8006ecc: f503 73a8 add.w r3, r3, #336 @ 0x150
8006ed0: 657b str r3, [r7, #84] @ 0x54
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8006ed2: 687b ldr r3, [r7, #4]
8006ed4: 681b ldr r3, [r3, #0]
8006ed6: 881b ldrh r3, [r3, #0]
8006ed8: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_SETUP) != 0U)
8006edc: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006ee0: f403 6300 and.w r3, r3, #2048 @ 0x800
8006ee4: 2b00 cmp r3, #0
8006ee6: d034 beq.n 8006f52 <PCD_EP_ISR_Handler+0x160>
{
/* Get SETUP Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8006ee8: 687b ldr r3, [r7, #4]
8006eea: 681b ldr r3, [r3, #0]
8006eec: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006ef0: b29b uxth r3, r3
8006ef2: 461a mov r2, r3
8006ef4: 6d7b ldr r3, [r7, #84] @ 0x54
8006ef6: 781b ldrb r3, [r3, #0]
8006ef8: 00db lsls r3, r3, #3
8006efa: 4413 add r3, r2
8006efc: 3306 adds r3, #6
8006efe: 005b lsls r3, r3, #1
8006f00: 687a ldr r2, [r7, #4]
8006f02: 6812 ldr r2, [r2, #0]
8006f04: 4413 add r3, r2
8006f06: f503 6380 add.w r3, r3, #1024 @ 0x400
8006f0a: 881b ldrh r3, [r3, #0]
8006f0c: f3c3 0209 ubfx r2, r3, #0, #10
8006f10: 6d7b ldr r3, [r7, #84] @ 0x54
8006f12: 61da str r2, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8006f14: 687b ldr r3, [r7, #4]
8006f16: 6818 ldr r0, [r3, #0]
8006f18: 687b ldr r3, [r7, #4]
8006f1a: f503 7126 add.w r1, r3, #664 @ 0x298
8006f1e: 6d7b ldr r3, [r7, #84] @ 0x54
8006f20: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8006f22: 6d7b ldr r3, [r7, #84] @ 0x54
8006f24: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, (uint8_t *)hpcd->Setup,
8006f26: b29b uxth r3, r3
8006f28: f005 f91d bl 800c166 <USB_ReadPMA>
/* SETUP bit kept frozen while CTR_RX = 1 */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006f2c: 687b ldr r3, [r7, #4]
8006f2e: 681b ldr r3, [r3, #0]
8006f30: 881b ldrh r3, [r3, #0]
8006f32: b29a uxth r2, r3
8006f34: f640 738f movw r3, #3983 @ 0xf8f
8006f38: 4013 ands r3, r2
8006f3a: 823b strh r3, [r7, #16]
8006f3c: 687b ldr r3, [r7, #4]
8006f3e: 681b ldr r3, [r3, #0]
8006f40: 8a3a ldrh r2, [r7, #16]
8006f42: f042 0280 orr.w r2, r2, #128 @ 0x80
8006f46: b292 uxth r2, r2
8006f48: 801a strh r2, [r3, #0]
/* Process SETUP Packet*/
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->SetupStageCallback(hpcd);
#else
HAL_PCD_SetupStageCallback(hpcd);
8006f4a: 6878 ldr r0, [r7, #4]
8006f4c: f006 ff5c bl 800de08 <HAL_PCD_SetupStageCallback>
8006f50: e310 b.n 8007574 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else if ((wEPVal & USB_EP_CTR_RX) != 0U)
8006f52: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8006f56: 2b00 cmp r3, #0
8006f58: f280 830c bge.w 8007574 <PCD_EP_ISR_Handler+0x782>
{
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, PCD_ENDP0);
8006f5c: 687b ldr r3, [r7, #4]
8006f5e: 681b ldr r3, [r3, #0]
8006f60: 881b ldrh r3, [r3, #0]
8006f62: b29a uxth r2, r3
8006f64: f640 738f movw r3, #3983 @ 0xf8f
8006f68: 4013 ands r3, r2
8006f6a: 83fb strh r3, [r7, #30]
8006f6c: 687b ldr r3, [r7, #4]
8006f6e: 681b ldr r3, [r3, #0]
8006f70: 8bfa ldrh r2, [r7, #30]
8006f72: f042 0280 orr.w r2, r2, #128 @ 0x80
8006f76: b292 uxth r2, r2
8006f78: 801a strh r2, [r3, #0]
/* Get Control Data OUT Packet */
ep->xfer_count = PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
8006f7a: 687b ldr r3, [r7, #4]
8006f7c: 681b ldr r3, [r3, #0]
8006f7e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8006f82: b29b uxth r3, r3
8006f84: 461a mov r2, r3
8006f86: 6d7b ldr r3, [r7, #84] @ 0x54
8006f88: 781b ldrb r3, [r3, #0]
8006f8a: 00db lsls r3, r3, #3
8006f8c: 4413 add r3, r2
8006f8e: 3306 adds r3, #6
8006f90: 005b lsls r3, r3, #1
8006f92: 687a ldr r2, [r7, #4]
8006f94: 6812 ldr r2, [r2, #0]
8006f96: 4413 add r3, r2
8006f98: f503 6380 add.w r3, r3, #1024 @ 0x400
8006f9c: 881b ldrh r3, [r3, #0]
8006f9e: f3c3 0209 ubfx r2, r3, #0, #10
8006fa2: 6d7b ldr r3, [r7, #84] @ 0x54
8006fa4: 61da str r2, [r3, #28]
if ((ep->xfer_count != 0U) && (ep->xfer_buff != 0U))
8006fa6: 6d7b ldr r3, [r7, #84] @ 0x54
8006fa8: 69db ldr r3, [r3, #28]
8006faa: 2b00 cmp r3, #0
8006fac: d019 beq.n 8006fe2 <PCD_EP_ISR_Handler+0x1f0>
8006fae: 6d7b ldr r3, [r7, #84] @ 0x54
8006fb0: 695b ldr r3, [r3, #20]
8006fb2: 2b00 cmp r3, #0
8006fb4: d015 beq.n 8006fe2 <PCD_EP_ISR_Handler+0x1f0>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8006fb6: 687b ldr r3, [r7, #4]
8006fb8: 6818 ldr r0, [r3, #0]
8006fba: 6d7b ldr r3, [r7, #84] @ 0x54
8006fbc: 6959 ldr r1, [r3, #20]
8006fbe: 6d7b ldr r3, [r7, #84] @ 0x54
8006fc0: 88da ldrh r2, [r3, #6]
ep->pmaadress, (uint16_t)ep->xfer_count);
8006fc2: 6d7b ldr r3, [r7, #84] @ 0x54
8006fc4: 69db ldr r3, [r3, #28]
USB_ReadPMA(hpcd->Instance, ep->xfer_buff,
8006fc6: b29b uxth r3, r3
8006fc8: f005 f8cd bl 800c166 <USB_ReadPMA>
ep->xfer_buff += ep->xfer_count;
8006fcc: 6d7b ldr r3, [r7, #84] @ 0x54
8006fce: 695a ldr r2, [r3, #20]
8006fd0: 6d7b ldr r3, [r7, #84] @ 0x54
8006fd2: 69db ldr r3, [r3, #28]
8006fd4: 441a add r2, r3
8006fd6: 6d7b ldr r3, [r7, #84] @ 0x54
8006fd8: 615a str r2, [r3, #20]
/* Process Control Data OUT Packet */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, 0U);
#else
HAL_PCD_DataOutStageCallback(hpcd, 0U);
8006fda: 2100 movs r1, #0
8006fdc: 6878 ldr r0, [r7, #4]
8006fde: f006 ff25 bl 800de2c <HAL_PCD_DataOutStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
wEPVal = (uint16_t)PCD_GET_ENDPOINT(hpcd->Instance, PCD_ENDP0);
8006fe2: 687b ldr r3, [r7, #4]
8006fe4: 681b ldr r3, [r3, #0]
8006fe6: 881b ldrh r3, [r3, #0]
8006fe8: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if (((wEPVal & USB_EP_SETUP) == 0U) && ((wEPVal & USB_EP_RX_STRX) != USB_EP_RX_VALID))
8006fec: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006ff0: f403 6300 and.w r3, r3, #2048 @ 0x800
8006ff4: 2b00 cmp r3, #0
8006ff6: f040 82bd bne.w 8007574 <PCD_EP_ISR_Handler+0x782>
8006ffa: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8006ffe: f403 5340 and.w r3, r3, #12288 @ 0x3000
8007002: f5b3 5f40 cmp.w r3, #12288 @ 0x3000
8007006: f000 82b5 beq.w 8007574 <PCD_EP_ISR_Handler+0x782>
{
PCD_SET_EP_RX_CNT(hpcd->Instance, PCD_ENDP0, ep->maxpacket);
800700a: 687b ldr r3, [r7, #4]
800700c: 681b ldr r3, [r3, #0]
800700e: 61bb str r3, [r7, #24]
8007010: 687b ldr r3, [r7, #4]
8007012: 681b ldr r3, [r3, #0]
8007014: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007018: b29b uxth r3, r3
800701a: 461a mov r2, r3
800701c: 69bb ldr r3, [r7, #24]
800701e: 4413 add r3, r2
8007020: 61bb str r3, [r7, #24]
8007022: 69bb ldr r3, [r7, #24]
8007024: f203 430c addw r3, r3, #1036 @ 0x40c
8007028: 617b str r3, [r7, #20]
800702a: 697b ldr r3, [r7, #20]
800702c: 881b ldrh r3, [r3, #0]
800702e: b29b uxth r3, r3
8007030: f3c3 0309 ubfx r3, r3, #0, #10
8007034: b29a uxth r2, r3
8007036: 697b ldr r3, [r7, #20]
8007038: 801a strh r2, [r3, #0]
800703a: 6d7b ldr r3, [r7, #84] @ 0x54
800703c: 691b ldr r3, [r3, #16]
800703e: 2b3e cmp r3, #62 @ 0x3e
8007040: d91d bls.n 800707e <PCD_EP_ISR_Handler+0x28c>
8007042: 6d7b ldr r3, [r7, #84] @ 0x54
8007044: 691b ldr r3, [r3, #16]
8007046: 095b lsrs r3, r3, #5
8007048: 647b str r3, [r7, #68] @ 0x44
800704a: 6d7b ldr r3, [r7, #84] @ 0x54
800704c: 691b ldr r3, [r3, #16]
800704e: f003 031f and.w r3, r3, #31
8007052: 2b00 cmp r3, #0
8007054: d102 bne.n 800705c <PCD_EP_ISR_Handler+0x26a>
8007056: 6c7b ldr r3, [r7, #68] @ 0x44
8007058: 3b01 subs r3, #1
800705a: 647b str r3, [r7, #68] @ 0x44
800705c: 697b ldr r3, [r7, #20]
800705e: 881b ldrh r3, [r3, #0]
8007060: b29a uxth r2, r3
8007062: 6c7b ldr r3, [r7, #68] @ 0x44
8007064: b29b uxth r3, r3
8007066: 029b lsls r3, r3, #10
8007068: b29b uxth r3, r3
800706a: 4313 orrs r3, r2
800706c: b29b uxth r3, r3
800706e: ea6f 4343 mvn.w r3, r3, lsl #17
8007072: ea6f 4353 mvn.w r3, r3, lsr #17
8007076: b29a uxth r2, r3
8007078: 697b ldr r3, [r7, #20]
800707a: 801a strh r2, [r3, #0]
800707c: e026 b.n 80070cc <PCD_EP_ISR_Handler+0x2da>
800707e: 6d7b ldr r3, [r7, #84] @ 0x54
8007080: 691b ldr r3, [r3, #16]
8007082: 2b00 cmp r3, #0
8007084: d10a bne.n 800709c <PCD_EP_ISR_Handler+0x2aa>
8007086: 697b ldr r3, [r7, #20]
8007088: 881b ldrh r3, [r3, #0]
800708a: b29b uxth r3, r3
800708c: ea6f 4343 mvn.w r3, r3, lsl #17
8007090: ea6f 4353 mvn.w r3, r3, lsr #17
8007094: b29a uxth r2, r3
8007096: 697b ldr r3, [r7, #20]
8007098: 801a strh r2, [r3, #0]
800709a: e017 b.n 80070cc <PCD_EP_ISR_Handler+0x2da>
800709c: 6d7b ldr r3, [r7, #84] @ 0x54
800709e: 691b ldr r3, [r3, #16]
80070a0: 085b lsrs r3, r3, #1
80070a2: 647b str r3, [r7, #68] @ 0x44
80070a4: 6d7b ldr r3, [r7, #84] @ 0x54
80070a6: 691b ldr r3, [r3, #16]
80070a8: f003 0301 and.w r3, r3, #1
80070ac: 2b00 cmp r3, #0
80070ae: d002 beq.n 80070b6 <PCD_EP_ISR_Handler+0x2c4>
80070b0: 6c7b ldr r3, [r7, #68] @ 0x44
80070b2: 3301 adds r3, #1
80070b4: 647b str r3, [r7, #68] @ 0x44
80070b6: 697b ldr r3, [r7, #20]
80070b8: 881b ldrh r3, [r3, #0]
80070ba: b29a uxth r2, r3
80070bc: 6c7b ldr r3, [r7, #68] @ 0x44
80070be: b29b uxth r3, r3
80070c0: 029b lsls r3, r3, #10
80070c2: b29b uxth r3, r3
80070c4: 4313 orrs r3, r2
80070c6: b29a uxth r2, r3
80070c8: 697b ldr r3, [r7, #20]
80070ca: 801a strh r2, [r3, #0]
PCD_SET_EP_RX_STATUS(hpcd->Instance, PCD_ENDP0, USB_EP_RX_VALID);
80070cc: 687b ldr r3, [r7, #4]
80070ce: 681b ldr r3, [r3, #0]
80070d0: 881b ldrh r3, [r3, #0]
80070d2: b29b uxth r3, r3
80070d4: f423 4380 bic.w r3, r3, #16384 @ 0x4000
80070d8: f023 0370 bic.w r3, r3, #112 @ 0x70
80070dc: 827b strh r3, [r7, #18]
80070de: 8a7b ldrh r3, [r7, #18]
80070e0: f483 5380 eor.w r3, r3, #4096 @ 0x1000
80070e4: 827b strh r3, [r7, #18]
80070e6: 8a7b ldrh r3, [r7, #18]
80070e8: f483 5300 eor.w r3, r3, #8192 @ 0x2000
80070ec: 827b strh r3, [r7, #18]
80070ee: 687b ldr r3, [r7, #4]
80070f0: 681a ldr r2, [r3, #0]
80070f2: 8a7b ldrh r3, [r7, #18]
80070f4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80070f8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80070fc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007100: f043 0380 orr.w r3, r3, #128 @ 0x80
8007104: b29b uxth r3, r3
8007106: 8013 strh r3, [r2, #0]
8007108: e234 b.n 8007574 <PCD_EP_ISR_Handler+0x782>
}
else
{
/* Decode and service non control endpoints interrupt */
/* process related endpoint register */
wEPVal = PCD_GET_ENDPOINT(hpcd->Instance, epindex);
800710a: 687b ldr r3, [r7, #4]
800710c: 681b ldr r3, [r3, #0]
800710e: 461a mov r2, r3
8007110: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8007114: 009b lsls r3, r3, #2
8007116: 4413 add r3, r2
8007118: 881b ldrh r3, [r3, #0]
800711a: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
if ((wEPVal & USB_EP_CTR_RX) != 0U)
800711e: f9b7 304a ldrsh.w r3, [r7, #74] @ 0x4a
8007122: 2b00 cmp r3, #0
8007124: f280 80fc bge.w 8007320 <PCD_EP_ISR_Handler+0x52e>
{
/* clear int flag */
PCD_CLEAR_RX_EP_CTR(hpcd->Instance, epindex);
8007128: 687b ldr r3, [r7, #4]
800712a: 681b ldr r3, [r3, #0]
800712c: 461a mov r2, r3
800712e: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
8007132: 009b lsls r3, r3, #2
8007134: 4413 add r3, r2
8007136: 881b ldrh r3, [r3, #0]
8007138: b29a uxth r2, r3
800713a: f640 738f movw r3, #3983 @ 0xf8f
800713e: 4013 ands r3, r2
8007140: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
8007144: 687b ldr r3, [r7, #4]
8007146: 681b ldr r3, [r3, #0]
8007148: 461a mov r2, r3
800714a: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800714e: 009b lsls r3, r3, #2
8007150: 4413 add r3, r2
8007152: f8b7 2048 ldrh.w r2, [r7, #72] @ 0x48
8007156: f042 0280 orr.w r2, r2, #128 @ 0x80
800715a: b292 uxth r2, r2
800715c: 801a strh r2, [r3, #0]
ep = &hpcd->OUT_ep[epindex];
800715e: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8007162: 4613 mov r3, r2
8007164: 009b lsls r3, r3, #2
8007166: 4413 add r3, r2
8007168: 00db lsls r3, r3, #3
800716a: f503 73a8 add.w r3, r3, #336 @ 0x150
800716e: 687a ldr r2, [r7, #4]
8007170: 4413 add r3, r2
8007172: 657b str r3, [r7, #84] @ 0x54
/* OUT Single Buffering */
if (ep->doublebuffer == 0U)
8007174: 6d7b ldr r3, [r7, #84] @ 0x54
8007176: 7b1b ldrb r3, [r3, #12]
8007178: 2b00 cmp r3, #0
800717a: d125 bne.n 80071c8 <PCD_EP_ISR_Handler+0x3d6>
{
count = (uint16_t)PCD_GET_EP_RX_CNT(hpcd->Instance, ep->num);
800717c: 687b ldr r3, [r7, #4]
800717e: 681b ldr r3, [r3, #0]
8007180: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007184: b29b uxth r3, r3
8007186: 461a mov r2, r3
8007188: 6d7b ldr r3, [r7, #84] @ 0x54
800718a: 781b ldrb r3, [r3, #0]
800718c: 00db lsls r3, r3, #3
800718e: 4413 add r3, r2
8007190: 3306 adds r3, #6
8007192: 005b lsls r3, r3, #1
8007194: 687a ldr r2, [r7, #4]
8007196: 6812 ldr r2, [r2, #0]
8007198: 4413 add r3, r2
800719a: f503 6380 add.w r3, r3, #1024 @ 0x400
800719e: 881b ldrh r3, [r3, #0]
80071a0: f3c3 0309 ubfx r3, r3, #0, #10
80071a4: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80071a8: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80071ac: 2b00 cmp r3, #0
80071ae: f000 8092 beq.w 80072d6 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaadress, count);
80071b2: 687b ldr r3, [r7, #4]
80071b4: 6818 ldr r0, [r3, #0]
80071b6: 6d7b ldr r3, [r7, #84] @ 0x54
80071b8: 6959 ldr r1, [r3, #20]
80071ba: 6d7b ldr r3, [r7, #84] @ 0x54
80071bc: 88da ldrh r2, [r3, #6]
80071be: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80071c2: f004 ffd0 bl 800c166 <USB_ReadPMA>
80071c6: e086 b.n 80072d6 <PCD_EP_ISR_Handler+0x4e4>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* manage double buffer bulk out */
if (ep->type == EP_TYPE_BULK)
80071c8: 6d7b ldr r3, [r7, #84] @ 0x54
80071ca: 78db ldrb r3, [r3, #3]
80071cc: 2b02 cmp r3, #2
80071ce: d10a bne.n 80071e6 <PCD_EP_ISR_Handler+0x3f4>
{
count = HAL_PCD_EP_DB_Receive(hpcd, ep, wEPVal);
80071d0: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80071d4: 461a mov r2, r3
80071d6: 6d79 ldr r1, [r7, #84] @ 0x54
80071d8: 6878 ldr r0, [r7, #4]
80071da: f000 f9d9 bl 8007590 <HAL_PCD_EP_DB_Receive>
80071de: 4603 mov r3, r0
80071e0: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
80071e4: e077 b.n 80072d6 <PCD_EP_ISR_Handler+0x4e4>
}
else /* manage double buffer iso out */
{
/* free EP OUT Buffer */
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
80071e6: 687b ldr r3, [r7, #4]
80071e8: 681b ldr r3, [r3, #0]
80071ea: 461a mov r2, r3
80071ec: 6d7b ldr r3, [r7, #84] @ 0x54
80071ee: 781b ldrb r3, [r3, #0]
80071f0: 009b lsls r3, r3, #2
80071f2: 4413 add r3, r2
80071f4: 881b ldrh r3, [r3, #0]
80071f6: b29b uxth r3, r3
80071f8: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80071fc: f023 0370 bic.w r3, r3, #112 @ 0x70
8007200: f8a7 3052 strh.w r3, [r7, #82] @ 0x52
8007204: 687b ldr r3, [r7, #4]
8007206: 681b ldr r3, [r3, #0]
8007208: 461a mov r2, r3
800720a: 6d7b ldr r3, [r7, #84] @ 0x54
800720c: 781b ldrb r3, [r3, #0]
800720e: 009b lsls r3, r3, #2
8007210: 441a add r2, r3
8007212: f8b7 3052 ldrh.w r3, [r7, #82] @ 0x52
8007216: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800721a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800721e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007222: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007226: b29b uxth r3, r3
8007228: 8013 strh r3, [r2, #0]
if ((PCD_GET_ENDPOINT(hpcd->Instance, ep->num) & USB_EP_DTOG_RX) != 0U)
800722a: 687b ldr r3, [r7, #4]
800722c: 681b ldr r3, [r3, #0]
800722e: 461a mov r2, r3
8007230: 6d7b ldr r3, [r7, #84] @ 0x54
8007232: 781b ldrb r3, [r3, #0]
8007234: 009b lsls r3, r3, #2
8007236: 4413 add r3, r2
8007238: 881b ldrh r3, [r3, #0]
800723a: b29b uxth r3, r3
800723c: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007240: 2b00 cmp r3, #0
8007242: d024 beq.n 800728e <PCD_EP_ISR_Handler+0x49c>
{
/* read from endpoint BUF0Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
8007244: 687b ldr r3, [r7, #4]
8007246: 681b ldr r3, [r3, #0]
8007248: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800724c: b29b uxth r3, r3
800724e: 461a mov r2, r3
8007250: 6d7b ldr r3, [r7, #84] @ 0x54
8007252: 781b ldrb r3, [r3, #0]
8007254: 00db lsls r3, r3, #3
8007256: 4413 add r3, r2
8007258: 3302 adds r3, #2
800725a: 005b lsls r3, r3, #1
800725c: 687a ldr r2, [r7, #4]
800725e: 6812 ldr r2, [r2, #0]
8007260: 4413 add r3, r2
8007262: f503 6380 add.w r3, r3, #1024 @ 0x400
8007266: 881b ldrh r3, [r3, #0]
8007268: f3c3 0309 ubfx r3, r3, #0, #10
800726c: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
8007270: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007274: 2b00 cmp r3, #0
8007276: d02e beq.n 80072d6 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8007278: 687b ldr r3, [r7, #4]
800727a: 6818 ldr r0, [r3, #0]
800727c: 6d7b ldr r3, [r7, #84] @ 0x54
800727e: 6959 ldr r1, [r3, #20]
8007280: 6d7b ldr r3, [r7, #84] @ 0x54
8007282: 891a ldrh r2, [r3, #8]
8007284: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
8007288: f004 ff6d bl 800c166 <USB_ReadPMA>
800728c: e023 b.n 80072d6 <PCD_EP_ISR_Handler+0x4e4>
}
}
else
{
/* read from endpoint BUF1Addr buffer */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
800728e: 687b ldr r3, [r7, #4]
8007290: 681b ldr r3, [r3, #0]
8007292: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007296: b29b uxth r3, r3
8007298: 461a mov r2, r3
800729a: 6d7b ldr r3, [r7, #84] @ 0x54
800729c: 781b ldrb r3, [r3, #0]
800729e: 00db lsls r3, r3, #3
80072a0: 4413 add r3, r2
80072a2: 3306 adds r3, #6
80072a4: 005b lsls r3, r3, #1
80072a6: 687a ldr r2, [r7, #4]
80072a8: 6812 ldr r2, [r2, #0]
80072aa: 4413 add r3, r2
80072ac: f503 6380 add.w r3, r3, #1024 @ 0x400
80072b0: 881b ldrh r3, [r3, #0]
80072b2: f3c3 0309 ubfx r3, r3, #0, #10
80072b6: f8a7 3050 strh.w r3, [r7, #80] @ 0x50
if (count != 0U)
80072ba: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80072be: 2b00 cmp r3, #0
80072c0: d009 beq.n 80072d6 <PCD_EP_ISR_Handler+0x4e4>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
80072c2: 687b ldr r3, [r7, #4]
80072c4: 6818 ldr r0, [r3, #0]
80072c6: 6d7b ldr r3, [r7, #84] @ 0x54
80072c8: 6959 ldr r1, [r3, #20]
80072ca: 6d7b ldr r3, [r7, #84] @ 0x54
80072cc: 895a ldrh r2, [r3, #10]
80072ce: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80072d2: f004 ff48 bl 800c166 <USB_ReadPMA>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* multi-packet on the NON control OUT endpoint */
ep->xfer_count += count;
80072d6: 6d7b ldr r3, [r7, #84] @ 0x54
80072d8: 69da ldr r2, [r3, #28]
80072da: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80072de: 441a add r2, r3
80072e0: 6d7b ldr r3, [r7, #84] @ 0x54
80072e2: 61da str r2, [r3, #28]
ep->xfer_buff += count;
80072e4: 6d7b ldr r3, [r7, #84] @ 0x54
80072e6: 695a ldr r2, [r3, #20]
80072e8: f8b7 3050 ldrh.w r3, [r7, #80] @ 0x50
80072ec: 441a add r2, r3
80072ee: 6d7b ldr r3, [r7, #84] @ 0x54
80072f0: 615a str r2, [r3, #20]
if ((ep->xfer_len == 0U) || (count < ep->maxpacket))
80072f2: 6d7b ldr r3, [r7, #84] @ 0x54
80072f4: 699b ldr r3, [r3, #24]
80072f6: 2b00 cmp r3, #0
80072f8: d005 beq.n 8007306 <PCD_EP_ISR_Handler+0x514>
80072fa: f8b7 2050 ldrh.w r2, [r7, #80] @ 0x50
80072fe: 6d7b ldr r3, [r7, #84] @ 0x54
8007300: 691b ldr r3, [r3, #16]
8007302: 429a cmp r2, r3
8007304: d206 bcs.n 8007314 <PCD_EP_ISR_Handler+0x522>
{
/* RX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataOutStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataOutStageCallback(hpcd, ep->num);
8007306: 6d7b ldr r3, [r7, #84] @ 0x54
8007308: 781b ldrb r3, [r3, #0]
800730a: 4619 mov r1, r3
800730c: 6878 ldr r0, [r7, #4]
800730e: f006 fd8d bl 800de2c <HAL_PCD_DataOutStageCallback>
8007312: e005 b.n 8007320 <PCD_EP_ISR_Handler+0x52e>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
(void)USB_EPStartXfer(hpcd->Instance, ep);
8007314: 687b ldr r3, [r7, #4]
8007316: 681b ldr r3, [r3, #0]
8007318: 6d79 ldr r1, [r7, #84] @ 0x54
800731a: 4618 mov r0, r3
800731c: f003 f9ee bl 800a6fc <USB_EPStartXfer>
}
}
if ((wEPVal & USB_EP_CTR_TX) != 0U)
8007320: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
8007324: f003 0380 and.w r3, r3, #128 @ 0x80
8007328: 2b00 cmp r3, #0
800732a: f000 8123 beq.w 8007574 <PCD_EP_ISR_Handler+0x782>
{
ep = &hpcd->IN_ep[epindex];
800732e: f897 204d ldrb.w r2, [r7, #77] @ 0x4d
8007332: 4613 mov r3, r2
8007334: 009b lsls r3, r3, #2
8007336: 4413 add r3, r2
8007338: 00db lsls r3, r3, #3
800733a: 3310 adds r3, #16
800733c: 687a ldr r2, [r7, #4]
800733e: 4413 add r3, r2
8007340: 657b str r3, [r7, #84] @ 0x54
/* clear int flag */
PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex);
8007342: 687b ldr r3, [r7, #4]
8007344: 681b ldr r3, [r3, #0]
8007346: 461a mov r2, r3
8007348: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800734c: 009b lsls r3, r3, #2
800734e: 4413 add r3, r2
8007350: 881b ldrh r3, [r3, #0]
8007352: b29b uxth r3, r3
8007354: f423 43e1 bic.w r3, r3, #28800 @ 0x7080
8007358: f023 0370 bic.w r3, r3, #112 @ 0x70
800735c: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
8007360: 687b ldr r3, [r7, #4]
8007362: 681b ldr r3, [r3, #0]
8007364: 461a mov r2, r3
8007366: f897 304d ldrb.w r3, [r7, #77] @ 0x4d
800736a: 009b lsls r3, r3, #2
800736c: 441a add r2, r3
800736e: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
8007372: ea6f 4343 mvn.w r3, r3, lsl #17
8007376: ea6f 4353 mvn.w r3, r3, lsr #17
800737a: b29b uxth r3, r3
800737c: 8013 strh r3, [r2, #0]
if (ep->type == EP_TYPE_ISOC)
800737e: 6d7b ldr r3, [r7, #84] @ 0x54
8007380: 78db ldrb r3, [r3, #3]
8007382: 2b01 cmp r3, #1
8007384: f040 80a2 bne.w 80074cc <PCD_EP_ISR_Handler+0x6da>
{
ep->xfer_len = 0U;
8007388: 6d7b ldr r3, [r7, #84] @ 0x54
800738a: 2200 movs r2, #0
800738c: 619a str r2, [r3, #24]
#if (USE_USB_DOUBLE_BUFFER == 1U)
if (ep->doublebuffer != 0U)
800738e: 6d7b ldr r3, [r7, #84] @ 0x54
8007390: 7b1b ldrb r3, [r3, #12]
8007392: 2b00 cmp r3, #0
8007394: f000 8093 beq.w 80074be <PCD_EP_ISR_Handler+0x6cc>
{
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8007398: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800739c: f003 0340 and.w r3, r3, #64 @ 0x40
80073a0: 2b00 cmp r3, #0
80073a2: d046 beq.n 8007432 <PCD_EP_ISR_Handler+0x640>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80073a4: 6d7b ldr r3, [r7, #84] @ 0x54
80073a6: 785b ldrb r3, [r3, #1]
80073a8: 2b00 cmp r3, #0
80073aa: d126 bne.n 80073fa <PCD_EP_ISR_Handler+0x608>
80073ac: 687b ldr r3, [r7, #4]
80073ae: 681b ldr r3, [r3, #0]
80073b0: 627b str r3, [r7, #36] @ 0x24
80073b2: 687b ldr r3, [r7, #4]
80073b4: 681b ldr r3, [r3, #0]
80073b6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80073ba: b29b uxth r3, r3
80073bc: 461a mov r2, r3
80073be: 6a7b ldr r3, [r7, #36] @ 0x24
80073c0: 4413 add r3, r2
80073c2: 627b str r3, [r7, #36] @ 0x24
80073c4: 6d7b ldr r3, [r7, #84] @ 0x54
80073c6: 781b ldrb r3, [r3, #0]
80073c8: 011a lsls r2, r3, #4
80073ca: 6a7b ldr r3, [r7, #36] @ 0x24
80073cc: 4413 add r3, r2
80073ce: f203 4304 addw r3, r3, #1028 @ 0x404
80073d2: 623b str r3, [r7, #32]
80073d4: 6a3b ldr r3, [r7, #32]
80073d6: 881b ldrh r3, [r3, #0]
80073d8: b29b uxth r3, r3
80073da: f3c3 0309 ubfx r3, r3, #0, #10
80073de: b29a uxth r2, r3
80073e0: 6a3b ldr r3, [r7, #32]
80073e2: 801a strh r2, [r3, #0]
80073e4: 6a3b ldr r3, [r7, #32]
80073e6: 881b ldrh r3, [r3, #0]
80073e8: b29b uxth r3, r3
80073ea: ea6f 4343 mvn.w r3, r3, lsl #17
80073ee: ea6f 4353 mvn.w r3, r3, lsr #17
80073f2: b29a uxth r2, r3
80073f4: 6a3b ldr r3, [r7, #32]
80073f6: 801a strh r2, [r3, #0]
80073f8: e061 b.n 80074be <PCD_EP_ISR_Handler+0x6cc>
80073fa: 6d7b ldr r3, [r7, #84] @ 0x54
80073fc: 785b ldrb r3, [r3, #1]
80073fe: 2b01 cmp r3, #1
8007400: d15d bne.n 80074be <PCD_EP_ISR_Handler+0x6cc>
8007402: 687b ldr r3, [r7, #4]
8007404: 681b ldr r3, [r3, #0]
8007406: 62fb str r3, [r7, #44] @ 0x2c
8007408: 687b ldr r3, [r7, #4]
800740a: 681b ldr r3, [r3, #0]
800740c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007410: b29b uxth r3, r3
8007412: 461a mov r2, r3
8007414: 6afb ldr r3, [r7, #44] @ 0x2c
8007416: 4413 add r3, r2
8007418: 62fb str r3, [r7, #44] @ 0x2c
800741a: 6d7b ldr r3, [r7, #84] @ 0x54
800741c: 781b ldrb r3, [r3, #0]
800741e: 011a lsls r2, r3, #4
8007420: 6afb ldr r3, [r7, #44] @ 0x2c
8007422: 4413 add r3, r2
8007424: f203 4304 addw r3, r3, #1028 @ 0x404
8007428: 62bb str r3, [r7, #40] @ 0x28
800742a: 6abb ldr r3, [r7, #40] @ 0x28
800742c: 2200 movs r2, #0
800742e: 801a strh r2, [r3, #0]
8007430: e045 b.n 80074be <PCD_EP_ISR_Handler+0x6cc>
}
else
{
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007432: 687b ldr r3, [r7, #4]
8007434: 681b ldr r3, [r3, #0]
8007436: 63fb str r3, [r7, #60] @ 0x3c
8007438: 6d7b ldr r3, [r7, #84] @ 0x54
800743a: 785b ldrb r3, [r3, #1]
800743c: 2b00 cmp r3, #0
800743e: d126 bne.n 800748e <PCD_EP_ISR_Handler+0x69c>
8007440: 687b ldr r3, [r7, #4]
8007442: 681b ldr r3, [r3, #0]
8007444: 637b str r3, [r7, #52] @ 0x34
8007446: 687b ldr r3, [r7, #4]
8007448: 681b ldr r3, [r3, #0]
800744a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800744e: b29b uxth r3, r3
8007450: 461a mov r2, r3
8007452: 6b7b ldr r3, [r7, #52] @ 0x34
8007454: 4413 add r3, r2
8007456: 637b str r3, [r7, #52] @ 0x34
8007458: 6d7b ldr r3, [r7, #84] @ 0x54
800745a: 781b ldrb r3, [r3, #0]
800745c: 011a lsls r2, r3, #4
800745e: 6b7b ldr r3, [r7, #52] @ 0x34
8007460: 4413 add r3, r2
8007462: f203 430c addw r3, r3, #1036 @ 0x40c
8007466: 633b str r3, [r7, #48] @ 0x30
8007468: 6b3b ldr r3, [r7, #48] @ 0x30
800746a: 881b ldrh r3, [r3, #0]
800746c: b29b uxth r3, r3
800746e: f3c3 0309 ubfx r3, r3, #0, #10
8007472: b29a uxth r2, r3
8007474: 6b3b ldr r3, [r7, #48] @ 0x30
8007476: 801a strh r2, [r3, #0]
8007478: 6b3b ldr r3, [r7, #48] @ 0x30
800747a: 881b ldrh r3, [r3, #0]
800747c: b29b uxth r3, r3
800747e: ea6f 4343 mvn.w r3, r3, lsl #17
8007482: ea6f 4353 mvn.w r3, r3, lsr #17
8007486: b29a uxth r2, r3
8007488: 6b3b ldr r3, [r7, #48] @ 0x30
800748a: 801a strh r2, [r3, #0]
800748c: e017 b.n 80074be <PCD_EP_ISR_Handler+0x6cc>
800748e: 6d7b ldr r3, [r7, #84] @ 0x54
8007490: 785b ldrb r3, [r3, #1]
8007492: 2b01 cmp r3, #1
8007494: d113 bne.n 80074be <PCD_EP_ISR_Handler+0x6cc>
8007496: 687b ldr r3, [r7, #4]
8007498: 681b ldr r3, [r3, #0]
800749a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800749e: b29b uxth r3, r3
80074a0: 461a mov r2, r3
80074a2: 6bfb ldr r3, [r7, #60] @ 0x3c
80074a4: 4413 add r3, r2
80074a6: 63fb str r3, [r7, #60] @ 0x3c
80074a8: 6d7b ldr r3, [r7, #84] @ 0x54
80074aa: 781b ldrb r3, [r3, #0]
80074ac: 011a lsls r2, r3, #4
80074ae: 6bfb ldr r3, [r7, #60] @ 0x3c
80074b0: 4413 add r3, r2
80074b2: f203 430c addw r3, r3, #1036 @ 0x40c
80074b6: 63bb str r3, [r7, #56] @ 0x38
80074b8: 6bbb ldr r3, [r7, #56] @ 0x38
80074ba: 2200 movs r2, #0
80074bc: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
80074be: 6d7b ldr r3, [r7, #84] @ 0x54
80074c0: 781b ldrb r3, [r3, #0]
80074c2: 4619 mov r1, r3
80074c4: 6878 ldr r0, [r7, #4]
80074c6: f006 fccc bl 800de62 <HAL_PCD_DataInStageCallback>
80074ca: e053 b.n 8007574 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Manage Single Buffer Transaction */
if ((wEPVal & USB_EP_KIND) == 0U)
80074cc: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
80074d0: f403 7380 and.w r3, r3, #256 @ 0x100
80074d4: 2b00 cmp r3, #0
80074d6: d146 bne.n 8007566 <PCD_EP_ISR_Handler+0x774>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_TX_CNT(hpcd->Instance, ep->num);
80074d8: 687b ldr r3, [r7, #4]
80074da: 681b ldr r3, [r3, #0]
80074dc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80074e0: b29b uxth r3, r3
80074e2: 461a mov r2, r3
80074e4: 6d7b ldr r3, [r7, #84] @ 0x54
80074e6: 781b ldrb r3, [r3, #0]
80074e8: 00db lsls r3, r3, #3
80074ea: 4413 add r3, r2
80074ec: 3302 adds r3, #2
80074ee: 005b lsls r3, r3, #1
80074f0: 687a ldr r2, [r7, #4]
80074f2: 6812 ldr r2, [r2, #0]
80074f4: 4413 add r3, r2
80074f6: f503 6380 add.w r3, r3, #1024 @ 0x400
80074fa: 881b ldrh r3, [r3, #0]
80074fc: f3c3 0309 ubfx r3, r3, #0, #10
8007500: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
if (ep->xfer_len > TxPctSize)
8007504: 6d7b ldr r3, [r7, #84] @ 0x54
8007506: 699a ldr r2, [r3, #24]
8007508: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
800750c: 429a cmp r2, r3
800750e: d907 bls.n 8007520 <PCD_EP_ISR_Handler+0x72e>
{
ep->xfer_len -= TxPctSize;
8007510: 6d7b ldr r3, [r7, #84] @ 0x54
8007512: 699a ldr r2, [r3, #24]
8007514: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8007518: 1ad2 subs r2, r2, r3
800751a: 6d7b ldr r3, [r7, #84] @ 0x54
800751c: 619a str r2, [r3, #24]
800751e: e002 b.n 8007526 <PCD_EP_ISR_Handler+0x734>
}
else
{
ep->xfer_len = 0U;
8007520: 6d7b ldr r3, [r7, #84] @ 0x54
8007522: 2200 movs r2, #0
8007524: 619a str r2, [r3, #24]
}
/* Zero Length Packet? */
if (ep->xfer_len == 0U)
8007526: 6d7b ldr r3, [r7, #84] @ 0x54
8007528: 699b ldr r3, [r3, #24]
800752a: 2b00 cmp r3, #0
800752c: d106 bne.n 800753c <PCD_EP_ISR_Handler+0x74a>
{
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
800752e: 6d7b ldr r3, [r7, #84] @ 0x54
8007530: 781b ldrb r3, [r3, #0]
8007532: 4619 mov r1, r3
8007534: 6878 ldr r0, [r7, #4]
8007536: f006 fc94 bl 800de62 <HAL_PCD_DataInStageCallback>
800753a: e01b b.n 8007574 <PCD_EP_ISR_Handler+0x782>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
}
else
{
/* Transfer is not yet Done */
ep->xfer_buff += TxPctSize;
800753c: 6d7b ldr r3, [r7, #84] @ 0x54
800753e: 695a ldr r2, [r3, #20]
8007540: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8007544: 441a add r2, r3
8007546: 6d7b ldr r3, [r7, #84] @ 0x54
8007548: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
800754a: 6d7b ldr r3, [r7, #84] @ 0x54
800754c: 69da ldr r2, [r3, #28]
800754e: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
8007552: 441a add r2, r3
8007554: 6d7b ldr r3, [r7, #84] @ 0x54
8007556: 61da str r2, [r3, #28]
(void)USB_EPStartXfer(hpcd->Instance, ep);
8007558: 687b ldr r3, [r7, #4]
800755a: 681b ldr r3, [r3, #0]
800755c: 6d79 ldr r1, [r7, #84] @ 0x54
800755e: 4618 mov r0, r3
8007560: f003 f8cc bl 800a6fc <USB_EPStartXfer>
8007564: e006 b.n 8007574 <PCD_EP_ISR_Handler+0x782>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer bulk IN (bulk transfer Len > Ep_Mps) */
else
{
(void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal);
8007566: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800756a: 461a mov r2, r3
800756c: 6d79 ldr r1, [r7, #84] @ 0x54
800756e: 6878 ldr r0, [r7, #4]
8007570: f000 f91b bl 80077aa <HAL_PCD_EP_DB_Transmit>
while ((hpcd->Instance->ISTR & USB_ISTR_CTR) != 0U)
8007574: 687b ldr r3, [r7, #4]
8007576: 681b ldr r3, [r3, #0]
8007578: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800757c: b29b uxth r3, r3
800757e: b21b sxth r3, r3
8007580: 2b00 cmp r3, #0
8007582: f6ff ac3b blt.w 8006dfc <PCD_EP_ISR_Handler+0xa>
}
}
}
}
return HAL_OK;
8007586: 2300 movs r3, #0
}
8007588: 4618 mov r0, r3
800758a: 3758 adds r7, #88 @ 0x58
800758c: 46bd mov sp, r7
800758e: bd80 pop {r7, pc}
08007590 <HAL_PCD_EP_DB_Receive>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static uint16_t HAL_PCD_EP_DB_Receive(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
8007590: b580 push {r7, lr}
8007592: b088 sub sp, #32
8007594: af00 add r7, sp, #0
8007596: 60f8 str r0, [r7, #12]
8007598: 60b9 str r1, [r7, #8]
800759a: 4613 mov r3, r2
800759c: 80fb strh r3, [r7, #6]
uint16_t count;
/* Manage Buffer0 OUT */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
800759e: 88fb ldrh r3, [r7, #6]
80075a0: f403 4380 and.w r3, r3, #16384 @ 0x4000
80075a4: 2b00 cmp r3, #0
80075a6: d07e beq.n 80076a6 <HAL_PCD_EP_DB_Receive+0x116>
{
/* Get count of received Data on buffer0 */
count = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80075a8: 68fb ldr r3, [r7, #12]
80075aa: 681b ldr r3, [r3, #0]
80075ac: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80075b0: b29b uxth r3, r3
80075b2: 461a mov r2, r3
80075b4: 68bb ldr r3, [r7, #8]
80075b6: 781b ldrb r3, [r3, #0]
80075b8: 00db lsls r3, r3, #3
80075ba: 4413 add r3, r2
80075bc: 3302 adds r3, #2
80075be: 005b lsls r3, r3, #1
80075c0: 68fa ldr r2, [r7, #12]
80075c2: 6812 ldr r2, [r2, #0]
80075c4: 4413 add r3, r2
80075c6: f503 6380 add.w r3, r3, #1024 @ 0x400
80075ca: 881b ldrh r3, [r3, #0]
80075cc: f3c3 0309 ubfx r3, r3, #0, #10
80075d0: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
80075d2: 68bb ldr r3, [r7, #8]
80075d4: 699a ldr r2, [r3, #24]
80075d6: 8b7b ldrh r3, [r7, #26]
80075d8: 429a cmp r2, r3
80075da: d306 bcc.n 80075ea <HAL_PCD_EP_DB_Receive+0x5a>
{
ep->xfer_len -= count;
80075dc: 68bb ldr r3, [r7, #8]
80075de: 699a ldr r2, [r3, #24]
80075e0: 8b7b ldrh r3, [r7, #26]
80075e2: 1ad2 subs r2, r2, r3
80075e4: 68bb ldr r3, [r7, #8]
80075e6: 619a str r2, [r3, #24]
80075e8: e002 b.n 80075f0 <HAL_PCD_EP_DB_Receive+0x60>
}
else
{
ep->xfer_len = 0U;
80075ea: 68bb ldr r3, [r7, #8]
80075ec: 2200 movs r2, #0
80075ee: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80075f0: 68bb ldr r3, [r7, #8]
80075f2: 699b ldr r3, [r3, #24]
80075f4: 2b00 cmp r3, #0
80075f6: d123 bne.n 8007640 <HAL_PCD_EP_DB_Receive+0xb0>
{
/* set NAK to OUT endpoint since double buffer is enabled */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80075f8: 68fb ldr r3, [r7, #12]
80075fa: 681b ldr r3, [r3, #0]
80075fc: 461a mov r2, r3
80075fe: 68bb ldr r3, [r7, #8]
8007600: 781b ldrb r3, [r3, #0]
8007602: 009b lsls r3, r3, #2
8007604: 4413 add r3, r2
8007606: 881b ldrh r3, [r3, #0]
8007608: b29b uxth r3, r3
800760a: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800760e: f023 0370 bic.w r3, r3, #112 @ 0x70
8007612: 833b strh r3, [r7, #24]
8007614: 8b3b ldrh r3, [r7, #24]
8007616: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800761a: 833b strh r3, [r7, #24]
800761c: 68fb ldr r3, [r7, #12]
800761e: 681b ldr r3, [r3, #0]
8007620: 461a mov r2, r3
8007622: 68bb ldr r3, [r7, #8]
8007624: 781b ldrb r3, [r3, #0]
8007626: 009b lsls r3, r3, #2
8007628: 441a add r2, r3
800762a: 8b3b ldrh r3, [r7, #24]
800762c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007630: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007634: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007638: f043 0380 orr.w r3, r3, #128 @ 0x80
800763c: b29b uxth r3, r3
800763e: 8013 strh r3, [r2, #0]
}
/* Check if Buffer1 is in blocked state which requires to toggle */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
8007640: 88fb ldrh r3, [r7, #6]
8007642: f003 0340 and.w r3, r3, #64 @ 0x40
8007646: 2b00 cmp r3, #0
8007648: d01f beq.n 800768a <HAL_PCD_EP_DB_Receive+0xfa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
800764a: 68fb ldr r3, [r7, #12]
800764c: 681b ldr r3, [r3, #0]
800764e: 461a mov r2, r3
8007650: 68bb ldr r3, [r7, #8]
8007652: 781b ldrb r3, [r3, #0]
8007654: 009b lsls r3, r3, #2
8007656: 4413 add r3, r2
8007658: 881b ldrh r3, [r3, #0]
800765a: b29b uxth r3, r3
800765c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007660: f023 0370 bic.w r3, r3, #112 @ 0x70
8007664: 82fb strh r3, [r7, #22]
8007666: 68fb ldr r3, [r7, #12]
8007668: 681b ldr r3, [r3, #0]
800766a: 461a mov r2, r3
800766c: 68bb ldr r3, [r7, #8]
800766e: 781b ldrb r3, [r3, #0]
8007670: 009b lsls r3, r3, #2
8007672: 441a add r2, r3
8007674: 8afb ldrh r3, [r7, #22]
8007676: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800767a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800767e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007682: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007686: b29b uxth r3, r3
8007688: 8013 strh r3, [r2, #0]
}
if (count != 0U)
800768a: 8b7b ldrh r3, [r7, #26]
800768c: 2b00 cmp r3, #0
800768e: f000 8087 beq.w 80077a0 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, count);
8007692: 68fb ldr r3, [r7, #12]
8007694: 6818 ldr r0, [r3, #0]
8007696: 68bb ldr r3, [r7, #8]
8007698: 6959 ldr r1, [r3, #20]
800769a: 68bb ldr r3, [r7, #8]
800769c: 891a ldrh r2, [r3, #8]
800769e: 8b7b ldrh r3, [r7, #26]
80076a0: f004 fd61 bl 800c166 <USB_ReadPMA>
80076a4: e07c b.n 80077a0 <HAL_PCD_EP_DB_Receive+0x210>
}
/* Manage Buffer 1 DTOG_RX=0 */
else
{
/* Get count of received data */
count = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
80076a6: 68fb ldr r3, [r7, #12]
80076a8: 681b ldr r3, [r3, #0]
80076aa: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80076ae: b29b uxth r3, r3
80076b0: 461a mov r2, r3
80076b2: 68bb ldr r3, [r7, #8]
80076b4: 781b ldrb r3, [r3, #0]
80076b6: 00db lsls r3, r3, #3
80076b8: 4413 add r3, r2
80076ba: 3306 adds r3, #6
80076bc: 005b lsls r3, r3, #1
80076be: 68fa ldr r2, [r7, #12]
80076c0: 6812 ldr r2, [r2, #0]
80076c2: 4413 add r3, r2
80076c4: f503 6380 add.w r3, r3, #1024 @ 0x400
80076c8: 881b ldrh r3, [r3, #0]
80076ca: f3c3 0309 ubfx r3, r3, #0, #10
80076ce: 837b strh r3, [r7, #26]
if (ep->xfer_len >= count)
80076d0: 68bb ldr r3, [r7, #8]
80076d2: 699a ldr r2, [r3, #24]
80076d4: 8b7b ldrh r3, [r7, #26]
80076d6: 429a cmp r2, r3
80076d8: d306 bcc.n 80076e8 <HAL_PCD_EP_DB_Receive+0x158>
{
ep->xfer_len -= count;
80076da: 68bb ldr r3, [r7, #8]
80076dc: 699a ldr r2, [r3, #24]
80076de: 8b7b ldrh r3, [r7, #26]
80076e0: 1ad2 subs r2, r2, r3
80076e2: 68bb ldr r3, [r7, #8]
80076e4: 619a str r2, [r3, #24]
80076e6: e002 b.n 80076ee <HAL_PCD_EP_DB_Receive+0x15e>
}
else
{
ep->xfer_len = 0U;
80076e8: 68bb ldr r3, [r7, #8]
80076ea: 2200 movs r2, #0
80076ec: 619a str r2, [r3, #24]
}
if (ep->xfer_len == 0U)
80076ee: 68bb ldr r3, [r7, #8]
80076f0: 699b ldr r3, [r3, #24]
80076f2: 2b00 cmp r3, #0
80076f4: d123 bne.n 800773e <HAL_PCD_EP_DB_Receive+0x1ae>
{
/* set NAK on the current endpoint */
PCD_SET_EP_RX_STATUS(hpcd->Instance, ep->num, USB_EP_RX_NAK);
80076f6: 68fb ldr r3, [r7, #12]
80076f8: 681b ldr r3, [r3, #0]
80076fa: 461a mov r2, r3
80076fc: 68bb ldr r3, [r7, #8]
80076fe: 781b ldrb r3, [r3, #0]
8007700: 009b lsls r3, r3, #2
8007702: 4413 add r3, r2
8007704: 881b ldrh r3, [r3, #0]
8007706: b29b uxth r3, r3
8007708: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800770c: f023 0370 bic.w r3, r3, #112 @ 0x70
8007710: 83fb strh r3, [r7, #30]
8007712: 8bfb ldrh r3, [r7, #30]
8007714: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8007718: 83fb strh r3, [r7, #30]
800771a: 68fb ldr r3, [r7, #12]
800771c: 681b ldr r3, [r3, #0]
800771e: 461a mov r2, r3
8007720: 68bb ldr r3, [r7, #8]
8007722: 781b ldrb r3, [r3, #0]
8007724: 009b lsls r3, r3, #2
8007726: 441a add r2, r3
8007728: 8bfb ldrh r3, [r7, #30]
800772a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800772e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007732: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007736: f043 0380 orr.w r3, r3, #128 @ 0x80
800773a: b29b uxth r3, r3
800773c: 8013 strh r3, [r2, #0]
}
/*Need to FreeUser Buffer*/
if ((wEPVal & USB_EP_DTOG_TX) == 0U)
800773e: 88fb ldrh r3, [r7, #6]
8007740: f003 0340 and.w r3, r3, #64 @ 0x40
8007744: 2b00 cmp r3, #0
8007746: d11f bne.n 8007788 <HAL_PCD_EP_DB_Receive+0x1f8>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 0U);
8007748: 68fb ldr r3, [r7, #12]
800774a: 681b ldr r3, [r3, #0]
800774c: 461a mov r2, r3
800774e: 68bb ldr r3, [r7, #8]
8007750: 781b ldrb r3, [r3, #0]
8007752: 009b lsls r3, r3, #2
8007754: 4413 add r3, r2
8007756: 881b ldrh r3, [r3, #0]
8007758: b29b uxth r3, r3
800775a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800775e: f023 0370 bic.w r3, r3, #112 @ 0x70
8007762: 83bb strh r3, [r7, #28]
8007764: 68fb ldr r3, [r7, #12]
8007766: 681b ldr r3, [r3, #0]
8007768: 461a mov r2, r3
800776a: 68bb ldr r3, [r7, #8]
800776c: 781b ldrb r3, [r3, #0]
800776e: 009b lsls r3, r3, #2
8007770: 441a add r2, r3
8007772: 8bbb ldrh r3, [r7, #28]
8007774: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007778: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800777c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007780: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8007784: b29b uxth r3, r3
8007786: 8013 strh r3, [r2, #0]
}
if (count != 0U)
8007788: 8b7b ldrh r3, [r7, #26]
800778a: 2b00 cmp r3, #0
800778c: d008 beq.n 80077a0 <HAL_PCD_EP_DB_Receive+0x210>
{
USB_ReadPMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, count);
800778e: 68fb ldr r3, [r7, #12]
8007790: 6818 ldr r0, [r3, #0]
8007792: 68bb ldr r3, [r7, #8]
8007794: 6959 ldr r1, [r3, #20]
8007796: 68bb ldr r3, [r7, #8]
8007798: 895a ldrh r2, [r3, #10]
800779a: 8b7b ldrh r3, [r7, #26]
800779c: f004 fce3 bl 800c166 <USB_ReadPMA>
}
}
return count;
80077a0: 8b7b ldrh r3, [r7, #26]
}
80077a2: 4618 mov r0, r3
80077a4: 3720 adds r7, #32
80077a6: 46bd mov sp, r7
80077a8: bd80 pop {r7, pc}
080077aa <HAL_PCD_EP_DB_Transmit>:
* @param wEPVal Last snapshot of EPRx register value taken in ISR
* @retval HAL status
*/
static HAL_StatusTypeDef HAL_PCD_EP_DB_Transmit(PCD_HandleTypeDef *hpcd,
PCD_EPTypeDef *ep, uint16_t wEPVal)
{
80077aa: b580 push {r7, lr}
80077ac: b0a4 sub sp, #144 @ 0x90
80077ae: af00 add r7, sp, #0
80077b0: 60f8 str r0, [r7, #12]
80077b2: 60b9 str r1, [r7, #8]
80077b4: 4613 mov r3, r2
80077b6: 80fb strh r3, [r7, #6]
uint32_t len;
uint16_t TxPctSize;
/* Data Buffer0 ACK received */
if ((wEPVal & USB_EP_DTOG_TX) != 0U)
80077b8: 88fb ldrh r3, [r7, #6]
80077ba: f003 0340 and.w r3, r3, #64 @ 0x40
80077be: 2b00 cmp r3, #0
80077c0: f000 81dd beq.w 8007b7e <HAL_PCD_EP_DB_Transmit+0x3d4>
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF0_CNT(hpcd->Instance, ep->num);
80077c4: 68fb ldr r3, [r7, #12]
80077c6: 681b ldr r3, [r3, #0]
80077c8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80077cc: b29b uxth r3, r3
80077ce: 461a mov r2, r3
80077d0: 68bb ldr r3, [r7, #8]
80077d2: 781b ldrb r3, [r3, #0]
80077d4: 00db lsls r3, r3, #3
80077d6: 4413 add r3, r2
80077d8: 3302 adds r3, #2
80077da: 005b lsls r3, r3, #1
80077dc: 68fa ldr r2, [r7, #12]
80077de: 6812 ldr r2, [r2, #0]
80077e0: 4413 add r3, r2
80077e2: f503 6380 add.w r3, r3, #1024 @ 0x400
80077e6: 881b ldrh r3, [r3, #0]
80077e8: f3c3 0309 ubfx r3, r3, #0, #10
80077ec: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len > TxPctSize)
80077f0: 68bb ldr r3, [r7, #8]
80077f2: 699a ldr r2, [r3, #24]
80077f4: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80077f8: 429a cmp r2, r3
80077fa: d907 bls.n 800780c <HAL_PCD_EP_DB_Transmit+0x62>
{
ep->xfer_len -= TxPctSize;
80077fc: 68bb ldr r3, [r7, #8]
80077fe: 699a ldr r2, [r3, #24]
8007800: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007804: 1ad2 subs r2, r2, r3
8007806: 68bb ldr r3, [r7, #8]
8007808: 619a str r2, [r3, #24]
800780a: e002 b.n 8007812 <HAL_PCD_EP_DB_Transmit+0x68>
}
else
{
ep->xfer_len = 0U;
800780c: 68bb ldr r3, [r7, #8]
800780e: 2200 movs r2, #0
8007810: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8007812: 68bb ldr r3, [r7, #8]
8007814: 699b ldr r3, [r3, #24]
8007816: 2b00 cmp r3, #0
8007818: f040 80b9 bne.w 800798e <HAL_PCD_EP_DB_Transmit+0x1e4>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
800781c: 68bb ldr r3, [r7, #8]
800781e: 785b ldrb r3, [r3, #1]
8007820: 2b00 cmp r3, #0
8007822: d126 bne.n 8007872 <HAL_PCD_EP_DB_Transmit+0xc8>
8007824: 68fb ldr r3, [r7, #12]
8007826: 681b ldr r3, [r3, #0]
8007828: 62fb str r3, [r7, #44] @ 0x2c
800782a: 68fb ldr r3, [r7, #12]
800782c: 681b ldr r3, [r3, #0]
800782e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007832: b29b uxth r3, r3
8007834: 461a mov r2, r3
8007836: 6afb ldr r3, [r7, #44] @ 0x2c
8007838: 4413 add r3, r2
800783a: 62fb str r3, [r7, #44] @ 0x2c
800783c: 68bb ldr r3, [r7, #8]
800783e: 781b ldrb r3, [r3, #0]
8007840: 011a lsls r2, r3, #4
8007842: 6afb ldr r3, [r7, #44] @ 0x2c
8007844: 4413 add r3, r2
8007846: f203 4304 addw r3, r3, #1028 @ 0x404
800784a: 62bb str r3, [r7, #40] @ 0x28
800784c: 6abb ldr r3, [r7, #40] @ 0x28
800784e: 881b ldrh r3, [r3, #0]
8007850: b29b uxth r3, r3
8007852: f3c3 0309 ubfx r3, r3, #0, #10
8007856: b29a uxth r2, r3
8007858: 6abb ldr r3, [r7, #40] @ 0x28
800785a: 801a strh r2, [r3, #0]
800785c: 6abb ldr r3, [r7, #40] @ 0x28
800785e: 881b ldrh r3, [r3, #0]
8007860: b29b uxth r3, r3
8007862: ea6f 4343 mvn.w r3, r3, lsl #17
8007866: ea6f 4353 mvn.w r3, r3, lsr #17
800786a: b29a uxth r2, r3
800786c: 6abb ldr r3, [r7, #40] @ 0x28
800786e: 801a strh r2, [r3, #0]
8007870: e01a b.n 80078a8 <HAL_PCD_EP_DB_Transmit+0xfe>
8007872: 68bb ldr r3, [r7, #8]
8007874: 785b ldrb r3, [r3, #1]
8007876: 2b01 cmp r3, #1
8007878: d116 bne.n 80078a8 <HAL_PCD_EP_DB_Transmit+0xfe>
800787a: 68fb ldr r3, [r7, #12]
800787c: 681b ldr r3, [r3, #0]
800787e: 637b str r3, [r7, #52] @ 0x34
8007880: 68fb ldr r3, [r7, #12]
8007882: 681b ldr r3, [r3, #0]
8007884: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007888: b29b uxth r3, r3
800788a: 461a mov r2, r3
800788c: 6b7b ldr r3, [r7, #52] @ 0x34
800788e: 4413 add r3, r2
8007890: 637b str r3, [r7, #52] @ 0x34
8007892: 68bb ldr r3, [r7, #8]
8007894: 781b ldrb r3, [r3, #0]
8007896: 011a lsls r2, r3, #4
8007898: 6b7b ldr r3, [r7, #52] @ 0x34
800789a: 4413 add r3, r2
800789c: f203 4304 addw r3, r3, #1028 @ 0x404
80078a0: 633b str r3, [r7, #48] @ 0x30
80078a2: 6b3b ldr r3, [r7, #48] @ 0x30
80078a4: 2200 movs r2, #0
80078a6: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
80078a8: 68fb ldr r3, [r7, #12]
80078aa: 681b ldr r3, [r3, #0]
80078ac: 627b str r3, [r7, #36] @ 0x24
80078ae: 68bb ldr r3, [r7, #8]
80078b0: 785b ldrb r3, [r3, #1]
80078b2: 2b00 cmp r3, #0
80078b4: d126 bne.n 8007904 <HAL_PCD_EP_DB_Transmit+0x15a>
80078b6: 68fb ldr r3, [r7, #12]
80078b8: 681b ldr r3, [r3, #0]
80078ba: 61fb str r3, [r7, #28]
80078bc: 68fb ldr r3, [r7, #12]
80078be: 681b ldr r3, [r3, #0]
80078c0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
80078c4: b29b uxth r3, r3
80078c6: 461a mov r2, r3
80078c8: 69fb ldr r3, [r7, #28]
80078ca: 4413 add r3, r2
80078cc: 61fb str r3, [r7, #28]
80078ce: 68bb ldr r3, [r7, #8]
80078d0: 781b ldrb r3, [r3, #0]
80078d2: 011a lsls r2, r3, #4
80078d4: 69fb ldr r3, [r7, #28]
80078d6: 4413 add r3, r2
80078d8: f203 430c addw r3, r3, #1036 @ 0x40c
80078dc: 61bb str r3, [r7, #24]
80078de: 69bb ldr r3, [r7, #24]
80078e0: 881b ldrh r3, [r3, #0]
80078e2: b29b uxth r3, r3
80078e4: f3c3 0309 ubfx r3, r3, #0, #10
80078e8: b29a uxth r2, r3
80078ea: 69bb ldr r3, [r7, #24]
80078ec: 801a strh r2, [r3, #0]
80078ee: 69bb ldr r3, [r7, #24]
80078f0: 881b ldrh r3, [r3, #0]
80078f2: b29b uxth r3, r3
80078f4: ea6f 4343 mvn.w r3, r3, lsl #17
80078f8: ea6f 4353 mvn.w r3, r3, lsr #17
80078fc: b29a uxth r2, r3
80078fe: 69bb ldr r3, [r7, #24]
8007900: 801a strh r2, [r3, #0]
8007902: e017 b.n 8007934 <HAL_PCD_EP_DB_Transmit+0x18a>
8007904: 68bb ldr r3, [r7, #8]
8007906: 785b ldrb r3, [r3, #1]
8007908: 2b01 cmp r3, #1
800790a: d113 bne.n 8007934 <HAL_PCD_EP_DB_Transmit+0x18a>
800790c: 68fb ldr r3, [r7, #12]
800790e: 681b ldr r3, [r3, #0]
8007910: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007914: b29b uxth r3, r3
8007916: 461a mov r2, r3
8007918: 6a7b ldr r3, [r7, #36] @ 0x24
800791a: 4413 add r3, r2
800791c: 627b str r3, [r7, #36] @ 0x24
800791e: 68bb ldr r3, [r7, #8]
8007920: 781b ldrb r3, [r3, #0]
8007922: 011a lsls r2, r3, #4
8007924: 6a7b ldr r3, [r7, #36] @ 0x24
8007926: 4413 add r3, r2
8007928: f203 430c addw r3, r3, #1036 @ 0x40c
800792c: 623b str r3, [r7, #32]
800792e: 6a3b ldr r3, [r7, #32]
8007930: 2200 movs r2, #0
8007932: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007934: 68bb ldr r3, [r7, #8]
8007936: 781b ldrb r3, [r3, #0]
8007938: 4619 mov r1, r3
800793a: 68f8 ldr r0, [r7, #12]
800793c: f006 fa91 bl 800de62 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
8007940: 88fb ldrh r3, [r7, #6]
8007942: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007946: 2b00 cmp r3, #0
8007948: f000 82fc beq.w 8007f44 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
800794c: 68fb ldr r3, [r7, #12]
800794e: 681b ldr r3, [r3, #0]
8007950: 461a mov r2, r3
8007952: 68bb ldr r3, [r7, #8]
8007954: 781b ldrb r3, [r3, #0]
8007956: 009b lsls r3, r3, #2
8007958: 4413 add r3, r2
800795a: 881b ldrh r3, [r3, #0]
800795c: b29b uxth r3, r3
800795e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007962: f023 0370 bic.w r3, r3, #112 @ 0x70
8007966: 82fb strh r3, [r7, #22]
8007968: 68fb ldr r3, [r7, #12]
800796a: 681b ldr r3, [r3, #0]
800796c: 461a mov r2, r3
800796e: 68bb ldr r3, [r7, #8]
8007970: 781b ldrb r3, [r3, #0]
8007972: 009b lsls r3, r3, #2
8007974: 441a add r2, r3
8007976: 8afb ldrh r3, [r7, #22]
8007978: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800797c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007980: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007984: f043 0380 orr.w r3, r3, #128 @ 0x80
8007988: b29b uxth r3, r3
800798a: 8013 strh r3, [r2, #0]
800798c: e2da b.n 8007f44 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) != 0U)
800798e: 88fb ldrh r3, [r7, #6]
8007990: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007994: 2b00 cmp r3, #0
8007996: d021 beq.n 80079dc <HAL_PCD_EP_DB_Transmit+0x232>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007998: 68fb ldr r3, [r7, #12]
800799a: 681b ldr r3, [r3, #0]
800799c: 461a mov r2, r3
800799e: 68bb ldr r3, [r7, #8]
80079a0: 781b ldrb r3, [r3, #0]
80079a2: 009b lsls r3, r3, #2
80079a4: 4413 add r3, r2
80079a6: 881b ldrh r3, [r3, #0]
80079a8: b29b uxth r3, r3
80079aa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80079ae: f023 0370 bic.w r3, r3, #112 @ 0x70
80079b2: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
80079b6: 68fb ldr r3, [r7, #12]
80079b8: 681b ldr r3, [r3, #0]
80079ba: 461a mov r2, r3
80079bc: 68bb ldr r3, [r7, #8]
80079be: 781b ldrb r3, [r3, #0]
80079c0: 009b lsls r3, r3, #2
80079c2: 441a add r2, r3
80079c4: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
80079c8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
80079cc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
80079d0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
80079d4: f043 0380 orr.w r3, r3, #128 @ 0x80
80079d8: b29b uxth r3, r3
80079da: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
80079dc: 68bb ldr r3, [r7, #8]
80079de: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
80079e2: 2b01 cmp r3, #1
80079e4: f040 82ae bne.w 8007f44 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
80079e8: 68bb ldr r3, [r7, #8]
80079ea: 695a ldr r2, [r3, #20]
80079ec: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80079f0: 441a add r2, r3
80079f2: 68bb ldr r3, [r7, #8]
80079f4: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
80079f6: 68bb ldr r3, [r7, #8]
80079f8: 69da ldr r2, [r3, #28]
80079fa: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
80079fe: 441a add r2, r3
8007a00: 68bb ldr r3, [r7, #8]
8007a02: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007a04: 68bb ldr r3, [r7, #8]
8007a06: 6a1a ldr r2, [r3, #32]
8007a08: 68bb ldr r3, [r7, #8]
8007a0a: 691b ldr r3, [r3, #16]
8007a0c: 429a cmp r2, r3
8007a0e: d30b bcc.n 8007a28 <HAL_PCD_EP_DB_Transmit+0x27e>
{
len = ep->maxpacket;
8007a10: 68bb ldr r3, [r7, #8]
8007a12: 691b ldr r3, [r3, #16]
8007a14: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007a18: 68bb ldr r3, [r7, #8]
8007a1a: 6a1a ldr r2, [r3, #32]
8007a1c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007a20: 1ad2 subs r2, r2, r3
8007a22: 68bb ldr r3, [r7, #8]
8007a24: 621a str r2, [r3, #32]
8007a26: e017 b.n 8007a58 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else if (ep->xfer_len_db == 0U)
8007a28: 68bb ldr r3, [r7, #8]
8007a2a: 6a1b ldr r3, [r3, #32]
8007a2c: 2b00 cmp r3, #0
8007a2e: d108 bne.n 8007a42 <HAL_PCD_EP_DB_Transmit+0x298>
{
len = TxPctSize;
8007a30: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007a34: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007a38: 68bb ldr r3, [r7, #8]
8007a3a: 2200 movs r2, #0
8007a3c: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007a40: e00a b.n 8007a58 <HAL_PCD_EP_DB_Transmit+0x2ae>
}
else
{
ep->xfer_fill_db = 0U;
8007a42: 68bb ldr r3, [r7, #8]
8007a44: 2200 movs r2, #0
8007a46: f883 2024 strb.w r2, [r3, #36] @ 0x24
len = ep->xfer_len_db;
8007a4a: 68bb ldr r3, [r7, #8]
8007a4c: 6a1b ldr r3, [r3, #32]
8007a4e: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007a52: 68bb ldr r3, [r7, #8]
8007a54: 2200 movs r2, #0
8007a56: 621a str r2, [r3, #32]
}
/* Write remaining Data to Buffer */
/* Set the Double buffer counter for pma buffer1 */
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007a58: 68bb ldr r3, [r7, #8]
8007a5a: 785b ldrb r3, [r3, #1]
8007a5c: 2b00 cmp r3, #0
8007a5e: d165 bne.n 8007b2c <HAL_PCD_EP_DB_Transmit+0x382>
8007a60: 68fb ldr r3, [r7, #12]
8007a62: 681b ldr r3, [r3, #0]
8007a64: 63fb str r3, [r7, #60] @ 0x3c
8007a66: 68fb ldr r3, [r7, #12]
8007a68: 681b ldr r3, [r3, #0]
8007a6a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007a6e: b29b uxth r3, r3
8007a70: 461a mov r2, r3
8007a72: 6bfb ldr r3, [r7, #60] @ 0x3c
8007a74: 4413 add r3, r2
8007a76: 63fb str r3, [r7, #60] @ 0x3c
8007a78: 68bb ldr r3, [r7, #8]
8007a7a: 781b ldrb r3, [r3, #0]
8007a7c: 011a lsls r2, r3, #4
8007a7e: 6bfb ldr r3, [r7, #60] @ 0x3c
8007a80: 4413 add r3, r2
8007a82: f203 4304 addw r3, r3, #1028 @ 0x404
8007a86: 63bb str r3, [r7, #56] @ 0x38
8007a88: 6bbb ldr r3, [r7, #56] @ 0x38
8007a8a: 881b ldrh r3, [r3, #0]
8007a8c: b29b uxth r3, r3
8007a8e: f3c3 0309 ubfx r3, r3, #0, #10
8007a92: b29a uxth r2, r3
8007a94: 6bbb ldr r3, [r7, #56] @ 0x38
8007a96: 801a strh r2, [r3, #0]
8007a98: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007a9c: 2b3e cmp r3, #62 @ 0x3e
8007a9e: d91d bls.n 8007adc <HAL_PCD_EP_DB_Transmit+0x332>
8007aa0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007aa4: 095b lsrs r3, r3, #5
8007aa6: 64bb str r3, [r7, #72] @ 0x48
8007aa8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007aac: f003 031f and.w r3, r3, #31
8007ab0: 2b00 cmp r3, #0
8007ab2: d102 bne.n 8007aba <HAL_PCD_EP_DB_Transmit+0x310>
8007ab4: 6cbb ldr r3, [r7, #72] @ 0x48
8007ab6: 3b01 subs r3, #1
8007ab8: 64bb str r3, [r7, #72] @ 0x48
8007aba: 6bbb ldr r3, [r7, #56] @ 0x38
8007abc: 881b ldrh r3, [r3, #0]
8007abe: b29a uxth r2, r3
8007ac0: 6cbb ldr r3, [r7, #72] @ 0x48
8007ac2: b29b uxth r3, r3
8007ac4: 029b lsls r3, r3, #10
8007ac6: b29b uxth r3, r3
8007ac8: 4313 orrs r3, r2
8007aca: b29b uxth r3, r3
8007acc: ea6f 4343 mvn.w r3, r3, lsl #17
8007ad0: ea6f 4353 mvn.w r3, r3, lsr #17
8007ad4: b29a uxth r2, r3
8007ad6: 6bbb ldr r3, [r7, #56] @ 0x38
8007ad8: 801a strh r2, [r3, #0]
8007ada: e044 b.n 8007b66 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007adc: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007ae0: 2b00 cmp r3, #0
8007ae2: d10a bne.n 8007afa <HAL_PCD_EP_DB_Transmit+0x350>
8007ae4: 6bbb ldr r3, [r7, #56] @ 0x38
8007ae6: 881b ldrh r3, [r3, #0]
8007ae8: b29b uxth r3, r3
8007aea: ea6f 4343 mvn.w r3, r3, lsl #17
8007aee: ea6f 4353 mvn.w r3, r3, lsr #17
8007af2: b29a uxth r2, r3
8007af4: 6bbb ldr r3, [r7, #56] @ 0x38
8007af6: 801a strh r2, [r3, #0]
8007af8: e035 b.n 8007b66 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007afa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007afe: 085b lsrs r3, r3, #1
8007b00: 64bb str r3, [r7, #72] @ 0x48
8007b02: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b06: f003 0301 and.w r3, r3, #1
8007b0a: 2b00 cmp r3, #0
8007b0c: d002 beq.n 8007b14 <HAL_PCD_EP_DB_Transmit+0x36a>
8007b0e: 6cbb ldr r3, [r7, #72] @ 0x48
8007b10: 3301 adds r3, #1
8007b12: 64bb str r3, [r7, #72] @ 0x48
8007b14: 6bbb ldr r3, [r7, #56] @ 0x38
8007b16: 881b ldrh r3, [r3, #0]
8007b18: b29a uxth r2, r3
8007b1a: 6cbb ldr r3, [r7, #72] @ 0x48
8007b1c: b29b uxth r3, r3
8007b1e: 029b lsls r3, r3, #10
8007b20: b29b uxth r3, r3
8007b22: 4313 orrs r3, r2
8007b24: b29a uxth r2, r3
8007b26: 6bbb ldr r3, [r7, #56] @ 0x38
8007b28: 801a strh r2, [r3, #0]
8007b2a: e01c b.n 8007b66 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007b2c: 68bb ldr r3, [r7, #8]
8007b2e: 785b ldrb r3, [r3, #1]
8007b30: 2b01 cmp r3, #1
8007b32: d118 bne.n 8007b66 <HAL_PCD_EP_DB_Transmit+0x3bc>
8007b34: 68fb ldr r3, [r7, #12]
8007b36: 681b ldr r3, [r3, #0]
8007b38: 647b str r3, [r7, #68] @ 0x44
8007b3a: 68fb ldr r3, [r7, #12]
8007b3c: 681b ldr r3, [r3, #0]
8007b3e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007b42: b29b uxth r3, r3
8007b44: 461a mov r2, r3
8007b46: 6c7b ldr r3, [r7, #68] @ 0x44
8007b48: 4413 add r3, r2
8007b4a: 647b str r3, [r7, #68] @ 0x44
8007b4c: 68bb ldr r3, [r7, #8]
8007b4e: 781b ldrb r3, [r3, #0]
8007b50: 011a lsls r2, r3, #4
8007b52: 6c7b ldr r3, [r7, #68] @ 0x44
8007b54: 4413 add r3, r2
8007b56: f203 4304 addw r3, r3, #1028 @ 0x404
8007b5a: 643b str r3, [r7, #64] @ 0x40
8007b5c: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b60: b29a uxth r2, r3
8007b62: 6c3b ldr r3, [r7, #64] @ 0x40
8007b64: 801a strh r2, [r3, #0]
/* Copy user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr0, (uint16_t)len);
8007b66: 68fb ldr r3, [r7, #12]
8007b68: 6818 ldr r0, [r3, #0]
8007b6a: 68bb ldr r3, [r7, #8]
8007b6c: 6959 ldr r1, [r3, #20]
8007b6e: 68bb ldr r3, [r7, #8]
8007b70: 891a ldrh r2, [r3, #8]
8007b72: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007b76: b29b uxth r3, r3
8007b78: f004 faaf bl 800c0da <USB_WritePMA>
8007b7c: e1e2 b.n 8007f44 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Data Buffer1 ACK received */
{
/* multi-packet on the NON control IN endpoint */
TxPctSize = (uint16_t)PCD_GET_EP_DBUF1_CNT(hpcd->Instance, ep->num);
8007b7e: 68fb ldr r3, [r7, #12]
8007b80: 681b ldr r3, [r3, #0]
8007b82: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007b86: b29b uxth r3, r3
8007b88: 461a mov r2, r3
8007b8a: 68bb ldr r3, [r7, #8]
8007b8c: 781b ldrb r3, [r3, #0]
8007b8e: 00db lsls r3, r3, #3
8007b90: 4413 add r3, r2
8007b92: 3306 adds r3, #6
8007b94: 005b lsls r3, r3, #1
8007b96: 68fa ldr r2, [r7, #12]
8007b98: 6812 ldr r2, [r2, #0]
8007b9a: 4413 add r3, r2
8007b9c: f503 6380 add.w r3, r3, #1024 @ 0x400
8007ba0: 881b ldrh r3, [r3, #0]
8007ba2: f3c3 0309 ubfx r3, r3, #0, #10
8007ba6: f8a7 3086 strh.w r3, [r7, #134] @ 0x86
if (ep->xfer_len >= TxPctSize)
8007baa: 68bb ldr r3, [r7, #8]
8007bac: 699a ldr r2, [r3, #24]
8007bae: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007bb2: 429a cmp r2, r3
8007bb4: d307 bcc.n 8007bc6 <HAL_PCD_EP_DB_Transmit+0x41c>
{
ep->xfer_len -= TxPctSize;
8007bb6: 68bb ldr r3, [r7, #8]
8007bb8: 699a ldr r2, [r3, #24]
8007bba: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007bbe: 1ad2 subs r2, r2, r3
8007bc0: 68bb ldr r3, [r7, #8]
8007bc2: 619a str r2, [r3, #24]
8007bc4: e002 b.n 8007bcc <HAL_PCD_EP_DB_Transmit+0x422>
}
else
{
ep->xfer_len = 0U;
8007bc6: 68bb ldr r3, [r7, #8]
8007bc8: 2200 movs r2, #0
8007bca: 619a str r2, [r3, #24]
}
/* Transfer is completed */
if (ep->xfer_len == 0U)
8007bcc: 68bb ldr r3, [r7, #8]
8007bce: 699b ldr r3, [r3, #24]
8007bd0: 2b00 cmp r3, #0
8007bd2: f040 80c0 bne.w 8007d56 <HAL_PCD_EP_DB_Transmit+0x5ac>
{
PCD_SET_EP_DBUF0_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007bd6: 68bb ldr r3, [r7, #8]
8007bd8: 785b ldrb r3, [r3, #1]
8007bda: 2b00 cmp r3, #0
8007bdc: d126 bne.n 8007c2c <HAL_PCD_EP_DB_Transmit+0x482>
8007bde: 68fb ldr r3, [r7, #12]
8007be0: 681b ldr r3, [r3, #0]
8007be2: 67fb str r3, [r7, #124] @ 0x7c
8007be4: 68fb ldr r3, [r7, #12]
8007be6: 681b ldr r3, [r3, #0]
8007be8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007bec: b29b uxth r3, r3
8007bee: 461a mov r2, r3
8007bf0: 6ffb ldr r3, [r7, #124] @ 0x7c
8007bf2: 4413 add r3, r2
8007bf4: 67fb str r3, [r7, #124] @ 0x7c
8007bf6: 68bb ldr r3, [r7, #8]
8007bf8: 781b ldrb r3, [r3, #0]
8007bfa: 011a lsls r2, r3, #4
8007bfc: 6ffb ldr r3, [r7, #124] @ 0x7c
8007bfe: 4413 add r3, r2
8007c00: f203 4304 addw r3, r3, #1028 @ 0x404
8007c04: 67bb str r3, [r7, #120] @ 0x78
8007c06: 6fbb ldr r3, [r7, #120] @ 0x78
8007c08: 881b ldrh r3, [r3, #0]
8007c0a: b29b uxth r3, r3
8007c0c: f3c3 0309 ubfx r3, r3, #0, #10
8007c10: b29a uxth r2, r3
8007c12: 6fbb ldr r3, [r7, #120] @ 0x78
8007c14: 801a strh r2, [r3, #0]
8007c16: 6fbb ldr r3, [r7, #120] @ 0x78
8007c18: 881b ldrh r3, [r3, #0]
8007c1a: b29b uxth r3, r3
8007c1c: ea6f 4343 mvn.w r3, r3, lsl #17
8007c20: ea6f 4353 mvn.w r3, r3, lsr #17
8007c24: b29a uxth r2, r3
8007c26: 6fbb ldr r3, [r7, #120] @ 0x78
8007c28: 801a strh r2, [r3, #0]
8007c2a: e01a b.n 8007c62 <HAL_PCD_EP_DB_Transmit+0x4b8>
8007c2c: 68bb ldr r3, [r7, #8]
8007c2e: 785b ldrb r3, [r3, #1]
8007c30: 2b01 cmp r3, #1
8007c32: d116 bne.n 8007c62 <HAL_PCD_EP_DB_Transmit+0x4b8>
8007c34: 68fb ldr r3, [r7, #12]
8007c36: 681b ldr r3, [r3, #0]
8007c38: 667b str r3, [r7, #100] @ 0x64
8007c3a: 68fb ldr r3, [r7, #12]
8007c3c: 681b ldr r3, [r3, #0]
8007c3e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007c42: b29b uxth r3, r3
8007c44: 461a mov r2, r3
8007c46: 6e7b ldr r3, [r7, #100] @ 0x64
8007c48: 4413 add r3, r2
8007c4a: 667b str r3, [r7, #100] @ 0x64
8007c4c: 68bb ldr r3, [r7, #8]
8007c4e: 781b ldrb r3, [r3, #0]
8007c50: 011a lsls r2, r3, #4
8007c52: 6e7b ldr r3, [r7, #100] @ 0x64
8007c54: 4413 add r3, r2
8007c56: f203 4304 addw r3, r3, #1028 @ 0x404
8007c5a: 663b str r3, [r7, #96] @ 0x60
8007c5c: 6e3b ldr r3, [r7, #96] @ 0x60
8007c5e: 2200 movs r2, #0
8007c60: 801a strh r2, [r3, #0]
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, 0U);
8007c62: 68fb ldr r3, [r7, #12]
8007c64: 681b ldr r3, [r3, #0]
8007c66: 677b str r3, [r7, #116] @ 0x74
8007c68: 68bb ldr r3, [r7, #8]
8007c6a: 785b ldrb r3, [r3, #1]
8007c6c: 2b00 cmp r3, #0
8007c6e: d12b bne.n 8007cc8 <HAL_PCD_EP_DB_Transmit+0x51e>
8007c70: 68fb ldr r3, [r7, #12]
8007c72: 681b ldr r3, [r3, #0]
8007c74: 66fb str r3, [r7, #108] @ 0x6c
8007c76: 68fb ldr r3, [r7, #12]
8007c78: 681b ldr r3, [r3, #0]
8007c7a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007c7e: b29b uxth r3, r3
8007c80: 461a mov r2, r3
8007c82: 6efb ldr r3, [r7, #108] @ 0x6c
8007c84: 4413 add r3, r2
8007c86: 66fb str r3, [r7, #108] @ 0x6c
8007c88: 68bb ldr r3, [r7, #8]
8007c8a: 781b ldrb r3, [r3, #0]
8007c8c: 011a lsls r2, r3, #4
8007c8e: 6efb ldr r3, [r7, #108] @ 0x6c
8007c90: 4413 add r3, r2
8007c92: f203 430c addw r3, r3, #1036 @ 0x40c
8007c96: f8c7 3080 str.w r3, [r7, #128] @ 0x80
8007c9a: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007c9e: 881b ldrh r3, [r3, #0]
8007ca0: b29b uxth r3, r3
8007ca2: f3c3 0309 ubfx r3, r3, #0, #10
8007ca6: b29a uxth r2, r3
8007ca8: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007cac: 801a strh r2, [r3, #0]
8007cae: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007cb2: 881b ldrh r3, [r3, #0]
8007cb4: b29b uxth r3, r3
8007cb6: ea6f 4343 mvn.w r3, r3, lsl #17
8007cba: ea6f 4353 mvn.w r3, r3, lsr #17
8007cbe: b29a uxth r2, r3
8007cc0: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
8007cc4: 801a strh r2, [r3, #0]
8007cc6: e017 b.n 8007cf8 <HAL_PCD_EP_DB_Transmit+0x54e>
8007cc8: 68bb ldr r3, [r7, #8]
8007cca: 785b ldrb r3, [r3, #1]
8007ccc: 2b01 cmp r3, #1
8007cce: d113 bne.n 8007cf8 <HAL_PCD_EP_DB_Transmit+0x54e>
8007cd0: 68fb ldr r3, [r7, #12]
8007cd2: 681b ldr r3, [r3, #0]
8007cd4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007cd8: b29b uxth r3, r3
8007cda: 461a mov r2, r3
8007cdc: 6f7b ldr r3, [r7, #116] @ 0x74
8007cde: 4413 add r3, r2
8007ce0: 677b str r3, [r7, #116] @ 0x74
8007ce2: 68bb ldr r3, [r7, #8]
8007ce4: 781b ldrb r3, [r3, #0]
8007ce6: 011a lsls r2, r3, #4
8007ce8: 6f7b ldr r3, [r7, #116] @ 0x74
8007cea: 4413 add r3, r2
8007cec: f203 430c addw r3, r3, #1036 @ 0x40c
8007cf0: 673b str r3, [r7, #112] @ 0x70
8007cf2: 6f3b ldr r3, [r7, #112] @ 0x70
8007cf4: 2200 movs r2, #0
8007cf6: 801a strh r2, [r3, #0]
/* TX COMPLETE */
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
hpcd->DataInStageCallback(hpcd, ep->num);
#else
HAL_PCD_DataInStageCallback(hpcd, ep->num);
8007cf8: 68bb ldr r3, [r7, #8]
8007cfa: 781b ldrb r3, [r3, #0]
8007cfc: 4619 mov r1, r3
8007cfe: 68f8 ldr r0, [r7, #12]
8007d00: f006 f8af bl 800de62 <HAL_PCD_DataInStageCallback>
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8007d04: 88fb ldrh r3, [r7, #6]
8007d06: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007d0a: 2b00 cmp r3, #0
8007d0c: f040 811a bne.w 8007f44 <HAL_PCD_EP_DB_Transmit+0x79a>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007d10: 68fb ldr r3, [r7, #12]
8007d12: 681b ldr r3, [r3, #0]
8007d14: 461a mov r2, r3
8007d16: 68bb ldr r3, [r7, #8]
8007d18: 781b ldrb r3, [r3, #0]
8007d1a: 009b lsls r3, r3, #2
8007d1c: 4413 add r3, r2
8007d1e: 881b ldrh r3, [r3, #0]
8007d20: b29b uxth r3, r3
8007d22: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007d26: f023 0370 bic.w r3, r3, #112 @ 0x70
8007d2a: f8a7 3088 strh.w r3, [r7, #136] @ 0x88
8007d2e: 68fb ldr r3, [r7, #12]
8007d30: 681b ldr r3, [r3, #0]
8007d32: 461a mov r2, r3
8007d34: 68bb ldr r3, [r7, #8]
8007d36: 781b ldrb r3, [r3, #0]
8007d38: 009b lsls r3, r3, #2
8007d3a: 441a add r2, r3
8007d3c: f8b7 3088 ldrh.w r3, [r7, #136] @ 0x88
8007d40: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007d44: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007d48: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007d4c: f043 0380 orr.w r3, r3, #128 @ 0x80
8007d50: b29b uxth r3, r3
8007d52: 8013 strh r3, [r2, #0]
8007d54: e0f6 b.n 8007f44 <HAL_PCD_EP_DB_Transmit+0x79a>
}
}
else /* Transfer is not yet Done */
{
/* need to Free USB Buff */
if ((wEPVal & USB_EP_DTOG_RX) == 0U)
8007d56: 88fb ldrh r3, [r7, #6]
8007d58: f403 4380 and.w r3, r3, #16384 @ 0x4000
8007d5c: 2b00 cmp r3, #0
8007d5e: d121 bne.n 8007da4 <HAL_PCD_EP_DB_Transmit+0x5fa>
{
PCD_FREE_USER_BUFFER(hpcd->Instance, ep->num, 1U);
8007d60: 68fb ldr r3, [r7, #12]
8007d62: 681b ldr r3, [r3, #0]
8007d64: 461a mov r2, r3
8007d66: 68bb ldr r3, [r7, #8]
8007d68: 781b ldrb r3, [r3, #0]
8007d6a: 009b lsls r3, r3, #2
8007d6c: 4413 add r3, r2
8007d6e: 881b ldrh r3, [r3, #0]
8007d70: b29b uxth r3, r3
8007d72: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007d76: f023 0370 bic.w r3, r3, #112 @ 0x70
8007d7a: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
8007d7e: 68fb ldr r3, [r7, #12]
8007d80: 681b ldr r3, [r3, #0]
8007d82: 461a mov r2, r3
8007d84: 68bb ldr r3, [r7, #8]
8007d86: 781b ldrb r3, [r3, #0]
8007d88: 009b lsls r3, r3, #2
8007d8a: 441a add r2, r3
8007d8c: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
8007d90: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007d94: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007d98: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8007d9c: f043 0380 orr.w r3, r3, #128 @ 0x80
8007da0: b29b uxth r3, r3
8007da2: 8013 strh r3, [r2, #0]
}
/* Still there is data to Fill in the next Buffer */
if (ep->xfer_fill_db == 1U)
8007da4: 68bb ldr r3, [r7, #8]
8007da6: f893 3024 ldrb.w r3, [r3, #36] @ 0x24
8007daa: 2b01 cmp r3, #1
8007dac: f040 80ca bne.w 8007f44 <HAL_PCD_EP_DB_Transmit+0x79a>
{
ep->xfer_buff += TxPctSize;
8007db0: 68bb ldr r3, [r7, #8]
8007db2: 695a ldr r2, [r3, #20]
8007db4: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007db8: 441a add r2, r3
8007dba: 68bb ldr r3, [r7, #8]
8007dbc: 615a str r2, [r3, #20]
ep->xfer_count += TxPctSize;
8007dbe: 68bb ldr r3, [r7, #8]
8007dc0: 69da ldr r2, [r3, #28]
8007dc2: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007dc6: 441a add r2, r3
8007dc8: 68bb ldr r3, [r7, #8]
8007dca: 61da str r2, [r3, #28]
/* Calculate the len of the new buffer to fill */
if (ep->xfer_len_db >= ep->maxpacket)
8007dcc: 68bb ldr r3, [r7, #8]
8007dce: 6a1a ldr r2, [r3, #32]
8007dd0: 68bb ldr r3, [r7, #8]
8007dd2: 691b ldr r3, [r3, #16]
8007dd4: 429a cmp r2, r3
8007dd6: d30b bcc.n 8007df0 <HAL_PCD_EP_DB_Transmit+0x646>
{
len = ep->maxpacket;
8007dd8: 68bb ldr r3, [r7, #8]
8007dda: 691b ldr r3, [r3, #16]
8007ddc: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db -= len;
8007de0: 68bb ldr r3, [r7, #8]
8007de2: 6a1a ldr r2, [r3, #32]
8007de4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007de8: 1ad2 subs r2, r2, r3
8007dea: 68bb ldr r3, [r7, #8]
8007dec: 621a str r2, [r3, #32]
8007dee: e017 b.n 8007e20 <HAL_PCD_EP_DB_Transmit+0x676>
}
else if (ep->xfer_len_db == 0U)
8007df0: 68bb ldr r3, [r7, #8]
8007df2: 6a1b ldr r3, [r3, #32]
8007df4: 2b00 cmp r3, #0
8007df6: d108 bne.n 8007e0a <HAL_PCD_EP_DB_Transmit+0x660>
{
len = TxPctSize;
8007df8: f8b7 3086 ldrh.w r3, [r7, #134] @ 0x86
8007dfc: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_fill_db = 0U;
8007e00: 68bb ldr r3, [r7, #8]
8007e02: 2200 movs r2, #0
8007e04: f883 2024 strb.w r2, [r3, #36] @ 0x24
8007e08: e00a b.n 8007e20 <HAL_PCD_EP_DB_Transmit+0x676>
}
else
{
len = ep->xfer_len_db;
8007e0a: 68bb ldr r3, [r7, #8]
8007e0c: 6a1b ldr r3, [r3, #32]
8007e0e: f8c7 308c str.w r3, [r7, #140] @ 0x8c
ep->xfer_len_db = 0U;
8007e12: 68bb ldr r3, [r7, #8]
8007e14: 2200 movs r2, #0
8007e16: 621a str r2, [r3, #32]
ep->xfer_fill_db = 0;
8007e18: 68bb ldr r3, [r7, #8]
8007e1a: 2200 movs r2, #0
8007e1c: f883 2024 strb.w r2, [r3, #36] @ 0x24
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(hpcd->Instance, ep->num, ep->is_in, len);
8007e20: 68fb ldr r3, [r7, #12]
8007e22: 681b ldr r3, [r3, #0]
8007e24: 657b str r3, [r7, #84] @ 0x54
8007e26: 68bb ldr r3, [r7, #8]
8007e28: 785b ldrb r3, [r3, #1]
8007e2a: 2b00 cmp r3, #0
8007e2c: d165 bne.n 8007efa <HAL_PCD_EP_DB_Transmit+0x750>
8007e2e: 68fb ldr r3, [r7, #12]
8007e30: 681b ldr r3, [r3, #0]
8007e32: 65fb str r3, [r7, #92] @ 0x5c
8007e34: 68fb ldr r3, [r7, #12]
8007e36: 681b ldr r3, [r3, #0]
8007e38: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007e3c: b29b uxth r3, r3
8007e3e: 461a mov r2, r3
8007e40: 6dfb ldr r3, [r7, #92] @ 0x5c
8007e42: 4413 add r3, r2
8007e44: 65fb str r3, [r7, #92] @ 0x5c
8007e46: 68bb ldr r3, [r7, #8]
8007e48: 781b ldrb r3, [r3, #0]
8007e4a: 011a lsls r2, r3, #4
8007e4c: 6dfb ldr r3, [r7, #92] @ 0x5c
8007e4e: 4413 add r3, r2
8007e50: f203 430c addw r3, r3, #1036 @ 0x40c
8007e54: 65bb str r3, [r7, #88] @ 0x58
8007e56: 6dbb ldr r3, [r7, #88] @ 0x58
8007e58: 881b ldrh r3, [r3, #0]
8007e5a: b29b uxth r3, r3
8007e5c: f3c3 0309 ubfx r3, r3, #0, #10
8007e60: b29a uxth r2, r3
8007e62: 6dbb ldr r3, [r7, #88] @ 0x58
8007e64: 801a strh r2, [r3, #0]
8007e66: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007e6a: 2b3e cmp r3, #62 @ 0x3e
8007e6c: d91d bls.n 8007eaa <HAL_PCD_EP_DB_Transmit+0x700>
8007e6e: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007e72: 095b lsrs r3, r3, #5
8007e74: 66bb str r3, [r7, #104] @ 0x68
8007e76: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007e7a: f003 031f and.w r3, r3, #31
8007e7e: 2b00 cmp r3, #0
8007e80: d102 bne.n 8007e88 <HAL_PCD_EP_DB_Transmit+0x6de>
8007e82: 6ebb ldr r3, [r7, #104] @ 0x68
8007e84: 3b01 subs r3, #1
8007e86: 66bb str r3, [r7, #104] @ 0x68
8007e88: 6dbb ldr r3, [r7, #88] @ 0x58
8007e8a: 881b ldrh r3, [r3, #0]
8007e8c: b29a uxth r2, r3
8007e8e: 6ebb ldr r3, [r7, #104] @ 0x68
8007e90: b29b uxth r3, r3
8007e92: 029b lsls r3, r3, #10
8007e94: b29b uxth r3, r3
8007e96: 4313 orrs r3, r2
8007e98: b29b uxth r3, r3
8007e9a: ea6f 4343 mvn.w r3, r3, lsl #17
8007e9e: ea6f 4353 mvn.w r3, r3, lsr #17
8007ea2: b29a uxth r2, r3
8007ea4: 6dbb ldr r3, [r7, #88] @ 0x58
8007ea6: 801a strh r2, [r3, #0]
8007ea8: e041 b.n 8007f2e <HAL_PCD_EP_DB_Transmit+0x784>
8007eaa: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007eae: 2b00 cmp r3, #0
8007eb0: d10a bne.n 8007ec8 <HAL_PCD_EP_DB_Transmit+0x71e>
8007eb2: 6dbb ldr r3, [r7, #88] @ 0x58
8007eb4: 881b ldrh r3, [r3, #0]
8007eb6: b29b uxth r3, r3
8007eb8: ea6f 4343 mvn.w r3, r3, lsl #17
8007ebc: ea6f 4353 mvn.w r3, r3, lsr #17
8007ec0: b29a uxth r2, r3
8007ec2: 6dbb ldr r3, [r7, #88] @ 0x58
8007ec4: 801a strh r2, [r3, #0]
8007ec6: e032 b.n 8007f2e <HAL_PCD_EP_DB_Transmit+0x784>
8007ec8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007ecc: 085b lsrs r3, r3, #1
8007ece: 66bb str r3, [r7, #104] @ 0x68
8007ed0: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007ed4: f003 0301 and.w r3, r3, #1
8007ed8: 2b00 cmp r3, #0
8007eda: d002 beq.n 8007ee2 <HAL_PCD_EP_DB_Transmit+0x738>
8007edc: 6ebb ldr r3, [r7, #104] @ 0x68
8007ede: 3301 adds r3, #1
8007ee0: 66bb str r3, [r7, #104] @ 0x68
8007ee2: 6dbb ldr r3, [r7, #88] @ 0x58
8007ee4: 881b ldrh r3, [r3, #0]
8007ee6: b29a uxth r2, r3
8007ee8: 6ebb ldr r3, [r7, #104] @ 0x68
8007eea: b29b uxth r3, r3
8007eec: 029b lsls r3, r3, #10
8007eee: b29b uxth r3, r3
8007ef0: 4313 orrs r3, r2
8007ef2: b29a uxth r2, r3
8007ef4: 6dbb ldr r3, [r7, #88] @ 0x58
8007ef6: 801a strh r2, [r3, #0]
8007ef8: e019 b.n 8007f2e <HAL_PCD_EP_DB_Transmit+0x784>
8007efa: 68bb ldr r3, [r7, #8]
8007efc: 785b ldrb r3, [r3, #1]
8007efe: 2b01 cmp r3, #1
8007f00: d115 bne.n 8007f2e <HAL_PCD_EP_DB_Transmit+0x784>
8007f02: 68fb ldr r3, [r7, #12]
8007f04: 681b ldr r3, [r3, #0]
8007f06: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8007f0a: b29b uxth r3, r3
8007f0c: 461a mov r2, r3
8007f0e: 6d7b ldr r3, [r7, #84] @ 0x54
8007f10: 4413 add r3, r2
8007f12: 657b str r3, [r7, #84] @ 0x54
8007f14: 68bb ldr r3, [r7, #8]
8007f16: 781b ldrb r3, [r3, #0]
8007f18: 011a lsls r2, r3, #4
8007f1a: 6d7b ldr r3, [r7, #84] @ 0x54
8007f1c: 4413 add r3, r2
8007f1e: f203 430c addw r3, r3, #1036 @ 0x40c
8007f22: 653b str r3, [r7, #80] @ 0x50
8007f24: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007f28: b29a uxth r2, r3
8007f2a: 6d3b ldr r3, [r7, #80] @ 0x50
8007f2c: 801a strh r2, [r3, #0]
/* Copy the user buffer to USB PMA */
USB_WritePMA(hpcd->Instance, ep->xfer_buff, ep->pmaaddr1, (uint16_t)len);
8007f2e: 68fb ldr r3, [r7, #12]
8007f30: 6818 ldr r0, [r3, #0]
8007f32: 68bb ldr r3, [r7, #8]
8007f34: 6959 ldr r1, [r3, #20]
8007f36: 68bb ldr r3, [r7, #8]
8007f38: 895a ldrh r2, [r3, #10]
8007f3a: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
8007f3e: b29b uxth r3, r3
8007f40: f004 f8cb bl 800c0da <USB_WritePMA>
}
}
}
/*enable endpoint IN*/
PCD_SET_EP_TX_STATUS(hpcd->Instance, ep->num, USB_EP_TX_VALID);
8007f44: 68fb ldr r3, [r7, #12]
8007f46: 681b ldr r3, [r3, #0]
8007f48: 461a mov r2, r3
8007f4a: 68bb ldr r3, [r7, #8]
8007f4c: 781b ldrb r3, [r3, #0]
8007f4e: 009b lsls r3, r3, #2
8007f50: 4413 add r3, r2
8007f52: 881b ldrh r3, [r3, #0]
8007f54: b29b uxth r3, r3
8007f56: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8007f5a: f023 0340 bic.w r3, r3, #64 @ 0x40
8007f5e: 82bb strh r3, [r7, #20]
8007f60: 8abb ldrh r3, [r7, #20]
8007f62: f083 0310 eor.w r3, r3, #16
8007f66: 82bb strh r3, [r7, #20]
8007f68: 8abb ldrh r3, [r7, #20]
8007f6a: f083 0320 eor.w r3, r3, #32
8007f6e: 82bb strh r3, [r7, #20]
8007f70: 68fb ldr r3, [r7, #12]
8007f72: 681b ldr r3, [r3, #0]
8007f74: 461a mov r2, r3
8007f76: 68bb ldr r3, [r7, #8]
8007f78: 781b ldrb r3, [r3, #0]
8007f7a: 009b lsls r3, r3, #2
8007f7c: 441a add r2, r3
8007f7e: 8abb ldrh r3, [r7, #20]
8007f80: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8007f84: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8007f88: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8007f8c: f043 0380 orr.w r3, r3, #128 @ 0x80
8007f90: b29b uxth r3, r3
8007f92: 8013 strh r3, [r2, #0]
return HAL_OK;
8007f94: 2300 movs r3, #0
}
8007f96: 4618 mov r0, r3
8007f98: 3790 adds r7, #144 @ 0x90
8007f9a: 46bd mov sp, r7
8007f9c: bd80 pop {r7, pc}
08007f9e <HAL_PCDEx_PMAConfig>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, uint16_t ep_addr,
uint16_t ep_kind, uint32_t pmaadress)
{
8007f9e: b480 push {r7}
8007fa0: b087 sub sp, #28
8007fa2: af00 add r7, sp, #0
8007fa4: 60f8 str r0, [r7, #12]
8007fa6: 607b str r3, [r7, #4]
8007fa8: 460b mov r3, r1
8007faa: 817b strh r3, [r7, #10]
8007fac: 4613 mov r3, r2
8007fae: 813b strh r3, [r7, #8]
PCD_EPTypeDef *ep;
/* initialize ep structure*/
if ((0x80U & ep_addr) == 0x80U)
8007fb0: 897b ldrh r3, [r7, #10]
8007fb2: f003 0380 and.w r3, r3, #128 @ 0x80
8007fb6: b29b uxth r3, r3
8007fb8: 2b00 cmp r3, #0
8007fba: d00b beq.n 8007fd4 <HAL_PCDEx_PMAConfig+0x36>
{
ep = &hpcd->IN_ep[ep_addr & EP_ADDR_MSK];
8007fbc: 897b ldrh r3, [r7, #10]
8007fbe: f003 0207 and.w r2, r3, #7
8007fc2: 4613 mov r3, r2
8007fc4: 009b lsls r3, r3, #2
8007fc6: 4413 add r3, r2
8007fc8: 00db lsls r3, r3, #3
8007fca: 3310 adds r3, #16
8007fcc: 68fa ldr r2, [r7, #12]
8007fce: 4413 add r3, r2
8007fd0: 617b str r3, [r7, #20]
8007fd2: e009 b.n 8007fe8 <HAL_PCDEx_PMAConfig+0x4a>
}
else
{
ep = &hpcd->OUT_ep[ep_addr];
8007fd4: 897a ldrh r2, [r7, #10]
8007fd6: 4613 mov r3, r2
8007fd8: 009b lsls r3, r3, #2
8007fda: 4413 add r3, r2
8007fdc: 00db lsls r3, r3, #3
8007fde: f503 73a8 add.w r3, r3, #336 @ 0x150
8007fe2: 68fa ldr r2, [r7, #12]
8007fe4: 4413 add r3, r2
8007fe6: 617b str r3, [r7, #20]
}
/* Here we check if the endpoint is single or double Buffer*/
if (ep_kind == PCD_SNG_BUF)
8007fe8: 893b ldrh r3, [r7, #8]
8007fea: 2b00 cmp r3, #0
8007fec: d107 bne.n 8007ffe <HAL_PCDEx_PMAConfig+0x60>
{
/* Single Buffer */
ep->doublebuffer = 0U;
8007fee: 697b ldr r3, [r7, #20]
8007ff0: 2200 movs r2, #0
8007ff2: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaadress = (uint16_t)pmaadress;
8007ff4: 687b ldr r3, [r7, #4]
8007ff6: b29a uxth r2, r3
8007ff8: 697b ldr r3, [r7, #20]
8007ffa: 80da strh r2, [r3, #6]
8007ffc: e00b b.n 8008016 <HAL_PCDEx_PMAConfig+0x78>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else /* USB_DBL_BUF */
{
/* Double Buffer Endpoint */
ep->doublebuffer = 1U;
8007ffe: 697b ldr r3, [r7, #20]
8008000: 2201 movs r2, #1
8008002: 731a strb r2, [r3, #12]
/* Configure the PMA */
ep->pmaaddr0 = (uint16_t)(pmaadress & 0xFFFFU);
8008004: 687b ldr r3, [r7, #4]
8008006: b29a uxth r2, r3
8008008: 697b ldr r3, [r7, #20]
800800a: 811a strh r2, [r3, #8]
ep->pmaaddr1 = (uint16_t)((pmaadress & 0xFFFF0000U) >> 16);
800800c: 687b ldr r3, [r7, #4]
800800e: 0c1b lsrs r3, r3, #16
8008010: b29a uxth r2, r3
8008012: 697b ldr r3, [r7, #20]
8008014: 815a strh r2, [r3, #10]
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
8008016: 2300 movs r3, #0
}
8008018: 4618 mov r0, r3
800801a: 371c adds r7, #28
800801c: 46bd mov sp, r7
800801e: bc80 pop {r7}
8008020: 4770 bx lr
...
08008024 <HAL_RCC_OscConfig>:
* supported by this macro. User should request a transition to HSE Off
* first and then HSE On or HSE Bypass.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_OscConfig(RCC_OscInitTypeDef *RCC_OscInitStruct)
{
8008024: b580 push {r7, lr}
8008026: b086 sub sp, #24
8008028: af00 add r7, sp, #0
800802a: 6078 str r0, [r7, #4]
uint32_t tickstart;
uint32_t pll_config;
/* Check Null pointer */
if (RCC_OscInitStruct == NULL)
800802c: 687b ldr r3, [r7, #4]
800802e: 2b00 cmp r3, #0
8008030: d101 bne.n 8008036 <HAL_RCC_OscConfig+0x12>
{
return HAL_ERROR;
8008032: 2301 movs r3, #1
8008034: e272 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
/* Check the parameters */
assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType));
/*------------------------------- HSE Configuration ------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE)
8008036: 687b ldr r3, [r7, #4]
8008038: 681b ldr r3, [r3, #0]
800803a: f003 0301 and.w r3, r3, #1
800803e: 2b00 cmp r3, #0
8008040: f000 8087 beq.w 8008152 <HAL_RCC_OscConfig+0x12e>
{
/* Check the parameters */
assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState));
/* When the HSE is used as system clock or clock source for PLL in these cases it is not allowed to be disabled */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE)
8008044: 4b92 ldr r3, [pc, #584] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
8008046: 685b ldr r3, [r3, #4]
8008048: f003 030c and.w r3, r3, #12
800804c: 2b04 cmp r3, #4
800804e: d00c beq.n 800806a <HAL_RCC_OscConfig+0x46>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSE)))
8008050: 4b8f ldr r3, [pc, #572] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
8008052: 685b ldr r3, [r3, #4]
8008054: f003 030c and.w r3, r3, #12
8008058: 2b08 cmp r3, #8
800805a: d112 bne.n 8008082 <HAL_RCC_OscConfig+0x5e>
800805c: 4b8c ldr r3, [pc, #560] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
800805e: 685b ldr r3, [r3, #4]
8008060: f403 3380 and.w r3, r3, #65536 @ 0x10000
8008064: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8008068: d10b bne.n 8008082 <HAL_RCC_OscConfig+0x5e>
{
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
800806a: 4b89 ldr r3, [pc, #548] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
800806c: 681b ldr r3, [r3, #0]
800806e: f403 3300 and.w r3, r3, #131072 @ 0x20000
8008072: 2b00 cmp r3, #0
8008074: d06c beq.n 8008150 <HAL_RCC_OscConfig+0x12c>
8008076: 687b ldr r3, [r7, #4]
8008078: 685b ldr r3, [r3, #4]
800807a: 2b00 cmp r3, #0
800807c: d168 bne.n 8008150 <HAL_RCC_OscConfig+0x12c>
{
return HAL_ERROR;
800807e: 2301 movs r3, #1
8008080: e24c b.n 800851c <HAL_RCC_OscConfig+0x4f8>
}
}
else
{
/* Set the new HSE configuration ---------------------------------------*/
__HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState);
8008082: 687b ldr r3, [r7, #4]
8008084: 685b ldr r3, [r3, #4]
8008086: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
800808a: d106 bne.n 800809a <HAL_RCC_OscConfig+0x76>
800808c: 4b80 ldr r3, [pc, #512] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
800808e: 681b ldr r3, [r3, #0]
8008090: 4a7f ldr r2, [pc, #508] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
8008092: f443 3380 orr.w r3, r3, #65536 @ 0x10000
8008096: 6013 str r3, [r2, #0]
8008098: e02e b.n 80080f8 <HAL_RCC_OscConfig+0xd4>
800809a: 687b ldr r3, [r7, #4]
800809c: 685b ldr r3, [r3, #4]
800809e: 2b00 cmp r3, #0
80080a0: d10c bne.n 80080bc <HAL_RCC_OscConfig+0x98>
80080a2: 4b7b ldr r3, [pc, #492] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080a4: 681b ldr r3, [r3, #0]
80080a6: 4a7a ldr r2, [pc, #488] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080a8: f423 3380 bic.w r3, r3, #65536 @ 0x10000
80080ac: 6013 str r3, [r2, #0]
80080ae: 4b78 ldr r3, [pc, #480] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080b0: 681b ldr r3, [r3, #0]
80080b2: 4a77 ldr r2, [pc, #476] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080b4: f423 2380 bic.w r3, r3, #262144 @ 0x40000
80080b8: 6013 str r3, [r2, #0]
80080ba: e01d b.n 80080f8 <HAL_RCC_OscConfig+0xd4>
80080bc: 687b ldr r3, [r7, #4]
80080be: 685b ldr r3, [r3, #4]
80080c0: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000
80080c4: d10c bne.n 80080e0 <HAL_RCC_OscConfig+0xbc>
80080c6: 4b72 ldr r3, [pc, #456] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080c8: 681b ldr r3, [r3, #0]
80080ca: 4a71 ldr r2, [pc, #452] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080cc: f443 2380 orr.w r3, r3, #262144 @ 0x40000
80080d0: 6013 str r3, [r2, #0]
80080d2: 4b6f ldr r3, [pc, #444] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080d4: 681b ldr r3, [r3, #0]
80080d6: 4a6e ldr r2, [pc, #440] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080d8: f443 3380 orr.w r3, r3, #65536 @ 0x10000
80080dc: 6013 str r3, [r2, #0]
80080de: e00b b.n 80080f8 <HAL_RCC_OscConfig+0xd4>
80080e0: 4b6b ldr r3, [pc, #428] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080e2: 681b ldr r3, [r3, #0]
80080e4: 4a6a ldr r2, [pc, #424] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080e6: f423 3380 bic.w r3, r3, #65536 @ 0x10000
80080ea: 6013 str r3, [r2, #0]
80080ec: 4b68 ldr r3, [pc, #416] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080ee: 681b ldr r3, [r3, #0]
80080f0: 4a67 ldr r2, [pc, #412] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80080f2: f423 2380 bic.w r3, r3, #262144 @ 0x40000
80080f6: 6013 str r3, [r2, #0]
/* Check the HSE State */
if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF)
80080f8: 687b ldr r3, [r7, #4]
80080fa: 685b ldr r3, [r3, #4]
80080fc: 2b00 cmp r3, #0
80080fe: d013 beq.n 8008128 <HAL_RCC_OscConfig+0x104>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008100: f7fc ffa4 bl 800504c <HAL_GetTick>
8008104: 6138 str r0, [r7, #16]
/* Wait till HSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
8008106: e008 b.n 800811a <HAL_RCC_OscConfig+0xf6>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8008108: f7fc ffa0 bl 800504c <HAL_GetTick>
800810c: 4602 mov r2, r0
800810e: 693b ldr r3, [r7, #16]
8008110: 1ad3 subs r3, r2, r3
8008112: 2b64 cmp r3, #100 @ 0x64
8008114: d901 bls.n 800811a <HAL_RCC_OscConfig+0xf6>
{
return HAL_TIMEOUT;
8008116: 2303 movs r3, #3
8008118: e200 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
800811a: 4b5d ldr r3, [pc, #372] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
800811c: 681b ldr r3, [r3, #0]
800811e: f403 3300 and.w r3, r3, #131072 @ 0x20000
8008122: 2b00 cmp r3, #0
8008124: d0f0 beq.n 8008108 <HAL_RCC_OscConfig+0xe4>
8008126: e014 b.n 8008152 <HAL_RCC_OscConfig+0x12e>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008128: f7fc ff90 bl 800504c <HAL_GetTick>
800812c: 6138 str r0, [r7, #16]
/* Wait till HSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
800812e: e008 b.n 8008142 <HAL_RCC_OscConfig+0x11e>
{
if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE)
8008130: f7fc ff8c bl 800504c <HAL_GetTick>
8008134: 4602 mov r2, r0
8008136: 693b ldr r3, [r7, #16]
8008138: 1ad3 subs r3, r2, r3
800813a: 2b64 cmp r3, #100 @ 0x64
800813c: d901 bls.n 8008142 <HAL_RCC_OscConfig+0x11e>
{
return HAL_TIMEOUT;
800813e: 2303 movs r3, #3
8008140: e1ec b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET)
8008142: 4b53 ldr r3, [pc, #332] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
8008144: 681b ldr r3, [r3, #0]
8008146: f403 3300 and.w r3, r3, #131072 @ 0x20000
800814a: 2b00 cmp r3, #0
800814c: d1f0 bne.n 8008130 <HAL_RCC_OscConfig+0x10c>
800814e: e000 b.n 8008152 <HAL_RCC_OscConfig+0x12e>
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF))
8008150: bf00 nop
}
}
}
}
/*----------------------------- HSI Configuration --------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI)
8008152: 687b ldr r3, [r7, #4]
8008154: 681b ldr r3, [r3, #0]
8008156: f003 0302 and.w r3, r3, #2
800815a: 2b00 cmp r3, #0
800815c: d063 beq.n 8008226 <HAL_RCC_OscConfig+0x202>
/* Check the parameters */
assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState));
assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue));
/* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */
if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI)
800815e: 4b4c ldr r3, [pc, #304] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
8008160: 685b ldr r3, [r3, #4]
8008162: f003 030c and.w r3, r3, #12
8008166: 2b00 cmp r3, #0
8008168: d00b beq.n 8008182 <HAL_RCC_OscConfig+0x15e>
|| ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && (__HAL_RCC_GET_PLL_OSCSOURCE() == RCC_PLLSOURCE_HSI_DIV2)))
800816a: 4b49 ldr r3, [pc, #292] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
800816c: 685b ldr r3, [r3, #4]
800816e: f003 030c and.w r3, r3, #12
8008172: 2b08 cmp r3, #8
8008174: d11c bne.n 80081b0 <HAL_RCC_OscConfig+0x18c>
8008176: 4b46 ldr r3, [pc, #280] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
8008178: 685b ldr r3, [r3, #4]
800817a: f403 3380 and.w r3, r3, #65536 @ 0x10000
800817e: 2b00 cmp r3, #0
8008180: d116 bne.n 80081b0 <HAL_RCC_OscConfig+0x18c>
{
/* When HSI is used as system clock it will not disabled */
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
8008182: 4b43 ldr r3, [pc, #268] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
8008184: 681b ldr r3, [r3, #0]
8008186: f003 0302 and.w r3, r3, #2
800818a: 2b00 cmp r3, #0
800818c: d005 beq.n 800819a <HAL_RCC_OscConfig+0x176>
800818e: 687b ldr r3, [r7, #4]
8008190: 691b ldr r3, [r3, #16]
8008192: 2b01 cmp r3, #1
8008194: d001 beq.n 800819a <HAL_RCC_OscConfig+0x176>
{
return HAL_ERROR;
8008196: 2301 movs r3, #1
8008198: e1c0 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
}
/* Otherwise, just the calibration is allowed */
else
{
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
800819a: 4b3d ldr r3, [pc, #244] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
800819c: 681b ldr r3, [r3, #0]
800819e: f023 02f8 bic.w r2, r3, #248 @ 0xf8
80081a2: 687b ldr r3, [r7, #4]
80081a4: 695b ldr r3, [r3, #20]
80081a6: 00db lsls r3, r3, #3
80081a8: 4939 ldr r1, [pc, #228] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80081aa: 4313 orrs r3, r2
80081ac: 600b str r3, [r1, #0]
if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON))
80081ae: e03a b.n 8008226 <HAL_RCC_OscConfig+0x202>
}
}
else
{
/* Check the HSI State */
if (RCC_OscInitStruct->HSIState != RCC_HSI_OFF)
80081b0: 687b ldr r3, [r7, #4]
80081b2: 691b ldr r3, [r3, #16]
80081b4: 2b00 cmp r3, #0
80081b6: d020 beq.n 80081fa <HAL_RCC_OscConfig+0x1d6>
{
/* Enable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_ENABLE();
80081b8: 4b36 ldr r3, [pc, #216] @ (8008294 <HAL_RCC_OscConfig+0x270>)
80081ba: 2201 movs r2, #1
80081bc: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80081be: f7fc ff45 bl 800504c <HAL_GetTick>
80081c2: 6138 str r0, [r7, #16]
/* Wait till HSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80081c4: e008 b.n 80081d8 <HAL_RCC_OscConfig+0x1b4>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
80081c6: f7fc ff41 bl 800504c <HAL_GetTick>
80081ca: 4602 mov r2, r0
80081cc: 693b ldr r3, [r7, #16]
80081ce: 1ad3 subs r3, r2, r3
80081d0: 2b02 cmp r3, #2
80081d2: d901 bls.n 80081d8 <HAL_RCC_OscConfig+0x1b4>
{
return HAL_TIMEOUT;
80081d4: 2303 movs r3, #3
80081d6: e1a1 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80081d8: 4b2d ldr r3, [pc, #180] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80081da: 681b ldr r3, [r3, #0]
80081dc: f003 0302 and.w r3, r3, #2
80081e0: 2b00 cmp r3, #0
80081e2: d0f0 beq.n 80081c6 <HAL_RCC_OscConfig+0x1a2>
}
}
/* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/
__HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue);
80081e4: 4b2a ldr r3, [pc, #168] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80081e6: 681b ldr r3, [r3, #0]
80081e8: f023 02f8 bic.w r2, r3, #248 @ 0xf8
80081ec: 687b ldr r3, [r7, #4]
80081ee: 695b ldr r3, [r3, #20]
80081f0: 00db lsls r3, r3, #3
80081f2: 4927 ldr r1, [pc, #156] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
80081f4: 4313 orrs r3, r2
80081f6: 600b str r3, [r1, #0]
80081f8: e015 b.n 8008226 <HAL_RCC_OscConfig+0x202>
}
else
{
/* Disable the Internal High Speed oscillator (HSI). */
__HAL_RCC_HSI_DISABLE();
80081fa: 4b26 ldr r3, [pc, #152] @ (8008294 <HAL_RCC_OscConfig+0x270>)
80081fc: 2200 movs r2, #0
80081fe: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008200: f7fc ff24 bl 800504c <HAL_GetTick>
8008204: 6138 str r0, [r7, #16]
/* Wait till HSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
8008206: e008 b.n 800821a <HAL_RCC_OscConfig+0x1f6>
{
if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE)
8008208: f7fc ff20 bl 800504c <HAL_GetTick>
800820c: 4602 mov r2, r0
800820e: 693b ldr r3, [r7, #16]
8008210: 1ad3 subs r3, r2, r3
8008212: 2b02 cmp r3, #2
8008214: d901 bls.n 800821a <HAL_RCC_OscConfig+0x1f6>
{
return HAL_TIMEOUT;
8008216: 2303 movs r3, #3
8008218: e180 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET)
800821a: 4b1d ldr r3, [pc, #116] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
800821c: 681b ldr r3, [r3, #0]
800821e: f003 0302 and.w r3, r3, #2
8008222: 2b00 cmp r3, #0
8008224: d1f0 bne.n 8008208 <HAL_RCC_OscConfig+0x1e4>
}
}
}
}
/*------------------------------ LSI Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI)
8008226: 687b ldr r3, [r7, #4]
8008228: 681b ldr r3, [r3, #0]
800822a: f003 0308 and.w r3, r3, #8
800822e: 2b00 cmp r3, #0
8008230: d03a beq.n 80082a8 <HAL_RCC_OscConfig+0x284>
{
/* Check the parameters */
assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState));
/* Check the LSI State */
if (RCC_OscInitStruct->LSIState != RCC_LSI_OFF)
8008232: 687b ldr r3, [r7, #4]
8008234: 699b ldr r3, [r3, #24]
8008236: 2b00 cmp r3, #0
8008238: d019 beq.n 800826e <HAL_RCC_OscConfig+0x24a>
{
/* Enable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_ENABLE();
800823a: 4b17 ldr r3, [pc, #92] @ (8008298 <HAL_RCC_OscConfig+0x274>)
800823c: 2201 movs r2, #1
800823e: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008240: f7fc ff04 bl 800504c <HAL_GetTick>
8008244: 6138 str r0, [r7, #16]
/* Wait till LSI is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
8008246: e008 b.n 800825a <HAL_RCC_OscConfig+0x236>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
8008248: f7fc ff00 bl 800504c <HAL_GetTick>
800824c: 4602 mov r2, r0
800824e: 693b ldr r3, [r7, #16]
8008250: 1ad3 subs r3, r2, r3
8008252: 2b02 cmp r3, #2
8008254: d901 bls.n 800825a <HAL_RCC_OscConfig+0x236>
{
return HAL_TIMEOUT;
8008256: 2303 movs r3, #3
8008258: e160 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET)
800825a: 4b0d ldr r3, [pc, #52] @ (8008290 <HAL_RCC_OscConfig+0x26c>)
800825c: 6a5b ldr r3, [r3, #36] @ 0x24
800825e: f003 0302 and.w r3, r3, #2
8008262: 2b00 cmp r3, #0
8008264: d0f0 beq.n 8008248 <HAL_RCC_OscConfig+0x224>
}
}
/* To have a fully stabilized clock in the specified range, a software delay of 1ms
should be added.*/
RCC_Delay(1);
8008266: 2001 movs r0, #1
8008268: f000 fad0 bl 800880c <RCC_Delay>
800826c: e01c b.n 80082a8 <HAL_RCC_OscConfig+0x284>
}
else
{
/* Disable the Internal Low Speed oscillator (LSI). */
__HAL_RCC_LSI_DISABLE();
800826e: 4b0a ldr r3, [pc, #40] @ (8008298 <HAL_RCC_OscConfig+0x274>)
8008270: 2200 movs r2, #0
8008272: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008274: f7fc feea bl 800504c <HAL_GetTick>
8008278: 6138 str r0, [r7, #16]
/* Wait till LSI is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
800827a: e00f b.n 800829c <HAL_RCC_OscConfig+0x278>
{
if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE)
800827c: f7fc fee6 bl 800504c <HAL_GetTick>
8008280: 4602 mov r2, r0
8008282: 693b ldr r3, [r7, #16]
8008284: 1ad3 subs r3, r2, r3
8008286: 2b02 cmp r3, #2
8008288: d908 bls.n 800829c <HAL_RCC_OscConfig+0x278>
{
return HAL_TIMEOUT;
800828a: 2303 movs r3, #3
800828c: e146 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
800828e: bf00 nop
8008290: 40021000 .word 0x40021000
8008294: 42420000 .word 0x42420000
8008298: 42420480 .word 0x42420480
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET)
800829c: 4b92 ldr r3, [pc, #584] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800829e: 6a5b ldr r3, [r3, #36] @ 0x24
80082a0: f003 0302 and.w r3, r3, #2
80082a4: 2b00 cmp r3, #0
80082a6: d1e9 bne.n 800827c <HAL_RCC_OscConfig+0x258>
}
}
}
}
/*------------------------------ LSE Configuration -------------------------*/
if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE)
80082a8: 687b ldr r3, [r7, #4]
80082aa: 681b ldr r3, [r3, #0]
80082ac: f003 0304 and.w r3, r3, #4
80082b0: 2b00 cmp r3, #0
80082b2: f000 80a6 beq.w 8008402 <HAL_RCC_OscConfig+0x3de>
{
FlagStatus pwrclkchanged = RESET;
80082b6: 2300 movs r3, #0
80082b8: 75fb strb r3, [r7, #23]
/* Check the parameters */
assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState));
/* Update LSE configuration in Backup Domain control register */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
80082ba: 4b8b ldr r3, [pc, #556] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80082bc: 69db ldr r3, [r3, #28]
80082be: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80082c2: 2b00 cmp r3, #0
80082c4: d10d bne.n 80082e2 <HAL_RCC_OscConfig+0x2be>
{
__HAL_RCC_PWR_CLK_ENABLE();
80082c6: 4b88 ldr r3, [pc, #544] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80082c8: 69db ldr r3, [r3, #28]
80082ca: 4a87 ldr r2, [pc, #540] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80082cc: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
80082d0: 61d3 str r3, [r2, #28]
80082d2: 4b85 ldr r3, [pc, #532] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80082d4: 69db ldr r3, [r3, #28]
80082d6: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
80082da: 60bb str r3, [r7, #8]
80082dc: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
80082de: 2301 movs r3, #1
80082e0: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80082e2: 4b82 ldr r3, [pc, #520] @ (80084ec <HAL_RCC_OscConfig+0x4c8>)
80082e4: 681b ldr r3, [r3, #0]
80082e6: f403 7380 and.w r3, r3, #256 @ 0x100
80082ea: 2b00 cmp r3, #0
80082ec: d118 bne.n 8008320 <HAL_RCC_OscConfig+0x2fc>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
80082ee: 4b7f ldr r3, [pc, #508] @ (80084ec <HAL_RCC_OscConfig+0x4c8>)
80082f0: 681b ldr r3, [r3, #0]
80082f2: 4a7e ldr r2, [pc, #504] @ (80084ec <HAL_RCC_OscConfig+0x4c8>)
80082f4: f443 7380 orr.w r3, r3, #256 @ 0x100
80082f8: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
80082fa: f7fc fea7 bl 800504c <HAL_GetTick>
80082fe: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008300: e008 b.n 8008314 <HAL_RCC_OscConfig+0x2f0>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
8008302: f7fc fea3 bl 800504c <HAL_GetTick>
8008306: 4602 mov r2, r0
8008308: 693b ldr r3, [r7, #16]
800830a: 1ad3 subs r3, r2, r3
800830c: 2b64 cmp r3, #100 @ 0x64
800830e: d901 bls.n 8008314 <HAL_RCC_OscConfig+0x2f0>
{
return HAL_TIMEOUT;
8008310: 2303 movs r3, #3
8008312: e103 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008314: 4b75 ldr r3, [pc, #468] @ (80084ec <HAL_RCC_OscConfig+0x4c8>)
8008316: 681b ldr r3, [r3, #0]
8008318: f403 7380 and.w r3, r3, #256 @ 0x100
800831c: 2b00 cmp r3, #0
800831e: d0f0 beq.n 8008302 <HAL_RCC_OscConfig+0x2de>
}
}
}
/* Set the new LSE configuration -----------------------------------------*/
__HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState);
8008320: 687b ldr r3, [r7, #4]
8008322: 68db ldr r3, [r3, #12]
8008324: 2b01 cmp r3, #1
8008326: d106 bne.n 8008336 <HAL_RCC_OscConfig+0x312>
8008328: 4b6f ldr r3, [pc, #444] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800832a: 6a1b ldr r3, [r3, #32]
800832c: 4a6e ldr r2, [pc, #440] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800832e: f043 0301 orr.w r3, r3, #1
8008332: 6213 str r3, [r2, #32]
8008334: e02d b.n 8008392 <HAL_RCC_OscConfig+0x36e>
8008336: 687b ldr r3, [r7, #4]
8008338: 68db ldr r3, [r3, #12]
800833a: 2b00 cmp r3, #0
800833c: d10c bne.n 8008358 <HAL_RCC_OscConfig+0x334>
800833e: 4b6a ldr r3, [pc, #424] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008340: 6a1b ldr r3, [r3, #32]
8008342: 4a69 ldr r2, [pc, #420] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008344: f023 0301 bic.w r3, r3, #1
8008348: 6213 str r3, [r2, #32]
800834a: 4b67 ldr r3, [pc, #412] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800834c: 6a1b ldr r3, [r3, #32]
800834e: 4a66 ldr r2, [pc, #408] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008350: f023 0304 bic.w r3, r3, #4
8008354: 6213 str r3, [r2, #32]
8008356: e01c b.n 8008392 <HAL_RCC_OscConfig+0x36e>
8008358: 687b ldr r3, [r7, #4]
800835a: 68db ldr r3, [r3, #12]
800835c: 2b05 cmp r3, #5
800835e: d10c bne.n 800837a <HAL_RCC_OscConfig+0x356>
8008360: 4b61 ldr r3, [pc, #388] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008362: 6a1b ldr r3, [r3, #32]
8008364: 4a60 ldr r2, [pc, #384] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008366: f043 0304 orr.w r3, r3, #4
800836a: 6213 str r3, [r2, #32]
800836c: 4b5e ldr r3, [pc, #376] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800836e: 6a1b ldr r3, [r3, #32]
8008370: 4a5d ldr r2, [pc, #372] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008372: f043 0301 orr.w r3, r3, #1
8008376: 6213 str r3, [r2, #32]
8008378: e00b b.n 8008392 <HAL_RCC_OscConfig+0x36e>
800837a: 4b5b ldr r3, [pc, #364] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800837c: 6a1b ldr r3, [r3, #32]
800837e: 4a5a ldr r2, [pc, #360] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008380: f023 0301 bic.w r3, r3, #1
8008384: 6213 str r3, [r2, #32]
8008386: 4b58 ldr r3, [pc, #352] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008388: 6a1b ldr r3, [r3, #32]
800838a: 4a57 ldr r2, [pc, #348] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800838c: f023 0304 bic.w r3, r3, #4
8008390: 6213 str r3, [r2, #32]
/* Check the LSE State */
if (RCC_OscInitStruct->LSEState != RCC_LSE_OFF)
8008392: 687b ldr r3, [r7, #4]
8008394: 68db ldr r3, [r3, #12]
8008396: 2b00 cmp r3, #0
8008398: d015 beq.n 80083c6 <HAL_RCC_OscConfig+0x3a2>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
800839a: f7fc fe57 bl 800504c <HAL_GetTick>
800839e: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80083a0: e00a b.n 80083b8 <HAL_RCC_OscConfig+0x394>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80083a2: f7fc fe53 bl 800504c <HAL_GetTick>
80083a6: 4602 mov r2, r0
80083a8: 693b ldr r3, [r7, #16]
80083aa: 1ad3 subs r3, r2, r3
80083ac: f241 3288 movw r2, #5000 @ 0x1388
80083b0: 4293 cmp r3, r2
80083b2: d901 bls.n 80083b8 <HAL_RCC_OscConfig+0x394>
{
return HAL_TIMEOUT;
80083b4: 2303 movs r3, #3
80083b6: e0b1 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
80083b8: 4b4b ldr r3, [pc, #300] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80083ba: 6a1b ldr r3, [r3, #32]
80083bc: f003 0302 and.w r3, r3, #2
80083c0: 2b00 cmp r3, #0
80083c2: d0ee beq.n 80083a2 <HAL_RCC_OscConfig+0x37e>
80083c4: e014 b.n 80083f0 <HAL_RCC_OscConfig+0x3cc>
}
}
else
{
/* Get Start Tick */
tickstart = HAL_GetTick();
80083c6: f7fc fe41 bl 800504c <HAL_GetTick>
80083ca: 6138 str r0, [r7, #16]
/* Wait till LSE is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80083cc: e00a b.n 80083e4 <HAL_RCC_OscConfig+0x3c0>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
80083ce: f7fc fe3d bl 800504c <HAL_GetTick>
80083d2: 4602 mov r2, r0
80083d4: 693b ldr r3, [r7, #16]
80083d6: 1ad3 subs r3, r2, r3
80083d8: f241 3288 movw r2, #5000 @ 0x1388
80083dc: 4293 cmp r3, r2
80083de: d901 bls.n 80083e4 <HAL_RCC_OscConfig+0x3c0>
{
return HAL_TIMEOUT;
80083e0: 2303 movs r3, #3
80083e2: e09b b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET)
80083e4: 4b40 ldr r3, [pc, #256] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80083e6: 6a1b ldr r3, [r3, #32]
80083e8: f003 0302 and.w r3, r3, #2
80083ec: 2b00 cmp r3, #0
80083ee: d1ee bne.n 80083ce <HAL_RCC_OscConfig+0x3aa>
}
}
}
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
80083f0: 7dfb ldrb r3, [r7, #23]
80083f2: 2b01 cmp r3, #1
80083f4: d105 bne.n 8008402 <HAL_RCC_OscConfig+0x3de>
{
__HAL_RCC_PWR_CLK_DISABLE();
80083f6: 4b3c ldr r3, [pc, #240] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80083f8: 69db ldr r3, [r3, #28]
80083fa: 4a3b ldr r2, [pc, #236] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80083fc: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
8008400: 61d3 str r3, [r2, #28]
#endif /* RCC_CR_PLL2ON */
/*-------------------------------- PLL Configuration -----------------------*/
/* Check the parameters */
assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState));
if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE)
8008402: 687b ldr r3, [r7, #4]
8008404: 69db ldr r3, [r3, #28]
8008406: 2b00 cmp r3, #0
8008408: f000 8087 beq.w 800851a <HAL_RCC_OscConfig+0x4f6>
{
/* Check if the PLL is used as system clock or not */
if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK)
800840c: 4b36 ldr r3, [pc, #216] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800840e: 685b ldr r3, [r3, #4]
8008410: f003 030c and.w r3, r3, #12
8008414: 2b08 cmp r3, #8
8008416: d061 beq.n 80084dc <HAL_RCC_OscConfig+0x4b8>
{
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON)
8008418: 687b ldr r3, [r7, #4]
800841a: 69db ldr r3, [r3, #28]
800841c: 2b02 cmp r3, #2
800841e: d146 bne.n 80084ae <HAL_RCC_OscConfig+0x48a>
/* Check the parameters */
assert_param(IS_RCC_PLLSOURCE(RCC_OscInitStruct->PLL.PLLSource));
assert_param(IS_RCC_PLL_MUL(RCC_OscInitStruct->PLL.PLLMUL));
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
8008420: 4b33 ldr r3, [pc, #204] @ (80084f0 <HAL_RCC_OscConfig+0x4cc>)
8008422: 2200 movs r2, #0
8008424: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008426: f7fc fe11 bl 800504c <HAL_GetTick>
800842a: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
800842c: e008 b.n 8008440 <HAL_RCC_OscConfig+0x41c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800842e: f7fc fe0d bl 800504c <HAL_GetTick>
8008432: 4602 mov r2, r0
8008434: 693b ldr r3, [r7, #16]
8008436: 1ad3 subs r3, r2, r3
8008438: 2b02 cmp r3, #2
800843a: d901 bls.n 8008440 <HAL_RCC_OscConfig+0x41c>
{
return HAL_TIMEOUT;
800843c: 2303 movs r3, #3
800843e: e06d b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
8008440: 4b29 ldr r3, [pc, #164] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008442: 681b ldr r3, [r3, #0]
8008444: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
8008448: 2b00 cmp r3, #0
800844a: d1f0 bne.n 800842e <HAL_RCC_OscConfig+0x40a>
}
}
/* Configure the HSE prediv factor --------------------------------*/
/* It can be written only when the PLL is disabled. Not used in PLL source is different than HSE */
if (RCC_OscInitStruct->PLL.PLLSource == RCC_PLLSOURCE_HSE)
800844c: 687b ldr r3, [r7, #4]
800844e: 6a1b ldr r3, [r3, #32]
8008450: f5b3 3f80 cmp.w r3, #65536 @ 0x10000
8008454: d108 bne.n 8008468 <HAL_RCC_OscConfig+0x444>
/* Set PREDIV1 source */
SET_BIT(RCC->CFGR2, RCC_OscInitStruct->Prediv1Source);
#endif /* RCC_CFGR2_PREDIV1SRC */
/* Set PREDIV1 Value */
__HAL_RCC_HSE_PREDIV_CONFIG(RCC_OscInitStruct->HSEPredivValue);
8008456: 4b24 ldr r3, [pc, #144] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008458: 685b ldr r3, [r3, #4]
800845a: f423 3200 bic.w r2, r3, #131072 @ 0x20000
800845e: 687b ldr r3, [r7, #4]
8008460: 689b ldr r3, [r3, #8]
8008462: 4921 ldr r1, [pc, #132] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
8008464: 4313 orrs r3, r2
8008466: 604b str r3, [r1, #4]
}
/* Configure the main PLL clock source and multiplication factors. */
__HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource,
8008468: 4b1f ldr r3, [pc, #124] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800846a: 685b ldr r3, [r3, #4]
800846c: f423 1274 bic.w r2, r3, #3997696 @ 0x3d0000
8008470: 687b ldr r3, [r7, #4]
8008472: 6a19 ldr r1, [r3, #32]
8008474: 687b ldr r3, [r7, #4]
8008476: 6a5b ldr r3, [r3, #36] @ 0x24
8008478: 430b orrs r3, r1
800847a: 491b ldr r1, [pc, #108] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
800847c: 4313 orrs r3, r2
800847e: 604b str r3, [r1, #4]
RCC_OscInitStruct->PLL.PLLMUL);
/* Enable the main PLL. */
__HAL_RCC_PLL_ENABLE();
8008480: 4b1b ldr r3, [pc, #108] @ (80084f0 <HAL_RCC_OscConfig+0x4cc>)
8008482: 2201 movs r2, #1
8008484: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008486: f7fc fde1 bl 800504c <HAL_GetTick>
800848a: 6138 str r0, [r7, #16]
/* Wait till PLL is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
800848c: e008 b.n 80084a0 <HAL_RCC_OscConfig+0x47c>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
800848e: f7fc fddd bl 800504c <HAL_GetTick>
8008492: 4602 mov r2, r0
8008494: 693b ldr r3, [r7, #16]
8008496: 1ad3 subs r3, r2, r3
8008498: 2b02 cmp r3, #2
800849a: d901 bls.n 80084a0 <HAL_RCC_OscConfig+0x47c>
{
return HAL_TIMEOUT;
800849c: 2303 movs r3, #3
800849e: e03d b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80084a0: 4b11 ldr r3, [pc, #68] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80084a2: 681b ldr r3, [r3, #0]
80084a4: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80084a8: 2b00 cmp r3, #0
80084aa: d0f0 beq.n 800848e <HAL_RCC_OscConfig+0x46a>
80084ac: e035 b.n 800851a <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Disable the main PLL. */
__HAL_RCC_PLL_DISABLE();
80084ae: 4b10 ldr r3, [pc, #64] @ (80084f0 <HAL_RCC_OscConfig+0x4cc>)
80084b0: 2200 movs r2, #0
80084b2: 601a str r2, [r3, #0]
/* Get Start Tick */
tickstart = HAL_GetTick();
80084b4: f7fc fdca bl 800504c <HAL_GetTick>
80084b8: 6138 str r0, [r7, #16]
/* Wait till PLL is disabled */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80084ba: e008 b.n 80084ce <HAL_RCC_OscConfig+0x4aa>
{
if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE)
80084bc: f7fc fdc6 bl 800504c <HAL_GetTick>
80084c0: 4602 mov r2, r0
80084c2: 693b ldr r3, [r7, #16]
80084c4: 1ad3 subs r3, r2, r3
80084c6: 2b02 cmp r3, #2
80084c8: d901 bls.n 80084ce <HAL_RCC_OscConfig+0x4aa>
{
return HAL_TIMEOUT;
80084ca: 2303 movs r3, #3
80084cc: e026 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET)
80084ce: 4b06 ldr r3, [pc, #24] @ (80084e8 <HAL_RCC_OscConfig+0x4c4>)
80084d0: 681b ldr r3, [r3, #0]
80084d2: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80084d6: 2b00 cmp r3, #0
80084d8: d1f0 bne.n 80084bc <HAL_RCC_OscConfig+0x498>
80084da: e01e b.n 800851a <HAL_RCC_OscConfig+0x4f6>
}
}
else
{
/* Check if there is a request to disable the PLL used as System clock source */
if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF)
80084dc: 687b ldr r3, [r7, #4]
80084de: 69db ldr r3, [r3, #28]
80084e0: 2b01 cmp r3, #1
80084e2: d107 bne.n 80084f4 <HAL_RCC_OscConfig+0x4d0>
{
return HAL_ERROR;
80084e4: 2301 movs r3, #1
80084e6: e019 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
80084e8: 40021000 .word 0x40021000
80084ec: 40007000 .word 0x40007000
80084f0: 42420060 .word 0x42420060
}
else
{
/* Do not return HAL_ERROR if request repeats the current configuration */
pll_config = RCC->CFGR;
80084f4: 4b0b ldr r3, [pc, #44] @ (8008524 <HAL_RCC_OscConfig+0x500>)
80084f6: 685b ldr r3, [r3, #4]
80084f8: 60fb str r3, [r7, #12]
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
80084fa: 68fb ldr r3, [r7, #12]
80084fc: f403 3280 and.w r2, r3, #65536 @ 0x10000
8008500: 687b ldr r3, [r7, #4]
8008502: 6a1b ldr r3, [r3, #32]
8008504: 429a cmp r2, r3
8008506: d106 bne.n 8008516 <HAL_RCC_OscConfig+0x4f2>
(READ_BIT(pll_config, RCC_CFGR_PLLMULL) != RCC_OscInitStruct->PLL.PLLMUL))
8008508: 68fb ldr r3, [r7, #12]
800850a: f403 1270 and.w r2, r3, #3932160 @ 0x3c0000
800850e: 687b ldr r3, [r7, #4]
8008510: 6a5b ldr r3, [r3, #36] @ 0x24
if ((READ_BIT(pll_config, RCC_CFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) ||
8008512: 429a cmp r2, r3
8008514: d001 beq.n 800851a <HAL_RCC_OscConfig+0x4f6>
{
return HAL_ERROR;
8008516: 2301 movs r3, #1
8008518: e000 b.n 800851c <HAL_RCC_OscConfig+0x4f8>
}
}
}
}
return HAL_OK;
800851a: 2300 movs r3, #0
}
800851c: 4618 mov r0, r3
800851e: 3718 adds r7, #24
8008520: 46bd mov sp, r7
8008522: bd80 pop {r7, pc}
8008524: 40021000 .word 0x40021000
08008528 <HAL_RCC_ClockConfig>:
* You can use @ref HAL_RCC_GetClockConfig() function to know which clock is
* currently used as system clock source.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCC_ClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency)
{
8008528: b580 push {r7, lr}
800852a: b084 sub sp, #16
800852c: af00 add r7, sp, #0
800852e: 6078 str r0, [r7, #4]
8008530: 6039 str r1, [r7, #0]
uint32_t tickstart;
/* Check Null pointer */
if (RCC_ClkInitStruct == NULL)
8008532: 687b ldr r3, [r7, #4]
8008534: 2b00 cmp r3, #0
8008536: d101 bne.n 800853c <HAL_RCC_ClockConfig+0x14>
{
return HAL_ERROR;
8008538: 2301 movs r3, #1
800853a: e0d0 b.n 80086de <HAL_RCC_ClockConfig+0x1b6>
must be correctly programmed according to the frequency of the CPU clock
(HCLK) of the device. */
#if defined(FLASH_ACR_LATENCY)
/* Increasing the number of wait states because of higher CPU frequency */
if (FLatency > __HAL_FLASH_GET_LATENCY())
800853c: 4b6a ldr r3, [pc, #424] @ (80086e8 <HAL_RCC_ClockConfig+0x1c0>)
800853e: 681b ldr r3, [r3, #0]
8008540: f003 0307 and.w r3, r3, #7
8008544: 683a ldr r2, [r7, #0]
8008546: 429a cmp r2, r3
8008548: d910 bls.n 800856c <HAL_RCC_ClockConfig+0x44>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
800854a: 4b67 ldr r3, [pc, #412] @ (80086e8 <HAL_RCC_ClockConfig+0x1c0>)
800854c: 681b ldr r3, [r3, #0]
800854e: f023 0207 bic.w r2, r3, #7
8008552: 4965 ldr r1, [pc, #404] @ (80086e8 <HAL_RCC_ClockConfig+0x1c0>)
8008554: 683b ldr r3, [r7, #0]
8008556: 4313 orrs r3, r2
8008558: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
800855a: 4b63 ldr r3, [pc, #396] @ (80086e8 <HAL_RCC_ClockConfig+0x1c0>)
800855c: 681b ldr r3, [r3, #0]
800855e: f003 0307 and.w r3, r3, #7
8008562: 683a ldr r2, [r7, #0]
8008564: 429a cmp r2, r3
8008566: d001 beq.n 800856c <HAL_RCC_ClockConfig+0x44>
{
return HAL_ERROR;
8008568: 2301 movs r3, #1
800856a: e0b8 b.n 80086de <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- HCLK Configuration --------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK)
800856c: 687b ldr r3, [r7, #4]
800856e: 681b ldr r3, [r3, #0]
8008570: f003 0302 and.w r3, r3, #2
8008574: 2b00 cmp r3, #0
8008576: d020 beq.n 80085ba <HAL_RCC_ClockConfig+0x92>
{
/* Set the highest APBx dividers in order to ensure that we do not go through
a non-spec phase whatever we decrease or increase HCLK. */
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8008578: 687b ldr r3, [r7, #4]
800857a: 681b ldr r3, [r3, #0]
800857c: f003 0304 and.w r3, r3, #4
8008580: 2b00 cmp r3, #0
8008582: d005 beq.n 8008590 <HAL_RCC_ClockConfig+0x68>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16);
8008584: 4b59 ldr r3, [pc, #356] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
8008586: 685b ldr r3, [r3, #4]
8008588: 4a58 ldr r2, [pc, #352] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
800858a: f443 63e0 orr.w r3, r3, #1792 @ 0x700
800858e: 6053 str r3, [r2, #4]
}
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8008590: 687b ldr r3, [r7, #4]
8008592: 681b ldr r3, [r3, #0]
8008594: f003 0308 and.w r3, r3, #8
8008598: 2b00 cmp r3, #0
800859a: d005 beq.n 80085a8 <HAL_RCC_ClockConfig+0x80>
{
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3));
800859c: 4b53 ldr r3, [pc, #332] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
800859e: 685b ldr r3, [r3, #4]
80085a0: 4a52 ldr r2, [pc, #328] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
80085a2: f443 5360 orr.w r3, r3, #14336 @ 0x3800
80085a6: 6053 str r3, [r2, #4]
}
/* Set the new HCLK clock divider */
assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider);
80085a8: 4b50 ldr r3, [pc, #320] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
80085aa: 685b ldr r3, [r3, #4]
80085ac: f023 02f0 bic.w r2, r3, #240 @ 0xf0
80085b0: 687b ldr r3, [r7, #4]
80085b2: 689b ldr r3, [r3, #8]
80085b4: 494d ldr r1, [pc, #308] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
80085b6: 4313 orrs r3, r2
80085b8: 604b str r3, [r1, #4]
}
/*------------------------- SYSCLK Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK)
80085ba: 687b ldr r3, [r7, #4]
80085bc: 681b ldr r3, [r3, #0]
80085be: f003 0301 and.w r3, r3, #1
80085c2: 2b00 cmp r3, #0
80085c4: d040 beq.n 8008648 <HAL_RCC_ClockConfig+0x120>
{
assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource));
/* HSE is selected as System Clock Source */
if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE)
80085c6: 687b ldr r3, [r7, #4]
80085c8: 685b ldr r3, [r3, #4]
80085ca: 2b01 cmp r3, #1
80085cc: d107 bne.n 80085de <HAL_RCC_ClockConfig+0xb6>
{
/* Check the HSE ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET)
80085ce: 4b47 ldr r3, [pc, #284] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
80085d0: 681b ldr r3, [r3, #0]
80085d2: f403 3300 and.w r3, r3, #131072 @ 0x20000
80085d6: 2b00 cmp r3, #0
80085d8: d115 bne.n 8008606 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80085da: 2301 movs r3, #1
80085dc: e07f b.n 80086de <HAL_RCC_ClockConfig+0x1b6>
}
}
/* PLL is selected as System Clock Source */
else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK)
80085de: 687b ldr r3, [r7, #4]
80085e0: 685b ldr r3, [r3, #4]
80085e2: 2b02 cmp r3, #2
80085e4: d107 bne.n 80085f6 <HAL_RCC_ClockConfig+0xce>
{
/* Check the PLL ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET)
80085e6: 4b41 ldr r3, [pc, #260] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
80085e8: 681b ldr r3, [r3, #0]
80085ea: f003 7300 and.w r3, r3, #33554432 @ 0x2000000
80085ee: 2b00 cmp r3, #0
80085f0: d109 bne.n 8008606 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
80085f2: 2301 movs r3, #1
80085f4: e073 b.n 80086de <HAL_RCC_ClockConfig+0x1b6>
}
/* HSI is selected as System Clock Source */
else
{
/* Check the HSI ready flag */
if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET)
80085f6: 4b3d ldr r3, [pc, #244] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
80085f8: 681b ldr r3, [r3, #0]
80085fa: f003 0302 and.w r3, r3, #2
80085fe: 2b00 cmp r3, #0
8008600: d101 bne.n 8008606 <HAL_RCC_ClockConfig+0xde>
{
return HAL_ERROR;
8008602: 2301 movs r3, #1
8008604: e06b b.n 80086de <HAL_RCC_ClockConfig+0x1b6>
}
}
__HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource);
8008606: 4b39 ldr r3, [pc, #228] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
8008608: 685b ldr r3, [r3, #4]
800860a: f023 0203 bic.w r2, r3, #3
800860e: 687b ldr r3, [r7, #4]
8008610: 685b ldr r3, [r3, #4]
8008612: 4936 ldr r1, [pc, #216] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
8008614: 4313 orrs r3, r2
8008616: 604b str r3, [r1, #4]
/* Get Start Tick */
tickstart = HAL_GetTick();
8008618: f7fc fd18 bl 800504c <HAL_GetTick>
800861c: 60f8 str r0, [r7, #12]
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
800861e: e00a b.n 8008636 <HAL_RCC_ClockConfig+0x10e>
{
if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE)
8008620: f7fc fd14 bl 800504c <HAL_GetTick>
8008624: 4602 mov r2, r0
8008626: 68fb ldr r3, [r7, #12]
8008628: 1ad3 subs r3, r2, r3
800862a: f241 3288 movw r2, #5000 @ 0x1388
800862e: 4293 cmp r3, r2
8008630: d901 bls.n 8008636 <HAL_RCC_ClockConfig+0x10e>
{
return HAL_TIMEOUT;
8008632: 2303 movs r3, #3
8008634: e053 b.n 80086de <HAL_RCC_ClockConfig+0x1b6>
while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos))
8008636: 4b2d ldr r3, [pc, #180] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
8008638: 685b ldr r3, [r3, #4]
800863a: f003 020c and.w r2, r3, #12
800863e: 687b ldr r3, [r7, #4]
8008640: 685b ldr r3, [r3, #4]
8008642: 009b lsls r3, r3, #2
8008644: 429a cmp r2, r3
8008646: d1eb bne.n 8008620 <HAL_RCC_ClockConfig+0xf8>
}
}
#if defined(FLASH_ACR_LATENCY)
/* Decreasing the number of wait states because of lower CPU frequency */
if (FLatency < __HAL_FLASH_GET_LATENCY())
8008648: 4b27 ldr r3, [pc, #156] @ (80086e8 <HAL_RCC_ClockConfig+0x1c0>)
800864a: 681b ldr r3, [r3, #0]
800864c: f003 0307 and.w r3, r3, #7
8008650: 683a ldr r2, [r7, #0]
8008652: 429a cmp r2, r3
8008654: d210 bcs.n 8008678 <HAL_RCC_ClockConfig+0x150>
{
/* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */
__HAL_FLASH_SET_LATENCY(FLatency);
8008656: 4b24 ldr r3, [pc, #144] @ (80086e8 <HAL_RCC_ClockConfig+0x1c0>)
8008658: 681b ldr r3, [r3, #0]
800865a: f023 0207 bic.w r2, r3, #7
800865e: 4922 ldr r1, [pc, #136] @ (80086e8 <HAL_RCC_ClockConfig+0x1c0>)
8008660: 683b ldr r3, [r7, #0]
8008662: 4313 orrs r3, r2
8008664: 600b str r3, [r1, #0]
/* Check that the new number of wait states is taken into account to access the Flash
memory by reading the FLASH_ACR register */
if (__HAL_FLASH_GET_LATENCY() != FLatency)
8008666: 4b20 ldr r3, [pc, #128] @ (80086e8 <HAL_RCC_ClockConfig+0x1c0>)
8008668: 681b ldr r3, [r3, #0]
800866a: f003 0307 and.w r3, r3, #7
800866e: 683a ldr r2, [r7, #0]
8008670: 429a cmp r2, r3
8008672: d001 beq.n 8008678 <HAL_RCC_ClockConfig+0x150>
{
return HAL_ERROR;
8008674: 2301 movs r3, #1
8008676: e032 b.n 80086de <HAL_RCC_ClockConfig+0x1b6>
}
}
#endif /* FLASH_ACR_LATENCY */
/*-------------------------- PCLK1 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1)
8008678: 687b ldr r3, [r7, #4]
800867a: 681b ldr r3, [r3, #0]
800867c: f003 0304 and.w r3, r3, #4
8008680: 2b00 cmp r3, #0
8008682: d008 beq.n 8008696 <HAL_RCC_ClockConfig+0x16e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider);
8008684: 4b19 ldr r3, [pc, #100] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
8008686: 685b ldr r3, [r3, #4]
8008688: f423 62e0 bic.w r2, r3, #1792 @ 0x700
800868c: 687b ldr r3, [r7, #4]
800868e: 68db ldr r3, [r3, #12]
8008690: 4916 ldr r1, [pc, #88] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
8008692: 4313 orrs r3, r2
8008694: 604b str r3, [r1, #4]
}
/*-------------------------- PCLK2 Configuration ---------------------------*/
if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2)
8008696: 687b ldr r3, [r7, #4]
8008698: 681b ldr r3, [r3, #0]
800869a: f003 0308 and.w r3, r3, #8
800869e: 2b00 cmp r3, #0
80086a0: d009 beq.n 80086b6 <HAL_RCC_ClockConfig+0x18e>
{
assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider));
MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3));
80086a2: 4b12 ldr r3, [pc, #72] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
80086a4: 685b ldr r3, [r3, #4]
80086a6: f423 5260 bic.w r2, r3, #14336 @ 0x3800
80086aa: 687b ldr r3, [r7, #4]
80086ac: 691b ldr r3, [r3, #16]
80086ae: 00db lsls r3, r3, #3
80086b0: 490e ldr r1, [pc, #56] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
80086b2: 4313 orrs r3, r2
80086b4: 604b str r3, [r1, #4]
}
/* Update the SystemCoreClock global variable */
SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos];
80086b6: f000 f821 bl 80086fc <HAL_RCC_GetSysClockFreq>
80086ba: 4602 mov r2, r0
80086bc: 4b0b ldr r3, [pc, #44] @ (80086ec <HAL_RCC_ClockConfig+0x1c4>)
80086be: 685b ldr r3, [r3, #4]
80086c0: 091b lsrs r3, r3, #4
80086c2: f003 030f and.w r3, r3, #15
80086c6: 490a ldr r1, [pc, #40] @ (80086f0 <HAL_RCC_ClockConfig+0x1c8>)
80086c8: 5ccb ldrb r3, [r1, r3]
80086ca: fa22 f303 lsr.w r3, r2, r3
80086ce: 4a09 ldr r2, [pc, #36] @ (80086f4 <HAL_RCC_ClockConfig+0x1cc>)
80086d0: 6013 str r3, [r2, #0]
/* Configure the source of time base considering new system clocks settings*/
HAL_InitTick(uwTickPrio);
80086d2: 4b09 ldr r3, [pc, #36] @ (80086f8 <HAL_RCC_ClockConfig+0x1d0>)
80086d4: 681b ldr r3, [r3, #0]
80086d6: 4618 mov r0, r3
80086d8: f7fc fc76 bl 8004fc8 <HAL_InitTick>
return HAL_OK;
80086dc: 2300 movs r3, #0
}
80086de: 4618 mov r0, r3
80086e0: 3710 adds r7, #16
80086e2: 46bd mov sp, r7
80086e4: bd80 pop {r7, pc}
80086e6: bf00 nop
80086e8: 40022000 .word 0x40022000
80086ec: 40021000 .word 0x40021000
80086f0: 0800f414 .word 0x0800f414
80086f4: 20000010 .word 0x20000010
80086f8: 20000014 .word 0x20000014
080086fc <HAL_RCC_GetSysClockFreq>:
* right SYSCLK value. Otherwise, any configuration based on this function will be incorrect.
*
* @retval SYSCLK frequency
*/
uint32_t HAL_RCC_GetSysClockFreq(void)
{
80086fc: b480 push {r7}
80086fe: b087 sub sp, #28
8008700: af00 add r7, sp, #0
#else
static const uint8_t aPredivFactorTable[2U] = {1, 2};
#endif /*RCC_CFGR2_PREDIV1*/
#endif
uint32_t tmpreg = 0U, prediv = 0U, pllclk = 0U, pllmul = 0U;
8008702: 2300 movs r3, #0
8008704: 60fb str r3, [r7, #12]
8008706: 2300 movs r3, #0
8008708: 60bb str r3, [r7, #8]
800870a: 2300 movs r3, #0
800870c: 617b str r3, [r7, #20]
800870e: 2300 movs r3, #0
8008710: 607b str r3, [r7, #4]
uint32_t sysclockfreq = 0U;
8008712: 2300 movs r3, #0
8008714: 613b str r3, [r7, #16]
#if defined(RCC_CFGR2_PREDIV1SRC)
uint32_t prediv2 = 0U, pll2mul = 0U;
#endif /*RCC_CFGR2_PREDIV1SRC*/
tmpreg = RCC->CFGR;
8008716: 4b1e ldr r3, [pc, #120] @ (8008790 <HAL_RCC_GetSysClockFreq+0x94>)
8008718: 685b ldr r3, [r3, #4]
800871a: 60fb str r3, [r7, #12]
/* Get SYSCLK source -------------------------------------------------------*/
switch (tmpreg & RCC_CFGR_SWS)
800871c: 68fb ldr r3, [r7, #12]
800871e: f003 030c and.w r3, r3, #12
8008722: 2b04 cmp r3, #4
8008724: d002 beq.n 800872c <HAL_RCC_GetSysClockFreq+0x30>
8008726: 2b08 cmp r3, #8
8008728: d003 beq.n 8008732 <HAL_RCC_GetSysClockFreq+0x36>
800872a: e027 b.n 800877c <HAL_RCC_GetSysClockFreq+0x80>
{
case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock */
{
sysclockfreq = HSE_VALUE;
800872c: 4b19 ldr r3, [pc, #100] @ (8008794 <HAL_RCC_GetSysClockFreq+0x98>)
800872e: 613b str r3, [r7, #16]
break;
8008730: e027 b.n 8008782 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock */
{
pllmul = aPLLMULFactorTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMULL) >> RCC_CFGR_PLLMULL_Pos];
8008732: 68fb ldr r3, [r7, #12]
8008734: 0c9b lsrs r3, r3, #18
8008736: f003 030f and.w r3, r3, #15
800873a: 4a17 ldr r2, [pc, #92] @ (8008798 <HAL_RCC_GetSysClockFreq+0x9c>)
800873c: 5cd3 ldrb r3, [r2, r3]
800873e: 607b str r3, [r7, #4]
if ((tmpreg & RCC_CFGR_PLLSRC) != RCC_PLLSOURCE_HSI_DIV2)
8008740: 68fb ldr r3, [r7, #12]
8008742: f403 3380 and.w r3, r3, #65536 @ 0x10000
8008746: 2b00 cmp r3, #0
8008748: d010 beq.n 800876c <HAL_RCC_GetSysClockFreq+0x70>
{
#if defined(RCC_CFGR2_PREDIV1)
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR2 & RCC_CFGR2_PREDIV1) >> RCC_CFGR2_PREDIV1_Pos];
#else
prediv = aPredivFactorTable[(uint32_t)(RCC->CFGR & RCC_CFGR_PLLXTPRE) >> RCC_CFGR_PLLXTPRE_Pos];
800874a: 4b11 ldr r3, [pc, #68] @ (8008790 <HAL_RCC_GetSysClockFreq+0x94>)
800874c: 685b ldr r3, [r3, #4]
800874e: 0c5b lsrs r3, r3, #17
8008750: f003 0301 and.w r3, r3, #1
8008754: 4a11 ldr r2, [pc, #68] @ (800879c <HAL_RCC_GetSysClockFreq+0xa0>)
8008756: 5cd3 ldrb r3, [r2, r3]
8008758: 60bb str r3, [r7, #8]
{
pllclk = pllclk / 2;
}
#else
/* HSE used as PLL clock source : PLLCLK = HSE/PREDIV1 * PLLMUL */
pllclk = (uint32_t)((HSE_VALUE * pllmul) / prediv);
800875a: 687b ldr r3, [r7, #4]
800875c: 4a0d ldr r2, [pc, #52] @ (8008794 <HAL_RCC_GetSysClockFreq+0x98>)
800875e: fb03 f202 mul.w r2, r3, r2
8008762: 68bb ldr r3, [r7, #8]
8008764: fbb2 f3f3 udiv r3, r2, r3
8008768: 617b str r3, [r7, #20]
800876a: e004 b.n 8008776 <HAL_RCC_GetSysClockFreq+0x7a>
#endif /*RCC_CFGR2_PREDIV1SRC*/
}
else
{
/* HSI used as PLL clock source : PLLCLK = HSI/2 * PLLMUL */
pllclk = (uint32_t)((HSI_VALUE >> 1) * pllmul);
800876c: 687b ldr r3, [r7, #4]
800876e: 4a0c ldr r2, [pc, #48] @ (80087a0 <HAL_RCC_GetSysClockFreq+0xa4>)
8008770: fb02 f303 mul.w r3, r2, r3
8008774: 617b str r3, [r7, #20]
}
sysclockfreq = pllclk;
8008776: 697b ldr r3, [r7, #20]
8008778: 613b str r3, [r7, #16]
break;
800877a: e002 b.n 8008782 <HAL_RCC_GetSysClockFreq+0x86>
}
case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */
default: /* HSI used as system clock */
{
sysclockfreq = HSI_VALUE;
800877c: 4b09 ldr r3, [pc, #36] @ (80087a4 <HAL_RCC_GetSysClockFreq+0xa8>)
800877e: 613b str r3, [r7, #16]
break;
8008780: bf00 nop
}
}
return sysclockfreq;
8008782: 693b ldr r3, [r7, #16]
}
8008784: 4618 mov r0, r3
8008786: 371c adds r7, #28
8008788: 46bd mov sp, r7
800878a: bc80 pop {r7}
800878c: 4770 bx lr
800878e: bf00 nop
8008790: 40021000 .word 0x40021000
8008794: 00b71b00 .word 0x00b71b00
8008798: 0800f42c .word 0x0800f42c
800879c: 0800f43c .word 0x0800f43c
80087a0: 003d0900 .word 0x003d0900
80087a4: 007a1200 .word 0x007a1200
080087a8 <HAL_RCC_GetHCLKFreq>:
* @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency
* and updated within this function
* @retval HCLK frequency
*/
uint32_t HAL_RCC_GetHCLKFreq(void)
{
80087a8: b480 push {r7}
80087aa: af00 add r7, sp, #0
return SystemCoreClock;
80087ac: 4b02 ldr r3, [pc, #8] @ (80087b8 <HAL_RCC_GetHCLKFreq+0x10>)
80087ae: 681b ldr r3, [r3, #0]
}
80087b0: 4618 mov r0, r3
80087b2: 46bd mov sp, r7
80087b4: bc80 pop {r7}
80087b6: 4770 bx lr
80087b8: 20000010 .word 0x20000010
080087bc <HAL_RCC_GetPCLK1Freq>:
* @note Each time PCLK1 changes, this function must be called to update the
* right PCLK1 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK1 frequency
*/
uint32_t HAL_RCC_GetPCLK1Freq(void)
{
80087bc: b580 push {r7, lr}
80087be: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK1 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]);
80087c0: f7ff fff2 bl 80087a8 <HAL_RCC_GetHCLKFreq>
80087c4: 4602 mov r2, r0
80087c6: 4b05 ldr r3, [pc, #20] @ (80087dc <HAL_RCC_GetPCLK1Freq+0x20>)
80087c8: 685b ldr r3, [r3, #4]
80087ca: 0a1b lsrs r3, r3, #8
80087cc: f003 0307 and.w r3, r3, #7
80087d0: 4903 ldr r1, [pc, #12] @ (80087e0 <HAL_RCC_GetPCLK1Freq+0x24>)
80087d2: 5ccb ldrb r3, [r1, r3]
80087d4: fa22 f303 lsr.w r3, r2, r3
}
80087d8: 4618 mov r0, r3
80087da: bd80 pop {r7, pc}
80087dc: 40021000 .word 0x40021000
80087e0: 0800f424 .word 0x0800f424
080087e4 <HAL_RCC_GetPCLK2Freq>:
* @note Each time PCLK2 changes, this function must be called to update the
* right PCLK2 value. Otherwise, any configuration based on this function will be incorrect.
* @retval PCLK2 frequency
*/
uint32_t HAL_RCC_GetPCLK2Freq(void)
{
80087e4: b580 push {r7, lr}
80087e6: af00 add r7, sp, #0
/* Get HCLK source and Compute PCLK2 frequency ---------------------------*/
return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]);
80087e8: f7ff ffde bl 80087a8 <HAL_RCC_GetHCLKFreq>
80087ec: 4602 mov r2, r0
80087ee: 4b05 ldr r3, [pc, #20] @ (8008804 <HAL_RCC_GetPCLK2Freq+0x20>)
80087f0: 685b ldr r3, [r3, #4]
80087f2: 0adb lsrs r3, r3, #11
80087f4: f003 0307 and.w r3, r3, #7
80087f8: 4903 ldr r1, [pc, #12] @ (8008808 <HAL_RCC_GetPCLK2Freq+0x24>)
80087fa: 5ccb ldrb r3, [r1, r3]
80087fc: fa22 f303 lsr.w r3, r2, r3
}
8008800: 4618 mov r0, r3
8008802: bd80 pop {r7, pc}
8008804: 40021000 .word 0x40021000
8008808: 0800f424 .word 0x0800f424
0800880c <RCC_Delay>:
* @brief This function provides delay (in milliseconds) based on CPU cycles method.
* @param mdelay: specifies the delay time length, in milliseconds.
* @retval None
*/
static void RCC_Delay(uint32_t mdelay)
{
800880c: b480 push {r7}
800880e: b085 sub sp, #20
8008810: af00 add r7, sp, #0
8008812: 6078 str r0, [r7, #4]
__IO uint32_t Delay = mdelay * (SystemCoreClock / 8U / 1000U);
8008814: 4b0a ldr r3, [pc, #40] @ (8008840 <RCC_Delay+0x34>)
8008816: 681b ldr r3, [r3, #0]
8008818: 4a0a ldr r2, [pc, #40] @ (8008844 <RCC_Delay+0x38>)
800881a: fba2 2303 umull r2, r3, r2, r3
800881e: 0a5b lsrs r3, r3, #9
8008820: 687a ldr r2, [r7, #4]
8008822: fb02 f303 mul.w r3, r2, r3
8008826: 60fb str r3, [r7, #12]
do
{
__NOP();
8008828: bf00 nop
}
while (Delay --);
800882a: 68fb ldr r3, [r7, #12]
800882c: 1e5a subs r2, r3, #1
800882e: 60fa str r2, [r7, #12]
8008830: 2b00 cmp r3, #0
8008832: d1f9 bne.n 8008828 <RCC_Delay+0x1c>
}
8008834: bf00 nop
8008836: bf00 nop
8008838: 3714 adds r7, #20
800883a: 46bd mov sp, r7
800883c: bc80 pop {r7}
800883e: 4770 bx lr
8008840: 20000010 .word 0x20000010
8008844: 10624dd3 .word 0x10624dd3
08008848 <HAL_RCCEx_PeriphCLKConfig>:
* manually disable it.
*
* @retval HAL status
*/
HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit)
{
8008848: b580 push {r7, lr}
800884a: b086 sub sp, #24
800884c: af00 add r7, sp, #0
800884e: 6078 str r0, [r7, #4]
uint32_t tickstart = 0U, temp_reg = 0U;
8008850: 2300 movs r3, #0
8008852: 613b str r3, [r7, #16]
8008854: 2300 movs r3, #0
8008856: 60fb str r3, [r7, #12]
/* Check the parameters */
assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection));
/*------------------------------- RTC/LCD Configuration ------------------------*/
if ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == RCC_PERIPHCLK_RTC))
8008858: 687b ldr r3, [r7, #4]
800885a: 681b ldr r3, [r3, #0]
800885c: f003 0301 and.w r3, r3, #1
8008860: 2b00 cmp r3, #0
8008862: d07d beq.n 8008960 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
FlagStatus pwrclkchanged = RESET;
8008864: 2300 movs r3, #0
8008866: 75fb strb r3, [r7, #23]
assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection));
/* As soon as function is called to change RTC clock source, activation of the
power domain is done. */
/* Requires to enable write access to Backup Domain of necessary */
if (__HAL_RCC_PWR_IS_CLK_DISABLED())
8008868: 4b4f ldr r3, [pc, #316] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800886a: 69db ldr r3, [r3, #28]
800886c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8008870: 2b00 cmp r3, #0
8008872: d10d bne.n 8008890 <HAL_RCCEx_PeriphCLKConfig+0x48>
{
__HAL_RCC_PWR_CLK_ENABLE();
8008874: 4b4c ldr r3, [pc, #304] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008876: 69db ldr r3, [r3, #28]
8008878: 4a4b ldr r2, [pc, #300] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800887a: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000
800887e: 61d3 str r3, [r2, #28]
8008880: 4b49 ldr r3, [pc, #292] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008882: 69db ldr r3, [r3, #28]
8008884: f003 5380 and.w r3, r3, #268435456 @ 0x10000000
8008888: 60bb str r3, [r7, #8]
800888a: 68bb ldr r3, [r7, #8]
pwrclkchanged = SET;
800888c: 2301 movs r3, #1
800888e: 75fb strb r3, [r7, #23]
}
if (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
8008890: 4b46 ldr r3, [pc, #280] @ (80089ac <HAL_RCCEx_PeriphCLKConfig+0x164>)
8008892: 681b ldr r3, [r3, #0]
8008894: f403 7380 and.w r3, r3, #256 @ 0x100
8008898: 2b00 cmp r3, #0
800889a: d118 bne.n 80088ce <HAL_RCCEx_PeriphCLKConfig+0x86>
{
/* Enable write access to Backup domain */
SET_BIT(PWR->CR, PWR_CR_DBP);
800889c: 4b43 ldr r3, [pc, #268] @ (80089ac <HAL_RCCEx_PeriphCLKConfig+0x164>)
800889e: 681b ldr r3, [r3, #0]
80088a0: 4a42 ldr r2, [pc, #264] @ (80089ac <HAL_RCCEx_PeriphCLKConfig+0x164>)
80088a2: f443 7380 orr.w r3, r3, #256 @ 0x100
80088a6: 6013 str r3, [r2, #0]
/* Wait for Backup domain Write protection disable */
tickstart = HAL_GetTick();
80088a8: f7fc fbd0 bl 800504c <HAL_GetTick>
80088ac: 6138 str r0, [r7, #16]
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80088ae: e008 b.n 80088c2 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE)
80088b0: f7fc fbcc bl 800504c <HAL_GetTick>
80088b4: 4602 mov r2, r0
80088b6: 693b ldr r3, [r7, #16]
80088b8: 1ad3 subs r3, r2, r3
80088ba: 2b64 cmp r3, #100 @ 0x64
80088bc: d901 bls.n 80088c2 <HAL_RCCEx_PeriphCLKConfig+0x7a>
{
return HAL_TIMEOUT;
80088be: 2303 movs r3, #3
80088c0: e06d b.n 800899e <HAL_RCCEx_PeriphCLKConfig+0x156>
while (HAL_IS_BIT_CLR(PWR->CR, PWR_CR_DBP))
80088c2: 4b3a ldr r3, [pc, #232] @ (80089ac <HAL_RCCEx_PeriphCLKConfig+0x164>)
80088c4: 681b ldr r3, [r3, #0]
80088c6: f403 7380 and.w r3, r3, #256 @ 0x100
80088ca: 2b00 cmp r3, #0
80088cc: d0f0 beq.n 80088b0 <HAL_RCCEx_PeriphCLKConfig+0x68>
}
}
}
/* Reset the Backup domain only if the RTC Clock source selection is modified from reset value */
temp_reg = (RCC->BDCR & RCC_BDCR_RTCSEL);
80088ce: 4b36 ldr r3, [pc, #216] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80088d0: 6a1b ldr r3, [r3, #32]
80088d2: f403 7340 and.w r3, r3, #768 @ 0x300
80088d6: 60fb str r3, [r7, #12]
if ((temp_reg != 0x00000000U) && (temp_reg != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL)))
80088d8: 68fb ldr r3, [r7, #12]
80088da: 2b00 cmp r3, #0
80088dc: d02e beq.n 800893c <HAL_RCCEx_PeriphCLKConfig+0xf4>
80088de: 687b ldr r3, [r7, #4]
80088e0: 685b ldr r3, [r3, #4]
80088e2: f403 7340 and.w r3, r3, #768 @ 0x300
80088e6: 68fa ldr r2, [r7, #12]
80088e8: 429a cmp r2, r3
80088ea: d027 beq.n 800893c <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Store the content of BDCR register before the reset of Backup Domain */
temp_reg = (RCC->BDCR & ~(RCC_BDCR_RTCSEL));
80088ec: 4b2e ldr r3, [pc, #184] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
80088ee: 6a1b ldr r3, [r3, #32]
80088f0: f423 7340 bic.w r3, r3, #768 @ 0x300
80088f4: 60fb str r3, [r7, #12]
/* RTC Clock selection can be changed only if the Backup Domain is reset */
__HAL_RCC_BACKUPRESET_FORCE();
80088f6: 4b2e ldr r3, [pc, #184] @ (80089b0 <HAL_RCCEx_PeriphCLKConfig+0x168>)
80088f8: 2201 movs r2, #1
80088fa: 601a str r2, [r3, #0]
__HAL_RCC_BACKUPRESET_RELEASE();
80088fc: 4b2c ldr r3, [pc, #176] @ (80089b0 <HAL_RCCEx_PeriphCLKConfig+0x168>)
80088fe: 2200 movs r2, #0
8008900: 601a str r2, [r3, #0]
/* Restore the Content of BDCR register */
RCC->BDCR = temp_reg;
8008902: 4a29 ldr r2, [pc, #164] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008904: 68fb ldr r3, [r7, #12]
8008906: 6213 str r3, [r2, #32]
/* Wait for LSERDY if LSE was enabled */
if (HAL_IS_BIT_SET(temp_reg, RCC_BDCR_LSEON))
8008908: 68fb ldr r3, [r7, #12]
800890a: f003 0301 and.w r3, r3, #1
800890e: 2b00 cmp r3, #0
8008910: d014 beq.n 800893c <HAL_RCCEx_PeriphCLKConfig+0xf4>
{
/* Get Start Tick */
tickstart = HAL_GetTick();
8008912: f7fc fb9b bl 800504c <HAL_GetTick>
8008916: 6138 str r0, [r7, #16]
/* Wait till LSE is ready */
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008918: e00a b.n 8008930 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE)
800891a: f7fc fb97 bl 800504c <HAL_GetTick>
800891e: 4602 mov r2, r0
8008920: 693b ldr r3, [r7, #16]
8008922: 1ad3 subs r3, r2, r3
8008924: f241 3288 movw r2, #5000 @ 0x1388
8008928: 4293 cmp r3, r2
800892a: d901 bls.n 8008930 <HAL_RCCEx_PeriphCLKConfig+0xe8>
{
return HAL_TIMEOUT;
800892c: 2303 movs r3, #3
800892e: e036 b.n 800899e <HAL_RCCEx_PeriphCLKConfig+0x156>
while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET)
8008930: 4b1d ldr r3, [pc, #116] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008932: 6a1b ldr r3, [r3, #32]
8008934: f003 0302 and.w r3, r3, #2
8008938: 2b00 cmp r3, #0
800893a: d0ee beq.n 800891a <HAL_RCCEx_PeriphCLKConfig+0xd2>
}
}
}
}
__HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection);
800893c: 4b1a ldr r3, [pc, #104] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800893e: 6a1b ldr r3, [r3, #32]
8008940: f423 7240 bic.w r2, r3, #768 @ 0x300
8008944: 687b ldr r3, [r7, #4]
8008946: 685b ldr r3, [r3, #4]
8008948: 4917 ldr r1, [pc, #92] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800894a: 4313 orrs r3, r2
800894c: 620b str r3, [r1, #32]
/* Require to disable power clock if necessary */
if (pwrclkchanged == SET)
800894e: 7dfb ldrb r3, [r7, #23]
8008950: 2b01 cmp r3, #1
8008952: d105 bne.n 8008960 <HAL_RCCEx_PeriphCLKConfig+0x118>
{
__HAL_RCC_PWR_CLK_DISABLE();
8008954: 4b14 ldr r3, [pc, #80] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008956: 69db ldr r3, [r3, #28]
8008958: 4a13 ldr r2, [pc, #76] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800895a: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000
800895e: 61d3 str r3, [r2, #28]
}
}
/*------------------------------ ADC clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_ADC) == RCC_PERIPHCLK_ADC)
8008960: 687b ldr r3, [r7, #4]
8008962: 681b ldr r3, [r3, #0]
8008964: f003 0302 and.w r3, r3, #2
8008968: 2b00 cmp r3, #0
800896a: d008 beq.n 800897e <HAL_RCCEx_PeriphCLKConfig+0x136>
{
/* Check the parameters */
assert_param(IS_RCC_ADCPLLCLK_DIV(PeriphClkInit->AdcClockSelection));
/* Configure the ADC clock source */
__HAL_RCC_ADC_CONFIG(PeriphClkInit->AdcClockSelection);
800896c: 4b0e ldr r3, [pc, #56] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800896e: 685b ldr r3, [r3, #4]
8008970: f423 4240 bic.w r2, r3, #49152 @ 0xc000
8008974: 687b ldr r3, [r7, #4]
8008976: 689b ldr r3, [r3, #8]
8008978: 490b ldr r1, [pc, #44] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800897a: 4313 orrs r3, r2
800897c: 604b str r3, [r1, #4]
#if defined(STM32F102x6) || defined(STM32F102xB) || defined(STM32F103x6)\
|| defined(STM32F103xB) || defined(STM32F103xE) || defined(STM32F103xG)\
|| defined(STM32F105xC) || defined(STM32F107xC)
/*------------------------------ USB clock Configuration ------------------*/
if (((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USB) == RCC_PERIPHCLK_USB)
800897e: 687b ldr r3, [r7, #4]
8008980: 681b ldr r3, [r3, #0]
8008982: f003 0310 and.w r3, r3, #16
8008986: 2b00 cmp r3, #0
8008988: d008 beq.n 800899c <HAL_RCCEx_PeriphCLKConfig+0x154>
{
/* Check the parameters */
assert_param(IS_RCC_USBPLLCLK_DIV(PeriphClkInit->UsbClockSelection));
/* Configure the USB clock source */
__HAL_RCC_USB_CONFIG(PeriphClkInit->UsbClockSelection);
800898a: 4b07 ldr r3, [pc, #28] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
800898c: 685b ldr r3, [r3, #4]
800898e: f423 0280 bic.w r2, r3, #4194304 @ 0x400000
8008992: 687b ldr r3, [r7, #4]
8008994: 68db ldr r3, [r3, #12]
8008996: 4904 ldr r1, [pc, #16] @ (80089a8 <HAL_RCCEx_PeriphCLKConfig+0x160>)
8008998: 4313 orrs r3, r2
800899a: 604b str r3, [r1, #4]
}
#endif /* STM32F102x6 || STM32F102xB || STM32F103x6 || STM32F103xB || STM32F103xE || STM32F103xG || STM32F105xC || STM32F107xC */
return HAL_OK;
800899c: 2300 movs r3, #0
}
800899e: 4618 mov r0, r3
80089a0: 3718 adds r7, #24
80089a2: 46bd mov sp, r7
80089a4: bd80 pop {r7, pc}
80089a6: bf00 nop
80089a8: 40021000 .word 0x40021000
80089ac: 40007000 .word 0x40007000
80089b0: 42420440 .word 0x42420440
080089b4 <HAL_TIM_Base_Init>:
* Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init()
* @param htim TIM Base handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim)
{
80089b4: b580 push {r7, lr}
80089b6: b082 sub sp, #8
80089b8: af00 add r7, sp, #0
80089ba: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
80089bc: 687b ldr r3, [r7, #4]
80089be: 2b00 cmp r3, #0
80089c0: d101 bne.n 80089c6 <HAL_TIM_Base_Init+0x12>
{
return HAL_ERROR;
80089c2: 2301 movs r3, #1
80089c4: e041 b.n 8008a4a <HAL_TIM_Base_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
80089c6: 687b ldr r3, [r7, #4]
80089c8: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
80089cc: b2db uxtb r3, r3
80089ce: 2b00 cmp r3, #0
80089d0: d106 bne.n 80089e0 <HAL_TIM_Base_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
80089d2: 687b ldr r3, [r7, #4]
80089d4: 2200 movs r2, #0
80089d6: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->Base_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC */
HAL_TIM_Base_MspInit(htim);
80089da: 6878 ldr r0, [r7, #4]
80089dc: f7fc f96a bl 8004cb4 <HAL_TIM_Base_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
80089e0: 687b ldr r3, [r7, #4]
80089e2: 2202 movs r2, #2
80089e4: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Set the Time Base configuration */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
80089e8: 687b ldr r3, [r7, #4]
80089ea: 681a ldr r2, [r3, #0]
80089ec: 687b ldr r3, [r7, #4]
80089ee: 3304 adds r3, #4
80089f0: 4619 mov r1, r3
80089f2: 4610 mov r0, r2
80089f4: f000 fb3e bl 8009074 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
80089f8: 687b ldr r3, [r7, #4]
80089fa: 2201 movs r2, #1
80089fc: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008a00: 687b ldr r3, [r7, #4]
8008a02: 2201 movs r2, #1
8008a04: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008a08: 687b ldr r3, [r7, #4]
8008a0a: 2201 movs r2, #1
8008a0c: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008a10: 687b ldr r3, [r7, #4]
8008a12: 2201 movs r2, #1
8008a14: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008a18: 687b ldr r3, [r7, #4]
8008a1a: 2201 movs r2, #1
8008a1c: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008a20: 687b ldr r3, [r7, #4]
8008a22: 2201 movs r2, #1
8008a24: f883 2042 strb.w r2, [r3, #66] @ 0x42
8008a28: 687b ldr r3, [r7, #4]
8008a2a: 2201 movs r2, #1
8008a2c: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008a30: 687b ldr r3, [r7, #4]
8008a32: 2201 movs r2, #1
8008a34: f883 2044 strb.w r2, [r3, #68] @ 0x44
8008a38: 687b ldr r3, [r7, #4]
8008a3a: 2201 movs r2, #1
8008a3c: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008a40: 687b ldr r3, [r7, #4]
8008a42: 2201 movs r2, #1
8008a44: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8008a48: 2300 movs r3, #0
}
8008a4a: 4618 mov r0, r3
8008a4c: 3708 adds r7, #8
8008a4e: 46bd mov sp, r7
8008a50: bd80 pop {r7, pc}
08008a52 <HAL_TIM_PWM_Init>:
* Ex: call @ref HAL_TIM_PWM_DeInit() before HAL_TIM_PWM_Init()
* @param htim TIM PWM handle
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Init(TIM_HandleTypeDef *htim)
{
8008a52: b580 push {r7, lr}
8008a54: b082 sub sp, #8
8008a56: af00 add r7, sp, #0
8008a58: 6078 str r0, [r7, #4]
/* Check the TIM handle allocation */
if (htim == NULL)
8008a5a: 687b ldr r3, [r7, #4]
8008a5c: 2b00 cmp r3, #0
8008a5e: d101 bne.n 8008a64 <HAL_TIM_PWM_Init+0x12>
{
return HAL_ERROR;
8008a60: 2301 movs r3, #1
8008a62: e041 b.n 8008ae8 <HAL_TIM_PWM_Init+0x96>
assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
assert_param(IS_TIM_PERIOD(htim->Init.Period));
assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
if (htim->State == HAL_TIM_STATE_RESET)
8008a64: 687b ldr r3, [r7, #4]
8008a66: f893 303d ldrb.w r3, [r3, #61] @ 0x3d
8008a6a: b2db uxtb r3, r3
8008a6c: 2b00 cmp r3, #0
8008a6e: d106 bne.n 8008a7e <HAL_TIM_PWM_Init+0x2c>
{
/* Allocate lock resource and initialize it */
htim->Lock = HAL_UNLOCKED;
8008a70: 687b ldr r3, [r7, #4]
8008a72: 2200 movs r2, #0
8008a74: f883 203c strb.w r2, [r3, #60] @ 0x3c
}
/* Init the low level hardware : GPIO, CLOCK, NVIC */
htim->PWM_MspInitCallback(htim);
#else
/* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
HAL_TIM_PWM_MspInit(htim);
8008a78: 6878 ldr r0, [r7, #4]
8008a7a: f000 f839 bl 8008af0 <HAL_TIM_PWM_MspInit>
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}
/* Set the TIM state */
htim->State = HAL_TIM_STATE_BUSY;
8008a7e: 687b ldr r3, [r7, #4]
8008a80: 2202 movs r2, #2
8008a82: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Init the base time for the PWM */
TIM_Base_SetConfig(htim->Instance, &htim->Init);
8008a86: 687b ldr r3, [r7, #4]
8008a88: 681a ldr r2, [r3, #0]
8008a8a: 687b ldr r3, [r7, #4]
8008a8c: 3304 adds r3, #4
8008a8e: 4619 mov r1, r3
8008a90: 4610 mov r0, r2
8008a92: f000 faef bl 8009074 <TIM_Base_SetConfig>
/* Initialize the DMA burst operation state */
htim->DMABurstState = HAL_DMA_BURST_STATE_READY;
8008a96: 687b ldr r3, [r7, #4]
8008a98: 2201 movs r2, #1
8008a9a: f883 2046 strb.w r2, [r3, #70] @ 0x46
/* Initialize the TIM channels state */
TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008a9e: 687b ldr r3, [r7, #4]
8008aa0: 2201 movs r2, #1
8008aa2: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008aa6: 687b ldr r3, [r7, #4]
8008aa8: 2201 movs r2, #1
8008aaa: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008aae: 687b ldr r3, [r7, #4]
8008ab0: 2201 movs r2, #1
8008ab2: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008ab6: 687b ldr r3, [r7, #4]
8008ab8: 2201 movs r2, #1
8008aba: f883 2041 strb.w r2, [r3, #65] @ 0x41
TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY);
8008abe: 687b ldr r3, [r7, #4]
8008ac0: 2201 movs r2, #1
8008ac2: f883 2042 strb.w r2, [r3, #66] @ 0x42
8008ac6: 687b ldr r3, [r7, #4]
8008ac8: 2201 movs r2, #1
8008aca: f883 2043 strb.w r2, [r3, #67] @ 0x43
8008ace: 687b ldr r3, [r7, #4]
8008ad0: 2201 movs r2, #1
8008ad2: f883 2044 strb.w r2, [r3, #68] @ 0x44
8008ad6: 687b ldr r3, [r7, #4]
8008ad8: 2201 movs r2, #1
8008ada: f883 2045 strb.w r2, [r3, #69] @ 0x45
/* Initialize the TIM state*/
htim->State = HAL_TIM_STATE_READY;
8008ade: 687b ldr r3, [r7, #4]
8008ae0: 2201 movs r2, #1
8008ae2: f883 203d strb.w r2, [r3, #61] @ 0x3d
return HAL_OK;
8008ae6: 2300 movs r3, #0
}
8008ae8: 4618 mov r0, r3
8008aea: 3708 adds r7, #8
8008aec: 46bd mov sp, r7
8008aee: bd80 pop {r7, pc}
08008af0 <HAL_TIM_PWM_MspInit>:
* @brief Initializes the TIM PWM MSP.
* @param htim TIM PWM handle
* @retval None
*/
__weak void HAL_TIM_PWM_MspInit(TIM_HandleTypeDef *htim)
{
8008af0: b480 push {r7}
8008af2: b083 sub sp, #12
8008af4: af00 add r7, sp, #0
8008af6: 6078 str r0, [r7, #4]
UNUSED(htim);
/* NOTE : This function should not be modified, when the callback is needed,
the HAL_TIM_PWM_MspInit could be implemented in the user file
*/
}
8008af8: bf00 nop
8008afa: 370c adds r7, #12
8008afc: 46bd mov sp, r7
8008afe: bc80 pop {r7}
8008b00: 4770 bx lr
...
08008b04 <HAL_TIM_PWM_Start>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008b04: b580 push {r7, lr}
8008b06: b084 sub sp, #16
8008b08: af00 add r7, sp, #0
8008b0a: 6078 str r0, [r7, #4]
8008b0c: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Check the TIM channel state */
if (TIM_CHANNEL_STATE_GET(htim, Channel) != HAL_TIM_CHANNEL_STATE_READY)
8008b0e: 683b ldr r3, [r7, #0]
8008b10: 2b00 cmp r3, #0
8008b12: d109 bne.n 8008b28 <HAL_TIM_PWM_Start+0x24>
8008b14: 687b ldr r3, [r7, #4]
8008b16: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8008b1a: b2db uxtb r3, r3
8008b1c: 2b01 cmp r3, #1
8008b1e: bf14 ite ne
8008b20: 2301 movne r3, #1
8008b22: 2300 moveq r3, #0
8008b24: b2db uxtb r3, r3
8008b26: e022 b.n 8008b6e <HAL_TIM_PWM_Start+0x6a>
8008b28: 683b ldr r3, [r7, #0]
8008b2a: 2b04 cmp r3, #4
8008b2c: d109 bne.n 8008b42 <HAL_TIM_PWM_Start+0x3e>
8008b2e: 687b ldr r3, [r7, #4]
8008b30: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8008b34: b2db uxtb r3, r3
8008b36: 2b01 cmp r3, #1
8008b38: bf14 ite ne
8008b3a: 2301 movne r3, #1
8008b3c: 2300 moveq r3, #0
8008b3e: b2db uxtb r3, r3
8008b40: e015 b.n 8008b6e <HAL_TIM_PWM_Start+0x6a>
8008b42: 683b ldr r3, [r7, #0]
8008b44: 2b08 cmp r3, #8
8008b46: d109 bne.n 8008b5c <HAL_TIM_PWM_Start+0x58>
8008b48: 687b ldr r3, [r7, #4]
8008b4a: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8008b4e: b2db uxtb r3, r3
8008b50: 2b01 cmp r3, #1
8008b52: bf14 ite ne
8008b54: 2301 movne r3, #1
8008b56: 2300 moveq r3, #0
8008b58: b2db uxtb r3, r3
8008b5a: e008 b.n 8008b6e <HAL_TIM_PWM_Start+0x6a>
8008b5c: 687b ldr r3, [r7, #4]
8008b5e: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8008b62: b2db uxtb r3, r3
8008b64: 2b01 cmp r3, #1
8008b66: bf14 ite ne
8008b68: 2301 movne r3, #1
8008b6a: 2300 moveq r3, #0
8008b6c: b2db uxtb r3, r3
8008b6e: 2b00 cmp r3, #0
8008b70: d001 beq.n 8008b76 <HAL_TIM_PWM_Start+0x72>
{
return HAL_ERROR;
8008b72: 2301 movs r3, #1
8008b74: e05e b.n 8008c34 <HAL_TIM_PWM_Start+0x130>
}
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_BUSY);
8008b76: 683b ldr r3, [r7, #0]
8008b78: 2b00 cmp r3, #0
8008b7a: d104 bne.n 8008b86 <HAL_TIM_PWM_Start+0x82>
8008b7c: 687b ldr r3, [r7, #4]
8008b7e: 2202 movs r2, #2
8008b80: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008b84: e013 b.n 8008bae <HAL_TIM_PWM_Start+0xaa>
8008b86: 683b ldr r3, [r7, #0]
8008b88: 2b04 cmp r3, #4
8008b8a: d104 bne.n 8008b96 <HAL_TIM_PWM_Start+0x92>
8008b8c: 687b ldr r3, [r7, #4]
8008b8e: 2202 movs r2, #2
8008b90: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008b94: e00b b.n 8008bae <HAL_TIM_PWM_Start+0xaa>
8008b96: 683b ldr r3, [r7, #0]
8008b98: 2b08 cmp r3, #8
8008b9a: d104 bne.n 8008ba6 <HAL_TIM_PWM_Start+0xa2>
8008b9c: 687b ldr r3, [r7, #4]
8008b9e: 2202 movs r2, #2
8008ba0: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008ba4: e003 b.n 8008bae <HAL_TIM_PWM_Start+0xaa>
8008ba6: 687b ldr r3, [r7, #4]
8008ba8: 2202 movs r2, #2
8008baa: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Enable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_ENABLE);
8008bae: 687b ldr r3, [r7, #4]
8008bb0: 681b ldr r3, [r3, #0]
8008bb2: 2201 movs r2, #1
8008bb4: 6839 ldr r1, [r7, #0]
8008bb6: 4618 mov r0, r3
8008bb8: f000 fce8 bl 800958c <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008bbc: 687b ldr r3, [r7, #4]
8008bbe: 681b ldr r3, [r3, #0]
8008bc0: 4a1e ldr r2, [pc, #120] @ (8008c3c <HAL_TIM_PWM_Start+0x138>)
8008bc2: 4293 cmp r3, r2
8008bc4: d107 bne.n 8008bd6 <HAL_TIM_PWM_Start+0xd2>
{
/* Enable the main output */
__HAL_TIM_MOE_ENABLE(htim);
8008bc6: 687b ldr r3, [r7, #4]
8008bc8: 681b ldr r3, [r3, #0]
8008bca: 6c5a ldr r2, [r3, #68] @ 0x44
8008bcc: 687b ldr r3, [r7, #4]
8008bce: 681b ldr r3, [r3, #0]
8008bd0: f442 4200 orr.w r2, r2, #32768 @ 0x8000
8008bd4: 645a str r2, [r3, #68] @ 0x44
}
/* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8008bd6: 687b ldr r3, [r7, #4]
8008bd8: 681b ldr r3, [r3, #0]
8008bda: 4a18 ldr r2, [pc, #96] @ (8008c3c <HAL_TIM_PWM_Start+0x138>)
8008bdc: 4293 cmp r3, r2
8008bde: d00e beq.n 8008bfe <HAL_TIM_PWM_Start+0xfa>
8008be0: 687b ldr r3, [r7, #4]
8008be2: 681b ldr r3, [r3, #0]
8008be4: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8008be8: d009 beq.n 8008bfe <HAL_TIM_PWM_Start+0xfa>
8008bea: 687b ldr r3, [r7, #4]
8008bec: 681b ldr r3, [r3, #0]
8008bee: 4a14 ldr r2, [pc, #80] @ (8008c40 <HAL_TIM_PWM_Start+0x13c>)
8008bf0: 4293 cmp r3, r2
8008bf2: d004 beq.n 8008bfe <HAL_TIM_PWM_Start+0xfa>
8008bf4: 687b ldr r3, [r7, #4]
8008bf6: 681b ldr r3, [r3, #0]
8008bf8: 4a12 ldr r2, [pc, #72] @ (8008c44 <HAL_TIM_PWM_Start+0x140>)
8008bfa: 4293 cmp r3, r2
8008bfc: d111 bne.n 8008c22 <HAL_TIM_PWM_Start+0x11e>
{
tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
8008bfe: 687b ldr r3, [r7, #4]
8008c00: 681b ldr r3, [r3, #0]
8008c02: 689b ldr r3, [r3, #8]
8008c04: f003 0307 and.w r3, r3, #7
8008c08: 60fb str r3, [r7, #12]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008c0a: 68fb ldr r3, [r7, #12]
8008c0c: 2b06 cmp r3, #6
8008c0e: d010 beq.n 8008c32 <HAL_TIM_PWM_Start+0x12e>
{
__HAL_TIM_ENABLE(htim);
8008c10: 687b ldr r3, [r7, #4]
8008c12: 681b ldr r3, [r3, #0]
8008c14: 681a ldr r2, [r3, #0]
8008c16: 687b ldr r3, [r7, #4]
8008c18: 681b ldr r3, [r3, #0]
8008c1a: f042 0201 orr.w r2, r2, #1
8008c1e: 601a str r2, [r3, #0]
if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
8008c20: e007 b.n 8008c32 <HAL_TIM_PWM_Start+0x12e>
}
}
else
{
__HAL_TIM_ENABLE(htim);
8008c22: 687b ldr r3, [r7, #4]
8008c24: 681b ldr r3, [r3, #0]
8008c26: 681a ldr r2, [r3, #0]
8008c28: 687b ldr r3, [r7, #4]
8008c2a: 681b ldr r3, [r3, #0]
8008c2c: f042 0201 orr.w r2, r2, #1
8008c30: 601a str r2, [r3, #0]
}
/* Return function status */
return HAL_OK;
8008c32: 2300 movs r3, #0
}
8008c34: 4618 mov r0, r3
8008c36: 3710 adds r7, #16
8008c38: 46bd mov sp, r7
8008c3a: bd80 pop {r7, pc}
8008c3c: 40012c00 .word 0x40012c00
8008c40: 40000400 .word 0x40000400
8008c44: 40000800 .word 0x40000800
08008c48 <HAL_TIM_PWM_Stop>:
* @arg TIM_CHANNEL_3: TIM Channel 3 selected
* @arg TIM_CHANNEL_4: TIM Channel 4 selected
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
{
8008c48: b580 push {r7, lr}
8008c4a: b082 sub sp, #8
8008c4c: af00 add r7, sp, #0
8008c4e: 6078 str r0, [r7, #4]
8008c50: 6039 str r1, [r7, #0]
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
/* Disable the Capture compare channel */
TIM_CCxChannelCmd(htim->Instance, Channel, TIM_CCx_DISABLE);
8008c52: 687b ldr r3, [r7, #4]
8008c54: 681b ldr r3, [r3, #0]
8008c56: 2200 movs r2, #0
8008c58: 6839 ldr r1, [r7, #0]
8008c5a: 4618 mov r0, r3
8008c5c: f000 fc96 bl 800958c <TIM_CCxChannelCmd>
if (IS_TIM_BREAK_INSTANCE(htim->Instance) != RESET)
8008c60: 687b ldr r3, [r7, #4]
8008c62: 681b ldr r3, [r3, #0]
8008c64: 4a29 ldr r2, [pc, #164] @ (8008d0c <HAL_TIM_PWM_Stop+0xc4>)
8008c66: 4293 cmp r3, r2
8008c68: d117 bne.n 8008c9a <HAL_TIM_PWM_Stop+0x52>
{
/* Disable the Main Output */
__HAL_TIM_MOE_DISABLE(htim);
8008c6a: 687b ldr r3, [r7, #4]
8008c6c: 681b ldr r3, [r3, #0]
8008c6e: 6a1a ldr r2, [r3, #32]
8008c70: f241 1311 movw r3, #4369 @ 0x1111
8008c74: 4013 ands r3, r2
8008c76: 2b00 cmp r3, #0
8008c78: d10f bne.n 8008c9a <HAL_TIM_PWM_Stop+0x52>
8008c7a: 687b ldr r3, [r7, #4]
8008c7c: 681b ldr r3, [r3, #0]
8008c7e: 6a1a ldr r2, [r3, #32]
8008c80: f240 4344 movw r3, #1092 @ 0x444
8008c84: 4013 ands r3, r2
8008c86: 2b00 cmp r3, #0
8008c88: d107 bne.n 8008c9a <HAL_TIM_PWM_Stop+0x52>
8008c8a: 687b ldr r3, [r7, #4]
8008c8c: 681b ldr r3, [r3, #0]
8008c8e: 6c5a ldr r2, [r3, #68] @ 0x44
8008c90: 687b ldr r3, [r7, #4]
8008c92: 681b ldr r3, [r3, #0]
8008c94: f422 4200 bic.w r2, r2, #32768 @ 0x8000
8008c98: 645a str r2, [r3, #68] @ 0x44
}
/* Disable the Peripheral */
__HAL_TIM_DISABLE(htim);
8008c9a: 687b ldr r3, [r7, #4]
8008c9c: 681b ldr r3, [r3, #0]
8008c9e: 6a1a ldr r2, [r3, #32]
8008ca0: f241 1311 movw r3, #4369 @ 0x1111
8008ca4: 4013 ands r3, r2
8008ca6: 2b00 cmp r3, #0
8008ca8: d10f bne.n 8008cca <HAL_TIM_PWM_Stop+0x82>
8008caa: 687b ldr r3, [r7, #4]
8008cac: 681b ldr r3, [r3, #0]
8008cae: 6a1a ldr r2, [r3, #32]
8008cb0: f240 4344 movw r3, #1092 @ 0x444
8008cb4: 4013 ands r3, r2
8008cb6: 2b00 cmp r3, #0
8008cb8: d107 bne.n 8008cca <HAL_TIM_PWM_Stop+0x82>
8008cba: 687b ldr r3, [r7, #4]
8008cbc: 681b ldr r3, [r3, #0]
8008cbe: 681a ldr r2, [r3, #0]
8008cc0: 687b ldr r3, [r7, #4]
8008cc2: 681b ldr r3, [r3, #0]
8008cc4: f022 0201 bic.w r2, r2, #1
8008cc8: 601a str r2, [r3, #0]
/* Set the TIM channel state */
TIM_CHANNEL_STATE_SET(htim, Channel, HAL_TIM_CHANNEL_STATE_READY);
8008cca: 683b ldr r3, [r7, #0]
8008ccc: 2b00 cmp r3, #0
8008cce: d104 bne.n 8008cda <HAL_TIM_PWM_Stop+0x92>
8008cd0: 687b ldr r3, [r7, #4]
8008cd2: 2201 movs r2, #1
8008cd4: f883 203e strb.w r2, [r3, #62] @ 0x3e
8008cd8: e013 b.n 8008d02 <HAL_TIM_PWM_Stop+0xba>
8008cda: 683b ldr r3, [r7, #0]
8008cdc: 2b04 cmp r3, #4
8008cde: d104 bne.n 8008cea <HAL_TIM_PWM_Stop+0xa2>
8008ce0: 687b ldr r3, [r7, #4]
8008ce2: 2201 movs r2, #1
8008ce4: f883 203f strb.w r2, [r3, #63] @ 0x3f
8008ce8: e00b b.n 8008d02 <HAL_TIM_PWM_Stop+0xba>
8008cea: 683b ldr r3, [r7, #0]
8008cec: 2b08 cmp r3, #8
8008cee: d104 bne.n 8008cfa <HAL_TIM_PWM_Stop+0xb2>
8008cf0: 687b ldr r3, [r7, #4]
8008cf2: 2201 movs r2, #1
8008cf4: f883 2040 strb.w r2, [r3, #64] @ 0x40
8008cf8: e003 b.n 8008d02 <HAL_TIM_PWM_Stop+0xba>
8008cfa: 687b ldr r3, [r7, #4]
8008cfc: 2201 movs r2, #1
8008cfe: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Return function status */
return HAL_OK;
8008d02: 2300 movs r3, #0
}
8008d04: 4618 mov r0, r3
8008d06: 3708 adds r7, #8
8008d08: 46bd mov sp, r7
8008d0a: bd80 pop {r7, pc}
8008d0c: 40012c00 .word 0x40012c00
08008d10 <HAL_TIM_PWM_ConfigChannel>:
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_PWM_ConfigChannel(TIM_HandleTypeDef *htim,
const TIM_OC_InitTypeDef *sConfig,
uint32_t Channel)
{
8008d10: b580 push {r7, lr}
8008d12: b086 sub sp, #24
8008d14: af00 add r7, sp, #0
8008d16: 60f8 str r0, [r7, #12]
8008d18: 60b9 str r1, [r7, #8]
8008d1a: 607a str r2, [r7, #4]
HAL_StatusTypeDef status = HAL_OK;
8008d1c: 2300 movs r3, #0
8008d1e: 75fb strb r3, [r7, #23]
assert_param(IS_TIM_PWM_MODE(sConfig->OCMode));
assert_param(IS_TIM_OC_POLARITY(sConfig->OCPolarity));
assert_param(IS_TIM_FAST_STATE(sConfig->OCFastMode));
/* Process Locked */
__HAL_LOCK(htim);
8008d20: 68fb ldr r3, [r7, #12]
8008d22: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8008d26: 2b01 cmp r3, #1
8008d28: d101 bne.n 8008d2e <HAL_TIM_PWM_ConfigChannel+0x1e>
8008d2a: 2302 movs r3, #2
8008d2c: e0ae b.n 8008e8c <HAL_TIM_PWM_ConfigChannel+0x17c>
8008d2e: 68fb ldr r3, [r7, #12]
8008d30: 2201 movs r2, #1
8008d32: f883 203c strb.w r2, [r3, #60] @ 0x3c
switch (Channel)
8008d36: 687b ldr r3, [r7, #4]
8008d38: 2b0c cmp r3, #12
8008d3a: f200 809f bhi.w 8008e7c <HAL_TIM_PWM_ConfigChannel+0x16c>
8008d3e: a201 add r2, pc, #4 @ (adr r2, 8008d44 <HAL_TIM_PWM_ConfigChannel+0x34>)
8008d40: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8008d44: 08008d79 .word 0x08008d79
8008d48: 08008e7d .word 0x08008e7d
8008d4c: 08008e7d .word 0x08008e7d
8008d50: 08008e7d .word 0x08008e7d
8008d54: 08008db9 .word 0x08008db9
8008d58: 08008e7d .word 0x08008e7d
8008d5c: 08008e7d .word 0x08008e7d
8008d60: 08008e7d .word 0x08008e7d
8008d64: 08008dfb .word 0x08008dfb
8008d68: 08008e7d .word 0x08008e7d
8008d6c: 08008e7d .word 0x08008e7d
8008d70: 08008e7d .word 0x08008e7d
8008d74: 08008e3b .word 0x08008e3b
{
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(htim->Instance));
/* Configure the Channel 1 in PWM mode */
TIM_OC1_SetConfig(htim->Instance, sConfig);
8008d78: 68fb ldr r3, [r7, #12]
8008d7a: 681b ldr r3, [r3, #0]
8008d7c: 68b9 ldr r1, [r7, #8]
8008d7e: 4618 mov r0, r3
8008d80: f000 f9e6 bl 8009150 <TIM_OC1_SetConfig>
/* Set the Preload enable bit for channel1 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC1PE;
8008d84: 68fb ldr r3, [r7, #12]
8008d86: 681b ldr r3, [r3, #0]
8008d88: 699a ldr r2, [r3, #24]
8008d8a: 68fb ldr r3, [r7, #12]
8008d8c: 681b ldr r3, [r3, #0]
8008d8e: f042 0208 orr.w r2, r2, #8
8008d92: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC1FE;
8008d94: 68fb ldr r3, [r7, #12]
8008d96: 681b ldr r3, [r3, #0]
8008d98: 699a ldr r2, [r3, #24]
8008d9a: 68fb ldr r3, [r7, #12]
8008d9c: 681b ldr r3, [r3, #0]
8008d9e: f022 0204 bic.w r2, r2, #4
8008da2: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode;
8008da4: 68fb ldr r3, [r7, #12]
8008da6: 681b ldr r3, [r3, #0]
8008da8: 6999 ldr r1, [r3, #24]
8008daa: 68bb ldr r3, [r7, #8]
8008dac: 691a ldr r2, [r3, #16]
8008dae: 68fb ldr r3, [r7, #12]
8008db0: 681b ldr r3, [r3, #0]
8008db2: 430a orrs r2, r1
8008db4: 619a str r2, [r3, #24]
break;
8008db6: e064 b.n 8008e82 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC2_INSTANCE(htim->Instance));
/* Configure the Channel 2 in PWM mode */
TIM_OC2_SetConfig(htim->Instance, sConfig);
8008db8: 68fb ldr r3, [r7, #12]
8008dba: 681b ldr r3, [r3, #0]
8008dbc: 68b9 ldr r1, [r7, #8]
8008dbe: 4618 mov r0, r3
8008dc0: f000 fa2c bl 800921c <TIM_OC2_SetConfig>
/* Set the Preload enable bit for channel2 */
htim->Instance->CCMR1 |= TIM_CCMR1_OC2PE;
8008dc4: 68fb ldr r3, [r7, #12]
8008dc6: 681b ldr r3, [r3, #0]
8008dc8: 699a ldr r2, [r3, #24]
8008dca: 68fb ldr r3, [r7, #12]
8008dcc: 681b ldr r3, [r3, #0]
8008dce: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008dd2: 619a str r2, [r3, #24]
/* Configure the Output Fast mode */
htim->Instance->CCMR1 &= ~TIM_CCMR1_OC2FE;
8008dd4: 68fb ldr r3, [r7, #12]
8008dd6: 681b ldr r3, [r3, #0]
8008dd8: 699a ldr r2, [r3, #24]
8008dda: 68fb ldr r3, [r7, #12]
8008ddc: 681b ldr r3, [r3, #0]
8008dde: f422 6280 bic.w r2, r2, #1024 @ 0x400
8008de2: 619a str r2, [r3, #24]
htim->Instance->CCMR1 |= sConfig->OCFastMode << 8U;
8008de4: 68fb ldr r3, [r7, #12]
8008de6: 681b ldr r3, [r3, #0]
8008de8: 6999 ldr r1, [r3, #24]
8008dea: 68bb ldr r3, [r7, #8]
8008dec: 691b ldr r3, [r3, #16]
8008dee: 021a lsls r2, r3, #8
8008df0: 68fb ldr r3, [r7, #12]
8008df2: 681b ldr r3, [r3, #0]
8008df4: 430a orrs r2, r1
8008df6: 619a str r2, [r3, #24]
break;
8008df8: e043 b.n 8008e82 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC3_INSTANCE(htim->Instance));
/* Configure the Channel 3 in PWM mode */
TIM_OC3_SetConfig(htim->Instance, sConfig);
8008dfa: 68fb ldr r3, [r7, #12]
8008dfc: 681b ldr r3, [r3, #0]
8008dfe: 68b9 ldr r1, [r7, #8]
8008e00: 4618 mov r0, r3
8008e02: f000 fa75 bl 80092f0 <TIM_OC3_SetConfig>
/* Set the Preload enable bit for channel3 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC3PE;
8008e06: 68fb ldr r3, [r7, #12]
8008e08: 681b ldr r3, [r3, #0]
8008e0a: 69da ldr r2, [r3, #28]
8008e0c: 68fb ldr r3, [r7, #12]
8008e0e: 681b ldr r3, [r3, #0]
8008e10: f042 0208 orr.w r2, r2, #8
8008e14: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC3FE;
8008e16: 68fb ldr r3, [r7, #12]
8008e18: 681b ldr r3, [r3, #0]
8008e1a: 69da ldr r2, [r3, #28]
8008e1c: 68fb ldr r3, [r7, #12]
8008e1e: 681b ldr r3, [r3, #0]
8008e20: f022 0204 bic.w r2, r2, #4
8008e24: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode;
8008e26: 68fb ldr r3, [r7, #12]
8008e28: 681b ldr r3, [r3, #0]
8008e2a: 69d9 ldr r1, [r3, #28]
8008e2c: 68bb ldr r3, [r7, #8]
8008e2e: 691a ldr r2, [r3, #16]
8008e30: 68fb ldr r3, [r7, #12]
8008e32: 681b ldr r3, [r3, #0]
8008e34: 430a orrs r2, r1
8008e36: 61da str r2, [r3, #28]
break;
8008e38: e023 b.n 8008e82 <HAL_TIM_PWM_ConfigChannel+0x172>
{
/* Check the parameters */
assert_param(IS_TIM_CC4_INSTANCE(htim->Instance));
/* Configure the Channel 4 in PWM mode */
TIM_OC4_SetConfig(htim->Instance, sConfig);
8008e3a: 68fb ldr r3, [r7, #12]
8008e3c: 681b ldr r3, [r3, #0]
8008e3e: 68b9 ldr r1, [r7, #8]
8008e40: 4618 mov r0, r3
8008e42: f000 fabf bl 80093c4 <TIM_OC4_SetConfig>
/* Set the Preload enable bit for channel4 */
htim->Instance->CCMR2 |= TIM_CCMR2_OC4PE;
8008e46: 68fb ldr r3, [r7, #12]
8008e48: 681b ldr r3, [r3, #0]
8008e4a: 69da ldr r2, [r3, #28]
8008e4c: 68fb ldr r3, [r7, #12]
8008e4e: 681b ldr r3, [r3, #0]
8008e50: f442 6200 orr.w r2, r2, #2048 @ 0x800
8008e54: 61da str r2, [r3, #28]
/* Configure the Output Fast mode */
htim->Instance->CCMR2 &= ~TIM_CCMR2_OC4FE;
8008e56: 68fb ldr r3, [r7, #12]
8008e58: 681b ldr r3, [r3, #0]
8008e5a: 69da ldr r2, [r3, #28]
8008e5c: 68fb ldr r3, [r7, #12]
8008e5e: 681b ldr r3, [r3, #0]
8008e60: f422 6280 bic.w r2, r2, #1024 @ 0x400
8008e64: 61da str r2, [r3, #28]
htim->Instance->CCMR2 |= sConfig->OCFastMode << 8U;
8008e66: 68fb ldr r3, [r7, #12]
8008e68: 681b ldr r3, [r3, #0]
8008e6a: 69d9 ldr r1, [r3, #28]
8008e6c: 68bb ldr r3, [r7, #8]
8008e6e: 691b ldr r3, [r3, #16]
8008e70: 021a lsls r2, r3, #8
8008e72: 68fb ldr r3, [r7, #12]
8008e74: 681b ldr r3, [r3, #0]
8008e76: 430a orrs r2, r1
8008e78: 61da str r2, [r3, #28]
break;
8008e7a: e002 b.n 8008e82 <HAL_TIM_PWM_ConfigChannel+0x172>
}
default:
status = HAL_ERROR;
8008e7c: 2301 movs r3, #1
8008e7e: 75fb strb r3, [r7, #23]
break;
8008e80: bf00 nop
}
__HAL_UNLOCK(htim);
8008e82: 68fb ldr r3, [r7, #12]
8008e84: 2200 movs r2, #0
8008e86: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8008e8a: 7dfb ldrb r3, [r7, #23]
}
8008e8c: 4618 mov r0, r3
8008e8e: 3718 adds r7, #24
8008e90: 46bd mov sp, r7
8008e92: bd80 pop {r7, pc}
08008e94 <HAL_TIM_ConfigClockSource>:
* @param sClockSourceConfig pointer to a TIM_ClockConfigTypeDef structure that
* contains the clock source information for the TIM peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIM_ConfigClockSource(TIM_HandleTypeDef *htim, const TIM_ClockConfigTypeDef *sClockSourceConfig)
{
8008e94: b580 push {r7, lr}
8008e96: b084 sub sp, #16
8008e98: af00 add r7, sp, #0
8008e9a: 6078 str r0, [r7, #4]
8008e9c: 6039 str r1, [r7, #0]
HAL_StatusTypeDef status = HAL_OK;
8008e9e: 2300 movs r3, #0
8008ea0: 73fb strb r3, [r7, #15]
uint32_t tmpsmcr;
/* Process Locked */
__HAL_LOCK(htim);
8008ea2: 687b ldr r3, [r7, #4]
8008ea4: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
8008ea8: 2b01 cmp r3, #1
8008eaa: d101 bne.n 8008eb0 <HAL_TIM_ConfigClockSource+0x1c>
8008eac: 2302 movs r3, #2
8008eae: e0b4 b.n 800901a <HAL_TIM_ConfigClockSource+0x186>
8008eb0: 687b ldr r3, [r7, #4]
8008eb2: 2201 movs r2, #1
8008eb4: f883 203c strb.w r2, [r3, #60] @ 0x3c
htim->State = HAL_TIM_STATE_BUSY;
8008eb8: 687b ldr r3, [r7, #4]
8008eba: 2202 movs r2, #2
8008ebc: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Check the parameters */
assert_param(IS_TIM_CLOCKSOURCE(sClockSourceConfig->ClockSource));
/* Reset the SMS, TS, ECE, ETPS and ETRF bits */
tmpsmcr = htim->Instance->SMCR;
8008ec0: 687b ldr r3, [r7, #4]
8008ec2: 681b ldr r3, [r3, #0]
8008ec4: 689b ldr r3, [r3, #8]
8008ec6: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_SMS | TIM_SMCR_TS);
8008ec8: 68bb ldr r3, [r7, #8]
8008eca: f023 0377 bic.w r3, r3, #119 @ 0x77
8008ece: 60bb str r3, [r7, #8]
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8008ed0: 68bb ldr r3, [r7, #8]
8008ed2: f423 437f bic.w r3, r3, #65280 @ 0xff00
8008ed6: 60bb str r3, [r7, #8]
htim->Instance->SMCR = tmpsmcr;
8008ed8: 687b ldr r3, [r7, #4]
8008eda: 681b ldr r3, [r3, #0]
8008edc: 68ba ldr r2, [r7, #8]
8008ede: 609a str r2, [r3, #8]
switch (sClockSourceConfig->ClockSource)
8008ee0: 683b ldr r3, [r7, #0]
8008ee2: 681b ldr r3, [r3, #0]
8008ee4: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008ee8: d03e beq.n 8008f68 <HAL_TIM_ConfigClockSource+0xd4>
8008eea: f5b3 5f00 cmp.w r3, #8192 @ 0x2000
8008eee: f200 8087 bhi.w 8009000 <HAL_TIM_ConfigClockSource+0x16c>
8008ef2: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008ef6: f000 8086 beq.w 8009006 <HAL_TIM_ConfigClockSource+0x172>
8008efa: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8008efe: d87f bhi.n 8009000 <HAL_TIM_ConfigClockSource+0x16c>
8008f00: 2b70 cmp r3, #112 @ 0x70
8008f02: d01a beq.n 8008f3a <HAL_TIM_ConfigClockSource+0xa6>
8008f04: 2b70 cmp r3, #112 @ 0x70
8008f06: d87b bhi.n 8009000 <HAL_TIM_ConfigClockSource+0x16c>
8008f08: 2b60 cmp r3, #96 @ 0x60
8008f0a: d050 beq.n 8008fae <HAL_TIM_ConfigClockSource+0x11a>
8008f0c: 2b60 cmp r3, #96 @ 0x60
8008f0e: d877 bhi.n 8009000 <HAL_TIM_ConfigClockSource+0x16c>
8008f10: 2b50 cmp r3, #80 @ 0x50
8008f12: d03c beq.n 8008f8e <HAL_TIM_ConfigClockSource+0xfa>
8008f14: 2b50 cmp r3, #80 @ 0x50
8008f16: d873 bhi.n 8009000 <HAL_TIM_ConfigClockSource+0x16c>
8008f18: 2b40 cmp r3, #64 @ 0x40
8008f1a: d058 beq.n 8008fce <HAL_TIM_ConfigClockSource+0x13a>
8008f1c: 2b40 cmp r3, #64 @ 0x40
8008f1e: d86f bhi.n 8009000 <HAL_TIM_ConfigClockSource+0x16c>
8008f20: 2b30 cmp r3, #48 @ 0x30
8008f22: d064 beq.n 8008fee <HAL_TIM_ConfigClockSource+0x15a>
8008f24: 2b30 cmp r3, #48 @ 0x30
8008f26: d86b bhi.n 8009000 <HAL_TIM_ConfigClockSource+0x16c>
8008f28: 2b20 cmp r3, #32
8008f2a: d060 beq.n 8008fee <HAL_TIM_ConfigClockSource+0x15a>
8008f2c: 2b20 cmp r3, #32
8008f2e: d867 bhi.n 8009000 <HAL_TIM_ConfigClockSource+0x16c>
8008f30: 2b00 cmp r3, #0
8008f32: d05c beq.n 8008fee <HAL_TIM_ConfigClockSource+0x15a>
8008f34: 2b10 cmp r3, #16
8008f36: d05a beq.n 8008fee <HAL_TIM_ConfigClockSource+0x15a>
8008f38: e062 b.n 8009000 <HAL_TIM_ConfigClockSource+0x16c>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8008f3a: 687b ldr r3, [r7, #4]
8008f3c: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8008f3e: 683b ldr r3, [r7, #0]
8008f40: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8008f42: 683b ldr r3, [r7, #0]
8008f44: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8008f46: 683b ldr r3, [r7, #0]
8008f48: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8008f4a: f000 fb00 bl 800954e <TIM_ETR_SetConfig>
/* Select the External clock mode1 and the ETRF trigger */
tmpsmcr = htim->Instance->SMCR;
8008f4e: 687b ldr r3, [r7, #4]
8008f50: 681b ldr r3, [r3, #0]
8008f52: 689b ldr r3, [r3, #8]
8008f54: 60bb str r3, [r7, #8]
tmpsmcr |= (TIM_SLAVEMODE_EXTERNAL1 | TIM_CLOCKSOURCE_ETRMODE1);
8008f56: 68bb ldr r3, [r7, #8]
8008f58: f043 0377 orr.w r3, r3, #119 @ 0x77
8008f5c: 60bb str r3, [r7, #8]
/* Write to TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8008f5e: 687b ldr r3, [r7, #4]
8008f60: 681b ldr r3, [r3, #0]
8008f62: 68ba ldr r2, [r7, #8]
8008f64: 609a str r2, [r3, #8]
break;
8008f66: e04f b.n 8009008 <HAL_TIM_ConfigClockSource+0x174>
assert_param(IS_TIM_CLOCKPRESCALER(sClockSourceConfig->ClockPrescaler));
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
/* Configure the ETR Clock source */
TIM_ETR_SetConfig(htim->Instance,
8008f68: 687b ldr r3, [r7, #4]
8008f6a: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPrescaler,
8008f6c: 683b ldr r3, [r7, #0]
8008f6e: 6899 ldr r1, [r3, #8]
sClockSourceConfig->ClockPolarity,
8008f70: 683b ldr r3, [r7, #0]
8008f72: 685a ldr r2, [r3, #4]
sClockSourceConfig->ClockFilter);
8008f74: 683b ldr r3, [r7, #0]
8008f76: 68db ldr r3, [r3, #12]
TIM_ETR_SetConfig(htim->Instance,
8008f78: f000 fae9 bl 800954e <TIM_ETR_SetConfig>
/* Enable the External clock mode2 */
htim->Instance->SMCR |= TIM_SMCR_ECE;
8008f7c: 687b ldr r3, [r7, #4]
8008f7e: 681b ldr r3, [r3, #0]
8008f80: 689a ldr r2, [r3, #8]
8008f82: 687b ldr r3, [r7, #4]
8008f84: 681b ldr r3, [r3, #0]
8008f86: f442 4280 orr.w r2, r2, #16384 @ 0x4000
8008f8a: 609a str r2, [r3, #8]
break;
8008f8c: e03c b.n 8009008 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8008f8e: 687b ldr r3, [r7, #4]
8008f90: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8008f92: 683b ldr r3, [r7, #0]
8008f94: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8008f96: 683b ldr r3, [r7, #0]
8008f98: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8008f9a: 461a mov r2, r3
8008f9c: f000 fa60 bl 8009460 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1);
8008fa0: 687b ldr r3, [r7, #4]
8008fa2: 681b ldr r3, [r3, #0]
8008fa4: 2150 movs r1, #80 @ 0x50
8008fa6: 4618 mov r0, r3
8008fa8: f000 fab7 bl 800951a <TIM_ITRx_SetConfig>
break;
8008fac: e02c b.n 8009008 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI2 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI2_ConfigInputStage(htim->Instance,
8008fae: 687b ldr r3, [r7, #4]
8008fb0: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8008fb2: 683b ldr r3, [r7, #0]
8008fb4: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8008fb6: 683b ldr r3, [r7, #0]
8008fb8: 68db ldr r3, [r3, #12]
TIM_TI2_ConfigInputStage(htim->Instance,
8008fba: 461a mov r2, r3
8008fbc: f000 fa7e bl 80094bc <TIM_TI2_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI2);
8008fc0: 687b ldr r3, [r7, #4]
8008fc2: 681b ldr r3, [r3, #0]
8008fc4: 2160 movs r1, #96 @ 0x60
8008fc6: 4618 mov r0, r3
8008fc8: f000 faa7 bl 800951a <TIM_ITRx_SetConfig>
break;
8008fcc: e01c b.n 8009008 <HAL_TIM_ConfigClockSource+0x174>
/* Check TI1 input conditioning related parameters */
assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity));
assert_param(IS_TIM_CLOCKFILTER(sClockSourceConfig->ClockFilter));
TIM_TI1_ConfigInputStage(htim->Instance,
8008fce: 687b ldr r3, [r7, #4]
8008fd0: 6818 ldr r0, [r3, #0]
sClockSourceConfig->ClockPolarity,
8008fd2: 683b ldr r3, [r7, #0]
8008fd4: 6859 ldr r1, [r3, #4]
sClockSourceConfig->ClockFilter);
8008fd6: 683b ldr r3, [r7, #0]
8008fd8: 68db ldr r3, [r3, #12]
TIM_TI1_ConfigInputStage(htim->Instance,
8008fda: 461a mov r2, r3
8008fdc: f000 fa40 bl 8009460 <TIM_TI1_ConfigInputStage>
TIM_ITRx_SetConfig(htim->Instance, TIM_CLOCKSOURCE_TI1ED);
8008fe0: 687b ldr r3, [r7, #4]
8008fe2: 681b ldr r3, [r3, #0]
8008fe4: 2140 movs r1, #64 @ 0x40
8008fe6: 4618 mov r0, r3
8008fe8: f000 fa97 bl 800951a <TIM_ITRx_SetConfig>
break;
8008fec: e00c b.n 8009008 <HAL_TIM_ConfigClockSource+0x174>
case TIM_CLOCKSOURCE_ITR3:
{
/* Check whether or not the timer instance supports internal trigger input */
assert_param(IS_TIM_CLOCKSOURCE_ITRX_INSTANCE(htim->Instance));
TIM_ITRx_SetConfig(htim->Instance, sClockSourceConfig->ClockSource);
8008fee: 687b ldr r3, [r7, #4]
8008ff0: 681a ldr r2, [r3, #0]
8008ff2: 683b ldr r3, [r7, #0]
8008ff4: 681b ldr r3, [r3, #0]
8008ff6: 4619 mov r1, r3
8008ff8: 4610 mov r0, r2
8008ffa: f000 fa8e bl 800951a <TIM_ITRx_SetConfig>
break;
8008ffe: e003 b.n 8009008 <HAL_TIM_ConfigClockSource+0x174>
}
default:
status = HAL_ERROR;
8009000: 2301 movs r3, #1
8009002: 73fb strb r3, [r7, #15]
break;
8009004: e000 b.n 8009008 <HAL_TIM_ConfigClockSource+0x174>
break;
8009006: bf00 nop
}
htim->State = HAL_TIM_STATE_READY;
8009008: 687b ldr r3, [r7, #4]
800900a: 2201 movs r2, #1
800900c: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8009010: 687b ldr r3, [r7, #4]
8009012: 2200 movs r2, #0
8009014: f883 203c strb.w r2, [r3, #60] @ 0x3c
return status;
8009018: 7bfb ldrb r3, [r7, #15]
}
800901a: 4618 mov r0, r3
800901c: 3710 adds r7, #16
800901e: 46bd mov sp, r7
8009020: bd80 pop {r7, pc}
08009022 <HAL_TIM_GetChannelState>:
* @arg TIM_CHANNEL_5: TIM Channel 5
* @arg TIM_CHANNEL_6: TIM Channel 6
* @retval TIM Channel state
*/
HAL_TIM_ChannelStateTypeDef HAL_TIM_GetChannelState(const TIM_HandleTypeDef *htim, uint32_t Channel)
{
8009022: b480 push {r7}
8009024: b085 sub sp, #20
8009026: af00 add r7, sp, #0
8009028: 6078 str r0, [r7, #4]
800902a: 6039 str r1, [r7, #0]
HAL_TIM_ChannelStateTypeDef channel_state;
/* Check the parameters */
assert_param(IS_TIM_CCX_INSTANCE(htim->Instance, Channel));
channel_state = TIM_CHANNEL_STATE_GET(htim, Channel);
800902c: 683b ldr r3, [r7, #0]
800902e: 2b00 cmp r3, #0
8009030: d104 bne.n 800903c <HAL_TIM_GetChannelState+0x1a>
8009032: 687b ldr r3, [r7, #4]
8009034: f893 303e ldrb.w r3, [r3, #62] @ 0x3e
8009038: b2db uxtb r3, r3
800903a: e013 b.n 8009064 <HAL_TIM_GetChannelState+0x42>
800903c: 683b ldr r3, [r7, #0]
800903e: 2b04 cmp r3, #4
8009040: d104 bne.n 800904c <HAL_TIM_GetChannelState+0x2a>
8009042: 687b ldr r3, [r7, #4]
8009044: f893 303f ldrb.w r3, [r3, #63] @ 0x3f
8009048: b2db uxtb r3, r3
800904a: e00b b.n 8009064 <HAL_TIM_GetChannelState+0x42>
800904c: 683b ldr r3, [r7, #0]
800904e: 2b08 cmp r3, #8
8009050: d104 bne.n 800905c <HAL_TIM_GetChannelState+0x3a>
8009052: 687b ldr r3, [r7, #4]
8009054: f893 3040 ldrb.w r3, [r3, #64] @ 0x40
8009058: b2db uxtb r3, r3
800905a: e003 b.n 8009064 <HAL_TIM_GetChannelState+0x42>
800905c: 687b ldr r3, [r7, #4]
800905e: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
8009062: b2db uxtb r3, r3
8009064: 73fb strb r3, [r7, #15]
return channel_state;
8009066: 7bfb ldrb r3, [r7, #15]
}
8009068: 4618 mov r0, r3
800906a: 3714 adds r7, #20
800906c: 46bd mov sp, r7
800906e: bc80 pop {r7}
8009070: 4770 bx lr
...
08009074 <TIM_Base_SetConfig>:
* @param TIMx TIM peripheral
* @param Structure TIM Base configuration structure
* @retval None
*/
void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure)
{
8009074: b480 push {r7}
8009076: b085 sub sp, #20
8009078: af00 add r7, sp, #0
800907a: 6078 str r0, [r7, #4]
800907c: 6039 str r1, [r7, #0]
uint32_t tmpcr1;
tmpcr1 = TIMx->CR1;
800907e: 687b ldr r3, [r7, #4]
8009080: 681b ldr r3, [r3, #0]
8009082: 60fb str r3, [r7, #12]
/* Set TIM Time Base Unit parameters ---------------------------------------*/
if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx))
8009084: 687b ldr r3, [r7, #4]
8009086: 4a2f ldr r2, [pc, #188] @ (8009144 <TIM_Base_SetConfig+0xd0>)
8009088: 4293 cmp r3, r2
800908a: d00b beq.n 80090a4 <TIM_Base_SetConfig+0x30>
800908c: 687b ldr r3, [r7, #4]
800908e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8009092: d007 beq.n 80090a4 <TIM_Base_SetConfig+0x30>
8009094: 687b ldr r3, [r7, #4]
8009096: 4a2c ldr r2, [pc, #176] @ (8009148 <TIM_Base_SetConfig+0xd4>)
8009098: 4293 cmp r3, r2
800909a: d003 beq.n 80090a4 <TIM_Base_SetConfig+0x30>
800909c: 687b ldr r3, [r7, #4]
800909e: 4a2b ldr r2, [pc, #172] @ (800914c <TIM_Base_SetConfig+0xd8>)
80090a0: 4293 cmp r3, r2
80090a2: d108 bne.n 80090b6 <TIM_Base_SetConfig+0x42>
{
/* Select the Counter Mode */
tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS);
80090a4: 68fb ldr r3, [r7, #12]
80090a6: f023 0370 bic.w r3, r3, #112 @ 0x70
80090aa: 60fb str r3, [r7, #12]
tmpcr1 |= Structure->CounterMode;
80090ac: 683b ldr r3, [r7, #0]
80090ae: 685b ldr r3, [r3, #4]
80090b0: 68fa ldr r2, [r7, #12]
80090b2: 4313 orrs r3, r2
80090b4: 60fb str r3, [r7, #12]
}
if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx))
80090b6: 687b ldr r3, [r7, #4]
80090b8: 4a22 ldr r2, [pc, #136] @ (8009144 <TIM_Base_SetConfig+0xd0>)
80090ba: 4293 cmp r3, r2
80090bc: d00b beq.n 80090d6 <TIM_Base_SetConfig+0x62>
80090be: 687b ldr r3, [r7, #4]
80090c0: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
80090c4: d007 beq.n 80090d6 <TIM_Base_SetConfig+0x62>
80090c6: 687b ldr r3, [r7, #4]
80090c8: 4a1f ldr r2, [pc, #124] @ (8009148 <TIM_Base_SetConfig+0xd4>)
80090ca: 4293 cmp r3, r2
80090cc: d003 beq.n 80090d6 <TIM_Base_SetConfig+0x62>
80090ce: 687b ldr r3, [r7, #4]
80090d0: 4a1e ldr r2, [pc, #120] @ (800914c <TIM_Base_SetConfig+0xd8>)
80090d2: 4293 cmp r3, r2
80090d4: d108 bne.n 80090e8 <TIM_Base_SetConfig+0x74>
{
/* Set the clock division */
tmpcr1 &= ~TIM_CR1_CKD;
80090d6: 68fb ldr r3, [r7, #12]
80090d8: f423 7340 bic.w r3, r3, #768 @ 0x300
80090dc: 60fb str r3, [r7, #12]
tmpcr1 |= (uint32_t)Structure->ClockDivision;
80090de: 683b ldr r3, [r7, #0]
80090e0: 68db ldr r3, [r3, #12]
80090e2: 68fa ldr r2, [r7, #12]
80090e4: 4313 orrs r3, r2
80090e6: 60fb str r3, [r7, #12]
}
/* Set the auto-reload preload */
MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload);
80090e8: 68fb ldr r3, [r7, #12]
80090ea: f023 0280 bic.w r2, r3, #128 @ 0x80
80090ee: 683b ldr r3, [r7, #0]
80090f0: 695b ldr r3, [r3, #20]
80090f2: 4313 orrs r3, r2
80090f4: 60fb str r3, [r7, #12]
TIMx->CR1 = tmpcr1;
80090f6: 687b ldr r3, [r7, #4]
80090f8: 68fa ldr r2, [r7, #12]
80090fa: 601a str r2, [r3, #0]
/* Set the Autoreload value */
TIMx->ARR = (uint32_t)Structure->Period ;
80090fc: 683b ldr r3, [r7, #0]
80090fe: 689a ldr r2, [r3, #8]
8009100: 687b ldr r3, [r7, #4]
8009102: 62da str r2, [r3, #44] @ 0x2c
/* Set the Prescaler value */
TIMx->PSC = Structure->Prescaler;
8009104: 683b ldr r3, [r7, #0]
8009106: 681a ldr r2, [r3, #0]
8009108: 687b ldr r3, [r7, #4]
800910a: 629a str r2, [r3, #40] @ 0x28
if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx))
800910c: 687b ldr r3, [r7, #4]
800910e: 4a0d ldr r2, [pc, #52] @ (8009144 <TIM_Base_SetConfig+0xd0>)
8009110: 4293 cmp r3, r2
8009112: d103 bne.n 800911c <TIM_Base_SetConfig+0xa8>
{
/* Set the Repetition Counter value */
TIMx->RCR = Structure->RepetitionCounter;
8009114: 683b ldr r3, [r7, #0]
8009116: 691a ldr r2, [r3, #16]
8009118: 687b ldr r3, [r7, #4]
800911a: 631a str r2, [r3, #48] @ 0x30
}
/* Generate an update event to reload the Prescaler
and the repetition counter (only for advanced timer) value immediately */
TIMx->EGR = TIM_EGR_UG;
800911c: 687b ldr r3, [r7, #4]
800911e: 2201 movs r2, #1
8009120: 615a str r2, [r3, #20]
/* Check if the update flag is set after the Update Generation, if so clear the UIF flag */
if (HAL_IS_BIT_SET(TIMx->SR, TIM_FLAG_UPDATE))
8009122: 687b ldr r3, [r7, #4]
8009124: 691b ldr r3, [r3, #16]
8009126: f003 0301 and.w r3, r3, #1
800912a: 2b00 cmp r3, #0
800912c: d005 beq.n 800913a <TIM_Base_SetConfig+0xc6>
{
/* Clear the update flag */
CLEAR_BIT(TIMx->SR, TIM_FLAG_UPDATE);
800912e: 687b ldr r3, [r7, #4]
8009130: 691b ldr r3, [r3, #16]
8009132: f023 0201 bic.w r2, r3, #1
8009136: 687b ldr r3, [r7, #4]
8009138: 611a str r2, [r3, #16]
}
}
800913a: bf00 nop
800913c: 3714 adds r7, #20
800913e: 46bd mov sp, r7
8009140: bc80 pop {r7}
8009142: 4770 bx lr
8009144: 40012c00 .word 0x40012c00
8009148: 40000400 .word 0x40000400
800914c: 40000800 .word 0x40000800
08009150 <TIM_OC1_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC1_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
8009150: b480 push {r7}
8009152: b087 sub sp, #28
8009154: af00 add r7, sp, #0
8009156: 6078 str r0, [r7, #4]
8009158: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
800915a: 687b ldr r3, [r7, #4]
800915c: 6a1b ldr r3, [r3, #32]
800915e: 617b str r3, [r7, #20]
/* Disable the Channel 1: Reset the CC1E Bit */
TIMx->CCER &= ~TIM_CCER_CC1E;
8009160: 687b ldr r3, [r7, #4]
8009162: 6a1b ldr r3, [r3, #32]
8009164: f023 0201 bic.w r2, r3, #1
8009168: 687b ldr r3, [r7, #4]
800916a: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
800916c: 687b ldr r3, [r7, #4]
800916e: 685b ldr r3, [r3, #4]
8009170: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
8009172: 687b ldr r3, [r7, #4]
8009174: 699b ldr r3, [r3, #24]
8009176: 60fb str r3, [r7, #12]
/* Reset the Output Compare Mode Bits */
tmpccmrx &= ~TIM_CCMR1_OC1M;
8009178: 68fb ldr r3, [r7, #12]
800917a: f023 0370 bic.w r3, r3, #112 @ 0x70
800917e: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC1S;
8009180: 68fb ldr r3, [r7, #12]
8009182: f023 0303 bic.w r3, r3, #3
8009186: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8009188: 683b ldr r3, [r7, #0]
800918a: 681b ldr r3, [r3, #0]
800918c: 68fa ldr r2, [r7, #12]
800918e: 4313 orrs r3, r2
8009190: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC1P;
8009192: 697b ldr r3, [r7, #20]
8009194: f023 0302 bic.w r3, r3, #2
8009198: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= OC_Config->OCPolarity;
800919a: 683b ldr r3, [r7, #0]
800919c: 689b ldr r3, [r3, #8]
800919e: 697a ldr r2, [r7, #20]
80091a0: 4313 orrs r3, r2
80091a2: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_1))
80091a4: 687b ldr r3, [r7, #4]
80091a6: 4a1c ldr r2, [pc, #112] @ (8009218 <TIM_OC1_SetConfig+0xc8>)
80091a8: 4293 cmp r3, r2
80091aa: d10c bne.n 80091c6 <TIM_OC1_SetConfig+0x76>
{
/* Check parameters */
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC1NP;
80091ac: 697b ldr r3, [r7, #20]
80091ae: f023 0308 bic.w r3, r3, #8
80091b2: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= OC_Config->OCNPolarity;
80091b4: 683b ldr r3, [r7, #0]
80091b6: 68db ldr r3, [r3, #12]
80091b8: 697a ldr r2, [r7, #20]
80091ba: 4313 orrs r3, r2
80091bc: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC1NE;
80091be: 697b ldr r3, [r7, #20]
80091c0: f023 0304 bic.w r3, r3, #4
80091c4: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
80091c6: 687b ldr r3, [r7, #4]
80091c8: 4a13 ldr r2, [pc, #76] @ (8009218 <TIM_OC1_SetConfig+0xc8>)
80091ca: 4293 cmp r3, r2
80091cc: d111 bne.n 80091f2 <TIM_OC1_SetConfig+0xa2>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS1;
80091ce: 693b ldr r3, [r7, #16]
80091d0: f423 7380 bic.w r3, r3, #256 @ 0x100
80091d4: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS1N;
80091d6: 693b ldr r3, [r7, #16]
80091d8: f423 7300 bic.w r3, r3, #512 @ 0x200
80091dc: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= OC_Config->OCIdleState;
80091de: 683b ldr r3, [r7, #0]
80091e0: 695b ldr r3, [r3, #20]
80091e2: 693a ldr r2, [r7, #16]
80091e4: 4313 orrs r3, r2
80091e6: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= OC_Config->OCNIdleState;
80091e8: 683b ldr r3, [r7, #0]
80091ea: 699b ldr r3, [r3, #24]
80091ec: 693a ldr r2, [r7, #16]
80091ee: 4313 orrs r3, r2
80091f0: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80091f2: 687b ldr r3, [r7, #4]
80091f4: 693a ldr r2, [r7, #16]
80091f6: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
80091f8: 687b ldr r3, [r7, #4]
80091fa: 68fa ldr r2, [r7, #12]
80091fc: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR1 = OC_Config->Pulse;
80091fe: 683b ldr r3, [r7, #0]
8009200: 685a ldr r2, [r3, #4]
8009202: 687b ldr r3, [r7, #4]
8009204: 635a str r2, [r3, #52] @ 0x34
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
8009206: 687b ldr r3, [r7, #4]
8009208: 697a ldr r2, [r7, #20]
800920a: 621a str r2, [r3, #32]
}
800920c: bf00 nop
800920e: 371c adds r7, #28
8009210: 46bd mov sp, r7
8009212: bc80 pop {r7}
8009214: 4770 bx lr
8009216: bf00 nop
8009218: 40012c00 .word 0x40012c00
0800921c <TIM_OC2_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
void TIM_OC2_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
800921c: b480 push {r7}
800921e: b087 sub sp, #28
8009220: af00 add r7, sp, #0
8009222: 6078 str r0, [r7, #4]
8009224: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
8009226: 687b ldr r3, [r7, #4]
8009228: 6a1b ldr r3, [r3, #32]
800922a: 617b str r3, [r7, #20]
/* Disable the Channel 2: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC2E;
800922c: 687b ldr r3, [r7, #4]
800922e: 6a1b ldr r3, [r3, #32]
8009230: f023 0210 bic.w r2, r3, #16
8009234: 687b ldr r3, [r7, #4]
8009236: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
8009238: 687b ldr r3, [r7, #4]
800923a: 685b ldr r3, [r3, #4]
800923c: 613b str r3, [r7, #16]
/* Get the TIMx CCMR1 register value */
tmpccmrx = TIMx->CCMR1;
800923e: 687b ldr r3, [r7, #4]
8009240: 699b ldr r3, [r3, #24]
8009242: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR1_OC2M;
8009244: 68fb ldr r3, [r7, #12]
8009246: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800924a: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR1_CC2S;
800924c: 68fb ldr r3, [r7, #12]
800924e: f423 7340 bic.w r3, r3, #768 @ 0x300
8009252: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
8009254: 683b ldr r3, [r7, #0]
8009256: 681b ldr r3, [r3, #0]
8009258: 021b lsls r3, r3, #8
800925a: 68fa ldr r2, [r7, #12]
800925c: 4313 orrs r3, r2
800925e: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC2P;
8009260: 697b ldr r3, [r7, #20]
8009262: f023 0320 bic.w r3, r3, #32
8009266: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 4U);
8009268: 683b ldr r3, [r7, #0]
800926a: 689b ldr r3, [r3, #8]
800926c: 011b lsls r3, r3, #4
800926e: 697a ldr r2, [r7, #20]
8009270: 4313 orrs r3, r2
8009272: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_2))
8009274: 687b ldr r3, [r7, #4]
8009276: 4a1d ldr r2, [pc, #116] @ (80092ec <TIM_OC2_SetConfig+0xd0>)
8009278: 4293 cmp r3, r2
800927a: d10d bne.n 8009298 <TIM_OC2_SetConfig+0x7c>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC2NP;
800927c: 697b ldr r3, [r7, #20]
800927e: f023 0380 bic.w r3, r3, #128 @ 0x80
8009282: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 4U);
8009284: 683b ldr r3, [r7, #0]
8009286: 68db ldr r3, [r3, #12]
8009288: 011b lsls r3, r3, #4
800928a: 697a ldr r2, [r7, #20]
800928c: 4313 orrs r3, r2
800928e: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC2NE;
8009290: 697b ldr r3, [r7, #20]
8009292: f023 0340 bic.w r3, r3, #64 @ 0x40
8009296: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
8009298: 687b ldr r3, [r7, #4]
800929a: 4a14 ldr r2, [pc, #80] @ (80092ec <TIM_OC2_SetConfig+0xd0>)
800929c: 4293 cmp r3, r2
800929e: d113 bne.n 80092c8 <TIM_OC2_SetConfig+0xac>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS2;
80092a0: 693b ldr r3, [r7, #16]
80092a2: f423 6380 bic.w r3, r3, #1024 @ 0x400
80092a6: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS2N;
80092a8: 693b ldr r3, [r7, #16]
80092aa: f423 6300 bic.w r3, r3, #2048 @ 0x800
80092ae: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 2U);
80092b0: 683b ldr r3, [r7, #0]
80092b2: 695b ldr r3, [r3, #20]
80092b4: 009b lsls r3, r3, #2
80092b6: 693a ldr r2, [r7, #16]
80092b8: 4313 orrs r3, r2
80092ba: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 2U);
80092bc: 683b ldr r3, [r7, #0]
80092be: 699b ldr r3, [r3, #24]
80092c0: 009b lsls r3, r3, #2
80092c2: 693a ldr r2, [r7, #16]
80092c4: 4313 orrs r3, r2
80092c6: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
80092c8: 687b ldr r3, [r7, #4]
80092ca: 693a ldr r2, [r7, #16]
80092cc: 605a str r2, [r3, #4]
/* Write to TIMx CCMR1 */
TIMx->CCMR1 = tmpccmrx;
80092ce: 687b ldr r3, [r7, #4]
80092d0: 68fa ldr r2, [r7, #12]
80092d2: 619a str r2, [r3, #24]
/* Set the Capture Compare Register value */
TIMx->CCR2 = OC_Config->Pulse;
80092d4: 683b ldr r3, [r7, #0]
80092d6: 685a ldr r2, [r3, #4]
80092d8: 687b ldr r3, [r7, #4]
80092da: 639a str r2, [r3, #56] @ 0x38
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80092dc: 687b ldr r3, [r7, #4]
80092de: 697a ldr r2, [r7, #20]
80092e0: 621a str r2, [r3, #32]
}
80092e2: bf00 nop
80092e4: 371c adds r7, #28
80092e6: 46bd mov sp, r7
80092e8: bc80 pop {r7}
80092ea: 4770 bx lr
80092ec: 40012c00 .word 0x40012c00
080092f0 <TIM_OC3_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC3_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80092f0: b480 push {r7}
80092f2: b087 sub sp, #28
80092f4: af00 add r7, sp, #0
80092f6: 6078 str r0, [r7, #4]
80092f8: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80092fa: 687b ldr r3, [r7, #4]
80092fc: 6a1b ldr r3, [r3, #32]
80092fe: 617b str r3, [r7, #20]
/* Disable the Channel 3: Reset the CC2E Bit */
TIMx->CCER &= ~TIM_CCER_CC3E;
8009300: 687b ldr r3, [r7, #4]
8009302: 6a1b ldr r3, [r3, #32]
8009304: f423 7280 bic.w r2, r3, #256 @ 0x100
8009308: 687b ldr r3, [r7, #4]
800930a: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
800930c: 687b ldr r3, [r7, #4]
800930e: 685b ldr r3, [r3, #4]
8009310: 613b str r3, [r7, #16]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
8009312: 687b ldr r3, [r7, #4]
8009314: 69db ldr r3, [r3, #28]
8009316: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC3M;
8009318: 68fb ldr r3, [r7, #12]
800931a: f023 0370 bic.w r3, r3, #112 @ 0x70
800931e: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC3S;
8009320: 68fb ldr r3, [r7, #12]
8009322: f023 0303 bic.w r3, r3, #3
8009326: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= OC_Config->OCMode;
8009328: 683b ldr r3, [r7, #0]
800932a: 681b ldr r3, [r3, #0]
800932c: 68fa ldr r2, [r7, #12]
800932e: 4313 orrs r3, r2
8009330: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC3P;
8009332: 697b ldr r3, [r7, #20]
8009334: f423 7300 bic.w r3, r3, #512 @ 0x200
8009338: 617b str r3, [r7, #20]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 8U);
800933a: 683b ldr r3, [r7, #0]
800933c: 689b ldr r3, [r3, #8]
800933e: 021b lsls r3, r3, #8
8009340: 697a ldr r2, [r7, #20]
8009342: 4313 orrs r3, r2
8009344: 617b str r3, [r7, #20]
if (IS_TIM_CCXN_INSTANCE(TIMx, TIM_CHANNEL_3))
8009346: 687b ldr r3, [r7, #4]
8009348: 4a1d ldr r2, [pc, #116] @ (80093c0 <TIM_OC3_SetConfig+0xd0>)
800934a: 4293 cmp r3, r2
800934c: d10d bne.n 800936a <TIM_OC3_SetConfig+0x7a>
{
assert_param(IS_TIM_OCN_POLARITY(OC_Config->OCNPolarity));
/* Reset the Output N Polarity level */
tmpccer &= ~TIM_CCER_CC3NP;
800934e: 697b ldr r3, [r7, #20]
8009350: f423 6300 bic.w r3, r3, #2048 @ 0x800
8009354: 617b str r3, [r7, #20]
/* Set the Output N Polarity */
tmpccer |= (OC_Config->OCNPolarity << 8U);
8009356: 683b ldr r3, [r7, #0]
8009358: 68db ldr r3, [r3, #12]
800935a: 021b lsls r3, r3, #8
800935c: 697a ldr r2, [r7, #20]
800935e: 4313 orrs r3, r2
8009360: 617b str r3, [r7, #20]
/* Reset the Output N State */
tmpccer &= ~TIM_CCER_CC3NE;
8009362: 697b ldr r3, [r7, #20]
8009364: f423 6380 bic.w r3, r3, #1024 @ 0x400
8009368: 617b str r3, [r7, #20]
}
if (IS_TIM_BREAK_INSTANCE(TIMx))
800936a: 687b ldr r3, [r7, #4]
800936c: 4a14 ldr r2, [pc, #80] @ (80093c0 <TIM_OC3_SetConfig+0xd0>)
800936e: 4293 cmp r3, r2
8009370: d113 bne.n 800939a <TIM_OC3_SetConfig+0xaa>
/* Check parameters */
assert_param(IS_TIM_OCNIDLE_STATE(OC_Config->OCNIdleState));
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare and Output Compare N IDLE State */
tmpcr2 &= ~TIM_CR2_OIS3;
8009372: 693b ldr r3, [r7, #16]
8009374: f423 5380 bic.w r3, r3, #4096 @ 0x1000
8009378: 613b str r3, [r7, #16]
tmpcr2 &= ~TIM_CR2_OIS3N;
800937a: 693b ldr r3, [r7, #16]
800937c: f423 5300 bic.w r3, r3, #8192 @ 0x2000
8009380: 613b str r3, [r7, #16]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 4U);
8009382: 683b ldr r3, [r7, #0]
8009384: 695b ldr r3, [r3, #20]
8009386: 011b lsls r3, r3, #4
8009388: 693a ldr r2, [r7, #16]
800938a: 4313 orrs r3, r2
800938c: 613b str r3, [r7, #16]
/* Set the Output N Idle state */
tmpcr2 |= (OC_Config->OCNIdleState << 4U);
800938e: 683b ldr r3, [r7, #0]
8009390: 699b ldr r3, [r3, #24]
8009392: 011b lsls r3, r3, #4
8009394: 693a ldr r2, [r7, #16]
8009396: 4313 orrs r3, r2
8009398: 613b str r3, [r7, #16]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
800939a: 687b ldr r3, [r7, #4]
800939c: 693a ldr r2, [r7, #16]
800939e: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
80093a0: 687b ldr r3, [r7, #4]
80093a2: 68fa ldr r2, [r7, #12]
80093a4: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR3 = OC_Config->Pulse;
80093a6: 683b ldr r3, [r7, #0]
80093a8: 685a ldr r2, [r3, #4]
80093aa: 687b ldr r3, [r7, #4]
80093ac: 63da str r2, [r3, #60] @ 0x3c
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
80093ae: 687b ldr r3, [r7, #4]
80093b0: 697a ldr r2, [r7, #20]
80093b2: 621a str r2, [r3, #32]
}
80093b4: bf00 nop
80093b6: 371c adds r7, #28
80093b8: 46bd mov sp, r7
80093ba: bc80 pop {r7}
80093bc: 4770 bx lr
80093be: bf00 nop
80093c0: 40012c00 .word 0x40012c00
080093c4 <TIM_OC4_SetConfig>:
* @param TIMx to select the TIM peripheral
* @param OC_Config The output configuration structure
* @retval None
*/
static void TIM_OC4_SetConfig(TIM_TypeDef *TIMx, const TIM_OC_InitTypeDef *OC_Config)
{
80093c4: b480 push {r7}
80093c6: b087 sub sp, #28
80093c8: af00 add r7, sp, #0
80093ca: 6078 str r0, [r7, #4]
80093cc: 6039 str r1, [r7, #0]
uint32_t tmpccmrx;
uint32_t tmpccer;
uint32_t tmpcr2;
/* Get the TIMx CCER register value */
tmpccer = TIMx->CCER;
80093ce: 687b ldr r3, [r7, #4]
80093d0: 6a1b ldr r3, [r3, #32]
80093d2: 613b str r3, [r7, #16]
/* Disable the Channel 4: Reset the CC4E Bit */
TIMx->CCER &= ~TIM_CCER_CC4E;
80093d4: 687b ldr r3, [r7, #4]
80093d6: 6a1b ldr r3, [r3, #32]
80093d8: f423 5280 bic.w r2, r3, #4096 @ 0x1000
80093dc: 687b ldr r3, [r7, #4]
80093de: 621a str r2, [r3, #32]
/* Get the TIMx CR2 register value */
tmpcr2 = TIMx->CR2;
80093e0: 687b ldr r3, [r7, #4]
80093e2: 685b ldr r3, [r3, #4]
80093e4: 617b str r3, [r7, #20]
/* Get the TIMx CCMR2 register value */
tmpccmrx = TIMx->CCMR2;
80093e6: 687b ldr r3, [r7, #4]
80093e8: 69db ldr r3, [r3, #28]
80093ea: 60fb str r3, [r7, #12]
/* Reset the Output Compare mode and Capture/Compare selection Bits */
tmpccmrx &= ~TIM_CCMR2_OC4M;
80093ec: 68fb ldr r3, [r7, #12]
80093ee: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
80093f2: 60fb str r3, [r7, #12]
tmpccmrx &= ~TIM_CCMR2_CC4S;
80093f4: 68fb ldr r3, [r7, #12]
80093f6: f423 7340 bic.w r3, r3, #768 @ 0x300
80093fa: 60fb str r3, [r7, #12]
/* Select the Output Compare Mode */
tmpccmrx |= (OC_Config->OCMode << 8U);
80093fc: 683b ldr r3, [r7, #0]
80093fe: 681b ldr r3, [r3, #0]
8009400: 021b lsls r3, r3, #8
8009402: 68fa ldr r2, [r7, #12]
8009404: 4313 orrs r3, r2
8009406: 60fb str r3, [r7, #12]
/* Reset the Output Polarity level */
tmpccer &= ~TIM_CCER_CC4P;
8009408: 693b ldr r3, [r7, #16]
800940a: f423 5300 bic.w r3, r3, #8192 @ 0x2000
800940e: 613b str r3, [r7, #16]
/* Set the Output Compare Polarity */
tmpccer |= (OC_Config->OCPolarity << 12U);
8009410: 683b ldr r3, [r7, #0]
8009412: 689b ldr r3, [r3, #8]
8009414: 031b lsls r3, r3, #12
8009416: 693a ldr r2, [r7, #16]
8009418: 4313 orrs r3, r2
800941a: 613b str r3, [r7, #16]
if (IS_TIM_BREAK_INSTANCE(TIMx))
800941c: 687b ldr r3, [r7, #4]
800941e: 4a0f ldr r2, [pc, #60] @ (800945c <TIM_OC4_SetConfig+0x98>)
8009420: 4293 cmp r3, r2
8009422: d109 bne.n 8009438 <TIM_OC4_SetConfig+0x74>
{
/* Check parameters */
assert_param(IS_TIM_OCIDLE_STATE(OC_Config->OCIdleState));
/* Reset the Output Compare IDLE State */
tmpcr2 &= ~TIM_CR2_OIS4;
8009424: 697b ldr r3, [r7, #20]
8009426: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800942a: 617b str r3, [r7, #20]
/* Set the Output Idle state */
tmpcr2 |= (OC_Config->OCIdleState << 6U);
800942c: 683b ldr r3, [r7, #0]
800942e: 695b ldr r3, [r3, #20]
8009430: 019b lsls r3, r3, #6
8009432: 697a ldr r2, [r7, #20]
8009434: 4313 orrs r3, r2
8009436: 617b str r3, [r7, #20]
}
/* Write to TIMx CR2 */
TIMx->CR2 = tmpcr2;
8009438: 687b ldr r3, [r7, #4]
800943a: 697a ldr r2, [r7, #20]
800943c: 605a str r2, [r3, #4]
/* Write to TIMx CCMR2 */
TIMx->CCMR2 = tmpccmrx;
800943e: 687b ldr r3, [r7, #4]
8009440: 68fa ldr r2, [r7, #12]
8009442: 61da str r2, [r3, #28]
/* Set the Capture Compare Register value */
TIMx->CCR4 = OC_Config->Pulse;
8009444: 683b ldr r3, [r7, #0]
8009446: 685a ldr r2, [r3, #4]
8009448: 687b ldr r3, [r7, #4]
800944a: 641a str r2, [r3, #64] @ 0x40
/* Write to TIMx CCER */
TIMx->CCER = tmpccer;
800944c: 687b ldr r3, [r7, #4]
800944e: 693a ldr r2, [r7, #16]
8009450: 621a str r2, [r3, #32]
}
8009452: bf00 nop
8009454: 371c adds r7, #28
8009456: 46bd mov sp, r7
8009458: bc80 pop {r7}
800945a: 4770 bx lr
800945c: 40012c00 .word 0x40012c00
08009460 <TIM_TI1_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI1_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
8009460: b480 push {r7}
8009462: b087 sub sp, #28
8009464: af00 add r7, sp, #0
8009466: 60f8 str r0, [r7, #12]
8009468: 60b9 str r1, [r7, #8]
800946a: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 1: Reset the CC1E Bit */
tmpccer = TIMx->CCER;
800946c: 68fb ldr r3, [r7, #12]
800946e: 6a1b ldr r3, [r3, #32]
8009470: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC1E;
8009472: 68fb ldr r3, [r7, #12]
8009474: 6a1b ldr r3, [r3, #32]
8009476: f023 0201 bic.w r2, r3, #1
800947a: 68fb ldr r3, [r7, #12]
800947c: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
800947e: 68fb ldr r3, [r7, #12]
8009480: 699b ldr r3, [r3, #24]
8009482: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC1F;
8009484: 693b ldr r3, [r7, #16]
8009486: f023 03f0 bic.w r3, r3, #240 @ 0xf0
800948a: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 4U);
800948c: 687b ldr r3, [r7, #4]
800948e: 011b lsls r3, r3, #4
8009490: 693a ldr r2, [r7, #16]
8009492: 4313 orrs r3, r2
8009494: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC1E Bit */
tmpccer &= ~(TIM_CCER_CC1P | TIM_CCER_CC1NP);
8009496: 697b ldr r3, [r7, #20]
8009498: f023 030a bic.w r3, r3, #10
800949c: 617b str r3, [r7, #20]
tmpccer |= TIM_ICPolarity;
800949e: 697a ldr r2, [r7, #20]
80094a0: 68bb ldr r3, [r7, #8]
80094a2: 4313 orrs r3, r2
80094a4: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1;
80094a6: 68fb ldr r3, [r7, #12]
80094a8: 693a ldr r2, [r7, #16]
80094aa: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
80094ac: 68fb ldr r3, [r7, #12]
80094ae: 697a ldr r2, [r7, #20]
80094b0: 621a str r2, [r3, #32]
}
80094b2: bf00 nop
80094b4: 371c adds r7, #28
80094b6: 46bd mov sp, r7
80094b8: bc80 pop {r7}
80094ba: 4770 bx lr
080094bc <TIM_TI2_ConfigInputStage>:
* @param TIM_ICFilter Specifies the Input Capture Filter.
* This parameter must be a value between 0x00 and 0x0F.
* @retval None
*/
static void TIM_TI2_ConfigInputStage(TIM_TypeDef *TIMx, uint32_t TIM_ICPolarity, uint32_t TIM_ICFilter)
{
80094bc: b480 push {r7}
80094be: b087 sub sp, #28
80094c0: af00 add r7, sp, #0
80094c2: 60f8 str r0, [r7, #12]
80094c4: 60b9 str r1, [r7, #8]
80094c6: 607a str r2, [r7, #4]
uint32_t tmpccmr1;
uint32_t tmpccer;
/* Disable the Channel 2: Reset the CC2E Bit */
tmpccer = TIMx->CCER;
80094c8: 68fb ldr r3, [r7, #12]
80094ca: 6a1b ldr r3, [r3, #32]
80094cc: 617b str r3, [r7, #20]
TIMx->CCER &= ~TIM_CCER_CC2E;
80094ce: 68fb ldr r3, [r7, #12]
80094d0: 6a1b ldr r3, [r3, #32]
80094d2: f023 0210 bic.w r2, r3, #16
80094d6: 68fb ldr r3, [r7, #12]
80094d8: 621a str r2, [r3, #32]
tmpccmr1 = TIMx->CCMR1;
80094da: 68fb ldr r3, [r7, #12]
80094dc: 699b ldr r3, [r3, #24]
80094de: 613b str r3, [r7, #16]
/* Set the filter */
tmpccmr1 &= ~TIM_CCMR1_IC2F;
80094e0: 693b ldr r3, [r7, #16]
80094e2: f423 4370 bic.w r3, r3, #61440 @ 0xf000
80094e6: 613b str r3, [r7, #16]
tmpccmr1 |= (TIM_ICFilter << 12U);
80094e8: 687b ldr r3, [r7, #4]
80094ea: 031b lsls r3, r3, #12
80094ec: 693a ldr r2, [r7, #16]
80094ee: 4313 orrs r3, r2
80094f0: 613b str r3, [r7, #16]
/* Select the Polarity and set the CC2E Bit */
tmpccer &= ~(TIM_CCER_CC2P | TIM_CCER_CC2NP);
80094f2: 697b ldr r3, [r7, #20]
80094f4: f023 03a0 bic.w r3, r3, #160 @ 0xa0
80094f8: 617b str r3, [r7, #20]
tmpccer |= (TIM_ICPolarity << 4U);
80094fa: 68bb ldr r3, [r7, #8]
80094fc: 011b lsls r3, r3, #4
80094fe: 697a ldr r2, [r7, #20]
8009500: 4313 orrs r3, r2
8009502: 617b str r3, [r7, #20]
/* Write to TIMx CCMR1 and CCER registers */
TIMx->CCMR1 = tmpccmr1 ;
8009504: 68fb ldr r3, [r7, #12]
8009506: 693a ldr r2, [r7, #16]
8009508: 619a str r2, [r3, #24]
TIMx->CCER = tmpccer;
800950a: 68fb ldr r3, [r7, #12]
800950c: 697a ldr r2, [r7, #20]
800950e: 621a str r2, [r3, #32]
}
8009510: bf00 nop
8009512: 371c adds r7, #28
8009514: 46bd mov sp, r7
8009516: bc80 pop {r7}
8009518: 4770 bx lr
0800951a <TIM_ITRx_SetConfig>:
* @arg TIM_TS_TI2FP2: Filtered Timer Input 2
* @arg TIM_TS_ETRF: External Trigger input
* @retval None
*/
static void TIM_ITRx_SetConfig(TIM_TypeDef *TIMx, uint32_t InputTriggerSource)
{
800951a: b480 push {r7}
800951c: b085 sub sp, #20
800951e: af00 add r7, sp, #0
8009520: 6078 str r0, [r7, #4]
8009522: 6039 str r1, [r7, #0]
uint32_t tmpsmcr;
/* Get the TIMx SMCR register value */
tmpsmcr = TIMx->SMCR;
8009524: 687b ldr r3, [r7, #4]
8009526: 689b ldr r3, [r3, #8]
8009528: 60fb str r3, [r7, #12]
/* Reset the TS Bits */
tmpsmcr &= ~TIM_SMCR_TS;
800952a: 68fb ldr r3, [r7, #12]
800952c: f023 0370 bic.w r3, r3, #112 @ 0x70
8009530: 60fb str r3, [r7, #12]
/* Set the Input Trigger source and the slave mode*/
tmpsmcr |= (InputTriggerSource | TIM_SLAVEMODE_EXTERNAL1);
8009532: 683a ldr r2, [r7, #0]
8009534: 68fb ldr r3, [r7, #12]
8009536: 4313 orrs r3, r2
8009538: f043 0307 orr.w r3, r3, #7
800953c: 60fb str r3, [r7, #12]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
800953e: 687b ldr r3, [r7, #4]
8009540: 68fa ldr r2, [r7, #12]
8009542: 609a str r2, [r3, #8]
}
8009544: bf00 nop
8009546: 3714 adds r7, #20
8009548: 46bd mov sp, r7
800954a: bc80 pop {r7}
800954c: 4770 bx lr
0800954e <TIM_ETR_SetConfig>:
* This parameter must be a value between 0x00 and 0x0F
* @retval None
*/
void TIM_ETR_SetConfig(TIM_TypeDef *TIMx, uint32_t TIM_ExtTRGPrescaler,
uint32_t TIM_ExtTRGPolarity, uint32_t ExtTRGFilter)
{
800954e: b480 push {r7}
8009550: b087 sub sp, #28
8009552: af00 add r7, sp, #0
8009554: 60f8 str r0, [r7, #12]
8009556: 60b9 str r1, [r7, #8]
8009558: 607a str r2, [r7, #4]
800955a: 603b str r3, [r7, #0]
uint32_t tmpsmcr;
tmpsmcr = TIMx->SMCR;
800955c: 68fb ldr r3, [r7, #12]
800955e: 689b ldr r3, [r3, #8]
8009560: 617b str r3, [r7, #20]
/* Reset the ETR Bits */
tmpsmcr &= ~(TIM_SMCR_ETF | TIM_SMCR_ETPS | TIM_SMCR_ECE | TIM_SMCR_ETP);
8009562: 697b ldr r3, [r7, #20]
8009564: f423 437f bic.w r3, r3, #65280 @ 0xff00
8009568: 617b str r3, [r7, #20]
/* Set the Prescaler, the Filter value and the Polarity */
tmpsmcr |= (uint32_t)(TIM_ExtTRGPrescaler | (TIM_ExtTRGPolarity | (ExtTRGFilter << 8U)));
800956a: 683b ldr r3, [r7, #0]
800956c: 021a lsls r2, r3, #8
800956e: 687b ldr r3, [r7, #4]
8009570: 431a orrs r2, r3
8009572: 68bb ldr r3, [r7, #8]
8009574: 4313 orrs r3, r2
8009576: 697a ldr r2, [r7, #20]
8009578: 4313 orrs r3, r2
800957a: 617b str r3, [r7, #20]
/* Write to TIMx SMCR */
TIMx->SMCR = tmpsmcr;
800957c: 68fb ldr r3, [r7, #12]
800957e: 697a ldr r2, [r7, #20]
8009580: 609a str r2, [r3, #8]
}
8009582: bf00 nop
8009584: 371c adds r7, #28
8009586: 46bd mov sp, r7
8009588: bc80 pop {r7}
800958a: 4770 bx lr
0800958c <TIM_CCxChannelCmd>:
* @param ChannelState specifies the TIM Channel CCxE bit new state.
* This parameter can be: TIM_CCx_ENABLE or TIM_CCx_DISABLE.
* @retval None
*/
void TIM_CCxChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelState)
{
800958c: b480 push {r7}
800958e: b087 sub sp, #28
8009590: af00 add r7, sp, #0
8009592: 60f8 str r0, [r7, #12]
8009594: 60b9 str r1, [r7, #8]
8009596: 607a str r2, [r7, #4]
/* Check the parameters */
assert_param(IS_TIM_CC1_INSTANCE(TIMx));
assert_param(IS_TIM_CHANNELS(Channel));
tmp = TIM_CCER_CC1E << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
8009598: 68bb ldr r3, [r7, #8]
800959a: f003 031f and.w r3, r3, #31
800959e: 2201 movs r2, #1
80095a0: fa02 f303 lsl.w r3, r2, r3
80095a4: 617b str r3, [r7, #20]
/* Reset the CCxE Bit */
TIMx->CCER &= ~tmp;
80095a6: 68fb ldr r3, [r7, #12]
80095a8: 6a1a ldr r2, [r3, #32]
80095aa: 697b ldr r3, [r7, #20]
80095ac: 43db mvns r3, r3
80095ae: 401a ands r2, r3
80095b0: 68fb ldr r3, [r7, #12]
80095b2: 621a str r2, [r3, #32]
/* Set or reset the CCxE Bit */
TIMx->CCER |= (uint32_t)(ChannelState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
80095b4: 68fb ldr r3, [r7, #12]
80095b6: 6a1a ldr r2, [r3, #32]
80095b8: 68bb ldr r3, [r7, #8]
80095ba: f003 031f and.w r3, r3, #31
80095be: 6879 ldr r1, [r7, #4]
80095c0: fa01 f303 lsl.w r3, r1, r3
80095c4: 431a orrs r2, r3
80095c6: 68fb ldr r3, [r7, #12]
80095c8: 621a str r2, [r3, #32]
}
80095ca: bf00 nop
80095cc: 371c adds r7, #28
80095ce: 46bd mov sp, r7
80095d0: bc80 pop {r7}
80095d2: 4770 bx lr
080095d4 <HAL_TIMEx_MasterConfigSynchronization>:
* mode.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
const TIM_MasterConfigTypeDef *sMasterConfig)
{
80095d4: b480 push {r7}
80095d6: b085 sub sp, #20
80095d8: af00 add r7, sp, #0
80095da: 6078 str r0, [r7, #4]
80095dc: 6039 str r1, [r7, #0]
assert_param(IS_TIM_MASTER_INSTANCE(htim->Instance));
assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
/* Check input state */
__HAL_LOCK(htim);
80095de: 687b ldr r3, [r7, #4]
80095e0: f893 303c ldrb.w r3, [r3, #60] @ 0x3c
80095e4: 2b01 cmp r3, #1
80095e6: d101 bne.n 80095ec <HAL_TIMEx_MasterConfigSynchronization+0x18>
80095e8: 2302 movs r3, #2
80095ea: e046 b.n 800967a <HAL_TIMEx_MasterConfigSynchronization+0xa6>
80095ec: 687b ldr r3, [r7, #4]
80095ee: 2201 movs r2, #1
80095f0: f883 203c strb.w r2, [r3, #60] @ 0x3c
/* Change the handler state */
htim->State = HAL_TIM_STATE_BUSY;
80095f4: 687b ldr r3, [r7, #4]
80095f6: 2202 movs r2, #2
80095f8: f883 203d strb.w r2, [r3, #61] @ 0x3d
/* Get the TIMx CR2 register value */
tmpcr2 = htim->Instance->CR2;
80095fc: 687b ldr r3, [r7, #4]
80095fe: 681b ldr r3, [r3, #0]
8009600: 685b ldr r3, [r3, #4]
8009602: 60fb str r3, [r7, #12]
/* Get the TIMx SMCR register value */
tmpsmcr = htim->Instance->SMCR;
8009604: 687b ldr r3, [r7, #4]
8009606: 681b ldr r3, [r3, #0]
8009608: 689b ldr r3, [r3, #8]
800960a: 60bb str r3, [r7, #8]
/* Reset the MMS Bits */
tmpcr2 &= ~TIM_CR2_MMS;
800960c: 68fb ldr r3, [r7, #12]
800960e: f023 0370 bic.w r3, r3, #112 @ 0x70
8009612: 60fb str r3, [r7, #12]
/* Select the TRGO source */
tmpcr2 |= sMasterConfig->MasterOutputTrigger;
8009614: 683b ldr r3, [r7, #0]
8009616: 681b ldr r3, [r3, #0]
8009618: 68fa ldr r2, [r7, #12]
800961a: 4313 orrs r3, r2
800961c: 60fb str r3, [r7, #12]
/* Update TIMx CR2 */
htim->Instance->CR2 = tmpcr2;
800961e: 687b ldr r3, [r7, #4]
8009620: 681b ldr r3, [r3, #0]
8009622: 68fa ldr r2, [r7, #12]
8009624: 605a str r2, [r3, #4]
if (IS_TIM_SLAVE_INSTANCE(htim->Instance))
8009626: 687b ldr r3, [r7, #4]
8009628: 681b ldr r3, [r3, #0]
800962a: 4a16 ldr r2, [pc, #88] @ (8009684 <HAL_TIMEx_MasterConfigSynchronization+0xb0>)
800962c: 4293 cmp r3, r2
800962e: d00e beq.n 800964e <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8009630: 687b ldr r3, [r7, #4]
8009632: 681b ldr r3, [r3, #0]
8009634: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000
8009638: d009 beq.n 800964e <HAL_TIMEx_MasterConfigSynchronization+0x7a>
800963a: 687b ldr r3, [r7, #4]
800963c: 681b ldr r3, [r3, #0]
800963e: 4a12 ldr r2, [pc, #72] @ (8009688 <HAL_TIMEx_MasterConfigSynchronization+0xb4>)
8009640: 4293 cmp r3, r2
8009642: d004 beq.n 800964e <HAL_TIMEx_MasterConfigSynchronization+0x7a>
8009644: 687b ldr r3, [r7, #4]
8009646: 681b ldr r3, [r3, #0]
8009648: 4a10 ldr r2, [pc, #64] @ (800968c <HAL_TIMEx_MasterConfigSynchronization+0xb8>)
800964a: 4293 cmp r3, r2
800964c: d10c bne.n 8009668 <HAL_TIMEx_MasterConfigSynchronization+0x94>
{
/* Reset the MSM Bit */
tmpsmcr &= ~TIM_SMCR_MSM;
800964e: 68bb ldr r3, [r7, #8]
8009650: f023 0380 bic.w r3, r3, #128 @ 0x80
8009654: 60bb str r3, [r7, #8]
/* Set master mode */
tmpsmcr |= sMasterConfig->MasterSlaveMode;
8009656: 683b ldr r3, [r7, #0]
8009658: 685b ldr r3, [r3, #4]
800965a: 68ba ldr r2, [r7, #8]
800965c: 4313 orrs r3, r2
800965e: 60bb str r3, [r7, #8]
/* Update TIMx SMCR */
htim->Instance->SMCR = tmpsmcr;
8009660: 687b ldr r3, [r7, #4]
8009662: 681b ldr r3, [r3, #0]
8009664: 68ba ldr r2, [r7, #8]
8009666: 609a str r2, [r3, #8]
}
/* Change the htim state */
htim->State = HAL_TIM_STATE_READY;
8009668: 687b ldr r3, [r7, #4]
800966a: 2201 movs r2, #1
800966c: f883 203d strb.w r2, [r3, #61] @ 0x3d
__HAL_UNLOCK(htim);
8009670: 687b ldr r3, [r7, #4]
8009672: 2200 movs r2, #0
8009674: f883 203c strb.w r2, [r3, #60] @ 0x3c
return HAL_OK;
8009678: 2300 movs r3, #0
}
800967a: 4618 mov r0, r3
800967c: 3714 adds r7, #20
800967e: 46bd mov sp, r7
8009680: bc80 pop {r7}
8009682: 4770 bx lr
8009684: 40012c00 .word 0x40012c00
8009688: 40000400 .word 0x40000400
800968c: 40000800 .word 0x40000800
08009690 <HAL_UART_Init>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
{
8009690: b580 push {r7, lr}
8009692: b082 sub sp, #8
8009694: af00 add r7, sp, #0
8009696: 6078 str r0, [r7, #4]
/* Check the UART handle allocation */
if (huart == NULL)
8009698: 687b ldr r3, [r7, #4]
800969a: 2b00 cmp r3, #0
800969c: d101 bne.n 80096a2 <HAL_UART_Init+0x12>
{
return HAL_ERROR;
800969e: 2301 movs r3, #1
80096a0: e042 b.n 8009728 <HAL_UART_Init+0x98>
assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
#if defined(USART_CR1_OVER8)
assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
#endif /* USART_CR1_OVER8 */
if (huart->gState == HAL_UART_STATE_RESET)
80096a2: 687b ldr r3, [r7, #4]
80096a4: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
80096a8: b2db uxtb r3, r3
80096aa: 2b00 cmp r3, #0
80096ac: d106 bne.n 80096bc <HAL_UART_Init+0x2c>
{
/* Allocate lock resource and initialize it */
huart->Lock = HAL_UNLOCKED;
80096ae: 687b ldr r3, [r7, #4]
80096b0: 2200 movs r2, #0
80096b2: f883 2040 strb.w r2, [r3, #64] @ 0x40
/* Init the low level hardware */
huart->MspInitCallback(huart);
#else
/* Init the low level hardware : GPIO, CLOCK */
HAL_UART_MspInit(huart);
80096b6: 6878 ldr r0, [r7, #4]
80096b8: f7fb fb80 bl 8004dbc <HAL_UART_MspInit>
#endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */
}
huart->gState = HAL_UART_STATE_BUSY;
80096bc: 687b ldr r3, [r7, #4]
80096be: 2224 movs r2, #36 @ 0x24
80096c0: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Disable the peripheral */
__HAL_UART_DISABLE(huart);
80096c4: 687b ldr r3, [r7, #4]
80096c6: 681b ldr r3, [r3, #0]
80096c8: 68da ldr r2, [r3, #12]
80096ca: 687b ldr r3, [r7, #4]
80096cc: 681b ldr r3, [r3, #0]
80096ce: f422 5200 bic.w r2, r2, #8192 @ 0x2000
80096d2: 60da str r2, [r3, #12]
/* Set the UART Communication parameters */
UART_SetConfig(huart);
80096d4: 6878 ldr r0, [r7, #4]
80096d6: f000 f971 bl 80099bc <UART_SetConfig>
/* In asynchronous mode, the following bits must be kept cleared:
- LINEN and CLKEN bits in the USART_CR2 register,
- SCEN, HDSEL and IREN bits in the USART_CR3 register.*/
CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN));
80096da: 687b ldr r3, [r7, #4]
80096dc: 681b ldr r3, [r3, #0]
80096de: 691a ldr r2, [r3, #16]
80096e0: 687b ldr r3, [r7, #4]
80096e2: 681b ldr r3, [r3, #0]
80096e4: f422 4290 bic.w r2, r2, #18432 @ 0x4800
80096e8: 611a str r2, [r3, #16]
CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
80096ea: 687b ldr r3, [r7, #4]
80096ec: 681b ldr r3, [r3, #0]
80096ee: 695a ldr r2, [r3, #20]
80096f0: 687b ldr r3, [r7, #4]
80096f2: 681b ldr r3, [r3, #0]
80096f4: f022 022a bic.w r2, r2, #42 @ 0x2a
80096f8: 615a str r2, [r3, #20]
/* Enable the peripheral */
__HAL_UART_ENABLE(huart);
80096fa: 687b ldr r3, [r7, #4]
80096fc: 681b ldr r3, [r3, #0]
80096fe: 68da ldr r2, [r3, #12]
8009700: 687b ldr r3, [r7, #4]
8009702: 681b ldr r3, [r3, #0]
8009704: f442 5200 orr.w r2, r2, #8192 @ 0x2000
8009708: 60da str r2, [r3, #12]
/* Initialize the UART state */
huart->ErrorCode = HAL_UART_ERROR_NONE;
800970a: 687b ldr r3, [r7, #4]
800970c: 2200 movs r2, #0
800970e: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_READY;
8009710: 687b ldr r3, [r7, #4]
8009712: 2220 movs r2, #32
8009714: f883 2041 strb.w r2, [r3, #65] @ 0x41
huart->RxState = HAL_UART_STATE_READY;
8009718: 687b ldr r3, [r7, #4]
800971a: 2220 movs r2, #32
800971c: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->RxEventType = HAL_UART_RXEVENT_TC;
8009720: 687b ldr r3, [r7, #4]
8009722: 2200 movs r2, #0
8009724: 635a str r2, [r3, #52] @ 0x34
return HAL_OK;
8009726: 2300 movs r3, #0
}
8009728: 4618 mov r0, r3
800972a: 3708 adds r7, #8
800972c: 46bd mov sp, r7
800972e: bd80 pop {r7, pc}
08009730 <HAL_UART_Transmit>:
* @param Size Amount of data elements (u8 or u16) to be sent
* @param Timeout Timeout duration
* @retval HAL status
*/
HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout)
{
8009730: b580 push {r7, lr}
8009732: b08a sub sp, #40 @ 0x28
8009734: af02 add r7, sp, #8
8009736: 60f8 str r0, [r7, #12]
8009738: 60b9 str r1, [r7, #8]
800973a: 603b str r3, [r7, #0]
800973c: 4613 mov r3, r2
800973e: 80fb strh r3, [r7, #6]
const uint8_t *pdata8bits;
const uint16_t *pdata16bits;
uint32_t tickstart = 0U;
8009740: 2300 movs r3, #0
8009742: 617b str r3, [r7, #20]
/* Check that a Tx process is not already ongoing */
if (huart->gState == HAL_UART_STATE_READY)
8009744: 68fb ldr r3, [r7, #12]
8009746: f893 3041 ldrb.w r3, [r3, #65] @ 0x41
800974a: b2db uxtb r3, r3
800974c: 2b20 cmp r3, #32
800974e: d175 bne.n 800983c <HAL_UART_Transmit+0x10c>
{
if ((pData == NULL) || (Size == 0U))
8009750: 68bb ldr r3, [r7, #8]
8009752: 2b00 cmp r3, #0
8009754: d002 beq.n 800975c <HAL_UART_Transmit+0x2c>
8009756: 88fb ldrh r3, [r7, #6]
8009758: 2b00 cmp r3, #0
800975a: d101 bne.n 8009760 <HAL_UART_Transmit+0x30>
{
return HAL_ERROR;
800975c: 2301 movs r3, #1
800975e: e06e b.n 800983e <HAL_UART_Transmit+0x10e>
}
huart->ErrorCode = HAL_UART_ERROR_NONE;
8009760: 68fb ldr r3, [r7, #12]
8009762: 2200 movs r2, #0
8009764: 645a str r2, [r3, #68] @ 0x44
huart->gState = HAL_UART_STATE_BUSY_TX;
8009766: 68fb ldr r3, [r7, #12]
8009768: 2221 movs r2, #33 @ 0x21
800976a: f883 2041 strb.w r2, [r3, #65] @ 0x41
/* Init tickstart for timeout management */
tickstart = HAL_GetTick();
800976e: f7fb fc6d bl 800504c <HAL_GetTick>
8009772: 6178 str r0, [r7, #20]
huart->TxXferSize = Size;
8009774: 68fb ldr r3, [r7, #12]
8009776: 88fa ldrh r2, [r7, #6]
8009778: 849a strh r2, [r3, #36] @ 0x24
huart->TxXferCount = Size;
800977a: 68fb ldr r3, [r7, #12]
800977c: 88fa ldrh r2, [r7, #6]
800977e: 84da strh r2, [r3, #38] @ 0x26
/* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */
if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
8009780: 68fb ldr r3, [r7, #12]
8009782: 689b ldr r3, [r3, #8]
8009784: f5b3 5f80 cmp.w r3, #4096 @ 0x1000
8009788: d108 bne.n 800979c <HAL_UART_Transmit+0x6c>
800978a: 68fb ldr r3, [r7, #12]
800978c: 691b ldr r3, [r3, #16]
800978e: 2b00 cmp r3, #0
8009790: d104 bne.n 800979c <HAL_UART_Transmit+0x6c>
{
pdata8bits = NULL;
8009792: 2300 movs r3, #0
8009794: 61fb str r3, [r7, #28]
pdata16bits = (const uint16_t *) pData;
8009796: 68bb ldr r3, [r7, #8]
8009798: 61bb str r3, [r7, #24]
800979a: e003 b.n 80097a4 <HAL_UART_Transmit+0x74>
}
else
{
pdata8bits = pData;
800979c: 68bb ldr r3, [r7, #8]
800979e: 61fb str r3, [r7, #28]
pdata16bits = NULL;
80097a0: 2300 movs r3, #0
80097a2: 61bb str r3, [r7, #24]
}
while (huart->TxXferCount > 0U)
80097a4: e02e b.n 8009804 <HAL_UART_Transmit+0xd4>
{
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
80097a6: 683b ldr r3, [r7, #0]
80097a8: 9300 str r3, [sp, #0]
80097aa: 697b ldr r3, [r7, #20]
80097ac: 2200 movs r2, #0
80097ae: 2180 movs r1, #128 @ 0x80
80097b0: 68f8 ldr r0, [r7, #12]
80097b2: f000 f848 bl 8009846 <UART_WaitOnFlagUntilTimeout>
80097b6: 4603 mov r3, r0
80097b8: 2b00 cmp r3, #0
80097ba: d005 beq.n 80097c8 <HAL_UART_Transmit+0x98>
{
huart->gState = HAL_UART_STATE_READY;
80097bc: 68fb ldr r3, [r7, #12]
80097be: 2220 movs r2, #32
80097c0: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
80097c4: 2303 movs r3, #3
80097c6: e03a b.n 800983e <HAL_UART_Transmit+0x10e>
}
if (pdata8bits == NULL)
80097c8: 69fb ldr r3, [r7, #28]
80097ca: 2b00 cmp r3, #0
80097cc: d10b bne.n 80097e6 <HAL_UART_Transmit+0xb6>
{
huart->Instance->DR = (uint16_t)(*pdata16bits & 0x01FFU);
80097ce: 69bb ldr r3, [r7, #24]
80097d0: 881b ldrh r3, [r3, #0]
80097d2: 461a mov r2, r3
80097d4: 68fb ldr r3, [r7, #12]
80097d6: 681b ldr r3, [r3, #0]
80097d8: f3c2 0208 ubfx r2, r2, #0, #9
80097dc: 605a str r2, [r3, #4]
pdata16bits++;
80097de: 69bb ldr r3, [r7, #24]
80097e0: 3302 adds r3, #2
80097e2: 61bb str r3, [r7, #24]
80097e4: e007 b.n 80097f6 <HAL_UART_Transmit+0xc6>
}
else
{
huart->Instance->DR = (uint8_t)(*pdata8bits & 0xFFU);
80097e6: 69fb ldr r3, [r7, #28]
80097e8: 781a ldrb r2, [r3, #0]
80097ea: 68fb ldr r3, [r7, #12]
80097ec: 681b ldr r3, [r3, #0]
80097ee: 605a str r2, [r3, #4]
pdata8bits++;
80097f0: 69fb ldr r3, [r7, #28]
80097f2: 3301 adds r3, #1
80097f4: 61fb str r3, [r7, #28]
}
huart->TxXferCount--;
80097f6: 68fb ldr r3, [r7, #12]
80097f8: 8cdb ldrh r3, [r3, #38] @ 0x26
80097fa: b29b uxth r3, r3
80097fc: 3b01 subs r3, #1
80097fe: b29a uxth r2, r3
8009800: 68fb ldr r3, [r7, #12]
8009802: 84da strh r2, [r3, #38] @ 0x26
while (huart->TxXferCount > 0U)
8009804: 68fb ldr r3, [r7, #12]
8009806: 8cdb ldrh r3, [r3, #38] @ 0x26
8009808: b29b uxth r3, r3
800980a: 2b00 cmp r3, #0
800980c: d1cb bne.n 80097a6 <HAL_UART_Transmit+0x76>
}
if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
800980e: 683b ldr r3, [r7, #0]
8009810: 9300 str r3, [sp, #0]
8009812: 697b ldr r3, [r7, #20]
8009814: 2200 movs r2, #0
8009816: 2140 movs r1, #64 @ 0x40
8009818: 68f8 ldr r0, [r7, #12]
800981a: f000 f814 bl 8009846 <UART_WaitOnFlagUntilTimeout>
800981e: 4603 mov r3, r0
8009820: 2b00 cmp r3, #0
8009822: d005 beq.n 8009830 <HAL_UART_Transmit+0x100>
{
huart->gState = HAL_UART_STATE_READY;
8009824: 68fb ldr r3, [r7, #12]
8009826: 2220 movs r2, #32
8009828: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_TIMEOUT;
800982c: 2303 movs r3, #3
800982e: e006 b.n 800983e <HAL_UART_Transmit+0x10e>
}
/* At end of Tx process, restore huart->gState to Ready */
huart->gState = HAL_UART_STATE_READY;
8009830: 68fb ldr r3, [r7, #12]
8009832: 2220 movs r2, #32
8009834: f883 2041 strb.w r2, [r3, #65] @ 0x41
return HAL_OK;
8009838: 2300 movs r3, #0
800983a: e000 b.n 800983e <HAL_UART_Transmit+0x10e>
}
else
{
return HAL_BUSY;
800983c: 2302 movs r3, #2
}
}
800983e: 4618 mov r0, r3
8009840: 3720 adds r7, #32
8009842: 46bd mov sp, r7
8009844: bd80 pop {r7, pc}
08009846 <UART_WaitOnFlagUntilTimeout>:
* @param Timeout Timeout duration
* @retval HAL status
*/
static HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
uint32_t Tickstart, uint32_t Timeout)
{
8009846: b580 push {r7, lr}
8009848: b086 sub sp, #24
800984a: af00 add r7, sp, #0
800984c: 60f8 str r0, [r7, #12]
800984e: 60b9 str r1, [r7, #8]
8009850: 603b str r3, [r7, #0]
8009852: 4613 mov r3, r2
8009854: 71fb strb r3, [r7, #7]
/* Wait until flag is set */
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
8009856: e03b b.n 80098d0 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Check for the Timeout */
if (Timeout != HAL_MAX_DELAY)
8009858: 6a3b ldr r3, [r7, #32]
800985a: f1b3 3fff cmp.w r3, #4294967295
800985e: d037 beq.n 80098d0 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U))
8009860: f7fb fbf4 bl 800504c <HAL_GetTick>
8009864: 4602 mov r2, r0
8009866: 683b ldr r3, [r7, #0]
8009868: 1ad3 subs r3, r2, r3
800986a: 6a3a ldr r2, [r7, #32]
800986c: 429a cmp r2, r3
800986e: d302 bcc.n 8009876 <UART_WaitOnFlagUntilTimeout+0x30>
8009870: 6a3b ldr r3, [r7, #32]
8009872: 2b00 cmp r3, #0
8009874: d101 bne.n 800987a <UART_WaitOnFlagUntilTimeout+0x34>
{
return HAL_TIMEOUT;
8009876: 2303 movs r3, #3
8009878: e03a b.n 80098f0 <UART_WaitOnFlagUntilTimeout+0xaa>
}
if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC))
800987a: 68fb ldr r3, [r7, #12]
800987c: 681b ldr r3, [r3, #0]
800987e: 68db ldr r3, [r3, #12]
8009880: f003 0304 and.w r3, r3, #4
8009884: 2b00 cmp r3, #0
8009886: d023 beq.n 80098d0 <UART_WaitOnFlagUntilTimeout+0x8a>
8009888: 68bb ldr r3, [r7, #8]
800988a: 2b80 cmp r3, #128 @ 0x80
800988c: d020 beq.n 80098d0 <UART_WaitOnFlagUntilTimeout+0x8a>
800988e: 68bb ldr r3, [r7, #8]
8009890: 2b40 cmp r3, #64 @ 0x40
8009892: d01d beq.n 80098d0 <UART_WaitOnFlagUntilTimeout+0x8a>
{
if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET)
8009894: 68fb ldr r3, [r7, #12]
8009896: 681b ldr r3, [r3, #0]
8009898: 681b ldr r3, [r3, #0]
800989a: f003 0308 and.w r3, r3, #8
800989e: 2b08 cmp r3, #8
80098a0: d116 bne.n 80098d0 <UART_WaitOnFlagUntilTimeout+0x8a>
{
/* Clear Overrun Error flag*/
__HAL_UART_CLEAR_OREFLAG(huart);
80098a2: 2300 movs r3, #0
80098a4: 617b str r3, [r7, #20]
80098a6: 68fb ldr r3, [r7, #12]
80098a8: 681b ldr r3, [r3, #0]
80098aa: 681b ldr r3, [r3, #0]
80098ac: 617b str r3, [r7, #20]
80098ae: 68fb ldr r3, [r7, #12]
80098b0: 681b ldr r3, [r3, #0]
80098b2: 685b ldr r3, [r3, #4]
80098b4: 617b str r3, [r7, #20]
80098b6: 697b ldr r3, [r7, #20]
/* Blocking error : transfer is aborted
Set the UART state ready to be able to start again the process,
Disable Rx Interrupts if ongoing */
UART_EndRxTransfer(huart);
80098b8: 68f8 ldr r0, [r7, #12]
80098ba: f000 f81d bl 80098f8 <UART_EndRxTransfer>
huart->ErrorCode = HAL_UART_ERROR_ORE;
80098be: 68fb ldr r3, [r7, #12]
80098c0: 2208 movs r2, #8
80098c2: 645a str r2, [r3, #68] @ 0x44
/* Process Unlocked */
__HAL_UNLOCK(huart);
80098c4: 68fb ldr r3, [r7, #12]
80098c6: 2200 movs r2, #0
80098c8: f883 2040 strb.w r2, [r3, #64] @ 0x40
return HAL_ERROR;
80098cc: 2301 movs r3, #1
80098ce: e00f b.n 80098f0 <UART_WaitOnFlagUntilTimeout+0xaa>
while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status)
80098d0: 68fb ldr r3, [r7, #12]
80098d2: 681b ldr r3, [r3, #0]
80098d4: 681a ldr r2, [r3, #0]
80098d6: 68bb ldr r3, [r7, #8]
80098d8: 4013 ands r3, r2
80098da: 68ba ldr r2, [r7, #8]
80098dc: 429a cmp r2, r3
80098de: bf0c ite eq
80098e0: 2301 moveq r3, #1
80098e2: 2300 movne r3, #0
80098e4: b2db uxtb r3, r3
80098e6: 461a mov r2, r3
80098e8: 79fb ldrb r3, [r7, #7]
80098ea: 429a cmp r2, r3
80098ec: d0b4 beq.n 8009858 <UART_WaitOnFlagUntilTimeout+0x12>
}
}
}
}
return HAL_OK;
80098ee: 2300 movs r3, #0
}
80098f0: 4618 mov r0, r3
80098f2: 3718 adds r7, #24
80098f4: 46bd mov sp, r7
80098f6: bd80 pop {r7, pc}
080098f8 <UART_EndRxTransfer>:
* @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion).
* @param huart UART handle.
* @retval None
*/
static void UART_EndRxTransfer(UART_HandleTypeDef *huart)
{
80098f8: b480 push {r7}
80098fa: b095 sub sp, #84 @ 0x54
80098fc: af00 add r7, sp, #0
80098fe: 6078 str r0, [r7, #4]
/* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
8009900: 687b ldr r3, [r7, #4]
8009902: 681b ldr r3, [r3, #0]
8009904: 330c adds r3, #12
8009906: 637b str r3, [r7, #52] @ 0x34
*/
__STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009908: 6b7b ldr r3, [r7, #52] @ 0x34
800990a: e853 3f00 ldrex r3, [r3]
800990e: 633b str r3, [r7, #48] @ 0x30
return(result);
8009910: 6b3b ldr r3, [r7, #48] @ 0x30
8009912: f423 7390 bic.w r3, r3, #288 @ 0x120
8009916: 64fb str r3, [r7, #76] @ 0x4c
8009918: 687b ldr r3, [r7, #4]
800991a: 681b ldr r3, [r3, #0]
800991c: 330c adds r3, #12
800991e: 6cfa ldr r2, [r7, #76] @ 0x4c
8009920: 643a str r2, [r7, #64] @ 0x40
8009922: 63fb str r3, [r7, #60] @ 0x3c
*/
__STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr)
{
uint32_t result;
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009924: 6bf9 ldr r1, [r7, #60] @ 0x3c
8009926: 6c3a ldr r2, [r7, #64] @ 0x40
8009928: e841 2300 strex r3, r2, [r1]
800992c: 63bb str r3, [r7, #56] @ 0x38
return(result);
800992e: 6bbb ldr r3, [r7, #56] @ 0x38
8009930: 2b00 cmp r3, #0
8009932: d1e5 bne.n 8009900 <UART_EndRxTransfer+0x8>
ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE);
8009934: 687b ldr r3, [r7, #4]
8009936: 681b ldr r3, [r3, #0]
8009938: 3314 adds r3, #20
800993a: 623b str r3, [r7, #32]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
800993c: 6a3b ldr r3, [r7, #32]
800993e: e853 3f00 ldrex r3, [r3]
8009942: 61fb str r3, [r7, #28]
return(result);
8009944: 69fb ldr r3, [r7, #28]
8009946: f023 0301 bic.w r3, r3, #1
800994a: 64bb str r3, [r7, #72] @ 0x48
800994c: 687b ldr r3, [r7, #4]
800994e: 681b ldr r3, [r3, #0]
8009950: 3314 adds r3, #20
8009952: 6cba ldr r2, [r7, #72] @ 0x48
8009954: 62fa str r2, [r7, #44] @ 0x2c
8009956: 62bb str r3, [r7, #40] @ 0x28
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009958: 6ab9 ldr r1, [r7, #40] @ 0x28
800995a: 6afa ldr r2, [r7, #44] @ 0x2c
800995c: e841 2300 strex r3, r2, [r1]
8009960: 627b str r3, [r7, #36] @ 0x24
return(result);
8009962: 6a7b ldr r3, [r7, #36] @ 0x24
8009964: 2b00 cmp r3, #0
8009966: d1e5 bne.n 8009934 <UART_EndRxTransfer+0x3c>
/* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */
if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE)
8009968: 687b ldr r3, [r7, #4]
800996a: 6b1b ldr r3, [r3, #48] @ 0x30
800996c: 2b01 cmp r3, #1
800996e: d119 bne.n 80099a4 <UART_EndRxTransfer+0xac>
{
ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE);
8009970: 687b ldr r3, [r7, #4]
8009972: 681b ldr r3, [r3, #0]
8009974: 330c adds r3, #12
8009976: 60fb str r3, [r7, #12]
__ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) );
8009978: 68fb ldr r3, [r7, #12]
800997a: e853 3f00 ldrex r3, [r3]
800997e: 60bb str r3, [r7, #8]
return(result);
8009980: 68bb ldr r3, [r7, #8]
8009982: f023 0310 bic.w r3, r3, #16
8009986: 647b str r3, [r7, #68] @ 0x44
8009988: 687b ldr r3, [r7, #4]
800998a: 681b ldr r3, [r3, #0]
800998c: 330c adds r3, #12
800998e: 6c7a ldr r2, [r7, #68] @ 0x44
8009990: 61ba str r2, [r7, #24]
8009992: 617b str r3, [r7, #20]
__ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) );
8009994: 6979 ldr r1, [r7, #20]
8009996: 69ba ldr r2, [r7, #24]
8009998: e841 2300 strex r3, r2, [r1]
800999c: 613b str r3, [r7, #16]
return(result);
800999e: 693b ldr r3, [r7, #16]
80099a0: 2b00 cmp r3, #0
80099a2: d1e5 bne.n 8009970 <UART_EndRxTransfer+0x78>
}
/* At end of Rx process, restore huart->RxState to Ready */
huart->RxState = HAL_UART_STATE_READY;
80099a4: 687b ldr r3, [r7, #4]
80099a6: 2220 movs r2, #32
80099a8: f883 2042 strb.w r2, [r3, #66] @ 0x42
huart->ReceptionType = HAL_UART_RECEPTION_STANDARD;
80099ac: 687b ldr r3, [r7, #4]
80099ae: 2200 movs r2, #0
80099b0: 631a str r2, [r3, #48] @ 0x30
}
80099b2: bf00 nop
80099b4: 3754 adds r7, #84 @ 0x54
80099b6: 46bd mov sp, r7
80099b8: bc80 pop {r7}
80099ba: 4770 bx lr
080099bc <UART_SetConfig>:
* @param huart Pointer to a UART_HandleTypeDef structure that contains
* the configuration information for the specified UART module.
* @retval None
*/
static void UART_SetConfig(UART_HandleTypeDef *huart)
{
80099bc: b580 push {r7, lr}
80099be: b084 sub sp, #16
80099c0: af00 add r7, sp, #0
80099c2: 6078 str r0, [r7, #4]
assert_param(IS_UART_MODE(huart->Init.Mode));
/*-------------------------- USART CR2 Configuration -----------------------*/
/* Configure the UART Stop Bits: Set STOP[13:12] bits
according to huart->Init.StopBits value */
MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
80099c4: 687b ldr r3, [r7, #4]
80099c6: 681b ldr r3, [r3, #0]
80099c8: 691b ldr r3, [r3, #16]
80099ca: f423 5140 bic.w r1, r3, #12288 @ 0x3000
80099ce: 687b ldr r3, [r7, #4]
80099d0: 68da ldr r2, [r3, #12]
80099d2: 687b ldr r3, [r7, #4]
80099d4: 681b ldr r3, [r3, #0]
80099d6: 430a orrs r2, r1
80099d8: 611a str r2, [r3, #16]
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling;
MODIFY_REG(huart->Instance->CR1,
(uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
tmpreg);
#else
tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode;
80099da: 687b ldr r3, [r7, #4]
80099dc: 689a ldr r2, [r3, #8]
80099de: 687b ldr r3, [r7, #4]
80099e0: 691b ldr r3, [r3, #16]
80099e2: 431a orrs r2, r3
80099e4: 687b ldr r3, [r7, #4]
80099e6: 695b ldr r3, [r3, #20]
80099e8: 4313 orrs r3, r2
80099ea: 60bb str r3, [r7, #8]
MODIFY_REG(huart->Instance->CR1,
80099ec: 687b ldr r3, [r7, #4]
80099ee: 681b ldr r3, [r3, #0]
80099f0: 68db ldr r3, [r3, #12]
80099f2: f423 53b0 bic.w r3, r3, #5632 @ 0x1600
80099f6: f023 030c bic.w r3, r3, #12
80099fa: 687a ldr r2, [r7, #4]
80099fc: 6812 ldr r2, [r2, #0]
80099fe: 68b9 ldr r1, [r7, #8]
8009a00: 430b orrs r3, r1
8009a02: 60d3 str r3, [r2, #12]
tmpreg);
#endif /* USART_CR1_OVER8 */
/*-------------------------- USART CR3 Configuration -----------------------*/
/* Configure the UART HFC: Set CTSE and RTSE bits according to huart->Init.HwFlowCtl value */
MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE), huart->Init.HwFlowCtl);
8009a04: 687b ldr r3, [r7, #4]
8009a06: 681b ldr r3, [r3, #0]
8009a08: 695b ldr r3, [r3, #20]
8009a0a: f423 7140 bic.w r1, r3, #768 @ 0x300
8009a0e: 687b ldr r3, [r7, #4]
8009a10: 699a ldr r2, [r3, #24]
8009a12: 687b ldr r3, [r7, #4]
8009a14: 681b ldr r3, [r3, #0]
8009a16: 430a orrs r2, r1
8009a18: 615a str r2, [r3, #20]
if(huart->Instance == USART1)
8009a1a: 687b ldr r3, [r7, #4]
8009a1c: 681b ldr r3, [r3, #0]
8009a1e: 4a2c ldr r2, [pc, #176] @ (8009ad0 <UART_SetConfig+0x114>)
8009a20: 4293 cmp r3, r2
8009a22: d103 bne.n 8009a2c <UART_SetConfig+0x70>
{
pclk = HAL_RCC_GetPCLK2Freq();
8009a24: f7fe fede bl 80087e4 <HAL_RCC_GetPCLK2Freq>
8009a28: 60f8 str r0, [r7, #12]
8009a2a: e002 b.n 8009a32 <UART_SetConfig+0x76>
}
else
{
pclk = HAL_RCC_GetPCLK1Freq();
8009a2c: f7fe fec6 bl 80087bc <HAL_RCC_GetPCLK1Freq>
8009a30: 60f8 str r0, [r7, #12]
else
{
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
}
#else
huart->Instance->BRR = UART_BRR_SAMPLING16(pclk, huart->Init.BaudRate);
8009a32: 68fa ldr r2, [r7, #12]
8009a34: 4613 mov r3, r2
8009a36: 009b lsls r3, r3, #2
8009a38: 4413 add r3, r2
8009a3a: 009a lsls r2, r3, #2
8009a3c: 441a add r2, r3
8009a3e: 687b ldr r3, [r7, #4]
8009a40: 685b ldr r3, [r3, #4]
8009a42: 009b lsls r3, r3, #2
8009a44: fbb2 f3f3 udiv r3, r2, r3
8009a48: 4a22 ldr r2, [pc, #136] @ (8009ad4 <UART_SetConfig+0x118>)
8009a4a: fba2 2303 umull r2, r3, r2, r3
8009a4e: 095b lsrs r3, r3, #5
8009a50: 0119 lsls r1, r3, #4
8009a52: 68fa ldr r2, [r7, #12]
8009a54: 4613 mov r3, r2
8009a56: 009b lsls r3, r3, #2
8009a58: 4413 add r3, r2
8009a5a: 009a lsls r2, r3, #2
8009a5c: 441a add r2, r3
8009a5e: 687b ldr r3, [r7, #4]
8009a60: 685b ldr r3, [r3, #4]
8009a62: 009b lsls r3, r3, #2
8009a64: fbb2 f2f3 udiv r2, r2, r3
8009a68: 4b1a ldr r3, [pc, #104] @ (8009ad4 <UART_SetConfig+0x118>)
8009a6a: fba3 0302 umull r0, r3, r3, r2
8009a6e: 095b lsrs r3, r3, #5
8009a70: 2064 movs r0, #100 @ 0x64
8009a72: fb00 f303 mul.w r3, r0, r3
8009a76: 1ad3 subs r3, r2, r3
8009a78: 011b lsls r3, r3, #4
8009a7a: 3332 adds r3, #50 @ 0x32
8009a7c: 4a15 ldr r2, [pc, #84] @ (8009ad4 <UART_SetConfig+0x118>)
8009a7e: fba2 2303 umull r2, r3, r2, r3
8009a82: 095b lsrs r3, r3, #5
8009a84: f003 03f0 and.w r3, r3, #240 @ 0xf0
8009a88: 4419 add r1, r3
8009a8a: 68fa ldr r2, [r7, #12]
8009a8c: 4613 mov r3, r2
8009a8e: 009b lsls r3, r3, #2
8009a90: 4413 add r3, r2
8009a92: 009a lsls r2, r3, #2
8009a94: 441a add r2, r3
8009a96: 687b ldr r3, [r7, #4]
8009a98: 685b ldr r3, [r3, #4]
8009a9a: 009b lsls r3, r3, #2
8009a9c: fbb2 f2f3 udiv r2, r2, r3
8009aa0: 4b0c ldr r3, [pc, #48] @ (8009ad4 <UART_SetConfig+0x118>)
8009aa2: fba3 0302 umull r0, r3, r3, r2
8009aa6: 095b lsrs r3, r3, #5
8009aa8: 2064 movs r0, #100 @ 0x64
8009aaa: fb00 f303 mul.w r3, r0, r3
8009aae: 1ad3 subs r3, r2, r3
8009ab0: 011b lsls r3, r3, #4
8009ab2: 3332 adds r3, #50 @ 0x32
8009ab4: 4a07 ldr r2, [pc, #28] @ (8009ad4 <UART_SetConfig+0x118>)
8009ab6: fba2 2303 umull r2, r3, r2, r3
8009aba: 095b lsrs r3, r3, #5
8009abc: f003 020f and.w r2, r3, #15
8009ac0: 687b ldr r3, [r7, #4]
8009ac2: 681b ldr r3, [r3, #0]
8009ac4: 440a add r2, r1
8009ac6: 609a str r2, [r3, #8]
#endif /* USART_CR1_OVER8 */
}
8009ac8: bf00 nop
8009aca: 3710 adds r7, #16
8009acc: 46bd mov sp, r7
8009ace: bd80 pop {r7, pc}
8009ad0: 40013800 .word 0x40013800
8009ad4: 51eb851f .word 0x51eb851f
08009ad8 <USB_CoreInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_CoreInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009ad8: b480 push {r7}
8009ada: b085 sub sp, #20
8009adc: af00 add r7, sp, #0
8009ade: 60f8 str r0, [r7, #12]
8009ae0: 4638 mov r0, r7
8009ae2: e880 000e stmia.w r0, {r1, r2, r3}
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8009ae6: 2300 movs r3, #0
}
8009ae8: 4618 mov r0, r3
8009aea: 3714 adds r7, #20
8009aec: 46bd mov sp, r7
8009aee: bc80 pop {r7}
8009af0: 4770 bx lr
08009af2 <USB_EnableGlobalInt>:
* Enables the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_EnableGlobalInt(USB_TypeDef *USBx)
{
8009af2: b480 push {r7}
8009af4: b085 sub sp, #20
8009af6: af00 add r7, sp, #0
8009af8: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009afa: 687b ldr r3, [r7, #4]
8009afc: 2200 movs r2, #0
8009afe: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8009b02: f44f 433f mov.w r3, #48896 @ 0xbf00
8009b06: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Set interrupt mask */
USBx->CNTR = (uint16_t)winterruptmask;
8009b08: 68fb ldr r3, [r7, #12]
8009b0a: b29a uxth r2, r3
8009b0c: 687b ldr r3, [r7, #4]
8009b0e: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8009b12: 2300 movs r3, #0
}
8009b14: 4618 mov r0, r3
8009b16: 3714 adds r7, #20
8009b18: 46bd mov sp, r7
8009b1a: bc80 pop {r7}
8009b1c: 4770 bx lr
08009b1e <USB_DisableGlobalInt>:
* Disable the controller's Global Int in the AHB Config reg
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DisableGlobalInt(USB_TypeDef *USBx)
{
8009b1e: b480 push {r7}
8009b20: b085 sub sp, #20
8009b22: af00 add r7, sp, #0
8009b24: 6078 str r0, [r7, #4]
uint32_t winterruptmask;
/* Set winterruptmask variable */
winterruptmask = USB_CNTR_CTRM | USB_CNTR_WKUPM |
8009b26: f44f 433f mov.w r3, #48896 @ 0xbf00
8009b2a: 60fb str r3, [r7, #12]
USB_CNTR_SUSPM | USB_CNTR_ERRM |
USB_CNTR_SOFM | USB_CNTR_ESOFM |
USB_CNTR_RESETM;
/* Clear interrupt mask */
USBx->CNTR &= (uint16_t)(~winterruptmask);
8009b2c: 687b ldr r3, [r7, #4]
8009b2e: f8b3 3040 ldrh.w r3, [r3, #64] @ 0x40
8009b32: b29a uxth r2, r3
8009b34: 68fb ldr r3, [r7, #12]
8009b36: b29b uxth r3, r3
8009b38: 43db mvns r3, r3
8009b3a: b29b uxth r3, r3
8009b3c: 4013 ands r3, r2
8009b3e: b29a uxth r2, r3
8009b40: 687b ldr r3, [r7, #4]
8009b42: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
return HAL_OK;
8009b46: 2300 movs r3, #0
}
8009b48: 4618 mov r0, r3
8009b4a: 3714 adds r7, #20
8009b4c: 46bd mov sp, r7
8009b4e: bc80 pop {r7}
8009b50: 4770 bx lr
08009b52 <USB_SetCurrentMode>:
* This parameter can be one of the these values:
* @arg USB_DEVICE_MODE Peripheral mode
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetCurrentMode(USB_TypeDef *USBx, USB_ModeTypeDef mode)
{
8009b52: b480 push {r7}
8009b54: b083 sub sp, #12
8009b56: af00 add r7, sp, #0
8009b58: 6078 str r0, [r7, #4]
8009b5a: 460b mov r3, r1
8009b5c: 70fb strb r3, [r7, #3]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
8009b5e: 2300 movs r3, #0
}
8009b60: 4618 mov r0, r3
8009b62: 370c adds r7, #12
8009b64: 46bd mov sp, r7
8009b66: bc80 pop {r7}
8009b68: 4770 bx lr
08009b6a <USB_DevInit>:
* @param cfg pointer to a USB_CfgTypeDef structure that contains
* the configuration information for the specified USBx peripheral.
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevInit(USB_TypeDef *USBx, USB_CfgTypeDef cfg)
{
8009b6a: b480 push {r7}
8009b6c: b085 sub sp, #20
8009b6e: af00 add r7, sp, #0
8009b70: 60f8 str r0, [r7, #12]
8009b72: 4638 mov r0, r7
8009b74: e880 000e stmia.w r0, {r1, r2, r3}
/* Prevent unused argument(s) compilation warning */
UNUSED(cfg);
/* Init Device */
/* CNTR_FRES = 1 */
USBx->CNTR = (uint16_t)USB_CNTR_FRES;
8009b78: 68fb ldr r3, [r7, #12]
8009b7a: 2201 movs r2, #1
8009b7c: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* CNTR_FRES = 0 */
USBx->CNTR = 0U;
8009b80: 68fb ldr r3, [r7, #12]
8009b82: 2200 movs r2, #0
8009b84: f8a3 2040 strh.w r2, [r3, #64] @ 0x40
/* Clear pending interrupts */
USBx->ISTR = 0U;
8009b88: 68fb ldr r3, [r7, #12]
8009b8a: 2200 movs r2, #0
8009b8c: f8a3 2044 strh.w r2, [r3, #68] @ 0x44
/*Set Btable Address*/
USBx->BTABLE = BTABLE_ADDRESS;
8009b90: 68fb ldr r3, [r7, #12]
8009b92: 2200 movs r2, #0
8009b94: f8a3 2050 strh.w r2, [r3, #80] @ 0x50
return HAL_OK;
8009b98: 2300 movs r3, #0
}
8009b9a: 4618 mov r0, r3
8009b9c: 3714 adds r7, #20
8009b9e: 46bd mov sp, r7
8009ba0: bc80 pop {r7}
8009ba2: 4770 bx lr
08009ba4 <USB_ActivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_ActivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
8009ba4: b480 push {r7}
8009ba6: b09d sub sp, #116 @ 0x74
8009ba8: af00 add r7, sp, #0
8009baa: 6078 str r0, [r7, #4]
8009bac: 6039 str r1, [r7, #0]
HAL_StatusTypeDef ret = HAL_OK;
8009bae: 2300 movs r3, #0
8009bb0: f887 306f strb.w r3, [r7, #111] @ 0x6f
uint16_t wEpRegVal;
wEpRegVal = PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_T_MASK;
8009bb4: 687a ldr r2, [r7, #4]
8009bb6: 683b ldr r3, [r7, #0]
8009bb8: 781b ldrb r3, [r3, #0]
8009bba: 009b lsls r3, r3, #2
8009bbc: 4413 add r3, r2
8009bbe: 881b ldrh r3, [r3, #0]
8009bc0: b29b uxth r3, r3
8009bc2: f423 43ec bic.w r3, r3, #30208 @ 0x7600
8009bc6: f023 0370 bic.w r3, r3, #112 @ 0x70
8009bca: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
/* initialize Endpoint */
switch (ep->type)
8009bce: 683b ldr r3, [r7, #0]
8009bd0: 78db ldrb r3, [r3, #3]
8009bd2: 2b03 cmp r3, #3
8009bd4: d81f bhi.n 8009c16 <USB_ActivateEndpoint+0x72>
8009bd6: a201 add r2, pc, #4 @ (adr r2, 8009bdc <USB_ActivateEndpoint+0x38>)
8009bd8: f852 f023 ldr.w pc, [r2, r3, lsl #2]
8009bdc: 08009bed .word 0x08009bed
8009be0: 08009c09 .word 0x08009c09
8009be4: 08009c1f .word 0x08009c1f
8009be8: 08009bfb .word 0x08009bfb
{
case EP_TYPE_CTRL:
wEpRegVal |= USB_EP_CONTROL;
8009bec: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009bf0: f443 7300 orr.w r3, r3, #512 @ 0x200
8009bf4: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009bf8: e012 b.n 8009c20 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_BULK:
wEpRegVal |= USB_EP_BULK;
break;
case EP_TYPE_INTR:
wEpRegVal |= USB_EP_INTERRUPT;
8009bfa: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009bfe: f443 63c0 orr.w r3, r3, #1536 @ 0x600
8009c02: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009c06: e00b b.n 8009c20 <USB_ActivateEndpoint+0x7c>
case EP_TYPE_ISOC:
wEpRegVal |= USB_EP_ISOCHRONOUS;
8009c08: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009c0c: f443 6380 orr.w r3, r3, #1024 @ 0x400
8009c10: f8a7 306c strh.w r3, [r7, #108] @ 0x6c
break;
8009c14: e004 b.n 8009c20 <USB_ActivateEndpoint+0x7c>
default:
ret = HAL_ERROR;
8009c16: 2301 movs r3, #1
8009c18: f887 306f strb.w r3, [r7, #111] @ 0x6f
break;
8009c1c: e000 b.n 8009c20 <USB_ActivateEndpoint+0x7c>
break;
8009c1e: bf00 nop
}
PCD_SET_ENDPOINT(USBx, ep->num, (wEpRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX));
8009c20: 687a ldr r2, [r7, #4]
8009c22: 683b ldr r3, [r7, #0]
8009c24: 781b ldrb r3, [r3, #0]
8009c26: 009b lsls r3, r3, #2
8009c28: 441a add r2, r3
8009c2a: f8b7 306c ldrh.w r3, [r7, #108] @ 0x6c
8009c2e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009c32: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009c36: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009c3a: f043 0380 orr.w r3, r3, #128 @ 0x80
8009c3e: b29b uxth r3, r3
8009c40: 8013 strh r3, [r2, #0]
PCD_SET_EP_ADDRESS(USBx, ep->num, ep->num);
8009c42: 687a ldr r2, [r7, #4]
8009c44: 683b ldr r3, [r7, #0]
8009c46: 781b ldrb r3, [r3, #0]
8009c48: 009b lsls r3, r3, #2
8009c4a: 4413 add r3, r2
8009c4c: 881b ldrh r3, [r3, #0]
8009c4e: b29b uxth r3, r3
8009c50: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009c54: f023 0370 bic.w r3, r3, #112 @ 0x70
8009c58: b29b uxth r3, r3
8009c5a: 683a ldr r2, [r7, #0]
8009c5c: 7812 ldrb r2, [r2, #0]
8009c5e: 4313 orrs r3, r2
8009c60: f8a7 3066 strh.w r3, [r7, #102] @ 0x66
8009c64: 687a ldr r2, [r7, #4]
8009c66: 683b ldr r3, [r7, #0]
8009c68: 781b ldrb r3, [r3, #0]
8009c6a: 009b lsls r3, r3, #2
8009c6c: 441a add r2, r3
8009c6e: f8b7 3066 ldrh.w r3, [r7, #102] @ 0x66
8009c72: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009c76: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009c7a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009c7e: f043 0380 orr.w r3, r3, #128 @ 0x80
8009c82: b29b uxth r3, r3
8009c84: 8013 strh r3, [r2, #0]
if (ep->doublebuffer == 0U)
8009c86: 683b ldr r3, [r7, #0]
8009c88: 7b1b ldrb r3, [r3, #12]
8009c8a: 2b00 cmp r3, #0
8009c8c: f040 8178 bne.w 8009f80 <USB_ActivateEndpoint+0x3dc>
{
if (ep->is_in != 0U)
8009c90: 683b ldr r3, [r7, #0]
8009c92: 785b ldrb r3, [r3, #1]
8009c94: 2b00 cmp r3, #0
8009c96: f000 8084 beq.w 8009da2 <USB_ActivateEndpoint+0x1fe>
{
/*Set the endpoint Transmit buffer address */
PCD_SET_EP_TX_ADDRESS(USBx, ep->num, ep->pmaadress);
8009c9a: 687b ldr r3, [r7, #4]
8009c9c: 61bb str r3, [r7, #24]
8009c9e: 687b ldr r3, [r7, #4]
8009ca0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009ca4: b29b uxth r3, r3
8009ca6: 461a mov r2, r3
8009ca8: 69bb ldr r3, [r7, #24]
8009caa: 4413 add r3, r2
8009cac: 61bb str r3, [r7, #24]
8009cae: 683b ldr r3, [r7, #0]
8009cb0: 781b ldrb r3, [r3, #0]
8009cb2: 011a lsls r2, r3, #4
8009cb4: 69bb ldr r3, [r7, #24]
8009cb6: 4413 add r3, r2
8009cb8: f503 6380 add.w r3, r3, #1024 @ 0x400
8009cbc: 617b str r3, [r7, #20]
8009cbe: 683b ldr r3, [r7, #0]
8009cc0: 88db ldrh r3, [r3, #6]
8009cc2: 085b lsrs r3, r3, #1
8009cc4: b29b uxth r3, r3
8009cc6: 005b lsls r3, r3, #1
8009cc8: b29a uxth r2, r3
8009cca: 697b ldr r3, [r7, #20]
8009ccc: 801a strh r2, [r3, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
8009cce: 687a ldr r2, [r7, #4]
8009cd0: 683b ldr r3, [r7, #0]
8009cd2: 781b ldrb r3, [r3, #0]
8009cd4: 009b lsls r3, r3, #2
8009cd6: 4413 add r3, r2
8009cd8: 881b ldrh r3, [r3, #0]
8009cda: 827b strh r3, [r7, #18]
8009cdc: 8a7b ldrh r3, [r7, #18]
8009cde: f003 0340 and.w r3, r3, #64 @ 0x40
8009ce2: 2b00 cmp r3, #0
8009ce4: d01b beq.n 8009d1e <USB_ActivateEndpoint+0x17a>
8009ce6: 687a ldr r2, [r7, #4]
8009ce8: 683b ldr r3, [r7, #0]
8009cea: 781b ldrb r3, [r3, #0]
8009cec: 009b lsls r3, r3, #2
8009cee: 4413 add r3, r2
8009cf0: 881b ldrh r3, [r3, #0]
8009cf2: b29b uxth r3, r3
8009cf4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009cf8: f023 0370 bic.w r3, r3, #112 @ 0x70
8009cfc: 823b strh r3, [r7, #16]
8009cfe: 687a ldr r2, [r7, #4]
8009d00: 683b ldr r3, [r7, #0]
8009d02: 781b ldrb r3, [r3, #0]
8009d04: 009b lsls r3, r3, #2
8009d06: 441a add r2, r3
8009d08: 8a3b ldrh r3, [r7, #16]
8009d0a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d0e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d12: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d16: f043 03c0 orr.w r3, r3, #192 @ 0xc0
8009d1a: b29b uxth r3, r3
8009d1c: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
8009d1e: 683b ldr r3, [r7, #0]
8009d20: 78db ldrb r3, [r3, #3]
8009d22: 2b01 cmp r3, #1
8009d24: d020 beq.n 8009d68 <USB_ActivateEndpoint+0x1c4>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
8009d26: 687a ldr r2, [r7, #4]
8009d28: 683b ldr r3, [r7, #0]
8009d2a: 781b ldrb r3, [r3, #0]
8009d2c: 009b lsls r3, r3, #2
8009d2e: 4413 add r3, r2
8009d30: 881b ldrh r3, [r3, #0]
8009d32: b29b uxth r3, r3
8009d34: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009d38: f023 0340 bic.w r3, r3, #64 @ 0x40
8009d3c: 81bb strh r3, [r7, #12]
8009d3e: 89bb ldrh r3, [r7, #12]
8009d40: f083 0320 eor.w r3, r3, #32
8009d44: 81bb strh r3, [r7, #12]
8009d46: 687a ldr r2, [r7, #4]
8009d48: 683b ldr r3, [r7, #0]
8009d4a: 781b ldrb r3, [r3, #0]
8009d4c: 009b lsls r3, r3, #2
8009d4e: 441a add r2, r3
8009d50: 89bb ldrh r3, [r7, #12]
8009d52: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d56: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d5a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d5e: f043 0380 orr.w r3, r3, #128 @ 0x80
8009d62: b29b uxth r3, r3
8009d64: 8013 strh r3, [r2, #0]
8009d66: e2d5 b.n 800a314 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
8009d68: 687a ldr r2, [r7, #4]
8009d6a: 683b ldr r3, [r7, #0]
8009d6c: 781b ldrb r3, [r3, #0]
8009d6e: 009b lsls r3, r3, #2
8009d70: 4413 add r3, r2
8009d72: 881b ldrh r3, [r3, #0]
8009d74: b29b uxth r3, r3
8009d76: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009d7a: f023 0340 bic.w r3, r3, #64 @ 0x40
8009d7e: 81fb strh r3, [r7, #14]
8009d80: 687a ldr r2, [r7, #4]
8009d82: 683b ldr r3, [r7, #0]
8009d84: 781b ldrb r3, [r3, #0]
8009d86: 009b lsls r3, r3, #2
8009d88: 441a add r2, r3
8009d8a: 89fb ldrh r3, [r7, #14]
8009d8c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009d90: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009d94: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009d98: f043 0380 orr.w r3, r3, #128 @ 0x80
8009d9c: b29b uxth r3, r3
8009d9e: 8013 strh r3, [r2, #0]
8009da0: e2b8 b.n 800a314 <USB_ActivateEndpoint+0x770>
}
}
else
{
/* Set the endpoint Receive buffer address */
PCD_SET_EP_RX_ADDRESS(USBx, ep->num, ep->pmaadress);
8009da2: 687b ldr r3, [r7, #4]
8009da4: 633b str r3, [r7, #48] @ 0x30
8009da6: 687b ldr r3, [r7, #4]
8009da8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009dac: b29b uxth r3, r3
8009dae: 461a mov r2, r3
8009db0: 6b3b ldr r3, [r7, #48] @ 0x30
8009db2: 4413 add r3, r2
8009db4: 633b str r3, [r7, #48] @ 0x30
8009db6: 683b ldr r3, [r7, #0]
8009db8: 781b ldrb r3, [r3, #0]
8009dba: 011a lsls r2, r3, #4
8009dbc: 6b3b ldr r3, [r7, #48] @ 0x30
8009dbe: 4413 add r3, r2
8009dc0: f503 6381 add.w r3, r3, #1032 @ 0x408
8009dc4: 62fb str r3, [r7, #44] @ 0x2c
8009dc6: 683b ldr r3, [r7, #0]
8009dc8: 88db ldrh r3, [r3, #6]
8009dca: 085b lsrs r3, r3, #1
8009dcc: b29b uxth r3, r3
8009dce: 005b lsls r3, r3, #1
8009dd0: b29a uxth r2, r3
8009dd2: 6afb ldr r3, [r7, #44] @ 0x2c
8009dd4: 801a strh r2, [r3, #0]
/* Set the endpoint Receive buffer counter */
PCD_SET_EP_RX_CNT(USBx, ep->num, ep->maxpacket);
8009dd6: 687b ldr r3, [r7, #4]
8009dd8: 62bb str r3, [r7, #40] @ 0x28
8009dda: 687b ldr r3, [r7, #4]
8009ddc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
8009de0: b29b uxth r3, r3
8009de2: 461a mov r2, r3
8009de4: 6abb ldr r3, [r7, #40] @ 0x28
8009de6: 4413 add r3, r2
8009de8: 62bb str r3, [r7, #40] @ 0x28
8009dea: 683b ldr r3, [r7, #0]
8009dec: 781b ldrb r3, [r3, #0]
8009dee: 011a lsls r2, r3, #4
8009df0: 6abb ldr r3, [r7, #40] @ 0x28
8009df2: 4413 add r3, r2
8009df4: f203 430c addw r3, r3, #1036 @ 0x40c
8009df8: 627b str r3, [r7, #36] @ 0x24
8009dfa: 6a7b ldr r3, [r7, #36] @ 0x24
8009dfc: 881b ldrh r3, [r3, #0]
8009dfe: b29b uxth r3, r3
8009e00: f3c3 0309 ubfx r3, r3, #0, #10
8009e04: b29a uxth r2, r3
8009e06: 6a7b ldr r3, [r7, #36] @ 0x24
8009e08: 801a strh r2, [r3, #0]
8009e0a: 683b ldr r3, [r7, #0]
8009e0c: 691b ldr r3, [r3, #16]
8009e0e: 2b3e cmp r3, #62 @ 0x3e
8009e10: d91d bls.n 8009e4e <USB_ActivateEndpoint+0x2aa>
8009e12: 683b ldr r3, [r7, #0]
8009e14: 691b ldr r3, [r3, #16]
8009e16: 095b lsrs r3, r3, #5
8009e18: 66bb str r3, [r7, #104] @ 0x68
8009e1a: 683b ldr r3, [r7, #0]
8009e1c: 691b ldr r3, [r3, #16]
8009e1e: f003 031f and.w r3, r3, #31
8009e22: 2b00 cmp r3, #0
8009e24: d102 bne.n 8009e2c <USB_ActivateEndpoint+0x288>
8009e26: 6ebb ldr r3, [r7, #104] @ 0x68
8009e28: 3b01 subs r3, #1
8009e2a: 66bb str r3, [r7, #104] @ 0x68
8009e2c: 6a7b ldr r3, [r7, #36] @ 0x24
8009e2e: 881b ldrh r3, [r3, #0]
8009e30: b29a uxth r2, r3
8009e32: 6ebb ldr r3, [r7, #104] @ 0x68
8009e34: b29b uxth r3, r3
8009e36: 029b lsls r3, r3, #10
8009e38: b29b uxth r3, r3
8009e3a: 4313 orrs r3, r2
8009e3c: b29b uxth r3, r3
8009e3e: ea6f 4343 mvn.w r3, r3, lsl #17
8009e42: ea6f 4353 mvn.w r3, r3, lsr #17
8009e46: b29a uxth r2, r3
8009e48: 6a7b ldr r3, [r7, #36] @ 0x24
8009e4a: 801a strh r2, [r3, #0]
8009e4c: e026 b.n 8009e9c <USB_ActivateEndpoint+0x2f8>
8009e4e: 683b ldr r3, [r7, #0]
8009e50: 691b ldr r3, [r3, #16]
8009e52: 2b00 cmp r3, #0
8009e54: d10a bne.n 8009e6c <USB_ActivateEndpoint+0x2c8>
8009e56: 6a7b ldr r3, [r7, #36] @ 0x24
8009e58: 881b ldrh r3, [r3, #0]
8009e5a: b29b uxth r3, r3
8009e5c: ea6f 4343 mvn.w r3, r3, lsl #17
8009e60: ea6f 4353 mvn.w r3, r3, lsr #17
8009e64: b29a uxth r2, r3
8009e66: 6a7b ldr r3, [r7, #36] @ 0x24
8009e68: 801a strh r2, [r3, #0]
8009e6a: e017 b.n 8009e9c <USB_ActivateEndpoint+0x2f8>
8009e6c: 683b ldr r3, [r7, #0]
8009e6e: 691b ldr r3, [r3, #16]
8009e70: 085b lsrs r3, r3, #1
8009e72: 66bb str r3, [r7, #104] @ 0x68
8009e74: 683b ldr r3, [r7, #0]
8009e76: 691b ldr r3, [r3, #16]
8009e78: f003 0301 and.w r3, r3, #1
8009e7c: 2b00 cmp r3, #0
8009e7e: d002 beq.n 8009e86 <USB_ActivateEndpoint+0x2e2>
8009e80: 6ebb ldr r3, [r7, #104] @ 0x68
8009e82: 3301 adds r3, #1
8009e84: 66bb str r3, [r7, #104] @ 0x68
8009e86: 6a7b ldr r3, [r7, #36] @ 0x24
8009e88: 881b ldrh r3, [r3, #0]
8009e8a: b29a uxth r2, r3
8009e8c: 6ebb ldr r3, [r7, #104] @ 0x68
8009e8e: b29b uxth r3, r3
8009e90: 029b lsls r3, r3, #10
8009e92: b29b uxth r3, r3
8009e94: 4313 orrs r3, r2
8009e96: b29a uxth r2, r3
8009e98: 6a7b ldr r3, [r7, #36] @ 0x24
8009e9a: 801a strh r2, [r3, #0]
PCD_CLEAR_RX_DTOG(USBx, ep->num);
8009e9c: 687a ldr r2, [r7, #4]
8009e9e: 683b ldr r3, [r7, #0]
8009ea0: 781b ldrb r3, [r3, #0]
8009ea2: 009b lsls r3, r3, #2
8009ea4: 4413 add r3, r2
8009ea6: 881b ldrh r3, [r3, #0]
8009ea8: 847b strh r3, [r7, #34] @ 0x22
8009eaa: 8c7b ldrh r3, [r7, #34] @ 0x22
8009eac: f403 4380 and.w r3, r3, #16384 @ 0x4000
8009eb0: 2b00 cmp r3, #0
8009eb2: d01b beq.n 8009eec <USB_ActivateEndpoint+0x348>
8009eb4: 687a ldr r2, [r7, #4]
8009eb6: 683b ldr r3, [r7, #0]
8009eb8: 781b ldrb r3, [r3, #0]
8009eba: 009b lsls r3, r3, #2
8009ebc: 4413 add r3, r2
8009ebe: 881b ldrh r3, [r3, #0]
8009ec0: b29b uxth r3, r3
8009ec2: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009ec6: f023 0370 bic.w r3, r3, #112 @ 0x70
8009eca: 843b strh r3, [r7, #32]
8009ecc: 687a ldr r2, [r7, #4]
8009ece: 683b ldr r3, [r7, #0]
8009ed0: 781b ldrb r3, [r3, #0]
8009ed2: 009b lsls r3, r3, #2
8009ed4: 441a add r2, r3
8009ed6: 8c3b ldrh r3, [r7, #32]
8009ed8: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009edc: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009ee0: f443 4340 orr.w r3, r3, #49152 @ 0xc000
8009ee4: f043 0380 orr.w r3, r3, #128 @ 0x80
8009ee8: b29b uxth r3, r3
8009eea: 8013 strh r3, [r2, #0]
if (ep->num == 0U)
8009eec: 683b ldr r3, [r7, #0]
8009eee: 781b ldrb r3, [r3, #0]
8009ef0: 2b00 cmp r3, #0
8009ef2: d124 bne.n 8009f3e <USB_ActivateEndpoint+0x39a>
{
/* Configure VALID status for EP0 */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
8009ef4: 687a ldr r2, [r7, #4]
8009ef6: 683b ldr r3, [r7, #0]
8009ef8: 781b ldrb r3, [r3, #0]
8009efa: 009b lsls r3, r3, #2
8009efc: 4413 add r3, r2
8009efe: 881b ldrh r3, [r3, #0]
8009f00: b29b uxth r3, r3
8009f02: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009f06: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f0a: 83bb strh r3, [r7, #28]
8009f0c: 8bbb ldrh r3, [r7, #28]
8009f0e: f483 5380 eor.w r3, r3, #4096 @ 0x1000
8009f12: 83bb strh r3, [r7, #28]
8009f14: 8bbb ldrh r3, [r7, #28]
8009f16: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8009f1a: 83bb strh r3, [r7, #28]
8009f1c: 687a ldr r2, [r7, #4]
8009f1e: 683b ldr r3, [r7, #0]
8009f20: 781b ldrb r3, [r3, #0]
8009f22: 009b lsls r3, r3, #2
8009f24: 441a add r2, r3
8009f26: 8bbb ldrh r3, [r7, #28]
8009f28: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009f2c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009f30: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009f34: f043 0380 orr.w r3, r3, #128 @ 0x80
8009f38: b29b uxth r3, r3
8009f3a: 8013 strh r3, [r2, #0]
8009f3c: e1ea b.n 800a314 <USB_ActivateEndpoint+0x770>
}
else
{
/* Configure NAK status for OUT Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_NAK);
8009f3e: 687a ldr r2, [r7, #4]
8009f40: 683b ldr r3, [r7, #0]
8009f42: 781b ldrb r3, [r3, #0]
8009f44: 009b lsls r3, r3, #2
8009f46: 4413 add r3, r2
8009f48: 881b ldrh r3, [r3, #0]
8009f4a: b29b uxth r3, r3
8009f4c: f423 4380 bic.w r3, r3, #16384 @ 0x4000
8009f50: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f54: 83fb strh r3, [r7, #30]
8009f56: 8bfb ldrh r3, [r7, #30]
8009f58: f483 5300 eor.w r3, r3, #8192 @ 0x2000
8009f5c: 83fb strh r3, [r7, #30]
8009f5e: 687a ldr r2, [r7, #4]
8009f60: 683b ldr r3, [r7, #0]
8009f62: 781b ldrb r3, [r3, #0]
8009f64: 009b lsls r3, r3, #2
8009f66: 441a add r2, r3
8009f68: 8bfb ldrh r3, [r7, #30]
8009f6a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009f6e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009f72: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009f76: f043 0380 orr.w r3, r3, #128 @ 0x80
8009f7a: b29b uxth r3, r3
8009f7c: 8013 strh r3, [r2, #0]
8009f7e: e1c9 b.n 800a314 <USB_ActivateEndpoint+0x770>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->type == EP_TYPE_BULK)
8009f80: 683b ldr r3, [r7, #0]
8009f82: 78db ldrb r3, [r3, #3]
8009f84: 2b02 cmp r3, #2
8009f86: d11e bne.n 8009fc6 <USB_ActivateEndpoint+0x422>
{
/* Set bulk endpoint as double buffered */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
8009f88: 687a ldr r2, [r7, #4]
8009f8a: 683b ldr r3, [r7, #0]
8009f8c: 781b ldrb r3, [r3, #0]
8009f8e: 009b lsls r3, r3, #2
8009f90: 4413 add r3, r2
8009f92: 881b ldrh r3, [r3, #0]
8009f94: b29b uxth r3, r3
8009f96: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
8009f9a: f023 0370 bic.w r3, r3, #112 @ 0x70
8009f9e: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
8009fa2: 687a ldr r2, [r7, #4]
8009fa4: 683b ldr r3, [r7, #0]
8009fa6: 781b ldrb r3, [r3, #0]
8009fa8: 009b lsls r3, r3, #2
8009faa: 441a add r2, r3
8009fac: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
8009fb0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009fb4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009fb8: f443 4301 orr.w r3, r3, #33024 @ 0x8100
8009fbc: f043 0380 orr.w r3, r3, #128 @ 0x80
8009fc0: b29b uxth r3, r3
8009fc2: 8013 strh r3, [r2, #0]
8009fc4: e01d b.n 800a002 <USB_ActivateEndpoint+0x45e>
}
else
{
/* Set the ISOC endpoint in double buffer mode */
PCD_CLEAR_EP_KIND(USBx, ep->num);
8009fc6: 687a ldr r2, [r7, #4]
8009fc8: 683b ldr r3, [r7, #0]
8009fca: 781b ldrb r3, [r3, #0]
8009fcc: 009b lsls r3, r3, #2
8009fce: 4413 add r3, r2
8009fd0: 881b ldrh r3, [r3, #0]
8009fd2: b29b uxth r3, r3
8009fd4: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
8009fd8: f023 0370 bic.w r3, r3, #112 @ 0x70
8009fdc: f8a7 3064 strh.w r3, [r7, #100] @ 0x64
8009fe0: 687a ldr r2, [r7, #4]
8009fe2: 683b ldr r3, [r7, #0]
8009fe4: 781b ldrb r3, [r3, #0]
8009fe6: 009b lsls r3, r3, #2
8009fe8: 441a add r2, r3
8009fea: f8b7 3064 ldrh.w r3, [r7, #100] @ 0x64
8009fee: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
8009ff2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
8009ff6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
8009ffa: f043 0380 orr.w r3, r3, #128 @ 0x80
8009ffe: b29b uxth r3, r3
800a000: 8013 strh r3, [r2, #0]
}
/* Set buffer address for double buffered mode */
PCD_SET_EP_DBUF_ADDR(USBx, ep->num, ep->pmaaddr0, ep->pmaaddr1);
800a002: 687b ldr r3, [r7, #4]
800a004: 65fb str r3, [r7, #92] @ 0x5c
800a006: 687b ldr r3, [r7, #4]
800a008: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a00c: b29b uxth r3, r3
800a00e: 461a mov r2, r3
800a010: 6dfb ldr r3, [r7, #92] @ 0x5c
800a012: 4413 add r3, r2
800a014: 65fb str r3, [r7, #92] @ 0x5c
800a016: 683b ldr r3, [r7, #0]
800a018: 781b ldrb r3, [r3, #0]
800a01a: 011a lsls r2, r3, #4
800a01c: 6dfb ldr r3, [r7, #92] @ 0x5c
800a01e: 4413 add r3, r2
800a020: f503 6380 add.w r3, r3, #1024 @ 0x400
800a024: 65bb str r3, [r7, #88] @ 0x58
800a026: 683b ldr r3, [r7, #0]
800a028: 891b ldrh r3, [r3, #8]
800a02a: 085b lsrs r3, r3, #1
800a02c: b29b uxth r3, r3
800a02e: 005b lsls r3, r3, #1
800a030: b29a uxth r2, r3
800a032: 6dbb ldr r3, [r7, #88] @ 0x58
800a034: 801a strh r2, [r3, #0]
800a036: 687b ldr r3, [r7, #4]
800a038: 657b str r3, [r7, #84] @ 0x54
800a03a: 687b ldr r3, [r7, #4]
800a03c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a040: b29b uxth r3, r3
800a042: 461a mov r2, r3
800a044: 6d7b ldr r3, [r7, #84] @ 0x54
800a046: 4413 add r3, r2
800a048: 657b str r3, [r7, #84] @ 0x54
800a04a: 683b ldr r3, [r7, #0]
800a04c: 781b ldrb r3, [r3, #0]
800a04e: 011a lsls r2, r3, #4
800a050: 6d7b ldr r3, [r7, #84] @ 0x54
800a052: 4413 add r3, r2
800a054: f503 6381 add.w r3, r3, #1032 @ 0x408
800a058: 653b str r3, [r7, #80] @ 0x50
800a05a: 683b ldr r3, [r7, #0]
800a05c: 895b ldrh r3, [r3, #10]
800a05e: 085b lsrs r3, r3, #1
800a060: b29b uxth r3, r3
800a062: 005b lsls r3, r3, #1
800a064: b29a uxth r2, r3
800a066: 6d3b ldr r3, [r7, #80] @ 0x50
800a068: 801a strh r2, [r3, #0]
if (ep->is_in == 0U)
800a06a: 683b ldr r3, [r7, #0]
800a06c: 785b ldrb r3, [r3, #1]
800a06e: 2b00 cmp r3, #0
800a070: f040 8093 bne.w 800a19a <USB_ActivateEndpoint+0x5f6>
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a074: 687a ldr r2, [r7, #4]
800a076: 683b ldr r3, [r7, #0]
800a078: 781b ldrb r3, [r3, #0]
800a07a: 009b lsls r3, r3, #2
800a07c: 4413 add r3, r2
800a07e: 881b ldrh r3, [r3, #0]
800a080: f8a7 3040 strh.w r3, [r7, #64] @ 0x40
800a084: f8b7 3040 ldrh.w r3, [r7, #64] @ 0x40
800a088: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a08c: 2b00 cmp r3, #0
800a08e: d01b beq.n 800a0c8 <USB_ActivateEndpoint+0x524>
800a090: 687a ldr r2, [r7, #4]
800a092: 683b ldr r3, [r7, #0]
800a094: 781b ldrb r3, [r3, #0]
800a096: 009b lsls r3, r3, #2
800a098: 4413 add r3, r2
800a09a: 881b ldrh r3, [r3, #0]
800a09c: b29b uxth r3, r3
800a09e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a0a2: f023 0370 bic.w r3, r3, #112 @ 0x70
800a0a6: 87fb strh r3, [r7, #62] @ 0x3e
800a0a8: 687a ldr r2, [r7, #4]
800a0aa: 683b ldr r3, [r7, #0]
800a0ac: 781b ldrb r3, [r3, #0]
800a0ae: 009b lsls r3, r3, #2
800a0b0: 441a add r2, r3
800a0b2: 8ffb ldrh r3, [r7, #62] @ 0x3e
800a0b4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a0b8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a0bc: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a0c0: f043 0380 orr.w r3, r3, #128 @ 0x80
800a0c4: b29b uxth r3, r3
800a0c6: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a0c8: 687a ldr r2, [r7, #4]
800a0ca: 683b ldr r3, [r7, #0]
800a0cc: 781b ldrb r3, [r3, #0]
800a0ce: 009b lsls r3, r3, #2
800a0d0: 4413 add r3, r2
800a0d2: 881b ldrh r3, [r3, #0]
800a0d4: 87bb strh r3, [r7, #60] @ 0x3c
800a0d6: 8fbb ldrh r3, [r7, #60] @ 0x3c
800a0d8: f003 0340 and.w r3, r3, #64 @ 0x40
800a0dc: 2b00 cmp r3, #0
800a0de: d01b beq.n 800a118 <USB_ActivateEndpoint+0x574>
800a0e0: 687a ldr r2, [r7, #4]
800a0e2: 683b ldr r3, [r7, #0]
800a0e4: 781b ldrb r3, [r3, #0]
800a0e6: 009b lsls r3, r3, #2
800a0e8: 4413 add r3, r2
800a0ea: 881b ldrh r3, [r3, #0]
800a0ec: b29b uxth r3, r3
800a0ee: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a0f2: f023 0370 bic.w r3, r3, #112 @ 0x70
800a0f6: 877b strh r3, [r7, #58] @ 0x3a
800a0f8: 687a ldr r2, [r7, #4]
800a0fa: 683b ldr r3, [r7, #0]
800a0fc: 781b ldrb r3, [r3, #0]
800a0fe: 009b lsls r3, r3, #2
800a100: 441a add r2, r3
800a102: 8f7b ldrh r3, [r7, #58] @ 0x3a
800a104: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a108: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a10c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a110: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a114: b29b uxth r3, r3
800a116: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800a118: 687a ldr r2, [r7, #4]
800a11a: 683b ldr r3, [r7, #0]
800a11c: 781b ldrb r3, [r3, #0]
800a11e: 009b lsls r3, r3, #2
800a120: 4413 add r3, r2
800a122: 881b ldrh r3, [r3, #0]
800a124: b29b uxth r3, r3
800a126: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a12a: f023 0370 bic.w r3, r3, #112 @ 0x70
800a12e: 873b strh r3, [r7, #56] @ 0x38
800a130: 8f3b ldrh r3, [r7, #56] @ 0x38
800a132: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800a136: 873b strh r3, [r7, #56] @ 0x38
800a138: 8f3b ldrh r3, [r7, #56] @ 0x38
800a13a: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800a13e: 873b strh r3, [r7, #56] @ 0x38
800a140: 687a ldr r2, [r7, #4]
800a142: 683b ldr r3, [r7, #0]
800a144: 781b ldrb r3, [r3, #0]
800a146: 009b lsls r3, r3, #2
800a148: 441a add r2, r3
800a14a: 8f3b ldrh r3, [r7, #56] @ 0x38
800a14c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a150: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a154: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a158: f043 0380 orr.w r3, r3, #128 @ 0x80
800a15c: b29b uxth r3, r3
800a15e: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a160: 687a ldr r2, [r7, #4]
800a162: 683b ldr r3, [r7, #0]
800a164: 781b ldrb r3, [r3, #0]
800a166: 009b lsls r3, r3, #2
800a168: 4413 add r3, r2
800a16a: 881b ldrh r3, [r3, #0]
800a16c: b29b uxth r3, r3
800a16e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a172: f023 0340 bic.w r3, r3, #64 @ 0x40
800a176: 86fb strh r3, [r7, #54] @ 0x36
800a178: 687a ldr r2, [r7, #4]
800a17a: 683b ldr r3, [r7, #0]
800a17c: 781b ldrb r3, [r3, #0]
800a17e: 009b lsls r3, r3, #2
800a180: 441a add r2, r3
800a182: 8efb ldrh r3, [r7, #54] @ 0x36
800a184: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a188: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a18c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a190: f043 0380 orr.w r3, r3, #128 @ 0x80
800a194: b29b uxth r3, r3
800a196: 8013 strh r3, [r2, #0]
800a198: e0bc b.n 800a314 <USB_ActivateEndpoint+0x770>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT */
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a19a: 687a ldr r2, [r7, #4]
800a19c: 683b ldr r3, [r7, #0]
800a19e: 781b ldrb r3, [r3, #0]
800a1a0: 009b lsls r3, r3, #2
800a1a2: 4413 add r3, r2
800a1a4: 881b ldrh r3, [r3, #0]
800a1a6: f8a7 304e strh.w r3, [r7, #78] @ 0x4e
800a1aa: f8b7 304e ldrh.w r3, [r7, #78] @ 0x4e
800a1ae: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a1b2: 2b00 cmp r3, #0
800a1b4: d01d beq.n 800a1f2 <USB_ActivateEndpoint+0x64e>
800a1b6: 687a ldr r2, [r7, #4]
800a1b8: 683b ldr r3, [r7, #0]
800a1ba: 781b ldrb r3, [r3, #0]
800a1bc: 009b lsls r3, r3, #2
800a1be: 4413 add r3, r2
800a1c0: 881b ldrh r3, [r3, #0]
800a1c2: b29b uxth r3, r3
800a1c4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a1c8: f023 0370 bic.w r3, r3, #112 @ 0x70
800a1cc: f8a7 304c strh.w r3, [r7, #76] @ 0x4c
800a1d0: 687a ldr r2, [r7, #4]
800a1d2: 683b ldr r3, [r7, #0]
800a1d4: 781b ldrb r3, [r3, #0]
800a1d6: 009b lsls r3, r3, #2
800a1d8: 441a add r2, r3
800a1da: f8b7 304c ldrh.w r3, [r7, #76] @ 0x4c
800a1de: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a1e2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a1e6: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a1ea: f043 0380 orr.w r3, r3, #128 @ 0x80
800a1ee: b29b uxth r3, r3
800a1f0: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a1f2: 687a ldr r2, [r7, #4]
800a1f4: 683b ldr r3, [r7, #0]
800a1f6: 781b ldrb r3, [r3, #0]
800a1f8: 009b lsls r3, r3, #2
800a1fa: 4413 add r3, r2
800a1fc: 881b ldrh r3, [r3, #0]
800a1fe: f8a7 304a strh.w r3, [r7, #74] @ 0x4a
800a202: f8b7 304a ldrh.w r3, [r7, #74] @ 0x4a
800a206: f003 0340 and.w r3, r3, #64 @ 0x40
800a20a: 2b00 cmp r3, #0
800a20c: d01d beq.n 800a24a <USB_ActivateEndpoint+0x6a6>
800a20e: 687a ldr r2, [r7, #4]
800a210: 683b ldr r3, [r7, #0]
800a212: 781b ldrb r3, [r3, #0]
800a214: 009b lsls r3, r3, #2
800a216: 4413 add r3, r2
800a218: 881b ldrh r3, [r3, #0]
800a21a: b29b uxth r3, r3
800a21c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a220: f023 0370 bic.w r3, r3, #112 @ 0x70
800a224: f8a7 3048 strh.w r3, [r7, #72] @ 0x48
800a228: 687a ldr r2, [r7, #4]
800a22a: 683b ldr r3, [r7, #0]
800a22c: 781b ldrb r3, [r3, #0]
800a22e: 009b lsls r3, r3, #2
800a230: 441a add r2, r3
800a232: f8b7 3048 ldrh.w r3, [r7, #72] @ 0x48
800a236: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a23a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a23e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a242: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a246: b29b uxth r3, r3
800a248: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800a24a: 683b ldr r3, [r7, #0]
800a24c: 78db ldrb r3, [r3, #3]
800a24e: 2b01 cmp r3, #1
800a250: d024 beq.n 800a29c <USB_ActivateEndpoint+0x6f8>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800a252: 687a ldr r2, [r7, #4]
800a254: 683b ldr r3, [r7, #0]
800a256: 781b ldrb r3, [r3, #0]
800a258: 009b lsls r3, r3, #2
800a25a: 4413 add r3, r2
800a25c: 881b ldrh r3, [r3, #0]
800a25e: b29b uxth r3, r3
800a260: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a264: f023 0340 bic.w r3, r3, #64 @ 0x40
800a268: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800a26c: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800a270: f083 0320 eor.w r3, r3, #32
800a274: f8a7 3044 strh.w r3, [r7, #68] @ 0x44
800a278: 687a ldr r2, [r7, #4]
800a27a: 683b ldr r3, [r7, #0]
800a27c: 781b ldrb r3, [r3, #0]
800a27e: 009b lsls r3, r3, #2
800a280: 441a add r2, r3
800a282: f8b7 3044 ldrh.w r3, [r7, #68] @ 0x44
800a286: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a28a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a28e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a292: f043 0380 orr.w r3, r3, #128 @ 0x80
800a296: b29b uxth r3, r3
800a298: 8013 strh r3, [r2, #0]
800a29a: e01d b.n 800a2d8 <USB_ActivateEndpoint+0x734>
}
else
{
/* Configure TX Endpoint to disabled state */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a29c: 687a ldr r2, [r7, #4]
800a29e: 683b ldr r3, [r7, #0]
800a2a0: 781b ldrb r3, [r3, #0]
800a2a2: 009b lsls r3, r3, #2
800a2a4: 4413 add r3, r2
800a2a6: 881b ldrh r3, [r3, #0]
800a2a8: b29b uxth r3, r3
800a2aa: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a2ae: f023 0340 bic.w r3, r3, #64 @ 0x40
800a2b2: f8a7 3046 strh.w r3, [r7, #70] @ 0x46
800a2b6: 687a ldr r2, [r7, #4]
800a2b8: 683b ldr r3, [r7, #0]
800a2ba: 781b ldrb r3, [r3, #0]
800a2bc: 009b lsls r3, r3, #2
800a2be: 441a add r2, r3
800a2c0: f8b7 3046 ldrh.w r3, [r7, #70] @ 0x46
800a2c4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a2c8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a2cc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a2d0: f043 0380 orr.w r3, r3, #128 @ 0x80
800a2d4: b29b uxth r3, r3
800a2d6: 8013 strh r3, [r2, #0]
}
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a2d8: 687a ldr r2, [r7, #4]
800a2da: 683b ldr r3, [r7, #0]
800a2dc: 781b ldrb r3, [r3, #0]
800a2de: 009b lsls r3, r3, #2
800a2e0: 4413 add r3, r2
800a2e2: 881b ldrh r3, [r3, #0]
800a2e4: b29b uxth r3, r3
800a2e6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a2ea: f023 0370 bic.w r3, r3, #112 @ 0x70
800a2ee: f8a7 3042 strh.w r3, [r7, #66] @ 0x42
800a2f2: 687a ldr r2, [r7, #4]
800a2f4: 683b ldr r3, [r7, #0]
800a2f6: 781b ldrb r3, [r3, #0]
800a2f8: 009b lsls r3, r3, #2
800a2fa: 441a add r2, r3
800a2fc: f8b7 3042 ldrh.w r3, [r7, #66] @ 0x42
800a300: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a304: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a308: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a30c: f043 0380 orr.w r3, r3, #128 @ 0x80
800a310: b29b uxth r3, r3
800a312: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return ret;
800a314: f897 306f ldrb.w r3, [r7, #111] @ 0x6f
}
800a318: 4618 mov r0, r3
800a31a: 3774 adds r7, #116 @ 0x74
800a31c: 46bd mov sp, r7
800a31e: bc80 pop {r7}
800a320: 4770 bx lr
800a322: bf00 nop
0800a324 <USB_DeactivateEndpoint>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_DeactivateEndpoint(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a324: b480 push {r7}
800a326: b08d sub sp, #52 @ 0x34
800a328: af00 add r7, sp, #0
800a32a: 6078 str r0, [r7, #4]
800a32c: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800a32e: 683b ldr r3, [r7, #0]
800a330: 7b1b ldrb r3, [r3, #12]
800a332: 2b00 cmp r3, #0
800a334: f040 808e bne.w 800a454 <USB_DeactivateEndpoint+0x130>
{
if (ep->is_in != 0U)
800a338: 683b ldr r3, [r7, #0]
800a33a: 785b ldrb r3, [r3, #1]
800a33c: 2b00 cmp r3, #0
800a33e: d044 beq.n 800a3ca <USB_DeactivateEndpoint+0xa6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a340: 687a ldr r2, [r7, #4]
800a342: 683b ldr r3, [r7, #0]
800a344: 781b ldrb r3, [r3, #0]
800a346: 009b lsls r3, r3, #2
800a348: 4413 add r3, r2
800a34a: 881b ldrh r3, [r3, #0]
800a34c: 81bb strh r3, [r7, #12]
800a34e: 89bb ldrh r3, [r7, #12]
800a350: f003 0340 and.w r3, r3, #64 @ 0x40
800a354: 2b00 cmp r3, #0
800a356: d01b beq.n 800a390 <USB_DeactivateEndpoint+0x6c>
800a358: 687a ldr r2, [r7, #4]
800a35a: 683b ldr r3, [r7, #0]
800a35c: 781b ldrb r3, [r3, #0]
800a35e: 009b lsls r3, r3, #2
800a360: 4413 add r3, r2
800a362: 881b ldrh r3, [r3, #0]
800a364: b29b uxth r3, r3
800a366: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a36a: f023 0370 bic.w r3, r3, #112 @ 0x70
800a36e: 817b strh r3, [r7, #10]
800a370: 687a ldr r2, [r7, #4]
800a372: 683b ldr r3, [r7, #0]
800a374: 781b ldrb r3, [r3, #0]
800a376: 009b lsls r3, r3, #2
800a378: 441a add r2, r3
800a37a: 897b ldrh r3, [r7, #10]
800a37c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a380: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a384: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a388: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a38c: b29b uxth r3, r3
800a38e: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a390: 687a ldr r2, [r7, #4]
800a392: 683b ldr r3, [r7, #0]
800a394: 781b ldrb r3, [r3, #0]
800a396: 009b lsls r3, r3, #2
800a398: 4413 add r3, r2
800a39a: 881b ldrh r3, [r3, #0]
800a39c: b29b uxth r3, r3
800a39e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a3a2: f023 0340 bic.w r3, r3, #64 @ 0x40
800a3a6: 813b strh r3, [r7, #8]
800a3a8: 687a ldr r2, [r7, #4]
800a3aa: 683b ldr r3, [r7, #0]
800a3ac: 781b ldrb r3, [r3, #0]
800a3ae: 009b lsls r3, r3, #2
800a3b0: 441a add r2, r3
800a3b2: 893b ldrh r3, [r7, #8]
800a3b4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a3b8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a3bc: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a3c0: f043 0380 orr.w r3, r3, #128 @ 0x80
800a3c4: b29b uxth r3, r3
800a3c6: 8013 strh r3, [r2, #0]
800a3c8: e192 b.n 800a6f0 <USB_DeactivateEndpoint+0x3cc>
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a3ca: 687a ldr r2, [r7, #4]
800a3cc: 683b ldr r3, [r7, #0]
800a3ce: 781b ldrb r3, [r3, #0]
800a3d0: 009b lsls r3, r3, #2
800a3d2: 4413 add r3, r2
800a3d4: 881b ldrh r3, [r3, #0]
800a3d6: 827b strh r3, [r7, #18]
800a3d8: 8a7b ldrh r3, [r7, #18]
800a3da: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a3de: 2b00 cmp r3, #0
800a3e0: d01b beq.n 800a41a <USB_DeactivateEndpoint+0xf6>
800a3e2: 687a ldr r2, [r7, #4]
800a3e4: 683b ldr r3, [r7, #0]
800a3e6: 781b ldrb r3, [r3, #0]
800a3e8: 009b lsls r3, r3, #2
800a3ea: 4413 add r3, r2
800a3ec: 881b ldrh r3, [r3, #0]
800a3ee: b29b uxth r3, r3
800a3f0: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a3f4: f023 0370 bic.w r3, r3, #112 @ 0x70
800a3f8: 823b strh r3, [r7, #16]
800a3fa: 687a ldr r2, [r7, #4]
800a3fc: 683b ldr r3, [r7, #0]
800a3fe: 781b ldrb r3, [r3, #0]
800a400: 009b lsls r3, r3, #2
800a402: 441a add r2, r3
800a404: 8a3b ldrh r3, [r7, #16]
800a406: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a40a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a40e: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a412: f043 0380 orr.w r3, r3, #128 @ 0x80
800a416: b29b uxth r3, r3
800a418: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a41a: 687a ldr r2, [r7, #4]
800a41c: 683b ldr r3, [r7, #0]
800a41e: 781b ldrb r3, [r3, #0]
800a420: 009b lsls r3, r3, #2
800a422: 4413 add r3, r2
800a424: 881b ldrh r3, [r3, #0]
800a426: b29b uxth r3, r3
800a428: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a42c: f023 0370 bic.w r3, r3, #112 @ 0x70
800a430: 81fb strh r3, [r7, #14]
800a432: 687a ldr r2, [r7, #4]
800a434: 683b ldr r3, [r7, #0]
800a436: 781b ldrb r3, [r3, #0]
800a438: 009b lsls r3, r3, #2
800a43a: 441a add r2, r3
800a43c: 89fb ldrh r3, [r7, #14]
800a43e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a442: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a446: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a44a: f043 0380 orr.w r3, r3, #128 @ 0x80
800a44e: b29b uxth r3, r3
800a450: 8013 strh r3, [r2, #0]
800a452: e14d b.n 800a6f0 <USB_DeactivateEndpoint+0x3cc>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
/* Double Buffer */
else
{
if (ep->is_in == 0U)
800a454: 683b ldr r3, [r7, #0]
800a456: 785b ldrb r3, [r3, #1]
800a458: 2b00 cmp r3, #0
800a45a: f040 80a5 bne.w 800a5a8 <USB_DeactivateEndpoint+0x284>
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a45e: 687a ldr r2, [r7, #4]
800a460: 683b ldr r3, [r7, #0]
800a462: 781b ldrb r3, [r3, #0]
800a464: 009b lsls r3, r3, #2
800a466: 4413 add r3, r2
800a468: 881b ldrh r3, [r3, #0]
800a46a: 843b strh r3, [r7, #32]
800a46c: 8c3b ldrh r3, [r7, #32]
800a46e: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a472: 2b00 cmp r3, #0
800a474: d01b beq.n 800a4ae <USB_DeactivateEndpoint+0x18a>
800a476: 687a ldr r2, [r7, #4]
800a478: 683b ldr r3, [r7, #0]
800a47a: 781b ldrb r3, [r3, #0]
800a47c: 009b lsls r3, r3, #2
800a47e: 4413 add r3, r2
800a480: 881b ldrh r3, [r3, #0]
800a482: b29b uxth r3, r3
800a484: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a488: f023 0370 bic.w r3, r3, #112 @ 0x70
800a48c: 83fb strh r3, [r7, #30]
800a48e: 687a ldr r2, [r7, #4]
800a490: 683b ldr r3, [r7, #0]
800a492: 781b ldrb r3, [r3, #0]
800a494: 009b lsls r3, r3, #2
800a496: 441a add r2, r3
800a498: 8bfb ldrh r3, [r7, #30]
800a49a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a49e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a4a2: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a4a6: f043 0380 orr.w r3, r3, #128 @ 0x80
800a4aa: b29b uxth r3, r3
800a4ac: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a4ae: 687a ldr r2, [r7, #4]
800a4b0: 683b ldr r3, [r7, #0]
800a4b2: 781b ldrb r3, [r3, #0]
800a4b4: 009b lsls r3, r3, #2
800a4b6: 4413 add r3, r2
800a4b8: 881b ldrh r3, [r3, #0]
800a4ba: 83bb strh r3, [r7, #28]
800a4bc: 8bbb ldrh r3, [r7, #28]
800a4be: f003 0340 and.w r3, r3, #64 @ 0x40
800a4c2: 2b00 cmp r3, #0
800a4c4: d01b beq.n 800a4fe <USB_DeactivateEndpoint+0x1da>
800a4c6: 687a ldr r2, [r7, #4]
800a4c8: 683b ldr r3, [r7, #0]
800a4ca: 781b ldrb r3, [r3, #0]
800a4cc: 009b lsls r3, r3, #2
800a4ce: 4413 add r3, r2
800a4d0: 881b ldrh r3, [r3, #0]
800a4d2: b29b uxth r3, r3
800a4d4: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a4d8: f023 0370 bic.w r3, r3, #112 @ 0x70
800a4dc: 837b strh r3, [r7, #26]
800a4de: 687a ldr r2, [r7, #4]
800a4e0: 683b ldr r3, [r7, #0]
800a4e2: 781b ldrb r3, [r3, #0]
800a4e4: 009b lsls r3, r3, #2
800a4e6: 441a add r2, r3
800a4e8: 8b7b ldrh r3, [r7, #26]
800a4ea: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a4ee: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a4f2: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a4f6: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a4fa: b29b uxth r3, r3
800a4fc: 8013 strh r3, [r2, #0]
/* Reset value of the data toggle bits for the endpoint out*/
PCD_TX_DTOG(USBx, ep->num);
800a4fe: 687a ldr r2, [r7, #4]
800a500: 683b ldr r3, [r7, #0]
800a502: 781b ldrb r3, [r3, #0]
800a504: 009b lsls r3, r3, #2
800a506: 4413 add r3, r2
800a508: 881b ldrh r3, [r3, #0]
800a50a: b29b uxth r3, r3
800a50c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a510: f023 0370 bic.w r3, r3, #112 @ 0x70
800a514: 833b strh r3, [r7, #24]
800a516: 687a ldr r2, [r7, #4]
800a518: 683b ldr r3, [r7, #0]
800a51a: 781b ldrb r3, [r3, #0]
800a51c: 009b lsls r3, r3, #2
800a51e: 441a add r2, r3
800a520: 8b3b ldrh r3, [r7, #24]
800a522: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a526: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a52a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a52e: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a532: b29b uxth r3, r3
800a534: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a536: 687a ldr r2, [r7, #4]
800a538: 683b ldr r3, [r7, #0]
800a53a: 781b ldrb r3, [r3, #0]
800a53c: 009b lsls r3, r3, #2
800a53e: 4413 add r3, r2
800a540: 881b ldrh r3, [r3, #0]
800a542: b29b uxth r3, r3
800a544: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a548: f023 0370 bic.w r3, r3, #112 @ 0x70
800a54c: 82fb strh r3, [r7, #22]
800a54e: 687a ldr r2, [r7, #4]
800a550: 683b ldr r3, [r7, #0]
800a552: 781b ldrb r3, [r3, #0]
800a554: 009b lsls r3, r3, #2
800a556: 441a add r2, r3
800a558: 8afb ldrh r3, [r7, #22]
800a55a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a55e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a562: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a566: f043 0380 orr.w r3, r3, #128 @ 0x80
800a56a: b29b uxth r3, r3
800a56c: 8013 strh r3, [r2, #0]
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a56e: 687a ldr r2, [r7, #4]
800a570: 683b ldr r3, [r7, #0]
800a572: 781b ldrb r3, [r3, #0]
800a574: 009b lsls r3, r3, #2
800a576: 4413 add r3, r2
800a578: 881b ldrh r3, [r3, #0]
800a57a: b29b uxth r3, r3
800a57c: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a580: f023 0340 bic.w r3, r3, #64 @ 0x40
800a584: 82bb strh r3, [r7, #20]
800a586: 687a ldr r2, [r7, #4]
800a588: 683b ldr r3, [r7, #0]
800a58a: 781b ldrb r3, [r3, #0]
800a58c: 009b lsls r3, r3, #2
800a58e: 441a add r2, r3
800a590: 8abb ldrh r3, [r7, #20]
800a592: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a596: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a59a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a59e: f043 0380 orr.w r3, r3, #128 @ 0x80
800a5a2: b29b uxth r3, r3
800a5a4: 8013 strh r3, [r2, #0]
800a5a6: e0a3 b.n 800a6f0 <USB_DeactivateEndpoint+0x3cc>
}
else
{
/* Clear the data toggle bits for the endpoint IN/OUT*/
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800a5a8: 687a ldr r2, [r7, #4]
800a5aa: 683b ldr r3, [r7, #0]
800a5ac: 781b ldrb r3, [r3, #0]
800a5ae: 009b lsls r3, r3, #2
800a5b0: 4413 add r3, r2
800a5b2: 881b ldrh r3, [r3, #0]
800a5b4: 85fb strh r3, [r7, #46] @ 0x2e
800a5b6: 8dfb ldrh r3, [r7, #46] @ 0x2e
800a5b8: f403 4380 and.w r3, r3, #16384 @ 0x4000
800a5bc: 2b00 cmp r3, #0
800a5be: d01b beq.n 800a5f8 <USB_DeactivateEndpoint+0x2d4>
800a5c0: 687a ldr r2, [r7, #4]
800a5c2: 683b ldr r3, [r7, #0]
800a5c4: 781b ldrb r3, [r3, #0]
800a5c6: 009b lsls r3, r3, #2
800a5c8: 4413 add r3, r2
800a5ca: 881b ldrh r3, [r3, #0]
800a5cc: b29b uxth r3, r3
800a5ce: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a5d2: f023 0370 bic.w r3, r3, #112 @ 0x70
800a5d6: 85bb strh r3, [r7, #44] @ 0x2c
800a5d8: 687a ldr r2, [r7, #4]
800a5da: 683b ldr r3, [r7, #0]
800a5dc: 781b ldrb r3, [r3, #0]
800a5de: 009b lsls r3, r3, #2
800a5e0: 441a add r2, r3
800a5e2: 8dbb ldrh r3, [r7, #44] @ 0x2c
800a5e4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a5e8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a5ec: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a5f0: f043 0380 orr.w r3, r3, #128 @ 0x80
800a5f4: b29b uxth r3, r3
800a5f6: 8013 strh r3, [r2, #0]
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800a5f8: 687a ldr r2, [r7, #4]
800a5fa: 683b ldr r3, [r7, #0]
800a5fc: 781b ldrb r3, [r3, #0]
800a5fe: 009b lsls r3, r3, #2
800a600: 4413 add r3, r2
800a602: 881b ldrh r3, [r3, #0]
800a604: 857b strh r3, [r7, #42] @ 0x2a
800a606: 8d7b ldrh r3, [r7, #42] @ 0x2a
800a608: f003 0340 and.w r3, r3, #64 @ 0x40
800a60c: 2b00 cmp r3, #0
800a60e: d01b beq.n 800a648 <USB_DeactivateEndpoint+0x324>
800a610: 687a ldr r2, [r7, #4]
800a612: 683b ldr r3, [r7, #0]
800a614: 781b ldrb r3, [r3, #0]
800a616: 009b lsls r3, r3, #2
800a618: 4413 add r3, r2
800a61a: 881b ldrh r3, [r3, #0]
800a61c: b29b uxth r3, r3
800a61e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a622: f023 0370 bic.w r3, r3, #112 @ 0x70
800a626: 853b strh r3, [r7, #40] @ 0x28
800a628: 687a ldr r2, [r7, #4]
800a62a: 683b ldr r3, [r7, #0]
800a62c: 781b ldrb r3, [r3, #0]
800a62e: 009b lsls r3, r3, #2
800a630: 441a add r2, r3
800a632: 8d3b ldrh r3, [r7, #40] @ 0x28
800a634: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a638: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a63c: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a640: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800a644: b29b uxth r3, r3
800a646: 8013 strh r3, [r2, #0]
PCD_RX_DTOG(USBx, ep->num);
800a648: 687a ldr r2, [r7, #4]
800a64a: 683b ldr r3, [r7, #0]
800a64c: 781b ldrb r3, [r3, #0]
800a64e: 009b lsls r3, r3, #2
800a650: 4413 add r3, r2
800a652: 881b ldrh r3, [r3, #0]
800a654: b29b uxth r3, r3
800a656: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a65a: f023 0370 bic.w r3, r3, #112 @ 0x70
800a65e: 84fb strh r3, [r7, #38] @ 0x26
800a660: 687a ldr r2, [r7, #4]
800a662: 683b ldr r3, [r7, #0]
800a664: 781b ldrb r3, [r3, #0]
800a666: 009b lsls r3, r3, #2
800a668: 441a add r2, r3
800a66a: 8cfb ldrh r3, [r7, #38] @ 0x26
800a66c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a670: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a674: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800a678: f043 0380 orr.w r3, r3, #128 @ 0x80
800a67c: b29b uxth r3, r3
800a67e: 8013 strh r3, [r2, #0]
/* Configure DISABLE status for the Endpoint*/
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_DIS);
800a680: 687a ldr r2, [r7, #4]
800a682: 683b ldr r3, [r7, #0]
800a684: 781b ldrb r3, [r3, #0]
800a686: 009b lsls r3, r3, #2
800a688: 4413 add r3, r2
800a68a: 881b ldrh r3, [r3, #0]
800a68c: b29b uxth r3, r3
800a68e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a692: f023 0340 bic.w r3, r3, #64 @ 0x40
800a696: 84bb strh r3, [r7, #36] @ 0x24
800a698: 687a ldr r2, [r7, #4]
800a69a: 683b ldr r3, [r7, #0]
800a69c: 781b ldrb r3, [r3, #0]
800a69e: 009b lsls r3, r3, #2
800a6a0: 441a add r2, r3
800a6a2: 8cbb ldrh r3, [r7, #36] @ 0x24
800a6a4: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a6a8: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a6ac: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a6b0: f043 0380 orr.w r3, r3, #128 @ 0x80
800a6b4: b29b uxth r3, r3
800a6b6: 8013 strh r3, [r2, #0]
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_DIS);
800a6b8: 687a ldr r2, [r7, #4]
800a6ba: 683b ldr r3, [r7, #0]
800a6bc: 781b ldrb r3, [r3, #0]
800a6be: 009b lsls r3, r3, #2
800a6c0: 4413 add r3, r2
800a6c2: 881b ldrh r3, [r3, #0]
800a6c4: b29b uxth r3, r3
800a6c6: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800a6ca: f023 0370 bic.w r3, r3, #112 @ 0x70
800a6ce: 847b strh r3, [r7, #34] @ 0x22
800a6d0: 687a ldr r2, [r7, #4]
800a6d2: 683b ldr r3, [r7, #0]
800a6d4: 781b ldrb r3, [r3, #0]
800a6d6: 009b lsls r3, r3, #2
800a6d8: 441a add r2, r3
800a6da: 8c7b ldrh r3, [r7, #34] @ 0x22
800a6dc: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a6e0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a6e4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800a6e8: f043 0380 orr.w r3, r3, #128 @ 0x80
800a6ec: b29b uxth r3, r3
800a6ee: 8013 strh r3, [r2, #0]
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
return HAL_OK;
800a6f0: 2300 movs r3, #0
}
800a6f2: 4618 mov r0, r3
800a6f4: 3734 adds r7, #52 @ 0x34
800a6f6: 46bd mov sp, r7
800a6f8: bc80 pop {r7}
800a6fa: 4770 bx lr
0800a6fc <USB_EPStartXfer>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPStartXfer(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800a6fc: b580 push {r7, lr}
800a6fe: b0c2 sub sp, #264 @ 0x108
800a700: af00 add r7, sp, #0
800a702: f507 7384 add.w r3, r7, #264 @ 0x108
800a706: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a70a: 6018 str r0, [r3, #0]
800a70c: f507 7384 add.w r3, r7, #264 @ 0x108
800a710: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a714: 6019 str r1, [r3, #0]
uint16_t pmabuffer;
uint16_t wEPVal;
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
/* IN endpoint */
if (ep->is_in == 1U)
800a716: f507 7384 add.w r3, r7, #264 @ 0x108
800a71a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a71e: 681b ldr r3, [r3, #0]
800a720: 785b ldrb r3, [r3, #1]
800a722: 2b01 cmp r3, #1
800a724: f040 86b7 bne.w 800b496 <USB_EPStartXfer+0xd9a>
{
/*Multi packet transfer*/
if (ep->xfer_len > ep->maxpacket)
800a728: f507 7384 add.w r3, r7, #264 @ 0x108
800a72c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a730: 681b ldr r3, [r3, #0]
800a732: 699a ldr r2, [r3, #24]
800a734: f507 7384 add.w r3, r7, #264 @ 0x108
800a738: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a73c: 681b ldr r3, [r3, #0]
800a73e: 691b ldr r3, [r3, #16]
800a740: 429a cmp r2, r3
800a742: d908 bls.n 800a756 <USB_EPStartXfer+0x5a>
{
len = ep->maxpacket;
800a744: f507 7384 add.w r3, r7, #264 @ 0x108
800a748: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a74c: 681b ldr r3, [r3, #0]
800a74e: 691b ldr r3, [r3, #16]
800a750: f8c7 3104 str.w r3, [r7, #260] @ 0x104
800a754: e007 b.n 800a766 <USB_EPStartXfer+0x6a>
}
else
{
len = ep->xfer_len;
800a756: f507 7384 add.w r3, r7, #264 @ 0x108
800a75a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a75e: 681b ldr r3, [r3, #0]
800a760: 699b ldr r3, [r3, #24]
800a762: f8c7 3104 str.w r3, [r7, #260] @ 0x104
}
/* configure and validate Tx endpoint */
if (ep->doublebuffer == 0U)
800a766: f507 7384 add.w r3, r7, #264 @ 0x108
800a76a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a76e: 681b ldr r3, [r3, #0]
800a770: 7b1b ldrb r3, [r3, #12]
800a772: 2b00 cmp r3, #0
800a774: d13a bne.n 800a7ec <USB_EPStartXfer+0xf0>
{
USB_WritePMA(USBx, ep->xfer_buff, ep->pmaadress, (uint16_t)len);
800a776: f507 7384 add.w r3, r7, #264 @ 0x108
800a77a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a77e: 681b ldr r3, [r3, #0]
800a780: 6959 ldr r1, [r3, #20]
800a782: f507 7384 add.w r3, r7, #264 @ 0x108
800a786: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a78a: 681b ldr r3, [r3, #0]
800a78c: 88da ldrh r2, [r3, #6]
800a78e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a792: b29b uxth r3, r3
800a794: f507 7084 add.w r0, r7, #264 @ 0x108
800a798: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800a79c: 6800 ldr r0, [r0, #0]
800a79e: f001 fc9c bl 800c0da <USB_WritePMA>
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800a7a2: f507 7384 add.w r3, r7, #264 @ 0x108
800a7a6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a7aa: 681b ldr r3, [r3, #0]
800a7ac: 613b str r3, [r7, #16]
800a7ae: f507 7384 add.w r3, r7, #264 @ 0x108
800a7b2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a7b6: 681b ldr r3, [r3, #0]
800a7b8: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a7bc: b29b uxth r3, r3
800a7be: 461a mov r2, r3
800a7c0: 693b ldr r3, [r7, #16]
800a7c2: 4413 add r3, r2
800a7c4: 613b str r3, [r7, #16]
800a7c6: f507 7384 add.w r3, r7, #264 @ 0x108
800a7ca: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7ce: 681b ldr r3, [r3, #0]
800a7d0: 781b ldrb r3, [r3, #0]
800a7d2: 011a lsls r2, r3, #4
800a7d4: 693b ldr r3, [r7, #16]
800a7d6: 4413 add r3, r2
800a7d8: f203 4304 addw r3, r3, #1028 @ 0x404
800a7dc: 60fb str r3, [r7, #12]
800a7de: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a7e2: b29a uxth r2, r3
800a7e4: 68fb ldr r3, [r7, #12]
800a7e6: 801a strh r2, [r3, #0]
800a7e8: f000 be1f b.w 800b42a <USB_EPStartXfer+0xd2e>
}
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* double buffer bulk management */
if (ep->type == EP_TYPE_BULK)
800a7ec: f507 7384 add.w r3, r7, #264 @ 0x108
800a7f0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a7f4: 681b ldr r3, [r3, #0]
800a7f6: 78db ldrb r3, [r3, #3]
800a7f8: 2b02 cmp r3, #2
800a7fa: f040 8462 bne.w 800b0c2 <USB_EPStartXfer+0x9c6>
{
if (ep->xfer_len_db > ep->maxpacket)
800a7fe: f507 7384 add.w r3, r7, #264 @ 0x108
800a802: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a806: 681b ldr r3, [r3, #0]
800a808: 6a1a ldr r2, [r3, #32]
800a80a: f507 7384 add.w r3, r7, #264 @ 0x108
800a80e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a812: 681b ldr r3, [r3, #0]
800a814: 691b ldr r3, [r3, #16]
800a816: 429a cmp r2, r3
800a818: f240 83df bls.w 800afda <USB_EPStartXfer+0x8de>
{
/* enable double buffer */
PCD_SET_BULK_EP_DBUF(USBx, ep->num);
800a81c: f507 7384 add.w r3, r7, #264 @ 0x108
800a820: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a824: 681a ldr r2, [r3, #0]
800a826: f507 7384 add.w r3, r7, #264 @ 0x108
800a82a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a82e: 681b ldr r3, [r3, #0]
800a830: 781b ldrb r3, [r3, #0]
800a832: 009b lsls r3, r3, #2
800a834: 4413 add r3, r2
800a836: 881b ldrh r3, [r3, #0]
800a838: b29b uxth r3, r3
800a83a: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800a83e: f023 0370 bic.w r3, r3, #112 @ 0x70
800a842: f8a7 3056 strh.w r3, [r7, #86] @ 0x56
800a846: f507 7384 add.w r3, r7, #264 @ 0x108
800a84a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a84e: 681a ldr r2, [r3, #0]
800a850: f507 7384 add.w r3, r7, #264 @ 0x108
800a854: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a858: 681b ldr r3, [r3, #0]
800a85a: 781b ldrb r3, [r3, #0]
800a85c: 009b lsls r3, r3, #2
800a85e: 441a add r2, r3
800a860: f8b7 3056 ldrh.w r3, [r7, #86] @ 0x56
800a864: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800a868: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800a86c: f443 4301 orr.w r3, r3, #33024 @ 0x8100
800a870: f043 0380 orr.w r3, r3, #128 @ 0x80
800a874: b29b uxth r3, r3
800a876: 8013 strh r3, [r2, #0]
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800a878: f507 7384 add.w r3, r7, #264 @ 0x108
800a87c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a880: 681b ldr r3, [r3, #0]
800a882: 6a1a ldr r2, [r3, #32]
800a884: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a888: 1ad2 subs r2, r2, r3
800a88a: f507 7384 add.w r3, r7, #264 @ 0x108
800a88e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a892: 681b ldr r3, [r3, #0]
800a894: 621a str r2, [r3, #32]
/* Fill the two first buffer in the Buffer0 & Buffer1 */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800a896: f507 7384 add.w r3, r7, #264 @ 0x108
800a89a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a89e: 681a ldr r2, [r3, #0]
800a8a0: f507 7384 add.w r3, r7, #264 @ 0x108
800a8a4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8a8: 681b ldr r3, [r3, #0]
800a8aa: 781b ldrb r3, [r3, #0]
800a8ac: 009b lsls r3, r3, #2
800a8ae: 4413 add r3, r2
800a8b0: 881b ldrh r3, [r3, #0]
800a8b2: b29b uxth r3, r3
800a8b4: f003 0340 and.w r3, r3, #64 @ 0x40
800a8b8: 2b00 cmp r3, #0
800a8ba: f000 81c7 beq.w 800ac4c <USB_EPStartXfer+0x550>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800a8be: f507 7384 add.w r3, r7, #264 @ 0x108
800a8c2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8c6: 681b ldr r3, [r3, #0]
800a8c8: 633b str r3, [r7, #48] @ 0x30
800a8ca: f507 7384 add.w r3, r7, #264 @ 0x108
800a8ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a8d2: 681b ldr r3, [r3, #0]
800a8d4: 785b ldrb r3, [r3, #1]
800a8d6: 2b00 cmp r3, #0
800a8d8: d177 bne.n 800a9ca <USB_EPStartXfer+0x2ce>
800a8da: f507 7384 add.w r3, r7, #264 @ 0x108
800a8de: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8e2: 681b ldr r3, [r3, #0]
800a8e4: 62bb str r3, [r7, #40] @ 0x28
800a8e6: f507 7384 add.w r3, r7, #264 @ 0x108
800a8ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a8ee: 681b ldr r3, [r3, #0]
800a8f0: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a8f4: b29b uxth r3, r3
800a8f6: 461a mov r2, r3
800a8f8: 6abb ldr r3, [r7, #40] @ 0x28
800a8fa: 4413 add r3, r2
800a8fc: 62bb str r3, [r7, #40] @ 0x28
800a8fe: f507 7384 add.w r3, r7, #264 @ 0x108
800a902: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a906: 681b ldr r3, [r3, #0]
800a908: 781b ldrb r3, [r3, #0]
800a90a: 011a lsls r2, r3, #4
800a90c: 6abb ldr r3, [r7, #40] @ 0x28
800a90e: 4413 add r3, r2
800a910: f203 430c addw r3, r3, #1036 @ 0x40c
800a914: 627b str r3, [r7, #36] @ 0x24
800a916: 6a7b ldr r3, [r7, #36] @ 0x24
800a918: 881b ldrh r3, [r3, #0]
800a91a: b29b uxth r3, r3
800a91c: f3c3 0309 ubfx r3, r3, #0, #10
800a920: b29a uxth r2, r3
800a922: 6a7b ldr r3, [r7, #36] @ 0x24
800a924: 801a strh r2, [r3, #0]
800a926: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a92a: 2b3e cmp r3, #62 @ 0x3e
800a92c: d921 bls.n 800a972 <USB_EPStartXfer+0x276>
800a92e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a932: 095b lsrs r3, r3, #5
800a934: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a938: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a93c: f003 031f and.w r3, r3, #31
800a940: 2b00 cmp r3, #0
800a942: d104 bne.n 800a94e <USB_EPStartXfer+0x252>
800a944: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a948: 3b01 subs r3, #1
800a94a: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a94e: 6a7b ldr r3, [r7, #36] @ 0x24
800a950: 881b ldrh r3, [r3, #0]
800a952: b29a uxth r2, r3
800a954: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a958: b29b uxth r3, r3
800a95a: 029b lsls r3, r3, #10
800a95c: b29b uxth r3, r3
800a95e: 4313 orrs r3, r2
800a960: b29b uxth r3, r3
800a962: ea6f 4343 mvn.w r3, r3, lsl #17
800a966: ea6f 4353 mvn.w r3, r3, lsr #17
800a96a: b29a uxth r2, r3
800a96c: 6a7b ldr r3, [r7, #36] @ 0x24
800a96e: 801a strh r2, [r3, #0]
800a970: e050 b.n 800aa14 <USB_EPStartXfer+0x318>
800a972: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a976: 2b00 cmp r3, #0
800a978: d10a bne.n 800a990 <USB_EPStartXfer+0x294>
800a97a: 6a7b ldr r3, [r7, #36] @ 0x24
800a97c: 881b ldrh r3, [r3, #0]
800a97e: b29b uxth r3, r3
800a980: ea6f 4343 mvn.w r3, r3, lsl #17
800a984: ea6f 4353 mvn.w r3, r3, lsr #17
800a988: b29a uxth r2, r3
800a98a: 6a7b ldr r3, [r7, #36] @ 0x24
800a98c: 801a strh r2, [r3, #0]
800a98e: e041 b.n 800aa14 <USB_EPStartXfer+0x318>
800a990: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a994: 085b lsrs r3, r3, #1
800a996: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a99a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800a99e: f003 0301 and.w r3, r3, #1
800a9a2: 2b00 cmp r3, #0
800a9a4: d004 beq.n 800a9b0 <USB_EPStartXfer+0x2b4>
800a9a6: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a9aa: 3301 adds r3, #1
800a9ac: f8c7 3100 str.w r3, [r7, #256] @ 0x100
800a9b0: 6a7b ldr r3, [r7, #36] @ 0x24
800a9b2: 881b ldrh r3, [r3, #0]
800a9b4: b29a uxth r2, r3
800a9b6: f8d7 3100 ldr.w r3, [r7, #256] @ 0x100
800a9ba: b29b uxth r3, r3
800a9bc: 029b lsls r3, r3, #10
800a9be: b29b uxth r3, r3
800a9c0: 4313 orrs r3, r2
800a9c2: b29a uxth r2, r3
800a9c4: 6a7b ldr r3, [r7, #36] @ 0x24
800a9c6: 801a strh r2, [r3, #0]
800a9c8: e024 b.n 800aa14 <USB_EPStartXfer+0x318>
800a9ca: f507 7384 add.w r3, r7, #264 @ 0x108
800a9ce: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9d2: 681b ldr r3, [r3, #0]
800a9d4: 785b ldrb r3, [r3, #1]
800a9d6: 2b01 cmp r3, #1
800a9d8: d11c bne.n 800aa14 <USB_EPStartXfer+0x318>
800a9da: f507 7384 add.w r3, r7, #264 @ 0x108
800a9de: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800a9e2: 681b ldr r3, [r3, #0]
800a9e4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800a9e8: b29b uxth r3, r3
800a9ea: 461a mov r2, r3
800a9ec: 6b3b ldr r3, [r7, #48] @ 0x30
800a9ee: 4413 add r3, r2
800a9f0: 633b str r3, [r7, #48] @ 0x30
800a9f2: f507 7384 add.w r3, r7, #264 @ 0x108
800a9f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800a9fa: 681b ldr r3, [r3, #0]
800a9fc: 781b ldrb r3, [r3, #0]
800a9fe: 011a lsls r2, r3, #4
800aa00: 6b3b ldr r3, [r7, #48] @ 0x30
800aa02: 4413 add r3, r2
800aa04: f203 430c addw r3, r3, #1036 @ 0x40c
800aa08: 62fb str r3, [r7, #44] @ 0x2c
800aa0a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa0e: b29a uxth r2, r3
800aa10: 6afb ldr r3, [r7, #44] @ 0x2c
800aa12: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800aa14: f507 7384 add.w r3, r7, #264 @ 0x108
800aa18: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa1c: 681b ldr r3, [r3, #0]
800aa1e: 895b ldrh r3, [r3, #10]
800aa20: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800aa24: f507 7384 add.w r3, r7, #264 @ 0x108
800aa28: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa2c: 681b ldr r3, [r3, #0]
800aa2e: 6959 ldr r1, [r3, #20]
800aa30: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa34: b29b uxth r3, r3
800aa36: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800aa3a: f507 7084 add.w r0, r7, #264 @ 0x108
800aa3e: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800aa42: 6800 ldr r0, [r0, #0]
800aa44: f001 fb49 bl 800c0da <USB_WritePMA>
ep->xfer_buff += len;
800aa48: f507 7384 add.w r3, r7, #264 @ 0x108
800aa4c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa50: 681b ldr r3, [r3, #0]
800aa52: 695a ldr r2, [r3, #20]
800aa54: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa58: 441a add r2, r3
800aa5a: f507 7384 add.w r3, r7, #264 @ 0x108
800aa5e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa62: 681b ldr r3, [r3, #0]
800aa64: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800aa66: f507 7384 add.w r3, r7, #264 @ 0x108
800aa6a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa6e: 681b ldr r3, [r3, #0]
800aa70: 6a1a ldr r2, [r3, #32]
800aa72: f507 7384 add.w r3, r7, #264 @ 0x108
800aa76: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa7a: 681b ldr r3, [r3, #0]
800aa7c: 691b ldr r3, [r3, #16]
800aa7e: 429a cmp r2, r3
800aa80: d90f bls.n 800aaa2 <USB_EPStartXfer+0x3a6>
{
ep->xfer_len_db -= len;
800aa82: f507 7384 add.w r3, r7, #264 @ 0x108
800aa86: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa8a: 681b ldr r3, [r3, #0]
800aa8c: 6a1a ldr r2, [r3, #32]
800aa8e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aa92: 1ad2 subs r2, r2, r3
800aa94: f507 7384 add.w r3, r7, #264 @ 0x108
800aa98: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aa9c: 681b ldr r3, [r3, #0]
800aa9e: 621a str r2, [r3, #32]
800aaa0: e00e b.n 800aac0 <USB_EPStartXfer+0x3c4>
}
else
{
len = ep->xfer_len_db;
800aaa2: f507 7384 add.w r3, r7, #264 @ 0x108
800aaa6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aaaa: 681b ldr r3, [r3, #0]
800aaac: 6a1b ldr r3, [r3, #32]
800aaae: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800aab2: f507 7384 add.w r3, r7, #264 @ 0x108
800aab6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aaba: 681b ldr r3, [r3, #0]
800aabc: 2200 movs r2, #0
800aabe: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800aac0: f507 7384 add.w r3, r7, #264 @ 0x108
800aac4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aac8: 681b ldr r3, [r3, #0]
800aaca: 785b ldrb r3, [r3, #1]
800aacc: 2b00 cmp r3, #0
800aace: d177 bne.n 800abc0 <USB_EPStartXfer+0x4c4>
800aad0: f507 7384 add.w r3, r7, #264 @ 0x108
800aad4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aad8: 681b ldr r3, [r3, #0]
800aada: 61bb str r3, [r7, #24]
800aadc: f507 7384 add.w r3, r7, #264 @ 0x108
800aae0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aae4: 681b ldr r3, [r3, #0]
800aae6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800aaea: b29b uxth r3, r3
800aaec: 461a mov r2, r3
800aaee: 69bb ldr r3, [r7, #24]
800aaf0: 4413 add r3, r2
800aaf2: 61bb str r3, [r7, #24]
800aaf4: f507 7384 add.w r3, r7, #264 @ 0x108
800aaf8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800aafc: 681b ldr r3, [r3, #0]
800aafe: 781b ldrb r3, [r3, #0]
800ab00: 011a lsls r2, r3, #4
800ab02: 69bb ldr r3, [r7, #24]
800ab04: 4413 add r3, r2
800ab06: f203 4304 addw r3, r3, #1028 @ 0x404
800ab0a: 617b str r3, [r7, #20]
800ab0c: 697b ldr r3, [r7, #20]
800ab0e: 881b ldrh r3, [r3, #0]
800ab10: b29b uxth r3, r3
800ab12: f3c3 0309 ubfx r3, r3, #0, #10
800ab16: b29a uxth r2, r3
800ab18: 697b ldr r3, [r7, #20]
800ab1a: 801a strh r2, [r3, #0]
800ab1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab20: 2b3e cmp r3, #62 @ 0x3e
800ab22: d921 bls.n 800ab68 <USB_EPStartXfer+0x46c>
800ab24: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab28: 095b lsrs r3, r3, #5
800ab2a: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ab2e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab32: f003 031f and.w r3, r3, #31
800ab36: 2b00 cmp r3, #0
800ab38: d104 bne.n 800ab44 <USB_EPStartXfer+0x448>
800ab3a: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ab3e: 3b01 subs r3, #1
800ab40: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ab44: 697b ldr r3, [r7, #20]
800ab46: 881b ldrh r3, [r3, #0]
800ab48: b29a uxth r2, r3
800ab4a: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800ab4e: b29b uxth r3, r3
800ab50: 029b lsls r3, r3, #10
800ab52: b29b uxth r3, r3
800ab54: 4313 orrs r3, r2
800ab56: b29b uxth r3, r3
800ab58: ea6f 4343 mvn.w r3, r3, lsl #17
800ab5c: ea6f 4353 mvn.w r3, r3, lsr #17
800ab60: b29a uxth r2, r3
800ab62: 697b ldr r3, [r7, #20]
800ab64: 801a strh r2, [r3, #0]
800ab66: e056 b.n 800ac16 <USB_EPStartXfer+0x51a>
800ab68: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab6c: 2b00 cmp r3, #0
800ab6e: d10a bne.n 800ab86 <USB_EPStartXfer+0x48a>
800ab70: 697b ldr r3, [r7, #20]
800ab72: 881b ldrh r3, [r3, #0]
800ab74: b29b uxth r3, r3
800ab76: ea6f 4343 mvn.w r3, r3, lsl #17
800ab7a: ea6f 4353 mvn.w r3, r3, lsr #17
800ab7e: b29a uxth r2, r3
800ab80: 697b ldr r3, [r7, #20]
800ab82: 801a strh r2, [r3, #0]
800ab84: e047 b.n 800ac16 <USB_EPStartXfer+0x51a>
800ab86: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab8a: 085b lsrs r3, r3, #1
800ab8c: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800ab90: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ab94: f003 0301 and.w r3, r3, #1
800ab98: 2b00 cmp r3, #0
800ab9a: d004 beq.n 800aba6 <USB_EPStartXfer+0x4aa>
800ab9c: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800aba0: 3301 adds r3, #1
800aba2: f8c7 30fc str.w r3, [r7, #252] @ 0xfc
800aba6: 697b ldr r3, [r7, #20]
800aba8: 881b ldrh r3, [r3, #0]
800abaa: b29a uxth r2, r3
800abac: f8d7 30fc ldr.w r3, [r7, #252] @ 0xfc
800abb0: b29b uxth r3, r3
800abb2: 029b lsls r3, r3, #10
800abb4: b29b uxth r3, r3
800abb6: 4313 orrs r3, r2
800abb8: b29a uxth r2, r3
800abba: 697b ldr r3, [r7, #20]
800abbc: 801a strh r2, [r3, #0]
800abbe: e02a b.n 800ac16 <USB_EPStartXfer+0x51a>
800abc0: f507 7384 add.w r3, r7, #264 @ 0x108
800abc4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abc8: 681b ldr r3, [r3, #0]
800abca: 785b ldrb r3, [r3, #1]
800abcc: 2b01 cmp r3, #1
800abce: d122 bne.n 800ac16 <USB_EPStartXfer+0x51a>
800abd0: f507 7384 add.w r3, r7, #264 @ 0x108
800abd4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800abd8: 681b ldr r3, [r3, #0]
800abda: 623b str r3, [r7, #32]
800abdc: f507 7384 add.w r3, r7, #264 @ 0x108
800abe0: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800abe4: 681b ldr r3, [r3, #0]
800abe6: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800abea: b29b uxth r3, r3
800abec: 461a mov r2, r3
800abee: 6a3b ldr r3, [r7, #32]
800abf0: 4413 add r3, r2
800abf2: 623b str r3, [r7, #32]
800abf4: f507 7384 add.w r3, r7, #264 @ 0x108
800abf8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800abfc: 681b ldr r3, [r3, #0]
800abfe: 781b ldrb r3, [r3, #0]
800ac00: 011a lsls r2, r3, #4
800ac02: 6a3b ldr r3, [r7, #32]
800ac04: 4413 add r3, r2
800ac06: f203 4304 addw r3, r3, #1028 @ 0x404
800ac0a: 61fb str r3, [r7, #28]
800ac0c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac10: b29a uxth r2, r3
800ac12: 69fb ldr r3, [r7, #28]
800ac14: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800ac16: f507 7384 add.w r3, r7, #264 @ 0x108
800ac1a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac1e: 681b ldr r3, [r3, #0]
800ac20: 891b ldrh r3, [r3, #8]
800ac22: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800ac26: f507 7384 add.w r3, r7, #264 @ 0x108
800ac2a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac2e: 681b ldr r3, [r3, #0]
800ac30: 6959 ldr r1, [r3, #20]
800ac32: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ac36: b29b uxth r3, r3
800ac38: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800ac3c: f507 7084 add.w r0, r7, #264 @ 0x108
800ac40: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800ac44: 6800 ldr r0, [r0, #0]
800ac46: f001 fa48 bl 800c0da <USB_WritePMA>
800ac4a: e3ee b.n 800b42a <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800ac4c: f507 7384 add.w r3, r7, #264 @ 0x108
800ac50: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac54: 681b ldr r3, [r3, #0]
800ac56: 785b ldrb r3, [r3, #1]
800ac58: 2b00 cmp r3, #0
800ac5a: d177 bne.n 800ad4c <USB_EPStartXfer+0x650>
800ac5c: f507 7384 add.w r3, r7, #264 @ 0x108
800ac60: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ac64: 681b ldr r3, [r3, #0]
800ac66: 64bb str r3, [r7, #72] @ 0x48
800ac68: f507 7384 add.w r3, r7, #264 @ 0x108
800ac6c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ac70: 681b ldr r3, [r3, #0]
800ac72: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ac76: b29b uxth r3, r3
800ac78: 461a mov r2, r3
800ac7a: 6cbb ldr r3, [r7, #72] @ 0x48
800ac7c: 4413 add r3, r2
800ac7e: 64bb str r3, [r7, #72] @ 0x48
800ac80: f507 7384 add.w r3, r7, #264 @ 0x108
800ac84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ac88: 681b ldr r3, [r3, #0]
800ac8a: 781b ldrb r3, [r3, #0]
800ac8c: 011a lsls r2, r3, #4
800ac8e: 6cbb ldr r3, [r7, #72] @ 0x48
800ac90: 4413 add r3, r2
800ac92: f203 4304 addw r3, r3, #1028 @ 0x404
800ac96: 647b str r3, [r7, #68] @ 0x44
800ac98: 6c7b ldr r3, [r7, #68] @ 0x44
800ac9a: 881b ldrh r3, [r3, #0]
800ac9c: b29b uxth r3, r3
800ac9e: f3c3 0309 ubfx r3, r3, #0, #10
800aca2: b29a uxth r2, r3
800aca4: 6c7b ldr r3, [r7, #68] @ 0x44
800aca6: 801a strh r2, [r3, #0]
800aca8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800acac: 2b3e cmp r3, #62 @ 0x3e
800acae: d921 bls.n 800acf4 <USB_EPStartXfer+0x5f8>
800acb0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800acb4: 095b lsrs r3, r3, #5
800acb6: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800acba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800acbe: f003 031f and.w r3, r3, #31
800acc2: 2b00 cmp r3, #0
800acc4: d104 bne.n 800acd0 <USB_EPStartXfer+0x5d4>
800acc6: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800acca: 3b01 subs r3, #1
800accc: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800acd0: 6c7b ldr r3, [r7, #68] @ 0x44
800acd2: 881b ldrh r3, [r3, #0]
800acd4: b29a uxth r2, r3
800acd6: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800acda: b29b uxth r3, r3
800acdc: 029b lsls r3, r3, #10
800acde: b29b uxth r3, r3
800ace0: 4313 orrs r3, r2
800ace2: b29b uxth r3, r3
800ace4: ea6f 4343 mvn.w r3, r3, lsl #17
800ace8: ea6f 4353 mvn.w r3, r3, lsr #17
800acec: b29a uxth r2, r3
800acee: 6c7b ldr r3, [r7, #68] @ 0x44
800acf0: 801a strh r2, [r3, #0]
800acf2: e056 b.n 800ada2 <USB_EPStartXfer+0x6a6>
800acf4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800acf8: 2b00 cmp r3, #0
800acfa: d10a bne.n 800ad12 <USB_EPStartXfer+0x616>
800acfc: 6c7b ldr r3, [r7, #68] @ 0x44
800acfe: 881b ldrh r3, [r3, #0]
800ad00: b29b uxth r3, r3
800ad02: ea6f 4343 mvn.w r3, r3, lsl #17
800ad06: ea6f 4353 mvn.w r3, r3, lsr #17
800ad0a: b29a uxth r2, r3
800ad0c: 6c7b ldr r3, [r7, #68] @ 0x44
800ad0e: 801a strh r2, [r3, #0]
800ad10: e047 b.n 800ada2 <USB_EPStartXfer+0x6a6>
800ad12: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad16: 085b lsrs r3, r3, #1
800ad18: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ad1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad20: f003 0301 and.w r3, r3, #1
800ad24: 2b00 cmp r3, #0
800ad26: d004 beq.n 800ad32 <USB_EPStartXfer+0x636>
800ad28: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800ad2c: 3301 adds r3, #1
800ad2e: f8c7 30f8 str.w r3, [r7, #248] @ 0xf8
800ad32: 6c7b ldr r3, [r7, #68] @ 0x44
800ad34: 881b ldrh r3, [r3, #0]
800ad36: b29a uxth r2, r3
800ad38: f8d7 30f8 ldr.w r3, [r7, #248] @ 0xf8
800ad3c: b29b uxth r3, r3
800ad3e: 029b lsls r3, r3, #10
800ad40: b29b uxth r3, r3
800ad42: 4313 orrs r3, r2
800ad44: b29a uxth r2, r3
800ad46: 6c7b ldr r3, [r7, #68] @ 0x44
800ad48: 801a strh r2, [r3, #0]
800ad4a: e02a b.n 800ada2 <USB_EPStartXfer+0x6a6>
800ad4c: f507 7384 add.w r3, r7, #264 @ 0x108
800ad50: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad54: 681b ldr r3, [r3, #0]
800ad56: 785b ldrb r3, [r3, #1]
800ad58: 2b01 cmp r3, #1
800ad5a: d122 bne.n 800ada2 <USB_EPStartXfer+0x6a6>
800ad5c: f507 7384 add.w r3, r7, #264 @ 0x108
800ad60: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad64: 681b ldr r3, [r3, #0]
800ad66: 653b str r3, [r7, #80] @ 0x50
800ad68: f507 7384 add.w r3, r7, #264 @ 0x108
800ad6c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ad70: 681b ldr r3, [r3, #0]
800ad72: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ad76: b29b uxth r3, r3
800ad78: 461a mov r2, r3
800ad7a: 6d3b ldr r3, [r7, #80] @ 0x50
800ad7c: 4413 add r3, r2
800ad7e: 653b str r3, [r7, #80] @ 0x50
800ad80: f507 7384 add.w r3, r7, #264 @ 0x108
800ad84: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ad88: 681b ldr r3, [r3, #0]
800ad8a: 781b ldrb r3, [r3, #0]
800ad8c: 011a lsls r2, r3, #4
800ad8e: 6d3b ldr r3, [r7, #80] @ 0x50
800ad90: 4413 add r3, r2
800ad92: f203 4304 addw r3, r3, #1028 @ 0x404
800ad96: 64fb str r3, [r7, #76] @ 0x4c
800ad98: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ad9c: b29a uxth r2, r3
800ad9e: 6cfb ldr r3, [r7, #76] @ 0x4c
800ada0: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800ada2: f507 7384 add.w r3, r7, #264 @ 0x108
800ada6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adaa: 681b ldr r3, [r3, #0]
800adac: 891b ldrh r3, [r3, #8]
800adae: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800adb2: f507 7384 add.w r3, r7, #264 @ 0x108
800adb6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adba: 681b ldr r3, [r3, #0]
800adbc: 6959 ldr r1, [r3, #20]
800adbe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800adc2: b29b uxth r3, r3
800adc4: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800adc8: f507 7084 add.w r0, r7, #264 @ 0x108
800adcc: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800add0: 6800 ldr r0, [r0, #0]
800add2: f001 f982 bl 800c0da <USB_WritePMA>
ep->xfer_buff += len;
800add6: f507 7384 add.w r3, r7, #264 @ 0x108
800adda: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adde: 681b ldr r3, [r3, #0]
800ade0: 695a ldr r2, [r3, #20]
800ade2: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ade6: 441a add r2, r3
800ade8: f507 7384 add.w r3, r7, #264 @ 0x108
800adec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adf0: 681b ldr r3, [r3, #0]
800adf2: 615a str r2, [r3, #20]
if (ep->xfer_len_db > ep->maxpacket)
800adf4: f507 7384 add.w r3, r7, #264 @ 0x108
800adf8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800adfc: 681b ldr r3, [r3, #0]
800adfe: 6a1a ldr r2, [r3, #32]
800ae00: f507 7384 add.w r3, r7, #264 @ 0x108
800ae04: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae08: 681b ldr r3, [r3, #0]
800ae0a: 691b ldr r3, [r3, #16]
800ae0c: 429a cmp r2, r3
800ae0e: d90f bls.n 800ae30 <USB_EPStartXfer+0x734>
{
ep->xfer_len_db -= len;
800ae10: f507 7384 add.w r3, r7, #264 @ 0x108
800ae14: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae18: 681b ldr r3, [r3, #0]
800ae1a: 6a1a ldr r2, [r3, #32]
800ae1c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800ae20: 1ad2 subs r2, r2, r3
800ae22: f507 7384 add.w r3, r7, #264 @ 0x108
800ae26: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae2a: 681b ldr r3, [r3, #0]
800ae2c: 621a str r2, [r3, #32]
800ae2e: e00e b.n 800ae4e <USB_EPStartXfer+0x752>
}
else
{
len = ep->xfer_len_db;
800ae30: f507 7384 add.w r3, r7, #264 @ 0x108
800ae34: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae38: 681b ldr r3, [r3, #0]
800ae3a: 6a1b ldr r3, [r3, #32]
800ae3c: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len_db = 0U;
800ae40: f507 7384 add.w r3, r7, #264 @ 0x108
800ae44: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae48: 681b ldr r3, [r3, #0]
800ae4a: 2200 movs r2, #0
800ae4c: 621a str r2, [r3, #32]
}
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800ae4e: f507 7384 add.w r3, r7, #264 @ 0x108
800ae52: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ae56: 681b ldr r3, [r3, #0]
800ae58: 643b str r3, [r7, #64] @ 0x40
800ae5a: f507 7384 add.w r3, r7, #264 @ 0x108
800ae5e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae62: 681b ldr r3, [r3, #0]
800ae64: 785b ldrb r3, [r3, #1]
800ae66: 2b00 cmp r3, #0
800ae68: d177 bne.n 800af5a <USB_EPStartXfer+0x85e>
800ae6a: f507 7384 add.w r3, r7, #264 @ 0x108
800ae6e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ae72: 681b ldr r3, [r3, #0]
800ae74: 63bb str r3, [r7, #56] @ 0x38
800ae76: f507 7384 add.w r3, r7, #264 @ 0x108
800ae7a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ae7e: 681b ldr r3, [r3, #0]
800ae80: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800ae84: b29b uxth r3, r3
800ae86: 461a mov r2, r3
800ae88: 6bbb ldr r3, [r7, #56] @ 0x38
800ae8a: 4413 add r3, r2
800ae8c: 63bb str r3, [r7, #56] @ 0x38
800ae8e: f507 7384 add.w r3, r7, #264 @ 0x108
800ae92: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ae96: 681b ldr r3, [r3, #0]
800ae98: 781b ldrb r3, [r3, #0]
800ae9a: 011a lsls r2, r3, #4
800ae9c: 6bbb ldr r3, [r7, #56] @ 0x38
800ae9e: 4413 add r3, r2
800aea0: f203 430c addw r3, r3, #1036 @ 0x40c
800aea4: 637b str r3, [r7, #52] @ 0x34
800aea6: 6b7b ldr r3, [r7, #52] @ 0x34
800aea8: 881b ldrh r3, [r3, #0]
800aeaa: b29b uxth r3, r3
800aeac: f3c3 0309 ubfx r3, r3, #0, #10
800aeb0: b29a uxth r2, r3
800aeb2: 6b7b ldr r3, [r7, #52] @ 0x34
800aeb4: 801a strh r2, [r3, #0]
800aeb6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aeba: 2b3e cmp r3, #62 @ 0x3e
800aebc: d921 bls.n 800af02 <USB_EPStartXfer+0x806>
800aebe: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aec2: 095b lsrs r3, r3, #5
800aec4: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800aec8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800aecc: f003 031f and.w r3, r3, #31
800aed0: 2b00 cmp r3, #0
800aed2: d104 bne.n 800aede <USB_EPStartXfer+0x7e2>
800aed4: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800aed8: 3b01 subs r3, #1
800aeda: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800aede: 6b7b ldr r3, [r7, #52] @ 0x34
800aee0: 881b ldrh r3, [r3, #0]
800aee2: b29a uxth r2, r3
800aee4: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800aee8: b29b uxth r3, r3
800aeea: 029b lsls r3, r3, #10
800aeec: b29b uxth r3, r3
800aeee: 4313 orrs r3, r2
800aef0: b29b uxth r3, r3
800aef2: ea6f 4343 mvn.w r3, r3, lsl #17
800aef6: ea6f 4353 mvn.w r3, r3, lsr #17
800aefa: b29a uxth r2, r3
800aefc: 6b7b ldr r3, [r7, #52] @ 0x34
800aefe: 801a strh r2, [r3, #0]
800af00: e050 b.n 800afa4 <USB_EPStartXfer+0x8a8>
800af02: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af06: 2b00 cmp r3, #0
800af08: d10a bne.n 800af20 <USB_EPStartXfer+0x824>
800af0a: 6b7b ldr r3, [r7, #52] @ 0x34
800af0c: 881b ldrh r3, [r3, #0]
800af0e: b29b uxth r3, r3
800af10: ea6f 4343 mvn.w r3, r3, lsl #17
800af14: ea6f 4353 mvn.w r3, r3, lsr #17
800af18: b29a uxth r2, r3
800af1a: 6b7b ldr r3, [r7, #52] @ 0x34
800af1c: 801a strh r2, [r3, #0]
800af1e: e041 b.n 800afa4 <USB_EPStartXfer+0x8a8>
800af20: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af24: 085b lsrs r3, r3, #1
800af26: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800af2a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af2e: f003 0301 and.w r3, r3, #1
800af32: 2b00 cmp r3, #0
800af34: d004 beq.n 800af40 <USB_EPStartXfer+0x844>
800af36: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800af3a: 3301 adds r3, #1
800af3c: f8c7 30f4 str.w r3, [r7, #244] @ 0xf4
800af40: 6b7b ldr r3, [r7, #52] @ 0x34
800af42: 881b ldrh r3, [r3, #0]
800af44: b29a uxth r2, r3
800af46: f8d7 30f4 ldr.w r3, [r7, #244] @ 0xf4
800af4a: b29b uxth r3, r3
800af4c: 029b lsls r3, r3, #10
800af4e: b29b uxth r3, r3
800af50: 4313 orrs r3, r2
800af52: b29a uxth r2, r3
800af54: 6b7b ldr r3, [r7, #52] @ 0x34
800af56: 801a strh r2, [r3, #0]
800af58: e024 b.n 800afa4 <USB_EPStartXfer+0x8a8>
800af5a: f507 7384 add.w r3, r7, #264 @ 0x108
800af5e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af62: 681b ldr r3, [r3, #0]
800af64: 785b ldrb r3, [r3, #1]
800af66: 2b01 cmp r3, #1
800af68: d11c bne.n 800afa4 <USB_EPStartXfer+0x8a8>
800af6a: f507 7384 add.w r3, r7, #264 @ 0x108
800af6e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800af72: 681b ldr r3, [r3, #0]
800af74: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800af78: b29b uxth r3, r3
800af7a: 461a mov r2, r3
800af7c: 6c3b ldr r3, [r7, #64] @ 0x40
800af7e: 4413 add r3, r2
800af80: 643b str r3, [r7, #64] @ 0x40
800af82: f507 7384 add.w r3, r7, #264 @ 0x108
800af86: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800af8a: 681b ldr r3, [r3, #0]
800af8c: 781b ldrb r3, [r3, #0]
800af8e: 011a lsls r2, r3, #4
800af90: 6c3b ldr r3, [r7, #64] @ 0x40
800af92: 4413 add r3, r2
800af94: f203 430c addw r3, r3, #1036 @ 0x40c
800af98: 63fb str r3, [r7, #60] @ 0x3c
800af9a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800af9e: b29a uxth r2, r3
800afa0: 6bfb ldr r3, [r7, #60] @ 0x3c
800afa2: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800afa4: f507 7384 add.w r3, r7, #264 @ 0x108
800afa8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afac: 681b ldr r3, [r3, #0]
800afae: 895b ldrh r3, [r3, #10]
800afb0: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800afb4: f507 7384 add.w r3, r7, #264 @ 0x108
800afb8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afbc: 681b ldr r3, [r3, #0]
800afbe: 6959 ldr r1, [r3, #20]
800afc0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800afc4: b29b uxth r3, r3
800afc6: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800afca: f507 7084 add.w r0, r7, #264 @ 0x108
800afce: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800afd2: 6800 ldr r0, [r0, #0]
800afd4: f001 f881 bl 800c0da <USB_WritePMA>
800afd8: e227 b.n 800b42a <USB_EPStartXfer+0xd2e>
}
}
/* auto Switch to single buffer mode when transfer <Mps no need to manage in double buffer */
else
{
len = ep->xfer_len_db;
800afda: f507 7384 add.w r3, r7, #264 @ 0x108
800afde: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800afe2: 681b ldr r3, [r3, #0]
800afe4: 6a1b ldr r3, [r3, #32]
800afe6: f8c7 3104 str.w r3, [r7, #260] @ 0x104
/* disable double buffer mode for Bulk endpoint */
PCD_CLEAR_BULK_EP_DBUF(USBx, ep->num);
800afea: f507 7384 add.w r3, r7, #264 @ 0x108
800afee: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800aff2: 681a ldr r2, [r3, #0]
800aff4: f507 7384 add.w r3, r7, #264 @ 0x108
800aff8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800affc: 681b ldr r3, [r3, #0]
800affe: 781b ldrb r3, [r3, #0]
800b000: 009b lsls r3, r3, #2
800b002: 4413 add r3, r2
800b004: 881b ldrh r3, [r3, #0]
800b006: b29b uxth r3, r3
800b008: f423 43e2 bic.w r3, r3, #28928 @ 0x7100
800b00c: f023 0370 bic.w r3, r3, #112 @ 0x70
800b010: f8a7 3062 strh.w r3, [r7, #98] @ 0x62
800b014: f507 7384 add.w r3, r7, #264 @ 0x108
800b018: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b01c: 681a ldr r2, [r3, #0]
800b01e: f507 7384 add.w r3, r7, #264 @ 0x108
800b022: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b026: 681b ldr r3, [r3, #0]
800b028: 781b ldrb r3, [r3, #0]
800b02a: 009b lsls r3, r3, #2
800b02c: 441a add r2, r3
800b02e: f8b7 3062 ldrh.w r3, [r7, #98] @ 0x62
800b032: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b036: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b03a: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b03e: f043 0380 orr.w r3, r3, #128 @ 0x80
800b042: b29b uxth r3, r3
800b044: 8013 strh r3, [r2, #0]
/* Set Tx count with nbre of byte to be transmitted */
PCD_SET_EP_TX_CNT(USBx, ep->num, len);
800b046: f507 7384 add.w r3, r7, #264 @ 0x108
800b04a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b04e: 681b ldr r3, [r3, #0]
800b050: 65fb str r3, [r7, #92] @ 0x5c
800b052: f507 7384 add.w r3, r7, #264 @ 0x108
800b056: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b05a: 681b ldr r3, [r3, #0]
800b05c: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b060: b29b uxth r3, r3
800b062: 461a mov r2, r3
800b064: 6dfb ldr r3, [r7, #92] @ 0x5c
800b066: 4413 add r3, r2
800b068: 65fb str r3, [r7, #92] @ 0x5c
800b06a: f507 7384 add.w r3, r7, #264 @ 0x108
800b06e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b072: 681b ldr r3, [r3, #0]
800b074: 781b ldrb r3, [r3, #0]
800b076: 011a lsls r2, r3, #4
800b078: 6dfb ldr r3, [r7, #92] @ 0x5c
800b07a: 4413 add r3, r2
800b07c: f203 4304 addw r3, r3, #1028 @ 0x404
800b080: 65bb str r3, [r7, #88] @ 0x58
800b082: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b086: b29a uxth r2, r3
800b088: 6dbb ldr r3, [r7, #88] @ 0x58
800b08a: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800b08c: f507 7384 add.w r3, r7, #264 @ 0x108
800b090: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b094: 681b ldr r3, [r3, #0]
800b096: 891b ldrh r3, [r3, #8]
800b098: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b09c: f507 7384 add.w r3, r7, #264 @ 0x108
800b0a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0a4: 681b ldr r3, [r3, #0]
800b0a6: 6959 ldr r1, [r3, #20]
800b0a8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b0ac: b29b uxth r3, r3
800b0ae: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b0b2: f507 7084 add.w r0, r7, #264 @ 0x108
800b0b6: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b0ba: 6800 ldr r0, [r0, #0]
800b0bc: f001 f80d bl 800c0da <USB_WritePMA>
800b0c0: e1b3 b.n 800b42a <USB_EPStartXfer+0xd2e>
}
}
else /* manage isochronous double buffer IN mode */
{
/* each Time to write in PMA xfer_len_db will */
ep->xfer_len_db -= len;
800b0c2: f507 7384 add.w r3, r7, #264 @ 0x108
800b0c6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0ca: 681b ldr r3, [r3, #0]
800b0cc: 6a1a ldr r2, [r3, #32]
800b0ce: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b0d2: 1ad2 subs r2, r2, r3
800b0d4: f507 7384 add.w r3, r7, #264 @ 0x108
800b0d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0dc: 681b ldr r3, [r3, #0]
800b0de: 621a str r2, [r3, #32]
/* Fill the data buffer */
if ((PCD_GET_ENDPOINT(USBx, ep->num) & USB_EP_DTOG_TX) != 0U)
800b0e0: f507 7384 add.w r3, r7, #264 @ 0x108
800b0e4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b0e8: 681a ldr r2, [r3, #0]
800b0ea: f507 7384 add.w r3, r7, #264 @ 0x108
800b0ee: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b0f2: 681b ldr r3, [r3, #0]
800b0f4: 781b ldrb r3, [r3, #0]
800b0f6: 009b lsls r3, r3, #2
800b0f8: 4413 add r3, r2
800b0fa: 881b ldrh r3, [r3, #0]
800b0fc: b29b uxth r3, r3
800b0fe: f003 0340 and.w r3, r3, #64 @ 0x40
800b102: 2b00 cmp r3, #0
800b104: f000 80c6 beq.w 800b294 <USB_EPStartXfer+0xb98>
{
/* Set the Double buffer counter for pmabuffer1 */
PCD_SET_EP_DBUF1_CNT(USBx, ep->num, ep->is_in, len);
800b108: f507 7384 add.w r3, r7, #264 @ 0x108
800b10c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b110: 681b ldr r3, [r3, #0]
800b112: 673b str r3, [r7, #112] @ 0x70
800b114: f507 7384 add.w r3, r7, #264 @ 0x108
800b118: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b11c: 681b ldr r3, [r3, #0]
800b11e: 785b ldrb r3, [r3, #1]
800b120: 2b00 cmp r3, #0
800b122: d177 bne.n 800b214 <USB_EPStartXfer+0xb18>
800b124: f507 7384 add.w r3, r7, #264 @ 0x108
800b128: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b12c: 681b ldr r3, [r3, #0]
800b12e: 66bb str r3, [r7, #104] @ 0x68
800b130: f507 7384 add.w r3, r7, #264 @ 0x108
800b134: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b138: 681b ldr r3, [r3, #0]
800b13a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b13e: b29b uxth r3, r3
800b140: 461a mov r2, r3
800b142: 6ebb ldr r3, [r7, #104] @ 0x68
800b144: 4413 add r3, r2
800b146: 66bb str r3, [r7, #104] @ 0x68
800b148: f507 7384 add.w r3, r7, #264 @ 0x108
800b14c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b150: 681b ldr r3, [r3, #0]
800b152: 781b ldrb r3, [r3, #0]
800b154: 011a lsls r2, r3, #4
800b156: 6ebb ldr r3, [r7, #104] @ 0x68
800b158: 4413 add r3, r2
800b15a: f203 430c addw r3, r3, #1036 @ 0x40c
800b15e: 667b str r3, [r7, #100] @ 0x64
800b160: 6e7b ldr r3, [r7, #100] @ 0x64
800b162: 881b ldrh r3, [r3, #0]
800b164: b29b uxth r3, r3
800b166: f3c3 0309 ubfx r3, r3, #0, #10
800b16a: b29a uxth r2, r3
800b16c: 6e7b ldr r3, [r7, #100] @ 0x64
800b16e: 801a strh r2, [r3, #0]
800b170: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b174: 2b3e cmp r3, #62 @ 0x3e
800b176: d921 bls.n 800b1bc <USB_EPStartXfer+0xac0>
800b178: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b17c: 095b lsrs r3, r3, #5
800b17e: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b182: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b186: f003 031f and.w r3, r3, #31
800b18a: 2b00 cmp r3, #0
800b18c: d104 bne.n 800b198 <USB_EPStartXfer+0xa9c>
800b18e: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b192: 3b01 subs r3, #1
800b194: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b198: 6e7b ldr r3, [r7, #100] @ 0x64
800b19a: 881b ldrh r3, [r3, #0]
800b19c: b29a uxth r2, r3
800b19e: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b1a2: b29b uxth r3, r3
800b1a4: 029b lsls r3, r3, #10
800b1a6: b29b uxth r3, r3
800b1a8: 4313 orrs r3, r2
800b1aa: b29b uxth r3, r3
800b1ac: ea6f 4343 mvn.w r3, r3, lsl #17
800b1b0: ea6f 4353 mvn.w r3, r3, lsr #17
800b1b4: b29a uxth r2, r3
800b1b6: 6e7b ldr r3, [r7, #100] @ 0x64
800b1b8: 801a strh r2, [r3, #0]
800b1ba: e050 b.n 800b25e <USB_EPStartXfer+0xb62>
800b1bc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b1c0: 2b00 cmp r3, #0
800b1c2: d10a bne.n 800b1da <USB_EPStartXfer+0xade>
800b1c4: 6e7b ldr r3, [r7, #100] @ 0x64
800b1c6: 881b ldrh r3, [r3, #0]
800b1c8: b29b uxth r3, r3
800b1ca: ea6f 4343 mvn.w r3, r3, lsl #17
800b1ce: ea6f 4353 mvn.w r3, r3, lsr #17
800b1d2: b29a uxth r2, r3
800b1d4: 6e7b ldr r3, [r7, #100] @ 0x64
800b1d6: 801a strh r2, [r3, #0]
800b1d8: e041 b.n 800b25e <USB_EPStartXfer+0xb62>
800b1da: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b1de: 085b lsrs r3, r3, #1
800b1e0: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b1e4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b1e8: f003 0301 and.w r3, r3, #1
800b1ec: 2b00 cmp r3, #0
800b1ee: d004 beq.n 800b1fa <USB_EPStartXfer+0xafe>
800b1f0: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b1f4: 3301 adds r3, #1
800b1f6: f8c7 30f0 str.w r3, [r7, #240] @ 0xf0
800b1fa: 6e7b ldr r3, [r7, #100] @ 0x64
800b1fc: 881b ldrh r3, [r3, #0]
800b1fe: b29a uxth r2, r3
800b200: f8d7 30f0 ldr.w r3, [r7, #240] @ 0xf0
800b204: b29b uxth r3, r3
800b206: 029b lsls r3, r3, #10
800b208: b29b uxth r3, r3
800b20a: 4313 orrs r3, r2
800b20c: b29a uxth r2, r3
800b20e: 6e7b ldr r3, [r7, #100] @ 0x64
800b210: 801a strh r2, [r3, #0]
800b212: e024 b.n 800b25e <USB_EPStartXfer+0xb62>
800b214: f507 7384 add.w r3, r7, #264 @ 0x108
800b218: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b21c: 681b ldr r3, [r3, #0]
800b21e: 785b ldrb r3, [r3, #1]
800b220: 2b01 cmp r3, #1
800b222: d11c bne.n 800b25e <USB_EPStartXfer+0xb62>
800b224: f507 7384 add.w r3, r7, #264 @ 0x108
800b228: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b22c: 681b ldr r3, [r3, #0]
800b22e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b232: b29b uxth r3, r3
800b234: 461a mov r2, r3
800b236: 6f3b ldr r3, [r7, #112] @ 0x70
800b238: 4413 add r3, r2
800b23a: 673b str r3, [r7, #112] @ 0x70
800b23c: f507 7384 add.w r3, r7, #264 @ 0x108
800b240: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b244: 681b ldr r3, [r3, #0]
800b246: 781b ldrb r3, [r3, #0]
800b248: 011a lsls r2, r3, #4
800b24a: 6f3b ldr r3, [r7, #112] @ 0x70
800b24c: 4413 add r3, r2
800b24e: f203 430c addw r3, r3, #1036 @ 0x40c
800b252: 66fb str r3, [r7, #108] @ 0x6c
800b254: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b258: b29a uxth r2, r3
800b25a: 6efb ldr r3, [r7, #108] @ 0x6c
800b25c: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr1;
800b25e: f507 7384 add.w r3, r7, #264 @ 0x108
800b262: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b266: 681b ldr r3, [r3, #0]
800b268: 895b ldrh r3, [r3, #10]
800b26a: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b26e: f507 7384 add.w r3, r7, #264 @ 0x108
800b272: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b276: 681b ldr r3, [r3, #0]
800b278: 6959 ldr r1, [r3, #20]
800b27a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b27e: b29b uxth r3, r3
800b280: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b284: f507 7084 add.w r0, r7, #264 @ 0x108
800b288: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b28c: 6800 ldr r0, [r0, #0]
800b28e: f000 ff24 bl 800c0da <USB_WritePMA>
800b292: e0ca b.n 800b42a <USB_EPStartXfer+0xd2e>
}
else
{
/* Set the Double buffer counter for pmabuffer0 */
PCD_SET_EP_DBUF0_CNT(USBx, ep->num, ep->is_in, len);
800b294: f507 7384 add.w r3, r7, #264 @ 0x108
800b298: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b29c: 681b ldr r3, [r3, #0]
800b29e: 785b ldrb r3, [r3, #1]
800b2a0: 2b00 cmp r3, #0
800b2a2: d177 bne.n 800b394 <USB_EPStartXfer+0xc98>
800b2a4: f507 7384 add.w r3, r7, #264 @ 0x108
800b2a8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b2ac: 681b ldr r3, [r3, #0]
800b2ae: 67fb str r3, [r7, #124] @ 0x7c
800b2b0: f507 7384 add.w r3, r7, #264 @ 0x108
800b2b4: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b2b8: 681b ldr r3, [r3, #0]
800b2ba: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b2be: b29b uxth r3, r3
800b2c0: 461a mov r2, r3
800b2c2: 6ffb ldr r3, [r7, #124] @ 0x7c
800b2c4: 4413 add r3, r2
800b2c6: 67fb str r3, [r7, #124] @ 0x7c
800b2c8: f507 7384 add.w r3, r7, #264 @ 0x108
800b2cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b2d0: 681b ldr r3, [r3, #0]
800b2d2: 781b ldrb r3, [r3, #0]
800b2d4: 011a lsls r2, r3, #4
800b2d6: 6ffb ldr r3, [r7, #124] @ 0x7c
800b2d8: 4413 add r3, r2
800b2da: f203 4304 addw r3, r3, #1028 @ 0x404
800b2de: 67bb str r3, [r7, #120] @ 0x78
800b2e0: 6fbb ldr r3, [r7, #120] @ 0x78
800b2e2: 881b ldrh r3, [r3, #0]
800b2e4: b29b uxth r3, r3
800b2e6: f3c3 0309 ubfx r3, r3, #0, #10
800b2ea: b29a uxth r2, r3
800b2ec: 6fbb ldr r3, [r7, #120] @ 0x78
800b2ee: 801a strh r2, [r3, #0]
800b2f0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b2f4: 2b3e cmp r3, #62 @ 0x3e
800b2f6: d921 bls.n 800b33c <USB_EPStartXfer+0xc40>
800b2f8: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b2fc: 095b lsrs r3, r3, #5
800b2fe: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b302: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b306: f003 031f and.w r3, r3, #31
800b30a: 2b00 cmp r3, #0
800b30c: d104 bne.n 800b318 <USB_EPStartXfer+0xc1c>
800b30e: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b312: 3b01 subs r3, #1
800b314: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b318: 6fbb ldr r3, [r7, #120] @ 0x78
800b31a: 881b ldrh r3, [r3, #0]
800b31c: b29a uxth r2, r3
800b31e: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b322: b29b uxth r3, r3
800b324: 029b lsls r3, r3, #10
800b326: b29b uxth r3, r3
800b328: 4313 orrs r3, r2
800b32a: b29b uxth r3, r3
800b32c: ea6f 4343 mvn.w r3, r3, lsl #17
800b330: ea6f 4353 mvn.w r3, r3, lsr #17
800b334: b29a uxth r2, r3
800b336: 6fbb ldr r3, [r7, #120] @ 0x78
800b338: 801a strh r2, [r3, #0]
800b33a: e05c b.n 800b3f6 <USB_EPStartXfer+0xcfa>
800b33c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b340: 2b00 cmp r3, #0
800b342: d10a bne.n 800b35a <USB_EPStartXfer+0xc5e>
800b344: 6fbb ldr r3, [r7, #120] @ 0x78
800b346: 881b ldrh r3, [r3, #0]
800b348: b29b uxth r3, r3
800b34a: ea6f 4343 mvn.w r3, r3, lsl #17
800b34e: ea6f 4353 mvn.w r3, r3, lsr #17
800b352: b29a uxth r2, r3
800b354: 6fbb ldr r3, [r7, #120] @ 0x78
800b356: 801a strh r2, [r3, #0]
800b358: e04d b.n 800b3f6 <USB_EPStartXfer+0xcfa>
800b35a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b35e: 085b lsrs r3, r3, #1
800b360: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b364: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b368: f003 0301 and.w r3, r3, #1
800b36c: 2b00 cmp r3, #0
800b36e: d004 beq.n 800b37a <USB_EPStartXfer+0xc7e>
800b370: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b374: 3301 adds r3, #1
800b376: f8c7 30ec str.w r3, [r7, #236] @ 0xec
800b37a: 6fbb ldr r3, [r7, #120] @ 0x78
800b37c: 881b ldrh r3, [r3, #0]
800b37e: b29a uxth r2, r3
800b380: f8d7 30ec ldr.w r3, [r7, #236] @ 0xec
800b384: b29b uxth r3, r3
800b386: 029b lsls r3, r3, #10
800b388: b29b uxth r3, r3
800b38a: 4313 orrs r3, r2
800b38c: b29a uxth r2, r3
800b38e: 6fbb ldr r3, [r7, #120] @ 0x78
800b390: 801a strh r2, [r3, #0]
800b392: e030 b.n 800b3f6 <USB_EPStartXfer+0xcfa>
800b394: f507 7384 add.w r3, r7, #264 @ 0x108
800b398: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b39c: 681b ldr r3, [r3, #0]
800b39e: 785b ldrb r3, [r3, #1]
800b3a0: 2b01 cmp r3, #1
800b3a2: d128 bne.n 800b3f6 <USB_EPStartXfer+0xcfa>
800b3a4: f507 7384 add.w r3, r7, #264 @ 0x108
800b3a8: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b3ac: 681b ldr r3, [r3, #0]
800b3ae: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800b3b2: f507 7384 add.w r3, r7, #264 @ 0x108
800b3b6: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b3ba: 681b ldr r3, [r3, #0]
800b3bc: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b3c0: b29b uxth r3, r3
800b3c2: 461a mov r2, r3
800b3c4: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800b3c8: 4413 add r3, r2
800b3ca: f8c7 3084 str.w r3, [r7, #132] @ 0x84
800b3ce: f507 7384 add.w r3, r7, #264 @ 0x108
800b3d2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3d6: 681b ldr r3, [r3, #0]
800b3d8: 781b ldrb r3, [r3, #0]
800b3da: 011a lsls r2, r3, #4
800b3dc: f8d7 3084 ldr.w r3, [r7, #132] @ 0x84
800b3e0: 4413 add r3, r2
800b3e2: f203 4304 addw r3, r3, #1028 @ 0x404
800b3e6: f8c7 3080 str.w r3, [r7, #128] @ 0x80
800b3ea: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b3ee: b29a uxth r2, r3
800b3f0: f8d7 3080 ldr.w r3, [r7, #128] @ 0x80
800b3f4: 801a strh r2, [r3, #0]
pmabuffer = ep->pmaaddr0;
800b3f6: f507 7384 add.w r3, r7, #264 @ 0x108
800b3fa: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b3fe: 681b ldr r3, [r3, #0]
800b400: 891b ldrh r3, [r3, #8]
800b402: f8a7 3076 strh.w r3, [r7, #118] @ 0x76
/* Write the user buffer to USB PMA */
USB_WritePMA(USBx, ep->xfer_buff, pmabuffer, (uint16_t)len);
800b406: f507 7384 add.w r3, r7, #264 @ 0x108
800b40a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b40e: 681b ldr r3, [r3, #0]
800b410: 6959 ldr r1, [r3, #20]
800b412: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b416: b29b uxth r3, r3
800b418: f8b7 2076 ldrh.w r2, [r7, #118] @ 0x76
800b41c: f507 7084 add.w r0, r7, #264 @ 0x108
800b420: f5a0 7082 sub.w r0, r0, #260 @ 0x104
800b424: 6800 ldr r0, [r0, #0]
800b426: f000 fe58 bl 800c0da <USB_WritePMA>
}
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_VALID);
800b42a: f507 7384 add.w r3, r7, #264 @ 0x108
800b42e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b432: 681a ldr r2, [r3, #0]
800b434: f507 7384 add.w r3, r7, #264 @ 0x108
800b438: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b43c: 681b ldr r3, [r3, #0]
800b43e: 781b ldrb r3, [r3, #0]
800b440: 009b lsls r3, r3, #2
800b442: 4413 add r3, r2
800b444: 881b ldrh r3, [r3, #0]
800b446: b29b uxth r3, r3
800b448: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800b44c: f023 0340 bic.w r3, r3, #64 @ 0x40
800b450: 817b strh r3, [r7, #10]
800b452: 897b ldrh r3, [r7, #10]
800b454: f083 0310 eor.w r3, r3, #16
800b458: 817b strh r3, [r7, #10]
800b45a: 897b ldrh r3, [r7, #10]
800b45c: f083 0320 eor.w r3, r3, #32
800b460: 817b strh r3, [r7, #10]
800b462: f507 7384 add.w r3, r7, #264 @ 0x108
800b466: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b46a: 681a ldr r2, [r3, #0]
800b46c: f507 7384 add.w r3, r7, #264 @ 0x108
800b470: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b474: 681b ldr r3, [r3, #0]
800b476: 781b ldrb r3, [r3, #0]
800b478: 009b lsls r3, r3, #2
800b47a: 441a add r2, r3
800b47c: 897b ldrh r3, [r7, #10]
800b47e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800b482: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800b486: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800b48a: f043 0380 orr.w r3, r3, #128 @ 0x80
800b48e: b29b uxth r3, r3
800b490: 8013 strh r3, [r2, #0]
800b492: f000 bcde b.w 800be52 <USB_EPStartXfer+0x1756>
}
else /* OUT endpoint */
{
if (ep->doublebuffer == 0U)
800b496: f507 7384 add.w r3, r7, #264 @ 0x108
800b49a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b49e: 681b ldr r3, [r3, #0]
800b4a0: 7b1b ldrb r3, [r3, #12]
800b4a2: 2b00 cmp r3, #0
800b4a4: f040 80bb bne.w 800b61e <USB_EPStartXfer+0xf22>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800b4a8: f507 7384 add.w r3, r7, #264 @ 0x108
800b4ac: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4b0: 681b ldr r3, [r3, #0]
800b4b2: 699a ldr r2, [r3, #24]
800b4b4: f507 7384 add.w r3, r7, #264 @ 0x108
800b4b8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4bc: 681b ldr r3, [r3, #0]
800b4be: 691b ldr r3, [r3, #16]
800b4c0: 429a cmp r2, r3
800b4c2: d917 bls.n 800b4f4 <USB_EPStartXfer+0xdf8>
{
len = ep->maxpacket;
800b4c4: f507 7384 add.w r3, r7, #264 @ 0x108
800b4c8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4cc: 681b ldr r3, [r3, #0]
800b4ce: 691b ldr r3, [r3, #16]
800b4d0: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800b4d4: f507 7384 add.w r3, r7, #264 @ 0x108
800b4d8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4dc: 681b ldr r3, [r3, #0]
800b4de: 699a ldr r2, [r3, #24]
800b4e0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b4e4: 1ad2 subs r2, r2, r3
800b4e6: f507 7384 add.w r3, r7, #264 @ 0x108
800b4ea: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4ee: 681b ldr r3, [r3, #0]
800b4f0: 619a str r2, [r3, #24]
800b4f2: e00e b.n 800b512 <USB_EPStartXfer+0xe16>
}
else
{
len = ep->xfer_len;
800b4f4: f507 7384 add.w r3, r7, #264 @ 0x108
800b4f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b4fc: 681b ldr r3, [r3, #0]
800b4fe: 699b ldr r3, [r3, #24]
800b500: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800b504: f507 7384 add.w r3, r7, #264 @ 0x108
800b508: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b50c: 681b ldr r3, [r3, #0]
800b50e: 2200 movs r2, #0
800b510: 619a str r2, [r3, #24]
}
/* configure and validate Rx endpoint */
PCD_SET_EP_RX_CNT(USBx, ep->num, len);
800b512: f507 7384 add.w r3, r7, #264 @ 0x108
800b516: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b51a: 681b ldr r3, [r3, #0]
800b51c: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800b520: f507 7384 add.w r3, r7, #264 @ 0x108
800b524: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b528: 681b ldr r3, [r3, #0]
800b52a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b52e: b29b uxth r3, r3
800b530: 461a mov r2, r3
800b532: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800b536: 4413 add r3, r2
800b538: f8c7 3090 str.w r3, [r7, #144] @ 0x90
800b53c: f507 7384 add.w r3, r7, #264 @ 0x108
800b540: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b544: 681b ldr r3, [r3, #0]
800b546: 781b ldrb r3, [r3, #0]
800b548: 011a lsls r2, r3, #4
800b54a: f8d7 3090 ldr.w r3, [r7, #144] @ 0x90
800b54e: 4413 add r3, r2
800b550: f203 430c addw r3, r3, #1036 @ 0x40c
800b554: f8c7 308c str.w r3, [r7, #140] @ 0x8c
800b558: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b55c: 881b ldrh r3, [r3, #0]
800b55e: b29b uxth r3, r3
800b560: f3c3 0309 ubfx r3, r3, #0, #10
800b564: b29a uxth r2, r3
800b566: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b56a: 801a strh r2, [r3, #0]
800b56c: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b570: 2b3e cmp r3, #62 @ 0x3e
800b572: d924 bls.n 800b5be <USB_EPStartXfer+0xec2>
800b574: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b578: 095b lsrs r3, r3, #5
800b57a: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b57e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b582: f003 031f and.w r3, r3, #31
800b586: 2b00 cmp r3, #0
800b588: d104 bne.n 800b594 <USB_EPStartXfer+0xe98>
800b58a: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b58e: 3b01 subs r3, #1
800b590: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b594: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b598: 881b ldrh r3, [r3, #0]
800b59a: b29a uxth r2, r3
800b59c: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b5a0: b29b uxth r3, r3
800b5a2: 029b lsls r3, r3, #10
800b5a4: b29b uxth r3, r3
800b5a6: 4313 orrs r3, r2
800b5a8: b29b uxth r3, r3
800b5aa: ea6f 4343 mvn.w r3, r3, lsl #17
800b5ae: ea6f 4353 mvn.w r3, r3, lsr #17
800b5b2: b29a uxth r2, r3
800b5b4: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b5b8: 801a strh r2, [r3, #0]
800b5ba: f000 bc10 b.w 800bdde <USB_EPStartXfer+0x16e2>
800b5be: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5c2: 2b00 cmp r3, #0
800b5c4: d10c bne.n 800b5e0 <USB_EPStartXfer+0xee4>
800b5c6: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b5ca: 881b ldrh r3, [r3, #0]
800b5cc: b29b uxth r3, r3
800b5ce: ea6f 4343 mvn.w r3, r3, lsl #17
800b5d2: ea6f 4353 mvn.w r3, r3, lsr #17
800b5d6: b29a uxth r2, r3
800b5d8: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b5dc: 801a strh r2, [r3, #0]
800b5de: e3fe b.n 800bdde <USB_EPStartXfer+0x16e2>
800b5e0: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5e4: 085b lsrs r3, r3, #1
800b5e6: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b5ea: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800b5ee: f003 0301 and.w r3, r3, #1
800b5f2: 2b00 cmp r3, #0
800b5f4: d004 beq.n 800b600 <USB_EPStartXfer+0xf04>
800b5f6: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b5fa: 3301 adds r3, #1
800b5fc: f8c7 30e8 str.w r3, [r7, #232] @ 0xe8
800b600: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b604: 881b ldrh r3, [r3, #0]
800b606: b29a uxth r2, r3
800b608: f8d7 30e8 ldr.w r3, [r7, #232] @ 0xe8
800b60c: b29b uxth r3, r3
800b60e: 029b lsls r3, r3, #10
800b610: b29b uxth r3, r3
800b612: 4313 orrs r3, r2
800b614: b29a uxth r2, r3
800b616: f8d7 308c ldr.w r3, [r7, #140] @ 0x8c
800b61a: 801a strh r2, [r3, #0]
800b61c: e3df b.n 800bdde <USB_EPStartXfer+0x16e2>
#if (USE_USB_DOUBLE_BUFFER == 1U)
else
{
/* First Transfer Coming From HAL_PCD_EP_Receive & From ISR */
/* Set the Double buffer counter */
if (ep->type == EP_TYPE_BULK)
800b61e: f507 7384 add.w r3, r7, #264 @ 0x108
800b622: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b626: 681b ldr r3, [r3, #0]
800b628: 78db ldrb r3, [r3, #3]
800b62a: 2b02 cmp r3, #2
800b62c: f040 8218 bne.w 800ba60 <USB_EPStartXfer+0x1364>
{
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, ep->maxpacket);
800b630: f507 7384 add.w r3, r7, #264 @ 0x108
800b634: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b638: 681b ldr r3, [r3, #0]
800b63a: 785b ldrb r3, [r3, #1]
800b63c: 2b00 cmp r3, #0
800b63e: f040 809d bne.w 800b77c <USB_EPStartXfer+0x1080>
800b642: f507 7384 add.w r3, r7, #264 @ 0x108
800b646: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b64a: 681b ldr r3, [r3, #0]
800b64c: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b650: f507 7384 add.w r3, r7, #264 @ 0x108
800b654: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b658: 681b ldr r3, [r3, #0]
800b65a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b65e: b29b uxth r3, r3
800b660: 461a mov r2, r3
800b662: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b666: 4413 add r3, r2
800b668: f8c7 30ac str.w r3, [r7, #172] @ 0xac
800b66c: f507 7384 add.w r3, r7, #264 @ 0x108
800b670: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b674: 681b ldr r3, [r3, #0]
800b676: 781b ldrb r3, [r3, #0]
800b678: 011a lsls r2, r3, #4
800b67a: f8d7 30ac ldr.w r3, [r7, #172] @ 0xac
800b67e: 4413 add r3, r2
800b680: f203 4304 addw r3, r3, #1028 @ 0x404
800b684: f8c7 30a8 str.w r3, [r7, #168] @ 0xa8
800b688: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b68c: 881b ldrh r3, [r3, #0]
800b68e: b29b uxth r3, r3
800b690: f3c3 0309 ubfx r3, r3, #0, #10
800b694: b29a uxth r2, r3
800b696: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b69a: 801a strh r2, [r3, #0]
800b69c: f507 7384 add.w r3, r7, #264 @ 0x108
800b6a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6a4: 681b ldr r3, [r3, #0]
800b6a6: 691b ldr r3, [r3, #16]
800b6a8: 2b3e cmp r3, #62 @ 0x3e
800b6aa: d92b bls.n 800b704 <USB_EPStartXfer+0x1008>
800b6ac: f507 7384 add.w r3, r7, #264 @ 0x108
800b6b0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6b4: 681b ldr r3, [r3, #0]
800b6b6: 691b ldr r3, [r3, #16]
800b6b8: 095b lsrs r3, r3, #5
800b6ba: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b6be: f507 7384 add.w r3, r7, #264 @ 0x108
800b6c2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b6c6: 681b ldr r3, [r3, #0]
800b6c8: 691b ldr r3, [r3, #16]
800b6ca: f003 031f and.w r3, r3, #31
800b6ce: 2b00 cmp r3, #0
800b6d0: d104 bne.n 800b6dc <USB_EPStartXfer+0xfe0>
800b6d2: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b6d6: 3b01 subs r3, #1
800b6d8: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b6dc: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b6e0: 881b ldrh r3, [r3, #0]
800b6e2: b29a uxth r2, r3
800b6e4: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b6e8: b29b uxth r3, r3
800b6ea: 029b lsls r3, r3, #10
800b6ec: b29b uxth r3, r3
800b6ee: 4313 orrs r3, r2
800b6f0: b29b uxth r3, r3
800b6f2: ea6f 4343 mvn.w r3, r3, lsl #17
800b6f6: ea6f 4353 mvn.w r3, r3, lsr #17
800b6fa: b29a uxth r2, r3
800b6fc: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b700: 801a strh r2, [r3, #0]
800b702: e070 b.n 800b7e6 <USB_EPStartXfer+0x10ea>
800b704: f507 7384 add.w r3, r7, #264 @ 0x108
800b708: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b70c: 681b ldr r3, [r3, #0]
800b70e: 691b ldr r3, [r3, #16]
800b710: 2b00 cmp r3, #0
800b712: d10c bne.n 800b72e <USB_EPStartXfer+0x1032>
800b714: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b718: 881b ldrh r3, [r3, #0]
800b71a: b29b uxth r3, r3
800b71c: ea6f 4343 mvn.w r3, r3, lsl #17
800b720: ea6f 4353 mvn.w r3, r3, lsr #17
800b724: b29a uxth r2, r3
800b726: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b72a: 801a strh r2, [r3, #0]
800b72c: e05b b.n 800b7e6 <USB_EPStartXfer+0x10ea>
800b72e: f507 7384 add.w r3, r7, #264 @ 0x108
800b732: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b736: 681b ldr r3, [r3, #0]
800b738: 691b ldr r3, [r3, #16]
800b73a: 085b lsrs r3, r3, #1
800b73c: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b740: f507 7384 add.w r3, r7, #264 @ 0x108
800b744: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b748: 681b ldr r3, [r3, #0]
800b74a: 691b ldr r3, [r3, #16]
800b74c: f003 0301 and.w r3, r3, #1
800b750: 2b00 cmp r3, #0
800b752: d004 beq.n 800b75e <USB_EPStartXfer+0x1062>
800b754: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b758: 3301 adds r3, #1
800b75a: f8c7 30e4 str.w r3, [r7, #228] @ 0xe4
800b75e: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b762: 881b ldrh r3, [r3, #0]
800b764: b29a uxth r2, r3
800b766: f8d7 30e4 ldr.w r3, [r7, #228] @ 0xe4
800b76a: b29b uxth r3, r3
800b76c: 029b lsls r3, r3, #10
800b76e: b29b uxth r3, r3
800b770: 4313 orrs r3, r2
800b772: b29a uxth r2, r3
800b774: f8d7 30a8 ldr.w r3, [r7, #168] @ 0xa8
800b778: 801a strh r2, [r3, #0]
800b77a: e034 b.n 800b7e6 <USB_EPStartXfer+0x10ea>
800b77c: f507 7384 add.w r3, r7, #264 @ 0x108
800b780: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b784: 681b ldr r3, [r3, #0]
800b786: 785b ldrb r3, [r3, #1]
800b788: 2b01 cmp r3, #1
800b78a: d12c bne.n 800b7e6 <USB_EPStartXfer+0x10ea>
800b78c: f507 7384 add.w r3, r7, #264 @ 0x108
800b790: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b794: 681b ldr r3, [r3, #0]
800b796: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b79a: f507 7384 add.w r3, r7, #264 @ 0x108
800b79e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b7a2: 681b ldr r3, [r3, #0]
800b7a4: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b7a8: b29b uxth r3, r3
800b7aa: 461a mov r2, r3
800b7ac: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b7b0: 4413 add r3, r2
800b7b2: f8c7 30b4 str.w r3, [r7, #180] @ 0xb4
800b7b6: f507 7384 add.w r3, r7, #264 @ 0x108
800b7ba: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7be: 681b ldr r3, [r3, #0]
800b7c0: 781b ldrb r3, [r3, #0]
800b7c2: 011a lsls r2, r3, #4
800b7c4: f8d7 30b4 ldr.w r3, [r7, #180] @ 0xb4
800b7c8: 4413 add r3, r2
800b7ca: f203 4304 addw r3, r3, #1028 @ 0x404
800b7ce: f8c7 30b0 str.w r3, [r7, #176] @ 0xb0
800b7d2: f507 7384 add.w r3, r7, #264 @ 0x108
800b7d6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7da: 681b ldr r3, [r3, #0]
800b7dc: 691b ldr r3, [r3, #16]
800b7de: b29a uxth r2, r3
800b7e0: f8d7 30b0 ldr.w r3, [r7, #176] @ 0xb0
800b7e4: 801a strh r2, [r3, #0]
800b7e6: f507 7384 add.w r3, r7, #264 @ 0x108
800b7ea: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b7ee: 681b ldr r3, [r3, #0]
800b7f0: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b7f4: f507 7384 add.w r3, r7, #264 @ 0x108
800b7f8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b7fc: 681b ldr r3, [r3, #0]
800b7fe: 785b ldrb r3, [r3, #1]
800b800: 2b00 cmp r3, #0
800b802: f040 809d bne.w 800b940 <USB_EPStartXfer+0x1244>
800b806: f507 7384 add.w r3, r7, #264 @ 0x108
800b80a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b80e: 681b ldr r3, [r3, #0]
800b810: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b814: f507 7384 add.w r3, r7, #264 @ 0x108
800b818: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b81c: 681b ldr r3, [r3, #0]
800b81e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b822: b29b uxth r3, r3
800b824: 461a mov r2, r3
800b826: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b82a: 4413 add r3, r2
800b82c: f8c7 309c str.w r3, [r7, #156] @ 0x9c
800b830: f507 7384 add.w r3, r7, #264 @ 0x108
800b834: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b838: 681b ldr r3, [r3, #0]
800b83a: 781b ldrb r3, [r3, #0]
800b83c: 011a lsls r2, r3, #4
800b83e: f8d7 309c ldr.w r3, [r7, #156] @ 0x9c
800b842: 4413 add r3, r2
800b844: f203 430c addw r3, r3, #1036 @ 0x40c
800b848: f8c7 3098 str.w r3, [r7, #152] @ 0x98
800b84c: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b850: 881b ldrh r3, [r3, #0]
800b852: b29b uxth r3, r3
800b854: f3c3 0309 ubfx r3, r3, #0, #10
800b858: b29a uxth r2, r3
800b85a: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b85e: 801a strh r2, [r3, #0]
800b860: f507 7384 add.w r3, r7, #264 @ 0x108
800b864: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b868: 681b ldr r3, [r3, #0]
800b86a: 691b ldr r3, [r3, #16]
800b86c: 2b3e cmp r3, #62 @ 0x3e
800b86e: d92b bls.n 800b8c8 <USB_EPStartXfer+0x11cc>
800b870: f507 7384 add.w r3, r7, #264 @ 0x108
800b874: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b878: 681b ldr r3, [r3, #0]
800b87a: 691b ldr r3, [r3, #16]
800b87c: 095b lsrs r3, r3, #5
800b87e: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b882: f507 7384 add.w r3, r7, #264 @ 0x108
800b886: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b88a: 681b ldr r3, [r3, #0]
800b88c: 691b ldr r3, [r3, #16]
800b88e: f003 031f and.w r3, r3, #31
800b892: 2b00 cmp r3, #0
800b894: d104 bne.n 800b8a0 <USB_EPStartXfer+0x11a4>
800b896: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b89a: 3b01 subs r3, #1
800b89c: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b8a0: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b8a4: 881b ldrh r3, [r3, #0]
800b8a6: b29a uxth r2, r3
800b8a8: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b8ac: b29b uxth r3, r3
800b8ae: 029b lsls r3, r3, #10
800b8b0: b29b uxth r3, r3
800b8b2: 4313 orrs r3, r2
800b8b4: b29b uxth r3, r3
800b8b6: ea6f 4343 mvn.w r3, r3, lsl #17
800b8ba: ea6f 4353 mvn.w r3, r3, lsr #17
800b8be: b29a uxth r2, r3
800b8c0: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b8c4: 801a strh r2, [r3, #0]
800b8c6: e069 b.n 800b99c <USB_EPStartXfer+0x12a0>
800b8c8: f507 7384 add.w r3, r7, #264 @ 0x108
800b8cc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8d0: 681b ldr r3, [r3, #0]
800b8d2: 691b ldr r3, [r3, #16]
800b8d4: 2b00 cmp r3, #0
800b8d6: d10c bne.n 800b8f2 <USB_EPStartXfer+0x11f6>
800b8d8: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b8dc: 881b ldrh r3, [r3, #0]
800b8de: b29b uxth r3, r3
800b8e0: ea6f 4343 mvn.w r3, r3, lsl #17
800b8e4: ea6f 4353 mvn.w r3, r3, lsr #17
800b8e8: b29a uxth r2, r3
800b8ea: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b8ee: 801a strh r2, [r3, #0]
800b8f0: e054 b.n 800b99c <USB_EPStartXfer+0x12a0>
800b8f2: f507 7384 add.w r3, r7, #264 @ 0x108
800b8f6: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b8fa: 681b ldr r3, [r3, #0]
800b8fc: 691b ldr r3, [r3, #16]
800b8fe: 085b lsrs r3, r3, #1
800b900: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b904: f507 7384 add.w r3, r7, #264 @ 0x108
800b908: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b90c: 681b ldr r3, [r3, #0]
800b90e: 691b ldr r3, [r3, #16]
800b910: f003 0301 and.w r3, r3, #1
800b914: 2b00 cmp r3, #0
800b916: d004 beq.n 800b922 <USB_EPStartXfer+0x1226>
800b918: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b91c: 3301 adds r3, #1
800b91e: f8c7 30e0 str.w r3, [r7, #224] @ 0xe0
800b922: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b926: 881b ldrh r3, [r3, #0]
800b928: b29a uxth r2, r3
800b92a: f8d7 30e0 ldr.w r3, [r7, #224] @ 0xe0
800b92e: b29b uxth r3, r3
800b930: 029b lsls r3, r3, #10
800b932: b29b uxth r3, r3
800b934: 4313 orrs r3, r2
800b936: b29a uxth r2, r3
800b938: f8d7 3098 ldr.w r3, [r7, #152] @ 0x98
800b93c: 801a strh r2, [r3, #0]
800b93e: e02d b.n 800b99c <USB_EPStartXfer+0x12a0>
800b940: f507 7384 add.w r3, r7, #264 @ 0x108
800b944: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b948: 681b ldr r3, [r3, #0]
800b94a: 785b ldrb r3, [r3, #1]
800b94c: 2b01 cmp r3, #1
800b94e: d125 bne.n 800b99c <USB_EPStartXfer+0x12a0>
800b950: f507 7384 add.w r3, r7, #264 @ 0x108
800b954: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b958: 681b ldr r3, [r3, #0]
800b95a: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800b95e: b29b uxth r3, r3
800b960: 461a mov r2, r3
800b962: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800b966: 4413 add r3, r2
800b968: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4
800b96c: f507 7384 add.w r3, r7, #264 @ 0x108
800b970: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b974: 681b ldr r3, [r3, #0]
800b976: 781b ldrb r3, [r3, #0]
800b978: 011a lsls r2, r3, #4
800b97a: f8d7 30a4 ldr.w r3, [r7, #164] @ 0xa4
800b97e: 4413 add r3, r2
800b980: f203 430c addw r3, r3, #1036 @ 0x40c
800b984: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0
800b988: f507 7384 add.w r3, r7, #264 @ 0x108
800b98c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b990: 681b ldr r3, [r3, #0]
800b992: 691b ldr r3, [r3, #16]
800b994: b29a uxth r2, r3
800b996: f8d7 30a0 ldr.w r3, [r7, #160] @ 0xa0
800b99a: 801a strh r2, [r3, #0]
/* Coming from ISR */
if (ep->xfer_count != 0U)
800b99c: f507 7384 add.w r3, r7, #264 @ 0x108
800b9a0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b9a4: 681b ldr r3, [r3, #0]
800b9a6: 69db ldr r3, [r3, #28]
800b9a8: 2b00 cmp r3, #0
800b9aa: f000 8218 beq.w 800bdde <USB_EPStartXfer+0x16e2>
{
/* update last value to check if there is blocking state */
wEPVal = PCD_GET_ENDPOINT(USBx, ep->num);
800b9ae: f507 7384 add.w r3, r7, #264 @ 0x108
800b9b2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800b9b6: 681a ldr r2, [r3, #0]
800b9b8: f507 7384 add.w r3, r7, #264 @ 0x108
800b9bc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800b9c0: 681b ldr r3, [r3, #0]
800b9c2: 781b ldrb r3, [r3, #0]
800b9c4: 009b lsls r3, r3, #2
800b9c6: 4413 add r3, r2
800b9c8: 881b ldrh r3, [r3, #0]
800b9ca: f8a7 3096 strh.w r3, [r7, #150] @ 0x96
/*Blocking State */
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800b9ce: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b9d2: f403 4380 and.w r3, r3, #16384 @ 0x4000
800b9d6: 2b00 cmp r3, #0
800b9d8: d005 beq.n 800b9e6 <USB_EPStartXfer+0x12ea>
800b9da: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b9de: f003 0340 and.w r3, r3, #64 @ 0x40
800b9e2: 2b00 cmp r3, #0
800b9e4: d10d bne.n 800ba02 <USB_EPStartXfer+0x1306>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800b9e6: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b9ea: f403 4380 and.w r3, r3, #16384 @ 0x4000
if ((((wEPVal & USB_EP_DTOG_RX) != 0U) && ((wEPVal & USB_EP_DTOG_TX) != 0U)) ||
800b9ee: 2b00 cmp r3, #0
800b9f0: f040 81f5 bne.w 800bdde <USB_EPStartXfer+0x16e2>
(((wEPVal & USB_EP_DTOG_RX) == 0U) && ((wEPVal & USB_EP_DTOG_TX) == 0U)))
800b9f4: f8b7 3096 ldrh.w r3, [r7, #150] @ 0x96
800b9f8: f003 0340 and.w r3, r3, #64 @ 0x40
800b9fc: 2b00 cmp r3, #0
800b9fe: f040 81ee bne.w 800bdde <USB_EPStartXfer+0x16e2>
{
PCD_FREE_USER_BUFFER(USBx, ep->num, 0U);
800ba02: f507 7384 add.w r3, r7, #264 @ 0x108
800ba06: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ba0a: 681a ldr r2, [r3, #0]
800ba0c: f507 7384 add.w r3, r7, #264 @ 0x108
800ba10: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba14: 681b ldr r3, [r3, #0]
800ba16: 781b ldrb r3, [r3, #0]
800ba18: 009b lsls r3, r3, #2
800ba1a: 4413 add r3, r2
800ba1c: 881b ldrh r3, [r3, #0]
800ba1e: b29b uxth r3, r3
800ba20: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800ba24: f023 0370 bic.w r3, r3, #112 @ 0x70
800ba28: f8a7 3094 strh.w r3, [r7, #148] @ 0x94
800ba2c: f507 7384 add.w r3, r7, #264 @ 0x108
800ba30: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800ba34: 681a ldr r2, [r3, #0]
800ba36: f507 7384 add.w r3, r7, #264 @ 0x108
800ba3a: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba3e: 681b ldr r3, [r3, #0]
800ba40: 781b ldrb r3, [r3, #0]
800ba42: 009b lsls r3, r3, #2
800ba44: 441a add r2, r3
800ba46: f8b7 3094 ldrh.w r3, [r7, #148] @ 0x94
800ba4a: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800ba4e: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800ba52: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800ba56: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800ba5a: b29b uxth r3, r3
800ba5c: 8013 strh r3, [r2, #0]
800ba5e: e1be b.n 800bdde <USB_EPStartXfer+0x16e2>
}
}
}
/* iso out double */
else if (ep->type == EP_TYPE_ISOC)
800ba60: f507 7384 add.w r3, r7, #264 @ 0x108
800ba64: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba68: 681b ldr r3, [r3, #0]
800ba6a: 78db ldrb r3, [r3, #3]
800ba6c: 2b01 cmp r3, #1
800ba6e: f040 81b4 bne.w 800bdda <USB_EPStartXfer+0x16de>
{
/* Multi packet transfer */
if (ep->xfer_len > ep->maxpacket)
800ba72: f507 7384 add.w r3, r7, #264 @ 0x108
800ba76: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba7a: 681b ldr r3, [r3, #0]
800ba7c: 699a ldr r2, [r3, #24]
800ba7e: f507 7384 add.w r3, r7, #264 @ 0x108
800ba82: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba86: 681b ldr r3, [r3, #0]
800ba88: 691b ldr r3, [r3, #16]
800ba8a: 429a cmp r2, r3
800ba8c: d917 bls.n 800babe <USB_EPStartXfer+0x13c2>
{
len = ep->maxpacket;
800ba8e: f507 7384 add.w r3, r7, #264 @ 0x108
800ba92: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800ba96: 681b ldr r3, [r3, #0]
800ba98: 691b ldr r3, [r3, #16]
800ba9a: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len -= len;
800ba9e: f507 7384 add.w r3, r7, #264 @ 0x108
800baa2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800baa6: 681b ldr r3, [r3, #0]
800baa8: 699a ldr r2, [r3, #24]
800baaa: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800baae: 1ad2 subs r2, r2, r3
800bab0: f507 7384 add.w r3, r7, #264 @ 0x108
800bab4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bab8: 681b ldr r3, [r3, #0]
800baba: 619a str r2, [r3, #24]
800babc: e00e b.n 800badc <USB_EPStartXfer+0x13e0>
}
else
{
len = ep->xfer_len;
800babe: f507 7384 add.w r3, r7, #264 @ 0x108
800bac2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bac6: 681b ldr r3, [r3, #0]
800bac8: 699b ldr r3, [r3, #24]
800baca: f8c7 3104 str.w r3, [r7, #260] @ 0x104
ep->xfer_len = 0U;
800bace: f507 7384 add.w r3, r7, #264 @ 0x108
800bad2: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bad6: 681b ldr r3, [r3, #0]
800bad8: 2200 movs r2, #0
800bada: 619a str r2, [r3, #24]
}
PCD_SET_EP_DBUF_CNT(USBx, ep->num, ep->is_in, len);
800badc: f507 7384 add.w r3, r7, #264 @ 0x108
800bae0: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bae4: 681b ldr r3, [r3, #0]
800bae6: 785b ldrb r3, [r3, #1]
800bae8: 2b00 cmp r3, #0
800baea: f040 8085 bne.w 800bbf8 <USB_EPStartXfer+0x14fc>
800baee: f507 7384 add.w r3, r7, #264 @ 0x108
800baf2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800baf6: 681b ldr r3, [r3, #0]
800baf8: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800bafc: f507 7384 add.w r3, r7, #264 @ 0x108
800bb00: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bb04: 681b ldr r3, [r3, #0]
800bb06: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bb0a: b29b uxth r3, r3
800bb0c: 461a mov r2, r3
800bb0e: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800bb12: 4413 add r3, r2
800bb14: f8c7 30cc str.w r3, [r7, #204] @ 0xcc
800bb18: f507 7384 add.w r3, r7, #264 @ 0x108
800bb1c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bb20: 681b ldr r3, [r3, #0]
800bb22: 781b ldrb r3, [r3, #0]
800bb24: 011a lsls r2, r3, #4
800bb26: f8d7 30cc ldr.w r3, [r7, #204] @ 0xcc
800bb2a: 4413 add r3, r2
800bb2c: f203 4304 addw r3, r3, #1028 @ 0x404
800bb30: f8c7 30c8 str.w r3, [r7, #200] @ 0xc8
800bb34: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bb38: 881b ldrh r3, [r3, #0]
800bb3a: b29b uxth r3, r3
800bb3c: f3c3 0309 ubfx r3, r3, #0, #10
800bb40: b29a uxth r2, r3
800bb42: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bb46: 801a strh r2, [r3, #0]
800bb48: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bb4c: 2b3e cmp r3, #62 @ 0x3e
800bb4e: d923 bls.n 800bb98 <USB_EPStartXfer+0x149c>
800bb50: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bb54: 095b lsrs r3, r3, #5
800bb56: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bb5a: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bb5e: f003 031f and.w r3, r3, #31
800bb62: 2b00 cmp r3, #0
800bb64: d104 bne.n 800bb70 <USB_EPStartXfer+0x1474>
800bb66: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bb6a: 3b01 subs r3, #1
800bb6c: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bb70: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bb74: 881b ldrh r3, [r3, #0]
800bb76: b29a uxth r2, r3
800bb78: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bb7c: b29b uxth r3, r3
800bb7e: 029b lsls r3, r3, #10
800bb80: b29b uxth r3, r3
800bb82: 4313 orrs r3, r2
800bb84: b29b uxth r3, r3
800bb86: ea6f 4343 mvn.w r3, r3, lsl #17
800bb8a: ea6f 4353 mvn.w r3, r3, lsr #17
800bb8e: b29a uxth r2, r3
800bb90: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bb94: 801a strh r2, [r3, #0]
800bb96: e060 b.n 800bc5a <USB_EPStartXfer+0x155e>
800bb98: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bb9c: 2b00 cmp r3, #0
800bb9e: d10c bne.n 800bbba <USB_EPStartXfer+0x14be>
800bba0: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bba4: 881b ldrh r3, [r3, #0]
800bba6: b29b uxth r3, r3
800bba8: ea6f 4343 mvn.w r3, r3, lsl #17
800bbac: ea6f 4353 mvn.w r3, r3, lsr #17
800bbb0: b29a uxth r2, r3
800bbb2: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bbb6: 801a strh r2, [r3, #0]
800bbb8: e04f b.n 800bc5a <USB_EPStartXfer+0x155e>
800bbba: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bbbe: 085b lsrs r3, r3, #1
800bbc0: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bbc4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bbc8: f003 0301 and.w r3, r3, #1
800bbcc: 2b00 cmp r3, #0
800bbce: d004 beq.n 800bbda <USB_EPStartXfer+0x14de>
800bbd0: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bbd4: 3301 adds r3, #1
800bbd6: f8c7 30dc str.w r3, [r7, #220] @ 0xdc
800bbda: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bbde: 881b ldrh r3, [r3, #0]
800bbe0: b29a uxth r2, r3
800bbe2: f8d7 30dc ldr.w r3, [r7, #220] @ 0xdc
800bbe6: b29b uxth r3, r3
800bbe8: 029b lsls r3, r3, #10
800bbea: b29b uxth r3, r3
800bbec: 4313 orrs r3, r2
800bbee: b29a uxth r2, r3
800bbf0: f8d7 30c8 ldr.w r3, [r7, #200] @ 0xc8
800bbf4: 801a strh r2, [r3, #0]
800bbf6: e030 b.n 800bc5a <USB_EPStartXfer+0x155e>
800bbf8: f507 7384 add.w r3, r7, #264 @ 0x108
800bbfc: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc00: 681b ldr r3, [r3, #0]
800bc02: 785b ldrb r3, [r3, #1]
800bc04: 2b01 cmp r3, #1
800bc06: d128 bne.n 800bc5a <USB_EPStartXfer+0x155e>
800bc08: f507 7384 add.w r3, r7, #264 @ 0x108
800bc0c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bc10: 681b ldr r3, [r3, #0]
800bc12: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800bc16: f507 7384 add.w r3, r7, #264 @ 0x108
800bc1a: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bc1e: 681b ldr r3, [r3, #0]
800bc20: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bc24: b29b uxth r3, r3
800bc26: 461a mov r2, r3
800bc28: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800bc2c: 4413 add r3, r2
800bc2e: f8c7 30d4 str.w r3, [r7, #212] @ 0xd4
800bc32: f507 7384 add.w r3, r7, #264 @ 0x108
800bc36: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc3a: 681b ldr r3, [r3, #0]
800bc3c: 781b ldrb r3, [r3, #0]
800bc3e: 011a lsls r2, r3, #4
800bc40: f8d7 30d4 ldr.w r3, [r7, #212] @ 0xd4
800bc44: 4413 add r3, r2
800bc46: f203 4304 addw r3, r3, #1028 @ 0x404
800bc4a: f8c7 30d0 str.w r3, [r7, #208] @ 0xd0
800bc4e: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bc52: b29a uxth r2, r3
800bc54: f8d7 30d0 ldr.w r3, [r7, #208] @ 0xd0
800bc58: 801a strh r2, [r3, #0]
800bc5a: f507 7384 add.w r3, r7, #264 @ 0x108
800bc5e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bc62: 681b ldr r3, [r3, #0]
800bc64: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800bc68: f507 7384 add.w r3, r7, #264 @ 0x108
800bc6c: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bc70: 681b ldr r3, [r3, #0]
800bc72: 785b ldrb r3, [r3, #1]
800bc74: 2b00 cmp r3, #0
800bc76: f040 8085 bne.w 800bd84 <USB_EPStartXfer+0x1688>
800bc7a: f507 7384 add.w r3, r7, #264 @ 0x108
800bc7e: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bc82: 681b ldr r3, [r3, #0]
800bc84: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800bc88: f507 7384 add.w r3, r7, #264 @ 0x108
800bc8c: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bc90: 681b ldr r3, [r3, #0]
800bc92: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bc96: b29b uxth r3, r3
800bc98: 461a mov r2, r3
800bc9a: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800bc9e: 4413 add r3, r2
800bca0: f8c7 30bc str.w r3, [r7, #188] @ 0xbc
800bca4: f507 7384 add.w r3, r7, #264 @ 0x108
800bca8: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bcac: 681b ldr r3, [r3, #0]
800bcae: 781b ldrb r3, [r3, #0]
800bcb0: 011a lsls r2, r3, #4
800bcb2: f8d7 30bc ldr.w r3, [r7, #188] @ 0xbc
800bcb6: 4413 add r3, r2
800bcb8: f203 430c addw r3, r3, #1036 @ 0x40c
800bcbc: f8c7 30b8 str.w r3, [r7, #184] @ 0xb8
800bcc0: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bcc4: 881b ldrh r3, [r3, #0]
800bcc6: b29b uxth r3, r3
800bcc8: f3c3 0309 ubfx r3, r3, #0, #10
800bccc: b29a uxth r2, r3
800bcce: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bcd2: 801a strh r2, [r3, #0]
800bcd4: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bcd8: 2b3e cmp r3, #62 @ 0x3e
800bcda: d923 bls.n 800bd24 <USB_EPStartXfer+0x1628>
800bcdc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bce0: 095b lsrs r3, r3, #5
800bce2: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bce6: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bcea: f003 031f and.w r3, r3, #31
800bcee: 2b00 cmp r3, #0
800bcf0: d104 bne.n 800bcfc <USB_EPStartXfer+0x1600>
800bcf2: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bcf6: 3b01 subs r3, #1
800bcf8: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bcfc: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bd00: 881b ldrh r3, [r3, #0]
800bd02: b29a uxth r2, r3
800bd04: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bd08: b29b uxth r3, r3
800bd0a: 029b lsls r3, r3, #10
800bd0c: b29b uxth r3, r3
800bd0e: 4313 orrs r3, r2
800bd10: b29b uxth r3, r3
800bd12: ea6f 4343 mvn.w r3, r3, lsl #17
800bd16: ea6f 4353 mvn.w r3, r3, lsr #17
800bd1a: b29a uxth r2, r3
800bd1c: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bd20: 801a strh r2, [r3, #0]
800bd22: e05c b.n 800bdde <USB_EPStartXfer+0x16e2>
800bd24: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd28: 2b00 cmp r3, #0
800bd2a: d10c bne.n 800bd46 <USB_EPStartXfer+0x164a>
800bd2c: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bd30: 881b ldrh r3, [r3, #0]
800bd32: b29b uxth r3, r3
800bd34: ea6f 4343 mvn.w r3, r3, lsl #17
800bd38: ea6f 4353 mvn.w r3, r3, lsr #17
800bd3c: b29a uxth r2, r3
800bd3e: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bd42: 801a strh r2, [r3, #0]
800bd44: e04b b.n 800bdde <USB_EPStartXfer+0x16e2>
800bd46: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd4a: 085b lsrs r3, r3, #1
800bd4c: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bd50: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bd54: f003 0301 and.w r3, r3, #1
800bd58: 2b00 cmp r3, #0
800bd5a: d004 beq.n 800bd66 <USB_EPStartXfer+0x166a>
800bd5c: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bd60: 3301 adds r3, #1
800bd62: f8c7 30d8 str.w r3, [r7, #216] @ 0xd8
800bd66: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bd6a: 881b ldrh r3, [r3, #0]
800bd6c: b29a uxth r2, r3
800bd6e: f8d7 30d8 ldr.w r3, [r7, #216] @ 0xd8
800bd72: b29b uxth r3, r3
800bd74: 029b lsls r3, r3, #10
800bd76: b29b uxth r3, r3
800bd78: 4313 orrs r3, r2
800bd7a: b29a uxth r2, r3
800bd7c: f8d7 30b8 ldr.w r3, [r7, #184] @ 0xb8
800bd80: 801a strh r2, [r3, #0]
800bd82: e02c b.n 800bdde <USB_EPStartXfer+0x16e2>
800bd84: f507 7384 add.w r3, r7, #264 @ 0x108
800bd88: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bd8c: 681b ldr r3, [r3, #0]
800bd8e: 785b ldrb r3, [r3, #1]
800bd90: 2b01 cmp r3, #1
800bd92: d124 bne.n 800bdde <USB_EPStartXfer+0x16e2>
800bd94: f507 7384 add.w r3, r7, #264 @ 0x108
800bd98: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bd9c: 681b ldr r3, [r3, #0]
800bd9e: f8b3 3050 ldrh.w r3, [r3, #80] @ 0x50
800bda2: b29b uxth r3, r3
800bda4: 461a mov r2, r3
800bda6: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800bdaa: 4413 add r3, r2
800bdac: f8c7 30c4 str.w r3, [r7, #196] @ 0xc4
800bdb0: f507 7384 add.w r3, r7, #264 @ 0x108
800bdb4: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bdb8: 681b ldr r3, [r3, #0]
800bdba: 781b ldrb r3, [r3, #0]
800bdbc: 011a lsls r2, r3, #4
800bdbe: f8d7 30c4 ldr.w r3, [r7, #196] @ 0xc4
800bdc2: 4413 add r3, r2
800bdc4: f203 430c addw r3, r3, #1036 @ 0x40c
800bdc8: f8c7 30c0 str.w r3, [r7, #192] @ 0xc0
800bdcc: f8d7 3104 ldr.w r3, [r7, #260] @ 0x104
800bdd0: b29a uxth r2, r3
800bdd2: f8d7 30c0 ldr.w r3, [r7, #192] @ 0xc0
800bdd6: 801a strh r2, [r3, #0]
800bdd8: e001 b.n 800bdde <USB_EPStartXfer+0x16e2>
}
else
{
return HAL_ERROR;
800bdda: 2301 movs r3, #1
800bddc: e03a b.n 800be54 <USB_EPStartXfer+0x1758>
}
}
#endif /* (USE_USB_DOUBLE_BUFFER == 1U) */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800bdde: f507 7384 add.w r3, r7, #264 @ 0x108
800bde2: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800bde6: 681a ldr r2, [r3, #0]
800bde8: f507 7384 add.w r3, r7, #264 @ 0x108
800bdec: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800bdf0: 681b ldr r3, [r3, #0]
800bdf2: 781b ldrb r3, [r3, #0]
800bdf4: 009b lsls r3, r3, #2
800bdf6: 4413 add r3, r2
800bdf8: 881b ldrh r3, [r3, #0]
800bdfa: b29b uxth r3, r3
800bdfc: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800be00: f023 0370 bic.w r3, r3, #112 @ 0x70
800be04: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800be08: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800be0c: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800be10: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800be14: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800be18: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800be1c: f8a7 308a strh.w r3, [r7, #138] @ 0x8a
800be20: f507 7384 add.w r3, r7, #264 @ 0x108
800be24: f5a3 7382 sub.w r3, r3, #260 @ 0x104
800be28: 681a ldr r2, [r3, #0]
800be2a: f507 7384 add.w r3, r7, #264 @ 0x108
800be2e: f5a3 7384 sub.w r3, r3, #264 @ 0x108
800be32: 681b ldr r3, [r3, #0]
800be34: 781b ldrb r3, [r3, #0]
800be36: 009b lsls r3, r3, #2
800be38: 441a add r2, r3
800be3a: f8b7 308a ldrh.w r3, [r7, #138] @ 0x8a
800be3e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800be42: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800be46: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800be4a: f043 0380 orr.w r3, r3, #128 @ 0x80
800be4e: b29b uxth r3, r3
800be50: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800be52: 2300 movs r3, #0
}
800be54: 4618 mov r0, r3
800be56: f507 7784 add.w r7, r7, #264 @ 0x108
800be5a: 46bd mov sp, r7
800be5c: bd80 pop {r7, pc}
0800be5e <USB_EPSetStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPSetStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800be5e: b480 push {r7}
800be60: b085 sub sp, #20
800be62: af00 add r7, sp, #0
800be64: 6078 str r0, [r7, #4]
800be66: 6039 str r1, [r7, #0]
if (ep->is_in != 0U)
800be68: 683b ldr r3, [r7, #0]
800be6a: 785b ldrb r3, [r3, #1]
800be6c: 2b00 cmp r3, #0
800be6e: d020 beq.n 800beb2 <USB_EPSetStall+0x54>
{
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_STALL);
800be70: 687a ldr r2, [r7, #4]
800be72: 683b ldr r3, [r7, #0]
800be74: 781b ldrb r3, [r3, #0]
800be76: 009b lsls r3, r3, #2
800be78: 4413 add r3, r2
800be7a: 881b ldrh r3, [r3, #0]
800be7c: b29b uxth r3, r3
800be7e: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800be82: f023 0340 bic.w r3, r3, #64 @ 0x40
800be86: 81bb strh r3, [r7, #12]
800be88: 89bb ldrh r3, [r7, #12]
800be8a: f083 0310 eor.w r3, r3, #16
800be8e: 81bb strh r3, [r7, #12]
800be90: 687a ldr r2, [r7, #4]
800be92: 683b ldr r3, [r7, #0]
800be94: 781b ldrb r3, [r3, #0]
800be96: 009b lsls r3, r3, #2
800be98: 441a add r2, r3
800be9a: 89bb ldrh r3, [r7, #12]
800be9c: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bea0: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bea4: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bea8: f043 0380 orr.w r3, r3, #128 @ 0x80
800beac: b29b uxth r3, r3
800beae: 8013 strh r3, [r2, #0]
800beb0: e01f b.n 800bef2 <USB_EPSetStall+0x94>
}
else
{
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_STALL);
800beb2: 687a ldr r2, [r7, #4]
800beb4: 683b ldr r3, [r7, #0]
800beb6: 781b ldrb r3, [r3, #0]
800beb8: 009b lsls r3, r3, #2
800beba: 4413 add r3, r2
800bebc: 881b ldrh r3, [r3, #0]
800bebe: b29b uxth r3, r3
800bec0: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800bec4: f023 0370 bic.w r3, r3, #112 @ 0x70
800bec8: 81fb strh r3, [r7, #14]
800beca: 89fb ldrh r3, [r7, #14]
800becc: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800bed0: 81fb strh r3, [r7, #14]
800bed2: 687a ldr r2, [r7, #4]
800bed4: 683b ldr r3, [r7, #0]
800bed6: 781b ldrb r3, [r3, #0]
800bed8: 009b lsls r3, r3, #2
800beda: 441a add r2, r3
800bedc: 89fb ldrh r3, [r7, #14]
800bede: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bee2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bee6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800beea: f043 0380 orr.w r3, r3, #128 @ 0x80
800beee: b29b uxth r3, r3
800bef0: 8013 strh r3, [r2, #0]
}
return HAL_OK;
800bef2: 2300 movs r3, #0
}
800bef4: 4618 mov r0, r3
800bef6: 3714 adds r7, #20
800bef8: 46bd mov sp, r7
800befa: bc80 pop {r7}
800befc: 4770 bx lr
0800befe <USB_EPClearStall>:
* @param USBx Selected device
* @param ep pointer to endpoint structure
* @retval HAL status
*/
HAL_StatusTypeDef USB_EPClearStall(USB_TypeDef *USBx, USB_EPTypeDef *ep)
{
800befe: b480 push {r7}
800bf00: b087 sub sp, #28
800bf02: af00 add r7, sp, #0
800bf04: 6078 str r0, [r7, #4]
800bf06: 6039 str r1, [r7, #0]
if (ep->doublebuffer == 0U)
800bf08: 683b ldr r3, [r7, #0]
800bf0a: 7b1b ldrb r3, [r3, #12]
800bf0c: 2b00 cmp r3, #0
800bf0e: f040 809d bne.w 800c04c <USB_EPClearStall+0x14e>
{
if (ep->is_in != 0U)
800bf12: 683b ldr r3, [r7, #0]
800bf14: 785b ldrb r3, [r3, #1]
800bf16: 2b00 cmp r3, #0
800bf18: d04c beq.n 800bfb4 <USB_EPClearStall+0xb6>
{
PCD_CLEAR_TX_DTOG(USBx, ep->num);
800bf1a: 687a ldr r2, [r7, #4]
800bf1c: 683b ldr r3, [r7, #0]
800bf1e: 781b ldrb r3, [r3, #0]
800bf20: 009b lsls r3, r3, #2
800bf22: 4413 add r3, r2
800bf24: 881b ldrh r3, [r3, #0]
800bf26: 823b strh r3, [r7, #16]
800bf28: 8a3b ldrh r3, [r7, #16]
800bf2a: f003 0340 and.w r3, r3, #64 @ 0x40
800bf2e: 2b00 cmp r3, #0
800bf30: d01b beq.n 800bf6a <USB_EPClearStall+0x6c>
800bf32: 687a ldr r2, [r7, #4]
800bf34: 683b ldr r3, [r7, #0]
800bf36: 781b ldrb r3, [r3, #0]
800bf38: 009b lsls r3, r3, #2
800bf3a: 4413 add r3, r2
800bf3c: 881b ldrh r3, [r3, #0]
800bf3e: b29b uxth r3, r3
800bf40: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800bf44: f023 0370 bic.w r3, r3, #112 @ 0x70
800bf48: 81fb strh r3, [r7, #14]
800bf4a: 687a ldr r2, [r7, #4]
800bf4c: 683b ldr r3, [r7, #0]
800bf4e: 781b ldrb r3, [r3, #0]
800bf50: 009b lsls r3, r3, #2
800bf52: 441a add r2, r3
800bf54: 89fb ldrh r3, [r7, #14]
800bf56: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bf5a: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bf5e: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bf62: f043 03c0 orr.w r3, r3, #192 @ 0xc0
800bf66: b29b uxth r3, r3
800bf68: 8013 strh r3, [r2, #0]
if (ep->type != EP_TYPE_ISOC)
800bf6a: 683b ldr r3, [r7, #0]
800bf6c: 78db ldrb r3, [r3, #3]
800bf6e: 2b01 cmp r3, #1
800bf70: d06c beq.n 800c04c <USB_EPClearStall+0x14e>
{
/* Configure NAK status for the Endpoint */
PCD_SET_EP_TX_STATUS(USBx, ep->num, USB_EP_TX_NAK);
800bf72: 687a ldr r2, [r7, #4]
800bf74: 683b ldr r3, [r7, #0]
800bf76: 781b ldrb r3, [r3, #0]
800bf78: 009b lsls r3, r3, #2
800bf7a: 4413 add r3, r2
800bf7c: 881b ldrh r3, [r3, #0]
800bf7e: b29b uxth r3, r3
800bf80: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800bf84: f023 0340 bic.w r3, r3, #64 @ 0x40
800bf88: 81bb strh r3, [r7, #12]
800bf8a: 89bb ldrh r3, [r7, #12]
800bf8c: f083 0320 eor.w r3, r3, #32
800bf90: 81bb strh r3, [r7, #12]
800bf92: 687a ldr r2, [r7, #4]
800bf94: 683b ldr r3, [r7, #0]
800bf96: 781b ldrb r3, [r3, #0]
800bf98: 009b lsls r3, r3, #2
800bf9a: 441a add r2, r3
800bf9c: 89bb ldrh r3, [r7, #12]
800bf9e: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bfa2: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bfa6: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800bfaa: f043 0380 orr.w r3, r3, #128 @ 0x80
800bfae: b29b uxth r3, r3
800bfb0: 8013 strh r3, [r2, #0]
800bfb2: e04b b.n 800c04c <USB_EPClearStall+0x14e>
}
}
else
{
PCD_CLEAR_RX_DTOG(USBx, ep->num);
800bfb4: 687a ldr r2, [r7, #4]
800bfb6: 683b ldr r3, [r7, #0]
800bfb8: 781b ldrb r3, [r3, #0]
800bfba: 009b lsls r3, r3, #2
800bfbc: 4413 add r3, r2
800bfbe: 881b ldrh r3, [r3, #0]
800bfc0: 82fb strh r3, [r7, #22]
800bfc2: 8afb ldrh r3, [r7, #22]
800bfc4: f403 4380 and.w r3, r3, #16384 @ 0x4000
800bfc8: 2b00 cmp r3, #0
800bfca: d01b beq.n 800c004 <USB_EPClearStall+0x106>
800bfcc: 687a ldr r2, [r7, #4]
800bfce: 683b ldr r3, [r7, #0]
800bfd0: 781b ldrb r3, [r3, #0]
800bfd2: 009b lsls r3, r3, #2
800bfd4: 4413 add r3, r2
800bfd6: 881b ldrh r3, [r3, #0]
800bfd8: b29b uxth r3, r3
800bfda: f423 43e0 bic.w r3, r3, #28672 @ 0x7000
800bfde: f023 0370 bic.w r3, r3, #112 @ 0x70
800bfe2: 82bb strh r3, [r7, #20]
800bfe4: 687a ldr r2, [r7, #4]
800bfe6: 683b ldr r3, [r7, #0]
800bfe8: 781b ldrb r3, [r3, #0]
800bfea: 009b lsls r3, r3, #2
800bfec: 441a add r2, r3
800bfee: 8abb ldrh r3, [r7, #20]
800bff0: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800bff4: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800bff8: f443 4340 orr.w r3, r3, #49152 @ 0xc000
800bffc: f043 0380 orr.w r3, r3, #128 @ 0x80
800c000: b29b uxth r3, r3
800c002: 8013 strh r3, [r2, #0]
/* Configure VALID status for the Endpoint */
PCD_SET_EP_RX_STATUS(USBx, ep->num, USB_EP_RX_VALID);
800c004: 687a ldr r2, [r7, #4]
800c006: 683b ldr r3, [r7, #0]
800c008: 781b ldrb r3, [r3, #0]
800c00a: 009b lsls r3, r3, #2
800c00c: 4413 add r3, r2
800c00e: 881b ldrh r3, [r3, #0]
800c010: b29b uxth r3, r3
800c012: f423 4380 bic.w r3, r3, #16384 @ 0x4000
800c016: f023 0370 bic.w r3, r3, #112 @ 0x70
800c01a: 827b strh r3, [r7, #18]
800c01c: 8a7b ldrh r3, [r7, #18]
800c01e: f483 5380 eor.w r3, r3, #4096 @ 0x1000
800c022: 827b strh r3, [r7, #18]
800c024: 8a7b ldrh r3, [r7, #18]
800c026: f483 5300 eor.w r3, r3, #8192 @ 0x2000
800c02a: 827b strh r3, [r7, #18]
800c02c: 687a ldr r2, [r7, #4]
800c02e: 683b ldr r3, [r7, #0]
800c030: 781b ldrb r3, [r3, #0]
800c032: 009b lsls r3, r3, #2
800c034: 441a add r2, r3
800c036: 8a7b ldrh r3, [r7, #18]
800c038: f043 437f orr.w r3, r3, #4278190080 @ 0xff000000
800c03c: f443 037f orr.w r3, r3, #16711680 @ 0xff0000
800c040: f443 4300 orr.w r3, r3, #32768 @ 0x8000
800c044: f043 0380 orr.w r3, r3, #128 @ 0x80
800c048: b29b uxth r3, r3
800c04a: 8013 strh r3, [r2, #0]
}
}
return HAL_OK;
800c04c: 2300 movs r3, #0
}
800c04e: 4618 mov r0, r3
800c050: 371c adds r7, #28
800c052: 46bd mov sp, r7
800c054: bc80 pop {r7}
800c056: 4770 bx lr
0800c058 <USB_SetDevAddress>:
* @param address new device address to be assigned
* This parameter can be a value from 0 to 255
* @retval HAL status
*/
HAL_StatusTypeDef USB_SetDevAddress(USB_TypeDef *USBx, uint8_t address)
{
800c058: b480 push {r7}
800c05a: b083 sub sp, #12
800c05c: af00 add r7, sp, #0
800c05e: 6078 str r0, [r7, #4]
800c060: 460b mov r3, r1
800c062: 70fb strb r3, [r7, #3]
if (address == 0U)
800c064: 78fb ldrb r3, [r7, #3]
800c066: 2b00 cmp r3, #0
800c068: d103 bne.n 800c072 <USB_SetDevAddress+0x1a>
{
/* set device address and enable function */
USBx->DADDR = (uint16_t)USB_DADDR_EF;
800c06a: 687b ldr r3, [r7, #4]
800c06c: 2280 movs r2, #128 @ 0x80
800c06e: f8a3 204c strh.w r2, [r3, #76] @ 0x4c
}
return HAL_OK;
800c072: 2300 movs r3, #0
}
800c074: 4618 mov r0, r3
800c076: 370c adds r7, #12
800c078: 46bd mov sp, r7
800c07a: bc80 pop {r7}
800c07c: 4770 bx lr
0800c07e <USB_DevConnect>:
* @brief USB_DevConnect Connect the USB device by enabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevConnect(USB_TypeDef *USBx)
{
800c07e: b480 push {r7}
800c080: b083 sub sp, #12
800c082: af00 add r7, sp, #0
800c084: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c086: 2300 movs r3, #0
}
800c088: 4618 mov r0, r3
800c08a: 370c adds r7, #12
800c08c: 46bd mov sp, r7
800c08e: bc80 pop {r7}
800c090: 4770 bx lr
0800c092 <USB_DevDisconnect>:
* @brief USB_DevDisconnect Disconnect the USB device by disabling the pull-up/pull-down
* @param USBx Selected device
* @retval HAL status
*/
HAL_StatusTypeDef USB_DevDisconnect(USB_TypeDef *USBx)
{
800c092: b480 push {r7}
800c094: b083 sub sp, #12
800c096: af00 add r7, sp, #0
800c098: 6078 str r0, [r7, #4]
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c09a: 2300 movs r3, #0
}
800c09c: 4618 mov r0, r3
800c09e: 370c adds r7, #12
800c0a0: 46bd mov sp, r7
800c0a2: bc80 pop {r7}
800c0a4: 4770 bx lr
0800c0a6 <USB_ReadInterrupts>:
* @brief USB_ReadInterrupts return the global USB interrupt status
* @param USBx Selected device
* @retval USB Global Interrupt status
*/
uint32_t USB_ReadInterrupts(USB_TypeDef const *USBx)
{
800c0a6: b480 push {r7}
800c0a8: b085 sub sp, #20
800c0aa: af00 add r7, sp, #0
800c0ac: 6078 str r0, [r7, #4]
uint32_t tmpreg;
tmpreg = USBx->ISTR;
800c0ae: 687b ldr r3, [r7, #4]
800c0b0: f8b3 3044 ldrh.w r3, [r3, #68] @ 0x44
800c0b4: b29b uxth r3, r3
800c0b6: 60fb str r3, [r7, #12]
return tmpreg;
800c0b8: 68fb ldr r3, [r7, #12]
}
800c0ba: 4618 mov r0, r3
800c0bc: 3714 adds r7, #20
800c0be: 46bd mov sp, r7
800c0c0: bc80 pop {r7}
800c0c2: 4770 bx lr
0800c0c4 <USB_EP0_OutStart>:
* @param USBx Selected device
* @param psetup pointer to setup packet
* @retval HAL status
*/
HAL_StatusTypeDef USB_EP0_OutStart(USB_TypeDef *USBx, uint8_t *psetup)
{
800c0c4: b480 push {r7}
800c0c6: b083 sub sp, #12
800c0c8: af00 add r7, sp, #0
800c0ca: 6078 str r0, [r7, #4]
800c0cc: 6039 str r1, [r7, #0]
UNUSED(psetup);
/* NOTE : - This function is not required by USB Device FS peripheral, it is used
only by USB OTG FS peripheral.
- This function is added to ensure compatibility across platforms.
*/
return HAL_OK;
800c0ce: 2300 movs r3, #0
}
800c0d0: 4618 mov r0, r3
800c0d2: 370c adds r7, #12
800c0d4: 46bd mov sp, r7
800c0d6: bc80 pop {r7}
800c0d8: 4770 bx lr
0800c0da <USB_WritePMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_WritePMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800c0da: b480 push {r7}
800c0dc: b08b sub sp, #44 @ 0x2c
800c0de: af00 add r7, sp, #0
800c0e0: 60f8 str r0, [r7, #12]
800c0e2: 60b9 str r1, [r7, #8]
800c0e4: 4611 mov r1, r2
800c0e6: 461a mov r2, r3
800c0e8: 460b mov r3, r1
800c0ea: 80fb strh r3, [r7, #6]
800c0ec: 4613 mov r3, r2
800c0ee: 80bb strh r3, [r7, #4]
uint32_t n = ((uint32_t)wNBytes + 1U) >> 1;
800c0f0: 88bb ldrh r3, [r7, #4]
800c0f2: 3301 adds r3, #1
800c0f4: 085b lsrs r3, r3, #1
800c0f6: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800c0f8: 68fb ldr r3, [r7, #12]
800c0fa: 617b str r3, [r7, #20]
uint32_t count;
uint16_t WrVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800c0fc: 68bb ldr r3, [r7, #8]
800c0fe: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800c100: 88fb ldrh r3, [r7, #6]
800c102: 005a lsls r2, r3, #1
800c104: 697b ldr r3, [r7, #20]
800c106: 4413 add r3, r2
800c108: f503 6380 add.w r3, r3, #1024 @ 0x400
800c10c: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c10e: 69bb ldr r3, [r7, #24]
800c110: 627b str r3, [r7, #36] @ 0x24
800c112: e01f b.n 800c154 <USB_WritePMA+0x7a>
{
WrVal = pBuf[0];
800c114: 69fb ldr r3, [r7, #28]
800c116: 781b ldrb r3, [r3, #0]
800c118: 827b strh r3, [r7, #18]
WrVal |= (uint16_t)pBuf[1] << 8;
800c11a: 69fb ldr r3, [r7, #28]
800c11c: 3301 adds r3, #1
800c11e: 781b ldrb r3, [r3, #0]
800c120: b21b sxth r3, r3
800c122: 021b lsls r3, r3, #8
800c124: b21a sxth r2, r3
800c126: f9b7 3012 ldrsh.w r3, [r7, #18]
800c12a: 4313 orrs r3, r2
800c12c: b21b sxth r3, r3
800c12e: 827b strh r3, [r7, #18]
*pdwVal = (WrVal & 0xFFFFU);
800c130: 6a3b ldr r3, [r7, #32]
800c132: 8a7a ldrh r2, [r7, #18]
800c134: 801a strh r2, [r3, #0]
pdwVal++;
800c136: 6a3b ldr r3, [r7, #32]
800c138: 3302 adds r3, #2
800c13a: 623b str r3, [r7, #32]
#if PMA_ACCESS > 1U
pdwVal++;
800c13c: 6a3b ldr r3, [r7, #32]
800c13e: 3302 adds r3, #2
800c140: 623b str r3, [r7, #32]
#endif /* PMA_ACCESS */
pBuf++;
800c142: 69fb ldr r3, [r7, #28]
800c144: 3301 adds r3, #1
800c146: 61fb str r3, [r7, #28]
pBuf++;
800c148: 69fb ldr r3, [r7, #28]
800c14a: 3301 adds r3, #1
800c14c: 61fb str r3, [r7, #28]
for (count = n; count != 0U; count--)
800c14e: 6a7b ldr r3, [r7, #36] @ 0x24
800c150: 3b01 subs r3, #1
800c152: 627b str r3, [r7, #36] @ 0x24
800c154: 6a7b ldr r3, [r7, #36] @ 0x24
800c156: 2b00 cmp r3, #0
800c158: d1dc bne.n 800c114 <USB_WritePMA+0x3a>
}
}
800c15a: bf00 nop
800c15c: bf00 nop
800c15e: 372c adds r7, #44 @ 0x2c
800c160: 46bd mov sp, r7
800c162: bc80 pop {r7}
800c164: 4770 bx lr
0800c166 <USB_ReadPMA>:
* @param wPMABufAddr address into PMA.
* @param wNBytes no. of bytes to be copied.
* @retval None
*/
void USB_ReadPMA(USB_TypeDef const *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes)
{
800c166: b480 push {r7}
800c168: b08b sub sp, #44 @ 0x2c
800c16a: af00 add r7, sp, #0
800c16c: 60f8 str r0, [r7, #12]
800c16e: 60b9 str r1, [r7, #8]
800c170: 4611 mov r1, r2
800c172: 461a mov r2, r3
800c174: 460b mov r3, r1
800c176: 80fb strh r3, [r7, #6]
800c178: 4613 mov r3, r2
800c17a: 80bb strh r3, [r7, #4]
uint32_t n = (uint32_t)wNBytes >> 1;
800c17c: 88bb ldrh r3, [r7, #4]
800c17e: 085b lsrs r3, r3, #1
800c180: b29b uxth r3, r3
800c182: 61bb str r3, [r7, #24]
uint32_t BaseAddr = (uint32_t)USBx;
800c184: 68fb ldr r3, [r7, #12]
800c186: 617b str r3, [r7, #20]
uint32_t count;
uint32_t RdVal;
__IO uint16_t *pdwVal;
uint8_t *pBuf = pbUsrBuf;
800c188: 68bb ldr r3, [r7, #8]
800c18a: 61fb str r3, [r7, #28]
pdwVal = (__IO uint16_t *)(BaseAddr + 0x400U + ((uint32_t)wPMABufAddr * PMA_ACCESS));
800c18c: 88fb ldrh r3, [r7, #6]
800c18e: 005a lsls r2, r3, #1
800c190: 697b ldr r3, [r7, #20]
800c192: 4413 add r3, r2
800c194: f503 6380 add.w r3, r3, #1024 @ 0x400
800c198: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c19a: 69bb ldr r3, [r7, #24]
800c19c: 627b str r3, [r7, #36] @ 0x24
800c19e: e01b b.n 800c1d8 <USB_ReadPMA+0x72>
{
RdVal = *(__IO uint16_t *)pdwVal;
800c1a0: 6a3b ldr r3, [r7, #32]
800c1a2: 881b ldrh r3, [r3, #0]
800c1a4: b29b uxth r3, r3
800c1a6: 613b str r3, [r7, #16]
pdwVal++;
800c1a8: 6a3b ldr r3, [r7, #32]
800c1aa: 3302 adds r3, #2
800c1ac: 623b str r3, [r7, #32]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800c1ae: 693b ldr r3, [r7, #16]
800c1b0: b2da uxtb r2, r3
800c1b2: 69fb ldr r3, [r7, #28]
800c1b4: 701a strb r2, [r3, #0]
pBuf++;
800c1b6: 69fb ldr r3, [r7, #28]
800c1b8: 3301 adds r3, #1
800c1ba: 61fb str r3, [r7, #28]
*pBuf = (uint8_t)((RdVal >> 8) & 0xFFU);
800c1bc: 693b ldr r3, [r7, #16]
800c1be: 0a1b lsrs r3, r3, #8
800c1c0: b2da uxtb r2, r3
800c1c2: 69fb ldr r3, [r7, #28]
800c1c4: 701a strb r2, [r3, #0]
pBuf++;
800c1c6: 69fb ldr r3, [r7, #28]
800c1c8: 3301 adds r3, #1
800c1ca: 61fb str r3, [r7, #28]
#if PMA_ACCESS > 1U
pdwVal++;
800c1cc: 6a3b ldr r3, [r7, #32]
800c1ce: 3302 adds r3, #2
800c1d0: 623b str r3, [r7, #32]
for (count = n; count != 0U; count--)
800c1d2: 6a7b ldr r3, [r7, #36] @ 0x24
800c1d4: 3b01 subs r3, #1
800c1d6: 627b str r3, [r7, #36] @ 0x24
800c1d8: 6a7b ldr r3, [r7, #36] @ 0x24
800c1da: 2b00 cmp r3, #0
800c1dc: d1e0 bne.n 800c1a0 <USB_ReadPMA+0x3a>
#endif /* PMA_ACCESS */
}
if ((wNBytes % 2U) != 0U)
800c1de: 88bb ldrh r3, [r7, #4]
800c1e0: f003 0301 and.w r3, r3, #1
800c1e4: b29b uxth r3, r3
800c1e6: 2b00 cmp r3, #0
800c1e8: d007 beq.n 800c1fa <USB_ReadPMA+0x94>
{
RdVal = *pdwVal;
800c1ea: 6a3b ldr r3, [r7, #32]
800c1ec: 881b ldrh r3, [r3, #0]
800c1ee: b29b uxth r3, r3
800c1f0: 613b str r3, [r7, #16]
*pBuf = (uint8_t)((RdVal >> 0) & 0xFFU);
800c1f2: 693b ldr r3, [r7, #16]
800c1f4: b2da uxtb r2, r3
800c1f6: 69fb ldr r3, [r7, #28]
800c1f8: 701a strb r2, [r3, #0]
}
}
800c1fa: bf00 nop
800c1fc: 372c adds r7, #44 @ 0x2c
800c1fe: 46bd mov sp, r7
800c200: bc80 pop {r7}
800c202: 4770 bx lr
0800c204 <USBD_CDC_Init>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_Init(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c204: b580 push {r7, lr}
800c206: b084 sub sp, #16
800c208: af00 add r7, sp, #0
800c20a: 6078 str r0, [r7, #4]
800c20c: 460b mov r3, r1
800c20e: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800c210: 2300 movs r3, #0
800c212: 73fb strb r3, [r7, #15]
USBD_CDC_HandleTypeDef *hcdc;
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c214: 687b ldr r3, [r7, #4]
800c216: 7c1b ldrb r3, [r3, #16]
800c218: 2b00 cmp r3, #0
800c21a: d115 bne.n 800c248 <USBD_CDC_Init+0x44>
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800c21c: f44f 7300 mov.w r3, #512 @ 0x200
800c220: 2202 movs r2, #2
800c222: 2181 movs r1, #129 @ 0x81
800c224: 6878 ldr r0, [r7, #4]
800c226: f001 ff00 bl 800e02a <USBD_LL_OpenEP>
CDC_DATA_HS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800c22a: 687b ldr r3, [r7, #4]
800c22c: 2201 movs r2, #1
800c22e: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800c230: f44f 7300 mov.w r3, #512 @ 0x200
800c234: 2202 movs r2, #2
800c236: 2101 movs r1, #1
800c238: 6878 ldr r0, [r7, #4]
800c23a: f001 fef6 bl 800e02a <USBD_LL_OpenEP>
CDC_DATA_HS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800c23e: 687b ldr r3, [r7, #4]
800c240: 2201 movs r2, #1
800c242: f8c3 216c str.w r2, [r3, #364] @ 0x16c
800c246: e012 b.n 800c26e <USBD_CDC_Init+0x6a>
}
else
{
/* Open EP IN */
USBD_LL_OpenEP(pdev, CDC_IN_EP, USBD_EP_TYPE_BULK,
800c248: 2340 movs r3, #64 @ 0x40
800c24a: 2202 movs r2, #2
800c24c: 2181 movs r1, #129 @ 0x81
800c24e: 6878 ldr r0, [r7, #4]
800c250: f001 feeb bl 800e02a <USBD_LL_OpenEP>
CDC_DATA_FS_IN_PACKET_SIZE);
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 1U;
800c254: 687b ldr r3, [r7, #4]
800c256: 2201 movs r2, #1
800c258: 62da str r2, [r3, #44] @ 0x2c
/* Open EP OUT */
USBD_LL_OpenEP(pdev, CDC_OUT_EP, USBD_EP_TYPE_BULK,
800c25a: 2340 movs r3, #64 @ 0x40
800c25c: 2202 movs r2, #2
800c25e: 2101 movs r1, #1
800c260: 6878 ldr r0, [r7, #4]
800c262: f001 fee2 bl 800e02a <USBD_LL_OpenEP>
CDC_DATA_FS_OUT_PACKET_SIZE);
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 1U;
800c266: 687b ldr r3, [r7, #4]
800c268: 2201 movs r2, #1
800c26a: f8c3 216c str.w r2, [r3, #364] @ 0x16c
}
/* Open Command IN EP */
USBD_LL_OpenEP(pdev, CDC_CMD_EP, USBD_EP_TYPE_INTR, CDC_CMD_PACKET_SIZE);
800c26e: 2308 movs r3, #8
800c270: 2203 movs r2, #3
800c272: 2182 movs r1, #130 @ 0x82
800c274: 6878 ldr r0, [r7, #4]
800c276: f001 fed8 bl 800e02a <USBD_LL_OpenEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 1U;
800c27a: 687b ldr r3, [r7, #4]
800c27c: 2201 movs r2, #1
800c27e: 641a str r2, [r3, #64] @ 0x40
pdev->pClassData = USBD_malloc(sizeof(USBD_CDC_HandleTypeDef));
800c280: f44f 7007 mov.w r0, #540 @ 0x21c
800c284: f001 fff8 bl 800e278 <USBD_static_malloc>
800c288: 4602 mov r2, r0
800c28a: 687b ldr r3, [r7, #4]
800c28c: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
if (pdev->pClassData == NULL)
800c290: 687b ldr r3, [r7, #4]
800c292: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c296: 2b00 cmp r3, #0
800c298: d102 bne.n 800c2a0 <USBD_CDC_Init+0x9c>
{
ret = 1U;
800c29a: 2301 movs r3, #1
800c29c: 73fb strb r3, [r7, #15]
800c29e: e026 b.n 800c2ee <USBD_CDC_Init+0xea>
}
else
{
hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c2a0: 687b ldr r3, [r7, #4]
800c2a2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c2a6: 60bb str r3, [r7, #8]
/* Init physical Interface components */
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Init();
800c2a8: 687b ldr r3, [r7, #4]
800c2aa: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c2ae: 681b ldr r3, [r3, #0]
800c2b0: 4798 blx r3
/* Init Xfer states */
hcdc->TxState = 0U;
800c2b2: 68bb ldr r3, [r7, #8]
800c2b4: 2200 movs r2, #0
800c2b6: f8c3 2214 str.w r2, [r3, #532] @ 0x214
hcdc->RxState = 0U;
800c2ba: 68bb ldr r3, [r7, #8]
800c2bc: 2200 movs r2, #0
800c2be: f8c3 2218 str.w r2, [r3, #536] @ 0x218
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c2c2: 687b ldr r3, [r7, #4]
800c2c4: 7c1b ldrb r3, [r3, #16]
800c2c6: 2b00 cmp r3, #0
800c2c8: d109 bne.n 800c2de <USBD_CDC_Init+0xda>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800c2ca: 68bb ldr r3, [r7, #8]
800c2cc: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c2d0: f44f 7300 mov.w r3, #512 @ 0x200
800c2d4: 2101 movs r1, #1
800c2d6: 6878 ldr r0, [r7, #4]
800c2d8: f001 ff97 bl 800e20a <USBD_LL_PrepareReceive>
800c2dc: e007 b.n 800c2ee <USBD_CDC_Init+0xea>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev, CDC_OUT_EP, hcdc->RxBuffer,
800c2de: 68bb ldr r3, [r7, #8]
800c2e0: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c2e4: 2340 movs r3, #64 @ 0x40
800c2e6: 2101 movs r1, #1
800c2e8: 6878 ldr r0, [r7, #4]
800c2ea: f001 ff8e bl 800e20a <USBD_LL_PrepareReceive>
CDC_DATA_FS_OUT_PACKET_SIZE);
}
}
return ret;
800c2ee: 7bfb ldrb r3, [r7, #15]
}
800c2f0: 4618 mov r0, r3
800c2f2: 3710 adds r7, #16
800c2f4: 46bd mov sp, r7
800c2f6: bd80 pop {r7, pc}
0800c2f8 <USBD_CDC_DeInit>:
* @param pdev: device instance
* @param cfgidx: Configuration index
* @retval status
*/
static uint8_t USBD_CDC_DeInit(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c2f8: b580 push {r7, lr}
800c2fa: b084 sub sp, #16
800c2fc: af00 add r7, sp, #0
800c2fe: 6078 str r0, [r7, #4]
800c300: 460b mov r3, r1
800c302: 70fb strb r3, [r7, #3]
uint8_t ret = 0U;
800c304: 2300 movs r3, #0
800c306: 73fb strb r3, [r7, #15]
/* Close EP IN */
USBD_LL_CloseEP(pdev, CDC_IN_EP);
800c308: 2181 movs r1, #129 @ 0x81
800c30a: 6878 ldr r0, [r7, #4]
800c30c: f001 feb3 bl 800e076 <USBD_LL_CloseEP>
pdev->ep_in[CDC_IN_EP & 0xFU].is_used = 0U;
800c310: 687b ldr r3, [r7, #4]
800c312: 2200 movs r2, #0
800c314: 62da str r2, [r3, #44] @ 0x2c
/* Close EP OUT */
USBD_LL_CloseEP(pdev, CDC_OUT_EP);
800c316: 2101 movs r1, #1
800c318: 6878 ldr r0, [r7, #4]
800c31a: f001 feac bl 800e076 <USBD_LL_CloseEP>
pdev->ep_out[CDC_OUT_EP & 0xFU].is_used = 0U;
800c31e: 687b ldr r3, [r7, #4]
800c320: 2200 movs r2, #0
800c322: f8c3 216c str.w r2, [r3, #364] @ 0x16c
/* Close Command IN EP */
USBD_LL_CloseEP(pdev, CDC_CMD_EP);
800c326: 2182 movs r1, #130 @ 0x82
800c328: 6878 ldr r0, [r7, #4]
800c32a: f001 fea4 bl 800e076 <USBD_LL_CloseEP>
pdev->ep_in[CDC_CMD_EP & 0xFU].is_used = 0U;
800c32e: 687b ldr r3, [r7, #4]
800c330: 2200 movs r2, #0
800c332: 641a str r2, [r3, #64] @ 0x40
/* DeInit physical Interface components */
if (pdev->pClassData != NULL)
800c334: 687b ldr r3, [r7, #4]
800c336: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c33a: 2b00 cmp r3, #0
800c33c: d00e beq.n 800c35c <USBD_CDC_DeInit+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->DeInit();
800c33e: 687b ldr r3, [r7, #4]
800c340: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c344: 685b ldr r3, [r3, #4]
800c346: 4798 blx r3
USBD_free(pdev->pClassData);
800c348: 687b ldr r3, [r7, #4]
800c34a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c34e: 4618 mov r0, r3
800c350: f001 ff9e bl 800e290 <USBD_static_free>
pdev->pClassData = NULL;
800c354: 687b ldr r3, [r7, #4]
800c356: 2200 movs r2, #0
800c358: f8c3 22b8 str.w r2, [r3, #696] @ 0x2b8
}
return ret;
800c35c: 7bfb ldrb r3, [r7, #15]
}
800c35e: 4618 mov r0, r3
800c360: 3710 adds r7, #16
800c362: 46bd mov sp, r7
800c364: bd80 pop {r7, pc}
0800c366 <USBD_CDC_Setup>:
* @param req: usb requests
* @retval status
*/
static uint8_t USBD_CDC_Setup(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800c366: b580 push {r7, lr}
800c368: b086 sub sp, #24
800c36a: af00 add r7, sp, #0
800c36c: 6078 str r0, [r7, #4]
800c36e: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c370: 687b ldr r3, [r7, #4]
800c372: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c376: 613b str r3, [r7, #16]
uint8_t ifalt = 0U;
800c378: 2300 movs r3, #0
800c37a: 73fb strb r3, [r7, #15]
uint16_t status_info = 0U;
800c37c: 2300 movs r3, #0
800c37e: 81bb strh r3, [r7, #12]
uint8_t ret = USBD_OK;
800c380: 2300 movs r3, #0
800c382: 75fb strb r3, [r7, #23]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800c384: 683b ldr r3, [r7, #0]
800c386: 781b ldrb r3, [r3, #0]
800c388: f003 0360 and.w r3, r3, #96 @ 0x60
800c38c: 2b00 cmp r3, #0
800c38e: d039 beq.n 800c404 <USBD_CDC_Setup+0x9e>
800c390: 2b20 cmp r3, #32
800c392: d17f bne.n 800c494 <USBD_CDC_Setup+0x12e>
{
case USB_REQ_TYPE_CLASS :
if (req->wLength)
800c394: 683b ldr r3, [r7, #0]
800c396: 88db ldrh r3, [r3, #6]
800c398: 2b00 cmp r3, #0
800c39a: d029 beq.n 800c3f0 <USBD_CDC_Setup+0x8a>
{
if (req->bmRequest & 0x80U)
800c39c: 683b ldr r3, [r7, #0]
800c39e: 781b ldrb r3, [r3, #0]
800c3a0: b25b sxtb r3, r3
800c3a2: 2b00 cmp r3, #0
800c3a4: da11 bge.n 800c3ca <USBD_CDC_Setup+0x64>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c3a6: 687b ldr r3, [r7, #4]
800c3a8: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c3ac: 689b ldr r3, [r3, #8]
800c3ae: 683a ldr r2, [r7, #0]
800c3b0: 7850 ldrb r0, [r2, #1]
(uint8_t *)(void *)hcdc->data,
800c3b2: 6939 ldr r1, [r7, #16]
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c3b4: 683a ldr r2, [r7, #0]
800c3b6: 88d2 ldrh r2, [r2, #6]
800c3b8: 4798 blx r3
req->wLength);
USBD_CtlSendData(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800c3ba: 6939 ldr r1, [r7, #16]
800c3bc: 683b ldr r3, [r7, #0]
800c3be: 88db ldrh r3, [r3, #6]
800c3c0: 461a mov r2, r3
800c3c2: 6878 ldr r0, [r7, #4]
800c3c4: f001 fa06 bl 800d7d4 <USBD_CtlSendData>
else
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
(uint8_t *)(void *)req, 0U);
}
break;
800c3c8: e06b b.n 800c4a2 <USBD_CDC_Setup+0x13c>
hcdc->CmdOpCode = req->bRequest;
800c3ca: 683b ldr r3, [r7, #0]
800c3cc: 785a ldrb r2, [r3, #1]
800c3ce: 693b ldr r3, [r7, #16]
800c3d0: f883 2200 strb.w r2, [r3, #512] @ 0x200
hcdc->CmdLength = (uint8_t)req->wLength;
800c3d4: 683b ldr r3, [r7, #0]
800c3d6: 88db ldrh r3, [r3, #6]
800c3d8: b2da uxtb r2, r3
800c3da: 693b ldr r3, [r7, #16]
800c3dc: f883 2201 strb.w r2, [r3, #513] @ 0x201
USBD_CtlPrepareRx(pdev, (uint8_t *)(void *)hcdc->data, req->wLength);
800c3e0: 6939 ldr r1, [r7, #16]
800c3e2: 683b ldr r3, [r7, #0]
800c3e4: 88db ldrh r3, [r3, #6]
800c3e6: 461a mov r2, r3
800c3e8: 6878 ldr r0, [r7, #4]
800c3ea: f001 fa21 bl 800d830 <USBD_CtlPrepareRx>
break;
800c3ee: e058 b.n 800c4a2 <USBD_CDC_Setup+0x13c>
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(req->bRequest,
800c3f0: 687b ldr r3, [r7, #4]
800c3f2: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c3f6: 689b ldr r3, [r3, #8]
800c3f8: 683a ldr r2, [r7, #0]
800c3fa: 7850 ldrb r0, [r2, #1]
800c3fc: 2200 movs r2, #0
800c3fe: 6839 ldr r1, [r7, #0]
800c400: 4798 blx r3
break;
800c402: e04e b.n 800c4a2 <USBD_CDC_Setup+0x13c>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800c404: 683b ldr r3, [r7, #0]
800c406: 785b ldrb r3, [r3, #1]
800c408: 2b0b cmp r3, #11
800c40a: d02e beq.n 800c46a <USBD_CDC_Setup+0x104>
800c40c: 2b0b cmp r3, #11
800c40e: dc38 bgt.n 800c482 <USBD_CDC_Setup+0x11c>
800c410: 2b00 cmp r3, #0
800c412: d002 beq.n 800c41a <USBD_CDC_Setup+0xb4>
800c414: 2b0a cmp r3, #10
800c416: d014 beq.n 800c442 <USBD_CDC_Setup+0xdc>
800c418: e033 b.n 800c482 <USBD_CDC_Setup+0x11c>
{
case USB_REQ_GET_STATUS:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c41a: 687b ldr r3, [r7, #4]
800c41c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c420: 2b03 cmp r3, #3
800c422: d107 bne.n 800c434 <USBD_CDC_Setup+0xce>
{
USBD_CtlSendData(pdev, (uint8_t *)(void *)&status_info, 2U);
800c424: f107 030c add.w r3, r7, #12
800c428: 2202 movs r2, #2
800c42a: 4619 mov r1, r3
800c42c: 6878 ldr r0, [r7, #4]
800c42e: f001 f9d1 bl 800d7d4 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800c432: e02e b.n 800c492 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800c434: 6839 ldr r1, [r7, #0]
800c436: 6878 ldr r0, [r7, #4]
800c438: f001 f962 bl 800d700 <USBD_CtlError>
ret = USBD_FAIL;
800c43c: 2302 movs r3, #2
800c43e: 75fb strb r3, [r7, #23]
break;
800c440: e027 b.n 800c492 <USBD_CDC_Setup+0x12c>
case USB_REQ_GET_INTERFACE:
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800c442: 687b ldr r3, [r7, #4]
800c444: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c448: 2b03 cmp r3, #3
800c44a: d107 bne.n 800c45c <USBD_CDC_Setup+0xf6>
{
USBD_CtlSendData(pdev, &ifalt, 1U);
800c44c: f107 030f add.w r3, r7, #15
800c450: 2201 movs r2, #1
800c452: 4619 mov r1, r3
800c454: 6878 ldr r0, [r7, #4]
800c456: f001 f9bd bl 800d7d4 <USBD_CtlSendData>
else
{
USBD_CtlError(pdev, req);
ret = USBD_FAIL;
}
break;
800c45a: e01a b.n 800c492 <USBD_CDC_Setup+0x12c>
USBD_CtlError(pdev, req);
800c45c: 6839 ldr r1, [r7, #0]
800c45e: 6878 ldr r0, [r7, #4]
800c460: f001 f94e bl 800d700 <USBD_CtlError>
ret = USBD_FAIL;
800c464: 2302 movs r3, #2
800c466: 75fb strb r3, [r7, #23]
break;
800c468: e013 b.n 800c492 <USBD_CDC_Setup+0x12c>
case USB_REQ_SET_INTERFACE:
if (pdev->dev_state != USBD_STATE_CONFIGURED)
800c46a: 687b ldr r3, [r7, #4]
800c46c: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800c470: 2b03 cmp r3, #3
800c472: d00d beq.n 800c490 <USBD_CDC_Setup+0x12a>
{
USBD_CtlError(pdev, req);
800c474: 6839 ldr r1, [r7, #0]
800c476: 6878 ldr r0, [r7, #4]
800c478: f001 f942 bl 800d700 <USBD_CtlError>
ret = USBD_FAIL;
800c47c: 2302 movs r3, #2
800c47e: 75fb strb r3, [r7, #23]
}
break;
800c480: e006 b.n 800c490 <USBD_CDC_Setup+0x12a>
default:
USBD_CtlError(pdev, req);
800c482: 6839 ldr r1, [r7, #0]
800c484: 6878 ldr r0, [r7, #4]
800c486: f001 f93b bl 800d700 <USBD_CtlError>
ret = USBD_FAIL;
800c48a: 2302 movs r3, #2
800c48c: 75fb strb r3, [r7, #23]
break;
800c48e: e000 b.n 800c492 <USBD_CDC_Setup+0x12c>
break;
800c490: bf00 nop
}
break;
800c492: e006 b.n 800c4a2 <USBD_CDC_Setup+0x13c>
default:
USBD_CtlError(pdev, req);
800c494: 6839 ldr r1, [r7, #0]
800c496: 6878 ldr r0, [r7, #4]
800c498: f001 f932 bl 800d700 <USBD_CtlError>
ret = USBD_FAIL;
800c49c: 2302 movs r3, #2
800c49e: 75fb strb r3, [r7, #23]
break;
800c4a0: bf00 nop
}
return ret;
800c4a2: 7dfb ldrb r3, [r7, #23]
}
800c4a4: 4618 mov r0, r3
800c4a6: 3718 adds r7, #24
800c4a8: 46bd mov sp, r7
800c4aa: bd80 pop {r7, pc}
0800c4ac <USBD_CDC_DataIn>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataIn(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800c4ac: b580 push {r7, lr}
800c4ae: b084 sub sp, #16
800c4b0: af00 add r7, sp, #0
800c4b2: 6078 str r0, [r7, #4]
800c4b4: 460b mov r3, r1
800c4b6: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *)pdev->pClassData;
800c4b8: 687b ldr r3, [r7, #4]
800c4ba: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c4be: 60fb str r3, [r7, #12]
PCD_HandleTypeDef *hpcd = pdev->pData;
800c4c0: 687b ldr r3, [r7, #4]
800c4c2: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800c4c6: 60bb str r3, [r7, #8]
if (pdev->pClassData != NULL)
800c4c8: 687b ldr r3, [r7, #4]
800c4ca: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c4ce: 2b00 cmp r3, #0
800c4d0: d03a beq.n 800c548 <USBD_CDC_DataIn+0x9c>
{
if ((pdev->ep_in[epnum].total_length > 0U) && ((pdev->ep_in[epnum].total_length % hpcd->IN_ep[epnum].maxpacket) == 0U))
800c4d2: 78fa ldrb r2, [r7, #3]
800c4d4: 6879 ldr r1, [r7, #4]
800c4d6: 4613 mov r3, r2
800c4d8: 009b lsls r3, r3, #2
800c4da: 4413 add r3, r2
800c4dc: 009b lsls r3, r3, #2
800c4de: 440b add r3, r1
800c4e0: 331c adds r3, #28
800c4e2: 681b ldr r3, [r3, #0]
800c4e4: 2b00 cmp r3, #0
800c4e6: d029 beq.n 800c53c <USBD_CDC_DataIn+0x90>
800c4e8: 78fa ldrb r2, [r7, #3]
800c4ea: 6879 ldr r1, [r7, #4]
800c4ec: 4613 mov r3, r2
800c4ee: 009b lsls r3, r3, #2
800c4f0: 4413 add r3, r2
800c4f2: 009b lsls r3, r3, #2
800c4f4: 440b add r3, r1
800c4f6: 331c adds r3, #28
800c4f8: 681a ldr r2, [r3, #0]
800c4fa: 78f9 ldrb r1, [r7, #3]
800c4fc: 68b8 ldr r0, [r7, #8]
800c4fe: 460b mov r3, r1
800c500: 009b lsls r3, r3, #2
800c502: 440b add r3, r1
800c504: 00db lsls r3, r3, #3
800c506: 4403 add r3, r0
800c508: 3320 adds r3, #32
800c50a: 681b ldr r3, [r3, #0]
800c50c: fbb2 f1f3 udiv r1, r2, r3
800c510: fb01 f303 mul.w r3, r1, r3
800c514: 1ad3 subs r3, r2, r3
800c516: 2b00 cmp r3, #0
800c518: d110 bne.n 800c53c <USBD_CDC_DataIn+0x90>
{
/* Update the packet total length */
pdev->ep_in[epnum].total_length = 0U;
800c51a: 78fa ldrb r2, [r7, #3]
800c51c: 6879 ldr r1, [r7, #4]
800c51e: 4613 mov r3, r2
800c520: 009b lsls r3, r3, #2
800c522: 4413 add r3, r2
800c524: 009b lsls r3, r3, #2
800c526: 440b add r3, r1
800c528: 331c adds r3, #28
800c52a: 2200 movs r2, #0
800c52c: 601a str r2, [r3, #0]
/* Send ZLP */
USBD_LL_Transmit(pdev, epnum, NULL, 0U);
800c52e: 78f9 ldrb r1, [r7, #3]
800c530: 2300 movs r3, #0
800c532: 2200 movs r2, #0
800c534: 6878 ldr r0, [r7, #4]
800c536: f001 fe45 bl 800e1c4 <USBD_LL_Transmit>
800c53a: e003 b.n 800c544 <USBD_CDC_DataIn+0x98>
}
else
{
hcdc->TxState = 0U;
800c53c: 68fb ldr r3, [r7, #12]
800c53e: 2200 movs r2, #0
800c540: f8c3 2214 str.w r2, [r3, #532] @ 0x214
}
return USBD_OK;
800c544: 2300 movs r3, #0
800c546: e000 b.n 800c54a <USBD_CDC_DataIn+0x9e>
}
else
{
return USBD_FAIL;
800c548: 2302 movs r3, #2
}
}
800c54a: 4618 mov r0, r3
800c54c: 3710 adds r7, #16
800c54e: 46bd mov sp, r7
800c550: bd80 pop {r7, pc}
0800c552 <USBD_CDC_DataOut>:
* @param pdev: device instance
* @param epnum: endpoint number
* @retval status
*/
static uint8_t USBD_CDC_DataOut(USBD_HandleTypeDef *pdev, uint8_t epnum)
{
800c552: b580 push {r7, lr}
800c554: b084 sub sp, #16
800c556: af00 add r7, sp, #0
800c558: 6078 str r0, [r7, #4]
800c55a: 460b mov r3, r1
800c55c: 70fb strb r3, [r7, #3]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c55e: 687b ldr r3, [r7, #4]
800c560: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c564: 60fb str r3, [r7, #12]
/* Get the received data length */
hcdc->RxLength = USBD_LL_GetRxDataSize(pdev, epnum);
800c566: 78fb ldrb r3, [r7, #3]
800c568: 4619 mov r1, r3
800c56a: 6878 ldr r0, [r7, #4]
800c56c: f001 fe70 bl 800e250 <USBD_LL_GetRxDataSize>
800c570: 4602 mov r2, r0
800c572: 68fb ldr r3, [r7, #12]
800c574: f8c3 220c str.w r2, [r3, #524] @ 0x20c
/* USB data will be immediately processed, this allow next USB traffic being
NAKed till the end of the application Xfer */
if (pdev->pClassData != NULL)
800c578: 687b ldr r3, [r7, #4]
800c57a: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c57e: 2b00 cmp r3, #0
800c580: d00d beq.n 800c59e <USBD_CDC_DataOut+0x4c>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Receive(hcdc->RxBuffer, &hcdc->RxLength);
800c582: 687b ldr r3, [r7, #4]
800c584: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c588: 68db ldr r3, [r3, #12]
800c58a: 68fa ldr r2, [r7, #12]
800c58c: f8d2 0204 ldr.w r0, [r2, #516] @ 0x204
800c590: 68fa ldr r2, [r7, #12]
800c592: f502 7203 add.w r2, r2, #524 @ 0x20c
800c596: 4611 mov r1, r2
800c598: 4798 blx r3
return USBD_OK;
800c59a: 2300 movs r3, #0
800c59c: e000 b.n 800c5a0 <USBD_CDC_DataOut+0x4e>
}
else
{
return USBD_FAIL;
800c59e: 2302 movs r3, #2
}
}
800c5a0: 4618 mov r0, r3
800c5a2: 3710 adds r7, #16
800c5a4: 46bd mov sp, r7
800c5a6: bd80 pop {r7, pc}
0800c5a8 <USBD_CDC_EP0_RxReady>:
* Handle EP0 Rx Ready event
* @param pdev: device instance
* @retval status
*/
static uint8_t USBD_CDC_EP0_RxReady(USBD_HandleTypeDef *pdev)
{
800c5a8: b580 push {r7, lr}
800c5aa: b084 sub sp, #16
800c5ac: af00 add r7, sp, #0
800c5ae: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c5b0: 687b ldr r3, [r7, #4]
800c5b2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c5b6: 60fb str r3, [r7, #12]
if ((pdev->pUserData != NULL) && (hcdc->CmdOpCode != 0xFFU))
800c5b8: 687b ldr r3, [r7, #4]
800c5ba: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c5be: 2b00 cmp r3, #0
800c5c0: d014 beq.n 800c5ec <USBD_CDC_EP0_RxReady+0x44>
800c5c2: 68fb ldr r3, [r7, #12]
800c5c4: f893 3200 ldrb.w r3, [r3, #512] @ 0x200
800c5c8: 2bff cmp r3, #255 @ 0xff
800c5ca: d00f beq.n 800c5ec <USBD_CDC_EP0_RxReady+0x44>
{
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c5cc: 687b ldr r3, [r7, #4]
800c5ce: f8d3 32bc ldr.w r3, [r3, #700] @ 0x2bc
800c5d2: 689b ldr r3, [r3, #8]
800c5d4: 68fa ldr r2, [r7, #12]
800c5d6: f892 0200 ldrb.w r0, [r2, #512] @ 0x200
(uint8_t *)(void *)hcdc->data,
800c5da: 68f9 ldr r1, [r7, #12]
(uint16_t)hcdc->CmdLength);
800c5dc: 68fa ldr r2, [r7, #12]
800c5de: f892 2201 ldrb.w r2, [r2, #513] @ 0x201
((USBD_CDC_ItfTypeDef *)pdev->pUserData)->Control(hcdc->CmdOpCode,
800c5e2: 4798 blx r3
hcdc->CmdOpCode = 0xFFU;
800c5e4: 68fb ldr r3, [r7, #12]
800c5e6: 22ff movs r2, #255 @ 0xff
800c5e8: f883 2200 strb.w r2, [r3, #512] @ 0x200
}
return USBD_OK;
800c5ec: 2300 movs r3, #0
}
800c5ee: 4618 mov r0, r3
800c5f0: 3710 adds r7, #16
800c5f2: 46bd mov sp, r7
800c5f4: bd80 pop {r7, pc}
...
0800c5f8 <USBD_CDC_GetFSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetFSCfgDesc(uint16_t *length)
{
800c5f8: b480 push {r7}
800c5fa: b083 sub sp, #12
800c5fc: af00 add r7, sp, #0
800c5fe: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgFSDesc);
800c600: 687b ldr r3, [r7, #4]
800c602: 2243 movs r2, #67 @ 0x43
800c604: 801a strh r2, [r3, #0]
return USBD_CDC_CfgFSDesc;
800c606: 4b03 ldr r3, [pc, #12] @ (800c614 <USBD_CDC_GetFSCfgDesc+0x1c>)
}
800c608: 4618 mov r0, r3
800c60a: 370c adds r7, #12
800c60c: 46bd mov sp, r7
800c60e: bc80 pop {r7}
800c610: 4770 bx lr
800c612: bf00 nop
800c614: 200000a4 .word 0x200000a4
0800c618 <USBD_CDC_GetHSCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetHSCfgDesc(uint16_t *length)
{
800c618: b480 push {r7}
800c61a: b083 sub sp, #12
800c61c: af00 add r7, sp, #0
800c61e: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_CfgHSDesc);
800c620: 687b ldr r3, [r7, #4]
800c622: 2243 movs r2, #67 @ 0x43
800c624: 801a strh r2, [r3, #0]
return USBD_CDC_CfgHSDesc;
800c626: 4b03 ldr r3, [pc, #12] @ (800c634 <USBD_CDC_GetHSCfgDesc+0x1c>)
}
800c628: 4618 mov r0, r3
800c62a: 370c adds r7, #12
800c62c: 46bd mov sp, r7
800c62e: bc80 pop {r7}
800c630: 4770 bx lr
800c632: bf00 nop
800c634: 20000060 .word 0x20000060
0800c638 <USBD_CDC_GetOtherSpeedCfgDesc>:
* @param speed : current device speed
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
static uint8_t *USBD_CDC_GetOtherSpeedCfgDesc(uint16_t *length)
{
800c638: b480 push {r7}
800c63a: b083 sub sp, #12
800c63c: af00 add r7, sp, #0
800c63e: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_OtherSpeedCfgDesc);
800c640: 687b ldr r3, [r7, #4]
800c642: 2243 movs r2, #67 @ 0x43
800c644: 801a strh r2, [r3, #0]
return USBD_CDC_OtherSpeedCfgDesc;
800c646: 4b03 ldr r3, [pc, #12] @ (800c654 <USBD_CDC_GetOtherSpeedCfgDesc+0x1c>)
}
800c648: 4618 mov r0, r3
800c64a: 370c adds r7, #12
800c64c: 46bd mov sp, r7
800c64e: bc80 pop {r7}
800c650: 4770 bx lr
800c652: bf00 nop
800c654: 200000e8 .word 0x200000e8
0800c658 <USBD_CDC_GetDeviceQualifierDescriptor>:
* return Device Qualifier descriptor
* @param length : pointer data length
* @retval pointer to descriptor buffer
*/
uint8_t *USBD_CDC_GetDeviceQualifierDescriptor(uint16_t *length)
{
800c658: b480 push {r7}
800c65a: b083 sub sp, #12
800c65c: af00 add r7, sp, #0
800c65e: 6078 str r0, [r7, #4]
*length = sizeof(USBD_CDC_DeviceQualifierDesc);
800c660: 687b ldr r3, [r7, #4]
800c662: 220a movs r2, #10
800c664: 801a strh r2, [r3, #0]
return USBD_CDC_DeviceQualifierDesc;
800c666: 4b03 ldr r3, [pc, #12] @ (800c674 <USBD_CDC_GetDeviceQualifierDescriptor+0x1c>)
}
800c668: 4618 mov r0, r3
800c66a: 370c adds r7, #12
800c66c: 46bd mov sp, r7
800c66e: bc80 pop {r7}
800c670: 4770 bx lr
800c672: bf00 nop
800c674: 2000001c .word 0x2000001c
0800c678 <USBD_CDC_RegisterInterface>:
* @param fops: CD Interface callback
* @retval status
*/
uint8_t USBD_CDC_RegisterInterface(USBD_HandleTypeDef *pdev,
USBD_CDC_ItfTypeDef *fops)
{
800c678: b480 push {r7}
800c67a: b085 sub sp, #20
800c67c: af00 add r7, sp, #0
800c67e: 6078 str r0, [r7, #4]
800c680: 6039 str r1, [r7, #0]
uint8_t ret = USBD_FAIL;
800c682: 2302 movs r3, #2
800c684: 73fb strb r3, [r7, #15]
if (fops != NULL)
800c686: 683b ldr r3, [r7, #0]
800c688: 2b00 cmp r3, #0
800c68a: d005 beq.n 800c698 <USBD_CDC_RegisterInterface+0x20>
{
pdev->pUserData = fops;
800c68c: 687b ldr r3, [r7, #4]
800c68e: 683a ldr r2, [r7, #0]
800c690: f8c3 22bc str.w r2, [r3, #700] @ 0x2bc
ret = USBD_OK;
800c694: 2300 movs r3, #0
800c696: 73fb strb r3, [r7, #15]
}
return ret;
800c698: 7bfb ldrb r3, [r7, #15]
}
800c69a: 4618 mov r0, r3
800c69c: 3714 adds r7, #20
800c69e: 46bd mov sp, r7
800c6a0: bc80 pop {r7}
800c6a2: 4770 bx lr
0800c6a4 <USBD_CDC_SetTxBuffer>:
* @retval status
*/
uint8_t USBD_CDC_SetTxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff,
uint16_t length)
{
800c6a4: b480 push {r7}
800c6a6: b087 sub sp, #28
800c6a8: af00 add r7, sp, #0
800c6aa: 60f8 str r0, [r7, #12]
800c6ac: 60b9 str r1, [r7, #8]
800c6ae: 4613 mov r3, r2
800c6b0: 80fb strh r3, [r7, #6]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c6b2: 68fb ldr r3, [r7, #12]
800c6b4: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c6b8: 617b str r3, [r7, #20]
hcdc->TxBuffer = pbuff;
800c6ba: 697b ldr r3, [r7, #20]
800c6bc: 68ba ldr r2, [r7, #8]
800c6be: f8c3 2208 str.w r2, [r3, #520] @ 0x208
hcdc->TxLength = length;
800c6c2: 88fa ldrh r2, [r7, #6]
800c6c4: 697b ldr r3, [r7, #20]
800c6c6: f8c3 2210 str.w r2, [r3, #528] @ 0x210
return USBD_OK;
800c6ca: 2300 movs r3, #0
}
800c6cc: 4618 mov r0, r3
800c6ce: 371c adds r7, #28
800c6d0: 46bd mov sp, r7
800c6d2: bc80 pop {r7}
800c6d4: 4770 bx lr
0800c6d6 <USBD_CDC_SetRxBuffer>:
* @param pbuff: Rx Buffer
* @retval status
*/
uint8_t USBD_CDC_SetRxBuffer(USBD_HandleTypeDef *pdev,
uint8_t *pbuff)
{
800c6d6: b480 push {r7}
800c6d8: b085 sub sp, #20
800c6da: af00 add r7, sp, #0
800c6dc: 6078 str r0, [r7, #4]
800c6de: 6039 str r1, [r7, #0]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c6e0: 687b ldr r3, [r7, #4]
800c6e2: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c6e6: 60fb str r3, [r7, #12]
hcdc->RxBuffer = pbuff;
800c6e8: 68fb ldr r3, [r7, #12]
800c6ea: 683a ldr r2, [r7, #0]
800c6ec: f8c3 2204 str.w r2, [r3, #516] @ 0x204
return USBD_OK;
800c6f0: 2300 movs r3, #0
}
800c6f2: 4618 mov r0, r3
800c6f4: 3714 adds r7, #20
800c6f6: 46bd mov sp, r7
800c6f8: bc80 pop {r7}
800c6fa: 4770 bx lr
0800c6fc <USBD_CDC_TransmitPacket>:
* Transmit packet on IN endpoint
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_TransmitPacket(USBD_HandleTypeDef *pdev)
{
800c6fc: b580 push {r7, lr}
800c6fe: b084 sub sp, #16
800c700: af00 add r7, sp, #0
800c702: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c704: 687b ldr r3, [r7, #4]
800c706: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c70a: 60fb str r3, [r7, #12]
if (pdev->pClassData != NULL)
800c70c: 687b ldr r3, [r7, #4]
800c70e: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c712: 2b00 cmp r3, #0
800c714: d01c beq.n 800c750 <USBD_CDC_TransmitPacket+0x54>
{
if (hcdc->TxState == 0U)
800c716: 68fb ldr r3, [r7, #12]
800c718: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800c71c: 2b00 cmp r3, #0
800c71e: d115 bne.n 800c74c <USBD_CDC_TransmitPacket+0x50>
{
/* Tx Transfer in progress */
hcdc->TxState = 1U;
800c720: 68fb ldr r3, [r7, #12]
800c722: 2201 movs r2, #1
800c724: f8c3 2214 str.w r2, [r3, #532] @ 0x214
/* Update the packet total length */
pdev->ep_in[CDC_IN_EP & 0xFU].total_length = hcdc->TxLength;
800c728: 68fb ldr r3, [r7, #12]
800c72a: f8d3 2210 ldr.w r2, [r3, #528] @ 0x210
800c72e: 687b ldr r3, [r7, #4]
800c730: 631a str r2, [r3, #48] @ 0x30
/* Transmit next packet */
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c732: 68fb ldr r3, [r7, #12]
800c734: f8d3 2208 ldr.w r2, [r3, #520] @ 0x208
(uint16_t)hcdc->TxLength);
800c738: 68fb ldr r3, [r7, #12]
800c73a: f8d3 3210 ldr.w r3, [r3, #528] @ 0x210
USBD_LL_Transmit(pdev, CDC_IN_EP, hcdc->TxBuffer,
800c73e: b29b uxth r3, r3
800c740: 2181 movs r1, #129 @ 0x81
800c742: 6878 ldr r0, [r7, #4]
800c744: f001 fd3e bl 800e1c4 <USBD_LL_Transmit>
return USBD_OK;
800c748: 2300 movs r3, #0
800c74a: e002 b.n 800c752 <USBD_CDC_TransmitPacket+0x56>
}
else
{
return USBD_BUSY;
800c74c: 2301 movs r3, #1
800c74e: e000 b.n 800c752 <USBD_CDC_TransmitPacket+0x56>
}
}
else
{
return USBD_FAIL;
800c750: 2302 movs r3, #2
}
}
800c752: 4618 mov r0, r3
800c754: 3710 adds r7, #16
800c756: 46bd mov sp, r7
800c758: bd80 pop {r7, pc}
0800c75a <USBD_CDC_ReceivePacket>:
* prepare OUT Endpoint for reception
* @param pdev: device instance
* @retval status
*/
uint8_t USBD_CDC_ReceivePacket(USBD_HandleTypeDef *pdev)
{
800c75a: b580 push {r7, lr}
800c75c: b084 sub sp, #16
800c75e: af00 add r7, sp, #0
800c760: 6078 str r0, [r7, #4]
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef *) pdev->pClassData;
800c762: 687b ldr r3, [r7, #4]
800c764: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c768: 60fb str r3, [r7, #12]
/* Suspend or Resume USB Out process */
if (pdev->pClassData != NULL)
800c76a: 687b ldr r3, [r7, #4]
800c76c: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800c770: 2b00 cmp r3, #0
800c772: d017 beq.n 800c7a4 <USBD_CDC_ReceivePacket+0x4a>
{
if (pdev->dev_speed == USBD_SPEED_HIGH)
800c774: 687b ldr r3, [r7, #4]
800c776: 7c1b ldrb r3, [r3, #16]
800c778: 2b00 cmp r3, #0
800c77a: d109 bne.n 800c790 <USBD_CDC_ReceivePacket+0x36>
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c77c: 68fb ldr r3, [r7, #12]
800c77e: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c782: f44f 7300 mov.w r3, #512 @ 0x200
800c786: 2101 movs r1, #1
800c788: 6878 ldr r0, [r7, #4]
800c78a: f001 fd3e bl 800e20a <USBD_LL_PrepareReceive>
800c78e: e007 b.n 800c7a0 <USBD_CDC_ReceivePacket+0x46>
CDC_DATA_HS_OUT_PACKET_SIZE);
}
else
{
/* Prepare Out endpoint to receive next packet */
USBD_LL_PrepareReceive(pdev,
800c790: 68fb ldr r3, [r7, #12]
800c792: f8d3 2204 ldr.w r2, [r3, #516] @ 0x204
800c796: 2340 movs r3, #64 @ 0x40
800c798: 2101 movs r1, #1
800c79a: 6878 ldr r0, [r7, #4]
800c79c: f001 fd35 bl 800e20a <USBD_LL_PrepareReceive>
CDC_OUT_EP,
hcdc->RxBuffer,
CDC_DATA_FS_OUT_PACKET_SIZE);
}
return USBD_OK;
800c7a0: 2300 movs r3, #0
800c7a2: e000 b.n 800c7a6 <USBD_CDC_ReceivePacket+0x4c>
}
else
{
return USBD_FAIL;
800c7a4: 2302 movs r3, #2
}
}
800c7a6: 4618 mov r0, r3
800c7a8: 3710 adds r7, #16
800c7aa: 46bd mov sp, r7
800c7ac: bd80 pop {r7, pc}
0800c7ae <USBD_Init>:
* @param id: Low level core index
* @retval None
*/
USBD_StatusTypeDef USBD_Init(USBD_HandleTypeDef *pdev,
USBD_DescriptorsTypeDef *pdesc, uint8_t id)
{
800c7ae: b580 push {r7, lr}
800c7b0: b084 sub sp, #16
800c7b2: af00 add r7, sp, #0
800c7b4: 60f8 str r0, [r7, #12]
800c7b6: 60b9 str r1, [r7, #8]
800c7b8: 4613 mov r3, r2
800c7ba: 71fb strb r3, [r7, #7]
/* Check whether the USB Host handle is valid */
if (pdev == NULL)
800c7bc: 68fb ldr r3, [r7, #12]
800c7be: 2b00 cmp r3, #0
800c7c0: d101 bne.n 800c7c6 <USBD_Init+0x18>
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Device handle");
#endif
return USBD_FAIL;
800c7c2: 2302 movs r3, #2
800c7c4: e01a b.n 800c7fc <USBD_Init+0x4e>
}
/* Unlink previous class*/
if (pdev->pClass != NULL)
800c7c6: 68fb ldr r3, [r7, #12]
800c7c8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c7cc: 2b00 cmp r3, #0
800c7ce: d003 beq.n 800c7d8 <USBD_Init+0x2a>
{
pdev->pClass = NULL;
800c7d0: 68fb ldr r3, [r7, #12]
800c7d2: 2200 movs r2, #0
800c7d4: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
}
/* Assign USBD Descriptors */
if (pdesc != NULL)
800c7d8: 68bb ldr r3, [r7, #8]
800c7da: 2b00 cmp r3, #0
800c7dc: d003 beq.n 800c7e6 <USBD_Init+0x38>
{
pdev->pDesc = pdesc;
800c7de: 68fb ldr r3, [r7, #12]
800c7e0: 68ba ldr r2, [r7, #8]
800c7e2: f8c3 22b0 str.w r2, [r3, #688] @ 0x2b0
}
/* Set Device initial State */
pdev->dev_state = USBD_STATE_DEFAULT;
800c7e6: 68fb ldr r3, [r7, #12]
800c7e8: 2201 movs r2, #1
800c7ea: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->id = id;
800c7ee: 68fb ldr r3, [r7, #12]
800c7f0: 79fa ldrb r2, [r7, #7]
800c7f2: 701a strb r2, [r3, #0]
/* Initialize low level driver */
USBD_LL_Init(pdev);
800c7f4: 68f8 ldr r0, [r7, #12]
800c7f6: f001 fba3 bl 800df40 <USBD_LL_Init>
return USBD_OK;
800c7fa: 2300 movs r3, #0
}
800c7fc: 4618 mov r0, r3
800c7fe: 3710 adds r7, #16
800c800: 46bd mov sp, r7
800c802: bd80 pop {r7, pc}
0800c804 <USBD_RegisterClass>:
* @param pDevice : Device Handle
* @param pclass: Class handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_RegisterClass(USBD_HandleTypeDef *pdev, USBD_ClassTypeDef *pclass)
{
800c804: b480 push {r7}
800c806: b085 sub sp, #20
800c808: af00 add r7, sp, #0
800c80a: 6078 str r0, [r7, #4]
800c80c: 6039 str r1, [r7, #0]
USBD_StatusTypeDef status = USBD_OK;
800c80e: 2300 movs r3, #0
800c810: 73fb strb r3, [r7, #15]
if (pclass != NULL)
800c812: 683b ldr r3, [r7, #0]
800c814: 2b00 cmp r3, #0
800c816: d006 beq.n 800c826 <USBD_RegisterClass+0x22>
{
/* link the class to the USB Device handle */
pdev->pClass = pclass;
800c818: 687b ldr r3, [r7, #4]
800c81a: 683a ldr r2, [r7, #0]
800c81c: f8c3 22b4 str.w r2, [r3, #692] @ 0x2b4
status = USBD_OK;
800c820: 2300 movs r3, #0
800c822: 73fb strb r3, [r7, #15]
800c824: e001 b.n 800c82a <USBD_RegisterClass+0x26>
else
{
#if (USBD_DEBUG_LEVEL > 1U)
USBD_ErrLog("Invalid Class handle");
#endif
status = USBD_FAIL;
800c826: 2302 movs r3, #2
800c828: 73fb strb r3, [r7, #15]
}
return status;
800c82a: 7bfb ldrb r3, [r7, #15]
}
800c82c: 4618 mov r0, r3
800c82e: 3714 adds r7, #20
800c830: 46bd mov sp, r7
800c832: bc80 pop {r7}
800c834: 4770 bx lr
0800c836 <USBD_Start>:
* Start the USB Device Core.
* @param pdev: Device Handle
* @retval USBD Status
*/
USBD_StatusTypeDef USBD_Start(USBD_HandleTypeDef *pdev)
{
800c836: b580 push {r7, lr}
800c838: b082 sub sp, #8
800c83a: af00 add r7, sp, #0
800c83c: 6078 str r0, [r7, #4]
/* Start the low level driver */
USBD_LL_Start(pdev);
800c83e: 6878 ldr r0, [r7, #4]
800c840: f001 fbd8 bl 800dff4 <USBD_LL_Start>
return USBD_OK;
800c844: 2300 movs r3, #0
}
800c846: 4618 mov r0, r3
800c848: 3708 adds r7, #8
800c84a: 46bd mov sp, r7
800c84c: bd80 pop {r7, pc}
0800c84e <USBD_RunTestMode>:
* Launch test mode process
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_RunTestMode(USBD_HandleTypeDef *pdev)
{
800c84e: b480 push {r7}
800c850: b083 sub sp, #12
800c852: af00 add r7, sp, #0
800c854: 6078 str r0, [r7, #4]
/* Prevent unused argument compilation warning */
UNUSED(pdev);
return USBD_OK;
800c856: 2300 movs r3, #0
}
800c858: 4618 mov r0, r3
800c85a: 370c adds r7, #12
800c85c: 46bd mov sp, r7
800c85e: bc80 pop {r7}
800c860: 4770 bx lr
0800c862 <USBD_SetClassConfig>:
* @param cfgidx: configuration index
* @retval status
*/
USBD_StatusTypeDef USBD_SetClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c862: b580 push {r7, lr}
800c864: b084 sub sp, #16
800c866: af00 add r7, sp, #0
800c868: 6078 str r0, [r7, #4]
800c86a: 460b mov r3, r1
800c86c: 70fb strb r3, [r7, #3]
USBD_StatusTypeDef ret = USBD_FAIL;
800c86e: 2302 movs r3, #2
800c870: 73fb strb r3, [r7, #15]
if (pdev->pClass != NULL)
800c872: 687b ldr r3, [r7, #4]
800c874: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c878: 2b00 cmp r3, #0
800c87a: d00c beq.n 800c896 <USBD_SetClassConfig+0x34>
{
/* Set configuration and Start the Class*/
if (pdev->pClass->Init(pdev, cfgidx) == 0U)
800c87c: 687b ldr r3, [r7, #4]
800c87e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c882: 681b ldr r3, [r3, #0]
800c884: 78fa ldrb r2, [r7, #3]
800c886: 4611 mov r1, r2
800c888: 6878 ldr r0, [r7, #4]
800c88a: 4798 blx r3
800c88c: 4603 mov r3, r0
800c88e: 2b00 cmp r3, #0
800c890: d101 bne.n 800c896 <USBD_SetClassConfig+0x34>
{
ret = USBD_OK;
800c892: 2300 movs r3, #0
800c894: 73fb strb r3, [r7, #15]
}
}
return ret;
800c896: 7bfb ldrb r3, [r7, #15]
}
800c898: 4618 mov r0, r3
800c89a: 3710 adds r7, #16
800c89c: 46bd mov sp, r7
800c89e: bd80 pop {r7, pc}
0800c8a0 <USBD_ClrClassConfig>:
* @param pdev: device instance
* @param cfgidx: configuration index
* @retval status: USBD_StatusTypeDef
*/
USBD_StatusTypeDef USBD_ClrClassConfig(USBD_HandleTypeDef *pdev, uint8_t cfgidx)
{
800c8a0: b580 push {r7, lr}
800c8a2: b082 sub sp, #8
800c8a4: af00 add r7, sp, #0
800c8a6: 6078 str r0, [r7, #4]
800c8a8: 460b mov r3, r1
800c8aa: 70fb strb r3, [r7, #3]
/* Clear configuration and De-initialize the Class process*/
pdev->pClass->DeInit(pdev, cfgidx);
800c8ac: 687b ldr r3, [r7, #4]
800c8ae: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c8b2: 685b ldr r3, [r3, #4]
800c8b4: 78fa ldrb r2, [r7, #3]
800c8b6: 4611 mov r1, r2
800c8b8: 6878 ldr r0, [r7, #4]
800c8ba: 4798 blx r3
return USBD_OK;
800c8bc: 2300 movs r3, #0
}
800c8be: 4618 mov r0, r3
800c8c0: 3708 adds r7, #8
800c8c2: 46bd mov sp, r7
800c8c4: bd80 pop {r7, pc}
0800c8c6 <USBD_LL_SetupStage>:
* Handle the setup stage
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetupStage(USBD_HandleTypeDef *pdev, uint8_t *psetup)
{
800c8c6: b580 push {r7, lr}
800c8c8: b082 sub sp, #8
800c8ca: af00 add r7, sp, #0
800c8cc: 6078 str r0, [r7, #4]
800c8ce: 6039 str r1, [r7, #0]
USBD_ParseSetupRequest(&pdev->request, psetup);
800c8d0: 687b ldr r3, [r7, #4]
800c8d2: f503 732a add.w r3, r3, #680 @ 0x2a8
800c8d6: 6839 ldr r1, [r7, #0]
800c8d8: 4618 mov r0, r3
800c8da: f000 fed8 bl 800d68e <USBD_ParseSetupRequest>
pdev->ep0_state = USBD_EP0_SETUP;
800c8de: 687b ldr r3, [r7, #4]
800c8e0: 2201 movs r2, #1
800c8e2: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep0_data_len = pdev->request.wLength;
800c8e6: 687b ldr r3, [r7, #4]
800c8e8: f8b3 32ae ldrh.w r3, [r3, #686] @ 0x2ae
800c8ec: 461a mov r2, r3
800c8ee: 687b ldr r3, [r7, #4]
800c8f0: f8c3 2298 str.w r2, [r3, #664] @ 0x298
switch (pdev->request.bmRequest & 0x1FU)
800c8f4: 687b ldr r3, [r7, #4]
800c8f6: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800c8fa: f003 031f and.w r3, r3, #31
800c8fe: 2b02 cmp r3, #2
800c900: d016 beq.n 800c930 <USBD_LL_SetupStage+0x6a>
800c902: 2b02 cmp r3, #2
800c904: d81c bhi.n 800c940 <USBD_LL_SetupStage+0x7a>
800c906: 2b00 cmp r3, #0
800c908: d002 beq.n 800c910 <USBD_LL_SetupStage+0x4a>
800c90a: 2b01 cmp r3, #1
800c90c: d008 beq.n 800c920 <USBD_LL_SetupStage+0x5a>
800c90e: e017 b.n 800c940 <USBD_LL_SetupStage+0x7a>
{
case USB_REQ_RECIPIENT_DEVICE:
USBD_StdDevReq(pdev, &pdev->request);
800c910: 687b ldr r3, [r7, #4]
800c912: f503 732a add.w r3, r3, #680 @ 0x2a8
800c916: 4619 mov r1, r3
800c918: 6878 ldr r0, [r7, #4]
800c91a: f000 f9cb bl 800ccb4 <USBD_StdDevReq>
break;
800c91e: e01a b.n 800c956 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_INTERFACE:
USBD_StdItfReq(pdev, &pdev->request);
800c920: 687b ldr r3, [r7, #4]
800c922: f503 732a add.w r3, r3, #680 @ 0x2a8
800c926: 4619 mov r1, r3
800c928: 6878 ldr r0, [r7, #4]
800c92a: f000 fa2d bl 800cd88 <USBD_StdItfReq>
break;
800c92e: e012 b.n 800c956 <USBD_LL_SetupStage+0x90>
case USB_REQ_RECIPIENT_ENDPOINT:
USBD_StdEPReq(pdev, &pdev->request);
800c930: 687b ldr r3, [r7, #4]
800c932: f503 732a add.w r3, r3, #680 @ 0x2a8
800c936: 4619 mov r1, r3
800c938: 6878 ldr r0, [r7, #4]
800c93a: f000 fa6d bl 800ce18 <USBD_StdEPReq>
break;
800c93e: e00a b.n 800c956 <USBD_LL_SetupStage+0x90>
default:
USBD_LL_StallEP(pdev, (pdev->request.bmRequest & 0x80U));
800c940: 687b ldr r3, [r7, #4]
800c942: f893 32a8 ldrb.w r3, [r3, #680] @ 0x2a8
800c946: f023 037f bic.w r3, r3, #127 @ 0x7f
800c94a: b2db uxtb r3, r3
800c94c: 4619 mov r1, r3
800c94e: 6878 ldr r0, [r7, #4]
800c950: f001 fbb0 bl 800e0b4 <USBD_LL_StallEP>
break;
800c954: bf00 nop
}
return USBD_OK;
800c956: 2300 movs r3, #0
}
800c958: 4618 mov r0, r3
800c95a: 3708 adds r7, #8
800c95c: 46bd mov sp, r7
800c95e: bd80 pop {r7, pc}
0800c960 <USBD_LL_DataOutStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataOutStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800c960: b580 push {r7, lr}
800c962: b086 sub sp, #24
800c964: af00 add r7, sp, #0
800c966: 60f8 str r0, [r7, #12]
800c968: 460b mov r3, r1
800c96a: 607a str r2, [r7, #4]
800c96c: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800c96e: 7afb ldrb r3, [r7, #11]
800c970: 2b00 cmp r3, #0
800c972: d14b bne.n 800ca0c <USBD_LL_DataOutStage+0xac>
{
pep = &pdev->ep_out[0];
800c974: 68fb ldr r3, [r7, #12]
800c976: f503 73aa add.w r3, r3, #340 @ 0x154
800c97a: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_OUT)
800c97c: 68fb ldr r3, [r7, #12]
800c97e: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c982: 2b03 cmp r3, #3
800c984: d134 bne.n 800c9f0 <USBD_LL_DataOutStage+0x90>
{
if (pep->rem_length > pep->maxpacket)
800c986: 697b ldr r3, [r7, #20]
800c988: 68da ldr r2, [r3, #12]
800c98a: 697b ldr r3, [r7, #20]
800c98c: 691b ldr r3, [r3, #16]
800c98e: 429a cmp r2, r3
800c990: d919 bls.n 800c9c6 <USBD_LL_DataOutStage+0x66>
{
pep->rem_length -= pep->maxpacket;
800c992: 697b ldr r3, [r7, #20]
800c994: 68da ldr r2, [r3, #12]
800c996: 697b ldr r3, [r7, #20]
800c998: 691b ldr r3, [r3, #16]
800c99a: 1ad2 subs r2, r2, r3
800c99c: 697b ldr r3, [r7, #20]
800c99e: 60da str r2, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800c9a0: 697b ldr r3, [r7, #20]
800c9a2: 68da ldr r2, [r3, #12]
800c9a4: 697b ldr r3, [r7, #20]
800c9a6: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800c9a8: 429a cmp r2, r3
800c9aa: d203 bcs.n 800c9b4 <USBD_LL_DataOutStage+0x54>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800c9ac: 697b ldr r3, [r7, #20]
800c9ae: 68db ldr r3, [r3, #12]
USBD_CtlContinueRx(pdev, pdata,
800c9b0: b29b uxth r3, r3
800c9b2: e002 b.n 800c9ba <USBD_LL_DataOutStage+0x5a>
(uint16_t)MIN(pep->rem_length, pep->maxpacket));
800c9b4: 697b ldr r3, [r7, #20]
800c9b6: 691b ldr r3, [r3, #16]
USBD_CtlContinueRx(pdev, pdata,
800c9b8: b29b uxth r3, r3
800c9ba: 461a mov r2, r3
800c9bc: 6879 ldr r1, [r7, #4]
800c9be: 68f8 ldr r0, [r7, #12]
800c9c0: f000 ff54 bl 800d86c <USBD_CtlContinueRx>
800c9c4: e038 b.n 800ca38 <USBD_LL_DataOutStage+0xd8>
}
else
{
if ((pdev->pClass->EP0_RxReady != NULL) &&
800c9c6: 68fb ldr r3, [r7, #12]
800c9c8: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c9cc: 691b ldr r3, [r3, #16]
800c9ce: 2b00 cmp r3, #0
800c9d0: d00a beq.n 800c9e8 <USBD_LL_DataOutStage+0x88>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800c9d2: 68fb ldr r3, [r7, #12]
800c9d4: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_RxReady != NULL) &&
800c9d8: 2b03 cmp r3, #3
800c9da: d105 bne.n 800c9e8 <USBD_LL_DataOutStage+0x88>
{
pdev->pClass->EP0_RxReady(pdev);
800c9dc: 68fb ldr r3, [r7, #12]
800c9de: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800c9e2: 691b ldr r3, [r3, #16]
800c9e4: 68f8 ldr r0, [r7, #12]
800c9e6: 4798 blx r3
}
USBD_CtlSendStatus(pdev);
800c9e8: 68f8 ldr r0, [r7, #12]
800c9ea: f000 ff51 bl 800d890 <USBD_CtlSendStatus>
800c9ee: e023 b.n 800ca38 <USBD_LL_DataOutStage+0xd8>
}
}
else
{
if (pdev->ep0_state == USBD_EP0_STATUS_OUT)
800c9f0: 68fb ldr r3, [r7, #12]
800c9f2: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800c9f6: 2b05 cmp r3, #5
800c9f8: d11e bne.n 800ca38 <USBD_LL_DataOutStage+0xd8>
{
/*
* STATUS PHASE completed, update ep0_state to idle
*/
pdev->ep0_state = USBD_EP0_IDLE;
800c9fa: 68fb ldr r3, [r7, #12]
800c9fc: 2200 movs r2, #0
800c9fe: f8c3 2294 str.w r2, [r3, #660] @ 0x294
USBD_LL_StallEP(pdev, 0U);
800ca02: 2100 movs r1, #0
800ca04: 68f8 ldr r0, [r7, #12]
800ca06: f001 fb55 bl 800e0b4 <USBD_LL_StallEP>
800ca0a: e015 b.n 800ca38 <USBD_LL_DataOutStage+0xd8>
}
}
}
else if ((pdev->pClass->DataOut != NULL) &&
800ca0c: 68fb ldr r3, [r7, #12]
800ca0e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ca12: 699b ldr r3, [r3, #24]
800ca14: 2b00 cmp r3, #0
800ca16: d00d beq.n 800ca34 <USBD_LL_DataOutStage+0xd4>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800ca18: 68fb ldr r3, [r7, #12]
800ca1a: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataOut != NULL) &&
800ca1e: 2b03 cmp r3, #3
800ca20: d108 bne.n 800ca34 <USBD_LL_DataOutStage+0xd4>
{
pdev->pClass->DataOut(pdev, epnum);
800ca22: 68fb ldr r3, [r7, #12]
800ca24: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ca28: 699b ldr r3, [r3, #24]
800ca2a: 7afa ldrb r2, [r7, #11]
800ca2c: 4611 mov r1, r2
800ca2e: 68f8 ldr r0, [r7, #12]
800ca30: 4798 blx r3
800ca32: e001 b.n 800ca38 <USBD_LL_DataOutStage+0xd8>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800ca34: 2302 movs r3, #2
800ca36: e000 b.n 800ca3a <USBD_LL_DataOutStage+0xda>
}
return USBD_OK;
800ca38: 2300 movs r3, #0
}
800ca3a: 4618 mov r0, r3
800ca3c: 3718 adds r7, #24
800ca3e: 46bd mov sp, r7
800ca40: bd80 pop {r7, pc}
0800ca42 <USBD_LL_DataInStage>:
* @param epnum: endpoint index
* @retval status
*/
USBD_StatusTypeDef USBD_LL_DataInStage(USBD_HandleTypeDef *pdev,
uint8_t epnum, uint8_t *pdata)
{
800ca42: b580 push {r7, lr}
800ca44: b086 sub sp, #24
800ca46: af00 add r7, sp, #0
800ca48: 60f8 str r0, [r7, #12]
800ca4a: 460b mov r3, r1
800ca4c: 607a str r2, [r7, #4]
800ca4e: 72fb strb r3, [r7, #11]
USBD_EndpointTypeDef *pep;
if (epnum == 0U)
800ca50: 7afb ldrb r3, [r7, #11]
800ca52: 2b00 cmp r3, #0
800ca54: d17f bne.n 800cb56 <USBD_LL_DataInStage+0x114>
{
pep = &pdev->ep_in[0];
800ca56: 68fb ldr r3, [r7, #12]
800ca58: 3314 adds r3, #20
800ca5a: 617b str r3, [r7, #20]
if (pdev->ep0_state == USBD_EP0_DATA_IN)
800ca5c: 68fb ldr r3, [r7, #12]
800ca5e: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800ca62: 2b02 cmp r3, #2
800ca64: d15c bne.n 800cb20 <USBD_LL_DataInStage+0xde>
{
if (pep->rem_length > pep->maxpacket)
800ca66: 697b ldr r3, [r7, #20]
800ca68: 68da ldr r2, [r3, #12]
800ca6a: 697b ldr r3, [r7, #20]
800ca6c: 691b ldr r3, [r3, #16]
800ca6e: 429a cmp r2, r3
800ca70: d915 bls.n 800ca9e <USBD_LL_DataInStage+0x5c>
{
pep->rem_length -= pep->maxpacket;
800ca72: 697b ldr r3, [r7, #20]
800ca74: 68da ldr r2, [r3, #12]
800ca76: 697b ldr r3, [r7, #20]
800ca78: 691b ldr r3, [r3, #16]
800ca7a: 1ad2 subs r2, r2, r3
800ca7c: 697b ldr r3, [r7, #20]
800ca7e: 60da str r2, [r3, #12]
USBD_CtlContinueSendData(pdev, pdata, (uint16_t)pep->rem_length);
800ca80: 697b ldr r3, [r7, #20]
800ca82: 68db ldr r3, [r3, #12]
800ca84: b29b uxth r3, r3
800ca86: 461a mov r2, r3
800ca88: 6879 ldr r1, [r7, #4]
800ca8a: 68f8 ldr r0, [r7, #12]
800ca8c: f000 febe bl 800d80c <USBD_CtlContinueSendData>
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800ca90: 2300 movs r3, #0
800ca92: 2200 movs r2, #0
800ca94: 2100 movs r1, #0
800ca96: 68f8 ldr r0, [r7, #12]
800ca98: f001 fbb7 bl 800e20a <USBD_LL_PrepareReceive>
800ca9c: e04e b.n 800cb3c <USBD_LL_DataInStage+0xfa>
}
else
{
/* last packet is MPS multiple, so send ZLP packet */
if ((pep->total_length % pep->maxpacket == 0U) &&
800ca9e: 697b ldr r3, [r7, #20]
800caa0: 689b ldr r3, [r3, #8]
800caa2: 697a ldr r2, [r7, #20]
800caa4: 6912 ldr r2, [r2, #16]
800caa6: fbb3 f1f2 udiv r1, r3, r2
800caaa: fb01 f202 mul.w r2, r1, r2
800caae: 1a9b subs r3, r3, r2
800cab0: 2b00 cmp r3, #0
800cab2: d11c bne.n 800caee <USBD_LL_DataInStage+0xac>
(pep->total_length >= pep->maxpacket) &&
800cab4: 697b ldr r3, [r7, #20]
800cab6: 689a ldr r2, [r3, #8]
800cab8: 697b ldr r3, [r7, #20]
800caba: 691b ldr r3, [r3, #16]
if ((pep->total_length % pep->maxpacket == 0U) &&
800cabc: 429a cmp r2, r3
800cabe: d316 bcc.n 800caee <USBD_LL_DataInStage+0xac>
(pep->total_length < pdev->ep0_data_len))
800cac0: 697b ldr r3, [r7, #20]
800cac2: 689a ldr r2, [r3, #8]
800cac4: 68fb ldr r3, [r7, #12]
800cac6: f8d3 3298 ldr.w r3, [r3, #664] @ 0x298
(pep->total_length >= pep->maxpacket) &&
800caca: 429a cmp r2, r3
800cacc: d20f bcs.n 800caee <USBD_LL_DataInStage+0xac>
{
USBD_CtlContinueSendData(pdev, NULL, 0U);
800cace: 2200 movs r2, #0
800cad0: 2100 movs r1, #0
800cad2: 68f8 ldr r0, [r7, #12]
800cad4: f000 fe9a bl 800d80c <USBD_CtlContinueSendData>
pdev->ep0_data_len = 0U;
800cad8: 68fb ldr r3, [r7, #12]
800cada: 2200 movs r2, #0
800cadc: f8c3 2298 str.w r2, [r3, #664] @ 0x298
/* Prepare endpoint for premature end of transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800cae0: 2300 movs r3, #0
800cae2: 2200 movs r2, #0
800cae4: 2100 movs r1, #0
800cae6: 68f8 ldr r0, [r7, #12]
800cae8: f001 fb8f bl 800e20a <USBD_LL_PrepareReceive>
800caec: e026 b.n 800cb3c <USBD_LL_DataInStage+0xfa>
}
else
{
if ((pdev->pClass->EP0_TxSent != NULL) &&
800caee: 68fb ldr r3, [r7, #12]
800caf0: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800caf4: 68db ldr r3, [r3, #12]
800caf6: 2b00 cmp r3, #0
800caf8: d00a beq.n 800cb10 <USBD_LL_DataInStage+0xce>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cafa: 68fb ldr r3, [r7, #12]
800cafc: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
if ((pdev->pClass->EP0_TxSent != NULL) &&
800cb00: 2b03 cmp r3, #3
800cb02: d105 bne.n 800cb10 <USBD_LL_DataInStage+0xce>
{
pdev->pClass->EP0_TxSent(pdev);
800cb04: 68fb ldr r3, [r7, #12]
800cb06: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb0a: 68db ldr r3, [r3, #12]
800cb0c: 68f8 ldr r0, [r7, #12]
800cb0e: 4798 blx r3
}
USBD_LL_StallEP(pdev, 0x80U);
800cb10: 2180 movs r1, #128 @ 0x80
800cb12: 68f8 ldr r0, [r7, #12]
800cb14: f001 face bl 800e0b4 <USBD_LL_StallEP>
USBD_CtlReceiveStatus(pdev);
800cb18: 68f8 ldr r0, [r7, #12]
800cb1a: f000 fecc bl 800d8b6 <USBD_CtlReceiveStatus>
800cb1e: e00d b.n 800cb3c <USBD_LL_DataInStage+0xfa>
}
}
}
else
{
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800cb20: 68fb ldr r3, [r7, #12]
800cb22: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
800cb26: 2b04 cmp r3, #4
800cb28: d004 beq.n 800cb34 <USBD_LL_DataInStage+0xf2>
(pdev->ep0_state == USBD_EP0_IDLE))
800cb2a: 68fb ldr r3, [r7, #12]
800cb2c: f8d3 3294 ldr.w r3, [r3, #660] @ 0x294
if ((pdev->ep0_state == USBD_EP0_STATUS_IN) ||
800cb30: 2b00 cmp r3, #0
800cb32: d103 bne.n 800cb3c <USBD_LL_DataInStage+0xfa>
{
USBD_LL_StallEP(pdev, 0x80U);
800cb34: 2180 movs r1, #128 @ 0x80
800cb36: 68f8 ldr r0, [r7, #12]
800cb38: f001 fabc bl 800e0b4 <USBD_LL_StallEP>
}
}
if (pdev->dev_test_mode == 1U)
800cb3c: 68fb ldr r3, [r7, #12]
800cb3e: f893 32a0 ldrb.w r3, [r3, #672] @ 0x2a0
800cb42: 2b01 cmp r3, #1
800cb44: d11d bne.n 800cb82 <USBD_LL_DataInStage+0x140>
{
USBD_RunTestMode(pdev);
800cb46: 68f8 ldr r0, [r7, #12]
800cb48: f7ff fe81 bl 800c84e <USBD_RunTestMode>
pdev->dev_test_mode = 0U;
800cb4c: 68fb ldr r3, [r7, #12]
800cb4e: 2200 movs r2, #0
800cb50: f883 22a0 strb.w r2, [r3, #672] @ 0x2a0
800cb54: e015 b.n 800cb82 <USBD_LL_DataInStage+0x140>
}
}
else if ((pdev->pClass->DataIn != NULL) &&
800cb56: 68fb ldr r3, [r7, #12]
800cb58: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb5c: 695b ldr r3, [r3, #20]
800cb5e: 2b00 cmp r3, #0
800cb60: d00d beq.n 800cb7e <USBD_LL_DataInStage+0x13c>
(pdev->dev_state == USBD_STATE_CONFIGURED))
800cb62: 68fb ldr r3, [r7, #12]
800cb64: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
else if ((pdev->pClass->DataIn != NULL) &&
800cb68: 2b03 cmp r3, #3
800cb6a: d108 bne.n 800cb7e <USBD_LL_DataInStage+0x13c>
{
pdev->pClass->DataIn(pdev, epnum);
800cb6c: 68fb ldr r3, [r7, #12]
800cb6e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cb72: 695b ldr r3, [r3, #20]
800cb74: 7afa ldrb r2, [r7, #11]
800cb76: 4611 mov r1, r2
800cb78: 68f8 ldr r0, [r7, #12]
800cb7a: 4798 blx r3
800cb7c: e001 b.n 800cb82 <USBD_LL_DataInStage+0x140>
}
else
{
/* should never be in this condition */
return USBD_FAIL;
800cb7e: 2302 movs r3, #2
800cb80: e000 b.n 800cb84 <USBD_LL_DataInStage+0x142>
}
return USBD_OK;
800cb82: 2300 movs r3, #0
}
800cb84: 4618 mov r0, r3
800cb86: 3718 adds r7, #24
800cb88: 46bd mov sp, r7
800cb8a: bd80 pop {r7, pc}
0800cb8c <USBD_LL_Reset>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Reset(USBD_HandleTypeDef *pdev)
{
800cb8c: b580 push {r7, lr}
800cb8e: b082 sub sp, #8
800cb90: af00 add r7, sp, #0
800cb92: 6078 str r0, [r7, #4]
/* Open EP0 OUT */
USBD_LL_OpenEP(pdev, 0x00U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800cb94: 2340 movs r3, #64 @ 0x40
800cb96: 2200 movs r2, #0
800cb98: 2100 movs r1, #0
800cb9a: 6878 ldr r0, [r7, #4]
800cb9c: f001 fa45 bl 800e02a <USBD_LL_OpenEP>
pdev->ep_out[0x00U & 0xFU].is_used = 1U;
800cba0: 687b ldr r3, [r7, #4]
800cba2: 2201 movs r2, #1
800cba4: f8c3 2158 str.w r2, [r3, #344] @ 0x158
pdev->ep_out[0].maxpacket = USB_MAX_EP0_SIZE;
800cba8: 687b ldr r3, [r7, #4]
800cbaa: 2240 movs r2, #64 @ 0x40
800cbac: f8c3 2164 str.w r2, [r3, #356] @ 0x164
/* Open EP0 IN */
USBD_LL_OpenEP(pdev, 0x80U, USBD_EP_TYPE_CTRL, USB_MAX_EP0_SIZE);
800cbb0: 2340 movs r3, #64 @ 0x40
800cbb2: 2200 movs r2, #0
800cbb4: 2180 movs r1, #128 @ 0x80
800cbb6: 6878 ldr r0, [r7, #4]
800cbb8: f001 fa37 bl 800e02a <USBD_LL_OpenEP>
pdev->ep_in[0x80U & 0xFU].is_used = 1U;
800cbbc: 687b ldr r3, [r7, #4]
800cbbe: 2201 movs r2, #1
800cbc0: 619a str r2, [r3, #24]
pdev->ep_in[0].maxpacket = USB_MAX_EP0_SIZE;
800cbc2: 687b ldr r3, [r7, #4]
800cbc4: 2240 movs r2, #64 @ 0x40
800cbc6: 625a str r2, [r3, #36] @ 0x24
/* Upon Reset call user call back */
pdev->dev_state = USBD_STATE_DEFAULT;
800cbc8: 687b ldr r3, [r7, #4]
800cbca: 2201 movs r2, #1
800cbcc: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->ep0_state = USBD_EP0_IDLE;
800cbd0: 687b ldr r3, [r7, #4]
800cbd2: 2200 movs r2, #0
800cbd4: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->dev_config = 0U;
800cbd8: 687b ldr r3, [r7, #4]
800cbda: 2200 movs r2, #0
800cbdc: 605a str r2, [r3, #4]
pdev->dev_remote_wakeup = 0U;
800cbde: 687b ldr r3, [r7, #4]
800cbe0: 2200 movs r2, #0
800cbe2: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
if (pdev->pClassData)
800cbe6: 687b ldr r3, [r7, #4]
800cbe8: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800cbec: 2b00 cmp r3, #0
800cbee: d009 beq.n 800cc04 <USBD_LL_Reset+0x78>
{
pdev->pClass->DeInit(pdev, (uint8_t)pdev->dev_config);
800cbf0: 687b ldr r3, [r7, #4]
800cbf2: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cbf6: 685b ldr r3, [r3, #4]
800cbf8: 687a ldr r2, [r7, #4]
800cbfa: 6852 ldr r2, [r2, #4]
800cbfc: b2d2 uxtb r2, r2
800cbfe: 4611 mov r1, r2
800cc00: 6878 ldr r0, [r7, #4]
800cc02: 4798 blx r3
}
return USBD_OK;
800cc04: 2300 movs r3, #0
}
800cc06: 4618 mov r0, r3
800cc08: 3708 adds r7, #8
800cc0a: 46bd mov sp, r7
800cc0c: bd80 pop {r7, pc}
0800cc0e <USBD_LL_SetSpeed>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SetSpeed(USBD_HandleTypeDef *pdev,
USBD_SpeedTypeDef speed)
{
800cc0e: b480 push {r7}
800cc10: b083 sub sp, #12
800cc12: af00 add r7, sp, #0
800cc14: 6078 str r0, [r7, #4]
800cc16: 460b mov r3, r1
800cc18: 70fb strb r3, [r7, #3]
pdev->dev_speed = speed;
800cc1a: 687b ldr r3, [r7, #4]
800cc1c: 78fa ldrb r2, [r7, #3]
800cc1e: 741a strb r2, [r3, #16]
return USBD_OK;
800cc20: 2300 movs r3, #0
}
800cc22: 4618 mov r0, r3
800cc24: 370c adds r7, #12
800cc26: 46bd mov sp, r7
800cc28: bc80 pop {r7}
800cc2a: 4770 bx lr
0800cc2c <USBD_LL_Suspend>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Suspend(USBD_HandleTypeDef *pdev)
{
800cc2c: b480 push {r7}
800cc2e: b083 sub sp, #12
800cc30: af00 add r7, sp, #0
800cc32: 6078 str r0, [r7, #4]
pdev->dev_old_state = pdev->dev_state;
800cc34: 687b ldr r3, [r7, #4]
800cc36: f893 229c ldrb.w r2, [r3, #668] @ 0x29c
800cc3a: 687b ldr r3, [r7, #4]
800cc3c: f883 229d strb.w r2, [r3, #669] @ 0x29d
pdev->dev_state = USBD_STATE_SUSPENDED;
800cc40: 687b ldr r3, [r7, #4]
800cc42: 2204 movs r2, #4
800cc44: f883 229c strb.w r2, [r3, #668] @ 0x29c
return USBD_OK;
800cc48: 2300 movs r3, #0
}
800cc4a: 4618 mov r0, r3
800cc4c: 370c adds r7, #12
800cc4e: 46bd mov sp, r7
800cc50: bc80 pop {r7}
800cc52: 4770 bx lr
0800cc54 <USBD_LL_Resume>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_Resume(USBD_HandleTypeDef *pdev)
{
800cc54: b480 push {r7}
800cc56: b083 sub sp, #12
800cc58: af00 add r7, sp, #0
800cc5a: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_SUSPENDED)
800cc5c: 687b ldr r3, [r7, #4]
800cc5e: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cc62: 2b04 cmp r3, #4
800cc64: d105 bne.n 800cc72 <USBD_LL_Resume+0x1e>
{
pdev->dev_state = pdev->dev_old_state;
800cc66: 687b ldr r3, [r7, #4]
800cc68: f893 229d ldrb.w r2, [r3, #669] @ 0x29d
800cc6c: 687b ldr r3, [r7, #4]
800cc6e: f883 229c strb.w r2, [r3, #668] @ 0x29c
}
return USBD_OK;
800cc72: 2300 movs r3, #0
}
800cc74: 4618 mov r0, r3
800cc76: 370c adds r7, #12
800cc78: 46bd mov sp, r7
800cc7a: bc80 pop {r7}
800cc7c: 4770 bx lr
0800cc7e <USBD_LL_SOF>:
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_LL_SOF(USBD_HandleTypeDef *pdev)
{
800cc7e: b580 push {r7, lr}
800cc80: b082 sub sp, #8
800cc82: af00 add r7, sp, #0
800cc84: 6078 str r0, [r7, #4]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800cc86: 687b ldr r3, [r7, #4]
800cc88: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cc8c: 2b03 cmp r3, #3
800cc8e: d10b bne.n 800cca8 <USBD_LL_SOF+0x2a>
{
if (pdev->pClass->SOF != NULL)
800cc90: 687b ldr r3, [r7, #4]
800cc92: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cc96: 69db ldr r3, [r3, #28]
800cc98: 2b00 cmp r3, #0
800cc9a: d005 beq.n 800cca8 <USBD_LL_SOF+0x2a>
{
pdev->pClass->SOF(pdev);
800cc9c: 687b ldr r3, [r7, #4]
800cc9e: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cca2: 69db ldr r3, [r3, #28]
800cca4: 6878 ldr r0, [r7, #4]
800cca6: 4798 blx r3
}
}
return USBD_OK;
800cca8: 2300 movs r3, #0
}
800ccaa: 4618 mov r0, r3
800ccac: 3708 adds r7, #8
800ccae: 46bd mov sp, r7
800ccb0: bd80 pop {r7, pc}
...
0800ccb4 <USBD_StdDevReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdDevReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800ccb4: b580 push {r7, lr}
800ccb6: b084 sub sp, #16
800ccb8: af00 add r7, sp, #0
800ccba: 6078 str r0, [r7, #4]
800ccbc: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800ccbe: 2300 movs r3, #0
800ccc0: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800ccc2: 683b ldr r3, [r7, #0]
800ccc4: 781b ldrb r3, [r3, #0]
800ccc6: f003 0360 and.w r3, r3, #96 @ 0x60
800ccca: 2b40 cmp r3, #64 @ 0x40
800cccc: d005 beq.n 800ccda <USBD_StdDevReq+0x26>
800ccce: 2b40 cmp r3, #64 @ 0x40
800ccd0: d84f bhi.n 800cd72 <USBD_StdDevReq+0xbe>
800ccd2: 2b00 cmp r3, #0
800ccd4: d009 beq.n 800ccea <USBD_StdDevReq+0x36>
800ccd6: 2b20 cmp r3, #32
800ccd8: d14b bne.n 800cd72 <USBD_StdDevReq+0xbe>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800ccda: 687b ldr r3, [r7, #4]
800ccdc: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cce0: 689b ldr r3, [r3, #8]
800cce2: 6839 ldr r1, [r7, #0]
800cce4: 6878 ldr r0, [r7, #4]
800cce6: 4798 blx r3
break;
800cce8: e048 b.n 800cd7c <USBD_StdDevReq+0xc8>
case USB_REQ_TYPE_STANDARD:
switch (req->bRequest)
800ccea: 683b ldr r3, [r7, #0]
800ccec: 785b ldrb r3, [r3, #1]
800ccee: 2b09 cmp r3, #9
800ccf0: d839 bhi.n 800cd66 <USBD_StdDevReq+0xb2>
800ccf2: a201 add r2, pc, #4 @ (adr r2, 800ccf8 <USBD_StdDevReq+0x44>)
800ccf4: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800ccf8: 0800cd49 .word 0x0800cd49
800ccfc: 0800cd5d .word 0x0800cd5d
800cd00: 0800cd67 .word 0x0800cd67
800cd04: 0800cd53 .word 0x0800cd53
800cd08: 0800cd67 .word 0x0800cd67
800cd0c: 0800cd2b .word 0x0800cd2b
800cd10: 0800cd21 .word 0x0800cd21
800cd14: 0800cd67 .word 0x0800cd67
800cd18: 0800cd3f .word 0x0800cd3f
800cd1c: 0800cd35 .word 0x0800cd35
{
case USB_REQ_GET_DESCRIPTOR:
USBD_GetDescriptor(pdev, req);
800cd20: 6839 ldr r1, [r7, #0]
800cd22: 6878 ldr r0, [r7, #4]
800cd24: f000 f9dc bl 800d0e0 <USBD_GetDescriptor>
break;
800cd28: e022 b.n 800cd70 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_ADDRESS:
USBD_SetAddress(pdev, req);
800cd2a: 6839 ldr r1, [r7, #0]
800cd2c: 6878 ldr r0, [r7, #4]
800cd2e: f000 fb3f bl 800d3b0 <USBD_SetAddress>
break;
800cd32: e01d b.n 800cd70 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_CONFIGURATION:
USBD_SetConfig(pdev, req);
800cd34: 6839 ldr r1, [r7, #0]
800cd36: 6878 ldr r0, [r7, #4]
800cd38: f000 fb7e bl 800d438 <USBD_SetConfig>
break;
800cd3c: e018 b.n 800cd70 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_CONFIGURATION:
USBD_GetConfig(pdev, req);
800cd3e: 6839 ldr r1, [r7, #0]
800cd40: 6878 ldr r0, [r7, #4]
800cd42: f000 fc07 bl 800d554 <USBD_GetConfig>
break;
800cd46: e013 b.n 800cd70 <USBD_StdDevReq+0xbc>
case USB_REQ_GET_STATUS:
USBD_GetStatus(pdev, req);
800cd48: 6839 ldr r1, [r7, #0]
800cd4a: 6878 ldr r0, [r7, #4]
800cd4c: f000 fc37 bl 800d5be <USBD_GetStatus>
break;
800cd50: e00e b.n 800cd70 <USBD_StdDevReq+0xbc>
case USB_REQ_SET_FEATURE:
USBD_SetFeature(pdev, req);
800cd52: 6839 ldr r1, [r7, #0]
800cd54: 6878 ldr r0, [r7, #4]
800cd56: f000 fc65 bl 800d624 <USBD_SetFeature>
break;
800cd5a: e009 b.n 800cd70 <USBD_StdDevReq+0xbc>
case USB_REQ_CLEAR_FEATURE:
USBD_ClrFeature(pdev, req);
800cd5c: 6839 ldr r1, [r7, #0]
800cd5e: 6878 ldr r0, [r7, #4]
800cd60: f000 fc74 bl 800d64c <USBD_ClrFeature>
break;
800cd64: e004 b.n 800cd70 <USBD_StdDevReq+0xbc>
default:
USBD_CtlError(pdev, req);
800cd66: 6839 ldr r1, [r7, #0]
800cd68: 6878 ldr r0, [r7, #4]
800cd6a: f000 fcc9 bl 800d700 <USBD_CtlError>
break;
800cd6e: bf00 nop
}
break;
800cd70: e004 b.n 800cd7c <USBD_StdDevReq+0xc8>
default:
USBD_CtlError(pdev, req);
800cd72: 6839 ldr r1, [r7, #0]
800cd74: 6878 ldr r0, [r7, #4]
800cd76: f000 fcc3 bl 800d700 <USBD_CtlError>
break;
800cd7a: bf00 nop
}
return ret;
800cd7c: 7bfb ldrb r3, [r7, #15]
}
800cd7e: 4618 mov r0, r3
800cd80: 3710 adds r7, #16
800cd82: 46bd mov sp, r7
800cd84: bd80 pop {r7, pc}
800cd86: bf00 nop
0800cd88 <USBD_StdItfReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdItfReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800cd88: b580 push {r7, lr}
800cd8a: b084 sub sp, #16
800cd8c: af00 add r7, sp, #0
800cd8e: 6078 str r0, [r7, #4]
800cd90: 6039 str r1, [r7, #0]
USBD_StatusTypeDef ret = USBD_OK;
800cd92: 2300 movs r3, #0
800cd94: 73fb strb r3, [r7, #15]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800cd96: 683b ldr r3, [r7, #0]
800cd98: 781b ldrb r3, [r3, #0]
800cd9a: f003 0360 and.w r3, r3, #96 @ 0x60
800cd9e: 2b40 cmp r3, #64 @ 0x40
800cda0: d005 beq.n 800cdae <USBD_StdItfReq+0x26>
800cda2: 2b40 cmp r3, #64 @ 0x40
800cda4: d82e bhi.n 800ce04 <USBD_StdItfReq+0x7c>
800cda6: 2b00 cmp r3, #0
800cda8: d001 beq.n 800cdae <USBD_StdItfReq+0x26>
800cdaa: 2b20 cmp r3, #32
800cdac: d12a bne.n 800ce04 <USBD_StdItfReq+0x7c>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
case USB_REQ_TYPE_STANDARD:
switch (pdev->dev_state)
800cdae: 687b ldr r3, [r7, #4]
800cdb0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cdb4: 3b01 subs r3, #1
800cdb6: 2b02 cmp r3, #2
800cdb8: d81d bhi.n 800cdf6 <USBD_StdItfReq+0x6e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (LOBYTE(req->wIndex) <= USBD_MAX_NUM_INTERFACES)
800cdba: 683b ldr r3, [r7, #0]
800cdbc: 889b ldrh r3, [r3, #4]
800cdbe: b2db uxtb r3, r3
800cdc0: 2b01 cmp r3, #1
800cdc2: d813 bhi.n 800cdec <USBD_StdItfReq+0x64>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800cdc4: 687b ldr r3, [r7, #4]
800cdc6: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800cdca: 689b ldr r3, [r3, #8]
800cdcc: 6839 ldr r1, [r7, #0]
800cdce: 6878 ldr r0, [r7, #4]
800cdd0: 4798 blx r3
800cdd2: 4603 mov r3, r0
800cdd4: 73fb strb r3, [r7, #15]
if ((req->wLength == 0U) && (ret == USBD_OK))
800cdd6: 683b ldr r3, [r7, #0]
800cdd8: 88db ldrh r3, [r3, #6]
800cdda: 2b00 cmp r3, #0
800cddc: d110 bne.n 800ce00 <USBD_StdItfReq+0x78>
800cdde: 7bfb ldrb r3, [r7, #15]
800cde0: 2b00 cmp r3, #0
800cde2: d10d bne.n 800ce00 <USBD_StdItfReq+0x78>
{
USBD_CtlSendStatus(pdev);
800cde4: 6878 ldr r0, [r7, #4]
800cde6: f000 fd53 bl 800d890 <USBD_CtlSendStatus>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800cdea: e009 b.n 800ce00 <USBD_StdItfReq+0x78>
USBD_CtlError(pdev, req);
800cdec: 6839 ldr r1, [r7, #0]
800cdee: 6878 ldr r0, [r7, #4]
800cdf0: f000 fc86 bl 800d700 <USBD_CtlError>
break;
800cdf4: e004 b.n 800ce00 <USBD_StdItfReq+0x78>
default:
USBD_CtlError(pdev, req);
800cdf6: 6839 ldr r1, [r7, #0]
800cdf8: 6878 ldr r0, [r7, #4]
800cdfa: f000 fc81 bl 800d700 <USBD_CtlError>
break;
800cdfe: e000 b.n 800ce02 <USBD_StdItfReq+0x7a>
break;
800ce00: bf00 nop
}
break;
800ce02: e004 b.n 800ce0e <USBD_StdItfReq+0x86>
default:
USBD_CtlError(pdev, req);
800ce04: 6839 ldr r1, [r7, #0]
800ce06: 6878 ldr r0, [r7, #4]
800ce08: f000 fc7a bl 800d700 <USBD_CtlError>
break;
800ce0c: bf00 nop
}
return USBD_OK;
800ce0e: 2300 movs r3, #0
}
800ce10: 4618 mov r0, r3
800ce12: 3710 adds r7, #16
800ce14: 46bd mov sp, r7
800ce16: bd80 pop {r7, pc}
0800ce18 <USBD_StdEPReq>:
* @param req: usb request
* @retval status
*/
USBD_StatusTypeDef USBD_StdEPReq(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800ce18: b580 push {r7, lr}
800ce1a: b084 sub sp, #16
800ce1c: af00 add r7, sp, #0
800ce1e: 6078 str r0, [r7, #4]
800ce20: 6039 str r1, [r7, #0]
USBD_EndpointTypeDef *pep;
uint8_t ep_addr;
USBD_StatusTypeDef ret = USBD_OK;
800ce22: 2300 movs r3, #0
800ce24: 73fb strb r3, [r7, #15]
ep_addr = LOBYTE(req->wIndex);
800ce26: 683b ldr r3, [r7, #0]
800ce28: 889b ldrh r3, [r3, #4]
800ce2a: 73bb strb r3, [r7, #14]
switch (req->bmRequest & USB_REQ_TYPE_MASK)
800ce2c: 683b ldr r3, [r7, #0]
800ce2e: 781b ldrb r3, [r3, #0]
800ce30: f003 0360 and.w r3, r3, #96 @ 0x60
800ce34: 2b40 cmp r3, #64 @ 0x40
800ce36: d007 beq.n 800ce48 <USBD_StdEPReq+0x30>
800ce38: 2b40 cmp r3, #64 @ 0x40
800ce3a: f200 8146 bhi.w 800d0ca <USBD_StdEPReq+0x2b2>
800ce3e: 2b00 cmp r3, #0
800ce40: d00a beq.n 800ce58 <USBD_StdEPReq+0x40>
800ce42: 2b20 cmp r3, #32
800ce44: f040 8141 bne.w 800d0ca <USBD_StdEPReq+0x2b2>
{
case USB_REQ_TYPE_CLASS:
case USB_REQ_TYPE_VENDOR:
pdev->pClass->Setup(pdev, req);
800ce48: 687b ldr r3, [r7, #4]
800ce4a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ce4e: 689b ldr r3, [r3, #8]
800ce50: 6839 ldr r1, [r7, #0]
800ce52: 6878 ldr r0, [r7, #4]
800ce54: 4798 blx r3
break;
800ce56: e13d b.n 800d0d4 <USBD_StdEPReq+0x2bc>
case USB_REQ_TYPE_STANDARD:
/* Check if it is a class request */
if ((req->bmRequest & 0x60U) == 0x20U)
800ce58: 683b ldr r3, [r7, #0]
800ce5a: 781b ldrb r3, [r3, #0]
800ce5c: f003 0360 and.w r3, r3, #96 @ 0x60
800ce60: 2b20 cmp r3, #32
800ce62: d10a bne.n 800ce7a <USBD_StdEPReq+0x62>
{
ret = (USBD_StatusTypeDef)pdev->pClass->Setup(pdev, req);
800ce64: 687b ldr r3, [r7, #4]
800ce66: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800ce6a: 689b ldr r3, [r3, #8]
800ce6c: 6839 ldr r1, [r7, #0]
800ce6e: 6878 ldr r0, [r7, #4]
800ce70: 4798 blx r3
800ce72: 4603 mov r3, r0
800ce74: 73fb strb r3, [r7, #15]
return ret;
800ce76: 7bfb ldrb r3, [r7, #15]
800ce78: e12d b.n 800d0d6 <USBD_StdEPReq+0x2be>
}
switch (req->bRequest)
800ce7a: 683b ldr r3, [r7, #0]
800ce7c: 785b ldrb r3, [r3, #1]
800ce7e: 2b03 cmp r3, #3
800ce80: d007 beq.n 800ce92 <USBD_StdEPReq+0x7a>
800ce82: 2b03 cmp r3, #3
800ce84: f300 811b bgt.w 800d0be <USBD_StdEPReq+0x2a6>
800ce88: 2b00 cmp r3, #0
800ce8a: d072 beq.n 800cf72 <USBD_StdEPReq+0x15a>
800ce8c: 2b01 cmp r3, #1
800ce8e: d03a beq.n 800cf06 <USBD_StdEPReq+0xee>
800ce90: e115 b.n 800d0be <USBD_StdEPReq+0x2a6>
{
case USB_REQ_SET_FEATURE:
switch (pdev->dev_state)
800ce92: 687b ldr r3, [r7, #4]
800ce94: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800ce98: 2b02 cmp r3, #2
800ce9a: d002 beq.n 800cea2 <USBD_StdEPReq+0x8a>
800ce9c: 2b03 cmp r3, #3
800ce9e: d015 beq.n 800cecc <USBD_StdEPReq+0xb4>
800cea0: e02b b.n 800cefa <USBD_StdEPReq+0xe2>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800cea2: 7bbb ldrb r3, [r7, #14]
800cea4: 2b00 cmp r3, #0
800cea6: d00c beq.n 800cec2 <USBD_StdEPReq+0xaa>
800cea8: 7bbb ldrb r3, [r7, #14]
800ceaa: 2b80 cmp r3, #128 @ 0x80
800ceac: d009 beq.n 800cec2 <USBD_StdEPReq+0xaa>
{
USBD_LL_StallEP(pdev, ep_addr);
800ceae: 7bbb ldrb r3, [r7, #14]
800ceb0: 4619 mov r1, r3
800ceb2: 6878 ldr r0, [r7, #4]
800ceb4: f001 f8fe bl 800e0b4 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800ceb8: 2180 movs r1, #128 @ 0x80
800ceba: 6878 ldr r0, [r7, #4]
800cebc: f001 f8fa bl 800e0b4 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800cec0: e020 b.n 800cf04 <USBD_StdEPReq+0xec>
USBD_CtlError(pdev, req);
800cec2: 6839 ldr r1, [r7, #0]
800cec4: 6878 ldr r0, [r7, #4]
800cec6: f000 fc1b bl 800d700 <USBD_CtlError>
break;
800ceca: e01b b.n 800cf04 <USBD_StdEPReq+0xec>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800cecc: 683b ldr r3, [r7, #0]
800cece: 885b ldrh r3, [r3, #2]
800ced0: 2b00 cmp r3, #0
800ced2: d10e bne.n 800cef2 <USBD_StdEPReq+0xda>
{
if ((ep_addr != 0x00U) &&
800ced4: 7bbb ldrb r3, [r7, #14]
800ced6: 2b00 cmp r3, #0
800ced8: d00b beq.n 800cef2 <USBD_StdEPReq+0xda>
800ceda: 7bbb ldrb r3, [r7, #14]
800cedc: 2b80 cmp r3, #128 @ 0x80
800cede: d008 beq.n 800cef2 <USBD_StdEPReq+0xda>
(ep_addr != 0x80U) && (req->wLength == 0x00U))
800cee0: 683b ldr r3, [r7, #0]
800cee2: 88db ldrh r3, [r3, #6]
800cee4: 2b00 cmp r3, #0
800cee6: d104 bne.n 800cef2 <USBD_StdEPReq+0xda>
{
USBD_LL_StallEP(pdev, ep_addr);
800cee8: 7bbb ldrb r3, [r7, #14]
800ceea: 4619 mov r1, r3
800ceec: 6878 ldr r0, [r7, #4]
800ceee: f001 f8e1 bl 800e0b4 <USBD_LL_StallEP>
}
}
USBD_CtlSendStatus(pdev);
800cef2: 6878 ldr r0, [r7, #4]
800cef4: f000 fccc bl 800d890 <USBD_CtlSendStatus>
break;
800cef8: e004 b.n 800cf04 <USBD_StdEPReq+0xec>
default:
USBD_CtlError(pdev, req);
800cefa: 6839 ldr r1, [r7, #0]
800cefc: 6878 ldr r0, [r7, #4]
800cefe: f000 fbff bl 800d700 <USBD_CtlError>
break;
800cf02: bf00 nop
}
break;
800cf04: e0e0 b.n 800d0c8 <USBD_StdEPReq+0x2b0>
case USB_REQ_CLEAR_FEATURE:
switch (pdev->dev_state)
800cf06: 687b ldr r3, [r7, #4]
800cf08: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cf0c: 2b02 cmp r3, #2
800cf0e: d002 beq.n 800cf16 <USBD_StdEPReq+0xfe>
800cf10: 2b03 cmp r3, #3
800cf12: d015 beq.n 800cf40 <USBD_StdEPReq+0x128>
800cf14: e026 b.n 800cf64 <USBD_StdEPReq+0x14c>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800cf16: 7bbb ldrb r3, [r7, #14]
800cf18: 2b00 cmp r3, #0
800cf1a: d00c beq.n 800cf36 <USBD_StdEPReq+0x11e>
800cf1c: 7bbb ldrb r3, [r7, #14]
800cf1e: 2b80 cmp r3, #128 @ 0x80
800cf20: d009 beq.n 800cf36 <USBD_StdEPReq+0x11e>
{
USBD_LL_StallEP(pdev, ep_addr);
800cf22: 7bbb ldrb r3, [r7, #14]
800cf24: 4619 mov r1, r3
800cf26: 6878 ldr r0, [r7, #4]
800cf28: f001 f8c4 bl 800e0b4 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0x80U);
800cf2c: 2180 movs r1, #128 @ 0x80
800cf2e: 6878 ldr r0, [r7, #4]
800cf30: f001 f8c0 bl 800e0b4 <USBD_LL_StallEP>
}
else
{
USBD_CtlError(pdev, req);
}
break;
800cf34: e01c b.n 800cf70 <USBD_StdEPReq+0x158>
USBD_CtlError(pdev, req);
800cf36: 6839 ldr r1, [r7, #0]
800cf38: 6878 ldr r0, [r7, #4]
800cf3a: f000 fbe1 bl 800d700 <USBD_CtlError>
break;
800cf3e: e017 b.n 800cf70 <USBD_StdEPReq+0x158>
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_EP_HALT)
800cf40: 683b ldr r3, [r7, #0]
800cf42: 885b ldrh r3, [r3, #2]
800cf44: 2b00 cmp r3, #0
800cf46: d112 bne.n 800cf6e <USBD_StdEPReq+0x156>
{
if ((ep_addr & 0x7FU) != 0x00U)
800cf48: 7bbb ldrb r3, [r7, #14]
800cf4a: f003 037f and.w r3, r3, #127 @ 0x7f
800cf4e: 2b00 cmp r3, #0
800cf50: d004 beq.n 800cf5c <USBD_StdEPReq+0x144>
{
USBD_LL_ClearStallEP(pdev, ep_addr);
800cf52: 7bbb ldrb r3, [r7, #14]
800cf54: 4619 mov r1, r3
800cf56: 6878 ldr r0, [r7, #4]
800cf58: f001 f8cb bl 800e0f2 <USBD_LL_ClearStallEP>
}
USBD_CtlSendStatus(pdev);
800cf5c: 6878 ldr r0, [r7, #4]
800cf5e: f000 fc97 bl 800d890 <USBD_CtlSendStatus>
}
break;
800cf62: e004 b.n 800cf6e <USBD_StdEPReq+0x156>
default:
USBD_CtlError(pdev, req);
800cf64: 6839 ldr r1, [r7, #0]
800cf66: 6878 ldr r0, [r7, #4]
800cf68: f000 fbca bl 800d700 <USBD_CtlError>
break;
800cf6c: e000 b.n 800cf70 <USBD_StdEPReq+0x158>
break;
800cf6e: bf00 nop
}
break;
800cf70: e0aa b.n 800d0c8 <USBD_StdEPReq+0x2b0>
case USB_REQ_GET_STATUS:
switch (pdev->dev_state)
800cf72: 687b ldr r3, [r7, #4]
800cf74: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800cf78: 2b02 cmp r3, #2
800cf7a: d002 beq.n 800cf82 <USBD_StdEPReq+0x16a>
800cf7c: 2b03 cmp r3, #3
800cf7e: d032 beq.n 800cfe6 <USBD_StdEPReq+0x1ce>
800cf80: e097 b.n 800d0b2 <USBD_StdEPReq+0x29a>
{
case USBD_STATE_ADDRESSED:
if ((ep_addr != 0x00U) && (ep_addr != 0x80U))
800cf82: 7bbb ldrb r3, [r7, #14]
800cf84: 2b00 cmp r3, #0
800cf86: d007 beq.n 800cf98 <USBD_StdEPReq+0x180>
800cf88: 7bbb ldrb r3, [r7, #14]
800cf8a: 2b80 cmp r3, #128 @ 0x80
800cf8c: d004 beq.n 800cf98 <USBD_StdEPReq+0x180>
{
USBD_CtlError(pdev, req);
800cf8e: 6839 ldr r1, [r7, #0]
800cf90: 6878 ldr r0, [r7, #4]
800cf92: f000 fbb5 bl 800d700 <USBD_CtlError>
break;
800cf96: e091 b.n 800d0bc <USBD_StdEPReq+0x2a4>
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800cf98: f997 300e ldrsb.w r3, [r7, #14]
800cf9c: 2b00 cmp r3, #0
800cf9e: da0b bge.n 800cfb8 <USBD_StdEPReq+0x1a0>
800cfa0: 7bbb ldrb r3, [r7, #14]
800cfa2: f003 027f and.w r2, r3, #127 @ 0x7f
800cfa6: 4613 mov r3, r2
800cfa8: 009b lsls r3, r3, #2
800cfaa: 4413 add r3, r2
800cfac: 009b lsls r3, r3, #2
800cfae: 3310 adds r3, #16
800cfb0: 687a ldr r2, [r7, #4]
800cfb2: 4413 add r3, r2
800cfb4: 3304 adds r3, #4
800cfb6: e00b b.n 800cfd0 <USBD_StdEPReq+0x1b8>
&pdev->ep_out[ep_addr & 0x7FU];
800cfb8: 7bbb ldrb r3, [r7, #14]
800cfba: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800cfbe: 4613 mov r3, r2
800cfc0: 009b lsls r3, r3, #2
800cfc2: 4413 add r3, r2
800cfc4: 009b lsls r3, r3, #2
800cfc6: f503 73a8 add.w r3, r3, #336 @ 0x150
800cfca: 687a ldr r2, [r7, #4]
800cfcc: 4413 add r3, r2
800cfce: 3304 adds r3, #4
800cfd0: 60bb str r3, [r7, #8]
pep->status = 0x0000U;
800cfd2: 68bb ldr r3, [r7, #8]
800cfd4: 2200 movs r2, #0
800cfd6: 601a str r2, [r3, #0]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800cfd8: 68bb ldr r3, [r7, #8]
800cfda: 2202 movs r2, #2
800cfdc: 4619 mov r1, r3
800cfde: 6878 ldr r0, [r7, #4]
800cfe0: f000 fbf8 bl 800d7d4 <USBD_CtlSendData>
break;
800cfe4: e06a b.n 800d0bc <USBD_StdEPReq+0x2a4>
case USBD_STATE_CONFIGURED:
if ((ep_addr & 0x80U) == 0x80U)
800cfe6: f997 300e ldrsb.w r3, [r7, #14]
800cfea: 2b00 cmp r3, #0
800cfec: da11 bge.n 800d012 <USBD_StdEPReq+0x1fa>
{
if (pdev->ep_in[ep_addr & 0xFU].is_used == 0U)
800cfee: 7bbb ldrb r3, [r7, #14]
800cff0: f003 020f and.w r2, r3, #15
800cff4: 6879 ldr r1, [r7, #4]
800cff6: 4613 mov r3, r2
800cff8: 009b lsls r3, r3, #2
800cffa: 4413 add r3, r2
800cffc: 009b lsls r3, r3, #2
800cffe: 440b add r3, r1
800d000: 3318 adds r3, #24
800d002: 681b ldr r3, [r3, #0]
800d004: 2b00 cmp r3, #0
800d006: d117 bne.n 800d038 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800d008: 6839 ldr r1, [r7, #0]
800d00a: 6878 ldr r0, [r7, #4]
800d00c: f000 fb78 bl 800d700 <USBD_CtlError>
break;
800d010: e054 b.n 800d0bc <USBD_StdEPReq+0x2a4>
}
}
else
{
if (pdev->ep_out[ep_addr & 0xFU].is_used == 0U)
800d012: 7bbb ldrb r3, [r7, #14]
800d014: f003 020f and.w r2, r3, #15
800d018: 6879 ldr r1, [r7, #4]
800d01a: 4613 mov r3, r2
800d01c: 009b lsls r3, r3, #2
800d01e: 4413 add r3, r2
800d020: 009b lsls r3, r3, #2
800d022: 440b add r3, r1
800d024: f503 73ac add.w r3, r3, #344 @ 0x158
800d028: 681b ldr r3, [r3, #0]
800d02a: 2b00 cmp r3, #0
800d02c: d104 bne.n 800d038 <USBD_StdEPReq+0x220>
{
USBD_CtlError(pdev, req);
800d02e: 6839 ldr r1, [r7, #0]
800d030: 6878 ldr r0, [r7, #4]
800d032: f000 fb65 bl 800d700 <USBD_CtlError>
break;
800d036: e041 b.n 800d0bc <USBD_StdEPReq+0x2a4>
}
}
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d038: f997 300e ldrsb.w r3, [r7, #14]
800d03c: 2b00 cmp r3, #0
800d03e: da0b bge.n 800d058 <USBD_StdEPReq+0x240>
800d040: 7bbb ldrb r3, [r7, #14]
800d042: f003 027f and.w r2, r3, #127 @ 0x7f
800d046: 4613 mov r3, r2
800d048: 009b lsls r3, r3, #2
800d04a: 4413 add r3, r2
800d04c: 009b lsls r3, r3, #2
800d04e: 3310 adds r3, #16
800d050: 687a ldr r2, [r7, #4]
800d052: 4413 add r3, r2
800d054: 3304 adds r3, #4
800d056: e00b b.n 800d070 <USBD_StdEPReq+0x258>
&pdev->ep_out[ep_addr & 0x7FU];
800d058: 7bbb ldrb r3, [r7, #14]
800d05a: f003 027f and.w r2, r3, #127 @ 0x7f
pep = ((ep_addr & 0x80U) == 0x80U) ? &pdev->ep_in[ep_addr & 0x7FU] : \
800d05e: 4613 mov r3, r2
800d060: 009b lsls r3, r3, #2
800d062: 4413 add r3, r2
800d064: 009b lsls r3, r3, #2
800d066: f503 73a8 add.w r3, r3, #336 @ 0x150
800d06a: 687a ldr r2, [r7, #4]
800d06c: 4413 add r3, r2
800d06e: 3304 adds r3, #4
800d070: 60bb str r3, [r7, #8]
if ((ep_addr == 0x00U) || (ep_addr == 0x80U))
800d072: 7bbb ldrb r3, [r7, #14]
800d074: 2b00 cmp r3, #0
800d076: d002 beq.n 800d07e <USBD_StdEPReq+0x266>
800d078: 7bbb ldrb r3, [r7, #14]
800d07a: 2b80 cmp r3, #128 @ 0x80
800d07c: d103 bne.n 800d086 <USBD_StdEPReq+0x26e>
{
pep->status = 0x0000U;
800d07e: 68bb ldr r3, [r7, #8]
800d080: 2200 movs r2, #0
800d082: 601a str r2, [r3, #0]
800d084: e00e b.n 800d0a4 <USBD_StdEPReq+0x28c>
}
else if (USBD_LL_IsStallEP(pdev, ep_addr))
800d086: 7bbb ldrb r3, [r7, #14]
800d088: 4619 mov r1, r3
800d08a: 6878 ldr r0, [r7, #4]
800d08c: f001 f850 bl 800e130 <USBD_LL_IsStallEP>
800d090: 4603 mov r3, r0
800d092: 2b00 cmp r3, #0
800d094: d003 beq.n 800d09e <USBD_StdEPReq+0x286>
{
pep->status = 0x0001U;
800d096: 68bb ldr r3, [r7, #8]
800d098: 2201 movs r2, #1
800d09a: 601a str r2, [r3, #0]
800d09c: e002 b.n 800d0a4 <USBD_StdEPReq+0x28c>
}
else
{
pep->status = 0x0000U;
800d09e: 68bb ldr r3, [r7, #8]
800d0a0: 2200 movs r2, #0
800d0a2: 601a str r2, [r3, #0]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pep->status, 2U);
800d0a4: 68bb ldr r3, [r7, #8]
800d0a6: 2202 movs r2, #2
800d0a8: 4619 mov r1, r3
800d0aa: 6878 ldr r0, [r7, #4]
800d0ac: f000 fb92 bl 800d7d4 <USBD_CtlSendData>
break;
800d0b0: e004 b.n 800d0bc <USBD_StdEPReq+0x2a4>
default:
USBD_CtlError(pdev, req);
800d0b2: 6839 ldr r1, [r7, #0]
800d0b4: 6878 ldr r0, [r7, #4]
800d0b6: f000 fb23 bl 800d700 <USBD_CtlError>
break;
800d0ba: bf00 nop
}
break;
800d0bc: e004 b.n 800d0c8 <USBD_StdEPReq+0x2b0>
default:
USBD_CtlError(pdev, req);
800d0be: 6839 ldr r1, [r7, #0]
800d0c0: 6878 ldr r0, [r7, #4]
800d0c2: f000 fb1d bl 800d700 <USBD_CtlError>
break;
800d0c6: bf00 nop
}
break;
800d0c8: e004 b.n 800d0d4 <USBD_StdEPReq+0x2bc>
default:
USBD_CtlError(pdev, req);
800d0ca: 6839 ldr r1, [r7, #0]
800d0cc: 6878 ldr r0, [r7, #4]
800d0ce: f000 fb17 bl 800d700 <USBD_CtlError>
break;
800d0d2: bf00 nop
}
return ret;
800d0d4: 7bfb ldrb r3, [r7, #15]
}
800d0d6: 4618 mov r0, r3
800d0d8: 3710 adds r7, #16
800d0da: 46bd mov sp, r7
800d0dc: bd80 pop {r7, pc}
...
0800d0e0 <USBD_GetDescriptor>:
* @param req: usb request
* @retval status
*/
static void USBD_GetDescriptor(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d0e0: b580 push {r7, lr}
800d0e2: b084 sub sp, #16
800d0e4: af00 add r7, sp, #0
800d0e6: 6078 str r0, [r7, #4]
800d0e8: 6039 str r1, [r7, #0]
uint16_t len = 0U;
800d0ea: 2300 movs r3, #0
800d0ec: 813b strh r3, [r7, #8]
uint8_t *pbuf = NULL;
800d0ee: 2300 movs r3, #0
800d0f0: 60fb str r3, [r7, #12]
uint8_t err = 0U;
800d0f2: 2300 movs r3, #0
800d0f4: 72fb strb r3, [r7, #11]
switch (req->wValue >> 8)
800d0f6: 683b ldr r3, [r7, #0]
800d0f8: 885b ldrh r3, [r3, #2]
800d0fa: 0a1b lsrs r3, r3, #8
800d0fc: b29b uxth r3, r3
800d0fe: 3b01 subs r3, #1
800d100: 2b06 cmp r3, #6
800d102: f200 8128 bhi.w 800d356 <USBD_GetDescriptor+0x276>
800d106: a201 add r2, pc, #4 @ (adr r2, 800d10c <USBD_GetDescriptor+0x2c>)
800d108: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d10c: 0800d129 .word 0x0800d129
800d110: 0800d141 .word 0x0800d141
800d114: 0800d181 .word 0x0800d181
800d118: 0800d357 .word 0x0800d357
800d11c: 0800d357 .word 0x0800d357
800d120: 0800d2f7 .word 0x0800d2f7
800d124: 0800d323 .word 0x0800d323
err++;
}
break;
#endif
case USB_DESC_TYPE_DEVICE:
pbuf = pdev->pDesc->GetDeviceDescriptor(pdev->dev_speed, &len);
800d128: 687b ldr r3, [r7, #4]
800d12a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d12e: 681b ldr r3, [r3, #0]
800d130: 687a ldr r2, [r7, #4]
800d132: 7c12 ldrb r2, [r2, #16]
800d134: f107 0108 add.w r1, r7, #8
800d138: 4610 mov r0, r2
800d13a: 4798 blx r3
800d13c: 60f8 str r0, [r7, #12]
break;
800d13e: e112 b.n 800d366 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d140: 687b ldr r3, [r7, #4]
800d142: 7c1b ldrb r3, [r3, #16]
800d144: 2b00 cmp r3, #0
800d146: d10d bne.n 800d164 <USBD_GetDescriptor+0x84>
{
pbuf = pdev->pClass->GetHSConfigDescriptor(&len);
800d148: 687b ldr r3, [r7, #4]
800d14a: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d14e: 6a9b ldr r3, [r3, #40] @ 0x28
800d150: f107 0208 add.w r2, r7, #8
800d154: 4610 mov r0, r2
800d156: 4798 blx r3
800d158: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800d15a: 68fb ldr r3, [r7, #12]
800d15c: 3301 adds r3, #1
800d15e: 2202 movs r2, #2
800d160: 701a strb r2, [r3, #0]
else
{
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
}
break;
800d162: e100 b.n 800d366 <USBD_GetDescriptor+0x286>
pbuf = pdev->pClass->GetFSConfigDescriptor(&len);
800d164: 687b ldr r3, [r7, #4]
800d166: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d16a: 6adb ldr r3, [r3, #44] @ 0x2c
800d16c: f107 0208 add.w r2, r7, #8
800d170: 4610 mov r0, r2
800d172: 4798 blx r3
800d174: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_CONFIGURATION;
800d176: 68fb ldr r3, [r7, #12]
800d178: 3301 adds r3, #1
800d17a: 2202 movs r2, #2
800d17c: 701a strb r2, [r3, #0]
break;
800d17e: e0f2 b.n 800d366 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_STRING:
switch ((uint8_t)(req->wValue))
800d180: 683b ldr r3, [r7, #0]
800d182: 885b ldrh r3, [r3, #2]
800d184: b2db uxtb r3, r3
800d186: 2b05 cmp r3, #5
800d188: f200 80ac bhi.w 800d2e4 <USBD_GetDescriptor+0x204>
800d18c: a201 add r2, pc, #4 @ (adr r2, 800d194 <USBD_GetDescriptor+0xb4>)
800d18e: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800d192: bf00 nop
800d194: 0800d1ad .word 0x0800d1ad
800d198: 0800d1e1 .word 0x0800d1e1
800d19c: 0800d215 .word 0x0800d215
800d1a0: 0800d249 .word 0x0800d249
800d1a4: 0800d27d .word 0x0800d27d
800d1a8: 0800d2b1 .word 0x0800d2b1
{
case USBD_IDX_LANGID_STR:
if (pdev->pDesc->GetLangIDStrDescriptor != NULL)
800d1ac: 687b ldr r3, [r7, #4]
800d1ae: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d1b2: 685b ldr r3, [r3, #4]
800d1b4: 2b00 cmp r3, #0
800d1b6: d00b beq.n 800d1d0 <USBD_GetDescriptor+0xf0>
{
pbuf = pdev->pDesc->GetLangIDStrDescriptor(pdev->dev_speed, &len);
800d1b8: 687b ldr r3, [r7, #4]
800d1ba: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d1be: 685b ldr r3, [r3, #4]
800d1c0: 687a ldr r2, [r7, #4]
800d1c2: 7c12 ldrb r2, [r2, #16]
800d1c4: f107 0108 add.w r1, r7, #8
800d1c8: 4610 mov r0, r2
800d1ca: 4798 blx r3
800d1cc: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d1ce: e091 b.n 800d2f4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d1d0: 6839 ldr r1, [r7, #0]
800d1d2: 6878 ldr r0, [r7, #4]
800d1d4: f000 fa94 bl 800d700 <USBD_CtlError>
err++;
800d1d8: 7afb ldrb r3, [r7, #11]
800d1da: 3301 adds r3, #1
800d1dc: 72fb strb r3, [r7, #11]
break;
800d1de: e089 b.n 800d2f4 <USBD_GetDescriptor+0x214>
case USBD_IDX_MFC_STR:
if (pdev->pDesc->GetManufacturerStrDescriptor != NULL)
800d1e0: 687b ldr r3, [r7, #4]
800d1e2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d1e6: 689b ldr r3, [r3, #8]
800d1e8: 2b00 cmp r3, #0
800d1ea: d00b beq.n 800d204 <USBD_GetDescriptor+0x124>
{
pbuf = pdev->pDesc->GetManufacturerStrDescriptor(pdev->dev_speed, &len);
800d1ec: 687b ldr r3, [r7, #4]
800d1ee: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d1f2: 689b ldr r3, [r3, #8]
800d1f4: 687a ldr r2, [r7, #4]
800d1f6: 7c12 ldrb r2, [r2, #16]
800d1f8: f107 0108 add.w r1, r7, #8
800d1fc: 4610 mov r0, r2
800d1fe: 4798 blx r3
800d200: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d202: e077 b.n 800d2f4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d204: 6839 ldr r1, [r7, #0]
800d206: 6878 ldr r0, [r7, #4]
800d208: f000 fa7a bl 800d700 <USBD_CtlError>
err++;
800d20c: 7afb ldrb r3, [r7, #11]
800d20e: 3301 adds r3, #1
800d210: 72fb strb r3, [r7, #11]
break;
800d212: e06f b.n 800d2f4 <USBD_GetDescriptor+0x214>
case USBD_IDX_PRODUCT_STR:
if (pdev->pDesc->GetProductStrDescriptor != NULL)
800d214: 687b ldr r3, [r7, #4]
800d216: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d21a: 68db ldr r3, [r3, #12]
800d21c: 2b00 cmp r3, #0
800d21e: d00b beq.n 800d238 <USBD_GetDescriptor+0x158>
{
pbuf = pdev->pDesc->GetProductStrDescriptor(pdev->dev_speed, &len);
800d220: 687b ldr r3, [r7, #4]
800d222: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d226: 68db ldr r3, [r3, #12]
800d228: 687a ldr r2, [r7, #4]
800d22a: 7c12 ldrb r2, [r2, #16]
800d22c: f107 0108 add.w r1, r7, #8
800d230: 4610 mov r0, r2
800d232: 4798 blx r3
800d234: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d236: e05d b.n 800d2f4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d238: 6839 ldr r1, [r7, #0]
800d23a: 6878 ldr r0, [r7, #4]
800d23c: f000 fa60 bl 800d700 <USBD_CtlError>
err++;
800d240: 7afb ldrb r3, [r7, #11]
800d242: 3301 adds r3, #1
800d244: 72fb strb r3, [r7, #11]
break;
800d246: e055 b.n 800d2f4 <USBD_GetDescriptor+0x214>
case USBD_IDX_SERIAL_STR:
if (pdev->pDesc->GetSerialStrDescriptor != NULL)
800d248: 687b ldr r3, [r7, #4]
800d24a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d24e: 691b ldr r3, [r3, #16]
800d250: 2b00 cmp r3, #0
800d252: d00b beq.n 800d26c <USBD_GetDescriptor+0x18c>
{
pbuf = pdev->pDesc->GetSerialStrDescriptor(pdev->dev_speed, &len);
800d254: 687b ldr r3, [r7, #4]
800d256: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d25a: 691b ldr r3, [r3, #16]
800d25c: 687a ldr r2, [r7, #4]
800d25e: 7c12 ldrb r2, [r2, #16]
800d260: f107 0108 add.w r1, r7, #8
800d264: 4610 mov r0, r2
800d266: 4798 blx r3
800d268: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d26a: e043 b.n 800d2f4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d26c: 6839 ldr r1, [r7, #0]
800d26e: 6878 ldr r0, [r7, #4]
800d270: f000 fa46 bl 800d700 <USBD_CtlError>
err++;
800d274: 7afb ldrb r3, [r7, #11]
800d276: 3301 adds r3, #1
800d278: 72fb strb r3, [r7, #11]
break;
800d27a: e03b b.n 800d2f4 <USBD_GetDescriptor+0x214>
case USBD_IDX_CONFIG_STR:
if (pdev->pDesc->GetConfigurationStrDescriptor != NULL)
800d27c: 687b ldr r3, [r7, #4]
800d27e: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d282: 695b ldr r3, [r3, #20]
800d284: 2b00 cmp r3, #0
800d286: d00b beq.n 800d2a0 <USBD_GetDescriptor+0x1c0>
{
pbuf = pdev->pDesc->GetConfigurationStrDescriptor(pdev->dev_speed, &len);
800d288: 687b ldr r3, [r7, #4]
800d28a: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d28e: 695b ldr r3, [r3, #20]
800d290: 687a ldr r2, [r7, #4]
800d292: 7c12 ldrb r2, [r2, #16]
800d294: f107 0108 add.w r1, r7, #8
800d298: 4610 mov r0, r2
800d29a: 4798 blx r3
800d29c: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d29e: e029 b.n 800d2f4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d2a0: 6839 ldr r1, [r7, #0]
800d2a2: 6878 ldr r0, [r7, #4]
800d2a4: f000 fa2c bl 800d700 <USBD_CtlError>
err++;
800d2a8: 7afb ldrb r3, [r7, #11]
800d2aa: 3301 adds r3, #1
800d2ac: 72fb strb r3, [r7, #11]
break;
800d2ae: e021 b.n 800d2f4 <USBD_GetDescriptor+0x214>
case USBD_IDX_INTERFACE_STR:
if (pdev->pDesc->GetInterfaceStrDescriptor != NULL)
800d2b0: 687b ldr r3, [r7, #4]
800d2b2: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2b6: 699b ldr r3, [r3, #24]
800d2b8: 2b00 cmp r3, #0
800d2ba: d00b beq.n 800d2d4 <USBD_GetDescriptor+0x1f4>
{
pbuf = pdev->pDesc->GetInterfaceStrDescriptor(pdev->dev_speed, &len);
800d2bc: 687b ldr r3, [r7, #4]
800d2be: f8d3 32b0 ldr.w r3, [r3, #688] @ 0x2b0
800d2c2: 699b ldr r3, [r3, #24]
800d2c4: 687a ldr r2, [r7, #4]
800d2c6: 7c12 ldrb r2, [r2, #16]
800d2c8: f107 0108 add.w r1, r7, #8
800d2cc: 4610 mov r0, r2
800d2ce: 4798 blx r3
800d2d0: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d2d2: e00f b.n 800d2f4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
800d2d4: 6839 ldr r1, [r7, #0]
800d2d6: 6878 ldr r0, [r7, #4]
800d2d8: f000 fa12 bl 800d700 <USBD_CtlError>
err++;
800d2dc: 7afb ldrb r3, [r7, #11]
800d2de: 3301 adds r3, #1
800d2e0: 72fb strb r3, [r7, #11]
break;
800d2e2: e007 b.n 800d2f4 <USBD_GetDescriptor+0x214>
USBD_CtlError(pdev, req);
err++;
}
break;
#else
USBD_CtlError(pdev, req);
800d2e4: 6839 ldr r1, [r7, #0]
800d2e6: 6878 ldr r0, [r7, #4]
800d2e8: f000 fa0a bl 800d700 <USBD_CtlError>
err++;
800d2ec: 7afb ldrb r3, [r7, #11]
800d2ee: 3301 adds r3, #1
800d2f0: 72fb strb r3, [r7, #11]
#endif
}
break;
800d2f2: e038 b.n 800d366 <USBD_GetDescriptor+0x286>
800d2f4: e037 b.n 800d366 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_DEVICE_QUALIFIER:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d2f6: 687b ldr r3, [r7, #4]
800d2f8: 7c1b ldrb r3, [r3, #16]
800d2fa: 2b00 cmp r3, #0
800d2fc: d109 bne.n 800d312 <USBD_GetDescriptor+0x232>
{
pbuf = pdev->pClass->GetDeviceQualifierDescriptor(&len);
800d2fe: 687b ldr r3, [r7, #4]
800d300: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d304: 6b5b ldr r3, [r3, #52] @ 0x34
800d306: f107 0208 add.w r2, r7, #8
800d30a: 4610 mov r0, r2
800d30c: 4798 blx r3
800d30e: 60f8 str r0, [r7, #12]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d310: e029 b.n 800d366 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800d312: 6839 ldr r1, [r7, #0]
800d314: 6878 ldr r0, [r7, #4]
800d316: f000 f9f3 bl 800d700 <USBD_CtlError>
err++;
800d31a: 7afb ldrb r3, [r7, #11]
800d31c: 3301 adds r3, #1
800d31e: 72fb strb r3, [r7, #11]
break;
800d320: e021 b.n 800d366 <USBD_GetDescriptor+0x286>
case USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION:
if (pdev->dev_speed == USBD_SPEED_HIGH)
800d322: 687b ldr r3, [r7, #4]
800d324: 7c1b ldrb r3, [r3, #16]
800d326: 2b00 cmp r3, #0
800d328: d10d bne.n 800d346 <USBD_GetDescriptor+0x266>
{
pbuf = pdev->pClass->GetOtherSpeedConfigDescriptor(&len);
800d32a: 687b ldr r3, [r7, #4]
800d32c: f8d3 32b4 ldr.w r3, [r3, #692] @ 0x2b4
800d330: 6b1b ldr r3, [r3, #48] @ 0x30
800d332: f107 0208 add.w r2, r7, #8
800d336: 4610 mov r0, r2
800d338: 4798 blx r3
800d33a: 60f8 str r0, [r7, #12]
pbuf[1] = USB_DESC_TYPE_OTHER_SPEED_CONFIGURATION;
800d33c: 68fb ldr r3, [r7, #12]
800d33e: 3301 adds r3, #1
800d340: 2207 movs r2, #7
800d342: 701a strb r2, [r3, #0]
else
{
USBD_CtlError(pdev, req);
err++;
}
break;
800d344: e00f b.n 800d366 <USBD_GetDescriptor+0x286>
USBD_CtlError(pdev, req);
800d346: 6839 ldr r1, [r7, #0]
800d348: 6878 ldr r0, [r7, #4]
800d34a: f000 f9d9 bl 800d700 <USBD_CtlError>
err++;
800d34e: 7afb ldrb r3, [r7, #11]
800d350: 3301 adds r3, #1
800d352: 72fb strb r3, [r7, #11]
break;
800d354: e007 b.n 800d366 <USBD_GetDescriptor+0x286>
default:
USBD_CtlError(pdev, req);
800d356: 6839 ldr r1, [r7, #0]
800d358: 6878 ldr r0, [r7, #4]
800d35a: f000 f9d1 bl 800d700 <USBD_CtlError>
err++;
800d35e: 7afb ldrb r3, [r7, #11]
800d360: 3301 adds r3, #1
800d362: 72fb strb r3, [r7, #11]
break;
800d364: bf00 nop
}
if (err != 0U)
800d366: 7afb ldrb r3, [r7, #11]
800d368: 2b00 cmp r3, #0
800d36a: d11c bne.n 800d3a6 <USBD_GetDescriptor+0x2c6>
{
return;
}
else
{
if ((len != 0U) && (req->wLength != 0U))
800d36c: 893b ldrh r3, [r7, #8]
800d36e: 2b00 cmp r3, #0
800d370: d011 beq.n 800d396 <USBD_GetDescriptor+0x2b6>
800d372: 683b ldr r3, [r7, #0]
800d374: 88db ldrh r3, [r3, #6]
800d376: 2b00 cmp r3, #0
800d378: d00d beq.n 800d396 <USBD_GetDescriptor+0x2b6>
{
len = MIN(len, req->wLength);
800d37a: 683b ldr r3, [r7, #0]
800d37c: 88da ldrh r2, [r3, #6]
800d37e: 893b ldrh r3, [r7, #8]
800d380: 4293 cmp r3, r2
800d382: bf28 it cs
800d384: 4613 movcs r3, r2
800d386: b29b uxth r3, r3
800d388: 813b strh r3, [r7, #8]
(void)USBD_CtlSendData(pdev, pbuf, len);
800d38a: 893b ldrh r3, [r7, #8]
800d38c: 461a mov r2, r3
800d38e: 68f9 ldr r1, [r7, #12]
800d390: 6878 ldr r0, [r7, #4]
800d392: f000 fa1f bl 800d7d4 <USBD_CtlSendData>
}
if (req->wLength == 0U)
800d396: 683b ldr r3, [r7, #0]
800d398: 88db ldrh r3, [r3, #6]
800d39a: 2b00 cmp r3, #0
800d39c: d104 bne.n 800d3a8 <USBD_GetDescriptor+0x2c8>
{
(void)USBD_CtlSendStatus(pdev);
800d39e: 6878 ldr r0, [r7, #4]
800d3a0: f000 fa76 bl 800d890 <USBD_CtlSendStatus>
800d3a4: e000 b.n 800d3a8 <USBD_GetDescriptor+0x2c8>
return;
800d3a6: bf00 nop
}
}
}
800d3a8: 3710 adds r7, #16
800d3aa: 46bd mov sp, r7
800d3ac: bd80 pop {r7, pc}
800d3ae: bf00 nop
0800d3b0 <USBD_SetAddress>:
* @param req: usb request
* @retval status
*/
static void USBD_SetAddress(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d3b0: b580 push {r7, lr}
800d3b2: b084 sub sp, #16
800d3b4: af00 add r7, sp, #0
800d3b6: 6078 str r0, [r7, #4]
800d3b8: 6039 str r1, [r7, #0]
uint8_t dev_addr;
if ((req->wIndex == 0U) && (req->wLength == 0U) && (req->wValue < 128U))
800d3ba: 683b ldr r3, [r7, #0]
800d3bc: 889b ldrh r3, [r3, #4]
800d3be: 2b00 cmp r3, #0
800d3c0: d130 bne.n 800d424 <USBD_SetAddress+0x74>
800d3c2: 683b ldr r3, [r7, #0]
800d3c4: 88db ldrh r3, [r3, #6]
800d3c6: 2b00 cmp r3, #0
800d3c8: d12c bne.n 800d424 <USBD_SetAddress+0x74>
800d3ca: 683b ldr r3, [r7, #0]
800d3cc: 885b ldrh r3, [r3, #2]
800d3ce: 2b7f cmp r3, #127 @ 0x7f
800d3d0: d828 bhi.n 800d424 <USBD_SetAddress+0x74>
{
dev_addr = (uint8_t)(req->wValue) & 0x7FU;
800d3d2: 683b ldr r3, [r7, #0]
800d3d4: 885b ldrh r3, [r3, #2]
800d3d6: b2db uxtb r3, r3
800d3d8: f003 037f and.w r3, r3, #127 @ 0x7f
800d3dc: 73fb strb r3, [r7, #15]
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d3de: 687b ldr r3, [r7, #4]
800d3e0: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d3e4: 2b03 cmp r3, #3
800d3e6: d104 bne.n 800d3f2 <USBD_SetAddress+0x42>
{
USBD_CtlError(pdev, req);
800d3e8: 6839 ldr r1, [r7, #0]
800d3ea: 6878 ldr r0, [r7, #4]
800d3ec: f000 f988 bl 800d700 <USBD_CtlError>
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d3f0: e01d b.n 800d42e <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_address = dev_addr;
800d3f2: 687b ldr r3, [r7, #4]
800d3f4: 7bfa ldrb r2, [r7, #15]
800d3f6: f883 229e strb.w r2, [r3, #670] @ 0x29e
USBD_LL_SetUSBAddress(pdev, dev_addr);
800d3fa: 7bfb ldrb r3, [r7, #15]
800d3fc: 4619 mov r1, r3
800d3fe: 6878 ldr r0, [r7, #4]
800d400: f000 fec1 bl 800e186 <USBD_LL_SetUSBAddress>
USBD_CtlSendStatus(pdev);
800d404: 6878 ldr r0, [r7, #4]
800d406: f000 fa43 bl 800d890 <USBD_CtlSendStatus>
if (dev_addr != 0U)
800d40a: 7bfb ldrb r3, [r7, #15]
800d40c: 2b00 cmp r3, #0
800d40e: d004 beq.n 800d41a <USBD_SetAddress+0x6a>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800d410: 687b ldr r3, [r7, #4]
800d412: 2202 movs r2, #2
800d414: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d418: e009 b.n 800d42e <USBD_SetAddress+0x7e>
}
else
{
pdev->dev_state = USBD_STATE_DEFAULT;
800d41a: 687b ldr r3, [r7, #4]
800d41c: 2201 movs r2, #1
800d41e: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (pdev->dev_state == USBD_STATE_CONFIGURED)
800d422: e004 b.n 800d42e <USBD_SetAddress+0x7e>
}
}
}
else
{
USBD_CtlError(pdev, req);
800d424: 6839 ldr r1, [r7, #0]
800d426: 6878 ldr r0, [r7, #4]
800d428: f000 f96a bl 800d700 <USBD_CtlError>
}
}
800d42c: bf00 nop
800d42e: bf00 nop
800d430: 3710 adds r7, #16
800d432: 46bd mov sp, r7
800d434: bd80 pop {r7, pc}
...
0800d438 <USBD_SetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_SetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d438: b580 push {r7, lr}
800d43a: b082 sub sp, #8
800d43c: af00 add r7, sp, #0
800d43e: 6078 str r0, [r7, #4]
800d440: 6039 str r1, [r7, #0]
static uint8_t cfgidx;
cfgidx = (uint8_t)(req->wValue);
800d442: 683b ldr r3, [r7, #0]
800d444: 885b ldrh r3, [r3, #2]
800d446: b2da uxtb r2, r3
800d448: 4b41 ldr r3, [pc, #260] @ (800d550 <USBD_SetConfig+0x118>)
800d44a: 701a strb r2, [r3, #0]
if (cfgidx > USBD_MAX_NUM_CONFIGURATION)
800d44c: 4b40 ldr r3, [pc, #256] @ (800d550 <USBD_SetConfig+0x118>)
800d44e: 781b ldrb r3, [r3, #0]
800d450: 2b01 cmp r3, #1
800d452: d904 bls.n 800d45e <USBD_SetConfig+0x26>
{
USBD_CtlError(pdev, req);
800d454: 6839 ldr r1, [r7, #0]
800d456: 6878 ldr r0, [r7, #4]
800d458: f000 f952 bl 800d700 <USBD_CtlError>
800d45c: e075 b.n 800d54a <USBD_SetConfig+0x112>
}
else
{
switch (pdev->dev_state)
800d45e: 687b ldr r3, [r7, #4]
800d460: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d464: 2b02 cmp r3, #2
800d466: d002 beq.n 800d46e <USBD_SetConfig+0x36>
800d468: 2b03 cmp r3, #3
800d46a: d023 beq.n 800d4b4 <USBD_SetConfig+0x7c>
800d46c: e062 b.n 800d534 <USBD_SetConfig+0xfc>
{
case USBD_STATE_ADDRESSED:
if (cfgidx)
800d46e: 4b38 ldr r3, [pc, #224] @ (800d550 <USBD_SetConfig+0x118>)
800d470: 781b ldrb r3, [r3, #0]
800d472: 2b00 cmp r3, #0
800d474: d01a beq.n 800d4ac <USBD_SetConfig+0x74>
{
pdev->dev_config = cfgidx;
800d476: 4b36 ldr r3, [pc, #216] @ (800d550 <USBD_SetConfig+0x118>)
800d478: 781b ldrb r3, [r3, #0]
800d47a: 461a mov r2, r3
800d47c: 687b ldr r3, [r7, #4]
800d47e: 605a str r2, [r3, #4]
pdev->dev_state = USBD_STATE_CONFIGURED;
800d480: 687b ldr r3, [r7, #4]
800d482: 2203 movs r2, #3
800d484: f883 229c strb.w r2, [r3, #668] @ 0x29c
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800d488: 4b31 ldr r3, [pc, #196] @ (800d550 <USBD_SetConfig+0x118>)
800d48a: 781b ldrb r3, [r3, #0]
800d48c: 4619 mov r1, r3
800d48e: 6878 ldr r0, [r7, #4]
800d490: f7ff f9e7 bl 800c862 <USBD_SetClassConfig>
800d494: 4603 mov r3, r0
800d496: 2b02 cmp r3, #2
800d498: d104 bne.n 800d4a4 <USBD_SetConfig+0x6c>
{
USBD_CtlError(pdev, req);
800d49a: 6839 ldr r1, [r7, #0]
800d49c: 6878 ldr r0, [r7, #4]
800d49e: f000 f92f bl 800d700 <USBD_CtlError>
return;
800d4a2: e052 b.n 800d54a <USBD_SetConfig+0x112>
}
USBD_CtlSendStatus(pdev);
800d4a4: 6878 ldr r0, [r7, #4]
800d4a6: f000 f9f3 bl 800d890 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800d4aa: e04e b.n 800d54a <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d4ac: 6878 ldr r0, [r7, #4]
800d4ae: f000 f9ef bl 800d890 <USBD_CtlSendStatus>
break;
800d4b2: e04a b.n 800d54a <USBD_SetConfig+0x112>
case USBD_STATE_CONFIGURED:
if (cfgidx == 0U)
800d4b4: 4b26 ldr r3, [pc, #152] @ (800d550 <USBD_SetConfig+0x118>)
800d4b6: 781b ldrb r3, [r3, #0]
800d4b8: 2b00 cmp r3, #0
800d4ba: d112 bne.n 800d4e2 <USBD_SetConfig+0xaa>
{
pdev->dev_state = USBD_STATE_ADDRESSED;
800d4bc: 687b ldr r3, [r7, #4]
800d4be: 2202 movs r2, #2
800d4c0: f883 229c strb.w r2, [r3, #668] @ 0x29c
pdev->dev_config = cfgidx;
800d4c4: 4b22 ldr r3, [pc, #136] @ (800d550 <USBD_SetConfig+0x118>)
800d4c6: 781b ldrb r3, [r3, #0]
800d4c8: 461a mov r2, r3
800d4ca: 687b ldr r3, [r7, #4]
800d4cc: 605a str r2, [r3, #4]
USBD_ClrClassConfig(pdev, cfgidx);
800d4ce: 4b20 ldr r3, [pc, #128] @ (800d550 <USBD_SetConfig+0x118>)
800d4d0: 781b ldrb r3, [r3, #0]
800d4d2: 4619 mov r1, r3
800d4d4: 6878 ldr r0, [r7, #4]
800d4d6: f7ff f9e3 bl 800c8a0 <USBD_ClrClassConfig>
USBD_CtlSendStatus(pdev);
800d4da: 6878 ldr r0, [r7, #4]
800d4dc: f000 f9d8 bl 800d890 <USBD_CtlSendStatus>
}
else
{
USBD_CtlSendStatus(pdev);
}
break;
800d4e0: e033 b.n 800d54a <USBD_SetConfig+0x112>
else if (cfgidx != pdev->dev_config)
800d4e2: 4b1b ldr r3, [pc, #108] @ (800d550 <USBD_SetConfig+0x118>)
800d4e4: 781b ldrb r3, [r3, #0]
800d4e6: 461a mov r2, r3
800d4e8: 687b ldr r3, [r7, #4]
800d4ea: 685b ldr r3, [r3, #4]
800d4ec: 429a cmp r2, r3
800d4ee: d01d beq.n 800d52c <USBD_SetConfig+0xf4>
USBD_ClrClassConfig(pdev, (uint8_t)pdev->dev_config);
800d4f0: 687b ldr r3, [r7, #4]
800d4f2: 685b ldr r3, [r3, #4]
800d4f4: b2db uxtb r3, r3
800d4f6: 4619 mov r1, r3
800d4f8: 6878 ldr r0, [r7, #4]
800d4fa: f7ff f9d1 bl 800c8a0 <USBD_ClrClassConfig>
pdev->dev_config = cfgidx;
800d4fe: 4b14 ldr r3, [pc, #80] @ (800d550 <USBD_SetConfig+0x118>)
800d500: 781b ldrb r3, [r3, #0]
800d502: 461a mov r2, r3
800d504: 687b ldr r3, [r7, #4]
800d506: 605a str r2, [r3, #4]
if (USBD_SetClassConfig(pdev, cfgidx) == USBD_FAIL)
800d508: 4b11 ldr r3, [pc, #68] @ (800d550 <USBD_SetConfig+0x118>)
800d50a: 781b ldrb r3, [r3, #0]
800d50c: 4619 mov r1, r3
800d50e: 6878 ldr r0, [r7, #4]
800d510: f7ff f9a7 bl 800c862 <USBD_SetClassConfig>
800d514: 4603 mov r3, r0
800d516: 2b02 cmp r3, #2
800d518: d104 bne.n 800d524 <USBD_SetConfig+0xec>
USBD_CtlError(pdev, req);
800d51a: 6839 ldr r1, [r7, #0]
800d51c: 6878 ldr r0, [r7, #4]
800d51e: f000 f8ef bl 800d700 <USBD_CtlError>
return;
800d522: e012 b.n 800d54a <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d524: 6878 ldr r0, [r7, #4]
800d526: f000 f9b3 bl 800d890 <USBD_CtlSendStatus>
break;
800d52a: e00e b.n 800d54a <USBD_SetConfig+0x112>
USBD_CtlSendStatus(pdev);
800d52c: 6878 ldr r0, [r7, #4]
800d52e: f000 f9af bl 800d890 <USBD_CtlSendStatus>
break;
800d532: e00a b.n 800d54a <USBD_SetConfig+0x112>
default:
USBD_CtlError(pdev, req);
800d534: 6839 ldr r1, [r7, #0]
800d536: 6878 ldr r0, [r7, #4]
800d538: f000 f8e2 bl 800d700 <USBD_CtlError>
USBD_ClrClassConfig(pdev, cfgidx);
800d53c: 4b04 ldr r3, [pc, #16] @ (800d550 <USBD_SetConfig+0x118>)
800d53e: 781b ldrb r3, [r3, #0]
800d540: 4619 mov r1, r3
800d542: 6878 ldr r0, [r7, #4]
800d544: f7ff f9ac bl 800c8a0 <USBD_ClrClassConfig>
break;
800d548: bf00 nop
}
}
}
800d54a: 3708 adds r7, #8
800d54c: 46bd mov sp, r7
800d54e: bd80 pop {r7, pc}
800d550: 20000498 .word 0x20000498
0800d554 <USBD_GetConfig>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetConfig(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d554: b580 push {r7, lr}
800d556: b082 sub sp, #8
800d558: af00 add r7, sp, #0
800d55a: 6078 str r0, [r7, #4]
800d55c: 6039 str r1, [r7, #0]
if (req->wLength != 1U)
800d55e: 683b ldr r3, [r7, #0]
800d560: 88db ldrh r3, [r3, #6]
800d562: 2b01 cmp r3, #1
800d564: d004 beq.n 800d570 <USBD_GetConfig+0x1c>
{
USBD_CtlError(pdev, req);
800d566: 6839 ldr r1, [r7, #0]
800d568: 6878 ldr r0, [r7, #4]
800d56a: f000 f8c9 bl 800d700 <USBD_CtlError>
default:
USBD_CtlError(pdev, req);
break;
}
}
}
800d56e: e022 b.n 800d5b6 <USBD_GetConfig+0x62>
switch (pdev->dev_state)
800d570: 687b ldr r3, [r7, #4]
800d572: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d576: 2b02 cmp r3, #2
800d578: dc02 bgt.n 800d580 <USBD_GetConfig+0x2c>
800d57a: 2b00 cmp r3, #0
800d57c: dc03 bgt.n 800d586 <USBD_GetConfig+0x32>
800d57e: e015 b.n 800d5ac <USBD_GetConfig+0x58>
800d580: 2b03 cmp r3, #3
800d582: d00b beq.n 800d59c <USBD_GetConfig+0x48>
800d584: e012 b.n 800d5ac <USBD_GetConfig+0x58>
pdev->dev_default_config = 0U;
800d586: 687b ldr r3, [r7, #4]
800d588: 2200 movs r2, #0
800d58a: 609a str r2, [r3, #8]
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_default_config, 1U);
800d58c: 687b ldr r3, [r7, #4]
800d58e: 3308 adds r3, #8
800d590: 2201 movs r2, #1
800d592: 4619 mov r1, r3
800d594: 6878 ldr r0, [r7, #4]
800d596: f000 f91d bl 800d7d4 <USBD_CtlSendData>
break;
800d59a: e00c b.n 800d5b6 <USBD_GetConfig+0x62>
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config, 1U);
800d59c: 687b ldr r3, [r7, #4]
800d59e: 3304 adds r3, #4
800d5a0: 2201 movs r2, #1
800d5a2: 4619 mov r1, r3
800d5a4: 6878 ldr r0, [r7, #4]
800d5a6: f000 f915 bl 800d7d4 <USBD_CtlSendData>
break;
800d5aa: e004 b.n 800d5b6 <USBD_GetConfig+0x62>
USBD_CtlError(pdev, req);
800d5ac: 6839 ldr r1, [r7, #0]
800d5ae: 6878 ldr r0, [r7, #4]
800d5b0: f000 f8a6 bl 800d700 <USBD_CtlError>
break;
800d5b4: bf00 nop
}
800d5b6: bf00 nop
800d5b8: 3708 adds r7, #8
800d5ba: 46bd mov sp, r7
800d5bc: bd80 pop {r7, pc}
0800d5be <USBD_GetStatus>:
* @param pdev: device instance
* @param req: usb request
* @retval status
*/
static void USBD_GetStatus(USBD_HandleTypeDef *pdev, USBD_SetupReqTypedef *req)
{
800d5be: b580 push {r7, lr}
800d5c0: b082 sub sp, #8
800d5c2: af00 add r7, sp, #0
800d5c4: 6078 str r0, [r7, #4]
800d5c6: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d5c8: 687b ldr r3, [r7, #4]
800d5ca: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d5ce: 3b01 subs r3, #1
800d5d0: 2b02 cmp r3, #2
800d5d2: d81e bhi.n 800d612 <USBD_GetStatus+0x54>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wLength != 0x2U)
800d5d4: 683b ldr r3, [r7, #0]
800d5d6: 88db ldrh r3, [r3, #6]
800d5d8: 2b02 cmp r3, #2
800d5da: d004 beq.n 800d5e6 <USBD_GetStatus+0x28>
{
USBD_CtlError(pdev, req);
800d5dc: 6839 ldr r1, [r7, #0]
800d5de: 6878 ldr r0, [r7, #4]
800d5e0: f000 f88e bl 800d700 <USBD_CtlError>
break;
800d5e4: e01a b.n 800d61c <USBD_GetStatus+0x5e>
}
#if (USBD_SELF_POWERED == 1U)
pdev->dev_config_status = USB_CONFIG_SELF_POWERED;
800d5e6: 687b ldr r3, [r7, #4]
800d5e8: 2201 movs r2, #1
800d5ea: 60da str r2, [r3, #12]
#else
pdev->dev_config_status = 0U;
#endif
if (pdev->dev_remote_wakeup)
800d5ec: 687b ldr r3, [r7, #4]
800d5ee: f8d3 32a4 ldr.w r3, [r3, #676] @ 0x2a4
800d5f2: 2b00 cmp r3, #0
800d5f4: d005 beq.n 800d602 <USBD_GetStatus+0x44>
{
pdev->dev_config_status |= USB_CONFIG_REMOTE_WAKEUP;
800d5f6: 687b ldr r3, [r7, #4]
800d5f8: 68db ldr r3, [r3, #12]
800d5fa: f043 0202 orr.w r2, r3, #2
800d5fe: 687b ldr r3, [r7, #4]
800d600: 60da str r2, [r3, #12]
}
USBD_CtlSendData(pdev, (uint8_t *)(void *)&pdev->dev_config_status, 2U);
800d602: 687b ldr r3, [r7, #4]
800d604: 330c adds r3, #12
800d606: 2202 movs r2, #2
800d608: 4619 mov r1, r3
800d60a: 6878 ldr r0, [r7, #4]
800d60c: f000 f8e2 bl 800d7d4 <USBD_CtlSendData>
break;
800d610: e004 b.n 800d61c <USBD_GetStatus+0x5e>
default:
USBD_CtlError(pdev, req);
800d612: 6839 ldr r1, [r7, #0]
800d614: 6878 ldr r0, [r7, #4]
800d616: f000 f873 bl 800d700 <USBD_CtlError>
break;
800d61a: bf00 nop
}
}
800d61c: bf00 nop
800d61e: 3708 adds r7, #8
800d620: 46bd mov sp, r7
800d622: bd80 pop {r7, pc}
0800d624 <USBD_SetFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_SetFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d624: b580 push {r7, lr}
800d626: b082 sub sp, #8
800d628: af00 add r7, sp, #0
800d62a: 6078 str r0, [r7, #4]
800d62c: 6039 str r1, [r7, #0]
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d62e: 683b ldr r3, [r7, #0]
800d630: 885b ldrh r3, [r3, #2]
800d632: 2b01 cmp r3, #1
800d634: d106 bne.n 800d644 <USBD_SetFeature+0x20>
{
pdev->dev_remote_wakeup = 1U;
800d636: 687b ldr r3, [r7, #4]
800d638: 2201 movs r2, #1
800d63a: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d63e: 6878 ldr r0, [r7, #4]
800d640: f000 f926 bl 800d890 <USBD_CtlSendStatus>
}
}
800d644: bf00 nop
800d646: 3708 adds r7, #8
800d648: 46bd mov sp, r7
800d64a: bd80 pop {r7, pc}
0800d64c <USBD_ClrFeature>:
* @param req: usb request
* @retval status
*/
static void USBD_ClrFeature(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d64c: b580 push {r7, lr}
800d64e: b082 sub sp, #8
800d650: af00 add r7, sp, #0
800d652: 6078 str r0, [r7, #4]
800d654: 6039 str r1, [r7, #0]
switch (pdev->dev_state)
800d656: 687b ldr r3, [r7, #4]
800d658: f893 329c ldrb.w r3, [r3, #668] @ 0x29c
800d65c: 3b01 subs r3, #1
800d65e: 2b02 cmp r3, #2
800d660: d80b bhi.n 800d67a <USBD_ClrFeature+0x2e>
{
case USBD_STATE_DEFAULT:
case USBD_STATE_ADDRESSED:
case USBD_STATE_CONFIGURED:
if (req->wValue == USB_FEATURE_REMOTE_WAKEUP)
800d662: 683b ldr r3, [r7, #0]
800d664: 885b ldrh r3, [r3, #2]
800d666: 2b01 cmp r3, #1
800d668: d10c bne.n 800d684 <USBD_ClrFeature+0x38>
{
pdev->dev_remote_wakeup = 0U;
800d66a: 687b ldr r3, [r7, #4]
800d66c: 2200 movs r2, #0
800d66e: f8c3 22a4 str.w r2, [r3, #676] @ 0x2a4
USBD_CtlSendStatus(pdev);
800d672: 6878 ldr r0, [r7, #4]
800d674: f000 f90c bl 800d890 <USBD_CtlSendStatus>
}
break;
800d678: e004 b.n 800d684 <USBD_ClrFeature+0x38>
default:
USBD_CtlError(pdev, req);
800d67a: 6839 ldr r1, [r7, #0]
800d67c: 6878 ldr r0, [r7, #4]
800d67e: f000 f83f bl 800d700 <USBD_CtlError>
break;
800d682: e000 b.n 800d686 <USBD_ClrFeature+0x3a>
break;
800d684: bf00 nop
}
}
800d686: bf00 nop
800d688: 3708 adds r7, #8
800d68a: 46bd mov sp, r7
800d68c: bd80 pop {r7, pc}
0800d68e <USBD_ParseSetupRequest>:
* @param req: usb request
* @retval None
*/
void USBD_ParseSetupRequest(USBD_SetupReqTypedef *req, uint8_t *pdata)
{
800d68e: b480 push {r7}
800d690: b083 sub sp, #12
800d692: af00 add r7, sp, #0
800d694: 6078 str r0, [r7, #4]
800d696: 6039 str r1, [r7, #0]
req->bmRequest = *(uint8_t *)(pdata);
800d698: 683b ldr r3, [r7, #0]
800d69a: 781a ldrb r2, [r3, #0]
800d69c: 687b ldr r3, [r7, #4]
800d69e: 701a strb r2, [r3, #0]
req->bRequest = *(uint8_t *)(pdata + 1U);
800d6a0: 683b ldr r3, [r7, #0]
800d6a2: 785a ldrb r2, [r3, #1]
800d6a4: 687b ldr r3, [r7, #4]
800d6a6: 705a strb r2, [r3, #1]
req->wValue = SWAPBYTE(pdata + 2U);
800d6a8: 683b ldr r3, [r7, #0]
800d6aa: 3302 adds r3, #2
800d6ac: 781b ldrb r3, [r3, #0]
800d6ae: 461a mov r2, r3
800d6b0: 683b ldr r3, [r7, #0]
800d6b2: 3303 adds r3, #3
800d6b4: 781b ldrb r3, [r3, #0]
800d6b6: 021b lsls r3, r3, #8
800d6b8: b29b uxth r3, r3
800d6ba: 4413 add r3, r2
800d6bc: b29a uxth r2, r3
800d6be: 687b ldr r3, [r7, #4]
800d6c0: 805a strh r2, [r3, #2]
req->wIndex = SWAPBYTE(pdata + 4U);
800d6c2: 683b ldr r3, [r7, #0]
800d6c4: 3304 adds r3, #4
800d6c6: 781b ldrb r3, [r3, #0]
800d6c8: 461a mov r2, r3
800d6ca: 683b ldr r3, [r7, #0]
800d6cc: 3305 adds r3, #5
800d6ce: 781b ldrb r3, [r3, #0]
800d6d0: 021b lsls r3, r3, #8
800d6d2: b29b uxth r3, r3
800d6d4: 4413 add r3, r2
800d6d6: b29a uxth r2, r3
800d6d8: 687b ldr r3, [r7, #4]
800d6da: 809a strh r2, [r3, #4]
req->wLength = SWAPBYTE(pdata + 6U);
800d6dc: 683b ldr r3, [r7, #0]
800d6de: 3306 adds r3, #6
800d6e0: 781b ldrb r3, [r3, #0]
800d6e2: 461a mov r2, r3
800d6e4: 683b ldr r3, [r7, #0]
800d6e6: 3307 adds r3, #7
800d6e8: 781b ldrb r3, [r3, #0]
800d6ea: 021b lsls r3, r3, #8
800d6ec: b29b uxth r3, r3
800d6ee: 4413 add r3, r2
800d6f0: b29a uxth r2, r3
800d6f2: 687b ldr r3, [r7, #4]
800d6f4: 80da strh r2, [r3, #6]
}
800d6f6: bf00 nop
800d6f8: 370c adds r7, #12
800d6fa: 46bd mov sp, r7
800d6fc: bc80 pop {r7}
800d6fe: 4770 bx lr
0800d700 <USBD_CtlError>:
* @retval None
*/
void USBD_CtlError(USBD_HandleTypeDef *pdev,
USBD_SetupReqTypedef *req)
{
800d700: b580 push {r7, lr}
800d702: b082 sub sp, #8
800d704: af00 add r7, sp, #0
800d706: 6078 str r0, [r7, #4]
800d708: 6039 str r1, [r7, #0]
USBD_LL_StallEP(pdev, 0x80U);
800d70a: 2180 movs r1, #128 @ 0x80
800d70c: 6878 ldr r0, [r7, #4]
800d70e: f000 fcd1 bl 800e0b4 <USBD_LL_StallEP>
USBD_LL_StallEP(pdev, 0U);
800d712: 2100 movs r1, #0
800d714: 6878 ldr r0, [r7, #4]
800d716: f000 fccd bl 800e0b4 <USBD_LL_StallEP>
}
800d71a: bf00 nop
800d71c: 3708 adds r7, #8
800d71e: 46bd mov sp, r7
800d720: bd80 pop {r7, pc}
0800d722 <USBD_GetString>:
* @param unicode : Formatted string buffer (unicode)
* @param len : descriptor length
* @retval None
*/
void USBD_GetString(uint8_t *desc, uint8_t *unicode, uint16_t *len)
{
800d722: b580 push {r7, lr}
800d724: b086 sub sp, #24
800d726: af00 add r7, sp, #0
800d728: 60f8 str r0, [r7, #12]
800d72a: 60b9 str r1, [r7, #8]
800d72c: 607a str r2, [r7, #4]
uint8_t idx = 0U;
800d72e: 2300 movs r3, #0
800d730: 75fb strb r3, [r7, #23]
if (desc != NULL)
800d732: 68fb ldr r3, [r7, #12]
800d734: 2b00 cmp r3, #0
800d736: d032 beq.n 800d79e <USBD_GetString+0x7c>
{
*len = (uint16_t)USBD_GetLen(desc) * 2U + 2U;
800d738: 68f8 ldr r0, [r7, #12]
800d73a: f000 f834 bl 800d7a6 <USBD_GetLen>
800d73e: 4603 mov r3, r0
800d740: 3301 adds r3, #1
800d742: b29b uxth r3, r3
800d744: 005b lsls r3, r3, #1
800d746: b29a uxth r2, r3
800d748: 687b ldr r3, [r7, #4]
800d74a: 801a strh r2, [r3, #0]
unicode[idx++] = *(uint8_t *)(void *)len;
800d74c: 7dfb ldrb r3, [r7, #23]
800d74e: 1c5a adds r2, r3, #1
800d750: 75fa strb r2, [r7, #23]
800d752: 461a mov r2, r3
800d754: 68bb ldr r3, [r7, #8]
800d756: 4413 add r3, r2
800d758: 687a ldr r2, [r7, #4]
800d75a: 7812 ldrb r2, [r2, #0]
800d75c: 701a strb r2, [r3, #0]
unicode[idx++] = USB_DESC_TYPE_STRING;
800d75e: 7dfb ldrb r3, [r7, #23]
800d760: 1c5a adds r2, r3, #1
800d762: 75fa strb r2, [r7, #23]
800d764: 461a mov r2, r3
800d766: 68bb ldr r3, [r7, #8]
800d768: 4413 add r3, r2
800d76a: 2203 movs r2, #3
800d76c: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d76e: e012 b.n 800d796 <USBD_GetString+0x74>
{
unicode[idx++] = *desc++;
800d770: 68fb ldr r3, [r7, #12]
800d772: 1c5a adds r2, r3, #1
800d774: 60fa str r2, [r7, #12]
800d776: 7dfa ldrb r2, [r7, #23]
800d778: 1c51 adds r1, r2, #1
800d77a: 75f9 strb r1, [r7, #23]
800d77c: 4611 mov r1, r2
800d77e: 68ba ldr r2, [r7, #8]
800d780: 440a add r2, r1
800d782: 781b ldrb r3, [r3, #0]
800d784: 7013 strb r3, [r2, #0]
unicode[idx++] = 0U;
800d786: 7dfb ldrb r3, [r7, #23]
800d788: 1c5a adds r2, r3, #1
800d78a: 75fa strb r2, [r7, #23]
800d78c: 461a mov r2, r3
800d78e: 68bb ldr r3, [r7, #8]
800d790: 4413 add r3, r2
800d792: 2200 movs r2, #0
800d794: 701a strb r2, [r3, #0]
while (*desc != '\0')
800d796: 68fb ldr r3, [r7, #12]
800d798: 781b ldrb r3, [r3, #0]
800d79a: 2b00 cmp r3, #0
800d79c: d1e8 bne.n 800d770 <USBD_GetString+0x4e>
}
}
}
800d79e: bf00 nop
800d7a0: 3718 adds r7, #24
800d7a2: 46bd mov sp, r7
800d7a4: bd80 pop {r7, pc}
0800d7a6 <USBD_GetLen>:
* return the string length
* @param buf : pointer to the ascii string buffer
* @retval string length
*/
static uint8_t USBD_GetLen(uint8_t *buf)
{
800d7a6: b480 push {r7}
800d7a8: b085 sub sp, #20
800d7aa: af00 add r7, sp, #0
800d7ac: 6078 str r0, [r7, #4]
uint8_t len = 0U;
800d7ae: 2300 movs r3, #0
800d7b0: 73fb strb r3, [r7, #15]
while (*buf != '\0')
800d7b2: e005 b.n 800d7c0 <USBD_GetLen+0x1a>
{
len++;
800d7b4: 7bfb ldrb r3, [r7, #15]
800d7b6: 3301 adds r3, #1
800d7b8: 73fb strb r3, [r7, #15]
buf++;
800d7ba: 687b ldr r3, [r7, #4]
800d7bc: 3301 adds r3, #1
800d7be: 607b str r3, [r7, #4]
while (*buf != '\0')
800d7c0: 687b ldr r3, [r7, #4]
800d7c2: 781b ldrb r3, [r3, #0]
800d7c4: 2b00 cmp r3, #0
800d7c6: d1f5 bne.n 800d7b4 <USBD_GetLen+0xe>
}
return len;
800d7c8: 7bfb ldrb r3, [r7, #15]
}
800d7ca: 4618 mov r0, r3
800d7cc: 3714 adds r7, #20
800d7ce: 46bd mov sp, r7
800d7d0: bc80 pop {r7}
800d7d2: 4770 bx lr
0800d7d4 <USBD_CtlSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d7d4: b580 push {r7, lr}
800d7d6: b084 sub sp, #16
800d7d8: af00 add r7, sp, #0
800d7da: 60f8 str r0, [r7, #12]
800d7dc: 60b9 str r1, [r7, #8]
800d7de: 4613 mov r3, r2
800d7e0: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_IN;
800d7e2: 68fb ldr r3, [r7, #12]
800d7e4: 2202 movs r2, #2
800d7e6: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_in[0].total_length = len;
800d7ea: 88fa ldrh r2, [r7, #6]
800d7ec: 68fb ldr r3, [r7, #12]
800d7ee: 61da str r2, [r3, #28]
pdev->ep_in[0].rem_length = len;
800d7f0: 88fa ldrh r2, [r7, #6]
800d7f2: 68fb ldr r3, [r7, #12]
800d7f4: 621a str r2, [r3, #32]
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d7f6: 88fb ldrh r3, [r7, #6]
800d7f8: 68ba ldr r2, [r7, #8]
800d7fa: 2100 movs r1, #0
800d7fc: 68f8 ldr r0, [r7, #12]
800d7fe: f000 fce1 bl 800e1c4 <USBD_LL_Transmit>
return USBD_OK;
800d802: 2300 movs r3, #0
}
800d804: 4618 mov r0, r3
800d806: 3710 adds r7, #16
800d808: 46bd mov sp, r7
800d80a: bd80 pop {r7, pc}
0800d80c <USBD_CtlContinueSendData>:
* @param len: length of data to be sent
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueSendData(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d80c: b580 push {r7, lr}
800d80e: b084 sub sp, #16
800d810: af00 add r7, sp, #0
800d812: 60f8 str r0, [r7, #12]
800d814: 60b9 str r1, [r7, #8]
800d816: 4613 mov r3, r2
800d818: 80fb strh r3, [r7, #6]
/* Start the next transfer */
USBD_LL_Transmit(pdev, 0x00U, pbuf, len);
800d81a: 88fb ldrh r3, [r7, #6]
800d81c: 68ba ldr r2, [r7, #8]
800d81e: 2100 movs r1, #0
800d820: 68f8 ldr r0, [r7, #12]
800d822: f000 fccf bl 800e1c4 <USBD_LL_Transmit>
return USBD_OK;
800d826: 2300 movs r3, #0
}
800d828: 4618 mov r0, r3
800d82a: 3710 adds r7, #16
800d82c: 46bd mov sp, r7
800d82e: bd80 pop {r7, pc}
0800d830 <USBD_CtlPrepareRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlPrepareRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d830: b580 push {r7, lr}
800d832: b084 sub sp, #16
800d834: af00 add r7, sp, #0
800d836: 60f8 str r0, [r7, #12]
800d838: 60b9 str r1, [r7, #8]
800d83a: 4613 mov r3, r2
800d83c: 80fb strh r3, [r7, #6]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_DATA_OUT;
800d83e: 68fb ldr r3, [r7, #12]
800d840: 2203 movs r2, #3
800d842: f8c3 2294 str.w r2, [r3, #660] @ 0x294
pdev->ep_out[0].total_length = len;
800d846: 88fa ldrh r2, [r7, #6]
800d848: 68fb ldr r3, [r7, #12]
800d84a: f8c3 215c str.w r2, [r3, #348] @ 0x15c
pdev->ep_out[0].rem_length = len;
800d84e: 88fa ldrh r2, [r7, #6]
800d850: 68fb ldr r3, [r7, #12]
800d852: f8c3 2160 str.w r2, [r3, #352] @ 0x160
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d856: 88fb ldrh r3, [r7, #6]
800d858: 68ba ldr r2, [r7, #8]
800d85a: 2100 movs r1, #0
800d85c: 68f8 ldr r0, [r7, #12]
800d85e: f000 fcd4 bl 800e20a <USBD_LL_PrepareReceive>
return USBD_OK;
800d862: 2300 movs r3, #0
}
800d864: 4618 mov r0, r3
800d866: 3710 adds r7, #16
800d868: 46bd mov sp, r7
800d86a: bd80 pop {r7, pc}
0800d86c <USBD_CtlContinueRx>:
* @param len: length of data to be received
* @retval status
*/
USBD_StatusTypeDef USBD_CtlContinueRx(USBD_HandleTypeDef *pdev,
uint8_t *pbuf, uint16_t len)
{
800d86c: b580 push {r7, lr}
800d86e: b084 sub sp, #16
800d870: af00 add r7, sp, #0
800d872: 60f8 str r0, [r7, #12]
800d874: 60b9 str r1, [r7, #8]
800d876: 4613 mov r3, r2
800d878: 80fb strh r3, [r7, #6]
USBD_LL_PrepareReceive(pdev, 0U, pbuf, len);
800d87a: 88fb ldrh r3, [r7, #6]
800d87c: 68ba ldr r2, [r7, #8]
800d87e: 2100 movs r1, #0
800d880: 68f8 ldr r0, [r7, #12]
800d882: f000 fcc2 bl 800e20a <USBD_LL_PrepareReceive>
return USBD_OK;
800d886: 2300 movs r3, #0
}
800d888: 4618 mov r0, r3
800d88a: 3710 adds r7, #16
800d88c: 46bd mov sp, r7
800d88e: bd80 pop {r7, pc}
0800d890 <USBD_CtlSendStatus>:
* send zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlSendStatus(USBD_HandleTypeDef *pdev)
{
800d890: b580 push {r7, lr}
800d892: b082 sub sp, #8
800d894: af00 add r7, sp, #0
800d896: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_IN;
800d898: 687b ldr r3, [r7, #4]
800d89a: 2204 movs r2, #4
800d89c: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_Transmit(pdev, 0x00U, NULL, 0U);
800d8a0: 2300 movs r3, #0
800d8a2: 2200 movs r2, #0
800d8a4: 2100 movs r1, #0
800d8a6: 6878 ldr r0, [r7, #4]
800d8a8: f000 fc8c bl 800e1c4 <USBD_LL_Transmit>
return USBD_OK;
800d8ac: 2300 movs r3, #0
}
800d8ae: 4618 mov r0, r3
800d8b0: 3708 adds r7, #8
800d8b2: 46bd mov sp, r7
800d8b4: bd80 pop {r7, pc}
0800d8b6 <USBD_CtlReceiveStatus>:
* receive zero lzngth packet on the ctl pipe
* @param pdev: device instance
* @retval status
*/
USBD_StatusTypeDef USBD_CtlReceiveStatus(USBD_HandleTypeDef *pdev)
{
800d8b6: b580 push {r7, lr}
800d8b8: b082 sub sp, #8
800d8ba: af00 add r7, sp, #0
800d8bc: 6078 str r0, [r7, #4]
/* Set EP0 State */
pdev->ep0_state = USBD_EP0_STATUS_OUT;
800d8be: 687b ldr r3, [r7, #4]
800d8c0: 2205 movs r2, #5
800d8c2: f8c3 2294 str.w r2, [r3, #660] @ 0x294
/* Start the transfer */
USBD_LL_PrepareReceive(pdev, 0U, NULL, 0U);
800d8c6: 2300 movs r3, #0
800d8c8: 2200 movs r2, #0
800d8ca: 2100 movs r1, #0
800d8cc: 6878 ldr r0, [r7, #4]
800d8ce: f000 fc9c bl 800e20a <USBD_LL_PrepareReceive>
return USBD_OK;
800d8d2: 2300 movs r3, #0
}
800d8d4: 4618 mov r0, r3
800d8d6: 3708 adds r7, #8
800d8d8: 46bd mov sp, r7
800d8da: bd80 pop {r7, pc}
0800d8dc <MX_USB_DEVICE_Init>:
/**
* Init USB device Library, add supported class and start the library
* @retval None
*/
void MX_USB_DEVICE_Init(void)
{
800d8dc: b580 push {r7, lr}
800d8de: af00 add r7, sp, #0
/* USER CODE BEGIN USB_DEVICE_Init_PreTreatment */
/* USER CODE END USB_DEVICE_Init_PreTreatment */
/* Init Device Library, add supported class and start the library. */
if (USBD_Init(&hUsbDeviceFS, &FS_Desc, DEVICE_FS) != USBD_OK)
800d8e0: 2200 movs r2, #0
800d8e2: 4912 ldr r1, [pc, #72] @ (800d92c <MX_USB_DEVICE_Init+0x50>)
800d8e4: 4812 ldr r0, [pc, #72] @ (800d930 <MX_USB_DEVICE_Init+0x54>)
800d8e6: f7fe ff62 bl 800c7ae <USBD_Init>
800d8ea: 4603 mov r3, r0
800d8ec: 2b00 cmp r3, #0
800d8ee: d001 beq.n 800d8f4 <MX_USB_DEVICE_Init+0x18>
{
Error_Handler();
800d8f0: f7f5 fe6c bl 80035cc <Error_Handler>
}
if (USBD_RegisterClass(&hUsbDeviceFS, &USBD_CDC) != USBD_OK)
800d8f4: 490f ldr r1, [pc, #60] @ (800d934 <MX_USB_DEVICE_Init+0x58>)
800d8f6: 480e ldr r0, [pc, #56] @ (800d930 <MX_USB_DEVICE_Init+0x54>)
800d8f8: f7fe ff84 bl 800c804 <USBD_RegisterClass>
800d8fc: 4603 mov r3, r0
800d8fe: 2b00 cmp r3, #0
800d900: d001 beq.n 800d906 <MX_USB_DEVICE_Init+0x2a>
{
Error_Handler();
800d902: f7f5 fe63 bl 80035cc <Error_Handler>
}
if (USBD_CDC_RegisterInterface(&hUsbDeviceFS, &USBD_Interface_fops_FS) != USBD_OK)
800d906: 490c ldr r1, [pc, #48] @ (800d938 <MX_USB_DEVICE_Init+0x5c>)
800d908: 4809 ldr r0, [pc, #36] @ (800d930 <MX_USB_DEVICE_Init+0x54>)
800d90a: f7fe feb5 bl 800c678 <USBD_CDC_RegisterInterface>
800d90e: 4603 mov r3, r0
800d910: 2b00 cmp r3, #0
800d912: d001 beq.n 800d918 <MX_USB_DEVICE_Init+0x3c>
{
Error_Handler();
800d914: f7f5 fe5a bl 80035cc <Error_Handler>
}
if (USBD_Start(&hUsbDeviceFS) != USBD_OK)
800d918: 4805 ldr r0, [pc, #20] @ (800d930 <MX_USB_DEVICE_Init+0x54>)
800d91a: f7fe ff8c bl 800c836 <USBD_Start>
800d91e: 4603 mov r3, r0
800d920: 2b00 cmp r3, #0
800d922: d001 beq.n 800d928 <MX_USB_DEVICE_Init+0x4c>
{
Error_Handler();
800d924: f7f5 fe52 bl 80035cc <Error_Handler>
}
/* USER CODE BEGIN USB_DEVICE_Init_PostTreatment */
/* USER CODE END USB_DEVICE_Init_PostTreatment */
}
800d928: bf00 nop
800d92a: bd80 pop {r7, pc}
800d92c: 2000013c .word 0x2000013c
800d930: 2000049c .word 0x2000049c
800d934: 20000028 .word 0x20000028
800d938: 2000012c .word 0x2000012c
0800d93c <fifo_push>:
/* USER CODE BEGIN PRIVATE_FUNCTIONS_DECLARATION */
#define RX_FIFO_SZ 256
static uint8_t rx_fifo[RX_FIFO_SZ];
static volatile uint16_t rx_head = 0, rx_tail = 0;
static void fifo_push(const uint8_t* data, uint32_t len) {
800d93c: b480 push {r7}
800d93e: b085 sub sp, #20
800d940: af00 add r7, sp, #0
800d942: 6078 str r0, [r7, #4]
800d944: 6039 str r1, [r7, #0]
while (len--) {
800d946: e01e b.n 800d986 <fifo_push+0x4a>
uint16_t next = (rx_head + 1u) & (RX_FIFO_SZ - 1u);
800d948: 4b14 ldr r3, [pc, #80] @ (800d99c <fifo_push+0x60>)
800d94a: 881b ldrh r3, [r3, #0]
800d94c: b29b uxth r3, r3
800d94e: 3301 adds r3, #1
800d950: b29b uxth r3, r3
800d952: b2db uxtb r3, r3
800d954: 81fb strh r3, [r7, #14]
if (next == (rx_tail & (RX_FIFO_SZ - 1u))) {
800d956: 89fa ldrh r2, [r7, #14]
800d958: 4b11 ldr r3, [pc, #68] @ (800d9a0 <fifo_push+0x64>)
800d95a: 881b ldrh r3, [r3, #0]
800d95c: b29b uxth r3, r3
800d95e: b2db uxtb r3, r3
800d960: 429a cmp r2, r3
800d962: d103 bne.n 800d96c <fifo_push+0x30>
/* overflow — drop byte (or set a flag) */
data++;
800d964: 687b ldr r3, [r7, #4]
800d966: 3301 adds r3, #1
800d968: 607b str r3, [r7, #4]
continue;
800d96a: e00c b.n 800d986 <fifo_push+0x4a>
}
rx_fifo[rx_head & (RX_FIFO_SZ - 1u)] = *data++;
800d96c: 687b ldr r3, [r7, #4]
800d96e: 1c5a adds r2, r3, #1
800d970: 607a str r2, [r7, #4]
800d972: 4a0a ldr r2, [pc, #40] @ (800d99c <fifo_push+0x60>)
800d974: 8812 ldrh r2, [r2, #0]
800d976: b292 uxth r2, r2
800d978: b2d2 uxtb r2, r2
800d97a: 7819 ldrb r1, [r3, #0]
800d97c: 4b09 ldr r3, [pc, #36] @ (800d9a4 <fifo_push+0x68>)
800d97e: 5499 strb r1, [r3, r2]
rx_head = next;
800d980: 4a06 ldr r2, [pc, #24] @ (800d99c <fifo_push+0x60>)
800d982: 89fb ldrh r3, [r7, #14]
800d984: 8013 strh r3, [r2, #0]
while (len--) {
800d986: 683b ldr r3, [r7, #0]
800d988: 1e5a subs r2, r3, #1
800d98a: 603a str r2, [r7, #0]
800d98c: 2b00 cmp r3, #0
800d98e: d1db bne.n 800d948 <fifo_push+0xc>
}
}
800d990: bf00 nop
800d992: bf00 nop
800d994: 3714 adds r7, #20
800d996: 46bd mov sp, r7
800d998: bc80 pop {r7}
800d99a: 4770 bx lr
800d99c: 20001060 .word 0x20001060
800d9a0: 20001062 .word 0x20001062
800d9a4: 20000f60 .word 0x20000f60
0800d9a8 <CDC_Available>:
uint32_t CDC_Available(void) {
800d9a8: b480 push {r7}
800d9aa: af00 add r7, sp, #0
return (uint16_t)((rx_head - rx_tail) & (RX_FIFO_SZ - 1u));
800d9ac: 4b06 ldr r3, [pc, #24] @ (800d9c8 <CDC_Available+0x20>)
800d9ae: 881b ldrh r3, [r3, #0]
800d9b0: b29a uxth r2, r3
800d9b2: 4b06 ldr r3, [pc, #24] @ (800d9cc <CDC_Available+0x24>)
800d9b4: 881b ldrh r3, [r3, #0]
800d9b6: b29b uxth r3, r3
800d9b8: 1ad3 subs r3, r2, r3
800d9ba: b29b uxth r3, r3
800d9bc: b2db uxtb r3, r3
}
800d9be: 4618 mov r0, r3
800d9c0: 46bd mov sp, r7
800d9c2: bc80 pop {r7}
800d9c4: 4770 bx lr
800d9c6: bf00 nop
800d9c8: 20001060 .word 0x20001060
800d9cc: 20001062 .word 0x20001062
0800d9d0 <CDC_ReadByte>:
int CDC_ReadByte(void) {
800d9d0: b480 push {r7}
800d9d2: b083 sub sp, #12
800d9d4: af00 add r7, sp, #0
if (rx_tail == rx_head) return -1;
800d9d6: 4b10 ldr r3, [pc, #64] @ (800da18 <CDC_ReadByte+0x48>)
800d9d8: 881b ldrh r3, [r3, #0]
800d9da: b29a uxth r2, r3
800d9dc: 4b0f ldr r3, [pc, #60] @ (800da1c <CDC_ReadByte+0x4c>)
800d9de: 881b ldrh r3, [r3, #0]
800d9e0: b29b uxth r3, r3
800d9e2: 429a cmp r2, r3
800d9e4: d102 bne.n 800d9ec <CDC_ReadByte+0x1c>
800d9e6: f04f 33ff mov.w r3, #4294967295
800d9ea: e010 b.n 800da0e <CDC_ReadByte+0x3e>
int b = rx_fifo[rx_tail & (RX_FIFO_SZ - 1u)];
800d9ec: 4b0a ldr r3, [pc, #40] @ (800da18 <CDC_ReadByte+0x48>)
800d9ee: 881b ldrh r3, [r3, #0]
800d9f0: b29b uxth r3, r3
800d9f2: b2db uxtb r3, r3
800d9f4: 4a0a ldr r2, [pc, #40] @ (800da20 <CDC_ReadByte+0x50>)
800d9f6: 5cd3 ldrb r3, [r2, r3]
800d9f8: 607b str r3, [r7, #4]
rx_tail = (rx_tail + 1u) & (RX_FIFO_SZ - 1u);
800d9fa: 4b07 ldr r3, [pc, #28] @ (800da18 <CDC_ReadByte+0x48>)
800d9fc: 881b ldrh r3, [r3, #0]
800d9fe: b29b uxth r3, r3
800da00: 3301 adds r3, #1
800da02: b29b uxth r3, r3
800da04: b2db uxtb r3, r3
800da06: b29a uxth r2, r3
800da08: 4b03 ldr r3, [pc, #12] @ (800da18 <CDC_ReadByte+0x48>)
800da0a: 801a strh r2, [r3, #0]
return b;
800da0c: 687b ldr r3, [r7, #4]
}
800da0e: 4618 mov r0, r3
800da10: 370c adds r7, #12
800da12: 46bd mov sp, r7
800da14: bc80 pop {r7}
800da16: 4770 bx lr
800da18: 20001062 .word 0x20001062
800da1c: 20001060 .word 0x20001060
800da20: 20000f60 .word 0x20000f60
0800da24 <CDC_Init_FS>:
/**
* @brief Initializes the CDC media low layer over the FS USB IP
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Init_FS(void)
{
800da24: b580 push {r7, lr}
800da26: af00 add r7, sp, #0
/* USER CODE BEGIN 3 */
/* Set Application Buffers */
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, UserTxBufferFS, 0);
800da28: 2200 movs r2, #0
800da2a: 4905 ldr r1, [pc, #20] @ (800da40 <CDC_Init_FS+0x1c>)
800da2c: 4805 ldr r0, [pc, #20] @ (800da44 <CDC_Init_FS+0x20>)
800da2e: f7fe fe39 bl 800c6a4 <USBD_CDC_SetTxBuffer>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, UserRxBufferFS);
800da32: 4905 ldr r1, [pc, #20] @ (800da48 <CDC_Init_FS+0x24>)
800da34: 4803 ldr r0, [pc, #12] @ (800da44 <CDC_Init_FS+0x20>)
800da36: f7fe fe4e bl 800c6d6 <USBD_CDC_SetRxBuffer>
return (USBD_OK);
800da3a: 2300 movs r3, #0
/* USER CODE END 3 */
}
800da3c: 4618 mov r0, r3
800da3e: bd80 pop {r7, pc}
800da40: 20000b60 .word 0x20000b60
800da44: 2000049c .word 0x2000049c
800da48: 20000760 .word 0x20000760
0800da4c <CDC_DeInit_FS>:
/**
* @brief DeInitializes the CDC media low layer
* @retval USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_DeInit_FS(void)
{
800da4c: b480 push {r7}
800da4e: af00 add r7, sp, #0
/* USER CODE BEGIN 4 */
return (USBD_OK);
800da50: 2300 movs r3, #0
/* USER CODE END 4 */
}
800da52: 4618 mov r0, r3
800da54: 46bd mov sp, r7
800da56: bc80 pop {r7}
800da58: 4770 bx lr
...
0800da5c <CDC_Control_FS>:
* @param pbuf: Buffer containing command data (request parameters)
* @param length: Number of data to be sent (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Control_FS(uint8_t cmd, uint8_t* pbuf, uint16_t length)
{
800da5c: b480 push {r7}
800da5e: b083 sub sp, #12
800da60: af00 add r7, sp, #0
800da62: 4603 mov r3, r0
800da64: 6039 str r1, [r7, #0]
800da66: 71fb strb r3, [r7, #7]
800da68: 4613 mov r3, r2
800da6a: 80bb strh r3, [r7, #4]
/* USER CODE BEGIN 5 */
switch(cmd)
800da6c: 79fb ldrb r3, [r7, #7]
800da6e: 2b23 cmp r3, #35 @ 0x23
800da70: d84a bhi.n 800db08 <CDC_Control_FS+0xac>
800da72: a201 add r2, pc, #4 @ (adr r2, 800da78 <CDC_Control_FS+0x1c>)
800da74: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800da78: 0800db09 .word 0x0800db09
800da7c: 0800db09 .word 0x0800db09
800da80: 0800db09 .word 0x0800db09
800da84: 0800db09 .word 0x0800db09
800da88: 0800db09 .word 0x0800db09
800da8c: 0800db09 .word 0x0800db09
800da90: 0800db09 .word 0x0800db09
800da94: 0800db09 .word 0x0800db09
800da98: 0800db09 .word 0x0800db09
800da9c: 0800db09 .word 0x0800db09
800daa0: 0800db09 .word 0x0800db09
800daa4: 0800db09 .word 0x0800db09
800daa8: 0800db09 .word 0x0800db09
800daac: 0800db09 .word 0x0800db09
800dab0: 0800db09 .word 0x0800db09
800dab4: 0800db09 .word 0x0800db09
800dab8: 0800db09 .word 0x0800db09
800dabc: 0800db09 .word 0x0800db09
800dac0: 0800db09 .word 0x0800db09
800dac4: 0800db09 .word 0x0800db09
800dac8: 0800db09 .word 0x0800db09
800dacc: 0800db09 .word 0x0800db09
800dad0: 0800db09 .word 0x0800db09
800dad4: 0800db09 .word 0x0800db09
800dad8: 0800db09 .word 0x0800db09
800dadc: 0800db09 .word 0x0800db09
800dae0: 0800db09 .word 0x0800db09
800dae4: 0800db09 .word 0x0800db09
800dae8: 0800db09 .word 0x0800db09
800daec: 0800db09 .word 0x0800db09
800daf0: 0800db09 .word 0x0800db09
800daf4: 0800db09 .word 0x0800db09
800daf8: 0800db09 .word 0x0800db09
800dafc: 0800db09 .word 0x0800db09
800db00: 0800db09 .word 0x0800db09
800db04: 0800db09 .word 0x0800db09
case CDC_SEND_BREAK:
break;
default:
break;
800db08: bf00 nop
}
return (USBD_OK);
800db0a: 2300 movs r3, #0
/* USER CODE END 5 */
}
800db0c: 4618 mov r0, r3
800db0e: 370c adds r7, #12
800db10: 46bd mov sp, r7
800db12: bc80 pop {r7}
800db14: 4770 bx lr
800db16: bf00 nop
0800db18 <CDC_Receive_FS>:
* @param Buf: Buffer of data to be received
* @param Len: Number of data received (in bytes)
* @retval Result of the operation: USBD_OK if all operations are OK else USBD_FAIL
*/
static int8_t CDC_Receive_FS(uint8_t* Buf, uint32_t *Len)
{
800db18: b580 push {r7, lr}
800db1a: b082 sub sp, #8
800db1c: af00 add r7, sp, #0
800db1e: 6078 str r0, [r7, #4]
800db20: 6039 str r1, [r7, #0]
/* USER CODE BEGIN 6 */
if (*Len) fifo_push(Buf, *Len);
800db22: 683b ldr r3, [r7, #0]
800db24: 681b ldr r3, [r3, #0]
800db26: 2b00 cmp r3, #0
800db28: d005 beq.n 800db36 <CDC_Receive_FS+0x1e>
800db2a: 683b ldr r3, [r7, #0]
800db2c: 681b ldr r3, [r3, #0]
800db2e: 4619 mov r1, r3
800db30: 6878 ldr r0, [r7, #4]
800db32: f7ff ff03 bl 800d93c <fifo_push>
USBD_CDC_SetRxBuffer(&hUsbDeviceFS, &Buf[0]);
800db36: 6879 ldr r1, [r7, #4]
800db38: 4805 ldr r0, [pc, #20] @ (800db50 <CDC_Receive_FS+0x38>)
800db3a: f7fe fdcc bl 800c6d6 <USBD_CDC_SetRxBuffer>
USBD_CDC_ReceivePacket(&hUsbDeviceFS);
800db3e: 4804 ldr r0, [pc, #16] @ (800db50 <CDC_Receive_FS+0x38>)
800db40: f7fe fe0b bl 800c75a <USBD_CDC_ReceivePacket>
return (USBD_OK);
800db44: 2300 movs r3, #0
/* USER CODE END 6 */
}
800db46: 4618 mov r0, r3
800db48: 3708 adds r7, #8
800db4a: 46bd mov sp, r7
800db4c: bd80 pop {r7, pc}
800db4e: bf00 nop
800db50: 2000049c .word 0x2000049c
0800db54 <CDC_Transmit_FS>:
* @param Buf: Buffer of data to be sent
* @param Len: Number of data to be sent (in bytes)
* @retval USBD_OK if all operations are OK else USBD_FAIL or USBD_BUSY
*/
uint8_t CDC_Transmit_FS(uint8_t* Buf, uint16_t Len)
{
800db54: b580 push {r7, lr}
800db56: b084 sub sp, #16
800db58: af00 add r7, sp, #0
800db5a: 6078 str r0, [r7, #4]
800db5c: 460b mov r3, r1
800db5e: 807b strh r3, [r7, #2]
uint8_t result = USBD_OK;
800db60: 2300 movs r3, #0
800db62: 73fb strb r3, [r7, #15]
/* USER CODE BEGIN 7 */
USBD_CDC_HandleTypeDef *hcdc = (USBD_CDC_HandleTypeDef*)hUsbDeviceFS.pClassData;
800db64: 4b0d ldr r3, [pc, #52] @ (800db9c <CDC_Transmit_FS+0x48>)
800db66: f8d3 32b8 ldr.w r3, [r3, #696] @ 0x2b8
800db6a: 60bb str r3, [r7, #8]
if (hcdc->TxState != 0){
800db6c: 68bb ldr r3, [r7, #8]
800db6e: f8d3 3214 ldr.w r3, [r3, #532] @ 0x214
800db72: 2b00 cmp r3, #0
800db74: d001 beq.n 800db7a <CDC_Transmit_FS+0x26>
return USBD_BUSY;
800db76: 2301 movs r3, #1
800db78: e00b b.n 800db92 <CDC_Transmit_FS+0x3e>
}
USBD_CDC_SetTxBuffer(&hUsbDeviceFS, Buf, Len);
800db7a: 887b ldrh r3, [r7, #2]
800db7c: 461a mov r2, r3
800db7e: 6879 ldr r1, [r7, #4]
800db80: 4806 ldr r0, [pc, #24] @ (800db9c <CDC_Transmit_FS+0x48>)
800db82: f7fe fd8f bl 800c6a4 <USBD_CDC_SetTxBuffer>
result = USBD_CDC_TransmitPacket(&hUsbDeviceFS);
800db86: 4805 ldr r0, [pc, #20] @ (800db9c <CDC_Transmit_FS+0x48>)
800db88: f7fe fdb8 bl 800c6fc <USBD_CDC_TransmitPacket>
800db8c: 4603 mov r3, r0
800db8e: 73fb strb r3, [r7, #15]
/* USER CODE END 7 */
return result;
800db90: 7bfb ldrb r3, [r7, #15]
}
800db92: 4618 mov r0, r3
800db94: 3710 adds r7, #16
800db96: 46bd mov sp, r7
800db98: bd80 pop {r7, pc}
800db9a: bf00 nop
800db9c: 2000049c .word 0x2000049c
0800dba0 <USBD_FS_DeviceDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_DeviceDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dba0: b480 push {r7}
800dba2: b083 sub sp, #12
800dba4: af00 add r7, sp, #0
800dba6: 4603 mov r3, r0
800dba8: 6039 str r1, [r7, #0]
800dbaa: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_FS_DeviceDesc);
800dbac: 683b ldr r3, [r7, #0]
800dbae: 2212 movs r2, #18
800dbb0: 801a strh r2, [r3, #0]
return USBD_FS_DeviceDesc;
800dbb2: 4b03 ldr r3, [pc, #12] @ (800dbc0 <USBD_FS_DeviceDescriptor+0x20>)
}
800dbb4: 4618 mov r0, r3
800dbb6: 370c adds r7, #12
800dbb8: 46bd mov sp, r7
800dbba: bc80 pop {r7}
800dbbc: 4770 bx lr
800dbbe: bf00 nop
800dbc0: 20000158 .word 0x20000158
0800dbc4 <USBD_FS_LangIDStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_LangIDStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dbc4: b480 push {r7}
800dbc6: b083 sub sp, #12
800dbc8: af00 add r7, sp, #0
800dbca: 4603 mov r3, r0
800dbcc: 6039 str r1, [r7, #0]
800dbce: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = sizeof(USBD_LangIDDesc);
800dbd0: 683b ldr r3, [r7, #0]
800dbd2: 2204 movs r2, #4
800dbd4: 801a strh r2, [r3, #0]
return USBD_LangIDDesc;
800dbd6: 4b03 ldr r3, [pc, #12] @ (800dbe4 <USBD_FS_LangIDStrDescriptor+0x20>)
}
800dbd8: 4618 mov r0, r3
800dbda: 370c adds r7, #12
800dbdc: 46bd mov sp, r7
800dbde: bc80 pop {r7}
800dbe0: 4770 bx lr
800dbe2: bf00 nop
800dbe4: 2000016c .word 0x2000016c
0800dbe8 <USBD_FS_ProductStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ProductStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dbe8: b580 push {r7, lr}
800dbea: b082 sub sp, #8
800dbec: af00 add r7, sp, #0
800dbee: 4603 mov r3, r0
800dbf0: 6039 str r1, [r7, #0]
800dbf2: 71fb strb r3, [r7, #7]
if(speed == 0)
800dbf4: 79fb ldrb r3, [r7, #7]
800dbf6: 2b00 cmp r3, #0
800dbf8: d105 bne.n 800dc06 <USBD_FS_ProductStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800dbfa: 683a ldr r2, [r7, #0]
800dbfc: 4907 ldr r1, [pc, #28] @ (800dc1c <USBD_FS_ProductStrDescriptor+0x34>)
800dbfe: 4808 ldr r0, [pc, #32] @ (800dc20 <USBD_FS_ProductStrDescriptor+0x38>)
800dc00: f7ff fd8f bl 800d722 <USBD_GetString>
800dc04: e004 b.n 800dc10 <USBD_FS_ProductStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_PRODUCT_STRING_FS, USBD_StrDesc, length);
800dc06: 683a ldr r2, [r7, #0]
800dc08: 4904 ldr r1, [pc, #16] @ (800dc1c <USBD_FS_ProductStrDescriptor+0x34>)
800dc0a: 4805 ldr r0, [pc, #20] @ (800dc20 <USBD_FS_ProductStrDescriptor+0x38>)
800dc0c: f7ff fd89 bl 800d722 <USBD_GetString>
}
return USBD_StrDesc;
800dc10: 4b02 ldr r3, [pc, #8] @ (800dc1c <USBD_FS_ProductStrDescriptor+0x34>)
}
800dc12: 4618 mov r0, r3
800dc14: 3708 adds r7, #8
800dc16: 46bd mov sp, r7
800dc18: bd80 pop {r7, pc}
800dc1a: bf00 nop
800dc1c: 20001064 .word 0x20001064
800dc20: 0800f2cc .word 0x0800f2cc
0800dc24 <USBD_FS_ManufacturerStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ManufacturerStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dc24: b580 push {r7, lr}
800dc26: b082 sub sp, #8
800dc28: af00 add r7, sp, #0
800dc2a: 4603 mov r3, r0
800dc2c: 6039 str r1, [r7, #0]
800dc2e: 71fb strb r3, [r7, #7]
UNUSED(speed);
USBD_GetString((uint8_t *)USBD_MANUFACTURER_STRING, USBD_StrDesc, length);
800dc30: 683a ldr r2, [r7, #0]
800dc32: 4904 ldr r1, [pc, #16] @ (800dc44 <USBD_FS_ManufacturerStrDescriptor+0x20>)
800dc34: 4804 ldr r0, [pc, #16] @ (800dc48 <USBD_FS_ManufacturerStrDescriptor+0x24>)
800dc36: f7ff fd74 bl 800d722 <USBD_GetString>
return USBD_StrDesc;
800dc3a: 4b02 ldr r3, [pc, #8] @ (800dc44 <USBD_FS_ManufacturerStrDescriptor+0x20>)
}
800dc3c: 4618 mov r0, r3
800dc3e: 3708 adds r7, #8
800dc40: 46bd mov sp, r7
800dc42: bd80 pop {r7, pc}
800dc44: 20001064 .word 0x20001064
800dc48: 0800f2e4 .word 0x0800f2e4
0800dc4c <USBD_FS_SerialStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_SerialStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dc4c: b580 push {r7, lr}
800dc4e: b082 sub sp, #8
800dc50: af00 add r7, sp, #0
800dc52: 4603 mov r3, r0
800dc54: 6039 str r1, [r7, #0]
800dc56: 71fb strb r3, [r7, #7]
UNUSED(speed);
*length = USB_SIZ_STRING_SERIAL;
800dc58: 683b ldr r3, [r7, #0]
800dc5a: 221a movs r2, #26
800dc5c: 801a strh r2, [r3, #0]
/* Update the serial number string descriptor with the data from the unique
* ID */
Get_SerialNum();
800dc5e: f000 f843 bl 800dce8 <Get_SerialNum>
/* USER CODE BEGIN USBD_FS_SerialStrDescriptor */
/* USER CODE END USBD_FS_SerialStrDescriptor */
return (uint8_t *) USBD_StringSerial;
800dc62: 4b02 ldr r3, [pc, #8] @ (800dc6c <USBD_FS_SerialStrDescriptor+0x20>)
}
800dc64: 4618 mov r0, r3
800dc66: 3708 adds r7, #8
800dc68: 46bd mov sp, r7
800dc6a: bd80 pop {r7, pc}
800dc6c: 20000170 .word 0x20000170
0800dc70 <USBD_FS_ConfigStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_ConfigStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dc70: b580 push {r7, lr}
800dc72: b082 sub sp, #8
800dc74: af00 add r7, sp, #0
800dc76: 4603 mov r3, r0
800dc78: 6039 str r1, [r7, #0]
800dc7a: 71fb strb r3, [r7, #7]
if(speed == USBD_SPEED_HIGH)
800dc7c: 79fb ldrb r3, [r7, #7]
800dc7e: 2b00 cmp r3, #0
800dc80: d105 bne.n 800dc8e <USBD_FS_ConfigStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800dc82: 683a ldr r2, [r7, #0]
800dc84: 4907 ldr r1, [pc, #28] @ (800dca4 <USBD_FS_ConfigStrDescriptor+0x34>)
800dc86: 4808 ldr r0, [pc, #32] @ (800dca8 <USBD_FS_ConfigStrDescriptor+0x38>)
800dc88: f7ff fd4b bl 800d722 <USBD_GetString>
800dc8c: e004 b.n 800dc98 <USBD_FS_ConfigStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_CONFIGURATION_STRING_FS, USBD_StrDesc, length);
800dc8e: 683a ldr r2, [r7, #0]
800dc90: 4904 ldr r1, [pc, #16] @ (800dca4 <USBD_FS_ConfigStrDescriptor+0x34>)
800dc92: 4805 ldr r0, [pc, #20] @ (800dca8 <USBD_FS_ConfigStrDescriptor+0x38>)
800dc94: f7ff fd45 bl 800d722 <USBD_GetString>
}
return USBD_StrDesc;
800dc98: 4b02 ldr r3, [pc, #8] @ (800dca4 <USBD_FS_ConfigStrDescriptor+0x34>)
}
800dc9a: 4618 mov r0, r3
800dc9c: 3708 adds r7, #8
800dc9e: 46bd mov sp, r7
800dca0: bd80 pop {r7, pc}
800dca2: bf00 nop
800dca4: 20001064 .word 0x20001064
800dca8: 0800f2f8 .word 0x0800f2f8
0800dcac <USBD_FS_InterfaceStrDescriptor>:
* @param speed : Current device speed
* @param length : Pointer to data length variable
* @retval Pointer to descriptor buffer
*/
uint8_t * USBD_FS_InterfaceStrDescriptor(USBD_SpeedTypeDef speed, uint16_t *length)
{
800dcac: b580 push {r7, lr}
800dcae: b082 sub sp, #8
800dcb0: af00 add r7, sp, #0
800dcb2: 4603 mov r3, r0
800dcb4: 6039 str r1, [r7, #0]
800dcb6: 71fb strb r3, [r7, #7]
if(speed == 0)
800dcb8: 79fb ldrb r3, [r7, #7]
800dcba: 2b00 cmp r3, #0
800dcbc: d105 bne.n 800dcca <USBD_FS_InterfaceStrDescriptor+0x1e>
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800dcbe: 683a ldr r2, [r7, #0]
800dcc0: 4907 ldr r1, [pc, #28] @ (800dce0 <USBD_FS_InterfaceStrDescriptor+0x34>)
800dcc2: 4808 ldr r0, [pc, #32] @ (800dce4 <USBD_FS_InterfaceStrDescriptor+0x38>)
800dcc4: f7ff fd2d bl 800d722 <USBD_GetString>
800dcc8: e004 b.n 800dcd4 <USBD_FS_InterfaceStrDescriptor+0x28>
}
else
{
USBD_GetString((uint8_t *)USBD_INTERFACE_STRING_FS, USBD_StrDesc, length);
800dcca: 683a ldr r2, [r7, #0]
800dccc: 4904 ldr r1, [pc, #16] @ (800dce0 <USBD_FS_InterfaceStrDescriptor+0x34>)
800dcce: 4805 ldr r0, [pc, #20] @ (800dce4 <USBD_FS_InterfaceStrDescriptor+0x38>)
800dcd0: f7ff fd27 bl 800d722 <USBD_GetString>
}
return USBD_StrDesc;
800dcd4: 4b02 ldr r3, [pc, #8] @ (800dce0 <USBD_FS_InterfaceStrDescriptor+0x34>)
}
800dcd6: 4618 mov r0, r3
800dcd8: 3708 adds r7, #8
800dcda: 46bd mov sp, r7
800dcdc: bd80 pop {r7, pc}
800dcde: bf00 nop
800dce0: 20001064 .word 0x20001064
800dce4: 0800f304 .word 0x0800f304
0800dce8 <Get_SerialNum>:
* @brief Create the serial number string descriptor
* @param None
* @retval None
*/
static void Get_SerialNum(void)
{
800dce8: b580 push {r7, lr}
800dcea: b084 sub sp, #16
800dcec: af00 add r7, sp, #0
uint32_t deviceserial0;
uint32_t deviceserial1;
uint32_t deviceserial2;
deviceserial0 = *(uint32_t *) DEVICE_ID1;
800dcee: 4b0f ldr r3, [pc, #60] @ (800dd2c <Get_SerialNum+0x44>)
800dcf0: 681b ldr r3, [r3, #0]
800dcf2: 60fb str r3, [r7, #12]
deviceserial1 = *(uint32_t *) DEVICE_ID2;
800dcf4: 4b0e ldr r3, [pc, #56] @ (800dd30 <Get_SerialNum+0x48>)
800dcf6: 681b ldr r3, [r3, #0]
800dcf8: 60bb str r3, [r7, #8]
deviceserial2 = *(uint32_t *) DEVICE_ID3;
800dcfa: 4b0e ldr r3, [pc, #56] @ (800dd34 <Get_SerialNum+0x4c>)
800dcfc: 681b ldr r3, [r3, #0]
800dcfe: 607b str r3, [r7, #4]
deviceserial0 += deviceserial2;
800dd00: 68fa ldr r2, [r7, #12]
800dd02: 687b ldr r3, [r7, #4]
800dd04: 4413 add r3, r2
800dd06: 60fb str r3, [r7, #12]
if (deviceserial0 != 0)
800dd08: 68fb ldr r3, [r7, #12]
800dd0a: 2b00 cmp r3, #0
800dd0c: d009 beq.n 800dd22 <Get_SerialNum+0x3a>
{
IntToUnicode(deviceserial0, &USBD_StringSerial[2], 8);
800dd0e: 2208 movs r2, #8
800dd10: 4909 ldr r1, [pc, #36] @ (800dd38 <Get_SerialNum+0x50>)
800dd12: 68f8 ldr r0, [r7, #12]
800dd14: f000 f814 bl 800dd40 <IntToUnicode>
IntToUnicode(deviceserial1, &USBD_StringSerial[18], 4);
800dd18: 2204 movs r2, #4
800dd1a: 4908 ldr r1, [pc, #32] @ (800dd3c <Get_SerialNum+0x54>)
800dd1c: 68b8 ldr r0, [r7, #8]
800dd1e: f000 f80f bl 800dd40 <IntToUnicode>
}
}
800dd22: bf00 nop
800dd24: 3710 adds r7, #16
800dd26: 46bd mov sp, r7
800dd28: bd80 pop {r7, pc}
800dd2a: bf00 nop
800dd2c: 1ffff7e8 .word 0x1ffff7e8
800dd30: 1ffff7ec .word 0x1ffff7ec
800dd34: 1ffff7f0 .word 0x1ffff7f0
800dd38: 20000172 .word 0x20000172
800dd3c: 20000182 .word 0x20000182
0800dd40 <IntToUnicode>:
* @param pbuf: pointer to the buffer
* @param len: buffer length
* @retval None
*/
static void IntToUnicode(uint32_t value, uint8_t * pbuf, uint8_t len)
{
800dd40: b480 push {r7}
800dd42: b087 sub sp, #28
800dd44: af00 add r7, sp, #0
800dd46: 60f8 str r0, [r7, #12]
800dd48: 60b9 str r1, [r7, #8]
800dd4a: 4613 mov r3, r2
800dd4c: 71fb strb r3, [r7, #7]
uint8_t idx = 0;
800dd4e: 2300 movs r3, #0
800dd50: 75fb strb r3, [r7, #23]
for (idx = 0; idx < len; idx++)
800dd52: 2300 movs r3, #0
800dd54: 75fb strb r3, [r7, #23]
800dd56: e027 b.n 800dda8 <IntToUnicode+0x68>
{
if (((value >> 28)) < 0xA)
800dd58: 68fb ldr r3, [r7, #12]
800dd5a: 0f1b lsrs r3, r3, #28
800dd5c: 2b09 cmp r3, #9
800dd5e: d80b bhi.n 800dd78 <IntToUnicode+0x38>
{
pbuf[2 * idx] = (value >> 28) + '0';
800dd60: 68fb ldr r3, [r7, #12]
800dd62: 0f1b lsrs r3, r3, #28
800dd64: b2da uxtb r2, r3
800dd66: 7dfb ldrb r3, [r7, #23]
800dd68: 005b lsls r3, r3, #1
800dd6a: 4619 mov r1, r3
800dd6c: 68bb ldr r3, [r7, #8]
800dd6e: 440b add r3, r1
800dd70: 3230 adds r2, #48 @ 0x30
800dd72: b2d2 uxtb r2, r2
800dd74: 701a strb r2, [r3, #0]
800dd76: e00a b.n 800dd8e <IntToUnicode+0x4e>
}
else
{
pbuf[2 * idx] = (value >> 28) + 'A' - 10;
800dd78: 68fb ldr r3, [r7, #12]
800dd7a: 0f1b lsrs r3, r3, #28
800dd7c: b2da uxtb r2, r3
800dd7e: 7dfb ldrb r3, [r7, #23]
800dd80: 005b lsls r3, r3, #1
800dd82: 4619 mov r1, r3
800dd84: 68bb ldr r3, [r7, #8]
800dd86: 440b add r3, r1
800dd88: 3237 adds r2, #55 @ 0x37
800dd8a: b2d2 uxtb r2, r2
800dd8c: 701a strb r2, [r3, #0]
}
value = value << 4;
800dd8e: 68fb ldr r3, [r7, #12]
800dd90: 011b lsls r3, r3, #4
800dd92: 60fb str r3, [r7, #12]
pbuf[2 * idx + 1] = 0;
800dd94: 7dfb ldrb r3, [r7, #23]
800dd96: 005b lsls r3, r3, #1
800dd98: 3301 adds r3, #1
800dd9a: 68ba ldr r2, [r7, #8]
800dd9c: 4413 add r3, r2
800dd9e: 2200 movs r2, #0
800dda0: 701a strb r2, [r3, #0]
for (idx = 0; idx < len; idx++)
800dda2: 7dfb ldrb r3, [r7, #23]
800dda4: 3301 adds r3, #1
800dda6: 75fb strb r3, [r7, #23]
800dda8: 7dfa ldrb r2, [r7, #23]
800ddaa: 79fb ldrb r3, [r7, #7]
800ddac: 429a cmp r2, r3
800ddae: d3d3 bcc.n 800dd58 <IntToUnicode+0x18>
}
}
800ddb0: bf00 nop
800ddb2: bf00 nop
800ddb4: 371c adds r7, #28
800ddb6: 46bd mov sp, r7
800ddb8: bc80 pop {r7}
800ddba: 4770 bx lr
0800ddbc <HAL_PCD_MspInit>:
LL Driver Callbacks (PCD -> USB Device Library)
*******************************************************************************/
/* MSP Init */
void HAL_PCD_MspInit(PCD_HandleTypeDef* pcdHandle)
{
800ddbc: b580 push {r7, lr}
800ddbe: b084 sub sp, #16
800ddc0: af00 add r7, sp, #0
800ddc2: 6078 str r0, [r7, #4]
if(pcdHandle->Instance==USB)
800ddc4: 687b ldr r3, [r7, #4]
800ddc6: 681b ldr r3, [r3, #0]
800ddc8: 4a0d ldr r2, [pc, #52] @ (800de00 <HAL_PCD_MspInit+0x44>)
800ddca: 4293 cmp r3, r2
800ddcc: d113 bne.n 800ddf6 <HAL_PCD_MspInit+0x3a>
{
/* USER CODE BEGIN USB_MspInit 0 */
/* USER CODE END USB_MspInit 0 */
/* Peripheral clock enable */
__HAL_RCC_USB_CLK_ENABLE();
800ddce: 4b0d ldr r3, [pc, #52] @ (800de04 <HAL_PCD_MspInit+0x48>)
800ddd0: 69db ldr r3, [r3, #28]
800ddd2: 4a0c ldr r2, [pc, #48] @ (800de04 <HAL_PCD_MspInit+0x48>)
800ddd4: f443 0300 orr.w r3, r3, #8388608 @ 0x800000
800ddd8: 61d3 str r3, [r2, #28]
800ddda: 4b0a ldr r3, [pc, #40] @ (800de04 <HAL_PCD_MspInit+0x48>)
800dddc: 69db ldr r3, [r3, #28]
800ddde: f403 0300 and.w r3, r3, #8388608 @ 0x800000
800dde2: 60fb str r3, [r7, #12]
800dde4: 68fb ldr r3, [r7, #12]
/* Peripheral interrupt init */
HAL_NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, 0, 0);
800dde6: 2200 movs r2, #0
800dde8: 2100 movs r1, #0
800ddea: 2014 movs r0, #20
800ddec: f7f7 fddb bl 80059a6 <HAL_NVIC_SetPriority>
HAL_NVIC_EnableIRQ(USB_LP_CAN1_RX0_IRQn);
800ddf0: 2014 movs r0, #20
800ddf2: f7f7 fdf4 bl 80059de <HAL_NVIC_EnableIRQ>
/* USER CODE BEGIN USB_MspInit 1 */
/* USER CODE END USB_MspInit 1 */
}
}
800ddf6: bf00 nop
800ddf8: 3710 adds r7, #16
800ddfa: 46bd mov sp, r7
800ddfc: bd80 pop {r7, pc}
800ddfe: bf00 nop
800de00: 40005c00 .word 0x40005c00
800de04: 40021000 .word 0x40021000
0800de08 <HAL_PCD_SetupStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800de08: b580 push {r7, lr}
800de0a: b082 sub sp, #8
800de0c: af00 add r7, sp, #0
800de0e: 6078 str r0, [r7, #4]
USBD_LL_SetupStage((USBD_HandleTypeDef*)hpcd->pData, (uint8_t *)hpcd->Setup);
800de10: 687b ldr r3, [r7, #4]
800de12: f8d3 22d4 ldr.w r2, [r3, #724] @ 0x2d4
800de16: 687b ldr r3, [r7, #4]
800de18: f503 7326 add.w r3, r3, #664 @ 0x298
800de1c: 4619 mov r1, r3
800de1e: 4610 mov r0, r2
800de20: f7fe fd51 bl 800c8c6 <USBD_LL_SetupStage>
}
800de24: bf00 nop
800de26: 3708 adds r7, #8
800de28: 46bd mov sp, r7
800de2a: bd80 pop {r7, pc}
0800de2c <HAL_PCD_DataOutStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800de2c: b580 push {r7, lr}
800de2e: b082 sub sp, #8
800de30: af00 add r7, sp, #0
800de32: 6078 str r0, [r7, #4]
800de34: 460b mov r3, r1
800de36: 70fb strb r3, [r7, #3]
USBD_LL_DataOutStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->OUT_ep[epnum].xfer_buff);
800de38: 687b ldr r3, [r7, #4]
800de3a: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800de3e: 78fa ldrb r2, [r7, #3]
800de40: 6879 ldr r1, [r7, #4]
800de42: 4613 mov r3, r2
800de44: 009b lsls r3, r3, #2
800de46: 4413 add r3, r2
800de48: 00db lsls r3, r3, #3
800de4a: 440b add r3, r1
800de4c: f503 73b2 add.w r3, r3, #356 @ 0x164
800de50: 681a ldr r2, [r3, #0]
800de52: 78fb ldrb r3, [r7, #3]
800de54: 4619 mov r1, r3
800de56: f7fe fd83 bl 800c960 <USBD_LL_DataOutStage>
}
800de5a: bf00 nop
800de5c: 3708 adds r7, #8
800de5e: 46bd mov sp, r7
800de60: bd80 pop {r7, pc}
0800de62 <HAL_PCD_DataInStageCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#else
void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800de62: b580 push {r7, lr}
800de64: b082 sub sp, #8
800de66: af00 add r7, sp, #0
800de68: 6078 str r0, [r7, #4]
800de6a: 460b mov r3, r1
800de6c: 70fb strb r3, [r7, #3]
USBD_LL_DataInStage((USBD_HandleTypeDef*)hpcd->pData, epnum, hpcd->IN_ep[epnum].xfer_buff);
800de6e: 687b ldr r3, [r7, #4]
800de70: f8d3 02d4 ldr.w r0, [r3, #724] @ 0x2d4
800de74: 78fa ldrb r2, [r7, #3]
800de76: 6879 ldr r1, [r7, #4]
800de78: 4613 mov r3, r2
800de7a: 009b lsls r3, r3, #2
800de7c: 4413 add r3, r2
800de7e: 00db lsls r3, r3, #3
800de80: 440b add r3, r1
800de82: 3324 adds r3, #36 @ 0x24
800de84: 681a ldr r2, [r3, #0]
800de86: 78fb ldrb r3, [r7, #3]
800de88: 4619 mov r1, r3
800de8a: f7fe fdda bl 800ca42 <USBD_LL_DataInStage>
}
800de8e: bf00 nop
800de90: 3708 adds r7, #8
800de92: 46bd mov sp, r7
800de94: bd80 pop {r7, pc}
0800de96 <HAL_PCD_SOFCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800de96: b580 push {r7, lr}
800de98: b082 sub sp, #8
800de9a: af00 add r7, sp, #0
800de9c: 6078 str r0, [r7, #4]
USBD_LL_SOF((USBD_HandleTypeDef*)hpcd->pData);
800de9e: 687b ldr r3, [r7, #4]
800dea0: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800dea4: 4618 mov r0, r3
800dea6: f7fe feea bl 800cc7e <USBD_LL_SOF>
}
800deaa: bf00 nop
800deac: 3708 adds r7, #8
800deae: 46bd mov sp, r7
800deb0: bd80 pop {r7, pc}
0800deb2 <HAL_PCD_ResetCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800deb2: b580 push {r7, lr}
800deb4: b084 sub sp, #16
800deb6: af00 add r7, sp, #0
800deb8: 6078 str r0, [r7, #4]
USBD_SpeedTypeDef speed = USBD_SPEED_FULL;
800deba: 2301 movs r3, #1
800debc: 73fb strb r3, [r7, #15]
if ( hpcd->Init.speed != PCD_SPEED_FULL)
800debe: 687b ldr r3, [r7, #4]
800dec0: 799b ldrb r3, [r3, #6]
800dec2: 2b02 cmp r3, #2
800dec4: d001 beq.n 800deca <HAL_PCD_ResetCallback+0x18>
{
Error_Handler();
800dec6: f7f5 fb81 bl 80035cc <Error_Handler>
}
/* Set Speed. */
USBD_LL_SetSpeed((USBD_HandleTypeDef*)hpcd->pData, speed);
800deca: 687b ldr r3, [r7, #4]
800decc: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800ded0: 7bfa ldrb r2, [r7, #15]
800ded2: 4611 mov r1, r2
800ded4: 4618 mov r0, r3
800ded6: f7fe fe9a bl 800cc0e <USBD_LL_SetSpeed>
/* Reset Device. */
USBD_LL_Reset((USBD_HandleTypeDef*)hpcd->pData);
800deda: 687b ldr r3, [r7, #4]
800dedc: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800dee0: 4618 mov r0, r3
800dee2: f7fe fe53 bl 800cb8c <USBD_LL_Reset>
}
800dee6: bf00 nop
800dee8: 3710 adds r7, #16
800deea: 46bd mov sp, r7
800deec: bd80 pop {r7, pc}
...
0800def0 <HAL_PCD_SuspendCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800def0: b580 push {r7, lr}
800def2: b082 sub sp, #8
800def4: af00 add r7, sp, #0
800def6: 6078 str r0, [r7, #4]
/* Inform USB library that core enters in suspend Mode. */
USBD_LL_Suspend((USBD_HandleTypeDef*)hpcd->pData);
800def8: 687b ldr r3, [r7, #4]
800defa: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800defe: 4618 mov r0, r3
800df00: f7fe fe94 bl 800cc2c <USBD_LL_Suspend>
/* Enter in STOP mode. */
/* USER CODE BEGIN 2 */
if (hpcd->Init.low_power_enable)
800df04: 687b ldr r3, [r7, #4]
800df06: 7a9b ldrb r3, [r3, #10]
800df08: 2b00 cmp r3, #0
800df0a: d005 beq.n 800df18 <HAL_PCD_SuspendCallback+0x28>
{
/* Set SLEEPDEEP bit and SleepOnExit of Cortex System Control Register. */
SCB->SCR |= (uint32_t)((uint32_t)(SCB_SCR_SLEEPDEEP_Msk | SCB_SCR_SLEEPONEXIT_Msk));
800df0c: 4b04 ldr r3, [pc, #16] @ (800df20 <HAL_PCD_SuspendCallback+0x30>)
800df0e: 691b ldr r3, [r3, #16]
800df10: 4a03 ldr r2, [pc, #12] @ (800df20 <HAL_PCD_SuspendCallback+0x30>)
800df12: f043 0306 orr.w r3, r3, #6
800df16: 6113 str r3, [r2, #16]
}
/* USER CODE END 2 */
}
800df18: bf00 nop
800df1a: 3708 adds r7, #8
800df1c: 46bd mov sp, r7
800df1e: bd80 pop {r7, pc}
800df20: e000ed00 .word 0xe000ed00
0800df24 <HAL_PCD_ResumeCallback>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#else
void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800df24: b580 push {r7, lr}
800df26: b082 sub sp, #8
800df28: af00 add r7, sp, #0
800df2a: 6078 str r0, [r7, #4]
/* USER CODE BEGIN 3 */
/* USER CODE END 3 */
USBD_LL_Resume((USBD_HandleTypeDef*)hpcd->pData);
800df2c: 687b ldr r3, [r7, #4]
800df2e: f8d3 32d4 ldr.w r3, [r3, #724] @ 0x2d4
800df32: 4618 mov r0, r3
800df34: f7fe fe8e bl 800cc54 <USBD_LL_Resume>
}
800df38: bf00 nop
800df3a: 3708 adds r7, #8
800df3c: 46bd mov sp, r7
800df3e: bd80 pop {r7, pc}
0800df40 <USBD_LL_Init>:
* @brief Initializes the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev)
{
800df40: b580 push {r7, lr}
800df42: b082 sub sp, #8
800df44: af00 add r7, sp, #0
800df46: 6078 str r0, [r7, #4]
/* Init USB Ip. */
/* Link the driver to the stack. */
hpcd_USB_FS.pData = pdev;
800df48: 4a28 ldr r2, [pc, #160] @ (800dfec <USBD_LL_Init+0xac>)
800df4a: 687b ldr r3, [r7, #4]
800df4c: f8c2 32d4 str.w r3, [r2, #724] @ 0x2d4
pdev->pData = &hpcd_USB_FS;
800df50: 687b ldr r3, [r7, #4]
800df52: 4a26 ldr r2, [pc, #152] @ (800dfec <USBD_LL_Init+0xac>)
800df54: f8c3 22c0 str.w r2, [r3, #704] @ 0x2c0
hpcd_USB_FS.Instance = USB;
800df58: 4b24 ldr r3, [pc, #144] @ (800dfec <USBD_LL_Init+0xac>)
800df5a: 4a25 ldr r2, [pc, #148] @ (800dff0 <USBD_LL_Init+0xb0>)
800df5c: 601a str r2, [r3, #0]
hpcd_USB_FS.Init.dev_endpoints = 8;
800df5e: 4b23 ldr r3, [pc, #140] @ (800dfec <USBD_LL_Init+0xac>)
800df60: 2208 movs r2, #8
800df62: 711a strb r2, [r3, #4]
hpcd_USB_FS.Init.speed = PCD_SPEED_FULL;
800df64: 4b21 ldr r3, [pc, #132] @ (800dfec <USBD_LL_Init+0xac>)
800df66: 2202 movs r2, #2
800df68: 719a strb r2, [r3, #6]
hpcd_USB_FS.Init.low_power_enable = DISABLE;
800df6a: 4b20 ldr r3, [pc, #128] @ (800dfec <USBD_LL_Init+0xac>)
800df6c: 2200 movs r2, #0
800df6e: 729a strb r2, [r3, #10]
hpcd_USB_FS.Init.lpm_enable = DISABLE;
800df70: 4b1e ldr r3, [pc, #120] @ (800dfec <USBD_LL_Init+0xac>)
800df72: 2200 movs r2, #0
800df74: 72da strb r2, [r3, #11]
hpcd_USB_FS.Init.battery_charging_enable = DISABLE;
800df76: 4b1d ldr r3, [pc, #116] @ (800dfec <USBD_LL_Init+0xac>)
800df78: 2200 movs r2, #0
800df7a: 731a strb r2, [r3, #12]
if (HAL_PCD_Init(&hpcd_USB_FS) != HAL_OK)
800df7c: 481b ldr r0, [pc, #108] @ (800dfec <USBD_LL_Init+0xac>)
800df7e: f7f8 faf0 bl 8006562 <HAL_PCD_Init>
800df82: 4603 mov r3, r0
800df84: 2b00 cmp r3, #0
800df86: d001 beq.n 800df8c <USBD_LL_Init+0x4c>
{
Error_Handler( );
800df88: f7f5 fb20 bl 80035cc <Error_Handler>
HAL_PCD_RegisterDataInStageCallback(&hpcd_USB_FS, PCD_DataInStageCallback);
HAL_PCD_RegisterIsoOutIncpltCallback(&hpcd_USB_FS, PCD_ISOOUTIncompleteCallback);
HAL_PCD_RegisterIsoInIncpltCallback(&hpcd_USB_FS, PCD_ISOINIncompleteCallback);
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
/* USER CODE BEGIN EndPoint_Configuration */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x18);
800df8c: 687b ldr r3, [r7, #4]
800df8e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800df92: 2318 movs r3, #24
800df94: 2200 movs r2, #0
800df96: 2100 movs r1, #0
800df98: f7fa f801 bl 8007f9e <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x58);
800df9c: 687b ldr r3, [r7, #4]
800df9e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800dfa2: 2358 movs r3, #88 @ 0x58
800dfa4: 2200 movs r2, #0
800dfa6: 2180 movs r1, #128 @ 0x80
800dfa8: f7f9 fff9 bl 8007f9e <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration */
/* USER CODE BEGIN EndPoint_Configuration_CDC */
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x81 , PCD_SNG_BUF, 0xC0);
800dfac: 687b ldr r3, [r7, #4]
800dfae: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800dfb2: 23c0 movs r3, #192 @ 0xc0
800dfb4: 2200 movs r2, #0
800dfb6: 2181 movs r1, #129 @ 0x81
800dfb8: f7f9 fff1 bl 8007f9e <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x01 , PCD_SNG_BUF, 0x110);
800dfbc: 687b ldr r3, [r7, #4]
800dfbe: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800dfc2: f44f 7388 mov.w r3, #272 @ 0x110
800dfc6: 2200 movs r2, #0
800dfc8: 2101 movs r1, #1
800dfca: f7f9 ffe8 bl 8007f9e <HAL_PCDEx_PMAConfig>
HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x82 , PCD_SNG_BUF, 0x100);
800dfce: 687b ldr r3, [r7, #4]
800dfd0: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800dfd4: f44f 7380 mov.w r3, #256 @ 0x100
800dfd8: 2200 movs r2, #0
800dfda: 2182 movs r1, #130 @ 0x82
800dfdc: f7f9 ffdf bl 8007f9e <HAL_PCDEx_PMAConfig>
/* USER CODE END EndPoint_Configuration_CDC */
return USBD_OK;
800dfe0: 2300 movs r3, #0
}
800dfe2: 4618 mov r0, r3
800dfe4: 3708 adds r7, #8
800dfe6: 46bd mov sp, r7
800dfe8: bd80 pop {r7, pc}
800dfea: bf00 nop
800dfec: 20001264 .word 0x20001264
800dff0: 40005c00 .word 0x40005c00
0800dff4 <USBD_LL_Start>:
* @brief Starts the low level portion of the device driver.
* @param pdev: Device handle
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Start(USBD_HandleTypeDef *pdev)
{
800dff4: b580 push {r7, lr}
800dff6: b084 sub sp, #16
800dff8: af00 add r7, sp, #0
800dffa: 6078 str r0, [r7, #4]
HAL_StatusTypeDef hal_status = HAL_OK;
800dffc: 2300 movs r3, #0
800dffe: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e000: 2300 movs r3, #0
800e002: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_Start(pdev->pData);
800e004: 687b ldr r3, [r7, #4]
800e006: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e00a: 4618 mov r0, r3
800e00c: f7f8 fb9f bl 800674e <HAL_PCD_Start>
800e010: 4603 mov r3, r0
800e012: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e014: 7bfb ldrb r3, [r7, #15]
800e016: 4618 mov r0, r3
800e018: f000 f94e bl 800e2b8 <USBD_Get_USB_Status>
800e01c: 4603 mov r3, r0
800e01e: 73bb strb r3, [r7, #14]
return usb_status;
800e020: 7bbb ldrb r3, [r7, #14]
}
800e022: 4618 mov r0, r3
800e024: 3710 adds r7, #16
800e026: 46bd mov sp, r7
800e028: bd80 pop {r7, pc}
0800e02a <USBD_LL_OpenEP>:
* @param ep_type: Endpoint type
* @param ep_mps: Endpoint max packet size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_OpenEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t ep_type, uint16_t ep_mps)
{
800e02a: b580 push {r7, lr}
800e02c: b084 sub sp, #16
800e02e: af00 add r7, sp, #0
800e030: 6078 str r0, [r7, #4]
800e032: 4608 mov r0, r1
800e034: 4611 mov r1, r2
800e036: 461a mov r2, r3
800e038: 4603 mov r3, r0
800e03a: 70fb strb r3, [r7, #3]
800e03c: 460b mov r3, r1
800e03e: 70bb strb r3, [r7, #2]
800e040: 4613 mov r3, r2
800e042: 803b strh r3, [r7, #0]
HAL_StatusTypeDef hal_status = HAL_OK;
800e044: 2300 movs r3, #0
800e046: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e048: 2300 movs r3, #0
800e04a: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Open(pdev->pData, ep_addr, ep_mps, ep_type);
800e04c: 687b ldr r3, [r7, #4]
800e04e: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e052: 78bb ldrb r3, [r7, #2]
800e054: 883a ldrh r2, [r7, #0]
800e056: 78f9 ldrb r1, [r7, #3]
800e058: f7f8 fcf3 bl 8006a42 <HAL_PCD_EP_Open>
800e05c: 4603 mov r3, r0
800e05e: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e060: 7bfb ldrb r3, [r7, #15]
800e062: 4618 mov r0, r3
800e064: f000 f928 bl 800e2b8 <USBD_Get_USB_Status>
800e068: 4603 mov r3, r0
800e06a: 73bb strb r3, [r7, #14]
return usb_status;
800e06c: 7bbb ldrb r3, [r7, #14]
}
800e06e: 4618 mov r0, r3
800e070: 3710 adds r7, #16
800e072: 46bd mov sp, r7
800e074: bd80 pop {r7, pc}
0800e076 <USBD_LL_CloseEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_CloseEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e076: b580 push {r7, lr}
800e078: b084 sub sp, #16
800e07a: af00 add r7, sp, #0
800e07c: 6078 str r0, [r7, #4]
800e07e: 460b mov r3, r1
800e080: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e082: 2300 movs r3, #0
800e084: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e086: 2300 movs r3, #0
800e088: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_Close(pdev->pData, ep_addr);
800e08a: 687b ldr r3, [r7, #4]
800e08c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e090: 78fa ldrb r2, [r7, #3]
800e092: 4611 mov r1, r2
800e094: 4618 mov r0, r3
800e096: f7f8 fd31 bl 8006afc <HAL_PCD_EP_Close>
800e09a: 4603 mov r3, r0
800e09c: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e09e: 7bfb ldrb r3, [r7, #15]
800e0a0: 4618 mov r0, r3
800e0a2: f000 f909 bl 800e2b8 <USBD_Get_USB_Status>
800e0a6: 4603 mov r3, r0
800e0a8: 73bb strb r3, [r7, #14]
return usb_status;
800e0aa: 7bbb ldrb r3, [r7, #14]
}
800e0ac: 4618 mov r0, r3
800e0ae: 3710 adds r7, #16
800e0b0: 46bd mov sp, r7
800e0b2: bd80 pop {r7, pc}
0800e0b4 <USBD_LL_StallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_StallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e0b4: b580 push {r7, lr}
800e0b6: b084 sub sp, #16
800e0b8: af00 add r7, sp, #0
800e0ba: 6078 str r0, [r7, #4]
800e0bc: 460b mov r3, r1
800e0be: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e0c0: 2300 movs r3, #0
800e0c2: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e0c4: 2300 movs r3, #0
800e0c6: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_SetStall(pdev->pData, ep_addr);
800e0c8: 687b ldr r3, [r7, #4]
800e0ca: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e0ce: 78fa ldrb r2, [r7, #3]
800e0d0: 4611 mov r1, r2
800e0d2: 4618 mov r0, r3
800e0d4: f7f8 fdd9 bl 8006c8a <HAL_PCD_EP_SetStall>
800e0d8: 4603 mov r3, r0
800e0da: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e0dc: 7bfb ldrb r3, [r7, #15]
800e0de: 4618 mov r0, r3
800e0e0: f000 f8ea bl 800e2b8 <USBD_Get_USB_Status>
800e0e4: 4603 mov r3, r0
800e0e6: 73bb strb r3, [r7, #14]
return usb_status;
800e0e8: 7bbb ldrb r3, [r7, #14]
}
800e0ea: 4618 mov r0, r3
800e0ec: 3710 adds r7, #16
800e0ee: 46bd mov sp, r7
800e0f0: bd80 pop {r7, pc}
0800e0f2 <USBD_LL_ClearStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_ClearStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e0f2: b580 push {r7, lr}
800e0f4: b084 sub sp, #16
800e0f6: af00 add r7, sp, #0
800e0f8: 6078 str r0, [r7, #4]
800e0fa: 460b mov r3, r1
800e0fc: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e0fe: 2300 movs r3, #0
800e100: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e102: 2300 movs r3, #0
800e104: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_EP_ClrStall(pdev->pData, ep_addr);
800e106: 687b ldr r3, [r7, #4]
800e108: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e10c: 78fa ldrb r2, [r7, #3]
800e10e: 4611 mov r1, r2
800e110: 4618 mov r0, r3
800e112: f7f8 fe1a bl 8006d4a <HAL_PCD_EP_ClrStall>
800e116: 4603 mov r3, r0
800e118: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e11a: 7bfb ldrb r3, [r7, #15]
800e11c: 4618 mov r0, r3
800e11e: f000 f8cb bl 800e2b8 <USBD_Get_USB_Status>
800e122: 4603 mov r3, r0
800e124: 73bb strb r3, [r7, #14]
return usb_status;
800e126: 7bbb ldrb r3, [r7, #14]
}
800e128: 4618 mov r0, r3
800e12a: 3710 adds r7, #16
800e12c: 46bd mov sp, r7
800e12e: bd80 pop {r7, pc}
0800e130 <USBD_LL_IsStallEP>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Stall (1: Yes, 0: No)
*/
uint8_t USBD_LL_IsStallEP(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e130: b480 push {r7}
800e132: b085 sub sp, #20
800e134: af00 add r7, sp, #0
800e136: 6078 str r0, [r7, #4]
800e138: 460b mov r3, r1
800e13a: 70fb strb r3, [r7, #3]
PCD_HandleTypeDef *hpcd = (PCD_HandleTypeDef*) pdev->pData;
800e13c: 687b ldr r3, [r7, #4]
800e13e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e142: 60fb str r3, [r7, #12]
if((ep_addr & 0x80) == 0x80)
800e144: f997 3003 ldrsb.w r3, [r7, #3]
800e148: 2b00 cmp r3, #0
800e14a: da0b bge.n 800e164 <USBD_LL_IsStallEP+0x34>
{
return hpcd->IN_ep[ep_addr & 0x7F].is_stall;
800e14c: 78fb ldrb r3, [r7, #3]
800e14e: f003 027f and.w r2, r3, #127 @ 0x7f
800e152: 68f9 ldr r1, [r7, #12]
800e154: 4613 mov r3, r2
800e156: 009b lsls r3, r3, #2
800e158: 4413 add r3, r2
800e15a: 00db lsls r3, r3, #3
800e15c: 440b add r3, r1
800e15e: 3312 adds r3, #18
800e160: 781b ldrb r3, [r3, #0]
800e162: e00b b.n 800e17c <USBD_LL_IsStallEP+0x4c>
}
else
{
return hpcd->OUT_ep[ep_addr & 0x7F].is_stall;
800e164: 78fb ldrb r3, [r7, #3]
800e166: f003 027f and.w r2, r3, #127 @ 0x7f
800e16a: 68f9 ldr r1, [r7, #12]
800e16c: 4613 mov r3, r2
800e16e: 009b lsls r3, r3, #2
800e170: 4413 add r3, r2
800e172: 00db lsls r3, r3, #3
800e174: 440b add r3, r1
800e176: f503 73a9 add.w r3, r3, #338 @ 0x152
800e17a: 781b ldrb r3, [r3, #0]
}
}
800e17c: 4618 mov r0, r3
800e17e: 3714 adds r7, #20
800e180: 46bd mov sp, r7
800e182: bc80 pop {r7}
800e184: 4770 bx lr
0800e186 <USBD_LL_SetUSBAddress>:
* @param pdev: Device handle
* @param dev_addr: Device address
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_SetUSBAddress(USBD_HandleTypeDef *pdev, uint8_t dev_addr)
{
800e186: b580 push {r7, lr}
800e188: b084 sub sp, #16
800e18a: af00 add r7, sp, #0
800e18c: 6078 str r0, [r7, #4]
800e18e: 460b mov r3, r1
800e190: 70fb strb r3, [r7, #3]
HAL_StatusTypeDef hal_status = HAL_OK;
800e192: 2300 movs r3, #0
800e194: 73fb strb r3, [r7, #15]
USBD_StatusTypeDef usb_status = USBD_OK;
800e196: 2300 movs r3, #0
800e198: 73bb strb r3, [r7, #14]
hal_status = HAL_PCD_SetAddress(pdev->pData, dev_addr);
800e19a: 687b ldr r3, [r7, #4]
800e19c: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e1a0: 78fa ldrb r2, [r7, #3]
800e1a2: 4611 mov r1, r2
800e1a4: 4618 mov r0, r3
800e1a6: f7f8 fc28 bl 80069fa <HAL_PCD_SetAddress>
800e1aa: 4603 mov r3, r0
800e1ac: 73fb strb r3, [r7, #15]
usb_status = USBD_Get_USB_Status(hal_status);
800e1ae: 7bfb ldrb r3, [r7, #15]
800e1b0: 4618 mov r0, r3
800e1b2: f000 f881 bl 800e2b8 <USBD_Get_USB_Status>
800e1b6: 4603 mov r3, r0
800e1b8: 73bb strb r3, [r7, #14]
return usb_status;
800e1ba: 7bbb ldrb r3, [r7, #14]
}
800e1bc: 4618 mov r0, r3
800e1be: 3710 adds r7, #16
800e1c0: 46bd mov sp, r7
800e1c2: bd80 pop {r7, pc}
0800e1c4 <USBD_LL_Transmit>:
* @param pbuf: Pointer to data to be sent
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_Transmit(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800e1c4: b580 push {r7, lr}
800e1c6: b086 sub sp, #24
800e1c8: af00 add r7, sp, #0
800e1ca: 60f8 str r0, [r7, #12]
800e1cc: 607a str r2, [r7, #4]
800e1ce: 461a mov r2, r3
800e1d0: 460b mov r3, r1
800e1d2: 72fb strb r3, [r7, #11]
800e1d4: 4613 mov r3, r2
800e1d6: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800e1d8: 2300 movs r3, #0
800e1da: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800e1dc: 2300 movs r3, #0
800e1de: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Transmit(pdev->pData, ep_addr, pbuf, size);
800e1e0: 68fb ldr r3, [r7, #12]
800e1e2: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e1e6: 893b ldrh r3, [r7, #8]
800e1e8: 7af9 ldrb r1, [r7, #11]
800e1ea: 687a ldr r2, [r7, #4]
800e1ec: f7f8 fd16 bl 8006c1c <HAL_PCD_EP_Transmit>
800e1f0: 4603 mov r3, r0
800e1f2: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800e1f4: 7dfb ldrb r3, [r7, #23]
800e1f6: 4618 mov r0, r3
800e1f8: f000 f85e bl 800e2b8 <USBD_Get_USB_Status>
800e1fc: 4603 mov r3, r0
800e1fe: 75bb strb r3, [r7, #22]
return usb_status;
800e200: 7dbb ldrb r3, [r7, #22]
}
800e202: 4618 mov r0, r3
800e204: 3718 adds r7, #24
800e206: 46bd mov sp, r7
800e208: bd80 pop {r7, pc}
0800e20a <USBD_LL_PrepareReceive>:
* @param pbuf: Pointer to data to be received
* @param size: Data size
* @retval USBD status
*/
USBD_StatusTypeDef USBD_LL_PrepareReceive(USBD_HandleTypeDef *pdev, uint8_t ep_addr, uint8_t *pbuf, uint16_t size)
{
800e20a: b580 push {r7, lr}
800e20c: b086 sub sp, #24
800e20e: af00 add r7, sp, #0
800e210: 60f8 str r0, [r7, #12]
800e212: 607a str r2, [r7, #4]
800e214: 461a mov r2, r3
800e216: 460b mov r3, r1
800e218: 72fb strb r3, [r7, #11]
800e21a: 4613 mov r3, r2
800e21c: 813b strh r3, [r7, #8]
HAL_StatusTypeDef hal_status = HAL_OK;
800e21e: 2300 movs r3, #0
800e220: 75fb strb r3, [r7, #23]
USBD_StatusTypeDef usb_status = USBD_OK;
800e222: 2300 movs r3, #0
800e224: 75bb strb r3, [r7, #22]
hal_status = HAL_PCD_EP_Receive(pdev->pData, ep_addr, pbuf, size);
800e226: 68fb ldr r3, [r7, #12]
800e228: f8d3 02c0 ldr.w r0, [r3, #704] @ 0x2c0
800e22c: 893b ldrh r3, [r7, #8]
800e22e: 7af9 ldrb r1, [r7, #11]
800e230: 687a ldr r2, [r7, #4]
800e232: f7f8 fcab bl 8006b8c <HAL_PCD_EP_Receive>
800e236: 4603 mov r3, r0
800e238: 75fb strb r3, [r7, #23]
usb_status = USBD_Get_USB_Status(hal_status);
800e23a: 7dfb ldrb r3, [r7, #23]
800e23c: 4618 mov r0, r3
800e23e: f000 f83b bl 800e2b8 <USBD_Get_USB_Status>
800e242: 4603 mov r3, r0
800e244: 75bb strb r3, [r7, #22]
return usb_status;
800e246: 7dbb ldrb r3, [r7, #22]
}
800e248: 4618 mov r0, r3
800e24a: 3718 adds r7, #24
800e24c: 46bd mov sp, r7
800e24e: bd80 pop {r7, pc}
0800e250 <USBD_LL_GetRxDataSize>:
* @param pdev: Device handle
* @param ep_addr: Endpoint number
* @retval Received Data Size
*/
uint32_t USBD_LL_GetRxDataSize(USBD_HandleTypeDef *pdev, uint8_t ep_addr)
{
800e250: b580 push {r7, lr}
800e252: b082 sub sp, #8
800e254: af00 add r7, sp, #0
800e256: 6078 str r0, [r7, #4]
800e258: 460b mov r3, r1
800e25a: 70fb strb r3, [r7, #3]
return HAL_PCD_EP_GetRxCount((PCD_HandleTypeDef*) pdev->pData, ep_addr);
800e25c: 687b ldr r3, [r7, #4]
800e25e: f8d3 32c0 ldr.w r3, [r3, #704] @ 0x2c0
800e262: 78fa ldrb r2, [r7, #3]
800e264: 4611 mov r1, r2
800e266: 4618 mov r0, r3
800e268: f7f8 fcc1 bl 8006bee <HAL_PCD_EP_GetRxCount>
800e26c: 4603 mov r3, r0
}
800e26e: 4618 mov r0, r3
800e270: 3708 adds r7, #8
800e272: 46bd mov sp, r7
800e274: bd80 pop {r7, pc}
...
0800e278 <USBD_static_malloc>:
* @brief Static single allocation.
* @param size: Size of allocated memory
* @retval None
*/
void *USBD_static_malloc(uint32_t size)
{
800e278: b480 push {r7}
800e27a: b083 sub sp, #12
800e27c: af00 add r7, sp, #0
800e27e: 6078 str r0, [r7, #4]
static uint32_t mem[(sizeof(USBD_CDC_HandleTypeDef)/4)+1];/* On 32-bit boundary */
return mem;
800e280: 4b02 ldr r3, [pc, #8] @ (800e28c <USBD_static_malloc+0x14>)
}
800e282: 4618 mov r0, r3
800e284: 370c adds r7, #12
800e286: 46bd mov sp, r7
800e288: bc80 pop {r7}
800e28a: 4770 bx lr
800e28c: 2000153c .word 0x2000153c
0800e290 <USBD_static_free>:
* @brief Dummy memory free
* @param p: Pointer to allocated memory address
* @retval None
*/
void USBD_static_free(void *p)
{
800e290: b480 push {r7}
800e292: b083 sub sp, #12
800e294: af00 add r7, sp, #0
800e296: 6078 str r0, [r7, #4]
}
800e298: bf00 nop
800e29a: 370c adds r7, #12
800e29c: 46bd mov sp, r7
800e29e: bc80 pop {r7}
800e2a0: 4770 bx lr
0800e2a2 <HAL_PCDEx_SetConnectionState>:
#if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
static void PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#else
void HAL_PCDEx_SetConnectionState(PCD_HandleTypeDef *hpcd, uint8_t state)
#endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
{
800e2a2: b480 push {r7}
800e2a4: b083 sub sp, #12
800e2a6: af00 add r7, sp, #0
800e2a8: 6078 str r0, [r7, #4]
800e2aa: 460b mov r3, r1
800e2ac: 70fb strb r3, [r7, #3]
{
/* Configure High connection state. */
}
/* USER CODE END 6 */
}
800e2ae: bf00 nop
800e2b0: 370c adds r7, #12
800e2b2: 46bd mov sp, r7
800e2b4: bc80 pop {r7}
800e2b6: 4770 bx lr
0800e2b8 <USBD_Get_USB_Status>:
* @brief Returns the USB status depending on the HAL status:
* @param hal_status: HAL status
* @retval USB status
*/
USBD_StatusTypeDef USBD_Get_USB_Status(HAL_StatusTypeDef hal_status)
{
800e2b8: b480 push {r7}
800e2ba: b085 sub sp, #20
800e2bc: af00 add r7, sp, #0
800e2be: 4603 mov r3, r0
800e2c0: 71fb strb r3, [r7, #7]
USBD_StatusTypeDef usb_status = USBD_OK;
800e2c2: 2300 movs r3, #0
800e2c4: 73fb strb r3, [r7, #15]
switch (hal_status)
800e2c6: 79fb ldrb r3, [r7, #7]
800e2c8: 2b03 cmp r3, #3
800e2ca: d817 bhi.n 800e2fc <USBD_Get_USB_Status+0x44>
800e2cc: a201 add r2, pc, #4 @ (adr r2, 800e2d4 <USBD_Get_USB_Status+0x1c>)
800e2ce: f852 f023 ldr.w pc, [r2, r3, lsl #2]
800e2d2: bf00 nop
800e2d4: 0800e2e5 .word 0x0800e2e5
800e2d8: 0800e2eb .word 0x0800e2eb
800e2dc: 0800e2f1 .word 0x0800e2f1
800e2e0: 0800e2f7 .word 0x0800e2f7
{
case HAL_OK :
usb_status = USBD_OK;
800e2e4: 2300 movs r3, #0
800e2e6: 73fb strb r3, [r7, #15]
break;
800e2e8: e00b b.n 800e302 <USBD_Get_USB_Status+0x4a>
case HAL_ERROR :
usb_status = USBD_FAIL;
800e2ea: 2302 movs r3, #2
800e2ec: 73fb strb r3, [r7, #15]
break;
800e2ee: e008 b.n 800e302 <USBD_Get_USB_Status+0x4a>
case HAL_BUSY :
usb_status = USBD_BUSY;
800e2f0: 2301 movs r3, #1
800e2f2: 73fb strb r3, [r7, #15]
break;
800e2f4: e005 b.n 800e302 <USBD_Get_USB_Status+0x4a>
case HAL_TIMEOUT :
usb_status = USBD_FAIL;
800e2f6: 2302 movs r3, #2
800e2f8: 73fb strb r3, [r7, #15]
break;
800e2fa: e002 b.n 800e302 <USBD_Get_USB_Status+0x4a>
default :
usb_status = USBD_FAIL;
800e2fc: 2302 movs r3, #2
800e2fe: 73fb strb r3, [r7, #15]
break;
800e300: bf00 nop
}
return usb_status;
800e302: 7bfb ldrb r3, [r7, #15]
}
800e304: 4618 mov r0, r3
800e306: 3714 adds r7, #20
800e308: 46bd mov sp, r7
800e30a: bc80 pop {r7}
800e30c: 4770 bx lr
800e30e: bf00 nop
0800e310 <siprintf>:
800e310: b40e push {r1, r2, r3}
800e312: f06f 4100 mvn.w r1, #2147483648 @ 0x80000000
800e316: b510 push {r4, lr}
800e318: 2400 movs r4, #0
800e31a: b09d sub sp, #116 @ 0x74
800e31c: ab1f add r3, sp, #124 @ 0x7c
800e31e: 9002 str r0, [sp, #8]
800e320: 9006 str r0, [sp, #24]
800e322: 9107 str r1, [sp, #28]
800e324: 9104 str r1, [sp, #16]
800e326: 4809 ldr r0, [pc, #36] @ (800e34c <siprintf+0x3c>)
800e328: 4909 ldr r1, [pc, #36] @ (800e350 <siprintf+0x40>)
800e32a: f853 2b04 ldr.w r2, [r3], #4
800e32e: 9105 str r1, [sp, #20]
800e330: 6800 ldr r0, [r0, #0]
800e332: a902 add r1, sp, #8
800e334: 9301 str r3, [sp, #4]
800e336: 941b str r4, [sp, #108] @ 0x6c
800e338: f000 f992 bl 800e660 <_svfiprintf_r>
800e33c: 9b02 ldr r3, [sp, #8]
800e33e: 701c strb r4, [r3, #0]
800e340: b01d add sp, #116 @ 0x74
800e342: e8bd 4010 ldmia.w sp!, {r4, lr}
800e346: b003 add sp, #12
800e348: 4770 bx lr
800e34a: bf00 nop
800e34c: 2000018c .word 0x2000018c
800e350: ffff0208 .word 0xffff0208
0800e354 <memset>:
800e354: 4603 mov r3, r0
800e356: 4402 add r2, r0
800e358: 4293 cmp r3, r2
800e35a: d100 bne.n 800e35e <memset+0xa>
800e35c: 4770 bx lr
800e35e: f803 1b01 strb.w r1, [r3], #1
800e362: e7f9 b.n 800e358 <memset+0x4>
0800e364 <__errno>:
800e364: 4b01 ldr r3, [pc, #4] @ (800e36c <__errno+0x8>)
800e366: 6818 ldr r0, [r3, #0]
800e368: 4770 bx lr
800e36a: bf00 nop
800e36c: 2000018c .word 0x2000018c
0800e370 <__libc_init_array>:
800e370: b570 push {r4, r5, r6, lr}
800e372: 2600 movs r6, #0
800e374: 4d0c ldr r5, [pc, #48] @ (800e3a8 <__libc_init_array+0x38>)
800e376: 4c0d ldr r4, [pc, #52] @ (800e3ac <__libc_init_array+0x3c>)
800e378: 1b64 subs r4, r4, r5
800e37a: 10a4 asrs r4, r4, #2
800e37c: 42a6 cmp r6, r4
800e37e: d109 bne.n 800e394 <__libc_init_array+0x24>
800e380: f000 fc76 bl 800ec70 <_init>
800e384: 2600 movs r6, #0
800e386: 4d0a ldr r5, [pc, #40] @ (800e3b0 <__libc_init_array+0x40>)
800e388: 4c0a ldr r4, [pc, #40] @ (800e3b4 <__libc_init_array+0x44>)
800e38a: 1b64 subs r4, r4, r5
800e38c: 10a4 asrs r4, r4, #2
800e38e: 42a6 cmp r6, r4
800e390: d105 bne.n 800e39e <__libc_init_array+0x2e>
800e392: bd70 pop {r4, r5, r6, pc}
800e394: f855 3b04 ldr.w r3, [r5], #4
800e398: 4798 blx r3
800e39a: 3601 adds r6, #1
800e39c: e7ee b.n 800e37c <__libc_init_array+0xc>
800e39e: f855 3b04 ldr.w r3, [r5], #4
800e3a2: 4798 blx r3
800e3a4: 3601 adds r6, #1
800e3a6: e7f2 b.n 800e38e <__libc_init_array+0x1e>
800e3a8: 0800f47c .word 0x0800f47c
800e3ac: 0800f47c .word 0x0800f47c
800e3b0: 0800f47c .word 0x0800f47c
800e3b4: 0800f480 .word 0x0800f480
0800e3b8 <__retarget_lock_acquire_recursive>:
800e3b8: 4770 bx lr
0800e3ba <__retarget_lock_release_recursive>:
800e3ba: 4770 bx lr
0800e3bc <_free_r>:
800e3bc: b538 push {r3, r4, r5, lr}
800e3be: 4605 mov r5, r0
800e3c0: 2900 cmp r1, #0
800e3c2: d040 beq.n 800e446 <_free_r+0x8a>
800e3c4: f851 3c04 ldr.w r3, [r1, #-4]
800e3c8: 1f0c subs r4, r1, #4
800e3ca: 2b00 cmp r3, #0
800e3cc: bfb8 it lt
800e3ce: 18e4 addlt r4, r4, r3
800e3d0: f000 f8de bl 800e590 <__malloc_lock>
800e3d4: 4a1c ldr r2, [pc, #112] @ (800e448 <_free_r+0x8c>)
800e3d6: 6813 ldr r3, [r2, #0]
800e3d8: b933 cbnz r3, 800e3e8 <_free_r+0x2c>
800e3da: 6063 str r3, [r4, #4]
800e3dc: 6014 str r4, [r2, #0]
800e3de: 4628 mov r0, r5
800e3e0: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
800e3e4: f000 b8da b.w 800e59c <__malloc_unlock>
800e3e8: 42a3 cmp r3, r4
800e3ea: d908 bls.n 800e3fe <_free_r+0x42>
800e3ec: 6820 ldr r0, [r4, #0]
800e3ee: 1821 adds r1, r4, r0
800e3f0: 428b cmp r3, r1
800e3f2: bf01 itttt eq
800e3f4: 6819 ldreq r1, [r3, #0]
800e3f6: 685b ldreq r3, [r3, #4]
800e3f8: 1809 addeq r1, r1, r0
800e3fa: 6021 streq r1, [r4, #0]
800e3fc: e7ed b.n 800e3da <_free_r+0x1e>
800e3fe: 461a mov r2, r3
800e400: 685b ldr r3, [r3, #4]
800e402: b10b cbz r3, 800e408 <_free_r+0x4c>
800e404: 42a3 cmp r3, r4
800e406: d9fa bls.n 800e3fe <_free_r+0x42>
800e408: 6811 ldr r1, [r2, #0]
800e40a: 1850 adds r0, r2, r1
800e40c: 42a0 cmp r0, r4
800e40e: d10b bne.n 800e428 <_free_r+0x6c>
800e410: 6820 ldr r0, [r4, #0]
800e412: 4401 add r1, r0
800e414: 1850 adds r0, r2, r1
800e416: 4283 cmp r3, r0
800e418: 6011 str r1, [r2, #0]
800e41a: d1e0 bne.n 800e3de <_free_r+0x22>
800e41c: 6818 ldr r0, [r3, #0]
800e41e: 685b ldr r3, [r3, #4]
800e420: 4408 add r0, r1
800e422: 6010 str r0, [r2, #0]
800e424: 6053 str r3, [r2, #4]
800e426: e7da b.n 800e3de <_free_r+0x22>
800e428: d902 bls.n 800e430 <_free_r+0x74>
800e42a: 230c movs r3, #12
800e42c: 602b str r3, [r5, #0]
800e42e: e7d6 b.n 800e3de <_free_r+0x22>
800e430: 6820 ldr r0, [r4, #0]
800e432: 1821 adds r1, r4, r0
800e434: 428b cmp r3, r1
800e436: bf01 itttt eq
800e438: 6819 ldreq r1, [r3, #0]
800e43a: 685b ldreq r3, [r3, #4]
800e43c: 1809 addeq r1, r1, r0
800e43e: 6021 streq r1, [r4, #0]
800e440: 6063 str r3, [r4, #4]
800e442: 6054 str r4, [r2, #4]
800e444: e7cb b.n 800e3de <_free_r+0x22>
800e446: bd38 pop {r3, r4, r5, pc}
800e448: 200018a0 .word 0x200018a0
0800e44c <sbrk_aligned>:
800e44c: b570 push {r4, r5, r6, lr}
800e44e: 4e0f ldr r6, [pc, #60] @ (800e48c <sbrk_aligned+0x40>)
800e450: 460c mov r4, r1
800e452: 6831 ldr r1, [r6, #0]
800e454: 4605 mov r5, r0
800e456: b911 cbnz r1, 800e45e <sbrk_aligned+0x12>
800e458: f000 fba8 bl 800ebac <_sbrk_r>
800e45c: 6030 str r0, [r6, #0]
800e45e: 4621 mov r1, r4
800e460: 4628 mov r0, r5
800e462: f000 fba3 bl 800ebac <_sbrk_r>
800e466: 1c43 adds r3, r0, #1
800e468: d103 bne.n 800e472 <sbrk_aligned+0x26>
800e46a: f04f 34ff mov.w r4, #4294967295
800e46e: 4620 mov r0, r4
800e470: bd70 pop {r4, r5, r6, pc}
800e472: 1cc4 adds r4, r0, #3
800e474: f024 0403 bic.w r4, r4, #3
800e478: 42a0 cmp r0, r4
800e47a: d0f8 beq.n 800e46e <sbrk_aligned+0x22>
800e47c: 1a21 subs r1, r4, r0
800e47e: 4628 mov r0, r5
800e480: f000 fb94 bl 800ebac <_sbrk_r>
800e484: 3001 adds r0, #1
800e486: d1f2 bne.n 800e46e <sbrk_aligned+0x22>
800e488: e7ef b.n 800e46a <sbrk_aligned+0x1e>
800e48a: bf00 nop
800e48c: 2000189c .word 0x2000189c
0800e490 <_malloc_r>:
800e490: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
800e494: 1ccd adds r5, r1, #3
800e496: f025 0503 bic.w r5, r5, #3
800e49a: 3508 adds r5, #8
800e49c: 2d0c cmp r5, #12
800e49e: bf38 it cc
800e4a0: 250c movcc r5, #12
800e4a2: 2d00 cmp r5, #0
800e4a4: 4606 mov r6, r0
800e4a6: db01 blt.n 800e4ac <_malloc_r+0x1c>
800e4a8: 42a9 cmp r1, r5
800e4aa: d904 bls.n 800e4b6 <_malloc_r+0x26>
800e4ac: 230c movs r3, #12
800e4ae: 6033 str r3, [r6, #0]
800e4b0: 2000 movs r0, #0
800e4b2: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
800e4b6: f8df 80d4 ldr.w r8, [pc, #212] @ 800e58c <_malloc_r+0xfc>
800e4ba: f000 f869 bl 800e590 <__malloc_lock>
800e4be: f8d8 3000 ldr.w r3, [r8]
800e4c2: 461c mov r4, r3
800e4c4: bb44 cbnz r4, 800e518 <_malloc_r+0x88>
800e4c6: 4629 mov r1, r5
800e4c8: 4630 mov r0, r6
800e4ca: f7ff ffbf bl 800e44c <sbrk_aligned>
800e4ce: 1c43 adds r3, r0, #1
800e4d0: 4604 mov r4, r0
800e4d2: d158 bne.n 800e586 <_malloc_r+0xf6>
800e4d4: f8d8 4000 ldr.w r4, [r8]
800e4d8: 4627 mov r7, r4
800e4da: 2f00 cmp r7, #0
800e4dc: d143 bne.n 800e566 <_malloc_r+0xd6>
800e4de: 2c00 cmp r4, #0
800e4e0: d04b beq.n 800e57a <_malloc_r+0xea>
800e4e2: 6823 ldr r3, [r4, #0]
800e4e4: 4639 mov r1, r7
800e4e6: 4630 mov r0, r6
800e4e8: eb04 0903 add.w r9, r4, r3
800e4ec: f000 fb5e bl 800ebac <_sbrk_r>
800e4f0: 4581 cmp r9, r0
800e4f2: d142 bne.n 800e57a <_malloc_r+0xea>
800e4f4: 6821 ldr r1, [r4, #0]
800e4f6: 4630 mov r0, r6
800e4f8: 1a6d subs r5, r5, r1
800e4fa: 4629 mov r1, r5
800e4fc: f7ff ffa6 bl 800e44c <sbrk_aligned>
800e500: 3001 adds r0, #1
800e502: d03a beq.n 800e57a <_malloc_r+0xea>
800e504: 6823 ldr r3, [r4, #0]
800e506: 442b add r3, r5
800e508: 6023 str r3, [r4, #0]
800e50a: f8d8 3000 ldr.w r3, [r8]
800e50e: 685a ldr r2, [r3, #4]
800e510: bb62 cbnz r2, 800e56c <_malloc_r+0xdc>
800e512: f8c8 7000 str.w r7, [r8]
800e516: e00f b.n 800e538 <_malloc_r+0xa8>
800e518: 6822 ldr r2, [r4, #0]
800e51a: 1b52 subs r2, r2, r5
800e51c: d420 bmi.n 800e560 <_malloc_r+0xd0>
800e51e: 2a0b cmp r2, #11
800e520: d917 bls.n 800e552 <_malloc_r+0xc2>
800e522: 1961 adds r1, r4, r5
800e524: 42a3 cmp r3, r4
800e526: 6025 str r5, [r4, #0]
800e528: bf18 it ne
800e52a: 6059 strne r1, [r3, #4]
800e52c: 6863 ldr r3, [r4, #4]
800e52e: bf08 it eq
800e530: f8c8 1000 streq.w r1, [r8]
800e534: 5162 str r2, [r4, r5]
800e536: 604b str r3, [r1, #4]
800e538: 4630 mov r0, r6
800e53a: f000 f82f bl 800e59c <__malloc_unlock>
800e53e: f104 000b add.w r0, r4, #11
800e542: 1d23 adds r3, r4, #4
800e544: f020 0007 bic.w r0, r0, #7
800e548: 1ac2 subs r2, r0, r3
800e54a: bf1c itt ne
800e54c: 1a1b subne r3, r3, r0
800e54e: 50a3 strne r3, [r4, r2]
800e550: e7af b.n 800e4b2 <_malloc_r+0x22>
800e552: 6862 ldr r2, [r4, #4]
800e554: 42a3 cmp r3, r4
800e556: bf0c ite eq
800e558: f8c8 2000 streq.w r2, [r8]
800e55c: 605a strne r2, [r3, #4]
800e55e: e7eb b.n 800e538 <_malloc_r+0xa8>
800e560: 4623 mov r3, r4
800e562: 6864 ldr r4, [r4, #4]
800e564: e7ae b.n 800e4c4 <_malloc_r+0x34>
800e566: 463c mov r4, r7
800e568: 687f ldr r7, [r7, #4]
800e56a: e7b6 b.n 800e4da <_malloc_r+0x4a>
800e56c: 461a mov r2, r3
800e56e: 685b ldr r3, [r3, #4]
800e570: 42a3 cmp r3, r4
800e572: d1fb bne.n 800e56c <_malloc_r+0xdc>
800e574: 2300 movs r3, #0
800e576: 6053 str r3, [r2, #4]
800e578: e7de b.n 800e538 <_malloc_r+0xa8>
800e57a: 230c movs r3, #12
800e57c: 4630 mov r0, r6
800e57e: 6033 str r3, [r6, #0]
800e580: f000 f80c bl 800e59c <__malloc_unlock>
800e584: e794 b.n 800e4b0 <_malloc_r+0x20>
800e586: 6005 str r5, [r0, #0]
800e588: e7d6 b.n 800e538 <_malloc_r+0xa8>
800e58a: bf00 nop
800e58c: 200018a0 .word 0x200018a0
0800e590 <__malloc_lock>:
800e590: 4801 ldr r0, [pc, #4] @ (800e598 <__malloc_lock+0x8>)
800e592: f7ff bf11 b.w 800e3b8 <__retarget_lock_acquire_recursive>
800e596: bf00 nop
800e598: 20001898 .word 0x20001898
0800e59c <__malloc_unlock>:
800e59c: 4801 ldr r0, [pc, #4] @ (800e5a4 <__malloc_unlock+0x8>)
800e59e: f7ff bf0c b.w 800e3ba <__retarget_lock_release_recursive>
800e5a2: bf00 nop
800e5a4: 20001898 .word 0x20001898
0800e5a8 <__ssputs_r>:
800e5a8: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e5ac: 461f mov r7, r3
800e5ae: 688e ldr r6, [r1, #8]
800e5b0: 4682 mov sl, r0
800e5b2: 42be cmp r6, r7
800e5b4: 460c mov r4, r1
800e5b6: 4690 mov r8, r2
800e5b8: 680b ldr r3, [r1, #0]
800e5ba: d82d bhi.n 800e618 <__ssputs_r+0x70>
800e5bc: f9b1 200c ldrsh.w r2, [r1, #12]
800e5c0: f412 6f90 tst.w r2, #1152 @ 0x480
800e5c4: d026 beq.n 800e614 <__ssputs_r+0x6c>
800e5c6: 6965 ldr r5, [r4, #20]
800e5c8: 6909 ldr r1, [r1, #16]
800e5ca: eb05 0545 add.w r5, r5, r5, lsl #1
800e5ce: eba3 0901 sub.w r9, r3, r1
800e5d2: eb05 75d5 add.w r5, r5, r5, lsr #31
800e5d6: 1c7b adds r3, r7, #1
800e5d8: 444b add r3, r9
800e5da: 106d asrs r5, r5, #1
800e5dc: 429d cmp r5, r3
800e5de: bf38 it cc
800e5e0: 461d movcc r5, r3
800e5e2: 0553 lsls r3, r2, #21
800e5e4: d527 bpl.n 800e636 <__ssputs_r+0x8e>
800e5e6: 4629 mov r1, r5
800e5e8: f7ff ff52 bl 800e490 <_malloc_r>
800e5ec: 4606 mov r6, r0
800e5ee: b360 cbz r0, 800e64a <__ssputs_r+0xa2>
800e5f0: 464a mov r2, r9
800e5f2: 6921 ldr r1, [r4, #16]
800e5f4: f000 faf8 bl 800ebe8 <memcpy>
800e5f8: 89a3 ldrh r3, [r4, #12]
800e5fa: f423 6390 bic.w r3, r3, #1152 @ 0x480
800e5fe: f043 0380 orr.w r3, r3, #128 @ 0x80
800e602: 81a3 strh r3, [r4, #12]
800e604: 6126 str r6, [r4, #16]
800e606: 444e add r6, r9
800e608: 6026 str r6, [r4, #0]
800e60a: 463e mov r6, r7
800e60c: 6165 str r5, [r4, #20]
800e60e: eba5 0509 sub.w r5, r5, r9
800e612: 60a5 str r5, [r4, #8]
800e614: 42be cmp r6, r7
800e616: d900 bls.n 800e61a <__ssputs_r+0x72>
800e618: 463e mov r6, r7
800e61a: 4632 mov r2, r6
800e61c: 4641 mov r1, r8
800e61e: 6820 ldr r0, [r4, #0]
800e620: f000 faaa bl 800eb78 <memmove>
800e624: 2000 movs r0, #0
800e626: 68a3 ldr r3, [r4, #8]
800e628: 1b9b subs r3, r3, r6
800e62a: 60a3 str r3, [r4, #8]
800e62c: 6823 ldr r3, [r4, #0]
800e62e: 4433 add r3, r6
800e630: 6023 str r3, [r4, #0]
800e632: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e636: 462a mov r2, r5
800e638: f000 fae4 bl 800ec04 <_realloc_r>
800e63c: 4606 mov r6, r0
800e63e: 2800 cmp r0, #0
800e640: d1e0 bne.n 800e604 <__ssputs_r+0x5c>
800e642: 4650 mov r0, sl
800e644: 6921 ldr r1, [r4, #16]
800e646: f7ff feb9 bl 800e3bc <_free_r>
800e64a: 230c movs r3, #12
800e64c: f8ca 3000 str.w r3, [sl]
800e650: 89a3 ldrh r3, [r4, #12]
800e652: f04f 30ff mov.w r0, #4294967295
800e656: f043 0340 orr.w r3, r3, #64 @ 0x40
800e65a: 81a3 strh r3, [r4, #12]
800e65c: e7e9 b.n 800e632 <__ssputs_r+0x8a>
...
0800e660 <_svfiprintf_r>:
800e660: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
800e664: 4698 mov r8, r3
800e666: 898b ldrh r3, [r1, #12]
800e668: 4607 mov r7, r0
800e66a: 061b lsls r3, r3, #24
800e66c: 460d mov r5, r1
800e66e: 4614 mov r4, r2
800e670: b09d sub sp, #116 @ 0x74
800e672: d510 bpl.n 800e696 <_svfiprintf_r+0x36>
800e674: 690b ldr r3, [r1, #16]
800e676: b973 cbnz r3, 800e696 <_svfiprintf_r+0x36>
800e678: 2140 movs r1, #64 @ 0x40
800e67a: f7ff ff09 bl 800e490 <_malloc_r>
800e67e: 6028 str r0, [r5, #0]
800e680: 6128 str r0, [r5, #16]
800e682: b930 cbnz r0, 800e692 <_svfiprintf_r+0x32>
800e684: 230c movs r3, #12
800e686: 603b str r3, [r7, #0]
800e688: f04f 30ff mov.w r0, #4294967295
800e68c: b01d add sp, #116 @ 0x74
800e68e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
800e692: 2340 movs r3, #64 @ 0x40
800e694: 616b str r3, [r5, #20]
800e696: 2300 movs r3, #0
800e698: 9309 str r3, [sp, #36] @ 0x24
800e69a: 2320 movs r3, #32
800e69c: f88d 3029 strb.w r3, [sp, #41] @ 0x29
800e6a0: 2330 movs r3, #48 @ 0x30
800e6a2: f04f 0901 mov.w r9, #1
800e6a6: f8cd 800c str.w r8, [sp, #12]
800e6aa: f8df 8198 ldr.w r8, [pc, #408] @ 800e844 <_svfiprintf_r+0x1e4>
800e6ae: f88d 302a strb.w r3, [sp, #42] @ 0x2a
800e6b2: 4623 mov r3, r4
800e6b4: 469a mov sl, r3
800e6b6: f813 2b01 ldrb.w r2, [r3], #1
800e6ba: b10a cbz r2, 800e6c0 <_svfiprintf_r+0x60>
800e6bc: 2a25 cmp r2, #37 @ 0x25
800e6be: d1f9 bne.n 800e6b4 <_svfiprintf_r+0x54>
800e6c0: ebba 0b04 subs.w fp, sl, r4
800e6c4: d00b beq.n 800e6de <_svfiprintf_r+0x7e>
800e6c6: 465b mov r3, fp
800e6c8: 4622 mov r2, r4
800e6ca: 4629 mov r1, r5
800e6cc: 4638 mov r0, r7
800e6ce: f7ff ff6b bl 800e5a8 <__ssputs_r>
800e6d2: 3001 adds r0, #1
800e6d4: f000 80a7 beq.w 800e826 <_svfiprintf_r+0x1c6>
800e6d8: 9a09 ldr r2, [sp, #36] @ 0x24
800e6da: 445a add r2, fp
800e6dc: 9209 str r2, [sp, #36] @ 0x24
800e6de: f89a 3000 ldrb.w r3, [sl]
800e6e2: 2b00 cmp r3, #0
800e6e4: f000 809f beq.w 800e826 <_svfiprintf_r+0x1c6>
800e6e8: 2300 movs r3, #0
800e6ea: f04f 32ff mov.w r2, #4294967295
800e6ee: e9cd 2305 strd r2, r3, [sp, #20]
800e6f2: f10a 0a01 add.w sl, sl, #1
800e6f6: 9304 str r3, [sp, #16]
800e6f8: 9307 str r3, [sp, #28]
800e6fa: f88d 3053 strb.w r3, [sp, #83] @ 0x53
800e6fe: 931a str r3, [sp, #104] @ 0x68
800e700: 4654 mov r4, sl
800e702: 2205 movs r2, #5
800e704: f814 1b01 ldrb.w r1, [r4], #1
800e708: 484e ldr r0, [pc, #312] @ (800e844 <_svfiprintf_r+0x1e4>)
800e70a: f000 fa5f bl 800ebcc <memchr>
800e70e: 9a04 ldr r2, [sp, #16]
800e710: b9d8 cbnz r0, 800e74a <_svfiprintf_r+0xea>
800e712: 06d0 lsls r0, r2, #27
800e714: bf44 itt mi
800e716: 2320 movmi r3, #32
800e718: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e71c: 0711 lsls r1, r2, #28
800e71e: bf44 itt mi
800e720: 232b movmi r3, #43 @ 0x2b
800e722: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53
800e726: f89a 3000 ldrb.w r3, [sl]
800e72a: 2b2a cmp r3, #42 @ 0x2a
800e72c: d015 beq.n 800e75a <_svfiprintf_r+0xfa>
800e72e: 4654 mov r4, sl
800e730: 2000 movs r0, #0
800e732: f04f 0c0a mov.w ip, #10
800e736: 9a07 ldr r2, [sp, #28]
800e738: 4621 mov r1, r4
800e73a: f811 3b01 ldrb.w r3, [r1], #1
800e73e: 3b30 subs r3, #48 @ 0x30
800e740: 2b09 cmp r3, #9
800e742: d94b bls.n 800e7dc <_svfiprintf_r+0x17c>
800e744: b1b0 cbz r0, 800e774 <_svfiprintf_r+0x114>
800e746: 9207 str r2, [sp, #28]
800e748: e014 b.n 800e774 <_svfiprintf_r+0x114>
800e74a: eba0 0308 sub.w r3, r0, r8
800e74e: fa09 f303 lsl.w r3, r9, r3
800e752: 4313 orrs r3, r2
800e754: 46a2 mov sl, r4
800e756: 9304 str r3, [sp, #16]
800e758: e7d2 b.n 800e700 <_svfiprintf_r+0xa0>
800e75a: 9b03 ldr r3, [sp, #12]
800e75c: 1d19 adds r1, r3, #4
800e75e: 681b ldr r3, [r3, #0]
800e760: 9103 str r1, [sp, #12]
800e762: 2b00 cmp r3, #0
800e764: bfbb ittet lt
800e766: 425b neglt r3, r3
800e768: f042 0202 orrlt.w r2, r2, #2
800e76c: 9307 strge r3, [sp, #28]
800e76e: 9307 strlt r3, [sp, #28]
800e770: bfb8 it lt
800e772: 9204 strlt r2, [sp, #16]
800e774: 7823 ldrb r3, [r4, #0]
800e776: 2b2e cmp r3, #46 @ 0x2e
800e778: d10a bne.n 800e790 <_svfiprintf_r+0x130>
800e77a: 7863 ldrb r3, [r4, #1]
800e77c: 2b2a cmp r3, #42 @ 0x2a
800e77e: d132 bne.n 800e7e6 <_svfiprintf_r+0x186>
800e780: 9b03 ldr r3, [sp, #12]
800e782: 3402 adds r4, #2
800e784: 1d1a adds r2, r3, #4
800e786: 681b ldr r3, [r3, #0]
800e788: 9203 str r2, [sp, #12]
800e78a: ea43 73e3 orr.w r3, r3, r3, asr #31
800e78e: 9305 str r3, [sp, #20]
800e790: f8df a0b4 ldr.w sl, [pc, #180] @ 800e848 <_svfiprintf_r+0x1e8>
800e794: 2203 movs r2, #3
800e796: 4650 mov r0, sl
800e798: 7821 ldrb r1, [r4, #0]
800e79a: f000 fa17 bl 800ebcc <memchr>
800e79e: b138 cbz r0, 800e7b0 <_svfiprintf_r+0x150>
800e7a0: 2240 movs r2, #64 @ 0x40
800e7a2: 9b04 ldr r3, [sp, #16]
800e7a4: eba0 000a sub.w r0, r0, sl
800e7a8: 4082 lsls r2, r0
800e7aa: 4313 orrs r3, r2
800e7ac: 3401 adds r4, #1
800e7ae: 9304 str r3, [sp, #16]
800e7b0: f814 1b01 ldrb.w r1, [r4], #1
800e7b4: 2206 movs r2, #6
800e7b6: 4825 ldr r0, [pc, #148] @ (800e84c <_svfiprintf_r+0x1ec>)
800e7b8: f88d 1028 strb.w r1, [sp, #40] @ 0x28
800e7bc: f000 fa06 bl 800ebcc <memchr>
800e7c0: 2800 cmp r0, #0
800e7c2: d036 beq.n 800e832 <_svfiprintf_r+0x1d2>
800e7c4: 4b22 ldr r3, [pc, #136] @ (800e850 <_svfiprintf_r+0x1f0>)
800e7c6: bb1b cbnz r3, 800e810 <_svfiprintf_r+0x1b0>
800e7c8: 9b03 ldr r3, [sp, #12]
800e7ca: 3307 adds r3, #7
800e7cc: f023 0307 bic.w r3, r3, #7
800e7d0: 3308 adds r3, #8
800e7d2: 9303 str r3, [sp, #12]
800e7d4: 9b09 ldr r3, [sp, #36] @ 0x24
800e7d6: 4433 add r3, r6
800e7d8: 9309 str r3, [sp, #36] @ 0x24
800e7da: e76a b.n 800e6b2 <_svfiprintf_r+0x52>
800e7dc: 460c mov r4, r1
800e7de: 2001 movs r0, #1
800e7e0: fb0c 3202 mla r2, ip, r2, r3
800e7e4: e7a8 b.n 800e738 <_svfiprintf_r+0xd8>
800e7e6: 2300 movs r3, #0
800e7e8: f04f 0c0a mov.w ip, #10
800e7ec: 4619 mov r1, r3
800e7ee: 3401 adds r4, #1
800e7f0: 9305 str r3, [sp, #20]
800e7f2: 4620 mov r0, r4
800e7f4: f810 2b01 ldrb.w r2, [r0], #1
800e7f8: 3a30 subs r2, #48 @ 0x30
800e7fa: 2a09 cmp r2, #9
800e7fc: d903 bls.n 800e806 <_svfiprintf_r+0x1a6>
800e7fe: 2b00 cmp r3, #0
800e800: d0c6 beq.n 800e790 <_svfiprintf_r+0x130>
800e802: 9105 str r1, [sp, #20]
800e804: e7c4 b.n 800e790 <_svfiprintf_r+0x130>
800e806: 4604 mov r4, r0
800e808: 2301 movs r3, #1
800e80a: fb0c 2101 mla r1, ip, r1, r2
800e80e: e7f0 b.n 800e7f2 <_svfiprintf_r+0x192>
800e810: ab03 add r3, sp, #12
800e812: 9300 str r3, [sp, #0]
800e814: 462a mov r2, r5
800e816: 4638 mov r0, r7
800e818: 4b0e ldr r3, [pc, #56] @ (800e854 <_svfiprintf_r+0x1f4>)
800e81a: a904 add r1, sp, #16
800e81c: f3af 8000 nop.w
800e820: 1c42 adds r2, r0, #1
800e822: 4606 mov r6, r0
800e824: d1d6 bne.n 800e7d4 <_svfiprintf_r+0x174>
800e826: 89ab ldrh r3, [r5, #12]
800e828: 065b lsls r3, r3, #25
800e82a: f53f af2d bmi.w 800e688 <_svfiprintf_r+0x28>
800e82e: 9809 ldr r0, [sp, #36] @ 0x24
800e830: e72c b.n 800e68c <_svfiprintf_r+0x2c>
800e832: ab03 add r3, sp, #12
800e834: 9300 str r3, [sp, #0]
800e836: 462a mov r2, r5
800e838: 4638 mov r0, r7
800e83a: 4b06 ldr r3, [pc, #24] @ (800e854 <_svfiprintf_r+0x1f4>)
800e83c: a904 add r1, sp, #16
800e83e: f000 f87d bl 800e93c <_printf_i>
800e842: e7ed b.n 800e820 <_svfiprintf_r+0x1c0>
800e844: 0800f43e .word 0x0800f43e
800e848: 0800f444 .word 0x0800f444
800e84c: 0800f448 .word 0x0800f448
800e850: 00000000 .word 0x00000000
800e854: 0800e5a9 .word 0x0800e5a9
0800e858 <_printf_common>:
800e858: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
800e85c: 4616 mov r6, r2
800e85e: 4698 mov r8, r3
800e860: 688a ldr r2, [r1, #8]
800e862: 690b ldr r3, [r1, #16]
800e864: 4607 mov r7, r0
800e866: 4293 cmp r3, r2
800e868: bfb8 it lt
800e86a: 4613 movlt r3, r2
800e86c: 6033 str r3, [r6, #0]
800e86e: f891 2043 ldrb.w r2, [r1, #67] @ 0x43
800e872: 460c mov r4, r1
800e874: f8dd 9020 ldr.w r9, [sp, #32]
800e878: b10a cbz r2, 800e87e <_printf_common+0x26>
800e87a: 3301 adds r3, #1
800e87c: 6033 str r3, [r6, #0]
800e87e: 6823 ldr r3, [r4, #0]
800e880: 0699 lsls r1, r3, #26
800e882: bf42 ittt mi
800e884: 6833 ldrmi r3, [r6, #0]
800e886: 3302 addmi r3, #2
800e888: 6033 strmi r3, [r6, #0]
800e88a: 6825 ldr r5, [r4, #0]
800e88c: f015 0506 ands.w r5, r5, #6
800e890: d106 bne.n 800e8a0 <_printf_common+0x48>
800e892: f104 0a19 add.w sl, r4, #25
800e896: 68e3 ldr r3, [r4, #12]
800e898: 6832 ldr r2, [r6, #0]
800e89a: 1a9b subs r3, r3, r2
800e89c: 42ab cmp r3, r5
800e89e: dc2b bgt.n 800e8f8 <_printf_common+0xa0>
800e8a0: f894 3043 ldrb.w r3, [r4, #67] @ 0x43
800e8a4: 6822 ldr r2, [r4, #0]
800e8a6: 3b00 subs r3, #0
800e8a8: bf18 it ne
800e8aa: 2301 movne r3, #1
800e8ac: 0692 lsls r2, r2, #26
800e8ae: d430 bmi.n 800e912 <_printf_common+0xba>
800e8b0: 4641 mov r1, r8
800e8b2: 4638 mov r0, r7
800e8b4: f104 0243 add.w r2, r4, #67 @ 0x43
800e8b8: 47c8 blx r9
800e8ba: 3001 adds r0, #1
800e8bc: d023 beq.n 800e906 <_printf_common+0xae>
800e8be: 6823 ldr r3, [r4, #0]
800e8c0: 6922 ldr r2, [r4, #16]
800e8c2: f003 0306 and.w r3, r3, #6
800e8c6: 2b04 cmp r3, #4
800e8c8: bf14 ite ne
800e8ca: 2500 movne r5, #0
800e8cc: 6833 ldreq r3, [r6, #0]
800e8ce: f04f 0600 mov.w r6, #0
800e8d2: bf08 it eq
800e8d4: 68e5 ldreq r5, [r4, #12]
800e8d6: f104 041a add.w r4, r4, #26
800e8da: bf08 it eq
800e8dc: 1aed subeq r5, r5, r3
800e8de: f854 3c12 ldr.w r3, [r4, #-18]
800e8e2: bf08 it eq
800e8e4: ea25 75e5 biceq.w r5, r5, r5, asr #31
800e8e8: 4293 cmp r3, r2
800e8ea: bfc4 itt gt
800e8ec: 1a9b subgt r3, r3, r2
800e8ee: 18ed addgt r5, r5, r3
800e8f0: 42b5 cmp r5, r6
800e8f2: d11a bne.n 800e92a <_printf_common+0xd2>
800e8f4: 2000 movs r0, #0
800e8f6: e008 b.n 800e90a <_printf_common+0xb2>
800e8f8: 2301 movs r3, #1
800e8fa: 4652 mov r2, sl
800e8fc: 4641 mov r1, r8
800e8fe: 4638 mov r0, r7
800e900: 47c8 blx r9
800e902: 3001 adds r0, #1
800e904: d103 bne.n 800e90e <_printf_common+0xb6>
800e906: f04f 30ff mov.w r0, #4294967295
800e90a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800e90e: 3501 adds r5, #1
800e910: e7c1 b.n 800e896 <_printf_common+0x3e>
800e912: 2030 movs r0, #48 @ 0x30
800e914: 18e1 adds r1, r4, r3
800e916: f881 0043 strb.w r0, [r1, #67] @ 0x43
800e91a: 1c5a adds r2, r3, #1
800e91c: f894 1045 ldrb.w r1, [r4, #69] @ 0x45
800e920: 4422 add r2, r4
800e922: 3302 adds r3, #2
800e924: f882 1043 strb.w r1, [r2, #67] @ 0x43
800e928: e7c2 b.n 800e8b0 <_printf_common+0x58>
800e92a: 2301 movs r3, #1
800e92c: 4622 mov r2, r4
800e92e: 4641 mov r1, r8
800e930: 4638 mov r0, r7
800e932: 47c8 blx r9
800e934: 3001 adds r0, #1
800e936: d0e6 beq.n 800e906 <_printf_common+0xae>
800e938: 3601 adds r6, #1
800e93a: e7d9 b.n 800e8f0 <_printf_common+0x98>
0800e93c <_printf_i>:
800e93c: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr}
800e940: 7e0f ldrb r7, [r1, #24]
800e942: 4691 mov r9, r2
800e944: 2f78 cmp r7, #120 @ 0x78
800e946: 4680 mov r8, r0
800e948: 460c mov r4, r1
800e94a: 469a mov sl, r3
800e94c: 9e0c ldr r6, [sp, #48] @ 0x30
800e94e: f101 0243 add.w r2, r1, #67 @ 0x43
800e952: d807 bhi.n 800e964 <_printf_i+0x28>
800e954: 2f62 cmp r7, #98 @ 0x62
800e956: d80a bhi.n 800e96e <_printf_i+0x32>
800e958: 2f00 cmp r7, #0
800e95a: f000 80d1 beq.w 800eb00 <_printf_i+0x1c4>
800e95e: 2f58 cmp r7, #88 @ 0x58
800e960: f000 80b8 beq.w 800ead4 <_printf_i+0x198>
800e964: f104 0642 add.w r6, r4, #66 @ 0x42
800e968: f884 7042 strb.w r7, [r4, #66] @ 0x42
800e96c: e03a b.n 800e9e4 <_printf_i+0xa8>
800e96e: f1a7 0363 sub.w r3, r7, #99 @ 0x63
800e972: 2b15 cmp r3, #21
800e974: d8f6 bhi.n 800e964 <_printf_i+0x28>
800e976: a101 add r1, pc, #4 @ (adr r1, 800e97c <_printf_i+0x40>)
800e978: f851 f023 ldr.w pc, [r1, r3, lsl #2]
800e97c: 0800e9d5 .word 0x0800e9d5
800e980: 0800e9e9 .word 0x0800e9e9
800e984: 0800e965 .word 0x0800e965
800e988: 0800e965 .word 0x0800e965
800e98c: 0800e965 .word 0x0800e965
800e990: 0800e965 .word 0x0800e965
800e994: 0800e9e9 .word 0x0800e9e9
800e998: 0800e965 .word 0x0800e965
800e99c: 0800e965 .word 0x0800e965
800e9a0: 0800e965 .word 0x0800e965
800e9a4: 0800e965 .word 0x0800e965
800e9a8: 0800eae7 .word 0x0800eae7
800e9ac: 0800ea13 .word 0x0800ea13
800e9b0: 0800eaa1 .word 0x0800eaa1
800e9b4: 0800e965 .word 0x0800e965
800e9b8: 0800e965 .word 0x0800e965
800e9bc: 0800eb09 .word 0x0800eb09
800e9c0: 0800e965 .word 0x0800e965
800e9c4: 0800ea13 .word 0x0800ea13
800e9c8: 0800e965 .word 0x0800e965
800e9cc: 0800e965 .word 0x0800e965
800e9d0: 0800eaa9 .word 0x0800eaa9
800e9d4: 6833 ldr r3, [r6, #0]
800e9d6: 1d1a adds r2, r3, #4
800e9d8: 681b ldr r3, [r3, #0]
800e9da: 6032 str r2, [r6, #0]
800e9dc: f104 0642 add.w r6, r4, #66 @ 0x42
800e9e0: f884 3042 strb.w r3, [r4, #66] @ 0x42
800e9e4: 2301 movs r3, #1
800e9e6: e09c b.n 800eb22 <_printf_i+0x1e6>
800e9e8: 6833 ldr r3, [r6, #0]
800e9ea: 6820 ldr r0, [r4, #0]
800e9ec: 1d19 adds r1, r3, #4
800e9ee: 6031 str r1, [r6, #0]
800e9f0: 0606 lsls r6, r0, #24
800e9f2: d501 bpl.n 800e9f8 <_printf_i+0xbc>
800e9f4: 681d ldr r5, [r3, #0]
800e9f6: e003 b.n 800ea00 <_printf_i+0xc4>
800e9f8: 0645 lsls r5, r0, #25
800e9fa: d5fb bpl.n 800e9f4 <_printf_i+0xb8>
800e9fc: f9b3 5000 ldrsh.w r5, [r3]
800ea00: 2d00 cmp r5, #0
800ea02: da03 bge.n 800ea0c <_printf_i+0xd0>
800ea04: 232d movs r3, #45 @ 0x2d
800ea06: 426d negs r5, r5
800ea08: f884 3043 strb.w r3, [r4, #67] @ 0x43
800ea0c: 230a movs r3, #10
800ea0e: 4858 ldr r0, [pc, #352] @ (800eb70 <_printf_i+0x234>)
800ea10: e011 b.n 800ea36 <_printf_i+0xfa>
800ea12: 6821 ldr r1, [r4, #0]
800ea14: 6833 ldr r3, [r6, #0]
800ea16: 0608 lsls r0, r1, #24
800ea18: f853 5b04 ldr.w r5, [r3], #4
800ea1c: d402 bmi.n 800ea24 <_printf_i+0xe8>
800ea1e: 0649 lsls r1, r1, #25
800ea20: bf48 it mi
800ea22: b2ad uxthmi r5, r5
800ea24: 2f6f cmp r7, #111 @ 0x6f
800ea26: 6033 str r3, [r6, #0]
800ea28: bf14 ite ne
800ea2a: 230a movne r3, #10
800ea2c: 2308 moveq r3, #8
800ea2e: 4850 ldr r0, [pc, #320] @ (800eb70 <_printf_i+0x234>)
800ea30: 2100 movs r1, #0
800ea32: f884 1043 strb.w r1, [r4, #67] @ 0x43
800ea36: 6866 ldr r6, [r4, #4]
800ea38: 2e00 cmp r6, #0
800ea3a: 60a6 str r6, [r4, #8]
800ea3c: db05 blt.n 800ea4a <_printf_i+0x10e>
800ea3e: 6821 ldr r1, [r4, #0]
800ea40: 432e orrs r6, r5
800ea42: f021 0104 bic.w r1, r1, #4
800ea46: 6021 str r1, [r4, #0]
800ea48: d04b beq.n 800eae2 <_printf_i+0x1a6>
800ea4a: 4616 mov r6, r2
800ea4c: fbb5 f1f3 udiv r1, r5, r3
800ea50: fb03 5711 mls r7, r3, r1, r5
800ea54: 5dc7 ldrb r7, [r0, r7]
800ea56: f806 7d01 strb.w r7, [r6, #-1]!
800ea5a: 462f mov r7, r5
800ea5c: 42bb cmp r3, r7
800ea5e: 460d mov r5, r1
800ea60: d9f4 bls.n 800ea4c <_printf_i+0x110>
800ea62: 2b08 cmp r3, #8
800ea64: d10b bne.n 800ea7e <_printf_i+0x142>
800ea66: 6823 ldr r3, [r4, #0]
800ea68: 07df lsls r7, r3, #31
800ea6a: d508 bpl.n 800ea7e <_printf_i+0x142>
800ea6c: 6923 ldr r3, [r4, #16]
800ea6e: 6861 ldr r1, [r4, #4]
800ea70: 4299 cmp r1, r3
800ea72: bfde ittt le
800ea74: 2330 movle r3, #48 @ 0x30
800ea76: f806 3c01 strble.w r3, [r6, #-1]
800ea7a: f106 36ff addle.w r6, r6, #4294967295
800ea7e: 1b92 subs r2, r2, r6
800ea80: 6122 str r2, [r4, #16]
800ea82: 464b mov r3, r9
800ea84: 4621 mov r1, r4
800ea86: 4640 mov r0, r8
800ea88: f8cd a000 str.w sl, [sp]
800ea8c: aa03 add r2, sp, #12
800ea8e: f7ff fee3 bl 800e858 <_printf_common>
800ea92: 3001 adds r0, #1
800ea94: d14a bne.n 800eb2c <_printf_i+0x1f0>
800ea96: f04f 30ff mov.w r0, #4294967295
800ea9a: b004 add sp, #16
800ea9c: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
800eaa0: 6823 ldr r3, [r4, #0]
800eaa2: f043 0320 orr.w r3, r3, #32
800eaa6: 6023 str r3, [r4, #0]
800eaa8: 2778 movs r7, #120 @ 0x78
800eaaa: 4832 ldr r0, [pc, #200] @ (800eb74 <_printf_i+0x238>)
800eaac: f884 7045 strb.w r7, [r4, #69] @ 0x45
800eab0: 6823 ldr r3, [r4, #0]
800eab2: 6831 ldr r1, [r6, #0]
800eab4: 061f lsls r7, r3, #24
800eab6: f851 5b04 ldr.w r5, [r1], #4
800eaba: d402 bmi.n 800eac2 <_printf_i+0x186>
800eabc: 065f lsls r7, r3, #25
800eabe: bf48 it mi
800eac0: b2ad uxthmi r5, r5
800eac2: 6031 str r1, [r6, #0]
800eac4: 07d9 lsls r1, r3, #31
800eac6: bf44 itt mi
800eac8: f043 0320 orrmi.w r3, r3, #32
800eacc: 6023 strmi r3, [r4, #0]
800eace: b11d cbz r5, 800ead8 <_printf_i+0x19c>
800ead0: 2310 movs r3, #16
800ead2: e7ad b.n 800ea30 <_printf_i+0xf4>
800ead4: 4826 ldr r0, [pc, #152] @ (800eb70 <_printf_i+0x234>)
800ead6: e7e9 b.n 800eaac <_printf_i+0x170>
800ead8: 6823 ldr r3, [r4, #0]
800eada: f023 0320 bic.w r3, r3, #32
800eade: 6023 str r3, [r4, #0]
800eae0: e7f6 b.n 800ead0 <_printf_i+0x194>
800eae2: 4616 mov r6, r2
800eae4: e7bd b.n 800ea62 <_printf_i+0x126>
800eae6: 6833 ldr r3, [r6, #0]
800eae8: 6825 ldr r5, [r4, #0]
800eaea: 1d18 adds r0, r3, #4
800eaec: 6961 ldr r1, [r4, #20]
800eaee: 6030 str r0, [r6, #0]
800eaf0: 062e lsls r6, r5, #24
800eaf2: 681b ldr r3, [r3, #0]
800eaf4: d501 bpl.n 800eafa <_printf_i+0x1be>
800eaf6: 6019 str r1, [r3, #0]
800eaf8: e002 b.n 800eb00 <_printf_i+0x1c4>
800eafa: 0668 lsls r0, r5, #25
800eafc: d5fb bpl.n 800eaf6 <_printf_i+0x1ba>
800eafe: 8019 strh r1, [r3, #0]
800eb00: 2300 movs r3, #0
800eb02: 4616 mov r6, r2
800eb04: 6123 str r3, [r4, #16]
800eb06: e7bc b.n 800ea82 <_printf_i+0x146>
800eb08: 6833 ldr r3, [r6, #0]
800eb0a: 2100 movs r1, #0
800eb0c: 1d1a adds r2, r3, #4
800eb0e: 6032 str r2, [r6, #0]
800eb10: 681e ldr r6, [r3, #0]
800eb12: 6862 ldr r2, [r4, #4]
800eb14: 4630 mov r0, r6
800eb16: f000 f859 bl 800ebcc <memchr>
800eb1a: b108 cbz r0, 800eb20 <_printf_i+0x1e4>
800eb1c: 1b80 subs r0, r0, r6
800eb1e: 6060 str r0, [r4, #4]
800eb20: 6863 ldr r3, [r4, #4]
800eb22: 6123 str r3, [r4, #16]
800eb24: 2300 movs r3, #0
800eb26: f884 3043 strb.w r3, [r4, #67] @ 0x43
800eb2a: e7aa b.n 800ea82 <_printf_i+0x146>
800eb2c: 4632 mov r2, r6
800eb2e: 4649 mov r1, r9
800eb30: 4640 mov r0, r8
800eb32: 6923 ldr r3, [r4, #16]
800eb34: 47d0 blx sl
800eb36: 3001 adds r0, #1
800eb38: d0ad beq.n 800ea96 <_printf_i+0x15a>
800eb3a: 6823 ldr r3, [r4, #0]
800eb3c: 079b lsls r3, r3, #30
800eb3e: d413 bmi.n 800eb68 <_printf_i+0x22c>
800eb40: 68e0 ldr r0, [r4, #12]
800eb42: 9b03 ldr r3, [sp, #12]
800eb44: 4298 cmp r0, r3
800eb46: bfb8 it lt
800eb48: 4618 movlt r0, r3
800eb4a: e7a6 b.n 800ea9a <_printf_i+0x15e>
800eb4c: 2301 movs r3, #1
800eb4e: 4632 mov r2, r6
800eb50: 4649 mov r1, r9
800eb52: 4640 mov r0, r8
800eb54: 47d0 blx sl
800eb56: 3001 adds r0, #1
800eb58: d09d beq.n 800ea96 <_printf_i+0x15a>
800eb5a: 3501 adds r5, #1
800eb5c: 68e3 ldr r3, [r4, #12]
800eb5e: 9903 ldr r1, [sp, #12]
800eb60: 1a5b subs r3, r3, r1
800eb62: 42ab cmp r3, r5
800eb64: dcf2 bgt.n 800eb4c <_printf_i+0x210>
800eb66: e7eb b.n 800eb40 <_printf_i+0x204>
800eb68: 2500 movs r5, #0
800eb6a: f104 0619 add.w r6, r4, #25
800eb6e: e7f5 b.n 800eb5c <_printf_i+0x220>
800eb70: 0800f44f .word 0x0800f44f
800eb74: 0800f460 .word 0x0800f460
0800eb78 <memmove>:
800eb78: 4288 cmp r0, r1
800eb7a: b510 push {r4, lr}
800eb7c: eb01 0402 add.w r4, r1, r2
800eb80: d902 bls.n 800eb88 <memmove+0x10>
800eb82: 4284 cmp r4, r0
800eb84: 4623 mov r3, r4
800eb86: d807 bhi.n 800eb98 <memmove+0x20>
800eb88: 1e43 subs r3, r0, #1
800eb8a: 42a1 cmp r1, r4
800eb8c: d008 beq.n 800eba0 <memmove+0x28>
800eb8e: f811 2b01 ldrb.w r2, [r1], #1
800eb92: f803 2f01 strb.w r2, [r3, #1]!
800eb96: e7f8 b.n 800eb8a <memmove+0x12>
800eb98: 4601 mov r1, r0
800eb9a: 4402 add r2, r0
800eb9c: 428a cmp r2, r1
800eb9e: d100 bne.n 800eba2 <memmove+0x2a>
800eba0: bd10 pop {r4, pc}
800eba2: f813 4d01 ldrb.w r4, [r3, #-1]!
800eba6: f802 4d01 strb.w r4, [r2, #-1]!
800ebaa: e7f7 b.n 800eb9c <memmove+0x24>
0800ebac <_sbrk_r>:
800ebac: b538 push {r3, r4, r5, lr}
800ebae: 2300 movs r3, #0
800ebb0: 4d05 ldr r5, [pc, #20] @ (800ebc8 <_sbrk_r+0x1c>)
800ebb2: 4604 mov r4, r0
800ebb4: 4608 mov r0, r1
800ebb6: 602b str r3, [r5, #0]
800ebb8: f7f6 f98e bl 8004ed8 <_sbrk>
800ebbc: 1c43 adds r3, r0, #1
800ebbe: d102 bne.n 800ebc6 <_sbrk_r+0x1a>
800ebc0: 682b ldr r3, [r5, #0]
800ebc2: b103 cbz r3, 800ebc6 <_sbrk_r+0x1a>
800ebc4: 6023 str r3, [r4, #0]
800ebc6: bd38 pop {r3, r4, r5, pc}
800ebc8: 20001894 .word 0x20001894
0800ebcc <memchr>:
800ebcc: 4603 mov r3, r0
800ebce: b510 push {r4, lr}
800ebd0: b2c9 uxtb r1, r1
800ebd2: 4402 add r2, r0
800ebd4: 4293 cmp r3, r2
800ebd6: 4618 mov r0, r3
800ebd8: d101 bne.n 800ebde <memchr+0x12>
800ebda: 2000 movs r0, #0
800ebdc: e003 b.n 800ebe6 <memchr+0x1a>
800ebde: 7804 ldrb r4, [r0, #0]
800ebe0: 3301 adds r3, #1
800ebe2: 428c cmp r4, r1
800ebe4: d1f6 bne.n 800ebd4 <memchr+0x8>
800ebe6: bd10 pop {r4, pc}
0800ebe8 <memcpy>:
800ebe8: 440a add r2, r1
800ebea: 4291 cmp r1, r2
800ebec: f100 33ff add.w r3, r0, #4294967295
800ebf0: d100 bne.n 800ebf4 <memcpy+0xc>
800ebf2: 4770 bx lr
800ebf4: b510 push {r4, lr}
800ebf6: f811 4b01 ldrb.w r4, [r1], #1
800ebfa: 4291 cmp r1, r2
800ebfc: f803 4f01 strb.w r4, [r3, #1]!
800ec00: d1f9 bne.n 800ebf6 <memcpy+0xe>
800ec02: bd10 pop {r4, pc}
0800ec04 <_realloc_r>:
800ec04: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
800ec08: 4607 mov r7, r0
800ec0a: 4614 mov r4, r2
800ec0c: 460d mov r5, r1
800ec0e: b921 cbnz r1, 800ec1a <_realloc_r+0x16>
800ec10: 4611 mov r1, r2
800ec12: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr}
800ec16: f7ff bc3b b.w 800e490 <_malloc_r>
800ec1a: b92a cbnz r2, 800ec28 <_realloc_r+0x24>
800ec1c: f7ff fbce bl 800e3bc <_free_r>
800ec20: 4625 mov r5, r4
800ec22: 4628 mov r0, r5
800ec24: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
800ec28: f000 f81a bl 800ec60 <_malloc_usable_size_r>
800ec2c: 4284 cmp r4, r0
800ec2e: 4606 mov r6, r0
800ec30: d802 bhi.n 800ec38 <_realloc_r+0x34>
800ec32: ebb4 0f50 cmp.w r4, r0, lsr #1
800ec36: d8f4 bhi.n 800ec22 <_realloc_r+0x1e>
800ec38: 4621 mov r1, r4
800ec3a: 4638 mov r0, r7
800ec3c: f7ff fc28 bl 800e490 <_malloc_r>
800ec40: 4680 mov r8, r0
800ec42: b908 cbnz r0, 800ec48 <_realloc_r+0x44>
800ec44: 4645 mov r5, r8
800ec46: e7ec b.n 800ec22 <_realloc_r+0x1e>
800ec48: 42b4 cmp r4, r6
800ec4a: 4622 mov r2, r4
800ec4c: 4629 mov r1, r5
800ec4e: bf28 it cs
800ec50: 4632 movcs r2, r6
800ec52: f7ff ffc9 bl 800ebe8 <memcpy>
800ec56: 4629 mov r1, r5
800ec58: 4638 mov r0, r7
800ec5a: f7ff fbaf bl 800e3bc <_free_r>
800ec5e: e7f1 b.n 800ec44 <_realloc_r+0x40>
0800ec60 <_malloc_usable_size_r>:
800ec60: f851 3c04 ldr.w r3, [r1, #-4]
800ec64: 1f18 subs r0, r3, #4
800ec66: 2b00 cmp r3, #0
800ec68: bfbc itt lt
800ec6a: 580b ldrlt r3, [r1, r0]
800ec6c: 18c0 addlt r0, r0, r3
800ec6e: 4770 bx lr
0800ec70 <_init>:
800ec70: b5f8 push {r3, r4, r5, r6, r7, lr}
800ec72: bf00 nop
800ec74: bcf8 pop {r3, r4, r5, r6, r7}
800ec76: bc08 pop {r3}
800ec78: 469e mov lr, r3
800ec7a: 4770 bx lr
0800ec7c <_fini>:
800ec7c: b5f8 push {r3, r4, r5, r6, r7, lr}
800ec7e: bf00 nop
800ec80: bcf8 pop {r3, r4, r5, r6, r7}
800ec82: bc08 pop {r3}
800ec84: 469e mov lr, r3
800ec86: 4770 bx lr
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